1 /* Register to Stack convert for GNU compiler.
2 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it
8 under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GCC is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
22 /* This pass converts stack-like registers from the "flat register
23 file" model that gcc uses, to a stack convention that the 387 uses.
25 * The form of the input:
27 On input, the function consists of insn that have had their
28 registers fully allocated to a set of "virtual" registers. Note that
29 the word "virtual" is used differently here than elsewhere in gcc: for
30 each virtual stack reg, there is a hard reg, but the mapping between
31 them is not known until this pass is run. On output, hard register
32 numbers have been substituted, and various pop and exchange insns have
33 been emitted. The hard register numbers and the virtual register
34 numbers completely overlap - before this pass, all stack register
35 numbers are virtual, and afterward they are all hard.
37 The virtual registers can be manipulated normally by gcc, and their
38 semantics are the same as for normal registers. After the hard
39 register numbers are substituted, the semantics of an insn containing
40 stack-like regs are not the same as for an insn with normal regs: for
41 instance, it is not safe to delete an insn that appears to be a no-op
42 move. In general, no insn containing hard regs should be changed
43 after this pass is done.
45 * The form of the output:
47 After this pass, hard register numbers represent the distance from
48 the current top of stack to the desired register. A reference to
49 FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1,
50 represents the register just below that, and so forth. Also, REG_DEAD
51 notes indicate whether or not a stack register should be popped.
53 A "swap" insn looks like a parallel of two patterns, where each
54 pattern is a SET: one sets A to B, the other B to A.
56 A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG
57 and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS,
58 will replace the existing stack top, not push a new value.
60 A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose
61 SET_SRC is REG or MEM.
63 The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG
64 appears ambiguous. As a special case, the presence of a REG_DEAD note
65 for FIRST_STACK_REG differentiates between a load insn and a pop.
67 If a REG_DEAD is present, the insn represents a "pop" that discards
68 the top of the register stack. If there is no REG_DEAD note, then the
69 insn represents a "dup" or a push of the current top of stack onto the
74 Existing REG_DEAD and REG_UNUSED notes for stack registers are
75 deleted and recreated from scratch. REG_DEAD is never created for a
76 SET_DEST, only REG_UNUSED.
80 There are several rules on the usage of stack-like regs in
81 asm_operands insns. These rules apply only to the operands that are
84 1. Given a set of input regs that die in an asm_operands, it is
85 necessary to know which are implicitly popped by the asm, and
86 which must be explicitly popped by gcc.
88 An input reg that is implicitly popped by the asm must be
89 explicitly clobbered, unless it is constrained to match an
92 2. For any input reg that is implicitly popped by an asm, it is
93 necessary to know how to adjust the stack to compensate for the pop.
94 If any non-popped input is closer to the top of the reg-stack than
95 the implicitly popped reg, it would not be possible to know what the
96 stack looked like - it's not clear how the rest of the stack "slides
99 All implicitly popped input regs must be closer to the top of
100 the reg-stack than any input that is not implicitly popped.
102 3. It is possible that if an input dies in an insn, reload might
103 use the input reg for an output reload. Consider this example:
105 asm ("foo" : "=t" (a) : "f" (b));
107 This asm says that input B is not popped by the asm, and that
108 the asm pushes a result onto the reg-stack, ie, the stack is one
109 deeper after the asm than it was before. But, it is possible that
110 reload will think that it can use the same reg for both the input and
111 the output, if input B dies in this insn.
113 If any input operand uses the "f" constraint, all output reg
114 constraints must use the "&" earlyclobber.
116 The asm above would be written as
118 asm ("foo" : "=&t" (a) : "f" (b));
120 4. Some operands need to be in particular places on the stack. All
121 output operands fall in this category - there is no other way to
122 know which regs the outputs appear in unless the user indicates
123 this in the constraints.
125 Output operands must specifically indicate which reg an output
126 appears in after an asm. "=f" is not allowed: the operand
127 constraints must select a class with a single reg.
129 5. Output operands may not be "inserted" between existing stack regs.
130 Since no 387 opcode uses a read/write operand, all output operands
131 are dead before the asm_operands, and are pushed by the asm_operands.
132 It makes no sense to push anywhere but the top of the reg-stack.
134 Output operands must start at the top of the reg-stack: output
135 operands may not "skip" a reg.
137 6. Some asm statements may need extra stack space for internal
138 calculations. This can be guaranteed by clobbering stack registers
139 unrelated to the inputs and outputs.
141 Here are a couple of reasonable asms to want to write. This asm
142 takes one input, which is internally popped, and produces two outputs.
144 asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp));
146 This asm takes two inputs, which are popped by the fyl2xp1 opcode,
147 and replaces them with one output. The user must code the "st(1)"
148 clobber for reg-stack.c to know that fyl2xp1 pops both inputs.
150 asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)");
156 #include "coretypes.h"
161 #include "function.h"
162 #include "insn-config.h"
164 #include "hard-reg-set.h"
169 #include "basic-block.h"
174 /* We use this array to cache info about insns, because otherwise we
175 spend too much time in stack_regs_mentioned_p.
177 Indexed by insn UIDs. A value of zero is uninitialized, one indicates
178 the insn uses stack registers, two indicates the insn does not use
180 static GTY(()) varray_type stack_regs_mentioned_data;
184 #define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1)
186 /* This is the basic stack record. TOP is an index into REG[] such
187 that REG[TOP] is the top of stack. If TOP is -1 the stack is empty.
189 If TOP is -2, REG[] is not yet initialized. Stack initialization
190 consists of placing each live reg in array `reg' and setting `top'
193 REG_SET indicates which registers are live. */
195 typedef struct stack_def
197 int top; /* index to top stack element */
198 HARD_REG_SET reg_set; /* set of live registers */
199 unsigned char reg[REG_STACK_SIZE];/* register - stack mapping */
202 /* This is used to carry information about basic blocks. It is
203 attached to the AUX field of the standard CFG block. */
205 typedef struct block_info_def
207 struct stack_def stack_in; /* Input stack configuration. */
208 struct stack_def stack_out; /* Output stack configuration. */
209 HARD_REG_SET out_reg_set; /* Stack regs live on output. */
210 int done; /* True if block already converted. */
211 int predecessors; /* Number of predecessors that needs
215 #define BLOCK_INFO(B) ((block_info) (B)->aux)
217 /* Passed to change_stack to indicate where to emit insns. */
224 /* The block we're currently working on. */
225 static basic_block current_block;
227 /* This is the register file for all register after conversion. */
229 FP_mode_reg[LAST_STACK_REG+1-FIRST_STACK_REG][(int) MAX_MACHINE_MODE];
231 #define FP_MODE_REG(regno,mode) \
232 (FP_mode_reg[(regno)-FIRST_STACK_REG][(int) (mode)])
234 /* Used to initialize uninitialized registers. */
237 /* Forward declarations */
239 static int stack_regs_mentioned_p PARAMS ((rtx pat));
240 static void straighten_stack PARAMS ((rtx, stack));
241 static void pop_stack PARAMS ((stack, int));
242 static rtx *get_true_reg PARAMS ((rtx *));
244 static int check_asm_stack_operands PARAMS ((rtx));
245 static int get_asm_operand_n_inputs PARAMS ((rtx));
246 static rtx stack_result PARAMS ((tree));
247 static void replace_reg PARAMS ((rtx *, int));
248 static void remove_regno_note PARAMS ((rtx, enum reg_note,
250 static int get_hard_regnum PARAMS ((stack, rtx));
251 static rtx emit_pop_insn PARAMS ((rtx, stack, rtx,
253 static void emit_swap_insn PARAMS ((rtx, stack, rtx));
254 static void move_for_stack_reg PARAMS ((rtx, stack, rtx));
255 static int swap_rtx_condition_1 PARAMS ((rtx));
256 static int swap_rtx_condition PARAMS ((rtx));
257 static void compare_for_stack_reg PARAMS ((rtx, stack, rtx));
258 static void subst_stack_regs_pat PARAMS ((rtx, stack, rtx));
259 static void subst_asm_stack_regs PARAMS ((rtx, stack));
260 static void subst_stack_regs PARAMS ((rtx, stack));
261 static void change_stack PARAMS ((rtx, stack, stack,
263 static int convert_regs_entry PARAMS ((void));
264 static void convert_regs_exit PARAMS ((void));
265 static int convert_regs_1 PARAMS ((FILE *, basic_block));
266 static int convert_regs_2 PARAMS ((FILE *, basic_block));
267 static int convert_regs PARAMS ((FILE *));
268 static void print_stack PARAMS ((FILE *, stack));
269 static rtx next_flags_user PARAMS ((rtx));
270 static void record_label_references PARAMS ((rtx, rtx));
271 static bool compensate_edge PARAMS ((edge, FILE *));
273 /* Return nonzero if any stack register is mentioned somewhere within PAT. */
276 stack_regs_mentioned_p (pat)
282 if (STACK_REG_P (pat))
285 fmt = GET_RTX_FORMAT (GET_CODE (pat));
286 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
292 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
293 if (stack_regs_mentioned_p (XVECEXP (pat, i, j)))
296 else if (fmt[i] == 'e' && stack_regs_mentioned_p (XEXP (pat, i)))
303 /* Return nonzero if INSN mentions stacked registers, else return zero. */
306 stack_regs_mentioned (insn)
309 unsigned int uid, max;
312 if (! INSN_P (insn) || !stack_regs_mentioned_data)
315 uid = INSN_UID (insn);
316 max = VARRAY_SIZE (stack_regs_mentioned_data);
319 /* Allocate some extra size to avoid too many reallocs, but
320 do not grow too quickly. */
321 max = uid + uid / 20;
322 VARRAY_GROW (stack_regs_mentioned_data, max);
325 test = VARRAY_CHAR (stack_regs_mentioned_data, uid);
328 /* This insn has yet to be examined. Do so now. */
329 test = stack_regs_mentioned_p (PATTERN (insn)) ? 1 : 2;
330 VARRAY_CHAR (stack_regs_mentioned_data, uid) = test;
336 static rtx ix86_flags_rtx;
339 next_flags_user (insn)
342 /* Search forward looking for the first use of this value.
343 Stop at block boundaries. */
345 while (insn != current_block->end)
347 insn = NEXT_INSN (insn);
349 if (INSN_P (insn) && reg_mentioned_p (ix86_flags_rtx, PATTERN (insn)))
352 if (GET_CODE (insn) == CALL_INSN)
358 /* Reorganize the stack into ascending numbers,
362 straighten_stack (insn, regstack)
366 struct stack_def temp_stack;
369 /* If there is only a single register on the stack, then the stack is
370 already in increasing order and no reorganization is needed.
372 Similarly if the stack is empty. */
373 if (regstack->top <= 0)
376 COPY_HARD_REG_SET (temp_stack.reg_set, regstack->reg_set);
378 for (top = temp_stack.top = regstack->top; top >= 0; top--)
379 temp_stack.reg[top] = FIRST_STACK_REG + temp_stack.top - top;
381 change_stack (insn, regstack, &temp_stack, EMIT_AFTER);
384 /* Pop a register from the stack. */
387 pop_stack (regstack, regno)
391 int top = regstack->top;
393 CLEAR_HARD_REG_BIT (regstack->reg_set, regno);
395 /* If regno was not at the top of stack then adjust stack. */
396 if (regstack->reg [top] != regno)
399 for (i = regstack->top; i >= 0; i--)
400 if (regstack->reg [i] == regno)
403 for (j = i; j < top; j++)
404 regstack->reg [j] = regstack->reg [j + 1];
410 /* Convert register usage from "flat" register file usage to a "stack
411 register file. FIRST is the first insn in the function, FILE is the
414 Construct a CFG and run life analysis. Then convert each insn one
415 by one. Run a last cleanup_cfg pass, if optimizing, to eliminate
416 code duplication created when the converter inserts pop insns on
420 reg_to_stack (first, file)
428 /* Clean up previous run. */
429 stack_regs_mentioned_data = 0;
431 /* See if there is something to do. Flow analysis is quite
432 expensive so we might save some compilation time. */
433 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
434 if (regs_ever_live[i])
436 if (i > LAST_STACK_REG)
439 /* Ok, floating point instructions exist. If not optimizing,
440 build the CFG and run life analysis.
441 Also need to rebuild life when superblock scheduling is done
442 as it don't update liveness yet. */
444 || (flag_sched2_use_superblocks
445 && flag_schedule_insns_after_reload))
447 count_or_remove_death_notes (NULL, 1);
448 life_analysis (first, file, PROP_DEATH_NOTES);
450 mark_dfs_back_edges ();
452 /* Set up block info for each basic block. */
453 alloc_aux_for_blocks (sizeof (struct block_info_def));
454 FOR_EACH_BB_REVERSE (bb)
457 for (e = bb->pred; e; e = e->pred_next)
458 if (!(e->flags & EDGE_DFS_BACK)
459 && e->src != ENTRY_BLOCK_PTR)
460 BLOCK_INFO (bb)->predecessors++;
463 /* Create the replacement registers up front. */
464 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
466 enum machine_mode mode;
467 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
469 mode = GET_MODE_WIDER_MODE (mode))
470 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
471 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT);
473 mode = GET_MODE_WIDER_MODE (mode))
474 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
477 ix86_flags_rtx = gen_rtx_REG (CCmode, FLAGS_REG);
479 /* A QNaN for initializing uninitialized variables.
481 ??? We can't load from constant memory in PIC mode, because
482 we're inserting these instructions before the prologue and
483 the PIC register hasn't been set up. In that case, fall back
484 on zero, which we can get from `ldz'. */
487 nan = CONST0_RTX (SFmode);
490 nan = gen_lowpart (SFmode, GEN_INT (0x7fc00000));
491 nan = force_const_mem (SFmode, nan);
494 /* Allocate a cache for stack_regs_mentioned. */
495 max_uid = get_max_uid ();
496 VARRAY_CHAR_INIT (stack_regs_mentioned_data, max_uid + 1,
497 "stack_regs_mentioned cache");
501 free_aux_for_blocks ();
505 /* Check PAT, which is in INSN, for LABEL_REFs. Add INSN to the
506 label's chain of references, and note which insn contains each
510 record_label_references (insn, pat)
513 enum rtx_code code = GET_CODE (pat);
517 if (code == LABEL_REF)
519 rtx label = XEXP (pat, 0);
522 if (GET_CODE (label) != CODE_LABEL)
525 /* If this is an undefined label, LABEL_REFS (label) contains
527 if (INSN_UID (label) == 0)
530 /* Don't make a duplicate in the code_label's chain. */
532 for (ref = LABEL_REFS (label);
534 ref = LABEL_NEXTREF (ref))
535 if (CONTAINING_INSN (ref) == insn)
538 CONTAINING_INSN (pat) = insn;
539 LABEL_NEXTREF (pat) = LABEL_REFS (label);
540 LABEL_REFS (label) = pat;
545 fmt = GET_RTX_FORMAT (code);
546 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
549 record_label_references (insn, XEXP (pat, i));
553 for (j = 0; j < XVECLEN (pat, i); j++)
554 record_label_references (insn, XVECEXP (pat, i, j));
559 /* Return a pointer to the REG expression within PAT. If PAT is not a
560 REG, possible enclosed by a conversion rtx, return the inner part of
561 PAT that stopped the search. */
568 switch (GET_CODE (*pat))
571 /* Eliminate FP subregister accesses in favor of the
572 actual FP register in use. */
575 if (FP_REG_P (subreg = SUBREG_REG (*pat)))
577 int regno_off = subreg_regno_offset (REGNO (subreg),
581 *pat = FP_MODE_REG (REGNO (subreg) + regno_off,
590 pat = & XEXP (*pat, 0);
594 /* Set if we find any malformed asms in a block. */
595 static bool any_malformed_asm;
597 /* There are many rules that an asm statement for stack-like regs must
598 follow. Those rules are explained at the top of this file: the rule
599 numbers below refer to that explanation. */
602 check_asm_stack_operands (insn)
607 int malformed_asm = 0;
608 rtx body = PATTERN (insn);
610 char reg_used_as_output[FIRST_PSEUDO_REGISTER];
611 char implicitly_dies[FIRST_PSEUDO_REGISTER];
614 rtx *clobber_reg = 0;
615 int n_inputs, n_outputs;
617 /* Find out what the constraints require. If no constraint
618 alternative matches, this asm is malformed. */
620 constrain_operands (1);
621 alt = which_alternative;
623 preprocess_constraints ();
625 n_inputs = get_asm_operand_n_inputs (body);
626 n_outputs = recog_data.n_operands - n_inputs;
631 /* Avoid further trouble with this insn. */
632 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
636 /* Strip SUBREGs here to make the following code simpler. */
637 for (i = 0; i < recog_data.n_operands; i++)
638 if (GET_CODE (recog_data.operand[i]) == SUBREG
639 && GET_CODE (SUBREG_REG (recog_data.operand[i])) == REG)
640 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
642 /* Set up CLOBBER_REG. */
646 if (GET_CODE (body) == PARALLEL)
648 clobber_reg = (rtx *) alloca (XVECLEN (body, 0) * sizeof (rtx));
650 for (i = 0; i < XVECLEN (body, 0); i++)
651 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
653 rtx clobber = XVECEXP (body, 0, i);
654 rtx reg = XEXP (clobber, 0);
656 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
657 reg = SUBREG_REG (reg);
659 if (STACK_REG_P (reg))
661 clobber_reg[n_clobbers] = reg;
667 /* Enforce rule #4: Output operands must specifically indicate which
668 reg an output appears in after an asm. "=f" is not allowed: the
669 operand constraints must select a class with a single reg.
671 Also enforce rule #5: Output operands must start at the top of
672 the reg-stack: output operands may not "skip" a reg. */
674 memset (reg_used_as_output, 0, sizeof (reg_used_as_output));
675 for (i = 0; i < n_outputs; i++)
676 if (STACK_REG_P (recog_data.operand[i]))
678 if (reg_class_size[(int) recog_op_alt[i][alt].class] != 1)
680 error_for_asm (insn, "output constraint %d must specify a single register", i);
687 for (j = 0; j < n_clobbers; j++)
688 if (REGNO (recog_data.operand[i]) == REGNO (clobber_reg[j]))
690 error_for_asm (insn, "output constraint %d cannot be specified together with \"%s\" clobber",
691 i, reg_names [REGNO (clobber_reg[j])]);
696 reg_used_as_output[REGNO (recog_data.operand[i])] = 1;
701 /* Search for first non-popped reg. */
702 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
703 if (! reg_used_as_output[i])
706 /* If there are any other popped regs, that's an error. */
707 for (; i < LAST_STACK_REG + 1; i++)
708 if (reg_used_as_output[i])
711 if (i != LAST_STACK_REG + 1)
713 error_for_asm (insn, "output regs must be grouped at top of stack");
717 /* Enforce rule #2: All implicitly popped input regs must be closer
718 to the top of the reg-stack than any input that is not implicitly
721 memset (implicitly_dies, 0, sizeof (implicitly_dies));
722 for (i = n_outputs; i < n_outputs + n_inputs; i++)
723 if (STACK_REG_P (recog_data.operand[i]))
725 /* An input reg is implicitly popped if it is tied to an
726 output, or if there is a CLOBBER for it. */
729 for (j = 0; j < n_clobbers; j++)
730 if (operands_match_p (clobber_reg[j], recog_data.operand[i]))
733 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0)
734 implicitly_dies[REGNO (recog_data.operand[i])] = 1;
737 /* Search for first non-popped reg. */
738 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
739 if (! implicitly_dies[i])
742 /* If there are any other popped regs, that's an error. */
743 for (; i < LAST_STACK_REG + 1; i++)
744 if (implicitly_dies[i])
747 if (i != LAST_STACK_REG + 1)
750 "implicitly popped regs must be grouped at top of stack");
754 /* Enforce rule #3: If any input operand uses the "f" constraint, all
755 output constraints must use the "&" earlyclobber.
757 ??? Detect this more deterministically by having constrain_asm_operands
758 record any earlyclobber. */
760 for (i = n_outputs; i < n_outputs + n_inputs; i++)
761 if (recog_op_alt[i][alt].matches == -1)
765 for (j = 0; j < n_outputs; j++)
766 if (operands_match_p (recog_data.operand[j], recog_data.operand[i]))
769 "output operand %d must use `&' constraint", j);
776 /* Avoid further trouble with this insn. */
777 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
778 any_malformed_asm = true;
785 /* Calculate the number of inputs and outputs in BODY, an
786 asm_operands. N_OPERANDS is the total number of operands, and
787 N_INPUTS and N_OUTPUTS are pointers to ints into which the results are
791 get_asm_operand_n_inputs (body)
794 if (GET_CODE (body) == SET && GET_CODE (SET_SRC (body)) == ASM_OPERANDS)
795 return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (body));
797 else if (GET_CODE (body) == ASM_OPERANDS)
798 return ASM_OPERANDS_INPUT_LENGTH (body);
800 else if (GET_CODE (body) == PARALLEL
801 && GET_CODE (XVECEXP (body, 0, 0)) == SET)
802 return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (XVECEXP (body, 0, 0)));
804 else if (GET_CODE (body) == PARALLEL
805 && GET_CODE (XVECEXP (body, 0, 0)) == ASM_OPERANDS)
806 return ASM_OPERANDS_INPUT_LENGTH (XVECEXP (body, 0, 0));
811 /* If current function returns its result in an fp stack register,
812 return the REG. Otherwise, return 0. */
820 /* If the value is supposed to be returned in memory, then clearly
821 it is not returned in a stack register. */
822 if (aggregate_value_p (DECL_RESULT (decl)))
825 result = DECL_RTL_IF_SET (DECL_RESULT (decl));
828 #ifdef FUNCTION_OUTGOING_VALUE
830 = FUNCTION_OUTGOING_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl);
832 result = FUNCTION_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl);
836 return result != 0 && STACK_REG_P (result) ? result : 0;
841 * This section deals with stack register substitution, and forms the second
845 /* Replace REG, which is a pointer to a stack reg RTX, with an RTX for
846 the desired hard REGNO. */
849 replace_reg (reg, regno)
853 if (regno < FIRST_STACK_REG || regno > LAST_STACK_REG
854 || ! STACK_REG_P (*reg))
857 switch (GET_MODE_CLASS (GET_MODE (*reg)))
861 case MODE_COMPLEX_FLOAT:;
864 *reg = FP_MODE_REG (regno, GET_MODE (*reg));
867 /* Remove a note of type NOTE, which must be found, for register
868 number REGNO from INSN. Remove only one such note. */
871 remove_regno_note (insn, note, regno)
876 rtx *note_link, this;
878 note_link = ®_NOTES (insn);
879 for (this = *note_link; this; this = XEXP (this, 1))
880 if (REG_NOTE_KIND (this) == note
881 && REG_P (XEXP (this, 0)) && REGNO (XEXP (this, 0)) == regno)
883 *note_link = XEXP (this, 1);
887 note_link = &XEXP (this, 1);
892 /* Find the hard register number of virtual register REG in REGSTACK.
893 The hard register number is relative to the top of the stack. -1 is
894 returned if the register is not found. */
897 get_hard_regnum (regstack, reg)
903 if (! STACK_REG_P (reg))
906 for (i = regstack->top; i >= 0; i--)
907 if (regstack->reg[i] == REGNO (reg))
910 return i >= 0 ? (FIRST_STACK_REG + regstack->top - i) : -1;
913 /* Emit an insn to pop virtual register REG before or after INSN.
914 REGSTACK is the stack state after INSN and is updated to reflect this
915 pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn
916 is represented as a SET whose destination is the register to be popped
917 and source is the top of stack. A death note for the top of stack
918 cases the movdf pattern to pop. */
921 emit_pop_insn (insn, regstack, reg, where)
925 enum emit_where where;
927 rtx pop_insn, pop_rtx;
930 /* For complex types take care to pop both halves. These may survive in
931 CLOBBER and USE expressions. */
932 if (COMPLEX_MODE_P (GET_MODE (reg)))
934 rtx reg1 = FP_MODE_REG (REGNO (reg), DFmode);
935 rtx reg2 = FP_MODE_REG (REGNO (reg) + 1, DFmode);
938 if (get_hard_regnum (regstack, reg1) >= 0)
939 pop_insn = emit_pop_insn (insn, regstack, reg1, where);
940 if (get_hard_regnum (regstack, reg2) >= 0)
941 pop_insn = emit_pop_insn (insn, regstack, reg2, where);
947 hard_regno = get_hard_regnum (regstack, reg);
949 if (hard_regno < FIRST_STACK_REG)
952 pop_rtx = gen_rtx_SET (VOIDmode, FP_MODE_REG (hard_regno, DFmode),
953 FP_MODE_REG (FIRST_STACK_REG, DFmode));
955 if (where == EMIT_AFTER)
956 pop_insn = emit_insn_after (pop_rtx, insn);
958 pop_insn = emit_insn_before (pop_rtx, insn);
961 = gen_rtx_EXPR_LIST (REG_DEAD, FP_MODE_REG (FIRST_STACK_REG, DFmode),
962 REG_NOTES (pop_insn));
964 regstack->reg[regstack->top - (hard_regno - FIRST_STACK_REG)]
965 = regstack->reg[regstack->top];
967 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (reg));
972 /* Emit an insn before or after INSN to swap virtual register REG with
973 the top of stack. REGSTACK is the stack state before the swap, and
974 is updated to reflect the swap. A swap insn is represented as a
975 PARALLEL of two patterns: each pattern moves one reg to the other.
977 If REG is already at the top of the stack, no insn is emitted. */
980 emit_swap_insn (insn, regstack, reg)
987 int tmp, other_reg; /* swap regno temps */
988 rtx i1; /* the stack-reg insn prior to INSN */
989 rtx i1set = NULL_RTX; /* the SET rtx within I1 */
991 hard_regno = get_hard_regnum (regstack, reg);
993 if (hard_regno < FIRST_STACK_REG)
995 if (hard_regno == FIRST_STACK_REG)
998 other_reg = regstack->top - (hard_regno - FIRST_STACK_REG);
1000 tmp = regstack->reg[other_reg];
1001 regstack->reg[other_reg] = regstack->reg[regstack->top];
1002 regstack->reg[regstack->top] = tmp;
1004 /* Find the previous insn involving stack regs, but don't pass a
1007 if (current_block && insn != current_block->head)
1009 rtx tmp = PREV_INSN (insn);
1010 rtx limit = PREV_INSN (current_block->head);
1011 while (tmp != limit)
1013 if (GET_CODE (tmp) == CODE_LABEL
1014 || GET_CODE (tmp) == CALL_INSN
1015 || NOTE_INSN_BASIC_BLOCK_P (tmp)
1016 || (GET_CODE (tmp) == INSN
1017 && stack_regs_mentioned (tmp)))
1022 tmp = PREV_INSN (tmp);
1027 && (i1set = single_set (i1)) != NULL_RTX)
1029 rtx i1src = *get_true_reg (&SET_SRC (i1set));
1030 rtx i1dest = *get_true_reg (&SET_DEST (i1set));
1032 /* If the previous register stack push was from the reg we are to
1033 swap with, omit the swap. */
1035 if (GET_CODE (i1dest) == REG && REGNO (i1dest) == FIRST_STACK_REG
1036 && GET_CODE (i1src) == REG
1037 && REGNO (i1src) == (unsigned) hard_regno - 1
1038 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
1041 /* If the previous insn wrote to the reg we are to swap with,
1044 if (GET_CODE (i1dest) == REG && REGNO (i1dest) == (unsigned) hard_regno
1045 && GET_CODE (i1src) == REG && REGNO (i1src) == FIRST_STACK_REG
1046 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
1050 swap_rtx = gen_swapxf (FP_MODE_REG (hard_regno, XFmode),
1051 FP_MODE_REG (FIRST_STACK_REG, XFmode));
1054 emit_insn_after (swap_rtx, i1);
1055 else if (current_block)
1056 emit_insn_before (swap_rtx, current_block->head);
1058 emit_insn_before (swap_rtx, insn);
1061 /* Handle a move to or from a stack register in PAT, which is in INSN.
1062 REGSTACK is the current stack. */
1065 move_for_stack_reg (insn, regstack, pat)
1070 rtx *psrc = get_true_reg (&SET_SRC (pat));
1071 rtx *pdest = get_true_reg (&SET_DEST (pat));
1075 src = *psrc; dest = *pdest;
1077 if (STACK_REG_P (src) && STACK_REG_P (dest))
1079 /* Write from one stack reg to another. If SRC dies here, then
1080 just change the register mapping and delete the insn. */
1082 note = find_regno_note (insn, REG_DEAD, REGNO (src));
1087 /* If this is a no-op move, there must not be a REG_DEAD note. */
1088 if (REGNO (src) == REGNO (dest))
1091 for (i = regstack->top; i >= 0; i--)
1092 if (regstack->reg[i] == REGNO (src))
1095 /* The source must be live, and the dest must be dead. */
1096 if (i < 0 || get_hard_regnum (regstack, dest) >= FIRST_STACK_REG)
1099 /* It is possible that the dest is unused after this insn.
1100 If so, just pop the src. */
1102 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
1104 emit_pop_insn (insn, regstack, src, EMIT_AFTER);
1110 regstack->reg[i] = REGNO (dest);
1112 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1113 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
1120 /* The source reg does not die. */
1122 /* If this appears to be a no-op move, delete it, or else it
1123 will confuse the machine description output patterns. But if
1124 it is REG_UNUSED, we must pop the reg now, as per-insn processing
1125 for REG_UNUSED will not work for deleted insns. */
1127 if (REGNO (src) == REGNO (dest))
1129 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
1130 emit_pop_insn (insn, regstack, dest, EMIT_AFTER);
1136 /* The destination ought to be dead. */
1137 if (get_hard_regnum (regstack, dest) >= FIRST_STACK_REG)
1140 replace_reg (psrc, get_hard_regnum (regstack, src));
1142 regstack->reg[++regstack->top] = REGNO (dest);
1143 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1144 replace_reg (pdest, FIRST_STACK_REG);
1146 else if (STACK_REG_P (src))
1148 /* Save from a stack reg to MEM, or possibly integer reg. Since
1149 only top of stack may be saved, emit an exchange first if
1152 emit_swap_insn (insn, regstack, src);
1154 note = find_regno_note (insn, REG_DEAD, REGNO (src));
1157 replace_reg (&XEXP (note, 0), FIRST_STACK_REG);
1159 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
1161 else if ((GET_MODE (src) == XFmode || GET_MODE (src) == TFmode)
1162 && regstack->top < REG_STACK_SIZE - 1)
1164 /* A 387 cannot write an XFmode value to a MEM without
1165 clobbering the source reg. The output code can handle
1166 this by reading back the value from the MEM.
1167 But it is more efficient to use a temp register if one is
1168 available. Push the source value here if the register
1169 stack is not full, and then write the value to memory via
1171 rtx push_rtx, push_insn;
1172 rtx top_stack_reg = FP_MODE_REG (FIRST_STACK_REG, GET_MODE (src));
1174 if (GET_MODE (src) == TFmode)
1175 push_rtx = gen_movtf (top_stack_reg, top_stack_reg);
1177 push_rtx = gen_movxf (top_stack_reg, top_stack_reg);
1178 push_insn = emit_insn_before (push_rtx, insn);
1179 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_DEAD, top_stack_reg,
1183 replace_reg (psrc, FIRST_STACK_REG);
1185 else if (STACK_REG_P (dest))
1187 /* Load from MEM, or possibly integer REG or constant, into the
1188 stack regs. The actual target is always the top of the
1189 stack. The stack mapping is changed to reflect that DEST is
1190 now at top of stack. */
1192 /* The destination ought to be dead. */
1193 if (get_hard_regnum (regstack, dest) >= FIRST_STACK_REG)
1196 if (regstack->top >= REG_STACK_SIZE)
1199 regstack->reg[++regstack->top] = REGNO (dest);
1200 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1201 replace_reg (pdest, FIRST_STACK_REG);
1207 /* Swap the condition on a branch, if there is one. Return true if we
1208 found a condition to swap. False if the condition was not used as
1212 swap_rtx_condition_1 (pat)
1218 if (GET_RTX_CLASS (GET_CODE (pat)) == '<')
1220 PUT_CODE (pat, swap_condition (GET_CODE (pat)));
1225 fmt = GET_RTX_FORMAT (GET_CODE (pat));
1226 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
1232 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
1233 r |= swap_rtx_condition_1 (XVECEXP (pat, i, j));
1235 else if (fmt[i] == 'e')
1236 r |= swap_rtx_condition_1 (XEXP (pat, i));
1244 swap_rtx_condition (insn)
1247 rtx pat = PATTERN (insn);
1249 /* We're looking for a single set to cc0 or an HImode temporary. */
1251 if (GET_CODE (pat) == SET
1252 && GET_CODE (SET_DEST (pat)) == REG
1253 && REGNO (SET_DEST (pat)) == FLAGS_REG)
1255 insn = next_flags_user (insn);
1256 if (insn == NULL_RTX)
1258 pat = PATTERN (insn);
1261 /* See if this is, or ends in, a fnstsw, aka unspec 9. If so, we're
1262 not doing anything with the cc value right now. We may be able to
1263 search for one though. */
1265 if (GET_CODE (pat) == SET
1266 && GET_CODE (SET_SRC (pat)) == UNSPEC
1267 && XINT (SET_SRC (pat), 1) == UNSPEC_FNSTSW)
1269 rtx dest = SET_DEST (pat);
1271 /* Search forward looking for the first use of this value.
1272 Stop at block boundaries. */
1273 while (insn != current_block->end)
1275 insn = NEXT_INSN (insn);
1276 if (INSN_P (insn) && reg_mentioned_p (dest, insn))
1278 if (GET_CODE (insn) == CALL_INSN)
1282 /* So we've found the insn using this value. If it is anything
1283 other than sahf, aka unspec 10, or the value does not die
1284 (meaning we'd have to search further), then we must give up. */
1285 pat = PATTERN (insn);
1286 if (GET_CODE (pat) != SET
1287 || GET_CODE (SET_SRC (pat)) != UNSPEC
1288 || XINT (SET_SRC (pat), 1) != UNSPEC_SAHF
1289 || ! dead_or_set_p (insn, dest))
1292 /* Now we are prepared to handle this as a normal cc0 setter. */
1293 insn = next_flags_user (insn);
1294 if (insn == NULL_RTX)
1296 pat = PATTERN (insn);
1299 if (swap_rtx_condition_1 (pat))
1302 INSN_CODE (insn) = -1;
1303 if (recog_memoized (insn) == -1)
1305 /* In case the flags don't die here, recurse to try fix
1306 following user too. */
1307 else if (! dead_or_set_p (insn, ix86_flags_rtx))
1309 insn = next_flags_user (insn);
1310 if (!insn || !swap_rtx_condition (insn))
1315 swap_rtx_condition_1 (pat);
1323 /* Handle a comparison. Special care needs to be taken to avoid
1324 causing comparisons that a 387 cannot do correctly, such as EQ.
1326 Also, a pop insn may need to be emitted. The 387 does have an
1327 `fcompp' insn that can pop two regs, but it is sometimes too expensive
1328 to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to
1332 compare_for_stack_reg (insn, regstack, pat_src)
1338 rtx src1_note, src2_note;
1341 src1 = get_true_reg (&XEXP (pat_src, 0));
1342 src2 = get_true_reg (&XEXP (pat_src, 1));
1343 flags_user = next_flags_user (insn);
1345 /* ??? If fxch turns out to be cheaper than fstp, give priority to
1346 registers that die in this insn - move those to stack top first. */
1347 if ((! STACK_REG_P (*src1)
1348 || (STACK_REG_P (*src2)
1349 && get_hard_regnum (regstack, *src2) == FIRST_STACK_REG))
1350 && swap_rtx_condition (insn))
1353 temp = XEXP (pat_src, 0);
1354 XEXP (pat_src, 0) = XEXP (pat_src, 1);
1355 XEXP (pat_src, 1) = temp;
1357 src1 = get_true_reg (&XEXP (pat_src, 0));
1358 src2 = get_true_reg (&XEXP (pat_src, 1));
1360 INSN_CODE (insn) = -1;
1363 /* We will fix any death note later. */
1365 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1367 if (STACK_REG_P (*src2))
1368 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1370 src2_note = NULL_RTX;
1372 emit_swap_insn (insn, regstack, *src1);
1374 replace_reg (src1, FIRST_STACK_REG);
1376 if (STACK_REG_P (*src2))
1377 replace_reg (src2, get_hard_regnum (regstack, *src2));
1381 pop_stack (regstack, REGNO (XEXP (src1_note, 0)));
1382 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1385 /* If the second operand dies, handle that. But if the operands are
1386 the same stack register, don't bother, because only one death is
1387 needed, and it was just handled. */
1390 && ! (STACK_REG_P (*src1) && STACK_REG_P (*src2)
1391 && REGNO (*src1) == REGNO (*src2)))
1393 /* As a special case, two regs may die in this insn if src2 is
1394 next to top of stack and the top of stack also dies. Since
1395 we have already popped src1, "next to top of stack" is really
1396 at top (FIRST_STACK_REG) now. */
1398 if (get_hard_regnum (regstack, XEXP (src2_note, 0)) == FIRST_STACK_REG
1401 pop_stack (regstack, REGNO (XEXP (src2_note, 0)));
1402 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1);
1406 /* The 386 can only represent death of the first operand in
1407 the case handled above. In all other cases, emit a separate
1408 pop and remove the death note from here. */
1410 /* link_cc0_insns (insn); */
1412 remove_regno_note (insn, REG_DEAD, REGNO (XEXP (src2_note, 0)));
1414 emit_pop_insn (insn, regstack, XEXP (src2_note, 0),
1420 /* Substitute new registers in PAT, which is part of INSN. REGSTACK
1421 is the current register layout. */
1424 subst_stack_regs_pat (insn, regstack, pat)
1431 switch (GET_CODE (pat))
1434 /* Deaths in USE insns can happen in non optimizing compilation.
1435 Handle them by popping the dying register. */
1436 src = get_true_reg (&XEXP (pat, 0));
1437 if (STACK_REG_P (*src)
1438 && find_regno_note (insn, REG_DEAD, REGNO (*src)))
1440 emit_pop_insn (insn, regstack, *src, EMIT_AFTER);
1443 /* ??? Uninitialized USE should not happen. */
1444 else if (get_hard_regnum (regstack, *src) == -1)
1452 dest = get_true_reg (&XEXP (pat, 0));
1453 if (STACK_REG_P (*dest))
1455 note = find_reg_note (insn, REG_DEAD, *dest);
1457 if (pat != PATTERN (insn))
1459 /* The fix_truncdi_1 pattern wants to be able to allocate
1460 it's own scratch register. It does this by clobbering
1461 an fp reg so that it is assured of an empty reg-stack
1462 register. If the register is live, kill it now.
1463 Remove the DEAD/UNUSED note so we don't try to kill it
1467 emit_pop_insn (insn, regstack, *dest, EMIT_BEFORE);
1470 note = find_reg_note (insn, REG_UNUSED, *dest);
1474 remove_note (insn, note);
1475 replace_reg (dest, LAST_STACK_REG);
1479 /* A top-level clobber with no REG_DEAD, and no hard-regnum
1480 indicates an uninitialized value. Because reload removed
1481 all other clobbers, this must be due to a function
1482 returning without a value. Load up a NaN. */
1485 && get_hard_regnum (regstack, *dest) == -1)
1487 pat = gen_rtx_SET (VOIDmode,
1488 FP_MODE_REG (REGNO (*dest), SFmode),
1490 PATTERN (insn) = pat;
1491 move_for_stack_reg (insn, regstack, pat);
1493 if (! note && COMPLEX_MODE_P (GET_MODE (*dest))
1494 && get_hard_regnum (regstack, FP_MODE_REG (REGNO (*dest), DFmode)) == -1)
1496 pat = gen_rtx_SET (VOIDmode,
1497 FP_MODE_REG (REGNO (*dest) + 1, SFmode),
1499 PATTERN (insn) = pat;
1500 move_for_stack_reg (insn, regstack, pat);
1509 rtx *src1 = (rtx *) 0, *src2;
1510 rtx src1_note, src2_note;
1513 dest = get_true_reg (&SET_DEST (pat));
1514 src = get_true_reg (&SET_SRC (pat));
1515 pat_src = SET_SRC (pat);
1517 /* See if this is a `movM' pattern, and handle elsewhere if so. */
1518 if (STACK_REG_P (*src)
1519 || (STACK_REG_P (*dest)
1520 && (GET_CODE (*src) == REG || GET_CODE (*src) == MEM
1521 || GET_CODE (*src) == CONST_DOUBLE)))
1523 move_for_stack_reg (insn, regstack, pat);
1527 switch (GET_CODE (pat_src))
1530 compare_for_stack_reg (insn, regstack, pat_src);
1536 for (count = HARD_REGNO_NREGS (REGNO (*dest), GET_MODE (*dest));
1539 regstack->reg[++regstack->top] = REGNO (*dest) + count;
1540 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest) + count);
1543 replace_reg (dest, FIRST_STACK_REG);
1547 /* This is a `tstM2' case. */
1548 if (*dest != cc0_rtx)
1554 case FLOAT_TRUNCATE:
1558 /* These insns only operate on the top of the stack. DEST might
1559 be cc0_rtx if we're processing a tstM pattern. Also, it's
1560 possible that the tstM case results in a REG_DEAD note on the
1564 src1 = get_true_reg (&XEXP (pat_src, 0));
1566 emit_swap_insn (insn, regstack, *src1);
1568 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1570 if (STACK_REG_P (*dest))
1571 replace_reg (dest, FIRST_STACK_REG);
1575 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1577 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
1580 replace_reg (src1, FIRST_STACK_REG);
1585 /* On i386, reversed forms of subM3 and divM3 exist for
1586 MODE_FLOAT, so the same code that works for addM3 and mulM3
1590 /* These insns can accept the top of stack as a destination
1591 from a stack reg or mem, or can use the top of stack as a
1592 source and some other stack register (possibly top of stack)
1593 as a destination. */
1595 src1 = get_true_reg (&XEXP (pat_src, 0));
1596 src2 = get_true_reg (&XEXP (pat_src, 1));
1598 /* We will fix any death note later. */
1600 if (STACK_REG_P (*src1))
1601 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1603 src1_note = NULL_RTX;
1604 if (STACK_REG_P (*src2))
1605 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1607 src2_note = NULL_RTX;
1609 /* If either operand is not a stack register, then the dest
1610 must be top of stack. */
1612 if (! STACK_REG_P (*src1) || ! STACK_REG_P (*src2))
1613 emit_swap_insn (insn, regstack, *dest);
1616 /* Both operands are REG. If neither operand is already
1617 at the top of stack, choose to make the one that is the dest
1618 the new top of stack. */
1620 int src1_hard_regnum, src2_hard_regnum;
1622 src1_hard_regnum = get_hard_regnum (regstack, *src1);
1623 src2_hard_regnum = get_hard_regnum (regstack, *src2);
1624 if (src1_hard_regnum == -1 || src2_hard_regnum == -1)
1627 if (src1_hard_regnum != FIRST_STACK_REG
1628 && src2_hard_regnum != FIRST_STACK_REG)
1629 emit_swap_insn (insn, regstack, *dest);
1632 if (STACK_REG_P (*src1))
1633 replace_reg (src1, get_hard_regnum (regstack, *src1));
1634 if (STACK_REG_P (*src2))
1635 replace_reg (src2, get_hard_regnum (regstack, *src2));
1639 rtx src1_reg = XEXP (src1_note, 0);
1641 /* If the register that dies is at the top of stack, then
1642 the destination is somewhere else - merely substitute it.
1643 But if the reg that dies is not at top of stack, then
1644 move the top of stack to the dead reg, as though we had
1645 done the insn and then a store-with-pop. */
1647 if (REGNO (src1_reg) == regstack->reg[regstack->top])
1649 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1650 replace_reg (dest, get_hard_regnum (regstack, *dest));
1654 int regno = get_hard_regnum (regstack, src1_reg);
1656 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1657 replace_reg (dest, regno);
1659 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
1660 = regstack->reg[regstack->top];
1663 CLEAR_HARD_REG_BIT (regstack->reg_set,
1664 REGNO (XEXP (src1_note, 0)));
1665 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1670 rtx src2_reg = XEXP (src2_note, 0);
1671 if (REGNO (src2_reg) == regstack->reg[regstack->top])
1673 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1674 replace_reg (dest, get_hard_regnum (regstack, *dest));
1678 int regno = get_hard_regnum (regstack, src2_reg);
1680 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1681 replace_reg (dest, regno);
1683 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
1684 = regstack->reg[regstack->top];
1687 CLEAR_HARD_REG_BIT (regstack->reg_set,
1688 REGNO (XEXP (src2_note, 0)));
1689 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG);
1694 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1695 replace_reg (dest, get_hard_regnum (regstack, *dest));
1698 /* Keep operand 1 matching with destination. */
1699 if (GET_RTX_CLASS (GET_CODE (pat_src)) == 'c'
1700 && REG_P (*src1) && REG_P (*src2)
1701 && REGNO (*src1) != REGNO (*dest))
1703 int tmp = REGNO (*src1);
1704 replace_reg (src1, REGNO (*src2));
1705 replace_reg (src2, tmp);
1710 switch (XINT (pat_src, 1))
1714 /* These insns only operate on the top of the stack. */
1716 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1718 emit_swap_insn (insn, regstack, *src1);
1720 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1722 if (STACK_REG_P (*dest))
1723 replace_reg (dest, FIRST_STACK_REG);
1727 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1729 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
1732 replace_reg (src1, FIRST_STACK_REG);
1737 /* These insns operate on the top two stack slots. */
1739 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1740 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
1742 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1743 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1746 struct stack_def temp_stack;
1747 int regno, j, k, temp;
1749 temp_stack = *regstack;
1751 /* Place operand 1 at the top of stack. */
1752 regno = get_hard_regnum (&temp_stack, *src1);
1755 if (regno != FIRST_STACK_REG)
1757 k = temp_stack.top - (regno - FIRST_STACK_REG);
1760 temp = temp_stack.reg[k];
1761 temp_stack.reg[k] = temp_stack.reg[j];
1762 temp_stack.reg[j] = temp;
1765 /* Place operand 2 next on the stack. */
1766 regno = get_hard_regnum (&temp_stack, *src2);
1769 if (regno != FIRST_STACK_REG + 1)
1771 k = temp_stack.top - (regno - FIRST_STACK_REG);
1772 j = temp_stack.top - 1;
1774 temp = temp_stack.reg[k];
1775 temp_stack.reg[k] = temp_stack.reg[j];
1776 temp_stack.reg[j] = temp;
1779 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
1782 replace_reg (src1, FIRST_STACK_REG);
1783 replace_reg (src2, FIRST_STACK_REG + 1);
1786 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1788 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1);
1790 /* Pop both input operands from the stack. */
1791 CLEAR_HARD_REG_BIT (regstack->reg_set,
1792 regstack->reg[regstack->top]);
1793 CLEAR_HARD_REG_BIT (regstack->reg_set,
1794 regstack->reg[regstack->top - 1]);
1797 /* Push the result back onto the stack. */
1798 regstack->reg[++regstack->top] = REGNO (*dest);
1799 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1800 replace_reg (dest, FIRST_STACK_REG);
1804 /* (unspec [(unspec [(compare)] UNSPEC_FNSTSW)] UNSPEC_SAHF)
1805 The combination matches the PPRO fcomi instruction. */
1807 pat_src = XVECEXP (pat_src, 0, 0);
1808 if (GET_CODE (pat_src) != UNSPEC
1809 || XINT (pat_src, 1) != UNSPEC_FNSTSW)
1814 /* Combined fcomp+fnstsw generated for doing well with
1815 CSE. When optimizing this would have been broken
1818 pat_src = XVECEXP (pat_src, 0, 0);
1819 if (GET_CODE (pat_src) != COMPARE)
1822 compare_for_stack_reg (insn, regstack, pat_src);
1831 /* This insn requires the top of stack to be the destination. */
1833 src1 = get_true_reg (&XEXP (pat_src, 1));
1834 src2 = get_true_reg (&XEXP (pat_src, 2));
1836 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1837 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1839 /* If the comparison operator is an FP comparison operator,
1840 it is handled correctly by compare_for_stack_reg () who
1841 will move the destination to the top of stack. But if the
1842 comparison operator is not an FP comparison operator, we
1843 have to handle it here. */
1844 if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG
1845 && REGNO (*dest) != regstack->reg[regstack->top])
1847 /* In case one of operands is the top of stack and the operands
1848 dies, it is safe to make it the destination operand by
1849 reversing the direction of cmove and avoid fxch. */
1850 if ((REGNO (*src1) == regstack->reg[regstack->top]
1852 || (REGNO (*src2) == regstack->reg[regstack->top]
1855 int idx1 = (get_hard_regnum (regstack, *src1)
1857 int idx2 = (get_hard_regnum (regstack, *src2)
1860 /* Make reg-stack believe that the operands are already
1861 swapped on the stack */
1862 regstack->reg[regstack->top - idx1] = REGNO (*src2);
1863 regstack->reg[regstack->top - idx2] = REGNO (*src1);
1865 /* Reverse condition to compensate the operand swap.
1866 i386 do have comparison always reversible. */
1867 PUT_CODE (XEXP (pat_src, 0),
1868 reversed_comparison_code (XEXP (pat_src, 0), insn));
1871 emit_swap_insn (insn, regstack, *dest);
1879 src_note[1] = src1_note;
1880 src_note[2] = src2_note;
1882 if (STACK_REG_P (*src1))
1883 replace_reg (src1, get_hard_regnum (regstack, *src1));
1884 if (STACK_REG_P (*src2))
1885 replace_reg (src2, get_hard_regnum (regstack, *src2));
1887 for (i = 1; i <= 2; i++)
1890 int regno = REGNO (XEXP (src_note[i], 0));
1892 /* If the register that dies is not at the top of
1893 stack, then move the top of stack to the dead reg */
1894 if (regno != regstack->reg[regstack->top])
1896 remove_regno_note (insn, REG_DEAD, regno);
1897 emit_pop_insn (insn, regstack, XEXP (src_note[i], 0),
1901 /* Top of stack never dies, as it is the
1907 /* Make dest the top of stack. Add dest to regstack if
1909 if (get_hard_regnum (regstack, *dest) < FIRST_STACK_REG)
1910 regstack->reg[++regstack->top] = REGNO (*dest);
1911 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1912 replace_reg (dest, FIRST_STACK_REG);
1926 /* Substitute hard regnums for any stack regs in INSN, which has
1927 N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info
1928 before the insn, and is updated with changes made here.
1930 There are several requirements and assumptions about the use of
1931 stack-like regs in asm statements. These rules are enforced by
1932 record_asm_stack_regs; see comments there for details. Any
1933 asm_operands left in the RTL at this point may be assume to meet the
1934 requirements, since record_asm_stack_regs removes any problem asm. */
1937 subst_asm_stack_regs (insn, regstack)
1941 rtx body = PATTERN (insn);
1944 rtx *note_reg; /* Array of note contents */
1945 rtx **note_loc; /* Address of REG field of each note */
1946 enum reg_note *note_kind; /* The type of each note */
1948 rtx *clobber_reg = 0;
1949 rtx **clobber_loc = 0;
1951 struct stack_def temp_stack;
1956 int n_inputs, n_outputs;
1958 if (! check_asm_stack_operands (insn))
1961 /* Find out what the constraints required. If no constraint
1962 alternative matches, that is a compiler bug: we should have caught
1963 such an insn in check_asm_stack_operands. */
1964 extract_insn (insn);
1965 constrain_operands (1);
1966 alt = which_alternative;
1968 preprocess_constraints ();
1970 n_inputs = get_asm_operand_n_inputs (body);
1971 n_outputs = recog_data.n_operands - n_inputs;
1976 /* Strip SUBREGs here to make the following code simpler. */
1977 for (i = 0; i < recog_data.n_operands; i++)
1978 if (GET_CODE (recog_data.operand[i]) == SUBREG
1979 && GET_CODE (SUBREG_REG (recog_data.operand[i])) == REG)
1981 recog_data.operand_loc[i] = & SUBREG_REG (recog_data.operand[i]);
1982 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
1985 /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */
1987 for (i = 0, note = REG_NOTES (insn); note; note = XEXP (note, 1))
1990 note_reg = (rtx *) alloca (i * sizeof (rtx));
1991 note_loc = (rtx **) alloca (i * sizeof (rtx *));
1992 note_kind = (enum reg_note *) alloca (i * sizeof (enum reg_note));
1995 for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
1997 rtx reg = XEXP (note, 0);
1998 rtx *loc = & XEXP (note, 0);
2000 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
2002 loc = & SUBREG_REG (reg);
2003 reg = SUBREG_REG (reg);
2006 if (STACK_REG_P (reg)
2007 && (REG_NOTE_KIND (note) == REG_DEAD
2008 || REG_NOTE_KIND (note) == REG_UNUSED))
2010 note_reg[n_notes] = reg;
2011 note_loc[n_notes] = loc;
2012 note_kind[n_notes] = REG_NOTE_KIND (note);
2017 /* Set up CLOBBER_REG and CLOBBER_LOC. */
2021 if (GET_CODE (body) == PARALLEL)
2023 clobber_reg = (rtx *) alloca (XVECLEN (body, 0) * sizeof (rtx));
2024 clobber_loc = (rtx **) alloca (XVECLEN (body, 0) * sizeof (rtx *));
2026 for (i = 0; i < XVECLEN (body, 0); i++)
2027 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
2029 rtx clobber = XVECEXP (body, 0, i);
2030 rtx reg = XEXP (clobber, 0);
2031 rtx *loc = & XEXP (clobber, 0);
2033 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
2035 loc = & SUBREG_REG (reg);
2036 reg = SUBREG_REG (reg);
2039 if (STACK_REG_P (reg))
2041 clobber_reg[n_clobbers] = reg;
2042 clobber_loc[n_clobbers] = loc;
2048 temp_stack = *regstack;
2050 /* Put the input regs into the desired place in TEMP_STACK. */
2052 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2053 if (STACK_REG_P (recog_data.operand[i])
2054 && reg_class_subset_p (recog_op_alt[i][alt].class,
2056 && recog_op_alt[i][alt].class != FLOAT_REGS)
2058 /* If an operand needs to be in a particular reg in
2059 FLOAT_REGS, the constraint was either 't' or 'u'. Since
2060 these constraints are for single register classes, and
2061 reload guaranteed that operand[i] is already in that class,
2062 we can just use REGNO (recog_data.operand[i]) to know which
2063 actual reg this operand needs to be in. */
2065 int regno = get_hard_regnum (&temp_stack, recog_data.operand[i]);
2070 if ((unsigned int) regno != REGNO (recog_data.operand[i]))
2072 /* recog_data.operand[i] is not in the right place. Find
2073 it and swap it with whatever is already in I's place.
2074 K is where recog_data.operand[i] is now. J is where it
2078 k = temp_stack.top - (regno - FIRST_STACK_REG);
2080 - (REGNO (recog_data.operand[i]) - FIRST_STACK_REG));
2082 temp = temp_stack.reg[k];
2083 temp_stack.reg[k] = temp_stack.reg[j];
2084 temp_stack.reg[j] = temp;
2088 /* Emit insns before INSN to make sure the reg-stack is in the right
2091 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
2093 /* Make the needed input register substitutions. Do death notes and
2094 clobbers too, because these are for inputs, not outputs. */
2096 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2097 if (STACK_REG_P (recog_data.operand[i]))
2099 int regnum = get_hard_regnum (regstack, recog_data.operand[i]);
2104 replace_reg (recog_data.operand_loc[i], regnum);
2107 for (i = 0; i < n_notes; i++)
2108 if (note_kind[i] == REG_DEAD)
2110 int regnum = get_hard_regnum (regstack, note_reg[i]);
2115 replace_reg (note_loc[i], regnum);
2118 for (i = 0; i < n_clobbers; i++)
2120 /* It's OK for a CLOBBER to reference a reg that is not live.
2121 Don't try to replace it in that case. */
2122 int regnum = get_hard_regnum (regstack, clobber_reg[i]);
2126 /* Sigh - clobbers always have QImode. But replace_reg knows
2127 that these regs can't be MODE_INT and will abort. Just put
2128 the right reg there without calling replace_reg. */
2130 *clobber_loc[i] = FP_MODE_REG (regnum, DFmode);
2134 /* Now remove from REGSTACK any inputs that the asm implicitly popped. */
2136 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2137 if (STACK_REG_P (recog_data.operand[i]))
2139 /* An input reg is implicitly popped if it is tied to an
2140 output, or if there is a CLOBBER for it. */
2143 for (j = 0; j < n_clobbers; j++)
2144 if (operands_match_p (clobber_reg[j], recog_data.operand[i]))
2147 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0)
2149 /* recog_data.operand[i] might not be at the top of stack.
2150 But that's OK, because all we need to do is pop the
2151 right number of regs off of the top of the reg-stack.
2152 record_asm_stack_regs guaranteed that all implicitly
2153 popped regs were grouped at the top of the reg-stack. */
2155 CLEAR_HARD_REG_BIT (regstack->reg_set,
2156 regstack->reg[regstack->top]);
2161 /* Now add to REGSTACK any outputs that the asm implicitly pushed.
2162 Note that there isn't any need to substitute register numbers.
2163 ??? Explain why this is true. */
2165 for (i = LAST_STACK_REG; i >= FIRST_STACK_REG; i--)
2167 /* See if there is an output for this hard reg. */
2170 for (j = 0; j < n_outputs; j++)
2171 if (STACK_REG_P (recog_data.operand[j])
2172 && REGNO (recog_data.operand[j]) == (unsigned) i)
2174 regstack->reg[++regstack->top] = i;
2175 SET_HARD_REG_BIT (regstack->reg_set, i);
2180 /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD
2181 input that the asm didn't implicitly pop. If the asm didn't
2182 implicitly pop an input reg, that reg will still be live.
2184 Note that we can't use find_regno_note here: the register numbers
2185 in the death notes have already been substituted. */
2187 for (i = 0; i < n_outputs; i++)
2188 if (STACK_REG_P (recog_data.operand[i]))
2192 for (j = 0; j < n_notes; j++)
2193 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j])
2194 && note_kind[j] == REG_UNUSED)
2196 insn = emit_pop_insn (insn, regstack, recog_data.operand[i],
2202 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2203 if (STACK_REG_P (recog_data.operand[i]))
2207 for (j = 0; j < n_notes; j++)
2208 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j])
2209 && note_kind[j] == REG_DEAD
2210 && TEST_HARD_REG_BIT (regstack->reg_set,
2211 REGNO (recog_data.operand[i])))
2213 insn = emit_pop_insn (insn, regstack, recog_data.operand[i],
2220 /* Substitute stack hard reg numbers for stack virtual registers in
2221 INSN. Non-stack register numbers are not changed. REGSTACK is the
2222 current stack content. Insns may be emitted as needed to arrange the
2223 stack for the 387 based on the contents of the insn. */
2226 subst_stack_regs (insn, regstack)
2230 rtx *note_link, note;
2233 if (GET_CODE (insn) == CALL_INSN)
2235 int top = regstack->top;
2237 /* If there are any floating point parameters to be passed in
2238 registers for this call, make sure they are in the right
2243 straighten_stack (PREV_INSN (insn), regstack);
2245 /* Now mark the arguments as dead after the call. */
2247 while (regstack->top >= 0)
2249 CLEAR_HARD_REG_BIT (regstack->reg_set, FIRST_STACK_REG + regstack->top);
2255 /* Do the actual substitution if any stack regs are mentioned.
2256 Since we only record whether entire insn mentions stack regs, and
2257 subst_stack_regs_pat only works for patterns that contain stack regs,
2258 we must check each pattern in a parallel here. A call_value_pop could
2261 if (stack_regs_mentioned (insn))
2263 int n_operands = asm_noperands (PATTERN (insn));
2264 if (n_operands >= 0)
2266 /* This insn is an `asm' with operands. Decode the operands,
2267 decide how many are inputs, and do register substitution.
2268 Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */
2270 subst_asm_stack_regs (insn, regstack);
2274 if (GET_CODE (PATTERN (insn)) == PARALLEL)
2275 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
2277 if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn), 0, i)))
2278 subst_stack_regs_pat (insn, regstack,
2279 XVECEXP (PATTERN (insn), 0, i));
2282 subst_stack_regs_pat (insn, regstack, PATTERN (insn));
2285 /* subst_stack_regs_pat may have deleted a no-op insn. If so, any
2286 REG_UNUSED will already have been dealt with, so just return. */
2288 if (GET_CODE (insn) == NOTE || INSN_DELETED_P (insn))
2291 /* If there is a REG_UNUSED note on a stack register on this insn,
2292 the indicated reg must be popped. The REG_UNUSED note is removed,
2293 since the form of the newly emitted pop insn references the reg,
2294 making it no longer `unset'. */
2296 note_link = ®_NOTES (insn);
2297 for (note = *note_link; note; note = XEXP (note, 1))
2298 if (REG_NOTE_KIND (note) == REG_UNUSED && STACK_REG_P (XEXP (note, 0)))
2300 *note_link = XEXP (note, 1);
2301 insn = emit_pop_insn (insn, regstack, XEXP (note, 0), EMIT_AFTER);
2304 note_link = &XEXP (note, 1);
2307 /* Change the organization of the stack so that it fits a new basic
2308 block. Some registers might have to be popped, but there can never be
2309 a register live in the new block that is not now live.
2311 Insert any needed insns before or after INSN, as indicated by
2312 WHERE. OLD is the original stack layout, and NEW is the desired
2313 form. OLD is updated to reflect the code emitted, ie, it will be
2314 the same as NEW upon return.
2316 This function will not preserve block_end[]. But that information
2317 is no longer needed once this has executed. */
2320 change_stack (insn, old, new, where)
2324 enum emit_where where;
2329 /* We will be inserting new insns "backwards". If we are to insert
2330 after INSN, find the next insn, and insert before it. */
2332 if (where == EMIT_AFTER)
2334 if (current_block && current_block->end == insn)
2336 insn = NEXT_INSN (insn);
2339 /* Pop any registers that are not needed in the new block. */
2341 for (reg = old->top; reg >= 0; reg--)
2342 if (! TEST_HARD_REG_BIT (new->reg_set, old->reg[reg]))
2343 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[reg], DFmode),
2348 /* If the new block has never been processed, then it can inherit
2349 the old stack order. */
2351 new->top = old->top;
2352 memcpy (new->reg, old->reg, sizeof (new->reg));
2356 /* This block has been entered before, and we must match the
2357 previously selected stack order. */
2359 /* By now, the only difference should be the order of the stack,
2360 not their depth or liveliness. */
2362 GO_IF_HARD_REG_EQUAL (old->reg_set, new->reg_set, win);
2365 if (old->top != new->top)
2368 /* If the stack is not empty (new->top != -1), loop here emitting
2369 swaps until the stack is correct.
2371 The worst case number of swaps emitted is N + 2, where N is the
2372 depth of the stack. In some cases, the reg at the top of
2373 stack may be correct, but swapped anyway in order to fix
2374 other regs. But since we never swap any other reg away from
2375 its correct slot, this algorithm will converge. */
2380 /* Swap the reg at top of stack into the position it is
2381 supposed to be in, until the correct top of stack appears. */
2383 while (old->reg[old->top] != new->reg[new->top])
2385 for (reg = new->top; reg >= 0; reg--)
2386 if (new->reg[reg] == old->reg[old->top])
2392 emit_swap_insn (insn, old,
2393 FP_MODE_REG (old->reg[reg], DFmode));
2396 /* See if any regs remain incorrect. If so, bring an
2397 incorrect reg to the top of stack, and let the while loop
2400 for (reg = new->top; reg >= 0; reg--)
2401 if (new->reg[reg] != old->reg[reg])
2403 emit_swap_insn (insn, old,
2404 FP_MODE_REG (old->reg[reg], DFmode));
2409 /* At this point there must be no differences. */
2411 for (reg = old->top; reg >= 0; reg--)
2412 if (old->reg[reg] != new->reg[reg])
2417 current_block->end = PREV_INSN (insn);
2420 /* Print stack configuration. */
2423 print_stack (file, s)
2431 fprintf (file, "uninitialized\n");
2432 else if (s->top == -1)
2433 fprintf (file, "empty\n");
2438 for (i = 0; i <= s->top; ++i)
2439 fprintf (file, "%d ", s->reg[i]);
2440 fputs ("]\n", file);
2444 /* This function was doing life analysis. We now let the regular live
2445 code do it's job, so we only need to check some extra invariants
2446 that reg-stack expects. Primary among these being that all registers
2447 are initialized before use.
2449 The function returns true when code was emitted to CFG edges and
2450 commit_edge_insertions needs to be called. */
2453 convert_regs_entry ()
2459 FOR_EACH_BB_REVERSE (block)
2461 block_info bi = BLOCK_INFO (block);
2464 /* Set current register status at last instruction `uninitialized'. */
2465 bi->stack_in.top = -2;
2467 /* Copy live_at_end and live_at_start into temporaries. */
2468 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; reg++)
2470 if (REGNO_REG_SET_P (block->global_live_at_end, reg))
2471 SET_HARD_REG_BIT (bi->out_reg_set, reg);
2472 if (REGNO_REG_SET_P (block->global_live_at_start, reg))
2473 SET_HARD_REG_BIT (bi->stack_in.reg_set, reg);
2477 /* Load something into each stack register live at function entry.
2478 Such live registers can be caused by uninitialized variables or
2479 functions not returning values on all paths. In order to keep
2480 the push/pop code happy, and to not scrog the register stack, we
2481 must put something in these registers. Use a QNaN.
2483 Note that we are inserting converted code here. This code is
2484 never seen by the convert_regs pass. */
2486 for (e = ENTRY_BLOCK_PTR->succ; e ; e = e->succ_next)
2488 basic_block block = e->dest;
2489 block_info bi = BLOCK_INFO (block);
2492 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg)
2493 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg))
2497 bi->stack_in.reg[++top] = reg;
2499 init = gen_rtx_SET (VOIDmode,
2500 FP_MODE_REG (FIRST_STACK_REG, SFmode),
2502 insert_insn_on_edge (init, e);
2506 bi->stack_in.top = top;
2512 /* Construct the desired stack for function exit. This will either
2513 be `empty', or the function return value at top-of-stack. */
2516 convert_regs_exit ()
2518 int value_reg_low, value_reg_high;
2522 retvalue = stack_result (current_function_decl);
2523 value_reg_low = value_reg_high = -1;
2526 value_reg_low = REGNO (retvalue);
2527 value_reg_high = value_reg_low
2528 + HARD_REGNO_NREGS (value_reg_low, GET_MODE (retvalue)) - 1;
2531 output_stack = &BLOCK_INFO (EXIT_BLOCK_PTR)->stack_in;
2532 if (value_reg_low == -1)
2533 output_stack->top = -1;
2538 output_stack->top = value_reg_high - value_reg_low;
2539 for (reg = value_reg_low; reg <= value_reg_high; ++reg)
2541 output_stack->reg[value_reg_high - reg] = reg;
2542 SET_HARD_REG_BIT (output_stack->reg_set, reg);
2547 /* Adjust the stack of this block on exit to match the stack of the
2548 target block, or copy stack info into the stack of the successor
2549 of the successor hasn't been processed yet. */
2551 compensate_edge (e, file)
2555 basic_block block = e->src, target = e->dest;
2556 block_info bi = BLOCK_INFO (block);
2557 struct stack_def regstack, tmpstack;
2558 stack target_stack = &BLOCK_INFO (target)->stack_in;
2561 current_block = block;
2562 regstack = bi->stack_out;
2564 fprintf (file, "Edge %d->%d: ", block->index, target->index);
2566 if (target_stack->top == -2)
2568 /* The target block hasn't had a stack order selected.
2569 We need merely ensure that no pops are needed. */
2570 for (reg = regstack.top; reg >= 0; --reg)
2571 if (!TEST_HARD_REG_BIT (target_stack->reg_set, regstack.reg[reg]))
2577 fprintf (file, "new block; copying stack position\n");
2579 /* change_stack kills values in regstack. */
2580 tmpstack = regstack;
2582 change_stack (block->end, &tmpstack, target_stack, EMIT_AFTER);
2587 fprintf (file, "new block; pops needed\n");
2591 if (target_stack->top == regstack.top)
2593 for (reg = target_stack->top; reg >= 0; --reg)
2594 if (target_stack->reg[reg] != regstack.reg[reg])
2600 fprintf (file, "no changes needed\n");
2607 fprintf (file, "correcting stack to ");
2608 print_stack (file, target_stack);
2612 /* Care for non-call EH edges specially. The normal return path have
2613 values in registers. These will be popped en masse by the unwind
2615 if ((e->flags & (EDGE_EH | EDGE_ABNORMAL_CALL)) == EDGE_EH)
2616 target_stack->top = -1;
2618 /* Other calls may appear to have values live in st(0), but the
2619 abnormal return path will not have actually loaded the values. */
2620 else if (e->flags & EDGE_ABNORMAL_CALL)
2622 /* Assert that the lifetimes are as we expect -- one value
2623 live at st(0) on the end of the source block, and no
2624 values live at the beginning of the destination block. */
2627 CLEAR_HARD_REG_SET (tmp);
2628 GO_IF_HARD_REG_EQUAL (target_stack->reg_set, tmp, eh1);
2632 /* We are sure that there is st(0) live, otherwise we won't compensate.
2633 For complex return values, we may have st(1) live as well. */
2634 SET_HARD_REG_BIT (tmp, FIRST_STACK_REG);
2635 if (TEST_HARD_REG_BIT (regstack.reg_set, FIRST_STACK_REG + 1))
2636 SET_HARD_REG_BIT (tmp, FIRST_STACK_REG + 1);
2637 GO_IF_HARD_REG_EQUAL (regstack.reg_set, tmp, eh2);
2641 target_stack->top = -1;
2644 /* It is better to output directly to the end of the block
2645 instead of to the edge, because emit_swap can do minimal
2646 insn scheduling. We can do this when there is only one
2647 edge out, and it is not abnormal. */
2648 else if (block->succ->succ_next == NULL && !(e->flags & EDGE_ABNORMAL))
2650 /* change_stack kills values in regstack. */
2651 tmpstack = regstack;
2653 change_stack (block->end, &tmpstack, target_stack,
2654 (GET_CODE (block->end) == JUMP_INSN
2655 ? EMIT_BEFORE : EMIT_AFTER));
2661 /* We don't support abnormal edges. Global takes care to
2662 avoid any live register across them, so we should never
2663 have to insert instructions on such edges. */
2664 if (e->flags & EDGE_ABNORMAL)
2667 current_block = NULL;
2670 /* ??? change_stack needs some point to emit insns after. */
2671 after = emit_note (NULL, NOTE_INSN_DELETED);
2673 tmpstack = regstack;
2674 change_stack (after, &tmpstack, target_stack, EMIT_BEFORE);
2679 insert_insn_on_edge (seq, e);
2685 /* Convert stack register references in one block. */
2688 convert_regs_1 (file, block)
2692 struct stack_def regstack;
2693 block_info bi = BLOCK_INFO (block);
2696 edge e, beste = NULL;
2699 any_malformed_asm = false;
2701 /* Find the edge we will copy stack from. It should be the most frequent
2702 one as it will get cheapest after compensation code is generated,
2703 if multiple such exists, take one with largest count, prefer critical
2704 one (as splitting critical edges is more expensive), or one with lowest
2705 index, to avoid random changes with different orders of the edges. */
2706 for (e = block->pred; e ; e = e->pred_next)
2708 if (e->flags & EDGE_DFS_BACK)
2712 else if (EDGE_FREQUENCY (beste) < EDGE_FREQUENCY (e))
2714 else if (EDGE_FREQUENCY (beste) > EDGE_FREQUENCY (e))
2716 else if (beste->count < e->count)
2718 else if (beste->count > e->count)
2720 else if ((EDGE_CRITICAL_P (e) != 0)
2721 != (EDGE_CRITICAL_P (beste) != 0))
2723 if (EDGE_CRITICAL_P (e))
2726 else if (e->src->index < beste->src->index)
2730 /* Entry block does have stack already initialized. */
2731 if (bi->stack_in.top == -2)
2732 inserted |= compensate_edge (beste, file);
2736 current_block = block;
2740 fprintf (file, "\nBasic block %d\nInput stack: ", block->index);
2741 print_stack (file, &bi->stack_in);
2744 /* Process all insns in this block. Keep track of NEXT so that we
2745 don't process insns emitted while substituting in INSN. */
2747 regstack = bi->stack_in;
2751 next = NEXT_INSN (insn);
2753 /* Ensure we have not missed a block boundary. */
2756 if (insn == block->end)
2759 /* Don't bother processing unless there is a stack reg
2760 mentioned or if it's a CALL_INSN. */
2761 if (stack_regs_mentioned (insn)
2762 || GET_CODE (insn) == CALL_INSN)
2766 fprintf (file, " insn %d input stack: ",
2768 print_stack (file, ®stack);
2770 subst_stack_regs (insn, ®stack);
2777 fprintf (file, "Expected live registers [");
2778 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg)
2779 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg))
2780 fprintf (file, " %d", reg);
2781 fprintf (file, " ]\nOutput stack: ");
2782 print_stack (file, ®stack);
2786 if (GET_CODE (insn) == JUMP_INSN)
2787 insn = PREV_INSN (insn);
2789 /* If the function is declared to return a value, but it returns one
2790 in only some cases, some registers might come live here. Emit
2791 necessary moves for them. */
2793 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg)
2795 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg)
2796 && ! TEST_HARD_REG_BIT (regstack.reg_set, reg))
2802 fprintf (file, "Emitting insn initializing reg %d\n",
2806 set = gen_rtx_SET (VOIDmode, FP_MODE_REG (reg, SFmode),
2808 insn = emit_insn_after (set, insn);
2809 subst_stack_regs (insn, ®stack);
2813 /* Something failed if the stack lives don't match. If we had malformed
2814 asms, we zapped the instruction itself, but that didn't produce the
2815 same pattern of register kills as before. */
2816 GO_IF_HARD_REG_EQUAL (regstack.reg_set, bi->out_reg_set, win);
2817 if (!any_malformed_asm)
2820 bi->stack_out = regstack;
2822 /* Compensate the back edges, as those wasn't visited yet. */
2823 for (e = block->succ; e ; e = e->succ_next)
2825 if (e->flags & EDGE_DFS_BACK
2826 || (e->dest == EXIT_BLOCK_PTR))
2828 if (!BLOCK_INFO (e->dest)->done
2829 && e->dest != block)
2831 inserted |= compensate_edge (e, file);
2834 for (e = block->pred; e ; e = e->pred_next)
2836 if (e != beste && !(e->flags & EDGE_DFS_BACK)
2837 && e->src != ENTRY_BLOCK_PTR)
2839 if (!BLOCK_INFO (e->src)->done)
2841 inserted |= compensate_edge (e, file);
2848 /* Convert registers in all blocks reachable from BLOCK. */
2851 convert_regs_2 (file, block)
2855 basic_block *stack, *sp;
2858 stack = (basic_block *) xmalloc (sizeof (*stack) * n_basic_blocks);
2869 inserted |= convert_regs_1 (file, block);
2870 BLOCK_INFO (block)->done = 1;
2872 for (e = block->succ; e ; e = e->succ_next)
2873 if (! (e->flags & EDGE_DFS_BACK))
2875 BLOCK_INFO (e->dest)->predecessors--;
2876 if (!BLOCK_INFO (e->dest)->predecessors)
2880 while (sp != stack);
2885 /* Traverse all basic blocks in a function, converting the register
2886 references in each insn from the "flat" register file that gcc uses,
2887 to the stack-like registers the 387 uses. */
2897 /* Initialize uninitialized registers on function entry. */
2898 inserted = convert_regs_entry ();
2900 /* Construct the desired stack for function exit. */
2901 convert_regs_exit ();
2902 BLOCK_INFO (EXIT_BLOCK_PTR)->done = 1;
2904 /* ??? Future: process inner loops first, and give them arbitrary
2905 initial stacks which emit_swap_insn can modify. This ought to
2906 prevent double fxch that aften appears at the head of a loop. */
2908 /* Process all blocks reachable from all entry points. */
2909 for (e = ENTRY_BLOCK_PTR->succ; e ; e = e->succ_next)
2910 inserted |= convert_regs_2 (file, e->dest);
2912 /* ??? Process all unreachable blocks. Though there's no excuse
2913 for keeping these even when not optimizing. */
2916 block_info bi = BLOCK_INFO (b);
2922 /* Create an arbitrary input stack. */
2923 bi->stack_in.top = -1;
2924 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg)
2925 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg))
2926 bi->stack_in.reg[++bi->stack_in.top] = reg;
2928 inserted |= convert_regs_2 (file, b);
2931 clear_aux_for_blocks ();
2933 fixup_abnormal_edges ();
2935 commit_edge_insertions ();
2942 #endif /* STACK_REGS */
2944 #include "gt-reg-stack.h"