1 /* Register to Stack convert for GNU compiler.
2 Copyright (C) 1992 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
20 /* This pass converts stack-like registers from the "flat register
21 file" model that gcc uses, to a stack convention that the 387 uses.
23 * The form of the input:
25 On input, the function consists of insn that have had their
26 registers fully allocated to a set of "virtual" registers. Note that
27 the word "virtual" is used differently here than elsewhere in gcc: for
28 each virtual stack reg, there is a hard reg, but the mapping between
29 them is not known until this pass is run. On output, hard register
30 numbers have been substituted, and various pop and exchange insns have
31 been emitted. The hard register numbers and the virtual register
32 numbers completely overlap - before this pass, all stack register
33 numbers are virtual, and afterward they are all hard.
35 The virtual registers can be manipulated normally by gcc, and their
36 semantics are the same as for normal registers. After the hard
37 register numbers are substituted, the semantics of an insn containing
38 stack-like regs are not the same as for an insn with normal regs: for
39 instance, it is not safe to delete an insn that appears to be a no-op
40 move. In general, no insn containing hard regs should be changed
41 after this pass is done.
43 * The form of the output:
45 After this pass, hard register numbers represent the distance from
46 the current top of stack to the desired register. A reference to
47 FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1,
48 represents the register just below that, and so forth. Also, REG_DEAD
49 notes indicate whether or not a stack register should be popped.
51 A "swap" insn looks like a parallel of two patterns, where each
52 pattern is a SET: one sets A to B, the other B to A.
54 A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG
55 and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS,
56 will replace the existing stack top, not push a new value.
58 A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose
59 SET_SRC is REG or MEM.
61 The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG
62 appears ambiguous. As a special case, the presence of a REG_DEAD note
63 for FIRST_STACK_REG differentiates between a load insn and a pop.
65 If a REG_DEAD is present, the insn represents a "pop" that discards
66 the top of the register stack. If there is no REG_DEAD note, then the
67 insn represents a "dup" or a push of the current top of stack onto the
72 Existing REG_DEAD and REG_UNUSED notes for stack registers are
73 deleted and recreated from scratch. REG_DEAD is never created for a
74 SET_DEST, only REG_UNUSED.
76 Before life analysis, the mode of each insn is set based on whether
77 or not any stack registers are mentioned within that insn. VOIDmode
78 means that no regs are mentioned anyway, and QImode means that at
79 least one pattern within the insn mentions stack registers. This
80 information is valid until after reg_to_stack returns, and is used
85 There are several rules on the usage of stack-like regs in
86 asm_operands insns. These rules apply only to the operands that are
89 1. Given a set of input regs that die in an asm_operands, it is
90 necessary to know which are implicitly popped by the asm, and
91 which must be explicitly popped by gcc.
93 An input reg that is implicitly popped by the asm must be
94 explicitly clobbered, unless it is constrained to match an
97 2. For any input reg that is implicitly popped by an asm, it is
98 necessary to know how to adjust the stack to compensate for the pop.
99 If any non-popped input is closer to the top of the reg-stack than
100 the implicitly popped reg, it would not be possible to know what the
101 stack looked like - it's not clear how the rest of the stack "slides
104 All implicitly popped input regs must be closer to the top of
105 the reg-stack than any input that is not implicitly popped.
107 3. It is possible that if an input dies in an insn, reload might
108 use the input reg for an output reload. Consider this example:
110 asm ("foo" : "=t" (a) : "f" (b));
112 This asm says that input B is not popped by the asm, and that
113 the asm pushes a result onto the reg-stack, ie, the stack is one
114 deeper after the asm than it was before. But, it is possible that
115 reload will think that it can use the same reg for both the input and
116 the output, if input B dies in this insn.
118 If any input operand uses the "f" constraint, all output reg
119 constraints must use the "&" earlyclobber.
121 The asm above would be written as
123 asm ("foo" : "=&t" (a) : "f" (b));
125 4. Some operands need to be in particular places on the stack. All
126 output operands fall in this category - there is no other way to
127 know which regs the outputs appear in unless the user indicates
128 this in the constraints.
130 Output operands must specifically indicate which reg an output
131 appears in after an asm. "=f" is not allowed: the operand
132 constraints must select a class with a single reg.
134 5. Output operands may not be "inserted" between existing stack regs.
135 Since no 387 opcode uses a read/write operand, all output operands
136 are dead before the asm_operands, and are pushed by the asm_operands.
137 It makes no sense to push anywhere but the top of the reg-stack.
139 Output operands must start at the top of the reg-stack: output
140 operands may not "skip" a reg.
142 6. Some asm statements may need extra stack space for internal
143 calculations. This can be guaranteed by clobbering stack registers
144 unrelated to the inputs and outputs.
146 Here are a couple of reasonable asms to want to write. This asm
147 takes one input, which is internally popped, and produces two outputs.
149 asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp));
151 This asm takes two inputs, which are popped by the fyl2xp1 opcode,
152 and replaces them with one output. The user must code the "st(1)"
153 clobber for reg-stack.c to know that fyl2xp1 pops both inputs.
155 asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)");
163 #include "insn-config.h"
165 #include "hard-reg-set.h"
170 #define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1)
172 /* True if the current function returns a real value. */
173 static int current_function_returns_real;
175 /* This is the basic stack record. TOP is an index into REG[] such
176 that REG[TOP] is the top of stack. If TOP is -1 the stack is empty.
178 If TOP is -2 the stack is not yet initialized: reg_set indicates
179 which registers are live. Stack initialization consists of placing
180 each live reg in array `reg' and setting `top' appropriately. */
182 typedef struct stack_def
184 int top; /* index to top stack element */
185 HARD_REG_SET reg_set; /* set of live registers */
186 char reg[REG_STACK_SIZE]; /* register - stack mapping */
189 /* highest instruction uid */
190 static int max_uid = 0;
192 /* Number of basic blocks in the current function. */
195 /* Element N is first insn in basic block N.
196 This info lasts until we finish compiling the function. */
197 static rtx *block_begin;
199 /* Element N is last insn in basic block N.
200 This info lasts until we finish compiling the function. */
201 static rtx *block_end;
203 /* Element N is nonzero if control can drop into basic block N */
204 static char *block_drops_in;
206 /* Element N says all about the stack at entry block N */
207 static stack block_stack_in;
209 /* Element N says all about the stack life at the end of block N */
210 static HARD_REG_SET *block_out_reg_set;
212 /* This is where the BLOCK_NUM values are really stored. This is set
213 up by find_blocks and used there and in life_analysis. It can be used
214 later, but only to look up an insn that is the head or tail of some
215 block. life_analysis and the stack register conversion process can
216 add insns within a block. */
217 static short *block_number;
219 /* This is the register file for all register after conversion */
220 static rtx FP_mode_reg[FIRST_PSEUDO_REGISTER][(int) MAX_MACHINE_MODE];
222 /* Get the basic block number of an insn. See note at block_number
223 definition are validity of this information. */
225 #define BLOCK_NUM(INSN) \
226 (((INSN_UID (INSN) > max_uid) \
227 ? (short *)(abort() , 0) \
228 : block_number)[INSN_UID (INSN)])
230 extern rtx gen_jump ();
231 extern rtx gen_movdf ();
232 extern rtx find_regno_note ();
233 extern rtx emit_jump_insn_before ();
234 extern rtx emit_label_after ();
236 /* Forward declarations */
238 static void find_blocks ();
239 static void stack_reg_life_analysis ();
240 static void change_stack ();
241 static void convert_regs ();
242 static void dump_stack_info ();
244 /* Return non-zero if any stack register is mentioned somewhere within PAT. */
247 stack_regs_mentioned_p (pat)
253 if (STACK_REG_P (pat))
256 fmt = GET_RTX_FORMAT (GET_CODE (pat));
257 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
263 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
264 if (stack_regs_mentioned_p (XVECEXP (pat, i, j)))
267 else if (fmt[i] == 'e' && stack_regs_mentioned_p (XEXP (pat, i)))
274 /* Convert register usage from "flat" register file usage to a "stack
275 register file. FIRST is the first insn in the function, FILE is the
278 First compute the beginning and end of each basic block. Do a
279 register life analysis on the stack registers, recording the result
280 for the head and tail of each basic block. The convert each insn one
281 by one. Run a last jump_optimize() pass, if optimizing, to eliminate
282 any cross-jumping created when the converter inserts pop insns.*/
285 reg_to_stack (first, file)
291 int stack_reg_seen = 0;
292 enum machine_mode mode;
294 current_function_returns_real
295 = TREE_CODE (TREE_TYPE (DECL_RESULT (current_function_decl))) == REAL_TYPE;
297 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
298 mode = GET_MODE_WIDER_MODE (mode))
299 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
300 FP_mode_reg[i][(int) mode] = gen_rtx (REG, mode, i);
302 /* Count the basic blocks. Also find maximum insn uid. */
304 register RTX_CODE prev_code = JUMP_INSN;
305 register RTX_CODE code;
309 for (insn = first; insn; insn = NEXT_INSN (insn))
311 /* Note that this loop must select the same block boundaries
312 as code in find_blocks. */
314 if (INSN_UID (insn) > max_uid)
315 max_uid = INSN_UID (insn);
317 code = GET_CODE (insn);
319 if (code == CODE_LABEL
320 || (prev_code != INSN
321 && prev_code != CALL_INSN
322 && prev_code != CODE_LABEL
323 && (code == INSN || code == CALL_INSN || code == JUMP_INSN)))
326 /* Remember whether or not this insn mentions an FP regs.
327 Check JUMP_INSNs too, in case someone creates a funny PARALLEL. */
329 if ((GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
330 || GET_CODE (insn) == JUMP_INSN)
331 && stack_regs_mentioned_p (PATTERN (insn)))
334 PUT_MODE (insn, QImode);
337 PUT_MODE (insn, VOIDmode);
344 /* If no stack register reference exists in this insn, there isn't
345 anything to convert. */
347 if (! stack_reg_seen)
350 /* If there are stack registers, there must be at least one block. */
355 /* Allocate some tables that last till end of compiling this function
356 and some needed only in find_blocks and life_analysis. */
358 block_begin = (rtx *) alloca (blocks * sizeof (rtx));
359 block_end = (rtx *) alloca (blocks * sizeof (rtx));
360 block_drops_in = (char *) alloca (blocks);
362 block_stack_in = (stack) alloca (blocks * sizeof (struct stack_def));
363 block_out_reg_set = (HARD_REG_SET *) alloca (blocks * sizeof (HARD_REG_SET));
364 bzero (block_stack_in, blocks * sizeof (struct stack_def));
365 bzero (block_out_reg_set, blocks * sizeof (HARD_REG_SET));
367 block_number = (short *) alloca ((max_uid + 1) * sizeof (short));
370 stack_reg_life_analysis (first);
372 /* Dump the life analysis debug information before jump
373 optimization, as that will destroy the LABEL_REFS we keep the
377 dump_stack_info (file);
382 jump_optimize (first, 2, 0, 0);
385 /* Check PAT, which is in INSN, for LABEL_REFs. Add INSN to the
386 label's chain of references, and note which insn contains each
390 record_label_references (insn, pat)
393 register enum rtx_code code = GET_CODE (pat);
397 if (code == LABEL_REF)
399 register rtx label = XEXP (pat, 0);
402 if (GET_CODE (label) != CODE_LABEL)
405 /* Don't make a duplicate in the code_label's chain. */
407 for (ref = LABEL_REFS (label); ref != label; ref = LABEL_NEXTREF (ref))
408 if (CONTAINING_INSN (ref) == insn)
411 CONTAINING_INSN (pat) = insn;
412 LABEL_NEXTREF (pat) = LABEL_REFS (label);
413 LABEL_REFS (label) = pat;
418 fmt = GET_RTX_FORMAT (code);
419 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
422 record_label_references (insn, XEXP (pat, i));
426 for (j = 0; j < XVECLEN (pat, i); j++)
427 record_label_references (insn, XVECEXP (pat, i, j));
432 /* Return a pointer to the REG expression within PAT. If PAT is not a
433 REG, possible enclosed by a conversion rtx, return the inner part of
434 PAT that stopped the search. */
440 while (GET_CODE (*pat) == SUBREG
441 || GET_CODE (*pat) == FLOAT
442 || GET_CODE (*pat) == FIX
443 || GET_CODE (*pat) == FLOAT_EXTEND
444 || GET_CODE (*pat) == FLOAT_TRUNCATE)
445 pat = & XEXP (*pat, 0);
450 /* If REG is a stack register that is marked dead in REGSTACK, then
451 record that it is now live. If REG is not DEST, add a death note to
452 INSN if there isn't one already. If DEST is not a reg, it is safe to
453 assume that it does not mention a reg anywhere within. */
456 record_note_if_dead (insn, regstack, reg, dest)
461 reg = * get_true_reg (& reg);
463 if (STACK_REG_P (reg))
465 if (! TEST_HARD_REG_BIT (regstack->reg_set, REGNO (reg)))
467 if ((! REG_P (dest) || REGNO (dest) != REGNO (reg))
468 && ! find_regno_note (insn, REG_DEAD, REGNO (reg)))
469 REG_NOTES (insn) = gen_rtx (EXPR_LIST,
470 REG_DEAD, reg, REG_NOTES (insn));
472 SET_HARD_REG_BIT (regstack->reg_set, REGNO (reg));
476 if (stack_regs_mentioned_p (reg))
480 /* Scan the OPERANDS and OPERAND_CONSTRAINTS of an asm_operands.
481 N_OPERANDS is the total number of operands. Return which alternative
482 matched, or -1 is no alternative matches.
484 OPERAND_MATCHES is an array which indicates which operand this
485 operand matches due to the constraints, or -1 if no match is required.
486 If two operands match by coincidence, but are not required to match by
487 the constraints, -1 is returned.
489 OPERAND_CLASS is an array which indicates the smallest class
490 required by the constraints. If the alternative that matches calls
491 for some class `class', and the operand matches a subclass of `class',
492 OPERAND_CLASS is set to `class' as required by the constraints, not to
493 the subclass. If an alternative allows more than one class,
494 OPERAND_CLASS is set to the smallest class that is a union of the
498 constrain_asm_operands (n_operands, operands, operand_constraints,
499 operand_matches, operand_class)
502 char **operand_constraints;
503 int *operand_matches;
504 enum reg_class *operand_class;
506 char **constraints = (char **) alloca (n_operands * sizeof (char *));
508 int this_alternative, this_operand;
512 for (j = 0; j < n_operands; j++)
513 constraints[j] = operand_constraints[j];
515 /* Compute the number of alternatives in the operands. reload has
516 already guaranteed that all operands have the same number of
520 for (q = constraints[0]; *q; q++)
521 n_alternatives += (*q == ',');
523 this_alternative = 0;
524 while (this_alternative < n_alternatives)
529 /* No operands match, no narrow class requirements yet. */
530 for (i = 0; i < n_operands; i++)
532 operand_matches[i] = -1;
533 operand_class[i] = NO_REGS;
536 for (this_operand = 0; this_operand < n_operands; this_operand++)
538 rtx op = operands[this_operand];
539 enum machine_mode mode = GET_MODE (op);
540 char *p = constraints[this_operand];
545 if (GET_CODE (op) == SUBREG)
547 if (GET_CODE (SUBREG_REG (op)) == REG
548 && REGNO (SUBREG_REG (op)) < FIRST_PSEUDO_REGISTER)
549 offset = SUBREG_WORD (op);
550 op = SUBREG_REG (op);
553 /* An empty constraint or empty alternative
554 allows anything which matched the pattern. */
555 if (*p == 0 || *p == ',')
558 while (*p && (c = *p++) != ',')
578 /* This operand must be the same as a previous one.
579 This kind of constraint is used for instructions such
580 as add when they take only two operands.
582 Note that the lower-numbered operand is passed first. */
584 if (operands_match_p (operands[c - '0'],
585 operands[this_operand]))
587 operand_matches[this_operand] = c - '0';
593 /* p is used for address_operands. Since this is an asm,
594 just to make sure that the operand is valid for Pmode. */
596 if (strict_memory_address_p (Pmode, op))
601 /* Anything goes unless it is a REG and really has a hard reg
602 but the hard reg is not in the class GENERAL_REGS. */
603 if (GENERAL_REGS == ALL_REGS
604 || GET_CODE (op) != REG
605 || reg_fits_class_p (op, GENERAL_REGS, offset, mode))
607 if (GET_CODE (op) == REG)
608 operand_class[this_operand]
609 = reg_class_subunion[(int) operand_class[this_operand]][(int) GENERAL_REGS];
615 if (GET_CODE (op) == REG
616 && (GENERAL_REGS == ALL_REGS
617 || reg_fits_class_p (op, GENERAL_REGS, offset, mode)))
619 operand_class[this_operand]
620 = reg_class_subunion[(int) operand_class[this_operand]][(int) GENERAL_REGS];
626 /* This is used for a MATCH_SCRATCH in the cases when we
627 don't actually need anything. So anything goes any time. */
632 if (GET_CODE (op) == MEM)
637 if (GET_CODE (op) == MEM
638 && (GET_CODE (XEXP (op, 0)) == PRE_DEC
639 || GET_CODE (XEXP (op, 0)) == POST_DEC))
644 if (GET_CODE (op) == MEM
645 && (GET_CODE (XEXP (op, 0)) == PRE_INC
646 || GET_CODE (XEXP (op, 0)) == POST_INC))
651 /* Match any CONST_DOUBLE, but only if
652 we can examine the bits of it reliably. */
653 if ((HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT
654 || HOST_BITS_PER_INT != BITS_PER_WORD)
655 && GET_CODE (op) != VOIDmode && ! flag_pretend_float)
657 if (GET_CODE (op) == CONST_DOUBLE)
662 if (GET_CODE (op) == CONST_DOUBLE)
668 if (GET_CODE (op) == CONST_DOUBLE
669 && CONST_DOUBLE_OK_FOR_LETTER_P (op, c))
674 if (GET_CODE (op) == CONST_INT
675 || (GET_CODE (op) == CONST_DOUBLE
676 && GET_MODE (op) == VOIDmode))
685 if (GET_CODE (op) == CONST_INT
686 || (GET_CODE (op) == CONST_DOUBLE
687 && GET_MODE (op) == VOIDmode))
699 if (GET_CODE (op) == CONST_INT
700 && CONST_OK_FOR_LETTER_P (INTVAL (op), c))
704 #ifdef EXTRA_CONSTRAINT
710 if (EXTRA_CONSTRAINT (op, c))
716 if (GET_CODE (op) == MEM && ! offsettable_memref_p (op))
721 if (offsettable_memref_p (op))
726 if (GET_CODE (op) == REG
727 && reg_fits_class_p (op, REG_CLASS_FROM_LETTER (c),
730 operand_class[this_operand]
731 = reg_class_subunion[(int)operand_class[this_operand]][(int) REG_CLASS_FROM_LETTER (c)];
736 constraints[this_operand] = p;
737 /* If this operand did not win somehow,
738 this alternative loses. */
742 /* This alternative won; the operands are ok.
743 Change whichever operands this alternative says to change. */
750 /* For operands constrained to match another operand, copy the other
751 operand's class to this operand's class. */
752 for (j = 0; j < n_operands; j++)
753 if (operand_matches[j] >= 0)
754 operand_class[j] = operand_class[operand_matches[j]];
756 return this_alternative == n_alternatives ? -1 : this_alternative;
759 /* Record the life info of each stack reg in INSN, updating REGSTACK.
760 N_INPUTS is the number of inputs; N_OUTPUTS the outputs. CONSTRAINTS
761 is an array of the constraint strings used in the asm statement.
762 OPERANDS is an array of all operands for the insn, and is assumed to
763 contain all output operands, then all inputs operands.
765 There are many rules that an asm statement for stack-like regs must
766 follow. Those rules are explained at the top of this file: the rule
767 numbers below refer to that explanation. */
770 record_asm_reg_life (insn, regstack, operands, constraints,
776 int n_inputs, n_outputs;
779 int n_operands = n_inputs + n_outputs;
780 int first_input = n_outputs;
782 int malformed_asm = 0;
783 rtx body = PATTERN (insn);
785 int *operand_matches = (int *) alloca (n_operands * sizeof (int *));
787 enum reg_class *operand_class
788 = (enum reg_class *) alloca (n_operands * sizeof (enum reg_class *));
790 int reg_used_as_output[FIRST_PSEUDO_REGISTER];
791 int implicitly_dies[FIRST_PSEUDO_REGISTER];
795 /* Find out what the constraints required. If no constraint
796 alternative matches, that is a compiler bug: we should have caught
797 such an insn during reload. */
798 i = constrain_asm_operands (n_operands, operands, constraints,
799 operand_matches, operand_class);
803 /* Strip SUBREGs here to make the following code simpler. */
804 for (i = 0; i < n_operands; i++)
805 if (GET_CODE (operands[i]) == SUBREG
806 && GET_CODE (SUBREG_REG (operands[i])) == REG)
807 operands[i] = SUBREG_REG (operands[i]);
809 /* Set up CLOBBER_REG. */
813 if (GET_CODE (body) == PARALLEL)
815 clobber_reg = (rtx *) alloca (XVECLEN (body, 0) * sizeof (rtx *));
817 for (i = 0; i < XVECLEN (body, 0); i++)
818 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
820 rtx clobber = XVECEXP (body, 0, i);
821 rtx reg = XEXP (clobber, 0);
823 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
824 reg = SUBREG_REG (reg);
826 if (STACK_REG_P (reg))
828 clobber_reg[n_clobbers] = reg;
834 /* Enforce rule #4: Output operands must specifically indicate which
835 reg an output appears in after an asm. "=f" is not allowed: the
836 operand constraints must select a class with a single reg.
838 Also enforce rule #5: Output operands must start at the top of
839 the reg-stack: output operands may not "skip" a reg. */
841 bzero (reg_used_as_output, sizeof (reg_used_as_output));
842 for (i = 0; i < n_outputs; i++)
843 if (STACK_REG_P (operands[i]))
844 if (reg_class_size[operand_class[i]] != 1)
847 (insn, "Output constraint %d must specify a single register", i);
851 reg_used_as_output[REGNO (operands[i])] = 1;
854 /* Search for first non-popped reg. */
855 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
856 if (! reg_used_as_output[i])
859 /* If there are any other popped regs, that's an error. */
860 for (; i < LAST_STACK_REG + 1; i++)
861 if (reg_used_as_output[i])
864 if (i != LAST_STACK_REG + 1)
866 error_for_asm (insn, "Output regs must be grouped at top of stack");
870 /* Enforce rule #2: All implicitly popped input regs must be closer
871 to the top of the reg-stack than any input that is not implicitly
874 bzero (implicitly_dies, sizeof (implicitly_dies));
875 for (i = first_input; i < first_input + n_inputs; i++)
876 if (STACK_REG_P (operands[i]))
878 /* An input reg is implicitly popped if it is tied to an
879 output, or if there is a CLOBBER for it. */
882 for (j = 0; j < n_clobbers; j++)
883 if (operands_match_p (clobber_reg[j], operands[i]))
886 if (j < n_clobbers || operand_matches[i] >= 0)
887 implicitly_dies[REGNO (operands[i])] = 1;
890 /* Search for first non-popped reg. */
891 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
892 if (! implicitly_dies[i])
895 /* If there are any other popped regs, that's an error. */
896 for (; i < LAST_STACK_REG + 1; i++)
897 if (implicitly_dies[i])
900 if (i != LAST_STACK_REG + 1)
903 "Implicitly popped regs must be grouped at top of stack");
907 /* Enfore rule #3: If any input operand uses the "f" constraint, all
908 output constraints must use the "&" earlyclobber.
910 ??? Detect this more deterministically by having constraint_asm_operands
911 record any earlyclobber. */
913 for (i = first_input; i < first_input + n_inputs; i++)
914 if (operand_matches[i] == -1)
918 for (j = 0; j < n_outputs; j++)
919 if (operands_match_p (operands[j], operands[i]))
922 "Output operand %d must use `&' constraint", j);
929 /* Avoid further trouble with this insn. */
930 PATTERN (insn) = gen_rtx (USE, VOIDmode, const0_rtx);
931 PUT_MODE (insn, VOIDmode);
935 /* Process all outputs */
936 for (i = 0; i < n_outputs; i++)
938 rtx op = operands[i];
940 if (! STACK_REG_P (op))
941 if (stack_regs_mentioned_p (op))
946 /* Each destination is dead before this insn. If the
947 destination is not used after this insn, record this with
950 if (! TEST_HARD_REG_BIT (regstack->reg_set, REGNO (op)))
951 REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_UNUSED, op,
954 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (op));
957 /* Process all inputs */
958 for (i = first_input; i < first_input + n_inputs; i++)
960 if (! STACK_REG_P (operands[i]))
961 if (stack_regs_mentioned_p (operands[i]))
966 /* If an input is dead after the insn, record a death note.
967 But don't record a death note if there is already a death note,
968 or if the input is also an output. */
970 if (! TEST_HARD_REG_BIT (regstack->reg_set, REGNO (operands[i]))
971 && operand_matches[i] == -1
972 && ! find_regno_note (insn, REG_DEAD, REGNO (operands[i])))
973 REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_DEAD, operands[i],
976 SET_HARD_REG_BIT (regstack->reg_set, REGNO (operands[i]));
980 /* Scan PAT, which is part of INSN, and record the life & death of
981 stack registers in REGSTACK. If a register was dead, but is an input
982 operand in this insn, then mark the register live and record a death
985 If a register is dead after this insn, but is an output operand in
986 this insn, record a REG_UNUSED note.
988 This function does not know about SET_DESTs that are both input and
989 output (such as ZERO_EXTRACT) - this cannot happen on a 387. */
992 record_reg_life_pat (insn, regstack, pat)
999 /* We should have already handled any asm. */
1000 if (GET_CODE (pat) == ASM_INPUT || GET_CODE (pat) == ASM_OPERANDS)
1003 if (GET_CODE (pat) != SET)
1006 dest = * get_true_reg (& SET_DEST (pat));
1008 /* The destination is dead before this insn. If the destination is
1009 not used after this insn, record this with REG_UNUSED. */
1011 if (STACK_REG_P (dest))
1013 /* ??? This check is unnecessary. */
1015 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
1018 if (! TEST_HARD_REG_BIT (regstack->reg_set, REGNO (dest)))
1019 REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_UNUSED, dest,
1022 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1025 if (dest != cc0_rtx && stack_regs_mentioned_p (dest))
1028 src = * get_true_reg (& SET_SRC (pat));
1030 switch (GET_CODE (src))
1032 /* ??? get_true_reg will make some of these cases redundant. */
1039 record_note_if_dead (insn, regstack, XEXP (src, 0), dest);
1040 record_note_if_dead (insn, regstack, XEXP (src, 1), dest);
1047 case FLOAT_TRUNCATE:
1049 case UNSIGNED_FLOAT:
1050 record_note_if_dead (insn, regstack, XEXP (src, 0), dest);
1055 src = XEXP (src, 0);
1056 if (GET_CODE (src) == FIX)
1057 record_note_if_dead (insn, regstack, XEXP (src, 0), dest);
1059 record_note_if_dead (insn, regstack, src, dest);
1064 abort (); /* we should have caught this already. */
1068 record_note_if_dead (insn, regstack, src, dest);
1072 /* If a stack register appears in the src RTL, it is a bug, and
1073 code should be added above to handle it. */
1075 if (stack_regs_mentioned_p (src))
1080 /* Calculate the number of inputs and outputs in BODY, an
1081 asm_operands. N_OPERANDS is the total number of operands, and
1082 N_INPUTS and N_OUTPUTS are pointers to ints into which the results are
1086 get_asm_operand_lengths (body, n_operands, n_inputs, n_outputs)
1089 int *n_inputs, *n_outputs;
1091 if (GET_CODE (body) == SET && GET_CODE (SET_SRC (body)) == ASM_OPERANDS)
1092 *n_inputs = ASM_OPERANDS_INPUT_LENGTH (SET_SRC (body));
1094 else if (GET_CODE (body) == ASM_OPERANDS)
1095 *n_inputs = ASM_OPERANDS_INPUT_LENGTH (body);
1097 else if (GET_CODE (body) == PARALLEL
1098 && GET_CODE (XVECEXP (body, 0, 0)) == SET)
1099 *n_inputs = ASM_OPERANDS_INPUT_LENGTH (SET_SRC (XVECEXP (body, 0, 0)));
1101 else if (GET_CODE (body) == PARALLEL
1102 && GET_CODE (XVECEXP (body, 0, 0)) == ASM_OPERANDS)
1103 *n_inputs = ASM_OPERANDS_INPUT_LENGTH (XVECEXP (body, 0, 0));
1107 *n_outputs = n_operands - *n_inputs;
1110 /* Scan INSN, which is in BLOCK, and record the life & death of stack
1111 registers in REGSTACK. This function is called to process insns from
1112 the last insn in a block to the first. The actual scanning is done in
1113 record_reg_life_pat.
1115 If a register is live after a CALL_INSN, but is not a value return
1116 register for that CALL_INSN, then code is emitted to initialize that
1117 register. The block_end[] data is kept accurate.
1119 Existing death and unset notes for stack registers are deleted
1120 before processing the insn. */
1123 record_reg_life (insn, block, regstack)
1128 rtx note, *note_link;
1131 if ((GET_CODE (insn) != INSN && GET_CODE (insn) != CALL_INSN)
1132 || INSN_DELETED_P (insn))
1135 /* Strip death notes for stack regs from this insn */
1137 note_link = ®_NOTES(insn);
1138 for (note = *note_link; note; note = XEXP (note, 1))
1139 if (STACK_REG_P (XEXP (note, 0))
1140 && (REG_NOTE_KIND (note) == REG_DEAD
1141 || REG_NOTE_KIND (note) == REG_UNUSED))
1142 *note_link = XEXP (note, 1);
1144 note_link = &XEXP (note, 1);
1146 /* Process all patterns in the insn. */
1148 n_operands = asm_noperands (PATTERN (insn));
1149 if (n_operands >= 0)
1151 /* This insn is an `asm' with operands. Decode the operands,
1152 decide how many are inputs, and record the life information. */
1154 rtx operands[MAX_RECOG_OPERANDS];
1155 rtx body = PATTERN (insn);
1156 int n_inputs, n_outputs;
1157 char **constraints = (char **) alloca (n_operands * sizeof (char *));
1159 decode_asm_operands (body, operands, 0, constraints, 0);
1160 get_asm_operand_lengths (body, n_operands, &n_inputs, &n_outputs);
1161 record_asm_reg_life (insn, regstack, operands, constraints,
1162 n_inputs, n_outputs);
1166 if (GET_CODE (PATTERN (insn)) == PARALLEL)
1170 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
1171 record_reg_life_pat (insn, regstack, XVECEXP (PATTERN (insn), 0, i));
1173 else if (GET_MODE (insn) == QImode)
1174 record_reg_life_pat (insn, regstack, PATTERN (insn));
1176 /* There might be a reg that is live after a function call.
1177 Initialize it to zero so that the program does not crash. See comment
1178 towards the end of stack_reg_life_analysis(). */
1180 if (GET_CODE (insn) == CALL_INSN)
1182 int reg = FIRST_FLOAT_REG;
1184 /* If a stack reg is mentioned in a CALL_INSN, it must be as the
1185 return value; conversely, if a float is returned, a stack reg
1186 must be mentioned. */
1188 if (stack_regs_mentioned_p (PATTERN (insn)))
1191 for (; reg <= LAST_STACK_REG; reg++)
1192 if (TEST_HARD_REG_BIT (regstack->reg_set, reg))
1196 /* The insn will use virtual register numbers, and so
1197 convert_regs is expected to process these. But BLOCK_NUM
1198 cannot be used on these insns, because they do not appear in
1201 pat = gen_rtx (SET, VOIDmode, FP_mode_reg[reg][(int) DFmode],
1202 CONST0_RTX (DFmode));
1203 init = emit_insn_after (pat, insn);
1204 PUT_MODE (init, QImode);
1206 CLEAR_HARD_REG_BIT (regstack->reg_set, reg);
1208 /* If the CALL_INSN was the end of a block, move the
1209 block_end to point to the new insn. */
1211 if (block_end[block] == insn)
1212 block_end[block] = init;
1215 /* Some regs do not survive a CALL */
1217 AND_COMPL_HARD_REG_SET (regstack->reg_set, call_used_reg_set);
1221 /* Find all basic blocks of the function, which starts with FIRST.
1222 For each JUMP_INSN, build the chain of LABEL_REFS on each CODE_LABEL. */
1230 register RTX_CODE prev_code = BARRIER;
1231 register RTX_CODE code;
1233 /* Record where all the blocks start and end.
1234 Record which basic blocks control can drop in to. */
1237 for (insn = first; insn; insn = NEXT_INSN (insn))
1239 /* Note that this loop must select the same block boundaries
1240 as code in reg_to_stack. */
1242 code = GET_CODE (insn);
1244 if (code == CODE_LABEL
1245 || (prev_code != INSN
1246 && prev_code != CALL_INSN
1247 && prev_code != CODE_LABEL
1248 && (code == INSN || code == CALL_INSN || code == JUMP_INSN)))
1250 block_begin[++block] = insn;
1251 block_end[block] = insn;
1252 block_drops_in[block] = prev_code != BARRIER;
1254 else if (code == INSN || code == CALL_INSN || code == JUMP_INSN)
1255 block_end[block] = insn;
1257 BLOCK_NUM (insn) = block;
1259 if (code == CODE_LABEL)
1260 LABEL_REFS (insn) = insn; /* delete old chain */
1266 if (block + 1 != blocks)
1269 /* generate all label references to the correspondending jump insn */
1270 for (block = 0; block < blocks; block++)
1272 insn = block_end[block];
1274 if (GET_CODE (insn) == JUMP_INSN)
1275 record_label_references (insn, PATTERN (insn));
1279 /* Determine the which registers are live at the start of each basic
1280 block of the function whose first insn is FIRST.
1282 First, if the function returns a real_type, mark the function
1283 return type as live at each return point, as the RTL may not give any
1284 hint that the register is live.
1286 Then, start with the last block and work back to the first block.
1287 Similarly, work backwards within each block, insn by insn, recording
1288 which regs are die and which are used (and therefore live) in the
1289 hard reg set of block_stack_in[].
1291 After processing each basic block, if there is a label at the start
1292 of the block, propagate the live registers to all jumps to this block.
1294 As a special case, if there are regs live in this block, that are
1295 not live in a block containing a jump to this label, and the block
1296 containing the jump has already been processed, we must propagate this
1297 block's entry register life back to the block containing the jump, and
1298 restart life analysis from there.
1300 In the worst case, this function may traverse the insns
1301 REG_STACK_SIZE times. This is necessary, since a jump towards the end
1302 of the insns may not know that a reg is live at a target that is early
1303 in the insns. So we back up and start over with the new reg live.
1305 If there are registers that are live at the start of the function,
1306 insns are emitted to initialize these registers. Something similar is
1307 done after CALL_INSNs in record_reg_life. */
1310 stack_reg_life_analysis (first)
1314 struct stack_def regstack;
1316 if (current_function_returns_real)
1318 /* Find all RETURN insns and mark them. */
1320 for (block = blocks - 1; block >= 0; block--)
1321 if (GET_CODE (block_end[block]) == JUMP_INSN
1322 && GET_CODE (PATTERN (block_end[block])) == RETURN)
1323 SET_HARD_REG_BIT (block_out_reg_set[block], FIRST_STACK_REG);
1325 /* Mark of the end of last block if we "fall off" the end of the
1326 function into the epilogue. */
1328 if (GET_CODE (block_end[blocks-1]) != JUMP_INSN
1329 || GET_CODE (PATTERN (block_end[blocks-1])) == RETURN)
1330 SET_HARD_REG_BIT (block_out_reg_set[blocks-1], FIRST_STACK_REG);
1333 /* now scan all blocks backward for stack register use */
1338 register rtx insn, prev;
1340 /* current register status at last instruction */
1342 COPY_HARD_REG_SET (regstack.reg_set, block_out_reg_set[block]);
1344 prev = block_end[block];
1348 prev = PREV_INSN (insn);
1350 /* If the insn is a CALL_INSN, we need to ensure that
1351 everything dies. But otherwise don't process unless there
1352 are some stack regs present. */
1354 if (GET_MODE (insn) == QImode || GET_CODE (insn) == CALL_INSN)
1355 record_reg_life (insn, block, ®stack);
1357 } while (insn != block_begin[block]);
1359 /* Set the state at the start of the block. Mark that no
1360 register mapping information known yet. */
1362 COPY_HARD_REG_SET (block_stack_in[block].reg_set, regstack.reg_set);
1363 block_stack_in[block].top = -2;
1365 /* If there is a label, propagate our register life to all jumps
1368 if (GET_CODE (insn) == CODE_LABEL)
1371 int must_restart = 0;
1373 for (label = LABEL_REFS (insn); label != insn;
1374 label = LABEL_NEXTREF (label))
1376 int jump_block = BLOCK_NUM (CONTAINING_INSN (label));
1378 if (jump_block < block)
1379 IOR_HARD_REG_SET (block_out_reg_set[jump_block],
1380 block_stack_in[block].reg_set);
1383 /* The block containing the jump has already been
1384 processed. If there are registers that were not known
1385 to be live then, but are live now, we must back up
1386 and restart life analysis from that point with the new
1387 life information. */
1389 GO_IF_HARD_REG_SUBSET (block_stack_in[block].reg_set,
1390 block_out_reg_set[jump_block],
1393 IOR_HARD_REG_SET (block_out_reg_set[jump_block],
1394 block_stack_in[block].reg_set);
1407 if (block_drops_in[block])
1408 IOR_HARD_REG_SET (block_out_reg_set[block-1],
1409 block_stack_in[block].reg_set);
1415 /* If any reg is live at the start of the first block of a
1416 function, then we must guarantee that the reg holds some value by
1417 generating our own "load" of that register. Otherwise a 387 would
1418 fault trying to access an empty register. */
1420 HARD_REG_SET empty_regs;
1421 CLEAR_HARD_REG_SET (empty_regs);
1422 GO_IF_HARD_REG_SUBSET (block_stack_in[0].reg_set, empty_regs,
1426 /* Load zero into each live register. The fact that a register
1427 appears live at the function start does not necessarily imply an error
1428 in the user program: it merely means that we could not determine that
1429 there wasn't such an error, just as -Wunused sometimes gives
1430 "incorrect" warnings. In those cases, these initializations will do
1433 Note that we are inserting virtual register references here:
1434 these insns must be processed by convert_regs later. Also, these
1435 insns will not be in block_number, so BLOCK_NUM() will fail for them. */
1437 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; reg--)
1438 if (TEST_HARD_REG_BIT (block_stack_in[0].reg_set, reg))
1442 init_rtx = gen_rtx (SET, VOIDmode, FP_mode_reg[reg][(int) DFmode],
1443 CONST0_RTX (DFmode));
1444 block_begin[0] = emit_insn_after (init_rtx, first);
1445 PUT_MODE (block_begin[0], QImode);
1447 CLEAR_HARD_REG_BIT (block_stack_in[0].reg_set, reg);
1454 /*****************************************************************************
1455 This section deals with stack register substitution, and forms the second
1457 *****************************************************************************/
1459 /* Replace REG, which is a pointer to a stack reg RTX, with an RTX for
1460 the desired hard REGNO. */
1463 replace_reg (reg, regno)
1467 if (regno < FIRST_STACK_REG || regno > LAST_STACK_REG
1468 || ! STACK_REG_P (*reg))
1471 if (GET_MODE_CLASS (GET_MODE (*reg)) != MODE_FLOAT)
1474 *reg = FP_mode_reg[regno][(int) GET_MODE (*reg)];
1477 /* Remove a note of type NOTE, which must be found, for register
1478 number REGNO from INSN. Remove only one such note. */
1481 remove_regno_note (insn, note, regno)
1486 register rtx *note_link, this;
1488 note_link = ®_NOTES(insn);
1489 for (this = *note_link; this; this = XEXP (this, 1))
1490 if (REG_NOTE_KIND (this) == note
1491 && REG_P (XEXP (this, 0)) && REGNO (XEXP (this, 0)) == regno)
1493 *note_link = XEXP (this, 1);
1497 note_link = &XEXP (this, 1);
1502 /* Find the hard register number of virtual register REG in REGSTACK.
1503 The hard register number is relative to the top of the stack. -1 is
1504 returned if the register is not found. */
1507 get_hard_regnum (regstack, reg)
1513 if (! STACK_REG_P (reg))
1516 for (i = regstack->top; i >= 0; i--)
1517 if (regstack->reg[i] == REGNO (reg))
1520 return i >= 0 ? (FIRST_STACK_REG + regstack->top - i) : -1;
1523 /* Delete INSN from the RTL. Mark the insn, but don't remove it from
1524 the chain of insns. Doing so could confuse block_begin and block_end
1525 if this were the only insn in the block. */
1528 delete_insn_for_stacker (insn)
1531 PUT_CODE (insn, NOTE);
1532 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
1533 NOTE_SOURCE_FILE (insn) = 0;
1534 INSN_DELETED_P (insn) = 1;
1537 /* Emit an insn to pop virtual register REG before or after INSN.
1538 REGSTACK is the stack state after INSN and is updated to reflect this
1539 pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn
1540 is represented as a SET whose destination is the register to be popped
1541 and source is the top of stack. A death note for the top of stack
1542 cases the movdf pattern to pop. */
1545 emit_pop_insn (insn, regstack, reg, when)
1551 rtx pop_insn, pop_rtx;
1554 hard_regno = get_hard_regnum (regstack, reg);
1556 if (hard_regno < FIRST_STACK_REG)
1559 pop_rtx = gen_rtx (SET, VOIDmode, FP_mode_reg[hard_regno][(int) DFmode],
1560 FP_mode_reg[FIRST_STACK_REG][(int) DFmode]);
1562 pop_insn = (*when) (pop_rtx, insn);
1563 PUT_MODE (pop_insn, VOIDmode);
1565 REG_NOTES (pop_insn) = gen_rtx (EXPR_LIST, REG_DEAD,
1566 FP_mode_reg[FIRST_STACK_REG][(int) DFmode],
1567 REG_NOTES (pop_insn));
1569 regstack->reg[regstack->top - (hard_regno - FIRST_STACK_REG)]
1570 = regstack->reg[regstack->top];
1572 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (reg));
1577 /* Emit an insn before or after INSN to swap virtual register REG with the
1578 top of stack. WHEN should be `emit_insn_before' or `emit_insn_before'
1579 REGSTACK is the stack state before the swap, and is updated to reflect
1580 the swap. A swap insn is represented as a PARALLEL of two patterns:
1581 each pattern moves one reg to the other.
1583 If REG is already at the top of the stack, no insn is emitted. */
1586 emit_hard_swap_insn (insn, regstack, hard_regno, when)
1593 rtx swap_rtx, swap_insn;
1596 if (hard_regno == FIRST_STACK_REG)
1599 swap_rtx = gen_swapdf (FP_mode_reg[hard_regno][(int) DFmode],
1600 FP_mode_reg[FIRST_STACK_REG][(int) DFmode]);
1601 swap_insn = (*when) (swap_rtx, insn);
1602 PUT_MODE (swap_insn, VOIDmode);
1604 other = regstack->top - (hard_regno - FIRST_STACK_REG);
1606 tmp = regstack->reg[other];
1607 regstack->reg[other] = regstack->reg[regstack->top];
1608 regstack->reg[regstack->top] = tmp;
1611 /* Emit an insn before or after INSN to swap virtual register REG with the
1612 top of stack. See comments before emit_hard_swap_insn. */
1615 emit_swap_insn (insn, regstack, reg, when)
1623 hard_regno = get_hard_regnum (regstack, reg);
1624 if (hard_regno < FIRST_STACK_REG)
1627 emit_hard_swap_insn (insn, regstack, hard_regno, when);
1630 /* Handle a move to or from a stack register in PAT, which is in INSN.
1631 REGSTACK is the current stack. */
1634 move_for_stack_reg (insn, regstack, pat)
1639 rtx *src = get_true_reg (&SET_SRC (pat));
1640 rtx *dest = get_true_reg (&SET_DEST (pat));
1643 if (STACK_REG_P (*src) && STACK_REG_P (*dest))
1645 /* Write from one stack reg to another. If SRC dies here, then
1646 just change the register mapping and delete the insn. */
1648 note = find_regno_note (insn, REG_DEAD, REGNO (*src));
1653 /* If this is a no-op move, there must not be a REG_DEAD note. */
1654 if (REGNO (*src) == REGNO (*dest))
1657 for (i = regstack->top; i >= 0; i--)
1658 if (regstack->reg[i] == REGNO (*src))
1661 /* The source must be live, and the dest must be dead. */
1662 if (i < 0 || get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG)
1665 /* It is possible that the dest is unused after this insn.
1666 If so, just pop the src. */
1668 if (find_regno_note (insn, REG_UNUSED, REGNO (*dest)))
1670 emit_pop_insn (insn, regstack, *src, emit_insn_after);
1672 delete_insn_for_stacker (insn);
1676 regstack->reg[i] = REGNO (*dest);
1678 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1679 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src));
1681 delete_insn_for_stacker (insn);
1686 /* The source reg does not die. */
1688 /* If this appears to be a no-op move, delete it, or else it
1689 will confuse the machine description output patterns. But if
1690 it is REG_UNUSED, we must pop the reg now, as per-insn processing
1691 for REG_UNUSED will not work for deleted insns. */
1693 if (REGNO (*src) == REGNO (*dest))
1695 if (find_regno_note (insn, REG_UNUSED, REGNO (*dest)))
1696 emit_pop_insn (insn, regstack, *dest, emit_insn_after);
1698 delete_insn_for_stacker (insn);
1702 /* The destination ought to be dead */
1703 if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG)
1706 replace_reg (src, get_hard_regnum (regstack, *src));
1708 regstack->reg[++regstack->top] = REGNO (*dest);
1709 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1710 replace_reg (dest, FIRST_STACK_REG);
1712 else if (STACK_REG_P (*src))
1714 /* Save from a stack reg to MEM, or possibly integer reg. Since
1715 only top of stack may be saved, emit an exchange first if
1718 emit_swap_insn (insn, regstack, *src, emit_insn_before);
1720 note = find_regno_note (insn, REG_DEAD, REGNO (*src));
1723 replace_reg (&XEXP (note, 0), FIRST_STACK_REG);
1725 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src));
1728 replace_reg (src, FIRST_STACK_REG);
1730 else if (STACK_REG_P (*dest))
1732 /* Load from MEM, or possibly integer REG or constant, into the
1733 stack regs. The actual target is always the top of the
1734 stack. The stack mapping is changed to reflect that DEST is
1735 now at top of stack. */
1737 /* The destination ought to be dead */
1738 if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG)
1741 if (regstack->top >= REG_STACK_SIZE)
1744 regstack->reg[++regstack->top] = REGNO (*dest);
1745 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1746 replace_reg (dest, FIRST_STACK_REG);
1752 /* Handle a comparison. Special care needs to be taken to avoid
1753 causing comparisons that a 387 cannot do correctly, such as EQ.
1755 Also, a pop insn may need to be emitted. The 387 does have an
1756 `fcompp' insn that can pop two regs, but it is sometimes too expensive
1757 to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to
1761 compare_for_stack_reg (insn, regstack, pat)
1767 rtx src1_note, src2_note;
1769 src1 = get_true_reg (&XEXP (SET_SRC (pat), 0));
1770 src2 = get_true_reg (&XEXP (SET_SRC (pat), 1));
1772 /* The first argument must always be a stack reg. */
1775 if (! STACK_REG_P (*src1))
1778 /* We will fix any death note later. */
1780 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1782 if (STACK_REG_P (*src2))
1783 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1787 emit_swap_insn (insn, regstack, *src1, emit_insn_before);
1789 replace_reg (src1, FIRST_STACK_REG);
1791 if (STACK_REG_P (*src2))
1792 replace_reg (src2, get_hard_regnum (regstack, *src2));
1796 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (XEXP (src1_note, 0)));
1797 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1801 /* If the second operand dies, handle that. But if the operands are
1802 the same stack register, don't bother, because only one death is
1803 needed, and it was just handled. */
1806 && ! (STACK_REG_P (*src1)
1807 && STACK_REG_P (*src2)
1808 && REGNO (*src1) == REGNO (*src2)))
1810 /* As a special case, two regs may die in this insn if src2 is
1811 next to top of stack and the top of stack also dies. Since
1812 we have already popped src1, "next to top of stack" is really
1813 at top (FIRST_STACK_REG) now. */
1815 if (get_hard_regnum (regstack, XEXP (src2_note, 0)) == FIRST_STACK_REG
1818 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (XEXP (src2_note, 0)));
1819 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1);
1824 /* The 386 can only represent death of the first operand in
1825 the case handled above. In all other cases, emit a separate
1826 pop and remove the death note from here. */
1828 link_cc0_insns (insn);
1830 remove_regno_note (insn, REG_DEAD, REGNO (XEXP (src2_note, 0)));
1832 emit_pop_insn (insn, regstack, XEXP (src2_note, 0),
1838 /* Substitute new registers in PAT, which is part of INSN. REGSTACK
1839 is the current register layout. */
1842 subst_stack_regs_pat (insn, regstack, pat)
1848 rtx *src1 = 0, *src2;
1849 rtx src1_note, src2_note;
1851 if (GET_CODE (pat) != SET)
1854 dest = get_true_reg (&SET_DEST (pat));
1855 src = get_true_reg (&SET_SRC (pat));
1857 /* See if this is a `movM' pattern, and handle elsewhere if so. */
1859 if (*dest != cc0_rtx
1860 && (STACK_REG_P (*src)
1861 || (STACK_REG_P (*dest)
1862 && (GET_CODE (*src) == REG || GET_CODE (*src) == MEM
1863 || GET_CODE (*src) == CONST_DOUBLE))))
1864 move_for_stack_reg (insn, regstack, pat);
1866 switch (GET_CODE (SET_SRC (pat)))
1869 compare_for_stack_reg (insn, regstack, pat);
1873 regstack->reg[++regstack->top] = REGNO (*dest);
1874 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1875 replace_reg (dest, FIRST_STACK_REG);
1879 /* This is a `tstM2' case. */
1880 if (*dest != cc0_rtx)
1890 /* These insns only operate on the top of the stack. DEST might
1891 be cc0_rtx if we're processing a tstM pattern. Also, it's
1892 possible that the tstM case results in a REG_DEAD note on the
1896 src1 = get_true_reg (&XEXP (SET_SRC (pat), 0));
1898 emit_swap_insn (insn, regstack, *src1, emit_insn_before);
1900 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1902 if (STACK_REG_P (*dest))
1903 replace_reg (dest, FIRST_STACK_REG);
1907 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1909 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
1912 replace_reg (src1, FIRST_STACK_REG);
1918 /* On i386, reversed forms of subM3 and divM3 exist for
1919 MODE_FLOAT, so the same code that works for addM3 and mulM3
1923 /* These insns can accept the top of stack as a destination
1924 from a stack reg or mem, or can use the top of stack as a
1925 source and some other stack register (possibly top of stack)
1926 as a destination. */
1928 src1 = get_true_reg (&XEXP (SET_SRC (pat), 0));
1929 src2 = get_true_reg (&XEXP (SET_SRC (pat), 1));
1931 /* We will fix any death note later. */
1933 if (STACK_REG_P (*src1))
1934 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1937 if (STACK_REG_P (*src2))
1938 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1942 /* If either operand is not a stack register, then the dest
1943 must be top of stack. */
1945 if (! STACK_REG_P (*src1) || ! STACK_REG_P (*src2))
1946 emit_swap_insn (insn, regstack, *dest, emit_insn_before);
1949 /* Both operands are REG. If neither operand is already
1950 at the top of stack, choose to make the one that is the dest
1951 the new top of stack.
1953 ??? A later optimization here would be to look forward
1954 in the insns and see which source reg will be needed at top
1955 of stack soonest. */
1957 int src1_hard_regnum, src2_hard_regnum;
1959 src1_hard_regnum = get_hard_regnum (regstack, *src1);
1960 src2_hard_regnum = get_hard_regnum (regstack, *src2);
1961 if (src1_hard_regnum == -1 || src2_hard_regnum == -1)
1964 if (src1_hard_regnum != FIRST_STACK_REG
1965 && src2_hard_regnum != FIRST_STACK_REG)
1966 emit_swap_insn (insn, regstack, *dest, emit_insn_before);
1969 if (STACK_REG_P (*src1))
1970 replace_reg (src1, get_hard_regnum (regstack, *src1));
1971 if (STACK_REG_P (*src2))
1972 replace_reg (src2, get_hard_regnum (regstack, *src2));
1976 /* If the register that dies is at the top of stack, then
1977 the destination is somewhere else - merely substitute it.
1978 But if the reg that dies is not at top of stack, then
1979 move the top of stack to the dead reg, as though we had
1980 done the insn and then a store-with-pop. */
1982 if (REGNO (XEXP (src1_note, 0)) == regstack->reg[regstack->top])
1984 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1985 replace_reg (dest, get_hard_regnum (regstack, *dest));
1989 int regno = get_hard_regnum (regstack, XEXP (src1_note, 0));
1991 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1992 replace_reg (dest, regno);
1994 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
1995 = regstack->reg[regstack->top];
1998 CLEAR_HARD_REG_BIT (regstack->reg_set,
1999 REGNO (XEXP (src1_note, 0)));
2000 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
2005 if (REGNO (XEXP (src2_note, 0)) == regstack->reg[regstack->top])
2007 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
2008 replace_reg (dest, get_hard_regnum (regstack, *dest));
2012 int regno = get_hard_regnum (regstack, XEXP (src2_note, 0));
2014 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
2015 replace_reg (dest, regno);
2017 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
2018 = regstack->reg[regstack->top];
2021 CLEAR_HARD_REG_BIT (regstack->reg_set,
2022 REGNO (XEXP (src2_note, 0)));
2023 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG);
2028 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
2029 replace_reg (dest, get_hard_regnum (regstack, *dest));
2039 /* Substitute hard regnums for any stack regs in INSN, which has
2040 N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info
2041 before the insn, and is updated with changes made here. CONSTAINTS is
2042 an array of the constraint strings used in the asm statement.
2044 OPERANDS is an array of the operands, and OPERANDS_LOC is a
2045 parallel array of where the operands were found. The output operands
2046 all preceed the input operands.
2048 There are several requirements and assumptions about the use of
2049 stack-like regs in asm statements. These rules are enforced by
2050 record_asm_stack_regs; see comments there for details. Any
2051 asm_operands left in the RTL at this point may be assume to meet the
2052 requirements, since record_asm_stack_regs removes any problem asm. */
2055 subst_asm_stack_regs (insn, regstack, operands, operands_loc, constraints,
2056 n_inputs, n_outputs)
2059 rtx *operands, **operands_loc;
2061 int n_inputs, n_outputs;
2063 int n_operands = n_inputs + n_outputs;
2064 int first_input = n_outputs;
2065 rtx body = PATTERN (insn);
2067 int *operand_matches = (int *) alloca (n_operands * sizeof (int *));
2068 enum reg_class *operand_class
2069 = (enum reg_class *) alloca (n_operands * sizeof (enum reg_class *));
2071 rtx *note_reg; /* Array of note contents */
2072 rtx **note_loc; /* Address of REG field of each note */
2073 enum reg_note *note_kind; /* The type of each note */
2078 struct stack_def temp_stack;
2084 /* Find out what the constraints required. If no constraint
2085 alternative matches, that is a compiler bug: we should have caught
2086 such an insn during the life analysis pass (and reload should have
2087 caught it regardless). */
2089 i = constrain_asm_operands (n_operands, operands, constraints,
2090 operand_matches, operand_class);
2094 /* Strip SUBREGs here to make the following code simpler. */
2095 for (i = 0; i < n_operands; i++)
2096 if (GET_CODE (operands[i]) == SUBREG
2097 && GET_CODE (SUBREG_REG (operands[i])) == REG)
2099 operands_loc[i] = & SUBREG_REG (operands[i]);
2100 operands[i] = SUBREG_REG (operands[i]);
2103 /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */
2105 for (i = 0, note = REG_NOTES (insn); note; note = XEXP (note, 1))
2108 note_reg = (rtx *) alloca (i * sizeof (rtx));
2109 note_loc = (rtx **) alloca (i * sizeof (rtx *));
2110 note_kind = (enum reg_note *) alloca (i * sizeof (enum reg_note));
2113 for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
2115 rtx reg = XEXP (note, 0);
2116 rtx *loc = & XEXP (note, 0);
2118 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
2120 loc = & SUBREG_REG (reg);
2121 reg = SUBREG_REG (reg);
2124 if (STACK_REG_P (reg)
2125 && (REG_NOTE_KIND (note) == REG_DEAD
2126 || REG_NOTE_KIND (note) == REG_UNUSED))
2128 note_reg[n_notes] = reg;
2129 note_loc[n_notes] = loc;
2130 note_kind[n_notes] = REG_NOTE_KIND (note);
2135 /* Set up CLOBBER_REG and CLOBBER_LOC. */
2139 if (GET_CODE (body) == PARALLEL)
2141 clobber_reg = (rtx *) alloca (XVECLEN (body, 0) * sizeof (rtx *));
2142 clobber_loc = (rtx **) alloca (XVECLEN (body, 0) * sizeof (rtx **));
2144 for (i = 0; i < XVECLEN (body, 0); i++)
2145 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
2147 rtx clobber = XVECEXP (body, 0, i);
2148 rtx reg = XEXP (clobber, 0);
2149 rtx *loc = & XEXP (clobber, 0);
2151 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
2153 loc = & SUBREG_REG (reg);
2154 reg = SUBREG_REG (reg);
2157 if (STACK_REG_P (reg))
2159 clobber_reg[n_clobbers] = reg;
2160 clobber_loc[n_clobbers] = loc;
2166 bcopy (regstack, &temp_stack, sizeof (temp_stack));
2168 /* Put the input regs into the desired place in TEMP_STACK. */
2170 for (i = first_input; i < first_input + n_inputs; i++)
2171 if (STACK_REG_P (operands[i])
2172 && reg_class_subset_p (operand_class[i], FLOAT_REGS)
2173 && operand_class[i] != FLOAT_REGS)
2175 /* If an operand needs to be in a particular reg in
2176 FLOAT_REGS, the constraint was either 't' or 'u'. Since
2177 these constraints are for single register classes, and reload
2178 guaranteed that operand[i] is already in that class, we can
2179 just use REGNO (operands[i]) to know which actual reg this
2180 operand needs to be in. */
2182 int regno = get_hard_regnum (&temp_stack, operands[i]);
2187 if (regno != REGNO (operands[i]))
2189 /* operands[i] is not in the right place. Find it
2190 and swap it with whatever is already in I's place.
2191 K is where operands[i] is now. J is where it should
2195 k = temp_stack.top - (regno - FIRST_STACK_REG);
2197 - (REGNO (operands[i]) - FIRST_STACK_REG));
2199 temp = temp_stack.reg[k];
2200 temp_stack.reg[k] = temp_stack.reg[j];
2201 temp_stack.reg[j] = temp;
2205 /* emit insns before INSN to make sure the reg-stack is in the right
2208 change_stack (insn, regstack, &temp_stack, emit_insn_before);
2210 /* Make the needed input register substitutions. Do death notes and
2211 clobbers too, because these are for inputs, not outputs. */
2213 for (i = first_input; i < first_input + n_inputs; i++)
2214 if (STACK_REG_P (operands[i]))
2216 int regnum = get_hard_regnum (regstack, operands[i]);
2221 replace_reg (operands_loc[i], regnum);
2224 for (i = 0; i < n_notes; i++)
2225 if (note_kind[i] == REG_DEAD)
2227 int regnum = get_hard_regnum (regstack, note_reg[i]);
2232 replace_reg (note_loc[i], regnum);
2235 for (i = 0; i < n_clobbers; i++)
2237 /* It's OK for a CLOBBER to reference a reg that is not live.
2238 Don't try to replace it in that case. */
2239 int regnum = get_hard_regnum (regstack, clobber_reg[i]);
2243 /* Sigh - clobbers always have QImode. But replace_reg knows
2244 that these regs can't be MODE_INT and will abort. Just put
2245 the right reg there without calling replace_reg. */
2247 *clobber_loc[i] = FP_mode_reg[regnum][(int) DFmode];
2251 /* Now remove from REGSTACK any inputs that the asm implicitly popped. */
2253 for (i = first_input; i < first_input + n_inputs; i++)
2254 if (STACK_REG_P (operands[i]))
2256 /* An input reg is implicitly popped if it is tied to an
2257 output, or if there is a CLOBBER for it. */
2260 for (j = 0; j < n_clobbers; j++)
2261 if (operands_match_p (clobber_reg[j], operands[i]))
2264 if (j < n_clobbers || operand_matches[i] >= 0)
2266 /* operands[i] might not be at the top of stack. But that's OK,
2267 because all we need to do is pop the right number of regs
2268 off of the top of the reg-stack. record_asm_stack_regs
2269 guaranteed that all implicitly popped regs were grouped
2270 at the top of the reg-stack. */
2272 CLEAR_HARD_REG_BIT (regstack->reg_set,
2273 regstack->reg[regstack->top]);
2278 /* Now add to REGSTACK any outputs that the asm implicitly pushed.
2279 Note that there isn't any need to substitute register numbers.
2280 ??? Explain why this is true. */
2282 for (i = LAST_STACK_REG; i >= FIRST_STACK_REG; i--)
2284 /* See if there is an output for this hard reg. */
2287 for (j = 0; j < n_outputs; j++)
2288 if (STACK_REG_P (operands[j]) && REGNO (operands[j]) == i)
2290 regstack->reg[++regstack->top] = i;
2291 SET_HARD_REG_BIT (regstack->reg_set, i);
2296 /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD
2297 input that the asm didn't implicitly pop. If the asm didn't
2298 implicitly pop an input reg, that reg will still be live.
2300 Note that we can't use find_regno_note here: the register numbers
2301 in the death notes have already been substituted. */
2303 for (i = 0; i < n_outputs; i++)
2304 if (STACK_REG_P (operands[i]))
2308 for (j = 0; j < n_notes; j++)
2309 if (REGNO (operands[i]) == REGNO (note_reg[j])
2310 && note_kind[j] == REG_UNUSED)
2312 insn = emit_pop_insn (insn, regstack, operands[i],
2318 for (i = first_input; i < first_input + n_inputs; i++)
2319 if (STACK_REG_P (operands[i]))
2323 for (j = 0; j < n_notes; j++)
2324 if (REGNO (operands[i]) == REGNO (note_reg[j])
2325 && note_kind[j] == REG_DEAD
2326 && TEST_HARD_REG_BIT (regstack->reg_set, REGNO (operands[i])))
2328 insn = emit_pop_insn (insn, regstack, operands[i],
2335 /* Substitute stack hard reg numbers for stack virtual registers in
2336 INSN. Non-stack register numbers are not changed. REGSTACK is the
2337 current stack content. Insns may be emitted as needed to arrange the
2338 stack for the 387 based on the contents of the insn. */
2341 subst_stack_regs (insn, regstack)
2345 register rtx *note_link, note;
2349 if ((GET_CODE (insn) != INSN && GET_CODE (insn) != CALL_INSN)
2350 || INSN_DELETED_P (insn))
2353 /* The stack should be empty at a call. */
2355 if (GET_CODE (insn) == CALL_INSN)
2356 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
2357 if (TEST_HARD_REG_BIT (regstack->reg_set, i))
2360 /* Do the actual substitution if any stack regs are mentioned.
2361 Since we only record whether entire insn mentions stack regs, and
2362 subst_stack_regs_pat only works for patterns that contain stack regs,
2363 we must check each pattern in a parallel here. A call_value_pop could
2366 if (GET_MODE (insn) == QImode)
2368 n_operands = asm_noperands (PATTERN (insn));
2369 if (n_operands >= 0)
2371 /* This insn is an `asm' with operands. Decode the operands,
2372 decide how many are inputs, and do register substitution.
2373 Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */
2375 rtx operands[MAX_RECOG_OPERANDS];
2376 rtx *operands_loc[MAX_RECOG_OPERANDS];
2377 rtx body = PATTERN (insn);
2378 int n_inputs, n_outputs;
2380 = (char **) alloca (n_operands * sizeof (char *));
2382 decode_asm_operands (body, operands, operands_loc, constraints, 0);
2383 get_asm_operand_lengths (body, n_operands, &n_inputs, &n_outputs);
2384 subst_asm_stack_regs (insn, regstack, operands, operands_loc,
2385 constraints, n_inputs, n_outputs);
2389 if (GET_CODE (PATTERN (insn)) == PARALLEL)
2390 for (i = 0; i < XVECLEN (PATTERN (insn) , 0); i++)
2392 if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn), 0, i)))
2393 subst_stack_regs_pat (insn, regstack,
2394 XVECEXP (PATTERN (insn), 0, i));
2397 subst_stack_regs_pat (insn, regstack, PATTERN (insn));
2400 /* subst_stack_regs_pat may have deleted a no-op insn. If so, any
2401 REG_UNUSED will already have been dealt with, so just return. */
2403 if (INSN_DELETED_P (insn))
2406 /* If there is a REG_UNUSED note on a stack register on this insn,
2407 the indicated reg must be popped. The REG_UNUSED note is removed,
2408 since the form of the newly emitted pop insn references the reg,
2409 making it no longer `unset'. */
2411 note_link = ®_NOTES(insn);
2412 for (note = *note_link; note; note = XEXP (note, 1))
2413 if (REG_NOTE_KIND (note) == REG_UNUSED && STACK_REG_P (XEXP (note, 0)))
2415 *note_link = XEXP (note, 1);
2416 insn = emit_pop_insn (insn, regstack, XEXP (note, 0), emit_insn_after);
2419 note_link = &XEXP (note, 1);
2422 /* Change the organization of the stack so that it fits a new basic
2423 block. Some registers might have to be popped, but there can never be
2424 a register live in the new block that is not now live.
2426 Insert any needed insns before or after INSN. WHEN is emit_insn_before
2427 or emit_insn_after. OLD is the original stack layout, and NEW is
2428 the desired form. OLD is updated to reflect the code emitted, ie, it
2429 will be the same as NEW upon return.
2431 This function will not preserve block_end[]. But that information
2432 is no longer needed once this has executed. */
2435 change_stack (insn, old, new, when)
2443 /* We will be inserting new insns "backwards", by calling emit_insn_before.
2444 If we are to insert after INSN, find the next insn, and insert before
2447 if (when == emit_insn_after)
2448 insn = NEXT_INSN (insn);
2450 /* Pop any registers that are not needed in the new block. */
2452 for (reg = old->top; reg >= 0; reg--)
2453 if (! TEST_HARD_REG_BIT (new->reg_set, old->reg[reg]))
2454 emit_pop_insn (insn, old, FP_mode_reg[old->reg[reg]][(int) DFmode],
2459 /* If the new block has never been processed, then it can inherit
2460 the old stack order. */
2462 new->top = old->top;
2463 bcopy (old->reg, new->reg, sizeof (new->reg));
2467 /* This block has been entered before, and we must match the
2468 previously selected stack order. */
2470 /* By now, the only difference should be the order of the stack,
2471 not their depth or liveliness. */
2473 GO_IF_HARD_REG_EQUAL (old->reg_set, new->reg_set, win);
2479 if (old->top != new->top)
2482 /* Loop here emitting swaps until the stack is correct. The
2483 worst case number of swaps emitted is N + 2, where N is the
2484 depth of the stack. In some cases, the reg at the top of
2485 stack may be correct, but swapped anyway in order to fix
2486 other regs. But since we never swap any other reg away from
2487 its correct slot, this algorithm will converge. */
2491 /* Swap the reg at top of stack into the position it is
2492 supposed to be in, until the correct top of stack appears. */
2494 while (old->reg[old->top] != new->reg[new->top])
2496 for (reg = new->top; reg >= 0; reg--)
2497 if (new->reg[reg] == old->reg[old->top])
2503 emit_swap_insn (insn, old,
2504 FP_mode_reg[old->reg[reg]][(int) DFmode],
2508 /* See if any regs remain incorrect. If so, bring an
2509 incorrect reg to the top of stack, and let the while loop
2512 for (reg = new->top; reg >= 0; reg--)
2513 if (new->reg[reg] != old->reg[reg])
2515 emit_swap_insn (insn, old,
2516 FP_mode_reg[old->reg[reg]][(int) DFmode],
2522 /* At this point there must be no differences. */
2524 for (reg = old->top; reg >= 0; reg--)
2525 if (old->reg[reg] != new->reg[reg])
2530 /* Check PAT, which points to RTL in INSN, for a LABEL_REF. If it is
2531 found, ensure that a jump from INSN to the code_label to which the
2532 label_ref points ends up with the same stack as that at the
2533 code_label. Do this by inserting insns just before the code_label to
2534 pop and rotate the stack until it is in the correct order. REGSTACK
2535 is the order of the register stack in INSN.
2537 Any code that is emitted here must not be later processed as part
2538 of any block, as it will already contain hard register numbers. */
2541 goto_block_pat (insn, regstack, pat)
2547 rtx new_jump, new_label, new_barrier;
2550 struct stack_def temp_stack;
2553 if (GET_CODE (pat) != LABEL_REF)
2556 char *fmt = GET_RTX_FORMAT (GET_CODE (pat));
2558 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
2561 goto_block_pat (insn, regstack, XEXP (pat, i));
2563 for (j = 0; j < XVECLEN (pat, i); j++)
2564 goto_block_pat (insn, regstack, XVECEXP (pat, i, j));
2569 label = XEXP (pat, 0);
2570 if (GET_CODE (label) != CODE_LABEL)
2573 /* First, see if in fact anything needs to be done to the stack at all. */
2575 label_stack = &block_stack_in[BLOCK_NUM (label)];
2577 if (label_stack->top == -2)
2579 /* If the target block hasn't had a stack order selected, then
2580 we need merely ensure that no pops are needed. */
2582 for (reg = regstack->top; reg >= 0; reg--)
2583 if (! TEST_HARD_REG_BIT (label_stack->reg_set, regstack->reg[reg]))
2588 /* change_stack will not emit any code in this case. */
2590 change_stack (label, regstack, label_stack, emit_insn_after);
2594 else if (label_stack->top == regstack->top)
2596 for (reg = label_stack->top; reg >= 0; reg--)
2597 if (label_stack->reg[reg] != regstack->reg[reg])
2604 /* At least one insn will need to be inserted before label. Insert
2605 a jump around the code we are about to emit. Emit a label for the new
2606 code, and point the original insn at this new label. We can't use
2607 redirect_jump here, because we're using fld[4] of the code labels as
2608 LABEL_REF chains, no NUSES counters. */
2610 new_jump = emit_jump_insn_before (gen_jump (label), label);
2611 record_label_references (new_jump, PATTERN (new_jump));
2612 JUMP_LABEL (new_jump) = label;
2614 new_barrier = emit_barrier_after (new_jump);
2616 new_label = gen_label_rtx ();
2617 emit_label_after (new_label, new_barrier);
2618 LABEL_REFS (new_label) = new_label;
2620 /* The old label_ref will no longer point to the code_label if now uses,
2621 so strip the label_ref from the code_label's chain of references. */
2623 for (ref = &LABEL_REFS (label); *ref != label; ref = &LABEL_NEXTREF (*ref))
2630 *ref = LABEL_NEXTREF (*ref);
2632 XEXP (pat, 0) = new_label;
2633 record_label_references (insn, PATTERN (insn));
2635 if (JUMP_LABEL (insn) == label)
2636 JUMP_LABEL (insn) = new_label;
2638 /* Now emit the needed code. */
2640 temp_stack = *regstack;
2642 change_stack (new_label, &temp_stack, label_stack, emit_insn_after);
2645 /* Traverse all basic blocks in a function, converting the register
2646 references in each insn from the "flat" register file that gcc uses, to
2647 the stack-like registers the 387 uses. */
2652 register int block, reg;
2653 register rtx insn, next;
2654 struct stack_def regstack;
2656 for (block = 0; block < blocks; block++)
2658 if (block_stack_in[block].top == -2)
2660 /* This block has not been previously encountered. Choose a
2661 default mapping for any stack regs live on entry */
2663 block_stack_in[block].top = -1;
2665 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; reg--)
2666 if (TEST_HARD_REG_BIT (block_stack_in[block].reg_set, reg))
2667 block_stack_in[block].reg[++block_stack_in[block].top] = reg;
2670 /* Process all insns in this block. Keep track of `next' here,
2671 so that we don't process any insns emitted while making
2672 substitutions in INSN. */
2674 next = block_begin[block];
2675 regstack = block_stack_in[block];
2679 next = NEXT_INSN (insn);
2681 /* Don't bother processing unless there is a stack reg
2684 ??? For now, process CALL_INSNs too to make sure that the
2685 stack regs are dead after a call. Remove this eventually. */
2687 if (GET_MODE (insn) == QImode || GET_CODE (insn) == CALL_INSN)
2688 subst_stack_regs (insn, ®stack);
2690 } while (insn != block_end[block]);
2692 /* Something failed if the stack life doesn't match. */
2694 GO_IF_HARD_REG_EQUAL (regstack.reg_set, block_out_reg_set[block], win);
2700 /* Adjust the stack of this block on exit to match the stack of
2701 the target block, or copy stack information into stack of
2702 jump target if the target block's stack order hasn't been set
2705 if (GET_CODE (insn) == JUMP_INSN)
2706 goto_block_pat (insn, ®stack, PATTERN (insn));
2708 /* Likewise handle the case where we fall into the next block. */
2710 if ((block < blocks - 1) && block_drops_in[block+1])
2711 change_stack (insn, ®stack, &block_stack_in[block+1],
2715 /* If the last basic block is the end of a loop, and that loop has
2716 regs live at its start, then the last basic block will have regs live
2717 at its end that need to be popped before the function returns. */
2719 for (reg = regstack.top; reg >= 0; reg--)
2720 if (! current_function_returns_real
2721 || regstack.reg[reg] != FIRST_STACK_REG)
2722 insn = emit_pop_insn (insn, ®stack,
2723 FP_mode_reg[regstack.reg[reg]][(int) DFmode],
2727 /* Check expression PAT, which is in INSN, for label references. if
2728 one is found, print the block number of destination to FILE. */
2731 print_blocks (file, insn, pat)
2735 register RTX_CODE code = GET_CODE (pat);
2739 if (code == LABEL_REF)
2741 register rtx label = XEXP (pat, 0);
2743 if (GET_CODE (label) != CODE_LABEL)
2746 fprintf (file, " %d", BLOCK_NUM (label));
2751 fmt = GET_RTX_FORMAT (code);
2752 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2755 print_blocks (file, insn, XEXP (pat, i));
2759 for (j = 0; j < XVECLEN (pat, i); j++)
2760 print_blocks (file, insn, XVECEXP (pat, i, j));
2765 /* Write information about stack registers and stack blocks into FILE.
2766 This is part of making a debugging dump. */
2768 dump_stack_info (file)
2773 fprintf (file, "\n%d stack blocks.\n", blocks);
2774 for (block = 0; block < blocks; block++)
2776 register rtx head, jump, end;
2779 fprintf (file, "\nStack block %d: first insn %d, last %d.\n",
2780 block, INSN_UID (block_begin[block]),
2781 INSN_UID (block_end[block]));
2783 head = block_begin[block];
2785 fprintf (file, "Reached from blocks: ");
2786 if (GET_CODE (head) == CODE_LABEL)
2787 for (jump = LABEL_REFS (head);
2789 jump = LABEL_NEXTREF (jump))
2791 register int from_block = BLOCK_NUM (CONTAINING_INSN (jump));
2792 fprintf (file, " %d", from_block);
2794 if (block_drops_in[block])
2795 fprintf (file, " previous");
2797 fprintf (file, "\nlive stack registers on block entry: ");
2798 for (regno = FIRST_STACK_REG; regno <= LAST_STACK_REG ; regno++)
2800 if (TEST_HARD_REG_BIT (block_stack_in[block].reg_set, regno))
2801 fprintf (file, "%d ", regno);
2804 fprintf (file, "\nlive stack registers on block exit: ");
2805 for (regno = FIRST_STACK_REG; regno <= LAST_STACK_REG ; regno++)
2807 if (TEST_HARD_REG_BIT (block_out_reg_set[block], regno))
2808 fprintf (file, "%d ", regno);
2811 end = block_end[block];
2813 fprintf (file, "\nJumps to blocks: ");
2814 if (GET_CODE (end) == JUMP_INSN)
2815 print_blocks (file, end, PATTERN (end));
2817 if (block + 1 < blocks && block_drops_in[block+1])
2818 fprintf (file, " next");
2819 else if (block + 1 == blocks
2820 || (GET_CODE (end) == JUMP_INSN
2821 && GET_CODE (PATTERN (end)) == RETURN))
2822 fprintf (file, " return");
2824 fprintf (file, "\n");
2827 #endif /* STACK_REGS */