1 /* Register to Stack convert for GNU compiler.
2 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it
8 under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GCC is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
22 /* This pass converts stack-like registers from the "flat register
23 file" model that gcc uses, to a stack convention that the 387 uses.
25 * The form of the input:
27 On input, the function consists of insn that have had their
28 registers fully allocated to a set of "virtual" registers. Note that
29 the word "virtual" is used differently here than elsewhere in gcc: for
30 each virtual stack reg, there is a hard reg, but the mapping between
31 them is not known until this pass is run. On output, hard register
32 numbers have been substituted, and various pop and exchange insns have
33 been emitted. The hard register numbers and the virtual register
34 numbers completely overlap - before this pass, all stack register
35 numbers are virtual, and afterward they are all hard.
37 The virtual registers can be manipulated normally by gcc, and their
38 semantics are the same as for normal registers. After the hard
39 register numbers are substituted, the semantics of an insn containing
40 stack-like regs are not the same as for an insn with normal regs: for
41 instance, it is not safe to delete an insn that appears to be a no-op
42 move. In general, no insn containing hard regs should be changed
43 after this pass is done.
45 * The form of the output:
47 After this pass, hard register numbers represent the distance from
48 the current top of stack to the desired register. A reference to
49 FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1,
50 represents the register just below that, and so forth. Also, REG_DEAD
51 notes indicate whether or not a stack register should be popped.
53 A "swap" insn looks like a parallel of two patterns, where each
54 pattern is a SET: one sets A to B, the other B to A.
56 A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG
57 and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS,
58 will replace the existing stack top, not push a new value.
60 A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose
61 SET_SRC is REG or MEM.
63 The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG
64 appears ambiguous. As a special case, the presence of a REG_DEAD note
65 for FIRST_STACK_REG differentiates between a load insn and a pop.
67 If a REG_DEAD is present, the insn represents a "pop" that discards
68 the top of the register stack. If there is no REG_DEAD note, then the
69 insn represents a "dup" or a push of the current top of stack onto the
74 Existing REG_DEAD and REG_UNUSED notes for stack registers are
75 deleted and recreated from scratch. REG_DEAD is never created for a
76 SET_DEST, only REG_UNUSED.
80 There are several rules on the usage of stack-like regs in
81 asm_operands insns. These rules apply only to the operands that are
84 1. Given a set of input regs that die in an asm_operands, it is
85 necessary to know which are implicitly popped by the asm, and
86 which must be explicitly popped by gcc.
88 An input reg that is implicitly popped by the asm must be
89 explicitly clobbered, unless it is constrained to match an
92 2. For any input reg that is implicitly popped by an asm, it is
93 necessary to know how to adjust the stack to compensate for the pop.
94 If any non-popped input is closer to the top of the reg-stack than
95 the implicitly popped reg, it would not be possible to know what the
96 stack looked like - it's not clear how the rest of the stack "slides
99 All implicitly popped input regs must be closer to the top of
100 the reg-stack than any input that is not implicitly popped.
102 3. It is possible that if an input dies in an insn, reload might
103 use the input reg for an output reload. Consider this example:
105 asm ("foo" : "=t" (a) : "f" (b));
107 This asm says that input B is not popped by the asm, and that
108 the asm pushes a result onto the reg-stack, ie, the stack is one
109 deeper after the asm than it was before. But, it is possible that
110 reload will think that it can use the same reg for both the input and
111 the output, if input B dies in this insn.
113 If any input operand uses the "f" constraint, all output reg
114 constraints must use the "&" earlyclobber.
116 The asm above would be written as
118 asm ("foo" : "=&t" (a) : "f" (b));
120 4. Some operands need to be in particular places on the stack. All
121 output operands fall in this category - there is no other way to
122 know which regs the outputs appear in unless the user indicates
123 this in the constraints.
125 Output operands must specifically indicate which reg an output
126 appears in after an asm. "=f" is not allowed: the operand
127 constraints must select a class with a single reg.
129 5. Output operands may not be "inserted" between existing stack regs.
130 Since no 387 opcode uses a read/write operand, all output operands
131 are dead before the asm_operands, and are pushed by the asm_operands.
132 It makes no sense to push anywhere but the top of the reg-stack.
134 Output operands must start at the top of the reg-stack: output
135 operands may not "skip" a reg.
137 6. Some asm statements may need extra stack space for internal
138 calculations. This can be guaranteed by clobbering stack registers
139 unrelated to the inputs and outputs.
141 Here are a couple of reasonable asms to want to write. This asm
142 takes one input, which is internally popped, and produces two outputs.
144 asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp));
146 This asm takes two inputs, which are popped by the fyl2xp1 opcode,
147 and replaces them with one output. The user must code the "st(1)"
148 clobber for reg-stack.c to know that fyl2xp1 pops both inputs.
150 asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)");
159 #include "function.h"
160 #include "insn-config.h"
162 #include "hard-reg-set.h"
167 #include "basic-block.h"
173 #define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1)
175 /* This is the basic stack record. TOP is an index into REG[] such
176 that REG[TOP] is the top of stack. If TOP is -1 the stack is empty.
178 If TOP is -2, REG[] is not yet initialized. Stack initialization
179 consists of placing each live reg in array `reg' and setting `top'
182 REG_SET indicates which registers are live. */
184 typedef struct stack_def
186 int top; /* index to top stack element */
187 HARD_REG_SET reg_set; /* set of live registers */
188 unsigned char reg[REG_STACK_SIZE];/* register - stack mapping */
191 /* This is used to carry information about basic blocks. It is
192 attached to the AUX field of the standard CFG block. */
194 typedef struct block_info_def
196 struct stack_def stack_in; /* Input stack configuration. */
197 struct stack_def stack_out; /* Output stack configuration. */
198 HARD_REG_SET out_reg_set; /* Stack regs live on output. */
199 int done; /* True if block already converted. */
200 int predecesors; /* Number of predecesors that needs
204 #define BLOCK_INFO(B) ((block_info) (B)->aux)
206 /* Passed to change_stack to indicate where to emit insns. */
213 /* We use this array to cache info about insns, because otherwise we
214 spend too much time in stack_regs_mentioned_p.
216 Indexed by insn UIDs. A value of zero is uninitialized, one indicates
217 the insn uses stack registers, two indicates the insn does not use
219 static varray_type stack_regs_mentioned_data;
221 /* The block we're currently working on. */
222 static basic_block current_block;
224 /* This is the register file for all register after conversion */
226 FP_mode_reg[LAST_STACK_REG+1-FIRST_STACK_REG][(int) MAX_MACHINE_MODE];
228 #define FP_MODE_REG(regno,mode) \
229 (FP_mode_reg[(regno)-FIRST_STACK_REG][(int)(mode)])
231 /* Used to initialize uninitialized registers. */
234 /* Forward declarations */
236 static int stack_regs_mentioned_p PARAMS ((rtx pat));
237 static void straighten_stack PARAMS ((rtx, stack));
238 static void pop_stack PARAMS ((stack, int));
239 static rtx *get_true_reg PARAMS ((rtx *));
241 static int check_asm_stack_operands PARAMS ((rtx));
242 static int get_asm_operand_n_inputs PARAMS ((rtx));
243 static rtx stack_result PARAMS ((tree));
244 static void replace_reg PARAMS ((rtx *, int));
245 static void remove_regno_note PARAMS ((rtx, enum reg_note,
247 static int get_hard_regnum PARAMS ((stack, rtx));
248 static void delete_insn_for_stacker PARAMS ((rtx));
249 static rtx emit_pop_insn PARAMS ((rtx, stack, rtx,
251 static void emit_swap_insn PARAMS ((rtx, stack, rtx));
252 static void move_for_stack_reg PARAMS ((rtx, stack, rtx));
253 static int swap_rtx_condition_1 PARAMS ((rtx));
254 static int swap_rtx_condition PARAMS ((rtx));
255 static void compare_for_stack_reg PARAMS ((rtx, stack, rtx));
256 static void subst_stack_regs_pat PARAMS ((rtx, stack, rtx));
257 static void subst_asm_stack_regs PARAMS ((rtx, stack));
258 static void subst_stack_regs PARAMS ((rtx, stack));
259 static void change_stack PARAMS ((rtx, stack, stack,
261 static int convert_regs_entry PARAMS ((void));
262 static void convert_regs_exit PARAMS ((void));
263 static int convert_regs_1 PARAMS ((FILE *, basic_block));
264 static int convert_regs_2 PARAMS ((FILE *, basic_block));
265 static int convert_regs PARAMS ((FILE *));
266 static void print_stack PARAMS ((FILE *, stack));
267 static rtx next_flags_user PARAMS ((rtx));
268 static void record_label_references PARAMS ((rtx, rtx));
269 static bool compensate_edge PARAMS ((edge, FILE *));
271 /* Return non-zero if any stack register is mentioned somewhere within PAT. */
274 stack_regs_mentioned_p (pat)
277 register const char *fmt;
280 if (STACK_REG_P (pat))
283 fmt = GET_RTX_FORMAT (GET_CODE (pat));
284 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
290 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
291 if (stack_regs_mentioned_p (XVECEXP (pat, i, j)))
294 else if (fmt[i] == 'e' && stack_regs_mentioned_p (XEXP (pat, i)))
301 /* Return nonzero if INSN mentions stacked registers, else return zero. */
304 stack_regs_mentioned (insn)
307 unsigned int uid, max;
310 if (! INSN_P (insn) || !stack_regs_mentioned_data)
313 uid = INSN_UID (insn);
314 max = VARRAY_SIZE (stack_regs_mentioned_data);
317 /* Allocate some extra size to avoid too many reallocs, but
318 do not grow too quickly. */
319 max = uid + uid / 20;
320 VARRAY_GROW (stack_regs_mentioned_data, max);
323 test = VARRAY_CHAR (stack_regs_mentioned_data, uid);
326 /* This insn has yet to be examined. Do so now. */
327 test = stack_regs_mentioned_p (PATTERN (insn)) ? 1 : 2;
328 VARRAY_CHAR (stack_regs_mentioned_data, uid) = test;
334 static rtx ix86_flags_rtx;
337 next_flags_user (insn)
340 /* Search forward looking for the first use of this value.
341 Stop at block boundaries. */
343 while (insn != current_block->end)
345 insn = NEXT_INSN (insn);
347 if (INSN_P (insn) && reg_mentioned_p (ix86_flags_rtx, PATTERN (insn)))
350 if (GET_CODE (insn) == CALL_INSN)
356 /* Reorganise the stack into ascending numbers,
360 straighten_stack (insn, regstack)
364 struct stack_def temp_stack;
367 /* If there is only a single register on the stack, then the stack is
368 already in increasing order and no reorganization is needed.
370 Similarly if the stack is empty. */
371 if (regstack->top <= 0)
374 COPY_HARD_REG_SET (temp_stack.reg_set, regstack->reg_set);
376 for (top = temp_stack.top = regstack->top; top >= 0; top--)
377 temp_stack.reg[top] = FIRST_STACK_REG + temp_stack.top - top;
379 change_stack (insn, regstack, &temp_stack, EMIT_AFTER);
382 /* Pop a register from the stack */
385 pop_stack (regstack, regno)
389 int top = regstack->top;
391 CLEAR_HARD_REG_BIT (regstack->reg_set, regno);
393 /* If regno was not at the top of stack then adjust stack */
394 if (regstack->reg [top] != regno)
397 for (i = regstack->top; i >= 0; i--)
398 if (regstack->reg [i] == regno)
401 for (j = i; j < top; j++)
402 regstack->reg [j] = regstack->reg [j + 1];
408 /* Convert register usage from "flat" register file usage to a "stack
409 register file. FIRST is the first insn in the function, FILE is the
412 Construct a CFG and run life analysis. Then convert each insn one
413 by one. Run a last cleanup_cfg pass, if optimizing, to eliminate
414 code duplication created when the converter inserts pop insns on
418 reg_to_stack (first, file)
426 /* Clean up previous run. */
427 if (stack_regs_mentioned_data)
429 VARRAY_FREE (stack_regs_mentioned_data);
430 stack_regs_mentioned_data = 0;
436 /* See if there is something to do. Flow analysis is quite
437 expensive so we might save some compilation time. */
438 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
439 if (regs_ever_live[i])
441 if (i > LAST_STACK_REG)
444 /* Ok, floating point instructions exist. If not optimizing,
445 build the CFG and run life analysis. */
447 find_basic_blocks (first, max_reg_num (), file);
448 count_or_remove_death_notes (NULL, 1);
449 life_analysis (first, file, PROP_DEATH_NOTES);
450 mark_dfs_back_edges ();
452 /* Set up block info for each basic block. */
453 bi = (block_info) xcalloc ((n_basic_blocks + 1), sizeof (*bi));
454 for (i = n_basic_blocks - 1; i >= 0; --i)
457 basic_block bb = BASIC_BLOCK (i);
459 for (e = bb->pred; e; e=e->pred_next)
460 if (!(e->flags & EDGE_DFS_BACK)
461 && e->src != ENTRY_BLOCK_PTR)
462 BLOCK_INFO (bb)->predecesors++;
464 EXIT_BLOCK_PTR->aux = bi + n_basic_blocks;
466 /* Create the replacement registers up front. */
467 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
469 enum machine_mode mode;
470 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
472 mode = GET_MODE_WIDER_MODE (mode))
473 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
474 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT);
476 mode = GET_MODE_WIDER_MODE (mode))
477 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
480 ix86_flags_rtx = gen_rtx_REG (CCmode, FLAGS_REG);
482 /* A QNaN for initializing uninitialized variables.
484 ??? We can't load from constant memory in PIC mode, because
485 we're insertting these instructions before the prologue and
486 the PIC register hasn't been set up. In that case, fall back
487 on zero, which we can get from `ldz'. */
490 nan = CONST0_RTX (SFmode);
493 nan = gen_lowpart (SFmode, GEN_INT (0x7fc00000));
494 nan = force_const_mem (SFmode, nan);
497 /* Allocate a cache for stack_regs_mentioned. */
498 max_uid = get_max_uid ();
499 VARRAY_CHAR_INIT (stack_regs_mentioned_data, max_uid + 1,
500 "stack_regs_mentioned cache");
507 /* Check PAT, which is in INSN, for LABEL_REFs. Add INSN to the
508 label's chain of references, and note which insn contains each
512 record_label_references (insn, pat)
515 register enum rtx_code code = GET_CODE (pat);
517 register const char *fmt;
519 if (code == LABEL_REF)
521 register rtx label = XEXP (pat, 0);
524 if (GET_CODE (label) != CODE_LABEL)
527 /* If this is an undefined label, LABEL_REFS (label) contains
529 if (INSN_UID (label) == 0)
532 /* Don't make a duplicate in the code_label's chain. */
534 for (ref = LABEL_REFS (label);
536 ref = LABEL_NEXTREF (ref))
537 if (CONTAINING_INSN (ref) == insn)
540 CONTAINING_INSN (pat) = insn;
541 LABEL_NEXTREF (pat) = LABEL_REFS (label);
542 LABEL_REFS (label) = pat;
547 fmt = GET_RTX_FORMAT (code);
548 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
551 record_label_references (insn, XEXP (pat, i));
555 for (j = 0; j < XVECLEN (pat, i); j++)
556 record_label_references (insn, XVECEXP (pat, i, j));
561 /* Return a pointer to the REG expression within PAT. If PAT is not a
562 REG, possible enclosed by a conversion rtx, return the inner part of
563 PAT that stopped the search. */
570 switch (GET_CODE (*pat))
573 /* Eliminate FP subregister accesses in favour of the
574 actual FP register in use. */
577 if (FP_REG_P (subreg = SUBREG_REG (*pat)))
579 int regno_off = subreg_regno_offset (REGNO (subreg),
583 *pat = FP_MODE_REG (REGNO (subreg) + regno_off,
592 pat = & XEXP (*pat, 0);
596 /* There are many rules that an asm statement for stack-like regs must
597 follow. Those rules are explained at the top of this file: the rule
598 numbers below refer to that explanation. */
601 check_asm_stack_operands (insn)
606 int malformed_asm = 0;
607 rtx body = PATTERN (insn);
609 char reg_used_as_output[FIRST_PSEUDO_REGISTER];
610 char implicitly_dies[FIRST_PSEUDO_REGISTER];
613 rtx *clobber_reg = 0;
614 int n_inputs, n_outputs;
616 /* Find out what the constraints require. If no constraint
617 alternative matches, this asm is malformed. */
619 constrain_operands (1);
620 alt = which_alternative;
622 preprocess_constraints ();
624 n_inputs = get_asm_operand_n_inputs (body);
625 n_outputs = recog_data.n_operands - n_inputs;
630 /* Avoid further trouble with this insn. */
631 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
635 /* Strip SUBREGs here to make the following code simpler. */
636 for (i = 0; i < recog_data.n_operands; i++)
637 if (GET_CODE (recog_data.operand[i]) == SUBREG
638 && GET_CODE (SUBREG_REG (recog_data.operand[i])) == REG)
639 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
641 /* Set up CLOBBER_REG. */
645 if (GET_CODE (body) == PARALLEL)
647 clobber_reg = (rtx *) alloca (XVECLEN (body, 0) * sizeof (rtx));
649 for (i = 0; i < XVECLEN (body, 0); i++)
650 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
652 rtx clobber = XVECEXP (body, 0, i);
653 rtx reg = XEXP (clobber, 0);
655 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
656 reg = SUBREG_REG (reg);
658 if (STACK_REG_P (reg))
660 clobber_reg[n_clobbers] = reg;
666 /* Enforce rule #4: Output operands must specifically indicate which
667 reg an output appears in after an asm. "=f" is not allowed: the
668 operand constraints must select a class with a single reg.
670 Also enforce rule #5: Output operands must start at the top of
671 the reg-stack: output operands may not "skip" a reg. */
673 memset (reg_used_as_output, 0, sizeof (reg_used_as_output));
674 for (i = 0; i < n_outputs; i++)
675 if (STACK_REG_P (recog_data.operand[i]))
677 if (reg_class_size[(int) recog_op_alt[i][alt].class] != 1)
679 error_for_asm (insn, "Output constraint %d must specify a single register", i);
686 for (j = 0; j < n_clobbers; j++)
687 if (REGNO (recog_data.operand[i]) == REGNO (clobber_reg[j]))
689 error_for_asm (insn, "Output constraint %d cannot be specified together with \"%s\" clobber",
690 i, reg_names [REGNO (clobber_reg[j])]);
695 reg_used_as_output[REGNO (recog_data.operand[i])] = 1;
700 /* Search for first non-popped reg. */
701 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
702 if (! reg_used_as_output[i])
705 /* If there are any other popped regs, that's an error. */
706 for (; i < LAST_STACK_REG + 1; i++)
707 if (reg_used_as_output[i])
710 if (i != LAST_STACK_REG + 1)
712 error_for_asm (insn, "Output regs must be grouped at top of stack");
716 /* Enforce rule #2: All implicitly popped input regs must be closer
717 to the top of the reg-stack than any input that is not implicitly
720 memset (implicitly_dies, 0, sizeof (implicitly_dies));
721 for (i = n_outputs; i < n_outputs + n_inputs; i++)
722 if (STACK_REG_P (recog_data.operand[i]))
724 /* An input reg is implicitly popped if it is tied to an
725 output, or if there is a CLOBBER for it. */
728 for (j = 0; j < n_clobbers; j++)
729 if (operands_match_p (clobber_reg[j], recog_data.operand[i]))
732 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0)
733 implicitly_dies[REGNO (recog_data.operand[i])] = 1;
736 /* Search for first non-popped reg. */
737 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
738 if (! implicitly_dies[i])
741 /* If there are any other popped regs, that's an error. */
742 for (; i < LAST_STACK_REG + 1; i++)
743 if (implicitly_dies[i])
746 if (i != LAST_STACK_REG + 1)
749 "Implicitly popped regs must be grouped at top of stack");
753 /* Enfore rule #3: If any input operand uses the "f" constraint, all
754 output constraints must use the "&" earlyclobber.
756 ??? Detect this more deterministically by having constrain_asm_operands
757 record any earlyclobber. */
759 for (i = n_outputs; i < n_outputs + n_inputs; i++)
760 if (recog_op_alt[i][alt].matches == -1)
764 for (j = 0; j < n_outputs; j++)
765 if (operands_match_p (recog_data.operand[j], recog_data.operand[i]))
768 "Output operand %d must use `&' constraint", j);
775 /* Avoid further trouble with this insn. */
776 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
783 /* Calculate the number of inputs and outputs in BODY, an
784 asm_operands. N_OPERANDS is the total number of operands, and
785 N_INPUTS and N_OUTPUTS are pointers to ints into which the results are
789 get_asm_operand_n_inputs (body)
792 if (GET_CODE (body) == SET && GET_CODE (SET_SRC (body)) == ASM_OPERANDS)
793 return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (body));
795 else if (GET_CODE (body) == ASM_OPERANDS)
796 return ASM_OPERANDS_INPUT_LENGTH (body);
798 else if (GET_CODE (body) == PARALLEL
799 && GET_CODE (XVECEXP (body, 0, 0)) == SET)
800 return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (XVECEXP (body, 0, 0)));
802 else if (GET_CODE (body) == PARALLEL
803 && GET_CODE (XVECEXP (body, 0, 0)) == ASM_OPERANDS)
804 return ASM_OPERANDS_INPUT_LENGTH (XVECEXP (body, 0, 0));
809 /* If current function returns its result in an fp stack register,
810 return the REG. Otherwise, return 0. */
818 /* If the value is supposed to be returned in memory, then clearly
819 it is not returned in a stack register. */
820 if (aggregate_value_p (DECL_RESULT (decl)))
823 result = DECL_RTL_IF_SET (DECL_RESULT (decl));
826 #ifdef FUNCTION_OUTGOING_VALUE
828 = FUNCTION_OUTGOING_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl);
830 result = FUNCTION_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl);
834 return result != 0 && STACK_REG_P (result) ? result : 0;
839 * This section deals with stack register substitution, and forms the second
843 /* Replace REG, which is a pointer to a stack reg RTX, with an RTX for
844 the desired hard REGNO. */
847 replace_reg (reg, regno)
851 if (regno < FIRST_STACK_REG || regno > LAST_STACK_REG
852 || ! STACK_REG_P (*reg))
855 switch (GET_MODE_CLASS (GET_MODE (*reg)))
859 case MODE_COMPLEX_FLOAT:;
862 *reg = FP_MODE_REG (regno, GET_MODE (*reg));
865 /* Remove a note of type NOTE, which must be found, for register
866 number REGNO from INSN. Remove only one such note. */
869 remove_regno_note (insn, note, regno)
874 register rtx *note_link, this;
876 note_link = ®_NOTES(insn);
877 for (this = *note_link; this; this = XEXP (this, 1))
878 if (REG_NOTE_KIND (this) == note
879 && REG_P (XEXP (this, 0)) && REGNO (XEXP (this, 0)) == regno)
881 *note_link = XEXP (this, 1);
885 note_link = &XEXP (this, 1);
890 /* Find the hard register number of virtual register REG in REGSTACK.
891 The hard register number is relative to the top of the stack. -1 is
892 returned if the register is not found. */
895 get_hard_regnum (regstack, reg)
901 if (! STACK_REG_P (reg))
904 for (i = regstack->top; i >= 0; i--)
905 if (regstack->reg[i] == REGNO (reg))
908 return i >= 0 ? (FIRST_STACK_REG + regstack->top - i) : -1;
911 /* Delete INSN from the RTL. Mark the insn, but don't remove it from
912 the chain of insns. Doing so could confuse block_begin and block_end
913 if this were the only insn in the block. */
916 delete_insn_for_stacker (insn)
919 PUT_CODE (insn, NOTE);
920 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
921 NOTE_SOURCE_FILE (insn) = 0;
924 /* Emit an insn to pop virtual register REG before or after INSN.
925 REGSTACK is the stack state after INSN and is updated to reflect this
926 pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn
927 is represented as a SET whose destination is the register to be popped
928 and source is the top of stack. A death note for the top of stack
929 cases the movdf pattern to pop. */
932 emit_pop_insn (insn, regstack, reg, where)
936 enum emit_where where;
938 rtx pop_insn, pop_rtx;
941 /* For complex types take care to pop both halves. These may survive in
942 CLOBBER and USE expressions. */
943 if (COMPLEX_MODE_P (GET_MODE (reg)))
945 rtx reg1 = FP_MODE_REG (REGNO (reg), DFmode);
946 rtx reg2 = FP_MODE_REG (REGNO (reg) + 1, DFmode);
949 if (get_hard_regnum (regstack, reg1) >= 0)
950 pop_insn = emit_pop_insn (insn, regstack, reg1, where);
951 if (get_hard_regnum (regstack, reg2) >= 0)
952 pop_insn = emit_pop_insn (insn, regstack, reg2, where);
958 hard_regno = get_hard_regnum (regstack, reg);
960 if (hard_regno < FIRST_STACK_REG)
963 pop_rtx = gen_rtx_SET (VOIDmode, FP_MODE_REG (hard_regno, DFmode),
964 FP_MODE_REG (FIRST_STACK_REG, DFmode));
966 if (where == EMIT_AFTER)
967 pop_insn = emit_block_insn_after (pop_rtx, insn, current_block);
969 pop_insn = emit_block_insn_before (pop_rtx, insn, current_block);
972 = gen_rtx_EXPR_LIST (REG_DEAD, FP_MODE_REG (FIRST_STACK_REG, DFmode),
973 REG_NOTES (pop_insn));
975 regstack->reg[regstack->top - (hard_regno - FIRST_STACK_REG)]
976 = regstack->reg[regstack->top];
978 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (reg));
983 /* Emit an insn before or after INSN to swap virtual register REG with
984 the top of stack. REGSTACK is the stack state before the swap, and
985 is updated to reflect the swap. A swap insn is represented as a
986 PARALLEL of two patterns: each pattern moves one reg to the other.
988 If REG is already at the top of the stack, no insn is emitted. */
991 emit_swap_insn (insn, regstack, reg)
998 int tmp, other_reg; /* swap regno temps */
999 rtx i1; /* the stack-reg insn prior to INSN */
1000 rtx i1set = NULL_RTX; /* the SET rtx within I1 */
1002 hard_regno = get_hard_regnum (regstack, reg);
1004 if (hard_regno < FIRST_STACK_REG)
1006 if (hard_regno == FIRST_STACK_REG)
1009 other_reg = regstack->top - (hard_regno - FIRST_STACK_REG);
1011 tmp = regstack->reg[other_reg];
1012 regstack->reg[other_reg] = regstack->reg[regstack->top];
1013 regstack->reg[regstack->top] = tmp;
1015 /* Find the previous insn involving stack regs, but don't pass a
1018 if (current_block && insn != current_block->head)
1020 rtx tmp = PREV_INSN (insn);
1021 rtx limit = PREV_INSN (current_block->head);
1022 while (tmp != limit)
1024 if (GET_CODE (tmp) == CODE_LABEL
1025 || GET_CODE (tmp) == CALL_INSN
1026 || NOTE_INSN_BASIC_BLOCK_P (tmp)
1027 || (GET_CODE (tmp) == INSN
1028 && stack_regs_mentioned (tmp)))
1033 tmp = PREV_INSN (tmp);
1038 && (i1set = single_set (i1)) != NULL_RTX)
1040 rtx i1src = *get_true_reg (&SET_SRC (i1set));
1041 rtx i1dest = *get_true_reg (&SET_DEST (i1set));
1043 /* If the previous register stack push was from the reg we are to
1044 swap with, omit the swap. */
1046 if (GET_CODE (i1dest) == REG && REGNO (i1dest) == FIRST_STACK_REG
1047 && GET_CODE (i1src) == REG
1048 && REGNO (i1src) == (unsigned) hard_regno - 1
1049 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
1052 /* If the previous insn wrote to the reg we are to swap with,
1055 if (GET_CODE (i1dest) == REG && REGNO (i1dest) == (unsigned) hard_regno
1056 && GET_CODE (i1src) == REG && REGNO (i1src) == FIRST_STACK_REG
1057 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
1061 swap_rtx = gen_swapxf (FP_MODE_REG (hard_regno, XFmode),
1062 FP_MODE_REG (FIRST_STACK_REG, XFmode));
1065 emit_block_insn_after (swap_rtx, i1, current_block);
1066 else if (current_block)
1067 emit_block_insn_before (swap_rtx, current_block->head, current_block);
1069 emit_insn_before (swap_rtx, insn);
1072 /* Handle a move to or from a stack register in PAT, which is in INSN.
1073 REGSTACK is the current stack. */
1076 move_for_stack_reg (insn, regstack, pat)
1081 rtx *psrc = get_true_reg (&SET_SRC (pat));
1082 rtx *pdest = get_true_reg (&SET_DEST (pat));
1086 src = *psrc; dest = *pdest;
1088 if (STACK_REG_P (src) && STACK_REG_P (dest))
1090 /* Write from one stack reg to another. If SRC dies here, then
1091 just change the register mapping and delete the insn. */
1093 note = find_regno_note (insn, REG_DEAD, REGNO (src));
1098 /* If this is a no-op move, there must not be a REG_DEAD note. */
1099 if (REGNO (src) == REGNO (dest))
1102 for (i = regstack->top; i >= 0; i--)
1103 if (regstack->reg[i] == REGNO (src))
1106 /* The source must be live, and the dest must be dead. */
1107 if (i < 0 || get_hard_regnum (regstack, dest) >= FIRST_STACK_REG)
1110 /* It is possible that the dest is unused after this insn.
1111 If so, just pop the src. */
1113 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
1115 emit_pop_insn (insn, regstack, src, EMIT_AFTER);
1117 delete_insn_for_stacker (insn);
1121 regstack->reg[i] = REGNO (dest);
1123 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1124 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
1126 delete_insn_for_stacker (insn);
1131 /* The source reg does not die. */
1133 /* If this appears to be a no-op move, delete it, or else it
1134 will confuse the machine description output patterns. But if
1135 it is REG_UNUSED, we must pop the reg now, as per-insn processing
1136 for REG_UNUSED will not work for deleted insns. */
1138 if (REGNO (src) == REGNO (dest))
1140 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
1141 emit_pop_insn (insn, regstack, dest, EMIT_AFTER);
1143 delete_insn_for_stacker (insn);
1147 /* The destination ought to be dead */
1148 if (get_hard_regnum (regstack, dest) >= FIRST_STACK_REG)
1151 replace_reg (psrc, get_hard_regnum (regstack, src));
1153 regstack->reg[++regstack->top] = REGNO (dest);
1154 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1155 replace_reg (pdest, FIRST_STACK_REG);
1157 else if (STACK_REG_P (src))
1159 /* Save from a stack reg to MEM, or possibly integer reg. Since
1160 only top of stack may be saved, emit an exchange first if
1163 emit_swap_insn (insn, regstack, src);
1165 note = find_regno_note (insn, REG_DEAD, REGNO (src));
1168 replace_reg (&XEXP (note, 0), FIRST_STACK_REG);
1170 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
1172 else if ((GET_MODE (src) == XFmode || GET_MODE (src) == TFmode)
1173 && regstack->top < REG_STACK_SIZE - 1)
1175 /* A 387 cannot write an XFmode value to a MEM without
1176 clobbering the source reg. The output code can handle
1177 this by reading back the value from the MEM.
1178 But it is more efficient to use a temp register if one is
1179 available. Push the source value here if the register
1180 stack is not full, and then write the value to memory via
1182 rtx push_rtx, push_insn;
1183 rtx top_stack_reg = FP_MODE_REG (FIRST_STACK_REG, GET_MODE (src));
1185 if (GET_MODE (src) == TFmode)
1186 push_rtx = gen_movtf (top_stack_reg, top_stack_reg);
1188 push_rtx = gen_movxf (top_stack_reg, top_stack_reg);
1189 push_insn = emit_insn_before (push_rtx, insn);
1190 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_DEAD, top_stack_reg,
1194 replace_reg (psrc, FIRST_STACK_REG);
1196 else if (STACK_REG_P (dest))
1198 /* Load from MEM, or possibly integer REG or constant, into the
1199 stack regs. The actual target is always the top of the
1200 stack. The stack mapping is changed to reflect that DEST is
1201 now at top of stack. */
1203 /* The destination ought to be dead */
1204 if (get_hard_regnum (regstack, dest) >= FIRST_STACK_REG)
1207 if (regstack->top >= REG_STACK_SIZE)
1210 regstack->reg[++regstack->top] = REGNO (dest);
1211 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1212 replace_reg (pdest, FIRST_STACK_REG);
1218 /* Swap the condition on a branch, if there is one. Return true if we
1219 found a condition to swap. False if the condition was not used as
1223 swap_rtx_condition_1 (pat)
1226 register const char *fmt;
1227 register int i, r = 0;
1229 if (GET_RTX_CLASS (GET_CODE (pat)) == '<')
1231 PUT_CODE (pat, swap_condition (GET_CODE (pat)));
1236 fmt = GET_RTX_FORMAT (GET_CODE (pat));
1237 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
1243 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
1244 r |= swap_rtx_condition_1 (XVECEXP (pat, i, j));
1246 else if (fmt[i] == 'e')
1247 r |= swap_rtx_condition_1 (XEXP (pat, i));
1255 swap_rtx_condition (insn)
1258 rtx pat = PATTERN (insn);
1260 /* We're looking for a single set to cc0 or an HImode temporary. */
1262 if (GET_CODE (pat) == SET
1263 && GET_CODE (SET_DEST (pat)) == REG
1264 && REGNO (SET_DEST (pat)) == FLAGS_REG)
1266 insn = next_flags_user (insn);
1267 if (insn == NULL_RTX)
1269 pat = PATTERN (insn);
1272 /* See if this is, or ends in, a fnstsw, aka unspec 9. If so, we're
1273 not doing anything with the cc value right now. We may be able to
1274 search for one though. */
1276 if (GET_CODE (pat) == SET
1277 && GET_CODE (SET_SRC (pat)) == UNSPEC
1278 && XINT (SET_SRC (pat), 1) == 9)
1280 rtx dest = SET_DEST (pat);
1282 /* Search forward looking for the first use of this value.
1283 Stop at block boundaries. */
1284 while (insn != current_block->end)
1286 insn = NEXT_INSN (insn);
1287 if (INSN_P (insn) && reg_mentioned_p (dest, insn))
1289 if (GET_CODE (insn) == CALL_INSN)
1293 /* So we've found the insn using this value. If it is anything
1294 other than sahf, aka unspec 10, or the value does not die
1295 (meaning we'd have to search further), then we must give up. */
1296 pat = PATTERN (insn);
1297 if (GET_CODE (pat) != SET
1298 || GET_CODE (SET_SRC (pat)) != UNSPEC
1299 || XINT (SET_SRC (pat), 1) != 10
1300 || ! dead_or_set_p (insn, dest))
1303 /* Now we are prepared to handle this as a normal cc0 setter. */
1304 insn = next_flags_user (insn);
1305 if (insn == NULL_RTX)
1307 pat = PATTERN (insn);
1310 if (swap_rtx_condition_1 (pat))
1313 INSN_CODE (insn) = -1;
1314 if (recog_memoized (insn) == -1)
1316 /* In case the flags don't die here, recurse to try fix
1317 following user too. */
1318 else if (! dead_or_set_p (insn, ix86_flags_rtx))
1320 insn = next_flags_user (insn);
1321 if (!insn || !swap_rtx_condition (insn))
1326 swap_rtx_condition_1 (pat);
1334 /* Handle a comparison. Special care needs to be taken to avoid
1335 causing comparisons that a 387 cannot do correctly, such as EQ.
1337 Also, a pop insn may need to be emitted. The 387 does have an
1338 `fcompp' insn that can pop two regs, but it is sometimes too expensive
1339 to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to
1343 compare_for_stack_reg (insn, regstack, pat_src)
1349 rtx src1_note, src2_note;
1352 src1 = get_true_reg (&XEXP (pat_src, 0));
1353 src2 = get_true_reg (&XEXP (pat_src, 1));
1354 flags_user = next_flags_user (insn);
1356 /* ??? If fxch turns out to be cheaper than fstp, give priority to
1357 registers that die in this insn - move those to stack top first. */
1358 if ((! STACK_REG_P (*src1)
1359 || (STACK_REG_P (*src2)
1360 && get_hard_regnum (regstack, *src2) == FIRST_STACK_REG))
1361 && swap_rtx_condition (insn))
1364 temp = XEXP (pat_src, 0);
1365 XEXP (pat_src, 0) = XEXP (pat_src, 1);
1366 XEXP (pat_src, 1) = temp;
1368 src1 = get_true_reg (&XEXP (pat_src, 0));
1369 src2 = get_true_reg (&XEXP (pat_src, 1));
1371 INSN_CODE (insn) = -1;
1374 /* We will fix any death note later. */
1376 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1378 if (STACK_REG_P (*src2))
1379 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1381 src2_note = NULL_RTX;
1383 emit_swap_insn (insn, regstack, *src1);
1385 replace_reg (src1, FIRST_STACK_REG);
1387 if (STACK_REG_P (*src2))
1388 replace_reg (src2, get_hard_regnum (regstack, *src2));
1392 pop_stack (regstack, REGNO (XEXP (src1_note, 0)));
1393 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1396 /* If the second operand dies, handle that. But if the operands are
1397 the same stack register, don't bother, because only one death is
1398 needed, and it was just handled. */
1401 && ! (STACK_REG_P (*src1) && STACK_REG_P (*src2)
1402 && REGNO (*src1) == REGNO (*src2)))
1404 /* As a special case, two regs may die in this insn if src2 is
1405 next to top of stack and the top of stack also dies. Since
1406 we have already popped src1, "next to top of stack" is really
1407 at top (FIRST_STACK_REG) now. */
1409 if (get_hard_regnum (regstack, XEXP (src2_note, 0)) == FIRST_STACK_REG
1412 pop_stack (regstack, REGNO (XEXP (src2_note, 0)));
1413 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1);
1417 /* The 386 can only represent death of the first operand in
1418 the case handled above. In all other cases, emit a separate
1419 pop and remove the death note from here. */
1421 /* link_cc0_insns (insn); */
1423 remove_regno_note (insn, REG_DEAD, REGNO (XEXP (src2_note, 0)));
1425 emit_pop_insn (insn, regstack, XEXP (src2_note, 0),
1431 /* Substitute new registers in PAT, which is part of INSN. REGSTACK
1432 is the current register layout. */
1435 subst_stack_regs_pat (insn, regstack, pat)
1442 switch (GET_CODE (pat))
1445 /* Deaths in USE insns can happen in non optimizing compilation.
1446 Handle them by popping the dying register. */
1447 src = get_true_reg (&XEXP (pat, 0));
1448 if (STACK_REG_P (*src)
1449 && find_regno_note (insn, REG_DEAD, REGNO (*src)))
1451 emit_pop_insn (insn, regstack, *src, EMIT_AFTER);
1454 /* ??? Uninitialized USE should not happen. */
1455 else if (get_hard_regnum (regstack, *src) == -1)
1463 dest = get_true_reg (&XEXP (pat, 0));
1464 if (STACK_REG_P (*dest))
1466 note = find_reg_note (insn, REG_DEAD, *dest);
1468 if (pat != PATTERN (insn))
1470 /* The fix_truncdi_1 pattern wants to be able to allocate
1471 it's own scratch register. It does this by clobbering
1472 an fp reg so that it is assured of an empty reg-stack
1473 register. If the register is live, kill it now.
1474 Remove the DEAD/UNUSED note so we don't try to kill it
1478 emit_pop_insn (insn, regstack, *dest, EMIT_BEFORE);
1481 note = find_reg_note (insn, REG_UNUSED, *dest);
1485 remove_note (insn, note);
1486 replace_reg (dest, LAST_STACK_REG);
1490 /* A top-level clobber with no REG_DEAD, and no hard-regnum
1491 indicates an uninitialized value. Because reload removed
1492 all other clobbers, this must be due to a function
1493 returning without a value. Load up a NaN. */
1496 && get_hard_regnum (regstack, *dest) == -1)
1498 pat = gen_rtx_SET (VOIDmode,
1499 FP_MODE_REG (REGNO (*dest), SFmode),
1501 PATTERN (insn) = pat;
1502 move_for_stack_reg (insn, regstack, pat);
1504 if (! note && COMPLEX_MODE_P (GET_MODE (*dest))
1505 && get_hard_regnum (regstack, FP_MODE_REG (REGNO (*dest), DFmode)) == -1)
1507 pat = gen_rtx_SET (VOIDmode,
1508 FP_MODE_REG (REGNO (*dest) + 1, SFmode),
1510 PATTERN (insn) = pat;
1511 move_for_stack_reg (insn, regstack, pat);
1520 rtx *src1 = (rtx *) 0, *src2;
1521 rtx src1_note, src2_note;
1524 dest = get_true_reg (&SET_DEST (pat));
1525 src = get_true_reg (&SET_SRC (pat));
1526 pat_src = SET_SRC (pat);
1528 /* See if this is a `movM' pattern, and handle elsewhere if so. */
1529 if (STACK_REG_P (*src)
1530 || (STACK_REG_P (*dest)
1531 && (GET_CODE (*src) == REG || GET_CODE (*src) == MEM
1532 || GET_CODE (*src) == CONST_DOUBLE)))
1534 move_for_stack_reg (insn, regstack, pat);
1538 switch (GET_CODE (pat_src))
1541 compare_for_stack_reg (insn, regstack, pat_src);
1547 for (count = HARD_REGNO_NREGS (REGNO (*dest), GET_MODE (*dest));
1550 regstack->reg[++regstack->top] = REGNO (*dest) + count;
1551 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest) + count);
1554 replace_reg (dest, FIRST_STACK_REG);
1558 /* This is a `tstM2' case. */
1559 if (*dest != cc0_rtx)
1565 case FLOAT_TRUNCATE:
1569 /* These insns only operate on the top of the stack. DEST might
1570 be cc0_rtx if we're processing a tstM pattern. Also, it's
1571 possible that the tstM case results in a REG_DEAD note on the
1575 src1 = get_true_reg (&XEXP (pat_src, 0));
1577 emit_swap_insn (insn, regstack, *src1);
1579 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1581 if (STACK_REG_P (*dest))
1582 replace_reg (dest, FIRST_STACK_REG);
1586 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1588 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
1591 replace_reg (src1, FIRST_STACK_REG);
1596 /* On i386, reversed forms of subM3 and divM3 exist for
1597 MODE_FLOAT, so the same code that works for addM3 and mulM3
1601 /* These insns can accept the top of stack as a destination
1602 from a stack reg or mem, or can use the top of stack as a
1603 source and some other stack register (possibly top of stack)
1604 as a destination. */
1606 src1 = get_true_reg (&XEXP (pat_src, 0));
1607 src2 = get_true_reg (&XEXP (pat_src, 1));
1609 /* We will fix any death note later. */
1611 if (STACK_REG_P (*src1))
1612 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1614 src1_note = NULL_RTX;
1615 if (STACK_REG_P (*src2))
1616 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1618 src2_note = NULL_RTX;
1620 /* If either operand is not a stack register, then the dest
1621 must be top of stack. */
1623 if (! STACK_REG_P (*src1) || ! STACK_REG_P (*src2))
1624 emit_swap_insn (insn, regstack, *dest);
1627 /* Both operands are REG. If neither operand is already
1628 at the top of stack, choose to make the one that is the dest
1629 the new top of stack. */
1631 int src1_hard_regnum, src2_hard_regnum;
1633 src1_hard_regnum = get_hard_regnum (regstack, *src1);
1634 src2_hard_regnum = get_hard_regnum (regstack, *src2);
1635 if (src1_hard_regnum == -1 || src2_hard_regnum == -1)
1638 if (src1_hard_regnum != FIRST_STACK_REG
1639 && src2_hard_regnum != FIRST_STACK_REG)
1640 emit_swap_insn (insn, regstack, *dest);
1643 if (STACK_REG_P (*src1))
1644 replace_reg (src1, get_hard_regnum (regstack, *src1));
1645 if (STACK_REG_P (*src2))
1646 replace_reg (src2, get_hard_regnum (regstack, *src2));
1650 rtx src1_reg = XEXP (src1_note, 0);
1652 /* If the register that dies is at the top of stack, then
1653 the destination is somewhere else - merely substitute it.
1654 But if the reg that dies is not at top of stack, then
1655 move the top of stack to the dead reg, as though we had
1656 done the insn and then a store-with-pop. */
1658 if (REGNO (src1_reg) == regstack->reg[regstack->top])
1660 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1661 replace_reg (dest, get_hard_regnum (regstack, *dest));
1665 int regno = get_hard_regnum (regstack, src1_reg);
1667 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1668 replace_reg (dest, regno);
1670 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
1671 = regstack->reg[regstack->top];
1674 CLEAR_HARD_REG_BIT (regstack->reg_set,
1675 REGNO (XEXP (src1_note, 0)));
1676 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1681 rtx src2_reg = XEXP (src2_note, 0);
1682 if (REGNO (src2_reg) == regstack->reg[regstack->top])
1684 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1685 replace_reg (dest, get_hard_regnum (regstack, *dest));
1689 int regno = get_hard_regnum (regstack, src2_reg);
1691 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1692 replace_reg (dest, regno);
1694 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
1695 = regstack->reg[regstack->top];
1698 CLEAR_HARD_REG_BIT (regstack->reg_set,
1699 REGNO (XEXP (src2_note, 0)));
1700 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG);
1705 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1706 replace_reg (dest, get_hard_regnum (regstack, *dest));
1709 /* Keep operand 1 maching with destination. */
1710 if (GET_RTX_CLASS (GET_CODE (pat_src)) == 'c'
1711 && REG_P (*src1) && REG_P (*src2)
1712 && REGNO (*src1) != REGNO (*dest))
1714 int tmp = REGNO (*src1);
1715 replace_reg (src1, REGNO (*src2));
1716 replace_reg (src2, tmp);
1721 switch (XINT (pat_src, 1))
1725 /* These insns only operate on the top of the stack. */
1727 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1729 emit_swap_insn (insn, regstack, *src1);
1731 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1733 if (STACK_REG_P (*dest))
1734 replace_reg (dest, FIRST_STACK_REG);
1738 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1740 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
1743 replace_reg (src1, FIRST_STACK_REG);
1747 /* (unspec [(unspec [(compare ..)] 9)] 10)
1748 Unspec 9 is fnstsw; unspec 10 is sahf. The combination
1749 matches the PPRO fcomi instruction. */
1751 pat_src = XVECEXP (pat_src, 0, 0);
1752 if (GET_CODE (pat_src) != UNSPEC
1753 || XINT (pat_src, 1) != 9)
1758 /* (unspec [(compare ..)] 9) */
1759 /* Combined fcomp+fnstsw generated for doing well with
1760 CSE. When optimizing this would have been broken
1763 pat_src = XVECEXP (pat_src, 0, 0);
1764 if (GET_CODE (pat_src) != COMPARE)
1767 compare_for_stack_reg (insn, regstack, pat_src);
1776 /* This insn requires the top of stack to be the destination. */
1778 src1 = get_true_reg (&XEXP (pat_src, 1));
1779 src2 = get_true_reg (&XEXP (pat_src, 2));
1781 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1782 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1784 /* If the comparison operator is an FP comparison operator,
1785 it is handled correctly by compare_for_stack_reg () who
1786 will move the destination to the top of stack. But if the
1787 comparison operator is not an FP comparison operator, we
1788 have to handle it here. */
1789 if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG
1790 && REGNO (*dest) != regstack->reg[regstack->top])
1792 /* In case one of operands is the top of stack and the operands
1793 dies, it is safe to make it the destination operand by reversing
1794 the direction of cmove and avoid fxch. */
1795 if ((REGNO (*src1) == regstack->reg[regstack->top]
1797 || (REGNO (*src2) == regstack->reg[regstack->top]
1800 int idx1 = (get_hard_regnum (regstack, *src1)
1802 int idx2 = (get_hard_regnum (regstack, *src2)
1805 /* Make reg-stack believe that the operands are already
1806 swapped on the stack */
1807 regstack->reg[regstack->top - idx1] = REGNO (*src2);
1808 regstack->reg[regstack->top - idx2] = REGNO (*src1);
1810 /* Reverse condition to compensate the operand swap.
1811 i386 do have comparison always reversible. */
1812 PUT_CODE (XEXP (pat_src, 0),
1813 reversed_comparison_code (XEXP (pat_src, 0), insn));
1816 emit_swap_insn (insn, regstack, *dest);
1824 src_note[1] = src1_note;
1825 src_note[2] = src2_note;
1827 if (STACK_REG_P (*src1))
1828 replace_reg (src1, get_hard_regnum (regstack, *src1));
1829 if (STACK_REG_P (*src2))
1830 replace_reg (src2, get_hard_regnum (regstack, *src2));
1832 for (i = 1; i <= 2; i++)
1835 int regno = REGNO (XEXP (src_note[i], 0));
1837 /* If the register that dies is not at the top of
1838 stack, then move the top of stack to the dead reg */
1839 if (regno != regstack->reg[regstack->top])
1841 remove_regno_note (insn, REG_DEAD, regno);
1842 emit_pop_insn (insn, regstack, XEXP (src_note[i], 0),
1846 /* Top of stack never dies, as it is the
1852 /* Make dest the top of stack. Add dest to regstack if
1854 if (get_hard_regnum (regstack, *dest) < FIRST_STACK_REG)
1855 regstack->reg[++regstack->top] = REGNO (*dest);
1856 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1857 replace_reg (dest, FIRST_STACK_REG);
1871 /* Substitute hard regnums for any stack regs in INSN, which has
1872 N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info
1873 before the insn, and is updated with changes made here.
1875 There are several requirements and assumptions about the use of
1876 stack-like regs in asm statements. These rules are enforced by
1877 record_asm_stack_regs; see comments there for details. Any
1878 asm_operands left in the RTL at this point may be assume to meet the
1879 requirements, since record_asm_stack_regs removes any problem asm. */
1882 subst_asm_stack_regs (insn, regstack)
1886 rtx body = PATTERN (insn);
1889 rtx *note_reg; /* Array of note contents */
1890 rtx **note_loc; /* Address of REG field of each note */
1891 enum reg_note *note_kind; /* The type of each note */
1893 rtx *clobber_reg = 0;
1894 rtx **clobber_loc = 0;
1896 struct stack_def temp_stack;
1901 int n_inputs, n_outputs;
1903 if (! check_asm_stack_operands (insn))
1906 /* Find out what the constraints required. If no constraint
1907 alternative matches, that is a compiler bug: we should have caught
1908 such an insn in check_asm_stack_operands. */
1909 extract_insn (insn);
1910 constrain_operands (1);
1911 alt = which_alternative;
1913 preprocess_constraints ();
1915 n_inputs = get_asm_operand_n_inputs (body);
1916 n_outputs = recog_data.n_operands - n_inputs;
1921 /* Strip SUBREGs here to make the following code simpler. */
1922 for (i = 0; i < recog_data.n_operands; i++)
1923 if (GET_CODE (recog_data.operand[i]) == SUBREG
1924 && GET_CODE (SUBREG_REG (recog_data.operand[i])) == REG)
1926 recog_data.operand_loc[i] = & SUBREG_REG (recog_data.operand[i]);
1927 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
1930 /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */
1932 for (i = 0, note = REG_NOTES (insn); note; note = XEXP (note, 1))
1935 note_reg = (rtx *) alloca (i * sizeof (rtx));
1936 note_loc = (rtx **) alloca (i * sizeof (rtx *));
1937 note_kind = (enum reg_note *) alloca (i * sizeof (enum reg_note));
1940 for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
1942 rtx reg = XEXP (note, 0);
1943 rtx *loc = & XEXP (note, 0);
1945 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
1947 loc = & SUBREG_REG (reg);
1948 reg = SUBREG_REG (reg);
1951 if (STACK_REG_P (reg)
1952 && (REG_NOTE_KIND (note) == REG_DEAD
1953 || REG_NOTE_KIND (note) == REG_UNUSED))
1955 note_reg[n_notes] = reg;
1956 note_loc[n_notes] = loc;
1957 note_kind[n_notes] = REG_NOTE_KIND (note);
1962 /* Set up CLOBBER_REG and CLOBBER_LOC. */
1966 if (GET_CODE (body) == PARALLEL)
1968 clobber_reg = (rtx *) alloca (XVECLEN (body, 0) * sizeof (rtx));
1969 clobber_loc = (rtx **) alloca (XVECLEN (body, 0) * sizeof (rtx *));
1971 for (i = 0; i < XVECLEN (body, 0); i++)
1972 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
1974 rtx clobber = XVECEXP (body, 0, i);
1975 rtx reg = XEXP (clobber, 0);
1976 rtx *loc = & XEXP (clobber, 0);
1978 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
1980 loc = & SUBREG_REG (reg);
1981 reg = SUBREG_REG (reg);
1984 if (STACK_REG_P (reg))
1986 clobber_reg[n_clobbers] = reg;
1987 clobber_loc[n_clobbers] = loc;
1993 temp_stack = *regstack;
1995 /* Put the input regs into the desired place in TEMP_STACK. */
1997 for (i = n_outputs; i < n_outputs + n_inputs; i++)
1998 if (STACK_REG_P (recog_data.operand[i])
1999 && reg_class_subset_p (recog_op_alt[i][alt].class,
2001 && recog_op_alt[i][alt].class != FLOAT_REGS)
2003 /* If an operand needs to be in a particular reg in
2004 FLOAT_REGS, the constraint was either 't' or 'u'. Since
2005 these constraints are for single register classes, and
2006 reload guaranteed that operand[i] is already in that class,
2007 we can just use REGNO (recog_data.operand[i]) to know which
2008 actual reg this operand needs to be in. */
2010 int regno = get_hard_regnum (&temp_stack, recog_data.operand[i]);
2015 if ((unsigned int) regno != REGNO (recog_data.operand[i]))
2017 /* recog_data.operand[i] is not in the right place. Find
2018 it and swap it with whatever is already in I's place.
2019 K is where recog_data.operand[i] is now. J is where it
2023 k = temp_stack.top - (regno - FIRST_STACK_REG);
2025 - (REGNO (recog_data.operand[i]) - FIRST_STACK_REG));
2027 temp = temp_stack.reg[k];
2028 temp_stack.reg[k] = temp_stack.reg[j];
2029 temp_stack.reg[j] = temp;
2033 /* Emit insns before INSN to make sure the reg-stack is in the right
2036 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
2038 /* Make the needed input register substitutions. Do death notes and
2039 clobbers too, because these are for inputs, not outputs. */
2041 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2042 if (STACK_REG_P (recog_data.operand[i]))
2044 int regnum = get_hard_regnum (regstack, recog_data.operand[i]);
2049 replace_reg (recog_data.operand_loc[i], regnum);
2052 for (i = 0; i < n_notes; i++)
2053 if (note_kind[i] == REG_DEAD)
2055 int regnum = get_hard_regnum (regstack, note_reg[i]);
2060 replace_reg (note_loc[i], regnum);
2063 for (i = 0; i < n_clobbers; i++)
2065 /* It's OK for a CLOBBER to reference a reg that is not live.
2066 Don't try to replace it in that case. */
2067 int regnum = get_hard_regnum (regstack, clobber_reg[i]);
2071 /* Sigh - clobbers always have QImode. But replace_reg knows
2072 that these regs can't be MODE_INT and will abort. Just put
2073 the right reg there without calling replace_reg. */
2075 *clobber_loc[i] = FP_MODE_REG (regnum, DFmode);
2079 /* Now remove from REGSTACK any inputs that the asm implicitly popped. */
2081 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2082 if (STACK_REG_P (recog_data.operand[i]))
2084 /* An input reg is implicitly popped if it is tied to an
2085 output, or if there is a CLOBBER for it. */
2088 for (j = 0; j < n_clobbers; j++)
2089 if (operands_match_p (clobber_reg[j], recog_data.operand[i]))
2092 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0)
2094 /* recog_data.operand[i] might not be at the top of stack.
2095 But that's OK, because all we need to do is pop the
2096 right number of regs off of the top of the reg-stack.
2097 record_asm_stack_regs guaranteed that all implicitly
2098 popped regs were grouped at the top of the reg-stack. */
2100 CLEAR_HARD_REG_BIT (regstack->reg_set,
2101 regstack->reg[regstack->top]);
2106 /* Now add to REGSTACK any outputs that the asm implicitly pushed.
2107 Note that there isn't any need to substitute register numbers.
2108 ??? Explain why this is true. */
2110 for (i = LAST_STACK_REG; i >= FIRST_STACK_REG; i--)
2112 /* See if there is an output for this hard reg. */
2115 for (j = 0; j < n_outputs; j++)
2116 if (STACK_REG_P (recog_data.operand[j])
2117 && REGNO (recog_data.operand[j]) == (unsigned) i)
2119 regstack->reg[++regstack->top] = i;
2120 SET_HARD_REG_BIT (regstack->reg_set, i);
2125 /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD
2126 input that the asm didn't implicitly pop. If the asm didn't
2127 implicitly pop an input reg, that reg will still be live.
2129 Note that we can't use find_regno_note here: the register numbers
2130 in the death notes have already been substituted. */
2132 for (i = 0; i < n_outputs; i++)
2133 if (STACK_REG_P (recog_data.operand[i]))
2137 for (j = 0; j < n_notes; j++)
2138 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j])
2139 && note_kind[j] == REG_UNUSED)
2141 insn = emit_pop_insn (insn, regstack, recog_data.operand[i],
2147 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2148 if (STACK_REG_P (recog_data.operand[i]))
2152 for (j = 0; j < n_notes; j++)
2153 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j])
2154 && note_kind[j] == REG_DEAD
2155 && TEST_HARD_REG_BIT (regstack->reg_set,
2156 REGNO (recog_data.operand[i])))
2158 insn = emit_pop_insn (insn, regstack, recog_data.operand[i],
2165 /* Substitute stack hard reg numbers for stack virtual registers in
2166 INSN. Non-stack register numbers are not changed. REGSTACK is the
2167 current stack content. Insns may be emitted as needed to arrange the
2168 stack for the 387 based on the contents of the insn. */
2171 subst_stack_regs (insn, regstack)
2175 register rtx *note_link, note;
2178 if (GET_CODE (insn) == CALL_INSN)
2180 int top = regstack->top;
2182 /* If there are any floating point parameters to be passed in
2183 registers for this call, make sure they are in the right
2188 straighten_stack (PREV_INSN (insn), regstack);
2190 /* Now mark the arguments as dead after the call. */
2192 while (regstack->top >= 0)
2194 CLEAR_HARD_REG_BIT (regstack->reg_set, FIRST_STACK_REG + regstack->top);
2200 /* Do the actual substitution if any stack regs are mentioned.
2201 Since we only record whether entire insn mentions stack regs, and
2202 subst_stack_regs_pat only works for patterns that contain stack regs,
2203 we must check each pattern in a parallel here. A call_value_pop could
2206 if (stack_regs_mentioned (insn))
2208 int n_operands = asm_noperands (PATTERN (insn));
2209 if (n_operands >= 0)
2211 /* This insn is an `asm' with operands. Decode the operands,
2212 decide how many are inputs, and do register substitution.
2213 Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */
2215 subst_asm_stack_regs (insn, regstack);
2219 if (GET_CODE (PATTERN (insn)) == PARALLEL)
2220 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
2222 if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn), 0, i)))
2223 subst_stack_regs_pat (insn, regstack,
2224 XVECEXP (PATTERN (insn), 0, i));
2227 subst_stack_regs_pat (insn, regstack, PATTERN (insn));
2230 /* subst_stack_regs_pat may have deleted a no-op insn. If so, any
2231 REG_UNUSED will already have been dealt with, so just return. */
2233 if (GET_CODE (insn) == NOTE)
2236 /* If there is a REG_UNUSED note on a stack register on this insn,
2237 the indicated reg must be popped. The REG_UNUSED note is removed,
2238 since the form of the newly emitted pop insn references the reg,
2239 making it no longer `unset'. */
2241 note_link = ®_NOTES(insn);
2242 for (note = *note_link; note; note = XEXP (note, 1))
2243 if (REG_NOTE_KIND (note) == REG_UNUSED && STACK_REG_P (XEXP (note, 0)))
2245 *note_link = XEXP (note, 1);
2246 insn = emit_pop_insn (insn, regstack, XEXP (note, 0), EMIT_AFTER);
2249 note_link = &XEXP (note, 1);
2252 /* Change the organization of the stack so that it fits a new basic
2253 block. Some registers might have to be popped, but there can never be
2254 a register live in the new block that is not now live.
2256 Insert any needed insns before or after INSN, as indicated by
2257 WHERE. OLD is the original stack layout, and NEW is the desired
2258 form. OLD is updated to reflect the code emitted, ie, it will be
2259 the same as NEW upon return.
2261 This function will not preserve block_end[]. But that information
2262 is no longer needed once this has executed. */
2265 change_stack (insn, old, new, where)
2269 enum emit_where where;
2274 /* We will be inserting new insns "backwards". If we are to insert
2275 after INSN, find the next insn, and insert before it. */
2277 if (where == EMIT_AFTER)
2279 if (current_block && current_block->end == insn)
2281 insn = NEXT_INSN (insn);
2284 /* Pop any registers that are not needed in the new block. */
2286 for (reg = old->top; reg >= 0; reg--)
2287 if (! TEST_HARD_REG_BIT (new->reg_set, old->reg[reg]))
2288 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[reg], DFmode),
2293 /* If the new block has never been processed, then it can inherit
2294 the old stack order. */
2296 new->top = old->top;
2297 memcpy (new->reg, old->reg, sizeof (new->reg));
2301 /* This block has been entered before, and we must match the
2302 previously selected stack order. */
2304 /* By now, the only difference should be the order of the stack,
2305 not their depth or liveliness. */
2307 GO_IF_HARD_REG_EQUAL (old->reg_set, new->reg_set, win);
2310 if (old->top != new->top)
2313 /* If the stack is not empty (new->top != -1), loop here emitting
2314 swaps until the stack is correct.
2316 The worst case number of swaps emitted is N + 2, where N is the
2317 depth of the stack. In some cases, the reg at the top of
2318 stack may be correct, but swapped anyway in order to fix
2319 other regs. But since we never swap any other reg away from
2320 its correct slot, this algorithm will converge. */
2325 /* Swap the reg at top of stack into the position it is
2326 supposed to be in, until the correct top of stack appears. */
2328 while (old->reg[old->top] != new->reg[new->top])
2330 for (reg = new->top; reg >= 0; reg--)
2331 if (new->reg[reg] == old->reg[old->top])
2337 emit_swap_insn (insn, old,
2338 FP_MODE_REG (old->reg[reg], DFmode));
2341 /* See if any regs remain incorrect. If so, bring an
2342 incorrect reg to the top of stack, and let the while loop
2345 for (reg = new->top; reg >= 0; reg--)
2346 if (new->reg[reg] != old->reg[reg])
2348 emit_swap_insn (insn, old,
2349 FP_MODE_REG (old->reg[reg], DFmode));
2354 /* At this point there must be no differences. */
2356 for (reg = old->top; reg >= 0; reg--)
2357 if (old->reg[reg] != new->reg[reg])
2362 current_block->end = PREV_INSN (insn);
2365 /* Print stack configuration. */
2368 print_stack (file, s)
2376 fprintf (file, "uninitialized\n");
2377 else if (s->top == -1)
2378 fprintf (file, "empty\n");
2383 for (i = 0; i <= s->top; ++i)
2384 fprintf (file, "%d ", s->reg[i]);
2385 fputs ("]\n", file);
2389 /* This function was doing life analysis. We now let the regular live
2390 code do it's job, so we only need to check some extra invariants
2391 that reg-stack expects. Primary among these being that all registers
2392 are initialized before use.
2394 The function returns true when code was emitted to CFG edges and
2395 commit_edge_insertions needs to be called. */
2398 convert_regs_entry ()
2400 int inserted = 0, i;
2403 for (i = n_basic_blocks - 1; i >= 0; --i)
2405 basic_block block = BASIC_BLOCK (i);
2406 block_info bi = BLOCK_INFO (block);
2409 /* Set current register status at last instruction `uninitialized'. */
2410 bi->stack_in.top = -2;
2412 /* Copy live_at_end and live_at_start into temporaries. */
2413 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; reg++)
2415 if (REGNO_REG_SET_P (block->global_live_at_end, reg))
2416 SET_HARD_REG_BIT (bi->out_reg_set, reg);
2417 if (REGNO_REG_SET_P (block->global_live_at_start, reg))
2418 SET_HARD_REG_BIT (bi->stack_in.reg_set, reg);
2422 /* Load something into each stack register live at function entry.
2423 Such live registers can be caused by uninitialized variables or
2424 functions not returning values on all paths. In order to keep
2425 the push/pop code happy, and to not scrog the register stack, we
2426 must put something in these registers. Use a QNaN.
2428 Note that we are insertting converted code here. This code is
2429 never seen by the convert_regs pass. */
2431 for (e = ENTRY_BLOCK_PTR->succ; e ; e = e->succ_next)
2433 basic_block block = e->dest;
2434 block_info bi = BLOCK_INFO (block);
2437 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg)
2438 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg))
2442 bi->stack_in.reg[++top] = reg;
2444 init = gen_rtx_SET (VOIDmode,
2445 FP_MODE_REG (FIRST_STACK_REG, SFmode),
2447 insert_insn_on_edge (init, e);
2451 bi->stack_in.top = top;
2457 /* Construct the desired stack for function exit. This will either
2458 be `empty', or the function return value at top-of-stack. */
2461 convert_regs_exit ()
2463 int value_reg_low, value_reg_high;
2467 retvalue = stack_result (current_function_decl);
2468 value_reg_low = value_reg_high = -1;
2471 value_reg_low = REGNO (retvalue);
2472 value_reg_high = value_reg_low
2473 + HARD_REGNO_NREGS (value_reg_low, GET_MODE (retvalue)) - 1;
2476 output_stack = &BLOCK_INFO (EXIT_BLOCK_PTR)->stack_in;
2477 if (value_reg_low == -1)
2478 output_stack->top = -1;
2483 output_stack->top = value_reg_high - value_reg_low;
2484 for (reg = value_reg_low; reg <= value_reg_high; ++reg)
2486 output_stack->reg[reg - value_reg_low] = reg;
2487 SET_HARD_REG_BIT (output_stack->reg_set, reg);
2492 /* Adjust the stack of this block on exit to match the stack of the
2493 target block, or copy stack info into the stack of the successor
2494 of the successor hasn't been processed yet. */
2496 compensate_edge (e, file)
2500 basic_block block = e->src, target = e->dest;
2501 block_info bi = BLOCK_INFO (block);
2502 struct stack_def regstack, tmpstack;
2503 stack target_stack = &BLOCK_INFO (target)->stack_in;
2506 current_block = block;
2507 regstack = bi->stack_out;
2509 fprintf (file, "Edge %d->%d: ", block->index, target->index);
2511 if (target_stack->top == -2)
2513 /* The target block hasn't had a stack order selected.
2514 We need merely ensure that no pops are needed. */
2515 for (reg = regstack.top; reg >= 0; --reg)
2516 if (!TEST_HARD_REG_BIT (target_stack->reg_set, regstack.reg[reg]))
2522 fprintf (file, "new block; copying stack position\n");
2524 /* change_stack kills values in regstack. */
2525 tmpstack = regstack;
2527 change_stack (block->end, &tmpstack, target_stack, EMIT_AFTER);
2532 fprintf (file, "new block; pops needed\n");
2536 if (target_stack->top == regstack.top)
2538 for (reg = target_stack->top; reg >= 0; --reg)
2539 if (target_stack->reg[reg] != regstack.reg[reg])
2545 fprintf (file, "no changes needed\n");
2552 fprintf (file, "correcting stack to ");
2553 print_stack (file, target_stack);
2557 /* Care for non-call EH edges specially. The normal return path have
2558 values in registers. These will be popped en masse by the unwind
2560 if ((e->flags & (EDGE_EH | EDGE_ABNORMAL_CALL)) == EDGE_EH)
2561 target_stack->top = -1;
2563 /* Other calls may appear to have values live in st(0), but the
2564 abnormal return path will not have actually loaded the values. */
2565 else if (e->flags & EDGE_ABNORMAL_CALL)
2567 /* Assert that the lifetimes are as we expect -- one value
2568 live at st(0) on the end of the source block, and no
2569 values live at the beginning of the destination block. */
2572 CLEAR_HARD_REG_SET (tmp);
2573 GO_IF_HARD_REG_EQUAL (target_stack->reg_set, tmp, eh1);
2577 SET_HARD_REG_BIT (tmp, FIRST_STACK_REG);
2578 GO_IF_HARD_REG_EQUAL (regstack.reg_set, tmp, eh2);
2582 target_stack->top = -1;
2585 /* It is better to output directly to the end of the block
2586 instead of to the edge, because emit_swap can do minimal
2587 insn scheduling. We can do this when there is only one
2588 edge out, and it is not abnormal. */
2589 else if (block->succ->succ_next == NULL && !(e->flags & EDGE_ABNORMAL))
2591 /* change_stack kills values in regstack. */
2592 tmpstack = regstack;
2594 change_stack (block->end, &tmpstack, target_stack,
2595 (GET_CODE (block->end) == JUMP_INSN
2596 ? EMIT_BEFORE : EMIT_AFTER));
2602 /* We don't support abnormal edges. Global takes care to
2603 avoid any live register across them, so we should never
2604 have to insert instructions on such edges. */
2605 if (e->flags & EDGE_ABNORMAL)
2608 current_block = NULL;
2611 /* ??? change_stack needs some point to emit insns after.
2612 Also needed to keep gen_sequence from returning a
2613 pattern as opposed to a sequence, which would lose
2615 after = emit_note (NULL, NOTE_INSN_DELETED);
2617 tmpstack = regstack;
2618 change_stack (after, &tmpstack, target_stack, EMIT_BEFORE);
2620 seq = gen_sequence ();
2623 insert_insn_on_edge (seq, e);
2629 /* Convert stack register references in one block. */
2632 convert_regs_1 (file, block)
2636 struct stack_def regstack;
2637 block_info bi = BLOCK_INFO (block);
2640 edge e, beste = NULL;
2644 /* Find the edge we will copy stack from. It should be the most frequent
2645 one as it will get cheapest after compensation code is generated,
2646 if multiple such exists, take one with largest count, preffer critical
2647 one (as splitting critical edges is more expensive), or one with lowest
2648 index, to avoid random changes with different orders of the edges. */
2649 for (e = block->pred; e ; e = e->pred_next)
2651 if (e->flags & EDGE_DFS_BACK)
2655 else if (EDGE_FREQUENCY (beste) < EDGE_FREQUENCY (e))
2657 else if (EDGE_FREQUENCY (beste) > EDGE_FREQUENCY (e))
2659 else if (beste->count < e->count)
2661 else if (beste->count > e->count)
2663 else if ((e->flags & EDGE_CRITICAL) != (beste->flags & EDGE_CRITICAL))
2665 if (e->flags & EDGE_CRITICAL)
2668 else if (e->src->index < beste->src->index)
2672 /* Entry block does have stack already initialized. */
2673 if (bi->stack_in.top == -2)
2674 inserted |= compensate_edge (beste, file);
2678 current_block = block;
2682 fprintf (file, "\nBasic block %d\nInput stack: ", block->index);
2683 print_stack (file, &bi->stack_in);
2686 /* Process all insns in this block. Keep track of NEXT so that we
2687 don't process insns emitted while substituting in INSN. */
2689 regstack = bi->stack_in;
2693 next = NEXT_INSN (insn);
2695 /* Ensure we have not missed a block boundary. */
2698 if (insn == block->end)
2701 /* Don't bother processing unless there is a stack reg
2702 mentioned or if it's a CALL_INSN. */
2703 if (stack_regs_mentioned (insn)
2704 || GET_CODE (insn) == CALL_INSN)
2708 fprintf (file, " insn %d input stack: ",
2710 print_stack (file, ®stack);
2712 subst_stack_regs (insn, ®stack);
2719 fprintf (file, "Expected live registers [");
2720 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg)
2721 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg))
2722 fprintf (file, " %d", reg);
2723 fprintf (file, " ]\nOutput stack: ");
2724 print_stack (file, ®stack);
2728 if (GET_CODE (insn) == JUMP_INSN)
2729 insn = PREV_INSN (insn);
2731 /* If the function is declared to return a value, but it returns one
2732 in only some cases, some registers might come live here. Emit
2733 necessary moves for them. */
2735 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg)
2737 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg)
2738 && ! TEST_HARD_REG_BIT (regstack.reg_set, reg))
2744 fprintf (file, "Emitting insn initializing reg %d\n",
2748 set = gen_rtx_SET (VOIDmode, FP_MODE_REG (reg, SFmode),
2750 insn = emit_block_insn_after (set, insn, block);
2751 subst_stack_regs (insn, ®stack);
2755 /* Something failed if the stack lives don't match. */
2756 GO_IF_HARD_REG_EQUAL (regstack.reg_set, bi->out_reg_set, win);
2759 bi->stack_out = regstack;
2761 /* Compensate the back edges, as those wasn't visited yet. */
2762 for (e = block->succ; e ; e = e->succ_next)
2764 if (e->flags & EDGE_DFS_BACK
2765 || (e->dest == EXIT_BLOCK_PTR))
2767 if (!BLOCK_INFO (e->dest)->done
2768 && e->dest != block)
2770 inserted |= compensate_edge (e, file);
2773 for (e = block->pred; e ; e = e->pred_next)
2775 if (e != beste && !(e->flags & EDGE_DFS_BACK)
2776 && e->src != ENTRY_BLOCK_PTR)
2778 if (!BLOCK_INFO (e->src)->done)
2780 inserted |= compensate_edge (e, file);
2787 /* Convert registers in all blocks reachable from BLOCK. */
2790 convert_regs_2 (file, block)
2794 basic_block *stack, *sp;
2797 stack = (basic_block *) xmalloc (sizeof (*stack) * n_basic_blocks);
2808 inserted |= convert_regs_1 (file, block);
2809 BLOCK_INFO (block)->done = 1;
2811 for (e = block->succ; e ; e = e->succ_next)
2812 if (! (e->flags & EDGE_DFS_BACK))
2814 BLOCK_INFO (e->dest)->predecesors--;
2815 if (!BLOCK_INFO (e->dest)->predecesors)
2819 while (sp != stack);
2824 /* Traverse all basic blocks in a function, converting the register
2825 references in each insn from the "flat" register file that gcc uses,
2826 to the stack-like registers the 387 uses. */
2835 /* Initialize uninitialized registers on function entry. */
2836 inserted = convert_regs_entry ();
2838 /* Construct the desired stack for function exit. */
2839 convert_regs_exit ();
2840 BLOCK_INFO (EXIT_BLOCK_PTR)->done = 1;
2842 /* ??? Future: process inner loops first, and give them arbitrary
2843 initial stacks which emit_swap_insn can modify. This ought to
2844 prevent double fxch that aften appears at the head of a loop. */
2846 /* Process all blocks reachable from all entry points. */
2847 for (e = ENTRY_BLOCK_PTR->succ; e ; e = e->succ_next)
2848 inserted |= convert_regs_2 (file, e->dest);
2850 /* ??? Process all unreachable blocks. Though there's no excuse
2851 for keeping these even when not optimizing. */
2852 for (i = 0; i < n_basic_blocks; ++i)
2854 basic_block b = BASIC_BLOCK (i);
2855 block_info bi = BLOCK_INFO (b);
2861 /* Create an arbitrary input stack. */
2862 bi->stack_in.top = -1;
2863 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg)
2864 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg))
2865 bi->stack_in.reg[++bi->stack_in.top] = reg;
2867 inserted |= convert_regs_2 (file, b);
2872 commit_edge_insertions ();
2879 #endif /* STACK_REGS */