1 /* Register to Stack convert for GNU compiler.
2 Copyright (C) 1992, 1993, 1994, 1995 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
20 /* This pass converts stack-like registers from the "flat register
21 file" model that gcc uses, to a stack convention that the 387 uses.
23 * The form of the input:
25 On input, the function consists of insn that have had their
26 registers fully allocated to a set of "virtual" registers. Note that
27 the word "virtual" is used differently here than elsewhere in gcc: for
28 each virtual stack reg, there is a hard reg, but the mapping between
29 them is not known until this pass is run. On output, hard register
30 numbers have been substituted, and various pop and exchange insns have
31 been emitted. The hard register numbers and the virtual register
32 numbers completely overlap - before this pass, all stack register
33 numbers are virtual, and afterward they are all hard.
35 The virtual registers can be manipulated normally by gcc, and their
36 semantics are the same as for normal registers. After the hard
37 register numbers are substituted, the semantics of an insn containing
38 stack-like regs are not the same as for an insn with normal regs: for
39 instance, it is not safe to delete an insn that appears to be a no-op
40 move. In general, no insn containing hard regs should be changed
41 after this pass is done.
43 * The form of the output:
45 After this pass, hard register numbers represent the distance from
46 the current top of stack to the desired register. A reference to
47 FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1,
48 represents the register just below that, and so forth. Also, REG_DEAD
49 notes indicate whether or not a stack register should be popped.
51 A "swap" insn looks like a parallel of two patterns, where each
52 pattern is a SET: one sets A to B, the other B to A.
54 A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG
55 and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS,
56 will replace the existing stack top, not push a new value.
58 A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose
59 SET_SRC is REG or MEM.
61 The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG
62 appears ambiguous. As a special case, the presence of a REG_DEAD note
63 for FIRST_STACK_REG differentiates between a load insn and a pop.
65 If a REG_DEAD is present, the insn represents a "pop" that discards
66 the top of the register stack. If there is no REG_DEAD note, then the
67 insn represents a "dup" or a push of the current top of stack onto the
72 Existing REG_DEAD and REG_UNUSED notes for stack registers are
73 deleted and recreated from scratch. REG_DEAD is never created for a
74 SET_DEST, only REG_UNUSED.
76 Before life analysis, the mode of each insn is set based on whether
77 or not any stack registers are mentioned within that insn. VOIDmode
78 means that no regs are mentioned anyway, and QImode means that at
79 least one pattern within the insn mentions stack registers. This
80 information is valid until after reg_to_stack returns, and is used
85 There are several rules on the usage of stack-like regs in
86 asm_operands insns. These rules apply only to the operands that are
89 1. Given a set of input regs that die in an asm_operands, it is
90 necessary to know which are implicitly popped by the asm, and
91 which must be explicitly popped by gcc.
93 An input reg that is implicitly popped by the asm must be
94 explicitly clobbered, unless it is constrained to match an
97 2. For any input reg that is implicitly popped by an asm, it is
98 necessary to know how to adjust the stack to compensate for the pop.
99 If any non-popped input is closer to the top of the reg-stack than
100 the implicitly popped reg, it would not be possible to know what the
101 stack looked like - it's not clear how the rest of the stack "slides
104 All implicitly popped input regs must be closer to the top of
105 the reg-stack than any input that is not implicitly popped.
107 3. It is possible that if an input dies in an insn, reload might
108 use the input reg for an output reload. Consider this example:
110 asm ("foo" : "=t" (a) : "f" (b));
112 This asm says that input B is not popped by the asm, and that
113 the asm pushes a result onto the reg-stack, ie, the stack is one
114 deeper after the asm than it was before. But, it is possible that
115 reload will think that it can use the same reg for both the input and
116 the output, if input B dies in this insn.
118 If any input operand uses the "f" constraint, all output reg
119 constraints must use the "&" earlyclobber.
121 The asm above would be written as
123 asm ("foo" : "=&t" (a) : "f" (b));
125 4. Some operands need to be in particular places on the stack. All
126 output operands fall in this category - there is no other way to
127 know which regs the outputs appear in unless the user indicates
128 this in the constraints.
130 Output operands must specifically indicate which reg an output
131 appears in after an asm. "=f" is not allowed: the operand
132 constraints must select a class with a single reg.
134 5. Output operands may not be "inserted" between existing stack regs.
135 Since no 387 opcode uses a read/write operand, all output operands
136 are dead before the asm_operands, and are pushed by the asm_operands.
137 It makes no sense to push anywhere but the top of the reg-stack.
139 Output operands must start at the top of the reg-stack: output
140 operands may not "skip" a reg.
142 6. Some asm statements may need extra stack space for internal
143 calculations. This can be guaranteed by clobbering stack registers
144 unrelated to the inputs and outputs.
146 Here are a couple of reasonable asms to want to write. This asm
147 takes one input, which is internally popped, and produces two outputs.
149 asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp));
151 This asm takes two inputs, which are popped by the fyl2xp1 opcode,
152 and replaces them with one output. The user must code the "st(1)"
153 clobber for reg-stack.c to know that fyl2xp1 pops both inputs.
155 asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)");
163 #include "insn-config.h"
165 #include "hard-reg-set.h"
170 #define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1)
172 /* This is the basic stack record. TOP is an index into REG[] such
173 that REG[TOP] is the top of stack. If TOP is -1 the stack is empty.
175 If TOP is -2, REG[] is not yet initialized. Stack initialization
176 consists of placing each live reg in array `reg' and setting `top'
179 REG_SET indicates which registers are live. */
181 typedef struct stack_def
183 int top; /* index to top stack element */
184 HARD_REG_SET reg_set; /* set of live registers */
185 char reg[REG_STACK_SIZE]; /* register - stack mapping */
188 /* highest instruction uid */
189 static int max_uid = 0;
191 /* Number of basic blocks in the current function. */
194 /* Element N is first insn in basic block N.
195 This info lasts until we finish compiling the function. */
196 static rtx *block_begin;
198 /* Element N is last insn in basic block N.
199 This info lasts until we finish compiling the function. */
200 static rtx *block_end;
202 /* Element N is nonzero if control can drop into basic block N */
203 static char *block_drops_in;
205 /* Element N says all about the stack at entry block N */
206 static stack block_stack_in;
208 /* Element N says all about the stack life at the end of block N */
209 static HARD_REG_SET *block_out_reg_set;
211 /* This is where the BLOCK_NUM values are really stored. This is set
212 up by find_blocks and used there and in life_analysis. It can be used
213 later, but only to look up an insn that is the head or tail of some
214 block. life_analysis and the stack register conversion process can
215 add insns within a block. */
216 static int *block_number;
218 /* This is the register file for all register after conversion */
220 FP_mode_reg[LAST_STACK_REG+1-FIRST_STACK_REG][(int) MAX_MACHINE_MODE];
222 #define FP_MODE_REG(regno,mode) \
223 (FP_mode_reg[(regno)-FIRST_STACK_REG][(int)(mode)])
225 /* Get the basic block number of an insn. See note at block_number
226 definition are validity of this information. */
228 #define BLOCK_NUM(INSN) \
229 ((INSN_UID (INSN) > max_uid) \
230 ? (abort() , -1) : block_number[INSN_UID (INSN)])
232 extern rtx forced_labels;
233 extern rtx gen_jump ();
234 extern rtx gen_movdf (), gen_movxf ();
235 extern rtx find_regno_note ();
236 extern rtx emit_jump_insn_before ();
237 extern rtx emit_label_after ();
239 /* Forward declarations */
241 static void find_blocks ();
242 static uses_reg_or_mem ();
243 static void stack_reg_life_analysis ();
244 static void record_reg_life_pat ();
245 static void change_stack ();
246 static void convert_regs ();
247 static void dump_stack_info ();
249 /* Mark all registers needed for this pattern. */
252 mark_regs_pat (pat, set)
256 enum machine_mode mode;
260 if (GET_CODE (pat) == SUBREG)
262 mode = GET_MODE (pat);
263 regno = SUBREG_WORD (pat);
264 regno += REGNO (SUBREG_REG (pat));
267 regno = REGNO (pat), mode = GET_MODE (pat);
269 for (count = HARD_REGNO_NREGS (regno, mode);
270 count; count--, regno++)
271 SET_HARD_REG_BIT (*set, regno);
274 /* Reorganise the stack into ascending numbers,
278 straighten_stack (insn, regstack)
282 struct stack_def temp_stack;
285 temp_stack.reg_set = regstack->reg_set;
287 for (top = temp_stack.top = regstack->top; top >= 0; top--)
288 temp_stack.reg[top] = FIRST_STACK_REG + temp_stack.top - top;
290 change_stack (insn, regstack, &temp_stack, emit_insn_after);
293 /* Return non-zero if any stack register is mentioned somewhere within PAT. */
296 stack_regs_mentioned_p (pat)
302 if (STACK_REG_P (pat))
305 fmt = GET_RTX_FORMAT (GET_CODE (pat));
306 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
312 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
313 if (stack_regs_mentioned_p (XVECEXP (pat, i, j)))
316 else if (fmt[i] == 'e' && stack_regs_mentioned_p (XEXP (pat, i)))
323 /* Convert register usage from "flat" register file usage to a "stack
324 register file. FIRST is the first insn in the function, FILE is the
327 First compute the beginning and end of each basic block. Do a
328 register life analysis on the stack registers, recording the result
329 for the head and tail of each basic block. The convert each insn one
330 by one. Run a last jump_optimize() pass, if optimizing, to eliminate
331 any cross-jumping created when the converter inserts pop insns.*/
334 reg_to_stack (first, file)
340 int stack_reg_seen = 0;
341 enum machine_mode mode;
342 HARD_REG_SET stackentry;
344 CLEAR_HARD_REG_SET (stackentry);
351 initialised = 1; /* This array can not have been previously
352 initialised, because the rtx's are
353 thrown away between compilations of
356 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
358 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
359 mode = GET_MODE_WIDER_MODE (mode))
360 FP_MODE_REG (i, mode) = gen_rtx (REG, mode, i);
361 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT); mode != VOIDmode;
362 mode = GET_MODE_WIDER_MODE (mode))
363 FP_MODE_REG (i, mode) = gen_rtx (REG, mode, i);
368 /* Count the basic blocks. Also find maximum insn uid. */
370 register RTX_CODE prev_code = BARRIER;
371 register RTX_CODE code;
372 register before_function_beg = 1;
376 for (insn = first; insn; insn = NEXT_INSN (insn))
378 /* Note that this loop must select the same block boundaries
379 as code in find_blocks. Also note that this code is not the
380 same as that used in flow.c. */
382 if (INSN_UID (insn) > max_uid)
383 max_uid = INSN_UID (insn);
385 code = GET_CODE (insn);
387 if (code == CODE_LABEL
388 || (prev_code != INSN
389 && prev_code != CALL_INSN
390 && prev_code != CODE_LABEL
391 && GET_RTX_CLASS (code) == 'i'))
394 if (code == NOTE && NOTE_LINE_NUMBER (insn) == NOTE_INSN_FUNCTION_BEG)
395 before_function_beg = 0;
397 /* Remember whether or not this insn mentions an FP regs.
398 Check JUMP_INSNs too, in case someone creates a funny PARALLEL. */
400 if (GET_RTX_CLASS (code) == 'i'
401 && stack_regs_mentioned_p (PATTERN (insn)))
404 PUT_MODE (insn, QImode);
406 /* Note any register passing parameters. */
408 if (before_function_beg && code == INSN
409 && GET_CODE (PATTERN (insn)) == USE)
410 record_reg_life_pat (PATTERN (insn), (HARD_REG_SET*) 0,
414 PUT_MODE (insn, VOIDmode);
416 if (code == CODE_LABEL)
417 LABEL_REFS (insn) = insn; /* delete old chain */
424 /* If no stack register reference exists in this insn, there isn't
425 anything to convert. */
427 if (! stack_reg_seen)
430 /* If there are stack registers, there must be at least one block. */
435 /* Allocate some tables that last till end of compiling this function
436 and some needed only in find_blocks and life_analysis. */
438 block_begin = (rtx *) alloca (blocks * sizeof (rtx));
439 block_end = (rtx *) alloca (blocks * sizeof (rtx));
440 block_drops_in = (char *) alloca (blocks);
442 block_stack_in = (stack) alloca (blocks * sizeof (struct stack_def));
443 block_out_reg_set = (HARD_REG_SET *) alloca (blocks * sizeof (HARD_REG_SET));
444 bzero ((char *) block_stack_in, blocks * sizeof (struct stack_def));
445 bzero ((char *) block_out_reg_set, blocks * sizeof (HARD_REG_SET));
447 block_number = (int *) alloca ((max_uid + 1) * sizeof (int));
450 stack_reg_life_analysis (first, &stackentry);
452 /* Dump the life analysis debug information before jump
453 optimization, as that will destroy the LABEL_REFS we keep the
457 dump_stack_info (file);
462 jump_optimize (first, 2, 0, 0);
465 /* Check PAT, which is in INSN, for LABEL_REFs. Add INSN to the
466 label's chain of references, and note which insn contains each
470 record_label_references (insn, pat)
473 register enum rtx_code code = GET_CODE (pat);
477 if (code == LABEL_REF)
479 register rtx label = XEXP (pat, 0);
482 if (GET_CODE (label) != CODE_LABEL)
485 /* Don't make a duplicate in the code_label's chain. */
487 for (ref = LABEL_REFS (label);
489 ref = LABEL_NEXTREF (ref))
490 if (CONTAINING_INSN (ref) == insn)
493 CONTAINING_INSN (pat) = insn;
494 LABEL_NEXTREF (pat) = LABEL_REFS (label);
495 LABEL_REFS (label) = pat;
500 fmt = GET_RTX_FORMAT (code);
501 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
504 record_label_references (insn, XEXP (pat, i));
508 for (j = 0; j < XVECLEN (pat, i); j++)
509 record_label_references (insn, XVECEXP (pat, i, j));
514 /* Return a pointer to the REG expression within PAT. If PAT is not a
515 REG, possible enclosed by a conversion rtx, return the inner part of
516 PAT that stopped the search. */
523 switch (GET_CODE (*pat))
526 /* eliminate FP subregister accesses in favour of the
527 actual FP register in use. */
530 if (FP_REG_P (subreg = SUBREG_REG (*pat)))
532 *pat = FP_MODE_REG (REGNO (subreg) + SUBREG_WORD (*pat),
541 pat = & XEXP (*pat, 0);
545 /* Scan the OPERANDS and OPERAND_CONSTRAINTS of an asm_operands.
546 N_OPERANDS is the total number of operands. Return which alternative
547 matched, or -1 is no alternative matches.
549 OPERAND_MATCHES is an array which indicates which operand this
550 operand matches due to the constraints, or -1 if no match is required.
551 If two operands match by coincidence, but are not required to match by
552 the constraints, -1 is returned.
554 OPERAND_CLASS is an array which indicates the smallest class
555 required by the constraints. If the alternative that matches calls
556 for some class `class', and the operand matches a subclass of `class',
557 OPERAND_CLASS is set to `class' as required by the constraints, not to
558 the subclass. If an alternative allows more than one class,
559 OPERAND_CLASS is set to the smallest class that is a union of the
563 constrain_asm_operands (n_operands, operands, operand_constraints,
564 operand_matches, operand_class)
567 char **operand_constraints;
568 int *operand_matches;
569 enum reg_class *operand_class;
571 char **constraints = (char **) alloca (n_operands * sizeof (char *));
573 int this_alternative, this_operand;
577 for (j = 0; j < n_operands; j++)
578 constraints[j] = operand_constraints[j];
580 /* Compute the number of alternatives in the operands. reload has
581 already guaranteed that all operands have the same number of
585 for (q = constraints[0]; *q; q++)
586 n_alternatives += (*q == ',');
588 this_alternative = 0;
589 while (this_alternative < n_alternatives)
594 /* No operands match, no narrow class requirements yet. */
595 for (i = 0; i < n_operands; i++)
597 operand_matches[i] = -1;
598 operand_class[i] = NO_REGS;
601 for (this_operand = 0; this_operand < n_operands; this_operand++)
603 rtx op = operands[this_operand];
604 enum machine_mode mode = GET_MODE (op);
605 char *p = constraints[this_operand];
610 if (GET_CODE (op) == SUBREG)
612 if (GET_CODE (SUBREG_REG (op)) == REG
613 && REGNO (SUBREG_REG (op)) < FIRST_PSEUDO_REGISTER)
614 offset = SUBREG_WORD (op);
615 op = SUBREG_REG (op);
618 /* An empty constraint or empty alternative
619 allows anything which matched the pattern. */
620 if (*p == 0 || *p == ',')
623 while (*p && (c = *p++) != ',')
637 /* Ignore rest of this alternative. */
638 while (*p && *p != ',') p++;
647 /* This operand must be the same as a previous one.
648 This kind of constraint is used for instructions such
649 as add when they take only two operands.
651 Note that the lower-numbered operand is passed first. */
653 if (operands_match_p (operands[c - '0'],
654 operands[this_operand]))
656 operand_matches[this_operand] = c - '0';
662 /* p is used for address_operands. Since this is an asm,
663 just to make sure that the operand is valid for Pmode. */
665 if (strict_memory_address_p (Pmode, op))
670 /* Anything goes unless it is a REG and really has a hard reg
671 but the hard reg is not in the class GENERAL_REGS. */
672 if (GENERAL_REGS == ALL_REGS
673 || GET_CODE (op) != REG
674 || reg_fits_class_p (op, GENERAL_REGS, offset, mode))
676 if (GET_CODE (op) == REG)
677 operand_class[this_operand]
678 = reg_class_subunion[(int) operand_class[this_operand]][(int) GENERAL_REGS];
684 if (GET_CODE (op) == REG
685 && (GENERAL_REGS == ALL_REGS
686 || reg_fits_class_p (op, GENERAL_REGS, offset, mode)))
688 operand_class[this_operand]
689 = reg_class_subunion[(int) operand_class[this_operand]][(int) GENERAL_REGS];
695 /* This is used for a MATCH_SCRATCH in the cases when we
696 don't actually need anything. So anything goes any time. */
701 if (GET_CODE (op) == MEM)
706 if (GET_CODE (op) == MEM
707 && (GET_CODE (XEXP (op, 0)) == PRE_DEC
708 || GET_CODE (XEXP (op, 0)) == POST_DEC))
713 if (GET_CODE (op) == MEM
714 && (GET_CODE (XEXP (op, 0)) == PRE_INC
715 || GET_CODE (XEXP (op, 0)) == POST_INC))
720 /* Match any CONST_DOUBLE, but only if
721 we can examine the bits of it reliably. */
722 if ((HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT
723 || HOST_BITS_PER_WIDE_INT != BITS_PER_WORD)
724 && GET_CODE (op) != VOIDmode && ! flag_pretend_float)
726 if (GET_CODE (op) == CONST_DOUBLE)
731 if (GET_CODE (op) == CONST_DOUBLE)
737 if (GET_CODE (op) == CONST_DOUBLE
738 && CONST_DOUBLE_OK_FOR_LETTER_P (op, c))
743 if (GET_CODE (op) == CONST_INT
744 || (GET_CODE (op) == CONST_DOUBLE
745 && GET_MODE (op) == VOIDmode))
754 if (GET_CODE (op) == CONST_INT
755 || (GET_CODE (op) == CONST_DOUBLE
756 && GET_MODE (op) == VOIDmode))
768 if (GET_CODE (op) == CONST_INT
769 && CONST_OK_FOR_LETTER_P (INTVAL (op), c))
773 #ifdef EXTRA_CONSTRAINT
779 if (EXTRA_CONSTRAINT (op, c))
785 if (GET_CODE (op) == MEM && ! offsettable_memref_p (op))
790 if (offsettable_memref_p (op))
795 if (GET_CODE (op) == REG
796 && reg_fits_class_p (op, REG_CLASS_FROM_LETTER (c),
799 operand_class[this_operand]
800 = reg_class_subunion[(int)operand_class[this_operand]][(int) REG_CLASS_FROM_LETTER (c)];
805 constraints[this_operand] = p;
806 /* If this operand did not win somehow,
807 this alternative loses. */
811 /* This alternative won; the operands are ok.
812 Change whichever operands this alternative says to change. */
819 /* For operands constrained to match another operand, copy the other
820 operand's class to this operand's class. */
821 for (j = 0; j < n_operands; j++)
822 if (operand_matches[j] >= 0)
823 operand_class[j] = operand_class[operand_matches[j]];
825 return this_alternative == n_alternatives ? -1 : this_alternative;
828 /* Record the life info of each stack reg in INSN, updating REGSTACK.
829 N_INPUTS is the number of inputs; N_OUTPUTS the outputs. CONSTRAINTS
830 is an array of the constraint strings used in the asm statement.
831 OPERANDS is an array of all operands for the insn, and is assumed to
832 contain all output operands, then all inputs operands.
834 There are many rules that an asm statement for stack-like regs must
835 follow. Those rules are explained at the top of this file: the rule
836 numbers below refer to that explanation. */
839 record_asm_reg_life (insn, regstack, operands, constraints,
845 int n_inputs, n_outputs;
848 int n_operands = n_inputs + n_outputs;
849 int first_input = n_outputs;
851 int malformed_asm = 0;
852 rtx body = PATTERN (insn);
854 int *operand_matches = (int *) alloca (n_operands * sizeof (int *));
856 enum reg_class *operand_class
857 = (enum reg_class *) alloca (n_operands * sizeof (enum reg_class *));
859 int reg_used_as_output[FIRST_PSEUDO_REGISTER];
860 int implicitly_dies[FIRST_PSEUDO_REGISTER];
864 /* Find out what the constraints require. If no constraint
865 alternative matches, this asm is malformed. */
866 i = constrain_asm_operands (n_operands, operands, constraints,
867 operand_matches, operand_class);
871 /* Strip SUBREGs here to make the following code simpler. */
872 for (i = 0; i < n_operands; i++)
873 if (GET_CODE (operands[i]) == SUBREG
874 && GET_CODE (SUBREG_REG (operands[i])) == REG)
875 operands[i] = SUBREG_REG (operands[i]);
877 /* Set up CLOBBER_REG. */
881 if (GET_CODE (body) == PARALLEL)
883 clobber_reg = (rtx *) alloca (XVECLEN (body, 0) * sizeof (rtx *));
885 for (i = 0; i < XVECLEN (body, 0); i++)
886 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
888 rtx clobber = XVECEXP (body, 0, i);
889 rtx reg = XEXP (clobber, 0);
891 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
892 reg = SUBREG_REG (reg);
894 if (STACK_REG_P (reg))
896 clobber_reg[n_clobbers] = reg;
902 /* Enforce rule #4: Output operands must specifically indicate which
903 reg an output appears in after an asm. "=f" is not allowed: the
904 operand constraints must select a class with a single reg.
906 Also enforce rule #5: Output operands must start at the top of
907 the reg-stack: output operands may not "skip" a reg. */
909 bzero ((char *) reg_used_as_output, sizeof (reg_used_as_output));
910 for (i = 0; i < n_outputs; i++)
911 if (STACK_REG_P (operands[i]))
912 if (reg_class_size[(int) operand_class[i]] != 1)
915 (insn, "Output constraint %d must specify a single register", i);
919 reg_used_as_output[REGNO (operands[i])] = 1;
922 /* Search for first non-popped reg. */
923 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
924 if (! reg_used_as_output[i])
927 /* If there are any other popped regs, that's an error. */
928 for (; i < LAST_STACK_REG + 1; i++)
929 if (reg_used_as_output[i])
932 if (i != LAST_STACK_REG + 1)
934 error_for_asm (insn, "Output regs must be grouped at top of stack");
938 /* Enforce rule #2: All implicitly popped input regs must be closer
939 to the top of the reg-stack than any input that is not implicitly
942 bzero ((char *) implicitly_dies, sizeof (implicitly_dies));
943 for (i = first_input; i < first_input + n_inputs; i++)
944 if (STACK_REG_P (operands[i]))
946 /* An input reg is implicitly popped if it is tied to an
947 output, or if there is a CLOBBER for it. */
950 for (j = 0; j < n_clobbers; j++)
951 if (operands_match_p (clobber_reg[j], operands[i]))
954 if (j < n_clobbers || operand_matches[i] >= 0)
955 implicitly_dies[REGNO (operands[i])] = 1;
958 /* Search for first non-popped reg. */
959 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
960 if (! implicitly_dies[i])
963 /* If there are any other popped regs, that's an error. */
964 for (; i < LAST_STACK_REG + 1; i++)
965 if (implicitly_dies[i])
968 if (i != LAST_STACK_REG + 1)
971 "Implicitly popped regs must be grouped at top of stack");
975 /* Enfore rule #3: If any input operand uses the "f" constraint, all
976 output constraints must use the "&" earlyclobber.
978 ??? Detect this more deterministically by having constraint_asm_operands
979 record any earlyclobber. */
981 for (i = first_input; i < first_input + n_inputs; i++)
982 if (operand_matches[i] == -1)
986 for (j = 0; j < n_outputs; j++)
987 if (operands_match_p (operands[j], operands[i]))
990 "Output operand %d must use `&' constraint", j);
997 /* Avoid further trouble with this insn. */
998 PATTERN (insn) = gen_rtx (USE, VOIDmode, const0_rtx);
999 PUT_MODE (insn, VOIDmode);
1003 /* Process all outputs */
1004 for (i = 0; i < n_outputs; i++)
1006 rtx op = operands[i];
1008 if (! STACK_REG_P (op))
1009 if (stack_regs_mentioned_p (op))
1014 /* Each destination is dead before this insn. If the
1015 destination is not used after this insn, record this with
1018 if (! TEST_HARD_REG_BIT (regstack->reg_set, REGNO (op)))
1019 REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_UNUSED, op,
1022 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (op));
1025 /* Process all inputs */
1026 for (i = first_input; i < first_input + n_inputs; i++)
1028 if (! STACK_REG_P (operands[i]))
1029 if (stack_regs_mentioned_p (operands[i]))
1034 /* If an input is dead after the insn, record a death note.
1035 But don't record a death note if there is already a death note,
1036 or if the input is also an output. */
1038 if (! TEST_HARD_REG_BIT (regstack->reg_set, REGNO (operands[i]))
1039 && operand_matches[i] == -1
1040 && find_regno_note (insn, REG_DEAD, REGNO (operands[i])) == NULL_RTX)
1041 REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_DEAD, operands[i],
1044 SET_HARD_REG_BIT (regstack->reg_set, REGNO (operands[i]));
1048 /* Scan PAT, which is part of INSN, and record registers appearing in
1049 a SET_DEST in DEST, and other registers in SRC.
1051 This function does not know about SET_DESTs that are both input and
1052 output (such as ZERO_EXTRACT) - this cannot happen on a 387. */
1055 record_reg_life_pat (pat, src, dest, douse)
1057 HARD_REG_SET *src, *dest;
1063 if (STACK_REG_P (pat)
1064 || GET_CODE (pat) == SUBREG && STACK_REG_P (SUBREG_REG (pat)))
1067 mark_regs_pat (pat, src);
1070 mark_regs_pat (pat, dest);
1075 if (GET_CODE (pat) == SET)
1077 record_reg_life_pat (XEXP (pat, 0), NULL_PTR, dest, 0);
1078 record_reg_life_pat (XEXP (pat, 1), src, NULL_PTR, 0);
1082 /* We don't need to consider either of these cases. */
1083 if (GET_CODE (pat) == USE && !douse || GET_CODE (pat) == CLOBBER)
1086 fmt = GET_RTX_FORMAT (GET_CODE (pat));
1087 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
1093 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
1094 record_reg_life_pat (XVECEXP (pat, i, j), src, dest, 0);
1096 else if (fmt[i] == 'e')
1097 record_reg_life_pat (XEXP (pat, i), src, dest, 0);
1101 /* Calculate the number of inputs and outputs in BODY, an
1102 asm_operands. N_OPERANDS is the total number of operands, and
1103 N_INPUTS and N_OUTPUTS are pointers to ints into which the results are
1107 get_asm_operand_lengths (body, n_operands, n_inputs, n_outputs)
1110 int *n_inputs, *n_outputs;
1112 if (GET_CODE (body) == SET && GET_CODE (SET_SRC (body)) == ASM_OPERANDS)
1113 *n_inputs = ASM_OPERANDS_INPUT_LENGTH (SET_SRC (body));
1115 else if (GET_CODE (body) == ASM_OPERANDS)
1116 *n_inputs = ASM_OPERANDS_INPUT_LENGTH (body);
1118 else if (GET_CODE (body) == PARALLEL
1119 && GET_CODE (XVECEXP (body, 0, 0)) == SET)
1120 *n_inputs = ASM_OPERANDS_INPUT_LENGTH (SET_SRC (XVECEXP (body, 0, 0)));
1122 else if (GET_CODE (body) == PARALLEL
1123 && GET_CODE (XVECEXP (body, 0, 0)) == ASM_OPERANDS)
1124 *n_inputs = ASM_OPERANDS_INPUT_LENGTH (XVECEXP (body, 0, 0));
1128 *n_outputs = n_operands - *n_inputs;
1131 /* Scan INSN, which is in BLOCK, and record the life & death of stack
1132 registers in REGSTACK. This function is called to process insns from
1133 the last insn in a block to the first. The actual scanning is done in
1134 record_reg_life_pat.
1136 If a register is live after a CALL_INSN, but is not a value return
1137 register for that CALL_INSN, then code is emitted to initialize that
1138 register. The block_end[] data is kept accurate.
1140 Existing death and unset notes for stack registers are deleted
1141 before processing the insn. */
1144 record_reg_life (insn, block, regstack)
1149 rtx note, *note_link;
1152 if ((GET_CODE (insn) != INSN && GET_CODE (insn) != CALL_INSN)
1153 || INSN_DELETED_P (insn))
1156 /* Strip death notes for stack regs from this insn */
1158 note_link = ®_NOTES(insn);
1159 for (note = *note_link; note; note = XEXP (note, 1))
1160 if (STACK_REG_P (XEXP (note, 0))
1161 && (REG_NOTE_KIND (note) == REG_DEAD
1162 || REG_NOTE_KIND (note) == REG_UNUSED))
1163 *note_link = XEXP (note, 1);
1165 note_link = &XEXP (note, 1);
1167 /* Process all patterns in the insn. */
1169 n_operands = asm_noperands (PATTERN (insn));
1170 if (n_operands >= 0)
1172 /* This insn is an `asm' with operands. Decode the operands,
1173 decide how many are inputs, and record the life information. */
1175 rtx operands[MAX_RECOG_OPERANDS];
1176 rtx body = PATTERN (insn);
1177 int n_inputs, n_outputs;
1178 char **constraints = (char **) alloca (n_operands * sizeof (char *));
1180 decode_asm_operands (body, operands, NULL_PTR, constraints, NULL_PTR);
1181 get_asm_operand_lengths (body, n_operands, &n_inputs, &n_outputs);
1182 record_asm_reg_life (insn, regstack, operands, constraints,
1183 n_inputs, n_outputs);
1188 HARD_REG_SET src, dest;
1191 CLEAR_HARD_REG_SET (src);
1192 CLEAR_HARD_REG_SET (dest);
1194 if (GET_CODE (insn) == CALL_INSN)
1195 for (note = CALL_INSN_FUNCTION_USAGE (insn);
1197 note = XEXP (note, 1))
1198 if (GET_CODE (XEXP (note, 0)) == USE)
1199 record_reg_life_pat (SET_DEST (XEXP (note, 0)), &src, NULL_PTR, 0);
1201 record_reg_life_pat (PATTERN (insn), &src, &dest, 1);
1202 for (regno = FIRST_STACK_REG; regno <= LAST_STACK_REG; regno++)
1203 if (! TEST_HARD_REG_BIT (regstack->reg_set, regno))
1205 if (TEST_HARD_REG_BIT (src, regno)
1206 && ! TEST_HARD_REG_BIT (dest, regno))
1207 REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_DEAD,
1208 FP_MODE_REG (regno, DFmode),
1210 else if (TEST_HARD_REG_BIT (dest, regno))
1211 REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_UNUSED,
1212 FP_MODE_REG (regno, DFmode),
1216 if (GET_CODE (insn) == CALL_INSN)
1220 /* There might be a reg that is live after a function call.
1221 Initialize it to zero so that the program does not crash. See
1222 comment towards the end of stack_reg_life_analysis(). */
1224 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; reg++)
1225 if (! TEST_HARD_REG_BIT (dest, reg)
1226 && TEST_HARD_REG_BIT (regstack->reg_set, reg))
1230 /* The insn will use virtual register numbers, and so
1231 convert_regs is expected to process these. But BLOCK_NUM
1232 cannot be used on these insns, because they do not appear in
1235 pat = gen_rtx (SET, VOIDmode, FP_MODE_REG (reg, DFmode),
1236 CONST0_RTX (DFmode));
1237 init = emit_insn_after (pat, insn);
1238 PUT_MODE (init, QImode);
1240 CLEAR_HARD_REG_BIT (regstack->reg_set, reg);
1242 /* If the CALL_INSN was the end of a block, move the
1243 block_end to point to the new insn. */
1245 if (block_end[block] == insn)
1246 block_end[block] = init;
1249 /* Some regs do not survive a CALL */
1250 AND_COMPL_HARD_REG_SET (regstack->reg_set, call_used_reg_set);
1253 AND_COMPL_HARD_REG_SET (regstack->reg_set, dest);
1254 IOR_HARD_REG_SET (regstack->reg_set, src);
1258 /* Find all basic blocks of the function, which starts with FIRST.
1259 For each JUMP_INSN, build the chain of LABEL_REFS on each CODE_LABEL. */
1267 register RTX_CODE prev_code = BARRIER;
1268 register RTX_CODE code;
1269 rtx label_value_list = 0;
1271 /* Record where all the blocks start and end.
1272 Record which basic blocks control can drop in to. */
1275 for (insn = first; insn; insn = NEXT_INSN (insn))
1277 /* Note that this loop must select the same block boundaries
1278 as code in reg_to_stack, but that these are not the same
1279 as those selected in flow.c. */
1281 code = GET_CODE (insn);
1283 if (code == CODE_LABEL
1284 || (prev_code != INSN
1285 && prev_code != CALL_INSN
1286 && prev_code != CODE_LABEL
1287 && GET_RTX_CLASS (code) == 'i'))
1289 block_begin[++block] = insn;
1290 block_end[block] = insn;
1291 block_drops_in[block] = prev_code != BARRIER;
1293 else if (GET_RTX_CLASS (code) == 'i')
1294 block_end[block] = insn;
1296 if (GET_RTX_CLASS (code) == 'i')
1300 /* Make a list of all labels referred to other than by jumps. */
1301 for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
1302 if (REG_NOTE_KIND (note) == REG_LABEL)
1303 label_value_list = gen_rtx (EXPR_LIST, VOIDmode, XEXP (note, 0),
1307 block_number[INSN_UID (insn)] = block;
1313 if (block + 1 != blocks)
1316 /* generate all label references to the corresponding jump insn */
1317 for (block = 0; block < blocks; block++)
1319 insn = block_end[block];
1321 if (GET_CODE (insn) == JUMP_INSN)
1323 rtx pat = PATTERN (insn);
1324 int computed_jump = 0;
1327 if (GET_CODE (pat) == PARALLEL)
1329 int len = XVECLEN (pat, 0);
1330 int has_use_labelref = 0;
1333 for (i = len - 1; i >= 0; i--)
1334 if (GET_CODE (XVECEXP (pat, 0, i)) == USE
1335 && GET_CODE (XEXP (XVECEXP (pat, 0, i), 0)) == LABEL_REF)
1336 has_use_labelref = 1;
1338 if (! has_use_labelref)
1339 for (i = len - 1; i >= 0; i--)
1340 if (GET_CODE (XVECEXP (pat, 0, i)) == SET
1341 && SET_DEST (XVECEXP (pat, 0, i)) == pc_rtx
1342 && uses_reg_or_mem (SET_SRC (XVECEXP (pat, 0, i))))
1345 else if (GET_CODE (pat) == SET
1346 && SET_DEST (pat) == pc_rtx
1347 && uses_reg_or_mem (SET_SRC (pat)))
1352 for (x = label_value_list; x; x = XEXP (x, 1))
1353 record_label_references (insn,
1354 gen_rtx (LABEL_REF, VOIDmode,
1357 for (x = forced_labels; x; x = XEXP (x, 1))
1358 record_label_references (insn,
1359 gen_rtx (LABEL_REF, VOIDmode,
1363 record_label_references (insn, pat);
1368 /* Return 1 if X contain a REG or MEM that is not in the constant pool. */
1374 enum rtx_code code = GET_CODE (x);
1380 && ! (GET_CODE (XEXP (x, 0)) == SYMBOL_REF
1381 && CONSTANT_POOL_ADDRESS_P (XEXP (x, 0)))))
1384 fmt = GET_RTX_FORMAT (code);
1385 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1388 && uses_reg_or_mem (XEXP (x, i)))
1392 for (j = 0; j < XVECLEN (x, i); j++)
1393 if (uses_reg_or_mem (XVECEXP (x, i, j)))
1400 /* If current function returns its result in an fp stack register,
1401 return the REG. Otherwise, return 0. */
1407 rtx result = DECL_RTL (DECL_RESULT (decl));
1410 && ! (GET_CODE (result) == REG
1411 && REGNO (result) < FIRST_PSEUDO_REGISTER))
1413 #ifdef FUNCTION_OUTGOING_VALUE
1415 = FUNCTION_OUTGOING_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl);
1417 result = FUNCTION_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl);
1421 return result != 0 && STACK_REG_P (result) ? result : 0;
1424 /* Determine the which registers are live at the start of each basic
1425 block of the function whose first insn is FIRST.
1427 First, if the function returns a real_type, mark the function
1428 return type as live at each return point, as the RTL may not give any
1429 hint that the register is live.
1431 Then, start with the last block and work back to the first block.
1432 Similarly, work backwards within each block, insn by insn, recording
1433 which regs are dead and which are used (and therefore live) in the
1434 hard reg set of block_stack_in[].
1436 After processing each basic block, if there is a label at the start
1437 of the block, propagate the live registers to all jumps to this block.
1439 As a special case, if there are regs live in this block, that are
1440 not live in a block containing a jump to this label, and the block
1441 containing the jump has already been processed, we must propagate this
1442 block's entry register life back to the block containing the jump, and
1443 restart life analysis from there.
1445 In the worst case, this function may traverse the insns
1446 REG_STACK_SIZE times. This is necessary, since a jump towards the end
1447 of the insns may not know that a reg is live at a target that is early
1448 in the insns. So we back up and start over with the new reg live.
1450 If there are registers that are live at the start of the function,
1451 insns are emitted to initialize these registers. Something similar is
1452 done after CALL_INSNs in record_reg_life. */
1455 stack_reg_life_analysis (first, stackentry)
1457 HARD_REG_SET *stackentry;
1460 struct stack_def regstack;
1465 if (retvalue = stack_result (current_function_decl))
1467 /* Find all RETURN insns and mark them. */
1469 for (block = blocks - 1; --block >= 0;)
1470 if (GET_CODE (block_end[block]) == JUMP_INSN
1471 && GET_CODE (PATTERN (block_end[block])) == RETURN)
1472 mark_regs_pat (retvalue, block_out_reg_set+block);
1474 /* Mark off the end of last block if we "fall off" the end of the
1475 function into the epilogue. */
1477 if (GET_CODE (block_end[blocks-1]) != JUMP_INSN
1478 || GET_CODE (PATTERN (block_end[blocks-1])) == RETURN)
1479 mark_regs_pat (retvalue, block_out_reg_set+blocks-1);
1483 /* now scan all blocks backward for stack register use */
1488 register rtx insn, prev;
1490 /* current register status at last instruction */
1492 COPY_HARD_REG_SET (regstack.reg_set, block_out_reg_set[block]);
1494 prev = block_end[block];
1498 prev = PREV_INSN (insn);
1500 /* If the insn is a CALL_INSN, we need to ensure that
1501 everything dies. But otherwise don't process unless there
1502 are some stack regs present. */
1504 if (GET_MODE (insn) == QImode || GET_CODE (insn) == CALL_INSN)
1505 record_reg_life (insn, block, ®stack);
1507 } while (insn != block_begin[block]);
1509 /* Set the state at the start of the block. Mark that no
1510 register mapping information known yet. */
1512 COPY_HARD_REG_SET (block_stack_in[block].reg_set, regstack.reg_set);
1513 block_stack_in[block].top = -2;
1515 /* If there is a label, propagate our register life to all jumps
1518 if (GET_CODE (insn) == CODE_LABEL)
1521 int must_restart = 0;
1523 for (label = LABEL_REFS (insn); label != insn;
1524 label = LABEL_NEXTREF (label))
1526 int jump_block = BLOCK_NUM (CONTAINING_INSN (label));
1528 if (jump_block < block)
1529 IOR_HARD_REG_SET (block_out_reg_set[jump_block],
1530 block_stack_in[block].reg_set);
1533 /* The block containing the jump has already been
1534 processed. If there are registers that were not known
1535 to be live then, but are live now, we must back up
1536 and restart life analysis from that point with the new
1537 life information. */
1539 GO_IF_HARD_REG_SUBSET (block_stack_in[block].reg_set,
1540 block_out_reg_set[jump_block],
1543 IOR_HARD_REG_SET (block_out_reg_set[jump_block],
1544 block_stack_in[block].reg_set);
1557 if (block_drops_in[block])
1558 IOR_HARD_REG_SET (block_out_reg_set[block-1],
1559 block_stack_in[block].reg_set);
1564 /* If any reg is live at the start of the first block of a
1565 function, then we must guarantee that the reg holds some value by
1566 generating our own "load" of that register. Otherwise a 387 would
1567 fault trying to access an empty register. */
1569 /* Load zero into each live register. The fact that a register
1570 appears live at the function start necessarily implies an error
1571 in the user program: it means that (unless the offending code is *never*
1572 executed) this program is using uninitialised floating point
1573 variables. In order to keep broken code like this happy, we initialise
1574 those variables with zero.
1576 Note that we are inserting virtual register references here:
1577 these insns must be processed by convert_regs later. Also, these
1578 insns will not be in block_number, so BLOCK_NUM() will fail for them. */
1580 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; reg--)
1581 if (TEST_HARD_REG_BIT (block_stack_in[0].reg_set, reg)
1582 && ! TEST_HARD_REG_BIT (*stackentry, reg))
1586 init_rtx = gen_rtx (SET, VOIDmode, FP_MODE_REG(reg, DFmode),
1587 CONST0_RTX (DFmode));
1588 block_begin[0] = emit_insn_after (init_rtx, first);
1589 PUT_MODE (block_begin[0], QImode);
1591 CLEAR_HARD_REG_BIT (block_stack_in[0].reg_set, reg);
1595 /*****************************************************************************
1596 This section deals with stack register substitution, and forms the second
1598 *****************************************************************************/
1600 /* Replace REG, which is a pointer to a stack reg RTX, with an RTX for
1601 the desired hard REGNO. */
1604 replace_reg (reg, regno)
1608 if (regno < FIRST_STACK_REG || regno > LAST_STACK_REG
1609 || ! STACK_REG_P (*reg))
1612 switch (GET_MODE_CLASS (GET_MODE (*reg)))
1616 case MODE_COMPLEX_FLOAT:;
1619 *reg = FP_MODE_REG (regno, GET_MODE (*reg));
1622 /* Remove a note of type NOTE, which must be found, for register
1623 number REGNO from INSN. Remove only one such note. */
1626 remove_regno_note (insn, note, regno)
1631 register rtx *note_link, this;
1633 note_link = ®_NOTES(insn);
1634 for (this = *note_link; this; this = XEXP (this, 1))
1635 if (REG_NOTE_KIND (this) == note
1636 && REG_P (XEXP (this, 0)) && REGNO (XEXP (this, 0)) == regno)
1638 *note_link = XEXP (this, 1);
1642 note_link = &XEXP (this, 1);
1647 /* Find the hard register number of virtual register REG in REGSTACK.
1648 The hard register number is relative to the top of the stack. -1 is
1649 returned if the register is not found. */
1652 get_hard_regnum (regstack, reg)
1658 if (! STACK_REG_P (reg))
1661 for (i = regstack->top; i >= 0; i--)
1662 if (regstack->reg[i] == REGNO (reg))
1665 return i >= 0 ? (FIRST_STACK_REG + regstack->top - i) : -1;
1668 /* Delete INSN from the RTL. Mark the insn, but don't remove it from
1669 the chain of insns. Doing so could confuse block_begin and block_end
1670 if this were the only insn in the block. */
1673 delete_insn_for_stacker (insn)
1676 PUT_CODE (insn, NOTE);
1677 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
1678 NOTE_SOURCE_FILE (insn) = 0;
1681 /* Emit an insn to pop virtual register REG before or after INSN.
1682 REGSTACK is the stack state after INSN and is updated to reflect this
1683 pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn
1684 is represented as a SET whose destination is the register to be popped
1685 and source is the top of stack. A death note for the top of stack
1686 cases the movdf pattern to pop. */
1689 emit_pop_insn (insn, regstack, reg, when)
1695 rtx pop_insn, pop_rtx;
1698 hard_regno = get_hard_regnum (regstack, reg);
1700 if (hard_regno < FIRST_STACK_REG)
1703 pop_rtx = gen_rtx (SET, VOIDmode, FP_MODE_REG (hard_regno, DFmode),
1704 FP_MODE_REG (FIRST_STACK_REG, DFmode));
1706 pop_insn = (*when) (pop_rtx, insn);
1707 /* ??? This used to be VOIDmode, but that seems wrong. */
1708 PUT_MODE (pop_insn, QImode);
1710 REG_NOTES (pop_insn) = gen_rtx (EXPR_LIST, REG_DEAD,
1711 FP_MODE_REG (FIRST_STACK_REG, DFmode),
1712 REG_NOTES (pop_insn));
1714 regstack->reg[regstack->top - (hard_regno - FIRST_STACK_REG)]
1715 = regstack->reg[regstack->top];
1717 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (reg));
1722 /* Emit an insn before or after INSN to swap virtual register REG with the
1723 top of stack. WHEN should be `emit_insn_before' or `emit_insn_before'
1724 REGSTACK is the stack state before the swap, and is updated to reflect
1725 the swap. A swap insn is represented as a PARALLEL of two patterns:
1726 each pattern moves one reg to the other.
1728 If REG is already at the top of the stack, no insn is emitted. */
1731 emit_swap_insn (insn, regstack, reg)
1738 rtx swap_rtx, swap_insn;
1739 int tmp, other_reg; /* swap regno temps */
1740 rtx i1; /* the stack-reg insn prior to INSN */
1741 rtx i1set = NULL_RTX; /* the SET rtx within I1 */
1743 hard_regno = get_hard_regnum (regstack, reg);
1745 if (hard_regno < FIRST_STACK_REG)
1747 if (hard_regno == FIRST_STACK_REG)
1750 other_reg = regstack->top - (hard_regno - FIRST_STACK_REG);
1752 tmp = regstack->reg[other_reg];
1753 regstack->reg[other_reg] = regstack->reg[regstack->top];
1754 regstack->reg[regstack->top] = tmp;
1756 /* Find the previous insn involving stack regs, but don't go past
1757 any labels, calls or jumps. */
1758 i1 = prev_nonnote_insn (insn);
1759 while (i1 && GET_CODE (i1) == INSN && GET_MODE (i1) != QImode)
1760 i1 = prev_nonnote_insn (i1);
1763 i1set = single_set (i1);
1767 rtx i2; /* the stack-reg insn prior to I1 */
1768 rtx i1src = *get_true_reg (&SET_SRC (i1set));
1769 rtx i1dest = *get_true_reg (&SET_DEST (i1set));
1771 /* If the previous register stack push was from the reg we are to
1772 swap with, omit the swap. */
1774 if (GET_CODE (i1dest) == REG && REGNO (i1dest) == FIRST_STACK_REG
1775 && GET_CODE (i1src) == REG && REGNO (i1src) == hard_regno - 1
1776 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
1779 /* If the previous insn wrote to the reg we are to swap with,
1782 if (GET_CODE (i1dest) == REG && REGNO (i1dest) == hard_regno
1783 && GET_CODE (i1src) == REG && REGNO (i1src) == FIRST_STACK_REG
1784 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
1788 if (GET_RTX_CLASS (GET_CODE (i1)) == 'i' && sets_cc0_p (PATTERN (i1)))
1790 i1 = next_nonnote_insn (i1);
1795 swap_rtx = gen_swapdf (FP_MODE_REG (hard_regno, DFmode),
1796 FP_MODE_REG (FIRST_STACK_REG, DFmode));
1797 swap_insn = emit_insn_after (swap_rtx, i1);
1798 /* ??? This used to be VOIDmode, but that seems wrong. */
1799 PUT_MODE (swap_insn, QImode);
1802 /* Handle a move to or from a stack register in PAT, which is in INSN.
1803 REGSTACK is the current stack. */
1806 move_for_stack_reg (insn, regstack, pat)
1811 rtx *psrc = get_true_reg (&SET_SRC (pat));
1812 rtx *pdest = get_true_reg (&SET_DEST (pat));
1816 src = *psrc; dest = *pdest;
1818 if (STACK_REG_P (src) && STACK_REG_P (dest))
1820 /* Write from one stack reg to another. If SRC dies here, then
1821 just change the register mapping and delete the insn. */
1823 note = find_regno_note (insn, REG_DEAD, REGNO (src));
1828 /* If this is a no-op move, there must not be a REG_DEAD note. */
1829 if (REGNO (src) == REGNO (dest))
1832 for (i = regstack->top; i >= 0; i--)
1833 if (regstack->reg[i] == REGNO (src))
1836 /* The source must be live, and the dest must be dead. */
1837 if (i < 0 || get_hard_regnum (regstack, dest) >= FIRST_STACK_REG)
1840 /* It is possible that the dest is unused after this insn.
1841 If so, just pop the src. */
1843 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
1845 emit_pop_insn (insn, regstack, src, emit_insn_after);
1847 delete_insn_for_stacker (insn);
1851 regstack->reg[i] = REGNO (dest);
1853 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1854 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
1856 delete_insn_for_stacker (insn);
1861 /* The source reg does not die. */
1863 /* If this appears to be a no-op move, delete it, or else it
1864 will confuse the machine description output patterns. But if
1865 it is REG_UNUSED, we must pop the reg now, as per-insn processing
1866 for REG_UNUSED will not work for deleted insns. */
1868 if (REGNO (src) == REGNO (dest))
1870 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
1871 emit_pop_insn (insn, regstack, dest, emit_insn_after);
1873 delete_insn_for_stacker (insn);
1877 /* The destination ought to be dead */
1878 if (get_hard_regnum (regstack, dest) >= FIRST_STACK_REG)
1881 replace_reg (psrc, get_hard_regnum (regstack, src));
1883 regstack->reg[++regstack->top] = REGNO (dest);
1884 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1885 replace_reg (pdest, FIRST_STACK_REG);
1887 else if (STACK_REG_P (src))
1889 /* Save from a stack reg to MEM, or possibly integer reg. Since
1890 only top of stack may be saved, emit an exchange first if
1893 emit_swap_insn (insn, regstack, src);
1895 note = find_regno_note (insn, REG_DEAD, REGNO (src));
1898 replace_reg (&XEXP (note, 0), FIRST_STACK_REG);
1900 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
1902 else if (GET_MODE (src) == XFmode && regstack->top != REG_STACK_SIZE)
1904 /* A 387 cannot write an XFmode value to a MEM without
1905 clobbering the source reg. The output code can handle
1906 this by reading back the value from the MEM.
1907 But it is more efficient to use a temp register if one is
1908 available. Push the source value here if the register
1909 stack is not full, and then write the value to memory via
1911 rtx push_rtx, push_insn;
1912 rtx top_stack_reg = FP_MODE_REG (FIRST_STACK_REG, XFmode);
1914 push_rtx = gen_movxf (top_stack_reg, top_stack_reg);
1915 push_insn = emit_insn_before (push_rtx, insn);
1916 PUT_MODE (push_insn, QImode);
1917 REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_DEAD, top_stack_reg,
1921 replace_reg (psrc, FIRST_STACK_REG);
1923 else if (STACK_REG_P (dest))
1925 /* Load from MEM, or possibly integer REG or constant, into the
1926 stack regs. The actual target is always the top of the
1927 stack. The stack mapping is changed to reflect that DEST is
1928 now at top of stack. */
1930 /* The destination ought to be dead */
1931 if (get_hard_regnum (regstack, dest) >= FIRST_STACK_REG)
1934 if (regstack->top >= REG_STACK_SIZE)
1937 regstack->reg[++regstack->top] = REGNO (dest);
1938 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1939 replace_reg (pdest, FIRST_STACK_REG);
1946 swap_rtx_condition (pat)
1952 if (GET_RTX_CLASS (GET_CODE (pat)) == '<')
1954 PUT_CODE (pat, swap_condition (GET_CODE (pat)));
1958 fmt = GET_RTX_FORMAT (GET_CODE (pat));
1959 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
1965 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
1966 swap_rtx_condition (XVECEXP (pat, i, j));
1968 else if (fmt[i] == 'e')
1969 swap_rtx_condition (XEXP (pat, i));
1973 /* Handle a comparison. Special care needs to be taken to avoid
1974 causing comparisons that a 387 cannot do correctly, such as EQ.
1976 Also, a pop insn may need to be emitted. The 387 does have an
1977 `fcompp' insn that can pop two regs, but it is sometimes too expensive
1978 to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to
1982 compare_for_stack_reg (insn, regstack, pat)
1988 rtx src1_note, src2_note;
1990 src1 = get_true_reg (&XEXP (SET_SRC (pat), 0));
1991 src2 = get_true_reg (&XEXP (SET_SRC (pat), 1));
1993 /* ??? If fxch turns out to be cheaper than fstp, give priority to
1994 registers that die in this insn - move those to stack top first. */
1995 if (! STACK_REG_P (*src1)
1996 || (STACK_REG_P (*src2)
1997 && get_hard_regnum (regstack, *src2) == FIRST_STACK_REG))
2001 temp = XEXP (SET_SRC (pat), 0);
2002 XEXP (SET_SRC (pat), 0) = XEXP (SET_SRC (pat), 1);
2003 XEXP (SET_SRC (pat), 1) = temp;
2005 src1 = get_true_reg (&XEXP (SET_SRC (pat), 0));
2006 src2 = get_true_reg (&XEXP (SET_SRC (pat), 1));
2008 next = next_cc0_user (insn);
2009 if (next == NULL_RTX)
2012 swap_rtx_condition (PATTERN (next));
2013 INSN_CODE (next) = -1;
2014 INSN_CODE (insn) = -1;
2017 /* We will fix any death note later. */
2019 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
2021 if (STACK_REG_P (*src2))
2022 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
2024 src2_note = NULL_RTX;
2026 emit_swap_insn (insn, regstack, *src1);
2028 replace_reg (src1, FIRST_STACK_REG);
2030 if (STACK_REG_P (*src2))
2031 replace_reg (src2, get_hard_regnum (regstack, *src2));
2035 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (XEXP (src1_note, 0)));
2036 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
2040 /* If the second operand dies, handle that. But if the operands are
2041 the same stack register, don't bother, because only one death is
2042 needed, and it was just handled. */
2045 && ! (STACK_REG_P (*src1) && STACK_REG_P (*src2)
2046 && REGNO (*src1) == REGNO (*src2)))
2048 /* As a special case, two regs may die in this insn if src2 is
2049 next to top of stack and the top of stack also dies. Since
2050 we have already popped src1, "next to top of stack" is really
2051 at top (FIRST_STACK_REG) now. */
2053 if (get_hard_regnum (regstack, XEXP (src2_note, 0)) == FIRST_STACK_REG
2056 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (XEXP (src2_note, 0)));
2057 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1);
2062 /* The 386 can only represent death of the first operand in
2063 the case handled above. In all other cases, emit a separate
2064 pop and remove the death note from here. */
2066 link_cc0_insns (insn);
2068 remove_regno_note (insn, REG_DEAD, REGNO (XEXP (src2_note, 0)));
2070 emit_pop_insn (insn, regstack, XEXP (src2_note, 0),
2076 /* Substitute new registers in PAT, which is part of INSN. REGSTACK
2077 is the current register layout. */
2080 subst_stack_regs_pat (insn, regstack, pat)
2086 rtx *src1 = (rtx *) NULL_PTR, *src2;
2087 rtx src1_note, src2_note;
2089 if (GET_CODE (pat) != SET)
2092 dest = get_true_reg (&SET_DEST (pat));
2093 src = get_true_reg (&SET_SRC (pat));
2095 /* See if this is a `movM' pattern, and handle elsewhere if so. */
2097 if (*dest != cc0_rtx
2098 && (STACK_REG_P (*src)
2099 || (STACK_REG_P (*dest)
2100 && (GET_CODE (*src) == REG || GET_CODE (*src) == MEM
2101 || GET_CODE (*src) == CONST_DOUBLE))))
2102 move_for_stack_reg (insn, regstack, pat);
2104 switch (GET_CODE (SET_SRC (pat)))
2107 compare_for_stack_reg (insn, regstack, pat);
2113 for (count = HARD_REGNO_NREGS (REGNO (*dest), GET_MODE (*dest));
2116 regstack->reg[++regstack->top] = REGNO (*dest) + count;
2117 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest) + count);
2120 replace_reg (dest, FIRST_STACK_REG);
2124 /* This is a `tstM2' case. */
2125 if (*dest != cc0_rtx)
2132 case FLOAT_TRUNCATE:
2136 /* These insns only operate on the top of the stack. DEST might
2137 be cc0_rtx if we're processing a tstM pattern. Also, it's
2138 possible that the tstM case results in a REG_DEAD note on the
2142 src1 = get_true_reg (&XEXP (SET_SRC (pat), 0));
2144 emit_swap_insn (insn, regstack, *src1);
2146 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
2148 if (STACK_REG_P (*dest))
2149 replace_reg (dest, FIRST_STACK_REG);
2153 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
2155 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
2158 replace_reg (src1, FIRST_STACK_REG);
2164 /* On i386, reversed forms of subM3 and divM3 exist for
2165 MODE_FLOAT, so the same code that works for addM3 and mulM3
2169 /* These insns can accept the top of stack as a destination
2170 from a stack reg or mem, or can use the top of stack as a
2171 source and some other stack register (possibly top of stack)
2172 as a destination. */
2174 src1 = get_true_reg (&XEXP (SET_SRC (pat), 0));
2175 src2 = get_true_reg (&XEXP (SET_SRC (pat), 1));
2177 /* We will fix any death note later. */
2179 if (STACK_REG_P (*src1))
2180 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
2182 src1_note = NULL_RTX;
2183 if (STACK_REG_P (*src2))
2184 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
2186 src2_note = NULL_RTX;
2188 /* If either operand is not a stack register, then the dest
2189 must be top of stack. */
2191 if (! STACK_REG_P (*src1) || ! STACK_REG_P (*src2))
2192 emit_swap_insn (insn, regstack, *dest);
2195 /* Both operands are REG. If neither operand is already
2196 at the top of stack, choose to make the one that is the dest
2197 the new top of stack. */
2199 int src1_hard_regnum, src2_hard_regnum;
2201 src1_hard_regnum = get_hard_regnum (regstack, *src1);
2202 src2_hard_regnum = get_hard_regnum (regstack, *src2);
2203 if (src1_hard_regnum == -1 || src2_hard_regnum == -1)
2206 if (src1_hard_regnum != FIRST_STACK_REG
2207 && src2_hard_regnum != FIRST_STACK_REG)
2208 emit_swap_insn (insn, regstack, *dest);
2211 if (STACK_REG_P (*src1))
2212 replace_reg (src1, get_hard_regnum (regstack, *src1));
2213 if (STACK_REG_P (*src2))
2214 replace_reg (src2, get_hard_regnum (regstack, *src2));
2218 /* If the register that dies is at the top of stack, then
2219 the destination is somewhere else - merely substitute it.
2220 But if the reg that dies is not at top of stack, then
2221 move the top of stack to the dead reg, as though we had
2222 done the insn and then a store-with-pop. */
2224 if (REGNO (XEXP (src1_note, 0)) == regstack->reg[regstack->top])
2226 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
2227 replace_reg (dest, get_hard_regnum (regstack, *dest));
2231 int regno = get_hard_regnum (regstack, XEXP (src1_note, 0));
2233 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
2234 replace_reg (dest, regno);
2236 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
2237 = regstack->reg[regstack->top];
2240 CLEAR_HARD_REG_BIT (regstack->reg_set,
2241 REGNO (XEXP (src1_note, 0)));
2242 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
2247 if (REGNO (XEXP (src2_note, 0)) == regstack->reg[regstack->top])
2249 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
2250 replace_reg (dest, get_hard_regnum (regstack, *dest));
2254 int regno = get_hard_regnum (regstack, XEXP (src2_note, 0));
2256 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
2257 replace_reg (dest, regno);
2259 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
2260 = regstack->reg[regstack->top];
2263 CLEAR_HARD_REG_BIT (regstack->reg_set,
2264 REGNO (XEXP (src2_note, 0)));
2265 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG);
2270 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
2271 replace_reg (dest, get_hard_regnum (regstack, *dest));
2277 switch (XINT (SET_SRC (pat), 1))
2281 /* These insns only operate on the top of the stack. */
2283 src1 = get_true_reg (&XVECEXP (SET_SRC (pat), 0, 0));
2285 emit_swap_insn (insn, regstack, *src1);
2287 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
2289 if (STACK_REG_P (*dest))
2290 replace_reg (dest, FIRST_STACK_REG);
2294 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
2296 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
2299 replace_reg (src1, FIRST_STACK_REG);
2313 /* Substitute hard regnums for any stack regs in INSN, which has
2314 N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info
2315 before the insn, and is updated with changes made here. CONSTRAINTS is
2316 an array of the constraint strings used in the asm statement.
2318 OPERANDS is an array of the operands, and OPERANDS_LOC is a
2319 parallel array of where the operands were found. The output operands
2320 all precede the input operands.
2322 There are several requirements and assumptions about the use of
2323 stack-like regs in asm statements. These rules are enforced by
2324 record_asm_stack_regs; see comments there for details. Any
2325 asm_operands left in the RTL at this point may be assume to meet the
2326 requirements, since record_asm_stack_regs removes any problem asm. */
2329 subst_asm_stack_regs (insn, regstack, operands, operands_loc, constraints,
2330 n_inputs, n_outputs)
2333 rtx *operands, **operands_loc;
2335 int n_inputs, n_outputs;
2337 int n_operands = n_inputs + n_outputs;
2338 int first_input = n_outputs;
2339 rtx body = PATTERN (insn);
2341 int *operand_matches = (int *) alloca (n_operands * sizeof (int *));
2342 enum reg_class *operand_class
2343 = (enum reg_class *) alloca (n_operands * sizeof (enum reg_class *));
2345 rtx *note_reg; /* Array of note contents */
2346 rtx **note_loc; /* Address of REG field of each note */
2347 enum reg_note *note_kind; /* The type of each note */
2352 struct stack_def temp_stack;
2358 /* Find out what the constraints required. If no constraint
2359 alternative matches, that is a compiler bug: we should have caught
2360 such an insn during the life analysis pass (and reload should have
2361 caught it regardless). */
2363 i = constrain_asm_operands (n_operands, operands, constraints,
2364 operand_matches, operand_class);
2368 /* Strip SUBREGs here to make the following code simpler. */
2369 for (i = 0; i < n_operands; i++)
2370 if (GET_CODE (operands[i]) == SUBREG
2371 && GET_CODE (SUBREG_REG (operands[i])) == REG)
2373 operands_loc[i] = & SUBREG_REG (operands[i]);
2374 operands[i] = SUBREG_REG (operands[i]);
2377 /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */
2379 for (i = 0, note = REG_NOTES (insn); note; note = XEXP (note, 1))
2382 note_reg = (rtx *) alloca (i * sizeof (rtx));
2383 note_loc = (rtx **) alloca (i * sizeof (rtx *));
2384 note_kind = (enum reg_note *) alloca (i * sizeof (enum reg_note));
2387 for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
2389 rtx reg = XEXP (note, 0);
2390 rtx *loc = & XEXP (note, 0);
2392 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
2394 loc = & SUBREG_REG (reg);
2395 reg = SUBREG_REG (reg);
2398 if (STACK_REG_P (reg)
2399 && (REG_NOTE_KIND (note) == REG_DEAD
2400 || REG_NOTE_KIND (note) == REG_UNUSED))
2402 note_reg[n_notes] = reg;
2403 note_loc[n_notes] = loc;
2404 note_kind[n_notes] = REG_NOTE_KIND (note);
2409 /* Set up CLOBBER_REG and CLOBBER_LOC. */
2413 if (GET_CODE (body) == PARALLEL)
2415 clobber_reg = (rtx *) alloca (XVECLEN (body, 0) * sizeof (rtx *));
2416 clobber_loc = (rtx **) alloca (XVECLEN (body, 0) * sizeof (rtx **));
2418 for (i = 0; i < XVECLEN (body, 0); i++)
2419 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
2421 rtx clobber = XVECEXP (body, 0, i);
2422 rtx reg = XEXP (clobber, 0);
2423 rtx *loc = & XEXP (clobber, 0);
2425 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
2427 loc = & SUBREG_REG (reg);
2428 reg = SUBREG_REG (reg);
2431 if (STACK_REG_P (reg))
2433 clobber_reg[n_clobbers] = reg;
2434 clobber_loc[n_clobbers] = loc;
2440 bcopy ((char *) regstack, (char *) &temp_stack, sizeof (temp_stack));
2442 /* Put the input regs into the desired place in TEMP_STACK. */
2444 for (i = first_input; i < first_input + n_inputs; i++)
2445 if (STACK_REG_P (operands[i])
2446 && reg_class_subset_p (operand_class[i], FLOAT_REGS)
2447 && operand_class[i] != FLOAT_REGS)
2449 /* If an operand needs to be in a particular reg in
2450 FLOAT_REGS, the constraint was either 't' or 'u'. Since
2451 these constraints are for single register classes, and reload
2452 guaranteed that operand[i] is already in that class, we can
2453 just use REGNO (operands[i]) to know which actual reg this
2454 operand needs to be in. */
2456 int regno = get_hard_regnum (&temp_stack, operands[i]);
2461 if (regno != REGNO (operands[i]))
2463 /* operands[i] is not in the right place. Find it
2464 and swap it with whatever is already in I's place.
2465 K is where operands[i] is now. J is where it should
2469 k = temp_stack.top - (regno - FIRST_STACK_REG);
2471 - (REGNO (operands[i]) - FIRST_STACK_REG));
2473 temp = temp_stack.reg[k];
2474 temp_stack.reg[k] = temp_stack.reg[j];
2475 temp_stack.reg[j] = temp;
2479 /* emit insns before INSN to make sure the reg-stack is in the right
2482 change_stack (insn, regstack, &temp_stack, emit_insn_before);
2484 /* Make the needed input register substitutions. Do death notes and
2485 clobbers too, because these are for inputs, not outputs. */
2487 for (i = first_input; i < first_input + n_inputs; i++)
2488 if (STACK_REG_P (operands[i]))
2490 int regnum = get_hard_regnum (regstack, operands[i]);
2495 replace_reg (operands_loc[i], regnum);
2498 for (i = 0; i < n_notes; i++)
2499 if (note_kind[i] == REG_DEAD)
2501 int regnum = get_hard_regnum (regstack, note_reg[i]);
2506 replace_reg (note_loc[i], regnum);
2509 for (i = 0; i < n_clobbers; i++)
2511 /* It's OK for a CLOBBER to reference a reg that is not live.
2512 Don't try to replace it in that case. */
2513 int regnum = get_hard_regnum (regstack, clobber_reg[i]);
2517 /* Sigh - clobbers always have QImode. But replace_reg knows
2518 that these regs can't be MODE_INT and will abort. Just put
2519 the right reg there without calling replace_reg. */
2521 *clobber_loc[i] = FP_MODE_REG (regnum, DFmode);
2525 /* Now remove from REGSTACK any inputs that the asm implicitly popped. */
2527 for (i = first_input; i < first_input + n_inputs; i++)
2528 if (STACK_REG_P (operands[i]))
2530 /* An input reg is implicitly popped if it is tied to an
2531 output, or if there is a CLOBBER for it. */
2534 for (j = 0; j < n_clobbers; j++)
2535 if (operands_match_p (clobber_reg[j], operands[i]))
2538 if (j < n_clobbers || operand_matches[i] >= 0)
2540 /* operands[i] might not be at the top of stack. But that's OK,
2541 because all we need to do is pop the right number of regs
2542 off of the top of the reg-stack. record_asm_stack_regs
2543 guaranteed that all implicitly popped regs were grouped
2544 at the top of the reg-stack. */
2546 CLEAR_HARD_REG_BIT (regstack->reg_set,
2547 regstack->reg[regstack->top]);
2552 /* Now add to REGSTACK any outputs that the asm implicitly pushed.
2553 Note that there isn't any need to substitute register numbers.
2554 ??? Explain why this is true. */
2556 for (i = LAST_STACK_REG; i >= FIRST_STACK_REG; i--)
2558 /* See if there is an output for this hard reg. */
2561 for (j = 0; j < n_outputs; j++)
2562 if (STACK_REG_P (operands[j]) && REGNO (operands[j]) == i)
2564 regstack->reg[++regstack->top] = i;
2565 SET_HARD_REG_BIT (regstack->reg_set, i);
2570 /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD
2571 input that the asm didn't implicitly pop. If the asm didn't
2572 implicitly pop an input reg, that reg will still be live.
2574 Note that we can't use find_regno_note here: the register numbers
2575 in the death notes have already been substituted. */
2577 for (i = 0; i < n_outputs; i++)
2578 if (STACK_REG_P (operands[i]))
2582 for (j = 0; j < n_notes; j++)
2583 if (REGNO (operands[i]) == REGNO (note_reg[j])
2584 && note_kind[j] == REG_UNUSED)
2586 insn = emit_pop_insn (insn, regstack, operands[i],
2592 for (i = first_input; i < first_input + n_inputs; i++)
2593 if (STACK_REG_P (operands[i]))
2597 for (j = 0; j < n_notes; j++)
2598 if (REGNO (operands[i]) == REGNO (note_reg[j])
2599 && note_kind[j] == REG_DEAD
2600 && TEST_HARD_REG_BIT (regstack->reg_set, REGNO (operands[i])))
2602 insn = emit_pop_insn (insn, regstack, operands[i],
2609 /* Substitute stack hard reg numbers for stack virtual registers in
2610 INSN. Non-stack register numbers are not changed. REGSTACK is the
2611 current stack content. Insns may be emitted as needed to arrange the
2612 stack for the 387 based on the contents of the insn. */
2615 subst_stack_regs (insn, regstack)
2619 register rtx *note_link, note;
2623 if (GET_CODE (insn) == CALL_INSN)
2625 int top = regstack->top;
2627 /* If there are any floating point parameters to be passed in
2628 registers for this call, make sure they are in the right
2633 straighten_stack (PREV_INSN (insn), regstack);
2635 /* Now mark the arguments as dead after the call. */
2637 while (regstack->top >= 0)
2639 CLEAR_HARD_REG_BIT (regstack->reg_set, FIRST_STACK_REG + regstack->top);
2645 /* Do the actual substitution if any stack regs are mentioned.
2646 Since we only record whether entire insn mentions stack regs, and
2647 subst_stack_regs_pat only works for patterns that contain stack regs,
2648 we must check each pattern in a parallel here. A call_value_pop could
2651 if (GET_MODE (insn) == QImode)
2653 n_operands = asm_noperands (PATTERN (insn));
2654 if (n_operands >= 0)
2656 /* This insn is an `asm' with operands. Decode the operands,
2657 decide how many are inputs, and do register substitution.
2658 Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */
2660 rtx operands[MAX_RECOG_OPERANDS];
2661 rtx *operands_loc[MAX_RECOG_OPERANDS];
2662 rtx body = PATTERN (insn);
2663 int n_inputs, n_outputs;
2665 = (char **) alloca (n_operands * sizeof (char *));
2667 decode_asm_operands (body, operands, operands_loc,
2668 constraints, NULL_PTR);
2669 get_asm_operand_lengths (body, n_operands, &n_inputs, &n_outputs);
2670 subst_asm_stack_regs (insn, regstack, operands, operands_loc,
2671 constraints, n_inputs, n_outputs);
2675 if (GET_CODE (PATTERN (insn)) == PARALLEL)
2676 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
2678 if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn), 0, i)))
2679 subst_stack_regs_pat (insn, regstack,
2680 XVECEXP (PATTERN (insn), 0, i));
2683 subst_stack_regs_pat (insn, regstack, PATTERN (insn));
2686 /* subst_stack_regs_pat may have deleted a no-op insn. If so, any
2687 REG_UNUSED will already have been dealt with, so just return. */
2689 if (GET_CODE (insn) == NOTE)
2692 /* If there is a REG_UNUSED note on a stack register on this insn,
2693 the indicated reg must be popped. The REG_UNUSED note is removed,
2694 since the form of the newly emitted pop insn references the reg,
2695 making it no longer `unset'. */
2697 note_link = ®_NOTES(insn);
2698 for (note = *note_link; note; note = XEXP (note, 1))
2699 if (REG_NOTE_KIND (note) == REG_UNUSED && STACK_REG_P (XEXP (note, 0)))
2701 *note_link = XEXP (note, 1);
2702 insn = emit_pop_insn (insn, regstack, XEXP (note, 0), emit_insn_after);
2705 note_link = &XEXP (note, 1);
2708 /* Change the organization of the stack so that it fits a new basic
2709 block. Some registers might have to be popped, but there can never be
2710 a register live in the new block that is not now live.
2712 Insert any needed insns before or after INSN. WHEN is emit_insn_before
2713 or emit_insn_after. OLD is the original stack layout, and NEW is
2714 the desired form. OLD is updated to reflect the code emitted, ie, it
2715 will be the same as NEW upon return.
2717 This function will not preserve block_end[]. But that information
2718 is no longer needed once this has executed. */
2721 change_stack (insn, old, new, when)
2729 /* We will be inserting new insns "backwards", by calling emit_insn_before.
2730 If we are to insert after INSN, find the next insn, and insert before
2733 if (when == emit_insn_after)
2734 insn = NEXT_INSN (insn);
2736 /* Pop any registers that are not needed in the new block. */
2738 for (reg = old->top; reg >= 0; reg--)
2739 if (! TEST_HARD_REG_BIT (new->reg_set, old->reg[reg]))
2740 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[reg], DFmode),
2745 /* If the new block has never been processed, then it can inherit
2746 the old stack order. */
2748 new->top = old->top;
2749 bcopy (old->reg, new->reg, sizeof (new->reg));
2753 /* This block has been entered before, and we must match the
2754 previously selected stack order. */
2756 /* By now, the only difference should be the order of the stack,
2757 not their depth or liveliness. */
2759 GO_IF_HARD_REG_EQUAL (old->reg_set, new->reg_set, win);
2765 if (old->top != new->top)
2768 /* Loop here emitting swaps until the stack is correct. The
2769 worst case number of swaps emitted is N + 2, where N is the
2770 depth of the stack. In some cases, the reg at the top of
2771 stack may be correct, but swapped anyway in order to fix
2772 other regs. But since we never swap any other reg away from
2773 its correct slot, this algorithm will converge. */
2777 /* Swap the reg at top of stack into the position it is
2778 supposed to be in, until the correct top of stack appears. */
2780 while (old->reg[old->top] != new->reg[new->top])
2782 for (reg = new->top; reg >= 0; reg--)
2783 if (new->reg[reg] == old->reg[old->top])
2789 emit_swap_insn (insn, old,
2790 FP_MODE_REG (old->reg[reg], DFmode));
2793 /* See if any regs remain incorrect. If so, bring an
2794 incorrect reg to the top of stack, and let the while loop
2797 for (reg = new->top; reg >= 0; reg--)
2798 if (new->reg[reg] != old->reg[reg])
2800 emit_swap_insn (insn, old,
2801 FP_MODE_REG (old->reg[reg], DFmode));
2806 /* At this point there must be no differences. */
2808 for (reg = old->top; reg >= 0; reg--)
2809 if (old->reg[reg] != new->reg[reg])
2814 /* Check PAT, which points to RTL in INSN, for a LABEL_REF. If it is
2815 found, ensure that a jump from INSN to the code_label to which the
2816 label_ref points ends up with the same stack as that at the
2817 code_label. Do this by inserting insns just before the code_label to
2818 pop and rotate the stack until it is in the correct order. REGSTACK
2819 is the order of the register stack in INSN.
2821 Any code that is emitted here must not be later processed as part
2822 of any block, as it will already contain hard register numbers. */
2825 goto_block_pat (insn, regstack, pat)
2831 rtx new_jump, new_label, new_barrier;
2834 struct stack_def temp_stack;
2837 switch (GET_CODE (pat))
2840 straighten_stack (PREV_INSN (insn), regstack);
2845 char *fmt = GET_RTX_FORMAT (GET_CODE (pat));
2847 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
2850 goto_block_pat (insn, regstack, XEXP (pat, i));
2852 for (j = 0; j < XVECLEN (pat, i); j++)
2853 goto_block_pat (insn, regstack, XVECEXP (pat, i, j));
2860 label = XEXP (pat, 0);
2861 if (GET_CODE (label) != CODE_LABEL)
2864 /* First, see if in fact anything needs to be done to the stack at all. */
2865 if (INSN_UID (label) <= 0)
2868 label_stack = &block_stack_in[BLOCK_NUM (label)];
2870 if (label_stack->top == -2)
2872 /* If the target block hasn't had a stack order selected, then
2873 we need merely ensure that no pops are needed. */
2875 for (reg = regstack->top; reg >= 0; reg--)
2876 if (! TEST_HARD_REG_BIT (label_stack->reg_set, regstack->reg[reg]))
2881 /* change_stack will not emit any code in this case. */
2883 change_stack (label, regstack, label_stack, emit_insn_after);
2887 else if (label_stack->top == regstack->top)
2889 for (reg = label_stack->top; reg >= 0; reg--)
2890 if (label_stack->reg[reg] != regstack->reg[reg])
2897 /* At least one insn will need to be inserted before label. Insert
2898 a jump around the code we are about to emit. Emit a label for the new
2899 code, and point the original insn at this new label. We can't use
2900 redirect_jump here, because we're using fld[4] of the code labels as
2901 LABEL_REF chains, no NUSES counters. */
2903 new_jump = emit_jump_insn_before (gen_jump (label), label);
2904 record_label_references (new_jump, PATTERN (new_jump));
2905 JUMP_LABEL (new_jump) = label;
2907 new_barrier = emit_barrier_after (new_jump);
2909 new_label = gen_label_rtx ();
2910 emit_label_after (new_label, new_barrier);
2911 LABEL_REFS (new_label) = new_label;
2913 /* The old label_ref will no longer point to the code_label if now uses,
2914 so strip the label_ref from the code_label's chain of references. */
2916 for (ref = &LABEL_REFS (label); *ref != label; ref = &LABEL_NEXTREF (*ref))
2923 *ref = LABEL_NEXTREF (*ref);
2925 XEXP (pat, 0) = new_label;
2926 record_label_references (insn, PATTERN (insn));
2928 if (JUMP_LABEL (insn) == label)
2929 JUMP_LABEL (insn) = new_label;
2931 /* Now emit the needed code. */
2933 temp_stack = *regstack;
2935 change_stack (new_label, &temp_stack, label_stack, emit_insn_after);
2938 /* Traverse all basic blocks in a function, converting the register
2939 references in each insn from the "flat" register file that gcc uses, to
2940 the stack-like registers the 387 uses. */
2945 register int block, reg;
2946 register rtx insn, next;
2947 struct stack_def regstack;
2949 for (block = 0; block < blocks; block++)
2951 if (block_stack_in[block].top == -2)
2953 /* This block has not been previously encountered. Choose a
2954 default mapping for any stack regs live on entry */
2956 block_stack_in[block].top = -1;
2958 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; reg--)
2959 if (TEST_HARD_REG_BIT (block_stack_in[block].reg_set, reg))
2960 block_stack_in[block].reg[++block_stack_in[block].top] = reg;
2963 /* Process all insns in this block. Keep track of `next' here,
2964 so that we don't process any insns emitted while making
2965 substitutions in INSN. */
2967 next = block_begin[block];
2968 regstack = block_stack_in[block];
2972 next = NEXT_INSN (insn);
2974 /* Don't bother processing unless there is a stack reg
2975 mentioned or if it's a CALL_INSN (register passing of
2976 floating point values). */
2978 if (GET_MODE (insn) == QImode || GET_CODE (insn) == CALL_INSN)
2979 subst_stack_regs (insn, ®stack);
2981 } while (insn != block_end[block]);
2983 /* Something failed if the stack life doesn't match. */
2985 GO_IF_HARD_REG_EQUAL (regstack.reg_set, block_out_reg_set[block], win);
2991 /* Adjust the stack of this block on exit to match the stack of
2992 the target block, or copy stack information into stack of
2993 jump target if the target block's stack order hasn't been set
2996 if (GET_CODE (insn) == JUMP_INSN)
2997 goto_block_pat (insn, ®stack, PATTERN (insn));
2999 /* Likewise handle the case where we fall into the next block. */
3001 if ((block < blocks - 1) && block_drops_in[block+1])
3002 change_stack (insn, ®stack, &block_stack_in[block+1],
3006 /* If the last basic block is the end of a loop, and that loop has
3007 regs live at its start, then the last basic block will have regs live
3008 at its end that need to be popped before the function returns. */
3011 int value_reg_low, value_reg_high;
3012 value_reg_low = value_reg_high = -1;
3015 if (retvalue = stack_result (current_function_decl))
3017 value_reg_low = REGNO (retvalue);
3018 value_reg_high = value_reg_low +
3019 HARD_REGNO_NREGS (value_reg_low, GET_MODE (retvalue)) - 1;
3023 for (reg = regstack.top; reg >= 0; reg--)
3024 if (regstack.reg[reg] < value_reg_low ||
3025 regstack.reg[reg] > value_reg_high)
3026 insn = emit_pop_insn (insn, ®stack,
3027 FP_MODE_REG (regstack.reg[reg], DFmode),
3030 straighten_stack (insn, ®stack);
3033 /* Check expression PAT, which is in INSN, for label references. if
3034 one is found, print the block number of destination to FILE. */
3037 print_blocks (file, insn, pat)
3041 register RTX_CODE code = GET_CODE (pat);
3045 if (code == LABEL_REF)
3047 register rtx label = XEXP (pat, 0);
3049 if (GET_CODE (label) != CODE_LABEL)
3052 fprintf (file, " %d", BLOCK_NUM (label));
3057 fmt = GET_RTX_FORMAT (code);
3058 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3061 print_blocks (file, insn, XEXP (pat, i));
3065 for (j = 0; j < XVECLEN (pat, i); j++)
3066 print_blocks (file, insn, XVECEXP (pat, i, j));
3071 /* Write information about stack registers and stack blocks into FILE.
3072 This is part of making a debugging dump. */
3074 dump_stack_info (file)
3079 fprintf (file, "\n%d stack blocks.\n", blocks);
3080 for (block = 0; block < blocks; block++)
3082 register rtx head, jump, end;
3085 fprintf (file, "\nStack block %d: first insn %d, last %d.\n",
3086 block, INSN_UID (block_begin[block]),
3087 INSN_UID (block_end[block]));
3089 head = block_begin[block];
3091 fprintf (file, "Reached from blocks: ");
3092 if (GET_CODE (head) == CODE_LABEL)
3093 for (jump = LABEL_REFS (head);
3095 jump = LABEL_NEXTREF (jump))
3097 register int from_block = BLOCK_NUM (CONTAINING_INSN (jump));
3098 fprintf (file, " %d", from_block);
3100 if (block_drops_in[block])
3101 fprintf (file, " previous");
3103 fprintf (file, "\nlive stack registers on block entry: ");
3104 for (regno = FIRST_STACK_REG; regno <= LAST_STACK_REG; regno++)
3106 if (TEST_HARD_REG_BIT (block_stack_in[block].reg_set, regno))
3107 fprintf (file, "%d ", regno);
3110 fprintf (file, "\nlive stack registers on block exit: ");
3111 for (regno = FIRST_STACK_REG; regno <= LAST_STACK_REG; regno++)
3113 if (TEST_HARD_REG_BIT (block_out_reg_set[block], regno))
3114 fprintf (file, "%d ", regno);
3117 end = block_end[block];
3119 fprintf (file, "\nJumps to blocks: ");
3120 if (GET_CODE (end) == JUMP_INSN)
3121 print_blocks (file, end, PATTERN (end));
3123 if (block + 1 < blocks && block_drops_in[block+1])
3124 fprintf (file, " next");
3125 else if (block + 1 == blocks
3126 || (GET_CODE (end) == JUMP_INSN
3127 && GET_CODE (PATTERN (end)) == RETURN))
3128 fprintf (file, " return");
3130 fprintf (file, "\n");
3133 #endif /* STACK_REGS */