1 /* Register to Stack convert for GNU compiler.
2 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
22 /* This pass converts stack-like registers from the "flat register
23 file" model that gcc uses, to a stack convention that the 387 uses.
25 * The form of the input:
27 On input, the function consists of insn that have had their
28 registers fully allocated to a set of "virtual" registers. Note that
29 the word "virtual" is used differently here than elsewhere in gcc: for
30 each virtual stack reg, there is a hard reg, but the mapping between
31 them is not known until this pass is run. On output, hard register
32 numbers have been substituted, and various pop and exchange insns have
33 been emitted. The hard register numbers and the virtual register
34 numbers completely overlap - before this pass, all stack register
35 numbers are virtual, and afterward they are all hard.
37 The virtual registers can be manipulated normally by gcc, and their
38 semantics are the same as for normal registers. After the hard
39 register numbers are substituted, the semantics of an insn containing
40 stack-like regs are not the same as for an insn with normal regs: for
41 instance, it is not safe to delete an insn that appears to be a no-op
42 move. In general, no insn containing hard regs should be changed
43 after this pass is done.
45 * The form of the output:
47 After this pass, hard register numbers represent the distance from
48 the current top of stack to the desired register. A reference to
49 FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1,
50 represents the register just below that, and so forth. Also, REG_DEAD
51 notes indicate whether or not a stack register should be popped.
53 A "swap" insn looks like a parallel of two patterns, where each
54 pattern is a SET: one sets A to B, the other B to A.
56 A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG
57 and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS,
58 will replace the existing stack top, not push a new value.
60 A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose
61 SET_SRC is REG or MEM.
63 The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG
64 appears ambiguous. As a special case, the presence of a REG_DEAD note
65 for FIRST_STACK_REG differentiates between a load insn and a pop.
67 If a REG_DEAD is present, the insn represents a "pop" that discards
68 the top of the register stack. If there is no REG_DEAD note, then the
69 insn represents a "dup" or a push of the current top of stack onto the
74 Existing REG_DEAD and REG_UNUSED notes for stack registers are
75 deleted and recreated from scratch. REG_DEAD is never created for a
76 SET_DEST, only REG_UNUSED.
80 There are several rules on the usage of stack-like regs in
81 asm_operands insns. These rules apply only to the operands that are
84 1. Given a set of input regs that die in an asm_operands, it is
85 necessary to know which are implicitly popped by the asm, and
86 which must be explicitly popped by gcc.
88 An input reg that is implicitly popped by the asm must be
89 explicitly clobbered, unless it is constrained to match an
92 2. For any input reg that is implicitly popped by an asm, it is
93 necessary to know how to adjust the stack to compensate for the pop.
94 If any non-popped input is closer to the top of the reg-stack than
95 the implicitly popped reg, it would not be possible to know what the
96 stack looked like - it's not clear how the rest of the stack "slides
99 All implicitly popped input regs must be closer to the top of
100 the reg-stack than any input that is not implicitly popped.
102 3. It is possible that if an input dies in an insn, reload might
103 use the input reg for an output reload. Consider this example:
105 asm ("foo" : "=t" (a) : "f" (b));
107 This asm says that input B is not popped by the asm, and that
108 the asm pushes a result onto the reg-stack, ie, the stack is one
109 deeper after the asm than it was before. But, it is possible that
110 reload will think that it can use the same reg for both the input and
111 the output, if input B dies in this insn.
113 If any input operand uses the "f" constraint, all output reg
114 constraints must use the "&" earlyclobber.
116 The asm above would be written as
118 asm ("foo" : "=&t" (a) : "f" (b));
120 4. Some operands need to be in particular places on the stack. All
121 output operands fall in this category - there is no other way to
122 know which regs the outputs appear in unless the user indicates
123 this in the constraints.
125 Output operands must specifically indicate which reg an output
126 appears in after an asm. "=f" is not allowed: the operand
127 constraints must select a class with a single reg.
129 5. Output operands may not be "inserted" between existing stack regs.
130 Since no 387 opcode uses a read/write operand, all output operands
131 are dead before the asm_operands, and are pushed by the asm_operands.
132 It makes no sense to push anywhere but the top of the reg-stack.
134 Output operands must start at the top of the reg-stack: output
135 operands may not "skip" a reg.
137 6. Some asm statements may need extra stack space for internal
138 calculations. This can be guaranteed by clobbering stack registers
139 unrelated to the inputs and outputs.
141 Here are a couple of reasonable asms to want to write. This asm
142 takes one input, which is internally popped, and produces two outputs.
144 asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp));
146 This asm takes two inputs, which are popped by the fyl2xp1 opcode,
147 and replaces them with one output. The user must code the "st(1)"
148 clobber for reg-stack.c to know that fyl2xp1 pops both inputs.
150 asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)");
159 #include "function.h"
160 #include "insn-config.h"
162 #include "hard-reg-set.h"
167 #include "basic-block.h"
172 #define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1)
174 /* This is the basic stack record. TOP is an index into REG[] such
175 that REG[TOP] is the top of stack. If TOP is -1 the stack is empty.
177 If TOP is -2, REG[] is not yet initialized. Stack initialization
178 consists of placing each live reg in array `reg' and setting `top'
181 REG_SET indicates which registers are live. */
183 typedef struct stack_def
185 int top; /* index to top stack element */
186 HARD_REG_SET reg_set; /* set of live registers */
187 unsigned char reg[REG_STACK_SIZE];/* register - stack mapping */
190 /* This is used to carry information about basic blocks. It is
191 attached to the AUX field of the standard CFG block. */
193 typedef struct block_info_def
195 struct stack_def stack_in; /* Input stack configuration. */
196 HARD_REG_SET out_reg_set; /* Stack regs live on output. */
197 int done; /* True if block already converted. */
200 #define BLOCK_INFO(B) ((block_info) (B)->aux)
202 /* Passed to change_stack to indicate where to emit insns. */
209 /* We use this array to cache info about insns, because otherwise we
210 spend too much time in stack_regs_mentioned_p.
212 Indexed by insn UIDs. A value of zero is uninitialized, one indicates
213 the insn uses stack registers, two indicates the insn does not use
215 static varray_type stack_regs_mentioned_data;
217 /* The block we're currently working on. */
218 static basic_block current_block;
220 /* This is the register file for all register after conversion */
222 FP_mode_reg[LAST_STACK_REG+1-FIRST_STACK_REG][(int) MAX_MACHINE_MODE];
224 #define FP_MODE_REG(regno,mode) \
225 (FP_mode_reg[(regno)-FIRST_STACK_REG][(int)(mode)])
227 /* Used to initialize uninitialized registers. */
230 /* Forward declarations */
232 static int stack_regs_mentioned_p PARAMS ((rtx pat));
233 static void straighten_stack PARAMS ((rtx, stack));
234 static void pop_stack PARAMS ((stack, int));
235 static rtx *get_true_reg PARAMS ((rtx *));
237 static int check_asm_stack_operands PARAMS ((rtx));
238 static int get_asm_operand_n_inputs PARAMS ((rtx));
239 static rtx stack_result PARAMS ((tree));
240 static void replace_reg PARAMS ((rtx *, int));
241 static void remove_regno_note PARAMS ((rtx, enum reg_note,
243 static int get_hard_regnum PARAMS ((stack, rtx));
244 static void delete_insn_for_stacker PARAMS ((rtx));
245 static rtx emit_pop_insn PARAMS ((rtx, stack, rtx,
247 static void emit_swap_insn PARAMS ((rtx, stack, rtx));
248 static void move_for_stack_reg PARAMS ((rtx, stack, rtx));
249 static int swap_rtx_condition_1 PARAMS ((rtx));
250 static int swap_rtx_condition PARAMS ((rtx));
251 static void compare_for_stack_reg PARAMS ((rtx, stack, rtx));
252 static void subst_stack_regs_pat PARAMS ((rtx, stack, rtx));
253 static void subst_asm_stack_regs PARAMS ((rtx, stack));
254 static void subst_stack_regs PARAMS ((rtx, stack));
255 static void change_stack PARAMS ((rtx, stack, stack,
257 static int convert_regs_entry PARAMS ((void));
258 static void convert_regs_exit PARAMS ((void));
259 static int convert_regs_1 PARAMS ((FILE *, basic_block));
260 static int convert_regs_2 PARAMS ((FILE *, basic_block));
261 static int convert_regs PARAMS ((FILE *));
262 static void print_stack PARAMS ((FILE *, stack));
263 static rtx next_flags_user PARAMS ((rtx));
264 static void record_label_references PARAMS ((rtx, rtx));
266 /* Return non-zero if any stack register is mentioned somewhere within PAT. */
269 stack_regs_mentioned_p (pat)
272 register const char *fmt;
275 if (STACK_REG_P (pat))
278 fmt = GET_RTX_FORMAT (GET_CODE (pat));
279 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
285 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
286 if (stack_regs_mentioned_p (XVECEXP (pat, i, j)))
289 else if (fmt[i] == 'e' && stack_regs_mentioned_p (XEXP (pat, i)))
296 /* Return nonzero if INSN mentions stacked registers, else return zero. */
299 stack_regs_mentioned (insn)
302 unsigned int uid, max;
308 uid = INSN_UID (insn);
309 max = VARRAY_SIZE (stack_regs_mentioned_data);
312 /* Allocate some extra size to avoid too many reallocs, but
313 do not grow too quickly. */
314 max = uid + uid / 20;
315 VARRAY_GROW (stack_regs_mentioned_data, max);
318 test = VARRAY_CHAR (stack_regs_mentioned_data, uid);
321 /* This insn has yet to be examined. Do so now. */
322 test = stack_regs_mentioned_p (PATTERN (insn)) ? 1 : 2;
323 VARRAY_CHAR (stack_regs_mentioned_data, uid) = test;
329 static rtx ix86_flags_rtx;
332 next_flags_user (insn)
335 /* Search forward looking for the first use of this value.
336 Stop at block boundaries. */
338 while (insn != current_block->end)
340 insn = NEXT_INSN (insn);
342 if (INSN_P (insn) && reg_mentioned_p (ix86_flags_rtx, PATTERN (insn)))
345 if (GET_CODE (insn) == CALL_INSN)
351 /* Reorganise the stack into ascending numbers,
355 straighten_stack (insn, regstack)
359 struct stack_def temp_stack;
362 /* If there is only a single register on the stack, then the stack is
363 already in increasing order and no reorganization is needed.
365 Similarly if the stack is empty. */
366 if (regstack->top <= 0)
369 COPY_HARD_REG_SET (temp_stack.reg_set, regstack->reg_set);
371 for (top = temp_stack.top = regstack->top; top >= 0; top--)
372 temp_stack.reg[top] = FIRST_STACK_REG + temp_stack.top - top;
374 change_stack (insn, regstack, &temp_stack, EMIT_AFTER);
377 /* Pop a register from the stack */
380 pop_stack (regstack, regno)
384 int top = regstack->top;
386 CLEAR_HARD_REG_BIT (regstack->reg_set, regno);
388 /* If regno was not at the top of stack then adjust stack */
389 if (regstack->reg [top] != regno)
392 for (i = regstack->top; i >= 0; i--)
393 if (regstack->reg [i] == regno)
396 for (j = i; j < top; j++)
397 regstack->reg [j] = regstack->reg [j + 1];
403 /* Convert register usage from "flat" register file usage to a "stack
404 register file. FIRST is the first insn in the function, FILE is the
407 Construct a CFG and run life analysis. Then convert each insn one
408 by one. Run a last jump_optimize pass, if optimizing, to eliminate
409 code duplication created when the converter inserts pop insns on
413 reg_to_stack (first, file)
421 /* See if there is something to do. Flow analysis is quite
422 expensive so we might save some compilation time. */
423 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
424 if (regs_ever_live[i])
426 if (i > LAST_STACK_REG)
429 /* Ok, floating point instructions exist. If not optimizing,
430 build the CFG and run life analysis. */
431 find_basic_blocks (first, max_reg_num (), file);
432 count_or_remove_death_notes (NULL, 1);
433 life_analysis (first, file, PROP_DEATH_NOTES);
435 /* Set up block info for each basic block. */
436 bi = (block_info) xcalloc ((n_basic_blocks + 1), sizeof (*bi));
437 for (i = n_basic_blocks - 1; i >= 0; --i)
438 BASIC_BLOCK (i)->aux = bi + i;
439 EXIT_BLOCK_PTR->aux = bi + n_basic_blocks;
441 /* Create the replacement registers up front. */
442 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
444 enum machine_mode mode;
445 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
447 mode = GET_MODE_WIDER_MODE (mode))
448 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
449 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT);
451 mode = GET_MODE_WIDER_MODE (mode))
452 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
455 ix86_flags_rtx = gen_rtx_REG (CCmode, FLAGS_REG);
457 /* A QNaN for initializing uninitialized variables.
459 ??? We can't load from constant memory in PIC mode, because
460 we're insertting these instructions before the prologue and
461 the PIC register hasn't been set up. In that case, fall back
462 on zero, which we can get from `ldz'. */
465 nan = CONST0_RTX (SFmode);
468 nan = gen_lowpart (SFmode, GEN_INT (0x7fc00000));
469 nan = force_const_mem (SFmode, nan);
472 /* Allocate a cache for stack_regs_mentioned. */
473 max_uid = get_max_uid ();
474 VARRAY_CHAR_INIT (stack_regs_mentioned_data, max_uid + 1,
475 "stack_regs_mentioned cache");
477 if (convert_regs (file) && optimize)
479 jump_optimize (first, JUMP_CROSS_JUMP_DEATH_MATTERS,
480 !JUMP_NOOP_MOVES, !JUMP_AFTER_REGSCAN);
484 VARRAY_FREE (stack_regs_mentioned_data);
488 /* Check PAT, which is in INSN, for LABEL_REFs. Add INSN to the
489 label's chain of references, and note which insn contains each
493 record_label_references (insn, pat)
496 register enum rtx_code code = GET_CODE (pat);
498 register const char *fmt;
500 if (code == LABEL_REF)
502 register rtx label = XEXP (pat, 0);
505 if (GET_CODE (label) != CODE_LABEL)
508 /* If this is an undefined label, LABEL_REFS (label) contains
510 if (INSN_UID (label) == 0)
513 /* Don't make a duplicate in the code_label's chain. */
515 for (ref = LABEL_REFS (label);
517 ref = LABEL_NEXTREF (ref))
518 if (CONTAINING_INSN (ref) == insn)
521 CONTAINING_INSN (pat) = insn;
522 LABEL_NEXTREF (pat) = LABEL_REFS (label);
523 LABEL_REFS (label) = pat;
528 fmt = GET_RTX_FORMAT (code);
529 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
532 record_label_references (insn, XEXP (pat, i));
536 for (j = 0; j < XVECLEN (pat, i); j++)
537 record_label_references (insn, XVECEXP (pat, i, j));
542 /* Return a pointer to the REG expression within PAT. If PAT is not a
543 REG, possible enclosed by a conversion rtx, return the inner part of
544 PAT that stopped the search. */
551 switch (GET_CODE (*pat))
554 /* Eliminate FP subregister accesses in favour of the
555 actual FP register in use. */
558 if (FP_REG_P (subreg = SUBREG_REG (*pat)))
560 int regno_off = subreg_regno_offset (REGNO (subreg),
564 *pat = FP_MODE_REG (REGNO (subreg) + regno_off,
573 pat = & XEXP (*pat, 0);
577 /* There are many rules that an asm statement for stack-like regs must
578 follow. Those rules are explained at the top of this file: the rule
579 numbers below refer to that explanation. */
582 check_asm_stack_operands (insn)
587 int malformed_asm = 0;
588 rtx body = PATTERN (insn);
590 char reg_used_as_output[FIRST_PSEUDO_REGISTER];
591 char implicitly_dies[FIRST_PSEUDO_REGISTER];
594 rtx *clobber_reg = 0;
595 int n_inputs, n_outputs;
597 /* Find out what the constraints require. If no constraint
598 alternative matches, this asm is malformed. */
600 constrain_operands (1);
601 alt = which_alternative;
603 preprocess_constraints ();
605 n_inputs = get_asm_operand_n_inputs (body);
606 n_outputs = recog_data.n_operands - n_inputs;
611 /* Avoid further trouble with this insn. */
612 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
616 /* Strip SUBREGs here to make the following code simpler. */
617 for (i = 0; i < recog_data.n_operands; i++)
618 if (GET_CODE (recog_data.operand[i]) == SUBREG
619 && GET_CODE (SUBREG_REG (recog_data.operand[i])) == REG)
620 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
622 /* Set up CLOBBER_REG. */
626 if (GET_CODE (body) == PARALLEL)
628 clobber_reg = (rtx *) alloca (XVECLEN (body, 0) * sizeof (rtx));
630 for (i = 0; i < XVECLEN (body, 0); i++)
631 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
633 rtx clobber = XVECEXP (body, 0, i);
634 rtx reg = XEXP (clobber, 0);
636 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
637 reg = SUBREG_REG (reg);
639 if (STACK_REG_P (reg))
641 clobber_reg[n_clobbers] = reg;
647 /* Enforce rule #4: Output operands must specifically indicate which
648 reg an output appears in after an asm. "=f" is not allowed: the
649 operand constraints must select a class with a single reg.
651 Also enforce rule #5: Output operands must start at the top of
652 the reg-stack: output operands may not "skip" a reg. */
654 memset (reg_used_as_output, 0, sizeof (reg_used_as_output));
655 for (i = 0; i < n_outputs; i++)
656 if (STACK_REG_P (recog_data.operand[i]))
658 if (reg_class_size[(int) recog_op_alt[i][alt].class] != 1)
660 error_for_asm (insn, "Output constraint %d must specify a single register", i);
664 reg_used_as_output[REGNO (recog_data.operand[i])] = 1;
668 /* Search for first non-popped reg. */
669 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
670 if (! reg_used_as_output[i])
673 /* If there are any other popped regs, that's an error. */
674 for (; i < LAST_STACK_REG + 1; i++)
675 if (reg_used_as_output[i])
678 if (i != LAST_STACK_REG + 1)
680 error_for_asm (insn, "Output regs must be grouped at top of stack");
684 /* Enforce rule #2: All implicitly popped input regs must be closer
685 to the top of the reg-stack than any input that is not implicitly
688 memset (implicitly_dies, 0, sizeof (implicitly_dies));
689 for (i = n_outputs; i < n_outputs + n_inputs; i++)
690 if (STACK_REG_P (recog_data.operand[i]))
692 /* An input reg is implicitly popped if it is tied to an
693 output, or if there is a CLOBBER for it. */
696 for (j = 0; j < n_clobbers; j++)
697 if (operands_match_p (clobber_reg[j], recog_data.operand[i]))
700 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0)
701 implicitly_dies[REGNO (recog_data.operand[i])] = 1;
704 /* Search for first non-popped reg. */
705 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
706 if (! implicitly_dies[i])
709 /* If there are any other popped regs, that's an error. */
710 for (; i < LAST_STACK_REG + 1; i++)
711 if (implicitly_dies[i])
714 if (i != LAST_STACK_REG + 1)
717 "Implicitly popped regs must be grouped at top of stack");
721 /* Enfore rule #3: If any input operand uses the "f" constraint, all
722 output constraints must use the "&" earlyclobber.
724 ??? Detect this more deterministically by having constrain_asm_operands
725 record any earlyclobber. */
727 for (i = n_outputs; i < n_outputs + n_inputs; i++)
728 if (recog_op_alt[i][alt].matches == -1)
732 for (j = 0; j < n_outputs; j++)
733 if (operands_match_p (recog_data.operand[j], recog_data.operand[i]))
736 "Output operand %d must use `&' constraint", j);
743 /* Avoid further trouble with this insn. */
744 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
751 /* Calculate the number of inputs and outputs in BODY, an
752 asm_operands. N_OPERANDS is the total number of operands, and
753 N_INPUTS and N_OUTPUTS are pointers to ints into which the results are
757 get_asm_operand_n_inputs (body)
760 if (GET_CODE (body) == SET && GET_CODE (SET_SRC (body)) == ASM_OPERANDS)
761 return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (body));
763 else if (GET_CODE (body) == ASM_OPERANDS)
764 return ASM_OPERANDS_INPUT_LENGTH (body);
766 else if (GET_CODE (body) == PARALLEL
767 && GET_CODE (XVECEXP (body, 0, 0)) == SET)
768 return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (XVECEXP (body, 0, 0)));
770 else if (GET_CODE (body) == PARALLEL
771 && GET_CODE (XVECEXP (body, 0, 0)) == ASM_OPERANDS)
772 return ASM_OPERANDS_INPUT_LENGTH (XVECEXP (body, 0, 0));
777 /* If current function returns its result in an fp stack register,
778 return the REG. Otherwise, return 0. */
786 /* If the value is supposed to be returned in memory, then clearly
787 it is not returned in a stack register. */
788 if (aggregate_value_p (DECL_RESULT (decl)))
791 result = DECL_RTL_IF_SET (DECL_RESULT (decl));
794 #ifdef FUNCTION_OUTGOING_VALUE
796 = FUNCTION_OUTGOING_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl);
798 result = FUNCTION_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl);
802 return result != 0 && STACK_REG_P (result) ? result : 0;
807 * This section deals with stack register substitution, and forms the second
811 /* Replace REG, which is a pointer to a stack reg RTX, with an RTX for
812 the desired hard REGNO. */
815 replace_reg (reg, regno)
819 if (regno < FIRST_STACK_REG || regno > LAST_STACK_REG
820 || ! STACK_REG_P (*reg))
823 switch (GET_MODE_CLASS (GET_MODE (*reg)))
827 case MODE_COMPLEX_FLOAT:;
830 *reg = FP_MODE_REG (regno, GET_MODE (*reg));
833 /* Remove a note of type NOTE, which must be found, for register
834 number REGNO from INSN. Remove only one such note. */
837 remove_regno_note (insn, note, regno)
842 register rtx *note_link, this;
844 note_link = ®_NOTES(insn);
845 for (this = *note_link; this; this = XEXP (this, 1))
846 if (REG_NOTE_KIND (this) == note
847 && REG_P (XEXP (this, 0)) && REGNO (XEXP (this, 0)) == regno)
849 *note_link = XEXP (this, 1);
853 note_link = &XEXP (this, 1);
858 /* Find the hard register number of virtual register REG in REGSTACK.
859 The hard register number is relative to the top of the stack. -1 is
860 returned if the register is not found. */
863 get_hard_regnum (regstack, reg)
869 if (! STACK_REG_P (reg))
872 for (i = regstack->top; i >= 0; i--)
873 if (regstack->reg[i] == REGNO (reg))
876 return i >= 0 ? (FIRST_STACK_REG + regstack->top - i) : -1;
879 /* Delete INSN from the RTL. Mark the insn, but don't remove it from
880 the chain of insns. Doing so could confuse block_begin and block_end
881 if this were the only insn in the block. */
884 delete_insn_for_stacker (insn)
887 PUT_CODE (insn, NOTE);
888 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
889 NOTE_SOURCE_FILE (insn) = 0;
892 /* Emit an insn to pop virtual register REG before or after INSN.
893 REGSTACK is the stack state after INSN and is updated to reflect this
894 pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn
895 is represented as a SET whose destination is the register to be popped
896 and source is the top of stack. A death note for the top of stack
897 cases the movdf pattern to pop. */
900 emit_pop_insn (insn, regstack, reg, where)
904 enum emit_where where;
906 rtx pop_insn, pop_rtx;
909 hard_regno = get_hard_regnum (regstack, reg);
911 if (hard_regno < FIRST_STACK_REG)
914 pop_rtx = gen_rtx_SET (VOIDmode, FP_MODE_REG (hard_regno, DFmode),
915 FP_MODE_REG (FIRST_STACK_REG, DFmode));
917 if (where == EMIT_AFTER)
918 pop_insn = emit_block_insn_after (pop_rtx, insn, current_block);
920 pop_insn = emit_block_insn_before (pop_rtx, insn, current_block);
923 = gen_rtx_EXPR_LIST (REG_DEAD, FP_MODE_REG (FIRST_STACK_REG, DFmode),
924 REG_NOTES (pop_insn));
926 regstack->reg[regstack->top - (hard_regno - FIRST_STACK_REG)]
927 = regstack->reg[regstack->top];
929 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (reg));
934 /* Emit an insn before or after INSN to swap virtual register REG with
935 the top of stack. REGSTACK is the stack state before the swap, and
936 is updated to reflect the swap. A swap insn is represented as a
937 PARALLEL of two patterns: each pattern moves one reg to the other.
939 If REG is already at the top of the stack, no insn is emitted. */
942 emit_swap_insn (insn, regstack, reg)
949 int tmp, other_reg; /* swap regno temps */
950 rtx i1; /* the stack-reg insn prior to INSN */
951 rtx i1set = NULL_RTX; /* the SET rtx within I1 */
953 hard_regno = get_hard_regnum (regstack, reg);
955 if (hard_regno < FIRST_STACK_REG)
957 if (hard_regno == FIRST_STACK_REG)
960 other_reg = regstack->top - (hard_regno - FIRST_STACK_REG);
962 tmp = regstack->reg[other_reg];
963 regstack->reg[other_reg] = regstack->reg[regstack->top];
964 regstack->reg[regstack->top] = tmp;
966 /* Find the previous insn involving stack regs, but don't pass a
969 if (current_block && insn != current_block->head)
971 rtx tmp = PREV_INSN (insn);
972 rtx limit = PREV_INSN (current_block->head);
975 if (GET_CODE (tmp) == CODE_LABEL
976 || NOTE_INSN_BASIC_BLOCK_P (tmp)
977 || (GET_CODE (tmp) == INSN
978 && stack_regs_mentioned (tmp)))
983 tmp = PREV_INSN (tmp);
988 && (i1set = single_set (i1)) != NULL_RTX)
990 rtx i1src = *get_true_reg (&SET_SRC (i1set));
991 rtx i1dest = *get_true_reg (&SET_DEST (i1set));
993 /* If the previous register stack push was from the reg we are to
994 swap with, omit the swap. */
996 if (GET_CODE (i1dest) == REG && REGNO (i1dest) == FIRST_STACK_REG
997 && GET_CODE (i1src) == REG && REGNO (i1src) == hard_regno - 1
998 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
1001 /* If the previous insn wrote to the reg we are to swap with,
1004 if (GET_CODE (i1dest) == REG && REGNO (i1dest) == hard_regno
1005 && GET_CODE (i1src) == REG && REGNO (i1src) == FIRST_STACK_REG
1006 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
1010 swap_rtx = gen_swapxf (FP_MODE_REG (hard_regno, XFmode),
1011 FP_MODE_REG (FIRST_STACK_REG, XFmode));
1014 emit_block_insn_after (swap_rtx, i1, current_block);
1015 else if (current_block)
1016 emit_block_insn_before (swap_rtx, current_block->head, current_block);
1018 emit_insn_before (swap_rtx, insn);
1021 /* Handle a move to or from a stack register in PAT, which is in INSN.
1022 REGSTACK is the current stack. */
1025 move_for_stack_reg (insn, regstack, pat)
1030 rtx *psrc = get_true_reg (&SET_SRC (pat));
1031 rtx *pdest = get_true_reg (&SET_DEST (pat));
1035 src = *psrc; dest = *pdest;
1037 if (STACK_REG_P (src) && STACK_REG_P (dest))
1039 /* Write from one stack reg to another. If SRC dies here, then
1040 just change the register mapping and delete the insn. */
1042 note = find_regno_note (insn, REG_DEAD, REGNO (src));
1047 /* If this is a no-op move, there must not be a REG_DEAD note. */
1048 if (REGNO (src) == REGNO (dest))
1051 for (i = regstack->top; i >= 0; i--)
1052 if (regstack->reg[i] == REGNO (src))
1055 /* The source must be live, and the dest must be dead. */
1056 if (i < 0 || get_hard_regnum (regstack, dest) >= FIRST_STACK_REG)
1059 /* It is possible that the dest is unused after this insn.
1060 If so, just pop the src. */
1062 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
1064 emit_pop_insn (insn, regstack, src, EMIT_AFTER);
1066 delete_insn_for_stacker (insn);
1070 regstack->reg[i] = REGNO (dest);
1072 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1073 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
1075 delete_insn_for_stacker (insn);
1080 /* The source reg does not die. */
1082 /* If this appears to be a no-op move, delete it, or else it
1083 will confuse the machine description output patterns. But if
1084 it is REG_UNUSED, we must pop the reg now, as per-insn processing
1085 for REG_UNUSED will not work for deleted insns. */
1087 if (REGNO (src) == REGNO (dest))
1089 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
1090 emit_pop_insn (insn, regstack, dest, EMIT_AFTER);
1092 delete_insn_for_stacker (insn);
1096 /* The destination ought to be dead */
1097 if (get_hard_regnum (regstack, dest) >= FIRST_STACK_REG)
1100 replace_reg (psrc, get_hard_regnum (regstack, src));
1102 regstack->reg[++regstack->top] = REGNO (dest);
1103 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1104 replace_reg (pdest, FIRST_STACK_REG);
1106 else if (STACK_REG_P (src))
1108 /* Save from a stack reg to MEM, or possibly integer reg. Since
1109 only top of stack may be saved, emit an exchange first if
1112 emit_swap_insn (insn, regstack, src);
1114 note = find_regno_note (insn, REG_DEAD, REGNO (src));
1117 replace_reg (&XEXP (note, 0), FIRST_STACK_REG);
1119 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
1121 else if ((GET_MODE (src) == XFmode || GET_MODE (src) == TFmode)
1122 && regstack->top < REG_STACK_SIZE - 1)
1124 /* A 387 cannot write an XFmode value to a MEM without
1125 clobbering the source reg. The output code can handle
1126 this by reading back the value from the MEM.
1127 But it is more efficient to use a temp register if one is
1128 available. Push the source value here if the register
1129 stack is not full, and then write the value to memory via
1131 rtx push_rtx, push_insn;
1132 rtx top_stack_reg = FP_MODE_REG (FIRST_STACK_REG, XFmode);
1134 push_rtx = gen_movxf (top_stack_reg, top_stack_reg);
1135 push_insn = emit_insn_before (push_rtx, insn);
1136 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_DEAD, top_stack_reg,
1140 replace_reg (psrc, FIRST_STACK_REG);
1142 else if (STACK_REG_P (dest))
1144 /* Load from MEM, or possibly integer REG or constant, into the
1145 stack regs. The actual target is always the top of the
1146 stack. The stack mapping is changed to reflect that DEST is
1147 now at top of stack. */
1149 /* The destination ought to be dead */
1150 if (get_hard_regnum (regstack, dest) >= FIRST_STACK_REG)
1153 if (regstack->top >= REG_STACK_SIZE)
1156 regstack->reg[++regstack->top] = REGNO (dest);
1157 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1158 replace_reg (pdest, FIRST_STACK_REG);
1164 /* Swap the condition on a branch, if there is one. Return true if we
1165 found a condition to swap. False if the condition was not used as
1169 swap_rtx_condition_1 (pat)
1172 register const char *fmt;
1173 register int i, r = 0;
1175 if (GET_RTX_CLASS (GET_CODE (pat)) == '<')
1177 PUT_CODE (pat, swap_condition (GET_CODE (pat)));
1182 fmt = GET_RTX_FORMAT (GET_CODE (pat));
1183 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
1189 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
1190 r |= swap_rtx_condition_1 (XVECEXP (pat, i, j));
1192 else if (fmt[i] == 'e')
1193 r |= swap_rtx_condition_1 (XEXP (pat, i));
1201 swap_rtx_condition (insn)
1204 rtx pat = PATTERN (insn);
1206 /* We're looking for a single set to cc0 or an HImode temporary. */
1208 if (GET_CODE (pat) == SET
1209 && GET_CODE (SET_DEST (pat)) == REG
1210 && REGNO (SET_DEST (pat)) == FLAGS_REG)
1212 insn = next_flags_user (insn);
1213 if (insn == NULL_RTX)
1215 pat = PATTERN (insn);
1218 /* See if this is, or ends in, a fnstsw, aka unspec 9. If so, we're
1219 not doing anything with the cc value right now. We may be able to
1220 search for one though. */
1222 if (GET_CODE (pat) == SET
1223 && GET_CODE (SET_SRC (pat)) == UNSPEC
1224 && XINT (SET_SRC (pat), 1) == 9)
1226 rtx dest = SET_DEST (pat);
1228 /* Search forward looking for the first use of this value.
1229 Stop at block boundaries. */
1230 while (insn != current_block->end)
1232 insn = NEXT_INSN (insn);
1233 if (INSN_P (insn) && reg_mentioned_p (dest, insn))
1235 if (GET_CODE (insn) == CALL_INSN)
1239 /* So we've found the insn using this value. If it is anything
1240 other than sahf, aka unspec 10, or the value does not die
1241 (meaning we'd have to search further), then we must give up. */
1242 pat = PATTERN (insn);
1243 if (GET_CODE (pat) != SET
1244 || GET_CODE (SET_SRC (pat)) != UNSPEC
1245 || XINT (SET_SRC (pat), 1) != 10
1246 || ! dead_or_set_p (insn, dest))
1249 /* Now we are prepared to handle this as a normal cc0 setter. */
1250 insn = next_flags_user (insn);
1251 if (insn == NULL_RTX)
1253 pat = PATTERN (insn);
1256 if (swap_rtx_condition_1 (pat))
1259 INSN_CODE (insn) = -1;
1260 if (recog_memoized (insn) == -1)
1262 /* In case the flags don't die here, recurse to try fix
1263 following user too. */
1264 else if (! dead_or_set_p (insn, ix86_flags_rtx))
1266 insn = next_flags_user (insn);
1267 if (!insn || !swap_rtx_condition (insn))
1272 swap_rtx_condition_1 (pat);
1280 /* Handle a comparison. Special care needs to be taken to avoid
1281 causing comparisons that a 387 cannot do correctly, such as EQ.
1283 Also, a pop insn may need to be emitted. The 387 does have an
1284 `fcompp' insn that can pop two regs, but it is sometimes too expensive
1285 to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to
1289 compare_for_stack_reg (insn, regstack, pat_src)
1295 rtx src1_note, src2_note;
1298 src1 = get_true_reg (&XEXP (pat_src, 0));
1299 src2 = get_true_reg (&XEXP (pat_src, 1));
1300 flags_user = next_flags_user (insn);
1302 /* ??? If fxch turns out to be cheaper than fstp, give priority to
1303 registers that die in this insn - move those to stack top first. */
1304 if ((! STACK_REG_P (*src1)
1305 || (STACK_REG_P (*src2)
1306 && get_hard_regnum (regstack, *src2) == FIRST_STACK_REG))
1307 && swap_rtx_condition (insn))
1310 temp = XEXP (pat_src, 0);
1311 XEXP (pat_src, 0) = XEXP (pat_src, 1);
1312 XEXP (pat_src, 1) = temp;
1314 src1 = get_true_reg (&XEXP (pat_src, 0));
1315 src2 = get_true_reg (&XEXP (pat_src, 1));
1317 INSN_CODE (insn) = -1;
1320 /* We will fix any death note later. */
1322 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1324 if (STACK_REG_P (*src2))
1325 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1327 src2_note = NULL_RTX;
1329 emit_swap_insn (insn, regstack, *src1);
1331 replace_reg (src1, FIRST_STACK_REG);
1333 if (STACK_REG_P (*src2))
1334 replace_reg (src2, get_hard_regnum (regstack, *src2));
1338 pop_stack (regstack, REGNO (XEXP (src1_note, 0)));
1339 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1342 /* If the second operand dies, handle that. But if the operands are
1343 the same stack register, don't bother, because only one death is
1344 needed, and it was just handled. */
1347 && ! (STACK_REG_P (*src1) && STACK_REG_P (*src2)
1348 && REGNO (*src1) == REGNO (*src2)))
1350 /* As a special case, two regs may die in this insn if src2 is
1351 next to top of stack and the top of stack also dies. Since
1352 we have already popped src1, "next to top of stack" is really
1353 at top (FIRST_STACK_REG) now. */
1355 if (get_hard_regnum (regstack, XEXP (src2_note, 0)) == FIRST_STACK_REG
1358 pop_stack (regstack, REGNO (XEXP (src2_note, 0)));
1359 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1);
1363 /* The 386 can only represent death of the first operand in
1364 the case handled above. In all other cases, emit a separate
1365 pop and remove the death note from here. */
1367 /* link_cc0_insns (insn); */
1369 remove_regno_note (insn, REG_DEAD, REGNO (XEXP (src2_note, 0)));
1371 emit_pop_insn (insn, regstack, XEXP (src2_note, 0),
1377 /* Substitute new registers in PAT, which is part of INSN. REGSTACK
1378 is the current register layout. */
1381 subst_stack_regs_pat (insn, regstack, pat)
1388 switch (GET_CODE (pat))
1391 /* Deaths in USE insns can happen in non optimizing compilation.
1392 Handle them by popping the dying register. */
1393 src = get_true_reg (&XEXP (pat, 0));
1394 if (STACK_REG_P (*src)
1395 && find_regno_note (insn, REG_DEAD, REGNO (*src)))
1397 emit_pop_insn (insn, regstack, *src, EMIT_AFTER);
1400 /* ??? Uninitialized USE should not happen. */
1401 else if (get_hard_regnum (regstack, *src) == -1)
1409 dest = get_true_reg (&XEXP (pat, 0));
1410 if (STACK_REG_P (*dest))
1412 note = find_reg_note (insn, REG_DEAD, *dest);
1414 if (pat != PATTERN (insn))
1416 /* The fix_truncdi_1 pattern wants to be able to allocate
1417 it's own scratch register. It does this by clobbering
1418 an fp reg so that it is assured of an empty reg-stack
1419 register. If the register is live, kill it now.
1420 Remove the DEAD/UNUSED note so we don't try to kill it
1424 emit_pop_insn (insn, regstack, *dest, EMIT_BEFORE);
1427 note = find_reg_note (insn, REG_UNUSED, *dest);
1431 remove_note (insn, note);
1432 replace_reg (dest, LAST_STACK_REG);
1436 /* A top-level clobber with no REG_DEAD, and no hard-regnum
1437 indicates an uninitialized value. Because reload removed
1438 all other clobbers, this must be due to a function
1439 returning without a value. Load up a NaN. */
1442 && get_hard_regnum (regstack, *dest) == -1)
1444 pat = gen_rtx_SET (VOIDmode,
1445 FP_MODE_REG (REGNO (*dest), SFmode),
1447 PATTERN (insn) = pat;
1448 move_for_stack_reg (insn, regstack, pat);
1457 rtx *src1 = (rtx *) NULL_PTR, *src2;
1458 rtx src1_note, src2_note;
1461 dest = get_true_reg (&SET_DEST (pat));
1462 src = get_true_reg (&SET_SRC (pat));
1463 pat_src = SET_SRC (pat);
1465 /* See if this is a `movM' pattern, and handle elsewhere if so. */
1466 if (STACK_REG_P (*src)
1467 || (STACK_REG_P (*dest)
1468 && (GET_CODE (*src) == REG || GET_CODE (*src) == MEM
1469 || GET_CODE (*src) == CONST_DOUBLE)))
1471 move_for_stack_reg (insn, regstack, pat);
1475 switch (GET_CODE (pat_src))
1478 compare_for_stack_reg (insn, regstack, pat_src);
1484 for (count = HARD_REGNO_NREGS (REGNO (*dest), GET_MODE (*dest));
1487 regstack->reg[++regstack->top] = REGNO (*dest) + count;
1488 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest) + count);
1491 replace_reg (dest, FIRST_STACK_REG);
1495 /* This is a `tstM2' case. */
1496 if (*dest != cc0_rtx)
1502 case FLOAT_TRUNCATE:
1506 /* These insns only operate on the top of the stack. DEST might
1507 be cc0_rtx if we're processing a tstM pattern. Also, it's
1508 possible that the tstM case results in a REG_DEAD note on the
1512 src1 = get_true_reg (&XEXP (pat_src, 0));
1514 emit_swap_insn (insn, regstack, *src1);
1516 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1518 if (STACK_REG_P (*dest))
1519 replace_reg (dest, FIRST_STACK_REG);
1523 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1525 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
1528 replace_reg (src1, FIRST_STACK_REG);
1533 /* On i386, reversed forms of subM3 and divM3 exist for
1534 MODE_FLOAT, so the same code that works for addM3 and mulM3
1538 /* These insns can accept the top of stack as a destination
1539 from a stack reg or mem, or can use the top of stack as a
1540 source and some other stack register (possibly top of stack)
1541 as a destination. */
1543 src1 = get_true_reg (&XEXP (pat_src, 0));
1544 src2 = get_true_reg (&XEXP (pat_src, 1));
1546 /* We will fix any death note later. */
1548 if (STACK_REG_P (*src1))
1549 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1551 src1_note = NULL_RTX;
1552 if (STACK_REG_P (*src2))
1553 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1555 src2_note = NULL_RTX;
1557 /* If either operand is not a stack register, then the dest
1558 must be top of stack. */
1560 if (! STACK_REG_P (*src1) || ! STACK_REG_P (*src2))
1561 emit_swap_insn (insn, regstack, *dest);
1564 /* Both operands are REG. If neither operand is already
1565 at the top of stack, choose to make the one that is the dest
1566 the new top of stack. */
1568 int src1_hard_regnum, src2_hard_regnum;
1570 src1_hard_regnum = get_hard_regnum (regstack, *src1);
1571 src2_hard_regnum = get_hard_regnum (regstack, *src2);
1572 if (src1_hard_regnum == -1 || src2_hard_regnum == -1)
1575 if (src1_hard_regnum != FIRST_STACK_REG
1576 && src2_hard_regnum != FIRST_STACK_REG)
1577 emit_swap_insn (insn, regstack, *dest);
1580 if (STACK_REG_P (*src1))
1581 replace_reg (src1, get_hard_regnum (regstack, *src1));
1582 if (STACK_REG_P (*src2))
1583 replace_reg (src2, get_hard_regnum (regstack, *src2));
1587 rtx src1_reg = XEXP (src1_note, 0);
1589 /* If the register that dies is at the top of stack, then
1590 the destination is somewhere else - merely substitute it.
1591 But if the reg that dies is not at top of stack, then
1592 move the top of stack to the dead reg, as though we had
1593 done the insn and then a store-with-pop. */
1595 if (REGNO (src1_reg) == regstack->reg[regstack->top])
1597 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1598 replace_reg (dest, get_hard_regnum (regstack, *dest));
1602 int regno = get_hard_regnum (regstack, src1_reg);
1604 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1605 replace_reg (dest, regno);
1607 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
1608 = regstack->reg[regstack->top];
1611 CLEAR_HARD_REG_BIT (regstack->reg_set,
1612 REGNO (XEXP (src1_note, 0)));
1613 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1618 rtx src2_reg = XEXP (src2_note, 0);
1619 if (REGNO (src2_reg) == regstack->reg[regstack->top])
1621 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1622 replace_reg (dest, get_hard_regnum (regstack, *dest));
1626 int regno = get_hard_regnum (regstack, src2_reg);
1628 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1629 replace_reg (dest, regno);
1631 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
1632 = regstack->reg[regstack->top];
1635 CLEAR_HARD_REG_BIT (regstack->reg_set,
1636 REGNO (XEXP (src2_note, 0)));
1637 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG);
1642 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1643 replace_reg (dest, get_hard_regnum (regstack, *dest));
1646 /* Keep operand 1 maching with destination. */
1647 if (GET_RTX_CLASS (GET_CODE (pat_src)) == 'c'
1648 && REG_P (*src1) && REG_P (*src2)
1649 && REGNO (*src1) != REGNO (*dest))
1651 int tmp = REGNO (*src1);
1652 replace_reg (src1, REGNO (*src2));
1653 replace_reg (src2, tmp);
1658 switch (XINT (pat_src, 1))
1662 /* These insns only operate on the top of the stack. */
1664 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1666 emit_swap_insn (insn, regstack, *src1);
1668 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1670 if (STACK_REG_P (*dest))
1671 replace_reg (dest, FIRST_STACK_REG);
1675 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1677 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
1680 replace_reg (src1, FIRST_STACK_REG);
1684 /* (unspec [(unspec [(compare ..)] 9)] 10)
1685 Unspec 9 is fnstsw; unspec 10 is sahf. The combination
1686 matches the PPRO fcomi instruction. */
1688 pat_src = XVECEXP (pat_src, 0, 0);
1689 if (GET_CODE (pat_src) != UNSPEC
1690 || XINT (pat_src, 1) != 9)
1695 /* (unspec [(compare ..)] 9) */
1696 /* Combined fcomp+fnstsw generated for doing well with
1697 CSE. When optimizing this would have been broken
1700 pat_src = XVECEXP (pat_src, 0, 0);
1701 if (GET_CODE (pat_src) != COMPARE)
1704 compare_for_stack_reg (insn, regstack, pat_src);
1713 /* This insn requires the top of stack to be the destination. */
1715 /* If the comparison operator is an FP comparison operator,
1716 it is handled correctly by compare_for_stack_reg () who
1717 will move the destination to the top of stack. But if the
1718 comparison operator is not an FP comparison operator, we
1719 have to handle it here. */
1720 if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG
1721 && REGNO (*dest) != regstack->reg[regstack->top])
1722 emit_swap_insn (insn, regstack, *dest);
1724 src1 = get_true_reg (&XEXP (pat_src, 1));
1725 src2 = get_true_reg (&XEXP (pat_src, 2));
1727 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1728 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1735 src_note[1] = src1_note;
1736 src_note[2] = src2_note;
1738 if (STACK_REG_P (*src1))
1739 replace_reg (src1, get_hard_regnum (regstack, *src1));
1740 if (STACK_REG_P (*src2))
1741 replace_reg (src2, get_hard_regnum (regstack, *src2));
1743 for (i = 1; i <= 2; i++)
1746 int regno = REGNO (XEXP (src_note[i], 0));
1748 /* If the register that dies is not at the top of
1749 stack, then move the top of stack to the dead reg */
1750 if (regno != regstack->reg[regstack->top])
1752 remove_regno_note (insn, REG_DEAD, regno);
1753 emit_pop_insn (insn, regstack, XEXP (src_note[i], 0),
1758 CLEAR_HARD_REG_BIT (regstack->reg_set, regno);
1759 replace_reg (&XEXP (src_note[i], 0), FIRST_STACK_REG);
1765 /* Make dest the top of stack. Add dest to regstack if
1767 if (get_hard_regnum (regstack, *dest) < FIRST_STACK_REG)
1768 regstack->reg[++regstack->top] = REGNO (*dest);
1769 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1770 replace_reg (dest, FIRST_STACK_REG);
1784 /* Substitute hard regnums for any stack regs in INSN, which has
1785 N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info
1786 before the insn, and is updated with changes made here.
1788 There are several requirements and assumptions about the use of
1789 stack-like regs in asm statements. These rules are enforced by
1790 record_asm_stack_regs; see comments there for details. Any
1791 asm_operands left in the RTL at this point may be assume to meet the
1792 requirements, since record_asm_stack_regs removes any problem asm. */
1795 subst_asm_stack_regs (insn, regstack)
1799 rtx body = PATTERN (insn);
1802 rtx *note_reg; /* Array of note contents */
1803 rtx **note_loc; /* Address of REG field of each note */
1804 enum reg_note *note_kind; /* The type of each note */
1806 rtx *clobber_reg = 0;
1807 rtx **clobber_loc = 0;
1809 struct stack_def temp_stack;
1814 int n_inputs, n_outputs;
1816 if (! check_asm_stack_operands (insn))
1819 /* Find out what the constraints required. If no constraint
1820 alternative matches, that is a compiler bug: we should have caught
1821 such an insn in check_asm_stack_operands. */
1822 extract_insn (insn);
1823 constrain_operands (1);
1824 alt = which_alternative;
1826 preprocess_constraints ();
1828 n_inputs = get_asm_operand_n_inputs (body);
1829 n_outputs = recog_data.n_operands - n_inputs;
1834 /* Strip SUBREGs here to make the following code simpler. */
1835 for (i = 0; i < recog_data.n_operands; i++)
1836 if (GET_CODE (recog_data.operand[i]) == SUBREG
1837 && GET_CODE (SUBREG_REG (recog_data.operand[i])) == REG)
1839 recog_data.operand_loc[i] = & SUBREG_REG (recog_data.operand[i]);
1840 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
1843 /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */
1845 for (i = 0, note = REG_NOTES (insn); note; note = XEXP (note, 1))
1848 note_reg = (rtx *) alloca (i * sizeof (rtx));
1849 note_loc = (rtx **) alloca (i * sizeof (rtx *));
1850 note_kind = (enum reg_note *) alloca (i * sizeof (enum reg_note));
1853 for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
1855 rtx reg = XEXP (note, 0);
1856 rtx *loc = & XEXP (note, 0);
1858 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
1860 loc = & SUBREG_REG (reg);
1861 reg = SUBREG_REG (reg);
1864 if (STACK_REG_P (reg)
1865 && (REG_NOTE_KIND (note) == REG_DEAD
1866 || REG_NOTE_KIND (note) == REG_UNUSED))
1868 note_reg[n_notes] = reg;
1869 note_loc[n_notes] = loc;
1870 note_kind[n_notes] = REG_NOTE_KIND (note);
1875 /* Set up CLOBBER_REG and CLOBBER_LOC. */
1879 if (GET_CODE (body) == PARALLEL)
1881 clobber_reg = (rtx *) alloca (XVECLEN (body, 0) * sizeof (rtx));
1882 clobber_loc = (rtx **) alloca (XVECLEN (body, 0) * sizeof (rtx *));
1884 for (i = 0; i < XVECLEN (body, 0); i++)
1885 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
1887 rtx clobber = XVECEXP (body, 0, i);
1888 rtx reg = XEXP (clobber, 0);
1889 rtx *loc = & XEXP (clobber, 0);
1891 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
1893 loc = & SUBREG_REG (reg);
1894 reg = SUBREG_REG (reg);
1897 if (STACK_REG_P (reg))
1899 clobber_reg[n_clobbers] = reg;
1900 clobber_loc[n_clobbers] = loc;
1906 temp_stack = *regstack;
1908 /* Put the input regs into the desired place in TEMP_STACK. */
1910 for (i = n_outputs; i < n_outputs + n_inputs; i++)
1911 if (STACK_REG_P (recog_data.operand[i])
1912 && reg_class_subset_p (recog_op_alt[i][alt].class,
1914 && recog_op_alt[i][alt].class != FLOAT_REGS)
1916 /* If an operand needs to be in a particular reg in
1917 FLOAT_REGS, the constraint was either 't' or 'u'. Since
1918 these constraints are for single register classes, and
1919 reload guaranteed that operand[i] is already in that class,
1920 we can just use REGNO (recog_data.operand[i]) to know which
1921 actual reg this operand needs to be in. */
1923 int regno = get_hard_regnum (&temp_stack, recog_data.operand[i]);
1928 if (regno != REGNO (recog_data.operand[i]))
1930 /* recog_data.operand[i] is not in the right place. Find
1931 it and swap it with whatever is already in I's place.
1932 K is where recog_data.operand[i] is now. J is where it
1936 k = temp_stack.top - (regno - FIRST_STACK_REG);
1938 - (REGNO (recog_data.operand[i]) - FIRST_STACK_REG));
1940 temp = temp_stack.reg[k];
1941 temp_stack.reg[k] = temp_stack.reg[j];
1942 temp_stack.reg[j] = temp;
1946 /* Emit insns before INSN to make sure the reg-stack is in the right
1949 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
1951 /* Make the needed input register substitutions. Do death notes and
1952 clobbers too, because these are for inputs, not outputs. */
1954 for (i = n_outputs; i < n_outputs + n_inputs; i++)
1955 if (STACK_REG_P (recog_data.operand[i]))
1957 int regnum = get_hard_regnum (regstack, recog_data.operand[i]);
1962 replace_reg (recog_data.operand_loc[i], regnum);
1965 for (i = 0; i < n_notes; i++)
1966 if (note_kind[i] == REG_DEAD)
1968 int regnum = get_hard_regnum (regstack, note_reg[i]);
1973 replace_reg (note_loc[i], regnum);
1976 for (i = 0; i < n_clobbers; i++)
1978 /* It's OK for a CLOBBER to reference a reg that is not live.
1979 Don't try to replace it in that case. */
1980 int regnum = get_hard_regnum (regstack, clobber_reg[i]);
1984 /* Sigh - clobbers always have QImode. But replace_reg knows
1985 that these regs can't be MODE_INT and will abort. Just put
1986 the right reg there without calling replace_reg. */
1988 *clobber_loc[i] = FP_MODE_REG (regnum, DFmode);
1992 /* Now remove from REGSTACK any inputs that the asm implicitly popped. */
1994 for (i = n_outputs; i < n_outputs + n_inputs; i++)
1995 if (STACK_REG_P (recog_data.operand[i]))
1997 /* An input reg is implicitly popped if it is tied to an
1998 output, or if there is a CLOBBER for it. */
2001 for (j = 0; j < n_clobbers; j++)
2002 if (operands_match_p (clobber_reg[j], recog_data.operand[i]))
2005 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0)
2007 /* recog_data.operand[i] might not be at the top of stack.
2008 But that's OK, because all we need to do is pop the
2009 right number of regs off of the top of the reg-stack.
2010 record_asm_stack_regs guaranteed that all implicitly
2011 popped regs were grouped at the top of the reg-stack. */
2013 CLEAR_HARD_REG_BIT (regstack->reg_set,
2014 regstack->reg[regstack->top]);
2019 /* Now add to REGSTACK any outputs that the asm implicitly pushed.
2020 Note that there isn't any need to substitute register numbers.
2021 ??? Explain why this is true. */
2023 for (i = LAST_STACK_REG; i >= FIRST_STACK_REG; i--)
2025 /* See if there is an output for this hard reg. */
2028 for (j = 0; j < n_outputs; j++)
2029 if (STACK_REG_P (recog_data.operand[j])
2030 && REGNO (recog_data.operand[j]) == i)
2032 regstack->reg[++regstack->top] = i;
2033 SET_HARD_REG_BIT (regstack->reg_set, i);
2038 /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD
2039 input that the asm didn't implicitly pop. If the asm didn't
2040 implicitly pop an input reg, that reg will still be live.
2042 Note that we can't use find_regno_note here: the register numbers
2043 in the death notes have already been substituted. */
2045 for (i = 0; i < n_outputs; i++)
2046 if (STACK_REG_P (recog_data.operand[i]))
2050 for (j = 0; j < n_notes; j++)
2051 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j])
2052 && note_kind[j] == REG_UNUSED)
2054 insn = emit_pop_insn (insn, regstack, recog_data.operand[i],
2060 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2061 if (STACK_REG_P (recog_data.operand[i]))
2065 for (j = 0; j < n_notes; j++)
2066 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j])
2067 && note_kind[j] == REG_DEAD
2068 && TEST_HARD_REG_BIT (regstack->reg_set,
2069 REGNO (recog_data.operand[i])))
2071 insn = emit_pop_insn (insn, regstack, recog_data.operand[i],
2078 /* Substitute stack hard reg numbers for stack virtual registers in
2079 INSN. Non-stack register numbers are not changed. REGSTACK is the
2080 current stack content. Insns may be emitted as needed to arrange the
2081 stack for the 387 based on the contents of the insn. */
2084 subst_stack_regs (insn, regstack)
2088 register rtx *note_link, note;
2091 if (GET_CODE (insn) == CALL_INSN)
2093 int top = regstack->top;
2095 /* If there are any floating point parameters to be passed in
2096 registers for this call, make sure they are in the right
2101 straighten_stack (PREV_INSN (insn), regstack);
2103 /* Now mark the arguments as dead after the call. */
2105 while (regstack->top >= 0)
2107 CLEAR_HARD_REG_BIT (regstack->reg_set, FIRST_STACK_REG + regstack->top);
2113 /* Do the actual substitution if any stack regs are mentioned.
2114 Since we only record whether entire insn mentions stack regs, and
2115 subst_stack_regs_pat only works for patterns that contain stack regs,
2116 we must check each pattern in a parallel here. A call_value_pop could
2119 if (stack_regs_mentioned (insn))
2121 int n_operands = asm_noperands (PATTERN (insn));
2122 if (n_operands >= 0)
2124 /* This insn is an `asm' with operands. Decode the operands,
2125 decide how many are inputs, and do register substitution.
2126 Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */
2128 subst_asm_stack_regs (insn, regstack);
2132 if (GET_CODE (PATTERN (insn)) == PARALLEL)
2133 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
2135 if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn), 0, i)))
2136 subst_stack_regs_pat (insn, regstack,
2137 XVECEXP (PATTERN (insn), 0, i));
2140 subst_stack_regs_pat (insn, regstack, PATTERN (insn));
2143 /* subst_stack_regs_pat may have deleted a no-op insn. If so, any
2144 REG_UNUSED will already have been dealt with, so just return. */
2146 if (GET_CODE (insn) == NOTE)
2149 /* If there is a REG_UNUSED note on a stack register on this insn,
2150 the indicated reg must be popped. The REG_UNUSED note is removed,
2151 since the form of the newly emitted pop insn references the reg,
2152 making it no longer `unset'. */
2154 note_link = ®_NOTES(insn);
2155 for (note = *note_link; note; note = XEXP (note, 1))
2156 if (REG_NOTE_KIND (note) == REG_UNUSED && STACK_REG_P (XEXP (note, 0)))
2158 *note_link = XEXP (note, 1);
2159 insn = emit_pop_insn (insn, regstack, XEXP (note, 0), EMIT_AFTER);
2162 note_link = &XEXP (note, 1);
2165 /* Change the organization of the stack so that it fits a new basic
2166 block. Some registers might have to be popped, but there can never be
2167 a register live in the new block that is not now live.
2169 Insert any needed insns before or after INSN, as indicated by
2170 WHERE. OLD is the original stack layout, and NEW is the desired
2171 form. OLD is updated to reflect the code emitted, ie, it will be
2172 the same as NEW upon return.
2174 This function will not preserve block_end[]. But that information
2175 is no longer needed once this has executed. */
2178 change_stack (insn, old, new, where)
2182 enum emit_where where;
2187 /* We will be inserting new insns "backwards". If we are to insert
2188 after INSN, find the next insn, and insert before it. */
2190 if (where == EMIT_AFTER)
2192 if (current_block && current_block->end == insn)
2194 insn = NEXT_INSN (insn);
2197 /* Pop any registers that are not needed in the new block. */
2199 for (reg = old->top; reg >= 0; reg--)
2200 if (! TEST_HARD_REG_BIT (new->reg_set, old->reg[reg]))
2201 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[reg], DFmode),
2206 /* If the new block has never been processed, then it can inherit
2207 the old stack order. */
2209 new->top = old->top;
2210 memcpy (new->reg, old->reg, sizeof (new->reg));
2214 /* This block has been entered before, and we must match the
2215 previously selected stack order. */
2217 /* By now, the only difference should be the order of the stack,
2218 not their depth or liveliness. */
2220 GO_IF_HARD_REG_EQUAL (old->reg_set, new->reg_set, win);
2223 if (old->top != new->top)
2226 /* If the stack is not empty (new->top != -1), loop here emitting
2227 swaps until the stack is correct.
2229 The worst case number of swaps emitted is N + 2, where N is the
2230 depth of the stack. In some cases, the reg at the top of
2231 stack may be correct, but swapped anyway in order to fix
2232 other regs. But since we never swap any other reg away from
2233 its correct slot, this algorithm will converge. */
2238 /* Swap the reg at top of stack into the position it is
2239 supposed to be in, until the correct top of stack appears. */
2241 while (old->reg[old->top] != new->reg[new->top])
2243 for (reg = new->top; reg >= 0; reg--)
2244 if (new->reg[reg] == old->reg[old->top])
2250 emit_swap_insn (insn, old,
2251 FP_MODE_REG (old->reg[reg], DFmode));
2254 /* See if any regs remain incorrect. If so, bring an
2255 incorrect reg to the top of stack, and let the while loop
2258 for (reg = new->top; reg >= 0; reg--)
2259 if (new->reg[reg] != old->reg[reg])
2261 emit_swap_insn (insn, old,
2262 FP_MODE_REG (old->reg[reg], DFmode));
2267 /* At this point there must be no differences. */
2269 for (reg = old->top; reg >= 0; reg--)
2270 if (old->reg[reg] != new->reg[reg])
2275 current_block->end = PREV_INSN (insn);
2278 /* Print stack configuration. */
2281 print_stack (file, s)
2289 fprintf (file, "uninitialized\n");
2290 else if (s->top == -1)
2291 fprintf (file, "empty\n");
2296 for (i = 0; i <= s->top; ++i)
2297 fprintf (file, "%d ", s->reg[i]);
2298 fputs ("]\n", file);
2302 /* This function was doing life analysis. We now let the regular live
2303 code do it's job, so we only need to check some extra invariants
2304 that reg-stack expects. Primary among these being that all registers
2305 are initialized before use.
2307 The function returns true when code was emitted to CFG edges and
2308 commit_edge_insertions needs to be called. */
2311 convert_regs_entry ()
2313 int inserted = 0, i;
2316 for (i = n_basic_blocks - 1; i >= 0; --i)
2318 basic_block block = BASIC_BLOCK (i);
2319 block_info bi = BLOCK_INFO (block);
2322 /* Set current register status at last instruction `uninitialized'. */
2323 bi->stack_in.top = -2;
2325 /* Copy live_at_end and live_at_start into temporaries. */
2326 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; reg++)
2328 if (REGNO_REG_SET_P (block->global_live_at_end, reg))
2329 SET_HARD_REG_BIT (bi->out_reg_set, reg);
2330 if (REGNO_REG_SET_P (block->global_live_at_start, reg))
2331 SET_HARD_REG_BIT (bi->stack_in.reg_set, reg);
2335 /* Load something into each stack register live at function entry.
2336 Such live registers can be caused by uninitialized variables or
2337 functions not returning values on all paths. In order to keep
2338 the push/pop code happy, and to not scrog the register stack, we
2339 must put something in these registers. Use a QNaN.
2341 Note that we are insertting converted code here. This code is
2342 never seen by the convert_regs pass. */
2344 for (e = ENTRY_BLOCK_PTR->succ; e ; e = e->succ_next)
2346 basic_block block = e->dest;
2347 block_info bi = BLOCK_INFO (block);
2350 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg)
2351 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg))
2355 bi->stack_in.reg[++top] = reg;
2357 init = gen_rtx_SET (VOIDmode,
2358 FP_MODE_REG (FIRST_STACK_REG, SFmode),
2360 insert_insn_on_edge (init, e);
2364 bi->stack_in.top = top;
2370 /* Construct the desired stack for function exit. This will either
2371 be `empty', or the function return value at top-of-stack. */
2374 convert_regs_exit ()
2376 int value_reg_low, value_reg_high;
2380 retvalue = stack_result (current_function_decl);
2381 value_reg_low = value_reg_high = -1;
2384 value_reg_low = REGNO (retvalue);
2385 value_reg_high = value_reg_low
2386 + HARD_REGNO_NREGS (value_reg_low, GET_MODE (retvalue)) - 1;
2389 output_stack = &BLOCK_INFO (EXIT_BLOCK_PTR)->stack_in;
2390 if (value_reg_low == -1)
2391 output_stack->top = -1;
2396 output_stack->top = value_reg_high - value_reg_low;
2397 for (reg = value_reg_low; reg <= value_reg_high; ++reg)
2399 output_stack->reg[reg - value_reg_low] = reg;
2400 SET_HARD_REG_BIT (output_stack->reg_set, reg);
2405 /* Convert stack register references in one block. */
2408 convert_regs_1 (file, block)
2412 struct stack_def regstack, tmpstack;
2413 block_info bi = BLOCK_INFO (block);
2418 current_block = block;
2422 fprintf (file, "\nBasic block %d\nInput stack: ", block->index);
2423 print_stack (file, &bi->stack_in);
2426 /* Process all insns in this block. Keep track of NEXT so that we
2427 don't process insns emitted while substituting in INSN. */
2429 regstack = bi->stack_in;
2433 next = NEXT_INSN (insn);
2435 /* Ensure we have not missed a block boundary. */
2438 if (insn == block->end)
2441 /* Don't bother processing unless there is a stack reg
2442 mentioned or if it's a CALL_INSN. */
2443 if (stack_regs_mentioned (insn)
2444 || GET_CODE (insn) == CALL_INSN)
2448 fprintf (file, " insn %d input stack: ",
2450 print_stack (file, ®stack);
2452 subst_stack_regs (insn, ®stack);
2459 fprintf (file, "Expected live registers [");
2460 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg)
2461 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg))
2462 fprintf (file, " %d", reg);
2463 fprintf (file, " ]\nOutput stack: ");
2464 print_stack (file, ®stack);
2468 if (GET_CODE (insn) == JUMP_INSN)
2469 insn = PREV_INSN (insn);
2471 /* If the function is declared to return a value, but it returns one
2472 in only some cases, some registers might come live here. Emit
2473 necessary moves for them. */
2475 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg)
2477 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg)
2478 && ! TEST_HARD_REG_BIT (regstack.reg_set, reg))
2484 fprintf (file, "Emitting insn initializing reg %d\n",
2488 set = gen_rtx_SET (VOIDmode, FP_MODE_REG (reg, SFmode),
2490 insn = emit_block_insn_after (set, insn, block);
2491 subst_stack_regs (insn, ®stack);
2495 /* Something failed if the stack lives don't match. */
2496 GO_IF_HARD_REG_EQUAL (regstack.reg_set, bi->out_reg_set, win);
2500 /* Adjust the stack of this block on exit to match the stack of the
2501 target block, or copy stack info into the stack of the successor
2502 of the successor hasn't been processed yet. */
2504 for (e = block->succ; e ; e = e->succ_next)
2506 basic_block target = e->dest;
2507 stack target_stack = &BLOCK_INFO (target)->stack_in;
2510 fprintf (file, "Edge to block %d: ", target->index);
2512 if (target_stack->top == -2)
2514 /* The target block hasn't had a stack order selected.
2515 We need merely ensure that no pops are needed. */
2516 for (reg = regstack.top; reg >= 0; --reg)
2517 if (! TEST_HARD_REG_BIT (target_stack->reg_set,
2524 fprintf (file, "new block; copying stack position\n");
2526 /* change_stack kills values in regstack. */
2527 tmpstack = regstack;
2529 change_stack (block->end, &tmpstack,
2530 target_stack, EMIT_AFTER);
2535 fprintf (file, "new block; pops needed\n");
2539 if (target_stack->top == regstack.top)
2541 for (reg = target_stack->top; reg >= 0; --reg)
2542 if (target_stack->reg[reg] != regstack.reg[reg])
2548 fprintf (file, "no changes needed\n");
2555 fprintf (file, "correcting stack to ");
2556 print_stack (file, target_stack);
2560 /* Care for non-call EH edges specially. The normal return path have
2561 values in registers. These will be popped en masse by the unwind
2563 if ((e->flags & (EDGE_EH | EDGE_ABNORMAL_CALL)) == EDGE_EH)
2564 target_stack->top = -1;
2566 /* Other calls may appear to have values live in st(0), but the
2567 abnormal return path will not have actually loaded the values. */
2568 else if (e->flags & EDGE_ABNORMAL_CALL)
2570 /* Assert that the lifetimes are as we expect -- one value
2571 live at st(0) on the end of the source block, and no
2572 values live at the beginning of the destination block. */
2575 CLEAR_HARD_REG_SET (tmp);
2576 GO_IF_HARD_REG_EQUAL (target_stack->reg_set, tmp, eh1);
2580 SET_HARD_REG_BIT (tmp, FIRST_STACK_REG);
2581 GO_IF_HARD_REG_EQUAL (regstack.reg_set, tmp, eh2);
2585 target_stack->top = -1;
2588 /* It is better to output directly to the end of the block
2589 instead of to the edge, because emit_swap can do minimal
2590 insn scheduling. We can do this when there is only one
2591 edge out, and it is not abnormal. */
2592 else if (block->succ->succ_next == NULL
2593 && ! (e->flags & EDGE_ABNORMAL))
2595 /* change_stack kills values in regstack. */
2596 tmpstack = regstack;
2598 change_stack (block->end, &tmpstack, target_stack,
2599 (GET_CODE (block->end) == JUMP_INSN
2600 ? EMIT_BEFORE : EMIT_AFTER));
2606 /* We don't support abnormal edges. Global takes care to
2607 avoid any live register across them, so we should never
2608 have to insert instructions on such edges. */
2609 if (e->flags & EDGE_ABNORMAL)
2612 current_block = NULL;
2615 /* ??? change_stack needs some point to emit insns after.
2616 Also needed to keep gen_sequence from returning a
2617 pattern as opposed to a sequence, which would lose
2619 after = emit_note (NULL, NOTE_INSN_DELETED);
2621 tmpstack = regstack;
2622 change_stack (after, &tmpstack, target_stack, EMIT_BEFORE);
2624 seq = gen_sequence ();
2627 insert_insn_on_edge (seq, e);
2629 current_block = block;
2636 /* Convert registers in all blocks reachable from BLOCK. */
2639 convert_regs_2 (file, block)
2643 basic_block *stack, *sp;
2646 stack = (basic_block *) xmalloc (sizeof (*stack) * n_basic_blocks);
2650 BLOCK_INFO (block)->done = 1;
2658 inserted |= convert_regs_1 (file, block);
2660 for (e = block->succ; e ; e = e->succ_next)
2661 if (! BLOCK_INFO (e->dest)->done)
2664 BLOCK_INFO (e->dest)->done = 1;
2667 while (sp != stack);
2672 /* Traverse all basic blocks in a function, converting the register
2673 references in each insn from the "flat" register file that gcc uses,
2674 to the stack-like registers the 387 uses. */
2683 /* Initialize uninitialized registers on function entry. */
2684 inserted = convert_regs_entry ();
2686 /* Construct the desired stack for function exit. */
2687 convert_regs_exit ();
2688 BLOCK_INFO (EXIT_BLOCK_PTR)->done = 1;
2690 /* ??? Future: process inner loops first, and give them arbitrary
2691 initial stacks which emit_swap_insn can modify. This ought to
2692 prevent double fxch that aften appears at the head of a loop. */
2694 /* Process all blocks reachable from all entry points. */
2695 for (e = ENTRY_BLOCK_PTR->succ; e ; e = e->succ_next)
2696 inserted |= convert_regs_2 (file, e->dest);
2698 /* ??? Process all unreachable blocks. Though there's no excuse
2699 for keeping these even when not optimizing. */
2700 for (i = 0; i < n_basic_blocks; ++i)
2702 basic_block b = BASIC_BLOCK (i);
2703 block_info bi = BLOCK_INFO (b);
2709 /* Create an arbitrary input stack. */
2710 bi->stack_in.top = -1;
2711 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg)
2712 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg))
2713 bi->stack_in.reg[++bi->stack_in.top] = reg;
2715 inserted |= convert_regs_2 (file, b);
2720 commit_edge_insertions ();
2727 #endif /* STACK_REGS */