1 /* Register to Stack convert for GNU compiler.
2 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
22 /* This pass converts stack-like registers from the "flat register
23 file" model that gcc uses, to a stack convention that the 387 uses.
25 * The form of the input:
27 On input, the function consists of insn that have had their
28 registers fully allocated to a set of "virtual" registers. Note that
29 the word "virtual" is used differently here than elsewhere in gcc: for
30 each virtual stack reg, there is a hard reg, but the mapping between
31 them is not known until this pass is run. On output, hard register
32 numbers have been substituted, and various pop and exchange insns have
33 been emitted. The hard register numbers and the virtual register
34 numbers completely overlap - before this pass, all stack register
35 numbers are virtual, and afterward they are all hard.
37 The virtual registers can be manipulated normally by gcc, and their
38 semantics are the same as for normal registers. After the hard
39 register numbers are substituted, the semantics of an insn containing
40 stack-like regs are not the same as for an insn with normal regs: for
41 instance, it is not safe to delete an insn that appears to be a no-op
42 move. In general, no insn containing hard regs should be changed
43 after this pass is done.
45 * The form of the output:
47 After this pass, hard register numbers represent the distance from
48 the current top of stack to the desired register. A reference to
49 FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1,
50 represents the register just below that, and so forth. Also, REG_DEAD
51 notes indicate whether or not a stack register should be popped.
53 A "swap" insn looks like a parallel of two patterns, where each
54 pattern is a SET: one sets A to B, the other B to A.
56 A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG
57 and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS,
58 will replace the existing stack top, not push a new value.
60 A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose
61 SET_SRC is REG or MEM.
63 The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG
64 appears ambiguous. As a special case, the presence of a REG_DEAD note
65 for FIRST_STACK_REG differentiates between a load insn and a pop.
67 If a REG_DEAD is present, the insn represents a "pop" that discards
68 the top of the register stack. If there is no REG_DEAD note, then the
69 insn represents a "dup" or a push of the current top of stack onto the
74 Existing REG_DEAD and REG_UNUSED notes for stack registers are
75 deleted and recreated from scratch. REG_DEAD is never created for a
76 SET_DEST, only REG_UNUSED.
80 There are several rules on the usage of stack-like regs in
81 asm_operands insns. These rules apply only to the operands that are
84 1. Given a set of input regs that die in an asm_operands, it is
85 necessary to know which are implicitly popped by the asm, and
86 which must be explicitly popped by gcc.
88 An input reg that is implicitly popped by the asm must be
89 explicitly clobbered, unless it is constrained to match an
92 2. For any input reg that is implicitly popped by an asm, it is
93 necessary to know how to adjust the stack to compensate for the pop.
94 If any non-popped input is closer to the top of the reg-stack than
95 the implicitly popped reg, it would not be possible to know what the
96 stack looked like - it's not clear how the rest of the stack "slides
99 All implicitly popped input regs must be closer to the top of
100 the reg-stack than any input that is not implicitly popped.
102 3. It is possible that if an input dies in an insn, reload might
103 use the input reg for an output reload. Consider this example:
105 asm ("foo" : "=t" (a) : "f" (b));
107 This asm says that input B is not popped by the asm, and that
108 the asm pushes a result onto the reg-stack, ie, the stack is one
109 deeper after the asm than it was before. But, it is possible that
110 reload will think that it can use the same reg for both the input and
111 the output, if input B dies in this insn.
113 If any input operand uses the "f" constraint, all output reg
114 constraints must use the "&" earlyclobber.
116 The asm above would be written as
118 asm ("foo" : "=&t" (a) : "f" (b));
120 4. Some operands need to be in particular places on the stack. All
121 output operands fall in this category - there is no other way to
122 know which regs the outputs appear in unless the user indicates
123 this in the constraints.
125 Output operands must specifically indicate which reg an output
126 appears in after an asm. "=f" is not allowed: the operand
127 constraints must select a class with a single reg.
129 5. Output operands may not be "inserted" between existing stack regs.
130 Since no 387 opcode uses a read/write operand, all output operands
131 are dead before the asm_operands, and are pushed by the asm_operands.
132 It makes no sense to push anywhere but the top of the reg-stack.
134 Output operands must start at the top of the reg-stack: output
135 operands may not "skip" a reg.
137 6. Some asm statements may need extra stack space for internal
138 calculations. This can be guaranteed by clobbering stack registers
139 unrelated to the inputs and outputs.
141 Here are a couple of reasonable asms to want to write. This asm
142 takes one input, which is internally popped, and produces two outputs.
144 asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp));
146 This asm takes two inputs, which are popped by the fyl2xp1 opcode,
147 and replaces them with one output. The user must code the "st(1)"
148 clobber for reg-stack.c to know that fyl2xp1 pops both inputs.
150 asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)");
159 #include "function.h"
160 #include "insn-config.h"
162 #include "hard-reg-set.h"
167 #include "basic-block.h"
173 #define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1)
175 /* This is the basic stack record. TOP is an index into REG[] such
176 that REG[TOP] is the top of stack. If TOP is -1 the stack is empty.
178 If TOP is -2, REG[] is not yet initialized. Stack initialization
179 consists of placing each live reg in array `reg' and setting `top'
182 REG_SET indicates which registers are live. */
184 typedef struct stack_def
186 int top; /* index to top stack element */
187 HARD_REG_SET reg_set; /* set of live registers */
188 unsigned char reg[REG_STACK_SIZE];/* register - stack mapping */
191 /* This is used to carry information about basic blocks. It is
192 attached to the AUX field of the standard CFG block. */
194 typedef struct block_info_def
196 struct stack_def stack_in; /* Input stack configuration. */
197 HARD_REG_SET out_reg_set; /* Stack regs live on output. */
198 int done; /* True if block already converted. */
201 #define BLOCK_INFO(B) ((block_info) (B)->aux)
203 /* Passed to change_stack to indicate where to emit insns. */
210 /* We use this array to cache info about insns, because otherwise we
211 spend too much time in stack_regs_mentioned_p.
213 Indexed by insn UIDs. A value of zero is uninitialized, one indicates
214 the insn uses stack registers, two indicates the insn does not use
216 static varray_type stack_regs_mentioned_data;
218 /* The block we're currently working on. */
219 static basic_block current_block;
221 /* This is the register file for all register after conversion */
223 FP_mode_reg[LAST_STACK_REG+1-FIRST_STACK_REG][(int) MAX_MACHINE_MODE];
225 #define FP_MODE_REG(regno,mode) \
226 (FP_mode_reg[(regno)-FIRST_STACK_REG][(int)(mode)])
228 /* Used to initialize uninitialized registers. */
231 /* Forward declarations */
233 static int stack_regs_mentioned_p PARAMS ((rtx pat));
234 static void straighten_stack PARAMS ((rtx, stack));
235 static void pop_stack PARAMS ((stack, int));
236 static rtx *get_true_reg PARAMS ((rtx *));
238 static int check_asm_stack_operands PARAMS ((rtx));
239 static int get_asm_operand_n_inputs PARAMS ((rtx));
240 static rtx stack_result PARAMS ((tree));
241 static void replace_reg PARAMS ((rtx *, int));
242 static void remove_regno_note PARAMS ((rtx, enum reg_note,
244 static int get_hard_regnum PARAMS ((stack, rtx));
245 static void delete_insn_for_stacker PARAMS ((rtx));
246 static rtx emit_pop_insn PARAMS ((rtx, stack, rtx,
248 static void emit_swap_insn PARAMS ((rtx, stack, rtx));
249 static void move_for_stack_reg PARAMS ((rtx, stack, rtx));
250 static int swap_rtx_condition_1 PARAMS ((rtx));
251 static int swap_rtx_condition PARAMS ((rtx));
252 static void compare_for_stack_reg PARAMS ((rtx, stack, rtx));
253 static void subst_stack_regs_pat PARAMS ((rtx, stack, rtx));
254 static void subst_asm_stack_regs PARAMS ((rtx, stack));
255 static void subst_stack_regs PARAMS ((rtx, stack));
256 static void change_stack PARAMS ((rtx, stack, stack,
258 static int convert_regs_entry PARAMS ((void));
259 static void convert_regs_exit PARAMS ((void));
260 static int convert_regs_1 PARAMS ((FILE *, basic_block));
261 static int convert_regs_2 PARAMS ((FILE *, basic_block));
262 static int convert_regs PARAMS ((FILE *));
263 static void print_stack PARAMS ((FILE *, stack));
264 static rtx next_flags_user PARAMS ((rtx));
265 static void record_label_references PARAMS ((rtx, rtx));
267 /* Return non-zero if any stack register is mentioned somewhere within PAT. */
270 stack_regs_mentioned_p (pat)
273 register const char *fmt;
276 if (STACK_REG_P (pat))
279 fmt = GET_RTX_FORMAT (GET_CODE (pat));
280 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
286 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
287 if (stack_regs_mentioned_p (XVECEXP (pat, i, j)))
290 else if (fmt[i] == 'e' && stack_regs_mentioned_p (XEXP (pat, i)))
297 /* Return nonzero if INSN mentions stacked registers, else return zero. */
300 stack_regs_mentioned (insn)
303 unsigned int uid, max;
309 uid = INSN_UID (insn);
310 max = VARRAY_SIZE (stack_regs_mentioned_data);
313 /* Allocate some extra size to avoid too many reallocs, but
314 do not grow too quickly. */
315 max = uid + uid / 20;
316 VARRAY_GROW (stack_regs_mentioned_data, max);
319 test = VARRAY_CHAR (stack_regs_mentioned_data, uid);
322 /* This insn has yet to be examined. Do so now. */
323 test = stack_regs_mentioned_p (PATTERN (insn)) ? 1 : 2;
324 VARRAY_CHAR (stack_regs_mentioned_data, uid) = test;
330 static rtx ix86_flags_rtx;
333 next_flags_user (insn)
336 /* Search forward looking for the first use of this value.
337 Stop at block boundaries. */
339 while (insn != current_block->end)
341 insn = NEXT_INSN (insn);
343 if (INSN_P (insn) && reg_mentioned_p (ix86_flags_rtx, PATTERN (insn)))
346 if (GET_CODE (insn) == CALL_INSN)
352 /* Reorganise the stack into ascending numbers,
356 straighten_stack (insn, regstack)
360 struct stack_def temp_stack;
363 /* If there is only a single register on the stack, then the stack is
364 already in increasing order and no reorganization is needed.
366 Similarly if the stack is empty. */
367 if (regstack->top <= 0)
370 COPY_HARD_REG_SET (temp_stack.reg_set, regstack->reg_set);
372 for (top = temp_stack.top = regstack->top; top >= 0; top--)
373 temp_stack.reg[top] = FIRST_STACK_REG + temp_stack.top - top;
375 change_stack (insn, regstack, &temp_stack, EMIT_AFTER);
378 /* Pop a register from the stack */
381 pop_stack (regstack, regno)
385 int top = regstack->top;
387 CLEAR_HARD_REG_BIT (regstack->reg_set, regno);
389 /* If regno was not at the top of stack then adjust stack */
390 if (regstack->reg [top] != regno)
393 for (i = regstack->top; i >= 0; i--)
394 if (regstack->reg [i] == regno)
397 for (j = i; j < top; j++)
398 regstack->reg [j] = regstack->reg [j + 1];
404 /* Convert register usage from "flat" register file usage to a "stack
405 register file. FIRST is the first insn in the function, FILE is the
408 Construct a CFG and run life analysis. Then convert each insn one
409 by one. Run a last jump_optimize pass, if optimizing, to eliminate
410 code duplication created when the converter inserts pop insns on
414 reg_to_stack (first, file)
422 /* See if there is something to do. Flow analysis is quite
423 expensive so we might save some compilation time. */
424 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
425 if (regs_ever_live[i])
427 if (i > LAST_STACK_REG)
430 /* Ok, floating point instructions exist. If not optimizing,
431 build the CFG and run life analysis. */
432 find_basic_blocks (first, max_reg_num (), file);
433 count_or_remove_death_notes (NULL, 1);
434 life_analysis (first, file, PROP_DEATH_NOTES);
436 /* Set up block info for each basic block. */
437 bi = (block_info) xcalloc ((n_basic_blocks + 1), sizeof (*bi));
438 for (i = n_basic_blocks - 1; i >= 0; --i)
439 BASIC_BLOCK (i)->aux = bi + i;
440 EXIT_BLOCK_PTR->aux = bi + n_basic_blocks;
442 /* Create the replacement registers up front. */
443 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
445 enum machine_mode mode;
446 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
448 mode = GET_MODE_WIDER_MODE (mode))
449 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
450 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT);
452 mode = GET_MODE_WIDER_MODE (mode))
453 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
456 ix86_flags_rtx = gen_rtx_REG (CCmode, FLAGS_REG);
458 /* A QNaN for initializing uninitialized variables.
460 ??? We can't load from constant memory in PIC mode, because
461 we're insertting these instructions before the prologue and
462 the PIC register hasn't been set up. In that case, fall back
463 on zero, which we can get from `ldz'. */
466 nan = CONST0_RTX (SFmode);
469 nan = gen_lowpart (SFmode, GEN_INT (0x7fc00000));
470 nan = force_const_mem (SFmode, nan);
473 /* Allocate a cache for stack_regs_mentioned. */
474 max_uid = get_max_uid ();
475 VARRAY_CHAR_INIT (stack_regs_mentioned_data, max_uid + 1,
476 "stack_regs_mentioned cache");
478 if (convert_regs (file) && optimize)
480 jump_optimize (first, JUMP_CROSS_JUMP_DEATH_MATTERS,
481 !JUMP_NOOP_MOVES, !JUMP_AFTER_REGSCAN);
485 VARRAY_FREE (stack_regs_mentioned_data);
489 /* Check PAT, which is in INSN, for LABEL_REFs. Add INSN to the
490 label's chain of references, and note which insn contains each
494 record_label_references (insn, pat)
497 register enum rtx_code code = GET_CODE (pat);
499 register const char *fmt;
501 if (code == LABEL_REF)
503 register rtx label = XEXP (pat, 0);
506 if (GET_CODE (label) != CODE_LABEL)
509 /* If this is an undefined label, LABEL_REFS (label) contains
511 if (INSN_UID (label) == 0)
514 /* Don't make a duplicate in the code_label's chain. */
516 for (ref = LABEL_REFS (label);
518 ref = LABEL_NEXTREF (ref))
519 if (CONTAINING_INSN (ref) == insn)
522 CONTAINING_INSN (pat) = insn;
523 LABEL_NEXTREF (pat) = LABEL_REFS (label);
524 LABEL_REFS (label) = pat;
529 fmt = GET_RTX_FORMAT (code);
530 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
533 record_label_references (insn, XEXP (pat, i));
537 for (j = 0; j < XVECLEN (pat, i); j++)
538 record_label_references (insn, XVECEXP (pat, i, j));
543 /* Return a pointer to the REG expression within PAT. If PAT is not a
544 REG, possible enclosed by a conversion rtx, return the inner part of
545 PAT that stopped the search. */
552 switch (GET_CODE (*pat))
555 /* Eliminate FP subregister accesses in favour of the
556 actual FP register in use. */
559 if (FP_REG_P (subreg = SUBREG_REG (*pat)))
561 int regno_off = subreg_regno_offset (REGNO (subreg),
565 *pat = FP_MODE_REG (REGNO (subreg) + regno_off,
574 pat = & XEXP (*pat, 0);
578 /* There are many rules that an asm statement for stack-like regs must
579 follow. Those rules are explained at the top of this file: the rule
580 numbers below refer to that explanation. */
583 check_asm_stack_operands (insn)
588 int malformed_asm = 0;
589 rtx body = PATTERN (insn);
591 char reg_used_as_output[FIRST_PSEUDO_REGISTER];
592 char implicitly_dies[FIRST_PSEUDO_REGISTER];
595 rtx *clobber_reg = 0;
596 int n_inputs, n_outputs;
598 /* Find out what the constraints require. If no constraint
599 alternative matches, this asm is malformed. */
601 constrain_operands (1);
602 alt = which_alternative;
604 preprocess_constraints ();
606 n_inputs = get_asm_operand_n_inputs (body);
607 n_outputs = recog_data.n_operands - n_inputs;
612 /* Avoid further trouble with this insn. */
613 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
617 /* Strip SUBREGs here to make the following code simpler. */
618 for (i = 0; i < recog_data.n_operands; i++)
619 if (GET_CODE (recog_data.operand[i]) == SUBREG
620 && GET_CODE (SUBREG_REG (recog_data.operand[i])) == REG)
621 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
623 /* Set up CLOBBER_REG. */
627 if (GET_CODE (body) == PARALLEL)
629 clobber_reg = (rtx *) alloca (XVECLEN (body, 0) * sizeof (rtx));
631 for (i = 0; i < XVECLEN (body, 0); i++)
632 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
634 rtx clobber = XVECEXP (body, 0, i);
635 rtx reg = XEXP (clobber, 0);
637 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
638 reg = SUBREG_REG (reg);
640 if (STACK_REG_P (reg))
642 clobber_reg[n_clobbers] = reg;
648 /* Enforce rule #4: Output operands must specifically indicate which
649 reg an output appears in after an asm. "=f" is not allowed: the
650 operand constraints must select a class with a single reg.
652 Also enforce rule #5: Output operands must start at the top of
653 the reg-stack: output operands may not "skip" a reg. */
655 memset (reg_used_as_output, 0, sizeof (reg_used_as_output));
656 for (i = 0; i < n_outputs; i++)
657 if (STACK_REG_P (recog_data.operand[i]))
659 if (reg_class_size[(int) recog_op_alt[i][alt].class] != 1)
661 error_for_asm (insn, "Output constraint %d must specify a single register", i);
665 reg_used_as_output[REGNO (recog_data.operand[i])] = 1;
669 /* Search for first non-popped reg. */
670 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
671 if (! reg_used_as_output[i])
674 /* If there are any other popped regs, that's an error. */
675 for (; i < LAST_STACK_REG + 1; i++)
676 if (reg_used_as_output[i])
679 if (i != LAST_STACK_REG + 1)
681 error_for_asm (insn, "Output regs must be grouped at top of stack");
685 /* Enforce rule #2: All implicitly popped input regs must be closer
686 to the top of the reg-stack than any input that is not implicitly
689 memset (implicitly_dies, 0, sizeof (implicitly_dies));
690 for (i = n_outputs; i < n_outputs + n_inputs; i++)
691 if (STACK_REG_P (recog_data.operand[i]))
693 /* An input reg is implicitly popped if it is tied to an
694 output, or if there is a CLOBBER for it. */
697 for (j = 0; j < n_clobbers; j++)
698 if (operands_match_p (clobber_reg[j], recog_data.operand[i]))
701 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0)
702 implicitly_dies[REGNO (recog_data.operand[i])] = 1;
705 /* Search for first non-popped reg. */
706 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
707 if (! implicitly_dies[i])
710 /* If there are any other popped regs, that's an error. */
711 for (; i < LAST_STACK_REG + 1; i++)
712 if (implicitly_dies[i])
715 if (i != LAST_STACK_REG + 1)
718 "Implicitly popped regs must be grouped at top of stack");
722 /* Enfore rule #3: If any input operand uses the "f" constraint, all
723 output constraints must use the "&" earlyclobber.
725 ??? Detect this more deterministically by having constrain_asm_operands
726 record any earlyclobber. */
728 for (i = n_outputs; i < n_outputs + n_inputs; i++)
729 if (recog_op_alt[i][alt].matches == -1)
733 for (j = 0; j < n_outputs; j++)
734 if (operands_match_p (recog_data.operand[j], recog_data.operand[i]))
737 "Output operand %d must use `&' constraint", j);
744 /* Avoid further trouble with this insn. */
745 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
752 /* Calculate the number of inputs and outputs in BODY, an
753 asm_operands. N_OPERANDS is the total number of operands, and
754 N_INPUTS and N_OUTPUTS are pointers to ints into which the results are
758 get_asm_operand_n_inputs (body)
761 if (GET_CODE (body) == SET && GET_CODE (SET_SRC (body)) == ASM_OPERANDS)
762 return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (body));
764 else if (GET_CODE (body) == ASM_OPERANDS)
765 return ASM_OPERANDS_INPUT_LENGTH (body);
767 else if (GET_CODE (body) == PARALLEL
768 && GET_CODE (XVECEXP (body, 0, 0)) == SET)
769 return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (XVECEXP (body, 0, 0)));
771 else if (GET_CODE (body) == PARALLEL
772 && GET_CODE (XVECEXP (body, 0, 0)) == ASM_OPERANDS)
773 return ASM_OPERANDS_INPUT_LENGTH (XVECEXP (body, 0, 0));
778 /* If current function returns its result in an fp stack register,
779 return the REG. Otherwise, return 0. */
787 /* If the value is supposed to be returned in memory, then clearly
788 it is not returned in a stack register. */
789 if (aggregate_value_p (DECL_RESULT (decl)))
792 result = DECL_RTL_IF_SET (DECL_RESULT (decl));
795 #ifdef FUNCTION_OUTGOING_VALUE
797 = FUNCTION_OUTGOING_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl);
799 result = FUNCTION_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl);
803 return result != 0 && STACK_REG_P (result) ? result : 0;
808 * This section deals with stack register substitution, and forms the second
812 /* Replace REG, which is a pointer to a stack reg RTX, with an RTX for
813 the desired hard REGNO. */
816 replace_reg (reg, regno)
820 if (regno < FIRST_STACK_REG || regno > LAST_STACK_REG
821 || ! STACK_REG_P (*reg))
824 switch (GET_MODE_CLASS (GET_MODE (*reg)))
828 case MODE_COMPLEX_FLOAT:;
831 *reg = FP_MODE_REG (regno, GET_MODE (*reg));
834 /* Remove a note of type NOTE, which must be found, for register
835 number REGNO from INSN. Remove only one such note. */
838 remove_regno_note (insn, note, regno)
843 register rtx *note_link, this;
845 note_link = ®_NOTES(insn);
846 for (this = *note_link; this; this = XEXP (this, 1))
847 if (REG_NOTE_KIND (this) == note
848 && REG_P (XEXP (this, 0)) && REGNO (XEXP (this, 0)) == regno)
850 *note_link = XEXP (this, 1);
854 note_link = &XEXP (this, 1);
859 /* Find the hard register number of virtual register REG in REGSTACK.
860 The hard register number is relative to the top of the stack. -1 is
861 returned if the register is not found. */
864 get_hard_regnum (regstack, reg)
870 if (! STACK_REG_P (reg))
873 for (i = regstack->top; i >= 0; i--)
874 if (regstack->reg[i] == REGNO (reg))
877 return i >= 0 ? (FIRST_STACK_REG + regstack->top - i) : -1;
880 /* Delete INSN from the RTL. Mark the insn, but don't remove it from
881 the chain of insns. Doing so could confuse block_begin and block_end
882 if this were the only insn in the block. */
885 delete_insn_for_stacker (insn)
888 PUT_CODE (insn, NOTE);
889 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
890 NOTE_SOURCE_FILE (insn) = 0;
893 /* Emit an insn to pop virtual register REG before or after INSN.
894 REGSTACK is the stack state after INSN and is updated to reflect this
895 pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn
896 is represented as a SET whose destination is the register to be popped
897 and source is the top of stack. A death note for the top of stack
898 cases the movdf pattern to pop. */
901 emit_pop_insn (insn, regstack, reg, where)
905 enum emit_where where;
907 rtx pop_insn, pop_rtx;
910 /* For complex types take care to pop both halves. These may survive in
911 CLOBBER and USE expressions. */
912 if (COMPLEX_MODE_P (GET_MODE (reg)))
914 rtx reg1 = FP_MODE_REG (REGNO (reg), DFmode);
915 rtx reg2 = FP_MODE_REG (REGNO (reg) + 1, DFmode);
918 if (get_hard_regnum (regstack, reg1) >= 0)
919 pop_insn = emit_pop_insn (insn, regstack, reg1, where);
920 if (get_hard_regnum (regstack, reg2) >= 0)
921 pop_insn = emit_pop_insn (insn, regstack, reg2, where);
927 hard_regno = get_hard_regnum (regstack, reg);
929 if (hard_regno < FIRST_STACK_REG)
932 pop_rtx = gen_rtx_SET (VOIDmode, FP_MODE_REG (hard_regno, DFmode),
933 FP_MODE_REG (FIRST_STACK_REG, DFmode));
935 if (where == EMIT_AFTER)
936 pop_insn = emit_block_insn_after (pop_rtx, insn, current_block);
938 pop_insn = emit_block_insn_before (pop_rtx, insn, current_block);
941 = gen_rtx_EXPR_LIST (REG_DEAD, FP_MODE_REG (FIRST_STACK_REG, DFmode),
942 REG_NOTES (pop_insn));
944 regstack->reg[regstack->top - (hard_regno - FIRST_STACK_REG)]
945 = regstack->reg[regstack->top];
947 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (reg));
952 /* Emit an insn before or after INSN to swap virtual register REG with
953 the top of stack. REGSTACK is the stack state before the swap, and
954 is updated to reflect the swap. A swap insn is represented as a
955 PARALLEL of two patterns: each pattern moves one reg to the other.
957 If REG is already at the top of the stack, no insn is emitted. */
960 emit_swap_insn (insn, regstack, reg)
967 int tmp, other_reg; /* swap regno temps */
968 rtx i1; /* the stack-reg insn prior to INSN */
969 rtx i1set = NULL_RTX; /* the SET rtx within I1 */
971 hard_regno = get_hard_regnum (regstack, reg);
973 if (hard_regno < FIRST_STACK_REG)
975 if (hard_regno == FIRST_STACK_REG)
978 other_reg = regstack->top - (hard_regno - FIRST_STACK_REG);
980 tmp = regstack->reg[other_reg];
981 regstack->reg[other_reg] = regstack->reg[regstack->top];
982 regstack->reg[regstack->top] = tmp;
984 /* Find the previous insn involving stack regs, but don't pass a
987 if (current_block && insn != current_block->head)
989 rtx tmp = PREV_INSN (insn);
990 rtx limit = PREV_INSN (current_block->head);
993 if (GET_CODE (tmp) == CODE_LABEL
994 || NOTE_INSN_BASIC_BLOCK_P (tmp)
995 || (GET_CODE (tmp) == INSN
996 && stack_regs_mentioned (tmp)))
1001 tmp = PREV_INSN (tmp);
1006 && (i1set = single_set (i1)) != NULL_RTX)
1008 rtx i1src = *get_true_reg (&SET_SRC (i1set));
1009 rtx i1dest = *get_true_reg (&SET_DEST (i1set));
1011 /* If the previous register stack push was from the reg we are to
1012 swap with, omit the swap. */
1014 if (GET_CODE (i1dest) == REG && REGNO (i1dest) == FIRST_STACK_REG
1015 && GET_CODE (i1src) == REG && REGNO (i1src) == hard_regno - 1
1016 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
1019 /* If the previous insn wrote to the reg we are to swap with,
1022 if (GET_CODE (i1dest) == REG && REGNO (i1dest) == hard_regno
1023 && GET_CODE (i1src) == REG && REGNO (i1src) == FIRST_STACK_REG
1024 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
1028 swap_rtx = gen_swapxf (FP_MODE_REG (hard_regno, XFmode),
1029 FP_MODE_REG (FIRST_STACK_REG, XFmode));
1032 emit_block_insn_after (swap_rtx, i1, current_block);
1033 else if (current_block)
1034 emit_block_insn_before (swap_rtx, current_block->head, current_block);
1036 emit_insn_before (swap_rtx, insn);
1039 /* Handle a move to or from a stack register in PAT, which is in INSN.
1040 REGSTACK is the current stack. */
1043 move_for_stack_reg (insn, regstack, pat)
1048 rtx *psrc = get_true_reg (&SET_SRC (pat));
1049 rtx *pdest = get_true_reg (&SET_DEST (pat));
1053 src = *psrc; dest = *pdest;
1055 if (STACK_REG_P (src) && STACK_REG_P (dest))
1057 /* Write from one stack reg to another. If SRC dies here, then
1058 just change the register mapping and delete the insn. */
1060 note = find_regno_note (insn, REG_DEAD, REGNO (src));
1065 /* If this is a no-op move, there must not be a REG_DEAD note. */
1066 if (REGNO (src) == REGNO (dest))
1069 for (i = regstack->top; i >= 0; i--)
1070 if (regstack->reg[i] == REGNO (src))
1073 /* The source must be live, and the dest must be dead. */
1074 if (i < 0 || get_hard_regnum (regstack, dest) >= FIRST_STACK_REG)
1077 /* It is possible that the dest is unused after this insn.
1078 If so, just pop the src. */
1080 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
1082 emit_pop_insn (insn, regstack, src, EMIT_AFTER);
1084 delete_insn_for_stacker (insn);
1088 regstack->reg[i] = REGNO (dest);
1090 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1091 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
1093 delete_insn_for_stacker (insn);
1098 /* The source reg does not die. */
1100 /* If this appears to be a no-op move, delete it, or else it
1101 will confuse the machine description output patterns. But if
1102 it is REG_UNUSED, we must pop the reg now, as per-insn processing
1103 for REG_UNUSED will not work for deleted insns. */
1105 if (REGNO (src) == REGNO (dest))
1107 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
1108 emit_pop_insn (insn, regstack, dest, EMIT_AFTER);
1110 delete_insn_for_stacker (insn);
1114 /* The destination ought to be dead */
1115 if (get_hard_regnum (regstack, dest) >= FIRST_STACK_REG)
1118 replace_reg (psrc, get_hard_regnum (regstack, src));
1120 regstack->reg[++regstack->top] = REGNO (dest);
1121 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1122 replace_reg (pdest, FIRST_STACK_REG);
1124 else if (STACK_REG_P (src))
1126 /* Save from a stack reg to MEM, or possibly integer reg. Since
1127 only top of stack may be saved, emit an exchange first if
1130 emit_swap_insn (insn, regstack, src);
1132 note = find_regno_note (insn, REG_DEAD, REGNO (src));
1135 replace_reg (&XEXP (note, 0), FIRST_STACK_REG);
1137 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
1139 else if ((GET_MODE (src) == XFmode || GET_MODE (src) == TFmode)
1140 && regstack->top < REG_STACK_SIZE - 1)
1142 /* A 387 cannot write an XFmode value to a MEM without
1143 clobbering the source reg. The output code can handle
1144 this by reading back the value from the MEM.
1145 But it is more efficient to use a temp register if one is
1146 available. Push the source value here if the register
1147 stack is not full, and then write the value to memory via
1149 rtx push_rtx, push_insn;
1150 rtx top_stack_reg = FP_MODE_REG (FIRST_STACK_REG, GET_MODE (src));
1152 if (GET_MODE (src) == TFmode)
1153 push_rtx = gen_movtf (top_stack_reg, top_stack_reg);
1155 push_rtx = gen_movxf (top_stack_reg, top_stack_reg);
1156 push_insn = emit_insn_before (push_rtx, insn);
1157 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_DEAD, top_stack_reg,
1161 replace_reg (psrc, FIRST_STACK_REG);
1163 else if (STACK_REG_P (dest))
1165 /* Load from MEM, or possibly integer REG or constant, into the
1166 stack regs. The actual target is always the top of the
1167 stack. The stack mapping is changed to reflect that DEST is
1168 now at top of stack. */
1170 /* The destination ought to be dead */
1171 if (get_hard_regnum (regstack, dest) >= FIRST_STACK_REG)
1174 if (regstack->top >= REG_STACK_SIZE)
1177 regstack->reg[++regstack->top] = REGNO (dest);
1178 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1179 replace_reg (pdest, FIRST_STACK_REG);
1185 /* Swap the condition on a branch, if there is one. Return true if we
1186 found a condition to swap. False if the condition was not used as
1190 swap_rtx_condition_1 (pat)
1193 register const char *fmt;
1194 register int i, r = 0;
1196 if (GET_RTX_CLASS (GET_CODE (pat)) == '<')
1198 PUT_CODE (pat, swap_condition (GET_CODE (pat)));
1203 fmt = GET_RTX_FORMAT (GET_CODE (pat));
1204 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
1210 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
1211 r |= swap_rtx_condition_1 (XVECEXP (pat, i, j));
1213 else if (fmt[i] == 'e')
1214 r |= swap_rtx_condition_1 (XEXP (pat, i));
1222 swap_rtx_condition (insn)
1225 rtx pat = PATTERN (insn);
1227 /* We're looking for a single set to cc0 or an HImode temporary. */
1229 if (GET_CODE (pat) == SET
1230 && GET_CODE (SET_DEST (pat)) == REG
1231 && REGNO (SET_DEST (pat)) == FLAGS_REG)
1233 insn = next_flags_user (insn);
1234 if (insn == NULL_RTX)
1236 pat = PATTERN (insn);
1239 /* See if this is, or ends in, a fnstsw, aka unspec 9. If so, we're
1240 not doing anything with the cc value right now. We may be able to
1241 search for one though. */
1243 if (GET_CODE (pat) == SET
1244 && GET_CODE (SET_SRC (pat)) == UNSPEC
1245 && XINT (SET_SRC (pat), 1) == 9)
1247 rtx dest = SET_DEST (pat);
1249 /* Search forward looking for the first use of this value.
1250 Stop at block boundaries. */
1251 while (insn != current_block->end)
1253 insn = NEXT_INSN (insn);
1254 if (INSN_P (insn) && reg_mentioned_p (dest, insn))
1256 if (GET_CODE (insn) == CALL_INSN)
1260 /* So we've found the insn using this value. If it is anything
1261 other than sahf, aka unspec 10, or the value does not die
1262 (meaning we'd have to search further), then we must give up. */
1263 pat = PATTERN (insn);
1264 if (GET_CODE (pat) != SET
1265 || GET_CODE (SET_SRC (pat)) != UNSPEC
1266 || XINT (SET_SRC (pat), 1) != 10
1267 || ! dead_or_set_p (insn, dest))
1270 /* Now we are prepared to handle this as a normal cc0 setter. */
1271 insn = next_flags_user (insn);
1272 if (insn == NULL_RTX)
1274 pat = PATTERN (insn);
1277 if (swap_rtx_condition_1 (pat))
1280 INSN_CODE (insn) = -1;
1281 if (recog_memoized (insn) == -1)
1283 /* In case the flags don't die here, recurse to try fix
1284 following user too. */
1285 else if (! dead_or_set_p (insn, ix86_flags_rtx))
1287 insn = next_flags_user (insn);
1288 if (!insn || !swap_rtx_condition (insn))
1293 swap_rtx_condition_1 (pat);
1301 /* Handle a comparison. Special care needs to be taken to avoid
1302 causing comparisons that a 387 cannot do correctly, such as EQ.
1304 Also, a pop insn may need to be emitted. The 387 does have an
1305 `fcompp' insn that can pop two regs, but it is sometimes too expensive
1306 to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to
1310 compare_for_stack_reg (insn, regstack, pat_src)
1316 rtx src1_note, src2_note;
1319 src1 = get_true_reg (&XEXP (pat_src, 0));
1320 src2 = get_true_reg (&XEXP (pat_src, 1));
1321 flags_user = next_flags_user (insn);
1323 /* ??? If fxch turns out to be cheaper than fstp, give priority to
1324 registers that die in this insn - move those to stack top first. */
1325 if ((! STACK_REG_P (*src1)
1326 || (STACK_REG_P (*src2)
1327 && get_hard_regnum (regstack, *src2) == FIRST_STACK_REG))
1328 && swap_rtx_condition (insn))
1331 temp = XEXP (pat_src, 0);
1332 XEXP (pat_src, 0) = XEXP (pat_src, 1);
1333 XEXP (pat_src, 1) = temp;
1335 src1 = get_true_reg (&XEXP (pat_src, 0));
1336 src2 = get_true_reg (&XEXP (pat_src, 1));
1338 INSN_CODE (insn) = -1;
1341 /* We will fix any death note later. */
1343 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1345 if (STACK_REG_P (*src2))
1346 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1348 src2_note = NULL_RTX;
1350 emit_swap_insn (insn, regstack, *src1);
1352 replace_reg (src1, FIRST_STACK_REG);
1354 if (STACK_REG_P (*src2))
1355 replace_reg (src2, get_hard_regnum (regstack, *src2));
1359 pop_stack (regstack, REGNO (XEXP (src1_note, 0)));
1360 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1363 /* If the second operand dies, handle that. But if the operands are
1364 the same stack register, don't bother, because only one death is
1365 needed, and it was just handled. */
1368 && ! (STACK_REG_P (*src1) && STACK_REG_P (*src2)
1369 && REGNO (*src1) == REGNO (*src2)))
1371 /* As a special case, two regs may die in this insn if src2 is
1372 next to top of stack and the top of stack also dies. Since
1373 we have already popped src1, "next to top of stack" is really
1374 at top (FIRST_STACK_REG) now. */
1376 if (get_hard_regnum (regstack, XEXP (src2_note, 0)) == FIRST_STACK_REG
1379 pop_stack (regstack, REGNO (XEXP (src2_note, 0)));
1380 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1);
1384 /* The 386 can only represent death of the first operand in
1385 the case handled above. In all other cases, emit a separate
1386 pop and remove the death note from here. */
1388 /* link_cc0_insns (insn); */
1390 remove_regno_note (insn, REG_DEAD, REGNO (XEXP (src2_note, 0)));
1392 emit_pop_insn (insn, regstack, XEXP (src2_note, 0),
1398 /* Substitute new registers in PAT, which is part of INSN. REGSTACK
1399 is the current register layout. */
1402 subst_stack_regs_pat (insn, regstack, pat)
1409 switch (GET_CODE (pat))
1412 /* Deaths in USE insns can happen in non optimizing compilation.
1413 Handle them by popping the dying register. */
1414 src = get_true_reg (&XEXP (pat, 0));
1415 if (STACK_REG_P (*src)
1416 && find_regno_note (insn, REG_DEAD, REGNO (*src)))
1418 emit_pop_insn (insn, regstack, *src, EMIT_AFTER);
1421 /* ??? Uninitialized USE should not happen. */
1422 else if (get_hard_regnum (regstack, *src) == -1)
1430 dest = get_true_reg (&XEXP (pat, 0));
1431 if (STACK_REG_P (*dest))
1433 note = find_reg_note (insn, REG_DEAD, *dest);
1435 if (pat != PATTERN (insn))
1437 /* The fix_truncdi_1 pattern wants to be able to allocate
1438 it's own scratch register. It does this by clobbering
1439 an fp reg so that it is assured of an empty reg-stack
1440 register. If the register is live, kill it now.
1441 Remove the DEAD/UNUSED note so we don't try to kill it
1445 emit_pop_insn (insn, regstack, *dest, EMIT_BEFORE);
1448 note = find_reg_note (insn, REG_UNUSED, *dest);
1452 remove_note (insn, note);
1453 replace_reg (dest, LAST_STACK_REG);
1457 /* A top-level clobber with no REG_DEAD, and no hard-regnum
1458 indicates an uninitialized value. Because reload removed
1459 all other clobbers, this must be due to a function
1460 returning without a value. Load up a NaN. */
1463 && get_hard_regnum (regstack, *dest) == -1)
1465 pat = gen_rtx_SET (VOIDmode,
1466 FP_MODE_REG (REGNO (*dest), SFmode),
1468 PATTERN (insn) = pat;
1469 move_for_stack_reg (insn, regstack, pat);
1471 if (! note && COMPLEX_MODE_P (GET_MODE (*dest))
1472 && get_hard_regnum (regstack, FP_MODE_REG (REGNO (*dest), DFmode)) == -1)
1474 pat = gen_rtx_SET (VOIDmode,
1475 FP_MODE_REG (REGNO (*dest) + 1, SFmode),
1477 PATTERN (insn) = pat;
1478 move_for_stack_reg (insn, regstack, pat);
1487 rtx *src1 = (rtx *) NULL_PTR, *src2;
1488 rtx src1_note, src2_note;
1491 dest = get_true_reg (&SET_DEST (pat));
1492 src = get_true_reg (&SET_SRC (pat));
1493 pat_src = SET_SRC (pat);
1495 /* See if this is a `movM' pattern, and handle elsewhere if so. */
1496 if (STACK_REG_P (*src)
1497 || (STACK_REG_P (*dest)
1498 && (GET_CODE (*src) == REG || GET_CODE (*src) == MEM
1499 || GET_CODE (*src) == CONST_DOUBLE)))
1501 move_for_stack_reg (insn, regstack, pat);
1505 switch (GET_CODE (pat_src))
1508 compare_for_stack_reg (insn, regstack, pat_src);
1514 for (count = HARD_REGNO_NREGS (REGNO (*dest), GET_MODE (*dest));
1517 regstack->reg[++regstack->top] = REGNO (*dest) + count;
1518 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest) + count);
1521 replace_reg (dest, FIRST_STACK_REG);
1525 /* This is a `tstM2' case. */
1526 if (*dest != cc0_rtx)
1532 case FLOAT_TRUNCATE:
1536 /* These insns only operate on the top of the stack. DEST might
1537 be cc0_rtx if we're processing a tstM pattern. Also, it's
1538 possible that the tstM case results in a REG_DEAD note on the
1542 src1 = get_true_reg (&XEXP (pat_src, 0));
1544 emit_swap_insn (insn, regstack, *src1);
1546 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1548 if (STACK_REG_P (*dest))
1549 replace_reg (dest, FIRST_STACK_REG);
1553 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1555 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
1558 replace_reg (src1, FIRST_STACK_REG);
1563 /* On i386, reversed forms of subM3 and divM3 exist for
1564 MODE_FLOAT, so the same code that works for addM3 and mulM3
1568 /* These insns can accept the top of stack as a destination
1569 from a stack reg or mem, or can use the top of stack as a
1570 source and some other stack register (possibly top of stack)
1571 as a destination. */
1573 src1 = get_true_reg (&XEXP (pat_src, 0));
1574 src2 = get_true_reg (&XEXP (pat_src, 1));
1576 /* We will fix any death note later. */
1578 if (STACK_REG_P (*src1))
1579 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1581 src1_note = NULL_RTX;
1582 if (STACK_REG_P (*src2))
1583 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1585 src2_note = NULL_RTX;
1587 /* If either operand is not a stack register, then the dest
1588 must be top of stack. */
1590 if (! STACK_REG_P (*src1) || ! STACK_REG_P (*src2))
1591 emit_swap_insn (insn, regstack, *dest);
1594 /* Both operands are REG. If neither operand is already
1595 at the top of stack, choose to make the one that is the dest
1596 the new top of stack. */
1598 int src1_hard_regnum, src2_hard_regnum;
1600 src1_hard_regnum = get_hard_regnum (regstack, *src1);
1601 src2_hard_regnum = get_hard_regnum (regstack, *src2);
1602 if (src1_hard_regnum == -1 || src2_hard_regnum == -1)
1605 if (src1_hard_regnum != FIRST_STACK_REG
1606 && src2_hard_regnum != FIRST_STACK_REG)
1607 emit_swap_insn (insn, regstack, *dest);
1610 if (STACK_REG_P (*src1))
1611 replace_reg (src1, get_hard_regnum (regstack, *src1));
1612 if (STACK_REG_P (*src2))
1613 replace_reg (src2, get_hard_regnum (regstack, *src2));
1617 rtx src1_reg = XEXP (src1_note, 0);
1619 /* If the register that dies is at the top of stack, then
1620 the destination is somewhere else - merely substitute it.
1621 But if the reg that dies is not at top of stack, then
1622 move the top of stack to the dead reg, as though we had
1623 done the insn and then a store-with-pop. */
1625 if (REGNO (src1_reg) == regstack->reg[regstack->top])
1627 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1628 replace_reg (dest, get_hard_regnum (regstack, *dest));
1632 int regno = get_hard_regnum (regstack, src1_reg);
1634 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1635 replace_reg (dest, regno);
1637 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
1638 = regstack->reg[regstack->top];
1641 CLEAR_HARD_REG_BIT (regstack->reg_set,
1642 REGNO (XEXP (src1_note, 0)));
1643 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1648 rtx src2_reg = XEXP (src2_note, 0);
1649 if (REGNO (src2_reg) == regstack->reg[regstack->top])
1651 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1652 replace_reg (dest, get_hard_regnum (regstack, *dest));
1656 int regno = get_hard_regnum (regstack, src2_reg);
1658 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1659 replace_reg (dest, regno);
1661 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
1662 = regstack->reg[regstack->top];
1665 CLEAR_HARD_REG_BIT (regstack->reg_set,
1666 REGNO (XEXP (src2_note, 0)));
1667 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG);
1672 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1673 replace_reg (dest, get_hard_regnum (regstack, *dest));
1676 /* Keep operand 1 maching with destination. */
1677 if (GET_RTX_CLASS (GET_CODE (pat_src)) == 'c'
1678 && REG_P (*src1) && REG_P (*src2)
1679 && REGNO (*src1) != REGNO (*dest))
1681 int tmp = REGNO (*src1);
1682 replace_reg (src1, REGNO (*src2));
1683 replace_reg (src2, tmp);
1688 switch (XINT (pat_src, 1))
1692 /* These insns only operate on the top of the stack. */
1694 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1696 emit_swap_insn (insn, regstack, *src1);
1698 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1700 if (STACK_REG_P (*dest))
1701 replace_reg (dest, FIRST_STACK_REG);
1705 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1707 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
1710 replace_reg (src1, FIRST_STACK_REG);
1714 /* (unspec [(unspec [(compare ..)] 9)] 10)
1715 Unspec 9 is fnstsw; unspec 10 is sahf. The combination
1716 matches the PPRO fcomi instruction. */
1718 pat_src = XVECEXP (pat_src, 0, 0);
1719 if (GET_CODE (pat_src) != UNSPEC
1720 || XINT (pat_src, 1) != 9)
1725 /* (unspec [(compare ..)] 9) */
1726 /* Combined fcomp+fnstsw generated for doing well with
1727 CSE. When optimizing this would have been broken
1730 pat_src = XVECEXP (pat_src, 0, 0);
1731 if (GET_CODE (pat_src) != COMPARE)
1734 compare_for_stack_reg (insn, regstack, pat_src);
1743 /* This insn requires the top of stack to be the destination. */
1745 /* If the comparison operator is an FP comparison operator,
1746 it is handled correctly by compare_for_stack_reg () who
1747 will move the destination to the top of stack. But if the
1748 comparison operator is not an FP comparison operator, we
1749 have to handle it here. */
1750 if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG
1751 && REGNO (*dest) != regstack->reg[regstack->top])
1752 emit_swap_insn (insn, regstack, *dest);
1754 src1 = get_true_reg (&XEXP (pat_src, 1));
1755 src2 = get_true_reg (&XEXP (pat_src, 2));
1757 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1758 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1765 src_note[1] = src1_note;
1766 src_note[2] = src2_note;
1768 if (STACK_REG_P (*src1))
1769 replace_reg (src1, get_hard_regnum (regstack, *src1));
1770 if (STACK_REG_P (*src2))
1771 replace_reg (src2, get_hard_regnum (regstack, *src2));
1773 for (i = 1; i <= 2; i++)
1776 int regno = REGNO (XEXP (src_note[i], 0));
1778 /* If the register that dies is not at the top of
1779 stack, then move the top of stack to the dead reg */
1780 if (regno != regstack->reg[regstack->top])
1782 remove_regno_note (insn, REG_DEAD, regno);
1783 emit_pop_insn (insn, regstack, XEXP (src_note[i], 0),
1788 CLEAR_HARD_REG_BIT (regstack->reg_set, regno);
1789 replace_reg (&XEXP (src_note[i], 0), FIRST_STACK_REG);
1795 /* Make dest the top of stack. Add dest to regstack if
1797 if (get_hard_regnum (regstack, *dest) < FIRST_STACK_REG)
1798 regstack->reg[++regstack->top] = REGNO (*dest);
1799 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1800 replace_reg (dest, FIRST_STACK_REG);
1814 /* Substitute hard regnums for any stack regs in INSN, which has
1815 N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info
1816 before the insn, and is updated with changes made here.
1818 There are several requirements and assumptions about the use of
1819 stack-like regs in asm statements. These rules are enforced by
1820 record_asm_stack_regs; see comments there for details. Any
1821 asm_operands left in the RTL at this point may be assume to meet the
1822 requirements, since record_asm_stack_regs removes any problem asm. */
1825 subst_asm_stack_regs (insn, regstack)
1829 rtx body = PATTERN (insn);
1832 rtx *note_reg; /* Array of note contents */
1833 rtx **note_loc; /* Address of REG field of each note */
1834 enum reg_note *note_kind; /* The type of each note */
1836 rtx *clobber_reg = 0;
1837 rtx **clobber_loc = 0;
1839 struct stack_def temp_stack;
1844 int n_inputs, n_outputs;
1846 if (! check_asm_stack_operands (insn))
1849 /* Find out what the constraints required. If no constraint
1850 alternative matches, that is a compiler bug: we should have caught
1851 such an insn in check_asm_stack_operands. */
1852 extract_insn (insn);
1853 constrain_operands (1);
1854 alt = which_alternative;
1856 preprocess_constraints ();
1858 n_inputs = get_asm_operand_n_inputs (body);
1859 n_outputs = recog_data.n_operands - n_inputs;
1864 /* Strip SUBREGs here to make the following code simpler. */
1865 for (i = 0; i < recog_data.n_operands; i++)
1866 if (GET_CODE (recog_data.operand[i]) == SUBREG
1867 && GET_CODE (SUBREG_REG (recog_data.operand[i])) == REG)
1869 recog_data.operand_loc[i] = & SUBREG_REG (recog_data.operand[i]);
1870 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
1873 /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */
1875 for (i = 0, note = REG_NOTES (insn); note; note = XEXP (note, 1))
1878 note_reg = (rtx *) alloca (i * sizeof (rtx));
1879 note_loc = (rtx **) alloca (i * sizeof (rtx *));
1880 note_kind = (enum reg_note *) alloca (i * sizeof (enum reg_note));
1883 for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
1885 rtx reg = XEXP (note, 0);
1886 rtx *loc = & XEXP (note, 0);
1888 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
1890 loc = & SUBREG_REG (reg);
1891 reg = SUBREG_REG (reg);
1894 if (STACK_REG_P (reg)
1895 && (REG_NOTE_KIND (note) == REG_DEAD
1896 || REG_NOTE_KIND (note) == REG_UNUSED))
1898 note_reg[n_notes] = reg;
1899 note_loc[n_notes] = loc;
1900 note_kind[n_notes] = REG_NOTE_KIND (note);
1905 /* Set up CLOBBER_REG and CLOBBER_LOC. */
1909 if (GET_CODE (body) == PARALLEL)
1911 clobber_reg = (rtx *) alloca (XVECLEN (body, 0) * sizeof (rtx));
1912 clobber_loc = (rtx **) alloca (XVECLEN (body, 0) * sizeof (rtx *));
1914 for (i = 0; i < XVECLEN (body, 0); i++)
1915 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
1917 rtx clobber = XVECEXP (body, 0, i);
1918 rtx reg = XEXP (clobber, 0);
1919 rtx *loc = & XEXP (clobber, 0);
1921 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
1923 loc = & SUBREG_REG (reg);
1924 reg = SUBREG_REG (reg);
1927 if (STACK_REG_P (reg))
1929 clobber_reg[n_clobbers] = reg;
1930 clobber_loc[n_clobbers] = loc;
1936 temp_stack = *regstack;
1938 /* Put the input regs into the desired place in TEMP_STACK. */
1940 for (i = n_outputs; i < n_outputs + n_inputs; i++)
1941 if (STACK_REG_P (recog_data.operand[i])
1942 && reg_class_subset_p (recog_op_alt[i][alt].class,
1944 && recog_op_alt[i][alt].class != FLOAT_REGS)
1946 /* If an operand needs to be in a particular reg in
1947 FLOAT_REGS, the constraint was either 't' or 'u'. Since
1948 these constraints are for single register classes, and
1949 reload guaranteed that operand[i] is already in that class,
1950 we can just use REGNO (recog_data.operand[i]) to know which
1951 actual reg this operand needs to be in. */
1953 int regno = get_hard_regnum (&temp_stack, recog_data.operand[i]);
1958 if (regno != REGNO (recog_data.operand[i]))
1960 /* recog_data.operand[i] is not in the right place. Find
1961 it and swap it with whatever is already in I's place.
1962 K is where recog_data.operand[i] is now. J is where it
1966 k = temp_stack.top - (regno - FIRST_STACK_REG);
1968 - (REGNO (recog_data.operand[i]) - FIRST_STACK_REG));
1970 temp = temp_stack.reg[k];
1971 temp_stack.reg[k] = temp_stack.reg[j];
1972 temp_stack.reg[j] = temp;
1976 /* Emit insns before INSN to make sure the reg-stack is in the right
1979 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
1981 /* Make the needed input register substitutions. Do death notes and
1982 clobbers too, because these are for inputs, not outputs. */
1984 for (i = n_outputs; i < n_outputs + n_inputs; i++)
1985 if (STACK_REG_P (recog_data.operand[i]))
1987 int regnum = get_hard_regnum (regstack, recog_data.operand[i]);
1992 replace_reg (recog_data.operand_loc[i], regnum);
1995 for (i = 0; i < n_notes; i++)
1996 if (note_kind[i] == REG_DEAD)
1998 int regnum = get_hard_regnum (regstack, note_reg[i]);
2003 replace_reg (note_loc[i], regnum);
2006 for (i = 0; i < n_clobbers; i++)
2008 /* It's OK for a CLOBBER to reference a reg that is not live.
2009 Don't try to replace it in that case. */
2010 int regnum = get_hard_regnum (regstack, clobber_reg[i]);
2014 /* Sigh - clobbers always have QImode. But replace_reg knows
2015 that these regs can't be MODE_INT and will abort. Just put
2016 the right reg there without calling replace_reg. */
2018 *clobber_loc[i] = FP_MODE_REG (regnum, DFmode);
2022 /* Now remove from REGSTACK any inputs that the asm implicitly popped. */
2024 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2025 if (STACK_REG_P (recog_data.operand[i]))
2027 /* An input reg is implicitly popped if it is tied to an
2028 output, or if there is a CLOBBER for it. */
2031 for (j = 0; j < n_clobbers; j++)
2032 if (operands_match_p (clobber_reg[j], recog_data.operand[i]))
2035 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0)
2037 /* recog_data.operand[i] might not be at the top of stack.
2038 But that's OK, because all we need to do is pop the
2039 right number of regs off of the top of the reg-stack.
2040 record_asm_stack_regs guaranteed that all implicitly
2041 popped regs were grouped at the top of the reg-stack. */
2043 CLEAR_HARD_REG_BIT (regstack->reg_set,
2044 regstack->reg[regstack->top]);
2049 /* Now add to REGSTACK any outputs that the asm implicitly pushed.
2050 Note that there isn't any need to substitute register numbers.
2051 ??? Explain why this is true. */
2053 for (i = LAST_STACK_REG; i >= FIRST_STACK_REG; i--)
2055 /* See if there is an output for this hard reg. */
2058 for (j = 0; j < n_outputs; j++)
2059 if (STACK_REG_P (recog_data.operand[j])
2060 && REGNO (recog_data.operand[j]) == i)
2062 regstack->reg[++regstack->top] = i;
2063 SET_HARD_REG_BIT (regstack->reg_set, i);
2068 /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD
2069 input that the asm didn't implicitly pop. If the asm didn't
2070 implicitly pop an input reg, that reg will still be live.
2072 Note that we can't use find_regno_note here: the register numbers
2073 in the death notes have already been substituted. */
2075 for (i = 0; i < n_outputs; i++)
2076 if (STACK_REG_P (recog_data.operand[i]))
2080 for (j = 0; j < n_notes; j++)
2081 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j])
2082 && note_kind[j] == REG_UNUSED)
2084 insn = emit_pop_insn (insn, regstack, recog_data.operand[i],
2090 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2091 if (STACK_REG_P (recog_data.operand[i]))
2095 for (j = 0; j < n_notes; j++)
2096 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j])
2097 && note_kind[j] == REG_DEAD
2098 && TEST_HARD_REG_BIT (regstack->reg_set,
2099 REGNO (recog_data.operand[i])))
2101 insn = emit_pop_insn (insn, regstack, recog_data.operand[i],
2108 /* Substitute stack hard reg numbers for stack virtual registers in
2109 INSN. Non-stack register numbers are not changed. REGSTACK is the
2110 current stack content. Insns may be emitted as needed to arrange the
2111 stack for the 387 based on the contents of the insn. */
2114 subst_stack_regs (insn, regstack)
2118 register rtx *note_link, note;
2121 if (GET_CODE (insn) == CALL_INSN)
2123 int top = regstack->top;
2125 /* If there are any floating point parameters to be passed in
2126 registers for this call, make sure they are in the right
2131 straighten_stack (PREV_INSN (insn), regstack);
2133 /* Now mark the arguments as dead after the call. */
2135 while (regstack->top >= 0)
2137 CLEAR_HARD_REG_BIT (regstack->reg_set, FIRST_STACK_REG + regstack->top);
2143 /* Do the actual substitution if any stack regs are mentioned.
2144 Since we only record whether entire insn mentions stack regs, and
2145 subst_stack_regs_pat only works for patterns that contain stack regs,
2146 we must check each pattern in a parallel here. A call_value_pop could
2149 if (stack_regs_mentioned (insn))
2151 int n_operands = asm_noperands (PATTERN (insn));
2152 if (n_operands >= 0)
2154 /* This insn is an `asm' with operands. Decode the operands,
2155 decide how many are inputs, and do register substitution.
2156 Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */
2158 subst_asm_stack_regs (insn, regstack);
2162 if (GET_CODE (PATTERN (insn)) == PARALLEL)
2163 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
2165 if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn), 0, i)))
2166 subst_stack_regs_pat (insn, regstack,
2167 XVECEXP (PATTERN (insn), 0, i));
2170 subst_stack_regs_pat (insn, regstack, PATTERN (insn));
2173 /* subst_stack_regs_pat may have deleted a no-op insn. If so, any
2174 REG_UNUSED will already have been dealt with, so just return. */
2176 if (GET_CODE (insn) == NOTE)
2179 /* If there is a REG_UNUSED note on a stack register on this insn,
2180 the indicated reg must be popped. The REG_UNUSED note is removed,
2181 since the form of the newly emitted pop insn references the reg,
2182 making it no longer `unset'. */
2184 note_link = ®_NOTES(insn);
2185 for (note = *note_link; note; note = XEXP (note, 1))
2186 if (REG_NOTE_KIND (note) == REG_UNUSED && STACK_REG_P (XEXP (note, 0)))
2188 *note_link = XEXP (note, 1);
2189 insn = emit_pop_insn (insn, regstack, XEXP (note, 0), EMIT_AFTER);
2192 note_link = &XEXP (note, 1);
2195 /* Change the organization of the stack so that it fits a new basic
2196 block. Some registers might have to be popped, but there can never be
2197 a register live in the new block that is not now live.
2199 Insert any needed insns before or after INSN, as indicated by
2200 WHERE. OLD is the original stack layout, and NEW is the desired
2201 form. OLD is updated to reflect the code emitted, ie, it will be
2202 the same as NEW upon return.
2204 This function will not preserve block_end[]. But that information
2205 is no longer needed once this has executed. */
2208 change_stack (insn, old, new, where)
2212 enum emit_where where;
2217 /* We will be inserting new insns "backwards". If we are to insert
2218 after INSN, find the next insn, and insert before it. */
2220 if (where == EMIT_AFTER)
2222 if (current_block && current_block->end == insn)
2224 insn = NEXT_INSN (insn);
2227 /* Pop any registers that are not needed in the new block. */
2229 for (reg = old->top; reg >= 0; reg--)
2230 if (! TEST_HARD_REG_BIT (new->reg_set, old->reg[reg]))
2231 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[reg], DFmode),
2236 /* If the new block has never been processed, then it can inherit
2237 the old stack order. */
2239 new->top = old->top;
2240 memcpy (new->reg, old->reg, sizeof (new->reg));
2244 /* This block has been entered before, and we must match the
2245 previously selected stack order. */
2247 /* By now, the only difference should be the order of the stack,
2248 not their depth or liveliness. */
2250 GO_IF_HARD_REG_EQUAL (old->reg_set, new->reg_set, win);
2253 if (old->top != new->top)
2256 /* If the stack is not empty (new->top != -1), loop here emitting
2257 swaps until the stack is correct.
2259 The worst case number of swaps emitted is N + 2, where N is the
2260 depth of the stack. In some cases, the reg at the top of
2261 stack may be correct, but swapped anyway in order to fix
2262 other regs. But since we never swap any other reg away from
2263 its correct slot, this algorithm will converge. */
2268 /* Swap the reg at top of stack into the position it is
2269 supposed to be in, until the correct top of stack appears. */
2271 while (old->reg[old->top] != new->reg[new->top])
2273 for (reg = new->top; reg >= 0; reg--)
2274 if (new->reg[reg] == old->reg[old->top])
2280 emit_swap_insn (insn, old,
2281 FP_MODE_REG (old->reg[reg], DFmode));
2284 /* See if any regs remain incorrect. If so, bring an
2285 incorrect reg to the top of stack, and let the while loop
2288 for (reg = new->top; reg >= 0; reg--)
2289 if (new->reg[reg] != old->reg[reg])
2291 emit_swap_insn (insn, old,
2292 FP_MODE_REG (old->reg[reg], DFmode));
2297 /* At this point there must be no differences. */
2299 for (reg = old->top; reg >= 0; reg--)
2300 if (old->reg[reg] != new->reg[reg])
2305 current_block->end = PREV_INSN (insn);
2308 /* Print stack configuration. */
2311 print_stack (file, s)
2319 fprintf (file, "uninitialized\n");
2320 else if (s->top == -1)
2321 fprintf (file, "empty\n");
2326 for (i = 0; i <= s->top; ++i)
2327 fprintf (file, "%d ", s->reg[i]);
2328 fputs ("]\n", file);
2332 /* This function was doing life analysis. We now let the regular live
2333 code do it's job, so we only need to check some extra invariants
2334 that reg-stack expects. Primary among these being that all registers
2335 are initialized before use.
2337 The function returns true when code was emitted to CFG edges and
2338 commit_edge_insertions needs to be called. */
2341 convert_regs_entry ()
2343 int inserted = 0, i;
2346 for (i = n_basic_blocks - 1; i >= 0; --i)
2348 basic_block block = BASIC_BLOCK (i);
2349 block_info bi = BLOCK_INFO (block);
2352 /* Set current register status at last instruction `uninitialized'. */
2353 bi->stack_in.top = -2;
2355 /* Copy live_at_end and live_at_start into temporaries. */
2356 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; reg++)
2358 if (REGNO_REG_SET_P (block->global_live_at_end, reg))
2359 SET_HARD_REG_BIT (bi->out_reg_set, reg);
2360 if (REGNO_REG_SET_P (block->global_live_at_start, reg))
2361 SET_HARD_REG_BIT (bi->stack_in.reg_set, reg);
2365 /* Load something into each stack register live at function entry.
2366 Such live registers can be caused by uninitialized variables or
2367 functions not returning values on all paths. In order to keep
2368 the push/pop code happy, and to not scrog the register stack, we
2369 must put something in these registers. Use a QNaN.
2371 Note that we are insertting converted code here. This code is
2372 never seen by the convert_regs pass. */
2374 for (e = ENTRY_BLOCK_PTR->succ; e ; e = e->succ_next)
2376 basic_block block = e->dest;
2377 block_info bi = BLOCK_INFO (block);
2380 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg)
2381 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg))
2385 bi->stack_in.reg[++top] = reg;
2387 init = gen_rtx_SET (VOIDmode,
2388 FP_MODE_REG (FIRST_STACK_REG, SFmode),
2390 insert_insn_on_edge (init, e);
2394 bi->stack_in.top = top;
2400 /* Construct the desired stack for function exit. This will either
2401 be `empty', or the function return value at top-of-stack. */
2404 convert_regs_exit ()
2406 int value_reg_low, value_reg_high;
2410 retvalue = stack_result (current_function_decl);
2411 value_reg_low = value_reg_high = -1;
2414 value_reg_low = REGNO (retvalue);
2415 value_reg_high = value_reg_low
2416 + HARD_REGNO_NREGS (value_reg_low, GET_MODE (retvalue)) - 1;
2419 output_stack = &BLOCK_INFO (EXIT_BLOCK_PTR)->stack_in;
2420 if (value_reg_low == -1)
2421 output_stack->top = -1;
2426 output_stack->top = value_reg_high - value_reg_low;
2427 for (reg = value_reg_low; reg <= value_reg_high; ++reg)
2429 output_stack->reg[reg - value_reg_low] = reg;
2430 SET_HARD_REG_BIT (output_stack->reg_set, reg);
2435 /* Convert stack register references in one block. */
2438 convert_regs_1 (file, block)
2442 struct stack_def regstack, tmpstack;
2443 block_info bi = BLOCK_INFO (block);
2448 current_block = block;
2452 fprintf (file, "\nBasic block %d\nInput stack: ", block->index);
2453 print_stack (file, &bi->stack_in);
2456 /* Process all insns in this block. Keep track of NEXT so that we
2457 don't process insns emitted while substituting in INSN. */
2459 regstack = bi->stack_in;
2463 next = NEXT_INSN (insn);
2465 /* Ensure we have not missed a block boundary. */
2468 if (insn == block->end)
2471 /* Don't bother processing unless there is a stack reg
2472 mentioned or if it's a CALL_INSN. */
2473 if (stack_regs_mentioned (insn)
2474 || GET_CODE (insn) == CALL_INSN)
2478 fprintf (file, " insn %d input stack: ",
2480 print_stack (file, ®stack);
2482 subst_stack_regs (insn, ®stack);
2489 fprintf (file, "Expected live registers [");
2490 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg)
2491 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg))
2492 fprintf (file, " %d", reg);
2493 fprintf (file, " ]\nOutput stack: ");
2494 print_stack (file, ®stack);
2498 if (GET_CODE (insn) == JUMP_INSN)
2499 insn = PREV_INSN (insn);
2501 /* If the function is declared to return a value, but it returns one
2502 in only some cases, some registers might come live here. Emit
2503 necessary moves for them. */
2505 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg)
2507 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg)
2508 && ! TEST_HARD_REG_BIT (regstack.reg_set, reg))
2514 fprintf (file, "Emitting insn initializing reg %d\n",
2518 set = gen_rtx_SET (VOIDmode, FP_MODE_REG (reg, SFmode),
2520 insn = emit_block_insn_after (set, insn, block);
2521 subst_stack_regs (insn, ®stack);
2525 /* Something failed if the stack lives don't match. */
2526 GO_IF_HARD_REG_EQUAL (regstack.reg_set, bi->out_reg_set, win);
2530 /* Adjust the stack of this block on exit to match the stack of the
2531 target block, or copy stack info into the stack of the successor
2532 of the successor hasn't been processed yet. */
2534 for (e = block->succ; e ; e = e->succ_next)
2536 basic_block target = e->dest;
2537 stack target_stack = &BLOCK_INFO (target)->stack_in;
2540 fprintf (file, "Edge to block %d: ", target->index);
2542 if (target_stack->top == -2)
2544 /* The target block hasn't had a stack order selected.
2545 We need merely ensure that no pops are needed. */
2546 for (reg = regstack.top; reg >= 0; --reg)
2547 if (! TEST_HARD_REG_BIT (target_stack->reg_set,
2554 fprintf (file, "new block; copying stack position\n");
2556 /* change_stack kills values in regstack. */
2557 tmpstack = regstack;
2559 change_stack (block->end, &tmpstack,
2560 target_stack, EMIT_AFTER);
2565 fprintf (file, "new block; pops needed\n");
2569 if (target_stack->top == regstack.top)
2571 for (reg = target_stack->top; reg >= 0; --reg)
2572 if (target_stack->reg[reg] != regstack.reg[reg])
2578 fprintf (file, "no changes needed\n");
2585 fprintf (file, "correcting stack to ");
2586 print_stack (file, target_stack);
2590 /* Care for non-call EH edges specially. The normal return path have
2591 values in registers. These will be popped en masse by the unwind
2593 if ((e->flags & (EDGE_EH | EDGE_ABNORMAL_CALL)) == EDGE_EH)
2594 target_stack->top = -1;
2596 /* Other calls may appear to have values live in st(0), but the
2597 abnormal return path will not have actually loaded the values. */
2598 else if (e->flags & EDGE_ABNORMAL_CALL)
2600 /* Assert that the lifetimes are as we expect -- one value
2601 live at st(0) on the end of the source block, and no
2602 values live at the beginning of the destination block. */
2605 CLEAR_HARD_REG_SET (tmp);
2606 GO_IF_HARD_REG_EQUAL (target_stack->reg_set, tmp, eh1);
2610 SET_HARD_REG_BIT (tmp, FIRST_STACK_REG);
2611 GO_IF_HARD_REG_EQUAL (regstack.reg_set, tmp, eh2);
2615 target_stack->top = -1;
2618 /* It is better to output directly to the end of the block
2619 instead of to the edge, because emit_swap can do minimal
2620 insn scheduling. We can do this when there is only one
2621 edge out, and it is not abnormal. */
2622 else if (block->succ->succ_next == NULL
2623 && ! (e->flags & EDGE_ABNORMAL))
2625 /* change_stack kills values in regstack. */
2626 tmpstack = regstack;
2628 change_stack (block->end, &tmpstack, target_stack,
2629 (GET_CODE (block->end) == JUMP_INSN
2630 ? EMIT_BEFORE : EMIT_AFTER));
2636 /* We don't support abnormal edges. Global takes care to
2637 avoid any live register across them, so we should never
2638 have to insert instructions on such edges. */
2639 if (e->flags & EDGE_ABNORMAL)
2642 current_block = NULL;
2645 /* ??? change_stack needs some point to emit insns after.
2646 Also needed to keep gen_sequence from returning a
2647 pattern as opposed to a sequence, which would lose
2649 after = emit_note (NULL, NOTE_INSN_DELETED);
2651 tmpstack = regstack;
2652 change_stack (after, &tmpstack, target_stack, EMIT_BEFORE);
2654 seq = gen_sequence ();
2657 insert_insn_on_edge (seq, e);
2659 current_block = block;
2666 /* Convert registers in all blocks reachable from BLOCK. */
2669 convert_regs_2 (file, block)
2673 basic_block *stack, *sp;
2676 stack = (basic_block *) xmalloc (sizeof (*stack) * n_basic_blocks);
2680 BLOCK_INFO (block)->done = 1;
2688 inserted |= convert_regs_1 (file, block);
2690 for (e = block->succ; e ; e = e->succ_next)
2691 if (! BLOCK_INFO (e->dest)->done)
2694 BLOCK_INFO (e->dest)->done = 1;
2697 while (sp != stack);
2702 /* Traverse all basic blocks in a function, converting the register
2703 references in each insn from the "flat" register file that gcc uses,
2704 to the stack-like registers the 387 uses. */
2713 /* Initialize uninitialized registers on function entry. */
2714 inserted = convert_regs_entry ();
2716 /* Construct the desired stack for function exit. */
2717 convert_regs_exit ();
2718 BLOCK_INFO (EXIT_BLOCK_PTR)->done = 1;
2720 /* ??? Future: process inner loops first, and give them arbitrary
2721 initial stacks which emit_swap_insn can modify. This ought to
2722 prevent double fxch that aften appears at the head of a loop. */
2724 /* Process all blocks reachable from all entry points. */
2725 for (e = ENTRY_BLOCK_PTR->succ; e ; e = e->succ_next)
2726 inserted |= convert_regs_2 (file, e->dest);
2728 /* ??? Process all unreachable blocks. Though there's no excuse
2729 for keeping these even when not optimizing. */
2730 for (i = 0; i < n_basic_blocks; ++i)
2732 basic_block b = BASIC_BLOCK (i);
2733 block_info bi = BLOCK_INFO (b);
2739 /* Create an arbitrary input stack. */
2740 bi->stack_in.top = -1;
2741 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg)
2742 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg))
2743 bi->stack_in.reg[++bi->stack_in.top] = reg;
2745 inserted |= convert_regs_2 (file, b);
2750 commit_edge_insertions ();
2757 #endif /* STACK_REGS */