1 /* Expand the basic unary and binary arithmetic operations, for GNU compiler.
2 Copyright (C) 1987, 88, 92-96, 1997 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
27 #include "insn-flags.h"
28 #include "insn-codes.h"
30 #include "insn-config.h"
35 /* Each optab contains info on how this target machine
36 can perform a particular operation
37 for all sizes and kinds of operands.
39 The operation to be performed is often specified
40 by passing one of these optabs as an argument.
42 See expr.h for documentation of these optabs. */
47 optab smul_highpart_optab;
48 optab umul_highpart_optab;
49 optab smul_widen_optab;
50 optab umul_widen_optab;
73 optab movstrict_optab;
84 optab ucmp_optab; /* Used only for libcalls for unsigned comparisons. */
89 /* Tables of patterns for extending one integer mode to another. */
90 enum insn_code extendtab[MAX_MACHINE_MODE][MAX_MACHINE_MODE][2];
92 /* Tables of patterns for converting between fixed and floating point. */
93 enum insn_code fixtab[NUM_MACHINE_MODES][NUM_MACHINE_MODES][2];
94 enum insn_code fixtrunctab[NUM_MACHINE_MODES][NUM_MACHINE_MODES][2];
95 enum insn_code floattab[NUM_MACHINE_MODES][NUM_MACHINE_MODES][2];
97 /* Contains the optab used for each rtx code. */
98 optab code_to_optab[NUM_RTX_CODE + 1];
100 /* SYMBOL_REF rtx's for the library functions that are called
101 implicitly and not via optabs. */
103 rtx extendsfdf2_libfunc;
104 rtx extendsfxf2_libfunc;
105 rtx extendsftf2_libfunc;
106 rtx extenddfxf2_libfunc;
107 rtx extenddftf2_libfunc;
109 rtx truncdfsf2_libfunc;
110 rtx truncxfsf2_libfunc;
111 rtx trunctfsf2_libfunc;
112 rtx truncxfdf2_libfunc;
113 rtx trunctfdf2_libfunc;
124 rtx sjpopnthrow_libfunc;
125 rtx terminate_libfunc;
164 rtx floatsisf_libfunc;
165 rtx floatdisf_libfunc;
166 rtx floattisf_libfunc;
168 rtx floatsidf_libfunc;
169 rtx floatdidf_libfunc;
170 rtx floattidf_libfunc;
172 rtx floatsixf_libfunc;
173 rtx floatdixf_libfunc;
174 rtx floattixf_libfunc;
176 rtx floatsitf_libfunc;
177 rtx floatditf_libfunc;
178 rtx floattitf_libfunc;
196 rtx fixunssfsi_libfunc;
197 rtx fixunssfdi_libfunc;
198 rtx fixunssfti_libfunc;
200 rtx fixunsdfsi_libfunc;
201 rtx fixunsdfdi_libfunc;
202 rtx fixunsdfti_libfunc;
204 rtx fixunsxfsi_libfunc;
205 rtx fixunsxfdi_libfunc;
206 rtx fixunsxfti_libfunc;
208 rtx fixunstfsi_libfunc;
209 rtx fixunstfdi_libfunc;
210 rtx fixunstfti_libfunc;
212 rtx chkr_check_addr_libfunc;
213 rtx chkr_set_right_libfunc;
214 rtx chkr_copy_bitmap_libfunc;
215 rtx chkr_check_exec_libfunc;
216 rtx chkr_check_str_libfunc;
218 /* Indexed by the rtx-code for a conditional (eg. EQ, LT,...)
219 gives the gen_function to make a branch to test that condition. */
221 rtxfun bcc_gen_fctn[NUM_RTX_CODE];
223 /* Indexed by the rtx-code for a conditional (eg. EQ, LT,...)
224 gives the insn code to make a store-condition insn
225 to test that condition. */
227 enum insn_code setcc_gen_code[NUM_RTX_CODE];
229 #ifdef HAVE_conditional_move
230 /* Indexed by the machine mode, gives the insn code to make a conditional
231 move insn. This is not indexed by the rtx-code like bcc_gen_fctn and
232 setcc_gen_code to cut down on the number of named patterns. Consider a day
233 when a lot more rtx codes are conditional (eg: for the ARM). */
235 enum insn_code movcc_gen_code[NUM_MACHINE_MODES];
238 static int add_equal_note PROTO((rtx, rtx, enum rtx_code, rtx, rtx));
239 static rtx widen_operand PROTO((rtx, enum machine_mode,
240 enum machine_mode, int, int));
241 static enum insn_code can_fix_p PROTO((enum machine_mode, enum machine_mode,
243 static enum insn_code can_float_p PROTO((enum machine_mode, enum machine_mode,
245 static rtx ftruncify PROTO((rtx));
246 static optab init_optab PROTO((enum rtx_code));
247 static void init_libfuncs PROTO((optab, int, int, char *, int));
248 static void init_integral_libfuncs PROTO((optab, char *, int));
249 static void init_floating_libfuncs PROTO((optab, char *, int));
250 static void init_complex_libfuncs PROTO((optab, char *, int));
252 /* Add a REG_EQUAL note to the last insn in SEQ. TARGET is being set to
253 the result of operation CODE applied to OP0 (and OP1 if it is a binary
256 If the last insn does not set TARGET, don't do anything, but return 1.
258 If a previous insn sets TARGET and TARGET is one of OP0 or OP1,
259 don't add the REG_EQUAL note but return 0. Our caller can then try
260 again, ensuring that TARGET is not one of the operands. */
263 add_equal_note (seq, target, code, op0, op1)
273 if ((GET_RTX_CLASS (code) != '1' && GET_RTX_CLASS (code) != '2'
274 && GET_RTX_CLASS (code) != 'c' && GET_RTX_CLASS (code) != '<')
275 || GET_CODE (seq) != SEQUENCE
276 || (set = single_set (XVECEXP (seq, 0, XVECLEN (seq, 0) - 1))) == 0
277 || GET_CODE (target) == ZERO_EXTRACT
278 || (! rtx_equal_p (SET_DEST (set), target)
279 /* For a STRICT_LOW_PART, the REG_NOTE applies to what is inside the
281 && (GET_CODE (SET_DEST (set)) != STRICT_LOW_PART
282 || ! rtx_equal_p (SUBREG_REG (XEXP (SET_DEST (set), 0)),
286 /* If TARGET is in OP0 or OP1, check if anything in SEQ sets TARGET
287 besides the last insn. */
288 if (reg_overlap_mentioned_p (target, op0)
289 || (op1 && reg_overlap_mentioned_p (target, op1)))
290 for (i = XVECLEN (seq, 0) - 2; i >= 0; i--)
291 if (reg_set_p (target, XVECEXP (seq, 0, i)))
294 if (GET_RTX_CLASS (code) == '1')
295 note = gen_rtx (code, GET_MODE (target), copy_rtx (op0));
297 note = gen_rtx (code, GET_MODE (target), copy_rtx (op0), copy_rtx (op1));
299 REG_NOTES (XVECEXP (seq, 0, XVECLEN (seq, 0) - 1))
300 = gen_rtx (EXPR_LIST, REG_EQUAL, note,
301 REG_NOTES (XVECEXP (seq, 0, XVECLEN (seq, 0) - 1)));
306 /* Widen OP to MODE and return the rtx for the widened operand. UNSIGNEDP
307 says whether OP is signed or unsigned. NO_EXTEND is nonzero if we need
308 not actually do a sign-extend or zero-extend, but can leave the
309 higher-order bits of the result rtx undefined, for example, in the case
310 of logical operations, but not right shifts. */
313 widen_operand (op, mode, oldmode, unsignedp, no_extend)
315 enum machine_mode mode, oldmode;
321 /* If we must extend do so. If OP is either a constant or a SUBREG
322 for a promoted object, also extend since it will be more efficient to
325 || GET_MODE (op) == VOIDmode
326 || (GET_CODE (op) == SUBREG && SUBREG_PROMOTED_VAR_P (op)))
327 return convert_modes (mode, oldmode, op, unsignedp);
329 /* If MODE is no wider than a single word, we return a paradoxical
331 if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD)
332 return gen_rtx (SUBREG, mode, force_reg (GET_MODE (op), op), 0);
334 /* Otherwise, get an object of MODE, clobber it, and set the low-order
337 result = gen_reg_rtx (mode);
338 emit_insn (gen_rtx (CLOBBER, VOIDmode, result));
339 emit_move_insn (gen_lowpart (GET_MODE (op), result), op);
343 /* Generate code to perform an operation specified by BINOPTAB
344 on operands OP0 and OP1, with result having machine-mode MODE.
346 UNSIGNEDP is for the case where we have to widen the operands
347 to perform the operation. It says to use zero-extension.
349 If TARGET is nonzero, the value
350 is generated there, if it is convenient to do so.
351 In all cases an rtx is returned for the locus of the value;
352 this may or may not be TARGET. */
355 expand_binop (mode, binoptab, op0, op1, target, unsignedp, methods)
356 enum machine_mode mode;
361 enum optab_methods methods;
363 enum optab_methods next_methods
364 = (methods == OPTAB_LIB || methods == OPTAB_LIB_WIDEN
365 ? OPTAB_WIDEN : methods);
366 enum mode_class class;
367 enum machine_mode wider_mode;
369 int commutative_op = 0;
370 int shift_op = (binoptab->code == ASHIFT
371 || binoptab->code == ASHIFTRT
372 || binoptab->code == LSHIFTRT
373 || binoptab->code == ROTATE
374 || binoptab->code == ROTATERT);
375 rtx entry_last = get_last_insn ();
378 class = GET_MODE_CLASS (mode);
380 op0 = protect_from_queue (op0, 0);
381 op1 = protect_from_queue (op1, 0);
383 target = protect_from_queue (target, 1);
387 op0 = force_not_mem (op0);
388 op1 = force_not_mem (op1);
391 /* If subtracting an integer constant, convert this into an addition of
392 the negated constant. */
394 if (binoptab == sub_optab && GET_CODE (op1) == CONST_INT)
396 op1 = negate_rtx (mode, op1);
397 binoptab = add_optab;
400 /* If we are inside an appropriately-short loop and one operand is an
401 expensive constant, force it into a register. */
402 if (CONSTANT_P (op0) && preserve_subexpressions_p ()
403 && rtx_cost (op0, binoptab->code) > 2)
404 op0 = force_reg (mode, op0);
406 if (CONSTANT_P (op1) && preserve_subexpressions_p ()
407 && ! shift_op && rtx_cost (op1, binoptab->code) > 2)
408 op1 = force_reg (mode, op1);
410 /* Record where to delete back to if we backtrack. */
411 last = get_last_insn ();
413 /* If operation is commutative,
414 try to make the first operand a register.
415 Even better, try to make it the same as the target.
416 Also try to make the last operand a constant. */
417 if (GET_RTX_CLASS (binoptab->code) == 'c'
418 || binoptab == smul_widen_optab
419 || binoptab == umul_widen_optab
420 || binoptab == smul_highpart_optab
421 || binoptab == umul_highpart_optab)
425 if (((target == 0 || GET_CODE (target) == REG)
426 ? ((GET_CODE (op1) == REG
427 && GET_CODE (op0) != REG)
429 : rtx_equal_p (op1, target))
430 || GET_CODE (op0) == CONST_INT)
438 /* If we can do it with a three-operand insn, do so. */
440 if (methods != OPTAB_MUST_WIDEN
441 && binoptab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
443 int icode = (int) binoptab->handlers[(int) mode].insn_code;
444 enum machine_mode mode0 = insn_operand_mode[icode][1];
445 enum machine_mode mode1 = insn_operand_mode[icode][2];
447 rtx xop0 = op0, xop1 = op1;
452 temp = gen_reg_rtx (mode);
454 /* If it is a commutative operator and the modes would match
455 if we would swap the operands, we can save the conversions. */
458 if (GET_MODE (op0) != mode0 && GET_MODE (op1) != mode1
459 && GET_MODE (op0) == mode1 && GET_MODE (op1) == mode0)
463 tmp = op0; op0 = op1; op1 = tmp;
464 tmp = xop0; xop0 = xop1; xop1 = tmp;
468 /* In case the insn wants input operands in modes different from
469 the result, convert the operands. */
471 if (GET_MODE (op0) != VOIDmode
472 && GET_MODE (op0) != mode0
473 && mode0 != VOIDmode)
474 xop0 = convert_to_mode (mode0, xop0, unsignedp);
476 if (GET_MODE (xop1) != VOIDmode
477 && GET_MODE (xop1) != mode1
478 && mode1 != VOIDmode)
479 xop1 = convert_to_mode (mode1, xop1, unsignedp);
481 /* Now, if insn's predicates don't allow our operands, put them into
484 if (! (*insn_operand_predicate[icode][1]) (xop0, mode0)
485 && mode0 != VOIDmode)
486 xop0 = copy_to_mode_reg (mode0, xop0);
488 if (! (*insn_operand_predicate[icode][2]) (xop1, mode1)
489 && mode1 != VOIDmode)
490 xop1 = copy_to_mode_reg (mode1, xop1);
492 if (! (*insn_operand_predicate[icode][0]) (temp, mode))
493 temp = gen_reg_rtx (mode);
495 pat = GEN_FCN (icode) (temp, xop0, xop1);
498 /* If PAT is a multi-insn sequence, try to add an appropriate
499 REG_EQUAL note to it. If we can't because TEMP conflicts with an
500 operand, call ourselves again, this time without a target. */
501 if (GET_CODE (pat) == SEQUENCE
502 && ! add_equal_note (pat, temp, binoptab->code, xop0, xop1))
504 delete_insns_since (last);
505 return expand_binop (mode, binoptab, op0, op1, NULL_RTX,
513 delete_insns_since (last);
516 /* If this is a multiply, see if we can do a widening operation that
517 takes operands of this mode and makes a wider mode. */
519 if (binoptab == smul_optab && GET_MODE_WIDER_MODE (mode) != VOIDmode
520 && (((unsignedp ? umul_widen_optab : smul_widen_optab)
521 ->handlers[(int) GET_MODE_WIDER_MODE (mode)].insn_code)
522 != CODE_FOR_nothing))
524 temp = expand_binop (GET_MODE_WIDER_MODE (mode),
525 unsignedp ? umul_widen_optab : smul_widen_optab,
526 op0, op1, NULL_RTX, unsignedp, OPTAB_DIRECT);
530 if (GET_MODE_CLASS (mode) == MODE_INT)
531 return gen_lowpart (mode, temp);
533 return convert_to_mode (mode, temp, unsignedp);
537 /* Look for a wider mode of the same class for which we think we
538 can open-code the operation. Check for a widening multiply at the
539 wider mode as well. */
541 if ((class == MODE_INT || class == MODE_FLOAT || class == MODE_COMPLEX_FLOAT)
542 && methods != OPTAB_DIRECT && methods != OPTAB_LIB)
543 for (wider_mode = GET_MODE_WIDER_MODE (mode); wider_mode != VOIDmode;
544 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
546 if (binoptab->handlers[(int) wider_mode].insn_code != CODE_FOR_nothing
547 || (binoptab == smul_optab
548 && GET_MODE_WIDER_MODE (wider_mode) != VOIDmode
549 && (((unsignedp ? umul_widen_optab : smul_widen_optab)
550 ->handlers[(int) GET_MODE_WIDER_MODE (wider_mode)].insn_code)
551 != CODE_FOR_nothing)))
553 rtx xop0 = op0, xop1 = op1;
556 /* For certain integer operations, we need not actually extend
557 the narrow operands, as long as we will truncate
558 the results to the same narrowness. */
560 if ((binoptab == ior_optab || binoptab == and_optab
561 || binoptab == xor_optab
562 || binoptab == add_optab || binoptab == sub_optab
563 || binoptab == smul_optab || binoptab == ashl_optab)
564 && class == MODE_INT)
567 xop0 = widen_operand (xop0, wider_mode, mode, unsignedp, no_extend);
569 /* The second operand of a shift must always be extended. */
570 xop1 = widen_operand (xop1, wider_mode, mode, unsignedp,
571 no_extend && binoptab != ashl_optab);
573 temp = expand_binop (wider_mode, binoptab, xop0, xop1, NULL_RTX,
574 unsignedp, OPTAB_DIRECT);
577 if (class != MODE_INT)
580 target = gen_reg_rtx (mode);
581 convert_move (target, temp, 0);
585 return gen_lowpart (mode, temp);
588 delete_insns_since (last);
592 /* These can be done a word at a time. */
593 if ((binoptab == and_optab || binoptab == ior_optab || binoptab == xor_optab)
595 && GET_MODE_SIZE (mode) > UNITS_PER_WORD
596 && binoptab->handlers[(int) word_mode].insn_code != CODE_FOR_nothing)
602 /* If TARGET is the same as one of the operands, the REG_EQUAL note
603 won't be accurate, so use a new target. */
604 if (target == 0 || target == op0 || target == op1)
605 target = gen_reg_rtx (mode);
609 /* Do the actual arithmetic. */
610 for (i = 0; i < GET_MODE_BITSIZE (mode) / BITS_PER_WORD; i++)
612 rtx target_piece = operand_subword (target, i, 1, mode);
613 rtx x = expand_binop (word_mode, binoptab,
614 operand_subword_force (op0, i, mode),
615 operand_subword_force (op1, i, mode),
616 target_piece, unsignedp, next_methods);
621 if (target_piece != x)
622 emit_move_insn (target_piece, x);
625 insns = get_insns ();
628 if (i == GET_MODE_BITSIZE (mode) / BITS_PER_WORD)
630 if (binoptab->code != UNKNOWN)
632 = gen_rtx (binoptab->code, mode, copy_rtx (op0), copy_rtx (op1));
636 emit_no_conflict_block (insns, target, op0, op1, equiv_value);
641 /* Synthesize double word shifts from single word shifts. */
642 if ((binoptab == lshr_optab || binoptab == ashl_optab
643 || binoptab == ashr_optab)
645 && GET_CODE (op1) == CONST_INT
646 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
647 && binoptab->handlers[(int) word_mode].insn_code != CODE_FOR_nothing
648 && ashl_optab->handlers[(int) word_mode].insn_code != CODE_FOR_nothing
649 && lshr_optab->handlers[(int) word_mode].insn_code != CODE_FOR_nothing)
651 rtx insns, inter, equiv_value;
652 rtx into_target, outof_target;
653 rtx into_input, outof_input;
654 int shift_count, left_shift, outof_word;
656 /* If TARGET is the same as one of the operands, the REG_EQUAL note
657 won't be accurate, so use a new target. */
658 if (target == 0 || target == op0 || target == op1)
659 target = gen_reg_rtx (mode);
663 shift_count = INTVAL (op1);
665 /* OUTOF_* is the word we are shifting bits away from, and
666 INTO_* is the word that we are shifting bits towards, thus
667 they differ depending on the direction of the shift and
670 left_shift = binoptab == ashl_optab;
671 outof_word = left_shift ^ ! WORDS_BIG_ENDIAN;
673 outof_target = operand_subword (target, outof_word, 1, mode);
674 into_target = operand_subword (target, 1 - outof_word, 1, mode);
676 outof_input = operand_subword_force (op0, outof_word, mode);
677 into_input = operand_subword_force (op0, 1 - outof_word, mode);
679 if (shift_count >= BITS_PER_WORD)
681 inter = expand_binop (word_mode, binoptab,
683 GEN_INT (shift_count - BITS_PER_WORD),
684 into_target, unsignedp, next_methods);
686 if (inter != 0 && inter != into_target)
687 emit_move_insn (into_target, inter);
689 /* For a signed right shift, we must fill the word we are shifting
690 out of with copies of the sign bit. Otherwise it is zeroed. */
691 if (inter != 0 && binoptab != ashr_optab)
692 inter = CONST0_RTX (word_mode);
694 inter = expand_binop (word_mode, binoptab,
696 GEN_INT (BITS_PER_WORD - 1),
697 outof_target, unsignedp, next_methods);
699 if (inter != 0 && inter != outof_target)
700 emit_move_insn (outof_target, inter);
705 optab reverse_unsigned_shift, unsigned_shift;
707 /* For a shift of less then BITS_PER_WORD, to compute the carry,
708 we must do a logical shift in the opposite direction of the
711 reverse_unsigned_shift = (left_shift ? lshr_optab : ashl_optab);
713 /* For a shift of less than BITS_PER_WORD, to compute the word
714 shifted towards, we need to unsigned shift the orig value of
717 unsigned_shift = (left_shift ? ashl_optab : lshr_optab);
719 carries = expand_binop (word_mode, reverse_unsigned_shift,
721 GEN_INT (BITS_PER_WORD - shift_count),
722 0, unsignedp, next_methods);
727 inter = expand_binop (word_mode, unsigned_shift, into_input,
728 op1, 0, unsignedp, next_methods);
731 inter = expand_binop (word_mode, ior_optab, carries, inter,
732 into_target, unsignedp, next_methods);
734 if (inter != 0 && inter != into_target)
735 emit_move_insn (into_target, inter);
738 inter = expand_binop (word_mode, binoptab, outof_input,
739 op1, outof_target, unsignedp, next_methods);
741 if (inter != 0 && inter != outof_target)
742 emit_move_insn (outof_target, inter);
745 insns = get_insns ();
750 if (binoptab->code != UNKNOWN)
751 equiv_value = gen_rtx (binoptab->code, mode, op0, op1);
755 emit_no_conflict_block (insns, target, op0, op1, equiv_value);
760 /* Synthesize double word rotates from single word shifts. */
761 if ((binoptab == rotl_optab || binoptab == rotr_optab)
763 && GET_CODE (op1) == CONST_INT
764 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
765 && ashl_optab->handlers[(int) word_mode].insn_code != CODE_FOR_nothing
766 && lshr_optab->handlers[(int) word_mode].insn_code != CODE_FOR_nothing)
768 rtx insns, equiv_value;
769 rtx into_target, outof_target;
770 rtx into_input, outof_input;
772 int shift_count, left_shift, outof_word;
774 /* If TARGET is the same as one of the operands, the REG_EQUAL note
775 won't be accurate, so use a new target. */
776 if (target == 0 || target == op0 || target == op1)
777 target = gen_reg_rtx (mode);
781 shift_count = INTVAL (op1);
783 /* OUTOF_* is the word we are shifting bits away from, and
784 INTO_* is the word that we are shifting bits towards, thus
785 they differ depending on the direction of the shift and
788 left_shift = (binoptab == rotl_optab);
789 outof_word = left_shift ^ ! WORDS_BIG_ENDIAN;
791 outof_target = operand_subword (target, outof_word, 1, mode);
792 into_target = operand_subword (target, 1 - outof_word, 1, mode);
794 outof_input = operand_subword_force (op0, outof_word, mode);
795 into_input = operand_subword_force (op0, 1 - outof_word, mode);
797 if (shift_count == BITS_PER_WORD)
799 /* This is just a word swap. */
800 emit_move_insn (outof_target, into_input);
801 emit_move_insn (into_target, outof_input);
806 rtx into_temp1, into_temp2, outof_temp1, outof_temp2;
807 rtx first_shift_count, second_shift_count;
808 optab reverse_unsigned_shift, unsigned_shift;
810 reverse_unsigned_shift = (left_shift ^ (shift_count < BITS_PER_WORD)
811 ? lshr_optab : ashl_optab);
813 unsigned_shift = (left_shift ^ (shift_count < BITS_PER_WORD)
814 ? ashl_optab : lshr_optab);
816 if (shift_count > BITS_PER_WORD)
818 first_shift_count = GEN_INT (shift_count - BITS_PER_WORD);
819 second_shift_count = GEN_INT (2*BITS_PER_WORD - shift_count);
823 first_shift_count = GEN_INT (BITS_PER_WORD - shift_count);
824 second_shift_count = GEN_INT (shift_count);
827 into_temp1 = expand_binop (word_mode, unsigned_shift,
828 outof_input, first_shift_count,
829 NULL_RTX, unsignedp, next_methods);
830 into_temp2 = expand_binop (word_mode, reverse_unsigned_shift,
831 into_input, second_shift_count,
832 into_target, unsignedp, next_methods);
834 if (into_temp1 != 0 && into_temp2 != 0)
835 inter = expand_binop (word_mode, ior_optab, into_temp1, into_temp2,
836 into_target, unsignedp, next_methods);
840 if (inter != 0 && inter != into_target)
841 emit_move_insn (into_target, inter);
843 outof_temp1 = expand_binop (word_mode, unsigned_shift,
844 into_input, first_shift_count,
845 NULL_RTX, unsignedp, next_methods);
846 outof_temp2 = expand_binop (word_mode, reverse_unsigned_shift,
847 outof_input, second_shift_count,
848 outof_target, unsignedp, next_methods);
850 if (inter != 0 && outof_temp1 != 0 && outof_temp2 != 0)
851 inter = expand_binop (word_mode, ior_optab,
852 outof_temp1, outof_temp2,
853 outof_target, unsignedp, next_methods);
855 if (inter != 0 && inter != outof_target)
856 emit_move_insn (outof_target, inter);
859 insns = get_insns ();
864 if (binoptab->code != UNKNOWN)
865 equiv_value = gen_rtx (binoptab->code, mode, op0, op1);
869 /* We can't make this a no conflict block if this is a word swap,
870 because the word swap case fails if the input and output values
871 are in the same register. */
872 if (shift_count != BITS_PER_WORD)
873 emit_no_conflict_block (insns, target, op0, op1, equiv_value);
882 /* These can be done a word at a time by propagating carries. */
883 if ((binoptab == add_optab || binoptab == sub_optab)
885 && GET_MODE_SIZE (mode) >= 2 * UNITS_PER_WORD
886 && binoptab->handlers[(int) word_mode].insn_code != CODE_FOR_nothing)
889 rtx carry_tmp = gen_reg_rtx (word_mode);
890 optab otheroptab = binoptab == add_optab ? sub_optab : add_optab;
891 int nwords = GET_MODE_BITSIZE (mode) / BITS_PER_WORD;
892 rtx carry_in, carry_out;
895 /* We can handle either a 1 or -1 value for the carry. If STORE_FLAG
896 value is one of those, use it. Otherwise, use 1 since it is the
897 one easiest to get. */
898 #if STORE_FLAG_VALUE == 1 || STORE_FLAG_VALUE == -1
899 int normalizep = STORE_FLAG_VALUE;
904 /* Prepare the operands. */
905 xop0 = force_reg (mode, op0);
906 xop1 = force_reg (mode, op1);
908 if (target == 0 || GET_CODE (target) != REG
909 || target == xop0 || target == xop1)
910 target = gen_reg_rtx (mode);
912 /* Indicate for flow that the entire target reg is being set. */
913 if (GET_CODE (target) == REG)
914 emit_insn (gen_rtx (CLOBBER, VOIDmode, target));
916 /* Do the actual arithmetic. */
917 for (i = 0; i < nwords; i++)
919 int index = (WORDS_BIG_ENDIAN ? nwords - i - 1 : i);
920 rtx target_piece = operand_subword (target, index, 1, mode);
921 rtx op0_piece = operand_subword_force (xop0, index, mode);
922 rtx op1_piece = operand_subword_force (xop1, index, mode);
925 /* Main add/subtract of the input operands. */
926 x = expand_binop (word_mode, binoptab,
927 op0_piece, op1_piece,
928 target_piece, unsignedp, next_methods);
934 /* Store carry from main add/subtract. */
935 carry_out = gen_reg_rtx (word_mode);
936 carry_out = emit_store_flag_force (carry_out,
937 (binoptab == add_optab
940 word_mode, 1, normalizep);
945 /* Add/subtract previous carry to main result. */
946 x = expand_binop (word_mode,
947 normalizep == 1 ? binoptab : otheroptab,
949 target_piece, 1, next_methods);
952 else if (target_piece != x)
953 emit_move_insn (target_piece, x);
957 /* THIS CODE HAS NOT BEEN TESTED. */
958 /* Get out carry from adding/subtracting carry in. */
959 carry_tmp = emit_store_flag_force (carry_tmp,
960 binoptab == add_optab
963 word_mode, 1, normalizep);
965 /* Logical-ior the two poss. carry together. */
966 carry_out = expand_binop (word_mode, ior_optab,
967 carry_out, carry_tmp,
968 carry_out, 0, next_methods);
974 carry_in = carry_out;
977 if (i == GET_MODE_BITSIZE (mode) / BITS_PER_WORD)
979 if (mov_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
981 rtx temp = emit_move_insn (target, target);
983 REG_NOTES (temp) = gen_rtx (EXPR_LIST, REG_EQUAL,
984 gen_rtx (binoptab->code, mode,
992 delete_insns_since (last);
995 /* If we want to multiply two two-word values and have normal and widening
996 multiplies of single-word values, we can do this with three smaller
997 multiplications. Note that we do not make a REG_NO_CONFLICT block here
998 because we are not operating on one word at a time.
1000 The multiplication proceeds as follows:
1001 _______________________
1002 [__op0_high_|__op0_low__]
1003 _______________________
1004 * [__op1_high_|__op1_low__]
1005 _______________________________________________
1006 _______________________
1007 (1) [__op0_low__*__op1_low__]
1008 _______________________
1009 (2a) [__op0_low__*__op1_high_]
1010 _______________________
1011 (2b) [__op0_high_*__op1_low__]
1012 _______________________
1013 (3) [__op0_high_*__op1_high_]
1016 This gives a 4-word result. Since we are only interested in the
1017 lower 2 words, partial result (3) and the upper words of (2a) and
1018 (2b) don't need to be calculated. Hence (2a) and (2b) can be
1019 calculated using non-widening multiplication.
1021 (1), however, needs to be calculated with an unsigned widening
1022 multiplication. If this operation is not directly supported we
1023 try using a signed widening multiplication and adjust the result.
1024 This adjustment works as follows:
1026 If both operands are positive then no adjustment is needed.
1028 If the operands have different signs, for example op0_low < 0 and
1029 op1_low >= 0, the instruction treats the most significant bit of
1030 op0_low as a sign bit instead of a bit with significance
1031 2**(BITS_PER_WORD-1), i.e. the instruction multiplies op1_low
1032 with 2**BITS_PER_WORD - op0_low, and two's complements the
1033 result. Conclusion: We need to add op1_low * 2**BITS_PER_WORD to
1036 Similarly, if both operands are negative, we need to add
1037 (op0_low + op1_low) * 2**BITS_PER_WORD.
1039 We use a trick to adjust quickly. We logically shift op0_low right
1040 (op1_low) BITS_PER_WORD-1 steps to get 0 or 1, and add this to
1041 op0_high (op1_high) before it is used to calculate 2b (2a). If no
1042 logical shift exists, we do an arithmetic right shift and subtract
1045 if (binoptab == smul_optab
1046 && class == MODE_INT
1047 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
1048 && smul_optab->handlers[(int) word_mode].insn_code != CODE_FOR_nothing
1049 && add_optab->handlers[(int) word_mode].insn_code != CODE_FOR_nothing
1050 && ((umul_widen_optab->handlers[(int) mode].insn_code
1051 != CODE_FOR_nothing)
1052 || (smul_widen_optab->handlers[(int) mode].insn_code
1053 != CODE_FOR_nothing)))
1055 int low = (WORDS_BIG_ENDIAN ? 1 : 0);
1056 int high = (WORDS_BIG_ENDIAN ? 0 : 1);
1057 rtx op0_high = operand_subword_force (op0, high, mode);
1058 rtx op0_low = operand_subword_force (op0, low, mode);
1059 rtx op1_high = operand_subword_force (op1, high, mode);
1060 rtx op1_low = operand_subword_force (op1, low, mode);
1065 /* If the target is the same as one of the inputs, don't use it. This
1066 prevents problems with the REG_EQUAL note. */
1067 if (target == op0 || target == op1
1068 || (target != 0 && GET_CODE (target) != REG))
1071 /* Multiply the two lower words to get a double-word product.
1072 If unsigned widening multiplication is available, use that;
1073 otherwise use the signed form and compensate. */
1075 if (umul_widen_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
1077 product = expand_binop (mode, umul_widen_optab, op0_low, op1_low,
1078 target, 1, OPTAB_DIRECT);
1080 /* If we didn't succeed, delete everything we did so far. */
1082 delete_insns_since (last);
1084 op0_xhigh = op0_high, op1_xhigh = op1_high;
1088 && smul_widen_optab->handlers[(int) mode].insn_code
1089 != CODE_FOR_nothing)
1091 rtx wordm1 = GEN_INT (BITS_PER_WORD - 1);
1092 product = expand_binop (mode, smul_widen_optab, op0_low, op1_low,
1093 target, 1, OPTAB_DIRECT);
1094 op0_xhigh = expand_binop (word_mode, lshr_optab, op0_low, wordm1,
1095 NULL_RTX, 1, next_methods);
1097 op0_xhigh = expand_binop (word_mode, add_optab, op0_high,
1098 op0_xhigh, op0_xhigh, 0, next_methods);
1101 op0_xhigh = expand_binop (word_mode, ashr_optab, op0_low, wordm1,
1102 NULL_RTX, 0, next_methods);
1104 op0_xhigh = expand_binop (word_mode, sub_optab, op0_high,
1105 op0_xhigh, op0_xhigh, 0,
1109 op1_xhigh = expand_binop (word_mode, lshr_optab, op1_low, wordm1,
1110 NULL_RTX, 1, next_methods);
1112 op1_xhigh = expand_binop (word_mode, add_optab, op1_high,
1113 op1_xhigh, op1_xhigh, 0, next_methods);
1116 op1_xhigh = expand_binop (word_mode, ashr_optab, op1_low, wordm1,
1117 NULL_RTX, 0, next_methods);
1119 op1_xhigh = expand_binop (word_mode, sub_optab, op1_high,
1120 op1_xhigh, op1_xhigh, 0,
1125 /* If we have been able to directly compute the product of the
1126 low-order words of the operands and perform any required adjustments
1127 of the operands, we proceed by trying two more multiplications
1128 and then computing the appropriate sum.
1130 We have checked above that the required addition is provided.
1131 Full-word addition will normally always succeed, especially if
1132 it is provided at all, so we don't worry about its failure. The
1133 multiplication may well fail, however, so we do handle that. */
1135 if (product && op0_xhigh && op1_xhigh)
1137 rtx product_high = operand_subword (product, high, 1, mode);
1138 rtx temp = expand_binop (word_mode, binoptab, op0_low, op1_xhigh,
1139 NULL_RTX, 0, OPTAB_DIRECT);
1142 temp = expand_binop (word_mode, add_optab, temp, product_high,
1143 product_high, 0, next_methods);
1145 if (temp != 0 && temp != product_high)
1146 emit_move_insn (product_high, temp);
1149 temp = expand_binop (word_mode, binoptab, op1_low, op0_xhigh,
1150 NULL_RTX, 0, OPTAB_DIRECT);
1153 temp = expand_binop (word_mode, add_optab, temp,
1154 product_high, product_high,
1157 if (temp != 0 && temp != product_high)
1158 emit_move_insn (product_high, temp);
1162 if (mov_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
1164 temp = emit_move_insn (product, product);
1165 REG_NOTES (temp) = gen_rtx (EXPR_LIST, REG_EQUAL,
1166 gen_rtx (MULT, mode,
1175 /* If we get here, we couldn't do it for some reason even though we
1176 originally thought we could. Delete anything we've emitted in
1179 delete_insns_since (last);
1182 /* We need to open-code the complex type operations: '+, -, * and /' */
1184 /* At this point we allow operations between two similar complex
1185 numbers, and also if one of the operands is not a complex number
1186 but rather of MODE_FLOAT or MODE_INT. However, the caller
1187 must make sure that the MODE of the non-complex operand matches
1188 the SUBMODE of the complex operand. */
1190 if (class == MODE_COMPLEX_FLOAT || class == MODE_COMPLEX_INT)
1192 rtx real0 = 0, imag0 = 0;
1193 rtx real1 = 0, imag1 = 0;
1194 rtx realr, imagr, res;
1199 /* Find the correct mode for the real and imaginary parts */
1200 enum machine_mode submode
1201 = mode_for_size (GET_MODE_UNIT_SIZE (mode) * BITS_PER_UNIT,
1202 class == MODE_COMPLEX_INT ? MODE_INT : MODE_FLOAT,
1205 if (submode == BLKmode)
1209 target = gen_reg_rtx (mode);
1213 realr = gen_realpart (submode, target);
1214 imagr = gen_imagpart (submode, target);
1216 if (GET_MODE (op0) == mode)
1218 real0 = gen_realpart (submode, op0);
1219 imag0 = gen_imagpart (submode, op0);
1224 if (GET_MODE (op1) == mode)
1226 real1 = gen_realpart (submode, op1);
1227 imag1 = gen_imagpart (submode, op1);
1232 if (real0 == 0 || real1 == 0 || ! (imag0 != 0|| imag1 != 0))
1235 switch (binoptab->code)
1238 /* (a+ib) + (c+id) = (a+c) + i(b+d) */
1240 /* (a+ib) - (c+id) = (a-c) + i(b-d) */
1241 res = expand_binop (submode, binoptab, real0, real1,
1242 realr, unsignedp, methods);
1246 else if (res != realr)
1247 emit_move_insn (realr, res);
1250 res = expand_binop (submode, binoptab, imag0, imag1,
1251 imagr, unsignedp, methods);
1254 else if (binoptab->code == MINUS)
1255 res = expand_unop (submode, neg_optab, imag1, imagr, unsignedp);
1261 else if (res != imagr)
1262 emit_move_insn (imagr, res);
1268 /* (a+ib) * (c+id) = (ac-bd) + i(ad+cb) */
1274 /* Don't fetch these from memory more than once. */
1275 real0 = force_reg (submode, real0);
1276 real1 = force_reg (submode, real1);
1277 imag0 = force_reg (submode, imag0);
1278 imag1 = force_reg (submode, imag1);
1280 temp1 = expand_binop (submode, binoptab, real0, real1, NULL_RTX,
1281 unsignedp, methods);
1283 temp2 = expand_binop (submode, binoptab, imag0, imag1, NULL_RTX,
1284 unsignedp, methods);
1286 if (temp1 == 0 || temp2 == 0)
1289 res = expand_binop (submode, sub_optab, temp1, temp2,
1290 realr, unsignedp, methods);
1294 else if (res != realr)
1295 emit_move_insn (realr, res);
1297 temp1 = expand_binop (submode, binoptab, real0, imag1,
1298 NULL_RTX, unsignedp, methods);
1300 temp2 = expand_binop (submode, binoptab, real1, imag0,
1301 NULL_RTX, unsignedp, methods);
1303 if (temp1 == 0 || temp2 == 0)
1306 res = expand_binop (submode, add_optab, temp1, temp2,
1307 imagr, unsignedp, methods);
1311 else if (res != imagr)
1312 emit_move_insn (imagr, res);
1318 /* Don't fetch these from memory more than once. */
1319 real0 = force_reg (submode, real0);
1320 real1 = force_reg (submode, real1);
1322 res = expand_binop (submode, binoptab, real0, real1,
1323 realr, unsignedp, methods);
1326 else if (res != realr)
1327 emit_move_insn (realr, res);
1330 res = expand_binop (submode, binoptab,
1331 real1, imag0, imagr, unsignedp, methods);
1333 res = expand_binop (submode, binoptab,
1334 real0, imag1, imagr, unsignedp, methods);
1338 else if (res != imagr)
1339 emit_move_insn (imagr, res);
1346 /* (a+ib) / (c+id) = ((ac+bd)/(cc+dd)) + i((bc-ad)/(cc+dd)) */
1350 /* (a+ib) / (c+i0) = (a/c) + i(b/c) */
1352 /* Don't fetch these from memory more than once. */
1353 real1 = force_reg (submode, real1);
1355 /* Simply divide the real and imaginary parts by `c' */
1356 if (class == MODE_COMPLEX_FLOAT)
1357 res = expand_binop (submode, binoptab, real0, real1,
1358 realr, unsignedp, methods);
1360 res = expand_divmod (0, TRUNC_DIV_EXPR, submode,
1361 real0, real1, realr, unsignedp);
1365 else if (res != realr)
1366 emit_move_insn (realr, res);
1368 if (class == MODE_COMPLEX_FLOAT)
1369 res = expand_binop (submode, binoptab, imag0, real1,
1370 imagr, unsignedp, methods);
1372 res = expand_divmod (0, TRUNC_DIV_EXPR, submode,
1373 imag0, real1, imagr, unsignedp);
1377 else if (res != imagr)
1378 emit_move_insn (imagr, res);
1384 /* Divisor is of complex type:
1391 /* Don't fetch these from memory more than once. */
1392 real0 = force_reg (submode, real0);
1393 real1 = force_reg (submode, real1);
1396 imag0 = force_reg (submode, imag0);
1398 imag1 = force_reg (submode, imag1);
1400 /* Divisor: c*c + d*d */
1401 temp1 = expand_binop (submode, smul_optab, real1, real1,
1402 NULL_RTX, unsignedp, methods);
1404 temp2 = expand_binop (submode, smul_optab, imag1, imag1,
1405 NULL_RTX, unsignedp, methods);
1407 if (temp1 == 0 || temp2 == 0)
1410 divisor = expand_binop (submode, add_optab, temp1, temp2,
1411 NULL_RTX, unsignedp, methods);
1417 /* ((a)(c-id))/divisor */
1418 /* (a+i0) / (c+id) = (ac/(cc+dd)) + i(-ad/(cc+dd)) */
1420 /* Calculate the dividend */
1421 real_t = expand_binop (submode, smul_optab, real0, real1,
1422 NULL_RTX, unsignedp, methods);
1424 imag_t = expand_binop (submode, smul_optab, real0, imag1,
1425 NULL_RTX, unsignedp, methods);
1427 if (real_t == 0 || imag_t == 0)
1430 imag_t = expand_unop (submode, neg_optab, imag_t,
1431 NULL_RTX, unsignedp);
1435 /* ((a+ib)(c-id))/divider */
1436 /* Calculate the dividend */
1437 temp1 = expand_binop (submode, smul_optab, real0, real1,
1438 NULL_RTX, unsignedp, methods);
1440 temp2 = expand_binop (submode, smul_optab, imag0, imag1,
1441 NULL_RTX, unsignedp, methods);
1443 if (temp1 == 0 || temp2 == 0)
1446 real_t = expand_binop (submode, add_optab, temp1, temp2,
1447 NULL_RTX, unsignedp, methods);
1449 temp1 = expand_binop (submode, smul_optab, imag0, real1,
1450 NULL_RTX, unsignedp, methods);
1452 temp2 = expand_binop (submode, smul_optab, real0, imag1,
1453 NULL_RTX, unsignedp, methods);
1455 if (temp1 == 0 || temp2 == 0)
1458 imag_t = expand_binop (submode, sub_optab, temp1, temp2,
1459 NULL_RTX, unsignedp, methods);
1461 if (real_t == 0 || imag_t == 0)
1465 if (class == MODE_COMPLEX_FLOAT)
1466 res = expand_binop (submode, binoptab, real_t, divisor,
1467 realr, unsignedp, methods);
1469 res = expand_divmod (0, TRUNC_DIV_EXPR, submode,
1470 real_t, divisor, realr, unsignedp);
1474 else if (res != realr)
1475 emit_move_insn (realr, res);
1477 if (class == MODE_COMPLEX_FLOAT)
1478 res = expand_binop (submode, binoptab, imag_t, divisor,
1479 imagr, unsignedp, methods);
1481 res = expand_divmod (0, TRUNC_DIV_EXPR, submode,
1482 imag_t, divisor, imagr, unsignedp);
1486 else if (res != imagr)
1487 emit_move_insn (imagr, res);
1502 if (binoptab->code != UNKNOWN)
1504 = gen_rtx (binoptab->code, mode, copy_rtx (op0), copy_rtx (op1));
1508 emit_no_conflict_block (seq, target, op0, op1, equiv_value);
1514 /* It can't be open-coded in this mode.
1515 Use a library call if one is available and caller says that's ok. */
1517 if (binoptab->handlers[(int) mode].libfunc
1518 && (methods == OPTAB_LIB || methods == OPTAB_LIB_WIDEN))
1521 rtx funexp = binoptab->handlers[(int) mode].libfunc;
1523 enum machine_mode op1_mode = mode;
1530 op1_mode = word_mode;
1531 /* Specify unsigned here,
1532 since negative shift counts are meaningless. */
1533 op1x = convert_to_mode (word_mode, op1, 1);
1536 if (GET_MODE (op0) != VOIDmode
1537 && GET_MODE (op0) != mode)
1538 op0 = convert_to_mode (mode, op0, unsignedp);
1540 /* Pass 1 for NO_QUEUE so we don't lose any increments
1541 if the libcall is cse'd or moved. */
1542 value = emit_library_call_value (binoptab->handlers[(int) mode].libfunc,
1543 NULL_RTX, 1, mode, 2,
1544 op0, mode, op1x, op1_mode);
1546 insns = get_insns ();
1549 target = gen_reg_rtx (mode);
1550 emit_libcall_block (insns, target, value,
1551 gen_rtx (binoptab->code, mode, op0, op1));
1556 delete_insns_since (last);
1558 /* It can't be done in this mode. Can we do it in a wider mode? */
1560 if (! (methods == OPTAB_WIDEN || methods == OPTAB_LIB_WIDEN
1561 || methods == OPTAB_MUST_WIDEN))
1563 /* Caller says, don't even try. */
1564 delete_insns_since (entry_last);
1568 /* Compute the value of METHODS to pass to recursive calls.
1569 Don't allow widening to be tried recursively. */
1571 methods = (methods == OPTAB_LIB_WIDEN ? OPTAB_LIB : OPTAB_DIRECT);
1573 /* Look for a wider mode of the same class for which it appears we can do
1576 if (class == MODE_INT || class == MODE_FLOAT || class == MODE_COMPLEX_FLOAT)
1578 for (wider_mode = GET_MODE_WIDER_MODE (mode); wider_mode != VOIDmode;
1579 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
1581 if ((binoptab->handlers[(int) wider_mode].insn_code
1582 != CODE_FOR_nothing)
1583 || (methods == OPTAB_LIB
1584 && binoptab->handlers[(int) wider_mode].libfunc))
1586 rtx xop0 = op0, xop1 = op1;
1589 /* For certain integer operations, we need not actually extend
1590 the narrow operands, as long as we will truncate
1591 the results to the same narrowness. */
1593 if ((binoptab == ior_optab || binoptab == and_optab
1594 || binoptab == xor_optab
1595 || binoptab == add_optab || binoptab == sub_optab
1596 || binoptab == smul_optab || binoptab == ashl_optab)
1597 && class == MODE_INT)
1600 xop0 = widen_operand (xop0, wider_mode, mode,
1601 unsignedp, no_extend);
1603 /* The second operand of a shift must always be extended. */
1604 xop1 = widen_operand (xop1, wider_mode, mode, unsignedp,
1605 no_extend && binoptab != ashl_optab);
1607 temp = expand_binop (wider_mode, binoptab, xop0, xop1, NULL_RTX,
1608 unsignedp, methods);
1611 if (class != MODE_INT)
1614 target = gen_reg_rtx (mode);
1615 convert_move (target, temp, 0);
1619 return gen_lowpart (mode, temp);
1622 delete_insns_since (last);
1627 delete_insns_since (entry_last);
1631 /* Expand a binary operator which has both signed and unsigned forms.
1632 UOPTAB is the optab for unsigned operations, and SOPTAB is for
1635 If we widen unsigned operands, we may use a signed wider operation instead
1636 of an unsigned wider operation, since the result would be the same. */
1639 sign_expand_binop (mode, uoptab, soptab, op0, op1, target, unsignedp, methods)
1640 enum machine_mode mode;
1641 optab uoptab, soptab;
1642 rtx op0, op1, target;
1644 enum optab_methods methods;
1647 optab direct_optab = unsignedp ? uoptab : soptab;
1648 struct optab wide_soptab;
1650 /* Do it without widening, if possible. */
1651 temp = expand_binop (mode, direct_optab, op0, op1, target,
1652 unsignedp, OPTAB_DIRECT);
1653 if (temp || methods == OPTAB_DIRECT)
1656 /* Try widening to a signed int. Make a fake signed optab that
1657 hides any signed insn for direct use. */
1658 wide_soptab = *soptab;
1659 wide_soptab.handlers[(int) mode].insn_code = CODE_FOR_nothing;
1660 wide_soptab.handlers[(int) mode].libfunc = 0;
1662 temp = expand_binop (mode, &wide_soptab, op0, op1, target,
1663 unsignedp, OPTAB_WIDEN);
1665 /* For unsigned operands, try widening to an unsigned int. */
1666 if (temp == 0 && unsignedp)
1667 temp = expand_binop (mode, uoptab, op0, op1, target,
1668 unsignedp, OPTAB_WIDEN);
1669 if (temp || methods == OPTAB_WIDEN)
1672 /* Use the right width lib call if that exists. */
1673 temp = expand_binop (mode, direct_optab, op0, op1, target, unsignedp, OPTAB_LIB);
1674 if (temp || methods == OPTAB_LIB)
1677 /* Must widen and use a lib call, use either signed or unsigned. */
1678 temp = expand_binop (mode, &wide_soptab, op0, op1, target,
1679 unsignedp, methods);
1683 return expand_binop (mode, uoptab, op0, op1, target,
1684 unsignedp, methods);
1688 /* Generate code to perform an operation specified by BINOPTAB
1689 on operands OP0 and OP1, with two results to TARG1 and TARG2.
1690 We assume that the order of the operands for the instruction
1691 is TARG0, OP0, OP1, TARG1, which would fit a pattern like
1692 [(set TARG0 (operate OP0 OP1)) (set TARG1 (operate ...))].
1694 Either TARG0 or TARG1 may be zero, but what that means is that
1695 that result is not actually wanted. We will generate it into
1696 a dummy pseudo-reg and discard it. They may not both be zero.
1698 Returns 1 if this operation can be performed; 0 if not. */
1701 expand_twoval_binop (binoptab, op0, op1, targ0, targ1, unsignedp)
1707 enum machine_mode mode = GET_MODE (targ0 ? targ0 : targ1);
1708 enum mode_class class;
1709 enum machine_mode wider_mode;
1710 rtx entry_last = get_last_insn ();
1713 class = GET_MODE_CLASS (mode);
1715 op0 = protect_from_queue (op0, 0);
1716 op1 = protect_from_queue (op1, 0);
1720 op0 = force_not_mem (op0);
1721 op1 = force_not_mem (op1);
1724 /* If we are inside an appropriately-short loop and one operand is an
1725 expensive constant, force it into a register. */
1726 if (CONSTANT_P (op0) && preserve_subexpressions_p ()
1727 && rtx_cost (op0, binoptab->code) > 2)
1728 op0 = force_reg (mode, op0);
1730 if (CONSTANT_P (op1) && preserve_subexpressions_p ()
1731 && rtx_cost (op1, binoptab->code) > 2)
1732 op1 = force_reg (mode, op1);
1735 targ0 = protect_from_queue (targ0, 1);
1737 targ0 = gen_reg_rtx (mode);
1739 targ1 = protect_from_queue (targ1, 1);
1741 targ1 = gen_reg_rtx (mode);
1743 /* Record where to go back to if we fail. */
1744 last = get_last_insn ();
1746 if (binoptab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
1748 int icode = (int) binoptab->handlers[(int) mode].insn_code;
1749 enum machine_mode mode0 = insn_operand_mode[icode][1];
1750 enum machine_mode mode1 = insn_operand_mode[icode][2];
1752 rtx xop0 = op0, xop1 = op1;
1754 /* In case this insn wants input operands in modes different from the
1755 result, convert the operands. */
1756 if (GET_MODE (op0) != VOIDmode && GET_MODE (op0) != mode0)
1757 xop0 = convert_to_mode (mode0, xop0, unsignedp);
1759 if (GET_MODE (op1) != VOIDmode && GET_MODE (op1) != mode1)
1760 xop1 = convert_to_mode (mode1, xop1, unsignedp);
1762 /* Now, if insn doesn't accept these operands, put them into pseudos. */
1763 if (! (*insn_operand_predicate[icode][1]) (xop0, mode0))
1764 xop0 = copy_to_mode_reg (mode0, xop0);
1766 if (! (*insn_operand_predicate[icode][2]) (xop1, mode1))
1767 xop1 = copy_to_mode_reg (mode1, xop1);
1769 /* We could handle this, but we should always be called with a pseudo
1770 for our targets and all insns should take them as outputs. */
1771 if (! (*insn_operand_predicate[icode][0]) (targ0, mode)
1772 || ! (*insn_operand_predicate[icode][3]) (targ1, mode))
1775 pat = GEN_FCN (icode) (targ0, xop0, xop1, targ1);
1782 delete_insns_since (last);
1785 /* It can't be done in this mode. Can we do it in a wider mode? */
1787 if (class == MODE_INT || class == MODE_FLOAT || class == MODE_COMPLEX_FLOAT)
1789 for (wider_mode = GET_MODE_WIDER_MODE (mode); wider_mode != VOIDmode;
1790 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
1792 if (binoptab->handlers[(int) wider_mode].insn_code
1793 != CODE_FOR_nothing)
1795 register rtx t0 = gen_reg_rtx (wider_mode);
1796 register rtx t1 = gen_reg_rtx (wider_mode);
1798 if (expand_twoval_binop (binoptab,
1799 convert_modes (wider_mode, mode, op0,
1801 convert_modes (wider_mode, mode, op1,
1805 convert_move (targ0, t0, unsignedp);
1806 convert_move (targ1, t1, unsignedp);
1810 delete_insns_since (last);
1815 delete_insns_since (entry_last);
1819 /* Generate code to perform an operation specified by UNOPTAB
1820 on operand OP0, with result having machine-mode MODE.
1822 UNSIGNEDP is for the case where we have to widen the operands
1823 to perform the operation. It says to use zero-extension.
1825 If TARGET is nonzero, the value
1826 is generated there, if it is convenient to do so.
1827 In all cases an rtx is returned for the locus of the value;
1828 this may or may not be TARGET. */
1831 expand_unop (mode, unoptab, op0, target, unsignedp)
1832 enum machine_mode mode;
1838 enum mode_class class;
1839 enum machine_mode wider_mode;
1841 rtx last = get_last_insn ();
1844 class = GET_MODE_CLASS (mode);
1846 op0 = protect_from_queue (op0, 0);
1850 op0 = force_not_mem (op0);
1854 target = protect_from_queue (target, 1);
1856 if (unoptab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
1858 int icode = (int) unoptab->handlers[(int) mode].insn_code;
1859 enum machine_mode mode0 = insn_operand_mode[icode][1];
1865 temp = gen_reg_rtx (mode);
1867 if (GET_MODE (xop0) != VOIDmode
1868 && GET_MODE (xop0) != mode0)
1869 xop0 = convert_to_mode (mode0, xop0, unsignedp);
1871 /* Now, if insn doesn't accept our operand, put it into a pseudo. */
1873 if (! (*insn_operand_predicate[icode][1]) (xop0, mode0))
1874 xop0 = copy_to_mode_reg (mode0, xop0);
1876 if (! (*insn_operand_predicate[icode][0]) (temp, mode))
1877 temp = gen_reg_rtx (mode);
1879 pat = GEN_FCN (icode) (temp, xop0);
1882 if (GET_CODE (pat) == SEQUENCE
1883 && ! add_equal_note (pat, temp, unoptab->code, xop0, NULL_RTX))
1885 delete_insns_since (last);
1886 return expand_unop (mode, unoptab, op0, NULL_RTX, unsignedp);
1894 delete_insns_since (last);
1897 /* It can't be done in this mode. Can we open-code it in a wider mode? */
1899 if (class == MODE_INT || class == MODE_FLOAT || class == MODE_COMPLEX_FLOAT)
1900 for (wider_mode = GET_MODE_WIDER_MODE (mode); wider_mode != VOIDmode;
1901 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
1903 if (unoptab->handlers[(int) wider_mode].insn_code != CODE_FOR_nothing)
1907 /* For certain operations, we need not actually extend
1908 the narrow operand, as long as we will truncate the
1909 results to the same narrowness. */
1911 xop0 = widen_operand (xop0, wider_mode, mode, unsignedp,
1912 (unoptab == neg_optab
1913 || unoptab == one_cmpl_optab)
1914 && class == MODE_INT);
1916 temp = expand_unop (wider_mode, unoptab, xop0, NULL_RTX,
1921 if (class != MODE_INT)
1924 target = gen_reg_rtx (mode);
1925 convert_move (target, temp, 0);
1929 return gen_lowpart (mode, temp);
1932 delete_insns_since (last);
1936 /* These can be done a word at a time. */
1937 if (unoptab == one_cmpl_optab
1938 && class == MODE_INT
1939 && GET_MODE_SIZE (mode) > UNITS_PER_WORD
1940 && unoptab->handlers[(int) word_mode].insn_code != CODE_FOR_nothing)
1945 if (target == 0 || target == op0)
1946 target = gen_reg_rtx (mode);
1950 /* Do the actual arithmetic. */
1951 for (i = 0; i < GET_MODE_BITSIZE (mode) / BITS_PER_WORD; i++)
1953 rtx target_piece = operand_subword (target, i, 1, mode);
1954 rtx x = expand_unop (word_mode, unoptab,
1955 operand_subword_force (op0, i, mode),
1956 target_piece, unsignedp);
1957 if (target_piece != x)
1958 emit_move_insn (target_piece, x);
1961 insns = get_insns ();
1964 emit_no_conflict_block (insns, target, op0, NULL_RTX,
1965 gen_rtx (unoptab->code, mode, copy_rtx (op0)));
1969 /* Open-code the complex negation operation. */
1970 else if (unoptab == neg_optab
1971 && (class == MODE_COMPLEX_FLOAT || class == MODE_COMPLEX_INT))
1977 /* Find the correct mode for the real and imaginary parts */
1978 enum machine_mode submode
1979 = mode_for_size (GET_MODE_UNIT_SIZE (mode) * BITS_PER_UNIT,
1980 class == MODE_COMPLEX_INT ? MODE_INT : MODE_FLOAT,
1983 if (submode == BLKmode)
1987 target = gen_reg_rtx (mode);
1991 target_piece = gen_imagpart (submode, target);
1992 x = expand_unop (submode, unoptab,
1993 gen_imagpart (submode, op0),
1994 target_piece, unsignedp);
1995 if (target_piece != x)
1996 emit_move_insn (target_piece, x);
1998 target_piece = gen_realpart (submode, target);
1999 x = expand_unop (submode, unoptab,
2000 gen_realpart (submode, op0),
2001 target_piece, unsignedp);
2002 if (target_piece != x)
2003 emit_move_insn (target_piece, x);
2008 emit_no_conflict_block (seq, target, op0, 0,
2009 gen_rtx (unoptab->code, mode, copy_rtx (op0)));
2013 /* Now try a library call in this mode. */
2014 if (unoptab->handlers[(int) mode].libfunc)
2017 rtx funexp = unoptab->handlers[(int) mode].libfunc;
2022 /* Pass 1 for NO_QUEUE so we don't lose any increments
2023 if the libcall is cse'd or moved. */
2024 value = emit_library_call_value (unoptab->handlers[(int) mode].libfunc,
2025 NULL_RTX, 1, mode, 1, op0, mode);
2026 insns = get_insns ();
2029 target = gen_reg_rtx (mode);
2030 emit_libcall_block (insns, target, value,
2031 gen_rtx (unoptab->code, mode, op0));
2036 /* It can't be done in this mode. Can we do it in a wider mode? */
2038 if (class == MODE_INT || class == MODE_FLOAT || class == MODE_COMPLEX_FLOAT)
2040 for (wider_mode = GET_MODE_WIDER_MODE (mode); wider_mode != VOIDmode;
2041 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
2043 if ((unoptab->handlers[(int) wider_mode].insn_code
2044 != CODE_FOR_nothing)
2045 || unoptab->handlers[(int) wider_mode].libfunc)
2049 /* For certain operations, we need not actually extend
2050 the narrow operand, as long as we will truncate the
2051 results to the same narrowness. */
2053 xop0 = widen_operand (xop0, wider_mode, mode, unsignedp,
2054 (unoptab == neg_optab
2055 || unoptab == one_cmpl_optab)
2056 && class == MODE_INT);
2058 temp = expand_unop (wider_mode, unoptab, xop0, NULL_RTX,
2063 if (class != MODE_INT)
2066 target = gen_reg_rtx (mode);
2067 convert_move (target, temp, 0);
2071 return gen_lowpart (mode, temp);
2074 delete_insns_since (last);
2079 /* If there is no negate operation, try doing a subtract from zero.
2080 The US Software GOFAST library needs this. */
2081 if (unoptab == neg_optab)
2084 temp = expand_binop (mode, sub_optab, CONST0_RTX (mode), op0,
2085 target, unsignedp, OPTAB_LIB_WIDEN);
2093 /* Emit code to compute the absolute value of OP0, with result to
2094 TARGET if convenient. (TARGET may be 0.) The return value says
2095 where the result actually is to be found.
2097 MODE is the mode of the operand; the mode of the result is
2098 different but can be deduced from MODE.
2100 UNSIGNEDP is relevant if extension is needed. */
2103 expand_abs (mode, op0, target, unsignedp, safe)
2104 enum machine_mode mode;
2112 /* First try to do it with a special abs instruction. */
2113 temp = expand_unop (mode, abs_optab, op0, target, 0);
2117 /* If this machine has expensive jumps, we can do integer absolute
2118 value of X as (((signed) x >> (W-1)) ^ x) - ((signed) x >> (W-1)),
2119 where W is the width of MODE. */
2121 if (GET_MODE_CLASS (mode) == MODE_INT && BRANCH_COST >= 2)
2123 rtx extended = expand_shift (RSHIFT_EXPR, mode, op0,
2124 size_int (GET_MODE_BITSIZE (mode) - 1),
2127 temp = expand_binop (mode, xor_optab, extended, op0, target, 0,
2130 temp = expand_binop (mode, sub_optab, temp, extended, target, 0,
2137 /* If that does not win, use conditional jump and negate. */
2139 /* It is safe to use the target if it is the same
2140 as the source if this is also a pseudo register */
2141 if (op0 == target && GET_CODE (op0) == REG
2142 && REGNO (op0) >= FIRST_PSEUDO_REGISTER)
2145 op1 = gen_label_rtx ();
2146 if (target == 0 || ! safe
2147 || GET_MODE (target) != mode
2148 || (GET_CODE (target) == MEM && MEM_VOLATILE_P (target))
2149 || (GET_CODE (target) == REG
2150 && REGNO (target) < FIRST_PSEUDO_REGISTER))
2151 target = gen_reg_rtx (mode);
2153 emit_move_insn (target, op0);
2156 /* If this mode is an integer too wide to compare properly,
2157 compare word by word. Rely on CSE to optimize constant cases. */
2158 if (GET_MODE_CLASS (mode) == MODE_INT && ! can_compare_p (mode))
2159 do_jump_by_parts_greater_rtx (mode, 0, target, const0_rtx,
2163 temp = compare_from_rtx (target, CONST0_RTX (mode), GE, 0, mode,
2165 if (temp == const1_rtx)
2167 else if (temp != const0_rtx)
2169 if (bcc_gen_fctn[(int) GET_CODE (temp)] != 0)
2170 emit_jump_insn ((*bcc_gen_fctn[(int) GET_CODE (temp)]) (op1));
2176 op0 = expand_unop (mode, neg_optab, target, target, 0);
2178 emit_move_insn (target, op0);
2184 /* Emit code to compute the absolute value of OP0, with result to
2185 TARGET if convenient. (TARGET may be 0.) The return value says
2186 where the result actually is to be found.
2188 MODE is the mode of the operand; the mode of the result is
2189 different but can be deduced from MODE.
2191 UNSIGNEDP is relevant for complex integer modes. */
2194 expand_complex_abs (mode, op0, target, unsignedp)
2195 enum machine_mode mode;
2200 enum mode_class class = GET_MODE_CLASS (mode);
2201 enum machine_mode wider_mode;
2203 rtx entry_last = get_last_insn ();
2207 /* Find the correct mode for the real and imaginary parts. */
2208 enum machine_mode submode
2209 = mode_for_size (GET_MODE_UNIT_SIZE (mode) * BITS_PER_UNIT,
2210 class == MODE_COMPLEX_INT ? MODE_INT : MODE_FLOAT,
2213 if (submode == BLKmode)
2216 op0 = protect_from_queue (op0, 0);
2220 op0 = force_not_mem (op0);
2223 last = get_last_insn ();
2226 target = protect_from_queue (target, 1);
2228 if (abs_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
2230 int icode = (int) abs_optab->handlers[(int) mode].insn_code;
2231 enum machine_mode mode0 = insn_operand_mode[icode][1];
2237 temp = gen_reg_rtx (submode);
2239 if (GET_MODE (xop0) != VOIDmode
2240 && GET_MODE (xop0) != mode0)
2241 xop0 = convert_to_mode (mode0, xop0, unsignedp);
2243 /* Now, if insn doesn't accept our operand, put it into a pseudo. */
2245 if (! (*insn_operand_predicate[icode][1]) (xop0, mode0))
2246 xop0 = copy_to_mode_reg (mode0, xop0);
2248 if (! (*insn_operand_predicate[icode][0]) (temp, submode))
2249 temp = gen_reg_rtx (submode);
2251 pat = GEN_FCN (icode) (temp, xop0);
2254 if (GET_CODE (pat) == SEQUENCE
2255 && ! add_equal_note (pat, temp, abs_optab->code, xop0, NULL_RTX))
2257 delete_insns_since (last);
2258 return expand_unop (mode, abs_optab, op0, NULL_RTX, unsignedp);
2266 delete_insns_since (last);
2269 /* It can't be done in this mode. Can we open-code it in a wider mode? */
2271 for (wider_mode = GET_MODE_WIDER_MODE (mode); wider_mode != VOIDmode;
2272 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
2274 if (abs_optab->handlers[(int) wider_mode].insn_code != CODE_FOR_nothing)
2278 xop0 = convert_modes (wider_mode, mode, xop0, unsignedp);
2279 temp = expand_complex_abs (wider_mode, xop0, NULL_RTX, unsignedp);
2283 if (class != MODE_COMPLEX_INT)
2286 target = gen_reg_rtx (submode);
2287 convert_move (target, temp, 0);
2291 return gen_lowpart (submode, temp);
2294 delete_insns_since (last);
2298 /* Open-code the complex absolute-value operation
2299 if we can open-code sqrt. Otherwise it's not worth while. */
2300 if (sqrt_optab->handlers[(int) submode].insn_code != CODE_FOR_nothing)
2302 rtx real, imag, total;
2304 real = gen_realpart (submode, op0);
2305 imag = gen_imagpart (submode, op0);
2307 /* Square both parts. */
2308 real = expand_mult (submode, real, real, NULL_RTX, 0);
2309 imag = expand_mult (submode, imag, imag, NULL_RTX, 0);
2311 /* Sum the parts. */
2312 total = expand_binop (submode, add_optab, real, imag, NULL_RTX,
2313 0, OPTAB_LIB_WIDEN);
2315 /* Get sqrt in TARGET. Set TARGET to where the result is. */
2316 target = expand_unop (submode, sqrt_optab, total, target, 0);
2318 delete_insns_since (last);
2323 /* Now try a library call in this mode. */
2324 if (abs_optab->handlers[(int) mode].libfunc)
2327 rtx funexp = abs_optab->handlers[(int) mode].libfunc;
2332 /* Pass 1 for NO_QUEUE so we don't lose any increments
2333 if the libcall is cse'd or moved. */
2334 value = emit_library_call_value (abs_optab->handlers[(int) mode].libfunc,
2335 NULL_RTX, 1, submode, 1, op0, mode);
2336 insns = get_insns ();
2339 target = gen_reg_rtx (submode);
2340 emit_libcall_block (insns, target, value,
2341 gen_rtx (abs_optab->code, mode, op0));
2346 /* It can't be done in this mode. Can we do it in a wider mode? */
2348 for (wider_mode = GET_MODE_WIDER_MODE (mode); wider_mode != VOIDmode;
2349 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
2351 if ((abs_optab->handlers[(int) wider_mode].insn_code
2352 != CODE_FOR_nothing)
2353 || abs_optab->handlers[(int) wider_mode].libfunc)
2357 xop0 = convert_modes (wider_mode, mode, xop0, unsignedp);
2359 temp = expand_complex_abs (wider_mode, xop0, NULL_RTX, unsignedp);
2363 if (class != MODE_COMPLEX_INT)
2366 target = gen_reg_rtx (submode);
2367 convert_move (target, temp, 0);
2371 return gen_lowpart (submode, temp);
2374 delete_insns_since (last);
2378 delete_insns_since (entry_last);
2382 /* Generate an instruction whose insn-code is INSN_CODE,
2383 with two operands: an output TARGET and an input OP0.
2384 TARGET *must* be nonzero, and the output is always stored there.
2385 CODE is an rtx code such that (CODE OP0) is an rtx that describes
2386 the value that is stored into TARGET. */
2389 emit_unop_insn (icode, target, op0, code)
2396 enum machine_mode mode0 = insn_operand_mode[icode][1];
2399 temp = target = protect_from_queue (target, 1);
2401 op0 = protect_from_queue (op0, 0);
2403 /* Sign and zero extension from memory is often done specially on
2404 RISC machines, so forcing into a register here can pessimize
2406 if (flag_force_mem && code != SIGN_EXTEND && code != ZERO_EXTEND)
2407 op0 = force_not_mem (op0);
2409 /* Now, if insn does not accept our operands, put them into pseudos. */
2411 if (! (*insn_operand_predicate[icode][1]) (op0, mode0))
2412 op0 = copy_to_mode_reg (mode0, op0);
2414 if (! (*insn_operand_predicate[icode][0]) (temp, GET_MODE (temp))
2415 || (flag_force_mem && GET_CODE (temp) == MEM))
2416 temp = gen_reg_rtx (GET_MODE (temp));
2418 pat = GEN_FCN (icode) (temp, op0);
2420 if (GET_CODE (pat) == SEQUENCE && code != UNKNOWN)
2421 add_equal_note (pat, temp, code, op0, NULL_RTX);
2426 emit_move_insn (target, temp);
2429 /* Emit code to perform a series of operations on a multi-word quantity, one
2432 Such a block is preceded by a CLOBBER of the output, consists of multiple
2433 insns, each setting one word of the output, and followed by a SET copying
2434 the output to itself.
2436 Each of the insns setting words of the output receives a REG_NO_CONFLICT
2437 note indicating that it doesn't conflict with the (also multi-word)
2438 inputs. The entire block is surrounded by REG_LIBCALL and REG_RETVAL
2441 INSNS is a block of code generated to perform the operation, not including
2442 the CLOBBER and final copy. All insns that compute intermediate values
2443 are first emitted, followed by the block as described above.
2445 TARGET, OP0, and OP1 are the output and inputs of the operations,
2446 respectively. OP1 may be zero for a unary operation.
2448 EQUIV, if non-zero, is an expression to be placed into a REG_EQUAL note
2451 If TARGET is not a register, INSNS is simply emitted with no special
2452 processing. Likewise if anything in INSNS is not an INSN or if
2453 there is a libcall block inside INSNS.
2455 The final insn emitted is returned. */
2458 emit_no_conflict_block (insns, target, op0, op1, equiv)
2464 rtx prev, next, first, last, insn;
2466 if (GET_CODE (target) != REG || reload_in_progress)
2467 return emit_insns (insns);
2469 for (insn = insns; insn; insn = NEXT_INSN (insn))
2470 if (GET_CODE (insn) != INSN
2471 || find_reg_note (insn, REG_LIBCALL, NULL_RTX))
2472 return emit_insns (insns);
2474 /* First emit all insns that do not store into words of the output and remove
2475 these from the list. */
2476 for (insn = insns; insn; insn = next)
2481 next = NEXT_INSN (insn);
2483 if (GET_CODE (PATTERN (insn)) == SET)
2484 set = PATTERN (insn);
2485 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
2487 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
2488 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET)
2490 set = XVECEXP (PATTERN (insn), 0, i);
2498 if (! reg_overlap_mentioned_p (target, SET_DEST (set)))
2500 if (PREV_INSN (insn))
2501 NEXT_INSN (PREV_INSN (insn)) = next;
2506 PREV_INSN (next) = PREV_INSN (insn);
2512 prev = get_last_insn ();
2514 /* Now write the CLOBBER of the output, followed by the setting of each
2515 of the words, followed by the final copy. */
2516 if (target != op0 && target != op1)
2517 emit_insn (gen_rtx (CLOBBER, VOIDmode, target));
2519 for (insn = insns; insn; insn = next)
2521 next = NEXT_INSN (insn);
2524 if (op1 && GET_CODE (op1) == REG)
2525 REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_NO_CONFLICT, op1,
2528 if (op0 && GET_CODE (op0) == REG)
2529 REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_NO_CONFLICT, op0,
2533 if (mov_optab->handlers[(int) GET_MODE (target)].insn_code
2534 != CODE_FOR_nothing)
2536 last = emit_move_insn (target, target);
2539 = gen_rtx (EXPR_LIST, REG_EQUAL, equiv, REG_NOTES (last));
2542 last = get_last_insn ();
2545 first = get_insns ();
2547 first = NEXT_INSN (prev);
2549 /* Encapsulate the block so it gets manipulated as a unit. */
2550 REG_NOTES (first) = gen_rtx (INSN_LIST, REG_LIBCALL, last,
2552 REG_NOTES (last) = gen_rtx (INSN_LIST, REG_RETVAL, first, REG_NOTES (last));
2557 /* Emit code to make a call to a constant function or a library call.
2559 INSNS is a list containing all insns emitted in the call.
2560 These insns leave the result in RESULT. Our block is to copy RESULT
2561 to TARGET, which is logically equivalent to EQUIV.
2563 We first emit any insns that set a pseudo on the assumption that these are
2564 loading constants into registers; doing so allows them to be safely cse'ed
2565 between blocks. Then we emit all the other insns in the block, followed by
2566 an insn to move RESULT to TARGET. This last insn will have a REQ_EQUAL
2567 note with an operand of EQUIV.
2569 Moving assignments to pseudos outside of the block is done to improve
2570 the generated code, but is not required to generate correct code,
2571 hence being unable to move an assignment is not grounds for not making
2572 a libcall block. There are two reasons why it is safe to leave these
2573 insns inside the block: First, we know that these pseudos cannot be
2574 used in generated RTL outside the block since they are created for
2575 temporary purposes within the block. Second, CSE will not record the
2576 values of anything set inside a libcall block, so we know they must
2577 be dead at the end of the block.
2579 Except for the first group of insns (the ones setting pseudos), the
2580 block is delimited by REG_RETVAL and REG_LIBCALL notes. */
2583 emit_libcall_block (insns, target, result, equiv)
2589 rtx prev, next, first, last, insn;
2591 /* First emit all insns that set pseudos. Remove them from the list as
2592 we go. Avoid insns that set pseudos which were referenced in previous
2593 insns. These can be generated by move_by_pieces, for example,
2594 to update an address. Similarly, avoid insns that reference things
2595 set in previous insns. */
2597 for (insn = insns; insn; insn = next)
2599 rtx set = single_set (insn);
2601 next = NEXT_INSN (insn);
2603 if (set != 0 && GET_CODE (SET_DEST (set)) == REG
2604 && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER
2606 || (! reg_mentioned_p (SET_DEST (set), PATTERN (insns))
2607 && ! reg_used_between_p (SET_DEST (set), insns, insn)
2608 && ! modified_in_p (SET_SRC (set), insns)
2609 && ! modified_between_p (SET_SRC (set), insns, insn))))
2611 if (PREV_INSN (insn))
2612 NEXT_INSN (PREV_INSN (insn)) = next;
2617 PREV_INSN (next) = PREV_INSN (insn);
2623 prev = get_last_insn ();
2625 /* Write the remaining insns followed by the final copy. */
2627 for (insn = insns; insn; insn = next)
2629 next = NEXT_INSN (insn);
2634 last = emit_move_insn (target, result);
2635 if (mov_optab->handlers[(int) GET_MODE (target)].insn_code
2636 != CODE_FOR_nothing)
2637 REG_NOTES (last) = gen_rtx (EXPR_LIST,
2638 REG_EQUAL, copy_rtx (equiv), REG_NOTES (last));
2641 first = get_insns ();
2643 first = NEXT_INSN (prev);
2645 /* Encapsulate the block so it gets manipulated as a unit. */
2646 REG_NOTES (first) = gen_rtx (INSN_LIST, REG_LIBCALL, last,
2648 REG_NOTES (last) = gen_rtx (INSN_LIST, REG_RETVAL, first, REG_NOTES (last));
2651 /* Generate code to store zero in X. */
2657 emit_move_insn (x, const0_rtx);
2660 /* Generate code to store 1 in X
2661 assuming it contains zero beforehand. */
2664 emit_0_to_1_insn (x)
2667 emit_move_insn (x, const1_rtx);
2670 /* Generate code to compare X with Y
2671 so that the condition codes are set.
2673 MODE is the mode of the inputs (in case they are const_int).
2674 UNSIGNEDP nonzero says that X and Y are unsigned;
2675 this matters if they need to be widened.
2677 If they have mode BLKmode, then SIZE specifies the size of both X and Y,
2678 and ALIGN specifies the known shared alignment of X and Y.
2680 COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.).
2681 It is ignored for fixed-point and block comparisons;
2682 it is used only for floating-point comparisons. */
2685 emit_cmp_insn (x, y, comparison, size, mode, unsignedp, align)
2687 enum rtx_code comparison;
2689 enum machine_mode mode;
2693 enum mode_class class;
2694 enum machine_mode wider_mode;
2696 class = GET_MODE_CLASS (mode);
2698 /* They could both be VOIDmode if both args are immediate constants,
2699 but we should fold that at an earlier stage.
2700 With no special code here, this will call abort,
2701 reminding the programmer to implement such folding. */
2703 if (mode != BLKmode && flag_force_mem)
2705 x = force_not_mem (x);
2706 y = force_not_mem (y);
2709 /* If we are inside an appropriately-short loop and one operand is an
2710 expensive constant, force it into a register. */
2711 if (CONSTANT_P (x) && preserve_subexpressions_p () && rtx_cost (x, COMPARE) > 2)
2712 x = force_reg (mode, x);
2714 if (CONSTANT_P (y) && preserve_subexpressions_p () && rtx_cost (y, COMPARE) > 2)
2715 y = force_reg (mode, y);
2717 /* Don't let both operands fail to indicate the mode. */
2718 if (GET_MODE (x) == VOIDmode && GET_MODE (y) == VOIDmode)
2719 x = force_reg (mode, x);
2721 /* Handle all BLKmode compares. */
2723 if (mode == BLKmode)
2726 x = protect_from_queue (x, 0);
2727 y = protect_from_queue (y, 0);
2731 #ifdef HAVE_cmpstrqi
2733 && GET_CODE (size) == CONST_INT
2734 && INTVAL (size) < (1 << GET_MODE_BITSIZE (QImode)))
2736 enum machine_mode result_mode
2737 = insn_operand_mode[(int) CODE_FOR_cmpstrqi][0];
2738 rtx result = gen_reg_rtx (result_mode);
2739 emit_insn (gen_cmpstrqi (result, x, y, size, GEN_INT (align)));
2740 emit_cmp_insn (result, const0_rtx, comparison, NULL_RTX,
2745 #ifdef HAVE_cmpstrhi
2747 && GET_CODE (size) == CONST_INT
2748 && INTVAL (size) < (1 << GET_MODE_BITSIZE (HImode)))
2750 enum machine_mode result_mode
2751 = insn_operand_mode[(int) CODE_FOR_cmpstrhi][0];
2752 rtx result = gen_reg_rtx (result_mode);
2753 emit_insn (gen_cmpstrhi (result, x, y, size, GEN_INT (align)));
2754 emit_cmp_insn (result, const0_rtx, comparison, NULL_RTX,
2759 #ifdef HAVE_cmpstrsi
2762 enum machine_mode result_mode
2763 = insn_operand_mode[(int) CODE_FOR_cmpstrsi][0];
2764 rtx result = gen_reg_rtx (result_mode);
2765 size = protect_from_queue (size, 0);
2766 emit_insn (gen_cmpstrsi (result, x, y,
2767 convert_to_mode (SImode, size, 1),
2769 emit_cmp_insn (result, const0_rtx, comparison, NULL_RTX,
2777 #ifdef TARGET_MEM_FUNCTIONS
2778 emit_library_call (memcmp_libfunc, 0,
2779 TYPE_MODE (integer_type_node), 3,
2780 XEXP (x, 0), Pmode, XEXP (y, 0), Pmode,
2781 convert_to_mode (TYPE_MODE (sizetype), size,
2782 TREE_UNSIGNED (sizetype)),
2783 TYPE_MODE (sizetype));
2785 emit_library_call (bcmp_libfunc, 0,
2786 TYPE_MODE (integer_type_node), 3,
2787 XEXP (x, 0), Pmode, XEXP (y, 0), Pmode,
2788 convert_to_mode (TYPE_MODE (integer_type_node),
2790 TREE_UNSIGNED (integer_type_node)),
2791 TYPE_MODE (integer_type_node));
2794 /* Immediately move the result of the libcall into a pseudo
2795 register so reload doesn't clobber the value if it needs
2796 the return register for a spill reg. */
2797 result = gen_reg_rtx (TYPE_MODE (integer_type_node));
2798 emit_move_insn (result,
2799 hard_libcall_value (TYPE_MODE (integer_type_node)));
2800 emit_cmp_insn (result,
2801 const0_rtx, comparison, NULL_RTX,
2802 TYPE_MODE (integer_type_node), 0, 0);
2807 /* Handle some compares against zero. */
2809 if (y == CONST0_RTX (mode)
2810 && tst_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
2812 int icode = (int) tst_optab->handlers[(int) mode].insn_code;
2815 x = protect_from_queue (x, 0);
2816 y = protect_from_queue (y, 0);
2818 /* Now, if insn does accept these operands, put them into pseudos. */
2819 if (! (*insn_operand_predicate[icode][0])
2820 (x, insn_operand_mode[icode][0]))
2821 x = copy_to_mode_reg (insn_operand_mode[icode][0], x);
2823 emit_insn (GEN_FCN (icode) (x));
2827 /* Handle compares for which there is a directly suitable insn. */
2829 if (cmp_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
2831 int icode = (int) cmp_optab->handlers[(int) mode].insn_code;
2834 x = protect_from_queue (x, 0);
2835 y = protect_from_queue (y, 0);
2837 /* Now, if insn doesn't accept these operands, put them into pseudos. */
2838 if (! (*insn_operand_predicate[icode][0])
2839 (x, insn_operand_mode[icode][0]))
2840 x = copy_to_mode_reg (insn_operand_mode[icode][0], x);
2842 if (! (*insn_operand_predicate[icode][1])
2843 (y, insn_operand_mode[icode][1]))
2844 y = copy_to_mode_reg (insn_operand_mode[icode][1], y);
2846 emit_insn (GEN_FCN (icode) (x, y));
2850 /* Try widening if we can find a direct insn that way. */
2852 if (class == MODE_INT || class == MODE_FLOAT || class == MODE_COMPLEX_FLOAT)
2854 for (wider_mode = GET_MODE_WIDER_MODE (mode); wider_mode != VOIDmode;
2855 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
2857 if (cmp_optab->handlers[(int) wider_mode].insn_code
2858 != CODE_FOR_nothing)
2860 x = protect_from_queue (x, 0);
2861 y = protect_from_queue (y, 0);
2862 x = convert_modes (wider_mode, mode, x, unsignedp);
2863 y = convert_modes (wider_mode, mode, y, unsignedp);
2864 emit_cmp_insn (x, y, comparison, NULL_RTX,
2865 wider_mode, unsignedp, align);
2871 /* Handle a lib call just for the mode we are using. */
2873 if (cmp_optab->handlers[(int) mode].libfunc
2874 && class != MODE_FLOAT)
2876 rtx libfunc = cmp_optab->handlers[(int) mode].libfunc;
2879 /* If we want unsigned, and this mode has a distinct unsigned
2880 comparison routine, use that. */
2881 if (unsignedp && ucmp_optab->handlers[(int) mode].libfunc)
2882 libfunc = ucmp_optab->handlers[(int) mode].libfunc;
2884 emit_library_call (libfunc, 1,
2885 word_mode, 2, x, mode, y, mode);
2887 /* Immediately move the result of the libcall into a pseudo
2888 register so reload doesn't clobber the value if it needs
2889 the return register for a spill reg. */
2890 result = gen_reg_rtx (word_mode);
2891 emit_move_insn (result, hard_libcall_value (word_mode));
2893 /* Integer comparison returns a result that must be compared against 1,
2894 so that even if we do an unsigned compare afterward,
2895 there is still a value that can represent the result "less than". */
2896 emit_cmp_insn (result, const1_rtx,
2897 comparison, NULL_RTX, word_mode, unsignedp, 0);
2901 if (class == MODE_FLOAT)
2902 emit_float_lib_cmp (x, y, comparison);
2908 /* Nonzero if a compare of mode MODE can be done straightforwardly
2909 (without splitting it into pieces). */
2912 can_compare_p (mode)
2913 enum machine_mode mode;
2917 if (cmp_optab->handlers[(int)mode].insn_code != CODE_FOR_nothing)
2919 mode = GET_MODE_WIDER_MODE (mode);
2920 } while (mode != VOIDmode);
2925 /* Emit a library call comparison between floating point X and Y.
2926 COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.). */
2929 emit_float_lib_cmp (x, y, comparison)
2931 enum rtx_code comparison;
2933 enum machine_mode mode = GET_MODE (x);
2941 libfunc = eqhf2_libfunc;
2945 libfunc = nehf2_libfunc;
2949 libfunc = gthf2_libfunc;
2953 libfunc = gehf2_libfunc;
2957 libfunc = lthf2_libfunc;
2961 libfunc = lehf2_libfunc;
2967 else if (mode == SFmode)
2971 libfunc = eqsf2_libfunc;
2975 libfunc = nesf2_libfunc;
2979 libfunc = gtsf2_libfunc;
2983 libfunc = gesf2_libfunc;
2987 libfunc = ltsf2_libfunc;
2991 libfunc = lesf2_libfunc;
2997 else if (mode == DFmode)
3001 libfunc = eqdf2_libfunc;
3005 libfunc = nedf2_libfunc;
3009 libfunc = gtdf2_libfunc;
3013 libfunc = gedf2_libfunc;
3017 libfunc = ltdf2_libfunc;
3021 libfunc = ledf2_libfunc;
3027 else if (mode == XFmode)
3031 libfunc = eqxf2_libfunc;
3035 libfunc = nexf2_libfunc;
3039 libfunc = gtxf2_libfunc;
3043 libfunc = gexf2_libfunc;
3047 libfunc = ltxf2_libfunc;
3051 libfunc = lexf2_libfunc;
3057 else if (mode == TFmode)
3061 libfunc = eqtf2_libfunc;
3065 libfunc = netf2_libfunc;
3069 libfunc = gttf2_libfunc;
3073 libfunc = getf2_libfunc;
3077 libfunc = lttf2_libfunc;
3081 libfunc = letf2_libfunc;
3089 enum machine_mode wider_mode;
3091 for (wider_mode = GET_MODE_WIDER_MODE (mode); wider_mode != VOIDmode;
3092 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
3094 if ((cmp_optab->handlers[(int) wider_mode].insn_code
3095 != CODE_FOR_nothing)
3096 || (cmp_optab->handlers[(int) wider_mode].libfunc != 0))
3098 x = protect_from_queue (x, 0);
3099 y = protect_from_queue (y, 0);
3100 x = convert_to_mode (wider_mode, x, 0);
3101 y = convert_to_mode (wider_mode, y, 0);
3102 emit_float_lib_cmp (x, y, comparison);
3112 emit_library_call (libfunc, 1,
3113 word_mode, 2, x, mode, y, mode);
3115 /* Immediately move the result of the libcall into a pseudo
3116 register so reload doesn't clobber the value if it needs
3117 the return register for a spill reg. */
3118 result = gen_reg_rtx (word_mode);
3119 emit_move_insn (result, hard_libcall_value (word_mode));
3121 emit_cmp_insn (result, const0_rtx, comparison,
3122 NULL_RTX, word_mode, 0, 0);
3125 /* Generate code to indirectly jump to a location given in the rtx LOC. */
3128 emit_indirect_jump (loc)
3131 if (! ((*insn_operand_predicate[(int)CODE_FOR_indirect_jump][0])
3133 loc = copy_to_mode_reg (Pmode, loc);
3135 emit_jump_insn (gen_indirect_jump (loc));
3139 #ifdef HAVE_conditional_move
3141 /* Emit a conditional move instruction if the machine supports one for that
3142 condition and machine mode.
3144 OP0 and OP1 are the operands that should be compared using CODE. CMODE is
3145 the mode to use should they be constants. If it is VOIDmode, they cannot
3148 OP2 should be stored in TARGET if the comparison is true, otherwise OP3
3149 should be stored there. MODE is the mode to use should they be constants.
3150 If it is VOIDmode, they cannot both be constants.
3152 The result is either TARGET (perhaps modified) or NULL_RTX if the operation
3153 is not supported. */
3156 emit_conditional_move (target, code, op0, op1, cmode, op2, op3, mode,
3161 enum machine_mode cmode;
3163 enum machine_mode mode;
3166 rtx tem, subtarget, comparison, insn;
3167 enum insn_code icode;
3169 /* If one operand is constant, make it the second one. Only do this
3170 if the other operand is not constant as well. */
3172 if ((CONSTANT_P (op0) && ! CONSTANT_P (op1))
3173 || (GET_CODE (op0) == CONST_INT && GET_CODE (op1) != CONST_INT))
3178 code = swap_condition (code);
3181 if (cmode == VOIDmode)
3182 cmode = GET_MODE (op0);
3184 if ((CONSTANT_P (op2) && ! CONSTANT_P (op3))
3185 || (GET_CODE (op2) == CONST_INT && GET_CODE (op3) != CONST_INT))
3190 /* ??? This may not be appropriate (consider IEEE). Perhaps we should
3191 call can_reverse_comparison_p here and bail out if necessary.
3192 It's not clear whether we need to do this canonicalization though. */
3193 code = reverse_condition (code);
3196 if (mode == VOIDmode)
3197 mode = GET_MODE (op2);
3199 icode = movcc_gen_code[mode];
3201 if (icode == CODE_FOR_nothing)
3206 op2 = force_not_mem (op2);
3207 op3 = force_not_mem (op3);
3211 target = protect_from_queue (target, 1);
3213 target = gen_reg_rtx (mode);
3219 op2 = protect_from_queue (op2, 0);
3220 op3 = protect_from_queue (op3, 0);
3222 /* If the insn doesn't accept these operands, put them in pseudos. */
3224 if (! (*insn_operand_predicate[icode][0])
3225 (subtarget, insn_operand_mode[icode][0]))
3226 subtarget = gen_reg_rtx (insn_operand_mode[icode][0]);
3228 if (! (*insn_operand_predicate[icode][2])
3229 (op2, insn_operand_mode[icode][2]))
3230 op2 = copy_to_mode_reg (insn_operand_mode[icode][2], op2);
3232 if (! (*insn_operand_predicate[icode][3])
3233 (op3, insn_operand_mode[icode][3]))
3234 op3 = copy_to_mode_reg (insn_operand_mode[icode][3], op3);
3236 /* Everything should now be in the suitable form, so emit the compare insn
3237 and then the conditional move. */
3240 = compare_from_rtx (op0, op1, code, unsignedp, cmode, NULL_RTX, 0);
3242 /* ??? Watch for const0_rtx (nop) and const_true_rtx (unconditional)? */
3243 if (GET_CODE (comparison) != code)
3244 /* This shouldn't happen. */
3247 insn = GEN_FCN (icode) (subtarget, comparison, op2, op3);
3249 /* If that failed, then give up. */
3255 if (subtarget != target)
3256 convert_move (target, subtarget, 0);
3261 /* Return non-zero if a conditional move of mode MODE is supported.
3263 This function is for combine so it can tell whether an insn that looks
3264 like a conditional move is actually supported by the hardware. If we
3265 guess wrong we lose a bit on optimization, but that's it. */
3266 /* ??? sparc64 supports conditionally moving integers values based on fp
3267 comparisons, and vice versa. How do we handle them? */
3270 can_conditionally_move_p (mode)
3271 enum machine_mode mode;
3273 if (movcc_gen_code[mode] != CODE_FOR_nothing)
3279 #endif /* HAVE_conditional_move */
3281 /* These three functions generate an insn body and return it
3282 rather than emitting the insn.
3284 They do not protect from queued increments,
3285 because they may be used 1) in protect_from_queue itself
3286 and 2) in other passes where there is no queue. */
3288 /* Generate and return an insn body to add Y to X. */
3291 gen_add2_insn (x, y)
3294 int icode = (int) add_optab->handlers[(int) GET_MODE (x)].insn_code;
3296 if (! (*insn_operand_predicate[icode][0]) (x, insn_operand_mode[icode][0])
3297 || ! (*insn_operand_predicate[icode][1]) (x, insn_operand_mode[icode][1])
3298 || ! (*insn_operand_predicate[icode][2]) (y, insn_operand_mode[icode][2]))
3301 return (GEN_FCN (icode) (x, x, y));
3305 have_add2_insn (mode)
3306 enum machine_mode mode;
3308 return add_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing;
3311 /* Generate and return an insn body to subtract Y from X. */
3314 gen_sub2_insn (x, y)
3317 int icode = (int) sub_optab->handlers[(int) GET_MODE (x)].insn_code;
3319 if (! (*insn_operand_predicate[icode][0]) (x, insn_operand_mode[icode][0])
3320 || ! (*insn_operand_predicate[icode][1]) (x, insn_operand_mode[icode][1])
3321 || ! (*insn_operand_predicate[icode][2]) (y, insn_operand_mode[icode][2]))
3324 return (GEN_FCN (icode) (x, x, y));
3328 have_sub2_insn (mode)
3329 enum machine_mode mode;
3331 return sub_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing;
3334 /* Generate the body of an instruction to copy Y into X.
3335 It may be a SEQUENCE, if one insn isn't enough. */
3338 gen_move_insn (x, y)
3341 register enum machine_mode mode = GET_MODE (x);
3342 enum insn_code insn_code;
3345 if (mode == VOIDmode)
3346 mode = GET_MODE (y);
3348 insn_code = mov_optab->handlers[(int) mode].insn_code;
3350 /* Handle MODE_CC modes: If we don't have a special move insn for this mode,
3351 find a mode to do it in. If we have a movcc, use it. Otherwise,
3352 find the MODE_INT mode of the same width. */
3354 if (GET_MODE_CLASS (mode) == MODE_CC && insn_code == CODE_FOR_nothing)
3356 enum machine_mode tmode = VOIDmode;
3360 && mov_optab->handlers[(int) CCmode].insn_code != CODE_FOR_nothing)
3363 for (tmode = QImode; tmode != VOIDmode;
3364 tmode = GET_MODE_WIDER_MODE (tmode))
3365 if (GET_MODE_SIZE (tmode) == GET_MODE_SIZE (mode))
3368 if (tmode == VOIDmode)
3371 /* Get X and Y in TMODE. We can't use gen_lowpart here because it
3372 may call change_address which is not appropriate if we were
3373 called when a reload was in progress. We don't have to worry
3374 about changing the address since the size in bytes is supposed to
3375 be the same. Copy the MEM to change the mode and move any
3376 substitutions from the old MEM to the new one. */
3378 if (reload_in_progress)
3380 x = gen_lowpart_common (tmode, x1);
3381 if (x == 0 && GET_CODE (x1) == MEM)
3383 x = gen_rtx (MEM, tmode, XEXP (x1, 0));
3384 RTX_UNCHANGING_P (x) = RTX_UNCHANGING_P (x1);
3385 MEM_IN_STRUCT_P (x) = MEM_IN_STRUCT_P (x1);
3386 MEM_VOLATILE_P (x) = MEM_VOLATILE_P (x1);
3387 copy_replacements (x1, x);
3390 y = gen_lowpart_common (tmode, y1);
3391 if (y == 0 && GET_CODE (y1) == MEM)
3393 y = gen_rtx (MEM, tmode, XEXP (y1, 0));
3394 RTX_UNCHANGING_P (y) = RTX_UNCHANGING_P (y1);
3395 MEM_IN_STRUCT_P (y) = MEM_IN_STRUCT_P (y1);
3396 MEM_VOLATILE_P (y) = MEM_VOLATILE_P (y1);
3397 copy_replacements (y1, y);
3402 x = gen_lowpart (tmode, x);
3403 y = gen_lowpart (tmode, y);
3406 insn_code = mov_optab->handlers[(int) tmode].insn_code;
3407 return (GEN_FCN (insn_code) (x, y));
3411 emit_move_insn_1 (x, y);
3412 seq = gen_sequence ();
3417 /* Return the insn code used to extend FROM_MODE to TO_MODE.
3418 UNSIGNEDP specifies zero-extension instead of sign-extension. If
3419 no such operation exists, CODE_FOR_nothing will be returned. */
3422 can_extend_p (to_mode, from_mode, unsignedp)
3423 enum machine_mode to_mode, from_mode;
3426 return extendtab[(int) to_mode][(int) from_mode][unsignedp];
3429 /* Generate the body of an insn to extend Y (with mode MFROM)
3430 into X (with mode MTO). Do zero-extension if UNSIGNEDP is nonzero. */
3433 gen_extend_insn (x, y, mto, mfrom, unsignedp)
3435 enum machine_mode mto, mfrom;
3438 return (GEN_FCN (extendtab[(int) mto][(int) mfrom][unsignedp]) (x, y));
3441 /* can_fix_p and can_float_p say whether the target machine
3442 can directly convert a given fixed point type to
3443 a given floating point type, or vice versa.
3444 The returned value is the CODE_FOR_... value to use,
3445 or CODE_FOR_nothing if these modes cannot be directly converted.
3447 *TRUNCP_PTR is set to 1 if it is necessary to output
3448 an explicit FTRUNC insn before the fix insn; otherwise 0. */
3450 static enum insn_code
3451 can_fix_p (fixmode, fltmode, unsignedp, truncp_ptr)
3452 enum machine_mode fltmode, fixmode;
3457 if (fixtrunctab[(int) fltmode][(int) fixmode][unsignedp] != CODE_FOR_nothing)
3458 return fixtrunctab[(int) fltmode][(int) fixmode][unsignedp];
3460 if (ftrunc_optab->handlers[(int) fltmode].insn_code != CODE_FOR_nothing)
3463 return fixtab[(int) fltmode][(int) fixmode][unsignedp];
3465 return CODE_FOR_nothing;
3468 static enum insn_code
3469 can_float_p (fltmode, fixmode, unsignedp)
3470 enum machine_mode fixmode, fltmode;
3473 return floattab[(int) fltmode][(int) fixmode][unsignedp];
3476 /* Generate code to convert FROM to floating point
3477 and store in TO. FROM must be fixed point and not VOIDmode.
3478 UNSIGNEDP nonzero means regard FROM as unsigned.
3479 Normally this is done by correcting the final value
3480 if it is negative. */
3483 expand_float (to, from, unsignedp)
3487 enum insn_code icode;
3488 register rtx target = to;
3489 enum machine_mode fmode, imode;
3491 /* Crash now, because we won't be able to decide which mode to use. */
3492 if (GET_MODE (from) == VOIDmode)
3495 /* Look for an insn to do the conversion. Do it in the specified
3496 modes if possible; otherwise convert either input, output or both to
3497 wider mode. If the integer mode is wider than the mode of FROM,
3498 we can do the conversion signed even if the input is unsigned. */
3500 for (imode = GET_MODE (from); imode != VOIDmode;
3501 imode = GET_MODE_WIDER_MODE (imode))
3502 for (fmode = GET_MODE (to); fmode != VOIDmode;
3503 fmode = GET_MODE_WIDER_MODE (fmode))
3505 int doing_unsigned = unsignedp;
3507 icode = can_float_p (fmode, imode, unsignedp);
3508 if (icode == CODE_FOR_nothing && imode != GET_MODE (from) && unsignedp)
3509 icode = can_float_p (fmode, imode, 0), doing_unsigned = 0;
3511 if (icode != CODE_FOR_nothing)
3513 to = protect_from_queue (to, 1);
3514 from = protect_from_queue (from, 0);
3516 if (imode != GET_MODE (from))
3517 from = convert_to_mode (imode, from, unsignedp);
3519 if (fmode != GET_MODE (to))
3520 target = gen_reg_rtx (fmode);
3522 emit_unop_insn (icode, target, from,
3523 doing_unsigned ? UNSIGNED_FLOAT : FLOAT);
3526 convert_move (to, target, 0);
3531 #if !defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3533 /* Unsigned integer, and no way to convert directly.
3534 Convert as signed, then conditionally adjust the result. */
3537 rtx label = gen_label_rtx ();
3539 REAL_VALUE_TYPE offset;
3543 to = protect_from_queue (to, 1);
3544 from = protect_from_queue (from, 0);
3547 from = force_not_mem (from);
3549 /* Look for a usable floating mode FMODE wider than the source and at
3550 least as wide as the target. Using FMODE will avoid rounding woes
3551 with unsigned values greater than the signed maximum value. */
3553 for (fmode = GET_MODE (to); fmode != VOIDmode;
3554 fmode = GET_MODE_WIDER_MODE (fmode))
3555 if (GET_MODE_BITSIZE (GET_MODE (from)) < GET_MODE_BITSIZE (fmode)
3556 && can_float_p (fmode, GET_MODE (from), 0) != CODE_FOR_nothing)
3559 if (fmode == VOIDmode)
3561 /* There is no such mode. Pretend the target is wide enough. */
3562 fmode = GET_MODE (to);
3564 /* Avoid double-rounding when TO is narrower than FROM. */
3565 if ((significand_size (fmode) + 1)
3566 < GET_MODE_BITSIZE (GET_MODE (from)))
3569 rtx neglabel = gen_label_rtx ();
3571 /* Don't use TARGET if it isn't a register, is a hard register,
3572 or is the wrong mode. */
3573 if (GET_CODE (target) != REG
3574 || REGNO (target) < FIRST_PSEUDO_REGISTER
3575 || GET_MODE (target) != fmode)
3576 target = gen_reg_rtx (fmode);
3578 imode = GET_MODE (from);
3579 do_pending_stack_adjust ();
3581 /* Test whether the sign bit is set. */
3582 emit_cmp_insn (from, const0_rtx, GE, NULL_RTX, imode, 0, 0);
3583 emit_jump_insn (gen_blt (neglabel));
3585 /* The sign bit is not set. Convert as signed. */
3586 expand_float (target, from, 0);
3587 emit_jump_insn (gen_jump (label));
3590 /* The sign bit is set.
3591 Convert to a usable (positive signed) value by shifting right
3592 one bit, while remembering if a nonzero bit was shifted
3593 out; i.e., compute (from & 1) | (from >> 1). */
3595 emit_label (neglabel);
3596 temp = expand_binop (imode, and_optab, from, const1_rtx,
3597 NULL_RTX, 1, OPTAB_LIB_WIDEN);
3598 temp1 = expand_shift (RSHIFT_EXPR, imode, from, integer_one_node,
3600 temp = expand_binop (imode, ior_optab, temp, temp1, temp, 1,
3602 expand_float (target, temp, 0);
3604 /* Multiply by 2 to undo the shift above. */
3605 temp = expand_binop (fmode, add_optab, target, target,
3606 target, 0, OPTAB_LIB_WIDEN);
3608 emit_move_insn (target, temp);
3610 do_pending_stack_adjust ();
3616 /* If we are about to do some arithmetic to correct for an
3617 unsigned operand, do it in a pseudo-register. */
3619 if (GET_MODE (to) != fmode
3620 || GET_CODE (to) != REG || REGNO (to) < FIRST_PSEUDO_REGISTER)
3621 target = gen_reg_rtx (fmode);
3623 /* Convert as signed integer to floating. */
3624 expand_float (target, from, 0);
3626 /* If FROM is negative (and therefore TO is negative),
3627 correct its value by 2**bitwidth. */
3629 do_pending_stack_adjust ();
3630 emit_cmp_insn (from, const0_rtx, GE, NULL_RTX, GET_MODE (from), 0, 0);
3631 emit_jump_insn (gen_bge (label));
3633 /* On SCO 3.2.1, ldexp rejects values outside [0.5, 1).
3634 Rather than setting up a dconst_dot_5, let's hope SCO
3636 offset = REAL_VALUE_LDEXP (dconst1, GET_MODE_BITSIZE (GET_MODE (from)));
3637 temp = expand_binop (fmode, add_optab, target,
3638 CONST_DOUBLE_FROM_REAL_VALUE (offset, fmode),
3639 target, 0, OPTAB_LIB_WIDEN);
3641 emit_move_insn (target, temp);
3643 do_pending_stack_adjust ();
3649 /* No hardware instruction available; call a library routine to convert from
3650 SImode, DImode, or TImode into SFmode, DFmode, XFmode, or TFmode. */
3656 to = protect_from_queue (to, 1);
3657 from = protect_from_queue (from, 0);
3659 if (GET_MODE_SIZE (GET_MODE (from)) < GET_MODE_SIZE (SImode))
3660 from = convert_to_mode (SImode, from, unsignedp);
3663 from = force_not_mem (from);
3665 if (GET_MODE (to) == SFmode)
3667 if (GET_MODE (from) == SImode)
3668 libfcn = floatsisf_libfunc;
3669 else if (GET_MODE (from) == DImode)
3670 libfcn = floatdisf_libfunc;
3671 else if (GET_MODE (from) == TImode)
3672 libfcn = floattisf_libfunc;
3676 else if (GET_MODE (to) == DFmode)
3678 if (GET_MODE (from) == SImode)
3679 libfcn = floatsidf_libfunc;
3680 else if (GET_MODE (from) == DImode)
3681 libfcn = floatdidf_libfunc;
3682 else if (GET_MODE (from) == TImode)
3683 libfcn = floattidf_libfunc;
3687 else if (GET_MODE (to) == XFmode)
3689 if (GET_MODE (from) == SImode)
3690 libfcn = floatsixf_libfunc;
3691 else if (GET_MODE (from) == DImode)
3692 libfcn = floatdixf_libfunc;
3693 else if (GET_MODE (from) == TImode)
3694 libfcn = floattixf_libfunc;
3698 else if (GET_MODE (to) == TFmode)
3700 if (GET_MODE (from) == SImode)
3701 libfcn = floatsitf_libfunc;
3702 else if (GET_MODE (from) == DImode)
3703 libfcn = floatditf_libfunc;
3704 else if (GET_MODE (from) == TImode)
3705 libfcn = floattitf_libfunc;
3714 value = emit_library_call_value (libfcn, NULL_RTX, 1,
3716 1, from, GET_MODE (from));
3717 insns = get_insns ();
3720 emit_libcall_block (insns, target, value,
3721 gen_rtx (FLOAT, GET_MODE (to), from));
3726 /* Copy result to requested destination
3727 if we have been computing in a temp location. */
3731 if (GET_MODE (target) == GET_MODE (to))
3732 emit_move_insn (to, target);
3734 convert_move (to, target, 0);
3738 /* expand_fix: generate code to convert FROM to fixed point
3739 and store in TO. FROM must be floating point. */
3745 rtx temp = gen_reg_rtx (GET_MODE (x));
3746 return expand_unop (GET_MODE (x), ftrunc_optab, x, temp, 0);
3750 expand_fix (to, from, unsignedp)
3751 register rtx to, from;
3754 enum insn_code icode;
3755 register rtx target = to;
3756 enum machine_mode fmode, imode;
3760 /* We first try to find a pair of modes, one real and one integer, at
3761 least as wide as FROM and TO, respectively, in which we can open-code
3762 this conversion. If the integer mode is wider than the mode of TO,
3763 we can do the conversion either signed or unsigned. */
3765 for (imode = GET_MODE (to); imode != VOIDmode;
3766 imode = GET_MODE_WIDER_MODE (imode))
3767 for (fmode = GET_MODE (from); fmode != VOIDmode;
3768 fmode = GET_MODE_WIDER_MODE (fmode))
3770 int doing_unsigned = unsignedp;
3772 icode = can_fix_p (imode, fmode, unsignedp, &must_trunc);
3773 if (icode == CODE_FOR_nothing && imode != GET_MODE (to) && unsignedp)
3774 icode = can_fix_p (imode, fmode, 0, &must_trunc), doing_unsigned = 0;
3776 if (icode != CODE_FOR_nothing)
3778 to = protect_from_queue (to, 1);
3779 from = protect_from_queue (from, 0);
3781 if (fmode != GET_MODE (from))
3782 from = convert_to_mode (fmode, from, 0);
3785 from = ftruncify (from);
3787 if (imode != GET_MODE (to))
3788 target = gen_reg_rtx (imode);
3790 emit_unop_insn (icode, target, from,
3791 doing_unsigned ? UNSIGNED_FIX : FIX);
3793 convert_move (to, target, unsignedp);
3798 #if !defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3799 /* For an unsigned conversion, there is one more way to do it.
3800 If we have a signed conversion, we generate code that compares
3801 the real value to the largest representable positive number. If if
3802 is smaller, the conversion is done normally. Otherwise, subtract
3803 one plus the highest signed number, convert, and add it back.
3805 We only need to check all real modes, since we know we didn't find
3806 anything with a wider integer mode. */
3808 if (unsignedp && GET_MODE_BITSIZE (GET_MODE (to)) <= HOST_BITS_PER_WIDE_INT)
3809 for (fmode = GET_MODE (from); fmode != VOIDmode;
3810 fmode = GET_MODE_WIDER_MODE (fmode))
3811 /* Make sure we won't lose significant bits doing this. */
3812 if (GET_MODE_BITSIZE (fmode) > GET_MODE_BITSIZE (GET_MODE (to))
3813 && CODE_FOR_nothing != can_fix_p (GET_MODE (to), fmode, 0,
3817 REAL_VALUE_TYPE offset;
3818 rtx limit, lab1, lab2, insn;
3820 bitsize = GET_MODE_BITSIZE (GET_MODE (to));
3821 offset = REAL_VALUE_LDEXP (dconst1, bitsize - 1);
3822 limit = CONST_DOUBLE_FROM_REAL_VALUE (offset, fmode);
3823 lab1 = gen_label_rtx ();
3824 lab2 = gen_label_rtx ();
3827 to = protect_from_queue (to, 1);
3828 from = protect_from_queue (from, 0);
3831 from = force_not_mem (from);
3833 if (fmode != GET_MODE (from))
3834 from = convert_to_mode (fmode, from, 0);
3836 /* See if we need to do the subtraction. */
3837 do_pending_stack_adjust ();
3838 emit_cmp_insn (from, limit, GE, NULL_RTX, GET_MODE (from), 0, 0);
3839 emit_jump_insn (gen_bge (lab1));
3841 /* If not, do the signed "fix" and branch around fixup code. */
3842 expand_fix (to, from, 0);
3843 emit_jump_insn (gen_jump (lab2));
3846 /* Otherwise, subtract 2**(N-1), convert to signed number,
3847 then add 2**(N-1). Do the addition using XOR since this
3848 will often generate better code. */
3850 target = expand_binop (GET_MODE (from), sub_optab, from, limit,
3851 NULL_RTX, 0, OPTAB_LIB_WIDEN);
3852 expand_fix (to, target, 0);
3853 target = expand_binop (GET_MODE (to), xor_optab, to,
3854 GEN_INT ((HOST_WIDE_INT) 1 << (bitsize - 1)),
3855 to, 1, OPTAB_LIB_WIDEN);
3858 emit_move_insn (to, target);
3862 if (mov_optab->handlers[(int) GET_MODE (to)].insn_code
3863 != CODE_FOR_nothing)
3865 /* Make a place for a REG_NOTE and add it. */
3866 insn = emit_move_insn (to, to);
3867 REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_EQUAL,
3868 gen_rtx (UNSIGNED_FIX, GET_MODE (to),
3876 /* We can't do it with an insn, so use a library call. But first ensure
3877 that the mode of TO is at least as wide as SImode, since those are the
3878 only library calls we know about. */
3880 if (GET_MODE_SIZE (GET_MODE (to)) < GET_MODE_SIZE (SImode))
3882 target = gen_reg_rtx (SImode);
3884 expand_fix (target, from, unsignedp);
3886 else if (GET_MODE (from) == SFmode)
3888 if (GET_MODE (to) == SImode)
3889 libfcn = unsignedp ? fixunssfsi_libfunc : fixsfsi_libfunc;
3890 else if (GET_MODE (to) == DImode)
3891 libfcn = unsignedp ? fixunssfdi_libfunc : fixsfdi_libfunc;
3892 else if (GET_MODE (to) == TImode)
3893 libfcn = unsignedp ? fixunssfti_libfunc : fixsfti_libfunc;
3897 else if (GET_MODE (from) == DFmode)
3899 if (GET_MODE (to) == SImode)
3900 libfcn = unsignedp ? fixunsdfsi_libfunc : fixdfsi_libfunc;
3901 else if (GET_MODE (to) == DImode)
3902 libfcn = unsignedp ? fixunsdfdi_libfunc : fixdfdi_libfunc;
3903 else if (GET_MODE (to) == TImode)
3904 libfcn = unsignedp ? fixunsdfti_libfunc : fixdfti_libfunc;
3908 else if (GET_MODE (from) == XFmode)
3910 if (GET_MODE (to) == SImode)
3911 libfcn = unsignedp ? fixunsxfsi_libfunc : fixxfsi_libfunc;
3912 else if (GET_MODE (to) == DImode)
3913 libfcn = unsignedp ? fixunsxfdi_libfunc : fixxfdi_libfunc;
3914 else if (GET_MODE (to) == TImode)
3915 libfcn = unsignedp ? fixunsxfti_libfunc : fixxfti_libfunc;
3919 else if (GET_MODE (from) == TFmode)
3921 if (GET_MODE (to) == SImode)
3922 libfcn = unsignedp ? fixunstfsi_libfunc : fixtfsi_libfunc;
3923 else if (GET_MODE (to) == DImode)
3924 libfcn = unsignedp ? fixunstfdi_libfunc : fixtfdi_libfunc;
3925 else if (GET_MODE (to) == TImode)
3926 libfcn = unsignedp ? fixunstfti_libfunc : fixtfti_libfunc;
3938 to = protect_from_queue (to, 1);
3939 from = protect_from_queue (from, 0);
3942 from = force_not_mem (from);
3946 value = emit_library_call_value (libfcn, NULL_RTX, 1, GET_MODE (to),
3948 1, from, GET_MODE (from));
3949 insns = get_insns ();
3952 emit_libcall_block (insns, target, value,
3953 gen_rtx (unsignedp ? UNSIGNED_FIX : FIX,
3954 GET_MODE (to), from));
3959 if (GET_MODE (to) == GET_MODE (target))
3960 emit_move_insn (to, target);
3962 convert_move (to, target, 0);
3971 optab op = (optab) xmalloc (sizeof (struct optab));
3973 for (i = 0; i < NUM_MACHINE_MODES; i++)
3975 op->handlers[i].insn_code = CODE_FOR_nothing;
3976 op->handlers[i].libfunc = 0;
3979 if (code != UNKNOWN)
3980 code_to_optab[(int) code] = op;
3985 /* Initialize the libfunc fields of an entire group of entries in some
3986 optab. Each entry is set equal to a string consisting of a leading
3987 pair of underscores followed by a generic operation name followed by
3988 a mode name (downshifted to lower case) followed by a single character
3989 representing the number of operands for the given operation (which is
3990 usually one of the characters '2', '3', or '4').
3992 OPTABLE is the table in which libfunc fields are to be initialized.
3993 FIRST_MODE is the first machine mode index in the given optab to
3995 LAST_MODE is the last machine mode index in the given optab to
3997 OPNAME is the generic (string) name of the operation.
3998 SUFFIX is the character which specifies the number of operands for
3999 the given generic operation.
4003 init_libfuncs (optable, first_mode, last_mode, opname, suffix)
4004 register optab optable;
4005 register int first_mode;
4006 register int last_mode;
4007 register char *opname;
4008 register int suffix;
4011 register unsigned opname_len = strlen (opname);
4013 for (mode = first_mode; (int) mode <= (int) last_mode;
4014 mode = (enum machine_mode) ((int) mode + 1))
4016 register char *mname = mode_name[(int) mode];
4017 register unsigned mname_len = strlen (mname);
4018 register char *libfunc_name
4019 = (char *) xmalloc (2 + opname_len + mname_len + 1 + 1);
4026 for (q = opname; *q; )
4028 for (q = mname; *q; q++)
4029 *p++ = tolower (*q);
4032 optable->handlers[(int) mode].libfunc
4033 = gen_rtx (SYMBOL_REF, Pmode, libfunc_name);
4037 /* Initialize the libfunc fields of an entire group of entries in some
4038 optab which correspond to all integer mode operations. The parameters
4039 have the same meaning as similarly named ones for the `init_libfuncs'
4040 routine. (See above). */
4043 init_integral_libfuncs (optable, opname, suffix)
4044 register optab optable;
4045 register char *opname;
4046 register int suffix;
4048 init_libfuncs (optable, SImode, TImode, opname, suffix);
4051 /* Initialize the libfunc fields of an entire group of entries in some
4052 optab which correspond to all real mode operations. The parameters
4053 have the same meaning as similarly named ones for the `init_libfuncs'
4054 routine. (See above). */
4057 init_floating_libfuncs (optable, opname, suffix)
4058 register optab optable;
4059 register char *opname;
4060 register int suffix;
4062 init_libfuncs (optable, SFmode, TFmode, opname, suffix);
4065 /* Initialize the libfunc fields of an entire group of entries in some
4066 optab which correspond to all complex floating modes. The parameters
4067 have the same meaning as similarly named ones for the `init_libfuncs'
4068 routine. (See above). */
4071 init_complex_libfuncs (optable, opname, suffix)
4072 register optab optable;
4073 register char *opname;
4074 register int suffix;
4076 init_libfuncs (optable, SCmode, TCmode, opname, suffix);
4079 /* Call this once to initialize the contents of the optabs
4080 appropriately for the current target machine. */
4088 /* Start by initializing all tables to contain CODE_FOR_nothing. */
4090 for (p = fixtab[0][0];
4091 p < fixtab[0][0] + sizeof fixtab / sizeof (fixtab[0][0][0]);
4093 *p = CODE_FOR_nothing;
4095 for (p = fixtrunctab[0][0];
4096 p < fixtrunctab[0][0] + sizeof fixtrunctab / sizeof (fixtrunctab[0][0][0]);
4098 *p = CODE_FOR_nothing;
4100 for (p = floattab[0][0];
4101 p < floattab[0][0] + sizeof floattab / sizeof (floattab[0][0][0]);
4103 *p = CODE_FOR_nothing;
4105 for (p = extendtab[0][0];
4106 p < extendtab[0][0] + sizeof extendtab / sizeof extendtab[0][0][0];
4108 *p = CODE_FOR_nothing;
4110 for (i = 0; i < NUM_RTX_CODE; i++)
4111 setcc_gen_code[i] = CODE_FOR_nothing;
4113 #ifdef HAVE_conditional_move
4114 for (i = 0; i < NUM_MACHINE_MODES; i++)
4115 movcc_gen_code[i] = CODE_FOR_nothing;
4118 add_optab = init_optab (PLUS);
4119 sub_optab = init_optab (MINUS);
4120 smul_optab = init_optab (MULT);
4121 smul_highpart_optab = init_optab (UNKNOWN);
4122 umul_highpart_optab = init_optab (UNKNOWN);
4123 smul_widen_optab = init_optab (UNKNOWN);
4124 umul_widen_optab = init_optab (UNKNOWN);
4125 sdiv_optab = init_optab (DIV);
4126 sdivmod_optab = init_optab (UNKNOWN);
4127 udiv_optab = init_optab (UDIV);
4128 udivmod_optab = init_optab (UNKNOWN);
4129 smod_optab = init_optab (MOD);
4130 umod_optab = init_optab (UMOD);
4131 flodiv_optab = init_optab (DIV);
4132 ftrunc_optab = init_optab (UNKNOWN);
4133 and_optab = init_optab (AND);
4134 ior_optab = init_optab (IOR);
4135 xor_optab = init_optab (XOR);
4136 ashl_optab = init_optab (ASHIFT);
4137 ashr_optab = init_optab (ASHIFTRT);
4138 lshr_optab = init_optab (LSHIFTRT);
4139 rotl_optab = init_optab (ROTATE);
4140 rotr_optab = init_optab (ROTATERT);
4141 smin_optab = init_optab (SMIN);
4142 smax_optab = init_optab (SMAX);
4143 umin_optab = init_optab (UMIN);
4144 umax_optab = init_optab (UMAX);
4145 mov_optab = init_optab (UNKNOWN);
4146 movstrict_optab = init_optab (UNKNOWN);
4147 cmp_optab = init_optab (UNKNOWN);
4148 ucmp_optab = init_optab (UNKNOWN);
4149 tst_optab = init_optab (UNKNOWN);
4150 neg_optab = init_optab (NEG);
4151 abs_optab = init_optab (ABS);
4152 one_cmpl_optab = init_optab (NOT);
4153 ffs_optab = init_optab (FFS);
4154 sqrt_optab = init_optab (SQRT);
4155 sin_optab = init_optab (UNKNOWN);
4156 cos_optab = init_optab (UNKNOWN);
4157 strlen_optab = init_optab (UNKNOWN);
4159 for (i = 0; i < NUM_MACHINE_MODES; i++)
4161 movstr_optab[i] = CODE_FOR_nothing;
4162 clrstr_optab[i] = CODE_FOR_nothing;
4164 #ifdef HAVE_SECONDARY_RELOADS
4165 reload_in_optab[i] = reload_out_optab[i] = CODE_FOR_nothing;
4169 /* Fill in the optabs with the insns we support. */
4172 #ifdef FIXUNS_TRUNC_LIKE_FIX_TRUNC
4173 /* This flag says the same insns that convert to a signed fixnum
4174 also convert validly to an unsigned one. */
4175 for (i = 0; i < NUM_MACHINE_MODES; i++)
4176 for (j = 0; j < NUM_MACHINE_MODES; j++)
4177 fixtrunctab[i][j][1] = fixtrunctab[i][j][0];
4180 #ifdef EXTRA_CC_MODES
4184 /* Initialize the optabs with the names of the library functions. */
4185 init_integral_libfuncs (add_optab, "add", '3');
4186 init_floating_libfuncs (add_optab, "add", '3');
4187 init_integral_libfuncs (sub_optab, "sub", '3');
4188 init_floating_libfuncs (sub_optab, "sub", '3');
4189 init_integral_libfuncs (smul_optab, "mul", '3');
4190 init_floating_libfuncs (smul_optab, "mul", '3');
4191 init_integral_libfuncs (sdiv_optab, "div", '3');
4192 init_integral_libfuncs (udiv_optab, "udiv", '3');
4193 init_integral_libfuncs (sdivmod_optab, "divmod", '4');
4194 init_integral_libfuncs (udivmod_optab, "udivmod", '4');
4195 init_integral_libfuncs (smod_optab, "mod", '3');
4196 init_integral_libfuncs (umod_optab, "umod", '3');
4197 init_floating_libfuncs (flodiv_optab, "div", '3');
4198 init_floating_libfuncs (ftrunc_optab, "ftrunc", '2');
4199 init_integral_libfuncs (and_optab, "and", '3');
4200 init_integral_libfuncs (ior_optab, "ior", '3');
4201 init_integral_libfuncs (xor_optab, "xor", '3');
4202 init_integral_libfuncs (ashl_optab, "ashl", '3');
4203 init_integral_libfuncs (ashr_optab, "ashr", '3');
4204 init_integral_libfuncs (lshr_optab, "lshr", '3');
4205 init_integral_libfuncs (smin_optab, "min", '3');
4206 init_floating_libfuncs (smin_optab, "min", '3');
4207 init_integral_libfuncs (smax_optab, "max", '3');
4208 init_floating_libfuncs (smax_optab, "max", '3');
4209 init_integral_libfuncs (umin_optab, "umin", '3');
4210 init_integral_libfuncs (umax_optab, "umax", '3');
4211 init_integral_libfuncs (neg_optab, "neg", '2');
4212 init_floating_libfuncs (neg_optab, "neg", '2');
4213 init_integral_libfuncs (one_cmpl_optab, "one_cmpl", '2');
4214 init_integral_libfuncs (ffs_optab, "ffs", '2');
4216 /* Comparison libcalls for integers MUST come in pairs, signed/unsigned. */
4217 init_integral_libfuncs (cmp_optab, "cmp", '2');
4218 init_integral_libfuncs (ucmp_optab, "ucmp", '2');
4219 init_floating_libfuncs (cmp_optab, "cmp", '2');
4221 #ifdef MULSI3_LIBCALL
4222 smul_optab->handlers[(int) SImode].libfunc
4223 = gen_rtx (SYMBOL_REF, Pmode, MULSI3_LIBCALL);
4225 #ifdef MULDI3_LIBCALL
4226 smul_optab->handlers[(int) DImode].libfunc
4227 = gen_rtx (SYMBOL_REF, Pmode, MULDI3_LIBCALL);
4230 #ifdef DIVSI3_LIBCALL
4231 sdiv_optab->handlers[(int) SImode].libfunc
4232 = gen_rtx (SYMBOL_REF, Pmode, DIVSI3_LIBCALL);
4234 #ifdef DIVDI3_LIBCALL
4235 sdiv_optab->handlers[(int) DImode].libfunc
4236 = gen_rtx (SYMBOL_REF, Pmode, DIVDI3_LIBCALL);
4239 #ifdef UDIVSI3_LIBCALL
4240 udiv_optab->handlers[(int) SImode].libfunc
4241 = gen_rtx (SYMBOL_REF, Pmode, UDIVSI3_LIBCALL);
4243 #ifdef UDIVDI3_LIBCALL
4244 udiv_optab->handlers[(int) DImode].libfunc
4245 = gen_rtx (SYMBOL_REF, Pmode, UDIVDI3_LIBCALL);
4248 #ifdef MODSI3_LIBCALL
4249 smod_optab->handlers[(int) SImode].libfunc
4250 = gen_rtx (SYMBOL_REF, Pmode, MODSI3_LIBCALL);
4252 #ifdef MODDI3_LIBCALL
4253 smod_optab->handlers[(int) DImode].libfunc
4254 = gen_rtx (SYMBOL_REF, Pmode, MODDI3_LIBCALL);
4257 #ifdef UMODSI3_LIBCALL
4258 umod_optab->handlers[(int) SImode].libfunc
4259 = gen_rtx (SYMBOL_REF, Pmode, UMODSI3_LIBCALL);
4261 #ifdef UMODDI3_LIBCALL
4262 umod_optab->handlers[(int) DImode].libfunc
4263 = gen_rtx (SYMBOL_REF, Pmode, UMODDI3_LIBCALL);
4266 /* Use cabs for DC complex abs, since systems generally have cabs.
4267 Don't define any libcall for SCmode, so that cabs will be used. */
4268 abs_optab->handlers[(int) DCmode].libfunc
4269 = gen_rtx (SYMBOL_REF, Pmode, "cabs");
4271 /* The ffs function operates on `int'. */
4272 #ifndef INT_TYPE_SIZE
4273 #define INT_TYPE_SIZE BITS_PER_WORD
4275 ffs_optab->handlers[(int) mode_for_size (INT_TYPE_SIZE, MODE_INT, 0)] .libfunc
4276 = gen_rtx (SYMBOL_REF, Pmode, "ffs");
4278 extendsfdf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__extendsfdf2");
4279 extendsfxf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__extendsfxf2");
4280 extendsftf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__extendsftf2");
4281 extenddfxf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__extenddfxf2");
4282 extenddftf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__extenddftf2");
4284 truncdfsf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__truncdfsf2");
4285 truncxfsf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__truncxfsf2");
4286 trunctfsf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__trunctfsf2");
4287 truncxfdf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__truncxfdf2");
4288 trunctfdf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__trunctfdf2");
4290 memcpy_libfunc = gen_rtx (SYMBOL_REF, Pmode, "memcpy");
4291 bcopy_libfunc = gen_rtx (SYMBOL_REF, Pmode, "bcopy");
4292 memcmp_libfunc = gen_rtx (SYMBOL_REF, Pmode, "memcmp");
4293 bcmp_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__gcc_bcmp");
4294 memset_libfunc = gen_rtx (SYMBOL_REF, Pmode, "memset");
4295 bzero_libfunc = gen_rtx (SYMBOL_REF, Pmode, "bzero");
4297 throw_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__throw");
4298 sjthrow_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__sjthrow");
4299 sjpopnthrow_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__sjpopnthrow");
4300 terminate_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__terminate");
4301 #ifndef DONT_USE_BUILTIN_SETJMP
4302 setjmp_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__builtin_setjmp");
4303 longjmp_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__builtin_longjmp");
4305 setjmp_libfunc = gen_rtx (SYMBOL_REF, Pmode, "setjmp");
4306 longjmp_libfunc = gen_rtx (SYMBOL_REF, Pmode, "longjmp");
4309 eqhf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__eqhf2");
4310 nehf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__nehf2");
4311 gthf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__gthf2");
4312 gehf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__gehf2");
4313 lthf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__lthf2");
4314 lehf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__lehf2");
4316 eqsf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__eqsf2");
4317 nesf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__nesf2");
4318 gtsf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__gtsf2");
4319 gesf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__gesf2");
4320 ltsf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__ltsf2");
4321 lesf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__lesf2");
4323 eqdf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__eqdf2");
4324 nedf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__nedf2");
4325 gtdf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__gtdf2");
4326 gedf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__gedf2");
4327 ltdf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__ltdf2");
4328 ledf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__ledf2");
4330 eqxf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__eqxf2");
4331 nexf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__nexf2");
4332 gtxf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__gtxf2");
4333 gexf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__gexf2");
4334 ltxf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__ltxf2");
4335 lexf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__lexf2");
4337 eqtf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__eqtf2");
4338 netf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__netf2");
4339 gttf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__gttf2");
4340 getf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__getf2");
4341 lttf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__lttf2");
4342 letf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__letf2");
4344 floatsisf_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__floatsisf");
4345 floatdisf_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__floatdisf");
4346 floattisf_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__floattisf");
4348 floatsidf_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__floatsidf");
4349 floatdidf_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__floatdidf");
4350 floattidf_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__floattidf");
4352 floatsixf_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__floatsixf");
4353 floatdixf_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__floatdixf");
4354 floattixf_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__floattixf");
4356 floatsitf_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__floatsitf");
4357 floatditf_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__floatditf");
4358 floattitf_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__floattitf");
4360 fixsfsi_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__fixsfsi");
4361 fixsfdi_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__fixsfdi");
4362 fixsfti_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__fixsfti");
4364 fixdfsi_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__fixdfsi");
4365 fixdfdi_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__fixdfdi");
4366 fixdfti_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__fixdfti");
4368 fixxfsi_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__fixxfsi");
4369 fixxfdi_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__fixxfdi");
4370 fixxfti_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__fixxfti");
4372 fixtfsi_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__fixtfsi");
4373 fixtfdi_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__fixtfdi");
4374 fixtfti_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__fixtfti");
4376 fixunssfsi_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__fixunssfsi");
4377 fixunssfdi_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__fixunssfdi");
4378 fixunssfti_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__fixunssfti");
4380 fixunsdfsi_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__fixunsdfsi");
4381 fixunsdfdi_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__fixunsdfdi");
4382 fixunsdfti_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__fixunsdfti");
4384 fixunsxfsi_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__fixunsxfsi");
4385 fixunsxfdi_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__fixunsxfdi");
4386 fixunsxfti_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__fixunsxfti");
4388 fixunstfsi_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__fixunstfsi");
4389 fixunstfdi_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__fixunstfdi");
4390 fixunstfti_libfunc = gen_rtx (SYMBOL_REF, Pmode, "__fixunstfti");
4392 /* For check-memory-usage. */
4393 chkr_check_addr_libfunc = gen_rtx (SYMBOL_REF, VOIDmode, "chkr_check_addr");
4394 chkr_set_right_libfunc = gen_rtx (SYMBOL_REF, VOIDmode, "chkr_set_right");
4395 chkr_copy_bitmap_libfunc = gen_rtx (SYMBOL_REF, VOIDmode, "chkr_copy_bitmap");
4396 chkr_check_exec_libfunc = gen_rtx (SYMBOL_REF, VOIDmode, "chkr_check_exec");
4397 chkr_check_str_libfunc = gen_rtx (SYMBOL_REF, VOIDmode, "chkr_check_str");
4399 #ifdef INIT_TARGET_OPTABS
4400 /* Allow the target to add more libcalls or rename some, etc. */
4407 /* SCO 3.2 apparently has a broken ldexp. */
4420 #endif /* BROKEN_LDEXP */