1 /* Expand the basic unary and binary arithmetic operations, for GNU compiler.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010,
4 2011 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
25 #include "coretypes.h"
27 #include "diagnostic-core.h"
29 /* Include insn-config.h before expr.h so that HAVE_conditional_move
30 is properly defined. */
31 #include "insn-config.h"
44 #include "basic-block.h"
47 struct target_optabs default_target_optabs;
48 struct target_libfuncs default_target_libfuncs;
50 struct target_optabs *this_target_optabs = &default_target_optabs;
51 struct target_libfuncs *this_target_libfuncs = &default_target_libfuncs;
54 #define libfunc_hash \
55 (this_target_libfuncs->x_libfunc_hash)
57 /* Contains the optab used for each rtx code. */
58 optab code_to_optab[NUM_RTX_CODE + 1];
60 static void prepare_float_lib_cmp (rtx, rtx, enum rtx_code, rtx *,
62 static rtx expand_unop_direct (enum machine_mode, optab, rtx, rtx, int);
64 /* Debug facility for use in GDB. */
65 void debug_optab_libfuncs (void);
67 /* Prefixes for the current version of decimal floating point (BID vs. DPD) */
68 #if ENABLE_DECIMAL_BID_FORMAT
69 #define DECIMAL_PREFIX "bid_"
71 #define DECIMAL_PREFIX "dpd_"
74 /* Used for libfunc_hash. */
77 hash_libfunc (const void *p)
79 const struct libfunc_entry *const e = (const struct libfunc_entry *) p;
81 return (((int) e->mode1 + (int) e->mode2 * NUM_MACHINE_MODES)
85 /* Used for libfunc_hash. */
88 eq_libfunc (const void *p, const void *q)
90 const struct libfunc_entry *const e1 = (const struct libfunc_entry *) p;
91 const struct libfunc_entry *const e2 = (const struct libfunc_entry *) q;
93 return (e1->optab == e2->optab
94 && e1->mode1 == e2->mode1
95 && e1->mode2 == e2->mode2);
98 /* Return libfunc corresponding operation defined by OPTAB converting
99 from MODE2 to MODE1. Trigger lazy initialization if needed, return NULL
100 if no libfunc is available. */
102 convert_optab_libfunc (convert_optab optab, enum machine_mode mode1,
103 enum machine_mode mode2)
105 struct libfunc_entry e;
106 struct libfunc_entry **slot;
108 e.optab = (size_t) (optab - &convert_optab_table[0]);
111 slot = (struct libfunc_entry **) htab_find_slot (libfunc_hash, &e, NO_INSERT);
114 if (optab->libcall_gen)
116 optab->libcall_gen (optab, optab->libcall_basename, mode1, mode2);
117 slot = (struct libfunc_entry **) htab_find_slot (libfunc_hash, &e, NO_INSERT);
119 return (*slot)->libfunc;
125 return (*slot)->libfunc;
128 /* Return libfunc corresponding operation defined by OPTAB in MODE.
129 Trigger lazy initialization if needed, return NULL if no libfunc is
132 optab_libfunc (optab optab, enum machine_mode mode)
134 struct libfunc_entry e;
135 struct libfunc_entry **slot;
137 e.optab = (size_t) (optab - &optab_table[0]);
140 slot = (struct libfunc_entry **) htab_find_slot (libfunc_hash, &e, NO_INSERT);
143 if (optab->libcall_gen)
145 optab->libcall_gen (optab, optab->libcall_basename,
146 optab->libcall_suffix, mode);
147 slot = (struct libfunc_entry **) htab_find_slot (libfunc_hash,
150 return (*slot)->libfunc;
156 return (*slot)->libfunc;
160 /* Add a REG_EQUAL note to the last insn in INSNS. TARGET is being set to
161 the result of operation CODE applied to OP0 (and OP1 if it is a binary
164 If the last insn does not set TARGET, don't do anything, but return 1.
166 If a previous insn sets TARGET and TARGET is one of OP0 or OP1,
167 don't add the REG_EQUAL note but return 0. Our caller can then try
168 again, ensuring that TARGET is not one of the operands. */
171 add_equal_note (rtx insns, rtx target, enum rtx_code code, rtx op0, rtx op1)
173 rtx last_insn, insn, set;
176 gcc_assert (insns && INSN_P (insns) && NEXT_INSN (insns));
178 if (GET_RTX_CLASS (code) != RTX_COMM_ARITH
179 && GET_RTX_CLASS (code) != RTX_BIN_ARITH
180 && GET_RTX_CLASS (code) != RTX_COMM_COMPARE
181 && GET_RTX_CLASS (code) != RTX_COMPARE
182 && GET_RTX_CLASS (code) != RTX_UNARY)
185 if (GET_CODE (target) == ZERO_EXTRACT)
188 for (last_insn = insns;
189 NEXT_INSN (last_insn) != NULL_RTX;
190 last_insn = NEXT_INSN (last_insn))
193 set = single_set (last_insn);
197 if (! rtx_equal_p (SET_DEST (set), target)
198 /* For a STRICT_LOW_PART, the REG_NOTE applies to what is inside it. */
199 && (GET_CODE (SET_DEST (set)) != STRICT_LOW_PART
200 || ! rtx_equal_p (XEXP (SET_DEST (set), 0), target)))
203 /* If TARGET is in OP0 or OP1, check if anything in SEQ sets TARGET
204 besides the last insn. */
205 if (reg_overlap_mentioned_p (target, op0)
206 || (op1 && reg_overlap_mentioned_p (target, op1)))
208 insn = PREV_INSN (last_insn);
209 while (insn != NULL_RTX)
211 if (reg_set_p (target, insn))
214 insn = PREV_INSN (insn);
218 if (GET_RTX_CLASS (code) == RTX_UNARY)
228 if (GET_MODE (op0) != VOIDmode && GET_MODE (target) != GET_MODE (op0))
230 note = gen_rtx_fmt_e (code, GET_MODE (op0), copy_rtx (op0));
231 if (GET_MODE_SIZE (GET_MODE (op0))
232 > GET_MODE_SIZE (GET_MODE (target)))
233 note = simplify_gen_unary (TRUNCATE, GET_MODE (target),
234 note, GET_MODE (op0));
236 note = simplify_gen_unary (ZERO_EXTEND, GET_MODE (target),
237 note, GET_MODE (op0));
242 note = gen_rtx_fmt_e (code, GET_MODE (target), copy_rtx (op0));
246 note = gen_rtx_fmt_ee (code, GET_MODE (target), copy_rtx (op0), copy_rtx (op1));
248 set_unique_reg_note (last_insn, REG_EQUAL, note);
253 /* Given two input operands, OP0 and OP1, determine what the correct from_mode
254 for a widening operation would be. In most cases this would be OP0, but if
255 that's a constant it'll be VOIDmode, which isn't useful. */
257 static enum machine_mode
258 widened_mode (enum machine_mode to_mode, rtx op0, rtx op1)
260 enum machine_mode m0 = GET_MODE (op0);
261 enum machine_mode m1 = GET_MODE (op1);
262 enum machine_mode result;
264 if (m0 == VOIDmode && m1 == VOIDmode)
266 else if (m0 == VOIDmode || GET_MODE_SIZE (m0) < GET_MODE_SIZE (m1))
271 if (GET_MODE_SIZE (result) > GET_MODE_SIZE (to_mode))
277 /* Find a widening optab even if it doesn't widen as much as we want.
278 E.g. if from_mode is HImode, and to_mode is DImode, and there is no
279 direct HI->SI insn, then return SI->DI, if that exists.
280 If PERMIT_NON_WIDENING is non-zero then this can be used with
281 non-widening optabs also. */
284 find_widening_optab_handler_and_mode (optab op, enum machine_mode to_mode,
285 enum machine_mode from_mode,
286 int permit_non_widening,
287 enum machine_mode *found_mode)
289 for (; (permit_non_widening || from_mode != to_mode)
290 && GET_MODE_SIZE (from_mode) <= GET_MODE_SIZE (to_mode)
291 && from_mode != VOIDmode;
292 from_mode = GET_MODE_WIDER_MODE (from_mode))
294 enum insn_code handler = widening_optab_handler (op, to_mode,
297 if (handler != CODE_FOR_nothing)
300 *found_mode = from_mode;
305 return CODE_FOR_nothing;
308 /* Widen OP to MODE and return the rtx for the widened operand. UNSIGNEDP
309 says whether OP is signed or unsigned. NO_EXTEND is nonzero if we need
310 not actually do a sign-extend or zero-extend, but can leave the
311 higher-order bits of the result rtx undefined, for example, in the case
312 of logical operations, but not right shifts. */
315 widen_operand (rtx op, enum machine_mode mode, enum machine_mode oldmode,
316 int unsignedp, int no_extend)
320 /* If we don't have to extend and this is a constant, return it. */
321 if (no_extend && GET_MODE (op) == VOIDmode)
324 /* If we must extend do so. If OP is a SUBREG for a promoted object, also
325 extend since it will be more efficient to do so unless the signedness of
326 a promoted object differs from our extension. */
328 || (GET_CODE (op) == SUBREG && SUBREG_PROMOTED_VAR_P (op)
329 && SUBREG_PROMOTED_UNSIGNED_P (op) == unsignedp))
330 return convert_modes (mode, oldmode, op, unsignedp);
332 /* If MODE is no wider than a single word, we return a paradoxical
334 if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD)
335 return gen_rtx_SUBREG (mode, force_reg (GET_MODE (op), op), 0);
337 /* Otherwise, get an object of MODE, clobber it, and set the low-order
340 result = gen_reg_rtx (mode);
341 emit_clobber (result);
342 emit_move_insn (gen_lowpart (GET_MODE (op), result), op);
346 /* Return the optab used for computing the operation given by the tree code,
347 CODE and the tree EXP. This function is not always usable (for example, it
348 cannot give complete results for multiplication or division) but probably
349 ought to be relied on more widely throughout the expander. */
351 optab_for_tree_code (enum tree_code code, const_tree type,
352 enum optab_subtype subtype)
364 return one_cmpl_optab;
373 return TYPE_UNSIGNED (type) ? umod_optab : smod_optab;
381 if (TYPE_SATURATING(type))
382 return TYPE_UNSIGNED(type) ? usdiv_optab : ssdiv_optab;
383 return TYPE_UNSIGNED (type) ? udiv_optab : sdiv_optab;
386 if (TREE_CODE (type) == VECTOR_TYPE)
388 if (subtype == optab_vector)
389 return TYPE_SATURATING (type) ? NULL : vashl_optab;
391 gcc_assert (subtype == optab_scalar);
393 if (TYPE_SATURATING(type))
394 return TYPE_UNSIGNED(type) ? usashl_optab : ssashl_optab;
398 if (TREE_CODE (type) == VECTOR_TYPE)
400 if (subtype == optab_vector)
401 return TYPE_UNSIGNED (type) ? vlshr_optab : vashr_optab;
403 gcc_assert (subtype == optab_scalar);
405 return TYPE_UNSIGNED (type) ? lshr_optab : ashr_optab;
408 if (TREE_CODE (type) == VECTOR_TYPE)
410 if (subtype == optab_vector)
413 gcc_assert (subtype == optab_scalar);
418 if (TREE_CODE (type) == VECTOR_TYPE)
420 if (subtype == optab_vector)
423 gcc_assert (subtype == optab_scalar);
428 return TYPE_UNSIGNED (type) ? umax_optab : smax_optab;
431 return TYPE_UNSIGNED (type) ? umin_optab : smin_optab;
433 case REALIGN_LOAD_EXPR:
434 return vec_realign_load_optab;
437 return TYPE_UNSIGNED (type) ? usum_widen_optab : ssum_widen_optab;
440 return TYPE_UNSIGNED (type) ? udot_prod_optab : sdot_prod_optab;
442 case WIDEN_MULT_PLUS_EXPR:
443 return (TYPE_UNSIGNED (type)
444 ? (TYPE_SATURATING (type)
445 ? usmadd_widen_optab : umadd_widen_optab)
446 : (TYPE_SATURATING (type)
447 ? ssmadd_widen_optab : smadd_widen_optab));
449 case WIDEN_MULT_MINUS_EXPR:
450 return (TYPE_UNSIGNED (type)
451 ? (TYPE_SATURATING (type)
452 ? usmsub_widen_optab : umsub_widen_optab)
453 : (TYPE_SATURATING (type)
454 ? ssmsub_widen_optab : smsub_widen_optab));
460 return TYPE_UNSIGNED (type) ? reduc_umax_optab : reduc_smax_optab;
463 return TYPE_UNSIGNED (type) ? reduc_umin_optab : reduc_smin_optab;
465 case REDUC_PLUS_EXPR:
466 return TYPE_UNSIGNED (type) ? reduc_uplus_optab : reduc_splus_optab;
468 case VEC_LSHIFT_EXPR:
469 return vec_shl_optab;
471 case VEC_RSHIFT_EXPR:
472 return vec_shr_optab;
474 case VEC_WIDEN_MULT_HI_EXPR:
475 return TYPE_UNSIGNED (type) ?
476 vec_widen_umult_hi_optab : vec_widen_smult_hi_optab;
478 case VEC_WIDEN_MULT_LO_EXPR:
479 return TYPE_UNSIGNED (type) ?
480 vec_widen_umult_lo_optab : vec_widen_smult_lo_optab;
482 case VEC_WIDEN_LSHIFT_HI_EXPR:
483 return TYPE_UNSIGNED (type) ?
484 vec_widen_ushiftl_hi_optab : vec_widen_sshiftl_hi_optab;
486 case VEC_WIDEN_LSHIFT_LO_EXPR:
487 return TYPE_UNSIGNED (type) ?
488 vec_widen_ushiftl_lo_optab : vec_widen_sshiftl_lo_optab;
490 case VEC_UNPACK_HI_EXPR:
491 return TYPE_UNSIGNED (type) ?
492 vec_unpacku_hi_optab : vec_unpacks_hi_optab;
494 case VEC_UNPACK_LO_EXPR:
495 return TYPE_UNSIGNED (type) ?
496 vec_unpacku_lo_optab : vec_unpacks_lo_optab;
498 case VEC_UNPACK_FLOAT_HI_EXPR:
499 /* The signedness is determined from input operand. */
500 return TYPE_UNSIGNED (type) ?
501 vec_unpacku_float_hi_optab : vec_unpacks_float_hi_optab;
503 case VEC_UNPACK_FLOAT_LO_EXPR:
504 /* The signedness is determined from input operand. */
505 return TYPE_UNSIGNED (type) ?
506 vec_unpacku_float_lo_optab : vec_unpacks_float_lo_optab;
508 case VEC_PACK_TRUNC_EXPR:
509 return vec_pack_trunc_optab;
511 case VEC_PACK_SAT_EXPR:
512 return TYPE_UNSIGNED (type) ? vec_pack_usat_optab : vec_pack_ssat_optab;
514 case VEC_PACK_FIX_TRUNC_EXPR:
515 /* The signedness is determined from output operand. */
516 return TYPE_UNSIGNED (type) ?
517 vec_pack_ufix_trunc_optab : vec_pack_sfix_trunc_optab;
523 trapv = INTEGRAL_TYPE_P (type) && TYPE_OVERFLOW_TRAPS (type);
526 case POINTER_PLUS_EXPR:
528 if (TYPE_SATURATING(type))
529 return TYPE_UNSIGNED(type) ? usadd_optab : ssadd_optab;
530 return trapv ? addv_optab : add_optab;
533 if (TYPE_SATURATING(type))
534 return TYPE_UNSIGNED(type) ? ussub_optab : sssub_optab;
535 return trapv ? subv_optab : sub_optab;
538 if (TYPE_SATURATING(type))
539 return TYPE_UNSIGNED(type) ? usmul_optab : ssmul_optab;
540 return trapv ? smulv_optab : smul_optab;
543 if (TYPE_SATURATING(type))
544 return TYPE_UNSIGNED(type) ? usneg_optab : ssneg_optab;
545 return trapv ? negv_optab : neg_optab;
548 return trapv ? absv_optab : abs_optab;
550 case VEC_EXTRACT_EVEN_EXPR:
551 return vec_extract_even_optab;
553 case VEC_EXTRACT_ODD_EXPR:
554 return vec_extract_odd_optab;
556 case VEC_INTERLEAVE_HIGH_EXPR:
557 return vec_interleave_high_optab;
559 case VEC_INTERLEAVE_LOW_EXPR:
560 return vec_interleave_low_optab;
568 /* Expand vector widening operations.
570 There are two different classes of operations handled here:
571 1) Operations whose result is wider than all the arguments to the operation.
572 Examples: VEC_UNPACK_HI/LO_EXPR, VEC_WIDEN_MULT_HI/LO_EXPR
573 In this case OP0 and optionally OP1 would be initialized,
574 but WIDE_OP wouldn't (not relevant for this case).
575 2) Operations whose result is of the same size as the last argument to the
576 operation, but wider than all the other arguments to the operation.
577 Examples: WIDEN_SUM_EXPR, VEC_DOT_PROD_EXPR.
578 In the case WIDE_OP, OP0 and optionally OP1 would be initialized.
580 E.g, when called to expand the following operations, this is how
581 the arguments will be initialized:
583 widening-sum 2 oprnd0 - oprnd1
584 widening-dot-product 3 oprnd0 oprnd1 oprnd2
585 widening-mult 2 oprnd0 oprnd1 -
586 type-promotion (vec-unpack) 1 oprnd0 - - */
589 expand_widen_pattern_expr (sepops ops, rtx op0, rtx op1, rtx wide_op,
590 rtx target, int unsignedp)
592 struct expand_operand eops[4];
593 tree oprnd0, oprnd1, oprnd2;
594 enum machine_mode wmode = VOIDmode, tmode0, tmode1 = VOIDmode;
595 optab widen_pattern_optab;
596 enum insn_code icode;
597 int nops = TREE_CODE_LENGTH (ops->code);
601 tmode0 = TYPE_MODE (TREE_TYPE (oprnd0));
602 widen_pattern_optab =
603 optab_for_tree_code (ops->code, TREE_TYPE (oprnd0), optab_default);
604 if (ops->code == WIDEN_MULT_PLUS_EXPR
605 || ops->code == WIDEN_MULT_MINUS_EXPR)
606 icode = find_widening_optab_handler (widen_pattern_optab,
607 TYPE_MODE (TREE_TYPE (ops->op2)),
610 icode = optab_handler (widen_pattern_optab, tmode0);
611 gcc_assert (icode != CODE_FOR_nothing);
616 tmode1 = TYPE_MODE (TREE_TYPE (oprnd1));
619 /* The last operand is of a wider mode than the rest of the operands. */
624 gcc_assert (tmode1 == tmode0);
627 wmode = TYPE_MODE (TREE_TYPE (oprnd2));
631 create_output_operand (&eops[op++], target, TYPE_MODE (ops->type));
632 create_convert_operand_from (&eops[op++], op0, tmode0, unsignedp);
634 create_convert_operand_from (&eops[op++], op1, tmode1, unsignedp);
636 create_convert_operand_from (&eops[op++], wide_op, wmode, unsignedp);
637 expand_insn (icode, op, eops);
638 return eops[0].value;
641 /* Generate code to perform an operation specified by TERNARY_OPTAB
642 on operands OP0, OP1 and OP2, with result having machine-mode MODE.
644 UNSIGNEDP is for the case where we have to widen the operands
645 to perform the operation. It says to use zero-extension.
647 If TARGET is nonzero, the value
648 is generated there, if it is convenient to do so.
649 In all cases an rtx is returned for the locus of the value;
650 this may or may not be TARGET. */
653 expand_ternary_op (enum machine_mode mode, optab ternary_optab, rtx op0,
654 rtx op1, rtx op2, rtx target, int unsignedp)
656 struct expand_operand ops[4];
657 enum insn_code icode = optab_handler (ternary_optab, mode);
659 gcc_assert (optab_handler (ternary_optab, mode) != CODE_FOR_nothing);
661 create_output_operand (&ops[0], target, mode);
662 create_convert_operand_from (&ops[1], op0, mode, unsignedp);
663 create_convert_operand_from (&ops[2], op1, mode, unsignedp);
664 create_convert_operand_from (&ops[3], op2, mode, unsignedp);
665 expand_insn (icode, 4, ops);
670 /* Like expand_binop, but return a constant rtx if the result can be
671 calculated at compile time. The arguments and return value are
672 otherwise the same as for expand_binop. */
675 simplify_expand_binop (enum machine_mode mode, optab binoptab,
676 rtx op0, rtx op1, rtx target, int unsignedp,
677 enum optab_methods methods)
679 if (CONSTANT_P (op0) && CONSTANT_P (op1))
681 rtx x = simplify_binary_operation (binoptab->code, mode, op0, op1);
687 return expand_binop (mode, binoptab, op0, op1, target, unsignedp, methods);
690 /* Like simplify_expand_binop, but always put the result in TARGET.
691 Return true if the expansion succeeded. */
694 force_expand_binop (enum machine_mode mode, optab binoptab,
695 rtx op0, rtx op1, rtx target, int unsignedp,
696 enum optab_methods methods)
698 rtx x = simplify_expand_binop (mode, binoptab, op0, op1,
699 target, unsignedp, methods);
703 emit_move_insn (target, x);
707 /* Generate insns for VEC_LSHIFT_EXPR, VEC_RSHIFT_EXPR. */
710 expand_vec_shift_expr (sepops ops, rtx target)
712 struct expand_operand eops[3];
713 enum insn_code icode;
714 rtx rtx_op1, rtx_op2;
715 enum machine_mode mode = TYPE_MODE (ops->type);
716 tree vec_oprnd = ops->op0;
717 tree shift_oprnd = ops->op1;
722 case VEC_RSHIFT_EXPR:
723 shift_optab = vec_shr_optab;
725 case VEC_LSHIFT_EXPR:
726 shift_optab = vec_shl_optab;
732 icode = optab_handler (shift_optab, mode);
733 gcc_assert (icode != CODE_FOR_nothing);
735 rtx_op1 = expand_normal (vec_oprnd);
736 rtx_op2 = expand_normal (shift_oprnd);
738 create_output_operand (&eops[0], target, mode);
739 create_input_operand (&eops[1], rtx_op1, GET_MODE (rtx_op1));
740 create_convert_operand_from_type (&eops[2], rtx_op2, TREE_TYPE (shift_oprnd));
741 expand_insn (icode, 3, eops);
743 return eops[0].value;
746 /* Create a new vector value in VMODE with all elements set to OP. The
747 mode of OP must be the element mode of VMODE. If OP is a constant,
748 then the return value will be a constant. */
751 expand_vector_broadcast (enum machine_mode vmode, rtx op)
753 enum insn_code icode;
758 gcc_checking_assert (VECTOR_MODE_P (vmode));
760 n = GET_MODE_NUNITS (vmode);
761 vec = rtvec_alloc (n);
762 for (i = 0; i < n; ++i)
763 RTVEC_ELT (vec, i) = op;
766 return gen_rtx_CONST_VECTOR (vmode, vec);
768 /* ??? If the target doesn't have a vec_init, then we have no easy way
769 of performing this operation. Most of this sort of generic support
770 is hidden away in the vector lowering support in gimple. */
771 icode = optab_handler (vec_init_optab, vmode);
772 if (icode == CODE_FOR_nothing)
775 ret = gen_reg_rtx (vmode);
776 emit_insn (GEN_FCN (icode) (ret, gen_rtx_PARALLEL (vmode, vec)));
781 /* This subroutine of expand_doubleword_shift handles the cases in which
782 the effective shift value is >= BITS_PER_WORD. The arguments and return
783 value are the same as for the parent routine, except that SUPERWORD_OP1
784 is the shift count to use when shifting OUTOF_INPUT into INTO_TARGET.
785 INTO_TARGET may be null if the caller has decided to calculate it. */
788 expand_superword_shift (optab binoptab, rtx outof_input, rtx superword_op1,
789 rtx outof_target, rtx into_target,
790 int unsignedp, enum optab_methods methods)
792 if (into_target != 0)
793 if (!force_expand_binop (word_mode, binoptab, outof_input, superword_op1,
794 into_target, unsignedp, methods))
797 if (outof_target != 0)
799 /* For a signed right shift, we must fill OUTOF_TARGET with copies
800 of the sign bit, otherwise we must fill it with zeros. */
801 if (binoptab != ashr_optab)
802 emit_move_insn (outof_target, CONST0_RTX (word_mode));
804 if (!force_expand_binop (word_mode, binoptab,
805 outof_input, GEN_INT (BITS_PER_WORD - 1),
806 outof_target, unsignedp, methods))
812 /* This subroutine of expand_doubleword_shift handles the cases in which
813 the effective shift value is < BITS_PER_WORD. The arguments and return
814 value are the same as for the parent routine. */
817 expand_subword_shift (enum machine_mode op1_mode, optab binoptab,
818 rtx outof_input, rtx into_input, rtx op1,
819 rtx outof_target, rtx into_target,
820 int unsignedp, enum optab_methods methods,
821 unsigned HOST_WIDE_INT shift_mask)
823 optab reverse_unsigned_shift, unsigned_shift;
826 reverse_unsigned_shift = (binoptab == ashl_optab ? lshr_optab : ashl_optab);
827 unsigned_shift = (binoptab == ashl_optab ? ashl_optab : lshr_optab);
829 /* The low OP1 bits of INTO_TARGET come from the high bits of OUTOF_INPUT.
830 We therefore need to shift OUTOF_INPUT by (BITS_PER_WORD - OP1) bits in
831 the opposite direction to BINOPTAB. */
832 if (CONSTANT_P (op1) || shift_mask >= BITS_PER_WORD)
834 carries = outof_input;
835 tmp = immed_double_const (BITS_PER_WORD, 0, op1_mode);
836 tmp = simplify_expand_binop (op1_mode, sub_optab, tmp, op1,
841 /* We must avoid shifting by BITS_PER_WORD bits since that is either
842 the same as a zero shift (if shift_mask == BITS_PER_WORD - 1) or
843 has unknown behavior. Do a single shift first, then shift by the
844 remainder. It's OK to use ~OP1 as the remainder if shift counts
845 are truncated to the mode size. */
846 carries = expand_binop (word_mode, reverse_unsigned_shift,
847 outof_input, const1_rtx, 0, unsignedp, methods);
848 if (shift_mask == BITS_PER_WORD - 1)
850 tmp = immed_double_const (-1, -1, op1_mode);
851 tmp = simplify_expand_binop (op1_mode, xor_optab, op1, tmp,
856 tmp = immed_double_const (BITS_PER_WORD - 1, 0, op1_mode);
857 tmp = simplify_expand_binop (op1_mode, sub_optab, tmp, op1,
861 if (tmp == 0 || carries == 0)
863 carries = expand_binop (word_mode, reverse_unsigned_shift,
864 carries, tmp, 0, unsignedp, methods);
868 /* Shift INTO_INPUT logically by OP1. This is the last use of INTO_INPUT
869 so the result can go directly into INTO_TARGET if convenient. */
870 tmp = expand_binop (word_mode, unsigned_shift, into_input, op1,
871 into_target, unsignedp, methods);
875 /* Now OR in the bits carried over from OUTOF_INPUT. */
876 if (!force_expand_binop (word_mode, ior_optab, tmp, carries,
877 into_target, unsignedp, methods))
880 /* Use a standard word_mode shift for the out-of half. */
881 if (outof_target != 0)
882 if (!force_expand_binop (word_mode, binoptab, outof_input, op1,
883 outof_target, unsignedp, methods))
890 #ifdef HAVE_conditional_move
891 /* Try implementing expand_doubleword_shift using conditional moves.
892 The shift is by < BITS_PER_WORD if (CMP_CODE CMP1 CMP2) is true,
893 otherwise it is by >= BITS_PER_WORD. SUBWORD_OP1 and SUPERWORD_OP1
894 are the shift counts to use in the former and latter case. All other
895 arguments are the same as the parent routine. */
898 expand_doubleword_shift_condmove (enum machine_mode op1_mode, optab binoptab,
899 enum rtx_code cmp_code, rtx cmp1, rtx cmp2,
900 rtx outof_input, rtx into_input,
901 rtx subword_op1, rtx superword_op1,
902 rtx outof_target, rtx into_target,
903 int unsignedp, enum optab_methods methods,
904 unsigned HOST_WIDE_INT shift_mask)
906 rtx outof_superword, into_superword;
908 /* Put the superword version of the output into OUTOF_SUPERWORD and
910 outof_superword = outof_target != 0 ? gen_reg_rtx (word_mode) : 0;
911 if (outof_target != 0 && subword_op1 == superword_op1)
913 /* The value INTO_TARGET >> SUBWORD_OP1, which we later store in
914 OUTOF_TARGET, is the same as the value of INTO_SUPERWORD. */
915 into_superword = outof_target;
916 if (!expand_superword_shift (binoptab, outof_input, superword_op1,
917 outof_superword, 0, unsignedp, methods))
922 into_superword = gen_reg_rtx (word_mode);
923 if (!expand_superword_shift (binoptab, outof_input, superword_op1,
924 outof_superword, into_superword,
929 /* Put the subword version directly in OUTOF_TARGET and INTO_TARGET. */
930 if (!expand_subword_shift (op1_mode, binoptab,
931 outof_input, into_input, subword_op1,
932 outof_target, into_target,
933 unsignedp, methods, shift_mask))
936 /* Select between them. Do the INTO half first because INTO_SUPERWORD
937 might be the current value of OUTOF_TARGET. */
938 if (!emit_conditional_move (into_target, cmp_code, cmp1, cmp2, op1_mode,
939 into_target, into_superword, word_mode, false))
942 if (outof_target != 0)
943 if (!emit_conditional_move (outof_target, cmp_code, cmp1, cmp2, op1_mode,
944 outof_target, outof_superword,
952 /* Expand a doubleword shift (ashl, ashr or lshr) using word-mode shifts.
953 OUTOF_INPUT and INTO_INPUT are the two word-sized halves of the first
954 input operand; the shift moves bits in the direction OUTOF_INPUT->
955 INTO_TARGET. OUTOF_TARGET and INTO_TARGET are the equivalent words
956 of the target. OP1 is the shift count and OP1_MODE is its mode.
957 If OP1 is constant, it will have been truncated as appropriate
958 and is known to be nonzero.
960 If SHIFT_MASK is zero, the result of word shifts is undefined when the
961 shift count is outside the range [0, BITS_PER_WORD). This routine must
962 avoid generating such shifts for OP1s in the range [0, BITS_PER_WORD * 2).
964 If SHIFT_MASK is nonzero, all word-mode shift counts are effectively
965 masked by it and shifts in the range [BITS_PER_WORD, SHIFT_MASK) will
966 fill with zeros or sign bits as appropriate.
968 If SHIFT_MASK is BITS_PER_WORD - 1, this routine will synthesize
969 a doubleword shift whose equivalent mask is BITS_PER_WORD * 2 - 1.
970 Doing this preserves semantics required by SHIFT_COUNT_TRUNCATED.
971 In all other cases, shifts by values outside [0, BITS_PER_UNIT * 2)
974 BINOPTAB, UNSIGNEDP and METHODS are as for expand_binop. This function
975 may not use INTO_INPUT after modifying INTO_TARGET, and similarly for
976 OUTOF_INPUT and OUTOF_TARGET. OUTOF_TARGET can be null if the parent
977 function wants to calculate it itself.
979 Return true if the shift could be successfully synthesized. */
982 expand_doubleword_shift (enum machine_mode op1_mode, optab binoptab,
983 rtx outof_input, rtx into_input, rtx op1,
984 rtx outof_target, rtx into_target,
985 int unsignedp, enum optab_methods methods,
986 unsigned HOST_WIDE_INT shift_mask)
988 rtx superword_op1, tmp, cmp1, cmp2;
989 rtx subword_label, done_label;
990 enum rtx_code cmp_code;
992 /* See if word-mode shifts by BITS_PER_WORD...BITS_PER_WORD * 2 - 1 will
993 fill the result with sign or zero bits as appropriate. If so, the value
994 of OUTOF_TARGET will always be (SHIFT OUTOF_INPUT OP1). Recursively call
995 this routine to calculate INTO_TARGET (which depends on both OUTOF_INPUT
996 and INTO_INPUT), then emit code to set up OUTOF_TARGET.
998 This isn't worthwhile for constant shifts since the optimizers will
999 cope better with in-range shift counts. */
1000 if (shift_mask >= BITS_PER_WORD
1001 && outof_target != 0
1002 && !CONSTANT_P (op1))
1004 if (!expand_doubleword_shift (op1_mode, binoptab,
1005 outof_input, into_input, op1,
1007 unsignedp, methods, shift_mask))
1009 if (!force_expand_binop (word_mode, binoptab, outof_input, op1,
1010 outof_target, unsignedp, methods))
1015 /* Set CMP_CODE, CMP1 and CMP2 so that the rtx (CMP_CODE CMP1 CMP2)
1016 is true when the effective shift value is less than BITS_PER_WORD.
1017 Set SUPERWORD_OP1 to the shift count that should be used to shift
1018 OUTOF_INPUT into INTO_TARGET when the condition is false. */
1019 tmp = immed_double_const (BITS_PER_WORD, 0, op1_mode);
1020 if (!CONSTANT_P (op1) && shift_mask == BITS_PER_WORD - 1)
1022 /* Set CMP1 to OP1 & BITS_PER_WORD. The result is zero iff OP1
1023 is a subword shift count. */
1024 cmp1 = simplify_expand_binop (op1_mode, and_optab, op1, tmp,
1026 cmp2 = CONST0_RTX (op1_mode);
1028 superword_op1 = op1;
1032 /* Set CMP1 to OP1 - BITS_PER_WORD. */
1033 cmp1 = simplify_expand_binop (op1_mode, sub_optab, op1, tmp,
1035 cmp2 = CONST0_RTX (op1_mode);
1037 superword_op1 = cmp1;
1042 /* If we can compute the condition at compile time, pick the
1043 appropriate subroutine. */
1044 tmp = simplify_relational_operation (cmp_code, SImode, op1_mode, cmp1, cmp2);
1045 if (tmp != 0 && CONST_INT_P (tmp))
1047 if (tmp == const0_rtx)
1048 return expand_superword_shift (binoptab, outof_input, superword_op1,
1049 outof_target, into_target,
1050 unsignedp, methods);
1052 return expand_subword_shift (op1_mode, binoptab,
1053 outof_input, into_input, op1,
1054 outof_target, into_target,
1055 unsignedp, methods, shift_mask);
1058 #ifdef HAVE_conditional_move
1059 /* Try using conditional moves to generate straight-line code. */
1061 rtx start = get_last_insn ();
1062 if (expand_doubleword_shift_condmove (op1_mode, binoptab,
1063 cmp_code, cmp1, cmp2,
1064 outof_input, into_input,
1066 outof_target, into_target,
1067 unsignedp, methods, shift_mask))
1069 delete_insns_since (start);
1073 /* As a last resort, use branches to select the correct alternative. */
1074 subword_label = gen_label_rtx ();
1075 done_label = gen_label_rtx ();
1078 do_compare_rtx_and_jump (cmp1, cmp2, cmp_code, false, op1_mode,
1079 0, 0, subword_label, -1);
1082 if (!expand_superword_shift (binoptab, outof_input, superword_op1,
1083 outof_target, into_target,
1084 unsignedp, methods))
1087 emit_jump_insn (gen_jump (done_label));
1089 emit_label (subword_label);
1091 if (!expand_subword_shift (op1_mode, binoptab,
1092 outof_input, into_input, op1,
1093 outof_target, into_target,
1094 unsignedp, methods, shift_mask))
1097 emit_label (done_label);
1101 /* Subroutine of expand_binop. Perform a double word multiplication of
1102 operands OP0 and OP1 both of mode MODE, which is exactly twice as wide
1103 as the target's word_mode. This function return NULL_RTX if anything
1104 goes wrong, in which case it may have already emitted instructions
1105 which need to be deleted.
1107 If we want to multiply two two-word values and have normal and widening
1108 multiplies of single-word values, we can do this with three smaller
1111 The multiplication proceeds as follows:
1112 _______________________
1113 [__op0_high_|__op0_low__]
1114 _______________________
1115 * [__op1_high_|__op1_low__]
1116 _______________________________________________
1117 _______________________
1118 (1) [__op0_low__*__op1_low__]
1119 _______________________
1120 (2a) [__op0_low__*__op1_high_]
1121 _______________________
1122 (2b) [__op0_high_*__op1_low__]
1123 _______________________
1124 (3) [__op0_high_*__op1_high_]
1127 This gives a 4-word result. Since we are only interested in the
1128 lower 2 words, partial result (3) and the upper words of (2a) and
1129 (2b) don't need to be calculated. Hence (2a) and (2b) can be
1130 calculated using non-widening multiplication.
1132 (1), however, needs to be calculated with an unsigned widening
1133 multiplication. If this operation is not directly supported we
1134 try using a signed widening multiplication and adjust the result.
1135 This adjustment works as follows:
1137 If both operands are positive then no adjustment is needed.
1139 If the operands have different signs, for example op0_low < 0 and
1140 op1_low >= 0, the instruction treats the most significant bit of
1141 op0_low as a sign bit instead of a bit with significance
1142 2**(BITS_PER_WORD-1), i.e. the instruction multiplies op1_low
1143 with 2**BITS_PER_WORD - op0_low, and two's complements the
1144 result. Conclusion: We need to add op1_low * 2**BITS_PER_WORD to
1147 Similarly, if both operands are negative, we need to add
1148 (op0_low + op1_low) * 2**BITS_PER_WORD.
1150 We use a trick to adjust quickly. We logically shift op0_low right
1151 (op1_low) BITS_PER_WORD-1 steps to get 0 or 1, and add this to
1152 op0_high (op1_high) before it is used to calculate 2b (2a). If no
1153 logical shift exists, we do an arithmetic right shift and subtract
1157 expand_doubleword_mult (enum machine_mode mode, rtx op0, rtx op1, rtx target,
1158 bool umulp, enum optab_methods methods)
1160 int low = (WORDS_BIG_ENDIAN ? 1 : 0);
1161 int high = (WORDS_BIG_ENDIAN ? 0 : 1);
1162 rtx wordm1 = umulp ? NULL_RTX : GEN_INT (BITS_PER_WORD - 1);
1163 rtx product, adjust, product_high, temp;
1165 rtx op0_high = operand_subword_force (op0, high, mode);
1166 rtx op0_low = operand_subword_force (op0, low, mode);
1167 rtx op1_high = operand_subword_force (op1, high, mode);
1168 rtx op1_low = operand_subword_force (op1, low, mode);
1170 /* If we're using an unsigned multiply to directly compute the product
1171 of the low-order words of the operands and perform any required
1172 adjustments of the operands, we begin by trying two more multiplications
1173 and then computing the appropriate sum.
1175 We have checked above that the required addition is provided.
1176 Full-word addition will normally always succeed, especially if
1177 it is provided at all, so we don't worry about its failure. The
1178 multiplication may well fail, however, so we do handle that. */
1182 /* ??? This could be done with emit_store_flag where available. */
1183 temp = expand_binop (word_mode, lshr_optab, op0_low, wordm1,
1184 NULL_RTX, 1, methods);
1186 op0_high = expand_binop (word_mode, add_optab, op0_high, temp,
1187 NULL_RTX, 0, OPTAB_DIRECT);
1190 temp = expand_binop (word_mode, ashr_optab, op0_low, wordm1,
1191 NULL_RTX, 0, methods);
1194 op0_high = expand_binop (word_mode, sub_optab, op0_high, temp,
1195 NULL_RTX, 0, OPTAB_DIRECT);
1202 adjust = expand_binop (word_mode, smul_optab, op0_high, op1_low,
1203 NULL_RTX, 0, OPTAB_DIRECT);
1207 /* OP0_HIGH should now be dead. */
1211 /* ??? This could be done with emit_store_flag where available. */
1212 temp = expand_binop (word_mode, lshr_optab, op1_low, wordm1,
1213 NULL_RTX, 1, methods);
1215 op1_high = expand_binop (word_mode, add_optab, op1_high, temp,
1216 NULL_RTX, 0, OPTAB_DIRECT);
1219 temp = expand_binop (word_mode, ashr_optab, op1_low, wordm1,
1220 NULL_RTX, 0, methods);
1223 op1_high = expand_binop (word_mode, sub_optab, op1_high, temp,
1224 NULL_RTX, 0, OPTAB_DIRECT);
1231 temp = expand_binop (word_mode, smul_optab, op1_high, op0_low,
1232 NULL_RTX, 0, OPTAB_DIRECT);
1236 /* OP1_HIGH should now be dead. */
1238 adjust = expand_binop (word_mode, add_optab, adjust, temp,
1239 NULL_RTX, 0, OPTAB_DIRECT);
1241 if (target && !REG_P (target))
1245 product = expand_binop (mode, umul_widen_optab, op0_low, op1_low,
1246 target, 1, OPTAB_DIRECT);
1248 product = expand_binop (mode, smul_widen_optab, op0_low, op1_low,
1249 target, 1, OPTAB_DIRECT);
1254 product_high = operand_subword (product, high, 1, mode);
1255 adjust = expand_binop (word_mode, add_optab, product_high, adjust,
1256 NULL_RTX, 0, OPTAB_DIRECT);
1257 emit_move_insn (product_high, adjust);
1261 /* Wrapper around expand_binop which takes an rtx code to specify
1262 the operation to perform, not an optab pointer. All other
1263 arguments are the same. */
1265 expand_simple_binop (enum machine_mode mode, enum rtx_code code, rtx op0,
1266 rtx op1, rtx target, int unsignedp,
1267 enum optab_methods methods)
1269 optab binop = code_to_optab[(int) code];
1272 return expand_binop (mode, binop, op0, op1, target, unsignedp, methods);
1275 /* Return whether OP0 and OP1 should be swapped when expanding a commutative
1276 binop. Order them according to commutative_operand_precedence and, if
1277 possible, try to put TARGET or a pseudo first. */
1279 swap_commutative_operands_with_target (rtx target, rtx op0, rtx op1)
1281 int op0_prec = commutative_operand_precedence (op0);
1282 int op1_prec = commutative_operand_precedence (op1);
1284 if (op0_prec < op1_prec)
1287 if (op0_prec > op1_prec)
1290 /* With equal precedence, both orders are ok, but it is better if the
1291 first operand is TARGET, or if both TARGET and OP0 are pseudos. */
1292 if (target == 0 || REG_P (target))
1293 return (REG_P (op1) && !REG_P (op0)) || target == op1;
1295 return rtx_equal_p (op1, target);
1298 /* Return true if BINOPTAB implements a shift operation. */
1301 shift_optab_p (optab binoptab)
1303 switch (binoptab->code)
1319 /* Return true if BINOPTAB implements a commutative binary operation. */
1322 commutative_optab_p (optab binoptab)
1324 return (GET_RTX_CLASS (binoptab->code) == RTX_COMM_ARITH
1325 || binoptab == smul_widen_optab
1326 || binoptab == umul_widen_optab
1327 || binoptab == smul_highpart_optab
1328 || binoptab == umul_highpart_optab);
1331 /* X is to be used in mode MODE as operand OPN to BINOPTAB. If we're
1332 optimizing, and if the operand is a constant that costs more than
1333 1 instruction, force the constant into a register and return that
1334 register. Return X otherwise. UNSIGNEDP says whether X is unsigned. */
1337 avoid_expensive_constant (enum machine_mode mode, optab binoptab,
1338 int opn, rtx x, bool unsignedp)
1340 bool speed = optimize_insn_for_speed_p ();
1342 if (mode != VOIDmode
1345 && rtx_cost (x, binoptab->code, opn, speed) > set_src_cost (x, speed))
1347 if (CONST_INT_P (x))
1349 HOST_WIDE_INT intval = trunc_int_for_mode (INTVAL (x), mode);
1350 if (intval != INTVAL (x))
1351 x = GEN_INT (intval);
1354 x = convert_modes (mode, VOIDmode, x, unsignedp);
1355 x = force_reg (mode, x);
1360 /* Helper function for expand_binop: handle the case where there
1361 is an insn that directly implements the indicated operation.
1362 Returns null if this is not possible. */
1364 expand_binop_directly (enum machine_mode mode, optab binoptab,
1366 rtx target, int unsignedp, enum optab_methods methods,
1369 enum machine_mode from_mode = widened_mode (mode, op0, op1);
1370 enum insn_code icode = find_widening_optab_handler (binoptab, mode,
1372 enum machine_mode xmode0 = insn_data[(int) icode].operand[1].mode;
1373 enum machine_mode xmode1 = insn_data[(int) icode].operand[2].mode;
1374 enum machine_mode mode0, mode1, tmp_mode;
1375 struct expand_operand ops[3];
1378 rtx xop0 = op0, xop1 = op1;
1381 /* If it is a commutative operator and the modes would match
1382 if we would swap the operands, we can save the conversions. */
1383 commutative_p = commutative_optab_p (binoptab);
1385 && GET_MODE (xop0) != xmode0 && GET_MODE (xop1) != xmode1
1386 && GET_MODE (xop0) == xmode1 && GET_MODE (xop1) == xmode1)
1393 /* If we are optimizing, force expensive constants into a register. */
1394 xop0 = avoid_expensive_constant (xmode0, binoptab, 0, xop0, unsignedp);
1395 if (!shift_optab_p (binoptab))
1396 xop1 = avoid_expensive_constant (xmode1, binoptab, 1, xop1, unsignedp);
1398 /* In case the insn wants input operands in modes different from
1399 those of the actual operands, convert the operands. It would
1400 seem that we don't need to convert CONST_INTs, but we do, so
1401 that they're properly zero-extended, sign-extended or truncated
1404 mode0 = GET_MODE (xop0) != VOIDmode ? GET_MODE (xop0) : mode;
1405 if (xmode0 != VOIDmode && xmode0 != mode0)
1407 xop0 = convert_modes (xmode0, mode0, xop0, unsignedp);
1411 mode1 = GET_MODE (xop1) != VOIDmode ? GET_MODE (xop1) : mode;
1412 if (xmode1 != VOIDmode && xmode1 != mode1)
1414 xop1 = convert_modes (xmode1, mode1, xop1, unsignedp);
1418 /* If operation is commutative,
1419 try to make the first operand a register.
1420 Even better, try to make it the same as the target.
1421 Also try to make the last operand a constant. */
1423 && swap_commutative_operands_with_target (target, xop0, xop1))
1430 /* Now, if insn's predicates don't allow our operands, put them into
1433 if (binoptab == vec_pack_trunc_optab
1434 || binoptab == vec_pack_usat_optab
1435 || binoptab == vec_pack_ssat_optab
1436 || binoptab == vec_pack_ufix_trunc_optab
1437 || binoptab == vec_pack_sfix_trunc_optab)
1439 /* The mode of the result is different then the mode of the
1441 tmp_mode = insn_data[(int) icode].operand[0].mode;
1442 if (GET_MODE_NUNITS (tmp_mode) != 2 * GET_MODE_NUNITS (mode))
1444 delete_insns_since (last);
1451 create_output_operand (&ops[0], target, tmp_mode);
1452 create_input_operand (&ops[1], xop0, mode0);
1453 create_input_operand (&ops[2], xop1, mode1);
1454 pat = maybe_gen_insn (icode, 3, ops);
1457 /* If PAT is composed of more than one insn, try to add an appropriate
1458 REG_EQUAL note to it. If we can't because TEMP conflicts with an
1459 operand, call expand_binop again, this time without a target. */
1460 if (INSN_P (pat) && NEXT_INSN (pat) != NULL_RTX
1461 && ! add_equal_note (pat, ops[0].value, binoptab->code,
1462 ops[1].value, ops[2].value))
1464 delete_insns_since (last);
1465 return expand_binop (mode, binoptab, op0, op1, NULL_RTX,
1466 unsignedp, methods);
1470 return ops[0].value;
1472 delete_insns_since (last);
1476 /* Generate code to perform an operation specified by BINOPTAB
1477 on operands OP0 and OP1, with result having machine-mode MODE.
1479 UNSIGNEDP is for the case where we have to widen the operands
1480 to perform the operation. It says to use zero-extension.
1482 If TARGET is nonzero, the value
1483 is generated there, if it is convenient to do so.
1484 In all cases an rtx is returned for the locus of the value;
1485 this may or may not be TARGET. */
1488 expand_binop (enum machine_mode mode, optab binoptab, rtx op0, rtx op1,
1489 rtx target, int unsignedp, enum optab_methods methods)
1491 enum optab_methods next_methods
1492 = (methods == OPTAB_LIB || methods == OPTAB_LIB_WIDEN
1493 ? OPTAB_WIDEN : methods);
1494 enum mode_class mclass;
1495 enum machine_mode wider_mode;
1498 rtx entry_last = get_last_insn ();
1501 mclass = GET_MODE_CLASS (mode);
1503 /* If subtracting an integer constant, convert this into an addition of
1504 the negated constant. */
1506 if (binoptab == sub_optab && CONST_INT_P (op1))
1508 op1 = negate_rtx (mode, op1);
1509 binoptab = add_optab;
1512 /* Record where to delete back to if we backtrack. */
1513 last = get_last_insn ();
1515 /* If we can do it with a three-operand insn, do so. */
1517 if (methods != OPTAB_MUST_WIDEN
1518 && find_widening_optab_handler (binoptab, mode,
1519 widened_mode (mode, op0, op1), 1)
1520 != CODE_FOR_nothing)
1522 temp = expand_binop_directly (mode, binoptab, op0, op1, target,
1523 unsignedp, methods, last);
1528 /* If we were trying to rotate, and that didn't work, try rotating
1529 the other direction before falling back to shifts and bitwise-or. */
1530 if (((binoptab == rotl_optab
1531 && optab_handler (rotr_optab, mode) != CODE_FOR_nothing)
1532 || (binoptab == rotr_optab
1533 && optab_handler (rotl_optab, mode) != CODE_FOR_nothing))
1534 && mclass == MODE_INT)
1536 optab otheroptab = (binoptab == rotl_optab ? rotr_optab : rotl_optab);
1538 unsigned int bits = GET_MODE_PRECISION (mode);
1540 if (CONST_INT_P (op1))
1541 newop1 = GEN_INT (bits - INTVAL (op1));
1542 else if (targetm.shift_truncation_mask (mode) == bits - 1)
1543 newop1 = negate_rtx (GET_MODE (op1), op1);
1545 newop1 = expand_binop (GET_MODE (op1), sub_optab,
1546 GEN_INT (bits), op1,
1547 NULL_RTX, unsignedp, OPTAB_DIRECT);
1549 temp = expand_binop_directly (mode, otheroptab, op0, newop1,
1550 target, unsignedp, methods, last);
1555 /* If this is a multiply, see if we can do a widening operation that
1556 takes operands of this mode and makes a wider mode. */
1558 if (binoptab == smul_optab
1559 && GET_MODE_2XWIDER_MODE (mode) != VOIDmode
1560 && (widening_optab_handler ((unsignedp ? umul_widen_optab
1561 : smul_widen_optab),
1562 GET_MODE_2XWIDER_MODE (mode), mode)
1563 != CODE_FOR_nothing))
1565 temp = expand_binop (GET_MODE_2XWIDER_MODE (mode),
1566 unsignedp ? umul_widen_optab : smul_widen_optab,
1567 op0, op1, NULL_RTX, unsignedp, OPTAB_DIRECT);
1571 if (GET_MODE_CLASS (mode) == MODE_INT
1572 && TRULY_NOOP_TRUNCATION_MODES_P (mode, GET_MODE (temp)))
1573 return gen_lowpart (mode, temp);
1575 return convert_to_mode (mode, temp, unsignedp);
1579 /* If this is a vector shift by a scalar, see if we can do a vector
1580 shift by a vector. If so, broadcast the scalar into a vector. */
1581 if (mclass == MODE_VECTOR_INT)
1583 optab otheroptab = NULL;
1585 if (binoptab == ashl_optab)
1586 otheroptab = vashl_optab;
1587 else if (binoptab == ashr_optab)
1588 otheroptab = vashr_optab;
1589 else if (binoptab == lshr_optab)
1590 otheroptab = vlshr_optab;
1591 else if (binoptab == rotl_optab)
1592 otheroptab = vrotl_optab;
1593 else if (binoptab == rotr_optab)
1594 otheroptab = vrotr_optab;
1596 if (otheroptab && optab_handler (otheroptab, mode) != CODE_FOR_nothing)
1598 rtx vop1 = expand_vector_broadcast (mode, op1);
1601 temp = expand_binop_directly (mode, otheroptab, op0, vop1,
1602 target, unsignedp, methods, last);
1609 /* Certain vector operations can be implemented with vector permutation. */
1610 if (VECTOR_MODE_P (mode))
1612 enum tree_code tcode = ERROR_MARK;
1615 if (binoptab == vec_interleave_high_optab)
1616 tcode = VEC_INTERLEAVE_HIGH_EXPR;
1617 else if (binoptab == vec_interleave_low_optab)
1618 tcode = VEC_INTERLEAVE_LOW_EXPR;
1619 else if (binoptab == vec_extract_even_optab)
1620 tcode = VEC_EXTRACT_EVEN_EXPR;
1621 else if (binoptab == vec_extract_odd_optab)
1622 tcode = VEC_EXTRACT_ODD_EXPR;
1624 if (tcode != ERROR_MARK
1625 && can_vec_perm_for_code_p (tcode, mode, &sel))
1627 temp = expand_vec_perm (mode, op0, op1, sel, target);
1628 gcc_assert (temp != NULL);
1633 /* Look for a wider mode of the same class for which we think we
1634 can open-code the operation. Check for a widening multiply at the
1635 wider mode as well. */
1637 if (CLASS_HAS_WIDER_MODES_P (mclass)
1638 && methods != OPTAB_DIRECT && methods != OPTAB_LIB)
1639 for (wider_mode = GET_MODE_WIDER_MODE (mode);
1640 wider_mode != VOIDmode;
1641 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
1643 if (optab_handler (binoptab, wider_mode) != CODE_FOR_nothing
1644 || (binoptab == smul_optab
1645 && GET_MODE_WIDER_MODE (wider_mode) != VOIDmode
1646 && (find_widening_optab_handler ((unsignedp
1648 : smul_widen_optab),
1649 GET_MODE_WIDER_MODE (wider_mode),
1651 != CODE_FOR_nothing)))
1653 rtx xop0 = op0, xop1 = op1;
1656 /* For certain integer operations, we need not actually extend
1657 the narrow operands, as long as we will truncate
1658 the results to the same narrowness. */
1660 if ((binoptab == ior_optab || binoptab == and_optab
1661 || binoptab == xor_optab
1662 || binoptab == add_optab || binoptab == sub_optab
1663 || binoptab == smul_optab || binoptab == ashl_optab)
1664 && mclass == MODE_INT)
1667 xop0 = avoid_expensive_constant (mode, binoptab, 0,
1669 if (binoptab != ashl_optab)
1670 xop1 = avoid_expensive_constant (mode, binoptab, 1,
1674 xop0 = widen_operand (xop0, wider_mode, mode, unsignedp, no_extend);
1676 /* The second operand of a shift must always be extended. */
1677 xop1 = widen_operand (xop1, wider_mode, mode, unsignedp,
1678 no_extend && binoptab != ashl_optab);
1680 temp = expand_binop (wider_mode, binoptab, xop0, xop1, NULL_RTX,
1681 unsignedp, OPTAB_DIRECT);
1684 if (mclass != MODE_INT
1685 || !TRULY_NOOP_TRUNCATION_MODES_P (mode, wider_mode))
1688 target = gen_reg_rtx (mode);
1689 convert_move (target, temp, 0);
1693 return gen_lowpart (mode, temp);
1696 delete_insns_since (last);
1700 /* If operation is commutative,
1701 try to make the first operand a register.
1702 Even better, try to make it the same as the target.
1703 Also try to make the last operand a constant. */
1704 if (commutative_optab_p (binoptab)
1705 && swap_commutative_operands_with_target (target, op0, op1))
1712 /* These can be done a word at a time. */
1713 if ((binoptab == and_optab || binoptab == ior_optab || binoptab == xor_optab)
1714 && mclass == MODE_INT
1715 && GET_MODE_SIZE (mode) > UNITS_PER_WORD
1716 && optab_handler (binoptab, word_mode) != CODE_FOR_nothing)
1721 /* If TARGET is the same as one of the operands, the REG_EQUAL note
1722 won't be accurate, so use a new target. */
1726 || !valid_multiword_target_p (target))
1727 target = gen_reg_rtx (mode);
1731 /* Do the actual arithmetic. */
1732 for (i = 0; i < GET_MODE_BITSIZE (mode) / BITS_PER_WORD; i++)
1734 rtx target_piece = operand_subword (target, i, 1, mode);
1735 rtx x = expand_binop (word_mode, binoptab,
1736 operand_subword_force (op0, i, mode),
1737 operand_subword_force (op1, i, mode),
1738 target_piece, unsignedp, next_methods);
1743 if (target_piece != x)
1744 emit_move_insn (target_piece, x);
1747 insns = get_insns ();
1750 if (i == GET_MODE_BITSIZE (mode) / BITS_PER_WORD)
1757 /* Synthesize double word shifts from single word shifts. */
1758 if ((binoptab == lshr_optab || binoptab == ashl_optab
1759 || binoptab == ashr_optab)
1760 && mclass == MODE_INT
1761 && (CONST_INT_P (op1) || optimize_insn_for_speed_p ())
1762 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
1763 && GET_MODE_PRECISION (mode) == GET_MODE_BITSIZE (mode)
1764 && optab_handler (binoptab, word_mode) != CODE_FOR_nothing
1765 && optab_handler (ashl_optab, word_mode) != CODE_FOR_nothing
1766 && optab_handler (lshr_optab, word_mode) != CODE_FOR_nothing)
1768 unsigned HOST_WIDE_INT shift_mask, double_shift_mask;
1769 enum machine_mode op1_mode;
1771 double_shift_mask = targetm.shift_truncation_mask (mode);
1772 shift_mask = targetm.shift_truncation_mask (word_mode);
1773 op1_mode = GET_MODE (op1) != VOIDmode ? GET_MODE (op1) : word_mode;
1775 /* Apply the truncation to constant shifts. */
1776 if (double_shift_mask > 0 && CONST_INT_P (op1))
1777 op1 = GEN_INT (INTVAL (op1) & double_shift_mask);
1779 if (op1 == CONST0_RTX (op1_mode))
1782 /* Make sure that this is a combination that expand_doubleword_shift
1783 can handle. See the comments there for details. */
1784 if (double_shift_mask == 0
1785 || (shift_mask == BITS_PER_WORD - 1
1786 && double_shift_mask == BITS_PER_WORD * 2 - 1))
1789 rtx into_target, outof_target;
1790 rtx into_input, outof_input;
1791 int left_shift, outof_word;
1793 /* If TARGET is the same as one of the operands, the REG_EQUAL note
1794 won't be accurate, so use a new target. */
1798 || !valid_multiword_target_p (target))
1799 target = gen_reg_rtx (mode);
1803 /* OUTOF_* is the word we are shifting bits away from, and
1804 INTO_* is the word that we are shifting bits towards, thus
1805 they differ depending on the direction of the shift and
1806 WORDS_BIG_ENDIAN. */
1808 left_shift = binoptab == ashl_optab;
1809 outof_word = left_shift ^ ! WORDS_BIG_ENDIAN;
1811 outof_target = operand_subword (target, outof_word, 1, mode);
1812 into_target = operand_subword (target, 1 - outof_word, 1, mode);
1814 outof_input = operand_subword_force (op0, outof_word, mode);
1815 into_input = operand_subword_force (op0, 1 - outof_word, mode);
1817 if (expand_doubleword_shift (op1_mode, binoptab,
1818 outof_input, into_input, op1,
1819 outof_target, into_target,
1820 unsignedp, next_methods, shift_mask))
1822 insns = get_insns ();
1832 /* Synthesize double word rotates from single word shifts. */
1833 if ((binoptab == rotl_optab || binoptab == rotr_optab)
1834 && mclass == MODE_INT
1835 && CONST_INT_P (op1)
1836 && GET_MODE_PRECISION (mode) == 2 * BITS_PER_WORD
1837 && optab_handler (ashl_optab, word_mode) != CODE_FOR_nothing
1838 && optab_handler (lshr_optab, word_mode) != CODE_FOR_nothing)
1841 rtx into_target, outof_target;
1842 rtx into_input, outof_input;
1844 int shift_count, left_shift, outof_word;
1846 /* If TARGET is the same as one of the operands, the REG_EQUAL note
1847 won't be accurate, so use a new target. Do this also if target is not
1848 a REG, first because having a register instead may open optimization
1849 opportunities, and second because if target and op0 happen to be MEMs
1850 designating the same location, we would risk clobbering it too early
1851 in the code sequence we generate below. */
1856 || !valid_multiword_target_p (target))
1857 target = gen_reg_rtx (mode);
1861 shift_count = INTVAL (op1);
1863 /* OUTOF_* is the word we are shifting bits away from, and
1864 INTO_* is the word that we are shifting bits towards, thus
1865 they differ depending on the direction of the shift and
1866 WORDS_BIG_ENDIAN. */
1868 left_shift = (binoptab == rotl_optab);
1869 outof_word = left_shift ^ ! WORDS_BIG_ENDIAN;
1871 outof_target = operand_subword (target, outof_word, 1, mode);
1872 into_target = operand_subword (target, 1 - outof_word, 1, mode);
1874 outof_input = operand_subword_force (op0, outof_word, mode);
1875 into_input = operand_subword_force (op0, 1 - outof_word, mode);
1877 if (shift_count == BITS_PER_WORD)
1879 /* This is just a word swap. */
1880 emit_move_insn (outof_target, into_input);
1881 emit_move_insn (into_target, outof_input);
1886 rtx into_temp1, into_temp2, outof_temp1, outof_temp2;
1887 rtx first_shift_count, second_shift_count;
1888 optab reverse_unsigned_shift, unsigned_shift;
1890 reverse_unsigned_shift = (left_shift ^ (shift_count < BITS_PER_WORD)
1891 ? lshr_optab : ashl_optab);
1893 unsigned_shift = (left_shift ^ (shift_count < BITS_PER_WORD)
1894 ? ashl_optab : lshr_optab);
1896 if (shift_count > BITS_PER_WORD)
1898 first_shift_count = GEN_INT (shift_count - BITS_PER_WORD);
1899 second_shift_count = GEN_INT (2 * BITS_PER_WORD - shift_count);
1903 first_shift_count = GEN_INT (BITS_PER_WORD - shift_count);
1904 second_shift_count = GEN_INT (shift_count);
1907 into_temp1 = expand_binop (word_mode, unsigned_shift,
1908 outof_input, first_shift_count,
1909 NULL_RTX, unsignedp, next_methods);
1910 into_temp2 = expand_binop (word_mode, reverse_unsigned_shift,
1911 into_input, second_shift_count,
1912 NULL_RTX, unsignedp, next_methods);
1914 if (into_temp1 != 0 && into_temp2 != 0)
1915 inter = expand_binop (word_mode, ior_optab, into_temp1, into_temp2,
1916 into_target, unsignedp, next_methods);
1920 if (inter != 0 && inter != into_target)
1921 emit_move_insn (into_target, inter);
1923 outof_temp1 = expand_binop (word_mode, unsigned_shift,
1924 into_input, first_shift_count,
1925 NULL_RTX, unsignedp, next_methods);
1926 outof_temp2 = expand_binop (word_mode, reverse_unsigned_shift,
1927 outof_input, second_shift_count,
1928 NULL_RTX, unsignedp, next_methods);
1930 if (inter != 0 && outof_temp1 != 0 && outof_temp2 != 0)
1931 inter = expand_binop (word_mode, ior_optab,
1932 outof_temp1, outof_temp2,
1933 outof_target, unsignedp, next_methods);
1935 if (inter != 0 && inter != outof_target)
1936 emit_move_insn (outof_target, inter);
1939 insns = get_insns ();
1949 /* These can be done a word at a time by propagating carries. */
1950 if ((binoptab == add_optab || binoptab == sub_optab)
1951 && mclass == MODE_INT
1952 && GET_MODE_SIZE (mode) >= 2 * UNITS_PER_WORD
1953 && optab_handler (binoptab, word_mode) != CODE_FOR_nothing)
1956 optab otheroptab = binoptab == add_optab ? sub_optab : add_optab;
1957 const unsigned int nwords = GET_MODE_BITSIZE (mode) / BITS_PER_WORD;
1958 rtx carry_in = NULL_RTX, carry_out = NULL_RTX;
1959 rtx xop0, xop1, xtarget;
1961 /* We can handle either a 1 or -1 value for the carry. If STORE_FLAG
1962 value is one of those, use it. Otherwise, use 1 since it is the
1963 one easiest to get. */
1964 #if STORE_FLAG_VALUE == 1 || STORE_FLAG_VALUE == -1
1965 int normalizep = STORE_FLAG_VALUE;
1970 /* Prepare the operands. */
1971 xop0 = force_reg (mode, op0);
1972 xop1 = force_reg (mode, op1);
1974 xtarget = gen_reg_rtx (mode);
1976 if (target == 0 || !REG_P (target) || !valid_multiword_target_p (target))
1979 /* Indicate for flow that the entire target reg is being set. */
1981 emit_clobber (xtarget);
1983 /* Do the actual arithmetic. */
1984 for (i = 0; i < nwords; i++)
1986 int index = (WORDS_BIG_ENDIAN ? nwords - i - 1 : i);
1987 rtx target_piece = operand_subword (xtarget, index, 1, mode);
1988 rtx op0_piece = operand_subword_force (xop0, index, mode);
1989 rtx op1_piece = operand_subword_force (xop1, index, mode);
1992 /* Main add/subtract of the input operands. */
1993 x = expand_binop (word_mode, binoptab,
1994 op0_piece, op1_piece,
1995 target_piece, unsignedp, next_methods);
2001 /* Store carry from main add/subtract. */
2002 carry_out = gen_reg_rtx (word_mode);
2003 carry_out = emit_store_flag_force (carry_out,
2004 (binoptab == add_optab
2007 word_mode, 1, normalizep);
2014 /* Add/subtract previous carry to main result. */
2015 newx = expand_binop (word_mode,
2016 normalizep == 1 ? binoptab : otheroptab,
2018 NULL_RTX, 1, next_methods);
2022 /* Get out carry from adding/subtracting carry in. */
2023 rtx carry_tmp = gen_reg_rtx (word_mode);
2024 carry_tmp = emit_store_flag_force (carry_tmp,
2025 (binoptab == add_optab
2028 word_mode, 1, normalizep);
2030 /* Logical-ior the two poss. carry together. */
2031 carry_out = expand_binop (word_mode, ior_optab,
2032 carry_out, carry_tmp,
2033 carry_out, 0, next_methods);
2037 emit_move_insn (target_piece, newx);
2041 if (x != target_piece)
2042 emit_move_insn (target_piece, x);
2045 carry_in = carry_out;
2048 if (i == GET_MODE_BITSIZE (mode) / (unsigned) BITS_PER_WORD)
2050 if (optab_handler (mov_optab, mode) != CODE_FOR_nothing
2051 || ! rtx_equal_p (target, xtarget))
2053 rtx temp = emit_move_insn (target, xtarget);
2055 set_unique_reg_note (temp,
2057 gen_rtx_fmt_ee (binoptab->code, mode,
2068 delete_insns_since (last);
2071 /* Attempt to synthesize double word multiplies using a sequence of word
2072 mode multiplications. We first attempt to generate a sequence using a
2073 more efficient unsigned widening multiply, and if that fails we then
2074 try using a signed widening multiply. */
2076 if (binoptab == smul_optab
2077 && mclass == MODE_INT
2078 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
2079 && optab_handler (smul_optab, word_mode) != CODE_FOR_nothing
2080 && optab_handler (add_optab, word_mode) != CODE_FOR_nothing)
2082 rtx product = NULL_RTX;
2083 if (widening_optab_handler (umul_widen_optab, mode, word_mode)
2084 != CODE_FOR_nothing)
2086 product = expand_doubleword_mult (mode, op0, op1, target,
2089 delete_insns_since (last);
2092 if (product == NULL_RTX
2093 && widening_optab_handler (smul_widen_optab, mode, word_mode)
2094 != CODE_FOR_nothing)
2096 product = expand_doubleword_mult (mode, op0, op1, target,
2099 delete_insns_since (last);
2102 if (product != NULL_RTX)
2104 if (optab_handler (mov_optab, mode) != CODE_FOR_nothing)
2106 temp = emit_move_insn (target ? target : product, product);
2107 set_unique_reg_note (temp,
2109 gen_rtx_fmt_ee (MULT, mode,
2117 /* It can't be open-coded in this mode.
2118 Use a library call if one is available and caller says that's ok. */
2120 libfunc = optab_libfunc (binoptab, mode);
2122 && (methods == OPTAB_LIB || methods == OPTAB_LIB_WIDEN))
2126 enum machine_mode op1_mode = mode;
2131 if (shift_optab_p (binoptab))
2133 op1_mode = targetm.libgcc_shift_count_mode ();
2134 /* Specify unsigned here,
2135 since negative shift counts are meaningless. */
2136 op1x = convert_to_mode (op1_mode, op1, 1);
2139 if (GET_MODE (op0) != VOIDmode
2140 && GET_MODE (op0) != mode)
2141 op0 = convert_to_mode (mode, op0, unsignedp);
2143 /* Pass 1 for NO_QUEUE so we don't lose any increments
2144 if the libcall is cse'd or moved. */
2145 value = emit_library_call_value (libfunc,
2146 NULL_RTX, LCT_CONST, mode, 2,
2147 op0, mode, op1x, op1_mode);
2149 insns = get_insns ();
2152 target = gen_reg_rtx (mode);
2153 emit_libcall_block (insns, target, value,
2154 gen_rtx_fmt_ee (binoptab->code, mode, op0, op1));
2159 delete_insns_since (last);
2161 /* It can't be done in this mode. Can we do it in a wider mode? */
2163 if (! (methods == OPTAB_WIDEN || methods == OPTAB_LIB_WIDEN
2164 || methods == OPTAB_MUST_WIDEN))
2166 /* Caller says, don't even try. */
2167 delete_insns_since (entry_last);
2171 /* Compute the value of METHODS to pass to recursive calls.
2172 Don't allow widening to be tried recursively. */
2174 methods = (methods == OPTAB_LIB_WIDEN ? OPTAB_LIB : OPTAB_DIRECT);
2176 /* Look for a wider mode of the same class for which it appears we can do
2179 if (CLASS_HAS_WIDER_MODES_P (mclass))
2181 for (wider_mode = GET_MODE_WIDER_MODE (mode);
2182 wider_mode != VOIDmode;
2183 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
2185 if (find_widening_optab_handler (binoptab, wider_mode, mode, 1)
2187 || (methods == OPTAB_LIB
2188 && optab_libfunc (binoptab, wider_mode)))
2190 rtx xop0 = op0, xop1 = op1;
2193 /* For certain integer operations, we need not actually extend
2194 the narrow operands, as long as we will truncate
2195 the results to the same narrowness. */
2197 if ((binoptab == ior_optab || binoptab == and_optab
2198 || binoptab == xor_optab
2199 || binoptab == add_optab || binoptab == sub_optab
2200 || binoptab == smul_optab || binoptab == ashl_optab)
2201 && mclass == MODE_INT)
2204 xop0 = widen_operand (xop0, wider_mode, mode,
2205 unsignedp, no_extend);
2207 /* The second operand of a shift must always be extended. */
2208 xop1 = widen_operand (xop1, wider_mode, mode, unsignedp,
2209 no_extend && binoptab != ashl_optab);
2211 temp = expand_binop (wider_mode, binoptab, xop0, xop1, NULL_RTX,
2212 unsignedp, methods);
2215 if (mclass != MODE_INT
2216 || !TRULY_NOOP_TRUNCATION_MODES_P (mode, wider_mode))
2219 target = gen_reg_rtx (mode);
2220 convert_move (target, temp, 0);
2224 return gen_lowpart (mode, temp);
2227 delete_insns_since (last);
2232 delete_insns_since (entry_last);
2236 /* Expand a binary operator which has both signed and unsigned forms.
2237 UOPTAB is the optab for unsigned operations, and SOPTAB is for
2240 If we widen unsigned operands, we may use a signed wider operation instead
2241 of an unsigned wider operation, since the result would be the same. */
2244 sign_expand_binop (enum machine_mode mode, optab uoptab, optab soptab,
2245 rtx op0, rtx op1, rtx target, int unsignedp,
2246 enum optab_methods methods)
2249 optab direct_optab = unsignedp ? uoptab : soptab;
2250 struct optab_d wide_soptab;
2252 /* Do it without widening, if possible. */
2253 temp = expand_binop (mode, direct_optab, op0, op1, target,
2254 unsignedp, OPTAB_DIRECT);
2255 if (temp || methods == OPTAB_DIRECT)
2258 /* Try widening to a signed int. Make a fake signed optab that
2259 hides any signed insn for direct use. */
2260 wide_soptab = *soptab;
2261 set_optab_handler (&wide_soptab, mode, CODE_FOR_nothing);
2262 /* We don't want to generate new hash table entries from this fake
2264 wide_soptab.libcall_gen = NULL;
2266 temp = expand_binop (mode, &wide_soptab, op0, op1, target,
2267 unsignedp, OPTAB_WIDEN);
2269 /* For unsigned operands, try widening to an unsigned int. */
2270 if (temp == 0 && unsignedp)
2271 temp = expand_binop (mode, uoptab, op0, op1, target,
2272 unsignedp, OPTAB_WIDEN);
2273 if (temp || methods == OPTAB_WIDEN)
2276 /* Use the right width libcall if that exists. */
2277 temp = expand_binop (mode, direct_optab, op0, op1, target, unsignedp, OPTAB_LIB);
2278 if (temp || methods == OPTAB_LIB)
2281 /* Must widen and use a libcall, use either signed or unsigned. */
2282 temp = expand_binop (mode, &wide_soptab, op0, op1, target,
2283 unsignedp, methods);
2287 return expand_binop (mode, uoptab, op0, op1, target,
2288 unsignedp, methods);
2292 /* Generate code to perform an operation specified by UNOPPTAB
2293 on operand OP0, with two results to TARG0 and TARG1.
2294 We assume that the order of the operands for the instruction
2295 is TARG0, TARG1, OP0.
2297 Either TARG0 or TARG1 may be zero, but what that means is that
2298 the result is not actually wanted. We will generate it into
2299 a dummy pseudo-reg and discard it. They may not both be zero.
2301 Returns 1 if this operation can be performed; 0 if not. */
2304 expand_twoval_unop (optab unoptab, rtx op0, rtx targ0, rtx targ1,
2307 enum machine_mode mode = GET_MODE (targ0 ? targ0 : targ1);
2308 enum mode_class mclass;
2309 enum machine_mode wider_mode;
2310 rtx entry_last = get_last_insn ();
2313 mclass = GET_MODE_CLASS (mode);
2316 targ0 = gen_reg_rtx (mode);
2318 targ1 = gen_reg_rtx (mode);
2320 /* Record where to go back to if we fail. */
2321 last = get_last_insn ();
2323 if (optab_handler (unoptab, mode) != CODE_FOR_nothing)
2325 struct expand_operand ops[3];
2326 enum insn_code icode = optab_handler (unoptab, mode);
2328 create_fixed_operand (&ops[0], targ0);
2329 create_fixed_operand (&ops[1], targ1);
2330 create_convert_operand_from (&ops[2], op0, mode, unsignedp);
2331 if (maybe_expand_insn (icode, 3, ops))
2335 /* It can't be done in this mode. Can we do it in a wider mode? */
2337 if (CLASS_HAS_WIDER_MODES_P (mclass))
2339 for (wider_mode = GET_MODE_WIDER_MODE (mode);
2340 wider_mode != VOIDmode;
2341 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
2343 if (optab_handler (unoptab, wider_mode) != CODE_FOR_nothing)
2345 rtx t0 = gen_reg_rtx (wider_mode);
2346 rtx t1 = gen_reg_rtx (wider_mode);
2347 rtx cop0 = convert_modes (wider_mode, mode, op0, unsignedp);
2349 if (expand_twoval_unop (unoptab, cop0, t0, t1, unsignedp))
2351 convert_move (targ0, t0, unsignedp);
2352 convert_move (targ1, t1, unsignedp);
2356 delete_insns_since (last);
2361 delete_insns_since (entry_last);
2365 /* Generate code to perform an operation specified by BINOPTAB
2366 on operands OP0 and OP1, with two results to TARG1 and TARG2.
2367 We assume that the order of the operands for the instruction
2368 is TARG0, OP0, OP1, TARG1, which would fit a pattern like
2369 [(set TARG0 (operate OP0 OP1)) (set TARG1 (operate ...))].
2371 Either TARG0 or TARG1 may be zero, but what that means is that
2372 the result is not actually wanted. We will generate it into
2373 a dummy pseudo-reg and discard it. They may not both be zero.
2375 Returns 1 if this operation can be performed; 0 if not. */
2378 expand_twoval_binop (optab binoptab, rtx op0, rtx op1, rtx targ0, rtx targ1,
2381 enum machine_mode mode = GET_MODE (targ0 ? targ0 : targ1);
2382 enum mode_class mclass;
2383 enum machine_mode wider_mode;
2384 rtx entry_last = get_last_insn ();
2387 mclass = GET_MODE_CLASS (mode);
2390 targ0 = gen_reg_rtx (mode);
2392 targ1 = gen_reg_rtx (mode);
2394 /* Record where to go back to if we fail. */
2395 last = get_last_insn ();
2397 if (optab_handler (binoptab, mode) != CODE_FOR_nothing)
2399 struct expand_operand ops[4];
2400 enum insn_code icode = optab_handler (binoptab, mode);
2401 enum machine_mode mode0 = insn_data[icode].operand[1].mode;
2402 enum machine_mode mode1 = insn_data[icode].operand[2].mode;
2403 rtx xop0 = op0, xop1 = op1;
2405 /* If we are optimizing, force expensive constants into a register. */
2406 xop0 = avoid_expensive_constant (mode0, binoptab, 0, xop0, unsignedp);
2407 xop1 = avoid_expensive_constant (mode1, binoptab, 1, xop1, unsignedp);
2409 create_fixed_operand (&ops[0], targ0);
2410 create_convert_operand_from (&ops[1], op0, mode, unsignedp);
2411 create_convert_operand_from (&ops[2], op1, mode, unsignedp);
2412 create_fixed_operand (&ops[3], targ1);
2413 if (maybe_expand_insn (icode, 4, ops))
2415 delete_insns_since (last);
2418 /* It can't be done in this mode. Can we do it in a wider mode? */
2420 if (CLASS_HAS_WIDER_MODES_P (mclass))
2422 for (wider_mode = GET_MODE_WIDER_MODE (mode);
2423 wider_mode != VOIDmode;
2424 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
2426 if (optab_handler (binoptab, wider_mode) != CODE_FOR_nothing)
2428 rtx t0 = gen_reg_rtx (wider_mode);
2429 rtx t1 = gen_reg_rtx (wider_mode);
2430 rtx cop0 = convert_modes (wider_mode, mode, op0, unsignedp);
2431 rtx cop1 = convert_modes (wider_mode, mode, op1, unsignedp);
2433 if (expand_twoval_binop (binoptab, cop0, cop1,
2436 convert_move (targ0, t0, unsignedp);
2437 convert_move (targ1, t1, unsignedp);
2441 delete_insns_since (last);
2446 delete_insns_since (entry_last);
2450 /* Expand the two-valued library call indicated by BINOPTAB, but
2451 preserve only one of the values. If TARG0 is non-NULL, the first
2452 value is placed into TARG0; otherwise the second value is placed
2453 into TARG1. Exactly one of TARG0 and TARG1 must be non-NULL. The
2454 value stored into TARG0 or TARG1 is equivalent to (CODE OP0 OP1).
2455 This routine assumes that the value returned by the library call is
2456 as if the return value was of an integral mode twice as wide as the
2457 mode of OP0. Returns 1 if the call was successful. */
2460 expand_twoval_binop_libfunc (optab binoptab, rtx op0, rtx op1,
2461 rtx targ0, rtx targ1, enum rtx_code code)
2463 enum machine_mode mode;
2464 enum machine_mode libval_mode;
2469 /* Exactly one of TARG0 or TARG1 should be non-NULL. */
2470 gcc_assert (!targ0 != !targ1);
2472 mode = GET_MODE (op0);
2473 libfunc = optab_libfunc (binoptab, mode);
2477 /* The value returned by the library function will have twice as
2478 many bits as the nominal MODE. */
2479 libval_mode = smallest_mode_for_size (2 * GET_MODE_BITSIZE (mode),
2482 libval = emit_library_call_value (libfunc, NULL_RTX, LCT_CONST,
2486 /* Get the part of VAL containing the value that we want. */
2487 libval = simplify_gen_subreg (mode, libval, libval_mode,
2488 targ0 ? 0 : GET_MODE_SIZE (mode));
2489 insns = get_insns ();
2491 /* Move the into the desired location. */
2492 emit_libcall_block (insns, targ0 ? targ0 : targ1, libval,
2493 gen_rtx_fmt_ee (code, mode, op0, op1));
2499 /* Wrapper around expand_unop which takes an rtx code to specify
2500 the operation to perform, not an optab pointer. All other
2501 arguments are the same. */
2503 expand_simple_unop (enum machine_mode mode, enum rtx_code code, rtx op0,
2504 rtx target, int unsignedp)
2506 optab unop = code_to_optab[(int) code];
2509 return expand_unop (mode, unop, op0, target, unsignedp);
2515 (clz:wide (zero_extend:wide x)) - ((width wide) - (width narrow)).
2517 A similar operation can be used for clrsb. UNOPTAB says which operation
2518 we are trying to expand. */
2520 widen_leading (enum machine_mode mode, rtx op0, rtx target, optab unoptab)
2522 enum mode_class mclass = GET_MODE_CLASS (mode);
2523 if (CLASS_HAS_WIDER_MODES_P (mclass))
2525 enum machine_mode wider_mode;
2526 for (wider_mode = GET_MODE_WIDER_MODE (mode);
2527 wider_mode != VOIDmode;
2528 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
2530 if (optab_handler (unoptab, wider_mode) != CODE_FOR_nothing)
2532 rtx xop0, temp, last;
2534 last = get_last_insn ();
2537 target = gen_reg_rtx (mode);
2538 xop0 = widen_operand (op0, wider_mode, mode,
2539 unoptab != clrsb_optab, false);
2540 temp = expand_unop (wider_mode, unoptab, xop0, NULL_RTX,
2541 unoptab != clrsb_optab);
2543 temp = expand_binop (wider_mode, sub_optab, temp,
2544 GEN_INT (GET_MODE_PRECISION (wider_mode)
2545 - GET_MODE_PRECISION (mode)),
2546 target, true, OPTAB_DIRECT);
2548 delete_insns_since (last);
2557 /* Try calculating clz of a double-word quantity as two clz's of word-sized
2558 quantities, choosing which based on whether the high word is nonzero. */
2560 expand_doubleword_clz (enum machine_mode mode, rtx op0, rtx target)
2562 rtx xop0 = force_reg (mode, op0);
2563 rtx subhi = gen_highpart (word_mode, xop0);
2564 rtx sublo = gen_lowpart (word_mode, xop0);
2565 rtx hi0_label = gen_label_rtx ();
2566 rtx after_label = gen_label_rtx ();
2567 rtx seq, temp, result;
2569 /* If we were not given a target, use a word_mode register, not a
2570 'mode' register. The result will fit, and nobody is expecting
2571 anything bigger (the return type of __builtin_clz* is int). */
2573 target = gen_reg_rtx (word_mode);
2575 /* In any case, write to a word_mode scratch in both branches of the
2576 conditional, so we can ensure there is a single move insn setting
2577 'target' to tag a REG_EQUAL note on. */
2578 result = gen_reg_rtx (word_mode);
2582 /* If the high word is not equal to zero,
2583 then clz of the full value is clz of the high word. */
2584 emit_cmp_and_jump_insns (subhi, CONST0_RTX (word_mode), EQ, 0,
2585 word_mode, true, hi0_label);
2587 temp = expand_unop_direct (word_mode, clz_optab, subhi, result, true);
2592 convert_move (result, temp, true);
2594 emit_jump_insn (gen_jump (after_label));
2597 /* Else clz of the full value is clz of the low word plus the number
2598 of bits in the high word. */
2599 emit_label (hi0_label);
2601 temp = expand_unop_direct (word_mode, clz_optab, sublo, 0, true);
2604 temp = expand_binop (word_mode, add_optab, temp,
2605 GEN_INT (GET_MODE_BITSIZE (word_mode)),
2606 result, true, OPTAB_DIRECT);
2610 convert_move (result, temp, true);
2612 emit_label (after_label);
2613 convert_move (target, result, true);
2618 add_equal_note (seq, target, CLZ, xop0, 0);
2630 (lshiftrt:wide (bswap:wide x) ((width wide) - (width narrow))). */
2632 widen_bswap (enum machine_mode mode, rtx op0, rtx target)
2634 enum mode_class mclass = GET_MODE_CLASS (mode);
2635 enum machine_mode wider_mode;
2638 if (!CLASS_HAS_WIDER_MODES_P (mclass))
2641 for (wider_mode = GET_MODE_WIDER_MODE (mode);
2642 wider_mode != VOIDmode;
2643 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
2644 if (optab_handler (bswap_optab, wider_mode) != CODE_FOR_nothing)
2649 last = get_last_insn ();
2651 x = widen_operand (op0, wider_mode, mode, true, true);
2652 x = expand_unop (wider_mode, bswap_optab, x, NULL_RTX, true);
2654 gcc_assert (GET_MODE_PRECISION (wider_mode) == GET_MODE_BITSIZE (wider_mode)
2655 && GET_MODE_PRECISION (mode) == GET_MODE_BITSIZE (mode));
2657 x = expand_shift (RSHIFT_EXPR, wider_mode, x,
2658 GET_MODE_BITSIZE (wider_mode)
2659 - GET_MODE_BITSIZE (mode),
2665 target = gen_reg_rtx (mode);
2666 emit_move_insn (target, gen_lowpart (mode, x));
2669 delete_insns_since (last);
2674 /* Try calculating bswap as two bswaps of two word-sized operands. */
2677 expand_doubleword_bswap (enum machine_mode mode, rtx op, rtx target)
2681 t1 = expand_unop (word_mode, bswap_optab,
2682 operand_subword_force (op, 0, mode), NULL_RTX, true);
2683 t0 = expand_unop (word_mode, bswap_optab,
2684 operand_subword_force (op, 1, mode), NULL_RTX, true);
2686 if (target == 0 || !valid_multiword_target_p (target))
2687 target = gen_reg_rtx (mode);
2689 emit_clobber (target);
2690 emit_move_insn (operand_subword (target, 0, 1, mode), t0);
2691 emit_move_insn (operand_subword (target, 1, 1, mode), t1);
2696 /* Try calculating (parity x) as (and (popcount x) 1), where
2697 popcount can also be done in a wider mode. */
2699 expand_parity (enum machine_mode mode, rtx op0, rtx target)
2701 enum mode_class mclass = GET_MODE_CLASS (mode);
2702 if (CLASS_HAS_WIDER_MODES_P (mclass))
2704 enum machine_mode wider_mode;
2705 for (wider_mode = mode; wider_mode != VOIDmode;
2706 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
2708 if (optab_handler (popcount_optab, wider_mode) != CODE_FOR_nothing)
2710 rtx xop0, temp, last;
2712 last = get_last_insn ();
2715 target = gen_reg_rtx (mode);
2716 xop0 = widen_operand (op0, wider_mode, mode, true, false);
2717 temp = expand_unop (wider_mode, popcount_optab, xop0, NULL_RTX,
2720 temp = expand_binop (wider_mode, and_optab, temp, const1_rtx,
2721 target, true, OPTAB_DIRECT);
2723 delete_insns_since (last);
2732 /* Try calculating ctz(x) as K - clz(x & -x) ,
2733 where K is GET_MODE_PRECISION(mode) - 1.
2735 Both __builtin_ctz and __builtin_clz are undefined at zero, so we
2736 don't have to worry about what the hardware does in that case. (If
2737 the clz instruction produces the usual value at 0, which is K, the
2738 result of this code sequence will be -1; expand_ffs, below, relies
2739 on this. It might be nice to have it be K instead, for consistency
2740 with the (very few) processors that provide a ctz with a defined
2741 value, but that would take one more instruction, and it would be
2742 less convenient for expand_ffs anyway. */
2745 expand_ctz (enum machine_mode mode, rtx op0, rtx target)
2749 if (optab_handler (clz_optab, mode) == CODE_FOR_nothing)
2754 temp = expand_unop_direct (mode, neg_optab, op0, NULL_RTX, true);
2756 temp = expand_binop (mode, and_optab, op0, temp, NULL_RTX,
2757 true, OPTAB_DIRECT);
2759 temp = expand_unop_direct (mode, clz_optab, temp, NULL_RTX, true);
2761 temp = expand_binop (mode, sub_optab, GEN_INT (GET_MODE_PRECISION (mode) - 1),
2763 true, OPTAB_DIRECT);
2773 add_equal_note (seq, temp, CTZ, op0, 0);
2779 /* Try calculating ffs(x) using ctz(x) if we have that instruction, or
2780 else with the sequence used by expand_clz.
2782 The ffs builtin promises to return zero for a zero value and ctz/clz
2783 may have an undefined value in that case. If they do not give us a
2784 convenient value, we have to generate a test and branch. */
2786 expand_ffs (enum machine_mode mode, rtx op0, rtx target)
2788 HOST_WIDE_INT val = 0;
2789 bool defined_at_zero = false;
2792 if (optab_handler (ctz_optab, mode) != CODE_FOR_nothing)
2796 temp = expand_unop_direct (mode, ctz_optab, op0, 0, true);
2800 defined_at_zero = (CTZ_DEFINED_VALUE_AT_ZERO (mode, val) == 2);
2802 else if (optab_handler (clz_optab, mode) != CODE_FOR_nothing)
2805 temp = expand_ctz (mode, op0, 0);
2809 if (CLZ_DEFINED_VALUE_AT_ZERO (mode, val) == 2)
2811 defined_at_zero = true;
2812 val = (GET_MODE_PRECISION (mode) - 1) - val;
2818 if (defined_at_zero && val == -1)
2819 /* No correction needed at zero. */;
2822 /* We don't try to do anything clever with the situation found
2823 on some processors (eg Alpha) where ctz(0:mode) ==
2824 bitsize(mode). If someone can think of a way to send N to -1
2825 and leave alone all values in the range 0..N-1 (where N is a
2826 power of two), cheaper than this test-and-branch, please add it.
2828 The test-and-branch is done after the operation itself, in case
2829 the operation sets condition codes that can be recycled for this.
2830 (This is true on i386, for instance.) */
2832 rtx nonzero_label = gen_label_rtx ();
2833 emit_cmp_and_jump_insns (op0, CONST0_RTX (mode), NE, 0,
2834 mode, true, nonzero_label);
2836 convert_move (temp, GEN_INT (-1), false);
2837 emit_label (nonzero_label);
2840 /* temp now has a value in the range -1..bitsize-1. ffs is supposed
2841 to produce a value in the range 0..bitsize. */
2842 temp = expand_binop (mode, add_optab, temp, GEN_INT (1),
2843 target, false, OPTAB_DIRECT);
2850 add_equal_note (seq, temp, FFS, op0, 0);
2859 /* Extract the OMODE lowpart from VAL, which has IMODE. Under certain
2860 conditions, VAL may already be a SUBREG against which we cannot generate
2861 a further SUBREG. In this case, we expect forcing the value into a
2862 register will work around the situation. */
2865 lowpart_subreg_maybe_copy (enum machine_mode omode, rtx val,
2866 enum machine_mode imode)
2869 ret = lowpart_subreg (omode, val, imode);
2872 val = force_reg (imode, val);
2873 ret = lowpart_subreg (omode, val, imode);
2874 gcc_assert (ret != NULL);
2879 /* Expand a floating point absolute value or negation operation via a
2880 logical operation on the sign bit. */
2883 expand_absneg_bit (enum rtx_code code, enum machine_mode mode,
2884 rtx op0, rtx target)
2886 const struct real_format *fmt;
2887 int bitpos, word, nwords, i;
2888 enum machine_mode imode;
2892 /* The format has to have a simple sign bit. */
2893 fmt = REAL_MODE_FORMAT (mode);
2897 bitpos = fmt->signbit_rw;
2901 /* Don't create negative zeros if the format doesn't support them. */
2902 if (code == NEG && !fmt->has_signed_zero)
2905 if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD)
2907 imode = int_mode_for_mode (mode);
2908 if (imode == BLKmode)
2917 if (FLOAT_WORDS_BIG_ENDIAN)
2918 word = (GET_MODE_BITSIZE (mode) - bitpos) / BITS_PER_WORD;
2920 word = bitpos / BITS_PER_WORD;
2921 bitpos = bitpos % BITS_PER_WORD;
2922 nwords = (GET_MODE_BITSIZE (mode) + BITS_PER_WORD - 1) / BITS_PER_WORD;
2925 mask = double_int_setbit (double_int_zero, bitpos);
2927 mask = double_int_not (mask);
2931 || (nwords > 1 && !valid_multiword_target_p (target)))
2932 target = gen_reg_rtx (mode);
2938 for (i = 0; i < nwords; ++i)
2940 rtx targ_piece = operand_subword (target, i, 1, mode);
2941 rtx op0_piece = operand_subword_force (op0, i, mode);
2945 temp = expand_binop (imode, code == ABS ? and_optab : xor_optab,
2947 immed_double_int_const (mask, imode),
2948 targ_piece, 1, OPTAB_LIB_WIDEN);
2949 if (temp != targ_piece)
2950 emit_move_insn (targ_piece, temp);
2953 emit_move_insn (targ_piece, op0_piece);
2956 insns = get_insns ();
2963 temp = expand_binop (imode, code == ABS ? and_optab : xor_optab,
2964 gen_lowpart (imode, op0),
2965 immed_double_int_const (mask, imode),
2966 gen_lowpart (imode, target), 1, OPTAB_LIB_WIDEN);
2967 target = lowpart_subreg_maybe_copy (mode, temp, imode);
2969 set_unique_reg_note (get_last_insn (), REG_EQUAL,
2970 gen_rtx_fmt_e (code, mode, copy_rtx (op0)));
2976 /* As expand_unop, but will fail rather than attempt the operation in a
2977 different mode or with a libcall. */
2979 expand_unop_direct (enum machine_mode mode, optab unoptab, rtx op0, rtx target,
2982 if (optab_handler (unoptab, mode) != CODE_FOR_nothing)
2984 struct expand_operand ops[2];
2985 enum insn_code icode = optab_handler (unoptab, mode);
2986 rtx last = get_last_insn ();
2989 create_output_operand (&ops[0], target, mode);
2990 create_convert_operand_from (&ops[1], op0, mode, unsignedp);
2991 pat = maybe_gen_insn (icode, 2, ops);
2994 if (INSN_P (pat) && NEXT_INSN (pat) != NULL_RTX
2995 && ! add_equal_note (pat, ops[0].value, unoptab->code,
2996 ops[1].value, NULL_RTX))
2998 delete_insns_since (last);
2999 return expand_unop (mode, unoptab, op0, NULL_RTX, unsignedp);
3004 return ops[0].value;
3010 /* Generate code to perform an operation specified by UNOPTAB
3011 on operand OP0, with result having machine-mode MODE.
3013 UNSIGNEDP is for the case where we have to widen the operands
3014 to perform the operation. It says to use zero-extension.
3016 If TARGET is nonzero, the value
3017 is generated there, if it is convenient to do so.
3018 In all cases an rtx is returned for the locus of the value;
3019 this may or may not be TARGET. */
3022 expand_unop (enum machine_mode mode, optab unoptab, rtx op0, rtx target,
3025 enum mode_class mclass = GET_MODE_CLASS (mode);
3026 enum machine_mode wider_mode;
3030 temp = expand_unop_direct (mode, unoptab, op0, target, unsignedp);
3034 /* It can't be done in this mode. Can we open-code it in a wider mode? */
3036 /* Widening (or narrowing) clz needs special treatment. */
3037 if (unoptab == clz_optab)
3039 temp = widen_leading (mode, op0, target, unoptab);
3043 if (GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
3044 && optab_handler (unoptab, word_mode) != CODE_FOR_nothing)
3046 temp = expand_doubleword_clz (mode, op0, target);
3054 if (unoptab == clrsb_optab)
3056 temp = widen_leading (mode, op0, target, unoptab);
3062 /* Widening (or narrowing) bswap needs special treatment. */
3063 if (unoptab == bswap_optab)
3065 temp = widen_bswap (mode, op0, target);
3069 if (GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
3070 && optab_handler (unoptab, word_mode) != CODE_FOR_nothing)
3072 temp = expand_doubleword_bswap (mode, op0, target);
3080 if (CLASS_HAS_WIDER_MODES_P (mclass))
3081 for (wider_mode = GET_MODE_WIDER_MODE (mode);
3082 wider_mode != VOIDmode;
3083 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
3085 if (optab_handler (unoptab, wider_mode) != CODE_FOR_nothing)
3088 rtx last = get_last_insn ();
3090 /* For certain operations, we need not actually extend
3091 the narrow operand, as long as we will truncate the
3092 results to the same narrowness. */
3094 xop0 = widen_operand (xop0, wider_mode, mode, unsignedp,
3095 (unoptab == neg_optab
3096 || unoptab == one_cmpl_optab)
3097 && mclass == MODE_INT);
3099 temp = expand_unop (wider_mode, unoptab, xop0, NULL_RTX,
3104 if (mclass != MODE_INT
3105 || !TRULY_NOOP_TRUNCATION_MODES_P (mode, wider_mode))
3108 target = gen_reg_rtx (mode);
3109 convert_move (target, temp, 0);
3113 return gen_lowpart (mode, temp);
3116 delete_insns_since (last);
3120 /* These can be done a word at a time. */
3121 if (unoptab == one_cmpl_optab
3122 && mclass == MODE_INT
3123 && GET_MODE_SIZE (mode) > UNITS_PER_WORD
3124 && optab_handler (unoptab, word_mode) != CODE_FOR_nothing)
3129 if (target == 0 || target == op0 || !valid_multiword_target_p (target))
3130 target = gen_reg_rtx (mode);
3134 /* Do the actual arithmetic. */
3135 for (i = 0; i < GET_MODE_BITSIZE (mode) / BITS_PER_WORD; i++)
3137 rtx target_piece = operand_subword (target, i, 1, mode);
3138 rtx x = expand_unop (word_mode, unoptab,
3139 operand_subword_force (op0, i, mode),
3140 target_piece, unsignedp);
3142 if (target_piece != x)
3143 emit_move_insn (target_piece, x);
3146 insns = get_insns ();
3153 if (unoptab->code == NEG)
3155 /* Try negating floating point values by flipping the sign bit. */
3156 if (SCALAR_FLOAT_MODE_P (mode))
3158 temp = expand_absneg_bit (NEG, mode, op0, target);
3163 /* If there is no negation pattern, and we have no negative zero,
3164 try subtracting from zero. */
3165 if (!HONOR_SIGNED_ZEROS (mode))
3167 temp = expand_binop (mode, (unoptab == negv_optab
3168 ? subv_optab : sub_optab),
3169 CONST0_RTX (mode), op0, target,
3170 unsignedp, OPTAB_DIRECT);
3176 /* Try calculating parity (x) as popcount (x) % 2. */
3177 if (unoptab == parity_optab)
3179 temp = expand_parity (mode, op0, target);
3184 /* Try implementing ffs (x) in terms of clz (x). */
3185 if (unoptab == ffs_optab)
3187 temp = expand_ffs (mode, op0, target);
3192 /* Try implementing ctz (x) in terms of clz (x). */
3193 if (unoptab == ctz_optab)
3195 temp = expand_ctz (mode, op0, target);
3201 /* Now try a library call in this mode. */
3202 libfunc = optab_libfunc (unoptab, mode);
3208 enum machine_mode outmode = mode;
3210 /* All of these functions return small values. Thus we choose to
3211 have them return something that isn't a double-word. */
3212 if (unoptab == ffs_optab || unoptab == clz_optab || unoptab == ctz_optab
3213 || unoptab == clrsb_optab || unoptab == popcount_optab
3214 || unoptab == parity_optab)
3216 = GET_MODE (hard_libcall_value (TYPE_MODE (integer_type_node),
3217 optab_libfunc (unoptab, mode)));
3221 /* Pass 1 for NO_QUEUE so we don't lose any increments
3222 if the libcall is cse'd or moved. */
3223 value = emit_library_call_value (libfunc, NULL_RTX, LCT_CONST, outmode,
3225 insns = get_insns ();
3228 target = gen_reg_rtx (outmode);
3229 eq_value = gen_rtx_fmt_e (unoptab->code, mode, op0);
3230 if (GET_MODE_SIZE (outmode) < GET_MODE_SIZE (mode))
3231 eq_value = simplify_gen_unary (TRUNCATE, outmode, eq_value, mode);
3232 else if (GET_MODE_SIZE (outmode) > GET_MODE_SIZE (mode))
3233 eq_value = simplify_gen_unary (ZERO_EXTEND, outmode, eq_value, mode);
3234 emit_libcall_block (insns, target, value, eq_value);
3239 /* It can't be done in this mode. Can we do it in a wider mode? */
3241 if (CLASS_HAS_WIDER_MODES_P (mclass))
3243 for (wider_mode = GET_MODE_WIDER_MODE (mode);
3244 wider_mode != VOIDmode;
3245 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
3247 if (optab_handler (unoptab, wider_mode) != CODE_FOR_nothing
3248 || optab_libfunc (unoptab, wider_mode))
3251 rtx last = get_last_insn ();
3253 /* For certain operations, we need not actually extend
3254 the narrow operand, as long as we will truncate the
3255 results to the same narrowness. */
3257 xop0 = widen_operand (xop0, wider_mode, mode, unsignedp,
3258 (unoptab == neg_optab
3259 || unoptab == one_cmpl_optab)
3260 && mclass == MODE_INT);
3262 temp = expand_unop (wider_mode, unoptab, xop0, NULL_RTX,
3265 /* If we are generating clz using wider mode, adjust the
3266 result. Similarly for clrsb. */
3267 if ((unoptab == clz_optab || unoptab == clrsb_optab)
3269 temp = expand_binop (wider_mode, sub_optab, temp,
3270 GEN_INT (GET_MODE_PRECISION (wider_mode)
3271 - GET_MODE_PRECISION (mode)),
3272 target, true, OPTAB_DIRECT);
3276 if (mclass != MODE_INT)
3279 target = gen_reg_rtx (mode);
3280 convert_move (target, temp, 0);
3284 return gen_lowpart (mode, temp);
3287 delete_insns_since (last);
3292 /* One final attempt at implementing negation via subtraction,
3293 this time allowing widening of the operand. */
3294 if (unoptab->code == NEG && !HONOR_SIGNED_ZEROS (mode))
3297 temp = expand_binop (mode,
3298 unoptab == negv_optab ? subv_optab : sub_optab,
3299 CONST0_RTX (mode), op0,
3300 target, unsignedp, OPTAB_LIB_WIDEN);
3308 /* Emit code to compute the absolute value of OP0, with result to
3309 TARGET if convenient. (TARGET may be 0.) The return value says
3310 where the result actually is to be found.
3312 MODE is the mode of the operand; the mode of the result is
3313 different but can be deduced from MODE.
3318 expand_abs_nojump (enum machine_mode mode, rtx op0, rtx target,
3319 int result_unsignedp)
3324 result_unsignedp = 1;
3326 /* First try to do it with a special abs instruction. */
3327 temp = expand_unop (mode, result_unsignedp ? abs_optab : absv_optab,
3332 /* For floating point modes, try clearing the sign bit. */
3333 if (SCALAR_FLOAT_MODE_P (mode))
3335 temp = expand_absneg_bit (ABS, mode, op0, target);
3340 /* If we have a MAX insn, we can do this as MAX (x, -x). */
3341 if (optab_handler (smax_optab, mode) != CODE_FOR_nothing
3342 && !HONOR_SIGNED_ZEROS (mode))
3344 rtx last = get_last_insn ();
3346 temp = expand_unop (mode, neg_optab, op0, NULL_RTX, 0);
3348 temp = expand_binop (mode, smax_optab, op0, temp, target, 0,
3354 delete_insns_since (last);
3357 /* If this machine has expensive jumps, we can do integer absolute
3358 value of X as (((signed) x >> (W-1)) ^ x) - ((signed) x >> (W-1)),
3359 where W is the width of MODE. */
3361 if (GET_MODE_CLASS (mode) == MODE_INT
3362 && BRANCH_COST (optimize_insn_for_speed_p (),
3365 rtx extended = expand_shift (RSHIFT_EXPR, mode, op0,
3366 GET_MODE_PRECISION (mode) - 1,
3369 temp = expand_binop (mode, xor_optab, extended, op0, target, 0,
3372 temp = expand_binop (mode, result_unsignedp ? sub_optab : subv_optab,
3373 temp, extended, target, 0, OPTAB_LIB_WIDEN);
3383 expand_abs (enum machine_mode mode, rtx op0, rtx target,
3384 int result_unsignedp, int safe)
3389 result_unsignedp = 1;
3391 temp = expand_abs_nojump (mode, op0, target, result_unsignedp);
3395 /* If that does not win, use conditional jump and negate. */
3397 /* It is safe to use the target if it is the same
3398 as the source if this is also a pseudo register */
3399 if (op0 == target && REG_P (op0)
3400 && REGNO (op0) >= FIRST_PSEUDO_REGISTER)
3403 op1 = gen_label_rtx ();
3404 if (target == 0 || ! safe
3405 || GET_MODE (target) != mode
3406 || (MEM_P (target) && MEM_VOLATILE_P (target))
3408 && REGNO (target) < FIRST_PSEUDO_REGISTER))
3409 target = gen_reg_rtx (mode);
3411 emit_move_insn (target, op0);
3414 do_compare_rtx_and_jump (target, CONST0_RTX (mode), GE, 0, mode,
3415 NULL_RTX, NULL_RTX, op1, -1);
3417 op0 = expand_unop (mode, result_unsignedp ? neg_optab : negv_optab,
3420 emit_move_insn (target, op0);
3426 /* Emit code to compute the one's complement absolute value of OP0
3427 (if (OP0 < 0) OP0 = ~OP0), with result to TARGET if convenient.
3428 (TARGET may be NULL_RTX.) The return value says where the result
3429 actually is to be found.
3431 MODE is the mode of the operand; the mode of the result is
3432 different but can be deduced from MODE. */
3435 expand_one_cmpl_abs_nojump (enum machine_mode mode, rtx op0, rtx target)
3439 /* Not applicable for floating point modes. */
3440 if (FLOAT_MODE_P (mode))
3443 /* If we have a MAX insn, we can do this as MAX (x, ~x). */
3444 if (optab_handler (smax_optab, mode) != CODE_FOR_nothing)
3446 rtx last = get_last_insn ();
3448 temp = expand_unop (mode, one_cmpl_optab, op0, NULL_RTX, 0);
3450 temp = expand_binop (mode, smax_optab, op0, temp, target, 0,
3456 delete_insns_since (last);
3459 /* If this machine has expensive jumps, we can do one's complement
3460 absolute value of X as (((signed) x >> (W-1)) ^ x). */
3462 if (GET_MODE_CLASS (mode) == MODE_INT
3463 && BRANCH_COST (optimize_insn_for_speed_p (),
3466 rtx extended = expand_shift (RSHIFT_EXPR, mode, op0,
3467 GET_MODE_PRECISION (mode) - 1,
3470 temp = expand_binop (mode, xor_optab, extended, op0, target, 0,
3480 /* A subroutine of expand_copysign, perform the copysign operation using the
3481 abs and neg primitives advertised to exist on the target. The assumption
3482 is that we have a split register file, and leaving op0 in fp registers,
3483 and not playing with subregs so much, will help the register allocator. */
3486 expand_copysign_absneg (enum machine_mode mode, rtx op0, rtx op1, rtx target,
3487 int bitpos, bool op0_is_abs)
3489 enum machine_mode imode;
3490 enum insn_code icode;
3496 /* Check if the back end provides an insn that handles signbit for the
3498 icode = optab_handler (signbit_optab, mode);
3499 if (icode != CODE_FOR_nothing)
3501 imode = insn_data[(int) icode].operand[0].mode;
3502 sign = gen_reg_rtx (imode);
3503 emit_unop_insn (icode, sign, op1, UNKNOWN);
3509 if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD)
3511 imode = int_mode_for_mode (mode);
3512 if (imode == BLKmode)
3514 op1 = gen_lowpart (imode, op1);
3521 if (FLOAT_WORDS_BIG_ENDIAN)
3522 word = (GET_MODE_BITSIZE (mode) - bitpos) / BITS_PER_WORD;
3524 word = bitpos / BITS_PER_WORD;
3525 bitpos = bitpos % BITS_PER_WORD;
3526 op1 = operand_subword_force (op1, word, mode);
3529 mask = double_int_setbit (double_int_zero, bitpos);
3531 sign = expand_binop (imode, and_optab, op1,
3532 immed_double_int_const (mask, imode),
3533 NULL_RTX, 1, OPTAB_LIB_WIDEN);
3538 op0 = expand_unop (mode, abs_optab, op0, target, 0);
3545 if (target == NULL_RTX)
3546 target = copy_to_reg (op0);
3548 emit_move_insn (target, op0);
3551 label = gen_label_rtx ();
3552 emit_cmp_and_jump_insns (sign, const0_rtx, EQ, NULL_RTX, imode, 1, label);
3554 if (GET_CODE (op0) == CONST_DOUBLE)
3555 op0 = simplify_unary_operation (NEG, mode, op0, mode);
3557 op0 = expand_unop (mode, neg_optab, op0, target, 0);
3559 emit_move_insn (target, op0);
3567 /* A subroutine of expand_copysign, perform the entire copysign operation
3568 with integer bitmasks. BITPOS is the position of the sign bit; OP0_IS_ABS
3569 is true if op0 is known to have its sign bit clear. */
3572 expand_copysign_bit (enum machine_mode mode, rtx op0, rtx op1, rtx target,
3573 int bitpos, bool op0_is_abs)
3575 enum machine_mode imode;
3577 int word, nwords, i;
3580 if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD)
3582 imode = int_mode_for_mode (mode);
3583 if (imode == BLKmode)
3592 if (FLOAT_WORDS_BIG_ENDIAN)
3593 word = (GET_MODE_BITSIZE (mode) - bitpos) / BITS_PER_WORD;
3595 word = bitpos / BITS_PER_WORD;
3596 bitpos = bitpos % BITS_PER_WORD;
3597 nwords = (GET_MODE_BITSIZE (mode) + BITS_PER_WORD - 1) / BITS_PER_WORD;
3600 mask = double_int_setbit (double_int_zero, bitpos);
3605 || (nwords > 1 && !valid_multiword_target_p (target)))
3606 target = gen_reg_rtx (mode);
3612 for (i = 0; i < nwords; ++i)
3614 rtx targ_piece = operand_subword (target, i, 1, mode);
3615 rtx op0_piece = operand_subword_force (op0, i, mode);
3621 = expand_binop (imode, and_optab, op0_piece,
3622 immed_double_int_const (double_int_not (mask),
3624 NULL_RTX, 1, OPTAB_LIB_WIDEN);
3626 op1 = expand_binop (imode, and_optab,
3627 operand_subword_force (op1, i, mode),
3628 immed_double_int_const (mask, imode),
3629 NULL_RTX, 1, OPTAB_LIB_WIDEN);
3631 temp = expand_binop (imode, ior_optab, op0_piece, op1,
3632 targ_piece, 1, OPTAB_LIB_WIDEN);
3633 if (temp != targ_piece)
3634 emit_move_insn (targ_piece, temp);
3637 emit_move_insn (targ_piece, op0_piece);
3640 insns = get_insns ();
3647 op1 = expand_binop (imode, and_optab, gen_lowpart (imode, op1),
3648 immed_double_int_const (mask, imode),
3649 NULL_RTX, 1, OPTAB_LIB_WIDEN);
3651 op0 = gen_lowpart (imode, op0);
3653 op0 = expand_binop (imode, and_optab, op0,
3654 immed_double_int_const (double_int_not (mask),
3656 NULL_RTX, 1, OPTAB_LIB_WIDEN);
3658 temp = expand_binop (imode, ior_optab, op0, op1,
3659 gen_lowpart (imode, target), 1, OPTAB_LIB_WIDEN);
3660 target = lowpart_subreg_maybe_copy (mode, temp, imode);
3666 /* Expand the C99 copysign operation. OP0 and OP1 must be the same
3667 scalar floating point mode. Return NULL if we do not know how to
3668 expand the operation inline. */
3671 expand_copysign (rtx op0, rtx op1, rtx target)
3673 enum machine_mode mode = GET_MODE (op0);
3674 const struct real_format *fmt;
3678 gcc_assert (SCALAR_FLOAT_MODE_P (mode));
3679 gcc_assert (GET_MODE (op1) == mode);
3681 /* First try to do it with a special instruction. */
3682 temp = expand_binop (mode, copysign_optab, op0, op1,
3683 target, 0, OPTAB_DIRECT);
3687 fmt = REAL_MODE_FORMAT (mode);
3688 if (fmt == NULL || !fmt->has_signed_zero)
3692 if (GET_CODE (op0) == CONST_DOUBLE)
3694 if (real_isneg (CONST_DOUBLE_REAL_VALUE (op0)))
3695 op0 = simplify_unary_operation (ABS, mode, op0, mode);
3699 if (fmt->signbit_ro >= 0
3700 && (GET_CODE (op0) == CONST_DOUBLE
3701 || (optab_handler (neg_optab, mode) != CODE_FOR_nothing
3702 && optab_handler (abs_optab, mode) != CODE_FOR_nothing)))
3704 temp = expand_copysign_absneg (mode, op0, op1, target,
3705 fmt->signbit_ro, op0_is_abs);
3710 if (fmt->signbit_rw < 0)
3712 return expand_copysign_bit (mode, op0, op1, target,
3713 fmt->signbit_rw, op0_is_abs);
3716 /* Generate an instruction whose insn-code is INSN_CODE,
3717 with two operands: an output TARGET and an input OP0.
3718 TARGET *must* be nonzero, and the output is always stored there.
3719 CODE is an rtx code such that (CODE OP0) is an rtx that describes
3720 the value that is stored into TARGET.
3722 Return false if expansion failed. */
3725 maybe_emit_unop_insn (enum insn_code icode, rtx target, rtx op0,
3728 struct expand_operand ops[2];
3731 create_output_operand (&ops[0], target, GET_MODE (target));
3732 create_input_operand (&ops[1], op0, GET_MODE (op0));
3733 pat = maybe_gen_insn (icode, 2, ops);
3737 if (INSN_P (pat) && NEXT_INSN (pat) != NULL_RTX && code != UNKNOWN)
3738 add_equal_note (pat, ops[0].value, code, ops[1].value, NULL_RTX);
3742 if (ops[0].value != target)
3743 emit_move_insn (target, ops[0].value);
3746 /* Generate an instruction whose insn-code is INSN_CODE,
3747 with two operands: an output TARGET and an input OP0.
3748 TARGET *must* be nonzero, and the output is always stored there.
3749 CODE is an rtx code such that (CODE OP0) is an rtx that describes
3750 the value that is stored into TARGET. */
3753 emit_unop_insn (enum insn_code icode, rtx target, rtx op0, enum rtx_code code)
3755 bool ok = maybe_emit_unop_insn (icode, target, op0, code);
3759 struct no_conflict_data
3761 rtx target, first, insn;
3765 /* Called via note_stores by emit_libcall_block. Set P->must_stay if
3766 the currently examined clobber / store has to stay in the list of
3767 insns that constitute the actual libcall block. */
3769 no_conflict_move_test (rtx dest, const_rtx set, void *p0)
3771 struct no_conflict_data *p= (struct no_conflict_data *) p0;
3773 /* If this inns directly contributes to setting the target, it must stay. */
3774 if (reg_overlap_mentioned_p (p->target, dest))
3775 p->must_stay = true;
3776 /* If we haven't committed to keeping any other insns in the list yet,
3777 there is nothing more to check. */
3778 else if (p->insn == p->first)
3780 /* If this insn sets / clobbers a register that feeds one of the insns
3781 already in the list, this insn has to stay too. */
3782 else if (reg_overlap_mentioned_p (dest, PATTERN (p->first))
3783 || (CALL_P (p->first) && (find_reg_fusage (p->first, USE, dest)))
3784 || reg_used_between_p (dest, p->first, p->insn)
3785 /* Likewise if this insn depends on a register set by a previous
3786 insn in the list, or if it sets a result (presumably a hard
3787 register) that is set or clobbered by a previous insn.
3788 N.B. the modified_*_p (SET_DEST...) tests applied to a MEM
3789 SET_DEST perform the former check on the address, and the latter
3790 check on the MEM. */
3791 || (GET_CODE (set) == SET
3792 && (modified_in_p (SET_SRC (set), p->first)
3793 || modified_in_p (SET_DEST (set), p->first)
3794 || modified_between_p (SET_SRC (set), p->first, p->insn)
3795 || modified_between_p (SET_DEST (set), p->first, p->insn))))
3796 p->must_stay = true;
3800 /* Emit code to make a call to a constant function or a library call.
3802 INSNS is a list containing all insns emitted in the call.
3803 These insns leave the result in RESULT. Our block is to copy RESULT
3804 to TARGET, which is logically equivalent to EQUIV.
3806 We first emit any insns that set a pseudo on the assumption that these are
3807 loading constants into registers; doing so allows them to be safely cse'ed
3808 between blocks. Then we emit all the other insns in the block, followed by
3809 an insn to move RESULT to TARGET. This last insn will have a REQ_EQUAL
3810 note with an operand of EQUIV. */
3813 emit_libcall_block (rtx insns, rtx target, rtx result, rtx equiv)
3815 rtx final_dest = target;
3816 rtx next, last, insn;
3818 /* If this is a reg with REG_USERVAR_P set, then it could possibly turn
3819 into a MEM later. Protect the libcall block from this change. */
3820 if (! REG_P (target) || REG_USERVAR_P (target))
3821 target = gen_reg_rtx (GET_MODE (target));
3823 /* If we're using non-call exceptions, a libcall corresponding to an
3824 operation that may trap may also trap. */
3825 /* ??? See the comment in front of make_reg_eh_region_note. */
3826 if (cfun->can_throw_non_call_exceptions && may_trap_p (equiv))
3828 for (insn = insns; insn; insn = NEXT_INSN (insn))
3831 rtx note = find_reg_note (insn, REG_EH_REGION, NULL_RTX);
3834 int lp_nr = INTVAL (XEXP (note, 0));
3835 if (lp_nr == 0 || lp_nr == INT_MIN)
3836 remove_note (insn, note);
3842 /* Look for any CALL_INSNs in this sequence, and attach a REG_EH_REGION
3843 reg note to indicate that this call cannot throw or execute a nonlocal
3844 goto (unless there is already a REG_EH_REGION note, in which case
3846 for (insn = insns; insn; insn = NEXT_INSN (insn))
3848 make_reg_eh_region_note_nothrow_nononlocal (insn);
3851 /* First emit all insns that set pseudos. Remove them from the list as
3852 we go. Avoid insns that set pseudos which were referenced in previous
3853 insns. These can be generated by move_by_pieces, for example,
3854 to update an address. Similarly, avoid insns that reference things
3855 set in previous insns. */
3857 for (insn = insns; insn; insn = next)
3859 rtx set = single_set (insn);
3861 next = NEXT_INSN (insn);
3863 if (set != 0 && REG_P (SET_DEST (set))
3864 && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER)
3866 struct no_conflict_data data;
3868 data.target = const0_rtx;
3872 note_stores (PATTERN (insn), no_conflict_move_test, &data);
3873 if (! data.must_stay)
3875 if (PREV_INSN (insn))
3876 NEXT_INSN (PREV_INSN (insn)) = next;
3881 PREV_INSN (next) = PREV_INSN (insn);
3887 /* Some ports use a loop to copy large arguments onto the stack.
3888 Don't move anything outside such a loop. */
3893 /* Write the remaining insns followed by the final copy. */
3894 for (insn = insns; insn; insn = next)
3896 next = NEXT_INSN (insn);
3901 last = emit_move_insn (target, result);
3902 if (optab_handler (mov_optab, GET_MODE (target)) != CODE_FOR_nothing)
3903 set_unique_reg_note (last, REG_EQUAL, copy_rtx (equiv));
3905 if (final_dest != target)
3906 emit_move_insn (final_dest, target);
3909 /* Nonzero if we can perform a comparison of mode MODE straightforwardly.
3910 PURPOSE describes how this comparison will be used. CODE is the rtx
3911 comparison code we will be using.
3913 ??? Actually, CODE is slightly weaker than that. A target is still
3914 required to implement all of the normal bcc operations, but not
3915 required to implement all (or any) of the unordered bcc operations. */
3918 can_compare_p (enum rtx_code code, enum machine_mode mode,
3919 enum can_compare_purpose purpose)
3922 test = gen_rtx_fmt_ee (code, mode, const0_rtx, const0_rtx);
3925 enum insn_code icode;
3927 if (purpose == ccp_jump
3928 && (icode = optab_handler (cbranch_optab, mode)) != CODE_FOR_nothing
3929 && insn_operand_matches (icode, 0, test))
3931 if (purpose == ccp_store_flag
3932 && (icode = optab_handler (cstore_optab, mode)) != CODE_FOR_nothing
3933 && insn_operand_matches (icode, 1, test))
3935 if (purpose == ccp_cmov
3936 && optab_handler (cmov_optab, mode) != CODE_FOR_nothing)
3939 mode = GET_MODE_WIDER_MODE (mode);
3940 PUT_MODE (test, mode);
3942 while (mode != VOIDmode);
3947 /* This function is called when we are going to emit a compare instruction that
3948 compares the values found in *PX and *PY, using the rtl operator COMPARISON.
3950 *PMODE is the mode of the inputs (in case they are const_int).
3951 *PUNSIGNEDP nonzero says that the operands are unsigned;
3952 this matters if they need to be widened (as given by METHODS).
3954 If they have mode BLKmode, then SIZE specifies the size of both operands.
3956 This function performs all the setup necessary so that the caller only has
3957 to emit a single comparison insn. This setup can involve doing a BLKmode
3958 comparison or emitting a library call to perform the comparison if no insn
3959 is available to handle it.
3960 The values which are passed in through pointers can be modified; the caller
3961 should perform the comparison on the modified values. Constant
3962 comparisons must have already been folded. */
3965 prepare_cmp_insn (rtx x, rtx y, enum rtx_code comparison, rtx size,
3966 int unsignedp, enum optab_methods methods,
3967 rtx *ptest, enum machine_mode *pmode)
3969 enum machine_mode mode = *pmode;
3971 enum machine_mode cmp_mode;
3972 enum mode_class mclass;
3974 /* The other methods are not needed. */
3975 gcc_assert (methods == OPTAB_DIRECT || methods == OPTAB_WIDEN
3976 || methods == OPTAB_LIB_WIDEN);
3978 /* If we are optimizing, force expensive constants into a register. */
3979 if (CONSTANT_P (x) && optimize
3980 && (rtx_cost (x, COMPARE, 0, optimize_insn_for_speed_p ())
3981 > COSTS_N_INSNS (1)))
3982 x = force_reg (mode, x);
3984 if (CONSTANT_P (y) && optimize
3985 && (rtx_cost (y, COMPARE, 1, optimize_insn_for_speed_p ())
3986 > COSTS_N_INSNS (1)))
3987 y = force_reg (mode, y);
3990 /* Make sure if we have a canonical comparison. The RTL
3991 documentation states that canonical comparisons are required only
3992 for targets which have cc0. */
3993 gcc_assert (!CONSTANT_P (x) || CONSTANT_P (y));
3996 /* Don't let both operands fail to indicate the mode. */
3997 if (GET_MODE (x) == VOIDmode && GET_MODE (y) == VOIDmode)
3998 x = force_reg (mode, x);
3999 if (mode == VOIDmode)
4000 mode = GET_MODE (x) != VOIDmode ? GET_MODE (x) : GET_MODE (y);
4002 /* Handle all BLKmode compares. */
4004 if (mode == BLKmode)
4006 enum machine_mode result_mode;
4007 enum insn_code cmp_code;
4012 = GEN_INT (MIN (MEM_ALIGN (x), MEM_ALIGN (y)) / BITS_PER_UNIT);
4016 /* Try to use a memory block compare insn - either cmpstr
4017 or cmpmem will do. */
4018 for (cmp_mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
4019 cmp_mode != VOIDmode;
4020 cmp_mode = GET_MODE_WIDER_MODE (cmp_mode))
4022 cmp_code = direct_optab_handler (cmpmem_optab, cmp_mode);
4023 if (cmp_code == CODE_FOR_nothing)
4024 cmp_code = direct_optab_handler (cmpstr_optab, cmp_mode);
4025 if (cmp_code == CODE_FOR_nothing)
4026 cmp_code = direct_optab_handler (cmpstrn_optab, cmp_mode);
4027 if (cmp_code == CODE_FOR_nothing)
4030 /* Must make sure the size fits the insn's mode. */
4031 if ((CONST_INT_P (size)
4032 && INTVAL (size) >= (1 << GET_MODE_BITSIZE (cmp_mode)))
4033 || (GET_MODE_BITSIZE (GET_MODE (size))
4034 > GET_MODE_BITSIZE (cmp_mode)))
4037 result_mode = insn_data[cmp_code].operand[0].mode;
4038 result = gen_reg_rtx (result_mode);
4039 size = convert_to_mode (cmp_mode, size, 1);
4040 emit_insn (GEN_FCN (cmp_code) (result, x, y, size, opalign));
4042 *ptest = gen_rtx_fmt_ee (comparison, VOIDmode, result, const0_rtx);
4043 *pmode = result_mode;
4047 if (methods != OPTAB_LIB && methods != OPTAB_LIB_WIDEN)
4050 /* Otherwise call a library function, memcmp. */
4051 libfunc = memcmp_libfunc;
4052 length_type = sizetype;
4053 result_mode = TYPE_MODE (integer_type_node);
4054 cmp_mode = TYPE_MODE (length_type);
4055 size = convert_to_mode (TYPE_MODE (length_type), size,
4056 TYPE_UNSIGNED (length_type));
4058 result = emit_library_call_value (libfunc, 0, LCT_PURE,
4064 *ptest = gen_rtx_fmt_ee (comparison, VOIDmode, result, const0_rtx);
4065 *pmode = result_mode;
4069 /* Don't allow operands to the compare to trap, as that can put the
4070 compare and branch in different basic blocks. */
4071 if (cfun->can_throw_non_call_exceptions)
4074 x = force_reg (mode, x);
4076 y = force_reg (mode, y);
4079 if (GET_MODE_CLASS (mode) == MODE_CC)
4081 gcc_assert (can_compare_p (comparison, CCmode, ccp_jump));
4082 *ptest = gen_rtx_fmt_ee (comparison, VOIDmode, x, y);
4086 mclass = GET_MODE_CLASS (mode);
4087 test = gen_rtx_fmt_ee (comparison, VOIDmode, x, y);
4091 enum insn_code icode;
4092 icode = optab_handler (cbranch_optab, cmp_mode);
4093 if (icode != CODE_FOR_nothing
4094 && insn_operand_matches (icode, 0, test))
4096 rtx last = get_last_insn ();
4097 rtx op0 = prepare_operand (icode, x, 1, mode, cmp_mode, unsignedp);
4098 rtx op1 = prepare_operand (icode, y, 2, mode, cmp_mode, unsignedp);
4100 && insn_operand_matches (icode, 1, op0)
4101 && insn_operand_matches (icode, 2, op1))
4103 XEXP (test, 0) = op0;
4104 XEXP (test, 1) = op1;
4109 delete_insns_since (last);
4112 if (methods == OPTAB_DIRECT || !CLASS_HAS_WIDER_MODES_P (mclass))
4114 cmp_mode = GET_MODE_WIDER_MODE (cmp_mode);
4116 while (cmp_mode != VOIDmode);
4118 if (methods != OPTAB_LIB_WIDEN)
4121 if (!SCALAR_FLOAT_MODE_P (mode))
4125 /* Handle a libcall just for the mode we are using. */
4126 libfunc = optab_libfunc (cmp_optab, mode);
4127 gcc_assert (libfunc);
4129 /* If we want unsigned, and this mode has a distinct unsigned
4130 comparison routine, use that. */
4133 rtx ulibfunc = optab_libfunc (ucmp_optab, mode);
4138 result = emit_library_call_value (libfunc, NULL_RTX, LCT_CONST,
4139 targetm.libgcc_cmp_return_mode (),
4140 2, x, mode, y, mode);
4142 /* There are two kinds of comparison routines. Biased routines
4143 return 0/1/2, and unbiased routines return -1/0/1. Other parts
4144 of gcc expect that the comparison operation is equivalent
4145 to the modified comparison. For signed comparisons compare the
4146 result against 1 in the biased case, and zero in the unbiased
4147 case. For unsigned comparisons always compare against 1 after
4148 biasing the unbiased result by adding 1. This gives us a way to
4150 The comparisons in the fixed-point helper library are always
4155 if (!TARGET_LIB_INT_CMP_BIASED && !ALL_FIXED_POINT_MODE_P (mode))
4158 x = plus_constant (result, 1);
4164 prepare_cmp_insn (x, y, comparison, NULL_RTX, unsignedp, methods,
4168 prepare_float_lib_cmp (x, y, comparison, ptest, pmode);
4176 /* Before emitting an insn with code ICODE, make sure that X, which is going
4177 to be used for operand OPNUM of the insn, is converted from mode MODE to
4178 WIDER_MODE (UNSIGNEDP determines whether it is an unsigned conversion), and
4179 that it is accepted by the operand predicate. Return the new value. */
4182 prepare_operand (enum insn_code icode, rtx x, int opnum, enum machine_mode mode,
4183 enum machine_mode wider_mode, int unsignedp)
4185 if (mode != wider_mode)
4186 x = convert_modes (wider_mode, mode, x, unsignedp);
4188 if (!insn_operand_matches (icode, opnum, x))
4190 if (reload_completed)
4192 x = copy_to_mode_reg (insn_data[(int) icode].operand[opnum].mode, x);
4198 /* Subroutine of emit_cmp_and_jump_insns; this function is called when we know
4199 we can do the branch. */
4202 emit_cmp_and_jump_insn_1 (rtx test, enum machine_mode mode, rtx label)
4204 enum machine_mode optab_mode;
4205 enum mode_class mclass;
4206 enum insn_code icode;
4208 mclass = GET_MODE_CLASS (mode);
4209 optab_mode = (mclass == MODE_CC) ? CCmode : mode;
4210 icode = optab_handler (cbranch_optab, optab_mode);
4212 gcc_assert (icode != CODE_FOR_nothing);
4213 gcc_assert (insn_operand_matches (icode, 0, test));
4214 emit_jump_insn (GEN_FCN (icode) (test, XEXP (test, 0), XEXP (test, 1), label));
4217 /* Generate code to compare X with Y so that the condition codes are
4218 set and to jump to LABEL if the condition is true. If X is a
4219 constant and Y is not a constant, then the comparison is swapped to
4220 ensure that the comparison RTL has the canonical form.
4222 UNSIGNEDP nonzero says that X and Y are unsigned; this matters if they
4223 need to be widened. UNSIGNEDP is also used to select the proper
4224 branch condition code.
4226 If X and Y have mode BLKmode, then SIZE specifies the size of both X and Y.
4228 MODE is the mode of the inputs (in case they are const_int).
4230 COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.).
4231 It will be potentially converted into an unsigned variant based on
4232 UNSIGNEDP to select a proper jump instruction. */
4235 emit_cmp_and_jump_insns (rtx x, rtx y, enum rtx_code comparison, rtx size,
4236 enum machine_mode mode, int unsignedp, rtx label)
4238 rtx op0 = x, op1 = y;
4241 /* Swap operands and condition to ensure canonical RTL. */
4242 if (swap_commutative_operands_p (x, y)
4243 && can_compare_p (swap_condition (comparison), mode, ccp_jump))
4246 comparison = swap_condition (comparison);
4249 /* If OP0 is still a constant, then both X and Y must be constants
4250 or the opposite comparison is not supported. Force X into a register
4251 to create canonical RTL. */
4252 if (CONSTANT_P (op0))
4253 op0 = force_reg (mode, op0);
4256 comparison = unsigned_condition (comparison);
4258 prepare_cmp_insn (op0, op1, comparison, size, unsignedp, OPTAB_LIB_WIDEN,
4260 emit_cmp_and_jump_insn_1 (test, mode, label);
4264 /* Emit a library call comparison between floating point X and Y.
4265 COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.). */
4268 prepare_float_lib_cmp (rtx x, rtx y, enum rtx_code comparison,
4269 rtx *ptest, enum machine_mode *pmode)
4271 enum rtx_code swapped = swap_condition (comparison);
4272 enum rtx_code reversed = reverse_condition_maybe_unordered (comparison);
4273 enum machine_mode orig_mode = GET_MODE (x);
4274 enum machine_mode mode, cmp_mode;
4275 rtx true_rtx, false_rtx;
4276 rtx value, target, insns, equiv;
4278 bool reversed_p = false;
4279 cmp_mode = targetm.libgcc_cmp_return_mode ();
4281 for (mode = orig_mode;
4283 mode = GET_MODE_WIDER_MODE (mode))
4285 if (code_to_optab[comparison]
4286 && (libfunc = optab_libfunc (code_to_optab[comparison], mode)))
4289 if (code_to_optab[swapped]
4290 && (libfunc = optab_libfunc (code_to_optab[swapped], mode)))
4293 tmp = x; x = y; y = tmp;
4294 comparison = swapped;
4298 if (code_to_optab[reversed]
4299 && (libfunc = optab_libfunc (code_to_optab[reversed], mode)))
4301 comparison = reversed;
4307 gcc_assert (mode != VOIDmode);
4309 if (mode != orig_mode)
4311 x = convert_to_mode (mode, x, 0);
4312 y = convert_to_mode (mode, y, 0);
4315 /* Attach a REG_EQUAL note describing the semantics of the libcall to
4316 the RTL. The allows the RTL optimizers to delete the libcall if the
4317 condition can be determined at compile-time. */
4318 if (comparison == UNORDERED
4319 || FLOAT_LIB_COMPARE_RETURNS_BOOL (mode, comparison))
4321 true_rtx = const_true_rtx;
4322 false_rtx = const0_rtx;
4329 true_rtx = const0_rtx;
4330 false_rtx = const_true_rtx;
4334 true_rtx = const_true_rtx;
4335 false_rtx = const0_rtx;
4339 true_rtx = const1_rtx;
4340 false_rtx = const0_rtx;
4344 true_rtx = const0_rtx;
4345 false_rtx = constm1_rtx;
4349 true_rtx = constm1_rtx;
4350 false_rtx = const0_rtx;
4354 true_rtx = const0_rtx;
4355 false_rtx = const1_rtx;
4363 if (comparison == UNORDERED)
4365 rtx temp = simplify_gen_relational (NE, cmp_mode, mode, x, x);
4366 equiv = simplify_gen_relational (NE, cmp_mode, mode, y, y);
4367 equiv = simplify_gen_ternary (IF_THEN_ELSE, cmp_mode, cmp_mode,
4368 temp, const_true_rtx, equiv);
4372 equiv = simplify_gen_relational (comparison, cmp_mode, mode, x, y);
4373 if (! FLOAT_LIB_COMPARE_RETURNS_BOOL (mode, comparison))
4374 equiv = simplify_gen_ternary (IF_THEN_ELSE, cmp_mode, cmp_mode,
4375 equiv, true_rtx, false_rtx);
4379 value = emit_library_call_value (libfunc, NULL_RTX, LCT_CONST,
4380 cmp_mode, 2, x, mode, y, mode);
4381 insns = get_insns ();
4384 target = gen_reg_rtx (cmp_mode);
4385 emit_libcall_block (insns, target, value, equiv);
4387 if (comparison == UNORDERED
4388 || FLOAT_LIB_COMPARE_RETURNS_BOOL (mode, comparison)
4390 *ptest = gen_rtx_fmt_ee (reversed_p ? EQ : NE, VOIDmode, target, false_rtx);
4392 *ptest = gen_rtx_fmt_ee (comparison, VOIDmode, target, const0_rtx);
4397 /* Generate code to indirectly jump to a location given in the rtx LOC. */
4400 emit_indirect_jump (rtx loc)
4402 struct expand_operand ops[1];
4404 create_address_operand (&ops[0], loc);
4405 expand_jump_insn (CODE_FOR_indirect_jump, 1, ops);
4409 #ifdef HAVE_conditional_move
4411 /* Emit a conditional move instruction if the machine supports one for that
4412 condition and machine mode.
4414 OP0 and OP1 are the operands that should be compared using CODE. CMODE is
4415 the mode to use should they be constants. If it is VOIDmode, they cannot
4418 OP2 should be stored in TARGET if the comparison is true, otherwise OP3
4419 should be stored there. MODE is the mode to use should they be constants.
4420 If it is VOIDmode, they cannot both be constants.
4422 The result is either TARGET (perhaps modified) or NULL_RTX if the operation
4423 is not supported. */
4426 emit_conditional_move (rtx target, enum rtx_code code, rtx op0, rtx op1,
4427 enum machine_mode cmode, rtx op2, rtx op3,
4428 enum machine_mode mode, int unsignedp)
4430 rtx tem, comparison, last;
4431 enum insn_code icode;
4432 enum rtx_code reversed;
4434 /* If one operand is constant, make it the second one. Only do this
4435 if the other operand is not constant as well. */
4437 if (swap_commutative_operands_p (op0, op1))
4442 code = swap_condition (code);
4445 /* get_condition will prefer to generate LT and GT even if the old
4446 comparison was against zero, so undo that canonicalization here since
4447 comparisons against zero are cheaper. */
4448 if (code == LT && op1 == const1_rtx)
4449 code = LE, op1 = const0_rtx;
4450 else if (code == GT && op1 == constm1_rtx)
4451 code = GE, op1 = const0_rtx;
4453 if (cmode == VOIDmode)
4454 cmode = GET_MODE (op0);
4456 if (swap_commutative_operands_p (op2, op3)
4457 && ((reversed = reversed_comparison_code_parts (code, op0, op1, NULL))
4466 if (mode == VOIDmode)
4467 mode = GET_MODE (op2);
4469 icode = direct_optab_handler (movcc_optab, mode);
4471 if (icode == CODE_FOR_nothing)
4475 target = gen_reg_rtx (mode);
4477 code = unsignedp ? unsigned_condition (code) : code;
4478 comparison = simplify_gen_relational (code, VOIDmode, cmode, op0, op1);
4480 /* We can get const0_rtx or const_true_rtx in some circumstances. Just
4481 return NULL and let the caller figure out how best to deal with this
4483 if (!COMPARISON_P (comparison))
4486 do_pending_stack_adjust ();
4487 last = get_last_insn ();
4488 prepare_cmp_insn (XEXP (comparison, 0), XEXP (comparison, 1),
4489 GET_CODE (comparison), NULL_RTX, unsignedp, OPTAB_WIDEN,
4490 &comparison, &cmode);
4493 struct expand_operand ops[4];
4495 create_output_operand (&ops[0], target, mode);
4496 create_fixed_operand (&ops[1], comparison);
4497 create_input_operand (&ops[2], op2, mode);
4498 create_input_operand (&ops[3], op3, mode);
4499 if (maybe_expand_insn (icode, 4, ops))
4501 if (ops[0].value != target)
4502 convert_move (target, ops[0].value, false);
4506 delete_insns_since (last);
4510 /* Return nonzero if a conditional move of mode MODE is supported.
4512 This function is for combine so it can tell whether an insn that looks
4513 like a conditional move is actually supported by the hardware. If we
4514 guess wrong we lose a bit on optimization, but that's it. */
4515 /* ??? sparc64 supports conditionally moving integers values based on fp
4516 comparisons, and vice versa. How do we handle them? */
4519 can_conditionally_move_p (enum machine_mode mode)
4521 if (direct_optab_handler (movcc_optab, mode) != CODE_FOR_nothing)
4527 #endif /* HAVE_conditional_move */
4529 /* Emit a conditional addition instruction if the machine supports one for that
4530 condition and machine mode.
4532 OP0 and OP1 are the operands that should be compared using CODE. CMODE is
4533 the mode to use should they be constants. If it is VOIDmode, they cannot
4536 OP2 should be stored in TARGET if the comparison is true, otherwise OP2+OP3
4537 should be stored there. MODE is the mode to use should they be constants.
4538 If it is VOIDmode, they cannot both be constants.
4540 The result is either TARGET (perhaps modified) or NULL_RTX if the operation
4541 is not supported. */
4544 emit_conditional_add (rtx target, enum rtx_code code, rtx op0, rtx op1,
4545 enum machine_mode cmode, rtx op2, rtx op3,
4546 enum machine_mode mode, int unsignedp)
4548 rtx tem, comparison, last;
4549 enum insn_code icode;
4550 enum rtx_code reversed;
4552 /* If one operand is constant, make it the second one. Only do this
4553 if the other operand is not constant as well. */
4555 if (swap_commutative_operands_p (op0, op1))
4560 code = swap_condition (code);
4563 /* get_condition will prefer to generate LT and GT even if the old
4564 comparison was against zero, so undo that canonicalization here since
4565 comparisons against zero are cheaper. */
4566 if (code == LT && op1 == const1_rtx)
4567 code = LE, op1 = const0_rtx;
4568 else if (code == GT && op1 == constm1_rtx)
4569 code = GE, op1 = const0_rtx;
4571 if (cmode == VOIDmode)
4572 cmode = GET_MODE (op0);
4574 if (swap_commutative_operands_p (op2, op3)
4575 && ((reversed = reversed_comparison_code_parts (code, op0, op1, NULL))
4584 if (mode == VOIDmode)
4585 mode = GET_MODE (op2);
4587 icode = optab_handler (addcc_optab, mode);
4589 if (icode == CODE_FOR_nothing)
4593 target = gen_reg_rtx (mode);
4595 code = unsignedp ? unsigned_condition (code) : code;
4596 comparison = simplify_gen_relational (code, VOIDmode, cmode, op0, op1);
4598 /* We can get const0_rtx or const_true_rtx in some circumstances. Just
4599 return NULL and let the caller figure out how best to deal with this
4601 if (!COMPARISON_P (comparison))
4604 do_pending_stack_adjust ();
4605 last = get_last_insn ();
4606 prepare_cmp_insn (XEXP (comparison, 0), XEXP (comparison, 1),
4607 GET_CODE (comparison), NULL_RTX, unsignedp, OPTAB_WIDEN,
4608 &comparison, &cmode);
4611 struct expand_operand ops[4];
4613 create_output_operand (&ops[0], target, mode);
4614 create_fixed_operand (&ops[1], comparison);
4615 create_input_operand (&ops[2], op2, mode);
4616 create_input_operand (&ops[3], op3, mode);
4617 if (maybe_expand_insn (icode, 4, ops))
4619 if (ops[0].value != target)
4620 convert_move (target, ops[0].value, false);
4624 delete_insns_since (last);
4628 /* These functions attempt to generate an insn body, rather than
4629 emitting the insn, but if the gen function already emits them, we
4630 make no attempt to turn them back into naked patterns. */
4632 /* Generate and return an insn body to add Y to X. */
4635 gen_add2_insn (rtx x, rtx y)
4637 enum insn_code icode = optab_handler (add_optab, GET_MODE (x));
4639 gcc_assert (insn_operand_matches (icode, 0, x));
4640 gcc_assert (insn_operand_matches (icode, 1, x));
4641 gcc_assert (insn_operand_matches (icode, 2, y));
4643 return GEN_FCN (icode) (x, x, y);
4646 /* Generate and return an insn body to add r1 and c,
4647 storing the result in r0. */
4650 gen_add3_insn (rtx r0, rtx r1, rtx c)
4652 enum insn_code icode = optab_handler (add_optab, GET_MODE (r0));
4654 if (icode == CODE_FOR_nothing
4655 || !insn_operand_matches (icode, 0, r0)
4656 || !insn_operand_matches (icode, 1, r1)
4657 || !insn_operand_matches (icode, 2, c))
4660 return GEN_FCN (icode) (r0, r1, c);
4664 have_add2_insn (rtx x, rtx y)
4666 enum insn_code icode;
4668 gcc_assert (GET_MODE (x) != VOIDmode);
4670 icode = optab_handler (add_optab, GET_MODE (x));
4672 if (icode == CODE_FOR_nothing)
4675 if (!insn_operand_matches (icode, 0, x)
4676 || !insn_operand_matches (icode, 1, x)
4677 || !insn_operand_matches (icode, 2, y))
4683 /* Generate and return an insn body to subtract Y from X. */
4686 gen_sub2_insn (rtx x, rtx y)
4688 enum insn_code icode = optab_handler (sub_optab, GET_MODE (x));
4690 gcc_assert (insn_operand_matches (icode, 0, x));
4691 gcc_assert (insn_operand_matches (icode, 1, x));
4692 gcc_assert (insn_operand_matches (icode, 2, y));
4694 return GEN_FCN (icode) (x, x, y);
4697 /* Generate and return an insn body to subtract r1 and c,
4698 storing the result in r0. */
4701 gen_sub3_insn (rtx r0, rtx r1, rtx c)
4703 enum insn_code icode = optab_handler (sub_optab, GET_MODE (r0));
4705 if (icode == CODE_FOR_nothing
4706 || !insn_operand_matches (icode, 0, r0)
4707 || !insn_operand_matches (icode, 1, r1)
4708 || !insn_operand_matches (icode, 2, c))
4711 return GEN_FCN (icode) (r0, r1, c);
4715 have_sub2_insn (rtx x, rtx y)
4717 enum insn_code icode;
4719 gcc_assert (GET_MODE (x) != VOIDmode);
4721 icode = optab_handler (sub_optab, GET_MODE (x));
4723 if (icode == CODE_FOR_nothing)
4726 if (!insn_operand_matches (icode, 0, x)
4727 || !insn_operand_matches (icode, 1, x)
4728 || !insn_operand_matches (icode, 2, y))
4734 /* Generate the body of an instruction to copy Y into X.
4735 It may be a list of insns, if one insn isn't enough. */
4738 gen_move_insn (rtx x, rtx y)
4743 emit_move_insn_1 (x, y);
4749 /* Return the insn code used to extend FROM_MODE to TO_MODE.
4750 UNSIGNEDP specifies zero-extension instead of sign-extension. If
4751 no such operation exists, CODE_FOR_nothing will be returned. */
4754 can_extend_p (enum machine_mode to_mode, enum machine_mode from_mode,
4758 #ifdef HAVE_ptr_extend
4760 return CODE_FOR_ptr_extend;
4763 tab = unsignedp ? zext_optab : sext_optab;
4764 return convert_optab_handler (tab, to_mode, from_mode);
4767 /* Generate the body of an insn to extend Y (with mode MFROM)
4768 into X (with mode MTO). Do zero-extension if UNSIGNEDP is nonzero. */
4771 gen_extend_insn (rtx x, rtx y, enum machine_mode mto,
4772 enum machine_mode mfrom, int unsignedp)
4774 enum insn_code icode = can_extend_p (mto, mfrom, unsignedp);
4775 return GEN_FCN (icode) (x, y);
4778 /* can_fix_p and can_float_p say whether the target machine
4779 can directly convert a given fixed point type to
4780 a given floating point type, or vice versa.
4781 The returned value is the CODE_FOR_... value to use,
4782 or CODE_FOR_nothing if these modes cannot be directly converted.
4784 *TRUNCP_PTR is set to 1 if it is necessary to output
4785 an explicit FTRUNC insn before the fix insn; otherwise 0. */
4787 static enum insn_code
4788 can_fix_p (enum machine_mode fixmode, enum machine_mode fltmode,
4789 int unsignedp, int *truncp_ptr)
4792 enum insn_code icode;
4794 tab = unsignedp ? ufixtrunc_optab : sfixtrunc_optab;
4795 icode = convert_optab_handler (tab, fixmode, fltmode);
4796 if (icode != CODE_FOR_nothing)
4802 /* FIXME: This requires a port to define both FIX and FTRUNC pattern
4803 for this to work. We need to rework the fix* and ftrunc* patterns
4804 and documentation. */
4805 tab = unsignedp ? ufix_optab : sfix_optab;
4806 icode = convert_optab_handler (tab, fixmode, fltmode);
4807 if (icode != CODE_FOR_nothing
4808 && optab_handler (ftrunc_optab, fltmode) != CODE_FOR_nothing)
4815 return CODE_FOR_nothing;
4819 can_float_p (enum machine_mode fltmode, enum machine_mode fixmode,
4824 tab = unsignedp ? ufloat_optab : sfloat_optab;
4825 return convert_optab_handler (tab, fltmode, fixmode);
4828 /* Generate code to convert FROM to floating point
4829 and store in TO. FROM must be fixed point and not VOIDmode.
4830 UNSIGNEDP nonzero means regard FROM as unsigned.
4831 Normally this is done by correcting the final value
4832 if it is negative. */
4835 expand_float (rtx to, rtx from, int unsignedp)
4837 enum insn_code icode;
4839 enum machine_mode fmode, imode;
4840 bool can_do_signed = false;
4842 /* Crash now, because we won't be able to decide which mode to use. */
4843 gcc_assert (GET_MODE (from) != VOIDmode);
4845 /* Look for an insn to do the conversion. Do it in the specified
4846 modes if possible; otherwise convert either input, output or both to
4847 wider mode. If the integer mode is wider than the mode of FROM,
4848 we can do the conversion signed even if the input is unsigned. */
4850 for (fmode = GET_MODE (to); fmode != VOIDmode;
4851 fmode = GET_MODE_WIDER_MODE (fmode))
4852 for (imode = GET_MODE (from); imode != VOIDmode;
4853 imode = GET_MODE_WIDER_MODE (imode))
4855 int doing_unsigned = unsignedp;
4857 if (fmode != GET_MODE (to)
4858 && significand_size (fmode) < GET_MODE_PRECISION (GET_MODE (from)))
4861 icode = can_float_p (fmode, imode, unsignedp);
4862 if (icode == CODE_FOR_nothing && unsignedp)
4864 enum insn_code scode = can_float_p (fmode, imode, 0);
4865 if (scode != CODE_FOR_nothing)
4866 can_do_signed = true;
4867 if (imode != GET_MODE (from))
4868 icode = scode, doing_unsigned = 0;
4871 if (icode != CODE_FOR_nothing)
4873 if (imode != GET_MODE (from))
4874 from = convert_to_mode (imode, from, unsignedp);
4876 if (fmode != GET_MODE (to))
4877 target = gen_reg_rtx (fmode);
4879 emit_unop_insn (icode, target, from,
4880 doing_unsigned ? UNSIGNED_FLOAT : FLOAT);
4883 convert_move (to, target, 0);
4888 /* Unsigned integer, and no way to convert directly. Convert as signed,
4889 then unconditionally adjust the result. */
4890 if (unsignedp && can_do_signed)
4892 rtx label = gen_label_rtx ();
4894 REAL_VALUE_TYPE offset;
4896 /* Look for a usable floating mode FMODE wider than the source and at
4897 least as wide as the target. Using FMODE will avoid rounding woes
4898 with unsigned values greater than the signed maximum value. */
4900 for (fmode = GET_MODE (to); fmode != VOIDmode;
4901 fmode = GET_MODE_WIDER_MODE (fmode))
4902 if (GET_MODE_PRECISION (GET_MODE (from)) < GET_MODE_BITSIZE (fmode)
4903 && can_float_p (fmode, GET_MODE (from), 0) != CODE_FOR_nothing)
4906 if (fmode == VOIDmode)
4908 /* There is no such mode. Pretend the target is wide enough. */
4909 fmode = GET_MODE (to);
4911 /* Avoid double-rounding when TO is narrower than FROM. */
4912 if ((significand_size (fmode) + 1)
4913 < GET_MODE_PRECISION (GET_MODE (from)))
4916 rtx neglabel = gen_label_rtx ();
4918 /* Don't use TARGET if it isn't a register, is a hard register,
4919 or is the wrong mode. */
4921 || REGNO (target) < FIRST_PSEUDO_REGISTER
4922 || GET_MODE (target) != fmode)
4923 target = gen_reg_rtx (fmode);
4925 imode = GET_MODE (from);
4926 do_pending_stack_adjust ();
4928 /* Test whether the sign bit is set. */
4929 emit_cmp_and_jump_insns (from, const0_rtx, LT, NULL_RTX, imode,
4932 /* The sign bit is not set. Convert as signed. */
4933 expand_float (target, from, 0);
4934 emit_jump_insn (gen_jump (label));
4937 /* The sign bit is set.
4938 Convert to a usable (positive signed) value by shifting right
4939 one bit, while remembering if a nonzero bit was shifted
4940 out; i.e., compute (from & 1) | (from >> 1). */
4942 emit_label (neglabel);
4943 temp = expand_binop (imode, and_optab, from, const1_rtx,
4944 NULL_RTX, 1, OPTAB_LIB_WIDEN);
4945 temp1 = expand_shift (RSHIFT_EXPR, imode, from, 1, NULL_RTX, 1);
4946 temp = expand_binop (imode, ior_optab, temp, temp1, temp, 1,
4948 expand_float (target, temp, 0);
4950 /* Multiply by 2 to undo the shift above. */
4951 temp = expand_binop (fmode, add_optab, target, target,
4952 target, 0, OPTAB_LIB_WIDEN);
4954 emit_move_insn (target, temp);
4956 do_pending_stack_adjust ();
4962 /* If we are about to do some arithmetic to correct for an
4963 unsigned operand, do it in a pseudo-register. */
4965 if (GET_MODE (to) != fmode
4966 || !REG_P (to) || REGNO (to) < FIRST_PSEUDO_REGISTER)
4967 target = gen_reg_rtx (fmode);
4969 /* Convert as signed integer to floating. */
4970 expand_float (target, from, 0);
4972 /* If FROM is negative (and therefore TO is negative),
4973 correct its value by 2**bitwidth. */
4975 do_pending_stack_adjust ();
4976 emit_cmp_and_jump_insns (from, const0_rtx, GE, NULL_RTX, GET_MODE (from),
4980 real_2expN (&offset, GET_MODE_PRECISION (GET_MODE (from)), fmode);
4981 temp = expand_binop (fmode, add_optab, target,
4982 CONST_DOUBLE_FROM_REAL_VALUE (offset, fmode),
4983 target, 0, OPTAB_LIB_WIDEN);
4985 emit_move_insn (target, temp);
4987 do_pending_stack_adjust ();
4992 /* No hardware instruction available; call a library routine. */
4997 convert_optab tab = unsignedp ? ufloat_optab : sfloat_optab;
4999 if (GET_MODE_SIZE (GET_MODE (from)) < GET_MODE_SIZE (SImode))
5000 from = convert_to_mode (SImode, from, unsignedp);
5002 libfunc = convert_optab_libfunc (tab, GET_MODE (to), GET_MODE (from));
5003 gcc_assert (libfunc);
5007 value = emit_library_call_value (libfunc, NULL_RTX, LCT_CONST,
5008 GET_MODE (to), 1, from,
5010 insns = get_insns ();
5013 emit_libcall_block (insns, target, value,
5014 gen_rtx_fmt_e (unsignedp ? UNSIGNED_FLOAT : FLOAT,
5015 GET_MODE (to), from));
5020 /* Copy result to requested destination
5021 if we have been computing in a temp location. */
5025 if (GET_MODE (target) == GET_MODE (to))
5026 emit_move_insn (to, target);
5028 convert_move (to, target, 0);
5032 /* Generate code to convert FROM to fixed point and store in TO. FROM
5033 must be floating point. */
5036 expand_fix (rtx to, rtx from, int unsignedp)
5038 enum insn_code icode;
5040 enum machine_mode fmode, imode;
5043 /* We first try to find a pair of modes, one real and one integer, at
5044 least as wide as FROM and TO, respectively, in which we can open-code
5045 this conversion. If the integer mode is wider than the mode of TO,
5046 we can do the conversion either signed or unsigned. */
5048 for (fmode = GET_MODE (from); fmode != VOIDmode;
5049 fmode = GET_MODE_WIDER_MODE (fmode))
5050 for (imode = GET_MODE (to); imode != VOIDmode;
5051 imode = GET_MODE_WIDER_MODE (imode))
5053 int doing_unsigned = unsignedp;
5055 icode = can_fix_p (imode, fmode, unsignedp, &must_trunc);
5056 if (icode == CODE_FOR_nothing && imode != GET_MODE (to) && unsignedp)
5057 icode = can_fix_p (imode, fmode, 0, &must_trunc), doing_unsigned = 0;
5059 if (icode != CODE_FOR_nothing)
5061 rtx last = get_last_insn ();
5062 if (fmode != GET_MODE (from))
5063 from = convert_to_mode (fmode, from, 0);
5067 rtx temp = gen_reg_rtx (GET_MODE (from));
5068 from = expand_unop (GET_MODE (from), ftrunc_optab, from,
5072 if (imode != GET_MODE (to))
5073 target = gen_reg_rtx (imode);
5075 if (maybe_emit_unop_insn (icode, target, from,
5076 doing_unsigned ? UNSIGNED_FIX : FIX))
5079 convert_move (to, target, unsignedp);
5082 delete_insns_since (last);
5086 /* For an unsigned conversion, there is one more way to do it.
5087 If we have a signed conversion, we generate code that compares
5088 the real value to the largest representable positive number. If if
5089 is smaller, the conversion is done normally. Otherwise, subtract
5090 one plus the highest signed number, convert, and add it back.
5092 We only need to check all real modes, since we know we didn't find
5093 anything with a wider integer mode.
5095 This code used to extend FP value into mode wider than the destination.
5096 This is needed for decimal float modes which cannot accurately
5097 represent one plus the highest signed number of the same size, but
5098 not for binary modes. Consider, for instance conversion from SFmode
5101 The hot path through the code is dealing with inputs smaller than 2^63
5102 and doing just the conversion, so there is no bits to lose.
5104 In the other path we know the value is positive in the range 2^63..2^64-1
5105 inclusive. (as for other input overflow happens and result is undefined)
5106 So we know that the most important bit set in mantissa corresponds to
5107 2^63. The subtraction of 2^63 should not generate any rounding as it
5108 simply clears out that bit. The rest is trivial. */
5110 if (unsignedp && GET_MODE_PRECISION (GET_MODE (to)) <= HOST_BITS_PER_WIDE_INT)
5111 for (fmode = GET_MODE (from); fmode != VOIDmode;
5112 fmode = GET_MODE_WIDER_MODE (fmode))
5113 if (CODE_FOR_nothing != can_fix_p (GET_MODE (to), fmode, 0, &must_trunc)
5114 && (!DECIMAL_FLOAT_MODE_P (fmode)
5115 || GET_MODE_BITSIZE (fmode) > GET_MODE_PRECISION (GET_MODE (to))))
5118 REAL_VALUE_TYPE offset;
5119 rtx limit, lab1, lab2, insn;
5121 bitsize = GET_MODE_PRECISION (GET_MODE (to));
5122 real_2expN (&offset, bitsize - 1, fmode);
5123 limit = CONST_DOUBLE_FROM_REAL_VALUE (offset, fmode);
5124 lab1 = gen_label_rtx ();
5125 lab2 = gen_label_rtx ();
5127 if (fmode != GET_MODE (from))
5128 from = convert_to_mode (fmode, from, 0);
5130 /* See if we need to do the subtraction. */
5131 do_pending_stack_adjust ();
5132 emit_cmp_and_jump_insns (from, limit, GE, NULL_RTX, GET_MODE (from),
5135 /* If not, do the signed "fix" and branch around fixup code. */
5136 expand_fix (to, from, 0);
5137 emit_jump_insn (gen_jump (lab2));
5140 /* Otherwise, subtract 2**(N-1), convert to signed number,
5141 then add 2**(N-1). Do the addition using XOR since this
5142 will often generate better code. */
5144 target = expand_binop (GET_MODE (from), sub_optab, from, limit,
5145 NULL_RTX, 0, OPTAB_LIB_WIDEN);
5146 expand_fix (to, target, 0);
5147 target = expand_binop (GET_MODE (to), xor_optab, to,
5149 ((HOST_WIDE_INT) 1 << (bitsize - 1),
5151 to, 1, OPTAB_LIB_WIDEN);
5154 emit_move_insn (to, target);
5158 if (optab_handler (mov_optab, GET_MODE (to)) != CODE_FOR_nothing)
5160 /* Make a place for a REG_NOTE and add it. */
5161 insn = emit_move_insn (to, to);
5162 set_unique_reg_note (insn,
5164 gen_rtx_fmt_e (UNSIGNED_FIX,
5172 /* We can't do it with an insn, so use a library call. But first ensure
5173 that the mode of TO is at least as wide as SImode, since those are the
5174 only library calls we know about. */
5176 if (GET_MODE_SIZE (GET_MODE (to)) < GET_MODE_SIZE (SImode))
5178 target = gen_reg_rtx (SImode);
5180 expand_fix (target, from, unsignedp);
5188 convert_optab tab = unsignedp ? ufix_optab : sfix_optab;
5189 libfunc = convert_optab_libfunc (tab, GET_MODE (to), GET_MODE (from));
5190 gcc_assert (libfunc);
5194 value = emit_library_call_value (libfunc, NULL_RTX, LCT_CONST,
5195 GET_MODE (to), 1, from,
5197 insns = get_insns ();
5200 emit_libcall_block (insns, target, value,
5201 gen_rtx_fmt_e (unsignedp ? UNSIGNED_FIX : FIX,
5202 GET_MODE (to), from));
5207 if (GET_MODE (to) == GET_MODE (target))
5208 emit_move_insn (to, target);
5210 convert_move (to, target, 0);
5214 /* Generate code to convert FROM or TO a fixed-point.
5215 If UINTP is true, either TO or FROM is an unsigned integer.
5216 If SATP is true, we need to saturate the result. */
5219 expand_fixed_convert (rtx to, rtx from, int uintp, int satp)
5221 enum machine_mode to_mode = GET_MODE (to);
5222 enum machine_mode from_mode = GET_MODE (from);
5224 enum rtx_code this_code;
5225 enum insn_code code;
5229 if (to_mode == from_mode)
5231 emit_move_insn (to, from);
5237 tab = satp ? satfractuns_optab : fractuns_optab;
5238 this_code = satp ? UNSIGNED_SAT_FRACT : UNSIGNED_FRACT_CONVERT;
5242 tab = satp ? satfract_optab : fract_optab;
5243 this_code = satp ? SAT_FRACT : FRACT_CONVERT;
5245 code = convert_optab_handler (tab, to_mode, from_mode);
5246 if (code != CODE_FOR_nothing)
5248 emit_unop_insn (code, to, from, this_code);
5252 libfunc = convert_optab_libfunc (tab, to_mode, from_mode);
5253 gcc_assert (libfunc);
5256 value = emit_library_call_value (libfunc, NULL_RTX, LCT_CONST, to_mode,
5257 1, from, from_mode);
5258 insns = get_insns ();
5261 emit_libcall_block (insns, to, value,
5262 gen_rtx_fmt_e (tab->code, to_mode, from));
5265 /* Generate code to convert FROM to fixed point and store in TO. FROM
5266 must be floating point, TO must be signed. Use the conversion optab
5267 TAB to do the conversion. */
5270 expand_sfix_optab (rtx to, rtx from, convert_optab tab)
5272 enum insn_code icode;
5274 enum machine_mode fmode, imode;
5276 /* We first try to find a pair of modes, one real and one integer, at
5277 least as wide as FROM and TO, respectively, in which we can open-code
5278 this conversion. If the integer mode is wider than the mode of TO,
5279 we can do the conversion either signed or unsigned. */
5281 for (fmode = GET_MODE (from); fmode != VOIDmode;
5282 fmode = GET_MODE_WIDER_MODE (fmode))
5283 for (imode = GET_MODE (to); imode != VOIDmode;
5284 imode = GET_MODE_WIDER_MODE (imode))
5286 icode = convert_optab_handler (tab, imode, fmode);
5287 if (icode != CODE_FOR_nothing)
5289 rtx last = get_last_insn ();
5290 if (fmode != GET_MODE (from))
5291 from = convert_to_mode (fmode, from, 0);
5293 if (imode != GET_MODE (to))
5294 target = gen_reg_rtx (imode);
5296 if (!maybe_emit_unop_insn (icode, target, from, UNKNOWN))
5298 delete_insns_since (last);
5302 convert_move (to, target, 0);
5310 /* Report whether we have an instruction to perform the operation
5311 specified by CODE on operands of mode MODE. */
5313 have_insn_for (enum rtx_code code, enum machine_mode mode)
5315 return (code_to_optab[(int) code] != 0
5316 && (optab_handler (code_to_optab[(int) code], mode)
5317 != CODE_FOR_nothing));
5320 /* Set all insn_code fields to CODE_FOR_nothing. */
5323 init_insn_codes (void)
5325 memset (optab_table, 0, sizeof (optab_table));
5326 memset (convert_optab_table, 0, sizeof (convert_optab_table));
5327 memset (direct_optab_table, 0, sizeof (direct_optab_table));
5330 /* Initialize OP's code to CODE, and write it into the code_to_optab table. */
5332 init_optab (optab op, enum rtx_code code)
5335 code_to_optab[(int) code] = op;
5338 /* Same, but fill in its code as CODE, and do _not_ write it into
5339 the code_to_optab table. */
5341 init_optabv (optab op, enum rtx_code code)
5346 /* Conversion optabs never go in the code_to_optab table. */
5348 init_convert_optab (convert_optab op, enum rtx_code code)
5353 /* Initialize the libfunc fields of an entire group of entries in some
5354 optab. Each entry is set equal to a string consisting of a leading
5355 pair of underscores followed by a generic operation name followed by
5356 a mode name (downshifted to lowercase) followed by a single character
5357 representing the number of operands for the given operation (which is
5358 usually one of the characters '2', '3', or '4').
5360 OPTABLE is the table in which libfunc fields are to be initialized.
5361 OPNAME is the generic (string) name of the operation.
5362 SUFFIX is the character which specifies the number of operands for
5363 the given generic operation.
5364 MODE is the mode to generate for.
5368 gen_libfunc (optab optable, const char *opname, int suffix, enum machine_mode mode)
5370 unsigned opname_len = strlen (opname);
5371 const char *mname = GET_MODE_NAME (mode);
5372 unsigned mname_len = strlen (mname);
5373 int prefix_len = targetm.libfunc_gnu_prefix ? 6 : 2;
5374 int len = prefix_len + opname_len + mname_len + 1 + 1;
5375 char *libfunc_name = XALLOCAVEC (char, len);
5382 if (targetm.libfunc_gnu_prefix)
5389 for (q = opname; *q; )
5391 for (q = mname; *q; q++)
5392 *p++ = TOLOWER (*q);
5396 set_optab_libfunc (optable, mode,
5397 ggc_alloc_string (libfunc_name, p - libfunc_name));
5400 /* Like gen_libfunc, but verify that integer operation is involved. */
5403 gen_int_libfunc (optab optable, const char *opname, char suffix,
5404 enum machine_mode mode)
5406 int maxsize = 2 * BITS_PER_WORD;
5408 if (GET_MODE_CLASS (mode) != MODE_INT)
5410 if (maxsize < LONG_LONG_TYPE_SIZE)
5411 maxsize = LONG_LONG_TYPE_SIZE;
5412 if (GET_MODE_CLASS (mode) != MODE_INT
5413 || mode < word_mode || GET_MODE_BITSIZE (mode) > maxsize)
5415 gen_libfunc (optable, opname, suffix, mode);
5418 /* Like gen_libfunc, but verify that FP and set decimal prefix if needed. */
5421 gen_fp_libfunc (optab optable, const char *opname, char suffix,
5422 enum machine_mode mode)
5426 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
5427 gen_libfunc (optable, opname, suffix, mode);
5428 if (DECIMAL_FLOAT_MODE_P (mode))
5430 dec_opname = XALLOCAVEC (char, sizeof (DECIMAL_PREFIX) + strlen (opname));
5431 /* For BID support, change the name to have either a bid_ or dpd_ prefix
5432 depending on the low level floating format used. */
5433 memcpy (dec_opname, DECIMAL_PREFIX, sizeof (DECIMAL_PREFIX) - 1);
5434 strcpy (dec_opname + sizeof (DECIMAL_PREFIX) - 1, opname);
5435 gen_libfunc (optable, dec_opname, suffix, mode);
5439 /* Like gen_libfunc, but verify that fixed-point operation is involved. */
5442 gen_fixed_libfunc (optab optable, const char *opname, char suffix,
5443 enum machine_mode mode)
5445 if (!ALL_FIXED_POINT_MODE_P (mode))
5447 gen_libfunc (optable, opname, suffix, mode);
5450 /* Like gen_libfunc, but verify that signed fixed-point operation is
5454 gen_signed_fixed_libfunc (optab optable, const char *opname, char suffix,
5455 enum machine_mode mode)
5457 if (!SIGNED_FIXED_POINT_MODE_P (mode))
5459 gen_libfunc (optable, opname, suffix, mode);
5462 /* Like gen_libfunc, but verify that unsigned fixed-point operation is
5466 gen_unsigned_fixed_libfunc (optab optable, const char *opname, char suffix,
5467 enum machine_mode mode)
5469 if (!UNSIGNED_FIXED_POINT_MODE_P (mode))
5471 gen_libfunc (optable, opname, suffix, mode);
5474 /* Like gen_libfunc, but verify that FP or INT operation is involved. */
5477 gen_int_fp_libfunc (optab optable, const char *name, char suffix,
5478 enum machine_mode mode)
5480 if (DECIMAL_FLOAT_MODE_P (mode) || GET_MODE_CLASS (mode) == MODE_FLOAT)
5481 gen_fp_libfunc (optable, name, suffix, mode);
5482 if (INTEGRAL_MODE_P (mode))
5483 gen_int_libfunc (optable, name, suffix, mode);
5486 /* Like gen_libfunc, but verify that FP or INT operation is involved
5487 and add 'v' suffix for integer operation. */
5490 gen_intv_fp_libfunc (optab optable, const char *name, char suffix,
5491 enum machine_mode mode)
5493 if (DECIMAL_FLOAT_MODE_P (mode) || GET_MODE_CLASS (mode) == MODE_FLOAT)
5494 gen_fp_libfunc (optable, name, suffix, mode);
5495 if (GET_MODE_CLASS (mode) == MODE_INT)
5497 int len = strlen (name);
5498 char *v_name = XALLOCAVEC (char, len + 2);
5499 strcpy (v_name, name);
5501 v_name[len + 1] = 0;
5502 gen_int_libfunc (optable, v_name, suffix, mode);
5506 /* Like gen_libfunc, but verify that FP or INT or FIXED operation is
5510 gen_int_fp_fixed_libfunc (optab optable, const char *name, char suffix,
5511 enum machine_mode mode)
5513 if (DECIMAL_FLOAT_MODE_P (mode) || GET_MODE_CLASS (mode) == MODE_FLOAT)
5514 gen_fp_libfunc (optable, name, suffix, mode);
5515 if (INTEGRAL_MODE_P (mode))
5516 gen_int_libfunc (optable, name, suffix, mode);
5517 if (ALL_FIXED_POINT_MODE_P (mode))
5518 gen_fixed_libfunc (optable, name, suffix, mode);
5521 /* Like gen_libfunc, but verify that FP or INT or signed FIXED operation is
5525 gen_int_fp_signed_fixed_libfunc (optab optable, const char *name, char suffix,
5526 enum machine_mode mode)
5528 if (DECIMAL_FLOAT_MODE_P (mode) || GET_MODE_CLASS (mode) == MODE_FLOAT)
5529 gen_fp_libfunc (optable, name, suffix, mode);
5530 if (INTEGRAL_MODE_P (mode))
5531 gen_int_libfunc (optable, name, suffix, mode);
5532 if (SIGNED_FIXED_POINT_MODE_P (mode))
5533 gen_signed_fixed_libfunc (optable, name, suffix, mode);
5536 /* Like gen_libfunc, but verify that INT or FIXED operation is
5540 gen_int_fixed_libfunc (optab optable, const char *name, char suffix,
5541 enum machine_mode mode)
5543 if (INTEGRAL_MODE_P (mode))
5544 gen_int_libfunc (optable, name, suffix, mode);
5545 if (ALL_FIXED_POINT_MODE_P (mode))
5546 gen_fixed_libfunc (optable, name, suffix, mode);
5549 /* Like gen_libfunc, but verify that INT or signed FIXED operation is
5553 gen_int_signed_fixed_libfunc (optab optable, const char *name, char suffix,
5554 enum machine_mode mode)
5556 if (INTEGRAL_MODE_P (mode))
5557 gen_int_libfunc (optable, name, suffix, mode);
5558 if (SIGNED_FIXED_POINT_MODE_P (mode))
5559 gen_signed_fixed_libfunc (optable, name, suffix, mode);
5562 /* Like gen_libfunc, but verify that INT or unsigned FIXED operation is
5566 gen_int_unsigned_fixed_libfunc (optab optable, const char *name, char suffix,
5567 enum machine_mode mode)
5569 if (INTEGRAL_MODE_P (mode))
5570 gen_int_libfunc (optable, name, suffix, mode);
5571 if (UNSIGNED_FIXED_POINT_MODE_P (mode))
5572 gen_unsigned_fixed_libfunc (optable, name, suffix, mode);
5575 /* Initialize the libfunc fields of an entire group of entries of an
5576 inter-mode-class conversion optab. The string formation rules are
5577 similar to the ones for init_libfuncs, above, but instead of having
5578 a mode name and an operand count these functions have two mode names
5579 and no operand count. */
5582 gen_interclass_conv_libfunc (convert_optab tab,
5584 enum machine_mode tmode,
5585 enum machine_mode fmode)
5587 size_t opname_len = strlen (opname);
5588 size_t mname_len = 0;
5590 const char *fname, *tname;
5592 int prefix_len = targetm.libfunc_gnu_prefix ? 6 : 2;
5593 char *libfunc_name, *suffix;
5594 char *nondec_name, *dec_name, *nondec_suffix, *dec_suffix;
5597 /* If this is a decimal conversion, add the current BID vs. DPD prefix that
5598 depends on which underlying decimal floating point format is used. */
5599 const size_t dec_len = sizeof (DECIMAL_PREFIX) - 1;
5601 mname_len = strlen (GET_MODE_NAME (tmode)) + strlen (GET_MODE_NAME (fmode));
5603 nondec_name = XALLOCAVEC (char, prefix_len + opname_len + mname_len + 1 + 1);
5604 nondec_name[0] = '_';
5605 nondec_name[1] = '_';
5606 if (targetm.libfunc_gnu_prefix)
5608 nondec_name[2] = 'g';
5609 nondec_name[3] = 'n';
5610 nondec_name[4] = 'u';
5611 nondec_name[5] = '_';
5614 memcpy (&nondec_name[prefix_len], opname, opname_len);
5615 nondec_suffix = nondec_name + opname_len + prefix_len;
5617 dec_name = XALLOCAVEC (char, 2 + dec_len + opname_len + mname_len + 1 + 1);
5620 memcpy (&dec_name[2], DECIMAL_PREFIX, dec_len);
5621 memcpy (&dec_name[2+dec_len], opname, opname_len);
5622 dec_suffix = dec_name + dec_len + opname_len + 2;
5624 fname = GET_MODE_NAME (fmode);
5625 tname = GET_MODE_NAME (tmode);
5627 if (DECIMAL_FLOAT_MODE_P(fmode) || DECIMAL_FLOAT_MODE_P(tmode))
5629 libfunc_name = dec_name;
5630 suffix = dec_suffix;
5634 libfunc_name = nondec_name;
5635 suffix = nondec_suffix;
5639 for (q = fname; *q; p++, q++)
5641 for (q = tname; *q; p++, q++)
5646 set_conv_libfunc (tab, tmode, fmode,
5647 ggc_alloc_string (libfunc_name, p - libfunc_name));
5650 /* Same as gen_interclass_conv_libfunc but verify that we are producing
5651 int->fp conversion. */
5654 gen_int_to_fp_conv_libfunc (convert_optab tab,
5656 enum machine_mode tmode,
5657 enum machine_mode fmode)
5659 if (GET_MODE_CLASS (fmode) != MODE_INT)
5661 if (GET_MODE_CLASS (tmode) != MODE_FLOAT && !DECIMAL_FLOAT_MODE_P (tmode))
5663 gen_interclass_conv_libfunc (tab, opname, tmode, fmode);
5666 /* ufloat_optab is special by using floatun for FP and floatuns decimal fp
5670 gen_ufloat_conv_libfunc (convert_optab tab,
5671 const char *opname ATTRIBUTE_UNUSED,
5672 enum machine_mode tmode,
5673 enum machine_mode fmode)
5675 if (DECIMAL_FLOAT_MODE_P (tmode))
5676 gen_int_to_fp_conv_libfunc (tab, "floatuns", tmode, fmode);
5678 gen_int_to_fp_conv_libfunc (tab, "floatun", tmode, fmode);
5681 /* Same as gen_interclass_conv_libfunc but verify that we are producing
5682 fp->int conversion. */
5685 gen_int_to_fp_nondecimal_conv_libfunc (convert_optab tab,
5687 enum machine_mode tmode,
5688 enum machine_mode fmode)
5690 if (GET_MODE_CLASS (fmode) != MODE_INT)
5692 if (GET_MODE_CLASS (tmode) != MODE_FLOAT)
5694 gen_interclass_conv_libfunc (tab, opname, tmode, fmode);
5697 /* Same as gen_interclass_conv_libfunc but verify that we are producing
5698 fp->int conversion with no decimal floating point involved. */
5701 gen_fp_to_int_conv_libfunc (convert_optab tab,
5703 enum machine_mode tmode,
5704 enum machine_mode fmode)
5706 if (GET_MODE_CLASS (fmode) != MODE_FLOAT && !DECIMAL_FLOAT_MODE_P (fmode))
5708 if (GET_MODE_CLASS (tmode) != MODE_INT)
5710 gen_interclass_conv_libfunc (tab, opname, tmode, fmode);
5713 /* Initialize the libfunc fields of an of an intra-mode-class conversion optab.
5714 The string formation rules are
5715 similar to the ones for init_libfunc, above. */
5718 gen_intraclass_conv_libfunc (convert_optab tab, const char *opname,
5719 enum machine_mode tmode, enum machine_mode fmode)
5721 size_t opname_len = strlen (opname);
5722 size_t mname_len = 0;
5724 const char *fname, *tname;
5726 int prefix_len = targetm.libfunc_gnu_prefix ? 6 : 2;
5727 char *nondec_name, *dec_name, *nondec_suffix, *dec_suffix;
5728 char *libfunc_name, *suffix;
5731 /* If this is a decimal conversion, add the current BID vs. DPD prefix that
5732 depends on which underlying decimal floating point format is used. */
5733 const size_t dec_len = sizeof (DECIMAL_PREFIX) - 1;
5735 mname_len = strlen (GET_MODE_NAME (tmode)) + strlen (GET_MODE_NAME (fmode));
5737 nondec_name = XALLOCAVEC (char, 2 + opname_len + mname_len + 1 + 1);
5738 nondec_name[0] = '_';
5739 nondec_name[1] = '_';
5740 if (targetm.libfunc_gnu_prefix)
5742 nondec_name[2] = 'g';
5743 nondec_name[3] = 'n';
5744 nondec_name[4] = 'u';
5745 nondec_name[5] = '_';
5747 memcpy (&nondec_name[prefix_len], opname, opname_len);
5748 nondec_suffix = nondec_name + opname_len + prefix_len;
5750 dec_name = XALLOCAVEC (char, 2 + dec_len + opname_len + mname_len + 1 + 1);
5753 memcpy (&dec_name[2], DECIMAL_PREFIX, dec_len);
5754 memcpy (&dec_name[2 + dec_len], opname, opname_len);
5755 dec_suffix = dec_name + dec_len + opname_len + 2;
5757 fname = GET_MODE_NAME (fmode);
5758 tname = GET_MODE_NAME (tmode);
5760 if (DECIMAL_FLOAT_MODE_P(fmode) || DECIMAL_FLOAT_MODE_P(tmode))
5762 libfunc_name = dec_name;
5763 suffix = dec_suffix;
5767 libfunc_name = nondec_name;
5768 suffix = nondec_suffix;
5772 for (q = fname; *q; p++, q++)
5774 for (q = tname; *q; p++, q++)
5780 set_conv_libfunc (tab, tmode, fmode,
5781 ggc_alloc_string (libfunc_name, p - libfunc_name));
5784 /* Pick proper libcall for trunc_optab. We need to chose if we do
5785 truncation or extension and interclass or intraclass. */
5788 gen_trunc_conv_libfunc (convert_optab tab,
5790 enum machine_mode tmode,
5791 enum machine_mode fmode)
5793 if (GET_MODE_CLASS (tmode) != MODE_FLOAT && !DECIMAL_FLOAT_MODE_P (tmode))
5795 if (GET_MODE_CLASS (fmode) != MODE_FLOAT && !DECIMAL_FLOAT_MODE_P (fmode))
5800 if ((GET_MODE_CLASS (tmode) == MODE_FLOAT && DECIMAL_FLOAT_MODE_P (fmode))
5801 || (GET_MODE_CLASS (fmode) == MODE_FLOAT && DECIMAL_FLOAT_MODE_P (tmode)))
5802 gen_interclass_conv_libfunc (tab, opname, tmode, fmode);
5804 if (GET_MODE_PRECISION (fmode) <= GET_MODE_PRECISION (tmode))
5807 if ((GET_MODE_CLASS (tmode) == MODE_FLOAT
5808 && GET_MODE_CLASS (fmode) == MODE_FLOAT)
5809 || (DECIMAL_FLOAT_MODE_P (fmode) && DECIMAL_FLOAT_MODE_P (tmode)))
5810 gen_intraclass_conv_libfunc (tab, opname, tmode, fmode);
5813 /* Pick proper libcall for extend_optab. We need to chose if we do
5814 truncation or extension and interclass or intraclass. */
5817 gen_extend_conv_libfunc (convert_optab tab,
5818 const char *opname ATTRIBUTE_UNUSED,
5819 enum machine_mode tmode,
5820 enum machine_mode fmode)
5822 if (GET_MODE_CLASS (tmode) != MODE_FLOAT && !DECIMAL_FLOAT_MODE_P (tmode))
5824 if (GET_MODE_CLASS (fmode) != MODE_FLOAT && !DECIMAL_FLOAT_MODE_P (fmode))
5829 if ((GET_MODE_CLASS (tmode) == MODE_FLOAT && DECIMAL_FLOAT_MODE_P (fmode))
5830 || (GET_MODE_CLASS (fmode) == MODE_FLOAT && DECIMAL_FLOAT_MODE_P (tmode)))
5831 gen_interclass_conv_libfunc (tab, opname, tmode, fmode);
5833 if (GET_MODE_PRECISION (fmode) > GET_MODE_PRECISION (tmode))
5836 if ((GET_MODE_CLASS (tmode) == MODE_FLOAT
5837 && GET_MODE_CLASS (fmode) == MODE_FLOAT)
5838 || (DECIMAL_FLOAT_MODE_P (fmode) && DECIMAL_FLOAT_MODE_P (tmode)))
5839 gen_intraclass_conv_libfunc (tab, opname, tmode, fmode);
5842 /* Pick proper libcall for fract_optab. We need to chose if we do
5843 interclass or intraclass. */
5846 gen_fract_conv_libfunc (convert_optab tab,
5848 enum machine_mode tmode,
5849 enum machine_mode fmode)
5853 if (!(ALL_FIXED_POINT_MODE_P (tmode) || ALL_FIXED_POINT_MODE_P (fmode)))
5856 if (GET_MODE_CLASS (tmode) == GET_MODE_CLASS (fmode))
5857 gen_intraclass_conv_libfunc (tab, opname, tmode, fmode);
5859 gen_interclass_conv_libfunc (tab, opname, tmode, fmode);
5862 /* Pick proper libcall for fractuns_optab. */
5865 gen_fractuns_conv_libfunc (convert_optab tab,
5867 enum machine_mode tmode,
5868 enum machine_mode fmode)
5872 /* One mode must be a fixed-point mode, and the other must be an integer
5874 if (!((ALL_FIXED_POINT_MODE_P (tmode) && GET_MODE_CLASS (fmode) == MODE_INT)
5875 || (ALL_FIXED_POINT_MODE_P (fmode)
5876 && GET_MODE_CLASS (tmode) == MODE_INT)))
5879 gen_interclass_conv_libfunc (tab, opname, tmode, fmode);
5882 /* Pick proper libcall for satfract_optab. We need to chose if we do
5883 interclass or intraclass. */
5886 gen_satfract_conv_libfunc (convert_optab tab,
5888 enum machine_mode tmode,
5889 enum machine_mode fmode)
5893 /* TMODE must be a fixed-point mode. */
5894 if (!ALL_FIXED_POINT_MODE_P (tmode))
5897 if (GET_MODE_CLASS (tmode) == GET_MODE_CLASS (fmode))
5898 gen_intraclass_conv_libfunc (tab, opname, tmode, fmode);
5900 gen_interclass_conv_libfunc (tab, opname, tmode, fmode);
5903 /* Pick proper libcall for satfractuns_optab. */
5906 gen_satfractuns_conv_libfunc (convert_optab tab,
5908 enum machine_mode tmode,
5909 enum machine_mode fmode)
5913 /* TMODE must be a fixed-point mode, and FMODE must be an integer mode. */
5914 if (!(ALL_FIXED_POINT_MODE_P (tmode) && GET_MODE_CLASS (fmode) == MODE_INT))
5917 gen_interclass_conv_libfunc (tab, opname, tmode, fmode);
5920 /* A table of previously-created libfuncs, hashed by name. */
5921 static GTY ((param_is (union tree_node))) htab_t libfunc_decls;
5923 /* Hashtable callbacks for libfunc_decls. */
5926 libfunc_decl_hash (const void *entry)
5928 return IDENTIFIER_HASH_VALUE (DECL_NAME ((const_tree) entry));
5932 libfunc_decl_eq (const void *entry1, const void *entry2)
5934 return DECL_NAME ((const_tree) entry1) == (const_tree) entry2;
5937 /* Build a decl for a libfunc named NAME. */
5940 build_libfunc_function (const char *name)
5942 tree decl = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL,
5943 get_identifier (name),
5944 build_function_type (integer_type_node, NULL_TREE));
5945 /* ??? We don't have any type information except for this is
5946 a function. Pretend this is "int foo()". */
5947 DECL_ARTIFICIAL (decl) = 1;
5948 DECL_EXTERNAL (decl) = 1;
5949 TREE_PUBLIC (decl) = 1;
5950 gcc_assert (DECL_ASSEMBLER_NAME (decl));
5952 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
5953 are the flags assigned by targetm.encode_section_info. */
5954 SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl), 0), NULL);
5960 init_one_libfunc (const char *name)
5966 if (libfunc_decls == NULL)
5967 libfunc_decls = htab_create_ggc (37, libfunc_decl_hash,
5968 libfunc_decl_eq, NULL);
5970 /* See if we have already created a libfunc decl for this function. */
5971 id = get_identifier (name);
5972 hash = IDENTIFIER_HASH_VALUE (id);
5973 slot = htab_find_slot_with_hash (libfunc_decls, id, hash, INSERT);
5974 decl = (tree) *slot;
5977 /* Create a new decl, so that it can be passed to
5978 targetm.encode_section_info. */
5979 decl = build_libfunc_function (name);
5982 return XEXP (DECL_RTL (decl), 0);
5985 /* Adjust the assembler name of libfunc NAME to ASMSPEC. */
5988 set_user_assembler_libfunc (const char *name, const char *asmspec)
5994 id = get_identifier (name);
5995 hash = IDENTIFIER_HASH_VALUE (id);
5996 slot = htab_find_slot_with_hash (libfunc_decls, id, hash, NO_INSERT);
5998 decl = (tree) *slot;
5999 set_user_assembler_name (decl, asmspec);
6000 return XEXP (DECL_RTL (decl), 0);
6003 /* Call this to reset the function entry for one optab (OPTABLE) in mode
6004 MODE to NAME, which should be either 0 or a string constant. */
6006 set_optab_libfunc (optab optable, enum machine_mode mode, const char *name)
6009 struct libfunc_entry e;
6010 struct libfunc_entry **slot;
6011 e.optab = (size_t) (optable - &optab_table[0]);
6016 val = init_one_libfunc (name);
6019 slot = (struct libfunc_entry **) htab_find_slot (libfunc_hash, &e, INSERT);
6021 *slot = ggc_alloc_libfunc_entry ();
6022 (*slot)->optab = (size_t) (optable - &optab_table[0]);
6023 (*slot)->mode1 = mode;
6024 (*slot)->mode2 = VOIDmode;
6025 (*slot)->libfunc = val;
6028 /* Call this to reset the function entry for one conversion optab
6029 (OPTABLE) from mode FMODE to mode TMODE to NAME, which should be
6030 either 0 or a string constant. */
6032 set_conv_libfunc (convert_optab optable, enum machine_mode tmode,
6033 enum machine_mode fmode, const char *name)
6036 struct libfunc_entry e;
6037 struct libfunc_entry **slot;
6038 e.optab = (size_t) (optable - &convert_optab_table[0]);
6043 val = init_one_libfunc (name);
6046 slot = (struct libfunc_entry **) htab_find_slot (libfunc_hash, &e, INSERT);
6048 *slot = ggc_alloc_libfunc_entry ();
6049 (*slot)->optab = (size_t) (optable - &convert_optab_table[0]);
6050 (*slot)->mode1 = tmode;
6051 (*slot)->mode2 = fmode;
6052 (*slot)->libfunc = val;
6055 /* Call this to initialize the contents of the optabs
6056 appropriately for the current target machine. */
6063 htab_empty (libfunc_hash);
6064 /* We statically initialize the insn_codes with the equivalent of
6065 CODE_FOR_nothing. Repeat the process if reinitialising. */
6069 libfunc_hash = htab_create_ggc (10, hash_libfunc, eq_libfunc, NULL);
6071 init_optab (add_optab, PLUS);
6072 init_optabv (addv_optab, PLUS);
6073 init_optab (sub_optab, MINUS);
6074 init_optabv (subv_optab, MINUS);
6075 init_optab (ssadd_optab, SS_PLUS);
6076 init_optab (usadd_optab, US_PLUS);
6077 init_optab (sssub_optab, SS_MINUS);
6078 init_optab (ussub_optab, US_MINUS);
6079 init_optab (smul_optab, MULT);
6080 init_optab (ssmul_optab, SS_MULT);
6081 init_optab (usmul_optab, US_MULT);
6082 init_optabv (smulv_optab, MULT);
6083 init_optab (smul_highpart_optab, UNKNOWN);
6084 init_optab (umul_highpart_optab, UNKNOWN);
6085 init_optab (smul_widen_optab, UNKNOWN);
6086 init_optab (umul_widen_optab, UNKNOWN);
6087 init_optab (usmul_widen_optab, UNKNOWN);
6088 init_optab (smadd_widen_optab, UNKNOWN);
6089 init_optab (umadd_widen_optab, UNKNOWN);
6090 init_optab (ssmadd_widen_optab, UNKNOWN);
6091 init_optab (usmadd_widen_optab, UNKNOWN);
6092 init_optab (smsub_widen_optab, UNKNOWN);
6093 init_optab (umsub_widen_optab, UNKNOWN);
6094 init_optab (ssmsub_widen_optab, UNKNOWN);
6095 init_optab (usmsub_widen_optab, UNKNOWN);
6096 init_optab (sdiv_optab, DIV);
6097 init_optab (ssdiv_optab, SS_DIV);
6098 init_optab (usdiv_optab, US_DIV);
6099 init_optabv (sdivv_optab, DIV);
6100 init_optab (sdivmod_optab, UNKNOWN);
6101 init_optab (udiv_optab, UDIV);
6102 init_optab (udivmod_optab, UNKNOWN);
6103 init_optab (smod_optab, MOD);
6104 init_optab (umod_optab, UMOD);
6105 init_optab (fmod_optab, UNKNOWN);
6106 init_optab (remainder_optab, UNKNOWN);
6107 init_optab (ftrunc_optab, UNKNOWN);
6108 init_optab (and_optab, AND);
6109 init_optab (ior_optab, IOR);
6110 init_optab (xor_optab, XOR);
6111 init_optab (ashl_optab, ASHIFT);
6112 init_optab (ssashl_optab, SS_ASHIFT);
6113 init_optab (usashl_optab, US_ASHIFT);
6114 init_optab (ashr_optab, ASHIFTRT);
6115 init_optab (lshr_optab, LSHIFTRT);
6116 init_optabv (vashl_optab, ASHIFT);
6117 init_optabv (vashr_optab, ASHIFTRT);
6118 init_optabv (vlshr_optab, LSHIFTRT);
6119 init_optab (rotl_optab, ROTATE);
6120 init_optab (rotr_optab, ROTATERT);
6121 init_optab (smin_optab, SMIN);
6122 init_optab (smax_optab, SMAX);
6123 init_optab (umin_optab, UMIN);
6124 init_optab (umax_optab, UMAX);
6125 init_optab (pow_optab, UNKNOWN);
6126 init_optab (atan2_optab, UNKNOWN);
6127 init_optab (fma_optab, FMA);
6128 init_optab (fms_optab, UNKNOWN);
6129 init_optab (fnma_optab, UNKNOWN);
6130 init_optab (fnms_optab, UNKNOWN);
6132 /* These three have codes assigned exclusively for the sake of
6134 init_optab (mov_optab, SET);
6135 init_optab (movstrict_optab, STRICT_LOW_PART);
6136 init_optab (cbranch_optab, COMPARE);
6138 init_optab (cmov_optab, UNKNOWN);
6139 init_optab (cstore_optab, UNKNOWN);
6140 init_optab (ctrap_optab, UNKNOWN);
6142 init_optab (storent_optab, UNKNOWN);
6144 init_optab (cmp_optab, UNKNOWN);
6145 init_optab (ucmp_optab, UNKNOWN);
6147 init_optab (eq_optab, EQ);
6148 init_optab (ne_optab, NE);
6149 init_optab (gt_optab, GT);
6150 init_optab (ge_optab, GE);
6151 init_optab (lt_optab, LT);
6152 init_optab (le_optab, LE);
6153 init_optab (unord_optab, UNORDERED);
6155 init_optab (neg_optab, NEG);
6156 init_optab (ssneg_optab, SS_NEG);
6157 init_optab (usneg_optab, US_NEG);
6158 init_optabv (negv_optab, NEG);
6159 init_optab (abs_optab, ABS);
6160 init_optabv (absv_optab, ABS);
6161 init_optab (addcc_optab, UNKNOWN);
6162 init_optab (one_cmpl_optab, NOT);
6163 init_optab (bswap_optab, BSWAP);
6164 init_optab (ffs_optab, FFS);
6165 init_optab (clz_optab, CLZ);
6166 init_optab (ctz_optab, CTZ);
6167 init_optab (clrsb_optab, CLRSB);
6168 init_optab (popcount_optab, POPCOUNT);
6169 init_optab (parity_optab, PARITY);
6170 init_optab (sqrt_optab, SQRT);
6171 init_optab (floor_optab, UNKNOWN);
6172 init_optab (ceil_optab, UNKNOWN);
6173 init_optab (round_optab, UNKNOWN);
6174 init_optab (btrunc_optab, UNKNOWN);
6175 init_optab (nearbyint_optab, UNKNOWN);
6176 init_optab (rint_optab, UNKNOWN);
6177 init_optab (sincos_optab, UNKNOWN);
6178 init_optab (sin_optab, UNKNOWN);
6179 init_optab (asin_optab, UNKNOWN);
6180 init_optab (cos_optab, UNKNOWN);
6181 init_optab (acos_optab, UNKNOWN);
6182 init_optab (exp_optab, UNKNOWN);
6183 init_optab (exp10_optab, UNKNOWN);
6184 init_optab (exp2_optab, UNKNOWN);
6185 init_optab (expm1_optab, UNKNOWN);
6186 init_optab (ldexp_optab, UNKNOWN);
6187 init_optab (scalb_optab, UNKNOWN);
6188 init_optab (significand_optab, UNKNOWN);
6189 init_optab (logb_optab, UNKNOWN);
6190 init_optab (ilogb_optab, UNKNOWN);
6191 init_optab (log_optab, UNKNOWN);
6192 init_optab (log10_optab, UNKNOWN);
6193 init_optab (log2_optab, UNKNOWN);
6194 init_optab (log1p_optab, UNKNOWN);
6195 init_optab (tan_optab, UNKNOWN);
6196 init_optab (atan_optab, UNKNOWN);
6197 init_optab (copysign_optab, UNKNOWN);
6198 init_optab (signbit_optab, UNKNOWN);
6200 init_optab (isinf_optab, UNKNOWN);
6202 init_optab (strlen_optab, UNKNOWN);
6203 init_optab (push_optab, UNKNOWN);
6205 init_optab (reduc_smax_optab, UNKNOWN);
6206 init_optab (reduc_umax_optab, UNKNOWN);
6207 init_optab (reduc_smin_optab, UNKNOWN);
6208 init_optab (reduc_umin_optab, UNKNOWN);
6209 init_optab (reduc_splus_optab, UNKNOWN);
6210 init_optab (reduc_uplus_optab, UNKNOWN);
6212 init_optab (ssum_widen_optab, UNKNOWN);
6213 init_optab (usum_widen_optab, UNKNOWN);
6214 init_optab (sdot_prod_optab, UNKNOWN);
6215 init_optab (udot_prod_optab, UNKNOWN);
6217 init_optab (vec_extract_optab, UNKNOWN);
6218 init_optab (vec_extract_even_optab, UNKNOWN);
6219 init_optab (vec_extract_odd_optab, UNKNOWN);
6220 init_optab (vec_interleave_high_optab, UNKNOWN);
6221 init_optab (vec_interleave_low_optab, UNKNOWN);
6222 init_optab (vec_set_optab, UNKNOWN);
6223 init_optab (vec_init_optab, UNKNOWN);
6224 init_optab (vec_shl_optab, UNKNOWN);
6225 init_optab (vec_shr_optab, UNKNOWN);
6226 init_optab (vec_realign_load_optab, UNKNOWN);
6227 init_optab (movmisalign_optab, UNKNOWN);
6228 init_optab (vec_widen_umult_hi_optab, UNKNOWN);
6229 init_optab (vec_widen_umult_lo_optab, UNKNOWN);
6230 init_optab (vec_widen_smult_hi_optab, UNKNOWN);
6231 init_optab (vec_widen_smult_lo_optab, UNKNOWN);
6232 init_optab (vec_widen_ushiftl_hi_optab, UNKNOWN);
6233 init_optab (vec_widen_ushiftl_lo_optab, UNKNOWN);
6234 init_optab (vec_widen_sshiftl_hi_optab, UNKNOWN);
6235 init_optab (vec_widen_sshiftl_lo_optab, UNKNOWN);
6236 init_optab (vec_unpacks_hi_optab, UNKNOWN);
6237 init_optab (vec_unpacks_lo_optab, UNKNOWN);
6238 init_optab (vec_unpacku_hi_optab, UNKNOWN);
6239 init_optab (vec_unpacku_lo_optab, UNKNOWN);
6240 init_optab (vec_unpacks_float_hi_optab, UNKNOWN);
6241 init_optab (vec_unpacks_float_lo_optab, UNKNOWN);
6242 init_optab (vec_unpacku_float_hi_optab, UNKNOWN);
6243 init_optab (vec_unpacku_float_lo_optab, UNKNOWN);
6244 init_optab (vec_pack_trunc_optab, UNKNOWN);
6245 init_optab (vec_pack_usat_optab, UNKNOWN);
6246 init_optab (vec_pack_ssat_optab, UNKNOWN);
6247 init_optab (vec_pack_ufix_trunc_optab, UNKNOWN);
6248 init_optab (vec_pack_sfix_trunc_optab, UNKNOWN);
6250 init_optab (powi_optab, UNKNOWN);
6253 init_convert_optab (sext_optab, SIGN_EXTEND);
6254 init_convert_optab (zext_optab, ZERO_EXTEND);
6255 init_convert_optab (trunc_optab, TRUNCATE);
6256 init_convert_optab (sfix_optab, FIX);
6257 init_convert_optab (ufix_optab, UNSIGNED_FIX);
6258 init_convert_optab (sfixtrunc_optab, UNKNOWN);
6259 init_convert_optab (ufixtrunc_optab, UNKNOWN);
6260 init_convert_optab (sfloat_optab, FLOAT);
6261 init_convert_optab (ufloat_optab, UNSIGNED_FLOAT);
6262 init_convert_optab (lrint_optab, UNKNOWN);
6263 init_convert_optab (lround_optab, UNKNOWN);
6264 init_convert_optab (lfloor_optab, UNKNOWN);
6265 init_convert_optab (lceil_optab, UNKNOWN);
6267 init_convert_optab (fract_optab, FRACT_CONVERT);
6268 init_convert_optab (fractuns_optab, UNSIGNED_FRACT_CONVERT);
6269 init_convert_optab (satfract_optab, SAT_FRACT);
6270 init_convert_optab (satfractuns_optab, UNSIGNED_SAT_FRACT);
6272 /* Fill in the optabs with the insns we support. */
6275 /* Initialize the optabs with the names of the library functions. */
6276 add_optab->libcall_basename = "add";
6277 add_optab->libcall_suffix = '3';
6278 add_optab->libcall_gen = gen_int_fp_fixed_libfunc;
6279 addv_optab->libcall_basename = "add";
6280 addv_optab->libcall_suffix = '3';
6281 addv_optab->libcall_gen = gen_intv_fp_libfunc;
6282 ssadd_optab->libcall_basename = "ssadd";
6283 ssadd_optab->libcall_suffix = '3';
6284 ssadd_optab->libcall_gen = gen_signed_fixed_libfunc;
6285 usadd_optab->libcall_basename = "usadd";
6286 usadd_optab->libcall_suffix = '3';
6287 usadd_optab->libcall_gen = gen_unsigned_fixed_libfunc;
6288 sub_optab->libcall_basename = "sub";
6289 sub_optab->libcall_suffix = '3';
6290 sub_optab->libcall_gen = gen_int_fp_fixed_libfunc;
6291 subv_optab->libcall_basename = "sub";
6292 subv_optab->libcall_suffix = '3';
6293 subv_optab->libcall_gen = gen_intv_fp_libfunc;
6294 sssub_optab->libcall_basename = "sssub";
6295 sssub_optab->libcall_suffix = '3';
6296 sssub_optab->libcall_gen = gen_signed_fixed_libfunc;
6297 ussub_optab->libcall_basename = "ussub";
6298 ussub_optab->libcall_suffix = '3';
6299 ussub_optab->libcall_gen = gen_unsigned_fixed_libfunc;
6300 smul_optab->libcall_basename = "mul";
6301 smul_optab->libcall_suffix = '3';
6302 smul_optab->libcall_gen = gen_int_fp_fixed_libfunc;
6303 smulv_optab->libcall_basename = "mul";
6304 smulv_optab->libcall_suffix = '3';
6305 smulv_optab->libcall_gen = gen_intv_fp_libfunc;
6306 ssmul_optab->libcall_basename = "ssmul";
6307 ssmul_optab->libcall_suffix = '3';
6308 ssmul_optab->libcall_gen = gen_signed_fixed_libfunc;
6309 usmul_optab->libcall_basename = "usmul";
6310 usmul_optab->libcall_suffix = '3';
6311 usmul_optab->libcall_gen = gen_unsigned_fixed_libfunc;
6312 sdiv_optab->libcall_basename = "div";
6313 sdiv_optab->libcall_suffix = '3';
6314 sdiv_optab->libcall_gen = gen_int_fp_signed_fixed_libfunc;
6315 sdivv_optab->libcall_basename = "divv";
6316 sdivv_optab->libcall_suffix = '3';
6317 sdivv_optab->libcall_gen = gen_int_libfunc;
6318 ssdiv_optab->libcall_basename = "ssdiv";
6319 ssdiv_optab->libcall_suffix = '3';
6320 ssdiv_optab->libcall_gen = gen_signed_fixed_libfunc;
6321 udiv_optab->libcall_basename = "udiv";
6322 udiv_optab->libcall_suffix = '3';
6323 udiv_optab->libcall_gen = gen_int_unsigned_fixed_libfunc;
6324 usdiv_optab->libcall_basename = "usdiv";
6325 usdiv_optab->libcall_suffix = '3';
6326 usdiv_optab->libcall_gen = gen_unsigned_fixed_libfunc;
6327 sdivmod_optab->libcall_basename = "divmod";
6328 sdivmod_optab->libcall_suffix = '4';
6329 sdivmod_optab->libcall_gen = gen_int_libfunc;
6330 udivmod_optab->libcall_basename = "udivmod";
6331 udivmod_optab->libcall_suffix = '4';
6332 udivmod_optab->libcall_gen = gen_int_libfunc;
6333 smod_optab->libcall_basename = "mod";
6334 smod_optab->libcall_suffix = '3';
6335 smod_optab->libcall_gen = gen_int_libfunc;
6336 umod_optab->libcall_basename = "umod";
6337 umod_optab->libcall_suffix = '3';
6338 umod_optab->libcall_gen = gen_int_libfunc;
6339 ftrunc_optab->libcall_basename = "ftrunc";
6340 ftrunc_optab->libcall_suffix = '2';
6341 ftrunc_optab->libcall_gen = gen_fp_libfunc;
6342 and_optab->libcall_basename = "and";
6343 and_optab->libcall_suffix = '3';
6344 and_optab->libcall_gen = gen_int_libfunc;
6345 ior_optab->libcall_basename = "ior";
6346 ior_optab->libcall_suffix = '3';
6347 ior_optab->libcall_gen = gen_int_libfunc;
6348 xor_optab->libcall_basename = "xor";
6349 xor_optab->libcall_suffix = '3';
6350 xor_optab->libcall_gen = gen_int_libfunc;
6351 ashl_optab->libcall_basename = "ashl";
6352 ashl_optab->libcall_suffix = '3';
6353 ashl_optab->libcall_gen = gen_int_fixed_libfunc;
6354 ssashl_optab->libcall_basename = "ssashl";
6355 ssashl_optab->libcall_suffix = '3';
6356 ssashl_optab->libcall_gen = gen_signed_fixed_libfunc;
6357 usashl_optab->libcall_basename = "usashl";
6358 usashl_optab->libcall_suffix = '3';
6359 usashl_optab->libcall_gen = gen_unsigned_fixed_libfunc;
6360 ashr_optab->libcall_basename = "ashr";
6361 ashr_optab->libcall_suffix = '3';
6362 ashr_optab->libcall_gen = gen_int_signed_fixed_libfunc;
6363 lshr_optab->libcall_basename = "lshr";
6364 lshr_optab->libcall_suffix = '3';
6365 lshr_optab->libcall_gen = gen_int_unsigned_fixed_libfunc;
6366 smin_optab->libcall_basename = "min";
6367 smin_optab->libcall_suffix = '3';
6368 smin_optab->libcall_gen = gen_int_fp_libfunc;
6369 smax_optab->libcall_basename = "max";
6370 smax_optab->libcall_suffix = '3';
6371 smax_optab->libcall_gen = gen_int_fp_libfunc;
6372 umin_optab->libcall_basename = "umin";
6373 umin_optab->libcall_suffix = '3';
6374 umin_optab->libcall_gen = gen_int_libfunc;
6375 umax_optab->libcall_basename = "umax";
6376 umax_optab->libcall_suffix = '3';
6377 umax_optab->libcall_gen = gen_int_libfunc;
6378 neg_optab->libcall_basename = "neg";
6379 neg_optab->libcall_suffix = '2';
6380 neg_optab->libcall_gen = gen_int_fp_fixed_libfunc;
6381 ssneg_optab->libcall_basename = "ssneg";
6382 ssneg_optab->libcall_suffix = '2';
6383 ssneg_optab->libcall_gen = gen_signed_fixed_libfunc;
6384 usneg_optab->libcall_basename = "usneg";
6385 usneg_optab->libcall_suffix = '2';
6386 usneg_optab->libcall_gen = gen_unsigned_fixed_libfunc;
6387 negv_optab->libcall_basename = "neg";
6388 negv_optab->libcall_suffix = '2';
6389 negv_optab->libcall_gen = gen_intv_fp_libfunc;
6390 one_cmpl_optab->libcall_basename = "one_cmpl";
6391 one_cmpl_optab->libcall_suffix = '2';
6392 one_cmpl_optab->libcall_gen = gen_int_libfunc;
6393 ffs_optab->libcall_basename = "ffs";
6394 ffs_optab->libcall_suffix = '2';
6395 ffs_optab->libcall_gen = gen_int_libfunc;
6396 clz_optab->libcall_basename = "clz";
6397 clz_optab->libcall_suffix = '2';
6398 clz_optab->libcall_gen = gen_int_libfunc;
6399 ctz_optab->libcall_basename = "ctz";
6400 ctz_optab->libcall_suffix = '2';
6401 ctz_optab->libcall_gen = gen_int_libfunc;
6402 clrsb_optab->libcall_basename = "clrsb";
6403 clrsb_optab->libcall_suffix = '2';
6404 clrsb_optab->libcall_gen = gen_int_libfunc;
6405 popcount_optab->libcall_basename = "popcount";
6406 popcount_optab->libcall_suffix = '2';
6407 popcount_optab->libcall_gen = gen_int_libfunc;
6408 parity_optab->libcall_basename = "parity";
6409 parity_optab->libcall_suffix = '2';
6410 parity_optab->libcall_gen = gen_int_libfunc;
6412 /* Comparison libcalls for integers MUST come in pairs,
6414 cmp_optab->libcall_basename = "cmp";
6415 cmp_optab->libcall_suffix = '2';
6416 cmp_optab->libcall_gen = gen_int_fp_fixed_libfunc;
6417 ucmp_optab->libcall_basename = "ucmp";
6418 ucmp_optab->libcall_suffix = '2';
6419 ucmp_optab->libcall_gen = gen_int_libfunc;
6421 /* EQ etc are floating point only. */
6422 eq_optab->libcall_basename = "eq";
6423 eq_optab->libcall_suffix = '2';
6424 eq_optab->libcall_gen = gen_fp_libfunc;
6425 ne_optab->libcall_basename = "ne";
6426 ne_optab->libcall_suffix = '2';
6427 ne_optab->libcall_gen = gen_fp_libfunc;
6428 gt_optab->libcall_basename = "gt";
6429 gt_optab->libcall_suffix = '2';
6430 gt_optab->libcall_gen = gen_fp_libfunc;
6431 ge_optab->libcall_basename = "ge";
6432 ge_optab->libcall_suffix = '2';
6433 ge_optab->libcall_gen = gen_fp_libfunc;
6434 lt_optab->libcall_basename = "lt";
6435 lt_optab->libcall_suffix = '2';
6436 lt_optab->libcall_gen = gen_fp_libfunc;
6437 le_optab->libcall_basename = "le";
6438 le_optab->libcall_suffix = '2';
6439 le_optab->libcall_gen = gen_fp_libfunc;
6440 unord_optab->libcall_basename = "unord";
6441 unord_optab->libcall_suffix = '2';
6442 unord_optab->libcall_gen = gen_fp_libfunc;
6444 powi_optab->libcall_basename = "powi";
6445 powi_optab->libcall_suffix = '2';
6446 powi_optab->libcall_gen = gen_fp_libfunc;
6449 sfloat_optab->libcall_basename = "float";
6450 sfloat_optab->libcall_gen = gen_int_to_fp_conv_libfunc;
6451 ufloat_optab->libcall_gen = gen_ufloat_conv_libfunc;
6452 sfix_optab->libcall_basename = "fix";
6453 sfix_optab->libcall_gen = gen_fp_to_int_conv_libfunc;
6454 ufix_optab->libcall_basename = "fixuns";
6455 ufix_optab->libcall_gen = gen_fp_to_int_conv_libfunc;
6456 lrint_optab->libcall_basename = "lrint";
6457 lrint_optab->libcall_gen = gen_int_to_fp_nondecimal_conv_libfunc;
6458 lround_optab->libcall_basename = "lround";
6459 lround_optab->libcall_gen = gen_int_to_fp_nondecimal_conv_libfunc;
6460 lfloor_optab->libcall_basename = "lfloor";
6461 lfloor_optab->libcall_gen = gen_int_to_fp_nondecimal_conv_libfunc;
6462 lceil_optab->libcall_basename = "lceil";
6463 lceil_optab->libcall_gen = gen_int_to_fp_nondecimal_conv_libfunc;
6465 /* trunc_optab is also used for FLOAT_EXTEND. */
6466 sext_optab->libcall_basename = "extend";
6467 sext_optab->libcall_gen = gen_extend_conv_libfunc;
6468 trunc_optab->libcall_basename = "trunc";
6469 trunc_optab->libcall_gen = gen_trunc_conv_libfunc;
6471 /* Conversions for fixed-point modes and other modes. */
6472 fract_optab->libcall_basename = "fract";
6473 fract_optab->libcall_gen = gen_fract_conv_libfunc;
6474 satfract_optab->libcall_basename = "satfract";
6475 satfract_optab->libcall_gen = gen_satfract_conv_libfunc;
6476 fractuns_optab->libcall_basename = "fractuns";
6477 fractuns_optab->libcall_gen = gen_fractuns_conv_libfunc;
6478 satfractuns_optab->libcall_basename = "satfractuns";
6479 satfractuns_optab->libcall_gen = gen_satfractuns_conv_libfunc;
6481 /* The ffs function operates on `int'. Fall back on it if we do not
6482 have a libgcc2 function for that width. */
6483 if (INT_TYPE_SIZE < BITS_PER_WORD)
6484 set_optab_libfunc (ffs_optab, mode_for_size (INT_TYPE_SIZE, MODE_INT, 0),
6487 /* Explicitly initialize the bswap libfuncs since we need them to be
6488 valid for things other than word_mode. */
6489 if (targetm.libfunc_gnu_prefix)
6491 set_optab_libfunc (bswap_optab, SImode, "__gnu_bswapsi2");
6492 set_optab_libfunc (bswap_optab, DImode, "__gnu_bswapdi2");
6496 set_optab_libfunc (bswap_optab, SImode, "__bswapsi2");
6497 set_optab_libfunc (bswap_optab, DImode, "__bswapdi2");
6500 /* Use cabs for double complex abs, since systems generally have cabs.
6501 Don't define any libcall for float complex, so that cabs will be used. */
6502 if (complex_double_type_node)
6503 set_optab_libfunc (abs_optab, TYPE_MODE (complex_double_type_node), "cabs");
6505 abort_libfunc = init_one_libfunc ("abort");
6506 memcpy_libfunc = init_one_libfunc ("memcpy");
6507 memmove_libfunc = init_one_libfunc ("memmove");
6508 memcmp_libfunc = init_one_libfunc ("memcmp");
6509 memset_libfunc = init_one_libfunc ("memset");
6510 setbits_libfunc = init_one_libfunc ("__setbits");
6512 #ifndef DONT_USE_BUILTIN_SETJMP
6513 setjmp_libfunc = init_one_libfunc ("__builtin_setjmp");
6514 longjmp_libfunc = init_one_libfunc ("__builtin_longjmp");
6516 setjmp_libfunc = init_one_libfunc ("setjmp");
6517 longjmp_libfunc = init_one_libfunc ("longjmp");
6519 unwind_sjlj_register_libfunc = init_one_libfunc ("_Unwind_SjLj_Register");
6520 unwind_sjlj_unregister_libfunc
6521 = init_one_libfunc ("_Unwind_SjLj_Unregister");
6523 /* For function entry/exit instrumentation. */
6524 profile_function_entry_libfunc
6525 = init_one_libfunc ("__cyg_profile_func_enter");
6526 profile_function_exit_libfunc
6527 = init_one_libfunc ("__cyg_profile_func_exit");
6529 gcov_flush_libfunc = init_one_libfunc ("__gcov_flush");
6531 /* Allow the target to add more libcalls or rename some, etc. */
6532 targetm.init_libfuncs ();
6535 /* Print information about the current contents of the optabs on
6539 debug_optab_libfuncs (void)
6545 /* Dump the arithmetic optabs. */
6546 for (i = 0; i != (int) OTI_MAX; i++)
6547 for (j = 0; j < NUM_MACHINE_MODES; ++j)
6552 o = &optab_table[i];
6553 l = optab_libfunc (o, (enum machine_mode) j);
6556 gcc_assert (GET_CODE (l) == SYMBOL_REF);
6557 fprintf (stderr, "%s\t%s:\t%s\n",
6558 GET_RTX_NAME (o->code),
6564 /* Dump the conversion optabs. */
6565 for (i = 0; i < (int) COI_MAX; ++i)
6566 for (j = 0; j < NUM_MACHINE_MODES; ++j)
6567 for (k = 0; k < NUM_MACHINE_MODES; ++k)
6572 o = &convert_optab_table[i];
6573 l = convert_optab_libfunc (o, (enum machine_mode) j,
6574 (enum machine_mode) k);
6577 gcc_assert (GET_CODE (l) == SYMBOL_REF);
6578 fprintf (stderr, "%s\t%s\t%s:\t%s\n",
6579 GET_RTX_NAME (o->code),
6588 /* Generate insns to trap with code TCODE if OP1 and OP2 satisfy condition
6589 CODE. Return 0 on failure. */
6592 gen_cond_trap (enum rtx_code code, rtx op1, rtx op2, rtx tcode)
6594 enum machine_mode mode = GET_MODE (op1);
6595 enum insn_code icode;
6599 if (mode == VOIDmode)
6602 icode = optab_handler (ctrap_optab, mode);
6603 if (icode == CODE_FOR_nothing)
6606 /* Some targets only accept a zero trap code. */
6607 if (!insn_operand_matches (icode, 3, tcode))
6610 do_pending_stack_adjust ();
6612 prepare_cmp_insn (op1, op2, code, NULL_RTX, false, OPTAB_DIRECT,
6617 insn = GEN_FCN (icode) (trap_rtx, XEXP (trap_rtx, 0), XEXP (trap_rtx, 1),
6620 /* If that failed, then give up. */
6628 insn = get_insns ();
6633 /* Return rtx code for TCODE. Use UNSIGNEDP to select signed
6634 or unsigned operation code. */
6636 static enum rtx_code
6637 get_rtx_code (enum tree_code tcode, bool unsignedp)
6649 code = unsignedp ? LTU : LT;
6652 code = unsignedp ? LEU : LE;
6655 code = unsignedp ? GTU : GT;
6658 code = unsignedp ? GEU : GE;
6661 case UNORDERED_EXPR:
6692 /* Return comparison rtx for COND. Use UNSIGNEDP to select signed or
6693 unsigned operators. Do not generate compare instruction. */
6696 vector_compare_rtx (tree cond, bool unsignedp, enum insn_code icode)
6698 struct expand_operand ops[2];
6699 enum rtx_code rcode;
6701 rtx rtx_op0, rtx_op1;
6703 /* This is unlikely. While generating VEC_COND_EXPR, auto vectorizer
6704 ensures that condition is a relational operation. */
6705 gcc_assert (COMPARISON_CLASS_P (cond));
6707 rcode = get_rtx_code (TREE_CODE (cond), unsignedp);
6708 t_op0 = TREE_OPERAND (cond, 0);
6709 t_op1 = TREE_OPERAND (cond, 1);
6711 /* Expand operands. */
6712 rtx_op0 = expand_expr (t_op0, NULL_RTX, TYPE_MODE (TREE_TYPE (t_op0)),
6714 rtx_op1 = expand_expr (t_op1, NULL_RTX, TYPE_MODE (TREE_TYPE (t_op1)),
6717 create_input_operand (&ops[0], rtx_op0, GET_MODE (rtx_op0));
6718 create_input_operand (&ops[1], rtx_op1, GET_MODE (rtx_op1));
6719 if (!maybe_legitimize_operands (icode, 4, 2, ops))
6721 return gen_rtx_fmt_ee (rcode, VOIDmode, ops[0].value, ops[1].value);
6724 /* Return true if VEC_PERM_EXPR can be expanded using SIMD extensions
6725 of the CPU. SEL may be NULL, which stands for an unknown constant. */
6728 can_vec_perm_p (enum machine_mode mode, bool variable,
6729 const unsigned char *sel)
6731 enum machine_mode qimode;
6733 /* If the target doesn't implement a vector mode for the vector type,
6734 then no operations are supported. */
6735 if (!VECTOR_MODE_P (mode))
6740 if (direct_optab_handler (vec_perm_const_optab, mode) != CODE_FOR_nothing
6742 || targetm.vectorize.vec_perm_const_ok == NULL
6743 || targetm.vectorize.vec_perm_const_ok (mode, sel)))
6747 if (direct_optab_handler (vec_perm_optab, mode) != CODE_FOR_nothing)
6750 /* We allow fallback to a QI vector mode, and adjust the mask. */
6751 if (GET_MODE_INNER (mode) == QImode)
6753 qimode = mode_for_vector (QImode, GET_MODE_SIZE (mode));
6754 if (!VECTOR_MODE_P (qimode))
6757 /* ??? For completeness, we ought to check the QImode version of
6758 vec_perm_const_optab. But all users of this implicit lowering
6759 feature implement the variable vec_perm_optab. */
6760 if (direct_optab_handler (vec_perm_optab, qimode) == CODE_FOR_nothing)
6763 /* In order to support the lowering of variable permutations,
6764 we need to support shifts and adds. */
6767 if (GET_MODE_UNIT_SIZE (mode) > 2
6768 && optab_handler (ashl_optab, mode) == CODE_FOR_nothing
6769 && optab_handler (vashl_optab, mode) == CODE_FOR_nothing)
6771 if (optab_handler (add_optab, qimode) == CODE_FOR_nothing)
6778 /* Return true if we can implement VEC_INTERLEAVE_{HIGH,LOW}_EXPR or
6779 VEC_EXTRACT_{EVEN,ODD}_EXPR with VEC_PERM_EXPR for this target.
6780 If PSEL is non-null, return the selector for the permutation. */
6783 can_vec_perm_for_code_p (enum tree_code code, enum machine_mode mode,
6786 bool need_sel_test = false;
6787 enum insn_code icode;
6789 /* If the target doesn't implement a vector mode for the vector type,
6790 then no operations are supported. */
6791 if (!VECTOR_MODE_P (mode))
6794 /* Do as many tests as possible without reqiring the selector. */
6795 icode = direct_optab_handler (vec_perm_optab, mode);
6796 if (icode == CODE_FOR_nothing && GET_MODE_INNER (mode) != QImode)
6798 enum machine_mode qimode
6799 = mode_for_vector (QImode, GET_MODE_SIZE (mode));
6800 if (VECTOR_MODE_P (qimode))
6801 icode = direct_optab_handler (vec_perm_optab, qimode);
6803 if (icode == CODE_FOR_nothing)
6805 icode = direct_optab_handler (vec_perm_const_optab, mode);
6806 if (icode != CODE_FOR_nothing
6807 && targetm.vectorize.vec_perm_const_ok != NULL)
6808 need_sel_test = true;
6810 if (icode == CODE_FOR_nothing)
6813 /* If the selector is required, or if we need to test it, build it. */
6814 if (psel || need_sel_test)
6816 int i, nelt = GET_MODE_NUNITS (mode), alt = 0;
6817 unsigned char *data = XALLOCAVEC (unsigned char, nelt);
6821 case VEC_EXTRACT_ODD_EXPR:
6824 case VEC_EXTRACT_EVEN_EXPR:
6825 for (i = 0; i < nelt; ++i)
6826 data[i] = i * 2 + alt;
6829 case VEC_INTERLEAVE_HIGH_EXPR:
6832 case VEC_INTERLEAVE_LOW_EXPR:
6833 for (i = 0; i < nelt / 2; ++i)
6835 data[i * 2] = i + alt;
6836 data[i * 2 + 1] = i + nelt + alt;
6845 && !targetm.vectorize.vec_perm_const_ok (mode, data))
6850 rtvec vec = rtvec_alloc (nelt);
6851 enum machine_mode imode = mode;
6853 for (i = 0; i < nelt; ++i)
6854 RTVEC_ELT (vec, i) = GEN_INT (data[i]);
6856 if (GET_MODE_CLASS (mode) != MODE_VECTOR_INT)
6858 imode = int_mode_for_mode (GET_MODE_INNER (mode));
6859 imode = mode_for_vector (imode, nelt);
6860 gcc_assert (GET_MODE_CLASS (imode) == MODE_VECTOR_INT);
6863 *psel = gen_rtx_CONST_VECTOR (imode, vec);
6870 /* A subroutine of expand_vec_perm for expanding one vec_perm insn. */
6873 expand_vec_perm_1 (enum insn_code icode, rtx target,
6874 rtx v0, rtx v1, rtx sel)
6876 enum machine_mode tmode = GET_MODE (target);
6877 enum machine_mode smode = GET_MODE (sel);
6878 struct expand_operand ops[4];
6880 create_output_operand (&ops[0], target, tmode);
6881 create_input_operand (&ops[3], sel, smode);
6883 /* Make an effort to preserve v0 == v1. The target expander is able to
6884 rely on this to determine if we're permuting a single input operand. */
6885 if (rtx_equal_p (v0, v1))
6887 if (!insn_operand_matches (icode, 1, v0))
6888 v0 = force_reg (tmode, v0);
6889 gcc_checking_assert (insn_operand_matches (icode, 1, v0));
6890 gcc_checking_assert (insn_operand_matches (icode, 2, v0));
6892 create_fixed_operand (&ops[1], v0);
6893 create_fixed_operand (&ops[2], v0);
6897 create_input_operand (&ops[1], v0, tmode);
6898 create_input_operand (&ops[2], v1, tmode);
6901 if (maybe_expand_insn (icode, 4, ops))
6902 return ops[0].value;
6906 /* Generate instructions for vec_perm optab given its mode
6907 and three operands. */
6910 expand_vec_perm (enum machine_mode mode, rtx v0, rtx v1, rtx sel, rtx target)
6912 enum insn_code icode;
6913 enum machine_mode qimode;
6914 unsigned int i, w, e, u;
6915 rtx tmp, sel_qi = NULL;
6918 if (!target || GET_MODE (target) != mode)
6919 target = gen_reg_rtx (mode);
6921 w = GET_MODE_SIZE (mode);
6922 e = GET_MODE_NUNITS (mode);
6923 u = GET_MODE_UNIT_SIZE (mode);
6925 /* Set QIMODE to a different vector mode with byte elements.
6926 If no such mode, or if MODE already has byte elements, use VOIDmode. */
6928 if (GET_MODE_INNER (mode) != QImode)
6930 qimode = mode_for_vector (QImode, w);
6931 if (!VECTOR_MODE_P (qimode))
6935 /* If the input is a constant, expand it specially. */
6936 if (CONSTANT_P (sel))
6938 icode = direct_optab_handler (vec_perm_const_optab, mode);
6939 if (icode != CODE_FOR_nothing)
6941 tmp = expand_vec_perm_1 (icode, target, v0, v1, sel);
6946 /* Fall back to a constant byte-based permutation. */
6947 if (qimode != VOIDmode)
6949 vec = rtvec_alloc (w);
6950 for (i = 0; i < e; ++i)
6952 unsigned int j, this_e;
6954 this_e = INTVAL (XVECEXP (sel, 0, i));
6955 this_e &= 2 * e - 1;
6958 for (j = 0; j < u; ++j)
6959 RTVEC_ELT (vec, i * u + j) = GEN_INT (this_e + j);
6961 sel_qi = gen_rtx_CONST_VECTOR (qimode, vec);
6963 icode = direct_optab_handler (vec_perm_const_optab, qimode);
6964 if (icode != CODE_FOR_nothing)
6966 tmp = expand_vec_perm_1 (icode, gen_lowpart (qimode, target),
6967 gen_lowpart (qimode, v0),
6968 gen_lowpart (qimode, v1), sel_qi);
6970 return gen_lowpart (mode, tmp);
6975 /* Otherwise expand as a fully variable permuation. */
6976 icode = direct_optab_handler (vec_perm_optab, mode);
6977 if (icode != CODE_FOR_nothing)
6979 tmp = expand_vec_perm_1 (icode, target, v0, v1, sel);
6984 /* As a special case to aid several targets, lower the element-based
6985 permutation to a byte-based permutation and try again. */
6986 if (qimode == VOIDmode)
6988 icode = direct_optab_handler (vec_perm_optab, qimode);
6989 if (icode == CODE_FOR_nothing)
6994 /* Multiply each element by its byte size. */
6995 enum machine_mode selmode = GET_MODE (sel);
6997 sel = expand_simple_binop (selmode, PLUS, sel, sel,
6998 sel, 0, OPTAB_DIRECT);
7000 sel = expand_simple_binop (selmode, ASHIFT, sel,
7001 GEN_INT (exact_log2 (u)),
7002 sel, 0, OPTAB_DIRECT);
7003 gcc_assert (sel != NULL);
7005 /* Broadcast the low byte each element into each of its bytes. */
7006 vec = rtvec_alloc (w);
7007 for (i = 0; i < w; ++i)
7009 int this_e = i / u * u;
7010 if (BYTES_BIG_ENDIAN)
7012 RTVEC_ELT (vec, i) = GEN_INT (this_e);
7014 tmp = gen_rtx_CONST_VECTOR (qimode, vec);
7015 sel = gen_lowpart (qimode, sel);
7016 sel = expand_vec_perm (qimode, sel, sel, tmp, NULL);
7017 gcc_assert (sel != NULL);
7019 /* Add the byte offset to each byte element. */
7020 /* Note that the definition of the indicies here is memory ordering,
7021 so there should be no difference between big and little endian. */
7022 vec = rtvec_alloc (w);
7023 for (i = 0; i < w; ++i)
7024 RTVEC_ELT (vec, i) = GEN_INT (i % u);
7025 tmp = gen_rtx_CONST_VECTOR (qimode, vec);
7026 sel_qi = expand_simple_binop (qimode, PLUS, sel, tmp,
7027 sel, 0, OPTAB_DIRECT);
7028 gcc_assert (sel_qi != NULL);
7031 tmp = expand_vec_perm_1 (icode, gen_lowpart (qimode, target),
7032 gen_lowpart (qimode, v0),
7033 gen_lowpart (qimode, v1), sel_qi);
7035 tmp = gen_lowpart (mode, tmp);
7039 /* Return insn code for a conditional operator with a comparison in
7040 mode CMODE, unsigned if UNS is true, resulting in a value of mode VMODE. */
7042 static inline enum insn_code
7043 get_vcond_icode (enum machine_mode vmode, enum machine_mode cmode, bool uns)
7045 enum insn_code icode = CODE_FOR_nothing;
7047 icode = convert_optab_handler (vcondu_optab, vmode, cmode);
7049 icode = convert_optab_handler (vcond_optab, vmode, cmode);
7053 /* Return TRUE iff, appropriate vector insns are available
7054 for vector cond expr with vector type VALUE_TYPE and a comparison
7055 with operand vector types in CMP_OP_TYPE. */
7058 expand_vec_cond_expr_p (tree value_type, tree cmp_op_type)
7060 enum machine_mode value_mode = TYPE_MODE (value_type);
7061 enum machine_mode cmp_op_mode = TYPE_MODE (cmp_op_type);
7062 if (GET_MODE_SIZE (value_mode) != GET_MODE_SIZE (cmp_op_mode)
7063 || GET_MODE_NUNITS (value_mode) != GET_MODE_NUNITS (cmp_op_mode)
7064 || get_vcond_icode (TYPE_MODE (value_type), TYPE_MODE (cmp_op_type),
7065 TYPE_UNSIGNED (cmp_op_type)) == CODE_FOR_nothing)
7070 /* Generate insns for a VEC_COND_EXPR, given its TYPE and its
7074 expand_vec_cond_expr (tree vec_cond_type, tree op0, tree op1, tree op2,
7077 struct expand_operand ops[6];
7078 enum insn_code icode;
7079 rtx comparison, rtx_op1, rtx_op2;
7080 enum machine_mode mode = TYPE_MODE (vec_cond_type);
7081 enum machine_mode cmp_op_mode;
7084 gcc_assert (COMPARISON_CLASS_P (op0));
7086 unsignedp = TYPE_UNSIGNED (TREE_TYPE (TREE_OPERAND (op0, 0)));
7087 cmp_op_mode = TYPE_MODE (TREE_TYPE (TREE_OPERAND (op0, 0)));
7089 gcc_assert (GET_MODE_SIZE (mode) == GET_MODE_SIZE (cmp_op_mode)
7090 && GET_MODE_NUNITS (mode) == GET_MODE_NUNITS (cmp_op_mode));
7092 icode = get_vcond_icode (mode, cmp_op_mode, unsignedp);
7093 if (icode == CODE_FOR_nothing)
7096 comparison = vector_compare_rtx (op0, unsignedp, icode);
7097 rtx_op1 = expand_normal (op1);
7098 rtx_op2 = expand_normal (op2);
7100 create_output_operand (&ops[0], target, mode);
7101 create_input_operand (&ops[1], rtx_op1, mode);
7102 create_input_operand (&ops[2], rtx_op2, mode);
7103 create_fixed_operand (&ops[3], comparison);
7104 create_fixed_operand (&ops[4], XEXP (comparison, 0));
7105 create_fixed_operand (&ops[5], XEXP (comparison, 1));
7106 expand_insn (icode, 6, ops);
7107 return ops[0].value;
7111 /* This is an internal subroutine of the other compare_and_swap expanders.
7112 MEM, OLD_VAL and NEW_VAL are as you'd expect for a compare-and-swap
7113 operation. TARGET is an optional place to store the value result of
7114 the operation. ICODE is the particular instruction to expand. Return
7115 the result of the operation. */
7118 expand_val_compare_and_swap_1 (rtx mem, rtx old_val, rtx new_val,
7119 rtx target, enum insn_code icode)
7121 struct expand_operand ops[4];
7122 enum machine_mode mode = GET_MODE (mem);
7124 create_output_operand (&ops[0], target, mode);
7125 create_fixed_operand (&ops[1], mem);
7126 /* OLD_VAL and NEW_VAL may have been promoted to a wider mode.
7127 Shrink them if so. */
7128 create_convert_operand_to (&ops[2], old_val, mode, true);
7129 create_convert_operand_to (&ops[3], new_val, mode, true);
7130 if (maybe_expand_insn (icode, 4, ops))
7131 return ops[0].value;
7135 /* Expand a compare-and-swap operation and return its value. */
7138 expand_val_compare_and_swap (rtx mem, rtx old_val, rtx new_val, rtx target)
7140 enum machine_mode mode = GET_MODE (mem);
7141 enum insn_code icode
7142 = direct_optab_handler (sync_compare_and_swap_optab, mode);
7144 if (icode == CODE_FOR_nothing)
7147 return expand_val_compare_and_swap_1 (mem, old_val, new_val, target, icode);
7150 /* Helper function to find the MODE_CC set in a sync_compare_and_swap
7154 find_cc_set (rtx x, const_rtx pat, void *data)
7156 if (REG_P (x) && GET_MODE_CLASS (GET_MODE (x)) == MODE_CC
7157 && GET_CODE (pat) == SET)
7159 rtx *p_cc_reg = (rtx *) data;
7160 gcc_assert (!*p_cc_reg);
7165 /* Expand a compare-and-swap operation and store true into the result if
7166 the operation was successful and false otherwise. Return the result.
7167 Unlike other routines, TARGET is not optional. */
7170 expand_bool_compare_and_swap (rtx mem, rtx old_val, rtx new_val, rtx target)
7172 enum machine_mode mode = GET_MODE (mem);
7173 enum insn_code icode;
7174 rtx subtarget, seq, cc_reg;
7176 /* If the target supports a compare-and-swap pattern that simultaneously
7177 sets some flag for success, then use it. Otherwise use the regular
7178 compare-and-swap and follow that immediately with a compare insn. */
7179 icode = direct_optab_handler (sync_compare_and_swap_optab, mode);
7180 if (icode == CODE_FOR_nothing)
7183 do_pending_stack_adjust ();
7187 subtarget = expand_val_compare_and_swap_1 (mem, old_val, new_val,
7190 if (subtarget == NULL_RTX)
7196 if (have_insn_for (COMPARE, CCmode))
7197 note_stores (PATTERN (get_last_insn ()), find_cc_set, &cc_reg);
7201 /* We might be comparing against an old value. Try again. :-( */
7202 if (!cc_reg && MEM_P (old_val))
7205 old_val = force_reg (mode, old_val);
7212 return emit_store_flag_force (target, EQ, cc_reg, const0_rtx, VOIDmode, 0, 1);
7214 return emit_store_flag_force (target, EQ, subtarget, old_val, VOIDmode, 1, 1);
7217 /* This is a helper function for the other atomic operations. This function
7218 emits a loop that contains SEQ that iterates until a compare-and-swap
7219 operation at the end succeeds. MEM is the memory to be modified. SEQ is
7220 a set of instructions that takes a value from OLD_REG as an input and
7221 produces a value in NEW_REG as an output. Before SEQ, OLD_REG will be
7222 set to the current contents of MEM. After SEQ, a compare-and-swap will
7223 attempt to update MEM with NEW_REG. The function returns true when the
7224 loop was generated successfully. */
7227 expand_compare_and_swap_loop (rtx mem, rtx old_reg, rtx new_reg, rtx seq)
7229 enum machine_mode mode = GET_MODE (mem);
7230 enum insn_code icode;
7231 rtx label, cmp_reg, subtarget, cc_reg;
7233 /* The loop we want to generate looks like
7239 cmp_reg = compare-and-swap(mem, old_reg, new_reg)
7240 if (cmp_reg != old_reg)
7243 Note that we only do the plain load from memory once. Subsequent
7244 iterations use the value loaded by the compare-and-swap pattern. */
7246 label = gen_label_rtx ();
7247 cmp_reg = gen_reg_rtx (mode);
7249 emit_move_insn (cmp_reg, mem);
7251 emit_move_insn (old_reg, cmp_reg);
7255 /* If the target supports a compare-and-swap pattern that simultaneously
7256 sets some flag for success, then use it. Otherwise use the regular
7257 compare-and-swap and follow that immediately with a compare insn. */
7258 icode = direct_optab_handler (sync_compare_and_swap_optab, mode);
7259 if (icode == CODE_FOR_nothing)
7262 subtarget = expand_val_compare_and_swap_1 (mem, old_reg, new_reg,
7264 if (subtarget == NULL_RTX)
7268 if (have_insn_for (COMPARE, CCmode))
7269 note_stores (PATTERN (get_last_insn ()), find_cc_set, &cc_reg);
7273 old_reg = const0_rtx;
7277 if (subtarget != cmp_reg)
7278 emit_move_insn (cmp_reg, subtarget);
7281 /* ??? Mark this jump predicted not taken? */
7282 emit_cmp_and_jump_insns (cmp_reg, old_reg, NE, const0_rtx, GET_MODE (cmp_reg), 1,
7287 /* This function generates the atomic operation MEM CODE= VAL. In this
7288 case, we do not care about any resulting value. Returns NULL if we
7289 cannot generate the operation. */
7292 expand_sync_operation (rtx mem, rtx val, enum rtx_code code)
7294 enum machine_mode mode = GET_MODE (mem);
7295 enum insn_code icode;
7298 /* Look to see if the target supports the operation directly. */
7302 icode = direct_optab_handler (sync_add_optab, mode);
7305 icode = direct_optab_handler (sync_ior_optab, mode);
7308 icode = direct_optab_handler (sync_xor_optab, mode);
7311 icode = direct_optab_handler (sync_and_optab, mode);
7314 icode = direct_optab_handler (sync_nand_optab, mode);
7318 icode = direct_optab_handler (sync_sub_optab, mode);
7319 if (icode == CODE_FOR_nothing || CONST_INT_P (val))
7321 icode = direct_optab_handler (sync_add_optab, mode);
7322 if (icode != CODE_FOR_nothing)
7324 val = expand_simple_unop (mode, NEG, val, NULL_RTX, 1);
7334 /* Generate the direct operation, if present. */
7335 if (icode != CODE_FOR_nothing)
7337 struct expand_operand ops[2];
7339 create_fixed_operand (&ops[0], mem);
7340 /* VAL may have been promoted to a wider mode. Shrink it if so. */
7341 create_convert_operand_to (&ops[1], val, mode, true);
7342 if (maybe_expand_insn (icode, 2, ops))
7346 /* Failing that, generate a compare-and-swap loop in which we perform the
7347 operation with normal arithmetic instructions. */
7348 if (direct_optab_handler (sync_compare_and_swap_optab, mode)
7349 != CODE_FOR_nothing)
7351 rtx t0 = gen_reg_rtx (mode), t1;
7358 t1 = expand_simple_binop (mode, AND, t1, val, NULL_RTX,
7359 true, OPTAB_LIB_WIDEN);
7360 t1 = expand_simple_unop (mode, code, t1, NULL_RTX, true);
7363 t1 = expand_simple_binop (mode, code, t1, val, NULL_RTX,
7364 true, OPTAB_LIB_WIDEN);
7365 insn = get_insns ();
7368 if (t1 != NULL && expand_compare_and_swap_loop (mem, t0, t1, insn))
7375 /* This function generates the atomic operation MEM CODE= VAL. In this
7376 case, we do care about the resulting value: if AFTER is true then
7377 return the value MEM holds after the operation, if AFTER is false
7378 then return the value MEM holds before the operation. TARGET is an
7379 optional place for the result value to be stored. */
7382 expand_sync_fetch_operation (rtx mem, rtx val, enum rtx_code code,
7383 bool after, rtx target)
7385 enum machine_mode mode = GET_MODE (mem);
7386 enum insn_code old_code, new_code, icode;
7390 /* Look to see if the target supports the operation directly. */
7394 old_code = direct_optab_handler (sync_old_add_optab, mode);
7395 new_code = direct_optab_handler (sync_new_add_optab, mode);
7398 old_code = direct_optab_handler (sync_old_ior_optab, mode);
7399 new_code = direct_optab_handler (sync_new_ior_optab, mode);
7402 old_code = direct_optab_handler (sync_old_xor_optab, mode);
7403 new_code = direct_optab_handler (sync_new_xor_optab, mode);
7406 old_code = direct_optab_handler (sync_old_and_optab, mode);
7407 new_code = direct_optab_handler (sync_new_and_optab, mode);
7410 old_code = direct_optab_handler (sync_old_nand_optab, mode);
7411 new_code = direct_optab_handler (sync_new_nand_optab, mode);
7415 old_code = direct_optab_handler (sync_old_sub_optab, mode);
7416 new_code = direct_optab_handler (sync_new_sub_optab, mode);
7417 if ((old_code == CODE_FOR_nothing && new_code == CODE_FOR_nothing)
7418 || CONST_INT_P (val))
7420 old_code = direct_optab_handler (sync_old_add_optab, mode);
7421 new_code = direct_optab_handler (sync_new_add_optab, mode);
7422 if (old_code != CODE_FOR_nothing || new_code != CODE_FOR_nothing)
7424 val = expand_simple_unop (mode, NEG, val, NULL_RTX, 1);
7434 /* If the target does supports the proper new/old operation, great. But
7435 if we only support the opposite old/new operation, check to see if we
7436 can compensate. In the case in which the old value is supported, then
7437 we can always perform the operation again with normal arithmetic. In
7438 the case in which the new value is supported, then we can only handle
7439 this in the case the operation is reversible. */
7444 if (icode == CODE_FOR_nothing)
7447 if (icode != CODE_FOR_nothing)
7454 if (icode == CODE_FOR_nothing
7455 && (code == PLUS || code == MINUS || code == XOR))
7458 if (icode != CODE_FOR_nothing)
7463 /* If we found something supported, great. */
7464 if (icode != CODE_FOR_nothing)
7466 struct expand_operand ops[3];
7468 create_output_operand (&ops[0], target, mode);
7469 create_fixed_operand (&ops[1], mem);
7470 /* VAL may have been promoted to a wider mode. Shrink it if so. */
7471 create_convert_operand_to (&ops[2], val, mode, true);
7472 if (maybe_expand_insn (icode, 3, ops))
7474 target = ops[0].value;
7476 /* If we need to compensate for using an operation with the
7477 wrong return value, do so now. */
7484 else if (code == MINUS)
7490 target = expand_simple_binop (mode, AND, target, val,
7493 target = expand_simple_unop (mode, code, target,
7497 target = expand_simple_binop (mode, code, target, val,
7506 /* Failing that, generate a compare-and-swap loop in which we perform the
7507 operation with normal arithmetic instructions. */
7508 if (direct_optab_handler (sync_compare_and_swap_optab, mode)
7509 != CODE_FOR_nothing)
7511 rtx t0 = gen_reg_rtx (mode), t1;
7513 if (!target || !register_operand (target, mode))
7514 target = gen_reg_rtx (mode);
7519 emit_move_insn (target, t0);
7523 t1 = expand_simple_binop (mode, AND, t1, val, NULL_RTX,
7524 true, OPTAB_LIB_WIDEN);
7525 t1 = expand_simple_unop (mode, code, t1, NULL_RTX, true);
7528 t1 = expand_simple_binop (mode, code, t1, val, NULL_RTX,
7529 true, OPTAB_LIB_WIDEN);
7531 emit_move_insn (target, t1);
7533 insn = get_insns ();
7536 if (t1 != NULL && expand_compare_and_swap_loop (mem, t0, t1, insn))
7543 /* This function expands a test-and-set operation. Ideally we atomically
7544 store VAL in MEM and return the previous value in MEM. Some targets
7545 may not support this operation and only support VAL with the constant 1;
7546 in this case while the return value will be 0/1, but the exact value
7547 stored in MEM is target defined. TARGET is an option place to stick
7548 the return value. */
7551 expand_sync_lock_test_and_set (rtx mem, rtx val, rtx target)
7553 enum machine_mode mode = GET_MODE (mem);
7554 enum insn_code icode;
7556 /* If the target supports the test-and-set directly, great. */
7557 icode = direct_optab_handler (sync_lock_test_and_set_optab, mode);
7558 if (icode != CODE_FOR_nothing)
7560 struct expand_operand ops[3];
7562 create_output_operand (&ops[0], target, mode);
7563 create_fixed_operand (&ops[1], mem);
7564 /* VAL may have been promoted to a wider mode. Shrink it if so. */
7565 create_convert_operand_to (&ops[2], val, mode, true);
7566 if (maybe_expand_insn (icode, 3, ops))
7567 return ops[0].value;
7570 /* Otherwise, use a compare-and-swap loop for the exchange. */
7571 if (direct_optab_handler (sync_compare_and_swap_optab, mode)
7572 != CODE_FOR_nothing)
7574 if (!target || !register_operand (target, mode))
7575 target = gen_reg_rtx (mode);
7576 if (GET_MODE (val) != VOIDmode && GET_MODE (val) != mode)
7577 val = convert_modes (mode, GET_MODE (val), val, 1);
7578 if (expand_compare_and_swap_loop (mem, target, val, NULL_RTX))
7585 /* Return true if OPERAND is suitable for operand number OPNO of
7586 instruction ICODE. */
7589 insn_operand_matches (enum insn_code icode, unsigned int opno, rtx operand)
7591 return (!insn_data[(int) icode].operand[opno].predicate
7592 || (insn_data[(int) icode].operand[opno].predicate
7593 (operand, insn_data[(int) icode].operand[opno].mode)));
7596 /* TARGET is a target of a multiword operation that we are going to
7597 implement as a series of word-mode operations. Return true if
7598 TARGET is suitable for this purpose. */
7601 valid_multiword_target_p (rtx target)
7603 enum machine_mode mode;
7606 mode = GET_MODE (target);
7607 for (i = 0; i < GET_MODE_SIZE (mode); i += UNITS_PER_WORD)
7608 if (!validate_subreg (word_mode, mode, target, i))
7613 /* Like maybe_legitimize_operand, but do not change the code of the
7614 current rtx value. */
7617 maybe_legitimize_operand_same_code (enum insn_code icode, unsigned int opno,
7618 struct expand_operand *op)
7620 /* See if the operand matches in its current form. */
7621 if (insn_operand_matches (icode, opno, op->value))
7624 /* If the operand is a memory whose address has no side effects,
7625 try forcing the address into a register. The check for side
7626 effects is important because force_reg cannot handle things
7627 like auto-modified addresses. */
7628 if (insn_data[(int) icode].operand[opno].allows_mem
7629 && MEM_P (op->value)
7630 && !side_effects_p (XEXP (op->value, 0)))
7632 rtx addr, mem, last;
7634 last = get_last_insn ();
7635 addr = force_reg (Pmode, XEXP (op->value, 0));
7636 mem = replace_equiv_address (op->value, addr);
7637 if (insn_operand_matches (icode, opno, mem))
7642 delete_insns_since (last);
7648 /* Try to make OP match operand OPNO of instruction ICODE. Return true
7649 on success, storing the new operand value back in OP. */
7652 maybe_legitimize_operand (enum insn_code icode, unsigned int opno,
7653 struct expand_operand *op)
7655 enum machine_mode mode, imode;
7656 bool old_volatile_ok, result;
7662 old_volatile_ok = volatile_ok;
7664 result = maybe_legitimize_operand_same_code (icode, opno, op);
7665 volatile_ok = old_volatile_ok;
7669 gcc_assert (mode != VOIDmode);
7671 && op->value != const0_rtx
7672 && GET_MODE (op->value) == mode
7673 && maybe_legitimize_operand_same_code (icode, opno, op))
7676 op->value = gen_reg_rtx (mode);
7681 gcc_assert (mode != VOIDmode);
7682 gcc_assert (GET_MODE (op->value) == VOIDmode
7683 || GET_MODE (op->value) == mode);
7684 if (maybe_legitimize_operand_same_code (icode, opno, op))
7687 op->value = copy_to_mode_reg (mode, op->value);
7690 case EXPAND_CONVERT_TO:
7691 gcc_assert (mode != VOIDmode);
7692 op->value = convert_to_mode (mode, op->value, op->unsigned_p);
7695 case EXPAND_CONVERT_FROM:
7696 if (GET_MODE (op->value) != VOIDmode)
7697 mode = GET_MODE (op->value);
7699 /* The caller must tell us what mode this value has. */
7700 gcc_assert (mode != VOIDmode);
7702 imode = insn_data[(int) icode].operand[opno].mode;
7703 if (imode != VOIDmode && imode != mode)
7705 op->value = convert_modes (imode, mode, op->value, op->unsigned_p);
7710 case EXPAND_ADDRESS:
7711 gcc_assert (mode != VOIDmode);
7712 op->value = convert_memory_address (mode, op->value);
7715 case EXPAND_INTEGER:
7716 mode = insn_data[(int) icode].operand[opno].mode;
7717 if (mode != VOIDmode && const_int_operand (op->value, mode))
7721 return insn_operand_matches (icode, opno, op->value);
7724 /* Make OP describe an input operand that should have the same value
7725 as VALUE, after any mode conversion that the target might request.
7726 TYPE is the type of VALUE. */
7729 create_convert_operand_from_type (struct expand_operand *op,
7730 rtx value, tree type)
7732 create_convert_operand_from (op, value, TYPE_MODE (type),
7733 TYPE_UNSIGNED (type));
7736 /* Try to make operands [OPS, OPS + NOPS) match operands [OPNO, OPNO + NOPS)
7737 of instruction ICODE. Return true on success, leaving the new operand
7738 values in the OPS themselves. Emit no code on failure. */
7741 maybe_legitimize_operands (enum insn_code icode, unsigned int opno,
7742 unsigned int nops, struct expand_operand *ops)
7747 last = get_last_insn ();
7748 for (i = 0; i < nops; i++)
7749 if (!maybe_legitimize_operand (icode, opno + i, &ops[i]))
7751 delete_insns_since (last);
7757 /* Try to generate instruction ICODE, using operands [OPS, OPS + NOPS)
7758 as its operands. Return the instruction pattern on success,
7759 and emit any necessary set-up code. Return null and emit no
7763 maybe_gen_insn (enum insn_code icode, unsigned int nops,
7764 struct expand_operand *ops)
7766 gcc_assert (nops == (unsigned int) insn_data[(int) icode].n_generator_args);
7767 if (!maybe_legitimize_operands (icode, 0, nops, ops))
7773 return GEN_FCN (icode) (ops[0].value);
7775 return GEN_FCN (icode) (ops[0].value, ops[1].value);
7777 return GEN_FCN (icode) (ops[0].value, ops[1].value, ops[2].value);
7779 return GEN_FCN (icode) (ops[0].value, ops[1].value, ops[2].value,
7782 return GEN_FCN (icode) (ops[0].value, ops[1].value, ops[2].value,
7783 ops[3].value, ops[4].value);
7785 return GEN_FCN (icode) (ops[0].value, ops[1].value, ops[2].value,
7786 ops[3].value, ops[4].value, ops[5].value);
7791 /* Try to emit instruction ICODE, using operands [OPS, OPS + NOPS)
7792 as its operands. Return true on success and emit no code on failure. */
7795 maybe_expand_insn (enum insn_code icode, unsigned int nops,
7796 struct expand_operand *ops)
7798 rtx pat = maybe_gen_insn (icode, nops, ops);
7807 /* Like maybe_expand_insn, but for jumps. */
7810 maybe_expand_jump_insn (enum insn_code icode, unsigned int nops,
7811 struct expand_operand *ops)
7813 rtx pat = maybe_gen_insn (icode, nops, ops);
7816 emit_jump_insn (pat);
7822 /* Emit instruction ICODE, using operands [OPS, OPS + NOPS)
7826 expand_insn (enum insn_code icode, unsigned int nops,
7827 struct expand_operand *ops)
7829 if (!maybe_expand_insn (icode, nops, ops))
7833 /* Like expand_insn, but for jumps. */
7836 expand_jump_insn (enum insn_code icode, unsigned int nops,
7837 struct expand_operand *ops)
7839 if (!maybe_expand_jump_insn (icode, nops, ops))
7843 #include "gt-optabs.h"