1 /* Expand the basic unary and binary arithmetic operations, for GNU compiler.
2 Copyright (C) 1987, 88, 92-98, 1999 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
26 /* Include insn-config.h before expr.h so that HAVE_conditional_move
27 is properly defined. */
28 #include "insn-config.h"
32 #include "insn-flags.h"
33 #include "insn-codes.h"
40 /* Each optab contains info on how this target machine
41 can perform a particular operation
42 for all sizes and kinds of operands.
44 The operation to be performed is often specified
45 by passing one of these optabs as an argument.
47 See expr.h for documentation of these optabs. */
49 optab optab_table[OTI_MAX];
51 rtx libfunc_table[LTI_MAX];
53 /* Tables of patterns for extending one integer mode to another. */
54 enum insn_code extendtab[MAX_MACHINE_MODE][MAX_MACHINE_MODE][2];
56 /* Tables of patterns for converting between fixed and floating point. */
57 enum insn_code fixtab[NUM_MACHINE_MODES][NUM_MACHINE_MODES][2];
58 enum insn_code fixtrunctab[NUM_MACHINE_MODES][NUM_MACHINE_MODES][2];
59 enum insn_code floattab[NUM_MACHINE_MODES][NUM_MACHINE_MODES][2];
61 /* Contains the optab used for each rtx code. */
62 optab code_to_optab[NUM_RTX_CODE + 1];
64 /* Indexed by the rtx-code for a conditional (eg. EQ, LT,...)
65 gives the gen_function to make a branch to test that condition. */
67 rtxfun bcc_gen_fctn[NUM_RTX_CODE];
69 /* Indexed by the rtx-code for a conditional (eg. EQ, LT,...)
70 gives the insn code to make a store-condition insn
71 to test that condition. */
73 enum insn_code setcc_gen_code[NUM_RTX_CODE];
75 #ifdef HAVE_conditional_move
76 /* Indexed by the machine mode, gives the insn code to make a conditional
77 move insn. This is not indexed by the rtx-code like bcc_gen_fctn and
78 setcc_gen_code to cut down on the number of named patterns. Consider a day
79 when a lot more rtx codes are conditional (eg: for the ARM). */
81 enum insn_code movcc_gen_code[NUM_MACHINE_MODES];
84 static int add_equal_note PROTO((rtx, rtx, enum rtx_code, rtx, rtx));
85 static rtx widen_operand PROTO((rtx, enum machine_mode,
86 enum machine_mode, int, int));
87 static int expand_cmplxdiv_straight PROTO((rtx, rtx, rtx, rtx,
88 rtx, rtx, enum machine_mode,
89 int, enum optab_methods,
90 enum mode_class, optab));
91 static int expand_cmplxdiv_wide PROTO((rtx, rtx, rtx, rtx,
92 rtx, rtx, enum machine_mode,
93 int, enum optab_methods,
94 enum mode_class, optab));
95 static enum insn_code can_fix_p PROTO((enum machine_mode, enum machine_mode,
97 static enum insn_code can_float_p PROTO((enum machine_mode, enum machine_mode,
99 static rtx ftruncify PROTO((rtx));
100 static optab init_optab PROTO((enum rtx_code));
101 static void init_libfuncs PROTO((optab, int, int, const char *, int));
102 static void init_integral_libfuncs PROTO((optab, const char *, int));
103 static void init_floating_libfuncs PROTO((optab, const char *, int));
104 #ifdef HAVE_conditional_trap
105 static void init_traps PROTO((void));
107 static int cmp_available_p PROTO((enum machine_mode, enum rtx_code, int));
108 static void emit_cmp_and_jump_insn_1 PROTO((rtx, rtx, enum machine_mode,
109 enum rtx_code, int, rtx));
110 static void prepare_cmp_insn PROTO((rtx *, rtx *, enum rtx_code *, rtx,
111 enum machine_mode *, int *, int));
112 static rtx prepare_operand PROTO((int, rtx, int, enum machine_mode,
113 enum machine_mode, int));
114 static void prepare_float_lib_cmp PROTO((rtx *, rtx *, enum rtx_code *,
115 enum machine_mode *, int *));
117 /* Add a REG_EQUAL note to the last insn in SEQ. TARGET is being set to
118 the result of operation CODE applied to OP0 (and OP1 if it is a binary
121 If the last insn does not set TARGET, don't do anything, but return 1.
123 If a previous insn sets TARGET and TARGET is one of OP0 or OP1,
124 don't add the REG_EQUAL note but return 0. Our caller can then try
125 again, ensuring that TARGET is not one of the operands. */
128 add_equal_note (seq, target, code, op0, op1)
138 if ((GET_RTX_CLASS (code) != '1' && GET_RTX_CLASS (code) != '2'
139 && GET_RTX_CLASS (code) != 'c' && GET_RTX_CLASS (code) != '<')
140 || GET_CODE (seq) != SEQUENCE
141 || (set = single_set (XVECEXP (seq, 0, XVECLEN (seq, 0) - 1))) == 0
142 || GET_CODE (target) == ZERO_EXTRACT
143 || (! rtx_equal_p (SET_DEST (set), target)
144 /* For a STRICT_LOW_PART, the REG_NOTE applies to what is inside the
146 && (GET_CODE (SET_DEST (set)) != STRICT_LOW_PART
147 || ! rtx_equal_p (SUBREG_REG (XEXP (SET_DEST (set), 0)),
151 /* If TARGET is in OP0 or OP1, check if anything in SEQ sets TARGET
152 besides the last insn. */
153 if (reg_overlap_mentioned_p (target, op0)
154 || (op1 && reg_overlap_mentioned_p (target, op1)))
155 for (i = XVECLEN (seq, 0) - 2; i >= 0; i--)
156 if (reg_set_p (target, XVECEXP (seq, 0, i)))
159 if (GET_RTX_CLASS (code) == '1')
160 note = gen_rtx_fmt_e (code, GET_MODE (target), copy_rtx (op0));
162 note = gen_rtx_fmt_ee (code, GET_MODE (target), copy_rtx (op0), copy_rtx (op1));
164 set_unique_reg_note (XVECEXP (seq, 0, XVECLEN (seq, 0) - 1), REG_EQUAL, note);
169 /* Widen OP to MODE and return the rtx for the widened operand. UNSIGNEDP
170 says whether OP is signed or unsigned. NO_EXTEND is nonzero if we need
171 not actually do a sign-extend or zero-extend, but can leave the
172 higher-order bits of the result rtx undefined, for example, in the case
173 of logical operations, but not right shifts. */
176 widen_operand (op, mode, oldmode, unsignedp, no_extend)
178 enum machine_mode mode, oldmode;
184 /* If we must extend do so. If OP is either a constant or a SUBREG
185 for a promoted object, also extend since it will be more efficient to
188 || GET_MODE (op) == VOIDmode
189 || (GET_CODE (op) == SUBREG && SUBREG_PROMOTED_VAR_P (op)))
190 return convert_modes (mode, oldmode, op, unsignedp);
192 /* If MODE is no wider than a single word, we return a paradoxical
194 if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD)
195 return gen_rtx_SUBREG (mode, force_reg (GET_MODE (op), op), 0);
197 /* Otherwise, get an object of MODE, clobber it, and set the low-order
200 result = gen_reg_rtx (mode);
201 emit_insn (gen_rtx_CLOBBER (VOIDmode, result));
202 emit_move_insn (gen_lowpart (GET_MODE (op), result), op);
206 /* Generate code to perform a straightforward complex divide. */
209 expand_cmplxdiv_straight (real0, real1, imag0, imag1, realr, imagr, submode,
210 unsignedp, methods, class, binoptab)
211 rtx real0, real1, imag0, imag1, realr, imagr;
212 enum machine_mode submode;
214 enum optab_methods methods;
215 enum mode_class class;
223 /* Don't fetch these from memory more than once. */
224 real0 = force_reg (submode, real0);
225 real1 = force_reg (submode, real1);
228 imag0 = force_reg (submode, imag0);
230 imag1 = force_reg (submode, imag1);
232 /* Divisor: c*c + d*d. */
233 temp1 = expand_binop (submode, smul_optab, real1, real1,
234 NULL_RTX, unsignedp, methods);
236 temp2 = expand_binop (submode, smul_optab, imag1, imag1,
237 NULL_RTX, unsignedp, methods);
239 if (temp1 == 0 || temp2 == 0)
242 divisor = expand_binop (submode, add_optab, temp1, temp2,
243 NULL_RTX, unsignedp, methods);
249 /* Mathematically, ((a)(c-id))/divisor. */
250 /* Computationally, (a+i0) / (c+id) = (ac/(cc+dd)) + i(-ad/(cc+dd)). */
252 /* Calculate the dividend. */
253 real_t = expand_binop (submode, smul_optab, real0, real1,
254 NULL_RTX, unsignedp, methods);
256 imag_t = expand_binop (submode, smul_optab, real0, imag1,
257 NULL_RTX, unsignedp, methods);
259 if (real_t == 0 || imag_t == 0)
262 imag_t = expand_unop (submode, neg_optab, imag_t,
263 NULL_RTX, unsignedp);
267 /* Mathematically, ((a+ib)(c-id))/divider. */
268 /* Calculate the dividend. */
269 temp1 = expand_binop (submode, smul_optab, real0, real1,
270 NULL_RTX, unsignedp, methods);
272 temp2 = expand_binop (submode, smul_optab, imag0, imag1,
273 NULL_RTX, unsignedp, methods);
275 if (temp1 == 0 || temp2 == 0)
278 real_t = expand_binop (submode, add_optab, temp1, temp2,
279 NULL_RTX, unsignedp, methods);
281 temp1 = expand_binop (submode, smul_optab, imag0, real1,
282 NULL_RTX, unsignedp, methods);
284 temp2 = expand_binop (submode, smul_optab, real0, imag1,
285 NULL_RTX, unsignedp, methods);
287 if (temp1 == 0 || temp2 == 0)
290 imag_t = expand_binop (submode, sub_optab, temp1, temp2,
291 NULL_RTX, unsignedp, methods);
293 if (real_t == 0 || imag_t == 0)
297 if (class == MODE_COMPLEX_FLOAT)
298 res = expand_binop (submode, binoptab, real_t, divisor,
299 realr, unsignedp, methods);
301 res = expand_divmod (0, TRUNC_DIV_EXPR, submode,
302 real_t, divisor, realr, unsignedp);
308 emit_move_insn (realr, res);
310 if (class == MODE_COMPLEX_FLOAT)
311 res = expand_binop (submode, binoptab, imag_t, divisor,
312 imagr, unsignedp, methods);
314 res = expand_divmod (0, TRUNC_DIV_EXPR, submode,
315 imag_t, divisor, imagr, unsignedp);
321 emit_move_insn (imagr, res);
326 /* Generate code to perform a wide-input-range-acceptable complex divide. */
329 expand_cmplxdiv_wide (real0, real1, imag0, imag1, realr, imagr, submode,
330 unsignedp, methods, class, binoptab)
331 rtx real0, real1, imag0, imag1, realr, imagr;
332 enum machine_mode submode;
334 enum optab_methods methods;
335 enum mode_class class;
340 rtx temp1, temp2, lab1, lab2;
341 enum machine_mode mode;
345 /* Don't fetch these from memory more than once. */
346 real0 = force_reg (submode, real0);
347 real1 = force_reg (submode, real1);
350 imag0 = force_reg (submode, imag0);
352 imag1 = force_reg (submode, imag1);
354 /* XXX What's an "unsigned" complex number? */
362 temp1 = expand_abs (submode, real1, NULL_RTX, 1);
363 temp2 = expand_abs (submode, imag1, NULL_RTX, 1);
366 if (temp1 == 0 || temp2 == 0)
369 mode = GET_MODE (temp1);
370 align = GET_MODE_ALIGNMENT (mode);
371 lab1 = gen_label_rtx ();
372 emit_cmp_and_jump_insns (temp1, temp2, LT, NULL_RTX,
373 mode, unsignedp, align, lab1);
375 /* |c| >= |d|; use ratio d/c to scale dividend and divisor. */
377 if (class == MODE_COMPLEX_FLOAT)
378 ratio = expand_binop (submode, binoptab, imag1, real1,
379 NULL_RTX, unsignedp, methods);
381 ratio = expand_divmod (0, TRUNC_DIV_EXPR, submode,
382 imag1, real1, NULL_RTX, unsignedp);
387 /* Calculate divisor. */
389 temp1 = expand_binop (submode, smul_optab, imag1, ratio,
390 NULL_RTX, unsignedp, methods);
395 divisor = expand_binop (submode, add_optab, temp1, real1,
396 NULL_RTX, unsignedp, methods);
401 /* Calculate dividend. */
407 /* Compute a / (c+id) as a / (c+d(d/c)) + i (-a(d/c)) / (c+d(d/c)). */
409 imag_t = expand_binop (submode, smul_optab, real0, ratio,
410 NULL_RTX, unsignedp, methods);
415 imag_t = expand_unop (submode, neg_optab, imag_t,
416 NULL_RTX, unsignedp);
418 if (real_t == 0 || imag_t == 0)
423 /* Compute (a+ib)/(c+id) as
424 (a+b(d/c))/(c+d(d/c) + i(b-a(d/c))/(c+d(d/c)). */
426 temp1 = expand_binop (submode, smul_optab, imag0, ratio,
427 NULL_RTX, unsignedp, methods);
432 real_t = expand_binop (submode, add_optab, temp1, real0,
433 NULL_RTX, unsignedp, methods);
435 temp1 = expand_binop (submode, smul_optab, real0, ratio,
436 NULL_RTX, unsignedp, methods);
441 imag_t = expand_binop (submode, sub_optab, imag0, temp1,
442 NULL_RTX, unsignedp, methods);
444 if (real_t == 0 || imag_t == 0)
448 if (class == MODE_COMPLEX_FLOAT)
449 res = expand_binop (submode, binoptab, real_t, divisor,
450 realr, unsignedp, methods);
452 res = expand_divmod (0, TRUNC_DIV_EXPR, submode,
453 real_t, divisor, realr, unsignedp);
459 emit_move_insn (realr, res);
461 if (class == MODE_COMPLEX_FLOAT)
462 res = expand_binop (submode, binoptab, imag_t, divisor,
463 imagr, unsignedp, methods);
465 res = expand_divmod (0, TRUNC_DIV_EXPR, submode,
466 imag_t, divisor, imagr, unsignedp);
472 emit_move_insn (imagr, res);
474 lab2 = gen_label_rtx ();
475 emit_jump_insn (gen_jump (lab2));
480 /* |d| > |c|; use ratio c/d to scale dividend and divisor. */
482 if (class == MODE_COMPLEX_FLOAT)
483 ratio = expand_binop (submode, binoptab, real1, imag1,
484 NULL_RTX, unsignedp, methods);
486 ratio = expand_divmod (0, TRUNC_DIV_EXPR, submode,
487 real1, imag1, NULL_RTX, unsignedp);
492 /* Calculate divisor. */
494 temp1 = expand_binop (submode, smul_optab, real1, ratio,
495 NULL_RTX, unsignedp, methods);
500 divisor = expand_binop (submode, add_optab, temp1, imag1,
501 NULL_RTX, unsignedp, methods);
506 /* Calculate dividend. */
510 /* Compute a / (c+id) as a(c/d) / (c(c/d)+d) + i (-a) / (c(c/d)+d). */
512 real_t = expand_binop (submode, smul_optab, real0, ratio,
513 NULL_RTX, unsignedp, methods);
515 imag_t = expand_unop (submode, neg_optab, real0,
516 NULL_RTX, unsignedp);
518 if (real_t == 0 || imag_t == 0)
523 /* Compute (a+ib)/(c+id) as
524 (a(c/d)+b)/(c(c/d)+d) + i (b(c/d)-a)/(c(c/d)+d). */
526 temp1 = expand_binop (submode, smul_optab, real0, ratio,
527 NULL_RTX, unsignedp, methods);
532 real_t = expand_binop (submode, add_optab, temp1, imag0,
533 NULL_RTX, unsignedp, methods);
535 temp1 = expand_binop (submode, smul_optab, imag0, ratio,
536 NULL_RTX, unsignedp, methods);
541 imag_t = expand_binop (submode, sub_optab, temp1, real0,
542 NULL_RTX, unsignedp, methods);
544 if (real_t == 0 || imag_t == 0)
548 if (class == MODE_COMPLEX_FLOAT)
549 res = expand_binop (submode, binoptab, real_t, divisor,
550 realr, unsignedp, methods);
552 res = expand_divmod (0, TRUNC_DIV_EXPR, submode,
553 real_t, divisor, realr, unsignedp);
559 emit_move_insn (realr, res);
561 if (class == MODE_COMPLEX_FLOAT)
562 res = expand_binop (submode, binoptab, imag_t, divisor,
563 imagr, unsignedp, methods);
565 res = expand_divmod (0, TRUNC_DIV_EXPR, submode,
566 imag_t, divisor, imagr, unsignedp);
572 emit_move_insn (imagr, res);
579 /* Generate code to perform an operation specified by BINOPTAB
580 on operands OP0 and OP1, with result having machine-mode MODE.
582 UNSIGNEDP is for the case where we have to widen the operands
583 to perform the operation. It says to use zero-extension.
585 If TARGET is nonzero, the value
586 is generated there, if it is convenient to do so.
587 In all cases an rtx is returned for the locus of the value;
588 this may or may not be TARGET. */
591 expand_binop (mode, binoptab, op0, op1, target, unsignedp, methods)
592 enum machine_mode mode;
597 enum optab_methods methods;
599 enum optab_methods next_methods
600 = (methods == OPTAB_LIB || methods == OPTAB_LIB_WIDEN
601 ? OPTAB_WIDEN : methods);
602 enum mode_class class;
603 enum machine_mode wider_mode;
605 int commutative_op = 0;
606 int shift_op = (binoptab->code == ASHIFT
607 || binoptab->code == ASHIFTRT
608 || binoptab->code == LSHIFTRT
609 || binoptab->code == ROTATE
610 || binoptab->code == ROTATERT);
611 rtx entry_last = get_last_insn ();
614 class = GET_MODE_CLASS (mode);
616 op0 = protect_from_queue (op0, 0);
617 op1 = protect_from_queue (op1, 0);
619 target = protect_from_queue (target, 1);
623 op0 = force_not_mem (op0);
624 op1 = force_not_mem (op1);
627 /* If subtracting an integer constant, convert this into an addition of
628 the negated constant. */
630 if (binoptab == sub_optab && GET_CODE (op1) == CONST_INT)
632 op1 = negate_rtx (mode, op1);
633 binoptab = add_optab;
636 /* If we are inside an appropriately-short loop and one operand is an
637 expensive constant, force it into a register. */
638 if (CONSTANT_P (op0) && preserve_subexpressions_p ()
639 && rtx_cost (op0, binoptab->code) > 2)
640 op0 = force_reg (mode, op0);
642 if (CONSTANT_P (op1) && preserve_subexpressions_p ()
643 && ! shift_op && rtx_cost (op1, binoptab->code) > 2)
644 op1 = force_reg (mode, op1);
646 /* Record where to delete back to if we backtrack. */
647 last = get_last_insn ();
649 /* If operation is commutative,
650 try to make the first operand a register.
651 Even better, try to make it the same as the target.
652 Also try to make the last operand a constant. */
653 if (GET_RTX_CLASS (binoptab->code) == 'c'
654 || binoptab == smul_widen_optab
655 || binoptab == umul_widen_optab
656 || binoptab == smul_highpart_optab
657 || binoptab == umul_highpart_optab)
661 if (((target == 0 || GET_CODE (target) == REG)
662 ? ((GET_CODE (op1) == REG
663 && GET_CODE (op0) != REG)
665 : rtx_equal_p (op1, target))
666 || GET_CODE (op0) == CONST_INT)
674 /* If we can do it with a three-operand insn, do so. */
676 if (methods != OPTAB_MUST_WIDEN
677 && binoptab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
679 int icode = (int) binoptab->handlers[(int) mode].insn_code;
680 enum machine_mode mode0 = insn_operand_mode[icode][1];
681 enum machine_mode mode1 = insn_operand_mode[icode][2];
683 rtx xop0 = op0, xop1 = op1;
688 temp = gen_reg_rtx (mode);
690 /* If it is a commutative operator and the modes would match
691 if we would swap the operands, we can save the conversions. */
694 if (GET_MODE (op0) != mode0 && GET_MODE (op1) != mode1
695 && GET_MODE (op0) == mode1 && GET_MODE (op1) == mode0)
699 tmp = op0; op0 = op1; op1 = tmp;
700 tmp = xop0; xop0 = xop1; xop1 = tmp;
704 /* In case the insn wants input operands in modes different from
705 the result, convert the operands. */
707 if (GET_MODE (op0) != VOIDmode
708 && GET_MODE (op0) != mode0
709 && mode0 != VOIDmode)
710 xop0 = convert_to_mode (mode0, xop0, unsignedp);
712 if (GET_MODE (xop1) != VOIDmode
713 && GET_MODE (xop1) != mode1
714 && mode1 != VOIDmode)
715 xop1 = convert_to_mode (mode1, xop1, unsignedp);
717 /* Now, if insn's predicates don't allow our operands, put them into
720 if (! (*insn_operand_predicate[icode][1]) (xop0, mode0)
721 && mode0 != VOIDmode)
722 xop0 = copy_to_mode_reg (mode0, xop0);
724 if (! (*insn_operand_predicate[icode][2]) (xop1, mode1)
725 && mode1 != VOIDmode)
726 xop1 = copy_to_mode_reg (mode1, xop1);
728 if (! (*insn_operand_predicate[icode][0]) (temp, mode))
729 temp = gen_reg_rtx (mode);
731 pat = GEN_FCN (icode) (temp, xop0, xop1);
734 /* If PAT is a multi-insn sequence, try to add an appropriate
735 REG_EQUAL note to it. If we can't because TEMP conflicts with an
736 operand, call ourselves again, this time without a target. */
737 if (GET_CODE (pat) == SEQUENCE
738 && ! add_equal_note (pat, temp, binoptab->code, xop0, xop1))
740 delete_insns_since (last);
741 return expand_binop (mode, binoptab, op0, op1, NULL_RTX,
749 delete_insns_since (last);
752 /* If this is a multiply, see if we can do a widening operation that
753 takes operands of this mode and makes a wider mode. */
755 if (binoptab == smul_optab && GET_MODE_WIDER_MODE (mode) != VOIDmode
756 && (((unsignedp ? umul_widen_optab : smul_widen_optab)
757 ->handlers[(int) GET_MODE_WIDER_MODE (mode)].insn_code)
758 != CODE_FOR_nothing))
760 temp = expand_binop (GET_MODE_WIDER_MODE (mode),
761 unsignedp ? umul_widen_optab : smul_widen_optab,
762 op0, op1, NULL_RTX, unsignedp, OPTAB_DIRECT);
766 if (GET_MODE_CLASS (mode) == MODE_INT)
767 return gen_lowpart (mode, temp);
769 return convert_to_mode (mode, temp, unsignedp);
773 /* Look for a wider mode of the same class for which we think we
774 can open-code the operation. Check for a widening multiply at the
775 wider mode as well. */
777 if ((class == MODE_INT || class == MODE_FLOAT || class == MODE_COMPLEX_FLOAT)
778 && methods != OPTAB_DIRECT && methods != OPTAB_LIB)
779 for (wider_mode = GET_MODE_WIDER_MODE (mode); wider_mode != VOIDmode;
780 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
782 if (binoptab->handlers[(int) wider_mode].insn_code != CODE_FOR_nothing
783 || (binoptab == smul_optab
784 && GET_MODE_WIDER_MODE (wider_mode) != VOIDmode
785 && (((unsignedp ? umul_widen_optab : smul_widen_optab)
786 ->handlers[(int) GET_MODE_WIDER_MODE (wider_mode)].insn_code)
787 != CODE_FOR_nothing)))
789 rtx xop0 = op0, xop1 = op1;
792 /* For certain integer operations, we need not actually extend
793 the narrow operands, as long as we will truncate
794 the results to the same narrowness. */
796 if ((binoptab == ior_optab || binoptab == and_optab
797 || binoptab == xor_optab
798 || binoptab == add_optab || binoptab == sub_optab
799 || binoptab == smul_optab || binoptab == ashl_optab)
800 && class == MODE_INT)
803 xop0 = widen_operand (xop0, wider_mode, mode, unsignedp, no_extend);
805 /* The second operand of a shift must always be extended. */
806 xop1 = widen_operand (xop1, wider_mode, mode, unsignedp,
807 no_extend && binoptab != ashl_optab);
809 temp = expand_binop (wider_mode, binoptab, xop0, xop1, NULL_RTX,
810 unsignedp, OPTAB_DIRECT);
813 if (class != MODE_INT)
816 target = gen_reg_rtx (mode);
817 convert_move (target, temp, 0);
821 return gen_lowpart (mode, temp);
824 delete_insns_since (last);
828 /* These can be done a word at a time. */
829 if ((binoptab == and_optab || binoptab == ior_optab || binoptab == xor_optab)
831 && GET_MODE_SIZE (mode) > UNITS_PER_WORD
832 && binoptab->handlers[(int) word_mode].insn_code != CODE_FOR_nothing)
838 /* If TARGET is the same as one of the operands, the REG_EQUAL note
839 won't be accurate, so use a new target. */
840 if (target == 0 || target == op0 || target == op1)
841 target = gen_reg_rtx (mode);
845 /* Do the actual arithmetic. */
846 for (i = 0; i < GET_MODE_BITSIZE (mode) / BITS_PER_WORD; i++)
848 rtx target_piece = operand_subword (target, i, 1, mode);
849 rtx x = expand_binop (word_mode, binoptab,
850 operand_subword_force (op0, i, mode),
851 operand_subword_force (op1, i, mode),
852 target_piece, unsignedp, next_methods);
857 if (target_piece != x)
858 emit_move_insn (target_piece, x);
861 insns = get_insns ();
864 if (i == GET_MODE_BITSIZE (mode) / BITS_PER_WORD)
866 if (binoptab->code != UNKNOWN)
868 = gen_rtx_fmt_ee (binoptab->code, mode,
869 copy_rtx (op0), copy_rtx (op1));
873 emit_no_conflict_block (insns, target, op0, op1, equiv_value);
878 /* Synthesize double word shifts from single word shifts. */
879 if ((binoptab == lshr_optab || binoptab == ashl_optab
880 || binoptab == ashr_optab)
882 && GET_CODE (op1) == CONST_INT
883 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
884 && binoptab->handlers[(int) word_mode].insn_code != CODE_FOR_nothing
885 && ashl_optab->handlers[(int) word_mode].insn_code != CODE_FOR_nothing
886 && lshr_optab->handlers[(int) word_mode].insn_code != CODE_FOR_nothing)
888 rtx insns, inter, equiv_value;
889 rtx into_target, outof_target;
890 rtx into_input, outof_input;
891 int shift_count, left_shift, outof_word;
893 /* If TARGET is the same as one of the operands, the REG_EQUAL note
894 won't be accurate, so use a new target. */
895 if (target == 0 || target == op0 || target == op1)
896 target = gen_reg_rtx (mode);
900 shift_count = INTVAL (op1);
902 /* OUTOF_* is the word we are shifting bits away from, and
903 INTO_* is the word that we are shifting bits towards, thus
904 they differ depending on the direction of the shift and
907 left_shift = binoptab == ashl_optab;
908 outof_word = left_shift ^ ! WORDS_BIG_ENDIAN;
910 outof_target = operand_subword (target, outof_word, 1, mode);
911 into_target = operand_subword (target, 1 - outof_word, 1, mode);
913 outof_input = operand_subword_force (op0, outof_word, mode);
914 into_input = operand_subword_force (op0, 1 - outof_word, mode);
916 if (shift_count >= BITS_PER_WORD)
918 inter = expand_binop (word_mode, binoptab,
920 GEN_INT (shift_count - BITS_PER_WORD),
921 into_target, unsignedp, next_methods);
923 if (inter != 0 && inter != into_target)
924 emit_move_insn (into_target, inter);
926 /* For a signed right shift, we must fill the word we are shifting
927 out of with copies of the sign bit. Otherwise it is zeroed. */
928 if (inter != 0 && binoptab != ashr_optab)
929 inter = CONST0_RTX (word_mode);
931 inter = expand_binop (word_mode, binoptab,
933 GEN_INT (BITS_PER_WORD - 1),
934 outof_target, unsignedp, next_methods);
936 if (inter != 0 && inter != outof_target)
937 emit_move_insn (outof_target, inter);
942 optab reverse_unsigned_shift, unsigned_shift;
944 /* For a shift of less then BITS_PER_WORD, to compute the carry,
945 we must do a logical shift in the opposite direction of the
948 reverse_unsigned_shift = (left_shift ? lshr_optab : ashl_optab);
950 /* For a shift of less than BITS_PER_WORD, to compute the word
951 shifted towards, we need to unsigned shift the orig value of
954 unsigned_shift = (left_shift ? ashl_optab : lshr_optab);
956 carries = expand_binop (word_mode, reverse_unsigned_shift,
958 GEN_INT (BITS_PER_WORD - shift_count),
959 0, unsignedp, next_methods);
964 inter = expand_binop (word_mode, unsigned_shift, into_input,
965 op1, 0, unsignedp, next_methods);
968 inter = expand_binop (word_mode, ior_optab, carries, inter,
969 into_target, unsignedp, next_methods);
971 if (inter != 0 && inter != into_target)
972 emit_move_insn (into_target, inter);
975 inter = expand_binop (word_mode, binoptab, outof_input,
976 op1, outof_target, unsignedp, next_methods);
978 if (inter != 0 && inter != outof_target)
979 emit_move_insn (outof_target, inter);
982 insns = get_insns ();
987 if (binoptab->code != UNKNOWN)
988 equiv_value = gen_rtx_fmt_ee (binoptab->code, mode, op0, op1);
992 emit_no_conflict_block (insns, target, op0, op1, equiv_value);
997 /* Synthesize double word rotates from single word shifts. */
998 if ((binoptab == rotl_optab || binoptab == rotr_optab)
1000 && GET_CODE (op1) == CONST_INT
1001 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
1002 && ashl_optab->handlers[(int) word_mode].insn_code != CODE_FOR_nothing
1003 && lshr_optab->handlers[(int) word_mode].insn_code != CODE_FOR_nothing)
1005 rtx insns, equiv_value;
1006 rtx into_target, outof_target;
1007 rtx into_input, outof_input;
1009 int shift_count, left_shift, outof_word;
1011 /* If TARGET is the same as one of the operands, the REG_EQUAL note
1012 won't be accurate, so use a new target. */
1013 if (target == 0 || target == op0 || target == op1)
1014 target = gen_reg_rtx (mode);
1018 shift_count = INTVAL (op1);
1020 /* OUTOF_* is the word we are shifting bits away from, and
1021 INTO_* is the word that we are shifting bits towards, thus
1022 they differ depending on the direction of the shift and
1023 WORDS_BIG_ENDIAN. */
1025 left_shift = (binoptab == rotl_optab);
1026 outof_word = left_shift ^ ! WORDS_BIG_ENDIAN;
1028 outof_target = operand_subword (target, outof_word, 1, mode);
1029 into_target = operand_subword (target, 1 - outof_word, 1, mode);
1031 outof_input = operand_subword_force (op0, outof_word, mode);
1032 into_input = operand_subword_force (op0, 1 - outof_word, mode);
1034 if (shift_count == BITS_PER_WORD)
1036 /* This is just a word swap. */
1037 emit_move_insn (outof_target, into_input);
1038 emit_move_insn (into_target, outof_input);
1043 rtx into_temp1, into_temp2, outof_temp1, outof_temp2;
1044 rtx first_shift_count, second_shift_count;
1045 optab reverse_unsigned_shift, unsigned_shift;
1047 reverse_unsigned_shift = (left_shift ^ (shift_count < BITS_PER_WORD)
1048 ? lshr_optab : ashl_optab);
1050 unsigned_shift = (left_shift ^ (shift_count < BITS_PER_WORD)
1051 ? ashl_optab : lshr_optab);
1053 if (shift_count > BITS_PER_WORD)
1055 first_shift_count = GEN_INT (shift_count - BITS_PER_WORD);
1056 second_shift_count = GEN_INT (2*BITS_PER_WORD - shift_count);
1060 first_shift_count = GEN_INT (BITS_PER_WORD - shift_count);
1061 second_shift_count = GEN_INT (shift_count);
1064 into_temp1 = expand_binop (word_mode, unsigned_shift,
1065 outof_input, first_shift_count,
1066 NULL_RTX, unsignedp, next_methods);
1067 into_temp2 = expand_binop (word_mode, reverse_unsigned_shift,
1068 into_input, second_shift_count,
1069 into_target, unsignedp, next_methods);
1071 if (into_temp1 != 0 && into_temp2 != 0)
1072 inter = expand_binop (word_mode, ior_optab, into_temp1, into_temp2,
1073 into_target, unsignedp, next_methods);
1077 if (inter != 0 && inter != into_target)
1078 emit_move_insn (into_target, inter);
1080 outof_temp1 = expand_binop (word_mode, unsigned_shift,
1081 into_input, first_shift_count,
1082 NULL_RTX, unsignedp, next_methods);
1083 outof_temp2 = expand_binop (word_mode, reverse_unsigned_shift,
1084 outof_input, second_shift_count,
1085 outof_target, unsignedp, next_methods);
1087 if (inter != 0 && outof_temp1 != 0 && outof_temp2 != 0)
1088 inter = expand_binop (word_mode, ior_optab,
1089 outof_temp1, outof_temp2,
1090 outof_target, unsignedp, next_methods);
1092 if (inter != 0 && inter != outof_target)
1093 emit_move_insn (outof_target, inter);
1096 insns = get_insns ();
1101 if (binoptab->code != UNKNOWN)
1102 equiv_value = gen_rtx_fmt_ee (binoptab->code, mode, op0, op1);
1106 /* We can't make this a no conflict block if this is a word swap,
1107 because the word swap case fails if the input and output values
1108 are in the same register. */
1109 if (shift_count != BITS_PER_WORD)
1110 emit_no_conflict_block (insns, target, op0, op1, equiv_value);
1119 /* These can be done a word at a time by propagating carries. */
1120 if ((binoptab == add_optab || binoptab == sub_optab)
1121 && class == MODE_INT
1122 && GET_MODE_SIZE (mode) >= 2 * UNITS_PER_WORD
1123 && binoptab->handlers[(int) word_mode].insn_code != CODE_FOR_nothing)
1126 rtx carry_tmp = gen_reg_rtx (word_mode);
1127 optab otheroptab = binoptab == add_optab ? sub_optab : add_optab;
1128 int nwords = GET_MODE_BITSIZE (mode) / BITS_PER_WORD;
1129 rtx carry_in = NULL_RTX, carry_out = NULL_RTX;
1132 /* We can handle either a 1 or -1 value for the carry. If STORE_FLAG
1133 value is one of those, use it. Otherwise, use 1 since it is the
1134 one easiest to get. */
1135 #if STORE_FLAG_VALUE == 1 || STORE_FLAG_VALUE == -1
1136 int normalizep = STORE_FLAG_VALUE;
1141 /* Prepare the operands. */
1142 xop0 = force_reg (mode, op0);
1143 xop1 = force_reg (mode, op1);
1145 if (target == 0 || GET_CODE (target) != REG
1146 || target == xop0 || target == xop1)
1147 target = gen_reg_rtx (mode);
1149 /* Indicate for flow that the entire target reg is being set. */
1150 if (GET_CODE (target) == REG)
1151 emit_insn (gen_rtx_CLOBBER (VOIDmode, target));
1153 /* Do the actual arithmetic. */
1154 for (i = 0; i < nwords; i++)
1156 int index = (WORDS_BIG_ENDIAN ? nwords - i - 1 : i);
1157 rtx target_piece = operand_subword (target, index, 1, mode);
1158 rtx op0_piece = operand_subword_force (xop0, index, mode);
1159 rtx op1_piece = operand_subword_force (xop1, index, mode);
1162 /* Main add/subtract of the input operands. */
1163 x = expand_binop (word_mode, binoptab,
1164 op0_piece, op1_piece,
1165 target_piece, unsignedp, next_methods);
1171 /* Store carry from main add/subtract. */
1172 carry_out = gen_reg_rtx (word_mode);
1173 carry_out = emit_store_flag_force (carry_out,
1174 (binoptab == add_optab
1177 word_mode, 1, normalizep);
1182 /* Add/subtract previous carry to main result. */
1183 x = expand_binop (word_mode,
1184 normalizep == 1 ? binoptab : otheroptab,
1186 target_piece, 1, next_methods);
1189 else if (target_piece != x)
1190 emit_move_insn (target_piece, x);
1194 /* THIS CODE HAS NOT BEEN TESTED. */
1195 /* Get out carry from adding/subtracting carry in. */
1196 carry_tmp = emit_store_flag_force (carry_tmp,
1197 binoptab == add_optab
1200 word_mode, 1, normalizep);
1202 /* Logical-ior the two poss. carry together. */
1203 carry_out = expand_binop (word_mode, ior_optab,
1204 carry_out, carry_tmp,
1205 carry_out, 0, next_methods);
1211 carry_in = carry_out;
1214 if (i == GET_MODE_BITSIZE (mode) / BITS_PER_WORD)
1216 if (mov_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
1218 rtx temp = emit_move_insn (target, target);
1220 set_unique_reg_note (temp,
1222 gen_rtx_fmt_ee (binoptab->code, mode,
1229 delete_insns_since (last);
1232 /* If we want to multiply two two-word values and have normal and widening
1233 multiplies of single-word values, we can do this with three smaller
1234 multiplications. Note that we do not make a REG_NO_CONFLICT block here
1235 because we are not operating on one word at a time.
1237 The multiplication proceeds as follows:
1238 _______________________
1239 [__op0_high_|__op0_low__]
1240 _______________________
1241 * [__op1_high_|__op1_low__]
1242 _______________________________________________
1243 _______________________
1244 (1) [__op0_low__*__op1_low__]
1245 _______________________
1246 (2a) [__op0_low__*__op1_high_]
1247 _______________________
1248 (2b) [__op0_high_*__op1_low__]
1249 _______________________
1250 (3) [__op0_high_*__op1_high_]
1253 This gives a 4-word result. Since we are only interested in the
1254 lower 2 words, partial result (3) and the upper words of (2a) and
1255 (2b) don't need to be calculated. Hence (2a) and (2b) can be
1256 calculated using non-widening multiplication.
1258 (1), however, needs to be calculated with an unsigned widening
1259 multiplication. If this operation is not directly supported we
1260 try using a signed widening multiplication and adjust the result.
1261 This adjustment works as follows:
1263 If both operands are positive then no adjustment is needed.
1265 If the operands have different signs, for example op0_low < 0 and
1266 op1_low >= 0, the instruction treats the most significant bit of
1267 op0_low as a sign bit instead of a bit with significance
1268 2**(BITS_PER_WORD-1), i.e. the instruction multiplies op1_low
1269 with 2**BITS_PER_WORD - op0_low, and two's complements the
1270 result. Conclusion: We need to add op1_low * 2**BITS_PER_WORD to
1273 Similarly, if both operands are negative, we need to add
1274 (op0_low + op1_low) * 2**BITS_PER_WORD.
1276 We use a trick to adjust quickly. We logically shift op0_low right
1277 (op1_low) BITS_PER_WORD-1 steps to get 0 or 1, and add this to
1278 op0_high (op1_high) before it is used to calculate 2b (2a). If no
1279 logical shift exists, we do an arithmetic right shift and subtract
1282 if (binoptab == smul_optab
1283 && class == MODE_INT
1284 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
1285 && smul_optab->handlers[(int) word_mode].insn_code != CODE_FOR_nothing
1286 && add_optab->handlers[(int) word_mode].insn_code != CODE_FOR_nothing
1287 && ((umul_widen_optab->handlers[(int) mode].insn_code
1288 != CODE_FOR_nothing)
1289 || (smul_widen_optab->handlers[(int) mode].insn_code
1290 != CODE_FOR_nothing)))
1292 int low = (WORDS_BIG_ENDIAN ? 1 : 0);
1293 int high = (WORDS_BIG_ENDIAN ? 0 : 1);
1294 rtx op0_high = operand_subword_force (op0, high, mode);
1295 rtx op0_low = operand_subword_force (op0, low, mode);
1296 rtx op1_high = operand_subword_force (op1, high, mode);
1297 rtx op1_low = operand_subword_force (op1, low, mode);
1299 rtx op0_xhigh = NULL_RTX;
1300 rtx op1_xhigh = NULL_RTX;
1302 /* If the target is the same as one of the inputs, don't use it. This
1303 prevents problems with the REG_EQUAL note. */
1304 if (target == op0 || target == op1
1305 || (target != 0 && GET_CODE (target) != REG))
1308 /* Multiply the two lower words to get a double-word product.
1309 If unsigned widening multiplication is available, use that;
1310 otherwise use the signed form and compensate. */
1312 if (umul_widen_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
1314 product = expand_binop (mode, umul_widen_optab, op0_low, op1_low,
1315 target, 1, OPTAB_DIRECT);
1317 /* If we didn't succeed, delete everything we did so far. */
1319 delete_insns_since (last);
1321 op0_xhigh = op0_high, op1_xhigh = op1_high;
1325 && smul_widen_optab->handlers[(int) mode].insn_code
1326 != CODE_FOR_nothing)
1328 rtx wordm1 = GEN_INT (BITS_PER_WORD - 1);
1329 product = expand_binop (mode, smul_widen_optab, op0_low, op1_low,
1330 target, 1, OPTAB_DIRECT);
1331 op0_xhigh = expand_binop (word_mode, lshr_optab, op0_low, wordm1,
1332 NULL_RTX, 1, next_methods);
1334 op0_xhigh = expand_binop (word_mode, add_optab, op0_high,
1335 op0_xhigh, op0_xhigh, 0, next_methods);
1338 op0_xhigh = expand_binop (word_mode, ashr_optab, op0_low, wordm1,
1339 NULL_RTX, 0, next_methods);
1341 op0_xhigh = expand_binop (word_mode, sub_optab, op0_high,
1342 op0_xhigh, op0_xhigh, 0,
1346 op1_xhigh = expand_binop (word_mode, lshr_optab, op1_low, wordm1,
1347 NULL_RTX, 1, next_methods);
1349 op1_xhigh = expand_binop (word_mode, add_optab, op1_high,
1350 op1_xhigh, op1_xhigh, 0, next_methods);
1353 op1_xhigh = expand_binop (word_mode, ashr_optab, op1_low, wordm1,
1354 NULL_RTX, 0, next_methods);
1356 op1_xhigh = expand_binop (word_mode, sub_optab, op1_high,
1357 op1_xhigh, op1_xhigh, 0,
1362 /* If we have been able to directly compute the product of the
1363 low-order words of the operands and perform any required adjustments
1364 of the operands, we proceed by trying two more multiplications
1365 and then computing the appropriate sum.
1367 We have checked above that the required addition is provided.
1368 Full-word addition will normally always succeed, especially if
1369 it is provided at all, so we don't worry about its failure. The
1370 multiplication may well fail, however, so we do handle that. */
1372 if (product && op0_xhigh && op1_xhigh)
1374 rtx product_high = operand_subword (product, high, 1, mode);
1375 rtx temp = expand_binop (word_mode, binoptab, op0_low, op1_xhigh,
1376 NULL_RTX, 0, OPTAB_DIRECT);
1379 temp = expand_binop (word_mode, add_optab, temp, product_high,
1380 product_high, 0, next_methods);
1382 if (temp != 0 && temp != product_high)
1383 emit_move_insn (product_high, temp);
1386 temp = expand_binop (word_mode, binoptab, op1_low, op0_xhigh,
1387 NULL_RTX, 0, OPTAB_DIRECT);
1390 temp = expand_binop (word_mode, add_optab, temp,
1391 product_high, product_high,
1394 if (temp != 0 && temp != product_high)
1395 emit_move_insn (product_high, temp);
1399 if (mov_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
1401 temp = emit_move_insn (product, product);
1402 set_unique_reg_note (temp,
1404 gen_rtx_fmt_ee (MULT, mode,
1412 /* If we get here, we couldn't do it for some reason even though we
1413 originally thought we could. Delete anything we've emitted in
1416 delete_insns_since (last);
1419 /* We need to open-code the complex type operations: '+, -, * and /' */
1421 /* At this point we allow operations between two similar complex
1422 numbers, and also if one of the operands is not a complex number
1423 but rather of MODE_FLOAT or MODE_INT. However, the caller
1424 must make sure that the MODE of the non-complex operand matches
1425 the SUBMODE of the complex operand. */
1427 if (class == MODE_COMPLEX_FLOAT || class == MODE_COMPLEX_INT)
1429 rtx real0 = 0, imag0 = 0;
1430 rtx real1 = 0, imag1 = 0;
1431 rtx realr, imagr, res;
1436 /* Find the correct mode for the real and imaginary parts */
1437 enum machine_mode submode
1438 = mode_for_size (GET_MODE_UNIT_SIZE (mode) * BITS_PER_UNIT,
1439 class == MODE_COMPLEX_INT ? MODE_INT : MODE_FLOAT,
1442 if (submode == BLKmode)
1446 target = gen_reg_rtx (mode);
1450 realr = gen_realpart (submode, target);
1451 imagr = gen_imagpart (submode, target);
1453 if (GET_MODE (op0) == mode)
1455 real0 = gen_realpart (submode, op0);
1456 imag0 = gen_imagpart (submode, op0);
1461 if (GET_MODE (op1) == mode)
1463 real1 = gen_realpart (submode, op1);
1464 imag1 = gen_imagpart (submode, op1);
1469 if (real0 == 0 || real1 == 0 || ! (imag0 != 0|| imag1 != 0))
1472 switch (binoptab->code)
1475 /* (a+ib) + (c+id) = (a+c) + i(b+d) */
1477 /* (a+ib) - (c+id) = (a-c) + i(b-d) */
1478 res = expand_binop (submode, binoptab, real0, real1,
1479 realr, unsignedp, methods);
1483 else if (res != realr)
1484 emit_move_insn (realr, res);
1487 res = expand_binop (submode, binoptab, imag0, imag1,
1488 imagr, unsignedp, methods);
1491 else if (binoptab->code == MINUS)
1492 res = expand_unop (submode, neg_optab, imag1, imagr, unsignedp);
1498 else if (res != imagr)
1499 emit_move_insn (imagr, res);
1505 /* (a+ib) * (c+id) = (ac-bd) + i(ad+cb) */
1511 /* Don't fetch these from memory more than once. */
1512 real0 = force_reg (submode, real0);
1513 real1 = force_reg (submode, real1);
1514 imag0 = force_reg (submode, imag0);
1515 imag1 = force_reg (submode, imag1);
1517 temp1 = expand_binop (submode, binoptab, real0, real1, NULL_RTX,
1518 unsignedp, methods);
1520 temp2 = expand_binop (submode, binoptab, imag0, imag1, NULL_RTX,
1521 unsignedp, methods);
1523 if (temp1 == 0 || temp2 == 0)
1526 res = expand_binop (submode, sub_optab, temp1, temp2,
1527 realr, unsignedp, methods);
1531 else if (res != realr)
1532 emit_move_insn (realr, res);
1534 temp1 = expand_binop (submode, binoptab, real0, imag1,
1535 NULL_RTX, unsignedp, methods);
1537 temp2 = expand_binop (submode, binoptab, real1, imag0,
1538 NULL_RTX, unsignedp, methods);
1540 if (temp1 == 0 || temp2 == 0)
1543 res = expand_binop (submode, add_optab, temp1, temp2,
1544 imagr, unsignedp, methods);
1548 else if (res != imagr)
1549 emit_move_insn (imagr, res);
1555 /* Don't fetch these from memory more than once. */
1556 real0 = force_reg (submode, real0);
1557 real1 = force_reg (submode, real1);
1559 res = expand_binop (submode, binoptab, real0, real1,
1560 realr, unsignedp, methods);
1563 else if (res != realr)
1564 emit_move_insn (realr, res);
1567 res = expand_binop (submode, binoptab,
1568 real1, imag0, imagr, unsignedp, methods);
1570 res = expand_binop (submode, binoptab,
1571 real0, imag1, imagr, unsignedp, methods);
1575 else if (res != imagr)
1576 emit_move_insn (imagr, res);
1583 /* (a+ib) / (c+id) = ((ac+bd)/(cc+dd)) + i((bc-ad)/(cc+dd)) */
1587 /* (a+ib) / (c+i0) = (a/c) + i(b/c) */
1589 /* Don't fetch these from memory more than once. */
1590 real1 = force_reg (submode, real1);
1592 /* Simply divide the real and imaginary parts by `c' */
1593 if (class == MODE_COMPLEX_FLOAT)
1594 res = expand_binop (submode, binoptab, real0, real1,
1595 realr, unsignedp, methods);
1597 res = expand_divmod (0, TRUNC_DIV_EXPR, submode,
1598 real0, real1, realr, unsignedp);
1602 else if (res != realr)
1603 emit_move_insn (realr, res);
1605 if (class == MODE_COMPLEX_FLOAT)
1606 res = expand_binop (submode, binoptab, imag0, real1,
1607 imagr, unsignedp, methods);
1609 res = expand_divmod (0, TRUNC_DIV_EXPR, submode,
1610 imag0, real1, imagr, unsignedp);
1614 else if (res != imagr)
1615 emit_move_insn (imagr, res);
1621 switch (flag_complex_divide_method)
1624 ok = expand_cmplxdiv_straight (real0, real1, imag0, imag1,
1625 realr, imagr, submode,
1631 ok = expand_cmplxdiv_wide (real0, real1, imag0, imag1,
1632 realr, imagr, submode,
1652 if (binoptab->code != UNKNOWN)
1654 = gen_rtx_fmt_ee (binoptab->code, mode,
1655 copy_rtx (op0), copy_rtx (op1));
1659 emit_no_conflict_block (seq, target, op0, op1, equiv_value);
1665 /* It can't be open-coded in this mode.
1666 Use a library call if one is available and caller says that's ok. */
1668 if (binoptab->handlers[(int) mode].libfunc
1669 && (methods == OPTAB_LIB || methods == OPTAB_LIB_WIDEN))
1673 enum machine_mode op1_mode = mode;
1680 op1_mode = word_mode;
1681 /* Specify unsigned here,
1682 since negative shift counts are meaningless. */
1683 op1x = convert_to_mode (word_mode, op1, 1);
1686 if (GET_MODE (op0) != VOIDmode
1687 && GET_MODE (op0) != mode)
1688 op0 = convert_to_mode (mode, op0, unsignedp);
1690 /* Pass 1 for NO_QUEUE so we don't lose any increments
1691 if the libcall is cse'd or moved. */
1692 value = emit_library_call_value (binoptab->handlers[(int) mode].libfunc,
1693 NULL_RTX, 1, mode, 2,
1694 op0, mode, op1x, op1_mode);
1696 insns = get_insns ();
1699 target = gen_reg_rtx (mode);
1700 emit_libcall_block (insns, target, value,
1701 gen_rtx_fmt_ee (binoptab->code, mode, op0, op1));
1706 delete_insns_since (last);
1708 /* It can't be done in this mode. Can we do it in a wider mode? */
1710 if (! (methods == OPTAB_WIDEN || methods == OPTAB_LIB_WIDEN
1711 || methods == OPTAB_MUST_WIDEN))
1713 /* Caller says, don't even try. */
1714 delete_insns_since (entry_last);
1718 /* Compute the value of METHODS to pass to recursive calls.
1719 Don't allow widening to be tried recursively. */
1721 methods = (methods == OPTAB_LIB_WIDEN ? OPTAB_LIB : OPTAB_DIRECT);
1723 /* Look for a wider mode of the same class for which it appears we can do
1726 if (class == MODE_INT || class == MODE_FLOAT || class == MODE_COMPLEX_FLOAT)
1728 for (wider_mode = GET_MODE_WIDER_MODE (mode); wider_mode != VOIDmode;
1729 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
1731 if ((binoptab->handlers[(int) wider_mode].insn_code
1732 != CODE_FOR_nothing)
1733 || (methods == OPTAB_LIB
1734 && binoptab->handlers[(int) wider_mode].libfunc))
1736 rtx xop0 = op0, xop1 = op1;
1739 /* For certain integer operations, we need not actually extend
1740 the narrow operands, as long as we will truncate
1741 the results to the same narrowness. */
1743 if ((binoptab == ior_optab || binoptab == and_optab
1744 || binoptab == xor_optab
1745 || binoptab == add_optab || binoptab == sub_optab
1746 || binoptab == smul_optab || binoptab == ashl_optab)
1747 && class == MODE_INT)
1750 xop0 = widen_operand (xop0, wider_mode, mode,
1751 unsignedp, no_extend);
1753 /* The second operand of a shift must always be extended. */
1754 xop1 = widen_operand (xop1, wider_mode, mode, unsignedp,
1755 no_extend && binoptab != ashl_optab);
1757 temp = expand_binop (wider_mode, binoptab, xop0, xop1, NULL_RTX,
1758 unsignedp, methods);
1761 if (class != MODE_INT)
1764 target = gen_reg_rtx (mode);
1765 convert_move (target, temp, 0);
1769 return gen_lowpart (mode, temp);
1772 delete_insns_since (last);
1777 delete_insns_since (entry_last);
1781 /* Expand a binary operator which has both signed and unsigned forms.
1782 UOPTAB is the optab for unsigned operations, and SOPTAB is for
1785 If we widen unsigned operands, we may use a signed wider operation instead
1786 of an unsigned wider operation, since the result would be the same. */
1789 sign_expand_binop (mode, uoptab, soptab, op0, op1, target, unsignedp, methods)
1790 enum machine_mode mode;
1791 optab uoptab, soptab;
1792 rtx op0, op1, target;
1794 enum optab_methods methods;
1797 optab direct_optab = unsignedp ? uoptab : soptab;
1798 struct optab wide_soptab;
1800 /* Do it without widening, if possible. */
1801 temp = expand_binop (mode, direct_optab, op0, op1, target,
1802 unsignedp, OPTAB_DIRECT);
1803 if (temp || methods == OPTAB_DIRECT)
1806 /* Try widening to a signed int. Make a fake signed optab that
1807 hides any signed insn for direct use. */
1808 wide_soptab = *soptab;
1809 wide_soptab.handlers[(int) mode].insn_code = CODE_FOR_nothing;
1810 wide_soptab.handlers[(int) mode].libfunc = 0;
1812 temp = expand_binop (mode, &wide_soptab, op0, op1, target,
1813 unsignedp, OPTAB_WIDEN);
1815 /* For unsigned operands, try widening to an unsigned int. */
1816 if (temp == 0 && unsignedp)
1817 temp = expand_binop (mode, uoptab, op0, op1, target,
1818 unsignedp, OPTAB_WIDEN);
1819 if (temp || methods == OPTAB_WIDEN)
1822 /* Use the right width lib call if that exists. */
1823 temp = expand_binop (mode, direct_optab, op0, op1, target, unsignedp, OPTAB_LIB);
1824 if (temp || methods == OPTAB_LIB)
1827 /* Must widen and use a lib call, use either signed or unsigned. */
1828 temp = expand_binop (mode, &wide_soptab, op0, op1, target,
1829 unsignedp, methods);
1833 return expand_binop (mode, uoptab, op0, op1, target,
1834 unsignedp, methods);
1838 /* Generate code to perform an operation specified by BINOPTAB
1839 on operands OP0 and OP1, with two results to TARG1 and TARG2.
1840 We assume that the order of the operands for the instruction
1841 is TARG0, OP0, OP1, TARG1, which would fit a pattern like
1842 [(set TARG0 (operate OP0 OP1)) (set TARG1 (operate ...))].
1844 Either TARG0 or TARG1 may be zero, but what that means is that
1845 the result is not actually wanted. We will generate it into
1846 a dummy pseudo-reg and discard it. They may not both be zero.
1848 Returns 1 if this operation can be performed; 0 if not. */
1851 expand_twoval_binop (binoptab, op0, op1, targ0, targ1, unsignedp)
1857 enum machine_mode mode = GET_MODE (targ0 ? targ0 : targ1);
1858 enum mode_class class;
1859 enum machine_mode wider_mode;
1860 rtx entry_last = get_last_insn ();
1863 class = GET_MODE_CLASS (mode);
1865 op0 = protect_from_queue (op0, 0);
1866 op1 = protect_from_queue (op1, 0);
1870 op0 = force_not_mem (op0);
1871 op1 = force_not_mem (op1);
1874 /* If we are inside an appropriately-short loop and one operand is an
1875 expensive constant, force it into a register. */
1876 if (CONSTANT_P (op0) && preserve_subexpressions_p ()
1877 && rtx_cost (op0, binoptab->code) > 2)
1878 op0 = force_reg (mode, op0);
1880 if (CONSTANT_P (op1) && preserve_subexpressions_p ()
1881 && rtx_cost (op1, binoptab->code) > 2)
1882 op1 = force_reg (mode, op1);
1885 targ0 = protect_from_queue (targ0, 1);
1887 targ0 = gen_reg_rtx (mode);
1889 targ1 = protect_from_queue (targ1, 1);
1891 targ1 = gen_reg_rtx (mode);
1893 /* Record where to go back to if we fail. */
1894 last = get_last_insn ();
1896 if (binoptab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
1898 int icode = (int) binoptab->handlers[(int) mode].insn_code;
1899 enum machine_mode mode0 = insn_operand_mode[icode][1];
1900 enum machine_mode mode1 = insn_operand_mode[icode][2];
1902 rtx xop0 = op0, xop1 = op1;
1904 /* In case this insn wants input operands in modes different from the
1905 result, convert the operands. */
1906 if (GET_MODE (op0) != VOIDmode && GET_MODE (op0) != mode0)
1907 xop0 = convert_to_mode (mode0, xop0, unsignedp);
1909 if (GET_MODE (op1) != VOIDmode && GET_MODE (op1) != mode1)
1910 xop1 = convert_to_mode (mode1, xop1, unsignedp);
1912 /* Now, if insn doesn't accept these operands, put them into pseudos. */
1913 if (! (*insn_operand_predicate[icode][1]) (xop0, mode0))
1914 xop0 = copy_to_mode_reg (mode0, xop0);
1916 if (! (*insn_operand_predicate[icode][2]) (xop1, mode1))
1917 xop1 = copy_to_mode_reg (mode1, xop1);
1919 /* We could handle this, but we should always be called with a pseudo
1920 for our targets and all insns should take them as outputs. */
1921 if (! (*insn_operand_predicate[icode][0]) (targ0, mode)
1922 || ! (*insn_operand_predicate[icode][3]) (targ1, mode))
1925 pat = GEN_FCN (icode) (targ0, xop0, xop1, targ1);
1932 delete_insns_since (last);
1935 /* It can't be done in this mode. Can we do it in a wider mode? */
1937 if (class == MODE_INT || class == MODE_FLOAT || class == MODE_COMPLEX_FLOAT)
1939 for (wider_mode = GET_MODE_WIDER_MODE (mode); wider_mode != VOIDmode;
1940 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
1942 if (binoptab->handlers[(int) wider_mode].insn_code
1943 != CODE_FOR_nothing)
1945 register rtx t0 = gen_reg_rtx (wider_mode);
1946 register rtx t1 = gen_reg_rtx (wider_mode);
1948 if (expand_twoval_binop (binoptab,
1949 convert_modes (wider_mode, mode, op0,
1951 convert_modes (wider_mode, mode, op1,
1955 convert_move (targ0, t0, unsignedp);
1956 convert_move (targ1, t1, unsignedp);
1960 delete_insns_since (last);
1965 delete_insns_since (entry_last);
1969 /* Generate code to perform an operation specified by UNOPTAB
1970 on operand OP0, with result having machine-mode MODE.
1972 UNSIGNEDP is for the case where we have to widen the operands
1973 to perform the operation. It says to use zero-extension.
1975 If TARGET is nonzero, the value
1976 is generated there, if it is convenient to do so.
1977 In all cases an rtx is returned for the locus of the value;
1978 this may or may not be TARGET. */
1981 expand_unop (mode, unoptab, op0, target, unsignedp)
1982 enum machine_mode mode;
1988 enum mode_class class;
1989 enum machine_mode wider_mode;
1991 rtx last = get_last_insn ();
1994 class = GET_MODE_CLASS (mode);
1996 op0 = protect_from_queue (op0, 0);
2000 op0 = force_not_mem (op0);
2004 target = protect_from_queue (target, 1);
2006 if (unoptab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
2008 int icode = (int) unoptab->handlers[(int) mode].insn_code;
2009 enum machine_mode mode0 = insn_operand_mode[icode][1];
2015 temp = gen_reg_rtx (mode);
2017 if (GET_MODE (xop0) != VOIDmode
2018 && GET_MODE (xop0) != mode0)
2019 xop0 = convert_to_mode (mode0, xop0, unsignedp);
2021 /* Now, if insn doesn't accept our operand, put it into a pseudo. */
2023 if (! (*insn_operand_predicate[icode][1]) (xop0, mode0))
2024 xop0 = copy_to_mode_reg (mode0, xop0);
2026 if (! (*insn_operand_predicate[icode][0]) (temp, mode))
2027 temp = gen_reg_rtx (mode);
2029 pat = GEN_FCN (icode) (temp, xop0);
2032 if (GET_CODE (pat) == SEQUENCE
2033 && ! add_equal_note (pat, temp, unoptab->code, xop0, NULL_RTX))
2035 delete_insns_since (last);
2036 return expand_unop (mode, unoptab, op0, NULL_RTX, unsignedp);
2044 delete_insns_since (last);
2047 /* It can't be done in this mode. Can we open-code it in a wider mode? */
2049 if (class == MODE_INT || class == MODE_FLOAT || class == MODE_COMPLEX_FLOAT)
2050 for (wider_mode = GET_MODE_WIDER_MODE (mode); wider_mode != VOIDmode;
2051 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
2053 if (unoptab->handlers[(int) wider_mode].insn_code != CODE_FOR_nothing)
2057 /* For certain operations, we need not actually extend
2058 the narrow operand, as long as we will truncate the
2059 results to the same narrowness. */
2061 xop0 = widen_operand (xop0, wider_mode, mode, unsignedp,
2062 (unoptab == neg_optab
2063 || unoptab == one_cmpl_optab)
2064 && class == MODE_INT);
2066 temp = expand_unop (wider_mode, unoptab, xop0, NULL_RTX,
2071 if (class != MODE_INT)
2074 target = gen_reg_rtx (mode);
2075 convert_move (target, temp, 0);
2079 return gen_lowpart (mode, temp);
2082 delete_insns_since (last);
2086 /* These can be done a word at a time. */
2087 if (unoptab == one_cmpl_optab
2088 && class == MODE_INT
2089 && GET_MODE_SIZE (mode) > UNITS_PER_WORD
2090 && unoptab->handlers[(int) word_mode].insn_code != CODE_FOR_nothing)
2095 if (target == 0 || target == op0)
2096 target = gen_reg_rtx (mode);
2100 /* Do the actual arithmetic. */
2101 for (i = 0; i < GET_MODE_BITSIZE (mode) / BITS_PER_WORD; i++)
2103 rtx target_piece = operand_subword (target, i, 1, mode);
2104 rtx x = expand_unop (word_mode, unoptab,
2105 operand_subword_force (op0, i, mode),
2106 target_piece, unsignedp);
2107 if (target_piece != x)
2108 emit_move_insn (target_piece, x);
2111 insns = get_insns ();
2114 emit_no_conflict_block (insns, target, op0, NULL_RTX,
2115 gen_rtx_fmt_e (unoptab->code, mode,
2120 /* Open-code the complex negation operation. */
2121 else if (unoptab == neg_optab
2122 && (class == MODE_COMPLEX_FLOAT || class == MODE_COMPLEX_INT))
2128 /* Find the correct mode for the real and imaginary parts */
2129 enum machine_mode submode
2130 = mode_for_size (GET_MODE_UNIT_SIZE (mode) * BITS_PER_UNIT,
2131 class == MODE_COMPLEX_INT ? MODE_INT : MODE_FLOAT,
2134 if (submode == BLKmode)
2138 target = gen_reg_rtx (mode);
2142 target_piece = gen_imagpart (submode, target);
2143 x = expand_unop (submode, unoptab,
2144 gen_imagpart (submode, op0),
2145 target_piece, unsignedp);
2146 if (target_piece != x)
2147 emit_move_insn (target_piece, x);
2149 target_piece = gen_realpart (submode, target);
2150 x = expand_unop (submode, unoptab,
2151 gen_realpart (submode, op0),
2152 target_piece, unsignedp);
2153 if (target_piece != x)
2154 emit_move_insn (target_piece, x);
2159 emit_no_conflict_block (seq, target, op0, 0,
2160 gen_rtx_fmt_e (unoptab->code, mode,
2165 /* Now try a library call in this mode. */
2166 if (unoptab->handlers[(int) mode].libfunc)
2173 /* Pass 1 for NO_QUEUE so we don't lose any increments
2174 if the libcall is cse'd or moved. */
2175 value = emit_library_call_value (unoptab->handlers[(int) mode].libfunc,
2176 NULL_RTX, 1, mode, 1, op0, mode);
2177 insns = get_insns ();
2180 target = gen_reg_rtx (mode);
2181 emit_libcall_block (insns, target, value,
2182 gen_rtx_fmt_e (unoptab->code, mode, op0));
2187 /* It can't be done in this mode. Can we do it in a wider mode? */
2189 if (class == MODE_INT || class == MODE_FLOAT || class == MODE_COMPLEX_FLOAT)
2191 for (wider_mode = GET_MODE_WIDER_MODE (mode); wider_mode != VOIDmode;
2192 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
2194 if ((unoptab->handlers[(int) wider_mode].insn_code
2195 != CODE_FOR_nothing)
2196 || unoptab->handlers[(int) wider_mode].libfunc)
2200 /* For certain operations, we need not actually extend
2201 the narrow operand, as long as we will truncate the
2202 results to the same narrowness. */
2204 xop0 = widen_operand (xop0, wider_mode, mode, unsignedp,
2205 (unoptab == neg_optab
2206 || unoptab == one_cmpl_optab)
2207 && class == MODE_INT);
2209 temp = expand_unop (wider_mode, unoptab, xop0, NULL_RTX,
2214 if (class != MODE_INT)
2217 target = gen_reg_rtx (mode);
2218 convert_move (target, temp, 0);
2222 return gen_lowpart (mode, temp);
2225 delete_insns_since (last);
2230 /* If there is no negate operation, try doing a subtract from zero.
2231 The US Software GOFAST library needs this. */
2232 if (unoptab == neg_optab)
2235 temp = expand_binop (mode, sub_optab, CONST0_RTX (mode), op0,
2236 target, unsignedp, OPTAB_LIB_WIDEN);
2244 /* Emit code to compute the absolute value of OP0, with result to
2245 TARGET if convenient. (TARGET may be 0.) The return value says
2246 where the result actually is to be found.
2248 MODE is the mode of the operand; the mode of the result is
2249 different but can be deduced from MODE.
2254 expand_abs (mode, op0, target, safe)
2255 enum machine_mode mode;
2262 /* First try to do it with a special abs instruction. */
2263 temp = expand_unop (mode, abs_optab, op0, target, 0);
2267 /* If this machine has expensive jumps, we can do integer absolute
2268 value of X as (((signed) x >> (W-1)) ^ x) - ((signed) x >> (W-1)),
2269 where W is the width of MODE. */
2271 if (GET_MODE_CLASS (mode) == MODE_INT && BRANCH_COST >= 2)
2273 rtx extended = expand_shift (RSHIFT_EXPR, mode, op0,
2274 size_int (GET_MODE_BITSIZE (mode) - 1),
2277 temp = expand_binop (mode, xor_optab, extended, op0, target, 0,
2280 temp = expand_binop (mode, sub_optab, temp, extended, target, 0,
2287 /* If that does not win, use conditional jump and negate. */
2289 /* It is safe to use the target if it is the same
2290 as the source if this is also a pseudo register */
2291 if (op0 == target && GET_CODE (op0) == REG
2292 && REGNO (op0) >= FIRST_PSEUDO_REGISTER)
2295 op1 = gen_label_rtx ();
2296 if (target == 0 || ! safe
2297 || GET_MODE (target) != mode
2298 || (GET_CODE (target) == MEM && MEM_VOLATILE_P (target))
2299 || (GET_CODE (target) == REG
2300 && REGNO (target) < FIRST_PSEUDO_REGISTER))
2301 target = gen_reg_rtx (mode);
2303 emit_move_insn (target, op0);
2306 /* If this mode is an integer too wide to compare properly,
2307 compare word by word. Rely on CSE to optimize constant cases. */
2308 if (GET_MODE_CLASS (mode) == MODE_INT && ! can_compare_p (mode))
2309 do_jump_by_parts_greater_rtx (mode, 0, target, const0_rtx,
2312 do_compare_rtx_and_jump (target, CONST0_RTX (mode), GE, 0, mode,
2313 NULL_RTX, 0, NULL_RTX, op1);
2315 op0 = expand_unop (mode, neg_optab, target, target, 0);
2317 emit_move_insn (target, op0);
2323 /* Emit code to compute the absolute value of OP0, with result to
2324 TARGET if convenient. (TARGET may be 0.) The return value says
2325 where the result actually is to be found.
2327 MODE is the mode of the operand; the mode of the result is
2328 different but can be deduced from MODE.
2330 UNSIGNEDP is relevant for complex integer modes. */
2333 expand_complex_abs (mode, op0, target, unsignedp)
2334 enum machine_mode mode;
2339 enum mode_class class = GET_MODE_CLASS (mode);
2340 enum machine_mode wider_mode;
2342 rtx entry_last = get_last_insn ();
2346 /* Find the correct mode for the real and imaginary parts. */
2347 enum machine_mode submode
2348 = mode_for_size (GET_MODE_UNIT_SIZE (mode) * BITS_PER_UNIT,
2349 class == MODE_COMPLEX_INT ? MODE_INT : MODE_FLOAT,
2352 if (submode == BLKmode)
2355 op0 = protect_from_queue (op0, 0);
2359 op0 = force_not_mem (op0);
2362 last = get_last_insn ();
2365 target = protect_from_queue (target, 1);
2367 if (abs_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
2369 int icode = (int) abs_optab->handlers[(int) mode].insn_code;
2370 enum machine_mode mode0 = insn_operand_mode[icode][1];
2376 temp = gen_reg_rtx (submode);
2378 if (GET_MODE (xop0) != VOIDmode
2379 && GET_MODE (xop0) != mode0)
2380 xop0 = convert_to_mode (mode0, xop0, unsignedp);
2382 /* Now, if insn doesn't accept our operand, put it into a pseudo. */
2384 if (! (*insn_operand_predicate[icode][1]) (xop0, mode0))
2385 xop0 = copy_to_mode_reg (mode0, xop0);
2387 if (! (*insn_operand_predicate[icode][0]) (temp, submode))
2388 temp = gen_reg_rtx (submode);
2390 pat = GEN_FCN (icode) (temp, xop0);
2393 if (GET_CODE (pat) == SEQUENCE
2394 && ! add_equal_note (pat, temp, abs_optab->code, xop0, NULL_RTX))
2396 delete_insns_since (last);
2397 return expand_unop (mode, abs_optab, op0, NULL_RTX, unsignedp);
2405 delete_insns_since (last);
2408 /* It can't be done in this mode. Can we open-code it in a wider mode? */
2410 for (wider_mode = GET_MODE_WIDER_MODE (mode); wider_mode != VOIDmode;
2411 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
2413 if (abs_optab->handlers[(int) wider_mode].insn_code != CODE_FOR_nothing)
2417 xop0 = convert_modes (wider_mode, mode, xop0, unsignedp);
2418 temp = expand_complex_abs (wider_mode, xop0, NULL_RTX, unsignedp);
2422 if (class != MODE_COMPLEX_INT)
2425 target = gen_reg_rtx (submode);
2426 convert_move (target, temp, 0);
2430 return gen_lowpart (submode, temp);
2433 delete_insns_since (last);
2437 /* Open-code the complex absolute-value operation
2438 if we can open-code sqrt. Otherwise it's not worth while. */
2439 if (sqrt_optab->handlers[(int) submode].insn_code != CODE_FOR_nothing)
2441 rtx real, imag, total;
2443 real = gen_realpart (submode, op0);
2444 imag = gen_imagpart (submode, op0);
2446 /* Square both parts. */
2447 real = expand_mult (submode, real, real, NULL_RTX, 0);
2448 imag = expand_mult (submode, imag, imag, NULL_RTX, 0);
2450 /* Sum the parts. */
2451 total = expand_binop (submode, add_optab, real, imag, NULL_RTX,
2452 0, OPTAB_LIB_WIDEN);
2454 /* Get sqrt in TARGET. Set TARGET to where the result is. */
2455 target = expand_unop (submode, sqrt_optab, total, target, 0);
2457 delete_insns_since (last);
2462 /* Now try a library call in this mode. */
2463 if (abs_optab->handlers[(int) mode].libfunc)
2470 /* Pass 1 for NO_QUEUE so we don't lose any increments
2471 if the libcall is cse'd or moved. */
2472 value = emit_library_call_value (abs_optab->handlers[(int) mode].libfunc,
2473 NULL_RTX, 1, submode, 1, op0, mode);
2474 insns = get_insns ();
2477 target = gen_reg_rtx (submode);
2478 emit_libcall_block (insns, target, value,
2479 gen_rtx_fmt_e (abs_optab->code, mode, op0));
2484 /* It can't be done in this mode. Can we do it in a wider mode? */
2486 for (wider_mode = GET_MODE_WIDER_MODE (mode); wider_mode != VOIDmode;
2487 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
2489 if ((abs_optab->handlers[(int) wider_mode].insn_code
2490 != CODE_FOR_nothing)
2491 || abs_optab->handlers[(int) wider_mode].libfunc)
2495 xop0 = convert_modes (wider_mode, mode, xop0, unsignedp);
2497 temp = expand_complex_abs (wider_mode, xop0, NULL_RTX, unsignedp);
2501 if (class != MODE_COMPLEX_INT)
2504 target = gen_reg_rtx (submode);
2505 convert_move (target, temp, 0);
2509 return gen_lowpart (submode, temp);
2512 delete_insns_since (last);
2516 delete_insns_since (entry_last);
2520 /* Generate an instruction whose insn-code is INSN_CODE,
2521 with two operands: an output TARGET and an input OP0.
2522 TARGET *must* be nonzero, and the output is always stored there.
2523 CODE is an rtx code such that (CODE OP0) is an rtx that describes
2524 the value that is stored into TARGET. */
2527 emit_unop_insn (icode, target, op0, code)
2534 enum machine_mode mode0 = insn_operand_mode[icode][1];
2537 temp = target = protect_from_queue (target, 1);
2539 op0 = protect_from_queue (op0, 0);
2541 /* Sign and zero extension from memory is often done specially on
2542 RISC machines, so forcing into a register here can pessimize
2544 if (flag_force_mem && code != SIGN_EXTEND && code != ZERO_EXTEND)
2545 op0 = force_not_mem (op0);
2547 /* Now, if insn does not accept our operands, put them into pseudos. */
2549 if (! (*insn_operand_predicate[icode][1]) (op0, mode0))
2550 op0 = copy_to_mode_reg (mode0, op0);
2552 if (! (*insn_operand_predicate[icode][0]) (temp, GET_MODE (temp))
2553 || (flag_force_mem && GET_CODE (temp) == MEM))
2554 temp = gen_reg_rtx (GET_MODE (temp));
2556 pat = GEN_FCN (icode) (temp, op0);
2558 if (GET_CODE (pat) == SEQUENCE && code != UNKNOWN)
2559 add_equal_note (pat, temp, code, op0, NULL_RTX);
2564 emit_move_insn (target, temp);
2567 /* Emit code to perform a series of operations on a multi-word quantity, one
2570 Such a block is preceded by a CLOBBER of the output, consists of multiple
2571 insns, each setting one word of the output, and followed by a SET copying
2572 the output to itself.
2574 Each of the insns setting words of the output receives a REG_NO_CONFLICT
2575 note indicating that it doesn't conflict with the (also multi-word)
2576 inputs. The entire block is surrounded by REG_LIBCALL and REG_RETVAL
2579 INSNS is a block of code generated to perform the operation, not including
2580 the CLOBBER and final copy. All insns that compute intermediate values
2581 are first emitted, followed by the block as described above.
2583 TARGET, OP0, and OP1 are the output and inputs of the operations,
2584 respectively. OP1 may be zero for a unary operation.
2586 EQUIV, if non-zero, is an expression to be placed into a REG_EQUAL note
2589 If TARGET is not a register, INSNS is simply emitted with no special
2590 processing. Likewise if anything in INSNS is not an INSN or if
2591 there is a libcall block inside INSNS.
2593 The final insn emitted is returned. */
2596 emit_no_conflict_block (insns, target, op0, op1, equiv)
2602 rtx prev, next, first, last, insn;
2604 if (GET_CODE (target) != REG || reload_in_progress)
2605 return emit_insns (insns);
2607 for (insn = insns; insn; insn = NEXT_INSN (insn))
2608 if (GET_CODE (insn) != INSN
2609 || find_reg_note (insn, REG_LIBCALL, NULL_RTX))
2610 return emit_insns (insns);
2612 /* First emit all insns that do not store into words of the output and remove
2613 these from the list. */
2614 for (insn = insns; insn; insn = next)
2619 next = NEXT_INSN (insn);
2621 if (GET_CODE (PATTERN (insn)) == SET)
2622 set = PATTERN (insn);
2623 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
2625 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
2626 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET)
2628 set = XVECEXP (PATTERN (insn), 0, i);
2636 if (! reg_overlap_mentioned_p (target, SET_DEST (set)))
2638 if (PREV_INSN (insn))
2639 NEXT_INSN (PREV_INSN (insn)) = next;
2644 PREV_INSN (next) = PREV_INSN (insn);
2650 prev = get_last_insn ();
2652 /* Now write the CLOBBER of the output, followed by the setting of each
2653 of the words, followed by the final copy. */
2654 if (target != op0 && target != op1)
2655 emit_insn (gen_rtx_CLOBBER (VOIDmode, target));
2657 for (insn = insns; insn; insn = next)
2659 next = NEXT_INSN (insn);
2662 if (op1 && GET_CODE (op1) == REG)
2663 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_NO_CONFLICT, op1,
2666 if (op0 && GET_CODE (op0) == REG)
2667 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_NO_CONFLICT, op0,
2671 if (mov_optab->handlers[(int) GET_MODE (target)].insn_code
2672 != CODE_FOR_nothing)
2674 last = emit_move_insn (target, target);
2676 set_unique_reg_note (last, REG_EQUAL, equiv);
2679 last = get_last_insn ();
2682 first = get_insns ();
2684 first = NEXT_INSN (prev);
2686 /* Encapsulate the block so it gets manipulated as a unit. */
2687 REG_NOTES (first) = gen_rtx_INSN_LIST (REG_LIBCALL, last,
2689 REG_NOTES (last) = gen_rtx_INSN_LIST (REG_RETVAL, first, REG_NOTES (last));
2694 /* Emit code to make a call to a constant function or a library call.
2696 INSNS is a list containing all insns emitted in the call.
2697 These insns leave the result in RESULT. Our block is to copy RESULT
2698 to TARGET, which is logically equivalent to EQUIV.
2700 We first emit any insns that set a pseudo on the assumption that these are
2701 loading constants into registers; doing so allows them to be safely cse'ed
2702 between blocks. Then we emit all the other insns in the block, followed by
2703 an insn to move RESULT to TARGET. This last insn will have a REQ_EQUAL
2704 note with an operand of EQUIV.
2706 Moving assignments to pseudos outside of the block is done to improve
2707 the generated code, but is not required to generate correct code,
2708 hence being unable to move an assignment is not grounds for not making
2709 a libcall block. There are two reasons why it is safe to leave these
2710 insns inside the block: First, we know that these pseudos cannot be
2711 used in generated RTL outside the block since they are created for
2712 temporary purposes within the block. Second, CSE will not record the
2713 values of anything set inside a libcall block, so we know they must
2714 be dead at the end of the block.
2716 Except for the first group of insns (the ones setting pseudos), the
2717 block is delimited by REG_RETVAL and REG_LIBCALL notes. */
2720 emit_libcall_block (insns, target, result, equiv)
2726 rtx prev, next, first, last, insn;
2728 /* look for any CALL_INSNs in this sequence, and attach a REG_EH_REGION
2729 reg note to indicate that this call cannot throw. (Unless there is
2730 already a REG_EH_REGION note.) */
2732 for (insn = insns; insn; insn = NEXT_INSN (insn))
2734 if (GET_CODE (insn) == CALL_INSN)
2736 rtx note = find_reg_note (insn, REG_EH_REGION, NULL_RTX);
2737 if (note == NULL_RTX)
2738 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_EH_REGION, GEN_INT (-1),
2743 /* First emit all insns that set pseudos. Remove them from the list as
2744 we go. Avoid insns that set pseudos which were referenced in previous
2745 insns. These can be generated by move_by_pieces, for example,
2746 to update an address. Similarly, avoid insns that reference things
2747 set in previous insns. */
2749 for (insn = insns; insn; insn = next)
2751 rtx set = single_set (insn);
2753 next = NEXT_INSN (insn);
2755 if (set != 0 && GET_CODE (SET_DEST (set)) == REG
2756 && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER
2758 || (! reg_mentioned_p (SET_DEST (set), PATTERN (insns))
2759 && ! reg_used_between_p (SET_DEST (set), insns, insn)
2760 && ! modified_in_p (SET_SRC (set), insns)
2761 && ! modified_between_p (SET_SRC (set), insns, insn))))
2763 if (PREV_INSN (insn))
2764 NEXT_INSN (PREV_INSN (insn)) = next;
2769 PREV_INSN (next) = PREV_INSN (insn);
2775 prev = get_last_insn ();
2777 /* Write the remaining insns followed by the final copy. */
2779 for (insn = insns; insn; insn = next)
2781 next = NEXT_INSN (insn);
2786 last = emit_move_insn (target, result);
2787 if (mov_optab->handlers[(int) GET_MODE (target)].insn_code
2788 != CODE_FOR_nothing)
2789 set_unique_reg_note (last, REG_EQUAL, copy_rtx (equiv));
2792 first = get_insns ();
2794 first = NEXT_INSN (prev);
2796 /* Encapsulate the block so it gets manipulated as a unit. */
2797 REG_NOTES (first) = gen_rtx_INSN_LIST (REG_LIBCALL, last,
2799 REG_NOTES (last) = gen_rtx_INSN_LIST (REG_RETVAL, first, REG_NOTES (last));
2802 /* Generate code to store zero in X. */
2808 emit_move_insn (x, const0_rtx);
2811 /* Generate code to store 1 in X
2812 assuming it contains zero beforehand. */
2815 emit_0_to_1_insn (x)
2818 emit_move_insn (x, const1_rtx);
2821 /* Nonzero if we can perform a comparison of mode MODE for a conditional jump
2822 straightforwardly. */
2825 cmp_available_p (mode, code, can_use_tst_p)
2826 enum machine_mode mode;
2832 if (cmp_optab->handlers[(int)mode].insn_code != CODE_FOR_nothing
2834 && tst_optab->handlers[(int)mode].insn_code != CODE_FOR_nothing))
2836 mode = GET_MODE_WIDER_MODE (mode);
2837 } while (mode != VOIDmode);
2842 /* This function is called when we are going to emit a compare instruction that
2843 compares the values found in *PX and *PY, using the rtl operator COMPARISON.
2845 *PMODE is the mode of the inputs (in case they are const_int).
2846 *PUNSIGNEDP nonzero says that the operands are unsigned;
2847 this matters if they need to be widened.
2849 If they have mode BLKmode, then SIZE specifies the size of both operands,
2850 and ALIGN specifies the known shared alignment of the operands.
2852 This function performs all the setup necessary so that the caller only has
2853 to emit a single comparison insn. This setup can involve doing a BLKmode
2854 comparison or emitting a library call to perform the comparison if no insn
2855 is available to handle it.
2856 The values which are passed in through pointers can be modified; the caller
2857 should perform the comparison on the modified values. */
2860 prepare_cmp_insn (px, py, pcomparison, size, pmode, punsignedp, align)
2862 enum rtx_code *pcomparison;
2864 enum machine_mode *pmode;
2868 enum rtx_code comparison = *pcomparison;
2869 enum machine_mode mode = *pmode;
2870 rtx x = *px, y = *py;
2871 int unsignedp = *punsignedp;
2872 enum mode_class class;
2874 class = GET_MODE_CLASS (mode);
2876 /* They could both be VOIDmode if both args are immediate constants,
2877 but we should fold that at an earlier stage.
2878 With no special code here, this will call abort,
2879 reminding the programmer to implement such folding. */
2881 if (mode != BLKmode && flag_force_mem)
2883 x = force_not_mem (x);
2884 y = force_not_mem (y);
2887 /* If we are inside an appropriately-short loop and one operand is an
2888 expensive constant, force it into a register. */
2889 if (CONSTANT_P (x) && preserve_subexpressions_p () && rtx_cost (x, COMPARE) > 2)
2890 x = force_reg (mode, x);
2892 if (CONSTANT_P (y) && preserve_subexpressions_p () && rtx_cost (y, COMPARE) > 2)
2893 y = force_reg (mode, y);
2896 /* Abort if we have a non-canonical comparison. The RTL documentation
2897 states that canonical comparisons are required only for targets which
2899 if (CONSTANT_P (x) && ! CONSTANT_P (y))
2903 /* Don't let both operands fail to indicate the mode. */
2904 if (GET_MODE (x) == VOIDmode && GET_MODE (y) == VOIDmode)
2905 x = force_reg (mode, x);
2907 /* Handle all BLKmode compares. */
2909 if (mode == BLKmode)
2912 enum machine_mode result_mode;
2915 x = protect_from_queue (x, 0);
2916 y = protect_from_queue (y, 0);
2920 #ifdef HAVE_cmpstrqi
2922 && GET_CODE (size) == CONST_INT
2923 && INTVAL (size) < (1 << GET_MODE_BITSIZE (QImode)))
2925 result_mode = insn_operand_mode[(int) CODE_FOR_cmpstrqi][0];
2926 result = gen_reg_rtx (result_mode);
2927 emit_insn (gen_cmpstrqi (result, x, y, size, GEN_INT (align)));
2931 #ifdef HAVE_cmpstrhi
2933 && GET_CODE (size) == CONST_INT
2934 && INTVAL (size) < (1 << GET_MODE_BITSIZE (HImode)))
2936 result_mode = insn_operand_mode[(int) CODE_FOR_cmpstrhi][0];
2937 result = gen_reg_rtx (result_mode);
2938 emit_insn (gen_cmpstrhi (result, x, y, size, GEN_INT (align)));
2942 #ifdef HAVE_cmpstrsi
2945 result_mode = insn_operand_mode[(int) CODE_FOR_cmpstrsi][0];
2946 result = gen_reg_rtx (result_mode);
2947 size = protect_from_queue (size, 0);
2948 emit_insn (gen_cmpstrsi (result, x, y,
2949 convert_to_mode (SImode, size, 1),
2955 #ifdef TARGET_MEM_FUNCTIONS
2956 emit_library_call (memcmp_libfunc, 0,
2957 TYPE_MODE (integer_type_node), 3,
2958 XEXP (x, 0), Pmode, XEXP (y, 0), Pmode,
2959 convert_to_mode (TYPE_MODE (sizetype), size,
2960 TREE_UNSIGNED (sizetype)),
2961 TYPE_MODE (sizetype));
2963 emit_library_call (bcmp_libfunc, 0,
2964 TYPE_MODE (integer_type_node), 3,
2965 XEXP (x, 0), Pmode, XEXP (y, 0), Pmode,
2966 convert_to_mode (TYPE_MODE (integer_type_node),
2968 TREE_UNSIGNED (integer_type_node)),
2969 TYPE_MODE (integer_type_node));
2972 /* Immediately move the result of the libcall into a pseudo
2973 register so reload doesn't clobber the value if it needs
2974 the return register for a spill reg. */
2975 result = gen_reg_rtx (TYPE_MODE (integer_type_node));
2976 result_mode = TYPE_MODE (integer_type_node);
2977 emit_move_insn (result,
2978 hard_libcall_value (result_mode));
2982 *pmode = result_mode;
2988 if (cmp_available_p (mode, comparison, y == CONST0_RTX (mode)))
2991 /* Handle a lib call just for the mode we are using. */
2993 if (cmp_optab->handlers[(int) mode].libfunc && class != MODE_FLOAT)
2995 rtx libfunc = cmp_optab->handlers[(int) mode].libfunc;
2998 /* If we want unsigned, and this mode has a distinct unsigned
2999 comparison routine, use that. */
3000 if (unsignedp && ucmp_optab->handlers[(int) mode].libfunc)
3001 libfunc = ucmp_optab->handlers[(int) mode].libfunc;
3003 emit_library_call (libfunc, 1,
3004 word_mode, 2, x, mode, y, mode);
3006 /* Immediately move the result of the libcall into a pseudo
3007 register so reload doesn't clobber the value if it needs
3008 the return register for a spill reg. */
3009 result = gen_reg_rtx (word_mode);
3010 emit_move_insn (result, hard_libcall_value (word_mode));
3012 /* Integer comparison returns a result that must be compared against 1,
3013 so that even if we do an unsigned compare afterward,
3014 there is still a value that can represent the result "less than". */
3021 if (class == MODE_FLOAT)
3022 prepare_float_lib_cmp (px, py, pcomparison, pmode, punsignedp);
3028 /* Before emitting an insn with code ICODE, make sure that X, which is going
3029 to be used for operand OPNUM of the insn, is converted from mode MODE to
3030 WIDER_MODE (UNSIGNEDP determines whether it is a unsigned conversion), and
3031 that it is accepted by the operand predicate. Return the new value. */
3033 prepare_operand (icode, x, opnum, mode, wider_mode, unsignedp)
3037 enum machine_mode mode, wider_mode;
3040 x = protect_from_queue (x, 0);
3042 if (mode != wider_mode)
3043 x = convert_modes (wider_mode, mode, x, unsignedp);
3045 if (! (*insn_operand_predicate[icode][opnum])
3046 (x, insn_operand_mode[icode][opnum]))
3047 x = copy_to_mode_reg (insn_operand_mode[icode][opnum], x);
3051 /* Subroutine of emit_cmp_and_jump_insns; this function is called when we know
3052 we can do the comparison.
3053 The arguments are the same as for emit_cmp_and_jump_insns; but LABEL may
3054 be NULL_RTX which indicates that only a comparison is to be generated. */
3057 emit_cmp_and_jump_insn_1 (x, y, mode, comparison, unsignedp, label)
3059 enum machine_mode mode;
3060 enum rtx_code comparison;
3064 rtx test = gen_rtx_fmt_ee (comparison, mode, x, y);
3065 enum mode_class class = GET_MODE_CLASS (mode);
3066 enum machine_mode wider_mode = mode;
3068 /* Try combined insns first. */
3071 enum insn_code icode;
3072 PUT_MODE (test, wider_mode);
3074 /* Handle some compares against zero. */
3075 icode = (int) tst_optab->handlers[(int) wider_mode].insn_code;
3076 if (y == CONST0_RTX (mode) && icode != CODE_FOR_nothing)
3078 x = prepare_operand (icode, x, 0, mode, wider_mode, unsignedp);
3079 emit_insn (GEN_FCN (icode) (x));
3081 emit_jump_insn ((*bcc_gen_fctn[(int) comparison]) (label));
3085 /* Handle compares for which there is a directly suitable insn. */
3087 icode = (int) cmp_optab->handlers[(int) wider_mode].insn_code;
3088 if (icode != CODE_FOR_nothing)
3090 x = prepare_operand (icode, x, 0, mode, wider_mode, unsignedp);
3091 y = prepare_operand (icode, y, 1, mode, wider_mode, unsignedp);
3092 emit_insn (GEN_FCN (icode) (x, y));
3094 emit_jump_insn ((*bcc_gen_fctn[(int) comparison]) (label));
3098 if (class != MODE_INT && class != MODE_FLOAT
3099 && class != MODE_COMPLEX_FLOAT)
3102 wider_mode = GET_MODE_WIDER_MODE (wider_mode);
3103 } while (wider_mode != VOIDmode);
3108 /* Generate code to compare X with Y so that the condition codes are
3109 set and to jump to LABEL if the condition is true. If X is a
3110 constant and Y is not a constant, then the comparison is swapped to
3111 ensure that the comparison RTL has the canonical form.
3113 UNSIGNEDP nonzero says that X and Y are unsigned; this matters if they
3114 need to be widened by emit_cmp_insn. UNSIGNEDP is also used to select
3115 the proper branch condition code.
3117 If X and Y have mode BLKmode, then SIZE specifies the size of both X and Y,
3118 and ALIGN specifies the known shared alignment of X and Y.
3120 MODE is the mode of the inputs (in case they are const_int).
3122 COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.). It will
3123 be passed unchanged to emit_cmp_insn, then potentially converted into an
3124 unsigned variant based on UNSIGNEDP to select a proper jump instruction. */
3127 emit_cmp_and_jump_insns (x, y, comparison, size, mode, unsignedp, align, label)
3129 enum rtx_code comparison;
3131 enum machine_mode mode;
3139 if ((CONSTANT_P (x) && ! CONSTANT_P (y))
3140 || (GET_CODE (x) == CONST_INT && GET_CODE (y) != CONST_INT))
3142 /* Swap operands and condition to ensure canonical RTL. */
3145 comparison = swap_condition (comparison);
3154 /* If OP0 is still a constant, then both X and Y must be constants. Force
3155 X into a register to avoid aborting in emit_cmp_insn due to non-canonical
3157 if (CONSTANT_P (op0))
3158 op0 = force_reg (mode, op0);
3163 comparison = unsigned_condition (comparison);
3164 prepare_cmp_insn (&op0, &op1, &comparison, size, &mode, &unsignedp, align);
3165 emit_cmp_and_jump_insn_1 (op0, op1, mode, comparison, unsignedp, label);
3168 /* Like emit_cmp_and_jump_insns, but generate only the comparison. */
3170 emit_cmp_insn (x, y, comparison, size, mode, unsignedp, align)
3172 enum rtx_code comparison;
3174 enum machine_mode mode;
3178 emit_cmp_and_jump_insns (x, y, comparison, size, mode, unsignedp, align, 0);
3182 /* Nonzero if a compare of mode MODE can be done straightforwardly
3183 (without splitting it into pieces). */
3186 can_compare_p (mode)
3187 enum machine_mode mode;
3191 if (cmp_optab->handlers[(int)mode].insn_code != CODE_FOR_nothing)
3193 mode = GET_MODE_WIDER_MODE (mode);
3194 } while (mode != VOIDmode);
3199 /* Emit a library call comparison between floating point X and Y.
3200 COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.). */
3203 prepare_float_lib_cmp (px, py, pcomparison, pmode, punsignedp)
3205 enum rtx_code *pcomparison;
3206 enum machine_mode *pmode;
3209 enum rtx_code comparison = *pcomparison;
3210 rtx x = *px, y = *py;
3211 enum machine_mode mode = GET_MODE (x);
3219 libfunc = eqhf2_libfunc;
3223 libfunc = nehf2_libfunc;
3227 libfunc = gthf2_libfunc;
3231 libfunc = gehf2_libfunc;
3235 libfunc = lthf2_libfunc;
3239 libfunc = lehf2_libfunc;
3245 else if (mode == SFmode)
3249 libfunc = eqsf2_libfunc;
3253 libfunc = nesf2_libfunc;
3257 libfunc = gtsf2_libfunc;
3261 libfunc = gesf2_libfunc;
3265 libfunc = ltsf2_libfunc;
3269 libfunc = lesf2_libfunc;
3275 else if (mode == DFmode)
3279 libfunc = eqdf2_libfunc;
3283 libfunc = nedf2_libfunc;
3287 libfunc = gtdf2_libfunc;
3291 libfunc = gedf2_libfunc;
3295 libfunc = ltdf2_libfunc;
3299 libfunc = ledf2_libfunc;
3305 else if (mode == XFmode)
3309 libfunc = eqxf2_libfunc;
3313 libfunc = nexf2_libfunc;
3317 libfunc = gtxf2_libfunc;
3321 libfunc = gexf2_libfunc;
3325 libfunc = ltxf2_libfunc;
3329 libfunc = lexf2_libfunc;
3335 else if (mode == TFmode)
3339 libfunc = eqtf2_libfunc;
3343 libfunc = netf2_libfunc;
3347 libfunc = gttf2_libfunc;
3351 libfunc = getf2_libfunc;
3355 libfunc = lttf2_libfunc;
3359 libfunc = letf2_libfunc;
3367 enum machine_mode wider_mode;
3369 for (wider_mode = GET_MODE_WIDER_MODE (mode); wider_mode != VOIDmode;
3370 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
3372 if ((cmp_optab->handlers[(int) wider_mode].insn_code
3373 != CODE_FOR_nothing)
3374 || (cmp_optab->handlers[(int) wider_mode].libfunc != 0))
3376 x = protect_from_queue (x, 0);
3377 y = protect_from_queue (y, 0);
3378 *px = convert_to_mode (wider_mode, x, 0);
3379 *py = convert_to_mode (wider_mode, y, 0);
3380 prepare_float_lib_cmp (px, py, pcomparison, pmode, punsignedp);
3390 emit_library_call (libfunc, 1,
3391 word_mode, 2, x, mode, y, mode);
3393 /* Immediately move the result of the libcall into a pseudo
3394 register so reload doesn't clobber the value if it needs
3395 the return register for a spill reg. */
3396 result = gen_reg_rtx (word_mode);
3397 emit_move_insn (result, hard_libcall_value (word_mode));
3401 #ifdef FLOAT_LIB_COMPARE_RETURNS_BOOL
3402 if (FLOAT_LIB_COMPARE_RETURNS_BOOL (mode, comparison))
3408 /* Generate code to indirectly jump to a location given in the rtx LOC. */
3411 emit_indirect_jump (loc)
3414 if (! ((*insn_operand_predicate[(int)CODE_FOR_indirect_jump][0])
3416 loc = copy_to_mode_reg (Pmode, loc);
3418 emit_jump_insn (gen_indirect_jump (loc));
3422 #ifdef HAVE_conditional_move
3424 /* Emit a conditional move instruction if the machine supports one for that
3425 condition and machine mode.
3427 OP0 and OP1 are the operands that should be compared using CODE. CMODE is
3428 the mode to use should they be constants. If it is VOIDmode, they cannot
3431 OP2 should be stored in TARGET if the comparison is true, otherwise OP3
3432 should be stored there. MODE is the mode to use should they be constants.
3433 If it is VOIDmode, they cannot both be constants.
3435 The result is either TARGET (perhaps modified) or NULL_RTX if the operation
3436 is not supported. */
3439 emit_conditional_move (target, code, op0, op1, cmode, op2, op3, mode,
3444 enum machine_mode cmode;
3446 enum machine_mode mode;
3449 rtx tem, subtarget, comparison, insn;
3450 enum insn_code icode;
3452 /* If one operand is constant, make it the second one. Only do this
3453 if the other operand is not constant as well. */
3455 if ((CONSTANT_P (op0) && ! CONSTANT_P (op1))
3456 || (GET_CODE (op0) == CONST_INT && GET_CODE (op1) != CONST_INT))
3461 code = swap_condition (code);
3464 if (cmode == VOIDmode)
3465 cmode = GET_MODE (op0);
3467 if (((CONSTANT_P (op2) && ! CONSTANT_P (op3))
3468 || (GET_CODE (op2) == CONST_INT && GET_CODE (op3) != CONST_INT))
3469 && (GET_MODE_CLASS (GET_MODE (op1)) != MODE_FLOAT
3470 || TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT || flag_fast_math))
3475 code = reverse_condition (code);
3478 if (mode == VOIDmode)
3479 mode = GET_MODE (op2);
3481 icode = movcc_gen_code[mode];
3483 if (icode == CODE_FOR_nothing)
3488 op2 = force_not_mem (op2);
3489 op3 = force_not_mem (op3);
3493 target = protect_from_queue (target, 1);
3495 target = gen_reg_rtx (mode);
3501 op2 = protect_from_queue (op2, 0);
3502 op3 = protect_from_queue (op3, 0);
3504 /* If the insn doesn't accept these operands, put them in pseudos. */
3506 if (! (*insn_operand_predicate[icode][0])
3507 (subtarget, insn_operand_mode[icode][0]))
3508 subtarget = gen_reg_rtx (insn_operand_mode[icode][0]);
3510 if (! (*insn_operand_predicate[icode][2])
3511 (op2, insn_operand_mode[icode][2]))
3512 op2 = copy_to_mode_reg (insn_operand_mode[icode][2], op2);
3514 if (! (*insn_operand_predicate[icode][3])
3515 (op3, insn_operand_mode[icode][3]))
3516 op3 = copy_to_mode_reg (insn_operand_mode[icode][3], op3);
3518 /* Everything should now be in the suitable form, so emit the compare insn
3519 and then the conditional move. */
3522 = compare_from_rtx (op0, op1, code, unsignedp, cmode, NULL_RTX, 0);
3524 /* ??? Watch for const0_rtx (nop) and const_true_rtx (unconditional)? */
3525 if (GET_CODE (comparison) != code)
3526 /* This shouldn't happen. */
3529 insn = GEN_FCN (icode) (subtarget, comparison, op2, op3);
3531 /* If that failed, then give up. */
3537 if (subtarget != target)
3538 convert_move (target, subtarget, 0);
3543 /* Return non-zero if a conditional move of mode MODE is supported.
3545 This function is for combine so it can tell whether an insn that looks
3546 like a conditional move is actually supported by the hardware. If we
3547 guess wrong we lose a bit on optimization, but that's it. */
3548 /* ??? sparc64 supports conditionally moving integers values based on fp
3549 comparisons, and vice versa. How do we handle them? */
3552 can_conditionally_move_p (mode)
3553 enum machine_mode mode;
3555 if (movcc_gen_code[mode] != CODE_FOR_nothing)
3561 #endif /* HAVE_conditional_move */
3563 /* These three functions generate an insn body and return it
3564 rather than emitting the insn.
3566 They do not protect from queued increments,
3567 because they may be used 1) in protect_from_queue itself
3568 and 2) in other passes where there is no queue. */
3570 /* Generate and return an insn body to add Y to X. */
3573 gen_add2_insn (x, y)
3576 int icode = (int) add_optab->handlers[(int) GET_MODE (x)].insn_code;
3578 if (! (*insn_operand_predicate[icode][0]) (x, insn_operand_mode[icode][0])
3579 || ! (*insn_operand_predicate[icode][1]) (x, insn_operand_mode[icode][1])
3580 || ! (*insn_operand_predicate[icode][2]) (y, insn_operand_mode[icode][2]))
3583 return (GEN_FCN (icode) (x, x, y));
3587 have_add2_insn (mode)
3588 enum machine_mode mode;
3590 return add_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing;
3593 /* Generate and return an insn body to subtract Y from X. */
3596 gen_sub2_insn (x, y)
3599 int icode = (int) sub_optab->handlers[(int) GET_MODE (x)].insn_code;
3601 if (! (*insn_operand_predicate[icode][0]) (x, insn_operand_mode[icode][0])
3602 || ! (*insn_operand_predicate[icode][1]) (x, insn_operand_mode[icode][1])
3603 || ! (*insn_operand_predicate[icode][2]) (y, insn_operand_mode[icode][2]))
3606 return (GEN_FCN (icode) (x, x, y));
3610 have_sub2_insn (mode)
3611 enum machine_mode mode;
3613 return sub_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing;
3616 /* Generate the body of an instruction to copy Y into X.
3617 It may be a SEQUENCE, if one insn isn't enough. */
3620 gen_move_insn (x, y)
3623 register enum machine_mode mode = GET_MODE (x);
3624 enum insn_code insn_code;
3627 if (mode == VOIDmode)
3628 mode = GET_MODE (y);
3630 insn_code = mov_optab->handlers[(int) mode].insn_code;
3632 /* Handle MODE_CC modes: If we don't have a special move insn for this mode,
3633 find a mode to do it in. If we have a movcc, use it. Otherwise,
3634 find the MODE_INT mode of the same width. */
3636 if (GET_MODE_CLASS (mode) == MODE_CC && insn_code == CODE_FOR_nothing)
3638 enum machine_mode tmode = VOIDmode;
3642 && mov_optab->handlers[(int) CCmode].insn_code != CODE_FOR_nothing)
3645 for (tmode = QImode; tmode != VOIDmode;
3646 tmode = GET_MODE_WIDER_MODE (tmode))
3647 if (GET_MODE_SIZE (tmode) == GET_MODE_SIZE (mode))
3650 if (tmode == VOIDmode)
3653 /* Get X and Y in TMODE. We can't use gen_lowpart here because it
3654 may call change_address which is not appropriate if we were
3655 called when a reload was in progress. We don't have to worry
3656 about changing the address since the size in bytes is supposed to
3657 be the same. Copy the MEM to change the mode and move any
3658 substitutions from the old MEM to the new one. */
3660 if (reload_in_progress)
3662 x = gen_lowpart_common (tmode, x1);
3663 if (x == 0 && GET_CODE (x1) == MEM)
3665 x = gen_rtx_MEM (tmode, XEXP (x1, 0));
3666 RTX_UNCHANGING_P (x) = RTX_UNCHANGING_P (x1);
3667 MEM_COPY_ATTRIBUTES (x, x1);
3668 copy_replacements (x1, x);
3671 y = gen_lowpart_common (tmode, y1);
3672 if (y == 0 && GET_CODE (y1) == MEM)
3674 y = gen_rtx_MEM (tmode, XEXP (y1, 0));
3675 RTX_UNCHANGING_P (y) = RTX_UNCHANGING_P (y1);
3676 MEM_COPY_ATTRIBUTES (y, y1);
3677 copy_replacements (y1, y);
3682 x = gen_lowpart (tmode, x);
3683 y = gen_lowpart (tmode, y);
3686 insn_code = mov_optab->handlers[(int) tmode].insn_code;
3687 return (GEN_FCN (insn_code) (x, y));
3691 emit_move_insn_1 (x, y);
3692 seq = gen_sequence ();
3697 /* Return the insn code used to extend FROM_MODE to TO_MODE.
3698 UNSIGNEDP specifies zero-extension instead of sign-extension. If
3699 no such operation exists, CODE_FOR_nothing will be returned. */
3702 can_extend_p (to_mode, from_mode, unsignedp)
3703 enum machine_mode to_mode, from_mode;
3706 return extendtab[(int) to_mode][(int) from_mode][unsignedp];
3709 /* Generate the body of an insn to extend Y (with mode MFROM)
3710 into X (with mode MTO). Do zero-extension if UNSIGNEDP is nonzero. */
3713 gen_extend_insn (x, y, mto, mfrom, unsignedp)
3715 enum machine_mode mto, mfrom;
3718 return (GEN_FCN (extendtab[(int) mto][(int) mfrom][unsignedp]) (x, y));
3721 /* can_fix_p and can_float_p say whether the target machine
3722 can directly convert a given fixed point type to
3723 a given floating point type, or vice versa.
3724 The returned value is the CODE_FOR_... value to use,
3725 or CODE_FOR_nothing if these modes cannot be directly converted.
3727 *TRUNCP_PTR is set to 1 if it is necessary to output
3728 an explicit FTRUNC insn before the fix insn; otherwise 0. */
3730 static enum insn_code
3731 can_fix_p (fixmode, fltmode, unsignedp, truncp_ptr)
3732 enum machine_mode fltmode, fixmode;
3737 if (fixtrunctab[(int) fltmode][(int) fixmode][unsignedp] != CODE_FOR_nothing)
3738 return fixtrunctab[(int) fltmode][(int) fixmode][unsignedp];
3740 if (ftrunc_optab->handlers[(int) fltmode].insn_code != CODE_FOR_nothing)
3743 return fixtab[(int) fltmode][(int) fixmode][unsignedp];
3745 return CODE_FOR_nothing;
3748 static enum insn_code
3749 can_float_p (fltmode, fixmode, unsignedp)
3750 enum machine_mode fixmode, fltmode;
3753 return floattab[(int) fltmode][(int) fixmode][unsignedp];
3756 /* Generate code to convert FROM to floating point
3757 and store in TO. FROM must be fixed point and not VOIDmode.
3758 UNSIGNEDP nonzero means regard FROM as unsigned.
3759 Normally this is done by correcting the final value
3760 if it is negative. */
3763 expand_float (to, from, unsignedp)
3767 enum insn_code icode;
3768 register rtx target = to;
3769 enum machine_mode fmode, imode;
3771 /* Crash now, because we won't be able to decide which mode to use. */
3772 if (GET_MODE (from) == VOIDmode)
3775 /* Look for an insn to do the conversion. Do it in the specified
3776 modes if possible; otherwise convert either input, output or both to
3777 wider mode. If the integer mode is wider than the mode of FROM,
3778 we can do the conversion signed even if the input is unsigned. */
3780 for (imode = GET_MODE (from); imode != VOIDmode;
3781 imode = GET_MODE_WIDER_MODE (imode))
3782 for (fmode = GET_MODE (to); fmode != VOIDmode;
3783 fmode = GET_MODE_WIDER_MODE (fmode))
3785 int doing_unsigned = unsignedp;
3787 icode = can_float_p (fmode, imode, unsignedp);
3788 if (icode == CODE_FOR_nothing && imode != GET_MODE (from) && unsignedp)
3789 icode = can_float_p (fmode, imode, 0), doing_unsigned = 0;
3791 if (icode != CODE_FOR_nothing)
3793 to = protect_from_queue (to, 1);
3794 from = protect_from_queue (from, 0);
3796 if (imode != GET_MODE (from))
3797 from = convert_to_mode (imode, from, unsignedp);
3799 if (fmode != GET_MODE (to))
3800 target = gen_reg_rtx (fmode);
3802 emit_unop_insn (icode, target, from,
3803 doing_unsigned ? UNSIGNED_FLOAT : FLOAT);
3806 convert_move (to, target, 0);
3811 #if !defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3813 /* Unsigned integer, and no way to convert directly.
3814 Convert as signed, then conditionally adjust the result. */
3817 rtx label = gen_label_rtx ();
3819 REAL_VALUE_TYPE offset;
3823 to = protect_from_queue (to, 1);
3824 from = protect_from_queue (from, 0);
3827 from = force_not_mem (from);
3829 /* Look for a usable floating mode FMODE wider than the source and at
3830 least as wide as the target. Using FMODE will avoid rounding woes
3831 with unsigned values greater than the signed maximum value. */
3833 for (fmode = GET_MODE (to); fmode != VOIDmode;
3834 fmode = GET_MODE_WIDER_MODE (fmode))
3835 if (GET_MODE_BITSIZE (GET_MODE (from)) < GET_MODE_BITSIZE (fmode)
3836 && can_float_p (fmode, GET_MODE (from), 0) != CODE_FOR_nothing)
3839 if (fmode == VOIDmode)
3841 /* There is no such mode. Pretend the target is wide enough. */
3842 fmode = GET_MODE (to);
3844 /* Avoid double-rounding when TO is narrower than FROM. */
3845 if ((significand_size (fmode) + 1)
3846 < GET_MODE_BITSIZE (GET_MODE (from)))
3849 rtx neglabel = gen_label_rtx ();
3851 /* Don't use TARGET if it isn't a register, is a hard register,
3852 or is the wrong mode. */
3853 if (GET_CODE (target) != REG
3854 || REGNO (target) < FIRST_PSEUDO_REGISTER
3855 || GET_MODE (target) != fmode)
3856 target = gen_reg_rtx (fmode);
3858 imode = GET_MODE (from);
3859 do_pending_stack_adjust ();
3861 /* Test whether the sign bit is set. */
3862 emit_cmp_insn (from, const0_rtx, GE, NULL_RTX, imode, 0, 0);
3863 emit_jump_insn (gen_blt (neglabel));
3865 /* The sign bit is not set. Convert as signed. */
3866 expand_float (target, from, 0);
3867 emit_jump_insn (gen_jump (label));
3870 /* The sign bit is set.
3871 Convert to a usable (positive signed) value by shifting right
3872 one bit, while remembering if a nonzero bit was shifted
3873 out; i.e., compute (from & 1) | (from >> 1). */
3875 emit_label (neglabel);
3876 temp = expand_binop (imode, and_optab, from, const1_rtx,
3877 NULL_RTX, 1, OPTAB_LIB_WIDEN);
3878 temp1 = expand_shift (RSHIFT_EXPR, imode, from, integer_one_node,
3880 temp = expand_binop (imode, ior_optab, temp, temp1, temp, 1,
3882 expand_float (target, temp, 0);
3884 /* Multiply by 2 to undo the shift above. */
3885 temp = expand_binop (fmode, add_optab, target, target,
3886 target, 0, OPTAB_LIB_WIDEN);
3888 emit_move_insn (target, temp);
3890 do_pending_stack_adjust ();
3896 /* If we are about to do some arithmetic to correct for an
3897 unsigned operand, do it in a pseudo-register. */
3899 if (GET_MODE (to) != fmode
3900 || GET_CODE (to) != REG || REGNO (to) < FIRST_PSEUDO_REGISTER)
3901 target = gen_reg_rtx (fmode);
3903 /* Convert as signed integer to floating. */
3904 expand_float (target, from, 0);
3906 /* If FROM is negative (and therefore TO is negative),
3907 correct its value by 2**bitwidth. */
3909 do_pending_stack_adjust ();
3910 emit_cmp_and_jump_insns (from, const0_rtx, GE, NULL_RTX, GET_MODE (from),
3913 /* On SCO 3.2.1, ldexp rejects values outside [0.5, 1).
3914 Rather than setting up a dconst_dot_5, let's hope SCO
3916 offset = REAL_VALUE_LDEXP (dconst1, GET_MODE_BITSIZE (GET_MODE (from)));
3917 temp = expand_binop (fmode, add_optab, target,
3918 CONST_DOUBLE_FROM_REAL_VALUE (offset, fmode),
3919 target, 0, OPTAB_LIB_WIDEN);
3921 emit_move_insn (target, temp);
3923 do_pending_stack_adjust ();
3929 /* No hardware instruction available; call a library routine to convert from
3930 SImode, DImode, or TImode into SFmode, DFmode, XFmode, or TFmode. */
3936 to = protect_from_queue (to, 1);
3937 from = protect_from_queue (from, 0);
3939 if (GET_MODE_SIZE (GET_MODE (from)) < GET_MODE_SIZE (SImode))
3940 from = convert_to_mode (SImode, from, unsignedp);
3943 from = force_not_mem (from);
3945 if (GET_MODE (to) == SFmode)
3947 if (GET_MODE (from) == SImode)
3948 libfcn = floatsisf_libfunc;
3949 else if (GET_MODE (from) == DImode)
3950 libfcn = floatdisf_libfunc;
3951 else if (GET_MODE (from) == TImode)
3952 libfcn = floattisf_libfunc;
3956 else if (GET_MODE (to) == DFmode)
3958 if (GET_MODE (from) == SImode)
3959 libfcn = floatsidf_libfunc;
3960 else if (GET_MODE (from) == DImode)
3961 libfcn = floatdidf_libfunc;
3962 else if (GET_MODE (from) == TImode)
3963 libfcn = floattidf_libfunc;
3967 else if (GET_MODE (to) == XFmode)
3969 if (GET_MODE (from) == SImode)
3970 libfcn = floatsixf_libfunc;
3971 else if (GET_MODE (from) == DImode)
3972 libfcn = floatdixf_libfunc;
3973 else if (GET_MODE (from) == TImode)
3974 libfcn = floattixf_libfunc;
3978 else if (GET_MODE (to) == TFmode)
3980 if (GET_MODE (from) == SImode)
3981 libfcn = floatsitf_libfunc;
3982 else if (GET_MODE (from) == DImode)
3983 libfcn = floatditf_libfunc;
3984 else if (GET_MODE (from) == TImode)
3985 libfcn = floattitf_libfunc;
3994 value = emit_library_call_value (libfcn, NULL_RTX, 1,
3996 1, from, GET_MODE (from));
3997 insns = get_insns ();
4000 emit_libcall_block (insns, target, value,
4001 gen_rtx_FLOAT (GET_MODE (to), from));
4006 /* Copy result to requested destination
4007 if we have been computing in a temp location. */
4011 if (GET_MODE (target) == GET_MODE (to))
4012 emit_move_insn (to, target);
4014 convert_move (to, target, 0);
4018 /* expand_fix: generate code to convert FROM to fixed point
4019 and store in TO. FROM must be floating point. */
4025 rtx temp = gen_reg_rtx (GET_MODE (x));
4026 return expand_unop (GET_MODE (x), ftrunc_optab, x, temp, 0);
4030 expand_fix (to, from, unsignedp)
4031 register rtx to, from;
4034 enum insn_code icode;
4035 register rtx target = to;
4036 enum machine_mode fmode, imode;
4040 /* We first try to find a pair of modes, one real and one integer, at
4041 least as wide as FROM and TO, respectively, in which we can open-code
4042 this conversion. If the integer mode is wider than the mode of TO,
4043 we can do the conversion either signed or unsigned. */
4045 for (imode = GET_MODE (to); imode != VOIDmode;
4046 imode = GET_MODE_WIDER_MODE (imode))
4047 for (fmode = GET_MODE (from); fmode != VOIDmode;
4048 fmode = GET_MODE_WIDER_MODE (fmode))
4050 int doing_unsigned = unsignedp;
4052 icode = can_fix_p (imode, fmode, unsignedp, &must_trunc);
4053 if (icode == CODE_FOR_nothing && imode != GET_MODE (to) && unsignedp)
4054 icode = can_fix_p (imode, fmode, 0, &must_trunc), doing_unsigned = 0;
4056 if (icode != CODE_FOR_nothing)
4058 to = protect_from_queue (to, 1);
4059 from = protect_from_queue (from, 0);
4061 if (fmode != GET_MODE (from))
4062 from = convert_to_mode (fmode, from, 0);
4065 from = ftruncify (from);
4067 if (imode != GET_MODE (to))
4068 target = gen_reg_rtx (imode);
4070 emit_unop_insn (icode, target, from,
4071 doing_unsigned ? UNSIGNED_FIX : FIX);
4073 convert_move (to, target, unsignedp);
4078 #if !defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
4079 /* For an unsigned conversion, there is one more way to do it.
4080 If we have a signed conversion, we generate code that compares
4081 the real value to the largest representable positive number. If if
4082 is smaller, the conversion is done normally. Otherwise, subtract
4083 one plus the highest signed number, convert, and add it back.
4085 We only need to check all real modes, since we know we didn't find
4086 anything with a wider integer mode. */
4088 if (unsignedp && GET_MODE_BITSIZE (GET_MODE (to)) <= HOST_BITS_PER_WIDE_INT)
4089 for (fmode = GET_MODE (from); fmode != VOIDmode;
4090 fmode = GET_MODE_WIDER_MODE (fmode))
4091 /* Make sure we won't lose significant bits doing this. */
4092 if (GET_MODE_BITSIZE (fmode) > GET_MODE_BITSIZE (GET_MODE (to))
4093 && CODE_FOR_nothing != can_fix_p (GET_MODE (to), fmode, 0,
4097 REAL_VALUE_TYPE offset;
4098 rtx limit, lab1, lab2, insn;
4100 bitsize = GET_MODE_BITSIZE (GET_MODE (to));
4101 offset = REAL_VALUE_LDEXP (dconst1, bitsize - 1);
4102 limit = CONST_DOUBLE_FROM_REAL_VALUE (offset, fmode);
4103 lab1 = gen_label_rtx ();
4104 lab2 = gen_label_rtx ();
4107 to = protect_from_queue (to, 1);
4108 from = protect_from_queue (from, 0);
4111 from = force_not_mem (from);
4113 if (fmode != GET_MODE (from))
4114 from = convert_to_mode (fmode, from, 0);
4116 /* See if we need to do the subtraction. */
4117 do_pending_stack_adjust ();
4118 emit_cmp_and_jump_insns (from, limit, GE, NULL_RTX, GET_MODE (from),
4121 /* If not, do the signed "fix" and branch around fixup code. */
4122 expand_fix (to, from, 0);
4123 emit_jump_insn (gen_jump (lab2));
4126 /* Otherwise, subtract 2**(N-1), convert to signed number,
4127 then add 2**(N-1). Do the addition using XOR since this
4128 will often generate better code. */
4130 target = expand_binop (GET_MODE (from), sub_optab, from, limit,
4131 NULL_RTX, 0, OPTAB_LIB_WIDEN);
4132 expand_fix (to, target, 0);
4133 target = expand_binop (GET_MODE (to), xor_optab, to,
4134 GEN_INT ((HOST_WIDE_INT) 1 << (bitsize - 1)),
4135 to, 1, OPTAB_LIB_WIDEN);
4138 emit_move_insn (to, target);
4142 if (mov_optab->handlers[(int) GET_MODE (to)].insn_code
4143 != CODE_FOR_nothing)
4145 /* Make a place for a REG_NOTE and add it. */
4146 insn = emit_move_insn (to, to);
4147 set_unique_reg_note (insn,
4149 gen_rtx_fmt_e (UNSIGNED_FIX,
4157 /* We can't do it with an insn, so use a library call. But first ensure
4158 that the mode of TO is at least as wide as SImode, since those are the
4159 only library calls we know about. */
4161 if (GET_MODE_SIZE (GET_MODE (to)) < GET_MODE_SIZE (SImode))
4163 target = gen_reg_rtx (SImode);
4165 expand_fix (target, from, unsignedp);
4167 else if (GET_MODE (from) == SFmode)
4169 if (GET_MODE (to) == SImode)
4170 libfcn = unsignedp ? fixunssfsi_libfunc : fixsfsi_libfunc;
4171 else if (GET_MODE (to) == DImode)
4172 libfcn = unsignedp ? fixunssfdi_libfunc : fixsfdi_libfunc;
4173 else if (GET_MODE (to) == TImode)
4174 libfcn = unsignedp ? fixunssfti_libfunc : fixsfti_libfunc;
4178 else if (GET_MODE (from) == DFmode)
4180 if (GET_MODE (to) == SImode)
4181 libfcn = unsignedp ? fixunsdfsi_libfunc : fixdfsi_libfunc;
4182 else if (GET_MODE (to) == DImode)
4183 libfcn = unsignedp ? fixunsdfdi_libfunc : fixdfdi_libfunc;
4184 else if (GET_MODE (to) == TImode)
4185 libfcn = unsignedp ? fixunsdfti_libfunc : fixdfti_libfunc;
4189 else if (GET_MODE (from) == XFmode)
4191 if (GET_MODE (to) == SImode)
4192 libfcn = unsignedp ? fixunsxfsi_libfunc : fixxfsi_libfunc;
4193 else if (GET_MODE (to) == DImode)
4194 libfcn = unsignedp ? fixunsxfdi_libfunc : fixxfdi_libfunc;
4195 else if (GET_MODE (to) == TImode)
4196 libfcn = unsignedp ? fixunsxfti_libfunc : fixxfti_libfunc;
4200 else if (GET_MODE (from) == TFmode)
4202 if (GET_MODE (to) == SImode)
4203 libfcn = unsignedp ? fixunstfsi_libfunc : fixtfsi_libfunc;
4204 else if (GET_MODE (to) == DImode)
4205 libfcn = unsignedp ? fixunstfdi_libfunc : fixtfdi_libfunc;
4206 else if (GET_MODE (to) == TImode)
4207 libfcn = unsignedp ? fixunstfti_libfunc : fixtfti_libfunc;
4219 to = protect_from_queue (to, 1);
4220 from = protect_from_queue (from, 0);
4223 from = force_not_mem (from);
4227 value = emit_library_call_value (libfcn, NULL_RTX, 1, GET_MODE (to),
4229 1, from, GET_MODE (from));
4230 insns = get_insns ();
4233 emit_libcall_block (insns, target, value,
4234 gen_rtx_fmt_e (unsignedp ? UNSIGNED_FIX : FIX,
4235 GET_MODE (to), from));
4240 if (GET_MODE (to) == GET_MODE (target))
4241 emit_move_insn (to, target);
4243 convert_move (to, target, 0);
4252 optab op = (optab) xmalloc (sizeof (struct optab));
4254 for (i = 0; i < NUM_MACHINE_MODES; i++)
4256 op->handlers[i].insn_code = CODE_FOR_nothing;
4257 op->handlers[i].libfunc = 0;
4260 if (code != UNKNOWN)
4261 code_to_optab[(int) code] = op;
4266 /* Initialize the libfunc fields of an entire group of entries in some
4267 optab. Each entry is set equal to a string consisting of a leading
4268 pair of underscores followed by a generic operation name followed by
4269 a mode name (downshifted to lower case) followed by a single character
4270 representing the number of operands for the given operation (which is
4271 usually one of the characters '2', '3', or '4').
4273 OPTABLE is the table in which libfunc fields are to be initialized.
4274 FIRST_MODE is the first machine mode index in the given optab to
4276 LAST_MODE is the last machine mode index in the given optab to
4278 OPNAME is the generic (string) name of the operation.
4279 SUFFIX is the character which specifies the number of operands for
4280 the given generic operation.
4284 init_libfuncs (optable, first_mode, last_mode, opname, suffix)
4285 register optab optable;
4286 register int first_mode;
4287 register int last_mode;
4288 register const char *opname;
4289 register int suffix;
4292 register unsigned opname_len = strlen (opname);
4294 for (mode = first_mode; (int) mode <= (int) last_mode;
4295 mode = (enum machine_mode) ((int) mode + 1))
4297 register const char *mname = GET_MODE_NAME(mode);
4298 register unsigned mname_len = strlen (mname);
4299 register char *libfunc_name
4300 = (char *) xmalloc (2 + opname_len + mname_len + 1 + 1);
4302 register const char *q;
4307 for (q = opname; *q; )
4309 for (q = mname; *q; q++)
4310 *p++ = tolower ((unsigned char)*q);
4313 optable->handlers[(int) mode].libfunc
4314 = gen_rtx_SYMBOL_REF (Pmode, libfunc_name);
4318 /* Initialize the libfunc fields of an entire group of entries in some
4319 optab which correspond to all integer mode operations. The parameters
4320 have the same meaning as similarly named ones for the `init_libfuncs'
4321 routine. (See above). */
4324 init_integral_libfuncs (optable, opname, suffix)
4325 register optab optable;
4326 register const char *opname;
4327 register int suffix;
4329 init_libfuncs (optable, SImode, TImode, opname, suffix);
4332 /* Initialize the libfunc fields of an entire group of entries in some
4333 optab which correspond to all real mode operations. The parameters
4334 have the same meaning as similarly named ones for the `init_libfuncs'
4335 routine. (See above). */
4338 init_floating_libfuncs (optable, opname, suffix)
4339 register optab optable;
4340 register const char *opname;
4341 register int suffix;
4343 init_libfuncs (optable, SFmode, TFmode, opname, suffix);
4346 /* Mark ARG (which is really an OPTAB *) for GC. */
4352 optab o = *(optab *) arg;
4355 for (i = 0; i < NUM_MACHINE_MODES; ++i)
4356 ggc_mark_rtx (o->handlers[i].libfunc);
4359 /* Call this once to initialize the contents of the optabs
4360 appropriately for the current target machine. */
4366 #ifdef FIXUNS_TRUNC_LIKE_FIX_TRUNC
4372 /* Start by initializing all tables to contain CODE_FOR_nothing. */
4374 for (p = fixtab[0][0];
4375 p < fixtab[0][0] + sizeof fixtab / sizeof (fixtab[0][0][0]);
4377 *p = CODE_FOR_nothing;
4379 for (p = fixtrunctab[0][0];
4380 p < fixtrunctab[0][0] + sizeof fixtrunctab / sizeof (fixtrunctab[0][0][0]);
4382 *p = CODE_FOR_nothing;
4384 for (p = floattab[0][0];
4385 p < floattab[0][0] + sizeof floattab / sizeof (floattab[0][0][0]);
4387 *p = CODE_FOR_nothing;
4389 for (p = extendtab[0][0];
4390 p < extendtab[0][0] + sizeof extendtab / sizeof extendtab[0][0][0];
4392 *p = CODE_FOR_nothing;
4394 for (i = 0; i < NUM_RTX_CODE; i++)
4395 setcc_gen_code[i] = CODE_FOR_nothing;
4397 #ifdef HAVE_conditional_move
4398 for (i = 0; i < NUM_MACHINE_MODES; i++)
4399 movcc_gen_code[i] = CODE_FOR_nothing;
4402 add_optab = init_optab (PLUS);
4403 sub_optab = init_optab (MINUS);
4404 smul_optab = init_optab (MULT);
4405 smul_highpart_optab = init_optab (UNKNOWN);
4406 umul_highpart_optab = init_optab (UNKNOWN);
4407 smul_widen_optab = init_optab (UNKNOWN);
4408 umul_widen_optab = init_optab (UNKNOWN);
4409 sdiv_optab = init_optab (DIV);
4410 sdivmod_optab = init_optab (UNKNOWN);
4411 udiv_optab = init_optab (UDIV);
4412 udivmod_optab = init_optab (UNKNOWN);
4413 smod_optab = init_optab (MOD);
4414 umod_optab = init_optab (UMOD);
4415 flodiv_optab = init_optab (DIV);
4416 ftrunc_optab = init_optab (UNKNOWN);
4417 and_optab = init_optab (AND);
4418 ior_optab = init_optab (IOR);
4419 xor_optab = init_optab (XOR);
4420 ashl_optab = init_optab (ASHIFT);
4421 ashr_optab = init_optab (ASHIFTRT);
4422 lshr_optab = init_optab (LSHIFTRT);
4423 rotl_optab = init_optab (ROTATE);
4424 rotr_optab = init_optab (ROTATERT);
4425 smin_optab = init_optab (SMIN);
4426 smax_optab = init_optab (SMAX);
4427 umin_optab = init_optab (UMIN);
4428 umax_optab = init_optab (UMAX);
4429 mov_optab = init_optab (UNKNOWN);
4430 movstrict_optab = init_optab (UNKNOWN);
4431 cmp_optab = init_optab (UNKNOWN);
4432 ucmp_optab = init_optab (UNKNOWN);
4433 tst_optab = init_optab (UNKNOWN);
4434 neg_optab = init_optab (NEG);
4435 abs_optab = init_optab (ABS);
4436 one_cmpl_optab = init_optab (NOT);
4437 ffs_optab = init_optab (FFS);
4438 sqrt_optab = init_optab (SQRT);
4439 sin_optab = init_optab (UNKNOWN);
4440 cos_optab = init_optab (UNKNOWN);
4441 strlen_optab = init_optab (UNKNOWN);
4443 for (i = 0; i < NUM_MACHINE_MODES; i++)
4445 movstr_optab[i] = CODE_FOR_nothing;
4446 clrstr_optab[i] = CODE_FOR_nothing;
4448 #ifdef HAVE_SECONDARY_RELOADS
4449 reload_in_optab[i] = reload_out_optab[i] = CODE_FOR_nothing;
4453 /* Fill in the optabs with the insns we support. */
4456 #ifdef FIXUNS_TRUNC_LIKE_FIX_TRUNC
4457 /* This flag says the same insns that convert to a signed fixnum
4458 also convert validly to an unsigned one. */
4459 for (i = 0; i < NUM_MACHINE_MODES; i++)
4460 for (j = 0; j < NUM_MACHINE_MODES; j++)
4461 fixtrunctab[i][j][1] = fixtrunctab[i][j][0];
4464 /* Initialize the optabs with the names of the library functions. */
4465 init_integral_libfuncs (add_optab, "add", '3');
4466 init_floating_libfuncs (add_optab, "add", '3');
4467 init_integral_libfuncs (sub_optab, "sub", '3');
4468 init_floating_libfuncs (sub_optab, "sub", '3');
4469 init_integral_libfuncs (smul_optab, "mul", '3');
4470 init_floating_libfuncs (smul_optab, "mul", '3');
4471 init_integral_libfuncs (sdiv_optab, "div", '3');
4472 init_integral_libfuncs (udiv_optab, "udiv", '3');
4473 init_integral_libfuncs (sdivmod_optab, "divmod", '4');
4474 init_integral_libfuncs (udivmod_optab, "udivmod", '4');
4475 init_integral_libfuncs (smod_optab, "mod", '3');
4476 init_integral_libfuncs (umod_optab, "umod", '3');
4477 init_floating_libfuncs (flodiv_optab, "div", '3');
4478 init_floating_libfuncs (ftrunc_optab, "ftrunc", '2');
4479 init_integral_libfuncs (and_optab, "and", '3');
4480 init_integral_libfuncs (ior_optab, "ior", '3');
4481 init_integral_libfuncs (xor_optab, "xor", '3');
4482 init_integral_libfuncs (ashl_optab, "ashl", '3');
4483 init_integral_libfuncs (ashr_optab, "ashr", '3');
4484 init_integral_libfuncs (lshr_optab, "lshr", '3');
4485 init_integral_libfuncs (smin_optab, "min", '3');
4486 init_floating_libfuncs (smin_optab, "min", '3');
4487 init_integral_libfuncs (smax_optab, "max", '3');
4488 init_floating_libfuncs (smax_optab, "max", '3');
4489 init_integral_libfuncs (umin_optab, "umin", '3');
4490 init_integral_libfuncs (umax_optab, "umax", '3');
4491 init_integral_libfuncs (neg_optab, "neg", '2');
4492 init_floating_libfuncs (neg_optab, "neg", '2');
4493 init_integral_libfuncs (one_cmpl_optab, "one_cmpl", '2');
4494 init_integral_libfuncs (ffs_optab, "ffs", '2');
4496 /* Comparison libcalls for integers MUST come in pairs, signed/unsigned. */
4497 init_integral_libfuncs (cmp_optab, "cmp", '2');
4498 init_integral_libfuncs (ucmp_optab, "ucmp", '2');
4499 init_floating_libfuncs (cmp_optab, "cmp", '2');
4501 #ifdef MULSI3_LIBCALL
4502 smul_optab->handlers[(int) SImode].libfunc
4503 = gen_rtx_SYMBOL_REF (Pmode, MULSI3_LIBCALL);
4505 #ifdef MULDI3_LIBCALL
4506 smul_optab->handlers[(int) DImode].libfunc
4507 = gen_rtx_SYMBOL_REF (Pmode, MULDI3_LIBCALL);
4510 #ifdef DIVSI3_LIBCALL
4511 sdiv_optab->handlers[(int) SImode].libfunc
4512 = gen_rtx_SYMBOL_REF (Pmode, DIVSI3_LIBCALL);
4514 #ifdef DIVDI3_LIBCALL
4515 sdiv_optab->handlers[(int) DImode].libfunc
4516 = gen_rtx_SYMBOL_REF (Pmode, DIVDI3_LIBCALL);
4519 #ifdef UDIVSI3_LIBCALL
4520 udiv_optab->handlers[(int) SImode].libfunc
4521 = gen_rtx_SYMBOL_REF (Pmode, UDIVSI3_LIBCALL);
4523 #ifdef UDIVDI3_LIBCALL
4524 udiv_optab->handlers[(int) DImode].libfunc
4525 = gen_rtx_SYMBOL_REF (Pmode, UDIVDI3_LIBCALL);
4528 #ifdef MODSI3_LIBCALL
4529 smod_optab->handlers[(int) SImode].libfunc
4530 = gen_rtx_SYMBOL_REF (Pmode, MODSI3_LIBCALL);
4532 #ifdef MODDI3_LIBCALL
4533 smod_optab->handlers[(int) DImode].libfunc
4534 = gen_rtx_SYMBOL_REF (Pmode, MODDI3_LIBCALL);
4537 #ifdef UMODSI3_LIBCALL
4538 umod_optab->handlers[(int) SImode].libfunc
4539 = gen_rtx_SYMBOL_REF (Pmode, UMODSI3_LIBCALL);
4541 #ifdef UMODDI3_LIBCALL
4542 umod_optab->handlers[(int) DImode].libfunc
4543 = gen_rtx_SYMBOL_REF (Pmode, UMODDI3_LIBCALL);
4546 /* Use cabs for DC complex abs, since systems generally have cabs.
4547 Don't define any libcall for SCmode, so that cabs will be used. */
4548 abs_optab->handlers[(int) DCmode].libfunc
4549 = gen_rtx_SYMBOL_REF (Pmode, "cabs");
4551 /* The ffs function operates on `int'. */
4552 #ifndef INT_TYPE_SIZE
4553 #define INT_TYPE_SIZE BITS_PER_WORD
4555 ffs_optab->handlers[(int) mode_for_size (INT_TYPE_SIZE, MODE_INT, 0)] .libfunc
4556 = gen_rtx_SYMBOL_REF (Pmode, "ffs");
4558 extendsfdf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__extendsfdf2");
4559 extendsfxf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__extendsfxf2");
4560 extendsftf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__extendsftf2");
4561 extenddfxf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__extenddfxf2");
4562 extenddftf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__extenddftf2");
4564 truncdfsf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__truncdfsf2");
4565 truncxfsf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__truncxfsf2");
4566 trunctfsf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__trunctfsf2");
4567 truncxfdf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__truncxfdf2");
4568 trunctfdf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__trunctfdf2");
4570 memcpy_libfunc = gen_rtx_SYMBOL_REF (Pmode, "memcpy");
4571 bcopy_libfunc = gen_rtx_SYMBOL_REF (Pmode, "bcopy");
4572 memcmp_libfunc = gen_rtx_SYMBOL_REF (Pmode, "memcmp");
4573 bcmp_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__gcc_bcmp");
4574 memset_libfunc = gen_rtx_SYMBOL_REF (Pmode, "memset");
4575 bzero_libfunc = gen_rtx_SYMBOL_REF (Pmode, "bzero");
4577 throw_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__throw");
4578 rethrow_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__rethrow");
4579 sjthrow_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__sjthrow");
4580 sjpopnthrow_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__sjpopnthrow");
4581 terminate_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__terminate");
4582 eh_rtime_match_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__eh_rtime_match");
4583 #ifndef DONT_USE_BUILTIN_SETJMP
4584 setjmp_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__builtin_setjmp");
4585 longjmp_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__builtin_longjmp");
4587 setjmp_libfunc = gen_rtx_SYMBOL_REF (Pmode, "setjmp");
4588 longjmp_libfunc = gen_rtx_SYMBOL_REF (Pmode, "longjmp");
4591 eqhf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__eqhf2");
4592 nehf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__nehf2");
4593 gthf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__gthf2");
4594 gehf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__gehf2");
4595 lthf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__lthf2");
4596 lehf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__lehf2");
4598 eqsf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__eqsf2");
4599 nesf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__nesf2");
4600 gtsf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__gtsf2");
4601 gesf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__gesf2");
4602 ltsf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__ltsf2");
4603 lesf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__lesf2");
4605 eqdf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__eqdf2");
4606 nedf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__nedf2");
4607 gtdf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__gtdf2");
4608 gedf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__gedf2");
4609 ltdf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__ltdf2");
4610 ledf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__ledf2");
4612 eqxf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__eqxf2");
4613 nexf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__nexf2");
4614 gtxf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__gtxf2");
4615 gexf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__gexf2");
4616 ltxf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__ltxf2");
4617 lexf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__lexf2");
4619 eqtf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__eqtf2");
4620 netf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__netf2");
4621 gttf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__gttf2");
4622 getf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__getf2");
4623 lttf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__lttf2");
4624 letf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__letf2");
4626 floatsisf_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__floatsisf");
4627 floatdisf_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__floatdisf");
4628 floattisf_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__floattisf");
4630 floatsidf_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__floatsidf");
4631 floatdidf_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__floatdidf");
4632 floattidf_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__floattidf");
4634 floatsixf_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__floatsixf");
4635 floatdixf_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__floatdixf");
4636 floattixf_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__floattixf");
4638 floatsitf_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__floatsitf");
4639 floatditf_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__floatditf");
4640 floattitf_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__floattitf");
4642 fixsfsi_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__fixsfsi");
4643 fixsfdi_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__fixsfdi");
4644 fixsfti_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__fixsfti");
4646 fixdfsi_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__fixdfsi");
4647 fixdfdi_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__fixdfdi");
4648 fixdfti_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__fixdfti");
4650 fixxfsi_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__fixxfsi");
4651 fixxfdi_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__fixxfdi");
4652 fixxfti_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__fixxfti");
4654 fixtfsi_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__fixtfsi");
4655 fixtfdi_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__fixtfdi");
4656 fixtfti_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__fixtfti");
4658 fixunssfsi_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__fixunssfsi");
4659 fixunssfdi_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__fixunssfdi");
4660 fixunssfti_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__fixunssfti");
4662 fixunsdfsi_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__fixunsdfsi");
4663 fixunsdfdi_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__fixunsdfdi");
4664 fixunsdfti_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__fixunsdfti");
4666 fixunsxfsi_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__fixunsxfsi");
4667 fixunsxfdi_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__fixunsxfdi");
4668 fixunsxfti_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__fixunsxfti");
4670 fixunstfsi_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__fixunstfsi");
4671 fixunstfdi_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__fixunstfdi");
4672 fixunstfti_libfunc = gen_rtx_SYMBOL_REF (Pmode, "__fixunstfti");
4674 /* For check-memory-usage. */
4675 chkr_check_addr_libfunc = gen_rtx_SYMBOL_REF (Pmode, "chkr_check_addr");
4676 chkr_set_right_libfunc = gen_rtx_SYMBOL_REF (Pmode, "chkr_set_right");
4677 chkr_copy_bitmap_libfunc = gen_rtx_SYMBOL_REF (Pmode, "chkr_copy_bitmap");
4678 chkr_check_exec_libfunc = gen_rtx_SYMBOL_REF (Pmode, "chkr_check_exec");
4679 chkr_check_str_libfunc = gen_rtx_SYMBOL_REF (Pmode, "chkr_check_str");
4681 /* For function entry/exit instrumentation. */
4682 profile_function_entry_libfunc
4683 = gen_rtx_SYMBOL_REF (Pmode, "__cyg_profile_func_enter");
4684 profile_function_exit_libfunc
4685 = gen_rtx_SYMBOL_REF (Pmode, "__cyg_profile_func_exit");
4687 #ifdef HAVE_conditional_trap
4691 #ifdef INIT_TARGET_OPTABS
4692 /* Allow the target to add more libcalls or rename some, etc. */
4696 /* Add these GC roots. */
4697 ggc_add_root (optab_table, OTI_MAX, sizeof(optab), mark_optab);
4698 ggc_add_rtx_root (libfunc_table, LTI_MAX);
4703 /* SCO 3.2 apparently has a broken ldexp. */
4716 #endif /* BROKEN_LDEXP */
4718 #ifdef HAVE_conditional_trap
4719 /* The insn generating function can not take an rtx_code argument.
4720 TRAP_RTX is used as an rtx argument. Its code is replaced with
4721 the code to be used in the trap insn and all other fields are
4724 ??? Will need to change to support garbage collection. */
4725 static rtx trap_rtx;
4730 if (HAVE_conditional_trap)
4731 trap_rtx = gen_rtx_fmt_ee (EQ, VOIDmode, NULL_RTX, NULL_RTX);
4735 /* Generate insns to trap with code TCODE if OP1 and OP2 satisfy condition
4736 CODE. Return 0 on failure. */
4739 gen_cond_trap (code, op1, op2, tcode)
4740 enum rtx_code code ATTRIBUTE_UNUSED;
4741 rtx op1, op2 ATTRIBUTE_UNUSED, tcode ATTRIBUTE_UNUSED;
4743 enum machine_mode mode = GET_MODE (op1);
4745 if (mode == VOIDmode)
4748 #ifdef HAVE_conditional_trap
4749 if (HAVE_conditional_trap
4750 && cmp_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
4753 emit_insn (GEN_FCN (cmp_optab->handlers[(int) mode].insn_code) (op1, op2));
4754 PUT_CODE (trap_rtx, code);
4755 insn = gen_conditional_trap (trap_rtx, tcode);