1 /* Expand the basic unary and binary arithmetic operations, for GNU compiler.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010,
4 2011 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
25 #include "coretypes.h"
27 #include "diagnostic-core.h"
29 /* Include insn-config.h before expr.h so that HAVE_conditional_move
30 is properly defined. */
31 #include "insn-config.h"
44 #include "basic-block.h"
47 struct target_optabs default_target_optabs;
48 struct target_libfuncs default_target_libfuncs;
50 struct target_optabs *this_target_optabs = &default_target_optabs;
51 struct target_libfuncs *this_target_libfuncs = &default_target_libfuncs;
54 #define libfunc_hash \
55 (this_target_libfuncs->x_libfunc_hash)
57 /* Contains the optab used for each rtx code. */
58 optab code_to_optab[NUM_RTX_CODE + 1];
60 static void prepare_float_lib_cmp (rtx, rtx, enum rtx_code, rtx *,
62 static rtx expand_unop_direct (enum machine_mode, optab, rtx, rtx, int);
64 /* Debug facility for use in GDB. */
65 void debug_optab_libfuncs (void);
67 /* Prefixes for the current version of decimal floating point (BID vs. DPD) */
68 #if ENABLE_DECIMAL_BID_FORMAT
69 #define DECIMAL_PREFIX "bid_"
71 #define DECIMAL_PREFIX "dpd_"
74 /* Used for libfunc_hash. */
77 hash_libfunc (const void *p)
79 const struct libfunc_entry *const e = (const struct libfunc_entry *) p;
81 return (((int) e->mode1 + (int) e->mode2 * NUM_MACHINE_MODES)
85 /* Used for libfunc_hash. */
88 eq_libfunc (const void *p, const void *q)
90 const struct libfunc_entry *const e1 = (const struct libfunc_entry *) p;
91 const struct libfunc_entry *const e2 = (const struct libfunc_entry *) q;
93 return (e1->optab == e2->optab
94 && e1->mode1 == e2->mode1
95 && e1->mode2 == e2->mode2);
98 /* Return libfunc corresponding operation defined by OPTAB converting
99 from MODE2 to MODE1. Trigger lazy initialization if needed, return NULL
100 if no libfunc is available. */
102 convert_optab_libfunc (convert_optab optab, enum machine_mode mode1,
103 enum machine_mode mode2)
105 struct libfunc_entry e;
106 struct libfunc_entry **slot;
108 e.optab = (size_t) (optab - &convert_optab_table[0]);
111 slot = (struct libfunc_entry **) htab_find_slot (libfunc_hash, &e, NO_INSERT);
114 if (optab->libcall_gen)
116 optab->libcall_gen (optab, optab->libcall_basename, mode1, mode2);
117 slot = (struct libfunc_entry **) htab_find_slot (libfunc_hash, &e, NO_INSERT);
119 return (*slot)->libfunc;
125 return (*slot)->libfunc;
128 /* Return libfunc corresponding operation defined by OPTAB in MODE.
129 Trigger lazy initialization if needed, return NULL if no libfunc is
132 optab_libfunc (optab optab, enum machine_mode mode)
134 struct libfunc_entry e;
135 struct libfunc_entry **slot;
137 e.optab = (size_t) (optab - &optab_table[0]);
140 slot = (struct libfunc_entry **) htab_find_slot (libfunc_hash, &e, NO_INSERT);
143 if (optab->libcall_gen)
145 optab->libcall_gen (optab, optab->libcall_basename,
146 optab->libcall_suffix, mode);
147 slot = (struct libfunc_entry **) htab_find_slot (libfunc_hash,
150 return (*slot)->libfunc;
156 return (*slot)->libfunc;
160 /* Add a REG_EQUAL note to the last insn in INSNS. TARGET is being set to
161 the result of operation CODE applied to OP0 (and OP1 if it is a binary
164 If the last insn does not set TARGET, don't do anything, but return 1.
166 If a previous insn sets TARGET and TARGET is one of OP0 or OP1,
167 don't add the REG_EQUAL note but return 0. Our caller can then try
168 again, ensuring that TARGET is not one of the operands. */
171 add_equal_note (rtx insns, rtx target, enum rtx_code code, rtx op0, rtx op1)
173 rtx last_insn, insn, set;
176 gcc_assert (insns && INSN_P (insns) && NEXT_INSN (insns));
178 if (GET_RTX_CLASS (code) != RTX_COMM_ARITH
179 && GET_RTX_CLASS (code) != RTX_BIN_ARITH
180 && GET_RTX_CLASS (code) != RTX_COMM_COMPARE
181 && GET_RTX_CLASS (code) != RTX_COMPARE
182 && GET_RTX_CLASS (code) != RTX_UNARY)
185 if (GET_CODE (target) == ZERO_EXTRACT)
188 for (last_insn = insns;
189 NEXT_INSN (last_insn) != NULL_RTX;
190 last_insn = NEXT_INSN (last_insn))
193 set = single_set (last_insn);
197 if (! rtx_equal_p (SET_DEST (set), target)
198 /* For a STRICT_LOW_PART, the REG_NOTE applies to what is inside it. */
199 && (GET_CODE (SET_DEST (set)) != STRICT_LOW_PART
200 || ! rtx_equal_p (XEXP (SET_DEST (set), 0), target)))
203 /* If TARGET is in OP0 or OP1, check if anything in SEQ sets TARGET
204 besides the last insn. */
205 if (reg_overlap_mentioned_p (target, op0)
206 || (op1 && reg_overlap_mentioned_p (target, op1)))
208 insn = PREV_INSN (last_insn);
209 while (insn != NULL_RTX)
211 if (reg_set_p (target, insn))
214 insn = PREV_INSN (insn);
218 if (GET_RTX_CLASS (code) == RTX_UNARY)
228 if (GET_MODE (op0) != VOIDmode && GET_MODE (target) != GET_MODE (op0))
230 note = gen_rtx_fmt_e (code, GET_MODE (op0), copy_rtx (op0));
231 if (GET_MODE_SIZE (GET_MODE (op0))
232 > GET_MODE_SIZE (GET_MODE (target)))
233 note = simplify_gen_unary (TRUNCATE, GET_MODE (target),
234 note, GET_MODE (op0));
236 note = simplify_gen_unary (ZERO_EXTEND, GET_MODE (target),
237 note, GET_MODE (op0));
242 note = gen_rtx_fmt_e (code, GET_MODE (target), copy_rtx (op0));
246 note = gen_rtx_fmt_ee (code, GET_MODE (target), copy_rtx (op0), copy_rtx (op1));
248 set_unique_reg_note (last_insn, REG_EQUAL, note);
253 /* Given two input operands, OP0 and OP1, determine what the correct from_mode
254 for a widening operation would be. In most cases this would be OP0, but if
255 that's a constant it'll be VOIDmode, which isn't useful. */
257 static enum machine_mode
258 widened_mode (enum machine_mode to_mode, rtx op0, rtx op1)
260 enum machine_mode m0 = GET_MODE (op0);
261 enum machine_mode m1 = GET_MODE (op1);
262 enum machine_mode result;
264 if (m0 == VOIDmode && m1 == VOIDmode)
266 else if (m0 == VOIDmode || GET_MODE_SIZE (m0) < GET_MODE_SIZE (m1))
271 if (GET_MODE_SIZE (result) > GET_MODE_SIZE (to_mode))
277 /* Find a widening optab even if it doesn't widen as much as we want.
278 E.g. if from_mode is HImode, and to_mode is DImode, and there is no
279 direct HI->SI insn, then return SI->DI, if that exists.
280 If PERMIT_NON_WIDENING is non-zero then this can be used with
281 non-widening optabs also. */
284 find_widening_optab_handler_and_mode (optab op, enum machine_mode to_mode,
285 enum machine_mode from_mode,
286 int permit_non_widening,
287 enum machine_mode *found_mode)
289 for (; (permit_non_widening || from_mode != to_mode)
290 && GET_MODE_SIZE (from_mode) <= GET_MODE_SIZE (to_mode)
291 && from_mode != VOIDmode;
292 from_mode = GET_MODE_WIDER_MODE (from_mode))
294 enum insn_code handler = widening_optab_handler (op, to_mode,
297 if (handler != CODE_FOR_nothing)
300 *found_mode = from_mode;
305 return CODE_FOR_nothing;
308 /* Widen OP to MODE and return the rtx for the widened operand. UNSIGNEDP
309 says whether OP is signed or unsigned. NO_EXTEND is nonzero if we need
310 not actually do a sign-extend or zero-extend, but can leave the
311 higher-order bits of the result rtx undefined, for example, in the case
312 of logical operations, but not right shifts. */
315 widen_operand (rtx op, enum machine_mode mode, enum machine_mode oldmode,
316 int unsignedp, int no_extend)
320 /* If we don't have to extend and this is a constant, return it. */
321 if (no_extend && GET_MODE (op) == VOIDmode)
324 /* If we must extend do so. If OP is a SUBREG for a promoted object, also
325 extend since it will be more efficient to do so unless the signedness of
326 a promoted object differs from our extension. */
328 || (GET_CODE (op) == SUBREG && SUBREG_PROMOTED_VAR_P (op)
329 && SUBREG_PROMOTED_UNSIGNED_P (op) == unsignedp))
330 return convert_modes (mode, oldmode, op, unsignedp);
332 /* If MODE is no wider than a single word, we return a paradoxical
334 if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD)
335 return gen_rtx_SUBREG (mode, force_reg (GET_MODE (op), op), 0);
337 /* Otherwise, get an object of MODE, clobber it, and set the low-order
340 result = gen_reg_rtx (mode);
341 emit_clobber (result);
342 emit_move_insn (gen_lowpart (GET_MODE (op), result), op);
346 /* Return the optab used for computing the operation given by the tree code,
347 CODE and the tree EXP. This function is not always usable (for example, it
348 cannot give complete results for multiplication or division) but probably
349 ought to be relied on more widely throughout the expander. */
351 optab_for_tree_code (enum tree_code code, const_tree type,
352 enum optab_subtype subtype)
364 return one_cmpl_optab;
373 return TYPE_UNSIGNED (type) ? umod_optab : smod_optab;
381 if (TYPE_SATURATING(type))
382 return TYPE_UNSIGNED(type) ? usdiv_optab : ssdiv_optab;
383 return TYPE_UNSIGNED (type) ? udiv_optab : sdiv_optab;
386 if (TREE_CODE (type) == VECTOR_TYPE)
388 if (subtype == optab_vector)
389 return TYPE_SATURATING (type) ? NULL : vashl_optab;
391 gcc_assert (subtype == optab_scalar);
393 if (TYPE_SATURATING(type))
394 return TYPE_UNSIGNED(type) ? usashl_optab : ssashl_optab;
398 if (TREE_CODE (type) == VECTOR_TYPE)
400 if (subtype == optab_vector)
401 return TYPE_UNSIGNED (type) ? vlshr_optab : vashr_optab;
403 gcc_assert (subtype == optab_scalar);
405 return TYPE_UNSIGNED (type) ? lshr_optab : ashr_optab;
408 if (TREE_CODE (type) == VECTOR_TYPE)
410 if (subtype == optab_vector)
413 gcc_assert (subtype == optab_scalar);
418 if (TREE_CODE (type) == VECTOR_TYPE)
420 if (subtype == optab_vector)
423 gcc_assert (subtype == optab_scalar);
428 return TYPE_UNSIGNED (type) ? umax_optab : smax_optab;
431 return TYPE_UNSIGNED (type) ? umin_optab : smin_optab;
433 case REALIGN_LOAD_EXPR:
434 return vec_realign_load_optab;
437 return TYPE_UNSIGNED (type) ? usum_widen_optab : ssum_widen_optab;
440 return TYPE_UNSIGNED (type) ? udot_prod_optab : sdot_prod_optab;
442 case WIDEN_MULT_PLUS_EXPR:
443 return (TYPE_UNSIGNED (type)
444 ? (TYPE_SATURATING (type)
445 ? usmadd_widen_optab : umadd_widen_optab)
446 : (TYPE_SATURATING (type)
447 ? ssmadd_widen_optab : smadd_widen_optab));
449 case WIDEN_MULT_MINUS_EXPR:
450 return (TYPE_UNSIGNED (type)
451 ? (TYPE_SATURATING (type)
452 ? usmsub_widen_optab : umsub_widen_optab)
453 : (TYPE_SATURATING (type)
454 ? ssmsub_widen_optab : smsub_widen_optab));
460 return TYPE_UNSIGNED (type) ? reduc_umax_optab : reduc_smax_optab;
463 return TYPE_UNSIGNED (type) ? reduc_umin_optab : reduc_smin_optab;
465 case REDUC_PLUS_EXPR:
466 return TYPE_UNSIGNED (type) ? reduc_uplus_optab : reduc_splus_optab;
468 case VEC_LSHIFT_EXPR:
469 return vec_shl_optab;
471 case VEC_RSHIFT_EXPR:
472 return vec_shr_optab;
474 case VEC_WIDEN_MULT_HI_EXPR:
475 return TYPE_UNSIGNED (type) ?
476 vec_widen_umult_hi_optab : vec_widen_smult_hi_optab;
478 case VEC_WIDEN_MULT_LO_EXPR:
479 return TYPE_UNSIGNED (type) ?
480 vec_widen_umult_lo_optab : vec_widen_smult_lo_optab;
482 case VEC_UNPACK_HI_EXPR:
483 return TYPE_UNSIGNED (type) ?
484 vec_unpacku_hi_optab : vec_unpacks_hi_optab;
486 case VEC_UNPACK_LO_EXPR:
487 return TYPE_UNSIGNED (type) ?
488 vec_unpacku_lo_optab : vec_unpacks_lo_optab;
490 case VEC_UNPACK_FLOAT_HI_EXPR:
491 /* The signedness is determined from input operand. */
492 return TYPE_UNSIGNED (type) ?
493 vec_unpacku_float_hi_optab : vec_unpacks_float_hi_optab;
495 case VEC_UNPACK_FLOAT_LO_EXPR:
496 /* The signedness is determined from input operand. */
497 return TYPE_UNSIGNED (type) ?
498 vec_unpacku_float_lo_optab : vec_unpacks_float_lo_optab;
500 case VEC_PACK_TRUNC_EXPR:
501 return vec_pack_trunc_optab;
503 case VEC_PACK_SAT_EXPR:
504 return TYPE_UNSIGNED (type) ? vec_pack_usat_optab : vec_pack_ssat_optab;
506 case VEC_PACK_FIX_TRUNC_EXPR:
507 /* The signedness is determined from output operand. */
508 return TYPE_UNSIGNED (type) ?
509 vec_pack_ufix_trunc_optab : vec_pack_sfix_trunc_optab;
515 trapv = INTEGRAL_TYPE_P (type) && TYPE_OVERFLOW_TRAPS (type);
518 case POINTER_PLUS_EXPR:
520 if (TYPE_SATURATING(type))
521 return TYPE_UNSIGNED(type) ? usadd_optab : ssadd_optab;
522 return trapv ? addv_optab : add_optab;
525 if (TYPE_SATURATING(type))
526 return TYPE_UNSIGNED(type) ? ussub_optab : sssub_optab;
527 return trapv ? subv_optab : sub_optab;
530 if (TYPE_SATURATING(type))
531 return TYPE_UNSIGNED(type) ? usmul_optab : ssmul_optab;
532 return trapv ? smulv_optab : smul_optab;
535 if (TYPE_SATURATING(type))
536 return TYPE_UNSIGNED(type) ? usneg_optab : ssneg_optab;
537 return trapv ? negv_optab : neg_optab;
540 return trapv ? absv_optab : abs_optab;
542 case VEC_EXTRACT_EVEN_EXPR:
543 return vec_extract_even_optab;
545 case VEC_EXTRACT_ODD_EXPR:
546 return vec_extract_odd_optab;
548 case VEC_INTERLEAVE_HIGH_EXPR:
549 return vec_interleave_high_optab;
551 case VEC_INTERLEAVE_LOW_EXPR:
552 return vec_interleave_low_optab;
560 /* Expand vector widening operations.
562 There are two different classes of operations handled here:
563 1) Operations whose result is wider than all the arguments to the operation.
564 Examples: VEC_UNPACK_HI/LO_EXPR, VEC_WIDEN_MULT_HI/LO_EXPR
565 In this case OP0 and optionally OP1 would be initialized,
566 but WIDE_OP wouldn't (not relevant for this case).
567 2) Operations whose result is of the same size as the last argument to the
568 operation, but wider than all the other arguments to the operation.
569 Examples: WIDEN_SUM_EXPR, VEC_DOT_PROD_EXPR.
570 In the case WIDE_OP, OP0 and optionally OP1 would be initialized.
572 E.g, when called to expand the following operations, this is how
573 the arguments will be initialized:
575 widening-sum 2 oprnd0 - oprnd1
576 widening-dot-product 3 oprnd0 oprnd1 oprnd2
577 widening-mult 2 oprnd0 oprnd1 -
578 type-promotion (vec-unpack) 1 oprnd0 - - */
581 expand_widen_pattern_expr (sepops ops, rtx op0, rtx op1, rtx wide_op,
582 rtx target, int unsignedp)
584 struct expand_operand eops[4];
585 tree oprnd0, oprnd1, oprnd2;
586 enum machine_mode wmode = VOIDmode, tmode0, tmode1 = VOIDmode;
587 optab widen_pattern_optab;
588 enum insn_code icode;
589 int nops = TREE_CODE_LENGTH (ops->code);
593 tmode0 = TYPE_MODE (TREE_TYPE (oprnd0));
594 widen_pattern_optab =
595 optab_for_tree_code (ops->code, TREE_TYPE (oprnd0), optab_default);
596 if (ops->code == WIDEN_MULT_PLUS_EXPR
597 || ops->code == WIDEN_MULT_MINUS_EXPR)
598 icode = find_widening_optab_handler (widen_pattern_optab,
599 TYPE_MODE (TREE_TYPE (ops->op2)),
602 icode = optab_handler (widen_pattern_optab, tmode0);
603 gcc_assert (icode != CODE_FOR_nothing);
608 tmode1 = TYPE_MODE (TREE_TYPE (oprnd1));
611 /* The last operand is of a wider mode than the rest of the operands. */
616 gcc_assert (tmode1 == tmode0);
619 wmode = TYPE_MODE (TREE_TYPE (oprnd2));
623 create_output_operand (&eops[op++], target, TYPE_MODE (ops->type));
624 create_convert_operand_from (&eops[op++], op0, tmode0, unsignedp);
626 create_convert_operand_from (&eops[op++], op1, tmode1, unsignedp);
628 create_convert_operand_from (&eops[op++], wide_op, wmode, unsignedp);
629 expand_insn (icode, op, eops);
630 return eops[0].value;
633 /* Generate code to perform an operation specified by TERNARY_OPTAB
634 on operands OP0, OP1 and OP2, with result having machine-mode MODE.
636 UNSIGNEDP is for the case where we have to widen the operands
637 to perform the operation. It says to use zero-extension.
639 If TARGET is nonzero, the value
640 is generated there, if it is convenient to do so.
641 In all cases an rtx is returned for the locus of the value;
642 this may or may not be TARGET. */
645 expand_ternary_op (enum machine_mode mode, optab ternary_optab, rtx op0,
646 rtx op1, rtx op2, rtx target, int unsignedp)
648 struct expand_operand ops[4];
649 enum insn_code icode = optab_handler (ternary_optab, mode);
651 gcc_assert (optab_handler (ternary_optab, mode) != CODE_FOR_nothing);
653 create_output_operand (&ops[0], target, mode);
654 create_convert_operand_from (&ops[1], op0, mode, unsignedp);
655 create_convert_operand_from (&ops[2], op1, mode, unsignedp);
656 create_convert_operand_from (&ops[3], op2, mode, unsignedp);
657 expand_insn (icode, 4, ops);
662 /* Like expand_binop, but return a constant rtx if the result can be
663 calculated at compile time. The arguments and return value are
664 otherwise the same as for expand_binop. */
667 simplify_expand_binop (enum machine_mode mode, optab binoptab,
668 rtx op0, rtx op1, rtx target, int unsignedp,
669 enum optab_methods methods)
671 if (CONSTANT_P (op0) && CONSTANT_P (op1))
673 rtx x = simplify_binary_operation (binoptab->code, mode, op0, op1);
679 return expand_binop (mode, binoptab, op0, op1, target, unsignedp, methods);
682 /* Like simplify_expand_binop, but always put the result in TARGET.
683 Return true if the expansion succeeded. */
686 force_expand_binop (enum machine_mode mode, optab binoptab,
687 rtx op0, rtx op1, rtx target, int unsignedp,
688 enum optab_methods methods)
690 rtx x = simplify_expand_binop (mode, binoptab, op0, op1,
691 target, unsignedp, methods);
695 emit_move_insn (target, x);
699 /* Generate insns for VEC_LSHIFT_EXPR, VEC_RSHIFT_EXPR. */
702 expand_vec_shift_expr (sepops ops, rtx target)
704 struct expand_operand eops[3];
705 enum insn_code icode;
706 rtx rtx_op1, rtx_op2;
707 enum machine_mode mode = TYPE_MODE (ops->type);
708 tree vec_oprnd = ops->op0;
709 tree shift_oprnd = ops->op1;
714 case VEC_RSHIFT_EXPR:
715 shift_optab = vec_shr_optab;
717 case VEC_LSHIFT_EXPR:
718 shift_optab = vec_shl_optab;
724 icode = optab_handler (shift_optab, mode);
725 gcc_assert (icode != CODE_FOR_nothing);
727 rtx_op1 = expand_normal (vec_oprnd);
728 rtx_op2 = expand_normal (shift_oprnd);
730 create_output_operand (&eops[0], target, mode);
731 create_input_operand (&eops[1], rtx_op1, GET_MODE (rtx_op1));
732 create_convert_operand_from_type (&eops[2], rtx_op2, TREE_TYPE (shift_oprnd));
733 expand_insn (icode, 3, eops);
735 return eops[0].value;
738 /* Create a new vector value in VMODE with all elements set to OP. The
739 mode of OP must be the element mode of VMODE. If OP is a constant,
740 then the return value will be a constant. */
743 expand_vector_broadcast (enum machine_mode vmode, rtx op)
745 enum insn_code icode;
750 gcc_checking_assert (VECTOR_MODE_P (vmode));
752 n = GET_MODE_NUNITS (vmode);
753 vec = rtvec_alloc (n);
754 for (i = 0; i < n; ++i)
755 RTVEC_ELT (vec, i) = op;
758 return gen_rtx_CONST_VECTOR (vmode, vec);
760 /* ??? If the target doesn't have a vec_init, then we have no easy way
761 of performing this operation. Most of this sort of generic support
762 is hidden away in the vector lowering support in gimple. */
763 icode = optab_handler (vec_init_optab, vmode);
764 if (icode == CODE_FOR_nothing)
767 ret = gen_reg_rtx (vmode);
768 emit_insn (GEN_FCN (icode) (ret, gen_rtx_PARALLEL (vmode, vec)));
773 /* This subroutine of expand_doubleword_shift handles the cases in which
774 the effective shift value is >= BITS_PER_WORD. The arguments and return
775 value are the same as for the parent routine, except that SUPERWORD_OP1
776 is the shift count to use when shifting OUTOF_INPUT into INTO_TARGET.
777 INTO_TARGET may be null if the caller has decided to calculate it. */
780 expand_superword_shift (optab binoptab, rtx outof_input, rtx superword_op1,
781 rtx outof_target, rtx into_target,
782 int unsignedp, enum optab_methods methods)
784 if (into_target != 0)
785 if (!force_expand_binop (word_mode, binoptab, outof_input, superword_op1,
786 into_target, unsignedp, methods))
789 if (outof_target != 0)
791 /* For a signed right shift, we must fill OUTOF_TARGET with copies
792 of the sign bit, otherwise we must fill it with zeros. */
793 if (binoptab != ashr_optab)
794 emit_move_insn (outof_target, CONST0_RTX (word_mode));
796 if (!force_expand_binop (word_mode, binoptab,
797 outof_input, GEN_INT (BITS_PER_WORD - 1),
798 outof_target, unsignedp, methods))
804 /* This subroutine of expand_doubleword_shift handles the cases in which
805 the effective shift value is < BITS_PER_WORD. The arguments and return
806 value are the same as for the parent routine. */
809 expand_subword_shift (enum machine_mode op1_mode, optab binoptab,
810 rtx outof_input, rtx into_input, rtx op1,
811 rtx outof_target, rtx into_target,
812 int unsignedp, enum optab_methods methods,
813 unsigned HOST_WIDE_INT shift_mask)
815 optab reverse_unsigned_shift, unsigned_shift;
818 reverse_unsigned_shift = (binoptab == ashl_optab ? lshr_optab : ashl_optab);
819 unsigned_shift = (binoptab == ashl_optab ? ashl_optab : lshr_optab);
821 /* The low OP1 bits of INTO_TARGET come from the high bits of OUTOF_INPUT.
822 We therefore need to shift OUTOF_INPUT by (BITS_PER_WORD - OP1) bits in
823 the opposite direction to BINOPTAB. */
824 if (CONSTANT_P (op1) || shift_mask >= BITS_PER_WORD)
826 carries = outof_input;
827 tmp = immed_double_const (BITS_PER_WORD, 0, op1_mode);
828 tmp = simplify_expand_binop (op1_mode, sub_optab, tmp, op1,
833 /* We must avoid shifting by BITS_PER_WORD bits since that is either
834 the same as a zero shift (if shift_mask == BITS_PER_WORD - 1) or
835 has unknown behavior. Do a single shift first, then shift by the
836 remainder. It's OK to use ~OP1 as the remainder if shift counts
837 are truncated to the mode size. */
838 carries = expand_binop (word_mode, reverse_unsigned_shift,
839 outof_input, const1_rtx, 0, unsignedp, methods);
840 if (shift_mask == BITS_PER_WORD - 1)
842 tmp = immed_double_const (-1, -1, op1_mode);
843 tmp = simplify_expand_binop (op1_mode, xor_optab, op1, tmp,
848 tmp = immed_double_const (BITS_PER_WORD - 1, 0, op1_mode);
849 tmp = simplify_expand_binop (op1_mode, sub_optab, tmp, op1,
853 if (tmp == 0 || carries == 0)
855 carries = expand_binop (word_mode, reverse_unsigned_shift,
856 carries, tmp, 0, unsignedp, methods);
860 /* Shift INTO_INPUT logically by OP1. This is the last use of INTO_INPUT
861 so the result can go directly into INTO_TARGET if convenient. */
862 tmp = expand_binop (word_mode, unsigned_shift, into_input, op1,
863 into_target, unsignedp, methods);
867 /* Now OR in the bits carried over from OUTOF_INPUT. */
868 if (!force_expand_binop (word_mode, ior_optab, tmp, carries,
869 into_target, unsignedp, methods))
872 /* Use a standard word_mode shift for the out-of half. */
873 if (outof_target != 0)
874 if (!force_expand_binop (word_mode, binoptab, outof_input, op1,
875 outof_target, unsignedp, methods))
882 #ifdef HAVE_conditional_move
883 /* Try implementing expand_doubleword_shift using conditional moves.
884 The shift is by < BITS_PER_WORD if (CMP_CODE CMP1 CMP2) is true,
885 otherwise it is by >= BITS_PER_WORD. SUBWORD_OP1 and SUPERWORD_OP1
886 are the shift counts to use in the former and latter case. All other
887 arguments are the same as the parent routine. */
890 expand_doubleword_shift_condmove (enum machine_mode op1_mode, optab binoptab,
891 enum rtx_code cmp_code, rtx cmp1, rtx cmp2,
892 rtx outof_input, rtx into_input,
893 rtx subword_op1, rtx superword_op1,
894 rtx outof_target, rtx into_target,
895 int unsignedp, enum optab_methods methods,
896 unsigned HOST_WIDE_INT shift_mask)
898 rtx outof_superword, into_superword;
900 /* Put the superword version of the output into OUTOF_SUPERWORD and
902 outof_superword = outof_target != 0 ? gen_reg_rtx (word_mode) : 0;
903 if (outof_target != 0 && subword_op1 == superword_op1)
905 /* The value INTO_TARGET >> SUBWORD_OP1, which we later store in
906 OUTOF_TARGET, is the same as the value of INTO_SUPERWORD. */
907 into_superword = outof_target;
908 if (!expand_superword_shift (binoptab, outof_input, superword_op1,
909 outof_superword, 0, unsignedp, methods))
914 into_superword = gen_reg_rtx (word_mode);
915 if (!expand_superword_shift (binoptab, outof_input, superword_op1,
916 outof_superword, into_superword,
921 /* Put the subword version directly in OUTOF_TARGET and INTO_TARGET. */
922 if (!expand_subword_shift (op1_mode, binoptab,
923 outof_input, into_input, subword_op1,
924 outof_target, into_target,
925 unsignedp, methods, shift_mask))
928 /* Select between them. Do the INTO half first because INTO_SUPERWORD
929 might be the current value of OUTOF_TARGET. */
930 if (!emit_conditional_move (into_target, cmp_code, cmp1, cmp2, op1_mode,
931 into_target, into_superword, word_mode, false))
934 if (outof_target != 0)
935 if (!emit_conditional_move (outof_target, cmp_code, cmp1, cmp2, op1_mode,
936 outof_target, outof_superword,
944 /* Expand a doubleword shift (ashl, ashr or lshr) using word-mode shifts.
945 OUTOF_INPUT and INTO_INPUT are the two word-sized halves of the first
946 input operand; the shift moves bits in the direction OUTOF_INPUT->
947 INTO_TARGET. OUTOF_TARGET and INTO_TARGET are the equivalent words
948 of the target. OP1 is the shift count and OP1_MODE is its mode.
949 If OP1 is constant, it will have been truncated as appropriate
950 and is known to be nonzero.
952 If SHIFT_MASK is zero, the result of word shifts is undefined when the
953 shift count is outside the range [0, BITS_PER_WORD). This routine must
954 avoid generating such shifts for OP1s in the range [0, BITS_PER_WORD * 2).
956 If SHIFT_MASK is nonzero, all word-mode shift counts are effectively
957 masked by it and shifts in the range [BITS_PER_WORD, SHIFT_MASK) will
958 fill with zeros or sign bits as appropriate.
960 If SHIFT_MASK is BITS_PER_WORD - 1, this routine will synthesize
961 a doubleword shift whose equivalent mask is BITS_PER_WORD * 2 - 1.
962 Doing this preserves semantics required by SHIFT_COUNT_TRUNCATED.
963 In all other cases, shifts by values outside [0, BITS_PER_UNIT * 2)
966 BINOPTAB, UNSIGNEDP and METHODS are as for expand_binop. This function
967 may not use INTO_INPUT after modifying INTO_TARGET, and similarly for
968 OUTOF_INPUT and OUTOF_TARGET. OUTOF_TARGET can be null if the parent
969 function wants to calculate it itself.
971 Return true if the shift could be successfully synthesized. */
974 expand_doubleword_shift (enum machine_mode op1_mode, optab binoptab,
975 rtx outof_input, rtx into_input, rtx op1,
976 rtx outof_target, rtx into_target,
977 int unsignedp, enum optab_methods methods,
978 unsigned HOST_WIDE_INT shift_mask)
980 rtx superword_op1, tmp, cmp1, cmp2;
981 rtx subword_label, done_label;
982 enum rtx_code cmp_code;
984 /* See if word-mode shifts by BITS_PER_WORD...BITS_PER_WORD * 2 - 1 will
985 fill the result with sign or zero bits as appropriate. If so, the value
986 of OUTOF_TARGET will always be (SHIFT OUTOF_INPUT OP1). Recursively call
987 this routine to calculate INTO_TARGET (which depends on both OUTOF_INPUT
988 and INTO_INPUT), then emit code to set up OUTOF_TARGET.
990 This isn't worthwhile for constant shifts since the optimizers will
991 cope better with in-range shift counts. */
992 if (shift_mask >= BITS_PER_WORD
994 && !CONSTANT_P (op1))
996 if (!expand_doubleword_shift (op1_mode, binoptab,
997 outof_input, into_input, op1,
999 unsignedp, methods, shift_mask))
1001 if (!force_expand_binop (word_mode, binoptab, outof_input, op1,
1002 outof_target, unsignedp, methods))
1007 /* Set CMP_CODE, CMP1 and CMP2 so that the rtx (CMP_CODE CMP1 CMP2)
1008 is true when the effective shift value is less than BITS_PER_WORD.
1009 Set SUPERWORD_OP1 to the shift count that should be used to shift
1010 OUTOF_INPUT into INTO_TARGET when the condition is false. */
1011 tmp = immed_double_const (BITS_PER_WORD, 0, op1_mode);
1012 if (!CONSTANT_P (op1) && shift_mask == BITS_PER_WORD - 1)
1014 /* Set CMP1 to OP1 & BITS_PER_WORD. The result is zero iff OP1
1015 is a subword shift count. */
1016 cmp1 = simplify_expand_binop (op1_mode, and_optab, op1, tmp,
1018 cmp2 = CONST0_RTX (op1_mode);
1020 superword_op1 = op1;
1024 /* Set CMP1 to OP1 - BITS_PER_WORD. */
1025 cmp1 = simplify_expand_binop (op1_mode, sub_optab, op1, tmp,
1027 cmp2 = CONST0_RTX (op1_mode);
1029 superword_op1 = cmp1;
1034 /* If we can compute the condition at compile time, pick the
1035 appropriate subroutine. */
1036 tmp = simplify_relational_operation (cmp_code, SImode, op1_mode, cmp1, cmp2);
1037 if (tmp != 0 && CONST_INT_P (tmp))
1039 if (tmp == const0_rtx)
1040 return expand_superword_shift (binoptab, outof_input, superword_op1,
1041 outof_target, into_target,
1042 unsignedp, methods);
1044 return expand_subword_shift (op1_mode, binoptab,
1045 outof_input, into_input, op1,
1046 outof_target, into_target,
1047 unsignedp, methods, shift_mask);
1050 #ifdef HAVE_conditional_move
1051 /* Try using conditional moves to generate straight-line code. */
1053 rtx start = get_last_insn ();
1054 if (expand_doubleword_shift_condmove (op1_mode, binoptab,
1055 cmp_code, cmp1, cmp2,
1056 outof_input, into_input,
1058 outof_target, into_target,
1059 unsignedp, methods, shift_mask))
1061 delete_insns_since (start);
1065 /* As a last resort, use branches to select the correct alternative. */
1066 subword_label = gen_label_rtx ();
1067 done_label = gen_label_rtx ();
1070 do_compare_rtx_and_jump (cmp1, cmp2, cmp_code, false, op1_mode,
1071 0, 0, subword_label, -1);
1074 if (!expand_superword_shift (binoptab, outof_input, superword_op1,
1075 outof_target, into_target,
1076 unsignedp, methods))
1079 emit_jump_insn (gen_jump (done_label));
1081 emit_label (subword_label);
1083 if (!expand_subword_shift (op1_mode, binoptab,
1084 outof_input, into_input, op1,
1085 outof_target, into_target,
1086 unsignedp, methods, shift_mask))
1089 emit_label (done_label);
1093 /* Subroutine of expand_binop. Perform a double word multiplication of
1094 operands OP0 and OP1 both of mode MODE, which is exactly twice as wide
1095 as the target's word_mode. This function return NULL_RTX if anything
1096 goes wrong, in which case it may have already emitted instructions
1097 which need to be deleted.
1099 If we want to multiply two two-word values and have normal and widening
1100 multiplies of single-word values, we can do this with three smaller
1103 The multiplication proceeds as follows:
1104 _______________________
1105 [__op0_high_|__op0_low__]
1106 _______________________
1107 * [__op1_high_|__op1_low__]
1108 _______________________________________________
1109 _______________________
1110 (1) [__op0_low__*__op1_low__]
1111 _______________________
1112 (2a) [__op0_low__*__op1_high_]
1113 _______________________
1114 (2b) [__op0_high_*__op1_low__]
1115 _______________________
1116 (3) [__op0_high_*__op1_high_]
1119 This gives a 4-word result. Since we are only interested in the
1120 lower 2 words, partial result (3) and the upper words of (2a) and
1121 (2b) don't need to be calculated. Hence (2a) and (2b) can be
1122 calculated using non-widening multiplication.
1124 (1), however, needs to be calculated with an unsigned widening
1125 multiplication. If this operation is not directly supported we
1126 try using a signed widening multiplication and adjust the result.
1127 This adjustment works as follows:
1129 If both operands are positive then no adjustment is needed.
1131 If the operands have different signs, for example op0_low < 0 and
1132 op1_low >= 0, the instruction treats the most significant bit of
1133 op0_low as a sign bit instead of a bit with significance
1134 2**(BITS_PER_WORD-1), i.e. the instruction multiplies op1_low
1135 with 2**BITS_PER_WORD - op0_low, and two's complements the
1136 result. Conclusion: We need to add op1_low * 2**BITS_PER_WORD to
1139 Similarly, if both operands are negative, we need to add
1140 (op0_low + op1_low) * 2**BITS_PER_WORD.
1142 We use a trick to adjust quickly. We logically shift op0_low right
1143 (op1_low) BITS_PER_WORD-1 steps to get 0 or 1, and add this to
1144 op0_high (op1_high) before it is used to calculate 2b (2a). If no
1145 logical shift exists, we do an arithmetic right shift and subtract
1149 expand_doubleword_mult (enum machine_mode mode, rtx op0, rtx op1, rtx target,
1150 bool umulp, enum optab_methods methods)
1152 int low = (WORDS_BIG_ENDIAN ? 1 : 0);
1153 int high = (WORDS_BIG_ENDIAN ? 0 : 1);
1154 rtx wordm1 = umulp ? NULL_RTX : GEN_INT (BITS_PER_WORD - 1);
1155 rtx product, adjust, product_high, temp;
1157 rtx op0_high = operand_subword_force (op0, high, mode);
1158 rtx op0_low = operand_subword_force (op0, low, mode);
1159 rtx op1_high = operand_subword_force (op1, high, mode);
1160 rtx op1_low = operand_subword_force (op1, low, mode);
1162 /* If we're using an unsigned multiply to directly compute the product
1163 of the low-order words of the operands and perform any required
1164 adjustments of the operands, we begin by trying two more multiplications
1165 and then computing the appropriate sum.
1167 We have checked above that the required addition is provided.
1168 Full-word addition will normally always succeed, especially if
1169 it is provided at all, so we don't worry about its failure. The
1170 multiplication may well fail, however, so we do handle that. */
1174 /* ??? This could be done with emit_store_flag where available. */
1175 temp = expand_binop (word_mode, lshr_optab, op0_low, wordm1,
1176 NULL_RTX, 1, methods);
1178 op0_high = expand_binop (word_mode, add_optab, op0_high, temp,
1179 NULL_RTX, 0, OPTAB_DIRECT);
1182 temp = expand_binop (word_mode, ashr_optab, op0_low, wordm1,
1183 NULL_RTX, 0, methods);
1186 op0_high = expand_binop (word_mode, sub_optab, op0_high, temp,
1187 NULL_RTX, 0, OPTAB_DIRECT);
1194 adjust = expand_binop (word_mode, smul_optab, op0_high, op1_low,
1195 NULL_RTX, 0, OPTAB_DIRECT);
1199 /* OP0_HIGH should now be dead. */
1203 /* ??? This could be done with emit_store_flag where available. */
1204 temp = expand_binop (word_mode, lshr_optab, op1_low, wordm1,
1205 NULL_RTX, 1, methods);
1207 op1_high = expand_binop (word_mode, add_optab, op1_high, temp,
1208 NULL_RTX, 0, OPTAB_DIRECT);
1211 temp = expand_binop (word_mode, ashr_optab, op1_low, wordm1,
1212 NULL_RTX, 0, methods);
1215 op1_high = expand_binop (word_mode, sub_optab, op1_high, temp,
1216 NULL_RTX, 0, OPTAB_DIRECT);
1223 temp = expand_binop (word_mode, smul_optab, op1_high, op0_low,
1224 NULL_RTX, 0, OPTAB_DIRECT);
1228 /* OP1_HIGH should now be dead. */
1230 adjust = expand_binop (word_mode, add_optab, adjust, temp,
1231 NULL_RTX, 0, OPTAB_DIRECT);
1233 if (target && !REG_P (target))
1237 product = expand_binop (mode, umul_widen_optab, op0_low, op1_low,
1238 target, 1, OPTAB_DIRECT);
1240 product = expand_binop (mode, smul_widen_optab, op0_low, op1_low,
1241 target, 1, OPTAB_DIRECT);
1246 product_high = operand_subword (product, high, 1, mode);
1247 adjust = expand_binop (word_mode, add_optab, product_high, adjust,
1248 NULL_RTX, 0, OPTAB_DIRECT);
1249 emit_move_insn (product_high, adjust);
1253 /* Wrapper around expand_binop which takes an rtx code to specify
1254 the operation to perform, not an optab pointer. All other
1255 arguments are the same. */
1257 expand_simple_binop (enum machine_mode mode, enum rtx_code code, rtx op0,
1258 rtx op1, rtx target, int unsignedp,
1259 enum optab_methods methods)
1261 optab binop = code_to_optab[(int) code];
1264 return expand_binop (mode, binop, op0, op1, target, unsignedp, methods);
1267 /* Return whether OP0 and OP1 should be swapped when expanding a commutative
1268 binop. Order them according to commutative_operand_precedence and, if
1269 possible, try to put TARGET or a pseudo first. */
1271 swap_commutative_operands_with_target (rtx target, rtx op0, rtx op1)
1273 int op0_prec = commutative_operand_precedence (op0);
1274 int op1_prec = commutative_operand_precedence (op1);
1276 if (op0_prec < op1_prec)
1279 if (op0_prec > op1_prec)
1282 /* With equal precedence, both orders are ok, but it is better if the
1283 first operand is TARGET, or if both TARGET and OP0 are pseudos. */
1284 if (target == 0 || REG_P (target))
1285 return (REG_P (op1) && !REG_P (op0)) || target == op1;
1287 return rtx_equal_p (op1, target);
1290 /* Return true if BINOPTAB implements a shift operation. */
1293 shift_optab_p (optab binoptab)
1295 switch (binoptab->code)
1311 /* Return true if BINOPTAB implements a commutative binary operation. */
1314 commutative_optab_p (optab binoptab)
1316 return (GET_RTX_CLASS (binoptab->code) == RTX_COMM_ARITH
1317 || binoptab == smul_widen_optab
1318 || binoptab == umul_widen_optab
1319 || binoptab == smul_highpart_optab
1320 || binoptab == umul_highpart_optab);
1323 /* X is to be used in mode MODE as operand OPN to BINOPTAB. If we're
1324 optimizing, and if the operand is a constant that costs more than
1325 1 instruction, force the constant into a register and return that
1326 register. Return X otherwise. UNSIGNEDP says whether X is unsigned. */
1329 avoid_expensive_constant (enum machine_mode mode, optab binoptab,
1330 int opn, rtx x, bool unsignedp)
1332 bool speed = optimize_insn_for_speed_p ();
1334 if (mode != VOIDmode
1337 && rtx_cost (x, binoptab->code, opn, speed) > set_src_cost (x, speed))
1339 if (CONST_INT_P (x))
1341 HOST_WIDE_INT intval = trunc_int_for_mode (INTVAL (x), mode);
1342 if (intval != INTVAL (x))
1343 x = GEN_INT (intval);
1346 x = convert_modes (mode, VOIDmode, x, unsignedp);
1347 x = force_reg (mode, x);
1352 /* Helper function for expand_binop: handle the case where there
1353 is an insn that directly implements the indicated operation.
1354 Returns null if this is not possible. */
1356 expand_binop_directly (enum machine_mode mode, optab binoptab,
1358 rtx target, int unsignedp, enum optab_methods methods,
1361 enum machine_mode from_mode = widened_mode (mode, op0, op1);
1362 enum insn_code icode = find_widening_optab_handler (binoptab, mode,
1364 enum machine_mode xmode0 = insn_data[(int) icode].operand[1].mode;
1365 enum machine_mode xmode1 = insn_data[(int) icode].operand[2].mode;
1366 enum machine_mode mode0, mode1, tmp_mode;
1367 struct expand_operand ops[3];
1370 rtx xop0 = op0, xop1 = op1;
1373 /* If it is a commutative operator and the modes would match
1374 if we would swap the operands, we can save the conversions. */
1375 commutative_p = commutative_optab_p (binoptab);
1377 && GET_MODE (xop0) != xmode0 && GET_MODE (xop1) != xmode1
1378 && GET_MODE (xop0) == xmode1 && GET_MODE (xop1) == xmode1)
1385 /* If we are optimizing, force expensive constants into a register. */
1386 xop0 = avoid_expensive_constant (xmode0, binoptab, 0, xop0, unsignedp);
1387 if (!shift_optab_p (binoptab))
1388 xop1 = avoid_expensive_constant (xmode1, binoptab, 1, xop1, unsignedp);
1390 /* In case the insn wants input operands in modes different from
1391 those of the actual operands, convert the operands. It would
1392 seem that we don't need to convert CONST_INTs, but we do, so
1393 that they're properly zero-extended, sign-extended or truncated
1396 mode0 = GET_MODE (xop0) != VOIDmode ? GET_MODE (xop0) : mode;
1397 if (xmode0 != VOIDmode && xmode0 != mode0)
1399 xop0 = convert_modes (xmode0, mode0, xop0, unsignedp);
1403 mode1 = GET_MODE (xop1) != VOIDmode ? GET_MODE (xop1) : mode;
1404 if (xmode1 != VOIDmode && xmode1 != mode1)
1406 xop1 = convert_modes (xmode1, mode1, xop1, unsignedp);
1410 /* If operation is commutative,
1411 try to make the first operand a register.
1412 Even better, try to make it the same as the target.
1413 Also try to make the last operand a constant. */
1415 && swap_commutative_operands_with_target (target, xop0, xop1))
1422 /* Now, if insn's predicates don't allow our operands, put them into
1425 if (binoptab == vec_pack_trunc_optab
1426 || binoptab == vec_pack_usat_optab
1427 || binoptab == vec_pack_ssat_optab
1428 || binoptab == vec_pack_ufix_trunc_optab
1429 || binoptab == vec_pack_sfix_trunc_optab)
1431 /* The mode of the result is different then the mode of the
1433 tmp_mode = insn_data[(int) icode].operand[0].mode;
1434 if (GET_MODE_NUNITS (tmp_mode) != 2 * GET_MODE_NUNITS (mode))
1436 delete_insns_since (last);
1443 create_output_operand (&ops[0], target, tmp_mode);
1444 create_input_operand (&ops[1], xop0, mode0);
1445 create_input_operand (&ops[2], xop1, mode1);
1446 pat = maybe_gen_insn (icode, 3, ops);
1449 /* If PAT is composed of more than one insn, try to add an appropriate
1450 REG_EQUAL note to it. If we can't because TEMP conflicts with an
1451 operand, call expand_binop again, this time without a target. */
1452 if (INSN_P (pat) && NEXT_INSN (pat) != NULL_RTX
1453 && ! add_equal_note (pat, ops[0].value, binoptab->code,
1454 ops[1].value, ops[2].value))
1456 delete_insns_since (last);
1457 return expand_binop (mode, binoptab, op0, op1, NULL_RTX,
1458 unsignedp, methods);
1462 return ops[0].value;
1464 delete_insns_since (last);
1468 /* Generate code to perform an operation specified by BINOPTAB
1469 on operands OP0 and OP1, with result having machine-mode MODE.
1471 UNSIGNEDP is for the case where we have to widen the operands
1472 to perform the operation. It says to use zero-extension.
1474 If TARGET is nonzero, the value
1475 is generated there, if it is convenient to do so.
1476 In all cases an rtx is returned for the locus of the value;
1477 this may or may not be TARGET. */
1480 expand_binop (enum machine_mode mode, optab binoptab, rtx op0, rtx op1,
1481 rtx target, int unsignedp, enum optab_methods methods)
1483 enum optab_methods next_methods
1484 = (methods == OPTAB_LIB || methods == OPTAB_LIB_WIDEN
1485 ? OPTAB_WIDEN : methods);
1486 enum mode_class mclass;
1487 enum machine_mode wider_mode;
1490 rtx entry_last = get_last_insn ();
1493 mclass = GET_MODE_CLASS (mode);
1495 /* If subtracting an integer constant, convert this into an addition of
1496 the negated constant. */
1498 if (binoptab == sub_optab && CONST_INT_P (op1))
1500 op1 = negate_rtx (mode, op1);
1501 binoptab = add_optab;
1504 /* Record where to delete back to if we backtrack. */
1505 last = get_last_insn ();
1507 /* If we can do it with a three-operand insn, do so. */
1509 if (methods != OPTAB_MUST_WIDEN
1510 && find_widening_optab_handler (binoptab, mode,
1511 widened_mode (mode, op0, op1), 1)
1512 != CODE_FOR_nothing)
1514 temp = expand_binop_directly (mode, binoptab, op0, op1, target,
1515 unsignedp, methods, last);
1520 /* If we were trying to rotate, and that didn't work, try rotating
1521 the other direction before falling back to shifts and bitwise-or. */
1522 if (((binoptab == rotl_optab
1523 && optab_handler (rotr_optab, mode) != CODE_FOR_nothing)
1524 || (binoptab == rotr_optab
1525 && optab_handler (rotl_optab, mode) != CODE_FOR_nothing))
1526 && mclass == MODE_INT)
1528 optab otheroptab = (binoptab == rotl_optab ? rotr_optab : rotl_optab);
1530 unsigned int bits = GET_MODE_PRECISION (mode);
1532 if (CONST_INT_P (op1))
1533 newop1 = GEN_INT (bits - INTVAL (op1));
1534 else if (targetm.shift_truncation_mask (mode) == bits - 1)
1535 newop1 = negate_rtx (GET_MODE (op1), op1);
1537 newop1 = expand_binop (GET_MODE (op1), sub_optab,
1538 GEN_INT (bits), op1,
1539 NULL_RTX, unsignedp, OPTAB_DIRECT);
1541 temp = expand_binop_directly (mode, otheroptab, op0, newop1,
1542 target, unsignedp, methods, last);
1547 /* If this is a multiply, see if we can do a widening operation that
1548 takes operands of this mode and makes a wider mode. */
1550 if (binoptab == smul_optab
1551 && GET_MODE_2XWIDER_MODE (mode) != VOIDmode
1552 && (widening_optab_handler ((unsignedp ? umul_widen_optab
1553 : smul_widen_optab),
1554 GET_MODE_2XWIDER_MODE (mode), mode)
1555 != CODE_FOR_nothing))
1557 temp = expand_binop (GET_MODE_2XWIDER_MODE (mode),
1558 unsignedp ? umul_widen_optab : smul_widen_optab,
1559 op0, op1, NULL_RTX, unsignedp, OPTAB_DIRECT);
1563 if (GET_MODE_CLASS (mode) == MODE_INT
1564 && TRULY_NOOP_TRUNCATION_MODES_P (mode, GET_MODE (temp)))
1565 return gen_lowpart (mode, temp);
1567 return convert_to_mode (mode, temp, unsignedp);
1571 /* If this is a vector shift by a scalar, see if we can do a vector
1572 shift by a vector. If so, broadcast the scalar into a vector. */
1573 if (mclass == MODE_VECTOR_INT)
1575 optab otheroptab = NULL;
1577 if (binoptab == ashl_optab)
1578 otheroptab = vashl_optab;
1579 else if (binoptab == ashr_optab)
1580 otheroptab = vashr_optab;
1581 else if (binoptab == lshr_optab)
1582 otheroptab = vlshr_optab;
1583 else if (binoptab == rotl_optab)
1584 otheroptab = vrotl_optab;
1585 else if (binoptab == rotr_optab)
1586 otheroptab = vrotr_optab;
1588 if (otheroptab && optab_handler (otheroptab, mode) != CODE_FOR_nothing)
1590 rtx vop1 = expand_vector_broadcast (mode, op1);
1593 temp = expand_binop_directly (mode, otheroptab, op0, vop1,
1594 target, unsignedp, methods, last);
1601 /* Look for a wider mode of the same class for which we think we
1602 can open-code the operation. Check for a widening multiply at the
1603 wider mode as well. */
1605 if (CLASS_HAS_WIDER_MODES_P (mclass)
1606 && methods != OPTAB_DIRECT && methods != OPTAB_LIB)
1607 for (wider_mode = GET_MODE_WIDER_MODE (mode);
1608 wider_mode != VOIDmode;
1609 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
1611 if (optab_handler (binoptab, wider_mode) != CODE_FOR_nothing
1612 || (binoptab == smul_optab
1613 && GET_MODE_WIDER_MODE (wider_mode) != VOIDmode
1614 && (find_widening_optab_handler ((unsignedp
1616 : smul_widen_optab),
1617 GET_MODE_WIDER_MODE (wider_mode),
1619 != CODE_FOR_nothing)))
1621 rtx xop0 = op0, xop1 = op1;
1624 /* For certain integer operations, we need not actually extend
1625 the narrow operands, as long as we will truncate
1626 the results to the same narrowness. */
1628 if ((binoptab == ior_optab || binoptab == and_optab
1629 || binoptab == xor_optab
1630 || binoptab == add_optab || binoptab == sub_optab
1631 || binoptab == smul_optab || binoptab == ashl_optab)
1632 && mclass == MODE_INT)
1635 xop0 = avoid_expensive_constant (mode, binoptab, 0,
1637 if (binoptab != ashl_optab)
1638 xop1 = avoid_expensive_constant (mode, binoptab, 1,
1642 xop0 = widen_operand (xop0, wider_mode, mode, unsignedp, no_extend);
1644 /* The second operand of a shift must always be extended. */
1645 xop1 = widen_operand (xop1, wider_mode, mode, unsignedp,
1646 no_extend && binoptab != ashl_optab);
1648 temp = expand_binop (wider_mode, binoptab, xop0, xop1, NULL_RTX,
1649 unsignedp, OPTAB_DIRECT);
1652 if (mclass != MODE_INT
1653 || !TRULY_NOOP_TRUNCATION_MODES_P (mode, wider_mode))
1656 target = gen_reg_rtx (mode);
1657 convert_move (target, temp, 0);
1661 return gen_lowpart (mode, temp);
1664 delete_insns_since (last);
1668 /* If operation is commutative,
1669 try to make the first operand a register.
1670 Even better, try to make it the same as the target.
1671 Also try to make the last operand a constant. */
1672 if (commutative_optab_p (binoptab)
1673 && swap_commutative_operands_with_target (target, op0, op1))
1680 /* These can be done a word at a time. */
1681 if ((binoptab == and_optab || binoptab == ior_optab || binoptab == xor_optab)
1682 && mclass == MODE_INT
1683 && GET_MODE_SIZE (mode) > UNITS_PER_WORD
1684 && optab_handler (binoptab, word_mode) != CODE_FOR_nothing)
1689 /* If TARGET is the same as one of the operands, the REG_EQUAL note
1690 won't be accurate, so use a new target. */
1694 || !valid_multiword_target_p (target))
1695 target = gen_reg_rtx (mode);
1699 /* Do the actual arithmetic. */
1700 for (i = 0; i < GET_MODE_BITSIZE (mode) / BITS_PER_WORD; i++)
1702 rtx target_piece = operand_subword (target, i, 1, mode);
1703 rtx x = expand_binop (word_mode, binoptab,
1704 operand_subword_force (op0, i, mode),
1705 operand_subword_force (op1, i, mode),
1706 target_piece, unsignedp, next_methods);
1711 if (target_piece != x)
1712 emit_move_insn (target_piece, x);
1715 insns = get_insns ();
1718 if (i == GET_MODE_BITSIZE (mode) / BITS_PER_WORD)
1725 /* Synthesize double word shifts from single word shifts. */
1726 if ((binoptab == lshr_optab || binoptab == ashl_optab
1727 || binoptab == ashr_optab)
1728 && mclass == MODE_INT
1729 && (CONST_INT_P (op1) || optimize_insn_for_speed_p ())
1730 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
1731 && GET_MODE_PRECISION (mode) == GET_MODE_BITSIZE (mode)
1732 && optab_handler (binoptab, word_mode) != CODE_FOR_nothing
1733 && optab_handler (ashl_optab, word_mode) != CODE_FOR_nothing
1734 && optab_handler (lshr_optab, word_mode) != CODE_FOR_nothing)
1736 unsigned HOST_WIDE_INT shift_mask, double_shift_mask;
1737 enum machine_mode op1_mode;
1739 double_shift_mask = targetm.shift_truncation_mask (mode);
1740 shift_mask = targetm.shift_truncation_mask (word_mode);
1741 op1_mode = GET_MODE (op1) != VOIDmode ? GET_MODE (op1) : word_mode;
1743 /* Apply the truncation to constant shifts. */
1744 if (double_shift_mask > 0 && CONST_INT_P (op1))
1745 op1 = GEN_INT (INTVAL (op1) & double_shift_mask);
1747 if (op1 == CONST0_RTX (op1_mode))
1750 /* Make sure that this is a combination that expand_doubleword_shift
1751 can handle. See the comments there for details. */
1752 if (double_shift_mask == 0
1753 || (shift_mask == BITS_PER_WORD - 1
1754 && double_shift_mask == BITS_PER_WORD * 2 - 1))
1757 rtx into_target, outof_target;
1758 rtx into_input, outof_input;
1759 int left_shift, outof_word;
1761 /* If TARGET is the same as one of the operands, the REG_EQUAL note
1762 won't be accurate, so use a new target. */
1766 || !valid_multiword_target_p (target))
1767 target = gen_reg_rtx (mode);
1771 /* OUTOF_* is the word we are shifting bits away from, and
1772 INTO_* is the word that we are shifting bits towards, thus
1773 they differ depending on the direction of the shift and
1774 WORDS_BIG_ENDIAN. */
1776 left_shift = binoptab == ashl_optab;
1777 outof_word = left_shift ^ ! WORDS_BIG_ENDIAN;
1779 outof_target = operand_subword (target, outof_word, 1, mode);
1780 into_target = operand_subword (target, 1 - outof_word, 1, mode);
1782 outof_input = operand_subword_force (op0, outof_word, mode);
1783 into_input = operand_subword_force (op0, 1 - outof_word, mode);
1785 if (expand_doubleword_shift (op1_mode, binoptab,
1786 outof_input, into_input, op1,
1787 outof_target, into_target,
1788 unsignedp, next_methods, shift_mask))
1790 insns = get_insns ();
1800 /* Synthesize double word rotates from single word shifts. */
1801 if ((binoptab == rotl_optab || binoptab == rotr_optab)
1802 && mclass == MODE_INT
1803 && CONST_INT_P (op1)
1804 && GET_MODE_PRECISION (mode) == 2 * BITS_PER_WORD
1805 && optab_handler (ashl_optab, word_mode) != CODE_FOR_nothing
1806 && optab_handler (lshr_optab, word_mode) != CODE_FOR_nothing)
1809 rtx into_target, outof_target;
1810 rtx into_input, outof_input;
1812 int shift_count, left_shift, outof_word;
1814 /* If TARGET is the same as one of the operands, the REG_EQUAL note
1815 won't be accurate, so use a new target. Do this also if target is not
1816 a REG, first because having a register instead may open optimization
1817 opportunities, and second because if target and op0 happen to be MEMs
1818 designating the same location, we would risk clobbering it too early
1819 in the code sequence we generate below. */
1824 || !valid_multiword_target_p (target))
1825 target = gen_reg_rtx (mode);
1829 shift_count = INTVAL (op1);
1831 /* OUTOF_* is the word we are shifting bits away from, and
1832 INTO_* is the word that we are shifting bits towards, thus
1833 they differ depending on the direction of the shift and
1834 WORDS_BIG_ENDIAN. */
1836 left_shift = (binoptab == rotl_optab);
1837 outof_word = left_shift ^ ! WORDS_BIG_ENDIAN;
1839 outof_target = operand_subword (target, outof_word, 1, mode);
1840 into_target = operand_subword (target, 1 - outof_word, 1, mode);
1842 outof_input = operand_subword_force (op0, outof_word, mode);
1843 into_input = operand_subword_force (op0, 1 - outof_word, mode);
1845 if (shift_count == BITS_PER_WORD)
1847 /* This is just a word swap. */
1848 emit_move_insn (outof_target, into_input);
1849 emit_move_insn (into_target, outof_input);
1854 rtx into_temp1, into_temp2, outof_temp1, outof_temp2;
1855 rtx first_shift_count, second_shift_count;
1856 optab reverse_unsigned_shift, unsigned_shift;
1858 reverse_unsigned_shift = (left_shift ^ (shift_count < BITS_PER_WORD)
1859 ? lshr_optab : ashl_optab);
1861 unsigned_shift = (left_shift ^ (shift_count < BITS_PER_WORD)
1862 ? ashl_optab : lshr_optab);
1864 if (shift_count > BITS_PER_WORD)
1866 first_shift_count = GEN_INT (shift_count - BITS_PER_WORD);
1867 second_shift_count = GEN_INT (2 * BITS_PER_WORD - shift_count);
1871 first_shift_count = GEN_INT (BITS_PER_WORD - shift_count);
1872 second_shift_count = GEN_INT (shift_count);
1875 into_temp1 = expand_binop (word_mode, unsigned_shift,
1876 outof_input, first_shift_count,
1877 NULL_RTX, unsignedp, next_methods);
1878 into_temp2 = expand_binop (word_mode, reverse_unsigned_shift,
1879 into_input, second_shift_count,
1880 NULL_RTX, unsignedp, next_methods);
1882 if (into_temp1 != 0 && into_temp2 != 0)
1883 inter = expand_binop (word_mode, ior_optab, into_temp1, into_temp2,
1884 into_target, unsignedp, next_methods);
1888 if (inter != 0 && inter != into_target)
1889 emit_move_insn (into_target, inter);
1891 outof_temp1 = expand_binop (word_mode, unsigned_shift,
1892 into_input, first_shift_count,
1893 NULL_RTX, unsignedp, next_methods);
1894 outof_temp2 = expand_binop (word_mode, reverse_unsigned_shift,
1895 outof_input, second_shift_count,
1896 NULL_RTX, unsignedp, next_methods);
1898 if (inter != 0 && outof_temp1 != 0 && outof_temp2 != 0)
1899 inter = expand_binop (word_mode, ior_optab,
1900 outof_temp1, outof_temp2,
1901 outof_target, unsignedp, next_methods);
1903 if (inter != 0 && inter != outof_target)
1904 emit_move_insn (outof_target, inter);
1907 insns = get_insns ();
1917 /* These can be done a word at a time by propagating carries. */
1918 if ((binoptab == add_optab || binoptab == sub_optab)
1919 && mclass == MODE_INT
1920 && GET_MODE_SIZE (mode) >= 2 * UNITS_PER_WORD
1921 && optab_handler (binoptab, word_mode) != CODE_FOR_nothing)
1924 optab otheroptab = binoptab == add_optab ? sub_optab : add_optab;
1925 const unsigned int nwords = GET_MODE_BITSIZE (mode) / BITS_PER_WORD;
1926 rtx carry_in = NULL_RTX, carry_out = NULL_RTX;
1927 rtx xop0, xop1, xtarget;
1929 /* We can handle either a 1 or -1 value for the carry. If STORE_FLAG
1930 value is one of those, use it. Otherwise, use 1 since it is the
1931 one easiest to get. */
1932 #if STORE_FLAG_VALUE == 1 || STORE_FLAG_VALUE == -1
1933 int normalizep = STORE_FLAG_VALUE;
1938 /* Prepare the operands. */
1939 xop0 = force_reg (mode, op0);
1940 xop1 = force_reg (mode, op1);
1942 xtarget = gen_reg_rtx (mode);
1944 if (target == 0 || !REG_P (target) || !valid_multiword_target_p (target))
1947 /* Indicate for flow that the entire target reg is being set. */
1949 emit_clobber (xtarget);
1951 /* Do the actual arithmetic. */
1952 for (i = 0; i < nwords; i++)
1954 int index = (WORDS_BIG_ENDIAN ? nwords - i - 1 : i);
1955 rtx target_piece = operand_subword (xtarget, index, 1, mode);
1956 rtx op0_piece = operand_subword_force (xop0, index, mode);
1957 rtx op1_piece = operand_subword_force (xop1, index, mode);
1960 /* Main add/subtract of the input operands. */
1961 x = expand_binop (word_mode, binoptab,
1962 op0_piece, op1_piece,
1963 target_piece, unsignedp, next_methods);
1969 /* Store carry from main add/subtract. */
1970 carry_out = gen_reg_rtx (word_mode);
1971 carry_out = emit_store_flag_force (carry_out,
1972 (binoptab == add_optab
1975 word_mode, 1, normalizep);
1982 /* Add/subtract previous carry to main result. */
1983 newx = expand_binop (word_mode,
1984 normalizep == 1 ? binoptab : otheroptab,
1986 NULL_RTX, 1, next_methods);
1990 /* Get out carry from adding/subtracting carry in. */
1991 rtx carry_tmp = gen_reg_rtx (word_mode);
1992 carry_tmp = emit_store_flag_force (carry_tmp,
1993 (binoptab == add_optab
1996 word_mode, 1, normalizep);
1998 /* Logical-ior the two poss. carry together. */
1999 carry_out = expand_binop (word_mode, ior_optab,
2000 carry_out, carry_tmp,
2001 carry_out, 0, next_methods);
2005 emit_move_insn (target_piece, newx);
2009 if (x != target_piece)
2010 emit_move_insn (target_piece, x);
2013 carry_in = carry_out;
2016 if (i == GET_MODE_BITSIZE (mode) / (unsigned) BITS_PER_WORD)
2018 if (optab_handler (mov_optab, mode) != CODE_FOR_nothing
2019 || ! rtx_equal_p (target, xtarget))
2021 rtx temp = emit_move_insn (target, xtarget);
2023 set_unique_reg_note (temp,
2025 gen_rtx_fmt_ee (binoptab->code, mode,
2036 delete_insns_since (last);
2039 /* Attempt to synthesize double word multiplies using a sequence of word
2040 mode multiplications. We first attempt to generate a sequence using a
2041 more efficient unsigned widening multiply, and if that fails we then
2042 try using a signed widening multiply. */
2044 if (binoptab == smul_optab
2045 && mclass == MODE_INT
2046 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
2047 && optab_handler (smul_optab, word_mode) != CODE_FOR_nothing
2048 && optab_handler (add_optab, word_mode) != CODE_FOR_nothing)
2050 rtx product = NULL_RTX;
2051 if (widening_optab_handler (umul_widen_optab, mode, word_mode)
2052 != CODE_FOR_nothing)
2054 product = expand_doubleword_mult (mode, op0, op1, target,
2057 delete_insns_since (last);
2060 if (product == NULL_RTX
2061 && widening_optab_handler (smul_widen_optab, mode, word_mode)
2062 != CODE_FOR_nothing)
2064 product = expand_doubleword_mult (mode, op0, op1, target,
2067 delete_insns_since (last);
2070 if (product != NULL_RTX)
2072 if (optab_handler (mov_optab, mode) != CODE_FOR_nothing)
2074 temp = emit_move_insn (target ? target : product, product);
2075 set_unique_reg_note (temp,
2077 gen_rtx_fmt_ee (MULT, mode,
2085 /* It can't be open-coded in this mode.
2086 Use a library call if one is available and caller says that's ok. */
2088 libfunc = optab_libfunc (binoptab, mode);
2090 && (methods == OPTAB_LIB || methods == OPTAB_LIB_WIDEN))
2094 enum machine_mode op1_mode = mode;
2099 if (shift_optab_p (binoptab))
2101 op1_mode = targetm.libgcc_shift_count_mode ();
2102 /* Specify unsigned here,
2103 since negative shift counts are meaningless. */
2104 op1x = convert_to_mode (op1_mode, op1, 1);
2107 if (GET_MODE (op0) != VOIDmode
2108 && GET_MODE (op0) != mode)
2109 op0 = convert_to_mode (mode, op0, unsignedp);
2111 /* Pass 1 for NO_QUEUE so we don't lose any increments
2112 if the libcall is cse'd or moved. */
2113 value = emit_library_call_value (libfunc,
2114 NULL_RTX, LCT_CONST, mode, 2,
2115 op0, mode, op1x, op1_mode);
2117 insns = get_insns ();
2120 target = gen_reg_rtx (mode);
2121 emit_libcall_block (insns, target, value,
2122 gen_rtx_fmt_ee (binoptab->code, mode, op0, op1));
2127 delete_insns_since (last);
2129 /* It can't be done in this mode. Can we do it in a wider mode? */
2131 if (! (methods == OPTAB_WIDEN || methods == OPTAB_LIB_WIDEN
2132 || methods == OPTAB_MUST_WIDEN))
2134 /* Caller says, don't even try. */
2135 delete_insns_since (entry_last);
2139 /* Compute the value of METHODS to pass to recursive calls.
2140 Don't allow widening to be tried recursively. */
2142 methods = (methods == OPTAB_LIB_WIDEN ? OPTAB_LIB : OPTAB_DIRECT);
2144 /* Look for a wider mode of the same class for which it appears we can do
2147 if (CLASS_HAS_WIDER_MODES_P (mclass))
2149 for (wider_mode = GET_MODE_WIDER_MODE (mode);
2150 wider_mode != VOIDmode;
2151 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
2153 if (find_widening_optab_handler (binoptab, wider_mode, mode, 1)
2155 || (methods == OPTAB_LIB
2156 && optab_libfunc (binoptab, wider_mode)))
2158 rtx xop0 = op0, xop1 = op1;
2161 /* For certain integer operations, we need not actually extend
2162 the narrow operands, as long as we will truncate
2163 the results to the same narrowness. */
2165 if ((binoptab == ior_optab || binoptab == and_optab
2166 || binoptab == xor_optab
2167 || binoptab == add_optab || binoptab == sub_optab
2168 || binoptab == smul_optab || binoptab == ashl_optab)
2169 && mclass == MODE_INT)
2172 xop0 = widen_operand (xop0, wider_mode, mode,
2173 unsignedp, no_extend);
2175 /* The second operand of a shift must always be extended. */
2176 xop1 = widen_operand (xop1, wider_mode, mode, unsignedp,
2177 no_extend && binoptab != ashl_optab);
2179 temp = expand_binop (wider_mode, binoptab, xop0, xop1, NULL_RTX,
2180 unsignedp, methods);
2183 if (mclass != MODE_INT
2184 || !TRULY_NOOP_TRUNCATION_MODES_P (mode, wider_mode))
2187 target = gen_reg_rtx (mode);
2188 convert_move (target, temp, 0);
2192 return gen_lowpart (mode, temp);
2195 delete_insns_since (last);
2200 delete_insns_since (entry_last);
2204 /* Expand a binary operator which has both signed and unsigned forms.
2205 UOPTAB is the optab for unsigned operations, and SOPTAB is for
2208 If we widen unsigned operands, we may use a signed wider operation instead
2209 of an unsigned wider operation, since the result would be the same. */
2212 sign_expand_binop (enum machine_mode mode, optab uoptab, optab soptab,
2213 rtx op0, rtx op1, rtx target, int unsignedp,
2214 enum optab_methods methods)
2217 optab direct_optab = unsignedp ? uoptab : soptab;
2218 struct optab_d wide_soptab;
2220 /* Do it without widening, if possible. */
2221 temp = expand_binop (mode, direct_optab, op0, op1, target,
2222 unsignedp, OPTAB_DIRECT);
2223 if (temp || methods == OPTAB_DIRECT)
2226 /* Try widening to a signed int. Make a fake signed optab that
2227 hides any signed insn for direct use. */
2228 wide_soptab = *soptab;
2229 set_optab_handler (&wide_soptab, mode, CODE_FOR_nothing);
2230 /* We don't want to generate new hash table entries from this fake
2232 wide_soptab.libcall_gen = NULL;
2234 temp = expand_binop (mode, &wide_soptab, op0, op1, target,
2235 unsignedp, OPTAB_WIDEN);
2237 /* For unsigned operands, try widening to an unsigned int. */
2238 if (temp == 0 && unsignedp)
2239 temp = expand_binop (mode, uoptab, op0, op1, target,
2240 unsignedp, OPTAB_WIDEN);
2241 if (temp || methods == OPTAB_WIDEN)
2244 /* Use the right width libcall if that exists. */
2245 temp = expand_binop (mode, direct_optab, op0, op1, target, unsignedp, OPTAB_LIB);
2246 if (temp || methods == OPTAB_LIB)
2249 /* Must widen and use a libcall, use either signed or unsigned. */
2250 temp = expand_binop (mode, &wide_soptab, op0, op1, target,
2251 unsignedp, methods);
2255 return expand_binop (mode, uoptab, op0, op1, target,
2256 unsignedp, methods);
2260 /* Generate code to perform an operation specified by UNOPPTAB
2261 on operand OP0, with two results to TARG0 and TARG1.
2262 We assume that the order of the operands for the instruction
2263 is TARG0, TARG1, OP0.
2265 Either TARG0 or TARG1 may be zero, but what that means is that
2266 the result is not actually wanted. We will generate it into
2267 a dummy pseudo-reg and discard it. They may not both be zero.
2269 Returns 1 if this operation can be performed; 0 if not. */
2272 expand_twoval_unop (optab unoptab, rtx op0, rtx targ0, rtx targ1,
2275 enum machine_mode mode = GET_MODE (targ0 ? targ0 : targ1);
2276 enum mode_class mclass;
2277 enum machine_mode wider_mode;
2278 rtx entry_last = get_last_insn ();
2281 mclass = GET_MODE_CLASS (mode);
2284 targ0 = gen_reg_rtx (mode);
2286 targ1 = gen_reg_rtx (mode);
2288 /* Record where to go back to if we fail. */
2289 last = get_last_insn ();
2291 if (optab_handler (unoptab, mode) != CODE_FOR_nothing)
2293 struct expand_operand ops[3];
2294 enum insn_code icode = optab_handler (unoptab, mode);
2296 create_fixed_operand (&ops[0], targ0);
2297 create_fixed_operand (&ops[1], targ1);
2298 create_convert_operand_from (&ops[2], op0, mode, unsignedp);
2299 if (maybe_expand_insn (icode, 3, ops))
2303 /* It can't be done in this mode. Can we do it in a wider mode? */
2305 if (CLASS_HAS_WIDER_MODES_P (mclass))
2307 for (wider_mode = GET_MODE_WIDER_MODE (mode);
2308 wider_mode != VOIDmode;
2309 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
2311 if (optab_handler (unoptab, wider_mode) != CODE_FOR_nothing)
2313 rtx t0 = gen_reg_rtx (wider_mode);
2314 rtx t1 = gen_reg_rtx (wider_mode);
2315 rtx cop0 = convert_modes (wider_mode, mode, op0, unsignedp);
2317 if (expand_twoval_unop (unoptab, cop0, t0, t1, unsignedp))
2319 convert_move (targ0, t0, unsignedp);
2320 convert_move (targ1, t1, unsignedp);
2324 delete_insns_since (last);
2329 delete_insns_since (entry_last);
2333 /* Generate code to perform an operation specified by BINOPTAB
2334 on operands OP0 and OP1, with two results to TARG1 and TARG2.
2335 We assume that the order of the operands for the instruction
2336 is TARG0, OP0, OP1, TARG1, which would fit a pattern like
2337 [(set TARG0 (operate OP0 OP1)) (set TARG1 (operate ...))].
2339 Either TARG0 or TARG1 may be zero, but what that means is that
2340 the result is not actually wanted. We will generate it into
2341 a dummy pseudo-reg and discard it. They may not both be zero.
2343 Returns 1 if this operation can be performed; 0 if not. */
2346 expand_twoval_binop (optab binoptab, rtx op0, rtx op1, rtx targ0, rtx targ1,
2349 enum machine_mode mode = GET_MODE (targ0 ? targ0 : targ1);
2350 enum mode_class mclass;
2351 enum machine_mode wider_mode;
2352 rtx entry_last = get_last_insn ();
2355 mclass = GET_MODE_CLASS (mode);
2358 targ0 = gen_reg_rtx (mode);
2360 targ1 = gen_reg_rtx (mode);
2362 /* Record where to go back to if we fail. */
2363 last = get_last_insn ();
2365 if (optab_handler (binoptab, mode) != CODE_FOR_nothing)
2367 struct expand_operand ops[4];
2368 enum insn_code icode = optab_handler (binoptab, mode);
2369 enum machine_mode mode0 = insn_data[icode].operand[1].mode;
2370 enum machine_mode mode1 = insn_data[icode].operand[2].mode;
2371 rtx xop0 = op0, xop1 = op1;
2373 /* If we are optimizing, force expensive constants into a register. */
2374 xop0 = avoid_expensive_constant (mode0, binoptab, 0, xop0, unsignedp);
2375 xop1 = avoid_expensive_constant (mode1, binoptab, 1, xop1, unsignedp);
2377 create_fixed_operand (&ops[0], targ0);
2378 create_convert_operand_from (&ops[1], op0, mode, unsignedp);
2379 create_convert_operand_from (&ops[2], op1, mode, unsignedp);
2380 create_fixed_operand (&ops[3], targ1);
2381 if (maybe_expand_insn (icode, 4, ops))
2383 delete_insns_since (last);
2386 /* It can't be done in this mode. Can we do it in a wider mode? */
2388 if (CLASS_HAS_WIDER_MODES_P (mclass))
2390 for (wider_mode = GET_MODE_WIDER_MODE (mode);
2391 wider_mode != VOIDmode;
2392 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
2394 if (optab_handler (binoptab, wider_mode) != CODE_FOR_nothing)
2396 rtx t0 = gen_reg_rtx (wider_mode);
2397 rtx t1 = gen_reg_rtx (wider_mode);
2398 rtx cop0 = convert_modes (wider_mode, mode, op0, unsignedp);
2399 rtx cop1 = convert_modes (wider_mode, mode, op1, unsignedp);
2401 if (expand_twoval_binop (binoptab, cop0, cop1,
2404 convert_move (targ0, t0, unsignedp);
2405 convert_move (targ1, t1, unsignedp);
2409 delete_insns_since (last);
2414 delete_insns_since (entry_last);
2418 /* Expand the two-valued library call indicated by BINOPTAB, but
2419 preserve only one of the values. If TARG0 is non-NULL, the first
2420 value is placed into TARG0; otherwise the second value is placed
2421 into TARG1. Exactly one of TARG0 and TARG1 must be non-NULL. The
2422 value stored into TARG0 or TARG1 is equivalent to (CODE OP0 OP1).
2423 This routine assumes that the value returned by the library call is
2424 as if the return value was of an integral mode twice as wide as the
2425 mode of OP0. Returns 1 if the call was successful. */
2428 expand_twoval_binop_libfunc (optab binoptab, rtx op0, rtx op1,
2429 rtx targ0, rtx targ1, enum rtx_code code)
2431 enum machine_mode mode;
2432 enum machine_mode libval_mode;
2437 /* Exactly one of TARG0 or TARG1 should be non-NULL. */
2438 gcc_assert (!targ0 != !targ1);
2440 mode = GET_MODE (op0);
2441 libfunc = optab_libfunc (binoptab, mode);
2445 /* The value returned by the library function will have twice as
2446 many bits as the nominal MODE. */
2447 libval_mode = smallest_mode_for_size (2 * GET_MODE_BITSIZE (mode),
2450 libval = emit_library_call_value (libfunc, NULL_RTX, LCT_CONST,
2454 /* Get the part of VAL containing the value that we want. */
2455 libval = simplify_gen_subreg (mode, libval, libval_mode,
2456 targ0 ? 0 : GET_MODE_SIZE (mode));
2457 insns = get_insns ();
2459 /* Move the into the desired location. */
2460 emit_libcall_block (insns, targ0 ? targ0 : targ1, libval,
2461 gen_rtx_fmt_ee (code, mode, op0, op1));
2467 /* Wrapper around expand_unop which takes an rtx code to specify
2468 the operation to perform, not an optab pointer. All other
2469 arguments are the same. */
2471 expand_simple_unop (enum machine_mode mode, enum rtx_code code, rtx op0,
2472 rtx target, int unsignedp)
2474 optab unop = code_to_optab[(int) code];
2477 return expand_unop (mode, unop, op0, target, unsignedp);
2483 (clz:wide (zero_extend:wide x)) - ((width wide) - (width narrow)).
2485 A similar operation can be used for clrsb. UNOPTAB says which operation
2486 we are trying to expand. */
2488 widen_leading (enum machine_mode mode, rtx op0, rtx target, optab unoptab)
2490 enum mode_class mclass = GET_MODE_CLASS (mode);
2491 if (CLASS_HAS_WIDER_MODES_P (mclass))
2493 enum machine_mode wider_mode;
2494 for (wider_mode = GET_MODE_WIDER_MODE (mode);
2495 wider_mode != VOIDmode;
2496 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
2498 if (optab_handler (unoptab, wider_mode) != CODE_FOR_nothing)
2500 rtx xop0, temp, last;
2502 last = get_last_insn ();
2505 target = gen_reg_rtx (mode);
2506 xop0 = widen_operand (op0, wider_mode, mode,
2507 unoptab != clrsb_optab, false);
2508 temp = expand_unop (wider_mode, unoptab, xop0, NULL_RTX,
2509 unoptab != clrsb_optab);
2511 temp = expand_binop (wider_mode, sub_optab, temp,
2512 GEN_INT (GET_MODE_PRECISION (wider_mode)
2513 - GET_MODE_PRECISION (mode)),
2514 target, true, OPTAB_DIRECT);
2516 delete_insns_since (last);
2525 /* Try calculating clz of a double-word quantity as two clz's of word-sized
2526 quantities, choosing which based on whether the high word is nonzero. */
2528 expand_doubleword_clz (enum machine_mode mode, rtx op0, rtx target)
2530 rtx xop0 = force_reg (mode, op0);
2531 rtx subhi = gen_highpart (word_mode, xop0);
2532 rtx sublo = gen_lowpart (word_mode, xop0);
2533 rtx hi0_label = gen_label_rtx ();
2534 rtx after_label = gen_label_rtx ();
2535 rtx seq, temp, result;
2537 /* If we were not given a target, use a word_mode register, not a
2538 'mode' register. The result will fit, and nobody is expecting
2539 anything bigger (the return type of __builtin_clz* is int). */
2541 target = gen_reg_rtx (word_mode);
2543 /* In any case, write to a word_mode scratch in both branches of the
2544 conditional, so we can ensure there is a single move insn setting
2545 'target' to tag a REG_EQUAL note on. */
2546 result = gen_reg_rtx (word_mode);
2550 /* If the high word is not equal to zero,
2551 then clz of the full value is clz of the high word. */
2552 emit_cmp_and_jump_insns (subhi, CONST0_RTX (word_mode), EQ, 0,
2553 word_mode, true, hi0_label);
2555 temp = expand_unop_direct (word_mode, clz_optab, subhi, result, true);
2560 convert_move (result, temp, true);
2562 emit_jump_insn (gen_jump (after_label));
2565 /* Else clz of the full value is clz of the low word plus the number
2566 of bits in the high word. */
2567 emit_label (hi0_label);
2569 temp = expand_unop_direct (word_mode, clz_optab, sublo, 0, true);
2572 temp = expand_binop (word_mode, add_optab, temp,
2573 GEN_INT (GET_MODE_BITSIZE (word_mode)),
2574 result, true, OPTAB_DIRECT);
2578 convert_move (result, temp, true);
2580 emit_label (after_label);
2581 convert_move (target, result, true);
2586 add_equal_note (seq, target, CLZ, xop0, 0);
2598 (lshiftrt:wide (bswap:wide x) ((width wide) - (width narrow))). */
2600 widen_bswap (enum machine_mode mode, rtx op0, rtx target)
2602 enum mode_class mclass = GET_MODE_CLASS (mode);
2603 enum machine_mode wider_mode;
2606 if (!CLASS_HAS_WIDER_MODES_P (mclass))
2609 for (wider_mode = GET_MODE_WIDER_MODE (mode);
2610 wider_mode != VOIDmode;
2611 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
2612 if (optab_handler (bswap_optab, wider_mode) != CODE_FOR_nothing)
2617 last = get_last_insn ();
2619 x = widen_operand (op0, wider_mode, mode, true, true);
2620 x = expand_unop (wider_mode, bswap_optab, x, NULL_RTX, true);
2622 gcc_assert (GET_MODE_PRECISION (wider_mode) == GET_MODE_BITSIZE (wider_mode)
2623 && GET_MODE_PRECISION (mode) == GET_MODE_BITSIZE (mode));
2625 x = expand_shift (RSHIFT_EXPR, wider_mode, x,
2626 GET_MODE_BITSIZE (wider_mode)
2627 - GET_MODE_BITSIZE (mode),
2633 target = gen_reg_rtx (mode);
2634 emit_move_insn (target, gen_lowpart (mode, x));
2637 delete_insns_since (last);
2642 /* Try calculating bswap as two bswaps of two word-sized operands. */
2645 expand_doubleword_bswap (enum machine_mode mode, rtx op, rtx target)
2649 t1 = expand_unop (word_mode, bswap_optab,
2650 operand_subword_force (op, 0, mode), NULL_RTX, true);
2651 t0 = expand_unop (word_mode, bswap_optab,
2652 operand_subword_force (op, 1, mode), NULL_RTX, true);
2654 if (target == 0 || !valid_multiword_target_p (target))
2655 target = gen_reg_rtx (mode);
2657 emit_clobber (target);
2658 emit_move_insn (operand_subword (target, 0, 1, mode), t0);
2659 emit_move_insn (operand_subword (target, 1, 1, mode), t1);
2664 /* Try calculating (parity x) as (and (popcount x) 1), where
2665 popcount can also be done in a wider mode. */
2667 expand_parity (enum machine_mode mode, rtx op0, rtx target)
2669 enum mode_class mclass = GET_MODE_CLASS (mode);
2670 if (CLASS_HAS_WIDER_MODES_P (mclass))
2672 enum machine_mode wider_mode;
2673 for (wider_mode = mode; wider_mode != VOIDmode;
2674 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
2676 if (optab_handler (popcount_optab, wider_mode) != CODE_FOR_nothing)
2678 rtx xop0, temp, last;
2680 last = get_last_insn ();
2683 target = gen_reg_rtx (mode);
2684 xop0 = widen_operand (op0, wider_mode, mode, true, false);
2685 temp = expand_unop (wider_mode, popcount_optab, xop0, NULL_RTX,
2688 temp = expand_binop (wider_mode, and_optab, temp, const1_rtx,
2689 target, true, OPTAB_DIRECT);
2691 delete_insns_since (last);
2700 /* Try calculating ctz(x) as K - clz(x & -x) ,
2701 where K is GET_MODE_PRECISION(mode) - 1.
2703 Both __builtin_ctz and __builtin_clz are undefined at zero, so we
2704 don't have to worry about what the hardware does in that case. (If
2705 the clz instruction produces the usual value at 0, which is K, the
2706 result of this code sequence will be -1; expand_ffs, below, relies
2707 on this. It might be nice to have it be K instead, for consistency
2708 with the (very few) processors that provide a ctz with a defined
2709 value, but that would take one more instruction, and it would be
2710 less convenient for expand_ffs anyway. */
2713 expand_ctz (enum machine_mode mode, rtx op0, rtx target)
2717 if (optab_handler (clz_optab, mode) == CODE_FOR_nothing)
2722 temp = expand_unop_direct (mode, neg_optab, op0, NULL_RTX, true);
2724 temp = expand_binop (mode, and_optab, op0, temp, NULL_RTX,
2725 true, OPTAB_DIRECT);
2727 temp = expand_unop_direct (mode, clz_optab, temp, NULL_RTX, true);
2729 temp = expand_binop (mode, sub_optab, GEN_INT (GET_MODE_PRECISION (mode) - 1),
2731 true, OPTAB_DIRECT);
2741 add_equal_note (seq, temp, CTZ, op0, 0);
2747 /* Try calculating ffs(x) using ctz(x) if we have that instruction, or
2748 else with the sequence used by expand_clz.
2750 The ffs builtin promises to return zero for a zero value and ctz/clz
2751 may have an undefined value in that case. If they do not give us a
2752 convenient value, we have to generate a test and branch. */
2754 expand_ffs (enum machine_mode mode, rtx op0, rtx target)
2756 HOST_WIDE_INT val = 0;
2757 bool defined_at_zero = false;
2760 if (optab_handler (ctz_optab, mode) != CODE_FOR_nothing)
2764 temp = expand_unop_direct (mode, ctz_optab, op0, 0, true);
2768 defined_at_zero = (CTZ_DEFINED_VALUE_AT_ZERO (mode, val) == 2);
2770 else if (optab_handler (clz_optab, mode) != CODE_FOR_nothing)
2773 temp = expand_ctz (mode, op0, 0);
2777 if (CLZ_DEFINED_VALUE_AT_ZERO (mode, val) == 2)
2779 defined_at_zero = true;
2780 val = (GET_MODE_PRECISION (mode) - 1) - val;
2786 if (defined_at_zero && val == -1)
2787 /* No correction needed at zero. */;
2790 /* We don't try to do anything clever with the situation found
2791 on some processors (eg Alpha) where ctz(0:mode) ==
2792 bitsize(mode). If someone can think of a way to send N to -1
2793 and leave alone all values in the range 0..N-1 (where N is a
2794 power of two), cheaper than this test-and-branch, please add it.
2796 The test-and-branch is done after the operation itself, in case
2797 the operation sets condition codes that can be recycled for this.
2798 (This is true on i386, for instance.) */
2800 rtx nonzero_label = gen_label_rtx ();
2801 emit_cmp_and_jump_insns (op0, CONST0_RTX (mode), NE, 0,
2802 mode, true, nonzero_label);
2804 convert_move (temp, GEN_INT (-1), false);
2805 emit_label (nonzero_label);
2808 /* temp now has a value in the range -1..bitsize-1. ffs is supposed
2809 to produce a value in the range 0..bitsize. */
2810 temp = expand_binop (mode, add_optab, temp, GEN_INT (1),
2811 target, false, OPTAB_DIRECT);
2818 add_equal_note (seq, temp, FFS, op0, 0);
2827 /* Extract the OMODE lowpart from VAL, which has IMODE. Under certain
2828 conditions, VAL may already be a SUBREG against which we cannot generate
2829 a further SUBREG. In this case, we expect forcing the value into a
2830 register will work around the situation. */
2833 lowpart_subreg_maybe_copy (enum machine_mode omode, rtx val,
2834 enum machine_mode imode)
2837 ret = lowpart_subreg (omode, val, imode);
2840 val = force_reg (imode, val);
2841 ret = lowpart_subreg (omode, val, imode);
2842 gcc_assert (ret != NULL);
2847 /* Expand a floating point absolute value or negation operation via a
2848 logical operation on the sign bit. */
2851 expand_absneg_bit (enum rtx_code code, enum machine_mode mode,
2852 rtx op0, rtx target)
2854 const struct real_format *fmt;
2855 int bitpos, word, nwords, i;
2856 enum machine_mode imode;
2860 /* The format has to have a simple sign bit. */
2861 fmt = REAL_MODE_FORMAT (mode);
2865 bitpos = fmt->signbit_rw;
2869 /* Don't create negative zeros if the format doesn't support them. */
2870 if (code == NEG && !fmt->has_signed_zero)
2873 if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD)
2875 imode = int_mode_for_mode (mode);
2876 if (imode == BLKmode)
2885 if (FLOAT_WORDS_BIG_ENDIAN)
2886 word = (GET_MODE_BITSIZE (mode) - bitpos) / BITS_PER_WORD;
2888 word = bitpos / BITS_PER_WORD;
2889 bitpos = bitpos % BITS_PER_WORD;
2890 nwords = (GET_MODE_BITSIZE (mode) + BITS_PER_WORD - 1) / BITS_PER_WORD;
2893 mask = double_int_setbit (double_int_zero, bitpos);
2895 mask = double_int_not (mask);
2899 || (nwords > 1 && !valid_multiword_target_p (target)))
2900 target = gen_reg_rtx (mode);
2906 for (i = 0; i < nwords; ++i)
2908 rtx targ_piece = operand_subword (target, i, 1, mode);
2909 rtx op0_piece = operand_subword_force (op0, i, mode);
2913 temp = expand_binop (imode, code == ABS ? and_optab : xor_optab,
2915 immed_double_int_const (mask, imode),
2916 targ_piece, 1, OPTAB_LIB_WIDEN);
2917 if (temp != targ_piece)
2918 emit_move_insn (targ_piece, temp);
2921 emit_move_insn (targ_piece, op0_piece);
2924 insns = get_insns ();
2931 temp = expand_binop (imode, code == ABS ? and_optab : xor_optab,
2932 gen_lowpart (imode, op0),
2933 immed_double_int_const (mask, imode),
2934 gen_lowpart (imode, target), 1, OPTAB_LIB_WIDEN);
2935 target = lowpart_subreg_maybe_copy (mode, temp, imode);
2937 set_unique_reg_note (get_last_insn (), REG_EQUAL,
2938 gen_rtx_fmt_e (code, mode, copy_rtx (op0)));
2944 /* As expand_unop, but will fail rather than attempt the operation in a
2945 different mode or with a libcall. */
2947 expand_unop_direct (enum machine_mode mode, optab unoptab, rtx op0, rtx target,
2950 if (optab_handler (unoptab, mode) != CODE_FOR_nothing)
2952 struct expand_operand ops[2];
2953 enum insn_code icode = optab_handler (unoptab, mode);
2954 rtx last = get_last_insn ();
2957 create_output_operand (&ops[0], target, mode);
2958 create_convert_operand_from (&ops[1], op0, mode, unsignedp);
2959 pat = maybe_gen_insn (icode, 2, ops);
2962 if (INSN_P (pat) && NEXT_INSN (pat) != NULL_RTX
2963 && ! add_equal_note (pat, ops[0].value, unoptab->code,
2964 ops[1].value, NULL_RTX))
2966 delete_insns_since (last);
2967 return expand_unop (mode, unoptab, op0, NULL_RTX, unsignedp);
2972 return ops[0].value;
2978 /* Generate code to perform an operation specified by UNOPTAB
2979 on operand OP0, with result having machine-mode MODE.
2981 UNSIGNEDP is for the case where we have to widen the operands
2982 to perform the operation. It says to use zero-extension.
2984 If TARGET is nonzero, the value
2985 is generated there, if it is convenient to do so.
2986 In all cases an rtx is returned for the locus of the value;
2987 this may or may not be TARGET. */
2990 expand_unop (enum machine_mode mode, optab unoptab, rtx op0, rtx target,
2993 enum mode_class mclass = GET_MODE_CLASS (mode);
2994 enum machine_mode wider_mode;
2998 temp = expand_unop_direct (mode, unoptab, op0, target, unsignedp);
3002 /* It can't be done in this mode. Can we open-code it in a wider mode? */
3004 /* Widening (or narrowing) clz needs special treatment. */
3005 if (unoptab == clz_optab)
3007 temp = widen_leading (mode, op0, target, unoptab);
3011 if (GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
3012 && optab_handler (unoptab, word_mode) != CODE_FOR_nothing)
3014 temp = expand_doubleword_clz (mode, op0, target);
3022 if (unoptab == clrsb_optab)
3024 temp = widen_leading (mode, op0, target, unoptab);
3030 /* Widening (or narrowing) bswap needs special treatment. */
3031 if (unoptab == bswap_optab)
3033 temp = widen_bswap (mode, op0, target);
3037 if (GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
3038 && optab_handler (unoptab, word_mode) != CODE_FOR_nothing)
3040 temp = expand_doubleword_bswap (mode, op0, target);
3048 if (CLASS_HAS_WIDER_MODES_P (mclass))
3049 for (wider_mode = GET_MODE_WIDER_MODE (mode);
3050 wider_mode != VOIDmode;
3051 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
3053 if (optab_handler (unoptab, wider_mode) != CODE_FOR_nothing)
3056 rtx last = get_last_insn ();
3058 /* For certain operations, we need not actually extend
3059 the narrow operand, as long as we will truncate the
3060 results to the same narrowness. */
3062 xop0 = widen_operand (xop0, wider_mode, mode, unsignedp,
3063 (unoptab == neg_optab
3064 || unoptab == one_cmpl_optab)
3065 && mclass == MODE_INT);
3067 temp = expand_unop (wider_mode, unoptab, xop0, NULL_RTX,
3072 if (mclass != MODE_INT
3073 || !TRULY_NOOP_TRUNCATION_MODES_P (mode, wider_mode))
3076 target = gen_reg_rtx (mode);
3077 convert_move (target, temp, 0);
3081 return gen_lowpart (mode, temp);
3084 delete_insns_since (last);
3088 /* These can be done a word at a time. */
3089 if (unoptab == one_cmpl_optab
3090 && mclass == MODE_INT
3091 && GET_MODE_SIZE (mode) > UNITS_PER_WORD
3092 && optab_handler (unoptab, word_mode) != CODE_FOR_nothing)
3097 if (target == 0 || target == op0 || !valid_multiword_target_p (target))
3098 target = gen_reg_rtx (mode);
3102 /* Do the actual arithmetic. */
3103 for (i = 0; i < GET_MODE_BITSIZE (mode) / BITS_PER_WORD; i++)
3105 rtx target_piece = operand_subword (target, i, 1, mode);
3106 rtx x = expand_unop (word_mode, unoptab,
3107 operand_subword_force (op0, i, mode),
3108 target_piece, unsignedp);
3110 if (target_piece != x)
3111 emit_move_insn (target_piece, x);
3114 insns = get_insns ();
3121 if (unoptab->code == NEG)
3123 /* Try negating floating point values by flipping the sign bit. */
3124 if (SCALAR_FLOAT_MODE_P (mode))
3126 temp = expand_absneg_bit (NEG, mode, op0, target);
3131 /* If there is no negation pattern, and we have no negative zero,
3132 try subtracting from zero. */
3133 if (!HONOR_SIGNED_ZEROS (mode))
3135 temp = expand_binop (mode, (unoptab == negv_optab
3136 ? subv_optab : sub_optab),
3137 CONST0_RTX (mode), op0, target,
3138 unsignedp, OPTAB_DIRECT);
3144 /* Try calculating parity (x) as popcount (x) % 2. */
3145 if (unoptab == parity_optab)
3147 temp = expand_parity (mode, op0, target);
3152 /* Try implementing ffs (x) in terms of clz (x). */
3153 if (unoptab == ffs_optab)
3155 temp = expand_ffs (mode, op0, target);
3160 /* Try implementing ctz (x) in terms of clz (x). */
3161 if (unoptab == ctz_optab)
3163 temp = expand_ctz (mode, op0, target);
3169 /* Now try a library call in this mode. */
3170 libfunc = optab_libfunc (unoptab, mode);
3176 enum machine_mode outmode = mode;
3178 /* All of these functions return small values. Thus we choose to
3179 have them return something that isn't a double-word. */
3180 if (unoptab == ffs_optab || unoptab == clz_optab || unoptab == ctz_optab
3181 || unoptab == clrsb_optab || unoptab == popcount_optab
3182 || unoptab == parity_optab)
3184 = GET_MODE (hard_libcall_value (TYPE_MODE (integer_type_node),
3185 optab_libfunc (unoptab, mode)));
3189 /* Pass 1 for NO_QUEUE so we don't lose any increments
3190 if the libcall is cse'd or moved. */
3191 value = emit_library_call_value (libfunc, NULL_RTX, LCT_CONST, outmode,
3193 insns = get_insns ();
3196 target = gen_reg_rtx (outmode);
3197 eq_value = gen_rtx_fmt_e (unoptab->code, mode, op0);
3198 if (GET_MODE_SIZE (outmode) < GET_MODE_SIZE (mode))
3199 eq_value = simplify_gen_unary (TRUNCATE, outmode, eq_value, mode);
3200 else if (GET_MODE_SIZE (outmode) > GET_MODE_SIZE (mode))
3201 eq_value = simplify_gen_unary (ZERO_EXTEND, outmode, eq_value, mode);
3202 emit_libcall_block (insns, target, value, eq_value);
3207 /* It can't be done in this mode. Can we do it in a wider mode? */
3209 if (CLASS_HAS_WIDER_MODES_P (mclass))
3211 for (wider_mode = GET_MODE_WIDER_MODE (mode);
3212 wider_mode != VOIDmode;
3213 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
3215 if (optab_handler (unoptab, wider_mode) != CODE_FOR_nothing
3216 || optab_libfunc (unoptab, wider_mode))
3219 rtx last = get_last_insn ();
3221 /* For certain operations, we need not actually extend
3222 the narrow operand, as long as we will truncate the
3223 results to the same narrowness. */
3225 xop0 = widen_operand (xop0, wider_mode, mode, unsignedp,
3226 (unoptab == neg_optab
3227 || unoptab == one_cmpl_optab)
3228 && mclass == MODE_INT);
3230 temp = expand_unop (wider_mode, unoptab, xop0, NULL_RTX,
3233 /* If we are generating clz using wider mode, adjust the
3234 result. Similarly for clrsb. */
3235 if ((unoptab == clz_optab || unoptab == clrsb_optab)
3237 temp = expand_binop (wider_mode, sub_optab, temp,
3238 GEN_INT (GET_MODE_PRECISION (wider_mode)
3239 - GET_MODE_PRECISION (mode)),
3240 target, true, OPTAB_DIRECT);
3244 if (mclass != MODE_INT)
3247 target = gen_reg_rtx (mode);
3248 convert_move (target, temp, 0);
3252 return gen_lowpart (mode, temp);
3255 delete_insns_since (last);
3260 /* One final attempt at implementing negation via subtraction,
3261 this time allowing widening of the operand. */
3262 if (unoptab->code == NEG && !HONOR_SIGNED_ZEROS (mode))
3265 temp = expand_binop (mode,
3266 unoptab == negv_optab ? subv_optab : sub_optab,
3267 CONST0_RTX (mode), op0,
3268 target, unsignedp, OPTAB_LIB_WIDEN);
3276 /* Emit code to compute the absolute value of OP0, with result to
3277 TARGET if convenient. (TARGET may be 0.) The return value says
3278 where the result actually is to be found.
3280 MODE is the mode of the operand; the mode of the result is
3281 different but can be deduced from MODE.
3286 expand_abs_nojump (enum machine_mode mode, rtx op0, rtx target,
3287 int result_unsignedp)
3292 result_unsignedp = 1;
3294 /* First try to do it with a special abs instruction. */
3295 temp = expand_unop (mode, result_unsignedp ? abs_optab : absv_optab,
3300 /* For floating point modes, try clearing the sign bit. */
3301 if (SCALAR_FLOAT_MODE_P (mode))
3303 temp = expand_absneg_bit (ABS, mode, op0, target);
3308 /* If we have a MAX insn, we can do this as MAX (x, -x). */
3309 if (optab_handler (smax_optab, mode) != CODE_FOR_nothing
3310 && !HONOR_SIGNED_ZEROS (mode))
3312 rtx last = get_last_insn ();
3314 temp = expand_unop (mode, neg_optab, op0, NULL_RTX, 0);
3316 temp = expand_binop (mode, smax_optab, op0, temp, target, 0,
3322 delete_insns_since (last);
3325 /* If this machine has expensive jumps, we can do integer absolute
3326 value of X as (((signed) x >> (W-1)) ^ x) - ((signed) x >> (W-1)),
3327 where W is the width of MODE. */
3329 if (GET_MODE_CLASS (mode) == MODE_INT
3330 && BRANCH_COST (optimize_insn_for_speed_p (),
3333 rtx extended = expand_shift (RSHIFT_EXPR, mode, op0,
3334 GET_MODE_PRECISION (mode) - 1,
3337 temp = expand_binop (mode, xor_optab, extended, op0, target, 0,
3340 temp = expand_binop (mode, result_unsignedp ? sub_optab : subv_optab,
3341 temp, extended, target, 0, OPTAB_LIB_WIDEN);
3351 expand_abs (enum machine_mode mode, rtx op0, rtx target,
3352 int result_unsignedp, int safe)
3357 result_unsignedp = 1;
3359 temp = expand_abs_nojump (mode, op0, target, result_unsignedp);
3363 /* If that does not win, use conditional jump and negate. */
3365 /* It is safe to use the target if it is the same
3366 as the source if this is also a pseudo register */
3367 if (op0 == target && REG_P (op0)
3368 && REGNO (op0) >= FIRST_PSEUDO_REGISTER)
3371 op1 = gen_label_rtx ();
3372 if (target == 0 || ! safe
3373 || GET_MODE (target) != mode
3374 || (MEM_P (target) && MEM_VOLATILE_P (target))
3376 && REGNO (target) < FIRST_PSEUDO_REGISTER))
3377 target = gen_reg_rtx (mode);
3379 emit_move_insn (target, op0);
3382 do_compare_rtx_and_jump (target, CONST0_RTX (mode), GE, 0, mode,
3383 NULL_RTX, NULL_RTX, op1, -1);
3385 op0 = expand_unop (mode, result_unsignedp ? neg_optab : negv_optab,
3388 emit_move_insn (target, op0);
3394 /* Emit code to compute the one's complement absolute value of OP0
3395 (if (OP0 < 0) OP0 = ~OP0), with result to TARGET if convenient.
3396 (TARGET may be NULL_RTX.) The return value says where the result
3397 actually is to be found.
3399 MODE is the mode of the operand; the mode of the result is
3400 different but can be deduced from MODE. */
3403 expand_one_cmpl_abs_nojump (enum machine_mode mode, rtx op0, rtx target)
3407 /* Not applicable for floating point modes. */
3408 if (FLOAT_MODE_P (mode))
3411 /* If we have a MAX insn, we can do this as MAX (x, ~x). */
3412 if (optab_handler (smax_optab, mode) != CODE_FOR_nothing)
3414 rtx last = get_last_insn ();
3416 temp = expand_unop (mode, one_cmpl_optab, op0, NULL_RTX, 0);
3418 temp = expand_binop (mode, smax_optab, op0, temp, target, 0,
3424 delete_insns_since (last);
3427 /* If this machine has expensive jumps, we can do one's complement
3428 absolute value of X as (((signed) x >> (W-1)) ^ x). */
3430 if (GET_MODE_CLASS (mode) == MODE_INT
3431 && BRANCH_COST (optimize_insn_for_speed_p (),
3434 rtx extended = expand_shift (RSHIFT_EXPR, mode, op0,
3435 GET_MODE_PRECISION (mode) - 1,
3438 temp = expand_binop (mode, xor_optab, extended, op0, target, 0,
3448 /* A subroutine of expand_copysign, perform the copysign operation using the
3449 abs and neg primitives advertised to exist on the target. The assumption
3450 is that we have a split register file, and leaving op0 in fp registers,
3451 and not playing with subregs so much, will help the register allocator. */
3454 expand_copysign_absneg (enum machine_mode mode, rtx op0, rtx op1, rtx target,
3455 int bitpos, bool op0_is_abs)
3457 enum machine_mode imode;
3458 enum insn_code icode;
3464 /* Check if the back end provides an insn that handles signbit for the
3466 icode = optab_handler (signbit_optab, mode);
3467 if (icode != CODE_FOR_nothing)
3469 imode = insn_data[(int) icode].operand[0].mode;
3470 sign = gen_reg_rtx (imode);
3471 emit_unop_insn (icode, sign, op1, UNKNOWN);
3477 if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD)
3479 imode = int_mode_for_mode (mode);
3480 if (imode == BLKmode)
3482 op1 = gen_lowpart (imode, op1);
3489 if (FLOAT_WORDS_BIG_ENDIAN)
3490 word = (GET_MODE_BITSIZE (mode) - bitpos) / BITS_PER_WORD;
3492 word = bitpos / BITS_PER_WORD;
3493 bitpos = bitpos % BITS_PER_WORD;
3494 op1 = operand_subword_force (op1, word, mode);
3497 mask = double_int_setbit (double_int_zero, bitpos);
3499 sign = expand_binop (imode, and_optab, op1,
3500 immed_double_int_const (mask, imode),
3501 NULL_RTX, 1, OPTAB_LIB_WIDEN);
3506 op0 = expand_unop (mode, abs_optab, op0, target, 0);
3513 if (target == NULL_RTX)
3514 target = copy_to_reg (op0);
3516 emit_move_insn (target, op0);
3519 label = gen_label_rtx ();
3520 emit_cmp_and_jump_insns (sign, const0_rtx, EQ, NULL_RTX, imode, 1, label);
3522 if (GET_CODE (op0) == CONST_DOUBLE)
3523 op0 = simplify_unary_operation (NEG, mode, op0, mode);
3525 op0 = expand_unop (mode, neg_optab, op0, target, 0);
3527 emit_move_insn (target, op0);
3535 /* A subroutine of expand_copysign, perform the entire copysign operation
3536 with integer bitmasks. BITPOS is the position of the sign bit; OP0_IS_ABS
3537 is true if op0 is known to have its sign bit clear. */
3540 expand_copysign_bit (enum machine_mode mode, rtx op0, rtx op1, rtx target,
3541 int bitpos, bool op0_is_abs)
3543 enum machine_mode imode;
3545 int word, nwords, i;
3548 if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD)
3550 imode = int_mode_for_mode (mode);
3551 if (imode == BLKmode)
3560 if (FLOAT_WORDS_BIG_ENDIAN)
3561 word = (GET_MODE_BITSIZE (mode) - bitpos) / BITS_PER_WORD;
3563 word = bitpos / BITS_PER_WORD;
3564 bitpos = bitpos % BITS_PER_WORD;
3565 nwords = (GET_MODE_BITSIZE (mode) + BITS_PER_WORD - 1) / BITS_PER_WORD;
3568 mask = double_int_setbit (double_int_zero, bitpos);
3573 || (nwords > 1 && !valid_multiword_target_p (target)))
3574 target = gen_reg_rtx (mode);
3580 for (i = 0; i < nwords; ++i)
3582 rtx targ_piece = operand_subword (target, i, 1, mode);
3583 rtx op0_piece = operand_subword_force (op0, i, mode);
3589 = expand_binop (imode, and_optab, op0_piece,
3590 immed_double_int_const (double_int_not (mask),
3592 NULL_RTX, 1, OPTAB_LIB_WIDEN);
3594 op1 = expand_binop (imode, and_optab,
3595 operand_subword_force (op1, i, mode),
3596 immed_double_int_const (mask, imode),
3597 NULL_RTX, 1, OPTAB_LIB_WIDEN);
3599 temp = expand_binop (imode, ior_optab, op0_piece, op1,
3600 targ_piece, 1, OPTAB_LIB_WIDEN);
3601 if (temp != targ_piece)
3602 emit_move_insn (targ_piece, temp);
3605 emit_move_insn (targ_piece, op0_piece);
3608 insns = get_insns ();
3615 op1 = expand_binop (imode, and_optab, gen_lowpart (imode, op1),
3616 immed_double_int_const (mask, imode),
3617 NULL_RTX, 1, OPTAB_LIB_WIDEN);
3619 op0 = gen_lowpart (imode, op0);
3621 op0 = expand_binop (imode, and_optab, op0,
3622 immed_double_int_const (double_int_not (mask),
3624 NULL_RTX, 1, OPTAB_LIB_WIDEN);
3626 temp = expand_binop (imode, ior_optab, op0, op1,
3627 gen_lowpart (imode, target), 1, OPTAB_LIB_WIDEN);
3628 target = lowpart_subreg_maybe_copy (mode, temp, imode);
3634 /* Expand the C99 copysign operation. OP0 and OP1 must be the same
3635 scalar floating point mode. Return NULL if we do not know how to
3636 expand the operation inline. */
3639 expand_copysign (rtx op0, rtx op1, rtx target)
3641 enum machine_mode mode = GET_MODE (op0);
3642 const struct real_format *fmt;
3646 gcc_assert (SCALAR_FLOAT_MODE_P (mode));
3647 gcc_assert (GET_MODE (op1) == mode);
3649 /* First try to do it with a special instruction. */
3650 temp = expand_binop (mode, copysign_optab, op0, op1,
3651 target, 0, OPTAB_DIRECT);
3655 fmt = REAL_MODE_FORMAT (mode);
3656 if (fmt == NULL || !fmt->has_signed_zero)
3660 if (GET_CODE (op0) == CONST_DOUBLE)
3662 if (real_isneg (CONST_DOUBLE_REAL_VALUE (op0)))
3663 op0 = simplify_unary_operation (ABS, mode, op0, mode);
3667 if (fmt->signbit_ro >= 0
3668 && (GET_CODE (op0) == CONST_DOUBLE
3669 || (optab_handler (neg_optab, mode) != CODE_FOR_nothing
3670 && optab_handler (abs_optab, mode) != CODE_FOR_nothing)))
3672 temp = expand_copysign_absneg (mode, op0, op1, target,
3673 fmt->signbit_ro, op0_is_abs);
3678 if (fmt->signbit_rw < 0)
3680 return expand_copysign_bit (mode, op0, op1, target,
3681 fmt->signbit_rw, op0_is_abs);
3684 /* Generate an instruction whose insn-code is INSN_CODE,
3685 with two operands: an output TARGET and an input OP0.
3686 TARGET *must* be nonzero, and the output is always stored there.
3687 CODE is an rtx code such that (CODE OP0) is an rtx that describes
3688 the value that is stored into TARGET.
3690 Return false if expansion failed. */
3693 maybe_emit_unop_insn (enum insn_code icode, rtx target, rtx op0,
3696 struct expand_operand ops[2];
3699 create_output_operand (&ops[0], target, GET_MODE (target));
3700 create_input_operand (&ops[1], op0, GET_MODE (op0));
3701 pat = maybe_gen_insn (icode, 2, ops);
3705 if (INSN_P (pat) && NEXT_INSN (pat) != NULL_RTX && code != UNKNOWN)
3706 add_equal_note (pat, ops[0].value, code, ops[1].value, NULL_RTX);
3710 if (ops[0].value != target)
3711 emit_move_insn (target, ops[0].value);
3714 /* Generate an instruction whose insn-code is INSN_CODE,
3715 with two operands: an output TARGET and an input OP0.
3716 TARGET *must* be nonzero, and the output is always stored there.
3717 CODE is an rtx code such that (CODE OP0) is an rtx that describes
3718 the value that is stored into TARGET. */
3721 emit_unop_insn (enum insn_code icode, rtx target, rtx op0, enum rtx_code code)
3723 bool ok = maybe_emit_unop_insn (icode, target, op0, code);
3727 struct no_conflict_data
3729 rtx target, first, insn;
3733 /* Called via note_stores by emit_libcall_block. Set P->must_stay if
3734 the currently examined clobber / store has to stay in the list of
3735 insns that constitute the actual libcall block. */
3737 no_conflict_move_test (rtx dest, const_rtx set, void *p0)
3739 struct no_conflict_data *p= (struct no_conflict_data *) p0;
3741 /* If this inns directly contributes to setting the target, it must stay. */
3742 if (reg_overlap_mentioned_p (p->target, dest))
3743 p->must_stay = true;
3744 /* If we haven't committed to keeping any other insns in the list yet,
3745 there is nothing more to check. */
3746 else if (p->insn == p->first)
3748 /* If this insn sets / clobbers a register that feeds one of the insns
3749 already in the list, this insn has to stay too. */
3750 else if (reg_overlap_mentioned_p (dest, PATTERN (p->first))
3751 || (CALL_P (p->first) && (find_reg_fusage (p->first, USE, dest)))
3752 || reg_used_between_p (dest, p->first, p->insn)
3753 /* Likewise if this insn depends on a register set by a previous
3754 insn in the list, or if it sets a result (presumably a hard
3755 register) that is set or clobbered by a previous insn.
3756 N.B. the modified_*_p (SET_DEST...) tests applied to a MEM
3757 SET_DEST perform the former check on the address, and the latter
3758 check on the MEM. */
3759 || (GET_CODE (set) == SET
3760 && (modified_in_p (SET_SRC (set), p->first)
3761 || modified_in_p (SET_DEST (set), p->first)
3762 || modified_between_p (SET_SRC (set), p->first, p->insn)
3763 || modified_between_p (SET_DEST (set), p->first, p->insn))))
3764 p->must_stay = true;
3768 /* Emit code to make a call to a constant function or a library call.
3770 INSNS is a list containing all insns emitted in the call.
3771 These insns leave the result in RESULT. Our block is to copy RESULT
3772 to TARGET, which is logically equivalent to EQUIV.
3774 We first emit any insns that set a pseudo on the assumption that these are
3775 loading constants into registers; doing so allows them to be safely cse'ed
3776 between blocks. Then we emit all the other insns in the block, followed by
3777 an insn to move RESULT to TARGET. This last insn will have a REQ_EQUAL
3778 note with an operand of EQUIV. */
3781 emit_libcall_block (rtx insns, rtx target, rtx result, rtx equiv)
3783 rtx final_dest = target;
3784 rtx next, last, insn;
3786 /* If this is a reg with REG_USERVAR_P set, then it could possibly turn
3787 into a MEM later. Protect the libcall block from this change. */
3788 if (! REG_P (target) || REG_USERVAR_P (target))
3789 target = gen_reg_rtx (GET_MODE (target));
3791 /* If we're using non-call exceptions, a libcall corresponding to an
3792 operation that may trap may also trap. */
3793 /* ??? See the comment in front of make_reg_eh_region_note. */
3794 if (cfun->can_throw_non_call_exceptions && may_trap_p (equiv))
3796 for (insn = insns; insn; insn = NEXT_INSN (insn))
3799 rtx note = find_reg_note (insn, REG_EH_REGION, NULL_RTX);
3802 int lp_nr = INTVAL (XEXP (note, 0));
3803 if (lp_nr == 0 || lp_nr == INT_MIN)
3804 remove_note (insn, note);
3810 /* Look for any CALL_INSNs in this sequence, and attach a REG_EH_REGION
3811 reg note to indicate that this call cannot throw or execute a nonlocal
3812 goto (unless there is already a REG_EH_REGION note, in which case
3814 for (insn = insns; insn; insn = NEXT_INSN (insn))
3816 make_reg_eh_region_note_nothrow_nononlocal (insn);
3819 /* First emit all insns that set pseudos. Remove them from the list as
3820 we go. Avoid insns that set pseudos which were referenced in previous
3821 insns. These can be generated by move_by_pieces, for example,
3822 to update an address. Similarly, avoid insns that reference things
3823 set in previous insns. */
3825 for (insn = insns; insn; insn = next)
3827 rtx set = single_set (insn);
3829 next = NEXT_INSN (insn);
3831 if (set != 0 && REG_P (SET_DEST (set))
3832 && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER)
3834 struct no_conflict_data data;
3836 data.target = const0_rtx;
3840 note_stores (PATTERN (insn), no_conflict_move_test, &data);
3841 if (! data.must_stay)
3843 if (PREV_INSN (insn))
3844 NEXT_INSN (PREV_INSN (insn)) = next;
3849 PREV_INSN (next) = PREV_INSN (insn);
3855 /* Some ports use a loop to copy large arguments onto the stack.
3856 Don't move anything outside such a loop. */
3861 /* Write the remaining insns followed by the final copy. */
3862 for (insn = insns; insn; insn = next)
3864 next = NEXT_INSN (insn);
3869 last = emit_move_insn (target, result);
3870 if (optab_handler (mov_optab, GET_MODE (target)) != CODE_FOR_nothing)
3871 set_unique_reg_note (last, REG_EQUAL, copy_rtx (equiv));
3873 if (final_dest != target)
3874 emit_move_insn (final_dest, target);
3877 /* Nonzero if we can perform a comparison of mode MODE straightforwardly.
3878 PURPOSE describes how this comparison will be used. CODE is the rtx
3879 comparison code we will be using.
3881 ??? Actually, CODE is slightly weaker than that. A target is still
3882 required to implement all of the normal bcc operations, but not
3883 required to implement all (or any) of the unordered bcc operations. */
3886 can_compare_p (enum rtx_code code, enum machine_mode mode,
3887 enum can_compare_purpose purpose)
3890 test = gen_rtx_fmt_ee (code, mode, const0_rtx, const0_rtx);
3893 enum insn_code icode;
3895 if (purpose == ccp_jump
3896 && (icode = optab_handler (cbranch_optab, mode)) != CODE_FOR_nothing
3897 && insn_operand_matches (icode, 0, test))
3899 if (purpose == ccp_store_flag
3900 && (icode = optab_handler (cstore_optab, mode)) != CODE_FOR_nothing
3901 && insn_operand_matches (icode, 1, test))
3903 if (purpose == ccp_cmov
3904 && optab_handler (cmov_optab, mode) != CODE_FOR_nothing)
3907 mode = GET_MODE_WIDER_MODE (mode);
3908 PUT_MODE (test, mode);
3910 while (mode != VOIDmode);
3915 /* This function is called when we are going to emit a compare instruction that
3916 compares the values found in *PX and *PY, using the rtl operator COMPARISON.
3918 *PMODE is the mode of the inputs (in case they are const_int).
3919 *PUNSIGNEDP nonzero says that the operands are unsigned;
3920 this matters if they need to be widened (as given by METHODS).
3922 If they have mode BLKmode, then SIZE specifies the size of both operands.
3924 This function performs all the setup necessary so that the caller only has
3925 to emit a single comparison insn. This setup can involve doing a BLKmode
3926 comparison or emitting a library call to perform the comparison if no insn
3927 is available to handle it.
3928 The values which are passed in through pointers can be modified; the caller
3929 should perform the comparison on the modified values. Constant
3930 comparisons must have already been folded. */
3933 prepare_cmp_insn (rtx x, rtx y, enum rtx_code comparison, rtx size,
3934 int unsignedp, enum optab_methods methods,
3935 rtx *ptest, enum machine_mode *pmode)
3937 enum machine_mode mode = *pmode;
3939 enum machine_mode cmp_mode;
3940 enum mode_class mclass;
3942 /* The other methods are not needed. */
3943 gcc_assert (methods == OPTAB_DIRECT || methods == OPTAB_WIDEN
3944 || methods == OPTAB_LIB_WIDEN);
3946 /* If we are optimizing, force expensive constants into a register. */
3947 if (CONSTANT_P (x) && optimize
3948 && (rtx_cost (x, COMPARE, 0, optimize_insn_for_speed_p ())
3949 > COSTS_N_INSNS (1)))
3950 x = force_reg (mode, x);
3952 if (CONSTANT_P (y) && optimize
3953 && (rtx_cost (y, COMPARE, 1, optimize_insn_for_speed_p ())
3954 > COSTS_N_INSNS (1)))
3955 y = force_reg (mode, y);
3958 /* Make sure if we have a canonical comparison. The RTL
3959 documentation states that canonical comparisons are required only
3960 for targets which have cc0. */
3961 gcc_assert (!CONSTANT_P (x) || CONSTANT_P (y));
3964 /* Don't let both operands fail to indicate the mode. */
3965 if (GET_MODE (x) == VOIDmode && GET_MODE (y) == VOIDmode)
3966 x = force_reg (mode, x);
3967 if (mode == VOIDmode)
3968 mode = GET_MODE (x) != VOIDmode ? GET_MODE (x) : GET_MODE (y);
3970 /* Handle all BLKmode compares. */
3972 if (mode == BLKmode)
3974 enum machine_mode result_mode;
3975 enum insn_code cmp_code;
3980 = GEN_INT (MIN (MEM_ALIGN (x), MEM_ALIGN (y)) / BITS_PER_UNIT);
3984 /* Try to use a memory block compare insn - either cmpstr
3985 or cmpmem will do. */
3986 for (cmp_mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
3987 cmp_mode != VOIDmode;
3988 cmp_mode = GET_MODE_WIDER_MODE (cmp_mode))
3990 cmp_code = direct_optab_handler (cmpmem_optab, cmp_mode);
3991 if (cmp_code == CODE_FOR_nothing)
3992 cmp_code = direct_optab_handler (cmpstr_optab, cmp_mode);
3993 if (cmp_code == CODE_FOR_nothing)
3994 cmp_code = direct_optab_handler (cmpstrn_optab, cmp_mode);
3995 if (cmp_code == CODE_FOR_nothing)
3998 /* Must make sure the size fits the insn's mode. */
3999 if ((CONST_INT_P (size)
4000 && INTVAL (size) >= (1 << GET_MODE_BITSIZE (cmp_mode)))
4001 || (GET_MODE_BITSIZE (GET_MODE (size))
4002 > GET_MODE_BITSIZE (cmp_mode)))
4005 result_mode = insn_data[cmp_code].operand[0].mode;
4006 result = gen_reg_rtx (result_mode);
4007 size = convert_to_mode (cmp_mode, size, 1);
4008 emit_insn (GEN_FCN (cmp_code) (result, x, y, size, opalign));
4010 *ptest = gen_rtx_fmt_ee (comparison, VOIDmode, result, const0_rtx);
4011 *pmode = result_mode;
4015 if (methods != OPTAB_LIB && methods != OPTAB_LIB_WIDEN)
4018 /* Otherwise call a library function, memcmp. */
4019 libfunc = memcmp_libfunc;
4020 length_type = sizetype;
4021 result_mode = TYPE_MODE (integer_type_node);
4022 cmp_mode = TYPE_MODE (length_type);
4023 size = convert_to_mode (TYPE_MODE (length_type), size,
4024 TYPE_UNSIGNED (length_type));
4026 result = emit_library_call_value (libfunc, 0, LCT_PURE,
4032 *ptest = gen_rtx_fmt_ee (comparison, VOIDmode, result, const0_rtx);
4033 *pmode = result_mode;
4037 /* Don't allow operands to the compare to trap, as that can put the
4038 compare and branch in different basic blocks. */
4039 if (cfun->can_throw_non_call_exceptions)
4042 x = force_reg (mode, x);
4044 y = force_reg (mode, y);
4047 if (GET_MODE_CLASS (mode) == MODE_CC)
4049 gcc_assert (can_compare_p (comparison, CCmode, ccp_jump));
4050 *ptest = gen_rtx_fmt_ee (comparison, VOIDmode, x, y);
4054 mclass = GET_MODE_CLASS (mode);
4055 test = gen_rtx_fmt_ee (comparison, VOIDmode, x, y);
4059 enum insn_code icode;
4060 icode = optab_handler (cbranch_optab, cmp_mode);
4061 if (icode != CODE_FOR_nothing
4062 && insn_operand_matches (icode, 0, test))
4064 rtx last = get_last_insn ();
4065 rtx op0 = prepare_operand (icode, x, 1, mode, cmp_mode, unsignedp);
4066 rtx op1 = prepare_operand (icode, y, 2, mode, cmp_mode, unsignedp);
4068 && insn_operand_matches (icode, 1, op0)
4069 && insn_operand_matches (icode, 2, op1))
4071 XEXP (test, 0) = op0;
4072 XEXP (test, 1) = op1;
4077 delete_insns_since (last);
4080 if (methods == OPTAB_DIRECT || !CLASS_HAS_WIDER_MODES_P (mclass))
4082 cmp_mode = GET_MODE_WIDER_MODE (cmp_mode);
4084 while (cmp_mode != VOIDmode);
4086 if (methods != OPTAB_LIB_WIDEN)
4089 if (!SCALAR_FLOAT_MODE_P (mode))
4093 /* Handle a libcall just for the mode we are using. */
4094 libfunc = optab_libfunc (cmp_optab, mode);
4095 gcc_assert (libfunc);
4097 /* If we want unsigned, and this mode has a distinct unsigned
4098 comparison routine, use that. */
4101 rtx ulibfunc = optab_libfunc (ucmp_optab, mode);
4106 result = emit_library_call_value (libfunc, NULL_RTX, LCT_CONST,
4107 targetm.libgcc_cmp_return_mode (),
4108 2, x, mode, y, mode);
4110 /* There are two kinds of comparison routines. Biased routines
4111 return 0/1/2, and unbiased routines return -1/0/1. Other parts
4112 of gcc expect that the comparison operation is equivalent
4113 to the modified comparison. For signed comparisons compare the
4114 result against 1 in the biased case, and zero in the unbiased
4115 case. For unsigned comparisons always compare against 1 after
4116 biasing the unbiased result by adding 1. This gives us a way to
4118 The comparisons in the fixed-point helper library are always
4123 if (!TARGET_LIB_INT_CMP_BIASED && !ALL_FIXED_POINT_MODE_P (mode))
4126 x = plus_constant (result, 1);
4132 prepare_cmp_insn (x, y, comparison, NULL_RTX, unsignedp, methods,
4136 prepare_float_lib_cmp (x, y, comparison, ptest, pmode);
4144 /* Before emitting an insn with code ICODE, make sure that X, which is going
4145 to be used for operand OPNUM of the insn, is converted from mode MODE to
4146 WIDER_MODE (UNSIGNEDP determines whether it is an unsigned conversion), and
4147 that it is accepted by the operand predicate. Return the new value. */
4150 prepare_operand (enum insn_code icode, rtx x, int opnum, enum machine_mode mode,
4151 enum machine_mode wider_mode, int unsignedp)
4153 if (mode != wider_mode)
4154 x = convert_modes (wider_mode, mode, x, unsignedp);
4156 if (!insn_operand_matches (icode, opnum, x))
4158 if (reload_completed)
4160 x = copy_to_mode_reg (insn_data[(int) icode].operand[opnum].mode, x);
4166 /* Subroutine of emit_cmp_and_jump_insns; this function is called when we know
4167 we can do the branch. */
4170 emit_cmp_and_jump_insn_1 (rtx test, enum machine_mode mode, rtx label)
4172 enum machine_mode optab_mode;
4173 enum mode_class mclass;
4174 enum insn_code icode;
4176 mclass = GET_MODE_CLASS (mode);
4177 optab_mode = (mclass == MODE_CC) ? CCmode : mode;
4178 icode = optab_handler (cbranch_optab, optab_mode);
4180 gcc_assert (icode != CODE_FOR_nothing);
4181 gcc_assert (insn_operand_matches (icode, 0, test));
4182 emit_jump_insn (GEN_FCN (icode) (test, XEXP (test, 0), XEXP (test, 1), label));
4185 /* Generate code to compare X with Y so that the condition codes are
4186 set and to jump to LABEL if the condition is true. If X is a
4187 constant and Y is not a constant, then the comparison is swapped to
4188 ensure that the comparison RTL has the canonical form.
4190 UNSIGNEDP nonzero says that X and Y are unsigned; this matters if they
4191 need to be widened. UNSIGNEDP is also used to select the proper
4192 branch condition code.
4194 If X and Y have mode BLKmode, then SIZE specifies the size of both X and Y.
4196 MODE is the mode of the inputs (in case they are const_int).
4198 COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.).
4199 It will be potentially converted into an unsigned variant based on
4200 UNSIGNEDP to select a proper jump instruction. */
4203 emit_cmp_and_jump_insns (rtx x, rtx y, enum rtx_code comparison, rtx size,
4204 enum machine_mode mode, int unsignedp, rtx label)
4206 rtx op0 = x, op1 = y;
4209 /* Swap operands and condition to ensure canonical RTL. */
4210 if (swap_commutative_operands_p (x, y)
4211 && can_compare_p (swap_condition (comparison), mode, ccp_jump))
4214 comparison = swap_condition (comparison);
4217 /* If OP0 is still a constant, then both X and Y must be constants
4218 or the opposite comparison is not supported. Force X into a register
4219 to create canonical RTL. */
4220 if (CONSTANT_P (op0))
4221 op0 = force_reg (mode, op0);
4224 comparison = unsigned_condition (comparison);
4226 prepare_cmp_insn (op0, op1, comparison, size, unsignedp, OPTAB_LIB_WIDEN,
4228 emit_cmp_and_jump_insn_1 (test, mode, label);
4232 /* Emit a library call comparison between floating point X and Y.
4233 COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.). */
4236 prepare_float_lib_cmp (rtx x, rtx y, enum rtx_code comparison,
4237 rtx *ptest, enum machine_mode *pmode)
4239 enum rtx_code swapped = swap_condition (comparison);
4240 enum rtx_code reversed = reverse_condition_maybe_unordered (comparison);
4241 enum machine_mode orig_mode = GET_MODE (x);
4242 enum machine_mode mode, cmp_mode;
4243 rtx true_rtx, false_rtx;
4244 rtx value, target, insns, equiv;
4246 bool reversed_p = false;
4247 cmp_mode = targetm.libgcc_cmp_return_mode ();
4249 for (mode = orig_mode;
4251 mode = GET_MODE_WIDER_MODE (mode))
4253 if (code_to_optab[comparison]
4254 && (libfunc = optab_libfunc (code_to_optab[comparison], mode)))
4257 if (code_to_optab[swapped]
4258 && (libfunc = optab_libfunc (code_to_optab[swapped], mode)))
4261 tmp = x; x = y; y = tmp;
4262 comparison = swapped;
4266 if (code_to_optab[reversed]
4267 && (libfunc = optab_libfunc (code_to_optab[reversed], mode)))
4269 comparison = reversed;
4275 gcc_assert (mode != VOIDmode);
4277 if (mode != orig_mode)
4279 x = convert_to_mode (mode, x, 0);
4280 y = convert_to_mode (mode, y, 0);
4283 /* Attach a REG_EQUAL note describing the semantics of the libcall to
4284 the RTL. The allows the RTL optimizers to delete the libcall if the
4285 condition can be determined at compile-time. */
4286 if (comparison == UNORDERED
4287 || FLOAT_LIB_COMPARE_RETURNS_BOOL (mode, comparison))
4289 true_rtx = const_true_rtx;
4290 false_rtx = const0_rtx;
4297 true_rtx = const0_rtx;
4298 false_rtx = const_true_rtx;
4302 true_rtx = const_true_rtx;
4303 false_rtx = const0_rtx;
4307 true_rtx = const1_rtx;
4308 false_rtx = const0_rtx;
4312 true_rtx = const0_rtx;
4313 false_rtx = constm1_rtx;
4317 true_rtx = constm1_rtx;
4318 false_rtx = const0_rtx;
4322 true_rtx = const0_rtx;
4323 false_rtx = const1_rtx;
4331 if (comparison == UNORDERED)
4333 rtx temp = simplify_gen_relational (NE, cmp_mode, mode, x, x);
4334 equiv = simplify_gen_relational (NE, cmp_mode, mode, y, y);
4335 equiv = simplify_gen_ternary (IF_THEN_ELSE, cmp_mode, cmp_mode,
4336 temp, const_true_rtx, equiv);
4340 equiv = simplify_gen_relational (comparison, cmp_mode, mode, x, y);
4341 if (! FLOAT_LIB_COMPARE_RETURNS_BOOL (mode, comparison))
4342 equiv = simplify_gen_ternary (IF_THEN_ELSE, cmp_mode, cmp_mode,
4343 equiv, true_rtx, false_rtx);
4347 value = emit_library_call_value (libfunc, NULL_RTX, LCT_CONST,
4348 cmp_mode, 2, x, mode, y, mode);
4349 insns = get_insns ();
4352 target = gen_reg_rtx (cmp_mode);
4353 emit_libcall_block (insns, target, value, equiv);
4355 if (comparison == UNORDERED
4356 || FLOAT_LIB_COMPARE_RETURNS_BOOL (mode, comparison)
4358 *ptest = gen_rtx_fmt_ee (reversed_p ? EQ : NE, VOIDmode, target, false_rtx);
4360 *ptest = gen_rtx_fmt_ee (comparison, VOIDmode, target, const0_rtx);
4365 /* Generate code to indirectly jump to a location given in the rtx LOC. */
4368 emit_indirect_jump (rtx loc)
4370 struct expand_operand ops[1];
4372 create_address_operand (&ops[0], loc);
4373 expand_jump_insn (CODE_FOR_indirect_jump, 1, ops);
4377 #ifdef HAVE_conditional_move
4379 /* Emit a conditional move instruction if the machine supports one for that
4380 condition and machine mode.
4382 OP0 and OP1 are the operands that should be compared using CODE. CMODE is
4383 the mode to use should they be constants. If it is VOIDmode, they cannot
4386 OP2 should be stored in TARGET if the comparison is true, otherwise OP3
4387 should be stored there. MODE is the mode to use should they be constants.
4388 If it is VOIDmode, they cannot both be constants.
4390 The result is either TARGET (perhaps modified) or NULL_RTX if the operation
4391 is not supported. */
4394 emit_conditional_move (rtx target, enum rtx_code code, rtx op0, rtx op1,
4395 enum machine_mode cmode, rtx op2, rtx op3,
4396 enum machine_mode mode, int unsignedp)
4398 rtx tem, comparison, last;
4399 enum insn_code icode;
4400 enum rtx_code reversed;
4402 /* If one operand is constant, make it the second one. Only do this
4403 if the other operand is not constant as well. */
4405 if (swap_commutative_operands_p (op0, op1))
4410 code = swap_condition (code);
4413 /* get_condition will prefer to generate LT and GT even if the old
4414 comparison was against zero, so undo that canonicalization here since
4415 comparisons against zero are cheaper. */
4416 if (code == LT && op1 == const1_rtx)
4417 code = LE, op1 = const0_rtx;
4418 else if (code == GT && op1 == constm1_rtx)
4419 code = GE, op1 = const0_rtx;
4421 if (cmode == VOIDmode)
4422 cmode = GET_MODE (op0);
4424 if (swap_commutative_operands_p (op2, op3)
4425 && ((reversed = reversed_comparison_code_parts (code, op0, op1, NULL))
4434 if (mode == VOIDmode)
4435 mode = GET_MODE (op2);
4437 icode = direct_optab_handler (movcc_optab, mode);
4439 if (icode == CODE_FOR_nothing)
4443 target = gen_reg_rtx (mode);
4445 code = unsignedp ? unsigned_condition (code) : code;
4446 comparison = simplify_gen_relational (code, VOIDmode, cmode, op0, op1);
4448 /* We can get const0_rtx or const_true_rtx in some circumstances. Just
4449 return NULL and let the caller figure out how best to deal with this
4451 if (!COMPARISON_P (comparison))
4454 do_pending_stack_adjust ();
4455 last = get_last_insn ();
4456 prepare_cmp_insn (XEXP (comparison, 0), XEXP (comparison, 1),
4457 GET_CODE (comparison), NULL_RTX, unsignedp, OPTAB_WIDEN,
4458 &comparison, &cmode);
4461 struct expand_operand ops[4];
4463 create_output_operand (&ops[0], target, mode);
4464 create_fixed_operand (&ops[1], comparison);
4465 create_input_operand (&ops[2], op2, mode);
4466 create_input_operand (&ops[3], op3, mode);
4467 if (maybe_expand_insn (icode, 4, ops))
4469 if (ops[0].value != target)
4470 convert_move (target, ops[0].value, false);
4474 delete_insns_since (last);
4478 /* Return nonzero if a conditional move of mode MODE is supported.
4480 This function is for combine so it can tell whether an insn that looks
4481 like a conditional move is actually supported by the hardware. If we
4482 guess wrong we lose a bit on optimization, but that's it. */
4483 /* ??? sparc64 supports conditionally moving integers values based on fp
4484 comparisons, and vice versa. How do we handle them? */
4487 can_conditionally_move_p (enum machine_mode mode)
4489 if (direct_optab_handler (movcc_optab, mode) != CODE_FOR_nothing)
4495 #endif /* HAVE_conditional_move */
4497 /* Emit a conditional addition instruction if the machine supports one for that
4498 condition and machine mode.
4500 OP0 and OP1 are the operands that should be compared using CODE. CMODE is
4501 the mode to use should they be constants. If it is VOIDmode, they cannot
4504 OP2 should be stored in TARGET if the comparison is true, otherwise OP2+OP3
4505 should be stored there. MODE is the mode to use should they be constants.
4506 If it is VOIDmode, they cannot both be constants.
4508 The result is either TARGET (perhaps modified) or NULL_RTX if the operation
4509 is not supported. */
4512 emit_conditional_add (rtx target, enum rtx_code code, rtx op0, rtx op1,
4513 enum machine_mode cmode, rtx op2, rtx op3,
4514 enum machine_mode mode, int unsignedp)
4516 rtx tem, comparison, last;
4517 enum insn_code icode;
4518 enum rtx_code reversed;
4520 /* If one operand is constant, make it the second one. Only do this
4521 if the other operand is not constant as well. */
4523 if (swap_commutative_operands_p (op0, op1))
4528 code = swap_condition (code);
4531 /* get_condition will prefer to generate LT and GT even if the old
4532 comparison was against zero, so undo that canonicalization here since
4533 comparisons against zero are cheaper. */
4534 if (code == LT && op1 == const1_rtx)
4535 code = LE, op1 = const0_rtx;
4536 else if (code == GT && op1 == constm1_rtx)
4537 code = GE, op1 = const0_rtx;
4539 if (cmode == VOIDmode)
4540 cmode = GET_MODE (op0);
4542 if (swap_commutative_operands_p (op2, op3)
4543 && ((reversed = reversed_comparison_code_parts (code, op0, op1, NULL))
4552 if (mode == VOIDmode)
4553 mode = GET_MODE (op2);
4555 icode = optab_handler (addcc_optab, mode);
4557 if (icode == CODE_FOR_nothing)
4561 target = gen_reg_rtx (mode);
4563 code = unsignedp ? unsigned_condition (code) : code;
4564 comparison = simplify_gen_relational (code, VOIDmode, cmode, op0, op1);
4566 /* We can get const0_rtx or const_true_rtx in some circumstances. Just
4567 return NULL and let the caller figure out how best to deal with this
4569 if (!COMPARISON_P (comparison))
4572 do_pending_stack_adjust ();
4573 last = get_last_insn ();
4574 prepare_cmp_insn (XEXP (comparison, 0), XEXP (comparison, 1),
4575 GET_CODE (comparison), NULL_RTX, unsignedp, OPTAB_WIDEN,
4576 &comparison, &cmode);
4579 struct expand_operand ops[4];
4581 create_output_operand (&ops[0], target, mode);
4582 create_fixed_operand (&ops[1], comparison);
4583 create_input_operand (&ops[2], op2, mode);
4584 create_input_operand (&ops[3], op3, mode);
4585 if (maybe_expand_insn (icode, 4, ops))
4587 if (ops[0].value != target)
4588 convert_move (target, ops[0].value, false);
4592 delete_insns_since (last);
4596 /* These functions attempt to generate an insn body, rather than
4597 emitting the insn, but if the gen function already emits them, we
4598 make no attempt to turn them back into naked patterns. */
4600 /* Generate and return an insn body to add Y to X. */
4603 gen_add2_insn (rtx x, rtx y)
4605 enum insn_code icode = optab_handler (add_optab, GET_MODE (x));
4607 gcc_assert (insn_operand_matches (icode, 0, x));
4608 gcc_assert (insn_operand_matches (icode, 1, x));
4609 gcc_assert (insn_operand_matches (icode, 2, y));
4611 return GEN_FCN (icode) (x, x, y);
4614 /* Generate and return an insn body to add r1 and c,
4615 storing the result in r0. */
4618 gen_add3_insn (rtx r0, rtx r1, rtx c)
4620 enum insn_code icode = optab_handler (add_optab, GET_MODE (r0));
4622 if (icode == CODE_FOR_nothing
4623 || !insn_operand_matches (icode, 0, r0)
4624 || !insn_operand_matches (icode, 1, r1)
4625 || !insn_operand_matches (icode, 2, c))
4628 return GEN_FCN (icode) (r0, r1, c);
4632 have_add2_insn (rtx x, rtx y)
4634 enum insn_code icode;
4636 gcc_assert (GET_MODE (x) != VOIDmode);
4638 icode = optab_handler (add_optab, GET_MODE (x));
4640 if (icode == CODE_FOR_nothing)
4643 if (!insn_operand_matches (icode, 0, x)
4644 || !insn_operand_matches (icode, 1, x)
4645 || !insn_operand_matches (icode, 2, y))
4651 /* Generate and return an insn body to subtract Y from X. */
4654 gen_sub2_insn (rtx x, rtx y)
4656 enum insn_code icode = optab_handler (sub_optab, GET_MODE (x));
4658 gcc_assert (insn_operand_matches (icode, 0, x));
4659 gcc_assert (insn_operand_matches (icode, 1, x));
4660 gcc_assert (insn_operand_matches (icode, 2, y));
4662 return GEN_FCN (icode) (x, x, y);
4665 /* Generate and return an insn body to subtract r1 and c,
4666 storing the result in r0. */
4669 gen_sub3_insn (rtx r0, rtx r1, rtx c)
4671 enum insn_code icode = optab_handler (sub_optab, GET_MODE (r0));
4673 if (icode == CODE_FOR_nothing
4674 || !insn_operand_matches (icode, 0, r0)
4675 || !insn_operand_matches (icode, 1, r1)
4676 || !insn_operand_matches (icode, 2, c))
4679 return GEN_FCN (icode) (r0, r1, c);
4683 have_sub2_insn (rtx x, rtx y)
4685 enum insn_code icode;
4687 gcc_assert (GET_MODE (x) != VOIDmode);
4689 icode = optab_handler (sub_optab, GET_MODE (x));
4691 if (icode == CODE_FOR_nothing)
4694 if (!insn_operand_matches (icode, 0, x)
4695 || !insn_operand_matches (icode, 1, x)
4696 || !insn_operand_matches (icode, 2, y))
4702 /* Generate the body of an instruction to copy Y into X.
4703 It may be a list of insns, if one insn isn't enough. */
4706 gen_move_insn (rtx x, rtx y)
4711 emit_move_insn_1 (x, y);
4717 /* Return the insn code used to extend FROM_MODE to TO_MODE.
4718 UNSIGNEDP specifies zero-extension instead of sign-extension. If
4719 no such operation exists, CODE_FOR_nothing will be returned. */
4722 can_extend_p (enum machine_mode to_mode, enum machine_mode from_mode,
4726 #ifdef HAVE_ptr_extend
4728 return CODE_FOR_ptr_extend;
4731 tab = unsignedp ? zext_optab : sext_optab;
4732 return convert_optab_handler (tab, to_mode, from_mode);
4735 /* Generate the body of an insn to extend Y (with mode MFROM)
4736 into X (with mode MTO). Do zero-extension if UNSIGNEDP is nonzero. */
4739 gen_extend_insn (rtx x, rtx y, enum machine_mode mto,
4740 enum machine_mode mfrom, int unsignedp)
4742 enum insn_code icode = can_extend_p (mto, mfrom, unsignedp);
4743 return GEN_FCN (icode) (x, y);
4746 /* can_fix_p and can_float_p say whether the target machine
4747 can directly convert a given fixed point type to
4748 a given floating point type, or vice versa.
4749 The returned value is the CODE_FOR_... value to use,
4750 or CODE_FOR_nothing if these modes cannot be directly converted.
4752 *TRUNCP_PTR is set to 1 if it is necessary to output
4753 an explicit FTRUNC insn before the fix insn; otherwise 0. */
4755 static enum insn_code
4756 can_fix_p (enum machine_mode fixmode, enum machine_mode fltmode,
4757 int unsignedp, int *truncp_ptr)
4760 enum insn_code icode;
4762 tab = unsignedp ? ufixtrunc_optab : sfixtrunc_optab;
4763 icode = convert_optab_handler (tab, fixmode, fltmode);
4764 if (icode != CODE_FOR_nothing)
4770 /* FIXME: This requires a port to define both FIX and FTRUNC pattern
4771 for this to work. We need to rework the fix* and ftrunc* patterns
4772 and documentation. */
4773 tab = unsignedp ? ufix_optab : sfix_optab;
4774 icode = convert_optab_handler (tab, fixmode, fltmode);
4775 if (icode != CODE_FOR_nothing
4776 && optab_handler (ftrunc_optab, fltmode) != CODE_FOR_nothing)
4783 return CODE_FOR_nothing;
4787 can_float_p (enum machine_mode fltmode, enum machine_mode fixmode,
4792 tab = unsignedp ? ufloat_optab : sfloat_optab;
4793 return convert_optab_handler (tab, fltmode, fixmode);
4796 /* Generate code to convert FROM to floating point
4797 and store in TO. FROM must be fixed point and not VOIDmode.
4798 UNSIGNEDP nonzero means regard FROM as unsigned.
4799 Normally this is done by correcting the final value
4800 if it is negative. */
4803 expand_float (rtx to, rtx from, int unsignedp)
4805 enum insn_code icode;
4807 enum machine_mode fmode, imode;
4808 bool can_do_signed = false;
4810 /* Crash now, because we won't be able to decide which mode to use. */
4811 gcc_assert (GET_MODE (from) != VOIDmode);
4813 /* Look for an insn to do the conversion. Do it in the specified
4814 modes if possible; otherwise convert either input, output or both to
4815 wider mode. If the integer mode is wider than the mode of FROM,
4816 we can do the conversion signed even if the input is unsigned. */
4818 for (fmode = GET_MODE (to); fmode != VOIDmode;
4819 fmode = GET_MODE_WIDER_MODE (fmode))
4820 for (imode = GET_MODE (from); imode != VOIDmode;
4821 imode = GET_MODE_WIDER_MODE (imode))
4823 int doing_unsigned = unsignedp;
4825 if (fmode != GET_MODE (to)
4826 && significand_size (fmode) < GET_MODE_PRECISION (GET_MODE (from)))
4829 icode = can_float_p (fmode, imode, unsignedp);
4830 if (icode == CODE_FOR_nothing && unsignedp)
4832 enum insn_code scode = can_float_p (fmode, imode, 0);
4833 if (scode != CODE_FOR_nothing)
4834 can_do_signed = true;
4835 if (imode != GET_MODE (from))
4836 icode = scode, doing_unsigned = 0;
4839 if (icode != CODE_FOR_nothing)
4841 if (imode != GET_MODE (from))
4842 from = convert_to_mode (imode, from, unsignedp);
4844 if (fmode != GET_MODE (to))
4845 target = gen_reg_rtx (fmode);
4847 emit_unop_insn (icode, target, from,
4848 doing_unsigned ? UNSIGNED_FLOAT : FLOAT);
4851 convert_move (to, target, 0);
4856 /* Unsigned integer, and no way to convert directly. Convert as signed,
4857 then unconditionally adjust the result. */
4858 if (unsignedp && can_do_signed)
4860 rtx label = gen_label_rtx ();
4862 REAL_VALUE_TYPE offset;
4864 /* Look for a usable floating mode FMODE wider than the source and at
4865 least as wide as the target. Using FMODE will avoid rounding woes
4866 with unsigned values greater than the signed maximum value. */
4868 for (fmode = GET_MODE (to); fmode != VOIDmode;
4869 fmode = GET_MODE_WIDER_MODE (fmode))
4870 if (GET_MODE_PRECISION (GET_MODE (from)) < GET_MODE_BITSIZE (fmode)
4871 && can_float_p (fmode, GET_MODE (from), 0) != CODE_FOR_nothing)
4874 if (fmode == VOIDmode)
4876 /* There is no such mode. Pretend the target is wide enough. */
4877 fmode = GET_MODE (to);
4879 /* Avoid double-rounding when TO is narrower than FROM. */
4880 if ((significand_size (fmode) + 1)
4881 < GET_MODE_PRECISION (GET_MODE (from)))
4884 rtx neglabel = gen_label_rtx ();
4886 /* Don't use TARGET if it isn't a register, is a hard register,
4887 or is the wrong mode. */
4889 || REGNO (target) < FIRST_PSEUDO_REGISTER
4890 || GET_MODE (target) != fmode)
4891 target = gen_reg_rtx (fmode);
4893 imode = GET_MODE (from);
4894 do_pending_stack_adjust ();
4896 /* Test whether the sign bit is set. */
4897 emit_cmp_and_jump_insns (from, const0_rtx, LT, NULL_RTX, imode,
4900 /* The sign bit is not set. Convert as signed. */
4901 expand_float (target, from, 0);
4902 emit_jump_insn (gen_jump (label));
4905 /* The sign bit is set.
4906 Convert to a usable (positive signed) value by shifting right
4907 one bit, while remembering if a nonzero bit was shifted
4908 out; i.e., compute (from & 1) | (from >> 1). */
4910 emit_label (neglabel);
4911 temp = expand_binop (imode, and_optab, from, const1_rtx,
4912 NULL_RTX, 1, OPTAB_LIB_WIDEN);
4913 temp1 = expand_shift (RSHIFT_EXPR, imode, from, 1, NULL_RTX, 1);
4914 temp = expand_binop (imode, ior_optab, temp, temp1, temp, 1,
4916 expand_float (target, temp, 0);
4918 /* Multiply by 2 to undo the shift above. */
4919 temp = expand_binop (fmode, add_optab, target, target,
4920 target, 0, OPTAB_LIB_WIDEN);
4922 emit_move_insn (target, temp);
4924 do_pending_stack_adjust ();
4930 /* If we are about to do some arithmetic to correct for an
4931 unsigned operand, do it in a pseudo-register. */
4933 if (GET_MODE (to) != fmode
4934 || !REG_P (to) || REGNO (to) < FIRST_PSEUDO_REGISTER)
4935 target = gen_reg_rtx (fmode);
4937 /* Convert as signed integer to floating. */
4938 expand_float (target, from, 0);
4940 /* If FROM is negative (and therefore TO is negative),
4941 correct its value by 2**bitwidth. */
4943 do_pending_stack_adjust ();
4944 emit_cmp_and_jump_insns (from, const0_rtx, GE, NULL_RTX, GET_MODE (from),
4948 real_2expN (&offset, GET_MODE_PRECISION (GET_MODE (from)), fmode);
4949 temp = expand_binop (fmode, add_optab, target,
4950 CONST_DOUBLE_FROM_REAL_VALUE (offset, fmode),
4951 target, 0, OPTAB_LIB_WIDEN);
4953 emit_move_insn (target, temp);
4955 do_pending_stack_adjust ();
4960 /* No hardware instruction available; call a library routine. */
4965 convert_optab tab = unsignedp ? ufloat_optab : sfloat_optab;
4967 if (GET_MODE_SIZE (GET_MODE (from)) < GET_MODE_SIZE (SImode))
4968 from = convert_to_mode (SImode, from, unsignedp);
4970 libfunc = convert_optab_libfunc (tab, GET_MODE (to), GET_MODE (from));
4971 gcc_assert (libfunc);
4975 value = emit_library_call_value (libfunc, NULL_RTX, LCT_CONST,
4976 GET_MODE (to), 1, from,
4978 insns = get_insns ();
4981 emit_libcall_block (insns, target, value,
4982 gen_rtx_fmt_e (unsignedp ? UNSIGNED_FLOAT : FLOAT,
4983 GET_MODE (to), from));
4988 /* Copy result to requested destination
4989 if we have been computing in a temp location. */
4993 if (GET_MODE (target) == GET_MODE (to))
4994 emit_move_insn (to, target);
4996 convert_move (to, target, 0);
5000 /* Generate code to convert FROM to fixed point and store in TO. FROM
5001 must be floating point. */
5004 expand_fix (rtx to, rtx from, int unsignedp)
5006 enum insn_code icode;
5008 enum machine_mode fmode, imode;
5011 /* We first try to find a pair of modes, one real and one integer, at
5012 least as wide as FROM and TO, respectively, in which we can open-code
5013 this conversion. If the integer mode is wider than the mode of TO,
5014 we can do the conversion either signed or unsigned. */
5016 for (fmode = GET_MODE (from); fmode != VOIDmode;
5017 fmode = GET_MODE_WIDER_MODE (fmode))
5018 for (imode = GET_MODE (to); imode != VOIDmode;
5019 imode = GET_MODE_WIDER_MODE (imode))
5021 int doing_unsigned = unsignedp;
5023 icode = can_fix_p (imode, fmode, unsignedp, &must_trunc);
5024 if (icode == CODE_FOR_nothing && imode != GET_MODE (to) && unsignedp)
5025 icode = can_fix_p (imode, fmode, 0, &must_trunc), doing_unsigned = 0;
5027 if (icode != CODE_FOR_nothing)
5029 rtx last = get_last_insn ();
5030 if (fmode != GET_MODE (from))
5031 from = convert_to_mode (fmode, from, 0);
5035 rtx temp = gen_reg_rtx (GET_MODE (from));
5036 from = expand_unop (GET_MODE (from), ftrunc_optab, from,
5040 if (imode != GET_MODE (to))
5041 target = gen_reg_rtx (imode);
5043 if (maybe_emit_unop_insn (icode, target, from,
5044 doing_unsigned ? UNSIGNED_FIX : FIX))
5047 convert_move (to, target, unsignedp);
5050 delete_insns_since (last);
5054 /* For an unsigned conversion, there is one more way to do it.
5055 If we have a signed conversion, we generate code that compares
5056 the real value to the largest representable positive number. If if
5057 is smaller, the conversion is done normally. Otherwise, subtract
5058 one plus the highest signed number, convert, and add it back.
5060 We only need to check all real modes, since we know we didn't find
5061 anything with a wider integer mode.
5063 This code used to extend FP value into mode wider than the destination.
5064 This is needed for decimal float modes which cannot accurately
5065 represent one plus the highest signed number of the same size, but
5066 not for binary modes. Consider, for instance conversion from SFmode
5069 The hot path through the code is dealing with inputs smaller than 2^63
5070 and doing just the conversion, so there is no bits to lose.
5072 In the other path we know the value is positive in the range 2^63..2^64-1
5073 inclusive. (as for other input overflow happens and result is undefined)
5074 So we know that the most important bit set in mantissa corresponds to
5075 2^63. The subtraction of 2^63 should not generate any rounding as it
5076 simply clears out that bit. The rest is trivial. */
5078 if (unsignedp && GET_MODE_PRECISION (GET_MODE (to)) <= HOST_BITS_PER_WIDE_INT)
5079 for (fmode = GET_MODE (from); fmode != VOIDmode;
5080 fmode = GET_MODE_WIDER_MODE (fmode))
5081 if (CODE_FOR_nothing != can_fix_p (GET_MODE (to), fmode, 0, &must_trunc)
5082 && (!DECIMAL_FLOAT_MODE_P (fmode)
5083 || GET_MODE_BITSIZE (fmode) > GET_MODE_PRECISION (GET_MODE (to))))
5086 REAL_VALUE_TYPE offset;
5087 rtx limit, lab1, lab2, insn;
5089 bitsize = GET_MODE_PRECISION (GET_MODE (to));
5090 real_2expN (&offset, bitsize - 1, fmode);
5091 limit = CONST_DOUBLE_FROM_REAL_VALUE (offset, fmode);
5092 lab1 = gen_label_rtx ();
5093 lab2 = gen_label_rtx ();
5095 if (fmode != GET_MODE (from))
5096 from = convert_to_mode (fmode, from, 0);
5098 /* See if we need to do the subtraction. */
5099 do_pending_stack_adjust ();
5100 emit_cmp_and_jump_insns (from, limit, GE, NULL_RTX, GET_MODE (from),
5103 /* If not, do the signed "fix" and branch around fixup code. */
5104 expand_fix (to, from, 0);
5105 emit_jump_insn (gen_jump (lab2));
5108 /* Otherwise, subtract 2**(N-1), convert to signed number,
5109 then add 2**(N-1). Do the addition using XOR since this
5110 will often generate better code. */
5112 target = expand_binop (GET_MODE (from), sub_optab, from, limit,
5113 NULL_RTX, 0, OPTAB_LIB_WIDEN);
5114 expand_fix (to, target, 0);
5115 target = expand_binop (GET_MODE (to), xor_optab, to,
5117 ((HOST_WIDE_INT) 1 << (bitsize - 1),
5119 to, 1, OPTAB_LIB_WIDEN);
5122 emit_move_insn (to, target);
5126 if (optab_handler (mov_optab, GET_MODE (to)) != CODE_FOR_nothing)
5128 /* Make a place for a REG_NOTE and add it. */
5129 insn = emit_move_insn (to, to);
5130 set_unique_reg_note (insn,
5132 gen_rtx_fmt_e (UNSIGNED_FIX,
5140 /* We can't do it with an insn, so use a library call. But first ensure
5141 that the mode of TO is at least as wide as SImode, since those are the
5142 only library calls we know about. */
5144 if (GET_MODE_SIZE (GET_MODE (to)) < GET_MODE_SIZE (SImode))
5146 target = gen_reg_rtx (SImode);
5148 expand_fix (target, from, unsignedp);
5156 convert_optab tab = unsignedp ? ufix_optab : sfix_optab;
5157 libfunc = convert_optab_libfunc (tab, GET_MODE (to), GET_MODE (from));
5158 gcc_assert (libfunc);
5162 value = emit_library_call_value (libfunc, NULL_RTX, LCT_CONST,
5163 GET_MODE (to), 1, from,
5165 insns = get_insns ();
5168 emit_libcall_block (insns, target, value,
5169 gen_rtx_fmt_e (unsignedp ? UNSIGNED_FIX : FIX,
5170 GET_MODE (to), from));
5175 if (GET_MODE (to) == GET_MODE (target))
5176 emit_move_insn (to, target);
5178 convert_move (to, target, 0);
5182 /* Generate code to convert FROM or TO a fixed-point.
5183 If UINTP is true, either TO or FROM is an unsigned integer.
5184 If SATP is true, we need to saturate the result. */
5187 expand_fixed_convert (rtx to, rtx from, int uintp, int satp)
5189 enum machine_mode to_mode = GET_MODE (to);
5190 enum machine_mode from_mode = GET_MODE (from);
5192 enum rtx_code this_code;
5193 enum insn_code code;
5197 if (to_mode == from_mode)
5199 emit_move_insn (to, from);
5205 tab = satp ? satfractuns_optab : fractuns_optab;
5206 this_code = satp ? UNSIGNED_SAT_FRACT : UNSIGNED_FRACT_CONVERT;
5210 tab = satp ? satfract_optab : fract_optab;
5211 this_code = satp ? SAT_FRACT : FRACT_CONVERT;
5213 code = convert_optab_handler (tab, to_mode, from_mode);
5214 if (code != CODE_FOR_nothing)
5216 emit_unop_insn (code, to, from, this_code);
5220 libfunc = convert_optab_libfunc (tab, to_mode, from_mode);
5221 gcc_assert (libfunc);
5224 value = emit_library_call_value (libfunc, NULL_RTX, LCT_CONST, to_mode,
5225 1, from, from_mode);
5226 insns = get_insns ();
5229 emit_libcall_block (insns, to, value,
5230 gen_rtx_fmt_e (tab->code, to_mode, from));
5233 /* Generate code to convert FROM to fixed point and store in TO. FROM
5234 must be floating point, TO must be signed. Use the conversion optab
5235 TAB to do the conversion. */
5238 expand_sfix_optab (rtx to, rtx from, convert_optab tab)
5240 enum insn_code icode;
5242 enum machine_mode fmode, imode;
5244 /* We first try to find a pair of modes, one real and one integer, at
5245 least as wide as FROM and TO, respectively, in which we can open-code
5246 this conversion. If the integer mode is wider than the mode of TO,
5247 we can do the conversion either signed or unsigned. */
5249 for (fmode = GET_MODE (from); fmode != VOIDmode;
5250 fmode = GET_MODE_WIDER_MODE (fmode))
5251 for (imode = GET_MODE (to); imode != VOIDmode;
5252 imode = GET_MODE_WIDER_MODE (imode))
5254 icode = convert_optab_handler (tab, imode, fmode);
5255 if (icode != CODE_FOR_nothing)
5257 rtx last = get_last_insn ();
5258 if (fmode != GET_MODE (from))
5259 from = convert_to_mode (fmode, from, 0);
5261 if (imode != GET_MODE (to))
5262 target = gen_reg_rtx (imode);
5264 if (!maybe_emit_unop_insn (icode, target, from, UNKNOWN))
5266 delete_insns_since (last);
5270 convert_move (to, target, 0);
5278 /* Report whether we have an instruction to perform the operation
5279 specified by CODE on operands of mode MODE. */
5281 have_insn_for (enum rtx_code code, enum machine_mode mode)
5283 return (code_to_optab[(int) code] != 0
5284 && (optab_handler (code_to_optab[(int) code], mode)
5285 != CODE_FOR_nothing));
5288 /* Set all insn_code fields to CODE_FOR_nothing. */
5291 init_insn_codes (void)
5293 memset (optab_table, 0, sizeof (optab_table));
5294 memset (convert_optab_table, 0, sizeof (convert_optab_table));
5295 memset (direct_optab_table, 0, sizeof (direct_optab_table));
5298 /* Initialize OP's code to CODE, and write it into the code_to_optab table. */
5300 init_optab (optab op, enum rtx_code code)
5303 code_to_optab[(int) code] = op;
5306 /* Same, but fill in its code as CODE, and do _not_ write it into
5307 the code_to_optab table. */
5309 init_optabv (optab op, enum rtx_code code)
5314 /* Conversion optabs never go in the code_to_optab table. */
5316 init_convert_optab (convert_optab op, enum rtx_code code)
5321 /* Initialize the libfunc fields of an entire group of entries in some
5322 optab. Each entry is set equal to a string consisting of a leading
5323 pair of underscores followed by a generic operation name followed by
5324 a mode name (downshifted to lowercase) followed by a single character
5325 representing the number of operands for the given operation (which is
5326 usually one of the characters '2', '3', or '4').
5328 OPTABLE is the table in which libfunc fields are to be initialized.
5329 OPNAME is the generic (string) name of the operation.
5330 SUFFIX is the character which specifies the number of operands for
5331 the given generic operation.
5332 MODE is the mode to generate for.
5336 gen_libfunc (optab optable, const char *opname, int suffix, enum machine_mode mode)
5338 unsigned opname_len = strlen (opname);
5339 const char *mname = GET_MODE_NAME (mode);
5340 unsigned mname_len = strlen (mname);
5341 int prefix_len = targetm.libfunc_gnu_prefix ? 6 : 2;
5342 int len = prefix_len + opname_len + mname_len + 1 + 1;
5343 char *libfunc_name = XALLOCAVEC (char, len);
5350 if (targetm.libfunc_gnu_prefix)
5357 for (q = opname; *q; )
5359 for (q = mname; *q; q++)
5360 *p++ = TOLOWER (*q);
5364 set_optab_libfunc (optable, mode,
5365 ggc_alloc_string (libfunc_name, p - libfunc_name));
5368 /* Like gen_libfunc, but verify that integer operation is involved. */
5371 gen_int_libfunc (optab optable, const char *opname, char suffix,
5372 enum machine_mode mode)
5374 int maxsize = 2 * BITS_PER_WORD;
5376 if (GET_MODE_CLASS (mode) != MODE_INT)
5378 if (maxsize < LONG_LONG_TYPE_SIZE)
5379 maxsize = LONG_LONG_TYPE_SIZE;
5380 if (GET_MODE_CLASS (mode) != MODE_INT
5381 || mode < word_mode || GET_MODE_BITSIZE (mode) > maxsize)
5383 gen_libfunc (optable, opname, suffix, mode);
5386 /* Like gen_libfunc, but verify that FP and set decimal prefix if needed. */
5389 gen_fp_libfunc (optab optable, const char *opname, char suffix,
5390 enum machine_mode mode)
5394 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
5395 gen_libfunc (optable, opname, suffix, mode);
5396 if (DECIMAL_FLOAT_MODE_P (mode))
5398 dec_opname = XALLOCAVEC (char, sizeof (DECIMAL_PREFIX) + strlen (opname));
5399 /* For BID support, change the name to have either a bid_ or dpd_ prefix
5400 depending on the low level floating format used. */
5401 memcpy (dec_opname, DECIMAL_PREFIX, sizeof (DECIMAL_PREFIX) - 1);
5402 strcpy (dec_opname + sizeof (DECIMAL_PREFIX) - 1, opname);
5403 gen_libfunc (optable, dec_opname, suffix, mode);
5407 /* Like gen_libfunc, but verify that fixed-point operation is involved. */
5410 gen_fixed_libfunc (optab optable, const char *opname, char suffix,
5411 enum machine_mode mode)
5413 if (!ALL_FIXED_POINT_MODE_P (mode))
5415 gen_libfunc (optable, opname, suffix, mode);
5418 /* Like gen_libfunc, but verify that signed fixed-point operation is
5422 gen_signed_fixed_libfunc (optab optable, const char *opname, char suffix,
5423 enum machine_mode mode)
5425 if (!SIGNED_FIXED_POINT_MODE_P (mode))
5427 gen_libfunc (optable, opname, suffix, mode);
5430 /* Like gen_libfunc, but verify that unsigned fixed-point operation is
5434 gen_unsigned_fixed_libfunc (optab optable, const char *opname, char suffix,
5435 enum machine_mode mode)
5437 if (!UNSIGNED_FIXED_POINT_MODE_P (mode))
5439 gen_libfunc (optable, opname, suffix, mode);
5442 /* Like gen_libfunc, but verify that FP or INT operation is involved. */
5445 gen_int_fp_libfunc (optab optable, const char *name, char suffix,
5446 enum machine_mode mode)
5448 if (DECIMAL_FLOAT_MODE_P (mode) || GET_MODE_CLASS (mode) == MODE_FLOAT)
5449 gen_fp_libfunc (optable, name, suffix, mode);
5450 if (INTEGRAL_MODE_P (mode))
5451 gen_int_libfunc (optable, name, suffix, mode);
5454 /* Like gen_libfunc, but verify that FP or INT operation is involved
5455 and add 'v' suffix for integer operation. */
5458 gen_intv_fp_libfunc (optab optable, const char *name, char suffix,
5459 enum machine_mode mode)
5461 if (DECIMAL_FLOAT_MODE_P (mode) || GET_MODE_CLASS (mode) == MODE_FLOAT)
5462 gen_fp_libfunc (optable, name, suffix, mode);
5463 if (GET_MODE_CLASS (mode) == MODE_INT)
5465 int len = strlen (name);
5466 char *v_name = XALLOCAVEC (char, len + 2);
5467 strcpy (v_name, name);
5469 v_name[len + 1] = 0;
5470 gen_int_libfunc (optable, v_name, suffix, mode);
5474 /* Like gen_libfunc, but verify that FP or INT or FIXED operation is
5478 gen_int_fp_fixed_libfunc (optab optable, const char *name, char suffix,
5479 enum machine_mode mode)
5481 if (DECIMAL_FLOAT_MODE_P (mode) || GET_MODE_CLASS (mode) == MODE_FLOAT)
5482 gen_fp_libfunc (optable, name, suffix, mode);
5483 if (INTEGRAL_MODE_P (mode))
5484 gen_int_libfunc (optable, name, suffix, mode);
5485 if (ALL_FIXED_POINT_MODE_P (mode))
5486 gen_fixed_libfunc (optable, name, suffix, mode);
5489 /* Like gen_libfunc, but verify that FP or INT or signed FIXED operation is
5493 gen_int_fp_signed_fixed_libfunc (optab optable, const char *name, char suffix,
5494 enum machine_mode mode)
5496 if (DECIMAL_FLOAT_MODE_P (mode) || GET_MODE_CLASS (mode) == MODE_FLOAT)
5497 gen_fp_libfunc (optable, name, suffix, mode);
5498 if (INTEGRAL_MODE_P (mode))
5499 gen_int_libfunc (optable, name, suffix, mode);
5500 if (SIGNED_FIXED_POINT_MODE_P (mode))
5501 gen_signed_fixed_libfunc (optable, name, suffix, mode);
5504 /* Like gen_libfunc, but verify that INT or FIXED operation is
5508 gen_int_fixed_libfunc (optab optable, const char *name, char suffix,
5509 enum machine_mode mode)
5511 if (INTEGRAL_MODE_P (mode))
5512 gen_int_libfunc (optable, name, suffix, mode);
5513 if (ALL_FIXED_POINT_MODE_P (mode))
5514 gen_fixed_libfunc (optable, name, suffix, mode);
5517 /* Like gen_libfunc, but verify that INT or signed FIXED operation is
5521 gen_int_signed_fixed_libfunc (optab optable, const char *name, char suffix,
5522 enum machine_mode mode)
5524 if (INTEGRAL_MODE_P (mode))
5525 gen_int_libfunc (optable, name, suffix, mode);
5526 if (SIGNED_FIXED_POINT_MODE_P (mode))
5527 gen_signed_fixed_libfunc (optable, name, suffix, mode);
5530 /* Like gen_libfunc, but verify that INT or unsigned FIXED operation is
5534 gen_int_unsigned_fixed_libfunc (optab optable, const char *name, char suffix,
5535 enum machine_mode mode)
5537 if (INTEGRAL_MODE_P (mode))
5538 gen_int_libfunc (optable, name, suffix, mode);
5539 if (UNSIGNED_FIXED_POINT_MODE_P (mode))
5540 gen_unsigned_fixed_libfunc (optable, name, suffix, mode);
5543 /* Initialize the libfunc fields of an entire group of entries of an
5544 inter-mode-class conversion optab. The string formation rules are
5545 similar to the ones for init_libfuncs, above, but instead of having
5546 a mode name and an operand count these functions have two mode names
5547 and no operand count. */
5550 gen_interclass_conv_libfunc (convert_optab tab,
5552 enum machine_mode tmode,
5553 enum machine_mode fmode)
5555 size_t opname_len = strlen (opname);
5556 size_t mname_len = 0;
5558 const char *fname, *tname;
5560 int prefix_len = targetm.libfunc_gnu_prefix ? 6 : 2;
5561 char *libfunc_name, *suffix;
5562 char *nondec_name, *dec_name, *nondec_suffix, *dec_suffix;
5565 /* If this is a decimal conversion, add the current BID vs. DPD prefix that
5566 depends on which underlying decimal floating point format is used. */
5567 const size_t dec_len = sizeof (DECIMAL_PREFIX) - 1;
5569 mname_len = strlen (GET_MODE_NAME (tmode)) + strlen (GET_MODE_NAME (fmode));
5571 nondec_name = XALLOCAVEC (char, prefix_len + opname_len + mname_len + 1 + 1);
5572 nondec_name[0] = '_';
5573 nondec_name[1] = '_';
5574 if (targetm.libfunc_gnu_prefix)
5576 nondec_name[2] = 'g';
5577 nondec_name[3] = 'n';
5578 nondec_name[4] = 'u';
5579 nondec_name[5] = '_';
5582 memcpy (&nondec_name[prefix_len], opname, opname_len);
5583 nondec_suffix = nondec_name + opname_len + prefix_len;
5585 dec_name = XALLOCAVEC (char, 2 + dec_len + opname_len + mname_len + 1 + 1);
5588 memcpy (&dec_name[2], DECIMAL_PREFIX, dec_len);
5589 memcpy (&dec_name[2+dec_len], opname, opname_len);
5590 dec_suffix = dec_name + dec_len + opname_len + 2;
5592 fname = GET_MODE_NAME (fmode);
5593 tname = GET_MODE_NAME (tmode);
5595 if (DECIMAL_FLOAT_MODE_P(fmode) || DECIMAL_FLOAT_MODE_P(tmode))
5597 libfunc_name = dec_name;
5598 suffix = dec_suffix;
5602 libfunc_name = nondec_name;
5603 suffix = nondec_suffix;
5607 for (q = fname; *q; p++, q++)
5609 for (q = tname; *q; p++, q++)
5614 set_conv_libfunc (tab, tmode, fmode,
5615 ggc_alloc_string (libfunc_name, p - libfunc_name));
5618 /* Same as gen_interclass_conv_libfunc but verify that we are producing
5619 int->fp conversion. */
5622 gen_int_to_fp_conv_libfunc (convert_optab tab,
5624 enum machine_mode tmode,
5625 enum machine_mode fmode)
5627 if (GET_MODE_CLASS (fmode) != MODE_INT)
5629 if (GET_MODE_CLASS (tmode) != MODE_FLOAT && !DECIMAL_FLOAT_MODE_P (tmode))
5631 gen_interclass_conv_libfunc (tab, opname, tmode, fmode);
5634 /* ufloat_optab is special by using floatun for FP and floatuns decimal fp
5638 gen_ufloat_conv_libfunc (convert_optab tab,
5639 const char *opname ATTRIBUTE_UNUSED,
5640 enum machine_mode tmode,
5641 enum machine_mode fmode)
5643 if (DECIMAL_FLOAT_MODE_P (tmode))
5644 gen_int_to_fp_conv_libfunc (tab, "floatuns", tmode, fmode);
5646 gen_int_to_fp_conv_libfunc (tab, "floatun", tmode, fmode);
5649 /* Same as gen_interclass_conv_libfunc but verify that we are producing
5650 fp->int conversion. */
5653 gen_int_to_fp_nondecimal_conv_libfunc (convert_optab tab,
5655 enum machine_mode tmode,
5656 enum machine_mode fmode)
5658 if (GET_MODE_CLASS (fmode) != MODE_INT)
5660 if (GET_MODE_CLASS (tmode) != MODE_FLOAT)
5662 gen_interclass_conv_libfunc (tab, opname, tmode, fmode);
5665 /* Same as gen_interclass_conv_libfunc but verify that we are producing
5666 fp->int conversion with no decimal floating point involved. */
5669 gen_fp_to_int_conv_libfunc (convert_optab tab,
5671 enum machine_mode tmode,
5672 enum machine_mode fmode)
5674 if (GET_MODE_CLASS (fmode) != MODE_FLOAT && !DECIMAL_FLOAT_MODE_P (fmode))
5676 if (GET_MODE_CLASS (tmode) != MODE_INT)
5678 gen_interclass_conv_libfunc (tab, opname, tmode, fmode);
5681 /* Initialize the libfunc fields of an of an intra-mode-class conversion optab.
5682 The string formation rules are
5683 similar to the ones for init_libfunc, above. */
5686 gen_intraclass_conv_libfunc (convert_optab tab, const char *opname,
5687 enum machine_mode tmode, enum machine_mode fmode)
5689 size_t opname_len = strlen (opname);
5690 size_t mname_len = 0;
5692 const char *fname, *tname;
5694 int prefix_len = targetm.libfunc_gnu_prefix ? 6 : 2;
5695 char *nondec_name, *dec_name, *nondec_suffix, *dec_suffix;
5696 char *libfunc_name, *suffix;
5699 /* If this is a decimal conversion, add the current BID vs. DPD prefix that
5700 depends on which underlying decimal floating point format is used. */
5701 const size_t dec_len = sizeof (DECIMAL_PREFIX) - 1;
5703 mname_len = strlen (GET_MODE_NAME (tmode)) + strlen (GET_MODE_NAME (fmode));
5705 nondec_name = XALLOCAVEC (char, 2 + opname_len + mname_len + 1 + 1);
5706 nondec_name[0] = '_';
5707 nondec_name[1] = '_';
5708 if (targetm.libfunc_gnu_prefix)
5710 nondec_name[2] = 'g';
5711 nondec_name[3] = 'n';
5712 nondec_name[4] = 'u';
5713 nondec_name[5] = '_';
5715 memcpy (&nondec_name[prefix_len], opname, opname_len);
5716 nondec_suffix = nondec_name + opname_len + prefix_len;
5718 dec_name = XALLOCAVEC (char, 2 + dec_len + opname_len + mname_len + 1 + 1);
5721 memcpy (&dec_name[2], DECIMAL_PREFIX, dec_len);
5722 memcpy (&dec_name[2 + dec_len], opname, opname_len);
5723 dec_suffix = dec_name + dec_len + opname_len + 2;
5725 fname = GET_MODE_NAME (fmode);
5726 tname = GET_MODE_NAME (tmode);
5728 if (DECIMAL_FLOAT_MODE_P(fmode) || DECIMAL_FLOAT_MODE_P(tmode))
5730 libfunc_name = dec_name;
5731 suffix = dec_suffix;
5735 libfunc_name = nondec_name;
5736 suffix = nondec_suffix;
5740 for (q = fname; *q; p++, q++)
5742 for (q = tname; *q; p++, q++)
5748 set_conv_libfunc (tab, tmode, fmode,
5749 ggc_alloc_string (libfunc_name, p - libfunc_name));
5752 /* Pick proper libcall for trunc_optab. We need to chose if we do
5753 truncation or extension and interclass or intraclass. */
5756 gen_trunc_conv_libfunc (convert_optab tab,
5758 enum machine_mode tmode,
5759 enum machine_mode fmode)
5761 if (GET_MODE_CLASS (tmode) != MODE_FLOAT && !DECIMAL_FLOAT_MODE_P (tmode))
5763 if (GET_MODE_CLASS (fmode) != MODE_FLOAT && !DECIMAL_FLOAT_MODE_P (fmode))
5768 if ((GET_MODE_CLASS (tmode) == MODE_FLOAT && DECIMAL_FLOAT_MODE_P (fmode))
5769 || (GET_MODE_CLASS (fmode) == MODE_FLOAT && DECIMAL_FLOAT_MODE_P (tmode)))
5770 gen_interclass_conv_libfunc (tab, opname, tmode, fmode);
5772 if (GET_MODE_PRECISION (fmode) <= GET_MODE_PRECISION (tmode))
5775 if ((GET_MODE_CLASS (tmode) == MODE_FLOAT
5776 && GET_MODE_CLASS (fmode) == MODE_FLOAT)
5777 || (DECIMAL_FLOAT_MODE_P (fmode) && DECIMAL_FLOAT_MODE_P (tmode)))
5778 gen_intraclass_conv_libfunc (tab, opname, tmode, fmode);
5781 /* Pick proper libcall for extend_optab. We need to chose if we do
5782 truncation or extension and interclass or intraclass. */
5785 gen_extend_conv_libfunc (convert_optab tab,
5786 const char *opname ATTRIBUTE_UNUSED,
5787 enum machine_mode tmode,
5788 enum machine_mode fmode)
5790 if (GET_MODE_CLASS (tmode) != MODE_FLOAT && !DECIMAL_FLOAT_MODE_P (tmode))
5792 if (GET_MODE_CLASS (fmode) != MODE_FLOAT && !DECIMAL_FLOAT_MODE_P (fmode))
5797 if ((GET_MODE_CLASS (tmode) == MODE_FLOAT && DECIMAL_FLOAT_MODE_P (fmode))
5798 || (GET_MODE_CLASS (fmode) == MODE_FLOAT && DECIMAL_FLOAT_MODE_P (tmode)))
5799 gen_interclass_conv_libfunc (tab, opname, tmode, fmode);
5801 if (GET_MODE_PRECISION (fmode) > GET_MODE_PRECISION (tmode))
5804 if ((GET_MODE_CLASS (tmode) == MODE_FLOAT
5805 && GET_MODE_CLASS (fmode) == MODE_FLOAT)
5806 || (DECIMAL_FLOAT_MODE_P (fmode) && DECIMAL_FLOAT_MODE_P (tmode)))
5807 gen_intraclass_conv_libfunc (tab, opname, tmode, fmode);
5810 /* Pick proper libcall for fract_optab. We need to chose if we do
5811 interclass or intraclass. */
5814 gen_fract_conv_libfunc (convert_optab tab,
5816 enum machine_mode tmode,
5817 enum machine_mode fmode)
5821 if (!(ALL_FIXED_POINT_MODE_P (tmode) || ALL_FIXED_POINT_MODE_P (fmode)))
5824 if (GET_MODE_CLASS (tmode) == GET_MODE_CLASS (fmode))
5825 gen_intraclass_conv_libfunc (tab, opname, tmode, fmode);
5827 gen_interclass_conv_libfunc (tab, opname, tmode, fmode);
5830 /* Pick proper libcall for fractuns_optab. */
5833 gen_fractuns_conv_libfunc (convert_optab tab,
5835 enum machine_mode tmode,
5836 enum machine_mode fmode)
5840 /* One mode must be a fixed-point mode, and the other must be an integer
5842 if (!((ALL_FIXED_POINT_MODE_P (tmode) && GET_MODE_CLASS (fmode) == MODE_INT)
5843 || (ALL_FIXED_POINT_MODE_P (fmode)
5844 && GET_MODE_CLASS (tmode) == MODE_INT)))
5847 gen_interclass_conv_libfunc (tab, opname, tmode, fmode);
5850 /* Pick proper libcall for satfract_optab. We need to chose if we do
5851 interclass or intraclass. */
5854 gen_satfract_conv_libfunc (convert_optab tab,
5856 enum machine_mode tmode,
5857 enum machine_mode fmode)
5861 /* TMODE must be a fixed-point mode. */
5862 if (!ALL_FIXED_POINT_MODE_P (tmode))
5865 if (GET_MODE_CLASS (tmode) == GET_MODE_CLASS (fmode))
5866 gen_intraclass_conv_libfunc (tab, opname, tmode, fmode);
5868 gen_interclass_conv_libfunc (tab, opname, tmode, fmode);
5871 /* Pick proper libcall for satfractuns_optab. */
5874 gen_satfractuns_conv_libfunc (convert_optab tab,
5876 enum machine_mode tmode,
5877 enum machine_mode fmode)
5881 /* TMODE must be a fixed-point mode, and FMODE must be an integer mode. */
5882 if (!(ALL_FIXED_POINT_MODE_P (tmode) && GET_MODE_CLASS (fmode) == MODE_INT))
5885 gen_interclass_conv_libfunc (tab, opname, tmode, fmode);
5888 /* A table of previously-created libfuncs, hashed by name. */
5889 static GTY ((param_is (union tree_node))) htab_t libfunc_decls;
5891 /* Hashtable callbacks for libfunc_decls. */
5894 libfunc_decl_hash (const void *entry)
5896 return IDENTIFIER_HASH_VALUE (DECL_NAME ((const_tree) entry));
5900 libfunc_decl_eq (const void *entry1, const void *entry2)
5902 return DECL_NAME ((const_tree) entry1) == (const_tree) entry2;
5905 /* Build a decl for a libfunc named NAME. */
5908 build_libfunc_function (const char *name)
5910 tree decl = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL,
5911 get_identifier (name),
5912 build_function_type (integer_type_node, NULL_TREE));
5913 /* ??? We don't have any type information except for this is
5914 a function. Pretend this is "int foo()". */
5915 DECL_ARTIFICIAL (decl) = 1;
5916 DECL_EXTERNAL (decl) = 1;
5917 TREE_PUBLIC (decl) = 1;
5918 gcc_assert (DECL_ASSEMBLER_NAME (decl));
5920 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
5921 are the flags assigned by targetm.encode_section_info. */
5922 SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl), 0), NULL);
5928 init_one_libfunc (const char *name)
5934 if (libfunc_decls == NULL)
5935 libfunc_decls = htab_create_ggc (37, libfunc_decl_hash,
5936 libfunc_decl_eq, NULL);
5938 /* See if we have already created a libfunc decl for this function. */
5939 id = get_identifier (name);
5940 hash = IDENTIFIER_HASH_VALUE (id);
5941 slot = htab_find_slot_with_hash (libfunc_decls, id, hash, INSERT);
5942 decl = (tree) *slot;
5945 /* Create a new decl, so that it can be passed to
5946 targetm.encode_section_info. */
5947 decl = build_libfunc_function (name);
5950 return XEXP (DECL_RTL (decl), 0);
5953 /* Adjust the assembler name of libfunc NAME to ASMSPEC. */
5956 set_user_assembler_libfunc (const char *name, const char *asmspec)
5962 id = get_identifier (name);
5963 hash = IDENTIFIER_HASH_VALUE (id);
5964 slot = htab_find_slot_with_hash (libfunc_decls, id, hash, NO_INSERT);
5966 decl = (tree) *slot;
5967 set_user_assembler_name (decl, asmspec);
5968 return XEXP (DECL_RTL (decl), 0);
5971 /* Call this to reset the function entry for one optab (OPTABLE) in mode
5972 MODE to NAME, which should be either 0 or a string constant. */
5974 set_optab_libfunc (optab optable, enum machine_mode mode, const char *name)
5977 struct libfunc_entry e;
5978 struct libfunc_entry **slot;
5979 e.optab = (size_t) (optable - &optab_table[0]);
5984 val = init_one_libfunc (name);
5987 slot = (struct libfunc_entry **) htab_find_slot (libfunc_hash, &e, INSERT);
5989 *slot = ggc_alloc_libfunc_entry ();
5990 (*slot)->optab = (size_t) (optable - &optab_table[0]);
5991 (*slot)->mode1 = mode;
5992 (*slot)->mode2 = VOIDmode;
5993 (*slot)->libfunc = val;
5996 /* Call this to reset the function entry for one conversion optab
5997 (OPTABLE) from mode FMODE to mode TMODE to NAME, which should be
5998 either 0 or a string constant. */
6000 set_conv_libfunc (convert_optab optable, enum machine_mode tmode,
6001 enum machine_mode fmode, const char *name)
6004 struct libfunc_entry e;
6005 struct libfunc_entry **slot;
6006 e.optab = (size_t) (optable - &convert_optab_table[0]);
6011 val = init_one_libfunc (name);
6014 slot = (struct libfunc_entry **) htab_find_slot (libfunc_hash, &e, INSERT);
6016 *slot = ggc_alloc_libfunc_entry ();
6017 (*slot)->optab = (size_t) (optable - &convert_optab_table[0]);
6018 (*slot)->mode1 = tmode;
6019 (*slot)->mode2 = fmode;
6020 (*slot)->libfunc = val;
6023 /* Call this to initialize the contents of the optabs
6024 appropriately for the current target machine. */
6031 htab_empty (libfunc_hash);
6032 /* We statically initialize the insn_codes with the equivalent of
6033 CODE_FOR_nothing. Repeat the process if reinitialising. */
6037 libfunc_hash = htab_create_ggc (10, hash_libfunc, eq_libfunc, NULL);
6039 init_optab (add_optab, PLUS);
6040 init_optabv (addv_optab, PLUS);
6041 init_optab (sub_optab, MINUS);
6042 init_optabv (subv_optab, MINUS);
6043 init_optab (ssadd_optab, SS_PLUS);
6044 init_optab (usadd_optab, US_PLUS);
6045 init_optab (sssub_optab, SS_MINUS);
6046 init_optab (ussub_optab, US_MINUS);
6047 init_optab (smul_optab, MULT);
6048 init_optab (ssmul_optab, SS_MULT);
6049 init_optab (usmul_optab, US_MULT);
6050 init_optabv (smulv_optab, MULT);
6051 init_optab (smul_highpart_optab, UNKNOWN);
6052 init_optab (umul_highpart_optab, UNKNOWN);
6053 init_optab (smul_widen_optab, UNKNOWN);
6054 init_optab (umul_widen_optab, UNKNOWN);
6055 init_optab (usmul_widen_optab, UNKNOWN);
6056 init_optab (smadd_widen_optab, UNKNOWN);
6057 init_optab (umadd_widen_optab, UNKNOWN);
6058 init_optab (ssmadd_widen_optab, UNKNOWN);
6059 init_optab (usmadd_widen_optab, UNKNOWN);
6060 init_optab (smsub_widen_optab, UNKNOWN);
6061 init_optab (umsub_widen_optab, UNKNOWN);
6062 init_optab (ssmsub_widen_optab, UNKNOWN);
6063 init_optab (usmsub_widen_optab, UNKNOWN);
6064 init_optab (sdiv_optab, DIV);
6065 init_optab (ssdiv_optab, SS_DIV);
6066 init_optab (usdiv_optab, US_DIV);
6067 init_optabv (sdivv_optab, DIV);
6068 init_optab (sdivmod_optab, UNKNOWN);
6069 init_optab (udiv_optab, UDIV);
6070 init_optab (udivmod_optab, UNKNOWN);
6071 init_optab (smod_optab, MOD);
6072 init_optab (umod_optab, UMOD);
6073 init_optab (fmod_optab, UNKNOWN);
6074 init_optab (remainder_optab, UNKNOWN);
6075 init_optab (ftrunc_optab, UNKNOWN);
6076 init_optab (and_optab, AND);
6077 init_optab (ior_optab, IOR);
6078 init_optab (xor_optab, XOR);
6079 init_optab (ashl_optab, ASHIFT);
6080 init_optab (ssashl_optab, SS_ASHIFT);
6081 init_optab (usashl_optab, US_ASHIFT);
6082 init_optab (ashr_optab, ASHIFTRT);
6083 init_optab (lshr_optab, LSHIFTRT);
6084 init_optabv (vashl_optab, ASHIFT);
6085 init_optabv (vashr_optab, ASHIFTRT);
6086 init_optabv (vlshr_optab, LSHIFTRT);
6087 init_optab (rotl_optab, ROTATE);
6088 init_optab (rotr_optab, ROTATERT);
6089 init_optab (smin_optab, SMIN);
6090 init_optab (smax_optab, SMAX);
6091 init_optab (umin_optab, UMIN);
6092 init_optab (umax_optab, UMAX);
6093 init_optab (pow_optab, UNKNOWN);
6094 init_optab (atan2_optab, UNKNOWN);
6095 init_optab (fma_optab, FMA);
6096 init_optab (fms_optab, UNKNOWN);
6097 init_optab (fnma_optab, UNKNOWN);
6098 init_optab (fnms_optab, UNKNOWN);
6100 /* These three have codes assigned exclusively for the sake of
6102 init_optab (mov_optab, SET);
6103 init_optab (movstrict_optab, STRICT_LOW_PART);
6104 init_optab (cbranch_optab, COMPARE);
6106 init_optab (cmov_optab, UNKNOWN);
6107 init_optab (cstore_optab, UNKNOWN);
6108 init_optab (ctrap_optab, UNKNOWN);
6110 init_optab (storent_optab, UNKNOWN);
6112 init_optab (cmp_optab, UNKNOWN);
6113 init_optab (ucmp_optab, UNKNOWN);
6115 init_optab (eq_optab, EQ);
6116 init_optab (ne_optab, NE);
6117 init_optab (gt_optab, GT);
6118 init_optab (ge_optab, GE);
6119 init_optab (lt_optab, LT);
6120 init_optab (le_optab, LE);
6121 init_optab (unord_optab, UNORDERED);
6123 init_optab (neg_optab, NEG);
6124 init_optab (ssneg_optab, SS_NEG);
6125 init_optab (usneg_optab, US_NEG);
6126 init_optabv (negv_optab, NEG);
6127 init_optab (abs_optab, ABS);
6128 init_optabv (absv_optab, ABS);
6129 init_optab (addcc_optab, UNKNOWN);
6130 init_optab (one_cmpl_optab, NOT);
6131 init_optab (bswap_optab, BSWAP);
6132 init_optab (ffs_optab, FFS);
6133 init_optab (clz_optab, CLZ);
6134 init_optab (ctz_optab, CTZ);
6135 init_optab (clrsb_optab, CLRSB);
6136 init_optab (popcount_optab, POPCOUNT);
6137 init_optab (parity_optab, PARITY);
6138 init_optab (sqrt_optab, SQRT);
6139 init_optab (floor_optab, UNKNOWN);
6140 init_optab (ceil_optab, UNKNOWN);
6141 init_optab (round_optab, UNKNOWN);
6142 init_optab (btrunc_optab, UNKNOWN);
6143 init_optab (nearbyint_optab, UNKNOWN);
6144 init_optab (rint_optab, UNKNOWN);
6145 init_optab (sincos_optab, UNKNOWN);
6146 init_optab (sin_optab, UNKNOWN);
6147 init_optab (asin_optab, UNKNOWN);
6148 init_optab (cos_optab, UNKNOWN);
6149 init_optab (acos_optab, UNKNOWN);
6150 init_optab (exp_optab, UNKNOWN);
6151 init_optab (exp10_optab, UNKNOWN);
6152 init_optab (exp2_optab, UNKNOWN);
6153 init_optab (expm1_optab, UNKNOWN);
6154 init_optab (ldexp_optab, UNKNOWN);
6155 init_optab (scalb_optab, UNKNOWN);
6156 init_optab (significand_optab, UNKNOWN);
6157 init_optab (logb_optab, UNKNOWN);
6158 init_optab (ilogb_optab, UNKNOWN);
6159 init_optab (log_optab, UNKNOWN);
6160 init_optab (log10_optab, UNKNOWN);
6161 init_optab (log2_optab, UNKNOWN);
6162 init_optab (log1p_optab, UNKNOWN);
6163 init_optab (tan_optab, UNKNOWN);
6164 init_optab (atan_optab, UNKNOWN);
6165 init_optab (copysign_optab, UNKNOWN);
6166 init_optab (signbit_optab, UNKNOWN);
6168 init_optab (isinf_optab, UNKNOWN);
6170 init_optab (strlen_optab, UNKNOWN);
6171 init_optab (push_optab, UNKNOWN);
6173 init_optab (reduc_smax_optab, UNKNOWN);
6174 init_optab (reduc_umax_optab, UNKNOWN);
6175 init_optab (reduc_smin_optab, UNKNOWN);
6176 init_optab (reduc_umin_optab, UNKNOWN);
6177 init_optab (reduc_splus_optab, UNKNOWN);
6178 init_optab (reduc_uplus_optab, UNKNOWN);
6180 init_optab (ssum_widen_optab, UNKNOWN);
6181 init_optab (usum_widen_optab, UNKNOWN);
6182 init_optab (sdot_prod_optab, UNKNOWN);
6183 init_optab (udot_prod_optab, UNKNOWN);
6185 init_optab (vec_extract_optab, UNKNOWN);
6186 init_optab (vec_extract_even_optab, UNKNOWN);
6187 init_optab (vec_extract_odd_optab, UNKNOWN);
6188 init_optab (vec_interleave_high_optab, UNKNOWN);
6189 init_optab (vec_interleave_low_optab, UNKNOWN);
6190 init_optab (vec_set_optab, UNKNOWN);
6191 init_optab (vec_init_optab, UNKNOWN);
6192 init_optab (vec_shl_optab, UNKNOWN);
6193 init_optab (vec_shr_optab, UNKNOWN);
6194 init_optab (vec_realign_load_optab, UNKNOWN);
6195 init_optab (movmisalign_optab, UNKNOWN);
6196 init_optab (vec_widen_umult_hi_optab, UNKNOWN);
6197 init_optab (vec_widen_umult_lo_optab, UNKNOWN);
6198 init_optab (vec_widen_smult_hi_optab, UNKNOWN);
6199 init_optab (vec_widen_smult_lo_optab, UNKNOWN);
6200 init_optab (vec_unpacks_hi_optab, UNKNOWN);
6201 init_optab (vec_unpacks_lo_optab, UNKNOWN);
6202 init_optab (vec_unpacku_hi_optab, UNKNOWN);
6203 init_optab (vec_unpacku_lo_optab, UNKNOWN);
6204 init_optab (vec_unpacks_float_hi_optab, UNKNOWN);
6205 init_optab (vec_unpacks_float_lo_optab, UNKNOWN);
6206 init_optab (vec_unpacku_float_hi_optab, UNKNOWN);
6207 init_optab (vec_unpacku_float_lo_optab, UNKNOWN);
6208 init_optab (vec_pack_trunc_optab, UNKNOWN);
6209 init_optab (vec_pack_usat_optab, UNKNOWN);
6210 init_optab (vec_pack_ssat_optab, UNKNOWN);
6211 init_optab (vec_pack_ufix_trunc_optab, UNKNOWN);
6212 init_optab (vec_pack_sfix_trunc_optab, UNKNOWN);
6214 init_optab (powi_optab, UNKNOWN);
6217 init_convert_optab (sext_optab, SIGN_EXTEND);
6218 init_convert_optab (zext_optab, ZERO_EXTEND);
6219 init_convert_optab (trunc_optab, TRUNCATE);
6220 init_convert_optab (sfix_optab, FIX);
6221 init_convert_optab (ufix_optab, UNSIGNED_FIX);
6222 init_convert_optab (sfixtrunc_optab, UNKNOWN);
6223 init_convert_optab (ufixtrunc_optab, UNKNOWN);
6224 init_convert_optab (sfloat_optab, FLOAT);
6225 init_convert_optab (ufloat_optab, UNSIGNED_FLOAT);
6226 init_convert_optab (lrint_optab, UNKNOWN);
6227 init_convert_optab (lround_optab, UNKNOWN);
6228 init_convert_optab (lfloor_optab, UNKNOWN);
6229 init_convert_optab (lceil_optab, UNKNOWN);
6231 init_convert_optab (fract_optab, FRACT_CONVERT);
6232 init_convert_optab (fractuns_optab, UNSIGNED_FRACT_CONVERT);
6233 init_convert_optab (satfract_optab, SAT_FRACT);
6234 init_convert_optab (satfractuns_optab, UNSIGNED_SAT_FRACT);
6236 /* Fill in the optabs with the insns we support. */
6239 /* Initialize the optabs with the names of the library functions. */
6240 add_optab->libcall_basename = "add";
6241 add_optab->libcall_suffix = '3';
6242 add_optab->libcall_gen = gen_int_fp_fixed_libfunc;
6243 addv_optab->libcall_basename = "add";
6244 addv_optab->libcall_suffix = '3';
6245 addv_optab->libcall_gen = gen_intv_fp_libfunc;
6246 ssadd_optab->libcall_basename = "ssadd";
6247 ssadd_optab->libcall_suffix = '3';
6248 ssadd_optab->libcall_gen = gen_signed_fixed_libfunc;
6249 usadd_optab->libcall_basename = "usadd";
6250 usadd_optab->libcall_suffix = '3';
6251 usadd_optab->libcall_gen = gen_unsigned_fixed_libfunc;
6252 sub_optab->libcall_basename = "sub";
6253 sub_optab->libcall_suffix = '3';
6254 sub_optab->libcall_gen = gen_int_fp_fixed_libfunc;
6255 subv_optab->libcall_basename = "sub";
6256 subv_optab->libcall_suffix = '3';
6257 subv_optab->libcall_gen = gen_intv_fp_libfunc;
6258 sssub_optab->libcall_basename = "sssub";
6259 sssub_optab->libcall_suffix = '3';
6260 sssub_optab->libcall_gen = gen_signed_fixed_libfunc;
6261 ussub_optab->libcall_basename = "ussub";
6262 ussub_optab->libcall_suffix = '3';
6263 ussub_optab->libcall_gen = gen_unsigned_fixed_libfunc;
6264 smul_optab->libcall_basename = "mul";
6265 smul_optab->libcall_suffix = '3';
6266 smul_optab->libcall_gen = gen_int_fp_fixed_libfunc;
6267 smulv_optab->libcall_basename = "mul";
6268 smulv_optab->libcall_suffix = '3';
6269 smulv_optab->libcall_gen = gen_intv_fp_libfunc;
6270 ssmul_optab->libcall_basename = "ssmul";
6271 ssmul_optab->libcall_suffix = '3';
6272 ssmul_optab->libcall_gen = gen_signed_fixed_libfunc;
6273 usmul_optab->libcall_basename = "usmul";
6274 usmul_optab->libcall_suffix = '3';
6275 usmul_optab->libcall_gen = gen_unsigned_fixed_libfunc;
6276 sdiv_optab->libcall_basename = "div";
6277 sdiv_optab->libcall_suffix = '3';
6278 sdiv_optab->libcall_gen = gen_int_fp_signed_fixed_libfunc;
6279 sdivv_optab->libcall_basename = "divv";
6280 sdivv_optab->libcall_suffix = '3';
6281 sdivv_optab->libcall_gen = gen_int_libfunc;
6282 ssdiv_optab->libcall_basename = "ssdiv";
6283 ssdiv_optab->libcall_suffix = '3';
6284 ssdiv_optab->libcall_gen = gen_signed_fixed_libfunc;
6285 udiv_optab->libcall_basename = "udiv";
6286 udiv_optab->libcall_suffix = '3';
6287 udiv_optab->libcall_gen = gen_int_unsigned_fixed_libfunc;
6288 usdiv_optab->libcall_basename = "usdiv";
6289 usdiv_optab->libcall_suffix = '3';
6290 usdiv_optab->libcall_gen = gen_unsigned_fixed_libfunc;
6291 sdivmod_optab->libcall_basename = "divmod";
6292 sdivmod_optab->libcall_suffix = '4';
6293 sdivmod_optab->libcall_gen = gen_int_libfunc;
6294 udivmod_optab->libcall_basename = "udivmod";
6295 udivmod_optab->libcall_suffix = '4';
6296 udivmod_optab->libcall_gen = gen_int_libfunc;
6297 smod_optab->libcall_basename = "mod";
6298 smod_optab->libcall_suffix = '3';
6299 smod_optab->libcall_gen = gen_int_libfunc;
6300 umod_optab->libcall_basename = "umod";
6301 umod_optab->libcall_suffix = '3';
6302 umod_optab->libcall_gen = gen_int_libfunc;
6303 ftrunc_optab->libcall_basename = "ftrunc";
6304 ftrunc_optab->libcall_suffix = '2';
6305 ftrunc_optab->libcall_gen = gen_fp_libfunc;
6306 and_optab->libcall_basename = "and";
6307 and_optab->libcall_suffix = '3';
6308 and_optab->libcall_gen = gen_int_libfunc;
6309 ior_optab->libcall_basename = "ior";
6310 ior_optab->libcall_suffix = '3';
6311 ior_optab->libcall_gen = gen_int_libfunc;
6312 xor_optab->libcall_basename = "xor";
6313 xor_optab->libcall_suffix = '3';
6314 xor_optab->libcall_gen = gen_int_libfunc;
6315 ashl_optab->libcall_basename = "ashl";
6316 ashl_optab->libcall_suffix = '3';
6317 ashl_optab->libcall_gen = gen_int_fixed_libfunc;
6318 ssashl_optab->libcall_basename = "ssashl";
6319 ssashl_optab->libcall_suffix = '3';
6320 ssashl_optab->libcall_gen = gen_signed_fixed_libfunc;
6321 usashl_optab->libcall_basename = "usashl";
6322 usashl_optab->libcall_suffix = '3';
6323 usashl_optab->libcall_gen = gen_unsigned_fixed_libfunc;
6324 ashr_optab->libcall_basename = "ashr";
6325 ashr_optab->libcall_suffix = '3';
6326 ashr_optab->libcall_gen = gen_int_signed_fixed_libfunc;
6327 lshr_optab->libcall_basename = "lshr";
6328 lshr_optab->libcall_suffix = '3';
6329 lshr_optab->libcall_gen = gen_int_unsigned_fixed_libfunc;
6330 smin_optab->libcall_basename = "min";
6331 smin_optab->libcall_suffix = '3';
6332 smin_optab->libcall_gen = gen_int_fp_libfunc;
6333 smax_optab->libcall_basename = "max";
6334 smax_optab->libcall_suffix = '3';
6335 smax_optab->libcall_gen = gen_int_fp_libfunc;
6336 umin_optab->libcall_basename = "umin";
6337 umin_optab->libcall_suffix = '3';
6338 umin_optab->libcall_gen = gen_int_libfunc;
6339 umax_optab->libcall_basename = "umax";
6340 umax_optab->libcall_suffix = '3';
6341 umax_optab->libcall_gen = gen_int_libfunc;
6342 neg_optab->libcall_basename = "neg";
6343 neg_optab->libcall_suffix = '2';
6344 neg_optab->libcall_gen = gen_int_fp_fixed_libfunc;
6345 ssneg_optab->libcall_basename = "ssneg";
6346 ssneg_optab->libcall_suffix = '2';
6347 ssneg_optab->libcall_gen = gen_signed_fixed_libfunc;
6348 usneg_optab->libcall_basename = "usneg";
6349 usneg_optab->libcall_suffix = '2';
6350 usneg_optab->libcall_gen = gen_unsigned_fixed_libfunc;
6351 negv_optab->libcall_basename = "neg";
6352 negv_optab->libcall_suffix = '2';
6353 negv_optab->libcall_gen = gen_intv_fp_libfunc;
6354 one_cmpl_optab->libcall_basename = "one_cmpl";
6355 one_cmpl_optab->libcall_suffix = '2';
6356 one_cmpl_optab->libcall_gen = gen_int_libfunc;
6357 ffs_optab->libcall_basename = "ffs";
6358 ffs_optab->libcall_suffix = '2';
6359 ffs_optab->libcall_gen = gen_int_libfunc;
6360 clz_optab->libcall_basename = "clz";
6361 clz_optab->libcall_suffix = '2';
6362 clz_optab->libcall_gen = gen_int_libfunc;
6363 ctz_optab->libcall_basename = "ctz";
6364 ctz_optab->libcall_suffix = '2';
6365 ctz_optab->libcall_gen = gen_int_libfunc;
6366 clrsb_optab->libcall_basename = "clrsb";
6367 clrsb_optab->libcall_suffix = '2';
6368 clrsb_optab->libcall_gen = gen_int_libfunc;
6369 popcount_optab->libcall_basename = "popcount";
6370 popcount_optab->libcall_suffix = '2';
6371 popcount_optab->libcall_gen = gen_int_libfunc;
6372 parity_optab->libcall_basename = "parity";
6373 parity_optab->libcall_suffix = '2';
6374 parity_optab->libcall_gen = gen_int_libfunc;
6376 /* Comparison libcalls for integers MUST come in pairs,
6378 cmp_optab->libcall_basename = "cmp";
6379 cmp_optab->libcall_suffix = '2';
6380 cmp_optab->libcall_gen = gen_int_fp_fixed_libfunc;
6381 ucmp_optab->libcall_basename = "ucmp";
6382 ucmp_optab->libcall_suffix = '2';
6383 ucmp_optab->libcall_gen = gen_int_libfunc;
6385 /* EQ etc are floating point only. */
6386 eq_optab->libcall_basename = "eq";
6387 eq_optab->libcall_suffix = '2';
6388 eq_optab->libcall_gen = gen_fp_libfunc;
6389 ne_optab->libcall_basename = "ne";
6390 ne_optab->libcall_suffix = '2';
6391 ne_optab->libcall_gen = gen_fp_libfunc;
6392 gt_optab->libcall_basename = "gt";
6393 gt_optab->libcall_suffix = '2';
6394 gt_optab->libcall_gen = gen_fp_libfunc;
6395 ge_optab->libcall_basename = "ge";
6396 ge_optab->libcall_suffix = '2';
6397 ge_optab->libcall_gen = gen_fp_libfunc;
6398 lt_optab->libcall_basename = "lt";
6399 lt_optab->libcall_suffix = '2';
6400 lt_optab->libcall_gen = gen_fp_libfunc;
6401 le_optab->libcall_basename = "le";
6402 le_optab->libcall_suffix = '2';
6403 le_optab->libcall_gen = gen_fp_libfunc;
6404 unord_optab->libcall_basename = "unord";
6405 unord_optab->libcall_suffix = '2';
6406 unord_optab->libcall_gen = gen_fp_libfunc;
6408 powi_optab->libcall_basename = "powi";
6409 powi_optab->libcall_suffix = '2';
6410 powi_optab->libcall_gen = gen_fp_libfunc;
6413 sfloat_optab->libcall_basename = "float";
6414 sfloat_optab->libcall_gen = gen_int_to_fp_conv_libfunc;
6415 ufloat_optab->libcall_gen = gen_ufloat_conv_libfunc;
6416 sfix_optab->libcall_basename = "fix";
6417 sfix_optab->libcall_gen = gen_fp_to_int_conv_libfunc;
6418 ufix_optab->libcall_basename = "fixuns";
6419 ufix_optab->libcall_gen = gen_fp_to_int_conv_libfunc;
6420 lrint_optab->libcall_basename = "lrint";
6421 lrint_optab->libcall_gen = gen_int_to_fp_nondecimal_conv_libfunc;
6422 lround_optab->libcall_basename = "lround";
6423 lround_optab->libcall_gen = gen_int_to_fp_nondecimal_conv_libfunc;
6424 lfloor_optab->libcall_basename = "lfloor";
6425 lfloor_optab->libcall_gen = gen_int_to_fp_nondecimal_conv_libfunc;
6426 lceil_optab->libcall_basename = "lceil";
6427 lceil_optab->libcall_gen = gen_int_to_fp_nondecimal_conv_libfunc;
6429 /* trunc_optab is also used for FLOAT_EXTEND. */
6430 sext_optab->libcall_basename = "extend";
6431 sext_optab->libcall_gen = gen_extend_conv_libfunc;
6432 trunc_optab->libcall_basename = "trunc";
6433 trunc_optab->libcall_gen = gen_trunc_conv_libfunc;
6435 /* Conversions for fixed-point modes and other modes. */
6436 fract_optab->libcall_basename = "fract";
6437 fract_optab->libcall_gen = gen_fract_conv_libfunc;
6438 satfract_optab->libcall_basename = "satfract";
6439 satfract_optab->libcall_gen = gen_satfract_conv_libfunc;
6440 fractuns_optab->libcall_basename = "fractuns";
6441 fractuns_optab->libcall_gen = gen_fractuns_conv_libfunc;
6442 satfractuns_optab->libcall_basename = "satfractuns";
6443 satfractuns_optab->libcall_gen = gen_satfractuns_conv_libfunc;
6445 /* The ffs function operates on `int'. Fall back on it if we do not
6446 have a libgcc2 function for that width. */
6447 if (INT_TYPE_SIZE < BITS_PER_WORD)
6448 set_optab_libfunc (ffs_optab, mode_for_size (INT_TYPE_SIZE, MODE_INT, 0),
6451 /* Explicitly initialize the bswap libfuncs since we need them to be
6452 valid for things other than word_mode. */
6453 if (targetm.libfunc_gnu_prefix)
6455 set_optab_libfunc (bswap_optab, SImode, "__gnu_bswapsi2");
6456 set_optab_libfunc (bswap_optab, DImode, "__gnu_bswapdi2");
6460 set_optab_libfunc (bswap_optab, SImode, "__bswapsi2");
6461 set_optab_libfunc (bswap_optab, DImode, "__bswapdi2");
6464 /* Use cabs for double complex abs, since systems generally have cabs.
6465 Don't define any libcall for float complex, so that cabs will be used. */
6466 if (complex_double_type_node)
6467 set_optab_libfunc (abs_optab, TYPE_MODE (complex_double_type_node), "cabs");
6469 abort_libfunc = init_one_libfunc ("abort");
6470 memcpy_libfunc = init_one_libfunc ("memcpy");
6471 memmove_libfunc = init_one_libfunc ("memmove");
6472 memcmp_libfunc = init_one_libfunc ("memcmp");
6473 memset_libfunc = init_one_libfunc ("memset");
6474 setbits_libfunc = init_one_libfunc ("__setbits");
6476 #ifndef DONT_USE_BUILTIN_SETJMP
6477 setjmp_libfunc = init_one_libfunc ("__builtin_setjmp");
6478 longjmp_libfunc = init_one_libfunc ("__builtin_longjmp");
6480 setjmp_libfunc = init_one_libfunc ("setjmp");
6481 longjmp_libfunc = init_one_libfunc ("longjmp");
6483 unwind_sjlj_register_libfunc = init_one_libfunc ("_Unwind_SjLj_Register");
6484 unwind_sjlj_unregister_libfunc
6485 = init_one_libfunc ("_Unwind_SjLj_Unregister");
6487 /* For function entry/exit instrumentation. */
6488 profile_function_entry_libfunc
6489 = init_one_libfunc ("__cyg_profile_func_enter");
6490 profile_function_exit_libfunc
6491 = init_one_libfunc ("__cyg_profile_func_exit");
6493 gcov_flush_libfunc = init_one_libfunc ("__gcov_flush");
6495 /* Allow the target to add more libcalls or rename some, etc. */
6496 targetm.init_libfuncs ();
6499 /* Print information about the current contents of the optabs on
6503 debug_optab_libfuncs (void)
6509 /* Dump the arithmetic optabs. */
6510 for (i = 0; i != (int) OTI_MAX; i++)
6511 for (j = 0; j < NUM_MACHINE_MODES; ++j)
6516 o = &optab_table[i];
6517 l = optab_libfunc (o, (enum machine_mode) j);
6520 gcc_assert (GET_CODE (l) == SYMBOL_REF);
6521 fprintf (stderr, "%s\t%s:\t%s\n",
6522 GET_RTX_NAME (o->code),
6528 /* Dump the conversion optabs. */
6529 for (i = 0; i < (int) COI_MAX; ++i)
6530 for (j = 0; j < NUM_MACHINE_MODES; ++j)
6531 for (k = 0; k < NUM_MACHINE_MODES; ++k)
6536 o = &convert_optab_table[i];
6537 l = convert_optab_libfunc (o, (enum machine_mode) j,
6538 (enum machine_mode) k);
6541 gcc_assert (GET_CODE (l) == SYMBOL_REF);
6542 fprintf (stderr, "%s\t%s\t%s:\t%s\n",
6543 GET_RTX_NAME (o->code),
6552 /* Generate insns to trap with code TCODE if OP1 and OP2 satisfy condition
6553 CODE. Return 0 on failure. */
6556 gen_cond_trap (enum rtx_code code, rtx op1, rtx op2, rtx tcode)
6558 enum machine_mode mode = GET_MODE (op1);
6559 enum insn_code icode;
6563 if (mode == VOIDmode)
6566 icode = optab_handler (ctrap_optab, mode);
6567 if (icode == CODE_FOR_nothing)
6570 /* Some targets only accept a zero trap code. */
6571 if (!insn_operand_matches (icode, 3, tcode))
6574 do_pending_stack_adjust ();
6576 prepare_cmp_insn (op1, op2, code, NULL_RTX, false, OPTAB_DIRECT,
6581 insn = GEN_FCN (icode) (trap_rtx, XEXP (trap_rtx, 0), XEXP (trap_rtx, 1),
6584 /* If that failed, then give up. */
6592 insn = get_insns ();
6597 /* Return rtx code for TCODE. Use UNSIGNEDP to select signed
6598 or unsigned operation code. */
6600 static enum rtx_code
6601 get_rtx_code (enum tree_code tcode, bool unsignedp)
6613 code = unsignedp ? LTU : LT;
6616 code = unsignedp ? LEU : LE;
6619 code = unsignedp ? GTU : GT;
6622 code = unsignedp ? GEU : GE;
6625 case UNORDERED_EXPR:
6656 /* Return comparison rtx for COND. Use UNSIGNEDP to select signed or
6657 unsigned operators. Do not generate compare instruction. */
6660 vector_compare_rtx (tree cond, bool unsignedp, enum insn_code icode)
6662 struct expand_operand ops[2];
6663 enum rtx_code rcode;
6665 rtx rtx_op0, rtx_op1;
6667 /* This is unlikely. While generating VEC_COND_EXPR, auto vectorizer
6668 ensures that condition is a relational operation. */
6669 gcc_assert (COMPARISON_CLASS_P (cond));
6671 rcode = get_rtx_code (TREE_CODE (cond), unsignedp);
6672 t_op0 = TREE_OPERAND (cond, 0);
6673 t_op1 = TREE_OPERAND (cond, 1);
6675 /* Expand operands. */
6676 rtx_op0 = expand_expr (t_op0, NULL_RTX, TYPE_MODE (TREE_TYPE (t_op0)),
6678 rtx_op1 = expand_expr (t_op1, NULL_RTX, TYPE_MODE (TREE_TYPE (t_op1)),
6681 create_input_operand (&ops[0], rtx_op0, GET_MODE (rtx_op0));
6682 create_input_operand (&ops[1], rtx_op1, GET_MODE (rtx_op1));
6683 if (!maybe_legitimize_operands (icode, 4, 2, ops))
6685 return gen_rtx_fmt_ee (rcode, VOIDmode, ops[0].value, ops[1].value);
6688 /* Return true if VEC_PERM_EXPR can be expanded using SIMD extensions
6689 of the CPU. SEL may be NULL, which stands for an unknown constant. */
6692 can_vec_perm_expr_p (tree type, tree sel)
6694 enum machine_mode mode, qimode;
6695 mode = TYPE_MODE (type);
6697 /* If the target doesn't implement a vector mode for the vector type,
6698 then no operations are supported. */
6699 if (!VECTOR_MODE_P (mode))
6702 if (sel == NULL || TREE_CODE (sel) == VECTOR_CST)
6704 if (direct_optab_handler (vec_perm_const_optab, mode) != CODE_FOR_nothing
6705 && (sel == NULL || targetm.vectorize.builtin_vec_perm_ok (type, sel)))
6709 if (direct_optab_handler (vec_perm_optab, mode) != CODE_FOR_nothing)
6712 /* We allow fallback to a QI vector mode, and adjust the mask. */
6713 qimode = mode_for_vector (QImode, GET_MODE_SIZE (mode));
6714 if (!VECTOR_MODE_P (qimode))
6717 /* ??? For completeness, we ought to check the QImode version of
6718 vec_perm_const_optab. But all users of this implicit lowering
6719 feature implement the variable vec_perm_optab. */
6720 if (direct_optab_handler (vec_perm_optab, qimode) == CODE_FOR_nothing)
6723 /* In order to support the lowering of non-constant permutations,
6724 we need to support shifts and adds. */
6725 if (sel != NULL && TREE_CODE (sel) != VECTOR_CST)
6727 if (GET_MODE_UNIT_SIZE (mode) > 2
6728 && optab_handler (ashl_optab, mode) == CODE_FOR_nothing
6729 && optab_handler (vashl_optab, mode) == CODE_FOR_nothing)
6731 if (optab_handler (add_optab, qimode) == CODE_FOR_nothing)
6738 /* A subroutine of expand_vec_perm_expr for expanding one vec_perm insn. */
6741 expand_vec_perm_expr_1 (enum insn_code icode, rtx target,
6742 rtx v0, rtx v1, rtx sel)
6744 enum machine_mode tmode = GET_MODE (target);
6745 enum machine_mode smode = GET_MODE (sel);
6746 struct expand_operand ops[4];
6748 create_output_operand (&ops[0], target, tmode);
6749 create_input_operand (&ops[3], sel, smode);
6751 /* Make an effort to preserve v0 == v1. The target expander is able to
6752 rely on this to determine if we're permuting a single input operand. */
6753 if (rtx_equal_p (v0, v1))
6755 if (!insn_operand_matches (icode, 1, v0))
6756 v0 = force_reg (tmode, v0);
6757 gcc_checking_assert (insn_operand_matches (icode, 1, v0));
6758 gcc_checking_assert (insn_operand_matches (icode, 2, v0));
6760 create_fixed_operand (&ops[1], v0);
6761 create_fixed_operand (&ops[2], v0);
6765 create_input_operand (&ops[1], v0, tmode);
6766 create_input_operand (&ops[2], v1, tmode);
6769 if (maybe_expand_insn (icode, 4, ops))
6770 return ops[0].value;
6774 /* Generate instructions for VEC_PERM_EXPR given its type and three
6777 expand_vec_perm_expr (tree type, tree v0, tree v1, tree sel, rtx target)
6779 enum insn_code icode;
6780 enum machine_mode mode = TYPE_MODE (type);
6781 enum machine_mode qimode;
6782 rtx v0_rtx, v1_rtx, sel_rtx, *vec, vt, tmp;
6783 unsigned int i, w, e, u;
6786 target = gen_reg_rtx (mode);
6787 v0_rtx = expand_normal (v0);
6788 if (operand_equal_p (v0, v1, 0))
6791 v1_rtx = expand_normal (v1);
6792 sel_rtx = expand_normal (sel);
6794 /* If the input is a constant, expand it specially. */
6795 if (CONSTANT_P (sel_rtx))
6797 icode = direct_optab_handler (vec_perm_const_optab, mode);
6798 if (icode != CODE_FOR_nothing
6799 && targetm.vectorize.builtin_vec_perm_ok (TREE_TYPE (v0), sel)
6800 && (tmp = expand_vec_perm_expr_1 (icode, target, v0_rtx,
6801 v1_rtx, sel_rtx)) != NULL)
6805 /* Otherwise fall back to a fully variable permuation. */
6806 icode = direct_optab_handler (vec_perm_optab, mode);
6807 if (icode != CODE_FOR_nothing
6808 && (tmp = expand_vec_perm_expr_1 (icode, target, v0_rtx,
6809 v1_rtx, sel_rtx)) != NULL)
6812 /* As a special case to aid several targets, lower the element-based
6813 permutation to a byte-based permutation and try again. */
6814 qimode = mode_for_vector (QImode, GET_MODE_SIZE (mode));
6815 if (!VECTOR_MODE_P (qimode))
6818 /* ??? For completeness, we ought to check the QImode version of
6819 vec_perm_const_optab. But all users of this implicit lowering
6820 feature implement the variable vec_perm_optab. */
6821 icode = direct_optab_handler (vec_perm_optab, qimode);
6822 if (icode == CODE_FOR_nothing)
6825 w = GET_MODE_SIZE (mode);
6826 e = GET_MODE_NUNITS (mode);
6827 u = GET_MODE_UNIT_SIZE (mode);
6828 vec = XALLOCAVEC (rtx, w);
6830 if (CONSTANT_P (sel_rtx))
6833 for (i = 0; i < e; ++i)
6835 unsigned int this_e = INTVAL (XVECEXP (sel_rtx, 0, i));
6836 this_e &= 2 * e - 1;
6839 for (j = 0; j < u; ++j)
6840 vec[i * e + j] = GEN_INT (this_e + j);
6842 sel_rtx = gen_rtx_CONST_VECTOR (qimode, gen_rtvec_v (w, vec));
6846 /* Multiply each element by its byte size. */
6848 sel_rtx = expand_simple_binop (mode, PLUS, sel_rtx, sel_rtx,
6849 sel_rtx, 0, OPTAB_DIRECT);
6851 sel_rtx = expand_simple_binop (mode, ASHIFT, sel_rtx,
6852 GEN_INT (exact_log2 (u)),
6853 sel_rtx, 0, OPTAB_DIRECT);
6854 gcc_assert (sel_rtx);
6856 /* Broadcast the low byte each element into each of its bytes. */
6857 for (i = 0; i < w; ++i)
6859 int this_e = i / u * u;
6860 if (BYTES_BIG_ENDIAN)
6862 vec[i] = GEN_INT (this_e);
6864 vt = gen_rtx_CONST_VECTOR (qimode, gen_rtvec_v (w, vec));
6865 sel_rtx = gen_lowpart (qimode, sel_rtx);
6866 sel_rtx = expand_vec_perm_expr_1 (icode, gen_reg_rtx (qimode),
6867 sel_rtx, sel_rtx, vt);
6868 gcc_assert (sel_rtx != NULL);
6870 /* Add the byte offset to each byte element. */
6871 /* Note that the definition of the indicies here is memory ordering,
6872 so there should be no difference between big and little endian. */
6873 for (i = 0; i < w; ++i)
6874 vec[i] = GEN_INT (i % u);
6875 vt = gen_rtx_CONST_VECTOR (qimode, gen_rtvec_v (w, vec));
6876 sel_rtx = expand_simple_binop (qimode, PLUS, sel_rtx, vt,
6877 NULL_RTX, 0, OPTAB_DIRECT);
6878 gcc_assert (sel_rtx);
6881 tmp = expand_vec_perm_expr_1 (icode, gen_lowpart (qimode, target),
6882 gen_lowpart (qimode, v0_rtx),
6883 gen_lowpart (qimode, v1_rtx), sel_rtx);
6884 gcc_assert (tmp != NULL);
6886 return gen_lowpart (mode, tmp);
6890 /* Return insn code for a conditional operator with a comparison in
6891 mode CMODE, unsigned if UNS is true, resulting in a value of mode VMODE. */
6893 static inline enum insn_code
6894 get_vcond_icode (enum machine_mode vmode, enum machine_mode cmode, bool uns)
6896 enum insn_code icode = CODE_FOR_nothing;
6898 icode = convert_optab_handler (vcondu_optab, vmode, cmode);
6900 icode = convert_optab_handler (vcond_optab, vmode, cmode);
6904 /* Return TRUE iff, appropriate vector insns are available
6905 for vector cond expr with vector type VALUE_TYPE and a comparison
6906 with operand vector types in CMP_OP_TYPE. */
6909 expand_vec_cond_expr_p (tree value_type, tree cmp_op_type)
6911 enum machine_mode value_mode = TYPE_MODE (value_type);
6912 enum machine_mode cmp_op_mode = TYPE_MODE (cmp_op_type);
6913 if (GET_MODE_SIZE (value_mode) != GET_MODE_SIZE (cmp_op_mode)
6914 || GET_MODE_NUNITS (value_mode) != GET_MODE_NUNITS (cmp_op_mode)
6915 || get_vcond_icode (TYPE_MODE (value_type), TYPE_MODE (cmp_op_type),
6916 TYPE_UNSIGNED (cmp_op_type)) == CODE_FOR_nothing)
6921 /* Generate insns for a VEC_COND_EXPR, given its TYPE and its
6925 expand_vec_cond_expr (tree vec_cond_type, tree op0, tree op1, tree op2,
6928 struct expand_operand ops[6];
6929 enum insn_code icode;
6930 rtx comparison, rtx_op1, rtx_op2;
6931 enum machine_mode mode = TYPE_MODE (vec_cond_type);
6932 enum machine_mode cmp_op_mode;
6935 gcc_assert (COMPARISON_CLASS_P (op0));
6937 unsignedp = TYPE_UNSIGNED (TREE_TYPE (TREE_OPERAND (op0, 0)));
6938 cmp_op_mode = TYPE_MODE (TREE_TYPE (TREE_OPERAND (op0, 0)));
6940 gcc_assert (GET_MODE_SIZE (mode) == GET_MODE_SIZE (cmp_op_mode)
6941 && GET_MODE_NUNITS (mode) == GET_MODE_NUNITS (cmp_op_mode));
6943 icode = get_vcond_icode (mode, cmp_op_mode, unsignedp);
6944 if (icode == CODE_FOR_nothing)
6947 comparison = vector_compare_rtx (op0, unsignedp, icode);
6948 rtx_op1 = expand_normal (op1);
6949 rtx_op2 = expand_normal (op2);
6951 create_output_operand (&ops[0], target, mode);
6952 create_input_operand (&ops[1], rtx_op1, mode);
6953 create_input_operand (&ops[2], rtx_op2, mode);
6954 create_fixed_operand (&ops[3], comparison);
6955 create_fixed_operand (&ops[4], XEXP (comparison, 0));
6956 create_fixed_operand (&ops[5], XEXP (comparison, 1));
6957 expand_insn (icode, 6, ops);
6958 return ops[0].value;
6962 /* This is an internal subroutine of the other compare_and_swap expanders.
6963 MEM, OLD_VAL and NEW_VAL are as you'd expect for a compare-and-swap
6964 operation. TARGET is an optional place to store the value result of
6965 the operation. ICODE is the particular instruction to expand. Return
6966 the result of the operation. */
6969 expand_val_compare_and_swap_1 (rtx mem, rtx old_val, rtx new_val,
6970 rtx target, enum insn_code icode)
6972 struct expand_operand ops[4];
6973 enum machine_mode mode = GET_MODE (mem);
6975 create_output_operand (&ops[0], target, mode);
6976 create_fixed_operand (&ops[1], mem);
6977 /* OLD_VAL and NEW_VAL may have been promoted to a wider mode.
6978 Shrink them if so. */
6979 create_convert_operand_to (&ops[2], old_val, mode, true);
6980 create_convert_operand_to (&ops[3], new_val, mode, true);
6981 if (maybe_expand_insn (icode, 4, ops))
6982 return ops[0].value;
6986 /* Expand a compare-and-swap operation and return its value. */
6989 expand_val_compare_and_swap (rtx mem, rtx old_val, rtx new_val, rtx target)
6991 enum machine_mode mode = GET_MODE (mem);
6992 enum insn_code icode
6993 = direct_optab_handler (sync_compare_and_swap_optab, mode);
6995 if (icode == CODE_FOR_nothing)
6998 return expand_val_compare_and_swap_1 (mem, old_val, new_val, target, icode);
7001 /* Helper function to find the MODE_CC set in a sync_compare_and_swap
7005 find_cc_set (rtx x, const_rtx pat, void *data)
7007 if (REG_P (x) && GET_MODE_CLASS (GET_MODE (x)) == MODE_CC
7008 && GET_CODE (pat) == SET)
7010 rtx *p_cc_reg = (rtx *) data;
7011 gcc_assert (!*p_cc_reg);
7016 /* Expand a compare-and-swap operation and store true into the result if
7017 the operation was successful and false otherwise. Return the result.
7018 Unlike other routines, TARGET is not optional. */
7021 expand_bool_compare_and_swap (rtx mem, rtx old_val, rtx new_val, rtx target)
7023 enum machine_mode mode = GET_MODE (mem);
7024 enum insn_code icode;
7025 rtx subtarget, seq, cc_reg;
7027 /* If the target supports a compare-and-swap pattern that simultaneously
7028 sets some flag for success, then use it. Otherwise use the regular
7029 compare-and-swap and follow that immediately with a compare insn. */
7030 icode = direct_optab_handler (sync_compare_and_swap_optab, mode);
7031 if (icode == CODE_FOR_nothing)
7034 do_pending_stack_adjust ();
7038 subtarget = expand_val_compare_and_swap_1 (mem, old_val, new_val,
7041 if (subtarget == NULL_RTX)
7047 if (have_insn_for (COMPARE, CCmode))
7048 note_stores (PATTERN (get_last_insn ()), find_cc_set, &cc_reg);
7052 /* We might be comparing against an old value. Try again. :-( */
7053 if (!cc_reg && MEM_P (old_val))
7056 old_val = force_reg (mode, old_val);
7063 return emit_store_flag_force (target, EQ, cc_reg, const0_rtx, VOIDmode, 0, 1);
7065 return emit_store_flag_force (target, EQ, subtarget, old_val, VOIDmode, 1, 1);
7068 /* This is a helper function for the other atomic operations. This function
7069 emits a loop that contains SEQ that iterates until a compare-and-swap
7070 operation at the end succeeds. MEM is the memory to be modified. SEQ is
7071 a set of instructions that takes a value from OLD_REG as an input and
7072 produces a value in NEW_REG as an output. Before SEQ, OLD_REG will be
7073 set to the current contents of MEM. After SEQ, a compare-and-swap will
7074 attempt to update MEM with NEW_REG. The function returns true when the
7075 loop was generated successfully. */
7078 expand_compare_and_swap_loop (rtx mem, rtx old_reg, rtx new_reg, rtx seq)
7080 enum machine_mode mode = GET_MODE (mem);
7081 enum insn_code icode;
7082 rtx label, cmp_reg, subtarget, cc_reg;
7084 /* The loop we want to generate looks like
7090 cmp_reg = compare-and-swap(mem, old_reg, new_reg)
7091 if (cmp_reg != old_reg)
7094 Note that we only do the plain load from memory once. Subsequent
7095 iterations use the value loaded by the compare-and-swap pattern. */
7097 label = gen_label_rtx ();
7098 cmp_reg = gen_reg_rtx (mode);
7100 emit_move_insn (cmp_reg, mem);
7102 emit_move_insn (old_reg, cmp_reg);
7106 /* If the target supports a compare-and-swap pattern that simultaneously
7107 sets some flag for success, then use it. Otherwise use the regular
7108 compare-and-swap and follow that immediately with a compare insn. */
7109 icode = direct_optab_handler (sync_compare_and_swap_optab, mode);
7110 if (icode == CODE_FOR_nothing)
7113 subtarget = expand_val_compare_and_swap_1 (mem, old_reg, new_reg,
7115 if (subtarget == NULL_RTX)
7119 if (have_insn_for (COMPARE, CCmode))
7120 note_stores (PATTERN (get_last_insn ()), find_cc_set, &cc_reg);
7124 old_reg = const0_rtx;
7128 if (subtarget != cmp_reg)
7129 emit_move_insn (cmp_reg, subtarget);
7132 /* ??? Mark this jump predicted not taken? */
7133 emit_cmp_and_jump_insns (cmp_reg, old_reg, NE, const0_rtx, GET_MODE (cmp_reg), 1,
7138 /* This function generates the atomic operation MEM CODE= VAL. In this
7139 case, we do not care about any resulting value. Returns NULL if we
7140 cannot generate the operation. */
7143 expand_sync_operation (rtx mem, rtx val, enum rtx_code code)
7145 enum machine_mode mode = GET_MODE (mem);
7146 enum insn_code icode;
7149 /* Look to see if the target supports the operation directly. */
7153 icode = direct_optab_handler (sync_add_optab, mode);
7156 icode = direct_optab_handler (sync_ior_optab, mode);
7159 icode = direct_optab_handler (sync_xor_optab, mode);
7162 icode = direct_optab_handler (sync_and_optab, mode);
7165 icode = direct_optab_handler (sync_nand_optab, mode);
7169 icode = direct_optab_handler (sync_sub_optab, mode);
7170 if (icode == CODE_FOR_nothing || CONST_INT_P (val))
7172 icode = direct_optab_handler (sync_add_optab, mode);
7173 if (icode != CODE_FOR_nothing)
7175 val = expand_simple_unop (mode, NEG, val, NULL_RTX, 1);
7185 /* Generate the direct operation, if present. */
7186 if (icode != CODE_FOR_nothing)
7188 struct expand_operand ops[2];
7190 create_fixed_operand (&ops[0], mem);
7191 /* VAL may have been promoted to a wider mode. Shrink it if so. */
7192 create_convert_operand_to (&ops[1], val, mode, true);
7193 if (maybe_expand_insn (icode, 2, ops))
7197 /* Failing that, generate a compare-and-swap loop in which we perform the
7198 operation with normal arithmetic instructions. */
7199 if (direct_optab_handler (sync_compare_and_swap_optab, mode)
7200 != CODE_FOR_nothing)
7202 rtx t0 = gen_reg_rtx (mode), t1;
7209 t1 = expand_simple_binop (mode, AND, t1, val, NULL_RTX,
7210 true, OPTAB_LIB_WIDEN);
7211 t1 = expand_simple_unop (mode, code, t1, NULL_RTX, true);
7214 t1 = expand_simple_binop (mode, code, t1, val, NULL_RTX,
7215 true, OPTAB_LIB_WIDEN);
7216 insn = get_insns ();
7219 if (t1 != NULL && expand_compare_and_swap_loop (mem, t0, t1, insn))
7226 /* This function generates the atomic operation MEM CODE= VAL. In this
7227 case, we do care about the resulting value: if AFTER is true then
7228 return the value MEM holds after the operation, if AFTER is false
7229 then return the value MEM holds before the operation. TARGET is an
7230 optional place for the result value to be stored. */
7233 expand_sync_fetch_operation (rtx mem, rtx val, enum rtx_code code,
7234 bool after, rtx target)
7236 enum machine_mode mode = GET_MODE (mem);
7237 enum insn_code old_code, new_code, icode;
7241 /* Look to see if the target supports the operation directly. */
7245 old_code = direct_optab_handler (sync_old_add_optab, mode);
7246 new_code = direct_optab_handler (sync_new_add_optab, mode);
7249 old_code = direct_optab_handler (sync_old_ior_optab, mode);
7250 new_code = direct_optab_handler (sync_new_ior_optab, mode);
7253 old_code = direct_optab_handler (sync_old_xor_optab, mode);
7254 new_code = direct_optab_handler (sync_new_xor_optab, mode);
7257 old_code = direct_optab_handler (sync_old_and_optab, mode);
7258 new_code = direct_optab_handler (sync_new_and_optab, mode);
7261 old_code = direct_optab_handler (sync_old_nand_optab, mode);
7262 new_code = direct_optab_handler (sync_new_nand_optab, mode);
7266 old_code = direct_optab_handler (sync_old_sub_optab, mode);
7267 new_code = direct_optab_handler (sync_new_sub_optab, mode);
7268 if ((old_code == CODE_FOR_nothing && new_code == CODE_FOR_nothing)
7269 || CONST_INT_P (val))
7271 old_code = direct_optab_handler (sync_old_add_optab, mode);
7272 new_code = direct_optab_handler (sync_new_add_optab, mode);
7273 if (old_code != CODE_FOR_nothing || new_code != CODE_FOR_nothing)
7275 val = expand_simple_unop (mode, NEG, val, NULL_RTX, 1);
7285 /* If the target does supports the proper new/old operation, great. But
7286 if we only support the opposite old/new operation, check to see if we
7287 can compensate. In the case in which the old value is supported, then
7288 we can always perform the operation again with normal arithmetic. In
7289 the case in which the new value is supported, then we can only handle
7290 this in the case the operation is reversible. */
7295 if (icode == CODE_FOR_nothing)
7298 if (icode != CODE_FOR_nothing)
7305 if (icode == CODE_FOR_nothing
7306 && (code == PLUS || code == MINUS || code == XOR))
7309 if (icode != CODE_FOR_nothing)
7314 /* If we found something supported, great. */
7315 if (icode != CODE_FOR_nothing)
7317 struct expand_operand ops[3];
7319 create_output_operand (&ops[0], target, mode);
7320 create_fixed_operand (&ops[1], mem);
7321 /* VAL may have been promoted to a wider mode. Shrink it if so. */
7322 create_convert_operand_to (&ops[2], val, mode, true);
7323 if (maybe_expand_insn (icode, 3, ops))
7325 target = ops[0].value;
7327 /* If we need to compensate for using an operation with the
7328 wrong return value, do so now. */
7335 else if (code == MINUS)
7341 target = expand_simple_binop (mode, AND, target, val,
7344 target = expand_simple_unop (mode, code, target,
7348 target = expand_simple_binop (mode, code, target, val,
7357 /* Failing that, generate a compare-and-swap loop in which we perform the
7358 operation with normal arithmetic instructions. */
7359 if (direct_optab_handler (sync_compare_and_swap_optab, mode)
7360 != CODE_FOR_nothing)
7362 rtx t0 = gen_reg_rtx (mode), t1;
7364 if (!target || !register_operand (target, mode))
7365 target = gen_reg_rtx (mode);
7370 emit_move_insn (target, t0);
7374 t1 = expand_simple_binop (mode, AND, t1, val, NULL_RTX,
7375 true, OPTAB_LIB_WIDEN);
7376 t1 = expand_simple_unop (mode, code, t1, NULL_RTX, true);
7379 t1 = expand_simple_binop (mode, code, t1, val, NULL_RTX,
7380 true, OPTAB_LIB_WIDEN);
7382 emit_move_insn (target, t1);
7384 insn = get_insns ();
7387 if (t1 != NULL && expand_compare_and_swap_loop (mem, t0, t1, insn))
7394 /* This function expands a test-and-set operation. Ideally we atomically
7395 store VAL in MEM and return the previous value in MEM. Some targets
7396 may not support this operation and only support VAL with the constant 1;
7397 in this case while the return value will be 0/1, but the exact value
7398 stored in MEM is target defined. TARGET is an option place to stick
7399 the return value. */
7402 expand_sync_lock_test_and_set (rtx mem, rtx val, rtx target)
7404 enum machine_mode mode = GET_MODE (mem);
7405 enum insn_code icode;
7407 /* If the target supports the test-and-set directly, great. */
7408 icode = direct_optab_handler (sync_lock_test_and_set_optab, mode);
7409 if (icode != CODE_FOR_nothing)
7411 struct expand_operand ops[3];
7413 create_output_operand (&ops[0], target, mode);
7414 create_fixed_operand (&ops[1], mem);
7415 /* VAL may have been promoted to a wider mode. Shrink it if so. */
7416 create_convert_operand_to (&ops[2], val, mode, true);
7417 if (maybe_expand_insn (icode, 3, ops))
7418 return ops[0].value;
7421 /* Otherwise, use a compare-and-swap loop for the exchange. */
7422 if (direct_optab_handler (sync_compare_and_swap_optab, mode)
7423 != CODE_FOR_nothing)
7425 if (!target || !register_operand (target, mode))
7426 target = gen_reg_rtx (mode);
7427 if (GET_MODE (val) != VOIDmode && GET_MODE (val) != mode)
7428 val = convert_modes (mode, GET_MODE (val), val, 1);
7429 if (expand_compare_and_swap_loop (mem, target, val, NULL_RTX))
7436 /* Return true if OPERAND is suitable for operand number OPNO of
7437 instruction ICODE. */
7440 insn_operand_matches (enum insn_code icode, unsigned int opno, rtx operand)
7442 return (!insn_data[(int) icode].operand[opno].predicate
7443 || (insn_data[(int) icode].operand[opno].predicate
7444 (operand, insn_data[(int) icode].operand[opno].mode)));
7447 /* TARGET is a target of a multiword operation that we are going to
7448 implement as a series of word-mode operations. Return true if
7449 TARGET is suitable for this purpose. */
7452 valid_multiword_target_p (rtx target)
7454 enum machine_mode mode;
7457 mode = GET_MODE (target);
7458 for (i = 0; i < GET_MODE_SIZE (mode); i += UNITS_PER_WORD)
7459 if (!validate_subreg (word_mode, mode, target, i))
7464 /* Like maybe_legitimize_operand, but do not change the code of the
7465 current rtx value. */
7468 maybe_legitimize_operand_same_code (enum insn_code icode, unsigned int opno,
7469 struct expand_operand *op)
7471 /* See if the operand matches in its current form. */
7472 if (insn_operand_matches (icode, opno, op->value))
7475 /* If the operand is a memory whose address has no side effects,
7476 try forcing the address into a register. The check for side
7477 effects is important because force_reg cannot handle things
7478 like auto-modified addresses. */
7479 if (insn_data[(int) icode].operand[opno].allows_mem
7480 && MEM_P (op->value)
7481 && !side_effects_p (XEXP (op->value, 0)))
7483 rtx addr, mem, last;
7485 last = get_last_insn ();
7486 addr = force_reg (Pmode, XEXP (op->value, 0));
7487 mem = replace_equiv_address (op->value, addr);
7488 if (insn_operand_matches (icode, opno, mem))
7493 delete_insns_since (last);
7499 /* Try to make OP match operand OPNO of instruction ICODE. Return true
7500 on success, storing the new operand value back in OP. */
7503 maybe_legitimize_operand (enum insn_code icode, unsigned int opno,
7504 struct expand_operand *op)
7506 enum machine_mode mode, imode;
7507 bool old_volatile_ok, result;
7513 old_volatile_ok = volatile_ok;
7515 result = maybe_legitimize_operand_same_code (icode, opno, op);
7516 volatile_ok = old_volatile_ok;
7520 gcc_assert (mode != VOIDmode);
7522 && op->value != const0_rtx
7523 && GET_MODE (op->value) == mode
7524 && maybe_legitimize_operand_same_code (icode, opno, op))
7527 op->value = gen_reg_rtx (mode);
7532 gcc_assert (mode != VOIDmode);
7533 gcc_assert (GET_MODE (op->value) == VOIDmode
7534 || GET_MODE (op->value) == mode);
7535 if (maybe_legitimize_operand_same_code (icode, opno, op))
7538 op->value = copy_to_mode_reg (mode, op->value);
7541 case EXPAND_CONVERT_TO:
7542 gcc_assert (mode != VOIDmode);
7543 op->value = convert_to_mode (mode, op->value, op->unsigned_p);
7546 case EXPAND_CONVERT_FROM:
7547 if (GET_MODE (op->value) != VOIDmode)
7548 mode = GET_MODE (op->value);
7550 /* The caller must tell us what mode this value has. */
7551 gcc_assert (mode != VOIDmode);
7553 imode = insn_data[(int) icode].operand[opno].mode;
7554 if (imode != VOIDmode && imode != mode)
7556 op->value = convert_modes (imode, mode, op->value, op->unsigned_p);
7561 case EXPAND_ADDRESS:
7562 gcc_assert (mode != VOIDmode);
7563 op->value = convert_memory_address (mode, op->value);
7566 case EXPAND_INTEGER:
7567 mode = insn_data[(int) icode].operand[opno].mode;
7568 if (mode != VOIDmode && const_int_operand (op->value, mode))
7572 return insn_operand_matches (icode, opno, op->value);
7575 /* Make OP describe an input operand that should have the same value
7576 as VALUE, after any mode conversion that the target might request.
7577 TYPE is the type of VALUE. */
7580 create_convert_operand_from_type (struct expand_operand *op,
7581 rtx value, tree type)
7583 create_convert_operand_from (op, value, TYPE_MODE (type),
7584 TYPE_UNSIGNED (type));
7587 /* Try to make operands [OPS, OPS + NOPS) match operands [OPNO, OPNO + NOPS)
7588 of instruction ICODE. Return true on success, leaving the new operand
7589 values in the OPS themselves. Emit no code on failure. */
7592 maybe_legitimize_operands (enum insn_code icode, unsigned int opno,
7593 unsigned int nops, struct expand_operand *ops)
7598 last = get_last_insn ();
7599 for (i = 0; i < nops; i++)
7600 if (!maybe_legitimize_operand (icode, opno + i, &ops[i]))
7602 delete_insns_since (last);
7608 /* Try to generate instruction ICODE, using operands [OPS, OPS + NOPS)
7609 as its operands. Return the instruction pattern on success,
7610 and emit any necessary set-up code. Return null and emit no
7614 maybe_gen_insn (enum insn_code icode, unsigned int nops,
7615 struct expand_operand *ops)
7617 gcc_assert (nops == (unsigned int) insn_data[(int) icode].n_generator_args);
7618 if (!maybe_legitimize_operands (icode, 0, nops, ops))
7624 return GEN_FCN (icode) (ops[0].value);
7626 return GEN_FCN (icode) (ops[0].value, ops[1].value);
7628 return GEN_FCN (icode) (ops[0].value, ops[1].value, ops[2].value);
7630 return GEN_FCN (icode) (ops[0].value, ops[1].value, ops[2].value,
7633 return GEN_FCN (icode) (ops[0].value, ops[1].value, ops[2].value,
7634 ops[3].value, ops[4].value);
7636 return GEN_FCN (icode) (ops[0].value, ops[1].value, ops[2].value,
7637 ops[3].value, ops[4].value, ops[5].value);
7642 /* Try to emit instruction ICODE, using operands [OPS, OPS + NOPS)
7643 as its operands. Return true on success and emit no code on failure. */
7646 maybe_expand_insn (enum insn_code icode, unsigned int nops,
7647 struct expand_operand *ops)
7649 rtx pat = maybe_gen_insn (icode, nops, ops);
7658 /* Like maybe_expand_insn, but for jumps. */
7661 maybe_expand_jump_insn (enum insn_code icode, unsigned int nops,
7662 struct expand_operand *ops)
7664 rtx pat = maybe_gen_insn (icode, nops, ops);
7667 emit_jump_insn (pat);
7673 /* Emit instruction ICODE, using operands [OPS, OPS + NOPS)
7677 expand_insn (enum insn_code icode, unsigned int nops,
7678 struct expand_operand *ops)
7680 if (!maybe_expand_insn (icode, nops, ops))
7684 /* Like expand_insn, but for jumps. */
7687 expand_jump_insn (enum insn_code icode, unsigned int nops,
7688 struct expand_operand *ops)
7690 if (!maybe_expand_jump_insn (icode, nops, ops))
7694 #include "gt-optabs.h"