1 /* Expand the basic unary and binary arithmetic operations, for GNU compiler.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
25 #include "coretypes.h"
29 /* Include insn-config.h before expr.h so that HAVE_conditional_move
30 is properly defined. */
31 #include "insn-config.h"
45 #include "basic-block.h"
48 /* Each optab contains info on how this target machine
49 can perform a particular operation
50 for all sizes and kinds of operands.
52 The operation to be performed is often specified
53 by passing one of these optabs as an argument.
55 See expr.h for documentation of these optabs. */
57 optab optab_table[OTI_MAX];
59 rtx libfunc_table[LTI_MAX];
61 /* Tables of patterns for converting one mode to another. */
62 convert_optab convert_optab_table[COI_MAX];
64 /* Contains the optab used for each rtx code. */
65 optab code_to_optab[NUM_RTX_CODE + 1];
67 /* Indexed by the rtx-code for a conditional (eg. EQ, LT,...)
68 gives the gen_function to make a branch to test that condition. */
70 rtxfun bcc_gen_fctn[NUM_RTX_CODE];
72 /* Indexed by the rtx-code for a conditional (eg. EQ, LT,...)
73 gives the insn code to make a store-condition insn
74 to test that condition. */
76 enum insn_code setcc_gen_code[NUM_RTX_CODE];
78 #ifdef HAVE_conditional_move
79 /* Indexed by the machine mode, gives the insn code to make a conditional
80 move insn. This is not indexed by the rtx-code like bcc_gen_fctn and
81 setcc_gen_code to cut down on the number of named patterns. Consider a day
82 when a lot more rtx codes are conditional (eg: for the ARM). */
84 enum insn_code movcc_gen_code[NUM_MACHINE_MODES];
87 /* Indexed by the machine mode, gives the insn code for vector conditional
90 enum insn_code vcond_gen_code[NUM_MACHINE_MODES];
91 enum insn_code vcondu_gen_code[NUM_MACHINE_MODES];
93 /* The insn generating function can not take an rtx_code argument.
94 TRAP_RTX is used as an rtx argument. Its code is replaced with
95 the code to be used in the trap insn and all other fields are ignored. */
96 static GTY(()) rtx trap_rtx;
98 static void prepare_float_lib_cmp (rtx *, rtx *, enum rtx_code *,
99 enum machine_mode *, int *);
100 static rtx expand_unop_direct (enum machine_mode, optab, rtx, rtx, int);
102 /* Current libcall id. It doesn't matter what these are, as long
103 as they are unique to each libcall that is emitted. */
104 static HOST_WIDE_INT libcall_id = 0;
106 /* Debug facility for use in GDB. */
107 void debug_optab_libfuncs (void);
109 #ifndef HAVE_conditional_trap
110 #define HAVE_conditional_trap 0
111 #define gen_conditional_trap(a,b) (gcc_unreachable (), NULL_RTX)
114 /* Prefixes for the current version of decimal floating point (BID vs. DPD) */
115 #if ENABLE_DECIMAL_BID_FORMAT
116 #define DECIMAL_PREFIX "bid_"
118 #define DECIMAL_PREFIX "dpd_"
122 /* Info about libfunc. We use same hashtable for normal optabs and conversion
123 optab. In the first case mode2 is unused. */
124 struct libfunc_entry GTY(())
127 enum machine_mode mode1, mode2;
131 /* Hash table used to convert declarations into nodes. */
132 static GTY((param_is (struct libfunc_entry))) htab_t libfunc_hash;
134 /* Used for attribute_hash. */
137 hash_libfunc (const void *p)
139 const struct libfunc_entry *const e = (const struct libfunc_entry *) p;
141 return (((int) e->mode1 + (int) e->mode2 * NUM_MACHINE_MODES)
145 /* Used for optab_hash. */
148 eq_libfunc (const void *p, const void *q)
150 const struct libfunc_entry *const e1 = (const struct libfunc_entry *) p;
151 const struct libfunc_entry *const e2 = (const struct libfunc_entry *) q;
153 return (e1->optab == e2->optab
154 && e1->mode1 == e2->mode1
155 && e1->mode2 == e2->mode2);
158 /* Return libfunc corresponding operation defined by OPTAB converting
159 from MODE2 to MODE1. Trigger lazy initialization if needed, return NULL
160 if no libfunc is available. */
162 convert_optab_libfunc (convert_optab optab, enum machine_mode mode1,
163 enum machine_mode mode2)
165 struct libfunc_entry e;
166 struct libfunc_entry **slot;
168 e.optab = (size_t) (convert_optab_table[0] - optab);
171 slot = (struct libfunc_entry **) htab_find_slot (libfunc_hash, &e, NO_INSERT);
174 if (optab->libcall_gen)
176 optab->libcall_gen (optab, optab->libcall_basename, mode1, mode2);
177 slot = (struct libfunc_entry **) htab_find_slot (libfunc_hash, &e, NO_INSERT);
179 return (*slot)->libfunc;
185 return (*slot)->libfunc;
188 /* Return libfunc corresponding operation defined by OPTAB in MODE.
189 Trigger lazy initialization if needed, return NULL if no libfunc is
192 optab_libfunc (optab optab, enum machine_mode mode)
194 struct libfunc_entry e;
195 struct libfunc_entry **slot;
197 e.optab = (size_t) (optab_table[0] - optab);
200 slot = (struct libfunc_entry **) htab_find_slot (libfunc_hash, &e, NO_INSERT);
203 if (optab->libcall_gen)
205 optab->libcall_gen (optab, optab->libcall_basename,
206 optab->libcall_suffix, mode);
207 slot = (struct libfunc_entry **) htab_find_slot (libfunc_hash,
210 return (*slot)->libfunc;
216 return (*slot)->libfunc;
220 /* Add a REG_EQUAL note to the last insn in INSNS. TARGET is being set to
221 the result of operation CODE applied to OP0 (and OP1 if it is a binary
224 If the last insn does not set TARGET, don't do anything, but return 1.
226 If a previous insn sets TARGET and TARGET is one of OP0 or OP1,
227 don't add the REG_EQUAL note but return 0. Our caller can then try
228 again, ensuring that TARGET is not one of the operands. */
231 add_equal_note (rtx insns, rtx target, enum rtx_code code, rtx op0, rtx op1)
233 rtx last_insn, insn, set;
236 gcc_assert (insns && INSN_P (insns) && NEXT_INSN (insns));
238 if (GET_RTX_CLASS (code) != RTX_COMM_ARITH
239 && GET_RTX_CLASS (code) != RTX_BIN_ARITH
240 && GET_RTX_CLASS (code) != RTX_COMM_COMPARE
241 && GET_RTX_CLASS (code) != RTX_COMPARE
242 && GET_RTX_CLASS (code) != RTX_UNARY)
245 if (GET_CODE (target) == ZERO_EXTRACT)
248 for (last_insn = insns;
249 NEXT_INSN (last_insn) != NULL_RTX;
250 last_insn = NEXT_INSN (last_insn))
253 set = single_set (last_insn);
257 if (! rtx_equal_p (SET_DEST (set), target)
258 /* For a STRICT_LOW_PART, the REG_NOTE applies to what is inside it. */
259 && (GET_CODE (SET_DEST (set)) != STRICT_LOW_PART
260 || ! rtx_equal_p (XEXP (SET_DEST (set), 0), target)))
263 /* If TARGET is in OP0 or OP1, check if anything in SEQ sets TARGET
264 besides the last insn. */
265 if (reg_overlap_mentioned_p (target, op0)
266 || (op1 && reg_overlap_mentioned_p (target, op1)))
268 insn = PREV_INSN (last_insn);
269 while (insn != NULL_RTX)
271 if (reg_set_p (target, insn))
274 insn = PREV_INSN (insn);
278 if (GET_RTX_CLASS (code) == RTX_UNARY)
279 note = gen_rtx_fmt_e (code, GET_MODE (target), copy_rtx (op0));
281 note = gen_rtx_fmt_ee (code, GET_MODE (target), copy_rtx (op0), copy_rtx (op1));
283 set_unique_reg_note (last_insn, REG_EQUAL, note);
288 /* Widen OP to MODE and return the rtx for the widened operand. UNSIGNEDP
289 says whether OP is signed or unsigned. NO_EXTEND is nonzero if we need
290 not actually do a sign-extend or zero-extend, but can leave the
291 higher-order bits of the result rtx undefined, for example, in the case
292 of logical operations, but not right shifts. */
295 widen_operand (rtx op, enum machine_mode mode, enum machine_mode oldmode,
296 int unsignedp, int no_extend)
300 /* If we don't have to extend and this is a constant, return it. */
301 if (no_extend && GET_MODE (op) == VOIDmode)
304 /* If we must extend do so. If OP is a SUBREG for a promoted object, also
305 extend since it will be more efficient to do so unless the signedness of
306 a promoted object differs from our extension. */
308 || (GET_CODE (op) == SUBREG && SUBREG_PROMOTED_VAR_P (op)
309 && SUBREG_PROMOTED_UNSIGNED_P (op) == unsignedp))
310 return convert_modes (mode, oldmode, op, unsignedp);
312 /* If MODE is no wider than a single word, we return a paradoxical
314 if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD)
315 return gen_rtx_SUBREG (mode, force_reg (GET_MODE (op), op), 0);
317 /* Otherwise, get an object of MODE, clobber it, and set the low-order
320 result = gen_reg_rtx (mode);
321 emit_insn (gen_rtx_CLOBBER (VOIDmode, result));
322 emit_move_insn (gen_lowpart (GET_MODE (op), result), op);
326 /* Return the optab used for computing the operation given by
327 the tree code, CODE. This function is not always usable (for
328 example, it cannot give complete results for multiplication
329 or division) but probably ought to be relied on more widely
330 throughout the expander. */
332 optab_for_tree_code (enum tree_code code, const_tree type)
344 return one_cmpl_optab;
353 return TYPE_UNSIGNED (type) ? umod_optab : smod_optab;
361 if (TYPE_SATURATING(type))
362 return TYPE_UNSIGNED(type) ? usdiv_optab : ssdiv_optab;
363 return TYPE_UNSIGNED (type) ? udiv_optab : sdiv_optab;
366 if (TYPE_SATURATING(type))
367 return TYPE_UNSIGNED(type) ? usashl_optab : ssashl_optab;
371 return TYPE_UNSIGNED (type) ? lshr_optab : ashr_optab;
380 return TYPE_UNSIGNED (type) ? umax_optab : smax_optab;
383 return TYPE_UNSIGNED (type) ? umin_optab : smin_optab;
385 case REALIGN_LOAD_EXPR:
386 return vec_realign_load_optab;
389 return TYPE_UNSIGNED (type) ? usum_widen_optab : ssum_widen_optab;
392 return TYPE_UNSIGNED (type) ? udot_prod_optab : sdot_prod_optab;
395 return TYPE_UNSIGNED (type) ? reduc_umax_optab : reduc_smax_optab;
398 return TYPE_UNSIGNED (type) ? reduc_umin_optab : reduc_smin_optab;
400 case REDUC_PLUS_EXPR:
401 return TYPE_UNSIGNED (type) ? reduc_uplus_optab : reduc_splus_optab;
403 case VEC_LSHIFT_EXPR:
404 return vec_shl_optab;
406 case VEC_RSHIFT_EXPR:
407 return vec_shr_optab;
409 case VEC_WIDEN_MULT_HI_EXPR:
410 return TYPE_UNSIGNED (type) ?
411 vec_widen_umult_hi_optab : vec_widen_smult_hi_optab;
413 case VEC_WIDEN_MULT_LO_EXPR:
414 return TYPE_UNSIGNED (type) ?
415 vec_widen_umult_lo_optab : vec_widen_smult_lo_optab;
417 case VEC_UNPACK_HI_EXPR:
418 return TYPE_UNSIGNED (type) ?
419 vec_unpacku_hi_optab : vec_unpacks_hi_optab;
421 case VEC_UNPACK_LO_EXPR:
422 return TYPE_UNSIGNED (type) ?
423 vec_unpacku_lo_optab : vec_unpacks_lo_optab;
425 case VEC_UNPACK_FLOAT_HI_EXPR:
426 /* The signedness is determined from input operand. */
427 return TYPE_UNSIGNED (type) ?
428 vec_unpacku_float_hi_optab : vec_unpacks_float_hi_optab;
430 case VEC_UNPACK_FLOAT_LO_EXPR:
431 /* The signedness is determined from input operand. */
432 return TYPE_UNSIGNED (type) ?
433 vec_unpacku_float_lo_optab : vec_unpacks_float_lo_optab;
435 case VEC_PACK_TRUNC_EXPR:
436 return vec_pack_trunc_optab;
438 case VEC_PACK_SAT_EXPR:
439 return TYPE_UNSIGNED (type) ? vec_pack_usat_optab : vec_pack_ssat_optab;
441 case VEC_PACK_FIX_TRUNC_EXPR:
442 /* The signedness is determined from output operand. */
443 return TYPE_UNSIGNED (type) ?
444 vec_pack_ufix_trunc_optab : vec_pack_sfix_trunc_optab;
450 trapv = INTEGRAL_TYPE_P (type) && TYPE_OVERFLOW_TRAPS (type);
453 case POINTER_PLUS_EXPR:
455 if (TYPE_SATURATING(type))
456 return TYPE_UNSIGNED(type) ? usadd_optab : ssadd_optab;
457 return trapv ? addv_optab : add_optab;
460 if (TYPE_SATURATING(type))
461 return TYPE_UNSIGNED(type) ? ussub_optab : sssub_optab;
462 return trapv ? subv_optab : sub_optab;
465 if (TYPE_SATURATING(type))
466 return TYPE_UNSIGNED(type) ? usmul_optab : ssmul_optab;
467 return trapv ? smulv_optab : smul_optab;
470 if (TYPE_SATURATING(type))
471 return TYPE_UNSIGNED(type) ? usneg_optab : ssneg_optab;
472 return trapv ? negv_optab : neg_optab;
475 return trapv ? absv_optab : abs_optab;
477 case VEC_EXTRACT_EVEN_EXPR:
478 return vec_extract_even_optab;
480 case VEC_EXTRACT_ODD_EXPR:
481 return vec_extract_odd_optab;
483 case VEC_INTERLEAVE_HIGH_EXPR:
484 return vec_interleave_high_optab;
486 case VEC_INTERLEAVE_LOW_EXPR:
487 return vec_interleave_low_optab;
495 /* Expand vector widening operations.
497 There are two different classes of operations handled here:
498 1) Operations whose result is wider than all the arguments to the operation.
499 Examples: VEC_UNPACK_HI/LO_EXPR, VEC_WIDEN_MULT_HI/LO_EXPR
500 In this case OP0 and optionally OP1 would be initialized,
501 but WIDE_OP wouldn't (not relevant for this case).
502 2) Operations whose result is of the same size as the last argument to the
503 operation, but wider than all the other arguments to the operation.
504 Examples: WIDEN_SUM_EXPR, VEC_DOT_PROD_EXPR.
505 In the case WIDE_OP, OP0 and optionally OP1 would be initialized.
507 E.g, when called to expand the following operations, this is how
508 the arguments will be initialized:
510 widening-sum 2 oprnd0 - oprnd1
511 widening-dot-product 3 oprnd0 oprnd1 oprnd2
512 widening-mult 2 oprnd0 oprnd1 -
513 type-promotion (vec-unpack) 1 oprnd0 - - */
516 expand_widen_pattern_expr (tree exp, rtx op0, rtx op1, rtx wide_op, rtx target,
519 tree oprnd0, oprnd1, oprnd2;
520 enum machine_mode wmode = 0, tmode0, tmode1 = 0;
521 optab widen_pattern_optab;
523 enum machine_mode xmode0, xmode1 = 0, wxmode = 0;
526 rtx xop0, xop1, wxop;
527 int nops = TREE_OPERAND_LENGTH (exp);
529 oprnd0 = TREE_OPERAND (exp, 0);
530 tmode0 = TYPE_MODE (TREE_TYPE (oprnd0));
531 widen_pattern_optab =
532 optab_for_tree_code (TREE_CODE (exp), TREE_TYPE (oprnd0));
533 icode = (int) optab_handler (widen_pattern_optab, tmode0)->insn_code;
534 gcc_assert (icode != CODE_FOR_nothing);
535 xmode0 = insn_data[icode].operand[1].mode;
539 oprnd1 = TREE_OPERAND (exp, 1);
540 tmode1 = TYPE_MODE (TREE_TYPE (oprnd1));
541 xmode1 = insn_data[icode].operand[2].mode;
544 /* The last operand is of a wider mode than the rest of the operands. */
552 gcc_assert (tmode1 == tmode0);
554 oprnd2 = TREE_OPERAND (exp, 2);
555 wmode = TYPE_MODE (TREE_TYPE (oprnd2));
556 wxmode = insn_data[icode].operand[3].mode;
560 wmode = wxmode = insn_data[icode].operand[0].mode;
563 || ! (*insn_data[icode].operand[0].predicate) (target, wmode))
564 temp = gen_reg_rtx (wmode);
572 /* In case the insn wants input operands in modes different from
573 those of the actual operands, convert the operands. It would
574 seem that we don't need to convert CONST_INTs, but we do, so
575 that they're properly zero-extended, sign-extended or truncated
578 if (GET_MODE (op0) != xmode0 && xmode0 != VOIDmode)
579 xop0 = convert_modes (xmode0,
580 GET_MODE (op0) != VOIDmode
586 if (GET_MODE (op1) != xmode1 && xmode1 != VOIDmode)
587 xop1 = convert_modes (xmode1,
588 GET_MODE (op1) != VOIDmode
594 if (GET_MODE (wide_op) != wxmode && wxmode != VOIDmode)
595 wxop = convert_modes (wxmode,
596 GET_MODE (wide_op) != VOIDmode
601 /* Now, if insn's predicates don't allow our operands, put them into
604 if (! (*insn_data[icode].operand[1].predicate) (xop0, xmode0)
605 && xmode0 != VOIDmode)
606 xop0 = copy_to_mode_reg (xmode0, xop0);
610 if (! (*insn_data[icode].operand[2].predicate) (xop1, xmode1)
611 && xmode1 != VOIDmode)
612 xop1 = copy_to_mode_reg (xmode1, xop1);
616 if (! (*insn_data[icode].operand[3].predicate) (wxop, wxmode)
617 && wxmode != VOIDmode)
618 wxop = copy_to_mode_reg (wxmode, wxop);
620 pat = GEN_FCN (icode) (temp, xop0, xop1, wxop);
623 pat = GEN_FCN (icode) (temp, xop0, xop1);
629 if (! (*insn_data[icode].operand[2].predicate) (wxop, wxmode)
630 && wxmode != VOIDmode)
631 wxop = copy_to_mode_reg (wxmode, wxop);
633 pat = GEN_FCN (icode) (temp, xop0, wxop);
636 pat = GEN_FCN (icode) (temp, xop0);
643 /* Generate code to perform an operation specified by TERNARY_OPTAB
644 on operands OP0, OP1 and OP2, with result having machine-mode MODE.
646 UNSIGNEDP is for the case where we have to widen the operands
647 to perform the operation. It says to use zero-extension.
649 If TARGET is nonzero, the value
650 is generated there, if it is convenient to do so.
651 In all cases an rtx is returned for the locus of the value;
652 this may or may not be TARGET. */
655 expand_ternary_op (enum machine_mode mode, optab ternary_optab, rtx op0,
656 rtx op1, rtx op2, rtx target, int unsignedp)
658 int icode = (int) optab_handler (ternary_optab, mode)->insn_code;
659 enum machine_mode mode0 = insn_data[icode].operand[1].mode;
660 enum machine_mode mode1 = insn_data[icode].operand[2].mode;
661 enum machine_mode mode2 = insn_data[icode].operand[3].mode;
664 rtx xop0 = op0, xop1 = op1, xop2 = op2;
666 gcc_assert (optab_handler (ternary_optab, mode)->insn_code
667 != CODE_FOR_nothing);
669 if (!target || !insn_data[icode].operand[0].predicate (target, mode))
670 temp = gen_reg_rtx (mode);
674 /* In case the insn wants input operands in modes different from
675 those of the actual operands, convert the operands. It would
676 seem that we don't need to convert CONST_INTs, but we do, so
677 that they're properly zero-extended, sign-extended or truncated
680 if (GET_MODE (op0) != mode0 && mode0 != VOIDmode)
681 xop0 = convert_modes (mode0,
682 GET_MODE (op0) != VOIDmode
687 if (GET_MODE (op1) != mode1 && mode1 != VOIDmode)
688 xop1 = convert_modes (mode1,
689 GET_MODE (op1) != VOIDmode
694 if (GET_MODE (op2) != mode2 && mode2 != VOIDmode)
695 xop2 = convert_modes (mode2,
696 GET_MODE (op2) != VOIDmode
701 /* Now, if insn's predicates don't allow our operands, put them into
704 if (!insn_data[icode].operand[1].predicate (xop0, mode0)
705 && mode0 != VOIDmode)
706 xop0 = copy_to_mode_reg (mode0, xop0);
708 if (!insn_data[icode].operand[2].predicate (xop1, mode1)
709 && mode1 != VOIDmode)
710 xop1 = copy_to_mode_reg (mode1, xop1);
712 if (!insn_data[icode].operand[3].predicate (xop2, mode2)
713 && mode2 != VOIDmode)
714 xop2 = copy_to_mode_reg (mode2, xop2);
716 pat = GEN_FCN (icode) (temp, xop0, xop1, xop2);
723 /* Like expand_binop, but return a constant rtx if the result can be
724 calculated at compile time. The arguments and return value are
725 otherwise the same as for expand_binop. */
728 simplify_expand_binop (enum machine_mode mode, optab binoptab,
729 rtx op0, rtx op1, rtx target, int unsignedp,
730 enum optab_methods methods)
732 if (CONSTANT_P (op0) && CONSTANT_P (op1))
734 rtx x = simplify_binary_operation (binoptab->code, mode, op0, op1);
740 return expand_binop (mode, binoptab, op0, op1, target, unsignedp, methods);
743 /* Like simplify_expand_binop, but always put the result in TARGET.
744 Return true if the expansion succeeded. */
747 force_expand_binop (enum machine_mode mode, optab binoptab,
748 rtx op0, rtx op1, rtx target, int unsignedp,
749 enum optab_methods methods)
751 rtx x = simplify_expand_binop (mode, binoptab, op0, op1,
752 target, unsignedp, methods);
756 emit_move_insn (target, x);
760 /* Generate insns for VEC_LSHIFT_EXPR, VEC_RSHIFT_EXPR. */
763 expand_vec_shift_expr (tree vec_shift_expr, rtx target)
765 enum insn_code icode;
766 rtx rtx_op1, rtx_op2;
767 enum machine_mode mode1;
768 enum machine_mode mode2;
769 enum machine_mode mode = TYPE_MODE (TREE_TYPE (vec_shift_expr));
770 tree vec_oprnd = TREE_OPERAND (vec_shift_expr, 0);
771 tree shift_oprnd = TREE_OPERAND (vec_shift_expr, 1);
775 switch (TREE_CODE (vec_shift_expr))
777 case VEC_RSHIFT_EXPR:
778 shift_optab = vec_shr_optab;
780 case VEC_LSHIFT_EXPR:
781 shift_optab = vec_shl_optab;
787 icode = (int) optab_handler (shift_optab, mode)->insn_code;
788 gcc_assert (icode != CODE_FOR_nothing);
790 mode1 = insn_data[icode].operand[1].mode;
791 mode2 = insn_data[icode].operand[2].mode;
793 rtx_op1 = expand_normal (vec_oprnd);
794 if (!(*insn_data[icode].operand[1].predicate) (rtx_op1, mode1)
795 && mode1 != VOIDmode)
796 rtx_op1 = force_reg (mode1, rtx_op1);
798 rtx_op2 = expand_normal (shift_oprnd);
799 if (!(*insn_data[icode].operand[2].predicate) (rtx_op2, mode2)
800 && mode2 != VOIDmode)
801 rtx_op2 = force_reg (mode2, rtx_op2);
804 || ! (*insn_data[icode].operand[0].predicate) (target, mode))
805 target = gen_reg_rtx (mode);
807 /* Emit instruction */
808 pat = GEN_FCN (icode) (target, rtx_op1, rtx_op2);
815 /* This subroutine of expand_doubleword_shift handles the cases in which
816 the effective shift value is >= BITS_PER_WORD. The arguments and return
817 value are the same as for the parent routine, except that SUPERWORD_OP1
818 is the shift count to use when shifting OUTOF_INPUT into INTO_TARGET.
819 INTO_TARGET may be null if the caller has decided to calculate it. */
822 expand_superword_shift (optab binoptab, rtx outof_input, rtx superword_op1,
823 rtx outof_target, rtx into_target,
824 int unsignedp, enum optab_methods methods)
826 if (into_target != 0)
827 if (!force_expand_binop (word_mode, binoptab, outof_input, superword_op1,
828 into_target, unsignedp, methods))
831 if (outof_target != 0)
833 /* For a signed right shift, we must fill OUTOF_TARGET with copies
834 of the sign bit, otherwise we must fill it with zeros. */
835 if (binoptab != ashr_optab)
836 emit_move_insn (outof_target, CONST0_RTX (word_mode));
838 if (!force_expand_binop (word_mode, binoptab,
839 outof_input, GEN_INT (BITS_PER_WORD - 1),
840 outof_target, unsignedp, methods))
846 /* This subroutine of expand_doubleword_shift handles the cases in which
847 the effective shift value is < BITS_PER_WORD. The arguments and return
848 value are the same as for the parent routine. */
851 expand_subword_shift (enum machine_mode op1_mode, optab binoptab,
852 rtx outof_input, rtx into_input, rtx op1,
853 rtx outof_target, rtx into_target,
854 int unsignedp, enum optab_methods methods,
855 unsigned HOST_WIDE_INT shift_mask)
857 optab reverse_unsigned_shift, unsigned_shift;
860 reverse_unsigned_shift = (binoptab == ashl_optab ? lshr_optab : ashl_optab);
861 unsigned_shift = (binoptab == ashl_optab ? ashl_optab : lshr_optab);
863 /* The low OP1 bits of INTO_TARGET come from the high bits of OUTOF_INPUT.
864 We therefore need to shift OUTOF_INPUT by (BITS_PER_WORD - OP1) bits in
865 the opposite direction to BINOPTAB. */
866 if (CONSTANT_P (op1) || shift_mask >= BITS_PER_WORD)
868 carries = outof_input;
869 tmp = immed_double_const (BITS_PER_WORD, 0, op1_mode);
870 tmp = simplify_expand_binop (op1_mode, sub_optab, tmp, op1,
875 /* We must avoid shifting by BITS_PER_WORD bits since that is either
876 the same as a zero shift (if shift_mask == BITS_PER_WORD - 1) or
877 has unknown behavior. Do a single shift first, then shift by the
878 remainder. It's OK to use ~OP1 as the remainder if shift counts
879 are truncated to the mode size. */
880 carries = expand_binop (word_mode, reverse_unsigned_shift,
881 outof_input, const1_rtx, 0, unsignedp, methods);
882 if (shift_mask == BITS_PER_WORD - 1)
884 tmp = immed_double_const (-1, -1, op1_mode);
885 tmp = simplify_expand_binop (op1_mode, xor_optab, op1, tmp,
890 tmp = immed_double_const (BITS_PER_WORD - 1, 0, op1_mode);
891 tmp = simplify_expand_binop (op1_mode, sub_optab, tmp, op1,
895 if (tmp == 0 || carries == 0)
897 carries = expand_binop (word_mode, reverse_unsigned_shift,
898 carries, tmp, 0, unsignedp, methods);
902 /* Shift INTO_INPUT logically by OP1. This is the last use of INTO_INPUT
903 so the result can go directly into INTO_TARGET if convenient. */
904 tmp = expand_binop (word_mode, unsigned_shift, into_input, op1,
905 into_target, unsignedp, methods);
909 /* Now OR in the bits carried over from OUTOF_INPUT. */
910 if (!force_expand_binop (word_mode, ior_optab, tmp, carries,
911 into_target, unsignedp, methods))
914 /* Use a standard word_mode shift for the out-of half. */
915 if (outof_target != 0)
916 if (!force_expand_binop (word_mode, binoptab, outof_input, op1,
917 outof_target, unsignedp, methods))
924 #ifdef HAVE_conditional_move
925 /* Try implementing expand_doubleword_shift using conditional moves.
926 The shift is by < BITS_PER_WORD if (CMP_CODE CMP1 CMP2) is true,
927 otherwise it is by >= BITS_PER_WORD. SUBWORD_OP1 and SUPERWORD_OP1
928 are the shift counts to use in the former and latter case. All other
929 arguments are the same as the parent routine. */
932 expand_doubleword_shift_condmove (enum machine_mode op1_mode, optab binoptab,
933 enum rtx_code cmp_code, rtx cmp1, rtx cmp2,
934 rtx outof_input, rtx into_input,
935 rtx subword_op1, rtx superword_op1,
936 rtx outof_target, rtx into_target,
937 int unsignedp, enum optab_methods methods,
938 unsigned HOST_WIDE_INT shift_mask)
940 rtx outof_superword, into_superword;
942 /* Put the superword version of the output into OUTOF_SUPERWORD and
944 outof_superword = outof_target != 0 ? gen_reg_rtx (word_mode) : 0;
945 if (outof_target != 0 && subword_op1 == superword_op1)
947 /* The value INTO_TARGET >> SUBWORD_OP1, which we later store in
948 OUTOF_TARGET, is the same as the value of INTO_SUPERWORD. */
949 into_superword = outof_target;
950 if (!expand_superword_shift (binoptab, outof_input, superword_op1,
951 outof_superword, 0, unsignedp, methods))
956 into_superword = gen_reg_rtx (word_mode);
957 if (!expand_superword_shift (binoptab, outof_input, superword_op1,
958 outof_superword, into_superword,
963 /* Put the subword version directly in OUTOF_TARGET and INTO_TARGET. */
964 if (!expand_subword_shift (op1_mode, binoptab,
965 outof_input, into_input, subword_op1,
966 outof_target, into_target,
967 unsignedp, methods, shift_mask))
970 /* Select between them. Do the INTO half first because INTO_SUPERWORD
971 might be the current value of OUTOF_TARGET. */
972 if (!emit_conditional_move (into_target, cmp_code, cmp1, cmp2, op1_mode,
973 into_target, into_superword, word_mode, false))
976 if (outof_target != 0)
977 if (!emit_conditional_move (outof_target, cmp_code, cmp1, cmp2, op1_mode,
978 outof_target, outof_superword,
986 /* Expand a doubleword shift (ashl, ashr or lshr) using word-mode shifts.
987 OUTOF_INPUT and INTO_INPUT are the two word-sized halves of the first
988 input operand; the shift moves bits in the direction OUTOF_INPUT->
989 INTO_TARGET. OUTOF_TARGET and INTO_TARGET are the equivalent words
990 of the target. OP1 is the shift count and OP1_MODE is its mode.
991 If OP1 is constant, it will have been truncated as appropriate
992 and is known to be nonzero.
994 If SHIFT_MASK is zero, the result of word shifts is undefined when the
995 shift count is outside the range [0, BITS_PER_WORD). This routine must
996 avoid generating such shifts for OP1s in the range [0, BITS_PER_WORD * 2).
998 If SHIFT_MASK is nonzero, all word-mode shift counts are effectively
999 masked by it and shifts in the range [BITS_PER_WORD, SHIFT_MASK) will
1000 fill with zeros or sign bits as appropriate.
1002 If SHIFT_MASK is BITS_PER_WORD - 1, this routine will synthesize
1003 a doubleword shift whose equivalent mask is BITS_PER_WORD * 2 - 1.
1004 Doing this preserves semantics required by SHIFT_COUNT_TRUNCATED.
1005 In all other cases, shifts by values outside [0, BITS_PER_UNIT * 2)
1008 BINOPTAB, UNSIGNEDP and METHODS are as for expand_binop. This function
1009 may not use INTO_INPUT after modifying INTO_TARGET, and similarly for
1010 OUTOF_INPUT and OUTOF_TARGET. OUTOF_TARGET can be null if the parent
1011 function wants to calculate it itself.
1013 Return true if the shift could be successfully synthesized. */
1016 expand_doubleword_shift (enum machine_mode op1_mode, optab binoptab,
1017 rtx outof_input, rtx into_input, rtx op1,
1018 rtx outof_target, rtx into_target,
1019 int unsignedp, enum optab_methods methods,
1020 unsigned HOST_WIDE_INT shift_mask)
1022 rtx superword_op1, tmp, cmp1, cmp2;
1023 rtx subword_label, done_label;
1024 enum rtx_code cmp_code;
1026 /* See if word-mode shifts by BITS_PER_WORD...BITS_PER_WORD * 2 - 1 will
1027 fill the result with sign or zero bits as appropriate. If so, the value
1028 of OUTOF_TARGET will always be (SHIFT OUTOF_INPUT OP1). Recursively call
1029 this routine to calculate INTO_TARGET (which depends on both OUTOF_INPUT
1030 and INTO_INPUT), then emit code to set up OUTOF_TARGET.
1032 This isn't worthwhile for constant shifts since the optimizers will
1033 cope better with in-range shift counts. */
1034 if (shift_mask >= BITS_PER_WORD
1035 && outof_target != 0
1036 && !CONSTANT_P (op1))
1038 if (!expand_doubleword_shift (op1_mode, binoptab,
1039 outof_input, into_input, op1,
1041 unsignedp, methods, shift_mask))
1043 if (!force_expand_binop (word_mode, binoptab, outof_input, op1,
1044 outof_target, unsignedp, methods))
1049 /* Set CMP_CODE, CMP1 and CMP2 so that the rtx (CMP_CODE CMP1 CMP2)
1050 is true when the effective shift value is less than BITS_PER_WORD.
1051 Set SUPERWORD_OP1 to the shift count that should be used to shift
1052 OUTOF_INPUT into INTO_TARGET when the condition is false. */
1053 tmp = immed_double_const (BITS_PER_WORD, 0, op1_mode);
1054 if (!CONSTANT_P (op1) && shift_mask == BITS_PER_WORD - 1)
1056 /* Set CMP1 to OP1 & BITS_PER_WORD. The result is zero iff OP1
1057 is a subword shift count. */
1058 cmp1 = simplify_expand_binop (op1_mode, and_optab, op1, tmp,
1060 cmp2 = CONST0_RTX (op1_mode);
1062 superword_op1 = op1;
1066 /* Set CMP1 to OP1 - BITS_PER_WORD. */
1067 cmp1 = simplify_expand_binop (op1_mode, sub_optab, op1, tmp,
1069 cmp2 = CONST0_RTX (op1_mode);
1071 superword_op1 = cmp1;
1076 /* If we can compute the condition at compile time, pick the
1077 appropriate subroutine. */
1078 tmp = simplify_relational_operation (cmp_code, SImode, op1_mode, cmp1, cmp2);
1079 if (tmp != 0 && GET_CODE (tmp) == CONST_INT)
1081 if (tmp == const0_rtx)
1082 return expand_superword_shift (binoptab, outof_input, superword_op1,
1083 outof_target, into_target,
1084 unsignedp, methods);
1086 return expand_subword_shift (op1_mode, binoptab,
1087 outof_input, into_input, op1,
1088 outof_target, into_target,
1089 unsignedp, methods, shift_mask);
1092 #ifdef HAVE_conditional_move
1093 /* Try using conditional moves to generate straight-line code. */
1095 rtx start = get_last_insn ();
1096 if (expand_doubleword_shift_condmove (op1_mode, binoptab,
1097 cmp_code, cmp1, cmp2,
1098 outof_input, into_input,
1100 outof_target, into_target,
1101 unsignedp, methods, shift_mask))
1103 delete_insns_since (start);
1107 /* As a last resort, use branches to select the correct alternative. */
1108 subword_label = gen_label_rtx ();
1109 done_label = gen_label_rtx ();
1112 do_compare_rtx_and_jump (cmp1, cmp2, cmp_code, false, op1_mode,
1113 0, 0, subword_label);
1116 if (!expand_superword_shift (binoptab, outof_input, superword_op1,
1117 outof_target, into_target,
1118 unsignedp, methods))
1121 emit_jump_insn (gen_jump (done_label));
1123 emit_label (subword_label);
1125 if (!expand_subword_shift (op1_mode, binoptab,
1126 outof_input, into_input, op1,
1127 outof_target, into_target,
1128 unsignedp, methods, shift_mask))
1131 emit_label (done_label);
1135 /* Subroutine of expand_binop. Perform a double word multiplication of
1136 operands OP0 and OP1 both of mode MODE, which is exactly twice as wide
1137 as the target's word_mode. This function return NULL_RTX if anything
1138 goes wrong, in which case it may have already emitted instructions
1139 which need to be deleted.
1141 If we want to multiply two two-word values and have normal and widening
1142 multiplies of single-word values, we can do this with three smaller
1143 multiplications. Note that we do not make a REG_NO_CONFLICT block here
1144 because we are not operating on one word at a time.
1146 The multiplication proceeds as follows:
1147 _______________________
1148 [__op0_high_|__op0_low__]
1149 _______________________
1150 * [__op1_high_|__op1_low__]
1151 _______________________________________________
1152 _______________________
1153 (1) [__op0_low__*__op1_low__]
1154 _______________________
1155 (2a) [__op0_low__*__op1_high_]
1156 _______________________
1157 (2b) [__op0_high_*__op1_low__]
1158 _______________________
1159 (3) [__op0_high_*__op1_high_]
1162 This gives a 4-word result. Since we are only interested in the
1163 lower 2 words, partial result (3) and the upper words of (2a) and
1164 (2b) don't need to be calculated. Hence (2a) and (2b) can be
1165 calculated using non-widening multiplication.
1167 (1), however, needs to be calculated with an unsigned widening
1168 multiplication. If this operation is not directly supported we
1169 try using a signed widening multiplication and adjust the result.
1170 This adjustment works as follows:
1172 If both operands are positive then no adjustment is needed.
1174 If the operands have different signs, for example op0_low < 0 and
1175 op1_low >= 0, the instruction treats the most significant bit of
1176 op0_low as a sign bit instead of a bit with significance
1177 2**(BITS_PER_WORD-1), i.e. the instruction multiplies op1_low
1178 with 2**BITS_PER_WORD - op0_low, and two's complements the
1179 result. Conclusion: We need to add op1_low * 2**BITS_PER_WORD to
1182 Similarly, if both operands are negative, we need to add
1183 (op0_low + op1_low) * 2**BITS_PER_WORD.
1185 We use a trick to adjust quickly. We logically shift op0_low right
1186 (op1_low) BITS_PER_WORD-1 steps to get 0 or 1, and add this to
1187 op0_high (op1_high) before it is used to calculate 2b (2a). If no
1188 logical shift exists, we do an arithmetic right shift and subtract
1192 expand_doubleword_mult (enum machine_mode mode, rtx op0, rtx op1, rtx target,
1193 bool umulp, enum optab_methods methods)
1195 int low = (WORDS_BIG_ENDIAN ? 1 : 0);
1196 int high = (WORDS_BIG_ENDIAN ? 0 : 1);
1197 rtx wordm1 = umulp ? NULL_RTX : GEN_INT (BITS_PER_WORD - 1);
1198 rtx product, adjust, product_high, temp;
1200 rtx op0_high = operand_subword_force (op0, high, mode);
1201 rtx op0_low = operand_subword_force (op0, low, mode);
1202 rtx op1_high = operand_subword_force (op1, high, mode);
1203 rtx op1_low = operand_subword_force (op1, low, mode);
1205 /* If we're using an unsigned multiply to directly compute the product
1206 of the low-order words of the operands and perform any required
1207 adjustments of the operands, we begin by trying two more multiplications
1208 and then computing the appropriate sum.
1210 We have checked above that the required addition is provided.
1211 Full-word addition will normally always succeed, especially if
1212 it is provided at all, so we don't worry about its failure. The
1213 multiplication may well fail, however, so we do handle that. */
1217 /* ??? This could be done with emit_store_flag where available. */
1218 temp = expand_binop (word_mode, lshr_optab, op0_low, wordm1,
1219 NULL_RTX, 1, methods);
1221 op0_high = expand_binop (word_mode, add_optab, op0_high, temp,
1222 NULL_RTX, 0, OPTAB_DIRECT);
1225 temp = expand_binop (word_mode, ashr_optab, op0_low, wordm1,
1226 NULL_RTX, 0, methods);
1229 op0_high = expand_binop (word_mode, sub_optab, op0_high, temp,
1230 NULL_RTX, 0, OPTAB_DIRECT);
1237 adjust = expand_binop (word_mode, smul_optab, op0_high, op1_low,
1238 NULL_RTX, 0, OPTAB_DIRECT);
1242 /* OP0_HIGH should now be dead. */
1246 /* ??? This could be done with emit_store_flag where available. */
1247 temp = expand_binop (word_mode, lshr_optab, op1_low, wordm1,
1248 NULL_RTX, 1, methods);
1250 op1_high = expand_binop (word_mode, add_optab, op1_high, temp,
1251 NULL_RTX, 0, OPTAB_DIRECT);
1254 temp = expand_binop (word_mode, ashr_optab, op1_low, wordm1,
1255 NULL_RTX, 0, methods);
1258 op1_high = expand_binop (word_mode, sub_optab, op1_high, temp,
1259 NULL_RTX, 0, OPTAB_DIRECT);
1266 temp = expand_binop (word_mode, smul_optab, op1_high, op0_low,
1267 NULL_RTX, 0, OPTAB_DIRECT);
1271 /* OP1_HIGH should now be dead. */
1273 adjust = expand_binop (word_mode, add_optab, adjust, temp,
1274 adjust, 0, OPTAB_DIRECT);
1276 if (target && !REG_P (target))
1280 product = expand_binop (mode, umul_widen_optab, op0_low, op1_low,
1281 target, 1, OPTAB_DIRECT);
1283 product = expand_binop (mode, smul_widen_optab, op0_low, op1_low,
1284 target, 1, OPTAB_DIRECT);
1289 product_high = operand_subword (product, high, 1, mode);
1290 adjust = expand_binop (word_mode, add_optab, product_high, adjust,
1291 REG_P (product_high) ? product_high : adjust,
1293 emit_move_insn (product_high, adjust);
1297 /* Wrapper around expand_binop which takes an rtx code to specify
1298 the operation to perform, not an optab pointer. All other
1299 arguments are the same. */
1301 expand_simple_binop (enum machine_mode mode, enum rtx_code code, rtx op0,
1302 rtx op1, rtx target, int unsignedp,
1303 enum optab_methods methods)
1305 optab binop = code_to_optab[(int) code];
1308 return expand_binop (mode, binop, op0, op1, target, unsignedp, methods);
1311 /* Return whether OP0 and OP1 should be swapped when expanding a commutative
1312 binop. Order them according to commutative_operand_precedence and, if
1313 possible, try to put TARGET or a pseudo first. */
1315 swap_commutative_operands_with_target (rtx target, rtx op0, rtx op1)
1317 int op0_prec = commutative_operand_precedence (op0);
1318 int op1_prec = commutative_operand_precedence (op1);
1320 if (op0_prec < op1_prec)
1323 if (op0_prec > op1_prec)
1326 /* With equal precedence, both orders are ok, but it is better if the
1327 first operand is TARGET, or if both TARGET and OP0 are pseudos. */
1328 if (target == 0 || REG_P (target))
1329 return (REG_P (op1) && !REG_P (op0)) || target == op1;
1331 return rtx_equal_p (op1, target);
1334 /* Return true if BINOPTAB implements a shift operation. */
1337 shift_optab_p (optab binoptab)
1339 switch (binoptab->code)
1355 /* Return true if BINOPTAB implements a commutative binary operation. */
1358 commutative_optab_p (optab binoptab)
1360 return (GET_RTX_CLASS (binoptab->code) == RTX_COMM_ARITH
1361 || binoptab == smul_widen_optab
1362 || binoptab == umul_widen_optab
1363 || binoptab == smul_highpart_optab
1364 || binoptab == umul_highpart_optab);
1367 /* X is to be used in mode MODE as an operand to BINOPTAB. If we're
1368 optimizing, and if the operand is a constant that costs more than
1369 1 instruction, force the constant into a register and return that
1370 register. Return X otherwise. UNSIGNEDP says whether X is unsigned. */
1373 avoid_expensive_constant (enum machine_mode mode, optab binoptab,
1374 rtx x, bool unsignedp)
1376 if (mode != VOIDmode
1379 && rtx_cost (x, binoptab->code) > COSTS_N_INSNS (1))
1381 if (GET_CODE (x) == CONST_INT)
1383 HOST_WIDE_INT intval = trunc_int_for_mode (INTVAL (x), mode);
1384 if (intval != INTVAL (x))
1385 x = GEN_INT (intval);
1388 x = convert_modes (mode, VOIDmode, x, unsignedp);
1389 x = force_reg (mode, x);
1394 /* Helper function for expand_binop: handle the case where there
1395 is an insn that directly implements the indicated operation.
1396 Returns null if this is not possible. */
1398 expand_binop_directly (enum machine_mode mode, optab binoptab,
1400 rtx target, int unsignedp, enum optab_methods methods,
1403 int icode = (int) optab_handler (binoptab, mode)->insn_code;
1404 enum machine_mode mode0 = insn_data[icode].operand[1].mode;
1405 enum machine_mode mode1 = insn_data[icode].operand[2].mode;
1406 enum machine_mode tmp_mode;
1409 rtx xop0 = op0, xop1 = op1;
1416 temp = gen_reg_rtx (mode);
1418 /* If it is a commutative operator and the modes would match
1419 if we would swap the operands, we can save the conversions. */
1420 commutative_p = commutative_optab_p (binoptab);
1422 && GET_MODE (xop0) != mode0 && GET_MODE (xop1) != mode1
1423 && GET_MODE (xop0) == mode1 && GET_MODE (xop1) == mode1)
1430 /* If we are optimizing, force expensive constants into a register. */
1431 xop0 = avoid_expensive_constant (mode0, binoptab, xop0, unsignedp);
1432 if (!shift_optab_p (binoptab))
1433 xop1 = avoid_expensive_constant (mode1, binoptab, xop1, unsignedp);
1435 /* In case the insn wants input operands in modes different from
1436 those of the actual operands, convert the operands. It would
1437 seem that we don't need to convert CONST_INTs, but we do, so
1438 that they're properly zero-extended, sign-extended or truncated
1441 if (GET_MODE (xop0) != mode0 && mode0 != VOIDmode)
1442 xop0 = convert_modes (mode0,
1443 GET_MODE (xop0) != VOIDmode
1448 if (GET_MODE (xop1) != mode1 && mode1 != VOIDmode)
1449 xop1 = convert_modes (mode1,
1450 GET_MODE (xop1) != VOIDmode
1455 /* If operation is commutative,
1456 try to make the first operand a register.
1457 Even better, try to make it the same as the target.
1458 Also try to make the last operand a constant. */
1460 && swap_commutative_operands_with_target (target, xop0, xop1))
1467 /* Now, if insn's predicates don't allow our operands, put them into
1470 if (!insn_data[icode].operand[1].predicate (xop0, mode0)
1471 && mode0 != VOIDmode)
1472 xop0 = copy_to_mode_reg (mode0, xop0);
1474 if (!insn_data[icode].operand[2].predicate (xop1, mode1)
1475 && mode1 != VOIDmode)
1476 xop1 = copy_to_mode_reg (mode1, xop1);
1478 if (binoptab == vec_pack_trunc_optab
1479 || binoptab == vec_pack_usat_optab
1480 || binoptab == vec_pack_ssat_optab
1481 || binoptab == vec_pack_ufix_trunc_optab
1482 || binoptab == vec_pack_sfix_trunc_optab)
1484 /* The mode of the result is different then the mode of the
1486 tmp_mode = insn_data[icode].operand[0].mode;
1487 if (GET_MODE_NUNITS (tmp_mode) != 2 * GET_MODE_NUNITS (mode))
1493 if (!insn_data[icode].operand[0].predicate (temp, tmp_mode))
1494 temp = gen_reg_rtx (tmp_mode);
1496 pat = GEN_FCN (icode) (temp, xop0, xop1);
1499 /* If PAT is composed of more than one insn, try to add an appropriate
1500 REG_EQUAL note to it. If we can't because TEMP conflicts with an
1501 operand, call expand_binop again, this time without a target. */
1502 if (INSN_P (pat) && NEXT_INSN (pat) != NULL_RTX
1503 && ! add_equal_note (pat, temp, binoptab->code, xop0, xop1))
1505 delete_insns_since (last);
1506 return expand_binop (mode, binoptab, op0, op1, NULL_RTX,
1507 unsignedp, methods);
1514 delete_insns_since (last);
1518 /* Generate code to perform an operation specified by BINOPTAB
1519 on operands OP0 and OP1, with result having machine-mode MODE.
1521 UNSIGNEDP is for the case where we have to widen the operands
1522 to perform the operation. It says to use zero-extension.
1524 If TARGET is nonzero, the value
1525 is generated there, if it is convenient to do so.
1526 In all cases an rtx is returned for the locus of the value;
1527 this may or may not be TARGET. */
1530 expand_binop (enum machine_mode mode, optab binoptab, rtx op0, rtx op1,
1531 rtx target, int unsignedp, enum optab_methods methods)
1533 enum optab_methods next_methods
1534 = (methods == OPTAB_LIB || methods == OPTAB_LIB_WIDEN
1535 ? OPTAB_WIDEN : methods);
1536 enum mode_class class;
1537 enum machine_mode wider_mode;
1540 rtx entry_last = get_last_insn ();
1543 class = GET_MODE_CLASS (mode);
1545 /* If subtracting an integer constant, convert this into an addition of
1546 the negated constant. */
1548 if (binoptab == sub_optab && GET_CODE (op1) == CONST_INT)
1550 op1 = negate_rtx (mode, op1);
1551 binoptab = add_optab;
1554 /* Record where to delete back to if we backtrack. */
1555 last = get_last_insn ();
1557 /* If we can do it with a three-operand insn, do so. */
1559 if (methods != OPTAB_MUST_WIDEN
1560 && optab_handler (binoptab, mode)->insn_code != CODE_FOR_nothing)
1562 temp = expand_binop_directly (mode, binoptab, op0, op1, target,
1563 unsignedp, methods, last);
1568 /* If we were trying to rotate, and that didn't work, try rotating
1569 the other direction before falling back to shifts and bitwise-or. */
1570 if (((binoptab == rotl_optab
1571 && optab_handler (rotr_optab, mode)->insn_code != CODE_FOR_nothing)
1572 || (binoptab == rotr_optab
1573 && optab_handler (rotl_optab, mode)->insn_code != CODE_FOR_nothing))
1574 && class == MODE_INT)
1576 optab otheroptab = (binoptab == rotl_optab ? rotr_optab : rotl_optab);
1578 unsigned int bits = GET_MODE_BITSIZE (mode);
1580 if (GET_CODE (op1) == CONST_INT)
1581 newop1 = GEN_INT (bits - INTVAL (op1));
1582 else if (targetm.shift_truncation_mask (mode) == bits - 1)
1583 newop1 = negate_rtx (mode, op1);
1585 newop1 = expand_binop (mode, sub_optab,
1586 GEN_INT (bits), op1,
1587 NULL_RTX, unsignedp, OPTAB_DIRECT);
1589 temp = expand_binop_directly (mode, otheroptab, op0, newop1,
1590 target, unsignedp, methods, last);
1595 /* If this is a multiply, see if we can do a widening operation that
1596 takes operands of this mode and makes a wider mode. */
1598 if (binoptab == smul_optab
1599 && GET_MODE_WIDER_MODE (mode) != VOIDmode
1600 && ((optab_handler ((unsignedp ? umul_widen_optab : smul_widen_optab),
1601 GET_MODE_WIDER_MODE (mode))->insn_code)
1602 != CODE_FOR_nothing))
1604 temp = expand_binop (GET_MODE_WIDER_MODE (mode),
1605 unsignedp ? umul_widen_optab : smul_widen_optab,
1606 op0, op1, NULL_RTX, unsignedp, OPTAB_DIRECT);
1610 if (GET_MODE_CLASS (mode) == MODE_INT
1611 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (mode),
1612 GET_MODE_BITSIZE (GET_MODE (temp))))
1613 return gen_lowpart (mode, temp);
1615 return convert_to_mode (mode, temp, unsignedp);
1619 /* Look for a wider mode of the same class for which we think we
1620 can open-code the operation. Check for a widening multiply at the
1621 wider mode as well. */
1623 if (CLASS_HAS_WIDER_MODES_P (class)
1624 && methods != OPTAB_DIRECT && methods != OPTAB_LIB)
1625 for (wider_mode = GET_MODE_WIDER_MODE (mode);
1626 wider_mode != VOIDmode;
1627 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
1629 if (optab_handler (binoptab, wider_mode)->insn_code != CODE_FOR_nothing
1630 || (binoptab == smul_optab
1631 && GET_MODE_WIDER_MODE (wider_mode) != VOIDmode
1632 && ((optab_handler ((unsignedp ? umul_widen_optab
1633 : smul_widen_optab),
1634 GET_MODE_WIDER_MODE (wider_mode))->insn_code)
1635 != CODE_FOR_nothing)))
1637 rtx xop0 = op0, xop1 = op1;
1640 /* For certain integer operations, we need not actually extend
1641 the narrow operands, as long as we will truncate
1642 the results to the same narrowness. */
1644 if ((binoptab == ior_optab || binoptab == and_optab
1645 || binoptab == xor_optab
1646 || binoptab == add_optab || binoptab == sub_optab
1647 || binoptab == smul_optab || binoptab == ashl_optab)
1648 && class == MODE_INT)
1651 xop0 = avoid_expensive_constant (mode, binoptab,
1653 if (binoptab != ashl_optab)
1654 xop1 = avoid_expensive_constant (mode, binoptab,
1658 xop0 = widen_operand (xop0, wider_mode, mode, unsignedp, no_extend);
1660 /* The second operand of a shift must always be extended. */
1661 xop1 = widen_operand (xop1, wider_mode, mode, unsignedp,
1662 no_extend && binoptab != ashl_optab);
1664 temp = expand_binop (wider_mode, binoptab, xop0, xop1, NULL_RTX,
1665 unsignedp, OPTAB_DIRECT);
1668 if (class != MODE_INT
1669 || !TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (mode),
1670 GET_MODE_BITSIZE (wider_mode)))
1673 target = gen_reg_rtx (mode);
1674 convert_move (target, temp, 0);
1678 return gen_lowpart (mode, temp);
1681 delete_insns_since (last);
1685 /* If operation is commutative,
1686 try to make the first operand a register.
1687 Even better, try to make it the same as the target.
1688 Also try to make the last operand a constant. */
1689 if (commutative_optab_p (binoptab)
1690 && swap_commutative_operands_with_target (target, op0, op1))
1697 /* These can be done a word at a time. */
1698 if ((binoptab == and_optab || binoptab == ior_optab || binoptab == xor_optab)
1699 && class == MODE_INT
1700 && GET_MODE_SIZE (mode) > UNITS_PER_WORD
1701 && optab_handler (binoptab, word_mode)->insn_code != CODE_FOR_nothing)
1707 /* If TARGET is the same as one of the operands, the REG_EQUAL note
1708 won't be accurate, so use a new target. */
1709 if (target == 0 || target == op0 || target == op1)
1710 target = gen_reg_rtx (mode);
1714 /* Do the actual arithmetic. */
1715 for (i = 0; i < GET_MODE_BITSIZE (mode) / BITS_PER_WORD; i++)
1717 rtx target_piece = operand_subword (target, i, 1, mode);
1718 rtx x = expand_binop (word_mode, binoptab,
1719 operand_subword_force (op0, i, mode),
1720 operand_subword_force (op1, i, mode),
1721 target_piece, unsignedp, next_methods);
1726 if (target_piece != x)
1727 emit_move_insn (target_piece, x);
1730 insns = get_insns ();
1733 if (i == GET_MODE_BITSIZE (mode) / BITS_PER_WORD)
1735 if (binoptab->code != UNKNOWN)
1737 = gen_rtx_fmt_ee (binoptab->code, mode,
1738 copy_rtx (op0), copy_rtx (op1));
1742 emit_no_conflict_block (insns, target, op0, op1, equiv_value);
1747 /* Synthesize double word shifts from single word shifts. */
1748 if ((binoptab == lshr_optab || binoptab == ashl_optab
1749 || binoptab == ashr_optab)
1750 && class == MODE_INT
1751 && (GET_CODE (op1) == CONST_INT || !optimize_size)
1752 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
1753 && optab_handler (binoptab, word_mode)->insn_code != CODE_FOR_nothing
1754 && optab_handler (ashl_optab, word_mode)->insn_code != CODE_FOR_nothing
1755 && optab_handler (lshr_optab, word_mode)->insn_code != CODE_FOR_nothing)
1757 unsigned HOST_WIDE_INT shift_mask, double_shift_mask;
1758 enum machine_mode op1_mode;
1760 double_shift_mask = targetm.shift_truncation_mask (mode);
1761 shift_mask = targetm.shift_truncation_mask (word_mode);
1762 op1_mode = GET_MODE (op1) != VOIDmode ? GET_MODE (op1) : word_mode;
1764 /* Apply the truncation to constant shifts. */
1765 if (double_shift_mask > 0 && GET_CODE (op1) == CONST_INT)
1766 op1 = GEN_INT (INTVAL (op1) & double_shift_mask);
1768 if (op1 == CONST0_RTX (op1_mode))
1771 /* Make sure that this is a combination that expand_doubleword_shift
1772 can handle. See the comments there for details. */
1773 if (double_shift_mask == 0
1774 || (shift_mask == BITS_PER_WORD - 1
1775 && double_shift_mask == BITS_PER_WORD * 2 - 1))
1777 rtx insns, equiv_value;
1778 rtx into_target, outof_target;
1779 rtx into_input, outof_input;
1780 int left_shift, outof_word;
1782 /* If TARGET is the same as one of the operands, the REG_EQUAL note
1783 won't be accurate, so use a new target. */
1784 if (target == 0 || target == op0 || target == op1)
1785 target = gen_reg_rtx (mode);
1789 /* OUTOF_* is the word we are shifting bits away from, and
1790 INTO_* is the word that we are shifting bits towards, thus
1791 they differ depending on the direction of the shift and
1792 WORDS_BIG_ENDIAN. */
1794 left_shift = binoptab == ashl_optab;
1795 outof_word = left_shift ^ ! WORDS_BIG_ENDIAN;
1797 outof_target = operand_subword (target, outof_word, 1, mode);
1798 into_target = operand_subword (target, 1 - outof_word, 1, mode);
1800 outof_input = operand_subword_force (op0, outof_word, mode);
1801 into_input = operand_subword_force (op0, 1 - outof_word, mode);
1803 if (expand_doubleword_shift (op1_mode, binoptab,
1804 outof_input, into_input, op1,
1805 outof_target, into_target,
1806 unsignedp, next_methods, shift_mask))
1808 insns = get_insns ();
1811 equiv_value = gen_rtx_fmt_ee (binoptab->code, mode, op0, op1);
1812 emit_no_conflict_block (insns, target, op0, op1, equiv_value);
1819 /* Synthesize double word rotates from single word shifts. */
1820 if ((binoptab == rotl_optab || binoptab == rotr_optab)
1821 && class == MODE_INT
1822 && GET_CODE (op1) == CONST_INT
1823 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
1824 && optab_handler (ashl_optab, word_mode)->insn_code != CODE_FOR_nothing
1825 && optab_handler (lshr_optab, word_mode)->insn_code != CODE_FOR_nothing)
1828 rtx into_target, outof_target;
1829 rtx into_input, outof_input;
1831 int shift_count, left_shift, outof_word;
1833 /* If TARGET is the same as one of the operands, the REG_EQUAL note
1834 won't be accurate, so use a new target. Do this also if target is not
1835 a REG, first because having a register instead may open optimization
1836 opportunities, and second because if target and op0 happen to be MEMs
1837 designating the same location, we would risk clobbering it too early
1838 in the code sequence we generate below. */
1839 if (target == 0 || target == op0 || target == op1 || ! REG_P (target))
1840 target = gen_reg_rtx (mode);
1844 shift_count = INTVAL (op1);
1846 /* OUTOF_* is the word we are shifting bits away from, and
1847 INTO_* is the word that we are shifting bits towards, thus
1848 they differ depending on the direction of the shift and
1849 WORDS_BIG_ENDIAN. */
1851 left_shift = (binoptab == rotl_optab);
1852 outof_word = left_shift ^ ! WORDS_BIG_ENDIAN;
1854 outof_target = operand_subword (target, outof_word, 1, mode);
1855 into_target = operand_subword (target, 1 - outof_word, 1, mode);
1857 outof_input = operand_subword_force (op0, outof_word, mode);
1858 into_input = operand_subword_force (op0, 1 - outof_word, mode);
1860 if (shift_count == BITS_PER_WORD)
1862 /* This is just a word swap. */
1863 emit_move_insn (outof_target, into_input);
1864 emit_move_insn (into_target, outof_input);
1869 rtx into_temp1, into_temp2, outof_temp1, outof_temp2;
1870 rtx first_shift_count, second_shift_count;
1871 optab reverse_unsigned_shift, unsigned_shift;
1873 reverse_unsigned_shift = (left_shift ^ (shift_count < BITS_PER_WORD)
1874 ? lshr_optab : ashl_optab);
1876 unsigned_shift = (left_shift ^ (shift_count < BITS_PER_WORD)
1877 ? ashl_optab : lshr_optab);
1879 if (shift_count > BITS_PER_WORD)
1881 first_shift_count = GEN_INT (shift_count - BITS_PER_WORD);
1882 second_shift_count = GEN_INT (2 * BITS_PER_WORD - shift_count);
1886 first_shift_count = GEN_INT (BITS_PER_WORD - shift_count);
1887 second_shift_count = GEN_INT (shift_count);
1890 into_temp1 = expand_binop (word_mode, unsigned_shift,
1891 outof_input, first_shift_count,
1892 NULL_RTX, unsignedp, next_methods);
1893 into_temp2 = expand_binop (word_mode, reverse_unsigned_shift,
1894 into_input, second_shift_count,
1895 NULL_RTX, unsignedp, next_methods);
1897 if (into_temp1 != 0 && into_temp2 != 0)
1898 inter = expand_binop (word_mode, ior_optab, into_temp1, into_temp2,
1899 into_target, unsignedp, next_methods);
1903 if (inter != 0 && inter != into_target)
1904 emit_move_insn (into_target, inter);
1906 outof_temp1 = expand_binop (word_mode, unsigned_shift,
1907 into_input, first_shift_count,
1908 NULL_RTX, unsignedp, next_methods);
1909 outof_temp2 = expand_binop (word_mode, reverse_unsigned_shift,
1910 outof_input, second_shift_count,
1911 NULL_RTX, unsignedp, next_methods);
1913 if (inter != 0 && outof_temp1 != 0 && outof_temp2 != 0)
1914 inter = expand_binop (word_mode, ior_optab,
1915 outof_temp1, outof_temp2,
1916 outof_target, unsignedp, next_methods);
1918 if (inter != 0 && inter != outof_target)
1919 emit_move_insn (outof_target, inter);
1922 insns = get_insns ();
1927 /* One may be tempted to wrap the insns in a REG_NO_CONFLICT
1928 block to help the register allocator a bit. But a multi-word
1929 rotate will need all the input bits when setting the output
1930 bits, so there clearly is a conflict between the input and
1931 output registers. So we can't use a no-conflict block here. */
1937 /* These can be done a word at a time by propagating carries. */
1938 if ((binoptab == add_optab || binoptab == sub_optab)
1939 && class == MODE_INT
1940 && GET_MODE_SIZE (mode) >= 2 * UNITS_PER_WORD
1941 && optab_handler (binoptab, word_mode)->insn_code != CODE_FOR_nothing)
1944 optab otheroptab = binoptab == add_optab ? sub_optab : add_optab;
1945 const unsigned int nwords = GET_MODE_BITSIZE (mode) / BITS_PER_WORD;
1946 rtx carry_in = NULL_RTX, carry_out = NULL_RTX;
1947 rtx xop0, xop1, xtarget;
1949 /* We can handle either a 1 or -1 value for the carry. If STORE_FLAG
1950 value is one of those, use it. Otherwise, use 1 since it is the
1951 one easiest to get. */
1952 #if STORE_FLAG_VALUE == 1 || STORE_FLAG_VALUE == -1
1953 int normalizep = STORE_FLAG_VALUE;
1958 /* Prepare the operands. */
1959 xop0 = force_reg (mode, op0);
1960 xop1 = force_reg (mode, op1);
1962 xtarget = gen_reg_rtx (mode);
1964 if (target == 0 || !REG_P (target))
1967 /* Indicate for flow that the entire target reg is being set. */
1969 emit_insn (gen_rtx_CLOBBER (VOIDmode, xtarget));
1971 /* Do the actual arithmetic. */
1972 for (i = 0; i < nwords; i++)
1974 int index = (WORDS_BIG_ENDIAN ? nwords - i - 1 : i);
1975 rtx target_piece = operand_subword (xtarget, index, 1, mode);
1976 rtx op0_piece = operand_subword_force (xop0, index, mode);
1977 rtx op1_piece = operand_subword_force (xop1, index, mode);
1980 /* Main add/subtract of the input operands. */
1981 x = expand_binop (word_mode, binoptab,
1982 op0_piece, op1_piece,
1983 target_piece, unsignedp, next_methods);
1989 /* Store carry from main add/subtract. */
1990 carry_out = gen_reg_rtx (word_mode);
1991 carry_out = emit_store_flag_force (carry_out,
1992 (binoptab == add_optab
1995 word_mode, 1, normalizep);
2002 /* Add/subtract previous carry to main result. */
2003 newx = expand_binop (word_mode,
2004 normalizep == 1 ? binoptab : otheroptab,
2006 NULL_RTX, 1, next_methods);
2010 /* Get out carry from adding/subtracting carry in. */
2011 rtx carry_tmp = gen_reg_rtx (word_mode);
2012 carry_tmp = emit_store_flag_force (carry_tmp,
2013 (binoptab == add_optab
2016 word_mode, 1, normalizep);
2018 /* Logical-ior the two poss. carry together. */
2019 carry_out = expand_binop (word_mode, ior_optab,
2020 carry_out, carry_tmp,
2021 carry_out, 0, next_methods);
2025 emit_move_insn (target_piece, newx);
2029 if (x != target_piece)
2030 emit_move_insn (target_piece, x);
2033 carry_in = carry_out;
2036 if (i == GET_MODE_BITSIZE (mode) / (unsigned) BITS_PER_WORD)
2038 if (optab_handler (mov_optab, mode)->insn_code != CODE_FOR_nothing
2039 || ! rtx_equal_p (target, xtarget))
2041 rtx temp = emit_move_insn (target, xtarget);
2043 set_unique_reg_note (temp,
2045 gen_rtx_fmt_ee (binoptab->code, mode,
2056 delete_insns_since (last);
2059 /* Attempt to synthesize double word multiplies using a sequence of word
2060 mode multiplications. We first attempt to generate a sequence using a
2061 more efficient unsigned widening multiply, and if that fails we then
2062 try using a signed widening multiply. */
2064 if (binoptab == smul_optab
2065 && class == MODE_INT
2066 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
2067 && optab_handler (smul_optab, word_mode)->insn_code != CODE_FOR_nothing
2068 && optab_handler (add_optab, word_mode)->insn_code != CODE_FOR_nothing)
2070 rtx product = NULL_RTX;
2072 if (optab_handler (umul_widen_optab, mode)->insn_code
2073 != CODE_FOR_nothing)
2075 product = expand_doubleword_mult (mode, op0, op1, target,
2078 delete_insns_since (last);
2081 if (product == NULL_RTX
2082 && optab_handler (smul_widen_optab, mode)->insn_code
2083 != CODE_FOR_nothing)
2085 product = expand_doubleword_mult (mode, op0, op1, target,
2088 delete_insns_since (last);
2091 if (product != NULL_RTX)
2093 if (optab_handler (mov_optab, mode)->insn_code != CODE_FOR_nothing)
2095 temp = emit_move_insn (target ? target : product, product);
2096 set_unique_reg_note (temp,
2098 gen_rtx_fmt_ee (MULT, mode,
2106 /* It can't be open-coded in this mode.
2107 Use a library call if one is available and caller says that's ok. */
2109 libfunc = optab_libfunc (binoptab, mode);
2111 && (methods == OPTAB_LIB || methods == OPTAB_LIB_WIDEN))
2115 enum machine_mode op1_mode = mode;
2120 if (shift_optab_p (binoptab))
2122 op1_mode = targetm.libgcc_shift_count_mode ();
2123 /* Specify unsigned here,
2124 since negative shift counts are meaningless. */
2125 op1x = convert_to_mode (op1_mode, op1, 1);
2128 if (GET_MODE (op0) != VOIDmode
2129 && GET_MODE (op0) != mode)
2130 op0 = convert_to_mode (mode, op0, unsignedp);
2132 /* Pass 1 for NO_QUEUE so we don't lose any increments
2133 if the libcall is cse'd or moved. */
2134 value = emit_library_call_value (libfunc,
2135 NULL_RTX, LCT_CONST, mode, 2,
2136 op0, mode, op1x, op1_mode);
2138 insns = get_insns ();
2141 target = gen_reg_rtx (mode);
2142 emit_libcall_block (insns, target, value,
2143 gen_rtx_fmt_ee (binoptab->code, mode, op0, op1));
2148 delete_insns_since (last);
2150 /* It can't be done in this mode. Can we do it in a wider mode? */
2152 if (! (methods == OPTAB_WIDEN || methods == OPTAB_LIB_WIDEN
2153 || methods == OPTAB_MUST_WIDEN))
2155 /* Caller says, don't even try. */
2156 delete_insns_since (entry_last);
2160 /* Compute the value of METHODS to pass to recursive calls.
2161 Don't allow widening to be tried recursively. */
2163 methods = (methods == OPTAB_LIB_WIDEN ? OPTAB_LIB : OPTAB_DIRECT);
2165 /* Look for a wider mode of the same class for which it appears we can do
2168 if (CLASS_HAS_WIDER_MODES_P (class))
2170 for (wider_mode = GET_MODE_WIDER_MODE (mode);
2171 wider_mode != VOIDmode;
2172 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
2174 if ((optab_handler (binoptab, wider_mode)->insn_code
2175 != CODE_FOR_nothing)
2176 || (methods == OPTAB_LIB
2177 && optab_libfunc (binoptab, wider_mode)))
2179 rtx xop0 = op0, xop1 = op1;
2182 /* For certain integer operations, we need not actually extend
2183 the narrow operands, as long as we will truncate
2184 the results to the same narrowness. */
2186 if ((binoptab == ior_optab || binoptab == and_optab
2187 || binoptab == xor_optab
2188 || binoptab == add_optab || binoptab == sub_optab
2189 || binoptab == smul_optab || binoptab == ashl_optab)
2190 && class == MODE_INT)
2193 xop0 = widen_operand (xop0, wider_mode, mode,
2194 unsignedp, no_extend);
2196 /* The second operand of a shift must always be extended. */
2197 xop1 = widen_operand (xop1, wider_mode, mode, unsignedp,
2198 no_extend && binoptab != ashl_optab);
2200 temp = expand_binop (wider_mode, binoptab, xop0, xop1, NULL_RTX,
2201 unsignedp, methods);
2204 if (class != MODE_INT
2205 || !TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (mode),
2206 GET_MODE_BITSIZE (wider_mode)))
2209 target = gen_reg_rtx (mode);
2210 convert_move (target, temp, 0);
2214 return gen_lowpart (mode, temp);
2217 delete_insns_since (last);
2222 delete_insns_since (entry_last);
2226 /* Expand a binary operator which has both signed and unsigned forms.
2227 UOPTAB is the optab for unsigned operations, and SOPTAB is for
2230 If we widen unsigned operands, we may use a signed wider operation instead
2231 of an unsigned wider operation, since the result would be the same. */
2234 sign_expand_binop (enum machine_mode mode, optab uoptab, optab soptab,
2235 rtx op0, rtx op1, rtx target, int unsignedp,
2236 enum optab_methods methods)
2239 optab direct_optab = unsignedp ? uoptab : soptab;
2240 struct optab wide_soptab;
2242 /* Do it without widening, if possible. */
2243 temp = expand_binop (mode, direct_optab, op0, op1, target,
2244 unsignedp, OPTAB_DIRECT);
2245 if (temp || methods == OPTAB_DIRECT)
2248 /* Try widening to a signed int. Make a fake signed optab that
2249 hides any signed insn for direct use. */
2250 wide_soptab = *soptab;
2251 optab_handler (&wide_soptab, mode)->insn_code = CODE_FOR_nothing;
2253 temp = expand_binop (mode, &wide_soptab, op0, op1, target,
2254 unsignedp, OPTAB_WIDEN);
2256 /* For unsigned operands, try widening to an unsigned int. */
2257 if (temp == 0 && unsignedp)
2258 temp = expand_binop (mode, uoptab, op0, op1, target,
2259 unsignedp, OPTAB_WIDEN);
2260 if (temp || methods == OPTAB_WIDEN)
2263 /* Use the right width lib call if that exists. */
2264 temp = expand_binop (mode, direct_optab, op0, op1, target, unsignedp, OPTAB_LIB);
2265 if (temp || methods == OPTAB_LIB)
2268 /* Must widen and use a lib call, use either signed or unsigned. */
2269 temp = expand_binop (mode, &wide_soptab, op0, op1, target,
2270 unsignedp, methods);
2274 return expand_binop (mode, uoptab, op0, op1, target,
2275 unsignedp, methods);
2279 /* Generate code to perform an operation specified by UNOPPTAB
2280 on operand OP0, with two results to TARG0 and TARG1.
2281 We assume that the order of the operands for the instruction
2282 is TARG0, TARG1, OP0.
2284 Either TARG0 or TARG1 may be zero, but what that means is that
2285 the result is not actually wanted. We will generate it into
2286 a dummy pseudo-reg and discard it. They may not both be zero.
2288 Returns 1 if this operation can be performed; 0 if not. */
2291 expand_twoval_unop (optab unoptab, rtx op0, rtx targ0, rtx targ1,
2294 enum machine_mode mode = GET_MODE (targ0 ? targ0 : targ1);
2295 enum mode_class class;
2296 enum machine_mode wider_mode;
2297 rtx entry_last = get_last_insn ();
2300 class = GET_MODE_CLASS (mode);
2303 targ0 = gen_reg_rtx (mode);
2305 targ1 = gen_reg_rtx (mode);
2307 /* Record where to go back to if we fail. */
2308 last = get_last_insn ();
2310 if (optab_handler (unoptab, mode)->insn_code != CODE_FOR_nothing)
2312 int icode = (int) optab_handler (unoptab, mode)->insn_code;
2313 enum machine_mode mode0 = insn_data[icode].operand[2].mode;
2317 if (GET_MODE (xop0) != VOIDmode
2318 && GET_MODE (xop0) != mode0)
2319 xop0 = convert_to_mode (mode0, xop0, unsignedp);
2321 /* Now, if insn doesn't accept these operands, put them into pseudos. */
2322 if (!insn_data[icode].operand[2].predicate (xop0, mode0))
2323 xop0 = copy_to_mode_reg (mode0, xop0);
2325 /* We could handle this, but we should always be called with a pseudo
2326 for our targets and all insns should take them as outputs. */
2327 gcc_assert (insn_data[icode].operand[0].predicate (targ0, mode));
2328 gcc_assert (insn_data[icode].operand[1].predicate (targ1, mode));
2330 pat = GEN_FCN (icode) (targ0, targ1, xop0);
2337 delete_insns_since (last);
2340 /* It can't be done in this mode. Can we do it in a wider mode? */
2342 if (CLASS_HAS_WIDER_MODES_P (class))
2344 for (wider_mode = GET_MODE_WIDER_MODE (mode);
2345 wider_mode != VOIDmode;
2346 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
2348 if (optab_handler (unoptab, wider_mode)->insn_code
2349 != CODE_FOR_nothing)
2351 rtx t0 = gen_reg_rtx (wider_mode);
2352 rtx t1 = gen_reg_rtx (wider_mode);
2353 rtx cop0 = convert_modes (wider_mode, mode, op0, unsignedp);
2355 if (expand_twoval_unop (unoptab, cop0, t0, t1, unsignedp))
2357 convert_move (targ0, t0, unsignedp);
2358 convert_move (targ1, t1, unsignedp);
2362 delete_insns_since (last);
2367 delete_insns_since (entry_last);
2371 /* Generate code to perform an operation specified by BINOPTAB
2372 on operands OP0 and OP1, with two results to TARG1 and TARG2.
2373 We assume that the order of the operands for the instruction
2374 is TARG0, OP0, OP1, TARG1, which would fit a pattern like
2375 [(set TARG0 (operate OP0 OP1)) (set TARG1 (operate ...))].
2377 Either TARG0 or TARG1 may be zero, but what that means is that
2378 the result is not actually wanted. We will generate it into
2379 a dummy pseudo-reg and discard it. They may not both be zero.
2381 Returns 1 if this operation can be performed; 0 if not. */
2384 expand_twoval_binop (optab binoptab, rtx op0, rtx op1, rtx targ0, rtx targ1,
2387 enum machine_mode mode = GET_MODE (targ0 ? targ0 : targ1);
2388 enum mode_class class;
2389 enum machine_mode wider_mode;
2390 rtx entry_last = get_last_insn ();
2393 class = GET_MODE_CLASS (mode);
2396 targ0 = gen_reg_rtx (mode);
2398 targ1 = gen_reg_rtx (mode);
2400 /* Record where to go back to if we fail. */
2401 last = get_last_insn ();
2403 if (optab_handler (binoptab, mode)->insn_code != CODE_FOR_nothing)
2405 int icode = (int) optab_handler (binoptab, mode)->insn_code;
2406 enum machine_mode mode0 = insn_data[icode].operand[1].mode;
2407 enum machine_mode mode1 = insn_data[icode].operand[2].mode;
2409 rtx xop0 = op0, xop1 = op1;
2411 /* If we are optimizing, force expensive constants into a register. */
2412 xop0 = avoid_expensive_constant (mode0, binoptab, xop0, unsignedp);
2413 xop1 = avoid_expensive_constant (mode1, binoptab, xop1, unsignedp);
2415 /* In case the insn wants input operands in modes different from
2416 those of the actual operands, convert the operands. It would
2417 seem that we don't need to convert CONST_INTs, but we do, so
2418 that they're properly zero-extended, sign-extended or truncated
2421 if (GET_MODE (op0) != mode0 && mode0 != VOIDmode)
2422 xop0 = convert_modes (mode0,
2423 GET_MODE (op0) != VOIDmode
2428 if (GET_MODE (op1) != mode1 && mode1 != VOIDmode)
2429 xop1 = convert_modes (mode1,
2430 GET_MODE (op1) != VOIDmode
2435 /* Now, if insn doesn't accept these operands, put them into pseudos. */
2436 if (!insn_data[icode].operand[1].predicate (xop0, mode0))
2437 xop0 = copy_to_mode_reg (mode0, xop0);
2439 if (!insn_data[icode].operand[2].predicate (xop1, mode1))
2440 xop1 = copy_to_mode_reg (mode1, xop1);
2442 /* We could handle this, but we should always be called with a pseudo
2443 for our targets and all insns should take them as outputs. */
2444 gcc_assert (insn_data[icode].operand[0].predicate (targ0, mode));
2445 gcc_assert (insn_data[icode].operand[3].predicate (targ1, mode));
2447 pat = GEN_FCN (icode) (targ0, xop0, xop1, targ1);
2454 delete_insns_since (last);
2457 /* It can't be done in this mode. Can we do it in a wider mode? */
2459 if (CLASS_HAS_WIDER_MODES_P (class))
2461 for (wider_mode = GET_MODE_WIDER_MODE (mode);
2462 wider_mode != VOIDmode;
2463 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
2465 if (optab_handler (binoptab, wider_mode)->insn_code
2466 != CODE_FOR_nothing)
2468 rtx t0 = gen_reg_rtx (wider_mode);
2469 rtx t1 = gen_reg_rtx (wider_mode);
2470 rtx cop0 = convert_modes (wider_mode, mode, op0, unsignedp);
2471 rtx cop1 = convert_modes (wider_mode, mode, op1, unsignedp);
2473 if (expand_twoval_binop (binoptab, cop0, cop1,
2476 convert_move (targ0, t0, unsignedp);
2477 convert_move (targ1, t1, unsignedp);
2481 delete_insns_since (last);
2486 delete_insns_since (entry_last);
2490 /* Expand the two-valued library call indicated by BINOPTAB, but
2491 preserve only one of the values. If TARG0 is non-NULL, the first
2492 value is placed into TARG0; otherwise the second value is placed
2493 into TARG1. Exactly one of TARG0 and TARG1 must be non-NULL. The
2494 value stored into TARG0 or TARG1 is equivalent to (CODE OP0 OP1).
2495 This routine assumes that the value returned by the library call is
2496 as if the return value was of an integral mode twice as wide as the
2497 mode of OP0. Returns 1 if the call was successful. */
2500 expand_twoval_binop_libfunc (optab binoptab, rtx op0, rtx op1,
2501 rtx targ0, rtx targ1, enum rtx_code code)
2503 enum machine_mode mode;
2504 enum machine_mode libval_mode;
2509 /* Exactly one of TARG0 or TARG1 should be non-NULL. */
2510 gcc_assert (!targ0 != !targ1);
2512 mode = GET_MODE (op0);
2513 libfunc = optab_libfunc (binoptab, mode);
2517 /* The value returned by the library function will have twice as
2518 many bits as the nominal MODE. */
2519 libval_mode = smallest_mode_for_size (2 * GET_MODE_BITSIZE (mode),
2522 libval = emit_library_call_value (libfunc, NULL_RTX, LCT_CONST,
2526 /* Get the part of VAL containing the value that we want. */
2527 libval = simplify_gen_subreg (mode, libval, libval_mode,
2528 targ0 ? 0 : GET_MODE_SIZE (mode));
2529 insns = get_insns ();
2531 /* Move the into the desired location. */
2532 emit_libcall_block (insns, targ0 ? targ0 : targ1, libval,
2533 gen_rtx_fmt_ee (code, mode, op0, op1));
2539 /* Wrapper around expand_unop which takes an rtx code to specify
2540 the operation to perform, not an optab pointer. All other
2541 arguments are the same. */
2543 expand_simple_unop (enum machine_mode mode, enum rtx_code code, rtx op0,
2544 rtx target, int unsignedp)
2546 optab unop = code_to_optab[(int) code];
2549 return expand_unop (mode, unop, op0, target, unsignedp);
2555 (clz:wide (zero_extend:wide x)) - ((width wide) - (width narrow)). */
2557 widen_clz (enum machine_mode mode, rtx op0, rtx target)
2559 enum mode_class class = GET_MODE_CLASS (mode);
2560 if (CLASS_HAS_WIDER_MODES_P (class))
2562 enum machine_mode wider_mode;
2563 for (wider_mode = GET_MODE_WIDER_MODE (mode);
2564 wider_mode != VOIDmode;
2565 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
2567 if (optab_handler (clz_optab, wider_mode)->insn_code
2568 != CODE_FOR_nothing)
2570 rtx xop0, temp, last;
2572 last = get_last_insn ();
2575 target = gen_reg_rtx (mode);
2576 xop0 = widen_operand (op0, wider_mode, mode, true, false);
2577 temp = expand_unop (wider_mode, clz_optab, xop0, NULL_RTX, true);
2579 temp = expand_binop (wider_mode, sub_optab, temp,
2580 GEN_INT (GET_MODE_BITSIZE (wider_mode)
2581 - GET_MODE_BITSIZE (mode)),
2582 target, true, OPTAB_DIRECT);
2584 delete_insns_since (last);
2593 /* Try calculating clz of a double-word quantity as two clz's of word-sized
2594 quantities, choosing which based on whether the high word is nonzero. */
2596 expand_doubleword_clz (enum machine_mode mode, rtx op0, rtx target)
2598 rtx xop0 = force_reg (mode, op0);
2599 rtx subhi = gen_highpart (word_mode, xop0);
2600 rtx sublo = gen_lowpart (word_mode, xop0);
2601 rtx hi0_label = gen_label_rtx ();
2602 rtx after_label = gen_label_rtx ();
2603 rtx seq, temp, result;
2605 /* If we were not given a target, use a word_mode register, not a
2606 'mode' register. The result will fit, and nobody is expecting
2607 anything bigger (the return type of __builtin_clz* is int). */
2609 target = gen_reg_rtx (word_mode);
2611 /* In any case, write to a word_mode scratch in both branches of the
2612 conditional, so we can ensure there is a single move insn setting
2613 'target' to tag a REG_EQUAL note on. */
2614 result = gen_reg_rtx (word_mode);
2618 /* If the high word is not equal to zero,
2619 then clz of the full value is clz of the high word. */
2620 emit_cmp_and_jump_insns (subhi, CONST0_RTX (word_mode), EQ, 0,
2621 word_mode, true, hi0_label);
2623 temp = expand_unop_direct (word_mode, clz_optab, subhi, result, true);
2628 convert_move (result, temp, true);
2630 emit_jump_insn (gen_jump (after_label));
2633 /* Else clz of the full value is clz of the low word plus the number
2634 of bits in the high word. */
2635 emit_label (hi0_label);
2637 temp = expand_unop_direct (word_mode, clz_optab, sublo, 0, true);
2640 temp = expand_binop (word_mode, add_optab, temp,
2641 GEN_INT (GET_MODE_BITSIZE (word_mode)),
2642 result, true, OPTAB_DIRECT);
2646 convert_move (result, temp, true);
2648 emit_label (after_label);
2649 convert_move (target, result, true);
2654 add_equal_note (seq, target, CLZ, xop0, 0);
2666 (lshiftrt:wide (bswap:wide x) ((width wide) - (width narrow))). */
2668 widen_bswap (enum machine_mode mode, rtx op0, rtx target)
2670 enum mode_class class = GET_MODE_CLASS (mode);
2671 enum machine_mode wider_mode;
2674 if (!CLASS_HAS_WIDER_MODES_P (class))
2677 for (wider_mode = GET_MODE_WIDER_MODE (mode);
2678 wider_mode != VOIDmode;
2679 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
2680 if (optab_handler (bswap_optab, wider_mode)->insn_code != CODE_FOR_nothing)
2685 last = get_last_insn ();
2687 x = widen_operand (op0, wider_mode, mode, true, true);
2688 x = expand_unop (wider_mode, bswap_optab, x, NULL_RTX, true);
2691 x = expand_shift (RSHIFT_EXPR, wider_mode, x,
2692 size_int (GET_MODE_BITSIZE (wider_mode)
2693 - GET_MODE_BITSIZE (mode)),
2699 target = gen_reg_rtx (mode);
2700 emit_move_insn (target, gen_lowpart (mode, x));
2703 delete_insns_since (last);
2708 /* Try calculating bswap as two bswaps of two word-sized operands. */
2711 expand_doubleword_bswap (enum machine_mode mode, rtx op, rtx target)
2715 t1 = expand_unop (word_mode, bswap_optab,
2716 operand_subword_force (op, 0, mode), NULL_RTX, true);
2717 t0 = expand_unop (word_mode, bswap_optab,
2718 operand_subword_force (op, 1, mode), NULL_RTX, true);
2721 target = gen_reg_rtx (mode);
2723 emit_insn (gen_rtx_CLOBBER (VOIDmode, target));
2724 emit_move_insn (operand_subword (target, 0, 1, mode), t0);
2725 emit_move_insn (operand_subword (target, 1, 1, mode), t1);
2730 /* Try calculating (parity x) as (and (popcount x) 1), where
2731 popcount can also be done in a wider mode. */
2733 expand_parity (enum machine_mode mode, rtx op0, rtx target)
2735 enum mode_class class = GET_MODE_CLASS (mode);
2736 if (CLASS_HAS_WIDER_MODES_P (class))
2738 enum machine_mode wider_mode;
2739 for (wider_mode = mode; wider_mode != VOIDmode;
2740 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
2742 if (optab_handler (popcount_optab, wider_mode)->insn_code
2743 != CODE_FOR_nothing)
2745 rtx xop0, temp, last;
2747 last = get_last_insn ();
2750 target = gen_reg_rtx (mode);
2751 xop0 = widen_operand (op0, wider_mode, mode, true, false);
2752 temp = expand_unop (wider_mode, popcount_optab, xop0, NULL_RTX,
2755 temp = expand_binop (wider_mode, and_optab, temp, const1_rtx,
2756 target, true, OPTAB_DIRECT);
2758 delete_insns_since (last);
2767 /* Try calculating ctz(x) as K - clz(x & -x) ,
2768 where K is GET_MODE_BITSIZE(mode) - 1.
2770 Both __builtin_ctz and __builtin_clz are undefined at zero, so we
2771 don't have to worry about what the hardware does in that case. (If
2772 the clz instruction produces the usual value at 0, which is K, the
2773 result of this code sequence will be -1; expand_ffs, below, relies
2774 on this. It might be nice to have it be K instead, for consistency
2775 with the (very few) processors that provide a ctz with a defined
2776 value, but that would take one more instruction, and it would be
2777 less convenient for expand_ffs anyway. */
2780 expand_ctz (enum machine_mode mode, rtx op0, rtx target)
2784 if (optab_handler (clz_optab, mode)->insn_code == CODE_FOR_nothing)
2789 temp = expand_unop_direct (mode, neg_optab, op0, NULL_RTX, true);
2791 temp = expand_binop (mode, and_optab, op0, temp, NULL_RTX,
2792 true, OPTAB_DIRECT);
2794 temp = expand_unop_direct (mode, clz_optab, temp, NULL_RTX, true);
2796 temp = expand_binop (mode, sub_optab, GEN_INT (GET_MODE_BITSIZE (mode) - 1),
2798 true, OPTAB_DIRECT);
2808 add_equal_note (seq, temp, CTZ, op0, 0);
2814 /* Try calculating ffs(x) using ctz(x) if we have that instruction, or
2815 else with the sequence used by expand_clz.
2817 The ffs builtin promises to return zero for a zero value and ctz/clz
2818 may have an undefined value in that case. If they do not give us a
2819 convenient value, we have to generate a test and branch. */
2821 expand_ffs (enum machine_mode mode, rtx op0, rtx target)
2823 HOST_WIDE_INT val = 0;
2824 bool defined_at_zero = false;
2827 if (optab_handler (ctz_optab, mode)->insn_code != CODE_FOR_nothing)
2831 temp = expand_unop_direct (mode, ctz_optab, op0, 0, true);
2835 defined_at_zero = (CTZ_DEFINED_VALUE_AT_ZERO (mode, val) == 2);
2837 else if (optab_handler (clz_optab, mode)->insn_code != CODE_FOR_nothing)
2840 temp = expand_ctz (mode, op0, 0);
2844 if (CLZ_DEFINED_VALUE_AT_ZERO (mode, val) == 2)
2846 defined_at_zero = true;
2847 val = (GET_MODE_BITSIZE (mode) - 1) - val;
2853 if (defined_at_zero && val == -1)
2854 /* No correction needed at zero. */;
2857 /* We don't try to do anything clever with the situation found
2858 on some processors (eg Alpha) where ctz(0:mode) ==
2859 bitsize(mode). If someone can think of a way to send N to -1
2860 and leave alone all values in the range 0..N-1 (where N is a
2861 power of two), cheaper than this test-and-branch, please add it.
2863 The test-and-branch is done after the operation itself, in case
2864 the operation sets condition codes that can be recycled for this.
2865 (This is true on i386, for instance.) */
2867 rtx nonzero_label = gen_label_rtx ();
2868 emit_cmp_and_jump_insns (op0, CONST0_RTX (mode), NE, 0,
2869 mode, true, nonzero_label);
2871 convert_move (temp, GEN_INT (-1), false);
2872 emit_label (nonzero_label);
2875 /* temp now has a value in the range -1..bitsize-1. ffs is supposed
2876 to produce a value in the range 0..bitsize. */
2877 temp = expand_binop (mode, add_optab, temp, GEN_INT (1),
2878 target, false, OPTAB_DIRECT);
2885 add_equal_note (seq, temp, FFS, op0, 0);
2894 /* Extract the OMODE lowpart from VAL, which has IMODE. Under certain
2895 conditions, VAL may already be a SUBREG against which we cannot generate
2896 a further SUBREG. In this case, we expect forcing the value into a
2897 register will work around the situation. */
2900 lowpart_subreg_maybe_copy (enum machine_mode omode, rtx val,
2901 enum machine_mode imode)
2904 ret = lowpart_subreg (omode, val, imode);
2907 val = force_reg (imode, val);
2908 ret = lowpart_subreg (omode, val, imode);
2909 gcc_assert (ret != NULL);
2914 /* Expand a floating point absolute value or negation operation via a
2915 logical operation on the sign bit. */
2918 expand_absneg_bit (enum rtx_code code, enum machine_mode mode,
2919 rtx op0, rtx target)
2921 const struct real_format *fmt;
2922 int bitpos, word, nwords, i;
2923 enum machine_mode imode;
2924 HOST_WIDE_INT hi, lo;
2927 /* The format has to have a simple sign bit. */
2928 fmt = REAL_MODE_FORMAT (mode);
2932 bitpos = fmt->signbit_rw;
2936 /* Don't create negative zeros if the format doesn't support them. */
2937 if (code == NEG && !fmt->has_signed_zero)
2940 if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD)
2942 imode = int_mode_for_mode (mode);
2943 if (imode == BLKmode)
2952 if (FLOAT_WORDS_BIG_ENDIAN)
2953 word = (GET_MODE_BITSIZE (mode) - bitpos) / BITS_PER_WORD;
2955 word = bitpos / BITS_PER_WORD;
2956 bitpos = bitpos % BITS_PER_WORD;
2957 nwords = (GET_MODE_BITSIZE (mode) + BITS_PER_WORD - 1) / BITS_PER_WORD;
2960 if (bitpos < HOST_BITS_PER_WIDE_INT)
2963 lo = (HOST_WIDE_INT) 1 << bitpos;
2967 hi = (HOST_WIDE_INT) 1 << (bitpos - HOST_BITS_PER_WIDE_INT);
2973 if (target == 0 || target == op0)
2974 target = gen_reg_rtx (mode);
2980 for (i = 0; i < nwords; ++i)
2982 rtx targ_piece = operand_subword (target, i, 1, mode);
2983 rtx op0_piece = operand_subword_force (op0, i, mode);
2987 temp = expand_binop (imode, code == ABS ? and_optab : xor_optab,
2989 immed_double_const (lo, hi, imode),
2990 targ_piece, 1, OPTAB_LIB_WIDEN);
2991 if (temp != targ_piece)
2992 emit_move_insn (targ_piece, temp);
2995 emit_move_insn (targ_piece, op0_piece);
2998 insns = get_insns ();
3001 temp = gen_rtx_fmt_e (code, mode, copy_rtx (op0));
3002 emit_no_conflict_block (insns, target, op0, NULL_RTX, temp);
3006 temp = expand_binop (imode, code == ABS ? and_optab : xor_optab,
3007 gen_lowpart (imode, op0),
3008 immed_double_const (lo, hi, imode),
3009 gen_lowpart (imode, target), 1, OPTAB_LIB_WIDEN);
3010 target = lowpart_subreg_maybe_copy (mode, temp, imode);
3012 set_unique_reg_note (get_last_insn (), REG_EQUAL,
3013 gen_rtx_fmt_e (code, mode, copy_rtx (op0)));
3019 /* As expand_unop, but will fail rather than attempt the operation in a
3020 different mode or with a libcall. */
3022 expand_unop_direct (enum machine_mode mode, optab unoptab, rtx op0, rtx target,
3025 if (optab_handler (unoptab, mode)->insn_code != CODE_FOR_nothing)
3027 int icode = (int) optab_handler (unoptab, mode)->insn_code;
3028 enum machine_mode mode0 = insn_data[icode].operand[1].mode;
3030 rtx last = get_last_insn ();
3036 temp = gen_reg_rtx (mode);
3038 if (GET_MODE (xop0) != VOIDmode
3039 && GET_MODE (xop0) != mode0)
3040 xop0 = convert_to_mode (mode0, xop0, unsignedp);
3042 /* Now, if insn doesn't accept our operand, put it into a pseudo. */
3044 if (!insn_data[icode].operand[1].predicate (xop0, mode0))
3045 xop0 = copy_to_mode_reg (mode0, xop0);
3047 if (!insn_data[icode].operand[0].predicate (temp, mode))
3048 temp = gen_reg_rtx (mode);
3050 pat = GEN_FCN (icode) (temp, xop0);
3053 if (INSN_P (pat) && NEXT_INSN (pat) != NULL_RTX
3054 && ! add_equal_note (pat, temp, unoptab->code, xop0, NULL_RTX))
3056 delete_insns_since (last);
3057 return expand_unop (mode, unoptab, op0, NULL_RTX, unsignedp);
3065 delete_insns_since (last);
3070 /* Generate code to perform an operation specified by UNOPTAB
3071 on operand OP0, with result having machine-mode MODE.
3073 UNSIGNEDP is for the case where we have to widen the operands
3074 to perform the operation. It says to use zero-extension.
3076 If TARGET is nonzero, the value
3077 is generated there, if it is convenient to do so.
3078 In all cases an rtx is returned for the locus of the value;
3079 this may or may not be TARGET. */
3082 expand_unop (enum machine_mode mode, optab unoptab, rtx op0, rtx target,
3085 enum mode_class class = GET_MODE_CLASS (mode);
3086 enum machine_mode wider_mode;
3090 temp = expand_unop_direct (mode, unoptab, op0, target, unsignedp);
3094 /* It can't be done in this mode. Can we open-code it in a wider mode? */
3096 /* Widening (or narrowing) clz needs special treatment. */
3097 if (unoptab == clz_optab)
3099 temp = widen_clz (mode, op0, target);
3103 if (GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
3104 && optab_handler (unoptab, word_mode)->insn_code != CODE_FOR_nothing)
3106 temp = expand_doubleword_clz (mode, op0, target);
3114 /* Widening (or narrowing) bswap needs special treatment. */
3115 if (unoptab == bswap_optab)
3117 temp = widen_bswap (mode, op0, target);
3121 if (GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
3122 && optab_handler (unoptab, word_mode)->insn_code != CODE_FOR_nothing)
3124 temp = expand_doubleword_bswap (mode, op0, target);
3132 if (CLASS_HAS_WIDER_MODES_P (class))
3133 for (wider_mode = GET_MODE_WIDER_MODE (mode);
3134 wider_mode != VOIDmode;
3135 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
3137 if (optab_handler (unoptab, wider_mode)->insn_code != CODE_FOR_nothing)
3140 rtx last = get_last_insn ();
3142 /* For certain operations, we need not actually extend
3143 the narrow operand, as long as we will truncate the
3144 results to the same narrowness. */
3146 xop0 = widen_operand (xop0, wider_mode, mode, unsignedp,
3147 (unoptab == neg_optab
3148 || unoptab == one_cmpl_optab)
3149 && class == MODE_INT);
3151 temp = expand_unop (wider_mode, unoptab, xop0, NULL_RTX,
3156 if (class != MODE_INT
3157 || !TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (mode),
3158 GET_MODE_BITSIZE (wider_mode)))
3161 target = gen_reg_rtx (mode);
3162 convert_move (target, temp, 0);
3166 return gen_lowpart (mode, temp);
3169 delete_insns_since (last);
3173 /* These can be done a word at a time. */
3174 if (unoptab == one_cmpl_optab
3175 && class == MODE_INT
3176 && GET_MODE_SIZE (mode) > UNITS_PER_WORD
3177 && optab_handler (unoptab, word_mode)->insn_code != CODE_FOR_nothing)
3182 if (target == 0 || target == op0)
3183 target = gen_reg_rtx (mode);
3187 /* Do the actual arithmetic. */
3188 for (i = 0; i < GET_MODE_BITSIZE (mode) / BITS_PER_WORD; i++)
3190 rtx target_piece = operand_subword (target, i, 1, mode);
3191 rtx x = expand_unop (word_mode, unoptab,
3192 operand_subword_force (op0, i, mode),
3193 target_piece, unsignedp);
3195 if (target_piece != x)
3196 emit_move_insn (target_piece, x);
3199 insns = get_insns ();
3202 emit_no_conflict_block (insns, target, op0, NULL_RTX,
3203 gen_rtx_fmt_e (unoptab->code, mode,
3208 if (unoptab->code == NEG)
3210 /* Try negating floating point values by flipping the sign bit. */
3211 if (SCALAR_FLOAT_MODE_P (mode))
3213 temp = expand_absneg_bit (NEG, mode, op0, target);
3218 /* If there is no negation pattern, and we have no negative zero,
3219 try subtracting from zero. */
3220 if (!HONOR_SIGNED_ZEROS (mode))
3222 temp = expand_binop (mode, (unoptab == negv_optab
3223 ? subv_optab : sub_optab),
3224 CONST0_RTX (mode), op0, target,
3225 unsignedp, OPTAB_DIRECT);
3231 /* Try calculating parity (x) as popcount (x) % 2. */
3232 if (unoptab == parity_optab)
3234 temp = expand_parity (mode, op0, target);
3239 /* Try implementing ffs (x) in terms of clz (x). */
3240 if (unoptab == ffs_optab)
3242 temp = expand_ffs (mode, op0, target);
3247 /* Try implementing ctz (x) in terms of clz (x). */
3248 if (unoptab == ctz_optab)
3250 temp = expand_ctz (mode, op0, target);
3256 /* Now try a library call in this mode. */
3257 libfunc = optab_libfunc (unoptab, mode);
3262 enum machine_mode outmode = mode;
3264 /* All of these functions return small values. Thus we choose to
3265 have them return something that isn't a double-word. */
3266 if (unoptab == ffs_optab || unoptab == clz_optab || unoptab == ctz_optab
3267 || unoptab == popcount_optab || unoptab == parity_optab)
3269 = GET_MODE (hard_libcall_value (TYPE_MODE (integer_type_node)));
3273 /* Pass 1 for NO_QUEUE so we don't lose any increments
3274 if the libcall is cse'd or moved. */
3275 value = emit_library_call_value (libfunc, NULL_RTX, LCT_CONST, outmode,
3277 insns = get_insns ();
3280 target = gen_reg_rtx (outmode);
3281 emit_libcall_block (insns, target, value,
3282 gen_rtx_fmt_e (unoptab->code, outmode, op0));
3287 /* It can't be done in this mode. Can we do it in a wider mode? */
3289 if (CLASS_HAS_WIDER_MODES_P (class))
3291 for (wider_mode = GET_MODE_WIDER_MODE (mode);
3292 wider_mode != VOIDmode;
3293 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
3295 if ((optab_handler (unoptab, wider_mode)->insn_code
3296 != CODE_FOR_nothing)
3297 || optab_libfunc (unoptab, wider_mode))
3300 rtx last = get_last_insn ();
3302 /* For certain operations, we need not actually extend
3303 the narrow operand, as long as we will truncate the
3304 results to the same narrowness. */
3306 xop0 = widen_operand (xop0, wider_mode, mode, unsignedp,
3307 (unoptab == neg_optab
3308 || unoptab == one_cmpl_optab)
3309 && class == MODE_INT);
3311 temp = expand_unop (wider_mode, unoptab, xop0, NULL_RTX,
3314 /* If we are generating clz using wider mode, adjust the
3316 if (unoptab == clz_optab && temp != 0)
3317 temp = expand_binop (wider_mode, sub_optab, temp,
3318 GEN_INT (GET_MODE_BITSIZE (wider_mode)
3319 - GET_MODE_BITSIZE (mode)),
3320 target, true, OPTAB_DIRECT);
3324 if (class != MODE_INT)
3327 target = gen_reg_rtx (mode);
3328 convert_move (target, temp, 0);
3332 return gen_lowpart (mode, temp);
3335 delete_insns_since (last);
3340 /* One final attempt at implementing negation via subtraction,
3341 this time allowing widening of the operand. */
3342 if (unoptab->code == NEG && !HONOR_SIGNED_ZEROS (mode))
3345 temp = expand_binop (mode,
3346 unoptab == negv_optab ? subv_optab : sub_optab,
3347 CONST0_RTX (mode), op0,
3348 target, unsignedp, OPTAB_LIB_WIDEN);
3356 /* Emit code to compute the absolute value of OP0, with result to
3357 TARGET if convenient. (TARGET may be 0.) The return value says
3358 where the result actually is to be found.
3360 MODE is the mode of the operand; the mode of the result is
3361 different but can be deduced from MODE.
3366 expand_abs_nojump (enum machine_mode mode, rtx op0, rtx target,
3367 int result_unsignedp)
3372 result_unsignedp = 1;
3374 /* First try to do it with a special abs instruction. */
3375 temp = expand_unop (mode, result_unsignedp ? abs_optab : absv_optab,
3380 /* For floating point modes, try clearing the sign bit. */
3381 if (SCALAR_FLOAT_MODE_P (mode))
3383 temp = expand_absneg_bit (ABS, mode, op0, target);
3388 /* If we have a MAX insn, we can do this as MAX (x, -x). */
3389 if (optab_handler (smax_optab, mode)->insn_code != CODE_FOR_nothing
3390 && !HONOR_SIGNED_ZEROS (mode))
3392 rtx last = get_last_insn ();
3394 temp = expand_unop (mode, neg_optab, op0, NULL_RTX, 0);
3396 temp = expand_binop (mode, smax_optab, op0, temp, target, 0,
3402 delete_insns_since (last);
3405 /* If this machine has expensive jumps, we can do integer absolute
3406 value of X as (((signed) x >> (W-1)) ^ x) - ((signed) x >> (W-1)),
3407 where W is the width of MODE. */
3409 if (GET_MODE_CLASS (mode) == MODE_INT && BRANCH_COST >= 2)
3411 rtx extended = expand_shift (RSHIFT_EXPR, mode, op0,
3412 size_int (GET_MODE_BITSIZE (mode) - 1),
3415 temp = expand_binop (mode, xor_optab, extended, op0, target, 0,
3418 temp = expand_binop (mode, result_unsignedp ? sub_optab : subv_optab,
3419 temp, extended, target, 0, OPTAB_LIB_WIDEN);
3429 expand_abs (enum machine_mode mode, rtx op0, rtx target,
3430 int result_unsignedp, int safe)
3435 result_unsignedp = 1;
3437 temp = expand_abs_nojump (mode, op0, target, result_unsignedp);
3441 /* If that does not win, use conditional jump and negate. */
3443 /* It is safe to use the target if it is the same
3444 as the source if this is also a pseudo register */
3445 if (op0 == target && REG_P (op0)
3446 && REGNO (op0) >= FIRST_PSEUDO_REGISTER)
3449 op1 = gen_label_rtx ();
3450 if (target == 0 || ! safe
3451 || GET_MODE (target) != mode
3452 || (MEM_P (target) && MEM_VOLATILE_P (target))
3454 && REGNO (target) < FIRST_PSEUDO_REGISTER))
3455 target = gen_reg_rtx (mode);
3457 emit_move_insn (target, op0);
3460 do_compare_rtx_and_jump (target, CONST0_RTX (mode), GE, 0, mode,
3461 NULL_RTX, NULL_RTX, op1);
3463 op0 = expand_unop (mode, result_unsignedp ? neg_optab : negv_optab,
3466 emit_move_insn (target, op0);
3472 /* A subroutine of expand_copysign, perform the copysign operation using the
3473 abs and neg primitives advertised to exist on the target. The assumption
3474 is that we have a split register file, and leaving op0 in fp registers,
3475 and not playing with subregs so much, will help the register allocator. */
3478 expand_copysign_absneg (enum machine_mode mode, rtx op0, rtx op1, rtx target,
3479 int bitpos, bool op0_is_abs)
3481 enum machine_mode imode;
3488 /* Check if the back end provides an insn that handles signbit for the
3490 icode = (int) signbit_optab->handlers [(int) mode].insn_code;
3491 if (icode != CODE_FOR_nothing)
3493 imode = insn_data[icode].operand[0].mode;
3494 sign = gen_reg_rtx (imode);
3495 emit_unop_insn (icode, sign, op1, UNKNOWN);
3499 HOST_WIDE_INT hi, lo;
3501 if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD)
3503 imode = int_mode_for_mode (mode);
3504 if (imode == BLKmode)
3506 op1 = gen_lowpart (imode, op1);
3513 if (FLOAT_WORDS_BIG_ENDIAN)
3514 word = (GET_MODE_BITSIZE (mode) - bitpos) / BITS_PER_WORD;
3516 word = bitpos / BITS_PER_WORD;
3517 bitpos = bitpos % BITS_PER_WORD;
3518 op1 = operand_subword_force (op1, word, mode);
3521 if (bitpos < HOST_BITS_PER_WIDE_INT)
3524 lo = (HOST_WIDE_INT) 1 << bitpos;
3528 hi = (HOST_WIDE_INT) 1 << (bitpos - HOST_BITS_PER_WIDE_INT);
3532 sign = gen_reg_rtx (imode);
3533 sign = expand_binop (imode, and_optab, op1,
3534 immed_double_const (lo, hi, imode),
3535 NULL_RTX, 1, OPTAB_LIB_WIDEN);
3540 op0 = expand_unop (mode, abs_optab, op0, target, 0);
3547 if (target == NULL_RTX)
3548 target = copy_to_reg (op0);
3550 emit_move_insn (target, op0);
3553 label = gen_label_rtx ();
3554 emit_cmp_and_jump_insns (sign, const0_rtx, EQ, NULL_RTX, imode, 1, label);
3556 if (GET_CODE (op0) == CONST_DOUBLE)
3557 op0 = simplify_unary_operation (NEG, mode, op0, mode);
3559 op0 = expand_unop (mode, neg_optab, op0, target, 0);
3561 emit_move_insn (target, op0);
3569 /* A subroutine of expand_copysign, perform the entire copysign operation
3570 with integer bitmasks. BITPOS is the position of the sign bit; OP0_IS_ABS
3571 is true if op0 is known to have its sign bit clear. */
3574 expand_copysign_bit (enum machine_mode mode, rtx op0, rtx op1, rtx target,
3575 int bitpos, bool op0_is_abs)
3577 enum machine_mode imode;
3578 HOST_WIDE_INT hi, lo;
3579 int word, nwords, i;
3582 if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD)
3584 imode = int_mode_for_mode (mode);
3585 if (imode == BLKmode)
3594 if (FLOAT_WORDS_BIG_ENDIAN)
3595 word = (GET_MODE_BITSIZE (mode) - bitpos) / BITS_PER_WORD;
3597 word = bitpos / BITS_PER_WORD;
3598 bitpos = bitpos % BITS_PER_WORD;
3599 nwords = (GET_MODE_BITSIZE (mode) + BITS_PER_WORD - 1) / BITS_PER_WORD;
3602 if (bitpos < HOST_BITS_PER_WIDE_INT)
3605 lo = (HOST_WIDE_INT) 1 << bitpos;
3609 hi = (HOST_WIDE_INT) 1 << (bitpos - HOST_BITS_PER_WIDE_INT);
3613 if (target == 0 || target == op0 || target == op1)
3614 target = gen_reg_rtx (mode);
3620 for (i = 0; i < nwords; ++i)
3622 rtx targ_piece = operand_subword (target, i, 1, mode);
3623 rtx op0_piece = operand_subword_force (op0, i, mode);
3628 op0_piece = expand_binop (imode, and_optab, op0_piece,
3629 immed_double_const (~lo, ~hi, imode),
3630 NULL_RTX, 1, OPTAB_LIB_WIDEN);
3632 op1 = expand_binop (imode, and_optab,
3633 operand_subword_force (op1, i, mode),
3634 immed_double_const (lo, hi, imode),
3635 NULL_RTX, 1, OPTAB_LIB_WIDEN);
3637 temp = expand_binop (imode, ior_optab, op0_piece, op1,
3638 targ_piece, 1, OPTAB_LIB_WIDEN);
3639 if (temp != targ_piece)
3640 emit_move_insn (targ_piece, temp);
3643 emit_move_insn (targ_piece, op0_piece);
3646 insns = get_insns ();
3649 emit_no_conflict_block (insns, target, op0, op1, NULL_RTX);
3653 op1 = expand_binop (imode, and_optab, gen_lowpart (imode, op1),
3654 immed_double_const (lo, hi, imode),
3655 NULL_RTX, 1, OPTAB_LIB_WIDEN);
3657 op0 = gen_lowpart (imode, op0);
3659 op0 = expand_binop (imode, and_optab, op0,
3660 immed_double_const (~lo, ~hi, imode),
3661 NULL_RTX, 1, OPTAB_LIB_WIDEN);
3663 temp = expand_binop (imode, ior_optab, op0, op1,
3664 gen_lowpart (imode, target), 1, OPTAB_LIB_WIDEN);
3665 target = lowpart_subreg_maybe_copy (mode, temp, imode);
3671 /* Expand the C99 copysign operation. OP0 and OP1 must be the same
3672 scalar floating point mode. Return NULL if we do not know how to
3673 expand the operation inline. */
3676 expand_copysign (rtx op0, rtx op1, rtx target)
3678 enum machine_mode mode = GET_MODE (op0);
3679 const struct real_format *fmt;
3683 gcc_assert (SCALAR_FLOAT_MODE_P (mode));
3684 gcc_assert (GET_MODE (op1) == mode);
3686 /* First try to do it with a special instruction. */
3687 temp = expand_binop (mode, copysign_optab, op0, op1,
3688 target, 0, OPTAB_DIRECT);
3692 fmt = REAL_MODE_FORMAT (mode);
3693 if (fmt == NULL || !fmt->has_signed_zero)
3697 if (GET_CODE (op0) == CONST_DOUBLE)
3699 if (real_isneg (CONST_DOUBLE_REAL_VALUE (op0)))
3700 op0 = simplify_unary_operation (ABS, mode, op0, mode);
3704 if (fmt->signbit_ro >= 0
3705 && (GET_CODE (op0) == CONST_DOUBLE
3706 || (optab_handler (neg_optab, mode)->insn_code != CODE_FOR_nothing
3707 && optab_handler (abs_optab, mode)->insn_code != CODE_FOR_nothing)))
3709 temp = expand_copysign_absneg (mode, op0, op1, target,
3710 fmt->signbit_ro, op0_is_abs);
3715 if (fmt->signbit_rw < 0)
3717 return expand_copysign_bit (mode, op0, op1, target,
3718 fmt->signbit_rw, op0_is_abs);
3721 /* Generate an instruction whose insn-code is INSN_CODE,
3722 with two operands: an output TARGET and an input OP0.
3723 TARGET *must* be nonzero, and the output is always stored there.
3724 CODE is an rtx code such that (CODE OP0) is an rtx that describes
3725 the value that is stored into TARGET. */
3728 emit_unop_insn (int icode, rtx target, rtx op0, enum rtx_code code)
3731 enum machine_mode mode0 = insn_data[icode].operand[1].mode;
3736 /* Now, if insn does not accept our operands, put them into pseudos. */
3738 if (!insn_data[icode].operand[1].predicate (op0, mode0))
3739 op0 = copy_to_mode_reg (mode0, op0);
3741 if (!insn_data[icode].operand[0].predicate (temp, GET_MODE (temp)))
3742 temp = gen_reg_rtx (GET_MODE (temp));
3744 pat = GEN_FCN (icode) (temp, op0);
3746 if (INSN_P (pat) && NEXT_INSN (pat) != NULL_RTX && code != UNKNOWN)
3747 add_equal_note (pat, temp, code, op0, NULL_RTX);
3752 emit_move_insn (target, temp);
3755 struct no_conflict_data
3757 rtx target, first, insn;
3761 /* Called via note_stores by emit_no_conflict_block and emit_libcall_block.
3762 Set P->must_stay if the currently examined clobber / store has to stay
3763 in the list of insns that constitute the actual no_conflict block /
3766 no_conflict_move_test (rtx dest, const_rtx set, void *p0)
3768 struct no_conflict_data *p= p0;
3770 /* If this inns directly contributes to setting the target, it must stay. */
3771 if (reg_overlap_mentioned_p (p->target, dest))
3772 p->must_stay = true;
3773 /* If we haven't committed to keeping any other insns in the list yet,
3774 there is nothing more to check. */
3775 else if (p->insn == p->first)
3777 /* If this insn sets / clobbers a register that feeds one of the insns
3778 already in the list, this insn has to stay too. */
3779 else if (reg_overlap_mentioned_p (dest, PATTERN (p->first))
3780 || (CALL_P (p->first) && (find_reg_fusage (p->first, USE, dest)))
3781 || reg_used_between_p (dest, p->first, p->insn)
3782 /* Likewise if this insn depends on a register set by a previous
3783 insn in the list, or if it sets a result (presumably a hard
3784 register) that is set or clobbered by a previous insn.
3785 N.B. the modified_*_p (SET_DEST...) tests applied to a MEM
3786 SET_DEST perform the former check on the address, and the latter
3787 check on the MEM. */
3788 || (GET_CODE (set) == SET
3789 && (modified_in_p (SET_SRC (set), p->first)
3790 || modified_in_p (SET_DEST (set), p->first)
3791 || modified_between_p (SET_SRC (set), p->first, p->insn)
3792 || modified_between_p (SET_DEST (set), p->first, p->insn))))
3793 p->must_stay = true;
3796 /* Encapsulate the block starting at FIRST and ending with LAST, which is
3797 logically equivalent to EQUIV, so it gets manipulated as a unit if it
3798 is possible to do so. */
3801 maybe_encapsulate_block (rtx first, rtx last, rtx equiv)
3803 if (!flag_non_call_exceptions || !may_trap_p (equiv))
3805 /* We can't attach the REG_LIBCALL and REG_RETVAL notes when the
3806 encapsulated region would not be in one basic block, i.e. when
3807 there is a control_flow_insn_p insn between FIRST and LAST. */
3808 bool attach_libcall_retval_notes = true;
3809 rtx insn, next = NEXT_INSN (last);
3811 for (insn = first; insn != next; insn = NEXT_INSN (insn))
3812 if (control_flow_insn_p (insn))
3814 attach_libcall_retval_notes = false;
3818 if (attach_libcall_retval_notes)
3820 REG_NOTES (first) = gen_rtx_INSN_LIST (REG_LIBCALL, last,
3822 REG_NOTES (last) = gen_rtx_INSN_LIST (REG_RETVAL, first,
3824 next = NEXT_INSN (last);
3825 for (insn = first; insn != next; insn = NEXT_INSN (insn))
3826 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_LIBCALL_ID,
3827 GEN_INT (libcall_id),
3834 /* Emit code to perform a series of operations on a multi-word quantity, one
3837 Such a block is preceded by a CLOBBER of the output, consists of multiple
3838 insns, each setting one word of the output, and followed by a SET copying
3839 the output to itself.
3841 Each of the insns setting words of the output receives a REG_NO_CONFLICT
3842 note indicating that it doesn't conflict with the (also multi-word)
3843 inputs. The entire block is surrounded by REG_LIBCALL and REG_RETVAL
3846 INSNS is a block of code generated to perform the operation, not including
3847 the CLOBBER and final copy. All insns that compute intermediate values
3848 are first emitted, followed by the block as described above.
3850 TARGET, OP0, and OP1 are the output and inputs of the operations,
3851 respectively. OP1 may be zero for a unary operation.
3853 EQUIV, if nonzero, is an expression to be placed into a REG_EQUAL note
3856 If TARGET is not a register, INSNS is simply emitted with no special
3857 processing. Likewise if anything in INSNS is not an INSN or if
3858 there is a libcall block inside INSNS.
3860 The final insn emitted is returned. */
3863 emit_no_conflict_block (rtx insns, rtx target, rtx op0, rtx op1, rtx equiv)
3865 rtx prev, next, first, last, insn;
3867 if (!REG_P (target) || reload_in_progress)
3868 return emit_insn (insns);
3870 for (insn = insns; insn; insn = NEXT_INSN (insn))
3871 if (!NONJUMP_INSN_P (insn)
3872 || find_reg_note (insn, REG_LIBCALL, NULL_RTX))
3873 return emit_insn (insns);
3875 /* First emit all insns that do not store into words of the output and remove
3876 these from the list. */
3877 for (insn = insns; insn; insn = next)
3880 struct no_conflict_data data;
3882 next = NEXT_INSN (insn);
3884 /* Some ports (cris) create a libcall regions at their own. We must
3885 avoid any potential nesting of LIBCALLs. */
3886 if ((note = find_reg_note (insn, REG_LIBCALL, NULL)) != NULL)
3887 remove_note (insn, note);
3888 if ((note = find_reg_note (insn, REG_RETVAL, NULL)) != NULL)
3889 remove_note (insn, note);
3890 if ((note = find_reg_note (insn, REG_LIBCALL_ID, NULL)) != NULL)
3891 remove_note (insn, note);
3893 data.target = target;
3897 note_stores (PATTERN (insn), no_conflict_move_test, &data);
3898 if (! data.must_stay)
3900 if (PREV_INSN (insn))
3901 NEXT_INSN (PREV_INSN (insn)) = next;
3906 PREV_INSN (next) = PREV_INSN (insn);
3912 prev = get_last_insn ();
3914 /* Now write the CLOBBER of the output, followed by the setting of each
3915 of the words, followed by the final copy. */
3916 if (target != op0 && target != op1)
3917 emit_insn (gen_rtx_CLOBBER (VOIDmode, target));
3919 for (insn = insns; insn; insn = next)
3921 next = NEXT_INSN (insn);
3924 if (op1 && REG_P (op1))
3925 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_NO_CONFLICT, op1,
3928 if (op0 && REG_P (op0))
3929 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_NO_CONFLICT, op0,
3933 if (optab_handler (mov_optab, GET_MODE (target))->insn_code
3934 != CODE_FOR_nothing)
3936 last = emit_move_insn (target, target);
3938 set_unique_reg_note (last, REG_EQUAL, equiv);
3942 last = get_last_insn ();
3944 /* Remove any existing REG_EQUAL note from "last", or else it will
3945 be mistaken for a note referring to the full contents of the
3946 alleged libcall value when found together with the REG_RETVAL
3947 note added below. An existing note can come from an insn
3948 expansion at "last". */
3949 remove_note (last, find_reg_note (last, REG_EQUAL, NULL_RTX));
3953 first = get_insns ();
3955 first = NEXT_INSN (prev);
3957 maybe_encapsulate_block (first, last, equiv);
3962 /* Emit code to make a call to a constant function or a library call.
3964 INSNS is a list containing all insns emitted in the call.
3965 These insns leave the result in RESULT. Our block is to copy RESULT
3966 to TARGET, which is logically equivalent to EQUIV.
3968 We first emit any insns that set a pseudo on the assumption that these are
3969 loading constants into registers; doing so allows them to be safely cse'ed
3970 between blocks. Then we emit all the other insns in the block, followed by
3971 an insn to move RESULT to TARGET. This last insn will have a REQ_EQUAL
3972 note with an operand of EQUIV.
3974 Moving assignments to pseudos outside of the block is done to improve
3975 the generated code, but is not required to generate correct code,
3976 hence being unable to move an assignment is not grounds for not making
3977 a libcall block. There are two reasons why it is safe to leave these
3978 insns inside the block: First, we know that these pseudos cannot be
3979 used in generated RTL outside the block since they are created for
3980 temporary purposes within the block. Second, CSE will not record the
3981 values of anything set inside a libcall block, so we know they must
3982 be dead at the end of the block.
3984 Except for the first group of insns (the ones setting pseudos), the
3985 block is delimited by REG_RETVAL and REG_LIBCALL notes. */
3987 emit_libcall_block (rtx insns, rtx target, rtx result, rtx equiv)
3989 rtx final_dest = target;
3990 rtx prev, next, first, last, insn;
3992 /* If this is a reg with REG_USERVAR_P set, then it could possibly turn
3993 into a MEM later. Protect the libcall block from this change. */
3994 if (! REG_P (target) || REG_USERVAR_P (target))
3995 target = gen_reg_rtx (GET_MODE (target));
3997 /* If we're using non-call exceptions, a libcall corresponding to an
3998 operation that may trap may also trap. */
3999 if (flag_non_call_exceptions && may_trap_p (equiv))
4001 for (insn = insns; insn; insn = NEXT_INSN (insn))
4004 rtx note = find_reg_note (insn, REG_EH_REGION, NULL_RTX);
4006 if (note != 0 && INTVAL (XEXP (note, 0)) <= 0)
4007 remove_note (insn, note);
4011 /* look for any CALL_INSNs in this sequence, and attach a REG_EH_REGION
4012 reg note to indicate that this call cannot throw or execute a nonlocal
4013 goto (unless there is already a REG_EH_REGION note, in which case
4015 for (insn = insns; insn; insn = NEXT_INSN (insn))
4018 rtx note = find_reg_note (insn, REG_EH_REGION, NULL_RTX);
4021 XEXP (note, 0) = constm1_rtx;
4023 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_EH_REGION, constm1_rtx,
4027 /* First emit all insns that set pseudos. Remove them from the list as
4028 we go. Avoid insns that set pseudos which were referenced in previous
4029 insns. These can be generated by move_by_pieces, for example,
4030 to update an address. Similarly, avoid insns that reference things
4031 set in previous insns. */
4033 for (insn = insns; insn; insn = next)
4035 rtx set = single_set (insn);
4038 /* Some ports (cris) create a libcall regions at their own. We must
4039 avoid any potential nesting of LIBCALLs. */
4040 if ((note = find_reg_note (insn, REG_LIBCALL, NULL)) != NULL)
4041 remove_note (insn, note);
4042 if ((note = find_reg_note (insn, REG_RETVAL, NULL)) != NULL)
4043 remove_note (insn, note);
4044 if ((note = find_reg_note (insn, REG_LIBCALL_ID, NULL)) != NULL)
4045 remove_note (insn, note);
4047 next = NEXT_INSN (insn);
4049 if (set != 0 && REG_P (SET_DEST (set))
4050 && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER)
4052 struct no_conflict_data data;
4054 data.target = const0_rtx;
4058 note_stores (PATTERN (insn), no_conflict_move_test, &data);
4059 if (! data.must_stay)
4061 if (PREV_INSN (insn))
4062 NEXT_INSN (PREV_INSN (insn)) = next;
4067 PREV_INSN (next) = PREV_INSN (insn);
4073 /* Some ports use a loop to copy large arguments onto the stack.
4074 Don't move anything outside such a loop. */
4079 prev = get_last_insn ();
4081 /* Write the remaining insns followed by the final copy. */
4083 for (insn = insns; insn; insn = next)
4085 next = NEXT_INSN (insn);
4090 last = emit_move_insn (target, result);
4091 if (optab_handler (mov_optab, GET_MODE (target))->insn_code
4092 != CODE_FOR_nothing)
4093 set_unique_reg_note (last, REG_EQUAL, copy_rtx (equiv));
4096 /* Remove any existing REG_EQUAL note from "last", or else it will
4097 be mistaken for a note referring to the full contents of the
4098 libcall value when found together with the REG_RETVAL note added
4099 below. An existing note can come from an insn expansion at
4101 remove_note (last, find_reg_note (last, REG_EQUAL, NULL_RTX));
4104 if (final_dest != target)
4105 emit_move_insn (final_dest, target);
4108 first = get_insns ();
4110 first = NEXT_INSN (prev);
4112 maybe_encapsulate_block (first, last, equiv);
4115 /* Nonzero if we can perform a comparison of mode MODE straightforwardly.
4116 PURPOSE describes how this comparison will be used. CODE is the rtx
4117 comparison code we will be using.
4119 ??? Actually, CODE is slightly weaker than that. A target is still
4120 required to implement all of the normal bcc operations, but not
4121 required to implement all (or any) of the unordered bcc operations. */
4124 can_compare_p (enum rtx_code code, enum machine_mode mode,
4125 enum can_compare_purpose purpose)
4129 if (optab_handler (cmp_optab, mode)->insn_code != CODE_FOR_nothing)
4131 if (purpose == ccp_jump)
4132 return bcc_gen_fctn[(int) code] != NULL;
4133 else if (purpose == ccp_store_flag)
4134 return setcc_gen_code[(int) code] != CODE_FOR_nothing;
4136 /* There's only one cmov entry point, and it's allowed to fail. */
4139 if (purpose == ccp_jump
4140 && optab_handler (cbranch_optab, mode)->insn_code != CODE_FOR_nothing)
4142 if (purpose == ccp_cmov
4143 && optab_handler (cmov_optab, mode)->insn_code != CODE_FOR_nothing)
4145 if (purpose == ccp_store_flag
4146 && optab_handler (cstore_optab, mode)->insn_code != CODE_FOR_nothing)
4148 mode = GET_MODE_WIDER_MODE (mode);
4150 while (mode != VOIDmode);
4155 /* This function is called when we are going to emit a compare instruction that
4156 compares the values found in *PX and *PY, using the rtl operator COMPARISON.
4158 *PMODE is the mode of the inputs (in case they are const_int).
4159 *PUNSIGNEDP nonzero says that the operands are unsigned;
4160 this matters if they need to be widened.
4162 If they have mode BLKmode, then SIZE specifies the size of both operands.
4164 This function performs all the setup necessary so that the caller only has
4165 to emit a single comparison insn. This setup can involve doing a BLKmode
4166 comparison or emitting a library call to perform the comparison if no insn
4167 is available to handle it.
4168 The values which are passed in through pointers can be modified; the caller
4169 should perform the comparison on the modified values. Constant
4170 comparisons must have already been folded. */
4173 prepare_cmp_insn (rtx *px, rtx *py, enum rtx_code *pcomparison, rtx size,
4174 enum machine_mode *pmode, int *punsignedp,
4175 enum can_compare_purpose purpose)
4177 enum machine_mode mode = *pmode;
4178 rtx x = *px, y = *py;
4179 int unsignedp = *punsignedp;
4182 /* If we are inside an appropriately-short loop and we are optimizing,
4183 force expensive constants into a register. */
4184 if (CONSTANT_P (x) && optimize
4185 && rtx_cost (x, COMPARE) > COSTS_N_INSNS (1))
4186 x = force_reg (mode, x);
4188 if (CONSTANT_P (y) && optimize
4189 && rtx_cost (y, COMPARE) > COSTS_N_INSNS (1))
4190 y = force_reg (mode, y);
4193 /* Make sure if we have a canonical comparison. The RTL
4194 documentation states that canonical comparisons are required only
4195 for targets which have cc0. */
4196 gcc_assert (!CONSTANT_P (x) || CONSTANT_P (y));
4199 /* Don't let both operands fail to indicate the mode. */
4200 if (GET_MODE (x) == VOIDmode && GET_MODE (y) == VOIDmode)
4201 x = force_reg (mode, x);
4203 /* Handle all BLKmode compares. */
4205 if (mode == BLKmode)
4207 enum machine_mode cmp_mode, result_mode;
4208 enum insn_code cmp_code;
4213 = GEN_INT (MIN (MEM_ALIGN (x), MEM_ALIGN (y)) / BITS_PER_UNIT);
4217 /* Try to use a memory block compare insn - either cmpstr
4218 or cmpmem will do. */
4219 for (cmp_mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
4220 cmp_mode != VOIDmode;
4221 cmp_mode = GET_MODE_WIDER_MODE (cmp_mode))
4223 cmp_code = cmpmem_optab[cmp_mode];
4224 if (cmp_code == CODE_FOR_nothing)
4225 cmp_code = cmpstr_optab[cmp_mode];
4226 if (cmp_code == CODE_FOR_nothing)
4227 cmp_code = cmpstrn_optab[cmp_mode];
4228 if (cmp_code == CODE_FOR_nothing)
4231 /* Must make sure the size fits the insn's mode. */
4232 if ((GET_CODE (size) == CONST_INT
4233 && INTVAL (size) >= (1 << GET_MODE_BITSIZE (cmp_mode)))
4234 || (GET_MODE_BITSIZE (GET_MODE (size))
4235 > GET_MODE_BITSIZE (cmp_mode)))
4238 result_mode = insn_data[cmp_code].operand[0].mode;
4239 result = gen_reg_rtx (result_mode);
4240 size = convert_to_mode (cmp_mode, size, 1);
4241 emit_insn (GEN_FCN (cmp_code) (result, x, y, size, opalign));
4245 *pmode = result_mode;
4249 /* Otherwise call a library function, memcmp. */
4250 libfunc = memcmp_libfunc;
4251 length_type = sizetype;
4252 result_mode = TYPE_MODE (integer_type_node);
4253 cmp_mode = TYPE_MODE (length_type);
4254 size = convert_to_mode (TYPE_MODE (length_type), size,
4255 TYPE_UNSIGNED (length_type));
4257 result = emit_library_call_value (libfunc, 0, LCT_PURE_MAKE_BLOCK,
4264 *pmode = result_mode;
4268 /* Don't allow operands to the compare to trap, as that can put the
4269 compare and branch in different basic blocks. */
4270 if (flag_non_call_exceptions)
4273 x = force_reg (mode, x);
4275 y = force_reg (mode, y);
4280 if (can_compare_p (*pcomparison, mode, purpose))
4283 /* Handle a lib call just for the mode we are using. */
4285 libfunc = optab_libfunc (cmp_optab, mode);
4286 if (libfunc && !SCALAR_FLOAT_MODE_P (mode))
4291 /* If we want unsigned, and this mode has a distinct unsigned
4292 comparison routine, use that. */
4295 ulibfunc = optab_libfunc (ucmp_optab, mode);
4297 if (unsignedp && ulibfunc)
4300 result = emit_library_call_value (libfunc, NULL_RTX, LCT_CONST_MAKE_BLOCK,
4301 targetm.libgcc_cmp_return_mode (),
4302 2, x, mode, y, mode);
4304 /* There are two kinds of comparison routines. Biased routines
4305 return 0/1/2, and unbiased routines return -1/0/1. Other parts
4306 of gcc expect that the comparison operation is equivalent
4307 to the modified comparison. For signed comparisons compare the
4308 result against 1 in the biased case, and zero in the unbiased
4309 case. For unsigned comparisons always compare against 1 after
4310 biasing the unbiased result by adding 1. This gives us a way to
4316 if (!TARGET_LIB_INT_CMP_BIASED)
4319 *px = plus_constant (result, 1);
4326 gcc_assert (SCALAR_FLOAT_MODE_P (mode));
4327 prepare_float_lib_cmp (px, py, pcomparison, pmode, punsignedp);
4330 /* Before emitting an insn with code ICODE, make sure that X, which is going
4331 to be used for operand OPNUM of the insn, is converted from mode MODE to
4332 WIDER_MODE (UNSIGNEDP determines whether it is an unsigned conversion), and
4333 that it is accepted by the operand predicate. Return the new value. */
4336 prepare_operand (int icode, rtx x, int opnum, enum machine_mode mode,
4337 enum machine_mode wider_mode, int unsignedp)
4339 if (mode != wider_mode)
4340 x = convert_modes (wider_mode, mode, x, unsignedp);
4342 if (!insn_data[icode].operand[opnum].predicate
4343 (x, insn_data[icode].operand[opnum].mode))
4345 if (reload_completed)
4347 x = copy_to_mode_reg (insn_data[icode].operand[opnum].mode, x);
4353 /* Subroutine of emit_cmp_and_jump_insns; this function is called when we know
4354 we can do the comparison.
4355 The arguments are the same as for emit_cmp_and_jump_insns; but LABEL may
4356 be NULL_RTX which indicates that only a comparison is to be generated. */
4359 emit_cmp_and_jump_insn_1 (rtx x, rtx y, enum machine_mode mode,
4360 enum rtx_code comparison, int unsignedp, rtx label)
4362 rtx test = gen_rtx_fmt_ee (comparison, mode, x, y);
4363 enum mode_class class = GET_MODE_CLASS (mode);
4364 enum machine_mode wider_mode = mode;
4366 /* Try combined insns first. */
4369 enum insn_code icode;
4370 PUT_MODE (test, wider_mode);
4374 icode = optab_handler (cbranch_optab, wider_mode)->insn_code;
4376 if (icode != CODE_FOR_nothing
4377 && insn_data[icode].operand[0].predicate (test, wider_mode))
4379 x = prepare_operand (icode, x, 1, mode, wider_mode, unsignedp);
4380 y = prepare_operand (icode, y, 2, mode, wider_mode, unsignedp);
4381 emit_jump_insn (GEN_FCN (icode) (test, x, y, label));
4386 /* Handle some compares against zero. */
4387 icode = (int) optab_handler (tst_optab, wider_mode)->insn_code;
4388 if (y == CONST0_RTX (mode) && icode != CODE_FOR_nothing)
4390 x = prepare_operand (icode, x, 0, mode, wider_mode, unsignedp);
4391 emit_insn (GEN_FCN (icode) (x));
4393 emit_jump_insn (bcc_gen_fctn[(int) comparison] (label));
4397 /* Handle compares for which there is a directly suitable insn. */
4399 icode = (int) optab_handler (cmp_optab, wider_mode)->insn_code;
4400 if (icode != CODE_FOR_nothing)
4402 x = prepare_operand (icode, x, 0, mode, wider_mode, unsignedp);
4403 y = prepare_operand (icode, y, 1, mode, wider_mode, unsignedp);
4404 emit_insn (GEN_FCN (icode) (x, y));
4406 emit_jump_insn (bcc_gen_fctn[(int) comparison] (label));
4410 if (!CLASS_HAS_WIDER_MODES_P (class))
4413 wider_mode = GET_MODE_WIDER_MODE (wider_mode);
4415 while (wider_mode != VOIDmode);
4420 /* Generate code to compare X with Y so that the condition codes are
4421 set and to jump to LABEL if the condition is true. If X is a
4422 constant and Y is not a constant, then the comparison is swapped to
4423 ensure that the comparison RTL has the canonical form.
4425 UNSIGNEDP nonzero says that X and Y are unsigned; this matters if they
4426 need to be widened by emit_cmp_insn. UNSIGNEDP is also used to select
4427 the proper branch condition code.
4429 If X and Y have mode BLKmode, then SIZE specifies the size of both X and Y.
4431 MODE is the mode of the inputs (in case they are const_int).
4433 COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.). It will
4434 be passed unchanged to emit_cmp_insn, then potentially converted into an
4435 unsigned variant based on UNSIGNEDP to select a proper jump instruction. */
4438 emit_cmp_and_jump_insns (rtx x, rtx y, enum rtx_code comparison, rtx size,
4439 enum machine_mode mode, int unsignedp, rtx label)
4441 rtx op0 = x, op1 = y;
4443 /* Swap operands and condition to ensure canonical RTL. */
4444 if (swap_commutative_operands_p (x, y))
4446 /* If we're not emitting a branch, callers are required to pass
4447 operands in an order conforming to canonical RTL. We relax this
4448 for commutative comparisons so callers using EQ don't need to do
4449 swapping by hand. */
4450 gcc_assert (label || (comparison == swap_condition (comparison)));
4453 comparison = swap_condition (comparison);
4457 /* If OP0 is still a constant, then both X and Y must be constants.
4458 Force X into a register to create canonical RTL. */
4459 if (CONSTANT_P (op0))
4460 op0 = force_reg (mode, op0);
4464 comparison = unsigned_condition (comparison);
4466 prepare_cmp_insn (&op0, &op1, &comparison, size, &mode, &unsignedp,
4468 emit_cmp_and_jump_insn_1 (op0, op1, mode, comparison, unsignedp, label);
4471 /* Like emit_cmp_and_jump_insns, but generate only the comparison. */
4474 emit_cmp_insn (rtx x, rtx y, enum rtx_code comparison, rtx size,
4475 enum machine_mode mode, int unsignedp)
4477 emit_cmp_and_jump_insns (x, y, comparison, size, mode, unsignedp, 0);
4480 /* Emit a library call comparison between floating point X and Y.
4481 COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.). */
4484 prepare_float_lib_cmp (rtx *px, rtx *py, enum rtx_code *pcomparison,
4485 enum machine_mode *pmode, int *punsignedp)
4487 enum rtx_code comparison = *pcomparison;
4488 enum rtx_code swapped = swap_condition (comparison);
4489 enum rtx_code reversed = reverse_condition_maybe_unordered (comparison);
4492 enum machine_mode orig_mode = GET_MODE (x);
4493 enum machine_mode mode, cmp_mode;
4494 rtx value, target, insns, equiv;
4496 bool reversed_p = false;
4497 cmp_mode = targetm.libgcc_cmp_return_mode ();
4499 for (mode = orig_mode;
4501 mode = GET_MODE_WIDER_MODE (mode))
4503 if ((libfunc = optab_libfunc (code_to_optab[comparison], mode)))
4506 if ((libfunc = optab_libfunc (code_to_optab[swapped] , mode)))
4509 tmp = x; x = y; y = tmp;
4510 comparison = swapped;
4514 if ((libfunc = optab_libfunc (code_to_optab[reversed], mode))
4515 && FLOAT_LIB_COMPARE_RETURNS_BOOL (mode, reversed))
4517 comparison = reversed;
4523 gcc_assert (mode != VOIDmode);
4525 if (mode != orig_mode)
4527 x = convert_to_mode (mode, x, 0);
4528 y = convert_to_mode (mode, y, 0);
4531 /* Attach a REG_EQUAL note describing the semantics of the libcall to
4532 the RTL. The allows the RTL optimizers to delete the libcall if the
4533 condition can be determined at compile-time. */
4534 if (comparison == UNORDERED)
4536 rtx temp = simplify_gen_relational (NE, cmp_mode, mode, x, x);
4537 equiv = simplify_gen_relational (NE, cmp_mode, mode, y, y);
4538 equiv = simplify_gen_ternary (IF_THEN_ELSE, cmp_mode, cmp_mode,
4539 temp, const_true_rtx, equiv);
4543 equiv = simplify_gen_relational (comparison, cmp_mode, mode, x, y);
4544 if (! FLOAT_LIB_COMPARE_RETURNS_BOOL (mode, comparison))
4546 rtx true_rtx, false_rtx;
4551 true_rtx = const0_rtx;
4552 false_rtx = const_true_rtx;
4556 true_rtx = const_true_rtx;
4557 false_rtx = const0_rtx;
4561 true_rtx = const1_rtx;
4562 false_rtx = const0_rtx;
4566 true_rtx = const0_rtx;
4567 false_rtx = constm1_rtx;
4571 true_rtx = constm1_rtx;
4572 false_rtx = const0_rtx;
4576 true_rtx = const0_rtx;
4577 false_rtx = const1_rtx;
4583 equiv = simplify_gen_ternary (IF_THEN_ELSE, cmp_mode, cmp_mode,
4584 equiv, true_rtx, false_rtx);
4589 value = emit_library_call_value (libfunc, NULL_RTX, LCT_CONST,
4590 cmp_mode, 2, x, mode, y, mode);
4591 insns = get_insns ();
4594 target = gen_reg_rtx (cmp_mode);
4595 emit_libcall_block (insns, target, value, equiv);
4597 if (comparison == UNORDERED
4598 || FLOAT_LIB_COMPARE_RETURNS_BOOL (mode, comparison))
4599 comparison = reversed_p ? EQ : NE;
4604 *pcomparison = comparison;
4608 /* Generate code to indirectly jump to a location given in the rtx LOC. */
4611 emit_indirect_jump (rtx loc)
4613 if (!insn_data[(int) CODE_FOR_indirect_jump].operand[0].predicate
4615 loc = copy_to_mode_reg (Pmode, loc);
4617 emit_jump_insn (gen_indirect_jump (loc));
4621 #ifdef HAVE_conditional_move
4623 /* Emit a conditional move instruction if the machine supports one for that
4624 condition and machine mode.
4626 OP0 and OP1 are the operands that should be compared using CODE. CMODE is
4627 the mode to use should they be constants. If it is VOIDmode, they cannot
4630 OP2 should be stored in TARGET if the comparison is true, otherwise OP3
4631 should be stored there. MODE is the mode to use should they be constants.
4632 If it is VOIDmode, they cannot both be constants.
4634 The result is either TARGET (perhaps modified) or NULL_RTX if the operation
4635 is not supported. */
4638 emit_conditional_move (rtx target, enum rtx_code code, rtx op0, rtx op1,
4639 enum machine_mode cmode, rtx op2, rtx op3,
4640 enum machine_mode mode, int unsignedp)
4642 rtx tem, subtarget, comparison, insn;
4643 enum insn_code icode;
4644 enum rtx_code reversed;
4646 /* If one operand is constant, make it the second one. Only do this
4647 if the other operand is not constant as well. */
4649 if (swap_commutative_operands_p (op0, op1))
4654 code = swap_condition (code);
4657 /* get_condition will prefer to generate LT and GT even if the old
4658 comparison was against zero, so undo that canonicalization here since
4659 comparisons against zero are cheaper. */
4660 if (code == LT && op1 == const1_rtx)
4661 code = LE, op1 = const0_rtx;
4662 else if (code == GT && op1 == constm1_rtx)
4663 code = GE, op1 = const0_rtx;
4665 if (cmode == VOIDmode)
4666 cmode = GET_MODE (op0);
4668 if (swap_commutative_operands_p (op2, op3)
4669 && ((reversed = reversed_comparison_code_parts (code, op0, op1, NULL))
4678 if (mode == VOIDmode)
4679 mode = GET_MODE (op2);
4681 icode = movcc_gen_code[mode];
4683 if (icode == CODE_FOR_nothing)
4687 target = gen_reg_rtx (mode);
4691 /* If the insn doesn't accept these operands, put them in pseudos. */
4693 if (!insn_data[icode].operand[0].predicate
4694 (subtarget, insn_data[icode].operand[0].mode))
4695 subtarget = gen_reg_rtx (insn_data[icode].operand[0].mode);
4697 if (!insn_data[icode].operand[2].predicate
4698 (op2, insn_data[icode].operand[2].mode))
4699 op2 = copy_to_mode_reg (insn_data[icode].operand[2].mode, op2);
4701 if (!insn_data[icode].operand[3].predicate
4702 (op3, insn_data[icode].operand[3].mode))
4703 op3 = copy_to_mode_reg (insn_data[icode].operand[3].mode, op3);
4705 /* Everything should now be in the suitable form, so emit the compare insn
4706 and then the conditional move. */
4709 = compare_from_rtx (op0, op1, code, unsignedp, cmode, NULL_RTX);
4711 /* ??? Watch for const0_rtx (nop) and const_true_rtx (unconditional)? */
4712 /* We can get const0_rtx or const_true_rtx in some circumstances. Just
4713 return NULL and let the caller figure out how best to deal with this
4715 if (GET_CODE (comparison) != code)
4718 insn = GEN_FCN (icode) (subtarget, comparison, op2, op3);
4720 /* If that failed, then give up. */
4726 if (subtarget != target)
4727 convert_move (target, subtarget, 0);
4732 /* Return nonzero if a conditional move of mode MODE is supported.
4734 This function is for combine so it can tell whether an insn that looks
4735 like a conditional move is actually supported by the hardware. If we
4736 guess wrong we lose a bit on optimization, but that's it. */
4737 /* ??? sparc64 supports conditionally moving integers values based on fp
4738 comparisons, and vice versa. How do we handle them? */
4741 can_conditionally_move_p (enum machine_mode mode)
4743 if (movcc_gen_code[mode] != CODE_FOR_nothing)
4749 #endif /* HAVE_conditional_move */
4751 /* Emit a conditional addition instruction if the machine supports one for that
4752 condition and machine mode.
4754 OP0 and OP1 are the operands that should be compared using CODE. CMODE is
4755 the mode to use should they be constants. If it is VOIDmode, they cannot
4758 OP2 should be stored in TARGET if the comparison is true, otherwise OP2+OP3
4759 should be stored there. MODE is the mode to use should they be constants.
4760 If it is VOIDmode, they cannot both be constants.
4762 The result is either TARGET (perhaps modified) or NULL_RTX if the operation
4763 is not supported. */
4766 emit_conditional_add (rtx target, enum rtx_code code, rtx op0, rtx op1,
4767 enum machine_mode cmode, rtx op2, rtx op3,
4768 enum machine_mode mode, int unsignedp)
4770 rtx tem, subtarget, comparison, insn;
4771 enum insn_code icode;
4772 enum rtx_code reversed;
4774 /* If one operand is constant, make it the second one. Only do this
4775 if the other operand is not constant as well. */
4777 if (swap_commutative_operands_p (op0, op1))
4782 code = swap_condition (code);
4785 /* get_condition will prefer to generate LT and GT even if the old
4786 comparison was against zero, so undo that canonicalization here since
4787 comparisons against zero are cheaper. */
4788 if (code == LT && op1 == const1_rtx)
4789 code = LE, op1 = const0_rtx;
4790 else if (code == GT && op1 == constm1_rtx)
4791 code = GE, op1 = const0_rtx;
4793 if (cmode == VOIDmode)
4794 cmode = GET_MODE (op0);
4796 if (swap_commutative_operands_p (op2, op3)
4797 && ((reversed = reversed_comparison_code_parts (code, op0, op1, NULL))
4806 if (mode == VOIDmode)
4807 mode = GET_MODE (op2);
4809 icode = optab_handler (addcc_optab, mode)->insn_code;
4811 if (icode == CODE_FOR_nothing)
4815 target = gen_reg_rtx (mode);
4817 /* If the insn doesn't accept these operands, put them in pseudos. */
4819 if (!insn_data[icode].operand[0].predicate
4820 (target, insn_data[icode].operand[0].mode))
4821 subtarget = gen_reg_rtx (insn_data[icode].operand[0].mode);
4825 if (!insn_data[icode].operand[2].predicate
4826 (op2, insn_data[icode].operand[2].mode))
4827 op2 = copy_to_mode_reg (insn_data[icode].operand[2].mode, op2);
4829 if (!insn_data[icode].operand[3].predicate
4830 (op3, insn_data[icode].operand[3].mode))
4831 op3 = copy_to_mode_reg (insn_data[icode].operand[3].mode, op3);
4833 /* Everything should now be in the suitable form, so emit the compare insn
4834 and then the conditional move. */
4837 = compare_from_rtx (op0, op1, code, unsignedp, cmode, NULL_RTX);
4839 /* ??? Watch for const0_rtx (nop) and const_true_rtx (unconditional)? */
4840 /* We can get const0_rtx or const_true_rtx in some circumstances. Just
4841 return NULL and let the caller figure out how best to deal with this
4843 if (GET_CODE (comparison) != code)
4846 insn = GEN_FCN (icode) (subtarget, comparison, op2, op3);
4848 /* If that failed, then give up. */
4854 if (subtarget != target)
4855 convert_move (target, subtarget, 0);
4860 /* These functions attempt to generate an insn body, rather than
4861 emitting the insn, but if the gen function already emits them, we
4862 make no attempt to turn them back into naked patterns. */
4864 /* Generate and return an insn body to add Y to X. */
4867 gen_add2_insn (rtx x, rtx y)
4869 int icode = (int) optab_handler (add_optab, GET_MODE (x))->insn_code;
4871 gcc_assert (insn_data[icode].operand[0].predicate
4872 (x, insn_data[icode].operand[0].mode));
4873 gcc_assert (insn_data[icode].operand[1].predicate
4874 (x, insn_data[icode].operand[1].mode));
4875 gcc_assert (insn_data[icode].operand[2].predicate
4876 (y, insn_data[icode].operand[2].mode));
4878 return GEN_FCN (icode) (x, x, y);
4881 /* Generate and return an insn body to add r1 and c,
4882 storing the result in r0. */
4885 gen_add3_insn (rtx r0, rtx r1, rtx c)
4887 int icode = (int) optab_handler (add_optab, GET_MODE (r0))->insn_code;
4889 if (icode == CODE_FOR_nothing
4890 || !(insn_data[icode].operand[0].predicate
4891 (r0, insn_data[icode].operand[0].mode))
4892 || !(insn_data[icode].operand[1].predicate
4893 (r1, insn_data[icode].operand[1].mode))
4894 || !(insn_data[icode].operand[2].predicate
4895 (c, insn_data[icode].operand[2].mode)))
4898 return GEN_FCN (icode) (r0, r1, c);
4902 have_add2_insn (rtx x, rtx y)
4906 gcc_assert (GET_MODE (x) != VOIDmode);
4908 icode = (int) optab_handler (add_optab, GET_MODE (x))->insn_code;
4910 if (icode == CODE_FOR_nothing)
4913 if (!(insn_data[icode].operand[0].predicate
4914 (x, insn_data[icode].operand[0].mode))
4915 || !(insn_data[icode].operand[1].predicate
4916 (x, insn_data[icode].operand[1].mode))
4917 || !(insn_data[icode].operand[2].predicate
4918 (y, insn_data[icode].operand[2].mode)))
4924 /* Generate and return an insn body to subtract Y from X. */
4927 gen_sub2_insn (rtx x, rtx y)
4929 int icode = (int) optab_handler (sub_optab, GET_MODE (x))->insn_code;
4931 gcc_assert (insn_data[icode].operand[0].predicate
4932 (x, insn_data[icode].operand[0].mode));
4933 gcc_assert (insn_data[icode].operand[1].predicate
4934 (x, insn_data[icode].operand[1].mode));
4935 gcc_assert (insn_data[icode].operand[2].predicate
4936 (y, insn_data[icode].operand[2].mode));
4938 return GEN_FCN (icode) (x, x, y);
4941 /* Generate and return an insn body to subtract r1 and c,
4942 storing the result in r0. */
4945 gen_sub3_insn (rtx r0, rtx r1, rtx c)
4947 int icode = (int) optab_handler (sub_optab, GET_MODE (r0))->insn_code;
4949 if (icode == CODE_FOR_nothing
4950 || !(insn_data[icode].operand[0].predicate
4951 (r0, insn_data[icode].operand[0].mode))
4952 || !(insn_data[icode].operand[1].predicate
4953 (r1, insn_data[icode].operand[1].mode))
4954 || !(insn_data[icode].operand[2].predicate
4955 (c, insn_data[icode].operand[2].mode)))
4958 return GEN_FCN (icode) (r0, r1, c);
4962 have_sub2_insn (rtx x, rtx y)
4966 gcc_assert (GET_MODE (x) != VOIDmode);
4968 icode = (int) optab_handler (sub_optab, GET_MODE (x))->insn_code;
4970 if (icode == CODE_FOR_nothing)
4973 if (!(insn_data[icode].operand[0].predicate
4974 (x, insn_data[icode].operand[0].mode))
4975 || !(insn_data[icode].operand[1].predicate
4976 (x, insn_data[icode].operand[1].mode))
4977 || !(insn_data[icode].operand[2].predicate
4978 (y, insn_data[icode].operand[2].mode)))
4984 /* Generate the body of an instruction to copy Y into X.
4985 It may be a list of insns, if one insn isn't enough. */
4988 gen_move_insn (rtx x, rtx y)
4993 emit_move_insn_1 (x, y);
4999 /* Return the insn code used to extend FROM_MODE to TO_MODE.
5000 UNSIGNEDP specifies zero-extension instead of sign-extension. If
5001 no such operation exists, CODE_FOR_nothing will be returned. */
5004 can_extend_p (enum machine_mode to_mode, enum machine_mode from_mode,
5008 #ifdef HAVE_ptr_extend
5010 return CODE_FOR_ptr_extend;
5013 tab = unsignedp ? zext_optab : sext_optab;
5014 return convert_optab_handler (tab, to_mode, from_mode)->insn_code;
5017 /* Generate the body of an insn to extend Y (with mode MFROM)
5018 into X (with mode MTO). Do zero-extension if UNSIGNEDP is nonzero. */
5021 gen_extend_insn (rtx x, rtx y, enum machine_mode mto,
5022 enum machine_mode mfrom, int unsignedp)
5024 enum insn_code icode = can_extend_p (mto, mfrom, unsignedp);
5025 return GEN_FCN (icode) (x, y);
5028 /* can_fix_p and can_float_p say whether the target machine
5029 can directly convert a given fixed point type to
5030 a given floating point type, or vice versa.
5031 The returned value is the CODE_FOR_... value to use,
5032 or CODE_FOR_nothing if these modes cannot be directly converted.
5034 *TRUNCP_PTR is set to 1 if it is necessary to output
5035 an explicit FTRUNC insn before the fix insn; otherwise 0. */
5037 static enum insn_code
5038 can_fix_p (enum machine_mode fixmode, enum machine_mode fltmode,
5039 int unsignedp, int *truncp_ptr)
5042 enum insn_code icode;
5044 tab = unsignedp ? ufixtrunc_optab : sfixtrunc_optab;
5045 icode = convert_optab_handler (tab, fixmode, fltmode)->insn_code;
5046 if (icode != CODE_FOR_nothing)
5052 /* FIXME: This requires a port to define both FIX and FTRUNC pattern
5053 for this to work. We need to rework the fix* and ftrunc* patterns
5054 and documentation. */
5055 tab = unsignedp ? ufix_optab : sfix_optab;
5056 icode = convert_optab_handler (tab, fixmode, fltmode)->insn_code;
5057 if (icode != CODE_FOR_nothing
5058 && optab_handler (ftrunc_optab, fltmode)->insn_code != CODE_FOR_nothing)
5065 return CODE_FOR_nothing;
5068 static enum insn_code
5069 can_float_p (enum machine_mode fltmode, enum machine_mode fixmode,
5074 tab = unsignedp ? ufloat_optab : sfloat_optab;
5075 return convert_optab_handler (tab, fltmode, fixmode)->insn_code;
5078 /* Generate code to convert FROM to floating point
5079 and store in TO. FROM must be fixed point and not VOIDmode.
5080 UNSIGNEDP nonzero means regard FROM as unsigned.
5081 Normally this is done by correcting the final value
5082 if it is negative. */
5085 expand_float (rtx to, rtx from, int unsignedp)
5087 enum insn_code icode;
5089 enum machine_mode fmode, imode;
5090 bool can_do_signed = false;
5092 /* Crash now, because we won't be able to decide which mode to use. */
5093 gcc_assert (GET_MODE (from) != VOIDmode);
5095 /* Look for an insn to do the conversion. Do it in the specified
5096 modes if possible; otherwise convert either input, output or both to
5097 wider mode. If the integer mode is wider than the mode of FROM,
5098 we can do the conversion signed even if the input is unsigned. */
5100 for (fmode = GET_MODE (to); fmode != VOIDmode;
5101 fmode = GET_MODE_WIDER_MODE (fmode))
5102 for (imode = GET_MODE (from); imode != VOIDmode;
5103 imode = GET_MODE_WIDER_MODE (imode))
5105 int doing_unsigned = unsignedp;
5107 if (fmode != GET_MODE (to)
5108 && significand_size (fmode) < GET_MODE_BITSIZE (GET_MODE (from)))
5111 icode = can_float_p (fmode, imode, unsignedp);
5112 if (icode == CODE_FOR_nothing && unsignedp)
5114 enum insn_code scode = can_float_p (fmode, imode, 0);
5115 if (scode != CODE_FOR_nothing)
5116 can_do_signed = true;
5117 if (imode != GET_MODE (from))
5118 icode = scode, doing_unsigned = 0;
5121 if (icode != CODE_FOR_nothing)
5123 if (imode != GET_MODE (from))
5124 from = convert_to_mode (imode, from, unsignedp);
5126 if (fmode != GET_MODE (to))
5127 target = gen_reg_rtx (fmode);
5129 emit_unop_insn (icode, target, from,
5130 doing_unsigned ? UNSIGNED_FLOAT : FLOAT);
5133 convert_move (to, target, 0);
5138 /* Unsigned integer, and no way to convert directly. For binary
5139 floating point modes, convert as signed, then conditionally adjust
5141 if (unsignedp && can_do_signed && !DECIMAL_FLOAT_MODE_P (GET_MODE (to)))
5143 rtx label = gen_label_rtx ();
5145 REAL_VALUE_TYPE offset;
5147 /* Look for a usable floating mode FMODE wider than the source and at
5148 least as wide as the target. Using FMODE will avoid rounding woes
5149 with unsigned values greater than the signed maximum value. */
5151 for (fmode = GET_MODE (to); fmode != VOIDmode;
5152 fmode = GET_MODE_WIDER_MODE (fmode))
5153 if (GET_MODE_BITSIZE (GET_MODE (from)) < GET_MODE_BITSIZE (fmode)
5154 && can_float_p (fmode, GET_MODE (from), 0) != CODE_FOR_nothing)
5157 if (fmode == VOIDmode)
5159 /* There is no such mode. Pretend the target is wide enough. */
5160 fmode = GET_MODE (to);
5162 /* Avoid double-rounding when TO is narrower than FROM. */
5163 if ((significand_size (fmode) + 1)
5164 < GET_MODE_BITSIZE (GET_MODE (from)))
5167 rtx neglabel = gen_label_rtx ();
5169 /* Don't use TARGET if it isn't a register, is a hard register,
5170 or is the wrong mode. */
5172 || REGNO (target) < FIRST_PSEUDO_REGISTER
5173 || GET_MODE (target) != fmode)
5174 target = gen_reg_rtx (fmode);
5176 imode = GET_MODE (from);
5177 do_pending_stack_adjust ();
5179 /* Test whether the sign bit is set. */
5180 emit_cmp_and_jump_insns (from, const0_rtx, LT, NULL_RTX, imode,
5183 /* The sign bit is not set. Convert as signed. */
5184 expand_float (target, from, 0);
5185 emit_jump_insn (gen_jump (label));
5188 /* The sign bit is set.
5189 Convert to a usable (positive signed) value by shifting right
5190 one bit, while remembering if a nonzero bit was shifted
5191 out; i.e., compute (from & 1) | (from >> 1). */
5193 emit_label (neglabel);
5194 temp = expand_binop (imode, and_optab, from, const1_rtx,
5195 NULL_RTX, 1, OPTAB_LIB_WIDEN);
5196 temp1 = expand_shift (RSHIFT_EXPR, imode, from, integer_one_node,
5198 temp = expand_binop (imode, ior_optab, temp, temp1, temp, 1,
5200 expand_float (target, temp, 0);
5202 /* Multiply by 2 to undo the shift above. */
5203 temp = expand_binop (fmode, add_optab, target, target,
5204 target, 0, OPTAB_LIB_WIDEN);
5206 emit_move_insn (target, temp);
5208 do_pending_stack_adjust ();
5214 /* If we are about to do some arithmetic to correct for an
5215 unsigned operand, do it in a pseudo-register. */
5217 if (GET_MODE (to) != fmode
5218 || !REG_P (to) || REGNO (to) < FIRST_PSEUDO_REGISTER)
5219 target = gen_reg_rtx (fmode);
5221 /* Convert as signed integer to floating. */
5222 expand_float (target, from, 0);
5224 /* If FROM is negative (and therefore TO is negative),
5225 correct its value by 2**bitwidth. */
5227 do_pending_stack_adjust ();
5228 emit_cmp_and_jump_insns (from, const0_rtx, GE, NULL_RTX, GET_MODE (from),
5232 real_2expN (&offset, GET_MODE_BITSIZE (GET_MODE (from)));
5233 temp = expand_binop (fmode, add_optab, target,
5234 CONST_DOUBLE_FROM_REAL_VALUE (offset, fmode),
5235 target, 0, OPTAB_LIB_WIDEN);
5237 emit_move_insn (target, temp);
5239 do_pending_stack_adjust ();
5244 /* No hardware instruction available; call a library routine. */
5249 convert_optab tab = unsignedp ? ufloat_optab : sfloat_optab;
5251 if (GET_MODE_SIZE (GET_MODE (from)) < GET_MODE_SIZE (SImode))
5252 from = convert_to_mode (SImode, from, unsignedp);
5254 libfunc = convert_optab_libfunc (tab, GET_MODE (to), GET_MODE (from));
5255 gcc_assert (libfunc);
5259 value = emit_library_call_value (libfunc, NULL_RTX, LCT_CONST,
5260 GET_MODE (to), 1, from,
5262 insns = get_insns ();
5265 emit_libcall_block (insns, target, value,
5266 gen_rtx_FLOAT (GET_MODE (to), from));
5271 /* Copy result to requested destination
5272 if we have been computing in a temp location. */
5276 if (GET_MODE (target) == GET_MODE (to))
5277 emit_move_insn (to, target);
5279 convert_move (to, target, 0);
5283 /* Generate code to convert FROM to fixed point and store in TO. FROM
5284 must be floating point. */
5287 expand_fix (rtx to, rtx from, int unsignedp)
5289 enum insn_code icode;
5291 enum machine_mode fmode, imode;
5294 /* We first try to find a pair of modes, one real and one integer, at
5295 least as wide as FROM and TO, respectively, in which we can open-code
5296 this conversion. If the integer mode is wider than the mode of TO,
5297 we can do the conversion either signed or unsigned. */
5299 for (fmode = GET_MODE (from); fmode != VOIDmode;
5300 fmode = GET_MODE_WIDER_MODE (fmode))
5301 for (imode = GET_MODE (to); imode != VOIDmode;
5302 imode = GET_MODE_WIDER_MODE (imode))
5304 int doing_unsigned = unsignedp;
5306 icode = can_fix_p (imode, fmode, unsignedp, &must_trunc);
5307 if (icode == CODE_FOR_nothing && imode != GET_MODE (to) && unsignedp)
5308 icode = can_fix_p (imode, fmode, 0, &must_trunc), doing_unsigned = 0;
5310 if (icode != CODE_FOR_nothing)
5312 if (fmode != GET_MODE (from))
5313 from = convert_to_mode (fmode, from, 0);
5317 rtx temp = gen_reg_rtx (GET_MODE (from));
5318 from = expand_unop (GET_MODE (from), ftrunc_optab, from,
5322 if (imode != GET_MODE (to))
5323 target = gen_reg_rtx (imode);
5325 emit_unop_insn (icode, target, from,
5326 doing_unsigned ? UNSIGNED_FIX : FIX);
5328 convert_move (to, target, unsignedp);
5333 /* For an unsigned conversion, there is one more way to do it.
5334 If we have a signed conversion, we generate code that compares
5335 the real value to the largest representable positive number. If if
5336 is smaller, the conversion is done normally. Otherwise, subtract
5337 one plus the highest signed number, convert, and add it back.
5339 We only need to check all real modes, since we know we didn't find
5340 anything with a wider integer mode.
5342 This code used to extend FP value into mode wider than the destination.
5343 This is not needed. Consider, for instance conversion from SFmode
5346 The hot path through the code is dealing with inputs smaller than 2^63
5347 and doing just the conversion, so there is no bits to lose.
5349 In the other path we know the value is positive in the range 2^63..2^64-1
5350 inclusive. (as for other imput overflow happens and result is undefined)
5351 So we know that the most important bit set in mantissa corresponds to
5352 2^63. The subtraction of 2^63 should not generate any rounding as it
5353 simply clears out that bit. The rest is trivial. */
5355 if (unsignedp && GET_MODE_BITSIZE (GET_MODE (to)) <= HOST_BITS_PER_WIDE_INT)
5356 for (fmode = GET_MODE (from); fmode != VOIDmode;
5357 fmode = GET_MODE_WIDER_MODE (fmode))
5358 if (CODE_FOR_nothing != can_fix_p (GET_MODE (to), fmode, 0,
5362 REAL_VALUE_TYPE offset;
5363 rtx limit, lab1, lab2, insn;
5365 bitsize = GET_MODE_BITSIZE (GET_MODE (to));
5366 real_2expN (&offset, bitsize - 1);
5367 limit = CONST_DOUBLE_FROM_REAL_VALUE (offset, fmode);
5368 lab1 = gen_label_rtx ();
5369 lab2 = gen_label_rtx ();
5371 if (fmode != GET_MODE (from))
5372 from = convert_to_mode (fmode, from, 0);
5374 /* See if we need to do the subtraction. */
5375 do_pending_stack_adjust ();
5376 emit_cmp_and_jump_insns (from, limit, GE, NULL_RTX, GET_MODE (from),
5379 /* If not, do the signed "fix" and branch around fixup code. */
5380 expand_fix (to, from, 0);
5381 emit_jump_insn (gen_jump (lab2));
5384 /* Otherwise, subtract 2**(N-1), convert to signed number,
5385 then add 2**(N-1). Do the addition using XOR since this
5386 will often generate better code. */
5388 target = expand_binop (GET_MODE (from), sub_optab, from, limit,
5389 NULL_RTX, 0, OPTAB_LIB_WIDEN);
5390 expand_fix (to, target, 0);
5391 target = expand_binop (GET_MODE (to), xor_optab, to,
5393 ((HOST_WIDE_INT) 1 << (bitsize - 1),
5395 to, 1, OPTAB_LIB_WIDEN);
5398 emit_move_insn (to, target);
5402 if (optab_handler (mov_optab, GET_MODE (to))->insn_code
5403 != CODE_FOR_nothing)
5405 /* Make a place for a REG_NOTE and add it. */
5406 insn = emit_move_insn (to, to);
5407 set_unique_reg_note (insn,
5409 gen_rtx_fmt_e (UNSIGNED_FIX,
5417 /* We can't do it with an insn, so use a library call. But first ensure
5418 that the mode of TO is at least as wide as SImode, since those are the
5419 only library calls we know about. */
5421 if (GET_MODE_SIZE (GET_MODE (to)) < GET_MODE_SIZE (SImode))
5423 target = gen_reg_rtx (SImode);
5425 expand_fix (target, from, unsignedp);
5433 convert_optab tab = unsignedp ? ufix_optab : sfix_optab;
5434 libfunc = convert_optab_libfunc (tab, GET_MODE (to), GET_MODE (from));
5435 gcc_assert (libfunc);
5439 value = emit_library_call_value (libfunc, NULL_RTX, LCT_CONST,
5440 GET_MODE (to), 1, from,
5442 insns = get_insns ();
5445 emit_libcall_block (insns, target, value,
5446 gen_rtx_fmt_e (unsignedp ? UNSIGNED_FIX : FIX,
5447 GET_MODE (to), from));
5452 if (GET_MODE (to) == GET_MODE (target))
5453 emit_move_insn (to, target);
5455 convert_move (to, target, 0);
5459 /* Generate code to convert FROM or TO a fixed-point.
5460 If UINTP is true, either TO or FROM is an unsigned integer.
5461 If SATP is true, we need to saturate the result. */
5464 expand_fixed_convert (rtx to, rtx from, int uintp, int satp)
5466 enum machine_mode to_mode = GET_MODE (to);
5467 enum machine_mode from_mode = GET_MODE (from);
5469 enum rtx_code this_code;
5470 enum insn_code code;
5474 if (to_mode == from_mode)
5476 emit_move_insn (to, from);
5482 tab = satp ? satfractuns_optab : fractuns_optab;
5483 this_code = satp ? UNSIGNED_SAT_FRACT : UNSIGNED_FRACT_CONVERT;
5487 tab = satp ? satfract_optab : fract_optab;
5488 this_code = satp ? SAT_FRACT : FRACT_CONVERT;
5490 code = tab->handlers[to_mode][from_mode].insn_code;
5491 if (code != CODE_FOR_nothing)
5493 emit_unop_insn (code, to, from, this_code);
5497 libfunc = convert_optab_libfunc (tab, to_mode, from_mode);
5498 gcc_assert (libfunc);
5501 value = emit_library_call_value (libfunc, NULL_RTX, LCT_CONST, to_mode,
5502 1, from, from_mode);
5503 insns = get_insns ();
5506 emit_libcall_block (insns, to, value,
5507 gen_rtx_fmt_e (tab->code, to_mode, from));
5510 /* Generate code to convert FROM to fixed point and store in TO. FROM
5511 must be floating point, TO must be signed. Use the conversion optab
5512 TAB to do the conversion. */
5515 expand_sfix_optab (rtx to, rtx from, convert_optab tab)
5517 enum insn_code icode;
5519 enum machine_mode fmode, imode;
5521 /* We first try to find a pair of modes, one real and one integer, at
5522 least as wide as FROM and TO, respectively, in which we can open-code
5523 this conversion. If the integer mode is wider than the mode of TO,
5524 we can do the conversion either signed or unsigned. */
5526 for (fmode = GET_MODE (from); fmode != VOIDmode;
5527 fmode = GET_MODE_WIDER_MODE (fmode))
5528 for (imode = GET_MODE (to); imode != VOIDmode;
5529 imode = GET_MODE_WIDER_MODE (imode))
5531 icode = convert_optab_handler (tab, imode, fmode)->insn_code;
5532 if (icode != CODE_FOR_nothing)
5534 if (fmode != GET_MODE (from))
5535 from = convert_to_mode (fmode, from, 0);
5537 if (imode != GET_MODE (to))
5538 target = gen_reg_rtx (imode);
5540 emit_unop_insn (icode, target, from, UNKNOWN);
5542 convert_move (to, target, 0);
5550 /* Report whether we have an instruction to perform the operation
5551 specified by CODE on operands of mode MODE. */
5553 have_insn_for (enum rtx_code code, enum machine_mode mode)
5555 return (code_to_optab[(int) code] != 0
5556 && (optab_handler (code_to_optab[(int) code], mode)->insn_code
5557 != CODE_FOR_nothing));
5560 /* Create a blank optab. */
5565 optab op = xcalloc (sizeof (struct optab), 1);
5567 for (i = 0; i < NUM_MACHINE_MODES; i++)
5568 optab_handler (op, i)->insn_code = CODE_FOR_nothing;
5573 static convert_optab
5574 new_convert_optab (void)
5577 convert_optab op = xcalloc (sizeof (struct convert_optab), 1);
5579 for (i = 0; i < NUM_MACHINE_MODES; i++)
5580 for (j = 0; j < NUM_MACHINE_MODES; j++)
5581 convert_optab_handler (op, i, j)->insn_code = CODE_FOR_nothing;
5586 /* Same, but fill in its code as CODE, and write it into the
5587 code_to_optab table. */
5589 init_optab (enum rtx_code code)
5591 optab op = new_optab ();
5593 code_to_optab[(int) code] = op;
5597 /* Same, but fill in its code as CODE, and do _not_ write it into
5598 the code_to_optab table. */
5600 init_optabv (enum rtx_code code)
5602 optab op = new_optab ();
5607 /* Conversion optabs never go in the code_to_optab table. */
5608 static inline convert_optab
5609 init_convert_optab (enum rtx_code code)
5611 convert_optab op = new_convert_optab ();
5616 /* Initialize the libfunc fields of an entire group of entries in some
5617 optab. Each entry is set equal to a string consisting of a leading
5618 pair of underscores followed by a generic operation name followed by
5619 a mode name (downshifted to lowercase) followed by a single character
5620 representing the number of operands for the given operation (which is
5621 usually one of the characters '2', '3', or '4').
5623 OPTABLE is the table in which libfunc fields are to be initialized.
5624 OPNAME is the generic (string) name of the operation.
5625 SUFFIX is the character which specifies the number of operands for
5626 the given generic operation.
5627 MODE is the mode to generate for.
5631 gen_libfunc (optab optable, const char *opname, int suffix, enum machine_mode mode)
5633 unsigned opname_len = strlen (opname);
5634 const char *mname = GET_MODE_NAME (mode);
5635 unsigned mname_len = strlen (mname);
5636 char *libfunc_name = alloca (2 + opname_len + mname_len + 1 + 1);
5643 for (q = opname; *q; )
5645 for (q = mname; *q; q++)
5646 *p++ = TOLOWER (*q);
5650 set_optab_libfunc (optable, mode,
5651 ggc_alloc_string (libfunc_name, p - libfunc_name));
5654 /* Like gen_libfunc, but verify that integer operation is involved. */
5657 gen_int_libfunc (optab optable, const char *opname, char suffix,
5658 enum machine_mode mode)
5660 int maxsize = 2 * BITS_PER_WORD;
5662 if (GET_MODE_CLASS (mode) != MODE_INT)
5664 if (maxsize < LONG_LONG_TYPE_SIZE)
5665 maxsize = LONG_LONG_TYPE_SIZE;
5666 if (GET_MODE_CLASS (mode) != MODE_INT
5667 || mode < word_mode || GET_MODE_BITSIZE (mode) > maxsize)
5669 gen_libfunc (optable, opname, suffix, mode);
5672 /* Like gen_libfunc, but verify that FP and set decimal prefix if needed. */
5675 gen_fp_libfunc (optab optable, const char *opname, char suffix,
5676 enum machine_mode mode)
5680 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
5681 gen_libfunc (optable, opname, suffix, mode);
5682 if (DECIMAL_FLOAT_MODE_P (mode))
5684 dec_opname = alloca (sizeof (DECIMAL_PREFIX) + strlen (opname));
5685 /* For BID support, change the name to have either a bid_ or dpd_ prefix
5686 depending on the low level floating format used. */
5687 memcpy (dec_opname, DECIMAL_PREFIX, sizeof (DECIMAL_PREFIX) - 1);
5688 strcpy (dec_opname + sizeof (DECIMAL_PREFIX) - 1, opname);
5689 gen_libfunc (optable, dec_opname, suffix, mode);
5693 /* Like gen_libfunc, but verify that fixed-point operation is involved. */
5696 gen_fixed_libfunc (optab optable, const char *opname, char suffix,
5697 enum machine_mode mode)
5699 if (!ALL_FIXED_POINT_MODE_P (mode))
5701 gen_libfunc (optable, opname, suffix, mode);
5704 /* Like gen_libfunc, but verify that signed fixed-point operation is
5708 gen_signed_fixed_libfunc (optab optable, const char *opname, char suffix,
5709 enum machine_mode mode)
5711 if (!SIGNED_FIXED_POINT_MODE_P (mode))
5713 gen_libfunc (optable, opname, suffix, mode);
5716 /* Like gen_libfunc, but verify that unsigned fixed-point operation is
5720 gen_unsigned_fixed_libfunc (optab optable, const char *opname, char suffix,
5721 enum machine_mode mode)
5723 if (!UNSIGNED_FIXED_POINT_MODE_P (mode))
5725 gen_libfunc (optable, opname, suffix, mode);
5728 /* Like gen_libfunc, but verify that FP or INT operation is involved. */
5731 gen_int_fp_libfunc (optab optable, const char *name, char suffix,
5732 enum machine_mode mode)
5734 if (DECIMAL_FLOAT_MODE_P (mode) || GET_MODE_CLASS (mode) == MODE_FLOAT)
5735 gen_fp_libfunc (optable, name, suffix, mode);
5736 if (INTEGRAL_MODE_P (mode))
5737 gen_int_libfunc (optable, name, suffix, mode);
5740 /* Like gen_libfunc, but verify that FP or INT operation is involved
5741 and add 'v' suffix for integer operation. */
5744 gen_intv_fp_libfunc (optab optable, const char *name, char suffix,
5745 enum machine_mode mode)
5747 if (DECIMAL_FLOAT_MODE_P (mode) || GET_MODE_CLASS (mode) == MODE_FLOAT)
5748 gen_fp_libfunc (optable, name, suffix, mode);
5749 if (GET_MODE_CLASS (mode) == MODE_INT)
5751 int len = strlen (name);
5752 char *v_name = alloca (len + 2);
5753 strcpy (v_name, name);
5755 v_name[len + 1] = 0;
5756 gen_int_libfunc (optable, v_name, suffix, mode);
5760 /* Like gen_libfunc, but verify that FP or INT or FIXED operation is
5764 gen_int_fp_fixed_libfunc (optab optable, const char *name, char suffix,
5765 enum machine_mode mode)
5767 if (DECIMAL_FLOAT_MODE_P (mode) || GET_MODE_CLASS (mode) == MODE_FLOAT)
5768 gen_fp_libfunc (optable, name, suffix, mode);
5769 if (INTEGRAL_MODE_P (mode))
5770 gen_int_libfunc (optable, name, suffix, mode);
5771 if (ALL_FIXED_POINT_MODE_P (mode))
5772 gen_fixed_libfunc (optable, name, suffix, mode);
5775 /* Like gen_libfunc, but verify that FP or INT or signed FIXED operation is
5779 gen_int_fp_signed_fixed_libfunc (optab optable, const char *name, char suffix,
5780 enum machine_mode mode)
5782 if (DECIMAL_FLOAT_MODE_P (mode) || GET_MODE_CLASS (mode) == MODE_FLOAT)
5783 gen_fp_libfunc (optable, name, suffix, mode);
5784 if (INTEGRAL_MODE_P (mode))
5785 gen_int_libfunc (optable, name, suffix, mode);
5786 if (SIGNED_FIXED_POINT_MODE_P (mode))
5787 gen_signed_fixed_libfunc (optable, name, suffix, mode);
5790 /* Like gen_libfunc, but verify that INT or FIXED operation is
5794 gen_int_fixed_libfunc (optab optable, const char *name, char suffix,
5795 enum machine_mode mode)
5797 if (INTEGRAL_MODE_P (mode))
5798 gen_int_libfunc (optable, name, suffix, mode);
5799 if (ALL_FIXED_POINT_MODE_P (mode))
5800 gen_fixed_libfunc (optable, name, suffix, mode);
5803 /* Like gen_libfunc, but verify that INT or signed FIXED operation is
5807 gen_int_signed_fixed_libfunc (optab optable, const char *name, char suffix,
5808 enum machine_mode mode)
5810 if (INTEGRAL_MODE_P (mode))
5811 gen_int_libfunc (optable, name, suffix, mode);
5812 if (SIGNED_FIXED_POINT_MODE_P (mode))
5813 gen_signed_fixed_libfunc (optable, name, suffix, mode);
5816 /* Like gen_libfunc, but verify that INT or unsigned FIXED operation is
5820 gen_int_unsigned_fixed_libfunc (optab optable, const char *name, char suffix,
5821 enum machine_mode mode)
5823 if (INTEGRAL_MODE_P (mode))
5824 gen_int_libfunc (optable, name, suffix, mode);
5825 if (UNSIGNED_FIXED_POINT_MODE_P (mode))
5826 gen_unsigned_fixed_libfunc (optable, name, suffix, mode);
5829 /* Initialize the libfunc fields of an entire group of entries of an
5830 inter-mode-class conversion optab. The string formation rules are
5831 similar to the ones for init_libfuncs, above, but instead of having
5832 a mode name and an operand count these functions have two mode names
5833 and no operand count. */
5836 gen_interclass_conv_libfunc (convert_optab tab,
5838 enum machine_mode tmode,
5839 enum machine_mode fmode)
5841 size_t opname_len = strlen (opname);
5842 size_t mname_len = 0;
5844 const char *fname, *tname;
5846 char *libfunc_name, *suffix;
5847 char *nondec_name, *dec_name, *nondec_suffix, *dec_suffix;
5850 /* If this is a decimal conversion, add the current BID vs. DPD prefix that
5851 depends on which underlying decimal floating point format is used. */
5852 const size_t dec_len = sizeof (DECIMAL_PREFIX) - 1;
5854 mname_len = strlen (GET_MODE_NAME (tmode)) + strlen (GET_MODE_NAME (fmode));
5856 nondec_name = alloca (2 + opname_len + mname_len + 1 + 1);
5857 nondec_name[0] = '_';
5858 nondec_name[1] = '_';
5859 memcpy (&nondec_name[2], opname, opname_len);
5860 nondec_suffix = nondec_name + opname_len + 2;
5862 dec_name = alloca (2 + dec_len + opname_len + mname_len + 1 + 1);
5865 memcpy (&dec_name[2], DECIMAL_PREFIX, dec_len);
5866 memcpy (&dec_name[2+dec_len], opname, opname_len);
5867 dec_suffix = dec_name + dec_len + opname_len + 2;
5869 fname = GET_MODE_NAME (fmode);
5870 tname = GET_MODE_NAME (tmode);
5872 if (DECIMAL_FLOAT_MODE_P(fmode) || DECIMAL_FLOAT_MODE_P(tmode))
5874 libfunc_name = dec_name;
5875 suffix = dec_suffix;
5879 libfunc_name = nondec_name;
5880 suffix = nondec_suffix;
5884 for (q = fname; *q; p++, q++)
5886 for (q = tname; *q; p++, q++)
5891 set_conv_libfunc (tab, tmode, fmode,
5892 ggc_alloc_string (libfunc_name, p - libfunc_name));
5895 /* Same as gen_interclass_conv_libfunc but verify that we are producing
5896 int->fp conversion. */
5899 gen_int_to_fp_conv_libfunc (convert_optab tab,
5901 enum machine_mode tmode,
5902 enum machine_mode fmode)
5904 if (GET_MODE_CLASS (fmode) != MODE_INT)
5906 if (GET_MODE_CLASS (tmode) != MODE_FLOAT && !DECIMAL_FLOAT_MODE_P (tmode))
5908 gen_interclass_conv_libfunc (tab, opname, tmode, fmode);
5911 /* ufloat_optab is special by using floatun for FP and floatuns decimal fp
5915 gen_ufloat_conv_libfunc (convert_optab tab,
5916 const char *opname ATTRIBUTE_UNUSED,
5917 enum machine_mode tmode,
5918 enum machine_mode fmode)
5920 if (DECIMAL_FLOAT_MODE_P (tmode))
5921 gen_int_to_fp_conv_libfunc (tab, "floatuns", tmode, fmode);
5923 gen_int_to_fp_conv_libfunc (tab, "floatun", tmode, fmode);
5926 /* Same as gen_interclass_conv_libfunc but verify that we are producing
5927 fp->int conversion. */
5930 gen_int_to_fp_nondecimal_conv_libfunc (convert_optab tab,
5932 enum machine_mode tmode,
5933 enum machine_mode fmode)
5935 if (GET_MODE_CLASS (fmode) != MODE_INT)
5937 if (GET_MODE_CLASS (tmode) != MODE_FLOAT)
5939 gen_interclass_conv_libfunc (tab, opname, tmode, fmode);
5942 /* Same as gen_interclass_conv_libfunc but verify that we are producing
5943 fp->int conversion with no decimal floating point involved. */
5946 gen_fp_to_int_conv_libfunc (convert_optab tab,
5948 enum machine_mode tmode,
5949 enum machine_mode fmode)
5951 if (GET_MODE_CLASS (fmode) != MODE_FLOAT && !DECIMAL_FLOAT_MODE_P (fmode))
5953 if (GET_MODE_CLASS (tmode) != MODE_INT)
5955 gen_interclass_conv_libfunc (tab, opname, tmode, fmode);
5958 /* Initialize the libfunc fiels of an of an intra-mode-class conversion optab.
5959 The string formation rules are
5960 similar to the ones for init_libfunc, above. */
5963 gen_intraclass_conv_libfunc (convert_optab tab, const char *opname,
5964 enum machine_mode tmode, enum machine_mode fmode)
5966 size_t opname_len = strlen (opname);
5967 size_t mname_len = 0;
5969 const char *fname, *tname;
5971 char *nondec_name, *dec_name, *nondec_suffix, *dec_suffix;
5972 char *libfunc_name, *suffix;
5975 /* If this is a decimal conversion, add the current BID vs. DPD prefix that
5976 depends on which underlying decimal floating point format is used. */
5977 const size_t dec_len = sizeof (DECIMAL_PREFIX) - 1;
5979 mname_len = strlen (GET_MODE_NAME (tmode)) + strlen (GET_MODE_NAME (fmode));
5981 nondec_name = alloca (2 + opname_len + mname_len + 1 + 1);
5982 nondec_name[0] = '_';
5983 nondec_name[1] = '_';
5984 memcpy (&nondec_name[2], opname, opname_len);
5985 nondec_suffix = nondec_name + opname_len + 2;
5987 dec_name = alloca (2 + dec_len + opname_len + mname_len + 1 + 1);
5990 memcpy (&dec_name[2], DECIMAL_PREFIX, dec_len);
5991 memcpy (&dec_name[2 + dec_len], opname, opname_len);
5992 dec_suffix = dec_name + dec_len + opname_len + 2;
5994 fname = GET_MODE_NAME (fmode);
5995 tname = GET_MODE_NAME (tmode);
5997 if (DECIMAL_FLOAT_MODE_P(fmode) || DECIMAL_FLOAT_MODE_P(tmode))
5999 libfunc_name = dec_name;
6000 suffix = dec_suffix;
6004 libfunc_name = nondec_name;
6005 suffix = nondec_suffix;
6009 for (q = fname; *q; p++, q++)
6011 for (q = tname; *q; p++, q++)
6017 set_conv_libfunc (tab, tmode, fmode,
6018 ggc_alloc_string (libfunc_name, p - libfunc_name));
6021 /* Pick proper libcall for trunc_optab. We need to chose if we do
6022 truncation or extension and interclass or intraclass. */
6025 gen_trunc_conv_libfunc (convert_optab tab,
6027 enum machine_mode tmode,
6028 enum machine_mode fmode)
6030 if (GET_MODE_CLASS (tmode) != MODE_FLOAT && !DECIMAL_FLOAT_MODE_P (tmode))
6032 if (GET_MODE_CLASS (fmode) != MODE_FLOAT && !DECIMAL_FLOAT_MODE_P (fmode))
6037 if ((GET_MODE_CLASS (tmode) == MODE_FLOAT && DECIMAL_FLOAT_MODE_P (fmode))
6038 || (GET_MODE_CLASS (fmode) == MODE_FLOAT && DECIMAL_FLOAT_MODE_P (tmode)))
6039 gen_interclass_conv_libfunc (tab, opname, tmode, fmode);
6041 if (GET_MODE_PRECISION (fmode) <= GET_MODE_PRECISION (tmode))
6044 if ((GET_MODE_CLASS (tmode) == MODE_FLOAT
6045 && GET_MODE_CLASS (fmode) == MODE_FLOAT)
6046 || (DECIMAL_FLOAT_MODE_P (fmode) && DECIMAL_FLOAT_MODE_P (tmode)))
6047 gen_intraclass_conv_libfunc (tab, opname, tmode, fmode);
6050 /* Pick proper libcall for extend_optab. We need to chose if we do
6051 truncation or extension and interclass or intraclass. */
6054 gen_extend_conv_libfunc (convert_optab tab,
6055 const char *opname ATTRIBUTE_UNUSED,
6056 enum machine_mode tmode,
6057 enum machine_mode fmode)
6059 if (GET_MODE_CLASS (tmode) != MODE_FLOAT && !DECIMAL_FLOAT_MODE_P (tmode))
6061 if (GET_MODE_CLASS (fmode) != MODE_FLOAT && !DECIMAL_FLOAT_MODE_P (fmode))
6066 if ((GET_MODE_CLASS (tmode) == MODE_FLOAT && DECIMAL_FLOAT_MODE_P (fmode))
6067 || (GET_MODE_CLASS (fmode) == MODE_FLOAT && DECIMAL_FLOAT_MODE_P (tmode)))
6068 gen_interclass_conv_libfunc (tab, opname, tmode, fmode);
6070 if (GET_MODE_PRECISION (fmode) > GET_MODE_PRECISION (tmode))
6073 if ((GET_MODE_CLASS (tmode) == MODE_FLOAT
6074 && GET_MODE_CLASS (fmode) == MODE_FLOAT)
6075 || (DECIMAL_FLOAT_MODE_P (fmode) && DECIMAL_FLOAT_MODE_P (tmode)))
6076 gen_intraclass_conv_libfunc (tab, opname, tmode, fmode);
6079 /* Pick proper libcall for fract_optab. We need to chose if we do
6080 interclass or intraclass. */
6083 gen_fract_conv_libfunc (convert_optab tab,
6085 enum machine_mode tmode,
6086 enum machine_mode fmode)
6090 if (!(ALL_FIXED_POINT_MODE_P (tmode) || ALL_FIXED_POINT_MODE_P (fmode)))
6093 if (GET_MODE_CLASS (tmode) == GET_MODE_CLASS (fmode))
6094 gen_intraclass_conv_libfunc (tab, opname, tmode, fmode);
6096 gen_interclass_conv_libfunc (tab, opname, tmode, fmode);
6099 /* Pick proper libcall for fractuns_optab. */
6102 gen_fractuns_conv_libfunc (convert_optab tab,
6104 enum machine_mode tmode,
6105 enum machine_mode fmode)
6109 /* One mode must be a fixed-point mode, and the other must be an integer
6111 if (!((ALL_FIXED_POINT_MODE_P (tmode) && GET_MODE_CLASS (fmode) == MODE_INT)
6112 || (ALL_FIXED_POINT_MODE_P (fmode)
6113 && GET_MODE_CLASS (tmode) == MODE_INT)))
6116 gen_interclass_conv_libfunc (tab, opname, tmode, fmode);
6119 /* Pick proper libcall for satfract_optab. We need to chose if we do
6120 interclass or intraclass. */
6123 gen_satfract_conv_libfunc (convert_optab tab,
6125 enum machine_mode tmode,
6126 enum machine_mode fmode)
6130 /* TMODE must be a fixed-point mode. */
6131 if (!ALL_FIXED_POINT_MODE_P (tmode))
6134 if (GET_MODE_CLASS (tmode) == GET_MODE_CLASS (fmode))
6135 gen_intraclass_conv_libfunc (tab, opname, tmode, fmode);
6137 gen_interclass_conv_libfunc (tab, opname, tmode, fmode);
6140 /* Pick proper libcall for satfractuns_optab. */
6143 gen_satfractuns_conv_libfunc (convert_optab tab,
6145 enum machine_mode tmode,
6146 enum machine_mode fmode)
6150 /* TMODE must be a fixed-point mode, and FMODE must be an integer mode. */
6151 if (!(ALL_FIXED_POINT_MODE_P (tmode) && GET_MODE_CLASS (fmode) == MODE_INT))
6154 gen_interclass_conv_libfunc (tab, opname, tmode, fmode);
6158 init_one_libfunc (const char *name)
6162 /* Create a FUNCTION_DECL that can be passed to
6163 targetm.encode_section_info. */
6164 /* ??? We don't have any type information except for this is
6165 a function. Pretend this is "int foo()". */
6166 tree decl = build_decl (FUNCTION_DECL, get_identifier (name),
6167 build_function_type (integer_type_node, NULL_TREE));
6168 DECL_ARTIFICIAL (decl) = 1;
6169 DECL_EXTERNAL (decl) = 1;
6170 TREE_PUBLIC (decl) = 1;
6172 symbol = XEXP (DECL_RTL (decl), 0);
6174 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
6175 are the flags assigned by targetm.encode_section_info. */
6176 SET_SYMBOL_REF_DECL (symbol, 0);
6181 /* Call this to reset the function entry for one optab (OPTABLE) in mode
6182 MODE to NAME, which should be either 0 or a string constant. */
6184 set_optab_libfunc (optab optable, enum machine_mode mode, const char *name)
6187 struct libfunc_entry e;
6188 struct libfunc_entry **slot;
6189 e.optab = (size_t) (optab_table[0] - optable);
6194 val = init_one_libfunc (name);
6197 slot = (struct libfunc_entry **) htab_find_slot (libfunc_hash, &e, INSERT);
6199 *slot = ggc_alloc (sizeof (struct libfunc_entry));
6200 (*slot)->optab = (size_t) (optab_table[0] - optable);
6201 (*slot)->mode1 = mode;
6202 (*slot)->mode2 = VOIDmode;
6203 (*slot)->libfunc = val;
6206 /* Call this to reset the function entry for one conversion optab
6207 (OPTABLE) from mode FMODE to mode TMODE to NAME, which should be
6208 either 0 or a string constant. */
6210 set_conv_libfunc (convert_optab optable, enum machine_mode tmode,
6211 enum machine_mode fmode, const char *name)
6214 struct libfunc_entry e;
6215 struct libfunc_entry **slot;
6216 e.optab = (size_t) (convert_optab_table[0] - optable);
6221 val = init_one_libfunc (name);
6224 slot = (struct libfunc_entry **) htab_find_slot (libfunc_hash, &e, INSERT);
6226 *slot = ggc_alloc (sizeof (struct libfunc_entry));
6227 (*slot)->optab = (size_t) (convert_optab_table[0] - optable);
6228 (*slot)->mode1 = tmode;
6229 (*slot)->mode2 = fmode;
6230 (*slot)->libfunc = val;
6233 /* Call this to initialize the contents of the optabs
6234 appropriately for the current target machine. */
6240 enum machine_mode int_mode;
6242 libfunc_hash = htab_create_ggc (10, hash_libfunc, eq_libfunc, NULL);
6243 /* Start by initializing all tables to contain CODE_FOR_nothing. */
6245 for (i = 0; i < NUM_RTX_CODE; i++)
6246 setcc_gen_code[i] = CODE_FOR_nothing;
6248 #ifdef HAVE_conditional_move
6249 for (i = 0; i < NUM_MACHINE_MODES; i++)
6250 movcc_gen_code[i] = CODE_FOR_nothing;
6253 for (i = 0; i < NUM_MACHINE_MODES; i++)
6255 vcond_gen_code[i] = CODE_FOR_nothing;
6256 vcondu_gen_code[i] = CODE_FOR_nothing;
6259 add_optab = init_optab (PLUS);
6260 addv_optab = init_optabv (PLUS);
6261 sub_optab = init_optab (MINUS);
6262 subv_optab = init_optabv (MINUS);
6263 ssadd_optab = init_optab (SS_PLUS);
6264 usadd_optab = init_optab (US_PLUS);
6265 sssub_optab = init_optab (SS_MINUS);
6266 ussub_optab = init_optab (US_MINUS);
6267 smul_optab = init_optab (MULT);
6268 ssmul_optab = init_optab (SS_MULT);
6269 usmul_optab = init_optab (US_MULT);
6270 smulv_optab = init_optabv (MULT);
6271 smul_highpart_optab = init_optab (UNKNOWN);
6272 umul_highpart_optab = init_optab (UNKNOWN);
6273 smul_widen_optab = init_optab (UNKNOWN);
6274 umul_widen_optab = init_optab (UNKNOWN);
6275 usmul_widen_optab = init_optab (UNKNOWN);
6276 smadd_widen_optab = init_optab (UNKNOWN);
6277 umadd_widen_optab = init_optab (UNKNOWN);
6278 ssmadd_widen_optab = init_optab (UNKNOWN);
6279 usmadd_widen_optab = init_optab (UNKNOWN);
6280 smsub_widen_optab = init_optab (UNKNOWN);
6281 umsub_widen_optab = init_optab (UNKNOWN);
6282 ssmsub_widen_optab = init_optab (UNKNOWN);
6283 usmsub_widen_optab = init_optab (UNKNOWN);
6284 sdiv_optab = init_optab (DIV);
6285 ssdiv_optab = init_optab (SS_DIV);
6286 usdiv_optab = init_optab (US_DIV);
6287 sdivv_optab = init_optabv (DIV);
6288 sdivmod_optab = init_optab (UNKNOWN);
6289 udiv_optab = init_optab (UDIV);
6290 udivmod_optab = init_optab (UNKNOWN);
6291 smod_optab = init_optab (MOD);
6292 umod_optab = init_optab (UMOD);
6293 fmod_optab = init_optab (UNKNOWN);
6294 remainder_optab = init_optab (UNKNOWN);
6295 ftrunc_optab = init_optab (UNKNOWN);
6296 and_optab = init_optab (AND);
6297 ior_optab = init_optab (IOR);
6298 xor_optab = init_optab (XOR);
6299 ashl_optab = init_optab (ASHIFT);
6300 ssashl_optab = init_optab (SS_ASHIFT);
6301 usashl_optab = init_optab (US_ASHIFT);
6302 ashr_optab = init_optab (ASHIFTRT);
6303 lshr_optab = init_optab (LSHIFTRT);
6304 rotl_optab = init_optab (ROTATE);
6305 rotr_optab = init_optab (ROTATERT);
6306 smin_optab = init_optab (SMIN);
6307 smax_optab = init_optab (SMAX);
6308 umin_optab = init_optab (UMIN);
6309 umax_optab = init_optab (UMAX);
6310 pow_optab = init_optab (UNKNOWN);
6311 atan2_optab = init_optab (UNKNOWN);
6313 /* These three have codes assigned exclusively for the sake of
6315 mov_optab = init_optab (SET);
6316 movstrict_optab = init_optab (STRICT_LOW_PART);
6317 cmp_optab = init_optab (COMPARE);
6319 storent_optab = init_optab (UNKNOWN);
6321 ucmp_optab = init_optab (UNKNOWN);
6322 tst_optab = init_optab (UNKNOWN);
6324 eq_optab = init_optab (EQ);
6325 ne_optab = init_optab (NE);
6326 gt_optab = init_optab (GT);
6327 ge_optab = init_optab (GE);
6328 lt_optab = init_optab (LT);
6329 le_optab = init_optab (LE);
6330 unord_optab = init_optab (UNORDERED);
6332 neg_optab = init_optab (NEG);
6333 ssneg_optab = init_optab (SS_NEG);
6334 usneg_optab = init_optab (US_NEG);
6335 negv_optab = init_optabv (NEG);
6336 abs_optab = init_optab (ABS);
6337 absv_optab = init_optabv (ABS);
6338 addcc_optab = init_optab (UNKNOWN);
6339 one_cmpl_optab = init_optab (NOT);
6340 bswap_optab = init_optab (BSWAP);
6341 ffs_optab = init_optab (FFS);
6342 clz_optab = init_optab (CLZ);
6343 ctz_optab = init_optab (CTZ);
6344 popcount_optab = init_optab (POPCOUNT);
6345 parity_optab = init_optab (PARITY);
6346 sqrt_optab = init_optab (SQRT);
6347 floor_optab = init_optab (UNKNOWN);
6348 ceil_optab = init_optab (UNKNOWN);
6349 round_optab = init_optab (UNKNOWN);
6350 btrunc_optab = init_optab (UNKNOWN);
6351 nearbyint_optab = init_optab (UNKNOWN);
6352 rint_optab = init_optab (UNKNOWN);
6353 sincos_optab = init_optab (UNKNOWN);
6354 sin_optab = init_optab (UNKNOWN);
6355 asin_optab = init_optab (UNKNOWN);
6356 cos_optab = init_optab (UNKNOWN);
6357 acos_optab = init_optab (UNKNOWN);
6358 exp_optab = init_optab (UNKNOWN);
6359 exp10_optab = init_optab (UNKNOWN);
6360 exp2_optab = init_optab (UNKNOWN);
6361 expm1_optab = init_optab (UNKNOWN);
6362 ldexp_optab = init_optab (UNKNOWN);
6363 scalb_optab = init_optab (UNKNOWN);
6364 logb_optab = init_optab (UNKNOWN);
6365 ilogb_optab = init_optab (UNKNOWN);
6366 log_optab = init_optab (UNKNOWN);
6367 log10_optab = init_optab (UNKNOWN);
6368 log2_optab = init_optab (UNKNOWN);
6369 log1p_optab = init_optab (UNKNOWN);
6370 tan_optab = init_optab (UNKNOWN);
6371 atan_optab = init_optab (UNKNOWN);
6372 copysign_optab = init_optab (UNKNOWN);
6373 signbit_optab = init_optab (UNKNOWN);
6375 isinf_optab = init_optab (UNKNOWN);
6377 strlen_optab = init_optab (UNKNOWN);
6378 cbranch_optab = init_optab (UNKNOWN);
6379 cmov_optab = init_optab (UNKNOWN);
6380 cstore_optab = init_optab (UNKNOWN);
6381 push_optab = init_optab (UNKNOWN);
6383 reduc_smax_optab = init_optab (UNKNOWN);
6384 reduc_umax_optab = init_optab (UNKNOWN);
6385 reduc_smin_optab = init_optab (UNKNOWN);
6386 reduc_umin_optab = init_optab (UNKNOWN);
6387 reduc_splus_optab = init_optab (UNKNOWN);
6388 reduc_uplus_optab = init_optab (UNKNOWN);
6390 ssum_widen_optab = init_optab (UNKNOWN);
6391 usum_widen_optab = init_optab (UNKNOWN);
6392 sdot_prod_optab = init_optab (UNKNOWN);
6393 udot_prod_optab = init_optab (UNKNOWN);
6395 vec_extract_optab = init_optab (UNKNOWN);
6396 vec_extract_even_optab = init_optab (UNKNOWN);
6397 vec_extract_odd_optab = init_optab (UNKNOWN);
6398 vec_interleave_high_optab = init_optab (UNKNOWN);
6399 vec_interleave_low_optab = init_optab (UNKNOWN);
6400 vec_set_optab = init_optab (UNKNOWN);
6401 vec_init_optab = init_optab (UNKNOWN);
6402 vec_shl_optab = init_optab (UNKNOWN);
6403 vec_shr_optab = init_optab (UNKNOWN);
6404 vec_realign_load_optab = init_optab (UNKNOWN);
6405 movmisalign_optab = init_optab (UNKNOWN);
6406 vec_widen_umult_hi_optab = init_optab (UNKNOWN);
6407 vec_widen_umult_lo_optab = init_optab (UNKNOWN);
6408 vec_widen_smult_hi_optab = init_optab (UNKNOWN);
6409 vec_widen_smult_lo_optab = init_optab (UNKNOWN);
6410 vec_unpacks_hi_optab = init_optab (UNKNOWN);
6411 vec_unpacks_lo_optab = init_optab (UNKNOWN);
6412 vec_unpacku_hi_optab = init_optab (UNKNOWN);
6413 vec_unpacku_lo_optab = init_optab (UNKNOWN);
6414 vec_unpacks_float_hi_optab = init_optab (UNKNOWN);
6415 vec_unpacks_float_lo_optab = init_optab (UNKNOWN);
6416 vec_unpacku_float_hi_optab = init_optab (UNKNOWN);
6417 vec_unpacku_float_lo_optab = init_optab (UNKNOWN);
6418 vec_pack_trunc_optab = init_optab (UNKNOWN);
6419 vec_pack_usat_optab = init_optab (UNKNOWN);
6420 vec_pack_ssat_optab = init_optab (UNKNOWN);
6421 vec_pack_ufix_trunc_optab = init_optab (UNKNOWN);
6422 vec_pack_sfix_trunc_optab = init_optab (UNKNOWN);
6424 powi_optab = init_optab (UNKNOWN);
6427 sext_optab = init_convert_optab (SIGN_EXTEND);
6428 zext_optab = init_convert_optab (ZERO_EXTEND);
6429 trunc_optab = init_convert_optab (TRUNCATE);
6430 sfix_optab = init_convert_optab (FIX);
6431 ufix_optab = init_convert_optab (UNSIGNED_FIX);
6432 sfixtrunc_optab = init_convert_optab (UNKNOWN);
6433 ufixtrunc_optab = init_convert_optab (UNKNOWN);
6434 sfloat_optab = init_convert_optab (FLOAT);
6435 ufloat_optab = init_convert_optab (UNSIGNED_FLOAT);
6436 lrint_optab = init_convert_optab (UNKNOWN);
6437 lround_optab = init_convert_optab (UNKNOWN);
6438 lfloor_optab = init_convert_optab (UNKNOWN);
6439 lceil_optab = init_convert_optab (UNKNOWN);
6441 fract_optab = init_convert_optab (FRACT_CONVERT);
6442 fractuns_optab = init_convert_optab (UNSIGNED_FRACT_CONVERT);
6443 satfract_optab = init_convert_optab (SAT_FRACT);
6444 satfractuns_optab = init_convert_optab (UNSIGNED_SAT_FRACT);
6446 for (i = 0; i < NUM_MACHINE_MODES; i++)
6448 movmem_optab[i] = CODE_FOR_nothing;
6449 cmpstr_optab[i] = CODE_FOR_nothing;
6450 cmpstrn_optab[i] = CODE_FOR_nothing;
6451 cmpmem_optab[i] = CODE_FOR_nothing;
6452 setmem_optab[i] = CODE_FOR_nothing;
6454 sync_add_optab[i] = CODE_FOR_nothing;
6455 sync_sub_optab[i] = CODE_FOR_nothing;
6456 sync_ior_optab[i] = CODE_FOR_nothing;
6457 sync_and_optab[i] = CODE_FOR_nothing;
6458 sync_xor_optab[i] = CODE_FOR_nothing;
6459 sync_nand_optab[i] = CODE_FOR_nothing;
6460 sync_old_add_optab[i] = CODE_FOR_nothing;
6461 sync_old_sub_optab[i] = CODE_FOR_nothing;
6462 sync_old_ior_optab[i] = CODE_FOR_nothing;
6463 sync_old_and_optab[i] = CODE_FOR_nothing;
6464 sync_old_xor_optab[i] = CODE_FOR_nothing;
6465 sync_old_nand_optab[i] = CODE_FOR_nothing;
6466 sync_new_add_optab[i] = CODE_FOR_nothing;
6467 sync_new_sub_optab[i] = CODE_FOR_nothing;
6468 sync_new_ior_optab[i] = CODE_FOR_nothing;
6469 sync_new_and_optab[i] = CODE_FOR_nothing;
6470 sync_new_xor_optab[i] = CODE_FOR_nothing;
6471 sync_new_nand_optab[i] = CODE_FOR_nothing;
6472 sync_compare_and_swap[i] = CODE_FOR_nothing;
6473 sync_compare_and_swap_cc[i] = CODE_FOR_nothing;
6474 sync_lock_test_and_set[i] = CODE_FOR_nothing;
6475 sync_lock_release[i] = CODE_FOR_nothing;
6477 reload_in_optab[i] = reload_out_optab[i] = CODE_FOR_nothing;
6480 /* Fill in the optabs with the insns we support. */
6483 /* Initialize the optabs with the names of the library functions. */
6484 add_optab->libcall_basename = "add";
6485 add_optab->libcall_suffix = '3';
6486 add_optab->libcall_gen = gen_int_fp_fixed_libfunc;
6487 addv_optab->libcall_basename = "add";
6488 addv_optab->libcall_suffix = '3';
6489 addv_optab->libcall_gen = gen_intv_fp_libfunc;
6490 ssadd_optab->libcall_basename = "ssadd";
6491 ssadd_optab->libcall_suffix = '3';
6492 ssadd_optab->libcall_gen = gen_signed_fixed_libfunc;
6493 usadd_optab->libcall_basename = "usadd";
6494 usadd_optab->libcall_suffix = '3';
6495 usadd_optab->libcall_gen = gen_unsigned_fixed_libfunc;
6496 sub_optab->libcall_basename = "sub";
6497 sub_optab->libcall_suffix = '3';
6498 sub_optab->libcall_gen = gen_int_fp_fixed_libfunc;
6499 subv_optab->libcall_basename = "sub";
6500 subv_optab->libcall_suffix = '3';
6501 subv_optab->libcall_gen = gen_intv_fp_libfunc;
6502 sssub_optab->libcall_basename = "sssub";
6503 sssub_optab->libcall_suffix = '3';
6504 sssub_optab->libcall_gen = gen_signed_fixed_libfunc;
6505 ussub_optab->libcall_basename = "ussub";
6506 ussub_optab->libcall_suffix = '3';
6507 ussub_optab->libcall_gen = gen_unsigned_fixed_libfunc;
6508 smul_optab->libcall_basename = "mul";
6509 smul_optab->libcall_suffix = '3';
6510 smul_optab->libcall_gen = gen_int_fp_fixed_libfunc;
6511 smulv_optab->libcall_basename = "mul";
6512 smulv_optab->libcall_suffix = '3';
6513 smulv_optab->libcall_gen = gen_intv_fp_libfunc;
6514 ssmul_optab->libcall_basename = "ssmul";
6515 ssmul_optab->libcall_suffix = '3';
6516 ssmul_optab->libcall_gen = gen_signed_fixed_libfunc;
6517 usmul_optab->libcall_basename = "usmul";
6518 usmul_optab->libcall_suffix = '3';
6519 usmul_optab->libcall_gen = gen_unsigned_fixed_libfunc;
6520 sdiv_optab->libcall_basename = "div";
6521 sdiv_optab->libcall_suffix = '3';
6522 sdiv_optab->libcall_gen = gen_int_fp_signed_fixed_libfunc;
6523 sdivv_optab->libcall_basename = "divv";
6524 sdivv_optab->libcall_suffix = '3';
6525 sdivv_optab->libcall_gen = gen_int_libfunc;
6526 ssdiv_optab->libcall_basename = "ssdiv";
6527 ssdiv_optab->libcall_suffix = '3';
6528 ssdiv_optab->libcall_gen = gen_signed_fixed_libfunc;
6529 udiv_optab->libcall_basename = "udiv";
6530 udiv_optab->libcall_suffix = '3';
6531 udiv_optab->libcall_gen = gen_int_unsigned_fixed_libfunc;
6532 usdiv_optab->libcall_basename = "usdiv";
6533 usdiv_optab->libcall_suffix = '3';
6534 usdiv_optab->libcall_gen = gen_unsigned_fixed_libfunc;
6535 sdivmod_optab->libcall_basename = "divmod";
6536 sdivmod_optab->libcall_suffix = '4';
6537 sdivmod_optab->libcall_gen = gen_int_libfunc;
6538 udivmod_optab->libcall_basename = "udivmod";
6539 udivmod_optab->libcall_suffix = '4';
6540 udivmod_optab->libcall_gen = gen_int_libfunc;
6541 smod_optab->libcall_basename = "mod";
6542 smod_optab->libcall_suffix = '3';
6543 smod_optab->libcall_gen = gen_int_libfunc;
6544 umod_optab->libcall_basename = "umod";
6545 umod_optab->libcall_suffix = '3';
6546 umod_optab->libcall_gen = gen_int_libfunc;
6547 ftrunc_optab->libcall_basename = "ftrunc";
6548 ftrunc_optab->libcall_suffix = '2';
6549 ftrunc_optab->libcall_gen = gen_fp_libfunc;
6550 and_optab->libcall_basename = "and";
6551 and_optab->libcall_suffix = '3';
6552 and_optab->libcall_gen = gen_int_libfunc;
6553 ior_optab->libcall_basename = "ior";
6554 ior_optab->libcall_suffix = '3';
6555 ior_optab->libcall_gen = gen_int_libfunc;
6556 xor_optab->libcall_basename = "xor";
6557 xor_optab->libcall_suffix = '3';
6558 xor_optab->libcall_gen = gen_int_libfunc;
6559 ashl_optab->libcall_basename = "ashl";
6560 ashl_optab->libcall_suffix = '3';
6561 ashl_optab->libcall_gen = gen_int_fixed_libfunc;
6562 ssashl_optab->libcall_basename = "ssashl";
6563 ssashl_optab->libcall_suffix = '3';
6564 ssashl_optab->libcall_gen = gen_signed_fixed_libfunc;
6565 usashl_optab->libcall_basename = "usashl";
6566 usashl_optab->libcall_suffix = '3';
6567 usashl_optab->libcall_gen = gen_unsigned_fixed_libfunc;
6568 ashr_optab->libcall_basename = "ashr";
6569 ashr_optab->libcall_suffix = '3';
6570 ashr_optab->libcall_gen = gen_int_signed_fixed_libfunc;
6571 lshr_optab->libcall_basename = "lshr";
6572 lshr_optab->libcall_suffix = '3';
6573 lshr_optab->libcall_gen = gen_int_unsigned_fixed_libfunc;
6574 smin_optab->libcall_basename = "min";
6575 smin_optab->libcall_suffix = '3';
6576 smin_optab->libcall_gen = gen_int_fp_libfunc;
6577 smax_optab->libcall_basename = "max";
6578 smax_optab->libcall_suffix = '3';
6579 smax_optab->libcall_gen = gen_int_fp_libfunc;
6580 umin_optab->libcall_basename = "umin";
6581 umin_optab->libcall_suffix = '3';
6582 umin_optab->libcall_gen = gen_int_libfunc;
6583 umax_optab->libcall_basename = "umax";
6584 umax_optab->libcall_suffix = '3';
6585 umax_optab->libcall_gen = gen_int_libfunc;
6586 neg_optab->libcall_basename = "neg";
6587 neg_optab->libcall_suffix = '2';
6588 neg_optab->libcall_gen = gen_int_fp_fixed_libfunc;
6589 ssneg_optab->libcall_basename = "ssneg";
6590 ssneg_optab->libcall_suffix = '2';
6591 ssneg_optab->libcall_gen = gen_signed_fixed_libfunc;
6592 usneg_optab->libcall_basename = "usneg";
6593 usneg_optab->libcall_suffix = '2';
6594 usneg_optab->libcall_gen = gen_unsigned_fixed_libfunc;
6595 negv_optab->libcall_basename = "neg";
6596 negv_optab->libcall_suffix = '2';
6597 negv_optab->libcall_gen = gen_intv_fp_libfunc;
6598 one_cmpl_optab->libcall_basename = "one_cmpl";
6599 one_cmpl_optab->libcall_suffix = '2';
6600 one_cmpl_optab->libcall_gen = gen_int_libfunc;
6601 ffs_optab->libcall_basename = "ffs";
6602 ffs_optab->libcall_suffix = '2';
6603 ffs_optab->libcall_gen = gen_int_libfunc;
6604 clz_optab->libcall_basename = "clz";
6605 clz_optab->libcall_suffix = '2';
6606 clz_optab->libcall_gen = gen_int_libfunc;
6607 ctz_optab->libcall_basename = "ctz";
6608 ctz_optab->libcall_suffix = '2';
6609 ctz_optab->libcall_gen = gen_int_libfunc;
6610 popcount_optab->libcall_basename = "popcount";
6611 popcount_optab->libcall_suffix = '2';
6612 popcount_optab->libcall_gen = gen_int_libfunc;
6613 parity_optab->libcall_basename = "parity";
6614 parity_optab->libcall_suffix = '2';
6615 parity_optab->libcall_gen = gen_int_libfunc;
6617 /* Comparison libcalls for integers MUST come in pairs,
6619 cmp_optab->libcall_basename = "cmp";
6620 cmp_optab->libcall_suffix = '2';
6621 cmp_optab->libcall_gen = gen_int_fp_fixed_libfunc;
6622 ucmp_optab->libcall_basename = "ucmp";
6623 ucmp_optab->libcall_suffix = '2';
6624 ucmp_optab->libcall_gen = gen_int_libfunc;
6626 /* EQ etc are floating point only. */
6627 eq_optab->libcall_basename = "eq";
6628 eq_optab->libcall_suffix = '2';
6629 eq_optab->libcall_gen = gen_fp_libfunc;
6630 ne_optab->libcall_basename = "ne";
6631 ne_optab->libcall_suffix = '2';
6632 ne_optab->libcall_gen = gen_fp_libfunc;
6633 gt_optab->libcall_basename = "gt";
6634 gt_optab->libcall_suffix = '2';
6635 gt_optab->libcall_gen = gen_fp_libfunc;
6636 ge_optab->libcall_basename = "ge";
6637 ge_optab->libcall_suffix = '2';
6638 ge_optab->libcall_gen = gen_fp_libfunc;
6639 lt_optab->libcall_basename = "lt";
6640 lt_optab->libcall_suffix = '2';
6641 lt_optab->libcall_gen = gen_fp_libfunc;
6642 le_optab->libcall_basename = "le";
6643 le_optab->libcall_suffix = '2';
6644 le_optab->libcall_gen = gen_fp_libfunc;
6645 unord_optab->libcall_basename = "unord";
6646 unord_optab->libcall_suffix = '2';
6647 unord_optab->libcall_gen = gen_fp_libfunc;
6649 powi_optab->libcall_basename = "powi";
6650 powi_optab->libcall_suffix = '2';
6651 powi_optab->libcall_gen = gen_fp_libfunc;
6654 sfloat_optab->libcall_basename = "float";
6655 sfloat_optab->libcall_gen = gen_int_to_fp_conv_libfunc;
6656 ufloat_optab->libcall_gen = gen_ufloat_conv_libfunc;
6657 sfix_optab->libcall_basename = "fix";
6658 sfix_optab->libcall_gen = gen_fp_to_int_conv_libfunc;
6659 ufix_optab->libcall_basename = "fixuns";
6660 ufix_optab->libcall_gen = gen_fp_to_int_conv_libfunc;
6661 lrint_optab->libcall_basename = "lrint";
6662 lrint_optab->libcall_gen = gen_int_to_fp_nondecimal_conv_libfunc;
6663 lround_optab->libcall_basename = "lround";
6664 lround_optab->libcall_gen = gen_int_to_fp_nondecimal_conv_libfunc;
6665 lfloor_optab->libcall_basename = "lfloor";
6666 lfloor_optab->libcall_gen = gen_int_to_fp_nondecimal_conv_libfunc;
6667 lceil_optab->libcall_basename = "lceil";
6668 lceil_optab->libcall_gen = gen_int_to_fp_nondecimal_conv_libfunc;
6670 /* trunc_optab is also used for FLOAT_EXTEND. */
6671 sext_optab->libcall_basename = "extend";
6672 sext_optab->libcall_gen = gen_extend_conv_libfunc;
6673 trunc_optab->libcall_basename = "trunc";
6674 trunc_optab->libcall_gen = gen_trunc_conv_libfunc;
6676 /* Conversions for fixed-point modes and other modes. */
6677 fract_optab->libcall_basename = "fract";
6678 fract_optab->libcall_gen = gen_fract_conv_libfunc;
6679 satfract_optab->libcall_basename = "satfract";
6680 satfract_optab->libcall_gen = gen_satfract_conv_libfunc;
6681 fractuns_optab->libcall_basename = "fractuns";
6682 fractuns_optab->libcall_gen = gen_fractuns_conv_libfunc;
6683 satfractuns_optab->libcall_basename = "satfractuns";
6684 satfractuns_optab->libcall_gen = gen_satfractuns_conv_libfunc;
6686 /* The ffs function operates on `int'. Fall back on it if we do not
6687 have a libgcc2 function for that width. */
6688 if (INT_TYPE_SIZE < BITS_PER_WORD)
6690 int_mode = mode_for_size (INT_TYPE_SIZE, MODE_INT, 0);
6691 set_optab_libfunc (ffs_optab, mode_for_size (INT_TYPE_SIZE, MODE_INT, 0),
6695 /* Explicitly initialize the bswap libfuncs since we need them to be
6696 valid for things other than word_mode. */
6697 set_optab_libfunc (bswap_optab, SImode, "__bswapsi2");
6698 set_optab_libfunc (bswap_optab, DImode, "__bswapdi2");
6700 /* Use cabs for double complex abs, since systems generally have cabs.
6701 Don't define any libcall for float complex, so that cabs will be used. */
6702 if (complex_double_type_node)
6703 set_optab_libfunc (abs_optab, TYPE_MODE (complex_double_type_node), "cabs");
6705 abort_libfunc = init_one_libfunc ("abort");
6706 memcpy_libfunc = init_one_libfunc ("memcpy");
6707 memmove_libfunc = init_one_libfunc ("memmove");
6708 memcmp_libfunc = init_one_libfunc ("memcmp");
6709 memset_libfunc = init_one_libfunc ("memset");
6710 setbits_libfunc = init_one_libfunc ("__setbits");
6712 #ifndef DONT_USE_BUILTIN_SETJMP
6713 setjmp_libfunc = init_one_libfunc ("__builtin_setjmp");
6714 longjmp_libfunc = init_one_libfunc ("__builtin_longjmp");
6716 setjmp_libfunc = init_one_libfunc ("setjmp");
6717 longjmp_libfunc = init_one_libfunc ("longjmp");
6719 unwind_sjlj_register_libfunc = init_one_libfunc ("_Unwind_SjLj_Register");
6720 unwind_sjlj_unregister_libfunc
6721 = init_one_libfunc ("_Unwind_SjLj_Unregister");
6723 /* For function entry/exit instrumentation. */
6724 profile_function_entry_libfunc
6725 = init_one_libfunc ("__cyg_profile_func_enter");
6726 profile_function_exit_libfunc
6727 = init_one_libfunc ("__cyg_profile_func_exit");
6729 gcov_flush_libfunc = init_one_libfunc ("__gcov_flush");
6731 if (HAVE_conditional_trap)
6732 trap_rtx = gen_rtx_fmt_ee (EQ, VOIDmode, NULL_RTX, NULL_RTX);
6734 /* Allow the target to add more libcalls or rename some, etc. */
6735 targetm.init_libfuncs ();
6738 /* Print information about the current contents of the optabs on
6742 debug_optab_libfuncs (void)
6748 /* Dump the arithmetic optabs. */
6749 for (i = 0; i != (int) OTI_MAX; i++)
6750 for (j = 0; j < NUM_MACHINE_MODES; ++j)
6756 l = optab_libfunc (optab_table[i], j);
6759 gcc_assert (GET_CODE (l) == SYMBOL_REF);
6760 fprintf (stderr, "%s\t%s:\t%s\n",
6761 GET_RTX_NAME (o->code),
6767 /* Dump the conversion optabs. */
6768 for (i = 0; i < (int) COI_MAX; ++i)
6769 for (j = 0; j < NUM_MACHINE_MODES; ++j)
6770 for (k = 0; k < NUM_MACHINE_MODES; ++k)
6775 o = convert_optab_table[i];
6776 l = convert_optab_libfunc (o, j, k);
6779 gcc_assert (GET_CODE (l) == SYMBOL_REF);
6780 fprintf (stderr, "%s\t%s\t%s:\t%s\n",
6781 GET_RTX_NAME (o->code),
6790 /* Generate insns to trap with code TCODE if OP1 and OP2 satisfy condition
6791 CODE. Return 0 on failure. */
6794 gen_cond_trap (enum rtx_code code ATTRIBUTE_UNUSED, rtx op1,
6795 rtx op2 ATTRIBUTE_UNUSED, rtx tcode ATTRIBUTE_UNUSED)
6797 enum machine_mode mode = GET_MODE (op1);
6798 enum insn_code icode;
6801 if (!HAVE_conditional_trap)
6804 if (mode == VOIDmode)
6807 icode = optab_handler (cmp_optab, mode)->insn_code;
6808 if (icode == CODE_FOR_nothing)
6812 op1 = prepare_operand (icode, op1, 0, mode, mode, 0);
6813 op2 = prepare_operand (icode, op2, 1, mode, mode, 0);
6819 emit_insn (GEN_FCN (icode) (op1, op2));
6821 PUT_CODE (trap_rtx, code);
6822 gcc_assert (HAVE_conditional_trap);
6823 insn = gen_conditional_trap (trap_rtx, tcode);
6827 insn = get_insns ();
6834 /* Return rtx code for TCODE. Use UNSIGNEDP to select signed
6835 or unsigned operation code. */
6837 static enum rtx_code
6838 get_rtx_code (enum tree_code tcode, bool unsignedp)
6850 code = unsignedp ? LTU : LT;
6853 code = unsignedp ? LEU : LE;
6856 code = unsignedp ? GTU : GT;
6859 code = unsignedp ? GEU : GE;
6862 case UNORDERED_EXPR:
6893 /* Return comparison rtx for COND. Use UNSIGNEDP to select signed or
6894 unsigned operators. Do not generate compare instruction. */
6897 vector_compare_rtx (tree cond, bool unsignedp, enum insn_code icode)
6899 enum rtx_code rcode;
6901 rtx rtx_op0, rtx_op1;
6903 /* This is unlikely. While generating VEC_COND_EXPR, auto vectorizer
6904 ensures that condition is a relational operation. */
6905 gcc_assert (COMPARISON_CLASS_P (cond));
6907 rcode = get_rtx_code (TREE_CODE (cond), unsignedp);
6908 t_op0 = TREE_OPERAND (cond, 0);
6909 t_op1 = TREE_OPERAND (cond, 1);
6911 /* Expand operands. */
6912 rtx_op0 = expand_expr (t_op0, NULL_RTX, TYPE_MODE (TREE_TYPE (t_op0)),
6914 rtx_op1 = expand_expr (t_op1, NULL_RTX, TYPE_MODE (TREE_TYPE (t_op1)),
6917 if (!insn_data[icode].operand[4].predicate (rtx_op0, GET_MODE (rtx_op0))
6918 && GET_MODE (rtx_op0) != VOIDmode)
6919 rtx_op0 = force_reg (GET_MODE (rtx_op0), rtx_op0);
6921 if (!insn_data[icode].operand[5].predicate (rtx_op1, GET_MODE (rtx_op1))
6922 && GET_MODE (rtx_op1) != VOIDmode)
6923 rtx_op1 = force_reg (GET_MODE (rtx_op1), rtx_op1);
6925 return gen_rtx_fmt_ee (rcode, VOIDmode, rtx_op0, rtx_op1);
6928 /* Return insn code for VEC_COND_EXPR EXPR. */
6930 static inline enum insn_code
6931 get_vcond_icode (tree expr, enum machine_mode mode)
6933 enum insn_code icode = CODE_FOR_nothing;
6935 if (TYPE_UNSIGNED (TREE_TYPE (expr)))
6936 icode = vcondu_gen_code[mode];
6938 icode = vcond_gen_code[mode];
6942 /* Return TRUE iff, appropriate vector insns are available
6943 for vector cond expr expr in VMODE mode. */
6946 expand_vec_cond_expr_p (tree expr, enum machine_mode vmode)
6948 if (get_vcond_icode (expr, vmode) == CODE_FOR_nothing)
6953 /* Generate insns for VEC_COND_EXPR. */
6956 expand_vec_cond_expr (tree vec_cond_expr, rtx target)
6958 enum insn_code icode;
6959 rtx comparison, rtx_op1, rtx_op2, cc_op0, cc_op1;
6960 enum machine_mode mode = TYPE_MODE (TREE_TYPE (vec_cond_expr));
6961 bool unsignedp = TYPE_UNSIGNED (TREE_TYPE (vec_cond_expr));
6963 icode = get_vcond_icode (vec_cond_expr, mode);
6964 if (icode == CODE_FOR_nothing)
6967 if (!target || !insn_data[icode].operand[0].predicate (target, mode))
6968 target = gen_reg_rtx (mode);
6970 /* Get comparison rtx. First expand both cond expr operands. */
6971 comparison = vector_compare_rtx (TREE_OPERAND (vec_cond_expr, 0),
6973 cc_op0 = XEXP (comparison, 0);
6974 cc_op1 = XEXP (comparison, 1);
6975 /* Expand both operands and force them in reg, if required. */
6976 rtx_op1 = expand_normal (TREE_OPERAND (vec_cond_expr, 1));
6977 if (!insn_data[icode].operand[1].predicate (rtx_op1, mode)
6978 && mode != VOIDmode)
6979 rtx_op1 = force_reg (mode, rtx_op1);
6981 rtx_op2 = expand_normal (TREE_OPERAND (vec_cond_expr, 2));
6982 if (!insn_data[icode].operand[2].predicate (rtx_op2, mode)
6983 && mode != VOIDmode)
6984 rtx_op2 = force_reg (mode, rtx_op2);
6986 /* Emit instruction! */
6987 emit_insn (GEN_FCN (icode) (target, rtx_op1, rtx_op2,
6988 comparison, cc_op0, cc_op1));
6994 /* This is an internal subroutine of the other compare_and_swap expanders.
6995 MEM, OLD_VAL and NEW_VAL are as you'd expect for a compare-and-swap
6996 operation. TARGET is an optional place to store the value result of
6997 the operation. ICODE is the particular instruction to expand. Return
6998 the result of the operation. */
7001 expand_val_compare_and_swap_1 (rtx mem, rtx old_val, rtx new_val,
7002 rtx target, enum insn_code icode)
7004 enum machine_mode mode = GET_MODE (mem);
7007 if (!target || !insn_data[icode].operand[0].predicate (target, mode))
7008 target = gen_reg_rtx (mode);
7010 if (GET_MODE (old_val) != VOIDmode && GET_MODE (old_val) != mode)
7011 old_val = convert_modes (mode, GET_MODE (old_val), old_val, 1);
7012 if (!insn_data[icode].operand[2].predicate (old_val, mode))
7013 old_val = force_reg (mode, old_val);
7015 if (GET_MODE (new_val) != VOIDmode && GET_MODE (new_val) != mode)
7016 new_val = convert_modes (mode, GET_MODE (new_val), new_val, 1);
7017 if (!insn_data[icode].operand[3].predicate (new_val, mode))
7018 new_val = force_reg (mode, new_val);
7020 insn = GEN_FCN (icode) (target, mem, old_val, new_val);
7021 if (insn == NULL_RTX)
7028 /* Expand a compare-and-swap operation and return its value. */
7031 expand_val_compare_and_swap (rtx mem, rtx old_val, rtx new_val, rtx target)
7033 enum machine_mode mode = GET_MODE (mem);
7034 enum insn_code icode = sync_compare_and_swap[mode];
7036 if (icode == CODE_FOR_nothing)
7039 return expand_val_compare_and_swap_1 (mem, old_val, new_val, target, icode);
7042 /* Expand a compare-and-swap operation and store true into the result if
7043 the operation was successful and false otherwise. Return the result.
7044 Unlike other routines, TARGET is not optional. */
7047 expand_bool_compare_and_swap (rtx mem, rtx old_val, rtx new_val, rtx target)
7049 enum machine_mode mode = GET_MODE (mem);
7050 enum insn_code icode;
7051 rtx subtarget, label0, label1;
7053 /* If the target supports a compare-and-swap pattern that simultaneously
7054 sets some flag for success, then use it. Otherwise use the regular
7055 compare-and-swap and follow that immediately with a compare insn. */
7056 icode = sync_compare_and_swap_cc[mode];
7060 subtarget = expand_val_compare_and_swap_1 (mem, old_val, new_val,
7062 if (subtarget != NULL_RTX)
7066 case CODE_FOR_nothing:
7067 icode = sync_compare_and_swap[mode];
7068 if (icode == CODE_FOR_nothing)
7071 /* Ensure that if old_val == mem, that we're not comparing
7072 against an old value. */
7073 if (MEM_P (old_val))
7074 old_val = force_reg (mode, old_val);
7076 subtarget = expand_val_compare_and_swap_1 (mem, old_val, new_val,
7078 if (subtarget == NULL_RTX)
7081 emit_cmp_insn (subtarget, old_val, EQ, const0_rtx, mode, true);
7084 /* If the target has a sane STORE_FLAG_VALUE, then go ahead and use a
7085 setcc instruction from the beginning. We don't work too hard here,
7086 but it's nice to not be stupid about initial code gen either. */
7087 if (STORE_FLAG_VALUE == 1)
7089 icode = setcc_gen_code[EQ];
7090 if (icode != CODE_FOR_nothing)
7092 enum machine_mode cmode = insn_data[icode].operand[0].mode;
7096 if (!insn_data[icode].operand[0].predicate (target, cmode))
7097 subtarget = gen_reg_rtx (cmode);
7099 insn = GEN_FCN (icode) (subtarget);
7103 if (GET_MODE (target) != GET_MODE (subtarget))
7105 convert_move (target, subtarget, 1);
7113 /* Without an appropriate setcc instruction, use a set of branches to
7114 get 1 and 0 stored into target. Presumably if the target has a
7115 STORE_FLAG_VALUE that isn't 1, then this will get cleaned up by ifcvt. */
7117 label0 = gen_label_rtx ();
7118 label1 = gen_label_rtx ();
7120 emit_jump_insn (bcc_gen_fctn[EQ] (label0));
7121 emit_move_insn (target, const0_rtx);
7122 emit_jump_insn (gen_jump (label1));
7124 emit_label (label0);
7125 emit_move_insn (target, const1_rtx);
7126 emit_label (label1);
7131 /* This is a helper function for the other atomic operations. This function
7132 emits a loop that contains SEQ that iterates until a compare-and-swap
7133 operation at the end succeeds. MEM is the memory to be modified. SEQ is
7134 a set of instructions that takes a value from OLD_REG as an input and
7135 produces a value in NEW_REG as an output. Before SEQ, OLD_REG will be
7136 set to the current contents of MEM. After SEQ, a compare-and-swap will
7137 attempt to update MEM with NEW_REG. The function returns true when the
7138 loop was generated successfully. */
7141 expand_compare_and_swap_loop (rtx mem, rtx old_reg, rtx new_reg, rtx seq)
7143 enum machine_mode mode = GET_MODE (mem);
7144 enum insn_code icode;
7145 rtx label, cmp_reg, subtarget;
7147 /* The loop we want to generate looks like
7153 cmp_reg = compare-and-swap(mem, old_reg, new_reg)
7154 if (cmp_reg != old_reg)
7157 Note that we only do the plain load from memory once. Subsequent
7158 iterations use the value loaded by the compare-and-swap pattern. */
7160 label = gen_label_rtx ();
7161 cmp_reg = gen_reg_rtx (mode);
7163 emit_move_insn (cmp_reg, mem);
7165 emit_move_insn (old_reg, cmp_reg);
7169 /* If the target supports a compare-and-swap pattern that simultaneously
7170 sets some flag for success, then use it. Otherwise use the regular
7171 compare-and-swap and follow that immediately with a compare insn. */
7172 icode = sync_compare_and_swap_cc[mode];
7176 subtarget = expand_val_compare_and_swap_1 (mem, old_reg, new_reg,
7178 if (subtarget != NULL_RTX)
7180 gcc_assert (subtarget == cmp_reg);
7185 case CODE_FOR_nothing:
7186 icode = sync_compare_and_swap[mode];
7187 if (icode == CODE_FOR_nothing)
7190 subtarget = expand_val_compare_and_swap_1 (mem, old_reg, new_reg,
7192 if (subtarget == NULL_RTX)
7194 if (subtarget != cmp_reg)
7195 emit_move_insn (cmp_reg, subtarget);
7197 emit_cmp_insn (cmp_reg, old_reg, EQ, const0_rtx, mode, true);
7200 /* ??? Mark this jump predicted not taken? */
7201 emit_jump_insn (bcc_gen_fctn[NE] (label));
7206 /* This function generates the atomic operation MEM CODE= VAL. In this
7207 case, we do not care about any resulting value. Returns NULL if we
7208 cannot generate the operation. */
7211 expand_sync_operation (rtx mem, rtx val, enum rtx_code code)
7213 enum machine_mode mode = GET_MODE (mem);
7214 enum insn_code icode;
7217 /* Look to see if the target supports the operation directly. */
7221 icode = sync_add_optab[mode];
7224 icode = sync_ior_optab[mode];
7227 icode = sync_xor_optab[mode];
7230 icode = sync_and_optab[mode];
7233 icode = sync_nand_optab[mode];
7237 icode = sync_sub_optab[mode];
7238 if (icode == CODE_FOR_nothing)
7240 icode = sync_add_optab[mode];
7241 if (icode != CODE_FOR_nothing)
7243 val = expand_simple_unop (mode, NEG, val, NULL_RTX, 1);
7253 /* Generate the direct operation, if present. */
7254 if (icode != CODE_FOR_nothing)
7256 if (GET_MODE (val) != VOIDmode && GET_MODE (val) != mode)
7257 val = convert_modes (mode, GET_MODE (val), val, 1);
7258 if (!insn_data[icode].operand[1].predicate (val, mode))
7259 val = force_reg (mode, val);
7261 insn = GEN_FCN (icode) (mem, val);
7269 /* Failing that, generate a compare-and-swap loop in which we perform the
7270 operation with normal arithmetic instructions. */
7271 if (sync_compare_and_swap[mode] != CODE_FOR_nothing)
7273 rtx t0 = gen_reg_rtx (mode), t1;
7280 t1 = expand_simple_unop (mode, NOT, t1, NULL_RTX, true);
7283 t1 = expand_simple_binop (mode, code, t1, val, NULL_RTX,
7284 true, OPTAB_LIB_WIDEN);
7286 insn = get_insns ();
7289 if (t1 != NULL && expand_compare_and_swap_loop (mem, t0, t1, insn))
7296 /* This function generates the atomic operation MEM CODE= VAL. In this
7297 case, we do care about the resulting value: if AFTER is true then
7298 return the value MEM holds after the operation, if AFTER is false
7299 then return the value MEM holds before the operation. TARGET is an
7300 optional place for the result value to be stored. */
7303 expand_sync_fetch_operation (rtx mem, rtx val, enum rtx_code code,
7304 bool after, rtx target)
7306 enum machine_mode mode = GET_MODE (mem);
7307 enum insn_code old_code, new_code, icode;
7311 /* Look to see if the target supports the operation directly. */
7315 old_code = sync_old_add_optab[mode];
7316 new_code = sync_new_add_optab[mode];
7319 old_code = sync_old_ior_optab[mode];
7320 new_code = sync_new_ior_optab[mode];
7323 old_code = sync_old_xor_optab[mode];
7324 new_code = sync_new_xor_optab[mode];
7327 old_code = sync_old_and_optab[mode];
7328 new_code = sync_new_and_optab[mode];
7331 old_code = sync_old_nand_optab[mode];
7332 new_code = sync_new_nand_optab[mode];
7336 old_code = sync_old_sub_optab[mode];
7337 new_code = sync_new_sub_optab[mode];
7338 if (old_code == CODE_FOR_nothing && new_code == CODE_FOR_nothing)
7340 old_code = sync_old_add_optab[mode];
7341 new_code = sync_new_add_optab[mode];
7342 if (old_code != CODE_FOR_nothing || new_code != CODE_FOR_nothing)
7344 val = expand_simple_unop (mode, NEG, val, NULL_RTX, 1);
7354 /* If the target does supports the proper new/old operation, great. But
7355 if we only support the opposite old/new operation, check to see if we
7356 can compensate. In the case in which the old value is supported, then
7357 we can always perform the operation again with normal arithmetic. In
7358 the case in which the new value is supported, then we can only handle
7359 this in the case the operation is reversible. */
7364 if (icode == CODE_FOR_nothing)
7367 if (icode != CODE_FOR_nothing)
7374 if (icode == CODE_FOR_nothing
7375 && (code == PLUS || code == MINUS || code == XOR))
7378 if (icode != CODE_FOR_nothing)
7383 /* If we found something supported, great. */
7384 if (icode != CODE_FOR_nothing)
7386 if (!target || !insn_data[icode].operand[0].predicate (target, mode))
7387 target = gen_reg_rtx (mode);
7389 if (GET_MODE (val) != VOIDmode && GET_MODE (val) != mode)
7390 val = convert_modes (mode, GET_MODE (val), val, 1);
7391 if (!insn_data[icode].operand[2].predicate (val, mode))
7392 val = force_reg (mode, val);
7394 insn = GEN_FCN (icode) (target, mem, val);
7399 /* If we need to compensate for using an operation with the
7400 wrong return value, do so now. */
7407 else if (code == MINUS)
7412 target = expand_simple_unop (mode, NOT, target, NULL_RTX, true);
7413 target = expand_simple_binop (mode, code, target, val, NULL_RTX,
7414 true, OPTAB_LIB_WIDEN);
7421 /* Failing that, generate a compare-and-swap loop in which we perform the
7422 operation with normal arithmetic instructions. */
7423 if (sync_compare_and_swap[mode] != CODE_FOR_nothing)
7425 rtx t0 = gen_reg_rtx (mode), t1;
7427 if (!target || !register_operand (target, mode))
7428 target = gen_reg_rtx (mode);
7433 emit_move_insn (target, t0);
7437 t1 = expand_simple_unop (mode, NOT, t1, NULL_RTX, true);
7440 t1 = expand_simple_binop (mode, code, t1, val, NULL_RTX,
7441 true, OPTAB_LIB_WIDEN);
7443 emit_move_insn (target, t1);
7445 insn = get_insns ();
7448 if (t1 != NULL && expand_compare_and_swap_loop (mem, t0, t1, insn))
7455 /* This function expands a test-and-set operation. Ideally we atomically
7456 store VAL in MEM and return the previous value in MEM. Some targets
7457 may not support this operation and only support VAL with the constant 1;
7458 in this case while the return value will be 0/1, but the exact value
7459 stored in MEM is target defined. TARGET is an option place to stick
7460 the return value. */
7463 expand_sync_lock_test_and_set (rtx mem, rtx val, rtx target)
7465 enum machine_mode mode = GET_MODE (mem);
7466 enum insn_code icode;
7469 /* If the target supports the test-and-set directly, great. */
7470 icode = sync_lock_test_and_set[mode];
7471 if (icode != CODE_FOR_nothing)
7473 if (!target || !insn_data[icode].operand[0].predicate (target, mode))
7474 target = gen_reg_rtx (mode);
7476 if (GET_MODE (val) != VOIDmode && GET_MODE (val) != mode)
7477 val = convert_modes (mode, GET_MODE (val), val, 1);
7478 if (!insn_data[icode].operand[2].predicate (val, mode))
7479 val = force_reg (mode, val);
7481 insn = GEN_FCN (icode) (target, mem, val);
7489 /* Otherwise, use a compare-and-swap loop for the exchange. */
7490 if (sync_compare_and_swap[mode] != CODE_FOR_nothing)
7492 if (!target || !register_operand (target, mode))
7493 target = gen_reg_rtx (mode);
7494 if (GET_MODE (val) != VOIDmode && GET_MODE (val) != mode)
7495 val = convert_modes (mode, GET_MODE (val), val, 1);
7496 if (expand_compare_and_swap_loop (mem, target, val, NULL_RTX))
7503 #include "gt-optabs.h"