1 /* Expand the basic unary and binary arithmetic operations, for GNU compiler.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
27 /* Include insn-config.h before expr.h so that HAVE_conditional_move
28 is properly defined. */
29 #include "insn-config.h"
44 /* Each optab contains info on how this target machine
45 can perform a particular operation
46 for all sizes and kinds of operands.
48 The operation to be performed is often specified
49 by passing one of these optabs as an argument.
51 See expr.h for documentation of these optabs. */
53 optab optab_table[OTI_MAX];
55 rtx libfunc_table[LTI_MAX];
57 /* Tables of patterns for extending one integer mode to another. */
58 enum insn_code extendtab[MAX_MACHINE_MODE][MAX_MACHINE_MODE][2];
60 /* Tables of patterns for converting between fixed and floating point. */
61 enum insn_code fixtab[NUM_MACHINE_MODES][NUM_MACHINE_MODES][2];
62 enum insn_code fixtrunctab[NUM_MACHINE_MODES][NUM_MACHINE_MODES][2];
63 enum insn_code floattab[NUM_MACHINE_MODES][NUM_MACHINE_MODES][2];
65 /* Contains the optab used for each rtx code. */
66 optab code_to_optab[NUM_RTX_CODE + 1];
68 /* Indexed by the rtx-code for a conditional (eg. EQ, LT,...)
69 gives the gen_function to make a branch to test that condition. */
71 rtxfun bcc_gen_fctn[NUM_RTX_CODE];
73 /* Indexed by the rtx-code for a conditional (eg. EQ, LT,...)
74 gives the insn code to make a store-condition insn
75 to test that condition. */
77 enum insn_code setcc_gen_code[NUM_RTX_CODE];
79 #ifdef HAVE_conditional_move
80 /* Indexed by the machine mode, gives the insn code to make a conditional
81 move insn. This is not indexed by the rtx-code like bcc_gen_fctn and
82 setcc_gen_code to cut down on the number of named patterns. Consider a day
83 when a lot more rtx codes are conditional (eg: for the ARM). */
85 enum insn_code movcc_gen_code[NUM_MACHINE_MODES];
88 static int add_equal_note PARAMS ((rtx, rtx, enum rtx_code, rtx, rtx));
89 static rtx widen_operand PARAMS ((rtx, enum machine_mode,
90 enum machine_mode, int, int));
91 static int expand_cmplxdiv_straight PARAMS ((rtx, rtx, rtx, rtx,
92 rtx, rtx, enum machine_mode,
93 int, enum optab_methods,
94 enum mode_class, optab));
95 static int expand_cmplxdiv_wide PARAMS ((rtx, rtx, rtx, rtx,
96 rtx, rtx, enum machine_mode,
97 int, enum optab_methods,
98 enum mode_class, optab));
99 static void prepare_cmp_insn PARAMS ((rtx *, rtx *, enum rtx_code *, rtx,
100 enum machine_mode *, int *,
101 enum can_compare_purpose));
102 static enum insn_code can_fix_p PARAMS ((enum machine_mode, enum machine_mode,
104 static enum insn_code can_float_p PARAMS ((enum machine_mode,
107 static rtx ftruncify PARAMS ((rtx));
108 static optab new_optab PARAMS ((void));
109 static inline optab init_optab PARAMS ((enum rtx_code));
110 static inline optab init_optabv PARAMS ((enum rtx_code));
111 static void init_libfuncs PARAMS ((optab, int, int, const char *, int));
112 static void init_integral_libfuncs PARAMS ((optab, const char *, int));
113 static void init_floating_libfuncs PARAMS ((optab, const char *, int));
114 #ifdef HAVE_conditional_trap
115 static void init_traps PARAMS ((void));
117 static void emit_cmp_and_jump_insn_1 PARAMS ((rtx, rtx, enum machine_mode,
118 enum rtx_code, int, rtx));
119 static void prepare_float_lib_cmp PARAMS ((rtx *, rtx *, enum rtx_code *,
120 enum machine_mode *, int *));
121 static rtx expand_vector_binop PARAMS ((enum machine_mode, optab,
123 enum optab_methods));
124 static rtx expand_vector_unop PARAMS ((enum machine_mode, optab, rtx, rtx,
127 /* Add a REG_EQUAL note to the last insn in INSNS. TARGET is being set to
128 the result of operation CODE applied to OP0 (and OP1 if it is a binary
131 If the last insn does not set TARGET, don't do anything, but return 1.
133 If a previous insn sets TARGET and TARGET is one of OP0 or OP1,
134 don't add the REG_EQUAL note but return 0. Our caller can then try
135 again, ensuring that TARGET is not one of the operands. */
138 add_equal_note (insns, target, code, op0, op1)
144 rtx last_insn, insn, set;
149 || NEXT_INSN (insns) == NULL_RTX)
152 if (GET_RTX_CLASS (code) != '1' && GET_RTX_CLASS (code) != '2'
153 && GET_RTX_CLASS (code) != 'c' && GET_RTX_CLASS (code) != '<')
156 if (GET_CODE (target) == ZERO_EXTRACT)
159 for (last_insn = insns;
160 NEXT_INSN (last_insn) != NULL_RTX;
161 last_insn = NEXT_INSN (last_insn))
164 set = single_set (last_insn);
168 if (! rtx_equal_p (SET_DEST (set), target)
169 /* For a STRICT_LOW_PART, the REG_NOTE applies to what is inside the
171 && (GET_CODE (SET_DEST (set)) != STRICT_LOW_PART
172 || ! rtx_equal_p (SUBREG_REG (XEXP (SET_DEST (set), 0)),
176 /* If TARGET is in OP0 or OP1, check if anything in SEQ sets TARGET
177 besides the last insn. */
178 if (reg_overlap_mentioned_p (target, op0)
179 || (op1 && reg_overlap_mentioned_p (target, op1)))
181 insn = PREV_INSN (last_insn);
182 while (insn != NULL_RTX)
184 if (reg_set_p (target, insn))
187 insn = PREV_INSN (insn);
191 if (GET_RTX_CLASS (code) == '1')
192 note = gen_rtx_fmt_e (code, GET_MODE (target), copy_rtx (op0));
194 note = gen_rtx_fmt_ee (code, GET_MODE (target), copy_rtx (op0), copy_rtx (op1));
196 set_unique_reg_note (last_insn, REG_EQUAL, note);
201 /* Widen OP to MODE and return the rtx for the widened operand. UNSIGNEDP
202 says whether OP is signed or unsigned. NO_EXTEND is nonzero if we need
203 not actually do a sign-extend or zero-extend, but can leave the
204 higher-order bits of the result rtx undefined, for example, in the case
205 of logical operations, but not right shifts. */
208 widen_operand (op, mode, oldmode, unsignedp, no_extend)
210 enum machine_mode mode, oldmode;
216 /* If we don't have to extend and this is a constant, return it. */
217 if (no_extend && GET_MODE (op) == VOIDmode)
220 /* If we must extend do so. If OP is a SUBREG for a promoted object, also
221 extend since it will be more efficient to do so unless the signedness of
222 a promoted object differs from our extension. */
224 || (GET_CODE (op) == SUBREG && SUBREG_PROMOTED_VAR_P (op)
225 && SUBREG_PROMOTED_UNSIGNED_P (op) == unsignedp))
226 return convert_modes (mode, oldmode, op, unsignedp);
228 /* If MODE is no wider than a single word, we return a paradoxical
230 if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD)
231 return gen_rtx_SUBREG (mode, force_reg (GET_MODE (op), op), 0);
233 /* Otherwise, get an object of MODE, clobber it, and set the low-order
236 result = gen_reg_rtx (mode);
237 emit_insn (gen_rtx_CLOBBER (VOIDmode, result));
238 emit_move_insn (gen_lowpart (GET_MODE (op), result), op);
242 /* Generate code to perform a straightforward complex divide. */
245 expand_cmplxdiv_straight (real0, real1, imag0, imag1, realr, imagr, submode,
246 unsignedp, methods, class, binoptab)
247 rtx real0, real1, imag0, imag1, realr, imagr;
248 enum machine_mode submode;
250 enum optab_methods methods;
251 enum mode_class class;
258 optab this_add_optab = add_optab;
259 optab this_sub_optab = sub_optab;
260 optab this_neg_optab = neg_optab;
261 optab this_mul_optab = smul_optab;
263 if (binoptab == sdivv_optab)
265 this_add_optab = addv_optab;
266 this_sub_optab = subv_optab;
267 this_neg_optab = negv_optab;
268 this_mul_optab = smulv_optab;
271 /* Don't fetch these from memory more than once. */
272 real0 = force_reg (submode, real0);
273 real1 = force_reg (submode, real1);
276 imag0 = force_reg (submode, imag0);
278 imag1 = force_reg (submode, imag1);
280 /* Divisor: c*c + d*d. */
281 temp1 = expand_binop (submode, this_mul_optab, real1, real1,
282 NULL_RTX, unsignedp, methods);
284 temp2 = expand_binop (submode, this_mul_optab, imag1, imag1,
285 NULL_RTX, unsignedp, methods);
287 if (temp1 == 0 || temp2 == 0)
290 divisor = expand_binop (submode, this_add_optab, temp1, temp2,
291 NULL_RTX, unsignedp, methods);
297 /* Mathematically, ((a)(c-id))/divisor. */
298 /* Computationally, (a+i0) / (c+id) = (ac/(cc+dd)) + i(-ad/(cc+dd)). */
300 /* Calculate the dividend. */
301 real_t = expand_binop (submode, this_mul_optab, real0, real1,
302 NULL_RTX, unsignedp, methods);
304 imag_t = expand_binop (submode, this_mul_optab, real0, imag1,
305 NULL_RTX, unsignedp, methods);
307 if (real_t == 0 || imag_t == 0)
310 imag_t = expand_unop (submode, this_neg_optab, imag_t,
311 NULL_RTX, unsignedp);
315 /* Mathematically, ((a+ib)(c-id))/divider. */
316 /* Calculate the dividend. */
317 temp1 = expand_binop (submode, this_mul_optab, real0, real1,
318 NULL_RTX, unsignedp, methods);
320 temp2 = expand_binop (submode, this_mul_optab, imag0, imag1,
321 NULL_RTX, unsignedp, methods);
323 if (temp1 == 0 || temp2 == 0)
326 real_t = expand_binop (submode, this_add_optab, temp1, temp2,
327 NULL_RTX, unsignedp, methods);
329 temp1 = expand_binop (submode, this_mul_optab, imag0, real1,
330 NULL_RTX, unsignedp, methods);
332 temp2 = expand_binop (submode, this_mul_optab, real0, imag1,
333 NULL_RTX, unsignedp, methods);
335 if (temp1 == 0 || temp2 == 0)
338 imag_t = expand_binop (submode, this_sub_optab, temp1, temp2,
339 NULL_RTX, unsignedp, methods);
341 if (real_t == 0 || imag_t == 0)
345 if (class == MODE_COMPLEX_FLOAT)
346 res = expand_binop (submode, binoptab, real_t, divisor,
347 realr, unsignedp, methods);
349 res = expand_divmod (0, TRUNC_DIV_EXPR, submode,
350 real_t, divisor, realr, unsignedp);
356 emit_move_insn (realr, res);
358 if (class == MODE_COMPLEX_FLOAT)
359 res = expand_binop (submode, binoptab, imag_t, divisor,
360 imagr, unsignedp, methods);
362 res = expand_divmod (0, TRUNC_DIV_EXPR, submode,
363 imag_t, divisor, imagr, unsignedp);
369 emit_move_insn (imagr, res);
374 /* Generate code to perform a wide-input-range-acceptable complex divide. */
377 expand_cmplxdiv_wide (real0, real1, imag0, imag1, realr, imagr, submode,
378 unsignedp, methods, class, binoptab)
379 rtx real0, real1, imag0, imag1, realr, imagr;
380 enum machine_mode submode;
382 enum optab_methods methods;
383 enum mode_class class;
388 rtx temp1, temp2, lab1, lab2;
389 enum machine_mode mode;
391 optab this_add_optab = add_optab;
392 optab this_sub_optab = sub_optab;
393 optab this_neg_optab = neg_optab;
394 optab this_mul_optab = smul_optab;
396 if (binoptab == sdivv_optab)
398 this_add_optab = addv_optab;
399 this_sub_optab = subv_optab;
400 this_neg_optab = negv_optab;
401 this_mul_optab = smulv_optab;
404 /* Don't fetch these from memory more than once. */
405 real0 = force_reg (submode, real0);
406 real1 = force_reg (submode, real1);
409 imag0 = force_reg (submode, imag0);
411 imag1 = force_reg (submode, imag1);
413 /* XXX What's an "unsigned" complex number? */
421 temp1 = expand_abs (submode, real1, NULL_RTX, unsignedp, 1);
422 temp2 = expand_abs (submode, imag1, NULL_RTX, unsignedp, 1);
425 if (temp1 == 0 || temp2 == 0)
428 mode = GET_MODE (temp1);
429 lab1 = gen_label_rtx ();
430 emit_cmp_and_jump_insns (temp1, temp2, LT, NULL_RTX,
431 mode, unsignedp, lab1);
433 /* |c| >= |d|; use ratio d/c to scale dividend and divisor. */
435 if (class == MODE_COMPLEX_FLOAT)
436 ratio = expand_binop (submode, binoptab, imag1, real1,
437 NULL_RTX, unsignedp, methods);
439 ratio = expand_divmod (0, TRUNC_DIV_EXPR, submode,
440 imag1, real1, NULL_RTX, unsignedp);
445 /* Calculate divisor. */
447 temp1 = expand_binop (submode, this_mul_optab, imag1, ratio,
448 NULL_RTX, unsignedp, methods);
453 divisor = expand_binop (submode, this_add_optab, temp1, real1,
454 NULL_RTX, unsignedp, methods);
459 /* Calculate dividend. */
465 /* Compute a / (c+id) as a / (c+d(d/c)) + i (-a(d/c)) / (c+d(d/c)). */
467 imag_t = expand_binop (submode, this_mul_optab, real0, ratio,
468 NULL_RTX, unsignedp, methods);
473 imag_t = expand_unop (submode, this_neg_optab, imag_t,
474 NULL_RTX, unsignedp);
476 if (real_t == 0 || imag_t == 0)
481 /* Compute (a+ib)/(c+id) as
482 (a+b(d/c))/(c+d(d/c) + i(b-a(d/c))/(c+d(d/c)). */
484 temp1 = expand_binop (submode, this_mul_optab, imag0, ratio,
485 NULL_RTX, unsignedp, methods);
490 real_t = expand_binop (submode, this_add_optab, temp1, real0,
491 NULL_RTX, unsignedp, methods);
493 temp1 = expand_binop (submode, this_mul_optab, real0, ratio,
494 NULL_RTX, unsignedp, methods);
499 imag_t = expand_binop (submode, this_sub_optab, imag0, temp1,
500 NULL_RTX, unsignedp, methods);
502 if (real_t == 0 || imag_t == 0)
506 if (class == MODE_COMPLEX_FLOAT)
507 res = expand_binop (submode, binoptab, real_t, divisor,
508 realr, unsignedp, methods);
510 res = expand_divmod (0, TRUNC_DIV_EXPR, submode,
511 real_t, divisor, realr, unsignedp);
517 emit_move_insn (realr, res);
519 if (class == MODE_COMPLEX_FLOAT)
520 res = expand_binop (submode, binoptab, imag_t, divisor,
521 imagr, unsignedp, methods);
523 res = expand_divmod (0, TRUNC_DIV_EXPR, submode,
524 imag_t, divisor, imagr, unsignedp);
530 emit_move_insn (imagr, res);
532 lab2 = gen_label_rtx ();
533 emit_jump_insn (gen_jump (lab2));
538 /* |d| > |c|; use ratio c/d to scale dividend and divisor. */
540 if (class == MODE_COMPLEX_FLOAT)
541 ratio = expand_binop (submode, binoptab, real1, imag1,
542 NULL_RTX, unsignedp, methods);
544 ratio = expand_divmod (0, TRUNC_DIV_EXPR, submode,
545 real1, imag1, NULL_RTX, unsignedp);
550 /* Calculate divisor. */
552 temp1 = expand_binop (submode, this_mul_optab, real1, ratio,
553 NULL_RTX, unsignedp, methods);
558 divisor = expand_binop (submode, this_add_optab, temp1, imag1,
559 NULL_RTX, unsignedp, methods);
564 /* Calculate dividend. */
568 /* Compute a / (c+id) as a(c/d) / (c(c/d)+d) + i (-a) / (c(c/d)+d). */
570 real_t = expand_binop (submode, this_mul_optab, real0, ratio,
571 NULL_RTX, unsignedp, methods);
573 imag_t = expand_unop (submode, this_neg_optab, real0,
574 NULL_RTX, unsignedp);
576 if (real_t == 0 || imag_t == 0)
581 /* Compute (a+ib)/(c+id) as
582 (a(c/d)+b)/(c(c/d)+d) + i (b(c/d)-a)/(c(c/d)+d). */
584 temp1 = expand_binop (submode, this_mul_optab, real0, ratio,
585 NULL_RTX, unsignedp, methods);
590 real_t = expand_binop (submode, this_add_optab, temp1, imag0,
591 NULL_RTX, unsignedp, methods);
593 temp1 = expand_binop (submode, this_mul_optab, imag0, ratio,
594 NULL_RTX, unsignedp, methods);
599 imag_t = expand_binop (submode, this_sub_optab, temp1, real0,
600 NULL_RTX, unsignedp, methods);
602 if (real_t == 0 || imag_t == 0)
606 if (class == MODE_COMPLEX_FLOAT)
607 res = expand_binop (submode, binoptab, real_t, divisor,
608 realr, unsignedp, methods);
610 res = expand_divmod (0, TRUNC_DIV_EXPR, submode,
611 real_t, divisor, realr, unsignedp);
617 emit_move_insn (realr, res);
619 if (class == MODE_COMPLEX_FLOAT)
620 res = expand_binop (submode, binoptab, imag_t, divisor,
621 imagr, unsignedp, methods);
623 res = expand_divmod (0, TRUNC_DIV_EXPR, submode,
624 imag_t, divisor, imagr, unsignedp);
630 emit_move_insn (imagr, res);
637 /* Wrapper around expand_binop which takes an rtx code to specify
638 the operation to perform, not an optab pointer. All other
639 arguments are the same. */
641 expand_simple_binop (mode, code, op0, op1, target, unsignedp, methods)
642 enum machine_mode mode;
647 enum optab_methods methods;
649 optab binop = code_to_optab[(int) code];
653 return expand_binop (mode, binop, op0, op1, target, unsignedp, methods);
656 /* Generate code to perform an operation specified by BINOPTAB
657 on operands OP0 and OP1, with result having machine-mode MODE.
659 UNSIGNEDP is for the case where we have to widen the operands
660 to perform the operation. It says to use zero-extension.
662 If TARGET is nonzero, the value
663 is generated there, if it is convenient to do so.
664 In all cases an rtx is returned for the locus of the value;
665 this may or may not be TARGET. */
668 expand_binop (mode, binoptab, op0, op1, target, unsignedp, methods)
669 enum machine_mode mode;
674 enum optab_methods methods;
676 enum optab_methods next_methods
677 = (methods == OPTAB_LIB || methods == OPTAB_LIB_WIDEN
678 ? OPTAB_WIDEN : methods);
679 enum mode_class class;
680 enum machine_mode wider_mode;
682 int commutative_op = 0;
683 int shift_op = (binoptab->code == ASHIFT
684 || binoptab->code == ASHIFTRT
685 || binoptab->code == LSHIFTRT
686 || binoptab->code == ROTATE
687 || binoptab->code == ROTATERT);
688 rtx entry_last = get_last_insn ();
691 class = GET_MODE_CLASS (mode);
693 op0 = protect_from_queue (op0, 0);
694 op1 = protect_from_queue (op1, 0);
696 target = protect_from_queue (target, 1);
700 op0 = force_not_mem (op0);
701 op1 = force_not_mem (op1);
704 /* If subtracting an integer constant, convert this into an addition of
705 the negated constant. */
707 if (binoptab == sub_optab && GET_CODE (op1) == CONST_INT)
709 op1 = negate_rtx (mode, op1);
710 binoptab = add_optab;
713 /* If we are inside an appropriately-short loop and one operand is an
714 expensive constant, force it into a register. */
715 if (CONSTANT_P (op0) && preserve_subexpressions_p ()
716 && rtx_cost (op0, binoptab->code) > COSTS_N_INSNS (1))
717 op0 = force_reg (mode, op0);
719 if (CONSTANT_P (op1) && preserve_subexpressions_p ()
720 && ! shift_op && rtx_cost (op1, binoptab->code) > COSTS_N_INSNS (1))
721 op1 = force_reg (mode, op1);
723 /* Record where to delete back to if we backtrack. */
724 last = get_last_insn ();
726 /* If operation is commutative,
727 try to make the first operand a register.
728 Even better, try to make it the same as the target.
729 Also try to make the last operand a constant. */
730 if (GET_RTX_CLASS (binoptab->code) == 'c'
731 || binoptab == smul_widen_optab
732 || binoptab == umul_widen_optab
733 || binoptab == smul_highpart_optab
734 || binoptab == umul_highpart_optab)
738 if (((target == 0 || GET_CODE (target) == REG)
739 ? ((GET_CODE (op1) == REG
740 && GET_CODE (op0) != REG)
742 : rtx_equal_p (op1, target))
743 || GET_CODE (op0) == CONST_INT)
751 /* If we can do it with a three-operand insn, do so. */
753 if (methods != OPTAB_MUST_WIDEN
754 && binoptab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
756 int icode = (int) binoptab->handlers[(int) mode].insn_code;
757 enum machine_mode mode0 = insn_data[icode].operand[1].mode;
758 enum machine_mode mode1 = insn_data[icode].operand[2].mode;
760 rtx xop0 = op0, xop1 = op1;
765 temp = gen_reg_rtx (mode);
767 /* If it is a commutative operator and the modes would match
768 if we would swap the operands, we can save the conversions. */
771 if (GET_MODE (op0) != mode0 && GET_MODE (op1) != mode1
772 && GET_MODE (op0) == mode1 && GET_MODE (op1) == mode0)
776 tmp = op0; op0 = op1; op1 = tmp;
777 tmp = xop0; xop0 = xop1; xop1 = tmp;
781 /* In case the insn wants input operands in modes different from
782 those of the actual operands, convert the operands. It would
783 seem that we don't need to convert CONST_INTs, but we do, so
784 that they're properly zero-extended, sign-extended or truncated
787 if (GET_MODE (op0) != mode0 && mode0 != VOIDmode)
788 xop0 = convert_modes (mode0,
789 GET_MODE (op0) != VOIDmode
794 if (GET_MODE (op1) != mode1 && mode1 != VOIDmode)
795 xop1 = convert_modes (mode1,
796 GET_MODE (op1) != VOIDmode
801 /* Now, if insn's predicates don't allow our operands, put them into
804 if (! (*insn_data[icode].operand[1].predicate) (xop0, mode0)
805 && mode0 != VOIDmode)
806 xop0 = copy_to_mode_reg (mode0, xop0);
808 if (! (*insn_data[icode].operand[2].predicate) (xop1, mode1)
809 && mode1 != VOIDmode)
810 xop1 = copy_to_mode_reg (mode1, xop1);
812 if (! (*insn_data[icode].operand[0].predicate) (temp, mode))
813 temp = gen_reg_rtx (mode);
815 pat = GEN_FCN (icode) (temp, xop0, xop1);
818 /* If PAT is composed of more than one insn, try to add an appropriate
819 REG_EQUAL note to it. If we can't because TEMP conflicts with an
820 operand, call ourselves again, this time without a target. */
821 if (INSN_P (pat) && NEXT_INSN (pat) != NULL_RTX
822 && ! add_equal_note (pat, temp, binoptab->code, xop0, xop1))
824 delete_insns_since (last);
825 return expand_binop (mode, binoptab, op0, op1, NULL_RTX,
833 delete_insns_since (last);
836 /* If this is a multiply, see if we can do a widening operation that
837 takes operands of this mode and makes a wider mode. */
839 if (binoptab == smul_optab && GET_MODE_WIDER_MODE (mode) != VOIDmode
840 && (((unsignedp ? umul_widen_optab : smul_widen_optab)
841 ->handlers[(int) GET_MODE_WIDER_MODE (mode)].insn_code)
842 != CODE_FOR_nothing))
844 temp = expand_binop (GET_MODE_WIDER_MODE (mode),
845 unsignedp ? umul_widen_optab : smul_widen_optab,
846 op0, op1, NULL_RTX, unsignedp, OPTAB_DIRECT);
850 if (GET_MODE_CLASS (mode) == MODE_INT)
851 return gen_lowpart (mode, temp);
853 return convert_to_mode (mode, temp, unsignedp);
857 /* Look for a wider mode of the same class for which we think we
858 can open-code the operation. Check for a widening multiply at the
859 wider mode as well. */
861 if ((class == MODE_INT || class == MODE_FLOAT || class == MODE_COMPLEX_FLOAT)
862 && methods != OPTAB_DIRECT && methods != OPTAB_LIB)
863 for (wider_mode = GET_MODE_WIDER_MODE (mode); wider_mode != VOIDmode;
864 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
866 if (binoptab->handlers[(int) wider_mode].insn_code != CODE_FOR_nothing
867 || (binoptab == smul_optab
868 && GET_MODE_WIDER_MODE (wider_mode) != VOIDmode
869 && (((unsignedp ? umul_widen_optab : smul_widen_optab)
870 ->handlers[(int) GET_MODE_WIDER_MODE (wider_mode)].insn_code)
871 != CODE_FOR_nothing)))
873 rtx xop0 = op0, xop1 = op1;
876 /* For certain integer operations, we need not actually extend
877 the narrow operands, as long as we will truncate
878 the results to the same narrowness. */
880 if ((binoptab == ior_optab || binoptab == and_optab
881 || binoptab == xor_optab
882 || binoptab == add_optab || binoptab == sub_optab
883 || binoptab == smul_optab || binoptab == ashl_optab)
884 && class == MODE_INT)
887 xop0 = widen_operand (xop0, wider_mode, mode, unsignedp, no_extend);
889 /* The second operand of a shift must always be extended. */
890 xop1 = widen_operand (xop1, wider_mode, mode, unsignedp,
891 no_extend && binoptab != ashl_optab);
893 temp = expand_binop (wider_mode, binoptab, xop0, xop1, NULL_RTX,
894 unsignedp, OPTAB_DIRECT);
897 if (class != MODE_INT)
900 target = gen_reg_rtx (mode);
901 convert_move (target, temp, 0);
905 return gen_lowpart (mode, temp);
908 delete_insns_since (last);
912 /* These can be done a word at a time. */
913 if ((binoptab == and_optab || binoptab == ior_optab || binoptab == xor_optab)
915 && GET_MODE_SIZE (mode) > UNITS_PER_WORD
916 && binoptab->handlers[(int) word_mode].insn_code != CODE_FOR_nothing)
922 /* If TARGET is the same as one of the operands, the REG_EQUAL note
923 won't be accurate, so use a new target. */
924 if (target == 0 || target == op0 || target == op1)
925 target = gen_reg_rtx (mode);
929 /* Do the actual arithmetic. */
930 for (i = 0; i < GET_MODE_BITSIZE (mode) / BITS_PER_WORD; i++)
932 rtx target_piece = operand_subword (target, i, 1, mode);
933 rtx x = expand_binop (word_mode, binoptab,
934 operand_subword_force (op0, i, mode),
935 operand_subword_force (op1, i, mode),
936 target_piece, unsignedp, next_methods);
941 if (target_piece != x)
942 emit_move_insn (target_piece, x);
945 insns = get_insns ();
948 if (i == GET_MODE_BITSIZE (mode) / BITS_PER_WORD)
950 if (binoptab->code != UNKNOWN)
952 = gen_rtx_fmt_ee (binoptab->code, mode,
953 copy_rtx (op0), copy_rtx (op1));
957 emit_no_conflict_block (insns, target, op0, op1, equiv_value);
962 /* Synthesize double word shifts from single word shifts. */
963 if ((binoptab == lshr_optab || binoptab == ashl_optab
964 || binoptab == ashr_optab)
966 && GET_CODE (op1) == CONST_INT
967 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
968 && binoptab->handlers[(int) word_mode].insn_code != CODE_FOR_nothing
969 && ashl_optab->handlers[(int) word_mode].insn_code != CODE_FOR_nothing
970 && lshr_optab->handlers[(int) word_mode].insn_code != CODE_FOR_nothing)
972 rtx insns, inter, equiv_value;
973 rtx into_target, outof_target;
974 rtx into_input, outof_input;
975 int shift_count, left_shift, outof_word;
977 /* If TARGET is the same as one of the operands, the REG_EQUAL note
978 won't be accurate, so use a new target. */
979 if (target == 0 || target == op0 || target == op1)
980 target = gen_reg_rtx (mode);
984 shift_count = INTVAL (op1);
986 /* OUTOF_* is the word we are shifting bits away from, and
987 INTO_* is the word that we are shifting bits towards, thus
988 they differ depending on the direction of the shift and
991 left_shift = binoptab == ashl_optab;
992 outof_word = left_shift ^ ! WORDS_BIG_ENDIAN;
994 outof_target = operand_subword (target, outof_word, 1, mode);
995 into_target = operand_subword (target, 1 - outof_word, 1, mode);
997 outof_input = operand_subword_force (op0, outof_word, mode);
998 into_input = operand_subword_force (op0, 1 - outof_word, mode);
1000 if (shift_count >= BITS_PER_WORD)
1002 inter = expand_binop (word_mode, binoptab,
1004 GEN_INT (shift_count - BITS_PER_WORD),
1005 into_target, unsignedp, next_methods);
1007 if (inter != 0 && inter != into_target)
1008 emit_move_insn (into_target, inter);
1010 /* For a signed right shift, we must fill the word we are shifting
1011 out of with copies of the sign bit. Otherwise it is zeroed. */
1012 if (inter != 0 && binoptab != ashr_optab)
1013 inter = CONST0_RTX (word_mode);
1014 else if (inter != 0)
1015 inter = expand_binop (word_mode, binoptab,
1017 GEN_INT (BITS_PER_WORD - 1),
1018 outof_target, unsignedp, next_methods);
1020 if (inter != 0 && inter != outof_target)
1021 emit_move_insn (outof_target, inter);
1026 optab reverse_unsigned_shift, unsigned_shift;
1028 /* For a shift of less then BITS_PER_WORD, to compute the carry,
1029 we must do a logical shift in the opposite direction of the
1032 reverse_unsigned_shift = (left_shift ? lshr_optab : ashl_optab);
1034 /* For a shift of less than BITS_PER_WORD, to compute the word
1035 shifted towards, we need to unsigned shift the orig value of
1038 unsigned_shift = (left_shift ? ashl_optab : lshr_optab);
1040 carries = expand_binop (word_mode, reverse_unsigned_shift,
1042 GEN_INT (BITS_PER_WORD - shift_count),
1043 0, unsignedp, next_methods);
1048 inter = expand_binop (word_mode, unsigned_shift, into_input,
1049 op1, 0, unsignedp, next_methods);
1052 inter = expand_binop (word_mode, ior_optab, carries, inter,
1053 into_target, unsignedp, next_methods);
1055 if (inter != 0 && inter != into_target)
1056 emit_move_insn (into_target, inter);
1059 inter = expand_binop (word_mode, binoptab, outof_input,
1060 op1, outof_target, unsignedp, next_methods);
1062 if (inter != 0 && inter != outof_target)
1063 emit_move_insn (outof_target, inter);
1066 insns = get_insns ();
1071 if (binoptab->code != UNKNOWN)
1072 equiv_value = gen_rtx_fmt_ee (binoptab->code, mode, op0, op1);
1076 emit_no_conflict_block (insns, target, op0, op1, equiv_value);
1081 /* Synthesize double word rotates from single word shifts. */
1082 if ((binoptab == rotl_optab || binoptab == rotr_optab)
1083 && class == MODE_INT
1084 && GET_CODE (op1) == CONST_INT
1085 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
1086 && ashl_optab->handlers[(int) word_mode].insn_code != CODE_FOR_nothing
1087 && lshr_optab->handlers[(int) word_mode].insn_code != CODE_FOR_nothing)
1089 rtx insns, equiv_value;
1090 rtx into_target, outof_target;
1091 rtx into_input, outof_input;
1093 int shift_count, left_shift, outof_word;
1095 /* If TARGET is the same as one of the operands, the REG_EQUAL note
1096 won't be accurate, so use a new target. */
1097 if (target == 0 || target == op0 || target == op1)
1098 target = gen_reg_rtx (mode);
1102 shift_count = INTVAL (op1);
1104 /* OUTOF_* is the word we are shifting bits away from, and
1105 INTO_* is the word that we are shifting bits towards, thus
1106 they differ depending on the direction of the shift and
1107 WORDS_BIG_ENDIAN. */
1109 left_shift = (binoptab == rotl_optab);
1110 outof_word = left_shift ^ ! WORDS_BIG_ENDIAN;
1112 outof_target = operand_subword (target, outof_word, 1, mode);
1113 into_target = operand_subword (target, 1 - outof_word, 1, mode);
1115 outof_input = operand_subword_force (op0, outof_word, mode);
1116 into_input = operand_subword_force (op0, 1 - outof_word, mode);
1118 if (shift_count == BITS_PER_WORD)
1120 /* This is just a word swap. */
1121 emit_move_insn (outof_target, into_input);
1122 emit_move_insn (into_target, outof_input);
1127 rtx into_temp1, into_temp2, outof_temp1, outof_temp2;
1128 rtx first_shift_count, second_shift_count;
1129 optab reverse_unsigned_shift, unsigned_shift;
1131 reverse_unsigned_shift = (left_shift ^ (shift_count < BITS_PER_WORD)
1132 ? lshr_optab : ashl_optab);
1134 unsigned_shift = (left_shift ^ (shift_count < BITS_PER_WORD)
1135 ? ashl_optab : lshr_optab);
1137 if (shift_count > BITS_PER_WORD)
1139 first_shift_count = GEN_INT (shift_count - BITS_PER_WORD);
1140 second_shift_count = GEN_INT (2 * BITS_PER_WORD - shift_count);
1144 first_shift_count = GEN_INT (BITS_PER_WORD - shift_count);
1145 second_shift_count = GEN_INT (shift_count);
1148 into_temp1 = expand_binop (word_mode, unsigned_shift,
1149 outof_input, first_shift_count,
1150 NULL_RTX, unsignedp, next_methods);
1151 into_temp2 = expand_binop (word_mode, reverse_unsigned_shift,
1152 into_input, second_shift_count,
1153 NULL_RTX, unsignedp, next_methods);
1155 if (into_temp1 != 0 && into_temp2 != 0)
1156 inter = expand_binop (word_mode, ior_optab, into_temp1, into_temp2,
1157 into_target, unsignedp, next_methods);
1161 if (inter != 0 && inter != into_target)
1162 emit_move_insn (into_target, inter);
1164 outof_temp1 = expand_binop (word_mode, unsigned_shift,
1165 into_input, first_shift_count,
1166 NULL_RTX, unsignedp, next_methods);
1167 outof_temp2 = expand_binop (word_mode, reverse_unsigned_shift,
1168 outof_input, second_shift_count,
1169 NULL_RTX, unsignedp, next_methods);
1171 if (inter != 0 && outof_temp1 != 0 && outof_temp2 != 0)
1172 inter = expand_binop (word_mode, ior_optab,
1173 outof_temp1, outof_temp2,
1174 outof_target, unsignedp, next_methods);
1176 if (inter != 0 && inter != outof_target)
1177 emit_move_insn (outof_target, inter);
1180 insns = get_insns ();
1185 if (binoptab->code != UNKNOWN)
1186 equiv_value = gen_rtx_fmt_ee (binoptab->code, mode, op0, op1);
1190 /* We can't make this a no conflict block if this is a word swap,
1191 because the word swap case fails if the input and output values
1192 are in the same register. */
1193 if (shift_count != BITS_PER_WORD)
1194 emit_no_conflict_block (insns, target, op0, op1, equiv_value);
1203 /* These can be done a word at a time by propagating carries. */
1204 if ((binoptab == add_optab || binoptab == sub_optab)
1205 && class == MODE_INT
1206 && GET_MODE_SIZE (mode) >= 2 * UNITS_PER_WORD
1207 && binoptab->handlers[(int) word_mode].insn_code != CODE_FOR_nothing)
1210 optab otheroptab = binoptab == add_optab ? sub_optab : add_optab;
1211 const unsigned int nwords = GET_MODE_BITSIZE (mode) / BITS_PER_WORD;
1212 rtx carry_in = NULL_RTX, carry_out = NULL_RTX;
1213 rtx xop0, xop1, xtarget;
1215 /* We can handle either a 1 or -1 value for the carry. If STORE_FLAG
1216 value is one of those, use it. Otherwise, use 1 since it is the
1217 one easiest to get. */
1218 #if STORE_FLAG_VALUE == 1 || STORE_FLAG_VALUE == -1
1219 int normalizep = STORE_FLAG_VALUE;
1224 /* Prepare the operands. */
1225 xop0 = force_reg (mode, op0);
1226 xop1 = force_reg (mode, op1);
1228 xtarget = gen_reg_rtx (mode);
1230 if (target == 0 || GET_CODE (target) != REG)
1233 /* Indicate for flow that the entire target reg is being set. */
1234 if (GET_CODE (target) == REG)
1235 emit_insn (gen_rtx_CLOBBER (VOIDmode, xtarget));
1237 /* Do the actual arithmetic. */
1238 for (i = 0; i < nwords; i++)
1240 int index = (WORDS_BIG_ENDIAN ? nwords - i - 1 : i);
1241 rtx target_piece = operand_subword (xtarget, index, 1, mode);
1242 rtx op0_piece = operand_subword_force (xop0, index, mode);
1243 rtx op1_piece = operand_subword_force (xop1, index, mode);
1246 /* Main add/subtract of the input operands. */
1247 x = expand_binop (word_mode, binoptab,
1248 op0_piece, op1_piece,
1249 target_piece, unsignedp, next_methods);
1255 /* Store carry from main add/subtract. */
1256 carry_out = gen_reg_rtx (word_mode);
1257 carry_out = emit_store_flag_force (carry_out,
1258 (binoptab == add_optab
1261 word_mode, 1, normalizep);
1268 /* Add/subtract previous carry to main result. */
1269 newx = expand_binop (word_mode,
1270 normalizep == 1 ? binoptab : otheroptab,
1272 NULL_RTX, 1, next_methods);
1276 /* Get out carry from adding/subtracting carry in. */
1277 rtx carry_tmp = gen_reg_rtx (word_mode);
1278 carry_tmp = emit_store_flag_force (carry_tmp,
1279 (binoptab == add_optab
1282 word_mode, 1, normalizep);
1284 /* Logical-ior the two poss. carry together. */
1285 carry_out = expand_binop (word_mode, ior_optab,
1286 carry_out, carry_tmp,
1287 carry_out, 0, next_methods);
1291 emit_move_insn (target_piece, newx);
1294 carry_in = carry_out;
1297 if (i == GET_MODE_BITSIZE (mode) / (unsigned) BITS_PER_WORD)
1299 if (mov_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
1301 rtx temp = emit_move_insn (target, xtarget);
1303 set_unique_reg_note (temp,
1305 gen_rtx_fmt_ee (binoptab->code, mode,
1314 delete_insns_since (last);
1317 /* If we want to multiply two two-word values and have normal and widening
1318 multiplies of single-word values, we can do this with three smaller
1319 multiplications. Note that we do not make a REG_NO_CONFLICT block here
1320 because we are not operating on one word at a time.
1322 The multiplication proceeds as follows:
1323 _______________________
1324 [__op0_high_|__op0_low__]
1325 _______________________
1326 * [__op1_high_|__op1_low__]
1327 _______________________________________________
1328 _______________________
1329 (1) [__op0_low__*__op1_low__]
1330 _______________________
1331 (2a) [__op0_low__*__op1_high_]
1332 _______________________
1333 (2b) [__op0_high_*__op1_low__]
1334 _______________________
1335 (3) [__op0_high_*__op1_high_]
1338 This gives a 4-word result. Since we are only interested in the
1339 lower 2 words, partial result (3) and the upper words of (2a) and
1340 (2b) don't need to be calculated. Hence (2a) and (2b) can be
1341 calculated using non-widening multiplication.
1343 (1), however, needs to be calculated with an unsigned widening
1344 multiplication. If this operation is not directly supported we
1345 try using a signed widening multiplication and adjust the result.
1346 This adjustment works as follows:
1348 If both operands are positive then no adjustment is needed.
1350 If the operands have different signs, for example op0_low < 0 and
1351 op1_low >= 0, the instruction treats the most significant bit of
1352 op0_low as a sign bit instead of a bit with significance
1353 2**(BITS_PER_WORD-1), i.e. the instruction multiplies op1_low
1354 with 2**BITS_PER_WORD - op0_low, and two's complements the
1355 result. Conclusion: We need to add op1_low * 2**BITS_PER_WORD to
1358 Similarly, if both operands are negative, we need to add
1359 (op0_low + op1_low) * 2**BITS_PER_WORD.
1361 We use a trick to adjust quickly. We logically shift op0_low right
1362 (op1_low) BITS_PER_WORD-1 steps to get 0 or 1, and add this to
1363 op0_high (op1_high) before it is used to calculate 2b (2a). If no
1364 logical shift exists, we do an arithmetic right shift and subtract
1367 if (binoptab == smul_optab
1368 && class == MODE_INT
1369 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
1370 && smul_optab->handlers[(int) word_mode].insn_code != CODE_FOR_nothing
1371 && add_optab->handlers[(int) word_mode].insn_code != CODE_FOR_nothing
1372 && ((umul_widen_optab->handlers[(int) mode].insn_code
1373 != CODE_FOR_nothing)
1374 || (smul_widen_optab->handlers[(int) mode].insn_code
1375 != CODE_FOR_nothing)))
1377 int low = (WORDS_BIG_ENDIAN ? 1 : 0);
1378 int high = (WORDS_BIG_ENDIAN ? 0 : 1);
1379 rtx op0_high = operand_subword_force (op0, high, mode);
1380 rtx op0_low = operand_subword_force (op0, low, mode);
1381 rtx op1_high = operand_subword_force (op1, high, mode);
1382 rtx op1_low = operand_subword_force (op1, low, mode);
1384 rtx op0_xhigh = NULL_RTX;
1385 rtx op1_xhigh = NULL_RTX;
1387 /* If the target is the same as one of the inputs, don't use it. This
1388 prevents problems with the REG_EQUAL note. */
1389 if (target == op0 || target == op1
1390 || (target != 0 && GET_CODE (target) != REG))
1393 /* Multiply the two lower words to get a double-word product.
1394 If unsigned widening multiplication is available, use that;
1395 otherwise use the signed form and compensate. */
1397 if (umul_widen_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
1399 product = expand_binop (mode, umul_widen_optab, op0_low, op1_low,
1400 target, 1, OPTAB_DIRECT);
1402 /* If we didn't succeed, delete everything we did so far. */
1404 delete_insns_since (last);
1406 op0_xhigh = op0_high, op1_xhigh = op1_high;
1410 && smul_widen_optab->handlers[(int) mode].insn_code
1411 != CODE_FOR_nothing)
1413 rtx wordm1 = GEN_INT (BITS_PER_WORD - 1);
1414 product = expand_binop (mode, smul_widen_optab, op0_low, op1_low,
1415 target, 1, OPTAB_DIRECT);
1416 op0_xhigh = expand_binop (word_mode, lshr_optab, op0_low, wordm1,
1417 NULL_RTX, 1, next_methods);
1419 op0_xhigh = expand_binop (word_mode, add_optab, op0_high,
1420 op0_xhigh, op0_xhigh, 0, next_methods);
1423 op0_xhigh = expand_binop (word_mode, ashr_optab, op0_low, wordm1,
1424 NULL_RTX, 0, next_methods);
1426 op0_xhigh = expand_binop (word_mode, sub_optab, op0_high,
1427 op0_xhigh, op0_xhigh, 0,
1431 op1_xhigh = expand_binop (word_mode, lshr_optab, op1_low, wordm1,
1432 NULL_RTX, 1, next_methods);
1434 op1_xhigh = expand_binop (word_mode, add_optab, op1_high,
1435 op1_xhigh, op1_xhigh, 0, next_methods);
1438 op1_xhigh = expand_binop (word_mode, ashr_optab, op1_low, wordm1,
1439 NULL_RTX, 0, next_methods);
1441 op1_xhigh = expand_binop (word_mode, sub_optab, op1_high,
1442 op1_xhigh, op1_xhigh, 0,
1447 /* If we have been able to directly compute the product of the
1448 low-order words of the operands and perform any required adjustments
1449 of the operands, we proceed by trying two more multiplications
1450 and then computing the appropriate sum.
1452 We have checked above that the required addition is provided.
1453 Full-word addition will normally always succeed, especially if
1454 it is provided at all, so we don't worry about its failure. The
1455 multiplication may well fail, however, so we do handle that. */
1457 if (product && op0_xhigh && op1_xhigh)
1459 rtx product_high = operand_subword (product, high, 1, mode);
1460 rtx temp = expand_binop (word_mode, binoptab, op0_low, op1_xhigh,
1461 NULL_RTX, 0, OPTAB_DIRECT);
1463 if (!REG_P (product_high))
1464 product_high = force_reg (word_mode, product_high);
1467 temp = expand_binop (word_mode, add_optab, temp, product_high,
1468 product_high, 0, next_methods);
1470 if (temp != 0 && temp != product_high)
1471 emit_move_insn (product_high, temp);
1474 temp = expand_binop (word_mode, binoptab, op1_low, op0_xhigh,
1475 NULL_RTX, 0, OPTAB_DIRECT);
1478 temp = expand_binop (word_mode, add_optab, temp,
1479 product_high, product_high,
1482 if (temp != 0 && temp != product_high)
1483 emit_move_insn (product_high, temp);
1485 emit_move_insn (operand_subword (product, high, 1, mode), product_high);
1489 if (mov_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
1491 temp = emit_move_insn (product, product);
1492 set_unique_reg_note (temp,
1494 gen_rtx_fmt_ee (MULT, mode,
1503 /* If we get here, we couldn't do it for some reason even though we
1504 originally thought we could. Delete anything we've emitted in
1507 delete_insns_since (last);
1510 /* Open-code the vector operations if we have no hardware support
1512 if (class == MODE_VECTOR_INT || class == MODE_VECTOR_FLOAT)
1513 return expand_vector_binop (mode, binoptab, op0, op1, target,
1514 unsignedp, methods);
1516 /* We need to open-code the complex type operations: '+, -, * and /' */
1518 /* At this point we allow operations between two similar complex
1519 numbers, and also if one of the operands is not a complex number
1520 but rather of MODE_FLOAT or MODE_INT. However, the caller
1521 must make sure that the MODE of the non-complex operand matches
1522 the SUBMODE of the complex operand. */
1524 if (class == MODE_COMPLEX_FLOAT || class == MODE_COMPLEX_INT)
1526 rtx real0 = 0, imag0 = 0;
1527 rtx real1 = 0, imag1 = 0;
1528 rtx realr, imagr, res;
1533 /* Find the correct mode for the real and imaginary parts */
1534 enum machine_mode submode
1535 = mode_for_size (GET_MODE_UNIT_SIZE (mode) * BITS_PER_UNIT,
1536 class == MODE_COMPLEX_INT ? MODE_INT : MODE_FLOAT,
1539 if (submode == BLKmode)
1543 target = gen_reg_rtx (mode);
1547 realr = gen_realpart (submode, target);
1548 imagr = gen_imagpart (submode, target);
1550 if (GET_MODE (op0) == mode)
1552 real0 = gen_realpart (submode, op0);
1553 imag0 = gen_imagpart (submode, op0);
1558 if (GET_MODE (op1) == mode)
1560 real1 = gen_realpart (submode, op1);
1561 imag1 = gen_imagpart (submode, op1);
1566 if (real0 == 0 || real1 == 0 || ! (imag0 != 0 || imag1 != 0))
1569 switch (binoptab->code)
1572 /* (a+ib) + (c+id) = (a+c) + i(b+d) */
1574 /* (a+ib) - (c+id) = (a-c) + i(b-d) */
1575 res = expand_binop (submode, binoptab, real0, real1,
1576 realr, unsignedp, methods);
1580 else if (res != realr)
1581 emit_move_insn (realr, res);
1583 if (imag0 != 0 && imag1 != 0)
1584 res = expand_binop (submode, binoptab, imag0, imag1,
1585 imagr, unsignedp, methods);
1586 else if (imag0 != 0)
1588 else if (binoptab->code == MINUS)
1589 res = expand_unop (submode,
1590 binoptab == subv_optab ? negv_optab : neg_optab,
1591 imag1, imagr, unsignedp);
1597 else if (res != imagr)
1598 emit_move_insn (imagr, res);
1604 /* (a+ib) * (c+id) = (ac-bd) + i(ad+cb) */
1606 if (imag0 != 0 && imag1 != 0)
1610 /* Don't fetch these from memory more than once. */
1611 real0 = force_reg (submode, real0);
1612 real1 = force_reg (submode, real1);
1613 imag0 = force_reg (submode, imag0);
1614 imag1 = force_reg (submode, imag1);
1616 temp1 = expand_binop (submode, binoptab, real0, real1, NULL_RTX,
1617 unsignedp, methods);
1619 temp2 = expand_binop (submode, binoptab, imag0, imag1, NULL_RTX,
1620 unsignedp, methods);
1622 if (temp1 == 0 || temp2 == 0)
1627 binoptab == smulv_optab ? subv_optab : sub_optab,
1628 temp1, temp2, realr, unsignedp, methods));
1632 else if (res != realr)
1633 emit_move_insn (realr, res);
1635 temp1 = expand_binop (submode, binoptab, real0, imag1,
1636 NULL_RTX, unsignedp, methods);
1638 temp2 = expand_binop (submode, binoptab, real1, imag0,
1639 NULL_RTX, unsignedp, methods);
1641 if (temp1 == 0 || temp2 == 0)
1646 binoptab == smulv_optab ? addv_optab : add_optab,
1647 temp1, temp2, imagr, unsignedp, methods));
1651 else if (res != imagr)
1652 emit_move_insn (imagr, res);
1658 /* Don't fetch these from memory more than once. */
1659 real0 = force_reg (submode, real0);
1660 real1 = force_reg (submode, real1);
1662 res = expand_binop (submode, binoptab, real0, real1,
1663 realr, unsignedp, methods);
1666 else if (res != realr)
1667 emit_move_insn (realr, res);
1670 res = expand_binop (submode, binoptab,
1671 real1, imag0, imagr, unsignedp, methods);
1673 res = expand_binop (submode, binoptab,
1674 real0, imag1, imagr, unsignedp, methods);
1678 else if (res != imagr)
1679 emit_move_insn (imagr, res);
1686 /* (a+ib) / (c+id) = ((ac+bd)/(cc+dd)) + i((bc-ad)/(cc+dd)) */
1690 /* (a+ib) / (c+i0) = (a/c) + i(b/c) */
1692 /* Don't fetch these from memory more than once. */
1693 real1 = force_reg (submode, real1);
1695 /* Simply divide the real and imaginary parts by `c' */
1696 if (class == MODE_COMPLEX_FLOAT)
1697 res = expand_binop (submode, binoptab, real0, real1,
1698 realr, unsignedp, methods);
1700 res = expand_divmod (0, TRUNC_DIV_EXPR, submode,
1701 real0, real1, realr, unsignedp);
1705 else if (res != realr)
1706 emit_move_insn (realr, res);
1708 if (class == MODE_COMPLEX_FLOAT)
1709 res = expand_binop (submode, binoptab, imag0, real1,
1710 imagr, unsignedp, methods);
1712 res = expand_divmod (0, TRUNC_DIV_EXPR, submode,
1713 imag0, real1, imagr, unsignedp);
1717 else if (res != imagr)
1718 emit_move_insn (imagr, res);
1724 switch (flag_complex_divide_method)
1727 ok = expand_cmplxdiv_straight (real0, real1, imag0, imag1,
1728 realr, imagr, submode,
1734 ok = expand_cmplxdiv_wide (real0, real1, imag0, imag1,
1735 realr, imagr, submode,
1755 if (binoptab->code != UNKNOWN)
1757 = gen_rtx_fmt_ee (binoptab->code, mode,
1758 copy_rtx (op0), copy_rtx (op1));
1762 emit_no_conflict_block (seq, target, op0, op1, equiv_value);
1768 /* It can't be open-coded in this mode.
1769 Use a library call if one is available and caller says that's ok. */
1771 if (binoptab->handlers[(int) mode].libfunc
1772 && (methods == OPTAB_LIB || methods == OPTAB_LIB_WIDEN))
1776 enum machine_mode op1_mode = mode;
1783 op1_mode = word_mode;
1784 /* Specify unsigned here,
1785 since negative shift counts are meaningless. */
1786 op1x = convert_to_mode (word_mode, op1, 1);
1789 if (GET_MODE (op0) != VOIDmode
1790 && GET_MODE (op0) != mode)
1791 op0 = convert_to_mode (mode, op0, unsignedp);
1793 /* Pass 1 for NO_QUEUE so we don't lose any increments
1794 if the libcall is cse'd or moved. */
1795 value = emit_library_call_value (binoptab->handlers[(int) mode].libfunc,
1796 NULL_RTX, LCT_CONST, mode, 2,
1797 op0, mode, op1x, op1_mode);
1799 insns = get_insns ();
1802 target = gen_reg_rtx (mode);
1803 emit_libcall_block (insns, target, value,
1804 gen_rtx_fmt_ee (binoptab->code, mode, op0, op1));
1809 delete_insns_since (last);
1811 /* It can't be done in this mode. Can we do it in a wider mode? */
1813 if (! (methods == OPTAB_WIDEN || methods == OPTAB_LIB_WIDEN
1814 || methods == OPTAB_MUST_WIDEN))
1816 /* Caller says, don't even try. */
1817 delete_insns_since (entry_last);
1821 /* Compute the value of METHODS to pass to recursive calls.
1822 Don't allow widening to be tried recursively. */
1824 methods = (methods == OPTAB_LIB_WIDEN ? OPTAB_LIB : OPTAB_DIRECT);
1826 /* Look for a wider mode of the same class for which it appears we can do
1829 if (class == MODE_INT || class == MODE_FLOAT || class == MODE_COMPLEX_FLOAT)
1831 for (wider_mode = GET_MODE_WIDER_MODE (mode); wider_mode != VOIDmode;
1832 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
1834 if ((binoptab->handlers[(int) wider_mode].insn_code
1835 != CODE_FOR_nothing)
1836 || (methods == OPTAB_LIB
1837 && binoptab->handlers[(int) wider_mode].libfunc))
1839 rtx xop0 = op0, xop1 = op1;
1842 /* For certain integer operations, we need not actually extend
1843 the narrow operands, as long as we will truncate
1844 the results to the same narrowness. */
1846 if ((binoptab == ior_optab || binoptab == and_optab
1847 || binoptab == xor_optab
1848 || binoptab == add_optab || binoptab == sub_optab
1849 || binoptab == smul_optab || binoptab == ashl_optab)
1850 && class == MODE_INT)
1853 xop0 = widen_operand (xop0, wider_mode, mode,
1854 unsignedp, no_extend);
1856 /* The second operand of a shift must always be extended. */
1857 xop1 = widen_operand (xop1, wider_mode, mode, unsignedp,
1858 no_extend && binoptab != ashl_optab);
1860 temp = expand_binop (wider_mode, binoptab, xop0, xop1, NULL_RTX,
1861 unsignedp, methods);
1864 if (class != MODE_INT)
1867 target = gen_reg_rtx (mode);
1868 convert_move (target, temp, 0);
1872 return gen_lowpart (mode, temp);
1875 delete_insns_since (last);
1880 delete_insns_since (entry_last);
1884 /* Like expand_binop, but for open-coding vectors binops. */
1887 expand_vector_binop (mode, binoptab, op0, op1, target, unsignedp, methods)
1888 enum machine_mode mode;
1893 enum optab_methods methods;
1895 enum machine_mode submode, tmode;
1896 int size, elts, subsize, subbitsize, i;
1897 rtx t, a, b, res, seq;
1898 enum mode_class class;
1900 class = GET_MODE_CLASS (mode);
1902 size = GET_MODE_SIZE (mode);
1903 submode = GET_MODE_INNER (mode);
1905 /* Search for the widest vector mode with the same inner mode that is
1906 still narrower than MODE and that allows to open-code this operator.
1907 Note, if we find such a mode and the handler later decides it can't
1908 do the expansion, we'll be called recursively with the narrower mode. */
1909 for (tmode = GET_CLASS_NARROWEST_MODE (class);
1910 GET_MODE_SIZE (tmode) < GET_MODE_SIZE (mode);
1911 tmode = GET_MODE_WIDER_MODE (tmode))
1913 if (GET_MODE_INNER (tmode) == GET_MODE_INNER (mode)
1914 && binoptab->handlers[(int) tmode].insn_code != CODE_FOR_nothing)
1918 switch (binoptab->code)
1923 tmode = int_mode_for_mode (mode);
1924 if (tmode != BLKmode)
1930 subsize = GET_MODE_SIZE (submode);
1931 subbitsize = GET_MODE_BITSIZE (submode);
1932 elts = size / subsize;
1934 /* If METHODS is OPTAB_DIRECT, we don't insist on the exact mode,
1935 but that we operate on more than one element at a time. */
1936 if (subsize == GET_MODE_UNIT_SIZE (mode) && methods == OPTAB_DIRECT)
1941 /* Errors can leave us with a const0_rtx as operand. */
1942 if (GET_MODE (op0) != mode)
1943 op0 = copy_to_mode_reg (mode, op0);
1944 if (GET_MODE (op1) != mode)
1945 op1 = copy_to_mode_reg (mode, op1);
1948 target = gen_reg_rtx (mode);
1950 for (i = 0; i < elts; ++i)
1952 /* If this is part of a register, and not the first item in the
1953 word, we can't store using a SUBREG - that would clobber
1955 And storing with a SUBREG is only possible for the least
1956 significant part, hence we can't do it for big endian
1957 (unless we want to permute the evaluation order. */
1958 if (GET_CODE (target) == REG
1959 && (BYTES_BIG_ENDIAN
1960 ? subsize < UNITS_PER_WORD
1961 : ((i * subsize) % UNITS_PER_WORD) != 0))
1964 t = simplify_gen_subreg (submode, target, mode, i * subsize);
1965 if (CONSTANT_P (op0))
1966 a = simplify_gen_subreg (submode, op0, mode, i * subsize);
1968 a = extract_bit_field (op0, subbitsize, i * subbitsize, unsignedp,
1969 NULL_RTX, submode, submode, size);
1970 if (CONSTANT_P (op1))
1971 b = simplify_gen_subreg (submode, op1, mode, i * subsize);
1973 b = extract_bit_field (op1, subbitsize, i * subbitsize, unsignedp,
1974 NULL_RTX, submode, submode, size);
1976 if (binoptab->code == DIV)
1978 if (class == MODE_VECTOR_FLOAT)
1979 res = expand_binop (submode, binoptab, a, b, t,
1980 unsignedp, methods);
1982 res = expand_divmod (0, TRUNC_DIV_EXPR, submode,
1983 a, b, t, unsignedp);
1986 res = expand_binop (submode, binoptab, a, b, t,
1987 unsignedp, methods);
1993 emit_move_insn (t, res);
1995 store_bit_field (target, subbitsize, i * subbitsize, submode, res,
2011 /* Like expand_unop but for open-coding vector unops. */
2014 expand_vector_unop (mode, unoptab, op0, target, unsignedp)
2015 enum machine_mode mode;
2021 enum machine_mode submode, tmode;
2022 int size, elts, subsize, subbitsize, i;
2025 size = GET_MODE_SIZE (mode);
2026 submode = GET_MODE_INNER (mode);
2028 /* Search for the widest vector mode with the same inner mode that is
2029 still narrower than MODE and that allows to open-code this operator.
2030 Note, if we find such a mode and the handler later decides it can't
2031 do the expansion, we'll be called recursively with the narrower mode. */
2032 for (tmode = GET_CLASS_NARROWEST_MODE (GET_MODE_CLASS (mode));
2033 GET_MODE_SIZE (tmode) < GET_MODE_SIZE (mode);
2034 tmode = GET_MODE_WIDER_MODE (tmode))
2036 if (GET_MODE_INNER (tmode) == GET_MODE_INNER (mode)
2037 && unoptab->handlers[(int) tmode].insn_code != CODE_FOR_nothing)
2040 /* If there is no negate operation, try doing a subtract from zero. */
2041 if (unoptab == neg_optab && GET_MODE_CLASS (submode) == MODE_INT
2042 /* Avoid infinite recursion when an
2043 error has left us with the wrong mode. */
2044 && GET_MODE (op0) == mode)
2047 temp = expand_binop (mode, sub_optab, CONST0_RTX (mode), op0,
2048 target, unsignedp, OPTAB_DIRECT);
2053 if (unoptab == one_cmpl_optab)
2055 tmode = int_mode_for_mode (mode);
2056 if (tmode != BLKmode)
2060 subsize = GET_MODE_SIZE (submode);
2061 subbitsize = GET_MODE_BITSIZE (submode);
2062 elts = size / subsize;
2064 /* Errors can leave us with a const0_rtx as operand. */
2065 if (GET_MODE (op0) != mode)
2066 op0 = copy_to_mode_reg (mode, op0);
2069 target = gen_reg_rtx (mode);
2073 for (i = 0; i < elts; ++i)
2075 /* If this is part of a register, and not the first item in the
2076 word, we can't store using a SUBREG - that would clobber
2078 And storing with a SUBREG is only possible for the least
2079 significant part, hence we can't do it for big endian
2080 (unless we want to permute the evaluation order. */
2081 if (GET_CODE (target) == REG
2082 && (BYTES_BIG_ENDIAN
2083 ? subsize < UNITS_PER_WORD
2084 : ((i * subsize) % UNITS_PER_WORD) != 0))
2087 t = simplify_gen_subreg (submode, target, mode, i * subsize);
2088 if (CONSTANT_P (op0))
2089 a = simplify_gen_subreg (submode, op0, mode, i * subsize);
2091 a = extract_bit_field (op0, subbitsize, i * subbitsize, unsignedp,
2092 t, submode, submode, size);
2094 res = expand_unop (submode, unoptab, a, t, unsignedp);
2097 emit_move_insn (t, res);
2099 store_bit_field (target, subbitsize, i * subbitsize, submode, res,
2110 /* Expand a binary operator which has both signed and unsigned forms.
2111 UOPTAB is the optab for unsigned operations, and SOPTAB is for
2114 If we widen unsigned operands, we may use a signed wider operation instead
2115 of an unsigned wider operation, since the result would be the same. */
2118 sign_expand_binop (mode, uoptab, soptab, op0, op1, target, unsignedp, methods)
2119 enum machine_mode mode;
2120 optab uoptab, soptab;
2121 rtx op0, op1, target;
2123 enum optab_methods methods;
2126 optab direct_optab = unsignedp ? uoptab : soptab;
2127 struct optab wide_soptab;
2129 /* Do it without widening, if possible. */
2130 temp = expand_binop (mode, direct_optab, op0, op1, target,
2131 unsignedp, OPTAB_DIRECT);
2132 if (temp || methods == OPTAB_DIRECT)
2135 /* Try widening to a signed int. Make a fake signed optab that
2136 hides any signed insn for direct use. */
2137 wide_soptab = *soptab;
2138 wide_soptab.handlers[(int) mode].insn_code = CODE_FOR_nothing;
2139 wide_soptab.handlers[(int) mode].libfunc = 0;
2141 temp = expand_binop (mode, &wide_soptab, op0, op1, target,
2142 unsignedp, OPTAB_WIDEN);
2144 /* For unsigned operands, try widening to an unsigned int. */
2145 if (temp == 0 && unsignedp)
2146 temp = expand_binop (mode, uoptab, op0, op1, target,
2147 unsignedp, OPTAB_WIDEN);
2148 if (temp || methods == OPTAB_WIDEN)
2151 /* Use the right width lib call if that exists. */
2152 temp = expand_binop (mode, direct_optab, op0, op1, target, unsignedp, OPTAB_LIB);
2153 if (temp || methods == OPTAB_LIB)
2156 /* Must widen and use a lib call, use either signed or unsigned. */
2157 temp = expand_binop (mode, &wide_soptab, op0, op1, target,
2158 unsignedp, methods);
2162 return expand_binop (mode, uoptab, op0, op1, target,
2163 unsignedp, methods);
2167 /* Generate code to perform an operation specified by BINOPTAB
2168 on operands OP0 and OP1, with two results to TARG1 and TARG2.
2169 We assume that the order of the operands for the instruction
2170 is TARG0, OP0, OP1, TARG1, which would fit a pattern like
2171 [(set TARG0 (operate OP0 OP1)) (set TARG1 (operate ...))].
2173 Either TARG0 or TARG1 may be zero, but what that means is that
2174 the result is not actually wanted. We will generate it into
2175 a dummy pseudo-reg and discard it. They may not both be zero.
2177 Returns 1 if this operation can be performed; 0 if not. */
2180 expand_twoval_binop (binoptab, op0, op1, targ0, targ1, unsignedp)
2186 enum machine_mode mode = GET_MODE (targ0 ? targ0 : targ1);
2187 enum mode_class class;
2188 enum machine_mode wider_mode;
2189 rtx entry_last = get_last_insn ();
2192 class = GET_MODE_CLASS (mode);
2194 op0 = protect_from_queue (op0, 0);
2195 op1 = protect_from_queue (op1, 0);
2199 op0 = force_not_mem (op0);
2200 op1 = force_not_mem (op1);
2203 /* If we are inside an appropriately-short loop and one operand is an
2204 expensive constant, force it into a register. */
2205 if (CONSTANT_P (op0) && preserve_subexpressions_p ()
2206 && rtx_cost (op0, binoptab->code) > COSTS_N_INSNS (1))
2207 op0 = force_reg (mode, op0);
2209 if (CONSTANT_P (op1) && preserve_subexpressions_p ()
2210 && rtx_cost (op1, binoptab->code) > COSTS_N_INSNS (1))
2211 op1 = force_reg (mode, op1);
2214 targ0 = protect_from_queue (targ0, 1);
2216 targ0 = gen_reg_rtx (mode);
2218 targ1 = protect_from_queue (targ1, 1);
2220 targ1 = gen_reg_rtx (mode);
2222 /* Record where to go back to if we fail. */
2223 last = get_last_insn ();
2225 if (binoptab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
2227 int icode = (int) binoptab->handlers[(int) mode].insn_code;
2228 enum machine_mode mode0 = insn_data[icode].operand[1].mode;
2229 enum machine_mode mode1 = insn_data[icode].operand[2].mode;
2231 rtx xop0 = op0, xop1 = op1;
2233 /* In case the insn wants input operands in modes different from
2234 those of the actual operands, convert the operands. It would
2235 seem that we don't need to convert CONST_INTs, but we do, so
2236 that they're properly zero-extended, sign-extended or truncated
2239 if (GET_MODE (op0) != mode0 && mode0 != VOIDmode)
2240 xop0 = convert_modes (mode0,
2241 GET_MODE (op0) != VOIDmode
2246 if (GET_MODE (op1) != mode1 && mode1 != VOIDmode)
2247 xop1 = convert_modes (mode1,
2248 GET_MODE (op1) != VOIDmode
2253 /* Now, if insn doesn't accept these operands, put them into pseudos. */
2254 if (! (*insn_data[icode].operand[1].predicate) (xop0, mode0))
2255 xop0 = copy_to_mode_reg (mode0, xop0);
2257 if (! (*insn_data[icode].operand[2].predicate) (xop1, mode1))
2258 xop1 = copy_to_mode_reg (mode1, xop1);
2260 /* We could handle this, but we should always be called with a pseudo
2261 for our targets and all insns should take them as outputs. */
2262 if (! (*insn_data[icode].operand[0].predicate) (targ0, mode)
2263 || ! (*insn_data[icode].operand[3].predicate) (targ1, mode))
2266 pat = GEN_FCN (icode) (targ0, xop0, xop1, targ1);
2273 delete_insns_since (last);
2276 /* It can't be done in this mode. Can we do it in a wider mode? */
2278 if (class == MODE_INT || class == MODE_FLOAT || class == MODE_COMPLEX_FLOAT)
2280 for (wider_mode = GET_MODE_WIDER_MODE (mode); wider_mode != VOIDmode;
2281 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
2283 if (binoptab->handlers[(int) wider_mode].insn_code
2284 != CODE_FOR_nothing)
2286 rtx t0 = gen_reg_rtx (wider_mode);
2287 rtx t1 = gen_reg_rtx (wider_mode);
2288 rtx cop0 = convert_modes (wider_mode, mode, op0, unsignedp);
2289 rtx cop1 = convert_modes (wider_mode, mode, op1, unsignedp);
2291 if (expand_twoval_binop (binoptab, cop0, cop1,
2294 convert_move (targ0, t0, unsignedp);
2295 convert_move (targ1, t1, unsignedp);
2299 delete_insns_since (last);
2304 delete_insns_since (entry_last);
2308 /* Wrapper around expand_unop which takes an rtx code to specify
2309 the operation to perform, not an optab pointer. All other
2310 arguments are the same. */
2312 expand_simple_unop (mode, code, op0, target, unsignedp)
2313 enum machine_mode mode;
2319 optab unop = code_to_optab[(int) code];
2323 return expand_unop (mode, unop, op0, target, unsignedp);
2326 /* Generate code to perform an operation specified by UNOPTAB
2327 on operand OP0, with result having machine-mode MODE.
2329 UNSIGNEDP is for the case where we have to widen the operands
2330 to perform the operation. It says to use zero-extension.
2332 If TARGET is nonzero, the value
2333 is generated there, if it is convenient to do so.
2334 In all cases an rtx is returned for the locus of the value;
2335 this may or may not be TARGET. */
2338 expand_unop (mode, unoptab, op0, target, unsignedp)
2339 enum machine_mode mode;
2345 enum mode_class class;
2346 enum machine_mode wider_mode;
2348 rtx last = get_last_insn ();
2351 class = GET_MODE_CLASS (mode);
2353 op0 = protect_from_queue (op0, 0);
2357 op0 = force_not_mem (op0);
2361 target = protect_from_queue (target, 1);
2363 if (unoptab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
2365 int icode = (int) unoptab->handlers[(int) mode].insn_code;
2366 enum machine_mode mode0 = insn_data[icode].operand[1].mode;
2372 temp = gen_reg_rtx (mode);
2374 if (GET_MODE (xop0) != VOIDmode
2375 && GET_MODE (xop0) != mode0)
2376 xop0 = convert_to_mode (mode0, xop0, unsignedp);
2378 /* Now, if insn doesn't accept our operand, put it into a pseudo. */
2380 if (! (*insn_data[icode].operand[1].predicate) (xop0, mode0))
2381 xop0 = copy_to_mode_reg (mode0, xop0);
2383 if (! (*insn_data[icode].operand[0].predicate) (temp, mode))
2384 temp = gen_reg_rtx (mode);
2386 pat = GEN_FCN (icode) (temp, xop0);
2389 if (INSN_P (pat) && NEXT_INSN (pat) != NULL_RTX
2390 && ! add_equal_note (pat, temp, unoptab->code, xop0, NULL_RTX))
2392 delete_insns_since (last);
2393 return expand_unop (mode, unoptab, op0, NULL_RTX, unsignedp);
2401 delete_insns_since (last);
2404 /* It can't be done in this mode. Can we open-code it in a wider mode? */
2406 if (class == MODE_INT || class == MODE_FLOAT || class == MODE_COMPLEX_FLOAT)
2407 for (wider_mode = GET_MODE_WIDER_MODE (mode); wider_mode != VOIDmode;
2408 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
2410 if (unoptab->handlers[(int) wider_mode].insn_code != CODE_FOR_nothing)
2414 /* For certain operations, we need not actually extend
2415 the narrow operand, as long as we will truncate the
2416 results to the same narrowness. */
2418 xop0 = widen_operand (xop0, wider_mode, mode, unsignedp,
2419 (unoptab == neg_optab
2420 || unoptab == one_cmpl_optab)
2421 && class == MODE_INT);
2423 temp = expand_unop (wider_mode, unoptab, xop0, NULL_RTX,
2428 if (class != MODE_INT)
2431 target = gen_reg_rtx (mode);
2432 convert_move (target, temp, 0);
2436 return gen_lowpart (mode, temp);
2439 delete_insns_since (last);
2443 /* These can be done a word at a time. */
2444 if (unoptab == one_cmpl_optab
2445 && class == MODE_INT
2446 && GET_MODE_SIZE (mode) > UNITS_PER_WORD
2447 && unoptab->handlers[(int) word_mode].insn_code != CODE_FOR_nothing)
2452 if (target == 0 || target == op0)
2453 target = gen_reg_rtx (mode);
2457 /* Do the actual arithmetic. */
2458 for (i = 0; i < GET_MODE_BITSIZE (mode) / BITS_PER_WORD; i++)
2460 rtx target_piece = operand_subword (target, i, 1, mode);
2461 rtx x = expand_unop (word_mode, unoptab,
2462 operand_subword_force (op0, i, mode),
2463 target_piece, unsignedp);
2465 if (target_piece != x)
2466 emit_move_insn (target_piece, x);
2469 insns = get_insns ();
2472 emit_no_conflict_block (insns, target, op0, NULL_RTX,
2473 gen_rtx_fmt_e (unoptab->code, mode,
2478 /* Open-code the complex negation operation. */
2479 else if (unoptab->code == NEG
2480 && (class == MODE_COMPLEX_FLOAT || class == MODE_COMPLEX_INT))
2486 /* Find the correct mode for the real and imaginary parts */
2487 enum machine_mode submode
2488 = mode_for_size (GET_MODE_UNIT_SIZE (mode) * BITS_PER_UNIT,
2489 class == MODE_COMPLEX_INT ? MODE_INT : MODE_FLOAT,
2492 if (submode == BLKmode)
2496 target = gen_reg_rtx (mode);
2500 target_piece = gen_imagpart (submode, target);
2501 x = expand_unop (submode, unoptab,
2502 gen_imagpart (submode, op0),
2503 target_piece, unsignedp);
2504 if (target_piece != x)
2505 emit_move_insn (target_piece, x);
2507 target_piece = gen_realpart (submode, target);
2508 x = expand_unop (submode, unoptab,
2509 gen_realpart (submode, op0),
2510 target_piece, unsignedp);
2511 if (target_piece != x)
2512 emit_move_insn (target_piece, x);
2517 emit_no_conflict_block (seq, target, op0, 0,
2518 gen_rtx_fmt_e (unoptab->code, mode,
2523 /* Now try a library call in this mode. */
2524 if (unoptab->handlers[(int) mode].libfunc)
2531 /* Pass 1 for NO_QUEUE so we don't lose any increments
2532 if the libcall is cse'd or moved. */
2533 value = emit_library_call_value (unoptab->handlers[(int) mode].libfunc,
2534 NULL_RTX, LCT_CONST, mode, 1, op0, mode);
2535 insns = get_insns ();
2538 target = gen_reg_rtx (mode);
2539 emit_libcall_block (insns, target, value,
2540 gen_rtx_fmt_e (unoptab->code, mode, op0));
2545 if (class == MODE_VECTOR_FLOAT || class == MODE_VECTOR_INT)
2546 return expand_vector_unop (mode, unoptab, op0, target, unsignedp);
2548 /* It can't be done in this mode. Can we do it in a wider mode? */
2550 if (class == MODE_INT || class == MODE_FLOAT || class == MODE_COMPLEX_FLOAT)
2552 for (wider_mode = GET_MODE_WIDER_MODE (mode); wider_mode != VOIDmode;
2553 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
2555 if ((unoptab->handlers[(int) wider_mode].insn_code
2556 != CODE_FOR_nothing)
2557 || unoptab->handlers[(int) wider_mode].libfunc)
2561 /* For certain operations, we need not actually extend
2562 the narrow operand, as long as we will truncate the
2563 results to the same narrowness. */
2565 xop0 = widen_operand (xop0, wider_mode, mode, unsignedp,
2566 (unoptab == neg_optab
2567 || unoptab == one_cmpl_optab)
2568 && class == MODE_INT);
2570 temp = expand_unop (wider_mode, unoptab, xop0, NULL_RTX,
2575 if (class != MODE_INT)
2578 target = gen_reg_rtx (mode);
2579 convert_move (target, temp, 0);
2583 return gen_lowpart (mode, temp);
2586 delete_insns_since (last);
2591 /* If there is no negate operation, try doing a subtract from zero.
2592 The US Software GOFAST library needs this. */
2593 if (unoptab->code == NEG)
2596 temp = expand_binop (mode,
2597 unoptab == negv_optab ? subv_optab : sub_optab,
2598 CONST0_RTX (mode), op0,
2599 target, unsignedp, OPTAB_LIB_WIDEN);
2607 /* Emit code to compute the absolute value of OP0, with result to
2608 TARGET if convenient. (TARGET may be 0.) The return value says
2609 where the result actually is to be found.
2611 MODE is the mode of the operand; the mode of the result is
2612 different but can be deduced from MODE.
2617 expand_abs (mode, op0, target, result_unsignedp, safe)
2618 enum machine_mode mode;
2621 int result_unsignedp;
2627 result_unsignedp = 1;
2629 /* First try to do it with a special abs instruction. */
2630 temp = expand_unop (mode, result_unsignedp ? abs_optab : absv_optab,
2635 /* If we have a MAX insn, we can do this as MAX (x, -x). */
2636 if (smax_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
2638 rtx last = get_last_insn ();
2640 temp = expand_unop (mode, neg_optab, op0, NULL_RTX, 0);
2642 temp = expand_binop (mode, smax_optab, op0, temp, target, 0,
2648 delete_insns_since (last);
2651 /* If this machine has expensive jumps, we can do integer absolute
2652 value of X as (((signed) x >> (W-1)) ^ x) - ((signed) x >> (W-1)),
2653 where W is the width of MODE. */
2655 if (GET_MODE_CLASS (mode) == MODE_INT && BRANCH_COST >= 2)
2657 rtx extended = expand_shift (RSHIFT_EXPR, mode, op0,
2658 size_int (GET_MODE_BITSIZE (mode) - 1),
2661 temp = expand_binop (mode, xor_optab, extended, op0, target, 0,
2664 temp = expand_binop (mode, result_unsignedp ? sub_optab : subv_optab,
2665 temp, extended, target, 0, OPTAB_LIB_WIDEN);
2671 /* If that does not win, use conditional jump and negate. */
2673 /* It is safe to use the target if it is the same
2674 as the source if this is also a pseudo register */
2675 if (op0 == target && GET_CODE (op0) == REG
2676 && REGNO (op0) >= FIRST_PSEUDO_REGISTER)
2679 op1 = gen_label_rtx ();
2680 if (target == 0 || ! safe
2681 || GET_MODE (target) != mode
2682 || (GET_CODE (target) == MEM && MEM_VOLATILE_P (target))
2683 || (GET_CODE (target) == REG
2684 && REGNO (target) < FIRST_PSEUDO_REGISTER))
2685 target = gen_reg_rtx (mode);
2687 emit_move_insn (target, op0);
2690 /* If this mode is an integer too wide to compare properly,
2691 compare word by word. Rely on CSE to optimize constant cases. */
2692 if (GET_MODE_CLASS (mode) == MODE_INT
2693 && ! can_compare_p (GE, mode, ccp_jump))
2694 do_jump_by_parts_greater_rtx (mode, 0, target, const0_rtx,
2697 do_compare_rtx_and_jump (target, CONST0_RTX (mode), GE, 0, mode,
2698 NULL_RTX, NULL_RTX, op1);
2700 op0 = expand_unop (mode, result_unsignedp ? neg_optab : negv_optab,
2703 emit_move_insn (target, op0);
2709 /* Emit code to compute the absolute value of OP0, with result to
2710 TARGET if convenient. (TARGET may be 0.) The return value says
2711 where the result actually is to be found.
2713 MODE is the mode of the operand; the mode of the result is
2714 different but can be deduced from MODE.
2716 UNSIGNEDP is relevant for complex integer modes. */
2719 expand_complex_abs (mode, op0, target, unsignedp)
2720 enum machine_mode mode;
2725 enum mode_class class = GET_MODE_CLASS (mode);
2726 enum machine_mode wider_mode;
2728 rtx entry_last = get_last_insn ();
2731 optab this_abs_optab;
2733 /* Find the correct mode for the real and imaginary parts. */
2734 enum machine_mode submode
2735 = mode_for_size (GET_MODE_UNIT_SIZE (mode) * BITS_PER_UNIT,
2736 class == MODE_COMPLEX_INT ? MODE_INT : MODE_FLOAT,
2739 if (submode == BLKmode)
2742 op0 = protect_from_queue (op0, 0);
2746 op0 = force_not_mem (op0);
2749 last = get_last_insn ();
2752 target = protect_from_queue (target, 1);
2754 this_abs_optab = ! unsignedp && flag_trapv
2755 && (GET_MODE_CLASS(mode) == MODE_INT)
2756 ? absv_optab : abs_optab;
2758 if (this_abs_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
2760 int icode = (int) this_abs_optab->handlers[(int) mode].insn_code;
2761 enum machine_mode mode0 = insn_data[icode].operand[1].mode;
2767 temp = gen_reg_rtx (submode);
2769 if (GET_MODE (xop0) != VOIDmode
2770 && GET_MODE (xop0) != mode0)
2771 xop0 = convert_to_mode (mode0, xop0, unsignedp);
2773 /* Now, if insn doesn't accept our operand, put it into a pseudo. */
2775 if (! (*insn_data[icode].operand[1].predicate) (xop0, mode0))
2776 xop0 = copy_to_mode_reg (mode0, xop0);
2778 if (! (*insn_data[icode].operand[0].predicate) (temp, submode))
2779 temp = gen_reg_rtx (submode);
2781 pat = GEN_FCN (icode) (temp, xop0);
2784 if (INSN_P (pat) && NEXT_INSN (pat) != NULL_RTX
2785 && ! add_equal_note (pat, temp, this_abs_optab->code, xop0,
2788 delete_insns_since (last);
2789 return expand_unop (mode, this_abs_optab, op0, NULL_RTX,
2798 delete_insns_since (last);
2801 /* It can't be done in this mode. Can we open-code it in a wider mode? */
2803 for (wider_mode = GET_MODE_WIDER_MODE (mode); wider_mode != VOIDmode;
2804 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
2806 if (this_abs_optab->handlers[(int) wider_mode].insn_code
2807 != CODE_FOR_nothing)
2811 xop0 = convert_modes (wider_mode, mode, xop0, unsignedp);
2812 temp = expand_complex_abs (wider_mode, xop0, NULL_RTX, unsignedp);
2816 if (class != MODE_COMPLEX_INT)
2819 target = gen_reg_rtx (submode);
2820 convert_move (target, temp, 0);
2824 return gen_lowpart (submode, temp);
2827 delete_insns_since (last);
2831 /* Open-code the complex absolute-value operation
2832 if we can open-code sqrt. Otherwise it's not worth while. */
2833 if (sqrt_optab->handlers[(int) submode].insn_code != CODE_FOR_nothing
2836 rtx real, imag, total;
2838 real = gen_realpart (submode, op0);
2839 imag = gen_imagpart (submode, op0);
2841 /* Square both parts. */
2842 real = expand_mult (submode, real, real, NULL_RTX, 0);
2843 imag = expand_mult (submode, imag, imag, NULL_RTX, 0);
2845 /* Sum the parts. */
2846 total = expand_binop (submode, add_optab, real, imag, NULL_RTX,
2847 0, OPTAB_LIB_WIDEN);
2849 /* Get sqrt in TARGET. Set TARGET to where the result is. */
2850 target = expand_unop (submode, sqrt_optab, total, target, 0);
2852 delete_insns_since (last);
2857 /* Now try a library call in this mode. */
2858 if (this_abs_optab->handlers[(int) mode].libfunc)
2865 /* Pass 1 for NO_QUEUE so we don't lose any increments
2866 if the libcall is cse'd or moved. */
2867 value = emit_library_call_value (abs_optab->handlers[(int) mode].libfunc,
2868 NULL_RTX, LCT_CONST, submode, 1, op0, mode);
2869 insns = get_insns ();
2872 target = gen_reg_rtx (submode);
2873 emit_libcall_block (insns, target, value,
2874 gen_rtx_fmt_e (this_abs_optab->code, mode, op0));
2879 /* It can't be done in this mode. Can we do it in a wider mode? */
2881 for (wider_mode = GET_MODE_WIDER_MODE (mode); wider_mode != VOIDmode;
2882 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
2884 if ((this_abs_optab->handlers[(int) wider_mode].insn_code
2885 != CODE_FOR_nothing)
2886 || this_abs_optab->handlers[(int) wider_mode].libfunc)
2890 xop0 = convert_modes (wider_mode, mode, xop0, unsignedp);
2892 temp = expand_complex_abs (wider_mode, xop0, NULL_RTX, unsignedp);
2896 if (class != MODE_COMPLEX_INT)
2899 target = gen_reg_rtx (submode);
2900 convert_move (target, temp, 0);
2904 return gen_lowpart (submode, temp);
2907 delete_insns_since (last);
2911 delete_insns_since (entry_last);
2915 /* Generate an instruction whose insn-code is INSN_CODE,
2916 with two operands: an output TARGET and an input OP0.
2917 TARGET *must* be nonzero, and the output is always stored there.
2918 CODE is an rtx code such that (CODE OP0) is an rtx that describes
2919 the value that is stored into TARGET. */
2922 emit_unop_insn (icode, target, op0, code)
2929 enum machine_mode mode0 = insn_data[icode].operand[1].mode;
2932 temp = target = protect_from_queue (target, 1);
2934 op0 = protect_from_queue (op0, 0);
2936 /* Sign and zero extension from memory is often done specially on
2937 RISC machines, so forcing into a register here can pessimize
2939 if (flag_force_mem && code != SIGN_EXTEND && code != ZERO_EXTEND)
2940 op0 = force_not_mem (op0);
2942 /* Now, if insn does not accept our operands, put them into pseudos. */
2944 if (! (*insn_data[icode].operand[1].predicate) (op0, mode0))
2945 op0 = copy_to_mode_reg (mode0, op0);
2947 if (! (*insn_data[icode].operand[0].predicate) (temp, GET_MODE (temp))
2948 || (flag_force_mem && GET_CODE (temp) == MEM))
2949 temp = gen_reg_rtx (GET_MODE (temp));
2951 pat = GEN_FCN (icode) (temp, op0);
2953 if (INSN_P (pat) && NEXT_INSN (pat) != NULL_RTX && code != UNKNOWN)
2954 add_equal_note (pat, temp, code, op0, NULL_RTX);
2959 emit_move_insn (target, temp);
2962 /* Emit code to perform a series of operations on a multi-word quantity, one
2965 Such a block is preceded by a CLOBBER of the output, consists of multiple
2966 insns, each setting one word of the output, and followed by a SET copying
2967 the output to itself.
2969 Each of the insns setting words of the output receives a REG_NO_CONFLICT
2970 note indicating that it doesn't conflict with the (also multi-word)
2971 inputs. The entire block is surrounded by REG_LIBCALL and REG_RETVAL
2974 INSNS is a block of code generated to perform the operation, not including
2975 the CLOBBER and final copy. All insns that compute intermediate values
2976 are first emitted, followed by the block as described above.
2978 TARGET, OP0, and OP1 are the output and inputs of the operations,
2979 respectively. OP1 may be zero for a unary operation.
2981 EQUIV, if nonzero, is an expression to be placed into a REG_EQUAL note
2984 If TARGET is not a register, INSNS is simply emitted with no special
2985 processing. Likewise if anything in INSNS is not an INSN or if
2986 there is a libcall block inside INSNS.
2988 The final insn emitted is returned. */
2991 emit_no_conflict_block (insns, target, op0, op1, equiv)
2997 rtx prev, next, first, last, insn;
2999 if (GET_CODE (target) != REG || reload_in_progress)
3000 return emit_insn (insns);
3002 for (insn = insns; insn; insn = NEXT_INSN (insn))
3003 if (GET_CODE (insn) != INSN
3004 || find_reg_note (insn, REG_LIBCALL, NULL_RTX))
3005 return emit_insn (insns);
3007 /* First emit all insns that do not store into words of the output and remove
3008 these from the list. */
3009 for (insn = insns; insn; insn = next)
3014 next = NEXT_INSN (insn);
3016 /* Some ports (cris) create an libcall regions at their own. We must
3017 avoid any potential nesting of LIBCALLs. */
3018 if ((note = find_reg_note (insn, REG_LIBCALL, NULL)) != NULL)
3019 remove_note (insn, note);
3020 if ((note = find_reg_note (insn, REG_RETVAL, NULL)) != NULL)
3021 remove_note (insn, note);
3023 if (GET_CODE (PATTERN (insn)) == SET || GET_CODE (PATTERN (insn)) == USE
3024 || GET_CODE (PATTERN (insn)) == CLOBBER)
3025 set = PATTERN (insn);
3026 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
3028 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
3029 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET)
3031 set = XVECEXP (PATTERN (insn), 0, i);
3039 if (! reg_overlap_mentioned_p (target, SET_DEST (set)))
3041 if (PREV_INSN (insn))
3042 NEXT_INSN (PREV_INSN (insn)) = next;
3047 PREV_INSN (next) = PREV_INSN (insn);
3053 prev = get_last_insn ();
3055 /* Now write the CLOBBER of the output, followed by the setting of each
3056 of the words, followed by the final copy. */
3057 if (target != op0 && target != op1)
3058 emit_insn (gen_rtx_CLOBBER (VOIDmode, target));
3060 for (insn = insns; insn; insn = next)
3062 next = NEXT_INSN (insn);
3065 if (op1 && GET_CODE (op1) == REG)
3066 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_NO_CONFLICT, op1,
3069 if (op0 && GET_CODE (op0) == REG)
3070 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_NO_CONFLICT, op0,
3074 if (mov_optab->handlers[(int) GET_MODE (target)].insn_code
3075 != CODE_FOR_nothing)
3077 last = emit_move_insn (target, target);
3079 set_unique_reg_note (last, REG_EQUAL, equiv);
3083 last = get_last_insn ();
3085 /* Remove any existing REG_EQUAL note from "last", or else it will
3086 be mistaken for a note referring to the full contents of the
3087 alleged libcall value when found together with the REG_RETVAL
3088 note added below. An existing note can come from an insn
3089 expansion at "last". */
3090 remove_note (last, find_reg_note (last, REG_EQUAL, NULL_RTX));
3094 first = get_insns ();
3096 first = NEXT_INSN (prev);
3098 /* Encapsulate the block so it gets manipulated as a unit. */
3099 REG_NOTES (first) = gen_rtx_INSN_LIST (REG_LIBCALL, last,
3101 REG_NOTES (last) = gen_rtx_INSN_LIST (REG_RETVAL, first, REG_NOTES (last));
3106 /* Emit code to make a call to a constant function or a library call.
3108 INSNS is a list containing all insns emitted in the call.
3109 These insns leave the result in RESULT. Our block is to copy RESULT
3110 to TARGET, which is logically equivalent to EQUIV.
3112 We first emit any insns that set a pseudo on the assumption that these are
3113 loading constants into registers; doing so allows them to be safely cse'ed
3114 between blocks. Then we emit all the other insns in the block, followed by
3115 an insn to move RESULT to TARGET. This last insn will have a REQ_EQUAL
3116 note with an operand of EQUIV.
3118 Moving assignments to pseudos outside of the block is done to improve
3119 the generated code, but is not required to generate correct code,
3120 hence being unable to move an assignment is not grounds for not making
3121 a libcall block. There are two reasons why it is safe to leave these
3122 insns inside the block: First, we know that these pseudos cannot be
3123 used in generated RTL outside the block since they are created for
3124 temporary purposes within the block. Second, CSE will not record the
3125 values of anything set inside a libcall block, so we know they must
3126 be dead at the end of the block.
3128 Except for the first group of insns (the ones setting pseudos), the
3129 block is delimited by REG_RETVAL and REG_LIBCALL notes. */
3132 emit_libcall_block (insns, target, result, equiv)
3138 rtx final_dest = target;
3139 rtx prev, next, first, last, insn;
3141 /* If this is a reg with REG_USERVAR_P set, then it could possibly turn
3142 into a MEM later. Protect the libcall block from this change. */
3143 if (! REG_P (target) || REG_USERVAR_P (target))
3144 target = gen_reg_rtx (GET_MODE (target));
3146 /* If we're using non-call exceptions, a libcall corresponding to an
3147 operation that may trap may also trap. */
3148 if (flag_non_call_exceptions && may_trap_p (equiv))
3150 for (insn = insns; insn; insn = NEXT_INSN (insn))
3151 if (GET_CODE (insn) == CALL_INSN)
3153 rtx note = find_reg_note (insn, REG_EH_REGION, NULL_RTX);
3155 if (note != 0 && INTVAL (XEXP (note, 0)) <= 0)
3156 remove_note (insn, note);
3160 /* look for any CALL_INSNs in this sequence, and attach a REG_EH_REGION
3161 reg note to indicate that this call cannot throw or execute a nonlocal
3162 goto (unless there is already a REG_EH_REGION note, in which case
3164 for (insn = insns; insn; insn = NEXT_INSN (insn))
3165 if (GET_CODE (insn) == CALL_INSN)
3167 rtx note = find_reg_note (insn, REG_EH_REGION, NULL_RTX);
3170 XEXP (note, 0) = GEN_INT (-1);
3172 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_EH_REGION, GEN_INT (-1),
3176 /* First emit all insns that set pseudos. Remove them from the list as
3177 we go. Avoid insns that set pseudos which were referenced in previous
3178 insns. These can be generated by move_by_pieces, for example,
3179 to update an address. Similarly, avoid insns that reference things
3180 set in previous insns. */
3182 for (insn = insns; insn; insn = next)
3184 rtx set = single_set (insn);
3187 /* Some ports (cris) create an libcall regions at their own. We must
3188 avoid any potential nesting of LIBCALLs. */
3189 if ((note = find_reg_note (insn, REG_LIBCALL, NULL)) != NULL)
3190 remove_note (insn, note);
3191 if ((note = find_reg_note (insn, REG_RETVAL, NULL)) != NULL)
3192 remove_note (insn, note);
3194 next = NEXT_INSN (insn);
3196 if (set != 0 && GET_CODE (SET_DEST (set)) == REG
3197 && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER
3199 || ((! INSN_P(insns)
3200 || ! reg_mentioned_p (SET_DEST (set), PATTERN (insns)))
3201 && ! reg_used_between_p (SET_DEST (set), insns, insn)
3202 && ! modified_in_p (SET_SRC (set), insns)
3203 && ! modified_between_p (SET_SRC (set), insns, insn))))
3205 if (PREV_INSN (insn))
3206 NEXT_INSN (PREV_INSN (insn)) = next;
3211 PREV_INSN (next) = PREV_INSN (insn);
3217 prev = get_last_insn ();
3219 /* Write the remaining insns followed by the final copy. */
3221 for (insn = insns; insn; insn = next)
3223 next = NEXT_INSN (insn);
3228 last = emit_move_insn (target, result);
3229 if (mov_optab->handlers[(int) GET_MODE (target)].insn_code
3230 != CODE_FOR_nothing)
3231 set_unique_reg_note (last, REG_EQUAL, copy_rtx (equiv));
3234 /* Remove any existing REG_EQUAL note from "last", or else it will
3235 be mistaken for a note referring to the full contents of the
3236 libcall value when found together with the REG_RETVAL note added
3237 below. An existing note can come from an insn expansion at
3239 remove_note (last, find_reg_note (last, REG_EQUAL, NULL_RTX));
3242 if (final_dest != target)
3243 emit_move_insn (final_dest, target);
3246 first = get_insns ();
3248 first = NEXT_INSN (prev);
3250 /* Encapsulate the block so it gets manipulated as a unit. */
3251 if (!flag_non_call_exceptions || !may_trap_p (equiv))
3253 REG_NOTES (first) = gen_rtx_INSN_LIST (REG_LIBCALL, last,
3255 REG_NOTES (last) = gen_rtx_INSN_LIST (REG_RETVAL, first,
3260 /* Generate code to store zero in X. */
3266 emit_move_insn (x, const0_rtx);
3269 /* Generate code to store 1 in X
3270 assuming it contains zero beforehand. */
3273 emit_0_to_1_insn (x)
3276 emit_move_insn (x, const1_rtx);
3279 /* Nonzero if we can perform a comparison of mode MODE straightforwardly.
3280 PURPOSE describes how this comparison will be used. CODE is the rtx
3281 comparison code we will be using.
3283 ??? Actually, CODE is slightly weaker than that. A target is still
3284 required to implement all of the normal bcc operations, but not
3285 required to implement all (or any) of the unordered bcc operations. */
3288 can_compare_p (code, mode, purpose)
3290 enum machine_mode mode;
3291 enum can_compare_purpose purpose;
3295 if (cmp_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
3297 if (purpose == ccp_jump)
3298 return bcc_gen_fctn[(int) code] != NULL;
3299 else if (purpose == ccp_store_flag)
3300 return setcc_gen_code[(int) code] != CODE_FOR_nothing;
3302 /* There's only one cmov entry point, and it's allowed to fail. */
3305 if (purpose == ccp_jump
3306 && cbranch_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
3308 if (purpose == ccp_cmov
3309 && cmov_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
3311 if (purpose == ccp_store_flag
3312 && cstore_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
3315 mode = GET_MODE_WIDER_MODE (mode);
3317 while (mode != VOIDmode);
3322 /* This function is called when we are going to emit a compare instruction that
3323 compares the values found in *PX and *PY, using the rtl operator COMPARISON.
3325 *PMODE is the mode of the inputs (in case they are const_int).
3326 *PUNSIGNEDP nonzero says that the operands are unsigned;
3327 this matters if they need to be widened.
3329 If they have mode BLKmode, then SIZE specifies the size of both operands.
3331 This function performs all the setup necessary so that the caller only has
3332 to emit a single comparison insn. This setup can involve doing a BLKmode
3333 comparison or emitting a library call to perform the comparison if no insn
3334 is available to handle it.
3335 The values which are passed in through pointers can be modified; the caller
3336 should perform the comparison on the modified values. */
3339 prepare_cmp_insn (px, py, pcomparison, size, pmode, punsignedp, purpose)
3341 enum rtx_code *pcomparison;
3343 enum machine_mode *pmode;
3345 enum can_compare_purpose purpose;
3347 enum machine_mode mode = *pmode;
3348 rtx x = *px, y = *py;
3349 int unsignedp = *punsignedp;
3350 enum mode_class class;
3352 class = GET_MODE_CLASS (mode);
3354 /* They could both be VOIDmode if both args are immediate constants,
3355 but we should fold that at an earlier stage.
3356 With no special code here, this will call abort,
3357 reminding the programmer to implement such folding. */
3359 if (mode != BLKmode && flag_force_mem)
3361 x = force_not_mem (x);
3362 y = force_not_mem (y);
3365 /* If we are inside an appropriately-short loop and one operand is an
3366 expensive constant, force it into a register. */
3367 if (CONSTANT_P (x) && preserve_subexpressions_p ()
3368 && rtx_cost (x, COMPARE) > COSTS_N_INSNS (1))
3369 x = force_reg (mode, x);
3371 if (CONSTANT_P (y) && preserve_subexpressions_p ()
3372 && rtx_cost (y, COMPARE) > COSTS_N_INSNS (1))
3373 y = force_reg (mode, y);
3376 /* Abort if we have a non-canonical comparison. The RTL documentation
3377 states that canonical comparisons are required only for targets which
3379 if (CONSTANT_P (x) && ! CONSTANT_P (y))
3383 /* Don't let both operands fail to indicate the mode. */
3384 if (GET_MODE (x) == VOIDmode && GET_MODE (y) == VOIDmode)
3385 x = force_reg (mode, x);
3387 /* Handle all BLKmode compares. */
3389 if (mode == BLKmode)
3392 enum machine_mode result_mode;
3393 rtx opalign ATTRIBUTE_UNUSED
3394 = GEN_INT (MIN (MEM_ALIGN (x), MEM_ALIGN (y)) / BITS_PER_UNIT);
3397 x = protect_from_queue (x, 0);
3398 y = protect_from_queue (y, 0);
3402 #ifdef HAVE_cmpstrqi
3404 && GET_CODE (size) == CONST_INT
3405 && INTVAL (size) < (1 << GET_MODE_BITSIZE (QImode)))
3407 result_mode = insn_data[(int) CODE_FOR_cmpstrqi].operand[0].mode;
3408 result = gen_reg_rtx (result_mode);
3409 emit_insn (gen_cmpstrqi (result, x, y, size, opalign));
3413 #ifdef HAVE_cmpstrhi
3415 && GET_CODE (size) == CONST_INT
3416 && INTVAL (size) < (1 << GET_MODE_BITSIZE (HImode)))
3418 result_mode = insn_data[(int) CODE_FOR_cmpstrhi].operand[0].mode;
3419 result = gen_reg_rtx (result_mode);
3420 emit_insn (gen_cmpstrhi (result, x, y, size, opalign));
3424 #ifdef HAVE_cmpstrsi
3427 result_mode = insn_data[(int) CODE_FOR_cmpstrsi].operand[0].mode;
3428 result = gen_reg_rtx (result_mode);
3429 size = protect_from_queue (size, 0);
3430 emit_insn (gen_cmpstrsi (result, x, y,
3431 convert_to_mode (SImode, size, 1),
3437 #ifdef TARGET_MEM_FUNCTIONS
3438 result = emit_library_call_value (memcmp_libfunc, NULL_RTX, LCT_PURE_MAKE_BLOCK,
3439 TYPE_MODE (integer_type_node), 3,
3440 XEXP (x, 0), Pmode, XEXP (y, 0), Pmode,
3441 convert_to_mode (TYPE_MODE (sizetype), size,
3442 TREE_UNSIGNED (sizetype)),
3443 TYPE_MODE (sizetype));
3445 result = emit_library_call_value (bcmp_libfunc, NULL_RTX, LCT_PURE_MAKE_BLOCK,
3446 TYPE_MODE (integer_type_node), 3,
3447 XEXP (x, 0), Pmode, XEXP (y, 0), Pmode,
3448 convert_to_mode (TYPE_MODE (integer_type_node),
3450 TREE_UNSIGNED (integer_type_node)),
3451 TYPE_MODE (integer_type_node));
3454 result_mode = TYPE_MODE (integer_type_node);
3458 *pmode = result_mode;
3464 if (can_compare_p (*pcomparison, mode, purpose))
3467 /* Handle a lib call just for the mode we are using. */
3469 if (cmp_optab->handlers[(int) mode].libfunc && class != MODE_FLOAT)
3471 rtx libfunc = cmp_optab->handlers[(int) mode].libfunc;
3474 /* If we want unsigned, and this mode has a distinct unsigned
3475 comparison routine, use that. */
3476 if (unsignedp && ucmp_optab->handlers[(int) mode].libfunc)
3477 libfunc = ucmp_optab->handlers[(int) mode].libfunc;
3479 result = emit_library_call_value (libfunc, NULL_RTX, LCT_CONST_MAKE_BLOCK,
3480 word_mode, 2, x, mode, y, mode);
3482 /* Integer comparison returns a result that must be compared against 1,
3483 so that even if we do an unsigned compare afterward,
3484 there is still a value that can represent the result "less than". */
3491 if (class == MODE_FLOAT)
3492 prepare_float_lib_cmp (px, py, pcomparison, pmode, punsignedp);
3498 /* Before emitting an insn with code ICODE, make sure that X, which is going
3499 to be used for operand OPNUM of the insn, is converted from mode MODE to
3500 WIDER_MODE (UNSIGNEDP determines whether it is an unsigned conversion), and
3501 that it is accepted by the operand predicate. Return the new value. */
3504 prepare_operand (icode, x, opnum, mode, wider_mode, unsignedp)
3508 enum machine_mode mode, wider_mode;
3511 x = protect_from_queue (x, 0);
3513 if (mode != wider_mode)
3514 x = convert_modes (wider_mode, mode, x, unsignedp);
3516 if (! (*insn_data[icode].operand[opnum].predicate)
3517 (x, insn_data[icode].operand[opnum].mode))
3518 x = copy_to_mode_reg (insn_data[icode].operand[opnum].mode, x);
3522 /* Subroutine of emit_cmp_and_jump_insns; this function is called when we know
3523 we can do the comparison.
3524 The arguments are the same as for emit_cmp_and_jump_insns; but LABEL may
3525 be NULL_RTX which indicates that only a comparison is to be generated. */
3528 emit_cmp_and_jump_insn_1 (x, y, mode, comparison, unsignedp, label)
3530 enum machine_mode mode;
3531 enum rtx_code comparison;
3535 rtx test = gen_rtx_fmt_ee (comparison, mode, x, y);
3536 enum mode_class class = GET_MODE_CLASS (mode);
3537 enum machine_mode wider_mode = mode;
3539 /* Try combined insns first. */
3542 enum insn_code icode;
3543 PUT_MODE (test, wider_mode);
3547 icode = cbranch_optab->handlers[(int) wider_mode].insn_code;
3549 if (icode != CODE_FOR_nothing
3550 && (*insn_data[icode].operand[0].predicate) (test, wider_mode))
3552 x = prepare_operand (icode, x, 1, mode, wider_mode, unsignedp);
3553 y = prepare_operand (icode, y, 2, mode, wider_mode, unsignedp);
3554 emit_jump_insn (GEN_FCN (icode) (test, x, y, label));
3559 /* Handle some compares against zero. */
3560 icode = (int) tst_optab->handlers[(int) wider_mode].insn_code;
3561 if (y == CONST0_RTX (mode) && icode != CODE_FOR_nothing)
3563 x = prepare_operand (icode, x, 0, mode, wider_mode, unsignedp);
3564 emit_insn (GEN_FCN (icode) (x));
3566 emit_jump_insn ((*bcc_gen_fctn[(int) comparison]) (label));
3570 /* Handle compares for which there is a directly suitable insn. */
3572 icode = (int) cmp_optab->handlers[(int) wider_mode].insn_code;
3573 if (icode != CODE_FOR_nothing)
3575 x = prepare_operand (icode, x, 0, mode, wider_mode, unsignedp);
3576 y = prepare_operand (icode, y, 1, mode, wider_mode, unsignedp);
3577 emit_insn (GEN_FCN (icode) (x, y));
3579 emit_jump_insn ((*bcc_gen_fctn[(int) comparison]) (label));
3583 if (class != MODE_INT && class != MODE_FLOAT
3584 && class != MODE_COMPLEX_FLOAT)
3587 wider_mode = GET_MODE_WIDER_MODE (wider_mode);
3589 while (wider_mode != VOIDmode);
3594 /* Generate code to compare X with Y so that the condition codes are
3595 set and to jump to LABEL if the condition is true. If X is a
3596 constant and Y is not a constant, then the comparison is swapped to
3597 ensure that the comparison RTL has the canonical form.
3599 UNSIGNEDP nonzero says that X and Y are unsigned; this matters if they
3600 need to be widened by emit_cmp_insn. UNSIGNEDP is also used to select
3601 the proper branch condition code.
3603 If X and Y have mode BLKmode, then SIZE specifies the size of both X and Y.
3605 MODE is the mode of the inputs (in case they are const_int).
3607 COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.). It will
3608 be passed unchanged to emit_cmp_insn, then potentially converted into an
3609 unsigned variant based on UNSIGNEDP to select a proper jump instruction. */
3612 emit_cmp_and_jump_insns (x, y, comparison, size, mode, unsignedp, label)
3614 enum rtx_code comparison;
3616 enum machine_mode mode;
3620 rtx op0 = x, op1 = y;
3622 /* Swap operands and condition to ensure canonical RTL. */
3623 if (swap_commutative_operands_p (x, y))
3625 /* If we're not emitting a branch, this means some caller
3631 comparison = swap_condition (comparison);
3635 /* If OP0 is still a constant, then both X and Y must be constants. Force
3636 X into a register to avoid aborting in emit_cmp_insn due to non-canonical
3638 if (CONSTANT_P (op0))
3639 op0 = force_reg (mode, op0);
3644 comparison = unsigned_condition (comparison);
3646 prepare_cmp_insn (&op0, &op1, &comparison, size, &mode, &unsignedp,
3648 emit_cmp_and_jump_insn_1 (op0, op1, mode, comparison, unsignedp, label);
3651 /* Like emit_cmp_and_jump_insns, but generate only the comparison. */
3654 emit_cmp_insn (x, y, comparison, size, mode, unsignedp)
3656 enum rtx_code comparison;
3658 enum machine_mode mode;
3661 emit_cmp_and_jump_insns (x, y, comparison, size, mode, unsignedp, 0);
3664 /* Emit a library call comparison between floating point X and Y.
3665 COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.). */
3668 prepare_float_lib_cmp (px, py, pcomparison, pmode, punsignedp)
3670 enum rtx_code *pcomparison;
3671 enum machine_mode *pmode;
3674 enum rtx_code comparison = *pcomparison;
3676 rtx x = *px = protect_from_queue (*px, 0);
3677 rtx y = *py = protect_from_queue (*py, 0);
3678 enum machine_mode mode = GET_MODE (x);
3686 libfunc = eqhf2_libfunc;
3690 libfunc = nehf2_libfunc;
3694 libfunc = gthf2_libfunc;
3695 if (libfunc == NULL_RTX)
3697 tmp = x; x = y; y = tmp;
3699 libfunc = lthf2_libfunc;
3704 libfunc = gehf2_libfunc;
3705 if (libfunc == NULL_RTX)
3707 tmp = x; x = y; y = tmp;
3709 libfunc = lehf2_libfunc;
3714 libfunc = lthf2_libfunc;
3715 if (libfunc == NULL_RTX)
3717 tmp = x; x = y; y = tmp;
3719 libfunc = gthf2_libfunc;
3724 libfunc = lehf2_libfunc;
3725 if (libfunc == NULL_RTX)
3727 tmp = x; x = y; y = tmp;
3729 libfunc = gehf2_libfunc;
3734 libfunc = unordhf2_libfunc;
3740 else if (mode == SFmode)
3744 libfunc = eqsf2_libfunc;
3748 libfunc = nesf2_libfunc;
3752 libfunc = gtsf2_libfunc;
3753 if (libfunc == NULL_RTX)
3755 tmp = x; x = y; y = tmp;
3757 libfunc = ltsf2_libfunc;
3762 libfunc = gesf2_libfunc;
3763 if (libfunc == NULL_RTX)
3765 tmp = x; x = y; y = tmp;
3767 libfunc = lesf2_libfunc;
3772 libfunc = ltsf2_libfunc;
3773 if (libfunc == NULL_RTX)
3775 tmp = x; x = y; y = tmp;
3777 libfunc = gtsf2_libfunc;
3782 libfunc = lesf2_libfunc;
3783 if (libfunc == NULL_RTX)
3785 tmp = x; x = y; y = tmp;
3787 libfunc = gesf2_libfunc;
3792 libfunc = unordsf2_libfunc;
3798 else if (mode == DFmode)
3802 libfunc = eqdf2_libfunc;
3806 libfunc = nedf2_libfunc;
3810 libfunc = gtdf2_libfunc;
3811 if (libfunc == NULL_RTX)
3813 tmp = x; x = y; y = tmp;
3815 libfunc = ltdf2_libfunc;
3820 libfunc = gedf2_libfunc;
3821 if (libfunc == NULL_RTX)
3823 tmp = x; x = y; y = tmp;
3825 libfunc = ledf2_libfunc;
3830 libfunc = ltdf2_libfunc;
3831 if (libfunc == NULL_RTX)
3833 tmp = x; x = y; y = tmp;
3835 libfunc = gtdf2_libfunc;
3840 libfunc = ledf2_libfunc;
3841 if (libfunc == NULL_RTX)
3843 tmp = x; x = y; y = tmp;
3845 libfunc = gedf2_libfunc;
3850 libfunc = unorddf2_libfunc;
3856 else if (mode == XFmode)
3860 libfunc = eqxf2_libfunc;
3864 libfunc = nexf2_libfunc;
3868 libfunc = gtxf2_libfunc;
3869 if (libfunc == NULL_RTX)
3871 tmp = x; x = y; y = tmp;
3873 libfunc = ltxf2_libfunc;
3878 libfunc = gexf2_libfunc;
3879 if (libfunc == NULL_RTX)
3881 tmp = x; x = y; y = tmp;
3883 libfunc = lexf2_libfunc;
3888 libfunc = ltxf2_libfunc;
3889 if (libfunc == NULL_RTX)
3891 tmp = x; x = y; y = tmp;
3893 libfunc = gtxf2_libfunc;
3898 libfunc = lexf2_libfunc;
3899 if (libfunc == NULL_RTX)
3901 tmp = x; x = y; y = tmp;
3903 libfunc = gexf2_libfunc;
3908 libfunc = unordxf2_libfunc;
3914 else if (mode == TFmode)
3918 libfunc = eqtf2_libfunc;
3922 libfunc = netf2_libfunc;
3926 libfunc = gttf2_libfunc;
3927 if (libfunc == NULL_RTX)
3929 tmp = x; x = y; y = tmp;
3931 libfunc = lttf2_libfunc;
3936 libfunc = getf2_libfunc;
3937 if (libfunc == NULL_RTX)
3939 tmp = x; x = y; y = tmp;
3941 libfunc = letf2_libfunc;
3946 libfunc = lttf2_libfunc;
3947 if (libfunc == NULL_RTX)
3949 tmp = x; x = y; y = tmp;
3951 libfunc = gttf2_libfunc;
3956 libfunc = letf2_libfunc;
3957 if (libfunc == NULL_RTX)
3959 tmp = x; x = y; y = tmp;
3961 libfunc = getf2_libfunc;
3966 libfunc = unordtf2_libfunc;
3974 enum machine_mode wider_mode;
3976 for (wider_mode = GET_MODE_WIDER_MODE (mode); wider_mode != VOIDmode;
3977 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
3979 if ((cmp_optab->handlers[(int) wider_mode].insn_code
3980 != CODE_FOR_nothing)
3981 || (cmp_optab->handlers[(int) wider_mode].libfunc != 0))
3983 x = protect_from_queue (x, 0);
3984 y = protect_from_queue (y, 0);
3985 *px = convert_to_mode (wider_mode, x, 0);
3986 *py = convert_to_mode (wider_mode, y, 0);
3987 prepare_float_lib_cmp (px, py, pcomparison, pmode, punsignedp);
3997 result = emit_library_call_value (libfunc, NULL_RTX, LCT_CONST_MAKE_BLOCK,
3998 word_mode, 2, x, mode, y, mode);
4002 if (comparison == UNORDERED)
4004 #ifdef FLOAT_LIB_COMPARE_RETURNS_BOOL
4005 else if (FLOAT_LIB_COMPARE_RETURNS_BOOL (mode, comparison))
4011 /* Generate code to indirectly jump to a location given in the rtx LOC. */
4014 emit_indirect_jump (loc)
4017 if (! ((*insn_data[(int) CODE_FOR_indirect_jump].operand[0].predicate)
4019 loc = copy_to_mode_reg (Pmode, loc);
4021 emit_jump_insn (gen_indirect_jump (loc));
4025 #ifdef HAVE_conditional_move
4027 /* Emit a conditional move instruction if the machine supports one for that
4028 condition and machine mode.
4030 OP0 and OP1 are the operands that should be compared using CODE. CMODE is
4031 the mode to use should they be constants. If it is VOIDmode, they cannot
4034 OP2 should be stored in TARGET if the comparison is true, otherwise OP3
4035 should be stored there. MODE is the mode to use should they be constants.
4036 If it is VOIDmode, they cannot both be constants.
4038 The result is either TARGET (perhaps modified) or NULL_RTX if the operation
4039 is not supported. */
4042 emit_conditional_move (target, code, op0, op1, cmode, op2, op3, mode,
4047 enum machine_mode cmode;
4049 enum machine_mode mode;
4052 rtx tem, subtarget, comparison, insn;
4053 enum insn_code icode;
4054 enum rtx_code reversed;
4056 /* If one operand is constant, make it the second one. Only do this
4057 if the other operand is not constant as well. */
4059 if (swap_commutative_operands_p (op0, op1))
4064 code = swap_condition (code);
4067 /* get_condition will prefer to generate LT and GT even if the old
4068 comparison was against zero, so undo that canonicalization here since
4069 comparisons against zero are cheaper. */
4070 if (code == LT && GET_CODE (op1) == CONST_INT && INTVAL (op1) == 1)
4071 code = LE, op1 = const0_rtx;
4072 else if (code == GT && GET_CODE (op1) == CONST_INT && INTVAL (op1) == -1)
4073 code = GE, op1 = const0_rtx;
4075 if (cmode == VOIDmode)
4076 cmode = GET_MODE (op0);
4078 if (swap_commutative_operands_p (op2, op3)
4079 && ((reversed = reversed_comparison_code_parts (code, op0, op1, NULL))
4088 if (mode == VOIDmode)
4089 mode = GET_MODE (op2);
4091 icode = movcc_gen_code[mode];
4093 if (icode == CODE_FOR_nothing)
4098 op2 = force_not_mem (op2);
4099 op3 = force_not_mem (op3);
4103 target = protect_from_queue (target, 1);
4105 target = gen_reg_rtx (mode);
4111 op2 = protect_from_queue (op2, 0);
4112 op3 = protect_from_queue (op3, 0);
4114 /* If the insn doesn't accept these operands, put them in pseudos. */
4116 if (! (*insn_data[icode].operand[0].predicate)
4117 (subtarget, insn_data[icode].operand[0].mode))
4118 subtarget = gen_reg_rtx (insn_data[icode].operand[0].mode);
4120 if (! (*insn_data[icode].operand[2].predicate)
4121 (op2, insn_data[icode].operand[2].mode))
4122 op2 = copy_to_mode_reg (insn_data[icode].operand[2].mode, op2);
4124 if (! (*insn_data[icode].operand[3].predicate)
4125 (op3, insn_data[icode].operand[3].mode))
4126 op3 = copy_to_mode_reg (insn_data[icode].operand[3].mode, op3);
4128 /* Everything should now be in the suitable form, so emit the compare insn
4129 and then the conditional move. */
4132 = compare_from_rtx (op0, op1, code, unsignedp, cmode, NULL_RTX);
4134 /* ??? Watch for const0_rtx (nop) and const_true_rtx (unconditional)? */
4135 /* We can get const0_rtx or const_true_rtx in some circumstances. Just
4136 return NULL and let the caller figure out how best to deal with this
4138 if (GET_CODE (comparison) != code)
4141 insn = GEN_FCN (icode) (subtarget, comparison, op2, op3);
4143 /* If that failed, then give up. */
4149 if (subtarget != target)
4150 convert_move (target, subtarget, 0);
4155 /* Return nonzero if a conditional move of mode MODE is supported.
4157 This function is for combine so it can tell whether an insn that looks
4158 like a conditional move is actually supported by the hardware. If we
4159 guess wrong we lose a bit on optimization, but that's it. */
4160 /* ??? sparc64 supports conditionally moving integers values based on fp
4161 comparisons, and vice versa. How do we handle them? */
4164 can_conditionally_move_p (mode)
4165 enum machine_mode mode;
4167 if (movcc_gen_code[mode] != CODE_FOR_nothing)
4173 #endif /* HAVE_conditional_move */
4175 /* These functions generate an insn body and return it
4176 rather than emitting the insn.
4178 They do not protect from queued increments,
4179 because they may be used 1) in protect_from_queue itself
4180 and 2) in other passes where there is no queue. */
4182 /* Generate and return an insn body to add Y to X. */
4185 gen_add2_insn (x, y)
4188 int icode = (int) add_optab->handlers[(int) GET_MODE (x)].insn_code;
4190 if (! ((*insn_data[icode].operand[0].predicate)
4191 (x, insn_data[icode].operand[0].mode))
4192 || ! ((*insn_data[icode].operand[1].predicate)
4193 (x, insn_data[icode].operand[1].mode))
4194 || ! ((*insn_data[icode].operand[2].predicate)
4195 (y, insn_data[icode].operand[2].mode)))
4198 return (GEN_FCN (icode) (x, x, y));
4201 /* Generate and return an insn body to add r1 and c,
4202 storing the result in r0. */
4204 gen_add3_insn (r0, r1, c)
4207 int icode = (int) add_optab->handlers[(int) GET_MODE (r0)].insn_code;
4209 if (icode == CODE_FOR_nothing
4210 || ! ((*insn_data[icode].operand[0].predicate)
4211 (r0, insn_data[icode].operand[0].mode))
4212 || ! ((*insn_data[icode].operand[1].predicate)
4213 (r1, insn_data[icode].operand[1].mode))
4214 || ! ((*insn_data[icode].operand[2].predicate)
4215 (c, insn_data[icode].operand[2].mode)))
4218 return (GEN_FCN (icode) (r0, r1, c));
4222 have_add2_insn (x, y)
4227 if (GET_MODE (x) == VOIDmode)
4230 icode = (int) add_optab->handlers[(int) GET_MODE (x)].insn_code;
4232 if (icode == CODE_FOR_nothing)
4235 if (! ((*insn_data[icode].operand[0].predicate)
4236 (x, insn_data[icode].operand[0].mode))
4237 || ! ((*insn_data[icode].operand[1].predicate)
4238 (x, insn_data[icode].operand[1].mode))
4239 || ! ((*insn_data[icode].operand[2].predicate)
4240 (y, insn_data[icode].operand[2].mode)))
4246 /* Generate and return an insn body to subtract Y from X. */
4249 gen_sub2_insn (x, y)
4252 int icode = (int) sub_optab->handlers[(int) GET_MODE (x)].insn_code;
4254 if (! ((*insn_data[icode].operand[0].predicate)
4255 (x, insn_data[icode].operand[0].mode))
4256 || ! ((*insn_data[icode].operand[1].predicate)
4257 (x, insn_data[icode].operand[1].mode))
4258 || ! ((*insn_data[icode].operand[2].predicate)
4259 (y, insn_data[icode].operand[2].mode)))
4262 return (GEN_FCN (icode) (x, x, y));
4265 /* Generate and return an insn body to subtract r1 and c,
4266 storing the result in r0. */
4268 gen_sub3_insn (r0, r1, c)
4271 int icode = (int) sub_optab->handlers[(int) GET_MODE (r0)].insn_code;
4273 if (icode == CODE_FOR_nothing
4274 || ! ((*insn_data[icode].operand[0].predicate)
4275 (r0, insn_data[icode].operand[0].mode))
4276 || ! ((*insn_data[icode].operand[1].predicate)
4277 (r1, insn_data[icode].operand[1].mode))
4278 || ! ((*insn_data[icode].operand[2].predicate)
4279 (c, insn_data[icode].operand[2].mode)))
4282 return (GEN_FCN (icode) (r0, r1, c));
4286 have_sub2_insn (x, y)
4291 if (GET_MODE (x) == VOIDmode)
4294 icode = (int) sub_optab->handlers[(int) GET_MODE (x)].insn_code;
4296 if (icode == CODE_FOR_nothing)
4299 if (! ((*insn_data[icode].operand[0].predicate)
4300 (x, insn_data[icode].operand[0].mode))
4301 || ! ((*insn_data[icode].operand[1].predicate)
4302 (x, insn_data[icode].operand[1].mode))
4303 || ! ((*insn_data[icode].operand[2].predicate)
4304 (y, insn_data[icode].operand[2].mode)))
4310 /* Generate the body of an instruction to copy Y into X.
4311 It may be a list of insns, if one insn isn't enough. */
4314 gen_move_insn (x, y)
4317 enum machine_mode mode = GET_MODE (x);
4318 enum insn_code insn_code;
4321 if (mode == VOIDmode)
4322 mode = GET_MODE (y);
4324 insn_code = mov_optab->handlers[(int) mode].insn_code;
4326 /* Handle MODE_CC modes: If we don't have a special move insn for this mode,
4327 find a mode to do it in. If we have a movcc, use it. Otherwise,
4328 find the MODE_INT mode of the same width. */
4330 if (GET_MODE_CLASS (mode) == MODE_CC && insn_code == CODE_FOR_nothing)
4332 enum machine_mode tmode = VOIDmode;
4336 && mov_optab->handlers[(int) CCmode].insn_code != CODE_FOR_nothing)
4339 for (tmode = QImode; tmode != VOIDmode;
4340 tmode = GET_MODE_WIDER_MODE (tmode))
4341 if (GET_MODE_SIZE (tmode) == GET_MODE_SIZE (mode))
4344 if (tmode == VOIDmode)
4347 /* Get X and Y in TMODE. We can't use gen_lowpart here because it
4348 may call change_address which is not appropriate if we were
4349 called when a reload was in progress. We don't have to worry
4350 about changing the address since the size in bytes is supposed to
4351 be the same. Copy the MEM to change the mode and move any
4352 substitutions from the old MEM to the new one. */
4354 if (reload_in_progress)
4356 x = gen_lowpart_common (tmode, x1);
4357 if (x == 0 && GET_CODE (x1) == MEM)
4359 x = adjust_address_nv (x1, tmode, 0);
4360 copy_replacements (x1, x);
4363 y = gen_lowpart_common (tmode, y1);
4364 if (y == 0 && GET_CODE (y1) == MEM)
4366 y = adjust_address_nv (y1, tmode, 0);
4367 copy_replacements (y1, y);
4372 x = gen_lowpart (tmode, x);
4373 y = gen_lowpart (tmode, y);
4376 insn_code = mov_optab->handlers[(int) tmode].insn_code;
4377 return (GEN_FCN (insn_code) (x, y));
4381 emit_move_insn_1 (x, y);
4387 /* Return the insn code used to extend FROM_MODE to TO_MODE.
4388 UNSIGNEDP specifies zero-extension instead of sign-extension. If
4389 no such operation exists, CODE_FOR_nothing will be returned. */
4392 can_extend_p (to_mode, from_mode, unsignedp)
4393 enum machine_mode to_mode, from_mode;
4396 #ifdef HAVE_ptr_extend
4398 return CODE_FOR_ptr_extend;
4401 return extendtab[(int) to_mode][(int) from_mode][unsignedp != 0];
4404 /* Generate the body of an insn to extend Y (with mode MFROM)
4405 into X (with mode MTO). Do zero-extension if UNSIGNEDP is nonzero. */
4408 gen_extend_insn (x, y, mto, mfrom, unsignedp)
4410 enum machine_mode mto, mfrom;
4413 return (GEN_FCN (extendtab[(int) mto][(int) mfrom][unsignedp != 0]) (x, y));
4416 /* can_fix_p and can_float_p say whether the target machine
4417 can directly convert a given fixed point type to
4418 a given floating point type, or vice versa.
4419 The returned value is the CODE_FOR_... value to use,
4420 or CODE_FOR_nothing if these modes cannot be directly converted.
4422 *TRUNCP_PTR is set to 1 if it is necessary to output
4423 an explicit FTRUNC insn before the fix insn; otherwise 0. */
4425 static enum insn_code
4426 can_fix_p (fixmode, fltmode, unsignedp, truncp_ptr)
4427 enum machine_mode fltmode, fixmode;
4432 if (fixtrunctab[(int) fltmode][(int) fixmode][unsignedp != 0]
4433 != CODE_FOR_nothing)
4434 return fixtrunctab[(int) fltmode][(int) fixmode][unsignedp != 0];
4436 if (ftrunc_optab->handlers[(int) fltmode].insn_code != CODE_FOR_nothing)
4439 return fixtab[(int) fltmode][(int) fixmode][unsignedp != 0];
4441 return CODE_FOR_nothing;
4444 static enum insn_code
4445 can_float_p (fltmode, fixmode, unsignedp)
4446 enum machine_mode fixmode, fltmode;
4449 return floattab[(int) fltmode][(int) fixmode][unsignedp != 0];
4452 /* Generate code to convert FROM to floating point
4453 and store in TO. FROM must be fixed point and not VOIDmode.
4454 UNSIGNEDP nonzero means regard FROM as unsigned.
4455 Normally this is done by correcting the final value
4456 if it is negative. */
4459 expand_float (to, from, unsignedp)
4463 enum insn_code icode;
4465 enum machine_mode fmode, imode;
4467 /* Crash now, because we won't be able to decide which mode to use. */
4468 if (GET_MODE (from) == VOIDmode)
4471 /* Look for an insn to do the conversion. Do it in the specified
4472 modes if possible; otherwise convert either input, output or both to
4473 wider mode. If the integer mode is wider than the mode of FROM,
4474 we can do the conversion signed even if the input is unsigned. */
4476 for (imode = GET_MODE (from); imode != VOIDmode;
4477 imode = GET_MODE_WIDER_MODE (imode))
4478 for (fmode = GET_MODE (to); fmode != VOIDmode;
4479 fmode = GET_MODE_WIDER_MODE (fmode))
4481 int doing_unsigned = unsignedp;
4483 if (fmode != GET_MODE (to)
4484 && significand_size (fmode) < GET_MODE_BITSIZE (GET_MODE (from)))
4487 icode = can_float_p (fmode, imode, unsignedp);
4488 if (icode == CODE_FOR_nothing && imode != GET_MODE (from) && unsignedp)
4489 icode = can_float_p (fmode, imode, 0), doing_unsigned = 0;
4491 if (icode != CODE_FOR_nothing)
4493 to = protect_from_queue (to, 1);
4494 from = protect_from_queue (from, 0);
4496 if (imode != GET_MODE (from))
4497 from = convert_to_mode (imode, from, unsignedp);
4499 if (fmode != GET_MODE (to))
4500 target = gen_reg_rtx (fmode);
4502 emit_unop_insn (icode, target, from,
4503 doing_unsigned ? UNSIGNED_FLOAT : FLOAT);
4506 convert_move (to, target, 0);
4511 /* Unsigned integer, and no way to convert directly.
4512 Convert as signed, then conditionally adjust the result. */
4515 rtx label = gen_label_rtx ();
4517 REAL_VALUE_TYPE offset;
4521 to = protect_from_queue (to, 1);
4522 from = protect_from_queue (from, 0);
4525 from = force_not_mem (from);
4527 /* Look for a usable floating mode FMODE wider than the source and at
4528 least as wide as the target. Using FMODE will avoid rounding woes
4529 with unsigned values greater than the signed maximum value. */
4531 for (fmode = GET_MODE (to); fmode != VOIDmode;
4532 fmode = GET_MODE_WIDER_MODE (fmode))
4533 if (GET_MODE_BITSIZE (GET_MODE (from)) < GET_MODE_BITSIZE (fmode)
4534 && can_float_p (fmode, GET_MODE (from), 0) != CODE_FOR_nothing)
4537 if (fmode == VOIDmode)
4539 /* There is no such mode. Pretend the target is wide enough. */
4540 fmode = GET_MODE (to);
4542 /* Avoid double-rounding when TO is narrower than FROM. */
4543 if ((significand_size (fmode) + 1)
4544 < GET_MODE_BITSIZE (GET_MODE (from)))
4547 rtx neglabel = gen_label_rtx ();
4549 /* Don't use TARGET if it isn't a register, is a hard register,
4550 or is the wrong mode. */
4551 if (GET_CODE (target) != REG
4552 || REGNO (target) < FIRST_PSEUDO_REGISTER
4553 || GET_MODE (target) != fmode)
4554 target = gen_reg_rtx (fmode);
4556 imode = GET_MODE (from);
4557 do_pending_stack_adjust ();
4559 /* Test whether the sign bit is set. */
4560 emit_cmp_and_jump_insns (from, const0_rtx, LT, NULL_RTX, imode,
4563 /* The sign bit is not set. Convert as signed. */
4564 expand_float (target, from, 0);
4565 emit_jump_insn (gen_jump (label));
4568 /* The sign bit is set.
4569 Convert to a usable (positive signed) value by shifting right
4570 one bit, while remembering if a nonzero bit was shifted
4571 out; i.e., compute (from & 1) | (from >> 1). */
4573 emit_label (neglabel);
4574 temp = expand_binop (imode, and_optab, from, const1_rtx,
4575 NULL_RTX, 1, OPTAB_LIB_WIDEN);
4576 temp1 = expand_shift (RSHIFT_EXPR, imode, from, integer_one_node,
4578 temp = expand_binop (imode, ior_optab, temp, temp1, temp, 1,
4580 expand_float (target, temp, 0);
4582 /* Multiply by 2 to undo the shift above. */
4583 temp = expand_binop (fmode, add_optab, target, target,
4584 target, 0, OPTAB_LIB_WIDEN);
4586 emit_move_insn (target, temp);
4588 do_pending_stack_adjust ();
4594 /* If we are about to do some arithmetic to correct for an
4595 unsigned operand, do it in a pseudo-register. */
4597 if (GET_MODE (to) != fmode
4598 || GET_CODE (to) != REG || REGNO (to) < FIRST_PSEUDO_REGISTER)
4599 target = gen_reg_rtx (fmode);
4601 /* Convert as signed integer to floating. */
4602 expand_float (target, from, 0);
4604 /* If FROM is negative (and therefore TO is negative),
4605 correct its value by 2**bitwidth. */
4607 do_pending_stack_adjust ();
4608 emit_cmp_and_jump_insns (from, const0_rtx, GE, NULL_RTX, GET_MODE (from),
4612 real_2expN (&offset, GET_MODE_BITSIZE (GET_MODE (from)));
4613 temp = expand_binop (fmode, add_optab, target,
4614 CONST_DOUBLE_FROM_REAL_VALUE (offset, fmode),
4615 target, 0, OPTAB_LIB_WIDEN);
4617 emit_move_insn (target, temp);
4619 do_pending_stack_adjust ();
4624 /* No hardware instruction available; call a library routine to convert from
4625 SImode, DImode, or TImode into SFmode, DFmode, XFmode, or TFmode. */
4631 to = protect_from_queue (to, 1);
4632 from = protect_from_queue (from, 0);
4634 if (GET_MODE_SIZE (GET_MODE (from)) < GET_MODE_SIZE (SImode))
4635 from = convert_to_mode (SImode, from, unsignedp);
4638 from = force_not_mem (from);
4640 if (GET_MODE (to) == SFmode)
4642 if (GET_MODE (from) == SImode)
4643 libfcn = floatsisf_libfunc;
4644 else if (GET_MODE (from) == DImode)
4645 libfcn = floatdisf_libfunc;
4646 else if (GET_MODE (from) == TImode)
4647 libfcn = floattisf_libfunc;
4651 else if (GET_MODE (to) == DFmode)
4653 if (GET_MODE (from) == SImode)
4654 libfcn = floatsidf_libfunc;
4655 else if (GET_MODE (from) == DImode)
4656 libfcn = floatdidf_libfunc;
4657 else if (GET_MODE (from) == TImode)
4658 libfcn = floattidf_libfunc;
4662 else if (GET_MODE (to) == XFmode)
4664 if (GET_MODE (from) == SImode)
4665 libfcn = floatsixf_libfunc;
4666 else if (GET_MODE (from) == DImode)
4667 libfcn = floatdixf_libfunc;
4668 else if (GET_MODE (from) == TImode)
4669 libfcn = floattixf_libfunc;
4673 else if (GET_MODE (to) == TFmode)
4675 if (GET_MODE (from) == SImode)
4676 libfcn = floatsitf_libfunc;
4677 else if (GET_MODE (from) == DImode)
4678 libfcn = floatditf_libfunc;
4679 else if (GET_MODE (from) == TImode)
4680 libfcn = floattitf_libfunc;
4689 value = emit_library_call_value (libfcn, NULL_RTX, LCT_CONST,
4690 GET_MODE (to), 1, from,
4692 insns = get_insns ();
4695 emit_libcall_block (insns, target, value,
4696 gen_rtx_FLOAT (GET_MODE (to), from));
4701 /* Copy result to requested destination
4702 if we have been computing in a temp location. */
4706 if (GET_MODE (target) == GET_MODE (to))
4707 emit_move_insn (to, target);
4709 convert_move (to, target, 0);
4713 /* expand_fix: generate code to convert FROM to fixed point
4714 and store in TO. FROM must be floating point. */
4720 rtx temp = gen_reg_rtx (GET_MODE (x));
4721 return expand_unop (GET_MODE (x), ftrunc_optab, x, temp, 0);
4725 expand_fix (to, from, unsignedp)
4729 enum insn_code icode;
4731 enum machine_mode fmode, imode;
4735 /* We first try to find a pair of modes, one real and one integer, at
4736 least as wide as FROM and TO, respectively, in which we can open-code
4737 this conversion. If the integer mode is wider than the mode of TO,
4738 we can do the conversion either signed or unsigned. */
4740 for (fmode = GET_MODE (from); fmode != VOIDmode;
4741 fmode = GET_MODE_WIDER_MODE (fmode))
4742 for (imode = GET_MODE (to); imode != VOIDmode;
4743 imode = GET_MODE_WIDER_MODE (imode))
4745 int doing_unsigned = unsignedp;
4747 icode = can_fix_p (imode, fmode, unsignedp, &must_trunc);
4748 if (icode == CODE_FOR_nothing && imode != GET_MODE (to) && unsignedp)
4749 icode = can_fix_p (imode, fmode, 0, &must_trunc), doing_unsigned = 0;
4751 if (icode != CODE_FOR_nothing)
4753 to = protect_from_queue (to, 1);
4754 from = protect_from_queue (from, 0);
4756 if (fmode != GET_MODE (from))
4757 from = convert_to_mode (fmode, from, 0);
4760 from = ftruncify (from);
4762 if (imode != GET_MODE (to))
4763 target = gen_reg_rtx (imode);
4765 emit_unop_insn (icode, target, from,
4766 doing_unsigned ? UNSIGNED_FIX : FIX);
4768 convert_move (to, target, unsignedp);
4773 /* For an unsigned conversion, there is one more way to do it.
4774 If we have a signed conversion, we generate code that compares
4775 the real value to the largest representable positive number. If if
4776 is smaller, the conversion is done normally. Otherwise, subtract
4777 one plus the highest signed number, convert, and add it back.
4779 We only need to check all real modes, since we know we didn't find
4780 anything with a wider integer mode. */
4782 if (unsignedp && GET_MODE_BITSIZE (GET_MODE (to)) <= HOST_BITS_PER_WIDE_INT)
4783 for (fmode = GET_MODE (from); fmode != VOIDmode;
4784 fmode = GET_MODE_WIDER_MODE (fmode))
4785 /* Make sure we won't lose significant bits doing this. */
4786 if (GET_MODE_BITSIZE (fmode) > GET_MODE_BITSIZE (GET_MODE (to))
4787 && CODE_FOR_nothing != can_fix_p (GET_MODE (to), fmode, 0,
4791 REAL_VALUE_TYPE offset;
4792 rtx limit, lab1, lab2, insn;
4794 bitsize = GET_MODE_BITSIZE (GET_MODE (to));
4795 real_2expN (&offset, bitsize - 1);
4796 limit = CONST_DOUBLE_FROM_REAL_VALUE (offset, fmode);
4797 lab1 = gen_label_rtx ();
4798 lab2 = gen_label_rtx ();
4801 to = protect_from_queue (to, 1);
4802 from = protect_from_queue (from, 0);
4805 from = force_not_mem (from);
4807 if (fmode != GET_MODE (from))
4808 from = convert_to_mode (fmode, from, 0);
4810 /* See if we need to do the subtraction. */
4811 do_pending_stack_adjust ();
4812 emit_cmp_and_jump_insns (from, limit, GE, NULL_RTX, GET_MODE (from),
4815 /* If not, do the signed "fix" and branch around fixup code. */
4816 expand_fix (to, from, 0);
4817 emit_jump_insn (gen_jump (lab2));
4820 /* Otherwise, subtract 2**(N-1), convert to signed number,
4821 then add 2**(N-1). Do the addition using XOR since this
4822 will often generate better code. */
4824 target = expand_binop (GET_MODE (from), sub_optab, from, limit,
4825 NULL_RTX, 0, OPTAB_LIB_WIDEN);
4826 expand_fix (to, target, 0);
4827 target = expand_binop (GET_MODE (to), xor_optab, to,
4829 ((HOST_WIDE_INT) 1 << (bitsize - 1),
4831 to, 1, OPTAB_LIB_WIDEN);
4834 emit_move_insn (to, target);
4838 if (mov_optab->handlers[(int) GET_MODE (to)].insn_code
4839 != CODE_FOR_nothing)
4841 /* Make a place for a REG_NOTE and add it. */
4842 insn = emit_move_insn (to, to);
4843 set_unique_reg_note (insn,
4845 gen_rtx_fmt_e (UNSIGNED_FIX,
4853 /* We can't do it with an insn, so use a library call. But first ensure
4854 that the mode of TO is at least as wide as SImode, since those are the
4855 only library calls we know about. */
4857 if (GET_MODE_SIZE (GET_MODE (to)) < GET_MODE_SIZE (SImode))
4859 target = gen_reg_rtx (SImode);
4861 expand_fix (target, from, unsignedp);
4863 else if (GET_MODE (from) == SFmode)
4865 if (GET_MODE (to) == SImode)
4866 libfcn = unsignedp ? fixunssfsi_libfunc : fixsfsi_libfunc;
4867 else if (GET_MODE (to) == DImode)
4868 libfcn = unsignedp ? fixunssfdi_libfunc : fixsfdi_libfunc;
4869 else if (GET_MODE (to) == TImode)
4870 libfcn = unsignedp ? fixunssfti_libfunc : fixsfti_libfunc;
4874 else if (GET_MODE (from) == DFmode)
4876 if (GET_MODE (to) == SImode)
4877 libfcn = unsignedp ? fixunsdfsi_libfunc : fixdfsi_libfunc;
4878 else if (GET_MODE (to) == DImode)
4879 libfcn = unsignedp ? fixunsdfdi_libfunc : fixdfdi_libfunc;
4880 else if (GET_MODE (to) == TImode)
4881 libfcn = unsignedp ? fixunsdfti_libfunc : fixdfti_libfunc;
4885 else if (GET_MODE (from) == XFmode)
4887 if (GET_MODE (to) == SImode)
4888 libfcn = unsignedp ? fixunsxfsi_libfunc : fixxfsi_libfunc;
4889 else if (GET_MODE (to) == DImode)
4890 libfcn = unsignedp ? fixunsxfdi_libfunc : fixxfdi_libfunc;
4891 else if (GET_MODE (to) == TImode)
4892 libfcn = unsignedp ? fixunsxfti_libfunc : fixxfti_libfunc;
4896 else if (GET_MODE (from) == TFmode)
4898 if (GET_MODE (to) == SImode)
4899 libfcn = unsignedp ? fixunstfsi_libfunc : fixtfsi_libfunc;
4900 else if (GET_MODE (to) == DImode)
4901 libfcn = unsignedp ? fixunstfdi_libfunc : fixtfdi_libfunc;
4902 else if (GET_MODE (to) == TImode)
4903 libfcn = unsignedp ? fixunstfti_libfunc : fixtfti_libfunc;
4915 to = protect_from_queue (to, 1);
4916 from = protect_from_queue (from, 0);
4919 from = force_not_mem (from);
4923 value = emit_library_call_value (libfcn, NULL_RTX, LCT_CONST,
4924 GET_MODE (to), 1, from,
4926 insns = get_insns ();
4929 emit_libcall_block (insns, target, value,
4930 gen_rtx_fmt_e (unsignedp ? UNSIGNED_FIX : FIX,
4931 GET_MODE (to), from));
4936 if (GET_MODE (to) == GET_MODE (target))
4937 emit_move_insn (to, target);
4939 convert_move (to, target, 0);
4943 /* Report whether we have an instruction to perform the operation
4944 specified by CODE on operands of mode MODE. */
4946 have_insn_for (code, mode)
4948 enum machine_mode mode;
4950 return (code_to_optab[(int) code] != 0
4951 && (code_to_optab[(int) code]->handlers[(int) mode].insn_code
4952 != CODE_FOR_nothing));
4955 /* Create a blank optab. */
4960 optab op = (optab) ggc_alloc (sizeof (struct optab));
4961 for (i = 0; i < NUM_MACHINE_MODES; i++)
4963 op->handlers[i].insn_code = CODE_FOR_nothing;
4964 op->handlers[i].libfunc = 0;
4970 /* Same, but fill in its code as CODE, and write it into the
4971 code_to_optab table. */
4976 optab op = new_optab ();
4978 code_to_optab[(int) code] = op;
4982 /* Same, but fill in its code as CODE, and do _not_ write it into
4983 the code_to_optab table. */
4988 optab op = new_optab ();
4993 /* Initialize the libfunc fields of an entire group of entries in some
4994 optab. Each entry is set equal to a string consisting of a leading
4995 pair of underscores followed by a generic operation name followed by
4996 a mode name (downshifted to lower case) followed by a single character
4997 representing the number of operands for the given operation (which is
4998 usually one of the characters '2', '3', or '4').
5000 OPTABLE is the table in which libfunc fields are to be initialized.
5001 FIRST_MODE is the first machine mode index in the given optab to
5003 LAST_MODE is the last machine mode index in the given optab to
5005 OPNAME is the generic (string) name of the operation.
5006 SUFFIX is the character which specifies the number of operands for
5007 the given generic operation.
5011 init_libfuncs (optable, first_mode, last_mode, opname, suffix)
5019 unsigned opname_len = strlen (opname);
5021 for (mode = first_mode; (int) mode <= (int) last_mode;
5022 mode = (enum machine_mode) ((int) mode + 1))
5024 const char *mname = GET_MODE_NAME (mode);
5025 unsigned mname_len = strlen (mname);
5026 char *libfunc_name = alloca (2 + opname_len + mname_len + 1 + 1);
5033 for (q = opname; *q; )
5035 for (q = mname; *q; q++)
5036 *p++ = TOLOWER (*q);
5040 optable->handlers[(int) mode].libfunc
5041 = gen_rtx_SYMBOL_REF (Pmode, ggc_alloc_string (libfunc_name,
5046 /* Initialize the libfunc fields of an entire group of entries in some
5047 optab which correspond to all integer mode operations. The parameters
5048 have the same meaning as similarly named ones for the `init_libfuncs'
5049 routine. (See above). */
5052 init_integral_libfuncs (optable, opname, suffix)
5057 init_libfuncs (optable, SImode, TImode, opname, suffix);
5060 /* Initialize the libfunc fields of an entire group of entries in some
5061 optab which correspond to all real mode operations. The parameters
5062 have the same meaning as similarly named ones for the `init_libfuncs'
5063 routine. (See above). */
5066 init_floating_libfuncs (optable, opname, suffix)
5071 init_libfuncs (optable, SFmode, TFmode, opname, suffix);
5075 init_one_libfunc (name)
5078 /* Create a FUNCTION_DECL that can be passed to
5079 targetm.encode_section_info. */
5080 /* ??? We don't have any type information except for this is
5081 a function. Pretend this is "int foo()". */
5082 tree decl = build_decl (FUNCTION_DECL, get_identifier (name),
5083 build_function_type (integer_type_node, NULL_TREE));
5084 DECL_ARTIFICIAL (decl) = 1;
5085 DECL_EXTERNAL (decl) = 1;
5086 TREE_PUBLIC (decl) = 1;
5088 /* Return the symbol_ref from the mem rtx. */
5089 return XEXP (DECL_RTL (decl), 0);
5092 /* Call this once to initialize the contents of the optabs
5093 appropriately for the current target machine. */
5098 unsigned int i, j, k;
5100 /* Start by initializing all tables to contain CODE_FOR_nothing. */
5102 for (i = 0; i < ARRAY_SIZE (fixtab); i++)
5103 for (j = 0; j < ARRAY_SIZE (fixtab[0]); j++)
5104 for (k = 0; k < ARRAY_SIZE (fixtab[0][0]); k++)
5105 fixtab[i][j][k] = CODE_FOR_nothing;
5107 for (i = 0; i < ARRAY_SIZE (fixtrunctab); i++)
5108 for (j = 0; j < ARRAY_SIZE (fixtrunctab[0]); j++)
5109 for (k = 0; k < ARRAY_SIZE (fixtrunctab[0][0]); k++)
5110 fixtrunctab[i][j][k] = CODE_FOR_nothing;
5112 for (i = 0; i < ARRAY_SIZE (floattab); i++)
5113 for (j = 0; j < ARRAY_SIZE (floattab[0]); j++)
5114 for (k = 0; k < ARRAY_SIZE (floattab[0][0]); k++)
5115 floattab[i][j][k] = CODE_FOR_nothing;
5117 for (i = 0; i < ARRAY_SIZE (extendtab); i++)
5118 for (j = 0; j < ARRAY_SIZE (extendtab[0]); j++)
5119 for (k = 0; k < ARRAY_SIZE (extendtab[0][0]); k++)
5120 extendtab[i][j][k] = CODE_FOR_nothing;
5122 for (i = 0; i < NUM_RTX_CODE; i++)
5123 setcc_gen_code[i] = CODE_FOR_nothing;
5125 #ifdef HAVE_conditional_move
5126 for (i = 0; i < NUM_MACHINE_MODES; i++)
5127 movcc_gen_code[i] = CODE_FOR_nothing;
5130 add_optab = init_optab (PLUS);
5131 addv_optab = init_optabv (PLUS);
5132 sub_optab = init_optab (MINUS);
5133 subv_optab = init_optabv (MINUS);
5134 smul_optab = init_optab (MULT);
5135 smulv_optab = init_optabv (MULT);
5136 smul_highpart_optab = init_optab (UNKNOWN);
5137 umul_highpart_optab = init_optab (UNKNOWN);
5138 smul_widen_optab = init_optab (UNKNOWN);
5139 umul_widen_optab = init_optab (UNKNOWN);
5140 sdiv_optab = init_optab (DIV);
5141 sdivv_optab = init_optabv (DIV);
5142 sdivmod_optab = init_optab (UNKNOWN);
5143 udiv_optab = init_optab (UDIV);
5144 udivmod_optab = init_optab (UNKNOWN);
5145 smod_optab = init_optab (MOD);
5146 umod_optab = init_optab (UMOD);
5147 ftrunc_optab = init_optab (UNKNOWN);
5148 and_optab = init_optab (AND);
5149 ior_optab = init_optab (IOR);
5150 xor_optab = init_optab (XOR);
5151 ashl_optab = init_optab (ASHIFT);
5152 ashr_optab = init_optab (ASHIFTRT);
5153 lshr_optab = init_optab (LSHIFTRT);
5154 rotl_optab = init_optab (ROTATE);
5155 rotr_optab = init_optab (ROTATERT);
5156 smin_optab = init_optab (SMIN);
5157 smax_optab = init_optab (SMAX);
5158 umin_optab = init_optab (UMIN);
5159 umax_optab = init_optab (UMAX);
5161 /* These three have codes assigned exclusively for the sake of
5163 mov_optab = init_optab (SET);
5164 movstrict_optab = init_optab (STRICT_LOW_PART);
5165 cmp_optab = init_optab (COMPARE);
5167 ucmp_optab = init_optab (UNKNOWN);
5168 tst_optab = init_optab (UNKNOWN);
5169 neg_optab = init_optab (NEG);
5170 negv_optab = init_optabv (NEG);
5171 abs_optab = init_optab (ABS);
5172 absv_optab = init_optabv (ABS);
5173 one_cmpl_optab = init_optab (NOT);
5174 ffs_optab = init_optab (FFS);
5175 sqrt_optab = init_optab (SQRT);
5176 sin_optab = init_optab (UNKNOWN);
5177 cos_optab = init_optab (UNKNOWN);
5178 exp_optab = init_optab (UNKNOWN);
5179 log_optab = init_optab (UNKNOWN);
5180 strlen_optab = init_optab (UNKNOWN);
5181 cbranch_optab = init_optab (UNKNOWN);
5182 cmov_optab = init_optab (UNKNOWN);
5183 cstore_optab = init_optab (UNKNOWN);
5184 push_optab = init_optab (UNKNOWN);
5186 for (i = 0; i < NUM_MACHINE_MODES; i++)
5188 movstr_optab[i] = CODE_FOR_nothing;
5189 clrstr_optab[i] = CODE_FOR_nothing;
5191 #ifdef HAVE_SECONDARY_RELOADS
5192 reload_in_optab[i] = reload_out_optab[i] = CODE_FOR_nothing;
5196 /* Fill in the optabs with the insns we support. */
5199 #ifdef FIXUNS_TRUNC_LIKE_FIX_TRUNC
5200 /* This flag says the same insns that convert to a signed fixnum
5201 also convert validly to an unsigned one. */
5202 for (i = 0; i < NUM_MACHINE_MODES; i++)
5203 for (j = 0; j < NUM_MACHINE_MODES; j++)
5204 fixtrunctab[i][j][1] = fixtrunctab[i][j][0];
5207 /* Initialize the optabs with the names of the library functions. */
5208 init_integral_libfuncs (add_optab, "add", '3');
5209 init_floating_libfuncs (add_optab, "add", '3');
5210 init_integral_libfuncs (addv_optab, "addv", '3');
5211 init_floating_libfuncs (addv_optab, "add", '3');
5212 init_integral_libfuncs (sub_optab, "sub", '3');
5213 init_floating_libfuncs (sub_optab, "sub", '3');
5214 init_integral_libfuncs (subv_optab, "subv", '3');
5215 init_floating_libfuncs (subv_optab, "sub", '3');
5216 init_integral_libfuncs (smul_optab, "mul", '3');
5217 init_floating_libfuncs (smul_optab, "mul", '3');
5218 init_integral_libfuncs (smulv_optab, "mulv", '3');
5219 init_floating_libfuncs (smulv_optab, "mul", '3');
5220 init_integral_libfuncs (sdiv_optab, "div", '3');
5221 init_floating_libfuncs (sdiv_optab, "div", '3');
5222 init_integral_libfuncs (sdivv_optab, "divv", '3');
5223 init_integral_libfuncs (udiv_optab, "udiv", '3');
5224 init_integral_libfuncs (sdivmod_optab, "divmod", '4');
5225 init_integral_libfuncs (udivmod_optab, "udivmod", '4');
5226 init_integral_libfuncs (smod_optab, "mod", '3');
5227 init_integral_libfuncs (umod_optab, "umod", '3');
5228 init_floating_libfuncs (ftrunc_optab, "ftrunc", '2');
5229 init_integral_libfuncs (and_optab, "and", '3');
5230 init_integral_libfuncs (ior_optab, "ior", '3');
5231 init_integral_libfuncs (xor_optab, "xor", '3');
5232 init_integral_libfuncs (ashl_optab, "ashl", '3');
5233 init_integral_libfuncs (ashr_optab, "ashr", '3');
5234 init_integral_libfuncs (lshr_optab, "lshr", '3');
5235 init_integral_libfuncs (smin_optab, "min", '3');
5236 init_floating_libfuncs (smin_optab, "min", '3');
5237 init_integral_libfuncs (smax_optab, "max", '3');
5238 init_floating_libfuncs (smax_optab, "max", '3');
5239 init_integral_libfuncs (umin_optab, "umin", '3');
5240 init_integral_libfuncs (umax_optab, "umax", '3');
5241 init_integral_libfuncs (neg_optab, "neg", '2');
5242 init_floating_libfuncs (neg_optab, "neg", '2');
5243 init_integral_libfuncs (negv_optab, "negv", '2');
5244 init_floating_libfuncs (negv_optab, "neg", '2');
5245 init_integral_libfuncs (one_cmpl_optab, "one_cmpl", '2');
5246 init_integral_libfuncs (ffs_optab, "ffs", '2');
5248 /* Comparison libcalls for integers MUST come in pairs, signed/unsigned. */
5249 init_integral_libfuncs (cmp_optab, "cmp", '2');
5250 init_integral_libfuncs (ucmp_optab, "ucmp", '2');
5251 init_floating_libfuncs (cmp_optab, "cmp", '2');
5253 #ifdef MULSI3_LIBCALL
5254 smul_optab->handlers[(int) SImode].libfunc
5255 = init_one_libfunc (MULSI3_LIBCALL);
5257 #ifdef MULDI3_LIBCALL
5258 smul_optab->handlers[(int) DImode].libfunc
5259 = init_one_libfunc (MULDI3_LIBCALL);
5262 #ifdef DIVSI3_LIBCALL
5263 sdiv_optab->handlers[(int) SImode].libfunc
5264 = init_one_libfunc (DIVSI3_LIBCALL);
5266 #ifdef DIVDI3_LIBCALL
5267 sdiv_optab->handlers[(int) DImode].libfunc
5268 = init_one_libfunc (DIVDI3_LIBCALL);
5271 #ifdef UDIVSI3_LIBCALL
5272 udiv_optab->handlers[(int) SImode].libfunc
5273 = init_one_libfunc (UDIVSI3_LIBCALL);
5275 #ifdef UDIVDI3_LIBCALL
5276 udiv_optab->handlers[(int) DImode].libfunc
5277 = init_one_libfunc (UDIVDI3_LIBCALL);
5280 #ifdef MODSI3_LIBCALL
5281 smod_optab->handlers[(int) SImode].libfunc
5282 = init_one_libfunc (MODSI3_LIBCALL);
5284 #ifdef MODDI3_LIBCALL
5285 smod_optab->handlers[(int) DImode].libfunc
5286 = init_one_libfunc (MODDI3_LIBCALL);
5289 #ifdef UMODSI3_LIBCALL
5290 umod_optab->handlers[(int) SImode].libfunc
5291 = init_one_libfunc (UMODSI3_LIBCALL);
5293 #ifdef UMODDI3_LIBCALL
5294 umod_optab->handlers[(int) DImode].libfunc
5295 = init_one_libfunc (UMODDI3_LIBCALL);
5298 /* Use cabs for DC complex abs, since systems generally have cabs.
5299 Don't define any libcall for SCmode, so that cabs will be used. */
5300 abs_optab->handlers[(int) DCmode].libfunc
5301 = init_one_libfunc ("cabs");
5303 /* The ffs function operates on `int'. */
5304 ffs_optab->handlers[(int) mode_for_size (INT_TYPE_SIZE, MODE_INT, 0)].libfunc
5305 = init_one_libfunc ("ffs");
5307 extendsfdf2_libfunc = init_one_libfunc ("__extendsfdf2");
5308 extendsfxf2_libfunc = init_one_libfunc ("__extendsfxf2");
5309 extendsftf2_libfunc = init_one_libfunc ("__extendsftf2");
5310 extenddfxf2_libfunc = init_one_libfunc ("__extenddfxf2");
5311 extenddftf2_libfunc = init_one_libfunc ("__extenddftf2");
5313 truncdfsf2_libfunc = init_one_libfunc ("__truncdfsf2");
5314 truncxfsf2_libfunc = init_one_libfunc ("__truncxfsf2");
5315 trunctfsf2_libfunc = init_one_libfunc ("__trunctfsf2");
5316 truncxfdf2_libfunc = init_one_libfunc ("__truncxfdf2");
5317 trunctfdf2_libfunc = init_one_libfunc ("__trunctfdf2");
5319 abort_libfunc = init_one_libfunc ("abort");
5320 memcpy_libfunc = init_one_libfunc ("memcpy");
5321 memmove_libfunc = init_one_libfunc ("memmove");
5322 bcopy_libfunc = init_one_libfunc ("bcopy");
5323 memcmp_libfunc = init_one_libfunc ("memcmp");
5324 bcmp_libfunc = init_one_libfunc ("__gcc_bcmp");
5325 memset_libfunc = init_one_libfunc ("memset");
5326 bzero_libfunc = init_one_libfunc ("bzero");
5328 unwind_resume_libfunc = init_one_libfunc (USING_SJLJ_EXCEPTIONS
5329 ? "_Unwind_SjLj_Resume"
5330 : "_Unwind_Resume");
5331 #ifndef DONT_USE_BUILTIN_SETJMP
5332 setjmp_libfunc = init_one_libfunc ("__builtin_setjmp");
5333 longjmp_libfunc = init_one_libfunc ("__builtin_longjmp");
5335 setjmp_libfunc = init_one_libfunc ("setjmp");
5336 longjmp_libfunc = init_one_libfunc ("longjmp");
5338 unwind_sjlj_register_libfunc = init_one_libfunc ("_Unwind_SjLj_Register");
5339 unwind_sjlj_unregister_libfunc
5340 = init_one_libfunc ("_Unwind_SjLj_Unregister");
5342 eqhf2_libfunc = init_one_libfunc ("__eqhf2");
5343 nehf2_libfunc = init_one_libfunc ("__nehf2");
5344 gthf2_libfunc = init_one_libfunc ("__gthf2");
5345 gehf2_libfunc = init_one_libfunc ("__gehf2");
5346 lthf2_libfunc = init_one_libfunc ("__lthf2");
5347 lehf2_libfunc = init_one_libfunc ("__lehf2");
5348 unordhf2_libfunc = init_one_libfunc ("__unordhf2");
5350 eqsf2_libfunc = init_one_libfunc ("__eqsf2");
5351 nesf2_libfunc = init_one_libfunc ("__nesf2");
5352 gtsf2_libfunc = init_one_libfunc ("__gtsf2");
5353 gesf2_libfunc = init_one_libfunc ("__gesf2");
5354 ltsf2_libfunc = init_one_libfunc ("__ltsf2");
5355 lesf2_libfunc = init_one_libfunc ("__lesf2");
5356 unordsf2_libfunc = init_one_libfunc ("__unordsf2");
5358 eqdf2_libfunc = init_one_libfunc ("__eqdf2");
5359 nedf2_libfunc = init_one_libfunc ("__nedf2");
5360 gtdf2_libfunc = init_one_libfunc ("__gtdf2");
5361 gedf2_libfunc = init_one_libfunc ("__gedf2");
5362 ltdf2_libfunc = init_one_libfunc ("__ltdf2");
5363 ledf2_libfunc = init_one_libfunc ("__ledf2");
5364 unorddf2_libfunc = init_one_libfunc ("__unorddf2");
5366 eqxf2_libfunc = init_one_libfunc ("__eqxf2");
5367 nexf2_libfunc = init_one_libfunc ("__nexf2");
5368 gtxf2_libfunc = init_one_libfunc ("__gtxf2");
5369 gexf2_libfunc = init_one_libfunc ("__gexf2");
5370 ltxf2_libfunc = init_one_libfunc ("__ltxf2");
5371 lexf2_libfunc = init_one_libfunc ("__lexf2");
5372 unordxf2_libfunc = init_one_libfunc ("__unordxf2");
5374 eqtf2_libfunc = init_one_libfunc ("__eqtf2");
5375 netf2_libfunc = init_one_libfunc ("__netf2");
5376 gttf2_libfunc = init_one_libfunc ("__gttf2");
5377 getf2_libfunc = init_one_libfunc ("__getf2");
5378 lttf2_libfunc = init_one_libfunc ("__lttf2");
5379 letf2_libfunc = init_one_libfunc ("__letf2");
5380 unordtf2_libfunc = init_one_libfunc ("__unordtf2");
5382 floatsisf_libfunc = init_one_libfunc ("__floatsisf");
5383 floatdisf_libfunc = init_one_libfunc ("__floatdisf");
5384 floattisf_libfunc = init_one_libfunc ("__floattisf");
5386 floatsidf_libfunc = init_one_libfunc ("__floatsidf");
5387 floatdidf_libfunc = init_one_libfunc ("__floatdidf");
5388 floattidf_libfunc = init_one_libfunc ("__floattidf");
5390 floatsixf_libfunc = init_one_libfunc ("__floatsixf");
5391 floatdixf_libfunc = init_one_libfunc ("__floatdixf");
5392 floattixf_libfunc = init_one_libfunc ("__floattixf");
5394 floatsitf_libfunc = init_one_libfunc ("__floatsitf");
5395 floatditf_libfunc = init_one_libfunc ("__floatditf");
5396 floattitf_libfunc = init_one_libfunc ("__floattitf");
5398 fixsfsi_libfunc = init_one_libfunc ("__fixsfsi");
5399 fixsfdi_libfunc = init_one_libfunc ("__fixsfdi");
5400 fixsfti_libfunc = init_one_libfunc ("__fixsfti");
5402 fixdfsi_libfunc = init_one_libfunc ("__fixdfsi");
5403 fixdfdi_libfunc = init_one_libfunc ("__fixdfdi");
5404 fixdfti_libfunc = init_one_libfunc ("__fixdfti");
5406 fixxfsi_libfunc = init_one_libfunc ("__fixxfsi");
5407 fixxfdi_libfunc = init_one_libfunc ("__fixxfdi");
5408 fixxfti_libfunc = init_one_libfunc ("__fixxfti");
5410 fixtfsi_libfunc = init_one_libfunc ("__fixtfsi");
5411 fixtfdi_libfunc = init_one_libfunc ("__fixtfdi");
5412 fixtfti_libfunc = init_one_libfunc ("__fixtfti");
5414 fixunssfsi_libfunc = init_one_libfunc ("__fixunssfsi");
5415 fixunssfdi_libfunc = init_one_libfunc ("__fixunssfdi");
5416 fixunssfti_libfunc = init_one_libfunc ("__fixunssfti");
5418 fixunsdfsi_libfunc = init_one_libfunc ("__fixunsdfsi");
5419 fixunsdfdi_libfunc = init_one_libfunc ("__fixunsdfdi");
5420 fixunsdfti_libfunc = init_one_libfunc ("__fixunsdfti");
5422 fixunsxfsi_libfunc = init_one_libfunc ("__fixunsxfsi");
5423 fixunsxfdi_libfunc = init_one_libfunc ("__fixunsxfdi");
5424 fixunsxfti_libfunc = init_one_libfunc ("__fixunsxfti");
5426 fixunstfsi_libfunc = init_one_libfunc ("__fixunstfsi");
5427 fixunstfdi_libfunc = init_one_libfunc ("__fixunstfdi");
5428 fixunstfti_libfunc = init_one_libfunc ("__fixunstfti");
5430 /* For function entry/exit instrumentation. */
5431 profile_function_entry_libfunc
5432 = init_one_libfunc ("__cyg_profile_func_enter");
5433 profile_function_exit_libfunc
5434 = init_one_libfunc ("__cyg_profile_func_exit");
5436 #ifdef HAVE_conditional_trap
5440 #ifdef INIT_TARGET_OPTABS
5441 /* Allow the target to add more libcalls or rename some, etc. */
5446 static GTY(()) rtx trap_rtx;
5448 #ifdef HAVE_conditional_trap
5449 /* The insn generating function can not take an rtx_code argument.
5450 TRAP_RTX is used as an rtx argument. Its code is replaced with
5451 the code to be used in the trap insn and all other fields are
5457 if (HAVE_conditional_trap)
5459 trap_rtx = gen_rtx_fmt_ee (EQ, VOIDmode, NULL_RTX, NULL_RTX);
5464 /* Generate insns to trap with code TCODE if OP1 and OP2 satisfy condition
5465 CODE. Return 0 on failure. */
5468 gen_cond_trap (code, op1, op2, tcode)
5469 enum rtx_code code ATTRIBUTE_UNUSED;
5470 rtx op1, op2 ATTRIBUTE_UNUSED, tcode ATTRIBUTE_UNUSED;
5472 enum machine_mode mode = GET_MODE (op1);
5474 if (mode == VOIDmode)
5477 #ifdef HAVE_conditional_trap
5478 if (HAVE_conditional_trap
5479 && cmp_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
5483 emit_insn (GEN_FCN (cmp_optab->handlers[(int) mode].insn_code) (op1, op2));
5484 PUT_CODE (trap_rtx, code);
5485 insn = gen_conditional_trap (trap_rtx, tcode);
5489 insn = get_insns ();
5499 #include "gt-optabs.h"