1 /* Expand the basic unary and binary arithmetic operations, for GNU compiler.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
25 #include "coretypes.h"
29 /* Include insn-config.h before expr.h so that HAVE_conditional_move
30 is properly defined. */
31 #include "insn-config.h"
45 #include "basic-block.h"
47 /* Each optab contains info on how this target machine
48 can perform a particular operation
49 for all sizes and kinds of operands.
51 The operation to be performed is often specified
52 by passing one of these optabs as an argument.
54 See expr.h for documentation of these optabs. */
56 optab optab_table[OTI_MAX];
58 rtx libfunc_table[LTI_MAX];
60 /* Tables of patterns for extending one integer mode to another. */
61 enum insn_code extendtab[MAX_MACHINE_MODE][MAX_MACHINE_MODE][2];
63 /* Tables of patterns for converting between fixed and floating point. */
64 enum insn_code fixtab[NUM_MACHINE_MODES][NUM_MACHINE_MODES][2];
65 enum insn_code fixtrunctab[NUM_MACHINE_MODES][NUM_MACHINE_MODES][2];
66 enum insn_code floattab[NUM_MACHINE_MODES][NUM_MACHINE_MODES][2];
68 /* Contains the optab used for each rtx code. */
69 optab code_to_optab[NUM_RTX_CODE + 1];
71 /* Indexed by the rtx-code for a conditional (eg. EQ, LT,...)
72 gives the gen_function to make a branch to test that condition. */
74 rtxfun bcc_gen_fctn[NUM_RTX_CODE];
76 /* Indexed by the rtx-code for a conditional (eg. EQ, LT,...)
77 gives the insn code to make a store-condition insn
78 to test that condition. */
80 enum insn_code setcc_gen_code[NUM_RTX_CODE];
82 #ifdef HAVE_conditional_move
83 /* Indexed by the machine mode, gives the insn code to make a conditional
84 move insn. This is not indexed by the rtx-code like bcc_gen_fctn and
85 setcc_gen_code to cut down on the number of named patterns. Consider a day
86 when a lot more rtx codes are conditional (eg: for the ARM). */
88 enum insn_code movcc_gen_code[NUM_MACHINE_MODES];
91 static int add_equal_note PARAMS ((rtx, rtx, enum rtx_code, rtx, rtx));
92 static rtx widen_operand PARAMS ((rtx, enum machine_mode,
93 enum machine_mode, int, int));
94 static int expand_cmplxdiv_straight PARAMS ((rtx, rtx, rtx, rtx,
95 rtx, rtx, enum machine_mode,
96 int, enum optab_methods,
97 enum mode_class, optab));
98 static int expand_cmplxdiv_wide PARAMS ((rtx, rtx, rtx, rtx,
99 rtx, rtx, enum machine_mode,
100 int, enum optab_methods,
101 enum mode_class, optab));
102 static void prepare_cmp_insn PARAMS ((rtx *, rtx *, enum rtx_code *, rtx,
103 enum machine_mode *, int *,
104 enum can_compare_purpose));
105 static enum insn_code can_fix_p PARAMS ((enum machine_mode, enum machine_mode,
107 static enum insn_code can_float_p PARAMS ((enum machine_mode,
110 static rtx ftruncify PARAMS ((rtx));
111 static optab new_optab PARAMS ((void));
112 static inline optab init_optab PARAMS ((enum rtx_code));
113 static inline optab init_optabv PARAMS ((enum rtx_code));
114 static void init_libfuncs PARAMS ((optab, int, int, const char *, int));
115 static void init_integral_libfuncs PARAMS ((optab, const char *, int));
116 static void init_floating_libfuncs PARAMS ((optab, const char *, int));
117 #ifdef HAVE_conditional_trap
118 static void init_traps PARAMS ((void));
120 static void emit_cmp_and_jump_insn_1 PARAMS ((rtx, rtx, enum machine_mode,
121 enum rtx_code, int, rtx));
122 static void prepare_float_lib_cmp PARAMS ((rtx *, rtx *, enum rtx_code *,
123 enum machine_mode *, int *));
124 static rtx expand_vector_binop PARAMS ((enum machine_mode, optab,
126 enum optab_methods));
127 static rtx expand_vector_unop PARAMS ((enum machine_mode, optab, rtx, rtx,
129 static rtx widen_clz PARAMS ((enum machine_mode, rtx, rtx));
130 static rtx expand_parity PARAMS ((enum machine_mode, rtx, rtx));
132 /* Add a REG_EQUAL note to the last insn in INSNS. TARGET is being set to
133 the result of operation CODE applied to OP0 (and OP1 if it is a binary
136 If the last insn does not set TARGET, don't do anything, but return 1.
138 If a previous insn sets TARGET and TARGET is one of OP0 or OP1,
139 don't add the REG_EQUAL note but return 0. Our caller can then try
140 again, ensuring that TARGET is not one of the operands. */
143 add_equal_note (insns, target, code, op0, op1)
149 rtx last_insn, insn, set;
154 || NEXT_INSN (insns) == NULL_RTX)
157 if (GET_RTX_CLASS (code) != '1' && GET_RTX_CLASS (code) != '2'
158 && GET_RTX_CLASS (code) != 'c' && GET_RTX_CLASS (code) != '<')
161 if (GET_CODE (target) == ZERO_EXTRACT)
164 for (last_insn = insns;
165 NEXT_INSN (last_insn) != NULL_RTX;
166 last_insn = NEXT_INSN (last_insn))
169 set = single_set (last_insn);
173 if (! rtx_equal_p (SET_DEST (set), target)
174 /* For a STRICT_LOW_PART, the REG_NOTE applies to what is inside it. */
175 && (GET_CODE (SET_DEST (set)) != STRICT_LOW_PART
176 || ! rtx_equal_p (XEXP (SET_DEST (set), 0), target)))
179 /* If TARGET is in OP0 or OP1, check if anything in SEQ sets TARGET
180 besides the last insn. */
181 if (reg_overlap_mentioned_p (target, op0)
182 || (op1 && reg_overlap_mentioned_p (target, op1)))
184 insn = PREV_INSN (last_insn);
185 while (insn != NULL_RTX)
187 if (reg_set_p (target, insn))
190 insn = PREV_INSN (insn);
194 if (GET_RTX_CLASS (code) == '1')
195 note = gen_rtx_fmt_e (code, GET_MODE (target), copy_rtx (op0));
197 note = gen_rtx_fmt_ee (code, GET_MODE (target), copy_rtx (op0), copy_rtx (op1));
199 set_unique_reg_note (last_insn, REG_EQUAL, note);
204 /* Widen OP to MODE and return the rtx for the widened operand. UNSIGNEDP
205 says whether OP is signed or unsigned. NO_EXTEND is nonzero if we need
206 not actually do a sign-extend or zero-extend, but can leave the
207 higher-order bits of the result rtx undefined, for example, in the case
208 of logical operations, but not right shifts. */
211 widen_operand (op, mode, oldmode, unsignedp, no_extend)
213 enum machine_mode mode, oldmode;
219 /* If we don't have to extend and this is a constant, return it. */
220 if (no_extend && GET_MODE (op) == VOIDmode)
223 /* If we must extend do so. If OP is a SUBREG for a promoted object, also
224 extend since it will be more efficient to do so unless the signedness of
225 a promoted object differs from our extension. */
227 || (GET_CODE (op) == SUBREG && SUBREG_PROMOTED_VAR_P (op)
228 && SUBREG_PROMOTED_UNSIGNED_P (op) == unsignedp))
229 return convert_modes (mode, oldmode, op, unsignedp);
231 /* If MODE is no wider than a single word, we return a paradoxical
233 if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD)
234 return gen_rtx_SUBREG (mode, force_reg (GET_MODE (op), op), 0);
236 /* Otherwise, get an object of MODE, clobber it, and set the low-order
239 result = gen_reg_rtx (mode);
240 emit_insn (gen_rtx_CLOBBER (VOIDmode, result));
241 emit_move_insn (gen_lowpart (GET_MODE (op), result), op);
245 /* Generate code to perform a straightforward complex divide. */
248 expand_cmplxdiv_straight (real0, real1, imag0, imag1, realr, imagr, submode,
249 unsignedp, methods, class, binoptab)
250 rtx real0, real1, imag0, imag1, realr, imagr;
251 enum machine_mode submode;
253 enum optab_methods methods;
254 enum mode_class class;
261 optab this_add_optab = add_optab;
262 optab this_sub_optab = sub_optab;
263 optab this_neg_optab = neg_optab;
264 optab this_mul_optab = smul_optab;
266 if (binoptab == sdivv_optab)
268 this_add_optab = addv_optab;
269 this_sub_optab = subv_optab;
270 this_neg_optab = negv_optab;
271 this_mul_optab = smulv_optab;
274 /* Don't fetch these from memory more than once. */
275 real0 = force_reg (submode, real0);
276 real1 = force_reg (submode, real1);
279 imag0 = force_reg (submode, imag0);
281 imag1 = force_reg (submode, imag1);
283 /* Divisor: c*c + d*d. */
284 temp1 = expand_binop (submode, this_mul_optab, real1, real1,
285 NULL_RTX, unsignedp, methods);
287 temp2 = expand_binop (submode, this_mul_optab, imag1, imag1,
288 NULL_RTX, unsignedp, methods);
290 if (temp1 == 0 || temp2 == 0)
293 divisor = expand_binop (submode, this_add_optab, temp1, temp2,
294 NULL_RTX, unsignedp, methods);
300 /* Mathematically, ((a)(c-id))/divisor. */
301 /* Computationally, (a+i0) / (c+id) = (ac/(cc+dd)) + i(-ad/(cc+dd)). */
303 /* Calculate the dividend. */
304 real_t = expand_binop (submode, this_mul_optab, real0, real1,
305 NULL_RTX, unsignedp, methods);
307 imag_t = expand_binop (submode, this_mul_optab, real0, imag1,
308 NULL_RTX, unsignedp, methods);
310 if (real_t == 0 || imag_t == 0)
313 imag_t = expand_unop (submode, this_neg_optab, imag_t,
314 NULL_RTX, unsignedp);
318 /* Mathematically, ((a+ib)(c-id))/divider. */
319 /* Calculate the dividend. */
320 temp1 = expand_binop (submode, this_mul_optab, real0, real1,
321 NULL_RTX, unsignedp, methods);
323 temp2 = expand_binop (submode, this_mul_optab, imag0, imag1,
324 NULL_RTX, unsignedp, methods);
326 if (temp1 == 0 || temp2 == 0)
329 real_t = expand_binop (submode, this_add_optab, temp1, temp2,
330 NULL_RTX, unsignedp, methods);
332 temp1 = expand_binop (submode, this_mul_optab, imag0, real1,
333 NULL_RTX, unsignedp, methods);
335 temp2 = expand_binop (submode, this_mul_optab, real0, imag1,
336 NULL_RTX, unsignedp, methods);
338 if (temp1 == 0 || temp2 == 0)
341 imag_t = expand_binop (submode, this_sub_optab, temp1, temp2,
342 NULL_RTX, unsignedp, methods);
344 if (real_t == 0 || imag_t == 0)
348 if (class == MODE_COMPLEX_FLOAT)
349 res = expand_binop (submode, binoptab, real_t, divisor,
350 realr, unsignedp, methods);
352 res = expand_divmod (0, TRUNC_DIV_EXPR, submode,
353 real_t, divisor, realr, unsignedp);
359 emit_move_insn (realr, res);
361 if (class == MODE_COMPLEX_FLOAT)
362 res = expand_binop (submode, binoptab, imag_t, divisor,
363 imagr, unsignedp, methods);
365 res = expand_divmod (0, TRUNC_DIV_EXPR, submode,
366 imag_t, divisor, imagr, unsignedp);
372 emit_move_insn (imagr, res);
377 /* Generate code to perform a wide-input-range-acceptable complex divide. */
380 expand_cmplxdiv_wide (real0, real1, imag0, imag1, realr, imagr, submode,
381 unsignedp, methods, class, binoptab)
382 rtx real0, real1, imag0, imag1, realr, imagr;
383 enum machine_mode submode;
385 enum optab_methods methods;
386 enum mode_class class;
391 rtx temp1, temp2, lab1, lab2;
392 enum machine_mode mode;
394 optab this_add_optab = add_optab;
395 optab this_sub_optab = sub_optab;
396 optab this_neg_optab = neg_optab;
397 optab this_mul_optab = smul_optab;
399 if (binoptab == sdivv_optab)
401 this_add_optab = addv_optab;
402 this_sub_optab = subv_optab;
403 this_neg_optab = negv_optab;
404 this_mul_optab = smulv_optab;
407 /* Don't fetch these from memory more than once. */
408 real0 = force_reg (submode, real0);
409 real1 = force_reg (submode, real1);
412 imag0 = force_reg (submode, imag0);
414 imag1 = force_reg (submode, imag1);
416 /* XXX What's an "unsigned" complex number? */
424 temp1 = expand_abs (submode, real1, NULL_RTX, unsignedp, 1);
425 temp2 = expand_abs (submode, imag1, NULL_RTX, unsignedp, 1);
428 if (temp1 == 0 || temp2 == 0)
431 mode = GET_MODE (temp1);
432 lab1 = gen_label_rtx ();
433 emit_cmp_and_jump_insns (temp1, temp2, LT, NULL_RTX,
434 mode, unsignedp, lab1);
436 /* |c| >= |d|; use ratio d/c to scale dividend and divisor. */
438 if (class == MODE_COMPLEX_FLOAT)
439 ratio = expand_binop (submode, binoptab, imag1, real1,
440 NULL_RTX, unsignedp, methods);
442 ratio = expand_divmod (0, TRUNC_DIV_EXPR, submode,
443 imag1, real1, NULL_RTX, unsignedp);
448 /* Calculate divisor. */
450 temp1 = expand_binop (submode, this_mul_optab, imag1, ratio,
451 NULL_RTX, unsignedp, methods);
456 divisor = expand_binop (submode, this_add_optab, temp1, real1,
457 NULL_RTX, unsignedp, methods);
462 /* Calculate dividend. */
468 /* Compute a / (c+id) as a / (c+d(d/c)) + i (-a(d/c)) / (c+d(d/c)). */
470 imag_t = expand_binop (submode, this_mul_optab, real0, ratio,
471 NULL_RTX, unsignedp, methods);
476 imag_t = expand_unop (submode, this_neg_optab, imag_t,
477 NULL_RTX, unsignedp);
479 if (real_t == 0 || imag_t == 0)
484 /* Compute (a+ib)/(c+id) as
485 (a+b(d/c))/(c+d(d/c) + i(b-a(d/c))/(c+d(d/c)). */
487 temp1 = expand_binop (submode, this_mul_optab, imag0, ratio,
488 NULL_RTX, unsignedp, methods);
493 real_t = expand_binop (submode, this_add_optab, temp1, real0,
494 NULL_RTX, unsignedp, methods);
496 temp1 = expand_binop (submode, this_mul_optab, real0, ratio,
497 NULL_RTX, unsignedp, methods);
502 imag_t = expand_binop (submode, this_sub_optab, imag0, temp1,
503 NULL_RTX, unsignedp, methods);
505 if (real_t == 0 || imag_t == 0)
509 if (class == MODE_COMPLEX_FLOAT)
510 res = expand_binop (submode, binoptab, real_t, divisor,
511 realr, unsignedp, methods);
513 res = expand_divmod (0, TRUNC_DIV_EXPR, submode,
514 real_t, divisor, realr, unsignedp);
520 emit_move_insn (realr, res);
522 if (class == MODE_COMPLEX_FLOAT)
523 res = expand_binop (submode, binoptab, imag_t, divisor,
524 imagr, unsignedp, methods);
526 res = expand_divmod (0, TRUNC_DIV_EXPR, submode,
527 imag_t, divisor, imagr, unsignedp);
533 emit_move_insn (imagr, res);
535 lab2 = gen_label_rtx ();
536 emit_jump_insn (gen_jump (lab2));
541 /* |d| > |c|; use ratio c/d to scale dividend and divisor. */
543 if (class == MODE_COMPLEX_FLOAT)
544 ratio = expand_binop (submode, binoptab, real1, imag1,
545 NULL_RTX, unsignedp, methods);
547 ratio = expand_divmod (0, TRUNC_DIV_EXPR, submode,
548 real1, imag1, NULL_RTX, unsignedp);
553 /* Calculate divisor. */
555 temp1 = expand_binop (submode, this_mul_optab, real1, ratio,
556 NULL_RTX, unsignedp, methods);
561 divisor = expand_binop (submode, this_add_optab, temp1, imag1,
562 NULL_RTX, unsignedp, methods);
567 /* Calculate dividend. */
571 /* Compute a / (c+id) as a(c/d) / (c(c/d)+d) + i (-a) / (c(c/d)+d). */
573 real_t = expand_binop (submode, this_mul_optab, real0, ratio,
574 NULL_RTX, unsignedp, methods);
576 imag_t = expand_unop (submode, this_neg_optab, real0,
577 NULL_RTX, unsignedp);
579 if (real_t == 0 || imag_t == 0)
584 /* Compute (a+ib)/(c+id) as
585 (a(c/d)+b)/(c(c/d)+d) + i (b(c/d)-a)/(c(c/d)+d). */
587 temp1 = expand_binop (submode, this_mul_optab, real0, ratio,
588 NULL_RTX, unsignedp, methods);
593 real_t = expand_binop (submode, this_add_optab, temp1, imag0,
594 NULL_RTX, unsignedp, methods);
596 temp1 = expand_binop (submode, this_mul_optab, imag0, ratio,
597 NULL_RTX, unsignedp, methods);
602 imag_t = expand_binop (submode, this_sub_optab, temp1, real0,
603 NULL_RTX, unsignedp, methods);
605 if (real_t == 0 || imag_t == 0)
609 if (class == MODE_COMPLEX_FLOAT)
610 res = expand_binop (submode, binoptab, real_t, divisor,
611 realr, unsignedp, methods);
613 res = expand_divmod (0, TRUNC_DIV_EXPR, submode,
614 real_t, divisor, realr, unsignedp);
620 emit_move_insn (realr, res);
622 if (class == MODE_COMPLEX_FLOAT)
623 res = expand_binop (submode, binoptab, imag_t, divisor,
624 imagr, unsignedp, methods);
626 res = expand_divmod (0, TRUNC_DIV_EXPR, submode,
627 imag_t, divisor, imagr, unsignedp);
633 emit_move_insn (imagr, res);
640 /* Wrapper around expand_binop which takes an rtx code to specify
641 the operation to perform, not an optab pointer. All other
642 arguments are the same. */
644 expand_simple_binop (mode, code, op0, op1, target, unsignedp, methods)
645 enum machine_mode mode;
650 enum optab_methods methods;
652 optab binop = code_to_optab[(int) code];
656 return expand_binop (mode, binop, op0, op1, target, unsignedp, methods);
659 /* Generate code to perform an operation specified by BINOPTAB
660 on operands OP0 and OP1, with result having machine-mode MODE.
662 UNSIGNEDP is for the case where we have to widen the operands
663 to perform the operation. It says to use zero-extension.
665 If TARGET is nonzero, the value
666 is generated there, if it is convenient to do so.
667 In all cases an rtx is returned for the locus of the value;
668 this may or may not be TARGET. */
671 expand_binop (mode, binoptab, op0, op1, target, unsignedp, methods)
672 enum machine_mode mode;
677 enum optab_methods methods;
679 enum optab_methods next_methods
680 = (methods == OPTAB_LIB || methods == OPTAB_LIB_WIDEN
681 ? OPTAB_WIDEN : methods);
682 enum mode_class class;
683 enum machine_mode wider_mode;
685 int commutative_op = 0;
686 int shift_op = (binoptab->code == ASHIFT
687 || binoptab->code == ASHIFTRT
688 || binoptab->code == LSHIFTRT
689 || binoptab->code == ROTATE
690 || binoptab->code == ROTATERT);
691 rtx entry_last = get_last_insn ();
694 class = GET_MODE_CLASS (mode);
696 op0 = protect_from_queue (op0, 0);
697 op1 = protect_from_queue (op1, 0);
699 target = protect_from_queue (target, 1);
703 /* Load duplicate non-volatile operands once. */
704 if (rtx_equal_p (op0, op1) && ! volatile_refs_p (op0))
706 op0 = force_not_mem (op0);
711 op0 = force_not_mem (op0);
712 op1 = force_not_mem (op1);
716 /* If subtracting an integer constant, convert this into an addition of
717 the negated constant. */
719 if (binoptab == sub_optab && GET_CODE (op1) == CONST_INT)
721 op1 = negate_rtx (mode, op1);
722 binoptab = add_optab;
725 /* If we are inside an appropriately-short loop and one operand is an
726 expensive constant, force it into a register. */
727 if (CONSTANT_P (op0) && preserve_subexpressions_p ()
728 && rtx_cost (op0, binoptab->code) > COSTS_N_INSNS (1))
729 op0 = force_reg (mode, op0);
731 if (CONSTANT_P (op1) && preserve_subexpressions_p ()
732 && ! shift_op && rtx_cost (op1, binoptab->code) > COSTS_N_INSNS (1))
733 op1 = force_reg (mode, op1);
735 /* Record where to delete back to if we backtrack. */
736 last = get_last_insn ();
738 /* If operation is commutative,
739 try to make the first operand a register.
740 Even better, try to make it the same as the target.
741 Also try to make the last operand a constant. */
742 if (GET_RTX_CLASS (binoptab->code) == 'c'
743 || binoptab == smul_widen_optab
744 || binoptab == umul_widen_optab
745 || binoptab == smul_highpart_optab
746 || binoptab == umul_highpart_optab)
750 if (((target == 0 || GET_CODE (target) == REG)
751 ? ((GET_CODE (op1) == REG
752 && GET_CODE (op0) != REG)
754 : rtx_equal_p (op1, target))
755 || GET_CODE (op0) == CONST_INT)
763 /* If we can do it with a three-operand insn, do so. */
765 if (methods != OPTAB_MUST_WIDEN
766 && binoptab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
768 int icode = (int) binoptab->handlers[(int) mode].insn_code;
769 enum machine_mode mode0 = insn_data[icode].operand[1].mode;
770 enum machine_mode mode1 = insn_data[icode].operand[2].mode;
772 rtx xop0 = op0, xop1 = op1;
777 temp = gen_reg_rtx (mode);
779 /* If it is a commutative operator and the modes would match
780 if we would swap the operands, we can save the conversions. */
783 if (GET_MODE (op0) != mode0 && GET_MODE (op1) != mode1
784 && GET_MODE (op0) == mode1 && GET_MODE (op1) == mode0)
788 tmp = op0; op0 = op1; op1 = tmp;
789 tmp = xop0; xop0 = xop1; xop1 = tmp;
793 /* In case the insn wants input operands in modes different from
794 those of the actual operands, convert the operands. It would
795 seem that we don't need to convert CONST_INTs, but we do, so
796 that they're properly zero-extended, sign-extended or truncated
799 if (GET_MODE (op0) != mode0 && mode0 != VOIDmode)
800 xop0 = convert_modes (mode0,
801 GET_MODE (op0) != VOIDmode
806 if (GET_MODE (op1) != mode1 && mode1 != VOIDmode)
807 xop1 = convert_modes (mode1,
808 GET_MODE (op1) != VOIDmode
813 /* Now, if insn's predicates don't allow our operands, put them into
816 if (! (*insn_data[icode].operand[1].predicate) (xop0, mode0)
817 && mode0 != VOIDmode)
818 xop0 = copy_to_mode_reg (mode0, xop0);
820 if (! (*insn_data[icode].operand[2].predicate) (xop1, mode1)
821 && mode1 != VOIDmode)
822 xop1 = copy_to_mode_reg (mode1, xop1);
824 if (! (*insn_data[icode].operand[0].predicate) (temp, mode))
825 temp = gen_reg_rtx (mode);
827 pat = GEN_FCN (icode) (temp, xop0, xop1);
830 /* If PAT is composed of more than one insn, try to add an appropriate
831 REG_EQUAL note to it. If we can't because TEMP conflicts with an
832 operand, call ourselves again, this time without a target. */
833 if (INSN_P (pat) && NEXT_INSN (pat) != NULL_RTX
834 && ! add_equal_note (pat, temp, binoptab->code, xop0, xop1))
836 delete_insns_since (last);
837 return expand_binop (mode, binoptab, op0, op1, NULL_RTX,
845 delete_insns_since (last);
848 /* If this is a multiply, see if we can do a widening operation that
849 takes operands of this mode and makes a wider mode. */
851 if (binoptab == smul_optab && GET_MODE_WIDER_MODE (mode) != VOIDmode
852 && (((unsignedp ? umul_widen_optab : smul_widen_optab)
853 ->handlers[(int) GET_MODE_WIDER_MODE (mode)].insn_code)
854 != CODE_FOR_nothing))
856 temp = expand_binop (GET_MODE_WIDER_MODE (mode),
857 unsignedp ? umul_widen_optab : smul_widen_optab,
858 op0, op1, NULL_RTX, unsignedp, OPTAB_DIRECT);
862 if (GET_MODE_CLASS (mode) == MODE_INT)
863 return gen_lowpart (mode, temp);
865 return convert_to_mode (mode, temp, unsignedp);
869 /* Look for a wider mode of the same class for which we think we
870 can open-code the operation. Check for a widening multiply at the
871 wider mode as well. */
873 if ((class == MODE_INT || class == MODE_FLOAT || class == MODE_COMPLEX_FLOAT)
874 && methods != OPTAB_DIRECT && methods != OPTAB_LIB)
875 for (wider_mode = GET_MODE_WIDER_MODE (mode); wider_mode != VOIDmode;
876 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
878 if (binoptab->handlers[(int) wider_mode].insn_code != CODE_FOR_nothing
879 || (binoptab == smul_optab
880 && GET_MODE_WIDER_MODE (wider_mode) != VOIDmode
881 && (((unsignedp ? umul_widen_optab : smul_widen_optab)
882 ->handlers[(int) GET_MODE_WIDER_MODE (wider_mode)].insn_code)
883 != CODE_FOR_nothing)))
885 rtx xop0 = op0, xop1 = op1;
888 /* For certain integer operations, we need not actually extend
889 the narrow operands, as long as we will truncate
890 the results to the same narrowness. */
892 if ((binoptab == ior_optab || binoptab == and_optab
893 || binoptab == xor_optab
894 || binoptab == add_optab || binoptab == sub_optab
895 || binoptab == smul_optab || binoptab == ashl_optab)
896 && class == MODE_INT)
899 xop0 = widen_operand (xop0, wider_mode, mode, unsignedp, no_extend);
901 /* The second operand of a shift must always be extended. */
902 xop1 = widen_operand (xop1, wider_mode, mode, unsignedp,
903 no_extend && binoptab != ashl_optab);
905 temp = expand_binop (wider_mode, binoptab, xop0, xop1, NULL_RTX,
906 unsignedp, OPTAB_DIRECT);
909 if (class != MODE_INT)
912 target = gen_reg_rtx (mode);
913 convert_move (target, temp, 0);
917 return gen_lowpart (mode, temp);
920 delete_insns_since (last);
924 /* These can be done a word at a time. */
925 if ((binoptab == and_optab || binoptab == ior_optab || binoptab == xor_optab)
927 && GET_MODE_SIZE (mode) > UNITS_PER_WORD
928 && binoptab->handlers[(int) word_mode].insn_code != CODE_FOR_nothing)
934 /* If TARGET is the same as one of the operands, the REG_EQUAL note
935 won't be accurate, so use a new target. */
936 if (target == 0 || target == op0 || target == op1)
937 target = gen_reg_rtx (mode);
941 /* Do the actual arithmetic. */
942 for (i = 0; i < GET_MODE_BITSIZE (mode) / BITS_PER_WORD; i++)
944 rtx target_piece = operand_subword (target, i, 1, mode);
945 rtx x = expand_binop (word_mode, binoptab,
946 operand_subword_force (op0, i, mode),
947 operand_subword_force (op1, i, mode),
948 target_piece, unsignedp, next_methods);
953 if (target_piece != x)
954 emit_move_insn (target_piece, x);
957 insns = get_insns ();
960 if (i == GET_MODE_BITSIZE (mode) / BITS_PER_WORD)
962 if (binoptab->code != UNKNOWN)
964 = gen_rtx_fmt_ee (binoptab->code, mode,
965 copy_rtx (op0), copy_rtx (op1));
969 emit_no_conflict_block (insns, target, op0, op1, equiv_value);
974 /* Synthesize double word shifts from single word shifts. */
975 if ((binoptab == lshr_optab || binoptab == ashl_optab
976 || binoptab == ashr_optab)
978 && GET_CODE (op1) == CONST_INT
979 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
980 && binoptab->handlers[(int) word_mode].insn_code != CODE_FOR_nothing
981 && ashl_optab->handlers[(int) word_mode].insn_code != CODE_FOR_nothing
982 && lshr_optab->handlers[(int) word_mode].insn_code != CODE_FOR_nothing)
984 rtx insns, inter, equiv_value;
985 rtx into_target, outof_target;
986 rtx into_input, outof_input;
987 int shift_count, left_shift, outof_word;
989 /* If TARGET is the same as one of the operands, the REG_EQUAL note
990 won't be accurate, so use a new target. */
991 if (target == 0 || target == op0 || target == op1)
992 target = gen_reg_rtx (mode);
996 shift_count = INTVAL (op1);
998 /* OUTOF_* is the word we are shifting bits away from, and
999 INTO_* is the word that we are shifting bits towards, thus
1000 they differ depending on the direction of the shift and
1001 WORDS_BIG_ENDIAN. */
1003 left_shift = binoptab == ashl_optab;
1004 outof_word = left_shift ^ ! WORDS_BIG_ENDIAN;
1006 outof_target = operand_subword (target, outof_word, 1, mode);
1007 into_target = operand_subword (target, 1 - outof_word, 1, mode);
1009 outof_input = operand_subword_force (op0, outof_word, mode);
1010 into_input = operand_subword_force (op0, 1 - outof_word, mode);
1012 if (shift_count >= BITS_PER_WORD)
1014 inter = expand_binop (word_mode, binoptab,
1016 GEN_INT (shift_count - BITS_PER_WORD),
1017 into_target, unsignedp, next_methods);
1019 if (inter != 0 && inter != into_target)
1020 emit_move_insn (into_target, inter);
1022 /* For a signed right shift, we must fill the word we are shifting
1023 out of with copies of the sign bit. Otherwise it is zeroed. */
1024 if (inter != 0 && binoptab != ashr_optab)
1025 inter = CONST0_RTX (word_mode);
1026 else if (inter != 0)
1027 inter = expand_binop (word_mode, binoptab,
1029 GEN_INT (BITS_PER_WORD - 1),
1030 outof_target, unsignedp, next_methods);
1032 if (inter != 0 && inter != outof_target)
1033 emit_move_insn (outof_target, inter);
1038 optab reverse_unsigned_shift, unsigned_shift;
1040 /* For a shift of less then BITS_PER_WORD, to compute the carry,
1041 we must do a logical shift in the opposite direction of the
1044 reverse_unsigned_shift = (left_shift ? lshr_optab : ashl_optab);
1046 /* For a shift of less than BITS_PER_WORD, to compute the word
1047 shifted towards, we need to unsigned shift the orig value of
1050 unsigned_shift = (left_shift ? ashl_optab : lshr_optab);
1052 carries = expand_binop (word_mode, reverse_unsigned_shift,
1054 GEN_INT (BITS_PER_WORD - shift_count),
1055 0, unsignedp, next_methods);
1060 inter = expand_binop (word_mode, unsigned_shift, into_input,
1061 op1, 0, unsignedp, next_methods);
1064 inter = expand_binop (word_mode, ior_optab, carries, inter,
1065 into_target, unsignedp, next_methods);
1067 if (inter != 0 && inter != into_target)
1068 emit_move_insn (into_target, inter);
1071 inter = expand_binop (word_mode, binoptab, outof_input,
1072 op1, outof_target, unsignedp, next_methods);
1074 if (inter != 0 && inter != outof_target)
1075 emit_move_insn (outof_target, inter);
1078 insns = get_insns ();
1083 if (binoptab->code != UNKNOWN)
1084 equiv_value = gen_rtx_fmt_ee (binoptab->code, mode, op0, op1);
1088 emit_no_conflict_block (insns, target, op0, op1, equiv_value);
1093 /* Synthesize double word rotates from single word shifts. */
1094 if ((binoptab == rotl_optab || binoptab == rotr_optab)
1095 && class == MODE_INT
1096 && GET_CODE (op1) == CONST_INT
1097 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
1098 && ashl_optab->handlers[(int) word_mode].insn_code != CODE_FOR_nothing
1099 && lshr_optab->handlers[(int) word_mode].insn_code != CODE_FOR_nothing)
1101 rtx insns, equiv_value;
1102 rtx into_target, outof_target;
1103 rtx into_input, outof_input;
1105 int shift_count, left_shift, outof_word;
1107 /* If TARGET is the same as one of the operands, the REG_EQUAL note
1108 won't be accurate, so use a new target. */
1109 if (target == 0 || target == op0 || target == op1)
1110 target = gen_reg_rtx (mode);
1114 shift_count = INTVAL (op1);
1116 /* OUTOF_* is the word we are shifting bits away from, and
1117 INTO_* is the word that we are shifting bits towards, thus
1118 they differ depending on the direction of the shift and
1119 WORDS_BIG_ENDIAN. */
1121 left_shift = (binoptab == rotl_optab);
1122 outof_word = left_shift ^ ! WORDS_BIG_ENDIAN;
1124 outof_target = operand_subword (target, outof_word, 1, mode);
1125 into_target = operand_subword (target, 1 - outof_word, 1, mode);
1127 outof_input = operand_subword_force (op0, outof_word, mode);
1128 into_input = operand_subword_force (op0, 1 - outof_word, mode);
1130 if (shift_count == BITS_PER_WORD)
1132 /* This is just a word swap. */
1133 emit_move_insn (outof_target, into_input);
1134 emit_move_insn (into_target, outof_input);
1139 rtx into_temp1, into_temp2, outof_temp1, outof_temp2;
1140 rtx first_shift_count, second_shift_count;
1141 optab reverse_unsigned_shift, unsigned_shift;
1143 reverse_unsigned_shift = (left_shift ^ (shift_count < BITS_PER_WORD)
1144 ? lshr_optab : ashl_optab);
1146 unsigned_shift = (left_shift ^ (shift_count < BITS_PER_WORD)
1147 ? ashl_optab : lshr_optab);
1149 if (shift_count > BITS_PER_WORD)
1151 first_shift_count = GEN_INT (shift_count - BITS_PER_WORD);
1152 second_shift_count = GEN_INT (2 * BITS_PER_WORD - shift_count);
1156 first_shift_count = GEN_INT (BITS_PER_WORD - shift_count);
1157 second_shift_count = GEN_INT (shift_count);
1160 into_temp1 = expand_binop (word_mode, unsigned_shift,
1161 outof_input, first_shift_count,
1162 NULL_RTX, unsignedp, next_methods);
1163 into_temp2 = expand_binop (word_mode, reverse_unsigned_shift,
1164 into_input, second_shift_count,
1165 NULL_RTX, unsignedp, next_methods);
1167 if (into_temp1 != 0 && into_temp2 != 0)
1168 inter = expand_binop (word_mode, ior_optab, into_temp1, into_temp2,
1169 into_target, unsignedp, next_methods);
1173 if (inter != 0 && inter != into_target)
1174 emit_move_insn (into_target, inter);
1176 outof_temp1 = expand_binop (word_mode, unsigned_shift,
1177 into_input, first_shift_count,
1178 NULL_RTX, unsignedp, next_methods);
1179 outof_temp2 = expand_binop (word_mode, reverse_unsigned_shift,
1180 outof_input, second_shift_count,
1181 NULL_RTX, unsignedp, next_methods);
1183 if (inter != 0 && outof_temp1 != 0 && outof_temp2 != 0)
1184 inter = expand_binop (word_mode, ior_optab,
1185 outof_temp1, outof_temp2,
1186 outof_target, unsignedp, next_methods);
1188 if (inter != 0 && inter != outof_target)
1189 emit_move_insn (outof_target, inter);
1192 insns = get_insns ();
1197 if (binoptab->code != UNKNOWN)
1198 equiv_value = gen_rtx_fmt_ee (binoptab->code, mode, op0, op1);
1202 /* We can't make this a no conflict block if this is a word swap,
1203 because the word swap case fails if the input and output values
1204 are in the same register. */
1205 if (shift_count != BITS_PER_WORD)
1206 emit_no_conflict_block (insns, target, op0, op1, equiv_value);
1215 /* These can be done a word at a time by propagating carries. */
1216 if ((binoptab == add_optab || binoptab == sub_optab)
1217 && class == MODE_INT
1218 && GET_MODE_SIZE (mode) >= 2 * UNITS_PER_WORD
1219 && binoptab->handlers[(int) word_mode].insn_code != CODE_FOR_nothing)
1222 optab otheroptab = binoptab == add_optab ? sub_optab : add_optab;
1223 const unsigned int nwords = GET_MODE_BITSIZE (mode) / BITS_PER_WORD;
1224 rtx carry_in = NULL_RTX, carry_out = NULL_RTX;
1225 rtx xop0, xop1, xtarget;
1227 /* We can handle either a 1 or -1 value for the carry. If STORE_FLAG
1228 value is one of those, use it. Otherwise, use 1 since it is the
1229 one easiest to get. */
1230 #if STORE_FLAG_VALUE == 1 || STORE_FLAG_VALUE == -1
1231 int normalizep = STORE_FLAG_VALUE;
1236 /* Prepare the operands. */
1237 xop0 = force_reg (mode, op0);
1238 xop1 = force_reg (mode, op1);
1240 xtarget = gen_reg_rtx (mode);
1242 if (target == 0 || GET_CODE (target) != REG)
1245 /* Indicate for flow that the entire target reg is being set. */
1246 if (GET_CODE (target) == REG)
1247 emit_insn (gen_rtx_CLOBBER (VOIDmode, xtarget));
1249 /* Do the actual arithmetic. */
1250 for (i = 0; i < nwords; i++)
1252 int index = (WORDS_BIG_ENDIAN ? nwords - i - 1 : i);
1253 rtx target_piece = operand_subword (xtarget, index, 1, mode);
1254 rtx op0_piece = operand_subword_force (xop0, index, mode);
1255 rtx op1_piece = operand_subword_force (xop1, index, mode);
1258 /* Main add/subtract of the input operands. */
1259 x = expand_binop (word_mode, binoptab,
1260 op0_piece, op1_piece,
1261 target_piece, unsignedp, next_methods);
1267 /* Store carry from main add/subtract. */
1268 carry_out = gen_reg_rtx (word_mode);
1269 carry_out = emit_store_flag_force (carry_out,
1270 (binoptab == add_optab
1273 word_mode, 1, normalizep);
1280 /* Add/subtract previous carry to main result. */
1281 newx = expand_binop (word_mode,
1282 normalizep == 1 ? binoptab : otheroptab,
1284 NULL_RTX, 1, next_methods);
1288 /* Get out carry from adding/subtracting carry in. */
1289 rtx carry_tmp = gen_reg_rtx (word_mode);
1290 carry_tmp = emit_store_flag_force (carry_tmp,
1291 (binoptab == add_optab
1294 word_mode, 1, normalizep);
1296 /* Logical-ior the two poss. carry together. */
1297 carry_out = expand_binop (word_mode, ior_optab,
1298 carry_out, carry_tmp,
1299 carry_out, 0, next_methods);
1303 emit_move_insn (target_piece, newx);
1306 carry_in = carry_out;
1309 if (i == GET_MODE_BITSIZE (mode) / (unsigned) BITS_PER_WORD)
1311 if (mov_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing
1312 || ! rtx_equal_p (target, xtarget))
1314 rtx temp = emit_move_insn (target, xtarget);
1316 set_unique_reg_note (temp,
1318 gen_rtx_fmt_ee (binoptab->code, mode,
1329 delete_insns_since (last);
1332 /* If we want to multiply two two-word values and have normal and widening
1333 multiplies of single-word values, we can do this with three smaller
1334 multiplications. Note that we do not make a REG_NO_CONFLICT block here
1335 because we are not operating on one word at a time.
1337 The multiplication proceeds as follows:
1338 _______________________
1339 [__op0_high_|__op0_low__]
1340 _______________________
1341 * [__op1_high_|__op1_low__]
1342 _______________________________________________
1343 _______________________
1344 (1) [__op0_low__*__op1_low__]
1345 _______________________
1346 (2a) [__op0_low__*__op1_high_]
1347 _______________________
1348 (2b) [__op0_high_*__op1_low__]
1349 _______________________
1350 (3) [__op0_high_*__op1_high_]
1353 This gives a 4-word result. Since we are only interested in the
1354 lower 2 words, partial result (3) and the upper words of (2a) and
1355 (2b) don't need to be calculated. Hence (2a) and (2b) can be
1356 calculated using non-widening multiplication.
1358 (1), however, needs to be calculated with an unsigned widening
1359 multiplication. If this operation is not directly supported we
1360 try using a signed widening multiplication and adjust the result.
1361 This adjustment works as follows:
1363 If both operands are positive then no adjustment is needed.
1365 If the operands have different signs, for example op0_low < 0 and
1366 op1_low >= 0, the instruction treats the most significant bit of
1367 op0_low as a sign bit instead of a bit with significance
1368 2**(BITS_PER_WORD-1), i.e. the instruction multiplies op1_low
1369 with 2**BITS_PER_WORD - op0_low, and two's complements the
1370 result. Conclusion: We need to add op1_low * 2**BITS_PER_WORD to
1373 Similarly, if both operands are negative, we need to add
1374 (op0_low + op1_low) * 2**BITS_PER_WORD.
1376 We use a trick to adjust quickly. We logically shift op0_low right
1377 (op1_low) BITS_PER_WORD-1 steps to get 0 or 1, and add this to
1378 op0_high (op1_high) before it is used to calculate 2b (2a). If no
1379 logical shift exists, we do an arithmetic right shift and subtract
1382 if (binoptab == smul_optab
1383 && class == MODE_INT
1384 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
1385 && smul_optab->handlers[(int) word_mode].insn_code != CODE_FOR_nothing
1386 && add_optab->handlers[(int) word_mode].insn_code != CODE_FOR_nothing
1387 && ((umul_widen_optab->handlers[(int) mode].insn_code
1388 != CODE_FOR_nothing)
1389 || (smul_widen_optab->handlers[(int) mode].insn_code
1390 != CODE_FOR_nothing)))
1392 int low = (WORDS_BIG_ENDIAN ? 1 : 0);
1393 int high = (WORDS_BIG_ENDIAN ? 0 : 1);
1394 rtx op0_high = operand_subword_force (op0, high, mode);
1395 rtx op0_low = operand_subword_force (op0, low, mode);
1396 rtx op1_high = operand_subword_force (op1, high, mode);
1397 rtx op1_low = operand_subword_force (op1, low, mode);
1399 rtx op0_xhigh = NULL_RTX;
1400 rtx op1_xhigh = NULL_RTX;
1402 /* If the target is the same as one of the inputs, don't use it. This
1403 prevents problems with the REG_EQUAL note. */
1404 if (target == op0 || target == op1
1405 || (target != 0 && GET_CODE (target) != REG))
1408 /* Multiply the two lower words to get a double-word product.
1409 If unsigned widening multiplication is available, use that;
1410 otherwise use the signed form and compensate. */
1412 if (umul_widen_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
1414 product = expand_binop (mode, umul_widen_optab, op0_low, op1_low,
1415 target, 1, OPTAB_DIRECT);
1417 /* If we didn't succeed, delete everything we did so far. */
1419 delete_insns_since (last);
1421 op0_xhigh = op0_high, op1_xhigh = op1_high;
1425 && smul_widen_optab->handlers[(int) mode].insn_code
1426 != CODE_FOR_nothing)
1428 rtx wordm1 = GEN_INT (BITS_PER_WORD - 1);
1429 product = expand_binop (mode, smul_widen_optab, op0_low, op1_low,
1430 target, 1, OPTAB_DIRECT);
1431 op0_xhigh = expand_binop (word_mode, lshr_optab, op0_low, wordm1,
1432 NULL_RTX, 1, next_methods);
1434 op0_xhigh = expand_binop (word_mode, add_optab, op0_high,
1435 op0_xhigh, op0_xhigh, 0, next_methods);
1438 op0_xhigh = expand_binop (word_mode, ashr_optab, op0_low, wordm1,
1439 NULL_RTX, 0, next_methods);
1441 op0_xhigh = expand_binop (word_mode, sub_optab, op0_high,
1442 op0_xhigh, op0_xhigh, 0,
1446 op1_xhigh = expand_binop (word_mode, lshr_optab, op1_low, wordm1,
1447 NULL_RTX, 1, next_methods);
1449 op1_xhigh = expand_binop (word_mode, add_optab, op1_high,
1450 op1_xhigh, op1_xhigh, 0, next_methods);
1453 op1_xhigh = expand_binop (word_mode, ashr_optab, op1_low, wordm1,
1454 NULL_RTX, 0, next_methods);
1456 op1_xhigh = expand_binop (word_mode, sub_optab, op1_high,
1457 op1_xhigh, op1_xhigh, 0,
1462 /* If we have been able to directly compute the product of the
1463 low-order words of the operands and perform any required adjustments
1464 of the operands, we proceed by trying two more multiplications
1465 and then computing the appropriate sum.
1467 We have checked above that the required addition is provided.
1468 Full-word addition will normally always succeed, especially if
1469 it is provided at all, so we don't worry about its failure. The
1470 multiplication may well fail, however, so we do handle that. */
1472 if (product && op0_xhigh && op1_xhigh)
1474 rtx product_high = operand_subword (product, high, 1, mode);
1475 rtx temp = expand_binop (word_mode, binoptab, op0_low, op1_xhigh,
1476 NULL_RTX, 0, OPTAB_DIRECT);
1478 if (!REG_P (product_high))
1479 product_high = force_reg (word_mode, product_high);
1482 temp = expand_binop (word_mode, add_optab, temp, product_high,
1483 product_high, 0, next_methods);
1485 if (temp != 0 && temp != product_high)
1486 emit_move_insn (product_high, temp);
1489 temp = expand_binop (word_mode, binoptab, op1_low, op0_xhigh,
1490 NULL_RTX, 0, OPTAB_DIRECT);
1493 temp = expand_binop (word_mode, add_optab, temp,
1494 product_high, product_high,
1497 if (temp != 0 && temp != product_high)
1498 emit_move_insn (product_high, temp);
1500 emit_move_insn (operand_subword (product, high, 1, mode), product_high);
1504 if (mov_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
1506 temp = emit_move_insn (product, product);
1507 set_unique_reg_note (temp,
1509 gen_rtx_fmt_ee (MULT, mode,
1518 /* If we get here, we couldn't do it for some reason even though we
1519 originally thought we could. Delete anything we've emitted in
1522 delete_insns_since (last);
1525 /* Open-code the vector operations if we have no hardware support
1527 if (class == MODE_VECTOR_INT || class == MODE_VECTOR_FLOAT)
1528 return expand_vector_binop (mode, binoptab, op0, op1, target,
1529 unsignedp, methods);
1531 /* We need to open-code the complex type operations: '+, -, * and /' */
1533 /* At this point we allow operations between two similar complex
1534 numbers, and also if one of the operands is not a complex number
1535 but rather of MODE_FLOAT or MODE_INT. However, the caller
1536 must make sure that the MODE of the non-complex operand matches
1537 the SUBMODE of the complex operand. */
1539 if (class == MODE_COMPLEX_FLOAT || class == MODE_COMPLEX_INT)
1541 rtx real0 = 0, imag0 = 0;
1542 rtx real1 = 0, imag1 = 0;
1543 rtx realr, imagr, res;
1548 /* Find the correct mode for the real and imaginary parts */
1549 enum machine_mode submode = GET_MODE_INNER(mode);
1551 if (submode == BLKmode)
1555 target = gen_reg_rtx (mode);
1559 realr = gen_realpart (submode, target);
1560 imagr = gen_imagpart (submode, target);
1562 if (GET_MODE (op0) == mode)
1564 real0 = gen_realpart (submode, op0);
1565 imag0 = gen_imagpart (submode, op0);
1570 if (GET_MODE (op1) == mode)
1572 real1 = gen_realpart (submode, op1);
1573 imag1 = gen_imagpart (submode, op1);
1578 if (real0 == 0 || real1 == 0 || ! (imag0 != 0 || imag1 != 0))
1581 switch (binoptab->code)
1584 /* (a+ib) + (c+id) = (a+c) + i(b+d) */
1586 /* (a+ib) - (c+id) = (a-c) + i(b-d) */
1587 res = expand_binop (submode, binoptab, real0, real1,
1588 realr, unsignedp, methods);
1592 else if (res != realr)
1593 emit_move_insn (realr, res);
1595 if (imag0 != 0 && imag1 != 0)
1596 res = expand_binop (submode, binoptab, imag0, imag1,
1597 imagr, unsignedp, methods);
1598 else if (imag0 != 0)
1600 else if (binoptab->code == MINUS)
1601 res = expand_unop (submode,
1602 binoptab == subv_optab ? negv_optab : neg_optab,
1603 imag1, imagr, unsignedp);
1609 else if (res != imagr)
1610 emit_move_insn (imagr, res);
1616 /* (a+ib) * (c+id) = (ac-bd) + i(ad+cb) */
1618 if (imag0 != 0 && imag1 != 0)
1622 /* Don't fetch these from memory more than once. */
1623 real0 = force_reg (submode, real0);
1624 real1 = force_reg (submode, real1);
1625 imag0 = force_reg (submode, imag0);
1626 imag1 = force_reg (submode, imag1);
1628 temp1 = expand_binop (submode, binoptab, real0, real1, NULL_RTX,
1629 unsignedp, methods);
1631 temp2 = expand_binop (submode, binoptab, imag0, imag1, NULL_RTX,
1632 unsignedp, methods);
1634 if (temp1 == 0 || temp2 == 0)
1639 binoptab == smulv_optab ? subv_optab : sub_optab,
1640 temp1, temp2, realr, unsignedp, methods));
1644 else if (res != realr)
1645 emit_move_insn (realr, res);
1647 temp1 = expand_binop (submode, binoptab, real0, imag1,
1648 NULL_RTX, unsignedp, methods);
1650 temp2 = expand_binop (submode, binoptab, real1, imag0,
1651 NULL_RTX, unsignedp, methods);
1653 if (temp1 == 0 || temp2 == 0)
1658 binoptab == smulv_optab ? addv_optab : add_optab,
1659 temp1, temp2, imagr, unsignedp, methods));
1663 else if (res != imagr)
1664 emit_move_insn (imagr, res);
1670 /* Don't fetch these from memory more than once. */
1671 real0 = force_reg (submode, real0);
1672 real1 = force_reg (submode, real1);
1674 res = expand_binop (submode, binoptab, real0, real1,
1675 realr, unsignedp, methods);
1678 else if (res != realr)
1679 emit_move_insn (realr, res);
1682 res = expand_binop (submode, binoptab,
1683 real1, imag0, imagr, unsignedp, methods);
1685 res = expand_binop (submode, binoptab,
1686 real0, imag1, imagr, unsignedp, methods);
1690 else if (res != imagr)
1691 emit_move_insn (imagr, res);
1698 /* (a+ib) / (c+id) = ((ac+bd)/(cc+dd)) + i((bc-ad)/(cc+dd)) */
1702 /* (a+ib) / (c+i0) = (a/c) + i(b/c) */
1704 /* Don't fetch these from memory more than once. */
1705 real1 = force_reg (submode, real1);
1707 /* Simply divide the real and imaginary parts by `c' */
1708 if (class == MODE_COMPLEX_FLOAT)
1709 res = expand_binop (submode, binoptab, real0, real1,
1710 realr, unsignedp, methods);
1712 res = expand_divmod (0, TRUNC_DIV_EXPR, submode,
1713 real0, real1, realr, unsignedp);
1717 else if (res != realr)
1718 emit_move_insn (realr, res);
1720 if (class == MODE_COMPLEX_FLOAT)
1721 res = expand_binop (submode, binoptab, imag0, real1,
1722 imagr, unsignedp, methods);
1724 res = expand_divmod (0, TRUNC_DIV_EXPR, submode,
1725 imag0, real1, imagr, unsignedp);
1729 else if (res != imagr)
1730 emit_move_insn (imagr, res);
1736 switch (flag_complex_divide_method)
1739 ok = expand_cmplxdiv_straight (real0, real1, imag0, imag1,
1740 realr, imagr, submode,
1746 ok = expand_cmplxdiv_wide (real0, real1, imag0, imag1,
1747 realr, imagr, submode,
1767 if (binoptab->code != UNKNOWN)
1769 = gen_rtx_fmt_ee (binoptab->code, mode,
1770 copy_rtx (op0), copy_rtx (op1));
1774 emit_no_conflict_block (seq, target, op0, op1, equiv_value);
1780 /* It can't be open-coded in this mode.
1781 Use a library call if one is available and caller says that's ok. */
1783 if (binoptab->handlers[(int) mode].libfunc
1784 && (methods == OPTAB_LIB || methods == OPTAB_LIB_WIDEN))
1788 enum machine_mode op1_mode = mode;
1795 op1_mode = word_mode;
1796 /* Specify unsigned here,
1797 since negative shift counts are meaningless. */
1798 op1x = convert_to_mode (word_mode, op1, 1);
1801 if (GET_MODE (op0) != VOIDmode
1802 && GET_MODE (op0) != mode)
1803 op0 = convert_to_mode (mode, op0, unsignedp);
1805 /* Pass 1 for NO_QUEUE so we don't lose any increments
1806 if the libcall is cse'd or moved. */
1807 value = emit_library_call_value (binoptab->handlers[(int) mode].libfunc,
1808 NULL_RTX, LCT_CONST, mode, 2,
1809 op0, mode, op1x, op1_mode);
1811 insns = get_insns ();
1814 target = gen_reg_rtx (mode);
1815 emit_libcall_block (insns, target, value,
1816 gen_rtx_fmt_ee (binoptab->code, mode, op0, op1));
1821 delete_insns_since (last);
1823 /* It can't be done in this mode. Can we do it in a wider mode? */
1825 if (! (methods == OPTAB_WIDEN || methods == OPTAB_LIB_WIDEN
1826 || methods == OPTAB_MUST_WIDEN))
1828 /* Caller says, don't even try. */
1829 delete_insns_since (entry_last);
1833 /* Compute the value of METHODS to pass to recursive calls.
1834 Don't allow widening to be tried recursively. */
1836 methods = (methods == OPTAB_LIB_WIDEN ? OPTAB_LIB : OPTAB_DIRECT);
1838 /* Look for a wider mode of the same class for which it appears we can do
1841 if (class == MODE_INT || class == MODE_FLOAT || class == MODE_COMPLEX_FLOAT)
1843 for (wider_mode = GET_MODE_WIDER_MODE (mode); wider_mode != VOIDmode;
1844 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
1846 if ((binoptab->handlers[(int) wider_mode].insn_code
1847 != CODE_FOR_nothing)
1848 || (methods == OPTAB_LIB
1849 && binoptab->handlers[(int) wider_mode].libfunc))
1851 rtx xop0 = op0, xop1 = op1;
1854 /* For certain integer operations, we need not actually extend
1855 the narrow operands, as long as we will truncate
1856 the results to the same narrowness. */
1858 if ((binoptab == ior_optab || binoptab == and_optab
1859 || binoptab == xor_optab
1860 || binoptab == add_optab || binoptab == sub_optab
1861 || binoptab == smul_optab || binoptab == ashl_optab)
1862 && class == MODE_INT)
1865 xop0 = widen_operand (xop0, wider_mode, mode,
1866 unsignedp, no_extend);
1868 /* The second operand of a shift must always be extended. */
1869 xop1 = widen_operand (xop1, wider_mode, mode, unsignedp,
1870 no_extend && binoptab != ashl_optab);
1872 temp = expand_binop (wider_mode, binoptab, xop0, xop1, NULL_RTX,
1873 unsignedp, methods);
1876 if (class != MODE_INT)
1879 target = gen_reg_rtx (mode);
1880 convert_move (target, temp, 0);
1884 return gen_lowpart (mode, temp);
1887 delete_insns_since (last);
1892 delete_insns_since (entry_last);
1896 /* Like expand_binop, but for open-coding vectors binops. */
1899 expand_vector_binop (mode, binoptab, op0, op1, target, unsignedp, methods)
1900 enum machine_mode mode;
1905 enum optab_methods methods;
1907 enum machine_mode submode, tmode;
1908 int size, elts, subsize, subbitsize, i;
1909 rtx t, a, b, res, seq;
1910 enum mode_class class;
1912 class = GET_MODE_CLASS (mode);
1914 size = GET_MODE_SIZE (mode);
1915 submode = GET_MODE_INNER (mode);
1917 /* Search for the widest vector mode with the same inner mode that is
1918 still narrower than MODE and that allows to open-code this operator.
1919 Note, if we find such a mode and the handler later decides it can't
1920 do the expansion, we'll be called recursively with the narrower mode. */
1921 for (tmode = GET_CLASS_NARROWEST_MODE (class);
1922 GET_MODE_SIZE (tmode) < GET_MODE_SIZE (mode);
1923 tmode = GET_MODE_WIDER_MODE (tmode))
1925 if (GET_MODE_INNER (tmode) == GET_MODE_INNER (mode)
1926 && binoptab->handlers[(int) tmode].insn_code != CODE_FOR_nothing)
1930 switch (binoptab->code)
1935 tmode = int_mode_for_mode (mode);
1936 if (tmode != BLKmode)
1942 subsize = GET_MODE_SIZE (submode);
1943 subbitsize = GET_MODE_BITSIZE (submode);
1944 elts = size / subsize;
1946 /* If METHODS is OPTAB_DIRECT, we don't insist on the exact mode,
1947 but that we operate on more than one element at a time. */
1948 if (subsize == GET_MODE_UNIT_SIZE (mode) && methods == OPTAB_DIRECT)
1953 /* Errors can leave us with a const0_rtx as operand. */
1954 if (GET_MODE (op0) != mode)
1955 op0 = copy_to_mode_reg (mode, op0);
1956 if (GET_MODE (op1) != mode)
1957 op1 = copy_to_mode_reg (mode, op1);
1960 target = gen_reg_rtx (mode);
1962 for (i = 0; i < elts; ++i)
1964 /* If this is part of a register, and not the first item in the
1965 word, we can't store using a SUBREG - that would clobber
1967 And storing with a SUBREG is only possible for the least
1968 significant part, hence we can't do it for big endian
1969 (unless we want to permute the evaluation order. */
1970 if (GET_CODE (target) == REG
1971 && (BYTES_BIG_ENDIAN
1972 ? subsize < UNITS_PER_WORD
1973 : ((i * subsize) % UNITS_PER_WORD) != 0))
1976 t = simplify_gen_subreg (submode, target, mode, i * subsize);
1977 if (CONSTANT_P (op0))
1978 a = simplify_gen_subreg (submode, op0, mode, i * subsize);
1980 a = extract_bit_field (op0, subbitsize, i * subbitsize, unsignedp,
1981 NULL_RTX, submode, submode, size);
1982 if (CONSTANT_P (op1))
1983 b = simplify_gen_subreg (submode, op1, mode, i * subsize);
1985 b = extract_bit_field (op1, subbitsize, i * subbitsize, unsignedp,
1986 NULL_RTX, submode, submode, size);
1988 if (binoptab->code == DIV)
1990 if (class == MODE_VECTOR_FLOAT)
1991 res = expand_binop (submode, binoptab, a, b, t,
1992 unsignedp, methods);
1994 res = expand_divmod (0, TRUNC_DIV_EXPR, submode,
1995 a, b, t, unsignedp);
1998 res = expand_binop (submode, binoptab, a, b, t,
1999 unsignedp, methods);
2005 emit_move_insn (t, res);
2007 store_bit_field (target, subbitsize, i * subbitsize, submode, res,
2023 /* Like expand_unop but for open-coding vector unops. */
2026 expand_vector_unop (mode, unoptab, op0, target, unsignedp)
2027 enum machine_mode mode;
2033 enum machine_mode submode, tmode;
2034 int size, elts, subsize, subbitsize, i;
2037 size = GET_MODE_SIZE (mode);
2038 submode = GET_MODE_INNER (mode);
2040 /* Search for the widest vector mode with the same inner mode that is
2041 still narrower than MODE and that allows to open-code this operator.
2042 Note, if we find such a mode and the handler later decides it can't
2043 do the expansion, we'll be called recursively with the narrower mode. */
2044 for (tmode = GET_CLASS_NARROWEST_MODE (GET_MODE_CLASS (mode));
2045 GET_MODE_SIZE (tmode) < GET_MODE_SIZE (mode);
2046 tmode = GET_MODE_WIDER_MODE (tmode))
2048 if (GET_MODE_INNER (tmode) == GET_MODE_INNER (mode)
2049 && unoptab->handlers[(int) tmode].insn_code != CODE_FOR_nothing)
2052 /* If there is no negate operation, try doing a subtract from zero. */
2053 if (unoptab == neg_optab && GET_MODE_CLASS (submode) == MODE_INT
2054 /* Avoid infinite recursion when an
2055 error has left us with the wrong mode. */
2056 && GET_MODE (op0) == mode)
2059 temp = expand_binop (mode, sub_optab, CONST0_RTX (mode), op0,
2060 target, unsignedp, OPTAB_DIRECT);
2065 if (unoptab == one_cmpl_optab)
2067 tmode = int_mode_for_mode (mode);
2068 if (tmode != BLKmode)
2072 subsize = GET_MODE_SIZE (submode);
2073 subbitsize = GET_MODE_BITSIZE (submode);
2074 elts = size / subsize;
2076 /* Errors can leave us with a const0_rtx as operand. */
2077 if (GET_MODE (op0) != mode)
2078 op0 = copy_to_mode_reg (mode, op0);
2081 target = gen_reg_rtx (mode);
2085 for (i = 0; i < elts; ++i)
2087 /* If this is part of a register, and not the first item in the
2088 word, we can't store using a SUBREG - that would clobber
2090 And storing with a SUBREG is only possible for the least
2091 significant part, hence we can't do it for big endian
2092 (unless we want to permute the evaluation order. */
2093 if (GET_CODE (target) == REG
2094 && (BYTES_BIG_ENDIAN
2095 ? subsize < UNITS_PER_WORD
2096 : ((i * subsize) % UNITS_PER_WORD) != 0))
2099 t = simplify_gen_subreg (submode, target, mode, i * subsize);
2100 if (CONSTANT_P (op0))
2101 a = simplify_gen_subreg (submode, op0, mode, i * subsize);
2103 a = extract_bit_field (op0, subbitsize, i * subbitsize, unsignedp,
2104 t, submode, submode, size);
2106 res = expand_unop (submode, unoptab, a, t, unsignedp);
2109 emit_move_insn (t, res);
2111 store_bit_field (target, subbitsize, i * subbitsize, submode, res,
2122 /* Expand a binary operator which has both signed and unsigned forms.
2123 UOPTAB is the optab for unsigned operations, and SOPTAB is for
2126 If we widen unsigned operands, we may use a signed wider operation instead
2127 of an unsigned wider operation, since the result would be the same. */
2130 sign_expand_binop (mode, uoptab, soptab, op0, op1, target, unsignedp, methods)
2131 enum machine_mode mode;
2132 optab uoptab, soptab;
2133 rtx op0, op1, target;
2135 enum optab_methods methods;
2138 optab direct_optab = unsignedp ? uoptab : soptab;
2139 struct optab wide_soptab;
2141 /* Do it without widening, if possible. */
2142 temp = expand_binop (mode, direct_optab, op0, op1, target,
2143 unsignedp, OPTAB_DIRECT);
2144 if (temp || methods == OPTAB_DIRECT)
2147 /* Try widening to a signed int. Make a fake signed optab that
2148 hides any signed insn for direct use. */
2149 wide_soptab = *soptab;
2150 wide_soptab.handlers[(int) mode].insn_code = CODE_FOR_nothing;
2151 wide_soptab.handlers[(int) mode].libfunc = 0;
2153 temp = expand_binop (mode, &wide_soptab, op0, op1, target,
2154 unsignedp, OPTAB_WIDEN);
2156 /* For unsigned operands, try widening to an unsigned int. */
2157 if (temp == 0 && unsignedp)
2158 temp = expand_binop (mode, uoptab, op0, op1, target,
2159 unsignedp, OPTAB_WIDEN);
2160 if (temp || methods == OPTAB_WIDEN)
2163 /* Use the right width lib call if that exists. */
2164 temp = expand_binop (mode, direct_optab, op0, op1, target, unsignedp, OPTAB_LIB);
2165 if (temp || methods == OPTAB_LIB)
2168 /* Must widen and use a lib call, use either signed or unsigned. */
2169 temp = expand_binop (mode, &wide_soptab, op0, op1, target,
2170 unsignedp, methods);
2174 return expand_binop (mode, uoptab, op0, op1, target,
2175 unsignedp, methods);
2179 /* Generate code to perform an operation specified by BINOPTAB
2180 on operands OP0 and OP1, with two results to TARG1 and TARG2.
2181 We assume that the order of the operands for the instruction
2182 is TARG0, OP0, OP1, TARG1, which would fit a pattern like
2183 [(set TARG0 (operate OP0 OP1)) (set TARG1 (operate ...))].
2185 Either TARG0 or TARG1 may be zero, but what that means is that
2186 the result is not actually wanted. We will generate it into
2187 a dummy pseudo-reg and discard it. They may not both be zero.
2189 Returns 1 if this operation can be performed; 0 if not. */
2192 expand_twoval_binop (binoptab, op0, op1, targ0, targ1, unsignedp)
2198 enum machine_mode mode = GET_MODE (targ0 ? targ0 : targ1);
2199 enum mode_class class;
2200 enum machine_mode wider_mode;
2201 rtx entry_last = get_last_insn ();
2204 class = GET_MODE_CLASS (mode);
2206 op0 = protect_from_queue (op0, 0);
2207 op1 = protect_from_queue (op1, 0);
2211 op0 = force_not_mem (op0);
2212 op1 = force_not_mem (op1);
2215 /* If we are inside an appropriately-short loop and one operand is an
2216 expensive constant, force it into a register. */
2217 if (CONSTANT_P (op0) && preserve_subexpressions_p ()
2218 && rtx_cost (op0, binoptab->code) > COSTS_N_INSNS (1))
2219 op0 = force_reg (mode, op0);
2221 if (CONSTANT_P (op1) && preserve_subexpressions_p ()
2222 && rtx_cost (op1, binoptab->code) > COSTS_N_INSNS (1))
2223 op1 = force_reg (mode, op1);
2226 targ0 = protect_from_queue (targ0, 1);
2228 targ0 = gen_reg_rtx (mode);
2230 targ1 = protect_from_queue (targ1, 1);
2232 targ1 = gen_reg_rtx (mode);
2234 /* Record where to go back to if we fail. */
2235 last = get_last_insn ();
2237 if (binoptab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
2239 int icode = (int) binoptab->handlers[(int) mode].insn_code;
2240 enum machine_mode mode0 = insn_data[icode].operand[1].mode;
2241 enum machine_mode mode1 = insn_data[icode].operand[2].mode;
2243 rtx xop0 = op0, xop1 = op1;
2245 /* In case the insn wants input operands in modes different from
2246 those of the actual operands, convert the operands. It would
2247 seem that we don't need to convert CONST_INTs, but we do, so
2248 that they're properly zero-extended, sign-extended or truncated
2251 if (GET_MODE (op0) != mode0 && mode0 != VOIDmode)
2252 xop0 = convert_modes (mode0,
2253 GET_MODE (op0) != VOIDmode
2258 if (GET_MODE (op1) != mode1 && mode1 != VOIDmode)
2259 xop1 = convert_modes (mode1,
2260 GET_MODE (op1) != VOIDmode
2265 /* Now, if insn doesn't accept these operands, put them into pseudos. */
2266 if (! (*insn_data[icode].operand[1].predicate) (xop0, mode0))
2267 xop0 = copy_to_mode_reg (mode0, xop0);
2269 if (! (*insn_data[icode].operand[2].predicate) (xop1, mode1))
2270 xop1 = copy_to_mode_reg (mode1, xop1);
2272 /* We could handle this, but we should always be called with a pseudo
2273 for our targets and all insns should take them as outputs. */
2274 if (! (*insn_data[icode].operand[0].predicate) (targ0, mode)
2275 || ! (*insn_data[icode].operand[3].predicate) (targ1, mode))
2278 pat = GEN_FCN (icode) (targ0, xop0, xop1, targ1);
2285 delete_insns_since (last);
2288 /* It can't be done in this mode. Can we do it in a wider mode? */
2290 if (class == MODE_INT || class == MODE_FLOAT || class == MODE_COMPLEX_FLOAT)
2292 for (wider_mode = GET_MODE_WIDER_MODE (mode); wider_mode != VOIDmode;
2293 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
2295 if (binoptab->handlers[(int) wider_mode].insn_code
2296 != CODE_FOR_nothing)
2298 rtx t0 = gen_reg_rtx (wider_mode);
2299 rtx t1 = gen_reg_rtx (wider_mode);
2300 rtx cop0 = convert_modes (wider_mode, mode, op0, unsignedp);
2301 rtx cop1 = convert_modes (wider_mode, mode, op1, unsignedp);
2303 if (expand_twoval_binop (binoptab, cop0, cop1,
2306 convert_move (targ0, t0, unsignedp);
2307 convert_move (targ1, t1, unsignedp);
2311 delete_insns_since (last);
2316 delete_insns_since (entry_last);
2320 /* Wrapper around expand_unop which takes an rtx code to specify
2321 the operation to perform, not an optab pointer. All other
2322 arguments are the same. */
2324 expand_simple_unop (mode, code, op0, target, unsignedp)
2325 enum machine_mode mode;
2331 optab unop = code_to_optab[(int) code];
2335 return expand_unop (mode, unop, op0, target, unsignedp);
2341 (clz:wide (zero_extend:wide x)) - ((width wide) - (width narrow)). */
2343 widen_clz (mode, op0, target)
2344 enum machine_mode mode;
2348 enum mode_class class = GET_MODE_CLASS (mode);
2349 if (class == MODE_INT || class == MODE_FLOAT || class == MODE_COMPLEX_FLOAT)
2351 enum machine_mode wider_mode;
2352 for (wider_mode = GET_MODE_WIDER_MODE (mode); wider_mode != VOIDmode;
2353 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
2355 if (clz_optab->handlers[(int) wider_mode].insn_code
2356 != CODE_FOR_nothing)
2358 rtx xop0, temp, last;
2360 last = get_last_insn ();
2363 target = gen_reg_rtx (mode);
2364 xop0 = widen_operand (op0, wider_mode, mode, true, false);
2365 temp = expand_unop (wider_mode, clz_optab, xop0, NULL_RTX, true);
2367 temp = expand_binop (wider_mode, sub_optab, temp,
2368 GEN_INT (GET_MODE_BITSIZE (wider_mode)
2369 - GET_MODE_BITSIZE (mode)),
2370 target, true, OPTAB_DIRECT);
2372 delete_insns_since (last);
2381 /* Try calculating (parity x) as (and (popcount x) 1), where
2382 popcount can also be done in a wider mode. */
2384 expand_parity (mode, op0, target)
2385 enum machine_mode mode;
2389 enum mode_class class = GET_MODE_CLASS (mode);
2390 if (class == MODE_INT || class == MODE_FLOAT || class == MODE_COMPLEX_FLOAT)
2392 enum machine_mode wider_mode;
2393 for (wider_mode = mode; wider_mode != VOIDmode;
2394 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
2396 if (popcount_optab->handlers[(int) wider_mode].insn_code
2397 != CODE_FOR_nothing)
2399 rtx xop0, temp, last;
2401 last = get_last_insn ();
2404 target = gen_reg_rtx (mode);
2405 xop0 = widen_operand (op0, wider_mode, mode, true, false);
2406 temp = expand_unop (wider_mode, popcount_optab, xop0, NULL_RTX,
2409 temp = expand_binop (wider_mode, and_optab, temp, GEN_INT (1),
2410 target, true, OPTAB_DIRECT);
2412 delete_insns_since (last);
2421 /* Generate code to perform an operation specified by UNOPTAB
2422 on operand OP0, with result having machine-mode MODE.
2424 UNSIGNEDP is for the case where we have to widen the operands
2425 to perform the operation. It says to use zero-extension.
2427 If TARGET is nonzero, the value
2428 is generated there, if it is convenient to do so.
2429 In all cases an rtx is returned for the locus of the value;
2430 this may or may not be TARGET. */
2433 expand_unop (mode, unoptab, op0, target, unsignedp)
2434 enum machine_mode mode;
2440 enum mode_class class;
2441 enum machine_mode wider_mode;
2443 rtx last = get_last_insn ();
2446 class = GET_MODE_CLASS (mode);
2448 op0 = protect_from_queue (op0, 0);
2452 op0 = force_not_mem (op0);
2456 target = protect_from_queue (target, 1);
2458 if (unoptab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
2460 int icode = (int) unoptab->handlers[(int) mode].insn_code;
2461 enum machine_mode mode0 = insn_data[icode].operand[1].mode;
2467 temp = gen_reg_rtx (mode);
2469 if (GET_MODE (xop0) != VOIDmode
2470 && GET_MODE (xop0) != mode0)
2471 xop0 = convert_to_mode (mode0, xop0, unsignedp);
2473 /* Now, if insn doesn't accept our operand, put it into a pseudo. */
2475 if (! (*insn_data[icode].operand[1].predicate) (xop0, mode0))
2476 xop0 = copy_to_mode_reg (mode0, xop0);
2478 if (! (*insn_data[icode].operand[0].predicate) (temp, mode))
2479 temp = gen_reg_rtx (mode);
2481 pat = GEN_FCN (icode) (temp, xop0);
2484 if (INSN_P (pat) && NEXT_INSN (pat) != NULL_RTX
2485 && ! add_equal_note (pat, temp, unoptab->code, xop0, NULL_RTX))
2487 delete_insns_since (last);
2488 return expand_unop (mode, unoptab, op0, NULL_RTX, unsignedp);
2496 delete_insns_since (last);
2499 /* It can't be done in this mode. Can we open-code it in a wider mode? */
2501 /* Widening clz needs special treatment. */
2502 if (unoptab == clz_optab)
2504 temp = widen_clz (mode, op0, target);
2511 if (class == MODE_INT || class == MODE_FLOAT || class == MODE_COMPLEX_FLOAT)
2512 for (wider_mode = GET_MODE_WIDER_MODE (mode); wider_mode != VOIDmode;
2513 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
2515 if (unoptab->handlers[(int) wider_mode].insn_code != CODE_FOR_nothing)
2519 /* For certain operations, we need not actually extend
2520 the narrow operand, as long as we will truncate the
2521 results to the same narrowness. */
2523 xop0 = widen_operand (xop0, wider_mode, mode, unsignedp,
2524 (unoptab == neg_optab
2525 || unoptab == one_cmpl_optab)
2526 && class == MODE_INT);
2528 temp = expand_unop (wider_mode, unoptab, xop0, NULL_RTX,
2533 if (class != MODE_INT)
2536 target = gen_reg_rtx (mode);
2537 convert_move (target, temp, 0);
2541 return gen_lowpart (mode, temp);
2544 delete_insns_since (last);
2548 /* These can be done a word at a time. */
2549 if (unoptab == one_cmpl_optab
2550 && class == MODE_INT
2551 && GET_MODE_SIZE (mode) > UNITS_PER_WORD
2552 && unoptab->handlers[(int) word_mode].insn_code != CODE_FOR_nothing)
2557 if (target == 0 || target == op0)
2558 target = gen_reg_rtx (mode);
2562 /* Do the actual arithmetic. */
2563 for (i = 0; i < GET_MODE_BITSIZE (mode) / BITS_PER_WORD; i++)
2565 rtx target_piece = operand_subword (target, i, 1, mode);
2566 rtx x = expand_unop (word_mode, unoptab,
2567 operand_subword_force (op0, i, mode),
2568 target_piece, unsignedp);
2570 if (target_piece != x)
2571 emit_move_insn (target_piece, x);
2574 insns = get_insns ();
2577 emit_no_conflict_block (insns, target, op0, NULL_RTX,
2578 gen_rtx_fmt_e (unoptab->code, mode,
2583 /* Open-code the complex negation operation. */
2584 else if (unoptab->code == NEG
2585 && (class == MODE_COMPLEX_FLOAT || class == MODE_COMPLEX_INT))
2591 /* Find the correct mode for the real and imaginary parts */
2592 enum machine_mode submode = GET_MODE_INNER (mode);
2594 if (submode == BLKmode)
2598 target = gen_reg_rtx (mode);
2602 target_piece = gen_imagpart (submode, target);
2603 x = expand_unop (submode, unoptab,
2604 gen_imagpart (submode, op0),
2605 target_piece, unsignedp);
2606 if (target_piece != x)
2607 emit_move_insn (target_piece, x);
2609 target_piece = gen_realpart (submode, target);
2610 x = expand_unop (submode, unoptab,
2611 gen_realpart (submode, op0),
2612 target_piece, unsignedp);
2613 if (target_piece != x)
2614 emit_move_insn (target_piece, x);
2619 emit_no_conflict_block (seq, target, op0, 0,
2620 gen_rtx_fmt_e (unoptab->code, mode,
2625 /* Try negating floating point values by flipping the sign bit. */
2626 if (unoptab->code == NEG && class == MODE_FLOAT
2627 && GET_MODE_BITSIZE (mode) <= 2 * HOST_BITS_PER_WIDE_INT)
2629 const struct real_format *fmt = real_format_for_mode[mode - QFmode];
2630 enum machine_mode imode = int_mode_for_mode (mode);
2631 int bitpos = (fmt != 0) ? fmt->signbit : -1;
2633 if (imode != BLKmode && bitpos >= 0 && fmt->has_signed_zero)
2635 HOST_WIDE_INT hi, lo;
2636 rtx last = get_last_insn ();
2638 /* Handle targets with different FP word orders. */
2639 if (FLOAT_WORDS_BIG_ENDIAN != WORDS_BIG_ENDIAN)
2641 int nwords = GET_MODE_BITSIZE (mode) / BITS_PER_WORD;
2642 int word = nwords - (bitpos / BITS_PER_WORD) - 1;
2643 bitpos = word * BITS_PER_WORD + bitpos % BITS_PER_WORD;
2646 if (bitpos < HOST_BITS_PER_WIDE_INT)
2649 lo = (HOST_WIDE_INT) 1 << bitpos;
2653 hi = (HOST_WIDE_INT) 1 << (bitpos - HOST_BITS_PER_WIDE_INT);
2656 temp = expand_binop (imode, xor_optab,
2657 gen_lowpart (imode, op0),
2658 immed_double_const (lo, hi, imode),
2659 NULL_RTX, 1, OPTAB_LIB_WIDEN);
2661 return gen_lowpart (mode, temp);
2662 delete_insns_since (last);
2666 /* Try calculating parity (x) as popcount (x) % 2. */
2667 if (unoptab == parity_optab)
2669 temp = expand_parity (mode, op0, target);
2675 /* Now try a library call in this mode. */
2676 if (unoptab->handlers[(int) mode].libfunc)
2680 enum machine_mode outmode = mode;
2682 /* All of these functions return small values. Thus we choose to
2683 have them return something that isn't a double-word. */
2684 if (unoptab == ffs_optab || unoptab == clz_optab || unoptab == ctz_optab
2685 || unoptab == popcount_optab || unoptab == parity_optab)
2686 outmode = TYPE_MODE (integer_type_node);
2690 /* Pass 1 for NO_QUEUE so we don't lose any increments
2691 if the libcall is cse'd or moved. */
2692 value = emit_library_call_value (unoptab->handlers[(int) mode].libfunc,
2693 NULL_RTX, LCT_CONST, outmode,
2695 insns = get_insns ();
2698 target = gen_reg_rtx (outmode);
2699 emit_libcall_block (insns, target, value,
2700 gen_rtx_fmt_e (unoptab->code, mode, op0));
2705 if (class == MODE_VECTOR_FLOAT || class == MODE_VECTOR_INT)
2706 return expand_vector_unop (mode, unoptab, op0, target, unsignedp);
2708 /* It can't be done in this mode. Can we do it in a wider mode? */
2710 if (class == MODE_INT || class == MODE_FLOAT || class == MODE_COMPLEX_FLOAT)
2712 for (wider_mode = GET_MODE_WIDER_MODE (mode); wider_mode != VOIDmode;
2713 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
2715 if ((unoptab->handlers[(int) wider_mode].insn_code
2716 != CODE_FOR_nothing)
2717 || unoptab->handlers[(int) wider_mode].libfunc)
2721 /* For certain operations, we need not actually extend
2722 the narrow operand, as long as we will truncate the
2723 results to the same narrowness. */
2725 xop0 = widen_operand (xop0, wider_mode, mode, unsignedp,
2726 (unoptab == neg_optab
2727 || unoptab == one_cmpl_optab)
2728 && class == MODE_INT);
2730 temp = expand_unop (wider_mode, unoptab, xop0, NULL_RTX,
2733 /* If we are generating clz using wider mode, adjust the
2735 if (unoptab == clz_optab && temp != 0)
2736 temp = expand_binop (wider_mode, sub_optab, temp,
2737 GEN_INT (GET_MODE_BITSIZE (wider_mode)
2738 - GET_MODE_BITSIZE (mode)),
2739 target, true, OPTAB_DIRECT);
2743 if (class != MODE_INT)
2746 target = gen_reg_rtx (mode);
2747 convert_move (target, temp, 0);
2751 return gen_lowpart (mode, temp);
2754 delete_insns_since (last);
2759 /* If there is no negate operation, try doing a subtract from zero.
2760 The US Software GOFAST library needs this. */
2761 if (unoptab->code == NEG)
2764 temp = expand_binop (mode,
2765 unoptab == negv_optab ? subv_optab : sub_optab,
2766 CONST0_RTX (mode), op0,
2767 target, unsignedp, OPTAB_LIB_WIDEN);
2775 /* Emit code to compute the absolute value of OP0, with result to
2776 TARGET if convenient. (TARGET may be 0.) The return value says
2777 where the result actually is to be found.
2779 MODE is the mode of the operand; the mode of the result is
2780 different but can be deduced from MODE.
2785 expand_abs_nojump (mode, op0, target, result_unsignedp)
2786 enum machine_mode mode;
2789 int result_unsignedp;
2794 result_unsignedp = 1;
2796 /* First try to do it with a special abs instruction. */
2797 temp = expand_unop (mode, result_unsignedp ? abs_optab : absv_optab,
2802 /* For floating point modes, try clearing the sign bit. */
2803 if (GET_MODE_CLASS (mode) == MODE_FLOAT
2804 && GET_MODE_BITSIZE (mode) <= 2 * HOST_BITS_PER_WIDE_INT)
2806 const struct real_format *fmt = real_format_for_mode[mode - QFmode];
2807 enum machine_mode imode = int_mode_for_mode (mode);
2808 int bitpos = (fmt != 0) ? fmt->signbit : -1;
2810 if (imode != BLKmode && bitpos >= 0)
2812 HOST_WIDE_INT hi, lo;
2813 rtx last = get_last_insn ();
2815 /* Handle targets with different FP word orders. */
2816 if (FLOAT_WORDS_BIG_ENDIAN != WORDS_BIG_ENDIAN)
2818 int nwords = GET_MODE_BITSIZE (mode) / BITS_PER_WORD;
2819 int word = nwords - (bitpos / BITS_PER_WORD) - 1;
2820 bitpos = word * BITS_PER_WORD + bitpos % BITS_PER_WORD;
2823 if (bitpos < HOST_BITS_PER_WIDE_INT)
2826 lo = (HOST_WIDE_INT) 1 << bitpos;
2830 hi = (HOST_WIDE_INT) 1 << (bitpos - HOST_BITS_PER_WIDE_INT);
2833 temp = expand_binop (imode, and_optab,
2834 gen_lowpart (imode, op0),
2835 immed_double_const (~lo, ~hi, imode),
2836 NULL_RTX, 1, OPTAB_LIB_WIDEN);
2838 return gen_lowpart (mode, temp);
2839 delete_insns_since (last);
2843 /* If we have a MAX insn, we can do this as MAX (x, -x). */
2844 if (smax_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
2846 rtx last = get_last_insn ();
2848 temp = expand_unop (mode, neg_optab, op0, NULL_RTX, 0);
2850 temp = expand_binop (mode, smax_optab, op0, temp, target, 0,
2856 delete_insns_since (last);
2859 /* If this machine has expensive jumps, we can do integer absolute
2860 value of X as (((signed) x >> (W-1)) ^ x) - ((signed) x >> (W-1)),
2861 where W is the width of MODE. */
2863 if (GET_MODE_CLASS (mode) == MODE_INT && BRANCH_COST >= 2)
2865 rtx extended = expand_shift (RSHIFT_EXPR, mode, op0,
2866 size_int (GET_MODE_BITSIZE (mode) - 1),
2869 temp = expand_binop (mode, xor_optab, extended, op0, target, 0,
2872 temp = expand_binop (mode, result_unsignedp ? sub_optab : subv_optab,
2873 temp, extended, target, 0, OPTAB_LIB_WIDEN);
2883 expand_abs (mode, op0, target, result_unsignedp, safe)
2884 enum machine_mode mode;
2887 int result_unsignedp;
2892 temp = expand_abs_nojump (mode, op0, target, result_unsignedp);
2896 /* If that does not win, use conditional jump and negate. */
2898 /* It is safe to use the target if it is the same
2899 as the source if this is also a pseudo register */
2900 if (op0 == target && GET_CODE (op0) == REG
2901 && REGNO (op0) >= FIRST_PSEUDO_REGISTER)
2904 op1 = gen_label_rtx ();
2905 if (target == 0 || ! safe
2906 || GET_MODE (target) != mode
2907 || (GET_CODE (target) == MEM && MEM_VOLATILE_P (target))
2908 || (GET_CODE (target) == REG
2909 && REGNO (target) < FIRST_PSEUDO_REGISTER))
2910 target = gen_reg_rtx (mode);
2912 emit_move_insn (target, op0);
2915 /* If this mode is an integer too wide to compare properly,
2916 compare word by word. Rely on CSE to optimize constant cases. */
2917 if (GET_MODE_CLASS (mode) == MODE_INT
2918 && ! can_compare_p (GE, mode, ccp_jump))
2919 do_jump_by_parts_greater_rtx (mode, 0, target, const0_rtx,
2922 do_compare_rtx_and_jump (target, CONST0_RTX (mode), GE, 0, mode,
2923 NULL_RTX, NULL_RTX, op1);
2925 op0 = expand_unop (mode, result_unsignedp ? neg_optab : negv_optab,
2928 emit_move_insn (target, op0);
2934 /* Emit code to compute the absolute value of OP0, with result to
2935 TARGET if convenient. (TARGET may be 0.) The return value says
2936 where the result actually is to be found.
2938 MODE is the mode of the operand; the mode of the result is
2939 different but can be deduced from MODE.
2941 UNSIGNEDP is relevant for complex integer modes. */
2944 expand_complex_abs (mode, op0, target, unsignedp)
2945 enum machine_mode mode;
2950 enum mode_class class = GET_MODE_CLASS (mode);
2951 enum machine_mode wider_mode;
2953 rtx entry_last = get_last_insn ();
2956 optab this_abs_optab;
2958 /* Find the correct mode for the real and imaginary parts. */
2959 enum machine_mode submode = GET_MODE_INNER (mode);
2961 if (submode == BLKmode)
2964 op0 = protect_from_queue (op0, 0);
2968 op0 = force_not_mem (op0);
2971 last = get_last_insn ();
2974 target = protect_from_queue (target, 1);
2976 this_abs_optab = ! unsignedp && flag_trapv
2977 && (GET_MODE_CLASS(mode) == MODE_INT)
2978 ? absv_optab : abs_optab;
2980 if (this_abs_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
2982 int icode = (int) this_abs_optab->handlers[(int) mode].insn_code;
2983 enum machine_mode mode0 = insn_data[icode].operand[1].mode;
2989 temp = gen_reg_rtx (submode);
2991 if (GET_MODE (xop0) != VOIDmode
2992 && GET_MODE (xop0) != mode0)
2993 xop0 = convert_to_mode (mode0, xop0, unsignedp);
2995 /* Now, if insn doesn't accept our operand, put it into a pseudo. */
2997 if (! (*insn_data[icode].operand[1].predicate) (xop0, mode0))
2998 xop0 = copy_to_mode_reg (mode0, xop0);
3000 if (! (*insn_data[icode].operand[0].predicate) (temp, submode))
3001 temp = gen_reg_rtx (submode);
3003 pat = GEN_FCN (icode) (temp, xop0);
3006 if (INSN_P (pat) && NEXT_INSN (pat) != NULL_RTX
3007 && ! add_equal_note (pat, temp, this_abs_optab->code, xop0,
3010 delete_insns_since (last);
3011 return expand_unop (mode, this_abs_optab, op0, NULL_RTX,
3020 delete_insns_since (last);
3023 /* It can't be done in this mode. Can we open-code it in a wider mode? */
3025 for (wider_mode = GET_MODE_WIDER_MODE (mode); wider_mode != VOIDmode;
3026 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
3028 if (this_abs_optab->handlers[(int) wider_mode].insn_code
3029 != CODE_FOR_nothing)
3033 xop0 = convert_modes (wider_mode, mode, xop0, unsignedp);
3034 temp = expand_complex_abs (wider_mode, xop0, NULL_RTX, unsignedp);
3038 if (class != MODE_COMPLEX_INT)
3041 target = gen_reg_rtx (submode);
3042 convert_move (target, temp, 0);
3046 return gen_lowpart (submode, temp);
3049 delete_insns_since (last);
3053 /* Open-code the complex absolute-value operation
3054 if we can open-code sqrt. Otherwise it's not worth while. */
3055 if (sqrt_optab->handlers[(int) submode].insn_code != CODE_FOR_nothing
3058 rtx real, imag, total;
3060 real = gen_realpart (submode, op0);
3061 imag = gen_imagpart (submode, op0);
3063 /* Square both parts. */
3064 real = expand_mult (submode, real, real, NULL_RTX, 0);
3065 imag = expand_mult (submode, imag, imag, NULL_RTX, 0);
3067 /* Sum the parts. */
3068 total = expand_binop (submode, add_optab, real, imag, NULL_RTX,
3069 0, OPTAB_LIB_WIDEN);
3071 /* Get sqrt in TARGET. Set TARGET to where the result is. */
3072 target = expand_unop (submode, sqrt_optab, total, target, 0);
3074 delete_insns_since (last);
3079 /* Now try a library call in this mode. */
3080 if (this_abs_optab->handlers[(int) mode].libfunc)
3087 /* Pass 1 for NO_QUEUE so we don't lose any increments
3088 if the libcall is cse'd or moved. */
3089 value = emit_library_call_value (abs_optab->handlers[(int) mode].libfunc,
3090 NULL_RTX, LCT_CONST, submode, 1, op0, mode);
3091 insns = get_insns ();
3094 target = gen_reg_rtx (submode);
3095 emit_libcall_block (insns, target, value,
3096 gen_rtx_fmt_e (this_abs_optab->code, mode, op0));
3101 /* It can't be done in this mode. Can we do it in a wider mode? */
3103 for (wider_mode = GET_MODE_WIDER_MODE (mode); wider_mode != VOIDmode;
3104 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
3106 if ((this_abs_optab->handlers[(int) wider_mode].insn_code
3107 != CODE_FOR_nothing)
3108 || this_abs_optab->handlers[(int) wider_mode].libfunc)
3112 xop0 = convert_modes (wider_mode, mode, xop0, unsignedp);
3114 temp = expand_complex_abs (wider_mode, xop0, NULL_RTX, unsignedp);
3118 if (class != MODE_COMPLEX_INT)
3121 target = gen_reg_rtx (submode);
3122 convert_move (target, temp, 0);
3126 return gen_lowpart (submode, temp);
3129 delete_insns_since (last);
3133 delete_insns_since (entry_last);
3137 /* Generate an instruction whose insn-code is INSN_CODE,
3138 with two operands: an output TARGET and an input OP0.
3139 TARGET *must* be nonzero, and the output is always stored there.
3140 CODE is an rtx code such that (CODE OP0) is an rtx that describes
3141 the value that is stored into TARGET. */
3144 emit_unop_insn (icode, target, op0, code)
3151 enum machine_mode mode0 = insn_data[icode].operand[1].mode;
3154 temp = target = protect_from_queue (target, 1);
3156 op0 = protect_from_queue (op0, 0);
3158 /* Sign and zero extension from memory is often done specially on
3159 RISC machines, so forcing into a register here can pessimize
3161 if (flag_force_mem && code != SIGN_EXTEND && code != ZERO_EXTEND)
3162 op0 = force_not_mem (op0);
3164 /* Now, if insn does not accept our operands, put them into pseudos. */
3166 if (! (*insn_data[icode].operand[1].predicate) (op0, mode0))
3167 op0 = copy_to_mode_reg (mode0, op0);
3169 if (! (*insn_data[icode].operand[0].predicate) (temp, GET_MODE (temp))
3170 || (flag_force_mem && GET_CODE (temp) == MEM))
3171 temp = gen_reg_rtx (GET_MODE (temp));
3173 pat = GEN_FCN (icode) (temp, op0);
3175 if (INSN_P (pat) && NEXT_INSN (pat) != NULL_RTX && code != UNKNOWN)
3176 add_equal_note (pat, temp, code, op0, NULL_RTX);
3181 emit_move_insn (target, temp);
3184 /* Emit code to perform a series of operations on a multi-word quantity, one
3187 Such a block is preceded by a CLOBBER of the output, consists of multiple
3188 insns, each setting one word of the output, and followed by a SET copying
3189 the output to itself.
3191 Each of the insns setting words of the output receives a REG_NO_CONFLICT
3192 note indicating that it doesn't conflict with the (also multi-word)
3193 inputs. The entire block is surrounded by REG_LIBCALL and REG_RETVAL
3196 INSNS is a block of code generated to perform the operation, not including
3197 the CLOBBER and final copy. All insns that compute intermediate values
3198 are first emitted, followed by the block as described above.
3200 TARGET, OP0, and OP1 are the output and inputs of the operations,
3201 respectively. OP1 may be zero for a unary operation.
3203 EQUIV, if nonzero, is an expression to be placed into a REG_EQUAL note
3206 If TARGET is not a register, INSNS is simply emitted with no special
3207 processing. Likewise if anything in INSNS is not an INSN or if
3208 there is a libcall block inside INSNS.
3210 The final insn emitted is returned. */
3213 emit_no_conflict_block (insns, target, op0, op1, equiv)
3219 rtx prev, next, first, last, insn;
3221 if (GET_CODE (target) != REG || reload_in_progress)
3222 return emit_insn (insns);
3224 for (insn = insns; insn; insn = NEXT_INSN (insn))
3225 if (GET_CODE (insn) != INSN
3226 || find_reg_note (insn, REG_LIBCALL, NULL_RTX))
3227 return emit_insn (insns);
3229 /* First emit all insns that do not store into words of the output and remove
3230 these from the list. */
3231 for (insn = insns; insn; insn = next)
3236 next = NEXT_INSN (insn);
3238 /* Some ports (cris) create an libcall regions at their own. We must
3239 avoid any potential nesting of LIBCALLs. */
3240 if ((note = find_reg_note (insn, REG_LIBCALL, NULL)) != NULL)
3241 remove_note (insn, note);
3242 if ((note = find_reg_note (insn, REG_RETVAL, NULL)) != NULL)
3243 remove_note (insn, note);
3245 if (GET_CODE (PATTERN (insn)) == SET || GET_CODE (PATTERN (insn)) == USE
3246 || GET_CODE (PATTERN (insn)) == CLOBBER)
3247 set = PATTERN (insn);
3248 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
3250 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
3251 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET)
3253 set = XVECEXP (PATTERN (insn), 0, i);
3261 if (! reg_overlap_mentioned_p (target, SET_DEST (set)))
3263 if (PREV_INSN (insn))
3264 NEXT_INSN (PREV_INSN (insn)) = next;
3269 PREV_INSN (next) = PREV_INSN (insn);
3275 prev = get_last_insn ();
3277 /* Now write the CLOBBER of the output, followed by the setting of each
3278 of the words, followed by the final copy. */
3279 if (target != op0 && target != op1)
3280 emit_insn (gen_rtx_CLOBBER (VOIDmode, target));
3282 for (insn = insns; insn; insn = next)
3284 next = NEXT_INSN (insn);
3287 if (op1 && GET_CODE (op1) == REG)
3288 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_NO_CONFLICT, op1,
3291 if (op0 && GET_CODE (op0) == REG)
3292 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_NO_CONFLICT, op0,
3296 if (mov_optab->handlers[(int) GET_MODE (target)].insn_code
3297 != CODE_FOR_nothing)
3299 last = emit_move_insn (target, target);
3301 set_unique_reg_note (last, REG_EQUAL, equiv);
3305 last = get_last_insn ();
3307 /* Remove any existing REG_EQUAL note from "last", or else it will
3308 be mistaken for a note referring to the full contents of the
3309 alleged libcall value when found together with the REG_RETVAL
3310 note added below. An existing note can come from an insn
3311 expansion at "last". */
3312 remove_note (last, find_reg_note (last, REG_EQUAL, NULL_RTX));
3316 first = get_insns ();
3318 first = NEXT_INSN (prev);
3320 /* Encapsulate the block so it gets manipulated as a unit. */
3321 REG_NOTES (first) = gen_rtx_INSN_LIST (REG_LIBCALL, last,
3323 REG_NOTES (last) = gen_rtx_INSN_LIST (REG_RETVAL, first, REG_NOTES (last));
3328 /* Emit code to make a call to a constant function or a library call.
3330 INSNS is a list containing all insns emitted in the call.
3331 These insns leave the result in RESULT. Our block is to copy RESULT
3332 to TARGET, which is logically equivalent to EQUIV.
3334 We first emit any insns that set a pseudo on the assumption that these are
3335 loading constants into registers; doing so allows them to be safely cse'ed
3336 between blocks. Then we emit all the other insns in the block, followed by
3337 an insn to move RESULT to TARGET. This last insn will have a REQ_EQUAL
3338 note with an operand of EQUIV.
3340 Moving assignments to pseudos outside of the block is done to improve
3341 the generated code, but is not required to generate correct code,
3342 hence being unable to move an assignment is not grounds for not making
3343 a libcall block. There are two reasons why it is safe to leave these
3344 insns inside the block: First, we know that these pseudos cannot be
3345 used in generated RTL outside the block since they are created for
3346 temporary purposes within the block. Second, CSE will not record the
3347 values of anything set inside a libcall block, so we know they must
3348 be dead at the end of the block.
3350 Except for the first group of insns (the ones setting pseudos), the
3351 block is delimited by REG_RETVAL and REG_LIBCALL notes. */
3354 emit_libcall_block (insns, target, result, equiv)
3360 rtx final_dest = target;
3361 rtx prev, next, first, last, insn;
3363 /* If this is a reg with REG_USERVAR_P set, then it could possibly turn
3364 into a MEM later. Protect the libcall block from this change. */
3365 if (! REG_P (target) || REG_USERVAR_P (target))
3366 target = gen_reg_rtx (GET_MODE (target));
3368 /* If we're using non-call exceptions, a libcall corresponding to an
3369 operation that may trap may also trap. */
3370 if (flag_non_call_exceptions && may_trap_p (equiv))
3372 for (insn = insns; insn; insn = NEXT_INSN (insn))
3373 if (GET_CODE (insn) == CALL_INSN)
3375 rtx note = find_reg_note (insn, REG_EH_REGION, NULL_RTX);
3377 if (note != 0 && INTVAL (XEXP (note, 0)) <= 0)
3378 remove_note (insn, note);
3382 /* look for any CALL_INSNs in this sequence, and attach a REG_EH_REGION
3383 reg note to indicate that this call cannot throw or execute a nonlocal
3384 goto (unless there is already a REG_EH_REGION note, in which case
3386 for (insn = insns; insn; insn = NEXT_INSN (insn))
3387 if (GET_CODE (insn) == CALL_INSN)
3389 rtx note = find_reg_note (insn, REG_EH_REGION, NULL_RTX);
3392 XEXP (note, 0) = GEN_INT (-1);
3394 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_EH_REGION, GEN_INT (-1),
3398 /* First emit all insns that set pseudos. Remove them from the list as
3399 we go. Avoid insns that set pseudos which were referenced in previous
3400 insns. These can be generated by move_by_pieces, for example,
3401 to update an address. Similarly, avoid insns that reference things
3402 set in previous insns. */
3404 for (insn = insns; insn; insn = next)
3406 rtx set = single_set (insn);
3409 /* Some ports (cris) create an libcall regions at their own. We must
3410 avoid any potential nesting of LIBCALLs. */
3411 if ((note = find_reg_note (insn, REG_LIBCALL, NULL)) != NULL)
3412 remove_note (insn, note);
3413 if ((note = find_reg_note (insn, REG_RETVAL, NULL)) != NULL)
3414 remove_note (insn, note);
3416 next = NEXT_INSN (insn);
3418 if (set != 0 && GET_CODE (SET_DEST (set)) == REG
3419 && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER
3421 || ((! INSN_P(insns)
3422 || ! reg_mentioned_p (SET_DEST (set), PATTERN (insns)))
3423 && ! reg_used_between_p (SET_DEST (set), insns, insn)
3424 && ! modified_in_p (SET_SRC (set), insns)
3425 && ! modified_between_p (SET_SRC (set), insns, insn))))
3427 if (PREV_INSN (insn))
3428 NEXT_INSN (PREV_INSN (insn)) = next;
3433 PREV_INSN (next) = PREV_INSN (insn);
3439 prev = get_last_insn ();
3441 /* Write the remaining insns followed by the final copy. */
3443 for (insn = insns; insn; insn = next)
3445 next = NEXT_INSN (insn);
3450 last = emit_move_insn (target, result);
3451 if (mov_optab->handlers[(int) GET_MODE (target)].insn_code
3452 != CODE_FOR_nothing)
3453 set_unique_reg_note (last, REG_EQUAL, copy_rtx (equiv));
3456 /* Remove any existing REG_EQUAL note from "last", or else it will
3457 be mistaken for a note referring to the full contents of the
3458 libcall value when found together with the REG_RETVAL note added
3459 below. An existing note can come from an insn expansion at
3461 remove_note (last, find_reg_note (last, REG_EQUAL, NULL_RTX));
3464 if (final_dest != target)
3465 emit_move_insn (final_dest, target);
3468 first = get_insns ();
3470 first = NEXT_INSN (prev);
3472 /* Encapsulate the block so it gets manipulated as a unit. */
3473 if (!flag_non_call_exceptions || !may_trap_p (equiv))
3475 /* We can't attach the REG_LIBCALL and REG_RETVAL notes
3476 when the encapsulated region would not be in one basic block,
3477 i.e. when there is a control_flow_insn_p insn between FIRST and LAST.
3479 bool attach_libcall_retval_notes = true;
3480 next = NEXT_INSN (last);
3481 for (insn = first; insn != next; insn = NEXT_INSN (insn))
3482 if (control_flow_insn_p (insn))
3484 attach_libcall_retval_notes = false;
3488 if (attach_libcall_retval_notes)
3490 REG_NOTES (first) = gen_rtx_INSN_LIST (REG_LIBCALL, last,
3492 REG_NOTES (last) = gen_rtx_INSN_LIST (REG_RETVAL, first,
3498 /* Generate code to store zero in X. */
3504 emit_move_insn (x, const0_rtx);
3507 /* Generate code to store 1 in X
3508 assuming it contains zero beforehand. */
3511 emit_0_to_1_insn (x)
3514 emit_move_insn (x, const1_rtx);
3517 /* Nonzero if we can perform a comparison of mode MODE straightforwardly.
3518 PURPOSE describes how this comparison will be used. CODE is the rtx
3519 comparison code we will be using.
3521 ??? Actually, CODE is slightly weaker than that. A target is still
3522 required to implement all of the normal bcc operations, but not
3523 required to implement all (or any) of the unordered bcc operations. */
3526 can_compare_p (code, mode, purpose)
3528 enum machine_mode mode;
3529 enum can_compare_purpose purpose;
3533 if (cmp_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
3535 if (purpose == ccp_jump)
3536 return bcc_gen_fctn[(int) code] != NULL;
3537 else if (purpose == ccp_store_flag)
3538 return setcc_gen_code[(int) code] != CODE_FOR_nothing;
3540 /* There's only one cmov entry point, and it's allowed to fail. */
3543 if (purpose == ccp_jump
3544 && cbranch_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
3546 if (purpose == ccp_cmov
3547 && cmov_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
3549 if (purpose == ccp_store_flag
3550 && cstore_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
3553 mode = GET_MODE_WIDER_MODE (mode);
3555 while (mode != VOIDmode);
3560 /* This function is called when we are going to emit a compare instruction that
3561 compares the values found in *PX and *PY, using the rtl operator COMPARISON.
3563 *PMODE is the mode of the inputs (in case they are const_int).
3564 *PUNSIGNEDP nonzero says that the operands are unsigned;
3565 this matters if they need to be widened.
3567 If they have mode BLKmode, then SIZE specifies the size of both operands.
3569 This function performs all the setup necessary so that the caller only has
3570 to emit a single comparison insn. This setup can involve doing a BLKmode
3571 comparison or emitting a library call to perform the comparison if no insn
3572 is available to handle it.
3573 The values which are passed in through pointers can be modified; the caller
3574 should perform the comparison on the modified values. */
3577 prepare_cmp_insn (px, py, pcomparison, size, pmode, punsignedp, purpose)
3579 enum rtx_code *pcomparison;
3581 enum machine_mode *pmode;
3583 enum can_compare_purpose purpose;
3585 enum machine_mode mode = *pmode;
3586 rtx x = *px, y = *py;
3587 int unsignedp = *punsignedp;
3588 enum mode_class class;
3590 class = GET_MODE_CLASS (mode);
3592 /* They could both be VOIDmode if both args are immediate constants,
3593 but we should fold that at an earlier stage.
3594 With no special code here, this will call abort,
3595 reminding the programmer to implement such folding. */
3597 if (mode != BLKmode && flag_force_mem)
3599 /* Load duplicate non-volatile operands once. */
3600 if (rtx_equal_p (x, y) && ! volatile_refs_p (x))
3602 x = force_not_mem (x);
3607 x = force_not_mem (x);
3608 y = force_not_mem (y);
3612 /* If we are inside an appropriately-short loop and one operand is an
3613 expensive constant, force it into a register. */
3614 if (CONSTANT_P (x) && preserve_subexpressions_p ()
3615 && rtx_cost (x, COMPARE) > COSTS_N_INSNS (1))
3616 x = force_reg (mode, x);
3618 if (CONSTANT_P (y) && preserve_subexpressions_p ()
3619 && rtx_cost (y, COMPARE) > COSTS_N_INSNS (1))
3620 y = force_reg (mode, y);
3623 /* Abort if we have a non-canonical comparison. The RTL documentation
3624 states that canonical comparisons are required only for targets which
3626 if (CONSTANT_P (x) && ! CONSTANT_P (y))
3630 /* Don't let both operands fail to indicate the mode. */
3631 if (GET_MODE (x) == VOIDmode && GET_MODE (y) == VOIDmode)
3632 x = force_reg (mode, x);
3634 /* Handle all BLKmode compares. */
3636 if (mode == BLKmode)
3639 enum machine_mode result_mode;
3640 rtx opalign ATTRIBUTE_UNUSED
3641 = GEN_INT (MIN (MEM_ALIGN (x), MEM_ALIGN (y)) / BITS_PER_UNIT);
3644 x = protect_from_queue (x, 0);
3645 y = protect_from_queue (y, 0);
3649 #ifdef HAVE_cmpstrqi
3651 && GET_CODE (size) == CONST_INT
3652 && INTVAL (size) < (1 << GET_MODE_BITSIZE (QImode)))
3654 result_mode = insn_data[(int) CODE_FOR_cmpstrqi].operand[0].mode;
3655 result = gen_reg_rtx (result_mode);
3656 emit_insn (gen_cmpstrqi (result, x, y, size, opalign));
3660 #ifdef HAVE_cmpstrhi
3662 && GET_CODE (size) == CONST_INT
3663 && INTVAL (size) < (1 << GET_MODE_BITSIZE (HImode)))
3665 result_mode = insn_data[(int) CODE_FOR_cmpstrhi].operand[0].mode;
3666 result = gen_reg_rtx (result_mode);
3667 emit_insn (gen_cmpstrhi (result, x, y, size, opalign));
3671 #ifdef HAVE_cmpstrsi
3674 result_mode = insn_data[(int) CODE_FOR_cmpstrsi].operand[0].mode;
3675 result = gen_reg_rtx (result_mode);
3676 size = protect_from_queue (size, 0);
3677 emit_insn (gen_cmpstrsi (result, x, y,
3678 convert_to_mode (SImode, size, 1),
3684 #ifdef TARGET_MEM_FUNCTIONS
3685 result = emit_library_call_value (memcmp_libfunc, NULL_RTX, LCT_PURE_MAKE_BLOCK,
3686 TYPE_MODE (integer_type_node), 3,
3687 XEXP (x, 0), Pmode, XEXP (y, 0), Pmode,
3688 convert_to_mode (TYPE_MODE (sizetype), size,
3689 TREE_UNSIGNED (sizetype)),
3690 TYPE_MODE (sizetype));
3692 result = emit_library_call_value (bcmp_libfunc, NULL_RTX, LCT_PURE_MAKE_BLOCK,
3693 TYPE_MODE (integer_type_node), 3,
3694 XEXP (x, 0), Pmode, XEXP (y, 0), Pmode,
3695 convert_to_mode (TYPE_MODE (integer_type_node),
3697 TREE_UNSIGNED (integer_type_node)),
3698 TYPE_MODE (integer_type_node));
3701 result_mode = TYPE_MODE (integer_type_node);
3705 *pmode = result_mode;
3711 if (can_compare_p (*pcomparison, mode, purpose))
3714 /* Handle a lib call just for the mode we are using. */
3716 if (cmp_optab->handlers[(int) mode].libfunc && class != MODE_FLOAT)
3718 rtx libfunc = cmp_optab->handlers[(int) mode].libfunc;
3721 /* If we want unsigned, and this mode has a distinct unsigned
3722 comparison routine, use that. */
3723 if (unsignedp && ucmp_optab->handlers[(int) mode].libfunc)
3724 libfunc = ucmp_optab->handlers[(int) mode].libfunc;
3726 result = emit_library_call_value (libfunc, NULL_RTX, LCT_CONST_MAKE_BLOCK,
3727 word_mode, 2, x, mode, y, mode);
3729 /* Integer comparison returns a result that must be compared against 1,
3730 so that even if we do an unsigned compare afterward,
3731 there is still a value that can represent the result "less than". */
3738 if (class == MODE_FLOAT)
3739 prepare_float_lib_cmp (px, py, pcomparison, pmode, punsignedp);
3745 /* Before emitting an insn with code ICODE, make sure that X, which is going
3746 to be used for operand OPNUM of the insn, is converted from mode MODE to
3747 WIDER_MODE (UNSIGNEDP determines whether it is an unsigned conversion), and
3748 that it is accepted by the operand predicate. Return the new value. */
3751 prepare_operand (icode, x, opnum, mode, wider_mode, unsignedp)
3755 enum machine_mode mode, wider_mode;
3758 x = protect_from_queue (x, 0);
3760 if (mode != wider_mode)
3761 x = convert_modes (wider_mode, mode, x, unsignedp);
3763 if (! (*insn_data[icode].operand[opnum].predicate)
3764 (x, insn_data[icode].operand[opnum].mode))
3765 x = copy_to_mode_reg (insn_data[icode].operand[opnum].mode, x);
3769 /* Subroutine of emit_cmp_and_jump_insns; this function is called when we know
3770 we can do the comparison.
3771 The arguments are the same as for emit_cmp_and_jump_insns; but LABEL may
3772 be NULL_RTX which indicates that only a comparison is to be generated. */
3775 emit_cmp_and_jump_insn_1 (x, y, mode, comparison, unsignedp, label)
3777 enum machine_mode mode;
3778 enum rtx_code comparison;
3782 rtx test = gen_rtx_fmt_ee (comparison, mode, x, y);
3783 enum mode_class class = GET_MODE_CLASS (mode);
3784 enum machine_mode wider_mode = mode;
3786 /* Try combined insns first. */
3789 enum insn_code icode;
3790 PUT_MODE (test, wider_mode);
3794 icode = cbranch_optab->handlers[(int) wider_mode].insn_code;
3796 if (icode != CODE_FOR_nothing
3797 && (*insn_data[icode].operand[0].predicate) (test, wider_mode))
3799 x = prepare_operand (icode, x, 1, mode, wider_mode, unsignedp);
3800 y = prepare_operand (icode, y, 2, mode, wider_mode, unsignedp);
3801 emit_jump_insn (GEN_FCN (icode) (test, x, y, label));
3806 /* Handle some compares against zero. */
3807 icode = (int) tst_optab->handlers[(int) wider_mode].insn_code;
3808 if (y == CONST0_RTX (mode) && icode != CODE_FOR_nothing)
3810 x = prepare_operand (icode, x, 0, mode, wider_mode, unsignedp);
3811 emit_insn (GEN_FCN (icode) (x));
3813 emit_jump_insn ((*bcc_gen_fctn[(int) comparison]) (label));
3817 /* Handle compares for which there is a directly suitable insn. */
3819 icode = (int) cmp_optab->handlers[(int) wider_mode].insn_code;
3820 if (icode != CODE_FOR_nothing)
3822 x = prepare_operand (icode, x, 0, mode, wider_mode, unsignedp);
3823 y = prepare_operand (icode, y, 1, mode, wider_mode, unsignedp);
3824 emit_insn (GEN_FCN (icode) (x, y));
3826 emit_jump_insn ((*bcc_gen_fctn[(int) comparison]) (label));
3830 if (class != MODE_INT && class != MODE_FLOAT
3831 && class != MODE_COMPLEX_FLOAT)
3834 wider_mode = GET_MODE_WIDER_MODE (wider_mode);
3836 while (wider_mode != VOIDmode);
3841 /* Generate code to compare X with Y so that the condition codes are
3842 set and to jump to LABEL if the condition is true. If X is a
3843 constant and Y is not a constant, then the comparison is swapped to
3844 ensure that the comparison RTL has the canonical form.
3846 UNSIGNEDP nonzero says that X and Y are unsigned; this matters if they
3847 need to be widened by emit_cmp_insn. UNSIGNEDP is also used to select
3848 the proper branch condition code.
3850 If X and Y have mode BLKmode, then SIZE specifies the size of both X and Y.
3852 MODE is the mode of the inputs (in case they are const_int).
3854 COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.). It will
3855 be passed unchanged to emit_cmp_insn, then potentially converted into an
3856 unsigned variant based on UNSIGNEDP to select a proper jump instruction. */
3859 emit_cmp_and_jump_insns (x, y, comparison, size, mode, unsignedp, label)
3861 enum rtx_code comparison;
3863 enum machine_mode mode;
3867 rtx op0 = x, op1 = y;
3869 /* Swap operands and condition to ensure canonical RTL. */
3870 if (swap_commutative_operands_p (x, y))
3872 /* If we're not emitting a branch, this means some caller
3878 comparison = swap_condition (comparison);
3882 /* If OP0 is still a constant, then both X and Y must be constants. Force
3883 X into a register to avoid aborting in emit_cmp_insn due to non-canonical
3885 if (CONSTANT_P (op0))
3886 op0 = force_reg (mode, op0);
3891 comparison = unsigned_condition (comparison);
3893 prepare_cmp_insn (&op0, &op1, &comparison, size, &mode, &unsignedp,
3895 emit_cmp_and_jump_insn_1 (op0, op1, mode, comparison, unsignedp, label);
3898 /* Like emit_cmp_and_jump_insns, but generate only the comparison. */
3901 emit_cmp_insn (x, y, comparison, size, mode, unsignedp)
3903 enum rtx_code comparison;
3905 enum machine_mode mode;
3908 emit_cmp_and_jump_insns (x, y, comparison, size, mode, unsignedp, 0);
3911 /* Emit a library call comparison between floating point X and Y.
3912 COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.). */
3915 prepare_float_lib_cmp (px, py, pcomparison, pmode, punsignedp)
3917 enum rtx_code *pcomparison;
3918 enum machine_mode *pmode;
3921 enum rtx_code comparison = *pcomparison;
3923 rtx x = *px = protect_from_queue (*px, 0);
3924 rtx y = *py = protect_from_queue (*py, 0);
3925 enum machine_mode mode = GET_MODE (x);
3933 libfunc = eqhf2_libfunc;
3937 libfunc = nehf2_libfunc;
3941 libfunc = gthf2_libfunc;
3942 if (libfunc == NULL_RTX)
3944 tmp = x; x = y; y = tmp;
3946 libfunc = lthf2_libfunc;
3951 libfunc = gehf2_libfunc;
3952 if (libfunc == NULL_RTX)
3954 tmp = x; x = y; y = tmp;
3956 libfunc = lehf2_libfunc;
3961 libfunc = lthf2_libfunc;
3962 if (libfunc == NULL_RTX)
3964 tmp = x; x = y; y = tmp;
3966 libfunc = gthf2_libfunc;
3971 libfunc = lehf2_libfunc;
3972 if (libfunc == NULL_RTX)
3974 tmp = x; x = y; y = tmp;
3976 libfunc = gehf2_libfunc;
3981 libfunc = unordhf2_libfunc;
3987 else if (mode == SFmode)
3991 libfunc = eqsf2_libfunc;
3995 libfunc = nesf2_libfunc;
3999 libfunc = gtsf2_libfunc;
4000 if (libfunc == NULL_RTX)
4002 tmp = x; x = y; y = tmp;
4004 libfunc = ltsf2_libfunc;
4009 libfunc = gesf2_libfunc;
4010 if (libfunc == NULL_RTX)
4012 tmp = x; x = y; y = tmp;
4014 libfunc = lesf2_libfunc;
4019 libfunc = ltsf2_libfunc;
4020 if (libfunc == NULL_RTX)
4022 tmp = x; x = y; y = tmp;
4024 libfunc = gtsf2_libfunc;
4029 libfunc = lesf2_libfunc;
4030 if (libfunc == NULL_RTX)
4032 tmp = x; x = y; y = tmp;
4034 libfunc = gesf2_libfunc;
4039 libfunc = unordsf2_libfunc;
4045 else if (mode == DFmode)
4049 libfunc = eqdf2_libfunc;
4053 libfunc = nedf2_libfunc;
4057 libfunc = gtdf2_libfunc;
4058 if (libfunc == NULL_RTX)
4060 tmp = x; x = y; y = tmp;
4062 libfunc = ltdf2_libfunc;
4067 libfunc = gedf2_libfunc;
4068 if (libfunc == NULL_RTX)
4070 tmp = x; x = y; y = tmp;
4072 libfunc = ledf2_libfunc;
4077 libfunc = ltdf2_libfunc;
4078 if (libfunc == NULL_RTX)
4080 tmp = x; x = y; y = tmp;
4082 libfunc = gtdf2_libfunc;
4087 libfunc = ledf2_libfunc;
4088 if (libfunc == NULL_RTX)
4090 tmp = x; x = y; y = tmp;
4092 libfunc = gedf2_libfunc;
4097 libfunc = unorddf2_libfunc;
4103 else if (mode == XFmode)
4107 libfunc = eqxf2_libfunc;
4111 libfunc = nexf2_libfunc;
4115 libfunc = gtxf2_libfunc;
4116 if (libfunc == NULL_RTX)
4118 tmp = x; x = y; y = tmp;
4120 libfunc = ltxf2_libfunc;
4125 libfunc = gexf2_libfunc;
4126 if (libfunc == NULL_RTX)
4128 tmp = x; x = y; y = tmp;
4130 libfunc = lexf2_libfunc;
4135 libfunc = ltxf2_libfunc;
4136 if (libfunc == NULL_RTX)
4138 tmp = x; x = y; y = tmp;
4140 libfunc = gtxf2_libfunc;
4145 libfunc = lexf2_libfunc;
4146 if (libfunc == NULL_RTX)
4148 tmp = x; x = y; y = tmp;
4150 libfunc = gexf2_libfunc;
4155 libfunc = unordxf2_libfunc;
4161 else if (mode == TFmode)
4165 libfunc = eqtf2_libfunc;
4169 libfunc = netf2_libfunc;
4173 libfunc = gttf2_libfunc;
4174 if (libfunc == NULL_RTX)
4176 tmp = x; x = y; y = tmp;
4178 libfunc = lttf2_libfunc;
4183 libfunc = getf2_libfunc;
4184 if (libfunc == NULL_RTX)
4186 tmp = x; x = y; y = tmp;
4188 libfunc = letf2_libfunc;
4193 libfunc = lttf2_libfunc;
4194 if (libfunc == NULL_RTX)
4196 tmp = x; x = y; y = tmp;
4198 libfunc = gttf2_libfunc;
4203 libfunc = letf2_libfunc;
4204 if (libfunc == NULL_RTX)
4206 tmp = x; x = y; y = tmp;
4208 libfunc = getf2_libfunc;
4213 libfunc = unordtf2_libfunc;
4221 enum machine_mode wider_mode;
4223 for (wider_mode = GET_MODE_WIDER_MODE (mode); wider_mode != VOIDmode;
4224 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
4226 if ((cmp_optab->handlers[(int) wider_mode].insn_code
4227 != CODE_FOR_nothing)
4228 || (cmp_optab->handlers[(int) wider_mode].libfunc != 0))
4230 x = protect_from_queue (x, 0);
4231 y = protect_from_queue (y, 0);
4232 *px = convert_to_mode (wider_mode, x, 0);
4233 *py = convert_to_mode (wider_mode, y, 0);
4234 prepare_float_lib_cmp (px, py, pcomparison, pmode, punsignedp);
4244 result = emit_library_call_value (libfunc, NULL_RTX, LCT_CONST_MAKE_BLOCK,
4245 word_mode, 2, x, mode, y, mode);
4249 if (comparison == UNORDERED)
4251 #ifdef FLOAT_LIB_COMPARE_RETURNS_BOOL
4252 else if (FLOAT_LIB_COMPARE_RETURNS_BOOL (mode, comparison))
4258 /* Generate code to indirectly jump to a location given in the rtx LOC. */
4261 emit_indirect_jump (loc)
4264 if (! ((*insn_data[(int) CODE_FOR_indirect_jump].operand[0].predicate)
4266 loc = copy_to_mode_reg (Pmode, loc);
4268 emit_jump_insn (gen_indirect_jump (loc));
4272 #ifdef HAVE_conditional_move
4274 /* Emit a conditional move instruction if the machine supports one for that
4275 condition and machine mode.
4277 OP0 and OP1 are the operands that should be compared using CODE. CMODE is
4278 the mode to use should they be constants. If it is VOIDmode, they cannot
4281 OP2 should be stored in TARGET if the comparison is true, otherwise OP3
4282 should be stored there. MODE is the mode to use should they be constants.
4283 If it is VOIDmode, they cannot both be constants.
4285 The result is either TARGET (perhaps modified) or NULL_RTX if the operation
4286 is not supported. */
4289 emit_conditional_move (target, code, op0, op1, cmode, op2, op3, mode,
4294 enum machine_mode cmode;
4296 enum machine_mode mode;
4299 rtx tem, subtarget, comparison, insn;
4300 enum insn_code icode;
4301 enum rtx_code reversed;
4303 /* If one operand is constant, make it the second one. Only do this
4304 if the other operand is not constant as well. */
4306 if (swap_commutative_operands_p (op0, op1))
4311 code = swap_condition (code);
4314 /* get_condition will prefer to generate LT and GT even if the old
4315 comparison was against zero, so undo that canonicalization here since
4316 comparisons against zero are cheaper. */
4317 if (code == LT && GET_CODE (op1) == CONST_INT && INTVAL (op1) == 1)
4318 code = LE, op1 = const0_rtx;
4319 else if (code == GT && GET_CODE (op1) == CONST_INT && INTVAL (op1) == -1)
4320 code = GE, op1 = const0_rtx;
4322 if (cmode == VOIDmode)
4323 cmode = GET_MODE (op0);
4325 if (swap_commutative_operands_p (op2, op3)
4326 && ((reversed = reversed_comparison_code_parts (code, op0, op1, NULL))
4335 if (mode == VOIDmode)
4336 mode = GET_MODE (op2);
4338 icode = movcc_gen_code[mode];
4340 if (icode == CODE_FOR_nothing)
4345 op2 = force_not_mem (op2);
4346 op3 = force_not_mem (op3);
4350 target = protect_from_queue (target, 1);
4352 target = gen_reg_rtx (mode);
4358 op2 = protect_from_queue (op2, 0);
4359 op3 = protect_from_queue (op3, 0);
4361 /* If the insn doesn't accept these operands, put them in pseudos. */
4363 if (! (*insn_data[icode].operand[0].predicate)
4364 (subtarget, insn_data[icode].operand[0].mode))
4365 subtarget = gen_reg_rtx (insn_data[icode].operand[0].mode);
4367 if (! (*insn_data[icode].operand[2].predicate)
4368 (op2, insn_data[icode].operand[2].mode))
4369 op2 = copy_to_mode_reg (insn_data[icode].operand[2].mode, op2);
4371 if (! (*insn_data[icode].operand[3].predicate)
4372 (op3, insn_data[icode].operand[3].mode))
4373 op3 = copy_to_mode_reg (insn_data[icode].operand[3].mode, op3);
4375 /* Everything should now be in the suitable form, so emit the compare insn
4376 and then the conditional move. */
4379 = compare_from_rtx (op0, op1, code, unsignedp, cmode, NULL_RTX);
4381 /* ??? Watch for const0_rtx (nop) and const_true_rtx (unconditional)? */
4382 /* We can get const0_rtx or const_true_rtx in some circumstances. Just
4383 return NULL and let the caller figure out how best to deal with this
4385 if (GET_CODE (comparison) != code)
4388 insn = GEN_FCN (icode) (subtarget, comparison, op2, op3);
4390 /* If that failed, then give up. */
4396 if (subtarget != target)
4397 convert_move (target, subtarget, 0);
4402 /* Return nonzero if a conditional move of mode MODE is supported.
4404 This function is for combine so it can tell whether an insn that looks
4405 like a conditional move is actually supported by the hardware. If we
4406 guess wrong we lose a bit on optimization, but that's it. */
4407 /* ??? sparc64 supports conditionally moving integers values based on fp
4408 comparisons, and vice versa. How do we handle them? */
4411 can_conditionally_move_p (mode)
4412 enum machine_mode mode;
4414 if (movcc_gen_code[mode] != CODE_FOR_nothing)
4420 #endif /* HAVE_conditional_move */
4422 /* Emit a conditional addition instruction if the machine supports one for that
4423 condition and machine mode.
4425 OP0 and OP1 are the operands that should be compared using CODE. CMODE is
4426 the mode to use should they be constants. If it is VOIDmode, they cannot
4429 OP2 should be stored in TARGET if the comparison is true, otherwise OP2+OP3
4430 should be stored there. MODE is the mode to use should they be constants.
4431 If it is VOIDmode, they cannot both be constants.
4433 The result is either TARGET (perhaps modified) or NULL_RTX if the operation
4434 is not supported. */
4437 emit_conditional_add (target, code, op0, op1, cmode, op2, op3, mode,
4442 enum machine_mode cmode;
4444 enum machine_mode mode;
4447 rtx tem, subtarget, comparison, insn;
4448 enum insn_code icode;
4449 enum rtx_code reversed;
4451 /* If one operand is constant, make it the second one. Only do this
4452 if the other operand is not constant as well. */
4454 if (swap_commutative_operands_p (op0, op1))
4459 code = swap_condition (code);
4462 /* get_condition will prefer to generate LT and GT even if the old
4463 comparison was against zero, so undo that canonicalization here since
4464 comparisons against zero are cheaper. */
4465 if (code == LT && GET_CODE (op1) == CONST_INT && INTVAL (op1) == 1)
4466 code = LE, op1 = const0_rtx;
4467 else if (code == GT && GET_CODE (op1) == CONST_INT && INTVAL (op1) == -1)
4468 code = GE, op1 = const0_rtx;
4470 if (cmode == VOIDmode)
4471 cmode = GET_MODE (op0);
4473 if (swap_commutative_operands_p (op2, op3)
4474 && ((reversed = reversed_comparison_code_parts (code, op0, op1, NULL))
4483 if (mode == VOIDmode)
4484 mode = GET_MODE (op2);
4486 icode = addcc_optab->handlers[(int) mode].insn_code;
4488 if (icode == CODE_FOR_nothing)
4493 op2 = force_not_mem (op2);
4494 op3 = force_not_mem (op3);
4498 target = protect_from_queue (target, 1);
4500 target = gen_reg_rtx (mode);
4506 op2 = protect_from_queue (op2, 0);
4507 op3 = protect_from_queue (op3, 0);
4509 /* If the insn doesn't accept these operands, put them in pseudos. */
4511 if (! (*insn_data[icode].operand[0].predicate)
4512 (subtarget, insn_data[icode].operand[0].mode))
4513 subtarget = gen_reg_rtx (insn_data[icode].operand[0].mode);
4515 if (! (*insn_data[icode].operand[2].predicate)
4516 (op2, insn_data[icode].operand[2].mode))
4517 op2 = copy_to_mode_reg (insn_data[icode].operand[2].mode, op2);
4519 if (! (*insn_data[icode].operand[3].predicate)
4520 (op3, insn_data[icode].operand[3].mode))
4521 op3 = copy_to_mode_reg (insn_data[icode].operand[3].mode, op3);
4523 /* Everything should now be in the suitable form, so emit the compare insn
4524 and then the conditional move. */
4527 = compare_from_rtx (op0, op1, code, unsignedp, cmode, NULL_RTX);
4529 /* ??? Watch for const0_rtx (nop) and const_true_rtx (unconditional)? */
4530 /* We can get const0_rtx or const_true_rtx in some circumstances. Just
4531 return NULL and let the caller figure out how best to deal with this
4533 if (GET_CODE (comparison) != code)
4536 insn = GEN_FCN (icode) (subtarget, comparison, op2, op3);
4538 /* If that failed, then give up. */
4544 if (subtarget != target)
4545 convert_move (target, subtarget, 0);
4550 /* These functions attempt to generate an insn body, rather than
4551 emitting the insn, but if the gen function already emits them, we
4552 make no attempt to turn them back into naked patterns.
4554 They do not protect from queued increments,
4555 because they may be used 1) in protect_from_queue itself
4556 and 2) in other passes where there is no queue. */
4558 /* Generate and return an insn body to add Y to X. */
4561 gen_add2_insn (x, y)
4564 int icode = (int) add_optab->handlers[(int) GET_MODE (x)].insn_code;
4566 if (! ((*insn_data[icode].operand[0].predicate)
4567 (x, insn_data[icode].operand[0].mode))
4568 || ! ((*insn_data[icode].operand[1].predicate)
4569 (x, insn_data[icode].operand[1].mode))
4570 || ! ((*insn_data[icode].operand[2].predicate)
4571 (y, insn_data[icode].operand[2].mode)))
4574 return (GEN_FCN (icode) (x, x, y));
4577 /* Generate and return an insn body to add r1 and c,
4578 storing the result in r0. */
4580 gen_add3_insn (r0, r1, c)
4583 int icode = (int) add_optab->handlers[(int) GET_MODE (r0)].insn_code;
4585 if (icode == CODE_FOR_nothing
4586 || ! ((*insn_data[icode].operand[0].predicate)
4587 (r0, insn_data[icode].operand[0].mode))
4588 || ! ((*insn_data[icode].operand[1].predicate)
4589 (r1, insn_data[icode].operand[1].mode))
4590 || ! ((*insn_data[icode].operand[2].predicate)
4591 (c, insn_data[icode].operand[2].mode)))
4594 return (GEN_FCN (icode) (r0, r1, c));
4598 have_add2_insn (x, y)
4603 if (GET_MODE (x) == VOIDmode)
4606 icode = (int) add_optab->handlers[(int) GET_MODE (x)].insn_code;
4608 if (icode == CODE_FOR_nothing)
4611 if (! ((*insn_data[icode].operand[0].predicate)
4612 (x, insn_data[icode].operand[0].mode))
4613 || ! ((*insn_data[icode].operand[1].predicate)
4614 (x, insn_data[icode].operand[1].mode))
4615 || ! ((*insn_data[icode].operand[2].predicate)
4616 (y, insn_data[icode].operand[2].mode)))
4622 /* Generate and return an insn body to subtract Y from X. */
4625 gen_sub2_insn (x, y)
4628 int icode = (int) sub_optab->handlers[(int) GET_MODE (x)].insn_code;
4630 if (! ((*insn_data[icode].operand[0].predicate)
4631 (x, insn_data[icode].operand[0].mode))
4632 || ! ((*insn_data[icode].operand[1].predicate)
4633 (x, insn_data[icode].operand[1].mode))
4634 || ! ((*insn_data[icode].operand[2].predicate)
4635 (y, insn_data[icode].operand[2].mode)))
4638 return (GEN_FCN (icode) (x, x, y));
4641 /* Generate and return an insn body to subtract r1 and c,
4642 storing the result in r0. */
4644 gen_sub3_insn (r0, r1, c)
4647 int icode = (int) sub_optab->handlers[(int) GET_MODE (r0)].insn_code;
4649 if (icode == CODE_FOR_nothing
4650 || ! ((*insn_data[icode].operand[0].predicate)
4651 (r0, insn_data[icode].operand[0].mode))
4652 || ! ((*insn_data[icode].operand[1].predicate)
4653 (r1, insn_data[icode].operand[1].mode))
4654 || ! ((*insn_data[icode].operand[2].predicate)
4655 (c, insn_data[icode].operand[2].mode)))
4658 return (GEN_FCN (icode) (r0, r1, c));
4662 have_sub2_insn (x, y)
4667 if (GET_MODE (x) == VOIDmode)
4670 icode = (int) sub_optab->handlers[(int) GET_MODE (x)].insn_code;
4672 if (icode == CODE_FOR_nothing)
4675 if (! ((*insn_data[icode].operand[0].predicate)
4676 (x, insn_data[icode].operand[0].mode))
4677 || ! ((*insn_data[icode].operand[1].predicate)
4678 (x, insn_data[icode].operand[1].mode))
4679 || ! ((*insn_data[icode].operand[2].predicate)
4680 (y, insn_data[icode].operand[2].mode)))
4686 /* Generate the body of an instruction to copy Y into X.
4687 It may be a list of insns, if one insn isn't enough. */
4690 gen_move_insn (x, y)
4696 emit_move_insn_1 (x, y);
4702 /* Return the insn code used to extend FROM_MODE to TO_MODE.
4703 UNSIGNEDP specifies zero-extension instead of sign-extension. If
4704 no such operation exists, CODE_FOR_nothing will be returned. */
4707 can_extend_p (to_mode, from_mode, unsignedp)
4708 enum machine_mode to_mode, from_mode;
4711 #ifdef HAVE_ptr_extend
4713 return CODE_FOR_ptr_extend;
4716 return extendtab[(int) to_mode][(int) from_mode][unsignedp != 0];
4719 /* Generate the body of an insn to extend Y (with mode MFROM)
4720 into X (with mode MTO). Do zero-extension if UNSIGNEDP is nonzero. */
4723 gen_extend_insn (x, y, mto, mfrom, unsignedp)
4725 enum machine_mode mto, mfrom;
4728 return (GEN_FCN (extendtab[(int) mto][(int) mfrom][unsignedp != 0]) (x, y));
4731 /* can_fix_p and can_float_p say whether the target machine
4732 can directly convert a given fixed point type to
4733 a given floating point type, or vice versa.
4734 The returned value is the CODE_FOR_... value to use,
4735 or CODE_FOR_nothing if these modes cannot be directly converted.
4737 *TRUNCP_PTR is set to 1 if it is necessary to output
4738 an explicit FTRUNC insn before the fix insn; otherwise 0. */
4740 static enum insn_code
4741 can_fix_p (fixmode, fltmode, unsignedp, truncp_ptr)
4742 enum machine_mode fltmode, fixmode;
4747 if (fixtrunctab[(int) fltmode][(int) fixmode][unsignedp != 0]
4748 != CODE_FOR_nothing)
4749 return fixtrunctab[(int) fltmode][(int) fixmode][unsignedp != 0];
4751 if (ftrunc_optab->handlers[(int) fltmode].insn_code != CODE_FOR_nothing)
4754 return fixtab[(int) fltmode][(int) fixmode][unsignedp != 0];
4756 return CODE_FOR_nothing;
4759 static enum insn_code
4760 can_float_p (fltmode, fixmode, unsignedp)
4761 enum machine_mode fixmode, fltmode;
4764 return floattab[(int) fltmode][(int) fixmode][unsignedp != 0];
4767 /* Generate code to convert FROM to floating point
4768 and store in TO. FROM must be fixed point and not VOIDmode.
4769 UNSIGNEDP nonzero means regard FROM as unsigned.
4770 Normally this is done by correcting the final value
4771 if it is negative. */
4774 expand_float (to, from, unsignedp)
4778 enum insn_code icode;
4780 enum machine_mode fmode, imode;
4782 /* Crash now, because we won't be able to decide which mode to use. */
4783 if (GET_MODE (from) == VOIDmode)
4786 /* Look for an insn to do the conversion. Do it in the specified
4787 modes if possible; otherwise convert either input, output or both to
4788 wider mode. If the integer mode is wider than the mode of FROM,
4789 we can do the conversion signed even if the input is unsigned. */
4791 for (fmode = GET_MODE (to); fmode != VOIDmode;
4792 fmode = GET_MODE_WIDER_MODE (fmode))
4793 for (imode = GET_MODE (from); imode != VOIDmode;
4794 imode = GET_MODE_WIDER_MODE (imode))
4796 int doing_unsigned = unsignedp;
4798 if (fmode != GET_MODE (to)
4799 && significand_size (fmode) < GET_MODE_BITSIZE (GET_MODE (from)))
4802 icode = can_float_p (fmode, imode, unsignedp);
4803 if (icode == CODE_FOR_nothing && imode != GET_MODE (from) && unsignedp)
4804 icode = can_float_p (fmode, imode, 0), doing_unsigned = 0;
4806 if (icode != CODE_FOR_nothing)
4808 to = protect_from_queue (to, 1);
4809 from = protect_from_queue (from, 0);
4811 if (imode != GET_MODE (from))
4812 from = convert_to_mode (imode, from, unsignedp);
4814 if (fmode != GET_MODE (to))
4815 target = gen_reg_rtx (fmode);
4817 emit_unop_insn (icode, target, from,
4818 doing_unsigned ? UNSIGNED_FLOAT : FLOAT);
4821 convert_move (to, target, 0);
4826 /* Unsigned integer, and no way to convert directly.
4827 Convert as signed, then conditionally adjust the result. */
4830 rtx label = gen_label_rtx ();
4832 REAL_VALUE_TYPE offset;
4836 to = protect_from_queue (to, 1);
4837 from = protect_from_queue (from, 0);
4840 from = force_not_mem (from);
4842 /* Look for a usable floating mode FMODE wider than the source and at
4843 least as wide as the target. Using FMODE will avoid rounding woes
4844 with unsigned values greater than the signed maximum value. */
4846 for (fmode = GET_MODE (to); fmode != VOIDmode;
4847 fmode = GET_MODE_WIDER_MODE (fmode))
4848 if (GET_MODE_BITSIZE (GET_MODE (from)) < GET_MODE_BITSIZE (fmode)
4849 && can_float_p (fmode, GET_MODE (from), 0) != CODE_FOR_nothing)
4852 if (fmode == VOIDmode)
4854 /* There is no such mode. Pretend the target is wide enough. */
4855 fmode = GET_MODE (to);
4857 /* Avoid double-rounding when TO is narrower than FROM. */
4858 if ((significand_size (fmode) + 1)
4859 < GET_MODE_BITSIZE (GET_MODE (from)))
4862 rtx neglabel = gen_label_rtx ();
4864 /* Don't use TARGET if it isn't a register, is a hard register,
4865 or is the wrong mode. */
4866 if (GET_CODE (target) != REG
4867 || REGNO (target) < FIRST_PSEUDO_REGISTER
4868 || GET_MODE (target) != fmode)
4869 target = gen_reg_rtx (fmode);
4871 imode = GET_MODE (from);
4872 do_pending_stack_adjust ();
4874 /* Test whether the sign bit is set. */
4875 emit_cmp_and_jump_insns (from, const0_rtx, LT, NULL_RTX, imode,
4878 /* The sign bit is not set. Convert as signed. */
4879 expand_float (target, from, 0);
4880 emit_jump_insn (gen_jump (label));
4883 /* The sign bit is set.
4884 Convert to a usable (positive signed) value by shifting right
4885 one bit, while remembering if a nonzero bit was shifted
4886 out; i.e., compute (from & 1) | (from >> 1). */
4888 emit_label (neglabel);
4889 temp = expand_binop (imode, and_optab, from, const1_rtx,
4890 NULL_RTX, 1, OPTAB_LIB_WIDEN);
4891 temp1 = expand_shift (RSHIFT_EXPR, imode, from, integer_one_node,
4893 temp = expand_binop (imode, ior_optab, temp, temp1, temp, 1,
4895 expand_float (target, temp, 0);
4897 /* Multiply by 2 to undo the shift above. */
4898 temp = expand_binop (fmode, add_optab, target, target,
4899 target, 0, OPTAB_LIB_WIDEN);
4901 emit_move_insn (target, temp);
4903 do_pending_stack_adjust ();
4909 /* If we are about to do some arithmetic to correct for an
4910 unsigned operand, do it in a pseudo-register. */
4912 if (GET_MODE (to) != fmode
4913 || GET_CODE (to) != REG || REGNO (to) < FIRST_PSEUDO_REGISTER)
4914 target = gen_reg_rtx (fmode);
4916 /* Convert as signed integer to floating. */
4917 expand_float (target, from, 0);
4919 /* If FROM is negative (and therefore TO is negative),
4920 correct its value by 2**bitwidth. */
4922 do_pending_stack_adjust ();
4923 emit_cmp_and_jump_insns (from, const0_rtx, GE, NULL_RTX, GET_MODE (from),
4927 real_2expN (&offset, GET_MODE_BITSIZE (GET_MODE (from)));
4928 temp = expand_binop (fmode, add_optab, target,
4929 CONST_DOUBLE_FROM_REAL_VALUE (offset, fmode),
4930 target, 0, OPTAB_LIB_WIDEN);
4932 emit_move_insn (target, temp);
4934 do_pending_stack_adjust ();
4939 /* No hardware instruction available; call a library routine to convert from
4940 SImode, DImode, or TImode into SFmode, DFmode, XFmode, or TFmode. */
4946 to = protect_from_queue (to, 1);
4947 from = protect_from_queue (from, 0);
4949 if (GET_MODE_SIZE (GET_MODE (from)) < GET_MODE_SIZE (SImode))
4950 from = convert_to_mode (SImode, from, unsignedp);
4953 from = force_not_mem (from);
4955 if (GET_MODE (to) == SFmode)
4957 if (GET_MODE (from) == SImode)
4958 libfcn = floatsisf_libfunc;
4959 else if (GET_MODE (from) == DImode)
4960 libfcn = floatdisf_libfunc;
4961 else if (GET_MODE (from) == TImode)
4962 libfcn = floattisf_libfunc;
4966 else if (GET_MODE (to) == DFmode)
4968 if (GET_MODE (from) == SImode)
4969 libfcn = floatsidf_libfunc;
4970 else if (GET_MODE (from) == DImode)
4971 libfcn = floatdidf_libfunc;
4972 else if (GET_MODE (from) == TImode)
4973 libfcn = floattidf_libfunc;
4977 else if (GET_MODE (to) == XFmode)
4979 if (GET_MODE (from) == SImode)
4980 libfcn = floatsixf_libfunc;
4981 else if (GET_MODE (from) == DImode)
4982 libfcn = floatdixf_libfunc;
4983 else if (GET_MODE (from) == TImode)
4984 libfcn = floattixf_libfunc;
4988 else if (GET_MODE (to) == TFmode)
4990 if (GET_MODE (from) == SImode)
4991 libfcn = floatsitf_libfunc;
4992 else if (GET_MODE (from) == DImode)
4993 libfcn = floatditf_libfunc;
4994 else if (GET_MODE (from) == TImode)
4995 libfcn = floattitf_libfunc;
5004 value = emit_library_call_value (libfcn, NULL_RTX, LCT_CONST,
5005 GET_MODE (to), 1, from,
5007 insns = get_insns ();
5010 emit_libcall_block (insns, target, value,
5011 gen_rtx_FLOAT (GET_MODE (to), from));
5016 /* Copy result to requested destination
5017 if we have been computing in a temp location. */
5021 if (GET_MODE (target) == GET_MODE (to))
5022 emit_move_insn (to, target);
5024 convert_move (to, target, 0);
5028 /* expand_fix: generate code to convert FROM to fixed point
5029 and store in TO. FROM must be floating point. */
5035 rtx temp = gen_reg_rtx (GET_MODE (x));
5036 return expand_unop (GET_MODE (x), ftrunc_optab, x, temp, 0);
5040 expand_fix (to, from, unsignedp)
5044 enum insn_code icode;
5046 enum machine_mode fmode, imode;
5050 /* We first try to find a pair of modes, one real and one integer, at
5051 least as wide as FROM and TO, respectively, in which we can open-code
5052 this conversion. If the integer mode is wider than the mode of TO,
5053 we can do the conversion either signed or unsigned. */
5055 for (fmode = GET_MODE (from); fmode != VOIDmode;
5056 fmode = GET_MODE_WIDER_MODE (fmode))
5057 for (imode = GET_MODE (to); imode != VOIDmode;
5058 imode = GET_MODE_WIDER_MODE (imode))
5060 int doing_unsigned = unsignedp;
5062 icode = can_fix_p (imode, fmode, unsignedp, &must_trunc);
5063 if (icode == CODE_FOR_nothing && imode != GET_MODE (to) && unsignedp)
5064 icode = can_fix_p (imode, fmode, 0, &must_trunc), doing_unsigned = 0;
5066 if (icode != CODE_FOR_nothing)
5068 to = protect_from_queue (to, 1);
5069 from = protect_from_queue (from, 0);
5071 if (fmode != GET_MODE (from))
5072 from = convert_to_mode (fmode, from, 0);
5075 from = ftruncify (from);
5077 if (imode != GET_MODE (to))
5078 target = gen_reg_rtx (imode);
5080 emit_unop_insn (icode, target, from,
5081 doing_unsigned ? UNSIGNED_FIX : FIX);
5083 convert_move (to, target, unsignedp);
5088 /* For an unsigned conversion, there is one more way to do it.
5089 If we have a signed conversion, we generate code that compares
5090 the real value to the largest representable positive number. If if
5091 is smaller, the conversion is done normally. Otherwise, subtract
5092 one plus the highest signed number, convert, and add it back.
5094 We only need to check all real modes, since we know we didn't find
5095 anything with a wider integer mode.
5097 This code used to extend FP value into mode wider than the destination.
5098 This is not needed. Consider, for instance conversion from SFmode
5101 The hot path trought the code is dealing with inputs smaller than 2^63
5102 and doing just the conversion, so there is no bits to lose.
5104 In the other path we know the value is positive in the range 2^63..2^64-1
5105 inclusive. (as for other imput overflow happens and result is undefined)
5106 So we know that the most important bit set in mantisa corresponds to
5107 2^63. The subtraction of 2^63 should not generate any rounding as it
5108 simply clears out that bit. The rest is trivial. */
5110 if (unsignedp && GET_MODE_BITSIZE (GET_MODE (to)) <= HOST_BITS_PER_WIDE_INT)
5111 for (fmode = GET_MODE (from); fmode != VOIDmode;
5112 fmode = GET_MODE_WIDER_MODE (fmode))
5113 if (CODE_FOR_nothing != can_fix_p (GET_MODE (to), fmode, 0,
5117 REAL_VALUE_TYPE offset;
5118 rtx limit, lab1, lab2, insn;
5120 bitsize = GET_MODE_BITSIZE (GET_MODE (to));
5121 real_2expN (&offset, bitsize - 1);
5122 limit = CONST_DOUBLE_FROM_REAL_VALUE (offset, fmode);
5123 lab1 = gen_label_rtx ();
5124 lab2 = gen_label_rtx ();
5127 to = protect_from_queue (to, 1);
5128 from = protect_from_queue (from, 0);
5131 from = force_not_mem (from);
5133 if (fmode != GET_MODE (from))
5134 from = convert_to_mode (fmode, from, 0);
5136 /* See if we need to do the subtraction. */
5137 do_pending_stack_adjust ();
5138 emit_cmp_and_jump_insns (from, limit, GE, NULL_RTX, GET_MODE (from),
5141 /* If not, do the signed "fix" and branch around fixup code. */
5142 expand_fix (to, from, 0);
5143 emit_jump_insn (gen_jump (lab2));
5146 /* Otherwise, subtract 2**(N-1), convert to signed number,
5147 then add 2**(N-1). Do the addition using XOR since this
5148 will often generate better code. */
5150 target = expand_binop (GET_MODE (from), sub_optab, from, limit,
5151 NULL_RTX, 0, OPTAB_LIB_WIDEN);
5152 expand_fix (to, target, 0);
5153 target = expand_binop (GET_MODE (to), xor_optab, to,
5155 ((HOST_WIDE_INT) 1 << (bitsize - 1),
5157 to, 1, OPTAB_LIB_WIDEN);
5160 emit_move_insn (to, target);
5164 if (mov_optab->handlers[(int) GET_MODE (to)].insn_code
5165 != CODE_FOR_nothing)
5167 /* Make a place for a REG_NOTE and add it. */
5168 insn = emit_move_insn (to, to);
5169 set_unique_reg_note (insn,
5171 gen_rtx_fmt_e (UNSIGNED_FIX,
5179 /* We can't do it with an insn, so use a library call. But first ensure
5180 that the mode of TO is at least as wide as SImode, since those are the
5181 only library calls we know about. */
5183 if (GET_MODE_SIZE (GET_MODE (to)) < GET_MODE_SIZE (SImode))
5185 target = gen_reg_rtx (SImode);
5187 expand_fix (target, from, unsignedp);
5189 else if (GET_MODE (from) == SFmode)
5191 if (GET_MODE (to) == SImode)
5192 libfcn = unsignedp ? fixunssfsi_libfunc : fixsfsi_libfunc;
5193 else if (GET_MODE (to) == DImode)
5194 libfcn = unsignedp ? fixunssfdi_libfunc : fixsfdi_libfunc;
5195 else if (GET_MODE (to) == TImode)
5196 libfcn = unsignedp ? fixunssfti_libfunc : fixsfti_libfunc;
5200 else if (GET_MODE (from) == DFmode)
5202 if (GET_MODE (to) == SImode)
5203 libfcn = unsignedp ? fixunsdfsi_libfunc : fixdfsi_libfunc;
5204 else if (GET_MODE (to) == DImode)
5205 libfcn = unsignedp ? fixunsdfdi_libfunc : fixdfdi_libfunc;
5206 else if (GET_MODE (to) == TImode)
5207 libfcn = unsignedp ? fixunsdfti_libfunc : fixdfti_libfunc;
5211 else if (GET_MODE (from) == XFmode)
5213 if (GET_MODE (to) == SImode)
5214 libfcn = unsignedp ? fixunsxfsi_libfunc : fixxfsi_libfunc;
5215 else if (GET_MODE (to) == DImode)
5216 libfcn = unsignedp ? fixunsxfdi_libfunc : fixxfdi_libfunc;
5217 else if (GET_MODE (to) == TImode)
5218 libfcn = unsignedp ? fixunsxfti_libfunc : fixxfti_libfunc;
5222 else if (GET_MODE (from) == TFmode)
5224 if (GET_MODE (to) == SImode)
5225 libfcn = unsignedp ? fixunstfsi_libfunc : fixtfsi_libfunc;
5226 else if (GET_MODE (to) == DImode)
5227 libfcn = unsignedp ? fixunstfdi_libfunc : fixtfdi_libfunc;
5228 else if (GET_MODE (to) == TImode)
5229 libfcn = unsignedp ? fixunstfti_libfunc : fixtfti_libfunc;
5241 to = protect_from_queue (to, 1);
5242 from = protect_from_queue (from, 0);
5245 from = force_not_mem (from);
5249 value = emit_library_call_value (libfcn, NULL_RTX, LCT_CONST,
5250 GET_MODE (to), 1, from,
5252 insns = get_insns ();
5255 emit_libcall_block (insns, target, value,
5256 gen_rtx_fmt_e (unsignedp ? UNSIGNED_FIX : FIX,
5257 GET_MODE (to), from));
5262 if (GET_MODE (to) == GET_MODE (target))
5263 emit_move_insn (to, target);
5265 convert_move (to, target, 0);
5269 /* Report whether we have an instruction to perform the operation
5270 specified by CODE on operands of mode MODE. */
5272 have_insn_for (code, mode)
5274 enum machine_mode mode;
5276 return (code_to_optab[(int) code] != 0
5277 && (code_to_optab[(int) code]->handlers[(int) mode].insn_code
5278 != CODE_FOR_nothing));
5281 /* Create a blank optab. */
5286 optab op = (optab) ggc_alloc (sizeof (struct optab));
5287 for (i = 0; i < NUM_MACHINE_MODES; i++)
5289 op->handlers[i].insn_code = CODE_FOR_nothing;
5290 op->handlers[i].libfunc = 0;
5296 /* Same, but fill in its code as CODE, and write it into the
5297 code_to_optab table. */
5302 optab op = new_optab ();
5304 code_to_optab[(int) code] = op;
5308 /* Same, but fill in its code as CODE, and do _not_ write it into
5309 the code_to_optab table. */
5314 optab op = new_optab ();
5319 /* Initialize the libfunc fields of an entire group of entries in some
5320 optab. Each entry is set equal to a string consisting of a leading
5321 pair of underscores followed by a generic operation name followed by
5322 a mode name (downshifted to lower case) followed by a single character
5323 representing the number of operands for the given operation (which is
5324 usually one of the characters '2', '3', or '4').
5326 OPTABLE is the table in which libfunc fields are to be initialized.
5327 FIRST_MODE is the first machine mode index in the given optab to
5329 LAST_MODE is the last machine mode index in the given optab to
5331 OPNAME is the generic (string) name of the operation.
5332 SUFFIX is the character which specifies the number of operands for
5333 the given generic operation.
5337 init_libfuncs (optable, first_mode, last_mode, opname, suffix)
5345 unsigned opname_len = strlen (opname);
5347 for (mode = first_mode; (int) mode <= (int) last_mode;
5348 mode = (enum machine_mode) ((int) mode + 1))
5350 const char *mname = GET_MODE_NAME (mode);
5351 unsigned mname_len = strlen (mname);
5352 char *libfunc_name = alloca (2 + opname_len + mname_len + 1 + 1);
5359 for (q = opname; *q; )
5361 for (q = mname; *q; q++)
5362 *p++ = TOLOWER (*q);
5366 optable->handlers[(int) mode].libfunc
5367 = init_one_libfunc (ggc_alloc_string (libfunc_name, p - libfunc_name));
5371 /* Initialize the libfunc fields of an entire group of entries in some
5372 optab which correspond to all integer mode operations. The parameters
5373 have the same meaning as similarly named ones for the `init_libfuncs'
5374 routine. (See above). */
5377 init_integral_libfuncs (optable, opname, suffix)
5382 int maxsize = 2*BITS_PER_WORD;
5383 if (maxsize < LONG_LONG_TYPE_SIZE)
5384 maxsize = LONG_LONG_TYPE_SIZE;
5385 init_libfuncs (optable, word_mode,
5386 mode_for_size (maxsize, MODE_INT, 0),
5390 /* Initialize the libfunc fields of an entire group of entries in some
5391 optab which correspond to all real mode operations. The parameters
5392 have the same meaning as similarly named ones for the `init_libfuncs'
5393 routine. (See above). */
5396 init_floating_libfuncs (optable, opname, suffix)
5401 enum machine_mode fmode, dmode, lmode;
5403 fmode = float_type_node ? TYPE_MODE (float_type_node) : VOIDmode;
5404 dmode = double_type_node ? TYPE_MODE (double_type_node) : VOIDmode;
5405 lmode = long_double_type_node ? TYPE_MODE (long_double_type_node) : VOIDmode;
5407 if (fmode != VOIDmode)
5408 init_libfuncs (optable, fmode, fmode, opname, suffix);
5409 if (dmode != fmode && dmode != VOIDmode)
5410 init_libfuncs (optable, dmode, dmode, opname, suffix);
5411 if (lmode != dmode && lmode != VOIDmode)
5412 init_libfuncs (optable, lmode, lmode, opname, suffix);
5416 init_one_libfunc (name)
5421 /* Create a FUNCTION_DECL that can be passed to
5422 targetm.encode_section_info. */
5423 /* ??? We don't have any type information except for this is
5424 a function. Pretend this is "int foo()". */
5425 tree decl = build_decl (FUNCTION_DECL, get_identifier (name),
5426 build_function_type (integer_type_node, NULL_TREE));
5427 DECL_ARTIFICIAL (decl) = 1;
5428 DECL_EXTERNAL (decl) = 1;
5429 TREE_PUBLIC (decl) = 1;
5431 symbol = XEXP (DECL_RTL (decl), 0);
5433 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
5434 are the flags assigned by targetm.encode_section_info. */
5435 SYMBOL_REF_DECL (symbol) = 0;
5440 /* Call this once to initialize the contents of the optabs
5441 appropriately for the current target machine. */
5446 unsigned int i, j, k;
5448 /* Start by initializing all tables to contain CODE_FOR_nothing. */
5450 for (i = 0; i < ARRAY_SIZE (fixtab); i++)
5451 for (j = 0; j < ARRAY_SIZE (fixtab[0]); j++)
5452 for (k = 0; k < ARRAY_SIZE (fixtab[0][0]); k++)
5453 fixtab[i][j][k] = CODE_FOR_nothing;
5455 for (i = 0; i < ARRAY_SIZE (fixtrunctab); i++)
5456 for (j = 0; j < ARRAY_SIZE (fixtrunctab[0]); j++)
5457 for (k = 0; k < ARRAY_SIZE (fixtrunctab[0][0]); k++)
5458 fixtrunctab[i][j][k] = CODE_FOR_nothing;
5460 for (i = 0; i < ARRAY_SIZE (floattab); i++)
5461 for (j = 0; j < ARRAY_SIZE (floattab[0]); j++)
5462 for (k = 0; k < ARRAY_SIZE (floattab[0][0]); k++)
5463 floattab[i][j][k] = CODE_FOR_nothing;
5465 for (i = 0; i < ARRAY_SIZE (extendtab); i++)
5466 for (j = 0; j < ARRAY_SIZE (extendtab[0]); j++)
5467 for (k = 0; k < ARRAY_SIZE (extendtab[0][0]); k++)
5468 extendtab[i][j][k] = CODE_FOR_nothing;
5470 for (i = 0; i < NUM_RTX_CODE; i++)
5471 setcc_gen_code[i] = CODE_FOR_nothing;
5473 #ifdef HAVE_conditional_move
5474 for (i = 0; i < NUM_MACHINE_MODES; i++)
5475 movcc_gen_code[i] = CODE_FOR_nothing;
5478 add_optab = init_optab (PLUS);
5479 addv_optab = init_optabv (PLUS);
5480 sub_optab = init_optab (MINUS);
5481 subv_optab = init_optabv (MINUS);
5482 smul_optab = init_optab (MULT);
5483 smulv_optab = init_optabv (MULT);
5484 smul_highpart_optab = init_optab (UNKNOWN);
5485 umul_highpart_optab = init_optab (UNKNOWN);
5486 smul_widen_optab = init_optab (UNKNOWN);
5487 umul_widen_optab = init_optab (UNKNOWN);
5488 sdiv_optab = init_optab (DIV);
5489 sdivv_optab = init_optabv (DIV);
5490 sdivmod_optab = init_optab (UNKNOWN);
5491 udiv_optab = init_optab (UDIV);
5492 udivmod_optab = init_optab (UNKNOWN);
5493 smod_optab = init_optab (MOD);
5494 umod_optab = init_optab (UMOD);
5495 ftrunc_optab = init_optab (UNKNOWN);
5496 and_optab = init_optab (AND);
5497 ior_optab = init_optab (IOR);
5498 xor_optab = init_optab (XOR);
5499 ashl_optab = init_optab (ASHIFT);
5500 ashr_optab = init_optab (ASHIFTRT);
5501 lshr_optab = init_optab (LSHIFTRT);
5502 rotl_optab = init_optab (ROTATE);
5503 rotr_optab = init_optab (ROTATERT);
5504 smin_optab = init_optab (SMIN);
5505 smax_optab = init_optab (SMAX);
5506 umin_optab = init_optab (UMIN);
5507 umax_optab = init_optab (UMAX);
5508 pow_optab = init_optab (UNKNOWN);
5509 atan2_optab = init_optab (UNKNOWN);
5511 /* These three have codes assigned exclusively for the sake of
5513 mov_optab = init_optab (SET);
5514 movstrict_optab = init_optab (STRICT_LOW_PART);
5515 cmp_optab = init_optab (COMPARE);
5517 ucmp_optab = init_optab (UNKNOWN);
5518 tst_optab = init_optab (UNKNOWN);
5519 neg_optab = init_optab (NEG);
5520 negv_optab = init_optabv (NEG);
5521 abs_optab = init_optab (ABS);
5522 absv_optab = init_optabv (ABS);
5523 addcc_optab = init_optab (UNKNOWN);
5524 one_cmpl_optab = init_optab (NOT);
5525 ffs_optab = init_optab (FFS);
5526 clz_optab = init_optab (CLZ);
5527 ctz_optab = init_optab (CTZ);
5528 popcount_optab = init_optab (POPCOUNT);
5529 parity_optab = init_optab (PARITY);
5530 sqrt_optab = init_optab (SQRT);
5531 floor_optab = init_optab (UNKNOWN);
5532 ceil_optab = init_optab (UNKNOWN);
5533 round_optab = init_optab (UNKNOWN);
5534 trunc_optab = init_optab (UNKNOWN);
5535 nearbyint_optab = init_optab (UNKNOWN);
5536 sin_optab = init_optab (UNKNOWN);
5537 cos_optab = init_optab (UNKNOWN);
5538 exp_optab = init_optab (UNKNOWN);
5539 log_optab = init_optab (UNKNOWN);
5540 strlen_optab = init_optab (UNKNOWN);
5541 cbranch_optab = init_optab (UNKNOWN);
5542 cmov_optab = init_optab (UNKNOWN);
5543 cstore_optab = init_optab (UNKNOWN);
5544 push_optab = init_optab (UNKNOWN);
5546 for (i = 0; i < NUM_MACHINE_MODES; i++)
5548 movstr_optab[i] = CODE_FOR_nothing;
5549 clrstr_optab[i] = CODE_FOR_nothing;
5551 #ifdef HAVE_SECONDARY_RELOADS
5552 reload_in_optab[i] = reload_out_optab[i] = CODE_FOR_nothing;
5556 /* Fill in the optabs with the insns we support. */
5559 #ifdef FIXUNS_TRUNC_LIKE_FIX_TRUNC
5560 /* This flag says the same insns that convert to a signed fixnum
5561 also convert validly to an unsigned one. */
5562 for (i = 0; i < NUM_MACHINE_MODES; i++)
5563 for (j = 0; j < NUM_MACHINE_MODES; j++)
5564 fixtrunctab[i][j][1] = fixtrunctab[i][j][0];
5567 /* Initialize the optabs with the names of the library functions. */
5568 init_integral_libfuncs (add_optab, "add", '3');
5569 init_floating_libfuncs (add_optab, "add", '3');
5570 init_integral_libfuncs (addv_optab, "addv", '3');
5571 init_floating_libfuncs (addv_optab, "add", '3');
5572 init_integral_libfuncs (sub_optab, "sub", '3');
5573 init_floating_libfuncs (sub_optab, "sub", '3');
5574 init_integral_libfuncs (subv_optab, "subv", '3');
5575 init_floating_libfuncs (subv_optab, "sub", '3');
5576 init_integral_libfuncs (smul_optab, "mul", '3');
5577 init_floating_libfuncs (smul_optab, "mul", '3');
5578 init_integral_libfuncs (smulv_optab, "mulv", '3');
5579 init_floating_libfuncs (smulv_optab, "mul", '3');
5580 init_integral_libfuncs (sdiv_optab, "div", '3');
5581 init_floating_libfuncs (sdiv_optab, "div", '3');
5582 init_integral_libfuncs (sdivv_optab, "divv", '3');
5583 init_integral_libfuncs (udiv_optab, "udiv", '3');
5584 init_integral_libfuncs (sdivmod_optab, "divmod", '4');
5585 init_integral_libfuncs (udivmod_optab, "udivmod", '4');
5586 init_integral_libfuncs (smod_optab, "mod", '3');
5587 init_integral_libfuncs (umod_optab, "umod", '3');
5588 init_floating_libfuncs (ftrunc_optab, "ftrunc", '2');
5589 init_integral_libfuncs (and_optab, "and", '3');
5590 init_integral_libfuncs (ior_optab, "ior", '3');
5591 init_integral_libfuncs (xor_optab, "xor", '3');
5592 init_integral_libfuncs (ashl_optab, "ashl", '3');
5593 init_integral_libfuncs (ashr_optab, "ashr", '3');
5594 init_integral_libfuncs (lshr_optab, "lshr", '3');
5595 init_integral_libfuncs (smin_optab, "min", '3');
5596 init_floating_libfuncs (smin_optab, "min", '3');
5597 init_integral_libfuncs (smax_optab, "max", '3');
5598 init_floating_libfuncs (smax_optab, "max", '3');
5599 init_integral_libfuncs (umin_optab, "umin", '3');
5600 init_integral_libfuncs (umax_optab, "umax", '3');
5601 init_integral_libfuncs (neg_optab, "neg", '2');
5602 init_floating_libfuncs (neg_optab, "neg", '2');
5603 init_integral_libfuncs (negv_optab, "negv", '2');
5604 init_floating_libfuncs (negv_optab, "neg", '2');
5605 init_integral_libfuncs (one_cmpl_optab, "one_cmpl", '2');
5606 init_integral_libfuncs (ffs_optab, "ffs", '2');
5607 init_integral_libfuncs (clz_optab, "clz", '2');
5608 init_integral_libfuncs (ctz_optab, "ctz", '2');
5609 init_integral_libfuncs (popcount_optab, "popcount", '2');
5610 init_integral_libfuncs (parity_optab, "parity", '2');
5612 /* Comparison libcalls for integers MUST come in pairs, signed/unsigned. */
5613 init_integral_libfuncs (cmp_optab, "cmp", '2');
5614 init_integral_libfuncs (ucmp_optab, "ucmp", '2');
5615 init_floating_libfuncs (cmp_optab, "cmp", '2');
5617 #ifdef MULSI3_LIBCALL
5618 smul_optab->handlers[(int) SImode].libfunc
5619 = init_one_libfunc (MULSI3_LIBCALL);
5621 #ifdef MULDI3_LIBCALL
5622 smul_optab->handlers[(int) DImode].libfunc
5623 = init_one_libfunc (MULDI3_LIBCALL);
5626 #ifdef DIVSI3_LIBCALL
5627 sdiv_optab->handlers[(int) SImode].libfunc
5628 = init_one_libfunc (DIVSI3_LIBCALL);
5630 #ifdef DIVDI3_LIBCALL
5631 sdiv_optab->handlers[(int) DImode].libfunc
5632 = init_one_libfunc (DIVDI3_LIBCALL);
5635 #ifdef UDIVSI3_LIBCALL
5636 udiv_optab->handlers[(int) SImode].libfunc
5637 = init_one_libfunc (UDIVSI3_LIBCALL);
5639 #ifdef UDIVDI3_LIBCALL
5640 udiv_optab->handlers[(int) DImode].libfunc
5641 = init_one_libfunc (UDIVDI3_LIBCALL);
5644 #ifdef MODSI3_LIBCALL
5645 smod_optab->handlers[(int) SImode].libfunc
5646 = init_one_libfunc (MODSI3_LIBCALL);
5648 #ifdef MODDI3_LIBCALL
5649 smod_optab->handlers[(int) DImode].libfunc
5650 = init_one_libfunc (MODDI3_LIBCALL);
5653 #ifdef UMODSI3_LIBCALL
5654 umod_optab->handlers[(int) SImode].libfunc
5655 = init_one_libfunc (UMODSI3_LIBCALL);
5657 #ifdef UMODDI3_LIBCALL
5658 umod_optab->handlers[(int) DImode].libfunc
5659 = init_one_libfunc (UMODDI3_LIBCALL);
5662 /* Use cabs for DC complex abs, since systems generally have cabs.
5663 Don't define any libcall for SCmode, so that cabs will be used. */
5664 abs_optab->handlers[(int) DCmode].libfunc
5665 = init_one_libfunc ("cabs");
5667 /* The ffs function operates on `int'. */
5668 ffs_optab->handlers[(int) mode_for_size (INT_TYPE_SIZE, MODE_INT, 0)].libfunc
5669 = init_one_libfunc ("ffs");
5671 extendsfdf2_libfunc = init_one_libfunc ("__extendsfdf2");
5672 extendsfxf2_libfunc = init_one_libfunc ("__extendsfxf2");
5673 extendsftf2_libfunc = init_one_libfunc ("__extendsftf2");
5674 extenddfxf2_libfunc = init_one_libfunc ("__extenddfxf2");
5675 extenddftf2_libfunc = init_one_libfunc ("__extenddftf2");
5677 truncdfsf2_libfunc = init_one_libfunc ("__truncdfsf2");
5678 truncxfsf2_libfunc = init_one_libfunc ("__truncxfsf2");
5679 trunctfsf2_libfunc = init_one_libfunc ("__trunctfsf2");
5680 truncxfdf2_libfunc = init_one_libfunc ("__truncxfdf2");
5681 trunctfdf2_libfunc = init_one_libfunc ("__trunctfdf2");
5683 abort_libfunc = init_one_libfunc ("abort");
5684 memcpy_libfunc = init_one_libfunc ("memcpy");
5685 memmove_libfunc = init_one_libfunc ("memmove");
5686 bcopy_libfunc = init_one_libfunc ("bcopy");
5687 memcmp_libfunc = init_one_libfunc ("memcmp");
5688 bcmp_libfunc = init_one_libfunc ("__gcc_bcmp");
5689 memset_libfunc = init_one_libfunc ("memset");
5690 bzero_libfunc = init_one_libfunc ("bzero");
5691 setbits_libfunc = init_one_libfunc ("__setbits");
5693 unwind_resume_libfunc = init_one_libfunc (USING_SJLJ_EXCEPTIONS
5694 ? "_Unwind_SjLj_Resume"
5695 : "_Unwind_Resume");
5696 #ifndef DONT_USE_BUILTIN_SETJMP
5697 setjmp_libfunc = init_one_libfunc ("__builtin_setjmp");
5698 longjmp_libfunc = init_one_libfunc ("__builtin_longjmp");
5700 setjmp_libfunc = init_one_libfunc ("setjmp");
5701 longjmp_libfunc = init_one_libfunc ("longjmp");
5703 unwind_sjlj_register_libfunc = init_one_libfunc ("_Unwind_SjLj_Register");
5704 unwind_sjlj_unregister_libfunc
5705 = init_one_libfunc ("_Unwind_SjLj_Unregister");
5707 eqhf2_libfunc = init_one_libfunc ("__eqhf2");
5708 nehf2_libfunc = init_one_libfunc ("__nehf2");
5709 gthf2_libfunc = init_one_libfunc ("__gthf2");
5710 gehf2_libfunc = init_one_libfunc ("__gehf2");
5711 lthf2_libfunc = init_one_libfunc ("__lthf2");
5712 lehf2_libfunc = init_one_libfunc ("__lehf2");
5713 unordhf2_libfunc = init_one_libfunc ("__unordhf2");
5715 eqsf2_libfunc = init_one_libfunc ("__eqsf2");
5716 nesf2_libfunc = init_one_libfunc ("__nesf2");
5717 gtsf2_libfunc = init_one_libfunc ("__gtsf2");
5718 gesf2_libfunc = init_one_libfunc ("__gesf2");
5719 ltsf2_libfunc = init_one_libfunc ("__ltsf2");
5720 lesf2_libfunc = init_one_libfunc ("__lesf2");
5721 unordsf2_libfunc = init_one_libfunc ("__unordsf2");
5723 eqdf2_libfunc = init_one_libfunc ("__eqdf2");
5724 nedf2_libfunc = init_one_libfunc ("__nedf2");
5725 gtdf2_libfunc = init_one_libfunc ("__gtdf2");
5726 gedf2_libfunc = init_one_libfunc ("__gedf2");
5727 ltdf2_libfunc = init_one_libfunc ("__ltdf2");
5728 ledf2_libfunc = init_one_libfunc ("__ledf2");
5729 unorddf2_libfunc = init_one_libfunc ("__unorddf2");
5731 eqxf2_libfunc = init_one_libfunc ("__eqxf2");
5732 nexf2_libfunc = init_one_libfunc ("__nexf2");
5733 gtxf2_libfunc = init_one_libfunc ("__gtxf2");
5734 gexf2_libfunc = init_one_libfunc ("__gexf2");
5735 ltxf2_libfunc = init_one_libfunc ("__ltxf2");
5736 lexf2_libfunc = init_one_libfunc ("__lexf2");
5737 unordxf2_libfunc = init_one_libfunc ("__unordxf2");
5739 eqtf2_libfunc = init_one_libfunc ("__eqtf2");
5740 netf2_libfunc = init_one_libfunc ("__netf2");
5741 gttf2_libfunc = init_one_libfunc ("__gttf2");
5742 getf2_libfunc = init_one_libfunc ("__getf2");
5743 lttf2_libfunc = init_one_libfunc ("__lttf2");
5744 letf2_libfunc = init_one_libfunc ("__letf2");
5745 unordtf2_libfunc = init_one_libfunc ("__unordtf2");
5747 floatsisf_libfunc = init_one_libfunc ("__floatsisf");
5748 floatdisf_libfunc = init_one_libfunc ("__floatdisf");
5749 floattisf_libfunc = init_one_libfunc ("__floattisf");
5751 floatsidf_libfunc = init_one_libfunc ("__floatsidf");
5752 floatdidf_libfunc = init_one_libfunc ("__floatdidf");
5753 floattidf_libfunc = init_one_libfunc ("__floattidf");
5755 floatsixf_libfunc = init_one_libfunc ("__floatsixf");
5756 floatdixf_libfunc = init_one_libfunc ("__floatdixf");
5757 floattixf_libfunc = init_one_libfunc ("__floattixf");
5759 floatsitf_libfunc = init_one_libfunc ("__floatsitf");
5760 floatditf_libfunc = init_one_libfunc ("__floatditf");
5761 floattitf_libfunc = init_one_libfunc ("__floattitf");
5763 fixsfsi_libfunc = init_one_libfunc ("__fixsfsi");
5764 fixsfdi_libfunc = init_one_libfunc ("__fixsfdi");
5765 fixsfti_libfunc = init_one_libfunc ("__fixsfti");
5767 fixdfsi_libfunc = init_one_libfunc ("__fixdfsi");
5768 fixdfdi_libfunc = init_one_libfunc ("__fixdfdi");
5769 fixdfti_libfunc = init_one_libfunc ("__fixdfti");
5771 fixxfsi_libfunc = init_one_libfunc ("__fixxfsi");
5772 fixxfdi_libfunc = init_one_libfunc ("__fixxfdi");
5773 fixxfti_libfunc = init_one_libfunc ("__fixxfti");
5775 fixtfsi_libfunc = init_one_libfunc ("__fixtfsi");
5776 fixtfdi_libfunc = init_one_libfunc ("__fixtfdi");
5777 fixtfti_libfunc = init_one_libfunc ("__fixtfti");
5779 fixunssfsi_libfunc = init_one_libfunc ("__fixunssfsi");
5780 fixunssfdi_libfunc = init_one_libfunc ("__fixunssfdi");
5781 fixunssfti_libfunc = init_one_libfunc ("__fixunssfti");
5783 fixunsdfsi_libfunc = init_one_libfunc ("__fixunsdfsi");
5784 fixunsdfdi_libfunc = init_one_libfunc ("__fixunsdfdi");
5785 fixunsdfti_libfunc = init_one_libfunc ("__fixunsdfti");
5787 fixunsxfsi_libfunc = init_one_libfunc ("__fixunsxfsi");
5788 fixunsxfdi_libfunc = init_one_libfunc ("__fixunsxfdi");
5789 fixunsxfti_libfunc = init_one_libfunc ("__fixunsxfti");
5791 fixunstfsi_libfunc = init_one_libfunc ("__fixunstfsi");
5792 fixunstfdi_libfunc = init_one_libfunc ("__fixunstfdi");
5793 fixunstfti_libfunc = init_one_libfunc ("__fixunstfti");
5795 /* For function entry/exit instrumentation. */
5796 profile_function_entry_libfunc
5797 = init_one_libfunc ("__cyg_profile_func_enter");
5798 profile_function_exit_libfunc
5799 = init_one_libfunc ("__cyg_profile_func_exit");
5801 gcov_flush_libfunc = init_one_libfunc ("__gcov_flush");
5802 gcov_init_libfunc = init_one_libfunc ("__gcov_init");
5804 #ifdef HAVE_conditional_trap
5808 #ifdef INIT_TARGET_OPTABS
5809 /* Allow the target to add more libcalls or rename some, etc. */
5814 static GTY(()) rtx trap_rtx;
5816 #ifdef HAVE_conditional_trap
5817 /* The insn generating function can not take an rtx_code argument.
5818 TRAP_RTX is used as an rtx argument. Its code is replaced with
5819 the code to be used in the trap insn and all other fields are
5825 if (HAVE_conditional_trap)
5827 trap_rtx = gen_rtx_fmt_ee (EQ, VOIDmode, NULL_RTX, NULL_RTX);
5832 /* Generate insns to trap with code TCODE if OP1 and OP2 satisfy condition
5833 CODE. Return 0 on failure. */
5836 gen_cond_trap (code, op1, op2, tcode)
5837 enum rtx_code code ATTRIBUTE_UNUSED;
5838 rtx op1, op2 ATTRIBUTE_UNUSED, tcode ATTRIBUTE_UNUSED;
5840 enum machine_mode mode = GET_MODE (op1);
5842 if (mode == VOIDmode)
5845 #ifdef HAVE_conditional_trap
5846 if (HAVE_conditional_trap
5847 && cmp_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
5851 emit_insn (GEN_FCN (cmp_optab->handlers[(int) mode].insn_code) (op1, op2));
5852 PUT_CODE (trap_rtx, code);
5853 insn = gen_conditional_trap (trap_rtx, tcode);
5857 insn = get_insns ();
5867 #include "gt-optabs.h"