1 /* Expand the basic unary and binary arithmetic operations, for GNU compiler.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
25 #include "coretypes.h"
29 /* Include insn-config.h before expr.h so that HAVE_conditional_move
30 is properly defined. */
31 #include "insn-config.h"
45 #include "basic-block.h"
48 /* Each optab contains info on how this target machine
49 can perform a particular operation
50 for all sizes and kinds of operands.
52 The operation to be performed is often specified
53 by passing one of these optabs as an argument.
55 See expr.h for documentation of these optabs. */
57 #if GCC_VERSION >= 4000
58 __extension__ struct optab optab_table[OTI_MAX]
59 = { [0 ... OTI_MAX - 1].handlers[0 ... NUM_MACHINE_MODES - 1].insn_code
62 /* init_insn_codes will do runtime initialization otherwise. */
63 struct optab optab_table[OTI_MAX];
66 rtx libfunc_table[LTI_MAX];
68 /* Tables of patterns for converting one mode to another. */
69 #if GCC_VERSION >= 4000
70 __extension__ struct convert_optab convert_optab_table[COI_MAX]
71 = { [0 ... COI_MAX - 1].handlers[0 ... NUM_MACHINE_MODES - 1]
72 [0 ... NUM_MACHINE_MODES - 1].insn_code
75 /* init_convert_optab will do runtime initialization otherwise. */
76 struct convert_optab convert_optab_table[COI_MAX];
79 /* Contains the optab used for each rtx code. */
80 optab code_to_optab[NUM_RTX_CODE + 1];
82 /* Indexed by the rtx-code for a conditional (eg. EQ, LT,...)
83 gives the gen_function to make a branch to test that condition. */
85 rtxfun bcc_gen_fctn[NUM_RTX_CODE];
87 /* Indexed by the rtx-code for a conditional (eg. EQ, LT,...)
88 gives the insn code to make a store-condition insn
89 to test that condition. */
91 enum insn_code setcc_gen_code[NUM_RTX_CODE];
93 #ifdef HAVE_conditional_move
94 /* Indexed by the machine mode, gives the insn code to make a conditional
95 move insn. This is not indexed by the rtx-code like bcc_gen_fctn and
96 setcc_gen_code to cut down on the number of named patterns. Consider a day
97 when a lot more rtx codes are conditional (eg: for the ARM). */
99 enum insn_code movcc_gen_code[NUM_MACHINE_MODES];
102 /* Indexed by the machine mode, gives the insn code for vector conditional
105 enum insn_code vcond_gen_code[NUM_MACHINE_MODES];
106 enum insn_code vcondu_gen_code[NUM_MACHINE_MODES];
108 /* The insn generating function can not take an rtx_code argument.
109 TRAP_RTX is used as an rtx argument. Its code is replaced with
110 the code to be used in the trap insn and all other fields are ignored. */
111 static GTY(()) rtx trap_rtx;
113 static void prepare_float_lib_cmp (rtx *, rtx *, enum rtx_code *,
114 enum machine_mode *, int *);
115 static rtx expand_unop_direct (enum machine_mode, optab, rtx, rtx, int);
117 /* Debug facility for use in GDB. */
118 void debug_optab_libfuncs (void);
120 #ifndef HAVE_conditional_trap
121 #define HAVE_conditional_trap 0
122 #define gen_conditional_trap(a,b) (gcc_unreachable (), NULL_RTX)
125 /* Prefixes for the current version of decimal floating point (BID vs. DPD) */
126 #if ENABLE_DECIMAL_BID_FORMAT
127 #define DECIMAL_PREFIX "bid_"
129 #define DECIMAL_PREFIX "dpd_"
133 /* Info about libfunc. We use same hashtable for normal optabs and conversion
134 optab. In the first case mode2 is unused. */
135 struct GTY(()) libfunc_entry {
137 enum machine_mode mode1, mode2;
141 /* Hash table used to convert declarations into nodes. */
142 static GTY((param_is (struct libfunc_entry))) htab_t libfunc_hash;
144 /* Used for attribute_hash. */
147 hash_libfunc (const void *p)
149 const struct libfunc_entry *const e = (const struct libfunc_entry *) p;
151 return (((int) e->mode1 + (int) e->mode2 * NUM_MACHINE_MODES)
155 /* Used for optab_hash. */
158 eq_libfunc (const void *p, const void *q)
160 const struct libfunc_entry *const e1 = (const struct libfunc_entry *) p;
161 const struct libfunc_entry *const e2 = (const struct libfunc_entry *) q;
163 return (e1->optab == e2->optab
164 && e1->mode1 == e2->mode1
165 && e1->mode2 == e2->mode2);
168 /* Return libfunc corresponding operation defined by OPTAB converting
169 from MODE2 to MODE1. Trigger lazy initialization if needed, return NULL
170 if no libfunc is available. */
172 convert_optab_libfunc (convert_optab optab, enum machine_mode mode1,
173 enum machine_mode mode2)
175 struct libfunc_entry e;
176 struct libfunc_entry **slot;
178 e.optab = (size_t) (optab - &convert_optab_table[0]);
181 slot = (struct libfunc_entry **) htab_find_slot (libfunc_hash, &e, NO_INSERT);
184 if (optab->libcall_gen)
186 optab->libcall_gen (optab, optab->libcall_basename, mode1, mode2);
187 slot = (struct libfunc_entry **) htab_find_slot (libfunc_hash, &e, NO_INSERT);
189 return (*slot)->libfunc;
195 return (*slot)->libfunc;
198 /* Return libfunc corresponding operation defined by OPTAB in MODE.
199 Trigger lazy initialization if needed, return NULL if no libfunc is
202 optab_libfunc (optab optab, enum machine_mode mode)
204 struct libfunc_entry e;
205 struct libfunc_entry **slot;
207 e.optab = (size_t) (optab - &optab_table[0]);
210 slot = (struct libfunc_entry **) htab_find_slot (libfunc_hash, &e, NO_INSERT);
213 if (optab->libcall_gen)
215 optab->libcall_gen (optab, optab->libcall_basename,
216 optab->libcall_suffix, mode);
217 slot = (struct libfunc_entry **) htab_find_slot (libfunc_hash,
220 return (*slot)->libfunc;
226 return (*slot)->libfunc;
230 /* Add a REG_EQUAL note to the last insn in INSNS. TARGET is being set to
231 the result of operation CODE applied to OP0 (and OP1 if it is a binary
234 If the last insn does not set TARGET, don't do anything, but return 1.
236 If a previous insn sets TARGET and TARGET is one of OP0 or OP1,
237 don't add the REG_EQUAL note but return 0. Our caller can then try
238 again, ensuring that TARGET is not one of the operands. */
241 add_equal_note (rtx insns, rtx target, enum rtx_code code, rtx op0, rtx op1)
243 rtx last_insn, insn, set;
246 gcc_assert (insns && INSN_P (insns) && NEXT_INSN (insns));
248 if (GET_RTX_CLASS (code) != RTX_COMM_ARITH
249 && GET_RTX_CLASS (code) != RTX_BIN_ARITH
250 && GET_RTX_CLASS (code) != RTX_COMM_COMPARE
251 && GET_RTX_CLASS (code) != RTX_COMPARE
252 && GET_RTX_CLASS (code) != RTX_UNARY)
255 if (GET_CODE (target) == ZERO_EXTRACT)
258 for (last_insn = insns;
259 NEXT_INSN (last_insn) != NULL_RTX;
260 last_insn = NEXT_INSN (last_insn))
263 set = single_set (last_insn);
267 if (! rtx_equal_p (SET_DEST (set), target)
268 /* For a STRICT_LOW_PART, the REG_NOTE applies to what is inside it. */
269 && (GET_CODE (SET_DEST (set)) != STRICT_LOW_PART
270 || ! rtx_equal_p (XEXP (SET_DEST (set), 0), target)))
273 /* If TARGET is in OP0 or OP1, check if anything in SEQ sets TARGET
274 besides the last insn. */
275 if (reg_overlap_mentioned_p (target, op0)
276 || (op1 && reg_overlap_mentioned_p (target, op1)))
278 insn = PREV_INSN (last_insn);
279 while (insn != NULL_RTX)
281 if (reg_set_p (target, insn))
284 insn = PREV_INSN (insn);
288 if (GET_RTX_CLASS (code) == RTX_UNARY)
289 note = gen_rtx_fmt_e (code, GET_MODE (target), copy_rtx (op0));
291 note = gen_rtx_fmt_ee (code, GET_MODE (target), copy_rtx (op0), copy_rtx (op1));
293 set_unique_reg_note (last_insn, REG_EQUAL, note);
298 /* Widen OP to MODE and return the rtx for the widened operand. UNSIGNEDP
299 says whether OP is signed or unsigned. NO_EXTEND is nonzero if we need
300 not actually do a sign-extend or zero-extend, but can leave the
301 higher-order bits of the result rtx undefined, for example, in the case
302 of logical operations, but not right shifts. */
305 widen_operand (rtx op, enum machine_mode mode, enum machine_mode oldmode,
306 int unsignedp, int no_extend)
310 /* If we don't have to extend and this is a constant, return it. */
311 if (no_extend && GET_MODE (op) == VOIDmode)
314 /* If we must extend do so. If OP is a SUBREG for a promoted object, also
315 extend since it will be more efficient to do so unless the signedness of
316 a promoted object differs from our extension. */
318 || (GET_CODE (op) == SUBREG && SUBREG_PROMOTED_VAR_P (op)
319 && SUBREG_PROMOTED_UNSIGNED_P (op) == unsignedp))
320 return convert_modes (mode, oldmode, op, unsignedp);
322 /* If MODE is no wider than a single word, we return a paradoxical
324 if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD)
325 return gen_rtx_SUBREG (mode, force_reg (GET_MODE (op), op), 0);
327 /* Otherwise, get an object of MODE, clobber it, and set the low-order
330 result = gen_reg_rtx (mode);
331 emit_clobber (result);
332 emit_move_insn (gen_lowpart (GET_MODE (op), result), op);
336 /* Return the optab used for computing the operation given by the tree code,
337 CODE and the tree EXP. This function is not always usable (for example, it
338 cannot give complete results for multiplication or division) but probably
339 ought to be relied on more widely throughout the expander. */
341 optab_for_tree_code (enum tree_code code, const_tree type,
342 enum optab_subtype subtype)
354 return one_cmpl_optab;
363 return TYPE_UNSIGNED (type) ? umod_optab : smod_optab;
371 if (TYPE_SATURATING(type))
372 return TYPE_UNSIGNED(type) ? usdiv_optab : ssdiv_optab;
373 return TYPE_UNSIGNED (type) ? udiv_optab : sdiv_optab;
376 if (VECTOR_MODE_P (TYPE_MODE (type)))
378 if (subtype == optab_vector)
379 return TYPE_SATURATING (type) ? NULL : vashl_optab;
381 gcc_assert (subtype == optab_scalar);
383 if (TYPE_SATURATING(type))
384 return TYPE_UNSIGNED(type) ? usashl_optab : ssashl_optab;
388 if (VECTOR_MODE_P (TYPE_MODE (type)))
390 if (subtype == optab_vector)
391 return TYPE_UNSIGNED (type) ? vlshr_optab : vashr_optab;
393 gcc_assert (subtype == optab_scalar);
395 return TYPE_UNSIGNED (type) ? lshr_optab : ashr_optab;
398 if (VECTOR_MODE_P (TYPE_MODE (type)))
400 if (subtype == optab_vector)
403 gcc_assert (subtype == optab_scalar);
408 if (VECTOR_MODE_P (TYPE_MODE (type)))
410 if (subtype == optab_vector)
413 gcc_assert (subtype == optab_scalar);
418 return TYPE_UNSIGNED (type) ? umax_optab : smax_optab;
421 return TYPE_UNSIGNED (type) ? umin_optab : smin_optab;
423 case REALIGN_LOAD_EXPR:
424 return vec_realign_load_optab;
427 return TYPE_UNSIGNED (type) ? usum_widen_optab : ssum_widen_optab;
430 return TYPE_UNSIGNED (type) ? udot_prod_optab : sdot_prod_optab;
433 return TYPE_UNSIGNED (type) ? reduc_umax_optab : reduc_smax_optab;
436 return TYPE_UNSIGNED (type) ? reduc_umin_optab : reduc_smin_optab;
438 case REDUC_PLUS_EXPR:
439 return TYPE_UNSIGNED (type) ? reduc_uplus_optab : reduc_splus_optab;
441 case VEC_LSHIFT_EXPR:
442 return vec_shl_optab;
444 case VEC_RSHIFT_EXPR:
445 return vec_shr_optab;
447 case VEC_WIDEN_MULT_HI_EXPR:
448 return TYPE_UNSIGNED (type) ?
449 vec_widen_umult_hi_optab : vec_widen_smult_hi_optab;
451 case VEC_WIDEN_MULT_LO_EXPR:
452 return TYPE_UNSIGNED (type) ?
453 vec_widen_umult_lo_optab : vec_widen_smult_lo_optab;
455 case VEC_UNPACK_HI_EXPR:
456 return TYPE_UNSIGNED (type) ?
457 vec_unpacku_hi_optab : vec_unpacks_hi_optab;
459 case VEC_UNPACK_LO_EXPR:
460 return TYPE_UNSIGNED (type) ?
461 vec_unpacku_lo_optab : vec_unpacks_lo_optab;
463 case VEC_UNPACK_FLOAT_HI_EXPR:
464 /* The signedness is determined from input operand. */
465 return TYPE_UNSIGNED (type) ?
466 vec_unpacku_float_hi_optab : vec_unpacks_float_hi_optab;
468 case VEC_UNPACK_FLOAT_LO_EXPR:
469 /* The signedness is determined from input operand. */
470 return TYPE_UNSIGNED (type) ?
471 vec_unpacku_float_lo_optab : vec_unpacks_float_lo_optab;
473 case VEC_PACK_TRUNC_EXPR:
474 return vec_pack_trunc_optab;
476 case VEC_PACK_SAT_EXPR:
477 return TYPE_UNSIGNED (type) ? vec_pack_usat_optab : vec_pack_ssat_optab;
479 case VEC_PACK_FIX_TRUNC_EXPR:
480 /* The signedness is determined from output operand. */
481 return TYPE_UNSIGNED (type) ?
482 vec_pack_ufix_trunc_optab : vec_pack_sfix_trunc_optab;
488 trapv = INTEGRAL_TYPE_P (type) && TYPE_OVERFLOW_TRAPS (type);
491 case POINTER_PLUS_EXPR:
493 if (TYPE_SATURATING(type))
494 return TYPE_UNSIGNED(type) ? usadd_optab : ssadd_optab;
495 return trapv ? addv_optab : add_optab;
498 if (TYPE_SATURATING(type))
499 return TYPE_UNSIGNED(type) ? ussub_optab : sssub_optab;
500 return trapv ? subv_optab : sub_optab;
503 if (TYPE_SATURATING(type))
504 return TYPE_UNSIGNED(type) ? usmul_optab : ssmul_optab;
505 return trapv ? smulv_optab : smul_optab;
508 if (TYPE_SATURATING(type))
509 return TYPE_UNSIGNED(type) ? usneg_optab : ssneg_optab;
510 return trapv ? negv_optab : neg_optab;
513 return trapv ? absv_optab : abs_optab;
515 case VEC_EXTRACT_EVEN_EXPR:
516 return vec_extract_even_optab;
518 case VEC_EXTRACT_ODD_EXPR:
519 return vec_extract_odd_optab;
521 case VEC_INTERLEAVE_HIGH_EXPR:
522 return vec_interleave_high_optab;
524 case VEC_INTERLEAVE_LOW_EXPR:
525 return vec_interleave_low_optab;
533 /* Expand vector widening operations.
535 There are two different classes of operations handled here:
536 1) Operations whose result is wider than all the arguments to the operation.
537 Examples: VEC_UNPACK_HI/LO_EXPR, VEC_WIDEN_MULT_HI/LO_EXPR
538 In this case OP0 and optionally OP1 would be initialized,
539 but WIDE_OP wouldn't (not relevant for this case).
540 2) Operations whose result is of the same size as the last argument to the
541 operation, but wider than all the other arguments to the operation.
542 Examples: WIDEN_SUM_EXPR, VEC_DOT_PROD_EXPR.
543 In the case WIDE_OP, OP0 and optionally OP1 would be initialized.
545 E.g, when called to expand the following operations, this is how
546 the arguments will be initialized:
548 widening-sum 2 oprnd0 - oprnd1
549 widening-dot-product 3 oprnd0 oprnd1 oprnd2
550 widening-mult 2 oprnd0 oprnd1 -
551 type-promotion (vec-unpack) 1 oprnd0 - - */
554 expand_widen_pattern_expr (tree exp, rtx op0, rtx op1, rtx wide_op, rtx target,
557 tree oprnd0, oprnd1, oprnd2;
558 enum machine_mode wmode = VOIDmode, tmode0, tmode1 = VOIDmode;
559 optab widen_pattern_optab;
561 enum machine_mode xmode0, xmode1 = VOIDmode, wxmode = VOIDmode;
564 rtx xop0, xop1, wxop;
565 int nops = TREE_OPERAND_LENGTH (exp);
567 oprnd0 = TREE_OPERAND (exp, 0);
568 tmode0 = TYPE_MODE (TREE_TYPE (oprnd0));
569 widen_pattern_optab =
570 optab_for_tree_code (TREE_CODE (exp), TREE_TYPE (oprnd0), optab_default);
571 icode = (int) optab_handler (widen_pattern_optab, tmode0)->insn_code;
572 gcc_assert (icode != CODE_FOR_nothing);
573 xmode0 = insn_data[icode].operand[1].mode;
577 oprnd1 = TREE_OPERAND (exp, 1);
578 tmode1 = TYPE_MODE (TREE_TYPE (oprnd1));
579 xmode1 = insn_data[icode].operand[2].mode;
582 /* The last operand is of a wider mode than the rest of the operands. */
590 gcc_assert (tmode1 == tmode0);
592 oprnd2 = TREE_OPERAND (exp, 2);
593 wmode = TYPE_MODE (TREE_TYPE (oprnd2));
594 wxmode = insn_data[icode].operand[3].mode;
598 wmode = wxmode = insn_data[icode].operand[0].mode;
601 || ! (*insn_data[icode].operand[0].predicate) (target, wmode))
602 temp = gen_reg_rtx (wmode);
610 /* In case the insn wants input operands in modes different from
611 those of the actual operands, convert the operands. It would
612 seem that we don't need to convert CONST_INTs, but we do, so
613 that they're properly zero-extended, sign-extended or truncated
616 if (GET_MODE (op0) != xmode0 && xmode0 != VOIDmode)
617 xop0 = convert_modes (xmode0,
618 GET_MODE (op0) != VOIDmode
624 if (GET_MODE (op1) != xmode1 && xmode1 != VOIDmode)
625 xop1 = convert_modes (xmode1,
626 GET_MODE (op1) != VOIDmode
632 if (GET_MODE (wide_op) != wxmode && wxmode != VOIDmode)
633 wxop = convert_modes (wxmode,
634 GET_MODE (wide_op) != VOIDmode
639 /* Now, if insn's predicates don't allow our operands, put them into
642 if (! (*insn_data[icode].operand[1].predicate) (xop0, xmode0)
643 && xmode0 != VOIDmode)
644 xop0 = copy_to_mode_reg (xmode0, xop0);
648 if (! (*insn_data[icode].operand[2].predicate) (xop1, xmode1)
649 && xmode1 != VOIDmode)
650 xop1 = copy_to_mode_reg (xmode1, xop1);
654 if (! (*insn_data[icode].operand[3].predicate) (wxop, wxmode)
655 && wxmode != VOIDmode)
656 wxop = copy_to_mode_reg (wxmode, wxop);
658 pat = GEN_FCN (icode) (temp, xop0, xop1, wxop);
661 pat = GEN_FCN (icode) (temp, xop0, xop1);
667 if (! (*insn_data[icode].operand[2].predicate) (wxop, wxmode)
668 && wxmode != VOIDmode)
669 wxop = copy_to_mode_reg (wxmode, wxop);
671 pat = GEN_FCN (icode) (temp, xop0, wxop);
674 pat = GEN_FCN (icode) (temp, xop0);
681 /* Generate code to perform an operation specified by TERNARY_OPTAB
682 on operands OP0, OP1 and OP2, with result having machine-mode MODE.
684 UNSIGNEDP is for the case where we have to widen the operands
685 to perform the operation. It says to use zero-extension.
687 If TARGET is nonzero, the value
688 is generated there, if it is convenient to do so.
689 In all cases an rtx is returned for the locus of the value;
690 this may or may not be TARGET. */
693 expand_ternary_op (enum machine_mode mode, optab ternary_optab, rtx op0,
694 rtx op1, rtx op2, rtx target, int unsignedp)
696 int icode = (int) optab_handler (ternary_optab, mode)->insn_code;
697 enum machine_mode mode0 = insn_data[icode].operand[1].mode;
698 enum machine_mode mode1 = insn_data[icode].operand[2].mode;
699 enum machine_mode mode2 = insn_data[icode].operand[3].mode;
702 rtx xop0 = op0, xop1 = op1, xop2 = op2;
704 gcc_assert (optab_handler (ternary_optab, mode)->insn_code
705 != CODE_FOR_nothing);
707 if (!target || !insn_data[icode].operand[0].predicate (target, mode))
708 temp = gen_reg_rtx (mode);
712 /* In case the insn wants input operands in modes different from
713 those of the actual operands, convert the operands. It would
714 seem that we don't need to convert CONST_INTs, but we do, so
715 that they're properly zero-extended, sign-extended or truncated
718 if (GET_MODE (op0) != mode0 && mode0 != VOIDmode)
719 xop0 = convert_modes (mode0,
720 GET_MODE (op0) != VOIDmode
725 if (GET_MODE (op1) != mode1 && mode1 != VOIDmode)
726 xop1 = convert_modes (mode1,
727 GET_MODE (op1) != VOIDmode
732 if (GET_MODE (op2) != mode2 && mode2 != VOIDmode)
733 xop2 = convert_modes (mode2,
734 GET_MODE (op2) != VOIDmode
739 /* Now, if insn's predicates don't allow our operands, put them into
742 if (!insn_data[icode].operand[1].predicate (xop0, mode0)
743 && mode0 != VOIDmode)
744 xop0 = copy_to_mode_reg (mode0, xop0);
746 if (!insn_data[icode].operand[2].predicate (xop1, mode1)
747 && mode1 != VOIDmode)
748 xop1 = copy_to_mode_reg (mode1, xop1);
750 if (!insn_data[icode].operand[3].predicate (xop2, mode2)
751 && mode2 != VOIDmode)
752 xop2 = copy_to_mode_reg (mode2, xop2);
754 pat = GEN_FCN (icode) (temp, xop0, xop1, xop2);
761 /* Like expand_binop, but return a constant rtx if the result can be
762 calculated at compile time. The arguments and return value are
763 otherwise the same as for expand_binop. */
766 simplify_expand_binop (enum machine_mode mode, optab binoptab,
767 rtx op0, rtx op1, rtx target, int unsignedp,
768 enum optab_methods methods)
770 if (CONSTANT_P (op0) && CONSTANT_P (op1))
772 rtx x = simplify_binary_operation (binoptab->code, mode, op0, op1);
778 return expand_binop (mode, binoptab, op0, op1, target, unsignedp, methods);
781 /* Like simplify_expand_binop, but always put the result in TARGET.
782 Return true if the expansion succeeded. */
785 force_expand_binop (enum machine_mode mode, optab binoptab,
786 rtx op0, rtx op1, rtx target, int unsignedp,
787 enum optab_methods methods)
789 rtx x = simplify_expand_binop (mode, binoptab, op0, op1,
790 target, unsignedp, methods);
794 emit_move_insn (target, x);
798 /* Generate insns for VEC_LSHIFT_EXPR, VEC_RSHIFT_EXPR. */
801 expand_vec_shift_expr (tree vec_shift_expr, rtx target)
803 enum insn_code icode;
804 rtx rtx_op1, rtx_op2;
805 enum machine_mode mode1;
806 enum machine_mode mode2;
807 enum machine_mode mode = TYPE_MODE (TREE_TYPE (vec_shift_expr));
808 tree vec_oprnd = TREE_OPERAND (vec_shift_expr, 0);
809 tree shift_oprnd = TREE_OPERAND (vec_shift_expr, 1);
813 switch (TREE_CODE (vec_shift_expr))
815 case VEC_RSHIFT_EXPR:
816 shift_optab = vec_shr_optab;
818 case VEC_LSHIFT_EXPR:
819 shift_optab = vec_shl_optab;
825 icode = optab_handler (shift_optab, mode)->insn_code;
826 gcc_assert (icode != CODE_FOR_nothing);
828 mode1 = insn_data[icode].operand[1].mode;
829 mode2 = insn_data[icode].operand[2].mode;
831 rtx_op1 = expand_normal (vec_oprnd);
832 if (!(*insn_data[icode].operand[1].predicate) (rtx_op1, mode1)
833 && mode1 != VOIDmode)
834 rtx_op1 = force_reg (mode1, rtx_op1);
836 rtx_op2 = expand_normal (shift_oprnd);
837 if (!(*insn_data[icode].operand[2].predicate) (rtx_op2, mode2)
838 && mode2 != VOIDmode)
839 rtx_op2 = force_reg (mode2, rtx_op2);
842 || ! (*insn_data[icode].operand[0].predicate) (target, mode))
843 target = gen_reg_rtx (mode);
845 /* Emit instruction */
846 pat = GEN_FCN (icode) (target, rtx_op1, rtx_op2);
853 /* This subroutine of expand_doubleword_shift handles the cases in which
854 the effective shift value is >= BITS_PER_WORD. The arguments and return
855 value are the same as for the parent routine, except that SUPERWORD_OP1
856 is the shift count to use when shifting OUTOF_INPUT into INTO_TARGET.
857 INTO_TARGET may be null if the caller has decided to calculate it. */
860 expand_superword_shift (optab binoptab, rtx outof_input, rtx superword_op1,
861 rtx outof_target, rtx into_target,
862 int unsignedp, enum optab_methods methods)
864 if (into_target != 0)
865 if (!force_expand_binop (word_mode, binoptab, outof_input, superword_op1,
866 into_target, unsignedp, methods))
869 if (outof_target != 0)
871 /* For a signed right shift, we must fill OUTOF_TARGET with copies
872 of the sign bit, otherwise we must fill it with zeros. */
873 if (binoptab != ashr_optab)
874 emit_move_insn (outof_target, CONST0_RTX (word_mode));
876 if (!force_expand_binop (word_mode, binoptab,
877 outof_input, GEN_INT (BITS_PER_WORD - 1),
878 outof_target, unsignedp, methods))
884 /* This subroutine of expand_doubleword_shift handles the cases in which
885 the effective shift value is < BITS_PER_WORD. The arguments and return
886 value are the same as for the parent routine. */
889 expand_subword_shift (enum machine_mode op1_mode, optab binoptab,
890 rtx outof_input, rtx into_input, rtx op1,
891 rtx outof_target, rtx into_target,
892 int unsignedp, enum optab_methods methods,
893 unsigned HOST_WIDE_INT shift_mask)
895 optab reverse_unsigned_shift, unsigned_shift;
898 reverse_unsigned_shift = (binoptab == ashl_optab ? lshr_optab : ashl_optab);
899 unsigned_shift = (binoptab == ashl_optab ? ashl_optab : lshr_optab);
901 /* The low OP1 bits of INTO_TARGET come from the high bits of OUTOF_INPUT.
902 We therefore need to shift OUTOF_INPUT by (BITS_PER_WORD - OP1) bits in
903 the opposite direction to BINOPTAB. */
904 if (CONSTANT_P (op1) || shift_mask >= BITS_PER_WORD)
906 carries = outof_input;
907 tmp = immed_double_const (BITS_PER_WORD, 0, op1_mode);
908 tmp = simplify_expand_binop (op1_mode, sub_optab, tmp, op1,
913 /* We must avoid shifting by BITS_PER_WORD bits since that is either
914 the same as a zero shift (if shift_mask == BITS_PER_WORD - 1) or
915 has unknown behavior. Do a single shift first, then shift by the
916 remainder. It's OK to use ~OP1 as the remainder if shift counts
917 are truncated to the mode size. */
918 carries = expand_binop (word_mode, reverse_unsigned_shift,
919 outof_input, const1_rtx, 0, unsignedp, methods);
920 if (shift_mask == BITS_PER_WORD - 1)
922 tmp = immed_double_const (-1, -1, op1_mode);
923 tmp = simplify_expand_binop (op1_mode, xor_optab, op1, tmp,
928 tmp = immed_double_const (BITS_PER_WORD - 1, 0, op1_mode);
929 tmp = simplify_expand_binop (op1_mode, sub_optab, tmp, op1,
933 if (tmp == 0 || carries == 0)
935 carries = expand_binop (word_mode, reverse_unsigned_shift,
936 carries, tmp, 0, unsignedp, methods);
940 /* Shift INTO_INPUT logically by OP1. This is the last use of INTO_INPUT
941 so the result can go directly into INTO_TARGET if convenient. */
942 tmp = expand_binop (word_mode, unsigned_shift, into_input, op1,
943 into_target, unsignedp, methods);
947 /* Now OR in the bits carried over from OUTOF_INPUT. */
948 if (!force_expand_binop (word_mode, ior_optab, tmp, carries,
949 into_target, unsignedp, methods))
952 /* Use a standard word_mode shift for the out-of half. */
953 if (outof_target != 0)
954 if (!force_expand_binop (word_mode, binoptab, outof_input, op1,
955 outof_target, unsignedp, methods))
962 #ifdef HAVE_conditional_move
963 /* Try implementing expand_doubleword_shift using conditional moves.
964 The shift is by < BITS_PER_WORD if (CMP_CODE CMP1 CMP2) is true,
965 otherwise it is by >= BITS_PER_WORD. SUBWORD_OP1 and SUPERWORD_OP1
966 are the shift counts to use in the former and latter case. All other
967 arguments are the same as the parent routine. */
970 expand_doubleword_shift_condmove (enum machine_mode op1_mode, optab binoptab,
971 enum rtx_code cmp_code, rtx cmp1, rtx cmp2,
972 rtx outof_input, rtx into_input,
973 rtx subword_op1, rtx superword_op1,
974 rtx outof_target, rtx into_target,
975 int unsignedp, enum optab_methods methods,
976 unsigned HOST_WIDE_INT shift_mask)
978 rtx outof_superword, into_superword;
980 /* Put the superword version of the output into OUTOF_SUPERWORD and
982 outof_superword = outof_target != 0 ? gen_reg_rtx (word_mode) : 0;
983 if (outof_target != 0 && subword_op1 == superword_op1)
985 /* The value INTO_TARGET >> SUBWORD_OP1, which we later store in
986 OUTOF_TARGET, is the same as the value of INTO_SUPERWORD. */
987 into_superword = outof_target;
988 if (!expand_superword_shift (binoptab, outof_input, superword_op1,
989 outof_superword, 0, unsignedp, methods))
994 into_superword = gen_reg_rtx (word_mode);
995 if (!expand_superword_shift (binoptab, outof_input, superword_op1,
996 outof_superword, into_superword,
1001 /* Put the subword version directly in OUTOF_TARGET and INTO_TARGET. */
1002 if (!expand_subword_shift (op1_mode, binoptab,
1003 outof_input, into_input, subword_op1,
1004 outof_target, into_target,
1005 unsignedp, methods, shift_mask))
1008 /* Select between them. Do the INTO half first because INTO_SUPERWORD
1009 might be the current value of OUTOF_TARGET. */
1010 if (!emit_conditional_move (into_target, cmp_code, cmp1, cmp2, op1_mode,
1011 into_target, into_superword, word_mode, false))
1014 if (outof_target != 0)
1015 if (!emit_conditional_move (outof_target, cmp_code, cmp1, cmp2, op1_mode,
1016 outof_target, outof_superword,
1024 /* Expand a doubleword shift (ashl, ashr or lshr) using word-mode shifts.
1025 OUTOF_INPUT and INTO_INPUT are the two word-sized halves of the first
1026 input operand; the shift moves bits in the direction OUTOF_INPUT->
1027 INTO_TARGET. OUTOF_TARGET and INTO_TARGET are the equivalent words
1028 of the target. OP1 is the shift count and OP1_MODE is its mode.
1029 If OP1 is constant, it will have been truncated as appropriate
1030 and is known to be nonzero.
1032 If SHIFT_MASK is zero, the result of word shifts is undefined when the
1033 shift count is outside the range [0, BITS_PER_WORD). This routine must
1034 avoid generating such shifts for OP1s in the range [0, BITS_PER_WORD * 2).
1036 If SHIFT_MASK is nonzero, all word-mode shift counts are effectively
1037 masked by it and shifts in the range [BITS_PER_WORD, SHIFT_MASK) will
1038 fill with zeros or sign bits as appropriate.
1040 If SHIFT_MASK is BITS_PER_WORD - 1, this routine will synthesize
1041 a doubleword shift whose equivalent mask is BITS_PER_WORD * 2 - 1.
1042 Doing this preserves semantics required by SHIFT_COUNT_TRUNCATED.
1043 In all other cases, shifts by values outside [0, BITS_PER_UNIT * 2)
1046 BINOPTAB, UNSIGNEDP and METHODS are as for expand_binop. This function
1047 may not use INTO_INPUT after modifying INTO_TARGET, and similarly for
1048 OUTOF_INPUT and OUTOF_TARGET. OUTOF_TARGET can be null if the parent
1049 function wants to calculate it itself.
1051 Return true if the shift could be successfully synthesized. */
1054 expand_doubleword_shift (enum machine_mode op1_mode, optab binoptab,
1055 rtx outof_input, rtx into_input, rtx op1,
1056 rtx outof_target, rtx into_target,
1057 int unsignedp, enum optab_methods methods,
1058 unsigned HOST_WIDE_INT shift_mask)
1060 rtx superword_op1, tmp, cmp1, cmp2;
1061 rtx subword_label, done_label;
1062 enum rtx_code cmp_code;
1064 /* See if word-mode shifts by BITS_PER_WORD...BITS_PER_WORD * 2 - 1 will
1065 fill the result with sign or zero bits as appropriate. If so, the value
1066 of OUTOF_TARGET will always be (SHIFT OUTOF_INPUT OP1). Recursively call
1067 this routine to calculate INTO_TARGET (which depends on both OUTOF_INPUT
1068 and INTO_INPUT), then emit code to set up OUTOF_TARGET.
1070 This isn't worthwhile for constant shifts since the optimizers will
1071 cope better with in-range shift counts. */
1072 if (shift_mask >= BITS_PER_WORD
1073 && outof_target != 0
1074 && !CONSTANT_P (op1))
1076 if (!expand_doubleword_shift (op1_mode, binoptab,
1077 outof_input, into_input, op1,
1079 unsignedp, methods, shift_mask))
1081 if (!force_expand_binop (word_mode, binoptab, outof_input, op1,
1082 outof_target, unsignedp, methods))
1087 /* Set CMP_CODE, CMP1 and CMP2 so that the rtx (CMP_CODE CMP1 CMP2)
1088 is true when the effective shift value is less than BITS_PER_WORD.
1089 Set SUPERWORD_OP1 to the shift count that should be used to shift
1090 OUTOF_INPUT into INTO_TARGET when the condition is false. */
1091 tmp = immed_double_const (BITS_PER_WORD, 0, op1_mode);
1092 if (!CONSTANT_P (op1) && shift_mask == BITS_PER_WORD - 1)
1094 /* Set CMP1 to OP1 & BITS_PER_WORD. The result is zero iff OP1
1095 is a subword shift count. */
1096 cmp1 = simplify_expand_binop (op1_mode, and_optab, op1, tmp,
1098 cmp2 = CONST0_RTX (op1_mode);
1100 superword_op1 = op1;
1104 /* Set CMP1 to OP1 - BITS_PER_WORD. */
1105 cmp1 = simplify_expand_binop (op1_mode, sub_optab, op1, tmp,
1107 cmp2 = CONST0_RTX (op1_mode);
1109 superword_op1 = cmp1;
1114 /* If we can compute the condition at compile time, pick the
1115 appropriate subroutine. */
1116 tmp = simplify_relational_operation (cmp_code, SImode, op1_mode, cmp1, cmp2);
1117 if (tmp != 0 && GET_CODE (tmp) == CONST_INT)
1119 if (tmp == const0_rtx)
1120 return expand_superword_shift (binoptab, outof_input, superword_op1,
1121 outof_target, into_target,
1122 unsignedp, methods);
1124 return expand_subword_shift (op1_mode, binoptab,
1125 outof_input, into_input, op1,
1126 outof_target, into_target,
1127 unsignedp, methods, shift_mask);
1130 #ifdef HAVE_conditional_move
1131 /* Try using conditional moves to generate straight-line code. */
1133 rtx start = get_last_insn ();
1134 if (expand_doubleword_shift_condmove (op1_mode, binoptab,
1135 cmp_code, cmp1, cmp2,
1136 outof_input, into_input,
1138 outof_target, into_target,
1139 unsignedp, methods, shift_mask))
1141 delete_insns_since (start);
1145 /* As a last resort, use branches to select the correct alternative. */
1146 subword_label = gen_label_rtx ();
1147 done_label = gen_label_rtx ();
1150 do_compare_rtx_and_jump (cmp1, cmp2, cmp_code, false, op1_mode,
1151 0, 0, subword_label);
1154 if (!expand_superword_shift (binoptab, outof_input, superword_op1,
1155 outof_target, into_target,
1156 unsignedp, methods))
1159 emit_jump_insn (gen_jump (done_label));
1161 emit_label (subword_label);
1163 if (!expand_subword_shift (op1_mode, binoptab,
1164 outof_input, into_input, op1,
1165 outof_target, into_target,
1166 unsignedp, methods, shift_mask))
1169 emit_label (done_label);
1173 /* Subroutine of expand_binop. Perform a double word multiplication of
1174 operands OP0 and OP1 both of mode MODE, which is exactly twice as wide
1175 as the target's word_mode. This function return NULL_RTX if anything
1176 goes wrong, in which case it may have already emitted instructions
1177 which need to be deleted.
1179 If we want to multiply two two-word values and have normal and widening
1180 multiplies of single-word values, we can do this with three smaller
1183 The multiplication proceeds as follows:
1184 _______________________
1185 [__op0_high_|__op0_low__]
1186 _______________________
1187 * [__op1_high_|__op1_low__]
1188 _______________________________________________
1189 _______________________
1190 (1) [__op0_low__*__op1_low__]
1191 _______________________
1192 (2a) [__op0_low__*__op1_high_]
1193 _______________________
1194 (2b) [__op0_high_*__op1_low__]
1195 _______________________
1196 (3) [__op0_high_*__op1_high_]
1199 This gives a 4-word result. Since we are only interested in the
1200 lower 2 words, partial result (3) and the upper words of (2a) and
1201 (2b) don't need to be calculated. Hence (2a) and (2b) can be
1202 calculated using non-widening multiplication.
1204 (1), however, needs to be calculated with an unsigned widening
1205 multiplication. If this operation is not directly supported we
1206 try using a signed widening multiplication and adjust the result.
1207 This adjustment works as follows:
1209 If both operands are positive then no adjustment is needed.
1211 If the operands have different signs, for example op0_low < 0 and
1212 op1_low >= 0, the instruction treats the most significant bit of
1213 op0_low as a sign bit instead of a bit with significance
1214 2**(BITS_PER_WORD-1), i.e. the instruction multiplies op1_low
1215 with 2**BITS_PER_WORD - op0_low, and two's complements the
1216 result. Conclusion: We need to add op1_low * 2**BITS_PER_WORD to
1219 Similarly, if both operands are negative, we need to add
1220 (op0_low + op1_low) * 2**BITS_PER_WORD.
1222 We use a trick to adjust quickly. We logically shift op0_low right
1223 (op1_low) BITS_PER_WORD-1 steps to get 0 or 1, and add this to
1224 op0_high (op1_high) before it is used to calculate 2b (2a). If no
1225 logical shift exists, we do an arithmetic right shift and subtract
1229 expand_doubleword_mult (enum machine_mode mode, rtx op0, rtx op1, rtx target,
1230 bool umulp, enum optab_methods methods)
1232 int low = (WORDS_BIG_ENDIAN ? 1 : 0);
1233 int high = (WORDS_BIG_ENDIAN ? 0 : 1);
1234 rtx wordm1 = umulp ? NULL_RTX : GEN_INT (BITS_PER_WORD - 1);
1235 rtx product, adjust, product_high, temp;
1237 rtx op0_high = operand_subword_force (op0, high, mode);
1238 rtx op0_low = operand_subword_force (op0, low, mode);
1239 rtx op1_high = operand_subword_force (op1, high, mode);
1240 rtx op1_low = operand_subword_force (op1, low, mode);
1242 /* If we're using an unsigned multiply to directly compute the product
1243 of the low-order words of the operands and perform any required
1244 adjustments of the operands, we begin by trying two more multiplications
1245 and then computing the appropriate sum.
1247 We have checked above that the required addition is provided.
1248 Full-word addition will normally always succeed, especially if
1249 it is provided at all, so we don't worry about its failure. The
1250 multiplication may well fail, however, so we do handle that. */
1254 /* ??? This could be done with emit_store_flag where available. */
1255 temp = expand_binop (word_mode, lshr_optab, op0_low, wordm1,
1256 NULL_RTX, 1, methods);
1258 op0_high = expand_binop (word_mode, add_optab, op0_high, temp,
1259 NULL_RTX, 0, OPTAB_DIRECT);
1262 temp = expand_binop (word_mode, ashr_optab, op0_low, wordm1,
1263 NULL_RTX, 0, methods);
1266 op0_high = expand_binop (word_mode, sub_optab, op0_high, temp,
1267 NULL_RTX, 0, OPTAB_DIRECT);
1274 adjust = expand_binop (word_mode, smul_optab, op0_high, op1_low,
1275 NULL_RTX, 0, OPTAB_DIRECT);
1279 /* OP0_HIGH should now be dead. */
1283 /* ??? This could be done with emit_store_flag where available. */
1284 temp = expand_binop (word_mode, lshr_optab, op1_low, wordm1,
1285 NULL_RTX, 1, methods);
1287 op1_high = expand_binop (word_mode, add_optab, op1_high, temp,
1288 NULL_RTX, 0, OPTAB_DIRECT);
1291 temp = expand_binop (word_mode, ashr_optab, op1_low, wordm1,
1292 NULL_RTX, 0, methods);
1295 op1_high = expand_binop (word_mode, sub_optab, op1_high, temp,
1296 NULL_RTX, 0, OPTAB_DIRECT);
1303 temp = expand_binop (word_mode, smul_optab, op1_high, op0_low,
1304 NULL_RTX, 0, OPTAB_DIRECT);
1308 /* OP1_HIGH should now be dead. */
1310 adjust = expand_binop (word_mode, add_optab, adjust, temp,
1311 adjust, 0, OPTAB_DIRECT);
1313 if (target && !REG_P (target))
1317 product = expand_binop (mode, umul_widen_optab, op0_low, op1_low,
1318 target, 1, OPTAB_DIRECT);
1320 product = expand_binop (mode, smul_widen_optab, op0_low, op1_low,
1321 target, 1, OPTAB_DIRECT);
1326 product_high = operand_subword (product, high, 1, mode);
1327 adjust = expand_binop (word_mode, add_optab, product_high, adjust,
1328 REG_P (product_high) ? product_high : adjust,
1330 emit_move_insn (product_high, adjust);
1334 /* Wrapper around expand_binop which takes an rtx code to specify
1335 the operation to perform, not an optab pointer. All other
1336 arguments are the same. */
1338 expand_simple_binop (enum machine_mode mode, enum rtx_code code, rtx op0,
1339 rtx op1, rtx target, int unsignedp,
1340 enum optab_methods methods)
1342 optab binop = code_to_optab[(int) code];
1345 return expand_binop (mode, binop, op0, op1, target, unsignedp, methods);
1348 /* Return whether OP0 and OP1 should be swapped when expanding a commutative
1349 binop. Order them according to commutative_operand_precedence and, if
1350 possible, try to put TARGET or a pseudo first. */
1352 swap_commutative_operands_with_target (rtx target, rtx op0, rtx op1)
1354 int op0_prec = commutative_operand_precedence (op0);
1355 int op1_prec = commutative_operand_precedence (op1);
1357 if (op0_prec < op1_prec)
1360 if (op0_prec > op1_prec)
1363 /* With equal precedence, both orders are ok, but it is better if the
1364 first operand is TARGET, or if both TARGET and OP0 are pseudos. */
1365 if (target == 0 || REG_P (target))
1366 return (REG_P (op1) && !REG_P (op0)) || target == op1;
1368 return rtx_equal_p (op1, target);
1371 /* Return true if BINOPTAB implements a shift operation. */
1374 shift_optab_p (optab binoptab)
1376 switch (binoptab->code)
1392 /* Return true if BINOPTAB implements a commutative binary operation. */
1395 commutative_optab_p (optab binoptab)
1397 return (GET_RTX_CLASS (binoptab->code) == RTX_COMM_ARITH
1398 || binoptab == smul_widen_optab
1399 || binoptab == umul_widen_optab
1400 || binoptab == smul_highpart_optab
1401 || binoptab == umul_highpart_optab);
1404 /* X is to be used in mode MODE as an operand to BINOPTAB. If we're
1405 optimizing, and if the operand is a constant that costs more than
1406 1 instruction, force the constant into a register and return that
1407 register. Return X otherwise. UNSIGNEDP says whether X is unsigned. */
1410 avoid_expensive_constant (enum machine_mode mode, optab binoptab,
1411 rtx x, bool unsignedp)
1413 if (mode != VOIDmode
1416 && rtx_cost (x, binoptab->code, optimize_insn_for_speed_p ())
1417 > COSTS_N_INSNS (1))
1419 if (GET_CODE (x) == CONST_INT)
1421 HOST_WIDE_INT intval = trunc_int_for_mode (INTVAL (x), mode);
1422 if (intval != INTVAL (x))
1423 x = GEN_INT (intval);
1426 x = convert_modes (mode, VOIDmode, x, unsignedp);
1427 x = force_reg (mode, x);
1432 /* Helper function for expand_binop: handle the case where there
1433 is an insn that directly implements the indicated operation.
1434 Returns null if this is not possible. */
1436 expand_binop_directly (enum machine_mode mode, optab binoptab,
1438 rtx target, int unsignedp, enum optab_methods methods,
1441 int icode = (int) optab_handler (binoptab, mode)->insn_code;
1442 enum machine_mode mode0 = insn_data[icode].operand[1].mode;
1443 enum machine_mode mode1 = insn_data[icode].operand[2].mode;
1444 enum machine_mode tmp_mode;
1447 rtx xop0 = op0, xop1 = op1;
1454 temp = gen_reg_rtx (mode);
1456 /* If it is a commutative operator and the modes would match
1457 if we would swap the operands, we can save the conversions. */
1458 commutative_p = commutative_optab_p (binoptab);
1460 && GET_MODE (xop0) != mode0 && GET_MODE (xop1) != mode1
1461 && GET_MODE (xop0) == mode1 && GET_MODE (xop1) == mode1)
1468 /* If we are optimizing, force expensive constants into a register. */
1469 xop0 = avoid_expensive_constant (mode0, binoptab, xop0, unsignedp);
1470 if (!shift_optab_p (binoptab))
1471 xop1 = avoid_expensive_constant (mode1, binoptab, xop1, unsignedp);
1473 /* In case the insn wants input operands in modes different from
1474 those of the actual operands, convert the operands. It would
1475 seem that we don't need to convert CONST_INTs, but we do, so
1476 that they're properly zero-extended, sign-extended or truncated
1479 if (GET_MODE (xop0) != mode0 && mode0 != VOIDmode)
1480 xop0 = convert_modes (mode0,
1481 GET_MODE (xop0) != VOIDmode
1486 if (GET_MODE (xop1) != mode1 && mode1 != VOIDmode)
1487 xop1 = convert_modes (mode1,
1488 GET_MODE (xop1) != VOIDmode
1493 /* If operation is commutative,
1494 try to make the first operand a register.
1495 Even better, try to make it the same as the target.
1496 Also try to make the last operand a constant. */
1498 && swap_commutative_operands_with_target (target, xop0, xop1))
1505 /* Now, if insn's predicates don't allow our operands, put them into
1508 if (!insn_data[icode].operand[1].predicate (xop0, mode0)
1509 && mode0 != VOIDmode)
1510 xop0 = copy_to_mode_reg (mode0, xop0);
1512 if (!insn_data[icode].operand[2].predicate (xop1, mode1)
1513 && mode1 != VOIDmode)
1514 xop1 = copy_to_mode_reg (mode1, xop1);
1516 if (binoptab == vec_pack_trunc_optab
1517 || binoptab == vec_pack_usat_optab
1518 || binoptab == vec_pack_ssat_optab
1519 || binoptab == vec_pack_ufix_trunc_optab
1520 || binoptab == vec_pack_sfix_trunc_optab)
1522 /* The mode of the result is different then the mode of the
1524 tmp_mode = insn_data[icode].operand[0].mode;
1525 if (GET_MODE_NUNITS (tmp_mode) != 2 * GET_MODE_NUNITS (mode))
1531 if (!insn_data[icode].operand[0].predicate (temp, tmp_mode))
1532 temp = gen_reg_rtx (tmp_mode);
1534 pat = GEN_FCN (icode) (temp, xop0, xop1);
1537 /* If PAT is composed of more than one insn, try to add an appropriate
1538 REG_EQUAL note to it. If we can't because TEMP conflicts with an
1539 operand, call expand_binop again, this time without a target. */
1540 if (INSN_P (pat) && NEXT_INSN (pat) != NULL_RTX
1541 && ! add_equal_note (pat, temp, binoptab->code, xop0, xop1))
1543 delete_insns_since (last);
1544 return expand_binop (mode, binoptab, op0, op1, NULL_RTX,
1545 unsignedp, methods);
1552 delete_insns_since (last);
1556 /* Generate code to perform an operation specified by BINOPTAB
1557 on operands OP0 and OP1, with result having machine-mode MODE.
1559 UNSIGNEDP is for the case where we have to widen the operands
1560 to perform the operation. It says to use zero-extension.
1562 If TARGET is nonzero, the value
1563 is generated there, if it is convenient to do so.
1564 In all cases an rtx is returned for the locus of the value;
1565 this may or may not be TARGET. */
1568 expand_binop (enum machine_mode mode, optab binoptab, rtx op0, rtx op1,
1569 rtx target, int unsignedp, enum optab_methods methods)
1571 enum optab_methods next_methods
1572 = (methods == OPTAB_LIB || methods == OPTAB_LIB_WIDEN
1573 ? OPTAB_WIDEN : methods);
1574 enum mode_class mclass;
1575 enum machine_mode wider_mode;
1578 rtx entry_last = get_last_insn ();
1581 mclass = GET_MODE_CLASS (mode);
1583 /* If subtracting an integer constant, convert this into an addition of
1584 the negated constant. */
1586 if (binoptab == sub_optab && GET_CODE (op1) == CONST_INT)
1588 op1 = negate_rtx (mode, op1);
1589 binoptab = add_optab;
1592 /* Record where to delete back to if we backtrack. */
1593 last = get_last_insn ();
1595 /* If we can do it with a three-operand insn, do so. */
1597 if (methods != OPTAB_MUST_WIDEN
1598 && optab_handler (binoptab, mode)->insn_code != CODE_FOR_nothing)
1600 temp = expand_binop_directly (mode, binoptab, op0, op1, target,
1601 unsignedp, methods, last);
1606 /* If we were trying to rotate, and that didn't work, try rotating
1607 the other direction before falling back to shifts and bitwise-or. */
1608 if (((binoptab == rotl_optab
1609 && optab_handler (rotr_optab, mode)->insn_code != CODE_FOR_nothing)
1610 || (binoptab == rotr_optab
1611 && optab_handler (rotl_optab, mode)->insn_code != CODE_FOR_nothing))
1612 && mclass == MODE_INT)
1614 optab otheroptab = (binoptab == rotl_optab ? rotr_optab : rotl_optab);
1616 unsigned int bits = GET_MODE_BITSIZE (mode);
1618 if (GET_CODE (op1) == CONST_INT)
1619 newop1 = GEN_INT (bits - INTVAL (op1));
1620 else if (targetm.shift_truncation_mask (mode) == bits - 1)
1621 newop1 = negate_rtx (mode, op1);
1623 newop1 = expand_binop (mode, sub_optab,
1624 GEN_INT (bits), op1,
1625 NULL_RTX, unsignedp, OPTAB_DIRECT);
1627 temp = expand_binop_directly (mode, otheroptab, op0, newop1,
1628 target, unsignedp, methods, last);
1633 /* If this is a multiply, see if we can do a widening operation that
1634 takes operands of this mode and makes a wider mode. */
1636 if (binoptab == smul_optab
1637 && GET_MODE_WIDER_MODE (mode) != VOIDmode
1638 && ((optab_handler ((unsignedp ? umul_widen_optab : smul_widen_optab),
1639 GET_MODE_WIDER_MODE (mode))->insn_code)
1640 != CODE_FOR_nothing))
1642 temp = expand_binop (GET_MODE_WIDER_MODE (mode),
1643 unsignedp ? umul_widen_optab : smul_widen_optab,
1644 op0, op1, NULL_RTX, unsignedp, OPTAB_DIRECT);
1648 if (GET_MODE_CLASS (mode) == MODE_INT
1649 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (mode),
1650 GET_MODE_BITSIZE (GET_MODE (temp))))
1651 return gen_lowpart (mode, temp);
1653 return convert_to_mode (mode, temp, unsignedp);
1657 /* Look for a wider mode of the same class for which we think we
1658 can open-code the operation. Check for a widening multiply at the
1659 wider mode as well. */
1661 if (CLASS_HAS_WIDER_MODES_P (mclass)
1662 && methods != OPTAB_DIRECT && methods != OPTAB_LIB)
1663 for (wider_mode = GET_MODE_WIDER_MODE (mode);
1664 wider_mode != VOIDmode;
1665 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
1667 if (optab_handler (binoptab, wider_mode)->insn_code != CODE_FOR_nothing
1668 || (binoptab == smul_optab
1669 && GET_MODE_WIDER_MODE (wider_mode) != VOIDmode
1670 && ((optab_handler ((unsignedp ? umul_widen_optab
1671 : smul_widen_optab),
1672 GET_MODE_WIDER_MODE (wider_mode))->insn_code)
1673 != CODE_FOR_nothing)))
1675 rtx xop0 = op0, xop1 = op1;
1678 /* For certain integer operations, we need not actually extend
1679 the narrow operands, as long as we will truncate
1680 the results to the same narrowness. */
1682 if ((binoptab == ior_optab || binoptab == and_optab
1683 || binoptab == xor_optab
1684 || binoptab == add_optab || binoptab == sub_optab
1685 || binoptab == smul_optab || binoptab == ashl_optab)
1686 && mclass == MODE_INT)
1689 xop0 = avoid_expensive_constant (mode, binoptab,
1691 if (binoptab != ashl_optab)
1692 xop1 = avoid_expensive_constant (mode, binoptab,
1696 xop0 = widen_operand (xop0, wider_mode, mode, unsignedp, no_extend);
1698 /* The second operand of a shift must always be extended. */
1699 xop1 = widen_operand (xop1, wider_mode, mode, unsignedp,
1700 no_extend && binoptab != ashl_optab);
1702 temp = expand_binop (wider_mode, binoptab, xop0, xop1, NULL_RTX,
1703 unsignedp, OPTAB_DIRECT);
1706 if (mclass != MODE_INT
1707 || !TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (mode),
1708 GET_MODE_BITSIZE (wider_mode)))
1711 target = gen_reg_rtx (mode);
1712 convert_move (target, temp, 0);
1716 return gen_lowpart (mode, temp);
1719 delete_insns_since (last);
1723 /* If operation is commutative,
1724 try to make the first operand a register.
1725 Even better, try to make it the same as the target.
1726 Also try to make the last operand a constant. */
1727 if (commutative_optab_p (binoptab)
1728 && swap_commutative_operands_with_target (target, op0, op1))
1735 /* These can be done a word at a time. */
1736 if ((binoptab == and_optab || binoptab == ior_optab || binoptab == xor_optab)
1737 && mclass == MODE_INT
1738 && GET_MODE_SIZE (mode) > UNITS_PER_WORD
1739 && optab_handler (binoptab, word_mode)->insn_code != CODE_FOR_nothing)
1745 /* If TARGET is the same as one of the operands, the REG_EQUAL note
1746 won't be accurate, so use a new target. */
1747 if (target == 0 || target == op0 || target == op1)
1748 target = gen_reg_rtx (mode);
1752 /* Do the actual arithmetic. */
1753 for (i = 0; i < GET_MODE_BITSIZE (mode) / BITS_PER_WORD; i++)
1755 rtx target_piece = operand_subword (target, i, 1, mode);
1756 rtx x = expand_binop (word_mode, binoptab,
1757 operand_subword_force (op0, i, mode),
1758 operand_subword_force (op1, i, mode),
1759 target_piece, unsignedp, next_methods);
1764 if (target_piece != x)
1765 emit_move_insn (target_piece, x);
1768 insns = get_insns ();
1771 if (i == GET_MODE_BITSIZE (mode) / BITS_PER_WORD)
1773 if (binoptab->code != UNKNOWN)
1775 = gen_rtx_fmt_ee (binoptab->code, mode,
1776 copy_rtx (op0), copy_rtx (op1));
1785 /* Synthesize double word shifts from single word shifts. */
1786 if ((binoptab == lshr_optab || binoptab == ashl_optab
1787 || binoptab == ashr_optab)
1788 && mclass == MODE_INT
1789 && (GET_CODE (op1) == CONST_INT || optimize_insn_for_speed_p ())
1790 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
1791 && optab_handler (binoptab, word_mode)->insn_code != CODE_FOR_nothing
1792 && optab_handler (ashl_optab, word_mode)->insn_code != CODE_FOR_nothing
1793 && optab_handler (lshr_optab, word_mode)->insn_code != CODE_FOR_nothing)
1795 unsigned HOST_WIDE_INT shift_mask, double_shift_mask;
1796 enum machine_mode op1_mode;
1798 double_shift_mask = targetm.shift_truncation_mask (mode);
1799 shift_mask = targetm.shift_truncation_mask (word_mode);
1800 op1_mode = GET_MODE (op1) != VOIDmode ? GET_MODE (op1) : word_mode;
1802 /* Apply the truncation to constant shifts. */
1803 if (double_shift_mask > 0 && GET_CODE (op1) == CONST_INT)
1804 op1 = GEN_INT (INTVAL (op1) & double_shift_mask);
1806 if (op1 == CONST0_RTX (op1_mode))
1809 /* Make sure that this is a combination that expand_doubleword_shift
1810 can handle. See the comments there for details. */
1811 if (double_shift_mask == 0
1812 || (shift_mask == BITS_PER_WORD - 1
1813 && double_shift_mask == BITS_PER_WORD * 2 - 1))
1816 rtx into_target, outof_target;
1817 rtx into_input, outof_input;
1818 int left_shift, outof_word;
1820 /* If TARGET is the same as one of the operands, the REG_EQUAL note
1821 won't be accurate, so use a new target. */
1822 if (target == 0 || target == op0 || target == op1)
1823 target = gen_reg_rtx (mode);
1827 /* OUTOF_* is the word we are shifting bits away from, and
1828 INTO_* is the word that we are shifting bits towards, thus
1829 they differ depending on the direction of the shift and
1830 WORDS_BIG_ENDIAN. */
1832 left_shift = binoptab == ashl_optab;
1833 outof_word = left_shift ^ ! WORDS_BIG_ENDIAN;
1835 outof_target = operand_subword (target, outof_word, 1, mode);
1836 into_target = operand_subword (target, 1 - outof_word, 1, mode);
1838 outof_input = operand_subword_force (op0, outof_word, mode);
1839 into_input = operand_subword_force (op0, 1 - outof_word, mode);
1841 if (expand_doubleword_shift (op1_mode, binoptab,
1842 outof_input, into_input, op1,
1843 outof_target, into_target,
1844 unsignedp, next_methods, shift_mask))
1846 insns = get_insns ();
1856 /* Synthesize double word rotates from single word shifts. */
1857 if ((binoptab == rotl_optab || binoptab == rotr_optab)
1858 && mclass == MODE_INT
1859 && GET_CODE (op1) == CONST_INT
1860 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
1861 && optab_handler (ashl_optab, word_mode)->insn_code != CODE_FOR_nothing
1862 && optab_handler (lshr_optab, word_mode)->insn_code != CODE_FOR_nothing)
1865 rtx into_target, outof_target;
1866 rtx into_input, outof_input;
1868 int shift_count, left_shift, outof_word;
1870 /* If TARGET is the same as one of the operands, the REG_EQUAL note
1871 won't be accurate, so use a new target. Do this also if target is not
1872 a REG, first because having a register instead may open optimization
1873 opportunities, and second because if target and op0 happen to be MEMs
1874 designating the same location, we would risk clobbering it too early
1875 in the code sequence we generate below. */
1876 if (target == 0 || target == op0 || target == op1 || ! REG_P (target))
1877 target = gen_reg_rtx (mode);
1881 shift_count = INTVAL (op1);
1883 /* OUTOF_* is the word we are shifting bits away from, and
1884 INTO_* is the word that we are shifting bits towards, thus
1885 they differ depending on the direction of the shift and
1886 WORDS_BIG_ENDIAN. */
1888 left_shift = (binoptab == rotl_optab);
1889 outof_word = left_shift ^ ! WORDS_BIG_ENDIAN;
1891 outof_target = operand_subword (target, outof_word, 1, mode);
1892 into_target = operand_subword (target, 1 - outof_word, 1, mode);
1894 outof_input = operand_subword_force (op0, outof_word, mode);
1895 into_input = operand_subword_force (op0, 1 - outof_word, mode);
1897 if (shift_count == BITS_PER_WORD)
1899 /* This is just a word swap. */
1900 emit_move_insn (outof_target, into_input);
1901 emit_move_insn (into_target, outof_input);
1906 rtx into_temp1, into_temp2, outof_temp1, outof_temp2;
1907 rtx first_shift_count, second_shift_count;
1908 optab reverse_unsigned_shift, unsigned_shift;
1910 reverse_unsigned_shift = (left_shift ^ (shift_count < BITS_PER_WORD)
1911 ? lshr_optab : ashl_optab);
1913 unsigned_shift = (left_shift ^ (shift_count < BITS_PER_WORD)
1914 ? ashl_optab : lshr_optab);
1916 if (shift_count > BITS_PER_WORD)
1918 first_shift_count = GEN_INT (shift_count - BITS_PER_WORD);
1919 second_shift_count = GEN_INT (2 * BITS_PER_WORD - shift_count);
1923 first_shift_count = GEN_INT (BITS_PER_WORD - shift_count);
1924 second_shift_count = GEN_INT (shift_count);
1927 into_temp1 = expand_binop (word_mode, unsigned_shift,
1928 outof_input, first_shift_count,
1929 NULL_RTX, unsignedp, next_methods);
1930 into_temp2 = expand_binop (word_mode, reverse_unsigned_shift,
1931 into_input, second_shift_count,
1932 NULL_RTX, unsignedp, next_methods);
1934 if (into_temp1 != 0 && into_temp2 != 0)
1935 inter = expand_binop (word_mode, ior_optab, into_temp1, into_temp2,
1936 into_target, unsignedp, next_methods);
1940 if (inter != 0 && inter != into_target)
1941 emit_move_insn (into_target, inter);
1943 outof_temp1 = expand_binop (word_mode, unsigned_shift,
1944 into_input, first_shift_count,
1945 NULL_RTX, unsignedp, next_methods);
1946 outof_temp2 = expand_binop (word_mode, reverse_unsigned_shift,
1947 outof_input, second_shift_count,
1948 NULL_RTX, unsignedp, next_methods);
1950 if (inter != 0 && outof_temp1 != 0 && outof_temp2 != 0)
1951 inter = expand_binop (word_mode, ior_optab,
1952 outof_temp1, outof_temp2,
1953 outof_target, unsignedp, next_methods);
1955 if (inter != 0 && inter != outof_target)
1956 emit_move_insn (outof_target, inter);
1959 insns = get_insns ();
1969 /* These can be done a word at a time by propagating carries. */
1970 if ((binoptab == add_optab || binoptab == sub_optab)
1971 && mclass == MODE_INT
1972 && GET_MODE_SIZE (mode) >= 2 * UNITS_PER_WORD
1973 && optab_handler (binoptab, word_mode)->insn_code != CODE_FOR_nothing)
1976 optab otheroptab = binoptab == add_optab ? sub_optab : add_optab;
1977 const unsigned int nwords = GET_MODE_BITSIZE (mode) / BITS_PER_WORD;
1978 rtx carry_in = NULL_RTX, carry_out = NULL_RTX;
1979 rtx xop0, xop1, xtarget;
1981 /* We can handle either a 1 or -1 value for the carry. If STORE_FLAG
1982 value is one of those, use it. Otherwise, use 1 since it is the
1983 one easiest to get. */
1984 #if STORE_FLAG_VALUE == 1 || STORE_FLAG_VALUE == -1
1985 int normalizep = STORE_FLAG_VALUE;
1990 /* Prepare the operands. */
1991 xop0 = force_reg (mode, op0);
1992 xop1 = force_reg (mode, op1);
1994 xtarget = gen_reg_rtx (mode);
1996 if (target == 0 || !REG_P (target))
1999 /* Indicate for flow that the entire target reg is being set. */
2001 emit_clobber (xtarget);
2003 /* Do the actual arithmetic. */
2004 for (i = 0; i < nwords; i++)
2006 int index = (WORDS_BIG_ENDIAN ? nwords - i - 1 : i);
2007 rtx target_piece = operand_subword (xtarget, index, 1, mode);
2008 rtx op0_piece = operand_subword_force (xop0, index, mode);
2009 rtx op1_piece = operand_subword_force (xop1, index, mode);
2012 /* Main add/subtract of the input operands. */
2013 x = expand_binop (word_mode, binoptab,
2014 op0_piece, op1_piece,
2015 target_piece, unsignedp, next_methods);
2021 /* Store carry from main add/subtract. */
2022 carry_out = gen_reg_rtx (word_mode);
2023 carry_out = emit_store_flag_force (carry_out,
2024 (binoptab == add_optab
2027 word_mode, 1, normalizep);
2034 /* Add/subtract previous carry to main result. */
2035 newx = expand_binop (word_mode,
2036 normalizep == 1 ? binoptab : otheroptab,
2038 NULL_RTX, 1, next_methods);
2042 /* Get out carry from adding/subtracting carry in. */
2043 rtx carry_tmp = gen_reg_rtx (word_mode);
2044 carry_tmp = emit_store_flag_force (carry_tmp,
2045 (binoptab == add_optab
2048 word_mode, 1, normalizep);
2050 /* Logical-ior the two poss. carry together. */
2051 carry_out = expand_binop (word_mode, ior_optab,
2052 carry_out, carry_tmp,
2053 carry_out, 0, next_methods);
2057 emit_move_insn (target_piece, newx);
2061 if (x != target_piece)
2062 emit_move_insn (target_piece, x);
2065 carry_in = carry_out;
2068 if (i == GET_MODE_BITSIZE (mode) / (unsigned) BITS_PER_WORD)
2070 if (optab_handler (mov_optab, mode)->insn_code != CODE_FOR_nothing
2071 || ! rtx_equal_p (target, xtarget))
2073 rtx temp = emit_move_insn (target, xtarget);
2075 set_unique_reg_note (temp,
2077 gen_rtx_fmt_ee (binoptab->code, mode,
2088 delete_insns_since (last);
2091 /* Attempt to synthesize double word multiplies using a sequence of word
2092 mode multiplications. We first attempt to generate a sequence using a
2093 more efficient unsigned widening multiply, and if that fails we then
2094 try using a signed widening multiply. */
2096 if (binoptab == smul_optab
2097 && mclass == MODE_INT
2098 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
2099 && optab_handler (smul_optab, word_mode)->insn_code != CODE_FOR_nothing
2100 && optab_handler (add_optab, word_mode)->insn_code != CODE_FOR_nothing)
2102 rtx product = NULL_RTX;
2104 if (optab_handler (umul_widen_optab, mode)->insn_code
2105 != CODE_FOR_nothing)
2107 product = expand_doubleword_mult (mode, op0, op1, target,
2110 delete_insns_since (last);
2113 if (product == NULL_RTX
2114 && optab_handler (smul_widen_optab, mode)->insn_code
2115 != CODE_FOR_nothing)
2117 product = expand_doubleword_mult (mode, op0, op1, target,
2120 delete_insns_since (last);
2123 if (product != NULL_RTX)
2125 if (optab_handler (mov_optab, mode)->insn_code != CODE_FOR_nothing)
2127 temp = emit_move_insn (target ? target : product, product);
2128 set_unique_reg_note (temp,
2130 gen_rtx_fmt_ee (MULT, mode,
2138 /* It can't be open-coded in this mode.
2139 Use a library call if one is available and caller says that's ok. */
2141 libfunc = optab_libfunc (binoptab, mode);
2143 && (methods == OPTAB_LIB || methods == OPTAB_LIB_WIDEN))
2147 enum machine_mode op1_mode = mode;
2152 if (shift_optab_p (binoptab))
2154 op1_mode = targetm.libgcc_shift_count_mode ();
2155 /* Specify unsigned here,
2156 since negative shift counts are meaningless. */
2157 op1x = convert_to_mode (op1_mode, op1, 1);
2160 if (GET_MODE (op0) != VOIDmode
2161 && GET_MODE (op0) != mode)
2162 op0 = convert_to_mode (mode, op0, unsignedp);
2164 /* Pass 1 for NO_QUEUE so we don't lose any increments
2165 if the libcall is cse'd or moved. */
2166 value = emit_library_call_value (libfunc,
2167 NULL_RTX, LCT_CONST, mode, 2,
2168 op0, mode, op1x, op1_mode);
2170 insns = get_insns ();
2173 target = gen_reg_rtx (mode);
2174 emit_libcall_block (insns, target, value,
2175 gen_rtx_fmt_ee (binoptab->code, mode, op0, op1));
2180 delete_insns_since (last);
2182 /* It can't be done in this mode. Can we do it in a wider mode? */
2184 if (! (methods == OPTAB_WIDEN || methods == OPTAB_LIB_WIDEN
2185 || methods == OPTAB_MUST_WIDEN))
2187 /* Caller says, don't even try. */
2188 delete_insns_since (entry_last);
2192 /* Compute the value of METHODS to pass to recursive calls.
2193 Don't allow widening to be tried recursively. */
2195 methods = (methods == OPTAB_LIB_WIDEN ? OPTAB_LIB : OPTAB_DIRECT);
2197 /* Look for a wider mode of the same class for which it appears we can do
2200 if (CLASS_HAS_WIDER_MODES_P (mclass))
2202 for (wider_mode = GET_MODE_WIDER_MODE (mode);
2203 wider_mode != VOIDmode;
2204 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
2206 if ((optab_handler (binoptab, wider_mode)->insn_code
2207 != CODE_FOR_nothing)
2208 || (methods == OPTAB_LIB
2209 && optab_libfunc (binoptab, wider_mode)))
2211 rtx xop0 = op0, xop1 = op1;
2214 /* For certain integer operations, we need not actually extend
2215 the narrow operands, as long as we will truncate
2216 the results to the same narrowness. */
2218 if ((binoptab == ior_optab || binoptab == and_optab
2219 || binoptab == xor_optab
2220 || binoptab == add_optab || binoptab == sub_optab
2221 || binoptab == smul_optab || binoptab == ashl_optab)
2222 && mclass == MODE_INT)
2225 xop0 = widen_operand (xop0, wider_mode, mode,
2226 unsignedp, no_extend);
2228 /* The second operand of a shift must always be extended. */
2229 xop1 = widen_operand (xop1, wider_mode, mode, unsignedp,
2230 no_extend && binoptab != ashl_optab);
2232 temp = expand_binop (wider_mode, binoptab, xop0, xop1, NULL_RTX,
2233 unsignedp, methods);
2236 if (mclass != MODE_INT
2237 || !TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (mode),
2238 GET_MODE_BITSIZE (wider_mode)))
2241 target = gen_reg_rtx (mode);
2242 convert_move (target, temp, 0);
2246 return gen_lowpart (mode, temp);
2249 delete_insns_since (last);
2254 delete_insns_since (entry_last);
2258 /* Expand a binary operator which has both signed and unsigned forms.
2259 UOPTAB is the optab for unsigned operations, and SOPTAB is for
2262 If we widen unsigned operands, we may use a signed wider operation instead
2263 of an unsigned wider operation, since the result would be the same. */
2266 sign_expand_binop (enum machine_mode mode, optab uoptab, optab soptab,
2267 rtx op0, rtx op1, rtx target, int unsignedp,
2268 enum optab_methods methods)
2271 optab direct_optab = unsignedp ? uoptab : soptab;
2272 struct optab wide_soptab;
2274 /* Do it without widening, if possible. */
2275 temp = expand_binop (mode, direct_optab, op0, op1, target,
2276 unsignedp, OPTAB_DIRECT);
2277 if (temp || methods == OPTAB_DIRECT)
2280 /* Try widening to a signed int. Make a fake signed optab that
2281 hides any signed insn for direct use. */
2282 wide_soptab = *soptab;
2283 optab_handler (&wide_soptab, mode)->insn_code = CODE_FOR_nothing;
2284 /* We don't want to generate new hash table entries from this fake
2286 wide_soptab.libcall_gen = NULL;
2288 temp = expand_binop (mode, &wide_soptab, op0, op1, target,
2289 unsignedp, OPTAB_WIDEN);
2291 /* For unsigned operands, try widening to an unsigned int. */
2292 if (temp == 0 && unsignedp)
2293 temp = expand_binop (mode, uoptab, op0, op1, target,
2294 unsignedp, OPTAB_WIDEN);
2295 if (temp || methods == OPTAB_WIDEN)
2298 /* Use the right width lib call if that exists. */
2299 temp = expand_binop (mode, direct_optab, op0, op1, target, unsignedp, OPTAB_LIB);
2300 if (temp || methods == OPTAB_LIB)
2303 /* Must widen and use a lib call, use either signed or unsigned. */
2304 temp = expand_binop (mode, &wide_soptab, op0, op1, target,
2305 unsignedp, methods);
2309 return expand_binop (mode, uoptab, op0, op1, target,
2310 unsignedp, methods);
2314 /* Generate code to perform an operation specified by UNOPPTAB
2315 on operand OP0, with two results to TARG0 and TARG1.
2316 We assume that the order of the operands for the instruction
2317 is TARG0, TARG1, OP0.
2319 Either TARG0 or TARG1 may be zero, but what that means is that
2320 the result is not actually wanted. We will generate it into
2321 a dummy pseudo-reg and discard it. They may not both be zero.
2323 Returns 1 if this operation can be performed; 0 if not. */
2326 expand_twoval_unop (optab unoptab, rtx op0, rtx targ0, rtx targ1,
2329 enum machine_mode mode = GET_MODE (targ0 ? targ0 : targ1);
2330 enum mode_class mclass;
2331 enum machine_mode wider_mode;
2332 rtx entry_last = get_last_insn ();
2335 mclass = GET_MODE_CLASS (mode);
2338 targ0 = gen_reg_rtx (mode);
2340 targ1 = gen_reg_rtx (mode);
2342 /* Record where to go back to if we fail. */
2343 last = get_last_insn ();
2345 if (optab_handler (unoptab, mode)->insn_code != CODE_FOR_nothing)
2347 int icode = (int) optab_handler (unoptab, mode)->insn_code;
2348 enum machine_mode mode0 = insn_data[icode].operand[2].mode;
2352 if (GET_MODE (xop0) != VOIDmode
2353 && GET_MODE (xop0) != mode0)
2354 xop0 = convert_to_mode (mode0, xop0, unsignedp);
2356 /* Now, if insn doesn't accept these operands, put them into pseudos. */
2357 if (!insn_data[icode].operand[2].predicate (xop0, mode0))
2358 xop0 = copy_to_mode_reg (mode0, xop0);
2360 /* We could handle this, but we should always be called with a pseudo
2361 for our targets and all insns should take them as outputs. */
2362 gcc_assert (insn_data[icode].operand[0].predicate (targ0, mode));
2363 gcc_assert (insn_data[icode].operand[1].predicate (targ1, mode));
2365 pat = GEN_FCN (icode) (targ0, targ1, xop0);
2372 delete_insns_since (last);
2375 /* It can't be done in this mode. Can we do it in a wider mode? */
2377 if (CLASS_HAS_WIDER_MODES_P (mclass))
2379 for (wider_mode = GET_MODE_WIDER_MODE (mode);
2380 wider_mode != VOIDmode;
2381 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
2383 if (optab_handler (unoptab, wider_mode)->insn_code
2384 != CODE_FOR_nothing)
2386 rtx t0 = gen_reg_rtx (wider_mode);
2387 rtx t1 = gen_reg_rtx (wider_mode);
2388 rtx cop0 = convert_modes (wider_mode, mode, op0, unsignedp);
2390 if (expand_twoval_unop (unoptab, cop0, t0, t1, unsignedp))
2392 convert_move (targ0, t0, unsignedp);
2393 convert_move (targ1, t1, unsignedp);
2397 delete_insns_since (last);
2402 delete_insns_since (entry_last);
2406 /* Generate code to perform an operation specified by BINOPTAB
2407 on operands OP0 and OP1, with two results to TARG1 and TARG2.
2408 We assume that the order of the operands for the instruction
2409 is TARG0, OP0, OP1, TARG1, which would fit a pattern like
2410 [(set TARG0 (operate OP0 OP1)) (set TARG1 (operate ...))].
2412 Either TARG0 or TARG1 may be zero, but what that means is that
2413 the result is not actually wanted. We will generate it into
2414 a dummy pseudo-reg and discard it. They may not both be zero.
2416 Returns 1 if this operation can be performed; 0 if not. */
2419 expand_twoval_binop (optab binoptab, rtx op0, rtx op1, rtx targ0, rtx targ1,
2422 enum machine_mode mode = GET_MODE (targ0 ? targ0 : targ1);
2423 enum mode_class mclass;
2424 enum machine_mode wider_mode;
2425 rtx entry_last = get_last_insn ();
2428 mclass = GET_MODE_CLASS (mode);
2431 targ0 = gen_reg_rtx (mode);
2433 targ1 = gen_reg_rtx (mode);
2435 /* Record where to go back to if we fail. */
2436 last = get_last_insn ();
2438 if (optab_handler (binoptab, mode)->insn_code != CODE_FOR_nothing)
2440 int icode = (int) optab_handler (binoptab, mode)->insn_code;
2441 enum machine_mode mode0 = insn_data[icode].operand[1].mode;
2442 enum machine_mode mode1 = insn_data[icode].operand[2].mode;
2444 rtx xop0 = op0, xop1 = op1;
2446 /* If we are optimizing, force expensive constants into a register. */
2447 xop0 = avoid_expensive_constant (mode0, binoptab, xop0, unsignedp);
2448 xop1 = avoid_expensive_constant (mode1, binoptab, xop1, unsignedp);
2450 /* In case the insn wants input operands in modes different from
2451 those of the actual operands, convert the operands. It would
2452 seem that we don't need to convert CONST_INTs, but we do, so
2453 that they're properly zero-extended, sign-extended or truncated
2456 if (GET_MODE (op0) != mode0 && mode0 != VOIDmode)
2457 xop0 = convert_modes (mode0,
2458 GET_MODE (op0) != VOIDmode
2463 if (GET_MODE (op1) != mode1 && mode1 != VOIDmode)
2464 xop1 = convert_modes (mode1,
2465 GET_MODE (op1) != VOIDmode
2470 /* Now, if insn doesn't accept these operands, put them into pseudos. */
2471 if (!insn_data[icode].operand[1].predicate (xop0, mode0))
2472 xop0 = copy_to_mode_reg (mode0, xop0);
2474 if (!insn_data[icode].operand[2].predicate (xop1, mode1))
2475 xop1 = copy_to_mode_reg (mode1, xop1);
2477 /* We could handle this, but we should always be called with a pseudo
2478 for our targets and all insns should take them as outputs. */
2479 gcc_assert (insn_data[icode].operand[0].predicate (targ0, mode));
2480 gcc_assert (insn_data[icode].operand[3].predicate (targ1, mode));
2482 pat = GEN_FCN (icode) (targ0, xop0, xop1, targ1);
2489 delete_insns_since (last);
2492 /* It can't be done in this mode. Can we do it in a wider mode? */
2494 if (CLASS_HAS_WIDER_MODES_P (mclass))
2496 for (wider_mode = GET_MODE_WIDER_MODE (mode);
2497 wider_mode != VOIDmode;
2498 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
2500 if (optab_handler (binoptab, wider_mode)->insn_code
2501 != CODE_FOR_nothing)
2503 rtx t0 = gen_reg_rtx (wider_mode);
2504 rtx t1 = gen_reg_rtx (wider_mode);
2505 rtx cop0 = convert_modes (wider_mode, mode, op0, unsignedp);
2506 rtx cop1 = convert_modes (wider_mode, mode, op1, unsignedp);
2508 if (expand_twoval_binop (binoptab, cop0, cop1,
2511 convert_move (targ0, t0, unsignedp);
2512 convert_move (targ1, t1, unsignedp);
2516 delete_insns_since (last);
2521 delete_insns_since (entry_last);
2525 /* Expand the two-valued library call indicated by BINOPTAB, but
2526 preserve only one of the values. If TARG0 is non-NULL, the first
2527 value is placed into TARG0; otherwise the second value is placed
2528 into TARG1. Exactly one of TARG0 and TARG1 must be non-NULL. The
2529 value stored into TARG0 or TARG1 is equivalent to (CODE OP0 OP1).
2530 This routine assumes that the value returned by the library call is
2531 as if the return value was of an integral mode twice as wide as the
2532 mode of OP0. Returns 1 if the call was successful. */
2535 expand_twoval_binop_libfunc (optab binoptab, rtx op0, rtx op1,
2536 rtx targ0, rtx targ1, enum rtx_code code)
2538 enum machine_mode mode;
2539 enum machine_mode libval_mode;
2544 /* Exactly one of TARG0 or TARG1 should be non-NULL. */
2545 gcc_assert (!targ0 != !targ1);
2547 mode = GET_MODE (op0);
2548 libfunc = optab_libfunc (binoptab, mode);
2552 /* The value returned by the library function will have twice as
2553 many bits as the nominal MODE. */
2554 libval_mode = smallest_mode_for_size (2 * GET_MODE_BITSIZE (mode),
2557 libval = emit_library_call_value (libfunc, NULL_RTX, LCT_CONST,
2561 /* Get the part of VAL containing the value that we want. */
2562 libval = simplify_gen_subreg (mode, libval, libval_mode,
2563 targ0 ? 0 : GET_MODE_SIZE (mode));
2564 insns = get_insns ();
2566 /* Move the into the desired location. */
2567 emit_libcall_block (insns, targ0 ? targ0 : targ1, libval,
2568 gen_rtx_fmt_ee (code, mode, op0, op1));
2574 /* Wrapper around expand_unop which takes an rtx code to specify
2575 the operation to perform, not an optab pointer. All other
2576 arguments are the same. */
2578 expand_simple_unop (enum machine_mode mode, enum rtx_code code, rtx op0,
2579 rtx target, int unsignedp)
2581 optab unop = code_to_optab[(int) code];
2584 return expand_unop (mode, unop, op0, target, unsignedp);
2590 (clz:wide (zero_extend:wide x)) - ((width wide) - (width narrow)). */
2592 widen_clz (enum machine_mode mode, rtx op0, rtx target)
2594 enum mode_class mclass = GET_MODE_CLASS (mode);
2595 if (CLASS_HAS_WIDER_MODES_P (mclass))
2597 enum machine_mode wider_mode;
2598 for (wider_mode = GET_MODE_WIDER_MODE (mode);
2599 wider_mode != VOIDmode;
2600 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
2602 if (optab_handler (clz_optab, wider_mode)->insn_code
2603 != CODE_FOR_nothing)
2605 rtx xop0, temp, last;
2607 last = get_last_insn ();
2610 target = gen_reg_rtx (mode);
2611 xop0 = widen_operand (op0, wider_mode, mode, true, false);
2612 temp = expand_unop (wider_mode, clz_optab, xop0, NULL_RTX, true);
2614 temp = expand_binop (wider_mode, sub_optab, temp,
2615 GEN_INT (GET_MODE_BITSIZE (wider_mode)
2616 - GET_MODE_BITSIZE (mode)),
2617 target, true, OPTAB_DIRECT);
2619 delete_insns_since (last);
2628 /* Try calculating clz of a double-word quantity as two clz's of word-sized
2629 quantities, choosing which based on whether the high word is nonzero. */
2631 expand_doubleword_clz (enum machine_mode mode, rtx op0, rtx target)
2633 rtx xop0 = force_reg (mode, op0);
2634 rtx subhi = gen_highpart (word_mode, xop0);
2635 rtx sublo = gen_lowpart (word_mode, xop0);
2636 rtx hi0_label = gen_label_rtx ();
2637 rtx after_label = gen_label_rtx ();
2638 rtx seq, temp, result;
2640 /* If we were not given a target, use a word_mode register, not a
2641 'mode' register. The result will fit, and nobody is expecting
2642 anything bigger (the return type of __builtin_clz* is int). */
2644 target = gen_reg_rtx (word_mode);
2646 /* In any case, write to a word_mode scratch in both branches of the
2647 conditional, so we can ensure there is a single move insn setting
2648 'target' to tag a REG_EQUAL note on. */
2649 result = gen_reg_rtx (word_mode);
2653 /* If the high word is not equal to zero,
2654 then clz of the full value is clz of the high word. */
2655 emit_cmp_and_jump_insns (subhi, CONST0_RTX (word_mode), EQ, 0,
2656 word_mode, true, hi0_label);
2658 temp = expand_unop_direct (word_mode, clz_optab, subhi, result, true);
2663 convert_move (result, temp, true);
2665 emit_jump_insn (gen_jump (after_label));
2668 /* Else clz of the full value is clz of the low word plus the number
2669 of bits in the high word. */
2670 emit_label (hi0_label);
2672 temp = expand_unop_direct (word_mode, clz_optab, sublo, 0, true);
2675 temp = expand_binop (word_mode, add_optab, temp,
2676 GEN_INT (GET_MODE_BITSIZE (word_mode)),
2677 result, true, OPTAB_DIRECT);
2681 convert_move (result, temp, true);
2683 emit_label (after_label);
2684 convert_move (target, result, true);
2689 add_equal_note (seq, target, CLZ, xop0, 0);
2701 (lshiftrt:wide (bswap:wide x) ((width wide) - (width narrow))). */
2703 widen_bswap (enum machine_mode mode, rtx op0, rtx target)
2705 enum mode_class mclass = GET_MODE_CLASS (mode);
2706 enum machine_mode wider_mode;
2709 if (!CLASS_HAS_WIDER_MODES_P (mclass))
2712 for (wider_mode = GET_MODE_WIDER_MODE (mode);
2713 wider_mode != VOIDmode;
2714 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
2715 if (optab_handler (bswap_optab, wider_mode)->insn_code != CODE_FOR_nothing)
2720 last = get_last_insn ();
2722 x = widen_operand (op0, wider_mode, mode, true, true);
2723 x = expand_unop (wider_mode, bswap_optab, x, NULL_RTX, true);
2726 x = expand_shift (RSHIFT_EXPR, wider_mode, x,
2727 size_int (GET_MODE_BITSIZE (wider_mode)
2728 - GET_MODE_BITSIZE (mode)),
2734 target = gen_reg_rtx (mode);
2735 emit_move_insn (target, gen_lowpart (mode, x));
2738 delete_insns_since (last);
2743 /* Try calculating bswap as two bswaps of two word-sized operands. */
2746 expand_doubleword_bswap (enum machine_mode mode, rtx op, rtx target)
2750 t1 = expand_unop (word_mode, bswap_optab,
2751 operand_subword_force (op, 0, mode), NULL_RTX, true);
2752 t0 = expand_unop (word_mode, bswap_optab,
2753 operand_subword_force (op, 1, mode), NULL_RTX, true);
2756 target = gen_reg_rtx (mode);
2758 emit_clobber (target);
2759 emit_move_insn (operand_subword (target, 0, 1, mode), t0);
2760 emit_move_insn (operand_subword (target, 1, 1, mode), t1);
2765 /* Try calculating (parity x) as (and (popcount x) 1), where
2766 popcount can also be done in a wider mode. */
2768 expand_parity (enum machine_mode mode, rtx op0, rtx target)
2770 enum mode_class mclass = GET_MODE_CLASS (mode);
2771 if (CLASS_HAS_WIDER_MODES_P (mclass))
2773 enum machine_mode wider_mode;
2774 for (wider_mode = mode; wider_mode != VOIDmode;
2775 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
2777 if (optab_handler (popcount_optab, wider_mode)->insn_code
2778 != CODE_FOR_nothing)
2780 rtx xop0, temp, last;
2782 last = get_last_insn ();
2785 target = gen_reg_rtx (mode);
2786 xop0 = widen_operand (op0, wider_mode, mode, true, false);
2787 temp = expand_unop (wider_mode, popcount_optab, xop0, NULL_RTX,
2790 temp = expand_binop (wider_mode, and_optab, temp, const1_rtx,
2791 target, true, OPTAB_DIRECT);
2793 delete_insns_since (last);
2802 /* Try calculating ctz(x) as K - clz(x & -x) ,
2803 where K is GET_MODE_BITSIZE(mode) - 1.
2805 Both __builtin_ctz and __builtin_clz are undefined at zero, so we
2806 don't have to worry about what the hardware does in that case. (If
2807 the clz instruction produces the usual value at 0, which is K, the
2808 result of this code sequence will be -1; expand_ffs, below, relies
2809 on this. It might be nice to have it be K instead, for consistency
2810 with the (very few) processors that provide a ctz with a defined
2811 value, but that would take one more instruction, and it would be
2812 less convenient for expand_ffs anyway. */
2815 expand_ctz (enum machine_mode mode, rtx op0, rtx target)
2819 if (optab_handler (clz_optab, mode)->insn_code == CODE_FOR_nothing)
2824 temp = expand_unop_direct (mode, neg_optab, op0, NULL_RTX, true);
2826 temp = expand_binop (mode, and_optab, op0, temp, NULL_RTX,
2827 true, OPTAB_DIRECT);
2829 temp = expand_unop_direct (mode, clz_optab, temp, NULL_RTX, true);
2831 temp = expand_binop (mode, sub_optab, GEN_INT (GET_MODE_BITSIZE (mode) - 1),
2833 true, OPTAB_DIRECT);
2843 add_equal_note (seq, temp, CTZ, op0, 0);
2849 /* Try calculating ffs(x) using ctz(x) if we have that instruction, or
2850 else with the sequence used by expand_clz.
2852 The ffs builtin promises to return zero for a zero value and ctz/clz
2853 may have an undefined value in that case. If they do not give us a
2854 convenient value, we have to generate a test and branch. */
2856 expand_ffs (enum machine_mode mode, rtx op0, rtx target)
2858 HOST_WIDE_INT val = 0;
2859 bool defined_at_zero = false;
2862 if (optab_handler (ctz_optab, mode)->insn_code != CODE_FOR_nothing)
2866 temp = expand_unop_direct (mode, ctz_optab, op0, 0, true);
2870 defined_at_zero = (CTZ_DEFINED_VALUE_AT_ZERO (mode, val) == 2);
2872 else if (optab_handler (clz_optab, mode)->insn_code != CODE_FOR_nothing)
2875 temp = expand_ctz (mode, op0, 0);
2879 if (CLZ_DEFINED_VALUE_AT_ZERO (mode, val) == 2)
2881 defined_at_zero = true;
2882 val = (GET_MODE_BITSIZE (mode) - 1) - val;
2888 if (defined_at_zero && val == -1)
2889 /* No correction needed at zero. */;
2892 /* We don't try to do anything clever with the situation found
2893 on some processors (eg Alpha) where ctz(0:mode) ==
2894 bitsize(mode). If someone can think of a way to send N to -1
2895 and leave alone all values in the range 0..N-1 (where N is a
2896 power of two), cheaper than this test-and-branch, please add it.
2898 The test-and-branch is done after the operation itself, in case
2899 the operation sets condition codes that can be recycled for this.
2900 (This is true on i386, for instance.) */
2902 rtx nonzero_label = gen_label_rtx ();
2903 emit_cmp_and_jump_insns (op0, CONST0_RTX (mode), NE, 0,
2904 mode, true, nonzero_label);
2906 convert_move (temp, GEN_INT (-1), false);
2907 emit_label (nonzero_label);
2910 /* temp now has a value in the range -1..bitsize-1. ffs is supposed
2911 to produce a value in the range 0..bitsize. */
2912 temp = expand_binop (mode, add_optab, temp, GEN_INT (1),
2913 target, false, OPTAB_DIRECT);
2920 add_equal_note (seq, temp, FFS, op0, 0);
2929 /* Extract the OMODE lowpart from VAL, which has IMODE. Under certain
2930 conditions, VAL may already be a SUBREG against which we cannot generate
2931 a further SUBREG. In this case, we expect forcing the value into a
2932 register will work around the situation. */
2935 lowpart_subreg_maybe_copy (enum machine_mode omode, rtx val,
2936 enum machine_mode imode)
2939 ret = lowpart_subreg (omode, val, imode);
2942 val = force_reg (imode, val);
2943 ret = lowpart_subreg (omode, val, imode);
2944 gcc_assert (ret != NULL);
2949 /* Expand a floating point absolute value or negation operation via a
2950 logical operation on the sign bit. */
2953 expand_absneg_bit (enum rtx_code code, enum machine_mode mode,
2954 rtx op0, rtx target)
2956 const struct real_format *fmt;
2957 int bitpos, word, nwords, i;
2958 enum machine_mode imode;
2959 HOST_WIDE_INT hi, lo;
2962 /* The format has to have a simple sign bit. */
2963 fmt = REAL_MODE_FORMAT (mode);
2967 bitpos = fmt->signbit_rw;
2971 /* Don't create negative zeros if the format doesn't support them. */
2972 if (code == NEG && !fmt->has_signed_zero)
2975 if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD)
2977 imode = int_mode_for_mode (mode);
2978 if (imode == BLKmode)
2987 if (FLOAT_WORDS_BIG_ENDIAN)
2988 word = (GET_MODE_BITSIZE (mode) - bitpos) / BITS_PER_WORD;
2990 word = bitpos / BITS_PER_WORD;
2991 bitpos = bitpos % BITS_PER_WORD;
2992 nwords = (GET_MODE_BITSIZE (mode) + BITS_PER_WORD - 1) / BITS_PER_WORD;
2995 if (bitpos < HOST_BITS_PER_WIDE_INT)
2998 lo = (HOST_WIDE_INT) 1 << bitpos;
3002 hi = (HOST_WIDE_INT) 1 << (bitpos - HOST_BITS_PER_WIDE_INT);
3008 if (target == 0 || target == op0)
3009 target = gen_reg_rtx (mode);
3015 for (i = 0; i < nwords; ++i)
3017 rtx targ_piece = operand_subword (target, i, 1, mode);
3018 rtx op0_piece = operand_subword_force (op0, i, mode);
3022 temp = expand_binop (imode, code == ABS ? and_optab : xor_optab,
3024 immed_double_const (lo, hi, imode),
3025 targ_piece, 1, OPTAB_LIB_WIDEN);
3026 if (temp != targ_piece)
3027 emit_move_insn (targ_piece, temp);
3030 emit_move_insn (targ_piece, op0_piece);
3033 insns = get_insns ();
3040 temp = expand_binop (imode, code == ABS ? and_optab : xor_optab,
3041 gen_lowpart (imode, op0),
3042 immed_double_const (lo, hi, imode),
3043 gen_lowpart (imode, target), 1, OPTAB_LIB_WIDEN);
3044 target = lowpart_subreg_maybe_copy (mode, temp, imode);
3046 set_unique_reg_note (get_last_insn (), REG_EQUAL,
3047 gen_rtx_fmt_e (code, mode, copy_rtx (op0)));
3053 /* As expand_unop, but will fail rather than attempt the operation in a
3054 different mode or with a libcall. */
3056 expand_unop_direct (enum machine_mode mode, optab unoptab, rtx op0, rtx target,
3059 if (optab_handler (unoptab, mode)->insn_code != CODE_FOR_nothing)
3061 int icode = (int) optab_handler (unoptab, mode)->insn_code;
3062 enum machine_mode mode0 = insn_data[icode].operand[1].mode;
3064 rtx last = get_last_insn ();
3070 temp = gen_reg_rtx (mode);
3072 if (GET_MODE (xop0) != VOIDmode
3073 && GET_MODE (xop0) != mode0)
3074 xop0 = convert_to_mode (mode0, xop0, unsignedp);
3076 /* Now, if insn doesn't accept our operand, put it into a pseudo. */
3078 if (!insn_data[icode].operand[1].predicate (xop0, mode0))
3079 xop0 = copy_to_mode_reg (mode0, xop0);
3081 if (!insn_data[icode].operand[0].predicate (temp, mode))
3082 temp = gen_reg_rtx (mode);
3084 pat = GEN_FCN (icode) (temp, xop0);
3087 if (INSN_P (pat) && NEXT_INSN (pat) != NULL_RTX
3088 && ! add_equal_note (pat, temp, unoptab->code, xop0, NULL_RTX))
3090 delete_insns_since (last);
3091 return expand_unop (mode, unoptab, op0, NULL_RTX, unsignedp);
3099 delete_insns_since (last);
3104 /* Generate code to perform an operation specified by UNOPTAB
3105 on operand OP0, with result having machine-mode MODE.
3107 UNSIGNEDP is for the case where we have to widen the operands
3108 to perform the operation. It says to use zero-extension.
3110 If TARGET is nonzero, the value
3111 is generated there, if it is convenient to do so.
3112 In all cases an rtx is returned for the locus of the value;
3113 this may or may not be TARGET. */
3116 expand_unop (enum machine_mode mode, optab unoptab, rtx op0, rtx target,
3119 enum mode_class mclass = GET_MODE_CLASS (mode);
3120 enum machine_mode wider_mode;
3124 temp = expand_unop_direct (mode, unoptab, op0, target, unsignedp);
3128 /* It can't be done in this mode. Can we open-code it in a wider mode? */
3130 /* Widening (or narrowing) clz needs special treatment. */
3131 if (unoptab == clz_optab)
3133 temp = widen_clz (mode, op0, target);
3137 if (GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
3138 && optab_handler (unoptab, word_mode)->insn_code != CODE_FOR_nothing)
3140 temp = expand_doubleword_clz (mode, op0, target);
3148 /* Widening (or narrowing) bswap needs special treatment. */
3149 if (unoptab == bswap_optab)
3151 temp = widen_bswap (mode, op0, target);
3155 if (GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
3156 && optab_handler (unoptab, word_mode)->insn_code != CODE_FOR_nothing)
3158 temp = expand_doubleword_bswap (mode, op0, target);
3166 if (CLASS_HAS_WIDER_MODES_P (mclass))
3167 for (wider_mode = GET_MODE_WIDER_MODE (mode);
3168 wider_mode != VOIDmode;
3169 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
3171 if (optab_handler (unoptab, wider_mode)->insn_code != CODE_FOR_nothing)
3174 rtx last = get_last_insn ();
3176 /* For certain operations, we need not actually extend
3177 the narrow operand, as long as we will truncate the
3178 results to the same narrowness. */
3180 xop0 = widen_operand (xop0, wider_mode, mode, unsignedp,
3181 (unoptab == neg_optab
3182 || unoptab == one_cmpl_optab)
3183 && mclass == MODE_INT);
3185 temp = expand_unop (wider_mode, unoptab, xop0, NULL_RTX,
3190 if (mclass != MODE_INT
3191 || !TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (mode),
3192 GET_MODE_BITSIZE (wider_mode)))
3195 target = gen_reg_rtx (mode);
3196 convert_move (target, temp, 0);
3200 return gen_lowpart (mode, temp);
3203 delete_insns_since (last);
3207 /* These can be done a word at a time. */
3208 if (unoptab == one_cmpl_optab
3209 && mclass == MODE_INT
3210 && GET_MODE_SIZE (mode) > UNITS_PER_WORD
3211 && optab_handler (unoptab, word_mode)->insn_code != CODE_FOR_nothing)
3216 if (target == 0 || target == op0)
3217 target = gen_reg_rtx (mode);
3221 /* Do the actual arithmetic. */
3222 for (i = 0; i < GET_MODE_BITSIZE (mode) / BITS_PER_WORD; i++)
3224 rtx target_piece = operand_subword (target, i, 1, mode);
3225 rtx x = expand_unop (word_mode, unoptab,
3226 operand_subword_force (op0, i, mode),
3227 target_piece, unsignedp);
3229 if (target_piece != x)
3230 emit_move_insn (target_piece, x);
3233 insns = get_insns ();
3240 if (unoptab->code == NEG)
3242 /* Try negating floating point values by flipping the sign bit. */
3243 if (SCALAR_FLOAT_MODE_P (mode))
3245 temp = expand_absneg_bit (NEG, mode, op0, target);
3250 /* If there is no negation pattern, and we have no negative zero,
3251 try subtracting from zero. */
3252 if (!HONOR_SIGNED_ZEROS (mode))
3254 temp = expand_binop (mode, (unoptab == negv_optab
3255 ? subv_optab : sub_optab),
3256 CONST0_RTX (mode), op0, target,
3257 unsignedp, OPTAB_DIRECT);
3263 /* Try calculating parity (x) as popcount (x) % 2. */
3264 if (unoptab == parity_optab)
3266 temp = expand_parity (mode, op0, target);
3271 /* Try implementing ffs (x) in terms of clz (x). */
3272 if (unoptab == ffs_optab)
3274 temp = expand_ffs (mode, op0, target);
3279 /* Try implementing ctz (x) in terms of clz (x). */
3280 if (unoptab == ctz_optab)
3282 temp = expand_ctz (mode, op0, target);
3288 /* Now try a library call in this mode. */
3289 libfunc = optab_libfunc (unoptab, mode);
3295 enum machine_mode outmode = mode;
3297 /* All of these functions return small values. Thus we choose to
3298 have them return something that isn't a double-word. */
3299 if (unoptab == ffs_optab || unoptab == clz_optab || unoptab == ctz_optab
3300 || unoptab == popcount_optab || unoptab == parity_optab)
3302 = GET_MODE (hard_libcall_value (TYPE_MODE (integer_type_node)));
3306 /* Pass 1 for NO_QUEUE so we don't lose any increments
3307 if the libcall is cse'd or moved. */
3308 value = emit_library_call_value (libfunc, NULL_RTX, LCT_CONST, outmode,
3310 insns = get_insns ();
3313 target = gen_reg_rtx (outmode);
3314 eq_value = gen_rtx_fmt_e (unoptab->code, mode, op0);
3315 if (GET_MODE_SIZE (outmode) < GET_MODE_SIZE (mode))
3316 eq_value = simplify_gen_unary (TRUNCATE, outmode, eq_value, mode);
3317 else if (GET_MODE_SIZE (outmode) > GET_MODE_SIZE (mode))
3318 eq_value = simplify_gen_unary (ZERO_EXTEND, outmode, eq_value, mode);
3319 emit_libcall_block (insns, target, value, eq_value);
3324 /* It can't be done in this mode. Can we do it in a wider mode? */
3326 if (CLASS_HAS_WIDER_MODES_P (mclass))
3328 for (wider_mode = GET_MODE_WIDER_MODE (mode);
3329 wider_mode != VOIDmode;
3330 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
3332 if ((optab_handler (unoptab, wider_mode)->insn_code
3333 != CODE_FOR_nothing)
3334 || optab_libfunc (unoptab, wider_mode))
3337 rtx last = get_last_insn ();
3339 /* For certain operations, we need not actually extend
3340 the narrow operand, as long as we will truncate the
3341 results to the same narrowness. */
3343 xop0 = widen_operand (xop0, wider_mode, mode, unsignedp,
3344 (unoptab == neg_optab
3345 || unoptab == one_cmpl_optab)
3346 && mclass == MODE_INT);
3348 temp = expand_unop (wider_mode, unoptab, xop0, NULL_RTX,
3351 /* If we are generating clz using wider mode, adjust the
3353 if (unoptab == clz_optab && temp != 0)
3354 temp = expand_binop (wider_mode, sub_optab, temp,
3355 GEN_INT (GET_MODE_BITSIZE (wider_mode)
3356 - GET_MODE_BITSIZE (mode)),
3357 target, true, OPTAB_DIRECT);
3361 if (mclass != MODE_INT)
3364 target = gen_reg_rtx (mode);
3365 convert_move (target, temp, 0);
3369 return gen_lowpart (mode, temp);
3372 delete_insns_since (last);
3377 /* One final attempt at implementing negation via subtraction,
3378 this time allowing widening of the operand. */
3379 if (unoptab->code == NEG && !HONOR_SIGNED_ZEROS (mode))
3382 temp = expand_binop (mode,
3383 unoptab == negv_optab ? subv_optab : sub_optab,
3384 CONST0_RTX (mode), op0,
3385 target, unsignedp, OPTAB_LIB_WIDEN);
3393 /* Emit code to compute the absolute value of OP0, with result to
3394 TARGET if convenient. (TARGET may be 0.) The return value says
3395 where the result actually is to be found.
3397 MODE is the mode of the operand; the mode of the result is
3398 different but can be deduced from MODE.
3403 expand_abs_nojump (enum machine_mode mode, rtx op0, rtx target,
3404 int result_unsignedp)
3409 result_unsignedp = 1;
3411 /* First try to do it with a special abs instruction. */
3412 temp = expand_unop (mode, result_unsignedp ? abs_optab : absv_optab,
3417 /* For floating point modes, try clearing the sign bit. */
3418 if (SCALAR_FLOAT_MODE_P (mode))
3420 temp = expand_absneg_bit (ABS, mode, op0, target);
3425 /* If we have a MAX insn, we can do this as MAX (x, -x). */
3426 if (optab_handler (smax_optab, mode)->insn_code != CODE_FOR_nothing
3427 && !HONOR_SIGNED_ZEROS (mode))
3429 rtx last = get_last_insn ();
3431 temp = expand_unop (mode, neg_optab, op0, NULL_RTX, 0);
3433 temp = expand_binop (mode, smax_optab, op0, temp, target, 0,
3439 delete_insns_since (last);
3442 /* If this machine has expensive jumps, we can do integer absolute
3443 value of X as (((signed) x >> (W-1)) ^ x) - ((signed) x >> (W-1)),
3444 where W is the width of MODE. */
3446 if (GET_MODE_CLASS (mode) == MODE_INT
3447 && BRANCH_COST (optimize_insn_for_speed_p (),
3450 rtx extended = expand_shift (RSHIFT_EXPR, mode, op0,
3451 size_int (GET_MODE_BITSIZE (mode) - 1),
3454 temp = expand_binop (mode, xor_optab, extended, op0, target, 0,
3457 temp = expand_binop (mode, result_unsignedp ? sub_optab : subv_optab,
3458 temp, extended, target, 0, OPTAB_LIB_WIDEN);
3468 expand_abs (enum machine_mode mode, rtx op0, rtx target,
3469 int result_unsignedp, int safe)
3474 result_unsignedp = 1;
3476 temp = expand_abs_nojump (mode, op0, target, result_unsignedp);
3480 /* If that does not win, use conditional jump and negate. */
3482 /* It is safe to use the target if it is the same
3483 as the source if this is also a pseudo register */
3484 if (op0 == target && REG_P (op0)
3485 && REGNO (op0) >= FIRST_PSEUDO_REGISTER)
3488 op1 = gen_label_rtx ();
3489 if (target == 0 || ! safe
3490 || GET_MODE (target) != mode
3491 || (MEM_P (target) && MEM_VOLATILE_P (target))
3493 && REGNO (target) < FIRST_PSEUDO_REGISTER))
3494 target = gen_reg_rtx (mode);
3496 emit_move_insn (target, op0);
3499 do_compare_rtx_and_jump (target, CONST0_RTX (mode), GE, 0, mode,
3500 NULL_RTX, NULL_RTX, op1);
3502 op0 = expand_unop (mode, result_unsignedp ? neg_optab : negv_optab,
3505 emit_move_insn (target, op0);
3511 /* A subroutine of expand_copysign, perform the copysign operation using the
3512 abs and neg primitives advertised to exist on the target. The assumption
3513 is that we have a split register file, and leaving op0 in fp registers,
3514 and not playing with subregs so much, will help the register allocator. */
3517 expand_copysign_absneg (enum machine_mode mode, rtx op0, rtx op1, rtx target,
3518 int bitpos, bool op0_is_abs)
3520 enum machine_mode imode;
3527 /* Check if the back end provides an insn that handles signbit for the
3529 icode = (int) signbit_optab->handlers [(int) mode].insn_code;
3530 if (icode != CODE_FOR_nothing)
3532 imode = insn_data[icode].operand[0].mode;
3533 sign = gen_reg_rtx (imode);
3534 emit_unop_insn (icode, sign, op1, UNKNOWN);
3538 HOST_WIDE_INT hi, lo;
3540 if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD)
3542 imode = int_mode_for_mode (mode);
3543 if (imode == BLKmode)
3545 op1 = gen_lowpart (imode, op1);
3552 if (FLOAT_WORDS_BIG_ENDIAN)
3553 word = (GET_MODE_BITSIZE (mode) - bitpos) / BITS_PER_WORD;
3555 word = bitpos / BITS_PER_WORD;
3556 bitpos = bitpos % BITS_PER_WORD;
3557 op1 = operand_subword_force (op1, word, mode);
3560 if (bitpos < HOST_BITS_PER_WIDE_INT)
3563 lo = (HOST_WIDE_INT) 1 << bitpos;
3567 hi = (HOST_WIDE_INT) 1 << (bitpos - HOST_BITS_PER_WIDE_INT);
3571 sign = gen_reg_rtx (imode);
3572 sign = expand_binop (imode, and_optab, op1,
3573 immed_double_const (lo, hi, imode),
3574 NULL_RTX, 1, OPTAB_LIB_WIDEN);
3579 op0 = expand_unop (mode, abs_optab, op0, target, 0);
3586 if (target == NULL_RTX)
3587 target = copy_to_reg (op0);
3589 emit_move_insn (target, op0);
3592 label = gen_label_rtx ();
3593 emit_cmp_and_jump_insns (sign, const0_rtx, EQ, NULL_RTX, imode, 1, label);
3595 if (GET_CODE (op0) == CONST_DOUBLE)
3596 op0 = simplify_unary_operation (NEG, mode, op0, mode);
3598 op0 = expand_unop (mode, neg_optab, op0, target, 0);
3600 emit_move_insn (target, op0);
3608 /* A subroutine of expand_copysign, perform the entire copysign operation
3609 with integer bitmasks. BITPOS is the position of the sign bit; OP0_IS_ABS
3610 is true if op0 is known to have its sign bit clear. */
3613 expand_copysign_bit (enum machine_mode mode, rtx op0, rtx op1, rtx target,
3614 int bitpos, bool op0_is_abs)
3616 enum machine_mode imode;
3617 HOST_WIDE_INT hi, lo;
3618 int word, nwords, i;
3621 if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD)
3623 imode = int_mode_for_mode (mode);
3624 if (imode == BLKmode)
3633 if (FLOAT_WORDS_BIG_ENDIAN)
3634 word = (GET_MODE_BITSIZE (mode) - bitpos) / BITS_PER_WORD;
3636 word = bitpos / BITS_PER_WORD;
3637 bitpos = bitpos % BITS_PER_WORD;
3638 nwords = (GET_MODE_BITSIZE (mode) + BITS_PER_WORD - 1) / BITS_PER_WORD;
3641 if (bitpos < HOST_BITS_PER_WIDE_INT)
3644 lo = (HOST_WIDE_INT) 1 << bitpos;
3648 hi = (HOST_WIDE_INT) 1 << (bitpos - HOST_BITS_PER_WIDE_INT);
3652 if (target == 0 || target == op0 || target == op1)
3653 target = gen_reg_rtx (mode);
3659 for (i = 0; i < nwords; ++i)
3661 rtx targ_piece = operand_subword (target, i, 1, mode);
3662 rtx op0_piece = operand_subword_force (op0, i, mode);
3667 op0_piece = expand_binop (imode, and_optab, op0_piece,
3668 immed_double_const (~lo, ~hi, imode),
3669 NULL_RTX, 1, OPTAB_LIB_WIDEN);
3671 op1 = expand_binop (imode, and_optab,
3672 operand_subword_force (op1, i, mode),
3673 immed_double_const (lo, hi, imode),
3674 NULL_RTX, 1, OPTAB_LIB_WIDEN);
3676 temp = expand_binop (imode, ior_optab, op0_piece, op1,
3677 targ_piece, 1, OPTAB_LIB_WIDEN);
3678 if (temp != targ_piece)
3679 emit_move_insn (targ_piece, temp);
3682 emit_move_insn (targ_piece, op0_piece);
3685 insns = get_insns ();
3692 op1 = expand_binop (imode, and_optab, gen_lowpart (imode, op1),
3693 immed_double_const (lo, hi, imode),
3694 NULL_RTX, 1, OPTAB_LIB_WIDEN);
3696 op0 = gen_lowpart (imode, op0);
3698 op0 = expand_binop (imode, and_optab, op0,
3699 immed_double_const (~lo, ~hi, imode),
3700 NULL_RTX, 1, OPTAB_LIB_WIDEN);
3702 temp = expand_binop (imode, ior_optab, op0, op1,
3703 gen_lowpart (imode, target), 1, OPTAB_LIB_WIDEN);
3704 target = lowpart_subreg_maybe_copy (mode, temp, imode);
3710 /* Expand the C99 copysign operation. OP0 and OP1 must be the same
3711 scalar floating point mode. Return NULL if we do not know how to
3712 expand the operation inline. */
3715 expand_copysign (rtx op0, rtx op1, rtx target)
3717 enum machine_mode mode = GET_MODE (op0);
3718 const struct real_format *fmt;
3722 gcc_assert (SCALAR_FLOAT_MODE_P (mode));
3723 gcc_assert (GET_MODE (op1) == mode);
3725 /* First try to do it with a special instruction. */
3726 temp = expand_binop (mode, copysign_optab, op0, op1,
3727 target, 0, OPTAB_DIRECT);
3731 fmt = REAL_MODE_FORMAT (mode);
3732 if (fmt == NULL || !fmt->has_signed_zero)
3736 if (GET_CODE (op0) == CONST_DOUBLE)
3738 if (real_isneg (CONST_DOUBLE_REAL_VALUE (op0)))
3739 op0 = simplify_unary_operation (ABS, mode, op0, mode);
3743 if (fmt->signbit_ro >= 0
3744 && (GET_CODE (op0) == CONST_DOUBLE
3745 || (optab_handler (neg_optab, mode)->insn_code != CODE_FOR_nothing
3746 && optab_handler (abs_optab, mode)->insn_code != CODE_FOR_nothing)))
3748 temp = expand_copysign_absneg (mode, op0, op1, target,
3749 fmt->signbit_ro, op0_is_abs);
3754 if (fmt->signbit_rw < 0)
3756 return expand_copysign_bit (mode, op0, op1, target,
3757 fmt->signbit_rw, op0_is_abs);
3760 /* Generate an instruction whose insn-code is INSN_CODE,
3761 with two operands: an output TARGET and an input OP0.
3762 TARGET *must* be nonzero, and the output is always stored there.
3763 CODE is an rtx code such that (CODE OP0) is an rtx that describes
3764 the value that is stored into TARGET.
3766 Return false if expansion failed. */
3769 maybe_emit_unop_insn (int icode, rtx target, rtx op0, enum rtx_code code)
3772 enum machine_mode mode0 = insn_data[icode].operand[1].mode;
3774 rtx last = get_last_insn ();
3778 /* Now, if insn does not accept our operands, put them into pseudos. */
3780 if (!insn_data[icode].operand[1].predicate (op0, mode0))
3781 op0 = copy_to_mode_reg (mode0, op0);
3783 if (!insn_data[icode].operand[0].predicate (temp, GET_MODE (temp)))
3784 temp = gen_reg_rtx (GET_MODE (temp));
3786 pat = GEN_FCN (icode) (temp, op0);
3789 delete_insns_since (last);
3793 if (INSN_P (pat) && NEXT_INSN (pat) != NULL_RTX && code != UNKNOWN)
3794 add_equal_note (pat, temp, code, op0, NULL_RTX);
3799 emit_move_insn (target, temp);
3802 /* Generate an instruction whose insn-code is INSN_CODE,
3803 with two operands: an output TARGET and an input OP0.
3804 TARGET *must* be nonzero, and the output is always stored there.
3805 CODE is an rtx code such that (CODE OP0) is an rtx that describes
3806 the value that is stored into TARGET. */
3809 emit_unop_insn (int icode, rtx target, rtx op0, enum rtx_code code)
3811 bool ok = maybe_emit_unop_insn (icode, target, op0, code);
3815 struct no_conflict_data
3817 rtx target, first, insn;
3821 /* Called via note_stores by emit_libcall_block. Set P->must_stay if
3822 the currently examined clobber / store has to stay in the list of
3823 insns that constitute the actual libcall block. */
3825 no_conflict_move_test (rtx dest, const_rtx set, void *p0)
3827 struct no_conflict_data *p= (struct no_conflict_data *) p0;
3829 /* If this inns directly contributes to setting the target, it must stay. */
3830 if (reg_overlap_mentioned_p (p->target, dest))
3831 p->must_stay = true;
3832 /* If we haven't committed to keeping any other insns in the list yet,
3833 there is nothing more to check. */
3834 else if (p->insn == p->first)
3836 /* If this insn sets / clobbers a register that feeds one of the insns
3837 already in the list, this insn has to stay too. */
3838 else if (reg_overlap_mentioned_p (dest, PATTERN (p->first))
3839 || (CALL_P (p->first) && (find_reg_fusage (p->first, USE, dest)))
3840 || reg_used_between_p (dest, p->first, p->insn)
3841 /* Likewise if this insn depends on a register set by a previous
3842 insn in the list, or if it sets a result (presumably a hard
3843 register) that is set or clobbered by a previous insn.
3844 N.B. the modified_*_p (SET_DEST...) tests applied to a MEM
3845 SET_DEST perform the former check on the address, and the latter
3846 check on the MEM. */
3847 || (GET_CODE (set) == SET
3848 && (modified_in_p (SET_SRC (set), p->first)
3849 || modified_in_p (SET_DEST (set), p->first)
3850 || modified_between_p (SET_SRC (set), p->first, p->insn)
3851 || modified_between_p (SET_DEST (set), p->first, p->insn))))
3852 p->must_stay = true;
3856 /* Emit code to make a call to a constant function or a library call.
3858 INSNS is a list containing all insns emitted in the call.
3859 These insns leave the result in RESULT. Our block is to copy RESULT
3860 to TARGET, which is logically equivalent to EQUIV.
3862 We first emit any insns that set a pseudo on the assumption that these are
3863 loading constants into registers; doing so allows them to be safely cse'ed
3864 between blocks. Then we emit all the other insns in the block, followed by
3865 an insn to move RESULT to TARGET. This last insn will have a REQ_EQUAL
3866 note with an operand of EQUIV. */
3869 emit_libcall_block (rtx insns, rtx target, rtx result, rtx equiv)
3871 rtx final_dest = target;
3872 rtx prev, next, last, insn;
3874 /* If this is a reg with REG_USERVAR_P set, then it could possibly turn
3875 into a MEM later. Protect the libcall block from this change. */
3876 if (! REG_P (target) || REG_USERVAR_P (target))
3877 target = gen_reg_rtx (GET_MODE (target));
3879 /* If we're using non-call exceptions, a libcall corresponding to an
3880 operation that may trap may also trap. */
3881 if (flag_non_call_exceptions && may_trap_p (equiv))
3883 for (insn = insns; insn; insn = NEXT_INSN (insn))
3886 rtx note = find_reg_note (insn, REG_EH_REGION, NULL_RTX);
3888 if (note != 0 && INTVAL (XEXP (note, 0)) <= 0)
3889 remove_note (insn, note);
3893 /* look for any CALL_INSNs in this sequence, and attach a REG_EH_REGION
3894 reg note to indicate that this call cannot throw or execute a nonlocal
3895 goto (unless there is already a REG_EH_REGION note, in which case
3897 for (insn = insns; insn; insn = NEXT_INSN (insn))
3900 rtx note = find_reg_note (insn, REG_EH_REGION, NULL_RTX);
3903 XEXP (note, 0) = constm1_rtx;
3905 add_reg_note (insn, REG_EH_REGION, constm1_rtx);
3908 /* First emit all insns that set pseudos. Remove them from the list as
3909 we go. Avoid insns that set pseudos which were referenced in previous
3910 insns. These can be generated by move_by_pieces, for example,
3911 to update an address. Similarly, avoid insns that reference things
3912 set in previous insns. */
3914 for (insn = insns; insn; insn = next)
3916 rtx set = single_set (insn);
3918 next = NEXT_INSN (insn);
3920 if (set != 0 && REG_P (SET_DEST (set))
3921 && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER)
3923 struct no_conflict_data data;
3925 data.target = const0_rtx;
3929 note_stores (PATTERN (insn), no_conflict_move_test, &data);
3930 if (! data.must_stay)
3932 if (PREV_INSN (insn))
3933 NEXT_INSN (PREV_INSN (insn)) = next;
3938 PREV_INSN (next) = PREV_INSN (insn);
3944 /* Some ports use a loop to copy large arguments onto the stack.
3945 Don't move anything outside such a loop. */
3950 prev = get_last_insn ();
3952 /* Write the remaining insns followed by the final copy. */
3954 for (insn = insns; insn; insn = next)
3956 next = NEXT_INSN (insn);
3961 last = emit_move_insn (target, result);
3962 if (optab_handler (mov_optab, GET_MODE (target))->insn_code
3963 != CODE_FOR_nothing)
3964 set_unique_reg_note (last, REG_EQUAL, copy_rtx (equiv));
3966 if (final_dest != target)
3967 emit_move_insn (final_dest, target);
3970 /* Nonzero if we can perform a comparison of mode MODE straightforwardly.
3971 PURPOSE describes how this comparison will be used. CODE is the rtx
3972 comparison code we will be using.
3974 ??? Actually, CODE is slightly weaker than that. A target is still
3975 required to implement all of the normal bcc operations, but not
3976 required to implement all (or any) of the unordered bcc operations. */
3979 can_compare_p (enum rtx_code code, enum machine_mode mode,
3980 enum can_compare_purpose purpose)
3983 test = gen_rtx_fmt_ee (code, mode, const0_rtx, const0_rtx);
3988 if (optab_handler (cmp_optab, mode)->insn_code != CODE_FOR_nothing)
3990 if (purpose == ccp_jump)
3991 return bcc_gen_fctn[(int) code] != NULL;
3992 else if (purpose == ccp_store_flag)
3993 return setcc_gen_code[(int) code] != CODE_FOR_nothing;
3995 /* There's only one cmov entry point, and it's allowed to fail. */
3998 if (purpose == ccp_jump
3999 && (icode = optab_handler (cbranch_optab, mode)->insn_code) != CODE_FOR_nothing
4000 && insn_data[icode].operand[0].predicate (test, mode))
4002 if (purpose == ccp_store_flag
4003 && (icode = optab_handler (cstore_optab, mode)->insn_code) != CODE_FOR_nothing
4004 && insn_data[icode].operand[1].predicate (test, mode))
4006 if (purpose == ccp_cmov
4007 && optab_handler (cmov_optab, mode)->insn_code != CODE_FOR_nothing)
4010 mode = GET_MODE_WIDER_MODE (mode);
4011 PUT_MODE (test, mode);
4013 while (mode != VOIDmode);
4018 /* This function is called when we are going to emit a compare instruction that
4019 compares the values found in *PX and *PY, using the rtl operator COMPARISON.
4021 *PMODE is the mode of the inputs (in case they are const_int).
4022 *PUNSIGNEDP nonzero says that the operands are unsigned;
4023 this matters if they need to be widened.
4025 If they have mode BLKmode, then SIZE specifies the size of both operands.
4027 This function performs all the setup necessary so that the caller only has
4028 to emit a single comparison insn. This setup can involve doing a BLKmode
4029 comparison or emitting a library call to perform the comparison if no insn
4030 is available to handle it.
4031 The values which are passed in through pointers can be modified; the caller
4032 should perform the comparison on the modified values. Constant
4033 comparisons must have already been folded. */
4036 prepare_cmp_insn (rtx *px, rtx *py, enum rtx_code *pcomparison, rtx size,
4037 enum machine_mode *pmode, int *punsignedp,
4038 enum can_compare_purpose purpose)
4040 enum machine_mode mode = *pmode;
4041 rtx x = *px, y = *py;
4042 int unsignedp = *punsignedp;
4046 /* Make sure if we have a canonical comparison. The RTL
4047 documentation states that canonical comparisons are required only
4048 for targets which have cc0. */
4049 gcc_assert (!CONSTANT_P (x) || CONSTANT_P (y));
4052 /* Don't let both operands fail to indicate the mode. */
4053 if (GET_MODE (x) == VOIDmode && GET_MODE (y) == VOIDmode)
4054 x = force_reg (mode, x);
4056 /* Handle all BLKmode compares. */
4058 if (mode == BLKmode)
4060 enum machine_mode cmp_mode, result_mode;
4061 enum insn_code cmp_code;
4066 = GEN_INT (MIN (MEM_ALIGN (x), MEM_ALIGN (y)) / BITS_PER_UNIT);
4070 /* Try to use a memory block compare insn - either cmpstr
4071 or cmpmem will do. */
4072 for (cmp_mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
4073 cmp_mode != VOIDmode;
4074 cmp_mode = GET_MODE_WIDER_MODE (cmp_mode))
4076 cmp_code = cmpmem_optab[cmp_mode];
4077 if (cmp_code == CODE_FOR_nothing)
4078 cmp_code = cmpstr_optab[cmp_mode];
4079 if (cmp_code == CODE_FOR_nothing)
4080 cmp_code = cmpstrn_optab[cmp_mode];
4081 if (cmp_code == CODE_FOR_nothing)
4084 /* Must make sure the size fits the insn's mode. */
4085 if ((GET_CODE (size) == CONST_INT
4086 && INTVAL (size) >= (1 << GET_MODE_BITSIZE (cmp_mode)))
4087 || (GET_MODE_BITSIZE (GET_MODE (size))
4088 > GET_MODE_BITSIZE (cmp_mode)))
4091 result_mode = insn_data[cmp_code].operand[0].mode;
4092 result = gen_reg_rtx (result_mode);
4093 size = convert_to_mode (cmp_mode, size, 1);
4094 emit_insn (GEN_FCN (cmp_code) (result, x, y, size, opalign));
4098 *pmode = result_mode;
4102 /* Otherwise call a library function, memcmp. */
4103 libfunc = memcmp_libfunc;
4104 length_type = sizetype;
4105 result_mode = TYPE_MODE (integer_type_node);
4106 cmp_mode = TYPE_MODE (length_type);
4107 size = convert_to_mode (TYPE_MODE (length_type), size,
4108 TYPE_UNSIGNED (length_type));
4110 result = emit_library_call_value (libfunc, 0, LCT_PURE,
4117 *pmode = result_mode;
4121 /* Don't allow operands to the compare to trap, as that can put the
4122 compare and branch in different basic blocks. */
4123 if (flag_non_call_exceptions)
4126 x = force_reg (mode, x);
4128 y = force_reg (mode, y);
4133 if (GET_MODE_CLASS (mode) == MODE_CC)
4135 gcc_assert (can_compare_p (*pcomparison, CCmode, purpose));
4138 else if (can_compare_p (*pcomparison, mode, purpose))
4141 /* Handle a lib call just for the mode we are using. */
4142 libfunc = optab_libfunc (cmp_optab, mode);
4143 if (libfunc && !SCALAR_FLOAT_MODE_P (mode))
4147 /* If we want unsigned, and this mode has a distinct unsigned
4148 comparison routine, use that. */
4151 rtx ulibfunc = optab_libfunc (ucmp_optab, mode);
4156 result = emit_library_call_value (libfunc, NULL_RTX, LCT_CONST,
4157 targetm.libgcc_cmp_return_mode (),
4158 2, x, mode, y, mode);
4160 /* There are two kinds of comparison routines. Biased routines
4161 return 0/1/2, and unbiased routines return -1/0/1. Other parts
4162 of gcc expect that the comparison operation is equivalent
4163 to the modified comparison. For signed comparisons compare the
4164 result against 1 in the biased case, and zero in the unbiased
4165 case. For unsigned comparisons always compare against 1 after
4166 biasing the unbiased result by adding 1. This gives us a way to
4172 if (!TARGET_LIB_INT_CMP_BIASED)
4175 *px = plus_constant (result, 1);
4182 gcc_assert (SCALAR_FLOAT_MODE_P (mode));
4183 prepare_float_lib_cmp (px, py, pcomparison, pmode, punsignedp);
4186 /* Before emitting an insn with code ICODE, make sure that X, which is going
4187 to be used for operand OPNUM of the insn, is converted from mode MODE to
4188 WIDER_MODE (UNSIGNEDP determines whether it is an unsigned conversion), and
4189 that it is accepted by the operand predicate. Return the new value. */
4192 prepare_operand (int icode, rtx x, int opnum, enum machine_mode mode,
4193 enum machine_mode wider_mode, int unsignedp)
4195 if (mode != wider_mode)
4196 x = convert_modes (wider_mode, mode, x, unsignedp);
4198 if (!insn_data[icode].operand[opnum].predicate
4199 (x, insn_data[icode].operand[opnum].mode))
4201 if (reload_completed)
4203 x = copy_to_mode_reg (insn_data[icode].operand[opnum].mode, x);
4209 /* Subroutine of emit_cmp_and_jump_insns; this function is called when we know
4210 we can do the comparison.
4211 The arguments are the same as for emit_cmp_and_jump_insns; but LABEL may
4212 be NULL_RTX which indicates that only a comparison is to be generated. */
4215 emit_cmp_and_jump_insn_1 (rtx x, rtx y, enum machine_mode mode,
4216 enum rtx_code comparison, int unsignedp, rtx label)
4218 rtx test = gen_rtx_fmt_ee (comparison, mode, x, y);
4219 enum mode_class mclass = GET_MODE_CLASS (mode);
4220 enum machine_mode wider_mode = mode;
4222 /* Try combined insns first. */
4225 enum machine_mode optab_mode = mclass == MODE_CC ? CCmode : wider_mode;
4226 enum insn_code icode;
4227 PUT_MODE (test, wider_mode);
4231 icode = optab_handler (cbranch_optab, optab_mode)->insn_code;
4233 if (icode != CODE_FOR_nothing
4234 && insn_data[icode].operand[0].predicate (test, wider_mode))
4236 x = prepare_operand (icode, x, 1, mode, wider_mode, unsignedp);
4237 y = prepare_operand (icode, y, 2, mode, wider_mode, unsignedp);
4238 emit_jump_insn (GEN_FCN (icode) (test, x, y, label));
4243 /* Handle some compares against zero. */
4244 icode = optab_handler (tst_optab, optab_mode)->insn_code;
4245 if (y == CONST0_RTX (mode) && icode != CODE_FOR_nothing)
4247 x = prepare_operand (icode, x, 0, mode, wider_mode, unsignedp);
4248 emit_insn (GEN_FCN (icode) (x));
4250 emit_jump_insn (bcc_gen_fctn[(int) comparison] (label));
4254 /* Handle compares for which there is a directly suitable insn. */
4256 icode = optab_handler (cmp_optab, optab_mode)->insn_code;
4257 if (icode != CODE_FOR_nothing)
4259 x = prepare_operand (icode, x, 0, mode, wider_mode, unsignedp);
4260 y = prepare_operand (icode, y, 1, mode, wider_mode, unsignedp);
4261 emit_insn (GEN_FCN (icode) (x, y));
4263 emit_jump_insn (bcc_gen_fctn[(int) comparison] (label));
4267 if (!CLASS_HAS_WIDER_MODES_P (mclass))
4270 wider_mode = GET_MODE_WIDER_MODE (wider_mode);
4272 while (wider_mode != VOIDmode);
4277 /* Generate code to compare X with Y so that the condition codes are
4278 set and to jump to LABEL if the condition is true. If X is a
4279 constant and Y is not a constant, then the comparison is swapped to
4280 ensure that the comparison RTL has the canonical form.
4282 UNSIGNEDP nonzero says that X and Y are unsigned; this matters if they
4283 need to be widened by emit_cmp_insn. UNSIGNEDP is also used to select
4284 the proper branch condition code.
4286 If X and Y have mode BLKmode, then SIZE specifies the size of both X and Y.
4288 MODE is the mode of the inputs (in case they are const_int).
4290 COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.). It will
4291 be passed unchanged to emit_cmp_insn, then potentially converted into an
4292 unsigned variant based on UNSIGNEDP to select a proper jump instruction. */
4295 emit_cmp_and_jump_insns (rtx x, rtx y, enum rtx_code comparison, rtx size,
4296 enum machine_mode mode, int unsignedp, rtx label)
4298 rtx op0 = x, op1 = y;
4300 /* Swap operands and condition to ensure canonical RTL. */
4301 if (swap_commutative_operands_p (x, y))
4303 /* If we're not emitting a branch, callers are required to pass
4304 operands in an order conforming to canonical RTL. We relax this
4305 for commutative comparisons so callers using EQ don't need to do
4306 swapping by hand. */
4307 gcc_assert (label || (comparison == swap_condition (comparison)));
4310 comparison = swap_condition (comparison);
4314 /* If OP0 is still a constant, then both X and Y must be constants.
4315 Force X into a register to create canonical RTL. */
4316 if (CONSTANT_P (op0))
4317 op0 = force_reg (mode, op0);
4321 comparison = unsigned_condition (comparison);
4323 prepare_cmp_insn (&op0, &op1, &comparison, size, &mode, &unsignedp,
4325 emit_cmp_and_jump_insn_1 (op0, op1, mode, comparison, unsignedp, label);
4328 /* Like emit_cmp_and_jump_insns, but generate only the comparison. */
4331 emit_cmp_insn (rtx x, rtx y, enum rtx_code comparison, rtx size,
4332 enum machine_mode mode, int unsignedp)
4334 emit_cmp_and_jump_insns (x, y, comparison, size, mode, unsignedp, 0);
4337 /* Emit a library call comparison between floating point X and Y.
4338 COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.). */
4341 prepare_float_lib_cmp (rtx *px, rtx *py, enum rtx_code *pcomparison,
4342 enum machine_mode *pmode, int *punsignedp)
4344 enum rtx_code comparison = *pcomparison;
4345 enum rtx_code swapped = swap_condition (comparison);
4346 enum rtx_code reversed = reverse_condition_maybe_unordered (comparison);
4349 enum machine_mode orig_mode = GET_MODE (x);
4350 enum machine_mode mode, cmp_mode;
4351 rtx value, target, insns, equiv;
4353 bool reversed_p = false;
4354 cmp_mode = targetm.libgcc_cmp_return_mode ();
4356 for (mode = orig_mode;
4358 mode = GET_MODE_WIDER_MODE (mode))
4360 if ((libfunc = optab_libfunc (code_to_optab[comparison], mode)))
4363 if ((libfunc = optab_libfunc (code_to_optab[swapped] , mode)))
4366 tmp = x; x = y; y = tmp;
4367 comparison = swapped;
4371 if ((libfunc = optab_libfunc (code_to_optab[reversed], mode))
4372 && FLOAT_LIB_COMPARE_RETURNS_BOOL (mode, reversed))
4374 comparison = reversed;
4380 gcc_assert (mode != VOIDmode);
4382 if (mode != orig_mode)
4384 x = convert_to_mode (mode, x, 0);
4385 y = convert_to_mode (mode, y, 0);
4388 /* Attach a REG_EQUAL note describing the semantics of the libcall to
4389 the RTL. The allows the RTL optimizers to delete the libcall if the
4390 condition can be determined at compile-time. */
4391 if (comparison == UNORDERED)
4393 rtx temp = simplify_gen_relational (NE, cmp_mode, mode, x, x);
4394 equiv = simplify_gen_relational (NE, cmp_mode, mode, y, y);
4395 equiv = simplify_gen_ternary (IF_THEN_ELSE, cmp_mode, cmp_mode,
4396 temp, const_true_rtx, equiv);
4400 equiv = simplify_gen_relational (comparison, cmp_mode, mode, x, y);
4401 if (! FLOAT_LIB_COMPARE_RETURNS_BOOL (mode, comparison))
4403 rtx true_rtx, false_rtx;
4408 true_rtx = const0_rtx;
4409 false_rtx = const_true_rtx;
4413 true_rtx = const_true_rtx;
4414 false_rtx = const0_rtx;
4418 true_rtx = const1_rtx;
4419 false_rtx = const0_rtx;
4423 true_rtx = const0_rtx;
4424 false_rtx = constm1_rtx;
4428 true_rtx = constm1_rtx;
4429 false_rtx = const0_rtx;
4433 true_rtx = const0_rtx;
4434 false_rtx = const1_rtx;
4440 equiv = simplify_gen_ternary (IF_THEN_ELSE, cmp_mode, cmp_mode,
4441 equiv, true_rtx, false_rtx);
4446 value = emit_library_call_value (libfunc, NULL_RTX, LCT_CONST,
4447 cmp_mode, 2, x, mode, y, mode);
4448 insns = get_insns ();
4451 target = gen_reg_rtx (cmp_mode);
4452 emit_libcall_block (insns, target, value, equiv);
4454 if (comparison == UNORDERED
4455 || FLOAT_LIB_COMPARE_RETURNS_BOOL (mode, comparison))
4456 comparison = reversed_p ? EQ : NE;
4461 *pcomparison = comparison;
4465 /* Generate code to indirectly jump to a location given in the rtx LOC. */
4468 emit_indirect_jump (rtx loc)
4470 if (!insn_data[(int) CODE_FOR_indirect_jump].operand[0].predicate
4472 loc = copy_to_mode_reg (Pmode, loc);
4474 emit_jump_insn (gen_indirect_jump (loc));
4478 #ifdef HAVE_conditional_move
4480 /* Emit a conditional move instruction if the machine supports one for that
4481 condition and machine mode.
4483 OP0 and OP1 are the operands that should be compared using CODE. CMODE is
4484 the mode to use should they be constants. If it is VOIDmode, they cannot
4487 OP2 should be stored in TARGET if the comparison is true, otherwise OP3
4488 should be stored there. MODE is the mode to use should they be constants.
4489 If it is VOIDmode, they cannot both be constants.
4491 The result is either TARGET (perhaps modified) or NULL_RTX if the operation
4492 is not supported. */
4495 emit_conditional_move (rtx target, enum rtx_code code, rtx op0, rtx op1,
4496 enum machine_mode cmode, rtx op2, rtx op3,
4497 enum machine_mode mode, int unsignedp)
4499 rtx tem, subtarget, comparison, insn;
4500 enum insn_code icode;
4501 enum rtx_code reversed;
4503 /* If one operand is constant, make it the second one. Only do this
4504 if the other operand is not constant as well. */
4506 if (swap_commutative_operands_p (op0, op1))
4511 code = swap_condition (code);
4514 /* get_condition will prefer to generate LT and GT even if the old
4515 comparison was against zero, so undo that canonicalization here since
4516 comparisons against zero are cheaper. */
4517 if (code == LT && op1 == const1_rtx)
4518 code = LE, op1 = const0_rtx;
4519 else if (code == GT && op1 == constm1_rtx)
4520 code = GE, op1 = const0_rtx;
4522 if (cmode == VOIDmode)
4523 cmode = GET_MODE (op0);
4525 if (swap_commutative_operands_p (op2, op3)
4526 && ((reversed = reversed_comparison_code_parts (code, op0, op1, NULL))
4535 if (mode == VOIDmode)
4536 mode = GET_MODE (op2);
4538 icode = movcc_gen_code[mode];
4540 if (icode == CODE_FOR_nothing)
4544 target = gen_reg_rtx (mode);
4548 /* If the insn doesn't accept these operands, put them in pseudos. */
4550 if (!insn_data[icode].operand[0].predicate
4551 (subtarget, insn_data[icode].operand[0].mode))
4552 subtarget = gen_reg_rtx (insn_data[icode].operand[0].mode);
4554 if (!insn_data[icode].operand[2].predicate
4555 (op2, insn_data[icode].operand[2].mode))
4556 op2 = copy_to_mode_reg (insn_data[icode].operand[2].mode, op2);
4558 if (!insn_data[icode].operand[3].predicate
4559 (op3, insn_data[icode].operand[3].mode))
4560 op3 = copy_to_mode_reg (insn_data[icode].operand[3].mode, op3);
4562 /* Everything should now be in the suitable form, so emit the compare insn
4563 and then the conditional move. */
4566 = compare_from_rtx (op0, op1, code, unsignedp, cmode, NULL_RTX);
4568 /* ??? Watch for const0_rtx (nop) and const_true_rtx (unconditional)? */
4569 /* We can get const0_rtx or const_true_rtx in some circumstances. Just
4570 return NULL and let the caller figure out how best to deal with this
4572 if (GET_CODE (comparison) != code)
4575 insn = GEN_FCN (icode) (subtarget, comparison, op2, op3);
4577 /* If that failed, then give up. */
4583 if (subtarget != target)
4584 convert_move (target, subtarget, 0);
4589 /* Return nonzero if a conditional move of mode MODE is supported.
4591 This function is for combine so it can tell whether an insn that looks
4592 like a conditional move is actually supported by the hardware. If we
4593 guess wrong we lose a bit on optimization, but that's it. */
4594 /* ??? sparc64 supports conditionally moving integers values based on fp
4595 comparisons, and vice versa. How do we handle them? */
4598 can_conditionally_move_p (enum machine_mode mode)
4600 if (movcc_gen_code[mode] != CODE_FOR_nothing)
4606 #endif /* HAVE_conditional_move */
4608 /* Emit a conditional addition instruction if the machine supports one for that
4609 condition and machine mode.
4611 OP0 and OP1 are the operands that should be compared using CODE. CMODE is
4612 the mode to use should they be constants. If it is VOIDmode, they cannot
4615 OP2 should be stored in TARGET if the comparison is true, otherwise OP2+OP3
4616 should be stored there. MODE is the mode to use should they be constants.
4617 If it is VOIDmode, they cannot both be constants.
4619 The result is either TARGET (perhaps modified) or NULL_RTX if the operation
4620 is not supported. */
4623 emit_conditional_add (rtx target, enum rtx_code code, rtx op0, rtx op1,
4624 enum machine_mode cmode, rtx op2, rtx op3,
4625 enum machine_mode mode, int unsignedp)
4627 rtx tem, subtarget, comparison, insn;
4628 enum insn_code icode;
4629 enum rtx_code reversed;
4631 /* If one operand is constant, make it the second one. Only do this
4632 if the other operand is not constant as well. */
4634 if (swap_commutative_operands_p (op0, op1))
4639 code = swap_condition (code);
4642 /* get_condition will prefer to generate LT and GT even if the old
4643 comparison was against zero, so undo that canonicalization here since
4644 comparisons against zero are cheaper. */
4645 if (code == LT && op1 == const1_rtx)
4646 code = LE, op1 = const0_rtx;
4647 else if (code == GT && op1 == constm1_rtx)
4648 code = GE, op1 = const0_rtx;
4650 if (cmode == VOIDmode)
4651 cmode = GET_MODE (op0);
4653 if (swap_commutative_operands_p (op2, op3)
4654 && ((reversed = reversed_comparison_code_parts (code, op0, op1, NULL))
4663 if (mode == VOIDmode)
4664 mode = GET_MODE (op2);
4666 icode = optab_handler (addcc_optab, mode)->insn_code;
4668 if (icode == CODE_FOR_nothing)
4672 target = gen_reg_rtx (mode);
4674 /* If the insn doesn't accept these operands, put them in pseudos. */
4676 if (!insn_data[icode].operand[0].predicate
4677 (target, insn_data[icode].operand[0].mode))
4678 subtarget = gen_reg_rtx (insn_data[icode].operand[0].mode);
4682 if (!insn_data[icode].operand[2].predicate
4683 (op2, insn_data[icode].operand[2].mode))
4684 op2 = copy_to_mode_reg (insn_data[icode].operand[2].mode, op2);
4686 if (!insn_data[icode].operand[3].predicate
4687 (op3, insn_data[icode].operand[3].mode))
4688 op3 = copy_to_mode_reg (insn_data[icode].operand[3].mode, op3);
4690 /* Everything should now be in the suitable form, so emit the compare insn
4691 and then the conditional move. */
4694 = compare_from_rtx (op0, op1, code, unsignedp, cmode, NULL_RTX);
4696 /* ??? Watch for const0_rtx (nop) and const_true_rtx (unconditional)? */
4697 /* We can get const0_rtx or const_true_rtx in some circumstances. Just
4698 return NULL and let the caller figure out how best to deal with this
4700 if (GET_CODE (comparison) != code)
4703 insn = GEN_FCN (icode) (subtarget, comparison, op2, op3);
4705 /* If that failed, then give up. */
4711 if (subtarget != target)
4712 convert_move (target, subtarget, 0);
4717 /* These functions attempt to generate an insn body, rather than
4718 emitting the insn, but if the gen function already emits them, we
4719 make no attempt to turn them back into naked patterns. */
4721 /* Generate and return an insn body to add Y to X. */
4724 gen_add2_insn (rtx x, rtx y)
4726 int icode = (int) optab_handler (add_optab, GET_MODE (x))->insn_code;
4728 gcc_assert (insn_data[icode].operand[0].predicate
4729 (x, insn_data[icode].operand[0].mode));
4730 gcc_assert (insn_data[icode].operand[1].predicate
4731 (x, insn_data[icode].operand[1].mode));
4732 gcc_assert (insn_data[icode].operand[2].predicate
4733 (y, insn_data[icode].operand[2].mode));
4735 return GEN_FCN (icode) (x, x, y);
4738 /* Generate and return an insn body to add r1 and c,
4739 storing the result in r0. */
4742 gen_add3_insn (rtx r0, rtx r1, rtx c)
4744 int icode = (int) optab_handler (add_optab, GET_MODE (r0))->insn_code;
4746 if (icode == CODE_FOR_nothing
4747 || !(insn_data[icode].operand[0].predicate
4748 (r0, insn_data[icode].operand[0].mode))
4749 || !(insn_data[icode].operand[1].predicate
4750 (r1, insn_data[icode].operand[1].mode))
4751 || !(insn_data[icode].operand[2].predicate
4752 (c, insn_data[icode].operand[2].mode)))
4755 return GEN_FCN (icode) (r0, r1, c);
4759 have_add2_insn (rtx x, rtx y)
4763 gcc_assert (GET_MODE (x) != VOIDmode);
4765 icode = (int) optab_handler (add_optab, GET_MODE (x))->insn_code;
4767 if (icode == CODE_FOR_nothing)
4770 if (!(insn_data[icode].operand[0].predicate
4771 (x, insn_data[icode].operand[0].mode))
4772 || !(insn_data[icode].operand[1].predicate
4773 (x, insn_data[icode].operand[1].mode))
4774 || !(insn_data[icode].operand[2].predicate
4775 (y, insn_data[icode].operand[2].mode)))
4781 /* Generate and return an insn body to subtract Y from X. */
4784 gen_sub2_insn (rtx x, rtx y)
4786 int icode = (int) optab_handler (sub_optab, GET_MODE (x))->insn_code;
4788 gcc_assert (insn_data[icode].operand[0].predicate
4789 (x, insn_data[icode].operand[0].mode));
4790 gcc_assert (insn_data[icode].operand[1].predicate
4791 (x, insn_data[icode].operand[1].mode));
4792 gcc_assert (insn_data[icode].operand[2].predicate
4793 (y, insn_data[icode].operand[2].mode));
4795 return GEN_FCN (icode) (x, x, y);
4798 /* Generate and return an insn body to subtract r1 and c,
4799 storing the result in r0. */
4802 gen_sub3_insn (rtx r0, rtx r1, rtx c)
4804 int icode = (int) optab_handler (sub_optab, GET_MODE (r0))->insn_code;
4806 if (icode == CODE_FOR_nothing
4807 || !(insn_data[icode].operand[0].predicate
4808 (r0, insn_data[icode].operand[0].mode))
4809 || !(insn_data[icode].operand[1].predicate
4810 (r1, insn_data[icode].operand[1].mode))
4811 || !(insn_data[icode].operand[2].predicate
4812 (c, insn_data[icode].operand[2].mode)))
4815 return GEN_FCN (icode) (r0, r1, c);
4819 have_sub2_insn (rtx x, rtx y)
4823 gcc_assert (GET_MODE (x) != VOIDmode);
4825 icode = (int) optab_handler (sub_optab, GET_MODE (x))->insn_code;
4827 if (icode == CODE_FOR_nothing)
4830 if (!(insn_data[icode].operand[0].predicate
4831 (x, insn_data[icode].operand[0].mode))
4832 || !(insn_data[icode].operand[1].predicate
4833 (x, insn_data[icode].operand[1].mode))
4834 || !(insn_data[icode].operand[2].predicate
4835 (y, insn_data[icode].operand[2].mode)))
4841 /* Generate the body of an instruction to copy Y into X.
4842 It may be a list of insns, if one insn isn't enough. */
4845 gen_move_insn (rtx x, rtx y)
4850 emit_move_insn_1 (x, y);
4856 /* Return the insn code used to extend FROM_MODE to TO_MODE.
4857 UNSIGNEDP specifies zero-extension instead of sign-extension. If
4858 no such operation exists, CODE_FOR_nothing will be returned. */
4861 can_extend_p (enum machine_mode to_mode, enum machine_mode from_mode,
4865 #ifdef HAVE_ptr_extend
4867 return CODE_FOR_ptr_extend;
4870 tab = unsignedp ? zext_optab : sext_optab;
4871 return convert_optab_handler (tab, to_mode, from_mode)->insn_code;
4874 /* Generate the body of an insn to extend Y (with mode MFROM)
4875 into X (with mode MTO). Do zero-extension if UNSIGNEDP is nonzero. */
4878 gen_extend_insn (rtx x, rtx y, enum machine_mode mto,
4879 enum machine_mode mfrom, int unsignedp)
4881 enum insn_code icode = can_extend_p (mto, mfrom, unsignedp);
4882 return GEN_FCN (icode) (x, y);
4885 /* can_fix_p and can_float_p say whether the target machine
4886 can directly convert a given fixed point type to
4887 a given floating point type, or vice versa.
4888 The returned value is the CODE_FOR_... value to use,
4889 or CODE_FOR_nothing if these modes cannot be directly converted.
4891 *TRUNCP_PTR is set to 1 if it is necessary to output
4892 an explicit FTRUNC insn before the fix insn; otherwise 0. */
4894 static enum insn_code
4895 can_fix_p (enum machine_mode fixmode, enum machine_mode fltmode,
4896 int unsignedp, int *truncp_ptr)
4899 enum insn_code icode;
4901 tab = unsignedp ? ufixtrunc_optab : sfixtrunc_optab;
4902 icode = convert_optab_handler (tab, fixmode, fltmode)->insn_code;
4903 if (icode != CODE_FOR_nothing)
4909 /* FIXME: This requires a port to define both FIX and FTRUNC pattern
4910 for this to work. We need to rework the fix* and ftrunc* patterns
4911 and documentation. */
4912 tab = unsignedp ? ufix_optab : sfix_optab;
4913 icode = convert_optab_handler (tab, fixmode, fltmode)->insn_code;
4914 if (icode != CODE_FOR_nothing
4915 && optab_handler (ftrunc_optab, fltmode)->insn_code != CODE_FOR_nothing)
4922 return CODE_FOR_nothing;
4925 static enum insn_code
4926 can_float_p (enum machine_mode fltmode, enum machine_mode fixmode,
4931 tab = unsignedp ? ufloat_optab : sfloat_optab;
4932 return convert_optab_handler (tab, fltmode, fixmode)->insn_code;
4935 /* Generate code to convert FROM to floating point
4936 and store in TO. FROM must be fixed point and not VOIDmode.
4937 UNSIGNEDP nonzero means regard FROM as unsigned.
4938 Normally this is done by correcting the final value
4939 if it is negative. */
4942 expand_float (rtx to, rtx from, int unsignedp)
4944 enum insn_code icode;
4946 enum machine_mode fmode, imode;
4947 bool can_do_signed = false;
4949 /* Crash now, because we won't be able to decide which mode to use. */
4950 gcc_assert (GET_MODE (from) != VOIDmode);
4952 /* Look for an insn to do the conversion. Do it in the specified
4953 modes if possible; otherwise convert either input, output or both to
4954 wider mode. If the integer mode is wider than the mode of FROM,
4955 we can do the conversion signed even if the input is unsigned. */
4957 for (fmode = GET_MODE (to); fmode != VOIDmode;
4958 fmode = GET_MODE_WIDER_MODE (fmode))
4959 for (imode = GET_MODE (from); imode != VOIDmode;
4960 imode = GET_MODE_WIDER_MODE (imode))
4962 int doing_unsigned = unsignedp;
4964 if (fmode != GET_MODE (to)
4965 && significand_size (fmode) < GET_MODE_BITSIZE (GET_MODE (from)))
4968 icode = can_float_p (fmode, imode, unsignedp);
4969 if (icode == CODE_FOR_nothing && unsignedp)
4971 enum insn_code scode = can_float_p (fmode, imode, 0);
4972 if (scode != CODE_FOR_nothing)
4973 can_do_signed = true;
4974 if (imode != GET_MODE (from))
4975 icode = scode, doing_unsigned = 0;
4978 if (icode != CODE_FOR_nothing)
4980 if (imode != GET_MODE (from))
4981 from = convert_to_mode (imode, from, unsignedp);
4983 if (fmode != GET_MODE (to))
4984 target = gen_reg_rtx (fmode);
4986 emit_unop_insn (icode, target, from,
4987 doing_unsigned ? UNSIGNED_FLOAT : FLOAT);
4990 convert_move (to, target, 0);
4995 /* Unsigned integer, and no way to convert directly. Convert as signed,
4996 then unconditionally adjust the result. */
4997 if (unsignedp && can_do_signed)
4999 rtx label = gen_label_rtx ();
5001 REAL_VALUE_TYPE offset;
5003 /* Look for a usable floating mode FMODE wider than the source and at
5004 least as wide as the target. Using FMODE will avoid rounding woes
5005 with unsigned values greater than the signed maximum value. */
5007 for (fmode = GET_MODE (to); fmode != VOIDmode;
5008 fmode = GET_MODE_WIDER_MODE (fmode))
5009 if (GET_MODE_BITSIZE (GET_MODE (from)) < GET_MODE_BITSIZE (fmode)
5010 && can_float_p (fmode, GET_MODE (from), 0) != CODE_FOR_nothing)
5013 if (fmode == VOIDmode)
5015 /* There is no such mode. Pretend the target is wide enough. */
5016 fmode = GET_MODE (to);
5018 /* Avoid double-rounding when TO is narrower than FROM. */
5019 if ((significand_size (fmode) + 1)
5020 < GET_MODE_BITSIZE (GET_MODE (from)))
5023 rtx neglabel = gen_label_rtx ();
5025 /* Don't use TARGET if it isn't a register, is a hard register,
5026 or is the wrong mode. */
5028 || REGNO (target) < FIRST_PSEUDO_REGISTER
5029 || GET_MODE (target) != fmode)
5030 target = gen_reg_rtx (fmode);
5032 imode = GET_MODE (from);
5033 do_pending_stack_adjust ();
5035 /* Test whether the sign bit is set. */
5036 emit_cmp_and_jump_insns (from, const0_rtx, LT, NULL_RTX, imode,
5039 /* The sign bit is not set. Convert as signed. */
5040 expand_float (target, from, 0);
5041 emit_jump_insn (gen_jump (label));
5044 /* The sign bit is set.
5045 Convert to a usable (positive signed) value by shifting right
5046 one bit, while remembering if a nonzero bit was shifted
5047 out; i.e., compute (from & 1) | (from >> 1). */
5049 emit_label (neglabel);
5050 temp = expand_binop (imode, and_optab, from, const1_rtx,
5051 NULL_RTX, 1, OPTAB_LIB_WIDEN);
5052 temp1 = expand_shift (RSHIFT_EXPR, imode, from, integer_one_node,
5054 temp = expand_binop (imode, ior_optab, temp, temp1, temp, 1,
5056 expand_float (target, temp, 0);
5058 /* Multiply by 2 to undo the shift above. */
5059 temp = expand_binop (fmode, add_optab, target, target,
5060 target, 0, OPTAB_LIB_WIDEN);
5062 emit_move_insn (target, temp);
5064 do_pending_stack_adjust ();
5070 /* If we are about to do some arithmetic to correct for an
5071 unsigned operand, do it in a pseudo-register. */
5073 if (GET_MODE (to) != fmode
5074 || !REG_P (to) || REGNO (to) < FIRST_PSEUDO_REGISTER)
5075 target = gen_reg_rtx (fmode);
5077 /* Convert as signed integer to floating. */
5078 expand_float (target, from, 0);
5080 /* If FROM is negative (and therefore TO is negative),
5081 correct its value by 2**bitwidth. */
5083 do_pending_stack_adjust ();
5084 emit_cmp_and_jump_insns (from, const0_rtx, GE, NULL_RTX, GET_MODE (from),
5088 real_2expN (&offset, GET_MODE_BITSIZE (GET_MODE (from)), fmode);
5089 temp = expand_binop (fmode, add_optab, target,
5090 CONST_DOUBLE_FROM_REAL_VALUE (offset, fmode),
5091 target, 0, OPTAB_LIB_WIDEN);
5093 emit_move_insn (target, temp);
5095 do_pending_stack_adjust ();
5100 /* No hardware instruction available; call a library routine. */
5105 convert_optab tab = unsignedp ? ufloat_optab : sfloat_optab;
5107 if (GET_MODE_SIZE (GET_MODE (from)) < GET_MODE_SIZE (SImode))
5108 from = convert_to_mode (SImode, from, unsignedp);
5110 libfunc = convert_optab_libfunc (tab, GET_MODE (to), GET_MODE (from));
5111 gcc_assert (libfunc);
5115 value = emit_library_call_value (libfunc, NULL_RTX, LCT_CONST,
5116 GET_MODE (to), 1, from,
5118 insns = get_insns ();
5121 emit_libcall_block (insns, target, value,
5122 gen_rtx_fmt_e (unsignedp ? UNSIGNED_FLOAT : FLOAT,
5123 GET_MODE (to), from));
5128 /* Copy result to requested destination
5129 if we have been computing in a temp location. */
5133 if (GET_MODE (target) == GET_MODE (to))
5134 emit_move_insn (to, target);
5136 convert_move (to, target, 0);
5140 /* Generate code to convert FROM to fixed point and store in TO. FROM
5141 must be floating point. */
5144 expand_fix (rtx to, rtx from, int unsignedp)
5146 enum insn_code icode;
5148 enum machine_mode fmode, imode;
5151 /* We first try to find a pair of modes, one real and one integer, at
5152 least as wide as FROM and TO, respectively, in which we can open-code
5153 this conversion. If the integer mode is wider than the mode of TO,
5154 we can do the conversion either signed or unsigned. */
5156 for (fmode = GET_MODE (from); fmode != VOIDmode;
5157 fmode = GET_MODE_WIDER_MODE (fmode))
5158 for (imode = GET_MODE (to); imode != VOIDmode;
5159 imode = GET_MODE_WIDER_MODE (imode))
5161 int doing_unsigned = unsignedp;
5163 icode = can_fix_p (imode, fmode, unsignedp, &must_trunc);
5164 if (icode == CODE_FOR_nothing && imode != GET_MODE (to) && unsignedp)
5165 icode = can_fix_p (imode, fmode, 0, &must_trunc), doing_unsigned = 0;
5167 if (icode != CODE_FOR_nothing)
5169 rtx last = get_last_insn ();
5170 if (fmode != GET_MODE (from))
5171 from = convert_to_mode (fmode, from, 0);
5175 rtx temp = gen_reg_rtx (GET_MODE (from));
5176 from = expand_unop (GET_MODE (from), ftrunc_optab, from,
5180 if (imode != GET_MODE (to))
5181 target = gen_reg_rtx (imode);
5183 if (maybe_emit_unop_insn (icode, target, from,
5184 doing_unsigned ? UNSIGNED_FIX : FIX))
5187 convert_move (to, target, unsignedp);
5190 delete_insns_since (last);
5194 /* For an unsigned conversion, there is one more way to do it.
5195 If we have a signed conversion, we generate code that compares
5196 the real value to the largest representable positive number. If if
5197 is smaller, the conversion is done normally. Otherwise, subtract
5198 one plus the highest signed number, convert, and add it back.
5200 We only need to check all real modes, since we know we didn't find
5201 anything with a wider integer mode.
5203 This code used to extend FP value into mode wider than the destination.
5204 This is needed for decimal float modes which cannot accurately
5205 represent one plus the highest signed number of the same size, but
5206 not for binary modes. Consider, for instance conversion from SFmode
5209 The hot path through the code is dealing with inputs smaller than 2^63
5210 and doing just the conversion, so there is no bits to lose.
5212 In the other path we know the value is positive in the range 2^63..2^64-1
5213 inclusive. (as for other input overflow happens and result is undefined)
5214 So we know that the most important bit set in mantissa corresponds to
5215 2^63. The subtraction of 2^63 should not generate any rounding as it
5216 simply clears out that bit. The rest is trivial. */
5218 if (unsignedp && GET_MODE_BITSIZE (GET_MODE (to)) <= HOST_BITS_PER_WIDE_INT)
5219 for (fmode = GET_MODE (from); fmode != VOIDmode;
5220 fmode = GET_MODE_WIDER_MODE (fmode))
5221 if (CODE_FOR_nothing != can_fix_p (GET_MODE (to), fmode, 0, &must_trunc)
5222 && (!DECIMAL_FLOAT_MODE_P (fmode)
5223 || GET_MODE_BITSIZE (fmode) > GET_MODE_BITSIZE (GET_MODE (to))))
5226 REAL_VALUE_TYPE offset;
5227 rtx limit, lab1, lab2, insn;
5229 bitsize = GET_MODE_BITSIZE (GET_MODE (to));
5230 real_2expN (&offset, bitsize - 1, fmode);
5231 limit = CONST_DOUBLE_FROM_REAL_VALUE (offset, fmode);
5232 lab1 = gen_label_rtx ();
5233 lab2 = gen_label_rtx ();
5235 if (fmode != GET_MODE (from))
5236 from = convert_to_mode (fmode, from, 0);
5238 /* See if we need to do the subtraction. */
5239 do_pending_stack_adjust ();
5240 emit_cmp_and_jump_insns (from, limit, GE, NULL_RTX, GET_MODE (from),
5243 /* If not, do the signed "fix" and branch around fixup code. */
5244 expand_fix (to, from, 0);
5245 emit_jump_insn (gen_jump (lab2));
5248 /* Otherwise, subtract 2**(N-1), convert to signed number,
5249 then add 2**(N-1). Do the addition using XOR since this
5250 will often generate better code. */
5252 target = expand_binop (GET_MODE (from), sub_optab, from, limit,
5253 NULL_RTX, 0, OPTAB_LIB_WIDEN);
5254 expand_fix (to, target, 0);
5255 target = expand_binop (GET_MODE (to), xor_optab, to,
5257 ((HOST_WIDE_INT) 1 << (bitsize - 1),
5259 to, 1, OPTAB_LIB_WIDEN);
5262 emit_move_insn (to, target);
5266 if (optab_handler (mov_optab, GET_MODE (to))->insn_code
5267 != CODE_FOR_nothing)
5269 /* Make a place for a REG_NOTE and add it. */
5270 insn = emit_move_insn (to, to);
5271 set_unique_reg_note (insn,
5273 gen_rtx_fmt_e (UNSIGNED_FIX,
5281 /* We can't do it with an insn, so use a library call. But first ensure
5282 that the mode of TO is at least as wide as SImode, since those are the
5283 only library calls we know about. */
5285 if (GET_MODE_SIZE (GET_MODE (to)) < GET_MODE_SIZE (SImode))
5287 target = gen_reg_rtx (SImode);
5289 expand_fix (target, from, unsignedp);
5297 convert_optab tab = unsignedp ? ufix_optab : sfix_optab;
5298 libfunc = convert_optab_libfunc (tab, GET_MODE (to), GET_MODE (from));
5299 gcc_assert (libfunc);
5303 value = emit_library_call_value (libfunc, NULL_RTX, LCT_CONST,
5304 GET_MODE (to), 1, from,
5306 insns = get_insns ();
5309 emit_libcall_block (insns, target, value,
5310 gen_rtx_fmt_e (unsignedp ? UNSIGNED_FIX : FIX,
5311 GET_MODE (to), from));
5316 if (GET_MODE (to) == GET_MODE (target))
5317 emit_move_insn (to, target);
5319 convert_move (to, target, 0);
5323 /* Generate code to convert FROM or TO a fixed-point.
5324 If UINTP is true, either TO or FROM is an unsigned integer.
5325 If SATP is true, we need to saturate the result. */
5328 expand_fixed_convert (rtx to, rtx from, int uintp, int satp)
5330 enum machine_mode to_mode = GET_MODE (to);
5331 enum machine_mode from_mode = GET_MODE (from);
5333 enum rtx_code this_code;
5334 enum insn_code code;
5338 if (to_mode == from_mode)
5340 emit_move_insn (to, from);
5346 tab = satp ? satfractuns_optab : fractuns_optab;
5347 this_code = satp ? UNSIGNED_SAT_FRACT : UNSIGNED_FRACT_CONVERT;
5351 tab = satp ? satfract_optab : fract_optab;
5352 this_code = satp ? SAT_FRACT : FRACT_CONVERT;
5354 code = tab->handlers[to_mode][from_mode].insn_code;
5355 if (code != CODE_FOR_nothing)
5357 emit_unop_insn (code, to, from, this_code);
5361 libfunc = convert_optab_libfunc (tab, to_mode, from_mode);
5362 gcc_assert (libfunc);
5365 value = emit_library_call_value (libfunc, NULL_RTX, LCT_CONST, to_mode,
5366 1, from, from_mode);
5367 insns = get_insns ();
5370 emit_libcall_block (insns, to, value,
5371 gen_rtx_fmt_e (tab->code, to_mode, from));
5374 /* Generate code to convert FROM to fixed point and store in TO. FROM
5375 must be floating point, TO must be signed. Use the conversion optab
5376 TAB to do the conversion. */
5379 expand_sfix_optab (rtx to, rtx from, convert_optab tab)
5381 enum insn_code icode;
5383 enum machine_mode fmode, imode;
5385 /* We first try to find a pair of modes, one real and one integer, at
5386 least as wide as FROM and TO, respectively, in which we can open-code
5387 this conversion. If the integer mode is wider than the mode of TO,
5388 we can do the conversion either signed or unsigned. */
5390 for (fmode = GET_MODE (from); fmode != VOIDmode;
5391 fmode = GET_MODE_WIDER_MODE (fmode))
5392 for (imode = GET_MODE (to); imode != VOIDmode;
5393 imode = GET_MODE_WIDER_MODE (imode))
5395 icode = convert_optab_handler (tab, imode, fmode)->insn_code;
5396 if (icode != CODE_FOR_nothing)
5398 rtx last = get_last_insn ();
5399 if (fmode != GET_MODE (from))
5400 from = convert_to_mode (fmode, from, 0);
5402 if (imode != GET_MODE (to))
5403 target = gen_reg_rtx (imode);
5405 if (!maybe_emit_unop_insn (icode, target, from, UNKNOWN))
5407 delete_insns_since (last);
5411 convert_move (to, target, 0);
5419 /* Report whether we have an instruction to perform the operation
5420 specified by CODE on operands of mode MODE. */
5422 have_insn_for (enum rtx_code code, enum machine_mode mode)
5424 return (code_to_optab[(int) code] != 0
5425 && (optab_handler (code_to_optab[(int) code], mode)->insn_code
5426 != CODE_FOR_nothing));
5429 /* Set all insn_code fields to CODE_FOR_nothing. */
5432 init_insn_codes (void)
5436 for (i = 0; i < (unsigned int) OTI_MAX; i++)
5441 op = &optab_table[i];
5442 for (j = 0; j < NUM_MACHINE_MODES; j++)
5443 optab_handler (op, j)->insn_code = CODE_FOR_nothing;
5445 for (i = 0; i < (unsigned int) COI_MAX; i++)
5450 op = &convert_optab_table[i];
5451 for (j = 0; j < NUM_MACHINE_MODES; j++)
5452 for (k = 0; k < NUM_MACHINE_MODES; k++)
5453 convert_optab_handler (op, j, k)->insn_code = CODE_FOR_nothing;
5457 /* Initialize OP's code to CODE, and write it into the code_to_optab table. */
5459 init_optab (optab op, enum rtx_code code)
5462 code_to_optab[(int) code] = op;
5465 /* Same, but fill in its code as CODE, and do _not_ write it into
5466 the code_to_optab table. */
5468 init_optabv (optab op, enum rtx_code code)
5473 /* Conversion optabs never go in the code_to_optab table. */
5475 init_convert_optab (convert_optab op, enum rtx_code code)
5480 /* Initialize the libfunc fields of an entire group of entries in some
5481 optab. Each entry is set equal to a string consisting of a leading
5482 pair of underscores followed by a generic operation name followed by
5483 a mode name (downshifted to lowercase) followed by a single character
5484 representing the number of operands for the given operation (which is
5485 usually one of the characters '2', '3', or '4').
5487 OPTABLE is the table in which libfunc fields are to be initialized.
5488 OPNAME is the generic (string) name of the operation.
5489 SUFFIX is the character which specifies the number of operands for
5490 the given generic operation.
5491 MODE is the mode to generate for.
5495 gen_libfunc (optab optable, const char *opname, int suffix, enum machine_mode mode)
5497 unsigned opname_len = strlen (opname);
5498 const char *mname = GET_MODE_NAME (mode);
5499 unsigned mname_len = strlen (mname);
5500 char *libfunc_name = XALLOCAVEC (char, 2 + opname_len + mname_len + 1 + 1);
5507 for (q = opname; *q; )
5509 for (q = mname; *q; q++)
5510 *p++ = TOLOWER (*q);
5514 set_optab_libfunc (optable, mode,
5515 ggc_alloc_string (libfunc_name, p - libfunc_name));
5518 /* Like gen_libfunc, but verify that integer operation is involved. */
5521 gen_int_libfunc (optab optable, const char *opname, char suffix,
5522 enum machine_mode mode)
5524 int maxsize = 2 * BITS_PER_WORD;
5526 if (GET_MODE_CLASS (mode) != MODE_INT)
5528 if (maxsize < LONG_LONG_TYPE_SIZE)
5529 maxsize = LONG_LONG_TYPE_SIZE;
5530 if (GET_MODE_CLASS (mode) != MODE_INT
5531 || mode < word_mode || GET_MODE_BITSIZE (mode) > maxsize)
5533 gen_libfunc (optable, opname, suffix, mode);
5536 /* Like gen_libfunc, but verify that FP and set decimal prefix if needed. */
5539 gen_fp_libfunc (optab optable, const char *opname, char suffix,
5540 enum machine_mode mode)
5544 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
5545 gen_libfunc (optable, opname, suffix, mode);
5546 if (DECIMAL_FLOAT_MODE_P (mode))
5548 dec_opname = XALLOCAVEC (char, sizeof (DECIMAL_PREFIX) + strlen (opname));
5549 /* For BID support, change the name to have either a bid_ or dpd_ prefix
5550 depending on the low level floating format used. */
5551 memcpy (dec_opname, DECIMAL_PREFIX, sizeof (DECIMAL_PREFIX) - 1);
5552 strcpy (dec_opname + sizeof (DECIMAL_PREFIX) - 1, opname);
5553 gen_libfunc (optable, dec_opname, suffix, mode);
5557 /* Like gen_libfunc, but verify that fixed-point operation is involved. */
5560 gen_fixed_libfunc (optab optable, const char *opname, char suffix,
5561 enum machine_mode mode)
5563 if (!ALL_FIXED_POINT_MODE_P (mode))
5565 gen_libfunc (optable, opname, suffix, mode);
5568 /* Like gen_libfunc, but verify that signed fixed-point operation is
5572 gen_signed_fixed_libfunc (optab optable, const char *opname, char suffix,
5573 enum machine_mode mode)
5575 if (!SIGNED_FIXED_POINT_MODE_P (mode))
5577 gen_libfunc (optable, opname, suffix, mode);
5580 /* Like gen_libfunc, but verify that unsigned fixed-point operation is
5584 gen_unsigned_fixed_libfunc (optab optable, const char *opname, char suffix,
5585 enum machine_mode mode)
5587 if (!UNSIGNED_FIXED_POINT_MODE_P (mode))
5589 gen_libfunc (optable, opname, suffix, mode);
5592 /* Like gen_libfunc, but verify that FP or INT operation is involved. */
5595 gen_int_fp_libfunc (optab optable, const char *name, char suffix,
5596 enum machine_mode mode)
5598 if (DECIMAL_FLOAT_MODE_P (mode) || GET_MODE_CLASS (mode) == MODE_FLOAT)
5599 gen_fp_libfunc (optable, name, suffix, mode);
5600 if (INTEGRAL_MODE_P (mode))
5601 gen_int_libfunc (optable, name, suffix, mode);
5604 /* Like gen_libfunc, but verify that FP or INT operation is involved
5605 and add 'v' suffix for integer operation. */
5608 gen_intv_fp_libfunc (optab optable, const char *name, char suffix,
5609 enum machine_mode mode)
5611 if (DECIMAL_FLOAT_MODE_P (mode) || GET_MODE_CLASS (mode) == MODE_FLOAT)
5612 gen_fp_libfunc (optable, name, suffix, mode);
5613 if (GET_MODE_CLASS (mode) == MODE_INT)
5615 int len = strlen (name);
5616 char *v_name = XALLOCAVEC (char, len + 2);
5617 strcpy (v_name, name);
5619 v_name[len + 1] = 0;
5620 gen_int_libfunc (optable, v_name, suffix, mode);
5624 /* Like gen_libfunc, but verify that FP or INT or FIXED operation is
5628 gen_int_fp_fixed_libfunc (optab optable, const char *name, char suffix,
5629 enum machine_mode mode)
5631 if (DECIMAL_FLOAT_MODE_P (mode) || GET_MODE_CLASS (mode) == MODE_FLOAT)
5632 gen_fp_libfunc (optable, name, suffix, mode);
5633 if (INTEGRAL_MODE_P (mode))
5634 gen_int_libfunc (optable, name, suffix, mode);
5635 if (ALL_FIXED_POINT_MODE_P (mode))
5636 gen_fixed_libfunc (optable, name, suffix, mode);
5639 /* Like gen_libfunc, but verify that FP or INT or signed FIXED operation is
5643 gen_int_fp_signed_fixed_libfunc (optab optable, const char *name, char suffix,
5644 enum machine_mode mode)
5646 if (DECIMAL_FLOAT_MODE_P (mode) || GET_MODE_CLASS (mode) == MODE_FLOAT)
5647 gen_fp_libfunc (optable, name, suffix, mode);
5648 if (INTEGRAL_MODE_P (mode))
5649 gen_int_libfunc (optable, name, suffix, mode);
5650 if (SIGNED_FIXED_POINT_MODE_P (mode))
5651 gen_signed_fixed_libfunc (optable, name, suffix, mode);
5654 /* Like gen_libfunc, but verify that INT or FIXED operation is
5658 gen_int_fixed_libfunc (optab optable, const char *name, char suffix,
5659 enum machine_mode mode)
5661 if (INTEGRAL_MODE_P (mode))
5662 gen_int_libfunc (optable, name, suffix, mode);
5663 if (ALL_FIXED_POINT_MODE_P (mode))
5664 gen_fixed_libfunc (optable, name, suffix, mode);
5667 /* Like gen_libfunc, but verify that INT or signed FIXED operation is
5671 gen_int_signed_fixed_libfunc (optab optable, const char *name, char suffix,
5672 enum machine_mode mode)
5674 if (INTEGRAL_MODE_P (mode))
5675 gen_int_libfunc (optable, name, suffix, mode);
5676 if (SIGNED_FIXED_POINT_MODE_P (mode))
5677 gen_signed_fixed_libfunc (optable, name, suffix, mode);
5680 /* Like gen_libfunc, but verify that INT or unsigned FIXED operation is
5684 gen_int_unsigned_fixed_libfunc (optab optable, const char *name, char suffix,
5685 enum machine_mode mode)
5687 if (INTEGRAL_MODE_P (mode))
5688 gen_int_libfunc (optable, name, suffix, mode);
5689 if (UNSIGNED_FIXED_POINT_MODE_P (mode))
5690 gen_unsigned_fixed_libfunc (optable, name, suffix, mode);
5693 /* Initialize the libfunc fields of an entire group of entries of an
5694 inter-mode-class conversion optab. The string formation rules are
5695 similar to the ones for init_libfuncs, above, but instead of having
5696 a mode name and an operand count these functions have two mode names
5697 and no operand count. */
5700 gen_interclass_conv_libfunc (convert_optab tab,
5702 enum machine_mode tmode,
5703 enum machine_mode fmode)
5705 size_t opname_len = strlen (opname);
5706 size_t mname_len = 0;
5708 const char *fname, *tname;
5710 char *libfunc_name, *suffix;
5711 char *nondec_name, *dec_name, *nondec_suffix, *dec_suffix;
5714 /* If this is a decimal conversion, add the current BID vs. DPD prefix that
5715 depends on which underlying decimal floating point format is used. */
5716 const size_t dec_len = sizeof (DECIMAL_PREFIX) - 1;
5718 mname_len = strlen (GET_MODE_NAME (tmode)) + strlen (GET_MODE_NAME (fmode));
5720 nondec_name = XALLOCAVEC (char, 2 + opname_len + mname_len + 1 + 1);
5721 nondec_name[0] = '_';
5722 nondec_name[1] = '_';
5723 memcpy (&nondec_name[2], opname, opname_len);
5724 nondec_suffix = nondec_name + opname_len + 2;
5726 dec_name = XALLOCAVEC (char, 2 + dec_len + opname_len + mname_len + 1 + 1);
5729 memcpy (&dec_name[2], DECIMAL_PREFIX, dec_len);
5730 memcpy (&dec_name[2+dec_len], opname, opname_len);
5731 dec_suffix = dec_name + dec_len + opname_len + 2;
5733 fname = GET_MODE_NAME (fmode);
5734 tname = GET_MODE_NAME (tmode);
5736 if (DECIMAL_FLOAT_MODE_P(fmode) || DECIMAL_FLOAT_MODE_P(tmode))
5738 libfunc_name = dec_name;
5739 suffix = dec_suffix;
5743 libfunc_name = nondec_name;
5744 suffix = nondec_suffix;
5748 for (q = fname; *q; p++, q++)
5750 for (q = tname; *q; p++, q++)
5755 set_conv_libfunc (tab, tmode, fmode,
5756 ggc_alloc_string (libfunc_name, p - libfunc_name));
5759 /* Same as gen_interclass_conv_libfunc but verify that we are producing
5760 int->fp conversion. */
5763 gen_int_to_fp_conv_libfunc (convert_optab tab,
5765 enum machine_mode tmode,
5766 enum machine_mode fmode)
5768 if (GET_MODE_CLASS (fmode) != MODE_INT)
5770 if (GET_MODE_CLASS (tmode) != MODE_FLOAT && !DECIMAL_FLOAT_MODE_P (tmode))
5772 gen_interclass_conv_libfunc (tab, opname, tmode, fmode);
5775 /* ufloat_optab is special by using floatun for FP and floatuns decimal fp
5779 gen_ufloat_conv_libfunc (convert_optab tab,
5780 const char *opname ATTRIBUTE_UNUSED,
5781 enum machine_mode tmode,
5782 enum machine_mode fmode)
5784 if (DECIMAL_FLOAT_MODE_P (tmode))
5785 gen_int_to_fp_conv_libfunc (tab, "floatuns", tmode, fmode);
5787 gen_int_to_fp_conv_libfunc (tab, "floatun", tmode, fmode);
5790 /* Same as gen_interclass_conv_libfunc but verify that we are producing
5791 fp->int conversion. */
5794 gen_int_to_fp_nondecimal_conv_libfunc (convert_optab tab,
5796 enum machine_mode tmode,
5797 enum machine_mode fmode)
5799 if (GET_MODE_CLASS (fmode) != MODE_INT)
5801 if (GET_MODE_CLASS (tmode) != MODE_FLOAT)
5803 gen_interclass_conv_libfunc (tab, opname, tmode, fmode);
5806 /* Same as gen_interclass_conv_libfunc but verify that we are producing
5807 fp->int conversion with no decimal floating point involved. */
5810 gen_fp_to_int_conv_libfunc (convert_optab tab,
5812 enum machine_mode tmode,
5813 enum machine_mode fmode)
5815 if (GET_MODE_CLASS (fmode) != MODE_FLOAT && !DECIMAL_FLOAT_MODE_P (fmode))
5817 if (GET_MODE_CLASS (tmode) != MODE_INT)
5819 gen_interclass_conv_libfunc (tab, opname, tmode, fmode);
5822 /* Initialize the libfunc fields of an of an intra-mode-class conversion optab.
5823 The string formation rules are
5824 similar to the ones for init_libfunc, above. */
5827 gen_intraclass_conv_libfunc (convert_optab tab, const char *opname,
5828 enum machine_mode tmode, enum machine_mode fmode)
5830 size_t opname_len = strlen (opname);
5831 size_t mname_len = 0;
5833 const char *fname, *tname;
5835 char *nondec_name, *dec_name, *nondec_suffix, *dec_suffix;
5836 char *libfunc_name, *suffix;
5839 /* If this is a decimal conversion, add the current BID vs. DPD prefix that
5840 depends on which underlying decimal floating point format is used. */
5841 const size_t dec_len = sizeof (DECIMAL_PREFIX) - 1;
5843 mname_len = strlen (GET_MODE_NAME (tmode)) + strlen (GET_MODE_NAME (fmode));
5845 nondec_name = XALLOCAVEC (char, 2 + opname_len + mname_len + 1 + 1);
5846 nondec_name[0] = '_';
5847 nondec_name[1] = '_';
5848 memcpy (&nondec_name[2], opname, opname_len);
5849 nondec_suffix = nondec_name + opname_len + 2;
5851 dec_name = XALLOCAVEC (char, 2 + dec_len + opname_len + mname_len + 1 + 1);
5854 memcpy (&dec_name[2], DECIMAL_PREFIX, dec_len);
5855 memcpy (&dec_name[2 + dec_len], opname, opname_len);
5856 dec_suffix = dec_name + dec_len + opname_len + 2;
5858 fname = GET_MODE_NAME (fmode);
5859 tname = GET_MODE_NAME (tmode);
5861 if (DECIMAL_FLOAT_MODE_P(fmode) || DECIMAL_FLOAT_MODE_P(tmode))
5863 libfunc_name = dec_name;
5864 suffix = dec_suffix;
5868 libfunc_name = nondec_name;
5869 suffix = nondec_suffix;
5873 for (q = fname; *q; p++, q++)
5875 for (q = tname; *q; p++, q++)
5881 set_conv_libfunc (tab, tmode, fmode,
5882 ggc_alloc_string (libfunc_name, p - libfunc_name));
5885 /* Pick proper libcall for trunc_optab. We need to chose if we do
5886 truncation or extension and interclass or intraclass. */
5889 gen_trunc_conv_libfunc (convert_optab tab,
5891 enum machine_mode tmode,
5892 enum machine_mode fmode)
5894 if (GET_MODE_CLASS (tmode) != MODE_FLOAT && !DECIMAL_FLOAT_MODE_P (tmode))
5896 if (GET_MODE_CLASS (fmode) != MODE_FLOAT && !DECIMAL_FLOAT_MODE_P (fmode))
5901 if ((GET_MODE_CLASS (tmode) == MODE_FLOAT && DECIMAL_FLOAT_MODE_P (fmode))
5902 || (GET_MODE_CLASS (fmode) == MODE_FLOAT && DECIMAL_FLOAT_MODE_P (tmode)))
5903 gen_interclass_conv_libfunc (tab, opname, tmode, fmode);
5905 if (GET_MODE_PRECISION (fmode) <= GET_MODE_PRECISION (tmode))
5908 if ((GET_MODE_CLASS (tmode) == MODE_FLOAT
5909 && GET_MODE_CLASS (fmode) == MODE_FLOAT)
5910 || (DECIMAL_FLOAT_MODE_P (fmode) && DECIMAL_FLOAT_MODE_P (tmode)))
5911 gen_intraclass_conv_libfunc (tab, opname, tmode, fmode);
5914 /* Pick proper libcall for extend_optab. We need to chose if we do
5915 truncation or extension and interclass or intraclass. */
5918 gen_extend_conv_libfunc (convert_optab tab,
5919 const char *opname ATTRIBUTE_UNUSED,
5920 enum machine_mode tmode,
5921 enum machine_mode fmode)
5923 if (GET_MODE_CLASS (tmode) != MODE_FLOAT && !DECIMAL_FLOAT_MODE_P (tmode))
5925 if (GET_MODE_CLASS (fmode) != MODE_FLOAT && !DECIMAL_FLOAT_MODE_P (fmode))
5930 if ((GET_MODE_CLASS (tmode) == MODE_FLOAT && DECIMAL_FLOAT_MODE_P (fmode))
5931 || (GET_MODE_CLASS (fmode) == MODE_FLOAT && DECIMAL_FLOAT_MODE_P (tmode)))
5932 gen_interclass_conv_libfunc (tab, opname, tmode, fmode);
5934 if (GET_MODE_PRECISION (fmode) > GET_MODE_PRECISION (tmode))
5937 if ((GET_MODE_CLASS (tmode) == MODE_FLOAT
5938 && GET_MODE_CLASS (fmode) == MODE_FLOAT)
5939 || (DECIMAL_FLOAT_MODE_P (fmode) && DECIMAL_FLOAT_MODE_P (tmode)))
5940 gen_intraclass_conv_libfunc (tab, opname, tmode, fmode);
5943 /* Pick proper libcall for fract_optab. We need to chose if we do
5944 interclass or intraclass. */
5947 gen_fract_conv_libfunc (convert_optab tab,
5949 enum machine_mode tmode,
5950 enum machine_mode fmode)
5954 if (!(ALL_FIXED_POINT_MODE_P (tmode) || ALL_FIXED_POINT_MODE_P (fmode)))
5957 if (GET_MODE_CLASS (tmode) == GET_MODE_CLASS (fmode))
5958 gen_intraclass_conv_libfunc (tab, opname, tmode, fmode);
5960 gen_interclass_conv_libfunc (tab, opname, tmode, fmode);
5963 /* Pick proper libcall for fractuns_optab. */
5966 gen_fractuns_conv_libfunc (convert_optab tab,
5968 enum machine_mode tmode,
5969 enum machine_mode fmode)
5973 /* One mode must be a fixed-point mode, and the other must be an integer
5975 if (!((ALL_FIXED_POINT_MODE_P (tmode) && GET_MODE_CLASS (fmode) == MODE_INT)
5976 || (ALL_FIXED_POINT_MODE_P (fmode)
5977 && GET_MODE_CLASS (tmode) == MODE_INT)))
5980 gen_interclass_conv_libfunc (tab, opname, tmode, fmode);
5983 /* Pick proper libcall for satfract_optab. We need to chose if we do
5984 interclass or intraclass. */
5987 gen_satfract_conv_libfunc (convert_optab tab,
5989 enum machine_mode tmode,
5990 enum machine_mode fmode)
5994 /* TMODE must be a fixed-point mode. */
5995 if (!ALL_FIXED_POINT_MODE_P (tmode))
5998 if (GET_MODE_CLASS (tmode) == GET_MODE_CLASS (fmode))
5999 gen_intraclass_conv_libfunc (tab, opname, tmode, fmode);
6001 gen_interclass_conv_libfunc (tab, opname, tmode, fmode);
6004 /* Pick proper libcall for satfractuns_optab. */
6007 gen_satfractuns_conv_libfunc (convert_optab tab,
6009 enum machine_mode tmode,
6010 enum machine_mode fmode)
6014 /* TMODE must be a fixed-point mode, and FMODE must be an integer mode. */
6015 if (!(ALL_FIXED_POINT_MODE_P (tmode) && GET_MODE_CLASS (fmode) == MODE_INT))
6018 gen_interclass_conv_libfunc (tab, opname, tmode, fmode);
6021 /* A table of previously-created libfuncs, hashed by name. */
6022 static GTY ((param_is (union tree_node))) htab_t libfunc_decls;
6024 /* Hashtable callbacks for libfunc_decls. */
6027 libfunc_decl_hash (const void *entry)
6029 return htab_hash_string (IDENTIFIER_POINTER (DECL_NAME ((const_tree) entry)));
6033 libfunc_decl_eq (const void *entry1, const void *entry2)
6035 return DECL_NAME ((const_tree) entry1) == (const_tree) entry2;
6039 init_one_libfunc (const char *name)
6045 if (libfunc_decls == NULL)
6046 libfunc_decls = htab_create_ggc (37, libfunc_decl_hash,
6047 libfunc_decl_eq, NULL);
6049 /* See if we have already created a libfunc decl for this function. */
6050 id = get_identifier (name);
6051 hash = htab_hash_string (name);
6052 slot = htab_find_slot_with_hash (libfunc_decls, id, hash, INSERT);
6053 decl = (tree) *slot;
6056 /* Create a new decl, so that it can be passed to
6057 targetm.encode_section_info. */
6058 /* ??? We don't have any type information except for this is
6059 a function. Pretend this is "int foo()". */
6060 decl = build_decl (FUNCTION_DECL, get_identifier (name),
6061 build_function_type (integer_type_node, NULL_TREE));
6062 DECL_ARTIFICIAL (decl) = 1;
6063 DECL_EXTERNAL (decl) = 1;
6064 TREE_PUBLIC (decl) = 1;
6066 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
6067 are the flags assigned by targetm.encode_section_info. */
6068 SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl), 0), NULL);
6072 return XEXP (DECL_RTL (decl), 0);
6075 /* Adjust the assembler name of libfunc NAME to ASMSPEC. */
6078 set_user_assembler_libfunc (const char *name, const char *asmspec)
6084 id = get_identifier (name);
6085 hash = htab_hash_string (name);
6086 slot = htab_find_slot_with_hash (libfunc_decls, id, hash, NO_INSERT);
6088 decl = (tree) *slot;
6089 set_user_assembler_name (decl, asmspec);
6090 return XEXP (DECL_RTL (decl), 0);
6093 /* Call this to reset the function entry for one optab (OPTABLE) in mode
6094 MODE to NAME, which should be either 0 or a string constant. */
6096 set_optab_libfunc (optab optable, enum machine_mode mode, const char *name)
6099 struct libfunc_entry e;
6100 struct libfunc_entry **slot;
6101 e.optab = (size_t) (optable - &optab_table[0]);
6106 val = init_one_libfunc (name);
6109 slot = (struct libfunc_entry **) htab_find_slot (libfunc_hash, &e, INSERT);
6111 *slot = GGC_NEW (struct libfunc_entry);
6112 (*slot)->optab = (size_t) (optable - &optab_table[0]);
6113 (*slot)->mode1 = mode;
6114 (*slot)->mode2 = VOIDmode;
6115 (*slot)->libfunc = val;
6118 /* Call this to reset the function entry for one conversion optab
6119 (OPTABLE) from mode FMODE to mode TMODE to NAME, which should be
6120 either 0 or a string constant. */
6122 set_conv_libfunc (convert_optab optable, enum machine_mode tmode,
6123 enum machine_mode fmode, const char *name)
6126 struct libfunc_entry e;
6127 struct libfunc_entry **slot;
6128 e.optab = (size_t) (optable - &convert_optab_table[0]);
6133 val = init_one_libfunc (name);
6136 slot = (struct libfunc_entry **) htab_find_slot (libfunc_hash, &e, INSERT);
6138 *slot = GGC_NEW (struct libfunc_entry);
6139 (*slot)->optab = (size_t) (optable - &convert_optab_table[0]);
6140 (*slot)->mode1 = tmode;
6141 (*slot)->mode2 = fmode;
6142 (*slot)->libfunc = val;
6145 /* Call this to initialize the contents of the optabs
6146 appropriately for the current target machine. */
6152 enum machine_mode int_mode;
6155 libfunc_hash = htab_create_ggc (10, hash_libfunc, eq_libfunc, NULL);
6156 /* Start by initializing all tables to contain CODE_FOR_nothing. */
6158 for (i = 0; i < NUM_RTX_CODE; i++)
6159 setcc_gen_code[i] = CODE_FOR_nothing;
6161 #ifdef HAVE_conditional_move
6162 for (i = 0; i < NUM_MACHINE_MODES; i++)
6163 movcc_gen_code[i] = CODE_FOR_nothing;
6166 for (i = 0; i < NUM_MACHINE_MODES; i++)
6168 vcond_gen_code[i] = CODE_FOR_nothing;
6169 vcondu_gen_code[i] = CODE_FOR_nothing;
6172 #if GCC_VERSION >= 4000
6173 /* We statically initialize the insn_codes with CODE_FOR_nothing. */
6180 init_optab (add_optab, PLUS);
6181 init_optabv (addv_optab, PLUS);
6182 init_optab (sub_optab, MINUS);
6183 init_optabv (subv_optab, MINUS);
6184 init_optab (ssadd_optab, SS_PLUS);
6185 init_optab (usadd_optab, US_PLUS);
6186 init_optab (sssub_optab, SS_MINUS);
6187 init_optab (ussub_optab, US_MINUS);
6188 init_optab (smul_optab, MULT);
6189 init_optab (ssmul_optab, SS_MULT);
6190 init_optab (usmul_optab, US_MULT);
6191 init_optabv (smulv_optab, MULT);
6192 init_optab (smul_highpart_optab, UNKNOWN);
6193 init_optab (umul_highpart_optab, UNKNOWN);
6194 init_optab (smul_widen_optab, UNKNOWN);
6195 init_optab (umul_widen_optab, UNKNOWN);
6196 init_optab (usmul_widen_optab, UNKNOWN);
6197 init_optab (smadd_widen_optab, UNKNOWN);
6198 init_optab (umadd_widen_optab, UNKNOWN);
6199 init_optab (ssmadd_widen_optab, UNKNOWN);
6200 init_optab (usmadd_widen_optab, UNKNOWN);
6201 init_optab (smsub_widen_optab, UNKNOWN);
6202 init_optab (umsub_widen_optab, UNKNOWN);
6203 init_optab (ssmsub_widen_optab, UNKNOWN);
6204 init_optab (usmsub_widen_optab, UNKNOWN);
6205 init_optab (sdiv_optab, DIV);
6206 init_optab (ssdiv_optab, SS_DIV);
6207 init_optab (usdiv_optab, US_DIV);
6208 init_optabv (sdivv_optab, DIV);
6209 init_optab (sdivmod_optab, UNKNOWN);
6210 init_optab (udiv_optab, UDIV);
6211 init_optab (udivmod_optab, UNKNOWN);
6212 init_optab (smod_optab, MOD);
6213 init_optab (umod_optab, UMOD);
6214 init_optab (fmod_optab, UNKNOWN);
6215 init_optab (remainder_optab, UNKNOWN);
6216 init_optab (ftrunc_optab, UNKNOWN);
6217 init_optab (and_optab, AND);
6218 init_optab (ior_optab, IOR);
6219 init_optab (xor_optab, XOR);
6220 init_optab (ashl_optab, ASHIFT);
6221 init_optab (ssashl_optab, SS_ASHIFT);
6222 init_optab (usashl_optab, US_ASHIFT);
6223 init_optab (ashr_optab, ASHIFTRT);
6224 init_optab (lshr_optab, LSHIFTRT);
6225 init_optab (rotl_optab, ROTATE);
6226 init_optab (rotr_optab, ROTATERT);
6227 init_optab (smin_optab, SMIN);
6228 init_optab (smax_optab, SMAX);
6229 init_optab (umin_optab, UMIN);
6230 init_optab (umax_optab, UMAX);
6231 init_optab (pow_optab, UNKNOWN);
6232 init_optab (atan2_optab, UNKNOWN);
6234 /* These three have codes assigned exclusively for the sake of
6236 init_optab (mov_optab, SET);
6237 init_optab (movstrict_optab, STRICT_LOW_PART);
6238 init_optab (cmp_optab, COMPARE);
6240 init_optab (storent_optab, UNKNOWN);
6242 init_optab (ucmp_optab, UNKNOWN);
6243 init_optab (tst_optab, UNKNOWN);
6245 init_optab (eq_optab, EQ);
6246 init_optab (ne_optab, NE);
6247 init_optab (gt_optab, GT);
6248 init_optab (ge_optab, GE);
6249 init_optab (lt_optab, LT);
6250 init_optab (le_optab, LE);
6251 init_optab (unord_optab, UNORDERED);
6253 init_optab (neg_optab, NEG);
6254 init_optab (ssneg_optab, SS_NEG);
6255 init_optab (usneg_optab, US_NEG);
6256 init_optabv (negv_optab, NEG);
6257 init_optab (abs_optab, ABS);
6258 init_optabv (absv_optab, ABS);
6259 init_optab (addcc_optab, UNKNOWN);
6260 init_optab (one_cmpl_optab, NOT);
6261 init_optab (bswap_optab, BSWAP);
6262 init_optab (ffs_optab, FFS);
6263 init_optab (clz_optab, CLZ);
6264 init_optab (ctz_optab, CTZ);
6265 init_optab (popcount_optab, POPCOUNT);
6266 init_optab (parity_optab, PARITY);
6267 init_optab (sqrt_optab, SQRT);
6268 init_optab (floor_optab, UNKNOWN);
6269 init_optab (ceil_optab, UNKNOWN);
6270 init_optab (round_optab, UNKNOWN);
6271 init_optab (btrunc_optab, UNKNOWN);
6272 init_optab (nearbyint_optab, UNKNOWN);
6273 init_optab (rint_optab, UNKNOWN);
6274 init_optab (sincos_optab, UNKNOWN);
6275 init_optab (sin_optab, UNKNOWN);
6276 init_optab (asin_optab, UNKNOWN);
6277 init_optab (cos_optab, UNKNOWN);
6278 init_optab (acos_optab, UNKNOWN);
6279 init_optab (exp_optab, UNKNOWN);
6280 init_optab (exp10_optab, UNKNOWN);
6281 init_optab (exp2_optab, UNKNOWN);
6282 init_optab (expm1_optab, UNKNOWN);
6283 init_optab (ldexp_optab, UNKNOWN);
6284 init_optab (scalb_optab, UNKNOWN);
6285 init_optab (logb_optab, UNKNOWN);
6286 init_optab (ilogb_optab, UNKNOWN);
6287 init_optab (log_optab, UNKNOWN);
6288 init_optab (log10_optab, UNKNOWN);
6289 init_optab (log2_optab, UNKNOWN);
6290 init_optab (log1p_optab, UNKNOWN);
6291 init_optab (tan_optab, UNKNOWN);
6292 init_optab (atan_optab, UNKNOWN);
6293 init_optab (copysign_optab, UNKNOWN);
6294 init_optab (signbit_optab, UNKNOWN);
6296 init_optab (isinf_optab, UNKNOWN);
6298 init_optab (strlen_optab, UNKNOWN);
6299 init_optab (cbranch_optab, UNKNOWN);
6300 init_optab (cmov_optab, UNKNOWN);
6301 init_optab (cstore_optab, UNKNOWN);
6302 init_optab (push_optab, UNKNOWN);
6304 init_optab (reduc_smax_optab, UNKNOWN);
6305 init_optab (reduc_umax_optab, UNKNOWN);
6306 init_optab (reduc_smin_optab, UNKNOWN);
6307 init_optab (reduc_umin_optab, UNKNOWN);
6308 init_optab (reduc_splus_optab, UNKNOWN);
6309 init_optab (reduc_uplus_optab, UNKNOWN);
6311 init_optab (ssum_widen_optab, UNKNOWN);
6312 init_optab (usum_widen_optab, UNKNOWN);
6313 init_optab (sdot_prod_optab, UNKNOWN);
6314 init_optab (udot_prod_optab, UNKNOWN);
6316 init_optab (vec_extract_optab, UNKNOWN);
6317 init_optab (vec_extract_even_optab, UNKNOWN);
6318 init_optab (vec_extract_odd_optab, UNKNOWN);
6319 init_optab (vec_interleave_high_optab, UNKNOWN);
6320 init_optab (vec_interleave_low_optab, UNKNOWN);
6321 init_optab (vec_set_optab, UNKNOWN);
6322 init_optab (vec_init_optab, UNKNOWN);
6323 init_optab (vec_shl_optab, UNKNOWN);
6324 init_optab (vec_shr_optab, UNKNOWN);
6325 init_optab (vec_realign_load_optab, UNKNOWN);
6326 init_optab (movmisalign_optab, UNKNOWN);
6327 init_optab (vec_widen_umult_hi_optab, UNKNOWN);
6328 init_optab (vec_widen_umult_lo_optab, UNKNOWN);
6329 init_optab (vec_widen_smult_hi_optab, UNKNOWN);
6330 init_optab (vec_widen_smult_lo_optab, UNKNOWN);
6331 init_optab (vec_unpacks_hi_optab, UNKNOWN);
6332 init_optab (vec_unpacks_lo_optab, UNKNOWN);
6333 init_optab (vec_unpacku_hi_optab, UNKNOWN);
6334 init_optab (vec_unpacku_lo_optab, UNKNOWN);
6335 init_optab (vec_unpacks_float_hi_optab, UNKNOWN);
6336 init_optab (vec_unpacks_float_lo_optab, UNKNOWN);
6337 init_optab (vec_unpacku_float_hi_optab, UNKNOWN);
6338 init_optab (vec_unpacku_float_lo_optab, UNKNOWN);
6339 init_optab (vec_pack_trunc_optab, UNKNOWN);
6340 init_optab (vec_pack_usat_optab, UNKNOWN);
6341 init_optab (vec_pack_ssat_optab, UNKNOWN);
6342 init_optab (vec_pack_ufix_trunc_optab, UNKNOWN);
6343 init_optab (vec_pack_sfix_trunc_optab, UNKNOWN);
6345 init_optab (powi_optab, UNKNOWN);
6348 init_convert_optab (sext_optab, SIGN_EXTEND);
6349 init_convert_optab (zext_optab, ZERO_EXTEND);
6350 init_convert_optab (trunc_optab, TRUNCATE);
6351 init_convert_optab (sfix_optab, FIX);
6352 init_convert_optab (ufix_optab, UNSIGNED_FIX);
6353 init_convert_optab (sfixtrunc_optab, UNKNOWN);
6354 init_convert_optab (ufixtrunc_optab, UNKNOWN);
6355 init_convert_optab (sfloat_optab, FLOAT);
6356 init_convert_optab (ufloat_optab, UNSIGNED_FLOAT);
6357 init_convert_optab (lrint_optab, UNKNOWN);
6358 init_convert_optab (lround_optab, UNKNOWN);
6359 init_convert_optab (lfloor_optab, UNKNOWN);
6360 init_convert_optab (lceil_optab, UNKNOWN);
6362 init_convert_optab (fract_optab, FRACT_CONVERT);
6363 init_convert_optab (fractuns_optab, UNSIGNED_FRACT_CONVERT);
6364 init_convert_optab (satfract_optab, SAT_FRACT);
6365 init_convert_optab (satfractuns_optab, UNSIGNED_SAT_FRACT);
6367 for (i = 0; i < NUM_MACHINE_MODES; i++)
6369 movmem_optab[i] = CODE_FOR_nothing;
6370 cmpstr_optab[i] = CODE_FOR_nothing;
6371 cmpstrn_optab[i] = CODE_FOR_nothing;
6372 cmpmem_optab[i] = CODE_FOR_nothing;
6373 setmem_optab[i] = CODE_FOR_nothing;
6375 sync_add_optab[i] = CODE_FOR_nothing;
6376 sync_sub_optab[i] = CODE_FOR_nothing;
6377 sync_ior_optab[i] = CODE_FOR_nothing;
6378 sync_and_optab[i] = CODE_FOR_nothing;
6379 sync_xor_optab[i] = CODE_FOR_nothing;
6380 sync_nand_optab[i] = CODE_FOR_nothing;
6381 sync_old_add_optab[i] = CODE_FOR_nothing;
6382 sync_old_sub_optab[i] = CODE_FOR_nothing;
6383 sync_old_ior_optab[i] = CODE_FOR_nothing;
6384 sync_old_and_optab[i] = CODE_FOR_nothing;
6385 sync_old_xor_optab[i] = CODE_FOR_nothing;
6386 sync_old_nand_optab[i] = CODE_FOR_nothing;
6387 sync_new_add_optab[i] = CODE_FOR_nothing;
6388 sync_new_sub_optab[i] = CODE_FOR_nothing;
6389 sync_new_ior_optab[i] = CODE_FOR_nothing;
6390 sync_new_and_optab[i] = CODE_FOR_nothing;
6391 sync_new_xor_optab[i] = CODE_FOR_nothing;
6392 sync_new_nand_optab[i] = CODE_FOR_nothing;
6393 sync_compare_and_swap[i] = CODE_FOR_nothing;
6394 sync_lock_test_and_set[i] = CODE_FOR_nothing;
6395 sync_lock_release[i] = CODE_FOR_nothing;
6397 reload_in_optab[i] = reload_out_optab[i] = CODE_FOR_nothing;
6400 /* Fill in the optabs with the insns we support. */
6403 /* Initialize the optabs with the names of the library functions. */
6404 add_optab->libcall_basename = "add";
6405 add_optab->libcall_suffix = '3';
6406 add_optab->libcall_gen = gen_int_fp_fixed_libfunc;
6407 addv_optab->libcall_basename = "add";
6408 addv_optab->libcall_suffix = '3';
6409 addv_optab->libcall_gen = gen_intv_fp_libfunc;
6410 ssadd_optab->libcall_basename = "ssadd";
6411 ssadd_optab->libcall_suffix = '3';
6412 ssadd_optab->libcall_gen = gen_signed_fixed_libfunc;
6413 usadd_optab->libcall_basename = "usadd";
6414 usadd_optab->libcall_suffix = '3';
6415 usadd_optab->libcall_gen = gen_unsigned_fixed_libfunc;
6416 sub_optab->libcall_basename = "sub";
6417 sub_optab->libcall_suffix = '3';
6418 sub_optab->libcall_gen = gen_int_fp_fixed_libfunc;
6419 subv_optab->libcall_basename = "sub";
6420 subv_optab->libcall_suffix = '3';
6421 subv_optab->libcall_gen = gen_intv_fp_libfunc;
6422 sssub_optab->libcall_basename = "sssub";
6423 sssub_optab->libcall_suffix = '3';
6424 sssub_optab->libcall_gen = gen_signed_fixed_libfunc;
6425 ussub_optab->libcall_basename = "ussub";
6426 ussub_optab->libcall_suffix = '3';
6427 ussub_optab->libcall_gen = gen_unsigned_fixed_libfunc;
6428 smul_optab->libcall_basename = "mul";
6429 smul_optab->libcall_suffix = '3';
6430 smul_optab->libcall_gen = gen_int_fp_fixed_libfunc;
6431 smulv_optab->libcall_basename = "mul";
6432 smulv_optab->libcall_suffix = '3';
6433 smulv_optab->libcall_gen = gen_intv_fp_libfunc;
6434 ssmul_optab->libcall_basename = "ssmul";
6435 ssmul_optab->libcall_suffix = '3';
6436 ssmul_optab->libcall_gen = gen_signed_fixed_libfunc;
6437 usmul_optab->libcall_basename = "usmul";
6438 usmul_optab->libcall_suffix = '3';
6439 usmul_optab->libcall_gen = gen_unsigned_fixed_libfunc;
6440 sdiv_optab->libcall_basename = "div";
6441 sdiv_optab->libcall_suffix = '3';
6442 sdiv_optab->libcall_gen = gen_int_fp_signed_fixed_libfunc;
6443 sdivv_optab->libcall_basename = "divv";
6444 sdivv_optab->libcall_suffix = '3';
6445 sdivv_optab->libcall_gen = gen_int_libfunc;
6446 ssdiv_optab->libcall_basename = "ssdiv";
6447 ssdiv_optab->libcall_suffix = '3';
6448 ssdiv_optab->libcall_gen = gen_signed_fixed_libfunc;
6449 udiv_optab->libcall_basename = "udiv";
6450 udiv_optab->libcall_suffix = '3';
6451 udiv_optab->libcall_gen = gen_int_unsigned_fixed_libfunc;
6452 usdiv_optab->libcall_basename = "usdiv";
6453 usdiv_optab->libcall_suffix = '3';
6454 usdiv_optab->libcall_gen = gen_unsigned_fixed_libfunc;
6455 sdivmod_optab->libcall_basename = "divmod";
6456 sdivmod_optab->libcall_suffix = '4';
6457 sdivmod_optab->libcall_gen = gen_int_libfunc;
6458 udivmod_optab->libcall_basename = "udivmod";
6459 udivmod_optab->libcall_suffix = '4';
6460 udivmod_optab->libcall_gen = gen_int_libfunc;
6461 smod_optab->libcall_basename = "mod";
6462 smod_optab->libcall_suffix = '3';
6463 smod_optab->libcall_gen = gen_int_libfunc;
6464 umod_optab->libcall_basename = "umod";
6465 umod_optab->libcall_suffix = '3';
6466 umod_optab->libcall_gen = gen_int_libfunc;
6467 ftrunc_optab->libcall_basename = "ftrunc";
6468 ftrunc_optab->libcall_suffix = '2';
6469 ftrunc_optab->libcall_gen = gen_fp_libfunc;
6470 and_optab->libcall_basename = "and";
6471 and_optab->libcall_suffix = '3';
6472 and_optab->libcall_gen = gen_int_libfunc;
6473 ior_optab->libcall_basename = "ior";
6474 ior_optab->libcall_suffix = '3';
6475 ior_optab->libcall_gen = gen_int_libfunc;
6476 xor_optab->libcall_basename = "xor";
6477 xor_optab->libcall_suffix = '3';
6478 xor_optab->libcall_gen = gen_int_libfunc;
6479 ashl_optab->libcall_basename = "ashl";
6480 ashl_optab->libcall_suffix = '3';
6481 ashl_optab->libcall_gen = gen_int_fixed_libfunc;
6482 ssashl_optab->libcall_basename = "ssashl";
6483 ssashl_optab->libcall_suffix = '3';
6484 ssashl_optab->libcall_gen = gen_signed_fixed_libfunc;
6485 usashl_optab->libcall_basename = "usashl";
6486 usashl_optab->libcall_suffix = '3';
6487 usashl_optab->libcall_gen = gen_unsigned_fixed_libfunc;
6488 ashr_optab->libcall_basename = "ashr";
6489 ashr_optab->libcall_suffix = '3';
6490 ashr_optab->libcall_gen = gen_int_signed_fixed_libfunc;
6491 lshr_optab->libcall_basename = "lshr";
6492 lshr_optab->libcall_suffix = '3';
6493 lshr_optab->libcall_gen = gen_int_unsigned_fixed_libfunc;
6494 smin_optab->libcall_basename = "min";
6495 smin_optab->libcall_suffix = '3';
6496 smin_optab->libcall_gen = gen_int_fp_libfunc;
6497 smax_optab->libcall_basename = "max";
6498 smax_optab->libcall_suffix = '3';
6499 smax_optab->libcall_gen = gen_int_fp_libfunc;
6500 umin_optab->libcall_basename = "umin";
6501 umin_optab->libcall_suffix = '3';
6502 umin_optab->libcall_gen = gen_int_libfunc;
6503 umax_optab->libcall_basename = "umax";
6504 umax_optab->libcall_suffix = '3';
6505 umax_optab->libcall_gen = gen_int_libfunc;
6506 neg_optab->libcall_basename = "neg";
6507 neg_optab->libcall_suffix = '2';
6508 neg_optab->libcall_gen = gen_int_fp_fixed_libfunc;
6509 ssneg_optab->libcall_basename = "ssneg";
6510 ssneg_optab->libcall_suffix = '2';
6511 ssneg_optab->libcall_gen = gen_signed_fixed_libfunc;
6512 usneg_optab->libcall_basename = "usneg";
6513 usneg_optab->libcall_suffix = '2';
6514 usneg_optab->libcall_gen = gen_unsigned_fixed_libfunc;
6515 negv_optab->libcall_basename = "neg";
6516 negv_optab->libcall_suffix = '2';
6517 negv_optab->libcall_gen = gen_intv_fp_libfunc;
6518 one_cmpl_optab->libcall_basename = "one_cmpl";
6519 one_cmpl_optab->libcall_suffix = '2';
6520 one_cmpl_optab->libcall_gen = gen_int_libfunc;
6521 ffs_optab->libcall_basename = "ffs";
6522 ffs_optab->libcall_suffix = '2';
6523 ffs_optab->libcall_gen = gen_int_libfunc;
6524 clz_optab->libcall_basename = "clz";
6525 clz_optab->libcall_suffix = '2';
6526 clz_optab->libcall_gen = gen_int_libfunc;
6527 ctz_optab->libcall_basename = "ctz";
6528 ctz_optab->libcall_suffix = '2';
6529 ctz_optab->libcall_gen = gen_int_libfunc;
6530 popcount_optab->libcall_basename = "popcount";
6531 popcount_optab->libcall_suffix = '2';
6532 popcount_optab->libcall_gen = gen_int_libfunc;
6533 parity_optab->libcall_basename = "parity";
6534 parity_optab->libcall_suffix = '2';
6535 parity_optab->libcall_gen = gen_int_libfunc;
6537 /* Comparison libcalls for integers MUST come in pairs,
6539 cmp_optab->libcall_basename = "cmp";
6540 cmp_optab->libcall_suffix = '2';
6541 cmp_optab->libcall_gen = gen_int_fp_fixed_libfunc;
6542 ucmp_optab->libcall_basename = "ucmp";
6543 ucmp_optab->libcall_suffix = '2';
6544 ucmp_optab->libcall_gen = gen_int_libfunc;
6546 /* EQ etc are floating point only. */
6547 eq_optab->libcall_basename = "eq";
6548 eq_optab->libcall_suffix = '2';
6549 eq_optab->libcall_gen = gen_fp_libfunc;
6550 ne_optab->libcall_basename = "ne";
6551 ne_optab->libcall_suffix = '2';
6552 ne_optab->libcall_gen = gen_fp_libfunc;
6553 gt_optab->libcall_basename = "gt";
6554 gt_optab->libcall_suffix = '2';
6555 gt_optab->libcall_gen = gen_fp_libfunc;
6556 ge_optab->libcall_basename = "ge";
6557 ge_optab->libcall_suffix = '2';
6558 ge_optab->libcall_gen = gen_fp_libfunc;
6559 lt_optab->libcall_basename = "lt";
6560 lt_optab->libcall_suffix = '2';
6561 lt_optab->libcall_gen = gen_fp_libfunc;
6562 le_optab->libcall_basename = "le";
6563 le_optab->libcall_suffix = '2';
6564 le_optab->libcall_gen = gen_fp_libfunc;
6565 unord_optab->libcall_basename = "unord";
6566 unord_optab->libcall_suffix = '2';
6567 unord_optab->libcall_gen = gen_fp_libfunc;
6569 powi_optab->libcall_basename = "powi";
6570 powi_optab->libcall_suffix = '2';
6571 powi_optab->libcall_gen = gen_fp_libfunc;
6574 sfloat_optab->libcall_basename = "float";
6575 sfloat_optab->libcall_gen = gen_int_to_fp_conv_libfunc;
6576 ufloat_optab->libcall_gen = gen_ufloat_conv_libfunc;
6577 sfix_optab->libcall_basename = "fix";
6578 sfix_optab->libcall_gen = gen_fp_to_int_conv_libfunc;
6579 ufix_optab->libcall_basename = "fixuns";
6580 ufix_optab->libcall_gen = gen_fp_to_int_conv_libfunc;
6581 lrint_optab->libcall_basename = "lrint";
6582 lrint_optab->libcall_gen = gen_int_to_fp_nondecimal_conv_libfunc;
6583 lround_optab->libcall_basename = "lround";
6584 lround_optab->libcall_gen = gen_int_to_fp_nondecimal_conv_libfunc;
6585 lfloor_optab->libcall_basename = "lfloor";
6586 lfloor_optab->libcall_gen = gen_int_to_fp_nondecimal_conv_libfunc;
6587 lceil_optab->libcall_basename = "lceil";
6588 lceil_optab->libcall_gen = gen_int_to_fp_nondecimal_conv_libfunc;
6590 /* trunc_optab is also used for FLOAT_EXTEND. */
6591 sext_optab->libcall_basename = "extend";
6592 sext_optab->libcall_gen = gen_extend_conv_libfunc;
6593 trunc_optab->libcall_basename = "trunc";
6594 trunc_optab->libcall_gen = gen_trunc_conv_libfunc;
6596 /* Conversions for fixed-point modes and other modes. */
6597 fract_optab->libcall_basename = "fract";
6598 fract_optab->libcall_gen = gen_fract_conv_libfunc;
6599 satfract_optab->libcall_basename = "satfract";
6600 satfract_optab->libcall_gen = gen_satfract_conv_libfunc;
6601 fractuns_optab->libcall_basename = "fractuns";
6602 fractuns_optab->libcall_gen = gen_fractuns_conv_libfunc;
6603 satfractuns_optab->libcall_basename = "satfractuns";
6604 satfractuns_optab->libcall_gen = gen_satfractuns_conv_libfunc;
6606 /* The ffs function operates on `int'. Fall back on it if we do not
6607 have a libgcc2 function for that width. */
6608 if (INT_TYPE_SIZE < BITS_PER_WORD)
6610 int_mode = mode_for_size (INT_TYPE_SIZE, MODE_INT, 0);
6611 set_optab_libfunc (ffs_optab, mode_for_size (INT_TYPE_SIZE, MODE_INT, 0),
6615 /* Explicitly initialize the bswap libfuncs since we need them to be
6616 valid for things other than word_mode. */
6617 set_optab_libfunc (bswap_optab, SImode, "__bswapsi2");
6618 set_optab_libfunc (bswap_optab, DImode, "__bswapdi2");
6620 /* Use cabs for double complex abs, since systems generally have cabs.
6621 Don't define any libcall for float complex, so that cabs will be used. */
6622 if (complex_double_type_node)
6623 set_optab_libfunc (abs_optab, TYPE_MODE (complex_double_type_node), "cabs");
6625 abort_libfunc = init_one_libfunc ("abort");
6626 memcpy_libfunc = init_one_libfunc ("memcpy");
6627 memmove_libfunc = init_one_libfunc ("memmove");
6628 memcmp_libfunc = init_one_libfunc ("memcmp");
6629 memset_libfunc = init_one_libfunc ("memset");
6630 setbits_libfunc = init_one_libfunc ("__setbits");
6632 #ifndef DONT_USE_BUILTIN_SETJMP
6633 setjmp_libfunc = init_one_libfunc ("__builtin_setjmp");
6634 longjmp_libfunc = init_one_libfunc ("__builtin_longjmp");
6636 setjmp_libfunc = init_one_libfunc ("setjmp");
6637 longjmp_libfunc = init_one_libfunc ("longjmp");
6639 unwind_sjlj_register_libfunc = init_one_libfunc ("_Unwind_SjLj_Register");
6640 unwind_sjlj_unregister_libfunc
6641 = init_one_libfunc ("_Unwind_SjLj_Unregister");
6643 /* For function entry/exit instrumentation. */
6644 profile_function_entry_libfunc
6645 = init_one_libfunc ("__cyg_profile_func_enter");
6646 profile_function_exit_libfunc
6647 = init_one_libfunc ("__cyg_profile_func_exit");
6649 gcov_flush_libfunc = init_one_libfunc ("__gcov_flush");
6651 if (HAVE_conditional_trap)
6652 trap_rtx = gen_rtx_fmt_ee (EQ, VOIDmode, NULL_RTX, NULL_RTX);
6654 /* Allow the target to add more libcalls or rename some, etc. */
6655 targetm.init_libfuncs ();
6660 /* Print information about the current contents of the optabs on
6664 debug_optab_libfuncs (void)
6670 /* Dump the arithmetic optabs. */
6671 for (i = 0; i != (int) OTI_MAX; i++)
6672 for (j = 0; j < NUM_MACHINE_MODES; ++j)
6677 o = &optab_table[i];
6678 l = optab_libfunc (o, (enum machine_mode) j);
6681 gcc_assert (GET_CODE (l) == SYMBOL_REF);
6682 fprintf (stderr, "%s\t%s:\t%s\n",
6683 GET_RTX_NAME (o->code),
6689 /* Dump the conversion optabs. */
6690 for (i = 0; i < (int) COI_MAX; ++i)
6691 for (j = 0; j < NUM_MACHINE_MODES; ++j)
6692 for (k = 0; k < NUM_MACHINE_MODES; ++k)
6697 o = &convert_optab_table[i];
6698 l = convert_optab_libfunc (o, (enum machine_mode) j,
6699 (enum machine_mode) k);
6702 gcc_assert (GET_CODE (l) == SYMBOL_REF);
6703 fprintf (stderr, "%s\t%s\t%s:\t%s\n",
6704 GET_RTX_NAME (o->code),
6713 /* Generate insns to trap with code TCODE if OP1 and OP2 satisfy condition
6714 CODE. Return 0 on failure. */
6717 gen_cond_trap (enum rtx_code code ATTRIBUTE_UNUSED, rtx op1,
6718 rtx op2 ATTRIBUTE_UNUSED, rtx tcode ATTRIBUTE_UNUSED)
6720 enum machine_mode mode = GET_MODE (op1);
6721 enum insn_code icode;
6724 if (!HAVE_conditional_trap)
6727 if (mode == VOIDmode)
6730 icode = optab_handler (cmp_optab, mode)->insn_code;
6731 if (icode == CODE_FOR_nothing)
6735 op1 = prepare_operand (icode, op1, 0, mode, mode, 0);
6736 op2 = prepare_operand (icode, op2, 1, mode, mode, 0);
6742 emit_insn (GEN_FCN (icode) (op1, op2));
6744 PUT_CODE (trap_rtx, code);
6745 gcc_assert (HAVE_conditional_trap);
6746 insn = gen_conditional_trap (trap_rtx, tcode);
6750 insn = get_insns ();
6757 /* Return rtx code for TCODE. Use UNSIGNEDP to select signed
6758 or unsigned operation code. */
6760 static enum rtx_code
6761 get_rtx_code (enum tree_code tcode, bool unsignedp)
6773 code = unsignedp ? LTU : LT;
6776 code = unsignedp ? LEU : LE;
6779 code = unsignedp ? GTU : GT;
6782 code = unsignedp ? GEU : GE;
6785 case UNORDERED_EXPR:
6816 /* Return comparison rtx for COND. Use UNSIGNEDP to select signed or
6817 unsigned operators. Do not generate compare instruction. */
6820 vector_compare_rtx (tree cond, bool unsignedp, enum insn_code icode)
6822 enum rtx_code rcode;
6824 rtx rtx_op0, rtx_op1;
6826 /* This is unlikely. While generating VEC_COND_EXPR, auto vectorizer
6827 ensures that condition is a relational operation. */
6828 gcc_assert (COMPARISON_CLASS_P (cond));
6830 rcode = get_rtx_code (TREE_CODE (cond), unsignedp);
6831 t_op0 = TREE_OPERAND (cond, 0);
6832 t_op1 = TREE_OPERAND (cond, 1);
6834 /* Expand operands. */
6835 rtx_op0 = expand_expr (t_op0, NULL_RTX, TYPE_MODE (TREE_TYPE (t_op0)),
6837 rtx_op1 = expand_expr (t_op1, NULL_RTX, TYPE_MODE (TREE_TYPE (t_op1)),
6840 if (!insn_data[icode].operand[4].predicate (rtx_op0, GET_MODE (rtx_op0))
6841 && GET_MODE (rtx_op0) != VOIDmode)
6842 rtx_op0 = force_reg (GET_MODE (rtx_op0), rtx_op0);
6844 if (!insn_data[icode].operand[5].predicate (rtx_op1, GET_MODE (rtx_op1))
6845 && GET_MODE (rtx_op1) != VOIDmode)
6846 rtx_op1 = force_reg (GET_MODE (rtx_op1), rtx_op1);
6848 return gen_rtx_fmt_ee (rcode, VOIDmode, rtx_op0, rtx_op1);
6851 /* Return insn code for VEC_COND_EXPR EXPR. */
6853 static inline enum insn_code
6854 get_vcond_icode (tree expr, enum machine_mode mode)
6856 enum insn_code icode = CODE_FOR_nothing;
6858 if (TYPE_UNSIGNED (TREE_TYPE (expr)))
6859 icode = vcondu_gen_code[mode];
6861 icode = vcond_gen_code[mode];
6865 /* Return TRUE iff, appropriate vector insns are available
6866 for vector cond expr expr in VMODE mode. */
6869 expand_vec_cond_expr_p (tree expr, enum machine_mode vmode)
6871 if (get_vcond_icode (expr, vmode) == CODE_FOR_nothing)
6876 /* Generate insns for VEC_COND_EXPR. */
6879 expand_vec_cond_expr (tree vec_cond_expr, rtx target)
6881 enum insn_code icode;
6882 rtx comparison, rtx_op1, rtx_op2, cc_op0, cc_op1;
6883 enum machine_mode mode = TYPE_MODE (TREE_TYPE (vec_cond_expr));
6884 bool unsignedp = TYPE_UNSIGNED (TREE_TYPE (vec_cond_expr));
6886 icode = get_vcond_icode (vec_cond_expr, mode);
6887 if (icode == CODE_FOR_nothing)
6890 if (!target || !insn_data[icode].operand[0].predicate (target, mode))
6891 target = gen_reg_rtx (mode);
6893 /* Get comparison rtx. First expand both cond expr operands. */
6894 comparison = vector_compare_rtx (TREE_OPERAND (vec_cond_expr, 0),
6896 cc_op0 = XEXP (comparison, 0);
6897 cc_op1 = XEXP (comparison, 1);
6898 /* Expand both operands and force them in reg, if required. */
6899 rtx_op1 = expand_normal (TREE_OPERAND (vec_cond_expr, 1));
6900 if (!insn_data[icode].operand[1].predicate (rtx_op1, mode)
6901 && mode != VOIDmode)
6902 rtx_op1 = force_reg (mode, rtx_op1);
6904 rtx_op2 = expand_normal (TREE_OPERAND (vec_cond_expr, 2));
6905 if (!insn_data[icode].operand[2].predicate (rtx_op2, mode)
6906 && mode != VOIDmode)
6907 rtx_op2 = force_reg (mode, rtx_op2);
6909 /* Emit instruction! */
6910 emit_insn (GEN_FCN (icode) (target, rtx_op1, rtx_op2,
6911 comparison, cc_op0, cc_op1));
6917 /* This is an internal subroutine of the other compare_and_swap expanders.
6918 MEM, OLD_VAL and NEW_VAL are as you'd expect for a compare-and-swap
6919 operation. TARGET is an optional place to store the value result of
6920 the operation. ICODE is the particular instruction to expand. Return
6921 the result of the operation. */
6924 expand_val_compare_and_swap_1 (rtx mem, rtx old_val, rtx new_val,
6925 rtx target, enum insn_code icode)
6927 enum machine_mode mode = GET_MODE (mem);
6930 if (!target || !insn_data[icode].operand[0].predicate (target, mode))
6931 target = gen_reg_rtx (mode);
6933 if (GET_MODE (old_val) != VOIDmode && GET_MODE (old_val) != mode)
6934 old_val = convert_modes (mode, GET_MODE (old_val), old_val, 1);
6935 if (!insn_data[icode].operand[2].predicate (old_val, mode))
6936 old_val = force_reg (mode, old_val);
6938 if (GET_MODE (new_val) != VOIDmode && GET_MODE (new_val) != mode)
6939 new_val = convert_modes (mode, GET_MODE (new_val), new_val, 1);
6940 if (!insn_data[icode].operand[3].predicate (new_val, mode))
6941 new_val = force_reg (mode, new_val);
6943 insn = GEN_FCN (icode) (target, mem, old_val, new_val);
6944 if (insn == NULL_RTX)
6951 /* Expand a compare-and-swap operation and return its value. */
6954 expand_val_compare_and_swap (rtx mem, rtx old_val, rtx new_val, rtx target)
6956 enum machine_mode mode = GET_MODE (mem);
6957 enum insn_code icode = sync_compare_and_swap[mode];
6959 if (icode == CODE_FOR_nothing)
6962 return expand_val_compare_and_swap_1 (mem, old_val, new_val, target, icode);
6965 /* Helper function to find the MODE_CC set in a sync_compare_and_swap
6969 find_cc_set (rtx x, const_rtx pat, void *data)
6971 if (REG_P (x) && GET_MODE_CLASS (GET_MODE (x)) == MODE_CC
6972 && GET_CODE (pat) == SET)
6974 rtx *p_cc_reg = (rtx *) data;
6975 gcc_assert (!*p_cc_reg);
6980 /* Expand a compare-and-swap operation and store true into the result if
6981 the operation was successful and false otherwise. Return the result.
6982 Unlike other routines, TARGET is not optional. */
6985 expand_bool_compare_and_swap (rtx mem, rtx old_val, rtx new_val, rtx target)
6987 enum machine_mode mode = GET_MODE (mem);
6988 enum insn_code icode;
6989 rtx subtarget, seq, cc_reg;
6991 /* If the target supports a compare-and-swap pattern that simultaneously
6992 sets some flag for success, then use it. Otherwise use the regular
6993 compare-and-swap and follow that immediately with a compare insn. */
6994 icode = sync_compare_and_swap[mode];
6995 if (icode == CODE_FOR_nothing)
7001 subtarget = expand_val_compare_and_swap_1 (mem, old_val, new_val,
7004 if (subtarget == NULL_RTX)
7010 if (have_insn_for (COMPARE, CCmode))
7011 note_stores (PATTERN (get_last_insn ()), find_cc_set, &cc_reg);
7015 /* We might be comparing against an old value. Try again. :-( */
7016 if (!cc_reg && MEM_P (old_val))
7019 old_val = force_reg (mode, old_val);
7026 return emit_store_flag (target, EQ, cc_reg, const0_rtx, VOIDmode, 0, 1);
7028 return emit_store_flag (target, EQ, subtarget, old_val, VOIDmode, 1, 1);
7031 /* This is a helper function for the other atomic operations. This function
7032 emits a loop that contains SEQ that iterates until a compare-and-swap
7033 operation at the end succeeds. MEM is the memory to be modified. SEQ is
7034 a set of instructions that takes a value from OLD_REG as an input and
7035 produces a value in NEW_REG as an output. Before SEQ, OLD_REG will be
7036 set to the current contents of MEM. After SEQ, a compare-and-swap will
7037 attempt to update MEM with NEW_REG. The function returns true when the
7038 loop was generated successfully. */
7041 expand_compare_and_swap_loop (rtx mem, rtx old_reg, rtx new_reg, rtx seq)
7043 enum machine_mode mode = GET_MODE (mem);
7044 enum insn_code icode;
7045 rtx label, cmp_reg, subtarget, cc_reg;
7047 /* The loop we want to generate looks like
7053 cmp_reg = compare-and-swap(mem, old_reg, new_reg)
7054 if (cmp_reg != old_reg)
7057 Note that we only do the plain load from memory once. Subsequent
7058 iterations use the value loaded by the compare-and-swap pattern. */
7060 label = gen_label_rtx ();
7061 cmp_reg = gen_reg_rtx (mode);
7063 emit_move_insn (cmp_reg, mem);
7065 emit_move_insn (old_reg, cmp_reg);
7069 /* If the target supports a compare-and-swap pattern that simultaneously
7070 sets some flag for success, then use it. Otherwise use the regular
7071 compare-and-swap and follow that immediately with a compare insn. */
7072 icode = sync_compare_and_swap[mode];
7073 if (icode == CODE_FOR_nothing)
7076 subtarget = expand_val_compare_and_swap_1 (mem, old_reg, new_reg,
7078 if (subtarget == NULL_RTX)
7082 if (have_insn_for (COMPARE, CCmode))
7083 note_stores (PATTERN (get_last_insn ()), find_cc_set, &cc_reg);
7087 old_reg = const0_rtx;
7091 if (subtarget != cmp_reg)
7092 emit_move_insn (cmp_reg, subtarget);
7095 /* ??? Mark this jump predicted not taken? */
7096 emit_cmp_and_jump_insns (cmp_reg, old_reg, NE, const0_rtx, GET_MODE (cmp_reg), 1,
7101 /* This function generates the atomic operation MEM CODE= VAL. In this
7102 case, we do not care about any resulting value. Returns NULL if we
7103 cannot generate the operation. */
7106 expand_sync_operation (rtx mem, rtx val, enum rtx_code code)
7108 enum machine_mode mode = GET_MODE (mem);
7109 enum insn_code icode;
7112 /* Look to see if the target supports the operation directly. */
7116 icode = sync_add_optab[mode];
7119 icode = sync_ior_optab[mode];
7122 icode = sync_xor_optab[mode];
7125 icode = sync_and_optab[mode];
7128 icode = sync_nand_optab[mode];
7132 icode = sync_sub_optab[mode];
7133 if (icode == CODE_FOR_nothing || CONST_INT_P (val))
7135 icode = sync_add_optab[mode];
7136 if (icode != CODE_FOR_nothing)
7138 val = expand_simple_unop (mode, NEG, val, NULL_RTX, 1);
7148 /* Generate the direct operation, if present. */
7149 if (icode != CODE_FOR_nothing)
7151 if (GET_MODE (val) != VOIDmode && GET_MODE (val) != mode)
7152 val = convert_modes (mode, GET_MODE (val), val, 1);
7153 if (!insn_data[icode].operand[1].predicate (val, mode))
7154 val = force_reg (mode, val);
7156 insn = GEN_FCN (icode) (mem, val);
7164 /* Failing that, generate a compare-and-swap loop in which we perform the
7165 operation with normal arithmetic instructions. */
7166 if (sync_compare_and_swap[mode] != CODE_FOR_nothing)
7168 rtx t0 = gen_reg_rtx (mode), t1;
7175 t1 = expand_simple_binop (mode, AND, t1, val, NULL_RTX,
7176 true, OPTAB_LIB_WIDEN);
7177 t1 = expand_simple_unop (mode, code, t1, NULL_RTX, true);
7180 t1 = expand_simple_binop (mode, code, t1, val, NULL_RTX,
7181 true, OPTAB_LIB_WIDEN);
7182 insn = get_insns ();
7185 if (t1 != NULL && expand_compare_and_swap_loop (mem, t0, t1, insn))
7192 /* This function generates the atomic operation MEM CODE= VAL. In this
7193 case, we do care about the resulting value: if AFTER is true then
7194 return the value MEM holds after the operation, if AFTER is false
7195 then return the value MEM holds before the operation. TARGET is an
7196 optional place for the result value to be stored. */
7199 expand_sync_fetch_operation (rtx mem, rtx val, enum rtx_code code,
7200 bool after, rtx target)
7202 enum machine_mode mode = GET_MODE (mem);
7203 enum insn_code old_code, new_code, icode;
7207 /* Look to see if the target supports the operation directly. */
7211 old_code = sync_old_add_optab[mode];
7212 new_code = sync_new_add_optab[mode];
7215 old_code = sync_old_ior_optab[mode];
7216 new_code = sync_new_ior_optab[mode];
7219 old_code = sync_old_xor_optab[mode];
7220 new_code = sync_new_xor_optab[mode];
7223 old_code = sync_old_and_optab[mode];
7224 new_code = sync_new_and_optab[mode];
7227 old_code = sync_old_nand_optab[mode];
7228 new_code = sync_new_nand_optab[mode];
7232 old_code = sync_old_sub_optab[mode];
7233 new_code = sync_new_sub_optab[mode];
7234 if ((old_code == CODE_FOR_nothing && new_code == CODE_FOR_nothing)
7235 || CONST_INT_P (val))
7237 old_code = sync_old_add_optab[mode];
7238 new_code = sync_new_add_optab[mode];
7239 if (old_code != CODE_FOR_nothing || new_code != CODE_FOR_nothing)
7241 val = expand_simple_unop (mode, NEG, val, NULL_RTX, 1);
7251 /* If the target does supports the proper new/old operation, great. But
7252 if we only support the opposite old/new operation, check to see if we
7253 can compensate. In the case in which the old value is supported, then
7254 we can always perform the operation again with normal arithmetic. In
7255 the case in which the new value is supported, then we can only handle
7256 this in the case the operation is reversible. */
7261 if (icode == CODE_FOR_nothing)
7264 if (icode != CODE_FOR_nothing)
7271 if (icode == CODE_FOR_nothing
7272 && (code == PLUS || code == MINUS || code == XOR))
7275 if (icode != CODE_FOR_nothing)
7280 /* If we found something supported, great. */
7281 if (icode != CODE_FOR_nothing)
7283 if (!target || !insn_data[icode].operand[0].predicate (target, mode))
7284 target = gen_reg_rtx (mode);
7286 if (GET_MODE (val) != VOIDmode && GET_MODE (val) != mode)
7287 val = convert_modes (mode, GET_MODE (val), val, 1);
7288 if (!insn_data[icode].operand[2].predicate (val, mode))
7289 val = force_reg (mode, val);
7291 insn = GEN_FCN (icode) (target, mem, val);
7296 /* If we need to compensate for using an operation with the
7297 wrong return value, do so now. */
7304 else if (code == MINUS)
7310 target = expand_simple_binop (mode, AND, target, val,
7313 target = expand_simple_unop (mode, code, target,
7317 target = expand_simple_binop (mode, code, target, val,
7326 /* Failing that, generate a compare-and-swap loop in which we perform the
7327 operation with normal arithmetic instructions. */
7328 if (sync_compare_and_swap[mode] != CODE_FOR_nothing)
7330 rtx t0 = gen_reg_rtx (mode), t1;
7332 if (!target || !register_operand (target, mode))
7333 target = gen_reg_rtx (mode);
7338 emit_move_insn (target, t0);
7342 t1 = expand_simple_binop (mode, AND, t1, val, NULL_RTX,
7343 true, OPTAB_LIB_WIDEN);
7344 t1 = expand_simple_unop (mode, code, t1, NULL_RTX, true);
7347 t1 = expand_simple_binop (mode, code, t1, val, NULL_RTX,
7348 true, OPTAB_LIB_WIDEN);
7350 emit_move_insn (target, t1);
7352 insn = get_insns ();
7355 if (t1 != NULL && expand_compare_and_swap_loop (mem, t0, t1, insn))
7362 /* This function expands a test-and-set operation. Ideally we atomically
7363 store VAL in MEM and return the previous value in MEM. Some targets
7364 may not support this operation and only support VAL with the constant 1;
7365 in this case while the return value will be 0/1, but the exact value
7366 stored in MEM is target defined. TARGET is an option place to stick
7367 the return value. */
7370 expand_sync_lock_test_and_set (rtx mem, rtx val, rtx target)
7372 enum machine_mode mode = GET_MODE (mem);
7373 enum insn_code icode;
7376 /* If the target supports the test-and-set directly, great. */
7377 icode = sync_lock_test_and_set[mode];
7378 if (icode != CODE_FOR_nothing)
7380 if (!target || !insn_data[icode].operand[0].predicate (target, mode))
7381 target = gen_reg_rtx (mode);
7383 if (GET_MODE (val) != VOIDmode && GET_MODE (val) != mode)
7384 val = convert_modes (mode, GET_MODE (val), val, 1);
7385 if (!insn_data[icode].operand[2].predicate (val, mode))
7386 val = force_reg (mode, val);
7388 insn = GEN_FCN (icode) (target, mem, val);
7396 /* Otherwise, use a compare-and-swap loop for the exchange. */
7397 if (sync_compare_and_swap[mode] != CODE_FOR_nothing)
7399 if (!target || !register_operand (target, mode))
7400 target = gen_reg_rtx (mode);
7401 if (GET_MODE (val) != VOIDmode && GET_MODE (val) != mode)
7402 val = convert_modes (mode, GET_MODE (val), val, 1);
7403 if (expand_compare_and_swap_loop (mem, target, val, NULL_RTX))
7410 #include "gt-optabs.h"