1 /* Expand the basic unary and binary arithmetic operations, for GNU compiler.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
25 #include "coretypes.h"
29 /* Include insn-config.h before expr.h so that HAVE_conditional_move
30 is properly defined. */
31 #include "insn-config.h"
45 #include "basic-block.h"
48 /* Each optab contains info on how this target machine
49 can perform a particular operation
50 for all sizes and kinds of operands.
52 The operation to be performed is often specified
53 by passing one of these optabs as an argument.
55 See expr.h for documentation of these optabs. */
57 #if GCC_VERSION >= 4000
58 __extension__ struct optab optab_table[OTI_MAX]
59 = { [0 ... OTI_MAX - 1].handlers[0 ... NUM_MACHINE_MODES - 1].insn_code
62 /* init_insn_codes will do runtime initialization otherwise. */
63 struct optab optab_table[OTI_MAX];
66 rtx libfunc_table[LTI_MAX];
68 /* Tables of patterns for converting one mode to another. */
69 #if GCC_VERSION >= 4000
70 __extension__ struct convert_optab convert_optab_table[COI_MAX]
71 = { [0 ... COI_MAX - 1].handlers[0 ... NUM_MACHINE_MODES - 1]
72 [0 ... NUM_MACHINE_MODES - 1].insn_code
75 /* init_convert_optab will do runtime initialization otherwise. */
76 struct convert_optab convert_optab_table[COI_MAX];
79 /* Contains the optab used for each rtx code. */
80 optab code_to_optab[NUM_RTX_CODE + 1];
82 /* Indexed by the rtx-code for a conditional (eg. EQ, LT,...)
83 gives the gen_function to make a branch to test that condition. */
85 rtxfun bcc_gen_fctn[NUM_RTX_CODE];
87 /* Indexed by the rtx-code for a conditional (eg. EQ, LT,...)
88 gives the insn code to make a store-condition insn
89 to test that condition. */
91 enum insn_code setcc_gen_code[NUM_RTX_CODE];
93 #ifdef HAVE_conditional_move
94 /* Indexed by the machine mode, gives the insn code to make a conditional
95 move insn. This is not indexed by the rtx-code like bcc_gen_fctn and
96 setcc_gen_code to cut down on the number of named patterns. Consider a day
97 when a lot more rtx codes are conditional (eg: for the ARM). */
99 enum insn_code movcc_gen_code[NUM_MACHINE_MODES];
102 /* Indexed by the machine mode, gives the insn code for vector conditional
105 enum insn_code vcond_gen_code[NUM_MACHINE_MODES];
106 enum insn_code vcondu_gen_code[NUM_MACHINE_MODES];
108 /* The insn generating function can not take an rtx_code argument.
109 TRAP_RTX is used as an rtx argument. Its code is replaced with
110 the code to be used in the trap insn and all other fields are ignored. */
111 static GTY(()) rtx trap_rtx;
113 static void prepare_float_lib_cmp (rtx *, rtx *, enum rtx_code *,
114 enum machine_mode *, int *);
115 static rtx expand_unop_direct (enum machine_mode, optab, rtx, rtx, int);
117 /* Debug facility for use in GDB. */
118 void debug_optab_libfuncs (void);
120 #ifndef HAVE_conditional_trap
121 #define HAVE_conditional_trap 0
122 #define gen_conditional_trap(a,b) (gcc_unreachable (), NULL_RTX)
125 /* Prefixes for the current version of decimal floating point (BID vs. DPD) */
126 #if ENABLE_DECIMAL_BID_FORMAT
127 #define DECIMAL_PREFIX "bid_"
129 #define DECIMAL_PREFIX "dpd_"
133 /* Info about libfunc. We use same hashtable for normal optabs and conversion
134 optab. In the first case mode2 is unused. */
135 struct libfunc_entry GTY(())
138 enum machine_mode mode1, mode2;
142 /* Hash table used to convert declarations into nodes. */
143 static GTY((param_is (struct libfunc_entry))) htab_t libfunc_hash;
145 /* Used for attribute_hash. */
148 hash_libfunc (const void *p)
150 const struct libfunc_entry *const e = (const struct libfunc_entry *) p;
152 return (((int) e->mode1 + (int) e->mode2 * NUM_MACHINE_MODES)
156 /* Used for optab_hash. */
159 eq_libfunc (const void *p, const void *q)
161 const struct libfunc_entry *const e1 = (const struct libfunc_entry *) p;
162 const struct libfunc_entry *const e2 = (const struct libfunc_entry *) q;
164 return (e1->optab == e2->optab
165 && e1->mode1 == e2->mode1
166 && e1->mode2 == e2->mode2);
169 /* Return libfunc corresponding operation defined by OPTAB converting
170 from MODE2 to MODE1. Trigger lazy initialization if needed, return NULL
171 if no libfunc is available. */
173 convert_optab_libfunc (convert_optab optab, enum machine_mode mode1,
174 enum machine_mode mode2)
176 struct libfunc_entry e;
177 struct libfunc_entry **slot;
179 e.optab = (size_t) (optab - &convert_optab_table[0]);
182 slot = (struct libfunc_entry **) htab_find_slot (libfunc_hash, &e, NO_INSERT);
185 if (optab->libcall_gen)
187 optab->libcall_gen (optab, optab->libcall_basename, mode1, mode2);
188 slot = (struct libfunc_entry **) htab_find_slot (libfunc_hash, &e, NO_INSERT);
190 return (*slot)->libfunc;
196 return (*slot)->libfunc;
199 /* Return libfunc corresponding operation defined by OPTAB in MODE.
200 Trigger lazy initialization if needed, return NULL if no libfunc is
203 optab_libfunc (optab optab, enum machine_mode mode)
205 struct libfunc_entry e;
206 struct libfunc_entry **slot;
208 e.optab = (size_t) (optab - &optab_table[0]);
211 slot = (struct libfunc_entry **) htab_find_slot (libfunc_hash, &e, NO_INSERT);
214 if (optab->libcall_gen)
216 optab->libcall_gen (optab, optab->libcall_basename,
217 optab->libcall_suffix, mode);
218 slot = (struct libfunc_entry **) htab_find_slot (libfunc_hash,
221 return (*slot)->libfunc;
227 return (*slot)->libfunc;
231 /* Add a REG_EQUAL note to the last insn in INSNS. TARGET is being set to
232 the result of operation CODE applied to OP0 (and OP1 if it is a binary
235 If the last insn does not set TARGET, don't do anything, but return 1.
237 If a previous insn sets TARGET and TARGET is one of OP0 or OP1,
238 don't add the REG_EQUAL note but return 0. Our caller can then try
239 again, ensuring that TARGET is not one of the operands. */
242 add_equal_note (rtx insns, rtx target, enum rtx_code code, rtx op0, rtx op1)
244 rtx last_insn, insn, set;
247 gcc_assert (insns && INSN_P (insns) && NEXT_INSN (insns));
249 if (GET_RTX_CLASS (code) != RTX_COMM_ARITH
250 && GET_RTX_CLASS (code) != RTX_BIN_ARITH
251 && GET_RTX_CLASS (code) != RTX_COMM_COMPARE
252 && GET_RTX_CLASS (code) != RTX_COMPARE
253 && GET_RTX_CLASS (code) != RTX_UNARY)
256 if (GET_CODE (target) == ZERO_EXTRACT)
259 for (last_insn = insns;
260 NEXT_INSN (last_insn) != NULL_RTX;
261 last_insn = NEXT_INSN (last_insn))
264 set = single_set (last_insn);
268 if (! rtx_equal_p (SET_DEST (set), target)
269 /* For a STRICT_LOW_PART, the REG_NOTE applies to what is inside it. */
270 && (GET_CODE (SET_DEST (set)) != STRICT_LOW_PART
271 || ! rtx_equal_p (XEXP (SET_DEST (set), 0), target)))
274 /* If TARGET is in OP0 or OP1, check if anything in SEQ sets TARGET
275 besides the last insn. */
276 if (reg_overlap_mentioned_p (target, op0)
277 || (op1 && reg_overlap_mentioned_p (target, op1)))
279 insn = PREV_INSN (last_insn);
280 while (insn != NULL_RTX)
282 if (reg_set_p (target, insn))
285 insn = PREV_INSN (insn);
289 if (GET_RTX_CLASS (code) == RTX_UNARY)
290 note = gen_rtx_fmt_e (code, GET_MODE (target), copy_rtx (op0));
292 note = gen_rtx_fmt_ee (code, GET_MODE (target), copy_rtx (op0), copy_rtx (op1));
294 set_unique_reg_note (last_insn, REG_EQUAL, note);
299 /* Widen OP to MODE and return the rtx for the widened operand. UNSIGNEDP
300 says whether OP is signed or unsigned. NO_EXTEND is nonzero if we need
301 not actually do a sign-extend or zero-extend, but can leave the
302 higher-order bits of the result rtx undefined, for example, in the case
303 of logical operations, but not right shifts. */
306 widen_operand (rtx op, enum machine_mode mode, enum machine_mode oldmode,
307 int unsignedp, int no_extend)
311 /* If we don't have to extend and this is a constant, return it. */
312 if (no_extend && GET_MODE (op) == VOIDmode)
315 /* If we must extend do so. If OP is a SUBREG for a promoted object, also
316 extend since it will be more efficient to do so unless the signedness of
317 a promoted object differs from our extension. */
319 || (GET_CODE (op) == SUBREG && SUBREG_PROMOTED_VAR_P (op)
320 && SUBREG_PROMOTED_UNSIGNED_P (op) == unsignedp))
321 return convert_modes (mode, oldmode, op, unsignedp);
323 /* If MODE is no wider than a single word, we return a paradoxical
325 if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD)
326 return gen_rtx_SUBREG (mode, force_reg (GET_MODE (op), op), 0);
328 /* Otherwise, get an object of MODE, clobber it, and set the low-order
331 result = gen_reg_rtx (mode);
332 emit_clobber (result);
333 emit_move_insn (gen_lowpart (GET_MODE (op), result), op);
337 /* Return the optab used for computing the operation given by the tree code,
338 CODE and the tree EXP. This function is not always usable (for example, it
339 cannot give complete results for multiplication or division) but probably
340 ought to be relied on more widely throughout the expander. */
342 optab_for_tree_code (enum tree_code code, const_tree type,
343 enum optab_subtype subtype)
355 return one_cmpl_optab;
364 return TYPE_UNSIGNED (type) ? umod_optab : smod_optab;
372 if (TYPE_SATURATING(type))
373 return TYPE_UNSIGNED(type) ? usdiv_optab : ssdiv_optab;
374 return TYPE_UNSIGNED (type) ? udiv_optab : sdiv_optab;
377 if (VECTOR_MODE_P (TYPE_MODE (type)))
379 if (subtype == optab_vector)
380 return TYPE_SATURATING (type) ? NULL : vashl_optab;
382 gcc_assert (subtype == optab_scalar);
384 if (TYPE_SATURATING(type))
385 return TYPE_UNSIGNED(type) ? usashl_optab : ssashl_optab;
389 if (VECTOR_MODE_P (TYPE_MODE (type)))
391 if (subtype == optab_vector)
392 return TYPE_UNSIGNED (type) ? vlshr_optab : vashr_optab;
394 gcc_assert (subtype == optab_scalar);
396 return TYPE_UNSIGNED (type) ? lshr_optab : ashr_optab;
399 if (VECTOR_MODE_P (TYPE_MODE (type)))
401 if (subtype == optab_vector)
404 gcc_assert (subtype == optab_scalar);
409 if (VECTOR_MODE_P (TYPE_MODE (type)))
411 if (subtype == optab_vector)
414 gcc_assert (subtype == optab_scalar);
419 return TYPE_UNSIGNED (type) ? umax_optab : smax_optab;
422 return TYPE_UNSIGNED (type) ? umin_optab : smin_optab;
424 case REALIGN_LOAD_EXPR:
425 return vec_realign_load_optab;
428 return TYPE_UNSIGNED (type) ? usum_widen_optab : ssum_widen_optab;
431 return TYPE_UNSIGNED (type) ? udot_prod_optab : sdot_prod_optab;
434 return TYPE_UNSIGNED (type) ? reduc_umax_optab : reduc_smax_optab;
437 return TYPE_UNSIGNED (type) ? reduc_umin_optab : reduc_smin_optab;
439 case REDUC_PLUS_EXPR:
440 return TYPE_UNSIGNED (type) ? reduc_uplus_optab : reduc_splus_optab;
442 case VEC_LSHIFT_EXPR:
443 return vec_shl_optab;
445 case VEC_RSHIFT_EXPR:
446 return vec_shr_optab;
448 case VEC_WIDEN_MULT_HI_EXPR:
449 return TYPE_UNSIGNED (type) ?
450 vec_widen_umult_hi_optab : vec_widen_smult_hi_optab;
452 case VEC_WIDEN_MULT_LO_EXPR:
453 return TYPE_UNSIGNED (type) ?
454 vec_widen_umult_lo_optab : vec_widen_smult_lo_optab;
456 case VEC_UNPACK_HI_EXPR:
457 return TYPE_UNSIGNED (type) ?
458 vec_unpacku_hi_optab : vec_unpacks_hi_optab;
460 case VEC_UNPACK_LO_EXPR:
461 return TYPE_UNSIGNED (type) ?
462 vec_unpacku_lo_optab : vec_unpacks_lo_optab;
464 case VEC_UNPACK_FLOAT_HI_EXPR:
465 /* The signedness is determined from input operand. */
466 return TYPE_UNSIGNED (type) ?
467 vec_unpacku_float_hi_optab : vec_unpacks_float_hi_optab;
469 case VEC_UNPACK_FLOAT_LO_EXPR:
470 /* The signedness is determined from input operand. */
471 return TYPE_UNSIGNED (type) ?
472 vec_unpacku_float_lo_optab : vec_unpacks_float_lo_optab;
474 case VEC_PACK_TRUNC_EXPR:
475 return vec_pack_trunc_optab;
477 case VEC_PACK_SAT_EXPR:
478 return TYPE_UNSIGNED (type) ? vec_pack_usat_optab : vec_pack_ssat_optab;
480 case VEC_PACK_FIX_TRUNC_EXPR:
481 /* The signedness is determined from output operand. */
482 return TYPE_UNSIGNED (type) ?
483 vec_pack_ufix_trunc_optab : vec_pack_sfix_trunc_optab;
489 trapv = INTEGRAL_TYPE_P (type) && TYPE_OVERFLOW_TRAPS (type);
492 case POINTER_PLUS_EXPR:
494 if (TYPE_SATURATING(type))
495 return TYPE_UNSIGNED(type) ? usadd_optab : ssadd_optab;
496 return trapv ? addv_optab : add_optab;
499 if (TYPE_SATURATING(type))
500 return TYPE_UNSIGNED(type) ? ussub_optab : sssub_optab;
501 return trapv ? subv_optab : sub_optab;
504 if (TYPE_SATURATING(type))
505 return TYPE_UNSIGNED(type) ? usmul_optab : ssmul_optab;
506 return trapv ? smulv_optab : smul_optab;
509 if (TYPE_SATURATING(type))
510 return TYPE_UNSIGNED(type) ? usneg_optab : ssneg_optab;
511 return trapv ? negv_optab : neg_optab;
514 return trapv ? absv_optab : abs_optab;
516 case VEC_EXTRACT_EVEN_EXPR:
517 return vec_extract_even_optab;
519 case VEC_EXTRACT_ODD_EXPR:
520 return vec_extract_odd_optab;
522 case VEC_INTERLEAVE_HIGH_EXPR:
523 return vec_interleave_high_optab;
525 case VEC_INTERLEAVE_LOW_EXPR:
526 return vec_interleave_low_optab;
534 /* Expand vector widening operations.
536 There are two different classes of operations handled here:
537 1) Operations whose result is wider than all the arguments to the operation.
538 Examples: VEC_UNPACK_HI/LO_EXPR, VEC_WIDEN_MULT_HI/LO_EXPR
539 In this case OP0 and optionally OP1 would be initialized,
540 but WIDE_OP wouldn't (not relevant for this case).
541 2) Operations whose result is of the same size as the last argument to the
542 operation, but wider than all the other arguments to the operation.
543 Examples: WIDEN_SUM_EXPR, VEC_DOT_PROD_EXPR.
544 In the case WIDE_OP, OP0 and optionally OP1 would be initialized.
546 E.g, when called to expand the following operations, this is how
547 the arguments will be initialized:
549 widening-sum 2 oprnd0 - oprnd1
550 widening-dot-product 3 oprnd0 oprnd1 oprnd2
551 widening-mult 2 oprnd0 oprnd1 -
552 type-promotion (vec-unpack) 1 oprnd0 - - */
555 expand_widen_pattern_expr (tree exp, rtx op0, rtx op1, rtx wide_op, rtx target,
558 tree oprnd0, oprnd1, oprnd2;
559 enum machine_mode wmode = 0, tmode0, tmode1 = 0;
560 optab widen_pattern_optab;
562 enum machine_mode xmode0, xmode1 = 0, wxmode = 0;
565 rtx xop0, xop1, wxop;
566 int nops = TREE_OPERAND_LENGTH (exp);
568 oprnd0 = TREE_OPERAND (exp, 0);
569 tmode0 = TYPE_MODE (TREE_TYPE (oprnd0));
570 widen_pattern_optab =
571 optab_for_tree_code (TREE_CODE (exp), TREE_TYPE (oprnd0), optab_default);
572 icode = (int) optab_handler (widen_pattern_optab, tmode0)->insn_code;
573 gcc_assert (icode != CODE_FOR_nothing);
574 xmode0 = insn_data[icode].operand[1].mode;
578 oprnd1 = TREE_OPERAND (exp, 1);
579 tmode1 = TYPE_MODE (TREE_TYPE (oprnd1));
580 xmode1 = insn_data[icode].operand[2].mode;
583 /* The last operand is of a wider mode than the rest of the operands. */
591 gcc_assert (tmode1 == tmode0);
593 oprnd2 = TREE_OPERAND (exp, 2);
594 wmode = TYPE_MODE (TREE_TYPE (oprnd2));
595 wxmode = insn_data[icode].operand[3].mode;
599 wmode = wxmode = insn_data[icode].operand[0].mode;
602 || ! (*insn_data[icode].operand[0].predicate) (target, wmode))
603 temp = gen_reg_rtx (wmode);
611 /* In case the insn wants input operands in modes different from
612 those of the actual operands, convert the operands. It would
613 seem that we don't need to convert CONST_INTs, but we do, so
614 that they're properly zero-extended, sign-extended or truncated
617 if (GET_MODE (op0) != xmode0 && xmode0 != VOIDmode)
618 xop0 = convert_modes (xmode0,
619 GET_MODE (op0) != VOIDmode
625 if (GET_MODE (op1) != xmode1 && xmode1 != VOIDmode)
626 xop1 = convert_modes (xmode1,
627 GET_MODE (op1) != VOIDmode
633 if (GET_MODE (wide_op) != wxmode && wxmode != VOIDmode)
634 wxop = convert_modes (wxmode,
635 GET_MODE (wide_op) != VOIDmode
640 /* Now, if insn's predicates don't allow our operands, put them into
643 if (! (*insn_data[icode].operand[1].predicate) (xop0, xmode0)
644 && xmode0 != VOIDmode)
645 xop0 = copy_to_mode_reg (xmode0, xop0);
649 if (! (*insn_data[icode].operand[2].predicate) (xop1, xmode1)
650 && xmode1 != VOIDmode)
651 xop1 = copy_to_mode_reg (xmode1, xop1);
655 if (! (*insn_data[icode].operand[3].predicate) (wxop, wxmode)
656 && wxmode != VOIDmode)
657 wxop = copy_to_mode_reg (wxmode, wxop);
659 pat = GEN_FCN (icode) (temp, xop0, xop1, wxop);
662 pat = GEN_FCN (icode) (temp, xop0, xop1);
668 if (! (*insn_data[icode].operand[2].predicate) (wxop, wxmode)
669 && wxmode != VOIDmode)
670 wxop = copy_to_mode_reg (wxmode, wxop);
672 pat = GEN_FCN (icode) (temp, xop0, wxop);
675 pat = GEN_FCN (icode) (temp, xop0);
682 /* Generate code to perform an operation specified by TERNARY_OPTAB
683 on operands OP0, OP1 and OP2, with result having machine-mode MODE.
685 UNSIGNEDP is for the case where we have to widen the operands
686 to perform the operation. It says to use zero-extension.
688 If TARGET is nonzero, the value
689 is generated there, if it is convenient to do so.
690 In all cases an rtx is returned for the locus of the value;
691 this may or may not be TARGET. */
694 expand_ternary_op (enum machine_mode mode, optab ternary_optab, rtx op0,
695 rtx op1, rtx op2, rtx target, int unsignedp)
697 int icode = (int) optab_handler (ternary_optab, mode)->insn_code;
698 enum machine_mode mode0 = insn_data[icode].operand[1].mode;
699 enum machine_mode mode1 = insn_data[icode].operand[2].mode;
700 enum machine_mode mode2 = insn_data[icode].operand[3].mode;
703 rtx xop0 = op0, xop1 = op1, xop2 = op2;
705 gcc_assert (optab_handler (ternary_optab, mode)->insn_code
706 != CODE_FOR_nothing);
708 if (!target || !insn_data[icode].operand[0].predicate (target, mode))
709 temp = gen_reg_rtx (mode);
713 /* In case the insn wants input operands in modes different from
714 those of the actual operands, convert the operands. It would
715 seem that we don't need to convert CONST_INTs, but we do, so
716 that they're properly zero-extended, sign-extended or truncated
719 if (GET_MODE (op0) != mode0 && mode0 != VOIDmode)
720 xop0 = convert_modes (mode0,
721 GET_MODE (op0) != VOIDmode
726 if (GET_MODE (op1) != mode1 && mode1 != VOIDmode)
727 xop1 = convert_modes (mode1,
728 GET_MODE (op1) != VOIDmode
733 if (GET_MODE (op2) != mode2 && mode2 != VOIDmode)
734 xop2 = convert_modes (mode2,
735 GET_MODE (op2) != VOIDmode
740 /* Now, if insn's predicates don't allow our operands, put them into
743 if (!insn_data[icode].operand[1].predicate (xop0, mode0)
744 && mode0 != VOIDmode)
745 xop0 = copy_to_mode_reg (mode0, xop0);
747 if (!insn_data[icode].operand[2].predicate (xop1, mode1)
748 && mode1 != VOIDmode)
749 xop1 = copy_to_mode_reg (mode1, xop1);
751 if (!insn_data[icode].operand[3].predicate (xop2, mode2)
752 && mode2 != VOIDmode)
753 xop2 = copy_to_mode_reg (mode2, xop2);
755 pat = GEN_FCN (icode) (temp, xop0, xop1, xop2);
762 /* Like expand_binop, but return a constant rtx if the result can be
763 calculated at compile time. The arguments and return value are
764 otherwise the same as for expand_binop. */
767 simplify_expand_binop (enum machine_mode mode, optab binoptab,
768 rtx op0, rtx op1, rtx target, int unsignedp,
769 enum optab_methods methods)
771 if (CONSTANT_P (op0) && CONSTANT_P (op1))
773 rtx x = simplify_binary_operation (binoptab->code, mode, op0, op1);
779 return expand_binop (mode, binoptab, op0, op1, target, unsignedp, methods);
782 /* Like simplify_expand_binop, but always put the result in TARGET.
783 Return true if the expansion succeeded. */
786 force_expand_binop (enum machine_mode mode, optab binoptab,
787 rtx op0, rtx op1, rtx target, int unsignedp,
788 enum optab_methods methods)
790 rtx x = simplify_expand_binop (mode, binoptab, op0, op1,
791 target, unsignedp, methods);
795 emit_move_insn (target, x);
799 /* Generate insns for VEC_LSHIFT_EXPR, VEC_RSHIFT_EXPR. */
802 expand_vec_shift_expr (tree vec_shift_expr, rtx target)
804 enum insn_code icode;
805 rtx rtx_op1, rtx_op2;
806 enum machine_mode mode1;
807 enum machine_mode mode2;
808 enum machine_mode mode = TYPE_MODE (TREE_TYPE (vec_shift_expr));
809 tree vec_oprnd = TREE_OPERAND (vec_shift_expr, 0);
810 tree shift_oprnd = TREE_OPERAND (vec_shift_expr, 1);
814 switch (TREE_CODE (vec_shift_expr))
816 case VEC_RSHIFT_EXPR:
817 shift_optab = vec_shr_optab;
819 case VEC_LSHIFT_EXPR:
820 shift_optab = vec_shl_optab;
826 icode = (int) optab_handler (shift_optab, mode)->insn_code;
827 gcc_assert (icode != CODE_FOR_nothing);
829 mode1 = insn_data[icode].operand[1].mode;
830 mode2 = insn_data[icode].operand[2].mode;
832 rtx_op1 = expand_normal (vec_oprnd);
833 if (!(*insn_data[icode].operand[1].predicate) (rtx_op1, mode1)
834 && mode1 != VOIDmode)
835 rtx_op1 = force_reg (mode1, rtx_op1);
837 rtx_op2 = expand_normal (shift_oprnd);
838 if (!(*insn_data[icode].operand[2].predicate) (rtx_op2, mode2)
839 && mode2 != VOIDmode)
840 rtx_op2 = force_reg (mode2, rtx_op2);
843 || ! (*insn_data[icode].operand[0].predicate) (target, mode))
844 target = gen_reg_rtx (mode);
846 /* Emit instruction */
847 pat = GEN_FCN (icode) (target, rtx_op1, rtx_op2);
854 /* This subroutine of expand_doubleword_shift handles the cases in which
855 the effective shift value is >= BITS_PER_WORD. The arguments and return
856 value are the same as for the parent routine, except that SUPERWORD_OP1
857 is the shift count to use when shifting OUTOF_INPUT into INTO_TARGET.
858 INTO_TARGET may be null if the caller has decided to calculate it. */
861 expand_superword_shift (optab binoptab, rtx outof_input, rtx superword_op1,
862 rtx outof_target, rtx into_target,
863 int unsignedp, enum optab_methods methods)
865 if (into_target != 0)
866 if (!force_expand_binop (word_mode, binoptab, outof_input, superword_op1,
867 into_target, unsignedp, methods))
870 if (outof_target != 0)
872 /* For a signed right shift, we must fill OUTOF_TARGET with copies
873 of the sign bit, otherwise we must fill it with zeros. */
874 if (binoptab != ashr_optab)
875 emit_move_insn (outof_target, CONST0_RTX (word_mode));
877 if (!force_expand_binop (word_mode, binoptab,
878 outof_input, GEN_INT (BITS_PER_WORD - 1),
879 outof_target, unsignedp, methods))
885 /* This subroutine of expand_doubleword_shift handles the cases in which
886 the effective shift value is < BITS_PER_WORD. The arguments and return
887 value are the same as for the parent routine. */
890 expand_subword_shift (enum machine_mode op1_mode, optab binoptab,
891 rtx outof_input, rtx into_input, rtx op1,
892 rtx outof_target, rtx into_target,
893 int unsignedp, enum optab_methods methods,
894 unsigned HOST_WIDE_INT shift_mask)
896 optab reverse_unsigned_shift, unsigned_shift;
899 reverse_unsigned_shift = (binoptab == ashl_optab ? lshr_optab : ashl_optab);
900 unsigned_shift = (binoptab == ashl_optab ? ashl_optab : lshr_optab);
902 /* The low OP1 bits of INTO_TARGET come from the high bits of OUTOF_INPUT.
903 We therefore need to shift OUTOF_INPUT by (BITS_PER_WORD - OP1) bits in
904 the opposite direction to BINOPTAB. */
905 if (CONSTANT_P (op1) || shift_mask >= BITS_PER_WORD)
907 carries = outof_input;
908 tmp = immed_double_const (BITS_PER_WORD, 0, op1_mode);
909 tmp = simplify_expand_binop (op1_mode, sub_optab, tmp, op1,
914 /* We must avoid shifting by BITS_PER_WORD bits since that is either
915 the same as a zero shift (if shift_mask == BITS_PER_WORD - 1) or
916 has unknown behavior. Do a single shift first, then shift by the
917 remainder. It's OK to use ~OP1 as the remainder if shift counts
918 are truncated to the mode size. */
919 carries = expand_binop (word_mode, reverse_unsigned_shift,
920 outof_input, const1_rtx, 0, unsignedp, methods);
921 if (shift_mask == BITS_PER_WORD - 1)
923 tmp = immed_double_const (-1, -1, op1_mode);
924 tmp = simplify_expand_binop (op1_mode, xor_optab, op1, tmp,
929 tmp = immed_double_const (BITS_PER_WORD - 1, 0, op1_mode);
930 tmp = simplify_expand_binop (op1_mode, sub_optab, tmp, op1,
934 if (tmp == 0 || carries == 0)
936 carries = expand_binop (word_mode, reverse_unsigned_shift,
937 carries, tmp, 0, unsignedp, methods);
941 /* Shift INTO_INPUT logically by OP1. This is the last use of INTO_INPUT
942 so the result can go directly into INTO_TARGET if convenient. */
943 tmp = expand_binop (word_mode, unsigned_shift, into_input, op1,
944 into_target, unsignedp, methods);
948 /* Now OR in the bits carried over from OUTOF_INPUT. */
949 if (!force_expand_binop (word_mode, ior_optab, tmp, carries,
950 into_target, unsignedp, methods))
953 /* Use a standard word_mode shift for the out-of half. */
954 if (outof_target != 0)
955 if (!force_expand_binop (word_mode, binoptab, outof_input, op1,
956 outof_target, unsignedp, methods))
963 #ifdef HAVE_conditional_move
964 /* Try implementing expand_doubleword_shift using conditional moves.
965 The shift is by < BITS_PER_WORD if (CMP_CODE CMP1 CMP2) is true,
966 otherwise it is by >= BITS_PER_WORD. SUBWORD_OP1 and SUPERWORD_OP1
967 are the shift counts to use in the former and latter case. All other
968 arguments are the same as the parent routine. */
971 expand_doubleword_shift_condmove (enum machine_mode op1_mode, optab binoptab,
972 enum rtx_code cmp_code, rtx cmp1, rtx cmp2,
973 rtx outof_input, rtx into_input,
974 rtx subword_op1, rtx superword_op1,
975 rtx outof_target, rtx into_target,
976 int unsignedp, enum optab_methods methods,
977 unsigned HOST_WIDE_INT shift_mask)
979 rtx outof_superword, into_superword;
981 /* Put the superword version of the output into OUTOF_SUPERWORD and
983 outof_superword = outof_target != 0 ? gen_reg_rtx (word_mode) : 0;
984 if (outof_target != 0 && subword_op1 == superword_op1)
986 /* The value INTO_TARGET >> SUBWORD_OP1, which we later store in
987 OUTOF_TARGET, is the same as the value of INTO_SUPERWORD. */
988 into_superword = outof_target;
989 if (!expand_superword_shift (binoptab, outof_input, superword_op1,
990 outof_superword, 0, unsignedp, methods))
995 into_superword = gen_reg_rtx (word_mode);
996 if (!expand_superword_shift (binoptab, outof_input, superword_op1,
997 outof_superword, into_superword,
1002 /* Put the subword version directly in OUTOF_TARGET and INTO_TARGET. */
1003 if (!expand_subword_shift (op1_mode, binoptab,
1004 outof_input, into_input, subword_op1,
1005 outof_target, into_target,
1006 unsignedp, methods, shift_mask))
1009 /* Select between them. Do the INTO half first because INTO_SUPERWORD
1010 might be the current value of OUTOF_TARGET. */
1011 if (!emit_conditional_move (into_target, cmp_code, cmp1, cmp2, op1_mode,
1012 into_target, into_superword, word_mode, false))
1015 if (outof_target != 0)
1016 if (!emit_conditional_move (outof_target, cmp_code, cmp1, cmp2, op1_mode,
1017 outof_target, outof_superword,
1025 /* Expand a doubleword shift (ashl, ashr or lshr) using word-mode shifts.
1026 OUTOF_INPUT and INTO_INPUT are the two word-sized halves of the first
1027 input operand; the shift moves bits in the direction OUTOF_INPUT->
1028 INTO_TARGET. OUTOF_TARGET and INTO_TARGET are the equivalent words
1029 of the target. OP1 is the shift count and OP1_MODE is its mode.
1030 If OP1 is constant, it will have been truncated as appropriate
1031 and is known to be nonzero.
1033 If SHIFT_MASK is zero, the result of word shifts is undefined when the
1034 shift count is outside the range [0, BITS_PER_WORD). This routine must
1035 avoid generating such shifts for OP1s in the range [0, BITS_PER_WORD * 2).
1037 If SHIFT_MASK is nonzero, all word-mode shift counts are effectively
1038 masked by it and shifts in the range [BITS_PER_WORD, SHIFT_MASK) will
1039 fill with zeros or sign bits as appropriate.
1041 If SHIFT_MASK is BITS_PER_WORD - 1, this routine will synthesize
1042 a doubleword shift whose equivalent mask is BITS_PER_WORD * 2 - 1.
1043 Doing this preserves semantics required by SHIFT_COUNT_TRUNCATED.
1044 In all other cases, shifts by values outside [0, BITS_PER_UNIT * 2)
1047 BINOPTAB, UNSIGNEDP and METHODS are as for expand_binop. This function
1048 may not use INTO_INPUT after modifying INTO_TARGET, and similarly for
1049 OUTOF_INPUT and OUTOF_TARGET. OUTOF_TARGET can be null if the parent
1050 function wants to calculate it itself.
1052 Return true if the shift could be successfully synthesized. */
1055 expand_doubleword_shift (enum machine_mode op1_mode, optab binoptab,
1056 rtx outof_input, rtx into_input, rtx op1,
1057 rtx outof_target, rtx into_target,
1058 int unsignedp, enum optab_methods methods,
1059 unsigned HOST_WIDE_INT shift_mask)
1061 rtx superword_op1, tmp, cmp1, cmp2;
1062 rtx subword_label, done_label;
1063 enum rtx_code cmp_code;
1065 /* See if word-mode shifts by BITS_PER_WORD...BITS_PER_WORD * 2 - 1 will
1066 fill the result with sign or zero bits as appropriate. If so, the value
1067 of OUTOF_TARGET will always be (SHIFT OUTOF_INPUT OP1). Recursively call
1068 this routine to calculate INTO_TARGET (which depends on both OUTOF_INPUT
1069 and INTO_INPUT), then emit code to set up OUTOF_TARGET.
1071 This isn't worthwhile for constant shifts since the optimizers will
1072 cope better with in-range shift counts. */
1073 if (shift_mask >= BITS_PER_WORD
1074 && outof_target != 0
1075 && !CONSTANT_P (op1))
1077 if (!expand_doubleword_shift (op1_mode, binoptab,
1078 outof_input, into_input, op1,
1080 unsignedp, methods, shift_mask))
1082 if (!force_expand_binop (word_mode, binoptab, outof_input, op1,
1083 outof_target, unsignedp, methods))
1088 /* Set CMP_CODE, CMP1 and CMP2 so that the rtx (CMP_CODE CMP1 CMP2)
1089 is true when the effective shift value is less than BITS_PER_WORD.
1090 Set SUPERWORD_OP1 to the shift count that should be used to shift
1091 OUTOF_INPUT into INTO_TARGET when the condition is false. */
1092 tmp = immed_double_const (BITS_PER_WORD, 0, op1_mode);
1093 if (!CONSTANT_P (op1) && shift_mask == BITS_PER_WORD - 1)
1095 /* Set CMP1 to OP1 & BITS_PER_WORD. The result is zero iff OP1
1096 is a subword shift count. */
1097 cmp1 = simplify_expand_binop (op1_mode, and_optab, op1, tmp,
1099 cmp2 = CONST0_RTX (op1_mode);
1101 superword_op1 = op1;
1105 /* Set CMP1 to OP1 - BITS_PER_WORD. */
1106 cmp1 = simplify_expand_binop (op1_mode, sub_optab, op1, tmp,
1108 cmp2 = CONST0_RTX (op1_mode);
1110 superword_op1 = cmp1;
1115 /* If we can compute the condition at compile time, pick the
1116 appropriate subroutine. */
1117 tmp = simplify_relational_operation (cmp_code, SImode, op1_mode, cmp1, cmp2);
1118 if (tmp != 0 && GET_CODE (tmp) == CONST_INT)
1120 if (tmp == const0_rtx)
1121 return expand_superword_shift (binoptab, outof_input, superword_op1,
1122 outof_target, into_target,
1123 unsignedp, methods);
1125 return expand_subword_shift (op1_mode, binoptab,
1126 outof_input, into_input, op1,
1127 outof_target, into_target,
1128 unsignedp, methods, shift_mask);
1131 #ifdef HAVE_conditional_move
1132 /* Try using conditional moves to generate straight-line code. */
1134 rtx start = get_last_insn ();
1135 if (expand_doubleword_shift_condmove (op1_mode, binoptab,
1136 cmp_code, cmp1, cmp2,
1137 outof_input, into_input,
1139 outof_target, into_target,
1140 unsignedp, methods, shift_mask))
1142 delete_insns_since (start);
1146 /* As a last resort, use branches to select the correct alternative. */
1147 subword_label = gen_label_rtx ();
1148 done_label = gen_label_rtx ();
1151 do_compare_rtx_and_jump (cmp1, cmp2, cmp_code, false, op1_mode,
1152 0, 0, subword_label);
1155 if (!expand_superword_shift (binoptab, outof_input, superword_op1,
1156 outof_target, into_target,
1157 unsignedp, methods))
1160 emit_jump_insn (gen_jump (done_label));
1162 emit_label (subword_label);
1164 if (!expand_subword_shift (op1_mode, binoptab,
1165 outof_input, into_input, op1,
1166 outof_target, into_target,
1167 unsignedp, methods, shift_mask))
1170 emit_label (done_label);
1174 /* Subroutine of expand_binop. Perform a double word multiplication of
1175 operands OP0 and OP1 both of mode MODE, which is exactly twice as wide
1176 as the target's word_mode. This function return NULL_RTX if anything
1177 goes wrong, in which case it may have already emitted instructions
1178 which need to be deleted.
1180 If we want to multiply two two-word values and have normal and widening
1181 multiplies of single-word values, we can do this with three smaller
1184 The multiplication proceeds as follows:
1185 _______________________
1186 [__op0_high_|__op0_low__]
1187 _______________________
1188 * [__op1_high_|__op1_low__]
1189 _______________________________________________
1190 _______________________
1191 (1) [__op0_low__*__op1_low__]
1192 _______________________
1193 (2a) [__op0_low__*__op1_high_]
1194 _______________________
1195 (2b) [__op0_high_*__op1_low__]
1196 _______________________
1197 (3) [__op0_high_*__op1_high_]
1200 This gives a 4-word result. Since we are only interested in the
1201 lower 2 words, partial result (3) and the upper words of (2a) and
1202 (2b) don't need to be calculated. Hence (2a) and (2b) can be
1203 calculated using non-widening multiplication.
1205 (1), however, needs to be calculated with an unsigned widening
1206 multiplication. If this operation is not directly supported we
1207 try using a signed widening multiplication and adjust the result.
1208 This adjustment works as follows:
1210 If both operands are positive then no adjustment is needed.
1212 If the operands have different signs, for example op0_low < 0 and
1213 op1_low >= 0, the instruction treats the most significant bit of
1214 op0_low as a sign bit instead of a bit with significance
1215 2**(BITS_PER_WORD-1), i.e. the instruction multiplies op1_low
1216 with 2**BITS_PER_WORD - op0_low, and two's complements the
1217 result. Conclusion: We need to add op1_low * 2**BITS_PER_WORD to
1220 Similarly, if both operands are negative, we need to add
1221 (op0_low + op1_low) * 2**BITS_PER_WORD.
1223 We use a trick to adjust quickly. We logically shift op0_low right
1224 (op1_low) BITS_PER_WORD-1 steps to get 0 or 1, and add this to
1225 op0_high (op1_high) before it is used to calculate 2b (2a). If no
1226 logical shift exists, we do an arithmetic right shift and subtract
1230 expand_doubleword_mult (enum machine_mode mode, rtx op0, rtx op1, rtx target,
1231 bool umulp, enum optab_methods methods)
1233 int low = (WORDS_BIG_ENDIAN ? 1 : 0);
1234 int high = (WORDS_BIG_ENDIAN ? 0 : 1);
1235 rtx wordm1 = umulp ? NULL_RTX : GEN_INT (BITS_PER_WORD - 1);
1236 rtx product, adjust, product_high, temp;
1238 rtx op0_high = operand_subword_force (op0, high, mode);
1239 rtx op0_low = operand_subword_force (op0, low, mode);
1240 rtx op1_high = operand_subword_force (op1, high, mode);
1241 rtx op1_low = operand_subword_force (op1, low, mode);
1243 /* If we're using an unsigned multiply to directly compute the product
1244 of the low-order words of the operands and perform any required
1245 adjustments of the operands, we begin by trying two more multiplications
1246 and then computing the appropriate sum.
1248 We have checked above that the required addition is provided.
1249 Full-word addition will normally always succeed, especially if
1250 it is provided at all, so we don't worry about its failure. The
1251 multiplication may well fail, however, so we do handle that. */
1255 /* ??? This could be done with emit_store_flag where available. */
1256 temp = expand_binop (word_mode, lshr_optab, op0_low, wordm1,
1257 NULL_RTX, 1, methods);
1259 op0_high = expand_binop (word_mode, add_optab, op0_high, temp,
1260 NULL_RTX, 0, OPTAB_DIRECT);
1263 temp = expand_binop (word_mode, ashr_optab, op0_low, wordm1,
1264 NULL_RTX, 0, methods);
1267 op0_high = expand_binop (word_mode, sub_optab, op0_high, temp,
1268 NULL_RTX, 0, OPTAB_DIRECT);
1275 adjust = expand_binop (word_mode, smul_optab, op0_high, op1_low,
1276 NULL_RTX, 0, OPTAB_DIRECT);
1280 /* OP0_HIGH should now be dead. */
1284 /* ??? This could be done with emit_store_flag where available. */
1285 temp = expand_binop (word_mode, lshr_optab, op1_low, wordm1,
1286 NULL_RTX, 1, methods);
1288 op1_high = expand_binop (word_mode, add_optab, op1_high, temp,
1289 NULL_RTX, 0, OPTAB_DIRECT);
1292 temp = expand_binop (word_mode, ashr_optab, op1_low, wordm1,
1293 NULL_RTX, 0, methods);
1296 op1_high = expand_binop (word_mode, sub_optab, op1_high, temp,
1297 NULL_RTX, 0, OPTAB_DIRECT);
1304 temp = expand_binop (word_mode, smul_optab, op1_high, op0_low,
1305 NULL_RTX, 0, OPTAB_DIRECT);
1309 /* OP1_HIGH should now be dead. */
1311 adjust = expand_binop (word_mode, add_optab, adjust, temp,
1312 adjust, 0, OPTAB_DIRECT);
1314 if (target && !REG_P (target))
1318 product = expand_binop (mode, umul_widen_optab, op0_low, op1_low,
1319 target, 1, OPTAB_DIRECT);
1321 product = expand_binop (mode, smul_widen_optab, op0_low, op1_low,
1322 target, 1, OPTAB_DIRECT);
1327 product_high = operand_subword (product, high, 1, mode);
1328 adjust = expand_binop (word_mode, add_optab, product_high, adjust,
1329 REG_P (product_high) ? product_high : adjust,
1331 emit_move_insn (product_high, adjust);
1335 /* Wrapper around expand_binop which takes an rtx code to specify
1336 the operation to perform, not an optab pointer. All other
1337 arguments are the same. */
1339 expand_simple_binop (enum machine_mode mode, enum rtx_code code, rtx op0,
1340 rtx op1, rtx target, int unsignedp,
1341 enum optab_methods methods)
1343 optab binop = code_to_optab[(int) code];
1346 return expand_binop (mode, binop, op0, op1, target, unsignedp, methods);
1349 /* Return whether OP0 and OP1 should be swapped when expanding a commutative
1350 binop. Order them according to commutative_operand_precedence and, if
1351 possible, try to put TARGET or a pseudo first. */
1353 swap_commutative_operands_with_target (rtx target, rtx op0, rtx op1)
1355 int op0_prec = commutative_operand_precedence (op0);
1356 int op1_prec = commutative_operand_precedence (op1);
1358 if (op0_prec < op1_prec)
1361 if (op0_prec > op1_prec)
1364 /* With equal precedence, both orders are ok, but it is better if the
1365 first operand is TARGET, or if both TARGET and OP0 are pseudos. */
1366 if (target == 0 || REG_P (target))
1367 return (REG_P (op1) && !REG_P (op0)) || target == op1;
1369 return rtx_equal_p (op1, target);
1372 /* Return true if BINOPTAB implements a shift operation. */
1375 shift_optab_p (optab binoptab)
1377 switch (binoptab->code)
1393 /* Return true if BINOPTAB implements a commutative binary operation. */
1396 commutative_optab_p (optab binoptab)
1398 return (GET_RTX_CLASS (binoptab->code) == RTX_COMM_ARITH
1399 || binoptab == smul_widen_optab
1400 || binoptab == umul_widen_optab
1401 || binoptab == smul_highpart_optab
1402 || binoptab == umul_highpart_optab);
1405 /* X is to be used in mode MODE as an operand to BINOPTAB. If we're
1406 optimizing, and if the operand is a constant that costs more than
1407 1 instruction, force the constant into a register and return that
1408 register. Return X otherwise. UNSIGNEDP says whether X is unsigned. */
1411 avoid_expensive_constant (enum machine_mode mode, optab binoptab,
1412 rtx x, bool unsignedp)
1414 if (mode != VOIDmode
1417 && rtx_cost (x, binoptab->code) > COSTS_N_INSNS (1))
1419 if (GET_CODE (x) == CONST_INT)
1421 HOST_WIDE_INT intval = trunc_int_for_mode (INTVAL (x), mode);
1422 if (intval != INTVAL (x))
1423 x = GEN_INT (intval);
1426 x = convert_modes (mode, VOIDmode, x, unsignedp);
1427 x = force_reg (mode, x);
1432 /* Helper function for expand_binop: handle the case where there
1433 is an insn that directly implements the indicated operation.
1434 Returns null if this is not possible. */
1436 expand_binop_directly (enum machine_mode mode, optab binoptab,
1438 rtx target, int unsignedp, enum optab_methods methods,
1441 int icode = (int) optab_handler (binoptab, mode)->insn_code;
1442 enum machine_mode mode0 = insn_data[icode].operand[1].mode;
1443 enum machine_mode mode1 = insn_data[icode].operand[2].mode;
1444 enum machine_mode tmp_mode;
1447 rtx xop0 = op0, xop1 = op1;
1454 temp = gen_reg_rtx (mode);
1456 /* If it is a commutative operator and the modes would match
1457 if we would swap the operands, we can save the conversions. */
1458 commutative_p = commutative_optab_p (binoptab);
1460 && GET_MODE (xop0) != mode0 && GET_MODE (xop1) != mode1
1461 && GET_MODE (xop0) == mode1 && GET_MODE (xop1) == mode1)
1468 /* If we are optimizing, force expensive constants into a register. */
1469 xop0 = avoid_expensive_constant (mode0, binoptab, xop0, unsignedp);
1470 if (!shift_optab_p (binoptab))
1471 xop1 = avoid_expensive_constant (mode1, binoptab, xop1, unsignedp);
1473 /* In case the insn wants input operands in modes different from
1474 those of the actual operands, convert the operands. It would
1475 seem that we don't need to convert CONST_INTs, but we do, so
1476 that they're properly zero-extended, sign-extended or truncated
1479 if (GET_MODE (xop0) != mode0 && mode0 != VOIDmode)
1480 xop0 = convert_modes (mode0,
1481 GET_MODE (xop0) != VOIDmode
1486 if (GET_MODE (xop1) != mode1 && mode1 != VOIDmode)
1487 xop1 = convert_modes (mode1,
1488 GET_MODE (xop1) != VOIDmode
1493 /* If operation is commutative,
1494 try to make the first operand a register.
1495 Even better, try to make it the same as the target.
1496 Also try to make the last operand a constant. */
1498 && swap_commutative_operands_with_target (target, xop0, xop1))
1505 /* Now, if insn's predicates don't allow our operands, put them into
1508 if (!insn_data[icode].operand[1].predicate (xop0, mode0)
1509 && mode0 != VOIDmode)
1510 xop0 = copy_to_mode_reg (mode0, xop0);
1512 if (!insn_data[icode].operand[2].predicate (xop1, mode1)
1513 && mode1 != VOIDmode)
1514 xop1 = copy_to_mode_reg (mode1, xop1);
1516 if (binoptab == vec_pack_trunc_optab
1517 || binoptab == vec_pack_usat_optab
1518 || binoptab == vec_pack_ssat_optab
1519 || binoptab == vec_pack_ufix_trunc_optab
1520 || binoptab == vec_pack_sfix_trunc_optab)
1522 /* The mode of the result is different then the mode of the
1524 tmp_mode = insn_data[icode].operand[0].mode;
1525 if (GET_MODE_NUNITS (tmp_mode) != 2 * GET_MODE_NUNITS (mode))
1531 if (!insn_data[icode].operand[0].predicate (temp, tmp_mode))
1532 temp = gen_reg_rtx (tmp_mode);
1534 pat = GEN_FCN (icode) (temp, xop0, xop1);
1537 /* If PAT is composed of more than one insn, try to add an appropriate
1538 REG_EQUAL note to it. If we can't because TEMP conflicts with an
1539 operand, call expand_binop again, this time without a target. */
1540 if (INSN_P (pat) && NEXT_INSN (pat) != NULL_RTX
1541 && ! add_equal_note (pat, temp, binoptab->code, xop0, xop1))
1543 delete_insns_since (last);
1544 return expand_binop (mode, binoptab, op0, op1, NULL_RTX,
1545 unsignedp, methods);
1552 delete_insns_since (last);
1556 /* Generate code to perform an operation specified by BINOPTAB
1557 on operands OP0 and OP1, with result having machine-mode MODE.
1559 UNSIGNEDP is for the case where we have to widen the operands
1560 to perform the operation. It says to use zero-extension.
1562 If TARGET is nonzero, the value
1563 is generated there, if it is convenient to do so.
1564 In all cases an rtx is returned for the locus of the value;
1565 this may or may not be TARGET. */
1568 expand_binop (enum machine_mode mode, optab binoptab, rtx op0, rtx op1,
1569 rtx target, int unsignedp, enum optab_methods methods)
1571 enum optab_methods next_methods
1572 = (methods == OPTAB_LIB || methods == OPTAB_LIB_WIDEN
1573 ? OPTAB_WIDEN : methods);
1574 enum mode_class mclass;
1575 enum machine_mode wider_mode;
1578 rtx entry_last = get_last_insn ();
1581 mclass = GET_MODE_CLASS (mode);
1583 /* If subtracting an integer constant, convert this into an addition of
1584 the negated constant. */
1586 if (binoptab == sub_optab && GET_CODE (op1) == CONST_INT)
1588 op1 = negate_rtx (mode, op1);
1589 binoptab = add_optab;
1592 /* Record where to delete back to if we backtrack. */
1593 last = get_last_insn ();
1595 /* If we can do it with a three-operand insn, do so. */
1597 if (methods != OPTAB_MUST_WIDEN
1598 && optab_handler (binoptab, mode)->insn_code != CODE_FOR_nothing)
1600 temp = expand_binop_directly (mode, binoptab, op0, op1, target,
1601 unsignedp, methods, last);
1606 /* If we were trying to rotate, and that didn't work, try rotating
1607 the other direction before falling back to shifts and bitwise-or. */
1608 if (((binoptab == rotl_optab
1609 && optab_handler (rotr_optab, mode)->insn_code != CODE_FOR_nothing)
1610 || (binoptab == rotr_optab
1611 && optab_handler (rotl_optab, mode)->insn_code != CODE_FOR_nothing))
1612 && mclass == MODE_INT)
1614 optab otheroptab = (binoptab == rotl_optab ? rotr_optab : rotl_optab);
1616 unsigned int bits = GET_MODE_BITSIZE (mode);
1618 if (GET_CODE (op1) == CONST_INT)
1619 newop1 = GEN_INT (bits - INTVAL (op1));
1620 else if (targetm.shift_truncation_mask (mode) == bits - 1)
1621 newop1 = negate_rtx (mode, op1);
1623 newop1 = expand_binop (mode, sub_optab,
1624 GEN_INT (bits), op1,
1625 NULL_RTX, unsignedp, OPTAB_DIRECT);
1627 temp = expand_binop_directly (mode, otheroptab, op0, newop1,
1628 target, unsignedp, methods, last);
1633 /* If this is a multiply, see if we can do a widening operation that
1634 takes operands of this mode and makes a wider mode. */
1636 if (binoptab == smul_optab
1637 && GET_MODE_WIDER_MODE (mode) != VOIDmode
1638 && ((optab_handler ((unsignedp ? umul_widen_optab : smul_widen_optab),
1639 GET_MODE_WIDER_MODE (mode))->insn_code)
1640 != CODE_FOR_nothing))
1642 temp = expand_binop (GET_MODE_WIDER_MODE (mode),
1643 unsignedp ? umul_widen_optab : smul_widen_optab,
1644 op0, op1, NULL_RTX, unsignedp, OPTAB_DIRECT);
1648 if (GET_MODE_CLASS (mode) == MODE_INT
1649 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (mode),
1650 GET_MODE_BITSIZE (GET_MODE (temp))))
1651 return gen_lowpart (mode, temp);
1653 return convert_to_mode (mode, temp, unsignedp);
1657 /* Look for a wider mode of the same class for which we think we
1658 can open-code the operation. Check for a widening multiply at the
1659 wider mode as well. */
1661 if (CLASS_HAS_WIDER_MODES_P (mclass)
1662 && methods != OPTAB_DIRECT && methods != OPTAB_LIB)
1663 for (wider_mode = GET_MODE_WIDER_MODE (mode);
1664 wider_mode != VOIDmode;
1665 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
1667 if (optab_handler (binoptab, wider_mode)->insn_code != CODE_FOR_nothing
1668 || (binoptab == smul_optab
1669 && GET_MODE_WIDER_MODE (wider_mode) != VOIDmode
1670 && ((optab_handler ((unsignedp ? umul_widen_optab
1671 : smul_widen_optab),
1672 GET_MODE_WIDER_MODE (wider_mode))->insn_code)
1673 != CODE_FOR_nothing)))
1675 rtx xop0 = op0, xop1 = op1;
1678 /* For certain integer operations, we need not actually extend
1679 the narrow operands, as long as we will truncate
1680 the results to the same narrowness. */
1682 if ((binoptab == ior_optab || binoptab == and_optab
1683 || binoptab == xor_optab
1684 || binoptab == add_optab || binoptab == sub_optab
1685 || binoptab == smul_optab || binoptab == ashl_optab)
1686 && mclass == MODE_INT)
1689 xop0 = avoid_expensive_constant (mode, binoptab,
1691 if (binoptab != ashl_optab)
1692 xop1 = avoid_expensive_constant (mode, binoptab,
1696 xop0 = widen_operand (xop0, wider_mode, mode, unsignedp, no_extend);
1698 /* The second operand of a shift must always be extended. */
1699 xop1 = widen_operand (xop1, wider_mode, mode, unsignedp,
1700 no_extend && binoptab != ashl_optab);
1702 temp = expand_binop (wider_mode, binoptab, xop0, xop1, NULL_RTX,
1703 unsignedp, OPTAB_DIRECT);
1706 if (mclass != MODE_INT
1707 || !TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (mode),
1708 GET_MODE_BITSIZE (wider_mode)))
1711 target = gen_reg_rtx (mode);
1712 convert_move (target, temp, 0);
1716 return gen_lowpart (mode, temp);
1719 delete_insns_since (last);
1723 /* If operation is commutative,
1724 try to make the first operand a register.
1725 Even better, try to make it the same as the target.
1726 Also try to make the last operand a constant. */
1727 if (commutative_optab_p (binoptab)
1728 && swap_commutative_operands_with_target (target, op0, op1))
1735 /* These can be done a word at a time. */
1736 if ((binoptab == and_optab || binoptab == ior_optab || binoptab == xor_optab)
1737 && mclass == MODE_INT
1738 && GET_MODE_SIZE (mode) > UNITS_PER_WORD
1739 && optab_handler (binoptab, word_mode)->insn_code != CODE_FOR_nothing)
1745 /* If TARGET is the same as one of the operands, the REG_EQUAL note
1746 won't be accurate, so use a new target. */
1747 if (target == 0 || target == op0 || target == op1)
1748 target = gen_reg_rtx (mode);
1752 /* Do the actual arithmetic. */
1753 for (i = 0; i < GET_MODE_BITSIZE (mode) / BITS_PER_WORD; i++)
1755 rtx target_piece = operand_subword (target, i, 1, mode);
1756 rtx x = expand_binop (word_mode, binoptab,
1757 operand_subword_force (op0, i, mode),
1758 operand_subword_force (op1, i, mode),
1759 target_piece, unsignedp, next_methods);
1764 if (target_piece != x)
1765 emit_move_insn (target_piece, x);
1768 insns = get_insns ();
1771 if (i == GET_MODE_BITSIZE (mode) / BITS_PER_WORD)
1773 if (binoptab->code != UNKNOWN)
1775 = gen_rtx_fmt_ee (binoptab->code, mode,
1776 copy_rtx (op0), copy_rtx (op1));
1785 /* Synthesize double word shifts from single word shifts. */
1786 if ((binoptab == lshr_optab || binoptab == ashl_optab
1787 || binoptab == ashr_optab)
1788 && mclass == MODE_INT
1789 && (GET_CODE (op1) == CONST_INT || optimize_insn_for_speed_p ())
1790 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
1791 && optab_handler (binoptab, word_mode)->insn_code != CODE_FOR_nothing
1792 && optab_handler (ashl_optab, word_mode)->insn_code != CODE_FOR_nothing
1793 && optab_handler (lshr_optab, word_mode)->insn_code != CODE_FOR_nothing)
1795 unsigned HOST_WIDE_INT shift_mask, double_shift_mask;
1796 enum machine_mode op1_mode;
1798 double_shift_mask = targetm.shift_truncation_mask (mode);
1799 shift_mask = targetm.shift_truncation_mask (word_mode);
1800 op1_mode = GET_MODE (op1) != VOIDmode ? GET_MODE (op1) : word_mode;
1802 /* Apply the truncation to constant shifts. */
1803 if (double_shift_mask > 0 && GET_CODE (op1) == CONST_INT)
1804 op1 = GEN_INT (INTVAL (op1) & double_shift_mask);
1806 if (op1 == CONST0_RTX (op1_mode))
1809 /* Make sure that this is a combination that expand_doubleword_shift
1810 can handle. See the comments there for details. */
1811 if (double_shift_mask == 0
1812 || (shift_mask == BITS_PER_WORD - 1
1813 && double_shift_mask == BITS_PER_WORD * 2 - 1))
1816 rtx into_target, outof_target;
1817 rtx into_input, outof_input;
1818 int left_shift, outof_word;
1820 /* If TARGET is the same as one of the operands, the REG_EQUAL note
1821 won't be accurate, so use a new target. */
1822 if (target == 0 || target == op0 || target == op1)
1823 target = gen_reg_rtx (mode);
1827 /* OUTOF_* is the word we are shifting bits away from, and
1828 INTO_* is the word that we are shifting bits towards, thus
1829 they differ depending on the direction of the shift and
1830 WORDS_BIG_ENDIAN. */
1832 left_shift = binoptab == ashl_optab;
1833 outof_word = left_shift ^ ! WORDS_BIG_ENDIAN;
1835 outof_target = operand_subword (target, outof_word, 1, mode);
1836 into_target = operand_subword (target, 1 - outof_word, 1, mode);
1838 outof_input = operand_subword_force (op0, outof_word, mode);
1839 into_input = operand_subword_force (op0, 1 - outof_word, mode);
1841 if (expand_doubleword_shift (op1_mode, binoptab,
1842 outof_input, into_input, op1,
1843 outof_target, into_target,
1844 unsignedp, next_methods, shift_mask))
1846 insns = get_insns ();
1856 /* Synthesize double word rotates from single word shifts. */
1857 if ((binoptab == rotl_optab || binoptab == rotr_optab)
1858 && mclass == MODE_INT
1859 && GET_CODE (op1) == CONST_INT
1860 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
1861 && optab_handler (ashl_optab, word_mode)->insn_code != CODE_FOR_nothing
1862 && optab_handler (lshr_optab, word_mode)->insn_code != CODE_FOR_nothing)
1865 rtx into_target, outof_target;
1866 rtx into_input, outof_input;
1868 int shift_count, left_shift, outof_word;
1870 /* If TARGET is the same as one of the operands, the REG_EQUAL note
1871 won't be accurate, so use a new target. Do this also if target is not
1872 a REG, first because having a register instead may open optimization
1873 opportunities, and second because if target and op0 happen to be MEMs
1874 designating the same location, we would risk clobbering it too early
1875 in the code sequence we generate below. */
1876 if (target == 0 || target == op0 || target == op1 || ! REG_P (target))
1877 target = gen_reg_rtx (mode);
1881 shift_count = INTVAL (op1);
1883 /* OUTOF_* is the word we are shifting bits away from, and
1884 INTO_* is the word that we are shifting bits towards, thus
1885 they differ depending on the direction of the shift and
1886 WORDS_BIG_ENDIAN. */
1888 left_shift = (binoptab == rotl_optab);
1889 outof_word = left_shift ^ ! WORDS_BIG_ENDIAN;
1891 outof_target = operand_subword (target, outof_word, 1, mode);
1892 into_target = operand_subword (target, 1 - outof_word, 1, mode);
1894 outof_input = operand_subword_force (op0, outof_word, mode);
1895 into_input = operand_subword_force (op0, 1 - outof_word, mode);
1897 if (shift_count == BITS_PER_WORD)
1899 /* This is just a word swap. */
1900 emit_move_insn (outof_target, into_input);
1901 emit_move_insn (into_target, outof_input);
1906 rtx into_temp1, into_temp2, outof_temp1, outof_temp2;
1907 rtx first_shift_count, second_shift_count;
1908 optab reverse_unsigned_shift, unsigned_shift;
1910 reverse_unsigned_shift = (left_shift ^ (shift_count < BITS_PER_WORD)
1911 ? lshr_optab : ashl_optab);
1913 unsigned_shift = (left_shift ^ (shift_count < BITS_PER_WORD)
1914 ? ashl_optab : lshr_optab);
1916 if (shift_count > BITS_PER_WORD)
1918 first_shift_count = GEN_INT (shift_count - BITS_PER_WORD);
1919 second_shift_count = GEN_INT (2 * BITS_PER_WORD - shift_count);
1923 first_shift_count = GEN_INT (BITS_PER_WORD - shift_count);
1924 second_shift_count = GEN_INT (shift_count);
1927 into_temp1 = expand_binop (word_mode, unsigned_shift,
1928 outof_input, first_shift_count,
1929 NULL_RTX, unsignedp, next_methods);
1930 into_temp2 = expand_binop (word_mode, reverse_unsigned_shift,
1931 into_input, second_shift_count,
1932 NULL_RTX, unsignedp, next_methods);
1934 if (into_temp1 != 0 && into_temp2 != 0)
1935 inter = expand_binop (word_mode, ior_optab, into_temp1, into_temp2,
1936 into_target, unsignedp, next_methods);
1940 if (inter != 0 && inter != into_target)
1941 emit_move_insn (into_target, inter);
1943 outof_temp1 = expand_binop (word_mode, unsigned_shift,
1944 into_input, first_shift_count,
1945 NULL_RTX, unsignedp, next_methods);
1946 outof_temp2 = expand_binop (word_mode, reverse_unsigned_shift,
1947 outof_input, second_shift_count,
1948 NULL_RTX, unsignedp, next_methods);
1950 if (inter != 0 && outof_temp1 != 0 && outof_temp2 != 0)
1951 inter = expand_binop (word_mode, ior_optab,
1952 outof_temp1, outof_temp2,
1953 outof_target, unsignedp, next_methods);
1955 if (inter != 0 && inter != outof_target)
1956 emit_move_insn (outof_target, inter);
1959 insns = get_insns ();
1969 /* These can be done a word at a time by propagating carries. */
1970 if ((binoptab == add_optab || binoptab == sub_optab)
1971 && mclass == MODE_INT
1972 && GET_MODE_SIZE (mode) >= 2 * UNITS_PER_WORD
1973 && optab_handler (binoptab, word_mode)->insn_code != CODE_FOR_nothing)
1976 optab otheroptab = binoptab == add_optab ? sub_optab : add_optab;
1977 const unsigned int nwords = GET_MODE_BITSIZE (mode) / BITS_PER_WORD;
1978 rtx carry_in = NULL_RTX, carry_out = NULL_RTX;
1979 rtx xop0, xop1, xtarget;
1981 /* We can handle either a 1 or -1 value for the carry. If STORE_FLAG
1982 value is one of those, use it. Otherwise, use 1 since it is the
1983 one easiest to get. */
1984 #if STORE_FLAG_VALUE == 1 || STORE_FLAG_VALUE == -1
1985 int normalizep = STORE_FLAG_VALUE;
1990 /* Prepare the operands. */
1991 xop0 = force_reg (mode, op0);
1992 xop1 = force_reg (mode, op1);
1994 xtarget = gen_reg_rtx (mode);
1996 if (target == 0 || !REG_P (target))
1999 /* Indicate for flow that the entire target reg is being set. */
2001 emit_clobber (xtarget);
2003 /* Do the actual arithmetic. */
2004 for (i = 0; i < nwords; i++)
2006 int index = (WORDS_BIG_ENDIAN ? nwords - i - 1 : i);
2007 rtx target_piece = operand_subword (xtarget, index, 1, mode);
2008 rtx op0_piece = operand_subword_force (xop0, index, mode);
2009 rtx op1_piece = operand_subword_force (xop1, index, mode);
2012 /* Main add/subtract of the input operands. */
2013 x = expand_binop (word_mode, binoptab,
2014 op0_piece, op1_piece,
2015 target_piece, unsignedp, next_methods);
2021 /* Store carry from main add/subtract. */
2022 carry_out = gen_reg_rtx (word_mode);
2023 carry_out = emit_store_flag_force (carry_out,
2024 (binoptab == add_optab
2027 word_mode, 1, normalizep);
2034 /* Add/subtract previous carry to main result. */
2035 newx = expand_binop (word_mode,
2036 normalizep == 1 ? binoptab : otheroptab,
2038 NULL_RTX, 1, next_methods);
2042 /* Get out carry from adding/subtracting carry in. */
2043 rtx carry_tmp = gen_reg_rtx (word_mode);
2044 carry_tmp = emit_store_flag_force (carry_tmp,
2045 (binoptab == add_optab
2048 word_mode, 1, normalizep);
2050 /* Logical-ior the two poss. carry together. */
2051 carry_out = expand_binop (word_mode, ior_optab,
2052 carry_out, carry_tmp,
2053 carry_out, 0, next_methods);
2057 emit_move_insn (target_piece, newx);
2061 if (x != target_piece)
2062 emit_move_insn (target_piece, x);
2065 carry_in = carry_out;
2068 if (i == GET_MODE_BITSIZE (mode) / (unsigned) BITS_PER_WORD)
2070 if (optab_handler (mov_optab, mode)->insn_code != CODE_FOR_nothing
2071 || ! rtx_equal_p (target, xtarget))
2073 rtx temp = emit_move_insn (target, xtarget);
2075 set_unique_reg_note (temp,
2077 gen_rtx_fmt_ee (binoptab->code, mode,
2088 delete_insns_since (last);
2091 /* Attempt to synthesize double word multiplies using a sequence of word
2092 mode multiplications. We first attempt to generate a sequence using a
2093 more efficient unsigned widening multiply, and if that fails we then
2094 try using a signed widening multiply. */
2096 if (binoptab == smul_optab
2097 && mclass == MODE_INT
2098 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
2099 && optab_handler (smul_optab, word_mode)->insn_code != CODE_FOR_nothing
2100 && optab_handler (add_optab, word_mode)->insn_code != CODE_FOR_nothing)
2102 rtx product = NULL_RTX;
2104 if (optab_handler (umul_widen_optab, mode)->insn_code
2105 != CODE_FOR_nothing)
2107 product = expand_doubleword_mult (mode, op0, op1, target,
2110 delete_insns_since (last);
2113 if (product == NULL_RTX
2114 && optab_handler (smul_widen_optab, mode)->insn_code
2115 != CODE_FOR_nothing)
2117 product = expand_doubleword_mult (mode, op0, op1, target,
2120 delete_insns_since (last);
2123 if (product != NULL_RTX)
2125 if (optab_handler (mov_optab, mode)->insn_code != CODE_FOR_nothing)
2127 temp = emit_move_insn (target ? target : product, product);
2128 set_unique_reg_note (temp,
2130 gen_rtx_fmt_ee (MULT, mode,
2138 /* It can't be open-coded in this mode.
2139 Use a library call if one is available and caller says that's ok. */
2141 libfunc = optab_libfunc (binoptab, mode);
2143 && (methods == OPTAB_LIB || methods == OPTAB_LIB_WIDEN))
2147 enum machine_mode op1_mode = mode;
2152 if (shift_optab_p (binoptab))
2154 op1_mode = targetm.libgcc_shift_count_mode ();
2155 /* Specify unsigned here,
2156 since negative shift counts are meaningless. */
2157 op1x = convert_to_mode (op1_mode, op1, 1);
2160 if (GET_MODE (op0) != VOIDmode
2161 && GET_MODE (op0) != mode)
2162 op0 = convert_to_mode (mode, op0, unsignedp);
2164 /* Pass 1 for NO_QUEUE so we don't lose any increments
2165 if the libcall is cse'd or moved. */
2166 value = emit_library_call_value (libfunc,
2167 NULL_RTX, LCT_CONST, mode, 2,
2168 op0, mode, op1x, op1_mode);
2170 insns = get_insns ();
2173 target = gen_reg_rtx (mode);
2174 emit_libcall_block (insns, target, value,
2175 gen_rtx_fmt_ee (binoptab->code, mode, op0, op1));
2180 delete_insns_since (last);
2182 /* It can't be done in this mode. Can we do it in a wider mode? */
2184 if (! (methods == OPTAB_WIDEN || methods == OPTAB_LIB_WIDEN
2185 || methods == OPTAB_MUST_WIDEN))
2187 /* Caller says, don't even try. */
2188 delete_insns_since (entry_last);
2192 /* Compute the value of METHODS to pass to recursive calls.
2193 Don't allow widening to be tried recursively. */
2195 methods = (methods == OPTAB_LIB_WIDEN ? OPTAB_LIB : OPTAB_DIRECT);
2197 /* Look for a wider mode of the same class for which it appears we can do
2200 if (CLASS_HAS_WIDER_MODES_P (mclass))
2202 for (wider_mode = GET_MODE_WIDER_MODE (mode);
2203 wider_mode != VOIDmode;
2204 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
2206 if ((optab_handler (binoptab, wider_mode)->insn_code
2207 != CODE_FOR_nothing)
2208 || (methods == OPTAB_LIB
2209 && optab_libfunc (binoptab, wider_mode)))
2211 rtx xop0 = op0, xop1 = op1;
2214 /* For certain integer operations, we need not actually extend
2215 the narrow operands, as long as we will truncate
2216 the results to the same narrowness. */
2218 if ((binoptab == ior_optab || binoptab == and_optab
2219 || binoptab == xor_optab
2220 || binoptab == add_optab || binoptab == sub_optab
2221 || binoptab == smul_optab || binoptab == ashl_optab)
2222 && mclass == MODE_INT)
2225 xop0 = widen_operand (xop0, wider_mode, mode,
2226 unsignedp, no_extend);
2228 /* The second operand of a shift must always be extended. */
2229 xop1 = widen_operand (xop1, wider_mode, mode, unsignedp,
2230 no_extend && binoptab != ashl_optab);
2232 temp = expand_binop (wider_mode, binoptab, xop0, xop1, NULL_RTX,
2233 unsignedp, methods);
2236 if (mclass != MODE_INT
2237 || !TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (mode),
2238 GET_MODE_BITSIZE (wider_mode)))
2241 target = gen_reg_rtx (mode);
2242 convert_move (target, temp, 0);
2246 return gen_lowpart (mode, temp);
2249 delete_insns_since (last);
2254 delete_insns_since (entry_last);
2258 /* Expand a binary operator which has both signed and unsigned forms.
2259 UOPTAB is the optab for unsigned operations, and SOPTAB is for
2262 If we widen unsigned operands, we may use a signed wider operation instead
2263 of an unsigned wider operation, since the result would be the same. */
2266 sign_expand_binop (enum machine_mode mode, optab uoptab, optab soptab,
2267 rtx op0, rtx op1, rtx target, int unsignedp,
2268 enum optab_methods methods)
2271 optab direct_optab = unsignedp ? uoptab : soptab;
2272 struct optab wide_soptab;
2274 /* Do it without widening, if possible. */
2275 temp = expand_binop (mode, direct_optab, op0, op1, target,
2276 unsignedp, OPTAB_DIRECT);
2277 if (temp || methods == OPTAB_DIRECT)
2280 /* Try widening to a signed int. Make a fake signed optab that
2281 hides any signed insn for direct use. */
2282 wide_soptab = *soptab;
2283 optab_handler (&wide_soptab, mode)->insn_code = CODE_FOR_nothing;
2284 /* We don't want to generate new hash table entries from this fake
2286 wide_soptab.libcall_gen = NULL;
2288 temp = expand_binop (mode, &wide_soptab, op0, op1, target,
2289 unsignedp, OPTAB_WIDEN);
2291 /* For unsigned operands, try widening to an unsigned int. */
2292 if (temp == 0 && unsignedp)
2293 temp = expand_binop (mode, uoptab, op0, op1, target,
2294 unsignedp, OPTAB_WIDEN);
2295 if (temp || methods == OPTAB_WIDEN)
2298 /* Use the right width lib call if that exists. */
2299 temp = expand_binop (mode, direct_optab, op0, op1, target, unsignedp, OPTAB_LIB);
2300 if (temp || methods == OPTAB_LIB)
2303 /* Must widen and use a lib call, use either signed or unsigned. */
2304 temp = expand_binop (mode, &wide_soptab, op0, op1, target,
2305 unsignedp, methods);
2309 return expand_binop (mode, uoptab, op0, op1, target,
2310 unsignedp, methods);
2314 /* Generate code to perform an operation specified by UNOPPTAB
2315 on operand OP0, with two results to TARG0 and TARG1.
2316 We assume that the order of the operands for the instruction
2317 is TARG0, TARG1, OP0.
2319 Either TARG0 or TARG1 may be zero, but what that means is that
2320 the result is not actually wanted. We will generate it into
2321 a dummy pseudo-reg and discard it. They may not both be zero.
2323 Returns 1 if this operation can be performed; 0 if not. */
2326 expand_twoval_unop (optab unoptab, rtx op0, rtx targ0, rtx targ1,
2329 enum machine_mode mode = GET_MODE (targ0 ? targ0 : targ1);
2330 enum mode_class mclass;
2331 enum machine_mode wider_mode;
2332 rtx entry_last = get_last_insn ();
2335 mclass = GET_MODE_CLASS (mode);
2338 targ0 = gen_reg_rtx (mode);
2340 targ1 = gen_reg_rtx (mode);
2342 /* Record where to go back to if we fail. */
2343 last = get_last_insn ();
2345 if (optab_handler (unoptab, mode)->insn_code != CODE_FOR_nothing)
2347 int icode = (int) optab_handler (unoptab, mode)->insn_code;
2348 enum machine_mode mode0 = insn_data[icode].operand[2].mode;
2352 if (GET_MODE (xop0) != VOIDmode
2353 && GET_MODE (xop0) != mode0)
2354 xop0 = convert_to_mode (mode0, xop0, unsignedp);
2356 /* Now, if insn doesn't accept these operands, put them into pseudos. */
2357 if (!insn_data[icode].operand[2].predicate (xop0, mode0))
2358 xop0 = copy_to_mode_reg (mode0, xop0);
2360 /* We could handle this, but we should always be called with a pseudo
2361 for our targets and all insns should take them as outputs. */
2362 gcc_assert (insn_data[icode].operand[0].predicate (targ0, mode));
2363 gcc_assert (insn_data[icode].operand[1].predicate (targ1, mode));
2365 pat = GEN_FCN (icode) (targ0, targ1, xop0);
2372 delete_insns_since (last);
2375 /* It can't be done in this mode. Can we do it in a wider mode? */
2377 if (CLASS_HAS_WIDER_MODES_P (mclass))
2379 for (wider_mode = GET_MODE_WIDER_MODE (mode);
2380 wider_mode != VOIDmode;
2381 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
2383 if (optab_handler (unoptab, wider_mode)->insn_code
2384 != CODE_FOR_nothing)
2386 rtx t0 = gen_reg_rtx (wider_mode);
2387 rtx t1 = gen_reg_rtx (wider_mode);
2388 rtx cop0 = convert_modes (wider_mode, mode, op0, unsignedp);
2390 if (expand_twoval_unop (unoptab, cop0, t0, t1, unsignedp))
2392 convert_move (targ0, t0, unsignedp);
2393 convert_move (targ1, t1, unsignedp);
2397 delete_insns_since (last);
2402 delete_insns_since (entry_last);
2406 /* Generate code to perform an operation specified by BINOPTAB
2407 on operands OP0 and OP1, with two results to TARG1 and TARG2.
2408 We assume that the order of the operands for the instruction
2409 is TARG0, OP0, OP1, TARG1, which would fit a pattern like
2410 [(set TARG0 (operate OP0 OP1)) (set TARG1 (operate ...))].
2412 Either TARG0 or TARG1 may be zero, but what that means is that
2413 the result is not actually wanted. We will generate it into
2414 a dummy pseudo-reg and discard it. They may not both be zero.
2416 Returns 1 if this operation can be performed; 0 if not. */
2419 expand_twoval_binop (optab binoptab, rtx op0, rtx op1, rtx targ0, rtx targ1,
2422 enum machine_mode mode = GET_MODE (targ0 ? targ0 : targ1);
2423 enum mode_class mclass;
2424 enum machine_mode wider_mode;
2425 rtx entry_last = get_last_insn ();
2428 mclass = GET_MODE_CLASS (mode);
2431 targ0 = gen_reg_rtx (mode);
2433 targ1 = gen_reg_rtx (mode);
2435 /* Record where to go back to if we fail. */
2436 last = get_last_insn ();
2438 if (optab_handler (binoptab, mode)->insn_code != CODE_FOR_nothing)
2440 int icode = (int) optab_handler (binoptab, mode)->insn_code;
2441 enum machine_mode mode0 = insn_data[icode].operand[1].mode;
2442 enum machine_mode mode1 = insn_data[icode].operand[2].mode;
2444 rtx xop0 = op0, xop1 = op1;
2446 /* If we are optimizing, force expensive constants into a register. */
2447 xop0 = avoid_expensive_constant (mode0, binoptab, xop0, unsignedp);
2448 xop1 = avoid_expensive_constant (mode1, binoptab, xop1, unsignedp);
2450 /* In case the insn wants input operands in modes different from
2451 those of the actual operands, convert the operands. It would
2452 seem that we don't need to convert CONST_INTs, but we do, so
2453 that they're properly zero-extended, sign-extended or truncated
2456 if (GET_MODE (op0) != mode0 && mode0 != VOIDmode)
2457 xop0 = convert_modes (mode0,
2458 GET_MODE (op0) != VOIDmode
2463 if (GET_MODE (op1) != mode1 && mode1 != VOIDmode)
2464 xop1 = convert_modes (mode1,
2465 GET_MODE (op1) != VOIDmode
2470 /* Now, if insn doesn't accept these operands, put them into pseudos. */
2471 if (!insn_data[icode].operand[1].predicate (xop0, mode0))
2472 xop0 = copy_to_mode_reg (mode0, xop0);
2474 if (!insn_data[icode].operand[2].predicate (xop1, mode1))
2475 xop1 = copy_to_mode_reg (mode1, xop1);
2477 /* We could handle this, but we should always be called with a pseudo
2478 for our targets and all insns should take them as outputs. */
2479 gcc_assert (insn_data[icode].operand[0].predicate (targ0, mode));
2480 gcc_assert (insn_data[icode].operand[3].predicate (targ1, mode));
2482 pat = GEN_FCN (icode) (targ0, xop0, xop1, targ1);
2489 delete_insns_since (last);
2492 /* It can't be done in this mode. Can we do it in a wider mode? */
2494 if (CLASS_HAS_WIDER_MODES_P (mclass))
2496 for (wider_mode = GET_MODE_WIDER_MODE (mode);
2497 wider_mode != VOIDmode;
2498 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
2500 if (optab_handler (binoptab, wider_mode)->insn_code
2501 != CODE_FOR_nothing)
2503 rtx t0 = gen_reg_rtx (wider_mode);
2504 rtx t1 = gen_reg_rtx (wider_mode);
2505 rtx cop0 = convert_modes (wider_mode, mode, op0, unsignedp);
2506 rtx cop1 = convert_modes (wider_mode, mode, op1, unsignedp);
2508 if (expand_twoval_binop (binoptab, cop0, cop1,
2511 convert_move (targ0, t0, unsignedp);
2512 convert_move (targ1, t1, unsignedp);
2516 delete_insns_since (last);
2521 delete_insns_since (entry_last);
2525 /* Expand the two-valued library call indicated by BINOPTAB, but
2526 preserve only one of the values. If TARG0 is non-NULL, the first
2527 value is placed into TARG0; otherwise the second value is placed
2528 into TARG1. Exactly one of TARG0 and TARG1 must be non-NULL. The
2529 value stored into TARG0 or TARG1 is equivalent to (CODE OP0 OP1).
2530 This routine assumes that the value returned by the library call is
2531 as if the return value was of an integral mode twice as wide as the
2532 mode of OP0. Returns 1 if the call was successful. */
2535 expand_twoval_binop_libfunc (optab binoptab, rtx op0, rtx op1,
2536 rtx targ0, rtx targ1, enum rtx_code code)
2538 enum machine_mode mode;
2539 enum machine_mode libval_mode;
2544 /* Exactly one of TARG0 or TARG1 should be non-NULL. */
2545 gcc_assert (!targ0 != !targ1);
2547 mode = GET_MODE (op0);
2548 libfunc = optab_libfunc (binoptab, mode);
2552 /* The value returned by the library function will have twice as
2553 many bits as the nominal MODE. */
2554 libval_mode = smallest_mode_for_size (2 * GET_MODE_BITSIZE (mode),
2557 libval = emit_library_call_value (libfunc, NULL_RTX, LCT_CONST,
2561 /* Get the part of VAL containing the value that we want. */
2562 libval = simplify_gen_subreg (mode, libval, libval_mode,
2563 targ0 ? 0 : GET_MODE_SIZE (mode));
2564 insns = get_insns ();
2566 /* Move the into the desired location. */
2567 emit_libcall_block (insns, targ0 ? targ0 : targ1, libval,
2568 gen_rtx_fmt_ee (code, mode, op0, op1));
2574 /* Wrapper around expand_unop which takes an rtx code to specify
2575 the operation to perform, not an optab pointer. All other
2576 arguments are the same. */
2578 expand_simple_unop (enum machine_mode mode, enum rtx_code code, rtx op0,
2579 rtx target, int unsignedp)
2581 optab unop = code_to_optab[(int) code];
2584 return expand_unop (mode, unop, op0, target, unsignedp);
2590 (clz:wide (zero_extend:wide x)) - ((width wide) - (width narrow)). */
2592 widen_clz (enum machine_mode mode, rtx op0, rtx target)
2594 enum mode_class mclass = GET_MODE_CLASS (mode);
2595 if (CLASS_HAS_WIDER_MODES_P (mclass))
2597 enum machine_mode wider_mode;
2598 for (wider_mode = GET_MODE_WIDER_MODE (mode);
2599 wider_mode != VOIDmode;
2600 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
2602 if (optab_handler (clz_optab, wider_mode)->insn_code
2603 != CODE_FOR_nothing)
2605 rtx xop0, temp, last;
2607 last = get_last_insn ();
2610 target = gen_reg_rtx (mode);
2611 xop0 = widen_operand (op0, wider_mode, mode, true, false);
2612 temp = expand_unop (wider_mode, clz_optab, xop0, NULL_RTX, true);
2614 temp = expand_binop (wider_mode, sub_optab, temp,
2615 GEN_INT (GET_MODE_BITSIZE (wider_mode)
2616 - GET_MODE_BITSIZE (mode)),
2617 target, true, OPTAB_DIRECT);
2619 delete_insns_since (last);
2628 /* Try calculating clz of a double-word quantity as two clz's of word-sized
2629 quantities, choosing which based on whether the high word is nonzero. */
2631 expand_doubleword_clz (enum machine_mode mode, rtx op0, rtx target)
2633 rtx xop0 = force_reg (mode, op0);
2634 rtx subhi = gen_highpart (word_mode, xop0);
2635 rtx sublo = gen_lowpart (word_mode, xop0);
2636 rtx hi0_label = gen_label_rtx ();
2637 rtx after_label = gen_label_rtx ();
2638 rtx seq, temp, result;
2640 /* If we were not given a target, use a word_mode register, not a
2641 'mode' register. The result will fit, and nobody is expecting
2642 anything bigger (the return type of __builtin_clz* is int). */
2644 target = gen_reg_rtx (word_mode);
2646 /* In any case, write to a word_mode scratch in both branches of the
2647 conditional, so we can ensure there is a single move insn setting
2648 'target' to tag a REG_EQUAL note on. */
2649 result = gen_reg_rtx (word_mode);
2653 /* If the high word is not equal to zero,
2654 then clz of the full value is clz of the high word. */
2655 emit_cmp_and_jump_insns (subhi, CONST0_RTX (word_mode), EQ, 0,
2656 word_mode, true, hi0_label);
2658 temp = expand_unop_direct (word_mode, clz_optab, subhi, result, true);
2663 convert_move (result, temp, true);
2665 emit_jump_insn (gen_jump (after_label));
2668 /* Else clz of the full value is clz of the low word plus the number
2669 of bits in the high word. */
2670 emit_label (hi0_label);
2672 temp = expand_unop_direct (word_mode, clz_optab, sublo, 0, true);
2675 temp = expand_binop (word_mode, add_optab, temp,
2676 GEN_INT (GET_MODE_BITSIZE (word_mode)),
2677 result, true, OPTAB_DIRECT);
2681 convert_move (result, temp, true);
2683 emit_label (after_label);
2684 convert_move (target, result, true);
2689 add_equal_note (seq, target, CLZ, xop0, 0);
2701 (lshiftrt:wide (bswap:wide x) ((width wide) - (width narrow))). */
2703 widen_bswap (enum machine_mode mode, rtx op0, rtx target)
2705 enum mode_class mclass = GET_MODE_CLASS (mode);
2706 enum machine_mode wider_mode;
2709 if (!CLASS_HAS_WIDER_MODES_P (mclass))
2712 for (wider_mode = GET_MODE_WIDER_MODE (mode);
2713 wider_mode != VOIDmode;
2714 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
2715 if (optab_handler (bswap_optab, wider_mode)->insn_code != CODE_FOR_nothing)
2720 last = get_last_insn ();
2722 x = widen_operand (op0, wider_mode, mode, true, true);
2723 x = expand_unop (wider_mode, bswap_optab, x, NULL_RTX, true);
2726 x = expand_shift (RSHIFT_EXPR, wider_mode, x,
2727 size_int (GET_MODE_BITSIZE (wider_mode)
2728 - GET_MODE_BITSIZE (mode)),
2734 target = gen_reg_rtx (mode);
2735 emit_move_insn (target, gen_lowpart (mode, x));
2738 delete_insns_since (last);
2743 /* Try calculating bswap as two bswaps of two word-sized operands. */
2746 expand_doubleword_bswap (enum machine_mode mode, rtx op, rtx target)
2750 t1 = expand_unop (word_mode, bswap_optab,
2751 operand_subword_force (op, 0, mode), NULL_RTX, true);
2752 t0 = expand_unop (word_mode, bswap_optab,
2753 operand_subword_force (op, 1, mode), NULL_RTX, true);
2756 target = gen_reg_rtx (mode);
2758 emit_clobber (target);
2759 emit_move_insn (operand_subword (target, 0, 1, mode), t0);
2760 emit_move_insn (operand_subword (target, 1, 1, mode), t1);
2765 /* Try calculating (parity x) as (and (popcount x) 1), where
2766 popcount can also be done in a wider mode. */
2768 expand_parity (enum machine_mode mode, rtx op0, rtx target)
2770 enum mode_class mclass = GET_MODE_CLASS (mode);
2771 if (CLASS_HAS_WIDER_MODES_P (mclass))
2773 enum machine_mode wider_mode;
2774 for (wider_mode = mode; wider_mode != VOIDmode;
2775 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
2777 if (optab_handler (popcount_optab, wider_mode)->insn_code
2778 != CODE_FOR_nothing)
2780 rtx xop0, temp, last;
2782 last = get_last_insn ();
2785 target = gen_reg_rtx (mode);
2786 xop0 = widen_operand (op0, wider_mode, mode, true, false);
2787 temp = expand_unop (wider_mode, popcount_optab, xop0, NULL_RTX,
2790 temp = expand_binop (wider_mode, and_optab, temp, const1_rtx,
2791 target, true, OPTAB_DIRECT);
2793 delete_insns_since (last);
2802 /* Try calculating ctz(x) as K - clz(x & -x) ,
2803 where K is GET_MODE_BITSIZE(mode) - 1.
2805 Both __builtin_ctz and __builtin_clz are undefined at zero, so we
2806 don't have to worry about what the hardware does in that case. (If
2807 the clz instruction produces the usual value at 0, which is K, the
2808 result of this code sequence will be -1; expand_ffs, below, relies
2809 on this. It might be nice to have it be K instead, for consistency
2810 with the (very few) processors that provide a ctz with a defined
2811 value, but that would take one more instruction, and it would be
2812 less convenient for expand_ffs anyway. */
2815 expand_ctz (enum machine_mode mode, rtx op0, rtx target)
2819 if (optab_handler (clz_optab, mode)->insn_code == CODE_FOR_nothing)
2824 temp = expand_unop_direct (mode, neg_optab, op0, NULL_RTX, true);
2826 temp = expand_binop (mode, and_optab, op0, temp, NULL_RTX,
2827 true, OPTAB_DIRECT);
2829 temp = expand_unop_direct (mode, clz_optab, temp, NULL_RTX, true);
2831 temp = expand_binop (mode, sub_optab, GEN_INT (GET_MODE_BITSIZE (mode) - 1),
2833 true, OPTAB_DIRECT);
2843 add_equal_note (seq, temp, CTZ, op0, 0);
2849 /* Try calculating ffs(x) using ctz(x) if we have that instruction, or
2850 else with the sequence used by expand_clz.
2852 The ffs builtin promises to return zero for a zero value and ctz/clz
2853 may have an undefined value in that case. If they do not give us a
2854 convenient value, we have to generate a test and branch. */
2856 expand_ffs (enum machine_mode mode, rtx op0, rtx target)
2858 HOST_WIDE_INT val = 0;
2859 bool defined_at_zero = false;
2862 if (optab_handler (ctz_optab, mode)->insn_code != CODE_FOR_nothing)
2866 temp = expand_unop_direct (mode, ctz_optab, op0, 0, true);
2870 defined_at_zero = (CTZ_DEFINED_VALUE_AT_ZERO (mode, val) == 2);
2872 else if (optab_handler (clz_optab, mode)->insn_code != CODE_FOR_nothing)
2875 temp = expand_ctz (mode, op0, 0);
2879 if (CLZ_DEFINED_VALUE_AT_ZERO (mode, val) == 2)
2881 defined_at_zero = true;
2882 val = (GET_MODE_BITSIZE (mode) - 1) - val;
2888 if (defined_at_zero && val == -1)
2889 /* No correction needed at zero. */;
2892 /* We don't try to do anything clever with the situation found
2893 on some processors (eg Alpha) where ctz(0:mode) ==
2894 bitsize(mode). If someone can think of a way to send N to -1
2895 and leave alone all values in the range 0..N-1 (where N is a
2896 power of two), cheaper than this test-and-branch, please add it.
2898 The test-and-branch is done after the operation itself, in case
2899 the operation sets condition codes that can be recycled for this.
2900 (This is true on i386, for instance.) */
2902 rtx nonzero_label = gen_label_rtx ();
2903 emit_cmp_and_jump_insns (op0, CONST0_RTX (mode), NE, 0,
2904 mode, true, nonzero_label);
2906 convert_move (temp, GEN_INT (-1), false);
2907 emit_label (nonzero_label);
2910 /* temp now has a value in the range -1..bitsize-1. ffs is supposed
2911 to produce a value in the range 0..bitsize. */
2912 temp = expand_binop (mode, add_optab, temp, GEN_INT (1),
2913 target, false, OPTAB_DIRECT);
2920 add_equal_note (seq, temp, FFS, op0, 0);
2929 /* Extract the OMODE lowpart from VAL, which has IMODE. Under certain
2930 conditions, VAL may already be a SUBREG against which we cannot generate
2931 a further SUBREG. In this case, we expect forcing the value into a
2932 register will work around the situation. */
2935 lowpart_subreg_maybe_copy (enum machine_mode omode, rtx val,
2936 enum machine_mode imode)
2939 ret = lowpart_subreg (omode, val, imode);
2942 val = force_reg (imode, val);
2943 ret = lowpart_subreg (omode, val, imode);
2944 gcc_assert (ret != NULL);
2949 /* Expand a floating point absolute value or negation operation via a
2950 logical operation on the sign bit. */
2953 expand_absneg_bit (enum rtx_code code, enum machine_mode mode,
2954 rtx op0, rtx target)
2956 const struct real_format *fmt;
2957 int bitpos, word, nwords, i;
2958 enum machine_mode imode;
2959 HOST_WIDE_INT hi, lo;
2962 /* The format has to have a simple sign bit. */
2963 fmt = REAL_MODE_FORMAT (mode);
2967 bitpos = fmt->signbit_rw;
2971 /* Don't create negative zeros if the format doesn't support them. */
2972 if (code == NEG && !fmt->has_signed_zero)
2975 if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD)
2977 imode = int_mode_for_mode (mode);
2978 if (imode == BLKmode)
2987 if (FLOAT_WORDS_BIG_ENDIAN)
2988 word = (GET_MODE_BITSIZE (mode) - bitpos) / BITS_PER_WORD;
2990 word = bitpos / BITS_PER_WORD;
2991 bitpos = bitpos % BITS_PER_WORD;
2992 nwords = (GET_MODE_BITSIZE (mode) + BITS_PER_WORD - 1) / BITS_PER_WORD;
2995 if (bitpos < HOST_BITS_PER_WIDE_INT)
2998 lo = (HOST_WIDE_INT) 1 << bitpos;
3002 hi = (HOST_WIDE_INT) 1 << (bitpos - HOST_BITS_PER_WIDE_INT);
3008 if (target == 0 || target == op0)
3009 target = gen_reg_rtx (mode);
3015 for (i = 0; i < nwords; ++i)
3017 rtx targ_piece = operand_subword (target, i, 1, mode);
3018 rtx op0_piece = operand_subword_force (op0, i, mode);
3022 temp = expand_binop (imode, code == ABS ? and_optab : xor_optab,
3024 immed_double_const (lo, hi, imode),
3025 targ_piece, 1, OPTAB_LIB_WIDEN);
3026 if (temp != targ_piece)
3027 emit_move_insn (targ_piece, temp);
3030 emit_move_insn (targ_piece, op0_piece);
3033 insns = get_insns ();
3040 temp = expand_binop (imode, code == ABS ? and_optab : xor_optab,
3041 gen_lowpart (imode, op0),
3042 immed_double_const (lo, hi, imode),
3043 gen_lowpart (imode, target), 1, OPTAB_LIB_WIDEN);
3044 target = lowpart_subreg_maybe_copy (mode, temp, imode);
3046 set_unique_reg_note (get_last_insn (), REG_EQUAL,
3047 gen_rtx_fmt_e (code, mode, copy_rtx (op0)));
3053 /* As expand_unop, but will fail rather than attempt the operation in a
3054 different mode or with a libcall. */
3056 expand_unop_direct (enum machine_mode mode, optab unoptab, rtx op0, rtx target,
3059 if (optab_handler (unoptab, mode)->insn_code != CODE_FOR_nothing)
3061 int icode = (int) optab_handler (unoptab, mode)->insn_code;
3062 enum machine_mode mode0 = insn_data[icode].operand[1].mode;
3064 rtx last = get_last_insn ();
3070 temp = gen_reg_rtx (mode);
3072 if (GET_MODE (xop0) != VOIDmode
3073 && GET_MODE (xop0) != mode0)
3074 xop0 = convert_to_mode (mode0, xop0, unsignedp);
3076 /* Now, if insn doesn't accept our operand, put it into a pseudo. */
3078 if (!insn_data[icode].operand[1].predicate (xop0, mode0))
3079 xop0 = copy_to_mode_reg (mode0, xop0);
3081 if (!insn_data[icode].operand[0].predicate (temp, mode))
3082 temp = gen_reg_rtx (mode);
3084 pat = GEN_FCN (icode) (temp, xop0);
3087 if (INSN_P (pat) && NEXT_INSN (pat) != NULL_RTX
3088 && ! add_equal_note (pat, temp, unoptab->code, xop0, NULL_RTX))
3090 delete_insns_since (last);
3091 return expand_unop (mode, unoptab, op0, NULL_RTX, unsignedp);
3099 delete_insns_since (last);
3104 /* Generate code to perform an operation specified by UNOPTAB
3105 on operand OP0, with result having machine-mode MODE.
3107 UNSIGNEDP is for the case where we have to widen the operands
3108 to perform the operation. It says to use zero-extension.
3110 If TARGET is nonzero, the value
3111 is generated there, if it is convenient to do so.
3112 In all cases an rtx is returned for the locus of the value;
3113 this may or may not be TARGET. */
3116 expand_unop (enum machine_mode mode, optab unoptab, rtx op0, rtx target,
3119 enum mode_class mclass = GET_MODE_CLASS (mode);
3120 enum machine_mode wider_mode;
3124 temp = expand_unop_direct (mode, unoptab, op0, target, unsignedp);
3128 /* It can't be done in this mode. Can we open-code it in a wider mode? */
3130 /* Widening (or narrowing) clz needs special treatment. */
3131 if (unoptab == clz_optab)
3133 temp = widen_clz (mode, op0, target);
3137 if (GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
3138 && optab_handler (unoptab, word_mode)->insn_code != CODE_FOR_nothing)
3140 temp = expand_doubleword_clz (mode, op0, target);
3148 /* Widening (or narrowing) bswap needs special treatment. */
3149 if (unoptab == bswap_optab)
3151 temp = widen_bswap (mode, op0, target);
3155 if (GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
3156 && optab_handler (unoptab, word_mode)->insn_code != CODE_FOR_nothing)
3158 temp = expand_doubleword_bswap (mode, op0, target);
3166 if (CLASS_HAS_WIDER_MODES_P (mclass))
3167 for (wider_mode = GET_MODE_WIDER_MODE (mode);
3168 wider_mode != VOIDmode;
3169 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
3171 if (optab_handler (unoptab, wider_mode)->insn_code != CODE_FOR_nothing)
3174 rtx last = get_last_insn ();
3176 /* For certain operations, we need not actually extend
3177 the narrow operand, as long as we will truncate the
3178 results to the same narrowness. */
3180 xop0 = widen_operand (xop0, wider_mode, mode, unsignedp,
3181 (unoptab == neg_optab
3182 || unoptab == one_cmpl_optab)
3183 && mclass == MODE_INT);
3185 temp = expand_unop (wider_mode, unoptab, xop0, NULL_RTX,
3190 if (mclass != MODE_INT
3191 || !TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (mode),
3192 GET_MODE_BITSIZE (wider_mode)))
3195 target = gen_reg_rtx (mode);
3196 convert_move (target, temp, 0);
3200 return gen_lowpart (mode, temp);
3203 delete_insns_since (last);
3207 /* These can be done a word at a time. */
3208 if (unoptab == one_cmpl_optab
3209 && mclass == MODE_INT
3210 && GET_MODE_SIZE (mode) > UNITS_PER_WORD
3211 && optab_handler (unoptab, word_mode)->insn_code != CODE_FOR_nothing)
3216 if (target == 0 || target == op0)
3217 target = gen_reg_rtx (mode);
3221 /* Do the actual arithmetic. */
3222 for (i = 0; i < GET_MODE_BITSIZE (mode) / BITS_PER_WORD; i++)
3224 rtx target_piece = operand_subword (target, i, 1, mode);
3225 rtx x = expand_unop (word_mode, unoptab,
3226 operand_subword_force (op0, i, mode),
3227 target_piece, unsignedp);
3229 if (target_piece != x)
3230 emit_move_insn (target_piece, x);
3233 insns = get_insns ();
3240 if (unoptab->code == NEG)
3242 /* Try negating floating point values by flipping the sign bit. */
3243 if (SCALAR_FLOAT_MODE_P (mode))
3245 temp = expand_absneg_bit (NEG, mode, op0, target);
3250 /* If there is no negation pattern, and we have no negative zero,
3251 try subtracting from zero. */
3252 if (!HONOR_SIGNED_ZEROS (mode))
3254 temp = expand_binop (mode, (unoptab == negv_optab
3255 ? subv_optab : sub_optab),
3256 CONST0_RTX (mode), op0, target,
3257 unsignedp, OPTAB_DIRECT);
3263 /* Try calculating parity (x) as popcount (x) % 2. */
3264 if (unoptab == parity_optab)
3266 temp = expand_parity (mode, op0, target);
3271 /* Try implementing ffs (x) in terms of clz (x). */
3272 if (unoptab == ffs_optab)
3274 temp = expand_ffs (mode, op0, target);
3279 /* Try implementing ctz (x) in terms of clz (x). */
3280 if (unoptab == ctz_optab)
3282 temp = expand_ctz (mode, op0, target);
3288 /* Now try a library call in this mode. */
3289 libfunc = optab_libfunc (unoptab, mode);
3295 enum machine_mode outmode = mode;
3297 /* All of these functions return small values. Thus we choose to
3298 have them return something that isn't a double-word. */
3299 if (unoptab == ffs_optab || unoptab == clz_optab || unoptab == ctz_optab
3300 || unoptab == popcount_optab || unoptab == parity_optab)
3302 = GET_MODE (hard_libcall_value (TYPE_MODE (integer_type_node)));
3306 /* Pass 1 for NO_QUEUE so we don't lose any increments
3307 if the libcall is cse'd or moved. */
3308 value = emit_library_call_value (libfunc, NULL_RTX, LCT_CONST, outmode,
3310 insns = get_insns ();
3313 target = gen_reg_rtx (outmode);
3314 eq_value = gen_rtx_fmt_e (unoptab->code, mode, op0);
3315 if (GET_MODE_SIZE (outmode) < GET_MODE_SIZE (mode))
3316 eq_value = simplify_gen_unary (TRUNCATE, outmode, eq_value, mode);
3317 else if (GET_MODE_SIZE (outmode) > GET_MODE_SIZE (mode))
3318 eq_value = simplify_gen_unary (ZERO_EXTEND, outmode, eq_value, mode);
3319 emit_libcall_block (insns, target, value, eq_value);
3324 /* It can't be done in this mode. Can we do it in a wider mode? */
3326 if (CLASS_HAS_WIDER_MODES_P (mclass))
3328 for (wider_mode = GET_MODE_WIDER_MODE (mode);
3329 wider_mode != VOIDmode;
3330 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
3332 if ((optab_handler (unoptab, wider_mode)->insn_code
3333 != CODE_FOR_nothing)
3334 || optab_libfunc (unoptab, wider_mode))
3337 rtx last = get_last_insn ();
3339 /* For certain operations, we need not actually extend
3340 the narrow operand, as long as we will truncate the
3341 results to the same narrowness. */
3343 xop0 = widen_operand (xop0, wider_mode, mode, unsignedp,
3344 (unoptab == neg_optab
3345 || unoptab == one_cmpl_optab)
3346 && mclass == MODE_INT);
3348 temp = expand_unop (wider_mode, unoptab, xop0, NULL_RTX,
3351 /* If we are generating clz using wider mode, adjust the
3353 if (unoptab == clz_optab && temp != 0)
3354 temp = expand_binop (wider_mode, sub_optab, temp,
3355 GEN_INT (GET_MODE_BITSIZE (wider_mode)
3356 - GET_MODE_BITSIZE (mode)),
3357 target, true, OPTAB_DIRECT);
3361 if (mclass != MODE_INT)
3364 target = gen_reg_rtx (mode);
3365 convert_move (target, temp, 0);
3369 return gen_lowpart (mode, temp);
3372 delete_insns_since (last);
3377 /* One final attempt at implementing negation via subtraction,
3378 this time allowing widening of the operand. */
3379 if (unoptab->code == NEG && !HONOR_SIGNED_ZEROS (mode))
3382 temp = expand_binop (mode,
3383 unoptab == negv_optab ? subv_optab : sub_optab,
3384 CONST0_RTX (mode), op0,
3385 target, unsignedp, OPTAB_LIB_WIDEN);
3393 /* Emit code to compute the absolute value of OP0, with result to
3394 TARGET if convenient. (TARGET may be 0.) The return value says
3395 where the result actually is to be found.
3397 MODE is the mode of the operand; the mode of the result is
3398 different but can be deduced from MODE.
3403 expand_abs_nojump (enum machine_mode mode, rtx op0, rtx target,
3404 int result_unsignedp)
3409 result_unsignedp = 1;
3411 /* First try to do it with a special abs instruction. */
3412 temp = expand_unop (mode, result_unsignedp ? abs_optab : absv_optab,
3417 /* For floating point modes, try clearing the sign bit. */
3418 if (SCALAR_FLOAT_MODE_P (mode))
3420 temp = expand_absneg_bit (ABS, mode, op0, target);
3425 /* If we have a MAX insn, we can do this as MAX (x, -x). */
3426 if (optab_handler (smax_optab, mode)->insn_code != CODE_FOR_nothing
3427 && !HONOR_SIGNED_ZEROS (mode))
3429 rtx last = get_last_insn ();
3431 temp = expand_unop (mode, neg_optab, op0, NULL_RTX, 0);
3433 temp = expand_binop (mode, smax_optab, op0, temp, target, 0,
3439 delete_insns_since (last);
3442 /* If this machine has expensive jumps, we can do integer absolute
3443 value of X as (((signed) x >> (W-1)) ^ x) - ((signed) x >> (W-1)),
3444 where W is the width of MODE. */
3446 if (GET_MODE_CLASS (mode) == MODE_INT && BRANCH_COST >= 2)
3448 rtx extended = expand_shift (RSHIFT_EXPR, mode, op0,
3449 size_int (GET_MODE_BITSIZE (mode) - 1),
3452 temp = expand_binop (mode, xor_optab, extended, op0, target, 0,
3455 temp = expand_binop (mode, result_unsignedp ? sub_optab : subv_optab,
3456 temp, extended, target, 0, OPTAB_LIB_WIDEN);
3466 expand_abs (enum machine_mode mode, rtx op0, rtx target,
3467 int result_unsignedp, int safe)
3472 result_unsignedp = 1;
3474 temp = expand_abs_nojump (mode, op0, target, result_unsignedp);
3478 /* If that does not win, use conditional jump and negate. */
3480 /* It is safe to use the target if it is the same
3481 as the source if this is also a pseudo register */
3482 if (op0 == target && REG_P (op0)
3483 && REGNO (op0) >= FIRST_PSEUDO_REGISTER)
3486 op1 = gen_label_rtx ();
3487 if (target == 0 || ! safe
3488 || GET_MODE (target) != mode
3489 || (MEM_P (target) && MEM_VOLATILE_P (target))
3491 && REGNO (target) < FIRST_PSEUDO_REGISTER))
3492 target = gen_reg_rtx (mode);
3494 emit_move_insn (target, op0);
3497 do_compare_rtx_and_jump (target, CONST0_RTX (mode), GE, 0, mode,
3498 NULL_RTX, NULL_RTX, op1);
3500 op0 = expand_unop (mode, result_unsignedp ? neg_optab : negv_optab,
3503 emit_move_insn (target, op0);
3509 /* A subroutine of expand_copysign, perform the copysign operation using the
3510 abs and neg primitives advertised to exist on the target. The assumption
3511 is that we have a split register file, and leaving op0 in fp registers,
3512 and not playing with subregs so much, will help the register allocator. */
3515 expand_copysign_absneg (enum machine_mode mode, rtx op0, rtx op1, rtx target,
3516 int bitpos, bool op0_is_abs)
3518 enum machine_mode imode;
3525 /* Check if the back end provides an insn that handles signbit for the
3527 icode = (int) signbit_optab->handlers [(int) mode].insn_code;
3528 if (icode != CODE_FOR_nothing)
3530 imode = insn_data[icode].operand[0].mode;
3531 sign = gen_reg_rtx (imode);
3532 emit_unop_insn (icode, sign, op1, UNKNOWN);
3536 HOST_WIDE_INT hi, lo;
3538 if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD)
3540 imode = int_mode_for_mode (mode);
3541 if (imode == BLKmode)
3543 op1 = gen_lowpart (imode, op1);
3550 if (FLOAT_WORDS_BIG_ENDIAN)
3551 word = (GET_MODE_BITSIZE (mode) - bitpos) / BITS_PER_WORD;
3553 word = bitpos / BITS_PER_WORD;
3554 bitpos = bitpos % BITS_PER_WORD;
3555 op1 = operand_subword_force (op1, word, mode);
3558 if (bitpos < HOST_BITS_PER_WIDE_INT)
3561 lo = (HOST_WIDE_INT) 1 << bitpos;
3565 hi = (HOST_WIDE_INT) 1 << (bitpos - HOST_BITS_PER_WIDE_INT);
3569 sign = gen_reg_rtx (imode);
3570 sign = expand_binop (imode, and_optab, op1,
3571 immed_double_const (lo, hi, imode),
3572 NULL_RTX, 1, OPTAB_LIB_WIDEN);
3577 op0 = expand_unop (mode, abs_optab, op0, target, 0);
3584 if (target == NULL_RTX)
3585 target = copy_to_reg (op0);
3587 emit_move_insn (target, op0);
3590 label = gen_label_rtx ();
3591 emit_cmp_and_jump_insns (sign, const0_rtx, EQ, NULL_RTX, imode, 1, label);
3593 if (GET_CODE (op0) == CONST_DOUBLE)
3594 op0 = simplify_unary_operation (NEG, mode, op0, mode);
3596 op0 = expand_unop (mode, neg_optab, op0, target, 0);
3598 emit_move_insn (target, op0);
3606 /* A subroutine of expand_copysign, perform the entire copysign operation
3607 with integer bitmasks. BITPOS is the position of the sign bit; OP0_IS_ABS
3608 is true if op0 is known to have its sign bit clear. */
3611 expand_copysign_bit (enum machine_mode mode, rtx op0, rtx op1, rtx target,
3612 int bitpos, bool op0_is_abs)
3614 enum machine_mode imode;
3615 HOST_WIDE_INT hi, lo;
3616 int word, nwords, i;
3619 if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD)
3621 imode = int_mode_for_mode (mode);
3622 if (imode == BLKmode)
3631 if (FLOAT_WORDS_BIG_ENDIAN)
3632 word = (GET_MODE_BITSIZE (mode) - bitpos) / BITS_PER_WORD;
3634 word = bitpos / BITS_PER_WORD;
3635 bitpos = bitpos % BITS_PER_WORD;
3636 nwords = (GET_MODE_BITSIZE (mode) + BITS_PER_WORD - 1) / BITS_PER_WORD;
3639 if (bitpos < HOST_BITS_PER_WIDE_INT)
3642 lo = (HOST_WIDE_INT) 1 << bitpos;
3646 hi = (HOST_WIDE_INT) 1 << (bitpos - HOST_BITS_PER_WIDE_INT);
3650 if (target == 0 || target == op0 || target == op1)
3651 target = gen_reg_rtx (mode);
3657 for (i = 0; i < nwords; ++i)
3659 rtx targ_piece = operand_subword (target, i, 1, mode);
3660 rtx op0_piece = operand_subword_force (op0, i, mode);
3665 op0_piece = expand_binop (imode, and_optab, op0_piece,
3666 immed_double_const (~lo, ~hi, imode),
3667 NULL_RTX, 1, OPTAB_LIB_WIDEN);
3669 op1 = expand_binop (imode, and_optab,
3670 operand_subword_force (op1, i, mode),
3671 immed_double_const (lo, hi, imode),
3672 NULL_RTX, 1, OPTAB_LIB_WIDEN);
3674 temp = expand_binop (imode, ior_optab, op0_piece, op1,
3675 targ_piece, 1, OPTAB_LIB_WIDEN);
3676 if (temp != targ_piece)
3677 emit_move_insn (targ_piece, temp);
3680 emit_move_insn (targ_piece, op0_piece);
3683 insns = get_insns ();
3690 op1 = expand_binop (imode, and_optab, gen_lowpart (imode, op1),
3691 immed_double_const (lo, hi, imode),
3692 NULL_RTX, 1, OPTAB_LIB_WIDEN);
3694 op0 = gen_lowpart (imode, op0);
3696 op0 = expand_binop (imode, and_optab, op0,
3697 immed_double_const (~lo, ~hi, imode),
3698 NULL_RTX, 1, OPTAB_LIB_WIDEN);
3700 temp = expand_binop (imode, ior_optab, op0, op1,
3701 gen_lowpart (imode, target), 1, OPTAB_LIB_WIDEN);
3702 target = lowpart_subreg_maybe_copy (mode, temp, imode);
3708 /* Expand the C99 copysign operation. OP0 and OP1 must be the same
3709 scalar floating point mode. Return NULL if we do not know how to
3710 expand the operation inline. */
3713 expand_copysign (rtx op0, rtx op1, rtx target)
3715 enum machine_mode mode = GET_MODE (op0);
3716 const struct real_format *fmt;
3720 gcc_assert (SCALAR_FLOAT_MODE_P (mode));
3721 gcc_assert (GET_MODE (op1) == mode);
3723 /* First try to do it with a special instruction. */
3724 temp = expand_binop (mode, copysign_optab, op0, op1,
3725 target, 0, OPTAB_DIRECT);
3729 fmt = REAL_MODE_FORMAT (mode);
3730 if (fmt == NULL || !fmt->has_signed_zero)
3734 if (GET_CODE (op0) == CONST_DOUBLE)
3736 if (real_isneg (CONST_DOUBLE_REAL_VALUE (op0)))
3737 op0 = simplify_unary_operation (ABS, mode, op0, mode);
3741 if (fmt->signbit_ro >= 0
3742 && (GET_CODE (op0) == CONST_DOUBLE
3743 || (optab_handler (neg_optab, mode)->insn_code != CODE_FOR_nothing
3744 && optab_handler (abs_optab, mode)->insn_code != CODE_FOR_nothing)))
3746 temp = expand_copysign_absneg (mode, op0, op1, target,
3747 fmt->signbit_ro, op0_is_abs);
3752 if (fmt->signbit_rw < 0)
3754 return expand_copysign_bit (mode, op0, op1, target,
3755 fmt->signbit_rw, op0_is_abs);
3758 /* Generate an instruction whose insn-code is INSN_CODE,
3759 with two operands: an output TARGET and an input OP0.
3760 TARGET *must* be nonzero, and the output is always stored there.
3761 CODE is an rtx code such that (CODE OP0) is an rtx that describes
3762 the value that is stored into TARGET.
3764 Return false if expansion failed. */
3767 maybe_emit_unop_insn (int icode, rtx target, rtx op0, enum rtx_code code)
3770 enum machine_mode mode0 = insn_data[icode].operand[1].mode;
3775 /* Now, if insn does not accept our operands, put them into pseudos. */
3777 if (!insn_data[icode].operand[1].predicate (op0, mode0))
3778 op0 = copy_to_mode_reg (mode0, op0);
3780 if (!insn_data[icode].operand[0].predicate (temp, GET_MODE (temp)))
3781 temp = gen_reg_rtx (GET_MODE (temp));
3783 pat = GEN_FCN (icode) (temp, op0);
3787 if (INSN_P (pat) && NEXT_INSN (pat) != NULL_RTX && code != UNKNOWN)
3788 add_equal_note (pat, temp, code, op0, NULL_RTX);
3793 emit_move_insn (target, temp);
3796 /* Generate an instruction whose insn-code is INSN_CODE,
3797 with two operands: an output TARGET and an input OP0.
3798 TARGET *must* be nonzero, and the output is always stored there.
3799 CODE is an rtx code such that (CODE OP0) is an rtx that describes
3800 the value that is stored into TARGET. */
3803 emit_unop_insn (int icode, rtx target, rtx op0, enum rtx_code code)
3805 bool ok = maybe_emit_unop_insn (icode, target, op0, code);
3809 struct no_conflict_data
3811 rtx target, first, insn;
3815 /* Called via note_stores by emit_libcall_block. Set P->must_stay if
3816 the currently examined clobber / store has to stay in the list of
3817 insns that constitute the actual libcall block. */
3819 no_conflict_move_test (rtx dest, const_rtx set, void *p0)
3821 struct no_conflict_data *p= (struct no_conflict_data *) p0;
3823 /* If this inns directly contributes to setting the target, it must stay. */
3824 if (reg_overlap_mentioned_p (p->target, dest))
3825 p->must_stay = true;
3826 /* If we haven't committed to keeping any other insns in the list yet,
3827 there is nothing more to check. */
3828 else if (p->insn == p->first)
3830 /* If this insn sets / clobbers a register that feeds one of the insns
3831 already in the list, this insn has to stay too. */
3832 else if (reg_overlap_mentioned_p (dest, PATTERN (p->first))
3833 || (CALL_P (p->first) && (find_reg_fusage (p->first, USE, dest)))
3834 || reg_used_between_p (dest, p->first, p->insn)
3835 /* Likewise if this insn depends on a register set by a previous
3836 insn in the list, or if it sets a result (presumably a hard
3837 register) that is set or clobbered by a previous insn.
3838 N.B. the modified_*_p (SET_DEST...) tests applied to a MEM
3839 SET_DEST perform the former check on the address, and the latter
3840 check on the MEM. */
3841 || (GET_CODE (set) == SET
3842 && (modified_in_p (SET_SRC (set), p->first)
3843 || modified_in_p (SET_DEST (set), p->first)
3844 || modified_between_p (SET_SRC (set), p->first, p->insn)
3845 || modified_between_p (SET_DEST (set), p->first, p->insn))))
3846 p->must_stay = true;
3850 /* Emit code to make a call to a constant function or a library call.
3852 INSNS is a list containing all insns emitted in the call.
3853 These insns leave the result in RESULT. Our block is to copy RESULT
3854 to TARGET, which is logically equivalent to EQUIV.
3856 We first emit any insns that set a pseudo on the assumption that these are
3857 loading constants into registers; doing so allows them to be safely cse'ed
3858 between blocks. Then we emit all the other insns in the block, followed by
3859 an insn to move RESULT to TARGET. This last insn will have a REQ_EQUAL
3860 note with an operand of EQUIV. */
3863 emit_libcall_block (rtx insns, rtx target, rtx result, rtx equiv)
3865 rtx final_dest = target;
3866 rtx prev, next, last, insn;
3868 /* If this is a reg with REG_USERVAR_P set, then it could possibly turn
3869 into a MEM later. Protect the libcall block from this change. */
3870 if (! REG_P (target) || REG_USERVAR_P (target))
3871 target = gen_reg_rtx (GET_MODE (target));
3873 /* If we're using non-call exceptions, a libcall corresponding to an
3874 operation that may trap may also trap. */
3875 if (flag_non_call_exceptions && may_trap_p (equiv))
3877 for (insn = insns; insn; insn = NEXT_INSN (insn))
3880 rtx note = find_reg_note (insn, REG_EH_REGION, NULL_RTX);
3882 if (note != 0 && INTVAL (XEXP (note, 0)) <= 0)
3883 remove_note (insn, note);
3887 /* look for any CALL_INSNs in this sequence, and attach a REG_EH_REGION
3888 reg note to indicate that this call cannot throw or execute a nonlocal
3889 goto (unless there is already a REG_EH_REGION note, in which case
3891 for (insn = insns; insn; insn = NEXT_INSN (insn))
3894 rtx note = find_reg_note (insn, REG_EH_REGION, NULL_RTX);
3897 XEXP (note, 0) = constm1_rtx;
3899 add_reg_note (insn, REG_EH_REGION, constm1_rtx);
3902 /* First emit all insns that set pseudos. Remove them from the list as
3903 we go. Avoid insns that set pseudos which were referenced in previous
3904 insns. These can be generated by move_by_pieces, for example,
3905 to update an address. Similarly, avoid insns that reference things
3906 set in previous insns. */
3908 for (insn = insns; insn; insn = next)
3910 rtx set = single_set (insn);
3912 next = NEXT_INSN (insn);
3914 if (set != 0 && REG_P (SET_DEST (set))
3915 && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER)
3917 struct no_conflict_data data;
3919 data.target = const0_rtx;
3923 note_stores (PATTERN (insn), no_conflict_move_test, &data);
3924 if (! data.must_stay)
3926 if (PREV_INSN (insn))
3927 NEXT_INSN (PREV_INSN (insn)) = next;
3932 PREV_INSN (next) = PREV_INSN (insn);
3938 /* Some ports use a loop to copy large arguments onto the stack.
3939 Don't move anything outside such a loop. */
3944 prev = get_last_insn ();
3946 /* Write the remaining insns followed by the final copy. */
3948 for (insn = insns; insn; insn = next)
3950 next = NEXT_INSN (insn);
3955 last = emit_move_insn (target, result);
3956 if (optab_handler (mov_optab, GET_MODE (target))->insn_code
3957 != CODE_FOR_nothing)
3958 set_unique_reg_note (last, REG_EQUAL, copy_rtx (equiv));
3960 if (final_dest != target)
3961 emit_move_insn (final_dest, target);
3964 /* Nonzero if we can perform a comparison of mode MODE straightforwardly.
3965 PURPOSE describes how this comparison will be used. CODE is the rtx
3966 comparison code we will be using.
3968 ??? Actually, CODE is slightly weaker than that. A target is still
3969 required to implement all of the normal bcc operations, but not
3970 required to implement all (or any) of the unordered bcc operations. */
3973 can_compare_p (enum rtx_code code, enum machine_mode mode,
3974 enum can_compare_purpose purpose)
3978 if (optab_handler (cmp_optab, mode)->insn_code != CODE_FOR_nothing)
3980 if (purpose == ccp_jump)
3981 return bcc_gen_fctn[(int) code] != NULL;
3982 else if (purpose == ccp_store_flag)
3983 return setcc_gen_code[(int) code] != CODE_FOR_nothing;
3985 /* There's only one cmov entry point, and it's allowed to fail. */
3988 if (purpose == ccp_jump
3989 && optab_handler (cbranch_optab, mode)->insn_code != CODE_FOR_nothing)
3991 if (purpose == ccp_cmov
3992 && optab_handler (cmov_optab, mode)->insn_code != CODE_FOR_nothing)
3994 if (purpose == ccp_store_flag
3995 && optab_handler (cstore_optab, mode)->insn_code != CODE_FOR_nothing)
3997 mode = GET_MODE_WIDER_MODE (mode);
3999 while (mode != VOIDmode);
4004 /* This function is called when we are going to emit a compare instruction that
4005 compares the values found in *PX and *PY, using the rtl operator COMPARISON.
4007 *PMODE is the mode of the inputs (in case they are const_int).
4008 *PUNSIGNEDP nonzero says that the operands are unsigned;
4009 this matters if they need to be widened.
4011 If they have mode BLKmode, then SIZE specifies the size of both operands.
4013 This function performs all the setup necessary so that the caller only has
4014 to emit a single comparison insn. This setup can involve doing a BLKmode
4015 comparison or emitting a library call to perform the comparison if no insn
4016 is available to handle it.
4017 The values which are passed in through pointers can be modified; the caller
4018 should perform the comparison on the modified values. Constant
4019 comparisons must have already been folded. */
4022 prepare_cmp_insn (rtx *px, rtx *py, enum rtx_code *pcomparison, rtx size,
4023 enum machine_mode *pmode, int *punsignedp,
4024 enum can_compare_purpose purpose)
4026 enum machine_mode mode = *pmode;
4027 rtx x = *px, y = *py;
4028 int unsignedp = *punsignedp;
4031 /* If we are inside an appropriately-short loop and we are optimizing,
4032 force expensive constants into a register. */
4033 if (CONSTANT_P (x) && optimize
4034 && rtx_cost (x, COMPARE) > COSTS_N_INSNS (1))
4035 x = force_reg (mode, x);
4037 if (CONSTANT_P (y) && optimize
4038 && rtx_cost (y, COMPARE) > COSTS_N_INSNS (1))
4039 y = force_reg (mode, y);
4042 /* Make sure if we have a canonical comparison. The RTL
4043 documentation states that canonical comparisons are required only
4044 for targets which have cc0. */
4045 gcc_assert (!CONSTANT_P (x) || CONSTANT_P (y));
4048 /* Don't let both operands fail to indicate the mode. */
4049 if (GET_MODE (x) == VOIDmode && GET_MODE (y) == VOIDmode)
4050 x = force_reg (mode, x);
4052 /* Handle all BLKmode compares. */
4054 if (mode == BLKmode)
4056 enum machine_mode cmp_mode, result_mode;
4057 enum insn_code cmp_code;
4062 = GEN_INT (MIN (MEM_ALIGN (x), MEM_ALIGN (y)) / BITS_PER_UNIT);
4066 /* Try to use a memory block compare insn - either cmpstr
4067 or cmpmem will do. */
4068 for (cmp_mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
4069 cmp_mode != VOIDmode;
4070 cmp_mode = GET_MODE_WIDER_MODE (cmp_mode))
4072 cmp_code = cmpmem_optab[cmp_mode];
4073 if (cmp_code == CODE_FOR_nothing)
4074 cmp_code = cmpstr_optab[cmp_mode];
4075 if (cmp_code == CODE_FOR_nothing)
4076 cmp_code = cmpstrn_optab[cmp_mode];
4077 if (cmp_code == CODE_FOR_nothing)
4080 /* Must make sure the size fits the insn's mode. */
4081 if ((GET_CODE (size) == CONST_INT
4082 && INTVAL (size) >= (1 << GET_MODE_BITSIZE (cmp_mode)))
4083 || (GET_MODE_BITSIZE (GET_MODE (size))
4084 > GET_MODE_BITSIZE (cmp_mode)))
4087 result_mode = insn_data[cmp_code].operand[0].mode;
4088 result = gen_reg_rtx (result_mode);
4089 size = convert_to_mode (cmp_mode, size, 1);
4090 emit_insn (GEN_FCN (cmp_code) (result, x, y, size, opalign));
4094 *pmode = result_mode;
4098 /* Otherwise call a library function, memcmp. */
4099 libfunc = memcmp_libfunc;
4100 length_type = sizetype;
4101 result_mode = TYPE_MODE (integer_type_node);
4102 cmp_mode = TYPE_MODE (length_type);
4103 size = convert_to_mode (TYPE_MODE (length_type), size,
4104 TYPE_UNSIGNED (length_type));
4106 result = emit_library_call_value (libfunc, 0, LCT_PURE,
4113 *pmode = result_mode;
4117 /* Don't allow operands to the compare to trap, as that can put the
4118 compare and branch in different basic blocks. */
4119 if (flag_non_call_exceptions)
4122 x = force_reg (mode, x);
4124 y = force_reg (mode, y);
4129 if (can_compare_p (*pcomparison, mode, purpose))
4132 /* Handle a lib call just for the mode we are using. */
4134 libfunc = optab_libfunc (cmp_optab, mode);
4135 if (libfunc && !SCALAR_FLOAT_MODE_P (mode))
4139 /* If we want unsigned, and this mode has a distinct unsigned
4140 comparison routine, use that. */
4143 rtx ulibfunc = optab_libfunc (ucmp_optab, mode);
4148 result = emit_library_call_value (libfunc, NULL_RTX, LCT_CONST,
4149 targetm.libgcc_cmp_return_mode (),
4150 2, x, mode, y, mode);
4152 /* There are two kinds of comparison routines. Biased routines
4153 return 0/1/2, and unbiased routines return -1/0/1. Other parts
4154 of gcc expect that the comparison operation is equivalent
4155 to the modified comparison. For signed comparisons compare the
4156 result against 1 in the biased case, and zero in the unbiased
4157 case. For unsigned comparisons always compare against 1 after
4158 biasing the unbiased result by adding 1. This gives us a way to
4164 if (!TARGET_LIB_INT_CMP_BIASED)
4167 *px = plus_constant (result, 1);
4174 gcc_assert (SCALAR_FLOAT_MODE_P (mode));
4175 prepare_float_lib_cmp (px, py, pcomparison, pmode, punsignedp);
4178 /* Before emitting an insn with code ICODE, make sure that X, which is going
4179 to be used for operand OPNUM of the insn, is converted from mode MODE to
4180 WIDER_MODE (UNSIGNEDP determines whether it is an unsigned conversion), and
4181 that it is accepted by the operand predicate. Return the new value. */
4184 prepare_operand (int icode, rtx x, int opnum, enum machine_mode mode,
4185 enum machine_mode wider_mode, int unsignedp)
4187 if (mode != wider_mode)
4188 x = convert_modes (wider_mode, mode, x, unsignedp);
4190 if (!insn_data[icode].operand[opnum].predicate
4191 (x, insn_data[icode].operand[opnum].mode))
4193 if (reload_completed)
4195 x = copy_to_mode_reg (insn_data[icode].operand[opnum].mode, x);
4201 /* Subroutine of emit_cmp_and_jump_insns; this function is called when we know
4202 we can do the comparison.
4203 The arguments are the same as for emit_cmp_and_jump_insns; but LABEL may
4204 be NULL_RTX which indicates that only a comparison is to be generated. */
4207 emit_cmp_and_jump_insn_1 (rtx x, rtx y, enum machine_mode mode,
4208 enum rtx_code comparison, int unsignedp, rtx label)
4210 rtx test = gen_rtx_fmt_ee (comparison, mode, x, y);
4211 enum mode_class mclass = GET_MODE_CLASS (mode);
4212 enum machine_mode wider_mode = mode;
4214 /* Try combined insns first. */
4217 enum insn_code icode;
4218 PUT_MODE (test, wider_mode);
4222 icode = optab_handler (cbranch_optab, wider_mode)->insn_code;
4224 if (icode != CODE_FOR_nothing
4225 && insn_data[icode].operand[0].predicate (test, wider_mode))
4227 x = prepare_operand (icode, x, 1, mode, wider_mode, unsignedp);
4228 y = prepare_operand (icode, y, 2, mode, wider_mode, unsignedp);
4229 emit_jump_insn (GEN_FCN (icode) (test, x, y, label));
4234 /* Handle some compares against zero. */
4235 icode = (int) optab_handler (tst_optab, wider_mode)->insn_code;
4236 if (y == CONST0_RTX (mode) && icode != CODE_FOR_nothing)
4238 x = prepare_operand (icode, x, 0, mode, wider_mode, unsignedp);
4239 emit_insn (GEN_FCN (icode) (x));
4241 emit_jump_insn (bcc_gen_fctn[(int) comparison] (label));
4245 /* Handle compares for which there is a directly suitable insn. */
4247 icode = (int) optab_handler (cmp_optab, wider_mode)->insn_code;
4248 if (icode != CODE_FOR_nothing)
4250 x = prepare_operand (icode, x, 0, mode, wider_mode, unsignedp);
4251 y = prepare_operand (icode, y, 1, mode, wider_mode, unsignedp);
4252 emit_insn (GEN_FCN (icode) (x, y));
4254 emit_jump_insn (bcc_gen_fctn[(int) comparison] (label));
4258 if (!CLASS_HAS_WIDER_MODES_P (mclass))
4261 wider_mode = GET_MODE_WIDER_MODE (wider_mode);
4263 while (wider_mode != VOIDmode);
4268 /* Generate code to compare X with Y so that the condition codes are
4269 set and to jump to LABEL if the condition is true. If X is a
4270 constant and Y is not a constant, then the comparison is swapped to
4271 ensure that the comparison RTL has the canonical form.
4273 UNSIGNEDP nonzero says that X and Y are unsigned; this matters if they
4274 need to be widened by emit_cmp_insn. UNSIGNEDP is also used to select
4275 the proper branch condition code.
4277 If X and Y have mode BLKmode, then SIZE specifies the size of both X and Y.
4279 MODE is the mode of the inputs (in case they are const_int).
4281 COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.). It will
4282 be passed unchanged to emit_cmp_insn, then potentially converted into an
4283 unsigned variant based on UNSIGNEDP to select a proper jump instruction. */
4286 emit_cmp_and_jump_insns (rtx x, rtx y, enum rtx_code comparison, rtx size,
4287 enum machine_mode mode, int unsignedp, rtx label)
4289 rtx op0 = x, op1 = y;
4291 /* Swap operands and condition to ensure canonical RTL. */
4292 if (swap_commutative_operands_p (x, y))
4294 /* If we're not emitting a branch, callers are required to pass
4295 operands in an order conforming to canonical RTL. We relax this
4296 for commutative comparisons so callers using EQ don't need to do
4297 swapping by hand. */
4298 gcc_assert (label || (comparison == swap_condition (comparison)));
4301 comparison = swap_condition (comparison);
4305 /* If OP0 is still a constant, then both X and Y must be constants.
4306 Force X into a register to create canonical RTL. */
4307 if (CONSTANT_P (op0))
4308 op0 = force_reg (mode, op0);
4312 comparison = unsigned_condition (comparison);
4314 prepare_cmp_insn (&op0, &op1, &comparison, size, &mode, &unsignedp,
4316 emit_cmp_and_jump_insn_1 (op0, op1, mode, comparison, unsignedp, label);
4319 /* Like emit_cmp_and_jump_insns, but generate only the comparison. */
4322 emit_cmp_insn (rtx x, rtx y, enum rtx_code comparison, rtx size,
4323 enum machine_mode mode, int unsignedp)
4325 emit_cmp_and_jump_insns (x, y, comparison, size, mode, unsignedp, 0);
4328 /* Emit a library call comparison between floating point X and Y.
4329 COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.). */
4332 prepare_float_lib_cmp (rtx *px, rtx *py, enum rtx_code *pcomparison,
4333 enum machine_mode *pmode, int *punsignedp)
4335 enum rtx_code comparison = *pcomparison;
4336 enum rtx_code swapped = swap_condition (comparison);
4337 enum rtx_code reversed = reverse_condition_maybe_unordered (comparison);
4340 enum machine_mode orig_mode = GET_MODE (x);
4341 enum machine_mode mode, cmp_mode;
4342 rtx value, target, insns, equiv;
4344 bool reversed_p = false;
4345 cmp_mode = targetm.libgcc_cmp_return_mode ();
4347 for (mode = orig_mode;
4349 mode = GET_MODE_WIDER_MODE (mode))
4351 if ((libfunc = optab_libfunc (code_to_optab[comparison], mode)))
4354 if ((libfunc = optab_libfunc (code_to_optab[swapped] , mode)))
4357 tmp = x; x = y; y = tmp;
4358 comparison = swapped;
4362 if ((libfunc = optab_libfunc (code_to_optab[reversed], mode))
4363 && FLOAT_LIB_COMPARE_RETURNS_BOOL (mode, reversed))
4365 comparison = reversed;
4371 gcc_assert (mode != VOIDmode);
4373 if (mode != orig_mode)
4375 x = convert_to_mode (mode, x, 0);
4376 y = convert_to_mode (mode, y, 0);
4379 /* Attach a REG_EQUAL note describing the semantics of the libcall to
4380 the RTL. The allows the RTL optimizers to delete the libcall if the
4381 condition can be determined at compile-time. */
4382 if (comparison == UNORDERED)
4384 rtx temp = simplify_gen_relational (NE, cmp_mode, mode, x, x);
4385 equiv = simplify_gen_relational (NE, cmp_mode, mode, y, y);
4386 equiv = simplify_gen_ternary (IF_THEN_ELSE, cmp_mode, cmp_mode,
4387 temp, const_true_rtx, equiv);
4391 equiv = simplify_gen_relational (comparison, cmp_mode, mode, x, y);
4392 if (! FLOAT_LIB_COMPARE_RETURNS_BOOL (mode, comparison))
4394 rtx true_rtx, false_rtx;
4399 true_rtx = const0_rtx;
4400 false_rtx = const_true_rtx;
4404 true_rtx = const_true_rtx;
4405 false_rtx = const0_rtx;
4409 true_rtx = const1_rtx;
4410 false_rtx = const0_rtx;
4414 true_rtx = const0_rtx;
4415 false_rtx = constm1_rtx;
4419 true_rtx = constm1_rtx;
4420 false_rtx = const0_rtx;
4424 true_rtx = const0_rtx;
4425 false_rtx = const1_rtx;
4431 equiv = simplify_gen_ternary (IF_THEN_ELSE, cmp_mode, cmp_mode,
4432 equiv, true_rtx, false_rtx);
4437 value = emit_library_call_value (libfunc, NULL_RTX, LCT_CONST,
4438 cmp_mode, 2, x, mode, y, mode);
4439 insns = get_insns ();
4442 target = gen_reg_rtx (cmp_mode);
4443 emit_libcall_block (insns, target, value, equiv);
4445 if (comparison == UNORDERED
4446 || FLOAT_LIB_COMPARE_RETURNS_BOOL (mode, comparison))
4447 comparison = reversed_p ? EQ : NE;
4452 *pcomparison = comparison;
4456 /* Generate code to indirectly jump to a location given in the rtx LOC. */
4459 emit_indirect_jump (rtx loc)
4461 if (!insn_data[(int) CODE_FOR_indirect_jump].operand[0].predicate
4463 loc = copy_to_mode_reg (Pmode, loc);
4465 emit_jump_insn (gen_indirect_jump (loc));
4469 #ifdef HAVE_conditional_move
4471 /* Emit a conditional move instruction if the machine supports one for that
4472 condition and machine mode.
4474 OP0 and OP1 are the operands that should be compared using CODE. CMODE is
4475 the mode to use should they be constants. If it is VOIDmode, they cannot
4478 OP2 should be stored in TARGET if the comparison is true, otherwise OP3
4479 should be stored there. MODE is the mode to use should they be constants.
4480 If it is VOIDmode, they cannot both be constants.
4482 The result is either TARGET (perhaps modified) or NULL_RTX if the operation
4483 is not supported. */
4486 emit_conditional_move (rtx target, enum rtx_code code, rtx op0, rtx op1,
4487 enum machine_mode cmode, rtx op2, rtx op3,
4488 enum machine_mode mode, int unsignedp)
4490 rtx tem, subtarget, comparison, insn;
4491 enum insn_code icode;
4492 enum rtx_code reversed;
4494 /* If one operand is constant, make it the second one. Only do this
4495 if the other operand is not constant as well. */
4497 if (swap_commutative_operands_p (op0, op1))
4502 code = swap_condition (code);
4505 /* get_condition will prefer to generate LT and GT even if the old
4506 comparison was against zero, so undo that canonicalization here since
4507 comparisons against zero are cheaper. */
4508 if (code == LT && op1 == const1_rtx)
4509 code = LE, op1 = const0_rtx;
4510 else if (code == GT && op1 == constm1_rtx)
4511 code = GE, op1 = const0_rtx;
4513 if (cmode == VOIDmode)
4514 cmode = GET_MODE (op0);
4516 if (swap_commutative_operands_p (op2, op3)
4517 && ((reversed = reversed_comparison_code_parts (code, op0, op1, NULL))
4526 if (mode == VOIDmode)
4527 mode = GET_MODE (op2);
4529 icode = movcc_gen_code[mode];
4531 if (icode == CODE_FOR_nothing)
4535 target = gen_reg_rtx (mode);
4539 /* If the insn doesn't accept these operands, put them in pseudos. */
4541 if (!insn_data[icode].operand[0].predicate
4542 (subtarget, insn_data[icode].operand[0].mode))
4543 subtarget = gen_reg_rtx (insn_data[icode].operand[0].mode);
4545 if (!insn_data[icode].operand[2].predicate
4546 (op2, insn_data[icode].operand[2].mode))
4547 op2 = copy_to_mode_reg (insn_data[icode].operand[2].mode, op2);
4549 if (!insn_data[icode].operand[3].predicate
4550 (op3, insn_data[icode].operand[3].mode))
4551 op3 = copy_to_mode_reg (insn_data[icode].operand[3].mode, op3);
4553 /* Everything should now be in the suitable form, so emit the compare insn
4554 and then the conditional move. */
4557 = compare_from_rtx (op0, op1, code, unsignedp, cmode, NULL_RTX);
4559 /* ??? Watch for const0_rtx (nop) and const_true_rtx (unconditional)? */
4560 /* We can get const0_rtx or const_true_rtx in some circumstances. Just
4561 return NULL and let the caller figure out how best to deal with this
4563 if (GET_CODE (comparison) != code)
4566 insn = GEN_FCN (icode) (subtarget, comparison, op2, op3);
4568 /* If that failed, then give up. */
4574 if (subtarget != target)
4575 convert_move (target, subtarget, 0);
4580 /* Return nonzero if a conditional move of mode MODE is supported.
4582 This function is for combine so it can tell whether an insn that looks
4583 like a conditional move is actually supported by the hardware. If we
4584 guess wrong we lose a bit on optimization, but that's it. */
4585 /* ??? sparc64 supports conditionally moving integers values based on fp
4586 comparisons, and vice versa. How do we handle them? */
4589 can_conditionally_move_p (enum machine_mode mode)
4591 if (movcc_gen_code[mode] != CODE_FOR_nothing)
4597 #endif /* HAVE_conditional_move */
4599 /* Emit a conditional addition instruction if the machine supports one for that
4600 condition and machine mode.
4602 OP0 and OP1 are the operands that should be compared using CODE. CMODE is
4603 the mode to use should they be constants. If it is VOIDmode, they cannot
4606 OP2 should be stored in TARGET if the comparison is true, otherwise OP2+OP3
4607 should be stored there. MODE is the mode to use should they be constants.
4608 If it is VOIDmode, they cannot both be constants.
4610 The result is either TARGET (perhaps modified) or NULL_RTX if the operation
4611 is not supported. */
4614 emit_conditional_add (rtx target, enum rtx_code code, rtx op0, rtx op1,
4615 enum machine_mode cmode, rtx op2, rtx op3,
4616 enum machine_mode mode, int unsignedp)
4618 rtx tem, subtarget, comparison, insn;
4619 enum insn_code icode;
4620 enum rtx_code reversed;
4622 /* If one operand is constant, make it the second one. Only do this
4623 if the other operand is not constant as well. */
4625 if (swap_commutative_operands_p (op0, op1))
4630 code = swap_condition (code);
4633 /* get_condition will prefer to generate LT and GT even if the old
4634 comparison was against zero, so undo that canonicalization here since
4635 comparisons against zero are cheaper. */
4636 if (code == LT && op1 == const1_rtx)
4637 code = LE, op1 = const0_rtx;
4638 else if (code == GT && op1 == constm1_rtx)
4639 code = GE, op1 = const0_rtx;
4641 if (cmode == VOIDmode)
4642 cmode = GET_MODE (op0);
4644 if (swap_commutative_operands_p (op2, op3)
4645 && ((reversed = reversed_comparison_code_parts (code, op0, op1, NULL))
4654 if (mode == VOIDmode)
4655 mode = GET_MODE (op2);
4657 icode = optab_handler (addcc_optab, mode)->insn_code;
4659 if (icode == CODE_FOR_nothing)
4663 target = gen_reg_rtx (mode);
4665 /* If the insn doesn't accept these operands, put them in pseudos. */
4667 if (!insn_data[icode].operand[0].predicate
4668 (target, insn_data[icode].operand[0].mode))
4669 subtarget = gen_reg_rtx (insn_data[icode].operand[0].mode);
4673 if (!insn_data[icode].operand[2].predicate
4674 (op2, insn_data[icode].operand[2].mode))
4675 op2 = copy_to_mode_reg (insn_data[icode].operand[2].mode, op2);
4677 if (!insn_data[icode].operand[3].predicate
4678 (op3, insn_data[icode].operand[3].mode))
4679 op3 = copy_to_mode_reg (insn_data[icode].operand[3].mode, op3);
4681 /* Everything should now be in the suitable form, so emit the compare insn
4682 and then the conditional move. */
4685 = compare_from_rtx (op0, op1, code, unsignedp, cmode, NULL_RTX);
4687 /* ??? Watch for const0_rtx (nop) and const_true_rtx (unconditional)? */
4688 /* We can get const0_rtx or const_true_rtx in some circumstances. Just
4689 return NULL and let the caller figure out how best to deal with this
4691 if (GET_CODE (comparison) != code)
4694 insn = GEN_FCN (icode) (subtarget, comparison, op2, op3);
4696 /* If that failed, then give up. */
4702 if (subtarget != target)
4703 convert_move (target, subtarget, 0);
4708 /* These functions attempt to generate an insn body, rather than
4709 emitting the insn, but if the gen function already emits them, we
4710 make no attempt to turn them back into naked patterns. */
4712 /* Generate and return an insn body to add Y to X. */
4715 gen_add2_insn (rtx x, rtx y)
4717 int icode = (int) optab_handler (add_optab, GET_MODE (x))->insn_code;
4719 gcc_assert (insn_data[icode].operand[0].predicate
4720 (x, insn_data[icode].operand[0].mode));
4721 gcc_assert (insn_data[icode].operand[1].predicate
4722 (x, insn_data[icode].operand[1].mode));
4723 gcc_assert (insn_data[icode].operand[2].predicate
4724 (y, insn_data[icode].operand[2].mode));
4726 return GEN_FCN (icode) (x, x, y);
4729 /* Generate and return an insn body to add r1 and c,
4730 storing the result in r0. */
4733 gen_add3_insn (rtx r0, rtx r1, rtx c)
4735 int icode = (int) optab_handler (add_optab, GET_MODE (r0))->insn_code;
4737 if (icode == CODE_FOR_nothing
4738 || !(insn_data[icode].operand[0].predicate
4739 (r0, insn_data[icode].operand[0].mode))
4740 || !(insn_data[icode].operand[1].predicate
4741 (r1, insn_data[icode].operand[1].mode))
4742 || !(insn_data[icode].operand[2].predicate
4743 (c, insn_data[icode].operand[2].mode)))
4746 return GEN_FCN (icode) (r0, r1, c);
4750 have_add2_insn (rtx x, rtx y)
4754 gcc_assert (GET_MODE (x) != VOIDmode);
4756 icode = (int) optab_handler (add_optab, GET_MODE (x))->insn_code;
4758 if (icode == CODE_FOR_nothing)
4761 if (!(insn_data[icode].operand[0].predicate
4762 (x, insn_data[icode].operand[0].mode))
4763 || !(insn_data[icode].operand[1].predicate
4764 (x, insn_data[icode].operand[1].mode))
4765 || !(insn_data[icode].operand[2].predicate
4766 (y, insn_data[icode].operand[2].mode)))
4772 /* Generate and return an insn body to subtract Y from X. */
4775 gen_sub2_insn (rtx x, rtx y)
4777 int icode = (int) optab_handler (sub_optab, GET_MODE (x))->insn_code;
4779 gcc_assert (insn_data[icode].operand[0].predicate
4780 (x, insn_data[icode].operand[0].mode));
4781 gcc_assert (insn_data[icode].operand[1].predicate
4782 (x, insn_data[icode].operand[1].mode));
4783 gcc_assert (insn_data[icode].operand[2].predicate
4784 (y, insn_data[icode].operand[2].mode));
4786 return GEN_FCN (icode) (x, x, y);
4789 /* Generate and return an insn body to subtract r1 and c,
4790 storing the result in r0. */
4793 gen_sub3_insn (rtx r0, rtx r1, rtx c)
4795 int icode = (int) optab_handler (sub_optab, GET_MODE (r0))->insn_code;
4797 if (icode == CODE_FOR_nothing
4798 || !(insn_data[icode].operand[0].predicate
4799 (r0, insn_data[icode].operand[0].mode))
4800 || !(insn_data[icode].operand[1].predicate
4801 (r1, insn_data[icode].operand[1].mode))
4802 || !(insn_data[icode].operand[2].predicate
4803 (c, insn_data[icode].operand[2].mode)))
4806 return GEN_FCN (icode) (r0, r1, c);
4810 have_sub2_insn (rtx x, rtx y)
4814 gcc_assert (GET_MODE (x) != VOIDmode);
4816 icode = (int) optab_handler (sub_optab, GET_MODE (x))->insn_code;
4818 if (icode == CODE_FOR_nothing)
4821 if (!(insn_data[icode].operand[0].predicate
4822 (x, insn_data[icode].operand[0].mode))
4823 || !(insn_data[icode].operand[1].predicate
4824 (x, insn_data[icode].operand[1].mode))
4825 || !(insn_data[icode].operand[2].predicate
4826 (y, insn_data[icode].operand[2].mode)))
4832 /* Generate the body of an instruction to copy Y into X.
4833 It may be a list of insns, if one insn isn't enough. */
4836 gen_move_insn (rtx x, rtx y)
4841 emit_move_insn_1 (x, y);
4847 /* Return the insn code used to extend FROM_MODE to TO_MODE.
4848 UNSIGNEDP specifies zero-extension instead of sign-extension. If
4849 no such operation exists, CODE_FOR_nothing will be returned. */
4852 can_extend_p (enum machine_mode to_mode, enum machine_mode from_mode,
4856 #ifdef HAVE_ptr_extend
4858 return CODE_FOR_ptr_extend;
4861 tab = unsignedp ? zext_optab : sext_optab;
4862 return convert_optab_handler (tab, to_mode, from_mode)->insn_code;
4865 /* Generate the body of an insn to extend Y (with mode MFROM)
4866 into X (with mode MTO). Do zero-extension if UNSIGNEDP is nonzero. */
4869 gen_extend_insn (rtx x, rtx y, enum machine_mode mto,
4870 enum machine_mode mfrom, int unsignedp)
4872 enum insn_code icode = can_extend_p (mto, mfrom, unsignedp);
4873 return GEN_FCN (icode) (x, y);
4876 /* can_fix_p and can_float_p say whether the target machine
4877 can directly convert a given fixed point type to
4878 a given floating point type, or vice versa.
4879 The returned value is the CODE_FOR_... value to use,
4880 or CODE_FOR_nothing if these modes cannot be directly converted.
4882 *TRUNCP_PTR is set to 1 if it is necessary to output
4883 an explicit FTRUNC insn before the fix insn; otherwise 0. */
4885 static enum insn_code
4886 can_fix_p (enum machine_mode fixmode, enum machine_mode fltmode,
4887 int unsignedp, int *truncp_ptr)
4890 enum insn_code icode;
4892 tab = unsignedp ? ufixtrunc_optab : sfixtrunc_optab;
4893 icode = convert_optab_handler (tab, fixmode, fltmode)->insn_code;
4894 if (icode != CODE_FOR_nothing)
4900 /* FIXME: This requires a port to define both FIX and FTRUNC pattern
4901 for this to work. We need to rework the fix* and ftrunc* patterns
4902 and documentation. */
4903 tab = unsignedp ? ufix_optab : sfix_optab;
4904 icode = convert_optab_handler (tab, fixmode, fltmode)->insn_code;
4905 if (icode != CODE_FOR_nothing
4906 && optab_handler (ftrunc_optab, fltmode)->insn_code != CODE_FOR_nothing)
4913 return CODE_FOR_nothing;
4916 static enum insn_code
4917 can_float_p (enum machine_mode fltmode, enum machine_mode fixmode,
4922 tab = unsignedp ? ufloat_optab : sfloat_optab;
4923 return convert_optab_handler (tab, fltmode, fixmode)->insn_code;
4926 /* Generate code to convert FROM to floating point
4927 and store in TO. FROM must be fixed point and not VOIDmode.
4928 UNSIGNEDP nonzero means regard FROM as unsigned.
4929 Normally this is done by correcting the final value
4930 if it is negative. */
4933 expand_float (rtx to, rtx from, int unsignedp)
4935 enum insn_code icode;
4937 enum machine_mode fmode, imode;
4938 bool can_do_signed = false;
4940 /* Crash now, because we won't be able to decide which mode to use. */
4941 gcc_assert (GET_MODE (from) != VOIDmode);
4943 /* Look for an insn to do the conversion. Do it in the specified
4944 modes if possible; otherwise convert either input, output or both to
4945 wider mode. If the integer mode is wider than the mode of FROM,
4946 we can do the conversion signed even if the input is unsigned. */
4948 for (fmode = GET_MODE (to); fmode != VOIDmode;
4949 fmode = GET_MODE_WIDER_MODE (fmode))
4950 for (imode = GET_MODE (from); imode != VOIDmode;
4951 imode = GET_MODE_WIDER_MODE (imode))
4953 int doing_unsigned = unsignedp;
4955 if (fmode != GET_MODE (to)
4956 && significand_size (fmode) < GET_MODE_BITSIZE (GET_MODE (from)))
4959 icode = can_float_p (fmode, imode, unsignedp);
4960 if (icode == CODE_FOR_nothing && unsignedp)
4962 enum insn_code scode = can_float_p (fmode, imode, 0);
4963 if (scode != CODE_FOR_nothing)
4964 can_do_signed = true;
4965 if (imode != GET_MODE (from))
4966 icode = scode, doing_unsigned = 0;
4969 if (icode != CODE_FOR_nothing)
4971 if (imode != GET_MODE (from))
4972 from = convert_to_mode (imode, from, unsignedp);
4974 if (fmode != GET_MODE (to))
4975 target = gen_reg_rtx (fmode);
4977 emit_unop_insn (icode, target, from,
4978 doing_unsigned ? UNSIGNED_FLOAT : FLOAT);
4981 convert_move (to, target, 0);
4986 /* Unsigned integer, and no way to convert directly. Convert as signed,
4987 then unconditionally adjust the result. */
4988 if (unsignedp && can_do_signed)
4990 rtx label = gen_label_rtx ();
4992 REAL_VALUE_TYPE offset;
4994 /* Look for a usable floating mode FMODE wider than the source and at
4995 least as wide as the target. Using FMODE will avoid rounding woes
4996 with unsigned values greater than the signed maximum value. */
4998 for (fmode = GET_MODE (to); fmode != VOIDmode;
4999 fmode = GET_MODE_WIDER_MODE (fmode))
5000 if (GET_MODE_BITSIZE (GET_MODE (from)) < GET_MODE_BITSIZE (fmode)
5001 && can_float_p (fmode, GET_MODE (from), 0) != CODE_FOR_nothing)
5004 if (fmode == VOIDmode)
5006 /* There is no such mode. Pretend the target is wide enough. */
5007 fmode = GET_MODE (to);
5009 /* Avoid double-rounding when TO is narrower than FROM. */
5010 if ((significand_size (fmode) + 1)
5011 < GET_MODE_BITSIZE (GET_MODE (from)))
5014 rtx neglabel = gen_label_rtx ();
5016 /* Don't use TARGET if it isn't a register, is a hard register,
5017 or is the wrong mode. */
5019 || REGNO (target) < FIRST_PSEUDO_REGISTER
5020 || GET_MODE (target) != fmode)
5021 target = gen_reg_rtx (fmode);
5023 imode = GET_MODE (from);
5024 do_pending_stack_adjust ();
5026 /* Test whether the sign bit is set. */
5027 emit_cmp_and_jump_insns (from, const0_rtx, LT, NULL_RTX, imode,
5030 /* The sign bit is not set. Convert as signed. */
5031 expand_float (target, from, 0);
5032 emit_jump_insn (gen_jump (label));
5035 /* The sign bit is set.
5036 Convert to a usable (positive signed) value by shifting right
5037 one bit, while remembering if a nonzero bit was shifted
5038 out; i.e., compute (from & 1) | (from >> 1). */
5040 emit_label (neglabel);
5041 temp = expand_binop (imode, and_optab, from, const1_rtx,
5042 NULL_RTX, 1, OPTAB_LIB_WIDEN);
5043 temp1 = expand_shift (RSHIFT_EXPR, imode, from, integer_one_node,
5045 temp = expand_binop (imode, ior_optab, temp, temp1, temp, 1,
5047 expand_float (target, temp, 0);
5049 /* Multiply by 2 to undo the shift above. */
5050 temp = expand_binop (fmode, add_optab, target, target,
5051 target, 0, OPTAB_LIB_WIDEN);
5053 emit_move_insn (target, temp);
5055 do_pending_stack_adjust ();
5061 /* If we are about to do some arithmetic to correct for an
5062 unsigned operand, do it in a pseudo-register. */
5064 if (GET_MODE (to) != fmode
5065 || !REG_P (to) || REGNO (to) < FIRST_PSEUDO_REGISTER)
5066 target = gen_reg_rtx (fmode);
5068 /* Convert as signed integer to floating. */
5069 expand_float (target, from, 0);
5071 /* If FROM is negative (and therefore TO is negative),
5072 correct its value by 2**bitwidth. */
5074 do_pending_stack_adjust ();
5075 emit_cmp_and_jump_insns (from, const0_rtx, GE, NULL_RTX, GET_MODE (from),
5079 real_2expN (&offset, GET_MODE_BITSIZE (GET_MODE (from)), fmode);
5080 temp = expand_binop (fmode, add_optab, target,
5081 CONST_DOUBLE_FROM_REAL_VALUE (offset, fmode),
5082 target, 0, OPTAB_LIB_WIDEN);
5084 emit_move_insn (target, temp);
5086 do_pending_stack_adjust ();
5091 /* No hardware instruction available; call a library routine. */
5096 convert_optab tab = unsignedp ? ufloat_optab : sfloat_optab;
5098 if (GET_MODE_SIZE (GET_MODE (from)) < GET_MODE_SIZE (SImode))
5099 from = convert_to_mode (SImode, from, unsignedp);
5101 libfunc = convert_optab_libfunc (tab, GET_MODE (to), GET_MODE (from));
5102 gcc_assert (libfunc);
5106 value = emit_library_call_value (libfunc, NULL_RTX, LCT_CONST,
5107 GET_MODE (to), 1, from,
5109 insns = get_insns ();
5112 emit_libcall_block (insns, target, value,
5113 gen_rtx_fmt_e (unsignedp ? UNSIGNED_FLOAT : FLOAT,
5114 GET_MODE (to), from));
5119 /* Copy result to requested destination
5120 if we have been computing in a temp location. */
5124 if (GET_MODE (target) == GET_MODE (to))
5125 emit_move_insn (to, target);
5127 convert_move (to, target, 0);
5131 /* Generate code to convert FROM to fixed point and store in TO. FROM
5132 must be floating point. */
5135 expand_fix (rtx to, rtx from, int unsignedp)
5137 enum insn_code icode;
5139 enum machine_mode fmode, imode;
5142 /* We first try to find a pair of modes, one real and one integer, at
5143 least as wide as FROM and TO, respectively, in which we can open-code
5144 this conversion. If the integer mode is wider than the mode of TO,
5145 we can do the conversion either signed or unsigned. */
5147 for (fmode = GET_MODE (from); fmode != VOIDmode;
5148 fmode = GET_MODE_WIDER_MODE (fmode))
5149 for (imode = GET_MODE (to); imode != VOIDmode;
5150 imode = GET_MODE_WIDER_MODE (imode))
5152 int doing_unsigned = unsignedp;
5154 icode = can_fix_p (imode, fmode, unsignedp, &must_trunc);
5155 if (icode == CODE_FOR_nothing && imode != GET_MODE (to) && unsignedp)
5156 icode = can_fix_p (imode, fmode, 0, &must_trunc), doing_unsigned = 0;
5158 if (icode != CODE_FOR_nothing)
5160 if (fmode != GET_MODE (from))
5161 from = convert_to_mode (fmode, from, 0);
5165 rtx temp = gen_reg_rtx (GET_MODE (from));
5166 from = expand_unop (GET_MODE (from), ftrunc_optab, from,
5170 if (imode != GET_MODE (to))
5171 target = gen_reg_rtx (imode);
5173 emit_unop_insn (icode, target, from,
5174 doing_unsigned ? UNSIGNED_FIX : FIX);
5176 convert_move (to, target, unsignedp);
5181 /* For an unsigned conversion, there is one more way to do it.
5182 If we have a signed conversion, we generate code that compares
5183 the real value to the largest representable positive number. If if
5184 is smaller, the conversion is done normally. Otherwise, subtract
5185 one plus the highest signed number, convert, and add it back.
5187 We only need to check all real modes, since we know we didn't find
5188 anything with a wider integer mode.
5190 This code used to extend FP value into mode wider than the destination.
5191 This is needed for decimal float modes which cannot accurately
5192 represent one plus the highest signed number of the same size, but
5193 not for binary modes. Consider, for instance conversion from SFmode
5196 The hot path through the code is dealing with inputs smaller than 2^63
5197 and doing just the conversion, so there is no bits to lose.
5199 In the other path we know the value is positive in the range 2^63..2^64-1
5200 inclusive. (as for other input overflow happens and result is undefined)
5201 So we know that the most important bit set in mantissa corresponds to
5202 2^63. The subtraction of 2^63 should not generate any rounding as it
5203 simply clears out that bit. The rest is trivial. */
5205 if (unsignedp && GET_MODE_BITSIZE (GET_MODE (to)) <= HOST_BITS_PER_WIDE_INT)
5206 for (fmode = GET_MODE (from); fmode != VOIDmode;
5207 fmode = GET_MODE_WIDER_MODE (fmode))
5208 if (CODE_FOR_nothing != can_fix_p (GET_MODE (to), fmode, 0, &must_trunc)
5209 && (!DECIMAL_FLOAT_MODE_P (fmode)
5210 || GET_MODE_BITSIZE (fmode) > GET_MODE_BITSIZE (GET_MODE (to))))
5213 REAL_VALUE_TYPE offset;
5214 rtx limit, lab1, lab2, insn;
5216 bitsize = GET_MODE_BITSIZE (GET_MODE (to));
5217 real_2expN (&offset, bitsize - 1, fmode);
5218 limit = CONST_DOUBLE_FROM_REAL_VALUE (offset, fmode);
5219 lab1 = gen_label_rtx ();
5220 lab2 = gen_label_rtx ();
5222 if (fmode != GET_MODE (from))
5223 from = convert_to_mode (fmode, from, 0);
5225 /* See if we need to do the subtraction. */
5226 do_pending_stack_adjust ();
5227 emit_cmp_and_jump_insns (from, limit, GE, NULL_RTX, GET_MODE (from),
5230 /* If not, do the signed "fix" and branch around fixup code. */
5231 expand_fix (to, from, 0);
5232 emit_jump_insn (gen_jump (lab2));
5235 /* Otherwise, subtract 2**(N-1), convert to signed number,
5236 then add 2**(N-1). Do the addition using XOR since this
5237 will often generate better code. */
5239 target = expand_binop (GET_MODE (from), sub_optab, from, limit,
5240 NULL_RTX, 0, OPTAB_LIB_WIDEN);
5241 expand_fix (to, target, 0);
5242 target = expand_binop (GET_MODE (to), xor_optab, to,
5244 ((HOST_WIDE_INT) 1 << (bitsize - 1),
5246 to, 1, OPTAB_LIB_WIDEN);
5249 emit_move_insn (to, target);
5253 if (optab_handler (mov_optab, GET_MODE (to))->insn_code
5254 != CODE_FOR_nothing)
5256 /* Make a place for a REG_NOTE and add it. */
5257 insn = emit_move_insn (to, to);
5258 set_unique_reg_note (insn,
5260 gen_rtx_fmt_e (UNSIGNED_FIX,
5268 /* We can't do it with an insn, so use a library call. But first ensure
5269 that the mode of TO is at least as wide as SImode, since those are the
5270 only library calls we know about. */
5272 if (GET_MODE_SIZE (GET_MODE (to)) < GET_MODE_SIZE (SImode))
5274 target = gen_reg_rtx (SImode);
5276 expand_fix (target, from, unsignedp);
5284 convert_optab tab = unsignedp ? ufix_optab : sfix_optab;
5285 libfunc = convert_optab_libfunc (tab, GET_MODE (to), GET_MODE (from));
5286 gcc_assert (libfunc);
5290 value = emit_library_call_value (libfunc, NULL_RTX, LCT_CONST,
5291 GET_MODE (to), 1, from,
5293 insns = get_insns ();
5296 emit_libcall_block (insns, target, value,
5297 gen_rtx_fmt_e (unsignedp ? UNSIGNED_FIX : FIX,
5298 GET_MODE (to), from));
5303 if (GET_MODE (to) == GET_MODE (target))
5304 emit_move_insn (to, target);
5306 convert_move (to, target, 0);
5310 /* Generate code to convert FROM or TO a fixed-point.
5311 If UINTP is true, either TO or FROM is an unsigned integer.
5312 If SATP is true, we need to saturate the result. */
5315 expand_fixed_convert (rtx to, rtx from, int uintp, int satp)
5317 enum machine_mode to_mode = GET_MODE (to);
5318 enum machine_mode from_mode = GET_MODE (from);
5320 enum rtx_code this_code;
5321 enum insn_code code;
5325 if (to_mode == from_mode)
5327 emit_move_insn (to, from);
5333 tab = satp ? satfractuns_optab : fractuns_optab;
5334 this_code = satp ? UNSIGNED_SAT_FRACT : UNSIGNED_FRACT_CONVERT;
5338 tab = satp ? satfract_optab : fract_optab;
5339 this_code = satp ? SAT_FRACT : FRACT_CONVERT;
5341 code = tab->handlers[to_mode][from_mode].insn_code;
5342 if (code != CODE_FOR_nothing)
5344 emit_unop_insn (code, to, from, this_code);
5348 libfunc = convert_optab_libfunc (tab, to_mode, from_mode);
5349 gcc_assert (libfunc);
5352 value = emit_library_call_value (libfunc, NULL_RTX, LCT_CONST, to_mode,
5353 1, from, from_mode);
5354 insns = get_insns ();
5357 emit_libcall_block (insns, to, value,
5358 gen_rtx_fmt_e (tab->code, to_mode, from));
5361 /* Generate code to convert FROM to fixed point and store in TO. FROM
5362 must be floating point, TO must be signed. Use the conversion optab
5363 TAB to do the conversion. */
5366 expand_sfix_optab (rtx to, rtx from, convert_optab tab)
5368 enum insn_code icode;
5370 enum machine_mode fmode, imode;
5372 /* We first try to find a pair of modes, one real and one integer, at
5373 least as wide as FROM and TO, respectively, in which we can open-code
5374 this conversion. If the integer mode is wider than the mode of TO,
5375 we can do the conversion either signed or unsigned. */
5377 for (fmode = GET_MODE (from); fmode != VOIDmode;
5378 fmode = GET_MODE_WIDER_MODE (fmode))
5379 for (imode = GET_MODE (to); imode != VOIDmode;
5380 imode = GET_MODE_WIDER_MODE (imode))
5382 icode = convert_optab_handler (tab, imode, fmode)->insn_code;
5383 if (icode != CODE_FOR_nothing)
5385 if (fmode != GET_MODE (from))
5386 from = convert_to_mode (fmode, from, 0);
5388 if (imode != GET_MODE (to))
5389 target = gen_reg_rtx (imode);
5391 if (!maybe_emit_unop_insn (icode, target, from, UNKNOWN))
5394 convert_move (to, target, 0);
5402 /* Report whether we have an instruction to perform the operation
5403 specified by CODE on operands of mode MODE. */
5405 have_insn_for (enum rtx_code code, enum machine_mode mode)
5407 return (code_to_optab[(int) code] != 0
5408 && (optab_handler (code_to_optab[(int) code], mode)->insn_code
5409 != CODE_FOR_nothing));
5412 /* Set all insn_code fields to CODE_FOR_nothing. */
5415 init_insn_codes (void)
5419 for (i = 0; i < (unsigned int) OTI_MAX; i++)
5424 op = &optab_table[i];
5425 for (j = 0; j < NUM_MACHINE_MODES; j++)
5426 optab_handler (op, j)->insn_code = CODE_FOR_nothing;
5428 for (i = 0; i < (unsigned int) COI_MAX; i++)
5433 op = &convert_optab_table[i];
5434 for (j = 0; j < NUM_MACHINE_MODES; j++)
5435 for (k = 0; k < NUM_MACHINE_MODES; k++)
5436 convert_optab_handler (op, j, k)->insn_code = CODE_FOR_nothing;
5440 /* Initialize OP's code to CODE, and write it into the code_to_optab table. */
5442 init_optab (optab op, enum rtx_code code)
5445 code_to_optab[(int) code] = op;
5448 /* Same, but fill in its code as CODE, and do _not_ write it into
5449 the code_to_optab table. */
5451 init_optabv (optab op, enum rtx_code code)
5456 /* Conversion optabs never go in the code_to_optab table. */
5458 init_convert_optab (convert_optab op, enum rtx_code code)
5463 /* Initialize the libfunc fields of an entire group of entries in some
5464 optab. Each entry is set equal to a string consisting of a leading
5465 pair of underscores followed by a generic operation name followed by
5466 a mode name (downshifted to lowercase) followed by a single character
5467 representing the number of operands for the given operation (which is
5468 usually one of the characters '2', '3', or '4').
5470 OPTABLE is the table in which libfunc fields are to be initialized.
5471 OPNAME is the generic (string) name of the operation.
5472 SUFFIX is the character which specifies the number of operands for
5473 the given generic operation.
5474 MODE is the mode to generate for.
5478 gen_libfunc (optab optable, const char *opname, int suffix, enum machine_mode mode)
5480 unsigned opname_len = strlen (opname);
5481 const char *mname = GET_MODE_NAME (mode);
5482 unsigned mname_len = strlen (mname);
5483 char *libfunc_name = XALLOCAVEC (char, 2 + opname_len + mname_len + 1 + 1);
5490 for (q = opname; *q; )
5492 for (q = mname; *q; q++)
5493 *p++ = TOLOWER (*q);
5497 set_optab_libfunc (optable, mode,
5498 ggc_alloc_string (libfunc_name, p - libfunc_name));
5501 /* Like gen_libfunc, but verify that integer operation is involved. */
5504 gen_int_libfunc (optab optable, const char *opname, char suffix,
5505 enum machine_mode mode)
5507 int maxsize = 2 * BITS_PER_WORD;
5509 if (GET_MODE_CLASS (mode) != MODE_INT)
5511 if (maxsize < LONG_LONG_TYPE_SIZE)
5512 maxsize = LONG_LONG_TYPE_SIZE;
5513 if (GET_MODE_CLASS (mode) != MODE_INT
5514 || mode < word_mode || GET_MODE_BITSIZE (mode) > maxsize)
5516 gen_libfunc (optable, opname, suffix, mode);
5519 /* Like gen_libfunc, but verify that FP and set decimal prefix if needed. */
5522 gen_fp_libfunc (optab optable, const char *opname, char suffix,
5523 enum machine_mode mode)
5527 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
5528 gen_libfunc (optable, opname, suffix, mode);
5529 if (DECIMAL_FLOAT_MODE_P (mode))
5531 dec_opname = XALLOCAVEC (char, sizeof (DECIMAL_PREFIX) + strlen (opname));
5532 /* For BID support, change the name to have either a bid_ or dpd_ prefix
5533 depending on the low level floating format used. */
5534 memcpy (dec_opname, DECIMAL_PREFIX, sizeof (DECIMAL_PREFIX) - 1);
5535 strcpy (dec_opname + sizeof (DECIMAL_PREFIX) - 1, opname);
5536 gen_libfunc (optable, dec_opname, suffix, mode);
5540 /* Like gen_libfunc, but verify that fixed-point operation is involved. */
5543 gen_fixed_libfunc (optab optable, const char *opname, char suffix,
5544 enum machine_mode mode)
5546 if (!ALL_FIXED_POINT_MODE_P (mode))
5548 gen_libfunc (optable, opname, suffix, mode);
5551 /* Like gen_libfunc, but verify that signed fixed-point operation is
5555 gen_signed_fixed_libfunc (optab optable, const char *opname, char suffix,
5556 enum machine_mode mode)
5558 if (!SIGNED_FIXED_POINT_MODE_P (mode))
5560 gen_libfunc (optable, opname, suffix, mode);
5563 /* Like gen_libfunc, but verify that unsigned fixed-point operation is
5567 gen_unsigned_fixed_libfunc (optab optable, const char *opname, char suffix,
5568 enum machine_mode mode)
5570 if (!UNSIGNED_FIXED_POINT_MODE_P (mode))
5572 gen_libfunc (optable, opname, suffix, mode);
5575 /* Like gen_libfunc, but verify that FP or INT operation is involved. */
5578 gen_int_fp_libfunc (optab optable, const char *name, char suffix,
5579 enum machine_mode mode)
5581 if (DECIMAL_FLOAT_MODE_P (mode) || GET_MODE_CLASS (mode) == MODE_FLOAT)
5582 gen_fp_libfunc (optable, name, suffix, mode);
5583 if (INTEGRAL_MODE_P (mode))
5584 gen_int_libfunc (optable, name, suffix, mode);
5587 /* Like gen_libfunc, but verify that FP or INT operation is involved
5588 and add 'v' suffix for integer operation. */
5591 gen_intv_fp_libfunc (optab optable, const char *name, char suffix,
5592 enum machine_mode mode)
5594 if (DECIMAL_FLOAT_MODE_P (mode) || GET_MODE_CLASS (mode) == MODE_FLOAT)
5595 gen_fp_libfunc (optable, name, suffix, mode);
5596 if (GET_MODE_CLASS (mode) == MODE_INT)
5598 int len = strlen (name);
5599 char *v_name = XALLOCAVEC (char, len + 2);
5600 strcpy (v_name, name);
5602 v_name[len + 1] = 0;
5603 gen_int_libfunc (optable, v_name, suffix, mode);
5607 /* Like gen_libfunc, but verify that FP or INT or FIXED operation is
5611 gen_int_fp_fixed_libfunc (optab optable, const char *name, char suffix,
5612 enum machine_mode mode)
5614 if (DECIMAL_FLOAT_MODE_P (mode) || GET_MODE_CLASS (mode) == MODE_FLOAT)
5615 gen_fp_libfunc (optable, name, suffix, mode);
5616 if (INTEGRAL_MODE_P (mode))
5617 gen_int_libfunc (optable, name, suffix, mode);
5618 if (ALL_FIXED_POINT_MODE_P (mode))
5619 gen_fixed_libfunc (optable, name, suffix, mode);
5622 /* Like gen_libfunc, but verify that FP or INT or signed FIXED operation is
5626 gen_int_fp_signed_fixed_libfunc (optab optable, const char *name, char suffix,
5627 enum machine_mode mode)
5629 if (DECIMAL_FLOAT_MODE_P (mode) || GET_MODE_CLASS (mode) == MODE_FLOAT)
5630 gen_fp_libfunc (optable, name, suffix, mode);
5631 if (INTEGRAL_MODE_P (mode))
5632 gen_int_libfunc (optable, name, suffix, mode);
5633 if (SIGNED_FIXED_POINT_MODE_P (mode))
5634 gen_signed_fixed_libfunc (optable, name, suffix, mode);
5637 /* Like gen_libfunc, but verify that INT or FIXED operation is
5641 gen_int_fixed_libfunc (optab optable, const char *name, char suffix,
5642 enum machine_mode mode)
5644 if (INTEGRAL_MODE_P (mode))
5645 gen_int_libfunc (optable, name, suffix, mode);
5646 if (ALL_FIXED_POINT_MODE_P (mode))
5647 gen_fixed_libfunc (optable, name, suffix, mode);
5650 /* Like gen_libfunc, but verify that INT or signed FIXED operation is
5654 gen_int_signed_fixed_libfunc (optab optable, const char *name, char suffix,
5655 enum machine_mode mode)
5657 if (INTEGRAL_MODE_P (mode))
5658 gen_int_libfunc (optable, name, suffix, mode);
5659 if (SIGNED_FIXED_POINT_MODE_P (mode))
5660 gen_signed_fixed_libfunc (optable, name, suffix, mode);
5663 /* Like gen_libfunc, but verify that INT or unsigned FIXED operation is
5667 gen_int_unsigned_fixed_libfunc (optab optable, const char *name, char suffix,
5668 enum machine_mode mode)
5670 if (INTEGRAL_MODE_P (mode))
5671 gen_int_libfunc (optable, name, suffix, mode);
5672 if (UNSIGNED_FIXED_POINT_MODE_P (mode))
5673 gen_unsigned_fixed_libfunc (optable, name, suffix, mode);
5676 /* Initialize the libfunc fields of an entire group of entries of an
5677 inter-mode-class conversion optab. The string formation rules are
5678 similar to the ones for init_libfuncs, above, but instead of having
5679 a mode name and an operand count these functions have two mode names
5680 and no operand count. */
5683 gen_interclass_conv_libfunc (convert_optab tab,
5685 enum machine_mode tmode,
5686 enum machine_mode fmode)
5688 size_t opname_len = strlen (opname);
5689 size_t mname_len = 0;
5691 const char *fname, *tname;
5693 char *libfunc_name, *suffix;
5694 char *nondec_name, *dec_name, *nondec_suffix, *dec_suffix;
5697 /* If this is a decimal conversion, add the current BID vs. DPD prefix that
5698 depends on which underlying decimal floating point format is used. */
5699 const size_t dec_len = sizeof (DECIMAL_PREFIX) - 1;
5701 mname_len = strlen (GET_MODE_NAME (tmode)) + strlen (GET_MODE_NAME (fmode));
5703 nondec_name = XALLOCAVEC (char, 2 + opname_len + mname_len + 1 + 1);
5704 nondec_name[0] = '_';
5705 nondec_name[1] = '_';
5706 memcpy (&nondec_name[2], opname, opname_len);
5707 nondec_suffix = nondec_name + opname_len + 2;
5709 dec_name = XALLOCAVEC (char, 2 + dec_len + opname_len + mname_len + 1 + 1);
5712 memcpy (&dec_name[2], DECIMAL_PREFIX, dec_len);
5713 memcpy (&dec_name[2+dec_len], opname, opname_len);
5714 dec_suffix = dec_name + dec_len + opname_len + 2;
5716 fname = GET_MODE_NAME (fmode);
5717 tname = GET_MODE_NAME (tmode);
5719 if (DECIMAL_FLOAT_MODE_P(fmode) || DECIMAL_FLOAT_MODE_P(tmode))
5721 libfunc_name = dec_name;
5722 suffix = dec_suffix;
5726 libfunc_name = nondec_name;
5727 suffix = nondec_suffix;
5731 for (q = fname; *q; p++, q++)
5733 for (q = tname; *q; p++, q++)
5738 set_conv_libfunc (tab, tmode, fmode,
5739 ggc_alloc_string (libfunc_name, p - libfunc_name));
5742 /* Same as gen_interclass_conv_libfunc but verify that we are producing
5743 int->fp conversion. */
5746 gen_int_to_fp_conv_libfunc (convert_optab tab,
5748 enum machine_mode tmode,
5749 enum machine_mode fmode)
5751 if (GET_MODE_CLASS (fmode) != MODE_INT)
5753 if (GET_MODE_CLASS (tmode) != MODE_FLOAT && !DECIMAL_FLOAT_MODE_P (tmode))
5755 gen_interclass_conv_libfunc (tab, opname, tmode, fmode);
5758 /* ufloat_optab is special by using floatun for FP and floatuns decimal fp
5762 gen_ufloat_conv_libfunc (convert_optab tab,
5763 const char *opname ATTRIBUTE_UNUSED,
5764 enum machine_mode tmode,
5765 enum machine_mode fmode)
5767 if (DECIMAL_FLOAT_MODE_P (tmode))
5768 gen_int_to_fp_conv_libfunc (tab, "floatuns", tmode, fmode);
5770 gen_int_to_fp_conv_libfunc (tab, "floatun", tmode, fmode);
5773 /* Same as gen_interclass_conv_libfunc but verify that we are producing
5774 fp->int conversion. */
5777 gen_int_to_fp_nondecimal_conv_libfunc (convert_optab tab,
5779 enum machine_mode tmode,
5780 enum machine_mode fmode)
5782 if (GET_MODE_CLASS (fmode) != MODE_INT)
5784 if (GET_MODE_CLASS (tmode) != MODE_FLOAT)
5786 gen_interclass_conv_libfunc (tab, opname, tmode, fmode);
5789 /* Same as gen_interclass_conv_libfunc but verify that we are producing
5790 fp->int conversion with no decimal floating point involved. */
5793 gen_fp_to_int_conv_libfunc (convert_optab tab,
5795 enum machine_mode tmode,
5796 enum machine_mode fmode)
5798 if (GET_MODE_CLASS (fmode) != MODE_FLOAT && !DECIMAL_FLOAT_MODE_P (fmode))
5800 if (GET_MODE_CLASS (tmode) != MODE_INT)
5802 gen_interclass_conv_libfunc (tab, opname, tmode, fmode);
5805 /* Initialize the libfunc fields of an of an intra-mode-class conversion optab.
5806 The string formation rules are
5807 similar to the ones for init_libfunc, above. */
5810 gen_intraclass_conv_libfunc (convert_optab tab, const char *opname,
5811 enum machine_mode tmode, enum machine_mode fmode)
5813 size_t opname_len = strlen (opname);
5814 size_t mname_len = 0;
5816 const char *fname, *tname;
5818 char *nondec_name, *dec_name, *nondec_suffix, *dec_suffix;
5819 char *libfunc_name, *suffix;
5822 /* If this is a decimal conversion, add the current BID vs. DPD prefix that
5823 depends on which underlying decimal floating point format is used. */
5824 const size_t dec_len = sizeof (DECIMAL_PREFIX) - 1;
5826 mname_len = strlen (GET_MODE_NAME (tmode)) + strlen (GET_MODE_NAME (fmode));
5828 nondec_name = XALLOCAVEC (char, 2 + opname_len + mname_len + 1 + 1);
5829 nondec_name[0] = '_';
5830 nondec_name[1] = '_';
5831 memcpy (&nondec_name[2], opname, opname_len);
5832 nondec_suffix = nondec_name + opname_len + 2;
5834 dec_name = XALLOCAVEC (char, 2 + dec_len + opname_len + mname_len + 1 + 1);
5837 memcpy (&dec_name[2], DECIMAL_PREFIX, dec_len);
5838 memcpy (&dec_name[2 + dec_len], opname, opname_len);
5839 dec_suffix = dec_name + dec_len + opname_len + 2;
5841 fname = GET_MODE_NAME (fmode);
5842 tname = GET_MODE_NAME (tmode);
5844 if (DECIMAL_FLOAT_MODE_P(fmode) || DECIMAL_FLOAT_MODE_P(tmode))
5846 libfunc_name = dec_name;
5847 suffix = dec_suffix;
5851 libfunc_name = nondec_name;
5852 suffix = nondec_suffix;
5856 for (q = fname; *q; p++, q++)
5858 for (q = tname; *q; p++, q++)
5864 set_conv_libfunc (tab, tmode, fmode,
5865 ggc_alloc_string (libfunc_name, p - libfunc_name));
5868 /* Pick proper libcall for trunc_optab. We need to chose if we do
5869 truncation or extension and interclass or intraclass. */
5872 gen_trunc_conv_libfunc (convert_optab tab,
5874 enum machine_mode tmode,
5875 enum machine_mode fmode)
5877 if (GET_MODE_CLASS (tmode) != MODE_FLOAT && !DECIMAL_FLOAT_MODE_P (tmode))
5879 if (GET_MODE_CLASS (fmode) != MODE_FLOAT && !DECIMAL_FLOAT_MODE_P (fmode))
5884 if ((GET_MODE_CLASS (tmode) == MODE_FLOAT && DECIMAL_FLOAT_MODE_P (fmode))
5885 || (GET_MODE_CLASS (fmode) == MODE_FLOAT && DECIMAL_FLOAT_MODE_P (tmode)))
5886 gen_interclass_conv_libfunc (tab, opname, tmode, fmode);
5888 if (GET_MODE_PRECISION (fmode) <= GET_MODE_PRECISION (tmode))
5891 if ((GET_MODE_CLASS (tmode) == MODE_FLOAT
5892 && GET_MODE_CLASS (fmode) == MODE_FLOAT)
5893 || (DECIMAL_FLOAT_MODE_P (fmode) && DECIMAL_FLOAT_MODE_P (tmode)))
5894 gen_intraclass_conv_libfunc (tab, opname, tmode, fmode);
5897 /* Pick proper libcall for extend_optab. We need to chose if we do
5898 truncation or extension and interclass or intraclass. */
5901 gen_extend_conv_libfunc (convert_optab tab,
5902 const char *opname ATTRIBUTE_UNUSED,
5903 enum machine_mode tmode,
5904 enum machine_mode fmode)
5906 if (GET_MODE_CLASS (tmode) != MODE_FLOAT && !DECIMAL_FLOAT_MODE_P (tmode))
5908 if (GET_MODE_CLASS (fmode) != MODE_FLOAT && !DECIMAL_FLOAT_MODE_P (fmode))
5913 if ((GET_MODE_CLASS (tmode) == MODE_FLOAT && DECIMAL_FLOAT_MODE_P (fmode))
5914 || (GET_MODE_CLASS (fmode) == MODE_FLOAT && DECIMAL_FLOAT_MODE_P (tmode)))
5915 gen_interclass_conv_libfunc (tab, opname, tmode, fmode);
5917 if (GET_MODE_PRECISION (fmode) > GET_MODE_PRECISION (tmode))
5920 if ((GET_MODE_CLASS (tmode) == MODE_FLOAT
5921 && GET_MODE_CLASS (fmode) == MODE_FLOAT)
5922 || (DECIMAL_FLOAT_MODE_P (fmode) && DECIMAL_FLOAT_MODE_P (tmode)))
5923 gen_intraclass_conv_libfunc (tab, opname, tmode, fmode);
5926 /* Pick proper libcall for fract_optab. We need to chose if we do
5927 interclass or intraclass. */
5930 gen_fract_conv_libfunc (convert_optab tab,
5932 enum machine_mode tmode,
5933 enum machine_mode fmode)
5937 if (!(ALL_FIXED_POINT_MODE_P (tmode) || ALL_FIXED_POINT_MODE_P (fmode)))
5940 if (GET_MODE_CLASS (tmode) == GET_MODE_CLASS (fmode))
5941 gen_intraclass_conv_libfunc (tab, opname, tmode, fmode);
5943 gen_interclass_conv_libfunc (tab, opname, tmode, fmode);
5946 /* Pick proper libcall for fractuns_optab. */
5949 gen_fractuns_conv_libfunc (convert_optab tab,
5951 enum machine_mode tmode,
5952 enum machine_mode fmode)
5956 /* One mode must be a fixed-point mode, and the other must be an integer
5958 if (!((ALL_FIXED_POINT_MODE_P (tmode) && GET_MODE_CLASS (fmode) == MODE_INT)
5959 || (ALL_FIXED_POINT_MODE_P (fmode)
5960 && GET_MODE_CLASS (tmode) == MODE_INT)))
5963 gen_interclass_conv_libfunc (tab, opname, tmode, fmode);
5966 /* Pick proper libcall for satfract_optab. We need to chose if we do
5967 interclass or intraclass. */
5970 gen_satfract_conv_libfunc (convert_optab tab,
5972 enum machine_mode tmode,
5973 enum machine_mode fmode)
5977 /* TMODE must be a fixed-point mode. */
5978 if (!ALL_FIXED_POINT_MODE_P (tmode))
5981 if (GET_MODE_CLASS (tmode) == GET_MODE_CLASS (fmode))
5982 gen_intraclass_conv_libfunc (tab, opname, tmode, fmode);
5984 gen_interclass_conv_libfunc (tab, opname, tmode, fmode);
5987 /* Pick proper libcall for satfractuns_optab. */
5990 gen_satfractuns_conv_libfunc (convert_optab tab,
5992 enum machine_mode tmode,
5993 enum machine_mode fmode)
5997 /* TMODE must be a fixed-point mode, and FMODE must be an integer mode. */
5998 if (!(ALL_FIXED_POINT_MODE_P (tmode) && GET_MODE_CLASS (fmode) == MODE_INT))
6001 gen_interclass_conv_libfunc (tab, opname, tmode, fmode);
6004 /* A table of previously-created libfuncs, hashed by name. */
6005 static GTY ((param_is (union tree_node))) htab_t libfunc_decls;
6007 /* Hashtable callbacks for libfunc_decls. */
6010 libfunc_decl_hash (const void *entry)
6012 return htab_hash_string (IDENTIFIER_POINTER (DECL_NAME ((const_tree) entry)));
6016 libfunc_decl_eq (const void *entry1, const void *entry2)
6018 return DECL_NAME ((const_tree) entry1) == (const_tree) entry2;
6022 init_one_libfunc (const char *name)
6028 if (libfunc_decls == NULL)
6029 libfunc_decls = htab_create_ggc (37, libfunc_decl_hash,
6030 libfunc_decl_eq, NULL);
6032 /* See if we have already created a libfunc decl for this function. */
6033 id = get_identifier (name);
6034 hash = htab_hash_string (name);
6035 slot = htab_find_slot_with_hash (libfunc_decls, id, hash, INSERT);
6036 decl = (tree) *slot;
6039 /* Create a new decl, so that it can be passed to
6040 targetm.encode_section_info. */
6041 /* ??? We don't have any type information except for this is
6042 a function. Pretend this is "int foo()". */
6043 decl = build_decl (FUNCTION_DECL, get_identifier (name),
6044 build_function_type (integer_type_node, NULL_TREE));
6045 DECL_ARTIFICIAL (decl) = 1;
6046 DECL_EXTERNAL (decl) = 1;
6047 TREE_PUBLIC (decl) = 1;
6049 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
6050 are the flags assigned by targetm.encode_section_info. */
6051 SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl), 0), NULL);
6055 return XEXP (DECL_RTL (decl), 0);
6058 /* Call this to reset the function entry for one optab (OPTABLE) in mode
6059 MODE to NAME, which should be either 0 or a string constant. */
6061 set_optab_libfunc (optab optable, enum machine_mode mode, const char *name)
6064 struct libfunc_entry e;
6065 struct libfunc_entry **slot;
6066 e.optab = (size_t) (optable - &optab_table[0]);
6071 val = init_one_libfunc (name);
6074 slot = (struct libfunc_entry **) htab_find_slot (libfunc_hash, &e, INSERT);
6076 *slot = GGC_NEW (struct libfunc_entry);
6077 (*slot)->optab = (size_t) (optable - &optab_table[0]);
6078 (*slot)->mode1 = mode;
6079 (*slot)->mode2 = VOIDmode;
6080 (*slot)->libfunc = val;
6083 /* Call this to reset the function entry for one conversion optab
6084 (OPTABLE) from mode FMODE to mode TMODE to NAME, which should be
6085 either 0 or a string constant. */
6087 set_conv_libfunc (convert_optab optable, enum machine_mode tmode,
6088 enum machine_mode fmode, const char *name)
6091 struct libfunc_entry e;
6092 struct libfunc_entry **slot;
6093 e.optab = (size_t) (optable - &convert_optab_table[0]);
6098 val = init_one_libfunc (name);
6101 slot = (struct libfunc_entry **) htab_find_slot (libfunc_hash, &e, INSERT);
6103 *slot = GGC_NEW (struct libfunc_entry);
6104 (*slot)->optab = (size_t) (optable - &convert_optab_table[0]);
6105 (*slot)->mode1 = tmode;
6106 (*slot)->mode2 = fmode;
6107 (*slot)->libfunc = val;
6110 /* Call this to initialize the contents of the optabs
6111 appropriately for the current target machine. */
6117 enum machine_mode int_mode;
6120 libfunc_hash = htab_create_ggc (10, hash_libfunc, eq_libfunc, NULL);
6121 /* Start by initializing all tables to contain CODE_FOR_nothing. */
6123 for (i = 0; i < NUM_RTX_CODE; i++)
6124 setcc_gen_code[i] = CODE_FOR_nothing;
6126 #ifdef HAVE_conditional_move
6127 for (i = 0; i < NUM_MACHINE_MODES; i++)
6128 movcc_gen_code[i] = CODE_FOR_nothing;
6131 for (i = 0; i < NUM_MACHINE_MODES; i++)
6133 vcond_gen_code[i] = CODE_FOR_nothing;
6134 vcondu_gen_code[i] = CODE_FOR_nothing;
6137 #if GCC_VERSION >= 4000
6138 /* We statically initialize the insn_codes with CODE_FOR_nothing. */
6145 init_optab (add_optab, PLUS);
6146 init_optabv (addv_optab, PLUS);
6147 init_optab (sub_optab, MINUS);
6148 init_optabv (subv_optab, MINUS);
6149 init_optab (ssadd_optab, SS_PLUS);
6150 init_optab (usadd_optab, US_PLUS);
6151 init_optab (sssub_optab, SS_MINUS);
6152 init_optab (ussub_optab, US_MINUS);
6153 init_optab (smul_optab, MULT);
6154 init_optab (ssmul_optab, SS_MULT);
6155 init_optab (usmul_optab, US_MULT);
6156 init_optabv (smulv_optab, MULT);
6157 init_optab (smul_highpart_optab, UNKNOWN);
6158 init_optab (umul_highpart_optab, UNKNOWN);
6159 init_optab (smul_widen_optab, UNKNOWN);
6160 init_optab (umul_widen_optab, UNKNOWN);
6161 init_optab (usmul_widen_optab, UNKNOWN);
6162 init_optab (smadd_widen_optab, UNKNOWN);
6163 init_optab (umadd_widen_optab, UNKNOWN);
6164 init_optab (ssmadd_widen_optab, UNKNOWN);
6165 init_optab (usmadd_widen_optab, UNKNOWN);
6166 init_optab (smsub_widen_optab, UNKNOWN);
6167 init_optab (umsub_widen_optab, UNKNOWN);
6168 init_optab (ssmsub_widen_optab, UNKNOWN);
6169 init_optab (usmsub_widen_optab, UNKNOWN);
6170 init_optab (sdiv_optab, DIV);
6171 init_optab (ssdiv_optab, SS_DIV);
6172 init_optab (usdiv_optab, US_DIV);
6173 init_optabv (sdivv_optab, DIV);
6174 init_optab (sdivmod_optab, UNKNOWN);
6175 init_optab (udiv_optab, UDIV);
6176 init_optab (udivmod_optab, UNKNOWN);
6177 init_optab (smod_optab, MOD);
6178 init_optab (umod_optab, UMOD);
6179 init_optab (fmod_optab, UNKNOWN);
6180 init_optab (remainder_optab, UNKNOWN);
6181 init_optab (ftrunc_optab, UNKNOWN);
6182 init_optab (and_optab, AND);
6183 init_optab (ior_optab, IOR);
6184 init_optab (xor_optab, XOR);
6185 init_optab (ashl_optab, ASHIFT);
6186 init_optab (ssashl_optab, SS_ASHIFT);
6187 init_optab (usashl_optab, US_ASHIFT);
6188 init_optab (ashr_optab, ASHIFTRT);
6189 init_optab (lshr_optab, LSHIFTRT);
6190 init_optab (rotl_optab, ROTATE);
6191 init_optab (rotr_optab, ROTATERT);
6192 init_optab (smin_optab, SMIN);
6193 init_optab (smax_optab, SMAX);
6194 init_optab (umin_optab, UMIN);
6195 init_optab (umax_optab, UMAX);
6196 init_optab (pow_optab, UNKNOWN);
6197 init_optab (atan2_optab, UNKNOWN);
6199 /* These three have codes assigned exclusively for the sake of
6201 init_optab (mov_optab, SET);
6202 init_optab (movstrict_optab, STRICT_LOW_PART);
6203 init_optab (cmp_optab, COMPARE);
6205 init_optab (storent_optab, UNKNOWN);
6207 init_optab (ucmp_optab, UNKNOWN);
6208 init_optab (tst_optab, UNKNOWN);
6210 init_optab (eq_optab, EQ);
6211 init_optab (ne_optab, NE);
6212 init_optab (gt_optab, GT);
6213 init_optab (ge_optab, GE);
6214 init_optab (lt_optab, LT);
6215 init_optab (le_optab, LE);
6216 init_optab (unord_optab, UNORDERED);
6218 init_optab (neg_optab, NEG);
6219 init_optab (ssneg_optab, SS_NEG);
6220 init_optab (usneg_optab, US_NEG);
6221 init_optabv (negv_optab, NEG);
6222 init_optab (abs_optab, ABS);
6223 init_optabv (absv_optab, ABS);
6224 init_optab (addcc_optab, UNKNOWN);
6225 init_optab (one_cmpl_optab, NOT);
6226 init_optab (bswap_optab, BSWAP);
6227 init_optab (ffs_optab, FFS);
6228 init_optab (clz_optab, CLZ);
6229 init_optab (ctz_optab, CTZ);
6230 init_optab (popcount_optab, POPCOUNT);
6231 init_optab (parity_optab, PARITY);
6232 init_optab (sqrt_optab, SQRT);
6233 init_optab (floor_optab, UNKNOWN);
6234 init_optab (ceil_optab, UNKNOWN);
6235 init_optab (round_optab, UNKNOWN);
6236 init_optab (btrunc_optab, UNKNOWN);
6237 init_optab (nearbyint_optab, UNKNOWN);
6238 init_optab (rint_optab, UNKNOWN);
6239 init_optab (sincos_optab, UNKNOWN);
6240 init_optab (sin_optab, UNKNOWN);
6241 init_optab (asin_optab, UNKNOWN);
6242 init_optab (cos_optab, UNKNOWN);
6243 init_optab (acos_optab, UNKNOWN);
6244 init_optab (exp_optab, UNKNOWN);
6245 init_optab (exp10_optab, UNKNOWN);
6246 init_optab (exp2_optab, UNKNOWN);
6247 init_optab (expm1_optab, UNKNOWN);
6248 init_optab (ldexp_optab, UNKNOWN);
6249 init_optab (scalb_optab, UNKNOWN);
6250 init_optab (logb_optab, UNKNOWN);
6251 init_optab (ilogb_optab, UNKNOWN);
6252 init_optab (log_optab, UNKNOWN);
6253 init_optab (log10_optab, UNKNOWN);
6254 init_optab (log2_optab, UNKNOWN);
6255 init_optab (log1p_optab, UNKNOWN);
6256 init_optab (tan_optab, UNKNOWN);
6257 init_optab (atan_optab, UNKNOWN);
6258 init_optab (copysign_optab, UNKNOWN);
6259 init_optab (signbit_optab, UNKNOWN);
6261 init_optab (isinf_optab, UNKNOWN);
6263 init_optab (strlen_optab, UNKNOWN);
6264 init_optab (cbranch_optab, UNKNOWN);
6265 init_optab (cmov_optab, UNKNOWN);
6266 init_optab (cstore_optab, UNKNOWN);
6267 init_optab (push_optab, UNKNOWN);
6269 init_optab (reduc_smax_optab, UNKNOWN);
6270 init_optab (reduc_umax_optab, UNKNOWN);
6271 init_optab (reduc_smin_optab, UNKNOWN);
6272 init_optab (reduc_umin_optab, UNKNOWN);
6273 init_optab (reduc_splus_optab, UNKNOWN);
6274 init_optab (reduc_uplus_optab, UNKNOWN);
6276 init_optab (ssum_widen_optab, UNKNOWN);
6277 init_optab (usum_widen_optab, UNKNOWN);
6278 init_optab (sdot_prod_optab, UNKNOWN);
6279 init_optab (udot_prod_optab, UNKNOWN);
6281 init_optab (vec_extract_optab, UNKNOWN);
6282 init_optab (vec_extract_even_optab, UNKNOWN);
6283 init_optab (vec_extract_odd_optab, UNKNOWN);
6284 init_optab (vec_interleave_high_optab, UNKNOWN);
6285 init_optab (vec_interleave_low_optab, UNKNOWN);
6286 init_optab (vec_set_optab, UNKNOWN);
6287 init_optab (vec_init_optab, UNKNOWN);
6288 init_optab (vec_shl_optab, UNKNOWN);
6289 init_optab (vec_shr_optab, UNKNOWN);
6290 init_optab (vec_realign_load_optab, UNKNOWN);
6291 init_optab (movmisalign_optab, UNKNOWN);
6292 init_optab (vec_widen_umult_hi_optab, UNKNOWN);
6293 init_optab (vec_widen_umult_lo_optab, UNKNOWN);
6294 init_optab (vec_widen_smult_hi_optab, UNKNOWN);
6295 init_optab (vec_widen_smult_lo_optab, UNKNOWN);
6296 init_optab (vec_unpacks_hi_optab, UNKNOWN);
6297 init_optab (vec_unpacks_lo_optab, UNKNOWN);
6298 init_optab (vec_unpacku_hi_optab, UNKNOWN);
6299 init_optab (vec_unpacku_lo_optab, UNKNOWN);
6300 init_optab (vec_unpacks_float_hi_optab, UNKNOWN);
6301 init_optab (vec_unpacks_float_lo_optab, UNKNOWN);
6302 init_optab (vec_unpacku_float_hi_optab, UNKNOWN);
6303 init_optab (vec_unpacku_float_lo_optab, UNKNOWN);
6304 init_optab (vec_pack_trunc_optab, UNKNOWN);
6305 init_optab (vec_pack_usat_optab, UNKNOWN);
6306 init_optab (vec_pack_ssat_optab, UNKNOWN);
6307 init_optab (vec_pack_ufix_trunc_optab, UNKNOWN);
6308 init_optab (vec_pack_sfix_trunc_optab, UNKNOWN);
6310 init_optab (powi_optab, UNKNOWN);
6313 init_convert_optab (sext_optab, SIGN_EXTEND);
6314 init_convert_optab (zext_optab, ZERO_EXTEND);
6315 init_convert_optab (trunc_optab, TRUNCATE);
6316 init_convert_optab (sfix_optab, FIX);
6317 init_convert_optab (ufix_optab, UNSIGNED_FIX);
6318 init_convert_optab (sfixtrunc_optab, UNKNOWN);
6319 init_convert_optab (ufixtrunc_optab, UNKNOWN);
6320 init_convert_optab (sfloat_optab, FLOAT);
6321 init_convert_optab (ufloat_optab, UNSIGNED_FLOAT);
6322 init_convert_optab (lrint_optab, UNKNOWN);
6323 init_convert_optab (lround_optab, UNKNOWN);
6324 init_convert_optab (lfloor_optab, UNKNOWN);
6325 init_convert_optab (lceil_optab, UNKNOWN);
6327 init_convert_optab (fract_optab, FRACT_CONVERT);
6328 init_convert_optab (fractuns_optab, UNSIGNED_FRACT_CONVERT);
6329 init_convert_optab (satfract_optab, SAT_FRACT);
6330 init_convert_optab (satfractuns_optab, UNSIGNED_SAT_FRACT);
6332 for (i = 0; i < NUM_MACHINE_MODES; i++)
6334 movmem_optab[i] = CODE_FOR_nothing;
6335 cmpstr_optab[i] = CODE_FOR_nothing;
6336 cmpstrn_optab[i] = CODE_FOR_nothing;
6337 cmpmem_optab[i] = CODE_FOR_nothing;
6338 setmem_optab[i] = CODE_FOR_nothing;
6340 sync_add_optab[i] = CODE_FOR_nothing;
6341 sync_sub_optab[i] = CODE_FOR_nothing;
6342 sync_ior_optab[i] = CODE_FOR_nothing;
6343 sync_and_optab[i] = CODE_FOR_nothing;
6344 sync_xor_optab[i] = CODE_FOR_nothing;
6345 sync_nand_optab[i] = CODE_FOR_nothing;
6346 sync_old_add_optab[i] = CODE_FOR_nothing;
6347 sync_old_sub_optab[i] = CODE_FOR_nothing;
6348 sync_old_ior_optab[i] = CODE_FOR_nothing;
6349 sync_old_and_optab[i] = CODE_FOR_nothing;
6350 sync_old_xor_optab[i] = CODE_FOR_nothing;
6351 sync_old_nand_optab[i] = CODE_FOR_nothing;
6352 sync_new_add_optab[i] = CODE_FOR_nothing;
6353 sync_new_sub_optab[i] = CODE_FOR_nothing;
6354 sync_new_ior_optab[i] = CODE_FOR_nothing;
6355 sync_new_and_optab[i] = CODE_FOR_nothing;
6356 sync_new_xor_optab[i] = CODE_FOR_nothing;
6357 sync_new_nand_optab[i] = CODE_FOR_nothing;
6358 sync_compare_and_swap[i] = CODE_FOR_nothing;
6359 sync_compare_and_swap_cc[i] = CODE_FOR_nothing;
6360 sync_lock_test_and_set[i] = CODE_FOR_nothing;
6361 sync_lock_release[i] = CODE_FOR_nothing;
6363 reload_in_optab[i] = reload_out_optab[i] = CODE_FOR_nothing;
6366 /* Fill in the optabs with the insns we support. */
6369 /* Initialize the optabs with the names of the library functions. */
6370 add_optab->libcall_basename = "add";
6371 add_optab->libcall_suffix = '3';
6372 add_optab->libcall_gen = gen_int_fp_fixed_libfunc;
6373 addv_optab->libcall_basename = "add";
6374 addv_optab->libcall_suffix = '3';
6375 addv_optab->libcall_gen = gen_intv_fp_libfunc;
6376 ssadd_optab->libcall_basename = "ssadd";
6377 ssadd_optab->libcall_suffix = '3';
6378 ssadd_optab->libcall_gen = gen_signed_fixed_libfunc;
6379 usadd_optab->libcall_basename = "usadd";
6380 usadd_optab->libcall_suffix = '3';
6381 usadd_optab->libcall_gen = gen_unsigned_fixed_libfunc;
6382 sub_optab->libcall_basename = "sub";
6383 sub_optab->libcall_suffix = '3';
6384 sub_optab->libcall_gen = gen_int_fp_fixed_libfunc;
6385 subv_optab->libcall_basename = "sub";
6386 subv_optab->libcall_suffix = '3';
6387 subv_optab->libcall_gen = gen_intv_fp_libfunc;
6388 sssub_optab->libcall_basename = "sssub";
6389 sssub_optab->libcall_suffix = '3';
6390 sssub_optab->libcall_gen = gen_signed_fixed_libfunc;
6391 ussub_optab->libcall_basename = "ussub";
6392 ussub_optab->libcall_suffix = '3';
6393 ussub_optab->libcall_gen = gen_unsigned_fixed_libfunc;
6394 smul_optab->libcall_basename = "mul";
6395 smul_optab->libcall_suffix = '3';
6396 smul_optab->libcall_gen = gen_int_fp_fixed_libfunc;
6397 smulv_optab->libcall_basename = "mul";
6398 smulv_optab->libcall_suffix = '3';
6399 smulv_optab->libcall_gen = gen_intv_fp_libfunc;
6400 ssmul_optab->libcall_basename = "ssmul";
6401 ssmul_optab->libcall_suffix = '3';
6402 ssmul_optab->libcall_gen = gen_signed_fixed_libfunc;
6403 usmul_optab->libcall_basename = "usmul";
6404 usmul_optab->libcall_suffix = '3';
6405 usmul_optab->libcall_gen = gen_unsigned_fixed_libfunc;
6406 sdiv_optab->libcall_basename = "div";
6407 sdiv_optab->libcall_suffix = '3';
6408 sdiv_optab->libcall_gen = gen_int_fp_signed_fixed_libfunc;
6409 sdivv_optab->libcall_basename = "divv";
6410 sdivv_optab->libcall_suffix = '3';
6411 sdivv_optab->libcall_gen = gen_int_libfunc;
6412 ssdiv_optab->libcall_basename = "ssdiv";
6413 ssdiv_optab->libcall_suffix = '3';
6414 ssdiv_optab->libcall_gen = gen_signed_fixed_libfunc;
6415 udiv_optab->libcall_basename = "udiv";
6416 udiv_optab->libcall_suffix = '3';
6417 udiv_optab->libcall_gen = gen_int_unsigned_fixed_libfunc;
6418 usdiv_optab->libcall_basename = "usdiv";
6419 usdiv_optab->libcall_suffix = '3';
6420 usdiv_optab->libcall_gen = gen_unsigned_fixed_libfunc;
6421 sdivmod_optab->libcall_basename = "divmod";
6422 sdivmod_optab->libcall_suffix = '4';
6423 sdivmod_optab->libcall_gen = gen_int_libfunc;
6424 udivmod_optab->libcall_basename = "udivmod";
6425 udivmod_optab->libcall_suffix = '4';
6426 udivmod_optab->libcall_gen = gen_int_libfunc;
6427 smod_optab->libcall_basename = "mod";
6428 smod_optab->libcall_suffix = '3';
6429 smod_optab->libcall_gen = gen_int_libfunc;
6430 umod_optab->libcall_basename = "umod";
6431 umod_optab->libcall_suffix = '3';
6432 umod_optab->libcall_gen = gen_int_libfunc;
6433 ftrunc_optab->libcall_basename = "ftrunc";
6434 ftrunc_optab->libcall_suffix = '2';
6435 ftrunc_optab->libcall_gen = gen_fp_libfunc;
6436 and_optab->libcall_basename = "and";
6437 and_optab->libcall_suffix = '3';
6438 and_optab->libcall_gen = gen_int_libfunc;
6439 ior_optab->libcall_basename = "ior";
6440 ior_optab->libcall_suffix = '3';
6441 ior_optab->libcall_gen = gen_int_libfunc;
6442 xor_optab->libcall_basename = "xor";
6443 xor_optab->libcall_suffix = '3';
6444 xor_optab->libcall_gen = gen_int_libfunc;
6445 ashl_optab->libcall_basename = "ashl";
6446 ashl_optab->libcall_suffix = '3';
6447 ashl_optab->libcall_gen = gen_int_fixed_libfunc;
6448 ssashl_optab->libcall_basename = "ssashl";
6449 ssashl_optab->libcall_suffix = '3';
6450 ssashl_optab->libcall_gen = gen_signed_fixed_libfunc;
6451 usashl_optab->libcall_basename = "usashl";
6452 usashl_optab->libcall_suffix = '3';
6453 usashl_optab->libcall_gen = gen_unsigned_fixed_libfunc;
6454 ashr_optab->libcall_basename = "ashr";
6455 ashr_optab->libcall_suffix = '3';
6456 ashr_optab->libcall_gen = gen_int_signed_fixed_libfunc;
6457 lshr_optab->libcall_basename = "lshr";
6458 lshr_optab->libcall_suffix = '3';
6459 lshr_optab->libcall_gen = gen_int_unsigned_fixed_libfunc;
6460 smin_optab->libcall_basename = "min";
6461 smin_optab->libcall_suffix = '3';
6462 smin_optab->libcall_gen = gen_int_fp_libfunc;
6463 smax_optab->libcall_basename = "max";
6464 smax_optab->libcall_suffix = '3';
6465 smax_optab->libcall_gen = gen_int_fp_libfunc;
6466 umin_optab->libcall_basename = "umin";
6467 umin_optab->libcall_suffix = '3';
6468 umin_optab->libcall_gen = gen_int_libfunc;
6469 umax_optab->libcall_basename = "umax";
6470 umax_optab->libcall_suffix = '3';
6471 umax_optab->libcall_gen = gen_int_libfunc;
6472 neg_optab->libcall_basename = "neg";
6473 neg_optab->libcall_suffix = '2';
6474 neg_optab->libcall_gen = gen_int_fp_fixed_libfunc;
6475 ssneg_optab->libcall_basename = "ssneg";
6476 ssneg_optab->libcall_suffix = '2';
6477 ssneg_optab->libcall_gen = gen_signed_fixed_libfunc;
6478 usneg_optab->libcall_basename = "usneg";
6479 usneg_optab->libcall_suffix = '2';
6480 usneg_optab->libcall_gen = gen_unsigned_fixed_libfunc;
6481 negv_optab->libcall_basename = "neg";
6482 negv_optab->libcall_suffix = '2';
6483 negv_optab->libcall_gen = gen_intv_fp_libfunc;
6484 one_cmpl_optab->libcall_basename = "one_cmpl";
6485 one_cmpl_optab->libcall_suffix = '2';
6486 one_cmpl_optab->libcall_gen = gen_int_libfunc;
6487 ffs_optab->libcall_basename = "ffs";
6488 ffs_optab->libcall_suffix = '2';
6489 ffs_optab->libcall_gen = gen_int_libfunc;
6490 clz_optab->libcall_basename = "clz";
6491 clz_optab->libcall_suffix = '2';
6492 clz_optab->libcall_gen = gen_int_libfunc;
6493 ctz_optab->libcall_basename = "ctz";
6494 ctz_optab->libcall_suffix = '2';
6495 ctz_optab->libcall_gen = gen_int_libfunc;
6496 popcount_optab->libcall_basename = "popcount";
6497 popcount_optab->libcall_suffix = '2';
6498 popcount_optab->libcall_gen = gen_int_libfunc;
6499 parity_optab->libcall_basename = "parity";
6500 parity_optab->libcall_suffix = '2';
6501 parity_optab->libcall_gen = gen_int_libfunc;
6503 /* Comparison libcalls for integers MUST come in pairs,
6505 cmp_optab->libcall_basename = "cmp";
6506 cmp_optab->libcall_suffix = '2';
6507 cmp_optab->libcall_gen = gen_int_fp_fixed_libfunc;
6508 ucmp_optab->libcall_basename = "ucmp";
6509 ucmp_optab->libcall_suffix = '2';
6510 ucmp_optab->libcall_gen = gen_int_libfunc;
6512 /* EQ etc are floating point only. */
6513 eq_optab->libcall_basename = "eq";
6514 eq_optab->libcall_suffix = '2';
6515 eq_optab->libcall_gen = gen_fp_libfunc;
6516 ne_optab->libcall_basename = "ne";
6517 ne_optab->libcall_suffix = '2';
6518 ne_optab->libcall_gen = gen_fp_libfunc;
6519 gt_optab->libcall_basename = "gt";
6520 gt_optab->libcall_suffix = '2';
6521 gt_optab->libcall_gen = gen_fp_libfunc;
6522 ge_optab->libcall_basename = "ge";
6523 ge_optab->libcall_suffix = '2';
6524 ge_optab->libcall_gen = gen_fp_libfunc;
6525 lt_optab->libcall_basename = "lt";
6526 lt_optab->libcall_suffix = '2';
6527 lt_optab->libcall_gen = gen_fp_libfunc;
6528 le_optab->libcall_basename = "le";
6529 le_optab->libcall_suffix = '2';
6530 le_optab->libcall_gen = gen_fp_libfunc;
6531 unord_optab->libcall_basename = "unord";
6532 unord_optab->libcall_suffix = '2';
6533 unord_optab->libcall_gen = gen_fp_libfunc;
6535 powi_optab->libcall_basename = "powi";
6536 powi_optab->libcall_suffix = '2';
6537 powi_optab->libcall_gen = gen_fp_libfunc;
6540 sfloat_optab->libcall_basename = "float";
6541 sfloat_optab->libcall_gen = gen_int_to_fp_conv_libfunc;
6542 ufloat_optab->libcall_gen = gen_ufloat_conv_libfunc;
6543 sfix_optab->libcall_basename = "fix";
6544 sfix_optab->libcall_gen = gen_fp_to_int_conv_libfunc;
6545 ufix_optab->libcall_basename = "fixuns";
6546 ufix_optab->libcall_gen = gen_fp_to_int_conv_libfunc;
6547 lrint_optab->libcall_basename = "lrint";
6548 lrint_optab->libcall_gen = gen_int_to_fp_nondecimal_conv_libfunc;
6549 lround_optab->libcall_basename = "lround";
6550 lround_optab->libcall_gen = gen_int_to_fp_nondecimal_conv_libfunc;
6551 lfloor_optab->libcall_basename = "lfloor";
6552 lfloor_optab->libcall_gen = gen_int_to_fp_nondecimal_conv_libfunc;
6553 lceil_optab->libcall_basename = "lceil";
6554 lceil_optab->libcall_gen = gen_int_to_fp_nondecimal_conv_libfunc;
6556 /* trunc_optab is also used for FLOAT_EXTEND. */
6557 sext_optab->libcall_basename = "extend";
6558 sext_optab->libcall_gen = gen_extend_conv_libfunc;
6559 trunc_optab->libcall_basename = "trunc";
6560 trunc_optab->libcall_gen = gen_trunc_conv_libfunc;
6562 /* Conversions for fixed-point modes and other modes. */
6563 fract_optab->libcall_basename = "fract";
6564 fract_optab->libcall_gen = gen_fract_conv_libfunc;
6565 satfract_optab->libcall_basename = "satfract";
6566 satfract_optab->libcall_gen = gen_satfract_conv_libfunc;
6567 fractuns_optab->libcall_basename = "fractuns";
6568 fractuns_optab->libcall_gen = gen_fractuns_conv_libfunc;
6569 satfractuns_optab->libcall_basename = "satfractuns";
6570 satfractuns_optab->libcall_gen = gen_satfractuns_conv_libfunc;
6572 /* The ffs function operates on `int'. Fall back on it if we do not
6573 have a libgcc2 function for that width. */
6574 if (INT_TYPE_SIZE < BITS_PER_WORD)
6576 int_mode = mode_for_size (INT_TYPE_SIZE, MODE_INT, 0);
6577 set_optab_libfunc (ffs_optab, mode_for_size (INT_TYPE_SIZE, MODE_INT, 0),
6581 /* Explicitly initialize the bswap libfuncs since we need them to be
6582 valid for things other than word_mode. */
6583 set_optab_libfunc (bswap_optab, SImode, "__bswapsi2");
6584 set_optab_libfunc (bswap_optab, DImode, "__bswapdi2");
6586 /* Use cabs for double complex abs, since systems generally have cabs.
6587 Don't define any libcall for float complex, so that cabs will be used. */
6588 if (complex_double_type_node)
6589 set_optab_libfunc (abs_optab, TYPE_MODE (complex_double_type_node), "cabs");
6591 abort_libfunc = init_one_libfunc ("abort");
6592 memcpy_libfunc = init_one_libfunc ("memcpy");
6593 memmove_libfunc = init_one_libfunc ("memmove");
6594 memcmp_libfunc = init_one_libfunc ("memcmp");
6595 memset_libfunc = init_one_libfunc ("memset");
6596 setbits_libfunc = init_one_libfunc ("__setbits");
6598 #ifndef DONT_USE_BUILTIN_SETJMP
6599 setjmp_libfunc = init_one_libfunc ("__builtin_setjmp");
6600 longjmp_libfunc = init_one_libfunc ("__builtin_longjmp");
6602 setjmp_libfunc = init_one_libfunc ("setjmp");
6603 longjmp_libfunc = init_one_libfunc ("longjmp");
6605 unwind_sjlj_register_libfunc = init_one_libfunc ("_Unwind_SjLj_Register");
6606 unwind_sjlj_unregister_libfunc
6607 = init_one_libfunc ("_Unwind_SjLj_Unregister");
6609 /* For function entry/exit instrumentation. */
6610 profile_function_entry_libfunc
6611 = init_one_libfunc ("__cyg_profile_func_enter");
6612 profile_function_exit_libfunc
6613 = init_one_libfunc ("__cyg_profile_func_exit");
6615 gcov_flush_libfunc = init_one_libfunc ("__gcov_flush");
6617 if (HAVE_conditional_trap)
6618 trap_rtx = gen_rtx_fmt_ee (EQ, VOIDmode, NULL_RTX, NULL_RTX);
6620 /* Allow the target to add more libcalls or rename some, etc. */
6621 targetm.init_libfuncs ();
6626 /* Print information about the current contents of the optabs on
6630 debug_optab_libfuncs (void)
6636 /* Dump the arithmetic optabs. */
6637 for (i = 0; i != (int) OTI_MAX; i++)
6638 for (j = 0; j < NUM_MACHINE_MODES; ++j)
6643 o = &optab_table[i];
6644 l = optab_libfunc (o, j);
6647 gcc_assert (GET_CODE (l) == SYMBOL_REF);
6648 fprintf (stderr, "%s\t%s:\t%s\n",
6649 GET_RTX_NAME (o->code),
6655 /* Dump the conversion optabs. */
6656 for (i = 0; i < (int) COI_MAX; ++i)
6657 for (j = 0; j < NUM_MACHINE_MODES; ++j)
6658 for (k = 0; k < NUM_MACHINE_MODES; ++k)
6663 o = &convert_optab_table[i];
6664 l = convert_optab_libfunc (o, j, k);
6667 gcc_assert (GET_CODE (l) == SYMBOL_REF);
6668 fprintf (stderr, "%s\t%s\t%s:\t%s\n",
6669 GET_RTX_NAME (o->code),
6678 /* Generate insns to trap with code TCODE if OP1 and OP2 satisfy condition
6679 CODE. Return 0 on failure. */
6682 gen_cond_trap (enum rtx_code code ATTRIBUTE_UNUSED, rtx op1,
6683 rtx op2 ATTRIBUTE_UNUSED, rtx tcode ATTRIBUTE_UNUSED)
6685 enum machine_mode mode = GET_MODE (op1);
6686 enum insn_code icode;
6689 if (!HAVE_conditional_trap)
6692 if (mode == VOIDmode)
6695 icode = optab_handler (cmp_optab, mode)->insn_code;
6696 if (icode == CODE_FOR_nothing)
6700 op1 = prepare_operand (icode, op1, 0, mode, mode, 0);
6701 op2 = prepare_operand (icode, op2, 1, mode, mode, 0);
6707 emit_insn (GEN_FCN (icode) (op1, op2));
6709 PUT_CODE (trap_rtx, code);
6710 gcc_assert (HAVE_conditional_trap);
6711 insn = gen_conditional_trap (trap_rtx, tcode);
6715 insn = get_insns ();
6722 /* Return rtx code for TCODE. Use UNSIGNEDP to select signed
6723 or unsigned operation code. */
6725 static enum rtx_code
6726 get_rtx_code (enum tree_code tcode, bool unsignedp)
6738 code = unsignedp ? LTU : LT;
6741 code = unsignedp ? LEU : LE;
6744 code = unsignedp ? GTU : GT;
6747 code = unsignedp ? GEU : GE;
6750 case UNORDERED_EXPR:
6781 /* Return comparison rtx for COND. Use UNSIGNEDP to select signed or
6782 unsigned operators. Do not generate compare instruction. */
6785 vector_compare_rtx (tree cond, bool unsignedp, enum insn_code icode)
6787 enum rtx_code rcode;
6789 rtx rtx_op0, rtx_op1;
6791 /* This is unlikely. While generating VEC_COND_EXPR, auto vectorizer
6792 ensures that condition is a relational operation. */
6793 gcc_assert (COMPARISON_CLASS_P (cond));
6795 rcode = get_rtx_code (TREE_CODE (cond), unsignedp);
6796 t_op0 = TREE_OPERAND (cond, 0);
6797 t_op1 = TREE_OPERAND (cond, 1);
6799 /* Expand operands. */
6800 rtx_op0 = expand_expr (t_op0, NULL_RTX, TYPE_MODE (TREE_TYPE (t_op0)),
6802 rtx_op1 = expand_expr (t_op1, NULL_RTX, TYPE_MODE (TREE_TYPE (t_op1)),
6805 if (!insn_data[icode].operand[4].predicate (rtx_op0, GET_MODE (rtx_op0))
6806 && GET_MODE (rtx_op0) != VOIDmode)
6807 rtx_op0 = force_reg (GET_MODE (rtx_op0), rtx_op0);
6809 if (!insn_data[icode].operand[5].predicate (rtx_op1, GET_MODE (rtx_op1))
6810 && GET_MODE (rtx_op1) != VOIDmode)
6811 rtx_op1 = force_reg (GET_MODE (rtx_op1), rtx_op1);
6813 return gen_rtx_fmt_ee (rcode, VOIDmode, rtx_op0, rtx_op1);
6816 /* Return insn code for VEC_COND_EXPR EXPR. */
6818 static inline enum insn_code
6819 get_vcond_icode (tree expr, enum machine_mode mode)
6821 enum insn_code icode = CODE_FOR_nothing;
6823 if (TYPE_UNSIGNED (TREE_TYPE (expr)))
6824 icode = vcondu_gen_code[mode];
6826 icode = vcond_gen_code[mode];
6830 /* Return TRUE iff, appropriate vector insns are available
6831 for vector cond expr expr in VMODE mode. */
6834 expand_vec_cond_expr_p (tree expr, enum machine_mode vmode)
6836 if (get_vcond_icode (expr, vmode) == CODE_FOR_nothing)
6841 /* Generate insns for VEC_COND_EXPR. */
6844 expand_vec_cond_expr (tree vec_cond_expr, rtx target)
6846 enum insn_code icode;
6847 rtx comparison, rtx_op1, rtx_op2, cc_op0, cc_op1;
6848 enum machine_mode mode = TYPE_MODE (TREE_TYPE (vec_cond_expr));
6849 bool unsignedp = TYPE_UNSIGNED (TREE_TYPE (vec_cond_expr));
6851 icode = get_vcond_icode (vec_cond_expr, mode);
6852 if (icode == CODE_FOR_nothing)
6855 if (!target || !insn_data[icode].operand[0].predicate (target, mode))
6856 target = gen_reg_rtx (mode);
6858 /* Get comparison rtx. First expand both cond expr operands. */
6859 comparison = vector_compare_rtx (TREE_OPERAND (vec_cond_expr, 0),
6861 cc_op0 = XEXP (comparison, 0);
6862 cc_op1 = XEXP (comparison, 1);
6863 /* Expand both operands and force them in reg, if required. */
6864 rtx_op1 = expand_normal (TREE_OPERAND (vec_cond_expr, 1));
6865 if (!insn_data[icode].operand[1].predicate (rtx_op1, mode)
6866 && mode != VOIDmode)
6867 rtx_op1 = force_reg (mode, rtx_op1);
6869 rtx_op2 = expand_normal (TREE_OPERAND (vec_cond_expr, 2));
6870 if (!insn_data[icode].operand[2].predicate (rtx_op2, mode)
6871 && mode != VOIDmode)
6872 rtx_op2 = force_reg (mode, rtx_op2);
6874 /* Emit instruction! */
6875 emit_insn (GEN_FCN (icode) (target, rtx_op1, rtx_op2,
6876 comparison, cc_op0, cc_op1));
6882 /* This is an internal subroutine of the other compare_and_swap expanders.
6883 MEM, OLD_VAL and NEW_VAL are as you'd expect for a compare-and-swap
6884 operation. TARGET is an optional place to store the value result of
6885 the operation. ICODE is the particular instruction to expand. Return
6886 the result of the operation. */
6889 expand_val_compare_and_swap_1 (rtx mem, rtx old_val, rtx new_val,
6890 rtx target, enum insn_code icode)
6892 enum machine_mode mode = GET_MODE (mem);
6895 if (!target || !insn_data[icode].operand[0].predicate (target, mode))
6896 target = gen_reg_rtx (mode);
6898 if (GET_MODE (old_val) != VOIDmode && GET_MODE (old_val) != mode)
6899 old_val = convert_modes (mode, GET_MODE (old_val), old_val, 1);
6900 if (!insn_data[icode].operand[2].predicate (old_val, mode))
6901 old_val = force_reg (mode, old_val);
6903 if (GET_MODE (new_val) != VOIDmode && GET_MODE (new_val) != mode)
6904 new_val = convert_modes (mode, GET_MODE (new_val), new_val, 1);
6905 if (!insn_data[icode].operand[3].predicate (new_val, mode))
6906 new_val = force_reg (mode, new_val);
6908 insn = GEN_FCN (icode) (target, mem, old_val, new_val);
6909 if (insn == NULL_RTX)
6916 /* Expand a compare-and-swap operation and return its value. */
6919 expand_val_compare_and_swap (rtx mem, rtx old_val, rtx new_val, rtx target)
6921 enum machine_mode mode = GET_MODE (mem);
6922 enum insn_code icode = sync_compare_and_swap[mode];
6924 if (icode == CODE_FOR_nothing)
6927 return expand_val_compare_and_swap_1 (mem, old_val, new_val, target, icode);
6930 /* Expand a compare-and-swap operation and store true into the result if
6931 the operation was successful and false otherwise. Return the result.
6932 Unlike other routines, TARGET is not optional. */
6935 expand_bool_compare_and_swap (rtx mem, rtx old_val, rtx new_val, rtx target)
6937 enum machine_mode mode = GET_MODE (mem);
6938 enum insn_code icode;
6939 rtx subtarget, label0, label1;
6941 /* If the target supports a compare-and-swap pattern that simultaneously
6942 sets some flag for success, then use it. Otherwise use the regular
6943 compare-and-swap and follow that immediately with a compare insn. */
6944 icode = sync_compare_and_swap_cc[mode];
6948 subtarget = expand_val_compare_and_swap_1 (mem, old_val, new_val,
6950 if (subtarget != NULL_RTX)
6954 case CODE_FOR_nothing:
6955 icode = sync_compare_and_swap[mode];
6956 if (icode == CODE_FOR_nothing)
6959 /* Ensure that if old_val == mem, that we're not comparing
6960 against an old value. */
6961 if (MEM_P (old_val))
6962 old_val = force_reg (mode, old_val);
6964 subtarget = expand_val_compare_and_swap_1 (mem, old_val, new_val,
6966 if (subtarget == NULL_RTX)
6969 emit_cmp_insn (subtarget, old_val, EQ, const0_rtx, mode, true);
6972 /* If the target has a sane STORE_FLAG_VALUE, then go ahead and use a
6973 setcc instruction from the beginning. We don't work too hard here,
6974 but it's nice to not be stupid about initial code gen either. */
6975 if (STORE_FLAG_VALUE == 1)
6977 icode = setcc_gen_code[EQ];
6978 if (icode != CODE_FOR_nothing)
6980 enum machine_mode cmode = insn_data[icode].operand[0].mode;
6984 if (!insn_data[icode].operand[0].predicate (target, cmode))
6985 subtarget = gen_reg_rtx (cmode);
6987 insn = GEN_FCN (icode) (subtarget);
6991 if (GET_MODE (target) != GET_MODE (subtarget))
6993 convert_move (target, subtarget, 1);
7001 /* Without an appropriate setcc instruction, use a set of branches to
7002 get 1 and 0 stored into target. Presumably if the target has a
7003 STORE_FLAG_VALUE that isn't 1, then this will get cleaned up by ifcvt. */
7005 label0 = gen_label_rtx ();
7006 label1 = gen_label_rtx ();
7008 emit_jump_insn (bcc_gen_fctn[EQ] (label0));
7009 emit_move_insn (target, const0_rtx);
7010 emit_jump_insn (gen_jump (label1));
7012 emit_label (label0);
7013 emit_move_insn (target, const1_rtx);
7014 emit_label (label1);
7019 /* This is a helper function for the other atomic operations. This function
7020 emits a loop that contains SEQ that iterates until a compare-and-swap
7021 operation at the end succeeds. MEM is the memory to be modified. SEQ is
7022 a set of instructions that takes a value from OLD_REG as an input and
7023 produces a value in NEW_REG as an output. Before SEQ, OLD_REG will be
7024 set to the current contents of MEM. After SEQ, a compare-and-swap will
7025 attempt to update MEM with NEW_REG. The function returns true when the
7026 loop was generated successfully. */
7029 expand_compare_and_swap_loop (rtx mem, rtx old_reg, rtx new_reg, rtx seq)
7031 enum machine_mode mode = GET_MODE (mem);
7032 enum insn_code icode;
7033 rtx label, cmp_reg, subtarget;
7035 /* The loop we want to generate looks like
7041 cmp_reg = compare-and-swap(mem, old_reg, new_reg)
7042 if (cmp_reg != old_reg)
7045 Note that we only do the plain load from memory once. Subsequent
7046 iterations use the value loaded by the compare-and-swap pattern. */
7048 label = gen_label_rtx ();
7049 cmp_reg = gen_reg_rtx (mode);
7051 emit_move_insn (cmp_reg, mem);
7053 emit_move_insn (old_reg, cmp_reg);
7057 /* If the target supports a compare-and-swap pattern that simultaneously
7058 sets some flag for success, then use it. Otherwise use the regular
7059 compare-and-swap and follow that immediately with a compare insn. */
7060 icode = sync_compare_and_swap_cc[mode];
7064 subtarget = expand_val_compare_and_swap_1 (mem, old_reg, new_reg,
7066 if (subtarget != NULL_RTX)
7068 gcc_assert (subtarget == cmp_reg);
7073 case CODE_FOR_nothing:
7074 icode = sync_compare_and_swap[mode];
7075 if (icode == CODE_FOR_nothing)
7078 subtarget = expand_val_compare_and_swap_1 (mem, old_reg, new_reg,
7080 if (subtarget == NULL_RTX)
7082 if (subtarget != cmp_reg)
7083 emit_move_insn (cmp_reg, subtarget);
7085 emit_cmp_insn (cmp_reg, old_reg, EQ, const0_rtx, mode, true);
7088 /* ??? Mark this jump predicted not taken? */
7089 emit_jump_insn (bcc_gen_fctn[NE] (label));
7094 /* This function generates the atomic operation MEM CODE= VAL. In this
7095 case, we do not care about any resulting value. Returns NULL if we
7096 cannot generate the operation. */
7099 expand_sync_operation (rtx mem, rtx val, enum rtx_code code)
7101 enum machine_mode mode = GET_MODE (mem);
7102 enum insn_code icode;
7105 /* Look to see if the target supports the operation directly. */
7109 icode = sync_add_optab[mode];
7112 icode = sync_ior_optab[mode];
7115 icode = sync_xor_optab[mode];
7118 icode = sync_and_optab[mode];
7121 icode = sync_nand_optab[mode];
7125 icode = sync_sub_optab[mode];
7126 if (icode == CODE_FOR_nothing || CONST_INT_P (val))
7128 icode = sync_add_optab[mode];
7129 if (icode != CODE_FOR_nothing)
7131 val = expand_simple_unop (mode, NEG, val, NULL_RTX, 1);
7141 /* Generate the direct operation, if present. */
7142 if (icode != CODE_FOR_nothing)
7144 if (GET_MODE (val) != VOIDmode && GET_MODE (val) != mode)
7145 val = convert_modes (mode, GET_MODE (val), val, 1);
7146 if (!insn_data[icode].operand[1].predicate (val, mode))
7147 val = force_reg (mode, val);
7149 insn = GEN_FCN (icode) (mem, val);
7157 /* Failing that, generate a compare-and-swap loop in which we perform the
7158 operation with normal arithmetic instructions. */
7159 if (sync_compare_and_swap[mode] != CODE_FOR_nothing)
7161 rtx t0 = gen_reg_rtx (mode), t1;
7168 t1 = expand_simple_unop (mode, NOT, t1, NULL_RTX, true);
7171 t1 = expand_simple_binop (mode, code, t1, val, NULL_RTX,
7172 true, OPTAB_LIB_WIDEN);
7174 insn = get_insns ();
7177 if (t1 != NULL && expand_compare_and_swap_loop (mem, t0, t1, insn))
7184 /* This function generates the atomic operation MEM CODE= VAL. In this
7185 case, we do care about the resulting value: if AFTER is true then
7186 return the value MEM holds after the operation, if AFTER is false
7187 then return the value MEM holds before the operation. TARGET is an
7188 optional place for the result value to be stored. */
7191 expand_sync_fetch_operation (rtx mem, rtx val, enum rtx_code code,
7192 bool after, rtx target)
7194 enum machine_mode mode = GET_MODE (mem);
7195 enum insn_code old_code, new_code, icode;
7199 /* Look to see if the target supports the operation directly. */
7203 old_code = sync_old_add_optab[mode];
7204 new_code = sync_new_add_optab[mode];
7207 old_code = sync_old_ior_optab[mode];
7208 new_code = sync_new_ior_optab[mode];
7211 old_code = sync_old_xor_optab[mode];
7212 new_code = sync_new_xor_optab[mode];
7215 old_code = sync_old_and_optab[mode];
7216 new_code = sync_new_and_optab[mode];
7219 old_code = sync_old_nand_optab[mode];
7220 new_code = sync_new_nand_optab[mode];
7224 old_code = sync_old_sub_optab[mode];
7225 new_code = sync_new_sub_optab[mode];
7226 if ((old_code == CODE_FOR_nothing && new_code == CODE_FOR_nothing)
7227 || CONST_INT_P (val))
7229 old_code = sync_old_add_optab[mode];
7230 new_code = sync_new_add_optab[mode];
7231 if (old_code != CODE_FOR_nothing || new_code != CODE_FOR_nothing)
7233 val = expand_simple_unop (mode, NEG, val, NULL_RTX, 1);
7243 /* If the target does supports the proper new/old operation, great. But
7244 if we only support the opposite old/new operation, check to see if we
7245 can compensate. In the case in which the old value is supported, then
7246 we can always perform the operation again with normal arithmetic. In
7247 the case in which the new value is supported, then we can only handle
7248 this in the case the operation is reversible. */
7253 if (icode == CODE_FOR_nothing)
7256 if (icode != CODE_FOR_nothing)
7263 if (icode == CODE_FOR_nothing
7264 && (code == PLUS || code == MINUS || code == XOR))
7267 if (icode != CODE_FOR_nothing)
7272 /* If we found something supported, great. */
7273 if (icode != CODE_FOR_nothing)
7275 if (!target || !insn_data[icode].operand[0].predicate (target, mode))
7276 target = gen_reg_rtx (mode);
7278 if (GET_MODE (val) != VOIDmode && GET_MODE (val) != mode)
7279 val = convert_modes (mode, GET_MODE (val), val, 1);
7280 if (!insn_data[icode].operand[2].predicate (val, mode))
7281 val = force_reg (mode, val);
7283 insn = GEN_FCN (icode) (target, mem, val);
7288 /* If we need to compensate for using an operation with the
7289 wrong return value, do so now. */
7296 else if (code == MINUS)
7301 target = expand_simple_unop (mode, NOT, target, NULL_RTX, true);
7302 target = expand_simple_binop (mode, code, target, val, NULL_RTX,
7303 true, OPTAB_LIB_WIDEN);
7310 /* Failing that, generate a compare-and-swap loop in which we perform the
7311 operation with normal arithmetic instructions. */
7312 if (sync_compare_and_swap[mode] != CODE_FOR_nothing)
7314 rtx t0 = gen_reg_rtx (mode), t1;
7316 if (!target || !register_operand (target, mode))
7317 target = gen_reg_rtx (mode);
7322 emit_move_insn (target, t0);
7326 t1 = expand_simple_unop (mode, NOT, t1, NULL_RTX, true);
7329 t1 = expand_simple_binop (mode, code, t1, val, NULL_RTX,
7330 true, OPTAB_LIB_WIDEN);
7332 emit_move_insn (target, t1);
7334 insn = get_insns ();
7337 if (t1 != NULL && expand_compare_and_swap_loop (mem, t0, t1, insn))
7344 /* This function expands a test-and-set operation. Ideally we atomically
7345 store VAL in MEM and return the previous value in MEM. Some targets
7346 may not support this operation and only support VAL with the constant 1;
7347 in this case while the return value will be 0/1, but the exact value
7348 stored in MEM is target defined. TARGET is an option place to stick
7349 the return value. */
7352 expand_sync_lock_test_and_set (rtx mem, rtx val, rtx target)
7354 enum machine_mode mode = GET_MODE (mem);
7355 enum insn_code icode;
7358 /* If the target supports the test-and-set directly, great. */
7359 icode = sync_lock_test_and_set[mode];
7360 if (icode != CODE_FOR_nothing)
7362 if (!target || !insn_data[icode].operand[0].predicate (target, mode))
7363 target = gen_reg_rtx (mode);
7365 if (GET_MODE (val) != VOIDmode && GET_MODE (val) != mode)
7366 val = convert_modes (mode, GET_MODE (val), val, 1);
7367 if (!insn_data[icode].operand[2].predicate (val, mode))
7368 val = force_reg (mode, val);
7370 insn = GEN_FCN (icode) (target, mem, val);
7378 /* Otherwise, use a compare-and-swap loop for the exchange. */
7379 if (sync_compare_and_swap[mode] != CODE_FOR_nothing)
7381 if (!target || !register_operand (target, mode))
7382 target = gen_reg_rtx (mode);
7383 if (GET_MODE (val) != VOIDmode && GET_MODE (val) != mode)
7384 val = convert_modes (mode, GET_MODE (val), val, 1);
7385 if (expand_compare_and_swap_loop (mem, target, val, NULL_RTX))
7392 #include "gt-optabs.h"