1 /* Expand the basic unary and binary arithmetic operations, for GNU compiler.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
25 #include "coretypes.h"
29 /* Include insn-config.h before expr.h so that HAVE_conditional_move
30 is properly defined. */
31 #include "insn-config.h"
45 #include "basic-block.h"
48 /* Each optab contains info on how this target machine
49 can perform a particular operation
50 for all sizes and kinds of operands.
52 The operation to be performed is often specified
53 by passing one of these optabs as an argument.
55 See expr.h for documentation of these optabs. */
57 optab optab_table[OTI_MAX];
59 rtx libfunc_table[LTI_MAX];
61 /* Tables of patterns for converting one mode to another. */
62 convert_optab convert_optab_table[COI_MAX];
64 /* Contains the optab used for each rtx code. */
65 optab code_to_optab[NUM_RTX_CODE + 1];
67 /* Indexed by the rtx-code for a conditional (eg. EQ, LT,...)
68 gives the gen_function to make a branch to test that condition. */
70 rtxfun bcc_gen_fctn[NUM_RTX_CODE];
72 /* Indexed by the rtx-code for a conditional (eg. EQ, LT,...)
73 gives the insn code to make a store-condition insn
74 to test that condition. */
76 enum insn_code setcc_gen_code[NUM_RTX_CODE];
78 #ifdef HAVE_conditional_move
79 /* Indexed by the machine mode, gives the insn code to make a conditional
80 move insn. This is not indexed by the rtx-code like bcc_gen_fctn and
81 setcc_gen_code to cut down on the number of named patterns. Consider a day
82 when a lot more rtx codes are conditional (eg: for the ARM). */
84 enum insn_code movcc_gen_code[NUM_MACHINE_MODES];
87 /* Indexed by the machine mode, gives the insn code for vector conditional
90 enum insn_code vcond_gen_code[NUM_MACHINE_MODES];
91 enum insn_code vcondu_gen_code[NUM_MACHINE_MODES];
93 /* The insn generating function can not take an rtx_code argument.
94 TRAP_RTX is used as an rtx argument. Its code is replaced with
95 the code to be used in the trap insn and all other fields are ignored. */
96 static GTY(()) rtx trap_rtx;
98 static void prepare_float_lib_cmp (rtx *, rtx *, enum rtx_code *,
99 enum machine_mode *, int *);
100 static rtx expand_unop_direct (enum machine_mode, optab, rtx, rtx, int);
102 /* Debug facility for use in GDB. */
103 void debug_optab_libfuncs (void);
105 #ifndef HAVE_conditional_trap
106 #define HAVE_conditional_trap 0
107 #define gen_conditional_trap(a,b) (gcc_unreachable (), NULL_RTX)
110 /* Prefixes for the current version of decimal floating point (BID vs. DPD) */
111 #if ENABLE_DECIMAL_BID_FORMAT
112 #define DECIMAL_PREFIX "bid_"
114 #define DECIMAL_PREFIX "dpd_"
118 /* Info about libfunc. We use same hashtable for normal optabs and conversion
119 optab. In the first case mode2 is unused. */
120 struct libfunc_entry GTY(())
123 enum machine_mode mode1, mode2;
127 /* Hash table used to convert declarations into nodes. */
128 static GTY((param_is (struct libfunc_entry))) htab_t libfunc_hash;
130 /* Used for attribute_hash. */
133 hash_libfunc (const void *p)
135 const struct libfunc_entry *const e = (const struct libfunc_entry *) p;
137 return (((int) e->mode1 + (int) e->mode2 * NUM_MACHINE_MODES)
141 /* Used for optab_hash. */
144 eq_libfunc (const void *p, const void *q)
146 const struct libfunc_entry *const e1 = (const struct libfunc_entry *) p;
147 const struct libfunc_entry *const e2 = (const struct libfunc_entry *) q;
149 return (e1->optab == e2->optab
150 && e1->mode1 == e2->mode1
151 && e1->mode2 == e2->mode2);
154 /* Return libfunc corresponding operation defined by OPTAB converting
155 from MODE2 to MODE1. Trigger lazy initialization if needed, return NULL
156 if no libfunc is available. */
158 convert_optab_libfunc (convert_optab optab, enum machine_mode mode1,
159 enum machine_mode mode2)
161 struct libfunc_entry e;
162 struct libfunc_entry **slot;
164 e.optab = (size_t) (convert_optab_table[0] - optab);
167 slot = (struct libfunc_entry **) htab_find_slot (libfunc_hash, &e, NO_INSERT);
170 if (optab->libcall_gen)
172 optab->libcall_gen (optab, optab->libcall_basename, mode1, mode2);
173 slot = (struct libfunc_entry **) htab_find_slot (libfunc_hash, &e, NO_INSERT);
175 return (*slot)->libfunc;
181 return (*slot)->libfunc;
184 /* Return libfunc corresponding operation defined by OPTAB in MODE.
185 Trigger lazy initialization if needed, return NULL if no libfunc is
188 optab_libfunc (optab optab, enum machine_mode mode)
190 struct libfunc_entry e;
191 struct libfunc_entry **slot;
193 e.optab = (size_t) (optab_table[0] - optab);
196 slot = (struct libfunc_entry **) htab_find_slot (libfunc_hash, &e, NO_INSERT);
199 if (optab->libcall_gen)
201 optab->libcall_gen (optab, optab->libcall_basename,
202 optab->libcall_suffix, mode);
203 slot = (struct libfunc_entry **) htab_find_slot (libfunc_hash,
206 return (*slot)->libfunc;
212 return (*slot)->libfunc;
216 /* Add a REG_EQUAL note to the last insn in INSNS. TARGET is being set to
217 the result of operation CODE applied to OP0 (and OP1 if it is a binary
220 If the last insn does not set TARGET, don't do anything, but return 1.
222 If a previous insn sets TARGET and TARGET is one of OP0 or OP1,
223 don't add the REG_EQUAL note but return 0. Our caller can then try
224 again, ensuring that TARGET is not one of the operands. */
227 add_equal_note (rtx insns, rtx target, enum rtx_code code, rtx op0, rtx op1)
229 rtx last_insn, insn, set;
232 gcc_assert (insns && INSN_P (insns) && NEXT_INSN (insns));
234 if (GET_RTX_CLASS (code) != RTX_COMM_ARITH
235 && GET_RTX_CLASS (code) != RTX_BIN_ARITH
236 && GET_RTX_CLASS (code) != RTX_COMM_COMPARE
237 && GET_RTX_CLASS (code) != RTX_COMPARE
238 && GET_RTX_CLASS (code) != RTX_UNARY)
241 if (GET_CODE (target) == ZERO_EXTRACT)
244 for (last_insn = insns;
245 NEXT_INSN (last_insn) != NULL_RTX;
246 last_insn = NEXT_INSN (last_insn))
249 set = single_set (last_insn);
253 if (! rtx_equal_p (SET_DEST (set), target)
254 /* For a STRICT_LOW_PART, the REG_NOTE applies to what is inside it. */
255 && (GET_CODE (SET_DEST (set)) != STRICT_LOW_PART
256 || ! rtx_equal_p (XEXP (SET_DEST (set), 0), target)))
259 /* If TARGET is in OP0 or OP1, check if anything in SEQ sets TARGET
260 besides the last insn. */
261 if (reg_overlap_mentioned_p (target, op0)
262 || (op1 && reg_overlap_mentioned_p (target, op1)))
264 insn = PREV_INSN (last_insn);
265 while (insn != NULL_RTX)
267 if (reg_set_p (target, insn))
270 insn = PREV_INSN (insn);
274 if (GET_RTX_CLASS (code) == RTX_UNARY)
275 note = gen_rtx_fmt_e (code, GET_MODE (target), copy_rtx (op0));
277 note = gen_rtx_fmt_ee (code, GET_MODE (target), copy_rtx (op0), copy_rtx (op1));
279 set_unique_reg_note (last_insn, REG_EQUAL, note);
284 /* Widen OP to MODE and return the rtx for the widened operand. UNSIGNEDP
285 says whether OP is signed or unsigned. NO_EXTEND is nonzero if we need
286 not actually do a sign-extend or zero-extend, but can leave the
287 higher-order bits of the result rtx undefined, for example, in the case
288 of logical operations, but not right shifts. */
291 widen_operand (rtx op, enum machine_mode mode, enum machine_mode oldmode,
292 int unsignedp, int no_extend)
296 /* If we don't have to extend and this is a constant, return it. */
297 if (no_extend && GET_MODE (op) == VOIDmode)
300 /* If we must extend do so. If OP is a SUBREG for a promoted object, also
301 extend since it will be more efficient to do so unless the signedness of
302 a promoted object differs from our extension. */
304 || (GET_CODE (op) == SUBREG && SUBREG_PROMOTED_VAR_P (op)
305 && SUBREG_PROMOTED_UNSIGNED_P (op) == unsignedp))
306 return convert_modes (mode, oldmode, op, unsignedp);
308 /* If MODE is no wider than a single word, we return a paradoxical
310 if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD)
311 return gen_rtx_SUBREG (mode, force_reg (GET_MODE (op), op), 0);
313 /* Otherwise, get an object of MODE, clobber it, and set the low-order
316 result = gen_reg_rtx (mode);
317 emit_insn (gen_rtx_CLOBBER (VOIDmode, result));
318 emit_move_insn (gen_lowpart (GET_MODE (op), result), op);
322 /* Return the optab used for computing the operation given by
323 the tree code, CODE. This function is not always usable (for
324 example, it cannot give complete results for multiplication
325 or division) but probably ought to be relied on more widely
326 throughout the expander. */
328 optab_for_tree_code (enum tree_code code, const_tree type)
340 return one_cmpl_optab;
349 return TYPE_UNSIGNED (type) ? umod_optab : smod_optab;
357 if (TYPE_SATURATING(type))
358 return TYPE_UNSIGNED(type) ? usdiv_optab : ssdiv_optab;
359 return TYPE_UNSIGNED (type) ? udiv_optab : sdiv_optab;
362 if (TYPE_SATURATING(type))
363 return TYPE_UNSIGNED(type) ? usashl_optab : ssashl_optab;
367 return TYPE_UNSIGNED (type) ? lshr_optab : ashr_optab;
376 return TYPE_UNSIGNED (type) ? umax_optab : smax_optab;
379 return TYPE_UNSIGNED (type) ? umin_optab : smin_optab;
381 case REALIGN_LOAD_EXPR:
382 return vec_realign_load_optab;
385 return TYPE_UNSIGNED (type) ? usum_widen_optab : ssum_widen_optab;
388 return TYPE_UNSIGNED (type) ? udot_prod_optab : sdot_prod_optab;
391 return TYPE_UNSIGNED (type) ? reduc_umax_optab : reduc_smax_optab;
394 return TYPE_UNSIGNED (type) ? reduc_umin_optab : reduc_smin_optab;
396 case REDUC_PLUS_EXPR:
397 return TYPE_UNSIGNED (type) ? reduc_uplus_optab : reduc_splus_optab;
399 case VEC_LSHIFT_EXPR:
400 return vec_shl_optab;
402 case VEC_RSHIFT_EXPR:
403 return vec_shr_optab;
405 case VEC_WIDEN_MULT_HI_EXPR:
406 return TYPE_UNSIGNED (type) ?
407 vec_widen_umult_hi_optab : vec_widen_smult_hi_optab;
409 case VEC_WIDEN_MULT_LO_EXPR:
410 return TYPE_UNSIGNED (type) ?
411 vec_widen_umult_lo_optab : vec_widen_smult_lo_optab;
413 case VEC_UNPACK_HI_EXPR:
414 return TYPE_UNSIGNED (type) ?
415 vec_unpacku_hi_optab : vec_unpacks_hi_optab;
417 case VEC_UNPACK_LO_EXPR:
418 return TYPE_UNSIGNED (type) ?
419 vec_unpacku_lo_optab : vec_unpacks_lo_optab;
421 case VEC_UNPACK_FLOAT_HI_EXPR:
422 /* The signedness is determined from input operand. */
423 return TYPE_UNSIGNED (type) ?
424 vec_unpacku_float_hi_optab : vec_unpacks_float_hi_optab;
426 case VEC_UNPACK_FLOAT_LO_EXPR:
427 /* The signedness is determined from input operand. */
428 return TYPE_UNSIGNED (type) ?
429 vec_unpacku_float_lo_optab : vec_unpacks_float_lo_optab;
431 case VEC_PACK_TRUNC_EXPR:
432 return vec_pack_trunc_optab;
434 case VEC_PACK_SAT_EXPR:
435 return TYPE_UNSIGNED (type) ? vec_pack_usat_optab : vec_pack_ssat_optab;
437 case VEC_PACK_FIX_TRUNC_EXPR:
438 /* The signedness is determined from output operand. */
439 return TYPE_UNSIGNED (type) ?
440 vec_pack_ufix_trunc_optab : vec_pack_sfix_trunc_optab;
446 trapv = INTEGRAL_TYPE_P (type) && TYPE_OVERFLOW_TRAPS (type);
449 case POINTER_PLUS_EXPR:
451 if (TYPE_SATURATING(type))
452 return TYPE_UNSIGNED(type) ? usadd_optab : ssadd_optab;
453 return trapv ? addv_optab : add_optab;
456 if (TYPE_SATURATING(type))
457 return TYPE_UNSIGNED(type) ? ussub_optab : sssub_optab;
458 return trapv ? subv_optab : sub_optab;
461 if (TYPE_SATURATING(type))
462 return TYPE_UNSIGNED(type) ? usmul_optab : ssmul_optab;
463 return trapv ? smulv_optab : smul_optab;
466 if (TYPE_SATURATING(type))
467 return TYPE_UNSIGNED(type) ? usneg_optab : ssneg_optab;
468 return trapv ? negv_optab : neg_optab;
471 return trapv ? absv_optab : abs_optab;
473 case VEC_EXTRACT_EVEN_EXPR:
474 return vec_extract_even_optab;
476 case VEC_EXTRACT_ODD_EXPR:
477 return vec_extract_odd_optab;
479 case VEC_INTERLEAVE_HIGH_EXPR:
480 return vec_interleave_high_optab;
482 case VEC_INTERLEAVE_LOW_EXPR:
483 return vec_interleave_low_optab;
491 /* Expand vector widening operations.
493 There are two different classes of operations handled here:
494 1) Operations whose result is wider than all the arguments to the operation.
495 Examples: VEC_UNPACK_HI/LO_EXPR, VEC_WIDEN_MULT_HI/LO_EXPR
496 In this case OP0 and optionally OP1 would be initialized,
497 but WIDE_OP wouldn't (not relevant for this case).
498 2) Operations whose result is of the same size as the last argument to the
499 operation, but wider than all the other arguments to the operation.
500 Examples: WIDEN_SUM_EXPR, VEC_DOT_PROD_EXPR.
501 In the case WIDE_OP, OP0 and optionally OP1 would be initialized.
503 E.g, when called to expand the following operations, this is how
504 the arguments will be initialized:
506 widening-sum 2 oprnd0 - oprnd1
507 widening-dot-product 3 oprnd0 oprnd1 oprnd2
508 widening-mult 2 oprnd0 oprnd1 -
509 type-promotion (vec-unpack) 1 oprnd0 - - */
512 expand_widen_pattern_expr (tree exp, rtx op0, rtx op1, rtx wide_op, rtx target,
515 tree oprnd0, oprnd1, oprnd2;
516 enum machine_mode wmode = 0, tmode0, tmode1 = 0;
517 optab widen_pattern_optab;
519 enum machine_mode xmode0, xmode1 = 0, wxmode = 0;
522 rtx xop0, xop1, wxop;
523 int nops = TREE_OPERAND_LENGTH (exp);
525 oprnd0 = TREE_OPERAND (exp, 0);
526 tmode0 = TYPE_MODE (TREE_TYPE (oprnd0));
527 widen_pattern_optab =
528 optab_for_tree_code (TREE_CODE (exp), TREE_TYPE (oprnd0));
529 icode = (int) optab_handler (widen_pattern_optab, tmode0)->insn_code;
530 gcc_assert (icode != CODE_FOR_nothing);
531 xmode0 = insn_data[icode].operand[1].mode;
535 oprnd1 = TREE_OPERAND (exp, 1);
536 tmode1 = TYPE_MODE (TREE_TYPE (oprnd1));
537 xmode1 = insn_data[icode].operand[2].mode;
540 /* The last operand is of a wider mode than the rest of the operands. */
548 gcc_assert (tmode1 == tmode0);
550 oprnd2 = TREE_OPERAND (exp, 2);
551 wmode = TYPE_MODE (TREE_TYPE (oprnd2));
552 wxmode = insn_data[icode].operand[3].mode;
556 wmode = wxmode = insn_data[icode].operand[0].mode;
559 || ! (*insn_data[icode].operand[0].predicate) (target, wmode))
560 temp = gen_reg_rtx (wmode);
568 /* In case the insn wants input operands in modes different from
569 those of the actual operands, convert the operands. It would
570 seem that we don't need to convert CONST_INTs, but we do, so
571 that they're properly zero-extended, sign-extended or truncated
574 if (GET_MODE (op0) != xmode0 && xmode0 != VOIDmode)
575 xop0 = convert_modes (xmode0,
576 GET_MODE (op0) != VOIDmode
582 if (GET_MODE (op1) != xmode1 && xmode1 != VOIDmode)
583 xop1 = convert_modes (xmode1,
584 GET_MODE (op1) != VOIDmode
590 if (GET_MODE (wide_op) != wxmode && wxmode != VOIDmode)
591 wxop = convert_modes (wxmode,
592 GET_MODE (wide_op) != VOIDmode
597 /* Now, if insn's predicates don't allow our operands, put them into
600 if (! (*insn_data[icode].operand[1].predicate) (xop0, xmode0)
601 && xmode0 != VOIDmode)
602 xop0 = copy_to_mode_reg (xmode0, xop0);
606 if (! (*insn_data[icode].operand[2].predicate) (xop1, xmode1)
607 && xmode1 != VOIDmode)
608 xop1 = copy_to_mode_reg (xmode1, xop1);
612 if (! (*insn_data[icode].operand[3].predicate) (wxop, wxmode)
613 && wxmode != VOIDmode)
614 wxop = copy_to_mode_reg (wxmode, wxop);
616 pat = GEN_FCN (icode) (temp, xop0, xop1, wxop);
619 pat = GEN_FCN (icode) (temp, xop0, xop1);
625 if (! (*insn_data[icode].operand[2].predicate) (wxop, wxmode)
626 && wxmode != VOIDmode)
627 wxop = copy_to_mode_reg (wxmode, wxop);
629 pat = GEN_FCN (icode) (temp, xop0, wxop);
632 pat = GEN_FCN (icode) (temp, xop0);
639 /* Generate code to perform an operation specified by TERNARY_OPTAB
640 on operands OP0, OP1 and OP2, with result having machine-mode MODE.
642 UNSIGNEDP is for the case where we have to widen the operands
643 to perform the operation. It says to use zero-extension.
645 If TARGET is nonzero, the value
646 is generated there, if it is convenient to do so.
647 In all cases an rtx is returned for the locus of the value;
648 this may or may not be TARGET. */
651 expand_ternary_op (enum machine_mode mode, optab ternary_optab, rtx op0,
652 rtx op1, rtx op2, rtx target, int unsignedp)
654 int icode = (int) optab_handler (ternary_optab, mode)->insn_code;
655 enum machine_mode mode0 = insn_data[icode].operand[1].mode;
656 enum machine_mode mode1 = insn_data[icode].operand[2].mode;
657 enum machine_mode mode2 = insn_data[icode].operand[3].mode;
660 rtx xop0 = op0, xop1 = op1, xop2 = op2;
662 gcc_assert (optab_handler (ternary_optab, mode)->insn_code
663 != CODE_FOR_nothing);
665 if (!target || !insn_data[icode].operand[0].predicate (target, mode))
666 temp = gen_reg_rtx (mode);
670 /* In case the insn wants input operands in modes different from
671 those of the actual operands, convert the operands. It would
672 seem that we don't need to convert CONST_INTs, but we do, so
673 that they're properly zero-extended, sign-extended or truncated
676 if (GET_MODE (op0) != mode0 && mode0 != VOIDmode)
677 xop0 = convert_modes (mode0,
678 GET_MODE (op0) != VOIDmode
683 if (GET_MODE (op1) != mode1 && mode1 != VOIDmode)
684 xop1 = convert_modes (mode1,
685 GET_MODE (op1) != VOIDmode
690 if (GET_MODE (op2) != mode2 && mode2 != VOIDmode)
691 xop2 = convert_modes (mode2,
692 GET_MODE (op2) != VOIDmode
697 /* Now, if insn's predicates don't allow our operands, put them into
700 if (!insn_data[icode].operand[1].predicate (xop0, mode0)
701 && mode0 != VOIDmode)
702 xop0 = copy_to_mode_reg (mode0, xop0);
704 if (!insn_data[icode].operand[2].predicate (xop1, mode1)
705 && mode1 != VOIDmode)
706 xop1 = copy_to_mode_reg (mode1, xop1);
708 if (!insn_data[icode].operand[3].predicate (xop2, mode2)
709 && mode2 != VOIDmode)
710 xop2 = copy_to_mode_reg (mode2, xop2);
712 pat = GEN_FCN (icode) (temp, xop0, xop1, xop2);
719 /* Like expand_binop, but return a constant rtx if the result can be
720 calculated at compile time. The arguments and return value are
721 otherwise the same as for expand_binop. */
724 simplify_expand_binop (enum machine_mode mode, optab binoptab,
725 rtx op0, rtx op1, rtx target, int unsignedp,
726 enum optab_methods methods)
728 if (CONSTANT_P (op0) && CONSTANT_P (op1))
730 rtx x = simplify_binary_operation (binoptab->code, mode, op0, op1);
736 return expand_binop (mode, binoptab, op0, op1, target, unsignedp, methods);
739 /* Like simplify_expand_binop, but always put the result in TARGET.
740 Return true if the expansion succeeded. */
743 force_expand_binop (enum machine_mode mode, optab binoptab,
744 rtx op0, rtx op1, rtx target, int unsignedp,
745 enum optab_methods methods)
747 rtx x = simplify_expand_binop (mode, binoptab, op0, op1,
748 target, unsignedp, methods);
752 emit_move_insn (target, x);
756 /* Generate insns for VEC_LSHIFT_EXPR, VEC_RSHIFT_EXPR. */
759 expand_vec_shift_expr (tree vec_shift_expr, rtx target)
761 enum insn_code icode;
762 rtx rtx_op1, rtx_op2;
763 enum machine_mode mode1;
764 enum machine_mode mode2;
765 enum machine_mode mode = TYPE_MODE (TREE_TYPE (vec_shift_expr));
766 tree vec_oprnd = TREE_OPERAND (vec_shift_expr, 0);
767 tree shift_oprnd = TREE_OPERAND (vec_shift_expr, 1);
771 switch (TREE_CODE (vec_shift_expr))
773 case VEC_RSHIFT_EXPR:
774 shift_optab = vec_shr_optab;
776 case VEC_LSHIFT_EXPR:
777 shift_optab = vec_shl_optab;
783 icode = (int) optab_handler (shift_optab, mode)->insn_code;
784 gcc_assert (icode != CODE_FOR_nothing);
786 mode1 = insn_data[icode].operand[1].mode;
787 mode2 = insn_data[icode].operand[2].mode;
789 rtx_op1 = expand_normal (vec_oprnd);
790 if (!(*insn_data[icode].operand[1].predicate) (rtx_op1, mode1)
791 && mode1 != VOIDmode)
792 rtx_op1 = force_reg (mode1, rtx_op1);
794 rtx_op2 = expand_normal (shift_oprnd);
795 if (!(*insn_data[icode].operand[2].predicate) (rtx_op2, mode2)
796 && mode2 != VOIDmode)
797 rtx_op2 = force_reg (mode2, rtx_op2);
800 || ! (*insn_data[icode].operand[0].predicate) (target, mode))
801 target = gen_reg_rtx (mode);
803 /* Emit instruction */
804 pat = GEN_FCN (icode) (target, rtx_op1, rtx_op2);
811 /* This subroutine of expand_doubleword_shift handles the cases in which
812 the effective shift value is >= BITS_PER_WORD. The arguments and return
813 value are the same as for the parent routine, except that SUPERWORD_OP1
814 is the shift count to use when shifting OUTOF_INPUT into INTO_TARGET.
815 INTO_TARGET may be null if the caller has decided to calculate it. */
818 expand_superword_shift (optab binoptab, rtx outof_input, rtx superword_op1,
819 rtx outof_target, rtx into_target,
820 int unsignedp, enum optab_methods methods)
822 if (into_target != 0)
823 if (!force_expand_binop (word_mode, binoptab, outof_input, superword_op1,
824 into_target, unsignedp, methods))
827 if (outof_target != 0)
829 /* For a signed right shift, we must fill OUTOF_TARGET with copies
830 of the sign bit, otherwise we must fill it with zeros. */
831 if (binoptab != ashr_optab)
832 emit_move_insn (outof_target, CONST0_RTX (word_mode));
834 if (!force_expand_binop (word_mode, binoptab,
835 outof_input, GEN_INT (BITS_PER_WORD - 1),
836 outof_target, unsignedp, methods))
842 /* This subroutine of expand_doubleword_shift handles the cases in which
843 the effective shift value is < BITS_PER_WORD. The arguments and return
844 value are the same as for the parent routine. */
847 expand_subword_shift (enum machine_mode op1_mode, optab binoptab,
848 rtx outof_input, rtx into_input, rtx op1,
849 rtx outof_target, rtx into_target,
850 int unsignedp, enum optab_methods methods,
851 unsigned HOST_WIDE_INT shift_mask)
853 optab reverse_unsigned_shift, unsigned_shift;
856 reverse_unsigned_shift = (binoptab == ashl_optab ? lshr_optab : ashl_optab);
857 unsigned_shift = (binoptab == ashl_optab ? ashl_optab : lshr_optab);
859 /* The low OP1 bits of INTO_TARGET come from the high bits of OUTOF_INPUT.
860 We therefore need to shift OUTOF_INPUT by (BITS_PER_WORD - OP1) bits in
861 the opposite direction to BINOPTAB. */
862 if (CONSTANT_P (op1) || shift_mask >= BITS_PER_WORD)
864 carries = outof_input;
865 tmp = immed_double_const (BITS_PER_WORD, 0, op1_mode);
866 tmp = simplify_expand_binop (op1_mode, sub_optab, tmp, op1,
871 /* We must avoid shifting by BITS_PER_WORD bits since that is either
872 the same as a zero shift (if shift_mask == BITS_PER_WORD - 1) or
873 has unknown behavior. Do a single shift first, then shift by the
874 remainder. It's OK to use ~OP1 as the remainder if shift counts
875 are truncated to the mode size. */
876 carries = expand_binop (word_mode, reverse_unsigned_shift,
877 outof_input, const1_rtx, 0, unsignedp, methods);
878 if (shift_mask == BITS_PER_WORD - 1)
880 tmp = immed_double_const (-1, -1, op1_mode);
881 tmp = simplify_expand_binop (op1_mode, xor_optab, op1, tmp,
886 tmp = immed_double_const (BITS_PER_WORD - 1, 0, op1_mode);
887 tmp = simplify_expand_binop (op1_mode, sub_optab, tmp, op1,
891 if (tmp == 0 || carries == 0)
893 carries = expand_binop (word_mode, reverse_unsigned_shift,
894 carries, tmp, 0, unsignedp, methods);
898 /* Shift INTO_INPUT logically by OP1. This is the last use of INTO_INPUT
899 so the result can go directly into INTO_TARGET if convenient. */
900 tmp = expand_binop (word_mode, unsigned_shift, into_input, op1,
901 into_target, unsignedp, methods);
905 /* Now OR in the bits carried over from OUTOF_INPUT. */
906 if (!force_expand_binop (word_mode, ior_optab, tmp, carries,
907 into_target, unsignedp, methods))
910 /* Use a standard word_mode shift for the out-of half. */
911 if (outof_target != 0)
912 if (!force_expand_binop (word_mode, binoptab, outof_input, op1,
913 outof_target, unsignedp, methods))
920 #ifdef HAVE_conditional_move
921 /* Try implementing expand_doubleword_shift using conditional moves.
922 The shift is by < BITS_PER_WORD if (CMP_CODE CMP1 CMP2) is true,
923 otherwise it is by >= BITS_PER_WORD. SUBWORD_OP1 and SUPERWORD_OP1
924 are the shift counts to use in the former and latter case. All other
925 arguments are the same as the parent routine. */
928 expand_doubleword_shift_condmove (enum machine_mode op1_mode, optab binoptab,
929 enum rtx_code cmp_code, rtx cmp1, rtx cmp2,
930 rtx outof_input, rtx into_input,
931 rtx subword_op1, rtx superword_op1,
932 rtx outof_target, rtx into_target,
933 int unsignedp, enum optab_methods methods,
934 unsigned HOST_WIDE_INT shift_mask)
936 rtx outof_superword, into_superword;
938 /* Put the superword version of the output into OUTOF_SUPERWORD and
940 outof_superword = outof_target != 0 ? gen_reg_rtx (word_mode) : 0;
941 if (outof_target != 0 && subword_op1 == superword_op1)
943 /* The value INTO_TARGET >> SUBWORD_OP1, which we later store in
944 OUTOF_TARGET, is the same as the value of INTO_SUPERWORD. */
945 into_superword = outof_target;
946 if (!expand_superword_shift (binoptab, outof_input, superword_op1,
947 outof_superword, 0, unsignedp, methods))
952 into_superword = gen_reg_rtx (word_mode);
953 if (!expand_superword_shift (binoptab, outof_input, superword_op1,
954 outof_superword, into_superword,
959 /* Put the subword version directly in OUTOF_TARGET and INTO_TARGET. */
960 if (!expand_subword_shift (op1_mode, binoptab,
961 outof_input, into_input, subword_op1,
962 outof_target, into_target,
963 unsignedp, methods, shift_mask))
966 /* Select between them. Do the INTO half first because INTO_SUPERWORD
967 might be the current value of OUTOF_TARGET. */
968 if (!emit_conditional_move (into_target, cmp_code, cmp1, cmp2, op1_mode,
969 into_target, into_superword, word_mode, false))
972 if (outof_target != 0)
973 if (!emit_conditional_move (outof_target, cmp_code, cmp1, cmp2, op1_mode,
974 outof_target, outof_superword,
982 /* Expand a doubleword shift (ashl, ashr or lshr) using word-mode shifts.
983 OUTOF_INPUT and INTO_INPUT are the two word-sized halves of the first
984 input operand; the shift moves bits in the direction OUTOF_INPUT->
985 INTO_TARGET. OUTOF_TARGET and INTO_TARGET are the equivalent words
986 of the target. OP1 is the shift count and OP1_MODE is its mode.
987 If OP1 is constant, it will have been truncated as appropriate
988 and is known to be nonzero.
990 If SHIFT_MASK is zero, the result of word shifts is undefined when the
991 shift count is outside the range [0, BITS_PER_WORD). This routine must
992 avoid generating such shifts for OP1s in the range [0, BITS_PER_WORD * 2).
994 If SHIFT_MASK is nonzero, all word-mode shift counts are effectively
995 masked by it and shifts in the range [BITS_PER_WORD, SHIFT_MASK) will
996 fill with zeros or sign bits as appropriate.
998 If SHIFT_MASK is BITS_PER_WORD - 1, this routine will synthesize
999 a doubleword shift whose equivalent mask is BITS_PER_WORD * 2 - 1.
1000 Doing this preserves semantics required by SHIFT_COUNT_TRUNCATED.
1001 In all other cases, shifts by values outside [0, BITS_PER_UNIT * 2)
1004 BINOPTAB, UNSIGNEDP and METHODS are as for expand_binop. This function
1005 may not use INTO_INPUT after modifying INTO_TARGET, and similarly for
1006 OUTOF_INPUT and OUTOF_TARGET. OUTOF_TARGET can be null if the parent
1007 function wants to calculate it itself.
1009 Return true if the shift could be successfully synthesized. */
1012 expand_doubleword_shift (enum machine_mode op1_mode, optab binoptab,
1013 rtx outof_input, rtx into_input, rtx op1,
1014 rtx outof_target, rtx into_target,
1015 int unsignedp, enum optab_methods methods,
1016 unsigned HOST_WIDE_INT shift_mask)
1018 rtx superword_op1, tmp, cmp1, cmp2;
1019 rtx subword_label, done_label;
1020 enum rtx_code cmp_code;
1022 /* See if word-mode shifts by BITS_PER_WORD...BITS_PER_WORD * 2 - 1 will
1023 fill the result with sign or zero bits as appropriate. If so, the value
1024 of OUTOF_TARGET will always be (SHIFT OUTOF_INPUT OP1). Recursively call
1025 this routine to calculate INTO_TARGET (which depends on both OUTOF_INPUT
1026 and INTO_INPUT), then emit code to set up OUTOF_TARGET.
1028 This isn't worthwhile for constant shifts since the optimizers will
1029 cope better with in-range shift counts. */
1030 if (shift_mask >= BITS_PER_WORD
1031 && outof_target != 0
1032 && !CONSTANT_P (op1))
1034 if (!expand_doubleword_shift (op1_mode, binoptab,
1035 outof_input, into_input, op1,
1037 unsignedp, methods, shift_mask))
1039 if (!force_expand_binop (word_mode, binoptab, outof_input, op1,
1040 outof_target, unsignedp, methods))
1045 /* Set CMP_CODE, CMP1 and CMP2 so that the rtx (CMP_CODE CMP1 CMP2)
1046 is true when the effective shift value is less than BITS_PER_WORD.
1047 Set SUPERWORD_OP1 to the shift count that should be used to shift
1048 OUTOF_INPUT into INTO_TARGET when the condition is false. */
1049 tmp = immed_double_const (BITS_PER_WORD, 0, op1_mode);
1050 if (!CONSTANT_P (op1) && shift_mask == BITS_PER_WORD - 1)
1052 /* Set CMP1 to OP1 & BITS_PER_WORD. The result is zero iff OP1
1053 is a subword shift count. */
1054 cmp1 = simplify_expand_binop (op1_mode, and_optab, op1, tmp,
1056 cmp2 = CONST0_RTX (op1_mode);
1058 superword_op1 = op1;
1062 /* Set CMP1 to OP1 - BITS_PER_WORD. */
1063 cmp1 = simplify_expand_binop (op1_mode, sub_optab, op1, tmp,
1065 cmp2 = CONST0_RTX (op1_mode);
1067 superword_op1 = cmp1;
1072 /* If we can compute the condition at compile time, pick the
1073 appropriate subroutine. */
1074 tmp = simplify_relational_operation (cmp_code, SImode, op1_mode, cmp1, cmp2);
1075 if (tmp != 0 && GET_CODE (tmp) == CONST_INT)
1077 if (tmp == const0_rtx)
1078 return expand_superword_shift (binoptab, outof_input, superword_op1,
1079 outof_target, into_target,
1080 unsignedp, methods);
1082 return expand_subword_shift (op1_mode, binoptab,
1083 outof_input, into_input, op1,
1084 outof_target, into_target,
1085 unsignedp, methods, shift_mask);
1088 #ifdef HAVE_conditional_move
1089 /* Try using conditional moves to generate straight-line code. */
1091 rtx start = get_last_insn ();
1092 if (expand_doubleword_shift_condmove (op1_mode, binoptab,
1093 cmp_code, cmp1, cmp2,
1094 outof_input, into_input,
1096 outof_target, into_target,
1097 unsignedp, methods, shift_mask))
1099 delete_insns_since (start);
1103 /* As a last resort, use branches to select the correct alternative. */
1104 subword_label = gen_label_rtx ();
1105 done_label = gen_label_rtx ();
1108 do_compare_rtx_and_jump (cmp1, cmp2, cmp_code, false, op1_mode,
1109 0, 0, subword_label);
1112 if (!expand_superword_shift (binoptab, outof_input, superword_op1,
1113 outof_target, into_target,
1114 unsignedp, methods))
1117 emit_jump_insn (gen_jump (done_label));
1119 emit_label (subword_label);
1121 if (!expand_subword_shift (op1_mode, binoptab,
1122 outof_input, into_input, op1,
1123 outof_target, into_target,
1124 unsignedp, methods, shift_mask))
1127 emit_label (done_label);
1131 /* Subroutine of expand_binop. Perform a double word multiplication of
1132 operands OP0 and OP1 both of mode MODE, which is exactly twice as wide
1133 as the target's word_mode. This function return NULL_RTX if anything
1134 goes wrong, in which case it may have already emitted instructions
1135 which need to be deleted.
1137 If we want to multiply two two-word values and have normal and widening
1138 multiplies of single-word values, we can do this with three smaller
1139 multiplications. Note that we do not make a REG_NO_CONFLICT block here
1140 because we are not operating on one word at a time.
1142 The multiplication proceeds as follows:
1143 _______________________
1144 [__op0_high_|__op0_low__]
1145 _______________________
1146 * [__op1_high_|__op1_low__]
1147 _______________________________________________
1148 _______________________
1149 (1) [__op0_low__*__op1_low__]
1150 _______________________
1151 (2a) [__op0_low__*__op1_high_]
1152 _______________________
1153 (2b) [__op0_high_*__op1_low__]
1154 _______________________
1155 (3) [__op0_high_*__op1_high_]
1158 This gives a 4-word result. Since we are only interested in the
1159 lower 2 words, partial result (3) and the upper words of (2a) and
1160 (2b) don't need to be calculated. Hence (2a) and (2b) can be
1161 calculated using non-widening multiplication.
1163 (1), however, needs to be calculated with an unsigned widening
1164 multiplication. If this operation is not directly supported we
1165 try using a signed widening multiplication and adjust the result.
1166 This adjustment works as follows:
1168 If both operands are positive then no adjustment is needed.
1170 If the operands have different signs, for example op0_low < 0 and
1171 op1_low >= 0, the instruction treats the most significant bit of
1172 op0_low as a sign bit instead of a bit with significance
1173 2**(BITS_PER_WORD-1), i.e. the instruction multiplies op1_low
1174 with 2**BITS_PER_WORD - op0_low, and two's complements the
1175 result. Conclusion: We need to add op1_low * 2**BITS_PER_WORD to
1178 Similarly, if both operands are negative, we need to add
1179 (op0_low + op1_low) * 2**BITS_PER_WORD.
1181 We use a trick to adjust quickly. We logically shift op0_low right
1182 (op1_low) BITS_PER_WORD-1 steps to get 0 or 1, and add this to
1183 op0_high (op1_high) before it is used to calculate 2b (2a). If no
1184 logical shift exists, we do an arithmetic right shift and subtract
1188 expand_doubleword_mult (enum machine_mode mode, rtx op0, rtx op1, rtx target,
1189 bool umulp, enum optab_methods methods)
1191 int low = (WORDS_BIG_ENDIAN ? 1 : 0);
1192 int high = (WORDS_BIG_ENDIAN ? 0 : 1);
1193 rtx wordm1 = umulp ? NULL_RTX : GEN_INT (BITS_PER_WORD - 1);
1194 rtx product, adjust, product_high, temp;
1196 rtx op0_high = operand_subword_force (op0, high, mode);
1197 rtx op0_low = operand_subword_force (op0, low, mode);
1198 rtx op1_high = operand_subword_force (op1, high, mode);
1199 rtx op1_low = operand_subword_force (op1, low, mode);
1201 /* If we're using an unsigned multiply to directly compute the product
1202 of the low-order words of the operands and perform any required
1203 adjustments of the operands, we begin by trying two more multiplications
1204 and then computing the appropriate sum.
1206 We have checked above that the required addition is provided.
1207 Full-word addition will normally always succeed, especially if
1208 it is provided at all, so we don't worry about its failure. The
1209 multiplication may well fail, however, so we do handle that. */
1213 /* ??? This could be done with emit_store_flag where available. */
1214 temp = expand_binop (word_mode, lshr_optab, op0_low, wordm1,
1215 NULL_RTX, 1, methods);
1217 op0_high = expand_binop (word_mode, add_optab, op0_high, temp,
1218 NULL_RTX, 0, OPTAB_DIRECT);
1221 temp = expand_binop (word_mode, ashr_optab, op0_low, wordm1,
1222 NULL_RTX, 0, methods);
1225 op0_high = expand_binop (word_mode, sub_optab, op0_high, temp,
1226 NULL_RTX, 0, OPTAB_DIRECT);
1233 adjust = expand_binop (word_mode, smul_optab, op0_high, op1_low,
1234 NULL_RTX, 0, OPTAB_DIRECT);
1238 /* OP0_HIGH should now be dead. */
1242 /* ??? This could be done with emit_store_flag where available. */
1243 temp = expand_binop (word_mode, lshr_optab, op1_low, wordm1,
1244 NULL_RTX, 1, methods);
1246 op1_high = expand_binop (word_mode, add_optab, op1_high, temp,
1247 NULL_RTX, 0, OPTAB_DIRECT);
1250 temp = expand_binop (word_mode, ashr_optab, op1_low, wordm1,
1251 NULL_RTX, 0, methods);
1254 op1_high = expand_binop (word_mode, sub_optab, op1_high, temp,
1255 NULL_RTX, 0, OPTAB_DIRECT);
1262 temp = expand_binop (word_mode, smul_optab, op1_high, op0_low,
1263 NULL_RTX, 0, OPTAB_DIRECT);
1267 /* OP1_HIGH should now be dead. */
1269 adjust = expand_binop (word_mode, add_optab, adjust, temp,
1270 adjust, 0, OPTAB_DIRECT);
1272 if (target && !REG_P (target))
1276 product = expand_binop (mode, umul_widen_optab, op0_low, op1_low,
1277 target, 1, OPTAB_DIRECT);
1279 product = expand_binop (mode, smul_widen_optab, op0_low, op1_low,
1280 target, 1, OPTAB_DIRECT);
1285 product_high = operand_subword (product, high, 1, mode);
1286 adjust = expand_binop (word_mode, add_optab, product_high, adjust,
1287 REG_P (product_high) ? product_high : adjust,
1289 emit_move_insn (product_high, adjust);
1293 /* Wrapper around expand_binop which takes an rtx code to specify
1294 the operation to perform, not an optab pointer. All other
1295 arguments are the same. */
1297 expand_simple_binop (enum machine_mode mode, enum rtx_code code, rtx op0,
1298 rtx op1, rtx target, int unsignedp,
1299 enum optab_methods methods)
1301 optab binop = code_to_optab[(int) code];
1304 return expand_binop (mode, binop, op0, op1, target, unsignedp, methods);
1307 /* Return whether OP0 and OP1 should be swapped when expanding a commutative
1308 binop. Order them according to commutative_operand_precedence and, if
1309 possible, try to put TARGET or a pseudo first. */
1311 swap_commutative_operands_with_target (rtx target, rtx op0, rtx op1)
1313 int op0_prec = commutative_operand_precedence (op0);
1314 int op1_prec = commutative_operand_precedence (op1);
1316 if (op0_prec < op1_prec)
1319 if (op0_prec > op1_prec)
1322 /* With equal precedence, both orders are ok, but it is better if the
1323 first operand is TARGET, or if both TARGET and OP0 are pseudos. */
1324 if (target == 0 || REG_P (target))
1325 return (REG_P (op1) && !REG_P (op0)) || target == op1;
1327 return rtx_equal_p (op1, target);
1330 /* Return true if BINOPTAB implements a shift operation. */
1333 shift_optab_p (optab binoptab)
1335 switch (binoptab->code)
1351 /* Return true if BINOPTAB implements a commutative binary operation. */
1354 commutative_optab_p (optab binoptab)
1356 return (GET_RTX_CLASS (binoptab->code) == RTX_COMM_ARITH
1357 || binoptab == smul_widen_optab
1358 || binoptab == umul_widen_optab
1359 || binoptab == smul_highpart_optab
1360 || binoptab == umul_highpart_optab);
1363 /* X is to be used in mode MODE as an operand to BINOPTAB. If we're
1364 optimizing, and if the operand is a constant that costs more than
1365 1 instruction, force the constant into a register and return that
1366 register. Return X otherwise. UNSIGNEDP says whether X is unsigned. */
1369 avoid_expensive_constant (enum machine_mode mode, optab binoptab,
1370 rtx x, bool unsignedp)
1372 if (mode != VOIDmode
1375 && rtx_cost (x, binoptab->code) > COSTS_N_INSNS (1))
1377 if (GET_CODE (x) == CONST_INT)
1379 HOST_WIDE_INT intval = trunc_int_for_mode (INTVAL (x), mode);
1380 if (intval != INTVAL (x))
1381 x = GEN_INT (intval);
1384 x = convert_modes (mode, VOIDmode, x, unsignedp);
1385 x = force_reg (mode, x);
1390 /* Helper function for expand_binop: handle the case where there
1391 is an insn that directly implements the indicated operation.
1392 Returns null if this is not possible. */
1394 expand_binop_directly (enum machine_mode mode, optab binoptab,
1396 rtx target, int unsignedp, enum optab_methods methods,
1399 int icode = (int) optab_handler (binoptab, mode)->insn_code;
1400 enum machine_mode mode0 = insn_data[icode].operand[1].mode;
1401 enum machine_mode mode1 = insn_data[icode].operand[2].mode;
1402 enum machine_mode tmp_mode;
1405 rtx xop0 = op0, xop1 = op1;
1412 temp = gen_reg_rtx (mode);
1414 /* If it is a commutative operator and the modes would match
1415 if we would swap the operands, we can save the conversions. */
1416 commutative_p = commutative_optab_p (binoptab);
1418 && GET_MODE (xop0) != mode0 && GET_MODE (xop1) != mode1
1419 && GET_MODE (xop0) == mode1 && GET_MODE (xop1) == mode1)
1426 /* If we are optimizing, force expensive constants into a register. */
1427 xop0 = avoid_expensive_constant (mode0, binoptab, xop0, unsignedp);
1428 if (!shift_optab_p (binoptab))
1429 xop1 = avoid_expensive_constant (mode1, binoptab, xop1, unsignedp);
1431 /* In case the insn wants input operands in modes different from
1432 those of the actual operands, convert the operands. It would
1433 seem that we don't need to convert CONST_INTs, but we do, so
1434 that they're properly zero-extended, sign-extended or truncated
1437 if (GET_MODE (xop0) != mode0 && mode0 != VOIDmode)
1438 xop0 = convert_modes (mode0,
1439 GET_MODE (xop0) != VOIDmode
1444 if (GET_MODE (xop1) != mode1 && mode1 != VOIDmode)
1445 xop1 = convert_modes (mode1,
1446 GET_MODE (xop1) != VOIDmode
1451 /* If operation is commutative,
1452 try to make the first operand a register.
1453 Even better, try to make it the same as the target.
1454 Also try to make the last operand a constant. */
1456 && swap_commutative_operands_with_target (target, xop0, xop1))
1463 /* Now, if insn's predicates don't allow our operands, put them into
1466 if (!insn_data[icode].operand[1].predicate (xop0, mode0)
1467 && mode0 != VOIDmode)
1468 xop0 = copy_to_mode_reg (mode0, xop0);
1470 if (!insn_data[icode].operand[2].predicate (xop1, mode1)
1471 && mode1 != VOIDmode)
1472 xop1 = copy_to_mode_reg (mode1, xop1);
1474 if (binoptab == vec_pack_trunc_optab
1475 || binoptab == vec_pack_usat_optab
1476 || binoptab == vec_pack_ssat_optab
1477 || binoptab == vec_pack_ufix_trunc_optab
1478 || binoptab == vec_pack_sfix_trunc_optab)
1480 /* The mode of the result is different then the mode of the
1482 tmp_mode = insn_data[icode].operand[0].mode;
1483 if (GET_MODE_NUNITS (tmp_mode) != 2 * GET_MODE_NUNITS (mode))
1489 if (!insn_data[icode].operand[0].predicate (temp, tmp_mode))
1490 temp = gen_reg_rtx (tmp_mode);
1492 pat = GEN_FCN (icode) (temp, xop0, xop1);
1495 /* If PAT is composed of more than one insn, try to add an appropriate
1496 REG_EQUAL note to it. If we can't because TEMP conflicts with an
1497 operand, call expand_binop again, this time without a target. */
1498 if (INSN_P (pat) && NEXT_INSN (pat) != NULL_RTX
1499 && ! add_equal_note (pat, temp, binoptab->code, xop0, xop1))
1501 delete_insns_since (last);
1502 return expand_binop (mode, binoptab, op0, op1, NULL_RTX,
1503 unsignedp, methods);
1510 delete_insns_since (last);
1514 /* Generate code to perform an operation specified by BINOPTAB
1515 on operands OP0 and OP1, with result having machine-mode MODE.
1517 UNSIGNEDP is for the case where we have to widen the operands
1518 to perform the operation. It says to use zero-extension.
1520 If TARGET is nonzero, the value
1521 is generated there, if it is convenient to do so.
1522 In all cases an rtx is returned for the locus of the value;
1523 this may or may not be TARGET. */
1526 expand_binop (enum machine_mode mode, optab binoptab, rtx op0, rtx op1,
1527 rtx target, int unsignedp, enum optab_methods methods)
1529 enum optab_methods next_methods
1530 = (methods == OPTAB_LIB || methods == OPTAB_LIB_WIDEN
1531 ? OPTAB_WIDEN : methods);
1532 enum mode_class class;
1533 enum machine_mode wider_mode;
1536 rtx entry_last = get_last_insn ();
1539 class = GET_MODE_CLASS (mode);
1541 /* If subtracting an integer constant, convert this into an addition of
1542 the negated constant. */
1544 if (binoptab == sub_optab && GET_CODE (op1) == CONST_INT)
1546 op1 = negate_rtx (mode, op1);
1547 binoptab = add_optab;
1550 /* Record where to delete back to if we backtrack. */
1551 last = get_last_insn ();
1553 /* If we can do it with a three-operand insn, do so. */
1555 if (methods != OPTAB_MUST_WIDEN
1556 && optab_handler (binoptab, mode)->insn_code != CODE_FOR_nothing)
1558 temp = expand_binop_directly (mode, binoptab, op0, op1, target,
1559 unsignedp, methods, last);
1564 /* If we were trying to rotate, and that didn't work, try rotating
1565 the other direction before falling back to shifts and bitwise-or. */
1566 if (((binoptab == rotl_optab
1567 && optab_handler (rotr_optab, mode)->insn_code != CODE_FOR_nothing)
1568 || (binoptab == rotr_optab
1569 && optab_handler (rotl_optab, mode)->insn_code != CODE_FOR_nothing))
1570 && class == MODE_INT)
1572 optab otheroptab = (binoptab == rotl_optab ? rotr_optab : rotl_optab);
1574 unsigned int bits = GET_MODE_BITSIZE (mode);
1576 if (GET_CODE (op1) == CONST_INT)
1577 newop1 = GEN_INT (bits - INTVAL (op1));
1578 else if (targetm.shift_truncation_mask (mode) == bits - 1)
1579 newop1 = negate_rtx (mode, op1);
1581 newop1 = expand_binop (mode, sub_optab,
1582 GEN_INT (bits), op1,
1583 NULL_RTX, unsignedp, OPTAB_DIRECT);
1585 temp = expand_binop_directly (mode, otheroptab, op0, newop1,
1586 target, unsignedp, methods, last);
1591 /* If this is a multiply, see if we can do a widening operation that
1592 takes operands of this mode and makes a wider mode. */
1594 if (binoptab == smul_optab
1595 && GET_MODE_WIDER_MODE (mode) != VOIDmode
1596 && ((optab_handler ((unsignedp ? umul_widen_optab : smul_widen_optab),
1597 GET_MODE_WIDER_MODE (mode))->insn_code)
1598 != CODE_FOR_nothing))
1600 temp = expand_binop (GET_MODE_WIDER_MODE (mode),
1601 unsignedp ? umul_widen_optab : smul_widen_optab,
1602 op0, op1, NULL_RTX, unsignedp, OPTAB_DIRECT);
1606 if (GET_MODE_CLASS (mode) == MODE_INT
1607 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (mode),
1608 GET_MODE_BITSIZE (GET_MODE (temp))))
1609 return gen_lowpart (mode, temp);
1611 return convert_to_mode (mode, temp, unsignedp);
1615 /* Look for a wider mode of the same class for which we think we
1616 can open-code the operation. Check for a widening multiply at the
1617 wider mode as well. */
1619 if (CLASS_HAS_WIDER_MODES_P (class)
1620 && methods != OPTAB_DIRECT && methods != OPTAB_LIB)
1621 for (wider_mode = GET_MODE_WIDER_MODE (mode);
1622 wider_mode != VOIDmode;
1623 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
1625 if (optab_handler (binoptab, wider_mode)->insn_code != CODE_FOR_nothing
1626 || (binoptab == smul_optab
1627 && GET_MODE_WIDER_MODE (wider_mode) != VOIDmode
1628 && ((optab_handler ((unsignedp ? umul_widen_optab
1629 : smul_widen_optab),
1630 GET_MODE_WIDER_MODE (wider_mode))->insn_code)
1631 != CODE_FOR_nothing)))
1633 rtx xop0 = op0, xop1 = op1;
1636 /* For certain integer operations, we need not actually extend
1637 the narrow operands, as long as we will truncate
1638 the results to the same narrowness. */
1640 if ((binoptab == ior_optab || binoptab == and_optab
1641 || binoptab == xor_optab
1642 || binoptab == add_optab || binoptab == sub_optab
1643 || binoptab == smul_optab || binoptab == ashl_optab)
1644 && class == MODE_INT)
1647 xop0 = avoid_expensive_constant (mode, binoptab,
1649 if (binoptab != ashl_optab)
1650 xop1 = avoid_expensive_constant (mode, binoptab,
1654 xop0 = widen_operand (xop0, wider_mode, mode, unsignedp, no_extend);
1656 /* The second operand of a shift must always be extended. */
1657 xop1 = widen_operand (xop1, wider_mode, mode, unsignedp,
1658 no_extend && binoptab != ashl_optab);
1660 temp = expand_binop (wider_mode, binoptab, xop0, xop1, NULL_RTX,
1661 unsignedp, OPTAB_DIRECT);
1664 if (class != MODE_INT
1665 || !TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (mode),
1666 GET_MODE_BITSIZE (wider_mode)))
1669 target = gen_reg_rtx (mode);
1670 convert_move (target, temp, 0);
1674 return gen_lowpart (mode, temp);
1677 delete_insns_since (last);
1681 /* If operation is commutative,
1682 try to make the first operand a register.
1683 Even better, try to make it the same as the target.
1684 Also try to make the last operand a constant. */
1685 if (commutative_optab_p (binoptab)
1686 && swap_commutative_operands_with_target (target, op0, op1))
1693 /* These can be done a word at a time. */
1694 if ((binoptab == and_optab || binoptab == ior_optab || binoptab == xor_optab)
1695 && class == MODE_INT
1696 && GET_MODE_SIZE (mode) > UNITS_PER_WORD
1697 && optab_handler (binoptab, word_mode)->insn_code != CODE_FOR_nothing)
1703 /* If TARGET is the same as one of the operands, the REG_EQUAL note
1704 won't be accurate, so use a new target. */
1705 if (target == 0 || target == op0 || target == op1)
1706 target = gen_reg_rtx (mode);
1710 /* Do the actual arithmetic. */
1711 for (i = 0; i < GET_MODE_BITSIZE (mode) / BITS_PER_WORD; i++)
1713 rtx target_piece = operand_subword (target, i, 1, mode);
1714 rtx x = expand_binop (word_mode, binoptab,
1715 operand_subword_force (op0, i, mode),
1716 operand_subword_force (op1, i, mode),
1717 target_piece, unsignedp, next_methods);
1722 if (target_piece != x)
1723 emit_move_insn (target_piece, x);
1726 insns = get_insns ();
1729 if (i == GET_MODE_BITSIZE (mode) / BITS_PER_WORD)
1731 if (binoptab->code != UNKNOWN)
1733 = gen_rtx_fmt_ee (binoptab->code, mode,
1734 copy_rtx (op0), copy_rtx (op1));
1738 emit_no_conflict_block (insns, target, op0, op1, equiv_value);
1743 /* Synthesize double word shifts from single word shifts. */
1744 if ((binoptab == lshr_optab || binoptab == ashl_optab
1745 || binoptab == ashr_optab)
1746 && class == MODE_INT
1747 && (GET_CODE (op1) == CONST_INT || !optimize_size)
1748 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
1749 && optab_handler (binoptab, word_mode)->insn_code != CODE_FOR_nothing
1750 && optab_handler (ashl_optab, word_mode)->insn_code != CODE_FOR_nothing
1751 && optab_handler (lshr_optab, word_mode)->insn_code != CODE_FOR_nothing)
1753 unsigned HOST_WIDE_INT shift_mask, double_shift_mask;
1754 enum machine_mode op1_mode;
1756 double_shift_mask = targetm.shift_truncation_mask (mode);
1757 shift_mask = targetm.shift_truncation_mask (word_mode);
1758 op1_mode = GET_MODE (op1) != VOIDmode ? GET_MODE (op1) : word_mode;
1760 /* Apply the truncation to constant shifts. */
1761 if (double_shift_mask > 0 && GET_CODE (op1) == CONST_INT)
1762 op1 = GEN_INT (INTVAL (op1) & double_shift_mask);
1764 if (op1 == CONST0_RTX (op1_mode))
1767 /* Make sure that this is a combination that expand_doubleword_shift
1768 can handle. See the comments there for details. */
1769 if (double_shift_mask == 0
1770 || (shift_mask == BITS_PER_WORD - 1
1771 && double_shift_mask == BITS_PER_WORD * 2 - 1))
1773 rtx insns, equiv_value;
1774 rtx into_target, outof_target;
1775 rtx into_input, outof_input;
1776 int left_shift, outof_word;
1778 /* If TARGET is the same as one of the operands, the REG_EQUAL note
1779 won't be accurate, so use a new target. */
1780 if (target == 0 || target == op0 || target == op1)
1781 target = gen_reg_rtx (mode);
1785 /* OUTOF_* is the word we are shifting bits away from, and
1786 INTO_* is the word that we are shifting bits towards, thus
1787 they differ depending on the direction of the shift and
1788 WORDS_BIG_ENDIAN. */
1790 left_shift = binoptab == ashl_optab;
1791 outof_word = left_shift ^ ! WORDS_BIG_ENDIAN;
1793 outof_target = operand_subword (target, outof_word, 1, mode);
1794 into_target = operand_subword (target, 1 - outof_word, 1, mode);
1796 outof_input = operand_subword_force (op0, outof_word, mode);
1797 into_input = operand_subword_force (op0, 1 - outof_word, mode);
1799 if (expand_doubleword_shift (op1_mode, binoptab,
1800 outof_input, into_input, op1,
1801 outof_target, into_target,
1802 unsignedp, next_methods, shift_mask))
1804 insns = get_insns ();
1807 equiv_value = gen_rtx_fmt_ee (binoptab->code, mode, op0, op1);
1808 emit_no_conflict_block (insns, target, op0, op1, equiv_value);
1815 /* Synthesize double word rotates from single word shifts. */
1816 if ((binoptab == rotl_optab || binoptab == rotr_optab)
1817 && class == MODE_INT
1818 && GET_CODE (op1) == CONST_INT
1819 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
1820 && optab_handler (ashl_optab, word_mode)->insn_code != CODE_FOR_nothing
1821 && optab_handler (lshr_optab, word_mode)->insn_code != CODE_FOR_nothing)
1824 rtx into_target, outof_target;
1825 rtx into_input, outof_input;
1827 int shift_count, left_shift, outof_word;
1829 /* If TARGET is the same as one of the operands, the REG_EQUAL note
1830 won't be accurate, so use a new target. Do this also if target is not
1831 a REG, first because having a register instead may open optimization
1832 opportunities, and second because if target and op0 happen to be MEMs
1833 designating the same location, we would risk clobbering it too early
1834 in the code sequence we generate below. */
1835 if (target == 0 || target == op0 || target == op1 || ! REG_P (target))
1836 target = gen_reg_rtx (mode);
1840 shift_count = INTVAL (op1);
1842 /* OUTOF_* is the word we are shifting bits away from, and
1843 INTO_* is the word that we are shifting bits towards, thus
1844 they differ depending on the direction of the shift and
1845 WORDS_BIG_ENDIAN. */
1847 left_shift = (binoptab == rotl_optab);
1848 outof_word = left_shift ^ ! WORDS_BIG_ENDIAN;
1850 outof_target = operand_subword (target, outof_word, 1, mode);
1851 into_target = operand_subword (target, 1 - outof_word, 1, mode);
1853 outof_input = operand_subword_force (op0, outof_word, mode);
1854 into_input = operand_subword_force (op0, 1 - outof_word, mode);
1856 if (shift_count == BITS_PER_WORD)
1858 /* This is just a word swap. */
1859 emit_move_insn (outof_target, into_input);
1860 emit_move_insn (into_target, outof_input);
1865 rtx into_temp1, into_temp2, outof_temp1, outof_temp2;
1866 rtx first_shift_count, second_shift_count;
1867 optab reverse_unsigned_shift, unsigned_shift;
1869 reverse_unsigned_shift = (left_shift ^ (shift_count < BITS_PER_WORD)
1870 ? lshr_optab : ashl_optab);
1872 unsigned_shift = (left_shift ^ (shift_count < BITS_PER_WORD)
1873 ? ashl_optab : lshr_optab);
1875 if (shift_count > BITS_PER_WORD)
1877 first_shift_count = GEN_INT (shift_count - BITS_PER_WORD);
1878 second_shift_count = GEN_INT (2 * BITS_PER_WORD - shift_count);
1882 first_shift_count = GEN_INT (BITS_PER_WORD - shift_count);
1883 second_shift_count = GEN_INT (shift_count);
1886 into_temp1 = expand_binop (word_mode, unsigned_shift,
1887 outof_input, first_shift_count,
1888 NULL_RTX, unsignedp, next_methods);
1889 into_temp2 = expand_binop (word_mode, reverse_unsigned_shift,
1890 into_input, second_shift_count,
1891 NULL_RTX, unsignedp, next_methods);
1893 if (into_temp1 != 0 && into_temp2 != 0)
1894 inter = expand_binop (word_mode, ior_optab, into_temp1, into_temp2,
1895 into_target, unsignedp, next_methods);
1899 if (inter != 0 && inter != into_target)
1900 emit_move_insn (into_target, inter);
1902 outof_temp1 = expand_binop (word_mode, unsigned_shift,
1903 into_input, first_shift_count,
1904 NULL_RTX, unsignedp, next_methods);
1905 outof_temp2 = expand_binop (word_mode, reverse_unsigned_shift,
1906 outof_input, second_shift_count,
1907 NULL_RTX, unsignedp, next_methods);
1909 if (inter != 0 && outof_temp1 != 0 && outof_temp2 != 0)
1910 inter = expand_binop (word_mode, ior_optab,
1911 outof_temp1, outof_temp2,
1912 outof_target, unsignedp, next_methods);
1914 if (inter != 0 && inter != outof_target)
1915 emit_move_insn (outof_target, inter);
1918 insns = get_insns ();
1923 /* One may be tempted to wrap the insns in a REG_NO_CONFLICT
1924 block to help the register allocator a bit. But a multi-word
1925 rotate will need all the input bits when setting the output
1926 bits, so there clearly is a conflict between the input and
1927 output registers. So we can't use a no-conflict block here. */
1933 /* These can be done a word at a time by propagating carries. */
1934 if ((binoptab == add_optab || binoptab == sub_optab)
1935 && class == MODE_INT
1936 && GET_MODE_SIZE (mode) >= 2 * UNITS_PER_WORD
1937 && optab_handler (binoptab, word_mode)->insn_code != CODE_FOR_nothing)
1940 optab otheroptab = binoptab == add_optab ? sub_optab : add_optab;
1941 const unsigned int nwords = GET_MODE_BITSIZE (mode) / BITS_PER_WORD;
1942 rtx carry_in = NULL_RTX, carry_out = NULL_RTX;
1943 rtx xop0, xop1, xtarget;
1945 /* We can handle either a 1 or -1 value for the carry. If STORE_FLAG
1946 value is one of those, use it. Otherwise, use 1 since it is the
1947 one easiest to get. */
1948 #if STORE_FLAG_VALUE == 1 || STORE_FLAG_VALUE == -1
1949 int normalizep = STORE_FLAG_VALUE;
1954 /* Prepare the operands. */
1955 xop0 = force_reg (mode, op0);
1956 xop1 = force_reg (mode, op1);
1958 xtarget = gen_reg_rtx (mode);
1960 if (target == 0 || !REG_P (target))
1963 /* Indicate for flow that the entire target reg is being set. */
1965 emit_insn (gen_rtx_CLOBBER (VOIDmode, xtarget));
1967 /* Do the actual arithmetic. */
1968 for (i = 0; i < nwords; i++)
1970 int index = (WORDS_BIG_ENDIAN ? nwords - i - 1 : i);
1971 rtx target_piece = operand_subword (xtarget, index, 1, mode);
1972 rtx op0_piece = operand_subword_force (xop0, index, mode);
1973 rtx op1_piece = operand_subword_force (xop1, index, mode);
1976 /* Main add/subtract of the input operands. */
1977 x = expand_binop (word_mode, binoptab,
1978 op0_piece, op1_piece,
1979 target_piece, unsignedp, next_methods);
1985 /* Store carry from main add/subtract. */
1986 carry_out = gen_reg_rtx (word_mode);
1987 carry_out = emit_store_flag_force (carry_out,
1988 (binoptab == add_optab
1991 word_mode, 1, normalizep);
1998 /* Add/subtract previous carry to main result. */
1999 newx = expand_binop (word_mode,
2000 normalizep == 1 ? binoptab : otheroptab,
2002 NULL_RTX, 1, next_methods);
2006 /* Get out carry from adding/subtracting carry in. */
2007 rtx carry_tmp = gen_reg_rtx (word_mode);
2008 carry_tmp = emit_store_flag_force (carry_tmp,
2009 (binoptab == add_optab
2012 word_mode, 1, normalizep);
2014 /* Logical-ior the two poss. carry together. */
2015 carry_out = expand_binop (word_mode, ior_optab,
2016 carry_out, carry_tmp,
2017 carry_out, 0, next_methods);
2021 emit_move_insn (target_piece, newx);
2025 if (x != target_piece)
2026 emit_move_insn (target_piece, x);
2029 carry_in = carry_out;
2032 if (i == GET_MODE_BITSIZE (mode) / (unsigned) BITS_PER_WORD)
2034 if (optab_handler (mov_optab, mode)->insn_code != CODE_FOR_nothing
2035 || ! rtx_equal_p (target, xtarget))
2037 rtx temp = emit_move_insn (target, xtarget);
2039 set_unique_reg_note (temp,
2041 gen_rtx_fmt_ee (binoptab->code, mode,
2052 delete_insns_since (last);
2055 /* Attempt to synthesize double word multiplies using a sequence of word
2056 mode multiplications. We first attempt to generate a sequence using a
2057 more efficient unsigned widening multiply, and if that fails we then
2058 try using a signed widening multiply. */
2060 if (binoptab == smul_optab
2061 && class == MODE_INT
2062 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
2063 && optab_handler (smul_optab, word_mode)->insn_code != CODE_FOR_nothing
2064 && optab_handler (add_optab, word_mode)->insn_code != CODE_FOR_nothing)
2066 rtx product = NULL_RTX;
2068 if (optab_handler (umul_widen_optab, mode)->insn_code
2069 != CODE_FOR_nothing)
2071 product = expand_doubleword_mult (mode, op0, op1, target,
2074 delete_insns_since (last);
2077 if (product == NULL_RTX
2078 && optab_handler (smul_widen_optab, mode)->insn_code
2079 != CODE_FOR_nothing)
2081 product = expand_doubleword_mult (mode, op0, op1, target,
2084 delete_insns_since (last);
2087 if (product != NULL_RTX)
2089 if (optab_handler (mov_optab, mode)->insn_code != CODE_FOR_nothing)
2091 temp = emit_move_insn (target ? target : product, product);
2092 set_unique_reg_note (temp,
2094 gen_rtx_fmt_ee (MULT, mode,
2102 /* It can't be open-coded in this mode.
2103 Use a library call if one is available and caller says that's ok. */
2105 libfunc = optab_libfunc (binoptab, mode);
2107 && (methods == OPTAB_LIB || methods == OPTAB_LIB_WIDEN))
2111 enum machine_mode op1_mode = mode;
2116 if (shift_optab_p (binoptab))
2118 op1_mode = targetm.libgcc_shift_count_mode ();
2119 /* Specify unsigned here,
2120 since negative shift counts are meaningless. */
2121 op1x = convert_to_mode (op1_mode, op1, 1);
2124 if (GET_MODE (op0) != VOIDmode
2125 && GET_MODE (op0) != mode)
2126 op0 = convert_to_mode (mode, op0, unsignedp);
2128 /* Pass 1 for NO_QUEUE so we don't lose any increments
2129 if the libcall is cse'd or moved. */
2130 value = emit_library_call_value (libfunc,
2131 NULL_RTX, LCT_CONST, mode, 2,
2132 op0, mode, op1x, op1_mode);
2134 insns = get_insns ();
2137 target = gen_reg_rtx (mode);
2138 emit_libcall_block (insns, target, value,
2139 gen_rtx_fmt_ee (binoptab->code, mode, op0, op1));
2144 delete_insns_since (last);
2146 /* It can't be done in this mode. Can we do it in a wider mode? */
2148 if (! (methods == OPTAB_WIDEN || methods == OPTAB_LIB_WIDEN
2149 || methods == OPTAB_MUST_WIDEN))
2151 /* Caller says, don't even try. */
2152 delete_insns_since (entry_last);
2156 /* Compute the value of METHODS to pass to recursive calls.
2157 Don't allow widening to be tried recursively. */
2159 methods = (methods == OPTAB_LIB_WIDEN ? OPTAB_LIB : OPTAB_DIRECT);
2161 /* Look for a wider mode of the same class for which it appears we can do
2164 if (CLASS_HAS_WIDER_MODES_P (class))
2166 for (wider_mode = GET_MODE_WIDER_MODE (mode);
2167 wider_mode != VOIDmode;
2168 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
2170 if ((optab_handler (binoptab, wider_mode)->insn_code
2171 != CODE_FOR_nothing)
2172 || (methods == OPTAB_LIB
2173 && optab_libfunc (binoptab, wider_mode)))
2175 rtx xop0 = op0, xop1 = op1;
2178 /* For certain integer operations, we need not actually extend
2179 the narrow operands, as long as we will truncate
2180 the results to the same narrowness. */
2182 if ((binoptab == ior_optab || binoptab == and_optab
2183 || binoptab == xor_optab
2184 || binoptab == add_optab || binoptab == sub_optab
2185 || binoptab == smul_optab || binoptab == ashl_optab)
2186 && class == MODE_INT)
2189 xop0 = widen_operand (xop0, wider_mode, mode,
2190 unsignedp, no_extend);
2192 /* The second operand of a shift must always be extended. */
2193 xop1 = widen_operand (xop1, wider_mode, mode, unsignedp,
2194 no_extend && binoptab != ashl_optab);
2196 temp = expand_binop (wider_mode, binoptab, xop0, xop1, NULL_RTX,
2197 unsignedp, methods);
2200 if (class != MODE_INT
2201 || !TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (mode),
2202 GET_MODE_BITSIZE (wider_mode)))
2205 target = gen_reg_rtx (mode);
2206 convert_move (target, temp, 0);
2210 return gen_lowpart (mode, temp);
2213 delete_insns_since (last);
2218 delete_insns_since (entry_last);
2222 /* Expand a binary operator which has both signed and unsigned forms.
2223 UOPTAB is the optab for unsigned operations, and SOPTAB is for
2226 If we widen unsigned operands, we may use a signed wider operation instead
2227 of an unsigned wider operation, since the result would be the same. */
2230 sign_expand_binop (enum machine_mode mode, optab uoptab, optab soptab,
2231 rtx op0, rtx op1, rtx target, int unsignedp,
2232 enum optab_methods methods)
2235 optab direct_optab = unsignedp ? uoptab : soptab;
2236 struct optab wide_soptab;
2238 /* Do it without widening, if possible. */
2239 temp = expand_binop (mode, direct_optab, op0, op1, target,
2240 unsignedp, OPTAB_DIRECT);
2241 if (temp || methods == OPTAB_DIRECT)
2244 /* Try widening to a signed int. Make a fake signed optab that
2245 hides any signed insn for direct use. */
2246 wide_soptab = *soptab;
2247 optab_handler (&wide_soptab, mode)->insn_code = CODE_FOR_nothing;
2248 /* We don't want to generate new hash table entries from this fake
2250 wide_soptab.libcall_gen = NULL;
2252 temp = expand_binop (mode, &wide_soptab, op0, op1, target,
2253 unsignedp, OPTAB_WIDEN);
2255 /* For unsigned operands, try widening to an unsigned int. */
2256 if (temp == 0 && unsignedp)
2257 temp = expand_binop (mode, uoptab, op0, op1, target,
2258 unsignedp, OPTAB_WIDEN);
2259 if (temp || methods == OPTAB_WIDEN)
2262 /* Use the right width lib call if that exists. */
2263 temp = expand_binop (mode, direct_optab, op0, op1, target, unsignedp, OPTAB_LIB);
2264 if (temp || methods == OPTAB_LIB)
2267 /* Must widen and use a lib call, use either signed or unsigned. */
2268 temp = expand_binop (mode, &wide_soptab, op0, op1, target,
2269 unsignedp, methods);
2273 return expand_binop (mode, uoptab, op0, op1, target,
2274 unsignedp, methods);
2278 /* Generate code to perform an operation specified by UNOPPTAB
2279 on operand OP0, with two results to TARG0 and TARG1.
2280 We assume that the order of the operands for the instruction
2281 is TARG0, TARG1, OP0.
2283 Either TARG0 or TARG1 may be zero, but what that means is that
2284 the result is not actually wanted. We will generate it into
2285 a dummy pseudo-reg and discard it. They may not both be zero.
2287 Returns 1 if this operation can be performed; 0 if not. */
2290 expand_twoval_unop (optab unoptab, rtx op0, rtx targ0, rtx targ1,
2293 enum machine_mode mode = GET_MODE (targ0 ? targ0 : targ1);
2294 enum mode_class class;
2295 enum machine_mode wider_mode;
2296 rtx entry_last = get_last_insn ();
2299 class = GET_MODE_CLASS (mode);
2302 targ0 = gen_reg_rtx (mode);
2304 targ1 = gen_reg_rtx (mode);
2306 /* Record where to go back to if we fail. */
2307 last = get_last_insn ();
2309 if (optab_handler (unoptab, mode)->insn_code != CODE_FOR_nothing)
2311 int icode = (int) optab_handler (unoptab, mode)->insn_code;
2312 enum machine_mode mode0 = insn_data[icode].operand[2].mode;
2316 if (GET_MODE (xop0) != VOIDmode
2317 && GET_MODE (xop0) != mode0)
2318 xop0 = convert_to_mode (mode0, xop0, unsignedp);
2320 /* Now, if insn doesn't accept these operands, put them into pseudos. */
2321 if (!insn_data[icode].operand[2].predicate (xop0, mode0))
2322 xop0 = copy_to_mode_reg (mode0, xop0);
2324 /* We could handle this, but we should always be called with a pseudo
2325 for our targets and all insns should take them as outputs. */
2326 gcc_assert (insn_data[icode].operand[0].predicate (targ0, mode));
2327 gcc_assert (insn_data[icode].operand[1].predicate (targ1, mode));
2329 pat = GEN_FCN (icode) (targ0, targ1, xop0);
2336 delete_insns_since (last);
2339 /* It can't be done in this mode. Can we do it in a wider mode? */
2341 if (CLASS_HAS_WIDER_MODES_P (class))
2343 for (wider_mode = GET_MODE_WIDER_MODE (mode);
2344 wider_mode != VOIDmode;
2345 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
2347 if (optab_handler (unoptab, wider_mode)->insn_code
2348 != CODE_FOR_nothing)
2350 rtx t0 = gen_reg_rtx (wider_mode);
2351 rtx t1 = gen_reg_rtx (wider_mode);
2352 rtx cop0 = convert_modes (wider_mode, mode, op0, unsignedp);
2354 if (expand_twoval_unop (unoptab, cop0, t0, t1, unsignedp))
2356 convert_move (targ0, t0, unsignedp);
2357 convert_move (targ1, t1, unsignedp);
2361 delete_insns_since (last);
2366 delete_insns_since (entry_last);
2370 /* Generate code to perform an operation specified by BINOPTAB
2371 on operands OP0 and OP1, with two results to TARG1 and TARG2.
2372 We assume that the order of the operands for the instruction
2373 is TARG0, OP0, OP1, TARG1, which would fit a pattern like
2374 [(set TARG0 (operate OP0 OP1)) (set TARG1 (operate ...))].
2376 Either TARG0 or TARG1 may be zero, but what that means is that
2377 the result is not actually wanted. We will generate it into
2378 a dummy pseudo-reg and discard it. They may not both be zero.
2380 Returns 1 if this operation can be performed; 0 if not. */
2383 expand_twoval_binop (optab binoptab, rtx op0, rtx op1, rtx targ0, rtx targ1,
2386 enum machine_mode mode = GET_MODE (targ0 ? targ0 : targ1);
2387 enum mode_class class;
2388 enum machine_mode wider_mode;
2389 rtx entry_last = get_last_insn ();
2392 class = GET_MODE_CLASS (mode);
2395 targ0 = gen_reg_rtx (mode);
2397 targ1 = gen_reg_rtx (mode);
2399 /* Record where to go back to if we fail. */
2400 last = get_last_insn ();
2402 if (optab_handler (binoptab, mode)->insn_code != CODE_FOR_nothing)
2404 int icode = (int) optab_handler (binoptab, mode)->insn_code;
2405 enum machine_mode mode0 = insn_data[icode].operand[1].mode;
2406 enum machine_mode mode1 = insn_data[icode].operand[2].mode;
2408 rtx xop0 = op0, xop1 = op1;
2410 /* If we are optimizing, force expensive constants into a register. */
2411 xop0 = avoid_expensive_constant (mode0, binoptab, xop0, unsignedp);
2412 xop1 = avoid_expensive_constant (mode1, binoptab, xop1, unsignedp);
2414 /* In case the insn wants input operands in modes different from
2415 those of the actual operands, convert the operands. It would
2416 seem that we don't need to convert CONST_INTs, but we do, so
2417 that they're properly zero-extended, sign-extended or truncated
2420 if (GET_MODE (op0) != mode0 && mode0 != VOIDmode)
2421 xop0 = convert_modes (mode0,
2422 GET_MODE (op0) != VOIDmode
2427 if (GET_MODE (op1) != mode1 && mode1 != VOIDmode)
2428 xop1 = convert_modes (mode1,
2429 GET_MODE (op1) != VOIDmode
2434 /* Now, if insn doesn't accept these operands, put them into pseudos. */
2435 if (!insn_data[icode].operand[1].predicate (xop0, mode0))
2436 xop0 = copy_to_mode_reg (mode0, xop0);
2438 if (!insn_data[icode].operand[2].predicate (xop1, mode1))
2439 xop1 = copy_to_mode_reg (mode1, xop1);
2441 /* We could handle this, but we should always be called with a pseudo
2442 for our targets and all insns should take them as outputs. */
2443 gcc_assert (insn_data[icode].operand[0].predicate (targ0, mode));
2444 gcc_assert (insn_data[icode].operand[3].predicate (targ1, mode));
2446 pat = GEN_FCN (icode) (targ0, xop0, xop1, targ1);
2453 delete_insns_since (last);
2456 /* It can't be done in this mode. Can we do it in a wider mode? */
2458 if (CLASS_HAS_WIDER_MODES_P (class))
2460 for (wider_mode = GET_MODE_WIDER_MODE (mode);
2461 wider_mode != VOIDmode;
2462 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
2464 if (optab_handler (binoptab, wider_mode)->insn_code
2465 != CODE_FOR_nothing)
2467 rtx t0 = gen_reg_rtx (wider_mode);
2468 rtx t1 = gen_reg_rtx (wider_mode);
2469 rtx cop0 = convert_modes (wider_mode, mode, op0, unsignedp);
2470 rtx cop1 = convert_modes (wider_mode, mode, op1, unsignedp);
2472 if (expand_twoval_binop (binoptab, cop0, cop1,
2475 convert_move (targ0, t0, unsignedp);
2476 convert_move (targ1, t1, unsignedp);
2480 delete_insns_since (last);
2485 delete_insns_since (entry_last);
2489 /* Expand the two-valued library call indicated by BINOPTAB, but
2490 preserve only one of the values. If TARG0 is non-NULL, the first
2491 value is placed into TARG0; otherwise the second value is placed
2492 into TARG1. Exactly one of TARG0 and TARG1 must be non-NULL. The
2493 value stored into TARG0 or TARG1 is equivalent to (CODE OP0 OP1).
2494 This routine assumes that the value returned by the library call is
2495 as if the return value was of an integral mode twice as wide as the
2496 mode of OP0. Returns 1 if the call was successful. */
2499 expand_twoval_binop_libfunc (optab binoptab, rtx op0, rtx op1,
2500 rtx targ0, rtx targ1, enum rtx_code code)
2502 enum machine_mode mode;
2503 enum machine_mode libval_mode;
2508 /* Exactly one of TARG0 or TARG1 should be non-NULL. */
2509 gcc_assert (!targ0 != !targ1);
2511 mode = GET_MODE (op0);
2512 libfunc = optab_libfunc (binoptab, mode);
2516 /* The value returned by the library function will have twice as
2517 many bits as the nominal MODE. */
2518 libval_mode = smallest_mode_for_size (2 * GET_MODE_BITSIZE (mode),
2521 libval = emit_library_call_value (libfunc, NULL_RTX, LCT_CONST,
2525 /* Get the part of VAL containing the value that we want. */
2526 libval = simplify_gen_subreg (mode, libval, libval_mode,
2527 targ0 ? 0 : GET_MODE_SIZE (mode));
2528 insns = get_insns ();
2530 /* Move the into the desired location. */
2531 emit_libcall_block (insns, targ0 ? targ0 : targ1, libval,
2532 gen_rtx_fmt_ee (code, mode, op0, op1));
2538 /* Wrapper around expand_unop which takes an rtx code to specify
2539 the operation to perform, not an optab pointer. All other
2540 arguments are the same. */
2542 expand_simple_unop (enum machine_mode mode, enum rtx_code code, rtx op0,
2543 rtx target, int unsignedp)
2545 optab unop = code_to_optab[(int) code];
2548 return expand_unop (mode, unop, op0, target, unsignedp);
2554 (clz:wide (zero_extend:wide x)) - ((width wide) - (width narrow)). */
2556 widen_clz (enum machine_mode mode, rtx op0, rtx target)
2558 enum mode_class class = GET_MODE_CLASS (mode);
2559 if (CLASS_HAS_WIDER_MODES_P (class))
2561 enum machine_mode wider_mode;
2562 for (wider_mode = GET_MODE_WIDER_MODE (mode);
2563 wider_mode != VOIDmode;
2564 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
2566 if (optab_handler (clz_optab, wider_mode)->insn_code
2567 != CODE_FOR_nothing)
2569 rtx xop0, temp, last;
2571 last = get_last_insn ();
2574 target = gen_reg_rtx (mode);
2575 xop0 = widen_operand (op0, wider_mode, mode, true, false);
2576 temp = expand_unop (wider_mode, clz_optab, xop0, NULL_RTX, true);
2578 temp = expand_binop (wider_mode, sub_optab, temp,
2579 GEN_INT (GET_MODE_BITSIZE (wider_mode)
2580 - GET_MODE_BITSIZE (mode)),
2581 target, true, OPTAB_DIRECT);
2583 delete_insns_since (last);
2592 /* Try calculating clz of a double-word quantity as two clz's of word-sized
2593 quantities, choosing which based on whether the high word is nonzero. */
2595 expand_doubleword_clz (enum machine_mode mode, rtx op0, rtx target)
2597 rtx xop0 = force_reg (mode, op0);
2598 rtx subhi = gen_highpart (word_mode, xop0);
2599 rtx sublo = gen_lowpart (word_mode, xop0);
2600 rtx hi0_label = gen_label_rtx ();
2601 rtx after_label = gen_label_rtx ();
2602 rtx seq, temp, result;
2604 /* If we were not given a target, use a word_mode register, not a
2605 'mode' register. The result will fit, and nobody is expecting
2606 anything bigger (the return type of __builtin_clz* is int). */
2608 target = gen_reg_rtx (word_mode);
2610 /* In any case, write to a word_mode scratch in both branches of the
2611 conditional, so we can ensure there is a single move insn setting
2612 'target' to tag a REG_EQUAL note on. */
2613 result = gen_reg_rtx (word_mode);
2617 /* If the high word is not equal to zero,
2618 then clz of the full value is clz of the high word. */
2619 emit_cmp_and_jump_insns (subhi, CONST0_RTX (word_mode), EQ, 0,
2620 word_mode, true, hi0_label);
2622 temp = expand_unop_direct (word_mode, clz_optab, subhi, result, true);
2627 convert_move (result, temp, true);
2629 emit_jump_insn (gen_jump (after_label));
2632 /* Else clz of the full value is clz of the low word plus the number
2633 of bits in the high word. */
2634 emit_label (hi0_label);
2636 temp = expand_unop_direct (word_mode, clz_optab, sublo, 0, true);
2639 temp = expand_binop (word_mode, add_optab, temp,
2640 GEN_INT (GET_MODE_BITSIZE (word_mode)),
2641 result, true, OPTAB_DIRECT);
2645 convert_move (result, temp, true);
2647 emit_label (after_label);
2648 convert_move (target, result, true);
2653 add_equal_note (seq, target, CLZ, xop0, 0);
2665 (lshiftrt:wide (bswap:wide x) ((width wide) - (width narrow))). */
2667 widen_bswap (enum machine_mode mode, rtx op0, rtx target)
2669 enum mode_class class = GET_MODE_CLASS (mode);
2670 enum machine_mode wider_mode;
2673 if (!CLASS_HAS_WIDER_MODES_P (class))
2676 for (wider_mode = GET_MODE_WIDER_MODE (mode);
2677 wider_mode != VOIDmode;
2678 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
2679 if (optab_handler (bswap_optab, wider_mode)->insn_code != CODE_FOR_nothing)
2684 last = get_last_insn ();
2686 x = widen_operand (op0, wider_mode, mode, true, true);
2687 x = expand_unop (wider_mode, bswap_optab, x, NULL_RTX, true);
2690 x = expand_shift (RSHIFT_EXPR, wider_mode, x,
2691 size_int (GET_MODE_BITSIZE (wider_mode)
2692 - GET_MODE_BITSIZE (mode)),
2698 target = gen_reg_rtx (mode);
2699 emit_move_insn (target, gen_lowpart (mode, x));
2702 delete_insns_since (last);
2707 /* Try calculating bswap as two bswaps of two word-sized operands. */
2710 expand_doubleword_bswap (enum machine_mode mode, rtx op, rtx target)
2714 t1 = expand_unop (word_mode, bswap_optab,
2715 operand_subword_force (op, 0, mode), NULL_RTX, true);
2716 t0 = expand_unop (word_mode, bswap_optab,
2717 operand_subword_force (op, 1, mode), NULL_RTX, true);
2720 target = gen_reg_rtx (mode);
2722 emit_insn (gen_rtx_CLOBBER (VOIDmode, target));
2723 emit_move_insn (operand_subword (target, 0, 1, mode), t0);
2724 emit_move_insn (operand_subword (target, 1, 1, mode), t1);
2729 /* Try calculating (parity x) as (and (popcount x) 1), where
2730 popcount can also be done in a wider mode. */
2732 expand_parity (enum machine_mode mode, rtx op0, rtx target)
2734 enum mode_class class = GET_MODE_CLASS (mode);
2735 if (CLASS_HAS_WIDER_MODES_P (class))
2737 enum machine_mode wider_mode;
2738 for (wider_mode = mode; wider_mode != VOIDmode;
2739 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
2741 if (optab_handler (popcount_optab, wider_mode)->insn_code
2742 != CODE_FOR_nothing)
2744 rtx xop0, temp, last;
2746 last = get_last_insn ();
2749 target = gen_reg_rtx (mode);
2750 xop0 = widen_operand (op0, wider_mode, mode, true, false);
2751 temp = expand_unop (wider_mode, popcount_optab, xop0, NULL_RTX,
2754 temp = expand_binop (wider_mode, and_optab, temp, const1_rtx,
2755 target, true, OPTAB_DIRECT);
2757 delete_insns_since (last);
2766 /* Try calculating ctz(x) as K - clz(x & -x) ,
2767 where K is GET_MODE_BITSIZE(mode) - 1.
2769 Both __builtin_ctz and __builtin_clz are undefined at zero, so we
2770 don't have to worry about what the hardware does in that case. (If
2771 the clz instruction produces the usual value at 0, which is K, the
2772 result of this code sequence will be -1; expand_ffs, below, relies
2773 on this. It might be nice to have it be K instead, for consistency
2774 with the (very few) processors that provide a ctz with a defined
2775 value, but that would take one more instruction, and it would be
2776 less convenient for expand_ffs anyway. */
2779 expand_ctz (enum machine_mode mode, rtx op0, rtx target)
2783 if (optab_handler (clz_optab, mode)->insn_code == CODE_FOR_nothing)
2788 temp = expand_unop_direct (mode, neg_optab, op0, NULL_RTX, true);
2790 temp = expand_binop (mode, and_optab, op0, temp, NULL_RTX,
2791 true, OPTAB_DIRECT);
2793 temp = expand_unop_direct (mode, clz_optab, temp, NULL_RTX, true);
2795 temp = expand_binop (mode, sub_optab, GEN_INT (GET_MODE_BITSIZE (mode) - 1),
2797 true, OPTAB_DIRECT);
2807 add_equal_note (seq, temp, CTZ, op0, 0);
2813 /* Try calculating ffs(x) using ctz(x) if we have that instruction, or
2814 else with the sequence used by expand_clz.
2816 The ffs builtin promises to return zero for a zero value and ctz/clz
2817 may have an undefined value in that case. If they do not give us a
2818 convenient value, we have to generate a test and branch. */
2820 expand_ffs (enum machine_mode mode, rtx op0, rtx target)
2822 HOST_WIDE_INT val = 0;
2823 bool defined_at_zero = false;
2826 if (optab_handler (ctz_optab, mode)->insn_code != CODE_FOR_nothing)
2830 temp = expand_unop_direct (mode, ctz_optab, op0, 0, true);
2834 defined_at_zero = (CTZ_DEFINED_VALUE_AT_ZERO (mode, val) == 2);
2836 else if (optab_handler (clz_optab, mode)->insn_code != CODE_FOR_nothing)
2839 temp = expand_ctz (mode, op0, 0);
2843 if (CLZ_DEFINED_VALUE_AT_ZERO (mode, val) == 2)
2845 defined_at_zero = true;
2846 val = (GET_MODE_BITSIZE (mode) - 1) - val;
2852 if (defined_at_zero && val == -1)
2853 /* No correction needed at zero. */;
2856 /* We don't try to do anything clever with the situation found
2857 on some processors (eg Alpha) where ctz(0:mode) ==
2858 bitsize(mode). If someone can think of a way to send N to -1
2859 and leave alone all values in the range 0..N-1 (where N is a
2860 power of two), cheaper than this test-and-branch, please add it.
2862 The test-and-branch is done after the operation itself, in case
2863 the operation sets condition codes that can be recycled for this.
2864 (This is true on i386, for instance.) */
2866 rtx nonzero_label = gen_label_rtx ();
2867 emit_cmp_and_jump_insns (op0, CONST0_RTX (mode), NE, 0,
2868 mode, true, nonzero_label);
2870 convert_move (temp, GEN_INT (-1), false);
2871 emit_label (nonzero_label);
2874 /* temp now has a value in the range -1..bitsize-1. ffs is supposed
2875 to produce a value in the range 0..bitsize. */
2876 temp = expand_binop (mode, add_optab, temp, GEN_INT (1),
2877 target, false, OPTAB_DIRECT);
2884 add_equal_note (seq, temp, FFS, op0, 0);
2893 /* Extract the OMODE lowpart from VAL, which has IMODE. Under certain
2894 conditions, VAL may already be a SUBREG against which we cannot generate
2895 a further SUBREG. In this case, we expect forcing the value into a
2896 register will work around the situation. */
2899 lowpart_subreg_maybe_copy (enum machine_mode omode, rtx val,
2900 enum machine_mode imode)
2903 ret = lowpart_subreg (omode, val, imode);
2906 val = force_reg (imode, val);
2907 ret = lowpart_subreg (omode, val, imode);
2908 gcc_assert (ret != NULL);
2913 /* Expand a floating point absolute value or negation operation via a
2914 logical operation on the sign bit. */
2917 expand_absneg_bit (enum rtx_code code, enum machine_mode mode,
2918 rtx op0, rtx target)
2920 const struct real_format *fmt;
2921 int bitpos, word, nwords, i;
2922 enum machine_mode imode;
2923 HOST_WIDE_INT hi, lo;
2926 /* The format has to have a simple sign bit. */
2927 fmt = REAL_MODE_FORMAT (mode);
2931 bitpos = fmt->signbit_rw;
2935 /* Don't create negative zeros if the format doesn't support them. */
2936 if (code == NEG && !fmt->has_signed_zero)
2939 if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD)
2941 imode = int_mode_for_mode (mode);
2942 if (imode == BLKmode)
2951 if (FLOAT_WORDS_BIG_ENDIAN)
2952 word = (GET_MODE_BITSIZE (mode) - bitpos) / BITS_PER_WORD;
2954 word = bitpos / BITS_PER_WORD;
2955 bitpos = bitpos % BITS_PER_WORD;
2956 nwords = (GET_MODE_BITSIZE (mode) + BITS_PER_WORD - 1) / BITS_PER_WORD;
2959 if (bitpos < HOST_BITS_PER_WIDE_INT)
2962 lo = (HOST_WIDE_INT) 1 << bitpos;
2966 hi = (HOST_WIDE_INT) 1 << (bitpos - HOST_BITS_PER_WIDE_INT);
2972 if (target == 0 || target == op0)
2973 target = gen_reg_rtx (mode);
2979 for (i = 0; i < nwords; ++i)
2981 rtx targ_piece = operand_subword (target, i, 1, mode);
2982 rtx op0_piece = operand_subword_force (op0, i, mode);
2986 temp = expand_binop (imode, code == ABS ? and_optab : xor_optab,
2988 immed_double_const (lo, hi, imode),
2989 targ_piece, 1, OPTAB_LIB_WIDEN);
2990 if (temp != targ_piece)
2991 emit_move_insn (targ_piece, temp);
2994 emit_move_insn (targ_piece, op0_piece);
2997 insns = get_insns ();
3000 temp = gen_rtx_fmt_e (code, mode, copy_rtx (op0));
3001 emit_no_conflict_block (insns, target, op0, NULL_RTX, temp);
3005 temp = expand_binop (imode, code == ABS ? and_optab : xor_optab,
3006 gen_lowpart (imode, op0),
3007 immed_double_const (lo, hi, imode),
3008 gen_lowpart (imode, target), 1, OPTAB_LIB_WIDEN);
3009 target = lowpart_subreg_maybe_copy (mode, temp, imode);
3011 set_unique_reg_note (get_last_insn (), REG_EQUAL,
3012 gen_rtx_fmt_e (code, mode, copy_rtx (op0)));
3018 /* As expand_unop, but will fail rather than attempt the operation in a
3019 different mode or with a libcall. */
3021 expand_unop_direct (enum machine_mode mode, optab unoptab, rtx op0, rtx target,
3024 if (optab_handler (unoptab, mode)->insn_code != CODE_FOR_nothing)
3026 int icode = (int) optab_handler (unoptab, mode)->insn_code;
3027 enum machine_mode mode0 = insn_data[icode].operand[1].mode;
3029 rtx last = get_last_insn ();
3035 temp = gen_reg_rtx (mode);
3037 if (GET_MODE (xop0) != VOIDmode
3038 && GET_MODE (xop0) != mode0)
3039 xop0 = convert_to_mode (mode0, xop0, unsignedp);
3041 /* Now, if insn doesn't accept our operand, put it into a pseudo. */
3043 if (!insn_data[icode].operand[1].predicate (xop0, mode0))
3044 xop0 = copy_to_mode_reg (mode0, xop0);
3046 if (!insn_data[icode].operand[0].predicate (temp, mode))
3047 temp = gen_reg_rtx (mode);
3049 pat = GEN_FCN (icode) (temp, xop0);
3052 if (INSN_P (pat) && NEXT_INSN (pat) != NULL_RTX
3053 && ! add_equal_note (pat, temp, unoptab->code, xop0, NULL_RTX))
3055 delete_insns_since (last);
3056 return expand_unop (mode, unoptab, op0, NULL_RTX, unsignedp);
3064 delete_insns_since (last);
3069 /* Generate code to perform an operation specified by UNOPTAB
3070 on operand OP0, with result having machine-mode MODE.
3072 UNSIGNEDP is for the case where we have to widen the operands
3073 to perform the operation. It says to use zero-extension.
3075 If TARGET is nonzero, the value
3076 is generated there, if it is convenient to do so.
3077 In all cases an rtx is returned for the locus of the value;
3078 this may or may not be TARGET. */
3081 expand_unop (enum machine_mode mode, optab unoptab, rtx op0, rtx target,
3084 enum mode_class class = GET_MODE_CLASS (mode);
3085 enum machine_mode wider_mode;
3089 temp = expand_unop_direct (mode, unoptab, op0, target, unsignedp);
3093 /* It can't be done in this mode. Can we open-code it in a wider mode? */
3095 /* Widening (or narrowing) clz needs special treatment. */
3096 if (unoptab == clz_optab)
3098 temp = widen_clz (mode, op0, target);
3102 if (GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
3103 && optab_handler (unoptab, word_mode)->insn_code != CODE_FOR_nothing)
3105 temp = expand_doubleword_clz (mode, op0, target);
3113 /* Widening (or narrowing) bswap needs special treatment. */
3114 if (unoptab == bswap_optab)
3116 temp = widen_bswap (mode, op0, target);
3120 if (GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
3121 && optab_handler (unoptab, word_mode)->insn_code != CODE_FOR_nothing)
3123 temp = expand_doubleword_bswap (mode, op0, target);
3131 if (CLASS_HAS_WIDER_MODES_P (class))
3132 for (wider_mode = GET_MODE_WIDER_MODE (mode);
3133 wider_mode != VOIDmode;
3134 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
3136 if (optab_handler (unoptab, wider_mode)->insn_code != CODE_FOR_nothing)
3139 rtx last = get_last_insn ();
3141 /* For certain operations, we need not actually extend
3142 the narrow operand, as long as we will truncate the
3143 results to the same narrowness. */
3145 xop0 = widen_operand (xop0, wider_mode, mode, unsignedp,
3146 (unoptab == neg_optab
3147 || unoptab == one_cmpl_optab)
3148 && class == MODE_INT);
3150 temp = expand_unop (wider_mode, unoptab, xop0, NULL_RTX,
3155 if (class != MODE_INT
3156 || !TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (mode),
3157 GET_MODE_BITSIZE (wider_mode)))
3160 target = gen_reg_rtx (mode);
3161 convert_move (target, temp, 0);
3165 return gen_lowpart (mode, temp);
3168 delete_insns_since (last);
3172 /* These can be done a word at a time. */
3173 if (unoptab == one_cmpl_optab
3174 && class == MODE_INT
3175 && GET_MODE_SIZE (mode) > UNITS_PER_WORD
3176 && optab_handler (unoptab, word_mode)->insn_code != CODE_FOR_nothing)
3181 if (target == 0 || target == op0)
3182 target = gen_reg_rtx (mode);
3186 /* Do the actual arithmetic. */
3187 for (i = 0; i < GET_MODE_BITSIZE (mode) / BITS_PER_WORD; i++)
3189 rtx target_piece = operand_subword (target, i, 1, mode);
3190 rtx x = expand_unop (word_mode, unoptab,
3191 operand_subword_force (op0, i, mode),
3192 target_piece, unsignedp);
3194 if (target_piece != x)
3195 emit_move_insn (target_piece, x);
3198 insns = get_insns ();
3201 emit_no_conflict_block (insns, target, op0, NULL_RTX,
3202 gen_rtx_fmt_e (unoptab->code, mode,
3207 if (unoptab->code == NEG)
3209 /* Try negating floating point values by flipping the sign bit. */
3210 if (SCALAR_FLOAT_MODE_P (mode))
3212 temp = expand_absneg_bit (NEG, mode, op0, target);
3217 /* If there is no negation pattern, and we have no negative zero,
3218 try subtracting from zero. */
3219 if (!HONOR_SIGNED_ZEROS (mode))
3221 temp = expand_binop (mode, (unoptab == negv_optab
3222 ? subv_optab : sub_optab),
3223 CONST0_RTX (mode), op0, target,
3224 unsignedp, OPTAB_DIRECT);
3230 /* Try calculating parity (x) as popcount (x) % 2. */
3231 if (unoptab == parity_optab)
3233 temp = expand_parity (mode, op0, target);
3238 /* Try implementing ffs (x) in terms of clz (x). */
3239 if (unoptab == ffs_optab)
3241 temp = expand_ffs (mode, op0, target);
3246 /* Try implementing ctz (x) in terms of clz (x). */
3247 if (unoptab == ctz_optab)
3249 temp = expand_ctz (mode, op0, target);
3255 /* Now try a library call in this mode. */
3256 libfunc = optab_libfunc (unoptab, mode);
3261 enum machine_mode outmode = mode;
3263 /* All of these functions return small values. Thus we choose to
3264 have them return something that isn't a double-word. */
3265 if (unoptab == ffs_optab || unoptab == clz_optab || unoptab == ctz_optab
3266 || unoptab == popcount_optab || unoptab == parity_optab)
3268 = GET_MODE (hard_libcall_value (TYPE_MODE (integer_type_node)));
3272 /* Pass 1 for NO_QUEUE so we don't lose any increments
3273 if the libcall is cse'd or moved. */
3274 value = emit_library_call_value (libfunc, NULL_RTX, LCT_CONST, outmode,
3276 insns = get_insns ();
3279 target = gen_reg_rtx (outmode);
3280 emit_libcall_block (insns, target, value,
3281 gen_rtx_fmt_e (unoptab->code, outmode, op0));
3286 /* It can't be done in this mode. Can we do it in a wider mode? */
3288 if (CLASS_HAS_WIDER_MODES_P (class))
3290 for (wider_mode = GET_MODE_WIDER_MODE (mode);
3291 wider_mode != VOIDmode;
3292 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
3294 if ((optab_handler (unoptab, wider_mode)->insn_code
3295 != CODE_FOR_nothing)
3296 || optab_libfunc (unoptab, wider_mode))
3299 rtx last = get_last_insn ();
3301 /* For certain operations, we need not actually extend
3302 the narrow operand, as long as we will truncate the
3303 results to the same narrowness. */
3305 xop0 = widen_operand (xop0, wider_mode, mode, unsignedp,
3306 (unoptab == neg_optab
3307 || unoptab == one_cmpl_optab)
3308 && class == MODE_INT);
3310 temp = expand_unop (wider_mode, unoptab, xop0, NULL_RTX,
3313 /* If we are generating clz using wider mode, adjust the
3315 if (unoptab == clz_optab && temp != 0)
3316 temp = expand_binop (wider_mode, sub_optab, temp,
3317 GEN_INT (GET_MODE_BITSIZE (wider_mode)
3318 - GET_MODE_BITSIZE (mode)),
3319 target, true, OPTAB_DIRECT);
3323 if (class != MODE_INT)
3326 target = gen_reg_rtx (mode);
3327 convert_move (target, temp, 0);
3331 return gen_lowpart (mode, temp);
3334 delete_insns_since (last);
3339 /* One final attempt at implementing negation via subtraction,
3340 this time allowing widening of the operand. */
3341 if (unoptab->code == NEG && !HONOR_SIGNED_ZEROS (mode))
3344 temp = expand_binop (mode,
3345 unoptab == negv_optab ? subv_optab : sub_optab,
3346 CONST0_RTX (mode), op0,
3347 target, unsignedp, OPTAB_LIB_WIDEN);
3355 /* Emit code to compute the absolute value of OP0, with result to
3356 TARGET if convenient. (TARGET may be 0.) The return value says
3357 where the result actually is to be found.
3359 MODE is the mode of the operand; the mode of the result is
3360 different but can be deduced from MODE.
3365 expand_abs_nojump (enum machine_mode mode, rtx op0, rtx target,
3366 int result_unsignedp)
3371 result_unsignedp = 1;
3373 /* First try to do it with a special abs instruction. */
3374 temp = expand_unop (mode, result_unsignedp ? abs_optab : absv_optab,
3379 /* For floating point modes, try clearing the sign bit. */
3380 if (SCALAR_FLOAT_MODE_P (mode))
3382 temp = expand_absneg_bit (ABS, mode, op0, target);
3387 /* If we have a MAX insn, we can do this as MAX (x, -x). */
3388 if (optab_handler (smax_optab, mode)->insn_code != CODE_FOR_nothing
3389 && !HONOR_SIGNED_ZEROS (mode))
3391 rtx last = get_last_insn ();
3393 temp = expand_unop (mode, neg_optab, op0, NULL_RTX, 0);
3395 temp = expand_binop (mode, smax_optab, op0, temp, target, 0,
3401 delete_insns_since (last);
3404 /* If this machine has expensive jumps, we can do integer absolute
3405 value of X as (((signed) x >> (W-1)) ^ x) - ((signed) x >> (W-1)),
3406 where W is the width of MODE. */
3408 if (GET_MODE_CLASS (mode) == MODE_INT && BRANCH_COST >= 2)
3410 rtx extended = expand_shift (RSHIFT_EXPR, mode, op0,
3411 size_int (GET_MODE_BITSIZE (mode) - 1),
3414 temp = expand_binop (mode, xor_optab, extended, op0, target, 0,
3417 temp = expand_binop (mode, result_unsignedp ? sub_optab : subv_optab,
3418 temp, extended, target, 0, OPTAB_LIB_WIDEN);
3428 expand_abs (enum machine_mode mode, rtx op0, rtx target,
3429 int result_unsignedp, int safe)
3434 result_unsignedp = 1;
3436 temp = expand_abs_nojump (mode, op0, target, result_unsignedp);
3440 /* If that does not win, use conditional jump and negate. */
3442 /* It is safe to use the target if it is the same
3443 as the source if this is also a pseudo register */
3444 if (op0 == target && REG_P (op0)
3445 && REGNO (op0) >= FIRST_PSEUDO_REGISTER)
3448 op1 = gen_label_rtx ();
3449 if (target == 0 || ! safe
3450 || GET_MODE (target) != mode
3451 || (MEM_P (target) && MEM_VOLATILE_P (target))
3453 && REGNO (target) < FIRST_PSEUDO_REGISTER))
3454 target = gen_reg_rtx (mode);
3456 emit_move_insn (target, op0);
3459 do_compare_rtx_and_jump (target, CONST0_RTX (mode), GE, 0, mode,
3460 NULL_RTX, NULL_RTX, op1);
3462 op0 = expand_unop (mode, result_unsignedp ? neg_optab : negv_optab,
3465 emit_move_insn (target, op0);
3471 /* A subroutine of expand_copysign, perform the copysign operation using the
3472 abs and neg primitives advertised to exist on the target. The assumption
3473 is that we have a split register file, and leaving op0 in fp registers,
3474 and not playing with subregs so much, will help the register allocator. */
3477 expand_copysign_absneg (enum machine_mode mode, rtx op0, rtx op1, rtx target,
3478 int bitpos, bool op0_is_abs)
3480 enum machine_mode imode;
3487 /* Check if the back end provides an insn that handles signbit for the
3489 icode = (int) signbit_optab->handlers [(int) mode].insn_code;
3490 if (icode != CODE_FOR_nothing)
3492 imode = insn_data[icode].operand[0].mode;
3493 sign = gen_reg_rtx (imode);
3494 emit_unop_insn (icode, sign, op1, UNKNOWN);
3498 HOST_WIDE_INT hi, lo;
3500 if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD)
3502 imode = int_mode_for_mode (mode);
3503 if (imode == BLKmode)
3505 op1 = gen_lowpart (imode, op1);
3512 if (FLOAT_WORDS_BIG_ENDIAN)
3513 word = (GET_MODE_BITSIZE (mode) - bitpos) / BITS_PER_WORD;
3515 word = bitpos / BITS_PER_WORD;
3516 bitpos = bitpos % BITS_PER_WORD;
3517 op1 = operand_subword_force (op1, word, mode);
3520 if (bitpos < HOST_BITS_PER_WIDE_INT)
3523 lo = (HOST_WIDE_INT) 1 << bitpos;
3527 hi = (HOST_WIDE_INT) 1 << (bitpos - HOST_BITS_PER_WIDE_INT);
3531 sign = gen_reg_rtx (imode);
3532 sign = expand_binop (imode, and_optab, op1,
3533 immed_double_const (lo, hi, imode),
3534 NULL_RTX, 1, OPTAB_LIB_WIDEN);
3539 op0 = expand_unop (mode, abs_optab, op0, target, 0);
3546 if (target == NULL_RTX)
3547 target = copy_to_reg (op0);
3549 emit_move_insn (target, op0);
3552 label = gen_label_rtx ();
3553 emit_cmp_and_jump_insns (sign, const0_rtx, EQ, NULL_RTX, imode, 1, label);
3555 if (GET_CODE (op0) == CONST_DOUBLE)
3556 op0 = simplify_unary_operation (NEG, mode, op0, mode);
3558 op0 = expand_unop (mode, neg_optab, op0, target, 0);
3560 emit_move_insn (target, op0);
3568 /* A subroutine of expand_copysign, perform the entire copysign operation
3569 with integer bitmasks. BITPOS is the position of the sign bit; OP0_IS_ABS
3570 is true if op0 is known to have its sign bit clear. */
3573 expand_copysign_bit (enum machine_mode mode, rtx op0, rtx op1, rtx target,
3574 int bitpos, bool op0_is_abs)
3576 enum machine_mode imode;
3577 HOST_WIDE_INT hi, lo;
3578 int word, nwords, i;
3581 if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD)
3583 imode = int_mode_for_mode (mode);
3584 if (imode == BLKmode)
3593 if (FLOAT_WORDS_BIG_ENDIAN)
3594 word = (GET_MODE_BITSIZE (mode) - bitpos) / BITS_PER_WORD;
3596 word = bitpos / BITS_PER_WORD;
3597 bitpos = bitpos % BITS_PER_WORD;
3598 nwords = (GET_MODE_BITSIZE (mode) + BITS_PER_WORD - 1) / BITS_PER_WORD;
3601 if (bitpos < HOST_BITS_PER_WIDE_INT)
3604 lo = (HOST_WIDE_INT) 1 << bitpos;
3608 hi = (HOST_WIDE_INT) 1 << (bitpos - HOST_BITS_PER_WIDE_INT);
3612 if (target == 0 || target == op0 || target == op1)
3613 target = gen_reg_rtx (mode);
3619 for (i = 0; i < nwords; ++i)
3621 rtx targ_piece = operand_subword (target, i, 1, mode);
3622 rtx op0_piece = operand_subword_force (op0, i, mode);
3627 op0_piece = expand_binop (imode, and_optab, op0_piece,
3628 immed_double_const (~lo, ~hi, imode),
3629 NULL_RTX, 1, OPTAB_LIB_WIDEN);
3631 op1 = expand_binop (imode, and_optab,
3632 operand_subword_force (op1, i, mode),
3633 immed_double_const (lo, hi, imode),
3634 NULL_RTX, 1, OPTAB_LIB_WIDEN);
3636 temp = expand_binop (imode, ior_optab, op0_piece, op1,
3637 targ_piece, 1, OPTAB_LIB_WIDEN);
3638 if (temp != targ_piece)
3639 emit_move_insn (targ_piece, temp);
3642 emit_move_insn (targ_piece, op0_piece);
3645 insns = get_insns ();
3648 emit_no_conflict_block (insns, target, op0, op1, NULL_RTX);
3652 op1 = expand_binop (imode, and_optab, gen_lowpart (imode, op1),
3653 immed_double_const (lo, hi, imode),
3654 NULL_RTX, 1, OPTAB_LIB_WIDEN);
3656 op0 = gen_lowpart (imode, op0);
3658 op0 = expand_binop (imode, and_optab, op0,
3659 immed_double_const (~lo, ~hi, imode),
3660 NULL_RTX, 1, OPTAB_LIB_WIDEN);
3662 temp = expand_binop (imode, ior_optab, op0, op1,
3663 gen_lowpart (imode, target), 1, OPTAB_LIB_WIDEN);
3664 target = lowpart_subreg_maybe_copy (mode, temp, imode);
3670 /* Expand the C99 copysign operation. OP0 and OP1 must be the same
3671 scalar floating point mode. Return NULL if we do not know how to
3672 expand the operation inline. */
3675 expand_copysign (rtx op0, rtx op1, rtx target)
3677 enum machine_mode mode = GET_MODE (op0);
3678 const struct real_format *fmt;
3682 gcc_assert (SCALAR_FLOAT_MODE_P (mode));
3683 gcc_assert (GET_MODE (op1) == mode);
3685 /* First try to do it with a special instruction. */
3686 temp = expand_binop (mode, copysign_optab, op0, op1,
3687 target, 0, OPTAB_DIRECT);
3691 fmt = REAL_MODE_FORMAT (mode);
3692 if (fmt == NULL || !fmt->has_signed_zero)
3696 if (GET_CODE (op0) == CONST_DOUBLE)
3698 if (real_isneg (CONST_DOUBLE_REAL_VALUE (op0)))
3699 op0 = simplify_unary_operation (ABS, mode, op0, mode);
3703 if (fmt->signbit_ro >= 0
3704 && (GET_CODE (op0) == CONST_DOUBLE
3705 || (optab_handler (neg_optab, mode)->insn_code != CODE_FOR_nothing
3706 && optab_handler (abs_optab, mode)->insn_code != CODE_FOR_nothing)))
3708 temp = expand_copysign_absneg (mode, op0, op1, target,
3709 fmt->signbit_ro, op0_is_abs);
3714 if (fmt->signbit_rw < 0)
3716 return expand_copysign_bit (mode, op0, op1, target,
3717 fmt->signbit_rw, op0_is_abs);
3720 /* Generate an instruction whose insn-code is INSN_CODE,
3721 with two operands: an output TARGET and an input OP0.
3722 TARGET *must* be nonzero, and the output is always stored there.
3723 CODE is an rtx code such that (CODE OP0) is an rtx that describes
3724 the value that is stored into TARGET. */
3727 emit_unop_insn (int icode, rtx target, rtx op0, enum rtx_code code)
3730 enum machine_mode mode0 = insn_data[icode].operand[1].mode;
3735 /* Now, if insn does not accept our operands, put them into pseudos. */
3737 if (!insn_data[icode].operand[1].predicate (op0, mode0))
3738 op0 = copy_to_mode_reg (mode0, op0);
3740 if (!insn_data[icode].operand[0].predicate (temp, GET_MODE (temp)))
3741 temp = gen_reg_rtx (GET_MODE (temp));
3743 pat = GEN_FCN (icode) (temp, op0);
3745 if (INSN_P (pat) && NEXT_INSN (pat) != NULL_RTX && code != UNKNOWN)
3746 add_equal_note (pat, temp, code, op0, NULL_RTX);
3751 emit_move_insn (target, temp);
3754 struct no_conflict_data
3756 rtx target, first, insn;
3760 /* Called via note_stores by emit_no_conflict_block and emit_libcall_block.
3761 Set P->must_stay if the currently examined clobber / store has to stay
3762 in the list of insns that constitute the actual no_conflict block /
3765 no_conflict_move_test (rtx dest, const_rtx set, void *p0)
3767 struct no_conflict_data *p= p0;
3769 /* If this inns directly contributes to setting the target, it must stay. */
3770 if (reg_overlap_mentioned_p (p->target, dest))
3771 p->must_stay = true;
3772 /* If we haven't committed to keeping any other insns in the list yet,
3773 there is nothing more to check. */
3774 else if (p->insn == p->first)
3776 /* If this insn sets / clobbers a register that feeds one of the insns
3777 already in the list, this insn has to stay too. */
3778 else if (reg_overlap_mentioned_p (dest, PATTERN (p->first))
3779 || (CALL_P (p->first) && (find_reg_fusage (p->first, USE, dest)))
3780 || reg_used_between_p (dest, p->first, p->insn)
3781 /* Likewise if this insn depends on a register set by a previous
3782 insn in the list, or if it sets a result (presumably a hard
3783 register) that is set or clobbered by a previous insn.
3784 N.B. the modified_*_p (SET_DEST...) tests applied to a MEM
3785 SET_DEST perform the former check on the address, and the latter
3786 check on the MEM. */
3787 || (GET_CODE (set) == SET
3788 && (modified_in_p (SET_SRC (set), p->first)
3789 || modified_in_p (SET_DEST (set), p->first)
3790 || modified_between_p (SET_SRC (set), p->first, p->insn)
3791 || modified_between_p (SET_DEST (set), p->first, p->insn))))
3792 p->must_stay = true;
3795 /* Encapsulate the block starting at FIRST and ending with LAST, which is
3796 logically equivalent to EQUIV, so it gets manipulated as a unit if it
3797 is possible to do so. */
3800 maybe_encapsulate_block (rtx first, rtx last, rtx equiv)
3802 if (!flag_non_call_exceptions || !may_trap_p (equiv))
3804 /* We can't attach the REG_LIBCALL and REG_RETVAL notes when the
3805 encapsulated region would not be in one basic block, i.e. when
3806 there is a control_flow_insn_p insn between FIRST and LAST. */
3807 bool attach_libcall_retval_notes = true;
3808 rtx insn, next = NEXT_INSN (last);
3810 for (insn = first; insn != next; insn = NEXT_INSN (insn))
3811 if (control_flow_insn_p (insn))
3813 attach_libcall_retval_notes = false;
3817 if (attach_libcall_retval_notes)
3819 REG_NOTES (first) = gen_rtx_INSN_LIST (REG_LIBCALL, last,
3821 REG_NOTES (last) = gen_rtx_INSN_LIST (REG_RETVAL, first,
3827 /* Emit code to perform a series of operations on a multi-word quantity, one
3830 Such a block is preceded by a CLOBBER of the output, consists of multiple
3831 insns, each setting one word of the output, and followed by a SET copying
3832 the output to itself.
3834 Each of the insns setting words of the output receives a REG_NO_CONFLICT
3835 note indicating that it doesn't conflict with the (also multi-word)
3836 inputs. The entire block is surrounded by REG_LIBCALL and REG_RETVAL
3839 INSNS is a block of code generated to perform the operation, not including
3840 the CLOBBER and final copy. All insns that compute intermediate values
3841 are first emitted, followed by the block as described above.
3843 TARGET, OP0, and OP1 are the output and inputs of the operations,
3844 respectively. OP1 may be zero for a unary operation.
3846 EQUIV, if nonzero, is an expression to be placed into a REG_EQUAL note
3849 If TARGET is not a register, INSNS is simply emitted with no special
3850 processing. Likewise if anything in INSNS is not an INSN or if
3851 there is a libcall block inside INSNS.
3853 The final insn emitted is returned. */
3856 emit_no_conflict_block (rtx insns, rtx target, rtx op0, rtx op1, rtx equiv)
3858 rtx prev, next, first, last, insn;
3860 if (!REG_P (target) || reload_in_progress)
3861 return emit_insn (insns);
3863 for (insn = insns; insn; insn = NEXT_INSN (insn))
3864 if (!NONJUMP_INSN_P (insn)
3865 || find_reg_note (insn, REG_LIBCALL, NULL_RTX))
3866 return emit_insn (insns);
3868 /* First emit all insns that do not store into words of the output and remove
3869 these from the list. */
3870 for (insn = insns; insn; insn = next)
3873 struct no_conflict_data data;
3875 next = NEXT_INSN (insn);
3877 /* Some ports (cris) create a libcall regions at their own. We must
3878 avoid any potential nesting of LIBCALLs. */
3879 if ((note = find_reg_note (insn, REG_LIBCALL, NULL)) != NULL)
3880 remove_note (insn, note);
3881 if ((note = find_reg_note (insn, REG_RETVAL, NULL)) != NULL)
3882 remove_note (insn, note);
3884 data.target = target;
3888 note_stores (PATTERN (insn), no_conflict_move_test, &data);
3889 if (! data.must_stay)
3891 if (PREV_INSN (insn))
3892 NEXT_INSN (PREV_INSN (insn)) = next;
3897 PREV_INSN (next) = PREV_INSN (insn);
3903 prev = get_last_insn ();
3905 /* Now write the CLOBBER of the output, followed by the setting of each
3906 of the words, followed by the final copy. */
3907 if (target != op0 && target != op1)
3908 emit_insn (gen_rtx_CLOBBER (VOIDmode, target));
3910 for (insn = insns; insn; insn = next)
3912 next = NEXT_INSN (insn);
3915 if (op1 && REG_P (op1))
3916 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_NO_CONFLICT, op1,
3919 if (op0 && REG_P (op0))
3920 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_NO_CONFLICT, op0,
3924 if (optab_handler (mov_optab, GET_MODE (target))->insn_code
3925 != CODE_FOR_nothing)
3927 last = emit_move_insn (target, target);
3929 set_unique_reg_note (last, REG_EQUAL, equiv);
3933 last = get_last_insn ();
3935 /* Remove any existing REG_EQUAL note from "last", or else it will
3936 be mistaken for a note referring to the full contents of the
3937 alleged libcall value when found together with the REG_RETVAL
3938 note added below. An existing note can come from an insn
3939 expansion at "last". */
3940 remove_note (last, find_reg_note (last, REG_EQUAL, NULL_RTX));
3944 first = get_insns ();
3946 first = NEXT_INSN (prev);
3948 maybe_encapsulate_block (first, last, equiv);
3953 /* Emit code to make a call to a constant function or a library call.
3955 INSNS is a list containing all insns emitted in the call.
3956 These insns leave the result in RESULT. Our block is to copy RESULT
3957 to TARGET, which is logically equivalent to EQUIV.
3959 We first emit any insns that set a pseudo on the assumption that these are
3960 loading constants into registers; doing so allows them to be safely cse'ed
3961 between blocks. Then we emit all the other insns in the block, followed by
3962 an insn to move RESULT to TARGET. This last insn will have a REQ_EQUAL
3963 note with an operand of EQUIV.
3965 Moving assignments to pseudos outside of the block is done to improve
3966 the generated code, but is not required to generate correct code,
3967 hence being unable to move an assignment is not grounds for not making
3968 a libcall block. There are two reasons why it is safe to leave these
3969 insns inside the block: First, we know that these pseudos cannot be
3970 used in generated RTL outside the block since they are created for
3971 temporary purposes within the block. Second, CSE will not record the
3972 values of anything set inside a libcall block, so we know they must
3973 be dead at the end of the block.
3975 Except for the first group of insns (the ones setting pseudos), the
3976 block is delimited by REG_RETVAL and REG_LIBCALL notes. */
3978 emit_libcall_block (rtx insns, rtx target, rtx result, rtx equiv)
3980 rtx final_dest = target;
3981 rtx prev, next, first, last, insn;
3983 /* If this is a reg with REG_USERVAR_P set, then it could possibly turn
3984 into a MEM later. Protect the libcall block from this change. */
3985 if (! REG_P (target) || REG_USERVAR_P (target))
3986 target = gen_reg_rtx (GET_MODE (target));
3988 /* If we're using non-call exceptions, a libcall corresponding to an
3989 operation that may trap may also trap. */
3990 if (flag_non_call_exceptions && may_trap_p (equiv))
3992 for (insn = insns; insn; insn = NEXT_INSN (insn))
3995 rtx note = find_reg_note (insn, REG_EH_REGION, NULL_RTX);
3997 if (note != 0 && INTVAL (XEXP (note, 0)) <= 0)
3998 remove_note (insn, note);
4002 /* look for any CALL_INSNs in this sequence, and attach a REG_EH_REGION
4003 reg note to indicate that this call cannot throw or execute a nonlocal
4004 goto (unless there is already a REG_EH_REGION note, in which case
4006 for (insn = insns; insn; insn = NEXT_INSN (insn))
4009 rtx note = find_reg_note (insn, REG_EH_REGION, NULL_RTX);
4012 XEXP (note, 0) = constm1_rtx;
4014 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_EH_REGION, constm1_rtx,
4018 /* First emit all insns that set pseudos. Remove them from the list as
4019 we go. Avoid insns that set pseudos which were referenced in previous
4020 insns. These can be generated by move_by_pieces, for example,
4021 to update an address. Similarly, avoid insns that reference things
4022 set in previous insns. */
4024 for (insn = insns; insn; insn = next)
4026 rtx set = single_set (insn);
4029 /* Some ports (cris) create a libcall regions at their own. We must
4030 avoid any potential nesting of LIBCALLs. */
4031 if ((note = find_reg_note (insn, REG_LIBCALL, NULL)) != NULL)
4032 remove_note (insn, note);
4033 if ((note = find_reg_note (insn, REG_RETVAL, NULL)) != NULL)
4034 remove_note (insn, note);
4036 next = NEXT_INSN (insn);
4038 if (set != 0 && REG_P (SET_DEST (set))
4039 && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER)
4041 struct no_conflict_data data;
4043 data.target = const0_rtx;
4047 note_stores (PATTERN (insn), no_conflict_move_test, &data);
4048 if (! data.must_stay)
4050 if (PREV_INSN (insn))
4051 NEXT_INSN (PREV_INSN (insn)) = next;
4056 PREV_INSN (next) = PREV_INSN (insn);
4062 /* Some ports use a loop to copy large arguments onto the stack.
4063 Don't move anything outside such a loop. */
4068 prev = get_last_insn ();
4070 /* Write the remaining insns followed by the final copy. */
4072 for (insn = insns; insn; insn = next)
4074 next = NEXT_INSN (insn);
4079 last = emit_move_insn (target, result);
4080 if (optab_handler (mov_optab, GET_MODE (target))->insn_code
4081 != CODE_FOR_nothing)
4082 set_unique_reg_note (last, REG_EQUAL, copy_rtx (equiv));
4085 /* Remove any existing REG_EQUAL note from "last", or else it will
4086 be mistaken for a note referring to the full contents of the
4087 libcall value when found together with the REG_RETVAL note added
4088 below. An existing note can come from an insn expansion at
4090 remove_note (last, find_reg_note (last, REG_EQUAL, NULL_RTX));
4093 if (final_dest != target)
4094 emit_move_insn (final_dest, target);
4097 first = get_insns ();
4099 first = NEXT_INSN (prev);
4101 maybe_encapsulate_block (first, last, equiv);
4104 /* Nonzero if we can perform a comparison of mode MODE straightforwardly.
4105 PURPOSE describes how this comparison will be used. CODE is the rtx
4106 comparison code we will be using.
4108 ??? Actually, CODE is slightly weaker than that. A target is still
4109 required to implement all of the normal bcc operations, but not
4110 required to implement all (or any) of the unordered bcc operations. */
4113 can_compare_p (enum rtx_code code, enum machine_mode mode,
4114 enum can_compare_purpose purpose)
4118 if (optab_handler (cmp_optab, mode)->insn_code != CODE_FOR_nothing)
4120 if (purpose == ccp_jump)
4121 return bcc_gen_fctn[(int) code] != NULL;
4122 else if (purpose == ccp_store_flag)
4123 return setcc_gen_code[(int) code] != CODE_FOR_nothing;
4125 /* There's only one cmov entry point, and it's allowed to fail. */
4128 if (purpose == ccp_jump
4129 && optab_handler (cbranch_optab, mode)->insn_code != CODE_FOR_nothing)
4131 if (purpose == ccp_cmov
4132 && optab_handler (cmov_optab, mode)->insn_code != CODE_FOR_nothing)
4134 if (purpose == ccp_store_flag
4135 && optab_handler (cstore_optab, mode)->insn_code != CODE_FOR_nothing)
4137 mode = GET_MODE_WIDER_MODE (mode);
4139 while (mode != VOIDmode);
4144 /* This function is called when we are going to emit a compare instruction that
4145 compares the values found in *PX and *PY, using the rtl operator COMPARISON.
4147 *PMODE is the mode of the inputs (in case they are const_int).
4148 *PUNSIGNEDP nonzero says that the operands are unsigned;
4149 this matters if they need to be widened.
4151 If they have mode BLKmode, then SIZE specifies the size of both operands.
4153 This function performs all the setup necessary so that the caller only has
4154 to emit a single comparison insn. This setup can involve doing a BLKmode
4155 comparison or emitting a library call to perform the comparison if no insn
4156 is available to handle it.
4157 The values which are passed in through pointers can be modified; the caller
4158 should perform the comparison on the modified values. Constant
4159 comparisons must have already been folded. */
4162 prepare_cmp_insn (rtx *px, rtx *py, enum rtx_code *pcomparison, rtx size,
4163 enum machine_mode *pmode, int *punsignedp,
4164 enum can_compare_purpose purpose)
4166 enum machine_mode mode = *pmode;
4167 rtx x = *px, y = *py;
4168 int unsignedp = *punsignedp;
4171 /* If we are inside an appropriately-short loop and we are optimizing,
4172 force expensive constants into a register. */
4173 if (CONSTANT_P (x) && optimize
4174 && rtx_cost (x, COMPARE) > COSTS_N_INSNS (1))
4175 x = force_reg (mode, x);
4177 if (CONSTANT_P (y) && optimize
4178 && rtx_cost (y, COMPARE) > COSTS_N_INSNS (1))
4179 y = force_reg (mode, y);
4182 /* Make sure if we have a canonical comparison. The RTL
4183 documentation states that canonical comparisons are required only
4184 for targets which have cc0. */
4185 gcc_assert (!CONSTANT_P (x) || CONSTANT_P (y));
4188 /* Don't let both operands fail to indicate the mode. */
4189 if (GET_MODE (x) == VOIDmode && GET_MODE (y) == VOIDmode)
4190 x = force_reg (mode, x);
4192 /* Handle all BLKmode compares. */
4194 if (mode == BLKmode)
4196 enum machine_mode cmp_mode, result_mode;
4197 enum insn_code cmp_code;
4202 = GEN_INT (MIN (MEM_ALIGN (x), MEM_ALIGN (y)) / BITS_PER_UNIT);
4206 /* Try to use a memory block compare insn - either cmpstr
4207 or cmpmem will do. */
4208 for (cmp_mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
4209 cmp_mode != VOIDmode;
4210 cmp_mode = GET_MODE_WIDER_MODE (cmp_mode))
4212 cmp_code = cmpmem_optab[cmp_mode];
4213 if (cmp_code == CODE_FOR_nothing)
4214 cmp_code = cmpstr_optab[cmp_mode];
4215 if (cmp_code == CODE_FOR_nothing)
4216 cmp_code = cmpstrn_optab[cmp_mode];
4217 if (cmp_code == CODE_FOR_nothing)
4220 /* Must make sure the size fits the insn's mode. */
4221 if ((GET_CODE (size) == CONST_INT
4222 && INTVAL (size) >= (1 << GET_MODE_BITSIZE (cmp_mode)))
4223 || (GET_MODE_BITSIZE (GET_MODE (size))
4224 > GET_MODE_BITSIZE (cmp_mode)))
4227 result_mode = insn_data[cmp_code].operand[0].mode;
4228 result = gen_reg_rtx (result_mode);
4229 size = convert_to_mode (cmp_mode, size, 1);
4230 emit_insn (GEN_FCN (cmp_code) (result, x, y, size, opalign));
4234 *pmode = result_mode;
4238 /* Otherwise call a library function, memcmp. */
4239 libfunc = memcmp_libfunc;
4240 length_type = sizetype;
4241 result_mode = TYPE_MODE (integer_type_node);
4242 cmp_mode = TYPE_MODE (length_type);
4243 size = convert_to_mode (TYPE_MODE (length_type), size,
4244 TYPE_UNSIGNED (length_type));
4246 result = emit_library_call_value (libfunc, 0, LCT_PURE_MAKE_BLOCK,
4253 *pmode = result_mode;
4257 /* Don't allow operands to the compare to trap, as that can put the
4258 compare and branch in different basic blocks. */
4259 if (flag_non_call_exceptions)
4262 x = force_reg (mode, x);
4264 y = force_reg (mode, y);
4269 if (can_compare_p (*pcomparison, mode, purpose))
4272 /* Handle a lib call just for the mode we are using. */
4274 libfunc = optab_libfunc (cmp_optab, mode);
4275 if (libfunc && !SCALAR_FLOAT_MODE_P (mode))
4280 /* If we want unsigned, and this mode has a distinct unsigned
4281 comparison routine, use that. */
4284 ulibfunc = optab_libfunc (ucmp_optab, mode);
4286 if (unsignedp && ulibfunc)
4289 result = emit_library_call_value (libfunc, NULL_RTX, LCT_CONST_MAKE_BLOCK,
4290 targetm.libgcc_cmp_return_mode (),
4291 2, x, mode, y, mode);
4293 /* There are two kinds of comparison routines. Biased routines
4294 return 0/1/2, and unbiased routines return -1/0/1. Other parts
4295 of gcc expect that the comparison operation is equivalent
4296 to the modified comparison. For signed comparisons compare the
4297 result against 1 in the biased case, and zero in the unbiased
4298 case. For unsigned comparisons always compare against 1 after
4299 biasing the unbiased result by adding 1. This gives us a way to
4305 if (!TARGET_LIB_INT_CMP_BIASED)
4308 *px = plus_constant (result, 1);
4315 gcc_assert (SCALAR_FLOAT_MODE_P (mode));
4316 prepare_float_lib_cmp (px, py, pcomparison, pmode, punsignedp);
4319 /* Before emitting an insn with code ICODE, make sure that X, which is going
4320 to be used for operand OPNUM of the insn, is converted from mode MODE to
4321 WIDER_MODE (UNSIGNEDP determines whether it is an unsigned conversion), and
4322 that it is accepted by the operand predicate. Return the new value. */
4325 prepare_operand (int icode, rtx x, int opnum, enum machine_mode mode,
4326 enum machine_mode wider_mode, int unsignedp)
4328 if (mode != wider_mode)
4329 x = convert_modes (wider_mode, mode, x, unsignedp);
4331 if (!insn_data[icode].operand[opnum].predicate
4332 (x, insn_data[icode].operand[opnum].mode))
4334 if (reload_completed)
4336 x = copy_to_mode_reg (insn_data[icode].operand[opnum].mode, x);
4342 /* Subroutine of emit_cmp_and_jump_insns; this function is called when we know
4343 we can do the comparison.
4344 The arguments are the same as for emit_cmp_and_jump_insns; but LABEL may
4345 be NULL_RTX which indicates that only a comparison is to be generated. */
4348 emit_cmp_and_jump_insn_1 (rtx x, rtx y, enum machine_mode mode,
4349 enum rtx_code comparison, int unsignedp, rtx label)
4351 rtx test = gen_rtx_fmt_ee (comparison, mode, x, y);
4352 enum mode_class class = GET_MODE_CLASS (mode);
4353 enum machine_mode wider_mode = mode;
4355 /* Try combined insns first. */
4358 enum insn_code icode;
4359 PUT_MODE (test, wider_mode);
4363 icode = optab_handler (cbranch_optab, wider_mode)->insn_code;
4365 if (icode != CODE_FOR_nothing
4366 && insn_data[icode].operand[0].predicate (test, wider_mode))
4368 x = prepare_operand (icode, x, 1, mode, wider_mode, unsignedp);
4369 y = prepare_operand (icode, y, 2, mode, wider_mode, unsignedp);
4370 emit_jump_insn (GEN_FCN (icode) (test, x, y, label));
4375 /* Handle some compares against zero. */
4376 icode = (int) optab_handler (tst_optab, wider_mode)->insn_code;
4377 if (y == CONST0_RTX (mode) && icode != CODE_FOR_nothing)
4379 x = prepare_operand (icode, x, 0, mode, wider_mode, unsignedp);
4380 emit_insn (GEN_FCN (icode) (x));
4382 emit_jump_insn (bcc_gen_fctn[(int) comparison] (label));
4386 /* Handle compares for which there is a directly suitable insn. */
4388 icode = (int) optab_handler (cmp_optab, wider_mode)->insn_code;
4389 if (icode != CODE_FOR_nothing)
4391 x = prepare_operand (icode, x, 0, mode, wider_mode, unsignedp);
4392 y = prepare_operand (icode, y, 1, mode, wider_mode, unsignedp);
4393 emit_insn (GEN_FCN (icode) (x, y));
4395 emit_jump_insn (bcc_gen_fctn[(int) comparison] (label));
4399 if (!CLASS_HAS_WIDER_MODES_P (class))
4402 wider_mode = GET_MODE_WIDER_MODE (wider_mode);
4404 while (wider_mode != VOIDmode);
4409 /* Generate code to compare X with Y so that the condition codes are
4410 set and to jump to LABEL if the condition is true. If X is a
4411 constant and Y is not a constant, then the comparison is swapped to
4412 ensure that the comparison RTL has the canonical form.
4414 UNSIGNEDP nonzero says that X and Y are unsigned; this matters if they
4415 need to be widened by emit_cmp_insn. UNSIGNEDP is also used to select
4416 the proper branch condition code.
4418 If X and Y have mode BLKmode, then SIZE specifies the size of both X and Y.
4420 MODE is the mode of the inputs (in case they are const_int).
4422 COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.). It will
4423 be passed unchanged to emit_cmp_insn, then potentially converted into an
4424 unsigned variant based on UNSIGNEDP to select a proper jump instruction. */
4427 emit_cmp_and_jump_insns (rtx x, rtx y, enum rtx_code comparison, rtx size,
4428 enum machine_mode mode, int unsignedp, rtx label)
4430 rtx op0 = x, op1 = y;
4432 /* Swap operands and condition to ensure canonical RTL. */
4433 if (swap_commutative_operands_p (x, y))
4435 /* If we're not emitting a branch, callers are required to pass
4436 operands in an order conforming to canonical RTL. We relax this
4437 for commutative comparisons so callers using EQ don't need to do
4438 swapping by hand. */
4439 gcc_assert (label || (comparison == swap_condition (comparison)));
4442 comparison = swap_condition (comparison);
4446 /* If OP0 is still a constant, then both X and Y must be constants.
4447 Force X into a register to create canonical RTL. */
4448 if (CONSTANT_P (op0))
4449 op0 = force_reg (mode, op0);
4453 comparison = unsigned_condition (comparison);
4455 prepare_cmp_insn (&op0, &op1, &comparison, size, &mode, &unsignedp,
4457 emit_cmp_and_jump_insn_1 (op0, op1, mode, comparison, unsignedp, label);
4460 /* Like emit_cmp_and_jump_insns, but generate only the comparison. */
4463 emit_cmp_insn (rtx x, rtx y, enum rtx_code comparison, rtx size,
4464 enum machine_mode mode, int unsignedp)
4466 emit_cmp_and_jump_insns (x, y, comparison, size, mode, unsignedp, 0);
4469 /* Emit a library call comparison between floating point X and Y.
4470 COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.). */
4473 prepare_float_lib_cmp (rtx *px, rtx *py, enum rtx_code *pcomparison,
4474 enum machine_mode *pmode, int *punsignedp)
4476 enum rtx_code comparison = *pcomparison;
4477 enum rtx_code swapped = swap_condition (comparison);
4478 enum rtx_code reversed = reverse_condition_maybe_unordered (comparison);
4481 enum machine_mode orig_mode = GET_MODE (x);
4482 enum machine_mode mode, cmp_mode;
4483 rtx value, target, insns, equiv;
4485 bool reversed_p = false;
4486 cmp_mode = targetm.libgcc_cmp_return_mode ();
4488 for (mode = orig_mode;
4490 mode = GET_MODE_WIDER_MODE (mode))
4492 if ((libfunc = optab_libfunc (code_to_optab[comparison], mode)))
4495 if ((libfunc = optab_libfunc (code_to_optab[swapped] , mode)))
4498 tmp = x; x = y; y = tmp;
4499 comparison = swapped;
4503 if ((libfunc = optab_libfunc (code_to_optab[reversed], mode))
4504 && FLOAT_LIB_COMPARE_RETURNS_BOOL (mode, reversed))
4506 comparison = reversed;
4512 gcc_assert (mode != VOIDmode);
4514 if (mode != orig_mode)
4516 x = convert_to_mode (mode, x, 0);
4517 y = convert_to_mode (mode, y, 0);
4520 /* Attach a REG_EQUAL note describing the semantics of the libcall to
4521 the RTL. The allows the RTL optimizers to delete the libcall if the
4522 condition can be determined at compile-time. */
4523 if (comparison == UNORDERED)
4525 rtx temp = simplify_gen_relational (NE, cmp_mode, mode, x, x);
4526 equiv = simplify_gen_relational (NE, cmp_mode, mode, y, y);
4527 equiv = simplify_gen_ternary (IF_THEN_ELSE, cmp_mode, cmp_mode,
4528 temp, const_true_rtx, equiv);
4532 equiv = simplify_gen_relational (comparison, cmp_mode, mode, x, y);
4533 if (! FLOAT_LIB_COMPARE_RETURNS_BOOL (mode, comparison))
4535 rtx true_rtx, false_rtx;
4540 true_rtx = const0_rtx;
4541 false_rtx = const_true_rtx;
4545 true_rtx = const_true_rtx;
4546 false_rtx = const0_rtx;
4550 true_rtx = const1_rtx;
4551 false_rtx = const0_rtx;
4555 true_rtx = const0_rtx;
4556 false_rtx = constm1_rtx;
4560 true_rtx = constm1_rtx;
4561 false_rtx = const0_rtx;
4565 true_rtx = const0_rtx;
4566 false_rtx = const1_rtx;
4572 equiv = simplify_gen_ternary (IF_THEN_ELSE, cmp_mode, cmp_mode,
4573 equiv, true_rtx, false_rtx);
4578 value = emit_library_call_value (libfunc, NULL_RTX, LCT_CONST,
4579 cmp_mode, 2, x, mode, y, mode);
4580 insns = get_insns ();
4583 target = gen_reg_rtx (cmp_mode);
4584 emit_libcall_block (insns, target, value, equiv);
4586 if (comparison == UNORDERED
4587 || FLOAT_LIB_COMPARE_RETURNS_BOOL (mode, comparison))
4588 comparison = reversed_p ? EQ : NE;
4593 *pcomparison = comparison;
4597 /* Generate code to indirectly jump to a location given in the rtx LOC. */
4600 emit_indirect_jump (rtx loc)
4602 if (!insn_data[(int) CODE_FOR_indirect_jump].operand[0].predicate
4604 loc = copy_to_mode_reg (Pmode, loc);
4606 emit_jump_insn (gen_indirect_jump (loc));
4610 #ifdef HAVE_conditional_move
4612 /* Emit a conditional move instruction if the machine supports one for that
4613 condition and machine mode.
4615 OP0 and OP1 are the operands that should be compared using CODE. CMODE is
4616 the mode to use should they be constants. If it is VOIDmode, they cannot
4619 OP2 should be stored in TARGET if the comparison is true, otherwise OP3
4620 should be stored there. MODE is the mode to use should they be constants.
4621 If it is VOIDmode, they cannot both be constants.
4623 The result is either TARGET (perhaps modified) or NULL_RTX if the operation
4624 is not supported. */
4627 emit_conditional_move (rtx target, enum rtx_code code, rtx op0, rtx op1,
4628 enum machine_mode cmode, rtx op2, rtx op3,
4629 enum machine_mode mode, int unsignedp)
4631 rtx tem, subtarget, comparison, insn;
4632 enum insn_code icode;
4633 enum rtx_code reversed;
4635 /* If one operand is constant, make it the second one. Only do this
4636 if the other operand is not constant as well. */
4638 if (swap_commutative_operands_p (op0, op1))
4643 code = swap_condition (code);
4646 /* get_condition will prefer to generate LT and GT even if the old
4647 comparison was against zero, so undo that canonicalization here since
4648 comparisons against zero are cheaper. */
4649 if (code == LT && op1 == const1_rtx)
4650 code = LE, op1 = const0_rtx;
4651 else if (code == GT && op1 == constm1_rtx)
4652 code = GE, op1 = const0_rtx;
4654 if (cmode == VOIDmode)
4655 cmode = GET_MODE (op0);
4657 if (swap_commutative_operands_p (op2, op3)
4658 && ((reversed = reversed_comparison_code_parts (code, op0, op1, NULL))
4667 if (mode == VOIDmode)
4668 mode = GET_MODE (op2);
4670 icode = movcc_gen_code[mode];
4672 if (icode == CODE_FOR_nothing)
4676 target = gen_reg_rtx (mode);
4680 /* If the insn doesn't accept these operands, put them in pseudos. */
4682 if (!insn_data[icode].operand[0].predicate
4683 (subtarget, insn_data[icode].operand[0].mode))
4684 subtarget = gen_reg_rtx (insn_data[icode].operand[0].mode);
4686 if (!insn_data[icode].operand[2].predicate
4687 (op2, insn_data[icode].operand[2].mode))
4688 op2 = copy_to_mode_reg (insn_data[icode].operand[2].mode, op2);
4690 if (!insn_data[icode].operand[3].predicate
4691 (op3, insn_data[icode].operand[3].mode))
4692 op3 = copy_to_mode_reg (insn_data[icode].operand[3].mode, op3);
4694 /* Everything should now be in the suitable form, so emit the compare insn
4695 and then the conditional move. */
4698 = compare_from_rtx (op0, op1, code, unsignedp, cmode, NULL_RTX);
4700 /* ??? Watch for const0_rtx (nop) and const_true_rtx (unconditional)? */
4701 /* We can get const0_rtx or const_true_rtx in some circumstances. Just
4702 return NULL and let the caller figure out how best to deal with this
4704 if (GET_CODE (comparison) != code)
4707 insn = GEN_FCN (icode) (subtarget, comparison, op2, op3);
4709 /* If that failed, then give up. */
4715 if (subtarget != target)
4716 convert_move (target, subtarget, 0);
4721 /* Return nonzero if a conditional move of mode MODE is supported.
4723 This function is for combine so it can tell whether an insn that looks
4724 like a conditional move is actually supported by the hardware. If we
4725 guess wrong we lose a bit on optimization, but that's it. */
4726 /* ??? sparc64 supports conditionally moving integers values based on fp
4727 comparisons, and vice versa. How do we handle them? */
4730 can_conditionally_move_p (enum machine_mode mode)
4732 if (movcc_gen_code[mode] != CODE_FOR_nothing)
4738 #endif /* HAVE_conditional_move */
4740 /* Emit a conditional addition instruction if the machine supports one for that
4741 condition and machine mode.
4743 OP0 and OP1 are the operands that should be compared using CODE. CMODE is
4744 the mode to use should they be constants. If it is VOIDmode, they cannot
4747 OP2 should be stored in TARGET if the comparison is true, otherwise OP2+OP3
4748 should be stored there. MODE is the mode to use should they be constants.
4749 If it is VOIDmode, they cannot both be constants.
4751 The result is either TARGET (perhaps modified) or NULL_RTX if the operation
4752 is not supported. */
4755 emit_conditional_add (rtx target, enum rtx_code code, rtx op0, rtx op1,
4756 enum machine_mode cmode, rtx op2, rtx op3,
4757 enum machine_mode mode, int unsignedp)
4759 rtx tem, subtarget, comparison, insn;
4760 enum insn_code icode;
4761 enum rtx_code reversed;
4763 /* If one operand is constant, make it the second one. Only do this
4764 if the other operand is not constant as well. */
4766 if (swap_commutative_operands_p (op0, op1))
4771 code = swap_condition (code);
4774 /* get_condition will prefer to generate LT and GT even if the old
4775 comparison was against zero, so undo that canonicalization here since
4776 comparisons against zero are cheaper. */
4777 if (code == LT && op1 == const1_rtx)
4778 code = LE, op1 = const0_rtx;
4779 else if (code == GT && op1 == constm1_rtx)
4780 code = GE, op1 = const0_rtx;
4782 if (cmode == VOIDmode)
4783 cmode = GET_MODE (op0);
4785 if (swap_commutative_operands_p (op2, op3)
4786 && ((reversed = reversed_comparison_code_parts (code, op0, op1, NULL))
4795 if (mode == VOIDmode)
4796 mode = GET_MODE (op2);
4798 icode = optab_handler (addcc_optab, mode)->insn_code;
4800 if (icode == CODE_FOR_nothing)
4804 target = gen_reg_rtx (mode);
4806 /* If the insn doesn't accept these operands, put them in pseudos. */
4808 if (!insn_data[icode].operand[0].predicate
4809 (target, insn_data[icode].operand[0].mode))
4810 subtarget = gen_reg_rtx (insn_data[icode].operand[0].mode);
4814 if (!insn_data[icode].operand[2].predicate
4815 (op2, insn_data[icode].operand[2].mode))
4816 op2 = copy_to_mode_reg (insn_data[icode].operand[2].mode, op2);
4818 if (!insn_data[icode].operand[3].predicate
4819 (op3, insn_data[icode].operand[3].mode))
4820 op3 = copy_to_mode_reg (insn_data[icode].operand[3].mode, op3);
4822 /* Everything should now be in the suitable form, so emit the compare insn
4823 and then the conditional move. */
4826 = compare_from_rtx (op0, op1, code, unsignedp, cmode, NULL_RTX);
4828 /* ??? Watch for const0_rtx (nop) and const_true_rtx (unconditional)? */
4829 /* We can get const0_rtx or const_true_rtx in some circumstances. Just
4830 return NULL and let the caller figure out how best to deal with this
4832 if (GET_CODE (comparison) != code)
4835 insn = GEN_FCN (icode) (subtarget, comparison, op2, op3);
4837 /* If that failed, then give up. */
4843 if (subtarget != target)
4844 convert_move (target, subtarget, 0);
4849 /* These functions attempt to generate an insn body, rather than
4850 emitting the insn, but if the gen function already emits them, we
4851 make no attempt to turn them back into naked patterns. */
4853 /* Generate and return an insn body to add Y to X. */
4856 gen_add2_insn (rtx x, rtx y)
4858 int icode = (int) optab_handler (add_optab, GET_MODE (x))->insn_code;
4860 gcc_assert (insn_data[icode].operand[0].predicate
4861 (x, insn_data[icode].operand[0].mode));
4862 gcc_assert (insn_data[icode].operand[1].predicate
4863 (x, insn_data[icode].operand[1].mode));
4864 gcc_assert (insn_data[icode].operand[2].predicate
4865 (y, insn_data[icode].operand[2].mode));
4867 return GEN_FCN (icode) (x, x, y);
4870 /* Generate and return an insn body to add r1 and c,
4871 storing the result in r0. */
4874 gen_add3_insn (rtx r0, rtx r1, rtx c)
4876 int icode = (int) optab_handler (add_optab, GET_MODE (r0))->insn_code;
4878 if (icode == CODE_FOR_nothing
4879 || !(insn_data[icode].operand[0].predicate
4880 (r0, insn_data[icode].operand[0].mode))
4881 || !(insn_data[icode].operand[1].predicate
4882 (r1, insn_data[icode].operand[1].mode))
4883 || !(insn_data[icode].operand[2].predicate
4884 (c, insn_data[icode].operand[2].mode)))
4887 return GEN_FCN (icode) (r0, r1, c);
4891 have_add2_insn (rtx x, rtx y)
4895 gcc_assert (GET_MODE (x) != VOIDmode);
4897 icode = (int) optab_handler (add_optab, GET_MODE (x))->insn_code;
4899 if (icode == CODE_FOR_nothing)
4902 if (!(insn_data[icode].operand[0].predicate
4903 (x, insn_data[icode].operand[0].mode))
4904 || !(insn_data[icode].operand[1].predicate
4905 (x, insn_data[icode].operand[1].mode))
4906 || !(insn_data[icode].operand[2].predicate
4907 (y, insn_data[icode].operand[2].mode)))
4913 /* Generate and return an insn body to subtract Y from X. */
4916 gen_sub2_insn (rtx x, rtx y)
4918 int icode = (int) optab_handler (sub_optab, GET_MODE (x))->insn_code;
4920 gcc_assert (insn_data[icode].operand[0].predicate
4921 (x, insn_data[icode].operand[0].mode));
4922 gcc_assert (insn_data[icode].operand[1].predicate
4923 (x, insn_data[icode].operand[1].mode));
4924 gcc_assert (insn_data[icode].operand[2].predicate
4925 (y, insn_data[icode].operand[2].mode));
4927 return GEN_FCN (icode) (x, x, y);
4930 /* Generate and return an insn body to subtract r1 and c,
4931 storing the result in r0. */
4934 gen_sub3_insn (rtx r0, rtx r1, rtx c)
4936 int icode = (int) optab_handler (sub_optab, GET_MODE (r0))->insn_code;
4938 if (icode == CODE_FOR_nothing
4939 || !(insn_data[icode].operand[0].predicate
4940 (r0, insn_data[icode].operand[0].mode))
4941 || !(insn_data[icode].operand[1].predicate
4942 (r1, insn_data[icode].operand[1].mode))
4943 || !(insn_data[icode].operand[2].predicate
4944 (c, insn_data[icode].operand[2].mode)))
4947 return GEN_FCN (icode) (r0, r1, c);
4951 have_sub2_insn (rtx x, rtx y)
4955 gcc_assert (GET_MODE (x) != VOIDmode);
4957 icode = (int) optab_handler (sub_optab, GET_MODE (x))->insn_code;
4959 if (icode == CODE_FOR_nothing)
4962 if (!(insn_data[icode].operand[0].predicate
4963 (x, insn_data[icode].operand[0].mode))
4964 || !(insn_data[icode].operand[1].predicate
4965 (x, insn_data[icode].operand[1].mode))
4966 || !(insn_data[icode].operand[2].predicate
4967 (y, insn_data[icode].operand[2].mode)))
4973 /* Generate the body of an instruction to copy Y into X.
4974 It may be a list of insns, if one insn isn't enough. */
4977 gen_move_insn (rtx x, rtx y)
4982 emit_move_insn_1 (x, y);
4988 /* Return the insn code used to extend FROM_MODE to TO_MODE.
4989 UNSIGNEDP specifies zero-extension instead of sign-extension. If
4990 no such operation exists, CODE_FOR_nothing will be returned. */
4993 can_extend_p (enum machine_mode to_mode, enum machine_mode from_mode,
4997 #ifdef HAVE_ptr_extend
4999 return CODE_FOR_ptr_extend;
5002 tab = unsignedp ? zext_optab : sext_optab;
5003 return convert_optab_handler (tab, to_mode, from_mode)->insn_code;
5006 /* Generate the body of an insn to extend Y (with mode MFROM)
5007 into X (with mode MTO). Do zero-extension if UNSIGNEDP is nonzero. */
5010 gen_extend_insn (rtx x, rtx y, enum machine_mode mto,
5011 enum machine_mode mfrom, int unsignedp)
5013 enum insn_code icode = can_extend_p (mto, mfrom, unsignedp);
5014 return GEN_FCN (icode) (x, y);
5017 /* can_fix_p and can_float_p say whether the target machine
5018 can directly convert a given fixed point type to
5019 a given floating point type, or vice versa.
5020 The returned value is the CODE_FOR_... value to use,
5021 or CODE_FOR_nothing if these modes cannot be directly converted.
5023 *TRUNCP_PTR is set to 1 if it is necessary to output
5024 an explicit FTRUNC insn before the fix insn; otherwise 0. */
5026 static enum insn_code
5027 can_fix_p (enum machine_mode fixmode, enum machine_mode fltmode,
5028 int unsignedp, int *truncp_ptr)
5031 enum insn_code icode;
5033 tab = unsignedp ? ufixtrunc_optab : sfixtrunc_optab;
5034 icode = convert_optab_handler (tab, fixmode, fltmode)->insn_code;
5035 if (icode != CODE_FOR_nothing)
5041 /* FIXME: This requires a port to define both FIX and FTRUNC pattern
5042 for this to work. We need to rework the fix* and ftrunc* patterns
5043 and documentation. */
5044 tab = unsignedp ? ufix_optab : sfix_optab;
5045 icode = convert_optab_handler (tab, fixmode, fltmode)->insn_code;
5046 if (icode != CODE_FOR_nothing
5047 && optab_handler (ftrunc_optab, fltmode)->insn_code != CODE_FOR_nothing)
5054 return CODE_FOR_nothing;
5057 static enum insn_code
5058 can_float_p (enum machine_mode fltmode, enum machine_mode fixmode,
5063 tab = unsignedp ? ufloat_optab : sfloat_optab;
5064 return convert_optab_handler (tab, fltmode, fixmode)->insn_code;
5067 /* Generate code to convert FROM to floating point
5068 and store in TO. FROM must be fixed point and not VOIDmode.
5069 UNSIGNEDP nonzero means regard FROM as unsigned.
5070 Normally this is done by correcting the final value
5071 if it is negative. */
5074 expand_float (rtx to, rtx from, int unsignedp)
5076 enum insn_code icode;
5078 enum machine_mode fmode, imode;
5079 bool can_do_signed = false;
5081 /* Crash now, because we won't be able to decide which mode to use. */
5082 gcc_assert (GET_MODE (from) != VOIDmode);
5084 /* Look for an insn to do the conversion. Do it in the specified
5085 modes if possible; otherwise convert either input, output or both to
5086 wider mode. If the integer mode is wider than the mode of FROM,
5087 we can do the conversion signed even if the input is unsigned. */
5089 for (fmode = GET_MODE (to); fmode != VOIDmode;
5090 fmode = GET_MODE_WIDER_MODE (fmode))
5091 for (imode = GET_MODE (from); imode != VOIDmode;
5092 imode = GET_MODE_WIDER_MODE (imode))
5094 int doing_unsigned = unsignedp;
5096 if (fmode != GET_MODE (to)
5097 && significand_size (fmode) < GET_MODE_BITSIZE (GET_MODE (from)))
5100 icode = can_float_p (fmode, imode, unsignedp);
5101 if (icode == CODE_FOR_nothing && unsignedp)
5103 enum insn_code scode = can_float_p (fmode, imode, 0);
5104 if (scode != CODE_FOR_nothing)
5105 can_do_signed = true;
5106 if (imode != GET_MODE (from))
5107 icode = scode, doing_unsigned = 0;
5110 if (icode != CODE_FOR_nothing)
5112 if (imode != GET_MODE (from))
5113 from = convert_to_mode (imode, from, unsignedp);
5115 if (fmode != GET_MODE (to))
5116 target = gen_reg_rtx (fmode);
5118 emit_unop_insn (icode, target, from,
5119 doing_unsigned ? UNSIGNED_FLOAT : FLOAT);
5122 convert_move (to, target, 0);
5127 /* Unsigned integer, and no way to convert directly. Convert as signed,
5128 then unconditionally adjust the result. For decimal float values we
5129 do this only if we have already determined that a signed conversion
5130 provides sufficient accuracy. */
5131 if (unsignedp && (can_do_signed || !DECIMAL_FLOAT_MODE_P (GET_MODE (to))))
5133 rtx label = gen_label_rtx ();
5135 REAL_VALUE_TYPE offset;
5137 /* Look for a usable floating mode FMODE wider than the source and at
5138 least as wide as the target. Using FMODE will avoid rounding woes
5139 with unsigned values greater than the signed maximum value. */
5141 for (fmode = GET_MODE (to); fmode != VOIDmode;
5142 fmode = GET_MODE_WIDER_MODE (fmode))
5143 if (GET_MODE_BITSIZE (GET_MODE (from)) < GET_MODE_BITSIZE (fmode)
5144 && can_float_p (fmode, GET_MODE (from), 0) != CODE_FOR_nothing)
5147 if (fmode == VOIDmode)
5149 /* There is no such mode. Pretend the target is wide enough. */
5150 fmode = GET_MODE (to);
5152 /* Avoid double-rounding when TO is narrower than FROM. */
5153 if ((significand_size (fmode) + 1)
5154 < GET_MODE_BITSIZE (GET_MODE (from)))
5157 rtx neglabel = gen_label_rtx ();
5159 /* Don't use TARGET if it isn't a register, is a hard register,
5160 or is the wrong mode. */
5162 || REGNO (target) < FIRST_PSEUDO_REGISTER
5163 || GET_MODE (target) != fmode)
5164 target = gen_reg_rtx (fmode);
5166 imode = GET_MODE (from);
5167 do_pending_stack_adjust ();
5169 /* Test whether the sign bit is set. */
5170 emit_cmp_and_jump_insns (from, const0_rtx, LT, NULL_RTX, imode,
5173 /* The sign bit is not set. Convert as signed. */
5174 expand_float (target, from, 0);
5175 emit_jump_insn (gen_jump (label));
5178 /* The sign bit is set.
5179 Convert to a usable (positive signed) value by shifting right
5180 one bit, while remembering if a nonzero bit was shifted
5181 out; i.e., compute (from & 1) | (from >> 1). */
5183 emit_label (neglabel);
5184 temp = expand_binop (imode, and_optab, from, const1_rtx,
5185 NULL_RTX, 1, OPTAB_LIB_WIDEN);
5186 temp1 = expand_shift (RSHIFT_EXPR, imode, from, integer_one_node,
5188 temp = expand_binop (imode, ior_optab, temp, temp1, temp, 1,
5190 expand_float (target, temp, 0);
5192 /* Multiply by 2 to undo the shift above. */
5193 temp = expand_binop (fmode, add_optab, target, target,
5194 target, 0, OPTAB_LIB_WIDEN);
5196 emit_move_insn (target, temp);
5198 do_pending_stack_adjust ();
5204 /* If we are about to do some arithmetic to correct for an
5205 unsigned operand, do it in a pseudo-register. */
5207 if (GET_MODE (to) != fmode
5208 || !REG_P (to) || REGNO (to) < FIRST_PSEUDO_REGISTER)
5209 target = gen_reg_rtx (fmode);
5211 /* Convert as signed integer to floating. */
5212 expand_float (target, from, 0);
5214 /* If FROM is negative (and therefore TO is negative),
5215 correct its value by 2**bitwidth. */
5217 do_pending_stack_adjust ();
5218 emit_cmp_and_jump_insns (from, const0_rtx, GE, NULL_RTX, GET_MODE (from),
5222 real_2expN (&offset, GET_MODE_BITSIZE (GET_MODE (from)), fmode);
5223 temp = expand_binop (fmode, add_optab, target,
5224 CONST_DOUBLE_FROM_REAL_VALUE (offset, fmode),
5225 target, 0, OPTAB_LIB_WIDEN);
5227 emit_move_insn (target, temp);
5229 do_pending_stack_adjust ();
5234 /* No hardware instruction available; call a library routine. */
5239 convert_optab tab = unsignedp ? ufloat_optab : sfloat_optab;
5241 if (GET_MODE_SIZE (GET_MODE (from)) < GET_MODE_SIZE (SImode))
5242 from = convert_to_mode (SImode, from, unsignedp);
5244 libfunc = convert_optab_libfunc (tab, GET_MODE (to), GET_MODE (from));
5245 gcc_assert (libfunc);
5249 value = emit_library_call_value (libfunc, NULL_RTX, LCT_CONST,
5250 GET_MODE (to), 1, from,
5252 insns = get_insns ();
5255 emit_libcall_block (insns, target, value,
5256 gen_rtx_FLOAT (GET_MODE (to), from));
5261 /* Copy result to requested destination
5262 if we have been computing in a temp location. */
5266 if (GET_MODE (target) == GET_MODE (to))
5267 emit_move_insn (to, target);
5269 convert_move (to, target, 0);
5273 /* Generate code to convert FROM to fixed point and store in TO. FROM
5274 must be floating point. */
5277 expand_fix (rtx to, rtx from, int unsignedp)
5279 enum insn_code icode;
5281 enum machine_mode fmode, imode;
5284 /* We first try to find a pair of modes, one real and one integer, at
5285 least as wide as FROM and TO, respectively, in which we can open-code
5286 this conversion. If the integer mode is wider than the mode of TO,
5287 we can do the conversion either signed or unsigned. */
5289 for (fmode = GET_MODE (from); fmode != VOIDmode;
5290 fmode = GET_MODE_WIDER_MODE (fmode))
5291 for (imode = GET_MODE (to); imode != VOIDmode;
5292 imode = GET_MODE_WIDER_MODE (imode))
5294 int doing_unsigned = unsignedp;
5296 icode = can_fix_p (imode, fmode, unsignedp, &must_trunc);
5297 if (icode == CODE_FOR_nothing && imode != GET_MODE (to) && unsignedp)
5298 icode = can_fix_p (imode, fmode, 0, &must_trunc), doing_unsigned = 0;
5300 if (icode != CODE_FOR_nothing)
5302 if (fmode != GET_MODE (from))
5303 from = convert_to_mode (fmode, from, 0);
5307 rtx temp = gen_reg_rtx (GET_MODE (from));
5308 from = expand_unop (GET_MODE (from), ftrunc_optab, from,
5312 if (imode != GET_MODE (to))
5313 target = gen_reg_rtx (imode);
5315 emit_unop_insn (icode, target, from,
5316 doing_unsigned ? UNSIGNED_FIX : FIX);
5318 convert_move (to, target, unsignedp);
5323 /* For an unsigned conversion, there is one more way to do it.
5324 If we have a signed conversion, we generate code that compares
5325 the real value to the largest representable positive number. If if
5326 is smaller, the conversion is done normally. Otherwise, subtract
5327 one plus the highest signed number, convert, and add it back.
5329 We only need to check all real modes, since we know we didn't find
5330 anything with a wider integer mode.
5332 This code used to extend FP value into mode wider than the destination.
5333 This is needed for decimal float modes which cannot accurately
5334 represent one plus the highest signed number of the same size, but
5335 not for binary modes. Consider, for instance conversion from SFmode
5338 The hot path through the code is dealing with inputs smaller than 2^63
5339 and doing just the conversion, so there is no bits to lose.
5341 In the other path we know the value is positive in the range 2^63..2^64-1
5342 inclusive. (as for other input overflow happens and result is undefined)
5343 So we know that the most important bit set in mantissa corresponds to
5344 2^63. The subtraction of 2^63 should not generate any rounding as it
5345 simply clears out that bit. The rest is trivial. */
5347 if (unsignedp && GET_MODE_BITSIZE (GET_MODE (to)) <= HOST_BITS_PER_WIDE_INT)
5348 for (fmode = GET_MODE (from); fmode != VOIDmode;
5349 fmode = GET_MODE_WIDER_MODE (fmode))
5350 if (CODE_FOR_nothing != can_fix_p (GET_MODE (to), fmode, 0, &must_trunc)
5351 && (!DECIMAL_FLOAT_MODE_P (fmode)
5352 || GET_MODE_BITSIZE (fmode) > GET_MODE_BITSIZE (GET_MODE (to))))
5355 REAL_VALUE_TYPE offset;
5356 rtx limit, lab1, lab2, insn;
5358 bitsize = GET_MODE_BITSIZE (GET_MODE (to));
5359 real_2expN (&offset, bitsize - 1, fmode);
5360 limit = CONST_DOUBLE_FROM_REAL_VALUE (offset, fmode);
5361 lab1 = gen_label_rtx ();
5362 lab2 = gen_label_rtx ();
5364 if (fmode != GET_MODE (from))
5365 from = convert_to_mode (fmode, from, 0);
5367 /* See if we need to do the subtraction. */
5368 do_pending_stack_adjust ();
5369 emit_cmp_and_jump_insns (from, limit, GE, NULL_RTX, GET_MODE (from),
5372 /* If not, do the signed "fix" and branch around fixup code. */
5373 expand_fix (to, from, 0);
5374 emit_jump_insn (gen_jump (lab2));
5377 /* Otherwise, subtract 2**(N-1), convert to signed number,
5378 then add 2**(N-1). Do the addition using XOR since this
5379 will often generate better code. */
5381 target = expand_binop (GET_MODE (from), sub_optab, from, limit,
5382 NULL_RTX, 0, OPTAB_LIB_WIDEN);
5383 expand_fix (to, target, 0);
5384 target = expand_binop (GET_MODE (to), xor_optab, to,
5386 ((HOST_WIDE_INT) 1 << (bitsize - 1),
5388 to, 1, OPTAB_LIB_WIDEN);
5391 emit_move_insn (to, target);
5395 if (optab_handler (mov_optab, GET_MODE (to))->insn_code
5396 != CODE_FOR_nothing)
5398 /* Make a place for a REG_NOTE and add it. */
5399 insn = emit_move_insn (to, to);
5400 set_unique_reg_note (insn,
5402 gen_rtx_fmt_e (UNSIGNED_FIX,
5410 /* We can't do it with an insn, so use a library call. But first ensure
5411 that the mode of TO is at least as wide as SImode, since those are the
5412 only library calls we know about. */
5414 if (GET_MODE_SIZE (GET_MODE (to)) < GET_MODE_SIZE (SImode))
5416 target = gen_reg_rtx (SImode);
5418 expand_fix (target, from, unsignedp);
5426 convert_optab tab = unsignedp ? ufix_optab : sfix_optab;
5427 libfunc = convert_optab_libfunc (tab, GET_MODE (to), GET_MODE (from));
5428 gcc_assert (libfunc);
5432 value = emit_library_call_value (libfunc, NULL_RTX, LCT_CONST,
5433 GET_MODE (to), 1, from,
5435 insns = get_insns ();
5438 emit_libcall_block (insns, target, value,
5439 gen_rtx_fmt_e (unsignedp ? UNSIGNED_FIX : FIX,
5440 GET_MODE (to), from));
5445 if (GET_MODE (to) == GET_MODE (target))
5446 emit_move_insn (to, target);
5448 convert_move (to, target, 0);
5452 /* Generate code to convert FROM or TO a fixed-point.
5453 If UINTP is true, either TO or FROM is an unsigned integer.
5454 If SATP is true, we need to saturate the result. */
5457 expand_fixed_convert (rtx to, rtx from, int uintp, int satp)
5459 enum machine_mode to_mode = GET_MODE (to);
5460 enum machine_mode from_mode = GET_MODE (from);
5462 enum rtx_code this_code;
5463 enum insn_code code;
5467 if (to_mode == from_mode)
5469 emit_move_insn (to, from);
5475 tab = satp ? satfractuns_optab : fractuns_optab;
5476 this_code = satp ? UNSIGNED_SAT_FRACT : UNSIGNED_FRACT_CONVERT;
5480 tab = satp ? satfract_optab : fract_optab;
5481 this_code = satp ? SAT_FRACT : FRACT_CONVERT;
5483 code = tab->handlers[to_mode][from_mode].insn_code;
5484 if (code != CODE_FOR_nothing)
5486 emit_unop_insn (code, to, from, this_code);
5490 libfunc = convert_optab_libfunc (tab, to_mode, from_mode);
5491 gcc_assert (libfunc);
5494 value = emit_library_call_value (libfunc, NULL_RTX, LCT_CONST, to_mode,
5495 1, from, from_mode);
5496 insns = get_insns ();
5499 emit_libcall_block (insns, to, value,
5500 gen_rtx_fmt_e (tab->code, to_mode, from));
5503 /* Generate code to convert FROM to fixed point and store in TO. FROM
5504 must be floating point, TO must be signed. Use the conversion optab
5505 TAB to do the conversion. */
5508 expand_sfix_optab (rtx to, rtx from, convert_optab tab)
5510 enum insn_code icode;
5512 enum machine_mode fmode, imode;
5514 /* We first try to find a pair of modes, one real and one integer, at
5515 least as wide as FROM and TO, respectively, in which we can open-code
5516 this conversion. If the integer mode is wider than the mode of TO,
5517 we can do the conversion either signed or unsigned. */
5519 for (fmode = GET_MODE (from); fmode != VOIDmode;
5520 fmode = GET_MODE_WIDER_MODE (fmode))
5521 for (imode = GET_MODE (to); imode != VOIDmode;
5522 imode = GET_MODE_WIDER_MODE (imode))
5524 icode = convert_optab_handler (tab, imode, fmode)->insn_code;
5525 if (icode != CODE_FOR_nothing)
5527 if (fmode != GET_MODE (from))
5528 from = convert_to_mode (fmode, from, 0);
5530 if (imode != GET_MODE (to))
5531 target = gen_reg_rtx (imode);
5533 emit_unop_insn (icode, target, from, UNKNOWN);
5535 convert_move (to, target, 0);
5543 /* Report whether we have an instruction to perform the operation
5544 specified by CODE on operands of mode MODE. */
5546 have_insn_for (enum rtx_code code, enum machine_mode mode)
5548 return (code_to_optab[(int) code] != 0
5549 && (optab_handler (code_to_optab[(int) code], mode)->insn_code
5550 != CODE_FOR_nothing));
5553 /* Create a blank optab. */
5558 optab op = xcalloc (sizeof (struct optab), 1);
5560 for (i = 0; i < NUM_MACHINE_MODES; i++)
5561 optab_handler (op, i)->insn_code = CODE_FOR_nothing;
5566 static convert_optab
5567 new_convert_optab (void)
5570 convert_optab op = xcalloc (sizeof (struct convert_optab), 1);
5572 for (i = 0; i < NUM_MACHINE_MODES; i++)
5573 for (j = 0; j < NUM_MACHINE_MODES; j++)
5574 convert_optab_handler (op, i, j)->insn_code = CODE_FOR_nothing;
5579 /* Same, but fill in its code as CODE, and write it into the
5580 code_to_optab table. */
5582 init_optab (enum rtx_code code)
5584 optab op = new_optab ();
5586 code_to_optab[(int) code] = op;
5590 /* Same, but fill in its code as CODE, and do _not_ write it into
5591 the code_to_optab table. */
5593 init_optabv (enum rtx_code code)
5595 optab op = new_optab ();
5600 /* Conversion optabs never go in the code_to_optab table. */
5601 static inline convert_optab
5602 init_convert_optab (enum rtx_code code)
5604 convert_optab op = new_convert_optab ();
5609 /* Initialize the libfunc fields of an entire group of entries in some
5610 optab. Each entry is set equal to a string consisting of a leading
5611 pair of underscores followed by a generic operation name followed by
5612 a mode name (downshifted to lowercase) followed by a single character
5613 representing the number of operands for the given operation (which is
5614 usually one of the characters '2', '3', or '4').
5616 OPTABLE is the table in which libfunc fields are to be initialized.
5617 OPNAME is the generic (string) name of the operation.
5618 SUFFIX is the character which specifies the number of operands for
5619 the given generic operation.
5620 MODE is the mode to generate for.
5624 gen_libfunc (optab optable, const char *opname, int suffix, enum machine_mode mode)
5626 unsigned opname_len = strlen (opname);
5627 const char *mname = GET_MODE_NAME (mode);
5628 unsigned mname_len = strlen (mname);
5629 char *libfunc_name = alloca (2 + opname_len + mname_len + 1 + 1);
5636 for (q = opname; *q; )
5638 for (q = mname; *q; q++)
5639 *p++ = TOLOWER (*q);
5643 set_optab_libfunc (optable, mode,
5644 ggc_alloc_string (libfunc_name, p - libfunc_name));
5647 /* Like gen_libfunc, but verify that integer operation is involved. */
5650 gen_int_libfunc (optab optable, const char *opname, char suffix,
5651 enum machine_mode mode)
5653 int maxsize = 2 * BITS_PER_WORD;
5655 if (GET_MODE_CLASS (mode) != MODE_INT)
5657 if (maxsize < LONG_LONG_TYPE_SIZE)
5658 maxsize = LONG_LONG_TYPE_SIZE;
5659 if (GET_MODE_CLASS (mode) != MODE_INT
5660 || mode < word_mode || GET_MODE_BITSIZE (mode) > maxsize)
5662 gen_libfunc (optable, opname, suffix, mode);
5665 /* Like gen_libfunc, but verify that FP and set decimal prefix if needed. */
5668 gen_fp_libfunc (optab optable, const char *opname, char suffix,
5669 enum machine_mode mode)
5673 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
5674 gen_libfunc (optable, opname, suffix, mode);
5675 if (DECIMAL_FLOAT_MODE_P (mode))
5677 dec_opname = alloca (sizeof (DECIMAL_PREFIX) + strlen (opname));
5678 /* For BID support, change the name to have either a bid_ or dpd_ prefix
5679 depending on the low level floating format used. */
5680 memcpy (dec_opname, DECIMAL_PREFIX, sizeof (DECIMAL_PREFIX) - 1);
5681 strcpy (dec_opname + sizeof (DECIMAL_PREFIX) - 1, opname);
5682 gen_libfunc (optable, dec_opname, suffix, mode);
5686 /* Like gen_libfunc, but verify that fixed-point operation is involved. */
5689 gen_fixed_libfunc (optab optable, const char *opname, char suffix,
5690 enum machine_mode mode)
5692 if (!ALL_FIXED_POINT_MODE_P (mode))
5694 gen_libfunc (optable, opname, suffix, mode);
5697 /* Like gen_libfunc, but verify that signed fixed-point operation is
5701 gen_signed_fixed_libfunc (optab optable, const char *opname, char suffix,
5702 enum machine_mode mode)
5704 if (!SIGNED_FIXED_POINT_MODE_P (mode))
5706 gen_libfunc (optable, opname, suffix, mode);
5709 /* Like gen_libfunc, but verify that unsigned fixed-point operation is
5713 gen_unsigned_fixed_libfunc (optab optable, const char *opname, char suffix,
5714 enum machine_mode mode)
5716 if (!UNSIGNED_FIXED_POINT_MODE_P (mode))
5718 gen_libfunc (optable, opname, suffix, mode);
5721 /* Like gen_libfunc, but verify that FP or INT operation is involved. */
5724 gen_int_fp_libfunc (optab optable, const char *name, char suffix,
5725 enum machine_mode mode)
5727 if (DECIMAL_FLOAT_MODE_P (mode) || GET_MODE_CLASS (mode) == MODE_FLOAT)
5728 gen_fp_libfunc (optable, name, suffix, mode);
5729 if (INTEGRAL_MODE_P (mode))
5730 gen_int_libfunc (optable, name, suffix, mode);
5733 /* Like gen_libfunc, but verify that FP or INT operation is involved
5734 and add 'v' suffix for integer operation. */
5737 gen_intv_fp_libfunc (optab optable, const char *name, char suffix,
5738 enum machine_mode mode)
5740 if (DECIMAL_FLOAT_MODE_P (mode) || GET_MODE_CLASS (mode) == MODE_FLOAT)
5741 gen_fp_libfunc (optable, name, suffix, mode);
5742 if (GET_MODE_CLASS (mode) == MODE_INT)
5744 int len = strlen (name);
5745 char *v_name = alloca (len + 2);
5746 strcpy (v_name, name);
5748 v_name[len + 1] = 0;
5749 gen_int_libfunc (optable, v_name, suffix, mode);
5753 /* Like gen_libfunc, but verify that FP or INT or FIXED operation is
5757 gen_int_fp_fixed_libfunc (optab optable, const char *name, char suffix,
5758 enum machine_mode mode)
5760 if (DECIMAL_FLOAT_MODE_P (mode) || GET_MODE_CLASS (mode) == MODE_FLOAT)
5761 gen_fp_libfunc (optable, name, suffix, mode);
5762 if (INTEGRAL_MODE_P (mode))
5763 gen_int_libfunc (optable, name, suffix, mode);
5764 if (ALL_FIXED_POINT_MODE_P (mode))
5765 gen_fixed_libfunc (optable, name, suffix, mode);
5768 /* Like gen_libfunc, but verify that FP or INT or signed FIXED operation is
5772 gen_int_fp_signed_fixed_libfunc (optab optable, const char *name, char suffix,
5773 enum machine_mode mode)
5775 if (DECIMAL_FLOAT_MODE_P (mode) || GET_MODE_CLASS (mode) == MODE_FLOAT)
5776 gen_fp_libfunc (optable, name, suffix, mode);
5777 if (INTEGRAL_MODE_P (mode))
5778 gen_int_libfunc (optable, name, suffix, mode);
5779 if (SIGNED_FIXED_POINT_MODE_P (mode))
5780 gen_signed_fixed_libfunc (optable, name, suffix, mode);
5783 /* Like gen_libfunc, but verify that INT or FIXED operation is
5787 gen_int_fixed_libfunc (optab optable, const char *name, char suffix,
5788 enum machine_mode mode)
5790 if (INTEGRAL_MODE_P (mode))
5791 gen_int_libfunc (optable, name, suffix, mode);
5792 if (ALL_FIXED_POINT_MODE_P (mode))
5793 gen_fixed_libfunc (optable, name, suffix, mode);
5796 /* Like gen_libfunc, but verify that INT or signed FIXED operation is
5800 gen_int_signed_fixed_libfunc (optab optable, const char *name, char suffix,
5801 enum machine_mode mode)
5803 if (INTEGRAL_MODE_P (mode))
5804 gen_int_libfunc (optable, name, suffix, mode);
5805 if (SIGNED_FIXED_POINT_MODE_P (mode))
5806 gen_signed_fixed_libfunc (optable, name, suffix, mode);
5809 /* Like gen_libfunc, but verify that INT or unsigned FIXED operation is
5813 gen_int_unsigned_fixed_libfunc (optab optable, const char *name, char suffix,
5814 enum machine_mode mode)
5816 if (INTEGRAL_MODE_P (mode))
5817 gen_int_libfunc (optable, name, suffix, mode);
5818 if (UNSIGNED_FIXED_POINT_MODE_P (mode))
5819 gen_unsigned_fixed_libfunc (optable, name, suffix, mode);
5822 /* Initialize the libfunc fields of an entire group of entries of an
5823 inter-mode-class conversion optab. The string formation rules are
5824 similar to the ones for init_libfuncs, above, but instead of having
5825 a mode name and an operand count these functions have two mode names
5826 and no operand count. */
5829 gen_interclass_conv_libfunc (convert_optab tab,
5831 enum machine_mode tmode,
5832 enum machine_mode fmode)
5834 size_t opname_len = strlen (opname);
5835 size_t mname_len = 0;
5837 const char *fname, *tname;
5839 char *libfunc_name, *suffix;
5840 char *nondec_name, *dec_name, *nondec_suffix, *dec_suffix;
5843 /* If this is a decimal conversion, add the current BID vs. DPD prefix that
5844 depends on which underlying decimal floating point format is used. */
5845 const size_t dec_len = sizeof (DECIMAL_PREFIX) - 1;
5847 mname_len = strlen (GET_MODE_NAME (tmode)) + strlen (GET_MODE_NAME (fmode));
5849 nondec_name = alloca (2 + opname_len + mname_len + 1 + 1);
5850 nondec_name[0] = '_';
5851 nondec_name[1] = '_';
5852 memcpy (&nondec_name[2], opname, opname_len);
5853 nondec_suffix = nondec_name + opname_len + 2;
5855 dec_name = alloca (2 + dec_len + opname_len + mname_len + 1 + 1);
5858 memcpy (&dec_name[2], DECIMAL_PREFIX, dec_len);
5859 memcpy (&dec_name[2+dec_len], opname, opname_len);
5860 dec_suffix = dec_name + dec_len + opname_len + 2;
5862 fname = GET_MODE_NAME (fmode);
5863 tname = GET_MODE_NAME (tmode);
5865 if (DECIMAL_FLOAT_MODE_P(fmode) || DECIMAL_FLOAT_MODE_P(tmode))
5867 libfunc_name = dec_name;
5868 suffix = dec_suffix;
5872 libfunc_name = nondec_name;
5873 suffix = nondec_suffix;
5877 for (q = fname; *q; p++, q++)
5879 for (q = tname; *q; p++, q++)
5884 set_conv_libfunc (tab, tmode, fmode,
5885 ggc_alloc_string (libfunc_name, p - libfunc_name));
5888 /* Same as gen_interclass_conv_libfunc but verify that we are producing
5889 int->fp conversion. */
5892 gen_int_to_fp_conv_libfunc (convert_optab tab,
5894 enum machine_mode tmode,
5895 enum machine_mode fmode)
5897 if (GET_MODE_CLASS (fmode) != MODE_INT)
5899 if (GET_MODE_CLASS (tmode) != MODE_FLOAT && !DECIMAL_FLOAT_MODE_P (tmode))
5901 gen_interclass_conv_libfunc (tab, opname, tmode, fmode);
5904 /* ufloat_optab is special by using floatun for FP and floatuns decimal fp
5908 gen_ufloat_conv_libfunc (convert_optab tab,
5909 const char *opname ATTRIBUTE_UNUSED,
5910 enum machine_mode tmode,
5911 enum machine_mode fmode)
5913 if (DECIMAL_FLOAT_MODE_P (tmode))
5914 gen_int_to_fp_conv_libfunc (tab, "floatuns", tmode, fmode);
5916 gen_int_to_fp_conv_libfunc (tab, "floatun", tmode, fmode);
5919 /* Same as gen_interclass_conv_libfunc but verify that we are producing
5920 fp->int conversion. */
5923 gen_int_to_fp_nondecimal_conv_libfunc (convert_optab tab,
5925 enum machine_mode tmode,
5926 enum machine_mode fmode)
5928 if (GET_MODE_CLASS (fmode) != MODE_INT)
5930 if (GET_MODE_CLASS (tmode) != MODE_FLOAT)
5932 gen_interclass_conv_libfunc (tab, opname, tmode, fmode);
5935 /* Same as gen_interclass_conv_libfunc but verify that we are producing
5936 fp->int conversion with no decimal floating point involved. */
5939 gen_fp_to_int_conv_libfunc (convert_optab tab,
5941 enum machine_mode tmode,
5942 enum machine_mode fmode)
5944 if (GET_MODE_CLASS (fmode) != MODE_FLOAT && !DECIMAL_FLOAT_MODE_P (fmode))
5946 if (GET_MODE_CLASS (tmode) != MODE_INT)
5948 gen_interclass_conv_libfunc (tab, opname, tmode, fmode);
5951 /* Initialize the libfunc fiels of an of an intra-mode-class conversion optab.
5952 The string formation rules are
5953 similar to the ones for init_libfunc, above. */
5956 gen_intraclass_conv_libfunc (convert_optab tab, const char *opname,
5957 enum machine_mode tmode, enum machine_mode fmode)
5959 size_t opname_len = strlen (opname);
5960 size_t mname_len = 0;
5962 const char *fname, *tname;
5964 char *nondec_name, *dec_name, *nondec_suffix, *dec_suffix;
5965 char *libfunc_name, *suffix;
5968 /* If this is a decimal conversion, add the current BID vs. DPD prefix that
5969 depends on which underlying decimal floating point format is used. */
5970 const size_t dec_len = sizeof (DECIMAL_PREFIX) - 1;
5972 mname_len = strlen (GET_MODE_NAME (tmode)) + strlen (GET_MODE_NAME (fmode));
5974 nondec_name = alloca (2 + opname_len + mname_len + 1 + 1);
5975 nondec_name[0] = '_';
5976 nondec_name[1] = '_';
5977 memcpy (&nondec_name[2], opname, opname_len);
5978 nondec_suffix = nondec_name + opname_len + 2;
5980 dec_name = alloca (2 + dec_len + opname_len + mname_len + 1 + 1);
5983 memcpy (&dec_name[2], DECIMAL_PREFIX, dec_len);
5984 memcpy (&dec_name[2 + dec_len], opname, opname_len);
5985 dec_suffix = dec_name + dec_len + opname_len + 2;
5987 fname = GET_MODE_NAME (fmode);
5988 tname = GET_MODE_NAME (tmode);
5990 if (DECIMAL_FLOAT_MODE_P(fmode) || DECIMAL_FLOAT_MODE_P(tmode))
5992 libfunc_name = dec_name;
5993 suffix = dec_suffix;
5997 libfunc_name = nondec_name;
5998 suffix = nondec_suffix;
6002 for (q = fname; *q; p++, q++)
6004 for (q = tname; *q; p++, q++)
6010 set_conv_libfunc (tab, tmode, fmode,
6011 ggc_alloc_string (libfunc_name, p - libfunc_name));
6014 /* Pick proper libcall for trunc_optab. We need to chose if we do
6015 truncation or extension and interclass or intraclass. */
6018 gen_trunc_conv_libfunc (convert_optab tab,
6020 enum machine_mode tmode,
6021 enum machine_mode fmode)
6023 if (GET_MODE_CLASS (tmode) != MODE_FLOAT && !DECIMAL_FLOAT_MODE_P (tmode))
6025 if (GET_MODE_CLASS (fmode) != MODE_FLOAT && !DECIMAL_FLOAT_MODE_P (fmode))
6030 if ((GET_MODE_CLASS (tmode) == MODE_FLOAT && DECIMAL_FLOAT_MODE_P (fmode))
6031 || (GET_MODE_CLASS (fmode) == MODE_FLOAT && DECIMAL_FLOAT_MODE_P (tmode)))
6032 gen_interclass_conv_libfunc (tab, opname, tmode, fmode);
6034 if (GET_MODE_PRECISION (fmode) <= GET_MODE_PRECISION (tmode))
6037 if ((GET_MODE_CLASS (tmode) == MODE_FLOAT
6038 && GET_MODE_CLASS (fmode) == MODE_FLOAT)
6039 || (DECIMAL_FLOAT_MODE_P (fmode) && DECIMAL_FLOAT_MODE_P (tmode)))
6040 gen_intraclass_conv_libfunc (tab, opname, tmode, fmode);
6043 /* Pick proper libcall for extend_optab. We need to chose if we do
6044 truncation or extension and interclass or intraclass. */
6047 gen_extend_conv_libfunc (convert_optab tab,
6048 const char *opname ATTRIBUTE_UNUSED,
6049 enum machine_mode tmode,
6050 enum machine_mode fmode)
6052 if (GET_MODE_CLASS (tmode) != MODE_FLOAT && !DECIMAL_FLOAT_MODE_P (tmode))
6054 if (GET_MODE_CLASS (fmode) != MODE_FLOAT && !DECIMAL_FLOAT_MODE_P (fmode))
6059 if ((GET_MODE_CLASS (tmode) == MODE_FLOAT && DECIMAL_FLOAT_MODE_P (fmode))
6060 || (GET_MODE_CLASS (fmode) == MODE_FLOAT && DECIMAL_FLOAT_MODE_P (tmode)))
6061 gen_interclass_conv_libfunc (tab, opname, tmode, fmode);
6063 if (GET_MODE_PRECISION (fmode) > GET_MODE_PRECISION (tmode))
6066 if ((GET_MODE_CLASS (tmode) == MODE_FLOAT
6067 && GET_MODE_CLASS (fmode) == MODE_FLOAT)
6068 || (DECIMAL_FLOAT_MODE_P (fmode) && DECIMAL_FLOAT_MODE_P (tmode)))
6069 gen_intraclass_conv_libfunc (tab, opname, tmode, fmode);
6072 /* Pick proper libcall for fract_optab. We need to chose if we do
6073 interclass or intraclass. */
6076 gen_fract_conv_libfunc (convert_optab tab,
6078 enum machine_mode tmode,
6079 enum machine_mode fmode)
6083 if (!(ALL_FIXED_POINT_MODE_P (tmode) || ALL_FIXED_POINT_MODE_P (fmode)))
6086 if (GET_MODE_CLASS (tmode) == GET_MODE_CLASS (fmode))
6087 gen_intraclass_conv_libfunc (tab, opname, tmode, fmode);
6089 gen_interclass_conv_libfunc (tab, opname, tmode, fmode);
6092 /* Pick proper libcall for fractuns_optab. */
6095 gen_fractuns_conv_libfunc (convert_optab tab,
6097 enum machine_mode tmode,
6098 enum machine_mode fmode)
6102 /* One mode must be a fixed-point mode, and the other must be an integer
6104 if (!((ALL_FIXED_POINT_MODE_P (tmode) && GET_MODE_CLASS (fmode) == MODE_INT)
6105 || (ALL_FIXED_POINT_MODE_P (fmode)
6106 && GET_MODE_CLASS (tmode) == MODE_INT)))
6109 gen_interclass_conv_libfunc (tab, opname, tmode, fmode);
6112 /* Pick proper libcall for satfract_optab. We need to chose if we do
6113 interclass or intraclass. */
6116 gen_satfract_conv_libfunc (convert_optab tab,
6118 enum machine_mode tmode,
6119 enum machine_mode fmode)
6123 /* TMODE must be a fixed-point mode. */
6124 if (!ALL_FIXED_POINT_MODE_P (tmode))
6127 if (GET_MODE_CLASS (tmode) == GET_MODE_CLASS (fmode))
6128 gen_intraclass_conv_libfunc (tab, opname, tmode, fmode);
6130 gen_interclass_conv_libfunc (tab, opname, tmode, fmode);
6133 /* Pick proper libcall for satfractuns_optab. */
6136 gen_satfractuns_conv_libfunc (convert_optab tab,
6138 enum machine_mode tmode,
6139 enum machine_mode fmode)
6143 /* TMODE must be a fixed-point mode, and FMODE must be an integer mode. */
6144 if (!(ALL_FIXED_POINT_MODE_P (tmode) && GET_MODE_CLASS (fmode) == MODE_INT))
6147 gen_interclass_conv_libfunc (tab, opname, tmode, fmode);
6151 init_one_libfunc (const char *name)
6155 /* Create a FUNCTION_DECL that can be passed to
6156 targetm.encode_section_info. */
6157 /* ??? We don't have any type information except for this is
6158 a function. Pretend this is "int foo()". */
6159 tree decl = build_decl (FUNCTION_DECL, get_identifier (name),
6160 build_function_type (integer_type_node, NULL_TREE));
6161 DECL_ARTIFICIAL (decl) = 1;
6162 DECL_EXTERNAL (decl) = 1;
6163 TREE_PUBLIC (decl) = 1;
6165 symbol = XEXP (DECL_RTL (decl), 0);
6167 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
6168 are the flags assigned by targetm.encode_section_info. */
6169 SET_SYMBOL_REF_DECL (symbol, 0);
6174 /* Call this to reset the function entry for one optab (OPTABLE) in mode
6175 MODE to NAME, which should be either 0 or a string constant. */
6177 set_optab_libfunc (optab optable, enum machine_mode mode, const char *name)
6180 struct libfunc_entry e;
6181 struct libfunc_entry **slot;
6182 e.optab = (size_t) (optab_table[0] - optable);
6187 val = init_one_libfunc (name);
6190 slot = (struct libfunc_entry **) htab_find_slot (libfunc_hash, &e, INSERT);
6192 *slot = ggc_alloc (sizeof (struct libfunc_entry));
6193 (*slot)->optab = (size_t) (optab_table[0] - optable);
6194 (*slot)->mode1 = mode;
6195 (*slot)->mode2 = VOIDmode;
6196 (*slot)->libfunc = val;
6199 /* Call this to reset the function entry for one conversion optab
6200 (OPTABLE) from mode FMODE to mode TMODE to NAME, which should be
6201 either 0 or a string constant. */
6203 set_conv_libfunc (convert_optab optable, enum machine_mode tmode,
6204 enum machine_mode fmode, const char *name)
6207 struct libfunc_entry e;
6208 struct libfunc_entry **slot;
6209 e.optab = (size_t) (convert_optab_table[0] - optable);
6214 val = init_one_libfunc (name);
6217 slot = (struct libfunc_entry **) htab_find_slot (libfunc_hash, &e, INSERT);
6219 *slot = ggc_alloc (sizeof (struct libfunc_entry));
6220 (*slot)->optab = (size_t) (convert_optab_table[0] - optable);
6221 (*slot)->mode1 = tmode;
6222 (*slot)->mode2 = fmode;
6223 (*slot)->libfunc = val;
6226 /* Call this to initialize the contents of the optabs
6227 appropriately for the current target machine. */
6233 enum machine_mode int_mode;
6235 libfunc_hash = htab_create_ggc (10, hash_libfunc, eq_libfunc, NULL);
6236 /* Start by initializing all tables to contain CODE_FOR_nothing. */
6238 for (i = 0; i < NUM_RTX_CODE; i++)
6239 setcc_gen_code[i] = CODE_FOR_nothing;
6241 #ifdef HAVE_conditional_move
6242 for (i = 0; i < NUM_MACHINE_MODES; i++)
6243 movcc_gen_code[i] = CODE_FOR_nothing;
6246 for (i = 0; i < NUM_MACHINE_MODES; i++)
6248 vcond_gen_code[i] = CODE_FOR_nothing;
6249 vcondu_gen_code[i] = CODE_FOR_nothing;
6252 add_optab = init_optab (PLUS);
6253 addv_optab = init_optabv (PLUS);
6254 sub_optab = init_optab (MINUS);
6255 subv_optab = init_optabv (MINUS);
6256 ssadd_optab = init_optab (SS_PLUS);
6257 usadd_optab = init_optab (US_PLUS);
6258 sssub_optab = init_optab (SS_MINUS);
6259 ussub_optab = init_optab (US_MINUS);
6260 smul_optab = init_optab (MULT);
6261 ssmul_optab = init_optab (SS_MULT);
6262 usmul_optab = init_optab (US_MULT);
6263 smulv_optab = init_optabv (MULT);
6264 smul_highpart_optab = init_optab (UNKNOWN);
6265 umul_highpart_optab = init_optab (UNKNOWN);
6266 smul_widen_optab = init_optab (UNKNOWN);
6267 umul_widen_optab = init_optab (UNKNOWN);
6268 usmul_widen_optab = init_optab (UNKNOWN);
6269 smadd_widen_optab = init_optab (UNKNOWN);
6270 umadd_widen_optab = init_optab (UNKNOWN);
6271 ssmadd_widen_optab = init_optab (UNKNOWN);
6272 usmadd_widen_optab = init_optab (UNKNOWN);
6273 smsub_widen_optab = init_optab (UNKNOWN);
6274 umsub_widen_optab = init_optab (UNKNOWN);
6275 ssmsub_widen_optab = init_optab (UNKNOWN);
6276 usmsub_widen_optab = init_optab (UNKNOWN);
6277 sdiv_optab = init_optab (DIV);
6278 ssdiv_optab = init_optab (SS_DIV);
6279 usdiv_optab = init_optab (US_DIV);
6280 sdivv_optab = init_optabv (DIV);
6281 sdivmod_optab = init_optab (UNKNOWN);
6282 udiv_optab = init_optab (UDIV);
6283 udivmod_optab = init_optab (UNKNOWN);
6284 smod_optab = init_optab (MOD);
6285 umod_optab = init_optab (UMOD);
6286 fmod_optab = init_optab (UNKNOWN);
6287 remainder_optab = init_optab (UNKNOWN);
6288 ftrunc_optab = init_optab (UNKNOWN);
6289 and_optab = init_optab (AND);
6290 ior_optab = init_optab (IOR);
6291 xor_optab = init_optab (XOR);
6292 ashl_optab = init_optab (ASHIFT);
6293 ssashl_optab = init_optab (SS_ASHIFT);
6294 usashl_optab = init_optab (US_ASHIFT);
6295 ashr_optab = init_optab (ASHIFTRT);
6296 lshr_optab = init_optab (LSHIFTRT);
6297 rotl_optab = init_optab (ROTATE);
6298 rotr_optab = init_optab (ROTATERT);
6299 smin_optab = init_optab (SMIN);
6300 smax_optab = init_optab (SMAX);
6301 umin_optab = init_optab (UMIN);
6302 umax_optab = init_optab (UMAX);
6303 pow_optab = init_optab (UNKNOWN);
6304 atan2_optab = init_optab (UNKNOWN);
6306 /* These three have codes assigned exclusively for the sake of
6308 mov_optab = init_optab (SET);
6309 movstrict_optab = init_optab (STRICT_LOW_PART);
6310 cmp_optab = init_optab (COMPARE);
6312 storent_optab = init_optab (UNKNOWN);
6314 ucmp_optab = init_optab (UNKNOWN);
6315 tst_optab = init_optab (UNKNOWN);
6317 eq_optab = init_optab (EQ);
6318 ne_optab = init_optab (NE);
6319 gt_optab = init_optab (GT);
6320 ge_optab = init_optab (GE);
6321 lt_optab = init_optab (LT);
6322 le_optab = init_optab (LE);
6323 unord_optab = init_optab (UNORDERED);
6325 neg_optab = init_optab (NEG);
6326 ssneg_optab = init_optab (SS_NEG);
6327 usneg_optab = init_optab (US_NEG);
6328 negv_optab = init_optabv (NEG);
6329 abs_optab = init_optab (ABS);
6330 absv_optab = init_optabv (ABS);
6331 addcc_optab = init_optab (UNKNOWN);
6332 one_cmpl_optab = init_optab (NOT);
6333 bswap_optab = init_optab (BSWAP);
6334 ffs_optab = init_optab (FFS);
6335 clz_optab = init_optab (CLZ);
6336 ctz_optab = init_optab (CTZ);
6337 popcount_optab = init_optab (POPCOUNT);
6338 parity_optab = init_optab (PARITY);
6339 sqrt_optab = init_optab (SQRT);
6340 floor_optab = init_optab (UNKNOWN);
6341 ceil_optab = init_optab (UNKNOWN);
6342 round_optab = init_optab (UNKNOWN);
6343 btrunc_optab = init_optab (UNKNOWN);
6344 nearbyint_optab = init_optab (UNKNOWN);
6345 rint_optab = init_optab (UNKNOWN);
6346 sincos_optab = init_optab (UNKNOWN);
6347 sin_optab = init_optab (UNKNOWN);
6348 asin_optab = init_optab (UNKNOWN);
6349 cos_optab = init_optab (UNKNOWN);
6350 acos_optab = init_optab (UNKNOWN);
6351 exp_optab = init_optab (UNKNOWN);
6352 exp10_optab = init_optab (UNKNOWN);
6353 exp2_optab = init_optab (UNKNOWN);
6354 expm1_optab = init_optab (UNKNOWN);
6355 ldexp_optab = init_optab (UNKNOWN);
6356 scalb_optab = init_optab (UNKNOWN);
6357 logb_optab = init_optab (UNKNOWN);
6358 ilogb_optab = init_optab (UNKNOWN);
6359 log_optab = init_optab (UNKNOWN);
6360 log10_optab = init_optab (UNKNOWN);
6361 log2_optab = init_optab (UNKNOWN);
6362 log1p_optab = init_optab (UNKNOWN);
6363 tan_optab = init_optab (UNKNOWN);
6364 atan_optab = init_optab (UNKNOWN);
6365 copysign_optab = init_optab (UNKNOWN);
6366 signbit_optab = init_optab (UNKNOWN);
6368 isinf_optab = init_optab (UNKNOWN);
6370 strlen_optab = init_optab (UNKNOWN);
6371 cbranch_optab = init_optab (UNKNOWN);
6372 cmov_optab = init_optab (UNKNOWN);
6373 cstore_optab = init_optab (UNKNOWN);
6374 push_optab = init_optab (UNKNOWN);
6376 reduc_smax_optab = init_optab (UNKNOWN);
6377 reduc_umax_optab = init_optab (UNKNOWN);
6378 reduc_smin_optab = init_optab (UNKNOWN);
6379 reduc_umin_optab = init_optab (UNKNOWN);
6380 reduc_splus_optab = init_optab (UNKNOWN);
6381 reduc_uplus_optab = init_optab (UNKNOWN);
6383 ssum_widen_optab = init_optab (UNKNOWN);
6384 usum_widen_optab = init_optab (UNKNOWN);
6385 sdot_prod_optab = init_optab (UNKNOWN);
6386 udot_prod_optab = init_optab (UNKNOWN);
6388 vec_extract_optab = init_optab (UNKNOWN);
6389 vec_extract_even_optab = init_optab (UNKNOWN);
6390 vec_extract_odd_optab = init_optab (UNKNOWN);
6391 vec_interleave_high_optab = init_optab (UNKNOWN);
6392 vec_interleave_low_optab = init_optab (UNKNOWN);
6393 vec_set_optab = init_optab (UNKNOWN);
6394 vec_init_optab = init_optab (UNKNOWN);
6395 vec_shl_optab = init_optab (UNKNOWN);
6396 vec_shr_optab = init_optab (UNKNOWN);
6397 vec_realign_load_optab = init_optab (UNKNOWN);
6398 movmisalign_optab = init_optab (UNKNOWN);
6399 vec_widen_umult_hi_optab = init_optab (UNKNOWN);
6400 vec_widen_umult_lo_optab = init_optab (UNKNOWN);
6401 vec_widen_smult_hi_optab = init_optab (UNKNOWN);
6402 vec_widen_smult_lo_optab = init_optab (UNKNOWN);
6403 vec_unpacks_hi_optab = init_optab (UNKNOWN);
6404 vec_unpacks_lo_optab = init_optab (UNKNOWN);
6405 vec_unpacku_hi_optab = init_optab (UNKNOWN);
6406 vec_unpacku_lo_optab = init_optab (UNKNOWN);
6407 vec_unpacks_float_hi_optab = init_optab (UNKNOWN);
6408 vec_unpacks_float_lo_optab = init_optab (UNKNOWN);
6409 vec_unpacku_float_hi_optab = init_optab (UNKNOWN);
6410 vec_unpacku_float_lo_optab = init_optab (UNKNOWN);
6411 vec_pack_trunc_optab = init_optab (UNKNOWN);
6412 vec_pack_usat_optab = init_optab (UNKNOWN);
6413 vec_pack_ssat_optab = init_optab (UNKNOWN);
6414 vec_pack_ufix_trunc_optab = init_optab (UNKNOWN);
6415 vec_pack_sfix_trunc_optab = init_optab (UNKNOWN);
6417 powi_optab = init_optab (UNKNOWN);
6420 sext_optab = init_convert_optab (SIGN_EXTEND);
6421 zext_optab = init_convert_optab (ZERO_EXTEND);
6422 trunc_optab = init_convert_optab (TRUNCATE);
6423 sfix_optab = init_convert_optab (FIX);
6424 ufix_optab = init_convert_optab (UNSIGNED_FIX);
6425 sfixtrunc_optab = init_convert_optab (UNKNOWN);
6426 ufixtrunc_optab = init_convert_optab (UNKNOWN);
6427 sfloat_optab = init_convert_optab (FLOAT);
6428 ufloat_optab = init_convert_optab (UNSIGNED_FLOAT);
6429 lrint_optab = init_convert_optab (UNKNOWN);
6430 lround_optab = init_convert_optab (UNKNOWN);
6431 lfloor_optab = init_convert_optab (UNKNOWN);
6432 lceil_optab = init_convert_optab (UNKNOWN);
6434 fract_optab = init_convert_optab (FRACT_CONVERT);
6435 fractuns_optab = init_convert_optab (UNSIGNED_FRACT_CONVERT);
6436 satfract_optab = init_convert_optab (SAT_FRACT);
6437 satfractuns_optab = init_convert_optab (UNSIGNED_SAT_FRACT);
6439 for (i = 0; i < NUM_MACHINE_MODES; i++)
6441 movmem_optab[i] = CODE_FOR_nothing;
6442 cmpstr_optab[i] = CODE_FOR_nothing;
6443 cmpstrn_optab[i] = CODE_FOR_nothing;
6444 cmpmem_optab[i] = CODE_FOR_nothing;
6445 setmem_optab[i] = CODE_FOR_nothing;
6447 sync_add_optab[i] = CODE_FOR_nothing;
6448 sync_sub_optab[i] = CODE_FOR_nothing;
6449 sync_ior_optab[i] = CODE_FOR_nothing;
6450 sync_and_optab[i] = CODE_FOR_nothing;
6451 sync_xor_optab[i] = CODE_FOR_nothing;
6452 sync_nand_optab[i] = CODE_FOR_nothing;
6453 sync_old_add_optab[i] = CODE_FOR_nothing;
6454 sync_old_sub_optab[i] = CODE_FOR_nothing;
6455 sync_old_ior_optab[i] = CODE_FOR_nothing;
6456 sync_old_and_optab[i] = CODE_FOR_nothing;
6457 sync_old_xor_optab[i] = CODE_FOR_nothing;
6458 sync_old_nand_optab[i] = CODE_FOR_nothing;
6459 sync_new_add_optab[i] = CODE_FOR_nothing;
6460 sync_new_sub_optab[i] = CODE_FOR_nothing;
6461 sync_new_ior_optab[i] = CODE_FOR_nothing;
6462 sync_new_and_optab[i] = CODE_FOR_nothing;
6463 sync_new_xor_optab[i] = CODE_FOR_nothing;
6464 sync_new_nand_optab[i] = CODE_FOR_nothing;
6465 sync_compare_and_swap[i] = CODE_FOR_nothing;
6466 sync_compare_and_swap_cc[i] = CODE_FOR_nothing;
6467 sync_lock_test_and_set[i] = CODE_FOR_nothing;
6468 sync_lock_release[i] = CODE_FOR_nothing;
6470 reload_in_optab[i] = reload_out_optab[i] = CODE_FOR_nothing;
6473 /* Fill in the optabs with the insns we support. */
6476 /* Initialize the optabs with the names of the library functions. */
6477 add_optab->libcall_basename = "add";
6478 add_optab->libcall_suffix = '3';
6479 add_optab->libcall_gen = gen_int_fp_fixed_libfunc;
6480 addv_optab->libcall_basename = "add";
6481 addv_optab->libcall_suffix = '3';
6482 addv_optab->libcall_gen = gen_intv_fp_libfunc;
6483 ssadd_optab->libcall_basename = "ssadd";
6484 ssadd_optab->libcall_suffix = '3';
6485 ssadd_optab->libcall_gen = gen_signed_fixed_libfunc;
6486 usadd_optab->libcall_basename = "usadd";
6487 usadd_optab->libcall_suffix = '3';
6488 usadd_optab->libcall_gen = gen_unsigned_fixed_libfunc;
6489 sub_optab->libcall_basename = "sub";
6490 sub_optab->libcall_suffix = '3';
6491 sub_optab->libcall_gen = gen_int_fp_fixed_libfunc;
6492 subv_optab->libcall_basename = "sub";
6493 subv_optab->libcall_suffix = '3';
6494 subv_optab->libcall_gen = gen_intv_fp_libfunc;
6495 sssub_optab->libcall_basename = "sssub";
6496 sssub_optab->libcall_suffix = '3';
6497 sssub_optab->libcall_gen = gen_signed_fixed_libfunc;
6498 ussub_optab->libcall_basename = "ussub";
6499 ussub_optab->libcall_suffix = '3';
6500 ussub_optab->libcall_gen = gen_unsigned_fixed_libfunc;
6501 smul_optab->libcall_basename = "mul";
6502 smul_optab->libcall_suffix = '3';
6503 smul_optab->libcall_gen = gen_int_fp_fixed_libfunc;
6504 smulv_optab->libcall_basename = "mul";
6505 smulv_optab->libcall_suffix = '3';
6506 smulv_optab->libcall_gen = gen_intv_fp_libfunc;
6507 ssmul_optab->libcall_basename = "ssmul";
6508 ssmul_optab->libcall_suffix = '3';
6509 ssmul_optab->libcall_gen = gen_signed_fixed_libfunc;
6510 usmul_optab->libcall_basename = "usmul";
6511 usmul_optab->libcall_suffix = '3';
6512 usmul_optab->libcall_gen = gen_unsigned_fixed_libfunc;
6513 sdiv_optab->libcall_basename = "div";
6514 sdiv_optab->libcall_suffix = '3';
6515 sdiv_optab->libcall_gen = gen_int_fp_signed_fixed_libfunc;
6516 sdivv_optab->libcall_basename = "divv";
6517 sdivv_optab->libcall_suffix = '3';
6518 sdivv_optab->libcall_gen = gen_int_libfunc;
6519 ssdiv_optab->libcall_basename = "ssdiv";
6520 ssdiv_optab->libcall_suffix = '3';
6521 ssdiv_optab->libcall_gen = gen_signed_fixed_libfunc;
6522 udiv_optab->libcall_basename = "udiv";
6523 udiv_optab->libcall_suffix = '3';
6524 udiv_optab->libcall_gen = gen_int_unsigned_fixed_libfunc;
6525 usdiv_optab->libcall_basename = "usdiv";
6526 usdiv_optab->libcall_suffix = '3';
6527 usdiv_optab->libcall_gen = gen_unsigned_fixed_libfunc;
6528 sdivmod_optab->libcall_basename = "divmod";
6529 sdivmod_optab->libcall_suffix = '4';
6530 sdivmod_optab->libcall_gen = gen_int_libfunc;
6531 udivmod_optab->libcall_basename = "udivmod";
6532 udivmod_optab->libcall_suffix = '4';
6533 udivmod_optab->libcall_gen = gen_int_libfunc;
6534 smod_optab->libcall_basename = "mod";
6535 smod_optab->libcall_suffix = '3';
6536 smod_optab->libcall_gen = gen_int_libfunc;
6537 umod_optab->libcall_basename = "umod";
6538 umod_optab->libcall_suffix = '3';
6539 umod_optab->libcall_gen = gen_int_libfunc;
6540 ftrunc_optab->libcall_basename = "ftrunc";
6541 ftrunc_optab->libcall_suffix = '2';
6542 ftrunc_optab->libcall_gen = gen_fp_libfunc;
6543 and_optab->libcall_basename = "and";
6544 and_optab->libcall_suffix = '3';
6545 and_optab->libcall_gen = gen_int_libfunc;
6546 ior_optab->libcall_basename = "ior";
6547 ior_optab->libcall_suffix = '3';
6548 ior_optab->libcall_gen = gen_int_libfunc;
6549 xor_optab->libcall_basename = "xor";
6550 xor_optab->libcall_suffix = '3';
6551 xor_optab->libcall_gen = gen_int_libfunc;
6552 ashl_optab->libcall_basename = "ashl";
6553 ashl_optab->libcall_suffix = '3';
6554 ashl_optab->libcall_gen = gen_int_fixed_libfunc;
6555 ssashl_optab->libcall_basename = "ssashl";
6556 ssashl_optab->libcall_suffix = '3';
6557 ssashl_optab->libcall_gen = gen_signed_fixed_libfunc;
6558 usashl_optab->libcall_basename = "usashl";
6559 usashl_optab->libcall_suffix = '3';
6560 usashl_optab->libcall_gen = gen_unsigned_fixed_libfunc;
6561 ashr_optab->libcall_basename = "ashr";
6562 ashr_optab->libcall_suffix = '3';
6563 ashr_optab->libcall_gen = gen_int_signed_fixed_libfunc;
6564 lshr_optab->libcall_basename = "lshr";
6565 lshr_optab->libcall_suffix = '3';
6566 lshr_optab->libcall_gen = gen_int_unsigned_fixed_libfunc;
6567 smin_optab->libcall_basename = "min";
6568 smin_optab->libcall_suffix = '3';
6569 smin_optab->libcall_gen = gen_int_fp_libfunc;
6570 smax_optab->libcall_basename = "max";
6571 smax_optab->libcall_suffix = '3';
6572 smax_optab->libcall_gen = gen_int_fp_libfunc;
6573 umin_optab->libcall_basename = "umin";
6574 umin_optab->libcall_suffix = '3';
6575 umin_optab->libcall_gen = gen_int_libfunc;
6576 umax_optab->libcall_basename = "umax";
6577 umax_optab->libcall_suffix = '3';
6578 umax_optab->libcall_gen = gen_int_libfunc;
6579 neg_optab->libcall_basename = "neg";
6580 neg_optab->libcall_suffix = '2';
6581 neg_optab->libcall_gen = gen_int_fp_fixed_libfunc;
6582 ssneg_optab->libcall_basename = "ssneg";
6583 ssneg_optab->libcall_suffix = '2';
6584 ssneg_optab->libcall_gen = gen_signed_fixed_libfunc;
6585 usneg_optab->libcall_basename = "usneg";
6586 usneg_optab->libcall_suffix = '2';
6587 usneg_optab->libcall_gen = gen_unsigned_fixed_libfunc;
6588 negv_optab->libcall_basename = "neg";
6589 negv_optab->libcall_suffix = '2';
6590 negv_optab->libcall_gen = gen_intv_fp_libfunc;
6591 one_cmpl_optab->libcall_basename = "one_cmpl";
6592 one_cmpl_optab->libcall_suffix = '2';
6593 one_cmpl_optab->libcall_gen = gen_int_libfunc;
6594 ffs_optab->libcall_basename = "ffs";
6595 ffs_optab->libcall_suffix = '2';
6596 ffs_optab->libcall_gen = gen_int_libfunc;
6597 clz_optab->libcall_basename = "clz";
6598 clz_optab->libcall_suffix = '2';
6599 clz_optab->libcall_gen = gen_int_libfunc;
6600 ctz_optab->libcall_basename = "ctz";
6601 ctz_optab->libcall_suffix = '2';
6602 ctz_optab->libcall_gen = gen_int_libfunc;
6603 popcount_optab->libcall_basename = "popcount";
6604 popcount_optab->libcall_suffix = '2';
6605 popcount_optab->libcall_gen = gen_int_libfunc;
6606 parity_optab->libcall_basename = "parity";
6607 parity_optab->libcall_suffix = '2';
6608 parity_optab->libcall_gen = gen_int_libfunc;
6610 /* Comparison libcalls for integers MUST come in pairs,
6612 cmp_optab->libcall_basename = "cmp";
6613 cmp_optab->libcall_suffix = '2';
6614 cmp_optab->libcall_gen = gen_int_fp_fixed_libfunc;
6615 ucmp_optab->libcall_basename = "ucmp";
6616 ucmp_optab->libcall_suffix = '2';
6617 ucmp_optab->libcall_gen = gen_int_libfunc;
6619 /* EQ etc are floating point only. */
6620 eq_optab->libcall_basename = "eq";
6621 eq_optab->libcall_suffix = '2';
6622 eq_optab->libcall_gen = gen_fp_libfunc;
6623 ne_optab->libcall_basename = "ne";
6624 ne_optab->libcall_suffix = '2';
6625 ne_optab->libcall_gen = gen_fp_libfunc;
6626 gt_optab->libcall_basename = "gt";
6627 gt_optab->libcall_suffix = '2';
6628 gt_optab->libcall_gen = gen_fp_libfunc;
6629 ge_optab->libcall_basename = "ge";
6630 ge_optab->libcall_suffix = '2';
6631 ge_optab->libcall_gen = gen_fp_libfunc;
6632 lt_optab->libcall_basename = "lt";
6633 lt_optab->libcall_suffix = '2';
6634 lt_optab->libcall_gen = gen_fp_libfunc;
6635 le_optab->libcall_basename = "le";
6636 le_optab->libcall_suffix = '2';
6637 le_optab->libcall_gen = gen_fp_libfunc;
6638 unord_optab->libcall_basename = "unord";
6639 unord_optab->libcall_suffix = '2';
6640 unord_optab->libcall_gen = gen_fp_libfunc;
6642 powi_optab->libcall_basename = "powi";
6643 powi_optab->libcall_suffix = '2';
6644 powi_optab->libcall_gen = gen_fp_libfunc;
6647 sfloat_optab->libcall_basename = "float";
6648 sfloat_optab->libcall_gen = gen_int_to_fp_conv_libfunc;
6649 ufloat_optab->libcall_gen = gen_ufloat_conv_libfunc;
6650 sfix_optab->libcall_basename = "fix";
6651 sfix_optab->libcall_gen = gen_fp_to_int_conv_libfunc;
6652 ufix_optab->libcall_basename = "fixuns";
6653 ufix_optab->libcall_gen = gen_fp_to_int_conv_libfunc;
6654 lrint_optab->libcall_basename = "lrint";
6655 lrint_optab->libcall_gen = gen_int_to_fp_nondecimal_conv_libfunc;
6656 lround_optab->libcall_basename = "lround";
6657 lround_optab->libcall_gen = gen_int_to_fp_nondecimal_conv_libfunc;
6658 lfloor_optab->libcall_basename = "lfloor";
6659 lfloor_optab->libcall_gen = gen_int_to_fp_nondecimal_conv_libfunc;
6660 lceil_optab->libcall_basename = "lceil";
6661 lceil_optab->libcall_gen = gen_int_to_fp_nondecimal_conv_libfunc;
6663 /* trunc_optab is also used for FLOAT_EXTEND. */
6664 sext_optab->libcall_basename = "extend";
6665 sext_optab->libcall_gen = gen_extend_conv_libfunc;
6666 trunc_optab->libcall_basename = "trunc";
6667 trunc_optab->libcall_gen = gen_trunc_conv_libfunc;
6669 /* Conversions for fixed-point modes and other modes. */
6670 fract_optab->libcall_basename = "fract";
6671 fract_optab->libcall_gen = gen_fract_conv_libfunc;
6672 satfract_optab->libcall_basename = "satfract";
6673 satfract_optab->libcall_gen = gen_satfract_conv_libfunc;
6674 fractuns_optab->libcall_basename = "fractuns";
6675 fractuns_optab->libcall_gen = gen_fractuns_conv_libfunc;
6676 satfractuns_optab->libcall_basename = "satfractuns";
6677 satfractuns_optab->libcall_gen = gen_satfractuns_conv_libfunc;
6679 /* The ffs function operates on `int'. Fall back on it if we do not
6680 have a libgcc2 function for that width. */
6681 if (INT_TYPE_SIZE < BITS_PER_WORD)
6683 int_mode = mode_for_size (INT_TYPE_SIZE, MODE_INT, 0);
6684 set_optab_libfunc (ffs_optab, mode_for_size (INT_TYPE_SIZE, MODE_INT, 0),
6688 /* Explicitly initialize the bswap libfuncs since we need them to be
6689 valid for things other than word_mode. */
6690 set_optab_libfunc (bswap_optab, SImode, "__bswapsi2");
6691 set_optab_libfunc (bswap_optab, DImode, "__bswapdi2");
6693 /* Use cabs for double complex abs, since systems generally have cabs.
6694 Don't define any libcall for float complex, so that cabs will be used. */
6695 if (complex_double_type_node)
6696 set_optab_libfunc (abs_optab, TYPE_MODE (complex_double_type_node), "cabs");
6698 abort_libfunc = init_one_libfunc ("abort");
6699 memcpy_libfunc = init_one_libfunc ("memcpy");
6700 memmove_libfunc = init_one_libfunc ("memmove");
6701 memcmp_libfunc = init_one_libfunc ("memcmp");
6702 memset_libfunc = init_one_libfunc ("memset");
6703 setbits_libfunc = init_one_libfunc ("__setbits");
6705 #ifndef DONT_USE_BUILTIN_SETJMP
6706 setjmp_libfunc = init_one_libfunc ("__builtin_setjmp");
6707 longjmp_libfunc = init_one_libfunc ("__builtin_longjmp");
6709 setjmp_libfunc = init_one_libfunc ("setjmp");
6710 longjmp_libfunc = init_one_libfunc ("longjmp");
6712 unwind_sjlj_register_libfunc = init_one_libfunc ("_Unwind_SjLj_Register");
6713 unwind_sjlj_unregister_libfunc
6714 = init_one_libfunc ("_Unwind_SjLj_Unregister");
6716 /* For function entry/exit instrumentation. */
6717 profile_function_entry_libfunc
6718 = init_one_libfunc ("__cyg_profile_func_enter");
6719 profile_function_exit_libfunc
6720 = init_one_libfunc ("__cyg_profile_func_exit");
6722 gcov_flush_libfunc = init_one_libfunc ("__gcov_flush");
6724 if (HAVE_conditional_trap)
6725 trap_rtx = gen_rtx_fmt_ee (EQ, VOIDmode, NULL_RTX, NULL_RTX);
6727 /* Allow the target to add more libcalls or rename some, etc. */
6728 targetm.init_libfuncs ();
6731 /* Print information about the current contents of the optabs on
6735 debug_optab_libfuncs (void)
6741 /* Dump the arithmetic optabs. */
6742 for (i = 0; i != (int) OTI_MAX; i++)
6743 for (j = 0; j < NUM_MACHINE_MODES; ++j)
6749 l = optab_libfunc (optab_table[i], j);
6752 gcc_assert (GET_CODE (l) == SYMBOL_REF);
6753 fprintf (stderr, "%s\t%s:\t%s\n",
6754 GET_RTX_NAME (o->code),
6760 /* Dump the conversion optabs. */
6761 for (i = 0; i < (int) COI_MAX; ++i)
6762 for (j = 0; j < NUM_MACHINE_MODES; ++j)
6763 for (k = 0; k < NUM_MACHINE_MODES; ++k)
6768 o = convert_optab_table[i];
6769 l = convert_optab_libfunc (o, j, k);
6772 gcc_assert (GET_CODE (l) == SYMBOL_REF);
6773 fprintf (stderr, "%s\t%s\t%s:\t%s\n",
6774 GET_RTX_NAME (o->code),
6783 /* Generate insns to trap with code TCODE if OP1 and OP2 satisfy condition
6784 CODE. Return 0 on failure. */
6787 gen_cond_trap (enum rtx_code code ATTRIBUTE_UNUSED, rtx op1,
6788 rtx op2 ATTRIBUTE_UNUSED, rtx tcode ATTRIBUTE_UNUSED)
6790 enum machine_mode mode = GET_MODE (op1);
6791 enum insn_code icode;
6794 if (!HAVE_conditional_trap)
6797 if (mode == VOIDmode)
6800 icode = optab_handler (cmp_optab, mode)->insn_code;
6801 if (icode == CODE_FOR_nothing)
6805 op1 = prepare_operand (icode, op1, 0, mode, mode, 0);
6806 op2 = prepare_operand (icode, op2, 1, mode, mode, 0);
6812 emit_insn (GEN_FCN (icode) (op1, op2));
6814 PUT_CODE (trap_rtx, code);
6815 gcc_assert (HAVE_conditional_trap);
6816 insn = gen_conditional_trap (trap_rtx, tcode);
6820 insn = get_insns ();
6827 /* Return rtx code for TCODE. Use UNSIGNEDP to select signed
6828 or unsigned operation code. */
6830 static enum rtx_code
6831 get_rtx_code (enum tree_code tcode, bool unsignedp)
6843 code = unsignedp ? LTU : LT;
6846 code = unsignedp ? LEU : LE;
6849 code = unsignedp ? GTU : GT;
6852 code = unsignedp ? GEU : GE;
6855 case UNORDERED_EXPR:
6886 /* Return comparison rtx for COND. Use UNSIGNEDP to select signed or
6887 unsigned operators. Do not generate compare instruction. */
6890 vector_compare_rtx (tree cond, bool unsignedp, enum insn_code icode)
6892 enum rtx_code rcode;
6894 rtx rtx_op0, rtx_op1;
6896 /* This is unlikely. While generating VEC_COND_EXPR, auto vectorizer
6897 ensures that condition is a relational operation. */
6898 gcc_assert (COMPARISON_CLASS_P (cond));
6900 rcode = get_rtx_code (TREE_CODE (cond), unsignedp);
6901 t_op0 = TREE_OPERAND (cond, 0);
6902 t_op1 = TREE_OPERAND (cond, 1);
6904 /* Expand operands. */
6905 rtx_op0 = expand_expr (t_op0, NULL_RTX, TYPE_MODE (TREE_TYPE (t_op0)),
6907 rtx_op1 = expand_expr (t_op1, NULL_RTX, TYPE_MODE (TREE_TYPE (t_op1)),
6910 if (!insn_data[icode].operand[4].predicate (rtx_op0, GET_MODE (rtx_op0))
6911 && GET_MODE (rtx_op0) != VOIDmode)
6912 rtx_op0 = force_reg (GET_MODE (rtx_op0), rtx_op0);
6914 if (!insn_data[icode].operand[5].predicate (rtx_op1, GET_MODE (rtx_op1))
6915 && GET_MODE (rtx_op1) != VOIDmode)
6916 rtx_op1 = force_reg (GET_MODE (rtx_op1), rtx_op1);
6918 return gen_rtx_fmt_ee (rcode, VOIDmode, rtx_op0, rtx_op1);
6921 /* Return insn code for VEC_COND_EXPR EXPR. */
6923 static inline enum insn_code
6924 get_vcond_icode (tree expr, enum machine_mode mode)
6926 enum insn_code icode = CODE_FOR_nothing;
6928 if (TYPE_UNSIGNED (TREE_TYPE (expr)))
6929 icode = vcondu_gen_code[mode];
6931 icode = vcond_gen_code[mode];
6935 /* Return TRUE iff, appropriate vector insns are available
6936 for vector cond expr expr in VMODE mode. */
6939 expand_vec_cond_expr_p (tree expr, enum machine_mode vmode)
6941 if (get_vcond_icode (expr, vmode) == CODE_FOR_nothing)
6946 /* Generate insns for VEC_COND_EXPR. */
6949 expand_vec_cond_expr (tree vec_cond_expr, rtx target)
6951 enum insn_code icode;
6952 rtx comparison, rtx_op1, rtx_op2, cc_op0, cc_op1;
6953 enum machine_mode mode = TYPE_MODE (TREE_TYPE (vec_cond_expr));
6954 bool unsignedp = TYPE_UNSIGNED (TREE_TYPE (vec_cond_expr));
6956 icode = get_vcond_icode (vec_cond_expr, mode);
6957 if (icode == CODE_FOR_nothing)
6960 if (!target || !insn_data[icode].operand[0].predicate (target, mode))
6961 target = gen_reg_rtx (mode);
6963 /* Get comparison rtx. First expand both cond expr operands. */
6964 comparison = vector_compare_rtx (TREE_OPERAND (vec_cond_expr, 0),
6966 cc_op0 = XEXP (comparison, 0);
6967 cc_op1 = XEXP (comparison, 1);
6968 /* Expand both operands and force them in reg, if required. */
6969 rtx_op1 = expand_normal (TREE_OPERAND (vec_cond_expr, 1));
6970 if (!insn_data[icode].operand[1].predicate (rtx_op1, mode)
6971 && mode != VOIDmode)
6972 rtx_op1 = force_reg (mode, rtx_op1);
6974 rtx_op2 = expand_normal (TREE_OPERAND (vec_cond_expr, 2));
6975 if (!insn_data[icode].operand[2].predicate (rtx_op2, mode)
6976 && mode != VOIDmode)
6977 rtx_op2 = force_reg (mode, rtx_op2);
6979 /* Emit instruction! */
6980 emit_insn (GEN_FCN (icode) (target, rtx_op1, rtx_op2,
6981 comparison, cc_op0, cc_op1));
6987 /* This is an internal subroutine of the other compare_and_swap expanders.
6988 MEM, OLD_VAL and NEW_VAL are as you'd expect for a compare-and-swap
6989 operation. TARGET is an optional place to store the value result of
6990 the operation. ICODE is the particular instruction to expand. Return
6991 the result of the operation. */
6994 expand_val_compare_and_swap_1 (rtx mem, rtx old_val, rtx new_val,
6995 rtx target, enum insn_code icode)
6997 enum machine_mode mode = GET_MODE (mem);
7000 if (!target || !insn_data[icode].operand[0].predicate (target, mode))
7001 target = gen_reg_rtx (mode);
7003 if (GET_MODE (old_val) != VOIDmode && GET_MODE (old_val) != mode)
7004 old_val = convert_modes (mode, GET_MODE (old_val), old_val, 1);
7005 if (!insn_data[icode].operand[2].predicate (old_val, mode))
7006 old_val = force_reg (mode, old_val);
7008 if (GET_MODE (new_val) != VOIDmode && GET_MODE (new_val) != mode)
7009 new_val = convert_modes (mode, GET_MODE (new_val), new_val, 1);
7010 if (!insn_data[icode].operand[3].predicate (new_val, mode))
7011 new_val = force_reg (mode, new_val);
7013 insn = GEN_FCN (icode) (target, mem, old_val, new_val);
7014 if (insn == NULL_RTX)
7021 /* Expand a compare-and-swap operation and return its value. */
7024 expand_val_compare_and_swap (rtx mem, rtx old_val, rtx new_val, rtx target)
7026 enum machine_mode mode = GET_MODE (mem);
7027 enum insn_code icode = sync_compare_and_swap[mode];
7029 if (icode == CODE_FOR_nothing)
7032 return expand_val_compare_and_swap_1 (mem, old_val, new_val, target, icode);
7035 /* Expand a compare-and-swap operation and store true into the result if
7036 the operation was successful and false otherwise. Return the result.
7037 Unlike other routines, TARGET is not optional. */
7040 expand_bool_compare_and_swap (rtx mem, rtx old_val, rtx new_val, rtx target)
7042 enum machine_mode mode = GET_MODE (mem);
7043 enum insn_code icode;
7044 rtx subtarget, label0, label1;
7046 /* If the target supports a compare-and-swap pattern that simultaneously
7047 sets some flag for success, then use it. Otherwise use the regular
7048 compare-and-swap and follow that immediately with a compare insn. */
7049 icode = sync_compare_and_swap_cc[mode];
7053 subtarget = expand_val_compare_and_swap_1 (mem, old_val, new_val,
7055 if (subtarget != NULL_RTX)
7059 case CODE_FOR_nothing:
7060 icode = sync_compare_and_swap[mode];
7061 if (icode == CODE_FOR_nothing)
7064 /* Ensure that if old_val == mem, that we're not comparing
7065 against an old value. */
7066 if (MEM_P (old_val))
7067 old_val = force_reg (mode, old_val);
7069 subtarget = expand_val_compare_and_swap_1 (mem, old_val, new_val,
7071 if (subtarget == NULL_RTX)
7074 emit_cmp_insn (subtarget, old_val, EQ, const0_rtx, mode, true);
7077 /* If the target has a sane STORE_FLAG_VALUE, then go ahead and use a
7078 setcc instruction from the beginning. We don't work too hard here,
7079 but it's nice to not be stupid about initial code gen either. */
7080 if (STORE_FLAG_VALUE == 1)
7082 icode = setcc_gen_code[EQ];
7083 if (icode != CODE_FOR_nothing)
7085 enum machine_mode cmode = insn_data[icode].operand[0].mode;
7089 if (!insn_data[icode].operand[0].predicate (target, cmode))
7090 subtarget = gen_reg_rtx (cmode);
7092 insn = GEN_FCN (icode) (subtarget);
7096 if (GET_MODE (target) != GET_MODE (subtarget))
7098 convert_move (target, subtarget, 1);
7106 /* Without an appropriate setcc instruction, use a set of branches to
7107 get 1 and 0 stored into target. Presumably if the target has a
7108 STORE_FLAG_VALUE that isn't 1, then this will get cleaned up by ifcvt. */
7110 label0 = gen_label_rtx ();
7111 label1 = gen_label_rtx ();
7113 emit_jump_insn (bcc_gen_fctn[EQ] (label0));
7114 emit_move_insn (target, const0_rtx);
7115 emit_jump_insn (gen_jump (label1));
7117 emit_label (label0);
7118 emit_move_insn (target, const1_rtx);
7119 emit_label (label1);
7124 /* This is a helper function for the other atomic operations. This function
7125 emits a loop that contains SEQ that iterates until a compare-and-swap
7126 operation at the end succeeds. MEM is the memory to be modified. SEQ is
7127 a set of instructions that takes a value from OLD_REG as an input and
7128 produces a value in NEW_REG as an output. Before SEQ, OLD_REG will be
7129 set to the current contents of MEM. After SEQ, a compare-and-swap will
7130 attempt to update MEM with NEW_REG. The function returns true when the
7131 loop was generated successfully. */
7134 expand_compare_and_swap_loop (rtx mem, rtx old_reg, rtx new_reg, rtx seq)
7136 enum machine_mode mode = GET_MODE (mem);
7137 enum insn_code icode;
7138 rtx label, cmp_reg, subtarget;
7140 /* The loop we want to generate looks like
7146 cmp_reg = compare-and-swap(mem, old_reg, new_reg)
7147 if (cmp_reg != old_reg)
7150 Note that we only do the plain load from memory once. Subsequent
7151 iterations use the value loaded by the compare-and-swap pattern. */
7153 label = gen_label_rtx ();
7154 cmp_reg = gen_reg_rtx (mode);
7156 emit_move_insn (cmp_reg, mem);
7158 emit_move_insn (old_reg, cmp_reg);
7162 /* If the target supports a compare-and-swap pattern that simultaneously
7163 sets some flag for success, then use it. Otherwise use the regular
7164 compare-and-swap and follow that immediately with a compare insn. */
7165 icode = sync_compare_and_swap_cc[mode];
7169 subtarget = expand_val_compare_and_swap_1 (mem, old_reg, new_reg,
7171 if (subtarget != NULL_RTX)
7173 gcc_assert (subtarget == cmp_reg);
7178 case CODE_FOR_nothing:
7179 icode = sync_compare_and_swap[mode];
7180 if (icode == CODE_FOR_nothing)
7183 subtarget = expand_val_compare_and_swap_1 (mem, old_reg, new_reg,
7185 if (subtarget == NULL_RTX)
7187 if (subtarget != cmp_reg)
7188 emit_move_insn (cmp_reg, subtarget);
7190 emit_cmp_insn (cmp_reg, old_reg, EQ, const0_rtx, mode, true);
7193 /* ??? Mark this jump predicted not taken? */
7194 emit_jump_insn (bcc_gen_fctn[NE] (label));
7199 /* This function generates the atomic operation MEM CODE= VAL. In this
7200 case, we do not care about any resulting value. Returns NULL if we
7201 cannot generate the operation. */
7204 expand_sync_operation (rtx mem, rtx val, enum rtx_code code)
7206 enum machine_mode mode = GET_MODE (mem);
7207 enum insn_code icode;
7210 /* Look to see if the target supports the operation directly. */
7214 icode = sync_add_optab[mode];
7217 icode = sync_ior_optab[mode];
7220 icode = sync_xor_optab[mode];
7223 icode = sync_and_optab[mode];
7226 icode = sync_nand_optab[mode];
7230 icode = sync_sub_optab[mode];
7231 if (icode == CODE_FOR_nothing || CONST_INT_P (val))
7233 icode = sync_add_optab[mode];
7234 if (icode != CODE_FOR_nothing)
7236 val = expand_simple_unop (mode, NEG, val, NULL_RTX, 1);
7246 /* Generate the direct operation, if present. */
7247 if (icode != CODE_FOR_nothing)
7249 if (GET_MODE (val) != VOIDmode && GET_MODE (val) != mode)
7250 val = convert_modes (mode, GET_MODE (val), val, 1);
7251 if (!insn_data[icode].operand[1].predicate (val, mode))
7252 val = force_reg (mode, val);
7254 insn = GEN_FCN (icode) (mem, val);
7262 /* Failing that, generate a compare-and-swap loop in which we perform the
7263 operation with normal arithmetic instructions. */
7264 if (sync_compare_and_swap[mode] != CODE_FOR_nothing)
7266 rtx t0 = gen_reg_rtx (mode), t1;
7273 t1 = expand_simple_unop (mode, NOT, t1, NULL_RTX, true);
7276 t1 = expand_simple_binop (mode, code, t1, val, NULL_RTX,
7277 true, OPTAB_LIB_WIDEN);
7279 insn = get_insns ();
7282 if (t1 != NULL && expand_compare_and_swap_loop (mem, t0, t1, insn))
7289 /* This function generates the atomic operation MEM CODE= VAL. In this
7290 case, we do care about the resulting value: if AFTER is true then
7291 return the value MEM holds after the operation, if AFTER is false
7292 then return the value MEM holds before the operation. TARGET is an
7293 optional place for the result value to be stored. */
7296 expand_sync_fetch_operation (rtx mem, rtx val, enum rtx_code code,
7297 bool after, rtx target)
7299 enum machine_mode mode = GET_MODE (mem);
7300 enum insn_code old_code, new_code, icode;
7304 /* Look to see if the target supports the operation directly. */
7308 old_code = sync_old_add_optab[mode];
7309 new_code = sync_new_add_optab[mode];
7312 old_code = sync_old_ior_optab[mode];
7313 new_code = sync_new_ior_optab[mode];
7316 old_code = sync_old_xor_optab[mode];
7317 new_code = sync_new_xor_optab[mode];
7320 old_code = sync_old_and_optab[mode];
7321 new_code = sync_new_and_optab[mode];
7324 old_code = sync_old_nand_optab[mode];
7325 new_code = sync_new_nand_optab[mode];
7329 old_code = sync_old_sub_optab[mode];
7330 new_code = sync_new_sub_optab[mode];
7331 if ((old_code == CODE_FOR_nothing && new_code == CODE_FOR_nothing)
7332 || CONST_INT_P (val))
7334 old_code = sync_old_add_optab[mode];
7335 new_code = sync_new_add_optab[mode];
7336 if (old_code != CODE_FOR_nothing || new_code != CODE_FOR_nothing)
7338 val = expand_simple_unop (mode, NEG, val, NULL_RTX, 1);
7348 /* If the target does supports the proper new/old operation, great. But
7349 if we only support the opposite old/new operation, check to see if we
7350 can compensate. In the case in which the old value is supported, then
7351 we can always perform the operation again with normal arithmetic. In
7352 the case in which the new value is supported, then we can only handle
7353 this in the case the operation is reversible. */
7358 if (icode == CODE_FOR_nothing)
7361 if (icode != CODE_FOR_nothing)
7368 if (icode == CODE_FOR_nothing
7369 && (code == PLUS || code == MINUS || code == XOR))
7372 if (icode != CODE_FOR_nothing)
7377 /* If we found something supported, great. */
7378 if (icode != CODE_FOR_nothing)
7380 if (!target || !insn_data[icode].operand[0].predicate (target, mode))
7381 target = gen_reg_rtx (mode);
7383 if (GET_MODE (val) != VOIDmode && GET_MODE (val) != mode)
7384 val = convert_modes (mode, GET_MODE (val), val, 1);
7385 if (!insn_data[icode].operand[2].predicate (val, mode))
7386 val = force_reg (mode, val);
7388 insn = GEN_FCN (icode) (target, mem, val);
7393 /* If we need to compensate for using an operation with the
7394 wrong return value, do so now. */
7401 else if (code == MINUS)
7406 target = expand_simple_unop (mode, NOT, target, NULL_RTX, true);
7407 target = expand_simple_binop (mode, code, target, val, NULL_RTX,
7408 true, OPTAB_LIB_WIDEN);
7415 /* Failing that, generate a compare-and-swap loop in which we perform the
7416 operation with normal arithmetic instructions. */
7417 if (sync_compare_and_swap[mode] != CODE_FOR_nothing)
7419 rtx t0 = gen_reg_rtx (mode), t1;
7421 if (!target || !register_operand (target, mode))
7422 target = gen_reg_rtx (mode);
7427 emit_move_insn (target, t0);
7431 t1 = expand_simple_unop (mode, NOT, t1, NULL_RTX, true);
7434 t1 = expand_simple_binop (mode, code, t1, val, NULL_RTX,
7435 true, OPTAB_LIB_WIDEN);
7437 emit_move_insn (target, t1);
7439 insn = get_insns ();
7442 if (t1 != NULL && expand_compare_and_swap_loop (mem, t0, t1, insn))
7449 /* This function expands a test-and-set operation. Ideally we atomically
7450 store VAL in MEM and return the previous value in MEM. Some targets
7451 may not support this operation and only support VAL with the constant 1;
7452 in this case while the return value will be 0/1, but the exact value
7453 stored in MEM is target defined. TARGET is an option place to stick
7454 the return value. */
7457 expand_sync_lock_test_and_set (rtx mem, rtx val, rtx target)
7459 enum machine_mode mode = GET_MODE (mem);
7460 enum insn_code icode;
7463 /* If the target supports the test-and-set directly, great. */
7464 icode = sync_lock_test_and_set[mode];
7465 if (icode != CODE_FOR_nothing)
7467 if (!target || !insn_data[icode].operand[0].predicate (target, mode))
7468 target = gen_reg_rtx (mode);
7470 if (GET_MODE (val) != VOIDmode && GET_MODE (val) != mode)
7471 val = convert_modes (mode, GET_MODE (val), val, 1);
7472 if (!insn_data[icode].operand[2].predicate (val, mode))
7473 val = force_reg (mode, val);
7475 insn = GEN_FCN (icode) (target, mem, val);
7483 /* Otherwise, use a compare-and-swap loop for the exchange. */
7484 if (sync_compare_and_swap[mode] != CODE_FOR_nothing)
7486 if (!target || !register_operand (target, mode))
7487 target = gen_reg_rtx (mode);
7488 if (GET_MODE (val) != VOIDmode && GET_MODE (val) != mode)
7489 val = convert_modes (mode, GET_MODE (val), val, 1);
7490 if (expand_compare_and_swap_loop (mem, target, val, NULL_RTX))
7497 #include "gt-optabs.h"