1 /* Expand the basic unary and binary arithmetic operations, for GNU compiler.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
27 /* Include insn-config.h before expr.h so that HAVE_conditional_move
28 is properly defined. */
29 #include "insn-config.h"
42 /* Each optab contains info on how this target machine
43 can perform a particular operation
44 for all sizes and kinds of operands.
46 The operation to be performed is often specified
47 by passing one of these optabs as an argument.
49 See expr.h for documentation of these optabs. */
51 optab optab_table[OTI_MAX];
53 rtx libfunc_table[LTI_MAX];
55 /* Tables of patterns for extending one integer mode to another. */
56 enum insn_code extendtab[MAX_MACHINE_MODE][MAX_MACHINE_MODE][2];
58 /* Tables of patterns for converting between fixed and floating point. */
59 enum insn_code fixtab[NUM_MACHINE_MODES][NUM_MACHINE_MODES][2];
60 enum insn_code fixtrunctab[NUM_MACHINE_MODES][NUM_MACHINE_MODES][2];
61 enum insn_code floattab[NUM_MACHINE_MODES][NUM_MACHINE_MODES][2];
63 /* Contains the optab used for each rtx code. */
64 optab code_to_optab[NUM_RTX_CODE + 1];
66 /* Indexed by the rtx-code for a conditional (eg. EQ, LT,...)
67 gives the gen_function to make a branch to test that condition. */
69 rtxfun bcc_gen_fctn[NUM_RTX_CODE];
71 /* Indexed by the rtx-code for a conditional (eg. EQ, LT,...)
72 gives the insn code to make a store-condition insn
73 to test that condition. */
75 enum insn_code setcc_gen_code[NUM_RTX_CODE];
77 #ifdef HAVE_conditional_move
78 /* Indexed by the machine mode, gives the insn code to make a conditional
79 move insn. This is not indexed by the rtx-code like bcc_gen_fctn and
80 setcc_gen_code to cut down on the number of named patterns. Consider a day
81 when a lot more rtx codes are conditional (eg: for the ARM). */
83 enum insn_code movcc_gen_code[NUM_MACHINE_MODES];
86 static int add_equal_note PARAMS ((rtx, rtx, enum rtx_code, rtx, rtx));
87 static rtx widen_operand PARAMS ((rtx, enum machine_mode,
88 enum machine_mode, int, int));
89 static int expand_cmplxdiv_straight PARAMS ((rtx, rtx, rtx, rtx,
90 rtx, rtx, enum machine_mode,
91 int, enum optab_methods,
92 enum mode_class, optab));
93 static int expand_cmplxdiv_wide PARAMS ((rtx, rtx, rtx, rtx,
94 rtx, rtx, enum machine_mode,
95 int, enum optab_methods,
96 enum mode_class, optab));
97 static enum insn_code can_fix_p PARAMS ((enum machine_mode, enum machine_mode,
99 static enum insn_code can_float_p PARAMS ((enum machine_mode, enum machine_mode,
101 static rtx ftruncify PARAMS ((rtx));
102 static optab init_optab PARAMS ((enum rtx_code));
103 static void init_libfuncs PARAMS ((optab, int, int, const char *, int));
104 static void init_integral_libfuncs PARAMS ((optab, const char *, int));
105 static void init_floating_libfuncs PARAMS ((optab, const char *, int));
106 #ifdef HAVE_conditional_trap
107 static void init_traps PARAMS ((void));
109 static void emit_cmp_and_jump_insn_1 PARAMS ((rtx, rtx, enum machine_mode,
110 enum rtx_code, int, rtx));
111 static void prepare_float_lib_cmp PARAMS ((rtx *, rtx *, enum rtx_code *,
112 enum machine_mode *, int *));
114 /* Add a REG_EQUAL note to the last insn in SEQ. TARGET is being set to
115 the result of operation CODE applied to OP0 (and OP1 if it is a binary
118 If the last insn does not set TARGET, don't do anything, but return 1.
120 If a previous insn sets TARGET and TARGET is one of OP0 or OP1,
121 don't add the REG_EQUAL note but return 0. Our caller can then try
122 again, ensuring that TARGET is not one of the operands. */
125 add_equal_note (seq, target, code, op0, op1)
135 if ((GET_RTX_CLASS (code) != '1' && GET_RTX_CLASS (code) != '2'
136 && GET_RTX_CLASS (code) != 'c' && GET_RTX_CLASS (code) != '<')
137 || GET_CODE (seq) != SEQUENCE
138 || (set = single_set (XVECEXP (seq, 0, XVECLEN (seq, 0) - 1))) == 0
139 || GET_CODE (target) == ZERO_EXTRACT
140 || (! rtx_equal_p (SET_DEST (set), target)
141 /* For a STRICT_LOW_PART, the REG_NOTE applies to what is inside the
143 && (GET_CODE (SET_DEST (set)) != STRICT_LOW_PART
144 || ! rtx_equal_p (SUBREG_REG (XEXP (SET_DEST (set), 0)),
148 /* If TARGET is in OP0 or OP1, check if anything in SEQ sets TARGET
149 besides the last insn. */
150 if (reg_overlap_mentioned_p (target, op0)
151 || (op1 && reg_overlap_mentioned_p (target, op1)))
152 for (i = XVECLEN (seq, 0) - 2; i >= 0; i--)
153 if (reg_set_p (target, XVECEXP (seq, 0, i)))
156 if (GET_RTX_CLASS (code) == '1')
157 note = gen_rtx_fmt_e (code, GET_MODE (target), copy_rtx (op0));
159 note = gen_rtx_fmt_ee (code, GET_MODE (target), copy_rtx (op0), copy_rtx (op1));
161 set_unique_reg_note (XVECEXP (seq, 0, XVECLEN (seq, 0) - 1), REG_EQUAL, note);
166 /* Widen OP to MODE and return the rtx for the widened operand. UNSIGNEDP
167 says whether OP is signed or unsigned. NO_EXTEND is nonzero if we need
168 not actually do a sign-extend or zero-extend, but can leave the
169 higher-order bits of the result rtx undefined, for example, in the case
170 of logical operations, but not right shifts. */
173 widen_operand (op, mode, oldmode, unsignedp, no_extend)
175 enum machine_mode mode, oldmode;
181 /* If we must extend do so. If OP is either a constant or a SUBREG
182 for a promoted object, also extend since it will be more efficient to
185 || GET_MODE (op) == VOIDmode
186 || (GET_CODE (op) == SUBREG && SUBREG_PROMOTED_VAR_P (op)))
187 return convert_modes (mode, oldmode, op, unsignedp);
189 /* If MODE is no wider than a single word, we return a paradoxical
191 if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD)
192 return gen_rtx_SUBREG (mode, force_reg (GET_MODE (op), op), 0);
194 /* Otherwise, get an object of MODE, clobber it, and set the low-order
197 result = gen_reg_rtx (mode);
198 emit_insn (gen_rtx_CLOBBER (VOIDmode, result));
199 emit_move_insn (gen_lowpart (GET_MODE (op), result), op);
203 /* Generate code to perform a straightforward complex divide. */
206 expand_cmplxdiv_straight (real0, real1, imag0, imag1, realr, imagr, submode,
207 unsignedp, methods, class, binoptab)
208 rtx real0, real1, imag0, imag1, realr, imagr;
209 enum machine_mode submode;
211 enum optab_methods methods;
212 enum mode_class class;
219 optab this_add_optab = add_optab;
220 optab this_sub_optab = sub_optab;
221 optab this_neg_optab = neg_optab;
222 optab this_mul_optab = smul_optab;
224 if (binoptab == sdivv_optab)
226 this_add_optab = addv_optab;
227 this_sub_optab = subv_optab;
228 this_neg_optab = negv_optab;
229 this_mul_optab = smulv_optab;
232 /* Don't fetch these from memory more than once. */
233 real0 = force_reg (submode, real0);
234 real1 = force_reg (submode, real1);
237 imag0 = force_reg (submode, imag0);
239 imag1 = force_reg (submode, imag1);
241 /* Divisor: c*c + d*d. */
242 temp1 = expand_binop (submode, this_mul_optab, real1, real1,
243 NULL_RTX, unsignedp, methods);
245 temp2 = expand_binop (submode, this_mul_optab, imag1, imag1,
246 NULL_RTX, unsignedp, methods);
248 if (temp1 == 0 || temp2 == 0)
251 divisor = expand_binop (submode, this_add_optab, temp1, temp2,
252 NULL_RTX, unsignedp, methods);
258 /* Mathematically, ((a)(c-id))/divisor. */
259 /* Computationally, (a+i0) / (c+id) = (ac/(cc+dd)) + i(-ad/(cc+dd)). */
261 /* Calculate the dividend. */
262 real_t = expand_binop (submode, this_mul_optab, real0, real1,
263 NULL_RTX, unsignedp, methods);
265 imag_t = expand_binop (submode, this_mul_optab, real0, imag1,
266 NULL_RTX, unsignedp, methods);
268 if (real_t == 0 || imag_t == 0)
271 imag_t = expand_unop (submode, this_neg_optab, imag_t,
272 NULL_RTX, unsignedp);
276 /* Mathematically, ((a+ib)(c-id))/divider. */
277 /* Calculate the dividend. */
278 temp1 = expand_binop (submode, this_mul_optab, real0, real1,
279 NULL_RTX, unsignedp, methods);
281 temp2 = expand_binop (submode, this_mul_optab, imag0, imag1,
282 NULL_RTX, unsignedp, methods);
284 if (temp1 == 0 || temp2 == 0)
287 real_t = expand_binop (submode, this_add_optab, temp1, temp2,
288 NULL_RTX, unsignedp, methods);
290 temp1 = expand_binop (submode, this_mul_optab, imag0, real1,
291 NULL_RTX, unsignedp, methods);
293 temp2 = expand_binop (submode, this_mul_optab, real0, imag1,
294 NULL_RTX, unsignedp, methods);
296 if (temp1 == 0 || temp2 == 0)
299 imag_t = expand_binop (submode, this_sub_optab, temp1, temp2,
300 NULL_RTX, unsignedp, methods);
302 if (real_t == 0 || imag_t == 0)
306 if (class == MODE_COMPLEX_FLOAT)
307 res = expand_binop (submode, binoptab, real_t, divisor,
308 realr, unsignedp, methods);
310 res = expand_divmod (0, TRUNC_DIV_EXPR, submode,
311 real_t, divisor, realr, unsignedp);
317 emit_move_insn (realr, res);
319 if (class == MODE_COMPLEX_FLOAT)
320 res = expand_binop (submode, binoptab, imag_t, divisor,
321 imagr, unsignedp, methods);
323 res = expand_divmod (0, TRUNC_DIV_EXPR, submode,
324 imag_t, divisor, imagr, unsignedp);
330 emit_move_insn (imagr, res);
335 /* Generate code to perform a wide-input-range-acceptable complex divide. */
338 expand_cmplxdiv_wide (real0, real1, imag0, imag1, realr, imagr, submode,
339 unsignedp, methods, class, binoptab)
340 rtx real0, real1, imag0, imag1, realr, imagr;
341 enum machine_mode submode;
343 enum optab_methods methods;
344 enum mode_class class;
349 rtx temp1, temp2, lab1, lab2;
350 enum machine_mode mode;
353 optab this_add_optab = add_optab;
354 optab this_sub_optab = sub_optab;
355 optab this_neg_optab = neg_optab;
356 optab this_mul_optab = smul_optab;
358 if (binoptab == sdivv_optab)
360 this_add_optab = addv_optab;
361 this_sub_optab = subv_optab;
362 this_neg_optab = negv_optab;
363 this_mul_optab = smulv_optab;
366 /* Don't fetch these from memory more than once. */
367 real0 = force_reg (submode, real0);
368 real1 = force_reg (submode, real1);
371 imag0 = force_reg (submode, imag0);
373 imag1 = force_reg (submode, imag1);
375 /* XXX What's an "unsigned" complex number? */
383 temp1 = expand_abs (submode, real1, NULL_RTX, unsignedp, 1);
384 temp2 = expand_abs (submode, imag1, NULL_RTX, unsignedp, 1);
387 if (temp1 == 0 || temp2 == 0)
390 mode = GET_MODE (temp1);
391 align = GET_MODE_ALIGNMENT (mode);
392 lab1 = gen_label_rtx ();
393 emit_cmp_and_jump_insns (temp1, temp2, LT, NULL_RTX,
394 mode, unsignedp, align, lab1);
396 /* |c| >= |d|; use ratio d/c to scale dividend and divisor. */
398 if (class == MODE_COMPLEX_FLOAT)
399 ratio = expand_binop (submode, binoptab, imag1, real1,
400 NULL_RTX, unsignedp, methods);
402 ratio = expand_divmod (0, TRUNC_DIV_EXPR, submode,
403 imag1, real1, NULL_RTX, unsignedp);
408 /* Calculate divisor. */
410 temp1 = expand_binop (submode, this_mul_optab, imag1, ratio,
411 NULL_RTX, unsignedp, methods);
416 divisor = expand_binop (submode, this_add_optab, temp1, real1,
417 NULL_RTX, unsignedp, methods);
422 /* Calculate dividend. */
428 /* Compute a / (c+id) as a / (c+d(d/c)) + i (-a(d/c)) / (c+d(d/c)). */
430 imag_t = expand_binop (submode, this_mul_optab, real0, ratio,
431 NULL_RTX, unsignedp, methods);
436 imag_t = expand_unop (submode, this_neg_optab, imag_t,
437 NULL_RTX, unsignedp);
439 if (real_t == 0 || imag_t == 0)
444 /* Compute (a+ib)/(c+id) as
445 (a+b(d/c))/(c+d(d/c) + i(b-a(d/c))/(c+d(d/c)). */
447 temp1 = expand_binop (submode, this_mul_optab, imag0, ratio,
448 NULL_RTX, unsignedp, methods);
453 real_t = expand_binop (submode, this_add_optab, temp1, real0,
454 NULL_RTX, unsignedp, methods);
456 temp1 = expand_binop (submode, this_mul_optab, real0, ratio,
457 NULL_RTX, unsignedp, methods);
462 imag_t = expand_binop (submode, this_sub_optab, imag0, temp1,
463 NULL_RTX, unsignedp, methods);
465 if (real_t == 0 || imag_t == 0)
469 if (class == MODE_COMPLEX_FLOAT)
470 res = expand_binop (submode, binoptab, real_t, divisor,
471 realr, unsignedp, methods);
473 res = expand_divmod (0, TRUNC_DIV_EXPR, submode,
474 real_t, divisor, realr, unsignedp);
480 emit_move_insn (realr, res);
482 if (class == MODE_COMPLEX_FLOAT)
483 res = expand_binop (submode, binoptab, imag_t, divisor,
484 imagr, unsignedp, methods);
486 res = expand_divmod (0, TRUNC_DIV_EXPR, submode,
487 imag_t, divisor, imagr, unsignedp);
493 emit_move_insn (imagr, res);
495 lab2 = gen_label_rtx ();
496 emit_jump_insn (gen_jump (lab2));
501 /* |d| > |c|; use ratio c/d to scale dividend and divisor. */
503 if (class == MODE_COMPLEX_FLOAT)
504 ratio = expand_binop (submode, binoptab, real1, imag1,
505 NULL_RTX, unsignedp, methods);
507 ratio = expand_divmod (0, TRUNC_DIV_EXPR, submode,
508 real1, imag1, NULL_RTX, unsignedp);
513 /* Calculate divisor. */
515 temp1 = expand_binop (submode, this_mul_optab, real1, ratio,
516 NULL_RTX, unsignedp, methods);
521 divisor = expand_binop (submode, this_add_optab, temp1, imag1,
522 NULL_RTX, unsignedp, methods);
527 /* Calculate dividend. */
531 /* Compute a / (c+id) as a(c/d) / (c(c/d)+d) + i (-a) / (c(c/d)+d). */
533 real_t = expand_binop (submode, this_mul_optab, real0, ratio,
534 NULL_RTX, unsignedp, methods);
536 imag_t = expand_unop (submode, this_neg_optab, real0,
537 NULL_RTX, unsignedp);
539 if (real_t == 0 || imag_t == 0)
544 /* Compute (a+ib)/(c+id) as
545 (a(c/d)+b)/(c(c/d)+d) + i (b(c/d)-a)/(c(c/d)+d). */
547 temp1 = expand_binop (submode, this_mul_optab, real0, ratio,
548 NULL_RTX, unsignedp, methods);
553 real_t = expand_binop (submode, this_add_optab, temp1, imag0,
554 NULL_RTX, unsignedp, methods);
556 temp1 = expand_binop (submode, this_mul_optab, imag0, ratio,
557 NULL_RTX, unsignedp, methods);
562 imag_t = expand_binop (submode, this_sub_optab, temp1, real0,
563 NULL_RTX, unsignedp, methods);
565 if (real_t == 0 || imag_t == 0)
569 if (class == MODE_COMPLEX_FLOAT)
570 res = expand_binop (submode, binoptab, real_t, divisor,
571 realr, unsignedp, methods);
573 res = expand_divmod (0, TRUNC_DIV_EXPR, submode,
574 real_t, divisor, realr, unsignedp);
580 emit_move_insn (realr, res);
582 if (class == MODE_COMPLEX_FLOAT)
583 res = expand_binop (submode, binoptab, imag_t, divisor,
584 imagr, unsignedp, methods);
586 res = expand_divmod (0, TRUNC_DIV_EXPR, submode,
587 imag_t, divisor, imagr, unsignedp);
593 emit_move_insn (imagr, res);
600 /* Generate code to perform an operation specified by BINOPTAB
601 on operands OP0 and OP1, with result having machine-mode MODE.
603 UNSIGNEDP is for the case where we have to widen the operands
604 to perform the operation. It says to use zero-extension.
606 If TARGET is nonzero, the value
607 is generated there, if it is convenient to do so.
608 In all cases an rtx is returned for the locus of the value;
609 this may or may not be TARGET. */
612 expand_binop (mode, binoptab, op0, op1, target, unsignedp, methods)
613 enum machine_mode mode;
618 enum optab_methods methods;
620 enum optab_methods next_methods
621 = (methods == OPTAB_LIB || methods == OPTAB_LIB_WIDEN
622 ? OPTAB_WIDEN : methods);
623 enum mode_class class;
624 enum machine_mode wider_mode;
626 int commutative_op = 0;
627 int shift_op = (binoptab->code == ASHIFT
628 || binoptab->code == ASHIFTRT
629 || binoptab->code == LSHIFTRT
630 || binoptab->code == ROTATE
631 || binoptab->code == ROTATERT);
632 rtx entry_last = get_last_insn ();
635 class = GET_MODE_CLASS (mode);
637 op0 = protect_from_queue (op0, 0);
638 op1 = protect_from_queue (op1, 0);
640 target = protect_from_queue (target, 1);
644 op0 = force_not_mem (op0);
645 op1 = force_not_mem (op1);
648 /* If subtracting an integer constant, convert this into an addition of
649 the negated constant. */
651 if (binoptab == sub_optab && GET_CODE (op1) == CONST_INT)
653 op1 = negate_rtx (mode, op1);
654 binoptab = add_optab;
657 /* If we are inside an appropriately-short loop and one operand is an
658 expensive constant, force it into a register. */
659 if (CONSTANT_P (op0) && preserve_subexpressions_p ()
660 && rtx_cost (op0, binoptab->code) > COSTS_N_INSNS (1))
661 op0 = force_reg (mode, op0);
663 if (CONSTANT_P (op1) && preserve_subexpressions_p ()
664 && ! shift_op && rtx_cost (op1, binoptab->code) > COSTS_N_INSNS (1))
665 op1 = force_reg (mode, op1);
667 /* Record where to delete back to if we backtrack. */
668 last = get_last_insn ();
670 /* If operation is commutative,
671 try to make the first operand a register.
672 Even better, try to make it the same as the target.
673 Also try to make the last operand a constant. */
674 if (GET_RTX_CLASS (binoptab->code) == 'c'
675 || binoptab == smul_widen_optab
676 || binoptab == umul_widen_optab
677 || binoptab == smul_highpart_optab
678 || binoptab == umul_highpart_optab)
682 if (((target == 0 || GET_CODE (target) == REG)
683 ? ((GET_CODE (op1) == REG
684 && GET_CODE (op0) != REG)
686 : rtx_equal_p (op1, target))
687 || GET_CODE (op0) == CONST_INT)
695 /* If we can do it with a three-operand insn, do so. */
697 if (methods != OPTAB_MUST_WIDEN
698 && binoptab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
700 int icode = (int) binoptab->handlers[(int) mode].insn_code;
701 enum machine_mode mode0 = insn_data[icode].operand[1].mode;
702 enum machine_mode mode1 = insn_data[icode].operand[2].mode;
704 rtx xop0 = op0, xop1 = op1;
709 temp = gen_reg_rtx (mode);
711 /* If it is a commutative operator and the modes would match
712 if we would swap the operands, we can save the conversions. */
715 if (GET_MODE (op0) != mode0 && GET_MODE (op1) != mode1
716 && GET_MODE (op0) == mode1 && GET_MODE (op1) == mode0)
720 tmp = op0; op0 = op1; op1 = tmp;
721 tmp = xop0; xop0 = xop1; xop1 = tmp;
725 /* In case the insn wants input operands in modes different from
726 the result, convert the operands. */
728 if (GET_MODE (op0) != VOIDmode
729 && GET_MODE (op0) != mode0
730 && mode0 != VOIDmode)
731 xop0 = convert_to_mode (mode0, xop0, unsignedp);
733 if (GET_MODE (xop1) != VOIDmode
734 && GET_MODE (xop1) != mode1
735 && mode1 != VOIDmode)
736 xop1 = convert_to_mode (mode1, xop1, unsignedp);
738 /* Now, if insn's predicates don't allow our operands, put them into
741 if (! (*insn_data[icode].operand[1].predicate) (xop0, mode0)
742 && mode0 != VOIDmode)
743 xop0 = copy_to_mode_reg (mode0, xop0);
745 if (! (*insn_data[icode].operand[2].predicate) (xop1, mode1)
746 && mode1 != VOIDmode)
747 xop1 = copy_to_mode_reg (mode1, xop1);
749 if (! (*insn_data[icode].operand[0].predicate) (temp, mode))
750 temp = gen_reg_rtx (mode);
752 pat = GEN_FCN (icode) (temp, xop0, xop1);
755 /* If PAT is a multi-insn sequence, try to add an appropriate
756 REG_EQUAL note to it. If we can't because TEMP conflicts with an
757 operand, call ourselves again, this time without a target. */
758 if (GET_CODE (pat) == SEQUENCE
759 && ! add_equal_note (pat, temp, binoptab->code, xop0, xop1))
761 delete_insns_since (last);
762 return expand_binop (mode, binoptab, op0, op1, NULL_RTX,
770 delete_insns_since (last);
773 /* If this is a multiply, see if we can do a widening operation that
774 takes operands of this mode and makes a wider mode. */
776 if (binoptab == smul_optab && GET_MODE_WIDER_MODE (mode) != VOIDmode
777 && (((unsignedp ? umul_widen_optab : smul_widen_optab)
778 ->handlers[(int) GET_MODE_WIDER_MODE (mode)].insn_code)
779 != CODE_FOR_nothing))
781 temp = expand_binop (GET_MODE_WIDER_MODE (mode),
782 unsignedp ? umul_widen_optab : smul_widen_optab,
783 op0, op1, NULL_RTX, unsignedp, OPTAB_DIRECT);
787 if (GET_MODE_CLASS (mode) == MODE_INT)
788 return gen_lowpart (mode, temp);
790 return convert_to_mode (mode, temp, unsignedp);
794 /* Look for a wider mode of the same class for which we think we
795 can open-code the operation. Check for a widening multiply at the
796 wider mode as well. */
798 if ((class == MODE_INT || class == MODE_FLOAT || class == MODE_COMPLEX_FLOAT)
799 && methods != OPTAB_DIRECT && methods != OPTAB_LIB)
800 for (wider_mode = GET_MODE_WIDER_MODE (mode); wider_mode != VOIDmode;
801 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
803 if (binoptab->handlers[(int) wider_mode].insn_code != CODE_FOR_nothing
804 || (binoptab == smul_optab
805 && GET_MODE_WIDER_MODE (wider_mode) != VOIDmode
806 && (((unsignedp ? umul_widen_optab : smul_widen_optab)
807 ->handlers[(int) GET_MODE_WIDER_MODE (wider_mode)].insn_code)
808 != CODE_FOR_nothing)))
810 rtx xop0 = op0, xop1 = op1;
813 /* For certain integer operations, we need not actually extend
814 the narrow operands, as long as we will truncate
815 the results to the same narrowness. */
817 if ((binoptab == ior_optab || binoptab == and_optab
818 || binoptab == xor_optab
819 || binoptab == add_optab || binoptab == sub_optab
820 || binoptab == smul_optab || binoptab == ashl_optab)
821 && class == MODE_INT)
824 xop0 = widen_operand (xop0, wider_mode, mode, unsignedp, no_extend);
826 /* The second operand of a shift must always be extended. */
827 xop1 = widen_operand (xop1, wider_mode, mode, unsignedp,
828 no_extend && binoptab != ashl_optab);
830 temp = expand_binop (wider_mode, binoptab, xop0, xop1, NULL_RTX,
831 unsignedp, OPTAB_DIRECT);
834 if (class != MODE_INT)
837 target = gen_reg_rtx (mode);
838 convert_move (target, temp, 0);
842 return gen_lowpart (mode, temp);
845 delete_insns_since (last);
849 /* These can be done a word at a time. */
850 if ((binoptab == and_optab || binoptab == ior_optab || binoptab == xor_optab)
852 && GET_MODE_SIZE (mode) > UNITS_PER_WORD
853 && binoptab->handlers[(int) word_mode].insn_code != CODE_FOR_nothing)
859 /* If TARGET is the same as one of the operands, the REG_EQUAL note
860 won't be accurate, so use a new target. */
861 if (target == 0 || target == op0 || target == op1)
862 target = gen_reg_rtx (mode);
866 /* Do the actual arithmetic. */
867 for (i = 0; i < GET_MODE_BITSIZE (mode) / BITS_PER_WORD; i++)
869 rtx target_piece = operand_subword (target, i, 1, mode);
870 rtx x = expand_binop (word_mode, binoptab,
871 operand_subword_force (op0, i, mode),
872 operand_subword_force (op1, i, mode),
873 target_piece, unsignedp, next_methods);
878 if (target_piece != x)
879 emit_move_insn (target_piece, x);
882 insns = get_insns ();
885 if (i == GET_MODE_BITSIZE (mode) / BITS_PER_WORD)
887 if (binoptab->code != UNKNOWN)
889 = gen_rtx_fmt_ee (binoptab->code, mode,
890 copy_rtx (op0), copy_rtx (op1));
894 emit_no_conflict_block (insns, target, op0, op1, equiv_value);
899 /* Synthesize double word shifts from single word shifts. */
900 if ((binoptab == lshr_optab || binoptab == ashl_optab
901 || binoptab == ashr_optab)
903 && GET_CODE (op1) == CONST_INT
904 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
905 && binoptab->handlers[(int) word_mode].insn_code != CODE_FOR_nothing
906 && ashl_optab->handlers[(int) word_mode].insn_code != CODE_FOR_nothing
907 && lshr_optab->handlers[(int) word_mode].insn_code != CODE_FOR_nothing)
909 rtx insns, inter, equiv_value;
910 rtx into_target, outof_target;
911 rtx into_input, outof_input;
912 int shift_count, left_shift, outof_word;
914 /* If TARGET is the same as one of the operands, the REG_EQUAL note
915 won't be accurate, so use a new target. */
916 if (target == 0 || target == op0 || target == op1)
917 target = gen_reg_rtx (mode);
921 shift_count = INTVAL (op1);
923 /* OUTOF_* is the word we are shifting bits away from, and
924 INTO_* is the word that we are shifting bits towards, thus
925 they differ depending on the direction of the shift and
928 left_shift = binoptab == ashl_optab;
929 outof_word = left_shift ^ ! WORDS_BIG_ENDIAN;
931 outof_target = operand_subword (target, outof_word, 1, mode);
932 into_target = operand_subword (target, 1 - outof_word, 1, mode);
934 outof_input = operand_subword_force (op0, outof_word, mode);
935 into_input = operand_subword_force (op0, 1 - outof_word, mode);
937 if (shift_count >= BITS_PER_WORD)
939 inter = expand_binop (word_mode, binoptab,
941 GEN_INT (shift_count - BITS_PER_WORD),
942 into_target, unsignedp, next_methods);
944 if (inter != 0 && inter != into_target)
945 emit_move_insn (into_target, inter);
947 /* For a signed right shift, we must fill the word we are shifting
948 out of with copies of the sign bit. Otherwise it is zeroed. */
949 if (inter != 0 && binoptab != ashr_optab)
950 inter = CONST0_RTX (word_mode);
952 inter = expand_binop (word_mode, binoptab,
954 GEN_INT (BITS_PER_WORD - 1),
955 outof_target, unsignedp, next_methods);
957 if (inter != 0 && inter != outof_target)
958 emit_move_insn (outof_target, inter);
963 optab reverse_unsigned_shift, unsigned_shift;
965 /* For a shift of less then BITS_PER_WORD, to compute the carry,
966 we must do a logical shift in the opposite direction of the
969 reverse_unsigned_shift = (left_shift ? lshr_optab : ashl_optab);
971 /* For a shift of less than BITS_PER_WORD, to compute the word
972 shifted towards, we need to unsigned shift the orig value of
975 unsigned_shift = (left_shift ? ashl_optab : lshr_optab);
977 carries = expand_binop (word_mode, reverse_unsigned_shift,
979 GEN_INT (BITS_PER_WORD - shift_count),
980 0, unsignedp, next_methods);
985 inter = expand_binop (word_mode, unsigned_shift, into_input,
986 op1, 0, unsignedp, next_methods);
989 inter = expand_binop (word_mode, ior_optab, carries, inter,
990 into_target, unsignedp, next_methods);
992 if (inter != 0 && inter != into_target)
993 emit_move_insn (into_target, inter);
996 inter = expand_binop (word_mode, binoptab, outof_input,
997 op1, outof_target, unsignedp, next_methods);
999 if (inter != 0 && inter != outof_target)
1000 emit_move_insn (outof_target, inter);
1003 insns = get_insns ();
1008 if (binoptab->code != UNKNOWN)
1009 equiv_value = gen_rtx_fmt_ee (binoptab->code, mode, op0, op1);
1013 emit_no_conflict_block (insns, target, op0, op1, equiv_value);
1018 /* Synthesize double word rotates from single word shifts. */
1019 if ((binoptab == rotl_optab || binoptab == rotr_optab)
1020 && class == MODE_INT
1021 && GET_CODE (op1) == CONST_INT
1022 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
1023 && ashl_optab->handlers[(int) word_mode].insn_code != CODE_FOR_nothing
1024 && lshr_optab->handlers[(int) word_mode].insn_code != CODE_FOR_nothing)
1026 rtx insns, equiv_value;
1027 rtx into_target, outof_target;
1028 rtx into_input, outof_input;
1030 int shift_count, left_shift, outof_word;
1032 /* If TARGET is the same as one of the operands, the REG_EQUAL note
1033 won't be accurate, so use a new target. */
1034 if (target == 0 || target == op0 || target == op1)
1035 target = gen_reg_rtx (mode);
1039 shift_count = INTVAL (op1);
1041 /* OUTOF_* is the word we are shifting bits away from, and
1042 INTO_* is the word that we are shifting bits towards, thus
1043 they differ depending on the direction of the shift and
1044 WORDS_BIG_ENDIAN. */
1046 left_shift = (binoptab == rotl_optab);
1047 outof_word = left_shift ^ ! WORDS_BIG_ENDIAN;
1049 outof_target = operand_subword (target, outof_word, 1, mode);
1050 into_target = operand_subword (target, 1 - outof_word, 1, mode);
1052 outof_input = operand_subword_force (op0, outof_word, mode);
1053 into_input = operand_subword_force (op0, 1 - outof_word, mode);
1055 if (shift_count == BITS_PER_WORD)
1057 /* This is just a word swap. */
1058 emit_move_insn (outof_target, into_input);
1059 emit_move_insn (into_target, outof_input);
1064 rtx into_temp1, into_temp2, outof_temp1, outof_temp2;
1065 rtx first_shift_count, second_shift_count;
1066 optab reverse_unsigned_shift, unsigned_shift;
1068 reverse_unsigned_shift = (left_shift ^ (shift_count < BITS_PER_WORD)
1069 ? lshr_optab : ashl_optab);
1071 unsigned_shift = (left_shift ^ (shift_count < BITS_PER_WORD)
1072 ? ashl_optab : lshr_optab);
1074 if (shift_count > BITS_PER_WORD)
1076 first_shift_count = GEN_INT (shift_count - BITS_PER_WORD);
1077 second_shift_count = GEN_INT (2*BITS_PER_WORD - shift_count);
1081 first_shift_count = GEN_INT (BITS_PER_WORD - shift_count);
1082 second_shift_count = GEN_INT (shift_count);
1085 into_temp1 = expand_binop (word_mode, unsigned_shift,
1086 outof_input, first_shift_count,
1087 NULL_RTX, unsignedp, next_methods);
1088 into_temp2 = expand_binop (word_mode, reverse_unsigned_shift,
1089 into_input, second_shift_count,
1090 into_target, unsignedp, next_methods);
1092 if (into_temp1 != 0 && into_temp2 != 0)
1093 inter = expand_binop (word_mode, ior_optab, into_temp1, into_temp2,
1094 into_target, unsignedp, next_methods);
1098 if (inter != 0 && inter != into_target)
1099 emit_move_insn (into_target, inter);
1101 outof_temp1 = expand_binop (word_mode, unsigned_shift,
1102 into_input, first_shift_count,
1103 NULL_RTX, unsignedp, next_methods);
1104 outof_temp2 = expand_binop (word_mode, reverse_unsigned_shift,
1105 outof_input, second_shift_count,
1106 outof_target, unsignedp, next_methods);
1108 if (inter != 0 && outof_temp1 != 0 && outof_temp2 != 0)
1109 inter = expand_binop (word_mode, ior_optab,
1110 outof_temp1, outof_temp2,
1111 outof_target, unsignedp, next_methods);
1113 if (inter != 0 && inter != outof_target)
1114 emit_move_insn (outof_target, inter);
1117 insns = get_insns ();
1122 if (binoptab->code != UNKNOWN)
1123 equiv_value = gen_rtx_fmt_ee (binoptab->code, mode, op0, op1);
1127 /* We can't make this a no conflict block if this is a word swap,
1128 because the word swap case fails if the input and output values
1129 are in the same register. */
1130 if (shift_count != BITS_PER_WORD)
1131 emit_no_conflict_block (insns, target, op0, op1, equiv_value);
1140 /* These can be done a word at a time by propagating carries. */
1141 if ((binoptab == add_optab || binoptab == sub_optab)
1142 && class == MODE_INT
1143 && GET_MODE_SIZE (mode) >= 2 * UNITS_PER_WORD
1144 && binoptab->handlers[(int) word_mode].insn_code != CODE_FOR_nothing)
1147 rtx carry_tmp = gen_reg_rtx (word_mode);
1148 optab otheroptab = binoptab == add_optab ? sub_optab : add_optab;
1149 unsigned int nwords = GET_MODE_BITSIZE (mode) / BITS_PER_WORD;
1150 rtx carry_in = NULL_RTX, carry_out = NULL_RTX;
1153 /* We can handle either a 1 or -1 value for the carry. If STORE_FLAG
1154 value is one of those, use it. Otherwise, use 1 since it is the
1155 one easiest to get. */
1156 #if STORE_FLAG_VALUE == 1 || STORE_FLAG_VALUE == -1
1157 int normalizep = STORE_FLAG_VALUE;
1162 /* Prepare the operands. */
1163 xop0 = force_reg (mode, op0);
1164 xop1 = force_reg (mode, op1);
1166 if (target == 0 || GET_CODE (target) != REG
1167 || target == xop0 || target == xop1)
1168 target = gen_reg_rtx (mode);
1170 /* Indicate for flow that the entire target reg is being set. */
1171 if (GET_CODE (target) == REG)
1172 emit_insn (gen_rtx_CLOBBER (VOIDmode, target));
1174 /* Do the actual arithmetic. */
1175 for (i = 0; i < nwords; i++)
1177 int index = (WORDS_BIG_ENDIAN ? nwords - i - 1 : i);
1178 rtx target_piece = operand_subword (target, index, 1, mode);
1179 rtx op0_piece = operand_subword_force (xop0, index, mode);
1180 rtx op1_piece = operand_subword_force (xop1, index, mode);
1183 /* Main add/subtract of the input operands. */
1184 x = expand_binop (word_mode, binoptab,
1185 op0_piece, op1_piece,
1186 target_piece, unsignedp, next_methods);
1192 /* Store carry from main add/subtract. */
1193 carry_out = gen_reg_rtx (word_mode);
1194 carry_out = emit_store_flag_force (carry_out,
1195 (binoptab == add_optab
1198 word_mode, 1, normalizep);
1203 /* Add/subtract previous carry to main result. */
1204 x = expand_binop (word_mode,
1205 normalizep == 1 ? binoptab : otheroptab,
1207 target_piece, 1, next_methods);
1210 else if (target_piece != x)
1211 emit_move_insn (target_piece, x);
1215 /* THIS CODE HAS NOT BEEN TESTED. */
1216 /* Get out carry from adding/subtracting carry in. */
1217 carry_tmp = emit_store_flag_force (carry_tmp,
1218 binoptab == add_optab
1221 word_mode, 1, normalizep);
1223 /* Logical-ior the two poss. carry together. */
1224 carry_out = expand_binop (word_mode, ior_optab,
1225 carry_out, carry_tmp,
1226 carry_out, 0, next_methods);
1232 carry_in = carry_out;
1235 if (i == GET_MODE_BITSIZE (mode) / BITS_PER_WORD)
1237 if (mov_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
1239 rtx temp = emit_move_insn (target, target);
1241 set_unique_reg_note (temp,
1243 gen_rtx_fmt_ee (binoptab->code, mode,
1252 delete_insns_since (last);
1255 /* If we want to multiply two two-word values and have normal and widening
1256 multiplies of single-word values, we can do this with three smaller
1257 multiplications. Note that we do not make a REG_NO_CONFLICT block here
1258 because we are not operating on one word at a time.
1260 The multiplication proceeds as follows:
1261 _______________________
1262 [__op0_high_|__op0_low__]
1263 _______________________
1264 * [__op1_high_|__op1_low__]
1265 _______________________________________________
1266 _______________________
1267 (1) [__op0_low__*__op1_low__]
1268 _______________________
1269 (2a) [__op0_low__*__op1_high_]
1270 _______________________
1271 (2b) [__op0_high_*__op1_low__]
1272 _______________________
1273 (3) [__op0_high_*__op1_high_]
1276 This gives a 4-word result. Since we are only interested in the
1277 lower 2 words, partial result (3) and the upper words of (2a) and
1278 (2b) don't need to be calculated. Hence (2a) and (2b) can be
1279 calculated using non-widening multiplication.
1281 (1), however, needs to be calculated with an unsigned widening
1282 multiplication. If this operation is not directly supported we
1283 try using a signed widening multiplication and adjust the result.
1284 This adjustment works as follows:
1286 If both operands are positive then no adjustment is needed.
1288 If the operands have different signs, for example op0_low < 0 and
1289 op1_low >= 0, the instruction treats the most significant bit of
1290 op0_low as a sign bit instead of a bit with significance
1291 2**(BITS_PER_WORD-1), i.e. the instruction multiplies op1_low
1292 with 2**BITS_PER_WORD - op0_low, and two's complements the
1293 result. Conclusion: We need to add op1_low * 2**BITS_PER_WORD to
1296 Similarly, if both operands are negative, we need to add
1297 (op0_low + op1_low) * 2**BITS_PER_WORD.
1299 We use a trick to adjust quickly. We logically shift op0_low right
1300 (op1_low) BITS_PER_WORD-1 steps to get 0 or 1, and add this to
1301 op0_high (op1_high) before it is used to calculate 2b (2a). If no
1302 logical shift exists, we do an arithmetic right shift and subtract
1305 if (binoptab == smul_optab
1306 && class == MODE_INT
1307 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
1308 && smul_optab->handlers[(int) word_mode].insn_code != CODE_FOR_nothing
1309 && add_optab->handlers[(int) word_mode].insn_code != CODE_FOR_nothing
1310 && ((umul_widen_optab->handlers[(int) mode].insn_code
1311 != CODE_FOR_nothing)
1312 || (smul_widen_optab->handlers[(int) mode].insn_code
1313 != CODE_FOR_nothing)))
1315 int low = (WORDS_BIG_ENDIAN ? 1 : 0);
1316 int high = (WORDS_BIG_ENDIAN ? 0 : 1);
1317 rtx op0_high = operand_subword_force (op0, high, mode);
1318 rtx op0_low = operand_subword_force (op0, low, mode);
1319 rtx op1_high = operand_subword_force (op1, high, mode);
1320 rtx op1_low = operand_subword_force (op1, low, mode);
1322 rtx op0_xhigh = NULL_RTX;
1323 rtx op1_xhigh = NULL_RTX;
1325 /* If the target is the same as one of the inputs, don't use it. This
1326 prevents problems with the REG_EQUAL note. */
1327 if (target == op0 || target == op1
1328 || (target != 0 && GET_CODE (target) != REG))
1331 /* Multiply the two lower words to get a double-word product.
1332 If unsigned widening multiplication is available, use that;
1333 otherwise use the signed form and compensate. */
1335 if (umul_widen_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
1337 product = expand_binop (mode, umul_widen_optab, op0_low, op1_low,
1338 target, 1, OPTAB_DIRECT);
1340 /* If we didn't succeed, delete everything we did so far. */
1342 delete_insns_since (last);
1344 op0_xhigh = op0_high, op1_xhigh = op1_high;
1348 && smul_widen_optab->handlers[(int) mode].insn_code
1349 != CODE_FOR_nothing)
1351 rtx wordm1 = GEN_INT (BITS_PER_WORD - 1);
1352 product = expand_binop (mode, smul_widen_optab, op0_low, op1_low,
1353 target, 1, OPTAB_DIRECT);
1354 op0_xhigh = expand_binop (word_mode, lshr_optab, op0_low, wordm1,
1355 NULL_RTX, 1, next_methods);
1357 op0_xhigh = expand_binop (word_mode, add_optab, op0_high,
1358 op0_xhigh, op0_xhigh, 0, next_methods);
1361 op0_xhigh = expand_binop (word_mode, ashr_optab, op0_low, wordm1,
1362 NULL_RTX, 0, next_methods);
1364 op0_xhigh = expand_binop (word_mode, sub_optab, op0_high,
1365 op0_xhigh, op0_xhigh, 0,
1369 op1_xhigh = expand_binop (word_mode, lshr_optab, op1_low, wordm1,
1370 NULL_RTX, 1, next_methods);
1372 op1_xhigh = expand_binop (word_mode, add_optab, op1_high,
1373 op1_xhigh, op1_xhigh, 0, next_methods);
1376 op1_xhigh = expand_binop (word_mode, ashr_optab, op1_low, wordm1,
1377 NULL_RTX, 0, next_methods);
1379 op1_xhigh = expand_binop (word_mode, sub_optab, op1_high,
1380 op1_xhigh, op1_xhigh, 0,
1385 /* If we have been able to directly compute the product of the
1386 low-order words of the operands and perform any required adjustments
1387 of the operands, we proceed by trying two more multiplications
1388 and then computing the appropriate sum.
1390 We have checked above that the required addition is provided.
1391 Full-word addition will normally always succeed, especially if
1392 it is provided at all, so we don't worry about its failure. The
1393 multiplication may well fail, however, so we do handle that. */
1395 if (product && op0_xhigh && op1_xhigh)
1397 rtx product_high = operand_subword (product, high, 1, mode);
1398 rtx temp = expand_binop (word_mode, binoptab, op0_low, op1_xhigh,
1399 NULL_RTX, 0, OPTAB_DIRECT);
1402 temp = expand_binop (word_mode, add_optab, temp, product_high,
1403 product_high, 0, next_methods);
1405 if (temp != 0 && temp != product_high)
1406 emit_move_insn (product_high, temp);
1409 temp = expand_binop (word_mode, binoptab, op1_low, op0_xhigh,
1410 NULL_RTX, 0, OPTAB_DIRECT);
1413 temp = expand_binop (word_mode, add_optab, temp,
1414 product_high, product_high,
1417 if (temp != 0 && temp != product_high)
1418 emit_move_insn (product_high, temp);
1422 if (mov_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
1424 temp = emit_move_insn (product, product);
1425 set_unique_reg_note (temp,
1427 gen_rtx_fmt_ee (MULT, mode,
1436 /* If we get here, we couldn't do it for some reason even though we
1437 originally thought we could. Delete anything we've emitted in
1440 delete_insns_since (last);
1443 /* We need to open-code the complex type operations: '+, -, * and /' */
1445 /* At this point we allow operations between two similar complex
1446 numbers, and also if one of the operands is not a complex number
1447 but rather of MODE_FLOAT or MODE_INT. However, the caller
1448 must make sure that the MODE of the non-complex operand matches
1449 the SUBMODE of the complex operand. */
1451 if (class == MODE_COMPLEX_FLOAT || class == MODE_COMPLEX_INT)
1453 rtx real0 = 0, imag0 = 0;
1454 rtx real1 = 0, imag1 = 0;
1455 rtx realr, imagr, res;
1460 /* Find the correct mode for the real and imaginary parts */
1461 enum machine_mode submode
1462 = mode_for_size (GET_MODE_UNIT_SIZE (mode) * BITS_PER_UNIT,
1463 class == MODE_COMPLEX_INT ? MODE_INT : MODE_FLOAT,
1466 if (submode == BLKmode)
1470 target = gen_reg_rtx (mode);
1474 realr = gen_realpart (submode, target);
1475 imagr = gen_imagpart (submode, target);
1477 if (GET_MODE (op0) == mode)
1479 real0 = gen_realpart (submode, op0);
1480 imag0 = gen_imagpart (submode, op0);
1485 if (GET_MODE (op1) == mode)
1487 real1 = gen_realpart (submode, op1);
1488 imag1 = gen_imagpart (submode, op1);
1493 if (real0 == 0 || real1 == 0 || ! (imag0 != 0|| imag1 != 0))
1496 switch (binoptab->code)
1499 /* (a+ib) + (c+id) = (a+c) + i(b+d) */
1501 /* (a+ib) - (c+id) = (a-c) + i(b-d) */
1502 res = expand_binop (submode, binoptab, real0, real1,
1503 realr, unsignedp, methods);
1507 else if (res != realr)
1508 emit_move_insn (realr, res);
1511 res = expand_binop (submode, binoptab, imag0, imag1,
1512 imagr, unsignedp, methods);
1515 else if (binoptab->code == MINUS)
1516 res = expand_unop (submode,
1517 binoptab == subv_optab ? negv_optab : neg_optab,
1518 imag1, imagr, unsignedp);
1524 else if (res != imagr)
1525 emit_move_insn (imagr, res);
1531 /* (a+ib) * (c+id) = (ac-bd) + i(ad+cb) */
1537 /* Don't fetch these from memory more than once. */
1538 real0 = force_reg (submode, real0);
1539 real1 = force_reg (submode, real1);
1540 imag0 = force_reg (submode, imag0);
1541 imag1 = force_reg (submode, imag1);
1543 temp1 = expand_binop (submode, binoptab, real0, real1, NULL_RTX,
1544 unsignedp, methods);
1546 temp2 = expand_binop (submode, binoptab, imag0, imag1, NULL_RTX,
1547 unsignedp, methods);
1549 if (temp1 == 0 || temp2 == 0)
1554 binoptab == smulv_optab ? subv_optab : sub_optab,
1555 temp1, temp2, realr, unsignedp, methods));
1559 else if (res != realr)
1560 emit_move_insn (realr, res);
1562 temp1 = expand_binop (submode, binoptab, real0, imag1,
1563 NULL_RTX, unsignedp, methods);
1565 temp2 = expand_binop (submode, binoptab, real1, imag0,
1566 NULL_RTX, unsignedp, methods);
1568 if (temp1 == 0 || temp2 == 0)
1573 binoptab == smulv_optab ? addv_optab : add_optab,
1574 temp1, temp2, imagr, unsignedp, methods));
1578 else if (res != imagr)
1579 emit_move_insn (imagr, res);
1585 /* Don't fetch these from memory more than once. */
1586 real0 = force_reg (submode, real0);
1587 real1 = force_reg (submode, real1);
1589 res = expand_binop (submode, binoptab, real0, real1,
1590 realr, unsignedp, methods);
1593 else if (res != realr)
1594 emit_move_insn (realr, res);
1597 res = expand_binop (submode, binoptab,
1598 real1, imag0, imagr, unsignedp, methods);
1600 res = expand_binop (submode, binoptab,
1601 real0, imag1, imagr, unsignedp, methods);
1605 else if (res != imagr)
1606 emit_move_insn (imagr, res);
1613 /* (a+ib) / (c+id) = ((ac+bd)/(cc+dd)) + i((bc-ad)/(cc+dd)) */
1617 /* (a+ib) / (c+i0) = (a/c) + i(b/c) */
1619 /* Don't fetch these from memory more than once. */
1620 real1 = force_reg (submode, real1);
1622 /* Simply divide the real and imaginary parts by `c' */
1623 if (class == MODE_COMPLEX_FLOAT)
1624 res = expand_binop (submode, binoptab, real0, real1,
1625 realr, unsignedp, methods);
1627 res = expand_divmod (0, TRUNC_DIV_EXPR, submode,
1628 real0, real1, realr, unsignedp);
1632 else if (res != realr)
1633 emit_move_insn (realr, res);
1635 if (class == MODE_COMPLEX_FLOAT)
1636 res = expand_binop (submode, binoptab, imag0, real1,
1637 imagr, unsignedp, methods);
1639 res = expand_divmod (0, TRUNC_DIV_EXPR, submode,
1640 imag0, real1, imagr, unsignedp);
1644 else if (res != imagr)
1645 emit_move_insn (imagr, res);
1651 switch (flag_complex_divide_method)
1654 ok = expand_cmplxdiv_straight (real0, real1, imag0, imag1,
1655 realr, imagr, submode,
1661 ok = expand_cmplxdiv_wide (real0, real1, imag0, imag1,
1662 realr, imagr, submode,
1682 if (binoptab->code != UNKNOWN)
1684 = gen_rtx_fmt_ee (binoptab->code, mode,
1685 copy_rtx (op0), copy_rtx (op1));
1689 emit_no_conflict_block (seq, target, op0, op1, equiv_value);
1695 /* It can't be open-coded in this mode.
1696 Use a library call if one is available and caller says that's ok. */
1698 if (binoptab->handlers[(int) mode].libfunc
1699 && (methods == OPTAB_LIB || methods == OPTAB_LIB_WIDEN))
1703 enum machine_mode op1_mode = mode;
1710 op1_mode = word_mode;
1711 /* Specify unsigned here,
1712 since negative shift counts are meaningless. */
1713 op1x = convert_to_mode (word_mode, op1, 1);
1716 if (GET_MODE (op0) != VOIDmode
1717 && GET_MODE (op0) != mode)
1718 op0 = convert_to_mode (mode, op0, unsignedp);
1720 /* Pass 1 for NO_QUEUE so we don't lose any increments
1721 if the libcall is cse'd or moved. */
1722 value = emit_library_call_value (binoptab->handlers[(int) mode].libfunc,
1723 NULL_RTX, LCT_CONST, mode, 2,
1724 op0, mode, op1x, op1_mode);
1726 insns = get_insns ();
1729 target = gen_reg_rtx (mode);
1730 emit_libcall_block (insns, target, value,
1731 gen_rtx_fmt_ee (binoptab->code, mode, op0, op1));
1736 delete_insns_since (last);
1738 /* It can't be done in this mode. Can we do it in a wider mode? */
1740 if (! (methods == OPTAB_WIDEN || methods == OPTAB_LIB_WIDEN
1741 || methods == OPTAB_MUST_WIDEN))
1743 /* Caller says, don't even try. */
1744 delete_insns_since (entry_last);
1748 /* Compute the value of METHODS to pass to recursive calls.
1749 Don't allow widening to be tried recursively. */
1751 methods = (methods == OPTAB_LIB_WIDEN ? OPTAB_LIB : OPTAB_DIRECT);
1753 /* Look for a wider mode of the same class for which it appears we can do
1756 if (class == MODE_INT || class == MODE_FLOAT || class == MODE_COMPLEX_FLOAT)
1758 for (wider_mode = GET_MODE_WIDER_MODE (mode); wider_mode != VOIDmode;
1759 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
1761 if ((binoptab->handlers[(int) wider_mode].insn_code
1762 != CODE_FOR_nothing)
1763 || (methods == OPTAB_LIB
1764 && binoptab->handlers[(int) wider_mode].libfunc))
1766 rtx xop0 = op0, xop1 = op1;
1769 /* For certain integer operations, we need not actually extend
1770 the narrow operands, as long as we will truncate
1771 the results to the same narrowness. */
1773 if ((binoptab == ior_optab || binoptab == and_optab
1774 || binoptab == xor_optab
1775 || binoptab == add_optab || binoptab == sub_optab
1776 || binoptab == smul_optab || binoptab == ashl_optab)
1777 && class == MODE_INT)
1780 xop0 = widen_operand (xop0, wider_mode, mode,
1781 unsignedp, no_extend);
1783 /* The second operand of a shift must always be extended. */
1784 xop1 = widen_operand (xop1, wider_mode, mode, unsignedp,
1785 no_extend && binoptab != ashl_optab);
1787 temp = expand_binop (wider_mode, binoptab, xop0, xop1, NULL_RTX,
1788 unsignedp, methods);
1791 if (class != MODE_INT)
1794 target = gen_reg_rtx (mode);
1795 convert_move (target, temp, 0);
1799 return gen_lowpart (mode, temp);
1802 delete_insns_since (last);
1807 delete_insns_since (entry_last);
1811 /* Expand a binary operator which has both signed and unsigned forms.
1812 UOPTAB is the optab for unsigned operations, and SOPTAB is for
1815 If we widen unsigned operands, we may use a signed wider operation instead
1816 of an unsigned wider operation, since the result would be the same. */
1819 sign_expand_binop (mode, uoptab, soptab, op0, op1, target, unsignedp, methods)
1820 enum machine_mode mode;
1821 optab uoptab, soptab;
1822 rtx op0, op1, target;
1824 enum optab_methods methods;
1827 optab direct_optab = unsignedp ? uoptab : soptab;
1828 struct optab wide_soptab;
1830 /* Do it without widening, if possible. */
1831 temp = expand_binop (mode, direct_optab, op0, op1, target,
1832 unsignedp, OPTAB_DIRECT);
1833 if (temp || methods == OPTAB_DIRECT)
1836 /* Try widening to a signed int. Make a fake signed optab that
1837 hides any signed insn for direct use. */
1838 wide_soptab = *soptab;
1839 wide_soptab.handlers[(int) mode].insn_code = CODE_FOR_nothing;
1840 wide_soptab.handlers[(int) mode].libfunc = 0;
1842 temp = expand_binop (mode, &wide_soptab, op0, op1, target,
1843 unsignedp, OPTAB_WIDEN);
1845 /* For unsigned operands, try widening to an unsigned int. */
1846 if (temp == 0 && unsignedp)
1847 temp = expand_binop (mode, uoptab, op0, op1, target,
1848 unsignedp, OPTAB_WIDEN);
1849 if (temp || methods == OPTAB_WIDEN)
1852 /* Use the right width lib call if that exists. */
1853 temp = expand_binop (mode, direct_optab, op0, op1, target, unsignedp, OPTAB_LIB);
1854 if (temp || methods == OPTAB_LIB)
1857 /* Must widen and use a lib call, use either signed or unsigned. */
1858 temp = expand_binop (mode, &wide_soptab, op0, op1, target,
1859 unsignedp, methods);
1863 return expand_binop (mode, uoptab, op0, op1, target,
1864 unsignedp, methods);
1868 /* Generate code to perform an operation specified by BINOPTAB
1869 on operands OP0 and OP1, with two results to TARG1 and TARG2.
1870 We assume that the order of the operands for the instruction
1871 is TARG0, OP0, OP1, TARG1, which would fit a pattern like
1872 [(set TARG0 (operate OP0 OP1)) (set TARG1 (operate ...))].
1874 Either TARG0 or TARG1 may be zero, but what that means is that
1875 the result is not actually wanted. We will generate it into
1876 a dummy pseudo-reg and discard it. They may not both be zero.
1878 Returns 1 if this operation can be performed; 0 if not. */
1881 expand_twoval_binop (binoptab, op0, op1, targ0, targ1, unsignedp)
1887 enum machine_mode mode = GET_MODE (targ0 ? targ0 : targ1);
1888 enum mode_class class;
1889 enum machine_mode wider_mode;
1890 rtx entry_last = get_last_insn ();
1893 class = GET_MODE_CLASS (mode);
1895 op0 = protect_from_queue (op0, 0);
1896 op1 = protect_from_queue (op1, 0);
1900 op0 = force_not_mem (op0);
1901 op1 = force_not_mem (op1);
1904 /* If we are inside an appropriately-short loop and one operand is an
1905 expensive constant, force it into a register. */
1906 if (CONSTANT_P (op0) && preserve_subexpressions_p ()
1907 && rtx_cost (op0, binoptab->code) > COSTS_N_INSNS (1))
1908 op0 = force_reg (mode, op0);
1910 if (CONSTANT_P (op1) && preserve_subexpressions_p ()
1911 && rtx_cost (op1, binoptab->code) > COSTS_N_INSNS (1))
1912 op1 = force_reg (mode, op1);
1915 targ0 = protect_from_queue (targ0, 1);
1917 targ0 = gen_reg_rtx (mode);
1919 targ1 = protect_from_queue (targ1, 1);
1921 targ1 = gen_reg_rtx (mode);
1923 /* Record where to go back to if we fail. */
1924 last = get_last_insn ();
1926 if (binoptab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
1928 int icode = (int) binoptab->handlers[(int) mode].insn_code;
1929 enum machine_mode mode0 = insn_data[icode].operand[1].mode;
1930 enum machine_mode mode1 = insn_data[icode].operand[2].mode;
1932 rtx xop0 = op0, xop1 = op1;
1934 /* In case this insn wants input operands in modes different from the
1935 result, convert the operands. */
1936 if (GET_MODE (op0) != VOIDmode && GET_MODE (op0) != mode0)
1937 xop0 = convert_to_mode (mode0, xop0, unsignedp);
1939 if (GET_MODE (op1) != VOIDmode && GET_MODE (op1) != mode1)
1940 xop1 = convert_to_mode (mode1, xop1, unsignedp);
1942 /* Now, if insn doesn't accept these operands, put them into pseudos. */
1943 if (! (*insn_data[icode].operand[1].predicate) (xop0, mode0))
1944 xop0 = copy_to_mode_reg (mode0, xop0);
1946 if (! (*insn_data[icode].operand[2].predicate) (xop1, mode1))
1947 xop1 = copy_to_mode_reg (mode1, xop1);
1949 /* We could handle this, but we should always be called with a pseudo
1950 for our targets and all insns should take them as outputs. */
1951 if (! (*insn_data[icode].operand[0].predicate) (targ0, mode)
1952 || ! (*insn_data[icode].operand[3].predicate) (targ1, mode))
1955 pat = GEN_FCN (icode) (targ0, xop0, xop1, targ1);
1962 delete_insns_since (last);
1965 /* It can't be done in this mode. Can we do it in a wider mode? */
1967 if (class == MODE_INT || class == MODE_FLOAT || class == MODE_COMPLEX_FLOAT)
1969 for (wider_mode = GET_MODE_WIDER_MODE (mode); wider_mode != VOIDmode;
1970 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
1972 if (binoptab->handlers[(int) wider_mode].insn_code
1973 != CODE_FOR_nothing)
1975 register rtx t0 = gen_reg_rtx (wider_mode);
1976 register rtx t1 = gen_reg_rtx (wider_mode);
1978 if (expand_twoval_binop (binoptab,
1979 convert_modes (wider_mode, mode, op0,
1981 convert_modes (wider_mode, mode, op1,
1985 convert_move (targ0, t0, unsignedp);
1986 convert_move (targ1, t1, unsignedp);
1990 delete_insns_since (last);
1995 delete_insns_since (entry_last);
1999 /* Generate code to perform an operation specified by UNOPTAB
2000 on operand OP0, with result having machine-mode MODE.
2002 UNSIGNEDP is for the case where we have to widen the operands
2003 to perform the operation. It says to use zero-extension.
2005 If TARGET is nonzero, the value
2006 is generated there, if it is convenient to do so.
2007 In all cases an rtx is returned for the locus of the value;
2008 this may or may not be TARGET. */
2011 expand_unop (mode, unoptab, op0, target, unsignedp)
2012 enum machine_mode mode;
2018 enum mode_class class;
2019 enum machine_mode wider_mode;
2021 rtx last = get_last_insn ();
2024 class = GET_MODE_CLASS (mode);
2026 op0 = protect_from_queue (op0, 0);
2030 op0 = force_not_mem (op0);
2034 target = protect_from_queue (target, 1);
2036 if (unoptab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
2038 int icode = (int) unoptab->handlers[(int) mode].insn_code;
2039 enum machine_mode mode0 = insn_data[icode].operand[1].mode;
2045 temp = gen_reg_rtx (mode);
2047 if (GET_MODE (xop0) != VOIDmode
2048 && GET_MODE (xop0) != mode0)
2049 xop0 = convert_to_mode (mode0, xop0, unsignedp);
2051 /* Now, if insn doesn't accept our operand, put it into a pseudo. */
2053 if (! (*insn_data[icode].operand[1].predicate) (xop0, mode0))
2054 xop0 = copy_to_mode_reg (mode0, xop0);
2056 if (! (*insn_data[icode].operand[0].predicate) (temp, mode))
2057 temp = gen_reg_rtx (mode);
2059 pat = GEN_FCN (icode) (temp, xop0);
2062 if (GET_CODE (pat) == SEQUENCE
2063 && ! add_equal_note (pat, temp, unoptab->code, xop0, NULL_RTX))
2065 delete_insns_since (last);
2066 return expand_unop (mode, unoptab, op0, NULL_RTX, unsignedp);
2074 delete_insns_since (last);
2077 /* It can't be done in this mode. Can we open-code it in a wider mode? */
2079 if (class == MODE_INT || class == MODE_FLOAT || class == MODE_COMPLEX_FLOAT)
2080 for (wider_mode = GET_MODE_WIDER_MODE (mode); wider_mode != VOIDmode;
2081 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
2083 if (unoptab->handlers[(int) wider_mode].insn_code != CODE_FOR_nothing)
2087 /* For certain operations, we need not actually extend
2088 the narrow operand, as long as we will truncate the
2089 results to the same narrowness. */
2091 xop0 = widen_operand (xop0, wider_mode, mode, unsignedp,
2092 (unoptab == neg_optab
2093 || unoptab == one_cmpl_optab)
2094 && class == MODE_INT);
2096 temp = expand_unop (wider_mode, unoptab, xop0, NULL_RTX,
2101 if (class != MODE_INT)
2104 target = gen_reg_rtx (mode);
2105 convert_move (target, temp, 0);
2109 return gen_lowpart (mode, temp);
2112 delete_insns_since (last);
2116 /* These can be done a word at a time. */
2117 if (unoptab == one_cmpl_optab
2118 && class == MODE_INT
2119 && GET_MODE_SIZE (mode) > UNITS_PER_WORD
2120 && unoptab->handlers[(int) word_mode].insn_code != CODE_FOR_nothing)
2125 if (target == 0 || target == op0)
2126 target = gen_reg_rtx (mode);
2130 /* Do the actual arithmetic. */
2131 for (i = 0; i < GET_MODE_BITSIZE (mode) / BITS_PER_WORD; i++)
2133 rtx target_piece = operand_subword (target, i, 1, mode);
2134 rtx x = expand_unop (word_mode, unoptab,
2135 operand_subword_force (op0, i, mode),
2136 target_piece, unsignedp);
2137 if (target_piece != x)
2138 emit_move_insn (target_piece, x);
2141 insns = get_insns ();
2144 emit_no_conflict_block (insns, target, op0, NULL_RTX,
2145 gen_rtx_fmt_e (unoptab->code, mode,
2150 /* Open-code the complex negation operation. */
2151 else if (unoptab->code == NEG
2152 && (class == MODE_COMPLEX_FLOAT || class == MODE_COMPLEX_INT))
2158 /* Find the correct mode for the real and imaginary parts */
2159 enum machine_mode submode
2160 = mode_for_size (GET_MODE_UNIT_SIZE (mode) * BITS_PER_UNIT,
2161 class == MODE_COMPLEX_INT ? MODE_INT : MODE_FLOAT,
2164 if (submode == BLKmode)
2168 target = gen_reg_rtx (mode);
2172 target_piece = gen_imagpart (submode, target);
2173 x = expand_unop (submode, unoptab,
2174 gen_imagpart (submode, op0),
2175 target_piece, unsignedp);
2176 if (target_piece != x)
2177 emit_move_insn (target_piece, x);
2179 target_piece = gen_realpart (submode, target);
2180 x = expand_unop (submode, unoptab,
2181 gen_realpart (submode, op0),
2182 target_piece, unsignedp);
2183 if (target_piece != x)
2184 emit_move_insn (target_piece, x);
2189 emit_no_conflict_block (seq, target, op0, 0,
2190 gen_rtx_fmt_e (unoptab->code, mode,
2195 /* Now try a library call in this mode. */
2196 if (unoptab->handlers[(int) mode].libfunc)
2203 /* Pass 1 for NO_QUEUE so we don't lose any increments
2204 if the libcall is cse'd or moved. */
2205 value = emit_library_call_value (unoptab->handlers[(int) mode].libfunc,
2206 NULL_RTX, LCT_CONST, mode, 1, op0, mode);
2207 insns = get_insns ();
2210 target = gen_reg_rtx (mode);
2211 emit_libcall_block (insns, target, value,
2212 gen_rtx_fmt_e (unoptab->code, mode, op0));
2217 /* It can't be done in this mode. Can we do it in a wider mode? */
2219 if (class == MODE_INT || class == MODE_FLOAT || class == MODE_COMPLEX_FLOAT)
2221 for (wider_mode = GET_MODE_WIDER_MODE (mode); wider_mode != VOIDmode;
2222 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
2224 if ((unoptab->handlers[(int) wider_mode].insn_code
2225 != CODE_FOR_nothing)
2226 || unoptab->handlers[(int) wider_mode].libfunc)
2230 /* For certain operations, we need not actually extend
2231 the narrow operand, as long as we will truncate the
2232 results to the same narrowness. */
2234 xop0 = widen_operand (xop0, wider_mode, mode, unsignedp,
2235 (unoptab == neg_optab
2236 || unoptab == one_cmpl_optab)
2237 && class == MODE_INT);
2239 temp = expand_unop (wider_mode, unoptab, xop0, NULL_RTX,
2244 if (class != MODE_INT)
2247 target = gen_reg_rtx (mode);
2248 convert_move (target, temp, 0);
2252 return gen_lowpart (mode, temp);
2255 delete_insns_since (last);
2260 /* If there is no negate operation, try doing a subtract from zero.
2261 The US Software GOFAST library needs this. */
2262 if (unoptab->code == NEG)
2265 temp = expand_binop (mode,
2266 unoptab == negv_optab ? subv_optab : sub_optab,
2267 CONST0_RTX (mode), op0,
2268 target, unsignedp, OPTAB_LIB_WIDEN);
2276 /* Emit code to compute the absolute value of OP0, with result to
2277 TARGET if convenient. (TARGET may be 0.) The return value says
2278 where the result actually is to be found.
2280 MODE is the mode of the operand; the mode of the result is
2281 different but can be deduced from MODE.
2286 expand_abs (mode, op0, target, result_unsignedp, safe)
2287 enum machine_mode mode;
2290 int result_unsignedp;
2296 result_unsignedp = 1;
2298 /* First try to do it with a special abs instruction. */
2299 temp = expand_unop (mode, result_unsignedp ? abs_optab : absv_optab,
2304 /* If we have a MAX insn, we can do this as MAX (x, -x). */
2305 if (smax_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
2307 rtx last = get_last_insn ();
2309 temp = expand_unop (mode, neg_optab, op0, NULL_RTX, 0);
2311 temp = expand_binop (mode, smax_optab, op0, temp, target, 0,
2317 delete_insns_since (last);
2320 /* If this machine has expensive jumps, we can do integer absolute
2321 value of X as (((signed) x >> (W-1)) ^ x) - ((signed) x >> (W-1)),
2322 where W is the width of MODE. */
2324 if (GET_MODE_CLASS (mode) == MODE_INT && BRANCH_COST >= 2)
2326 rtx extended = expand_shift (RSHIFT_EXPR, mode, op0,
2327 size_int (GET_MODE_BITSIZE (mode) - 1),
2330 temp = expand_binop (mode, xor_optab, extended, op0, target, 0,
2333 temp = expand_binop (mode, result_unsignedp ? sub_optab : subv_optab,
2334 temp, extended, target, 0, OPTAB_LIB_WIDEN);
2340 /* If that does not win, use conditional jump and negate. */
2342 /* It is safe to use the target if it is the same
2343 as the source if this is also a pseudo register */
2344 if (op0 == target && GET_CODE (op0) == REG
2345 && REGNO (op0) >= FIRST_PSEUDO_REGISTER)
2348 op1 = gen_label_rtx ();
2349 if (target == 0 || ! safe
2350 || GET_MODE (target) != mode
2351 || (GET_CODE (target) == MEM && MEM_VOLATILE_P (target))
2352 || (GET_CODE (target) == REG
2353 && REGNO (target) < FIRST_PSEUDO_REGISTER))
2354 target = gen_reg_rtx (mode);
2356 emit_move_insn (target, op0);
2359 /* If this mode is an integer too wide to compare properly,
2360 compare word by word. Rely on CSE to optimize constant cases. */
2361 if (GET_MODE_CLASS (mode) == MODE_INT
2362 && ! can_compare_p (GE, mode, ccp_jump))
2363 do_jump_by_parts_greater_rtx (mode, 0, target, const0_rtx,
2366 do_compare_rtx_and_jump (target, CONST0_RTX (mode), GE, 0, mode,
2367 NULL_RTX, 0, NULL_RTX, op1);
2369 op0 = expand_unop (mode, result_unsignedp ? neg_optab : negv_optab,
2372 emit_move_insn (target, op0);
2378 /* Emit code to compute the absolute value of OP0, with result to
2379 TARGET if convenient. (TARGET may be 0.) The return value says
2380 where the result actually is to be found.
2382 MODE is the mode of the operand; the mode of the result is
2383 different but can be deduced from MODE.
2385 UNSIGNEDP is relevant for complex integer modes. */
2388 expand_complex_abs (mode, op0, target, unsignedp)
2389 enum machine_mode mode;
2394 enum mode_class class = GET_MODE_CLASS (mode);
2395 enum machine_mode wider_mode;
2397 rtx entry_last = get_last_insn ();
2400 optab this_abs_optab;
2402 /* Find the correct mode for the real and imaginary parts. */
2403 enum machine_mode submode
2404 = mode_for_size (GET_MODE_UNIT_SIZE (mode) * BITS_PER_UNIT,
2405 class == MODE_COMPLEX_INT ? MODE_INT : MODE_FLOAT,
2408 if (submode == BLKmode)
2411 op0 = protect_from_queue (op0, 0);
2415 op0 = force_not_mem (op0);
2418 last = get_last_insn ();
2421 target = protect_from_queue (target, 1);
2423 this_abs_optab = ! unsignedp && flag_trapv
2424 && (GET_MODE_CLASS(mode) == MODE_INT)
2425 ? absv_optab : abs_optab;
2427 if (this_abs_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
2429 int icode = (int) this_abs_optab->handlers[(int) mode].insn_code;
2430 enum machine_mode mode0 = insn_data[icode].operand[1].mode;
2436 temp = gen_reg_rtx (submode);
2438 if (GET_MODE (xop0) != VOIDmode
2439 && GET_MODE (xop0) != mode0)
2440 xop0 = convert_to_mode (mode0, xop0, unsignedp);
2442 /* Now, if insn doesn't accept our operand, put it into a pseudo. */
2444 if (! (*insn_data[icode].operand[1].predicate) (xop0, mode0))
2445 xop0 = copy_to_mode_reg (mode0, xop0);
2447 if (! (*insn_data[icode].operand[0].predicate) (temp, submode))
2448 temp = gen_reg_rtx (submode);
2450 pat = GEN_FCN (icode) (temp, xop0);
2453 if (GET_CODE (pat) == SEQUENCE
2454 && ! add_equal_note (pat, temp, this_abs_optab->code, xop0,
2457 delete_insns_since (last);
2458 return expand_unop (mode, this_abs_optab, op0, NULL_RTX,
2467 delete_insns_since (last);
2470 /* It can't be done in this mode. Can we open-code it in a wider mode? */
2472 for (wider_mode = GET_MODE_WIDER_MODE (mode); wider_mode != VOIDmode;
2473 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
2475 if (this_abs_optab->handlers[(int) wider_mode].insn_code
2476 != CODE_FOR_nothing)
2480 xop0 = convert_modes (wider_mode, mode, xop0, unsignedp);
2481 temp = expand_complex_abs (wider_mode, xop0, NULL_RTX, unsignedp);
2485 if (class != MODE_COMPLEX_INT)
2488 target = gen_reg_rtx (submode);
2489 convert_move (target, temp, 0);
2493 return gen_lowpart (submode, temp);
2496 delete_insns_since (last);
2500 /* Open-code the complex absolute-value operation
2501 if we can open-code sqrt. Otherwise it's not worth while. */
2502 if (sqrt_optab->handlers[(int) submode].insn_code != CODE_FOR_nothing
2505 rtx real, imag, total;
2507 real = gen_realpart (submode, op0);
2508 imag = gen_imagpart (submode, op0);
2510 /* Square both parts. */
2511 real = expand_mult (submode, real, real, NULL_RTX, 0);
2512 imag = expand_mult (submode, imag, imag, NULL_RTX, 0);
2514 /* Sum the parts. */
2515 total = expand_binop (submode, add_optab, real, imag, NULL_RTX,
2516 0, OPTAB_LIB_WIDEN);
2518 /* Get sqrt in TARGET. Set TARGET to where the result is. */
2519 target = expand_unop (submode, sqrt_optab, total, target, 0);
2521 delete_insns_since (last);
2526 /* Now try a library call in this mode. */
2527 if (this_abs_optab->handlers[(int) mode].libfunc)
2534 /* Pass 1 for NO_QUEUE so we don't lose any increments
2535 if the libcall is cse'd or moved. */
2536 value = emit_library_call_value (abs_optab->handlers[(int) mode].libfunc,
2537 NULL_RTX, LCT_CONST, submode, 1, op0, mode);
2538 insns = get_insns ();
2541 target = gen_reg_rtx (submode);
2542 emit_libcall_block (insns, target, value,
2543 gen_rtx_fmt_e (this_abs_optab->code, mode, op0));
2548 /* It can't be done in this mode. Can we do it in a wider mode? */
2550 for (wider_mode = GET_MODE_WIDER_MODE (mode); wider_mode != VOIDmode;
2551 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
2553 if ((this_abs_optab->handlers[(int) wider_mode].insn_code
2554 != CODE_FOR_nothing)
2555 || this_abs_optab->handlers[(int) wider_mode].libfunc)
2559 xop0 = convert_modes (wider_mode, mode, xop0, unsignedp);
2561 temp = expand_complex_abs (wider_mode, xop0, NULL_RTX, unsignedp);
2565 if (class != MODE_COMPLEX_INT)
2568 target = gen_reg_rtx (submode);
2569 convert_move (target, temp, 0);
2573 return gen_lowpart (submode, temp);
2576 delete_insns_since (last);
2580 delete_insns_since (entry_last);
2584 /* Generate an instruction whose insn-code is INSN_CODE,
2585 with two operands: an output TARGET and an input OP0.
2586 TARGET *must* be nonzero, and the output is always stored there.
2587 CODE is an rtx code such that (CODE OP0) is an rtx that describes
2588 the value that is stored into TARGET. */
2591 emit_unop_insn (icode, target, op0, code)
2598 enum machine_mode mode0 = insn_data[icode].operand[1].mode;
2601 temp = target = protect_from_queue (target, 1);
2603 op0 = protect_from_queue (op0, 0);
2605 /* Sign and zero extension from memory is often done specially on
2606 RISC machines, so forcing into a register here can pessimize
2608 if (flag_force_mem && code != SIGN_EXTEND && code != ZERO_EXTEND)
2609 op0 = force_not_mem (op0);
2611 /* Now, if insn does not accept our operands, put them into pseudos. */
2613 if (! (*insn_data[icode].operand[1].predicate) (op0, mode0))
2614 op0 = copy_to_mode_reg (mode0, op0);
2616 if (! (*insn_data[icode].operand[0].predicate) (temp, GET_MODE (temp))
2617 || (flag_force_mem && GET_CODE (temp) == MEM))
2618 temp = gen_reg_rtx (GET_MODE (temp));
2620 pat = GEN_FCN (icode) (temp, op0);
2622 if (GET_CODE (pat) == SEQUENCE && code != UNKNOWN)
2623 add_equal_note (pat, temp, code, op0, NULL_RTX);
2628 emit_move_insn (target, temp);
2631 /* Emit code to perform a series of operations on a multi-word quantity, one
2634 Such a block is preceded by a CLOBBER of the output, consists of multiple
2635 insns, each setting one word of the output, and followed by a SET copying
2636 the output to itself.
2638 Each of the insns setting words of the output receives a REG_NO_CONFLICT
2639 note indicating that it doesn't conflict with the (also multi-word)
2640 inputs. The entire block is surrounded by REG_LIBCALL and REG_RETVAL
2643 INSNS is a block of code generated to perform the operation, not including
2644 the CLOBBER and final copy. All insns that compute intermediate values
2645 are first emitted, followed by the block as described above.
2647 TARGET, OP0, and OP1 are the output and inputs of the operations,
2648 respectively. OP1 may be zero for a unary operation.
2650 EQUIV, if non-zero, is an expression to be placed into a REG_EQUAL note
2653 If TARGET is not a register, INSNS is simply emitted with no special
2654 processing. Likewise if anything in INSNS is not an INSN or if
2655 there is a libcall block inside INSNS.
2657 The final insn emitted is returned. */
2660 emit_no_conflict_block (insns, target, op0, op1, equiv)
2666 rtx prev, next, first, last, insn;
2668 if (GET_CODE (target) != REG || reload_in_progress)
2669 return emit_insns (insns);
2671 for (insn = insns; insn; insn = NEXT_INSN (insn))
2672 if (GET_CODE (insn) != INSN
2673 || find_reg_note (insn, REG_LIBCALL, NULL_RTX))
2674 return emit_insns (insns);
2676 /* First emit all insns that do not store into words of the output and remove
2677 these from the list. */
2678 for (insn = insns; insn; insn = next)
2683 next = NEXT_INSN (insn);
2685 if (GET_CODE (PATTERN (insn)) == SET || GET_CODE (PATTERN (insn)) == USE
2686 || GET_CODE (PATTERN (insn)) == CLOBBER)
2687 set = PATTERN (insn);
2688 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
2690 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
2691 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET)
2693 set = XVECEXP (PATTERN (insn), 0, i);
2701 if (! reg_overlap_mentioned_p (target, SET_DEST (set)))
2703 if (PREV_INSN (insn))
2704 NEXT_INSN (PREV_INSN (insn)) = next;
2709 PREV_INSN (next) = PREV_INSN (insn);
2715 prev = get_last_insn ();
2717 /* Now write the CLOBBER of the output, followed by the setting of each
2718 of the words, followed by the final copy. */
2719 if (target != op0 && target != op1)
2720 emit_insn (gen_rtx_CLOBBER (VOIDmode, target));
2722 for (insn = insns; insn; insn = next)
2724 next = NEXT_INSN (insn);
2727 if (op1 && GET_CODE (op1) == REG)
2728 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_NO_CONFLICT, op1,
2731 if (op0 && GET_CODE (op0) == REG)
2732 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_NO_CONFLICT, op0,
2736 if (mov_optab->handlers[(int) GET_MODE (target)].insn_code
2737 != CODE_FOR_nothing)
2739 last = emit_move_insn (target, target);
2741 set_unique_reg_note (last, REG_EQUAL, equiv);
2745 last = get_last_insn ();
2747 /* Remove any existing REG_EQUAL note from "last", or else it will
2748 be mistaken for a note referring to the full contents of the
2749 alleged libcall value when found together with the REG_RETVAL
2750 note added below. An existing note can come from an insn
2751 expansion at "last". */
2752 remove_note (last, find_reg_note (last, REG_EQUAL, NULL_RTX));
2756 first = get_insns ();
2758 first = NEXT_INSN (prev);
2760 /* Encapsulate the block so it gets manipulated as a unit. */
2761 REG_NOTES (first) = gen_rtx_INSN_LIST (REG_LIBCALL, last,
2763 REG_NOTES (last) = gen_rtx_INSN_LIST (REG_RETVAL, first, REG_NOTES (last));
2768 /* Emit code to make a call to a constant function or a library call.
2770 INSNS is a list containing all insns emitted in the call.
2771 These insns leave the result in RESULT. Our block is to copy RESULT
2772 to TARGET, which is logically equivalent to EQUIV.
2774 We first emit any insns that set a pseudo on the assumption that these are
2775 loading constants into registers; doing so allows them to be safely cse'ed
2776 between blocks. Then we emit all the other insns in the block, followed by
2777 an insn to move RESULT to TARGET. This last insn will have a REQ_EQUAL
2778 note with an operand of EQUIV.
2780 Moving assignments to pseudos outside of the block is done to improve
2781 the generated code, but is not required to generate correct code,
2782 hence being unable to move an assignment is not grounds for not making
2783 a libcall block. There are two reasons why it is safe to leave these
2784 insns inside the block: First, we know that these pseudos cannot be
2785 used in generated RTL outside the block since they are created for
2786 temporary purposes within the block. Second, CSE will not record the
2787 values of anything set inside a libcall block, so we know they must
2788 be dead at the end of the block.
2790 Except for the first group of insns (the ones setting pseudos), the
2791 block is delimited by REG_RETVAL and REG_LIBCALL notes. */
2794 emit_libcall_block (insns, target, result, equiv)
2800 rtx final_dest = target;
2801 rtx prev, next, first, last, insn;
2803 /* If this is a reg with REG_USERVAR_P set, then it could possibly turn
2804 into a MEM later. Protect the libcall block from this change. */
2805 if (! REG_P (target) || REG_USERVAR_P (target))
2806 target = gen_reg_rtx (GET_MODE (target));
2808 /* look for any CALL_INSNs in this sequence, and attach a REG_EH_REGION
2809 reg note to indicate that this call cannot throw or execute a nonlocal
2810 goto (unless there is already a REG_EH_REGION note, in which case
2811 we update it). Also set the CONST_CALL_P flag. */
2813 for (insn = insns; insn; insn = NEXT_INSN (insn))
2814 if (GET_CODE (insn) == CALL_INSN)
2816 rtx note = find_reg_note (insn, REG_EH_REGION, NULL_RTX);
2818 CONST_CALL_P (insn) = 1;
2820 XEXP (note, 0) = GEN_INT (-1);
2822 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_EH_REGION, GEN_INT (-1),
2826 /* First emit all insns that set pseudos. Remove them from the list as
2827 we go. Avoid insns that set pseudos which were referenced in previous
2828 insns. These can be generated by move_by_pieces, for example,
2829 to update an address. Similarly, avoid insns that reference things
2830 set in previous insns. */
2832 for (insn = insns; insn; insn = next)
2834 rtx set = single_set (insn);
2836 next = NEXT_INSN (insn);
2838 if (set != 0 && GET_CODE (SET_DEST (set)) == REG
2839 && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER
2841 || ((! INSN_P(insns)
2842 || ! reg_mentioned_p (SET_DEST (set), PATTERN (insns)))
2843 && ! reg_used_between_p (SET_DEST (set), insns, insn)
2844 && ! modified_in_p (SET_SRC (set), insns)
2845 && ! modified_between_p (SET_SRC (set), insns, insn))))
2847 if (PREV_INSN (insn))
2848 NEXT_INSN (PREV_INSN (insn)) = next;
2853 PREV_INSN (next) = PREV_INSN (insn);
2859 prev = get_last_insn ();
2861 /* Write the remaining insns followed by the final copy. */
2863 for (insn = insns; insn; insn = next)
2865 next = NEXT_INSN (insn);
2870 last = emit_move_insn (target, result);
2871 if (mov_optab->handlers[(int) GET_MODE (target)].insn_code
2872 != CODE_FOR_nothing)
2873 set_unique_reg_note (last, REG_EQUAL, copy_rtx (equiv));
2876 /* Remove any existing REG_EQUAL note from "last", or else it will
2877 be mistaken for a note referring to the full contents of the
2878 libcall value when found together with the REG_RETVAL note added
2879 below. An existing note can come from an insn expansion at
2881 remove_note (last, find_reg_note (last, REG_EQUAL, NULL_RTX));
2884 if (final_dest != target)
2885 emit_move_insn (final_dest, target);
2888 first = get_insns ();
2890 first = NEXT_INSN (prev);
2892 /* Encapsulate the block so it gets manipulated as a unit. */
2893 REG_NOTES (first) = gen_rtx_INSN_LIST (REG_LIBCALL, last,
2895 REG_NOTES (last) = gen_rtx_INSN_LIST (REG_RETVAL, first, REG_NOTES (last));
2898 /* Generate code to store zero in X. */
2904 emit_move_insn (x, const0_rtx);
2907 /* Generate code to store 1 in X
2908 assuming it contains zero beforehand. */
2911 emit_0_to_1_insn (x)
2914 emit_move_insn (x, const1_rtx);
2917 /* Nonzero if we can perform a comparison of mode MODE straightforwardly.
2918 PURPOSE describes how this comparison will be used. CODE is the rtx
2919 comparison code we will be using.
2921 ??? Actually, CODE is slightly weaker than that. A target is still
2922 required to implement all of the normal bcc operations, but not
2923 required to implement all (or any) of the unordered bcc operations. */
2926 can_compare_p (code, mode, purpose)
2928 enum machine_mode mode;
2929 enum can_compare_purpose purpose;
2933 if (cmp_optab->handlers[(int)mode].insn_code != CODE_FOR_nothing)
2935 if (purpose == ccp_jump)
2936 return bcc_gen_fctn[(int)code] != NULL;
2937 else if (purpose == ccp_store_flag)
2938 return setcc_gen_code[(int)code] != CODE_FOR_nothing;
2940 /* There's only one cmov entry point, and it's allowed to fail. */
2943 if (purpose == ccp_jump
2944 && cbranch_optab->handlers[(int)mode].insn_code != CODE_FOR_nothing)
2946 if (purpose == ccp_cmov
2947 && cmov_optab->handlers[(int)mode].insn_code != CODE_FOR_nothing)
2949 if (purpose == ccp_store_flag
2950 && cstore_optab->handlers[(int)mode].insn_code != CODE_FOR_nothing)
2953 mode = GET_MODE_WIDER_MODE (mode);
2955 while (mode != VOIDmode);
2960 /* This function is called when we are going to emit a compare instruction that
2961 compares the values found in *PX and *PY, using the rtl operator COMPARISON.
2963 *PMODE is the mode of the inputs (in case they are const_int).
2964 *PUNSIGNEDP nonzero says that the operands are unsigned;
2965 this matters if they need to be widened.
2967 If they have mode BLKmode, then SIZE specifies the size of both operands,
2968 and ALIGN specifies the known shared alignment of the operands.
2970 This function performs all the setup necessary so that the caller only has
2971 to emit a single comparison insn. This setup can involve doing a BLKmode
2972 comparison or emitting a library call to perform the comparison if no insn
2973 is available to handle it.
2974 The values which are passed in through pointers can be modified; the caller
2975 should perform the comparison on the modified values. */
2978 prepare_cmp_insn (px, py, pcomparison, size, pmode, punsignedp, align,
2981 enum rtx_code *pcomparison;
2983 enum machine_mode *pmode;
2985 int align ATTRIBUTE_UNUSED;
2986 enum can_compare_purpose purpose;
2988 enum machine_mode mode = *pmode;
2989 rtx x = *px, y = *py;
2990 int unsignedp = *punsignedp;
2991 enum mode_class class;
2992 rtx opalign ATTRIBUTE_UNUSED = GEN_INT (align / BITS_PER_UNIT);;
2994 class = GET_MODE_CLASS (mode);
2996 /* They could both be VOIDmode if both args are immediate constants,
2997 but we should fold that at an earlier stage.
2998 With no special code here, this will call abort,
2999 reminding the programmer to implement such folding. */
3001 if (mode != BLKmode && flag_force_mem)
3003 x = force_not_mem (x);
3004 y = force_not_mem (y);
3007 /* If we are inside an appropriately-short loop and one operand is an
3008 expensive constant, force it into a register. */
3009 if (CONSTANT_P (x) && preserve_subexpressions_p ()
3010 && rtx_cost (x, COMPARE) > COSTS_N_INSNS (1))
3011 x = force_reg (mode, x);
3013 if (CONSTANT_P (y) && preserve_subexpressions_p ()
3014 && rtx_cost (y, COMPARE) > COSTS_N_INSNS (1))
3015 y = force_reg (mode, y);
3018 /* Abort if we have a non-canonical comparison. The RTL documentation
3019 states that canonical comparisons are required only for targets which
3021 if (CONSTANT_P (x) && ! CONSTANT_P (y))
3025 /* Don't let both operands fail to indicate the mode. */
3026 if (GET_MODE (x) == VOIDmode && GET_MODE (y) == VOIDmode)
3027 x = force_reg (mode, x);
3029 /* Handle all BLKmode compares. */
3031 if (mode == BLKmode)
3034 enum machine_mode result_mode;
3037 x = protect_from_queue (x, 0);
3038 y = protect_from_queue (y, 0);
3042 #ifdef HAVE_cmpstrqi
3044 && GET_CODE (size) == CONST_INT
3045 && INTVAL (size) < (1 << GET_MODE_BITSIZE (QImode)))
3047 result_mode = insn_data[(int) CODE_FOR_cmpstrqi].operand[0].mode;
3048 result = gen_reg_rtx (result_mode);
3049 emit_insn (gen_cmpstrqi (result, x, y, size, opalign));
3053 #ifdef HAVE_cmpstrhi
3055 && GET_CODE (size) == CONST_INT
3056 && INTVAL (size) < (1 << GET_MODE_BITSIZE (HImode)))
3058 result_mode = insn_data[(int) CODE_FOR_cmpstrhi].operand[0].mode;
3059 result = gen_reg_rtx (result_mode);
3060 emit_insn (gen_cmpstrhi (result, x, y, size, opalign));
3064 #ifdef HAVE_cmpstrsi
3067 result_mode = insn_data[(int) CODE_FOR_cmpstrsi].operand[0].mode;
3068 result = gen_reg_rtx (result_mode);
3069 size = protect_from_queue (size, 0);
3070 emit_insn (gen_cmpstrsi (result, x, y,
3071 convert_to_mode (SImode, size, 1),
3077 #ifdef TARGET_MEM_FUNCTIONS
3078 emit_library_call (memcmp_libfunc, LCT_PURE_MAKE_BLOCK,
3079 TYPE_MODE (integer_type_node), 3,
3080 XEXP (x, 0), Pmode, XEXP (y, 0), Pmode,
3081 convert_to_mode (TYPE_MODE (sizetype), size,
3082 TREE_UNSIGNED (sizetype)),
3083 TYPE_MODE (sizetype));
3085 emit_library_call (bcmp_libfunc, LCT_PURE_MAKE_BLOCK,
3086 TYPE_MODE (integer_type_node), 3,
3087 XEXP (x, 0), Pmode, XEXP (y, 0), Pmode,
3088 convert_to_mode (TYPE_MODE (integer_type_node),
3090 TREE_UNSIGNED (integer_type_node)),
3091 TYPE_MODE (integer_type_node));
3094 /* Immediately move the result of the libcall into a pseudo
3095 register so reload doesn't clobber the value if it needs
3096 the return register for a spill reg. */
3097 result = gen_reg_rtx (TYPE_MODE (integer_type_node));
3098 result_mode = TYPE_MODE (integer_type_node);
3099 emit_move_insn (result,
3100 hard_libcall_value (result_mode));
3104 *pmode = result_mode;
3110 if (can_compare_p (*pcomparison, mode, purpose))
3113 /* Handle a lib call just for the mode we are using. */
3115 if (cmp_optab->handlers[(int) mode].libfunc && class != MODE_FLOAT)
3117 rtx libfunc = cmp_optab->handlers[(int) mode].libfunc;
3120 /* If we want unsigned, and this mode has a distinct unsigned
3121 comparison routine, use that. */
3122 if (unsignedp && ucmp_optab->handlers[(int) mode].libfunc)
3123 libfunc = ucmp_optab->handlers[(int) mode].libfunc;
3125 emit_library_call (libfunc, 1,
3126 word_mode, 2, x, mode, y, mode);
3128 /* Immediately move the result of the libcall into a pseudo
3129 register so reload doesn't clobber the value if it needs
3130 the return register for a spill reg. */
3131 result = gen_reg_rtx (word_mode);
3132 emit_move_insn (result, hard_libcall_value (word_mode));
3134 /* Integer comparison returns a result that must be compared against 1,
3135 so that even if we do an unsigned compare afterward,
3136 there is still a value that can represent the result "less than". */
3143 if (class == MODE_FLOAT)
3144 prepare_float_lib_cmp (px, py, pcomparison, pmode, punsignedp);
3150 /* Before emitting an insn with code ICODE, make sure that X, which is going
3151 to be used for operand OPNUM of the insn, is converted from mode MODE to
3152 WIDER_MODE (UNSIGNEDP determines whether it is a unsigned conversion), and
3153 that it is accepted by the operand predicate. Return the new value. */
3156 prepare_operand (icode, x, opnum, mode, wider_mode, unsignedp)
3160 enum machine_mode mode, wider_mode;
3163 x = protect_from_queue (x, 0);
3165 if (mode != wider_mode)
3166 x = convert_modes (wider_mode, mode, x, unsignedp);
3168 if (! (*insn_data[icode].operand[opnum].predicate)
3169 (x, insn_data[icode].operand[opnum].mode))
3170 x = copy_to_mode_reg (insn_data[icode].operand[opnum].mode, x);
3174 /* Subroutine of emit_cmp_and_jump_insns; this function is called when we know
3175 we can do the comparison.
3176 The arguments are the same as for emit_cmp_and_jump_insns; but LABEL may
3177 be NULL_RTX which indicates that only a comparison is to be generated. */
3180 emit_cmp_and_jump_insn_1 (x, y, mode, comparison, unsignedp, label)
3182 enum machine_mode mode;
3183 enum rtx_code comparison;
3187 rtx test = gen_rtx_fmt_ee (comparison, mode, x, y);
3188 enum mode_class class = GET_MODE_CLASS (mode);
3189 enum machine_mode wider_mode = mode;
3191 /* Try combined insns first. */
3194 enum insn_code icode;
3195 PUT_MODE (test, wider_mode);
3199 icode = cbranch_optab->handlers[(int)wider_mode].insn_code;
3201 if (icode != CODE_FOR_nothing
3202 && (*insn_data[icode].operand[0].predicate) (test, wider_mode))
3204 x = prepare_operand (icode, x, 1, mode, wider_mode, unsignedp);
3205 y = prepare_operand (icode, y, 2, mode, wider_mode, unsignedp);
3206 emit_jump_insn (GEN_FCN (icode) (test, x, y, label));
3211 /* Handle some compares against zero. */
3212 icode = (int) tst_optab->handlers[(int) wider_mode].insn_code;
3213 if (y == CONST0_RTX (mode) && icode != CODE_FOR_nothing)
3215 x = prepare_operand (icode, x, 0, mode, wider_mode, unsignedp);
3216 emit_insn (GEN_FCN (icode) (x));
3218 emit_jump_insn ((*bcc_gen_fctn[(int) comparison]) (label));
3222 /* Handle compares for which there is a directly suitable insn. */
3224 icode = (int) cmp_optab->handlers[(int) wider_mode].insn_code;
3225 if (icode != CODE_FOR_nothing)
3227 x = prepare_operand (icode, x, 0, mode, wider_mode, unsignedp);
3228 y = prepare_operand (icode, y, 1, mode, wider_mode, unsignedp);
3229 emit_insn (GEN_FCN (icode) (x, y));
3231 emit_jump_insn ((*bcc_gen_fctn[(int) comparison]) (label));
3235 if (class != MODE_INT && class != MODE_FLOAT
3236 && class != MODE_COMPLEX_FLOAT)
3239 wider_mode = GET_MODE_WIDER_MODE (wider_mode);
3240 } while (wider_mode != VOIDmode);
3245 /* Generate code to compare X with Y so that the condition codes are
3246 set and to jump to LABEL if the condition is true. If X is a
3247 constant and Y is not a constant, then the comparison is swapped to
3248 ensure that the comparison RTL has the canonical form.
3250 UNSIGNEDP nonzero says that X and Y are unsigned; this matters if they
3251 need to be widened by emit_cmp_insn. UNSIGNEDP is also used to select
3252 the proper branch condition code.
3254 If X and Y have mode BLKmode, then SIZE specifies the size of both X and Y,
3255 and ALIGN specifies the known shared alignment of X and Y.
3257 MODE is the mode of the inputs (in case they are const_int).
3259 COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.). It will
3260 be passed unchanged to emit_cmp_insn, then potentially converted into an
3261 unsigned variant based on UNSIGNEDP to select a proper jump instruction. */
3264 emit_cmp_and_jump_insns (x, y, comparison, size, mode, unsignedp, align, label)
3266 enum rtx_code comparison;
3268 enum machine_mode mode;
3276 if ((CONSTANT_P (x) && ! CONSTANT_P (y))
3277 || (GET_CODE (x) == CONST_INT && GET_CODE (y) != CONST_INT))
3279 /* Swap operands and condition to ensure canonical RTL. */
3282 comparison = swap_condition (comparison);
3291 /* If OP0 is still a constant, then both X and Y must be constants. Force
3292 X into a register to avoid aborting in emit_cmp_insn due to non-canonical
3294 if (CONSTANT_P (op0))
3295 op0 = force_reg (mode, op0);
3300 comparison = unsigned_condition (comparison);
3301 prepare_cmp_insn (&op0, &op1, &comparison, size, &mode, &unsignedp, align,
3303 emit_cmp_and_jump_insn_1 (op0, op1, mode, comparison, unsignedp, label);
3306 /* Like emit_cmp_and_jump_insns, but generate only the comparison. */
3309 emit_cmp_insn (x, y, comparison, size, mode, unsignedp, align)
3311 enum rtx_code comparison;
3313 enum machine_mode mode;
3317 emit_cmp_and_jump_insns (x, y, comparison, size, mode, unsignedp, align, 0);
3320 /* Emit a library call comparison between floating point X and Y.
3321 COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.). */
3324 prepare_float_lib_cmp (px, py, pcomparison, pmode, punsignedp)
3326 enum rtx_code *pcomparison;
3327 enum machine_mode *pmode;
3330 enum rtx_code comparison = *pcomparison;
3331 rtx x = *px = protect_from_queue (*px, 0);
3332 rtx y = *py = protect_from_queue (*py, 0);
3333 enum machine_mode mode = GET_MODE (x);
3341 libfunc = eqhf2_libfunc;
3345 libfunc = nehf2_libfunc;
3349 libfunc = gthf2_libfunc;
3353 libfunc = gehf2_libfunc;
3357 libfunc = lthf2_libfunc;
3361 libfunc = lehf2_libfunc;
3365 libfunc = unordhf2_libfunc;
3371 else if (mode == SFmode)
3375 libfunc = eqsf2_libfunc;
3379 libfunc = nesf2_libfunc;
3383 libfunc = gtsf2_libfunc;
3387 libfunc = gesf2_libfunc;
3391 libfunc = ltsf2_libfunc;
3395 libfunc = lesf2_libfunc;
3399 libfunc = unordsf2_libfunc;
3405 else if (mode == DFmode)
3409 libfunc = eqdf2_libfunc;
3413 libfunc = nedf2_libfunc;
3417 libfunc = gtdf2_libfunc;
3421 libfunc = gedf2_libfunc;
3425 libfunc = ltdf2_libfunc;
3429 libfunc = ledf2_libfunc;
3433 libfunc = unorddf2_libfunc;
3439 else if (mode == XFmode)
3443 libfunc = eqxf2_libfunc;
3447 libfunc = nexf2_libfunc;
3451 libfunc = gtxf2_libfunc;
3455 libfunc = gexf2_libfunc;
3459 libfunc = ltxf2_libfunc;
3463 libfunc = lexf2_libfunc;
3467 libfunc = unordxf2_libfunc;
3473 else if (mode == TFmode)
3477 libfunc = eqtf2_libfunc;
3481 libfunc = netf2_libfunc;
3485 libfunc = gttf2_libfunc;
3489 libfunc = getf2_libfunc;
3493 libfunc = lttf2_libfunc;
3497 libfunc = letf2_libfunc;
3501 libfunc = unordtf2_libfunc;
3509 enum machine_mode wider_mode;
3511 for (wider_mode = GET_MODE_WIDER_MODE (mode); wider_mode != VOIDmode;
3512 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
3514 if ((cmp_optab->handlers[(int) wider_mode].insn_code
3515 != CODE_FOR_nothing)
3516 || (cmp_optab->handlers[(int) wider_mode].libfunc != 0))
3518 x = protect_from_queue (x, 0);
3519 y = protect_from_queue (y, 0);
3520 *px = convert_to_mode (wider_mode, x, 0);
3521 *py = convert_to_mode (wider_mode, y, 0);
3522 prepare_float_lib_cmp (px, py, pcomparison, pmode, punsignedp);
3532 emit_library_call (libfunc, LCT_CONST_MAKE_BLOCK, word_mode, 2, x, mode, y,
3535 /* Immediately move the result of the libcall into a pseudo
3536 register so reload doesn't clobber the value if it needs
3537 the return register for a spill reg. */
3538 result = gen_reg_rtx (word_mode);
3539 emit_move_insn (result, hard_libcall_value (word_mode));
3543 if (comparison == UNORDERED)
3545 #ifdef FLOAT_LIB_COMPARE_RETURNS_BOOL
3546 else if (FLOAT_LIB_COMPARE_RETURNS_BOOL (mode, comparison))
3552 /* Generate code to indirectly jump to a location given in the rtx LOC. */
3555 emit_indirect_jump (loc)
3558 if (! ((*insn_data[(int)CODE_FOR_indirect_jump].operand[0].predicate)
3560 loc = copy_to_mode_reg (Pmode, loc);
3562 emit_jump_insn (gen_indirect_jump (loc));
3566 #ifdef HAVE_conditional_move
3568 /* Emit a conditional move instruction if the machine supports one for that
3569 condition and machine mode.
3571 OP0 and OP1 are the operands that should be compared using CODE. CMODE is
3572 the mode to use should they be constants. If it is VOIDmode, they cannot
3575 OP2 should be stored in TARGET if the comparison is true, otherwise OP3
3576 should be stored there. MODE is the mode to use should they be constants.
3577 If it is VOIDmode, they cannot both be constants.
3579 The result is either TARGET (perhaps modified) or NULL_RTX if the operation
3580 is not supported. */
3583 emit_conditional_move (target, code, op0, op1, cmode, op2, op3, mode,
3588 enum machine_mode cmode;
3590 enum machine_mode mode;
3593 rtx tem, subtarget, comparison, insn;
3594 enum insn_code icode;
3596 /* If one operand is constant, make it the second one. Only do this
3597 if the other operand is not constant as well. */
3599 if ((CONSTANT_P (op0) && ! CONSTANT_P (op1))
3600 || (GET_CODE (op0) == CONST_INT && GET_CODE (op1) != CONST_INT))
3605 code = swap_condition (code);
3608 /* get_condition will prefer to generate LT and GT even if the old
3609 comparison was against zero, so undo that canonicalization here since
3610 comparisons against zero are cheaper. */
3611 if (code == LT && GET_CODE (op1) == CONST_INT && INTVAL (op1) == 1)
3612 code = LE, op1 = const0_rtx;
3613 else if (code == GT && GET_CODE (op1) == CONST_INT && INTVAL (op1) == -1)
3614 code = GE, op1 = const0_rtx;
3616 if (cmode == VOIDmode)
3617 cmode = GET_MODE (op0);
3619 if (((CONSTANT_P (op2) && ! CONSTANT_P (op3))
3620 || (GET_CODE (op2) == CONST_INT && GET_CODE (op3) != CONST_INT))
3621 && (GET_MODE_CLASS (GET_MODE (op1)) != MODE_FLOAT
3622 || TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
3623 || flag_unsafe_math_optimizations))
3628 code = reverse_condition (code);
3631 if (mode == VOIDmode)
3632 mode = GET_MODE (op2);
3634 icode = movcc_gen_code[mode];
3636 if (icode == CODE_FOR_nothing)
3641 op2 = force_not_mem (op2);
3642 op3 = force_not_mem (op3);
3646 target = protect_from_queue (target, 1);
3648 target = gen_reg_rtx (mode);
3654 op2 = protect_from_queue (op2, 0);
3655 op3 = protect_from_queue (op3, 0);
3657 /* If the insn doesn't accept these operands, put them in pseudos. */
3659 if (! (*insn_data[icode].operand[0].predicate)
3660 (subtarget, insn_data[icode].operand[0].mode))
3661 subtarget = gen_reg_rtx (insn_data[icode].operand[0].mode);
3663 if (! (*insn_data[icode].operand[2].predicate)
3664 (op2, insn_data[icode].operand[2].mode))
3665 op2 = copy_to_mode_reg (insn_data[icode].operand[2].mode, op2);
3667 if (! (*insn_data[icode].operand[3].predicate)
3668 (op3, insn_data[icode].operand[3].mode))
3669 op3 = copy_to_mode_reg (insn_data[icode].operand[3].mode, op3);
3671 /* Everything should now be in the suitable form, so emit the compare insn
3672 and then the conditional move. */
3675 = compare_from_rtx (op0, op1, code, unsignedp, cmode, NULL_RTX, 0);
3677 /* ??? Watch for const0_rtx (nop) and const_true_rtx (unconditional)? */
3678 /* We can get const0_rtx or const_true_rtx in some circumstances. Just
3679 return NULL and let the caller figure out how best to deal with this
3681 if (GET_CODE (comparison) != code)
3684 insn = GEN_FCN (icode) (subtarget, comparison, op2, op3);
3686 /* If that failed, then give up. */
3692 if (subtarget != target)
3693 convert_move (target, subtarget, 0);
3698 /* Return non-zero if a conditional move of mode MODE is supported.
3700 This function is for combine so it can tell whether an insn that looks
3701 like a conditional move is actually supported by the hardware. If we
3702 guess wrong we lose a bit on optimization, but that's it. */
3703 /* ??? sparc64 supports conditionally moving integers values based on fp
3704 comparisons, and vice versa. How do we handle them? */
3707 can_conditionally_move_p (mode)
3708 enum machine_mode mode;
3710 if (movcc_gen_code[mode] != CODE_FOR_nothing)
3716 #endif /* HAVE_conditional_move */
3718 /* These three functions generate an insn body and return it
3719 rather than emitting the insn.
3721 They do not protect from queued increments,
3722 because they may be used 1) in protect_from_queue itself
3723 and 2) in other passes where there is no queue. */
3725 /* Generate and return an insn body to add Y to X. */
3728 gen_add2_insn (x, y)
3731 int icode = (int) add_optab->handlers[(int) GET_MODE (x)].insn_code;
3733 if (! ((*insn_data[icode].operand[0].predicate)
3734 (x, insn_data[icode].operand[0].mode))
3735 || ! ((*insn_data[icode].operand[1].predicate)
3736 (x, insn_data[icode].operand[1].mode))
3737 || ! ((*insn_data[icode].operand[2].predicate)
3738 (y, insn_data[icode].operand[2].mode)))
3741 return (GEN_FCN (icode) (x, x, y));
3745 have_add2_insn (mode)
3746 enum machine_mode mode;
3748 return add_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing;
3751 /* Generate and return an insn body to subtract Y from X. */
3754 gen_sub2_insn (x, y)
3757 int icode = (int) sub_optab->handlers[(int) GET_MODE (x)].insn_code;
3759 if (! ((*insn_data[icode].operand[0].predicate)
3760 (x, insn_data[icode].operand[0].mode))
3761 || ! ((*insn_data[icode].operand[1].predicate)
3762 (x, insn_data[icode].operand[1].mode))
3763 || ! ((*insn_data[icode].operand[2].predicate)
3764 (y, insn_data[icode].operand[2].mode)))
3767 return (GEN_FCN (icode) (x, x, y));
3771 have_sub2_insn (mode)
3772 enum machine_mode mode;
3774 return sub_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing;
3777 /* Generate the body of an instruction to copy Y into X.
3778 It may be a SEQUENCE, if one insn isn't enough. */
3781 gen_move_insn (x, y)
3784 register enum machine_mode mode = GET_MODE (x);
3785 enum insn_code insn_code;
3788 if (mode == VOIDmode)
3789 mode = GET_MODE (y);
3791 insn_code = mov_optab->handlers[(int) mode].insn_code;
3793 /* Handle MODE_CC modes: If we don't have a special move insn for this mode,
3794 find a mode to do it in. If we have a movcc, use it. Otherwise,
3795 find the MODE_INT mode of the same width. */
3797 if (GET_MODE_CLASS (mode) == MODE_CC && insn_code == CODE_FOR_nothing)
3799 enum machine_mode tmode = VOIDmode;
3803 && mov_optab->handlers[(int) CCmode].insn_code != CODE_FOR_nothing)
3806 for (tmode = QImode; tmode != VOIDmode;
3807 tmode = GET_MODE_WIDER_MODE (tmode))
3808 if (GET_MODE_SIZE (tmode) == GET_MODE_SIZE (mode))
3811 if (tmode == VOIDmode)
3814 /* Get X and Y in TMODE. We can't use gen_lowpart here because it
3815 may call change_address which is not appropriate if we were
3816 called when a reload was in progress. We don't have to worry
3817 about changing the address since the size in bytes is supposed to
3818 be the same. Copy the MEM to change the mode and move any
3819 substitutions from the old MEM to the new one. */
3821 if (reload_in_progress)
3823 x = gen_lowpart_common (tmode, x1);
3824 if (x == 0 && GET_CODE (x1) == MEM)
3826 x = gen_rtx_MEM (tmode, XEXP (x1, 0));
3827 MEM_COPY_ATTRIBUTES (x, x1);
3828 copy_replacements (x1, x);
3831 y = gen_lowpart_common (tmode, y1);
3832 if (y == 0 && GET_CODE (y1) == MEM)
3834 y = gen_rtx_MEM (tmode, XEXP (y1, 0));
3835 MEM_COPY_ATTRIBUTES (y, y1);
3836 copy_replacements (y1, y);
3841 x = gen_lowpart (tmode, x);
3842 y = gen_lowpart (tmode, y);
3845 insn_code = mov_optab->handlers[(int) tmode].insn_code;
3846 return (GEN_FCN (insn_code) (x, y));
3850 emit_move_insn_1 (x, y);
3851 seq = gen_sequence ();
3856 /* Return the insn code used to extend FROM_MODE to TO_MODE.
3857 UNSIGNEDP specifies zero-extension instead of sign-extension. If
3858 no such operation exists, CODE_FOR_nothing will be returned. */
3861 can_extend_p (to_mode, from_mode, unsignedp)
3862 enum machine_mode to_mode, from_mode;
3865 return extendtab[(int) to_mode][(int) from_mode][unsignedp != 0];
3868 /* Generate the body of an insn to extend Y (with mode MFROM)
3869 into X (with mode MTO). Do zero-extension if UNSIGNEDP is nonzero. */
3872 gen_extend_insn (x, y, mto, mfrom, unsignedp)
3874 enum machine_mode mto, mfrom;
3877 return (GEN_FCN (extendtab[(int) mto][(int) mfrom][unsignedp != 0]) (x, y));
3880 /* can_fix_p and can_float_p say whether the target machine
3881 can directly convert a given fixed point type to
3882 a given floating point type, or vice versa.
3883 The returned value is the CODE_FOR_... value to use,
3884 or CODE_FOR_nothing if these modes cannot be directly converted.
3886 *TRUNCP_PTR is set to 1 if it is necessary to output
3887 an explicit FTRUNC insn before the fix insn; otherwise 0. */
3889 static enum insn_code
3890 can_fix_p (fixmode, fltmode, unsignedp, truncp_ptr)
3891 enum machine_mode fltmode, fixmode;
3896 if (fixtrunctab[(int) fltmode][(int) fixmode][unsignedp != 0]
3897 != CODE_FOR_nothing)
3898 return fixtrunctab[(int) fltmode][(int) fixmode][unsignedp != 0];
3900 if (ftrunc_optab->handlers[(int) fltmode].insn_code != CODE_FOR_nothing)
3903 return fixtab[(int) fltmode][(int) fixmode][unsignedp != 0];
3905 return CODE_FOR_nothing;
3908 static enum insn_code
3909 can_float_p (fltmode, fixmode, unsignedp)
3910 enum machine_mode fixmode, fltmode;
3913 return floattab[(int) fltmode][(int) fixmode][unsignedp != 0];
3916 /* Generate code to convert FROM to floating point
3917 and store in TO. FROM must be fixed point and not VOIDmode.
3918 UNSIGNEDP nonzero means regard FROM as unsigned.
3919 Normally this is done by correcting the final value
3920 if it is negative. */
3923 expand_float (to, from, unsignedp)
3927 enum insn_code icode;
3928 register rtx target = to;
3929 enum machine_mode fmode, imode;
3931 /* Crash now, because we won't be able to decide which mode to use. */
3932 if (GET_MODE (from) == VOIDmode)
3935 /* Look for an insn to do the conversion. Do it in the specified
3936 modes if possible; otherwise convert either input, output or both to
3937 wider mode. If the integer mode is wider than the mode of FROM,
3938 we can do the conversion signed even if the input is unsigned. */
3940 for (imode = GET_MODE (from); imode != VOIDmode;
3941 imode = GET_MODE_WIDER_MODE (imode))
3942 for (fmode = GET_MODE (to); fmode != VOIDmode;
3943 fmode = GET_MODE_WIDER_MODE (fmode))
3945 int doing_unsigned = unsignedp;
3947 if (fmode != GET_MODE (to)
3948 && significand_size (fmode) < GET_MODE_BITSIZE (GET_MODE (from)))
3951 icode = can_float_p (fmode, imode, unsignedp);
3952 if (icode == CODE_FOR_nothing && imode != GET_MODE (from) && unsignedp)
3953 icode = can_float_p (fmode, imode, 0), doing_unsigned = 0;
3955 if (icode != CODE_FOR_nothing)
3957 to = protect_from_queue (to, 1);
3958 from = protect_from_queue (from, 0);
3960 if (imode != GET_MODE (from))
3961 from = convert_to_mode (imode, from, unsignedp);
3963 if (fmode != GET_MODE (to))
3964 target = gen_reg_rtx (fmode);
3966 emit_unop_insn (icode, target, from,
3967 doing_unsigned ? UNSIGNED_FLOAT : FLOAT);
3970 convert_move (to, target, 0);
3975 #if !defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3977 /* Unsigned integer, and no way to convert directly.
3978 Convert as signed, then conditionally adjust the result. */
3981 rtx label = gen_label_rtx ();
3983 REAL_VALUE_TYPE offset;
3987 to = protect_from_queue (to, 1);
3988 from = protect_from_queue (from, 0);
3991 from = force_not_mem (from);
3993 /* Look for a usable floating mode FMODE wider than the source and at
3994 least as wide as the target. Using FMODE will avoid rounding woes
3995 with unsigned values greater than the signed maximum value. */
3997 for (fmode = GET_MODE (to); fmode != VOIDmode;
3998 fmode = GET_MODE_WIDER_MODE (fmode))
3999 if (GET_MODE_BITSIZE (GET_MODE (from)) < GET_MODE_BITSIZE (fmode)
4000 && can_float_p (fmode, GET_MODE (from), 0) != CODE_FOR_nothing)
4003 if (fmode == VOIDmode)
4005 /* There is no such mode. Pretend the target is wide enough. */
4006 fmode = GET_MODE (to);
4008 /* Avoid double-rounding when TO is narrower than FROM. */
4009 if ((significand_size (fmode) + 1)
4010 < GET_MODE_BITSIZE (GET_MODE (from)))
4013 rtx neglabel = gen_label_rtx ();
4015 /* Don't use TARGET if it isn't a register, is a hard register,
4016 or is the wrong mode. */
4017 if (GET_CODE (target) != REG
4018 || REGNO (target) < FIRST_PSEUDO_REGISTER
4019 || GET_MODE (target) != fmode)
4020 target = gen_reg_rtx (fmode);
4022 imode = GET_MODE (from);
4023 do_pending_stack_adjust ();
4025 /* Test whether the sign bit is set. */
4026 emit_cmp_and_jump_insns (from, const0_rtx, LT, NULL_RTX, imode,
4029 /* The sign bit is not set. Convert as signed. */
4030 expand_float (target, from, 0);
4031 emit_jump_insn (gen_jump (label));
4034 /* The sign bit is set.
4035 Convert to a usable (positive signed) value by shifting right
4036 one bit, while remembering if a nonzero bit was shifted
4037 out; i.e., compute (from & 1) | (from >> 1). */
4039 emit_label (neglabel);
4040 temp = expand_binop (imode, and_optab, from, const1_rtx,
4041 NULL_RTX, 1, OPTAB_LIB_WIDEN);
4042 temp1 = expand_shift (RSHIFT_EXPR, imode, from, integer_one_node,
4044 temp = expand_binop (imode, ior_optab, temp, temp1, temp, 1,
4046 expand_float (target, temp, 0);
4048 /* Multiply by 2 to undo the shift above. */
4049 temp = expand_binop (fmode, add_optab, target, target,
4050 target, 0, OPTAB_LIB_WIDEN);
4052 emit_move_insn (target, temp);
4054 do_pending_stack_adjust ();
4060 /* If we are about to do some arithmetic to correct for an
4061 unsigned operand, do it in a pseudo-register. */
4063 if (GET_MODE (to) != fmode
4064 || GET_CODE (to) != REG || REGNO (to) < FIRST_PSEUDO_REGISTER)
4065 target = gen_reg_rtx (fmode);
4067 /* Convert as signed integer to floating. */
4068 expand_float (target, from, 0);
4070 /* If FROM is negative (and therefore TO is negative),
4071 correct its value by 2**bitwidth. */
4073 do_pending_stack_adjust ();
4074 emit_cmp_and_jump_insns (from, const0_rtx, GE, NULL_RTX, GET_MODE (from),
4077 /* On SCO 3.2.1, ldexp rejects values outside [0.5, 1).
4078 Rather than setting up a dconst_dot_5, let's hope SCO
4080 offset = REAL_VALUE_LDEXP (dconst1, GET_MODE_BITSIZE (GET_MODE (from)));
4081 temp = expand_binop (fmode, add_optab, target,
4082 CONST_DOUBLE_FROM_REAL_VALUE (offset, fmode),
4083 target, 0, OPTAB_LIB_WIDEN);
4085 emit_move_insn (target, temp);
4087 do_pending_stack_adjust ();
4093 /* No hardware instruction available; call a library routine to convert from
4094 SImode, DImode, or TImode into SFmode, DFmode, XFmode, or TFmode. */
4100 to = protect_from_queue (to, 1);
4101 from = protect_from_queue (from, 0);
4103 if (GET_MODE_SIZE (GET_MODE (from)) < GET_MODE_SIZE (SImode))
4104 from = convert_to_mode (SImode, from, unsignedp);
4107 from = force_not_mem (from);
4109 if (GET_MODE (to) == SFmode)
4111 if (GET_MODE (from) == SImode)
4112 libfcn = floatsisf_libfunc;
4113 else if (GET_MODE (from) == DImode)
4114 libfcn = floatdisf_libfunc;
4115 else if (GET_MODE (from) == TImode)
4116 libfcn = floattisf_libfunc;
4120 else if (GET_MODE (to) == DFmode)
4122 if (GET_MODE (from) == SImode)
4123 libfcn = floatsidf_libfunc;
4124 else if (GET_MODE (from) == DImode)
4125 libfcn = floatdidf_libfunc;
4126 else if (GET_MODE (from) == TImode)
4127 libfcn = floattidf_libfunc;
4131 else if (GET_MODE (to) == XFmode)
4133 if (GET_MODE (from) == SImode)
4134 libfcn = floatsixf_libfunc;
4135 else if (GET_MODE (from) == DImode)
4136 libfcn = floatdixf_libfunc;
4137 else if (GET_MODE (from) == TImode)
4138 libfcn = floattixf_libfunc;
4142 else if (GET_MODE (to) == TFmode)
4144 if (GET_MODE (from) == SImode)
4145 libfcn = floatsitf_libfunc;
4146 else if (GET_MODE (from) == DImode)
4147 libfcn = floatditf_libfunc;
4148 else if (GET_MODE (from) == TImode)
4149 libfcn = floattitf_libfunc;
4158 value = emit_library_call_value (libfcn, NULL_RTX, LCT_CONST,
4159 GET_MODE (to), 1, from,
4161 insns = get_insns ();
4164 emit_libcall_block (insns, target, value,
4165 gen_rtx_FLOAT (GET_MODE (to), from));
4170 /* Copy result to requested destination
4171 if we have been computing in a temp location. */
4175 if (GET_MODE (target) == GET_MODE (to))
4176 emit_move_insn (to, target);
4178 convert_move (to, target, 0);
4182 /* expand_fix: generate code to convert FROM to fixed point
4183 and store in TO. FROM must be floating point. */
4189 rtx temp = gen_reg_rtx (GET_MODE (x));
4190 return expand_unop (GET_MODE (x), ftrunc_optab, x, temp, 0);
4194 expand_fix (to, from, unsignedp)
4195 register rtx to, from;
4198 enum insn_code icode;
4199 register rtx target = to;
4200 enum machine_mode fmode, imode;
4204 /* We first try to find a pair of modes, one real and one integer, at
4205 least as wide as FROM and TO, respectively, in which we can open-code
4206 this conversion. If the integer mode is wider than the mode of TO,
4207 we can do the conversion either signed or unsigned. */
4209 for (imode = GET_MODE (to); imode != VOIDmode;
4210 imode = GET_MODE_WIDER_MODE (imode))
4211 for (fmode = GET_MODE (from); fmode != VOIDmode;
4212 fmode = GET_MODE_WIDER_MODE (fmode))
4214 int doing_unsigned = unsignedp;
4216 icode = can_fix_p (imode, fmode, unsignedp, &must_trunc);
4217 if (icode == CODE_FOR_nothing && imode != GET_MODE (to) && unsignedp)
4218 icode = can_fix_p (imode, fmode, 0, &must_trunc), doing_unsigned = 0;
4220 if (icode != CODE_FOR_nothing)
4222 to = protect_from_queue (to, 1);
4223 from = protect_from_queue (from, 0);
4225 if (fmode != GET_MODE (from))
4226 from = convert_to_mode (fmode, from, 0);
4229 from = ftruncify (from);
4231 if (imode != GET_MODE (to))
4232 target = gen_reg_rtx (imode);
4234 emit_unop_insn (icode, target, from,
4235 doing_unsigned ? UNSIGNED_FIX : FIX);
4237 convert_move (to, target, unsignedp);
4242 #if !defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
4243 /* For an unsigned conversion, there is one more way to do it.
4244 If we have a signed conversion, we generate code that compares
4245 the real value to the largest representable positive number. If if
4246 is smaller, the conversion is done normally. Otherwise, subtract
4247 one plus the highest signed number, convert, and add it back.
4249 We only need to check all real modes, since we know we didn't find
4250 anything with a wider integer mode. */
4252 if (unsignedp && GET_MODE_BITSIZE (GET_MODE (to)) <= HOST_BITS_PER_WIDE_INT)
4253 for (fmode = GET_MODE (from); fmode != VOIDmode;
4254 fmode = GET_MODE_WIDER_MODE (fmode))
4255 /* Make sure we won't lose significant bits doing this. */
4256 if (GET_MODE_BITSIZE (fmode) > GET_MODE_BITSIZE (GET_MODE (to))
4257 && CODE_FOR_nothing != can_fix_p (GET_MODE (to), fmode, 0,
4261 REAL_VALUE_TYPE offset;
4262 rtx limit, lab1, lab2, insn;
4264 bitsize = GET_MODE_BITSIZE (GET_MODE (to));
4265 offset = REAL_VALUE_LDEXP (dconst1, bitsize - 1);
4266 limit = CONST_DOUBLE_FROM_REAL_VALUE (offset, fmode);
4267 lab1 = gen_label_rtx ();
4268 lab2 = gen_label_rtx ();
4271 to = protect_from_queue (to, 1);
4272 from = protect_from_queue (from, 0);
4275 from = force_not_mem (from);
4277 if (fmode != GET_MODE (from))
4278 from = convert_to_mode (fmode, from, 0);
4280 /* See if we need to do the subtraction. */
4281 do_pending_stack_adjust ();
4282 emit_cmp_and_jump_insns (from, limit, GE, NULL_RTX, GET_MODE (from),
4285 /* If not, do the signed "fix" and branch around fixup code. */
4286 expand_fix (to, from, 0);
4287 emit_jump_insn (gen_jump (lab2));
4290 /* Otherwise, subtract 2**(N-1), convert to signed number,
4291 then add 2**(N-1). Do the addition using XOR since this
4292 will often generate better code. */
4294 target = expand_binop (GET_MODE (from), sub_optab, from, limit,
4295 NULL_RTX, 0, OPTAB_LIB_WIDEN);
4296 expand_fix (to, target, 0);
4297 target = expand_binop (GET_MODE (to), xor_optab, to,
4298 GEN_INT ((HOST_WIDE_INT) 1 << (bitsize - 1)),
4299 to, 1, OPTAB_LIB_WIDEN);
4302 emit_move_insn (to, target);
4306 if (mov_optab->handlers[(int) GET_MODE (to)].insn_code
4307 != CODE_FOR_nothing)
4309 /* Make a place for a REG_NOTE and add it. */
4310 insn = emit_move_insn (to, to);
4311 set_unique_reg_note (insn,
4313 gen_rtx_fmt_e (UNSIGNED_FIX,
4322 /* We can't do it with an insn, so use a library call. But first ensure
4323 that the mode of TO is at least as wide as SImode, since those are the
4324 only library calls we know about. */
4326 if (GET_MODE_SIZE (GET_MODE (to)) < GET_MODE_SIZE (SImode))
4328 target = gen_reg_rtx (SImode);
4330 expand_fix (target, from, unsignedp);
4332 else if (GET_MODE (from) == SFmode)
4334 if (GET_MODE (to) == SImode)
4335 libfcn = unsignedp ? fixunssfsi_libfunc : fixsfsi_libfunc;
4336 else if (GET_MODE (to) == DImode)
4337 libfcn = unsignedp ? fixunssfdi_libfunc : fixsfdi_libfunc;
4338 else if (GET_MODE (to) == TImode)
4339 libfcn = unsignedp ? fixunssfti_libfunc : fixsfti_libfunc;
4343 else if (GET_MODE (from) == DFmode)
4345 if (GET_MODE (to) == SImode)
4346 libfcn = unsignedp ? fixunsdfsi_libfunc : fixdfsi_libfunc;
4347 else if (GET_MODE (to) == DImode)
4348 libfcn = unsignedp ? fixunsdfdi_libfunc : fixdfdi_libfunc;
4349 else if (GET_MODE (to) == TImode)
4350 libfcn = unsignedp ? fixunsdfti_libfunc : fixdfti_libfunc;
4354 else if (GET_MODE (from) == XFmode)
4356 if (GET_MODE (to) == SImode)
4357 libfcn = unsignedp ? fixunsxfsi_libfunc : fixxfsi_libfunc;
4358 else if (GET_MODE (to) == DImode)
4359 libfcn = unsignedp ? fixunsxfdi_libfunc : fixxfdi_libfunc;
4360 else if (GET_MODE (to) == TImode)
4361 libfcn = unsignedp ? fixunsxfti_libfunc : fixxfti_libfunc;
4365 else if (GET_MODE (from) == TFmode)
4367 if (GET_MODE (to) == SImode)
4368 libfcn = unsignedp ? fixunstfsi_libfunc : fixtfsi_libfunc;
4369 else if (GET_MODE (to) == DImode)
4370 libfcn = unsignedp ? fixunstfdi_libfunc : fixtfdi_libfunc;
4371 else if (GET_MODE (to) == TImode)
4372 libfcn = unsignedp ? fixunstfti_libfunc : fixtfti_libfunc;
4384 to = protect_from_queue (to, 1);
4385 from = protect_from_queue (from, 0);
4388 from = force_not_mem (from);
4392 value = emit_library_call_value (libfcn, NULL_RTX, LCT_CONST,
4393 GET_MODE (to), 1, from,
4395 insns = get_insns ();
4398 emit_libcall_block (insns, target, value,
4399 gen_rtx_fmt_e (unsignedp ? UNSIGNED_FIX : FIX,
4400 GET_MODE (to), from));
4405 if (GET_MODE (to) == GET_MODE (target))
4406 emit_move_insn (to, target);
4408 convert_move (to, target, 0);
4417 optab op = (optab) xmalloc (sizeof (struct optab));
4419 for (i = 0; i < NUM_MACHINE_MODES; i++)
4421 op->handlers[i].insn_code = CODE_FOR_nothing;
4422 op->handlers[i].libfunc = 0;
4425 if (code != UNKNOWN)
4426 code_to_optab[(int) code] = op;
4431 /* Initialize the libfunc fields of an entire group of entries in some
4432 optab. Each entry is set equal to a string consisting of a leading
4433 pair of underscores followed by a generic operation name followed by
4434 a mode name (downshifted to lower case) followed by a single character
4435 representing the number of operands for the given operation (which is
4436 usually one of the characters '2', '3', or '4').
4438 OPTABLE is the table in which libfunc fields are to be initialized.
4439 FIRST_MODE is the first machine mode index in the given optab to
4441 LAST_MODE is the last machine mode index in the given optab to
4443 OPNAME is the generic (string) name of the operation.
4444 SUFFIX is the character which specifies the number of operands for
4445 the given generic operation.
4449 init_libfuncs (optable, first_mode, last_mode, opname, suffix)
4450 register optab optable;
4451 register int first_mode;
4452 register int last_mode;
4453 register const char *opname;
4454 register int suffix;
4457 register unsigned opname_len = strlen (opname);
4459 for (mode = first_mode; (int) mode <= (int) last_mode;
4460 mode = (enum machine_mode) ((int) mode + 1))
4462 register const char *mname = GET_MODE_NAME(mode);
4463 register unsigned mname_len = strlen (mname);
4464 register char *libfunc_name = alloca (2 + opname_len + mname_len + 1 + 1);
4466 register const char *q;
4471 for (q = opname; *q; )
4473 for (q = mname; *q; q++)
4474 *p++ = TOLOWER (*q);
4478 optable->handlers[(int) mode].libfunc
4479 = gen_rtx_SYMBOL_REF (Pmode, ggc_alloc_string (libfunc_name,
4484 /* Initialize the libfunc fields of an entire group of entries in some
4485 optab which correspond to all integer mode operations. The parameters
4486 have the same meaning as similarly named ones for the `init_libfuncs'
4487 routine. (See above). */
4490 init_integral_libfuncs (optable, opname, suffix)
4491 register optab optable;
4492 register const char *opname;
4493 register int suffix;
4495 init_libfuncs (optable, SImode, TImode, opname, suffix);
4498 /* Initialize the libfunc fields of an entire group of entries in some
4499 optab which correspond to all real mode operations. The parameters
4500 have the same meaning as similarly named ones for the `init_libfuncs'
4501 routine. (See above). */
4504 init_floating_libfuncs (optable, opname, suffix)
4505 register optab optable;
4506 register const char *opname;
4507 register int suffix;
4509 init_libfuncs (optable, SFmode, TFmode, opname, suffix);
4513 init_one_libfunc (name)
4514 register const char *name;
4516 name = ggc_strdup (name);
4518 return gen_rtx_SYMBOL_REF (Pmode, name);
4521 /* Mark ARG (which is really an OPTAB *) for GC. */
4527 optab o = *(optab *) arg;
4530 for (i = 0; i < NUM_MACHINE_MODES; ++i)
4531 ggc_mark_rtx (o->handlers[i].libfunc);
4534 /* Call this once to initialize the contents of the optabs
4535 appropriately for the current target machine. */
4540 unsigned int i, j, k;
4542 /* Start by initializing all tables to contain CODE_FOR_nothing. */
4544 for (i = 0; i < ARRAY_SIZE (fixtab); i++)
4545 for (j = 0; j < ARRAY_SIZE (fixtab[0]); j++)
4546 for (k = 0; k < ARRAY_SIZE (fixtab[0][0]); k++)
4547 fixtab[i][j][k] = CODE_FOR_nothing;
4549 for (i = 0; i < ARRAY_SIZE (fixtrunctab); i++)
4550 for (j = 0; j < ARRAY_SIZE (fixtrunctab[0]); j++)
4551 for (k = 0; k < ARRAY_SIZE (fixtrunctab[0][0]); k++)
4552 fixtrunctab[i][j][k] = CODE_FOR_nothing;
4554 for (i = 0; i < ARRAY_SIZE (floattab); i++)
4555 for (j = 0; j < ARRAY_SIZE (floattab[0]); j++)
4556 for (k = 0; k < ARRAY_SIZE (floattab[0][0]); k++)
4557 floattab[i][j][k] = CODE_FOR_nothing;
4559 for (i = 0; i < ARRAY_SIZE (extendtab); i++)
4560 for (j = 0; j < ARRAY_SIZE (extendtab[0]); j++)
4561 for (k = 0; k < ARRAY_SIZE (extendtab[0][0]); k++)
4562 extendtab[i][j][k] = CODE_FOR_nothing;
4564 for (i = 0; i < NUM_RTX_CODE; i++)
4565 setcc_gen_code[i] = CODE_FOR_nothing;
4567 #ifdef HAVE_conditional_move
4568 for (i = 0; i < NUM_MACHINE_MODES; i++)
4569 movcc_gen_code[i] = CODE_FOR_nothing;
4572 add_optab = init_optab (PLUS);
4573 addv_optab = init_optab (PLUS);
4574 sub_optab = init_optab (MINUS);
4575 subv_optab = init_optab (MINUS);
4576 smul_optab = init_optab (MULT);
4577 smulv_optab = init_optab (MULT);
4578 smul_highpart_optab = init_optab (UNKNOWN);
4579 umul_highpart_optab = init_optab (UNKNOWN);
4580 smul_widen_optab = init_optab (UNKNOWN);
4581 umul_widen_optab = init_optab (UNKNOWN);
4582 sdiv_optab = init_optab (DIV);
4583 sdivv_optab = init_optab (DIV);
4584 sdivmod_optab = init_optab (UNKNOWN);
4585 udiv_optab = init_optab (UDIV);
4586 udivmod_optab = init_optab (UNKNOWN);
4587 smod_optab = init_optab (MOD);
4588 umod_optab = init_optab (UMOD);
4589 flodiv_optab = init_optab (DIV);
4590 ftrunc_optab = init_optab (UNKNOWN);
4591 and_optab = init_optab (AND);
4592 ior_optab = init_optab (IOR);
4593 xor_optab = init_optab (XOR);
4594 ashl_optab = init_optab (ASHIFT);
4595 ashr_optab = init_optab (ASHIFTRT);
4596 lshr_optab = init_optab (LSHIFTRT);
4597 rotl_optab = init_optab (ROTATE);
4598 rotr_optab = init_optab (ROTATERT);
4599 smin_optab = init_optab (SMIN);
4600 smax_optab = init_optab (SMAX);
4601 umin_optab = init_optab (UMIN);
4602 umax_optab = init_optab (UMAX);
4603 mov_optab = init_optab (UNKNOWN);
4604 movstrict_optab = init_optab (UNKNOWN);
4605 cmp_optab = init_optab (UNKNOWN);
4606 ucmp_optab = init_optab (UNKNOWN);
4607 tst_optab = init_optab (UNKNOWN);
4608 neg_optab = init_optab (NEG);
4609 negv_optab = init_optab (NEG);
4610 abs_optab = init_optab (ABS);
4611 absv_optab = init_optab (ABS);
4612 one_cmpl_optab = init_optab (NOT);
4613 ffs_optab = init_optab (FFS);
4614 sqrt_optab = init_optab (SQRT);
4615 sin_optab = init_optab (UNKNOWN);
4616 cos_optab = init_optab (UNKNOWN);
4617 strlen_optab = init_optab (UNKNOWN);
4618 cbranch_optab = init_optab (UNKNOWN);
4619 cmov_optab = init_optab (UNKNOWN);
4620 cstore_optab = init_optab (UNKNOWN);
4622 for (i = 0; i < NUM_MACHINE_MODES; i++)
4624 movstr_optab[i] = CODE_FOR_nothing;
4625 clrstr_optab[i] = CODE_FOR_nothing;
4627 #ifdef HAVE_SECONDARY_RELOADS
4628 reload_in_optab[i] = reload_out_optab[i] = CODE_FOR_nothing;
4632 /* Fill in the optabs with the insns we support. */
4635 #ifdef FIXUNS_TRUNC_LIKE_FIX_TRUNC
4636 /* This flag says the same insns that convert to a signed fixnum
4637 also convert validly to an unsigned one. */
4638 for (i = 0; i < NUM_MACHINE_MODES; i++)
4639 for (j = 0; j < NUM_MACHINE_MODES; j++)
4640 fixtrunctab[i][j][1] = fixtrunctab[i][j][0];
4643 /* Initialize the optabs with the names of the library functions. */
4644 init_integral_libfuncs (add_optab, "add", '3');
4645 init_floating_libfuncs (add_optab, "add", '3');
4646 init_integral_libfuncs (addv_optab, "addv", '3');
4647 init_floating_libfuncs (addv_optab, "add", '3');
4648 init_integral_libfuncs (sub_optab, "sub", '3');
4649 init_floating_libfuncs (sub_optab, "sub", '3');
4650 init_integral_libfuncs (subv_optab, "subv", '3');
4651 init_floating_libfuncs (subv_optab, "sub", '3');
4652 init_integral_libfuncs (smul_optab, "mul", '3');
4653 init_floating_libfuncs (smul_optab, "mul", '3');
4654 init_integral_libfuncs (smulv_optab, "mulv", '3');
4655 init_floating_libfuncs (smulv_optab, "mul", '3');
4656 init_integral_libfuncs (sdiv_optab, "div", '3');
4657 init_integral_libfuncs (sdivv_optab, "divv", '3');
4658 init_integral_libfuncs (udiv_optab, "udiv", '3');
4659 init_integral_libfuncs (sdivmod_optab, "divmod", '4');
4660 init_integral_libfuncs (udivmod_optab, "udivmod", '4');
4661 init_integral_libfuncs (smod_optab, "mod", '3');
4662 init_integral_libfuncs (umod_optab, "umod", '3');
4663 init_floating_libfuncs (flodiv_optab, "div", '3');
4664 init_floating_libfuncs (ftrunc_optab, "ftrunc", '2');
4665 init_integral_libfuncs (and_optab, "and", '3');
4666 init_integral_libfuncs (ior_optab, "ior", '3');
4667 init_integral_libfuncs (xor_optab, "xor", '3');
4668 init_integral_libfuncs (ashl_optab, "ashl", '3');
4669 init_integral_libfuncs (ashr_optab, "ashr", '3');
4670 init_integral_libfuncs (lshr_optab, "lshr", '3');
4671 init_integral_libfuncs (smin_optab, "min", '3');
4672 init_floating_libfuncs (smin_optab, "min", '3');
4673 init_integral_libfuncs (smax_optab, "max", '3');
4674 init_floating_libfuncs (smax_optab, "max", '3');
4675 init_integral_libfuncs (umin_optab, "umin", '3');
4676 init_integral_libfuncs (umax_optab, "umax", '3');
4677 init_integral_libfuncs (neg_optab, "neg", '2');
4678 init_floating_libfuncs (neg_optab, "neg", '2');
4679 init_integral_libfuncs (negv_optab, "negv", '2');
4680 init_floating_libfuncs (negv_optab, "neg", '2');
4681 init_integral_libfuncs (one_cmpl_optab, "one_cmpl", '2');
4682 init_integral_libfuncs (ffs_optab, "ffs", '2');
4684 /* Comparison libcalls for integers MUST come in pairs, signed/unsigned. */
4685 init_integral_libfuncs (cmp_optab, "cmp", '2');
4686 init_integral_libfuncs (ucmp_optab, "ucmp", '2');
4687 init_floating_libfuncs (cmp_optab, "cmp", '2');
4689 #ifdef MULSI3_LIBCALL
4690 smul_optab->handlers[(int) SImode].libfunc
4691 = init_one_libfunc (MULSI3_LIBCALL);
4693 #ifdef MULDI3_LIBCALL
4694 smul_optab->handlers[(int) DImode].libfunc
4695 = init_one_libfunc (MULDI3_LIBCALL);
4698 #ifdef DIVSI3_LIBCALL
4699 sdiv_optab->handlers[(int) SImode].libfunc
4700 = init_one_libfunc (DIVSI3_LIBCALL);
4702 #ifdef DIVDI3_LIBCALL
4703 sdiv_optab->handlers[(int) DImode].libfunc
4704 = init_one_libfunc (DIVDI3_LIBCALL);
4707 #ifdef UDIVSI3_LIBCALL
4708 udiv_optab->handlers[(int) SImode].libfunc
4709 = init_one_libfunc (UDIVSI3_LIBCALL);
4711 #ifdef UDIVDI3_LIBCALL
4712 udiv_optab->handlers[(int) DImode].libfunc
4713 = init_one_libfunc (UDIVDI3_LIBCALL);
4716 #ifdef MODSI3_LIBCALL
4717 smod_optab->handlers[(int) SImode].libfunc
4718 = init_one_libfunc (MODSI3_LIBCALL);
4720 #ifdef MODDI3_LIBCALL
4721 smod_optab->handlers[(int) DImode].libfunc
4722 = init_one_libfunc (MODDI3_LIBCALL);
4725 #ifdef UMODSI3_LIBCALL
4726 umod_optab->handlers[(int) SImode].libfunc
4727 = init_one_libfunc (UMODSI3_LIBCALL);
4729 #ifdef UMODDI3_LIBCALL
4730 umod_optab->handlers[(int) DImode].libfunc
4731 = init_one_libfunc (UMODDI3_LIBCALL);
4734 /* Use cabs for DC complex abs, since systems generally have cabs.
4735 Don't define any libcall for SCmode, so that cabs will be used. */
4736 abs_optab->handlers[(int) DCmode].libfunc
4737 = init_one_libfunc ("cabs");
4739 /* The ffs function operates on `int'. */
4740 ffs_optab->handlers[(int) mode_for_size (INT_TYPE_SIZE, MODE_INT, 0)].libfunc
4741 = init_one_libfunc ("ffs");
4743 extendsfdf2_libfunc = init_one_libfunc ("__extendsfdf2");
4744 extendsfxf2_libfunc = init_one_libfunc ("__extendsfxf2");
4745 extendsftf2_libfunc = init_one_libfunc ("__extendsftf2");
4746 extenddfxf2_libfunc = init_one_libfunc ("__extenddfxf2");
4747 extenddftf2_libfunc = init_one_libfunc ("__extenddftf2");
4749 truncdfsf2_libfunc = init_one_libfunc ("__truncdfsf2");
4750 truncxfsf2_libfunc = init_one_libfunc ("__truncxfsf2");
4751 trunctfsf2_libfunc = init_one_libfunc ("__trunctfsf2");
4752 truncxfdf2_libfunc = init_one_libfunc ("__truncxfdf2");
4753 trunctfdf2_libfunc = init_one_libfunc ("__trunctfdf2");
4755 memcpy_libfunc = init_one_libfunc ("memcpy");
4756 bcopy_libfunc = init_one_libfunc ("bcopy");
4757 memcmp_libfunc = init_one_libfunc ("memcmp");
4758 bcmp_libfunc = init_one_libfunc ("__gcc_bcmp");
4759 memset_libfunc = init_one_libfunc ("memset");
4760 bzero_libfunc = init_one_libfunc ("bzero");
4762 unwind_resume_libfunc = init_one_libfunc (USING_SJLJ_EXCEPTIONS
4763 ? "_Unwind_SjLj_Resume"
4764 : "_Unwind_Resume");
4765 #ifndef DONT_USE_BUILTIN_SETJMP
4766 setjmp_libfunc = init_one_libfunc ("__builtin_setjmp");
4767 longjmp_libfunc = init_one_libfunc ("__builtin_longjmp");
4769 setjmp_libfunc = init_one_libfunc ("setjmp");
4770 longjmp_libfunc = init_one_libfunc ("longjmp");
4772 unwind_sjlj_register_libfunc = init_one_libfunc ("_Unwind_SjLj_Register");
4773 unwind_sjlj_unregister_libfunc
4774 = init_one_libfunc ("_Unwind_SjLj_Unregister");
4776 eqhf2_libfunc = init_one_libfunc ("__eqhf2");
4777 nehf2_libfunc = init_one_libfunc ("__nehf2");
4778 gthf2_libfunc = init_one_libfunc ("__gthf2");
4779 gehf2_libfunc = init_one_libfunc ("__gehf2");
4780 lthf2_libfunc = init_one_libfunc ("__lthf2");
4781 lehf2_libfunc = init_one_libfunc ("__lehf2");
4782 unordhf2_libfunc = init_one_libfunc ("__unordhf2");
4784 eqsf2_libfunc = init_one_libfunc ("__eqsf2");
4785 nesf2_libfunc = init_one_libfunc ("__nesf2");
4786 gtsf2_libfunc = init_one_libfunc ("__gtsf2");
4787 gesf2_libfunc = init_one_libfunc ("__gesf2");
4788 ltsf2_libfunc = init_one_libfunc ("__ltsf2");
4789 lesf2_libfunc = init_one_libfunc ("__lesf2");
4790 unordsf2_libfunc = init_one_libfunc ("__unordsf2");
4792 eqdf2_libfunc = init_one_libfunc ("__eqdf2");
4793 nedf2_libfunc = init_one_libfunc ("__nedf2");
4794 gtdf2_libfunc = init_one_libfunc ("__gtdf2");
4795 gedf2_libfunc = init_one_libfunc ("__gedf2");
4796 ltdf2_libfunc = init_one_libfunc ("__ltdf2");
4797 ledf2_libfunc = init_one_libfunc ("__ledf2");
4798 unorddf2_libfunc = init_one_libfunc ("__unorddf2");
4800 eqxf2_libfunc = init_one_libfunc ("__eqxf2");
4801 nexf2_libfunc = init_one_libfunc ("__nexf2");
4802 gtxf2_libfunc = init_one_libfunc ("__gtxf2");
4803 gexf2_libfunc = init_one_libfunc ("__gexf2");
4804 ltxf2_libfunc = init_one_libfunc ("__ltxf2");
4805 lexf2_libfunc = init_one_libfunc ("__lexf2");
4806 unordxf2_libfunc = init_one_libfunc ("__unordxf2");
4808 eqtf2_libfunc = init_one_libfunc ("__eqtf2");
4809 netf2_libfunc = init_one_libfunc ("__netf2");
4810 gttf2_libfunc = init_one_libfunc ("__gttf2");
4811 getf2_libfunc = init_one_libfunc ("__getf2");
4812 lttf2_libfunc = init_one_libfunc ("__lttf2");
4813 letf2_libfunc = init_one_libfunc ("__letf2");
4814 unordtf2_libfunc = init_one_libfunc ("__unordtf2");
4816 floatsisf_libfunc = init_one_libfunc ("__floatsisf");
4817 floatdisf_libfunc = init_one_libfunc ("__floatdisf");
4818 floattisf_libfunc = init_one_libfunc ("__floattisf");
4820 floatsidf_libfunc = init_one_libfunc ("__floatsidf");
4821 floatdidf_libfunc = init_one_libfunc ("__floatdidf");
4822 floattidf_libfunc = init_one_libfunc ("__floattidf");
4824 floatsixf_libfunc = init_one_libfunc ("__floatsixf");
4825 floatdixf_libfunc = init_one_libfunc ("__floatdixf");
4826 floattixf_libfunc = init_one_libfunc ("__floattixf");
4828 floatsitf_libfunc = init_one_libfunc ("__floatsitf");
4829 floatditf_libfunc = init_one_libfunc ("__floatditf");
4830 floattitf_libfunc = init_one_libfunc ("__floattitf");
4832 fixsfsi_libfunc = init_one_libfunc ("__fixsfsi");
4833 fixsfdi_libfunc = init_one_libfunc ("__fixsfdi");
4834 fixsfti_libfunc = init_one_libfunc ("__fixsfti");
4836 fixdfsi_libfunc = init_one_libfunc ("__fixdfsi");
4837 fixdfdi_libfunc = init_one_libfunc ("__fixdfdi");
4838 fixdfti_libfunc = init_one_libfunc ("__fixdfti");
4840 fixxfsi_libfunc = init_one_libfunc ("__fixxfsi");
4841 fixxfdi_libfunc = init_one_libfunc ("__fixxfdi");
4842 fixxfti_libfunc = init_one_libfunc ("__fixxfti");
4844 fixtfsi_libfunc = init_one_libfunc ("__fixtfsi");
4845 fixtfdi_libfunc = init_one_libfunc ("__fixtfdi");
4846 fixtfti_libfunc = init_one_libfunc ("__fixtfti");
4848 fixunssfsi_libfunc = init_one_libfunc ("__fixunssfsi");
4849 fixunssfdi_libfunc = init_one_libfunc ("__fixunssfdi");
4850 fixunssfti_libfunc = init_one_libfunc ("__fixunssfti");
4852 fixunsdfsi_libfunc = init_one_libfunc ("__fixunsdfsi");
4853 fixunsdfdi_libfunc = init_one_libfunc ("__fixunsdfdi");
4854 fixunsdfti_libfunc = init_one_libfunc ("__fixunsdfti");
4856 fixunsxfsi_libfunc = init_one_libfunc ("__fixunsxfsi");
4857 fixunsxfdi_libfunc = init_one_libfunc ("__fixunsxfdi");
4858 fixunsxfti_libfunc = init_one_libfunc ("__fixunsxfti");
4860 fixunstfsi_libfunc = init_one_libfunc ("__fixunstfsi");
4861 fixunstfdi_libfunc = init_one_libfunc ("__fixunstfdi");
4862 fixunstfti_libfunc = init_one_libfunc ("__fixunstfti");
4864 /* For check-memory-usage. */
4865 chkr_check_addr_libfunc = init_one_libfunc ("chkr_check_addr");
4866 chkr_set_right_libfunc = init_one_libfunc ("chkr_set_right");
4867 chkr_copy_bitmap_libfunc = init_one_libfunc ("chkr_copy_bitmap");
4868 chkr_check_exec_libfunc = init_one_libfunc ("chkr_check_exec");
4869 chkr_check_str_libfunc = init_one_libfunc ("chkr_check_str");
4871 /* For function entry/exit instrumentation. */
4872 profile_function_entry_libfunc
4873 = init_one_libfunc ("__cyg_profile_func_enter");
4874 profile_function_exit_libfunc
4875 = init_one_libfunc ("__cyg_profile_func_exit");
4877 #ifdef HAVE_conditional_trap
4881 #ifdef INIT_TARGET_OPTABS
4882 /* Allow the target to add more libcalls or rename some, etc. */
4886 /* Add these GC roots. */
4887 ggc_add_root (optab_table, OTI_MAX, sizeof(optab), mark_optab);
4888 ggc_add_rtx_root (libfunc_table, LTI_MAX);
4893 /* SCO 3.2 apparently has a broken ldexp. */
4906 #endif /* BROKEN_LDEXP */
4908 #ifdef HAVE_conditional_trap
4909 /* The insn generating function can not take an rtx_code argument.
4910 TRAP_RTX is used as an rtx argument. Its code is replaced with
4911 the code to be used in the trap insn and all other fields are
4913 static rtx trap_rtx;
4918 if (HAVE_conditional_trap)
4920 trap_rtx = gen_rtx_fmt_ee (EQ, VOIDmode, NULL_RTX, NULL_RTX);
4921 ggc_add_rtx_root (&trap_rtx, 1);
4926 /* Generate insns to trap with code TCODE if OP1 and OP2 satisfy condition
4927 CODE. Return 0 on failure. */
4930 gen_cond_trap (code, op1, op2, tcode)
4931 enum rtx_code code ATTRIBUTE_UNUSED;
4932 rtx op1, op2 ATTRIBUTE_UNUSED, tcode ATTRIBUTE_UNUSED;
4934 enum machine_mode mode = GET_MODE (op1);
4936 if (mode == VOIDmode)
4939 #ifdef HAVE_conditional_trap
4940 if (HAVE_conditional_trap
4941 && cmp_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
4945 emit_insn (GEN_FCN (cmp_optab->handlers[(int) mode].insn_code) (op1, op2));
4946 PUT_CODE (trap_rtx, code);
4947 insn = gen_conditional_trap (trap_rtx, tcode);
4951 insn = gen_sequence ();