1 /* Decompose multiword subregs.
2 Copyright (C) 2007 Free Software Foundation, Inc.
3 Contributed by Richard Henderson <rth@redhat.com>
4 Ian Lance Taylor <iant@google.com>
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
24 #include "coretypes.h"
31 #include "insn-config.h"
33 #include "basic-block.h"
39 #include "tree-pass.h"
42 #ifdef STACK_GROWS_DOWNWARD
43 # undef STACK_GROWS_DOWNWARD
44 # define STACK_GROWS_DOWNWARD 1
46 # define STACK_GROWS_DOWNWARD 0
50 DEF_VEC_ALLOC_P (bitmap,heap);
52 /* Decompose multi-word pseudo-registers into individual
53 pseudo-registers when possible. This is possible when all the uses
54 of a multi-word register are via SUBREG, or are copies of the
55 register to another location. Breaking apart the register permits
56 more CSE and permits better register allocation. */
58 /* Bit N in this bitmap is set if regno N is used in a context in
59 which we can decompose it. */
60 static bitmap decomposable_context;
62 /* Bit N in this bitmap is set if regno N is used in a context in
63 which it can not be decomposed. */
64 static bitmap non_decomposable_context;
66 /* Bit N in the bitmap in element M of this array is set if there is a
67 copy from reg M to reg N. */
68 static VEC(bitmap,heap) *reg_copy_graph;
70 /* Return whether X is a simple object which we can take a word_mode
74 simple_move_operand (rtx x)
76 if (GET_CODE (x) == SUBREG)
82 if (GET_CODE (x) == LABEL_REF
83 || GET_CODE (x) == SYMBOL_REF
84 || GET_CODE (x) == HIGH
85 || GET_CODE (x) == CONST)
89 && (MEM_VOLATILE_P (x)
90 || mode_dependent_address_p (XEXP (x, 0))))
96 /* If INSN is a single set between two objects, return the single set.
97 Such an insn can always be decomposed. INSN should have been
98 passed to recog and extract_insn before this is called. */
101 simple_move (rtx insn)
105 enum machine_mode mode;
107 if (recog_data.n_operands != 2)
110 set = single_set (insn);
115 if (x != recog_data.operand[0] && x != recog_data.operand[1])
117 if (!simple_move_operand (x))
121 if (x != recog_data.operand[0] && x != recog_data.operand[1])
123 /* For the src we can handle ASM_OPERANDS, and it is beneficial for
124 things like x86 rdtsc which returns a DImode value. */
125 if (GET_CODE (x) != ASM_OPERANDS
126 && !simple_move_operand (x))
129 /* We try to decompose in integer modes, to avoid generating
130 inefficient code copying between integer and floating point
131 registers. That means that we can't decompose if this is a
132 non-integer mode for which there is no integer mode of the same
134 mode = GET_MODE (SET_SRC (set));
135 if (!SCALAR_INT_MODE_P (mode)
136 && (mode_for_size (GET_MODE_SIZE (mode) * BITS_PER_UNIT, MODE_INT, 0)
140 /* Reject PARTIAL_INT modes. They are used for processor specific
141 purposes and it's probably best not to tamper with them. */
142 if (GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
148 /* If SET is a copy from one multi-word pseudo-register to another,
149 record that in reg_copy_graph. Return whether it is such a
153 find_pseudo_copy (rtx set)
155 rtx dest = SET_DEST (set);
156 rtx src = SET_SRC (set);
160 if (!REG_P (dest) || !REG_P (src))
165 if (HARD_REGISTER_NUM_P (rd) || HARD_REGISTER_NUM_P (rs))
168 if (GET_MODE_SIZE (GET_MODE (dest)) <= UNITS_PER_WORD)
171 b = VEC_index (bitmap, reg_copy_graph, rs);
174 b = BITMAP_ALLOC (NULL);
175 VEC_replace (bitmap, reg_copy_graph, rs, b);
178 bitmap_set_bit (b, rd);
183 /* Look through the registers in DECOMPOSABLE_CONTEXT. For each case
184 where they are copied to another register, add the register to
185 which they are copied to DECOMPOSABLE_CONTEXT. Use
186 NON_DECOMPOSABLE_CONTEXT to limit this--we don't bother to track
187 copies of registers which are in NON_DECOMPOSABLE_CONTEXT. */
190 propagate_pseudo_copies (void)
192 bitmap queue, propagate;
194 queue = BITMAP_ALLOC (NULL);
195 propagate = BITMAP_ALLOC (NULL);
197 bitmap_copy (queue, decomposable_context);
200 bitmap_iterator iter;
203 bitmap_clear (propagate);
205 EXECUTE_IF_SET_IN_BITMAP (queue, 0, i, iter)
207 bitmap b = VEC_index (bitmap, reg_copy_graph, i);
209 bitmap_ior_and_compl_into (propagate, b, non_decomposable_context);
212 bitmap_and_compl (queue, propagate, decomposable_context);
213 bitmap_ior_into (decomposable_context, propagate);
215 while (!bitmap_empty_p (queue));
218 BITMAP_FREE (propagate);
221 /* A pointer to one of these values is passed to
222 find_decomposable_subregs via for_each_rtx. */
224 enum classify_move_insn
226 /* Not a simple move from one location to another. */
228 /* A simple move from one pseudo-register to another with no
230 SIMPLE_PSEUDO_REG_MOVE,
231 /* A simple move involving a non-pseudo-register, or from one
232 pseudo-register to another with a REG_RETVAL note. */
236 /* This is called via for_each_rtx. If we find a SUBREG which we
237 could use to decompose a pseudo-register, set a bit in
238 DECOMPOSABLE_CONTEXT. If we find an unadorned register which is
239 not a simple pseudo-register copy, DATA will point at the type of
240 move, and we set a bit in DECOMPOSABLE_CONTEXT or
241 NON_DECOMPOSABLE_CONTEXT as appropriate. */
244 find_decomposable_subregs (rtx *px, void *data)
246 enum classify_move_insn *pcmi = (enum classify_move_insn *) data;
252 if (GET_CODE (x) == SUBREG)
254 rtx inner = SUBREG_REG (x);
255 unsigned int regno, outer_size, inner_size, outer_words, inner_words;
260 regno = REGNO (inner);
261 if (HARD_REGISTER_NUM_P (regno))
264 outer_size = GET_MODE_SIZE (GET_MODE (x));
265 inner_size = GET_MODE_SIZE (GET_MODE (inner));
266 outer_words = (outer_size + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
267 inner_words = (inner_size + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
269 /* We only try to decompose single word subregs of multi-word
270 registers. When we find one, we return -1 to avoid iterating
271 over the inner register.
273 ??? This doesn't allow, e.g., DImode subregs of TImode values
274 on 32-bit targets. We would need to record the way the
275 pseudo-register was used, and only decompose if all the uses
276 were the same number and size of pieces. Hopefully this
277 doesn't happen much. */
279 if (outer_words == 1 && inner_words > 1)
281 bitmap_set_bit (decomposable_context, regno);
285 /* If this is a cast from one mode to another, where the modes
286 have the same size, and they are not tieable, then mark this
287 register as non-decomposable. If we decompose it we are
288 likely to mess up whatever the backend is trying to do. */
290 && outer_size == inner_size
291 && !MODES_TIEABLE_P (GET_MODE (x), GET_MODE (inner)))
293 bitmap_set_bit (non_decomposable_context, regno);
301 /* We will see an outer SUBREG before we see the inner REG, so
302 when we see a plain REG here it means a direct reference to
305 If this is not a simple copy from one location to another,
306 then we can not decompose this register. If this is a simple
307 copy from one pseudo-register to another, with no REG_RETVAL
308 note, and the mode is right, then we mark the register as
309 decomposable. Otherwise we don't say anything about this
310 register--it could be decomposed, but whether that would be
311 profitable depends upon how it is used elsewhere.
313 We only set bits in the bitmap for multi-word
314 pseudo-registers, since those are the only ones we care about
315 and it keeps the size of the bitmaps down. */
318 if (!HARD_REGISTER_NUM_P (regno)
319 && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD)
323 case NOT_SIMPLE_MOVE:
324 bitmap_set_bit (non_decomposable_context, regno);
326 case SIMPLE_PSEUDO_REG_MOVE:
327 if (MODES_TIEABLE_P (GET_MODE (x), word_mode))
328 bitmap_set_bit (decomposable_context, regno);
339 enum classify_move_insn cmi_mem = NOT_SIMPLE_MOVE;
341 /* Any registers used in a MEM do not participate in a
342 SIMPLE_MOVE or SIMPLE_PSEUDO_REG_MOVE. Do our own recursion
343 here, and return -1 to block the parent's recursion. */
344 for_each_rtx (&XEXP (x, 0), find_decomposable_subregs, &cmi_mem);
351 /* Decompose REGNO into word-sized components. We smash the REG node
352 in place. This ensures that (1) something goes wrong quickly if we
353 fail to make some replacement, and (2) the debug information inside
354 the symbol table is automatically kept up to date. */
357 decompose_register (unsigned int regno)
360 unsigned int words, i;
363 reg = regno_reg_rtx[regno];
365 regno_reg_rtx[regno] = NULL_RTX;
367 words = GET_MODE_SIZE (GET_MODE (reg));
368 words = (words + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
370 v = rtvec_alloc (words);
371 for (i = 0; i < words; ++i)
372 RTVEC_ELT (v, i) = gen_reg_rtx_offset (reg, word_mode, i * UNITS_PER_WORD);
374 PUT_CODE (reg, CONCATN);
379 fprintf (dump_file, "; Splitting reg %u ->", regno);
380 for (i = 0; i < words; ++i)
381 fprintf (dump_file, " %u", REGNO (XVECEXP (reg, 0, i)));
382 fputc ('\n', dump_file);
386 /* Get a SUBREG of a CONCATN. */
389 simplify_subreg_concatn (enum machine_mode outermode, rtx op,
392 unsigned int inner_size;
393 enum machine_mode innermode;
395 unsigned int final_offset;
397 gcc_assert (GET_CODE (op) == CONCATN);
398 gcc_assert (byte % GET_MODE_SIZE (outermode) == 0);
400 innermode = GET_MODE (op);
401 gcc_assert (byte < GET_MODE_SIZE (innermode));
402 gcc_assert (GET_MODE_SIZE (outermode) <= GET_MODE_SIZE (innermode));
404 inner_size = GET_MODE_SIZE (innermode) / XVECLEN (op, 0);
405 part = XVECEXP (op, 0, byte / inner_size);
406 final_offset = byte % inner_size;
407 if (final_offset + GET_MODE_SIZE (outermode) > inner_size)
410 return simplify_gen_subreg (outermode, part, GET_MODE (part), final_offset);
413 /* Wrapper around simplify_gen_subreg which handles CONCATN. */
416 simplify_gen_subreg_concatn (enum machine_mode outermode, rtx op,
417 enum machine_mode innermode, unsigned int byte)
421 /* We have to handle generating a SUBREG of a SUBREG of a CONCATN.
422 If OP is a SUBREG of a CONCATN, then it must be a simple mode
423 change with the same size and offset 0, or it must extract a
424 part. We shouldn't see anything else here. */
425 if (GET_CODE (op) == SUBREG && GET_CODE (SUBREG_REG (op)) == CONCATN)
429 if ((GET_MODE_SIZE (GET_MODE (op))
430 == GET_MODE_SIZE (GET_MODE (SUBREG_REG (op))))
431 && SUBREG_BYTE (op) == 0)
432 return simplify_gen_subreg_concatn (outermode, SUBREG_REG (op),
433 GET_MODE (SUBREG_REG (op)), byte);
435 op2 = simplify_subreg_concatn (GET_MODE (op), SUBREG_REG (op),
439 /* We don't handle paradoxical subregs here. */
440 gcc_assert (GET_MODE_SIZE (outermode)
441 <= GET_MODE_SIZE (GET_MODE (op)));
442 gcc_assert (GET_MODE_SIZE (GET_MODE (op))
443 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (op))));
444 op2 = simplify_subreg_concatn (outermode, SUBREG_REG (op),
445 byte + SUBREG_BYTE (op));
446 gcc_assert (op2 != NULL_RTX);
451 gcc_assert (op != NULL_RTX);
452 gcc_assert (innermode == GET_MODE (op));
455 if (GET_CODE (op) == CONCATN)
456 return simplify_subreg_concatn (outermode, op, byte);
458 ret = simplify_gen_subreg (outermode, op, innermode, byte);
460 /* If we see an insn like (set (reg:DI) (subreg:DI (reg:SI) 0)) then
461 resolve_simple_move will ask for the high part of the paradoxical
462 subreg, which does not have a value. Just return a zero. */
464 && GET_CODE (op) == SUBREG
465 && SUBREG_BYTE (op) == 0
466 && (GET_MODE_SIZE (innermode)
467 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op)))))
468 return CONST0_RTX (outermode);
470 gcc_assert (ret != NULL_RTX);
474 /* Return whether we should resolve X into the registers into which it
478 resolve_reg_p (rtx x)
480 return GET_CODE (x) == CONCATN;
483 /* Return whether X is a SUBREG of a register which we need to
487 resolve_subreg_p (rtx x)
489 if (GET_CODE (x) != SUBREG)
491 return resolve_reg_p (SUBREG_REG (x));
494 /* This is called via for_each_rtx. Look for SUBREGs which need to be
498 resolve_subreg_use (rtx *px, void *data)
500 rtx insn = (rtx) data;
506 if (resolve_subreg_p (x))
508 x = simplify_subreg_concatn (GET_MODE (x), SUBREG_REG (x),
511 /* It is possible for a note to contain a reference which we can
512 decompose. In this case, return 1 to the caller to indicate
513 that the note must be removed. */
520 validate_change (insn, px, x, 1);
524 if (resolve_reg_p (x))
526 /* Return 1 to the caller to indicate that we found a direct
527 reference to a register which is being decomposed. This can
528 happen inside notes. */
536 /* We are deleting INSN. Move any EH_REGION notes to INSNS. */
539 move_eh_region_note (rtx insn, rtx insns)
543 note = find_reg_note (insn, REG_EH_REGION, NULL_RTX);
544 if (note == NULL_RTX)
547 gcc_assert (CALL_P (insn)
548 || (flag_non_call_exceptions && may_trap_p (PATTERN (insn))));
550 for (p = insns; p != NULL_RTX; p = NEXT_INSN (p))
553 || (flag_non_call_exceptions
555 && may_trap_p (PATTERN (p))))
556 REG_NOTES (p) = gen_rtx_EXPR_LIST (REG_EH_REGION, XEXP (note, 0),
561 /* If there is a REG_LIBCALL note on OLD_START, move it to NEW_START,
562 and link the corresponding REG_RETVAL note to NEW_START. */
565 move_libcall_note (rtx old_start, rtx new_start)
567 rtx note0, note1, end;
569 note0 = find_reg_note (old_start, REG_LIBCALL, NULL);
570 if (note0 == NULL_RTX)
573 remove_note (old_start, note0);
574 end = XEXP (note0, 0);
575 note1 = find_reg_note (end, REG_RETVAL, NULL);
577 XEXP (note0, 1) = REG_NOTES (new_start);
578 REG_NOTES (new_start) = note0;
579 XEXP (note1, 0) = new_start;
582 /* Remove any REG_RETVAL note, the corresponding REG_LIBCALL note, and
583 any markers for a no-conflict block. We have decomposed the
584 registers so the non-conflict is now obvious. */
587 remove_retval_note (rtx insn1)
589 rtx note0, insn0, note1, insn;
591 note1 = find_reg_note (insn1, REG_RETVAL, NULL);
592 if (note1 == NULL_RTX)
595 insn0 = XEXP (note1, 0);
596 note0 = find_reg_note (insn0, REG_LIBCALL, NULL);
598 remove_note (insn0, note0);
599 remove_note (insn1, note1);
601 for (insn = insn0; insn != insn1; insn = NEXT_INSN (insn))
607 note = find_reg_note (insn, REG_NO_CONFLICT, NULL);
608 if (note == NULL_RTX)
610 remove_note (insn, note);
615 /* Resolve any decomposed registers which appear in register notes on
619 resolve_reg_notes (rtx insn)
623 note = find_reg_equal_equiv_note (insn);
626 int old_count = num_validated_changes ();
627 if (for_each_rtx (&XEXP (note, 0), resolve_subreg_use, NULL))
629 remove_note (insn, note);
630 remove_retval_note (insn);
633 if (old_count != num_validated_changes ())
634 df_notes_rescan (insn);
637 pnote = ®_NOTES (insn);
638 while (*pnote != NULL_RTX)
643 switch (REG_NOTE_KIND (note))
645 case REG_NO_CONFLICT:
648 if (resolve_reg_p (XEXP (note, 0)))
657 *pnote = XEXP (note, 1);
659 pnote = &XEXP (note, 1);
663 /* Return whether X can be decomposed into subwords. */
666 can_decompose_p (rtx x)
670 unsigned int regno = REGNO (x);
672 if (HARD_REGISTER_NUM_P (regno))
673 return (validate_subreg (word_mode, GET_MODE (x), x, UNITS_PER_WORD)
674 && HARD_REGNO_MODE_OK (regno, word_mode));
676 return !bitmap_bit_p (non_decomposable_context, regno);
682 /* Decompose the registers used in a simple move SET within INSN. If
683 we don't change anything, return INSN, otherwise return the start
684 of the sequence of moves. */
687 resolve_simple_move (rtx set, rtx insn)
689 rtx src, dest, real_dest, insns;
690 enum machine_mode orig_mode, dest_mode;
695 dest = SET_DEST (set);
696 orig_mode = GET_MODE (dest);
698 words = (GET_MODE_SIZE (orig_mode) + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
704 /* We have to handle copying from a SUBREG of a decomposed reg where
705 the SUBREG is larger than word size. Rather than assume that we
706 can take a word_mode SUBREG of the destination, we copy to a new
707 register and then copy that to the destination. */
709 real_dest = NULL_RTX;
711 if (GET_CODE (src) == SUBREG
712 && resolve_reg_p (SUBREG_REG (src))
713 && (SUBREG_BYTE (src) != 0
714 || (GET_MODE_SIZE (orig_mode)
715 != GET_MODE_SIZE (GET_MODE (SUBREG_REG (src))))))
718 dest = gen_reg_rtx (orig_mode);
719 if (REG_P (real_dest))
720 REG_ATTRS (dest) = REG_ATTRS (real_dest);
723 /* Similarly if we are copying to a SUBREG of a decomposed reg where
724 the SUBREG is larger than word size. */
726 if (GET_CODE (dest) == SUBREG
727 && resolve_reg_p (SUBREG_REG (dest))
728 && (SUBREG_BYTE (dest) != 0
729 || (GET_MODE_SIZE (orig_mode)
730 != GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))))
732 rtx reg, minsn, smove;
734 reg = gen_reg_rtx (orig_mode);
735 minsn = emit_move_insn (reg, src);
736 smove = single_set (minsn);
737 gcc_assert (smove != NULL_RTX);
738 resolve_simple_move (smove, minsn);
742 /* If we didn't have any big SUBREGS of decomposed registers, and
743 neither side of the move is a register we are decomposing, then
744 we don't have to do anything here. */
746 if (src == SET_SRC (set)
747 && dest == SET_DEST (set)
748 && !resolve_reg_p (src)
749 && !resolve_subreg_p (src)
750 && !resolve_reg_p (dest)
751 && !resolve_subreg_p (dest))
757 /* It's possible for the code to use a subreg of a decomposed
758 register while forming an address. We need to handle that before
759 passing the address to emit_move_insn. We pass NULL_RTX as the
760 insn parameter to resolve_subreg_use because we can not validate
762 if (MEM_P (src) || MEM_P (dest))
767 for_each_rtx (&XEXP (src, 0), resolve_subreg_use, NULL_RTX);
769 for_each_rtx (&XEXP (dest, 0), resolve_subreg_use, NULL_RTX);
770 acg = apply_change_group ();
774 /* If SRC is a register which we can't decompose, or has side
775 effects, we need to move via a temporary register. */
777 if (!can_decompose_p (src)
778 || side_effects_p (src)
779 || GET_CODE (src) == ASM_OPERANDS)
783 reg = gen_reg_rtx (orig_mode);
784 emit_move_insn (reg, src);
788 /* If DEST is a register which we can't decompose, or has side
789 effects, we need to first move to a temporary register. We
790 handle the common case of pushing an operand directly. We also
791 go through a temporary register if it holds a floating point
792 value. This gives us better code on systems which can't move
793 data easily between integer and floating point registers. */
795 dest_mode = orig_mode;
796 pushing = push_operand (dest, dest_mode);
797 if (!can_decompose_p (dest)
798 || (side_effects_p (dest) && !pushing)
799 || (!SCALAR_INT_MODE_P (dest_mode)
800 && !resolve_reg_p (dest)
801 && !resolve_subreg_p (dest)))
803 if (real_dest == NULL_RTX)
805 if (!SCALAR_INT_MODE_P (dest_mode))
807 dest_mode = mode_for_size (GET_MODE_SIZE (dest_mode) * BITS_PER_UNIT,
809 gcc_assert (dest_mode != BLKmode);
811 dest = gen_reg_rtx (dest_mode);
812 if (REG_P (real_dest))
813 REG_ATTRS (dest) = REG_ATTRS (real_dest);
818 unsigned int i, j, jinc;
820 gcc_assert (GET_MODE_SIZE (orig_mode) % UNITS_PER_WORD == 0);
821 gcc_assert (GET_CODE (XEXP (dest, 0)) != PRE_MODIFY);
822 gcc_assert (GET_CODE (XEXP (dest, 0)) != POST_MODIFY);
824 if (WORDS_BIG_ENDIAN == STACK_GROWS_DOWNWARD)
835 for (i = 0; i < words; ++i, j += jinc)
839 temp = copy_rtx (XEXP (dest, 0));
840 temp = adjust_automodify_address_nv (dest, word_mode, temp,
842 emit_move_insn (temp,
843 simplify_gen_subreg_concatn (word_mode, src,
845 j * UNITS_PER_WORD));
852 if (REG_P (dest) && !HARD_REGISTER_NUM_P (REGNO (dest)))
853 emit_insn (gen_rtx_CLOBBER (VOIDmode, dest));
855 for (i = 0; i < words; ++i)
856 emit_move_insn (simplify_gen_subreg_concatn (word_mode, dest,
859 simplify_gen_subreg_concatn (word_mode, src,
861 i * UNITS_PER_WORD));
864 if (real_dest != NULL_RTX)
866 rtx mdest, minsn, smove;
868 if (dest_mode == orig_mode)
871 mdest = simplify_gen_subreg (orig_mode, dest, GET_MODE (dest), 0);
872 minsn = emit_move_insn (real_dest, mdest);
874 smove = single_set (minsn);
875 gcc_assert (smove != NULL_RTX);
877 resolve_simple_move (smove, minsn);
880 insns = get_insns ();
883 move_eh_region_note (insn, insns);
885 emit_insn_before (insns, insn);
887 move_libcall_note (insn, insns);
888 remove_retval_note (insn);
894 /* Change a CLOBBER of a decomposed register into a CLOBBER of the
895 component registers. Return whether we changed something. */
898 resolve_clobber (rtx pat, rtx insn)
901 enum machine_mode orig_mode;
902 unsigned int words, i;
906 if (!resolve_reg_p (reg) && !resolve_subreg_p (reg))
909 orig_mode = GET_MODE (reg);
910 words = GET_MODE_SIZE (orig_mode);
911 words = (words + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
913 ret = validate_change (NULL_RTX, &XEXP (pat, 0),
914 simplify_gen_subreg_concatn (word_mode, reg,
917 df_insn_rescan (insn);
918 gcc_assert (ret != 0);
920 for (i = words - 1; i > 0; --i)
924 x = simplify_gen_subreg_concatn (word_mode, reg, orig_mode,
926 x = gen_rtx_CLOBBER (VOIDmode, x);
927 emit_insn_after (x, insn);
933 /* A USE of a decomposed register is no longer meaningful. Return
934 whether we changed something. */
937 resolve_use (rtx pat, rtx insn)
939 if (resolve_reg_p (XEXP (pat, 0)) || resolve_subreg_p (XEXP (pat, 0)))
947 /* Look for registers which are always accessed via word-sized SUBREGs
948 or via copies. Decompose these registers into several word-sized
952 decompose_multiword_subregs (void)
958 df_set_flags (DF_DEFER_INSN_RESCAN);
960 max = max_reg_num ();
962 /* First see if there are any multi-word pseudo-registers. If there
963 aren't, there is nothing we can do. This should speed up this
964 pass in the normal case, since it should be faster than scanning
969 for (i = FIRST_PSEUDO_REGISTER; i < max; ++i)
971 if (regno_reg_rtx[i] != NULL
972 && GET_MODE_SIZE (GET_MODE (regno_reg_rtx[i])) > UNITS_PER_WORD)
979 /* FIXME: When the dataflow branch is merged, we can change this
980 code to look for each multi-word pseudo-register and to find each
981 insn which sets or uses that register. That should be faster
982 than scanning all the insns. */
984 decomposable_context = BITMAP_ALLOC (NULL);
985 non_decomposable_context = BITMAP_ALLOC (NULL);
987 reg_copy_graph = VEC_alloc (bitmap, heap, max);
988 VEC_safe_grow (bitmap, heap, reg_copy_graph, max);
989 memset (VEC_address (bitmap, reg_copy_graph), 0, sizeof (bitmap) * max);
995 FOR_BB_INSNS (bb, insn)
998 enum classify_move_insn cmi;
1002 || GET_CODE (PATTERN (insn)) == CLOBBER
1003 || GET_CODE (PATTERN (insn)) == USE)
1006 recog_memoized (insn);
1007 extract_insn (insn);
1009 set = simple_move (insn);
1012 cmi = NOT_SIMPLE_MOVE;
1017 retval = find_reg_note (insn, REG_RETVAL, NULL_RTX) != NULL_RTX;
1019 if (find_pseudo_copy (set) && !retval)
1020 cmi = SIMPLE_PSEUDO_REG_MOVE;
1022 && REG_P (SET_SRC (set))
1023 && HARD_REGISTER_P (SET_SRC (set)))
1027 /* We don't want to decompose an assignment which
1028 copies the value returned by a libcall to a
1029 pseudo-register. Doing that will lose the RETVAL
1030 note with no real gain. */
1031 cmi = NOT_SIMPLE_MOVE;
1033 /* If we have a RETVAL note, there should be an
1034 EQUAL note. We don't want to decompose any
1035 registers which that EQUAL note refers to
1036 directly. If we do, we will no longer know the
1037 value of the libcall. */
1038 note = find_reg_equal_equiv_note (insn);
1039 if (note != NULL_RTX)
1040 for_each_rtx (&XEXP (note, 0), find_decomposable_subregs,
1047 n = recog_data.n_operands;
1048 for (i = 0; i < n; ++i)
1050 for_each_rtx (&recog_data.operand[i],
1051 find_decomposable_subregs,
1054 /* We handle ASM_OPERANDS as a special case to support
1055 things like x86 rdtsc which returns a DImode value.
1056 We can decompose the output, which will certainly be
1057 operand 0, but not the inputs. */
1059 if (cmi == SIMPLE_MOVE
1060 && GET_CODE (SET_SRC (set)) == ASM_OPERANDS)
1062 gcc_assert (i == 0);
1063 cmi = NOT_SIMPLE_MOVE;
1069 bitmap_and_compl_into (decomposable_context, non_decomposable_context);
1070 if (!bitmap_empty_p (decomposable_context))
1074 sbitmap_iterator sbi;
1075 bitmap_iterator iter;
1078 propagate_pseudo_copies ();
1080 sub_blocks = sbitmap_alloc (last_basic_block);
1081 sbitmap_zero (sub_blocks);
1083 EXECUTE_IF_SET_IN_BITMAP (decomposable_context, 0, regno, iter)
1084 decompose_register (regno);
1090 FOR_BB_INSNS (bb, insn)
1098 next = NEXT_INSN (insn);
1101 pat = PATTERN (insn);
1102 if (GET_CODE (pat) == CLOBBER)
1104 if (resolve_clobber (pat, insn))
1107 else if (GET_CODE (pat) == USE)
1109 if (resolve_use (pat, insn))
1117 recog_memoized (insn);
1118 extract_insn (insn);
1120 set = simple_move (insn);
1123 rtx orig_insn = insn;
1124 bool cfi = control_flow_insn_p (insn);
1126 /* We can end up splitting loads to multi-word pseudos
1127 into separate loads to machine word size pseudos.
1128 When this happens, we first had one load that can
1129 throw, and after resolve_simple_move we'll have a
1130 bunch of loads (at least two). All those loads may
1131 trap if we can have non-call exceptions, so they
1132 all will end the current basic block. We split the
1133 block after the outer loop over all insns, but we
1134 make sure here that we will be able to split the
1135 basic block and still produce the correct control
1136 flow graph for it. */
1138 || (flag_non_call_exceptions
1139 && can_throw_internal (insn)));
1141 insn = resolve_simple_move (set, insn);
1142 if (insn != orig_insn)
1146 remove_retval_note (insn);
1148 recog_memoized (insn);
1149 extract_insn (insn);
1152 SET_BIT (sub_blocks, bb->index);
1156 for (i = recog_data.n_operands - 1; i >= 0; --i)
1157 for_each_rtx (recog_data.operand_loc[i],
1161 resolve_reg_notes (insn);
1163 if (num_validated_changes () > 0)
1165 for (i = recog_data.n_dups - 1; i >= 0; --i)
1167 rtx *pl = recog_data.dup_loc[i];
1168 int dup_num = recog_data.dup_num[i];
1169 rtx *px = recog_data.operand_loc[dup_num];
1171 validate_change (insn, pl, *px, 1);
1174 i = apply_change_group ();
1177 remove_retval_note (insn);
1185 /* If we had insns to split that caused control flow insns in the middle
1186 of a basic block, split those blocks now. Note that we only handle
1187 the case where splitting a load has caused multiple possibly trapping
1189 EXECUTE_IF_SET_IN_SBITMAP (sub_blocks, 0, i, sbi)
1194 bb = BASIC_BLOCK (i);
1195 insn = BB_HEAD (bb);
1200 if (control_flow_insn_p (insn))
1202 /* Split the block after insn. There will be a fallthru
1203 edge, which is OK so we keep it. We have to create the
1204 exception edges ourselves. */
1205 fallthru = split_block (bb, insn);
1206 rtl_make_eh_edge (NULL, bb, BB_END (bb));
1207 bb = fallthru->dest;
1208 insn = BB_HEAD (bb);
1211 insn = NEXT_INSN (insn);
1215 sbitmap_free (sub_blocks);
1222 for (i = 0; VEC_iterate (bitmap, reg_copy_graph, i, b); ++i)
1227 VEC_free (bitmap, heap, reg_copy_graph);
1229 BITMAP_FREE (decomposable_context);
1230 BITMAP_FREE (non_decomposable_context);
1233 /* Gate function for lower subreg pass. */
1236 gate_handle_lower_subreg (void)
1238 return flag_split_wide_types != 0;
1241 /* Implement first lower subreg pass. */
1244 rest_of_handle_lower_subreg (void)
1246 decompose_multiword_subregs ();
1250 /* Implement second lower subreg pass. */
1253 rest_of_handle_lower_subreg2 (void)
1255 decompose_multiword_subregs ();
1259 struct tree_opt_pass pass_lower_subreg =
1261 "subreg", /* name */
1262 gate_handle_lower_subreg, /* gate */
1263 rest_of_handle_lower_subreg, /* execute */
1266 0, /* static_pass_number */
1267 TV_LOWER_SUBREG, /* tv_id */
1268 0, /* properties_required */
1269 0, /* properties_provided */
1270 0, /* properties_destroyed */
1271 0, /* todo_flags_start */
1274 TODO_verify_flow, /* todo_flags_finish */
1278 struct tree_opt_pass pass_lower_subreg2 =
1280 "subreg2", /* name */
1281 gate_handle_lower_subreg, /* gate */
1282 rest_of_handle_lower_subreg2, /* execute */
1285 0, /* static_pass_number */
1286 TV_LOWER_SUBREG, /* tv_id */
1287 0, /* properties_required */
1288 0, /* properties_provided */
1289 0, /* properties_destroyed */
1290 0, /* todo_flags_start */
1294 TODO_verify_flow, /* todo_flags_finish */