1 /* Decompose multiword subregs.
2 Copyright (C) 2007, 2008, 2009 Free Software Foundation, Inc.
3 Contributed by Richard Henderson <rth@redhat.com>
4 Ian Lance Taylor <iant@google.com>
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
24 #include "coretypes.h"
31 #include "insn-config.h"
33 #include "basic-block.h"
40 #include "tree-pass.h"
43 #ifdef STACK_GROWS_DOWNWARD
44 # undef STACK_GROWS_DOWNWARD
45 # define STACK_GROWS_DOWNWARD 1
47 # define STACK_GROWS_DOWNWARD 0
51 DEF_VEC_ALLOC_P (bitmap,heap);
53 /* Decompose multi-word pseudo-registers into individual
54 pseudo-registers when possible. This is possible when all the uses
55 of a multi-word register are via SUBREG, or are copies of the
56 register to another location. Breaking apart the register permits
57 more CSE and permits better register allocation. */
59 /* Bit N in this bitmap is set if regno N is used in a context in
60 which we can decompose it. */
61 static bitmap decomposable_context;
63 /* Bit N in this bitmap is set if regno N is used in a context in
64 which it can not be decomposed. */
65 static bitmap non_decomposable_context;
67 /* Bit N in this bitmap is set if regno N is used in a subreg
68 which changes the mode but not the size. This typically happens
69 when the register accessed as a floating-point value; we want to
70 avoid generating accesses to its subwords in integer modes. */
71 static bitmap subreg_context;
73 /* Bit N in the bitmap in element M of this array is set if there is a
74 copy from reg M to reg N. */
75 static VEC(bitmap,heap) *reg_copy_graph;
77 /* Return whether X is a simple object which we can take a word_mode
81 simple_move_operand (rtx x)
83 if (GET_CODE (x) == SUBREG)
89 if (GET_CODE (x) == LABEL_REF
90 || GET_CODE (x) == SYMBOL_REF
91 || GET_CODE (x) == HIGH
92 || GET_CODE (x) == CONST)
96 && (MEM_VOLATILE_P (x)
97 || mode_dependent_address_p (XEXP (x, 0))))
103 /* If INSN is a single set between two objects, return the single set.
104 Such an insn can always be decomposed. INSN should have been
105 passed to recog and extract_insn before this is called. */
108 simple_move (rtx insn)
112 enum machine_mode mode;
114 if (recog_data.n_operands != 2)
117 set = single_set (insn);
122 if (x != recog_data.operand[0] && x != recog_data.operand[1])
124 if (!simple_move_operand (x))
128 if (x != recog_data.operand[0] && x != recog_data.operand[1])
130 /* For the src we can handle ASM_OPERANDS, and it is beneficial for
131 things like x86 rdtsc which returns a DImode value. */
132 if (GET_CODE (x) != ASM_OPERANDS
133 && !simple_move_operand (x))
136 /* We try to decompose in integer modes, to avoid generating
137 inefficient code copying between integer and floating point
138 registers. That means that we can't decompose if this is a
139 non-integer mode for which there is no integer mode of the same
141 mode = GET_MODE (SET_SRC (set));
142 if (!SCALAR_INT_MODE_P (mode)
143 && (mode_for_size (GET_MODE_SIZE (mode) * BITS_PER_UNIT, MODE_INT, 0)
147 /* Reject PARTIAL_INT modes. They are used for processor specific
148 purposes and it's probably best not to tamper with them. */
149 if (GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
155 /* If SET is a copy from one multi-word pseudo-register to another,
156 record that in reg_copy_graph. Return whether it is such a
160 find_pseudo_copy (rtx set)
162 rtx dest = SET_DEST (set);
163 rtx src = SET_SRC (set);
167 if (!REG_P (dest) || !REG_P (src))
172 if (HARD_REGISTER_NUM_P (rd) || HARD_REGISTER_NUM_P (rs))
175 if (GET_MODE_SIZE (GET_MODE (dest)) <= UNITS_PER_WORD)
178 b = VEC_index (bitmap, reg_copy_graph, rs);
181 b = BITMAP_ALLOC (NULL);
182 VEC_replace (bitmap, reg_copy_graph, rs, b);
185 bitmap_set_bit (b, rd);
190 /* Look through the registers in DECOMPOSABLE_CONTEXT. For each case
191 where they are copied to another register, add the register to
192 which they are copied to DECOMPOSABLE_CONTEXT. Use
193 NON_DECOMPOSABLE_CONTEXT to limit this--we don't bother to track
194 copies of registers which are in NON_DECOMPOSABLE_CONTEXT. */
197 propagate_pseudo_copies (void)
199 bitmap queue, propagate;
201 queue = BITMAP_ALLOC (NULL);
202 propagate = BITMAP_ALLOC (NULL);
204 bitmap_copy (queue, decomposable_context);
207 bitmap_iterator iter;
210 bitmap_clear (propagate);
212 EXECUTE_IF_SET_IN_BITMAP (queue, 0, i, iter)
214 bitmap b = VEC_index (bitmap, reg_copy_graph, i);
216 bitmap_ior_and_compl_into (propagate, b, non_decomposable_context);
219 bitmap_and_compl (queue, propagate, decomposable_context);
220 bitmap_ior_into (decomposable_context, propagate);
222 while (!bitmap_empty_p (queue));
225 BITMAP_FREE (propagate);
228 /* A pointer to one of these values is passed to
229 find_decomposable_subregs via for_each_rtx. */
231 enum classify_move_insn
233 /* Not a simple move from one location to another. */
235 /* A simple move from one pseudo-register to another. */
236 SIMPLE_PSEUDO_REG_MOVE,
237 /* A simple move involving a non-pseudo-register. */
241 /* This is called via for_each_rtx. If we find a SUBREG which we
242 could use to decompose a pseudo-register, set a bit in
243 DECOMPOSABLE_CONTEXT. If we find an unadorned register which is
244 not a simple pseudo-register copy, DATA will point at the type of
245 move, and we set a bit in DECOMPOSABLE_CONTEXT or
246 NON_DECOMPOSABLE_CONTEXT as appropriate. */
249 find_decomposable_subregs (rtx *px, void *data)
251 enum classify_move_insn *pcmi = (enum classify_move_insn *) data;
257 if (GET_CODE (x) == SUBREG)
259 rtx inner = SUBREG_REG (x);
260 unsigned int regno, outer_size, inner_size, outer_words, inner_words;
265 regno = REGNO (inner);
266 if (HARD_REGISTER_NUM_P (regno))
269 outer_size = GET_MODE_SIZE (GET_MODE (x));
270 inner_size = GET_MODE_SIZE (GET_MODE (inner));
271 outer_words = (outer_size + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
272 inner_words = (inner_size + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
274 /* We only try to decompose single word subregs of multi-word
275 registers. When we find one, we return -1 to avoid iterating
276 over the inner register.
278 ??? This doesn't allow, e.g., DImode subregs of TImode values
279 on 32-bit targets. We would need to record the way the
280 pseudo-register was used, and only decompose if all the uses
281 were the same number and size of pieces. Hopefully this
282 doesn't happen much. */
284 if (outer_words == 1 && inner_words > 1)
286 bitmap_set_bit (decomposable_context, regno);
290 /* If this is a cast from one mode to another, where the modes
291 have the same size, and they are not tieable, then mark this
292 register as non-decomposable. If we decompose it we are
293 likely to mess up whatever the backend is trying to do. */
295 && outer_size == inner_size
296 && !MODES_TIEABLE_P (GET_MODE (x), GET_MODE (inner)))
298 bitmap_set_bit (non_decomposable_context, regno);
299 bitmap_set_bit (subreg_context, regno);
307 /* We will see an outer SUBREG before we see the inner REG, so
308 when we see a plain REG here it means a direct reference to
311 If this is not a simple copy from one location to another,
312 then we can not decompose this register. If this is a simple
313 copy from one pseudo-register to another, and the mode is right
314 then we mark the register as decomposable.
315 Otherwise we don't say anything about this register --
316 it could be decomposed, but whether that would be
317 profitable depends upon how it is used elsewhere.
319 We only set bits in the bitmap for multi-word
320 pseudo-registers, since those are the only ones we care about
321 and it keeps the size of the bitmaps down. */
324 if (!HARD_REGISTER_NUM_P (regno)
325 && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD)
329 case NOT_SIMPLE_MOVE:
330 bitmap_set_bit (non_decomposable_context, regno);
332 case SIMPLE_PSEUDO_REG_MOVE:
333 if (MODES_TIEABLE_P (GET_MODE (x), word_mode))
334 bitmap_set_bit (decomposable_context, regno);
345 enum classify_move_insn cmi_mem = NOT_SIMPLE_MOVE;
347 /* Any registers used in a MEM do not participate in a
348 SIMPLE_MOVE or SIMPLE_PSEUDO_REG_MOVE. Do our own recursion
349 here, and return -1 to block the parent's recursion. */
350 for_each_rtx (&XEXP (x, 0), find_decomposable_subregs, &cmi_mem);
357 /* Decompose REGNO into word-sized components. We smash the REG node
358 in place. This ensures that (1) something goes wrong quickly if we
359 fail to make some replacement, and (2) the debug information inside
360 the symbol table is automatically kept up to date. */
363 decompose_register (unsigned int regno)
366 unsigned int words, i;
369 reg = regno_reg_rtx[regno];
371 regno_reg_rtx[regno] = NULL_RTX;
373 words = GET_MODE_SIZE (GET_MODE (reg));
374 words = (words + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
376 v = rtvec_alloc (words);
377 for (i = 0; i < words; ++i)
378 RTVEC_ELT (v, i) = gen_reg_rtx_offset (reg, word_mode, i * UNITS_PER_WORD);
380 PUT_CODE (reg, CONCATN);
385 fprintf (dump_file, "; Splitting reg %u ->", regno);
386 for (i = 0; i < words; ++i)
387 fprintf (dump_file, " %u", REGNO (XVECEXP (reg, 0, i)));
388 fputc ('\n', dump_file);
392 /* Get a SUBREG of a CONCATN. */
395 simplify_subreg_concatn (enum machine_mode outermode, rtx op,
398 unsigned int inner_size;
399 enum machine_mode innermode;
401 unsigned int final_offset;
403 gcc_assert (GET_CODE (op) == CONCATN);
404 gcc_assert (byte % GET_MODE_SIZE (outermode) == 0);
406 innermode = GET_MODE (op);
407 gcc_assert (byte < GET_MODE_SIZE (innermode));
408 gcc_assert (GET_MODE_SIZE (outermode) <= GET_MODE_SIZE (innermode));
410 inner_size = GET_MODE_SIZE (innermode) / XVECLEN (op, 0);
411 part = XVECEXP (op, 0, byte / inner_size);
412 final_offset = byte % inner_size;
413 if (final_offset + GET_MODE_SIZE (outermode) > inner_size)
416 return simplify_gen_subreg (outermode, part, GET_MODE (part), final_offset);
419 /* Wrapper around simplify_gen_subreg which handles CONCATN. */
422 simplify_gen_subreg_concatn (enum machine_mode outermode, rtx op,
423 enum machine_mode innermode, unsigned int byte)
427 /* We have to handle generating a SUBREG of a SUBREG of a CONCATN.
428 If OP is a SUBREG of a CONCATN, then it must be a simple mode
429 change with the same size and offset 0, or it must extract a
430 part. We shouldn't see anything else here. */
431 if (GET_CODE (op) == SUBREG && GET_CODE (SUBREG_REG (op)) == CONCATN)
435 if ((GET_MODE_SIZE (GET_MODE (op))
436 == GET_MODE_SIZE (GET_MODE (SUBREG_REG (op))))
437 && SUBREG_BYTE (op) == 0)
438 return simplify_gen_subreg_concatn (outermode, SUBREG_REG (op),
439 GET_MODE (SUBREG_REG (op)), byte);
441 op2 = simplify_subreg_concatn (GET_MODE (op), SUBREG_REG (op),
445 /* We don't handle paradoxical subregs here. */
446 gcc_assert (GET_MODE_SIZE (outermode)
447 <= GET_MODE_SIZE (GET_MODE (op)));
448 gcc_assert (GET_MODE_SIZE (GET_MODE (op))
449 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (op))));
450 op2 = simplify_subreg_concatn (outermode, SUBREG_REG (op),
451 byte + SUBREG_BYTE (op));
452 gcc_assert (op2 != NULL_RTX);
457 gcc_assert (op != NULL_RTX);
458 gcc_assert (innermode == GET_MODE (op));
461 if (GET_CODE (op) == CONCATN)
462 return simplify_subreg_concatn (outermode, op, byte);
464 ret = simplify_gen_subreg (outermode, op, innermode, byte);
466 /* If we see an insn like (set (reg:DI) (subreg:DI (reg:SI) 0)) then
467 resolve_simple_move will ask for the high part of the paradoxical
468 subreg, which does not have a value. Just return a zero. */
470 && GET_CODE (op) == SUBREG
471 && SUBREG_BYTE (op) == 0
472 && (GET_MODE_SIZE (innermode)
473 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op)))))
474 return CONST0_RTX (outermode);
476 gcc_assert (ret != NULL_RTX);
480 /* Return whether we should resolve X into the registers into which it
484 resolve_reg_p (rtx x)
486 return GET_CODE (x) == CONCATN;
489 /* Return whether X is a SUBREG of a register which we need to
493 resolve_subreg_p (rtx x)
495 if (GET_CODE (x) != SUBREG)
497 return resolve_reg_p (SUBREG_REG (x));
500 /* This is called via for_each_rtx. Look for SUBREGs which need to be
504 resolve_subreg_use (rtx *px, void *data)
506 rtx insn = (rtx) data;
512 if (resolve_subreg_p (x))
514 x = simplify_subreg_concatn (GET_MODE (x), SUBREG_REG (x),
517 /* It is possible for a note to contain a reference which we can
518 decompose. In this case, return 1 to the caller to indicate
519 that the note must be removed. */
526 validate_change (insn, px, x, 1);
530 if (resolve_reg_p (x))
532 /* Return 1 to the caller to indicate that we found a direct
533 reference to a register which is being decomposed. This can
534 happen inside notes, multiword shift or zero-extend
542 /* This is called via for_each_rtx. Look for SUBREGs which can be
543 decomposed and decomposed REGs that need copying. */
546 adjust_decomposed_uses (rtx *px, void *data ATTRIBUTE_UNUSED)
553 if (resolve_subreg_p (x))
555 x = simplify_subreg_concatn (GET_MODE (x), SUBREG_REG (x),
564 if (resolve_reg_p (x))
570 /* Resolve any decomposed registers which appear in register notes on
574 resolve_reg_notes (rtx insn)
578 note = find_reg_equal_equiv_note (insn);
581 int old_count = num_validated_changes ();
582 if (for_each_rtx (&XEXP (note, 0), resolve_subreg_use, NULL))
583 remove_note (insn, note);
585 if (old_count != num_validated_changes ())
586 df_notes_rescan (insn);
589 pnote = ®_NOTES (insn);
590 while (*pnote != NULL_RTX)
595 switch (REG_NOTE_KIND (note))
599 if (resolve_reg_p (XEXP (note, 0)))
608 *pnote = XEXP (note, 1);
610 pnote = &XEXP (note, 1);
614 /* Return whether X can be decomposed into subwords. */
617 can_decompose_p (rtx x)
621 unsigned int regno = REGNO (x);
623 if (HARD_REGISTER_NUM_P (regno))
624 return (validate_subreg (word_mode, GET_MODE (x), x, UNITS_PER_WORD)
625 && HARD_REGNO_MODE_OK (regno, word_mode));
627 return !bitmap_bit_p (subreg_context, regno);
633 /* Decompose the registers used in a simple move SET within INSN. If
634 we don't change anything, return INSN, otherwise return the start
635 of the sequence of moves. */
638 resolve_simple_move (rtx set, rtx insn)
640 rtx src, dest, real_dest, insns;
641 enum machine_mode orig_mode, dest_mode;
646 dest = SET_DEST (set);
647 orig_mode = GET_MODE (dest);
649 words = (GET_MODE_SIZE (orig_mode) + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
655 /* We have to handle copying from a SUBREG of a decomposed reg where
656 the SUBREG is larger than word size. Rather than assume that we
657 can take a word_mode SUBREG of the destination, we copy to a new
658 register and then copy that to the destination. */
660 real_dest = NULL_RTX;
662 if (GET_CODE (src) == SUBREG
663 && resolve_reg_p (SUBREG_REG (src))
664 && (SUBREG_BYTE (src) != 0
665 || (GET_MODE_SIZE (orig_mode)
666 != GET_MODE_SIZE (GET_MODE (SUBREG_REG (src))))))
669 dest = gen_reg_rtx (orig_mode);
670 if (REG_P (real_dest))
671 REG_ATTRS (dest) = REG_ATTRS (real_dest);
674 /* Similarly if we are copying to a SUBREG of a decomposed reg where
675 the SUBREG is larger than word size. */
677 if (GET_CODE (dest) == SUBREG
678 && resolve_reg_p (SUBREG_REG (dest))
679 && (SUBREG_BYTE (dest) != 0
680 || (GET_MODE_SIZE (orig_mode)
681 != GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))))
683 rtx reg, minsn, smove;
685 reg = gen_reg_rtx (orig_mode);
686 minsn = emit_move_insn (reg, src);
687 smove = single_set (minsn);
688 gcc_assert (smove != NULL_RTX);
689 resolve_simple_move (smove, minsn);
693 /* If we didn't have any big SUBREGS of decomposed registers, and
694 neither side of the move is a register we are decomposing, then
695 we don't have to do anything here. */
697 if (src == SET_SRC (set)
698 && dest == SET_DEST (set)
699 && !resolve_reg_p (src)
700 && !resolve_subreg_p (src)
701 && !resolve_reg_p (dest)
702 && !resolve_subreg_p (dest))
708 /* It's possible for the code to use a subreg of a decomposed
709 register while forming an address. We need to handle that before
710 passing the address to emit_move_insn. We pass NULL_RTX as the
711 insn parameter to resolve_subreg_use because we can not validate
713 if (MEM_P (src) || MEM_P (dest))
718 for_each_rtx (&XEXP (src, 0), resolve_subreg_use, NULL_RTX);
720 for_each_rtx (&XEXP (dest, 0), resolve_subreg_use, NULL_RTX);
721 acg = apply_change_group ();
725 /* If SRC is a register which we can't decompose, or has side
726 effects, we need to move via a temporary register. */
728 if (!can_decompose_p (src)
729 || side_effects_p (src)
730 || GET_CODE (src) == ASM_OPERANDS)
734 reg = gen_reg_rtx (orig_mode);
735 emit_move_insn (reg, src);
739 /* If DEST is a register which we can't decompose, or has side
740 effects, we need to first move to a temporary register. We
741 handle the common case of pushing an operand directly. We also
742 go through a temporary register if it holds a floating point
743 value. This gives us better code on systems which can't move
744 data easily between integer and floating point registers. */
746 dest_mode = orig_mode;
747 pushing = push_operand (dest, dest_mode);
748 if (!can_decompose_p (dest)
749 || (side_effects_p (dest) && !pushing)
750 || (!SCALAR_INT_MODE_P (dest_mode)
751 && !resolve_reg_p (dest)
752 && !resolve_subreg_p (dest)))
754 if (real_dest == NULL_RTX)
756 if (!SCALAR_INT_MODE_P (dest_mode))
758 dest_mode = mode_for_size (GET_MODE_SIZE (dest_mode) * BITS_PER_UNIT,
760 gcc_assert (dest_mode != BLKmode);
762 dest = gen_reg_rtx (dest_mode);
763 if (REG_P (real_dest))
764 REG_ATTRS (dest) = REG_ATTRS (real_dest);
769 unsigned int i, j, jinc;
771 gcc_assert (GET_MODE_SIZE (orig_mode) % UNITS_PER_WORD == 0);
772 gcc_assert (GET_CODE (XEXP (dest, 0)) != PRE_MODIFY);
773 gcc_assert (GET_CODE (XEXP (dest, 0)) != POST_MODIFY);
775 if (WORDS_BIG_ENDIAN == STACK_GROWS_DOWNWARD)
786 for (i = 0; i < words; ++i, j += jinc)
790 temp = copy_rtx (XEXP (dest, 0));
791 temp = adjust_automodify_address_nv (dest, word_mode, temp,
793 emit_move_insn (temp,
794 simplify_gen_subreg_concatn (word_mode, src,
796 j * UNITS_PER_WORD));
803 if (REG_P (dest) && !HARD_REGISTER_NUM_P (REGNO (dest)))
806 for (i = 0; i < words; ++i)
807 emit_move_insn (simplify_gen_subreg_concatn (word_mode, dest,
810 simplify_gen_subreg_concatn (word_mode, src,
812 i * UNITS_PER_WORD));
815 if (real_dest != NULL_RTX)
817 rtx mdest, minsn, smove;
819 if (dest_mode == orig_mode)
822 mdest = simplify_gen_subreg (orig_mode, dest, GET_MODE (dest), 0);
823 minsn = emit_move_insn (real_dest, mdest);
825 smove = single_set (minsn);
826 gcc_assert (smove != NULL_RTX);
828 resolve_simple_move (smove, minsn);
831 insns = get_insns ();
834 copy_reg_eh_region_note_forward (insn, insns, NULL_RTX);
836 emit_insn_before (insns, insn);
843 /* Change a CLOBBER of a decomposed register into a CLOBBER of the
844 component registers. Return whether we changed something. */
847 resolve_clobber (rtx pat, rtx insn)
850 enum machine_mode orig_mode;
851 unsigned int words, i;
855 if (!resolve_reg_p (reg) && !resolve_subreg_p (reg))
858 orig_mode = GET_MODE (reg);
859 words = GET_MODE_SIZE (orig_mode);
860 words = (words + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
862 ret = validate_change (NULL_RTX, &XEXP (pat, 0),
863 simplify_gen_subreg_concatn (word_mode, reg,
866 df_insn_rescan (insn);
867 gcc_assert (ret != 0);
869 for (i = words - 1; i > 0; --i)
873 x = simplify_gen_subreg_concatn (word_mode, reg, orig_mode,
875 x = gen_rtx_CLOBBER (VOIDmode, x);
876 emit_insn_after (x, insn);
879 resolve_reg_notes (insn);
884 /* A USE of a decomposed register is no longer meaningful. Return
885 whether we changed something. */
888 resolve_use (rtx pat, rtx insn)
890 if (resolve_reg_p (XEXP (pat, 0)) || resolve_subreg_p (XEXP (pat, 0)))
896 resolve_reg_notes (insn);
901 /* A VAR_LOCATION can be simplified. */
904 resolve_debug (rtx insn)
906 for_each_rtx (&PATTERN (insn), adjust_decomposed_uses, NULL_RTX);
908 df_insn_rescan (insn);
910 resolve_reg_notes (insn);
913 /* Checks if INSN is a decomposable multiword-shift or zero-extend and
914 sets the decomposable_context bitmap accordingly. A non-zero value
915 is returned if a decomposable insn has been found. */
918 find_decomposable_shift_zext (rtx insn)
924 set = single_set (insn);
929 if (GET_CODE (op) != ASHIFT
930 && GET_CODE (op) != LSHIFTRT
931 && GET_CODE (op) != ZERO_EXTEND)
934 op_operand = XEXP (op, 0);
935 if (!REG_P (SET_DEST (set)) || !REG_P (op_operand)
936 || HARD_REGISTER_NUM_P (REGNO (SET_DEST (set)))
937 || HARD_REGISTER_NUM_P (REGNO (op_operand))
938 || !SCALAR_INT_MODE_P (GET_MODE (op)))
941 if (GET_CODE (op) == ZERO_EXTEND)
943 if (GET_MODE (op_operand) != word_mode
944 || GET_MODE_BITSIZE (GET_MODE (op)) != 2 * BITS_PER_WORD)
947 else /* left or right shift */
949 if (!CONST_INT_P (XEXP (op, 1))
950 || INTVAL (XEXP (op, 1)) < BITS_PER_WORD
951 || GET_MODE_BITSIZE (GET_MODE (op_operand)) != 2 * BITS_PER_WORD)
955 bitmap_set_bit (decomposable_context, REGNO (SET_DEST (set)));
957 if (GET_CODE (op) != ZERO_EXTEND)
958 bitmap_set_bit (decomposable_context, REGNO (op_operand));
963 /* Decompose a more than word wide shift (in INSN) of a multiword
964 pseudo or a multiword zero-extend of a wordmode pseudo into a move
965 and 'set to zero' insn. Return a pointer to the new insn when a
966 replacement was done. */
969 resolve_shift_zext (rtx insn)
975 rtx src_reg, dest_reg, dest_zero;
976 int src_reg_num, dest_reg_num, offset1, offset2, src_offset;
978 set = single_set (insn);
983 if (GET_CODE (op) != ASHIFT
984 && GET_CODE (op) != LSHIFTRT
985 && GET_CODE (op) != ZERO_EXTEND)
988 op_operand = XEXP (op, 0);
990 if (!resolve_reg_p (SET_DEST (set)) && !resolve_reg_p (op_operand))
993 /* src_reg_num is the number of the word mode register which we
994 are operating on. For a left shift and a zero_extend on little
995 endian machines this is register 0. */
996 src_reg_num = GET_CODE (op) == LSHIFTRT ? 1 : 0;
999 && GET_MODE_SIZE (GET_MODE (op_operand)) > UNITS_PER_WORD)
1000 src_reg_num = 1 - src_reg_num;
1002 if (GET_CODE (op) == ZERO_EXTEND)
1003 dest_reg_num = WORDS_BIG_ENDIAN ? 1 : 0;
1005 dest_reg_num = 1 - src_reg_num;
1007 offset1 = UNITS_PER_WORD * dest_reg_num;
1008 offset2 = UNITS_PER_WORD * (1 - dest_reg_num);
1009 src_offset = UNITS_PER_WORD * src_reg_num;
1013 dest_reg = simplify_gen_subreg_concatn (word_mode, SET_DEST (set),
1014 GET_MODE (SET_DEST (set)),
1016 dest_zero = simplify_gen_subreg_concatn (word_mode, SET_DEST (set),
1017 GET_MODE (SET_DEST (set)),
1019 src_reg = simplify_gen_subreg_concatn (word_mode, op_operand,
1020 GET_MODE (op_operand),
1022 if (GET_CODE (op) != ZERO_EXTEND)
1024 int shift_count = INTVAL (XEXP (op, 1));
1025 if (shift_count > BITS_PER_WORD)
1026 src_reg = expand_shift (GET_CODE (op) == ASHIFT ?
1027 LSHIFT_EXPR : RSHIFT_EXPR,
1029 build_int_cst (NULL_TREE,
1030 shift_count - BITS_PER_WORD),
1034 if (dest_reg != src_reg)
1035 emit_move_insn (dest_reg, src_reg);
1036 emit_move_insn (dest_zero, CONST0_RTX (word_mode));
1037 insns = get_insns ();
1041 emit_insn_before (insns, insn);
1046 fprintf (dump_file, "; Replacing insn: %d with insns: ", INSN_UID (insn));
1047 for (in = insns; in != insn; in = NEXT_INSN (in))
1048 fprintf (dump_file, "%d ", INSN_UID (in));
1049 fprintf (dump_file, "\n");
1056 /* Look for registers which are always accessed via word-sized SUBREGs
1057 or via copies. Decompose these registers into several word-sized
1058 pseudo-registers. */
1061 decompose_multiword_subregs (void)
1067 df_set_flags (DF_DEFER_INSN_RESCAN);
1069 max = max_reg_num ();
1071 /* First see if there are any multi-word pseudo-registers. If there
1072 aren't, there is nothing we can do. This should speed up this
1073 pass in the normal case, since it should be faster than scanning
1078 for (i = FIRST_PSEUDO_REGISTER; i < max; ++i)
1080 if (regno_reg_rtx[i] != NULL
1081 && GET_MODE_SIZE (GET_MODE (regno_reg_rtx[i])) > UNITS_PER_WORD)
1091 /* FIXME: When the dataflow branch is merged, we can change this
1092 code to look for each multi-word pseudo-register and to find each
1093 insn which sets or uses that register. That should be faster
1094 than scanning all the insns. */
1096 decomposable_context = BITMAP_ALLOC (NULL);
1097 non_decomposable_context = BITMAP_ALLOC (NULL);
1098 subreg_context = BITMAP_ALLOC (NULL);
1100 reg_copy_graph = VEC_alloc (bitmap, heap, max);
1101 VEC_safe_grow (bitmap, heap, reg_copy_graph, max);
1102 memset (VEC_address (bitmap, reg_copy_graph), 0, sizeof (bitmap) * max);
1108 FOR_BB_INSNS (bb, insn)
1111 enum classify_move_insn cmi;
1115 || GET_CODE (PATTERN (insn)) == CLOBBER
1116 || GET_CODE (PATTERN (insn)) == USE)
1119 if (find_decomposable_shift_zext (insn))
1122 recog_memoized (insn);
1123 extract_insn (insn);
1125 set = simple_move (insn);
1128 cmi = NOT_SIMPLE_MOVE;
1131 if (find_pseudo_copy (set))
1132 cmi = SIMPLE_PSEUDO_REG_MOVE;
1137 n = recog_data.n_operands;
1138 for (i = 0; i < n; ++i)
1140 for_each_rtx (&recog_data.operand[i],
1141 find_decomposable_subregs,
1144 /* We handle ASM_OPERANDS as a special case to support
1145 things like x86 rdtsc which returns a DImode value.
1146 We can decompose the output, which will certainly be
1147 operand 0, but not the inputs. */
1149 if (cmi == SIMPLE_MOVE
1150 && GET_CODE (SET_SRC (set)) == ASM_OPERANDS)
1152 gcc_assert (i == 0);
1153 cmi = NOT_SIMPLE_MOVE;
1159 bitmap_and_compl_into (decomposable_context, non_decomposable_context);
1160 if (!bitmap_empty_p (decomposable_context))
1164 sbitmap_iterator sbi;
1165 bitmap_iterator iter;
1168 propagate_pseudo_copies ();
1170 sub_blocks = sbitmap_alloc (last_basic_block);
1171 sbitmap_zero (sub_blocks);
1173 EXECUTE_IF_SET_IN_BITMAP (decomposable_context, 0, regno, iter)
1174 decompose_register (regno);
1180 FOR_BB_INSNS (bb, insn)
1187 pat = PATTERN (insn);
1188 if (GET_CODE (pat) == CLOBBER)
1189 resolve_clobber (pat, insn);
1190 else if (GET_CODE (pat) == USE)
1191 resolve_use (pat, insn);
1192 else if (DEBUG_INSN_P (insn))
1193 resolve_debug (insn);
1199 recog_memoized (insn);
1200 extract_insn (insn);
1202 set = simple_move (insn);
1205 rtx orig_insn = insn;
1206 bool cfi = control_flow_insn_p (insn);
1208 /* We can end up splitting loads to multi-word pseudos
1209 into separate loads to machine word size pseudos.
1210 When this happens, we first had one load that can
1211 throw, and after resolve_simple_move we'll have a
1212 bunch of loads (at least two). All those loads may
1213 trap if we can have non-call exceptions, so they
1214 all will end the current basic block. We split the
1215 block after the outer loop over all insns, but we
1216 make sure here that we will be able to split the
1217 basic block and still produce the correct control
1218 flow graph for it. */
1220 || (cfun->can_throw_non_call_exceptions
1221 && can_throw_internal (insn)));
1223 insn = resolve_simple_move (set, insn);
1224 if (insn != orig_insn)
1226 recog_memoized (insn);
1227 extract_insn (insn);
1230 SET_BIT (sub_blocks, bb->index);
1235 rtx decomposed_shift;
1237 decomposed_shift = resolve_shift_zext (insn);
1238 if (decomposed_shift != NULL_RTX)
1240 insn = decomposed_shift;
1241 recog_memoized (insn);
1242 extract_insn (insn);
1246 for (i = recog_data.n_operands - 1; i >= 0; --i)
1247 for_each_rtx (recog_data.operand_loc[i],
1251 resolve_reg_notes (insn);
1253 if (num_validated_changes () > 0)
1255 for (i = recog_data.n_dups - 1; i >= 0; --i)
1257 rtx *pl = recog_data.dup_loc[i];
1258 int dup_num = recog_data.dup_num[i];
1259 rtx *px = recog_data.operand_loc[dup_num];
1261 validate_unshare_change (insn, pl, *px, 1);
1264 i = apply_change_group ();
1271 /* If we had insns to split that caused control flow insns in the middle
1272 of a basic block, split those blocks now. Note that we only handle
1273 the case where splitting a load has caused multiple possibly trapping
1275 EXECUTE_IF_SET_IN_SBITMAP (sub_blocks, 0, i, sbi)
1280 bb = BASIC_BLOCK (i);
1281 insn = BB_HEAD (bb);
1286 if (control_flow_insn_p (insn))
1288 /* Split the block after insn. There will be a fallthru
1289 edge, which is OK so we keep it. We have to create the
1290 exception edges ourselves. */
1291 fallthru = split_block (bb, insn);
1292 rtl_make_eh_edge (NULL, bb, BB_END (bb));
1293 bb = fallthru->dest;
1294 insn = BB_HEAD (bb);
1297 insn = NEXT_INSN (insn);
1301 sbitmap_free (sub_blocks);
1308 FOR_EACH_VEC_ELT (bitmap, reg_copy_graph, i, b)
1313 VEC_free (bitmap, heap, reg_copy_graph);
1315 BITMAP_FREE (decomposable_context);
1316 BITMAP_FREE (non_decomposable_context);
1317 BITMAP_FREE (subreg_context);
1320 /* Gate function for lower subreg pass. */
1323 gate_handle_lower_subreg (void)
1325 return flag_split_wide_types != 0;
1328 /* Implement first lower subreg pass. */
1331 rest_of_handle_lower_subreg (void)
1333 decompose_multiword_subregs ();
1337 /* Implement second lower subreg pass. */
1340 rest_of_handle_lower_subreg2 (void)
1342 decompose_multiword_subregs ();
1346 struct rtl_opt_pass pass_lower_subreg =
1350 "subreg1", /* name */
1351 gate_handle_lower_subreg, /* gate */
1352 rest_of_handle_lower_subreg, /* execute */
1355 0, /* static_pass_number */
1356 TV_LOWER_SUBREG, /* tv_id */
1357 0, /* properties_required */
1358 0, /* properties_provided */
1359 0, /* properties_destroyed */
1360 0, /* todo_flags_start */
1363 TODO_verify_flow /* todo_flags_finish */
1367 struct rtl_opt_pass pass_lower_subreg2 =
1371 "subreg2", /* name */
1372 gate_handle_lower_subreg, /* gate */
1373 rest_of_handle_lower_subreg2, /* execute */
1376 0, /* static_pass_number */
1377 TV_LOWER_SUBREG, /* tv_id */
1378 0, /* properties_required */
1379 0, /* properties_provided */
1380 0, /* properties_destroyed */
1381 0, /* todo_flags_start */
1382 TODO_df_finish | TODO_verify_rtl_sharing |
1385 TODO_verify_flow /* todo_flags_finish */