1 /* Perform various loop optimizations, including strength reduction.
2 Copyright (C) 1987, 1988, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
23 /* This is the loop optimization pass of the compiler.
24 It finds invariant computations within loops and moves them
25 to the beginning of the loop. Then it identifies basic and
26 general induction variables. Strength reduction is applied to the general
27 induction variables, and induction variable elimination is applied to
28 the basic induction variables.
30 It also finds cases where
31 a register is set within the loop by zero-extending a narrower value
32 and changes these to zero the entire register once before the loop
33 and merely copy the low part within the loop.
35 Most of the complexity is in heuristics to decide when it is worth
36 while to do these things. */
45 #include "basic-block.h"
46 #include "insn-config.h"
47 #include "insn-flags.h"
49 #include "hard-reg-set.h"
58 /* Vector mapping INSN_UIDs to luids.
59 The luids are like uids but increase monotonically always.
60 We use them to see whether a jump comes from outside a given loop. */
64 /* Indexed by INSN_UID, contains the ordinal giving the (innermost) loop
65 number the insn is contained in. */
67 struct loop **uid_loop;
69 /* 1 + largest uid of any insn. */
73 /* 1 + luid of last insn. */
77 /* Number of loops detected in current function. Used as index to the
80 static int max_loop_num;
82 /* Indexed by register number, contains the number of times the reg
83 is set during the loop being scanned.
84 During code motion, a negative value indicates a reg that has been
85 made a candidate; in particular -2 means that it is an candidate that
86 we know is equal to a constant and -1 means that it is an candidate
87 not known equal to a constant.
88 After code motion, regs moved have 0 (which is accurate now)
89 while the failed candidates have the original number of times set.
91 Therefore, at all times, == 0 indicates an invariant register;
92 < 0 a conditionally invariant one. */
94 static varray_type set_in_loop;
96 /* Original value of set_in_loop; same except that this value
97 is not set negative for a reg whose sets have been made candidates
98 and not set to 0 for a reg that is moved. */
100 static varray_type n_times_set;
102 /* Index by register number, 1 indicates that the register
103 cannot be moved or strength reduced. */
105 static varray_type may_not_optimize;
107 /* Contains the insn in which a register was used if it was used
108 exactly once; contains const0_rtx if it was used more than once. */
110 static varray_type reg_single_usage;
112 /* Nonzero means reg N has already been moved out of one loop.
113 This reduces the desire to move it out of another. */
115 static char *moved_once;
117 /* List of MEMs that are stored in this loop. */
119 static rtx loop_store_mems;
121 /* The insn where the first of these was found. */
122 static rtx first_loop_store_insn;
124 typedef struct loop_mem_info {
125 rtx mem; /* The MEM itself. */
126 rtx reg; /* Corresponding pseudo, if any. */
127 int optimize; /* Nonzero if we can optimize access to this MEM. */
130 /* Array of MEMs that are used (read or written) in this loop, but
131 cannot be aliased by anything in this loop, except perhaps
132 themselves. In other words, if loop_mems[i] is altered during the
133 loop, it is altered by an expression that is rtx_equal_p to it. */
135 static loop_mem_info *loop_mems;
137 /* The index of the next available slot in LOOP_MEMS. */
139 static int loop_mems_idx;
141 /* The number of elements allocated in LOOP_MEMs. */
143 static int loop_mems_allocated;
145 /* Nonzero if we don't know what MEMs were changed in the current
146 loop. This happens if the loop contains a call (in which case
147 `loop_info->has_call' will also be set) or if we store into more
148 than NUM_STORES MEMs. */
150 static int unknown_address_altered;
152 /* The above doesn't count any readonly memory locations that are stored.
155 static int unknown_constant_address_altered;
157 /* Count of movable (i.e. invariant) instructions discovered in the loop. */
158 static int num_movables;
160 /* Count of memory write instructions discovered in the loop. */
161 static int num_mem_sets;
163 /* Bound on pseudo register number before loop optimization.
164 A pseudo has valid regscan info if its number is < max_reg_before_loop. */
165 unsigned int max_reg_before_loop;
167 /* The value to pass to the next call of reg_scan_update. */
168 static int loop_max_reg;
170 /* This obstack is used in product_cheap_p to allocate its rtl. It
171 may call gen_reg_rtx which, in turn, may reallocate regno_reg_rtx.
172 If we used the same obstack that it did, we would be deallocating
175 static struct obstack temp_obstack;
177 /* This is where the pointer to the obstack being used for RTL is stored. */
179 extern struct obstack *rtl_obstack;
181 #define obstack_chunk_alloc xmalloc
182 #define obstack_chunk_free free
184 /* During the analysis of a loop, a chain of `struct movable's
185 is made to record all the movable insns found.
186 Then the entire chain can be scanned to decide which to move. */
190 rtx insn; /* A movable insn */
191 rtx set_src; /* The expression this reg is set from. */
192 rtx set_dest; /* The destination of this SET. */
193 rtx dependencies; /* When INSN is libcall, this is an EXPR_LIST
194 of any registers used within the LIBCALL. */
195 int consec; /* Number of consecutive following insns
196 that must be moved with this one. */
197 unsigned int regno; /* The register it sets */
198 short lifetime; /* lifetime of that register;
199 may be adjusted when matching movables
200 that load the same value are found. */
201 short savings; /* Number of insns we can move for this reg,
202 including other movables that force this
203 or match this one. */
204 unsigned int cond : 1; /* 1 if only conditionally movable */
205 unsigned int force : 1; /* 1 means MUST move this insn */
206 unsigned int global : 1; /* 1 means reg is live outside this loop */
207 /* If PARTIAL is 1, GLOBAL means something different:
208 that the reg is live outside the range from where it is set
209 to the following label. */
210 unsigned int done : 1; /* 1 inhibits further processing of this */
212 unsigned int partial : 1; /* 1 means this reg is used for zero-extending.
213 In particular, moving it does not make it
215 unsigned int move_insn : 1; /* 1 means that we call emit_move_insn to
216 load SRC, rather than copying INSN. */
217 unsigned int move_insn_first:1;/* Same as above, if this is necessary for the
218 first insn of a consecutive sets group. */
219 unsigned int is_equiv : 1; /* 1 means a REG_EQUIV is present on INSN. */
220 enum machine_mode savemode; /* Nonzero means it is a mode for a low part
221 that we should avoid changing when clearing
222 the rest of the reg. */
223 struct movable *match; /* First entry for same value */
224 struct movable *forces; /* An insn that must be moved if this is */
225 struct movable *next;
228 static struct movable *the_movables;
230 FILE *loop_dump_stream;
232 /* Forward declarations. */
234 static void verify_dominator PARAMS ((struct loop *));
235 static void find_and_verify_loops PARAMS ((rtx, struct loops *));
236 static void mark_loop_jump PARAMS ((rtx, struct loop *));
237 static void prescan_loop PARAMS ((struct loop *));
238 static int reg_in_basic_block_p PARAMS ((rtx, rtx));
239 static int consec_sets_invariant_p PARAMS ((const struct loop *,
241 static int labels_in_range_p PARAMS ((rtx, int));
242 static void count_one_set PARAMS ((rtx, rtx, varray_type, rtx *));
244 static void count_loop_regs_set PARAMS ((rtx, rtx, varray_type, varray_type,
246 static void note_addr_stored PARAMS ((rtx, rtx, void *));
247 static void note_set_pseudo_multiple_uses PARAMS ((rtx, rtx, void *));
248 static int loop_reg_used_before_p PARAMS ((const struct loop *, rtx, rtx));
249 static void scan_loop PARAMS ((struct loop*, int, int));
251 static void replace_call_address PARAMS ((rtx, rtx, rtx));
253 static rtx skip_consec_insns PARAMS ((rtx, int));
254 static int libcall_benefit PARAMS ((rtx));
255 static void ignore_some_movables PARAMS ((struct movable *));
256 static void force_movables PARAMS ((struct movable *));
257 static void combine_movables PARAMS ((struct movable *, int));
258 static int regs_match_p PARAMS ((rtx, rtx, struct movable *));
259 static int rtx_equal_for_loop_p PARAMS ((rtx, rtx, struct movable *));
260 static void add_label_notes PARAMS ((rtx, rtx));
261 static void move_movables PARAMS ((struct loop *loop, struct movable *,
263 static int count_nonfixed_reads PARAMS ((const struct loop *, rtx));
264 static void strength_reduce PARAMS ((struct loop *, int, int, int));
265 static void find_single_use_in_loop PARAMS ((rtx, rtx, varray_type));
266 static int valid_initial_value_p PARAMS ((rtx, rtx, int, rtx));
267 static void find_mem_givs PARAMS ((const struct loop *, rtx, rtx, int, int));
268 static void record_biv PARAMS ((struct induction *, rtx, rtx, rtx, rtx, rtx *,
270 static void check_final_value PARAMS ((const struct loop *,
271 struct induction *));
272 static void record_giv PARAMS ((const struct loop *, struct induction *,
273 rtx, rtx, rtx, rtx, rtx, int, enum g_types,
275 static void update_giv_derive PARAMS ((const struct loop *, rtx));
276 static int basic_induction_var PARAMS ((const struct loop *, rtx,
277 enum machine_mode, rtx, rtx,
278 rtx *, rtx *, rtx **, int *));
279 static rtx simplify_giv_expr PARAMS ((const struct loop *, rtx, int *));
280 static int general_induction_var PARAMS ((const struct loop *loop, rtx, rtx *,
281 rtx *, rtx *, int, int *));
282 static int consec_sets_giv PARAMS ((const struct loop *, int, rtx,
283 rtx, rtx, rtx *, rtx *, rtx *));
284 static int check_dbra_loop PARAMS ((struct loop *, int));
285 static rtx express_from_1 PARAMS ((rtx, rtx, rtx));
286 static rtx combine_givs_p PARAMS ((struct induction *, struct induction *));
287 static void combine_givs PARAMS ((struct iv_class *));
288 struct recombine_givs_stats;
289 static int find_life_end PARAMS ((rtx, struct recombine_givs_stats *,
291 static void recombine_givs PARAMS ((const struct loop *, struct iv_class *,
293 static int product_cheap_p PARAMS ((rtx, rtx));
294 static int maybe_eliminate_biv PARAMS ((const struct loop *, struct iv_class *,
296 static int maybe_eliminate_biv_1 PARAMS ((const struct loop *, rtx, rtx,
297 struct iv_class *, int, rtx));
298 static int last_use_this_basic_block PARAMS ((rtx, rtx));
299 static void record_initial PARAMS ((rtx, rtx, void *));
300 static void update_reg_last_use PARAMS ((rtx, rtx));
301 static rtx next_insn_in_loop PARAMS ((const struct loop *, rtx));
302 static void load_mems_and_recount_loop_regs_set PARAMS ((const struct loop*,
304 static void load_mems PARAMS ((const struct loop *));
305 static int insert_loop_mem PARAMS ((rtx *, void *));
306 static int replace_loop_mem PARAMS ((rtx *, void *));
307 static int replace_loop_reg PARAMS ((rtx *, void *));
308 static void note_reg_stored PARAMS ((rtx, rtx, void *));
309 static void try_copy_prop PARAMS ((const struct loop *, rtx, unsigned int));
310 static int replace_label PARAMS ((rtx *, void *));
311 static void check_insn_for_givs PARAMS((struct loop *, rtx, int, int));
312 static void check_insn_for_bivs PARAMS((struct loop *, rtx, int, int));
314 typedef struct rtx_and_int {
319 typedef struct rtx_pair {
324 /* Nonzero iff INSN is between START and END, inclusive. */
325 #define INSN_IN_RANGE_P(INSN, START, END) \
326 (INSN_UID (INSN) < max_uid_for_loop \
327 && INSN_LUID (INSN) >= INSN_LUID (START) \
328 && INSN_LUID (INSN) <= INSN_LUID (END))
330 #ifdef HAVE_decrement_and_branch_on_count
331 /* Test whether BCT applicable and safe. */
332 static void insert_bct PARAMS ((struct loop *));
334 /* Auxiliary function that inserts the BCT pattern into the loop. */
335 static void instrument_loop_bct PARAMS ((rtx, rtx, rtx));
336 #endif /* HAVE_decrement_and_branch_on_count */
338 /* Indirect_jump_in_function is computed once per function. */
339 int indirect_jump_in_function = 0;
340 static int indirect_jump_in_function_p PARAMS ((rtx));
342 static int compute_luids PARAMS ((rtx, rtx, int));
344 static int biv_elimination_giv_has_0_offset PARAMS ((struct induction *,
345 struct induction *, rtx));
347 /* Relative gain of eliminating various kinds of operations. */
350 static int shift_cost;
351 static int mult_cost;
354 /* Benefit penalty, if a giv is not replaceable, i.e. must emit an insn to
355 copy the value of the strength reduced giv to its original register. */
356 static int copy_cost;
358 /* Cost of using a register, to normalize the benefits of a giv. */
359 static int reg_address_cost;
365 char *free_point = (char *) oballoc (1);
366 rtx reg = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 1);
368 add_cost = rtx_cost (gen_rtx_PLUS (word_mode, reg, reg), SET);
371 reg_address_cost = ADDRESS_COST (reg);
373 reg_address_cost = rtx_cost (reg, MEM);
376 /* We multiply by 2 to reconcile the difference in scale between
377 these two ways of computing costs. Otherwise the cost of a copy
378 will be far less than the cost of an add. */
382 /* Free the objects we just allocated. */
385 /* Initialize the obstack used for rtl in product_cheap_p. */
386 gcc_obstack_init (&temp_obstack);
389 /* Compute the mapping from uids to luids.
390 LUIDs are numbers assigned to insns, like uids,
391 except that luids increase monotonically through the code.
392 Start at insn START and stop just before END. Assign LUIDs
393 starting with PREV_LUID + 1. Return the last assigned LUID + 1. */
395 compute_luids (start, end, prev_luid)
402 for (insn = start, i = prev_luid; insn != end; insn = NEXT_INSN (insn))
404 if (INSN_UID (insn) >= max_uid_for_loop)
406 /* Don't assign luids to line-number NOTEs, so that the distance in
407 luids between two insns is not affected by -g. */
408 if (GET_CODE (insn) != NOTE
409 || NOTE_LINE_NUMBER (insn) <= 0)
410 uid_luid[INSN_UID (insn)] = ++i;
412 /* Give a line number note the same luid as preceding insn. */
413 uid_luid[INSN_UID (insn)] = i;
418 /* Entry point of this file. Perform loop optimization
419 on the current function. F is the first insn of the function
420 and DUMPFILE is a stream for output of a trace of actions taken
421 (or 0 if none should be output). */
424 loop_optimize (f, dumpfile, unroll_p, bct_p)
425 /* f is the first instruction of a chain of insns for one function */
432 struct loops loops_data;
433 struct loops *loops = &loops_data;
434 struct loop_info *loops_info;
436 loop_dump_stream = dumpfile;
438 init_recog_no_volatile ();
440 max_reg_before_loop = max_reg_num ();
441 loop_max_reg = max_reg_before_loop;
445 /* Count the number of loops. */
448 for (insn = f; insn; insn = NEXT_INSN (insn))
450 if (GET_CODE (insn) == NOTE
451 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
455 /* Don't waste time if no loops. */
456 if (max_loop_num == 0)
459 loops->num = max_loop_num;
461 moved_once = (char *) xcalloc (max_reg_before_loop, sizeof (char));
463 /* Get size to use for tables indexed by uids.
464 Leave some space for labels allocated by find_and_verify_loops. */
465 max_uid_for_loop = get_max_uid () + 1 + max_loop_num * 32;
467 uid_luid = (int *) xcalloc (max_uid_for_loop, sizeof (int));
468 uid_loop = (struct loop **) xcalloc (max_uid_for_loop,
469 sizeof (struct loop *));
471 /* Allocate storage for array of loops. */
472 loops->array = (struct loop *)
473 xcalloc (loops->num, sizeof (struct loop));
475 /* Find and process each loop.
476 First, find them, and record them in order of their beginnings. */
477 find_and_verify_loops (f, loops);
479 /* Allocate and initialize auxiliary loop information. */
480 loops_info = xcalloc (loops->num, sizeof (struct loop_info));
481 for (i = 0; i < loops->num; i++)
482 loops->array[i].aux = loops_info + i;
484 /* Now find all register lifetimes. This must be done after
485 find_and_verify_loops, because it might reorder the insns in the
487 reg_scan (f, max_reg_before_loop, 1);
489 /* This must occur after reg_scan so that registers created by gcse
490 will have entries in the register tables.
492 We could have added a call to reg_scan after gcse_main in toplev.c,
493 but moving this call to init_alias_analysis is more efficient. */
494 init_alias_analysis ();
496 /* See if we went too far. Note that get_max_uid already returns
497 one more that the maximum uid of all insn. */
498 if (get_max_uid () > max_uid_for_loop)
500 /* Now reset it to the actual size we need. See above. */
501 max_uid_for_loop = get_max_uid ();
503 /* find_and_verify_loops has already called compute_luids, but it
504 might have rearranged code afterwards, so we need to recompute
506 max_luid = compute_luids (f, NULL_RTX, 0);
508 /* Don't leave gaps in uid_luid for insns that have been
509 deleted. It is possible that the first or last insn
510 using some register has been deleted by cross-jumping.
511 Make sure that uid_luid for that former insn's uid
512 points to the general area where that insn used to be. */
513 for (i = 0; i < max_uid_for_loop; i++)
515 uid_luid[0] = uid_luid[i];
516 if (uid_luid[0] != 0)
519 for (i = 0; i < max_uid_for_loop; i++)
520 if (uid_luid[i] == 0)
521 uid_luid[i] = uid_luid[i - 1];
523 /* Determine if the function has indirect jump. On some systems
524 this prevents low overhead loop instructions from being used. */
525 indirect_jump_in_function = indirect_jump_in_function_p (f);
527 /* Now scan the loops, last ones first, since this means inner ones are done
528 before outer ones. */
529 for (i = max_loop_num - 1; i >= 0; i--)
531 struct loop *loop = &loops->array[i];
533 if (! loop->invalid && loop->end)
534 scan_loop (loop, unroll_p, bct_p);
537 /* If there were lexical blocks inside the loop, they have been
538 replicated. We will now have more than one NOTE_INSN_BLOCK_BEG
539 and NOTE_INSN_BLOCK_END for each such block. We must duplicate
540 the BLOCKs as well. */
541 if (write_symbols != NO_DEBUG)
544 end_alias_analysis ();
554 /* Returns the next insn, in execution order, after INSN. START and
555 END are the NOTE_INSN_LOOP_BEG and NOTE_INSN_LOOP_END for the loop,
556 respectively. LOOP->TOP, if non-NULL, is the top of the loop in the
557 insn-stream; it is used with loops that are entered near the
561 next_insn_in_loop (loop, insn)
562 const struct loop *loop;
565 insn = NEXT_INSN (insn);
567 if (insn == loop->end)
570 /* Go to the top of the loop, and continue there. */
577 if (insn == loop->scan_start)
584 /* Optimize one loop described by LOOP. */
586 /* ??? Could also move memory writes out of loops if the destination address
587 is invariant, the source is invariant, the memory write is not volatile,
588 and if we can prove that no read inside the loop can read this address
589 before the write occurs. If there is a read of this address after the
590 write, then we can also mark the memory read as invariant. */
593 scan_loop (loop, unroll_p, bct_p)
598 rtx loop_start = loop->start;
599 rtx loop_end = loop->end;
600 /* Additional information about the current loop being processed
601 that is used to compute the number of loop iterations for loop
602 unrolling and doloop optimization. */
603 struct loop_info *loop_info = LOOP_INFO (loop);
605 /* 1 if we are scanning insns that could be executed zero times. */
607 /* 1 if we are scanning insns that might never be executed
608 due to a subroutine call which might exit before they are reached. */
610 /* Jump insn that enters the loop, or 0 if control drops in. */
611 rtx loop_entry_jump = 0;
612 /* Number of insns in the loop. */
616 rtx temp, update_start, update_end;
617 /* The SET from an insn, if it is the only SET in the insn. */
619 /* Chain describing insns movable in current loop. */
620 struct movable *movables = 0;
621 /* Last element in `movables' -- so we can add elements at the end. */
622 struct movable *last_movable = 0;
623 /* Ratio of extra register life span we can justify
624 for saving an instruction. More if loop doesn't call subroutines
625 since in that case saving an insn makes more difference
626 and more registers are available. */
628 /* Nonzero if we are scanning instructions in a sub-loop. */
634 /* Determine whether this loop starts with a jump down to a test at
635 the end. This will occur for a small number of loops with a test
636 that is too complex to duplicate in front of the loop.
638 We search for the first insn or label in the loop, skipping NOTEs.
639 However, we must be careful not to skip past a NOTE_INSN_LOOP_BEG
640 (because we might have a loop executed only once that contains a
641 loop which starts with a jump to its exit test) or a NOTE_INSN_LOOP_END
642 (in case we have a degenerate loop).
644 Note that if we mistakenly think that a loop is entered at the top
645 when, in fact, it is entered at the exit test, the only effect will be
646 slightly poorer optimization. Making the opposite error can generate
647 incorrect code. Since very few loops now start with a jump to the
648 exit test, the code here to detect that case is very conservative. */
650 for (p = NEXT_INSN (loop_start);
652 && GET_CODE (p) != CODE_LABEL && GET_RTX_CLASS (GET_CODE (p)) != 'i'
653 && (GET_CODE (p) != NOTE
654 || (NOTE_LINE_NUMBER (p) != NOTE_INSN_LOOP_BEG
655 && NOTE_LINE_NUMBER (p) != NOTE_INSN_LOOP_END));
659 loop->scan_start = p;
661 /* Set up variables describing this loop. */
663 threshold = (loop_info->has_call ? 1 : 2) * (1 + n_non_fixed_regs);
665 /* If loop has a jump before the first label,
666 the true entry is the target of that jump.
667 Start scan from there.
668 But record in LOOP->TOP the place where the end-test jumps
669 back to so we can scan that after the end of the loop. */
670 if (GET_CODE (p) == JUMP_INSN)
674 /* Loop entry must be unconditional jump (and not a RETURN) */
676 && JUMP_LABEL (p) != 0
677 /* Check to see whether the jump actually
678 jumps out of the loop (meaning it's no loop).
679 This case can happen for things like
680 do {..} while (0). If this label was generated previously
681 by loop, we can't tell anything about it and have to reject
683 && INSN_IN_RANGE_P (JUMP_LABEL (p), loop_start, loop_end))
685 loop->top = next_label (loop->scan_start);
686 loop->scan_start = JUMP_LABEL (p);
690 /* If LOOP->SCAN_START was an insn created by loop, we don't know its luid
691 as required by loop_reg_used_before_p. So skip such loops. (This
692 test may never be true, but it's best to play it safe.)
694 Also, skip loops where we do not start scanning at a label. This
695 test also rejects loops starting with a JUMP_INSN that failed the
698 if (INSN_UID (loop->scan_start) >= max_uid_for_loop
699 || GET_CODE (loop->scan_start) != CODE_LABEL)
701 if (loop_dump_stream)
702 fprintf (loop_dump_stream, "\nLoop from %d to %d is phony.\n\n",
703 INSN_UID (loop_start), INSN_UID (loop_end));
707 /* Count number of times each reg is set during this loop.
708 Set VARRAY_CHAR (may_not_optimize, I) if it is not safe to move out
709 the setting of register I. Set VARRAY_RTX (reg_single_usage, I). */
711 /* Allocate extra space for REGS that might be created by
712 load_mems. We allocate a little extra slop as well, in the hopes
713 that even after the moving of movables creates some new registers
714 we won't have to reallocate these arrays. However, we do grow
715 the arrays, if necessary, in load_mems_recount_loop_regs_set. */
716 nregs = max_reg_num () + loop_mems_idx + 16;
717 VARRAY_INT_INIT (set_in_loop, nregs, "set_in_loop");
718 VARRAY_INT_INIT (n_times_set, nregs, "n_times_set");
719 VARRAY_CHAR_INIT (may_not_optimize, nregs, "may_not_optimize");
720 VARRAY_RTX_INIT (reg_single_usage, nregs, "reg_single_usage");
722 count_loop_regs_set (loop->top ? loop->top : loop->start, loop->end,
723 may_not_optimize, reg_single_usage, &insn_count, nregs);
725 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
727 VARRAY_CHAR (may_not_optimize, i) = 1;
728 VARRAY_INT (set_in_loop, i) = 1;
731 #ifdef AVOID_CCMODE_COPIES
732 /* Don't try to move insns which set CC registers if we should not
733 create CCmode register copies. */
734 for (i = max_reg_num () - 1; i >= FIRST_PSEUDO_REGISTER; i--)
735 if (GET_MODE_CLASS (GET_MODE (regno_reg_rtx[i])) == MODE_CC)
736 VARRAY_CHAR (may_not_optimize, i) = 1;
739 bcopy ((char *) &set_in_loop->data,
740 (char *) &n_times_set->data, nregs * sizeof (int));
742 if (loop_dump_stream)
744 fprintf (loop_dump_stream, "\nLoop from %d to %d: %d real insns.\n",
745 INSN_UID (loop_start), INSN_UID (loop_end), insn_count);
747 fprintf (loop_dump_stream, "Continue at insn %d.\n",
748 INSN_UID (loop->cont));
751 /* Scan through the loop finding insns that are safe to move.
752 Set set_in_loop negative for the reg being set, so that
753 this reg will be considered invariant for subsequent insns.
754 We consider whether subsequent insns use the reg
755 in deciding whether it is worth actually moving.
757 MAYBE_NEVER is nonzero if we have passed a conditional jump insn
758 and therefore it is possible that the insns we are scanning
759 would never be executed. At such times, we must make sure
760 that it is safe to execute the insn once instead of zero times.
761 When MAYBE_NEVER is 0, all insns will be executed at least once
762 so that is not a problem. */
764 for (p = next_insn_in_loop (loop, loop->scan_start);
766 p = next_insn_in_loop (loop, p))
768 if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
769 && find_reg_note (p, REG_LIBCALL, NULL_RTX))
771 else if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
772 && find_reg_note (p, REG_RETVAL, NULL_RTX))
775 if (GET_CODE (p) == INSN
776 && (set = single_set (p))
777 && GET_CODE (SET_DEST (set)) == REG
778 && ! VARRAY_CHAR (may_not_optimize, REGNO (SET_DEST (set))))
783 rtx src = SET_SRC (set);
784 rtx dependencies = 0;
786 /* Figure out what to use as a source of this insn. If a REG_EQUIV
787 note is given or if a REG_EQUAL note with a constant operand is
788 specified, use it as the source and mark that we should move
789 this insn by calling emit_move_insn rather that duplicating the
792 Otherwise, only use the REG_EQUAL contents if a REG_RETVAL note
794 temp = find_reg_note (p, REG_EQUIV, NULL_RTX);
796 src = XEXP (temp, 0), move_insn = 1;
799 temp = find_reg_note (p, REG_EQUAL, NULL_RTX);
800 if (temp && CONSTANT_P (XEXP (temp, 0)))
801 src = XEXP (temp, 0), move_insn = 1;
802 if (temp && find_reg_note (p, REG_RETVAL, NULL_RTX))
804 src = XEXP (temp, 0);
805 /* A libcall block can use regs that don't appear in
806 the equivalent expression. To move the libcall,
807 we must move those regs too. */
808 dependencies = libcall_other_reg (p, src);
812 /* Don't try to optimize a register that was made
813 by loop-optimization for an inner loop.
814 We don't know its life-span, so we can't compute the benefit. */
815 if (REGNO (SET_DEST (set)) >= max_reg_before_loop)
817 else if (/* The register is used in basic blocks other
818 than the one where it is set (meaning that
819 something after this point in the loop might
820 depend on its value before the set). */
821 ! reg_in_basic_block_p (p, SET_DEST (set))
822 /* And the set is not guaranteed to be executed one
823 the loop starts, or the value before the set is
824 needed before the set occurs...
826 ??? Note we have quadratic behaviour here, mitigated
827 by the fact that the previous test will often fail for
828 large loops. Rather than re-scanning the entire loop
829 each time for register usage, we should build tables
830 of the register usage and use them here instead. */
832 || loop_reg_used_before_p (loop, set, p)))
833 /* It is unsafe to move the set.
835 This code used to consider it OK to move a set of a variable
836 which was not created by the user and not used in an exit test.
837 That behavior is incorrect and was removed. */
839 else if ((tem = loop_invariant_p (loop, src))
840 && (dependencies == 0
841 || (tem2 = loop_invariant_p (loop, dependencies)) != 0)
842 && (VARRAY_INT (set_in_loop,
843 REGNO (SET_DEST (set))) == 1
845 = consec_sets_invariant_p
846 (loop, SET_DEST (set),
847 VARRAY_INT (set_in_loop, REGNO (SET_DEST (set))),
849 /* If the insn can cause a trap (such as divide by zero),
850 can't move it unless it's guaranteed to be executed
851 once loop is entered. Even a function call might
852 prevent the trap insn from being reached
853 (since it might exit!) */
854 && ! ((maybe_never || call_passed)
855 && may_trap_p (src)))
857 register struct movable *m;
858 register int regno = REGNO (SET_DEST (set));
860 /* A potential lossage is where we have a case where two insns
861 can be combined as long as they are both in the loop, but
862 we move one of them outside the loop. For large loops,
863 this can lose. The most common case of this is the address
864 of a function being called.
866 Therefore, if this register is marked as being used exactly
867 once if we are in a loop with calls (a "large loop"), see if
868 we can replace the usage of this register with the source
869 of this SET. If we can, delete this insn.
871 Don't do this if P has a REG_RETVAL note or if we have
872 SMALL_REGISTER_CLASSES and SET_SRC is a hard register. */
874 if (loop_info->has_call
875 && VARRAY_RTX (reg_single_usage, regno) != 0
876 && VARRAY_RTX (reg_single_usage, regno) != const0_rtx
877 && REGNO_FIRST_UID (regno) == INSN_UID (p)
878 && (REGNO_LAST_UID (regno)
879 == INSN_UID (VARRAY_RTX (reg_single_usage, regno)))
880 && VARRAY_INT (set_in_loop, regno) == 1
881 && ! side_effects_p (SET_SRC (set))
882 && ! find_reg_note (p, REG_RETVAL, NULL_RTX)
883 && (! SMALL_REGISTER_CLASSES
884 || (! (GET_CODE (SET_SRC (set)) == REG
885 && REGNO (SET_SRC (set)) < FIRST_PSEUDO_REGISTER)))
886 /* This test is not redundant; SET_SRC (set) might be
887 a call-clobbered register and the life of REGNO
888 might span a call. */
889 && ! modified_between_p (SET_SRC (set), p,
891 (reg_single_usage, regno))
892 && no_labels_between_p (p, VARRAY_RTX (reg_single_usage, regno))
893 && validate_replace_rtx (SET_DEST (set), SET_SRC (set),
895 (reg_single_usage, regno)))
897 /* Replace any usage in a REG_EQUAL note. Must copy the
898 new source, so that we don't get rtx sharing between the
899 SET_SOURCE and REG_NOTES of insn p. */
900 REG_NOTES (VARRAY_RTX (reg_single_usage, regno))
901 = replace_rtx (REG_NOTES (VARRAY_RTX
902 (reg_single_usage, regno)),
903 SET_DEST (set), copy_rtx (SET_SRC (set)));
906 NOTE_LINE_NUMBER (p) = NOTE_INSN_DELETED;
907 NOTE_SOURCE_FILE (p) = 0;
908 VARRAY_INT (set_in_loop, regno) = 0;
912 m = (struct movable *) alloca (sizeof (struct movable));
916 m->dependencies = dependencies;
917 m->set_dest = SET_DEST (set);
919 m->consec = VARRAY_INT (set_in_loop,
920 REGNO (SET_DEST (set))) - 1;
924 m->move_insn = move_insn;
925 m->move_insn_first = 0;
926 m->is_equiv = (find_reg_note (p, REG_EQUIV, NULL_RTX) != 0);
927 m->savemode = VOIDmode;
929 /* Set M->cond if either loop_invariant_p
930 or consec_sets_invariant_p returned 2
931 (only conditionally invariant). */
932 m->cond = ((tem | tem1 | tem2) > 1);
933 m->global = (uid_luid[REGNO_LAST_UID (regno)]
934 > INSN_LUID (loop_end)
935 || uid_luid[REGNO_FIRST_UID (regno)] < INSN_LUID (loop_start));
937 m->lifetime = (uid_luid[REGNO_LAST_UID (regno)]
938 - uid_luid[REGNO_FIRST_UID (regno)]);
939 m->savings = VARRAY_INT (n_times_set, regno);
940 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
941 m->savings += libcall_benefit (p);
942 VARRAY_INT (set_in_loop, regno) = move_insn ? -2 : -1;
943 /* Add M to the end of the chain MOVABLES. */
947 last_movable->next = m;
952 /* It is possible for the first instruction to have a
953 REG_EQUAL note but a non-invariant SET_SRC, so we must
954 remember the status of the first instruction in case
955 the last instruction doesn't have a REG_EQUAL note. */
956 m->move_insn_first = m->move_insn;
958 /* Skip this insn, not checking REG_LIBCALL notes. */
959 p = next_nonnote_insn (p);
960 /* Skip the consecutive insns, if there are any. */
961 p = skip_consec_insns (p, m->consec);
962 /* Back up to the last insn of the consecutive group. */
963 p = prev_nonnote_insn (p);
965 /* We must now reset m->move_insn, m->is_equiv, and possibly
966 m->set_src to correspond to the effects of all the
968 temp = find_reg_note (p, REG_EQUIV, NULL_RTX);
970 m->set_src = XEXP (temp, 0), m->move_insn = 1;
973 temp = find_reg_note (p, REG_EQUAL, NULL_RTX);
974 if (temp && CONSTANT_P (XEXP (temp, 0)))
975 m->set_src = XEXP (temp, 0), m->move_insn = 1;
980 m->is_equiv = (find_reg_note (p, REG_EQUIV, NULL_RTX) != 0);
983 /* If this register is always set within a STRICT_LOW_PART
984 or set to zero, then its high bytes are constant.
985 So clear them outside the loop and within the loop
986 just load the low bytes.
987 We must check that the machine has an instruction to do so.
988 Also, if the value loaded into the register
989 depends on the same register, this cannot be done. */
990 else if (SET_SRC (set) == const0_rtx
991 && GET_CODE (NEXT_INSN (p)) == INSN
992 && (set1 = single_set (NEXT_INSN (p)))
993 && GET_CODE (set1) == SET
994 && (GET_CODE (SET_DEST (set1)) == STRICT_LOW_PART)
995 && (GET_CODE (XEXP (SET_DEST (set1), 0)) == SUBREG)
996 && (SUBREG_REG (XEXP (SET_DEST (set1), 0))
998 && !reg_mentioned_p (SET_DEST (set), SET_SRC (set1)))
1000 register int regno = REGNO (SET_DEST (set));
1001 if (VARRAY_INT (set_in_loop, regno) == 2)
1003 register struct movable *m;
1004 m = (struct movable *) alloca (sizeof (struct movable));
1007 m->set_dest = SET_DEST (set);
1008 m->dependencies = 0;
1014 m->move_insn_first = 0;
1016 /* If the insn may not be executed on some cycles,
1017 we can't clear the whole reg; clear just high part.
1018 Not even if the reg is used only within this loop.
1025 Clearing x before the inner loop could clobber a value
1026 being saved from the last time around the outer loop.
1027 However, if the reg is not used outside this loop
1028 and all uses of the register are in the same
1029 basic block as the store, there is no problem.
1031 If this insn was made by loop, we don't know its
1032 INSN_LUID and hence must make a conservative
1034 m->global = (INSN_UID (p) >= max_uid_for_loop
1035 || (uid_luid[REGNO_LAST_UID (regno)]
1036 > INSN_LUID (loop_end))
1037 || (uid_luid[REGNO_FIRST_UID (regno)]
1039 || (labels_in_range_p
1040 (p, uid_luid[REGNO_FIRST_UID (regno)])));
1041 if (maybe_never && m->global)
1042 m->savemode = GET_MODE (SET_SRC (set1));
1044 m->savemode = VOIDmode;
1048 m->lifetime = (uid_luid[REGNO_LAST_UID (regno)]
1049 - uid_luid[REGNO_FIRST_UID (regno)]);
1051 VARRAY_INT (set_in_loop, regno) = -1;
1052 /* Add M to the end of the chain MOVABLES. */
1056 last_movable->next = m;
1061 /* Past a call insn, we get to insns which might not be executed
1062 because the call might exit. This matters for insns that trap.
1063 Call insns inside a REG_LIBCALL/REG_RETVAL block always return,
1064 so they don't count. */
1065 else if (GET_CODE (p) == CALL_INSN && ! in_libcall)
1067 /* Past a label or a jump, we get to insns for which we
1068 can't count on whether or how many times they will be
1069 executed during each iteration. Therefore, we can
1070 only move out sets of trivial variables
1071 (those not used after the loop). */
1072 /* Similar code appears twice in strength_reduce. */
1073 else if ((GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN)
1074 /* If we enter the loop in the middle, and scan around to the
1075 beginning, don't set maybe_never for that. This must be an
1076 unconditional jump, otherwise the code at the top of the
1077 loop might never be executed. Unconditional jumps are
1078 followed a by barrier then loop end. */
1079 && ! (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p) == loop->top
1080 && NEXT_INSN (NEXT_INSN (p)) == loop_end
1081 && simplejump_p (p)))
1083 else if (GET_CODE (p) == NOTE)
1085 /* At the virtual top of a converted loop, insns are again known to
1086 be executed: logically, the loop begins here even though the exit
1087 code has been duplicated. */
1088 if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP && loop_depth == 0)
1089 maybe_never = call_passed = 0;
1090 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
1092 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
1097 /* If one movable subsumes another, ignore that other. */
1099 ignore_some_movables (movables);
1101 /* For each movable insn, see if the reg that it loads
1102 leads when it dies right into another conditionally movable insn.
1103 If so, record that the second insn "forces" the first one,
1104 since the second can be moved only if the first is. */
1106 force_movables (movables);
1108 /* See if there are multiple movable insns that load the same value.
1109 If there are, make all but the first point at the first one
1110 through the `match' field, and add the priorities of them
1111 all together as the priority of the first. */
1113 combine_movables (movables, nregs);
1115 /* Now consider each movable insn to decide whether it is worth moving.
1116 Store 0 in set_in_loop for each reg that is moved.
1118 Generally this increases code size, so do not move moveables when
1119 optimizing for code size. */
1121 if (! optimize_size)
1122 move_movables (loop, movables, threshold, insn_count, nregs);
1124 /* Now candidates that still are negative are those not moved.
1125 Change set_in_loop to indicate that those are not actually invariant. */
1126 for (i = 0; i < nregs; i++)
1127 if (VARRAY_INT (set_in_loop, i) < 0)
1128 VARRAY_INT (set_in_loop, i) = VARRAY_INT (n_times_set, i);
1130 /* Now that we've moved some things out of the loop, we might be able to
1131 hoist even more memory references. */
1132 load_mems_and_recount_loop_regs_set (loop, &insn_count);
1134 for (update_start = loop_start;
1135 PREV_INSN (update_start)
1136 && GET_CODE (PREV_INSN (update_start)) != CODE_LABEL;
1137 update_start = PREV_INSN (update_start))
1139 update_end = NEXT_INSN (loop_end);
1141 reg_scan_update (update_start, update_end, loop_max_reg);
1142 loop_max_reg = max_reg_num ();
1144 if (flag_strength_reduce)
1146 the_movables = movables;
1147 strength_reduce (loop, insn_count, unroll_p, bct_p);
1149 reg_scan_update (update_start, update_end, loop_max_reg);
1150 loop_max_reg = max_reg_num ();
1153 VARRAY_FREE (reg_single_usage);
1154 VARRAY_FREE (set_in_loop);
1155 VARRAY_FREE (n_times_set);
1156 VARRAY_FREE (may_not_optimize);
1159 /* Add elements to *OUTPUT to record all the pseudo-regs
1160 mentioned in IN_THIS but not mentioned in NOT_IN_THIS. */
1163 record_excess_regs (in_this, not_in_this, output)
1164 rtx in_this, not_in_this;
1171 code = GET_CODE (in_this);
1185 if (REGNO (in_this) >= FIRST_PSEUDO_REGISTER
1186 && ! reg_mentioned_p (in_this, not_in_this))
1187 *output = gen_rtx_EXPR_LIST (VOIDmode, in_this, *output);
1194 fmt = GET_RTX_FORMAT (code);
1195 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1202 for (j = 0; j < XVECLEN (in_this, i); j++)
1203 record_excess_regs (XVECEXP (in_this, i, j), not_in_this, output);
1207 record_excess_regs (XEXP (in_this, i), not_in_this, output);
1213 /* Check what regs are referred to in the libcall block ending with INSN,
1214 aside from those mentioned in the equivalent value.
1215 If there are none, return 0.
1216 If there are one or more, return an EXPR_LIST containing all of them. */
1219 libcall_other_reg (insn, equiv)
1222 rtx note = find_reg_note (insn, REG_RETVAL, NULL_RTX);
1223 rtx p = XEXP (note, 0);
1226 /* First, find all the regs used in the libcall block
1227 that are not mentioned as inputs to the result. */
1231 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
1232 || GET_CODE (p) == CALL_INSN)
1233 record_excess_regs (PATTERN (p), equiv, &output);
1240 /* Return 1 if all uses of REG
1241 are between INSN and the end of the basic block. */
1244 reg_in_basic_block_p (insn, reg)
1247 int regno = REGNO (reg);
1250 if (REGNO_FIRST_UID (regno) != INSN_UID (insn))
1253 /* Search this basic block for the already recorded last use of the reg. */
1254 for (p = insn; p; p = NEXT_INSN (p))
1256 switch (GET_CODE (p))
1263 /* Ordinary insn: if this is the last use, we win. */
1264 if (REGNO_LAST_UID (regno) == INSN_UID (p))
1269 /* Jump insn: if this is the last use, we win. */
1270 if (REGNO_LAST_UID (regno) == INSN_UID (p))
1272 /* Otherwise, it's the end of the basic block, so we lose. */
1277 /* It's the end of the basic block, so we lose. */
1285 /* The "last use" that was recorded can't be found after the first
1286 use. This can happen when the last use was deleted while
1287 processing an inner loop, this inner loop was then completely
1288 unrolled, and the outer loop is always exited after the inner loop,
1289 so that everything after the first use becomes a single basic block. */
1293 /* Compute the benefit of eliminating the insns in the block whose
1294 last insn is LAST. This may be a group of insns used to compute a
1295 value directly or can contain a library call. */
1298 libcall_benefit (last)
1304 for (insn = XEXP (find_reg_note (last, REG_RETVAL, NULL_RTX), 0);
1305 insn != last; insn = NEXT_INSN (insn))
1307 if (GET_CODE (insn) == CALL_INSN)
1308 benefit += 10; /* Assume at least this many insns in a library
1310 else if (GET_CODE (insn) == INSN
1311 && GET_CODE (PATTERN (insn)) != USE
1312 && GET_CODE (PATTERN (insn)) != CLOBBER)
1319 /* Skip COUNT insns from INSN, counting library calls as 1 insn. */
1322 skip_consec_insns (insn, count)
1326 for (; count > 0; count--)
1330 /* If first insn of libcall sequence, skip to end. */
1331 /* Do this at start of loop, since INSN is guaranteed to
1333 if (GET_CODE (insn) != NOTE
1334 && (temp = find_reg_note (insn, REG_LIBCALL, NULL_RTX)))
1335 insn = XEXP (temp, 0);
1337 do insn = NEXT_INSN (insn);
1338 while (GET_CODE (insn) == NOTE);
1344 /* Ignore any movable whose insn falls within a libcall
1345 which is part of another movable.
1346 We make use of the fact that the movable for the libcall value
1347 was made later and so appears later on the chain. */
1350 ignore_some_movables (movables)
1351 struct movable *movables;
1353 register struct movable *m, *m1;
1355 for (m = movables; m; m = m->next)
1357 /* Is this a movable for the value of a libcall? */
1358 rtx note = find_reg_note (m->insn, REG_RETVAL, NULL_RTX);
1362 /* Check for earlier movables inside that range,
1363 and mark them invalid. We cannot use LUIDs here because
1364 insns created by loop.c for prior loops don't have LUIDs.
1365 Rather than reject all such insns from movables, we just
1366 explicitly check each insn in the libcall (since invariant
1367 libcalls aren't that common). */
1368 for (insn = XEXP (note, 0); insn != m->insn; insn = NEXT_INSN (insn))
1369 for (m1 = movables; m1 != m; m1 = m1->next)
1370 if (m1->insn == insn)
1376 /* For each movable insn, see if the reg that it loads
1377 leads when it dies right into another conditionally movable insn.
1378 If so, record that the second insn "forces" the first one,
1379 since the second can be moved only if the first is. */
1382 force_movables (movables)
1383 struct movable *movables;
1385 register struct movable *m, *m1;
1386 for (m1 = movables; m1; m1 = m1->next)
1387 /* Omit this if moving just the (SET (REG) 0) of a zero-extend. */
1388 if (!m1->partial && !m1->done)
1390 int regno = m1->regno;
1391 for (m = m1->next; m; m = m->next)
1392 /* ??? Could this be a bug? What if CSE caused the
1393 register of M1 to be used after this insn?
1394 Since CSE does not update regno_last_uid,
1395 this insn M->insn might not be where it dies.
1396 But very likely this doesn't matter; what matters is
1397 that M's reg is computed from M1's reg. */
1398 if (INSN_UID (m->insn) == REGNO_LAST_UID (regno)
1401 if (m != 0 && m->set_src == m1->set_dest
1402 /* If m->consec, m->set_src isn't valid. */
1406 /* Increase the priority of the moving the first insn
1407 since it permits the second to be moved as well. */
1411 m1->lifetime += m->lifetime;
1412 m1->savings += m->savings;
1417 /* Find invariant expressions that are equal and can be combined into
1421 combine_movables (movables, nregs)
1422 struct movable *movables;
1425 register struct movable *m;
1426 char *matched_regs = (char *) xmalloc (nregs);
1427 enum machine_mode mode;
1429 /* Regs that are set more than once are not allowed to match
1430 or be matched. I'm no longer sure why not. */
1431 /* Perhaps testing m->consec_sets would be more appropriate here? */
1433 for (m = movables; m; m = m->next)
1434 if (m->match == 0 && VARRAY_INT (n_times_set, m->regno) == 1 && !m->partial)
1436 register struct movable *m1;
1437 int regno = m->regno;
1439 bzero (matched_regs, nregs);
1440 matched_regs[regno] = 1;
1442 /* We want later insns to match the first one. Don't make the first
1443 one match any later ones. So start this loop at m->next. */
1444 for (m1 = m->next; m1; m1 = m1->next)
1445 if (m != m1 && m1->match == 0 && VARRAY_INT (n_times_set, m1->regno) == 1
1446 /* A reg used outside the loop mustn't be eliminated. */
1448 /* A reg used for zero-extending mustn't be eliminated. */
1450 && (matched_regs[m1->regno]
1453 /* Can combine regs with different modes loaded from the
1454 same constant only if the modes are the same or
1455 if both are integer modes with M wider or the same
1456 width as M1. The check for integer is redundant, but
1457 safe, since the only case of differing destination
1458 modes with equal sources is when both sources are
1459 VOIDmode, i.e., CONST_INT. */
1460 (GET_MODE (m->set_dest) == GET_MODE (m1->set_dest)
1461 || (GET_MODE_CLASS (GET_MODE (m->set_dest)) == MODE_INT
1462 && GET_MODE_CLASS (GET_MODE (m1->set_dest)) == MODE_INT
1463 && (GET_MODE_BITSIZE (GET_MODE (m->set_dest))
1464 >= GET_MODE_BITSIZE (GET_MODE (m1->set_dest)))))
1465 /* See if the source of M1 says it matches M. */
1466 && ((GET_CODE (m1->set_src) == REG
1467 && matched_regs[REGNO (m1->set_src)])
1468 || rtx_equal_for_loop_p (m->set_src, m1->set_src,
1470 && ((m->dependencies == m1->dependencies)
1471 || rtx_equal_p (m->dependencies, m1->dependencies)))
1473 m->lifetime += m1->lifetime;
1474 m->savings += m1->savings;
1477 matched_regs[m1->regno] = 1;
1481 /* Now combine the regs used for zero-extension.
1482 This can be done for those not marked `global'
1483 provided their lives don't overlap. */
1485 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
1486 mode = GET_MODE_WIDER_MODE (mode))
1488 register struct movable *m0 = 0;
1490 /* Combine all the registers for extension from mode MODE.
1491 Don't combine any that are used outside this loop. */
1492 for (m = movables; m; m = m->next)
1493 if (m->partial && ! m->global
1494 && mode == GET_MODE (SET_SRC (PATTERN (NEXT_INSN (m->insn)))))
1496 register struct movable *m1;
1497 int first = uid_luid[REGNO_FIRST_UID (m->regno)];
1498 int last = uid_luid[REGNO_LAST_UID (m->regno)];
1502 /* First one: don't check for overlap, just record it. */
1507 /* Make sure they extend to the same mode.
1508 (Almost always true.) */
1509 if (GET_MODE (m->set_dest) != GET_MODE (m0->set_dest))
1512 /* We already have one: check for overlap with those
1513 already combined together. */
1514 for (m1 = movables; m1 != m; m1 = m1->next)
1515 if (m1 == m0 || (m1->partial && m1->match == m0))
1516 if (! (uid_luid[REGNO_FIRST_UID (m1->regno)] > last
1517 || uid_luid[REGNO_LAST_UID (m1->regno)] < first))
1520 /* No overlap: we can combine this with the others. */
1521 m0->lifetime += m->lifetime;
1522 m0->savings += m->savings;
1531 free (matched_regs);
1534 /* Return 1 if regs X and Y will become the same if moved. */
1537 regs_match_p (x, y, movables)
1539 struct movable *movables;
1541 unsigned int xn = REGNO (x);
1542 unsigned int yn = REGNO (y);
1543 struct movable *mx, *my;
1545 for (mx = movables; mx; mx = mx->next)
1546 if (mx->regno == xn)
1549 for (my = movables; my; my = my->next)
1550 if (my->regno == yn)
1554 && ((mx->match == my->match && mx->match != 0)
1556 || mx == my->match));
1559 /* Return 1 if X and Y are identical-looking rtx's.
1560 This is the Lisp function EQUAL for rtx arguments.
1562 If two registers are matching movables or a movable register and an
1563 equivalent constant, consider them equal. */
1566 rtx_equal_for_loop_p (x, y, movables)
1568 struct movable *movables;
1572 register struct movable *m;
1573 register enum rtx_code code;
1574 register const char *fmt;
1578 if (x == 0 || y == 0)
1581 code = GET_CODE (x);
1583 /* If we have a register and a constant, they may sometimes be
1585 if (GET_CODE (x) == REG && VARRAY_INT (set_in_loop, REGNO (x)) == -2
1588 for (m = movables; m; m = m->next)
1589 if (m->move_insn && m->regno == REGNO (x)
1590 && rtx_equal_p (m->set_src, y))
1593 else if (GET_CODE (y) == REG && VARRAY_INT (set_in_loop, REGNO (y)) == -2
1596 for (m = movables; m; m = m->next)
1597 if (m->move_insn && m->regno == REGNO (y)
1598 && rtx_equal_p (m->set_src, x))
1602 /* Otherwise, rtx's of different codes cannot be equal. */
1603 if (code != GET_CODE (y))
1606 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
1607 (REG:SI x) and (REG:HI x) are NOT equivalent. */
1609 if (GET_MODE (x) != GET_MODE (y))
1612 /* These three types of rtx's can be compared nonrecursively. */
1614 return (REGNO (x) == REGNO (y) || regs_match_p (x, y, movables));
1616 if (code == LABEL_REF)
1617 return XEXP (x, 0) == XEXP (y, 0);
1618 if (code == SYMBOL_REF)
1619 return XSTR (x, 0) == XSTR (y, 0);
1621 /* Compare the elements. If any pair of corresponding elements
1622 fail to match, return 0 for the whole things. */
1624 fmt = GET_RTX_FORMAT (code);
1625 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1630 if (XWINT (x, i) != XWINT (y, i))
1635 if (XINT (x, i) != XINT (y, i))
1640 /* Two vectors must have the same length. */
1641 if (XVECLEN (x, i) != XVECLEN (y, i))
1644 /* And the corresponding elements must match. */
1645 for (j = 0; j < XVECLEN (x, i); j++)
1646 if (rtx_equal_for_loop_p (XVECEXP (x, i, j), XVECEXP (y, i, j), movables) == 0)
1651 if (rtx_equal_for_loop_p (XEXP (x, i), XEXP (y, i), movables) == 0)
1656 if (strcmp (XSTR (x, i), XSTR (y, i)))
1661 /* These are just backpointers, so they don't matter. */
1667 /* It is believed that rtx's at this level will never
1668 contain anything but integers and other rtx's,
1669 except for within LABEL_REFs and SYMBOL_REFs. */
1677 /* If X contains any LABEL_REF's, add REG_LABEL notes for them to all
1678 insns in INSNS which use the reference. */
1681 add_label_notes (x, insns)
1685 enum rtx_code code = GET_CODE (x);
1690 if (code == LABEL_REF && !LABEL_REF_NONLOCAL_P (x))
1692 /* This code used to ignore labels that referred to dispatch tables to
1693 avoid flow generating (slighly) worse code.
1695 We no longer ignore such label references (see LABEL_REF handling in
1696 mark_jump_label for additional information). */
1697 for (insn = insns; insn; insn = NEXT_INSN (insn))
1698 if (reg_mentioned_p (XEXP (x, 0), insn))
1699 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_LABEL, XEXP (x, 0),
1703 fmt = GET_RTX_FORMAT (code);
1704 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1707 add_label_notes (XEXP (x, i), insns);
1708 else if (fmt[i] == 'E')
1709 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1710 add_label_notes (XVECEXP (x, i, j), insns);
1714 /* Scan MOVABLES, and move the insns that deserve to be moved.
1715 If two matching movables are combined, replace one reg with the
1716 other throughout. */
1719 move_movables (loop, movables, threshold, insn_count, nregs)
1721 struct movable *movables;
1727 register struct movable *m;
1729 rtx loop_start = loop->start;
1730 rtx loop_end = loop->end;
1731 /* Map of pseudo-register replacements to handle combining
1732 when we move several insns that load the same value
1733 into different pseudo-registers. */
1734 rtx *reg_map = (rtx *) xcalloc (nregs, sizeof (rtx));
1735 char *already_moved = (char *) xcalloc (nregs, sizeof (char));
1739 for (m = movables; m; m = m->next)
1741 /* Describe this movable insn. */
1743 if (loop_dump_stream)
1745 fprintf (loop_dump_stream, "Insn %d: regno %d (life %d), ",
1746 INSN_UID (m->insn), m->regno, m->lifetime);
1748 fprintf (loop_dump_stream, "consec %d, ", m->consec);
1750 fprintf (loop_dump_stream, "cond ");
1752 fprintf (loop_dump_stream, "force ");
1754 fprintf (loop_dump_stream, "global ");
1756 fprintf (loop_dump_stream, "done ");
1758 fprintf (loop_dump_stream, "move-insn ");
1760 fprintf (loop_dump_stream, "matches %d ",
1761 INSN_UID (m->match->insn));
1763 fprintf (loop_dump_stream, "forces %d ",
1764 INSN_UID (m->forces->insn));
1767 /* Count movables. Value used in heuristics in strength_reduce. */
1770 /* Ignore the insn if it's already done (it matched something else).
1771 Otherwise, see if it is now safe to move. */
1775 || (1 == loop_invariant_p (loop, m->set_src)
1776 && (m->dependencies == 0
1777 || 1 == loop_invariant_p (loop, m->dependencies))
1779 || 1 == consec_sets_invariant_p (loop, m->set_dest,
1782 && (! m->forces || m->forces->done))
1786 int savings = m->savings;
1788 /* We have an insn that is safe to move.
1789 Compute its desirability. */
1794 if (loop_dump_stream)
1795 fprintf (loop_dump_stream, "savings %d ", savings);
1797 if (moved_once[regno] && loop_dump_stream)
1798 fprintf (loop_dump_stream, "halved since already moved ");
1800 /* An insn MUST be moved if we already moved something else
1801 which is safe only if this one is moved too: that is,
1802 if already_moved[REGNO] is nonzero. */
1804 /* An insn is desirable to move if the new lifetime of the
1805 register is no more than THRESHOLD times the old lifetime.
1806 If it's not desirable, it means the loop is so big
1807 that moving won't speed things up much,
1808 and it is liable to make register usage worse. */
1810 /* It is also desirable to move if it can be moved at no
1811 extra cost because something else was already moved. */
1813 if (already_moved[regno]
1814 || flag_move_all_movables
1815 || (threshold * savings * m->lifetime) >=
1816 (moved_once[regno] ? insn_count * 2 : insn_count)
1817 || (m->forces && m->forces->done
1818 && VARRAY_INT (n_times_set, m->forces->regno) == 1))
1821 register struct movable *m1;
1822 rtx first = NULL_RTX;
1824 /* Now move the insns that set the reg. */
1826 if (m->partial && m->match)
1830 /* Find the end of this chain of matching regs.
1831 Thus, we load each reg in the chain from that one reg.
1832 And that reg is loaded with 0 directly,
1833 since it has ->match == 0. */
1834 for (m1 = m; m1->match; m1 = m1->match);
1835 newpat = gen_move_insn (SET_DEST (PATTERN (m->insn)),
1836 SET_DEST (PATTERN (m1->insn)));
1837 i1 = emit_insn_before (newpat, loop_start);
1839 /* Mark the moved, invariant reg as being allowed to
1840 share a hard reg with the other matching invariant. */
1841 REG_NOTES (i1) = REG_NOTES (m->insn);
1842 r1 = SET_DEST (PATTERN (m->insn));
1843 r2 = SET_DEST (PATTERN (m1->insn));
1845 = gen_rtx_EXPR_LIST (VOIDmode, r1,
1846 gen_rtx_EXPR_LIST (VOIDmode, r2,
1848 delete_insn (m->insn);
1853 if (loop_dump_stream)
1854 fprintf (loop_dump_stream, " moved to %d", INSN_UID (i1));
1856 /* If we are to re-generate the item being moved with a
1857 new move insn, first delete what we have and then emit
1858 the move insn before the loop. */
1859 else if (m->move_insn)
1863 for (count = m->consec; count >= 0; count--)
1865 /* If this is the first insn of a library call sequence,
1867 if (GET_CODE (p) != NOTE
1868 && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
1871 /* If this is the last insn of a libcall sequence, then
1872 delete every insn in the sequence except the last.
1873 The last insn is handled in the normal manner. */
1874 if (GET_CODE (p) != NOTE
1875 && (temp = find_reg_note (p, REG_RETVAL, NULL_RTX)))
1877 temp = XEXP (temp, 0);
1879 temp = delete_insn (temp);
1883 p = delete_insn (p);
1885 /* simplify_giv_expr expects that it can walk the insns
1886 at m->insn forwards and see this old sequence we are
1887 tossing here. delete_insn does preserve the next
1888 pointers, but when we skip over a NOTE we must fix
1889 it up. Otherwise that code walks into the non-deleted
1891 while (p && GET_CODE (p) == NOTE)
1892 p = NEXT_INSN (temp) = NEXT_INSN (p);
1896 emit_move_insn (m->set_dest, m->set_src);
1897 temp = get_insns ();
1900 add_label_notes (m->set_src, temp);
1902 i1 = emit_insns_before (temp, loop_start);
1903 if (! find_reg_note (i1, REG_EQUAL, NULL_RTX))
1905 = gen_rtx_EXPR_LIST (m->is_equiv ? REG_EQUIV : REG_EQUAL,
1906 m->set_src, REG_NOTES (i1));
1908 if (loop_dump_stream)
1909 fprintf (loop_dump_stream, " moved to %d", INSN_UID (i1));
1911 /* The more regs we move, the less we like moving them. */
1916 for (count = m->consec; count >= 0; count--)
1920 /* If first insn of libcall sequence, skip to end. */
1921 /* Do this at start of loop, since p is guaranteed to
1923 if (GET_CODE (p) != NOTE
1924 && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
1927 /* If last insn of libcall sequence, move all
1928 insns except the last before the loop. The last
1929 insn is handled in the normal manner. */
1930 if (GET_CODE (p) != NOTE
1931 && (temp = find_reg_note (p, REG_RETVAL, NULL_RTX)))
1935 rtx fn_address_insn = 0;
1938 for (temp = XEXP (temp, 0); temp != p;
1939 temp = NEXT_INSN (temp))
1945 if (GET_CODE (temp) == NOTE)
1948 body = PATTERN (temp);
1950 /* Find the next insn after TEMP,
1951 not counting USE or NOTE insns. */
1952 for (next = NEXT_INSN (temp); next != p;
1953 next = NEXT_INSN (next))
1954 if (! (GET_CODE (next) == INSN
1955 && GET_CODE (PATTERN (next)) == USE)
1956 && GET_CODE (next) != NOTE)
1959 /* If that is the call, this may be the insn
1960 that loads the function address.
1962 Extract the function address from the insn
1963 that loads it into a register.
1964 If this insn was cse'd, we get incorrect code.
1966 So emit a new move insn that copies the
1967 function address into the register that the
1968 call insn will use. flow.c will delete any
1969 redundant stores that we have created. */
1970 if (GET_CODE (next) == CALL_INSN
1971 && GET_CODE (body) == SET
1972 && GET_CODE (SET_DEST (body)) == REG
1973 && (n = find_reg_note (temp, REG_EQUAL,
1976 fn_reg = SET_SRC (body);
1977 if (GET_CODE (fn_reg) != REG)
1978 fn_reg = SET_DEST (body);
1979 fn_address = XEXP (n, 0);
1980 fn_address_insn = temp;
1982 /* We have the call insn.
1983 If it uses the register we suspect it might,
1984 load it with the correct address directly. */
1985 if (GET_CODE (temp) == CALL_INSN
1987 && reg_referenced_p (fn_reg, body))
1988 emit_insn_after (gen_move_insn (fn_reg,
1992 if (GET_CODE (temp) == CALL_INSN)
1994 i1 = emit_call_insn_before (body, loop_start);
1995 /* Because the USAGE information potentially
1996 contains objects other than hard registers
1997 we need to copy it. */
1998 if (CALL_INSN_FUNCTION_USAGE (temp))
1999 CALL_INSN_FUNCTION_USAGE (i1)
2000 = copy_rtx (CALL_INSN_FUNCTION_USAGE (temp));
2003 i1 = emit_insn_before (body, loop_start);
2006 if (temp == fn_address_insn)
2007 fn_address_insn = i1;
2008 REG_NOTES (i1) = REG_NOTES (temp);
2014 if (m->savemode != VOIDmode)
2016 /* P sets REG to zero; but we should clear only
2017 the bits that are not covered by the mode
2019 rtx reg = m->set_dest;
2025 (GET_MODE (reg), and_optab, reg,
2026 GEN_INT ((((HOST_WIDE_INT) 1
2027 << GET_MODE_BITSIZE (m->savemode)))
2029 reg, 1, OPTAB_LIB_WIDEN);
2033 emit_move_insn (reg, tem);
2034 sequence = gen_sequence ();
2036 i1 = emit_insn_before (sequence, loop_start);
2038 else if (GET_CODE (p) == CALL_INSN)
2040 i1 = emit_call_insn_before (PATTERN (p), loop_start);
2041 /* Because the USAGE information potentially
2042 contains objects other than hard registers
2043 we need to copy it. */
2044 if (CALL_INSN_FUNCTION_USAGE (p))
2045 CALL_INSN_FUNCTION_USAGE (i1)
2046 = copy_rtx (CALL_INSN_FUNCTION_USAGE (p));
2048 else if (count == m->consec && m->move_insn_first)
2050 /* The SET_SRC might not be invariant, so we must
2051 use the REG_EQUAL note. */
2053 emit_move_insn (m->set_dest, m->set_src);
2054 temp = get_insns ();
2057 add_label_notes (m->set_src, temp);
2059 i1 = emit_insns_before (temp, loop_start);
2060 if (! find_reg_note (i1, REG_EQUAL, NULL_RTX))
2062 = gen_rtx_EXPR_LIST ((m->is_equiv ? REG_EQUIV
2064 m->set_src, REG_NOTES (i1));
2067 i1 = emit_insn_before (PATTERN (p), loop_start);
2069 if (REG_NOTES (i1) == 0)
2071 REG_NOTES (i1) = REG_NOTES (p);
2073 /* If there is a REG_EQUAL note present whose value
2074 is not loop invariant, then delete it, since it
2075 may cause problems with later optimization passes.
2076 It is possible for cse to create such notes
2077 like this as a result of record_jump_cond. */
2079 if ((temp = find_reg_note (i1, REG_EQUAL, NULL_RTX))
2080 && ! loop_invariant_p (loop, XEXP (temp, 0)))
2081 remove_note (i1, temp);
2087 if (loop_dump_stream)
2088 fprintf (loop_dump_stream, " moved to %d",
2091 /* If library call, now fix the REG_NOTES that contain
2092 insn pointers, namely REG_LIBCALL on FIRST
2093 and REG_RETVAL on I1. */
2094 if ((temp = find_reg_note (i1, REG_RETVAL, NULL_RTX)))
2096 XEXP (temp, 0) = first;
2097 temp = find_reg_note (first, REG_LIBCALL, NULL_RTX);
2098 XEXP (temp, 0) = i1;
2105 /* simplify_giv_expr expects that it can walk the insns
2106 at m->insn forwards and see this old sequence we are
2107 tossing here. delete_insn does preserve the next
2108 pointers, but when we skip over a NOTE we must fix
2109 it up. Otherwise that code walks into the non-deleted
2111 while (p && GET_CODE (p) == NOTE)
2112 p = NEXT_INSN (temp) = NEXT_INSN (p);
2115 /* The more regs we move, the less we like moving them. */
2119 /* Any other movable that loads the same register
2121 already_moved[regno] = 1;
2123 /* This reg has been moved out of one loop. */
2124 moved_once[regno] = 1;
2126 /* The reg set here is now invariant. */
2128 VARRAY_INT (set_in_loop, regno) = 0;
2132 /* Change the length-of-life info for the register
2133 to say it lives at least the full length of this loop.
2134 This will help guide optimizations in outer loops. */
2136 if (uid_luid[REGNO_FIRST_UID (regno)] > INSN_LUID (loop_start))
2137 /* This is the old insn before all the moved insns.
2138 We can't use the moved insn because it is out of range
2139 in uid_luid. Only the old insns have luids. */
2140 REGNO_FIRST_UID (regno) = INSN_UID (loop_start);
2141 if (uid_luid[REGNO_LAST_UID (regno)] < INSN_LUID (loop_end))
2142 REGNO_LAST_UID (regno) = INSN_UID (loop_end);
2144 /* Combine with this moved insn any other matching movables. */
2147 for (m1 = movables; m1; m1 = m1->next)
2152 /* Schedule the reg loaded by M1
2153 for replacement so that shares the reg of M.
2154 If the modes differ (only possible in restricted
2155 circumstances, make a SUBREG.
2157 Note this assumes that the target dependent files
2158 treat REG and SUBREG equally, including within
2159 GO_IF_LEGITIMATE_ADDRESS and in all the
2160 predicates since we never verify that replacing the
2161 original register with a SUBREG results in a
2162 recognizable insn. */
2163 if (GET_MODE (m->set_dest) == GET_MODE (m1->set_dest))
2164 reg_map[m1->regno] = m->set_dest;
2167 = gen_lowpart_common (GET_MODE (m1->set_dest),
2170 /* Get rid of the matching insn
2171 and prevent further processing of it. */
2174 /* if library call, delete all insn except last, which
2176 if ((temp = find_reg_note (m1->insn, REG_RETVAL,
2179 for (temp = XEXP (temp, 0); temp != m1->insn;
2180 temp = NEXT_INSN (temp))
2183 delete_insn (m1->insn);
2185 /* Any other movable that loads the same register
2187 already_moved[m1->regno] = 1;
2189 /* The reg merged here is now invariant,
2190 if the reg it matches is invariant. */
2192 VARRAY_INT (set_in_loop, m1->regno) = 0;
2195 else if (loop_dump_stream)
2196 fprintf (loop_dump_stream, "not desirable");
2198 else if (loop_dump_stream && !m->match)
2199 fprintf (loop_dump_stream, "not safe");
2201 if (loop_dump_stream)
2202 fprintf (loop_dump_stream, "\n");
2206 new_start = loop_start;
2208 /* Go through all the instructions in the loop, making
2209 all the register substitutions scheduled in REG_MAP. */
2210 for (p = new_start; p != loop_end; p = NEXT_INSN (p))
2211 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
2212 || GET_CODE (p) == CALL_INSN)
2214 replace_regs (PATTERN (p), reg_map, nregs, 0);
2215 replace_regs (REG_NOTES (p), reg_map, nregs, 0);
2221 free (already_moved);
2225 /* Scan X and replace the address of any MEM in it with ADDR.
2226 REG is the address that MEM should have before the replacement. */
2229 replace_call_address (x, reg, addr)
2232 register enum rtx_code code;
2234 register const char *fmt;
2238 code = GET_CODE (x);
2252 /* Short cut for very common case. */
2253 replace_call_address (XEXP (x, 1), reg, addr);
2257 /* Short cut for very common case. */
2258 replace_call_address (XEXP (x, 0), reg, addr);
2262 /* If this MEM uses a reg other than the one we expected,
2263 something is wrong. */
2264 if (XEXP (x, 0) != reg)
2273 fmt = GET_RTX_FORMAT (code);
2274 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2277 replace_call_address (XEXP (x, i), reg, addr);
2278 else if (fmt[i] == 'E')
2281 for (j = 0; j < XVECLEN (x, i); j++)
2282 replace_call_address (XVECEXP (x, i, j), reg, addr);
2288 /* Return the number of memory refs to addresses that vary
2292 count_nonfixed_reads (loop, x)
2293 const struct loop *loop;
2296 register enum rtx_code code;
2298 register const char *fmt;
2304 code = GET_CODE (x);
2318 return ((loop_invariant_p (loop, XEXP (x, 0)) != 1)
2319 + count_nonfixed_reads (loop, XEXP (x, 0)));
2326 fmt = GET_RTX_FORMAT (code);
2327 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2330 value += count_nonfixed_reads (loop, XEXP (x, i));
2334 for (j = 0; j < XVECLEN (x, i); j++)
2335 value += count_nonfixed_reads (loop, XVECEXP (x, i, j));
2343 /* P is an instruction that sets a register to the result of a ZERO_EXTEND.
2344 Replace it with an instruction to load just the low bytes
2345 if the machine supports such an instruction,
2346 and insert above LOOP_START an instruction to clear the register. */
2349 constant_high_bytes (p, loop_start)
2353 register int insn_code_number;
2355 /* Try to change (SET (REG ...) (ZERO_EXTEND (..:B ...)))
2356 to (SET (STRICT_LOW_PART (SUBREG:B (REG...))) ...). */
2361 gen_rtx_STRICT_LOW_PART
2363 gen_rtx_SUBREG (GET_MODE (XEXP (SET_SRC (PATTERN (p)), 0)),
2364 SET_DEST (PATTERN (p)), 0)),
2365 XEXP (SET_SRC (PATTERN (p)), 0));
2367 insn_code_number = recog (new, p);
2369 if (insn_code_number)
2373 /* Clear destination register before the loop. */
2374 emit_insn_before (gen_rtx_SET (VOIDmode,
2375 SET_DEST (PATTERN (p)), const0_rtx),
2378 /* Inside the loop, just load the low part. */
2384 /* Scan a loop setting the elements `cont', `vtop', `loops_enclosed',
2385 `has_call', `has_volatile', and `has_tablejump' within LOOP.
2386 Set the global variables `unknown_address_altered',
2387 `unknown_constant_address_altered', and `num_mem_sets'. Also, fill
2388 in the array `loop_mems' and the list `loop_store_mems'. */
2394 register int level = 1;
2396 struct loop_info *loop_info = LOOP_INFO (loop);
2397 rtx start = loop->start;
2398 rtx end = loop->end;
2399 /* The label after END. Jumping here is just like falling off the
2400 end of the loop. We use next_nonnote_insn instead of next_label
2401 as a hedge against the (pathological) case where some actual insn
2402 might end up between the two. */
2403 rtx exit_target = next_nonnote_insn (end);
2405 loop_info->has_indirect_jump = indirect_jump_in_function;
2406 loop_info->has_call = 0;
2407 loop_info->has_volatile = 0;
2408 loop_info->has_tablejump = 0;
2409 loop_info->has_multiple_exit_targets = 0;
2414 unknown_address_altered = 0;
2415 unknown_constant_address_altered = 0;
2416 loop_store_mems = NULL_RTX;
2417 first_loop_store_insn = NULL_RTX;
2421 for (insn = NEXT_INSN (start); insn != NEXT_INSN (end);
2422 insn = NEXT_INSN (insn))
2424 if (GET_CODE (insn) == NOTE)
2426 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
2429 /* Count number of loops contained in this one. */
2432 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END)
2441 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_CONT)
2446 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_VTOP)
2448 /* If there is a NOTE_INSN_LOOP_VTOP, then this is a for
2449 or while style loop, with a loop exit test at the
2450 start. Thus, we can assume that the loop condition
2451 was true when the loop was entered. */
2456 else if (GET_CODE (insn) == CALL_INSN)
2458 if (! CONST_CALL_P (insn))
2459 unknown_address_altered = 1;
2460 loop_info->has_call = 1;
2462 else if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN)
2464 rtx label1 = NULL_RTX;
2465 rtx label2 = NULL_RTX;
2467 if (volatile_refs_p (PATTERN (insn)))
2468 loop_info->has_volatile = 1;
2470 if (GET_CODE (insn) == JUMP_INSN
2471 && (GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC
2472 || GET_CODE (PATTERN (insn)) == ADDR_VEC))
2473 loop_info->has_tablejump = 1;
2475 note_stores (PATTERN (insn), note_addr_stored, NULL);
2476 if (! first_loop_store_insn && loop_store_mems)
2477 first_loop_store_insn = insn;
2479 if (! loop_info->has_multiple_exit_targets
2480 && GET_CODE (insn) == JUMP_INSN
2481 && GET_CODE (PATTERN (insn)) == SET
2482 && SET_DEST (PATTERN (insn)) == pc_rtx)
2484 if (GET_CODE (SET_SRC (PATTERN (insn))) == IF_THEN_ELSE)
2486 label1 = XEXP (SET_SRC (PATTERN (insn)), 1);
2487 label2 = XEXP (SET_SRC (PATTERN (insn)), 2);
2491 label1 = SET_SRC (PATTERN (insn));
2495 if (label1 && label1 != pc_rtx)
2497 if (GET_CODE (label1) != LABEL_REF)
2499 /* Something tricky. */
2500 loop_info->has_multiple_exit_targets = 1;
2503 else if (XEXP (label1, 0) != exit_target
2504 && LABEL_OUTSIDE_LOOP_P (label1))
2506 /* A jump outside the current loop. */
2507 loop_info->has_multiple_exit_targets = 1;
2517 else if (GET_CODE (insn) == RETURN)
2518 loop_info->has_multiple_exit_targets = 1;
2521 /* Now, rescan the loop, setting up the LOOP_MEMS array. */
2522 if (/* We can't tell what MEMs are aliased by what. */
2523 ! unknown_address_altered
2524 /* An exception thrown by a called function might land us
2526 && ! loop_info->has_call
2527 /* We don't want loads for MEMs moved to a location before the
2528 one at which their stack memory becomes allocated. (Note
2529 that this is not a problem for malloc, etc., since those
2530 require actual function calls. */
2531 && ! current_function_calls_alloca
2532 /* There are ways to leave the loop other than falling off the
2534 && ! loop_info->has_multiple_exit_targets)
2535 for (insn = NEXT_INSN (start); insn != NEXT_INSN (end);
2536 insn = NEXT_INSN (insn))
2537 for_each_rtx (&insn, insert_loop_mem, 0);
2540 /* LOOP->CONT_DOMINATOR is now the last label between the loop start
2541 and the continue note that is a the destination of a (cond)jump after
2542 the continue note. If there is any (cond)jump between the loop start
2543 and what we have so far as LOOP->CONT_DOMINATOR that has a
2544 target between LOOP->DOMINATOR and the continue note, move
2545 LOOP->CONT_DOMINATOR forward to that label; if a jump's
2546 destination cannot be determined, clear LOOP->CONT_DOMINATOR. */
2549 verify_dominator (loop)
2554 if (! loop->cont_dominator)
2555 /* This can happen for an empty loop, e.g. in
2556 gcc.c-torture/compile/920410-2.c */
2558 if (loop->cont_dominator == const0_rtx)
2560 loop->cont_dominator = 0;
2563 for (insn = loop->start; insn != loop->cont_dominator;
2564 insn = NEXT_INSN (insn))
2566 if (GET_CODE (insn) == JUMP_INSN
2567 && GET_CODE (PATTERN (insn)) != RETURN)
2569 rtx label = JUMP_LABEL (insn);
2572 /* If it is not a jump we can easily understand or for
2573 which we do not have jump target information in the JUMP_LABEL
2574 field (consider ADDR_VEC and ADDR_DIFF_VEC insns), then clear
2575 LOOP->CONT_DOMINATOR. */
2576 if ((! condjump_p (insn)
2577 && ! condjump_in_parallel_p (insn))
2578 || label == NULL_RTX)
2580 loop->cont_dominator = NULL_RTX;
2584 label_luid = INSN_LUID (label);
2585 if (label_luid < INSN_LUID (loop->cont)
2587 > INSN_LUID (loop->cont)))
2588 loop->cont_dominator = label;
2593 /* Scan the function looking for loops. Record the start and end of each loop.
2594 Also mark as invalid loops any loops that contain a setjmp or are branched
2595 to from outside the loop. */
2598 find_and_verify_loops (f, loops)
2600 struct loops *loops;
2605 struct loop *current_loop;
2606 struct loop *next_loop;
2609 num_loops = loops->num;
2611 compute_luids (f, NULL_RTX, 0);
2613 /* If there are jumps to undefined labels,
2614 treat them as jumps out of any/all loops.
2615 This also avoids writing past end of tables when there are no loops. */
2618 /* Find boundaries of loops, mark which loops are contained within
2619 loops, and invalidate loops that have setjmp. */
2622 current_loop = NULL;
2623 for (insn = f; insn; insn = NEXT_INSN (insn))
2625 if (GET_CODE (insn) == NOTE)
2626 switch (NOTE_LINE_NUMBER (insn))
2628 case NOTE_INSN_LOOP_BEG:
2629 next_loop = loops->array + num_loops;
2630 next_loop->num = num_loops;
2632 next_loop->start = insn;
2633 next_loop->outer = current_loop;
2634 current_loop = next_loop;
2637 case NOTE_INSN_SETJMP:
2638 /* In this case, we must invalidate our current loop and any
2640 for (loop = current_loop; loop; loop = loop->outer)
2643 if (loop_dump_stream)
2644 fprintf (loop_dump_stream,
2645 "\nLoop at %d ignored due to setjmp.\n",
2646 INSN_UID (loop->start));
2650 case NOTE_INSN_LOOP_CONT:
2651 current_loop->cont = insn;
2653 case NOTE_INSN_LOOP_END:
2657 current_loop->end = insn;
2658 verify_dominator (current_loop);
2659 current_loop = current_loop->outer;
2665 /* If for any loop, this is a jump insn between the NOTE_INSN_LOOP_CONT
2666 and NOTE_INSN_LOOP_END notes, update loop->dominator. */
2667 else if (GET_CODE (insn) == JUMP_INSN
2668 && GET_CODE (PATTERN (insn)) != RETURN
2671 rtx label = JUMP_LABEL (insn);
2673 if (! condjump_p (insn) && ! condjump_in_parallel_p (insn))
2676 loop = current_loop;
2679 /* First see if we care about this loop. */
2680 if (loop->cont && loop->cont_dominator != const0_rtx)
2682 /* If the jump destination is not known, invalidate
2683 loop->const_dominator. */
2685 loop->cont_dominator = const0_rtx;
2687 /* Check if the destination is between loop start and
2689 if ((INSN_LUID (label)
2690 < INSN_LUID (loop->cont))
2691 && (INSN_LUID (label)
2692 > INSN_LUID (loop->start))
2693 /* And if there is no later destination already
2695 && (! loop->cont_dominator
2696 || (INSN_LUID (label)
2697 > INSN_LUID (loop->cont_dominator))))
2698 loop->cont_dominator = label;
2705 /* Note that this will mark the NOTE_INSN_LOOP_END note as being in the
2706 enclosing loop, but this doesn't matter. */
2707 uid_loop[INSN_UID (insn)] = current_loop;
2710 /* Any loop containing a label used in an initializer must be invalidated,
2711 because it can be jumped into from anywhere. */
2713 for (label = forced_labels; label; label = XEXP (label, 1))
2715 for (loop = uid_loop[INSN_UID (XEXP (label, 0))];
2716 loop; loop = loop->outer)
2720 /* Any loop containing a label used for an exception handler must be
2721 invalidated, because it can be jumped into from anywhere. */
2723 for (label = exception_handler_labels; label; label = XEXP (label, 1))
2725 for (loop = uid_loop[INSN_UID (XEXP (label, 0))];
2726 loop; loop = loop->outer)
2730 /* Now scan all insn's in the function. If any JUMP_INSN branches into a
2731 loop that it is not contained within, that loop is marked invalid.
2732 If any INSN or CALL_INSN uses a label's address, then the loop containing
2733 that label is marked invalid, because it could be jumped into from
2736 Also look for blocks of code ending in an unconditional branch that
2737 exits the loop. If such a block is surrounded by a conditional
2738 branch around the block, move the block elsewhere (see below) and
2739 invert the jump to point to the code block. This may eliminate a
2740 label in our loop and will simplify processing by both us and a
2741 possible second cse pass. */
2743 for (insn = f; insn; insn = NEXT_INSN (insn))
2744 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
2746 struct loop *this_loop = uid_loop[INSN_UID (insn)];
2748 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
2750 rtx note = find_reg_note (insn, REG_LABEL, NULL_RTX);
2753 for (loop = uid_loop[INSN_UID (XEXP (note, 0))];
2754 loop; loop = loop->outer)
2759 if (GET_CODE (insn) != JUMP_INSN)
2762 mark_loop_jump (PATTERN (insn), this_loop);
2764 /* See if this is an unconditional branch outside the loop. */
2766 && (GET_CODE (PATTERN (insn)) == RETURN
2767 || (simplejump_p (insn)
2768 && (uid_loop[INSN_UID (JUMP_LABEL (insn))]
2770 && get_max_uid () < max_uid_for_loop)
2773 rtx our_next = next_real_insn (insn);
2774 rtx last_insn_to_move = NEXT_INSN (insn);
2775 struct loop *dest_loop;
2776 struct loop *outer_loop = NULL;
2778 /* Go backwards until we reach the start of the loop, a label,
2780 for (p = PREV_INSN (insn);
2781 GET_CODE (p) != CODE_LABEL
2782 && ! (GET_CODE (p) == NOTE
2783 && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
2784 && GET_CODE (p) != JUMP_INSN;
2788 /* Check for the case where we have a jump to an inner nested
2789 loop, and do not perform the optimization in that case. */
2791 if (JUMP_LABEL (insn))
2793 dest_loop = uid_loop[INSN_UID (JUMP_LABEL (insn))];
2796 for (outer_loop = dest_loop; outer_loop;
2797 outer_loop = outer_loop->outer)
2798 if (outer_loop == this_loop)
2803 /* Make sure that the target of P is within the current loop. */
2805 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p)
2806 && uid_loop[INSN_UID (JUMP_LABEL (p))] != this_loop)
2807 outer_loop = this_loop;
2809 /* If we stopped on a JUMP_INSN to the next insn after INSN,
2810 we have a block of code to try to move.
2812 We look backward and then forward from the target of INSN
2813 to find a BARRIER at the same loop depth as the target.
2814 If we find such a BARRIER, we make a new label for the start
2815 of the block, invert the jump in P and point it to that label,
2816 and move the block of code to the spot we found. */
2819 && GET_CODE (p) == JUMP_INSN
2820 && JUMP_LABEL (p) != 0
2821 /* Just ignore jumps to labels that were never emitted.
2822 These always indicate compilation errors. */
2823 && INSN_UID (JUMP_LABEL (p)) != 0
2825 && ! simplejump_p (p)
2826 && next_real_insn (JUMP_LABEL (p)) == our_next
2827 /* If it's not safe to move the sequence, then we
2829 && insns_safe_to_move_p (p, NEXT_INSN (insn),
2830 &last_insn_to_move))
2833 = JUMP_LABEL (insn) ? JUMP_LABEL (insn) : get_last_insn ();
2834 struct loop *target_loop = uid_loop[INSN_UID (target)];
2837 for (loc = target; loc; loc = PREV_INSN (loc))
2838 if (GET_CODE (loc) == BARRIER
2839 /* Don't move things inside a tablejump. */
2840 && ((loc2 = next_nonnote_insn (loc)) == 0
2841 || GET_CODE (loc2) != CODE_LABEL
2842 || (loc2 = next_nonnote_insn (loc2)) == 0
2843 || GET_CODE (loc2) != JUMP_INSN
2844 || (GET_CODE (PATTERN (loc2)) != ADDR_VEC
2845 && GET_CODE (PATTERN (loc2)) != ADDR_DIFF_VEC))
2846 && uid_loop[INSN_UID (loc)] == target_loop)
2850 for (loc = target; loc; loc = NEXT_INSN (loc))
2851 if (GET_CODE (loc) == BARRIER
2852 /* Don't move things inside a tablejump. */
2853 && ((loc2 = next_nonnote_insn (loc)) == 0
2854 || GET_CODE (loc2) != CODE_LABEL
2855 || (loc2 = next_nonnote_insn (loc2)) == 0
2856 || GET_CODE (loc2) != JUMP_INSN
2857 || (GET_CODE (PATTERN (loc2)) != ADDR_VEC
2858 && GET_CODE (PATTERN (loc2)) != ADDR_DIFF_VEC))
2859 && uid_loop[INSN_UID (loc)] == target_loop)
2864 rtx cond_label = JUMP_LABEL (p);
2865 rtx new_label = get_label_after (p);
2867 /* Ensure our label doesn't go away. */
2868 LABEL_NUSES (cond_label)++;
2870 /* Verify that uid_loop is large enough and that
2872 if (invert_jump (p, new_label))
2876 /* If no suitable BARRIER was found, create a suitable
2877 one before TARGET. Since TARGET is a fall through
2878 path, we'll need to insert an jump around our block
2879 and a add a BARRIER before TARGET.
2881 This creates an extra unconditional jump outside
2882 the loop. However, the benefits of removing rarely
2883 executed instructions from inside the loop usually
2884 outweighs the cost of the extra unconditional jump
2885 outside the loop. */
2890 temp = gen_jump (JUMP_LABEL (insn));
2891 temp = emit_jump_insn_before (temp, target);
2892 JUMP_LABEL (temp) = JUMP_LABEL (insn);
2893 LABEL_NUSES (JUMP_LABEL (insn))++;
2894 loc = emit_barrier_before (target);
2897 /* Include the BARRIER after INSN and copy the
2899 new_label = squeeze_notes (new_label,
2901 reorder_insns (new_label, last_insn_to_move, loc);
2903 /* All those insns are now in TARGET_LOOP. */
2905 q != NEXT_INSN (last_insn_to_move);
2907 uid_loop[INSN_UID (q)] = target_loop;
2909 /* The label jumped to by INSN is no longer a loop exit.
2910 Unless INSN does not have a label (e.g., it is a
2911 RETURN insn), search loop->exit_labels to find
2912 its label_ref, and remove it. Also turn off
2913 LABEL_OUTSIDE_LOOP_P bit. */
2914 if (JUMP_LABEL (insn))
2917 r = this_loop->exit_labels;
2918 r; q = r, r = LABEL_NEXTREF (r))
2919 if (XEXP (r, 0) == JUMP_LABEL (insn))
2921 LABEL_OUTSIDE_LOOP_P (r) = 0;
2923 LABEL_NEXTREF (q) = LABEL_NEXTREF (r);
2925 this_loop->exit_labels = LABEL_NEXTREF (r);
2929 for (loop = this_loop; loop && loop != target_loop;
2933 /* If we didn't find it, then something is
2939 /* P is now a jump outside the loop, so it must be put
2940 in loop->exit_labels, and marked as such.
2941 The easiest way to do this is to just call
2942 mark_loop_jump again for P. */
2943 mark_loop_jump (PATTERN (p), this_loop);
2945 /* If INSN now jumps to the insn after it,
2947 if (JUMP_LABEL (insn) != 0
2948 && (next_real_insn (JUMP_LABEL (insn))
2949 == next_real_insn (insn)))
2953 /* Continue the loop after where the conditional
2954 branch used to jump, since the only branch insn
2955 in the block (if it still remains) is an inter-loop
2956 branch and hence needs no processing. */
2957 insn = NEXT_INSN (cond_label);
2959 if (--LABEL_NUSES (cond_label) == 0)
2960 delete_insn (cond_label);
2962 /* This loop will be continued with NEXT_INSN (insn). */
2963 insn = PREV_INSN (insn);
2970 /* If any label in X jumps to a loop different from LOOP_NUM and any of the
2971 loops it is contained in, mark the target loop invalid.
2973 For speed, we assume that X is part of a pattern of a JUMP_INSN. */
2976 mark_loop_jump (x, loop)
2980 struct loop *dest_loop;
2981 struct loop *outer_loop;
2984 switch (GET_CODE (x))
2997 /* There could be a label reference in here. */
2998 mark_loop_jump (XEXP (x, 0), loop);
3004 mark_loop_jump (XEXP (x, 0), loop);
3005 mark_loop_jump (XEXP (x, 1), loop);
3009 /* This may refer to a LABEL_REF or SYMBOL_REF. */
3010 mark_loop_jump (XEXP (x, 1), loop);
3015 mark_loop_jump (XEXP (x, 0), loop);
3019 dest_loop = uid_loop[INSN_UID (XEXP (x, 0))];
3021 /* Link together all labels that branch outside the loop. This
3022 is used by final_[bg]iv_value and the loop unrolling code. Also
3023 mark this LABEL_REF so we know that this branch should predict
3026 /* A check to make sure the label is not in an inner nested loop,
3027 since this does not count as a loop exit. */
3030 for (outer_loop = dest_loop; outer_loop;
3031 outer_loop = outer_loop->outer)
3032 if (outer_loop == loop)
3038 if (loop && ! outer_loop)
3040 LABEL_OUTSIDE_LOOP_P (x) = 1;
3041 LABEL_NEXTREF (x) = loop->exit_labels;
3042 loop->exit_labels = x;
3044 for (outer_loop = loop;
3045 outer_loop && outer_loop != dest_loop;
3046 outer_loop = outer_loop->outer)
3047 outer_loop->exit_count++;
3050 /* If this is inside a loop, but not in the current loop or one enclosed
3051 by it, it invalidates at least one loop. */
3056 /* We must invalidate every nested loop containing the target of this
3057 label, except those that also contain the jump insn. */
3059 for (; dest_loop; dest_loop = dest_loop->outer)
3061 /* Stop when we reach a loop that also contains the jump insn. */
3062 for (outer_loop = loop; outer_loop; outer_loop = outer_loop->outer)
3063 if (dest_loop == outer_loop)
3066 /* If we get here, we know we need to invalidate a loop. */
3067 if (loop_dump_stream && ! dest_loop->invalid)
3068 fprintf (loop_dump_stream,
3069 "\nLoop at %d ignored due to multiple entry points.\n",
3070 INSN_UID (dest_loop->start));
3072 dest_loop->invalid = 1;
3077 /* If this is not setting pc, ignore. */
3078 if (SET_DEST (x) == pc_rtx)
3079 mark_loop_jump (SET_SRC (x), loop);
3083 mark_loop_jump (XEXP (x, 1), loop);
3084 mark_loop_jump (XEXP (x, 2), loop);
3089 for (i = 0; i < XVECLEN (x, 0); i++)
3090 mark_loop_jump (XVECEXP (x, 0, i), loop);
3094 for (i = 0; i < XVECLEN (x, 1); i++)
3095 mark_loop_jump (XVECEXP (x, 1, i), loop);
3099 /* Strictly speaking this is not a jump into the loop, only a possible
3100 jump out of the loop. However, we have no way to link the destination
3101 of this jump onto the list of exit labels. To be safe we mark this
3102 loop and any containing loops as invalid. */
3105 for (outer_loop = loop; outer_loop; outer_loop = outer_loop->outer)
3107 if (loop_dump_stream && ! outer_loop->invalid)
3108 fprintf (loop_dump_stream,
3109 "\nLoop at %d ignored due to unknown exit jump.\n",
3110 INSN_UID (outer_loop->start));
3111 outer_loop->invalid = 1;
3118 /* Return nonzero if there is a label in the range from
3119 insn INSN to and including the insn whose luid is END
3120 INSN must have an assigned luid (i.e., it must not have
3121 been previously created by loop.c). */
3124 labels_in_range_p (insn, end)
3128 while (insn && INSN_LUID (insn) <= end)
3130 if (GET_CODE (insn) == CODE_LABEL)
3132 insn = NEXT_INSN (insn);
3138 /* Record that a memory reference X is being set. */
3141 note_addr_stored (x, y, data)
3143 rtx y ATTRIBUTE_UNUSED;
3144 void *data ATTRIBUTE_UNUSED;
3146 if (x == 0 || GET_CODE (x) != MEM)
3149 /* Count number of memory writes.
3150 This affects heuristics in strength_reduce. */
3153 /* BLKmode MEM means all memory is clobbered. */
3154 if (GET_MODE (x) == BLKmode)
3156 if (RTX_UNCHANGING_P (x))
3157 unknown_constant_address_altered = 1;
3159 unknown_address_altered = 1;
3164 loop_store_mems = gen_rtx_EXPR_LIST (VOIDmode, x, loop_store_mems);
3167 /* X is a value modified by an INSN that references a biv inside a loop
3168 exit test (ie, X is somehow related to the value of the biv). If X
3169 is a pseudo that is used more than once, then the biv is (effectively)
3170 used more than once. DATA is really an `int *', and is set if the
3171 biv is used more than once. */
3174 note_set_pseudo_multiple_uses (x, y, data)
3176 rtx y ATTRIBUTE_UNUSED;
3182 while (GET_CODE (x) == STRICT_LOW_PART
3183 || GET_CODE (x) == SIGN_EXTRACT
3184 || GET_CODE (x) == ZERO_EXTRACT
3185 || GET_CODE (x) == SUBREG)
3188 if (GET_CODE (x) != REG || REGNO (x) < FIRST_PSEUDO_REGISTER)
3191 /* If we do not have usage information, or if we know the register
3192 is used more than once, note that fact for check_dbra_loop. */
3193 if (REGNO (x) >= max_reg_before_loop
3194 || ! VARRAY_RTX (reg_single_usage, REGNO (x))
3195 || VARRAY_RTX (reg_single_usage, REGNO (x)) == const0_rtx)
3196 *((int *) data) = 1;
3199 /* Return nonzero if the rtx X is invariant over the current loop.
3201 The value is 2 if we refer to something only conditionally invariant.
3203 If `unknown_address_altered' is nonzero, no memory ref is invariant.
3204 Otherwise, a memory ref is invariant if it does not conflict with
3205 anything stored in `loop_store_mems'. */
3208 loop_invariant_p (loop, x)
3209 const struct loop *loop;
3213 register enum rtx_code code;
3214 register const char *fmt;
3215 int conditional = 0;
3220 code = GET_CODE (x);
3230 /* A LABEL_REF is normally invariant, however, if we are unrolling
3231 loops, and this label is inside the loop, then it isn't invariant.
3232 This is because each unrolled copy of the loop body will have
3233 a copy of this label. If this was invariant, then an insn loading
3234 the address of this label into a register might get moved outside
3235 the loop, and then each loop body would end up using the same label.
3237 We don't know the loop bounds here though, so just fail for all
3239 if (flag_unroll_loops)
3246 case UNSPEC_VOLATILE:
3250 /* We used to check RTX_UNCHANGING_P (x) here, but that is invalid
3251 since the reg might be set by initialization within the loop. */
3253 if ((x == frame_pointer_rtx || x == hard_frame_pointer_rtx
3254 || x == arg_pointer_rtx)
3255 && ! current_function_has_nonlocal_goto)
3258 if (LOOP_INFO (loop)->has_call
3259 && REGNO (x) < FIRST_PSEUDO_REGISTER && call_used_regs[REGNO (x)])
3262 if (VARRAY_INT (set_in_loop, REGNO (x)) < 0)
3265 return VARRAY_INT (set_in_loop, REGNO (x)) == 0;
3268 /* Volatile memory references must be rejected. Do this before
3269 checking for read-only items, so that volatile read-only items
3270 will be rejected also. */
3271 if (MEM_VOLATILE_P (x))
3274 /* If we had a subroutine call, any location in memory could
3275 have been clobbered. We used to test here for volatile and
3276 readonly, but true_dependence knows how to do that better
3278 if (RTX_UNCHANGING_P (x)
3279 ? unknown_constant_address_altered : unknown_address_altered)
3282 /* See if there is any dependence between a store and this load. */
3283 mem_list_entry = loop_store_mems;
3284 while (mem_list_entry)
3286 if (true_dependence (XEXP (mem_list_entry, 0), VOIDmode,
3290 mem_list_entry = XEXP (mem_list_entry, 1);
3293 /* It's not invalidated by a store in memory
3294 but we must still verify the address is invariant. */
3298 /* Don't mess with insns declared volatile. */
3299 if (MEM_VOLATILE_P (x))
3307 fmt = GET_RTX_FORMAT (code);
3308 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3312 int tem = loop_invariant_p (loop, XEXP (x, i));
3318 else if (fmt[i] == 'E')
3321 for (j = 0; j < XVECLEN (x, i); j++)
3323 int tem = loop_invariant_p (loop, XVECEXP (x, i, j));
3333 return 1 + conditional;
3337 /* Return nonzero if all the insns in the loop that set REG
3338 are INSN and the immediately following insns,
3339 and if each of those insns sets REG in an invariant way
3340 (not counting uses of REG in them).
3342 The value is 2 if some of these insns are only conditionally invariant.
3344 We assume that INSN itself is the first set of REG
3345 and that its source is invariant. */
3348 consec_sets_invariant_p (loop, reg, n_sets, insn)
3349 const struct loop *loop;
3354 unsigned int regno = REGNO (reg);
3356 /* Number of sets we have to insist on finding after INSN. */
3357 int count = n_sets - 1;
3358 int old = VARRAY_INT (set_in_loop, regno);
3362 /* If N_SETS hit the limit, we can't rely on its value. */
3366 VARRAY_INT (set_in_loop, regno) = 0;
3370 register enum rtx_code code;
3374 code = GET_CODE (p);
3376 /* If library call, skip to end of it. */
3377 if (code == INSN && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
3382 && (set = single_set (p))
3383 && GET_CODE (SET_DEST (set)) == REG
3384 && REGNO (SET_DEST (set)) == regno)
3386 this = loop_invariant_p (loop, SET_SRC (set));
3389 else if ((temp = find_reg_note (p, REG_EQUAL, NULL_RTX)))
3391 /* If this is a libcall, then any invariant REG_EQUAL note is OK.
3392 If this is an ordinary insn, then only CONSTANT_P REG_EQUAL
3394 this = (CONSTANT_P (XEXP (temp, 0))
3395 || (find_reg_note (p, REG_RETVAL, NULL_RTX)
3396 && loop_invariant_p (loop, XEXP (temp, 0))));
3403 else if (code != NOTE)
3405 VARRAY_INT (set_in_loop, regno) = old;
3410 VARRAY_INT (set_in_loop, regno) = old;
3411 /* If loop_invariant_p ever returned 2, we return 2. */
3412 return 1 + (value & 2);
3416 /* I don't think this condition is sufficient to allow INSN
3417 to be moved, so we no longer test it. */
3419 /* Return 1 if all insns in the basic block of INSN and following INSN
3420 that set REG are invariant according to TABLE. */
3423 all_sets_invariant_p (reg, insn, table)
3427 register rtx p = insn;
3428 register int regno = REGNO (reg);
3432 register enum rtx_code code;
3434 code = GET_CODE (p);
3435 if (code == CODE_LABEL || code == JUMP_INSN)
3437 if (code == INSN && GET_CODE (PATTERN (p)) == SET
3438 && GET_CODE (SET_DEST (PATTERN (p))) == REG
3439 && REGNO (SET_DEST (PATTERN (p))) == regno)
3441 if (! loop_invariant_p (loop, SET_SRC (PATTERN (p)), table))
3448 /* Look at all uses (not sets) of registers in X. For each, if it is
3449 the single use, set USAGE[REGNO] to INSN; if there was a previous use in
3450 a different insn, set USAGE[REGNO] to const0_rtx. */
3453 find_single_use_in_loop (insn, x, usage)
3458 enum rtx_code code = GET_CODE (x);
3459 const char *fmt = GET_RTX_FORMAT (code);
3463 VARRAY_RTX (usage, REGNO (x))
3464 = (VARRAY_RTX (usage, REGNO (x)) != 0
3465 && VARRAY_RTX (usage, REGNO (x)) != insn)
3466 ? const0_rtx : insn;
3468 else if (code == SET)
3470 /* Don't count SET_DEST if it is a REG; otherwise count things
3471 in SET_DEST because if a register is partially modified, it won't
3472 show up as a potential movable so we don't care how USAGE is set
3474 if (GET_CODE (SET_DEST (x)) != REG)
3475 find_single_use_in_loop (insn, SET_DEST (x), usage);
3476 find_single_use_in_loop (insn, SET_SRC (x), usage);
3479 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3481 if (fmt[i] == 'e' && XEXP (x, i) != 0)
3482 find_single_use_in_loop (insn, XEXP (x, i), usage);
3483 else if (fmt[i] == 'E')
3484 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3485 find_single_use_in_loop (insn, XVECEXP (x, i, j), usage);
3489 /* Count and record any set in X which is contained in INSN. Update
3490 MAY_NOT_MOVE and LAST_SET for any register set in X. */
3493 count_one_set (insn, x, may_not_move, last_set)
3495 varray_type may_not_move;
3498 if (GET_CODE (x) == CLOBBER && GET_CODE (XEXP (x, 0)) == REG)
3499 /* Don't move a reg that has an explicit clobber.
3500 It's not worth the pain to try to do it correctly. */
3501 VARRAY_CHAR (may_not_move, REGNO (XEXP (x, 0))) = 1;
3503 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
3505 rtx dest = SET_DEST (x);
3506 while (GET_CODE (dest) == SUBREG
3507 || GET_CODE (dest) == ZERO_EXTRACT
3508 || GET_CODE (dest) == SIGN_EXTRACT
3509 || GET_CODE (dest) == STRICT_LOW_PART)
3510 dest = XEXP (dest, 0);
3511 if (GET_CODE (dest) == REG)
3513 register int regno = REGNO (dest);
3514 /* If this is the first setting of this reg
3515 in current basic block, and it was set before,
3516 it must be set in two basic blocks, so it cannot
3517 be moved out of the loop. */
3518 if (VARRAY_INT (set_in_loop, regno) > 0
3519 && last_set[regno] == 0)
3520 VARRAY_CHAR (may_not_move, regno) = 1;
3521 /* If this is not first setting in current basic block,
3522 see if reg was used in between previous one and this.
3523 If so, neither one can be moved. */
3524 if (last_set[regno] != 0
3525 && reg_used_between_p (dest, last_set[regno], insn))
3526 VARRAY_CHAR (may_not_move, regno) = 1;
3527 if (VARRAY_INT (set_in_loop, regno) < 127)
3528 ++VARRAY_INT (set_in_loop, regno);
3529 last_set[regno] = insn;
3534 /* Increment SET_IN_LOOP at the index of each register
3535 that is modified by an insn between FROM and TO.
3536 If the value of an element of SET_IN_LOOP becomes 127 or more,
3537 stop incrementing it, to avoid overflow.
3539 Store in SINGLE_USAGE[I] the single insn in which register I is
3540 used, if it is only used once. Otherwise, it is set to 0 (for no
3541 uses) or const0_rtx for more than one use. This parameter may be zero,
3542 in which case this processing is not done.
3544 Store in *COUNT_PTR the number of actual instruction
3545 in the loop. We use this to decide what is worth moving out. */
3547 /* last_set[n] is nonzero iff reg n has been set in the current basic block.
3548 In that case, it is the insn that last set reg n. */
3551 count_loop_regs_set (from, to, may_not_move, single_usage, count_ptr, nregs)
3552 register rtx from, to;
3553 varray_type may_not_move;
3554 varray_type single_usage;
3558 register rtx *last_set = (rtx *) xcalloc (nregs, sizeof (rtx));
3560 register int count = 0;
3562 for (insn = from; insn != to; insn = NEXT_INSN (insn))
3564 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
3568 /* Record registers that have exactly one use. */
3569 find_single_use_in_loop (insn, PATTERN (insn), single_usage);
3571 /* Include uses in REG_EQUAL notes. */
3572 if (REG_NOTES (insn))
3573 find_single_use_in_loop (insn, REG_NOTES (insn), single_usage);
3575 if (GET_CODE (PATTERN (insn)) == SET
3576 || GET_CODE (PATTERN (insn)) == CLOBBER)
3577 count_one_set (insn, PATTERN (insn), may_not_move, last_set);
3578 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
3581 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
3582 count_one_set (insn, XVECEXP (PATTERN (insn), 0, i),
3583 may_not_move, last_set);
3587 if (GET_CODE (insn) == CODE_LABEL || GET_CODE (insn) == JUMP_INSN)
3588 bzero ((char *) last_set, nregs * sizeof (rtx));
3596 /* Given a loop that is bounded by LOOP->START and LOOP->END and that
3597 is entered at LOOP->SCAN_START, return 1 if the register set in SET
3598 contained in insn INSN is used by any insn that precedes INSN in
3599 cyclic order starting from the loop entry point.
3601 We don't want to use INSN_LUID here because if we restrict INSN to those
3602 that have a valid INSN_LUID, it means we cannot move an invariant out
3603 from an inner loop past two loops. */
3606 loop_reg_used_before_p (loop, set, insn)
3607 const struct loop *loop;
3610 rtx reg = SET_DEST (set);
3613 /* Scan forward checking for register usage. If we hit INSN, we
3614 are done. Otherwise, if we hit LOOP->END, wrap around to LOOP->START. */
3615 for (p = loop->scan_start; p != insn; p = NEXT_INSN (p))
3617 if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
3618 && reg_overlap_mentioned_p (reg, PATTERN (p)))
3628 /* A "basic induction variable" or biv is a pseudo reg that is set
3629 (within this loop) only by incrementing or decrementing it. */
3630 /* A "general induction variable" or giv is a pseudo reg whose
3631 value is a linear function of a biv. */
3633 /* Bivs are recognized by `basic_induction_var';
3634 Givs by `general_induction_var'. */
3636 /* Indexed by register number, indicates whether or not register is an
3637 induction variable, and if so what type. */
3639 varray_type reg_iv_type;
3641 /* Indexed by register number, contains pointer to `struct induction'
3642 if register is an induction variable. This holds general info for
3643 all induction variables. */
3645 varray_type reg_iv_info;
3647 /* Indexed by register number, contains pointer to `struct iv_class'
3648 if register is a basic induction variable. This holds info describing
3649 the class (a related group) of induction variables that the biv belongs
3652 struct iv_class **reg_biv_class;
3654 /* The head of a list which links together (via the next field)
3655 every iv class for the current loop. */
3657 struct iv_class *loop_iv_list;
3659 /* Givs made from biv increments are always splittable for loop unrolling.
3660 Since there is no regscan info for them, we have to keep track of them
3662 unsigned int first_increment_giv, last_increment_giv;
3664 /* Communication with routines called via `note_stores'. */
3666 static rtx note_insn;
3668 /* Dummy register to have non-zero DEST_REG for DEST_ADDR type givs. */
3670 static rtx addr_placeholder;
3672 /* ??? Unfinished optimizations, and possible future optimizations,
3673 for the strength reduction code. */
3675 /* ??? The interaction of biv elimination, and recognition of 'constant'
3676 bivs, may cause problems. */
3678 /* ??? Add heuristics so that DEST_ADDR strength reduction does not cause
3679 performance problems.
3681 Perhaps don't eliminate things that can be combined with an addressing
3682 mode. Find all givs that have the same biv, mult_val, and add_val;
3683 then for each giv, check to see if its only use dies in a following
3684 memory address. If so, generate a new memory address and check to see
3685 if it is valid. If it is valid, then store the modified memory address,
3686 otherwise, mark the giv as not done so that it will get its own iv. */
3688 /* ??? Could try to optimize branches when it is known that a biv is always
3691 /* ??? When replace a biv in a compare insn, we should replace with closest
3692 giv so that an optimized branch can still be recognized by the combiner,
3693 e.g. the VAX acb insn. */
3695 /* ??? Many of the checks involving uid_luid could be simplified if regscan
3696 was rerun in loop_optimize whenever a register was added or moved.
3697 Also, some of the optimizations could be a little less conservative. */
3699 /* Scan the loop body and call FNCALL for each insn. In the addition to the
3700 LOOP and INSN parameters pass MAYBE_MULTIPLE and NOT_EVERY_ITERATION to the
3703 NOT_EVERY_ITERATION if current insn is not executed at least once for every
3704 loop iteration except for the last one.
3706 MAYBE_MULTIPLE is 1 if current insn may be executed more than once for every
3710 for_each_insn_in_loop (loop, fncall)
3712 loop_insn_callback fncall;
3714 /* This is 1 if current insn is not executed at least once for every loop
3716 int not_every_iteration = 0;
3717 int maybe_multiple = 0;
3718 int past_loop_latch = 0;
3722 /* If loop_scan_start points to the loop exit test, we have to be wary of
3723 subversive use of gotos inside expression statements. */
3724 if (prev_nonnote_insn (loop->scan_start) != prev_nonnote_insn (loop->start))
3725 maybe_multiple = back_branch_in_range_p (loop, loop->scan_start);
3727 /* Scan through loop to find all possible bivs. */
3729 for (p = next_insn_in_loop (loop, loop->scan_start);
3731 p = next_insn_in_loop (loop, p))
3733 fncall (loop, p, maybe_multiple, not_every_iteration);
3735 /* Past CODE_LABEL, we get to insns that may be executed multiple
3736 times. The only way we can be sure that they can't is if every
3737 jump insn between here and the end of the loop either
3738 returns, exits the loop, is a jump to a location that is still
3739 behind the label, or is a jump to the loop start. */
3741 if (GET_CODE (p) == CODE_LABEL)
3749 insn = NEXT_INSN (insn);
3750 if (insn == loop->scan_start)
3752 if (insn == loop->end)
3758 if (insn == loop->scan_start)
3762 if (GET_CODE (insn) == JUMP_INSN
3763 && GET_CODE (PATTERN (insn)) != RETURN
3764 && (!condjump_p (insn)
3765 || (JUMP_LABEL (insn) != 0
3766 && JUMP_LABEL (insn) != loop->scan_start
3767 && !loop_insn_first_p (p, JUMP_LABEL (insn)))))
3775 /* Past a jump, we get to insns for which we can't count
3776 on whether they will be executed during each iteration. */
3777 /* This code appears twice in strength_reduce. There is also similar
3778 code in scan_loop. */
3779 if (GET_CODE (p) == JUMP_INSN
3780 /* If we enter the loop in the middle, and scan around to the
3781 beginning, don't set not_every_iteration for that.
3782 This can be any kind of jump, since we want to know if insns
3783 will be executed if the loop is executed. */
3784 && !(JUMP_LABEL (p) == loop->top
3785 && ((NEXT_INSN (NEXT_INSN (p)) == loop->end && simplejump_p (p))
3786 || (NEXT_INSN (p) == loop->end && condjump_p (p)))))
3790 /* If this is a jump outside the loop, then it also doesn't
3791 matter. Check to see if the target of this branch is on the
3792 loop->exits_labels list. */
3794 for (label = loop->exit_labels; label; label = LABEL_NEXTREF (label))
3795 if (XEXP (label, 0) == JUMP_LABEL (p))
3799 not_every_iteration = 1;
3802 else if (GET_CODE (p) == NOTE)
3804 /* At the virtual top of a converted loop, insns are again known to
3805 be executed each iteration: logically, the loop begins here
3806 even though the exit code has been duplicated.
3808 Insns are also again known to be executed each iteration at
3809 the LOOP_CONT note. */
3810 if ((NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP
3811 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_CONT)
3813 not_every_iteration = 0;
3814 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
3816 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
3820 /* Note if we pass a loop latch. If we do, then we can not clear
3821 NOT_EVERY_ITERATION below when we pass the last CODE_LABEL in
3822 a loop since a jump before the last CODE_LABEL may have started
3823 a new loop iteration.
3825 Note that LOOP_TOP is only set for rotated loops and we need
3826 this check for all loops, so compare against the CODE_LABEL
3827 which immediately follows LOOP_START. */
3828 if (GET_CODE (p) == JUMP_INSN
3829 && JUMP_LABEL (p) == NEXT_INSN (loop->start))
3830 past_loop_latch = 1;
3832 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
3833 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
3834 or not an insn is known to be executed each iteration of the
3835 loop, whether or not any iterations are known to occur.
3837 Therefore, if we have just passed a label and have no more labels
3838 between here and the test insn of the loop, and we have not passed
3839 a jump to the top of the loop, then we know these insns will be
3840 executed each iteration. */
3842 if (not_every_iteration
3844 && GET_CODE (p) == CODE_LABEL
3845 && no_labels_between_p (p, loop->end)
3846 && loop_insn_first_p (p, loop->cont))
3847 not_every_iteration = 0;
3851 /* Perform strength reduction and induction variable elimination.
3853 Pseudo registers created during this function will be beyond the last
3854 valid index in several tables including n_times_set and regno_last_uid.
3855 This does not cause a problem here, because the added registers cannot be
3856 givs outside of their loop, and hence will never be reconsidered.
3857 But scan_loop must check regnos to make sure they are in bounds. */
3860 strength_reduce (loop, insn_count, unroll_p, bct_p)
3863 int unroll_p, bct_p ATTRIBUTE_UNUSED;
3866 /* Temporary list pointers for traversing loop_iv_list. */
3867 struct iv_class *bl, **backbl;
3868 struct loop_info *loop_info = LOOP_INFO (loop);
3869 /* Ratio of extra register life span we can justify
3870 for saving an instruction. More if loop doesn't call subroutines
3871 since in that case saving an insn makes more difference
3872 and more registers are available. */
3873 /* ??? could set this to last value of threshold in move_movables */
3874 int threshold = (loop_info->has_call ? 1 : 2) * (3 + n_non_fixed_regs);
3875 /* Map of pseudo-register replacements. */
3876 rtx *reg_map = NULL;
3880 rtx end_insert_before;
3881 int n_extra_increment;
3882 int unrolled_insn_copies = 0;
3883 rtx loop_start = loop->start;
3884 rtx loop_end = loop->end;
3885 rtx loop_scan_start = loop->scan_start;
3887 VARRAY_INT_INIT (reg_iv_type, max_reg_before_loop, "reg_iv_type");
3888 VARRAY_GENERIC_PTR_INIT (reg_iv_info, max_reg_before_loop, "reg_iv_info");
3889 reg_biv_class = (struct iv_class **)
3890 xcalloc (max_reg_before_loop, sizeof (struct iv_class *));
3893 addr_placeholder = gen_reg_rtx (Pmode);
3895 /* Save insn immediately after the loop_end. Insns inserted after loop_end
3896 must be put before this insn, so that they will appear in the right
3897 order (i.e. loop order).
3899 If loop_end is the end of the current function, then emit a
3900 NOTE_INSN_DELETED after loop_end and set end_insert_before to the
3902 if (NEXT_INSN (loop_end) != 0)
3903 end_insert_before = NEXT_INSN (loop_end);
3905 end_insert_before = emit_note_after (NOTE_INSN_DELETED, loop_end);
3907 for_each_insn_in_loop (loop, check_insn_for_bivs);
3909 /* Scan loop_iv_list to remove all regs that proved not to be bivs.
3910 Make a sanity check against n_times_set. */
3911 for (backbl = &loop_iv_list, bl = *backbl; bl; bl = bl->next)
3915 if (REG_IV_TYPE (bl->regno) != BASIC_INDUCT
3916 /* Above happens if register modified by subreg, etc. */
3917 /* Make sure it is not recognized as a basic induction var: */
3918 || VARRAY_INT (n_times_set, bl->regno) != bl->biv_count
3919 /* If never incremented, it is invariant that we decided not to
3920 move. So leave it alone. */
3921 || ! bl->incremented)
3923 else if (bl->biv_count > 1)
3925 /* ??? If we have multiple increments for this BIV, and any of
3926 them take multiple insns to perform the increment, drop the
3927 BIV, since the bit below that converts the extra increments
3928 into GIVs can't handle the multiple insn increment. */
3930 struct induction *v;
3931 for (v = bl->biv; v ; v = v->next_iv)
3932 if (v->multi_insn_incr)
3938 if (loop_dump_stream)
3939 fprintf (loop_dump_stream, "Reg %d: biv discarded, %s\n",
3941 (REG_IV_TYPE (bl->regno) != BASIC_INDUCT
3942 ? "not induction variable"
3943 : (! bl->incremented ? "never incremented"
3946 REG_IV_TYPE (bl->regno) = NOT_BASIC_INDUCT;
3953 if (loop_dump_stream)
3954 fprintf (loop_dump_stream, "Reg %d: biv verified\n", bl->regno);
3958 /* Exit if there are no bivs. */
3961 /* Can still unroll the loop anyways, but indicate that there is no
3962 strength reduction info available. */
3964 unroll_loop (loop, insn_count, end_insert_before, 0);
3969 /* Find initial value for each biv by searching backwards from loop_start,
3970 halting at first label. Also record any test condition. */
3973 for (p = loop_start; p && GET_CODE (p) != CODE_LABEL; p = PREV_INSN (p))
3977 if (GET_CODE (p) == CALL_INSN)
3980 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
3981 || GET_CODE (p) == CALL_INSN)
3982 note_stores (PATTERN (p), record_initial, NULL);
3984 /* Record any test of a biv that branches around the loop if no store
3985 between it and the start of loop. We only care about tests with
3986 constants and registers and only certain of those. */
3987 if (GET_CODE (p) == JUMP_INSN
3988 && JUMP_LABEL (p) != 0
3989 && next_real_insn (JUMP_LABEL (p)) == next_real_insn (loop_end)
3990 && (test = get_condition_for_loop (loop, p)) != 0
3991 && GET_CODE (XEXP (test, 0)) == REG
3992 && REGNO (XEXP (test, 0)) < max_reg_before_loop
3993 && (bl = reg_biv_class[REGNO (XEXP (test, 0))]) != 0
3994 && valid_initial_value_p (XEXP (test, 1), p, call_seen, loop_start)
3995 && bl->init_insn == 0)
3997 /* If an NE test, we have an initial value! */
3998 if (GET_CODE (test) == NE)
4001 bl->init_set = gen_rtx_SET (VOIDmode,
4002 XEXP (test, 0), XEXP (test, 1));
4005 bl->initial_test = test;
4009 /* Look at the each biv and see if we can say anything better about its
4010 initial value from any initializing insns set up above. (This is done
4011 in two passes to avoid missing SETs in a PARALLEL.) */
4012 for (backbl = &loop_iv_list; (bl = *backbl); backbl = &bl->next)
4017 if (! bl->init_insn)
4020 /* IF INIT_INSN has a REG_EQUAL or REG_EQUIV note and the value
4021 is a constant, use the value of that. */
4022 if (((note = find_reg_note (bl->init_insn, REG_EQUAL, 0)) != NULL
4023 && CONSTANT_P (XEXP (note, 0)))
4024 || ((note = find_reg_note (bl->init_insn, REG_EQUIV, 0)) != NULL
4025 && CONSTANT_P (XEXP (note, 0))))
4026 src = XEXP (note, 0);
4028 src = SET_SRC (bl->init_set);
4030 if (loop_dump_stream)
4031 fprintf (loop_dump_stream,
4032 "Biv %d initialized at insn %d: initial value ",
4033 bl->regno, INSN_UID (bl->init_insn));
4035 if ((GET_MODE (src) == GET_MODE (regno_reg_rtx[bl->regno])
4036 || GET_MODE (src) == VOIDmode)
4037 && valid_initial_value_p (src, bl->init_insn, call_seen, loop_start))
4039 bl->initial_value = src;
4041 if (loop_dump_stream)
4043 if (GET_CODE (src) == CONST_INT)
4045 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, INTVAL (src));
4046 fputc ('\n', loop_dump_stream);
4050 print_rtl (loop_dump_stream, src);
4051 fprintf (loop_dump_stream, "\n");
4057 struct iv_class *bl2 = 0;
4058 rtx increment = NULL_RTX;
4060 /* Biv initial value is not a simple move. If it is the sum of
4061 another biv and a constant, check if both bivs are incremented
4062 in lockstep. Then we are actually looking at a giv.
4063 For simplicity, we only handle the case where there is but a
4064 single increment, and the register is not used elsewhere. */
4065 if (bl->biv_count == 1
4066 && bl->regno < max_reg_before_loop
4067 && uid_luid[REGNO_LAST_UID (bl->regno)] < INSN_LUID (loop_end)
4068 && GET_CODE (src) == PLUS
4069 && GET_CODE (XEXP (src, 0)) == REG
4070 && CONSTANT_P (XEXP (src, 1))
4071 && ((increment = biv_total_increment (bl)) != NULL_RTX))
4073 unsigned int regno = REGNO (XEXP (src, 0));
4075 for (bl2 = loop_iv_list; bl2; bl2 = bl2->next)
4076 if (bl2->regno == regno)
4080 /* Now, can we transform this biv into a giv? */
4082 && bl2->biv_count == 1
4083 && rtx_equal_p (increment, biv_total_increment (bl2))
4084 /* init_insn is only set to insns that are before loop_start
4085 without any intervening labels. */
4086 && ! reg_set_between_p (bl2->biv->src_reg,
4087 PREV_INSN (bl->init_insn), loop_start)
4088 /* The register from BL2 must be set before the register from
4089 BL is set, or we must be able to move the latter set after
4090 the former set. Currently there can't be any labels
4091 in-between when biv_total_increment returns nonzero both times
4092 but we test it here in case some day some real cfg analysis
4093 gets used to set always_computable. */
4094 && (loop_insn_first_p (bl2->biv->insn, bl->biv->insn)
4095 ? no_labels_between_p (bl2->biv->insn, bl->biv->insn)
4096 : (! reg_used_between_p (bl->biv->src_reg, bl->biv->insn,
4098 && no_jumps_between_p (bl->biv->insn, bl2->biv->insn)))
4099 && validate_change (bl->biv->insn,
4100 &SET_SRC (single_set (bl->biv->insn)),
4103 rtx dominator = loop->cont_dominator;
4104 rtx giv = bl->biv->src_reg;
4105 rtx giv_insn = bl->biv->insn;
4106 rtx after_giv = NEXT_INSN (giv_insn);
4108 if (loop_dump_stream)
4109 fprintf (loop_dump_stream, "is giv of biv %d\n", bl2->regno);
4110 /* Let this giv be discovered by the generic code. */
4111 REG_IV_TYPE (bl->regno) = UNKNOWN_INDUCT;
4112 reg_biv_class[bl->regno] = (struct iv_class *) NULL_PTR;
4113 /* We can get better optimization if we can move the giv setting
4114 before the first giv use. */
4116 && ! loop_insn_first_p (dominator, loop_scan_start)
4117 && ! reg_set_between_p (bl2->biv->src_reg, loop_start,
4119 && ! reg_used_between_p (giv, loop_start, dominator)
4120 && ! reg_used_between_p (giv, giv_insn, loop_end))
4125 for (next = NEXT_INSN (dominator); ; next = NEXT_INSN (next))
4127 if ((GET_RTX_CLASS (GET_CODE (next)) == 'i'
4128 && (reg_mentioned_p (giv, PATTERN (next))
4129 || reg_set_p (bl2->biv->src_reg, next)))
4130 || GET_CODE (next) == JUMP_INSN)
4133 if (GET_RTX_CLASS (GET_CODE (next)) != 'i'
4134 || ! sets_cc0_p (PATTERN (next)))
4138 if (loop_dump_stream)
4139 fprintf (loop_dump_stream, "move after insn %d\n",
4140 INSN_UID (dominator));
4141 /* Avoid problems with luids by actually moving the insn
4142 and adjusting all luids in the range. */
4143 reorder_insns (giv_insn, giv_insn, dominator);
4144 for (p = dominator; INSN_UID (p) >= max_uid_for_loop; )
4146 compute_luids (giv_insn, after_giv, INSN_LUID (p));
4147 /* If the only purpose of the init insn is to initialize
4148 this giv, delete it. */
4149 if (single_set (bl->init_insn)
4150 && ! reg_used_between_p (giv, bl->init_insn, loop_start))
4151 delete_insn (bl->init_insn);
4153 else if (! loop_insn_first_p (bl2->biv->insn, bl->biv->insn))
4155 rtx p = PREV_INSN (giv_insn);
4156 while (INSN_UID (p) >= max_uid_for_loop)
4158 reorder_insns (giv_insn, giv_insn, bl2->biv->insn);
4159 compute_luids (after_giv, NEXT_INSN (giv_insn),
4162 /* Remove this biv from the chain. */
4165 /* We move the following giv from *bl->next into *bl.
4166 We have to update reg_biv_class for that moved biv
4167 to point to its new address. */
4169 reg_biv_class[bl->regno] = bl;
4178 /* If we can't make it a giv,
4179 let biv keep initial value of "itself". */
4180 else if (loop_dump_stream)
4181 fprintf (loop_dump_stream, "is complex\n");
4185 /* If a biv is unconditionally incremented several times in a row, convert
4186 all but the last increment into a giv. */
4188 /* Get an upper bound for the number of registers
4189 we might have after all bivs have been processed. */
4190 first_increment_giv = max_reg_num ();
4191 for (n_extra_increment = 0, bl = loop_iv_list; bl; bl = bl->next)
4192 n_extra_increment += bl->biv_count - 1;
4194 /* If the loop contains volatile memory references do not allow any
4195 replacements to take place, since this could loose the volatile
4197 if (n_extra_increment && ! loop_info->has_volatile)
4199 unsigned int nregs = first_increment_giv + n_extra_increment;
4201 /* Reallocate reg_iv_type and reg_iv_info. */
4202 VARRAY_GROW (reg_iv_type, nregs);
4203 VARRAY_GROW (reg_iv_info, nregs);
4205 for (bl = loop_iv_list; bl; bl = bl->next)
4207 struct induction **vp, *v, *next;
4208 int biv_dead_after_loop = 0;
4210 /* The biv increments lists are in reverse order. Fix this
4212 for (v = bl->biv, bl->biv = 0; v; v = next)
4215 v->next_iv = bl->biv;
4219 /* We must guard against the case that an early exit between v->insn
4220 and next->insn leaves the biv live after the loop, since that
4221 would mean that we'd be missing an increment for the final
4222 value. The following test to set biv_dead_after_loop is like
4223 the first part of the test to set bl->eliminable.
4224 We don't check here if we can calculate the final value, since
4225 this can't succeed if we already know that there is a jump
4226 between v->insn and next->insn, yet next->always_executed is
4227 set and next->maybe_multiple is cleared. Such a combination
4228 implies that the jump destination is outside the loop.
4229 If we want to make this check more sophisticated, we should
4230 check each branch between v->insn and next->insn individually
4231 to see if the biv is dead at its destination. */
4233 if (uid_luid[REGNO_LAST_UID (bl->regno)] < INSN_LUID (loop_end)
4235 && INSN_UID (bl->init_insn) < max_uid_for_loop
4236 && (uid_luid[REGNO_FIRST_UID (bl->regno)]
4237 >= INSN_LUID (bl->init_insn))
4238 #ifdef HAVE_decrement_and_branch_until_zero
4241 && ! reg_mentioned_p (bl->biv->dest_reg, SET_SRC (bl->init_set)))
4242 biv_dead_after_loop = 1;
4244 for (vp = &bl->biv, next = *vp; v = next, next = v->next_iv;)
4246 HOST_WIDE_INT offset;
4247 rtx set, add_val, old_reg, dest_reg, last_use_insn, note;
4248 int old_regno, new_regno;
4250 if (! v->always_executed
4251 || v->maybe_multiple
4252 || GET_CODE (v->add_val) != CONST_INT
4253 || ! next->always_executed
4254 || next->maybe_multiple
4255 || ! CONSTANT_P (next->add_val)
4256 || v->mult_val != const1_rtx
4257 || next->mult_val != const1_rtx
4258 || ! (biv_dead_after_loop
4259 || no_jumps_between_p (v->insn, next->insn)))
4264 offset = INTVAL (v->add_val);
4265 set = single_set (v->insn);
4266 add_val = plus_constant (next->add_val, offset);
4267 old_reg = v->dest_reg;
4268 dest_reg = gen_reg_rtx (v->mode);
4270 /* Unlike reg_iv_type / reg_iv_info, the other three arrays
4271 have been allocated with some slop space, so we may not
4272 actually need to reallocate them. If we do, the following
4273 if statement will be executed just once in this loop. */
4274 if ((unsigned) max_reg_num () > n_times_set->num_elements)
4276 /* Grow all the remaining arrays. */
4277 VARRAY_GROW (set_in_loop, nregs);
4278 VARRAY_GROW (n_times_set, nregs);
4279 VARRAY_GROW (may_not_optimize, nregs);
4280 VARRAY_GROW (reg_single_usage, nregs);
4283 if (! validate_change (next->insn, next->location, add_val, 0))
4289 /* Here we can try to eliminate the increment by combining
4290 it into the uses. */
4292 /* Set last_use_insn so that we can check against it. */
4294 for (last_use_insn = v->insn, p = NEXT_INSN (v->insn);
4296 p = next_insn_in_loop (loop, p))
4298 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
4300 if (reg_mentioned_p (old_reg, PATTERN (p)))
4306 /* If we can't get the LUIDs for the insns, we can't
4307 calculate the lifetime. This is likely from unrolling
4308 of an inner loop, so there is little point in making this
4309 a DEST_REG giv anyways. */
4310 if (INSN_UID (v->insn) >= max_uid_for_loop
4311 || INSN_UID (last_use_insn) >= max_uid_for_loop
4312 || ! validate_change (v->insn, &SET_DEST (set), dest_reg, 0))
4314 /* Change the increment at NEXT back to what it was. */
4315 if (! validate_change (next->insn, next->location,
4321 next->add_val = add_val;
4322 v->dest_reg = dest_reg;
4323 v->giv_type = DEST_REG;
4324 v->location = &SET_SRC (set);
4326 v->combined_with = 0;
4328 v->derive_adjustment = 0;
4334 v->auto_inc_opt = 0;
4337 v->derived_from = 0;
4338 v->always_computable = 1;
4339 v->always_executed = 1;
4341 v->no_const_addval = 0;
4343 old_regno = REGNO (old_reg);
4344 new_regno = REGNO (dest_reg);
4345 VARRAY_INT (set_in_loop, old_regno)--;
4346 VARRAY_INT (set_in_loop, new_regno) = 1;
4347 VARRAY_INT (n_times_set, old_regno)--;
4348 VARRAY_INT (n_times_set, new_regno) = 1;
4349 VARRAY_CHAR (may_not_optimize, new_regno) = 0;
4351 REG_IV_TYPE (new_regno) = GENERAL_INDUCT;
4352 REG_IV_INFO (new_regno) = v;
4354 /* If next_insn has a REG_EQUAL note that mentiones OLD_REG,
4355 it must be replaced. */
4356 note = find_reg_note (next->insn, REG_EQUAL, NULL_RTX);
4357 if (note && reg_mentioned_p (old_reg, XEXP (note, 0)))
4358 XEXP (note, 0) = copy_rtx (SET_SRC (single_set (next->insn)));
4360 /* Remove the increment from the list of biv increments,
4361 and record it as a giv. */
4364 v->next_iv = bl->giv;
4367 v->benefit = rtx_cost (SET_SRC (set), SET);
4368 bl->total_benefit += v->benefit;
4370 /* Now replace the biv with DEST_REG in all insns between
4371 the replaced increment and the next increment, and
4372 remember the last insn that needed a replacement. */
4373 for (last_use_insn = v->insn, p = NEXT_INSN (v->insn);
4375 p = next_insn_in_loop (loop, p))
4379 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
4381 if (reg_mentioned_p (old_reg, PATTERN (p)))
4384 if (! validate_replace_rtx (old_reg, dest_reg, p))
4387 for (note = REG_NOTES (p); note; note = XEXP (note, 1))
4389 if (GET_CODE (note) == EXPR_LIST)
4391 = replace_rtx (XEXP (note, 0), old_reg, dest_reg);
4395 v->last_use = last_use_insn;
4396 v->lifetime = INSN_LUID (last_use_insn) - INSN_LUID (v->insn);
4397 /* If the lifetime is zero, it means that this register is really
4398 a dead store. So mark this as a giv that can be ignored.
4399 This will not prevent the biv from being eliminated. */
4400 if (v->lifetime == 0)
4403 if (loop_dump_stream)
4404 fprintf (loop_dump_stream,
4405 "Increment %d of biv %d converted to giv %d.\n",
4406 INSN_UID (v->insn), old_regno, new_regno);
4410 last_increment_giv = max_reg_num () - 1;
4412 /* Search the loop for general induction variables. */
4414 for_each_insn_in_loop (loop, check_insn_for_givs);
4416 /* Try to calculate and save the number of loop iterations. This is
4417 set to zero if the actual number can not be calculated. This must
4418 be called after all giv's have been identified, since otherwise it may
4419 fail if the iteration variable is a giv. */
4421 loop_iterations (loop);
4423 /* Now for each giv for which we still don't know whether or not it is
4424 replaceable, check to see if it is replaceable because its final value
4425 can be calculated. This must be done after loop_iterations is called,
4426 so that final_giv_value will work correctly. */
4428 for (bl = loop_iv_list; bl; bl = bl->next)
4430 struct induction *v;
4432 for (v = bl->giv; v; v = v->next_iv)
4433 if (! v->replaceable && ! v->not_replaceable)
4434 check_final_value (loop, v);
4437 /* Try to prove that the loop counter variable (if any) is always
4438 nonnegative; if so, record that fact with a REG_NONNEG note
4439 so that "decrement and branch until zero" insn can be used. */
4440 check_dbra_loop (loop, insn_count);
4442 /* Create reg_map to hold substitutions for replaceable giv regs.
4443 Some givs might have been made from biv increments, so look at
4444 reg_iv_type for a suitable size. */
4445 reg_map_size = reg_iv_type->num_elements;
4446 reg_map = (rtx *) xcalloc (reg_map_size, sizeof (rtx));
4448 /* Examine each iv class for feasibility of strength reduction/induction
4449 variable elimination. */
4451 for (bl = loop_iv_list; bl; bl = bl->next)
4453 struct induction *v;
4456 rtx final_value = 0;
4459 /* Test whether it will be possible to eliminate this biv
4460 provided all givs are reduced. This is possible if either
4461 the reg is not used outside the loop, or we can compute
4462 what its final value will be.
4464 For architectures with a decrement_and_branch_until_zero insn,
4465 don't do this if we put a REG_NONNEG note on the endtest for
4468 /* Compare against bl->init_insn rather than loop_start.
4469 We aren't concerned with any uses of the biv between
4470 init_insn and loop_start since these won't be affected
4471 by the value of the biv elsewhere in the function, so
4472 long as init_insn doesn't use the biv itself.
4473 March 14, 1989 -- self@bayes.arc.nasa.gov */
4475 if ((uid_luid[REGNO_LAST_UID (bl->regno)] < INSN_LUID (loop_end)
4477 && INSN_UID (bl->init_insn) < max_uid_for_loop
4478 && uid_luid[REGNO_FIRST_UID (bl->regno)] >= INSN_LUID (bl->init_insn)
4479 #ifdef HAVE_decrement_and_branch_until_zero
4482 && ! reg_mentioned_p (bl->biv->dest_reg, SET_SRC (bl->init_set)))
4483 || ((final_value = final_biv_value (loop, bl))
4484 #ifdef HAVE_decrement_and_branch_until_zero
4488 bl->eliminable = maybe_eliminate_biv (loop, bl, 0, threshold,
4492 if (loop_dump_stream)
4494 fprintf (loop_dump_stream,
4495 "Cannot eliminate biv %d.\n",
4497 fprintf (loop_dump_stream,
4498 "First use: insn %d, last use: insn %d.\n",
4499 REGNO_FIRST_UID (bl->regno),
4500 REGNO_LAST_UID (bl->regno));
4504 /* Combine all giv's for this iv_class. */
4507 /* This will be true at the end, if all givs which depend on this
4508 biv have been strength reduced.
4509 We can't (currently) eliminate the biv unless this is so. */
4512 /* Check each giv in this class to see if we will benefit by reducing
4513 it. Skip giv's combined with others. */
4514 for (v = bl->giv; v; v = v->next_iv)
4516 struct induction *tv;
4518 if (v->ignore || v->same)
4521 benefit = v->benefit;
4523 /* Reduce benefit if not replaceable, since we will insert
4524 a move-insn to replace the insn that calculates this giv.
4525 Don't do this unless the giv is a user variable, since it
4526 will often be marked non-replaceable because of the duplication
4527 of the exit code outside the loop. In such a case, the copies
4528 we insert are dead and will be deleted. So they don't have
4529 a cost. Similar situations exist. */
4530 /* ??? The new final_[bg]iv_value code does a much better job
4531 of finding replaceable giv's, and hence this code may no longer
4533 if (! v->replaceable && ! bl->eliminable
4534 && REG_USERVAR_P (v->dest_reg))
4535 benefit -= copy_cost;
4537 /* Decrease the benefit to count the add-insns that we will
4538 insert to increment the reduced reg for the giv. */
4539 benefit -= add_cost * bl->biv_count;
4541 /* Decide whether to strength-reduce this giv or to leave the code
4542 unchanged (recompute it from the biv each time it is used).
4543 This decision can be made independently for each giv. */
4546 /* Attempt to guess whether autoincrement will handle some of the
4547 new add insns; if so, increase BENEFIT (undo the subtraction of
4548 add_cost that was done above). */
4549 if (v->giv_type == DEST_ADDR
4550 && GET_CODE (v->mult_val) == CONST_INT)
4552 if (HAVE_POST_INCREMENT
4553 && INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
4554 benefit += add_cost * bl->biv_count;
4555 else if (HAVE_PRE_INCREMENT
4556 && INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
4557 benefit += add_cost * bl->biv_count;
4558 else if (HAVE_POST_DECREMENT
4559 && -INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
4560 benefit += add_cost * bl->biv_count;
4561 else if (HAVE_PRE_DECREMENT
4562 && -INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
4563 benefit += add_cost * bl->biv_count;
4567 /* If an insn is not to be strength reduced, then set its ignore
4568 flag, and clear all_reduced. */
4570 /* A giv that depends on a reversed biv must be reduced if it is
4571 used after the loop exit, otherwise, it would have the wrong
4572 value after the loop exit. To make it simple, just reduce all
4573 of such giv's whether or not we know they are used after the loop
4576 if ( ! flag_reduce_all_givs && v->lifetime * threshold * benefit < insn_count
4579 if (loop_dump_stream)
4580 fprintf (loop_dump_stream,
4581 "giv of insn %d not worth while, %d vs %d.\n",
4583 v->lifetime * threshold * benefit, insn_count);
4589 /* Check that we can increment the reduced giv without a
4590 multiply insn. If not, reject it. */
4592 for (tv = bl->biv; tv; tv = tv->next_iv)
4593 if (tv->mult_val == const1_rtx
4594 && ! product_cheap_p (tv->add_val, v->mult_val))
4596 if (loop_dump_stream)
4597 fprintf (loop_dump_stream,
4598 "giv of insn %d: would need a multiply.\n",
4599 INSN_UID (v->insn));
4607 /* Check for givs whose first use is their definition and whose
4608 last use is the definition of another giv. If so, it is likely
4609 dead and should not be used to derive another giv nor to
4611 for (v = bl->giv; v; v = v->next_iv)
4614 || (v->same && v->same->ignore))
4619 struct induction *v1;
4621 for (v1 = bl->giv; v1; v1 = v1->next_iv)
4622 if (v->last_use == v1->insn)
4625 else if (v->giv_type == DEST_REG
4626 && REGNO_FIRST_UID (REGNO (v->dest_reg)) == INSN_UID (v->insn))
4628 struct induction *v1;
4630 for (v1 = bl->giv; v1; v1 = v1->next_iv)
4631 if (REGNO_LAST_UID (REGNO (v->dest_reg)) == INSN_UID (v1->insn))
4636 /* Now that we know which givs will be reduced, try to rearrange the
4637 combinations to reduce register pressure.
4638 recombine_givs calls find_life_end, which needs reg_iv_type and
4639 reg_iv_info to be valid for all pseudos. We do the necessary
4640 reallocation here since it allows to check if there are still
4641 more bivs to process. */
4642 nregs = max_reg_num ();
4643 if (nregs > reg_iv_type->num_elements)
4645 /* If there are still more bivs to process, allocate some slack
4646 space so that we're not constantly reallocating these arrays. */
4649 /* Reallocate reg_iv_type and reg_iv_info. */
4650 VARRAY_GROW (reg_iv_type, nregs);
4651 VARRAY_GROW (reg_iv_info, nregs);
4653 recombine_givs (loop, bl, unroll_p);
4655 /* Reduce each giv that we decided to reduce. */
4657 for (v = bl->giv; v; v = v->next_iv)
4659 struct induction *tv;
4660 if (! v->ignore && v->same == 0)
4662 int auto_inc_opt = 0;
4664 /* If the code for derived givs immediately below has already
4665 allocated a new_reg, we must keep it. */
4667 v->new_reg = gen_reg_rtx (v->mode);
4669 if (v->derived_from)
4671 struct induction *d = v->derived_from;
4673 /* In case d->dest_reg is not replaceable, we have
4674 to replace it in v->insn now. */
4676 d->new_reg = gen_reg_rtx (d->mode);
4678 = replace_rtx (PATTERN (v->insn), d->dest_reg, d->new_reg);
4680 = replace_rtx (PATTERN (v->insn), v->dest_reg, v->new_reg);
4681 /* For each place where the biv is incremented, add an
4682 insn to set the new, reduced reg for the giv.
4683 We used to do this only for biv_count != 1, but
4684 this fails when there is a giv after a single biv
4685 increment, e.g. when the last giv was expressed as
4687 for (tv = bl->biv; tv; tv = tv->next_iv)
4689 /* We always emit reduced giv increments before the
4690 biv increment when bl->biv_count != 1. So by
4691 emitting the add insns for derived givs after the
4692 biv increment, they pick up the updated value of
4694 If the reduced giv is processed with
4695 auto_inc_opt == 1, then it is incremented earlier
4696 than the biv, hence we'll still pick up the right
4698 If it's processed with auto_inc_opt == -1,
4699 that implies that the biv increment is before the
4700 first reduced giv's use. The derived giv's lifetime
4701 is after the reduced giv's lifetime, hence in this
4702 case, the biv increment doesn't matter. */
4703 emit_insn_after (copy_rtx (PATTERN (v->insn)), tv->insn);
4709 /* If the target has auto-increment addressing modes, and
4710 this is an address giv, then try to put the increment
4711 immediately after its use, so that flow can create an
4712 auto-increment addressing mode. */
4713 if (v->giv_type == DEST_ADDR && bl->biv_count == 1
4714 && bl->biv->always_executed && ! bl->biv->maybe_multiple
4715 /* We don't handle reversed biv's because bl->biv->insn
4716 does not have a valid INSN_LUID. */
4718 && v->always_executed && ! v->maybe_multiple
4719 && INSN_UID (v->insn) < max_uid_for_loop)
4721 /* If other giv's have been combined with this one, then
4722 this will work only if all uses of the other giv's occur
4723 before this giv's insn. This is difficult to check.
4725 We simplify this by looking for the common case where
4726 there is one DEST_REG giv, and this giv's insn is the
4727 last use of the dest_reg of that DEST_REG giv. If the
4728 increment occurs after the address giv, then we can
4729 perform the optimization. (Otherwise, the increment
4730 would have to go before other_giv, and we would not be
4731 able to combine it with the address giv to get an
4732 auto-inc address.) */
4733 if (v->combined_with)
4735 struct induction *other_giv = 0;
4737 for (tv = bl->giv; tv; tv = tv->next_iv)
4745 if (! tv && other_giv
4746 && REGNO (other_giv->dest_reg) < max_reg_before_loop
4747 && (REGNO_LAST_UID (REGNO (other_giv->dest_reg))
4748 == INSN_UID (v->insn))
4749 && INSN_LUID (v->insn) < INSN_LUID (bl->biv->insn))
4752 /* Check for case where increment is before the address
4753 giv. Do this test in "loop order". */
4754 else if ((INSN_LUID (v->insn) > INSN_LUID (bl->biv->insn)
4755 && (INSN_LUID (v->insn) < INSN_LUID (loop_scan_start)
4756 || (INSN_LUID (bl->biv->insn)
4757 > INSN_LUID (loop_scan_start))))
4758 || (INSN_LUID (v->insn) < INSN_LUID (loop_scan_start)
4759 && (INSN_LUID (loop_scan_start)
4760 < INSN_LUID (bl->biv->insn))))
4769 /* We can't put an insn immediately after one setting
4770 cc0, or immediately before one using cc0. */
4771 if ((auto_inc_opt == 1 && sets_cc0_p (PATTERN (v->insn)))
4772 || (auto_inc_opt == -1
4773 && (prev = prev_nonnote_insn (v->insn)) != 0
4774 && GET_RTX_CLASS (GET_CODE (prev)) == 'i'
4775 && sets_cc0_p (PATTERN (prev))))
4781 v->auto_inc_opt = 1;
4785 /* For each place where the biv is incremented, add an insn
4786 to increment the new, reduced reg for the giv. */
4787 for (tv = bl->biv; tv; tv = tv->next_iv)
4792 insert_before = tv->insn;
4793 else if (auto_inc_opt == 1)
4794 insert_before = NEXT_INSN (v->insn);
4796 insert_before = v->insn;
4798 if (tv->mult_val == const1_rtx)
4799 emit_iv_add_mult (tv->add_val, v->mult_val,
4800 v->new_reg, v->new_reg, insert_before);
4801 else /* tv->mult_val == const0_rtx */
4802 /* A multiply is acceptable here
4803 since this is presumed to be seldom executed. */
4804 emit_iv_add_mult (tv->add_val, v->mult_val,
4805 v->add_val, v->new_reg, insert_before);
4808 /* Add code at loop start to initialize giv's reduced reg. */
4810 emit_iv_add_mult (bl->initial_value, v->mult_val,
4811 v->add_val, v->new_reg, loop_start);
4815 /* Rescan all givs. If a giv is the same as a giv not reduced, mark it
4818 For each giv register that can be reduced now: if replaceable,
4819 substitute reduced reg wherever the old giv occurs;
4820 else add new move insn "giv_reg = reduced_reg". */
4822 for (v = bl->giv; v; v = v->next_iv)
4824 if (v->same && v->same->ignore)
4830 /* Update expression if this was combined, in case other giv was
4833 v->new_reg = replace_rtx (v->new_reg,
4834 v->same->dest_reg, v->same->new_reg);
4836 if (v->giv_type == DEST_ADDR)
4837 /* Store reduced reg as the address in the memref where we found
4839 validate_change (v->insn, v->location, v->new_reg, 0);
4840 else if (v->replaceable)
4842 reg_map[REGNO (v->dest_reg)] = v->new_reg;
4845 /* I can no longer duplicate the original problem. Perhaps
4846 this is unnecessary now? */
4848 /* Replaceable; it isn't strictly necessary to delete the old
4849 insn and emit a new one, because v->dest_reg is now dead.
4851 However, especially when unrolling loops, the special
4852 handling for (set REG0 REG1) in the second cse pass may
4853 make v->dest_reg live again. To avoid this problem, emit
4854 an insn to set the original giv reg from the reduced giv.
4855 We can not delete the original insn, since it may be part
4856 of a LIBCALL, and the code in flow that eliminates dead
4857 libcalls will fail if it is deleted. */
4858 emit_insn_after (gen_move_insn (v->dest_reg, v->new_reg),
4864 /* Not replaceable; emit an insn to set the original giv reg from
4865 the reduced giv, same as above. */
4866 emit_insn_after (gen_move_insn (v->dest_reg, v->new_reg),
4870 /* When a loop is reversed, givs which depend on the reversed
4871 biv, and which are live outside the loop, must be set to their
4872 correct final value. This insn is only needed if the giv is
4873 not replaceable. The correct final value is the same as the
4874 value that the giv starts the reversed loop with. */
4875 if (bl->reversed && ! v->replaceable)
4876 emit_iv_add_mult (bl->initial_value, v->mult_val,
4877 v->add_val, v->dest_reg, end_insert_before);
4878 else if (v->final_value)
4882 /* If the loop has multiple exits, emit the insn before the
4883 loop to ensure that it will always be executed no matter
4884 how the loop exits. Otherwise, emit the insn after the loop,
4885 since this is slightly more efficient. */
4886 if (loop->exit_count)
4887 insert_before = loop_start;
4889 insert_before = end_insert_before;
4890 emit_insn_before (gen_move_insn (v->dest_reg, v->final_value),
4894 /* If the insn to set the final value of the giv was emitted
4895 before the loop, then we must delete the insn inside the loop
4896 that sets it. If this is a LIBCALL, then we must delete
4897 every insn in the libcall. Note, however, that
4898 final_giv_value will only succeed when there are multiple
4899 exits if the giv is dead at each exit, hence it does not
4900 matter that the original insn remains because it is dead
4902 /* Delete the insn inside the loop that sets the giv since
4903 the giv is now set before (or after) the loop. */
4904 delete_insn (v->insn);
4908 if (loop_dump_stream)
4910 fprintf (loop_dump_stream, "giv at %d reduced to ",
4911 INSN_UID (v->insn));
4912 print_rtl (loop_dump_stream, v->new_reg);
4913 fprintf (loop_dump_stream, "\n");
4917 /* All the givs based on the biv bl have been reduced if they
4920 /* For each giv not marked as maybe dead that has been combined with a
4921 second giv, clear any "maybe dead" mark on that second giv.
4922 v->new_reg will either be or refer to the register of the giv it
4925 Doing this clearing avoids problems in biv elimination where a
4926 giv's new_reg is a complex value that can't be put in the insn but
4927 the giv combined with (with a reg as new_reg) is marked maybe_dead.
4928 Since the register will be used in either case, we'd prefer it be
4929 used from the simpler giv. */
4931 for (v = bl->giv; v; v = v->next_iv)
4932 if (! v->maybe_dead && v->same)
4933 v->same->maybe_dead = 0;
4935 /* Try to eliminate the biv, if it is a candidate.
4936 This won't work if ! all_reduced,
4937 since the givs we planned to use might not have been reduced.
4939 We have to be careful that we didn't initially think we could eliminate
4940 this biv because of a giv that we now think may be dead and shouldn't
4941 be used as a biv replacement.
4943 Also, there is the possibility that we may have a giv that looks
4944 like it can be used to eliminate a biv, but the resulting insn
4945 isn't valid. This can happen, for example, on the 88k, where a
4946 JUMP_INSN can compare a register only with zero. Attempts to
4947 replace it with a compare with a constant will fail.
4949 Note that in cases where this call fails, we may have replaced some
4950 of the occurrences of the biv with a giv, but no harm was done in
4951 doing so in the rare cases where it can occur. */
4953 if (all_reduced == 1 && bl->eliminable
4954 && maybe_eliminate_biv (loop, bl, 1, threshold, insn_count))
4956 /* ?? If we created a new test to bypass the loop entirely,
4957 or otherwise drop straight in, based on this test, then
4958 we might want to rewrite it also. This way some later
4959 pass has more hope of removing the initialization of this
4962 /* If final_value != 0, then the biv may be used after loop end
4963 and we must emit an insn to set it just in case.
4965 Reversed bivs already have an insn after the loop setting their
4966 value, so we don't need another one. We can't calculate the
4967 proper final value for such a biv here anyways. */
4968 if (final_value != 0 && ! bl->reversed)
4972 /* If the loop has multiple exits, emit the insn before the
4973 loop to ensure that it will always be executed no matter
4974 how the loop exits. Otherwise, emit the insn after the
4975 loop, since this is slightly more efficient. */
4976 if (loop->exit_count)
4977 insert_before = loop_start;
4979 insert_before = end_insert_before;
4981 emit_insn_before (gen_move_insn (bl->biv->dest_reg, final_value),
4986 /* Delete all of the instructions inside the loop which set
4987 the biv, as they are all dead. If is safe to delete them,
4988 because an insn setting a biv will never be part of a libcall. */
4989 /* However, deleting them will invalidate the regno_last_uid info,
4990 so keeping them around is more convenient. Final_biv_value
4991 will only succeed when there are multiple exits if the biv
4992 is dead at each exit, hence it does not matter that the original
4993 insn remains, because it is dead anyways. */
4994 for (v = bl->biv; v; v = v->next_iv)
4995 delete_insn (v->insn);
4998 if (loop_dump_stream)
4999 fprintf (loop_dump_stream, "Reg %d: biv eliminated\n",
5004 /* Go through all the instructions in the loop, making all the
5005 register substitutions scheduled in REG_MAP. */
5007 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
5008 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
5009 || GET_CODE (p) == CALL_INSN)
5011 replace_regs (PATTERN (p), reg_map, reg_map_size, 0);
5012 replace_regs (REG_NOTES (p), reg_map, reg_map_size, 0);
5016 if (loop_info->n_iterations > 0)
5018 /* When we completely unroll a loop we will likely not need the increment
5019 of the loop BIV and we will not need the conditional branch at the
5021 unrolled_insn_copies = insn_count - 2;
5024 /* When we completely unroll a loop on a HAVE_cc0 machine we will not
5025 need the comparison before the conditional branch at the end of the
5027 unrolled_insn_copies -= 1;
5030 /* We'll need one copy for each loop iteration. */
5031 unrolled_insn_copies *= loop_info->n_iterations;
5033 /* A little slop to account for the ability to remove initialization
5034 code, better CSE, and other secondary benefits of completely
5035 unrolling some loops. */
5036 unrolled_insn_copies -= 1;
5038 /* Clamp the value. */
5039 if (unrolled_insn_copies < 0)
5040 unrolled_insn_copies = 0;
5043 /* Unroll loops from within strength reduction so that we can use the
5044 induction variable information that strength_reduce has already
5045 collected. Always unroll loops that would be as small or smaller
5046 unrolled than when rolled. */
5048 || (loop_info->n_iterations > 0
5049 && unrolled_insn_copies <= insn_count))
5050 unroll_loop (loop, insn_count, end_insert_before, 1);
5052 #ifdef HAVE_decrement_and_branch_on_count
5053 /* Instrument the loop with BCT insn. */
5054 if (HAVE_decrement_and_branch_on_count && bct_p
5055 && flag_branch_on_count_reg)
5057 #endif /* HAVE_decrement_and_branch_on_count */
5059 if (loop_dump_stream)
5060 fprintf (loop_dump_stream, "\n");
5063 VARRAY_FREE (reg_iv_type);
5064 VARRAY_FREE (reg_iv_info);
5065 free (reg_biv_class);
5070 /*Record all basic induction variables calculated in the insn. */
5072 check_insn_for_bivs (loop, p, not_every_iteration, maybe_multiple)
5075 int not_every_iteration;
5084 if (GET_CODE (p) == INSN
5085 && (set = single_set (p))
5086 && GET_CODE (SET_DEST (set)) == REG)
5088 dest_reg = SET_DEST (set);
5089 if (REGNO (dest_reg) < max_reg_before_loop
5090 && REGNO (dest_reg) >= FIRST_PSEUDO_REGISTER
5091 && REG_IV_TYPE (REGNO (dest_reg)) != NOT_BASIC_INDUCT)
5093 int multi_insn_incr = 0;
5095 if (basic_induction_var (loop, SET_SRC (set),
5096 GET_MODE (SET_SRC (set)),
5097 dest_reg, p, &inc_val, &mult_val,
5098 &location, &multi_insn_incr))
5100 /* It is a possible basic induction variable.
5101 Create and initialize an induction structure for it. */
5104 = (struct induction *) oballoc (sizeof (struct induction));
5106 record_biv (v, p, dest_reg, inc_val, mult_val, location,
5107 not_every_iteration, maybe_multiple,
5109 REG_IV_TYPE (REGNO (dest_reg)) = BASIC_INDUCT;
5111 else if (REGNO (dest_reg) < max_reg_before_loop)
5112 REG_IV_TYPE (REGNO (dest_reg)) = NOT_BASIC_INDUCT;
5117 /* Record all givs calculated in the insn.
5118 A register is a giv if: it is only set once, it is a function of a
5119 biv and a constant (or invariant), and it is not a biv. */
5121 check_insn_for_givs (loop, p, not_every_iteration, maybe_multiple)
5124 int not_every_iteration;
5128 /* Look for a general induction variable in a register. */
5129 if (GET_CODE (p) == INSN
5130 && (set = single_set (p))
5131 && GET_CODE (SET_DEST (set)) == REG
5132 && ! VARRAY_CHAR (may_not_optimize, REGNO (SET_DEST (set))))
5140 rtx last_consec_insn;
5142 dest_reg = SET_DEST (set);
5143 if (REGNO (dest_reg) < FIRST_PSEUDO_REGISTER)
5146 if (/* SET_SRC is a giv. */
5147 (general_induction_var (loop, SET_SRC (set), &src_reg, &add_val,
5148 &mult_val, 0, &benefit)
5149 /* Equivalent expression is a giv. */
5150 || ((regnote = find_reg_note (p, REG_EQUAL, NULL_RTX))
5151 && general_induction_var (loop, XEXP (regnote, 0), &src_reg,
5152 &add_val, &mult_val, 0,
5154 /* Don't try to handle any regs made by loop optimization.
5155 We have nothing on them in regno_first_uid, etc. */
5156 && REGNO (dest_reg) < max_reg_before_loop
5157 /* Don't recognize a BASIC_INDUCT_VAR here. */
5158 && dest_reg != src_reg
5159 /* This must be the only place where the register is set. */
5160 && (VARRAY_INT (n_times_set, REGNO (dest_reg)) == 1
5161 /* or all sets must be consecutive and make a giv. */
5162 || (benefit = consec_sets_giv (loop, benefit, p,
5164 &add_val, &mult_val,
5165 &last_consec_insn))))
5168 = (struct induction *) oballoc (sizeof (struct induction));
5170 /* If this is a library call, increase benefit. */
5171 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
5172 benefit += libcall_benefit (p);
5174 /* Skip the consecutive insns, if there are any. */
5175 if (VARRAY_INT (n_times_set, REGNO (dest_reg)) != 1)
5176 p = last_consec_insn;
5178 record_giv (loop, v, p, src_reg, dest_reg, mult_val, add_val,
5179 benefit, DEST_REG, not_every_iteration,
5180 maybe_multiple, NULL_PTR);
5185 #ifndef DONT_REDUCE_ADDR
5186 /* Look for givs which are memory addresses. */
5187 /* This resulted in worse code on a VAX 8600. I wonder if it
5189 if (GET_CODE (p) == INSN)
5190 find_mem_givs (loop, PATTERN (p), p, not_every_iteration,
5194 /* Update the status of whether giv can derive other givs. This can
5195 change when we pass a label or an insn that updates a biv. */
5196 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
5197 || GET_CODE (p) == CODE_LABEL)
5198 update_giv_derive (loop, p);
5202 /* Return 1 if X is a valid source for an initial value (or as value being
5203 compared against in an initial test).
5205 X must be either a register or constant and must not be clobbered between
5206 the current insn and the start of the loop.
5208 INSN is the insn containing X. */
5211 valid_initial_value_p (x, insn, call_seen, loop_start)
5220 /* Only consider pseudos we know about initialized in insns whose luids
5222 if (GET_CODE (x) != REG
5223 || REGNO (x) >= max_reg_before_loop)
5226 /* Don't use call-clobbered registers across a call which clobbers it. On
5227 some machines, don't use any hard registers at all. */
5228 if (REGNO (x) < FIRST_PSEUDO_REGISTER
5229 && (SMALL_REGISTER_CLASSES
5230 || (call_used_regs[REGNO (x)] && call_seen)))
5233 /* Don't use registers that have been clobbered before the start of the
5235 if (reg_set_between_p (x, insn, loop_start))
5241 /* Scan X for memory refs and check each memory address
5242 as a possible giv. INSN is the insn whose pattern X comes from.
5243 NOT_EVERY_ITERATION is 1 if the insn might not be executed during
5244 every loop iteration. MAYBE_MULTIPLE is 1 if the insn might be executed
5245 more thanonce in each loop iteration. */
5248 find_mem_givs (loop, x, insn, not_every_iteration, maybe_multiple)
5249 const struct loop *loop;
5252 int not_every_iteration, maybe_multiple;
5255 register enum rtx_code code;
5256 register const char *fmt;
5261 code = GET_CODE (x);
5285 /* This code used to disable creating GIVs with mult_val == 1 and
5286 add_val == 0. However, this leads to lost optimizations when
5287 it comes time to combine a set of related DEST_ADDR GIVs, since
5288 this one would not be seen. */
5290 if (general_induction_var (loop, XEXP (x, 0), &src_reg, &add_val,
5291 &mult_val, 1, &benefit))
5293 /* Found one; record it. */
5295 = (struct induction *) oballoc (sizeof (struct induction));
5297 record_giv (loop, v, insn, src_reg, addr_placeholder, mult_val,
5298 add_val, benefit, DEST_ADDR, not_every_iteration,
5299 maybe_multiple, &XEXP (x, 0));
5301 v->mem_mode = GET_MODE (x);
5310 /* Recursively scan the subexpressions for other mem refs. */
5312 fmt = GET_RTX_FORMAT (code);
5313 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5315 find_mem_givs (loop, XEXP (x, i), insn, not_every_iteration,
5317 else if (fmt[i] == 'E')
5318 for (j = 0; j < XVECLEN (x, i); j++)
5319 find_mem_givs (loop, XVECEXP (x, i, j), insn, not_every_iteration,
5323 /* Fill in the data about one biv update.
5324 V is the `struct induction' in which we record the biv. (It is
5325 allocated by the caller, with alloca.)
5326 INSN is the insn that sets it.
5327 DEST_REG is the biv's reg.
5329 MULT_VAL is const1_rtx if the biv is being incremented here, in which case
5330 INC_VAL is the increment. Otherwise, MULT_VAL is const0_rtx and the biv is
5331 being set to INC_VAL.
5333 NOT_EVERY_ITERATION is nonzero if this biv update is not know to be
5334 executed every iteration; MAYBE_MULTIPLE is nonzero if this biv update
5335 can be executed more than once per iteration. If MAYBE_MULTIPLE
5336 and NOT_EVERY_ITERATION are both zero, we know that the biv update is
5337 executed exactly once per iteration. */
5340 record_biv (v, insn, dest_reg, inc_val, mult_val, location,
5341 not_every_iteration, maybe_multiple, multi_insn_incr)
5342 struct induction *v;
5348 int not_every_iteration;
5350 int multi_insn_incr;
5352 struct iv_class *bl;
5355 v->src_reg = dest_reg;
5356 v->dest_reg = dest_reg;
5357 v->mult_val = mult_val;
5358 v->add_val = inc_val;
5359 v->location = location;
5360 v->mode = GET_MODE (dest_reg);
5361 v->always_computable = ! not_every_iteration;
5362 v->always_executed = ! not_every_iteration;
5363 v->maybe_multiple = maybe_multiple;
5364 v->multi_insn_incr = multi_insn_incr;
5366 /* Add this to the reg's iv_class, creating a class
5367 if this is the first incrementation of the reg. */
5369 bl = reg_biv_class[REGNO (dest_reg)];
5372 /* Create and initialize new iv_class. */
5374 bl = (struct iv_class *) oballoc (sizeof (struct iv_class));
5376 bl->regno = REGNO (dest_reg);
5382 /* Set initial value to the reg itself. */
5383 bl->initial_value = dest_reg;
5384 /* We haven't seen the initializing insn yet */
5387 bl->initial_test = 0;
5388 bl->incremented = 0;
5392 bl->total_benefit = 0;
5394 /* Add this class to loop_iv_list. */
5395 bl->next = loop_iv_list;
5398 /* Put it in the array of biv register classes. */
5399 reg_biv_class[REGNO (dest_reg)] = bl;
5402 /* Update IV_CLASS entry for this biv. */
5403 v->next_iv = bl->biv;
5406 if (mult_val == const1_rtx)
5407 bl->incremented = 1;
5409 if (loop_dump_stream)
5411 fprintf (loop_dump_stream,
5412 "Insn %d: possible biv, reg %d,",
5413 INSN_UID (insn), REGNO (dest_reg));
5414 if (GET_CODE (inc_val) == CONST_INT)
5416 fprintf (loop_dump_stream, " const =");
5417 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, INTVAL (inc_val));
5418 fputc ('\n', loop_dump_stream);
5422 fprintf (loop_dump_stream, " const = ");
5423 print_rtl (loop_dump_stream, inc_val);
5424 fprintf (loop_dump_stream, "\n");
5429 /* Fill in the data about one giv.
5430 V is the `struct induction' in which we record the giv. (It is
5431 allocated by the caller, with alloca.)
5432 INSN is the insn that sets it.
5433 BENEFIT estimates the savings from deleting this insn.
5434 TYPE is DEST_REG or DEST_ADDR; it says whether the giv is computed
5435 into a register or is used as a memory address.
5437 SRC_REG is the biv reg which the giv is computed from.
5438 DEST_REG is the giv's reg (if the giv is stored in a reg).
5439 MULT_VAL and ADD_VAL are the coefficients used to compute the giv.
5440 LOCATION points to the place where this giv's value appears in INSN. */
5443 record_giv (loop, v, insn, src_reg, dest_reg, mult_val, add_val, benefit,
5444 type, not_every_iteration, maybe_multiple, location)
5445 const struct loop *loop;
5446 struct induction *v;
5450 rtx mult_val, add_val;
5453 int not_every_iteration, maybe_multiple;
5456 struct induction *b;
5457 struct iv_class *bl;
5458 rtx set = single_set (insn);
5461 v->src_reg = src_reg;
5463 v->dest_reg = dest_reg;
5464 v->mult_val = mult_val;
5465 v->add_val = add_val;
5466 v->benefit = benefit;
5467 v->location = location;
5469 v->combined_with = 0;
5470 v->maybe_multiple = maybe_multiple;
5471 v->multi_insn_incr = 0;
5473 v->derive_adjustment = 0;
5479 v->auto_inc_opt = 0;
5482 v->derived_from = 0;
5485 /* The v->always_computable field is used in update_giv_derive, to
5486 determine whether a giv can be used to derive another giv. For a
5487 DEST_REG giv, INSN computes a new value for the giv, so its value
5488 isn't computable if INSN insn't executed every iteration.
5489 However, for a DEST_ADDR giv, INSN merely uses the value of the giv;
5490 it does not compute a new value. Hence the value is always computable
5491 regardless of whether INSN is executed each iteration. */
5493 if (type == DEST_ADDR)
5494 v->always_computable = 1;
5496 v->always_computable = ! not_every_iteration;
5498 v->always_executed = ! not_every_iteration;
5500 if (type == DEST_ADDR)
5502 v->mode = GET_MODE (*location);
5505 else /* type == DEST_REG */
5507 v->mode = GET_MODE (SET_DEST (set));
5509 v->lifetime = (uid_luid[REGNO_LAST_UID (REGNO (dest_reg))]
5510 - uid_luid[REGNO_FIRST_UID (REGNO (dest_reg))]);
5512 /* If the lifetime is zero, it means that this register is
5513 really a dead store. So mark this as a giv that can be
5514 ignored. This will not prevent the biv from being eliminated. */
5515 if (v->lifetime == 0)
5518 REG_IV_TYPE (REGNO (dest_reg)) = GENERAL_INDUCT;
5519 REG_IV_INFO (REGNO (dest_reg)) = v;
5522 /* Add the giv to the class of givs computed from one biv. */
5524 bl = reg_biv_class[REGNO (src_reg)];
5527 v->next_iv = bl->giv;
5529 /* Don't count DEST_ADDR. This is supposed to count the number of
5530 insns that calculate givs. */
5531 if (type == DEST_REG)
5533 bl->total_benefit += benefit;
5536 /* Fatal error, biv missing for this giv? */
5539 if (type == DEST_ADDR)
5543 /* The giv can be replaced outright by the reduced register only if all
5544 of the following conditions are true:
5545 - the insn that sets the giv is always executed on any iteration
5546 on which the giv is used at all
5547 (there are two ways to deduce this:
5548 either the insn is executed on every iteration,
5549 or all uses follow that insn in the same basic block),
5550 - the giv is not used outside the loop
5551 - no assignments to the biv occur during the giv's lifetime. */
5553 if (REGNO_FIRST_UID (REGNO (dest_reg)) == INSN_UID (insn)
5554 /* Previous line always fails if INSN was moved by loop opt. */
5555 && uid_luid[REGNO_LAST_UID (REGNO (dest_reg))]
5556 < INSN_LUID (loop->end)
5557 && (! not_every_iteration
5558 || last_use_this_basic_block (dest_reg, insn)))
5560 /* Now check that there are no assignments to the biv within the
5561 giv's lifetime. This requires two separate checks. */
5563 /* Check each biv update, and fail if any are between the first
5564 and last use of the giv.
5566 If this loop contains an inner loop that was unrolled, then
5567 the insn modifying the biv may have been emitted by the loop
5568 unrolling code, and hence does not have a valid luid. Just
5569 mark the biv as not replaceable in this case. It is not very
5570 useful as a biv, because it is used in two different loops.
5571 It is very unlikely that we would be able to optimize the giv
5572 using this biv anyways. */
5575 for (b = bl->biv; b; b = b->next_iv)
5577 if (INSN_UID (b->insn) >= max_uid_for_loop
5578 || ((uid_luid[INSN_UID (b->insn)]
5579 >= uid_luid[REGNO_FIRST_UID (REGNO (dest_reg))])
5580 && (uid_luid[INSN_UID (b->insn)]
5581 <= uid_luid[REGNO_LAST_UID (REGNO (dest_reg))])))
5584 v->not_replaceable = 1;
5589 /* If there are any backwards branches that go from after the
5590 biv update to before it, then this giv is not replaceable. */
5592 for (b = bl->biv; b; b = b->next_iv)
5593 if (back_branch_in_range_p (loop, b->insn))
5596 v->not_replaceable = 1;
5602 /* May still be replaceable, we don't have enough info here to
5605 v->not_replaceable = 0;
5609 /* Record whether the add_val contains a const_int, for later use by
5614 v->no_const_addval = 1;
5615 if (tem == const0_rtx)
5617 else if (GET_CODE (tem) == CONST_INT)
5618 v->no_const_addval = 0;
5619 else if (GET_CODE (tem) == PLUS)
5623 if (GET_CODE (XEXP (tem, 0)) == PLUS)
5624 tem = XEXP (tem, 0);
5625 else if (GET_CODE (XEXP (tem, 1)) == PLUS)
5626 tem = XEXP (tem, 1);
5630 if (GET_CODE (XEXP (tem, 1)) == CONST_INT)
5631 v->no_const_addval = 0;
5635 if (loop_dump_stream)
5637 if (type == DEST_REG)
5638 fprintf (loop_dump_stream, "Insn %d: giv reg %d",
5639 INSN_UID (insn), REGNO (dest_reg));
5641 fprintf (loop_dump_stream, "Insn %d: dest address",
5644 fprintf (loop_dump_stream, " src reg %d benefit %d",
5645 REGNO (src_reg), v->benefit);
5646 fprintf (loop_dump_stream, " lifetime %d",
5650 fprintf (loop_dump_stream, " replaceable");
5652 if (v->no_const_addval)
5653 fprintf (loop_dump_stream, " ncav");
5655 if (GET_CODE (mult_val) == CONST_INT)
5657 fprintf (loop_dump_stream, " mult ");
5658 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, INTVAL (mult_val));
5662 fprintf (loop_dump_stream, " mult ");
5663 print_rtl (loop_dump_stream, mult_val);
5666 if (GET_CODE (add_val) == CONST_INT)
5668 fprintf (loop_dump_stream, " add ");
5669 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, INTVAL (add_val));
5673 fprintf (loop_dump_stream, " add ");
5674 print_rtl (loop_dump_stream, add_val);
5678 if (loop_dump_stream)
5679 fprintf (loop_dump_stream, "\n");
5684 /* All this does is determine whether a giv can be made replaceable because
5685 its final value can be calculated. This code can not be part of record_giv
5686 above, because final_giv_value requires that the number of loop iterations
5687 be known, and that can not be accurately calculated until after all givs
5688 have been identified. */
5691 check_final_value (loop, v)
5692 const struct loop *loop;
5693 struct induction *v;
5695 struct iv_class *bl;
5696 rtx final_value = 0;
5698 bl = reg_biv_class[REGNO (v->src_reg)];
5700 /* DEST_ADDR givs will never reach here, because they are always marked
5701 replaceable above in record_giv. */
5703 /* The giv can be replaced outright by the reduced register only if all
5704 of the following conditions are true:
5705 - the insn that sets the giv is always executed on any iteration
5706 on which the giv is used at all
5707 (there are two ways to deduce this:
5708 either the insn is executed on every iteration,
5709 or all uses follow that insn in the same basic block),
5710 - its final value can be calculated (this condition is different
5711 than the one above in record_giv)
5712 - no assignments to the biv occur during the giv's lifetime. */
5715 /* This is only called now when replaceable is known to be false. */
5716 /* Clear replaceable, so that it won't confuse final_giv_value. */
5720 if ((final_value = final_giv_value (loop, v))
5721 && (v->always_computable || last_use_this_basic_block (v->dest_reg, v->insn)))
5723 int biv_increment_seen = 0;
5729 /* When trying to determine whether or not a biv increment occurs
5730 during the lifetime of the giv, we can ignore uses of the variable
5731 outside the loop because final_value is true. Hence we can not
5732 use regno_last_uid and regno_first_uid as above in record_giv. */
5734 /* Search the loop to determine whether any assignments to the
5735 biv occur during the giv's lifetime. Start with the insn
5736 that sets the giv, and search around the loop until we come
5737 back to that insn again.
5739 Also fail if there is a jump within the giv's lifetime that jumps
5740 to somewhere outside the lifetime but still within the loop. This
5741 catches spaghetti code where the execution order is not linear, and
5742 hence the above test fails. Here we assume that the giv lifetime
5743 does not extend from one iteration of the loop to the next, so as
5744 to make the test easier. Since the lifetime isn't known yet,
5745 this requires two loops. See also record_giv above. */
5747 last_giv_use = v->insn;
5753 p = NEXT_INSN (loop->start);
5757 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
5758 || GET_CODE (p) == CALL_INSN)
5760 if (biv_increment_seen)
5762 if (reg_mentioned_p (v->dest_reg, PATTERN (p)))
5765 v->not_replaceable = 1;
5769 else if (reg_set_p (v->src_reg, PATTERN (p)))
5770 biv_increment_seen = 1;
5771 else if (reg_mentioned_p (v->dest_reg, PATTERN (p)))
5776 /* Now that the lifetime of the giv is known, check for branches
5777 from within the lifetime to outside the lifetime if it is still
5787 p = NEXT_INSN (loop->start);
5788 if (p == last_giv_use)
5791 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p)
5792 && LABEL_NAME (JUMP_LABEL (p))
5793 && ((loop_insn_first_p (JUMP_LABEL (p), v->insn)
5794 && loop_insn_first_p (loop->start, JUMP_LABEL (p)))
5795 || (loop_insn_first_p (last_giv_use, JUMP_LABEL (p))
5796 && loop_insn_first_p (JUMP_LABEL (p), loop->end))))
5799 v->not_replaceable = 1;
5801 if (loop_dump_stream)
5802 fprintf (loop_dump_stream,
5803 "Found branch outside giv lifetime.\n");
5810 /* If it is replaceable, then save the final value. */
5812 v->final_value = final_value;
5815 if (loop_dump_stream && v->replaceable)
5816 fprintf (loop_dump_stream, "Insn %d: giv reg %d final_value replaceable\n",
5817 INSN_UID (v->insn), REGNO (v->dest_reg));
5820 /* Update the status of whether a giv can derive other givs.
5822 We need to do something special if there is or may be an update to the biv
5823 between the time the giv is defined and the time it is used to derive
5826 In addition, a giv that is only conditionally set is not allowed to
5827 derive another giv once a label has been passed.
5829 The cases we look at are when a label or an update to a biv is passed. */
5832 update_giv_derive (loop, p)
5833 const struct loop *loop;
5836 struct iv_class *bl;
5837 struct induction *biv, *giv;
5841 /* Search all IV classes, then all bivs, and finally all givs.
5843 There are three cases we are concerned with. First we have the situation
5844 of a giv that is only updated conditionally. In that case, it may not
5845 derive any givs after a label is passed.
5847 The second case is when a biv update occurs, or may occur, after the
5848 definition of a giv. For certain biv updates (see below) that are
5849 known to occur between the giv definition and use, we can adjust the
5850 giv definition. For others, or when the biv update is conditional,
5851 we must prevent the giv from deriving any other givs. There are two
5852 sub-cases within this case.
5854 If this is a label, we are concerned with any biv update that is done
5855 conditionally, since it may be done after the giv is defined followed by
5856 a branch here (actually, we need to pass both a jump and a label, but
5857 this extra tracking doesn't seem worth it).
5859 If this is a jump, we are concerned about any biv update that may be
5860 executed multiple times. We are actually only concerned about
5861 backward jumps, but it is probably not worth performing the test
5862 on the jump again here.
5864 If this is a biv update, we must adjust the giv status to show that a
5865 subsequent biv update was performed. If this adjustment cannot be done,
5866 the giv cannot derive further givs. */
5868 for (bl = loop_iv_list; bl; bl = bl->next)
5869 for (biv = bl->biv; biv; biv = biv->next_iv)
5870 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN
5873 for (giv = bl->giv; giv; giv = giv->next_iv)
5875 /* If cant_derive is already true, there is no point in
5876 checking all of these conditions again. */
5877 if (giv->cant_derive)
5880 /* If this giv is conditionally set and we have passed a label,
5881 it cannot derive anything. */
5882 if (GET_CODE (p) == CODE_LABEL && ! giv->always_computable)
5883 giv->cant_derive = 1;
5885 /* Skip givs that have mult_val == 0, since
5886 they are really invariants. Also skip those that are
5887 replaceable, since we know their lifetime doesn't contain
5889 else if (giv->mult_val == const0_rtx || giv->replaceable)
5892 /* The only way we can allow this giv to derive another
5893 is if this is a biv increment and we can form the product
5894 of biv->add_val and giv->mult_val. In this case, we will
5895 be able to compute a compensation. */
5896 else if (biv->insn == p)
5900 if (biv->mult_val == const1_rtx)
5901 tem = simplify_giv_expr (loop,
5902 gen_rtx_MULT (giv->mode,
5907 if (tem && giv->derive_adjustment)
5908 tem = simplify_giv_expr
5910 gen_rtx_PLUS (giv->mode, tem, giv->derive_adjustment),
5914 giv->derive_adjustment = tem;
5916 giv->cant_derive = 1;
5918 else if ((GET_CODE (p) == CODE_LABEL && ! biv->always_computable)
5919 || (GET_CODE (p) == JUMP_INSN && biv->maybe_multiple))
5920 giv->cant_derive = 1;
5925 /* Check whether an insn is an increment legitimate for a basic induction var.
5926 X is the source of insn P, or a part of it.
5927 MODE is the mode in which X should be interpreted.
5929 DEST_REG is the putative biv, also the destination of the insn.
5930 We accept patterns of these forms:
5931 REG = REG + INVARIANT (includes REG = REG - CONSTANT)
5932 REG = INVARIANT + REG
5934 If X is suitable, we return 1, set *MULT_VAL to CONST1_RTX,
5935 store the additive term into *INC_VAL, and store the place where
5936 we found the additive term into *LOCATION.
5938 If X is an assignment of an invariant into DEST_REG, we set
5939 *MULT_VAL to CONST0_RTX, and store the invariant into *INC_VAL.
5941 We also want to detect a BIV when it corresponds to a variable
5942 whose mode was promoted via PROMOTED_MODE. In that case, an increment
5943 of the variable may be a PLUS that adds a SUBREG of that variable to
5944 an invariant and then sign- or zero-extends the result of the PLUS
5947 Most GIVs in such cases will be in the promoted mode, since that is the
5948 probably the natural computation mode (and almost certainly the mode
5949 used for addresses) on the machine. So we view the pseudo-reg containing
5950 the variable as the BIV, as if it were simply incremented.
5952 Note that treating the entire pseudo as a BIV will result in making
5953 simple increments to any GIVs based on it. However, if the variable
5954 overflows in its declared mode but not its promoted mode, the result will
5955 be incorrect. This is acceptable if the variable is signed, since
5956 overflows in such cases are undefined, but not if it is unsigned, since
5957 those overflows are defined. So we only check for SIGN_EXTEND and
5960 If we cannot find a biv, we return 0. */
5963 basic_induction_var (loop, x, mode, dest_reg, p, inc_val, mult_val,
5964 location, multi_insn_incr)
5965 const struct loop *loop;
5967 enum machine_mode mode;
5973 int *multi_insn_incr;
5975 register enum rtx_code code;
5979 code = GET_CODE (x);
5984 if (rtx_equal_p (XEXP (x, 0), dest_reg)
5985 || (GET_CODE (XEXP (x, 0)) == SUBREG
5986 && SUBREG_PROMOTED_VAR_P (XEXP (x, 0))
5987 && SUBREG_REG (XEXP (x, 0)) == dest_reg))
5989 argp = &XEXP (x, 1);
5991 else if (rtx_equal_p (XEXP (x, 1), dest_reg)
5992 || (GET_CODE (XEXP (x, 1)) == SUBREG
5993 && SUBREG_PROMOTED_VAR_P (XEXP (x, 1))
5994 && SUBREG_REG (XEXP (x, 1)) == dest_reg))
5996 argp = &XEXP (x, 0);
6002 if (loop_invariant_p (loop, arg) != 1)
6005 *inc_val = convert_modes (GET_MODE (dest_reg), GET_MODE (x), arg, 0);
6006 *mult_val = const1_rtx;
6011 /* If this is a SUBREG for a promoted variable, check the inner
6013 if (SUBREG_PROMOTED_VAR_P (x))
6014 return basic_induction_var (loop, SUBREG_REG (x),
6015 GET_MODE (SUBREG_REG (x)),
6016 dest_reg, p, inc_val, mult_val, location,
6021 /* If this register is assigned in a previous insn, look at its
6022 source, but don't go outside the loop or past a label. */
6028 insn = PREV_INSN (insn);
6029 } while (insn && GET_CODE (insn) == NOTE
6030 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG);
6034 set = single_set (insn);
6038 if ((SET_DEST (set) == x
6039 || (GET_CODE (SET_DEST (set)) == SUBREG
6040 && (GET_MODE_SIZE (GET_MODE (SET_DEST (set)))
6042 && (GET_MODE_CLASS (GET_MODE (SET_DEST (set)))
6044 && SUBREG_REG (SET_DEST (set)) == x))
6045 && basic_induction_var (loop, SET_SRC (set),
6046 (GET_MODE (SET_SRC (set)) == VOIDmode
6048 : GET_MODE (SET_SRC (set))),
6050 inc_val, mult_val, location,
6053 *multi_insn_incr = 1;
6057 /* ... fall through ... */
6059 /* Can accept constant setting of biv only when inside inner most loop.
6060 Otherwise, a biv of an inner loop may be incorrectly recognized
6061 as a biv of the outer loop,
6062 causing code to be moved INTO the inner loop. */
6064 if (loop_invariant_p (loop, x) != 1)
6069 /* convert_modes aborts if we try to convert to or from CCmode, so just
6070 exclude that case. It is very unlikely that a condition code value
6071 would be a useful iterator anyways. */
6072 if (loop->level == 1
6073 && GET_MODE_CLASS (mode) != MODE_CC
6074 && GET_MODE_CLASS (GET_MODE (dest_reg)) != MODE_CC)
6076 /* Possible bug here? Perhaps we don't know the mode of X. */
6077 *inc_val = convert_modes (GET_MODE (dest_reg), mode, x, 0);
6078 *mult_val = const0_rtx;
6085 return basic_induction_var (loop, XEXP (x, 0), GET_MODE (XEXP (x, 0)),
6086 dest_reg, p, inc_val, mult_val, location,
6090 /* Similar, since this can be a sign extension. */
6091 for (insn = PREV_INSN (p);
6092 (insn && GET_CODE (insn) == NOTE
6093 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG);
6094 insn = PREV_INSN (insn))
6098 set = single_set (insn);
6100 if (set && SET_DEST (set) == XEXP (x, 0)
6101 && GET_CODE (XEXP (x, 1)) == CONST_INT
6102 && INTVAL (XEXP (x, 1)) >= 0
6103 && GET_CODE (SET_SRC (set)) == ASHIFT
6104 && XEXP (x, 1) == XEXP (SET_SRC (set), 1)
6105 && basic_induction_var (loop, XEXP (SET_SRC (set), 0),
6106 GET_MODE (XEXP (x, 0)),
6107 dest_reg, insn, inc_val, mult_val,
6108 location, multi_insn_incr))
6110 *multi_insn_incr = 1;
6120 /* A general induction variable (giv) is any quantity that is a linear
6121 function of a basic induction variable,
6122 i.e. giv = biv * mult_val + add_val.
6123 The coefficients can be any loop invariant quantity.
6124 A giv need not be computed directly from the biv;
6125 it can be computed by way of other givs. */
6127 /* Determine whether X computes a giv.
6128 If it does, return a nonzero value
6129 which is the benefit from eliminating the computation of X;
6130 set *SRC_REG to the register of the biv that it is computed from;
6131 set *ADD_VAL and *MULT_VAL to the coefficients,
6132 such that the value of X is biv * mult + add; */
6135 general_induction_var (loop, x, src_reg, add_val, mult_val, is_addr, pbenefit)
6136 const struct loop *loop;
6147 /* If this is an invariant, forget it, it isn't a giv. */
6148 if (loop_invariant_p (loop, x) == 1)
6151 /* See if the expression could be a giv and get its form.
6152 Mark our place on the obstack in case we don't find a giv. */
6153 storage = (char *) oballoc (0);
6155 x = simplify_giv_expr (loop, x, pbenefit);
6162 switch (GET_CODE (x))
6166 /* Since this is now an invariant and wasn't before, it must be a giv
6167 with MULT_VAL == 0. It doesn't matter which BIV we associate this
6169 *src_reg = loop_iv_list->biv->dest_reg;
6170 *mult_val = const0_rtx;
6175 /* This is equivalent to a BIV. */
6177 *mult_val = const1_rtx;
6178 *add_val = const0_rtx;
6182 /* Either (plus (biv) (invar)) or
6183 (plus (mult (biv) (invar_1)) (invar_2)). */
6184 if (GET_CODE (XEXP (x, 0)) == MULT)
6186 *src_reg = XEXP (XEXP (x, 0), 0);
6187 *mult_val = XEXP (XEXP (x, 0), 1);
6191 *src_reg = XEXP (x, 0);
6192 *mult_val = const1_rtx;
6194 *add_val = XEXP (x, 1);
6198 /* ADD_VAL is zero. */
6199 *src_reg = XEXP (x, 0);
6200 *mult_val = XEXP (x, 1);
6201 *add_val = const0_rtx;
6208 /* Remove any enclosing USE from ADD_VAL and MULT_VAL (there will be
6209 unless they are CONST_INT). */
6210 if (GET_CODE (*add_val) == USE)
6211 *add_val = XEXP (*add_val, 0);
6212 if (GET_CODE (*mult_val) == USE)
6213 *mult_val = XEXP (*mult_val, 0);
6218 *pbenefit += ADDRESS_COST (orig_x) - reg_address_cost;
6220 *pbenefit += rtx_cost (orig_x, MEM) - reg_address_cost;
6224 *pbenefit += rtx_cost (orig_x, SET);
6226 /* Always return true if this is a giv so it will be detected as such,
6227 even if the benefit is zero or negative. This allows elimination
6228 of bivs that might otherwise not be eliminated. */
6232 /* Given an expression, X, try to form it as a linear function of a biv.
6233 We will canonicalize it to be of the form
6234 (plus (mult (BIV) (invar_1))
6236 with possible degeneracies.
6238 The invariant expressions must each be of a form that can be used as a
6239 machine operand. We surround then with a USE rtx (a hack, but localized
6240 and certainly unambiguous!) if not a CONST_INT for simplicity in this
6241 routine; it is the caller's responsibility to strip them.
6243 If no such canonicalization is possible (i.e., two biv's are used or an
6244 expression that is neither invariant nor a biv or giv), this routine
6247 For a non-zero return, the result will have a code of CONST_INT, USE,
6248 REG (for a BIV), PLUS, or MULT. No other codes will occur.
6250 *BENEFIT will be incremented by the benefit of any sub-giv encountered. */
6252 static rtx sge_plus PARAMS ((enum machine_mode, rtx, rtx));
6253 static rtx sge_plus_constant PARAMS ((rtx, rtx));
6254 static int cmp_combine_givs_stats PARAMS ((const PTR, const PTR));
6255 static int cmp_recombine_givs_stats PARAMS ((const PTR, const PTR));
6258 simplify_giv_expr (loop, x, benefit)
6259 const struct loop *loop;
6263 enum machine_mode mode = GET_MODE (x);
6267 /* If this is not an integer mode, or if we cannot do arithmetic in this
6268 mode, this can't be a giv. */
6269 if (mode != VOIDmode
6270 && (GET_MODE_CLASS (mode) != MODE_INT
6271 || GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT))
6274 switch (GET_CODE (x))
6277 arg0 = simplify_giv_expr (loop, XEXP (x, 0), benefit);
6278 arg1 = simplify_giv_expr (loop, XEXP (x, 1), benefit);
6279 if (arg0 == 0 || arg1 == 0)
6282 /* Put constant last, CONST_INT last if both constant. */
6283 if ((GET_CODE (arg0) == USE
6284 || GET_CODE (arg0) == CONST_INT)
6285 && ! ((GET_CODE (arg0) == USE
6286 && GET_CODE (arg1) == USE)
6287 || GET_CODE (arg1) == CONST_INT))
6288 tem = arg0, arg0 = arg1, arg1 = tem;
6290 /* Handle addition of zero, then addition of an invariant. */
6291 if (arg1 == const0_rtx)
6293 else if (GET_CODE (arg1) == CONST_INT || GET_CODE (arg1) == USE)
6294 switch (GET_CODE (arg0))
6298 /* Adding two invariants must result in an invariant, so enclose
6299 addition operation inside a USE and return it. */
6300 if (GET_CODE (arg0) == USE)
6301 arg0 = XEXP (arg0, 0);
6302 if (GET_CODE (arg1) == USE)
6303 arg1 = XEXP (arg1, 0);
6305 if (GET_CODE (arg0) == CONST_INT)
6306 tem = arg0, arg0 = arg1, arg1 = tem;
6307 if (GET_CODE (arg1) == CONST_INT)
6308 tem = sge_plus_constant (arg0, arg1);
6310 tem = sge_plus (mode, arg0, arg1);
6312 if (GET_CODE (tem) != CONST_INT)
6313 tem = gen_rtx_USE (mode, tem);
6318 /* biv + invar or mult + invar. Return sum. */
6319 return gen_rtx_PLUS (mode, arg0, arg1);
6322 /* (a + invar_1) + invar_2. Associate. */
6324 simplify_giv_expr (loop,
6336 /* Each argument must be either REG, PLUS, or MULT. Convert REG to
6337 MULT to reduce cases. */
6338 if (GET_CODE (arg0) == REG)
6339 arg0 = gen_rtx_MULT (mode, arg0, const1_rtx);
6340 if (GET_CODE (arg1) == REG)
6341 arg1 = gen_rtx_MULT (mode, arg1, const1_rtx);
6343 /* Now have PLUS + PLUS, PLUS + MULT, MULT + PLUS, or MULT + MULT.
6344 Put a MULT first, leaving PLUS + PLUS, MULT + PLUS, or MULT + MULT.
6345 Recurse to associate the second PLUS. */
6346 if (GET_CODE (arg1) == MULT)
6347 tem = arg0, arg0 = arg1, arg1 = tem;
6349 if (GET_CODE (arg1) == PLUS)
6351 simplify_giv_expr (loop,
6353 gen_rtx_PLUS (mode, arg0,
6358 /* Now must have MULT + MULT. Distribute if same biv, else not giv. */
6359 if (GET_CODE (arg0) != MULT || GET_CODE (arg1) != MULT)
6362 if (!rtx_equal_p (arg0, arg1))
6365 return simplify_giv_expr (loop,
6374 /* Handle "a - b" as "a + b * (-1)". */
6375 return simplify_giv_expr (loop,
6384 arg0 = simplify_giv_expr (loop, XEXP (x, 0), benefit);
6385 arg1 = simplify_giv_expr (loop, XEXP (x, 1), benefit);
6386 if (arg0 == 0 || arg1 == 0)
6389 /* Put constant last, CONST_INT last if both constant. */
6390 if ((GET_CODE (arg0) == USE || GET_CODE (arg0) == CONST_INT)
6391 && GET_CODE (arg1) != CONST_INT)
6392 tem = arg0, arg0 = arg1, arg1 = tem;
6394 /* If second argument is not now constant, not giv. */
6395 if (GET_CODE (arg1) != USE && GET_CODE (arg1) != CONST_INT)
6398 /* Handle multiply by 0 or 1. */
6399 if (arg1 == const0_rtx)
6402 else if (arg1 == const1_rtx)
6405 switch (GET_CODE (arg0))
6408 /* biv * invar. Done. */
6409 return gen_rtx_MULT (mode, arg0, arg1);
6412 /* Product of two constants. */
6413 return GEN_INT (INTVAL (arg0) * INTVAL (arg1));
6416 /* invar * invar. It is a giv, but very few of these will
6417 actually pay off, so limit to simple registers. */
6418 if (GET_CODE (arg1) != CONST_INT)
6421 arg0 = XEXP (arg0, 0);
6422 if (GET_CODE (arg0) == REG)
6423 tem = gen_rtx_MULT (mode, arg0, arg1);
6424 else if (GET_CODE (arg0) == MULT
6425 && GET_CODE (XEXP (arg0, 0)) == REG
6426 && GET_CODE (XEXP (arg0, 1)) == CONST_INT)
6428 tem = gen_rtx_MULT (mode, XEXP (arg0, 0),
6429 GEN_INT (INTVAL (XEXP (arg0, 1))
6434 return gen_rtx_USE (mode, tem);
6437 /* (a * invar_1) * invar_2. Associate. */
6438 return simplify_giv_expr (loop,
6447 /* (a + invar_1) * invar_2. Distribute. */
6448 return simplify_giv_expr (loop,
6463 /* Shift by constant is multiply by power of two. */
6464 if (GET_CODE (XEXP (x, 1)) != CONST_INT)
6468 simplify_giv_expr (loop,
6471 GEN_INT ((HOST_WIDE_INT) 1
6472 << INTVAL (XEXP (x, 1)))),
6476 /* "-a" is "a * (-1)" */
6477 return simplify_giv_expr (loop,
6478 gen_rtx_MULT (mode, XEXP (x, 0), constm1_rtx),
6482 /* "~a" is "-a - 1". Silly, but easy. */
6483 return simplify_giv_expr (loop,
6484 gen_rtx_MINUS (mode,
6485 gen_rtx_NEG (mode, XEXP (x, 0)),
6490 /* Already in proper form for invariant. */
6494 /* If this is a new register, we can't deal with it. */
6495 if (REGNO (x) >= max_reg_before_loop)
6498 /* Check for biv or giv. */
6499 switch (REG_IV_TYPE (REGNO (x)))
6503 case GENERAL_INDUCT:
6505 struct induction *v = REG_IV_INFO (REGNO (x));
6507 /* Form expression from giv and add benefit. Ensure this giv
6508 can derive another and subtract any needed adjustment if so. */
6509 *benefit += v->benefit;
6513 tem = gen_rtx_PLUS (mode, gen_rtx_MULT (mode,
6514 v->src_reg, v->mult_val),
6517 if (v->derive_adjustment)
6518 tem = gen_rtx_MINUS (mode, tem, v->derive_adjustment);
6519 return simplify_giv_expr (loop, tem, benefit);
6523 /* If it isn't an induction variable, and it is invariant, we
6524 may be able to simplify things further by looking through
6525 the bits we just moved outside the loop. */
6526 if (loop_invariant_p (loop, x) == 1)
6530 for (m = the_movables; m ; m = m->next)
6531 if (rtx_equal_p (x, m->set_dest))
6533 /* Ok, we found a match. Substitute and simplify. */
6535 /* If we match another movable, we must use that, as
6536 this one is going away. */
6538 return simplify_giv_expr (loop, m->match->set_dest,
6541 /* If consec is non-zero, this is a member of a group of
6542 instructions that were moved together. We handle this
6543 case only to the point of seeking to the last insn and
6544 looking for a REG_EQUAL. Fail if we don't find one. */
6549 do { tem = NEXT_INSN (tem); } while (--i > 0);
6551 tem = find_reg_note (tem, REG_EQUAL, NULL_RTX);
6553 tem = XEXP (tem, 0);
6557 tem = single_set (m->insn);
6559 tem = SET_SRC (tem);
6564 /* What we are most interested in is pointer
6565 arithmetic on invariants -- only take
6566 patterns we may be able to do something with. */
6567 if (GET_CODE (tem) == PLUS
6568 || GET_CODE (tem) == MULT
6569 || GET_CODE (tem) == ASHIFT
6570 || GET_CODE (tem) == CONST_INT
6571 || GET_CODE (tem) == SYMBOL_REF)
6573 tem = simplify_giv_expr (loop, tem, benefit);
6577 else if (GET_CODE (tem) == CONST
6578 && GET_CODE (XEXP (tem, 0)) == PLUS
6579 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == SYMBOL_REF
6580 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)
6582 tem = simplify_giv_expr (loop, XEXP (tem, 0),
6594 /* Fall through to general case. */
6596 /* If invariant, return as USE (unless CONST_INT).
6597 Otherwise, not giv. */
6598 if (GET_CODE (x) == USE)
6601 if (loop_invariant_p (loop, x) == 1)
6603 if (GET_CODE (x) == CONST_INT)
6605 if (GET_CODE (x) == CONST
6606 && GET_CODE (XEXP (x, 0)) == PLUS
6607 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
6608 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
6610 return gen_rtx_USE (mode, x);
6617 /* This routine folds invariants such that there is only ever one
6618 CONST_INT in the summation. It is only used by simplify_giv_expr. */
6621 sge_plus_constant (x, c)
6624 if (GET_CODE (x) == CONST_INT)
6625 return GEN_INT (INTVAL (x) + INTVAL (c));
6626 else if (GET_CODE (x) != PLUS)
6627 return gen_rtx_PLUS (GET_MODE (x), x, c);
6628 else if (GET_CODE (XEXP (x, 1)) == CONST_INT)
6630 return gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0),
6631 GEN_INT (INTVAL (XEXP (x, 1)) + INTVAL (c)));
6633 else if (GET_CODE (XEXP (x, 0)) == PLUS
6634 || GET_CODE (XEXP (x, 1)) != PLUS)
6636 return gen_rtx_PLUS (GET_MODE (x),
6637 sge_plus_constant (XEXP (x, 0), c), XEXP (x, 1));
6641 return gen_rtx_PLUS (GET_MODE (x),
6642 sge_plus_constant (XEXP (x, 1), c), XEXP (x, 0));
6647 sge_plus (mode, x, y)
6648 enum machine_mode mode;
6651 while (GET_CODE (y) == PLUS)
6653 rtx a = XEXP (y, 0);
6654 if (GET_CODE (a) == CONST_INT)
6655 x = sge_plus_constant (x, a);
6657 x = gen_rtx_PLUS (mode, x, a);
6660 if (GET_CODE (y) == CONST_INT)
6661 x = sge_plus_constant (x, y);
6663 x = gen_rtx_PLUS (mode, x, y);
6667 /* Help detect a giv that is calculated by several consecutive insns;
6671 The caller has already identified the first insn P as having a giv as dest;
6672 we check that all other insns that set the same register follow
6673 immediately after P, that they alter nothing else,
6674 and that the result of the last is still a giv.
6676 The value is 0 if the reg set in P is not really a giv.
6677 Otherwise, the value is the amount gained by eliminating
6678 all the consecutive insns that compute the value.
6680 FIRST_BENEFIT is the amount gained by eliminating the first insn, P.
6681 SRC_REG is the reg of the biv; DEST_REG is the reg of the giv.
6683 The coefficients of the ultimate giv value are stored in
6684 *MULT_VAL and *ADD_VAL. */
6687 consec_sets_giv (loop, first_benefit, p, src_reg, dest_reg,
6688 add_val, mult_val, last_consec_insn)
6689 const struct loop *loop;
6696 rtx *last_consec_insn;
6704 /* Indicate that this is a giv so that we can update the value produced in
6705 each insn of the multi-insn sequence.
6707 This induction structure will be used only by the call to
6708 general_induction_var below, so we can allocate it on our stack.
6709 If this is a giv, our caller will replace the induct var entry with
6710 a new induction structure. */
6712 = (struct induction *) alloca (sizeof (struct induction));
6713 v->src_reg = src_reg;
6714 v->mult_val = *mult_val;
6715 v->add_val = *add_val;
6716 v->benefit = first_benefit;
6718 v->derive_adjustment = 0;
6720 REG_IV_TYPE (REGNO (dest_reg)) = GENERAL_INDUCT;
6721 REG_IV_INFO (REGNO (dest_reg)) = v;
6723 count = VARRAY_INT (n_times_set, REGNO (dest_reg)) - 1;
6728 code = GET_CODE (p);
6730 /* If libcall, skip to end of call sequence. */
6731 if (code == INSN && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
6735 && (set = single_set (p))
6736 && GET_CODE (SET_DEST (set)) == REG
6737 && SET_DEST (set) == dest_reg
6738 && (general_induction_var (loop, SET_SRC (set), &src_reg,
6739 add_val, mult_val, 0, &benefit)
6740 /* Giv created by equivalent expression. */
6741 || ((temp = find_reg_note (p, REG_EQUAL, NULL_RTX))
6742 && general_induction_var (loop, XEXP (temp, 0), &src_reg,
6743 add_val, mult_val, 0, &benefit)))
6744 && src_reg == v->src_reg)
6746 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
6747 benefit += libcall_benefit (p);
6750 v->mult_val = *mult_val;
6751 v->add_val = *add_val;
6752 v->benefit = benefit;
6754 else if (code != NOTE)
6756 /* Allow insns that set something other than this giv to a
6757 constant. Such insns are needed on machines which cannot
6758 include long constants and should not disqualify a giv. */
6760 && (set = single_set (p))
6761 && SET_DEST (set) != dest_reg
6762 && CONSTANT_P (SET_SRC (set)))
6765 REG_IV_TYPE (REGNO (dest_reg)) = UNKNOWN_INDUCT;
6770 *last_consec_insn = p;
6774 /* Return an rtx, if any, that expresses giv G2 as a function of the register
6775 represented by G1. If no such expression can be found, or it is clear that
6776 it cannot possibly be a valid address, 0 is returned.
6778 To perform the computation, we note that
6781 where `v' is the biv.
6783 So G2 = (y/b) * G1 + (b - a*y/x).
6785 Note that MULT = y/x.
6787 Update: A and B are now allowed to be additive expressions such that
6788 B contains all variables in A. That is, computing B-A will not require
6789 subtracting variables. */
6792 express_from_1 (a, b, mult)
6795 /* If MULT is zero, then A*MULT is zero, and our expression is B. */
6797 if (mult == const0_rtx)
6800 /* If MULT is not 1, we cannot handle A with non-constants, since we
6801 would then be required to subtract multiples of the registers in A.
6802 This is theoretically possible, and may even apply to some Fortran
6803 constructs, but it is a lot of work and we do not attempt it here. */
6805 if (mult != const1_rtx && GET_CODE (a) != CONST_INT)
6808 /* In general these structures are sorted top to bottom (down the PLUS
6809 chain), but not left to right across the PLUS. If B is a higher
6810 order giv than A, we can strip one level and recurse. If A is higher
6811 order, we'll eventually bail out, but won't know that until the end.
6812 If they are the same, we'll strip one level around this loop. */
6814 while (GET_CODE (a) == PLUS && GET_CODE (b) == PLUS)
6816 rtx ra, rb, oa, ob, tmp;
6818 ra = XEXP (a, 0), oa = XEXP (a, 1);
6819 if (GET_CODE (ra) == PLUS)
6820 tmp = ra, ra = oa, oa = tmp;
6822 rb = XEXP (b, 0), ob = XEXP (b, 1);
6823 if (GET_CODE (rb) == PLUS)
6824 tmp = rb, rb = ob, ob = tmp;
6826 if (rtx_equal_p (ra, rb))
6827 /* We matched: remove one reg completely. */
6829 else if (GET_CODE (ob) != PLUS && rtx_equal_p (ra, ob))
6830 /* An alternate match. */
6832 else if (GET_CODE (oa) != PLUS && rtx_equal_p (oa, rb))
6833 /* An alternate match. */
6837 /* Indicates an extra register in B. Strip one level from B and
6838 recurse, hoping B was the higher order expression. */
6839 ob = express_from_1 (a, ob, mult);
6842 return gen_rtx_PLUS (GET_MODE (b), rb, ob);
6846 /* Here we are at the last level of A, go through the cases hoping to
6847 get rid of everything but a constant. */
6849 if (GET_CODE (a) == PLUS)
6853 ra = XEXP (a, 0), oa = XEXP (a, 1);
6854 if (rtx_equal_p (oa, b))
6856 else if (!rtx_equal_p (ra, b))
6859 if (GET_CODE (oa) != CONST_INT)
6862 return GEN_INT (-INTVAL (oa) * INTVAL (mult));
6864 else if (GET_CODE (a) == CONST_INT)
6866 return plus_constant (b, -INTVAL (a) * INTVAL (mult));
6868 else if (GET_CODE (b) == PLUS)
6870 if (rtx_equal_p (a, XEXP (b, 0)))
6872 else if (rtx_equal_p (a, XEXP (b, 1)))
6877 else if (rtx_equal_p (a, b))
6884 express_from (g1, g2)
6885 struct induction *g1, *g2;
6889 /* The value that G1 will be multiplied by must be a constant integer. Also,
6890 the only chance we have of getting a valid address is if b*c/a (see above
6891 for notation) is also an integer. */
6892 if (GET_CODE (g1->mult_val) == CONST_INT
6893 && GET_CODE (g2->mult_val) == CONST_INT)
6895 if (g1->mult_val == const0_rtx
6896 || INTVAL (g2->mult_val) % INTVAL (g1->mult_val) != 0)
6898 mult = GEN_INT (INTVAL (g2->mult_val) / INTVAL (g1->mult_val));
6900 else if (rtx_equal_p (g1->mult_val, g2->mult_val))
6904 /* ??? Find out if the one is a multiple of the other? */
6908 add = express_from_1 (g1->add_val, g2->add_val, mult);
6909 if (add == NULL_RTX)
6911 /* Failed. If we've got a multiplication factor between G1 and G2,
6912 scale G1's addend and try again. */
6913 if (INTVAL (mult) > 1)
6915 rtx g1_add_val = g1->add_val;
6916 if (GET_CODE (g1_add_val) == MULT
6917 && GET_CODE (XEXP (g1_add_val, 1)) == CONST_INT)
6920 m = INTVAL (mult) * INTVAL (XEXP (g1_add_val, 1));
6921 g1_add_val = gen_rtx_MULT (GET_MODE (g1_add_val),
6922 XEXP (g1_add_val, 0), GEN_INT (m));
6926 g1_add_val = gen_rtx_MULT (GET_MODE (g1_add_val), g1_add_val,
6930 add = express_from_1 (g1_add_val, g2->add_val, const1_rtx);
6933 if (add == NULL_RTX)
6936 /* Form simplified final result. */
6937 if (mult == const0_rtx)
6939 else if (mult == const1_rtx)
6940 mult = g1->dest_reg;
6942 mult = gen_rtx_MULT (g2->mode, g1->dest_reg, mult);
6944 if (add == const0_rtx)
6948 if (GET_CODE (add) == PLUS
6949 && CONSTANT_P (XEXP (add, 1)))
6951 rtx tem = XEXP (add, 1);
6952 mult = gen_rtx_PLUS (g2->mode, mult, XEXP (add, 0));
6956 return gen_rtx_PLUS (g2->mode, mult, add);
6961 /* Return an rtx, if any, that expresses giv G2 as a function of the register
6962 represented by G1. This indicates that G2 should be combined with G1 and
6963 that G2 can use (either directly or via an address expression) a register
6964 used to represent G1. */
6967 combine_givs_p (g1, g2)
6968 struct induction *g1, *g2;
6970 rtx tem = express_from (g1, g2);
6972 /* If these givs are identical, they can be combined. We use the results
6973 of express_from because the addends are not in a canonical form, so
6974 rtx_equal_p is a weaker test. */
6975 /* But don't combine a DEST_REG giv with a DEST_ADDR giv; we want the
6976 combination to be the other way round. */
6977 if (tem == g1->dest_reg
6978 && (g1->giv_type == DEST_REG || g2->giv_type == DEST_ADDR))
6980 return g1->dest_reg;
6983 /* If G2 can be expressed as a function of G1 and that function is valid
6984 as an address and no more expensive than using a register for G2,
6985 the expression of G2 in terms of G1 can be used. */
6987 && g2->giv_type == DEST_ADDR
6988 && memory_address_p (g2->mem_mode, tem)
6989 /* ??? Looses, especially with -fforce-addr, where *g2->location
6990 will always be a register, and so anything more complicated
6994 && ADDRESS_COST (tem) <= ADDRESS_COST (*g2->location)
6996 && rtx_cost (tem, MEM) <= rtx_cost (*g2->location, MEM)
7007 struct combine_givs_stats
7014 cmp_combine_givs_stats (xp, yp)
7018 const struct combine_givs_stats * const x =
7019 (const struct combine_givs_stats *) xp;
7020 const struct combine_givs_stats * const y =
7021 (const struct combine_givs_stats *) yp;
7023 d = y->total_benefit - x->total_benefit;
7024 /* Stabilize the sort. */
7026 d = x->giv_number - y->giv_number;
7030 /* Check all pairs of givs for iv_class BL and see if any can be combined with
7031 any other. If so, point SAME to the giv combined with and set NEW_REG to
7032 be an expression (in terms of the other giv's DEST_REG) equivalent to the
7033 giv. Also, update BENEFIT and related fields for cost/benefit analysis. */
7037 struct iv_class *bl;
7039 /* Additional benefit to add for being combined multiple times. */
7040 const int extra_benefit = 3;
7042 struct induction *g1, *g2, **giv_array;
7043 int i, j, k, giv_count;
7044 struct combine_givs_stats *stats;
7047 /* Count givs, because bl->giv_count is incorrect here. */
7049 for (g1 = bl->giv; g1; g1 = g1->next_iv)
7054 = (struct induction **) alloca (giv_count * sizeof (struct induction *));
7056 for (g1 = bl->giv; g1; g1 = g1->next_iv)
7058 giv_array[i++] = g1;
7060 stats = (struct combine_givs_stats *) xcalloc (giv_count, sizeof (*stats));
7061 can_combine = (rtx *) xcalloc (giv_count, giv_count * sizeof(rtx));
7063 for (i = 0; i < giv_count; i++)
7069 stats[i].giv_number = i;
7071 /* If a DEST_REG GIV is used only once, do not allow it to combine
7072 with anything, for in doing so we will gain nothing that cannot
7073 be had by simply letting the GIV with which we would have combined
7074 to be reduced on its own. The losage shows up in particular with
7075 DEST_ADDR targets on hosts with reg+reg addressing, though it can
7076 be seen elsewhere as well. */
7077 if (g1->giv_type == DEST_REG
7078 && (single_use = VARRAY_RTX (reg_single_usage, REGNO (g1->dest_reg)))
7079 && single_use != const0_rtx)
7082 this_benefit = g1->benefit;
7083 /* Add an additional weight for zero addends. */
7084 if (g1->no_const_addval)
7087 for (j = 0; j < giv_count; j++)
7093 && (this_combine = combine_givs_p (g1, g2)) != NULL_RTX)
7095 can_combine[i*giv_count + j] = this_combine;
7096 this_benefit += g2->benefit + extra_benefit;
7099 stats[i].total_benefit = this_benefit;
7102 /* Iterate, combining until we can't. */
7104 qsort (stats, giv_count, sizeof(*stats), cmp_combine_givs_stats);
7106 if (loop_dump_stream)
7108 fprintf (loop_dump_stream, "Sorted combine statistics:\n");
7109 for (k = 0; k < giv_count; k++)
7111 g1 = giv_array[stats[k].giv_number];
7112 if (!g1->combined_with && !g1->same)
7113 fprintf (loop_dump_stream, " {%d, %d}",
7114 INSN_UID (giv_array[stats[k].giv_number]->insn),
7115 stats[k].total_benefit);
7117 putc ('\n', loop_dump_stream);
7120 for (k = 0; k < giv_count; k++)
7122 int g1_add_benefit = 0;
7124 i = stats[k].giv_number;
7127 /* If it has already been combined, skip. */
7128 if (g1->combined_with || g1->same)
7131 for (j = 0; j < giv_count; j++)
7134 if (g1 != g2 && can_combine[i*giv_count + j]
7135 /* If it has already been combined, skip. */
7136 && ! g2->same && ! g2->combined_with)
7140 g2->new_reg = can_combine[i*giv_count + j];
7142 g1->combined_with++;
7143 g1->lifetime += g2->lifetime;
7145 g1_add_benefit += g2->benefit;
7147 /* ??? The new final_[bg]iv_value code does a much better job
7148 of finding replaceable giv's, and hence this code may no
7149 longer be necessary. */
7150 if (! g2->replaceable && REG_USERVAR_P (g2->dest_reg))
7151 g1_add_benefit -= copy_cost;
7153 /* To help optimize the next set of combinations, remove
7154 this giv from the benefits of other potential mates. */
7155 for (l = 0; l < giv_count; ++l)
7157 int m = stats[l].giv_number;
7158 if (can_combine[m*giv_count + j])
7159 stats[l].total_benefit -= g2->benefit + extra_benefit;
7162 if (loop_dump_stream)
7163 fprintf (loop_dump_stream,
7164 "giv at %d combined with giv at %d\n",
7165 INSN_UID (g2->insn), INSN_UID (g1->insn));
7169 /* To help optimize the next set of combinations, remove
7170 this giv from the benefits of other potential mates. */
7171 if (g1->combined_with)
7173 for (j = 0; j < giv_count; ++j)
7175 int m = stats[j].giv_number;
7176 if (can_combine[m*giv_count + i])
7177 stats[j].total_benefit -= g1->benefit + extra_benefit;
7180 g1->benefit += g1_add_benefit;
7182 /* We've finished with this giv, and everything it touched.
7183 Restart the combination so that proper weights for the
7184 rest of the givs are properly taken into account. */
7185 /* ??? Ideally we would compact the arrays at this point, so
7186 as to not cover old ground. But sanely compacting
7187 can_combine is tricky. */
7197 struct recombine_givs_stats
7200 int start_luid, end_luid;
7203 /* Used below as comparison function for qsort. We want a ascending luid
7204 when scanning the array starting at the end, thus the arguments are
7207 cmp_recombine_givs_stats (xp, yp)
7211 const struct recombine_givs_stats * const x =
7212 (const struct recombine_givs_stats *) xp;
7213 const struct recombine_givs_stats * const y =
7214 (const struct recombine_givs_stats *) yp;
7216 d = y->start_luid - x->start_luid;
7217 /* Stabilize the sort. */
7219 d = y->giv_number - x->giv_number;
7223 /* Scan X, which is a part of INSN, for the end of life of a giv. Also
7224 look for the start of life of a giv where the start has not been seen
7225 yet to unlock the search for the end of its life.
7226 Only consider givs that belong to BIV.
7227 Return the total number of lifetime ends that have been found. */
7229 find_life_end (x, stats, insn, biv)
7231 struct recombine_givs_stats *stats;
7238 code = GET_CODE (x);
7243 rtx reg = SET_DEST (x);
7244 if (GET_CODE (reg) == REG)
7246 int regno = REGNO (reg);
7247 struct induction *v = REG_IV_INFO (regno);
7249 if (REG_IV_TYPE (regno) == GENERAL_INDUCT
7251 && v->src_reg == biv
7252 && stats[v->ix].end_luid <= 0)
7254 /* If we see a 0 here for end_luid, it means that we have
7255 scanned the entire loop without finding any use at all.
7256 We must not predicate this code on a start_luid match
7257 since that would make the test fail for givs that have
7258 been hoisted out of inner loops. */
7259 if (stats[v->ix].end_luid == 0)
7261 stats[v->ix].end_luid = stats[v->ix].start_luid;
7262 return 1 + find_life_end (SET_SRC (x), stats, insn, biv);
7264 else if (stats[v->ix].start_luid == INSN_LUID (insn))
7265 stats[v->ix].end_luid = 0;
7267 return find_life_end (SET_SRC (x), stats, insn, biv);
7273 int regno = REGNO (x);
7274 struct induction *v = REG_IV_INFO (regno);
7276 if (REG_IV_TYPE (regno) == GENERAL_INDUCT
7278 && v->src_reg == biv
7279 && stats[v->ix].end_luid == 0)
7281 while (INSN_UID (insn) >= max_uid_for_loop)
7282 insn = NEXT_INSN (insn);
7283 stats[v->ix].end_luid = INSN_LUID (insn);
7296 fmt = GET_RTX_FORMAT (code);
7298 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
7301 retval += find_life_end (XEXP (x, i), stats, insn, biv);
7303 else if (fmt[i] == 'E')
7304 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
7305 retval += find_life_end (XVECEXP (x, i, j), stats, insn, biv);
7310 /* For each giv that has been combined with another, look if
7311 we can combine it with the most recently used one instead.
7312 This tends to shorten giv lifetimes, and helps the next step:
7313 try to derive givs from other givs. */
7315 recombine_givs (loop, bl, unroll_p)
7316 const struct loop *loop;
7317 struct iv_class *bl;
7320 struct induction *v, **giv_array, *last_giv;
7321 struct recombine_givs_stats *stats;
7324 int ends_need_computing;
7326 for (giv_count = 0, v = bl->giv; v; v = v->next_iv)
7332 = (struct induction **) xmalloc (giv_count * sizeof (struct induction *));
7333 stats = (struct recombine_givs_stats *) xmalloc (giv_count * sizeof *stats);
7335 /* Initialize stats and set up the ix field for each giv in stats to name
7336 the corresponding index into stats. */
7337 for (i = 0, v = bl->giv; v; v = v->next_iv)
7344 stats[i].giv_number = i;
7345 /* If this giv has been hoisted out of an inner loop, use the luid of
7346 the previous insn. */
7347 for (p = v->insn; INSN_UID (p) >= max_uid_for_loop; )
7349 stats[i].start_luid = INSN_LUID (p);
7353 qsort (stats, giv_count, sizeof(*stats), cmp_recombine_givs_stats);
7355 /* Set up the ix field for each giv in stats to name
7356 the corresponding index into stats, and
7357 do the actual most-recently-used recombination. */
7358 for (last_giv = 0, i = giv_count - 1; i >= 0; i--)
7360 v = giv_array[stats[i].giv_number];
7364 struct induction *old_same = v->same;
7367 /* combine_givs_p actually says if we can make this transformation.
7368 The other tests are here only to avoid keeping a giv alive
7369 that could otherwise be eliminated. */
7371 && ((old_same->maybe_dead && ! old_same->combined_with)
7372 || ! last_giv->maybe_dead
7373 || last_giv->combined_with)
7374 && (new_combine = combine_givs_p (last_giv, v)))
7376 old_same->combined_with--;
7377 v->new_reg = new_combine;
7379 last_giv->combined_with++;
7380 /* No need to update lifetimes / benefits here since we have
7381 already decided what to reduce. */
7383 if (loop_dump_stream)
7385 fprintf (loop_dump_stream,
7386 "giv at %d recombined with giv at %d as ",
7387 INSN_UID (v->insn), INSN_UID (last_giv->insn));
7388 print_rtl (loop_dump_stream, v->new_reg);
7389 putc ('\n', loop_dump_stream);
7395 else if (v->giv_type != DEST_REG)
7398 || (last_giv->maybe_dead && ! last_giv->combined_with)
7400 || v->combined_with)
7404 ends_need_computing = 0;
7405 /* For each DEST_REG giv, compute lifetime starts, and try to compute
7406 lifetime ends from regscan info. */
7407 for (i = giv_count - 1; i >= 0; i--)
7409 v = giv_array[stats[i].giv_number];
7412 if (v->giv_type == DEST_ADDR)
7414 /* Loop unrolling of an inner loop can even create new DEST_REG
7417 for (p = v->insn; INSN_UID (p) >= max_uid_for_loop; )
7419 stats[i].start_luid = stats[i].end_luid = INSN_LUID (p);
7421 stats[i].end_luid++;
7423 else /* v->giv_type == DEST_REG */
7427 stats[i].start_luid = INSN_LUID (v->insn);
7428 stats[i].end_luid = INSN_LUID (v->last_use);
7430 else if (INSN_UID (v->insn) >= max_uid_for_loop)
7433 /* This insn has been created by loop optimization on an inner
7434 loop. We don't have a proper start_luid that will match
7435 when we see the first set. But we do know that there will
7436 be no use before the set, so we can set end_luid to 0 so that
7437 we'll start looking for the last use right away. */
7438 for (p = PREV_INSN (v->insn); INSN_UID (p) >= max_uid_for_loop; )
7440 stats[i].start_luid = INSN_LUID (p);
7441 stats[i].end_luid = 0;
7442 ends_need_computing++;
7446 int regno = REGNO (v->dest_reg);
7447 int count = VARRAY_INT (n_times_set, regno) - 1;
7450 /* Find the first insn that sets the giv, so that we can verify
7451 if this giv's lifetime wraps around the loop. We also need
7452 the luid of the first setting insn in order to detect the
7453 last use properly. */
7456 p = prev_nonnote_insn (p);
7457 if (reg_set_p (v->dest_reg, p))
7461 stats[i].start_luid = INSN_LUID (p);
7462 if (stats[i].start_luid > uid_luid[REGNO_FIRST_UID (regno)])
7464 stats[i].end_luid = -1;
7465 ends_need_computing++;
7469 stats[i].end_luid = uid_luid[REGNO_LAST_UID (regno)];
7470 if (stats[i].end_luid > INSN_LUID (loop->end))
7472 stats[i].end_luid = -1;
7473 ends_need_computing++;
7480 /* If the regscan information was unconclusive for one or more DEST_REG
7481 givs, scan the all insn in the loop to find out lifetime ends. */
7482 if (ends_need_computing)
7484 rtx biv = bl->biv->src_reg;
7489 if (p == loop->start)
7492 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
7494 ends_need_computing -= find_life_end (PATTERN (p), stats, p, biv);
7496 while (ends_need_computing);
7499 /* Set start_luid back to the last insn that sets the giv. This allows
7500 more combinations. */
7501 for (i = giv_count - 1; i >= 0; i--)
7503 v = giv_array[stats[i].giv_number];
7506 if (INSN_UID (v->insn) < max_uid_for_loop)
7507 stats[i].start_luid = INSN_LUID (v->insn);
7510 /* Now adjust lifetime ends by taking combined givs into account. */
7511 for (i = giv_count - 1; i >= 0; i--)
7516 v = giv_array[stats[i].giv_number];
7519 if (v->same && ! v->same->ignore)
7522 luid = stats[i].start_luid;
7523 /* Use unsigned arithmetic to model loop wrap-around. */
7524 if (luid - stats[j].start_luid
7525 > (unsigned) stats[j].end_luid - stats[j].start_luid)
7526 stats[j].end_luid = luid;
7530 qsort (stats, giv_count, sizeof(*stats), cmp_recombine_givs_stats);
7532 /* Try to derive DEST_REG givs from previous DEST_REG givs with the
7533 same mult_val and non-overlapping lifetime. This reduces register
7535 Once we find a DEST_REG giv that is suitable to derive others from,
7536 we set last_giv to this giv, and try to derive as many other DEST_REG
7537 givs from it without joining overlapping lifetimes. If we then
7538 encounter a DEST_REG giv that we can't derive, we set rescan to the
7539 index for this giv (unless rescan is already set).
7540 When we are finished with the current LAST_GIV (i.e. the inner loop
7541 terminates), we start again with rescan, which then becomes the new
7543 for (i = giv_count - 1; i >= 0; i = rescan)
7545 int life_start = 0, life_end = 0;
7547 for (last_giv = 0, rescan = -1; i >= 0; i--)
7551 v = giv_array[stats[i].giv_number];
7552 if (v->giv_type != DEST_REG || v->derived_from || v->same)
7556 /* Don't use a giv that's likely to be dead to derive
7557 others - that would be likely to keep that giv alive. */
7558 if (! v->maybe_dead || v->combined_with)
7561 life_start = stats[i].start_luid;
7562 life_end = stats[i].end_luid;
7566 /* Use unsigned arithmetic to model loop wrap around. */
7567 if (((unsigned) stats[i].start_luid - life_start
7568 >= (unsigned) life_end - life_start)
7569 && ((unsigned) stats[i].end_luid - life_start
7570 > (unsigned) life_end - life_start)
7571 /* Check that the giv insn we're about to use for deriving
7572 precedes all uses of that giv. Note that initializing the
7573 derived giv would defeat the purpose of reducing register
7575 ??? We could arrange to move the insn. */
7576 && ((unsigned) stats[i].end_luid - INSN_LUID (loop->start)
7577 > (unsigned) stats[i].start_luid - INSN_LUID (loop->start))
7578 && rtx_equal_p (last_giv->mult_val, v->mult_val)
7579 /* ??? Could handle libcalls, but would need more logic. */
7580 && ! find_reg_note (v->insn, REG_RETVAL, NULL_RTX)
7581 /* We would really like to know if for any giv that v
7582 is combined with, v->insn or any intervening biv increment
7583 dominates that combined giv. However, we
7584 don't have this detailed control flow information.
7585 N.B. since last_giv will be reduced, it is valid
7586 anywhere in the loop, so we don't need to check the
7587 validity of last_giv.
7588 We rely here on the fact that v->always_executed implies that
7589 there is no jump to someplace else in the loop before the
7590 giv insn, and hence any insn that is executed before the
7591 giv insn in the loop will have a lower luid. */
7592 && (v->always_executed || ! v->combined_with)
7593 && (sum = express_from (last_giv, v))
7594 /* Make sure we don't make the add more expensive. ADD_COST
7595 doesn't take different costs of registers and constants into
7596 account, so compare the cost of the actual SET_SRCs. */
7597 && (rtx_cost (sum, SET)
7598 <= rtx_cost (SET_SRC (single_set (v->insn)), SET))
7599 /* ??? unroll can't understand anything but reg + const_int
7600 sums. It would be cleaner to fix unroll. */
7601 && ((GET_CODE (sum) == PLUS
7602 && GET_CODE (XEXP (sum, 0)) == REG
7603 && GET_CODE (XEXP (sum, 1)) == CONST_INT)
7605 && validate_change (v->insn, &PATTERN (v->insn),
7606 gen_rtx_SET (VOIDmode, v->dest_reg, sum), 0))
7608 v->derived_from = last_giv;
7609 life_end = stats[i].end_luid;
7611 if (loop_dump_stream)
7613 fprintf (loop_dump_stream,
7614 "giv at %d derived from %d as ",
7615 INSN_UID (v->insn), INSN_UID (last_giv->insn));
7616 print_rtl (loop_dump_stream, sum);
7617 putc ('\n', loop_dump_stream);
7620 else if (rescan < 0)
7630 /* EMIT code before INSERT_BEFORE to set REG = B * M + A. */
7633 emit_iv_add_mult (b, m, a, reg, insert_before)
7634 rtx b; /* initial value of basic induction variable */
7635 rtx m; /* multiplicative constant */
7636 rtx a; /* additive constant */
7637 rtx reg; /* destination register */
7643 /* Prevent unexpected sharing of these rtx. */
7647 /* Increase the lifetime of any invariants moved further in code. */
7648 update_reg_last_use (a, insert_before);
7649 update_reg_last_use (b, insert_before);
7650 update_reg_last_use (m, insert_before);
7653 result = expand_mult_add (b, reg, m, a, GET_MODE (reg), 0);
7655 emit_move_insn (reg, result);
7656 seq = gen_sequence ();
7659 emit_insn_before (seq, insert_before);
7661 /* It is entirely possible that the expansion created lots of new
7662 registers. Iterate over the sequence we just created and
7665 if (GET_CODE (seq) == SEQUENCE)
7668 for (i = 0; i < XVECLEN (seq, 0); ++i)
7670 rtx set = single_set (XVECEXP (seq, 0, i));
7671 if (set && GET_CODE (SET_DEST (set)) == REG)
7672 record_base_value (REGNO (SET_DEST (set)), SET_SRC (set), 0);
7675 else if (GET_CODE (seq) == SET
7676 && GET_CODE (SET_DEST (seq)) == REG)
7677 record_base_value (REGNO (SET_DEST (seq)), SET_SRC (seq), 0);
7680 /* Test whether A * B can be computed without
7681 an actual multiply insn. Value is 1 if so. */
7684 product_cheap_p (a, b)
7690 struct obstack *old_rtl_obstack = rtl_obstack;
7691 char *storage = (char *) obstack_alloc (&temp_obstack, 0);
7694 /* If only one is constant, make it B. */
7695 if (GET_CODE (a) == CONST_INT)
7696 tmp = a, a = b, b = tmp;
7698 /* If first constant, both constant, so don't need multiply. */
7699 if (GET_CODE (a) == CONST_INT)
7702 /* If second not constant, neither is constant, so would need multiply. */
7703 if (GET_CODE (b) != CONST_INT)
7706 /* One operand is constant, so might not need multiply insn. Generate the
7707 code for the multiply and see if a call or multiply, or long sequence
7708 of insns is generated. */
7710 rtl_obstack = &temp_obstack;
7712 expand_mult (GET_MODE (a), a, b, NULL_RTX, 0);
7713 tmp = gen_sequence ();
7716 if (GET_CODE (tmp) == SEQUENCE)
7718 if (XVEC (tmp, 0) == 0)
7720 else if (XVECLEN (tmp, 0) > 3)
7723 for (i = 0; i < XVECLEN (tmp, 0); i++)
7725 rtx insn = XVECEXP (tmp, 0, i);
7727 if (GET_CODE (insn) != INSN
7728 || (GET_CODE (PATTERN (insn)) == SET
7729 && GET_CODE (SET_SRC (PATTERN (insn))) == MULT)
7730 || (GET_CODE (PATTERN (insn)) == PARALLEL
7731 && GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == SET
7732 && GET_CODE (SET_SRC (XVECEXP (PATTERN (insn), 0, 0))) == MULT))
7739 else if (GET_CODE (tmp) == SET
7740 && GET_CODE (SET_SRC (tmp)) == MULT)
7742 else if (GET_CODE (tmp) == PARALLEL
7743 && GET_CODE (XVECEXP (tmp, 0, 0)) == SET
7744 && GET_CODE (SET_SRC (XVECEXP (tmp, 0, 0))) == MULT)
7747 /* Free any storage we obtained in generating this multiply and restore rtl
7748 allocation to its normal obstack. */
7749 obstack_free (&temp_obstack, storage);
7750 rtl_obstack = old_rtl_obstack;
7755 /* Check to see if loop can be terminated by a "decrement and branch until
7756 zero" instruction. If so, add a REG_NONNEG note to the branch insn if so.
7757 Also try reversing an increment loop to a decrement loop
7758 to see if the optimization can be performed.
7759 Value is nonzero if optimization was performed. */
7761 /* This is useful even if the architecture doesn't have such an insn,
7762 because it might change a loops which increments from 0 to n to a loop
7763 which decrements from n to 0. A loop that decrements to zero is usually
7764 faster than one that increments from zero. */
7766 /* ??? This could be rewritten to use some of the loop unrolling procedures,
7767 such as approx_final_value, biv_total_increment, loop_iterations, and
7768 final_[bg]iv_value. */
7771 check_dbra_loop (loop, insn_count)
7775 struct iv_class *bl;
7782 rtx before_comparison;
7786 int compare_and_branch;
7787 rtx loop_start = loop->start;
7788 rtx loop_end = loop->end;
7789 struct loop_info *loop_info = LOOP_INFO (loop);
7791 /* If last insn is a conditional branch, and the insn before tests a
7792 register value, try to optimize it. Otherwise, we can't do anything. */
7794 jump = PREV_INSN (loop_end);
7795 comparison = get_condition_for_loop (loop, jump);
7796 if (comparison == 0)
7799 /* Try to compute whether the compare/branch at the loop end is one or
7800 two instructions. */
7801 get_condition (jump, &first_compare);
7802 if (first_compare == jump)
7803 compare_and_branch = 1;
7804 else if (first_compare == prev_nonnote_insn (jump))
7805 compare_and_branch = 2;
7809 /* Check all of the bivs to see if the compare uses one of them.
7810 Skip biv's set more than once because we can't guarantee that
7811 it will be zero on the last iteration. Also skip if the biv is
7812 used between its update and the test insn. */
7814 for (bl = loop_iv_list; bl; bl = bl->next)
7816 if (bl->biv_count == 1
7817 && ! bl->biv->maybe_multiple
7818 && bl->biv->dest_reg == XEXP (comparison, 0)
7819 && ! reg_used_between_p (regno_reg_rtx[bl->regno], bl->biv->insn,
7827 /* Look for the case where the basic induction variable is always
7828 nonnegative, and equals zero on the last iteration.
7829 In this case, add a reg_note REG_NONNEG, which allows the
7830 m68k DBRA instruction to be used. */
7832 if (((GET_CODE (comparison) == GT
7833 && GET_CODE (XEXP (comparison, 1)) == CONST_INT
7834 && INTVAL (XEXP (comparison, 1)) == -1)
7835 || (GET_CODE (comparison) == NE && XEXP (comparison, 1) == const0_rtx))
7836 && GET_CODE (bl->biv->add_val) == CONST_INT
7837 && INTVAL (bl->biv->add_val) < 0)
7839 /* Initial value must be greater than 0,
7840 init_val % -dec_value == 0 to ensure that it equals zero on
7841 the last iteration */
7843 if (GET_CODE (bl->initial_value) == CONST_INT
7844 && INTVAL (bl->initial_value) > 0
7845 && (INTVAL (bl->initial_value)
7846 % (-INTVAL (bl->biv->add_val))) == 0)
7848 /* register always nonnegative, add REG_NOTE to branch */
7849 REG_NOTES (PREV_INSN (loop_end))
7850 = gen_rtx_EXPR_LIST (REG_NONNEG, NULL_RTX,
7851 REG_NOTES (PREV_INSN (loop_end)));
7857 /* If the decrement is 1 and the value was tested as >= 0 before
7858 the loop, then we can safely optimize. */
7859 for (p = loop_start; p; p = PREV_INSN (p))
7861 if (GET_CODE (p) == CODE_LABEL)
7863 if (GET_CODE (p) != JUMP_INSN)
7866 before_comparison = get_condition_for_loop (loop, p);
7867 if (before_comparison
7868 && XEXP (before_comparison, 0) == bl->biv->dest_reg
7869 && GET_CODE (before_comparison) == LT
7870 && XEXP (before_comparison, 1) == const0_rtx
7871 && ! reg_set_between_p (bl->biv->dest_reg, p, loop_start)
7872 && INTVAL (bl->biv->add_val) == -1)
7874 REG_NOTES (PREV_INSN (loop_end))
7875 = gen_rtx_EXPR_LIST (REG_NONNEG, NULL_RTX,
7876 REG_NOTES (PREV_INSN (loop_end)));
7883 else if (GET_CODE (bl->biv->add_val) == CONST_INT
7884 && INTVAL (bl->biv->add_val) > 0)
7886 /* Try to change inc to dec, so can apply above optimization. */
7888 all registers modified are induction variables or invariant,
7889 all memory references have non-overlapping addresses
7890 (obviously true if only one write)
7891 allow 2 insns for the compare/jump at the end of the loop. */
7892 /* Also, we must avoid any instructions which use both the reversed
7893 biv and another biv. Such instructions will fail if the loop is
7894 reversed. We meet this condition by requiring that either
7895 no_use_except_counting is true, or else that there is only
7897 int num_nonfixed_reads = 0;
7898 /* 1 if the iteration var is used only to count iterations. */
7899 int no_use_except_counting = 0;
7900 /* 1 if the loop has no memory store, or it has a single memory store
7901 which is reversible. */
7902 int reversible_mem_store = 1;
7904 if (bl->giv_count == 0 && ! loop->exit_count)
7906 rtx bivreg = regno_reg_rtx[bl->regno];
7908 /* If there are no givs for this biv, and the only exit is the
7909 fall through at the end of the loop, then
7910 see if perhaps there are no uses except to count. */
7911 no_use_except_counting = 1;
7912 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
7913 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
7915 rtx set = single_set (p);
7917 if (set && GET_CODE (SET_DEST (set)) == REG
7918 && REGNO (SET_DEST (set)) == bl->regno)
7919 /* An insn that sets the biv is okay. */
7921 else if ((p == prev_nonnote_insn (prev_nonnote_insn (loop_end))
7922 || p == prev_nonnote_insn (loop_end))
7923 && reg_mentioned_p (bivreg, PATTERN (p)))
7925 /* If either of these insns uses the biv and sets a pseudo
7926 that has more than one usage, then the biv has uses
7927 other than counting since it's used to derive a value
7928 that is used more than one time. */
7929 int note_set_pseudo_multiple_uses_retval = 0;
7930 note_stores (PATTERN (p), note_set_pseudo_multiple_uses,
7931 ¬e_set_pseudo_multiple_uses_retval);
7932 if (note_set_pseudo_multiple_uses_retval)
7934 no_use_except_counting = 0;
7938 else if (reg_mentioned_p (bivreg, PATTERN (p)))
7940 no_use_except_counting = 0;
7946 if (no_use_except_counting)
7947 ; /* no need to worry about MEMs. */
7948 else if (num_mem_sets <= 1)
7950 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
7951 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
7952 num_nonfixed_reads += count_nonfixed_reads (loop, PATTERN (p));
7954 /* If the loop has a single store, and the destination address is
7955 invariant, then we can't reverse the loop, because this address
7956 might then have the wrong value at loop exit.
7957 This would work if the source was invariant also, however, in that
7958 case, the insn should have been moved out of the loop. */
7960 if (num_mem_sets == 1)
7962 struct induction *v;
7964 reversible_mem_store
7965 = (! unknown_address_altered
7966 && ! unknown_constant_address_altered
7967 && ! loop_invariant_p (loop,
7968 XEXP (XEXP (loop_store_mems, 0),
7971 /* If the store depends on a register that is set after the
7972 store, it depends on the initial value, and is thus not
7974 for (v = bl->giv; reversible_mem_store && v; v = v->next_iv)
7976 if (v->giv_type == DEST_REG
7977 && reg_mentioned_p (v->dest_reg,
7978 PATTERN (first_loop_store_insn))
7979 && loop_insn_first_p (first_loop_store_insn, v->insn))
7980 reversible_mem_store = 0;
7987 /* This code only acts for innermost loops. Also it simplifies
7988 the memory address check by only reversing loops with
7989 zero or one memory access.
7990 Two memory accesses could involve parts of the same array,
7991 and that can't be reversed.
7992 If the biv is used only for counting, than we don't need to worry
7993 about all these things. */
7995 if ((num_nonfixed_reads <= 1
7996 && ! loop_info->has_call
7997 && ! loop_info->has_volatile
7998 && reversible_mem_store
7999 && (bl->giv_count + bl->biv_count + num_mem_sets
8000 + num_movables + compare_and_branch == insn_count)
8001 && (bl == loop_iv_list && bl->next == 0))
8002 || no_use_except_counting)
8006 /* Loop can be reversed. */
8007 if (loop_dump_stream)
8008 fprintf (loop_dump_stream, "Can reverse loop\n");
8010 /* Now check other conditions:
8012 The increment must be a constant, as must the initial value,
8013 and the comparison code must be LT.
8015 This test can probably be improved since +/- 1 in the constant
8016 can be obtained by changing LT to LE and vice versa; this is
8020 /* for constants, LE gets turned into LT */
8021 && (GET_CODE (comparison) == LT
8022 || (GET_CODE (comparison) == LE
8023 && no_use_except_counting)))
8025 HOST_WIDE_INT add_val, add_adjust, comparison_val = 0;
8026 rtx initial_value, comparison_value;
8028 enum rtx_code cmp_code;
8029 int comparison_const_width;
8030 unsigned HOST_WIDE_INT comparison_sign_mask;
8032 add_val = INTVAL (bl->biv->add_val);
8033 comparison_value = XEXP (comparison, 1);
8034 if (GET_MODE (comparison_value) == VOIDmode)
8035 comparison_const_width
8036 = GET_MODE_BITSIZE (GET_MODE (XEXP (comparison, 0)));
8038 comparison_const_width
8039 = GET_MODE_BITSIZE (GET_MODE (comparison_value));
8040 if (comparison_const_width > HOST_BITS_PER_WIDE_INT)
8041 comparison_const_width = HOST_BITS_PER_WIDE_INT;
8042 comparison_sign_mask
8043 = (unsigned HOST_WIDE_INT)1 << (comparison_const_width - 1);
8045 /* If the comparison value is not a loop invariant, then we
8046 can not reverse this loop.
8048 ??? If the insns which initialize the comparison value as
8049 a whole compute an invariant result, then we could move
8050 them out of the loop and proceed with loop reversal. */
8051 if (! loop_invariant_p (loop, comparison_value))
8054 if (GET_CODE (comparison_value) == CONST_INT)
8055 comparison_val = INTVAL (comparison_value);
8056 initial_value = bl->initial_value;
8058 /* Normalize the initial value if it is an integer and
8059 has no other use except as a counter. This will allow
8060 a few more loops to be reversed. */
8061 if (no_use_except_counting
8062 && GET_CODE (comparison_value) == CONST_INT
8063 && GET_CODE (initial_value) == CONST_INT)
8065 comparison_val = comparison_val - INTVAL (bl->initial_value);
8066 /* The code below requires comparison_val to be a multiple
8067 of add_val in order to do the loop reversal, so
8068 round up comparison_val to a multiple of add_val.
8069 Since comparison_value is constant, we know that the
8070 current comparison code is LT. */
8071 comparison_val = comparison_val + add_val - 1;
8073 -= (unsigned HOST_WIDE_INT) comparison_val % add_val;
8074 /* We postpone overflow checks for COMPARISON_VAL here;
8075 even if there is an overflow, we might still be able to
8076 reverse the loop, if converting the loop exit test to
8078 initial_value = const0_rtx;
8081 /* First check if we can do a vanilla loop reversal. */
8082 if (initial_value == const0_rtx
8083 /* If we have a decrement_and_branch_on_count,
8084 prefer the NE test, since this will allow that
8085 instruction to be generated. Note that we must
8086 use a vanilla loop reversal if the biv is used to
8087 calculate a giv or has a non-counting use. */
8088 #if ! defined (HAVE_decrement_and_branch_until_zero) \
8089 && defined (HAVE_decrement_and_branch_on_count)
8090 && (! (add_val == 1 && loop->vtop
8091 && (bl->biv_count == 0
8092 || no_use_except_counting)))
8094 && GET_CODE (comparison_value) == CONST_INT
8095 /* Now do postponed overflow checks on COMPARISON_VAL. */
8096 && ! (((comparison_val - add_val) ^ INTVAL (comparison_value))
8097 & comparison_sign_mask))
8099 /* Register will always be nonnegative, with value
8100 0 on last iteration */
8101 add_adjust = add_val;
8105 else if (add_val == 1 && loop->vtop
8106 && (bl->biv_count == 0
8107 || no_use_except_counting))
8115 if (GET_CODE (comparison) == LE)
8116 add_adjust -= add_val;
8118 /* If the initial value is not zero, or if the comparison
8119 value is not an exact multiple of the increment, then we
8120 can not reverse this loop. */
8121 if (initial_value == const0_rtx
8122 && GET_CODE (comparison_value) == CONST_INT)
8124 if (((unsigned HOST_WIDE_INT) comparison_val % add_val) != 0)
8129 if (! no_use_except_counting || add_val != 1)
8133 final_value = comparison_value;
8135 /* Reset these in case we normalized the initial value
8136 and comparison value above. */
8137 if (GET_CODE (comparison_value) == CONST_INT
8138 && GET_CODE (initial_value) == CONST_INT)
8140 comparison_value = GEN_INT (comparison_val);
8142 = GEN_INT (comparison_val + INTVAL (bl->initial_value));
8144 bl->initial_value = initial_value;
8146 /* Save some info needed to produce the new insns. */
8147 reg = bl->biv->dest_reg;
8148 jump_label = XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end))), 1);
8149 if (jump_label == pc_rtx)
8150 jump_label = XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end))), 2);
8151 new_add_val = GEN_INT (- INTVAL (bl->biv->add_val));
8153 /* Set start_value; if this is not a CONST_INT, we need
8155 Initialize biv to start_value before loop start.
8156 The old initializing insn will be deleted as a
8157 dead store by flow.c. */
8158 if (initial_value == const0_rtx
8159 && GET_CODE (comparison_value) == CONST_INT)
8161 start_value = GEN_INT (comparison_val - add_adjust);
8162 emit_insn_before (gen_move_insn (reg, start_value),
8165 else if (GET_CODE (initial_value) == CONST_INT)
8167 rtx offset = GEN_INT (-INTVAL (initial_value) - add_adjust);
8168 enum machine_mode mode = GET_MODE (reg);
8169 enum insn_code icode
8170 = add_optab->handlers[(int) mode].insn_code;
8172 if (! (*insn_data[icode].operand[0].predicate) (reg, mode)
8173 || ! ((*insn_data[icode].operand[1].predicate)
8174 (comparison_value, mode))
8175 || ! ((*insn_data[icode].operand[2].predicate)
8179 = gen_rtx_PLUS (mode, comparison_value, offset);
8180 emit_insn_before ((GEN_FCN (icode)
8181 (reg, comparison_value, offset)),
8183 if (GET_CODE (comparison) == LE)
8184 final_value = gen_rtx_PLUS (mode, comparison_value,
8187 else if (! add_adjust)
8189 enum machine_mode mode = GET_MODE (reg);
8190 enum insn_code icode
8191 = sub_optab->handlers[(int) mode].insn_code;
8192 if (! (*insn_data[icode].operand[0].predicate) (reg, mode)
8193 || ! ((*insn_data[icode].operand[1].predicate)
8194 (comparison_value, mode))
8195 || ! ((*insn_data[icode].operand[2].predicate)
8196 (initial_value, mode)))
8199 = gen_rtx_MINUS (mode, comparison_value, initial_value);
8200 emit_insn_before ((GEN_FCN (icode)
8201 (reg, comparison_value, initial_value)),
8205 /* We could handle the other cases too, but it'll be
8206 better to have a testcase first. */
8209 /* We may not have a single insn which can increment a reg, so
8210 create a sequence to hold all the insns from expand_inc. */
8212 expand_inc (reg, new_add_val);
8213 tem = gen_sequence ();
8216 p = emit_insn_before (tem, bl->biv->insn);
8217 delete_insn (bl->biv->insn);
8219 /* Update biv info to reflect its new status. */
8221 bl->initial_value = start_value;
8222 bl->biv->add_val = new_add_val;
8224 /* Update loop info. */
8225 loop_info->initial_value = reg;
8226 loop_info->initial_equiv_value = reg;
8227 loop_info->final_value = const0_rtx;
8228 loop_info->final_equiv_value = const0_rtx;
8229 loop_info->comparison_value = const0_rtx;
8230 loop_info->comparison_code = cmp_code;
8231 loop_info->increment = new_add_val;
8233 /* Inc LABEL_NUSES so that delete_insn will
8234 not delete the label. */
8235 LABEL_NUSES (XEXP (jump_label, 0)) ++;
8237 /* Emit an insn after the end of the loop to set the biv's
8238 proper exit value if it is used anywhere outside the loop. */
8239 if ((REGNO_LAST_UID (bl->regno) != INSN_UID (first_compare))
8241 || REGNO_FIRST_UID (bl->regno) != INSN_UID (bl->init_insn))
8242 emit_insn_after (gen_move_insn (reg, final_value),
8245 /* Delete compare/branch at end of loop. */
8246 delete_insn (PREV_INSN (loop_end));
8247 if (compare_and_branch == 2)
8248 delete_insn (first_compare);
8250 /* Add new compare/branch insn at end of loop. */
8252 emit_cmp_and_jump_insns (reg, const0_rtx, cmp_code, NULL_RTX,
8253 GET_MODE (reg), 0, 0,
8254 XEXP (jump_label, 0));
8255 tem = gen_sequence ();
8257 emit_jump_insn_before (tem, loop_end);
8259 for (tem = PREV_INSN (loop_end);
8260 tem && GET_CODE (tem) != JUMP_INSN;
8261 tem = PREV_INSN (tem))
8265 JUMP_LABEL (tem) = XEXP (jump_label, 0);
8271 /* Increment of LABEL_NUSES done above. */
8272 /* Register is now always nonnegative,
8273 so add REG_NONNEG note to the branch. */
8274 REG_NOTES (tem) = gen_rtx_EXPR_LIST (REG_NONNEG, NULL_RTX,
8280 /* No insn may reference both the reversed and another biv or it
8281 will fail (see comment near the top of the loop reversal
8283 Earlier on, we have verified that the biv has no use except
8284 counting, or it is the only biv in this function.
8285 However, the code that computes no_use_except_counting does
8286 not verify reg notes. It's possible to have an insn that
8287 references another biv, and has a REG_EQUAL note with an
8288 expression based on the reversed biv. To avoid this case,
8289 remove all REG_EQUAL notes based on the reversed biv
8291 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
8292 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
8295 rtx set = single_set (p);
8296 /* If this is a set of a GIV based on the reversed biv, any
8297 REG_EQUAL notes should still be correct. */
8299 || GET_CODE (SET_DEST (set)) != REG
8300 || (size_t) REGNO (SET_DEST (set)) >= reg_iv_type->num_elements
8301 || REG_IV_TYPE (REGNO (SET_DEST (set))) != GENERAL_INDUCT
8302 || REG_IV_INFO (REGNO (SET_DEST (set)))->src_reg != bl->biv->src_reg)
8303 for (pnote = ®_NOTES (p); *pnote;)
8305 if (REG_NOTE_KIND (*pnote) == REG_EQUAL
8306 && reg_mentioned_p (regno_reg_rtx[bl->regno],
8308 *pnote = XEXP (*pnote, 1);
8310 pnote = &XEXP (*pnote, 1);
8314 /* Mark that this biv has been reversed. Each giv which depends
8315 on this biv, and which is also live past the end of the loop
8316 will have to be fixed up. */
8320 if (loop_dump_stream)
8322 fprintf (loop_dump_stream, "Reversed loop");
8324 fprintf (loop_dump_stream, " and added reg_nonneg\n");
8326 fprintf (loop_dump_stream, "\n");
8337 /* Verify whether the biv BL appears to be eliminable,
8338 based on the insns in the loop that refer to it.
8340 If ELIMINATE_P is non-zero, actually do the elimination.
8342 THRESHOLD and INSN_COUNT are from loop_optimize and are used to
8343 determine whether invariant insns should be placed inside or at the
8344 start of the loop. */
8347 maybe_eliminate_biv (loop, bl, eliminate_p, threshold, insn_count)
8348 const struct loop *loop;
8349 struct iv_class *bl;
8351 int threshold, insn_count;
8353 rtx reg = bl->biv->dest_reg;
8354 rtx loop_start = loop->start;
8355 rtx loop_end = loop->end;
8358 /* Scan all insns in the loop, stopping if we find one that uses the
8359 biv in a way that we cannot eliminate. */
8361 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
8363 enum rtx_code code = GET_CODE (p);
8364 rtx where = threshold >= insn_count ? loop_start : p;
8366 /* If this is a libcall that sets a giv, skip ahead to its end. */
8367 if (GET_RTX_CLASS (code) == 'i')
8369 rtx note = find_reg_note (p, REG_LIBCALL, NULL_RTX);
8373 rtx last = XEXP (note, 0);
8374 rtx set = single_set (last);
8376 if (set && GET_CODE (SET_DEST (set)) == REG)
8378 unsigned int regno = REGNO (SET_DEST (set));
8380 if (regno < max_reg_before_loop
8381 && REG_IV_TYPE (regno) == GENERAL_INDUCT
8382 && REG_IV_INFO (regno)->src_reg == bl->biv->src_reg)
8387 if ((code == INSN || code == JUMP_INSN || code == CALL_INSN)
8388 && reg_mentioned_p (reg, PATTERN (p))
8389 && ! maybe_eliminate_biv_1 (loop, PATTERN (p), p, bl,
8390 eliminate_p, where))
8392 if (loop_dump_stream)
8393 fprintf (loop_dump_stream,
8394 "Cannot eliminate biv %d: biv used in insn %d.\n",
8395 bl->regno, INSN_UID (p));
8402 if (loop_dump_stream)
8403 fprintf (loop_dump_stream, "biv %d %s eliminated.\n",
8404 bl->regno, eliminate_p ? "was" : "can be");
8411 /* INSN and REFERENCE are instructions in the same insn chain.
8412 Return non-zero if INSN is first. */
8415 loop_insn_first_p (insn, reference)
8416 rtx insn, reference;
8420 for (p = insn, q = reference; ;)
8422 /* Start with test for not first so that INSN == REFERENCE yields not
8424 if (q == insn || ! p)
8426 if (p == reference || ! q)
8429 /* Either of P or Q might be a NOTE. Notes have the same LUID as the
8430 previous insn, hence the <= comparison below does not work if
8432 if (INSN_UID (p) < max_uid_for_loop
8433 && INSN_UID (q) < max_uid_for_loop
8434 && GET_CODE (p) != NOTE)
8435 return INSN_LUID (p) <= INSN_LUID (q);
8437 if (INSN_UID (p) >= max_uid_for_loop
8438 || GET_CODE (p) == NOTE)
8440 if (INSN_UID (q) >= max_uid_for_loop)
8445 /* We are trying to eliminate BIV in INSN using GIV. Return non-zero if
8446 the offset that we have to take into account due to auto-increment /
8447 div derivation is zero. */
8449 biv_elimination_giv_has_0_offset (biv, giv, insn)
8450 struct induction *biv, *giv;
8453 /* If the giv V had the auto-inc address optimization applied
8454 to it, and INSN occurs between the giv insn and the biv
8455 insn, then we'd have to adjust the value used here.
8456 This is rare, so we don't bother to make this possible. */
8457 if (giv->auto_inc_opt
8458 && ((loop_insn_first_p (giv->insn, insn)
8459 && loop_insn_first_p (insn, biv->insn))
8460 || (loop_insn_first_p (biv->insn, insn)
8461 && loop_insn_first_p (insn, giv->insn))))
8464 /* If the giv V was derived from another giv, and INSN does
8465 not occur between the giv insn and the biv insn, then we'd
8466 have to adjust the value used here. This is rare, so we don't
8467 bother to make this possible. */
8468 if (giv->derived_from
8469 && ! (giv->always_executed
8470 && loop_insn_first_p (giv->insn, insn)
8471 && loop_insn_first_p (insn, biv->insn)))
8474 && giv->same->derived_from
8475 && ! (giv->same->always_executed
8476 && loop_insn_first_p (giv->same->insn, insn)
8477 && loop_insn_first_p (insn, biv->insn)))
8483 /* If BL appears in X (part of the pattern of INSN), see if we can
8484 eliminate its use. If so, return 1. If not, return 0.
8486 If BIV does not appear in X, return 1.
8488 If ELIMINATE_P is non-zero, actually do the elimination. WHERE indicates
8489 where extra insns should be added. Depending on how many items have been
8490 moved out of the loop, it will either be before INSN or at the start of
8494 maybe_eliminate_biv_1 (loop, x, insn, bl, eliminate_p, where)
8495 const struct loop *loop;
8497 struct iv_class *bl;
8501 enum rtx_code code = GET_CODE (x);
8502 rtx reg = bl->biv->dest_reg;
8503 enum machine_mode mode = GET_MODE (reg);
8504 struct induction *v;
8516 /* If we haven't already been able to do something with this BIV,
8517 we can't eliminate it. */
8523 /* If this sets the BIV, it is not a problem. */
8524 if (SET_DEST (x) == reg)
8527 /* If this is an insn that defines a giv, it is also ok because
8528 it will go away when the giv is reduced. */
8529 for (v = bl->giv; v; v = v->next_iv)
8530 if (v->giv_type == DEST_REG && SET_DEST (x) == v->dest_reg)
8534 if (SET_DEST (x) == cc0_rtx && SET_SRC (x) == reg)
8536 /* Can replace with any giv that was reduced and
8537 that has (MULT_VAL != 0) and (ADD_VAL == 0).
8538 Require a constant for MULT_VAL, so we know it's nonzero.
8539 ??? We disable this optimization to avoid potential
8542 for (v = bl->giv; v; v = v->next_iv)
8543 if (CONSTANT_P (v->mult_val) && v->mult_val != const0_rtx
8544 && v->add_val == const0_rtx
8545 && ! v->ignore && ! v->maybe_dead && v->always_computable
8549 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8555 /* If the giv has the opposite direction of change,
8556 then reverse the comparison. */
8557 if (INTVAL (v->mult_val) < 0)
8558 new = gen_rtx_COMPARE (GET_MODE (v->new_reg),
8559 const0_rtx, v->new_reg);
8563 /* We can probably test that giv's reduced reg. */
8564 if (validate_change (insn, &SET_SRC (x), new, 0))
8568 /* Look for a giv with (MULT_VAL != 0) and (ADD_VAL != 0);
8569 replace test insn with a compare insn (cmp REDUCED_GIV ADD_VAL).
8570 Require a constant for MULT_VAL, so we know it's nonzero.
8571 ??? Do this only if ADD_VAL is a pointer to avoid a potential
8572 overflow problem. */
8574 for (v = bl->giv; v; v = v->next_iv)
8575 if (CONSTANT_P (v->mult_val) && v->mult_val != const0_rtx
8576 && ! v->ignore && ! v->maybe_dead && v->always_computable
8578 && (GET_CODE (v->add_val) == SYMBOL_REF
8579 || GET_CODE (v->add_val) == LABEL_REF
8580 || GET_CODE (v->add_val) == CONST
8581 || (GET_CODE (v->add_val) == REG
8582 && REGNO_POINTER_FLAG (REGNO (v->add_val)))))
8584 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8590 /* If the giv has the opposite direction of change,
8591 then reverse the comparison. */
8592 if (INTVAL (v->mult_val) < 0)
8593 new = gen_rtx_COMPARE (VOIDmode, copy_rtx (v->add_val),
8596 new = gen_rtx_COMPARE (VOIDmode, v->new_reg,
8597 copy_rtx (v->add_val));
8599 /* Replace biv with the giv's reduced register. */
8600 update_reg_last_use (v->add_val, insn);
8601 if (validate_change (insn, &SET_SRC (PATTERN (insn)), new, 0))
8604 /* Insn doesn't support that constant or invariant. Copy it
8605 into a register (it will be a loop invariant.) */
8606 tem = gen_reg_rtx (GET_MODE (v->new_reg));
8608 emit_insn_before (gen_move_insn (tem, copy_rtx (v->add_val)),
8611 /* Substitute the new register for its invariant value in
8612 the compare expression. */
8613 XEXP (new, (INTVAL (v->mult_val) < 0) ? 0 : 1) = tem;
8614 if (validate_change (insn, &SET_SRC (PATTERN (insn)), new, 0))
8623 case GT: case GE: case GTU: case GEU:
8624 case LT: case LE: case LTU: case LEU:
8625 /* See if either argument is the biv. */
8626 if (XEXP (x, 0) == reg)
8627 arg = XEXP (x, 1), arg_operand = 1;
8628 else if (XEXP (x, 1) == reg)
8629 arg = XEXP (x, 0), arg_operand = 0;
8633 if (CONSTANT_P (arg))
8635 /* First try to replace with any giv that has constant positive
8636 mult_val and constant add_val. We might be able to support
8637 negative mult_val, but it seems complex to do it in general. */
8639 for (v = bl->giv; v; v = v->next_iv)
8640 if (CONSTANT_P (v->mult_val) && INTVAL (v->mult_val) > 0
8641 && (GET_CODE (v->add_val) == SYMBOL_REF
8642 || GET_CODE (v->add_val) == LABEL_REF
8643 || GET_CODE (v->add_val) == CONST
8644 || (GET_CODE (v->add_val) == REG
8645 && REGNO_POINTER_FLAG (REGNO (v->add_val))))
8646 && ! v->ignore && ! v->maybe_dead && v->always_computable
8649 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8655 /* Replace biv with the giv's reduced reg. */
8656 XEXP (x, 1-arg_operand) = v->new_reg;
8658 /* If all constants are actually constant integers and
8659 the derived constant can be directly placed in the COMPARE,
8661 if (GET_CODE (arg) == CONST_INT
8662 && GET_CODE (v->mult_val) == CONST_INT
8663 && GET_CODE (v->add_val) == CONST_INT
8664 && validate_change (insn, &XEXP (x, arg_operand),
8665 GEN_INT (INTVAL (arg)
8666 * INTVAL (v->mult_val)
8667 + INTVAL (v->add_val)), 0))
8670 /* Otherwise, load it into a register. */
8671 tem = gen_reg_rtx (mode);
8672 emit_iv_add_mult (arg, v->mult_val, v->add_val, tem, where);
8673 if (validate_change (insn, &XEXP (x, arg_operand), tem, 0))
8676 /* If that failed, put back the change we made above. */
8677 XEXP (x, 1-arg_operand) = reg;
8680 /* Look for giv with positive constant mult_val and nonconst add_val.
8681 Insert insns to calculate new compare value.
8682 ??? Turn this off due to possible overflow. */
8684 for (v = bl->giv; v; v = v->next_iv)
8685 if (CONSTANT_P (v->mult_val) && INTVAL (v->mult_val) > 0
8686 && ! v->ignore && ! v->maybe_dead && v->always_computable
8692 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8698 tem = gen_reg_rtx (mode);
8700 /* Replace biv with giv's reduced register. */
8701 validate_change (insn, &XEXP (x, 1 - arg_operand),
8704 /* Compute value to compare against. */
8705 emit_iv_add_mult (arg, v->mult_val, v->add_val, tem, where);
8706 /* Use it in this insn. */
8707 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
8708 if (apply_change_group ())
8712 else if (GET_CODE (arg) == REG || GET_CODE (arg) == MEM)
8714 if (loop_invariant_p (loop, arg) == 1)
8716 /* Look for giv with constant positive mult_val and nonconst
8717 add_val. Insert insns to compute new compare value.
8718 ??? Turn this off due to possible overflow. */
8720 for (v = bl->giv; v; v = v->next_iv)
8721 if (CONSTANT_P (v->mult_val) && INTVAL (v->mult_val) > 0
8722 && ! v->ignore && ! v->maybe_dead && v->always_computable
8728 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8734 tem = gen_reg_rtx (mode);
8736 /* Replace biv with giv's reduced register. */
8737 validate_change (insn, &XEXP (x, 1 - arg_operand),
8740 /* Compute value to compare against. */
8741 emit_iv_add_mult (arg, v->mult_val, v->add_val,
8743 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
8744 if (apply_change_group ())
8749 /* This code has problems. Basically, you can't know when
8750 seeing if we will eliminate BL, whether a particular giv
8751 of ARG will be reduced. If it isn't going to be reduced,
8752 we can't eliminate BL. We can try forcing it to be reduced,
8753 but that can generate poor code.
8755 The problem is that the benefit of reducing TV, below should
8756 be increased if BL can actually be eliminated, but this means
8757 we might have to do a topological sort of the order in which
8758 we try to process biv. It doesn't seem worthwhile to do
8759 this sort of thing now. */
8762 /* Otherwise the reg compared with had better be a biv. */
8763 if (GET_CODE (arg) != REG
8764 || REG_IV_TYPE (REGNO (arg)) != BASIC_INDUCT)
8767 /* Look for a pair of givs, one for each biv,
8768 with identical coefficients. */
8769 for (v = bl->giv; v; v = v->next_iv)
8771 struct induction *tv;
8773 if (v->ignore || v->maybe_dead || v->mode != mode)
8776 for (tv = reg_biv_class[REGNO (arg)]->giv; tv; tv = tv->next_iv)
8777 if (! tv->ignore && ! tv->maybe_dead
8778 && rtx_equal_p (tv->mult_val, v->mult_val)
8779 && rtx_equal_p (tv->add_val, v->add_val)
8780 && tv->mode == mode)
8782 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8788 /* Replace biv with its giv's reduced reg. */
8789 XEXP (x, 1-arg_operand) = v->new_reg;
8790 /* Replace other operand with the other giv's
8792 XEXP (x, arg_operand) = tv->new_reg;
8799 /* If we get here, the biv can't be eliminated. */
8803 /* If this address is a DEST_ADDR giv, it doesn't matter if the
8804 biv is used in it, since it will be replaced. */
8805 for (v = bl->giv; v; v = v->next_iv)
8806 if (v->giv_type == DEST_ADDR && v->location == &XEXP (x, 0))
8814 /* See if any subexpression fails elimination. */
8815 fmt = GET_RTX_FORMAT (code);
8816 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
8821 if (! maybe_eliminate_biv_1 (loop, XEXP (x, i), insn, bl,
8822 eliminate_p, where))
8827 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
8828 if (! maybe_eliminate_biv_1 (loop, XVECEXP (x, i, j), insn, bl,
8829 eliminate_p, where))
8838 /* Return nonzero if the last use of REG
8839 is in an insn following INSN in the same basic block. */
8842 last_use_this_basic_block (reg, insn)
8848 n && GET_CODE (n) != CODE_LABEL && GET_CODE (n) != JUMP_INSN;
8851 if (REGNO_LAST_UID (REGNO (reg)) == INSN_UID (n))
8857 /* Called via `note_stores' to record the initial value of a biv. Here we
8858 just record the location of the set and process it later. */
8861 record_initial (dest, set, data)
8864 void *data ATTRIBUTE_UNUSED;
8866 struct iv_class *bl;
8868 if (GET_CODE (dest) != REG
8869 || REGNO (dest) >= max_reg_before_loop
8870 || REG_IV_TYPE (REGNO (dest)) != BASIC_INDUCT)
8873 bl = reg_biv_class[REGNO (dest)];
8875 /* If this is the first set found, record it. */
8876 if (bl->init_insn == 0)
8878 bl->init_insn = note_insn;
8883 /* If any of the registers in X are "old" and currently have a last use earlier
8884 than INSN, update them to have a last use of INSN. Their actual last use
8885 will be the previous insn but it will not have a valid uid_luid so we can't
8889 update_reg_last_use (x, insn)
8893 /* Check for the case where INSN does not have a valid luid. In this case,
8894 there is no need to modify the regno_last_uid, as this can only happen
8895 when code is inserted after the loop_end to set a pseudo's final value,
8896 and hence this insn will never be the last use of x. */
8897 if (GET_CODE (x) == REG && REGNO (x) < max_reg_before_loop
8898 && INSN_UID (insn) < max_uid_for_loop
8899 && uid_luid[REGNO_LAST_UID (REGNO (x))] < uid_luid[INSN_UID (insn)])
8900 REGNO_LAST_UID (REGNO (x)) = INSN_UID (insn);
8904 register const char *fmt = GET_RTX_FORMAT (GET_CODE (x));
8905 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
8908 update_reg_last_use (XEXP (x, i), insn);
8909 else if (fmt[i] == 'E')
8910 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
8911 update_reg_last_use (XVECEXP (x, i, j), insn);
8916 /* Given an insn INSN and condition COND, return the condition in a
8917 canonical form to simplify testing by callers. Specifically:
8919 (1) The code will always be a comparison operation (EQ, NE, GT, etc.).
8920 (2) Both operands will be machine operands; (cc0) will have been replaced.
8921 (3) If an operand is a constant, it will be the second operand.
8922 (4) (LE x const) will be replaced with (LT x <const+1>) and similarly
8923 for GE, GEU, and LEU.
8925 If the condition cannot be understood, or is an inequality floating-point
8926 comparison which needs to be reversed, 0 will be returned.
8928 If REVERSE is non-zero, then reverse the condition prior to canonizing it.
8930 If EARLIEST is non-zero, it is a pointer to a place where the earliest
8931 insn used in locating the condition was found. If a replacement test
8932 of the condition is desired, it should be placed in front of that
8933 insn and we will be sure that the inputs are still valid.
8935 If WANT_REG is non-zero, we wish the condition to be relative to that
8936 register, if possible. Therefore, do not canonicalize the condition
8940 canonicalize_condition (insn, cond, reverse, earliest, want_reg)
8952 int reverse_code = 0;
8953 int did_reverse_condition = 0;
8954 enum machine_mode mode;
8956 code = GET_CODE (cond);
8957 mode = GET_MODE (cond);
8958 op0 = XEXP (cond, 0);
8959 op1 = XEXP (cond, 1);
8963 code = reverse_condition (code);
8964 did_reverse_condition ^= 1;
8970 /* If we are comparing a register with zero, see if the register is set
8971 in the previous insn to a COMPARE or a comparison operation. Perform
8972 the same tests as a function of STORE_FLAG_VALUE as find_comparison_args
8975 while (GET_RTX_CLASS (code) == '<'
8976 && op1 == CONST0_RTX (GET_MODE (op0))
8979 /* Set non-zero when we find something of interest. */
8983 /* If comparison with cc0, import actual comparison from compare
8987 if ((prev = prev_nonnote_insn (prev)) == 0
8988 || GET_CODE (prev) != INSN
8989 || (set = single_set (prev)) == 0
8990 || SET_DEST (set) != cc0_rtx)
8993 op0 = SET_SRC (set);
8994 op1 = CONST0_RTX (GET_MODE (op0));
9000 /* If this is a COMPARE, pick up the two things being compared. */
9001 if (GET_CODE (op0) == COMPARE)
9003 op1 = XEXP (op0, 1);
9004 op0 = XEXP (op0, 0);
9007 else if (GET_CODE (op0) != REG)
9010 /* Go back to the previous insn. Stop if it is not an INSN. We also
9011 stop if it isn't a single set or if it has a REG_INC note because
9012 we don't want to bother dealing with it. */
9014 if ((prev = prev_nonnote_insn (prev)) == 0
9015 || GET_CODE (prev) != INSN
9016 || FIND_REG_INC_NOTE (prev, 0)
9017 || (set = single_set (prev)) == 0)
9020 /* If this is setting OP0, get what it sets it to if it looks
9022 if (rtx_equal_p (SET_DEST (set), op0))
9024 enum machine_mode inner_mode = GET_MODE (SET_SRC (set));
9026 /* ??? We may not combine comparisons done in a CCmode with
9027 comparisons not done in a CCmode. This is to aid targets
9028 like Alpha that have an IEEE compliant EQ instruction, and
9029 a non-IEEE compliant BEQ instruction. The use of CCmode is
9030 actually artificial, simply to prevent the combination, but
9031 should not affect other platforms.
9033 However, we must allow VOIDmode comparisons to match either
9034 CCmode or non-CCmode comparison, because some ports have
9035 modeless comparisons inside branch patterns.
9037 ??? This mode check should perhaps look more like the mode check
9038 in simplify_comparison in combine. */
9040 if ((GET_CODE (SET_SRC (set)) == COMPARE
9043 && GET_MODE_CLASS (inner_mode) == MODE_INT
9044 && (GET_MODE_BITSIZE (inner_mode)
9045 <= HOST_BITS_PER_WIDE_INT)
9046 && (STORE_FLAG_VALUE
9047 & ((HOST_WIDE_INT) 1
9048 << (GET_MODE_BITSIZE (inner_mode) - 1))))
9049 #ifdef FLOAT_STORE_FLAG_VALUE
9051 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
9052 && (REAL_VALUE_NEGATIVE
9053 (FLOAT_STORE_FLAG_VALUE (inner_mode))))
9056 && GET_RTX_CLASS (GET_CODE (SET_SRC (set))) == '<'))
9057 && (((GET_MODE_CLASS (mode) == MODE_CC)
9058 == (GET_MODE_CLASS (inner_mode) == MODE_CC))
9059 || mode == VOIDmode || inner_mode == VOIDmode))
9061 else if (((code == EQ
9063 && (GET_MODE_BITSIZE (inner_mode)
9064 <= HOST_BITS_PER_WIDE_INT)
9065 && GET_MODE_CLASS (inner_mode) == MODE_INT
9066 && (STORE_FLAG_VALUE
9067 & ((HOST_WIDE_INT) 1
9068 << (GET_MODE_BITSIZE (inner_mode) - 1))))
9069 #ifdef FLOAT_STORE_FLAG_VALUE
9071 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
9072 && (REAL_VALUE_NEGATIVE
9073 (FLOAT_STORE_FLAG_VALUE (inner_mode))))
9076 && GET_RTX_CLASS (GET_CODE (SET_SRC (set))) == '<'
9077 && (((GET_MODE_CLASS (mode) == MODE_CC)
9078 == (GET_MODE_CLASS (inner_mode) == MODE_CC))
9079 || mode == VOIDmode || inner_mode == VOIDmode))
9082 /* We might have reversed a LT to get a GE here. But this wasn't
9083 actually the comparison of data, so we don't flag that we
9084 have had to reverse the condition. */
9085 did_reverse_condition ^= 1;
9093 else if (reg_set_p (op0, prev))
9094 /* If this sets OP0, but not directly, we have to give up. */
9099 if (GET_RTX_CLASS (GET_CODE (x)) == '<')
9100 code = GET_CODE (x);
9103 code = reverse_condition (code);
9104 if (code == UNKNOWN)
9106 did_reverse_condition ^= 1;
9110 op0 = XEXP (x, 0), op1 = XEXP (x, 1);
9116 /* If constant is first, put it last. */
9117 if (CONSTANT_P (op0))
9118 code = swap_condition (code), tem = op0, op0 = op1, op1 = tem;
9120 /* If OP0 is the result of a comparison, we weren't able to find what
9121 was really being compared, so fail. */
9122 if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_CC)
9125 /* Canonicalize any ordered comparison with integers involving equality
9126 if we can do computations in the relevant mode and we do not
9129 if (GET_CODE (op1) == CONST_INT
9130 && GET_MODE (op0) != VOIDmode
9131 && GET_MODE_BITSIZE (GET_MODE (op0)) <= HOST_BITS_PER_WIDE_INT)
9133 HOST_WIDE_INT const_val = INTVAL (op1);
9134 unsigned HOST_WIDE_INT uconst_val = const_val;
9135 unsigned HOST_WIDE_INT max_val
9136 = (unsigned HOST_WIDE_INT) GET_MODE_MASK (GET_MODE (op0));
9141 if ((unsigned HOST_WIDE_INT) const_val != max_val >> 1)
9142 code = LT, op1 = GEN_INT (const_val + 1);
9145 /* When cross-compiling, const_val might be sign-extended from
9146 BITS_PER_WORD to HOST_BITS_PER_WIDE_INT */
9148 if ((HOST_WIDE_INT) (const_val & max_val)
9149 != (((HOST_WIDE_INT) 1
9150 << (GET_MODE_BITSIZE (GET_MODE (op0)) - 1))))
9151 code = GT, op1 = GEN_INT (const_val - 1);
9155 if (uconst_val < max_val)
9156 code = LTU, op1 = GEN_INT (uconst_val + 1);
9160 if (uconst_val != 0)
9161 code = GTU, op1 = GEN_INT (uconst_val - 1);
9169 /* If this was floating-point and we reversed anything other than an
9170 EQ or NE or (UN)ORDERED, return zero. */
9171 if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT
9172 && did_reverse_condition
9173 && code != NE && code != EQ && code != UNORDERED && code != ORDERED
9175 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_FLOAT)
9179 /* Never return CC0; return zero instead. */
9184 return gen_rtx_fmt_ee (code, VOIDmode, op0, op1);
9187 /* Given a jump insn JUMP, return the condition that will cause it to branch
9188 to its JUMP_LABEL. If the condition cannot be understood, or is an
9189 inequality floating-point comparison which needs to be reversed, 0 will
9192 If EARLIEST is non-zero, it is a pointer to a place where the earliest
9193 insn used in locating the condition was found. If a replacement test
9194 of the condition is desired, it should be placed in front of that
9195 insn and we will be sure that the inputs are still valid. */
9198 get_condition (jump, earliest)
9205 /* If this is not a standard conditional jump, we can't parse it. */
9206 if (GET_CODE (jump) != JUMP_INSN
9207 || ! condjump_p (jump) || simplejump_p (jump))
9210 cond = XEXP (SET_SRC (PATTERN (jump)), 0);
9212 /* If this branches to JUMP_LABEL when the condition is false, reverse
9215 = GET_CODE (XEXP (SET_SRC (PATTERN (jump)), 2)) == LABEL_REF
9216 && XEXP (XEXP (SET_SRC (PATTERN (jump)), 2), 0) == JUMP_LABEL (jump);
9218 return canonicalize_condition (jump, cond, reverse, earliest, NULL_RTX);
9221 /* Similar to above routine, except that we also put an invariant last
9222 unless both operands are invariants. */
9225 get_condition_for_loop (loop, x)
9226 const struct loop *loop;
9229 rtx comparison = get_condition (x, NULL_PTR);
9232 || ! loop_invariant_p (loop, XEXP (comparison, 0))
9233 || loop_invariant_p (loop, XEXP (comparison, 1)))
9236 return gen_rtx_fmt_ee (swap_condition (GET_CODE (comparison)), VOIDmode,
9237 XEXP (comparison, 1), XEXP (comparison, 0));
9240 #ifdef HAVE_decrement_and_branch_on_count
9241 /* Instrument loop for insertion of bct instruction. We distinguish between
9242 loops with compile-time bounds and those with run-time bounds.
9243 Information from loop_iterations() is used to compute compile-time bounds.
9244 Run-time bounds should use loop preconditioning, but currently ignored.
9251 unsigned HOST_WIDE_INT n_iterations;
9252 rtx loop_start = loop->start;
9253 rtx loop_end = loop->end;
9254 struct loop_info *loop_info = LOOP_INFO (loop);
9255 int loop_num = loop->num;
9258 int increment_direction, compare_direction;
9259 /* If the loop condition is <= or >=, the number of iteration
9260 is 1 more than the range of the bounds of the loop. */
9261 int add_iteration = 0;
9262 enum machine_mode loop_var_mode = word_mode;
9265 /* It's impossible to instrument a competely unrolled loop. */
9266 if (loop_info->unroll_number == loop_info->n_iterations)
9269 /* Make sure that the count register is not in use. */
9270 if (loop_info->used_count_register)
9272 if (loop_dump_stream)
9273 fprintf (loop_dump_stream,
9274 "insert_bct %d: BCT instrumentation failed: count register already in use\n",
9279 /* Make sure that the function has no indirect jumps. */
9280 if (indirect_jump_in_function)
9282 if (loop_dump_stream)
9283 fprintf (loop_dump_stream,
9284 "insert_bct %d: BCT instrumentation failed: indirect jump in function\n",
9289 /* Make sure that the last loop insn is a conditional jump. */
9290 if (GET_CODE (PREV_INSN (loop_end)) != JUMP_INSN
9291 || ! condjump_p (PREV_INSN (loop_end))
9292 || simplejump_p (PREV_INSN (loop_end)))
9294 if (loop_dump_stream)
9295 fprintf (loop_dump_stream,
9296 "insert_bct %d: BCT instrumentation failed: invalid jump at loop end\n",
9301 /* Make sure that the loop does not contain a function call
9302 (the count register might be altered by the called function). */
9303 if (loop_info->has_call)
9305 if (loop_dump_stream)
9306 fprintf (loop_dump_stream,
9307 "insert_bct %d: BCT instrumentation failed: function call in loop\n",
9312 /* Make sure that the loop does not jump via a table.
9313 (the count register might be used to perform the branch on table). */
9314 if (loop_info->has_tablejump)
9316 if (loop_dump_stream)
9317 fprintf (loop_dump_stream,
9318 "insert_bct %d: BCT instrumentation failed: computed branch in the loop\n",
9323 /* Account for loop unrolling in instrumented iteration count. */
9324 if (loop_info->unroll_number > 1)
9325 n_iterations = loop_info->n_iterations / loop_info->unroll_number;
9327 n_iterations = loop_info->n_iterations;
9329 if (n_iterations != 0 && n_iterations < 3)
9331 /* Allow an enclosing outer loop to benefit if possible. */
9332 if (loop_dump_stream)
9333 fprintf (loop_dump_stream,
9334 "insert_bct %d: Too few iterations to benefit from BCT optimization\n",
9339 /* Try to instrument the loop. */
9341 /* Handle the simpler case, where the bounds are known at compile time. */
9342 if (n_iterations > 0)
9344 struct loop *outer_loop;
9345 struct loop_info *outer_loop_info;
9347 /* Mark all enclosing loops that they cannot use count register. */
9348 for (outer_loop = loop; outer_loop; outer_loop = outer_loop->outer)
9350 outer_loop_info = LOOP_INFO (outer_loop);
9351 outer_loop_info->used_count_register = 1;
9353 instrument_loop_bct (loop_start, loop_end, GEN_INT (n_iterations));
9357 /* Handle the more complex case, that the bounds are NOT known
9358 at compile time. In this case we generate run_time calculation
9359 of the number of iterations. */
9361 if (loop_info->iteration_var == 0)
9363 if (loop_dump_stream)
9364 fprintf (loop_dump_stream,
9365 "insert_bct %d: BCT Runtime Instrumentation failed: no loop iteration variable found\n",
9370 if (GET_MODE_CLASS (GET_MODE (loop_info->iteration_var)) != MODE_INT
9371 || GET_MODE_SIZE (GET_MODE (loop_info->iteration_var)) != UNITS_PER_WORD)
9373 if (loop_dump_stream)
9374 fprintf (loop_dump_stream,
9375 "insert_bct %d: BCT Runtime Instrumentation failed: loop variable not integer\n",
9380 /* With runtime bounds, if the compare is of the form '!=' we give up */
9381 if (loop_info->comparison_code == NE)
9383 if (loop_dump_stream)
9384 fprintf (loop_dump_stream,
9385 "insert_bct %d: BCT Runtime Instrumentation failed: runtime bounds with != comparison\n",
9389 /* Use common loop preconditioning code instead. */
9393 /* We rely on the existence of run-time guard to ensure that the
9394 loop executes at least once. */
9396 rtx iterations_num_reg;
9398 unsigned HOST_WIDE_INT increment_value_abs
9399 = INTVAL (increment) * increment_direction;
9401 /* make sure that the increment is a power of two, otherwise (an
9402 expensive) divide is needed. */
9403 if (exact_log2 (increment_value_abs) == -1)
9405 if (loop_dump_stream)
9406 fprintf (loop_dump_stream,
9407 "insert_bct: not instrumenting BCT because the increment is not power of 2\n");
9411 /* compute the number of iterations */
9416 /* Again, the number of iterations is calculated by:
9418 ; compare-val - initial-val + (increment -1) + additional-iteration
9419 ; num_iterations = -----------------------------------------------------------------
9422 /* ??? Do we have to call copy_rtx here before passing rtx to
9424 if (compare_direction > 0)
9426 /* <, <= :the loop variable is increasing */
9427 temp_reg = expand_binop (loop_var_mode, sub_optab,
9428 comparison_value, initial_value,
9429 NULL_RTX, 0, OPTAB_LIB_WIDEN);
9433 temp_reg = expand_binop (loop_var_mode, sub_optab,
9434 initial_value, comparison_value,
9435 NULL_RTX, 0, OPTAB_LIB_WIDEN);
9438 if (increment_value_abs - 1 + add_iteration != 0)
9439 temp_reg = expand_binop (loop_var_mode, add_optab, temp_reg,
9440 GEN_INT (increment_value_abs - 1
9442 NULL_RTX, 0, OPTAB_LIB_WIDEN);
9444 if (increment_value_abs != 1)
9445 iterations_num_reg = expand_binop (loop_var_mode, asr_optab,
9447 GEN_INT (exact_log2 (increment_value_abs)),
9448 NULL_RTX, 0, OPTAB_LIB_WIDEN);
9450 iterations_num_reg = temp_reg;
9452 sequence = gen_sequence ();
9454 emit_insn_before (sequence, loop_start);
9455 instrument_loop_bct (loop_start, loop_end, iterations_num_reg);
9459 #endif /* Complex case */
9462 /* Instrument loop by inserting a bct in it as follows:
9463 1. A new counter register is created.
9464 2. In the head of the loop the new variable is initialized to the value
9465 passed in the loop_num_iterations parameter.
9466 3. At the end of the loop, comparison of the register with 0 is generated.
9467 The created comparison follows the pattern defined for the
9468 decrement_and_branch_on_count insn, so this insn will be generated.
9469 4. The branch on the old variable are deleted. The compare must remain
9470 because it might be used elsewhere. If the loop-variable or condition
9471 register are used elsewhere, they will be eliminated by flow. */
9474 instrument_loop_bct (loop_start, loop_end, loop_num_iterations)
9475 rtx loop_start, loop_end;
9476 rtx loop_num_iterations;
9482 if (HAVE_decrement_and_branch_on_count)
9484 if (loop_dump_stream)
9486 fputs ("instrument_bct: Inserting BCT (", loop_dump_stream);
9487 if (GET_CODE (loop_num_iterations) == CONST_INT)
9488 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC,
9489 INTVAL (loop_num_iterations));
9491 fputs ("runtime", loop_dump_stream);
9492 fputs (" iterations)", loop_dump_stream);
9495 /* Discard original jump to continue loop. Original compare result
9496 may still be live, so it cannot be discarded explicitly. */
9497 delete_insn (PREV_INSN (loop_end));
9499 /* Insert the label which will delimit the start of the loop. */
9500 start_label = gen_label_rtx ();
9501 emit_label_after (start_label, loop_start);
9503 /* Insert initialization of the count register into the loop header. */
9505 counter_reg = gen_reg_rtx (word_mode);
9506 emit_insn (gen_move_insn (counter_reg, loop_num_iterations));
9507 sequence = gen_sequence ();
9509 emit_insn_before (sequence, loop_start);
9511 /* Insert new comparison on the count register instead of the
9512 old one, generating the needed BCT pattern (that will be
9513 later recognized by assembly generation phase). */
9514 emit_jump_insn_before (gen_decrement_and_branch_on_count (counter_reg,
9517 LABEL_NUSES (start_label)++;
9521 #endif /* HAVE_decrement_and_branch_on_count */
9523 /* Scan the function and determine whether it has indirect (computed) jumps.
9525 This is taken mostly from flow.c; similar code exists elsewhere
9526 in the compiler. It may be useful to put this into rtlanal.c. */
9528 indirect_jump_in_function_p (start)
9533 for (insn = start; insn; insn = NEXT_INSN (insn))
9534 if (computed_jump_p (insn))
9540 /* Add MEM to the LOOP_MEMS array, if appropriate. See the
9541 documentation for LOOP_MEMS for the definition of `appropriate'.
9542 This function is called from prescan_loop via for_each_rtx. */
9545 insert_loop_mem (mem, data)
9547 void *data ATTRIBUTE_UNUSED;
9555 switch (GET_CODE (m))
9561 /* We're not interested in MEMs that are only clobbered. */
9565 /* We're not interested in the MEM associated with a
9566 CONST_DOUBLE, so there's no need to traverse into this. */
9570 /* We're not interested in any MEMs that only appear in notes. */
9574 /* This is not a MEM. */
9578 /* See if we've already seen this MEM. */
9579 for (i = 0; i < loop_mems_idx; ++i)
9580 if (rtx_equal_p (m, loop_mems[i].mem))
9582 if (GET_MODE (m) != GET_MODE (loop_mems[i].mem))
9583 /* The modes of the two memory accesses are different. If
9584 this happens, something tricky is going on, and we just
9585 don't optimize accesses to this MEM. */
9586 loop_mems[i].optimize = 0;
9591 /* Resize the array, if necessary. */
9592 if (loop_mems_idx == loop_mems_allocated)
9594 if (loop_mems_allocated != 0)
9595 loop_mems_allocated *= 2;
9597 loop_mems_allocated = 32;
9599 loop_mems = (loop_mem_info*)
9600 xrealloc (loop_mems,
9601 loop_mems_allocated * sizeof (loop_mem_info));
9604 /* Actually insert the MEM. */
9605 loop_mems[loop_mems_idx].mem = m;
9606 /* We can't hoist this MEM out of the loop if it's a BLKmode MEM
9607 because we can't put it in a register. We still store it in the
9608 table, though, so that if we see the same address later, but in a
9609 non-BLK mode, we'll not think we can optimize it at that point. */
9610 loop_mems[loop_mems_idx].optimize = (GET_MODE (m) != BLKmode);
9611 loop_mems[loop_mems_idx].reg = NULL_RTX;
9617 /* Like load_mems, but also ensures that SET_IN_LOOP,
9618 MAY_NOT_OPTIMIZE, REG_SINGLE_USAGE, and INSN_COUNT have the correct
9619 values after load_mems. */
9622 load_mems_and_recount_loop_regs_set (loop, insn_count)
9623 const struct loop *loop;
9626 int nregs = max_reg_num ();
9630 /* Recalculate set_in_loop and friends since load_mems may have
9631 created new registers. */
9632 if (max_reg_num () > nregs)
9638 nregs = max_reg_num ();
9640 if ((unsigned) nregs > set_in_loop->num_elements)
9642 /* Grow all the arrays. */
9643 VARRAY_GROW (set_in_loop, nregs);
9644 VARRAY_GROW (n_times_set, nregs);
9645 VARRAY_GROW (may_not_optimize, nregs);
9646 VARRAY_GROW (reg_single_usage, nregs);
9648 /* Clear the arrays */
9649 bzero ((char *) &set_in_loop->data, nregs * sizeof (int));
9650 bzero ((char *) &may_not_optimize->data, nregs * sizeof (char));
9651 bzero ((char *) ®_single_usage->data, nregs * sizeof (rtx));
9653 count_loop_regs_set (loop->top ? loop->top : loop->start, loop->end,
9654 may_not_optimize, reg_single_usage,
9657 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
9659 VARRAY_CHAR (may_not_optimize, i) = 1;
9660 VARRAY_INT (set_in_loop, i) = 1;
9663 #ifdef AVOID_CCMODE_COPIES
9664 /* Don't try to move insns which set CC registers if we should not
9665 create CCmode register copies. */
9666 for (i = max_reg_num () - 1; i >= FIRST_PSEUDO_REGISTER; i--)
9667 if (GET_MODE_CLASS (GET_MODE (regno_reg_rtx[i])) == MODE_CC)
9668 VARRAY_CHAR (may_not_optimize, i) = 1;
9671 /* Set n_times_set for the new registers. */
9672 bcopy ((char *) (&set_in_loop->data.i[0] + old_nregs),
9673 (char *) (&n_times_set->data.i[0] + old_nregs),
9674 (nregs - old_nregs) * sizeof (int));
9678 /* Move MEMs into registers for the duration of the loop. */
9682 const struct loop *loop;
9684 int maybe_never = 0;
9687 rtx label = NULL_RTX;
9688 rtx end_label = NULL_RTX;
9689 /* Nonzero if the next instruction may never be executed. */
9690 int next_maybe_never = 0;
9691 int last_max_reg = max_reg_num ();
9693 if (loop_mems_idx == 0)
9696 /* Find start of the extended basic block that enters the loop. */
9697 for (p = loop->start;
9698 PREV_INSN (p) && GET_CODE (p) != CODE_LABEL;
9704 /* Build table of mems that get set to constant values before the
9706 for (; p != loop->start; p = NEXT_INSN (p))
9707 cselib_process_insn (p);
9709 /* Check to see if it's possible that some instructions in the
9710 loop are never executed. */
9711 for (p = next_insn_in_loop (loop, loop->scan_start);
9712 p != NULL_RTX && ! maybe_never;
9713 p = next_insn_in_loop (loop, p))
9715 if (GET_CODE (p) == CODE_LABEL)
9717 else if (GET_CODE (p) == JUMP_INSN
9718 /* If we enter the loop in the middle, and scan
9719 around to the beginning, don't set maybe_never
9720 for that. This must be an unconditional jump,
9721 otherwise the code at the top of the loop might
9722 never be executed. Unconditional jumps are
9723 followed a by barrier then loop end. */
9724 && ! (GET_CODE (p) == JUMP_INSN
9725 && JUMP_LABEL (p) == loop->top
9726 && NEXT_INSN (NEXT_INSN (p)) == loop->end
9727 && simplejump_p (p)))
9729 if (!condjump_p (p))
9730 /* Something complicated. */
9733 /* If there are any more instructions in the loop, they
9734 might not be reached. */
9735 next_maybe_never = 1;
9737 else if (next_maybe_never)
9741 /* Actually move the MEMs. */
9742 for (i = 0; i < loop_mems_idx; ++i)
9747 rtx mem = loop_mems[i].mem;
9750 if (MEM_VOLATILE_P (mem)
9751 || loop_invariant_p (loop, XEXP (mem, 0)) != 1)
9752 /* There's no telling whether or not MEM is modified. */
9753 loop_mems[i].optimize = 0;
9755 /* Go through the MEMs written to in the loop to see if this
9756 one is aliased by one of them. */
9757 mem_list_entry = loop_store_mems;
9758 while (mem_list_entry)
9760 if (rtx_equal_p (mem, XEXP (mem_list_entry, 0)))
9762 else if (true_dependence (XEXP (mem_list_entry, 0), VOIDmode,
9765 /* MEM is indeed aliased by this store. */
9766 loop_mems[i].optimize = 0;
9769 mem_list_entry = XEXP (mem_list_entry, 1);
9772 if (flag_float_store && written
9773 && GET_MODE_CLASS (GET_MODE (mem)) == MODE_FLOAT)
9774 loop_mems[i].optimize = 0;
9776 /* If this MEM is written to, we must be sure that there
9777 are no reads from another MEM that aliases this one. */
9778 if (loop_mems[i].optimize && written)
9782 for (j = 0; j < loop_mems_idx; ++j)
9786 else if (true_dependence (mem,
9791 /* It's not safe to hoist loop_mems[i] out of
9792 the loop because writes to it might not be
9793 seen by reads from loop_mems[j]. */
9794 loop_mems[i].optimize = 0;
9800 if (maybe_never && may_trap_p (mem))
9801 /* We can't access the MEM outside the loop; it might
9802 cause a trap that wouldn't have happened otherwise. */
9803 loop_mems[i].optimize = 0;
9805 if (!loop_mems[i].optimize)
9806 /* We thought we were going to lift this MEM out of the
9807 loop, but later discovered that we could not. */
9810 INIT_REG_SET (&copies);
9812 /* Allocate a pseudo for this MEM. We set REG_USERVAR_P in
9813 order to keep scan_loop from moving stores to this MEM
9814 out of the loop just because this REG is neither a
9815 user-variable nor used in the loop test. */
9816 reg = gen_reg_rtx (GET_MODE (mem));
9817 REG_USERVAR_P (reg) = 1;
9818 loop_mems[i].reg = reg;
9820 /* Now, replace all references to the MEM with the
9821 corresponding pesudos. */
9823 for (p = next_insn_in_loop (loop, loop->scan_start);
9825 p = next_insn_in_loop (loop, p))
9830 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
9832 /* See if this copies the mem into a register that isn't
9833 modified afterwards. We'll try to do copy propagation
9834 a little further on. */
9835 set = single_set (p);
9837 /* @@@ This test is _way_ too conservative. */
9839 && GET_CODE (SET_DEST (set)) == REG
9840 && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER
9841 && REGNO (SET_DEST (set)) < last_max_reg
9842 && VARRAY_INT (n_times_set, REGNO (SET_DEST (set))) == 1
9843 && rtx_equal_p (SET_SRC (set), loop_mems[i].mem))
9844 SET_REGNO_REG_SET (&copies, REGNO (SET_DEST (set)));
9847 for_each_rtx (&p, replace_loop_mem, &ri);
9850 if (GET_CODE (p) == CODE_LABEL
9851 || GET_CODE (p) == JUMP_INSN)
9855 if (! apply_change_group ())
9856 /* We couldn't replace all occurrences of the MEM. */
9857 loop_mems[i].optimize = 0;
9860 /* Load the memory immediately before LOOP->START, which is
9861 the NOTE_LOOP_BEG. */
9862 cselib_val *e = cselib_lookup (mem, VOIDmode, 0);
9866 struct elt_loc_list *const_equiv = 0;
9870 struct elt_loc_list *equiv;
9871 struct elt_loc_list *best_equiv = 0;
9872 for (equiv = e->locs; equiv; equiv = equiv->next)
9874 if (CONSTANT_P (equiv->loc))
9875 const_equiv = equiv;
9876 else if (GET_CODE (equiv->loc) == REG)
9879 /* Use the constant equivalence if that is cheap enough. */
9881 best_equiv = const_equiv;
9882 else if (const_equiv
9883 && (rtx_cost (const_equiv->loc, SET)
9884 <= rtx_cost (best_equiv->loc, SET)))
9886 best_equiv = const_equiv;
9890 /* If best_equiv is nonzero, we know that MEM is set to a
9891 constant or register before the loop. We will use this
9892 knowledge to initialize the shadow register with that
9893 constant or reg rather than by loading from MEM. */
9895 best = copy_rtx (best_equiv->loc);
9897 set = gen_move_insn (reg, best);
9898 set = emit_insn_before (set, loop->start);
9900 REG_NOTES (set) = gen_rtx_EXPR_LIST (REG_EQUAL,
9901 copy_rtx (const_equiv->loc),
9906 if (label == NULL_RTX)
9908 /* We must compute the former
9909 right-after-the-end label before we insert
9911 end_label = next_label (loop->end);
9912 label = gen_label_rtx ();
9913 emit_label_after (label, loop->end);
9916 /* Store the memory immediately after END, which is
9917 the NOTE_LOOP_END. */
9918 set = gen_move_insn (copy_rtx (mem), reg);
9919 emit_insn_after (set, label);
9922 if (loop_dump_stream)
9924 fprintf (loop_dump_stream, "Hoisted regno %d %s from ",
9925 REGNO (reg), (written ? "r/w" : "r/o"));
9926 print_rtl (loop_dump_stream, mem);
9927 fputc ('\n', loop_dump_stream);
9930 /* Attempt a bit of copy propagation. This helps untangle the
9931 data flow, and enables {basic,general}_induction_var to find
9933 EXECUTE_IF_SET_IN_REG_SET
9934 (&copies, FIRST_PSEUDO_REGISTER, j,
9936 try_copy_prop (loop, loop_mems[i].reg, j);
9938 CLEAR_REG_SET (&copies);
9942 if (label != NULL_RTX)
9944 /* Now, we need to replace all references to the previous exit
9945 label with the new one. */
9950 for (p = loop->start; p != loop->end; p = NEXT_INSN (p))
9952 for_each_rtx (&p, replace_label, &rr);
9954 /* If this is a JUMP_INSN, then we also need to fix the JUMP_LABEL
9955 field. This is not handled by for_each_rtx because it doesn't
9956 handle unprinted ('0') fields. We need to update JUMP_LABEL
9957 because the immediately following unroll pass will use it.
9958 replace_label would not work anyways, because that only handles
9960 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p) == end_label)
9961 JUMP_LABEL (p) = label;
9968 /* For communication between note_reg_stored and its caller. */
9969 struct note_reg_stored_arg
9975 /* Called via note_stores, record in SET_SEEN whether X, which is written,
9978 note_reg_stored (x, setter, arg)
9979 rtx x, setter ATTRIBUTE_UNUSED;
9982 struct note_reg_stored_arg *t = (struct note_reg_stored_arg *)arg;
9987 /* Try to replace every occurrence of pseudo REGNO with REPLACEMENT.
9988 There must be exactly one insn that sets this pseudo; it will be
9989 deleted if all replacements succeed and we can prove that the register
9990 is not used after the loop. */
9993 try_copy_prop (loop, replacement, regno)
9994 const struct loop *loop;
9998 /* This is the reg that we are copying from. */
9999 rtx reg_rtx = regno_reg_rtx[regno];
10002 /* These help keep track of whether we replaced all uses of the reg. */
10003 int replaced_last = 0;
10004 int store_is_first = 0;
10006 for (insn = next_insn_in_loop (loop, loop->scan_start);
10008 insn = next_insn_in_loop (loop, insn))
10012 /* Only substitute within one extended basic block from the initializing
10014 if (GET_CODE (insn) == CODE_LABEL && init_insn)
10017 if (GET_RTX_CLASS (GET_CODE (insn)) != 'i')
10020 /* Is this the initializing insn? */
10021 set = single_set (insn);
10023 && GET_CODE (SET_DEST (set)) == REG
10024 && REGNO (SET_DEST (set)) == regno)
10030 if (REGNO_FIRST_UID (regno) == INSN_UID (insn))
10031 store_is_first = 1;
10034 /* Only substitute after seeing the initializing insn. */
10035 if (init_insn && insn != init_insn)
10037 struct note_reg_stored_arg arg;
10039 array[0] = reg_rtx;
10040 array[1] = replacement;
10043 for_each_rtx (&insn, replace_loop_reg, array);
10044 if (REGNO_LAST_UID (regno) == INSN_UID (insn))
10047 /* Stop replacing when REPLACEMENT is modified. */
10048 arg.reg = replacement;
10050 note_stores (PATTERN (insn), note_reg_stored, &arg);
10057 if (apply_change_group ())
10059 if (loop_dump_stream)
10060 fprintf (loop_dump_stream, " Replaced reg %d", regno);
10061 if (store_is_first && replaced_last)
10063 PUT_CODE (init_insn, NOTE);
10064 NOTE_LINE_NUMBER (init_insn) = NOTE_INSN_DELETED;
10065 if (loop_dump_stream)
10066 fprintf (loop_dump_stream, ", deleting init_insn (%d)",
10067 INSN_UID (init_insn));
10069 if (loop_dump_stream)
10070 fprintf (loop_dump_stream, ".\n");
10074 /* Replace MEM with its associated pseudo register. This function is
10075 called from load_mems via for_each_rtx. DATA is actually an
10076 rtx_and_int * describing the instruction currently being scanned
10077 and the MEM we are currently replacing. */
10080 replace_loop_mem (mem, data)
10092 switch (GET_CODE (m))
10098 /* We're not interested in the MEM associated with a
10099 CONST_DOUBLE, so there's no need to traverse into one. */
10103 /* This is not a MEM. */
10107 ri = (rtx_and_int*) data;
10110 if (!rtx_equal_p (loop_mems[i].mem, m))
10111 /* This is not the MEM we are currently replacing. */
10116 /* Actually replace the MEM. */
10117 validate_change (insn, mem, loop_mems[i].reg, 1);
10122 /* Replace one register with another. Called through for_each_rtx; PX points
10123 to the rtx being scanned. DATA is actually an array of three rtx's; the
10124 first one is the one to be replaced, and the second one the replacement.
10125 The third one is the current insn. */
10128 replace_loop_reg (px, data)
10133 rtx *array = (rtx *)data;
10139 validate_change (array[2], px, array[1], 1);
10144 /* Replace occurrences of the old exit label for the loop with the new
10145 one. DATA is an rtx_pair containing the old and new labels,
10149 replace_label (x, data)
10154 rtx old_label = ((rtx_pair*) data)->r1;
10155 rtx new_label = ((rtx_pair*) data)->r2;
10160 if (GET_CODE (l) != LABEL_REF)
10163 if (XEXP (l, 0) != old_label)
10166 XEXP (l, 0) = new_label;
10167 ++LABEL_NUSES (new_label);
10168 --LABEL_NUSES (old_label);
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