1 /* Perform various loop optimizations, including strength reduction.
2 Copyright (C) 1987, 1988, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
22 /* This is the loop optimization pass of the compiler.
23 It finds invariant computations within loops and moves them
24 to the beginning of the loop. Then it identifies basic and
25 general induction variables. Strength reduction is applied to the general
26 induction variables, and induction variable elimination is applied to
27 the basic induction variables.
29 It also finds cases where
30 a register is set within the loop by zero-extending a narrower value
31 and changes these to zero the entire register once before the loop
32 and merely copy the low part within the loop.
34 Most of the complexity is in heuristics to decide when it is worth
35 while to do these things. */
44 #include "hard-reg-set.h"
45 #include "basic-block.h"
46 #include "insn-config.h"
47 #include "insn-flags.h"
57 /* Vector mapping INSN_UIDs to luids.
58 The luids are like uids but increase monotonically always.
59 We use them to see whether a jump comes from outside a given loop. */
63 /* Indexed by INSN_UID, contains the ordinal giving the (innermost) loop
64 number the insn is contained in. */
66 struct loop **uid_loop;
68 /* 1 + largest uid of any insn. */
72 /* 1 + luid of last insn. */
76 /* Number of loops detected in current function. Used as index to the
79 static int max_loop_num;
81 /* Bound on pseudo register number before loop optimization.
82 A pseudo has valid regscan info if its number is < max_reg_before_loop. */
83 unsigned int max_reg_before_loop;
85 /* The value to pass to the next call of reg_scan_update. */
86 static int loop_max_reg;
88 /* This obstack is used in product_cheap_p to allocate its rtl. It
89 may call gen_reg_rtx which, in turn, may reallocate regno_reg_rtx.
90 If we used the same obstack that it did, we would be deallocating
93 static struct obstack temp_obstack;
95 /* This is where the pointer to the obstack being used for RTL is stored. */
97 extern struct obstack *rtl_obstack;
99 #define obstack_chunk_alloc xmalloc
100 #define obstack_chunk_free free
102 /* During the analysis of a loop, a chain of `struct movable's
103 is made to record all the movable insns found.
104 Then the entire chain can be scanned to decide which to move. */
108 rtx insn; /* A movable insn */
109 rtx set_src; /* The expression this reg is set from. */
110 rtx set_dest; /* The destination of this SET. */
111 rtx dependencies; /* When INSN is libcall, this is an EXPR_LIST
112 of any registers used within the LIBCALL. */
113 int consec; /* Number of consecutive following insns
114 that must be moved with this one. */
115 unsigned int regno; /* The register it sets */
116 short lifetime; /* lifetime of that register;
117 may be adjusted when matching movables
118 that load the same value are found. */
119 short savings; /* Number of insns we can move for this reg,
120 including other movables that force this
121 or match this one. */
122 unsigned int cond : 1; /* 1 if only conditionally movable */
123 unsigned int force : 1; /* 1 means MUST move this insn */
124 unsigned int global : 1; /* 1 means reg is live outside this loop */
125 /* If PARTIAL is 1, GLOBAL means something different:
126 that the reg is live outside the range from where it is set
127 to the following label. */
128 unsigned int done : 1; /* 1 inhibits further processing of this */
130 unsigned int partial : 1; /* 1 means this reg is used for zero-extending.
131 In particular, moving it does not make it
133 unsigned int move_insn : 1; /* 1 means that we call emit_move_insn to
134 load SRC, rather than copying INSN. */
135 unsigned int move_insn_first:1;/* Same as above, if this is necessary for the
136 first insn of a consecutive sets group. */
137 unsigned int is_equiv : 1; /* 1 means a REG_EQUIV is present on INSN. */
138 enum machine_mode savemode; /* Nonzero means it is a mode for a low part
139 that we should avoid changing when clearing
140 the rest of the reg. */
141 struct movable *match; /* First entry for same value */
142 struct movable *forces; /* An insn that must be moved if this is */
143 struct movable *next;
148 /* Head of movable chain. */
149 struct movable *head;
150 /* Last movable in chain. */
151 struct movable *last;
152 /* Number of movables in the loop. */
156 static struct movables the_movables;
158 FILE *loop_dump_stream;
160 /* Forward declarations. */
162 static void verify_dominator PARAMS ((struct loop *));
163 static void find_and_verify_loops PARAMS ((rtx, struct loops *));
164 static void mark_loop_jump PARAMS ((rtx, struct loop *));
165 static void prescan_loop PARAMS ((struct loop *));
166 static int reg_in_basic_block_p PARAMS ((rtx, rtx));
167 static int consec_sets_invariant_p PARAMS ((const struct loop *,
169 static int labels_in_range_p PARAMS ((rtx, int));
170 static void count_one_set PARAMS ((struct loop_regs *, rtx, rtx,
171 varray_type, rtx *));
173 static void count_loop_regs_set PARAMS ((const struct loop*,
174 varray_type, varray_type,
176 static void note_addr_stored PARAMS ((rtx, rtx, void *));
177 static void note_set_pseudo_multiple_uses PARAMS ((rtx, rtx, void *));
178 static int loop_reg_used_before_p PARAMS ((const struct loop *, rtx, rtx));
179 static void scan_loop PARAMS ((struct loop*, int));
181 static void replace_call_address PARAMS ((rtx, rtx, rtx));
183 static rtx skip_consec_insns PARAMS ((rtx, int));
184 static int libcall_benefit PARAMS ((rtx));
185 static void ignore_some_movables PARAMS ((struct movables *));
186 static void force_movables PARAMS ((struct movables *));
187 static void combine_movables PARAMS ((struct movables *, struct loop_regs *));
188 static int regs_match_p PARAMS ((rtx, rtx, struct movables *));
189 static int rtx_equal_for_loop_p PARAMS ((rtx, rtx, struct movables *,
190 struct loop_regs *));
191 static void add_label_notes PARAMS ((rtx, rtx));
192 static void move_movables PARAMS ((struct loop *loop, struct movables *,
194 static int count_nonfixed_reads PARAMS ((const struct loop *, rtx));
195 static void strength_reduce PARAMS ((struct loop *, int, int));
196 static void find_single_use_in_loop PARAMS ((rtx, rtx, varray_type));
197 static int valid_initial_value_p PARAMS ((rtx, rtx, int, rtx));
198 static void find_mem_givs PARAMS ((const struct loop *, rtx, rtx, int, int));
199 static void record_biv PARAMS ((struct induction *, rtx, rtx, rtx, rtx, rtx *,
201 static void check_final_value PARAMS ((const struct loop *,
202 struct induction *));
203 static void record_giv PARAMS ((const struct loop *, struct induction *,
204 rtx, rtx, rtx, rtx, rtx, rtx, int,
205 enum g_types, int, int, rtx *));
206 static void update_giv_derive PARAMS ((const struct loop *, rtx));
207 static void check_ext_dependant_givs PARAMS ((struct iv_class *,
208 struct loop_info *));
209 static int basic_induction_var PARAMS ((const struct loop *, rtx,
210 enum machine_mode, rtx, rtx,
211 rtx *, rtx *, rtx **));
212 static rtx simplify_giv_expr PARAMS ((const struct loop *, rtx, rtx *, int *));
213 static int general_induction_var PARAMS ((const struct loop *loop, rtx, rtx *,
214 rtx *, rtx *, rtx *, int, int *,
216 static int consec_sets_giv PARAMS ((const struct loop *, int, rtx,
217 rtx, rtx, rtx *, rtx *, rtx *, rtx *));
218 static int check_dbra_loop PARAMS ((struct loop *, int));
219 static rtx express_from_1 PARAMS ((rtx, rtx, rtx));
220 static rtx combine_givs_p PARAMS ((struct induction *, struct induction *));
221 static void combine_givs PARAMS ((struct loop_regs *, struct iv_class *));
222 struct recombine_givs_stats;
223 static int find_life_end PARAMS ((rtx, struct recombine_givs_stats *,
225 static void recombine_givs PARAMS ((const struct loop *, struct iv_class *,
227 static int product_cheap_p PARAMS ((rtx, rtx));
228 static int maybe_eliminate_biv PARAMS ((const struct loop *, struct iv_class *,
230 static int maybe_eliminate_biv_1 PARAMS ((const struct loop *, rtx, rtx,
231 struct iv_class *, int, rtx));
232 static int last_use_this_basic_block PARAMS ((rtx, rtx));
233 static void record_initial PARAMS ((rtx, rtx, void *));
234 static void update_reg_last_use PARAMS ((rtx, rtx));
235 static rtx next_insn_in_loop PARAMS ((const struct loop *, rtx));
236 static void load_mems_and_recount_loop_regs_set PARAMS ((const struct loop*,
238 static void load_mems PARAMS ((const struct loop *));
239 static int insert_loop_mem PARAMS ((rtx *, void *));
240 static int replace_loop_mem PARAMS ((rtx *, void *));
241 static void replace_loop_mems PARAMS ((rtx, rtx, rtx));
242 static int replace_loop_reg PARAMS ((rtx *, void *));
243 static void replace_loop_regs PARAMS ((rtx insn, rtx, rtx));
244 static void note_reg_stored PARAMS ((rtx, rtx, void *));
245 static void try_copy_prop PARAMS ((const struct loop *, rtx, unsigned int));
246 static void try_swap_copy_prop PARAMS ((const struct loop *, rtx,
248 static int replace_label PARAMS ((rtx *, void *));
249 static rtx check_insn_for_givs PARAMS((struct loop *, rtx, int, int));
250 static rtx check_insn_for_bivs PARAMS((struct loop *, rtx, int, int));
251 static int iv_add_mult_cost PARAMS ((rtx, rtx, rtx, rtx));
253 static void loop_dump_aux PARAMS ((const struct loop *, FILE *, int));
254 void debug_loop PARAMS ((const struct loop *));
256 typedef struct rtx_pair {
261 typedef struct loop_replace_args
268 /* Nonzero iff INSN is between START and END, inclusive. */
269 #define INSN_IN_RANGE_P(INSN, START, END) \
270 (INSN_UID (INSN) < max_uid_for_loop \
271 && INSN_LUID (INSN) >= INSN_LUID (START) \
272 && INSN_LUID (INSN) <= INSN_LUID (END))
274 /* Indirect_jump_in_function is computed once per function. */
275 static int indirect_jump_in_function;
276 static int indirect_jump_in_function_p PARAMS ((rtx));
278 static int compute_luids PARAMS ((rtx, rtx, int));
280 static int biv_elimination_giv_has_0_offset PARAMS ((struct induction *,
281 struct induction *, rtx));
283 /* Benefit penalty, if a giv is not replaceable, i.e. must emit an insn to
284 copy the value of the strength reduced giv to its original register. */
285 static int copy_cost;
287 /* Cost of using a register, to normalize the benefits of a giv. */
288 static int reg_address_cost;
293 char *free_point = (char *) oballoc (1);
294 rtx reg = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 1);
296 reg_address_cost = address_cost (reg, SImode);
300 /* Free the objects we just allocated. */
303 /* Initialize the obstack used for rtl in product_cheap_p. */
304 gcc_obstack_init (&temp_obstack);
307 /* Compute the mapping from uids to luids.
308 LUIDs are numbers assigned to insns, like uids,
309 except that luids increase monotonically through the code.
310 Start at insn START and stop just before END. Assign LUIDs
311 starting with PREV_LUID + 1. Return the last assigned LUID + 1. */
313 compute_luids (start, end, prev_luid)
320 for (insn = start, i = prev_luid; insn != end; insn = NEXT_INSN (insn))
322 if (INSN_UID (insn) >= max_uid_for_loop)
324 /* Don't assign luids to line-number NOTEs, so that the distance in
325 luids between two insns is not affected by -g. */
326 if (GET_CODE (insn) != NOTE
327 || NOTE_LINE_NUMBER (insn) <= 0)
328 uid_luid[INSN_UID (insn)] = ++i;
330 /* Give a line number note the same luid as preceding insn. */
331 uid_luid[INSN_UID (insn)] = i;
336 /* Entry point of this file. Perform loop optimization
337 on the current function. F is the first insn of the function
338 and DUMPFILE is a stream for output of a trace of actions taken
339 (or 0 if none should be output). */
342 loop_optimize (f, dumpfile, flags)
343 /* f is the first instruction of a chain of insns for one function */
350 struct loops loops_data;
351 struct loops *loops = &loops_data;
352 struct loop_info *loops_info;
353 static char *moved_once;
355 loop_dump_stream = dumpfile;
357 init_recog_no_volatile ();
359 max_reg_before_loop = max_reg_num ();
360 loop_max_reg = max_reg_before_loop;
364 /* Count the number of loops. */
367 for (insn = f; insn; insn = NEXT_INSN (insn))
369 if (GET_CODE (insn) == NOTE
370 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
374 /* Don't waste time if no loops. */
375 if (max_loop_num == 0)
378 loops->num = max_loop_num;
380 moved_once = (char *) xcalloc (max_reg_before_loop, sizeof (char));
382 /* Get size to use for tables indexed by uids.
383 Leave some space for labels allocated by find_and_verify_loops. */
384 max_uid_for_loop = get_max_uid () + 1 + max_loop_num * 32;
386 uid_luid = (int *) xcalloc (max_uid_for_loop, sizeof (int));
387 uid_loop = (struct loop **) xcalloc (max_uid_for_loop,
388 sizeof (struct loop *));
390 /* Allocate storage for array of loops. */
391 loops->array = (struct loop *)
392 xcalloc (loops->num, sizeof (struct loop));
394 /* Find and process each loop.
395 First, find them, and record them in order of their beginnings. */
396 find_and_verify_loops (f, loops);
398 /* Allocate and initialize auxiliary loop information. */
399 loops_info = xcalloc (loops->num, sizeof (struct loop_info));
400 for (i = 0; i < loops->num; i++)
401 loops->array[i].aux = loops_info + i;
403 /* Now find all register lifetimes. This must be done after
404 find_and_verify_loops, because it might reorder the insns in the
406 reg_scan (f, max_reg_before_loop, 1);
408 /* This must occur after reg_scan so that registers created by gcse
409 will have entries in the register tables.
411 We could have added a call to reg_scan after gcse_main in toplev.c,
412 but moving this call to init_alias_analysis is more efficient. */
413 init_alias_analysis ();
415 /* See if we went too far. Note that get_max_uid already returns
416 one more that the maximum uid of all insn. */
417 if (get_max_uid () > max_uid_for_loop)
419 /* Now reset it to the actual size we need. See above. */
420 max_uid_for_loop = get_max_uid ();
422 /* find_and_verify_loops has already called compute_luids, but it
423 might have rearranged code afterwards, so we need to recompute
425 max_luid = compute_luids (f, NULL_RTX, 0);
427 /* Don't leave gaps in uid_luid for insns that have been
428 deleted. It is possible that the first or last insn
429 using some register has been deleted by cross-jumping.
430 Make sure that uid_luid for that former insn's uid
431 points to the general area where that insn used to be. */
432 for (i = 0; i < max_uid_for_loop; i++)
434 uid_luid[0] = uid_luid[i];
435 if (uid_luid[0] != 0)
438 for (i = 0; i < max_uid_for_loop; i++)
439 if (uid_luid[i] == 0)
440 uid_luid[i] = uid_luid[i - 1];
442 /* Determine if the function has indirect jump. On some systems
443 this prevents low overhead loop instructions from being used. */
444 indirect_jump_in_function = indirect_jump_in_function_p (f);
446 /* Now scan the loops, last ones first, since this means inner ones are done
447 before outer ones. */
448 for (i = max_loop_num - 1; i >= 0; i--)
450 struct loop *loop = &loops->array[i];
451 struct loop_regs *regs = LOOP_REGS (loop);
453 regs->moved_once = moved_once;
455 if (! loop->invalid && loop->end)
456 scan_loop (loop, flags);
459 /* If there were lexical blocks inside the loop, they have been
460 replicated. We will now have more than one NOTE_INSN_BLOCK_BEG
461 and NOTE_INSN_BLOCK_END for each such block. We must duplicate
462 the BLOCKs as well. */
463 if (write_symbols != NO_DEBUG)
466 end_alias_analysis ();
476 /* Returns the next insn, in execution order, after INSN. START and
477 END are the NOTE_INSN_LOOP_BEG and NOTE_INSN_LOOP_END for the loop,
478 respectively. LOOP->TOP, if non-NULL, is the top of the loop in the
479 insn-stream; it is used with loops that are entered near the
483 next_insn_in_loop (loop, insn)
484 const struct loop *loop;
487 insn = NEXT_INSN (insn);
489 if (insn == loop->end)
492 /* Go to the top of the loop, and continue there. */
499 if (insn == loop->scan_start)
506 /* Optimize one loop described by LOOP. */
508 /* ??? Could also move memory writes out of loops if the destination address
509 is invariant, the source is invariant, the memory write is not volatile,
510 and if we can prove that no read inside the loop can read this address
511 before the write occurs. If there is a read of this address after the
512 write, then we can also mark the memory read as invariant. */
515 scan_loop (loop, flags)
519 struct loop_info *loop_info = LOOP_INFO (loop);
520 struct loop_regs *regs = LOOP_REGS (loop);
522 rtx loop_start = loop->start;
523 rtx loop_end = loop->end;
525 /* 1 if we are scanning insns that could be executed zero times. */
527 /* 1 if we are scanning insns that might never be executed
528 due to a subroutine call which might exit before they are reached. */
530 /* Jump insn that enters the loop, or 0 if control drops in. */
531 rtx loop_entry_jump = 0;
532 /* Number of insns in the loop. */
535 rtx temp, update_start, update_end;
536 /* The SET from an insn, if it is the only SET in the insn. */
538 /* Chain describing insns movable in current loop. */
539 struct movables *movables = &the_movables;
540 /* Ratio of extra register life span we can justify
541 for saving an instruction. More if loop doesn't call subroutines
542 since in that case saving an insn makes more difference
543 and more registers are available. */
545 /* Nonzero if we are scanning instructions in a sub-loop. */
555 /* Determine whether this loop starts with a jump down to a test at
556 the end. This will occur for a small number of loops with a test
557 that is too complex to duplicate in front of the loop.
559 We search for the first insn or label in the loop, skipping NOTEs.
560 However, we must be careful not to skip past a NOTE_INSN_LOOP_BEG
561 (because we might have a loop executed only once that contains a
562 loop which starts with a jump to its exit test) or a NOTE_INSN_LOOP_END
563 (in case we have a degenerate loop).
565 Note that if we mistakenly think that a loop is entered at the top
566 when, in fact, it is entered at the exit test, the only effect will be
567 slightly poorer optimization. Making the opposite error can generate
568 incorrect code. Since very few loops now start with a jump to the
569 exit test, the code here to detect that case is very conservative. */
571 for (p = NEXT_INSN (loop_start);
573 && GET_CODE (p) != CODE_LABEL && ! INSN_P (p)
574 && (GET_CODE (p) != NOTE
575 || (NOTE_LINE_NUMBER (p) != NOTE_INSN_LOOP_BEG
576 && NOTE_LINE_NUMBER (p) != NOTE_INSN_LOOP_END));
580 loop->scan_start = p;
582 /* Set up variables describing this loop. */
584 threshold = (loop_info->has_call ? 1 : 2) * (1 + n_non_fixed_regs);
586 /* If loop has a jump before the first label,
587 the true entry is the target of that jump.
588 Start scan from there.
589 But record in LOOP->TOP the place where the end-test jumps
590 back to so we can scan that after the end of the loop. */
591 if (GET_CODE (p) == JUMP_INSN)
595 /* Loop entry must be unconditional jump (and not a RETURN) */
596 if (any_uncondjump_p (p)
597 && JUMP_LABEL (p) != 0
598 /* Check to see whether the jump actually
599 jumps out of the loop (meaning it's no loop).
600 This case can happen for things like
601 do {..} while (0). If this label was generated previously
602 by loop, we can't tell anything about it and have to reject
604 && INSN_IN_RANGE_P (JUMP_LABEL (p), loop_start, loop_end))
606 loop->top = next_label (loop->scan_start);
607 loop->scan_start = JUMP_LABEL (p);
611 /* If LOOP->SCAN_START was an insn created by loop, we don't know its luid
612 as required by loop_reg_used_before_p. So skip such loops. (This
613 test may never be true, but it's best to play it safe.)
615 Also, skip loops where we do not start scanning at a label. This
616 test also rejects loops starting with a JUMP_INSN that failed the
619 if (INSN_UID (loop->scan_start) >= max_uid_for_loop
620 || GET_CODE (loop->scan_start) != CODE_LABEL)
622 if (loop_dump_stream)
623 fprintf (loop_dump_stream, "\nLoop from %d to %d is phony.\n\n",
624 INSN_UID (loop_start), INSN_UID (loop_end));
628 /* Count number of times each reg is set during this loop. Set
629 VARRAY_CHAR (regs->may_not_optimize, I) if it is not safe to move
630 out the setting of register I. Set VARRAY_RTX
631 (regs->single_usage, I). */
633 /* Allocate extra space for REGS that might be created by
634 load_mems. We allocate a little extra slop as well, in the hopes
635 that even after the moving of movables creates some new registers
636 we won't have to reallocate these arrays. However, we do grow
637 the arrays, if necessary, in load_mems_recount_loop_regs_set. */
638 nregs = max_reg_num () + loop_info->mems_idx + 16;
639 VARRAY_INT_INIT (regs->set_in_loop, nregs, "set_in_loop");
640 VARRAY_INT_INIT (regs->n_times_set, nregs, "n_times_set");
641 VARRAY_CHAR_INIT (regs->may_not_optimize, nregs, "may_not_optimize");
642 VARRAY_RTX_INIT (regs->single_usage, nregs, "single_usage");
646 count_loop_regs_set (loop, regs->may_not_optimize, regs->single_usage,
649 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
651 VARRAY_CHAR (regs->may_not_optimize, i) = 1;
652 VARRAY_INT (regs->set_in_loop, i) = 1;
655 #ifdef AVOID_CCMODE_COPIES
656 /* Don't try to move insns which set CC registers if we should not
657 create CCmode register copies. */
658 for (i = max_reg_num () - 1; i >= FIRST_PSEUDO_REGISTER; i--)
659 if (GET_MODE_CLASS (GET_MODE (regno_reg_rtx[i])) == MODE_CC)
660 VARRAY_CHAR (regs->may_not_optimize, i) = 1;
663 bcopy ((char *) ®s->set_in_loop->data,
664 (char *) ®s->n_times_set->data, nregs * sizeof (int));
666 if (loop_dump_stream)
668 fprintf (loop_dump_stream, "\nLoop from %d to %d: %d real insns.\n",
669 INSN_UID (loop_start), INSN_UID (loop_end), insn_count);
671 fprintf (loop_dump_stream, "Continue at insn %d.\n",
672 INSN_UID (loop->cont));
675 /* Scan through the loop finding insns that are safe to move.
676 Set regs->set_in_loop negative for the reg being set, so that
677 this reg will be considered invariant for subsequent insns.
678 We consider whether subsequent insns use the reg
679 in deciding whether it is worth actually moving.
681 MAYBE_NEVER is nonzero if we have passed a conditional jump insn
682 and therefore it is possible that the insns we are scanning
683 would never be executed. At such times, we must make sure
684 that it is safe to execute the insn once instead of zero times.
685 When MAYBE_NEVER is 0, all insns will be executed at least once
686 so that is not a problem. */
688 for (p = next_insn_in_loop (loop, loop->scan_start);
690 p = next_insn_in_loop (loop, p))
692 if (GET_CODE (p) == INSN
693 && (set = single_set (p))
694 && GET_CODE (SET_DEST (set)) == REG
695 && ! VARRAY_CHAR (regs->may_not_optimize, REGNO (SET_DEST (set))))
700 rtx src = SET_SRC (set);
701 rtx dependencies = 0;
703 /* Figure out what to use as a source of this insn. If a REG_EQUIV
704 note is given or if a REG_EQUAL note with a constant operand is
705 specified, use it as the source and mark that we should move
706 this insn by calling emit_move_insn rather that duplicating the
709 Otherwise, only use the REG_EQUAL contents if a REG_RETVAL note
711 temp = find_reg_note (p, REG_EQUIV, NULL_RTX);
713 src = XEXP (temp, 0), move_insn = 1;
716 temp = find_reg_note (p, REG_EQUAL, NULL_RTX);
717 if (temp && CONSTANT_P (XEXP (temp, 0)))
718 src = XEXP (temp, 0), move_insn = 1;
719 if (temp && find_reg_note (p, REG_RETVAL, NULL_RTX))
721 src = XEXP (temp, 0);
722 /* A libcall block can use regs that don't appear in
723 the equivalent expression. To move the libcall,
724 we must move those regs too. */
725 dependencies = libcall_other_reg (p, src);
729 /* Don't try to optimize a register that was made
730 by loop-optimization for an inner loop.
731 We don't know its life-span, so we can't compute the benefit. */
732 if (REGNO (SET_DEST (set)) >= max_reg_before_loop)
734 else if (/* The register is used in basic blocks other
735 than the one where it is set (meaning that
736 something after this point in the loop might
737 depend on its value before the set). */
738 ! reg_in_basic_block_p (p, SET_DEST (set))
739 /* And the set is not guaranteed to be executed one
740 the loop starts, or the value before the set is
741 needed before the set occurs...
743 ??? Note we have quadratic behaviour here, mitigated
744 by the fact that the previous test will often fail for
745 large loops. Rather than re-scanning the entire loop
746 each time for register usage, we should build tables
747 of the register usage and use them here instead. */
749 || loop_reg_used_before_p (loop, set, p)))
750 /* It is unsafe to move the set.
752 This code used to consider it OK to move a set of a variable
753 which was not created by the user and not used in an exit test.
754 That behavior is incorrect and was removed. */
756 else if ((tem = loop_invariant_p (loop, src))
757 && (dependencies == 0
758 || (tem2 = loop_invariant_p (loop, dependencies)) != 0)
759 && (VARRAY_INT (regs->set_in_loop,
760 REGNO (SET_DEST (set))) == 1
762 = consec_sets_invariant_p
763 (loop, SET_DEST (set),
764 VARRAY_INT (regs->set_in_loop,
765 REGNO (SET_DEST (set))),
767 /* If the insn can cause a trap (such as divide by zero),
768 can't move it unless it's guaranteed to be executed
769 once loop is entered. Even a function call might
770 prevent the trap insn from being reached
771 (since it might exit!) */
772 && ! ((maybe_never || call_passed)
773 && may_trap_p (src)))
775 register struct movable *m;
776 register int regno = REGNO (SET_DEST (set));
778 /* A potential lossage is where we have a case where two insns
779 can be combined as long as they are both in the loop, but
780 we move one of them outside the loop. For large loops,
781 this can lose. The most common case of this is the address
782 of a function being called.
784 Therefore, if this register is marked as being used exactly
785 once if we are in a loop with calls (a "large loop"), see if
786 we can replace the usage of this register with the source
787 of this SET. If we can, delete this insn.
789 Don't do this if P has a REG_RETVAL note or if we have
790 SMALL_REGISTER_CLASSES and SET_SRC is a hard register. */
792 if (loop_info->has_call
793 && VARRAY_RTX (regs->single_usage, regno) != 0
794 && VARRAY_RTX (regs->single_usage, regno) != const0_rtx
795 && REGNO_FIRST_UID (regno) == INSN_UID (p)
796 && (REGNO_LAST_UID (regno)
797 == INSN_UID (VARRAY_RTX (regs->single_usage, regno)))
798 && VARRAY_INT (regs->set_in_loop, regno) == 1
799 && ! side_effects_p (SET_SRC (set))
800 && ! find_reg_note (p, REG_RETVAL, NULL_RTX)
801 && (! SMALL_REGISTER_CLASSES
802 || (! (GET_CODE (SET_SRC (set)) == REG
803 && REGNO (SET_SRC (set)) < FIRST_PSEUDO_REGISTER)))
804 /* This test is not redundant; SET_SRC (set) might be
805 a call-clobbered register and the life of REGNO
806 might span a call. */
807 && ! modified_between_p (SET_SRC (set), p,
809 (regs->single_usage, regno))
810 && no_labels_between_p (p, VARRAY_RTX (regs->single_usage,
812 && validate_replace_rtx (SET_DEST (set), SET_SRC (set),
814 (regs->single_usage, regno)))
816 /* Replace any usage in a REG_EQUAL note. Must copy the
817 new source, so that we don't get rtx sharing between the
818 SET_SOURCE and REG_NOTES of insn p. */
819 REG_NOTES (VARRAY_RTX (regs->single_usage, regno))
820 = replace_rtx (REG_NOTES (VARRAY_RTX
821 (regs->single_usage, regno)),
822 SET_DEST (set), copy_rtx (SET_SRC (set)));
825 NOTE_LINE_NUMBER (p) = NOTE_INSN_DELETED;
826 NOTE_SOURCE_FILE (p) = 0;
827 VARRAY_INT (regs->set_in_loop, regno) = 0;
831 m = (struct movable *) alloca (sizeof (struct movable));
835 m->dependencies = dependencies;
836 m->set_dest = SET_DEST (set);
838 m->consec = VARRAY_INT (regs->set_in_loop,
839 REGNO (SET_DEST (set))) - 1;
843 m->move_insn = move_insn;
844 m->move_insn_first = 0;
845 m->is_equiv = (find_reg_note (p, REG_EQUIV, NULL_RTX) != 0);
846 m->savemode = VOIDmode;
848 /* Set M->cond if either loop_invariant_p
849 or consec_sets_invariant_p returned 2
850 (only conditionally invariant). */
851 m->cond = ((tem | tem1 | tem2) > 1);
852 m->global = (uid_luid[REGNO_LAST_UID (regno)]
853 > INSN_LUID (loop_end)
854 || uid_luid[REGNO_FIRST_UID (regno)] < INSN_LUID (loop_start));
856 m->lifetime = (uid_luid[REGNO_LAST_UID (regno)]
857 - uid_luid[REGNO_FIRST_UID (regno)]);
858 m->savings = VARRAY_INT (regs->n_times_set, regno);
859 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
860 m->savings += libcall_benefit (p);
861 VARRAY_INT (regs->set_in_loop, regno) = move_insn ? -2 : -1;
862 /* Add M to the end of the chain MOVABLES. */
863 if (movables->head == 0)
866 movables->last->next = m;
871 /* It is possible for the first instruction to have a
872 REG_EQUAL note but a non-invariant SET_SRC, so we must
873 remember the status of the first instruction in case
874 the last instruction doesn't have a REG_EQUAL note. */
875 m->move_insn_first = m->move_insn;
877 /* Skip this insn, not checking REG_LIBCALL notes. */
878 p = next_nonnote_insn (p);
879 /* Skip the consecutive insns, if there are any. */
880 p = skip_consec_insns (p, m->consec);
881 /* Back up to the last insn of the consecutive group. */
882 p = prev_nonnote_insn (p);
884 /* We must now reset m->move_insn, m->is_equiv, and possibly
885 m->set_src to correspond to the effects of all the
887 temp = find_reg_note (p, REG_EQUIV, NULL_RTX);
889 m->set_src = XEXP (temp, 0), m->move_insn = 1;
892 temp = find_reg_note (p, REG_EQUAL, NULL_RTX);
893 if (temp && CONSTANT_P (XEXP (temp, 0)))
894 m->set_src = XEXP (temp, 0), m->move_insn = 1;
899 m->is_equiv = (find_reg_note (p, REG_EQUIV, NULL_RTX) != 0);
902 /* If this register is always set within a STRICT_LOW_PART
903 or set to zero, then its high bytes are constant.
904 So clear them outside the loop and within the loop
905 just load the low bytes.
906 We must check that the machine has an instruction to do so.
907 Also, if the value loaded into the register
908 depends on the same register, this cannot be done. */
909 else if (SET_SRC (set) == const0_rtx
910 && GET_CODE (NEXT_INSN (p)) == INSN
911 && (set1 = single_set (NEXT_INSN (p)))
912 && GET_CODE (set1) == SET
913 && (GET_CODE (SET_DEST (set1)) == STRICT_LOW_PART)
914 && (GET_CODE (XEXP (SET_DEST (set1), 0)) == SUBREG)
915 && (SUBREG_REG (XEXP (SET_DEST (set1), 0))
917 && !reg_mentioned_p (SET_DEST (set), SET_SRC (set1)))
919 register int regno = REGNO (SET_DEST (set));
920 if (VARRAY_INT (regs->set_in_loop, regno) == 2)
922 register struct movable *m;
923 m = (struct movable *) alloca (sizeof (struct movable));
926 m->set_dest = SET_DEST (set);
933 m->move_insn_first = 0;
935 /* If the insn may not be executed on some cycles,
936 we can't clear the whole reg; clear just high part.
937 Not even if the reg is used only within this loop.
944 Clearing x before the inner loop could clobber a value
945 being saved from the last time around the outer loop.
946 However, if the reg is not used outside this loop
947 and all uses of the register are in the same
948 basic block as the store, there is no problem.
950 If this insn was made by loop, we don't know its
951 INSN_LUID and hence must make a conservative
953 m->global = (INSN_UID (p) >= max_uid_for_loop
954 || (uid_luid[REGNO_LAST_UID (regno)]
955 > INSN_LUID (loop_end))
956 || (uid_luid[REGNO_FIRST_UID (regno)]
958 || (labels_in_range_p
959 (p, uid_luid[REGNO_FIRST_UID (regno)])));
960 if (maybe_never && m->global)
961 m->savemode = GET_MODE (SET_SRC (set1));
963 m->savemode = VOIDmode;
967 m->lifetime = (uid_luid[REGNO_LAST_UID (regno)]
968 - uid_luid[REGNO_FIRST_UID (regno)]);
970 VARRAY_INT (regs->set_in_loop, regno) = -1;
971 /* Add M to the end of the chain MOVABLES. */
972 if (movables->head == 0)
975 movables->last->next = m;
980 /* Past a call insn, we get to insns which might not be executed
981 because the call might exit. This matters for insns that trap.
982 Constant and pure call insns always return, so they don't count. */
983 else if (GET_CODE (p) == CALL_INSN && ! CONST_CALL_P (p))
985 /* Past a label or a jump, we get to insns for which we
986 can't count on whether or how many times they will be
987 executed during each iteration. Therefore, we can
988 only move out sets of trivial variables
989 (those not used after the loop). */
990 /* Similar code appears twice in strength_reduce. */
991 else if ((GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN)
992 /* If we enter the loop in the middle, and scan around to the
993 beginning, don't set maybe_never for that. This must be an
994 unconditional jump, otherwise the code at the top of the
995 loop might never be executed. Unconditional jumps are
996 followed a by barrier then loop end. */
997 && ! (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p) == loop->top
998 && NEXT_INSN (NEXT_INSN (p)) == loop_end
999 && any_uncondjump_p (p)))
1001 else if (GET_CODE (p) == NOTE)
1003 /* At the virtual top of a converted loop, insns are again known to
1004 be executed: logically, the loop begins here even though the exit
1005 code has been duplicated. */
1006 if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP && loop_depth == 0)
1007 maybe_never = call_passed = 0;
1008 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
1010 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
1015 /* If one movable subsumes another, ignore that other. */
1017 ignore_some_movables (movables);
1019 /* For each movable insn, see if the reg that it loads
1020 leads when it dies right into another conditionally movable insn.
1021 If so, record that the second insn "forces" the first one,
1022 since the second can be moved only if the first is. */
1024 force_movables (movables);
1026 /* See if there are multiple movable insns that load the same value.
1027 If there are, make all but the first point at the first one
1028 through the `match' field, and add the priorities of them
1029 all together as the priority of the first. */
1031 combine_movables (movables, regs);
1033 /* Now consider each movable insn to decide whether it is worth moving.
1034 Store 0 in regs->set_in_loop for each reg that is moved.
1036 Generally this increases code size, so do not move moveables when
1037 optimizing for code size. */
1039 if (! optimize_size)
1040 move_movables (loop, movables, threshold, insn_count, nregs);
1042 /* Now candidates that still are negative are those not moved.
1043 Change regs->set_in_loop to indicate that those are not actually
1045 for (i = 0; i < nregs; i++)
1046 if (VARRAY_INT (regs->set_in_loop, i) < 0)
1047 VARRAY_INT (regs->set_in_loop, i) = VARRAY_INT (regs->n_times_set, i);
1049 /* Now that we've moved some things out of the loop, we might be able to
1050 hoist even more memory references. */
1051 load_mems_and_recount_loop_regs_set (loop, &insn_count);
1053 for (update_start = loop_start;
1054 PREV_INSN (update_start)
1055 && GET_CODE (PREV_INSN (update_start)) != CODE_LABEL;
1056 update_start = PREV_INSN (update_start))
1058 update_end = NEXT_INSN (loop_end);
1060 reg_scan_update (update_start, update_end, loop_max_reg);
1061 loop_max_reg = max_reg_num ();
1063 if (flag_strength_reduce)
1065 if (update_end && GET_CODE (update_end) == CODE_LABEL)
1066 /* Ensure our label doesn't go away. */
1067 LABEL_NUSES (update_end)++;
1069 strength_reduce (loop, insn_count, flags);
1071 reg_scan_update (update_start, update_end, loop_max_reg);
1072 loop_max_reg = max_reg_num ();
1074 if (update_end && GET_CODE (update_end) == CODE_LABEL
1075 && --LABEL_NUSES (update_end) == 0)
1076 delete_insn (update_end);
1079 VARRAY_FREE (regs->single_usage);
1080 VARRAY_FREE (regs->set_in_loop);
1081 VARRAY_FREE (regs->n_times_set);
1082 VARRAY_FREE (regs->may_not_optimize);
1085 /* Add elements to *OUTPUT to record all the pseudo-regs
1086 mentioned in IN_THIS but not mentioned in NOT_IN_THIS. */
1089 record_excess_regs (in_this, not_in_this, output)
1090 rtx in_this, not_in_this;
1097 code = GET_CODE (in_this);
1111 if (REGNO (in_this) >= FIRST_PSEUDO_REGISTER
1112 && ! reg_mentioned_p (in_this, not_in_this))
1113 *output = gen_rtx_EXPR_LIST (VOIDmode, in_this, *output);
1120 fmt = GET_RTX_FORMAT (code);
1121 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1128 for (j = 0; j < XVECLEN (in_this, i); j++)
1129 record_excess_regs (XVECEXP (in_this, i, j), not_in_this, output);
1133 record_excess_regs (XEXP (in_this, i), not_in_this, output);
1139 /* Check what regs are referred to in the libcall block ending with INSN,
1140 aside from those mentioned in the equivalent value.
1141 If there are none, return 0.
1142 If there are one or more, return an EXPR_LIST containing all of them. */
1145 libcall_other_reg (insn, equiv)
1148 rtx note = find_reg_note (insn, REG_RETVAL, NULL_RTX);
1149 rtx p = XEXP (note, 0);
1152 /* First, find all the regs used in the libcall block
1153 that are not mentioned as inputs to the result. */
1157 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
1158 || GET_CODE (p) == CALL_INSN)
1159 record_excess_regs (PATTERN (p), equiv, &output);
1166 /* Return 1 if all uses of REG
1167 are between INSN and the end of the basic block. */
1170 reg_in_basic_block_p (insn, reg)
1173 int regno = REGNO (reg);
1176 if (REGNO_FIRST_UID (regno) != INSN_UID (insn))
1179 /* Search this basic block for the already recorded last use of the reg. */
1180 for (p = insn; p; p = NEXT_INSN (p))
1182 switch (GET_CODE (p))
1189 /* Ordinary insn: if this is the last use, we win. */
1190 if (REGNO_LAST_UID (regno) == INSN_UID (p))
1195 /* Jump insn: if this is the last use, we win. */
1196 if (REGNO_LAST_UID (regno) == INSN_UID (p))
1198 /* Otherwise, it's the end of the basic block, so we lose. */
1203 /* It's the end of the basic block, so we lose. */
1211 /* The "last use" that was recorded can't be found after the first
1212 use. This can happen when the last use was deleted while
1213 processing an inner loop, this inner loop was then completely
1214 unrolled, and the outer loop is always exited after the inner loop,
1215 so that everything after the first use becomes a single basic block. */
1219 /* Compute the benefit of eliminating the insns in the block whose
1220 last insn is LAST. This may be a group of insns used to compute a
1221 value directly or can contain a library call. */
1224 libcall_benefit (last)
1230 for (insn = XEXP (find_reg_note (last, REG_RETVAL, NULL_RTX), 0);
1231 insn != last; insn = NEXT_INSN (insn))
1233 if (GET_CODE (insn) == CALL_INSN)
1234 benefit += 10; /* Assume at least this many insns in a library
1236 else if (GET_CODE (insn) == INSN
1237 && GET_CODE (PATTERN (insn)) != USE
1238 && GET_CODE (PATTERN (insn)) != CLOBBER)
1245 /* Skip COUNT insns from INSN, counting library calls as 1 insn. */
1248 skip_consec_insns (insn, count)
1252 for (; count > 0; count--)
1256 /* If first insn of libcall sequence, skip to end. */
1257 /* Do this at start of loop, since INSN is guaranteed to
1259 if (GET_CODE (insn) != NOTE
1260 && (temp = find_reg_note (insn, REG_LIBCALL, NULL_RTX)))
1261 insn = XEXP (temp, 0);
1264 insn = NEXT_INSN (insn);
1265 while (GET_CODE (insn) == NOTE);
1271 /* Ignore any movable whose insn falls within a libcall
1272 which is part of another movable.
1273 We make use of the fact that the movable for the libcall value
1274 was made later and so appears later on the chain. */
1277 ignore_some_movables (movables)
1278 struct movables *movables;
1280 register struct movable *m, *m1;
1282 for (m = movables->head; m; m = m->next)
1284 /* Is this a movable for the value of a libcall? */
1285 rtx note = find_reg_note (m->insn, REG_RETVAL, NULL_RTX);
1289 /* Check for earlier movables inside that range,
1290 and mark them invalid. We cannot use LUIDs here because
1291 insns created by loop.c for prior loops don't have LUIDs.
1292 Rather than reject all such insns from movables, we just
1293 explicitly check each insn in the libcall (since invariant
1294 libcalls aren't that common). */
1295 for (insn = XEXP (note, 0); insn != m->insn; insn = NEXT_INSN (insn))
1296 for (m1 = movables->head; m1 != m; m1 = m1->next)
1297 if (m1->insn == insn)
1303 /* For each movable insn, see if the reg that it loads
1304 leads when it dies right into another conditionally movable insn.
1305 If so, record that the second insn "forces" the first one,
1306 since the second can be moved only if the first is. */
1309 force_movables (movables)
1310 struct movables *movables;
1312 register struct movable *m, *m1;
1313 for (m1 = movables->head; m1; m1 = m1->next)
1314 /* Omit this if moving just the (SET (REG) 0) of a zero-extend. */
1315 if (!m1->partial && !m1->done)
1317 int regno = m1->regno;
1318 for (m = m1->next; m; m = m->next)
1319 /* ??? Could this be a bug? What if CSE caused the
1320 register of M1 to be used after this insn?
1321 Since CSE does not update regno_last_uid,
1322 this insn M->insn might not be where it dies.
1323 But very likely this doesn't matter; what matters is
1324 that M's reg is computed from M1's reg. */
1325 if (INSN_UID (m->insn) == REGNO_LAST_UID (regno)
1328 if (m != 0 && m->set_src == m1->set_dest
1329 /* If m->consec, m->set_src isn't valid. */
1333 /* Increase the priority of the moving the first insn
1334 since it permits the second to be moved as well. */
1338 m1->lifetime += m->lifetime;
1339 m1->savings += m->savings;
1344 /* Find invariant expressions that are equal and can be combined into
1348 combine_movables (movables, regs)
1349 struct movables *movables;
1350 struct loop_regs *regs;
1352 int nregs = regs->num;
1353 register struct movable *m;
1354 char *matched_regs = (char *) xmalloc (nregs);
1355 enum machine_mode mode;
1357 /* Regs that are set more than once are not allowed to match
1358 or be matched. I'm no longer sure why not. */
1359 /* Perhaps testing m->consec_sets would be more appropriate here? */
1361 for (m = movables->head; m; m = m->next)
1362 if (m->match == 0 && VARRAY_INT (regs->n_times_set, m->regno) == 1
1365 register struct movable *m1;
1366 int regno = m->regno;
1368 bzero (matched_regs, nregs);
1369 matched_regs[regno] = 1;
1371 /* We want later insns to match the first one. Don't make the first
1372 one match any later ones. So start this loop at m->next. */
1373 for (m1 = m->next; m1; m1 = m1->next)
1374 if (m != m1 && m1->match == 0 && VARRAY_INT (regs->n_times_set,
1376 /* A reg used outside the loop mustn't be eliminated. */
1378 /* A reg used for zero-extending mustn't be eliminated. */
1380 && (matched_regs[m1->regno]
1383 /* Can combine regs with different modes loaded from the
1384 same constant only if the modes are the same or
1385 if both are integer modes with M wider or the same
1386 width as M1. The check for integer is redundant, but
1387 safe, since the only case of differing destination
1388 modes with equal sources is when both sources are
1389 VOIDmode, i.e., CONST_INT. */
1390 (GET_MODE (m->set_dest) == GET_MODE (m1->set_dest)
1391 || (GET_MODE_CLASS (GET_MODE (m->set_dest)) == MODE_INT
1392 && GET_MODE_CLASS (GET_MODE (m1->set_dest)) == MODE_INT
1393 && (GET_MODE_BITSIZE (GET_MODE (m->set_dest))
1394 >= GET_MODE_BITSIZE (GET_MODE (m1->set_dest)))))
1395 /* See if the source of M1 says it matches M. */
1396 && ((GET_CODE (m1->set_src) == REG
1397 && matched_regs[REGNO (m1->set_src)])
1398 || rtx_equal_for_loop_p (m->set_src, m1->set_src,
1400 && ((m->dependencies == m1->dependencies)
1401 || rtx_equal_p (m->dependencies, m1->dependencies)))
1403 m->lifetime += m1->lifetime;
1404 m->savings += m1->savings;
1407 matched_regs[m1->regno] = 1;
1411 /* Now combine the regs used for zero-extension.
1412 This can be done for those not marked `global'
1413 provided their lives don't overlap. */
1415 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
1416 mode = GET_MODE_WIDER_MODE (mode))
1418 register struct movable *m0 = 0;
1420 /* Combine all the registers for extension from mode MODE.
1421 Don't combine any that are used outside this loop. */
1422 for (m = movables->head; m; m = m->next)
1423 if (m->partial && ! m->global
1424 && mode == GET_MODE (SET_SRC (PATTERN (NEXT_INSN (m->insn)))))
1426 register struct movable *m1;
1427 int first = uid_luid[REGNO_FIRST_UID (m->regno)];
1428 int last = uid_luid[REGNO_LAST_UID (m->regno)];
1432 /* First one: don't check for overlap, just record it. */
1437 /* Make sure they extend to the same mode.
1438 (Almost always true.) */
1439 if (GET_MODE (m->set_dest) != GET_MODE (m0->set_dest))
1442 /* We already have one: check for overlap with those
1443 already combined together. */
1444 for (m1 = movables->head; m1 != m; m1 = m1->next)
1445 if (m1 == m0 || (m1->partial && m1->match == m0))
1446 if (! (uid_luid[REGNO_FIRST_UID (m1->regno)] > last
1447 || uid_luid[REGNO_LAST_UID (m1->regno)] < first))
1450 /* No overlap: we can combine this with the others. */
1451 m0->lifetime += m->lifetime;
1452 m0->savings += m->savings;
1462 free (matched_regs);
1465 /* Return 1 if regs X and Y will become the same if moved. */
1468 regs_match_p (x, y, movables)
1470 struct movables *movables;
1472 unsigned int xn = REGNO (x);
1473 unsigned int yn = REGNO (y);
1474 struct movable *mx, *my;
1476 for (mx = movables->head; mx; mx = mx->next)
1477 if (mx->regno == xn)
1480 for (my = movables->head; my; my = my->next)
1481 if (my->regno == yn)
1485 && ((mx->match == my->match && mx->match != 0)
1487 || mx == my->match));
1490 /* Return 1 if X and Y are identical-looking rtx's.
1491 This is the Lisp function EQUAL for rtx arguments.
1493 If two registers are matching movables or a movable register and an
1494 equivalent constant, consider them equal. */
1497 rtx_equal_for_loop_p (x, y, movables, regs)
1499 struct movables *movables;
1500 struct loop_regs * regs;
1504 register struct movable *m;
1505 register enum rtx_code code;
1506 register const char *fmt;
1510 if (x == 0 || y == 0)
1513 code = GET_CODE (x);
1515 /* If we have a register and a constant, they may sometimes be
1517 if (GET_CODE (x) == REG && VARRAY_INT (regs->set_in_loop, REGNO (x)) == -2
1520 for (m = movables->head; m; m = m->next)
1521 if (m->move_insn && m->regno == REGNO (x)
1522 && rtx_equal_p (m->set_src, y))
1525 else if (GET_CODE (y) == REG && VARRAY_INT (regs->set_in_loop,
1529 for (m = movables->head; m; m = m->next)
1530 if (m->move_insn && m->regno == REGNO (y)
1531 && rtx_equal_p (m->set_src, x))
1535 /* Otherwise, rtx's of different codes cannot be equal. */
1536 if (code != GET_CODE (y))
1539 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
1540 (REG:SI x) and (REG:HI x) are NOT equivalent. */
1542 if (GET_MODE (x) != GET_MODE (y))
1545 /* These three types of rtx's can be compared nonrecursively. */
1547 return (REGNO (x) == REGNO (y) || regs_match_p (x, y, movables));
1549 if (code == LABEL_REF)
1550 return XEXP (x, 0) == XEXP (y, 0);
1551 if (code == SYMBOL_REF)
1552 return XSTR (x, 0) == XSTR (y, 0);
1554 /* Compare the elements. If any pair of corresponding elements
1555 fail to match, return 0 for the whole things. */
1557 fmt = GET_RTX_FORMAT (code);
1558 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1563 if (XWINT (x, i) != XWINT (y, i))
1568 if (XINT (x, i) != XINT (y, i))
1573 /* Two vectors must have the same length. */
1574 if (XVECLEN (x, i) != XVECLEN (y, i))
1577 /* And the corresponding elements must match. */
1578 for (j = 0; j < XVECLEN (x, i); j++)
1579 if (rtx_equal_for_loop_p (XVECEXP (x, i, j), XVECEXP (y, i, j),
1580 movables, regs) == 0)
1585 if (rtx_equal_for_loop_p (XEXP (x, i), XEXP (y, i),
1586 movables, regs) == 0)
1591 if (strcmp (XSTR (x, i), XSTR (y, i)))
1596 /* These are just backpointers, so they don't matter. */
1602 /* It is believed that rtx's at this level will never
1603 contain anything but integers and other rtx's,
1604 except for within LABEL_REFs and SYMBOL_REFs. */
1612 /* If X contains any LABEL_REF's, add REG_LABEL notes for them to all
1613 insns in INSNS which use the reference. */
1616 add_label_notes (x, insns)
1620 enum rtx_code code = GET_CODE (x);
1625 if (code == LABEL_REF && !LABEL_REF_NONLOCAL_P (x))
1627 /* This code used to ignore labels that referred to dispatch tables to
1628 avoid flow generating (slighly) worse code.
1630 We no longer ignore such label references (see LABEL_REF handling in
1631 mark_jump_label for additional information). */
1632 for (insn = insns; insn; insn = NEXT_INSN (insn))
1633 if (reg_mentioned_p (XEXP (x, 0), insn))
1634 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_LABEL, XEXP (x, 0),
1638 fmt = GET_RTX_FORMAT (code);
1639 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1642 add_label_notes (XEXP (x, i), insns);
1643 else if (fmt[i] == 'E')
1644 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1645 add_label_notes (XVECEXP (x, i, j), insns);
1649 /* Scan MOVABLES, and move the insns that deserve to be moved.
1650 If two matching movables are combined, replace one reg with the
1651 other throughout. */
1654 move_movables (loop, movables, threshold, insn_count, nregs)
1656 struct movables *movables;
1661 struct loop_regs *regs = LOOP_REGS (loop);
1663 register struct movable *m;
1665 rtx loop_start = loop->start;
1666 rtx loop_end = loop->end;
1667 /* Map of pseudo-register replacements to handle combining
1668 when we move several insns that load the same value
1669 into different pseudo-registers. */
1670 rtx *reg_map = (rtx *) xcalloc (nregs, sizeof (rtx));
1671 char *already_moved = (char *) xcalloc (nregs, sizeof (char));
1675 for (m = movables->head; m; m = m->next)
1677 /* Describe this movable insn. */
1679 if (loop_dump_stream)
1681 fprintf (loop_dump_stream, "Insn %d: regno %d (life %d), ",
1682 INSN_UID (m->insn), m->regno, m->lifetime);
1684 fprintf (loop_dump_stream, "consec %d, ", m->consec);
1686 fprintf (loop_dump_stream, "cond ");
1688 fprintf (loop_dump_stream, "force ");
1690 fprintf (loop_dump_stream, "global ");
1692 fprintf (loop_dump_stream, "done ");
1694 fprintf (loop_dump_stream, "move-insn ");
1696 fprintf (loop_dump_stream, "matches %d ",
1697 INSN_UID (m->match->insn));
1699 fprintf (loop_dump_stream, "forces %d ",
1700 INSN_UID (m->forces->insn));
1703 /* Count movables. Value used in heuristics in strength_reduce. */
1706 /* Ignore the insn if it's already done (it matched something else).
1707 Otherwise, see if it is now safe to move. */
1711 || (1 == loop_invariant_p (loop, m->set_src)
1712 && (m->dependencies == 0
1713 || 1 == loop_invariant_p (loop, m->dependencies))
1715 || 1 == consec_sets_invariant_p (loop, m->set_dest,
1718 && (! m->forces || m->forces->done))
1722 int savings = m->savings;
1724 /* We have an insn that is safe to move.
1725 Compute its desirability. */
1730 if (loop_dump_stream)
1731 fprintf (loop_dump_stream, "savings %d ", savings);
1733 if (regs->moved_once[regno] && loop_dump_stream)
1734 fprintf (loop_dump_stream, "halved since already moved ");
1736 /* An insn MUST be moved if we already moved something else
1737 which is safe only if this one is moved too: that is,
1738 if already_moved[REGNO] is nonzero. */
1740 /* An insn is desirable to move if the new lifetime of the
1741 register is no more than THRESHOLD times the old lifetime.
1742 If it's not desirable, it means the loop is so big
1743 that moving won't speed things up much,
1744 and it is liable to make register usage worse. */
1746 /* It is also desirable to move if it can be moved at no
1747 extra cost because something else was already moved. */
1749 if (already_moved[regno]
1750 || flag_move_all_movables
1751 || (threshold * savings * m->lifetime) >=
1752 (regs->moved_once[regno] ? insn_count * 2 : insn_count)
1753 || (m->forces && m->forces->done
1754 && VARRAY_INT (regs->n_times_set, m->forces->regno) == 1))
1757 register struct movable *m1;
1758 rtx first = NULL_RTX;
1760 /* Now move the insns that set the reg. */
1762 if (m->partial && m->match)
1766 /* Find the end of this chain of matching regs.
1767 Thus, we load each reg in the chain from that one reg.
1768 And that reg is loaded with 0 directly,
1769 since it has ->match == 0. */
1770 for (m1 = m; m1->match; m1 = m1->match);
1771 newpat = gen_move_insn (SET_DEST (PATTERN (m->insn)),
1772 SET_DEST (PATTERN (m1->insn)));
1773 i1 = emit_insn_before (newpat, loop_start);
1775 /* Mark the moved, invariant reg as being allowed to
1776 share a hard reg with the other matching invariant. */
1777 REG_NOTES (i1) = REG_NOTES (m->insn);
1778 r1 = SET_DEST (PATTERN (m->insn));
1779 r2 = SET_DEST (PATTERN (m1->insn));
1781 = gen_rtx_EXPR_LIST (VOIDmode, r1,
1782 gen_rtx_EXPR_LIST (VOIDmode, r2,
1784 delete_insn (m->insn);
1789 if (loop_dump_stream)
1790 fprintf (loop_dump_stream, " moved to %d", INSN_UID (i1));
1792 /* If we are to re-generate the item being moved with a
1793 new move insn, first delete what we have and then emit
1794 the move insn before the loop. */
1795 else if (m->move_insn)
1799 for (count = m->consec; count >= 0; count--)
1801 /* If this is the first insn of a library call sequence,
1803 if (GET_CODE (p) != NOTE
1804 && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
1807 /* If this is the last insn of a libcall sequence, then
1808 delete every insn in the sequence except the last.
1809 The last insn is handled in the normal manner. */
1810 if (GET_CODE (p) != NOTE
1811 && (temp = find_reg_note (p, REG_RETVAL, NULL_RTX)))
1813 temp = XEXP (temp, 0);
1815 temp = delete_insn (temp);
1819 p = delete_insn (p);
1821 /* simplify_giv_expr expects that it can walk the insns
1822 at m->insn forwards and see this old sequence we are
1823 tossing here. delete_insn does preserve the next
1824 pointers, but when we skip over a NOTE we must fix
1825 it up. Otherwise that code walks into the non-deleted
1827 while (p && GET_CODE (p) == NOTE)
1828 p = NEXT_INSN (temp) = NEXT_INSN (p);
1832 emit_move_insn (m->set_dest, m->set_src);
1833 temp = get_insns ();
1836 add_label_notes (m->set_src, temp);
1838 i1 = emit_insns_before (temp, loop_start);
1839 if (! find_reg_note (i1, REG_EQUAL, NULL_RTX))
1841 = gen_rtx_EXPR_LIST (m->is_equiv ? REG_EQUIV : REG_EQUAL,
1842 m->set_src, REG_NOTES (i1));
1844 if (loop_dump_stream)
1845 fprintf (loop_dump_stream, " moved to %d", INSN_UID (i1));
1847 /* The more regs we move, the less we like moving them. */
1852 for (count = m->consec; count >= 0; count--)
1856 /* If first insn of libcall sequence, skip to end. */
1857 /* Do this at start of loop, since p is guaranteed to
1859 if (GET_CODE (p) != NOTE
1860 && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
1863 /* If last insn of libcall sequence, move all
1864 insns except the last before the loop. The last
1865 insn is handled in the normal manner. */
1866 if (GET_CODE (p) != NOTE
1867 && (temp = find_reg_note (p, REG_RETVAL, NULL_RTX)))
1871 rtx fn_address_insn = 0;
1874 for (temp = XEXP (temp, 0); temp != p;
1875 temp = NEXT_INSN (temp))
1881 if (GET_CODE (temp) == NOTE)
1884 body = PATTERN (temp);
1886 /* Find the next insn after TEMP,
1887 not counting USE or NOTE insns. */
1888 for (next = NEXT_INSN (temp); next != p;
1889 next = NEXT_INSN (next))
1890 if (! (GET_CODE (next) == INSN
1891 && GET_CODE (PATTERN (next)) == USE)
1892 && GET_CODE (next) != NOTE)
1895 /* If that is the call, this may be the insn
1896 that loads the function address.
1898 Extract the function address from the insn
1899 that loads it into a register.
1900 If this insn was cse'd, we get incorrect code.
1902 So emit a new move insn that copies the
1903 function address into the register that the
1904 call insn will use. flow.c will delete any
1905 redundant stores that we have created. */
1906 if (GET_CODE (next) == CALL_INSN
1907 && GET_CODE (body) == SET
1908 && GET_CODE (SET_DEST (body)) == REG
1909 && (n = find_reg_note (temp, REG_EQUAL,
1912 fn_reg = SET_SRC (body);
1913 if (GET_CODE (fn_reg) != REG)
1914 fn_reg = SET_DEST (body);
1915 fn_address = XEXP (n, 0);
1916 fn_address_insn = temp;
1918 /* We have the call insn.
1919 If it uses the register we suspect it might,
1920 load it with the correct address directly. */
1921 if (GET_CODE (temp) == CALL_INSN
1923 && reg_referenced_p (fn_reg, body))
1924 emit_insn_after (gen_move_insn (fn_reg,
1928 if (GET_CODE (temp) == CALL_INSN)
1930 i1 = emit_call_insn_before (body, loop_start);
1931 /* Because the USAGE information potentially
1932 contains objects other than hard registers
1933 we need to copy it. */
1934 if (CALL_INSN_FUNCTION_USAGE (temp))
1935 CALL_INSN_FUNCTION_USAGE (i1)
1936 = copy_rtx (CALL_INSN_FUNCTION_USAGE (temp));
1939 i1 = emit_insn_before (body, loop_start);
1942 if (temp == fn_address_insn)
1943 fn_address_insn = i1;
1944 REG_NOTES (i1) = REG_NOTES (temp);
1950 if (m->savemode != VOIDmode)
1952 /* P sets REG to zero; but we should clear only
1953 the bits that are not covered by the mode
1955 rtx reg = m->set_dest;
1961 (GET_MODE (reg), and_optab, reg,
1962 GEN_INT ((((HOST_WIDE_INT) 1
1963 << GET_MODE_BITSIZE (m->savemode)))
1965 reg, 1, OPTAB_LIB_WIDEN);
1969 emit_move_insn (reg, tem);
1970 sequence = gen_sequence ();
1972 i1 = emit_insn_before (sequence, loop_start);
1974 else if (GET_CODE (p) == CALL_INSN)
1976 i1 = emit_call_insn_before (PATTERN (p), loop_start);
1977 /* Because the USAGE information potentially
1978 contains objects other than hard registers
1979 we need to copy it. */
1980 if (CALL_INSN_FUNCTION_USAGE (p))
1981 CALL_INSN_FUNCTION_USAGE (i1)
1982 = copy_rtx (CALL_INSN_FUNCTION_USAGE (p));
1984 else if (count == m->consec && m->move_insn_first)
1986 /* The SET_SRC might not be invariant, so we must
1987 use the REG_EQUAL note. */
1989 emit_move_insn (m->set_dest, m->set_src);
1990 temp = get_insns ();
1993 add_label_notes (m->set_src, temp);
1995 i1 = emit_insns_before (temp, loop_start);
1996 if (! find_reg_note (i1, REG_EQUAL, NULL_RTX))
1998 = gen_rtx_EXPR_LIST ((m->is_equiv ? REG_EQUIV
2000 m->set_src, REG_NOTES (i1));
2003 i1 = emit_insn_before (PATTERN (p), loop_start);
2005 if (REG_NOTES (i1) == 0)
2007 REG_NOTES (i1) = REG_NOTES (p);
2009 /* If there is a REG_EQUAL note present whose value
2010 is not loop invariant, then delete it, since it
2011 may cause problems with later optimization passes.
2012 It is possible for cse to create such notes
2013 like this as a result of record_jump_cond. */
2015 if ((temp = find_reg_note (i1, REG_EQUAL, NULL_RTX))
2016 && ! loop_invariant_p (loop, XEXP (temp, 0)))
2017 remove_note (i1, temp);
2023 if (loop_dump_stream)
2024 fprintf (loop_dump_stream, " moved to %d",
2027 /* If library call, now fix the REG_NOTES that contain
2028 insn pointers, namely REG_LIBCALL on FIRST
2029 and REG_RETVAL on I1. */
2030 if ((temp = find_reg_note (i1, REG_RETVAL, NULL_RTX)))
2032 XEXP (temp, 0) = first;
2033 temp = find_reg_note (first, REG_LIBCALL, NULL_RTX);
2034 XEXP (temp, 0) = i1;
2041 /* simplify_giv_expr expects that it can walk the insns
2042 at m->insn forwards and see this old sequence we are
2043 tossing here. delete_insn does preserve the next
2044 pointers, but when we skip over a NOTE we must fix
2045 it up. Otherwise that code walks into the non-deleted
2047 while (p && GET_CODE (p) == NOTE)
2048 p = NEXT_INSN (temp) = NEXT_INSN (p);
2051 /* The more regs we move, the less we like moving them. */
2055 /* Any other movable that loads the same register
2057 already_moved[regno] = 1;
2059 /* This reg has been moved out of one loop. */
2060 regs->moved_once[regno] = 1;
2062 /* The reg set here is now invariant. */
2064 VARRAY_INT (regs->set_in_loop, regno) = 0;
2068 /* Change the length-of-life info for the register
2069 to say it lives at least the full length of this loop.
2070 This will help guide optimizations in outer loops. */
2072 if (uid_luid[REGNO_FIRST_UID (regno)] > INSN_LUID (loop_start))
2073 /* This is the old insn before all the moved insns.
2074 We can't use the moved insn because it is out of range
2075 in uid_luid. Only the old insns have luids. */
2076 REGNO_FIRST_UID (regno) = INSN_UID (loop_start);
2077 if (uid_luid[REGNO_LAST_UID (regno)] < INSN_LUID (loop_end))
2078 REGNO_LAST_UID (regno) = INSN_UID (loop_end);
2080 /* Combine with this moved insn any other matching movables. */
2083 for (m1 = movables->head; m1; m1 = m1->next)
2088 /* Schedule the reg loaded by M1
2089 for replacement so that shares the reg of M.
2090 If the modes differ (only possible in restricted
2091 circumstances, make a SUBREG.
2093 Note this assumes that the target dependent files
2094 treat REG and SUBREG equally, including within
2095 GO_IF_LEGITIMATE_ADDRESS and in all the
2096 predicates since we never verify that replacing the
2097 original register with a SUBREG results in a
2098 recognizable insn. */
2099 if (GET_MODE (m->set_dest) == GET_MODE (m1->set_dest))
2100 reg_map[m1->regno] = m->set_dest;
2103 = gen_lowpart_common (GET_MODE (m1->set_dest),
2106 /* Get rid of the matching insn
2107 and prevent further processing of it. */
2110 /* if library call, delete all insn except last, which
2112 if ((temp = find_reg_note (m1->insn, REG_RETVAL,
2115 for (temp = XEXP (temp, 0); temp != m1->insn;
2116 temp = NEXT_INSN (temp))
2119 delete_insn (m1->insn);
2121 /* Any other movable that loads the same register
2123 already_moved[m1->regno] = 1;
2125 /* The reg merged here is now invariant,
2126 if the reg it matches is invariant. */
2128 VARRAY_INT (regs->set_in_loop, m1->regno) = 0;
2131 else if (loop_dump_stream)
2132 fprintf (loop_dump_stream, "not desirable");
2134 else if (loop_dump_stream && !m->match)
2135 fprintf (loop_dump_stream, "not safe");
2137 if (loop_dump_stream)
2138 fprintf (loop_dump_stream, "\n");
2142 new_start = loop_start;
2144 /* Go through all the instructions in the loop, making
2145 all the register substitutions scheduled in REG_MAP. */
2146 for (p = new_start; p != loop_end; p = NEXT_INSN (p))
2147 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
2148 || GET_CODE (p) == CALL_INSN)
2150 replace_regs (PATTERN (p), reg_map, nregs, 0);
2151 replace_regs (REG_NOTES (p), reg_map, nregs, 0);
2157 free (already_moved);
2161 /* Scan X and replace the address of any MEM in it with ADDR.
2162 REG is the address that MEM should have before the replacement. */
2165 replace_call_address (x, reg, addr)
2168 register enum rtx_code code;
2170 register const char *fmt;
2174 code = GET_CODE (x);
2188 /* Short cut for very common case. */
2189 replace_call_address (XEXP (x, 1), reg, addr);
2193 /* Short cut for very common case. */
2194 replace_call_address (XEXP (x, 0), reg, addr);
2198 /* If this MEM uses a reg other than the one we expected,
2199 something is wrong. */
2200 if (XEXP (x, 0) != reg)
2209 fmt = GET_RTX_FORMAT (code);
2210 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2213 replace_call_address (XEXP (x, i), reg, addr);
2214 else if (fmt[i] == 'E')
2217 for (j = 0; j < XVECLEN (x, i); j++)
2218 replace_call_address (XVECEXP (x, i, j), reg, addr);
2224 /* Return the number of memory refs to addresses that vary
2228 count_nonfixed_reads (loop, x)
2229 const struct loop *loop;
2232 register enum rtx_code code;
2234 register const char *fmt;
2240 code = GET_CODE (x);
2254 return ((loop_invariant_p (loop, XEXP (x, 0)) != 1)
2255 + count_nonfixed_reads (loop, XEXP (x, 0)));
2262 fmt = GET_RTX_FORMAT (code);
2263 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2266 value += count_nonfixed_reads (loop, XEXP (x, i));
2270 for (j = 0; j < XVECLEN (x, i); j++)
2271 value += count_nonfixed_reads (loop, XVECEXP (x, i, j));
2277 /* Scan a loop setting the elements `cont', `vtop', `loops_enclosed',
2278 `has_call', `has_volatile', `has_tablejump',
2279 `unknown_address_altered', `unknown_constant_address_altered', and
2280 `num_mem_sets' in LOOP. Also, fill in the array `mems' and the
2281 list `store_mems' in LOOP. */
2287 register int level = 1;
2289 struct loop_info *loop_info = LOOP_INFO (loop);
2290 rtx start = loop->start;
2291 rtx end = loop->end;
2292 /* The label after END. Jumping here is just like falling off the
2293 end of the loop. We use next_nonnote_insn instead of next_label
2294 as a hedge against the (pathological) case where some actual insn
2295 might end up between the two. */
2296 rtx exit_target = next_nonnote_insn (end);
2298 loop_info->has_indirect_jump = indirect_jump_in_function;
2299 loop_info->has_call = 0;
2300 loop_info->has_volatile = 0;
2301 loop_info->has_tablejump = 0;
2302 loop_info->has_multiple_exit_targets = 0;
2305 loop_info->unknown_address_altered = 0;
2306 loop_info->unknown_constant_address_altered = 0;
2307 loop_info->store_mems = NULL_RTX;
2308 loop_info->first_loop_store_insn = NULL_RTX;
2309 loop_info->mems_idx = 0;
2310 loop_info->num_mem_sets = 0;
2312 for (insn = NEXT_INSN (start); insn != NEXT_INSN (end);
2313 insn = NEXT_INSN (insn))
2315 if (GET_CODE (insn) == NOTE)
2317 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
2320 /* Count number of loops contained in this one. */
2323 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END)
2328 else if (GET_CODE (insn) == CALL_INSN)
2330 if (! CONST_CALL_P (insn))
2331 loop_info->unknown_address_altered = 1;
2332 loop_info->has_call = 1;
2334 else if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN)
2336 rtx label1 = NULL_RTX;
2337 rtx label2 = NULL_RTX;
2339 if (volatile_refs_p (PATTERN (insn)))
2340 loop_info->has_volatile = 1;
2342 if (GET_CODE (insn) == JUMP_INSN
2343 && (GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC
2344 || GET_CODE (PATTERN (insn)) == ADDR_VEC))
2345 loop_info->has_tablejump = 1;
2347 note_stores (PATTERN (insn), note_addr_stored, loop_info);
2348 if (! loop_info->first_loop_store_insn && loop_info->store_mems)
2349 loop_info->first_loop_store_insn = insn;
2351 if (! loop_info->has_multiple_exit_targets
2352 && GET_CODE (insn) == JUMP_INSN
2353 && GET_CODE (PATTERN (insn)) == SET
2354 && SET_DEST (PATTERN (insn)) == pc_rtx)
2356 if (GET_CODE (SET_SRC (PATTERN (insn))) == IF_THEN_ELSE)
2358 label1 = XEXP (SET_SRC (PATTERN (insn)), 1);
2359 label2 = XEXP (SET_SRC (PATTERN (insn)), 2);
2363 label1 = SET_SRC (PATTERN (insn));
2368 if (label1 && label1 != pc_rtx)
2370 if (GET_CODE (label1) != LABEL_REF)
2372 /* Something tricky. */
2373 loop_info->has_multiple_exit_targets = 1;
2376 else if (XEXP (label1, 0) != exit_target
2377 && LABEL_OUTSIDE_LOOP_P (label1))
2379 /* A jump outside the current loop. */
2380 loop_info->has_multiple_exit_targets = 1;
2391 else if (GET_CODE (insn) == RETURN)
2392 loop_info->has_multiple_exit_targets = 1;
2395 /* Now, rescan the loop, setting up the LOOP_MEMS array. */
2396 if (/* An exception thrown by a called function might land us
2398 ! loop_info->has_call
2399 /* We don't want loads for MEMs moved to a location before the
2400 one at which their stack memory becomes allocated. (Note
2401 that this is not a problem for malloc, etc., since those
2402 require actual function calls. */
2403 && ! current_function_calls_alloca
2404 /* There are ways to leave the loop other than falling off the
2406 && ! loop_info->has_multiple_exit_targets)
2407 for (insn = NEXT_INSN (start); insn != NEXT_INSN (end);
2408 insn = NEXT_INSN (insn))
2409 for_each_rtx (&insn, insert_loop_mem, loop_info);
2411 /* BLKmode MEMs are added to LOOP_STORE_MEM as necessary so
2412 that loop_invariant_p and load_mems can use true_dependence
2413 to determine what is really clobbered. */
2414 if (loop_info->unknown_address_altered)
2416 rtx mem = gen_rtx_MEM (BLKmode, const0_rtx);
2418 loop_info->store_mems
2419 = gen_rtx_EXPR_LIST (VOIDmode, mem, loop_info->store_mems);
2421 if (loop_info->unknown_constant_address_altered)
2423 rtx mem = gen_rtx_MEM (BLKmode, const0_rtx);
2425 RTX_UNCHANGING_P (mem) = 1;
2426 loop_info->store_mems
2427 = gen_rtx_EXPR_LIST (VOIDmode, mem, loop_info->store_mems);
2431 /* LOOP->CONT_DOMINATOR is now the last label between the loop start
2432 and the continue note that is a the destination of a (cond)jump after
2433 the continue note. If there is any (cond)jump between the loop start
2434 and what we have so far as LOOP->CONT_DOMINATOR that has a
2435 target between LOOP->CONT_DOMINATOR and the continue note, move
2436 LOOP->CONT_DOMINATOR forward to that label; if a jump's
2437 destination cannot be determined, clear LOOP->CONT_DOMINATOR. */
2440 verify_dominator (loop)
2445 if (! loop->cont_dominator)
2446 /* This can happen for an empty loop, e.g. in
2447 gcc.c-torture/compile/920410-2.c */
2449 if (loop->cont_dominator == const0_rtx)
2451 loop->cont_dominator = 0;
2454 for (insn = loop->start; insn != loop->cont_dominator;
2455 insn = NEXT_INSN (insn))
2457 if (GET_CODE (insn) == JUMP_INSN
2458 && GET_CODE (PATTERN (insn)) != RETURN)
2460 rtx label = JUMP_LABEL (insn);
2463 /* If it is not a jump we can easily understand or for
2464 which we do not have jump target information in the JUMP_LABEL
2465 field (consider ADDR_VEC and ADDR_DIFF_VEC insns), then clear
2466 LOOP->CONT_DOMINATOR. */
2467 if (! any_condjump_p (insn)
2468 || label == NULL_RTX)
2470 loop->cont_dominator = NULL_RTX;
2474 label_luid = INSN_LUID (label);
2475 if (label_luid < INSN_LUID (loop->cont)
2477 > INSN_LUID (loop->cont)))
2478 loop->cont_dominator = label;
2483 /* Scan the function looking for loops. Record the start and end of each loop.
2484 Also mark as invalid loops any loops that contain a setjmp or are branched
2485 to from outside the loop. */
2488 find_and_verify_loops (f, loops)
2490 struct loops *loops;
2495 struct loop *current_loop;
2496 struct loop *next_loop;
2499 num_loops = loops->num;
2501 compute_luids (f, NULL_RTX, 0);
2503 /* If there are jumps to undefined labels,
2504 treat them as jumps out of any/all loops.
2505 This also avoids writing past end of tables when there are no loops. */
2508 /* Find boundaries of loops, mark which loops are contained within
2509 loops, and invalidate loops that have setjmp. */
2512 current_loop = NULL;
2513 for (insn = f; insn; insn = NEXT_INSN (insn))
2515 if (GET_CODE (insn) == NOTE)
2516 switch (NOTE_LINE_NUMBER (insn))
2518 case NOTE_INSN_LOOP_BEG:
2519 next_loop = loops->array + num_loops;
2520 next_loop->num = num_loops;
2522 next_loop->start = insn;
2523 next_loop->outer = current_loop;
2524 current_loop = next_loop;
2527 case NOTE_INSN_SETJMP:
2528 /* In this case, we must invalidate our current loop and any
2530 for (loop = current_loop; loop; loop = loop->outer)
2533 if (loop_dump_stream)
2534 fprintf (loop_dump_stream,
2535 "\nLoop at %d ignored due to setjmp.\n",
2536 INSN_UID (loop->start));
2540 case NOTE_INSN_LOOP_CONT:
2541 current_loop->cont = insn;
2544 case NOTE_INSN_LOOP_VTOP:
2545 current_loop->vtop = insn;
2548 case NOTE_INSN_LOOP_END:
2552 current_loop->end = insn;
2553 verify_dominator (current_loop);
2554 current_loop = current_loop->outer;
2560 /* If for any loop, this is a jump insn between the NOTE_INSN_LOOP_CONT
2561 and NOTE_INSN_LOOP_END notes, update loop->cont_dominator. */
2562 else if (GET_CODE (insn) == JUMP_INSN
2563 && GET_CODE (PATTERN (insn)) != RETURN
2566 rtx label = JUMP_LABEL (insn);
2568 if (! any_condjump_p (insn))
2571 loop = current_loop;
2574 /* First see if we care about this loop. */
2575 if (loop->cont && loop->cont_dominator != const0_rtx)
2577 /* If the jump destination is not known, invalidate
2578 loop->cont_dominator. */
2580 loop->cont_dominator = const0_rtx;
2582 /* Check if the destination is between loop start and
2584 if ((INSN_LUID (label)
2585 < INSN_LUID (loop->cont))
2586 && (INSN_LUID (label)
2587 > INSN_LUID (loop->start))
2588 /* And if there is no later destination already
2590 && (! loop->cont_dominator
2591 || (INSN_LUID (label)
2592 > INSN_LUID (loop->cont_dominator))))
2593 loop->cont_dominator = label;
2600 /* Note that this will mark the NOTE_INSN_LOOP_END note as being in the
2601 enclosing loop, but this doesn't matter. */
2602 uid_loop[INSN_UID (insn)] = current_loop;
2605 /* Any loop containing a label used in an initializer must be invalidated,
2606 because it can be jumped into from anywhere. */
2608 for (label = forced_labels; label; label = XEXP (label, 1))
2610 for (loop = uid_loop[INSN_UID (XEXP (label, 0))];
2611 loop; loop = loop->outer)
2615 /* Any loop containing a label used for an exception handler must be
2616 invalidated, because it can be jumped into from anywhere. */
2618 for (label = exception_handler_labels; label; label = XEXP (label, 1))
2620 for (loop = uid_loop[INSN_UID (XEXP (label, 0))];
2621 loop; loop = loop->outer)
2625 /* Now scan all insn's in the function. If any JUMP_INSN branches into a
2626 loop that it is not contained within, that loop is marked invalid.
2627 If any INSN or CALL_INSN uses a label's address, then the loop containing
2628 that label is marked invalid, because it could be jumped into from
2631 Also look for blocks of code ending in an unconditional branch that
2632 exits the loop. If such a block is surrounded by a conditional
2633 branch around the block, move the block elsewhere (see below) and
2634 invert the jump to point to the code block. This may eliminate a
2635 label in our loop and will simplify processing by both us and a
2636 possible second cse pass. */
2638 for (insn = f; insn; insn = NEXT_INSN (insn))
2641 struct loop *this_loop = uid_loop[INSN_UID (insn)];
2643 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
2645 rtx note = find_reg_note (insn, REG_LABEL, NULL_RTX);
2648 for (loop = uid_loop[INSN_UID (XEXP (note, 0))];
2649 loop; loop = loop->outer)
2654 if (GET_CODE (insn) != JUMP_INSN)
2657 mark_loop_jump (PATTERN (insn), this_loop);
2659 /* See if this is an unconditional branch outside the loop. */
2661 && (GET_CODE (PATTERN (insn)) == RETURN
2662 || (any_uncondjump_p (insn)
2663 && onlyjump_p (insn)
2664 && (uid_loop[INSN_UID (JUMP_LABEL (insn))]
2666 && get_max_uid () < max_uid_for_loop)
2669 rtx our_next = next_real_insn (insn);
2670 rtx last_insn_to_move = NEXT_INSN (insn);
2671 struct loop *dest_loop;
2672 struct loop *outer_loop = NULL;
2674 /* Go backwards until we reach the start of the loop, a label,
2676 for (p = PREV_INSN (insn);
2677 GET_CODE (p) != CODE_LABEL
2678 && ! (GET_CODE (p) == NOTE
2679 && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
2680 && GET_CODE (p) != JUMP_INSN;
2684 /* Check for the case where we have a jump to an inner nested
2685 loop, and do not perform the optimization in that case. */
2687 if (JUMP_LABEL (insn))
2689 dest_loop = uid_loop[INSN_UID (JUMP_LABEL (insn))];
2692 for (outer_loop = dest_loop; outer_loop;
2693 outer_loop = outer_loop->outer)
2694 if (outer_loop == this_loop)
2699 /* Make sure that the target of P is within the current loop. */
2701 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p)
2702 && uid_loop[INSN_UID (JUMP_LABEL (p))] != this_loop)
2703 outer_loop = this_loop;
2705 /* If we stopped on a JUMP_INSN to the next insn after INSN,
2706 we have a block of code to try to move.
2708 We look backward and then forward from the target of INSN
2709 to find a BARRIER at the same loop depth as the target.
2710 If we find such a BARRIER, we make a new label for the start
2711 of the block, invert the jump in P and point it to that label,
2712 and move the block of code to the spot we found. */
2715 && GET_CODE (p) == JUMP_INSN
2716 && JUMP_LABEL (p) != 0
2717 /* Just ignore jumps to labels that were never emitted.
2718 These always indicate compilation errors. */
2719 && INSN_UID (JUMP_LABEL (p)) != 0
2720 && any_condjump_p (p) && onlyjump_p (p)
2721 && next_real_insn (JUMP_LABEL (p)) == our_next
2722 /* If it's not safe to move the sequence, then we
2724 && insns_safe_to_move_p (p, NEXT_INSN (insn),
2725 &last_insn_to_move))
2728 = JUMP_LABEL (insn) ? JUMP_LABEL (insn) : get_last_insn ();
2729 struct loop *target_loop = uid_loop[INSN_UID (target)];
2732 for (loc = target; loc; loc = PREV_INSN (loc))
2733 if (GET_CODE (loc) == BARRIER
2734 /* Don't move things inside a tablejump. */
2735 && ((loc2 = next_nonnote_insn (loc)) == 0
2736 || GET_CODE (loc2) != CODE_LABEL
2737 || (loc2 = next_nonnote_insn (loc2)) == 0
2738 || GET_CODE (loc2) != JUMP_INSN
2739 || (GET_CODE (PATTERN (loc2)) != ADDR_VEC
2740 && GET_CODE (PATTERN (loc2)) != ADDR_DIFF_VEC))
2741 && uid_loop[INSN_UID (loc)] == target_loop)
2745 for (loc = target; loc; loc = NEXT_INSN (loc))
2746 if (GET_CODE (loc) == BARRIER
2747 /* Don't move things inside a tablejump. */
2748 && ((loc2 = next_nonnote_insn (loc)) == 0
2749 || GET_CODE (loc2) != CODE_LABEL
2750 || (loc2 = next_nonnote_insn (loc2)) == 0
2751 || GET_CODE (loc2) != JUMP_INSN
2752 || (GET_CODE (PATTERN (loc2)) != ADDR_VEC
2753 && GET_CODE (PATTERN (loc2)) != ADDR_DIFF_VEC))
2754 && uid_loop[INSN_UID (loc)] == target_loop)
2759 rtx cond_label = JUMP_LABEL (p);
2760 rtx new_label = get_label_after (p);
2762 /* Ensure our label doesn't go away. */
2763 LABEL_NUSES (cond_label)++;
2765 /* Verify that uid_loop is large enough and that
2767 if (invert_jump (p, new_label, 1))
2771 /* If no suitable BARRIER was found, create a suitable
2772 one before TARGET. Since TARGET is a fall through
2773 path, we'll need to insert an jump around our block
2774 and a add a BARRIER before TARGET.
2776 This creates an extra unconditional jump outside
2777 the loop. However, the benefits of removing rarely
2778 executed instructions from inside the loop usually
2779 outweighs the cost of the extra unconditional jump
2780 outside the loop. */
2785 temp = gen_jump (JUMP_LABEL (insn));
2786 temp = emit_jump_insn_before (temp, target);
2787 JUMP_LABEL (temp) = JUMP_LABEL (insn);
2788 LABEL_NUSES (JUMP_LABEL (insn))++;
2789 loc = emit_barrier_before (target);
2792 /* Include the BARRIER after INSN and copy the
2794 new_label = squeeze_notes (new_label,
2796 reorder_insns (new_label, last_insn_to_move, loc);
2798 /* All those insns are now in TARGET_LOOP. */
2800 q != NEXT_INSN (last_insn_to_move);
2802 uid_loop[INSN_UID (q)] = target_loop;
2804 /* The label jumped to by INSN is no longer a loop
2805 exit. Unless INSN does not have a label (e.g.,
2806 it is a RETURN insn), search loop->exit_labels
2807 to find its label_ref, and remove it. Also turn
2808 off LABEL_OUTSIDE_LOOP_P bit. */
2809 if (JUMP_LABEL (insn))
2812 r = this_loop->exit_labels;
2813 r; q = r, r = LABEL_NEXTREF (r))
2814 if (XEXP (r, 0) == JUMP_LABEL (insn))
2816 LABEL_OUTSIDE_LOOP_P (r) = 0;
2818 LABEL_NEXTREF (q) = LABEL_NEXTREF (r);
2820 this_loop->exit_labels = LABEL_NEXTREF (r);
2824 for (loop = this_loop; loop && loop != target_loop;
2828 /* If we didn't find it, then something is
2834 /* P is now a jump outside the loop, so it must be put
2835 in loop->exit_labels, and marked as such.
2836 The easiest way to do this is to just call
2837 mark_loop_jump again for P. */
2838 mark_loop_jump (PATTERN (p), this_loop);
2840 /* If INSN now jumps to the insn after it,
2842 if (JUMP_LABEL (insn) != 0
2843 && (next_real_insn (JUMP_LABEL (insn))
2844 == next_real_insn (insn)))
2848 /* Continue the loop after where the conditional
2849 branch used to jump, since the only branch insn
2850 in the block (if it still remains) is an inter-loop
2851 branch and hence needs no processing. */
2852 insn = NEXT_INSN (cond_label);
2854 if (--LABEL_NUSES (cond_label) == 0)
2855 delete_insn (cond_label);
2857 /* This loop will be continued with NEXT_INSN (insn). */
2858 insn = PREV_INSN (insn);
2865 /* If any label in X jumps to a loop different from LOOP_NUM and any of the
2866 loops it is contained in, mark the target loop invalid.
2868 For speed, we assume that X is part of a pattern of a JUMP_INSN. */
2871 mark_loop_jump (x, loop)
2875 struct loop *dest_loop;
2876 struct loop *outer_loop;
2879 switch (GET_CODE (x))
2892 /* There could be a label reference in here. */
2893 mark_loop_jump (XEXP (x, 0), loop);
2899 mark_loop_jump (XEXP (x, 0), loop);
2900 mark_loop_jump (XEXP (x, 1), loop);
2904 /* This may refer to a LABEL_REF or SYMBOL_REF. */
2905 mark_loop_jump (XEXP (x, 1), loop);
2910 mark_loop_jump (XEXP (x, 0), loop);
2914 dest_loop = uid_loop[INSN_UID (XEXP (x, 0))];
2916 /* Link together all labels that branch outside the loop. This
2917 is used by final_[bg]iv_value and the loop unrolling code. Also
2918 mark this LABEL_REF so we know that this branch should predict
2921 /* A check to make sure the label is not in an inner nested loop,
2922 since this does not count as a loop exit. */
2925 for (outer_loop = dest_loop; outer_loop;
2926 outer_loop = outer_loop->outer)
2927 if (outer_loop == loop)
2933 if (loop && ! outer_loop)
2935 LABEL_OUTSIDE_LOOP_P (x) = 1;
2936 LABEL_NEXTREF (x) = loop->exit_labels;
2937 loop->exit_labels = x;
2939 for (outer_loop = loop;
2940 outer_loop && outer_loop != dest_loop;
2941 outer_loop = outer_loop->outer)
2942 outer_loop->exit_count++;
2945 /* If this is inside a loop, but not in the current loop or one enclosed
2946 by it, it invalidates at least one loop. */
2951 /* We must invalidate every nested loop containing the target of this
2952 label, except those that also contain the jump insn. */
2954 for (; dest_loop; dest_loop = dest_loop->outer)
2956 /* Stop when we reach a loop that also contains the jump insn. */
2957 for (outer_loop = loop; outer_loop; outer_loop = outer_loop->outer)
2958 if (dest_loop == outer_loop)
2961 /* If we get here, we know we need to invalidate a loop. */
2962 if (loop_dump_stream && ! dest_loop->invalid)
2963 fprintf (loop_dump_stream,
2964 "\nLoop at %d ignored due to multiple entry points.\n",
2965 INSN_UID (dest_loop->start));
2967 dest_loop->invalid = 1;
2972 /* If this is not setting pc, ignore. */
2973 if (SET_DEST (x) == pc_rtx)
2974 mark_loop_jump (SET_SRC (x), loop);
2978 mark_loop_jump (XEXP (x, 1), loop);
2979 mark_loop_jump (XEXP (x, 2), loop);
2984 for (i = 0; i < XVECLEN (x, 0); i++)
2985 mark_loop_jump (XVECEXP (x, 0, i), loop);
2989 for (i = 0; i < XVECLEN (x, 1); i++)
2990 mark_loop_jump (XVECEXP (x, 1, i), loop);
2994 /* Strictly speaking this is not a jump into the loop, only a possible
2995 jump out of the loop. However, we have no way to link the destination
2996 of this jump onto the list of exit labels. To be safe we mark this
2997 loop and any containing loops as invalid. */
3000 for (outer_loop = loop; outer_loop; outer_loop = outer_loop->outer)
3002 if (loop_dump_stream && ! outer_loop->invalid)
3003 fprintf (loop_dump_stream,
3004 "\nLoop at %d ignored due to unknown exit jump.\n",
3005 INSN_UID (outer_loop->start));
3006 outer_loop->invalid = 1;
3013 /* Return nonzero if there is a label in the range from
3014 insn INSN to and including the insn whose luid is END
3015 INSN must have an assigned luid (i.e., it must not have
3016 been previously created by loop.c). */
3019 labels_in_range_p (insn, end)
3023 while (insn && INSN_LUID (insn) <= end)
3025 if (GET_CODE (insn) == CODE_LABEL)
3027 insn = NEXT_INSN (insn);
3033 /* Record that a memory reference X is being set. */
3036 note_addr_stored (x, y, data)
3038 rtx y ATTRIBUTE_UNUSED;
3039 void *data ATTRIBUTE_UNUSED;
3041 struct loop_info *loop_info = data;
3043 if (x == 0 || GET_CODE (x) != MEM)
3046 /* Count number of memory writes.
3047 This affects heuristics in strength_reduce. */
3048 loop_info->num_mem_sets++;
3050 /* BLKmode MEM means all memory is clobbered. */
3051 if (GET_MODE (x) == BLKmode)
3053 if (RTX_UNCHANGING_P (x))
3054 loop_info->unknown_constant_address_altered = 1;
3056 loop_info->unknown_address_altered = 1;
3061 loop_info->store_mems = gen_rtx_EXPR_LIST (VOIDmode, x,
3062 loop_info->store_mems);
3065 /* X is a value modified by an INSN that references a biv inside a loop
3066 exit test (ie, X is somehow related to the value of the biv). If X
3067 is a pseudo that is used more than once, then the biv is (effectively)
3068 used more than once. DATA is really an `int *', and is set if the
3069 biv is used more than once. */
3072 note_set_pseudo_multiple_uses (x, y, data)
3074 rtx y ATTRIBUTE_UNUSED;
3077 struct loop_regs *regs = (struct loop_regs *) data;
3082 while (GET_CODE (x) == STRICT_LOW_PART
3083 || GET_CODE (x) == SIGN_EXTRACT
3084 || GET_CODE (x) == ZERO_EXTRACT
3085 || GET_CODE (x) == SUBREG)
3088 if (GET_CODE (x) != REG || REGNO (x) < FIRST_PSEUDO_REGISTER)
3091 /* If we do not have usage information, or if we know the register
3092 is used more than once, note that fact for check_dbra_loop. */
3093 if (REGNO (x) >= max_reg_before_loop
3094 || ! VARRAY_RTX (regs->single_usage, REGNO (x))
3095 || VARRAY_RTX (regs->single_usage, REGNO (x)) == const0_rtx)
3096 *((int *) data) = 1;
3099 /* Return nonzero if the rtx X is invariant over the current loop.
3101 The value is 2 if we refer to something only conditionally invariant.
3103 A memory ref is invariant if it is not volatile and does not conflict
3104 with anything stored in `loop_info->store_mems'. */
3107 loop_invariant_p (loop, x)
3108 const struct loop *loop;
3111 struct loop_info *loop_info = LOOP_INFO (loop);
3112 struct loop_regs *regs = LOOP_REGS (loop);
3114 register enum rtx_code code;
3115 register const char *fmt;
3116 int conditional = 0;
3121 code = GET_CODE (x);
3131 /* A LABEL_REF is normally invariant, however, if we are unrolling
3132 loops, and this label is inside the loop, then it isn't invariant.
3133 This is because each unrolled copy of the loop body will have
3134 a copy of this label. If this was invariant, then an insn loading
3135 the address of this label into a register might get moved outside
3136 the loop, and then each loop body would end up using the same label.
3138 We don't know the loop bounds here though, so just fail for all
3140 if (flag_unroll_loops)
3147 case UNSPEC_VOLATILE:
3151 /* We used to check RTX_UNCHANGING_P (x) here, but that is invalid
3152 since the reg might be set by initialization within the loop. */
3154 if ((x == frame_pointer_rtx || x == hard_frame_pointer_rtx
3155 || x == arg_pointer_rtx)
3156 && ! current_function_has_nonlocal_goto)
3159 if (LOOP_INFO (loop)->has_call
3160 && REGNO (x) < FIRST_PSEUDO_REGISTER && call_used_regs[REGNO (x)])
3163 if (VARRAY_INT (regs->set_in_loop, REGNO (x)) < 0)
3166 return VARRAY_INT (regs->set_in_loop, REGNO (x)) == 0;
3169 /* Volatile memory references must be rejected. Do this before
3170 checking for read-only items, so that volatile read-only items
3171 will be rejected also. */
3172 if (MEM_VOLATILE_P (x))
3175 /* See if there is any dependence between a store and this load. */
3176 mem_list_entry = loop_info->store_mems;
3177 while (mem_list_entry)
3179 if (true_dependence (XEXP (mem_list_entry, 0), VOIDmode,
3183 mem_list_entry = XEXP (mem_list_entry, 1);
3186 /* It's not invalidated by a store in memory
3187 but we must still verify the address is invariant. */
3191 /* Don't mess with insns declared volatile. */
3192 if (MEM_VOLATILE_P (x))
3200 fmt = GET_RTX_FORMAT (code);
3201 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3205 int tem = loop_invariant_p (loop, XEXP (x, i));
3211 else if (fmt[i] == 'E')
3214 for (j = 0; j < XVECLEN (x, i); j++)
3216 int tem = loop_invariant_p (loop, XVECEXP (x, i, j));
3226 return 1 + conditional;
3229 /* Return nonzero if all the insns in the loop that set REG
3230 are INSN and the immediately following insns,
3231 and if each of those insns sets REG in an invariant way
3232 (not counting uses of REG in them).
3234 The value is 2 if some of these insns are only conditionally invariant.
3236 We assume that INSN itself is the first set of REG
3237 and that its source is invariant. */
3240 consec_sets_invariant_p (loop, reg, n_sets, insn)
3241 const struct loop *loop;
3245 struct loop_regs *regs = LOOP_REGS (loop);
3247 unsigned int regno = REGNO (reg);
3249 /* Number of sets we have to insist on finding after INSN. */
3250 int count = n_sets - 1;
3251 int old = VARRAY_INT (regs->set_in_loop, regno);
3255 /* If N_SETS hit the limit, we can't rely on its value. */
3259 VARRAY_INT (regs->set_in_loop, regno) = 0;
3263 register enum rtx_code code;
3267 code = GET_CODE (p);
3269 /* If library call, skip to end of it. */
3270 if (code == INSN && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
3275 && (set = single_set (p))
3276 && GET_CODE (SET_DEST (set)) == REG
3277 && REGNO (SET_DEST (set)) == regno)
3279 this = loop_invariant_p (loop, SET_SRC (set));
3282 else if ((temp = find_reg_note (p, REG_EQUAL, NULL_RTX)))
3284 /* If this is a libcall, then any invariant REG_EQUAL note is OK.
3285 If this is an ordinary insn, then only CONSTANT_P REG_EQUAL
3287 this = (CONSTANT_P (XEXP (temp, 0))
3288 || (find_reg_note (p, REG_RETVAL, NULL_RTX)
3289 && loop_invariant_p (loop, XEXP (temp, 0))));
3296 else if (code != NOTE)
3298 VARRAY_INT (regs->set_in_loop, regno) = old;
3303 VARRAY_INT (regs->set_in_loop, regno) = old;
3304 /* If loop_invariant_p ever returned 2, we return 2. */
3305 return 1 + (value & 2);
3309 /* I don't think this condition is sufficient to allow INSN
3310 to be moved, so we no longer test it. */
3312 /* Return 1 if all insns in the basic block of INSN and following INSN
3313 that set REG are invariant according to TABLE. */
3316 all_sets_invariant_p (reg, insn, table)
3320 register rtx p = insn;
3321 register int regno = REGNO (reg);
3325 register enum rtx_code code;
3327 code = GET_CODE (p);
3328 if (code == CODE_LABEL || code == JUMP_INSN)
3330 if (code == INSN && GET_CODE (PATTERN (p)) == SET
3331 && GET_CODE (SET_DEST (PATTERN (p))) == REG
3332 && REGNO (SET_DEST (PATTERN (p))) == regno)
3334 if (! loop_invariant_p (loop, SET_SRC (PATTERN (p)), table))
3341 /* Look at all uses (not sets) of registers in X. For each, if it is
3342 the single use, set USAGE[REGNO] to INSN; if there was a previous use in
3343 a different insn, set USAGE[REGNO] to const0_rtx. */
3346 find_single_use_in_loop (insn, x, usage)
3351 enum rtx_code code = GET_CODE (x);
3352 const char *fmt = GET_RTX_FORMAT (code);
3356 VARRAY_RTX (usage, REGNO (x))
3357 = (VARRAY_RTX (usage, REGNO (x)) != 0
3358 && VARRAY_RTX (usage, REGNO (x)) != insn)
3359 ? const0_rtx : insn;
3361 else if (code == SET)
3363 /* Don't count SET_DEST if it is a REG; otherwise count things
3364 in SET_DEST because if a register is partially modified, it won't
3365 show up as a potential movable so we don't care how USAGE is set
3367 if (GET_CODE (SET_DEST (x)) != REG)
3368 find_single_use_in_loop (insn, SET_DEST (x), usage);
3369 find_single_use_in_loop (insn, SET_SRC (x), usage);
3372 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3374 if (fmt[i] == 'e' && XEXP (x, i) != 0)
3375 find_single_use_in_loop (insn, XEXP (x, i), usage);
3376 else if (fmt[i] == 'E')
3377 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3378 find_single_use_in_loop (insn, XVECEXP (x, i, j), usage);
3382 /* Count and record any set in X which is contained in INSN. Update
3383 MAY_NOT_MOVE and LAST_SET for any register set in X. */
3386 count_one_set (regs, insn, x, may_not_move, last_set)
3387 struct loop_regs *regs;
3389 varray_type may_not_move;
3392 if (GET_CODE (x) == CLOBBER && GET_CODE (XEXP (x, 0)) == REG)
3393 /* Don't move a reg that has an explicit clobber.
3394 It's not worth the pain to try to do it correctly. */
3395 VARRAY_CHAR (may_not_move, REGNO (XEXP (x, 0))) = 1;
3397 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
3399 rtx dest = SET_DEST (x);
3400 while (GET_CODE (dest) == SUBREG
3401 || GET_CODE (dest) == ZERO_EXTRACT
3402 || GET_CODE (dest) == SIGN_EXTRACT
3403 || GET_CODE (dest) == STRICT_LOW_PART)
3404 dest = XEXP (dest, 0);
3405 if (GET_CODE (dest) == REG)
3407 register int regno = REGNO (dest);
3408 /* If this is the first setting of this reg
3409 in current basic block, and it was set before,
3410 it must be set in two basic blocks, so it cannot
3411 be moved out of the loop. */
3412 if (VARRAY_INT (regs->set_in_loop, regno) > 0
3413 && last_set[regno] == 0)
3414 VARRAY_CHAR (may_not_move, regno) = 1;
3415 /* If this is not first setting in current basic block,
3416 see if reg was used in between previous one and this.
3417 If so, neither one can be moved. */
3418 if (last_set[regno] != 0
3419 && reg_used_between_p (dest, last_set[regno], insn))
3420 VARRAY_CHAR (may_not_move, regno) = 1;
3421 if (VARRAY_INT (regs->set_in_loop, regno) < 127)
3422 ++VARRAY_INT (regs->set_in_loop, regno);
3423 last_set[regno] = insn;
3428 /* Increment REGS->SET_IN_LOOP at the index of each register
3429 that is modified by an insn between FROM and TO.
3430 If the value of an element of REGS->SET_IN_LOOP becomes 127 or more,
3431 stop incrementing it, to avoid overflow.
3433 Store in SINGLE_USAGE[I] the single insn in which register I is
3434 used, if it is only used once. Otherwise, it is set to 0 (for no
3435 uses) or const0_rtx for more than one use. This parameter may be zero,
3436 in which case this processing is not done.
3438 Store in *COUNT_PTR the number of actual instruction
3439 in the loop. We use this to decide what is worth moving out. */
3441 /* last_set[n] is nonzero iff reg n has been set in the current basic block.
3442 In that case, it is the insn that last set reg n. */
3445 count_loop_regs_set (loop, may_not_move, single_usage, count_ptr, nregs)
3446 const struct loop *loop;
3447 varray_type may_not_move;
3448 varray_type single_usage;
3452 struct loop_regs *regs = LOOP_REGS (loop);
3453 register rtx *last_set = (rtx *) xcalloc (nregs, sizeof (rtx));
3455 register int count = 0;
3457 for (insn = loop->top ? loop->top : loop->start; insn != loop->end;
3458 insn = NEXT_INSN (insn))
3464 /* Record registers that have exactly one use. */
3465 find_single_use_in_loop (insn, PATTERN (insn), single_usage);
3467 /* Include uses in REG_EQUAL notes. */
3468 if (REG_NOTES (insn))
3469 find_single_use_in_loop (insn, REG_NOTES (insn), single_usage);
3471 if (GET_CODE (PATTERN (insn)) == SET
3472 || GET_CODE (PATTERN (insn)) == CLOBBER)
3473 count_one_set (regs, insn, PATTERN (insn), may_not_move, last_set);
3474 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
3477 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
3478 count_one_set (regs, insn, XVECEXP (PATTERN (insn), 0, i),
3479 may_not_move, last_set);
3483 if (GET_CODE (insn) == CODE_LABEL || GET_CODE (insn) == JUMP_INSN)
3484 bzero ((char *) last_set, nregs * sizeof (rtx));
3492 /* Given a loop that is bounded by LOOP->START and LOOP->END and that
3493 is entered at LOOP->SCAN_START, return 1 if the register set in SET
3494 contained in insn INSN is used by any insn that precedes INSN in
3495 cyclic order starting from the loop entry point.
3497 We don't want to use INSN_LUID here because if we restrict INSN to those
3498 that have a valid INSN_LUID, it means we cannot move an invariant out
3499 from an inner loop past two loops. */
3502 loop_reg_used_before_p (loop, set, insn)
3503 const struct loop *loop;
3506 rtx reg = SET_DEST (set);
3509 /* Scan forward checking for register usage. If we hit INSN, we
3510 are done. Otherwise, if we hit LOOP->END, wrap around to LOOP->START. */
3511 for (p = loop->scan_start; p != insn; p = NEXT_INSN (p))
3513 if (INSN_P (p) && reg_overlap_mentioned_p (reg, PATTERN (p)))
3523 /* A "basic induction variable" or biv is a pseudo reg that is set
3524 (within this loop) only by incrementing or decrementing it. */
3525 /* A "general induction variable" or giv is a pseudo reg whose
3526 value is a linear function of a biv. */
3528 /* Bivs are recognized by `basic_induction_var';
3529 Givs by `general_induction_var'. */
3531 /* Indexed by register number, indicates whether or not register is an
3532 induction variable, and if so what type. */
3534 varray_type reg_iv_type;
3536 /* Indexed by register number, contains pointer to `struct induction'
3537 if register is an induction variable. This holds general info for
3538 all induction variables. */
3540 varray_type reg_iv_info;
3542 /* Indexed by register number, contains pointer to `struct iv_class'
3543 if register is a basic induction variable. This holds info describing
3544 the class (a related group) of induction variables that the biv belongs
3547 struct iv_class **reg_biv_class;
3549 /* The head of a list which links together (via the next field)
3550 every iv class for the current loop. */
3552 struct iv_class *loop_iv_list;
3554 /* Givs made from biv increments are always splittable for loop unrolling.
3555 Since there is no regscan info for them, we have to keep track of them
3557 unsigned int first_increment_giv, last_increment_giv;
3559 /* Communication with routines called via `note_stores'. */
3561 static rtx note_insn;
3563 /* Dummy register to have non-zero DEST_REG for DEST_ADDR type givs. */
3565 static rtx addr_placeholder;
3567 /* ??? Unfinished optimizations, and possible future optimizations,
3568 for the strength reduction code. */
3570 /* ??? The interaction of biv elimination, and recognition of 'constant'
3571 bivs, may cause problems. */
3573 /* ??? Add heuristics so that DEST_ADDR strength reduction does not cause
3574 performance problems.
3576 Perhaps don't eliminate things that can be combined with an addressing
3577 mode. Find all givs that have the same biv, mult_val, and add_val;
3578 then for each giv, check to see if its only use dies in a following
3579 memory address. If so, generate a new memory address and check to see
3580 if it is valid. If it is valid, then store the modified memory address,
3581 otherwise, mark the giv as not done so that it will get its own iv. */
3583 /* ??? Could try to optimize branches when it is known that a biv is always
3586 /* ??? When replace a biv in a compare insn, we should replace with closest
3587 giv so that an optimized branch can still be recognized by the combiner,
3588 e.g. the VAX acb insn. */
3590 /* ??? Many of the checks involving uid_luid could be simplified if regscan
3591 was rerun in loop_optimize whenever a register was added or moved.
3592 Also, some of the optimizations could be a little less conservative. */
3594 /* Scan the loop body and call FNCALL for each insn. In the addition to the
3595 LOOP and INSN parameters pass MAYBE_MULTIPLE and NOT_EVERY_ITERATION to the
3598 NOT_EVERY_ITERATION if current insn is not executed at least once for every
3599 loop iteration except for the last one.
3601 MAYBE_MULTIPLE is 1 if current insn may be executed more than once for every
3605 for_each_insn_in_loop (loop, fncall)
3607 loop_insn_callback fncall;
3609 /* This is 1 if current insn is not executed at least once for every loop
3611 int not_every_iteration = 0;
3612 int maybe_multiple = 0;
3613 int past_loop_latch = 0;
3617 /* If loop_scan_start points to the loop exit test, we have to be wary of
3618 subversive use of gotos inside expression statements. */
3619 if (prev_nonnote_insn (loop->scan_start) != prev_nonnote_insn (loop->start))
3620 maybe_multiple = back_branch_in_range_p (loop, loop->scan_start);
3622 /* Scan through loop to find all possible bivs. */
3624 for (p = next_insn_in_loop (loop, loop->scan_start);
3626 p = next_insn_in_loop (loop, p))
3628 p = fncall (loop, p, not_every_iteration, maybe_multiple);
3630 /* Past CODE_LABEL, we get to insns that may be executed multiple
3631 times. The only way we can be sure that they can't is if every
3632 jump insn between here and the end of the loop either
3633 returns, exits the loop, is a jump to a location that is still
3634 behind the label, or is a jump to the loop start. */
3636 if (GET_CODE (p) == CODE_LABEL)
3644 insn = NEXT_INSN (insn);
3645 if (insn == loop->scan_start)
3647 if (insn == loop->end)
3653 if (insn == loop->scan_start)
3657 if (GET_CODE (insn) == JUMP_INSN
3658 && GET_CODE (PATTERN (insn)) != RETURN
3659 && (!any_condjump_p (insn)
3660 || (JUMP_LABEL (insn) != 0
3661 && JUMP_LABEL (insn) != loop->scan_start
3662 && !loop_insn_first_p (p, JUMP_LABEL (insn)))))
3670 /* Past a jump, we get to insns for which we can't count
3671 on whether they will be executed during each iteration. */
3672 /* This code appears twice in strength_reduce. There is also similar
3673 code in scan_loop. */
3674 if (GET_CODE (p) == JUMP_INSN
3675 /* If we enter the loop in the middle, and scan around to the
3676 beginning, don't set not_every_iteration for that.
3677 This can be any kind of jump, since we want to know if insns
3678 will be executed if the loop is executed. */
3679 && !(JUMP_LABEL (p) == loop->top
3680 && ((NEXT_INSN (NEXT_INSN (p)) == loop->end
3681 && any_uncondjump_p (p))
3682 || (NEXT_INSN (p) == loop->end && any_condjump_p (p)))))
3686 /* If this is a jump outside the loop, then it also doesn't
3687 matter. Check to see if the target of this branch is on the
3688 loop->exits_labels list. */
3690 for (label = loop->exit_labels; label; label = LABEL_NEXTREF (label))
3691 if (XEXP (label, 0) == JUMP_LABEL (p))
3695 not_every_iteration = 1;
3698 else if (GET_CODE (p) == NOTE)
3700 /* At the virtual top of a converted loop, insns are again known to
3701 be executed each iteration: logically, the loop begins here
3702 even though the exit code has been duplicated.
3704 Insns are also again known to be executed each iteration at
3705 the LOOP_CONT note. */
3706 if ((NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP
3707 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_CONT)
3709 not_every_iteration = 0;
3710 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
3712 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
3716 /* Note if we pass a loop latch. If we do, then we can not clear
3717 NOT_EVERY_ITERATION below when we pass the last CODE_LABEL in
3718 a loop since a jump before the last CODE_LABEL may have started
3719 a new loop iteration.
3721 Note that LOOP_TOP is only set for rotated loops and we need
3722 this check for all loops, so compare against the CODE_LABEL
3723 which immediately follows LOOP_START. */
3724 if (GET_CODE (p) == JUMP_INSN
3725 && JUMP_LABEL (p) == NEXT_INSN (loop->start))
3726 past_loop_latch = 1;
3728 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
3729 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
3730 or not an insn is known to be executed each iteration of the
3731 loop, whether or not any iterations are known to occur.
3733 Therefore, if we have just passed a label and have no more labels
3734 between here and the test insn of the loop, and we have not passed
3735 a jump to the top of the loop, then we know these insns will be
3736 executed each iteration. */
3738 if (not_every_iteration
3740 && GET_CODE (p) == CODE_LABEL
3741 && no_labels_between_p (p, loop->end)
3742 && loop_insn_first_p (p, loop->cont))
3743 not_every_iteration = 0;
3747 /* Perform strength reduction and induction variable elimination.
3749 Pseudo registers created during this function will be beyond the
3750 last valid index in several tables including regs->n_times_set and
3751 regno_last_uid. This does not cause a problem here, because the
3752 added registers cannot be givs outside of their loop, and hence
3753 will never be reconsidered. But scan_loop must check regnos to
3754 make sure they are in bounds. */
3757 strength_reduce (loop, insn_count, flags)
3762 struct loop_info *loop_info = LOOP_INFO (loop);
3763 struct loop_regs *regs = LOOP_REGS (loop);
3765 /* Temporary list pointers for traversing loop_iv_list. */
3766 struct iv_class *bl, **backbl;
3767 /* Ratio of extra register life span we can justify
3768 for saving an instruction. More if loop doesn't call subroutines
3769 since in that case saving an insn makes more difference
3770 and more registers are available. */
3771 /* ??? could set this to last value of threshold in move_movables */
3772 int threshold = (loop_info->has_call ? 1 : 2) * (3 + n_non_fixed_regs);
3773 /* Map of pseudo-register replacements. */
3774 rtx *reg_map = NULL;
3778 rtx end_insert_before;
3779 int n_extra_increment;
3780 int unrolled_insn_copies = 0;
3781 rtx loop_start = loop->start;
3782 rtx loop_end = loop->end;
3783 rtx loop_scan_start = loop->scan_start;
3784 rtx test_reg = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 1);
3786 VARRAY_INT_INIT (reg_iv_type, max_reg_before_loop, "reg_iv_type");
3787 VARRAY_GENERIC_PTR_INIT (reg_iv_info, max_reg_before_loop, "reg_iv_info");
3788 reg_biv_class = (struct iv_class **)
3789 xcalloc (max_reg_before_loop, sizeof (struct iv_class *));
3792 addr_placeholder = gen_reg_rtx (Pmode);
3794 /* Save insn immediately after the loop_end. Insns inserted after loop_end
3795 must be put before this insn, so that they will appear in the right
3796 order (i.e. loop order).
3798 If loop_end is the end of the current function, then emit a
3799 NOTE_INSN_DELETED after loop_end and set end_insert_before to the
3801 if (NEXT_INSN (loop_end) != 0)
3802 end_insert_before = NEXT_INSN (loop_end);
3804 end_insert_before = emit_note_after (NOTE_INSN_DELETED, loop_end);
3806 for_each_insn_in_loop (loop, check_insn_for_bivs);
3808 /* Scan loop_iv_list to remove all regs that proved not to be bivs.
3809 Make a sanity check against regs->n_times_set. */
3810 for (backbl = &loop_iv_list, bl = *backbl; bl; bl = bl->next)
3812 if (REG_IV_TYPE (bl->regno) != BASIC_INDUCT
3813 /* Above happens if register modified by subreg, etc. */
3814 /* Make sure it is not recognized as a basic induction var: */
3815 || VARRAY_INT (regs->n_times_set, bl->regno) != bl->biv_count
3816 /* If never incremented, it is invariant that we decided not to
3817 move. So leave it alone. */
3818 || ! bl->incremented)
3820 if (loop_dump_stream)
3821 fprintf (loop_dump_stream, "Reg %d: biv discarded, %s\n",
3823 (REG_IV_TYPE (bl->regno) != BASIC_INDUCT
3824 ? "not induction variable"
3825 : (! bl->incremented ? "never incremented"
3828 REG_IV_TYPE (bl->regno) = NOT_BASIC_INDUCT;
3835 if (loop_dump_stream)
3836 fprintf (loop_dump_stream, "Reg %d: biv verified\n", bl->regno);
3840 /* Exit if there are no bivs. */
3843 /* Can still unroll the loop anyways, but indicate that there is no
3844 strength reduction info available. */
3845 if (flags & LOOP_UNROLL)
3846 unroll_loop (loop, insn_count, end_insert_before, 0);
3851 /* Find initial value for each biv by searching backwards from loop_start,
3852 halting at first label. Also record any test condition. */
3855 for (p = loop_start; p && GET_CODE (p) != CODE_LABEL; p = PREV_INSN (p))
3859 if (GET_CODE (p) == CALL_INSN)
3863 note_stores (PATTERN (p), record_initial, NULL);
3865 /* Record any test of a biv that branches around the loop if no store
3866 between it and the start of loop. We only care about tests with
3867 constants and registers and only certain of those. */
3868 if (GET_CODE (p) == JUMP_INSN
3869 && JUMP_LABEL (p) != 0
3870 && next_real_insn (JUMP_LABEL (p)) == next_real_insn (loop_end)
3871 && (test = get_condition_for_loop (loop, p)) != 0
3872 && GET_CODE (XEXP (test, 0)) == REG
3873 && REGNO (XEXP (test, 0)) < max_reg_before_loop
3874 && (bl = reg_biv_class[REGNO (XEXP (test, 0))]) != 0
3875 && valid_initial_value_p (XEXP (test, 1), p, call_seen, loop_start)
3876 && bl->init_insn == 0)
3878 /* If an NE test, we have an initial value! */
3879 if (GET_CODE (test) == NE)
3882 bl->init_set = gen_rtx_SET (VOIDmode,
3883 XEXP (test, 0), XEXP (test, 1));
3886 bl->initial_test = test;
3890 /* Look at the each biv and see if we can say anything better about its
3891 initial value from any initializing insns set up above. (This is done
3892 in two passes to avoid missing SETs in a PARALLEL.) */
3893 for (backbl = &loop_iv_list; (bl = *backbl); backbl = &bl->next)
3898 if (! bl->init_insn)
3901 /* IF INIT_INSN has a REG_EQUAL or REG_EQUIV note and the value
3902 is a constant, use the value of that. */
3903 if (((note = find_reg_note (bl->init_insn, REG_EQUAL, 0)) != NULL
3904 && CONSTANT_P (XEXP (note, 0)))
3905 || ((note = find_reg_note (bl->init_insn, REG_EQUIV, 0)) != NULL
3906 && CONSTANT_P (XEXP (note, 0))))
3907 src = XEXP (note, 0);
3909 src = SET_SRC (bl->init_set);
3911 if (loop_dump_stream)
3912 fprintf (loop_dump_stream,
3913 "Biv %d initialized at insn %d: initial value ",
3914 bl->regno, INSN_UID (bl->init_insn));
3916 if ((GET_MODE (src) == GET_MODE (regno_reg_rtx[bl->regno])
3917 || GET_MODE (src) == VOIDmode)
3918 && valid_initial_value_p (src, bl->init_insn, call_seen, loop_start))
3920 bl->initial_value = src;
3922 if (loop_dump_stream)
3924 if (GET_CODE (src) == CONST_INT)
3926 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, INTVAL (src));
3927 fputc ('\n', loop_dump_stream);
3931 print_rtl (loop_dump_stream, src);
3932 fprintf (loop_dump_stream, "\n");
3938 struct iv_class *bl2 = 0;
3939 rtx increment = NULL_RTX;
3941 /* Biv initial value is not a simple move. If it is the sum of
3942 another biv and a constant, check if both bivs are incremented
3943 in lockstep. Then we are actually looking at a giv.
3944 For simplicity, we only handle the case where there is but a
3945 single increment, and the register is not used elsewhere. */
3946 if (bl->biv_count == 1
3947 && bl->regno < max_reg_before_loop
3948 && uid_luid[REGNO_LAST_UID (bl->regno)] < INSN_LUID (loop_end)
3949 && GET_CODE (src) == PLUS
3950 && GET_CODE (XEXP (src, 0)) == REG
3951 && CONSTANT_P (XEXP (src, 1))
3952 && ((increment = biv_total_increment (bl)) != NULL_RTX))
3954 unsigned int regno = REGNO (XEXP (src, 0));
3956 for (bl2 = loop_iv_list; bl2; bl2 = bl2->next)
3957 if (bl2->regno == regno)
3961 /* Now, can we transform this biv into a giv? */
3963 && bl2->biv_count == 1
3964 && rtx_equal_p (increment, biv_total_increment (bl2))
3965 /* init_insn is only set to insns that are before loop_start
3966 without any intervening labels. */
3967 && ! reg_set_between_p (bl2->biv->src_reg,
3968 PREV_INSN (bl->init_insn), loop_start)
3969 /* The register from BL2 must be set before the register from
3970 BL is set, or we must be able to move the latter set after
3971 the former set. Currently there can't be any labels
3972 in-between when biv_total_increment returns nonzero both times
3973 but we test it here in case some day some real cfg analysis
3974 gets used to set always_computable. */
3975 && (loop_insn_first_p (bl2->biv->insn, bl->biv->insn)
3976 ? no_labels_between_p (bl2->biv->insn, bl->biv->insn)
3977 : (! reg_used_between_p (bl->biv->src_reg, bl->biv->insn,
3979 && no_jumps_between_p (bl->biv->insn, bl2->biv->insn)))
3980 && validate_change (bl->biv->insn,
3981 &SET_SRC (single_set (bl->biv->insn)),
3984 rtx dominator = loop->cont_dominator;
3985 rtx giv = bl->biv->src_reg;
3986 rtx giv_insn = bl->biv->insn;
3987 rtx after_giv = NEXT_INSN (giv_insn);
3989 if (loop_dump_stream)
3990 fprintf (loop_dump_stream, "is giv of biv %d\n", bl2->regno);
3991 /* Let this giv be discovered by the generic code. */
3992 REG_IV_TYPE (bl->regno) = UNKNOWN_INDUCT;
3993 reg_biv_class[bl->regno] = (struct iv_class *) NULL_PTR;
3994 /* We can get better optimization if we can move the giv setting
3995 before the first giv use. */
3997 && ! loop_insn_first_p (dominator, loop_scan_start)
3998 && ! reg_set_between_p (bl2->biv->src_reg, loop_start,
4000 && ! reg_used_between_p (giv, loop_start, dominator)
4001 && ! reg_used_between_p (giv, giv_insn, loop_end))
4006 for (next = NEXT_INSN (dominator);; next = NEXT_INSN (next))
4008 if (GET_CODE (next) == JUMP_INSN
4010 && insn_dependent_p (giv_insn, next)))
4013 if (! INSN_P (next) || ! sets_cc0_p (PATTERN (next)))
4017 if (loop_dump_stream)
4018 fprintf (loop_dump_stream, "move after insn %d\n",
4019 INSN_UID (dominator));
4020 /* Avoid problems with luids by actually moving the insn
4021 and adjusting all luids in the range. */
4022 reorder_insns (giv_insn, giv_insn, dominator);
4023 for (p = dominator; INSN_UID (p) >= max_uid_for_loop;)
4025 compute_luids (giv_insn, after_giv, INSN_LUID (p));
4026 /* If the only purpose of the init insn is to initialize
4027 this giv, delete it. */
4028 if (single_set (bl->init_insn)
4029 && ! reg_used_between_p (giv, bl->init_insn, loop_start))
4030 delete_insn (bl->init_insn);
4032 else if (! loop_insn_first_p (bl2->biv->insn, bl->biv->insn))
4034 rtx p = PREV_INSN (giv_insn);
4035 while (INSN_UID (p) >= max_uid_for_loop)
4037 reorder_insns (giv_insn, giv_insn, bl2->biv->insn);
4038 compute_luids (after_giv, NEXT_INSN (giv_insn),
4041 /* Remove this biv from the chain. */
4045 /* If we can't make it a giv,
4046 let biv keep initial value of "itself". */
4047 else if (loop_dump_stream)
4048 fprintf (loop_dump_stream, "is complex\n");
4052 /* If a biv is unconditionally incremented several times in a row, convert
4053 all but the last increment into a giv. */
4055 /* Get an upper bound for the number of registers
4056 we might have after all bivs have been processed. */
4057 first_increment_giv = max_reg_num ();
4058 for (n_extra_increment = 0, bl = loop_iv_list; bl; bl = bl->next)
4059 n_extra_increment += bl->biv_count - 1;
4061 /* If the loop contains volatile memory references do not allow any
4062 replacements to take place, since this could loose the volatile
4064 if (n_extra_increment && ! loop_info->has_volatile)
4066 unsigned int nregs = first_increment_giv + n_extra_increment;
4068 /* Reallocate reg_iv_type and reg_iv_info. */
4069 VARRAY_GROW (reg_iv_type, nregs);
4070 VARRAY_GROW (reg_iv_info, nregs);
4072 for (bl = loop_iv_list; bl; bl = bl->next)
4074 struct induction **vp, *v, *next;
4075 int biv_dead_after_loop = 0;
4077 /* The biv increments lists are in reverse order. Fix this
4079 for (v = bl->biv, bl->biv = 0; v; v = next)
4082 v->next_iv = bl->biv;
4086 /* We must guard against the case that an early exit between v->insn
4087 and next->insn leaves the biv live after the loop, since that
4088 would mean that we'd be missing an increment for the final
4089 value. The following test to set biv_dead_after_loop is like
4090 the first part of the test to set bl->eliminable.
4091 We don't check here if we can calculate the final value, since
4092 this can't succeed if we already know that there is a jump
4093 between v->insn and next->insn, yet next->always_executed is
4094 set and next->maybe_multiple is cleared. Such a combination
4095 implies that the jump destination is outside the loop.
4096 If we want to make this check more sophisticated, we should
4097 check each branch between v->insn and next->insn individually
4098 to see if the biv is dead at its destination. */
4100 if (uid_luid[REGNO_LAST_UID (bl->regno)] < INSN_LUID (loop_end)
4102 && INSN_UID (bl->init_insn) < max_uid_for_loop
4103 && (uid_luid[REGNO_FIRST_UID (bl->regno)]
4104 >= INSN_LUID (bl->init_insn))
4105 #ifdef HAVE_decrement_and_branch_until_zero
4108 && ! reg_mentioned_p (bl->biv->dest_reg, SET_SRC (bl->init_set)))
4109 biv_dead_after_loop = 1;
4111 for (vp = &bl->biv, next = *vp; v = next, next = v->next_iv;)
4113 HOST_WIDE_INT offset;
4114 rtx set, add_val, old_reg, dest_reg, last_use_insn, note;
4115 int old_regno, new_regno;
4118 if (! v->always_executed
4119 || v->maybe_multiple
4120 || GET_CODE (v->add_val) != CONST_INT
4121 || ! next->always_executed
4122 || next->maybe_multiple
4123 || ! CONSTANT_P (next->add_val)
4124 || v->mult_val != const1_rtx
4125 || next->mult_val != const1_rtx
4126 || ! (biv_dead_after_loop
4127 || no_jumps_between_p (v->insn, next->insn)))
4132 offset = INTVAL (v->add_val);
4133 set = single_set (v->insn);
4134 add_val = plus_constant (next->add_val, offset);
4135 old_reg = v->dest_reg;
4136 dest_reg = gen_reg_rtx (v->mode);
4138 /* Unlike reg_iv_type / reg_iv_info, the other three arrays
4139 have been allocated with some slop space, so we may not
4140 actually need to reallocate them. If we do, the following
4141 if statement will be executed just once in this loop. */
4142 if ((unsigned) max_reg_num () > regs->n_times_set->num_elements)
4144 /* Grow all the remaining arrays. */
4145 VARRAY_GROW (regs->set_in_loop, nregs);
4146 VARRAY_GROW (regs->n_times_set, nregs);
4147 VARRAY_GROW (regs->may_not_optimize, nregs);
4148 VARRAY_GROW (regs->single_usage, nregs);
4151 /* Some bivs are incremented with a multi-insn sequence.
4152 The first insn contains the add. */
4153 next_loc_insn = next->insn;
4154 while (NOTE_P (next_loc_insn)
4155 || ! loc_mentioned_in_p (next->location,
4156 PATTERN (next_loc_insn)))
4157 next_loc_insn = PREV_INSN (next_loc_insn);
4159 if (next_loc_insn == v->insn)
4162 if (! validate_change (next_loc_insn, next->location, add_val, 0))
4168 /* Here we can try to eliminate the increment by combining
4169 it into the uses. */
4171 /* Set last_use_insn so that we can check against it. */
4173 for (last_use_insn = v->insn, p = NEXT_INSN (v->insn);
4175 p = next_insn_in_loop (loop, p))
4179 if (reg_mentioned_p (old_reg, PATTERN (p)))
4185 /* If we can't get the LUIDs for the insns, we can't
4186 calculate the lifetime. This is likely from unrolling
4187 of an inner loop, so there is little point in making this
4188 a DEST_REG giv anyways. */
4189 if (INSN_UID (v->insn) >= max_uid_for_loop
4190 || INSN_UID (last_use_insn) >= max_uid_for_loop
4191 || ! validate_change (v->insn, &SET_DEST (set), dest_reg, 0))
4193 /* Change the increment at NEXT back to what it was. */
4194 if (! validate_change (next_loc_insn, next->location,
4200 next->add_val = add_val;
4201 v->dest_reg = dest_reg;
4202 v->giv_type = DEST_REG;
4203 v->location = &SET_SRC (set);
4205 v->combined_with = 0;
4207 v->derive_adjustment = 0;
4213 v->auto_inc_opt = 0;
4216 v->derived_from = 0;
4217 v->always_computable = 1;
4218 v->always_executed = 1;
4220 v->no_const_addval = 0;
4222 old_regno = REGNO (old_reg);
4223 new_regno = REGNO (dest_reg);
4224 VARRAY_INT (regs->set_in_loop, old_regno)--;
4225 VARRAY_INT (regs->set_in_loop, new_regno) = 1;
4226 VARRAY_INT (regs->n_times_set, old_regno)--;
4227 VARRAY_INT (regs->n_times_set, new_regno) = 1;
4228 VARRAY_CHAR (regs->may_not_optimize, new_regno) = 0;
4230 REG_IV_TYPE (new_regno) = GENERAL_INDUCT;
4231 REG_IV_INFO (new_regno) = v;
4233 /* If next_insn has a REG_EQUAL note that mentiones OLD_REG,
4234 it must be replaced. */
4235 note = find_reg_note (next->insn, REG_EQUAL, NULL_RTX);
4236 if (note && reg_mentioned_p (old_reg, XEXP (note, 0)))
4237 XEXP (note, 0) = copy_rtx (SET_SRC (single_set (next->insn)));
4239 /* Remove the increment from the list of biv increments,
4240 and record it as a giv. */
4243 v->next_iv = bl->giv;
4246 v->benefit = rtx_cost (SET_SRC (set), SET);
4247 bl->total_benefit += v->benefit;
4249 /* Now replace the biv with DEST_REG in all insns between
4250 the replaced increment and the next increment, and
4251 remember the last insn that needed a replacement. */
4252 for (last_use_insn = v->insn, p = NEXT_INSN (v->insn);
4254 p = next_insn_in_loop (loop, p))
4260 if (reg_mentioned_p (old_reg, PATTERN (p)))
4263 if (! validate_replace_rtx (old_reg, dest_reg, p))
4266 for (note = REG_NOTES (p); note; note = XEXP (note, 1))
4268 if (GET_CODE (note) == EXPR_LIST)
4270 = replace_rtx (XEXP (note, 0), old_reg, dest_reg);
4274 v->last_use = last_use_insn;
4275 v->lifetime = INSN_LUID (last_use_insn) - INSN_LUID (v->insn);
4276 /* If the lifetime is zero, it means that this register is really
4277 a dead store. So mark this as a giv that can be ignored.
4278 This will not prevent the biv from being eliminated. */
4279 if (v->lifetime == 0)
4282 if (loop_dump_stream)
4283 fprintf (loop_dump_stream,
4284 "Increment %d of biv %d converted to giv %d.\n\n",
4285 INSN_UID (v->insn), old_regno, new_regno);
4289 last_increment_giv = max_reg_num () - 1;
4291 /* Search the loop for general induction variables. */
4293 for_each_insn_in_loop (loop, check_insn_for_givs);
4295 /* Try to calculate and save the number of loop iterations. This is
4296 set to zero if the actual number can not be calculated. This must
4297 be called after all giv's have been identified, since otherwise it may
4298 fail if the iteration variable is a giv. */
4300 loop_iterations (loop);
4302 /* Now for each giv for which we still don't know whether or not it is
4303 replaceable, check to see if it is replaceable because its final value
4304 can be calculated. This must be done after loop_iterations is called,
4305 so that final_giv_value will work correctly. */
4307 for (bl = loop_iv_list; bl; bl = bl->next)
4309 struct induction *v;
4311 for (v = bl->giv; v; v = v->next_iv)
4312 if (! v->replaceable && ! v->not_replaceable)
4313 check_final_value (loop, v);
4316 /* Try to prove that the loop counter variable (if any) is always
4317 nonnegative; if so, record that fact with a REG_NONNEG note
4318 so that "decrement and branch until zero" insn can be used. */
4319 check_dbra_loop (loop, insn_count);
4321 /* Create reg_map to hold substitutions for replaceable giv regs.
4322 Some givs might have been made from biv increments, so look at
4323 reg_iv_type for a suitable size. */
4324 reg_map_size = reg_iv_type->num_elements;
4325 reg_map = (rtx *) xcalloc (reg_map_size, sizeof (rtx));
4327 /* Examine each iv class for feasibility of strength reduction/induction
4328 variable elimination. */
4330 for (bl = loop_iv_list; bl; bl = bl->next)
4332 struct induction *v;
4335 rtx final_value = 0;
4338 /* Test whether it will be possible to eliminate this biv
4339 provided all givs are reduced. This is possible if either
4340 the reg is not used outside the loop, or we can compute
4341 what its final value will be.
4343 For architectures with a decrement_and_branch_until_zero insn,
4344 don't do this if we put a REG_NONNEG note on the endtest for
4347 /* Compare against bl->init_insn rather than loop_start.
4348 We aren't concerned with any uses of the biv between
4349 init_insn and loop_start since these won't be affected
4350 by the value of the biv elsewhere in the function, so
4351 long as init_insn doesn't use the biv itself.
4352 March 14, 1989 -- self@bayes.arc.nasa.gov */
4354 if ((uid_luid[REGNO_LAST_UID (bl->regno)] < INSN_LUID (loop_end)
4356 && INSN_UID (bl->init_insn) < max_uid_for_loop
4357 && uid_luid[REGNO_FIRST_UID (bl->regno)] >= INSN_LUID (bl->init_insn)
4358 #ifdef HAVE_decrement_and_branch_until_zero
4361 && ! reg_mentioned_p (bl->biv->dest_reg, SET_SRC (bl->init_set)))
4362 || ((final_value = final_biv_value (loop, bl))
4363 #ifdef HAVE_decrement_and_branch_until_zero
4367 bl->eliminable = maybe_eliminate_biv (loop, bl, 0, threshold,
4371 if (loop_dump_stream)
4373 fprintf (loop_dump_stream,
4374 "Cannot eliminate biv %d.\n",
4376 fprintf (loop_dump_stream,
4377 "First use: insn %d, last use: insn %d.\n",
4378 REGNO_FIRST_UID (bl->regno),
4379 REGNO_LAST_UID (bl->regno));
4383 /* Check each extension dependant giv in this class to see if its
4384 root biv is safe from wrapping in the interior mode. */
4385 check_ext_dependant_givs (bl, loop_info);
4387 /* Combine all giv's for this iv_class. */
4388 combine_givs (regs, bl);
4390 /* This will be true at the end, if all givs which depend on this
4391 biv have been strength reduced.
4392 We can't (currently) eliminate the biv unless this is so. */
4395 /* Check each giv in this class to see if we will benefit by reducing
4396 it. Skip giv's combined with others. */
4397 for (v = bl->giv; v; v = v->next_iv)
4399 struct induction *tv;
4402 if (v->ignore || v->same)
4405 benefit = v->benefit;
4406 PUT_MODE (test_reg, v->mode);
4407 add_cost = iv_add_mult_cost (bl->biv->add_val, v->mult_val,
4408 test_reg, test_reg);
4410 /* Reduce benefit if not replaceable, since we will insert
4411 a move-insn to replace the insn that calculates this giv.
4412 Don't do this unless the giv is a user variable, since it
4413 will often be marked non-replaceable because of the duplication
4414 of the exit code outside the loop. In such a case, the copies
4415 we insert are dead and will be deleted. So they don't have
4416 a cost. Similar situations exist. */
4417 /* ??? The new final_[bg]iv_value code does a much better job
4418 of finding replaceable giv's, and hence this code may no longer
4420 if (! v->replaceable && ! bl->eliminable
4421 && REG_USERVAR_P (v->dest_reg))
4422 benefit -= copy_cost;
4424 /* Decrease the benefit to count the add-insns that we will
4425 insert to increment the reduced reg for the giv.
4426 ??? This can overestimate the run-time cost of the additional
4427 insns, e.g. if there are multiple basic blocks that increment
4428 the biv, but only one of these blocks is executed during each
4429 iteration. There is no good way to detect cases like this with
4430 the current structure of the loop optimizer.
4431 This code is more accurate for determining code size than
4432 run-time benefits. */
4433 benefit -= add_cost * bl->biv_count;
4435 /* Decide whether to strength-reduce this giv or to leave the code
4436 unchanged (recompute it from the biv each time it is used).
4437 This decision can be made independently for each giv. */
4440 /* Attempt to guess whether autoincrement will handle some of the
4441 new add insns; if so, increase BENEFIT (undo the subtraction of
4442 add_cost that was done above). */
4443 if (v->giv_type == DEST_ADDR
4444 /* Increasing the benefit is risky, since this is only a guess.
4445 Avoid increasing register pressure in cases where there would
4446 be no other benefit from reducing this giv. */
4448 && GET_CODE (v->mult_val) == CONST_INT)
4450 if (HAVE_POST_INCREMENT
4451 && INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
4452 benefit += add_cost * bl->biv_count;
4453 else if (HAVE_PRE_INCREMENT
4454 && INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
4455 benefit += add_cost * bl->biv_count;
4456 else if (HAVE_POST_DECREMENT
4457 && -INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
4458 benefit += add_cost * bl->biv_count;
4459 else if (HAVE_PRE_DECREMENT
4460 && -INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
4461 benefit += add_cost * bl->biv_count;
4465 /* If an insn is not to be strength reduced, then set its ignore
4466 flag, and clear all_reduced. */
4468 /* A giv that depends on a reversed biv must be reduced if it is
4469 used after the loop exit, otherwise, it would have the wrong
4470 value after the loop exit. To make it simple, just reduce all
4471 of such giv's whether or not we know they are used after the loop
4474 if ( ! flag_reduce_all_givs && v->lifetime * threshold * benefit < insn_count
4477 if (loop_dump_stream)
4478 fprintf (loop_dump_stream,
4479 "giv of insn %d not worth while, %d vs %d.\n",
4481 v->lifetime * threshold * benefit, insn_count);
4487 /* Check that we can increment the reduced giv without a
4488 multiply insn. If not, reject it. */
4490 for (tv = bl->biv; tv; tv = tv->next_iv)
4491 if (tv->mult_val == const1_rtx
4492 && ! product_cheap_p (tv->add_val, v->mult_val))
4494 if (loop_dump_stream)
4495 fprintf (loop_dump_stream,
4496 "giv of insn %d: would need a multiply.\n",
4497 INSN_UID (v->insn));
4505 /* Check for givs whose first use is their definition and whose
4506 last use is the definition of another giv. If so, it is likely
4507 dead and should not be used to derive another giv nor to
4509 for (v = bl->giv; v; v = v->next_iv)
4512 || (v->same && v->same->ignore))
4517 struct induction *v1;
4519 for (v1 = bl->giv; v1; v1 = v1->next_iv)
4520 if (v->last_use == v1->insn)
4523 else if (v->giv_type == DEST_REG
4524 && REGNO_FIRST_UID (REGNO (v->dest_reg)) == INSN_UID (v->insn))
4526 struct induction *v1;
4528 for (v1 = bl->giv; v1; v1 = v1->next_iv)
4529 if (REGNO_LAST_UID (REGNO (v->dest_reg)) == INSN_UID (v1->insn))
4534 /* Now that we know which givs will be reduced, try to rearrange the
4535 combinations to reduce register pressure.
4536 recombine_givs calls find_life_end, which needs reg_iv_type and
4537 reg_iv_info to be valid for all pseudos. We do the necessary
4538 reallocation here since it allows to check if there are still
4539 more bivs to process. */
4540 nregs = max_reg_num ();
4541 if (nregs > reg_iv_type->num_elements)
4543 /* If there are still more bivs to process, allocate some slack
4544 space so that we're not constantly reallocating these arrays. */
4547 /* Reallocate reg_iv_type and reg_iv_info. */
4548 VARRAY_GROW (reg_iv_type, nregs);
4549 VARRAY_GROW (reg_iv_info, nregs);
4551 recombine_givs (loop, bl, flags & LOOP_UNROLL);
4553 /* Reduce each giv that we decided to reduce. */
4555 for (v = bl->giv; v; v = v->next_iv)
4557 struct induction *tv;
4558 if (! v->ignore && v->same == 0)
4560 int auto_inc_opt = 0;
4562 /* If the code for derived givs immediately below has already
4563 allocated a new_reg, we must keep it. */
4565 v->new_reg = gen_reg_rtx (v->mode);
4567 if (v->derived_from)
4569 struct induction *d = v->derived_from;
4571 /* In case d->dest_reg is not replaceable, we have
4572 to replace it in v->insn now. */
4574 d->new_reg = gen_reg_rtx (d->mode);
4576 = replace_rtx (PATTERN (v->insn), d->dest_reg, d->new_reg);
4578 = replace_rtx (PATTERN (v->insn), v->dest_reg, v->new_reg);
4579 /* For each place where the biv is incremented, add an
4580 insn to set the new, reduced reg for the giv.
4581 We used to do this only for biv_count != 1, but
4582 this fails when there is a giv after a single biv
4583 increment, e.g. when the last giv was expressed as
4585 for (tv = bl->biv; tv; tv = tv->next_iv)
4587 /* We always emit reduced giv increments before the
4588 biv increment when bl->biv_count != 1. So by
4589 emitting the add insns for derived givs after the
4590 biv increment, they pick up the updated value of
4592 If the reduced giv is processed with
4593 auto_inc_opt == 1, then it is incremented earlier
4594 than the biv, hence we'll still pick up the right
4596 If it's processed with auto_inc_opt == -1,
4597 that implies that the biv increment is before the
4598 first reduced giv's use. The derived giv's lifetime
4599 is after the reduced giv's lifetime, hence in this
4600 case, the biv increment doesn't matter. */
4601 emit_insn_after (copy_rtx (PATTERN (v->insn)), tv->insn);
4607 /* If the target has auto-increment addressing modes, and
4608 this is an address giv, then try to put the increment
4609 immediately after its use, so that flow can create an
4610 auto-increment addressing mode. */
4611 if (v->giv_type == DEST_ADDR && bl->biv_count == 1
4612 && bl->biv->always_executed && ! bl->biv->maybe_multiple
4613 /* We don't handle reversed biv's because bl->biv->insn
4614 does not have a valid INSN_LUID. */
4616 && v->always_executed && ! v->maybe_multiple
4617 && INSN_UID (v->insn) < max_uid_for_loop)
4619 /* If other giv's have been combined with this one, then
4620 this will work only if all uses of the other giv's occur
4621 before this giv's insn. This is difficult to check.
4623 We simplify this by looking for the common case where
4624 there is one DEST_REG giv, and this giv's insn is the
4625 last use of the dest_reg of that DEST_REG giv. If the
4626 increment occurs after the address giv, then we can
4627 perform the optimization. (Otherwise, the increment
4628 would have to go before other_giv, and we would not be
4629 able to combine it with the address giv to get an
4630 auto-inc address.) */
4631 if (v->combined_with)
4633 struct induction *other_giv = 0;
4635 for (tv = bl->giv; tv; tv = tv->next_iv)
4643 if (! tv && other_giv
4644 && REGNO (other_giv->dest_reg) < max_reg_before_loop
4645 && (REGNO_LAST_UID (REGNO (other_giv->dest_reg))
4646 == INSN_UID (v->insn))
4647 && INSN_LUID (v->insn) < INSN_LUID (bl->biv->insn))
4650 /* Check for case where increment is before the address
4651 giv. Do this test in "loop order". */
4652 else if ((INSN_LUID (v->insn) > INSN_LUID (bl->biv->insn)
4653 && (INSN_LUID (v->insn) < INSN_LUID (loop_scan_start)
4654 || (INSN_LUID (bl->biv->insn)
4655 > INSN_LUID (loop_scan_start))))
4656 || (INSN_LUID (v->insn) < INSN_LUID (loop_scan_start)
4657 && (INSN_LUID (loop_scan_start)
4658 < INSN_LUID (bl->biv->insn))))
4667 /* We can't put an insn immediately after one setting
4668 cc0, or immediately before one using cc0. */
4669 if ((auto_inc_opt == 1 && sets_cc0_p (PATTERN (v->insn)))
4670 || (auto_inc_opt == -1
4671 && (prev = prev_nonnote_insn (v->insn)) != 0
4673 && sets_cc0_p (PATTERN (prev))))
4679 v->auto_inc_opt = 1;
4683 /* For each place where the biv is incremented, add an insn
4684 to increment the new, reduced reg for the giv. */
4685 for (tv = bl->biv; tv; tv = tv->next_iv)
4690 insert_before = tv->insn;
4691 else if (auto_inc_opt == 1)
4692 insert_before = NEXT_INSN (v->insn);
4694 insert_before = v->insn;
4696 if (tv->mult_val == const1_rtx)
4697 emit_iv_add_mult (tv->add_val, v->mult_val,
4698 v->new_reg, v->new_reg, insert_before);
4699 else /* tv->mult_val == const0_rtx */
4700 /* A multiply is acceptable here
4701 since this is presumed to be seldom executed. */
4702 emit_iv_add_mult (tv->add_val, v->mult_val,
4703 v->add_val, v->new_reg, insert_before);
4706 /* Add code at loop start to initialize giv's reduced reg. */
4708 emit_iv_add_mult (extend_value_for_giv (v, bl->initial_value),
4709 v->mult_val, v->add_val, v->new_reg,
4714 /* Rescan all givs. If a giv is the same as a giv not reduced, mark it
4717 For each giv register that can be reduced now: if replaceable,
4718 substitute reduced reg wherever the old giv occurs;
4719 else add new move insn "giv_reg = reduced_reg". */
4721 for (v = bl->giv; v; v = v->next_iv)
4723 if (v->same && v->same->ignore)
4729 /* Update expression if this was combined, in case other giv was
4732 v->new_reg = replace_rtx (v->new_reg,
4733 v->same->dest_reg, v->same->new_reg);
4735 if (v->giv_type == DEST_ADDR)
4736 /* Store reduced reg as the address in the memref where we found
4738 validate_change (v->insn, v->location, v->new_reg, 0);
4739 else if (v->replaceable)
4741 reg_map[REGNO (v->dest_reg)] = v->new_reg;
4744 /* I can no longer duplicate the original problem. Perhaps
4745 this is unnecessary now? */
4747 /* Replaceable; it isn't strictly necessary to delete the old
4748 insn and emit a new one, because v->dest_reg is now dead.
4750 However, especially when unrolling loops, the special
4751 handling for (set REG0 REG1) in the second cse pass may
4752 make v->dest_reg live again. To avoid this problem, emit
4753 an insn to set the original giv reg from the reduced giv.
4754 We can not delete the original insn, since it may be part
4755 of a LIBCALL, and the code in flow that eliminates dead
4756 libcalls will fail if it is deleted. */
4757 emit_insn_after (gen_move_insn (v->dest_reg, v->new_reg),
4763 /* Not replaceable; emit an insn to set the original giv reg from
4764 the reduced giv, same as above. */
4765 emit_insn_after (gen_move_insn (v->dest_reg, v->new_reg),
4769 /* When a loop is reversed, givs which depend on the reversed
4770 biv, and which are live outside the loop, must be set to their
4771 correct final value. This insn is only needed if the giv is
4772 not replaceable. The correct final value is the same as the
4773 value that the giv starts the reversed loop with. */
4774 if (bl->reversed && ! v->replaceable)
4775 emit_iv_add_mult (extend_value_for_giv (v, bl->initial_value),
4776 v->mult_val, v->add_val, v->dest_reg,
4778 else if (v->final_value)
4782 /* If the loop has multiple exits, emit the insn before the
4783 loop to ensure that it will always be executed no matter
4784 how the loop exits. Otherwise, emit the insn after the loop,
4785 since this is slightly more efficient. */
4786 if (loop->exit_count)
4787 insert_before = loop_start;
4789 insert_before = end_insert_before;
4790 emit_insn_before (gen_move_insn (v->dest_reg, v->final_value),
4794 /* If the insn to set the final value of the giv was emitted
4795 before the loop, then we must delete the insn inside the loop
4796 that sets it. If this is a LIBCALL, then we must delete
4797 every insn in the libcall. Note, however, that
4798 final_giv_value will only succeed when there are multiple
4799 exits if the giv is dead at each exit, hence it does not
4800 matter that the original insn remains because it is dead
4802 /* Delete the insn inside the loop that sets the giv since
4803 the giv is now set before (or after) the loop. */
4804 delete_insn (v->insn);
4808 if (loop_dump_stream)
4810 fprintf (loop_dump_stream, "giv at %d reduced to ",
4811 INSN_UID (v->insn));
4812 print_rtl (loop_dump_stream, v->new_reg);
4813 fprintf (loop_dump_stream, "\n");
4817 /* All the givs based on the biv bl have been reduced if they
4820 /* For each giv not marked as maybe dead that has been combined with a
4821 second giv, clear any "maybe dead" mark on that second giv.
4822 v->new_reg will either be or refer to the register of the giv it
4825 Doing this clearing avoids problems in biv elimination where a
4826 giv's new_reg is a complex value that can't be put in the insn but
4827 the giv combined with (with a reg as new_reg) is marked maybe_dead.
4828 Since the register will be used in either case, we'd prefer it be
4829 used from the simpler giv. */
4831 for (v = bl->giv; v; v = v->next_iv)
4832 if (! v->maybe_dead && v->same)
4833 v->same->maybe_dead = 0;
4835 /* Try to eliminate the biv, if it is a candidate.
4836 This won't work if ! all_reduced,
4837 since the givs we planned to use might not have been reduced.
4839 We have to be careful that we didn't initially think we could eliminate
4840 this biv because of a giv that we now think may be dead and shouldn't
4841 be used as a biv replacement.
4843 Also, there is the possibility that we may have a giv that looks
4844 like it can be used to eliminate a biv, but the resulting insn
4845 isn't valid. This can happen, for example, on the 88k, where a
4846 JUMP_INSN can compare a register only with zero. Attempts to
4847 replace it with a compare with a constant will fail.
4849 Note that in cases where this call fails, we may have replaced some
4850 of the occurrences of the biv with a giv, but no harm was done in
4851 doing so in the rare cases where it can occur. */
4853 if (all_reduced == 1 && bl->eliminable
4854 && maybe_eliminate_biv (loop, bl, 1, threshold, insn_count))
4856 /* ?? If we created a new test to bypass the loop entirely,
4857 or otherwise drop straight in, based on this test, then
4858 we might want to rewrite it also. This way some later
4859 pass has more hope of removing the initialization of this
4862 /* If final_value != 0, then the biv may be used after loop end
4863 and we must emit an insn to set it just in case.
4865 Reversed bivs already have an insn after the loop setting their
4866 value, so we don't need another one. We can't calculate the
4867 proper final value for such a biv here anyways. */
4868 if (final_value != 0 && ! bl->reversed)
4872 /* If the loop has multiple exits, emit the insn before the
4873 loop to ensure that it will always be executed no matter
4874 how the loop exits. Otherwise, emit the insn after the
4875 loop, since this is slightly more efficient. */
4876 if (loop->exit_count)
4877 insert_before = loop_start;
4879 insert_before = end_insert_before;
4881 emit_insn_before (gen_move_insn (bl->biv->dest_reg, final_value),
4886 /* Delete all of the instructions inside the loop which set
4887 the biv, as they are all dead. If is safe to delete them,
4888 because an insn setting a biv will never be part of a libcall. */
4889 /* However, deleting them will invalidate the regno_last_uid info,
4890 so keeping them around is more convenient. Final_biv_value
4891 will only succeed when there are multiple exits if the biv
4892 is dead at each exit, hence it does not matter that the original
4893 insn remains, because it is dead anyways. */
4894 for (v = bl->biv; v; v = v->next_iv)
4895 delete_insn (v->insn);
4898 if (loop_dump_stream)
4899 fprintf (loop_dump_stream, "Reg %d: biv eliminated\n",
4904 /* Go through all the instructions in the loop, making all the
4905 register substitutions scheduled in REG_MAP. */
4907 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
4908 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
4909 || GET_CODE (p) == CALL_INSN)
4911 replace_regs (PATTERN (p), reg_map, reg_map_size, 0);
4912 replace_regs (REG_NOTES (p), reg_map, reg_map_size, 0);
4916 if (loop_info->n_iterations > 0)
4918 /* When we completely unroll a loop we will likely not need the increment
4919 of the loop BIV and we will not need the conditional branch at the
4921 unrolled_insn_copies = insn_count - 2;
4924 /* When we completely unroll a loop on a HAVE_cc0 machine we will not
4925 need the comparison before the conditional branch at the end of the
4927 unrolled_insn_copies -= 1;
4930 /* We'll need one copy for each loop iteration. */
4931 unrolled_insn_copies *= loop_info->n_iterations;
4933 /* A little slop to account for the ability to remove initialization
4934 code, better CSE, and other secondary benefits of completely
4935 unrolling some loops. */
4936 unrolled_insn_copies -= 1;
4938 /* Clamp the value. */
4939 if (unrolled_insn_copies < 0)
4940 unrolled_insn_copies = 0;
4943 /* Unroll loops from within strength reduction so that we can use the
4944 induction variable information that strength_reduce has already
4945 collected. Always unroll loops that would be as small or smaller
4946 unrolled than when rolled. */
4947 if ((flags & LOOP_UNROLL)
4948 || (loop_info->n_iterations > 0
4949 && unrolled_insn_copies <= insn_count))
4950 unroll_loop (loop, insn_count, end_insert_before, 1);
4952 #ifdef HAVE_doloop_end
4953 if (HAVE_doloop_end && (flags & LOOP_BCT) && flag_branch_on_count_reg)
4954 doloop_optimize (loop);
4955 #endif /* HAVE_doloop_end */
4957 if (loop_dump_stream)
4958 fprintf (loop_dump_stream, "\n");
4961 VARRAY_FREE (reg_iv_type);
4962 VARRAY_FREE (reg_iv_info);
4963 free (reg_biv_class);
4968 /*Record all basic induction variables calculated in the insn. */
4970 check_insn_for_bivs (loop, p, not_every_iteration, maybe_multiple)
4973 int not_every_iteration;
4982 if (GET_CODE (p) == INSN
4983 && (set = single_set (p))
4984 && GET_CODE (SET_DEST (set)) == REG)
4986 dest_reg = SET_DEST (set);
4987 if (REGNO (dest_reg) < max_reg_before_loop
4988 && REGNO (dest_reg) >= FIRST_PSEUDO_REGISTER
4989 && REG_IV_TYPE (REGNO (dest_reg)) != NOT_BASIC_INDUCT)
4991 if (basic_induction_var (loop, SET_SRC (set),
4992 GET_MODE (SET_SRC (set)),
4993 dest_reg, p, &inc_val, &mult_val,
4996 /* It is a possible basic induction variable.
4997 Create and initialize an induction structure for it. */
5000 = (struct induction *) oballoc (sizeof (struct induction));
5002 record_biv (v, p, dest_reg, inc_val, mult_val, location,
5003 not_every_iteration, maybe_multiple);
5004 REG_IV_TYPE (REGNO (dest_reg)) = BASIC_INDUCT;
5006 else if (REGNO (dest_reg) < max_reg_before_loop)
5007 REG_IV_TYPE (REGNO (dest_reg)) = NOT_BASIC_INDUCT;
5013 /* Record all givs calculated in the insn.
5014 A register is a giv if: it is only set once, it is a function of a
5015 biv and a constant (or invariant), and it is not a biv. */
5017 check_insn_for_givs (loop, p, not_every_iteration, maybe_multiple)
5020 int not_every_iteration;
5023 struct loop_regs *regs = LOOP_REGS (loop);
5025 /* Look for a general induction variable in a register. */
5026 if (GET_CODE (p) == INSN
5027 && (set = single_set (p))
5028 && GET_CODE (SET_DEST (set)) == REG
5029 && ! VARRAY_CHAR (regs->may_not_optimize, REGNO (SET_DEST (set))))
5038 rtx last_consec_insn;
5040 dest_reg = SET_DEST (set);
5041 if (REGNO (dest_reg) < FIRST_PSEUDO_REGISTER)
5044 if (/* SET_SRC is a giv. */
5045 (general_induction_var (loop, SET_SRC (set), &src_reg, &add_val,
5046 &mult_val, &ext_val, 0, &benefit, VOIDmode)
5047 /* Equivalent expression is a giv. */
5048 || ((regnote = find_reg_note (p, REG_EQUAL, NULL_RTX))
5049 && general_induction_var (loop, XEXP (regnote, 0), &src_reg,
5050 &add_val, &mult_val, &ext_val, 0,
5051 &benefit, VOIDmode)))
5052 /* Don't try to handle any regs made by loop optimization.
5053 We have nothing on them in regno_first_uid, etc. */
5054 && REGNO (dest_reg) < max_reg_before_loop
5055 /* Don't recognize a BASIC_INDUCT_VAR here. */
5056 && dest_reg != src_reg
5057 /* This must be the only place where the register is set. */
5058 && (VARRAY_INT (regs->n_times_set, REGNO (dest_reg)) == 1
5059 /* or all sets must be consecutive and make a giv. */
5060 || (benefit = consec_sets_giv (loop, benefit, p,
5062 &add_val, &mult_val, &ext_val,
5063 &last_consec_insn))))
5066 = (struct induction *) oballoc (sizeof (struct induction));
5068 /* If this is a library call, increase benefit. */
5069 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
5070 benefit += libcall_benefit (p);
5072 /* Skip the consecutive insns, if there are any. */
5073 if (VARRAY_INT (regs->n_times_set, REGNO (dest_reg)) != 1)
5074 p = last_consec_insn;
5076 record_giv (loop, v, p, src_reg, dest_reg, mult_val, add_val,
5077 ext_val, benefit, DEST_REG, not_every_iteration,
5078 maybe_multiple, NULL_PTR);
5083 #ifndef DONT_REDUCE_ADDR
5084 /* Look for givs which are memory addresses. */
5085 /* This resulted in worse code on a VAX 8600. I wonder if it
5087 if (GET_CODE (p) == INSN)
5088 find_mem_givs (loop, PATTERN (p), p, not_every_iteration,
5092 /* Update the status of whether giv can derive other givs. This can
5093 change when we pass a label or an insn that updates a biv. */
5094 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
5095 || GET_CODE (p) == CODE_LABEL)
5096 update_giv_derive (loop, p);
5100 /* Return 1 if X is a valid source for an initial value (or as value being
5101 compared against in an initial test).
5103 X must be either a register or constant and must not be clobbered between
5104 the current insn and the start of the loop.
5106 INSN is the insn containing X. */
5109 valid_initial_value_p (x, insn, call_seen, loop_start)
5118 /* Only consider pseudos we know about initialized in insns whose luids
5120 if (GET_CODE (x) != REG
5121 || REGNO (x) >= max_reg_before_loop)
5124 /* Don't use call-clobbered registers across a call which clobbers it. On
5125 some machines, don't use any hard registers at all. */
5126 if (REGNO (x) < FIRST_PSEUDO_REGISTER
5127 && (SMALL_REGISTER_CLASSES
5128 || (call_used_regs[REGNO (x)] && call_seen)))
5131 /* Don't use registers that have been clobbered before the start of the
5133 if (reg_set_between_p (x, insn, loop_start))
5139 /* Scan X for memory refs and check each memory address
5140 as a possible giv. INSN is the insn whose pattern X comes from.
5141 NOT_EVERY_ITERATION is 1 if the insn might not be executed during
5142 every loop iteration. MAYBE_MULTIPLE is 1 if the insn might be executed
5143 more thanonce in each loop iteration. */
5146 find_mem_givs (loop, x, insn, not_every_iteration, maybe_multiple)
5147 const struct loop *loop;
5150 int not_every_iteration, maybe_multiple;
5153 register enum rtx_code code;
5154 register const char *fmt;
5159 code = GET_CODE (x);
5184 /* This code used to disable creating GIVs with mult_val == 1 and
5185 add_val == 0. However, this leads to lost optimizations when
5186 it comes time to combine a set of related DEST_ADDR GIVs, since
5187 this one would not be seen. */
5189 if (general_induction_var (loop, XEXP (x, 0), &src_reg, &add_val,
5190 &mult_val, &ext_val, 1, &benefit,
5193 /* Found one; record it. */
5195 = (struct induction *) oballoc (sizeof (struct induction));
5197 record_giv (loop, v, insn, src_reg, addr_placeholder, mult_val,
5198 add_val, ext_val, benefit, DEST_ADDR,
5199 not_every_iteration, maybe_multiple, &XEXP (x, 0));
5201 v->mem_mode = GET_MODE (x);
5210 /* Recursively scan the subexpressions for other mem refs. */
5212 fmt = GET_RTX_FORMAT (code);
5213 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5215 find_mem_givs (loop, XEXP (x, i), insn, not_every_iteration,
5217 else if (fmt[i] == 'E')
5218 for (j = 0; j < XVECLEN (x, i); j++)
5219 find_mem_givs (loop, XVECEXP (x, i, j), insn, not_every_iteration,
5223 /* Fill in the data about one biv update.
5224 V is the `struct induction' in which we record the biv. (It is
5225 allocated by the caller, with alloca.)
5226 INSN is the insn that sets it.
5227 DEST_REG is the biv's reg.
5229 MULT_VAL is const1_rtx if the biv is being incremented here, in which case
5230 INC_VAL is the increment. Otherwise, MULT_VAL is const0_rtx and the biv is
5231 being set to INC_VAL.
5233 NOT_EVERY_ITERATION is nonzero if this biv update is not know to be
5234 executed every iteration; MAYBE_MULTIPLE is nonzero if this biv update
5235 can be executed more than once per iteration. If MAYBE_MULTIPLE
5236 and NOT_EVERY_ITERATION are both zero, we know that the biv update is
5237 executed exactly once per iteration. */
5240 record_biv (v, insn, dest_reg, inc_val, mult_val, location,
5241 not_every_iteration, maybe_multiple)
5242 struct induction *v;
5248 int not_every_iteration;
5251 struct iv_class *bl;
5254 v->src_reg = dest_reg;
5255 v->dest_reg = dest_reg;
5256 v->mult_val = mult_val;
5257 v->add_val = inc_val;
5258 v->ext_dependant = NULL_RTX;
5259 v->location = location;
5260 v->mode = GET_MODE (dest_reg);
5261 v->always_computable = ! not_every_iteration;
5262 v->always_executed = ! not_every_iteration;
5263 v->maybe_multiple = maybe_multiple;
5265 /* Add this to the reg's iv_class, creating a class
5266 if this is the first incrementation of the reg. */
5268 bl = reg_biv_class[REGNO (dest_reg)];
5271 /* Create and initialize new iv_class. */
5273 bl = (struct iv_class *) oballoc (sizeof (struct iv_class));
5275 bl->regno = REGNO (dest_reg);
5281 /* Set initial value to the reg itself. */
5282 bl->initial_value = dest_reg;
5283 /* We haven't seen the initializing insn yet */
5286 bl->initial_test = 0;
5287 bl->incremented = 0;
5291 bl->total_benefit = 0;
5293 /* Add this class to loop_iv_list. */
5294 bl->next = loop_iv_list;
5297 /* Put it in the array of biv register classes. */
5298 reg_biv_class[REGNO (dest_reg)] = bl;
5301 /* Update IV_CLASS entry for this biv. */
5302 v->next_iv = bl->biv;
5305 if (mult_val == const1_rtx)
5306 bl->incremented = 1;
5308 if (loop_dump_stream)
5310 fprintf (loop_dump_stream,
5311 "Insn %d: possible biv, reg %d,",
5312 INSN_UID (insn), REGNO (dest_reg));
5313 if (GET_CODE (inc_val) == CONST_INT)
5315 fprintf (loop_dump_stream, " const =");
5316 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, INTVAL (inc_val));
5317 fputc ('\n', loop_dump_stream);
5321 fprintf (loop_dump_stream, " const = ");
5322 print_rtl (loop_dump_stream, inc_val);
5323 fprintf (loop_dump_stream, "\n");
5328 /* Fill in the data about one giv.
5329 V is the `struct induction' in which we record the giv. (It is
5330 allocated by the caller, with alloca.)
5331 INSN is the insn that sets it.
5332 BENEFIT estimates the savings from deleting this insn.
5333 TYPE is DEST_REG or DEST_ADDR; it says whether the giv is computed
5334 into a register or is used as a memory address.
5336 SRC_REG is the biv reg which the giv is computed from.
5337 DEST_REG is the giv's reg (if the giv is stored in a reg).
5338 MULT_VAL and ADD_VAL are the coefficients used to compute the giv.
5339 LOCATION points to the place where this giv's value appears in INSN. */
5342 record_giv (loop, v, insn, src_reg, dest_reg, mult_val, add_val, ext_val,
5343 benefit, type, not_every_iteration, maybe_multiple, location)
5344 const struct loop *loop;
5345 struct induction *v;
5349 rtx mult_val, add_val, ext_val;
5352 int not_every_iteration, maybe_multiple;
5355 struct induction *b;
5356 struct iv_class *bl;
5357 rtx set = single_set (insn);
5360 /* Attempt to prove constantness of the values. */
5361 temp = simplify_rtx (add_val);
5366 v->src_reg = src_reg;
5368 v->dest_reg = dest_reg;
5369 v->mult_val = mult_val;
5370 v->add_val = add_val;
5371 v->ext_dependant = ext_val;
5372 v->benefit = benefit;
5373 v->location = location;
5375 v->combined_with = 0;
5376 v->maybe_multiple = maybe_multiple;
5378 v->derive_adjustment = 0;
5384 v->auto_inc_opt = 0;
5387 v->derived_from = 0;
5390 /* The v->always_computable field is used in update_giv_derive, to
5391 determine whether a giv can be used to derive another giv. For a
5392 DEST_REG giv, INSN computes a new value for the giv, so its value
5393 isn't computable if INSN insn't executed every iteration.
5394 However, for a DEST_ADDR giv, INSN merely uses the value of the giv;
5395 it does not compute a new value. Hence the value is always computable
5396 regardless of whether INSN is executed each iteration. */
5398 if (type == DEST_ADDR)
5399 v->always_computable = 1;
5401 v->always_computable = ! not_every_iteration;
5403 v->always_executed = ! not_every_iteration;
5405 if (type == DEST_ADDR)
5407 v->mode = GET_MODE (*location);
5410 else /* type == DEST_REG */
5412 v->mode = GET_MODE (SET_DEST (set));
5414 v->lifetime = (uid_luid[REGNO_LAST_UID (REGNO (dest_reg))]
5415 - uid_luid[REGNO_FIRST_UID (REGNO (dest_reg))]);
5417 /* If the lifetime is zero, it means that this register is
5418 really a dead store. So mark this as a giv that can be
5419 ignored. This will not prevent the biv from being eliminated. */
5420 if (v->lifetime == 0)
5423 REG_IV_TYPE (REGNO (dest_reg)) = GENERAL_INDUCT;
5424 REG_IV_INFO (REGNO (dest_reg)) = v;
5427 /* Add the giv to the class of givs computed from one biv. */
5429 bl = reg_biv_class[REGNO (src_reg)];
5432 v->next_iv = bl->giv;
5434 /* Don't count DEST_ADDR. This is supposed to count the number of
5435 insns that calculate givs. */
5436 if (type == DEST_REG)
5438 bl->total_benefit += benefit;
5441 /* Fatal error, biv missing for this giv? */
5444 if (type == DEST_ADDR)
5448 /* The giv can be replaced outright by the reduced register only if all
5449 of the following conditions are true:
5450 - the insn that sets the giv is always executed on any iteration
5451 on which the giv is used at all
5452 (there are two ways to deduce this:
5453 either the insn is executed on every iteration,
5454 or all uses follow that insn in the same basic block),
5455 - the giv is not used outside the loop
5456 - no assignments to the biv occur during the giv's lifetime. */
5458 if (REGNO_FIRST_UID (REGNO (dest_reg)) == INSN_UID (insn)
5459 /* Previous line always fails if INSN was moved by loop opt. */
5460 && uid_luid[REGNO_LAST_UID (REGNO (dest_reg))]
5461 < INSN_LUID (loop->end)
5462 && (! not_every_iteration
5463 || last_use_this_basic_block (dest_reg, insn)))
5465 /* Now check that there are no assignments to the biv within the
5466 giv's lifetime. This requires two separate checks. */
5468 /* Check each biv update, and fail if any are between the first
5469 and last use of the giv.
5471 If this loop contains an inner loop that was unrolled, then
5472 the insn modifying the biv may have been emitted by the loop
5473 unrolling code, and hence does not have a valid luid. Just
5474 mark the biv as not replaceable in this case. It is not very
5475 useful as a biv, because it is used in two different loops.
5476 It is very unlikely that we would be able to optimize the giv
5477 using this biv anyways. */
5480 for (b = bl->biv; b; b = b->next_iv)
5482 if (INSN_UID (b->insn) >= max_uid_for_loop
5483 || ((uid_luid[INSN_UID (b->insn)]
5484 >= uid_luid[REGNO_FIRST_UID (REGNO (dest_reg))])
5485 && (uid_luid[INSN_UID (b->insn)]
5486 <= uid_luid[REGNO_LAST_UID (REGNO (dest_reg))])))
5489 v->not_replaceable = 1;
5494 /* If there are any backwards branches that go from after the
5495 biv update to before it, then this giv is not replaceable. */
5497 for (b = bl->biv; b; b = b->next_iv)
5498 if (back_branch_in_range_p (loop, b->insn))
5501 v->not_replaceable = 1;
5507 /* May still be replaceable, we don't have enough info here to
5510 v->not_replaceable = 0;
5514 /* Record whether the add_val contains a const_int, for later use by
5519 v->no_const_addval = 1;
5520 if (tem == const0_rtx)
5522 else if (CONSTANT_P (add_val))
5523 v->no_const_addval = 0;
5524 if (GET_CODE (tem) == PLUS)
5528 if (GET_CODE (XEXP (tem, 0)) == PLUS)
5529 tem = XEXP (tem, 0);
5530 else if (GET_CODE (XEXP (tem, 1)) == PLUS)
5531 tem = XEXP (tem, 1);
5535 if (CONSTANT_P (XEXP (tem, 1)))
5536 v->no_const_addval = 0;
5540 if (loop_dump_stream)
5542 if (type == DEST_REG)
5543 fprintf (loop_dump_stream, "Insn %d: giv reg %d",
5544 INSN_UID (insn), REGNO (dest_reg));
5546 fprintf (loop_dump_stream, "Insn %d: dest address",
5549 fprintf (loop_dump_stream, " src reg %d benefit %d",
5550 REGNO (src_reg), v->benefit);
5551 fprintf (loop_dump_stream, " lifetime %d",
5555 fprintf (loop_dump_stream, " replaceable");
5557 if (v->no_const_addval)
5558 fprintf (loop_dump_stream, " ncav");
5560 if (v->ext_dependant)
5562 switch (GET_CODE (v->ext_dependant))
5565 fprintf (loop_dump_stream, " ext se");
5568 fprintf (loop_dump_stream, " ext ze");
5571 fprintf (loop_dump_stream, " ext tr");
5578 if (GET_CODE (mult_val) == CONST_INT)
5580 fprintf (loop_dump_stream, " mult ");
5581 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, INTVAL (mult_val));
5585 fprintf (loop_dump_stream, " mult ");
5586 print_rtl (loop_dump_stream, mult_val);
5589 if (GET_CODE (add_val) == CONST_INT)
5591 fprintf (loop_dump_stream, " add ");
5592 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, INTVAL (add_val));
5596 fprintf (loop_dump_stream, " add ");
5597 print_rtl (loop_dump_stream, add_val);
5601 if (loop_dump_stream)
5602 fprintf (loop_dump_stream, "\n");
5606 /* All this does is determine whether a giv can be made replaceable because
5607 its final value can be calculated. This code can not be part of record_giv
5608 above, because final_giv_value requires that the number of loop iterations
5609 be known, and that can not be accurately calculated until after all givs
5610 have been identified. */
5613 check_final_value (loop, v)
5614 const struct loop *loop;
5615 struct induction *v;
5617 struct iv_class *bl;
5618 rtx final_value = 0;
5620 bl = reg_biv_class[REGNO (v->src_reg)];
5622 /* DEST_ADDR givs will never reach here, because they are always marked
5623 replaceable above in record_giv. */
5625 /* The giv can be replaced outright by the reduced register only if all
5626 of the following conditions are true:
5627 - the insn that sets the giv is always executed on any iteration
5628 on which the giv is used at all
5629 (there are two ways to deduce this:
5630 either the insn is executed on every iteration,
5631 or all uses follow that insn in the same basic block),
5632 - its final value can be calculated (this condition is different
5633 than the one above in record_giv)
5634 - no assignments to the biv occur during the giv's lifetime. */
5637 /* This is only called now when replaceable is known to be false. */
5638 /* Clear replaceable, so that it won't confuse final_giv_value. */
5642 if ((final_value = final_giv_value (loop, v))
5643 && (v->always_computable || last_use_this_basic_block (v->dest_reg, v->insn)))
5645 int biv_increment_seen = 0;
5651 /* When trying to determine whether or not a biv increment occurs
5652 during the lifetime of the giv, we can ignore uses of the variable
5653 outside the loop because final_value is true. Hence we can not
5654 use regno_last_uid and regno_first_uid as above in record_giv. */
5656 /* Search the loop to determine whether any assignments to the
5657 biv occur during the giv's lifetime. Start with the insn
5658 that sets the giv, and search around the loop until we come
5659 back to that insn again.
5661 Also fail if there is a jump within the giv's lifetime that jumps
5662 to somewhere outside the lifetime but still within the loop. This
5663 catches spaghetti code where the execution order is not linear, and
5664 hence the above test fails. Here we assume that the giv lifetime
5665 does not extend from one iteration of the loop to the next, so as
5666 to make the test easier. Since the lifetime isn't known yet,
5667 this requires two loops. See also record_giv above. */
5669 last_giv_use = v->insn;
5675 p = NEXT_INSN (loop->start);
5679 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
5680 || GET_CODE (p) == CALL_INSN)
5682 /* It is possible for the BIV increment to use the GIV if we
5683 have a cycle. Thus we must be sure to check each insn for
5684 both BIV and GIV uses, and we must check for BIV uses
5687 if (! biv_increment_seen
5688 && reg_set_p (v->src_reg, PATTERN (p)))
5689 biv_increment_seen = 1;
5691 if (reg_mentioned_p (v->dest_reg, PATTERN (p)))
5693 if (biv_increment_seen)
5696 v->not_replaceable = 1;
5704 /* Now that the lifetime of the giv is known, check for branches
5705 from within the lifetime to outside the lifetime if it is still
5715 p = NEXT_INSN (loop->start);
5716 if (p == last_giv_use)
5719 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p)
5720 && LABEL_NAME (JUMP_LABEL (p))
5721 && ((loop_insn_first_p (JUMP_LABEL (p), v->insn)
5722 && loop_insn_first_p (loop->start, JUMP_LABEL (p)))
5723 || (loop_insn_first_p (last_giv_use, JUMP_LABEL (p))
5724 && loop_insn_first_p (JUMP_LABEL (p), loop->end))))
5727 v->not_replaceable = 1;
5729 if (loop_dump_stream)
5730 fprintf (loop_dump_stream,
5731 "Found branch outside giv lifetime.\n");
5738 /* If it is replaceable, then save the final value. */
5740 v->final_value = final_value;
5743 if (loop_dump_stream && v->replaceable)
5744 fprintf (loop_dump_stream, "Insn %d: giv reg %d final_value replaceable\n",
5745 INSN_UID (v->insn), REGNO (v->dest_reg));
5748 /* Update the status of whether a giv can derive other givs.
5750 We need to do something special if there is or may be an update to the biv
5751 between the time the giv is defined and the time it is used to derive
5754 In addition, a giv that is only conditionally set is not allowed to
5755 derive another giv once a label has been passed.
5757 The cases we look at are when a label or an update to a biv is passed. */
5760 update_giv_derive (loop, p)
5761 const struct loop *loop;
5764 struct iv_class *bl;
5765 struct induction *biv, *giv;
5769 /* Search all IV classes, then all bivs, and finally all givs.
5771 There are three cases we are concerned with. First we have the situation
5772 of a giv that is only updated conditionally. In that case, it may not
5773 derive any givs after a label is passed.
5775 The second case is when a biv update occurs, or may occur, after the
5776 definition of a giv. For certain biv updates (see below) that are
5777 known to occur between the giv definition and use, we can adjust the
5778 giv definition. For others, or when the biv update is conditional,
5779 we must prevent the giv from deriving any other givs. There are two
5780 sub-cases within this case.
5782 If this is a label, we are concerned with any biv update that is done
5783 conditionally, since it may be done after the giv is defined followed by
5784 a branch here (actually, we need to pass both a jump and a label, but
5785 this extra tracking doesn't seem worth it).
5787 If this is a jump, we are concerned about any biv update that may be
5788 executed multiple times. We are actually only concerned about
5789 backward jumps, but it is probably not worth performing the test
5790 on the jump again here.
5792 If this is a biv update, we must adjust the giv status to show that a
5793 subsequent biv update was performed. If this adjustment cannot be done,
5794 the giv cannot derive further givs. */
5796 for (bl = loop_iv_list; bl; bl = bl->next)
5797 for (biv = bl->biv; biv; biv = biv->next_iv)
5798 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN
5801 for (giv = bl->giv; giv; giv = giv->next_iv)
5803 /* If cant_derive is already true, there is no point in
5804 checking all of these conditions again. */
5805 if (giv->cant_derive)
5808 /* If this giv is conditionally set and we have passed a label,
5809 it cannot derive anything. */
5810 if (GET_CODE (p) == CODE_LABEL && ! giv->always_computable)
5811 giv->cant_derive = 1;
5813 /* Skip givs that have mult_val == 0, since
5814 they are really invariants. Also skip those that are
5815 replaceable, since we know their lifetime doesn't contain
5817 else if (giv->mult_val == const0_rtx || giv->replaceable)
5820 /* The only way we can allow this giv to derive another
5821 is if this is a biv increment and we can form the product
5822 of biv->add_val and giv->mult_val. In this case, we will
5823 be able to compute a compensation. */
5824 else if (biv->insn == p)
5829 if (biv->mult_val == const1_rtx)
5830 tem = simplify_giv_expr (loop,
5831 gen_rtx_MULT (giv->mode,
5834 &ext_val_dummy, &dummy);
5836 if (tem && giv->derive_adjustment)
5837 tem = simplify_giv_expr
5839 gen_rtx_PLUS (giv->mode, tem, giv->derive_adjustment),
5840 &ext_val_dummy, &dummy);
5843 giv->derive_adjustment = tem;
5845 giv->cant_derive = 1;
5847 else if ((GET_CODE (p) == CODE_LABEL && ! biv->always_computable)
5848 || (GET_CODE (p) == JUMP_INSN && biv->maybe_multiple))
5849 giv->cant_derive = 1;
5854 /* Check whether an insn is an increment legitimate for a basic induction var.
5855 X is the source of insn P, or a part of it.
5856 MODE is the mode in which X should be interpreted.
5858 DEST_REG is the putative biv, also the destination of the insn.
5859 We accept patterns of these forms:
5860 REG = REG + INVARIANT (includes REG = REG - CONSTANT)
5861 REG = INVARIANT + REG
5863 If X is suitable, we return 1, set *MULT_VAL to CONST1_RTX,
5864 store the additive term into *INC_VAL, and store the place where
5865 we found the additive term into *LOCATION.
5867 If X is an assignment of an invariant into DEST_REG, we set
5868 *MULT_VAL to CONST0_RTX, and store the invariant into *INC_VAL.
5870 We also want to detect a BIV when it corresponds to a variable
5871 whose mode was promoted via PROMOTED_MODE. In that case, an increment
5872 of the variable may be a PLUS that adds a SUBREG of that variable to
5873 an invariant and then sign- or zero-extends the result of the PLUS
5876 Most GIVs in such cases will be in the promoted mode, since that is the
5877 probably the natural computation mode (and almost certainly the mode
5878 used for addresses) on the machine. So we view the pseudo-reg containing
5879 the variable as the BIV, as if it were simply incremented.
5881 Note that treating the entire pseudo as a BIV will result in making
5882 simple increments to any GIVs based on it. However, if the variable
5883 overflows in its declared mode but not its promoted mode, the result will
5884 be incorrect. This is acceptable if the variable is signed, since
5885 overflows in such cases are undefined, but not if it is unsigned, since
5886 those overflows are defined. So we only check for SIGN_EXTEND and
5889 If we cannot find a biv, we return 0. */
5892 basic_induction_var (loop, x, mode, dest_reg, p, inc_val, mult_val, location)
5893 const struct loop *loop;
5895 enum machine_mode mode;
5902 register enum rtx_code code;
5906 code = GET_CODE (x);
5911 if (rtx_equal_p (XEXP (x, 0), dest_reg)
5912 || (GET_CODE (XEXP (x, 0)) == SUBREG
5913 && SUBREG_PROMOTED_VAR_P (XEXP (x, 0))
5914 && SUBREG_REG (XEXP (x, 0)) == dest_reg))
5916 argp = &XEXP (x, 1);
5918 else if (rtx_equal_p (XEXP (x, 1), dest_reg)
5919 || (GET_CODE (XEXP (x, 1)) == SUBREG
5920 && SUBREG_PROMOTED_VAR_P (XEXP (x, 1))
5921 && SUBREG_REG (XEXP (x, 1)) == dest_reg))
5923 argp = &XEXP (x, 0);
5929 if (loop_invariant_p (loop, arg) != 1)
5932 *inc_val = convert_modes (GET_MODE (dest_reg), GET_MODE (x), arg, 0);
5933 *mult_val = const1_rtx;
5938 /* If this is a SUBREG for a promoted variable, check the inner
5940 if (SUBREG_PROMOTED_VAR_P (x))
5941 return basic_induction_var (loop, SUBREG_REG (x),
5942 GET_MODE (SUBREG_REG (x)),
5943 dest_reg, p, inc_val, mult_val, location);
5947 /* If this register is assigned in a previous insn, look at its
5948 source, but don't go outside the loop or past a label. */
5950 /* If this sets a register to itself, we would repeat any previous
5951 biv increment if we applied this strategy blindly. */
5952 if (rtx_equal_p (dest_reg, x))
5960 insn = PREV_INSN (insn);
5962 while (insn && GET_CODE (insn) == NOTE
5963 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG);
5967 set = single_set (insn);
5971 if ((SET_DEST (set) == x
5972 || (GET_CODE (SET_DEST (set)) == SUBREG
5973 && (GET_MODE_SIZE (GET_MODE (SET_DEST (set)))
5975 && (GET_MODE_CLASS (GET_MODE (SET_DEST (set)))
5977 && SUBREG_REG (SET_DEST (set)) == x))
5978 && basic_induction_var (loop, SET_SRC (set),
5979 (GET_MODE (SET_SRC (set)) == VOIDmode
5981 : GET_MODE (SET_SRC (set))),
5983 inc_val, mult_val, location))
5986 /* ... fall through ... */
5988 /* Can accept constant setting of biv only when inside inner most loop.
5989 Otherwise, a biv of an inner loop may be incorrectly recognized
5990 as a biv of the outer loop,
5991 causing code to be moved INTO the inner loop. */
5993 if (loop_invariant_p (loop, x) != 1)
5998 /* convert_modes aborts if we try to convert to or from CCmode, so just
5999 exclude that case. It is very unlikely that a condition code value
6000 would be a useful iterator anyways. */
6001 if (loop->level == 1
6002 && GET_MODE_CLASS (mode) != MODE_CC
6003 && GET_MODE_CLASS (GET_MODE (dest_reg)) != MODE_CC)
6005 /* Possible bug here? Perhaps we don't know the mode of X. */
6006 *inc_val = convert_modes (GET_MODE (dest_reg), mode, x, 0);
6007 *mult_val = const0_rtx;
6014 return basic_induction_var (loop, XEXP (x, 0), GET_MODE (XEXP (x, 0)),
6015 dest_reg, p, inc_val, mult_val, location);
6018 /* Similar, since this can be a sign extension. */
6019 for (insn = PREV_INSN (p);
6020 (insn && GET_CODE (insn) == NOTE
6021 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG);
6022 insn = PREV_INSN (insn))
6026 set = single_set (insn);
6028 if (! rtx_equal_p (dest_reg, XEXP (x, 0))
6029 && set && SET_DEST (set) == XEXP (x, 0)
6030 && GET_CODE (XEXP (x, 1)) == CONST_INT
6031 && INTVAL (XEXP (x, 1)) >= 0
6032 && GET_CODE (SET_SRC (set)) == ASHIFT
6033 && XEXP (x, 1) == XEXP (SET_SRC (set), 1))
6034 return basic_induction_var (loop, XEXP (SET_SRC (set), 0),
6035 GET_MODE (XEXP (x, 0)),
6036 dest_reg, insn, inc_val, mult_val,
6045 /* A general induction variable (giv) is any quantity that is a linear
6046 function of a basic induction variable,
6047 i.e. giv = biv * mult_val + add_val.
6048 The coefficients can be any loop invariant quantity.
6049 A giv need not be computed directly from the biv;
6050 it can be computed by way of other givs. */
6052 /* Determine whether X computes a giv.
6053 If it does, return a nonzero value
6054 which is the benefit from eliminating the computation of X;
6055 set *SRC_REG to the register of the biv that it is computed from;
6056 set *ADD_VAL and *MULT_VAL to the coefficients,
6057 such that the value of X is biv * mult + add; */
6060 general_induction_var (loop, x, src_reg, add_val, mult_val, ext_val,
6061 is_addr, pbenefit, addr_mode)
6062 const struct loop *loop;
6070 enum machine_mode addr_mode;
6075 /* If this is an invariant, forget it, it isn't a giv. */
6076 if (loop_invariant_p (loop, x) == 1)
6079 /* See if the expression could be a giv and get its form.
6080 Mark our place on the obstack in case we don't find a giv. */
6081 storage = (char *) oballoc (0);
6083 *ext_val = NULL_RTX;
6084 x = simplify_giv_expr (loop, x, ext_val, pbenefit);
6091 switch (GET_CODE (x))
6095 /* Since this is now an invariant and wasn't before, it must be a giv
6096 with MULT_VAL == 0. It doesn't matter which BIV we associate this
6098 *src_reg = loop_iv_list->biv->dest_reg;
6099 *mult_val = const0_rtx;
6104 /* This is equivalent to a BIV. */
6106 *mult_val = const1_rtx;
6107 *add_val = const0_rtx;
6111 /* Either (plus (biv) (invar)) or
6112 (plus (mult (biv) (invar_1)) (invar_2)). */
6113 if (GET_CODE (XEXP (x, 0)) == MULT)
6115 *src_reg = XEXP (XEXP (x, 0), 0);
6116 *mult_val = XEXP (XEXP (x, 0), 1);
6120 *src_reg = XEXP (x, 0);
6121 *mult_val = const1_rtx;
6123 *add_val = XEXP (x, 1);
6127 /* ADD_VAL is zero. */
6128 *src_reg = XEXP (x, 0);
6129 *mult_val = XEXP (x, 1);
6130 *add_val = const0_rtx;
6137 /* Remove any enclosing USE from ADD_VAL and MULT_VAL (there will be
6138 unless they are CONST_INT). */
6139 if (GET_CODE (*add_val) == USE)
6140 *add_val = XEXP (*add_val, 0);
6141 if (GET_CODE (*mult_val) == USE)
6142 *mult_val = XEXP (*mult_val, 0);
6145 *pbenefit += address_cost (orig_x, addr_mode) - reg_address_cost;
6147 *pbenefit += rtx_cost (orig_x, SET);
6149 /* Always return true if this is a giv so it will be detected as such,
6150 even if the benefit is zero or negative. This allows elimination
6151 of bivs that might otherwise not be eliminated. */
6155 /* Given an expression, X, try to form it as a linear function of a biv.
6156 We will canonicalize it to be of the form
6157 (plus (mult (BIV) (invar_1))
6159 with possible degeneracies.
6161 The invariant expressions must each be of a form that can be used as a
6162 machine operand. We surround then with a USE rtx (a hack, but localized
6163 and certainly unambiguous!) if not a CONST_INT for simplicity in this
6164 routine; it is the caller's responsibility to strip them.
6166 If no such canonicalization is possible (i.e., two biv's are used or an
6167 expression that is neither invariant nor a biv or giv), this routine
6170 For a non-zero return, the result will have a code of CONST_INT, USE,
6171 REG (for a BIV), PLUS, or MULT. No other codes will occur.
6173 *BENEFIT will be incremented by the benefit of any sub-giv encountered. */
6175 static rtx sge_plus PARAMS ((enum machine_mode, rtx, rtx));
6176 static rtx sge_plus_constant PARAMS ((rtx, rtx));
6177 static int cmp_combine_givs_stats PARAMS ((const PTR, const PTR));
6178 static int cmp_recombine_givs_stats PARAMS ((const PTR, const PTR));
6181 simplify_giv_expr (loop, x, ext_val, benefit)
6182 const struct loop *loop;
6187 struct loop_regs *regs = LOOP_REGS (loop);
6188 enum machine_mode mode = GET_MODE (x);
6192 /* If this is not an integer mode, or if we cannot do arithmetic in this
6193 mode, this can't be a giv. */
6194 if (mode != VOIDmode
6195 && (GET_MODE_CLASS (mode) != MODE_INT
6196 || GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT))
6199 switch (GET_CODE (x))
6202 arg0 = simplify_giv_expr (loop, XEXP (x, 0), ext_val, benefit);
6203 arg1 = simplify_giv_expr (loop, XEXP (x, 1), ext_val, benefit);
6204 if (arg0 == 0 || arg1 == 0)
6207 /* Put constant last, CONST_INT last if both constant. */
6208 if ((GET_CODE (arg0) == USE
6209 || GET_CODE (arg0) == CONST_INT)
6210 && ! ((GET_CODE (arg0) == USE
6211 && GET_CODE (arg1) == USE)
6212 || GET_CODE (arg1) == CONST_INT))
6213 tem = arg0, arg0 = arg1, arg1 = tem;
6215 /* Handle addition of zero, then addition of an invariant. */
6216 if (arg1 == const0_rtx)
6218 else if (GET_CODE (arg1) == CONST_INT || GET_CODE (arg1) == USE)
6219 switch (GET_CODE (arg0))
6223 /* Adding two invariants must result in an invariant, so enclose
6224 addition operation inside a USE and return it. */
6225 if (GET_CODE (arg0) == USE)
6226 arg0 = XEXP (arg0, 0);
6227 if (GET_CODE (arg1) == USE)
6228 arg1 = XEXP (arg1, 0);
6230 if (GET_CODE (arg0) == CONST_INT)
6231 tem = arg0, arg0 = arg1, arg1 = tem;
6232 if (GET_CODE (arg1) == CONST_INT)
6233 tem = sge_plus_constant (arg0, arg1);
6235 tem = sge_plus (mode, arg0, arg1);
6237 if (GET_CODE (tem) != CONST_INT)
6238 tem = gen_rtx_USE (mode, tem);
6243 /* biv + invar or mult + invar. Return sum. */
6244 return gen_rtx_PLUS (mode, arg0, arg1);
6247 /* (a + invar_1) + invar_2. Associate. */
6249 simplify_giv_expr (loop,
6261 /* Each argument must be either REG, PLUS, or MULT. Convert REG to
6262 MULT to reduce cases. */
6263 if (GET_CODE (arg0) == REG)
6264 arg0 = gen_rtx_MULT (mode, arg0, const1_rtx);
6265 if (GET_CODE (arg1) == REG)
6266 arg1 = gen_rtx_MULT (mode, arg1, const1_rtx);
6268 /* Now have PLUS + PLUS, PLUS + MULT, MULT + PLUS, or MULT + MULT.
6269 Put a MULT first, leaving PLUS + PLUS, MULT + PLUS, or MULT + MULT.
6270 Recurse to associate the second PLUS. */
6271 if (GET_CODE (arg1) == MULT)
6272 tem = arg0, arg0 = arg1, arg1 = tem;
6274 if (GET_CODE (arg1) == PLUS)
6276 simplify_giv_expr (loop,
6278 gen_rtx_PLUS (mode, arg0,
6283 /* Now must have MULT + MULT. Distribute if same biv, else not giv. */
6284 if (GET_CODE (arg0) != MULT || GET_CODE (arg1) != MULT)
6287 if (!rtx_equal_p (arg0, arg1))
6290 return simplify_giv_expr (loop,
6299 /* Handle "a - b" as "a + b * (-1)". */
6300 return simplify_giv_expr (loop,
6309 arg0 = simplify_giv_expr (loop, XEXP (x, 0), ext_val, benefit);
6310 arg1 = simplify_giv_expr (loop, XEXP (x, 1), ext_val, benefit);
6311 if (arg0 == 0 || arg1 == 0)
6314 /* Put constant last, CONST_INT last if both constant. */
6315 if ((GET_CODE (arg0) == USE || GET_CODE (arg0) == CONST_INT)
6316 && GET_CODE (arg1) != CONST_INT)
6317 tem = arg0, arg0 = arg1, arg1 = tem;
6319 /* If second argument is not now constant, not giv. */
6320 if (GET_CODE (arg1) != USE && GET_CODE (arg1) != CONST_INT)
6323 /* Handle multiply by 0 or 1. */
6324 if (arg1 == const0_rtx)
6327 else if (arg1 == const1_rtx)
6330 switch (GET_CODE (arg0))
6333 /* biv * invar. Done. */
6334 return gen_rtx_MULT (mode, arg0, arg1);
6337 /* Product of two constants. */
6338 return GEN_INT (INTVAL (arg0) * INTVAL (arg1));
6341 /* invar * invar is a giv, but attempt to simplify it somehow. */
6342 if (GET_CODE (arg1) != CONST_INT)
6345 arg0 = XEXP (arg0, 0);
6346 if (GET_CODE (arg0) == MULT)
6348 /* (invar_0 * invar_1) * invar_2. Associate. */
6349 return simplify_giv_expr (loop,
6358 /* Porpagate the MULT expressions to the intermost nodes. */
6359 else if (GET_CODE (arg0) == PLUS)
6361 /* (invar_0 + invar_1) * invar_2. Distribute. */
6362 return simplify_giv_expr (loop,
6374 return gen_rtx_USE (mode, gen_rtx_MULT (mode, arg0, arg1));
6377 /* (a * invar_1) * invar_2. Associate. */
6378 return simplify_giv_expr (loop,
6387 /* (a + invar_1) * invar_2. Distribute. */
6388 return simplify_giv_expr (loop,
6403 /* Shift by constant is multiply by power of two. */
6404 if (GET_CODE (XEXP (x, 1)) != CONST_INT)
6408 simplify_giv_expr (loop,
6411 GEN_INT ((HOST_WIDE_INT) 1
6412 << INTVAL (XEXP (x, 1)))),
6416 /* "-a" is "a * (-1)" */
6417 return simplify_giv_expr (loop,
6418 gen_rtx_MULT (mode, XEXP (x, 0), constm1_rtx),
6422 /* "~a" is "-a - 1". Silly, but easy. */
6423 return simplify_giv_expr (loop,
6424 gen_rtx_MINUS (mode,
6425 gen_rtx_NEG (mode, XEXP (x, 0)),
6430 /* Already in proper form for invariant. */
6436 /* Conditionally recognize extensions of simple IVs. After we've
6437 computed loop traversal counts and verified the range of the
6438 source IV, we'll reevaluate this as a GIV. */
6439 if (*ext_val == NULL_RTX)
6441 arg0 = simplify_giv_expr (loop, XEXP (x, 0), ext_val, benefit);
6442 if (arg0 && *ext_val == NULL_RTX && GET_CODE (arg0) == REG)
6444 *ext_val = gen_rtx_fmt_e (GET_CODE (x), mode, arg0);
6451 /* If this is a new register, we can't deal with it. */
6452 if (REGNO (x) >= max_reg_before_loop)
6455 /* Check for biv or giv. */
6456 switch (REG_IV_TYPE (REGNO (x)))
6460 case GENERAL_INDUCT:
6462 struct induction *v = REG_IV_INFO (REGNO (x));
6464 /* Form expression from giv and add benefit. Ensure this giv
6465 can derive another and subtract any needed adjustment if so. */
6467 /* Increasing the benefit here is risky. The only case in which it
6468 is arguably correct is if this is the only use of V. In other
6469 cases, this will artificially inflate the benefit of the current
6470 giv, and lead to suboptimal code. Thus, it is disabled, since
6471 potentially not reducing an only marginally beneficial giv is
6472 less harmful than reducing many givs that are not really
6475 rtx single_use = VARRAY_RTX (regs->single_usage, REGNO (x));
6476 if (single_use && single_use != const0_rtx)
6477 *benefit += v->benefit;
6483 tem = gen_rtx_PLUS (mode, gen_rtx_MULT (mode,
6484 v->src_reg, v->mult_val),
6487 if (v->derive_adjustment)
6488 tem = gen_rtx_MINUS (mode, tem, v->derive_adjustment);
6489 arg0 = simplify_giv_expr (loop, tem, ext_val, benefit);
6492 if (!v->ext_dependant)
6497 *ext_val = v->ext_dependant;
6505 /* If it isn't an induction variable, and it is invariant, we
6506 may be able to simplify things further by looking through
6507 the bits we just moved outside the loop. */
6508 if (loop_invariant_p (loop, x) == 1)
6512 for (m = the_movables.head; m; m = m->next)
6513 if (rtx_equal_p (x, m->set_dest))
6515 /* Ok, we found a match. Substitute and simplify. */
6517 /* If we match another movable, we must use that, as
6518 this one is going away. */
6520 return simplify_giv_expr (loop, m->match->set_dest,
6523 /* If consec is non-zero, this is a member of a group of
6524 instructions that were moved together. We handle this
6525 case only to the point of seeking to the last insn and
6526 looking for a REG_EQUAL. Fail if we don't find one. */
6531 do { tem = NEXT_INSN (tem); } while (--i > 0);
6533 tem = find_reg_note (tem, REG_EQUAL, NULL_RTX);
6535 tem = XEXP (tem, 0);
6539 tem = single_set (m->insn);
6541 tem = SET_SRC (tem);
6546 /* What we are most interested in is pointer
6547 arithmetic on invariants -- only take
6548 patterns we may be able to do something with. */
6549 if (GET_CODE (tem) == PLUS
6550 || GET_CODE (tem) == MULT
6551 || GET_CODE (tem) == ASHIFT
6552 || GET_CODE (tem) == CONST_INT
6553 || GET_CODE (tem) == SYMBOL_REF)
6555 tem = simplify_giv_expr (loop, tem, ext_val,
6560 else if (GET_CODE (tem) == CONST
6561 && GET_CODE (XEXP (tem, 0)) == PLUS
6562 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == SYMBOL_REF
6563 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)
6565 tem = simplify_giv_expr (loop, XEXP (tem, 0),
6577 /* Fall through to general case. */
6579 /* If invariant, return as USE (unless CONST_INT).
6580 Otherwise, not giv. */
6581 if (GET_CODE (x) == USE)
6584 if (loop_invariant_p (loop, x) == 1)
6586 if (GET_CODE (x) == CONST_INT)
6588 if (GET_CODE (x) == CONST
6589 && GET_CODE (XEXP (x, 0)) == PLUS
6590 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
6591 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
6593 return gen_rtx_USE (mode, x);
6600 /* This routine folds invariants such that there is only ever one
6601 CONST_INT in the summation. It is only used by simplify_giv_expr. */
6604 sge_plus_constant (x, c)
6607 if (GET_CODE (x) == CONST_INT)
6608 return GEN_INT (INTVAL (x) + INTVAL (c));
6609 else if (GET_CODE (x) != PLUS)
6610 return gen_rtx_PLUS (GET_MODE (x), x, c);
6611 else if (GET_CODE (XEXP (x, 1)) == CONST_INT)
6613 return gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0),
6614 GEN_INT (INTVAL (XEXP (x, 1)) + INTVAL (c)));
6616 else if (GET_CODE (XEXP (x, 0)) == PLUS
6617 || GET_CODE (XEXP (x, 1)) != PLUS)
6619 return gen_rtx_PLUS (GET_MODE (x),
6620 sge_plus_constant (XEXP (x, 0), c), XEXP (x, 1));
6624 return gen_rtx_PLUS (GET_MODE (x),
6625 sge_plus_constant (XEXP (x, 1), c), XEXP (x, 0));
6630 sge_plus (mode, x, y)
6631 enum machine_mode mode;
6634 while (GET_CODE (y) == PLUS)
6636 rtx a = XEXP (y, 0);
6637 if (GET_CODE (a) == CONST_INT)
6638 x = sge_plus_constant (x, a);
6640 x = gen_rtx_PLUS (mode, x, a);
6643 if (GET_CODE (y) == CONST_INT)
6644 x = sge_plus_constant (x, y);
6646 x = gen_rtx_PLUS (mode, x, y);
6650 /* Help detect a giv that is calculated by several consecutive insns;
6654 The caller has already identified the first insn P as having a giv as dest;
6655 we check that all other insns that set the same register follow
6656 immediately after P, that they alter nothing else,
6657 and that the result of the last is still a giv.
6659 The value is 0 if the reg set in P is not really a giv.
6660 Otherwise, the value is the amount gained by eliminating
6661 all the consecutive insns that compute the value.
6663 FIRST_BENEFIT is the amount gained by eliminating the first insn, P.
6664 SRC_REG is the reg of the biv; DEST_REG is the reg of the giv.
6666 The coefficients of the ultimate giv value are stored in
6667 *MULT_VAL and *ADD_VAL. */
6670 consec_sets_giv (loop, first_benefit, p, src_reg, dest_reg,
6671 add_val, mult_val, ext_val, last_consec_insn)
6672 const struct loop *loop;
6680 rtx *last_consec_insn;
6682 struct loop_regs *regs = LOOP_REGS (loop);
6689 /* Indicate that this is a giv so that we can update the value produced in
6690 each insn of the multi-insn sequence.
6692 This induction structure will be used only by the call to
6693 general_induction_var below, so we can allocate it on our stack.
6694 If this is a giv, our caller will replace the induct var entry with
6695 a new induction structure. */
6697 = (struct induction *) alloca (sizeof (struct induction));
6698 v->src_reg = src_reg;
6699 v->mult_val = *mult_val;
6700 v->add_val = *add_val;
6701 v->benefit = first_benefit;
6703 v->derive_adjustment = 0;
6704 v->ext_dependant = NULL_RTX;
6706 REG_IV_TYPE (REGNO (dest_reg)) = GENERAL_INDUCT;
6707 REG_IV_INFO (REGNO (dest_reg)) = v;
6709 count = VARRAY_INT (regs->n_times_set, REGNO (dest_reg)) - 1;
6714 code = GET_CODE (p);
6716 /* If libcall, skip to end of call sequence. */
6717 if (code == INSN && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
6721 && (set = single_set (p))
6722 && GET_CODE (SET_DEST (set)) == REG
6723 && SET_DEST (set) == dest_reg
6724 && (general_induction_var (loop, SET_SRC (set), &src_reg,
6725 add_val, mult_val, ext_val, 0,
6727 /* Giv created by equivalent expression. */
6728 || ((temp = find_reg_note (p, REG_EQUAL, NULL_RTX))
6729 && general_induction_var (loop, XEXP (temp, 0), &src_reg,
6730 add_val, mult_val, ext_val, 0,
6731 &benefit, VOIDmode)))
6732 && src_reg == v->src_reg)
6734 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
6735 benefit += libcall_benefit (p);
6738 v->mult_val = *mult_val;
6739 v->add_val = *add_val;
6740 v->benefit += benefit;
6742 else if (code != NOTE)
6744 /* Allow insns that set something other than this giv to a
6745 constant. Such insns are needed on machines which cannot
6746 include long constants and should not disqualify a giv. */
6748 && (set = single_set (p))
6749 && SET_DEST (set) != dest_reg
6750 && CONSTANT_P (SET_SRC (set)))
6753 REG_IV_TYPE (REGNO (dest_reg)) = UNKNOWN_INDUCT;
6758 *last_consec_insn = p;
6762 /* Return an rtx, if any, that expresses giv G2 as a function of the register
6763 represented by G1. If no such expression can be found, or it is clear that
6764 it cannot possibly be a valid address, 0 is returned.
6766 To perform the computation, we note that
6769 where `v' is the biv.
6771 So G2 = (y/b) * G1 + (b - a*y/x).
6773 Note that MULT = y/x.
6775 Update: A and B are now allowed to be additive expressions such that
6776 B contains all variables in A. That is, computing B-A will not require
6777 subtracting variables. */
6780 express_from_1 (a, b, mult)
6783 /* If MULT is zero, then A*MULT is zero, and our expression is B. */
6785 if (mult == const0_rtx)
6788 /* If MULT is not 1, we cannot handle A with non-constants, since we
6789 would then be required to subtract multiples of the registers in A.
6790 This is theoretically possible, and may even apply to some Fortran
6791 constructs, but it is a lot of work and we do not attempt it here. */
6793 if (mult != const1_rtx && GET_CODE (a) != CONST_INT)
6796 /* In general these structures are sorted top to bottom (down the PLUS
6797 chain), but not left to right across the PLUS. If B is a higher
6798 order giv than A, we can strip one level and recurse. If A is higher
6799 order, we'll eventually bail out, but won't know that until the end.
6800 If they are the same, we'll strip one level around this loop. */
6802 while (GET_CODE (a) == PLUS && GET_CODE (b) == PLUS)
6804 rtx ra, rb, oa, ob, tmp;
6806 ra = XEXP (a, 0), oa = XEXP (a, 1);
6807 if (GET_CODE (ra) == PLUS)
6808 tmp = ra, ra = oa, oa = tmp;
6810 rb = XEXP (b, 0), ob = XEXP (b, 1);
6811 if (GET_CODE (rb) == PLUS)
6812 tmp = rb, rb = ob, ob = tmp;
6814 if (rtx_equal_p (ra, rb))
6815 /* We matched: remove one reg completely. */
6817 else if (GET_CODE (ob) != PLUS && rtx_equal_p (ra, ob))
6818 /* An alternate match. */
6820 else if (GET_CODE (oa) != PLUS && rtx_equal_p (oa, rb))
6821 /* An alternate match. */
6825 /* Indicates an extra register in B. Strip one level from B and
6826 recurse, hoping B was the higher order expression. */
6827 ob = express_from_1 (a, ob, mult);
6830 return gen_rtx_PLUS (GET_MODE (b), rb, ob);
6834 /* Here we are at the last level of A, go through the cases hoping to
6835 get rid of everything but a constant. */
6837 if (GET_CODE (a) == PLUS)
6841 ra = XEXP (a, 0), oa = XEXP (a, 1);
6842 if (rtx_equal_p (oa, b))
6844 else if (!rtx_equal_p (ra, b))
6847 if (GET_CODE (oa) != CONST_INT)
6850 return GEN_INT (-INTVAL (oa) * INTVAL (mult));
6852 else if (GET_CODE (a) == CONST_INT)
6854 return plus_constant (b, -INTVAL (a) * INTVAL (mult));
6856 else if (CONSTANT_P (a))
6858 return simplify_gen_binary (MINUS, GET_MODE (b) != VOIDmode ? GET_MODE (b) : GET_MODE (a), const0_rtx, a);
6860 else if (GET_CODE (b) == PLUS)
6862 if (rtx_equal_p (a, XEXP (b, 0)))
6864 else if (rtx_equal_p (a, XEXP (b, 1)))
6869 else if (rtx_equal_p (a, b))
6876 express_from (g1, g2)
6877 struct induction *g1, *g2;
6881 /* The value that G1 will be multiplied by must be a constant integer. Also,
6882 the only chance we have of getting a valid address is if b*c/a (see above
6883 for notation) is also an integer. */
6884 if (GET_CODE (g1->mult_val) == CONST_INT
6885 && GET_CODE (g2->mult_val) == CONST_INT)
6887 if (g1->mult_val == const0_rtx
6888 || INTVAL (g2->mult_val) % INTVAL (g1->mult_val) != 0)
6890 mult = GEN_INT (INTVAL (g2->mult_val) / INTVAL (g1->mult_val));
6892 else if (rtx_equal_p (g1->mult_val, g2->mult_val))
6896 /* ??? Find out if the one is a multiple of the other? */
6900 add = express_from_1 (g1->add_val, g2->add_val, mult);
6901 if (add == NULL_RTX)
6903 /* Failed. If we've got a multiplication factor between G1 and G2,
6904 scale G1's addend and try again. */
6905 if (INTVAL (mult) > 1)
6907 rtx g1_add_val = g1->add_val;
6908 if (GET_CODE (g1_add_val) == MULT
6909 && GET_CODE (XEXP (g1_add_val, 1)) == CONST_INT)
6912 m = INTVAL (mult) * INTVAL (XEXP (g1_add_val, 1));
6913 g1_add_val = gen_rtx_MULT (GET_MODE (g1_add_val),
6914 XEXP (g1_add_val, 0), GEN_INT (m));
6918 g1_add_val = gen_rtx_MULT (GET_MODE (g1_add_val), g1_add_val,
6922 add = express_from_1 (g1_add_val, g2->add_val, const1_rtx);
6925 if (add == NULL_RTX)
6928 /* Form simplified final result. */
6929 if (mult == const0_rtx)
6931 else if (mult == const1_rtx)
6932 mult = g1->dest_reg;
6934 mult = gen_rtx_MULT (g2->mode, g1->dest_reg, mult);
6936 if (add == const0_rtx)
6940 if (GET_CODE (add) == PLUS
6941 && CONSTANT_P (XEXP (add, 1)))
6943 rtx tem = XEXP (add, 1);
6944 mult = gen_rtx_PLUS (g2->mode, mult, XEXP (add, 0));
6948 return gen_rtx_PLUS (g2->mode, mult, add);
6952 /* Return an rtx, if any, that expresses giv G2 as a function of the register
6953 represented by G1. This indicates that G2 should be combined with G1 and
6954 that G2 can use (either directly or via an address expression) a register
6955 used to represent G1. */
6958 combine_givs_p (g1, g2)
6959 struct induction *g1, *g2;
6963 /* With the introduction of ext dependant givs, we must care for modes.
6964 G2 must not use a wider mode than G1. */
6965 if (GET_MODE_SIZE (g1->mode) < GET_MODE_SIZE (g2->mode))
6968 ret = comb = express_from (g1, g2);
6969 if (comb == NULL_RTX)
6971 if (g1->mode != g2->mode)
6972 ret = gen_lowpart (g2->mode, comb);
6974 /* If these givs are identical, they can be combined. We use the results
6975 of express_from because the addends are not in a canonical form, so
6976 rtx_equal_p is a weaker test. */
6977 /* But don't combine a DEST_REG giv with a DEST_ADDR giv; we want the
6978 combination to be the other way round. */
6979 if (comb == g1->dest_reg
6980 && (g1->giv_type == DEST_REG || g2->giv_type == DEST_ADDR))
6985 /* If G2 can be expressed as a function of G1 and that function is valid
6986 as an address and no more expensive than using a register for G2,
6987 the expression of G2 in terms of G1 can be used. */
6989 && g2->giv_type == DEST_ADDR
6990 && memory_address_p (g2->mem_mode, ret)
6991 /* ??? Looses, especially with -fforce-addr, where *g2->location
6992 will always be a register, and so anything more complicated
6996 && ADDRESS_COST (tem) <= ADDRESS_COST (*g2->location)
6998 && rtx_cost (tem, MEM) <= rtx_cost (*g2->location, MEM)
7009 /* Check each extension dependant giv in this class to see if its
7010 root biv is safe from wrapping in the interior mode, which would
7011 make the giv illegal. */
7014 check_ext_dependant_givs (bl, loop_info)
7015 struct iv_class *bl;
7016 struct loop_info *loop_info;
7018 int ze_ok = 0, se_ok = 0, info_ok = 0;
7019 enum machine_mode biv_mode = GET_MODE (bl->biv->src_reg);
7020 HOST_WIDE_INT start_val;
7021 unsigned HOST_WIDE_INT u_end_val, u_start_val;
7023 struct induction *v;
7025 /* Make sure the iteration data is available. We must have
7026 constants in order to be certain of no overflow. */
7027 /* ??? An unknown iteration count with an increment of +-1
7028 combined with friendly exit tests of against an invariant
7029 value is also ameanable to optimization. Not implemented. */
7030 if (loop_info->n_iterations > 0
7031 && bl->initial_value
7032 && GET_CODE (bl->initial_value) == CONST_INT
7033 && (incr = biv_total_increment (bl))
7034 && GET_CODE (incr) == CONST_INT
7035 /* Make sure the host can represent the arithmetic. */
7036 && HOST_BITS_PER_WIDE_INT >= GET_MODE_BITSIZE (biv_mode))
7038 unsigned HOST_WIDE_INT abs_incr, total_incr;
7039 HOST_WIDE_INT s_end_val;
7043 start_val = INTVAL (bl->initial_value);
7044 u_start_val = start_val;
7046 neg_incr = 0, abs_incr = INTVAL (incr);
7047 if (INTVAL (incr) < 0)
7048 neg_incr = 1, abs_incr = -abs_incr;
7049 total_incr = abs_incr * loop_info->n_iterations;
7051 /* Check for host arithmatic overflow. */
7052 if (total_incr / loop_info->n_iterations == abs_incr)
7054 unsigned HOST_WIDE_INT u_max;
7055 HOST_WIDE_INT s_max;
7057 u_end_val = start_val + (neg_incr ? -total_incr : total_incr);
7058 s_end_val = u_end_val;
7059 u_max = GET_MODE_MASK (biv_mode);
7062 /* Check zero extension of biv ok. */
7064 /* Check for host arithmatic overflow. */
7066 ? u_end_val < u_start_val
7067 : u_end_val > u_start_val)
7068 /* Check for target arithmetic overflow. */
7070 ? 1 /* taken care of with host overflow */
7071 : u_end_val <= u_max))
7076 /* Check sign extension of biv ok. */
7077 /* ??? While it is true that overflow with signed and pointer
7078 arithmetic is undefined, I fear too many programmers don't
7079 keep this fact in mind -- myself included on occasion.
7080 So leave alone with the signed overflow optimizations. */
7081 if (start_val >= -s_max - 1
7082 /* Check for host arithmatic overflow. */
7084 ? s_end_val < start_val
7085 : s_end_val > start_val)
7086 /* Check for target arithmetic overflow. */
7088 ? s_end_val >= -s_max - 1
7089 : s_end_val <= s_max))
7096 /* Invalidate givs that fail the tests. */
7097 for (v = bl->giv; v; v = v->next_iv)
7098 if (v->ext_dependant)
7100 enum rtx_code code = GET_CODE (v->ext_dependant);
7113 /* We don't know whether this value is being used as either
7114 signed or unsigned, so to safely truncate we must satisfy
7115 both. The initial check here verifies the BIV itself;
7116 once that is successful we may check its range wrt the
7120 enum machine_mode outer_mode = GET_MODE (v->ext_dependant);
7121 unsigned HOST_WIDE_INT max = GET_MODE_MASK (outer_mode) >> 1;
7123 /* We know from the above that both endpoints are nonnegative,
7124 and that there is no wrapping. Verify that both endpoints
7125 are within the (signed) range of the outer mode. */
7126 if (u_start_val <= max && u_end_val <= max)
7137 if (loop_dump_stream)
7139 fprintf(loop_dump_stream,
7140 "Verified ext dependant giv at %d of reg %d\n",
7141 INSN_UID (v->insn), bl->regno);
7146 if (loop_dump_stream)
7151 why = "biv iteration values overflowed";
7155 incr = biv_total_increment (bl);
7156 if (incr == const1_rtx)
7157 why = "biv iteration info incomplete; incr by 1";
7159 why = "biv iteration info incomplete";
7162 fprintf(loop_dump_stream,
7163 "Failed ext dependant giv at %d, %s\n",
7164 INSN_UID (v->insn), why);
7171 /* Generate a version of VALUE in a mode appropriate for initializing V. */
7174 extend_value_for_giv (v, value)
7175 struct induction *v;
7178 rtx ext_dep = v->ext_dependant;
7183 /* Recall that check_ext_dependant_givs verified that the known bounds
7184 of a biv did not overflow or wrap with respect to the extension for
7185 the giv. Therefore, constants need no additional adjustment. */
7186 if (CONSTANT_P (value) && GET_MODE (value) == VOIDmode)
7189 /* Otherwise, we must adjust the value to compensate for the
7190 differing modes of the biv and the giv. */
7191 return gen_rtx_fmt_e (GET_CODE (ext_dep), GET_MODE (ext_dep), value);
7194 struct combine_givs_stats
7201 cmp_combine_givs_stats (xp, yp)
7205 const struct combine_givs_stats * const x =
7206 (const struct combine_givs_stats *) xp;
7207 const struct combine_givs_stats * const y =
7208 (const struct combine_givs_stats *) yp;
7210 d = y->total_benefit - x->total_benefit;
7211 /* Stabilize the sort. */
7213 d = x->giv_number - y->giv_number;
7217 /* Check all pairs of givs for iv_class BL and see if any can be combined with
7218 any other. If so, point SAME to the giv combined with and set NEW_REG to
7219 be an expression (in terms of the other giv's DEST_REG) equivalent to the
7220 giv. Also, update BENEFIT and related fields for cost/benefit analysis. */
7223 combine_givs (regs, bl)
7224 struct loop_regs *regs;
7225 struct iv_class *bl;
7227 /* Additional benefit to add for being combined multiple times. */
7228 const int extra_benefit = 3;
7230 struct induction *g1, *g2, **giv_array;
7231 int i, j, k, giv_count;
7232 struct combine_givs_stats *stats;
7235 /* Count givs, because bl->giv_count is incorrect here. */
7237 for (g1 = bl->giv; g1; g1 = g1->next_iv)
7242 = (struct induction **) alloca (giv_count * sizeof (struct induction *));
7244 for (g1 = bl->giv; g1; g1 = g1->next_iv)
7246 giv_array[i++] = g1;
7248 stats = (struct combine_givs_stats *) xcalloc (giv_count, sizeof (*stats));
7249 can_combine = (rtx *) xcalloc (giv_count, giv_count * sizeof (rtx));
7251 for (i = 0; i < giv_count; i++)
7257 stats[i].giv_number = i;
7259 /* If a DEST_REG GIV is used only once, do not allow it to combine
7260 with anything, for in doing so we will gain nothing that cannot
7261 be had by simply letting the GIV with which we would have combined
7262 to be reduced on its own. The losage shows up in particular with
7263 DEST_ADDR targets on hosts with reg+reg addressing, though it can
7264 be seen elsewhere as well. */
7265 if (g1->giv_type == DEST_REG
7266 && (single_use = VARRAY_RTX (regs->single_usage,
7267 REGNO (g1->dest_reg)))
7268 && single_use != const0_rtx)
7271 this_benefit = g1->benefit;
7272 /* Add an additional weight for zero addends. */
7273 if (g1->no_const_addval)
7276 for (j = 0; j < giv_count; j++)
7282 && (this_combine = combine_givs_p (g1, g2)) != NULL_RTX)
7284 can_combine[i * giv_count + j] = this_combine;
7285 this_benefit += g2->benefit + extra_benefit;
7288 stats[i].total_benefit = this_benefit;
7291 /* Iterate, combining until we can't. */
7293 qsort (stats, giv_count, sizeof (*stats), cmp_combine_givs_stats);
7295 if (loop_dump_stream)
7297 fprintf (loop_dump_stream, "Sorted combine statistics:\n");
7298 for (k = 0; k < giv_count; k++)
7300 g1 = giv_array[stats[k].giv_number];
7301 if (!g1->combined_with && !g1->same)
7302 fprintf (loop_dump_stream, " {%d, %d}",
7303 INSN_UID (giv_array[stats[k].giv_number]->insn),
7304 stats[k].total_benefit);
7306 putc ('\n', loop_dump_stream);
7309 for (k = 0; k < giv_count; k++)
7311 int g1_add_benefit = 0;
7313 i = stats[k].giv_number;
7316 /* If it has already been combined, skip. */
7317 if (g1->combined_with || g1->same)
7320 for (j = 0; j < giv_count; j++)
7323 if (g1 != g2 && can_combine[i * giv_count + j]
7324 /* If it has already been combined, skip. */
7325 && ! g2->same && ! g2->combined_with)
7329 g2->new_reg = can_combine[i * giv_count + j];
7331 g1->combined_with++;
7332 g1->lifetime += g2->lifetime;
7334 g1_add_benefit += g2->benefit;
7336 /* ??? The new final_[bg]iv_value code does a much better job
7337 of finding replaceable giv's, and hence this code may no
7338 longer be necessary. */
7339 if (! g2->replaceable && REG_USERVAR_P (g2->dest_reg))
7340 g1_add_benefit -= copy_cost;
7342 /* To help optimize the next set of combinations, remove
7343 this giv from the benefits of other potential mates. */
7344 for (l = 0; l < giv_count; ++l)
7346 int m = stats[l].giv_number;
7347 if (can_combine[m * giv_count + j])
7348 stats[l].total_benefit -= g2->benefit + extra_benefit;
7351 if (loop_dump_stream)
7352 fprintf (loop_dump_stream,
7353 "giv at %d combined with giv at %d; new benefit %d + %d, lifetime %d\n",
7354 INSN_UID (g2->insn), INSN_UID (g1->insn),
7355 g1->benefit, g1_add_benefit, g1->lifetime);
7359 /* To help optimize the next set of combinations, remove
7360 this giv from the benefits of other potential mates. */
7361 if (g1->combined_with)
7363 for (j = 0; j < giv_count; ++j)
7365 int m = stats[j].giv_number;
7366 if (can_combine[m * giv_count + i])
7367 stats[j].total_benefit -= g1->benefit + extra_benefit;
7370 g1->benefit += g1_add_benefit;
7372 /* We've finished with this giv, and everything it touched.
7373 Restart the combination so that proper weights for the
7374 rest of the givs are properly taken into account. */
7375 /* ??? Ideally we would compact the arrays at this point, so
7376 as to not cover old ground. But sanely compacting
7377 can_combine is tricky. */
7387 struct recombine_givs_stats
7390 int start_luid, end_luid;
7393 /* Used below as comparison function for qsort. We want a ascending luid
7394 when scanning the array starting at the end, thus the arguments are
7397 cmp_recombine_givs_stats (xp, yp)
7401 const struct recombine_givs_stats * const x =
7402 (const struct recombine_givs_stats *) xp;
7403 const struct recombine_givs_stats * const y =
7404 (const struct recombine_givs_stats *) yp;
7406 d = y->start_luid - x->start_luid;
7407 /* Stabilize the sort. */
7409 d = y->giv_number - x->giv_number;
7413 /* Scan X, which is a part of INSN, for the end of life of a giv. Also
7414 look for the start of life of a giv where the start has not been seen
7415 yet to unlock the search for the end of its life.
7416 Only consider givs that belong to BIV.
7417 Return the total number of lifetime ends that have been found. */
7419 find_life_end (x, stats, insn, biv)
7421 struct recombine_givs_stats *stats;
7428 code = GET_CODE (x);
7433 rtx reg = SET_DEST (x);
7434 if (GET_CODE (reg) == REG)
7436 int regno = REGNO (reg);
7437 struct induction *v = REG_IV_INFO (regno);
7439 if (REG_IV_TYPE (regno) == GENERAL_INDUCT
7441 && v->src_reg == biv
7442 && stats[v->ix].end_luid <= 0)
7444 /* If we see a 0 here for end_luid, it means that we have
7445 scanned the entire loop without finding any use at all.
7446 We must not predicate this code on a start_luid match
7447 since that would make the test fail for givs that have
7448 been hoisted out of inner loops. */
7449 if (stats[v->ix].end_luid == 0)
7451 stats[v->ix].end_luid = stats[v->ix].start_luid;
7452 return 1 + find_life_end (SET_SRC (x), stats, insn, biv);
7454 else if (stats[v->ix].start_luid == INSN_LUID (insn))
7455 stats[v->ix].end_luid = 0;
7457 return find_life_end (SET_SRC (x), stats, insn, biv);
7463 int regno = REGNO (x);
7464 struct induction *v = REG_IV_INFO (regno);
7466 if (REG_IV_TYPE (regno) == GENERAL_INDUCT
7468 && v->src_reg == biv
7469 && stats[v->ix].end_luid == 0)
7471 while (INSN_UID (insn) >= max_uid_for_loop)
7472 insn = NEXT_INSN (insn);
7473 stats[v->ix].end_luid = INSN_LUID (insn);
7486 fmt = GET_RTX_FORMAT (code);
7488 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
7491 retval += find_life_end (XEXP (x, i), stats, insn, biv);
7493 else if (fmt[i] == 'E')
7494 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
7495 retval += find_life_end (XVECEXP (x, i, j), stats, insn, biv);
7500 /* For each giv that has been combined with another, look if
7501 we can combine it with the most recently used one instead.
7502 This tends to shorten giv lifetimes, and helps the next step:
7503 try to derive givs from other givs. */
7505 recombine_givs (loop, bl, unroll_p)
7506 const struct loop *loop;
7507 struct iv_class *bl;
7510 struct loop_regs *regs = LOOP_REGS (loop);
7511 struct induction *v, **giv_array, *last_giv;
7512 struct recombine_givs_stats *stats;
7515 int ends_need_computing;
7517 for (giv_count = 0, v = bl->giv; v; v = v->next_iv)
7523 = (struct induction **) xmalloc (giv_count * sizeof (struct induction *));
7524 stats = (struct recombine_givs_stats *) xmalloc (giv_count * sizeof *stats);
7526 /* Initialize stats and set up the ix field for each giv in stats to name
7527 the corresponding index into stats. */
7528 for (i = 0, v = bl->giv; v; v = v->next_iv)
7535 stats[i].giv_number = i;
7536 /* If this giv has been hoisted out of an inner loop, use the luid of
7537 the previous insn. */
7538 for (p = v->insn; INSN_UID (p) >= max_uid_for_loop; )
7540 stats[i].start_luid = INSN_LUID (p);
7544 qsort (stats, giv_count, sizeof (*stats), cmp_recombine_givs_stats);
7546 /* Set up the ix field for each giv in stats to name
7547 the corresponding index into stats, and
7548 do the actual most-recently-used recombination. */
7549 for (last_giv = 0, i = giv_count - 1; i >= 0; i--)
7551 v = giv_array[stats[i].giv_number];
7555 struct induction *old_same = v->same;
7558 /* combine_givs_p actually says if we can make this transformation.
7559 The other tests are here only to avoid keeping a giv alive
7560 that could otherwise be eliminated. */
7562 && ((old_same->maybe_dead && ! old_same->combined_with)
7563 || ! last_giv->maybe_dead
7564 || last_giv->combined_with)
7565 && (new_combine = combine_givs_p (last_giv, v)))
7567 old_same->combined_with--;
7568 v->new_reg = new_combine;
7570 last_giv->combined_with++;
7571 /* No need to update lifetimes / benefits here since we have
7572 already decided what to reduce. */
7574 if (loop_dump_stream)
7576 fprintf (loop_dump_stream,
7577 "giv at %d recombined with giv at %d as ",
7578 INSN_UID (v->insn), INSN_UID (last_giv->insn));
7579 print_rtl (loop_dump_stream, v->new_reg);
7580 putc ('\n', loop_dump_stream);
7586 else if (v->giv_type != DEST_REG)
7589 || (last_giv->maybe_dead && ! last_giv->combined_with)
7591 || v->combined_with)
7595 ends_need_computing = 0;
7596 /* For each DEST_REG giv, compute lifetime starts, and try to compute
7597 lifetime ends from regscan info. */
7598 for (i = giv_count - 1; i >= 0; i--)
7600 v = giv_array[stats[i].giv_number];
7603 if (v->giv_type == DEST_ADDR)
7605 /* Loop unrolling of an inner loop can even create new DEST_REG
7608 for (p = v->insn; INSN_UID (p) >= max_uid_for_loop;)
7610 stats[i].start_luid = stats[i].end_luid = INSN_LUID (p);
7612 stats[i].end_luid++;
7614 else /* v->giv_type == DEST_REG */
7618 stats[i].start_luid = INSN_LUID (v->insn);
7619 stats[i].end_luid = INSN_LUID (v->last_use);
7621 else if (INSN_UID (v->insn) >= max_uid_for_loop)
7624 /* This insn has been created by loop optimization on an inner
7625 loop. We don't have a proper start_luid that will match
7626 when we see the first set. But we do know that there will
7627 be no use before the set, so we can set end_luid to 0 so that
7628 we'll start looking for the last use right away. */
7629 for (p = PREV_INSN (v->insn); INSN_UID (p) >= max_uid_for_loop; )
7631 stats[i].start_luid = INSN_LUID (p);
7632 stats[i].end_luid = 0;
7633 ends_need_computing++;
7637 int regno = REGNO (v->dest_reg);
7638 int count = VARRAY_INT (regs->n_times_set, regno) - 1;
7641 /* Find the first insn that sets the giv, so that we can verify
7642 if this giv's lifetime wraps around the loop. We also need
7643 the luid of the first setting insn in order to detect the
7644 last use properly. */
7647 p = prev_nonnote_insn (p);
7648 if (reg_set_p (v->dest_reg, p))
7652 stats[i].start_luid = INSN_LUID (p);
7653 if (stats[i].start_luid > uid_luid[REGNO_FIRST_UID (regno)])
7655 stats[i].end_luid = -1;
7656 ends_need_computing++;
7660 stats[i].end_luid = uid_luid[REGNO_LAST_UID (regno)];
7661 if (stats[i].end_luid > INSN_LUID (loop->end))
7663 stats[i].end_luid = -1;
7664 ends_need_computing++;
7671 /* If the regscan information was unconclusive for one or more DEST_REG
7672 givs, scan the all insn in the loop to find out lifetime ends. */
7673 if (ends_need_computing)
7675 rtx biv = bl->biv->src_reg;
7680 if (p == loop->start)
7685 ends_need_computing -= find_life_end (PATTERN (p), stats, p, biv);
7687 while (ends_need_computing);
7690 /* Set start_luid back to the last insn that sets the giv. This allows
7691 more combinations. */
7692 for (i = giv_count - 1; i >= 0; i--)
7694 v = giv_array[stats[i].giv_number];
7697 if (INSN_UID (v->insn) < max_uid_for_loop)
7698 stats[i].start_luid = INSN_LUID (v->insn);
7701 /* Now adjust lifetime ends by taking combined givs into account. */
7702 for (i = giv_count - 1; i >= 0; i--)
7707 v = giv_array[stats[i].giv_number];
7710 if (v->same && ! v->same->ignore)
7713 luid = stats[i].start_luid;
7714 /* Use unsigned arithmetic to model loop wrap-around. */
7715 if (luid - stats[j].start_luid
7716 > (unsigned) stats[j].end_luid - stats[j].start_luid)
7717 stats[j].end_luid = luid;
7721 qsort (stats, giv_count, sizeof (*stats), cmp_recombine_givs_stats);
7723 /* Try to derive DEST_REG givs from previous DEST_REG givs with the
7724 same mult_val and non-overlapping lifetime. This reduces register
7726 Once we find a DEST_REG giv that is suitable to derive others from,
7727 we set last_giv to this giv, and try to derive as many other DEST_REG
7728 givs from it without joining overlapping lifetimes. If we then
7729 encounter a DEST_REG giv that we can't derive, we set rescan to the
7730 index for this giv (unless rescan is already set).
7731 When we are finished with the current LAST_GIV (i.e. the inner loop
7732 terminates), we start again with rescan, which then becomes the new
7734 for (i = giv_count - 1; i >= 0; i = rescan)
7736 int life_start = 0, life_end = 0;
7738 for (last_giv = 0, rescan = -1; i >= 0; i--)
7742 v = giv_array[stats[i].giv_number];
7743 if (v->giv_type != DEST_REG || v->derived_from || v->same)
7747 /* Don't use a giv that's likely to be dead to derive
7748 others - that would be likely to keep that giv alive. */
7749 if (! v->maybe_dead || v->combined_with)
7752 life_start = stats[i].start_luid;
7753 life_end = stats[i].end_luid;
7757 /* Use unsigned arithmetic to model loop wrap around. */
7758 if (((unsigned) stats[i].start_luid - life_start
7759 >= (unsigned) life_end - life_start)
7760 && ((unsigned) stats[i].end_luid - life_start
7761 > (unsigned) life_end - life_start)
7762 /* Check that the giv insn we're about to use for deriving
7763 precedes all uses of that giv. Note that initializing the
7764 derived giv would defeat the purpose of reducing register
7766 ??? We could arrange to move the insn. */
7767 && ((unsigned) stats[i].end_luid - INSN_LUID (loop->start)
7768 > (unsigned) stats[i].start_luid - INSN_LUID (loop->start))
7769 && rtx_equal_p (last_giv->mult_val, v->mult_val)
7770 /* ??? Could handle libcalls, but would need more logic. */
7771 && ! find_reg_note (v->insn, REG_RETVAL, NULL_RTX)
7772 /* We would really like to know if for any giv that v
7773 is combined with, v->insn or any intervening biv increment
7774 dominates that combined giv. However, we
7775 don't have this detailed control flow information.
7776 N.B. since last_giv will be reduced, it is valid
7777 anywhere in the loop, so we don't need to check the
7778 validity of last_giv.
7779 We rely here on the fact that v->always_executed implies that
7780 there is no jump to someplace else in the loop before the
7781 giv insn, and hence any insn that is executed before the
7782 giv insn in the loop will have a lower luid. */
7783 && (v->always_executed || ! v->combined_with)
7784 && (sum = express_from (last_giv, v))
7785 /* Make sure we don't make the add more expensive. ADD_COST
7786 doesn't take different costs of registers and constants into
7787 account, so compare the cost of the actual SET_SRCs. */
7788 && (rtx_cost (sum, SET)
7789 <= rtx_cost (SET_SRC (single_set (v->insn)), SET))
7790 /* ??? unroll can't understand anything but reg + const_int
7791 sums. It would be cleaner to fix unroll. */
7792 && ((GET_CODE (sum) == PLUS
7793 && GET_CODE (XEXP (sum, 0)) == REG
7794 && GET_CODE (XEXP (sum, 1)) == CONST_INT)
7796 && validate_change (v->insn, &PATTERN (v->insn),
7797 gen_rtx_SET (VOIDmode, v->dest_reg, sum), 0))
7799 v->derived_from = last_giv;
7800 life_end = stats[i].end_luid;
7802 if (loop_dump_stream)
7804 fprintf (loop_dump_stream,
7805 "giv at %d derived from %d as ",
7806 INSN_UID (v->insn), INSN_UID (last_giv->insn));
7807 print_rtl (loop_dump_stream, sum);
7808 putc ('\n', loop_dump_stream);
7811 else if (rescan < 0)
7821 /* EMIT code before INSERT_BEFORE to set REG = B * M + A. */
7824 emit_iv_add_mult (b, m, a, reg, insert_before)
7825 rtx b; /* initial value of basic induction variable */
7826 rtx m; /* multiplicative constant */
7827 rtx a; /* additive constant */
7828 rtx reg; /* destination register */
7834 /* Prevent unexpected sharing of these rtx. */
7838 /* Increase the lifetime of any invariants moved further in code. */
7839 update_reg_last_use (a, insert_before);
7840 update_reg_last_use (b, insert_before);
7841 update_reg_last_use (m, insert_before);
7844 result = expand_mult_add (b, reg, m, a, GET_MODE (reg), 0);
7846 emit_move_insn (reg, result);
7847 seq = gen_sequence ();
7850 emit_insn_before (seq, insert_before);
7852 /* It is entirely possible that the expansion created lots of new
7853 registers. Iterate over the sequence we just created and
7856 if (GET_CODE (seq) == SEQUENCE)
7859 for (i = 0; i < XVECLEN (seq, 0); ++i)
7861 rtx set = single_set (XVECEXP (seq, 0, i));
7862 if (set && GET_CODE (SET_DEST (set)) == REG)
7863 record_base_value (REGNO (SET_DEST (set)), SET_SRC (set), 0);
7866 else if (GET_CODE (seq) == SET
7867 && GET_CODE (SET_DEST (seq)) == REG)
7868 record_base_value (REGNO (SET_DEST (seq)), SET_SRC (seq), 0);
7871 /* Similar to emit_iv_add_mult, but compute cost rather than emitting
7874 iv_add_mult_cost (b, m, a, reg)
7875 rtx b; /* initial value of basic induction variable */
7876 rtx m; /* multiplicative constant */
7877 rtx a; /* additive constant */
7878 rtx reg; /* destination register */
7884 result = expand_mult_add (b, reg, m, a, GET_MODE (reg), 0);
7886 emit_move_insn (reg, result);
7887 last = get_last_insn ();
7890 rtx t = single_set (last);
7892 cost += rtx_cost (SET_SRC (t), SET);
7893 last = PREV_INSN (last);
7899 /* Test whether A * B can be computed without
7900 an actual multiply insn. Value is 1 if so. */
7903 product_cheap_p (a, b)
7909 struct obstack *old_rtl_obstack = rtl_obstack;
7910 char *storage = (char *) obstack_alloc (&temp_obstack, 0);
7913 /* If only one is constant, make it B. */
7914 if (GET_CODE (a) == CONST_INT)
7915 tmp = a, a = b, b = tmp;
7917 /* If first constant, both constant, so don't need multiply. */
7918 if (GET_CODE (a) == CONST_INT)
7921 /* If second not constant, neither is constant, so would need multiply. */
7922 if (GET_CODE (b) != CONST_INT)
7925 /* One operand is constant, so might not need multiply insn. Generate the
7926 code for the multiply and see if a call or multiply, or long sequence
7927 of insns is generated. */
7929 rtl_obstack = &temp_obstack;
7931 expand_mult (GET_MODE (a), a, b, NULL_RTX, 0);
7932 tmp = gen_sequence ();
7935 if (GET_CODE (tmp) == SEQUENCE)
7937 if (XVEC (tmp, 0) == 0)
7939 else if (XVECLEN (tmp, 0) > 3)
7942 for (i = 0; i < XVECLEN (tmp, 0); i++)
7944 rtx insn = XVECEXP (tmp, 0, i);
7946 if (GET_CODE (insn) != INSN
7947 || (GET_CODE (PATTERN (insn)) == SET
7948 && GET_CODE (SET_SRC (PATTERN (insn))) == MULT)
7949 || (GET_CODE (PATTERN (insn)) == PARALLEL
7950 && GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == SET
7951 && GET_CODE (SET_SRC (XVECEXP (PATTERN (insn), 0, 0))) == MULT))
7958 else if (GET_CODE (tmp) == SET
7959 && GET_CODE (SET_SRC (tmp)) == MULT)
7961 else if (GET_CODE (tmp) == PARALLEL
7962 && GET_CODE (XVECEXP (tmp, 0, 0)) == SET
7963 && GET_CODE (SET_SRC (XVECEXP (tmp, 0, 0))) == MULT)
7966 /* Free any storage we obtained in generating this multiply and restore rtl
7967 allocation to its normal obstack. */
7968 obstack_free (&temp_obstack, storage);
7969 rtl_obstack = old_rtl_obstack;
7974 /* Check to see if loop can be terminated by a "decrement and branch until
7975 zero" instruction. If so, add a REG_NONNEG note to the branch insn if so.
7976 Also try reversing an increment loop to a decrement loop
7977 to see if the optimization can be performed.
7978 Value is nonzero if optimization was performed. */
7980 /* This is useful even if the architecture doesn't have such an insn,
7981 because it might change a loops which increments from 0 to n to a loop
7982 which decrements from n to 0. A loop that decrements to zero is usually
7983 faster than one that increments from zero. */
7985 /* ??? This could be rewritten to use some of the loop unrolling procedures,
7986 such as approx_final_value, biv_total_increment, loop_iterations, and
7987 final_[bg]iv_value. */
7990 check_dbra_loop (loop, insn_count)
7994 struct loop_info *loop_info = LOOP_INFO (loop);
7995 struct loop_regs *regs = LOOP_REGS (loop);
7996 struct iv_class *bl;
8003 rtx before_comparison;
8007 int compare_and_branch;
8008 rtx loop_start = loop->start;
8009 rtx loop_end = loop->end;
8011 /* If last insn is a conditional branch, and the insn before tests a
8012 register value, try to optimize it. Otherwise, we can't do anything. */
8014 jump = PREV_INSN (loop_end);
8015 comparison = get_condition_for_loop (loop, jump);
8016 if (comparison == 0)
8018 if (!onlyjump_p (jump))
8021 /* Try to compute whether the compare/branch at the loop end is one or
8022 two instructions. */
8023 get_condition (jump, &first_compare);
8024 if (first_compare == jump)
8025 compare_and_branch = 1;
8026 else if (first_compare == prev_nonnote_insn (jump))
8027 compare_and_branch = 2;
8032 /* If more than one condition is present to control the loop, then
8033 do not proceed, as this function does not know how to rewrite
8034 loop tests with more than one condition.
8036 Look backwards from the first insn in the last comparison
8037 sequence and see if we've got another comparison sequence. */
8040 if ((jump1 = prev_nonnote_insn (first_compare)) != loop->cont)
8041 if (GET_CODE (jump1) == JUMP_INSN)
8045 /* Check all of the bivs to see if the compare uses one of them.
8046 Skip biv's set more than once because we can't guarantee that
8047 it will be zero on the last iteration. Also skip if the biv is
8048 used between its update and the test insn. */
8050 for (bl = loop_iv_list; bl; bl = bl->next)
8052 if (bl->biv_count == 1
8053 && ! bl->biv->maybe_multiple
8054 && bl->biv->dest_reg == XEXP (comparison, 0)
8055 && ! reg_used_between_p (regno_reg_rtx[bl->regno], bl->biv->insn,
8063 /* Look for the case where the basic induction variable is always
8064 nonnegative, and equals zero on the last iteration.
8065 In this case, add a reg_note REG_NONNEG, which allows the
8066 m68k DBRA instruction to be used. */
8068 if (((GET_CODE (comparison) == GT
8069 && GET_CODE (XEXP (comparison, 1)) == CONST_INT
8070 && INTVAL (XEXP (comparison, 1)) == -1)
8071 || (GET_CODE (comparison) == NE && XEXP (comparison, 1) == const0_rtx))
8072 && GET_CODE (bl->biv->add_val) == CONST_INT
8073 && INTVAL (bl->biv->add_val) < 0)
8075 /* Initial value must be greater than 0,
8076 init_val % -dec_value == 0 to ensure that it equals zero on
8077 the last iteration */
8079 if (GET_CODE (bl->initial_value) == CONST_INT
8080 && INTVAL (bl->initial_value) > 0
8081 && (INTVAL (bl->initial_value)
8082 % (-INTVAL (bl->biv->add_val))) == 0)
8084 /* register always nonnegative, add REG_NOTE to branch */
8085 if (! find_reg_note (jump, REG_NONNEG, NULL_RTX))
8087 = gen_rtx_EXPR_LIST (REG_NONNEG, bl->biv->dest_reg,
8094 /* If the decrement is 1 and the value was tested as >= 0 before
8095 the loop, then we can safely optimize. */
8096 for (p = loop_start; p; p = PREV_INSN (p))
8098 if (GET_CODE (p) == CODE_LABEL)
8100 if (GET_CODE (p) != JUMP_INSN)
8103 before_comparison = get_condition_for_loop (loop, p);
8104 if (before_comparison
8105 && XEXP (before_comparison, 0) == bl->biv->dest_reg
8106 && GET_CODE (before_comparison) == LT
8107 && XEXP (before_comparison, 1) == const0_rtx
8108 && ! reg_set_between_p (bl->biv->dest_reg, p, loop_start)
8109 && INTVAL (bl->biv->add_val) == -1)
8111 if (! find_reg_note (jump, REG_NONNEG, NULL_RTX))
8113 = gen_rtx_EXPR_LIST (REG_NONNEG, bl->biv->dest_reg,
8121 else if (GET_CODE (bl->biv->add_val) == CONST_INT
8122 && INTVAL (bl->biv->add_val) > 0)
8124 /* Try to change inc to dec, so can apply above optimization. */
8126 all registers modified are induction variables or invariant,
8127 all memory references have non-overlapping addresses
8128 (obviously true if only one write)
8129 allow 2 insns for the compare/jump at the end of the loop. */
8130 /* Also, we must avoid any instructions which use both the reversed
8131 biv and another biv. Such instructions will fail if the loop is
8132 reversed. We meet this condition by requiring that either
8133 no_use_except_counting is true, or else that there is only
8135 int num_nonfixed_reads = 0;
8136 /* 1 if the iteration var is used only to count iterations. */
8137 int no_use_except_counting = 0;
8138 /* 1 if the loop has no memory store, or it has a single memory store
8139 which is reversible. */
8140 int reversible_mem_store = 1;
8142 if (bl->giv_count == 0 && ! loop->exit_count)
8144 rtx bivreg = regno_reg_rtx[bl->regno];
8146 /* If there are no givs for this biv, and the only exit is the
8147 fall through at the end of the loop, then
8148 see if perhaps there are no uses except to count. */
8149 no_use_except_counting = 1;
8150 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
8153 rtx set = single_set (p);
8155 if (set && GET_CODE (SET_DEST (set)) == REG
8156 && REGNO (SET_DEST (set)) == bl->regno)
8157 /* An insn that sets the biv is okay. */
8159 else if ((p == prev_nonnote_insn (prev_nonnote_insn (loop_end))
8160 || p == prev_nonnote_insn (loop_end))
8161 && reg_mentioned_p (bivreg, PATTERN (p)))
8163 /* If either of these insns uses the biv and sets a pseudo
8164 that has more than one usage, then the biv has uses
8165 other than counting since it's used to derive a value
8166 that is used more than one time. */
8167 note_stores (PATTERN (p), note_set_pseudo_multiple_uses,
8169 if (regs->multiple_uses)
8171 no_use_except_counting = 0;
8175 else if (reg_mentioned_p (bivreg, PATTERN (p)))
8177 no_use_except_counting = 0;
8183 if (no_use_except_counting)
8184 /* No need to worry about MEMs. */
8186 else if (loop_info->num_mem_sets <= 1)
8188 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
8190 num_nonfixed_reads += count_nonfixed_reads (loop, PATTERN (p));
8192 /* If the loop has a single store, and the destination address is
8193 invariant, then we can't reverse the loop, because this address
8194 might then have the wrong value at loop exit.
8195 This would work if the source was invariant also, however, in that
8196 case, the insn should have been moved out of the loop. */
8198 if (loop_info->num_mem_sets == 1)
8200 struct induction *v;
8202 reversible_mem_store
8203 = (! loop_info->unknown_address_altered
8204 && ! loop_info->unknown_constant_address_altered
8205 && ! loop_invariant_p (loop,
8206 XEXP (XEXP (loop_info->store_mems, 0),
8209 /* If the store depends on a register that is set after the
8210 store, it depends on the initial value, and is thus not
8212 for (v = bl->giv; reversible_mem_store && v; v = v->next_iv)
8214 if (v->giv_type == DEST_REG
8215 && reg_mentioned_p (v->dest_reg,
8216 PATTERN (loop_info->first_loop_store_insn))
8217 && loop_insn_first_p (loop_info->first_loop_store_insn,
8219 reversible_mem_store = 0;
8226 /* This code only acts for innermost loops. Also it simplifies
8227 the memory address check by only reversing loops with
8228 zero or one memory access.
8229 Two memory accesses could involve parts of the same array,
8230 and that can't be reversed.
8231 If the biv is used only for counting, than we don't need to worry
8232 about all these things. */
8234 if ((num_nonfixed_reads <= 1
8235 && ! loop_info->has_call
8236 && ! loop_info->has_volatile
8237 && reversible_mem_store
8238 && (bl->giv_count + bl->biv_count + loop_info->num_mem_sets
8239 + the_movables.num + compare_and_branch == insn_count)
8240 && (bl == loop_iv_list && bl->next == 0))
8241 || no_use_except_counting)
8245 /* Loop can be reversed. */
8246 if (loop_dump_stream)
8247 fprintf (loop_dump_stream, "Can reverse loop\n");
8249 /* Now check other conditions:
8251 The increment must be a constant, as must the initial value,
8252 and the comparison code must be LT.
8254 This test can probably be improved since +/- 1 in the constant
8255 can be obtained by changing LT to LE and vice versa; this is
8259 /* for constants, LE gets turned into LT */
8260 && (GET_CODE (comparison) == LT
8261 || (GET_CODE (comparison) == LE
8262 && no_use_except_counting)))
8264 HOST_WIDE_INT add_val, add_adjust, comparison_val = 0;
8265 rtx initial_value, comparison_value;
8267 enum rtx_code cmp_code;
8268 int comparison_const_width;
8269 unsigned HOST_WIDE_INT comparison_sign_mask;
8271 add_val = INTVAL (bl->biv->add_val);
8272 comparison_value = XEXP (comparison, 1);
8273 if (GET_MODE (comparison_value) == VOIDmode)
8274 comparison_const_width
8275 = GET_MODE_BITSIZE (GET_MODE (XEXP (comparison, 0)));
8277 comparison_const_width
8278 = GET_MODE_BITSIZE (GET_MODE (comparison_value));
8279 if (comparison_const_width > HOST_BITS_PER_WIDE_INT)
8280 comparison_const_width = HOST_BITS_PER_WIDE_INT;
8281 comparison_sign_mask
8282 = (unsigned HOST_WIDE_INT) 1 << (comparison_const_width - 1);
8284 /* If the comparison value is not a loop invariant, then we
8285 can not reverse this loop.
8287 ??? If the insns which initialize the comparison value as
8288 a whole compute an invariant result, then we could move
8289 them out of the loop and proceed with loop reversal. */
8290 if (! loop_invariant_p (loop, comparison_value))
8293 if (GET_CODE (comparison_value) == CONST_INT)
8294 comparison_val = INTVAL (comparison_value);
8295 initial_value = bl->initial_value;
8297 /* Normalize the initial value if it is an integer and
8298 has no other use except as a counter. This will allow
8299 a few more loops to be reversed. */
8300 if (no_use_except_counting
8301 && GET_CODE (comparison_value) == CONST_INT
8302 && GET_CODE (initial_value) == CONST_INT)
8304 comparison_val = comparison_val - INTVAL (bl->initial_value);
8305 /* The code below requires comparison_val to be a multiple
8306 of add_val in order to do the loop reversal, so
8307 round up comparison_val to a multiple of add_val.
8308 Since comparison_value is constant, we know that the
8309 current comparison code is LT. */
8310 comparison_val = comparison_val + add_val - 1;
8312 -= (unsigned HOST_WIDE_INT) comparison_val % add_val;
8313 /* We postpone overflow checks for COMPARISON_VAL here;
8314 even if there is an overflow, we might still be able to
8315 reverse the loop, if converting the loop exit test to
8317 initial_value = const0_rtx;
8320 /* First check if we can do a vanilla loop reversal. */
8321 if (initial_value == const0_rtx
8322 /* If we have a decrement_and_branch_on_count,
8323 prefer the NE test, since this will allow that
8324 instruction to be generated. Note that we must
8325 use a vanilla loop reversal if the biv is used to
8326 calculate a giv or has a non-counting use. */
8327 #if ! defined (HAVE_decrement_and_branch_until_zero) \
8328 && defined (HAVE_decrement_and_branch_on_count)
8329 && (! (add_val == 1 && loop->vtop
8330 && (bl->biv_count == 0
8331 || no_use_except_counting)))
8333 && GET_CODE (comparison_value) == CONST_INT
8334 /* Now do postponed overflow checks on COMPARISON_VAL. */
8335 && ! (((comparison_val - add_val) ^ INTVAL (comparison_value))
8336 & comparison_sign_mask))
8338 /* Register will always be nonnegative, with value
8339 0 on last iteration */
8340 add_adjust = add_val;
8344 else if (add_val == 1 && loop->vtop
8345 && (bl->biv_count == 0
8346 || no_use_except_counting))
8354 if (GET_CODE (comparison) == LE)
8355 add_adjust -= add_val;
8357 /* If the initial value is not zero, or if the comparison
8358 value is not an exact multiple of the increment, then we
8359 can not reverse this loop. */
8360 if (initial_value == const0_rtx
8361 && GET_CODE (comparison_value) == CONST_INT)
8363 if (((unsigned HOST_WIDE_INT) comparison_val % add_val) != 0)
8368 if (! no_use_except_counting || add_val != 1)
8372 final_value = comparison_value;
8374 /* Reset these in case we normalized the initial value
8375 and comparison value above. */
8376 if (GET_CODE (comparison_value) == CONST_INT
8377 && GET_CODE (initial_value) == CONST_INT)
8379 comparison_value = GEN_INT (comparison_val);
8381 = GEN_INT (comparison_val + INTVAL (bl->initial_value));
8383 bl->initial_value = initial_value;
8385 /* Save some info needed to produce the new insns. */
8386 reg = bl->biv->dest_reg;
8387 jump_label = XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end))), 1);
8388 if (jump_label == pc_rtx)
8389 jump_label = XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end))), 2);
8390 new_add_val = GEN_INT (- INTVAL (bl->biv->add_val));
8392 /* Set start_value; if this is not a CONST_INT, we need
8394 Initialize biv to start_value before loop start.
8395 The old initializing insn will be deleted as a
8396 dead store by flow.c. */
8397 if (initial_value == const0_rtx
8398 && GET_CODE (comparison_value) == CONST_INT)
8400 start_value = GEN_INT (comparison_val - add_adjust);
8401 emit_insn_before (gen_move_insn (reg, start_value),
8404 else if (GET_CODE (initial_value) == CONST_INT)
8406 rtx offset = GEN_INT (-INTVAL (initial_value) - add_adjust);
8407 enum machine_mode mode = GET_MODE (reg);
8408 enum insn_code icode
8409 = add_optab->handlers[(int) mode].insn_code;
8411 if (! (*insn_data[icode].operand[0].predicate) (reg, mode)
8412 || ! ((*insn_data[icode].operand[1].predicate)
8413 (comparison_value, mode))
8414 || ! ((*insn_data[icode].operand[2].predicate)
8418 = gen_rtx_PLUS (mode, comparison_value, offset);
8419 emit_insn_before ((GEN_FCN (icode)
8420 (reg, comparison_value, offset)),
8422 if (GET_CODE (comparison) == LE)
8423 final_value = gen_rtx_PLUS (mode, comparison_value,
8426 else if (! add_adjust)
8428 enum machine_mode mode = GET_MODE (reg);
8429 enum insn_code icode
8430 = sub_optab->handlers[(int) mode].insn_code;
8431 if (! (*insn_data[icode].operand[0].predicate) (reg, mode)
8432 || ! ((*insn_data[icode].operand[1].predicate)
8433 (comparison_value, mode))
8434 || ! ((*insn_data[icode].operand[2].predicate)
8435 (initial_value, mode)))
8438 = gen_rtx_MINUS (mode, comparison_value, initial_value);
8439 emit_insn_before ((GEN_FCN (icode)
8440 (reg, comparison_value, initial_value)),
8444 /* We could handle the other cases too, but it'll be
8445 better to have a testcase first. */
8448 /* We may not have a single insn which can increment a reg, so
8449 create a sequence to hold all the insns from expand_inc. */
8451 expand_inc (reg, new_add_val);
8452 tem = gen_sequence ();
8455 p = emit_insn_before (tem, bl->biv->insn);
8456 delete_insn (bl->biv->insn);
8458 /* Update biv info to reflect its new status. */
8460 bl->initial_value = start_value;
8461 bl->biv->add_val = new_add_val;
8463 /* Update loop info. */
8464 loop_info->initial_value = reg;
8465 loop_info->initial_equiv_value = reg;
8466 loop_info->final_value = const0_rtx;
8467 loop_info->final_equiv_value = const0_rtx;
8468 loop_info->comparison_value = const0_rtx;
8469 loop_info->comparison_code = cmp_code;
8470 loop_info->increment = new_add_val;
8472 /* Inc LABEL_NUSES so that delete_insn will
8473 not delete the label. */
8474 LABEL_NUSES (XEXP (jump_label, 0)) ++;
8476 /* Emit an insn after the end of the loop to set the biv's
8477 proper exit value if it is used anywhere outside the loop. */
8478 if ((REGNO_LAST_UID (bl->regno) != INSN_UID (first_compare))
8480 || REGNO_FIRST_UID (bl->regno) != INSN_UID (bl->init_insn))
8481 emit_insn_after (gen_move_insn (reg, final_value),
8484 /* Delete compare/branch at end of loop. */
8485 delete_insn (PREV_INSN (loop_end));
8486 if (compare_and_branch == 2)
8487 delete_insn (first_compare);
8489 /* Add new compare/branch insn at end of loop. */
8491 emit_cmp_and_jump_insns (reg, const0_rtx, cmp_code, NULL_RTX,
8492 GET_MODE (reg), 0, 0,
8493 XEXP (jump_label, 0));
8494 tem = gen_sequence ();
8496 emit_jump_insn_before (tem, loop_end);
8498 for (tem = PREV_INSN (loop_end);
8499 tem && GET_CODE (tem) != JUMP_INSN;
8500 tem = PREV_INSN (tem))
8504 JUMP_LABEL (tem) = XEXP (jump_label, 0);
8510 /* Increment of LABEL_NUSES done above. */
8511 /* Register is now always nonnegative,
8512 so add REG_NONNEG note to the branch. */
8513 REG_NOTES (tem) = gen_rtx_EXPR_LIST (REG_NONNEG, reg,
8519 /* No insn may reference both the reversed and another biv or it
8520 will fail (see comment near the top of the loop reversal
8522 Earlier on, we have verified that the biv has no use except
8523 counting, or it is the only biv in this function.
8524 However, the code that computes no_use_except_counting does
8525 not verify reg notes. It's possible to have an insn that
8526 references another biv, and has a REG_EQUAL note with an
8527 expression based on the reversed biv. To avoid this case,
8528 remove all REG_EQUAL notes based on the reversed biv
8530 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
8534 rtx set = single_set (p);
8535 /* If this is a set of a GIV based on the reversed biv, any
8536 REG_EQUAL notes should still be correct. */
8538 || GET_CODE (SET_DEST (set)) != REG
8539 || (size_t) REGNO (SET_DEST (set)) >= reg_iv_type->num_elements
8540 || REG_IV_TYPE (REGNO (SET_DEST (set))) != GENERAL_INDUCT
8541 || REG_IV_INFO (REGNO (SET_DEST (set)))->src_reg != bl->biv->src_reg)
8542 for (pnote = ®_NOTES (p); *pnote;)
8544 if (REG_NOTE_KIND (*pnote) == REG_EQUAL
8545 && reg_mentioned_p (regno_reg_rtx[bl->regno],
8547 *pnote = XEXP (*pnote, 1);
8549 pnote = &XEXP (*pnote, 1);
8553 /* Mark that this biv has been reversed. Each giv which depends
8554 on this biv, and which is also live past the end of the loop
8555 will have to be fixed up. */
8559 if (loop_dump_stream)
8561 fprintf (loop_dump_stream, "Reversed loop");
8563 fprintf (loop_dump_stream, " and added reg_nonneg\n");
8565 fprintf (loop_dump_stream, "\n");
8576 /* Verify whether the biv BL appears to be eliminable,
8577 based on the insns in the loop that refer to it.
8579 If ELIMINATE_P is non-zero, actually do the elimination.
8581 THRESHOLD and INSN_COUNT are from loop_optimize and are used to
8582 determine whether invariant insns should be placed inside or at the
8583 start of the loop. */
8586 maybe_eliminate_biv (loop, bl, eliminate_p, threshold, insn_count)
8587 const struct loop *loop;
8588 struct iv_class *bl;
8590 int threshold, insn_count;
8592 rtx reg = bl->biv->dest_reg;
8593 rtx loop_start = loop->start;
8594 rtx loop_end = loop->end;
8597 /* Scan all insns in the loop, stopping if we find one that uses the
8598 biv in a way that we cannot eliminate. */
8600 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
8602 enum rtx_code code = GET_CODE (p);
8603 rtx where = threshold >= insn_count ? loop_start : p;
8605 /* If this is a libcall that sets a giv, skip ahead to its end. */
8606 if (GET_RTX_CLASS (code) == 'i')
8608 rtx note = find_reg_note (p, REG_LIBCALL, NULL_RTX);
8612 rtx last = XEXP (note, 0);
8613 rtx set = single_set (last);
8615 if (set && GET_CODE (SET_DEST (set)) == REG)
8617 unsigned int regno = REGNO (SET_DEST (set));
8619 if (regno < max_reg_before_loop
8620 && REG_IV_TYPE (regno) == GENERAL_INDUCT
8621 && REG_IV_INFO (regno)->src_reg == bl->biv->src_reg)
8626 if ((code == INSN || code == JUMP_INSN || code == CALL_INSN)
8627 && reg_mentioned_p (reg, PATTERN (p))
8628 && ! maybe_eliminate_biv_1 (loop, PATTERN (p), p, bl,
8629 eliminate_p, where))
8631 if (loop_dump_stream)
8632 fprintf (loop_dump_stream,
8633 "Cannot eliminate biv %d: biv used in insn %d.\n",
8634 bl->regno, INSN_UID (p));
8641 if (loop_dump_stream)
8642 fprintf (loop_dump_stream, "biv %d %s eliminated.\n",
8643 bl->regno, eliminate_p ? "was" : "can be");
8650 /* INSN and REFERENCE are instructions in the same insn chain.
8651 Return non-zero if INSN is first. */
8654 loop_insn_first_p (insn, reference)
8655 rtx insn, reference;
8659 for (p = insn, q = reference;;)
8661 /* Start with test for not first so that INSN == REFERENCE yields not
8663 if (q == insn || ! p)
8665 if (p == reference || ! q)
8668 /* Either of P or Q might be a NOTE. Notes have the same LUID as the
8669 previous insn, hence the <= comparison below does not work if
8671 if (INSN_UID (p) < max_uid_for_loop
8672 && INSN_UID (q) < max_uid_for_loop
8673 && GET_CODE (p) != NOTE)
8674 return INSN_LUID (p) <= INSN_LUID (q);
8676 if (INSN_UID (p) >= max_uid_for_loop
8677 || GET_CODE (p) == NOTE)
8679 if (INSN_UID (q) >= max_uid_for_loop)
8684 /* We are trying to eliminate BIV in INSN using GIV. Return non-zero if
8685 the offset that we have to take into account due to auto-increment /
8686 div derivation is zero. */
8688 biv_elimination_giv_has_0_offset (biv, giv, insn)
8689 struct induction *biv, *giv;
8692 /* If the giv V had the auto-inc address optimization applied
8693 to it, and INSN occurs between the giv insn and the biv
8694 insn, then we'd have to adjust the value used here.
8695 This is rare, so we don't bother to make this possible. */
8696 if (giv->auto_inc_opt
8697 && ((loop_insn_first_p (giv->insn, insn)
8698 && loop_insn_first_p (insn, biv->insn))
8699 || (loop_insn_first_p (biv->insn, insn)
8700 && loop_insn_first_p (insn, giv->insn))))
8703 /* If the giv V was derived from another giv, and INSN does
8704 not occur between the giv insn and the biv insn, then we'd
8705 have to adjust the value used here. This is rare, so we don't
8706 bother to make this possible. */
8707 if (giv->derived_from
8708 && ! (giv->always_executed
8709 && loop_insn_first_p (giv->insn, insn)
8710 && loop_insn_first_p (insn, biv->insn)))
8713 && giv->same->derived_from
8714 && ! (giv->same->always_executed
8715 && loop_insn_first_p (giv->same->insn, insn)
8716 && loop_insn_first_p (insn, biv->insn)))
8722 /* If BL appears in X (part of the pattern of INSN), see if we can
8723 eliminate its use. If so, return 1. If not, return 0.
8725 If BIV does not appear in X, return 1.
8727 If ELIMINATE_P is non-zero, actually do the elimination. WHERE indicates
8728 where extra insns should be added. Depending on how many items have been
8729 moved out of the loop, it will either be before INSN or at the start of
8733 maybe_eliminate_biv_1 (loop, x, insn, bl, eliminate_p, where)
8734 const struct loop *loop;
8736 struct iv_class *bl;
8740 enum rtx_code code = GET_CODE (x);
8741 rtx reg = bl->biv->dest_reg;
8742 enum machine_mode mode = GET_MODE (reg);
8743 struct induction *v;
8755 /* If we haven't already been able to do something with this BIV,
8756 we can't eliminate it. */
8762 /* If this sets the BIV, it is not a problem. */
8763 if (SET_DEST (x) == reg)
8766 /* If this is an insn that defines a giv, it is also ok because
8767 it will go away when the giv is reduced. */
8768 for (v = bl->giv; v; v = v->next_iv)
8769 if (v->giv_type == DEST_REG && SET_DEST (x) == v->dest_reg)
8773 if (SET_DEST (x) == cc0_rtx && SET_SRC (x) == reg)
8775 /* Can replace with any giv that was reduced and
8776 that has (MULT_VAL != 0) and (ADD_VAL == 0).
8777 Require a constant for MULT_VAL, so we know it's nonzero.
8778 ??? We disable this optimization to avoid potential
8781 for (v = bl->giv; v; v = v->next_iv)
8782 if (GET_CODE (v->mult_val) == CONST_INT && v->mult_val != const0_rtx
8783 && v->add_val == const0_rtx
8784 && ! v->ignore && ! v->maybe_dead && v->always_computable
8788 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8794 /* If the giv has the opposite direction of change,
8795 then reverse the comparison. */
8796 if (INTVAL (v->mult_val) < 0)
8797 new = gen_rtx_COMPARE (GET_MODE (v->new_reg),
8798 const0_rtx, v->new_reg);
8802 /* We can probably test that giv's reduced reg. */
8803 if (validate_change (insn, &SET_SRC (x), new, 0))
8807 /* Look for a giv with (MULT_VAL != 0) and (ADD_VAL != 0);
8808 replace test insn with a compare insn (cmp REDUCED_GIV ADD_VAL).
8809 Require a constant for MULT_VAL, so we know it's nonzero.
8810 ??? Do this only if ADD_VAL is a pointer to avoid a potential
8811 overflow problem. */
8813 for (v = bl->giv; v; v = v->next_iv)
8814 if (GET_CODE (v->mult_val) == CONST_INT
8815 && v->mult_val != const0_rtx
8816 && ! v->ignore && ! v->maybe_dead && v->always_computable
8818 && (GET_CODE (v->add_val) == SYMBOL_REF
8819 || GET_CODE (v->add_val) == LABEL_REF
8820 || GET_CODE (v->add_val) == CONST
8821 || (GET_CODE (v->add_val) == REG
8822 && REGNO_POINTER_FLAG (REGNO (v->add_val)))))
8824 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8830 /* If the giv has the opposite direction of change,
8831 then reverse the comparison. */
8832 if (INTVAL (v->mult_val) < 0)
8833 new = gen_rtx_COMPARE (VOIDmode, copy_rtx (v->add_val),
8836 new = gen_rtx_COMPARE (VOIDmode, v->new_reg,
8837 copy_rtx (v->add_val));
8839 /* Replace biv with the giv's reduced register. */
8840 update_reg_last_use (v->add_val, insn);
8841 if (validate_change (insn, &SET_SRC (PATTERN (insn)), new, 0))
8844 /* Insn doesn't support that constant or invariant. Copy it
8845 into a register (it will be a loop invariant.) */
8846 tem = gen_reg_rtx (GET_MODE (v->new_reg));
8848 emit_insn_before (gen_move_insn (tem, copy_rtx (v->add_val)),
8851 /* Substitute the new register for its invariant value in
8852 the compare expression. */
8853 XEXP (new, (INTVAL (v->mult_val) < 0) ? 0 : 1) = tem;
8854 if (validate_change (insn, &SET_SRC (PATTERN (insn)), new, 0))
8863 case GT: case GE: case GTU: case GEU:
8864 case LT: case LE: case LTU: case LEU:
8865 /* See if either argument is the biv. */
8866 if (XEXP (x, 0) == reg)
8867 arg = XEXP (x, 1), arg_operand = 1;
8868 else if (XEXP (x, 1) == reg)
8869 arg = XEXP (x, 0), arg_operand = 0;
8873 if (CONSTANT_P (arg))
8875 /* First try to replace with any giv that has constant positive
8876 mult_val and constant add_val. We might be able to support
8877 negative mult_val, but it seems complex to do it in general. */
8879 for (v = bl->giv; v; v = v->next_iv)
8880 if (GET_CODE (v->mult_val) == CONST_INT
8881 && INTVAL (v->mult_val) > 0
8882 && (GET_CODE (v->add_val) == SYMBOL_REF
8883 || GET_CODE (v->add_val) == LABEL_REF
8884 || GET_CODE (v->add_val) == CONST
8885 || (GET_CODE (v->add_val) == REG
8886 && REGNO_POINTER_FLAG (REGNO (v->add_val))))
8887 && ! v->ignore && ! v->maybe_dead && v->always_computable
8890 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8896 /* Replace biv with the giv's reduced reg. */
8897 validate_change (insn, &XEXP (x, 1 - arg_operand), v->new_reg, 1);
8899 /* If all constants are actually constant integers and
8900 the derived constant can be directly placed in the COMPARE,
8902 if (GET_CODE (arg) == CONST_INT
8903 && GET_CODE (v->mult_val) == CONST_INT
8904 && GET_CODE (v->add_val) == CONST_INT)
8906 validate_change (insn, &XEXP (x, arg_operand),
8907 GEN_INT (INTVAL (arg)
8908 * INTVAL (v->mult_val)
8909 + INTVAL (v->add_val)), 1);
8913 /* Otherwise, load it into a register. */
8914 tem = gen_reg_rtx (mode);
8915 emit_iv_add_mult (arg, v->mult_val, v->add_val, tem, where);
8916 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
8918 if (apply_change_group ())
8922 /* Look for giv with positive constant mult_val and nonconst add_val.
8923 Insert insns to calculate new compare value.
8924 ??? Turn this off due to possible overflow. */
8926 for (v = bl->giv; v; v = v->next_iv)
8927 if (GET_CODE (v->mult_val) == CONST_INT
8928 && INTVAL (v->mult_val) > 0
8929 && ! v->ignore && ! v->maybe_dead && v->always_computable
8935 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8941 tem = gen_reg_rtx (mode);
8943 /* Replace biv with giv's reduced register. */
8944 validate_change (insn, &XEXP (x, 1 - arg_operand),
8947 /* Compute value to compare against. */
8948 emit_iv_add_mult (arg, v->mult_val, v->add_val, tem, where);
8949 /* Use it in this insn. */
8950 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
8951 if (apply_change_group ())
8955 else if (GET_CODE (arg) == REG || GET_CODE (arg) == MEM)
8957 if (loop_invariant_p (loop, arg) == 1)
8959 /* Look for giv with constant positive mult_val and nonconst
8960 add_val. Insert insns to compute new compare value.
8961 ??? Turn this off due to possible overflow. */
8963 for (v = bl->giv; v; v = v->next_iv)
8964 if (GET_CODE (v->mult_val) == CONST_INT && INTVAL (v->mult_val) > 0
8965 && ! v->ignore && ! v->maybe_dead && v->always_computable
8971 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8977 tem = gen_reg_rtx (mode);
8979 /* Replace biv with giv's reduced register. */
8980 validate_change (insn, &XEXP (x, 1 - arg_operand),
8983 /* Compute value to compare against. */
8984 emit_iv_add_mult (arg, v->mult_val, v->add_val,
8986 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
8987 if (apply_change_group ())
8992 /* This code has problems. Basically, you can't know when
8993 seeing if we will eliminate BL, whether a particular giv
8994 of ARG will be reduced. If it isn't going to be reduced,
8995 we can't eliminate BL. We can try forcing it to be reduced,
8996 but that can generate poor code.
8998 The problem is that the benefit of reducing TV, below should
8999 be increased if BL can actually be eliminated, but this means
9000 we might have to do a topological sort of the order in which
9001 we try to process biv. It doesn't seem worthwhile to do
9002 this sort of thing now. */
9005 /* Otherwise the reg compared with had better be a biv. */
9006 if (GET_CODE (arg) != REG
9007 || REG_IV_TYPE (REGNO (arg)) != BASIC_INDUCT)
9010 /* Look for a pair of givs, one for each biv,
9011 with identical coefficients. */
9012 for (v = bl->giv; v; v = v->next_iv)
9014 struct induction *tv;
9016 if (v->ignore || v->maybe_dead || v->mode != mode)
9019 for (tv = reg_biv_class[REGNO (arg)]->giv; tv; tv = tv->next_iv)
9020 if (! tv->ignore && ! tv->maybe_dead
9021 && rtx_equal_p (tv->mult_val, v->mult_val)
9022 && rtx_equal_p (tv->add_val, v->add_val)
9023 && tv->mode == mode)
9025 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
9031 /* Replace biv with its giv's reduced reg. */
9032 XEXP (x, 1 - arg_operand) = v->new_reg;
9033 /* Replace other operand with the other giv's
9035 XEXP (x, arg_operand) = tv->new_reg;
9042 /* If we get here, the biv can't be eliminated. */
9046 /* If this address is a DEST_ADDR giv, it doesn't matter if the
9047 biv is used in it, since it will be replaced. */
9048 for (v = bl->giv; v; v = v->next_iv)
9049 if (v->giv_type == DEST_ADDR && v->location == &XEXP (x, 0))
9057 /* See if any subexpression fails elimination. */
9058 fmt = GET_RTX_FORMAT (code);
9059 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
9064 if (! maybe_eliminate_biv_1 (loop, XEXP (x, i), insn, bl,
9065 eliminate_p, where))
9070 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
9071 if (! maybe_eliminate_biv_1 (loop, XVECEXP (x, i, j), insn, bl,
9072 eliminate_p, where))
9081 /* Return nonzero if the last use of REG
9082 is in an insn following INSN in the same basic block. */
9085 last_use_this_basic_block (reg, insn)
9091 n && GET_CODE (n) != CODE_LABEL && GET_CODE (n) != JUMP_INSN;
9094 if (REGNO_LAST_UID (REGNO (reg)) == INSN_UID (n))
9100 /* Called via `note_stores' to record the initial value of a biv. Here we
9101 just record the location of the set and process it later. */
9104 record_initial (dest, set, data)
9107 void *data ATTRIBUTE_UNUSED;
9109 struct iv_class *bl;
9111 if (GET_CODE (dest) != REG
9112 || REGNO (dest) >= max_reg_before_loop
9113 || REG_IV_TYPE (REGNO (dest)) != BASIC_INDUCT)
9116 bl = reg_biv_class[REGNO (dest)];
9118 /* If this is the first set found, record it. */
9119 if (bl->init_insn == 0)
9121 bl->init_insn = note_insn;
9126 /* If any of the registers in X are "old" and currently have a last use earlier
9127 than INSN, update them to have a last use of INSN. Their actual last use
9128 will be the previous insn but it will not have a valid uid_luid so we can't
9132 update_reg_last_use (x, insn)
9136 /* Check for the case where INSN does not have a valid luid. In this case,
9137 there is no need to modify the regno_last_uid, as this can only happen
9138 when code is inserted after the loop_end to set a pseudo's final value,
9139 and hence this insn will never be the last use of x. */
9140 if (GET_CODE (x) == REG && REGNO (x) < max_reg_before_loop
9141 && INSN_UID (insn) < max_uid_for_loop
9142 && uid_luid[REGNO_LAST_UID (REGNO (x))] < uid_luid[INSN_UID (insn)])
9143 REGNO_LAST_UID (REGNO (x)) = INSN_UID (insn);
9147 register const char *fmt = GET_RTX_FORMAT (GET_CODE (x));
9148 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
9151 update_reg_last_use (XEXP (x, i), insn);
9152 else if (fmt[i] == 'E')
9153 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
9154 update_reg_last_use (XVECEXP (x, i, j), insn);
9159 /* Given an insn INSN and condition COND, return the condition in a
9160 canonical form to simplify testing by callers. Specifically:
9162 (1) The code will always be a comparison operation (EQ, NE, GT, etc.).
9163 (2) Both operands will be machine operands; (cc0) will have been replaced.
9164 (3) If an operand is a constant, it will be the second operand.
9165 (4) (LE x const) will be replaced with (LT x <const+1>) and similarly
9166 for GE, GEU, and LEU.
9168 If the condition cannot be understood, or is an inequality floating-point
9169 comparison which needs to be reversed, 0 will be returned.
9171 If REVERSE is non-zero, then reverse the condition prior to canonizing it.
9173 If EARLIEST is non-zero, it is a pointer to a place where the earliest
9174 insn used in locating the condition was found. If a replacement test
9175 of the condition is desired, it should be placed in front of that
9176 insn and we will be sure that the inputs are still valid.
9178 If WANT_REG is non-zero, we wish the condition to be relative to that
9179 register, if possible. Therefore, do not canonicalize the condition
9183 canonicalize_condition (insn, cond, reverse, earliest, want_reg)
9195 int reverse_code = 0;
9196 int did_reverse_condition = 0;
9197 enum machine_mode mode;
9199 code = GET_CODE (cond);
9200 mode = GET_MODE (cond);
9201 op0 = XEXP (cond, 0);
9202 op1 = XEXP (cond, 1);
9206 code = reverse_condition (code);
9207 did_reverse_condition ^= 1;
9213 /* If we are comparing a register with zero, see if the register is set
9214 in the previous insn to a COMPARE or a comparison operation. Perform
9215 the same tests as a function of STORE_FLAG_VALUE as find_comparison_args
9218 while (GET_RTX_CLASS (code) == '<'
9219 && op1 == CONST0_RTX (GET_MODE (op0))
9222 /* Set non-zero when we find something of interest. */
9226 /* If comparison with cc0, import actual comparison from compare
9230 if ((prev = prev_nonnote_insn (prev)) == 0
9231 || GET_CODE (prev) != INSN
9232 || (set = single_set (prev)) == 0
9233 || SET_DEST (set) != cc0_rtx)
9236 op0 = SET_SRC (set);
9237 op1 = CONST0_RTX (GET_MODE (op0));
9243 /* If this is a COMPARE, pick up the two things being compared. */
9244 if (GET_CODE (op0) == COMPARE)
9246 op1 = XEXP (op0, 1);
9247 op0 = XEXP (op0, 0);
9250 else if (GET_CODE (op0) != REG)
9253 /* Go back to the previous insn. Stop if it is not an INSN. We also
9254 stop if it isn't a single set or if it has a REG_INC note because
9255 we don't want to bother dealing with it. */
9257 if ((prev = prev_nonnote_insn (prev)) == 0
9258 || GET_CODE (prev) != INSN
9259 || FIND_REG_INC_NOTE (prev, 0)
9260 || (set = single_set (prev)) == 0)
9263 /* If this is setting OP0, get what it sets it to if it looks
9265 if (rtx_equal_p (SET_DEST (set), op0))
9267 enum machine_mode inner_mode = GET_MODE (SET_DEST (set));
9269 /* ??? We may not combine comparisons done in a CCmode with
9270 comparisons not done in a CCmode. This is to aid targets
9271 like Alpha that have an IEEE compliant EQ instruction, and
9272 a non-IEEE compliant BEQ instruction. The use of CCmode is
9273 actually artificial, simply to prevent the combination, but
9274 should not affect other platforms.
9276 However, we must allow VOIDmode comparisons to match either
9277 CCmode or non-CCmode comparison, because some ports have
9278 modeless comparisons inside branch patterns.
9280 ??? This mode check should perhaps look more like the mode check
9281 in simplify_comparison in combine. */
9283 if ((GET_CODE (SET_SRC (set)) == COMPARE
9286 && GET_MODE_CLASS (inner_mode) == MODE_INT
9287 && (GET_MODE_BITSIZE (inner_mode)
9288 <= HOST_BITS_PER_WIDE_INT)
9289 && (STORE_FLAG_VALUE
9290 & ((HOST_WIDE_INT) 1
9291 << (GET_MODE_BITSIZE (inner_mode) - 1))))
9292 #ifdef FLOAT_STORE_FLAG_VALUE
9294 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
9295 && (REAL_VALUE_NEGATIVE
9296 (FLOAT_STORE_FLAG_VALUE (inner_mode))))
9299 && GET_RTX_CLASS (GET_CODE (SET_SRC (set))) == '<'))
9300 && (((GET_MODE_CLASS (mode) == MODE_CC)
9301 == (GET_MODE_CLASS (inner_mode) == MODE_CC))
9302 || mode == VOIDmode || inner_mode == VOIDmode))
9304 else if (((code == EQ
9306 && (GET_MODE_BITSIZE (inner_mode)
9307 <= HOST_BITS_PER_WIDE_INT)
9308 && GET_MODE_CLASS (inner_mode) == MODE_INT
9309 && (STORE_FLAG_VALUE
9310 & ((HOST_WIDE_INT) 1
9311 << (GET_MODE_BITSIZE (inner_mode) - 1))))
9312 #ifdef FLOAT_STORE_FLAG_VALUE
9314 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
9315 && (REAL_VALUE_NEGATIVE
9316 (FLOAT_STORE_FLAG_VALUE (inner_mode))))
9319 && GET_RTX_CLASS (GET_CODE (SET_SRC (set))) == '<'
9320 && (((GET_MODE_CLASS (mode) == MODE_CC)
9321 == (GET_MODE_CLASS (inner_mode) == MODE_CC))
9322 || mode == VOIDmode || inner_mode == VOIDmode))
9325 /* We might have reversed a LT to get a GE here. But this wasn't
9326 actually the comparison of data, so we don't flag that we
9327 have had to reverse the condition. */
9328 did_reverse_condition ^= 1;
9336 else if (reg_set_p (op0, prev))
9337 /* If this sets OP0, but not directly, we have to give up. */
9342 if (GET_RTX_CLASS (GET_CODE (x)) == '<')
9343 code = GET_CODE (x);
9346 code = reverse_condition (code);
9347 if (code == UNKNOWN)
9349 did_reverse_condition ^= 1;
9353 op0 = XEXP (x, 0), op1 = XEXP (x, 1);
9359 /* If constant is first, put it last. */
9360 if (CONSTANT_P (op0))
9361 code = swap_condition (code), tem = op0, op0 = op1, op1 = tem;
9363 /* If OP0 is the result of a comparison, we weren't able to find what
9364 was really being compared, so fail. */
9365 if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_CC)
9368 /* Canonicalize any ordered comparison with integers involving equality
9369 if we can do computations in the relevant mode and we do not
9372 if (GET_CODE (op1) == CONST_INT
9373 && GET_MODE (op0) != VOIDmode
9374 && GET_MODE_BITSIZE (GET_MODE (op0)) <= HOST_BITS_PER_WIDE_INT)
9376 HOST_WIDE_INT const_val = INTVAL (op1);
9377 unsigned HOST_WIDE_INT uconst_val = const_val;
9378 unsigned HOST_WIDE_INT max_val
9379 = (unsigned HOST_WIDE_INT) GET_MODE_MASK (GET_MODE (op0));
9384 if ((unsigned HOST_WIDE_INT) const_val != max_val >> 1)
9385 code = LT, op1 = GEN_INT (const_val + 1);
9388 /* When cross-compiling, const_val might be sign-extended from
9389 BITS_PER_WORD to HOST_BITS_PER_WIDE_INT */
9391 if ((HOST_WIDE_INT) (const_val & max_val)
9392 != (((HOST_WIDE_INT) 1
9393 << (GET_MODE_BITSIZE (GET_MODE (op0)) - 1))))
9394 code = GT, op1 = GEN_INT (const_val - 1);
9398 if (uconst_val < max_val)
9399 code = LTU, op1 = GEN_INT (uconst_val + 1);
9403 if (uconst_val != 0)
9404 code = GTU, op1 = GEN_INT (uconst_val - 1);
9412 /* If this was floating-point and we reversed anything other than an
9413 EQ or NE or (UN)ORDERED, return zero. */
9414 if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT
9415 && did_reverse_condition
9416 && code != NE && code != EQ && code != UNORDERED && code != ORDERED
9418 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_FLOAT)
9422 /* Never return CC0; return zero instead. */
9427 return gen_rtx_fmt_ee (code, VOIDmode, op0, op1);
9430 /* Given a jump insn JUMP, return the condition that will cause it to branch
9431 to its JUMP_LABEL. If the condition cannot be understood, or is an
9432 inequality floating-point comparison which needs to be reversed, 0 will
9435 If EARLIEST is non-zero, it is a pointer to a place where the earliest
9436 insn used in locating the condition was found. If a replacement test
9437 of the condition is desired, it should be placed in front of that
9438 insn and we will be sure that the inputs are still valid. */
9441 get_condition (jump, earliest)
9449 /* If this is not a standard conditional jump, we can't parse it. */
9450 if (GET_CODE (jump) != JUMP_INSN
9451 || ! any_condjump_p (jump))
9453 set = pc_set (jump);
9455 cond = XEXP (SET_SRC (set), 0);
9457 /* If this branches to JUMP_LABEL when the condition is false, reverse
9460 = GET_CODE (XEXP (SET_SRC (set), 2)) == LABEL_REF
9461 && XEXP (XEXP (SET_SRC (set), 2), 0) == JUMP_LABEL (jump);
9463 return canonicalize_condition (jump, cond, reverse, earliest, NULL_RTX);
9466 /* Similar to above routine, except that we also put an invariant last
9467 unless both operands are invariants. */
9470 get_condition_for_loop (loop, x)
9471 const struct loop *loop;
9474 rtx comparison = get_condition (x, NULL_PTR);
9477 || ! loop_invariant_p (loop, XEXP (comparison, 0))
9478 || loop_invariant_p (loop, XEXP (comparison, 1)))
9481 return gen_rtx_fmt_ee (swap_condition (GET_CODE (comparison)), VOIDmode,
9482 XEXP (comparison, 1), XEXP (comparison, 0));
9485 /* Scan the function and determine whether it has indirect (computed) jumps.
9487 This is taken mostly from flow.c; similar code exists elsewhere
9488 in the compiler. It may be useful to put this into rtlanal.c. */
9490 indirect_jump_in_function_p (start)
9495 for (insn = start; insn; insn = NEXT_INSN (insn))
9496 if (computed_jump_p (insn))
9502 /* Add MEM to the LOOP_MEMS array, if appropriate. See the
9503 documentation for LOOP_MEMS for the definition of `appropriate'.
9504 This function is called from prescan_loop via for_each_rtx. */
9507 insert_loop_mem (mem, data)
9509 void *data ATTRIBUTE_UNUSED;
9511 struct loop_info *loop_info = data;
9518 switch (GET_CODE (m))
9524 /* We're not interested in MEMs that are only clobbered. */
9528 /* We're not interested in the MEM associated with a
9529 CONST_DOUBLE, so there's no need to traverse into this. */
9533 /* We're not interested in any MEMs that only appear in notes. */
9537 /* This is not a MEM. */
9541 /* See if we've already seen this MEM. */
9542 for (i = 0; i < loop_info->mems_idx; ++i)
9543 if (rtx_equal_p (m, loop_info->mems[i].mem))
9545 if (GET_MODE (m) != GET_MODE (loop_info->mems[i].mem))
9546 /* The modes of the two memory accesses are different. If
9547 this happens, something tricky is going on, and we just
9548 don't optimize accesses to this MEM. */
9549 loop_info->mems[i].optimize = 0;
9554 /* Resize the array, if necessary. */
9555 if (loop_info->mems_idx == loop_info->mems_allocated)
9557 if (loop_info->mems_allocated != 0)
9558 loop_info->mems_allocated *= 2;
9560 loop_info->mems_allocated = 32;
9562 loop_info->mems = (loop_mem_info*)
9563 xrealloc (loop_info->mems,
9564 loop_info->mems_allocated * sizeof (loop_mem_info));
9567 /* Actually insert the MEM. */
9568 loop_info->mems[loop_info->mems_idx].mem = m;
9569 /* We can't hoist this MEM out of the loop if it's a BLKmode MEM
9570 because we can't put it in a register. We still store it in the
9571 table, though, so that if we see the same address later, but in a
9572 non-BLK mode, we'll not think we can optimize it at that point. */
9573 loop_info->mems[loop_info->mems_idx].optimize = (GET_MODE (m) != BLKmode);
9574 loop_info->mems[loop_info->mems_idx].reg = NULL_RTX;
9575 ++loop_info->mems_idx;
9580 /* Like load_mems, but also ensures that REGS->SET_IN_LOOP,
9581 REGS->MAY_NOT_OPTIMIZE, REGS->SINGLE_USAGE, and INSN_COUNT have the correct
9582 values after load_mems. */
9585 load_mems_and_recount_loop_regs_set (loop, insn_count)
9586 const struct loop *loop;
9589 struct loop_regs *regs = LOOP_REGS (loop);
9590 int nregs = max_reg_num ();
9594 /* Recalculate regs->set_in_loop and friends since load_mems may have
9595 created new registers. */
9596 if (max_reg_num () > nregs)
9602 nregs = max_reg_num ();
9604 if ((unsigned) nregs > regs->set_in_loop->num_elements)
9606 /* Grow all the arrays. */
9607 VARRAY_GROW (regs->set_in_loop, nregs);
9608 VARRAY_GROW (regs->n_times_set, nregs);
9609 VARRAY_GROW (regs->may_not_optimize, nregs);
9610 VARRAY_GROW (regs->single_usage, nregs);
9612 /* Clear the arrays */
9613 bzero ((char *) ®s->set_in_loop->data, nregs * sizeof (int));
9614 bzero ((char *) ®s->may_not_optimize->data, nregs * sizeof (char));
9615 bzero ((char *) ®s->single_usage->data, nregs * sizeof (rtx));
9617 count_loop_regs_set (loop, regs->may_not_optimize,
9621 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
9623 VARRAY_CHAR (regs->may_not_optimize, i) = 1;
9624 VARRAY_INT (regs->set_in_loop, i) = 1;
9627 #ifdef AVOID_CCMODE_COPIES
9628 /* Don't try to move insns which set CC registers if we should not
9629 create CCmode register copies. */
9630 for (i = max_reg_num () - 1; i >= FIRST_PSEUDO_REGISTER; i--)
9631 if (GET_MODE_CLASS (GET_MODE (regno_reg_rtx[i])) == MODE_CC)
9632 VARRAY_CHAR (regs->may_not_optimize, i) = 1;
9635 /* Set regs->n_times_set for the new registers. */
9636 bcopy ((char *) (®s->set_in_loop->data.i[0] + old_nregs),
9637 (char *) (®s->n_times_set->data.i[0] + old_nregs),
9638 (nregs - old_nregs) * sizeof (int));
9642 /* Move MEMs into registers for the duration of the loop. */
9646 const struct loop *loop;
9648 struct loop_info *loop_info = LOOP_INFO (loop);
9649 struct loop_regs *regs = LOOP_REGS (loop);
9650 int maybe_never = 0;
9653 rtx label = NULL_RTX;
9654 rtx end_label = NULL_RTX;
9655 /* Nonzero if the next instruction may never be executed. */
9656 int next_maybe_never = 0;
9657 int last_max_reg = max_reg_num ();
9659 if (loop_info->mems_idx == 0)
9662 /* Find start of the extended basic block that enters the loop. */
9663 for (p = loop->start;
9664 PREV_INSN (p) && GET_CODE (p) != CODE_LABEL;
9670 /* Build table of mems that get set to constant values before the
9672 for (; p != loop->start; p = NEXT_INSN (p))
9673 cselib_process_insn (p);
9675 /* Check to see if it's possible that some instructions in the
9676 loop are never executed. */
9677 for (p = next_insn_in_loop (loop, loop->scan_start);
9678 p != NULL_RTX && ! maybe_never;
9679 p = next_insn_in_loop (loop, p))
9681 if (GET_CODE (p) == CODE_LABEL)
9683 else if (GET_CODE (p) == JUMP_INSN
9684 /* If we enter the loop in the middle, and scan
9685 around to the beginning, don't set maybe_never
9686 for that. This must be an unconditional jump,
9687 otherwise the code at the top of the loop might
9688 never be executed. Unconditional jumps are
9689 followed a by barrier then loop end. */
9690 && ! (GET_CODE (p) == JUMP_INSN
9691 && JUMP_LABEL (p) == loop->top
9692 && NEXT_INSN (NEXT_INSN (p)) == loop->end
9693 && any_uncondjump_p (p)))
9695 if (!any_condjump_p (p))
9696 /* Something complicated. */
9699 /* If there are any more instructions in the loop, they
9700 might not be reached. */
9701 next_maybe_never = 1;
9703 else if (next_maybe_never)
9707 /* Actually move the MEMs. */
9708 for (i = 0; i < loop_info->mems_idx; ++i)
9710 regset_head load_copies;
9711 regset_head store_copies;
9714 rtx mem = loop_info->mems[i].mem;
9717 if (MEM_VOLATILE_P (mem)
9718 || loop_invariant_p (loop, XEXP (mem, 0)) != 1)
9719 /* There's no telling whether or not MEM is modified. */
9720 loop_info->mems[i].optimize = 0;
9722 /* Go through the MEMs written to in the loop to see if this
9723 one is aliased by one of them. */
9724 mem_list_entry = loop_info->store_mems;
9725 while (mem_list_entry)
9727 if (rtx_equal_p (mem, XEXP (mem_list_entry, 0)))
9729 else if (true_dependence (XEXP (mem_list_entry, 0), VOIDmode,
9732 /* MEM is indeed aliased by this store. */
9733 loop_info->mems[i].optimize = 0;
9736 mem_list_entry = XEXP (mem_list_entry, 1);
9739 if (flag_float_store && written
9740 && GET_MODE_CLASS (GET_MODE (mem)) == MODE_FLOAT)
9741 loop_info->mems[i].optimize = 0;
9743 /* If this MEM is written to, we must be sure that there
9744 are no reads from another MEM that aliases this one. */
9745 if (loop_info->mems[i].optimize && written)
9749 for (j = 0; j < loop_info->mems_idx; ++j)
9753 else if (true_dependence (mem,
9755 loop_info->mems[j].mem,
9758 /* It's not safe to hoist loop_info->mems[i] out of
9759 the loop because writes to it might not be
9760 seen by reads from loop_info->mems[j]. */
9761 loop_info->mems[i].optimize = 0;
9767 if (maybe_never && may_trap_p (mem))
9768 /* We can't access the MEM outside the loop; it might
9769 cause a trap that wouldn't have happened otherwise. */
9770 loop_info->mems[i].optimize = 0;
9772 if (!loop_info->mems[i].optimize)
9773 /* We thought we were going to lift this MEM out of the
9774 loop, but later discovered that we could not. */
9777 INIT_REG_SET (&load_copies);
9778 INIT_REG_SET (&store_copies);
9780 /* Allocate a pseudo for this MEM. We set REG_USERVAR_P in
9781 order to keep scan_loop from moving stores to this MEM
9782 out of the loop just because this REG is neither a
9783 user-variable nor used in the loop test. */
9784 reg = gen_reg_rtx (GET_MODE (mem));
9785 REG_USERVAR_P (reg) = 1;
9786 loop_info->mems[i].reg = reg;
9788 /* Now, replace all references to the MEM with the
9789 corresponding pesudos. */
9791 for (p = next_insn_in_loop (loop, loop->scan_start);
9793 p = next_insn_in_loop (loop, p))
9799 set = single_set (p);
9801 /* See if this copies the mem into a register that isn't
9802 modified afterwards. We'll try to do copy propagation
9803 a little further on. */
9805 /* @@@ This test is _way_ too conservative. */
9807 && GET_CODE (SET_DEST (set)) == REG
9808 && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER
9809 && REGNO (SET_DEST (set)) < last_max_reg
9810 && VARRAY_INT (regs->n_times_set,
9811 REGNO (SET_DEST (set))) == 1
9812 && rtx_equal_p (SET_SRC (set), mem))
9813 SET_REGNO_REG_SET (&load_copies, REGNO (SET_DEST (set)));
9815 /* See if this copies the mem from a register that isn't
9816 modified afterwards. We'll try to remove the
9817 redundant copy later on by doing a little register
9818 renaming and copy propagation. This will help
9819 to untangle things for the BIV detection code. */
9822 && GET_CODE (SET_SRC (set)) == REG
9823 && REGNO (SET_SRC (set)) >= FIRST_PSEUDO_REGISTER
9824 && REGNO (SET_SRC (set)) < last_max_reg
9825 && VARRAY_INT (regs->n_times_set, REGNO (SET_SRC (set))) == 1
9826 && rtx_equal_p (SET_DEST (set), mem))
9827 SET_REGNO_REG_SET (&store_copies, REGNO (SET_SRC (set)));
9829 /* Replace the memory reference with the shadow register. */
9830 replace_loop_mems (p, loop_info->mems[i].mem,
9831 loop_info->mems[i].reg);
9834 if (GET_CODE (p) == CODE_LABEL
9835 || GET_CODE (p) == JUMP_INSN)
9839 if (! apply_change_group ())
9840 /* We couldn't replace all occurrences of the MEM. */
9841 loop_info->mems[i].optimize = 0;
9844 /* Load the memory immediately before LOOP->START, which is
9845 the NOTE_LOOP_BEG. */
9846 cselib_val *e = cselib_lookup (mem, VOIDmode, 0);
9850 struct elt_loc_list *const_equiv = 0;
9854 struct elt_loc_list *equiv;
9855 struct elt_loc_list *best_equiv = 0;
9856 for (equiv = e->locs; equiv; equiv = equiv->next)
9858 if (CONSTANT_P (equiv->loc))
9859 const_equiv = equiv;
9860 else if (GET_CODE (equiv->loc) == REG
9861 /* Extending hard register lifetimes cuases crash
9862 on SRC targets. Doing so on non-SRC is
9863 probably also not good idea, since we most
9864 probably have pseudoregister equivalence as
9866 && REGNO (equiv->loc) >= FIRST_PSEUDO_REGISTER)
9869 /* Use the constant equivalence if that is cheap enough. */
9871 best_equiv = const_equiv;
9872 else if (const_equiv
9873 && (rtx_cost (const_equiv->loc, SET)
9874 <= rtx_cost (best_equiv->loc, SET)))
9876 best_equiv = const_equiv;
9880 /* If best_equiv is nonzero, we know that MEM is set to a
9881 constant or register before the loop. We will use this
9882 knowledge to initialize the shadow register with that
9883 constant or reg rather than by loading from MEM. */
9885 best = copy_rtx (best_equiv->loc);
9887 set = gen_move_insn (reg, best);
9888 set = emit_insn_before (set, loop->start);
9890 REG_NOTES (set) = gen_rtx_EXPR_LIST (REG_EQUAL,
9891 copy_rtx (const_equiv->loc),
9896 if (label == NULL_RTX)
9898 /* We must compute the former
9899 right-after-the-end label before we insert
9901 end_label = next_label (loop->end);
9902 label = gen_label_rtx ();
9903 emit_label_after (label, loop->end);
9906 /* Store the memory immediately after END, which is
9907 the NOTE_LOOP_END. */
9908 set = gen_move_insn (copy_rtx (mem), reg);
9909 emit_insn_after (set, label);
9912 if (loop_dump_stream)
9914 fprintf (loop_dump_stream, "Hoisted regno %d %s from ",
9915 REGNO (reg), (written ? "r/w" : "r/o"));
9916 print_rtl (loop_dump_stream, mem);
9917 fputc ('\n', loop_dump_stream);
9920 /* Attempt a bit of copy propagation. This helps untangle the
9921 data flow, and enables {basic,general}_induction_var to find
9923 EXECUTE_IF_SET_IN_REG_SET
9924 (&load_copies, FIRST_PSEUDO_REGISTER, j,
9926 try_copy_prop (loop, reg, j);
9928 CLEAR_REG_SET (&load_copies);
9930 EXECUTE_IF_SET_IN_REG_SET
9931 (&store_copies, FIRST_PSEUDO_REGISTER, j,
9933 try_swap_copy_prop (loop, reg, j);
9935 CLEAR_REG_SET (&store_copies);
9939 if (label != NULL_RTX)
9941 /* Now, we need to replace all references to the previous exit
9942 label with the new one. */
9947 for (p = loop->start; p != loop->end; p = NEXT_INSN (p))
9949 for_each_rtx (&p, replace_label, &rr);
9951 /* If this is a JUMP_INSN, then we also need to fix the JUMP_LABEL
9952 field. This is not handled by for_each_rtx because it doesn't
9953 handle unprinted ('0') fields. We need to update JUMP_LABEL
9954 because the immediately following unroll pass will use it.
9955 replace_label would not work anyways, because that only handles
9957 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p) == end_label)
9958 JUMP_LABEL (p) = label;
9965 /* For communication between note_reg_stored and its caller. */
9966 struct note_reg_stored_arg
9972 /* Called via note_stores, record in SET_SEEN whether X, which is written,
9975 note_reg_stored (x, setter, arg)
9976 rtx x, setter ATTRIBUTE_UNUSED;
9979 struct note_reg_stored_arg *t = (struct note_reg_stored_arg *) arg;
9984 /* Try to replace every occurrence of pseudo REGNO with REPLACEMENT.
9985 There must be exactly one insn that sets this pseudo; it will be
9986 deleted if all replacements succeed and we can prove that the register
9987 is not used after the loop. */
9990 try_copy_prop (loop, replacement, regno)
9991 const struct loop *loop;
9995 /* This is the reg that we are copying from. */
9996 rtx reg_rtx = regno_reg_rtx[regno];
9999 /* These help keep track of whether we replaced all uses of the reg. */
10000 int replaced_last = 0;
10001 int store_is_first = 0;
10003 for (insn = next_insn_in_loop (loop, loop->scan_start);
10005 insn = next_insn_in_loop (loop, insn))
10009 /* Only substitute within one extended basic block from the initializing
10011 if (GET_CODE (insn) == CODE_LABEL && init_insn)
10014 if (! INSN_P (insn))
10017 /* Is this the initializing insn? */
10018 set = single_set (insn);
10020 && GET_CODE (SET_DEST (set)) == REG
10021 && REGNO (SET_DEST (set)) == regno)
10027 if (REGNO_FIRST_UID (regno) == INSN_UID (insn))
10028 store_is_first = 1;
10031 /* Only substitute after seeing the initializing insn. */
10032 if (init_insn && insn != init_insn)
10034 struct note_reg_stored_arg arg;
10036 replace_loop_regs (insn, reg_rtx, replacement);
10037 if (REGNO_LAST_UID (regno) == INSN_UID (insn))
10040 /* Stop replacing when REPLACEMENT is modified. */
10041 arg.reg = replacement;
10043 note_stores (PATTERN (insn), note_reg_stored, &arg);
10050 if (apply_change_group ())
10052 if (loop_dump_stream)
10053 fprintf (loop_dump_stream, " Replaced reg %d", regno);
10054 if (store_is_first && replaced_last)
10056 PUT_CODE (init_insn, NOTE);
10057 NOTE_LINE_NUMBER (init_insn) = NOTE_INSN_DELETED;
10058 if (loop_dump_stream)
10059 fprintf (loop_dump_stream, ", deleting init_insn (%d)",
10060 INSN_UID (init_insn));
10062 if (loop_dump_stream)
10063 fprintf (loop_dump_stream, ".\n");
10068 /* Try to replace occurrences of pseudo REGNO with REPLACEMENT within
10069 loop LOOP if the order of the sets of these registers can be
10070 swapped. There must be exactly one insn within the loop that sets
10071 this pseudo followed immediately by a move insn that sets
10072 REPLACEMENT with REGNO. */
10074 try_swap_copy_prop (loop, replacement, regno)
10075 const struct loop *loop;
10077 unsigned int regno;
10081 unsigned int new_regno;
10083 new_regno = REGNO (replacement);
10085 for (insn = next_insn_in_loop (loop, loop->scan_start);
10087 insn = next_insn_in_loop (loop, insn))
10089 /* Search for the insn that copies REGNO to NEW_REGNO? */
10090 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
10091 && (set = single_set (insn))
10092 && GET_CODE (SET_DEST (set)) == REG
10093 && REGNO (SET_DEST (set)) == new_regno
10094 && GET_CODE (SET_SRC (set)) == REG
10095 && REGNO (SET_SRC (set)) == regno)
10099 if (insn != NULL_RTX)
10104 /* Some DEF-USE info would come in handy here to make this
10105 function more general. For now, just check the previous insn
10106 which is the most likely candidate for setting REGNO. */
10108 prev_insn = PREV_INSN (insn);
10110 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
10111 && (prev_set = single_set (prev_insn))
10112 && GET_CODE (SET_DEST (prev_set)) == REG
10113 && REGNO (SET_DEST (prev_set)) == regno)
10116 (set (reg regno) (expr))
10117 (set (reg new_regno) (reg regno))
10119 so try converting this to:
10120 (set (reg new_regno) (expr))
10121 (set (reg regno) (reg new_regno))
10123 The former construct is often generated when a global
10124 variable used for an induction variable is shadowed by a
10125 register (NEW_REGNO). The latter construct improves the
10126 chances of GIV replacement and BIV elimination. */
10128 validate_change (prev_insn, &SET_DEST (prev_set),
10130 validate_change (insn, &SET_DEST (set),
10132 validate_change (insn, &SET_SRC (set),
10135 if (apply_change_group ())
10137 if (loop_dump_stream)
10138 fprintf (loop_dump_stream,
10139 " Swapped set of reg %d at %d with reg %d at %d.\n",
10140 regno, INSN_UID (insn),
10141 new_regno, INSN_UID (prev_insn));
10143 /* Update first use of REGNO. */
10144 if (REGNO_FIRST_UID (regno) == INSN_UID (prev_insn))
10145 REGNO_FIRST_UID (regno) = INSN_UID (insn);
10147 /* Now perform copy propagation to hopefully
10148 remove all uses of REGNO within the loop. */
10149 try_copy_prop (loop, replacement, regno);
10156 /* Replace MEM with its associated pseudo register. This function is
10157 called from load_mems via for_each_rtx. DATA is actually a pointer
10158 to a structure describing the instruction currently being scanned
10159 and the MEM we are currently replacing. */
10162 replace_loop_mem (mem, data)
10166 loop_replace_args *args = (loop_replace_args *)data;
10172 switch (GET_CODE (m))
10178 /* We're not interested in the MEM associated with a
10179 CONST_DOUBLE, so there's no need to traverse into one. */
10183 /* This is not a MEM. */
10187 if (!rtx_equal_p (args->match, m))
10188 /* This is not the MEM we are currently replacing. */
10191 /* Actually replace the MEM. */
10192 validate_change (args->insn, mem, args->replacement, 1);
10199 replace_loop_mems (insn, mem, reg)
10204 loop_replace_args args;
10208 args.replacement = reg;
10210 for_each_rtx (&insn, replace_loop_mem, &args);
10214 /* Replace one register with another. Called through for_each_rtx; PX points
10215 to the rtx being scanned. DATA is actually a pointer to
10216 a structure of arguments. */
10219 replace_loop_reg (px, data)
10224 loop_replace_args *args = (loop_replace_args *)data;
10229 if (x == args->match)
10230 validate_change (args->insn, px, args->replacement, 1);
10237 replace_loop_regs (insn, reg, replacement)
10242 loop_replace_args args;
10246 args.replacement = replacement;
10248 for_each_rtx (&insn, replace_loop_reg, &args);
10252 /* Replace occurrences of the old exit label for the loop with the new
10253 one. DATA is an rtx_pair containing the old and new labels,
10257 replace_label (x, data)
10262 rtx old_label = ((rtx_pair *) data)->r1;
10263 rtx new_label = ((rtx_pair *) data)->r2;
10268 if (GET_CODE (l) != LABEL_REF)
10271 if (XEXP (l, 0) != old_label)
10274 XEXP (l, 0) = new_label;
10275 ++LABEL_NUSES (new_label);
10276 --LABEL_NUSES (old_label);
10281 #define LOOP_BLOCK_NUM_1(INSN) \
10282 ((INSN) ? (BLOCK_FOR_INSN (INSN) ? BLOCK_NUM (INSN) : - 1) : -1)
10284 /* The notes do not have an assigned block, so look at the next insn. */
10285 #define LOOP_BLOCK_NUM(INSN) \
10286 ((INSN) ? (GET_CODE (INSN) == NOTE \
10287 ? LOOP_BLOCK_NUM_1 (next_nonnote_insn (INSN)) \
10288 : LOOP_BLOCK_NUM_1 (INSN)) \
10291 #define LOOP_INSN_UID(INSN) ((INSN) ? INSN_UID (INSN) : -1)
10293 static void loop_dump_aux (loop, file, verbose)
10294 const struct loop *loop;
10300 if (! loop || ! file)
10303 /* Print diagnostics to compare our concept of a loop with
10304 what the loop notes say. */
10305 if (! PREV_INSN (loop->first->head)
10306 || GET_CODE (PREV_INSN (loop->first->head)) != NOTE
10307 || NOTE_LINE_NUMBER (PREV_INSN (loop->first->head))
10308 != NOTE_INSN_LOOP_BEG)
10309 fprintf (file, ";; No NOTE_INSN_LOOP_BEG at %d\n",
10310 INSN_UID (PREV_INSN (loop->first->head)));
10311 if (! NEXT_INSN (loop->last->end)
10312 || GET_CODE (NEXT_INSN (loop->last->end)) != NOTE
10313 || NOTE_LINE_NUMBER (NEXT_INSN (loop->last->end))
10314 != NOTE_INSN_LOOP_END)
10315 fprintf (file, ";; No NOTE_INSN_LOOP_END at %d\n",
10316 INSN_UID (NEXT_INSN (loop->last->end)));
10321 ";; start %d (%d), cont dom %d (%d), cont %d (%d), vtop %d (%d), end %d (%d)\n",
10322 LOOP_BLOCK_NUM (loop->start),
10323 LOOP_INSN_UID (loop->start),
10324 LOOP_BLOCK_NUM (loop->cont),
10325 LOOP_INSN_UID (loop->cont),
10326 LOOP_BLOCK_NUM (loop->cont),
10327 LOOP_INSN_UID (loop->cont),
10328 LOOP_BLOCK_NUM (loop->vtop),
10329 LOOP_INSN_UID (loop->vtop),
10330 LOOP_BLOCK_NUM (loop->end),
10331 LOOP_INSN_UID (loop->end));
10332 fprintf (file, ";; top %d (%d), scan start %d (%d)\n",
10333 LOOP_BLOCK_NUM (loop->top),
10334 LOOP_INSN_UID (loop->top) ,
10335 LOOP_BLOCK_NUM (loop->scan_start),
10336 LOOP_INSN_UID (loop->scan_start));
10337 fprintf (file, ";; exit_count %d", loop->exit_count);
10338 if (loop->exit_count)
10340 fputs (", labels:", file);
10341 for (label = loop->exit_labels; label; label = LABEL_NEXTREF (label))
10343 fprintf (file, " %d ",
10344 LOOP_INSN_UID (XEXP (label, 0)));
10347 fputs ("\n", file);
10349 /* This can happen when a marked loop appears as two nested loops,
10350 say from while (a || b) {}. The inner loop won't match
10351 the loop markers but the outer one will. */
10352 if (LOOP_BLOCK_NUM (loop->cont) != loop->latch->index)
10353 fprintf (file, ";; NOTE_INSN_LOOP_CONT not in loop latch\n");
10358 /* Call this function from the debugger to dump LOOP. */
10362 const struct loop *loop;
10364 flow_loop_dump (loop, stderr, loop_dump_aux, 1);
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