1 /* Perform various loop optimizations, including strength reduction.
2 Copyright (C) 1987, 88, 89, 91-6, 1997 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* This is the loop optimization pass of the compiler.
23 It finds invariant computations within loops and moves them
24 to the beginning of the loop. Then it identifies basic and
25 general induction variables. Strength reduction is applied to the general
26 induction variables, and induction variable elimination is applied to
27 the basic induction variables.
29 It also finds cases where
30 a register is set within the loop by zero-extending a narrower value
31 and changes these to zero the entire register once before the loop
32 and merely copy the low part within the loop.
34 Most of the complexity is in heuristics to decide when it is worth
35 while to do these things. */
42 #include "insn-config.h"
43 #include "insn-flags.h"
45 #include "hard-reg-set.h"
52 /* Vector mapping INSN_UIDs to luids.
53 The luids are like uids but increase monotonically always.
54 We use them to see whether a jump comes from outside a given loop. */
58 /* Indexed by INSN_UID, contains the ordinal giving the (innermost) loop
59 number the insn is contained in. */
63 /* 1 + largest uid of any insn. */
67 /* 1 + luid of last insn. */
71 /* Number of loops detected in current function. Used as index to the
74 static int max_loop_num;
76 /* Indexed by loop number, contains the first and last insn of each loop. */
78 static rtx *loop_number_loop_starts, *loop_number_loop_ends;
80 /* For each loop, gives the containing loop number, -1 if none. */
85 /* The main output of analyze_loop_iterations is placed here */
87 int *loop_can_insert_bct;
89 /* For each loop, determines whether some of its inner loops has used
92 int *loop_used_count_register;
94 /* loop parameters for arithmetic loops. These loops have a loop variable
95 which is initialized to loop_start_value, incremented in each iteration
96 by "loop_increment". At the end of the iteration the loop variable is
97 compared to the loop_comparison_value (using loop_comparison_code). */
100 rtx *loop_comparison_value;
101 rtx *loop_start_value;
102 enum rtx_code *loop_comparison_code;
105 /* For each loop, keep track of its unrolling factor.
109 -1: completely unrolled
110 >0: holds the unroll exact factor. */
111 int *loop_unroll_factor;
113 /* Indexed by loop number, contains a nonzero value if the "loop" isn't
114 really a loop (an insn outside the loop branches into it). */
116 static char *loop_invalid;
118 /* Indexed by loop number, links together all LABEL_REFs which refer to
119 code labels outside the loop. Used by routines that need to know all
120 loop exits, such as final_biv_value and final_giv_value.
122 This does not include loop exits due to return instructions. This is
123 because all bivs and givs are pseudos, and hence must be dead after a
124 return, so the presense of a return does not affect any of the
125 optimizations that use this info. It is simpler to just not include return
126 instructions on this list. */
128 rtx *loop_number_exit_labels;
130 /* Indexed by loop number, counts the number of LABEL_REFs on
131 loop_number_exit_labels for this loop and all loops nested inside it. */
133 int *loop_number_exit_count;
135 /* Holds the number of loop iterations. It is zero if the number could not be
136 calculated. Must be unsigned since the number of iterations can
137 be as high as 2^wordsize-1. For loops with a wider iterator, this number
138 will will be zero if the number of loop iterations is too large for an
139 unsigned integer to hold. */
141 unsigned HOST_WIDE_INT loop_n_iterations;
143 /* Nonzero if there is a subroutine call in the current loop. */
145 static int loop_has_call;
147 /* Nonzero if there is a volatile memory reference in the current
150 static int loop_has_volatile;
152 /* Added loop_continue which is the NOTE_INSN_LOOP_CONT of the
153 current loop. A continue statement will generate a branch to
154 NEXT_INSN (loop_continue). */
156 static rtx loop_continue;
158 /* Indexed by register number, contains the number of times the reg
159 is set during the loop being scanned.
160 During code motion, a negative value indicates a reg that has been
161 made a candidate; in particular -2 means that it is an candidate that
162 we know is equal to a constant and -1 means that it is an candidate
163 not known equal to a constant.
164 After code motion, regs moved have 0 (which is accurate now)
165 while the failed candidates have the original number of times set.
167 Therefore, at all times, == 0 indicates an invariant register;
168 < 0 a conditionally invariant one. */
170 static int *n_times_set;
172 /* Original value of n_times_set; same except that this value
173 is not set negative for a reg whose sets have been made candidates
174 and not set to 0 for a reg that is moved. */
176 static int *n_times_used;
178 /* Index by register number, 1 indicates that the register
179 cannot be moved or strength reduced. */
181 static char *may_not_optimize;
183 /* Nonzero means reg N has already been moved out of one loop.
184 This reduces the desire to move it out of another. */
186 static char *moved_once;
188 /* Array of MEMs that are stored in this loop. If there are too many to fit
189 here, we just turn on unknown_address_altered. */
191 #define NUM_STORES 30
192 static rtx loop_store_mems[NUM_STORES];
194 /* Index of first available slot in above array. */
195 static int loop_store_mems_idx;
197 /* Nonzero if we don't know what MEMs were changed in the current loop.
198 This happens if the loop contains a call (in which case `loop_has_call'
199 will also be set) or if we store into more than NUM_STORES MEMs. */
201 static int unknown_address_altered;
203 /* Count of movable (i.e. invariant) instructions discovered in the loop. */
204 static int num_movables;
206 /* Count of memory write instructions discovered in the loop. */
207 static int num_mem_sets;
209 /* Number of loops contained within the current one, including itself. */
210 static int loops_enclosed;
212 /* Bound on pseudo register number before loop optimization.
213 A pseudo has valid regscan info if its number is < max_reg_before_loop. */
214 int max_reg_before_loop;
216 /* This obstack is used in product_cheap_p to allocate its rtl. It
217 may call gen_reg_rtx which, in turn, may reallocate regno_reg_rtx.
218 If we used the same obstack that it did, we would be deallocating
221 static struct obstack temp_obstack;
223 /* This is where the pointer to the obstack being used for RTL is stored. */
225 extern struct obstack *rtl_obstack;
227 #define obstack_chunk_alloc xmalloc
228 #define obstack_chunk_free free
230 extern char *oballoc ();
232 /* During the analysis of a loop, a chain of `struct movable's
233 is made to record all the movable insns found.
234 Then the entire chain can be scanned to decide which to move. */
238 rtx insn; /* A movable insn */
239 rtx set_src; /* The expression this reg is set from. */
240 rtx set_dest; /* The destination of this SET. */
241 rtx dependencies; /* When INSN is libcall, this is an EXPR_LIST
242 of any registers used within the LIBCALL. */
243 int consec; /* Number of consecutive following insns
244 that must be moved with this one. */
245 int regno; /* The register it sets */
246 short lifetime; /* lifetime of that register;
247 may be adjusted when matching movables
248 that load the same value are found. */
249 short savings; /* Number of insns we can move for this reg,
250 including other movables that force this
251 or match this one. */
252 unsigned int cond : 1; /* 1 if only conditionally movable */
253 unsigned int force : 1; /* 1 means MUST move this insn */
254 unsigned int global : 1; /* 1 means reg is live outside this loop */
255 /* If PARTIAL is 1, GLOBAL means something different:
256 that the reg is live outside the range from where it is set
257 to the following label. */
258 unsigned int done : 1; /* 1 inhibits further processing of this */
260 unsigned int partial : 1; /* 1 means this reg is used for zero-extending.
261 In particular, moving it does not make it
263 unsigned int move_insn : 1; /* 1 means that we call emit_move_insn to
264 load SRC, rather than copying INSN. */
265 unsigned int is_equiv : 1; /* 1 means a REG_EQUIV is present on INSN. */
266 enum machine_mode savemode; /* Nonzero means it is a mode for a low part
267 that we should avoid changing when clearing
268 the rest of the reg. */
269 struct movable *match; /* First entry for same value */
270 struct movable *forces; /* An insn that must be moved if this is */
271 struct movable *next;
274 FILE *loop_dump_stream;
276 /* Forward declarations. */
278 static void find_and_verify_loops ();
279 static void mark_loop_jump ();
280 static void prescan_loop ();
281 static int reg_in_basic_block_p ();
282 static int consec_sets_invariant_p ();
283 static rtx libcall_other_reg ();
284 static int labels_in_range_p ();
285 static void count_loop_regs_set ();
286 static void note_addr_stored ();
287 static int loop_reg_used_before_p ();
288 static void scan_loop ();
290 static void replace_call_address ();
292 static rtx skip_consec_insns ();
293 static int libcall_benefit ();
294 static void ignore_some_movables ();
295 static void force_movables ();
296 static void combine_movables ();
297 static int rtx_equal_for_loop_p ();
298 static void move_movables ();
299 static void strength_reduce ();
300 static int valid_initial_value_p ();
301 static void find_mem_givs ();
302 static void record_biv ();
303 static void check_final_value ();
304 static void record_giv ();
305 static void update_giv_derive ();
306 static int basic_induction_var ();
307 static rtx simplify_giv_expr ();
308 static int general_induction_var ();
309 static int consec_sets_giv ();
310 static int check_dbra_loop ();
311 static rtx express_from ();
312 static int combine_givs_p ();
313 static void combine_givs ();
314 static int product_cheap_p ();
315 static int maybe_eliminate_biv ();
316 static int maybe_eliminate_biv_1 ();
317 static int last_use_this_basic_block ();
318 static void record_initial ();
319 static void update_reg_last_use ();
322 /* This is extern from unroll.c */
323 void iteration_info ();
325 /* Two main functions for implementing bct:
326 first - to be called before loop unrolling, and the second - after */
327 static void analyze_loop_iterations ();
328 static void insert_bct ();
330 /* Auxiliary function that inserts the bct pattern into the loop */
331 static void instrument_loop_bct ();
334 /* Indirect_jump_in_function is computed once per function. */
335 int indirect_jump_in_function = 0;
336 static int indirect_jump_in_function_p ();
339 /* Relative gain of eliminating various kinds of operations. */
346 /* Benefit penalty, if a giv is not replaceable, i.e. must emit an insn to
347 copy the value of the strength reduced giv to its original register. */
353 char *free_point = (char *) oballoc (1);
354 rtx reg = gen_rtx (REG, word_mode, LAST_VIRTUAL_REGISTER + 1);
356 add_cost = rtx_cost (gen_rtx (PLUS, word_mode, reg, reg), SET);
358 /* We multiply by 2 to reconcile the difference in scale between
359 these two ways of computing costs. Otherwise the cost of a copy
360 will be far less than the cost of an add. */
364 /* Free the objects we just allocated. */
367 /* Initialize the obstack used for rtl in product_cheap_p. */
368 gcc_obstack_init (&temp_obstack);
371 /* Entry point of this file. Perform loop optimization
372 on the current function. F is the first insn of the function
373 and DUMPFILE is a stream for output of a trace of actions taken
374 (or 0 if none should be output). */
377 loop_optimize (f, dumpfile, unroll_p)
378 /* f is the first instruction of a chain of insns for one function */
387 loop_dump_stream = dumpfile;
389 init_recog_no_volatile ();
390 init_alias_analysis ();
392 max_reg_before_loop = max_reg_num ();
394 moved_once = (char *) alloca (max_reg_before_loop);
395 bzero (moved_once, max_reg_before_loop);
399 /* Count the number of loops. */
402 for (insn = f; insn; insn = NEXT_INSN (insn))
404 if (GET_CODE (insn) == NOTE
405 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
409 /* Don't waste time if no loops. */
410 if (max_loop_num == 0)
413 /* Get size to use for tables indexed by uids.
414 Leave some space for labels allocated by find_and_verify_loops. */
415 max_uid_for_loop = get_max_uid () + 1 + max_loop_num * 32;
417 uid_luid = (int *) alloca (max_uid_for_loop * sizeof (int));
418 uid_loop_num = (int *) alloca (max_uid_for_loop * sizeof (int));
420 bzero ((char *) uid_luid, max_uid_for_loop * sizeof (int));
421 bzero ((char *) uid_loop_num, max_uid_for_loop * sizeof (int));
423 /* Allocate tables for recording each loop. We set each entry, so they need
425 loop_number_loop_starts = (rtx *) alloca (max_loop_num * sizeof (rtx));
426 loop_number_loop_ends = (rtx *) alloca (max_loop_num * sizeof (rtx));
427 loop_outer_loop = (int *) alloca (max_loop_num * sizeof (int));
428 loop_invalid = (char *) alloca (max_loop_num * sizeof (char));
429 loop_number_exit_labels = (rtx *) alloca (max_loop_num * sizeof (rtx));
430 loop_number_exit_count = (int *) alloca (max_loop_num * sizeof (int));
432 /* This is initialized by the unrolling code, so we go ahead
433 and clear them just in case we are not performing loop
435 loop_unroll_factor = (int *) alloca (max_loop_num *sizeof (int));
436 bzero ((char *) loop_unroll_factor, max_loop_num * sizeof (int));
439 /* Allocate for BCT optimization */
440 loop_can_insert_bct = (int *) alloca (max_loop_num * sizeof (int));
441 bzero ((char *) loop_can_insert_bct, max_loop_num * sizeof (int));
443 loop_used_count_register = (int *) alloca (max_loop_num * sizeof (int));
444 bzero ((char *) loop_used_count_register, max_loop_num * sizeof (int));
446 loop_increment = (rtx *) alloca (max_loop_num * sizeof (rtx));
447 loop_comparison_value = (rtx *) alloca (max_loop_num * sizeof (rtx));
448 loop_start_value = (rtx *) alloca (max_loop_num * sizeof (rtx));
449 bzero ((char *) loop_increment, max_loop_num * sizeof (rtx));
450 bzero ((char *) loop_comparison_value, max_loop_num * sizeof (rtx));
451 bzero ((char *) loop_start_value, max_loop_num * sizeof (rtx));
454 = (enum rtx_code *) alloca (max_loop_num * sizeof (enum rtx_code));
455 bzero ((char *) loop_comparison_code, max_loop_num * sizeof (enum rtx_code));
458 /* Find and process each loop.
459 First, find them, and record them in order of their beginnings. */
460 find_and_verify_loops (f);
462 /* Now find all register lifetimes. This must be done after
463 find_and_verify_loops, because it might reorder the insns in the
465 reg_scan (f, max_reg_num (), 1);
467 /* See if we went too far. */
468 if (get_max_uid () > max_uid_for_loop)
471 /* Compute the mapping from uids to luids.
472 LUIDs are numbers assigned to insns, like uids,
473 except that luids increase monotonically through the code.
474 Don't assign luids to line-number NOTEs, so that the distance in luids
475 between two insns is not affected by -g. */
477 for (insn = f, i = 0; insn; insn = NEXT_INSN (insn))
480 if (GET_CODE (insn) != NOTE
481 || NOTE_LINE_NUMBER (insn) <= 0)
482 uid_luid[INSN_UID (insn)] = ++i;
484 /* Give a line number note the same luid as preceding insn. */
485 uid_luid[INSN_UID (insn)] = i;
490 /* Don't leave gaps in uid_luid for insns that have been
491 deleted. It is possible that the first or last insn
492 using some register has been deleted by cross-jumping.
493 Make sure that uid_luid for that former insn's uid
494 points to the general area where that insn used to be. */
495 for (i = 0; i < max_uid_for_loop; i++)
497 uid_luid[0] = uid_luid[i];
498 if (uid_luid[0] != 0)
501 for (i = 0; i < max_uid_for_loop; i++)
502 if (uid_luid[i] == 0)
503 uid_luid[i] = uid_luid[i - 1];
505 /* Create a mapping from loops to BLOCK tree nodes. */
506 if (unroll_p && write_symbols != NO_DEBUG)
507 find_loop_tree_blocks ();
509 /* Determine if the function has indirect jump. On some systems
510 this prevents low overhead loop instructions from being used. */
511 indirect_jump_in_function = indirect_jump_in_function_p (f);
513 /* Now scan the loops, last ones first, since this means inner ones are done
514 before outer ones. */
515 for (i = max_loop_num-1; i >= 0; i--)
516 if (! loop_invalid[i] && loop_number_loop_ends[i])
517 scan_loop (loop_number_loop_starts[i], loop_number_loop_ends[i],
518 max_reg_num (), unroll_p);
520 /* If debugging and unrolling loops, we must replicate the tree nodes
521 corresponding to the blocks inside the loop, so that the original one
522 to one mapping will remain. */
523 if (unroll_p && write_symbols != NO_DEBUG)
524 unroll_block_trees ();
527 /* Optimize one loop whose start is LOOP_START and end is END.
528 LOOP_START is the NOTE_INSN_LOOP_BEG and END is the matching
529 NOTE_INSN_LOOP_END. */
531 /* ??? Could also move memory writes out of loops if the destination address
532 is invariant, the source is invariant, the memory write is not volatile,
533 and if we can prove that no read inside the loop can read this address
534 before the write occurs. If there is a read of this address after the
535 write, then we can also mark the memory read as invariant. */
538 scan_loop (loop_start, end, nregs, unroll_p)
545 /* 1 if we are scanning insns that could be executed zero times. */
547 /* 1 if we are scanning insns that might never be executed
548 due to a subroutine call which might exit before they are reached. */
550 /* For a rotated loop that is entered near the bottom,
551 this is the label at the top. Otherwise it is zero. */
553 /* Jump insn that enters the loop, or 0 if control drops in. */
554 rtx loop_entry_jump = 0;
555 /* Place in the loop where control enters. */
557 /* Number of insns in the loop. */
562 /* The SET from an insn, if it is the only SET in the insn. */
564 /* Chain describing insns movable in current loop. */
565 struct movable *movables = 0;
566 /* Last element in `movables' -- so we can add elements at the end. */
567 struct movable *last_movable = 0;
568 /* Ratio of extra register life span we can justify
569 for saving an instruction. More if loop doesn't call subroutines
570 since in that case saving an insn makes more difference
571 and more registers are available. */
573 /* If we have calls, contains the insn in which a register was used
574 if it was used exactly once; contains const0_rtx if it was used more
576 rtx *reg_single_usage = 0;
577 /* Nonzero if we are scanning instructions in a sub-loop. */
580 n_times_set = (int *) alloca (nregs * sizeof (int));
581 n_times_used = (int *) alloca (nregs * sizeof (int));
582 may_not_optimize = (char *) alloca (nregs);
584 /* Determine whether this loop starts with a jump down to a test at
585 the end. This will occur for a small number of loops with a test
586 that is too complex to duplicate in front of the loop.
588 We search for the first insn or label in the loop, skipping NOTEs.
589 However, we must be careful not to skip past a NOTE_INSN_LOOP_BEG
590 (because we might have a loop executed only once that contains a
591 loop which starts with a jump to its exit test) or a NOTE_INSN_LOOP_END
592 (in case we have a degenerate loop).
594 Note that if we mistakenly think that a loop is entered at the top
595 when, in fact, it is entered at the exit test, the only effect will be
596 slightly poorer optimization. Making the opposite error can generate
597 incorrect code. Since very few loops now start with a jump to the
598 exit test, the code here to detect that case is very conservative. */
600 for (p = NEXT_INSN (loop_start);
602 && GET_CODE (p) != CODE_LABEL && GET_RTX_CLASS (GET_CODE (p)) != 'i'
603 && (GET_CODE (p) != NOTE
604 || (NOTE_LINE_NUMBER (p) != NOTE_INSN_LOOP_BEG
605 && NOTE_LINE_NUMBER (p) != NOTE_INSN_LOOP_END));
611 /* Set up variables describing this loop. */
612 prescan_loop (loop_start, end);
613 threshold = (loop_has_call ? 1 : 2) * (1 + n_non_fixed_regs);
615 /* If loop has a jump before the first label,
616 the true entry is the target of that jump.
617 Start scan from there.
618 But record in LOOP_TOP the place where the end-test jumps
619 back to so we can scan that after the end of the loop. */
620 if (GET_CODE (p) == JUMP_INSN)
624 /* Loop entry must be unconditional jump (and not a RETURN) */
626 && JUMP_LABEL (p) != 0
627 /* Check to see whether the jump actually
628 jumps out of the loop (meaning it's no loop).
629 This case can happen for things like
630 do {..} while (0). If this label was generated previously
631 by loop, we can't tell anything about it and have to reject
633 && INSN_UID (JUMP_LABEL (p)) < max_uid_for_loop
634 && INSN_LUID (JUMP_LABEL (p)) >= INSN_LUID (loop_start)
635 && INSN_LUID (JUMP_LABEL (p)) < INSN_LUID (end))
637 loop_top = next_label (scan_start);
638 scan_start = JUMP_LABEL (p);
642 /* If SCAN_START was an insn created by loop, we don't know its luid
643 as required by loop_reg_used_before_p. So skip such loops. (This
644 test may never be true, but it's best to play it safe.)
646 Also, skip loops where we do not start scanning at a label. This
647 test also rejects loops starting with a JUMP_INSN that failed the
650 if (INSN_UID (scan_start) >= max_uid_for_loop
651 || GET_CODE (scan_start) != CODE_LABEL)
653 if (loop_dump_stream)
654 fprintf (loop_dump_stream, "\nLoop from %d to %d is phony.\n\n",
655 INSN_UID (loop_start), INSN_UID (end));
659 /* Count number of times each reg is set during this loop.
660 Set may_not_optimize[I] if it is not safe to move out
661 the setting of register I. If this loop has calls, set
662 reg_single_usage[I]. */
664 bzero ((char *) n_times_set, nregs * sizeof (int));
665 bzero (may_not_optimize, nregs);
669 reg_single_usage = (rtx *) alloca (nregs * sizeof (rtx));
670 bzero ((char *) reg_single_usage, nregs * sizeof (rtx));
673 count_loop_regs_set (loop_top ? loop_top : loop_start, end,
674 may_not_optimize, reg_single_usage, &insn_count, nregs);
676 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
677 may_not_optimize[i] = 1, n_times_set[i] = 1;
678 bcopy ((char *) n_times_set, (char *) n_times_used, nregs * sizeof (int));
680 if (loop_dump_stream)
682 fprintf (loop_dump_stream, "\nLoop from %d to %d: %d real insns.\n",
683 INSN_UID (loop_start), INSN_UID (end), insn_count);
685 fprintf (loop_dump_stream, "Continue at insn %d.\n",
686 INSN_UID (loop_continue));
689 /* Scan through the loop finding insns that are safe to move.
690 Set n_times_set negative for the reg being set, so that
691 this reg will be considered invariant for subsequent insns.
692 We consider whether subsequent insns use the reg
693 in deciding whether it is worth actually moving.
695 MAYBE_NEVER is nonzero if we have passed a conditional jump insn
696 and therefore it is possible that the insns we are scanning
697 would never be executed. At such times, we must make sure
698 that it is safe to execute the insn once instead of zero times.
699 When MAYBE_NEVER is 0, all insns will be executed at least once
700 so that is not a problem. */
706 /* At end of a straight-in loop, we are done.
707 At end of a loop entered at the bottom, scan the top. */
720 if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
721 && find_reg_note (p, REG_LIBCALL, NULL_RTX))
723 else if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
724 && find_reg_note (p, REG_RETVAL, NULL_RTX))
727 if (GET_CODE (p) == INSN
728 && (set = single_set (p))
729 && GET_CODE (SET_DEST (set)) == REG
730 && ! may_not_optimize[REGNO (SET_DEST (set))])
735 rtx src = SET_SRC (set);
736 rtx dependencies = 0;
738 /* Figure out what to use as a source of this insn. If a REG_EQUIV
739 note is given or if a REG_EQUAL note with a constant operand is
740 specified, use it as the source and mark that we should move
741 this insn by calling emit_move_insn rather that duplicating the
744 Otherwise, only use the REG_EQUAL contents if a REG_RETVAL note
746 temp = find_reg_note (p, REG_EQUIV, NULL_RTX);
748 src = XEXP (temp, 0), move_insn = 1;
751 temp = find_reg_note (p, REG_EQUAL, NULL_RTX);
752 if (temp && CONSTANT_P (XEXP (temp, 0)))
753 src = XEXP (temp, 0), move_insn = 1;
754 if (temp && find_reg_note (p, REG_RETVAL, NULL_RTX))
756 src = XEXP (temp, 0);
757 /* A libcall block can use regs that don't appear in
758 the equivalent expression. To move the libcall,
759 we must move those regs too. */
760 dependencies = libcall_other_reg (p, src);
764 /* Don't try to optimize a register that was made
765 by loop-optimization for an inner loop.
766 We don't know its life-span, so we can't compute the benefit. */
767 if (REGNO (SET_DEST (set)) >= max_reg_before_loop)
769 /* In order to move a register, we need to have one of three cases:
770 (1) it is used only in the same basic block as the set
771 (2) it is not a user variable and it is not used in the
772 exit test (this can cause the variable to be used
773 before it is set just like a user-variable).
774 (3) the set is guaranteed to be executed once the loop starts,
775 and the reg is not used until after that. */
776 else if (! ((! maybe_never
777 && ! loop_reg_used_before_p (set, p, loop_start,
779 || (! REG_USERVAR_P (SET_DEST (set))
780 && ! REG_LOOP_TEST_P (SET_DEST (set)))
781 || reg_in_basic_block_p (p, SET_DEST (set))))
783 else if ((tem = invariant_p (src))
784 && (dependencies == 0
785 || (tem2 = invariant_p (dependencies)) != 0)
786 && (n_times_set[REGNO (SET_DEST (set))] == 1
788 = consec_sets_invariant_p (SET_DEST (set),
789 n_times_set[REGNO (SET_DEST (set))],
791 /* If the insn can cause a trap (such as divide by zero),
792 can't move it unless it's guaranteed to be executed
793 once loop is entered. Even a function call might
794 prevent the trap insn from being reached
795 (since it might exit!) */
796 && ! ((maybe_never || call_passed)
797 && may_trap_p (src)))
799 register struct movable *m;
800 register int regno = REGNO (SET_DEST (set));
802 /* A potential lossage is where we have a case where two insns
803 can be combined as long as they are both in the loop, but
804 we move one of them outside the loop. For large loops,
805 this can lose. The most common case of this is the address
806 of a function being called.
808 Therefore, if this register is marked as being used exactly
809 once if we are in a loop with calls (a "large loop"), see if
810 we can replace the usage of this register with the source
811 of this SET. If we can, delete this insn.
813 Don't do this if P has a REG_RETVAL note or if we have
814 SMALL_REGISTER_CLASSES and SET_SRC is a hard register. */
816 if (reg_single_usage && reg_single_usage[regno] != 0
817 && reg_single_usage[regno] != const0_rtx
818 && REGNO_FIRST_UID (regno) == INSN_UID (p)
819 && (REGNO_LAST_UID (regno)
820 == INSN_UID (reg_single_usage[regno]))
821 && n_times_set[REGNO (SET_DEST (set))] == 1
822 && ! side_effects_p (SET_SRC (set))
823 && ! find_reg_note (p, REG_RETVAL, NULL_RTX)
824 && (! SMALL_REGISTER_CLASSES
825 || (! (GET_CODE (SET_SRC (set)) == REG
826 && REGNO (SET_SRC (set)) < FIRST_PSEUDO_REGISTER)))
827 /* This test is not redundant; SET_SRC (set) might be
828 a call-clobbered register and the life of REGNO
829 might span a call. */
830 && ! modified_between_p (SET_SRC (set), p,
831 reg_single_usage[regno])
832 && no_labels_between_p (p, reg_single_usage[regno])
833 && validate_replace_rtx (SET_DEST (set), SET_SRC (set),
834 reg_single_usage[regno]))
836 /* Replace any usage in a REG_EQUAL note. Must copy the
837 new source, so that we don't get rtx sharing between the
838 SET_SOURCE and REG_NOTES of insn p. */
839 REG_NOTES (reg_single_usage[regno])
840 = replace_rtx (REG_NOTES (reg_single_usage[regno]),
841 SET_DEST (set), copy_rtx (SET_SRC (set)));
844 NOTE_LINE_NUMBER (p) = NOTE_INSN_DELETED;
845 NOTE_SOURCE_FILE (p) = 0;
846 n_times_set[regno] = 0;
850 m = (struct movable *) alloca (sizeof (struct movable));
854 m->dependencies = dependencies;
855 m->set_dest = SET_DEST (set);
857 m->consec = n_times_set[REGNO (SET_DEST (set))] - 1;
861 m->move_insn = move_insn;
862 m->is_equiv = (find_reg_note (p, REG_EQUIV, NULL_RTX) != 0);
863 m->savemode = VOIDmode;
865 /* Set M->cond if either invariant_p or consec_sets_invariant_p
866 returned 2 (only conditionally invariant). */
867 m->cond = ((tem | tem1 | tem2) > 1);
868 m->global = (uid_luid[REGNO_LAST_UID (regno)] > INSN_LUID (end)
869 || uid_luid[REGNO_FIRST_UID (regno)] < INSN_LUID (loop_start));
871 m->lifetime = (uid_luid[REGNO_LAST_UID (regno)]
872 - uid_luid[REGNO_FIRST_UID (regno)]);
873 m->savings = n_times_used[regno];
874 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
875 m->savings += libcall_benefit (p);
876 n_times_set[regno] = move_insn ? -2 : -1;
877 /* Add M to the end of the chain MOVABLES. */
881 last_movable->next = m;
886 /* Skip this insn, not checking REG_LIBCALL notes. */
887 p = next_nonnote_insn (p);
888 /* Skip the consecutive insns, if there are any. */
889 p = skip_consec_insns (p, m->consec);
890 /* Back up to the last insn of the consecutive group. */
891 p = prev_nonnote_insn (p);
893 /* We must now reset m->move_insn, m->is_equiv, and possibly
894 m->set_src to correspond to the effects of all the
896 temp = find_reg_note (p, REG_EQUIV, NULL_RTX);
898 m->set_src = XEXP (temp, 0), m->move_insn = 1;
901 temp = find_reg_note (p, REG_EQUAL, NULL_RTX);
902 if (temp && CONSTANT_P (XEXP (temp, 0)))
903 m->set_src = XEXP (temp, 0), m->move_insn = 1;
908 m->is_equiv = (find_reg_note (p, REG_EQUIV, NULL_RTX) != 0);
911 /* If this register is always set within a STRICT_LOW_PART
912 or set to zero, then its high bytes are constant.
913 So clear them outside the loop and within the loop
914 just load the low bytes.
915 We must check that the machine has an instruction to do so.
916 Also, if the value loaded into the register
917 depends on the same register, this cannot be done. */
918 else if (SET_SRC (set) == const0_rtx
919 && GET_CODE (NEXT_INSN (p)) == INSN
920 && (set1 = single_set (NEXT_INSN (p)))
921 && GET_CODE (set1) == SET
922 && (GET_CODE (SET_DEST (set1)) == STRICT_LOW_PART)
923 && (GET_CODE (XEXP (SET_DEST (set1), 0)) == SUBREG)
924 && (SUBREG_REG (XEXP (SET_DEST (set1), 0))
926 && !reg_mentioned_p (SET_DEST (set), SET_SRC (set1)))
928 register int regno = REGNO (SET_DEST (set));
929 if (n_times_set[regno] == 2)
931 register struct movable *m;
932 m = (struct movable *) alloca (sizeof (struct movable));
935 m->set_dest = SET_DEST (set);
943 /* If the insn may not be executed on some cycles,
944 we can't clear the whole reg; clear just high part.
945 Not even if the reg is used only within this loop.
952 Clearing x before the inner loop could clobber a value
953 being saved from the last time around the outer loop.
954 However, if the reg is not used outside this loop
955 and all uses of the register are in the same
956 basic block as the store, there is no problem.
958 If this insn was made by loop, we don't know its
959 INSN_LUID and hence must make a conservative
961 m->global = (INSN_UID (p) >= max_uid_for_loop
962 || (uid_luid[REGNO_LAST_UID (regno)]
964 || (uid_luid[REGNO_FIRST_UID (regno)]
966 || (labels_in_range_p
967 (p, uid_luid[REGNO_FIRST_UID (regno)])));
968 if (maybe_never && m->global)
969 m->savemode = GET_MODE (SET_SRC (set1));
971 m->savemode = VOIDmode;
975 m->lifetime = (uid_luid[REGNO_LAST_UID (regno)]
976 - uid_luid[REGNO_FIRST_UID (regno)]);
978 n_times_set[regno] = -1;
979 /* Add M to the end of the chain MOVABLES. */
983 last_movable->next = m;
988 /* Past a call insn, we get to insns which might not be executed
989 because the call might exit. This matters for insns that trap.
990 Call insns inside a REG_LIBCALL/REG_RETVAL block always return,
991 so they don't count. */
992 else if (GET_CODE (p) == CALL_INSN && ! in_libcall)
994 /* Past a label or a jump, we get to insns for which we
995 can't count on whether or how many times they will be
996 executed during each iteration. Therefore, we can
997 only move out sets of trivial variables
998 (those not used after the loop). */
999 /* Similar code appears twice in strength_reduce. */
1000 else if ((GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN)
1001 /* If we enter the loop in the middle, and scan around to the
1002 beginning, don't set maybe_never for that. This must be an
1003 unconditional jump, otherwise the code at the top of the
1004 loop might never be executed. Unconditional jumps are
1005 followed a by barrier then loop end. */
1006 && ! (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p) == loop_top
1007 && NEXT_INSN (NEXT_INSN (p)) == end
1008 && simplejump_p (p)))
1010 else if (GET_CODE (p) == NOTE)
1012 /* At the virtual top of a converted loop, insns are again known to
1013 be executed: logically, the loop begins here even though the exit
1014 code has been duplicated. */
1015 if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP && loop_depth == 0)
1016 maybe_never = call_passed = 0;
1017 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
1019 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
1024 /* If one movable subsumes another, ignore that other. */
1026 ignore_some_movables (movables);
1028 /* For each movable insn, see if the reg that it loads
1029 leads when it dies right into another conditionally movable insn.
1030 If so, record that the second insn "forces" the first one,
1031 since the second can be moved only if the first is. */
1033 force_movables (movables);
1035 /* See if there are multiple movable insns that load the same value.
1036 If there are, make all but the first point at the first one
1037 through the `match' field, and add the priorities of them
1038 all together as the priority of the first. */
1040 combine_movables (movables, nregs);
1042 /* Now consider each movable insn to decide whether it is worth moving.
1043 Store 0 in n_times_set for each reg that is moved. */
1045 move_movables (movables, threshold,
1046 insn_count, loop_start, end, nregs);
1048 /* Now candidates that still are negative are those not moved.
1049 Change n_times_set to indicate that those are not actually invariant. */
1050 for (i = 0; i < nregs; i++)
1051 if (n_times_set[i] < 0)
1052 n_times_set[i] = n_times_used[i];
1054 if (flag_strength_reduce)
1055 strength_reduce (scan_start, end, loop_top,
1056 insn_count, loop_start, end, unroll_p);
1059 /* Add elements to *OUTPUT to record all the pseudo-regs
1060 mentioned in IN_THIS but not mentioned in NOT_IN_THIS. */
1063 record_excess_regs (in_this, not_in_this, output)
1064 rtx in_this, not_in_this;
1071 code = GET_CODE (in_this);
1085 if (REGNO (in_this) >= FIRST_PSEUDO_REGISTER
1086 && ! reg_mentioned_p (in_this, not_in_this))
1087 *output = gen_rtx (EXPR_LIST, VOIDmode, in_this, *output);
1094 fmt = GET_RTX_FORMAT (code);
1095 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1102 for (j = 0; j < XVECLEN (in_this, i); j++)
1103 record_excess_regs (XVECEXP (in_this, i, j), not_in_this, output);
1107 record_excess_regs (XEXP (in_this, i), not_in_this, output);
1113 /* Check what regs are referred to in the libcall block ending with INSN,
1114 aside from those mentioned in the equivalent value.
1115 If there are none, return 0.
1116 If there are one or more, return an EXPR_LIST containing all of them. */
1119 libcall_other_reg (insn, equiv)
1122 rtx note = find_reg_note (insn, REG_RETVAL, NULL_RTX);
1123 rtx p = XEXP (note, 0);
1126 /* First, find all the regs used in the libcall block
1127 that are not mentioned as inputs to the result. */
1131 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
1132 || GET_CODE (p) == CALL_INSN)
1133 record_excess_regs (PATTERN (p), equiv, &output);
1140 /* Return 1 if all uses of REG
1141 are between INSN and the end of the basic block. */
1144 reg_in_basic_block_p (insn, reg)
1147 int regno = REGNO (reg);
1150 if (REGNO_FIRST_UID (regno) != INSN_UID (insn))
1153 /* Search this basic block for the already recorded last use of the reg. */
1154 for (p = insn; p; p = NEXT_INSN (p))
1156 switch (GET_CODE (p))
1163 /* Ordinary insn: if this is the last use, we win. */
1164 if (REGNO_LAST_UID (regno) == INSN_UID (p))
1169 /* Jump insn: if this is the last use, we win. */
1170 if (REGNO_LAST_UID (regno) == INSN_UID (p))
1172 /* Otherwise, it's the end of the basic block, so we lose. */
1177 /* It's the end of the basic block, so we lose. */
1185 /* The "last use" doesn't follow the "first use"?? */
1189 /* Compute the benefit of eliminating the insns in the block whose
1190 last insn is LAST. This may be a group of insns used to compute a
1191 value directly or can contain a library call. */
1194 libcall_benefit (last)
1200 for (insn = XEXP (find_reg_note (last, REG_RETVAL, NULL_RTX), 0);
1201 insn != last; insn = NEXT_INSN (insn))
1203 if (GET_CODE (insn) == CALL_INSN)
1204 benefit += 10; /* Assume at least this many insns in a library
1206 else if (GET_CODE (insn) == INSN
1207 && GET_CODE (PATTERN (insn)) != USE
1208 && GET_CODE (PATTERN (insn)) != CLOBBER)
1215 /* Skip COUNT insns from INSN, counting library calls as 1 insn. */
1218 skip_consec_insns (insn, count)
1222 for (; count > 0; count--)
1226 /* If first insn of libcall sequence, skip to end. */
1227 /* Do this at start of loop, since INSN is guaranteed to
1229 if (GET_CODE (insn) != NOTE
1230 && (temp = find_reg_note (insn, REG_LIBCALL, NULL_RTX)))
1231 insn = XEXP (temp, 0);
1233 do insn = NEXT_INSN (insn);
1234 while (GET_CODE (insn) == NOTE);
1240 /* Ignore any movable whose insn falls within a libcall
1241 which is part of another movable.
1242 We make use of the fact that the movable for the libcall value
1243 was made later and so appears later on the chain. */
1246 ignore_some_movables (movables)
1247 struct movable *movables;
1249 register struct movable *m, *m1;
1251 for (m = movables; m; m = m->next)
1253 /* Is this a movable for the value of a libcall? */
1254 rtx note = find_reg_note (m->insn, REG_RETVAL, NULL_RTX);
1258 /* Check for earlier movables inside that range,
1259 and mark them invalid. We cannot use LUIDs here because
1260 insns created by loop.c for prior loops don't have LUIDs.
1261 Rather than reject all such insns from movables, we just
1262 explicitly check each insn in the libcall (since invariant
1263 libcalls aren't that common). */
1264 for (insn = XEXP (note, 0); insn != m->insn; insn = NEXT_INSN (insn))
1265 for (m1 = movables; m1 != m; m1 = m1->next)
1266 if (m1->insn == insn)
1272 /* For each movable insn, see if the reg that it loads
1273 leads when it dies right into another conditionally movable insn.
1274 If so, record that the second insn "forces" the first one,
1275 since the second can be moved only if the first is. */
1278 force_movables (movables)
1279 struct movable *movables;
1281 register struct movable *m, *m1;
1282 for (m1 = movables; m1; m1 = m1->next)
1283 /* Omit this if moving just the (SET (REG) 0) of a zero-extend. */
1284 if (!m1->partial && !m1->done)
1286 int regno = m1->regno;
1287 for (m = m1->next; m; m = m->next)
1288 /* ??? Could this be a bug? What if CSE caused the
1289 register of M1 to be used after this insn?
1290 Since CSE does not update regno_last_uid,
1291 this insn M->insn might not be where it dies.
1292 But very likely this doesn't matter; what matters is
1293 that M's reg is computed from M1's reg. */
1294 if (INSN_UID (m->insn) == REGNO_LAST_UID (regno)
1297 if (m != 0 && m->set_src == m1->set_dest
1298 /* If m->consec, m->set_src isn't valid. */
1302 /* Increase the priority of the moving the first insn
1303 since it permits the second to be moved as well. */
1307 m1->lifetime += m->lifetime;
1308 m1->savings += m1->savings;
1313 /* Find invariant expressions that are equal and can be combined into
1317 combine_movables (movables, nregs)
1318 struct movable *movables;
1321 register struct movable *m;
1322 char *matched_regs = (char *) alloca (nregs);
1323 enum machine_mode mode;
1325 /* Regs that are set more than once are not allowed to match
1326 or be matched. I'm no longer sure why not. */
1327 /* Perhaps testing m->consec_sets would be more appropriate here? */
1329 for (m = movables; m; m = m->next)
1330 if (m->match == 0 && n_times_used[m->regno] == 1 && !m->partial)
1332 register struct movable *m1;
1333 int regno = m->regno;
1335 bzero (matched_regs, nregs);
1336 matched_regs[regno] = 1;
1338 /* We want later insns to match the first one. Don't make the first
1339 one match any later ones. So start this loop at m->next. */
1340 for (m1 = m->next; m1; m1 = m1->next)
1341 if (m != m1 && m1->match == 0 && n_times_used[m1->regno] == 1
1342 /* A reg used outside the loop mustn't be eliminated. */
1344 /* A reg used for zero-extending mustn't be eliminated. */
1346 && (matched_regs[m1->regno]
1349 /* Can combine regs with different modes loaded from the
1350 same constant only if the modes are the same or
1351 if both are integer modes with M wider or the same
1352 width as M1. The check for integer is redundant, but
1353 safe, since the only case of differing destination
1354 modes with equal sources is when both sources are
1355 VOIDmode, i.e., CONST_INT. */
1356 (GET_MODE (m->set_dest) == GET_MODE (m1->set_dest)
1357 || (GET_MODE_CLASS (GET_MODE (m->set_dest)) == MODE_INT
1358 && GET_MODE_CLASS (GET_MODE (m1->set_dest)) == MODE_INT
1359 && (GET_MODE_BITSIZE (GET_MODE (m->set_dest))
1360 >= GET_MODE_BITSIZE (GET_MODE (m1->set_dest)))))
1361 /* See if the source of M1 says it matches M. */
1362 && ((GET_CODE (m1->set_src) == REG
1363 && matched_regs[REGNO (m1->set_src)])
1364 || rtx_equal_for_loop_p (m->set_src, m1->set_src,
1366 && ((m->dependencies == m1->dependencies)
1367 || rtx_equal_p (m->dependencies, m1->dependencies)))
1369 m->lifetime += m1->lifetime;
1370 m->savings += m1->savings;
1373 matched_regs[m1->regno] = 1;
1377 /* Now combine the regs used for zero-extension.
1378 This can be done for those not marked `global'
1379 provided their lives don't overlap. */
1381 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
1382 mode = GET_MODE_WIDER_MODE (mode))
1384 register struct movable *m0 = 0;
1386 /* Combine all the registers for extension from mode MODE.
1387 Don't combine any that are used outside this loop. */
1388 for (m = movables; m; m = m->next)
1389 if (m->partial && ! m->global
1390 && mode == GET_MODE (SET_SRC (PATTERN (NEXT_INSN (m->insn)))))
1392 register struct movable *m1;
1393 int first = uid_luid[REGNO_FIRST_UID (m->regno)];
1394 int last = uid_luid[REGNO_LAST_UID (m->regno)];
1398 /* First one: don't check for overlap, just record it. */
1403 /* Make sure they extend to the same mode.
1404 (Almost always true.) */
1405 if (GET_MODE (m->set_dest) != GET_MODE (m0->set_dest))
1408 /* We already have one: check for overlap with those
1409 already combined together. */
1410 for (m1 = movables; m1 != m; m1 = m1->next)
1411 if (m1 == m0 || (m1->partial && m1->match == m0))
1412 if (! (uid_luid[REGNO_FIRST_UID (m1->regno)] > last
1413 || uid_luid[REGNO_LAST_UID (m1->regno)] < first))
1416 /* No overlap: we can combine this with the others. */
1417 m0->lifetime += m->lifetime;
1418 m0->savings += m->savings;
1427 /* Return 1 if regs X and Y will become the same if moved. */
1430 regs_match_p (x, y, movables)
1432 struct movable *movables;
1436 struct movable *mx, *my;
1438 for (mx = movables; mx; mx = mx->next)
1439 if (mx->regno == xn)
1442 for (my = movables; my; my = my->next)
1443 if (my->regno == yn)
1447 && ((mx->match == my->match && mx->match != 0)
1449 || mx == my->match));
1452 /* Return 1 if X and Y are identical-looking rtx's.
1453 This is the Lisp function EQUAL for rtx arguments.
1455 If two registers are matching movables or a movable register and an
1456 equivalent constant, consider them equal. */
1459 rtx_equal_for_loop_p (x, y, movables)
1461 struct movable *movables;
1465 register struct movable *m;
1466 register enum rtx_code code;
1471 if (x == 0 || y == 0)
1474 code = GET_CODE (x);
1476 /* If we have a register and a constant, they may sometimes be
1478 if (GET_CODE (x) == REG && n_times_set[REGNO (x)] == -2
1480 for (m = movables; m; m = m->next)
1481 if (m->move_insn && m->regno == REGNO (x)
1482 && rtx_equal_p (m->set_src, y))
1485 else if (GET_CODE (y) == REG && n_times_set[REGNO (y)] == -2
1487 for (m = movables; m; m = m->next)
1488 if (m->move_insn && m->regno == REGNO (y)
1489 && rtx_equal_p (m->set_src, x))
1492 /* Otherwise, rtx's of different codes cannot be equal. */
1493 if (code != GET_CODE (y))
1496 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
1497 (REG:SI x) and (REG:HI x) are NOT equivalent. */
1499 if (GET_MODE (x) != GET_MODE (y))
1502 /* These three types of rtx's can be compared nonrecursively. */
1504 return (REGNO (x) == REGNO (y) || regs_match_p (x, y, movables));
1506 if (code == LABEL_REF)
1507 return XEXP (x, 0) == XEXP (y, 0);
1508 if (code == SYMBOL_REF)
1509 return XSTR (x, 0) == XSTR (y, 0);
1511 /* Compare the elements. If any pair of corresponding elements
1512 fail to match, return 0 for the whole things. */
1514 fmt = GET_RTX_FORMAT (code);
1515 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1520 if (XWINT (x, i) != XWINT (y, i))
1525 if (XINT (x, i) != XINT (y, i))
1530 /* Two vectors must have the same length. */
1531 if (XVECLEN (x, i) != XVECLEN (y, i))
1534 /* And the corresponding elements must match. */
1535 for (j = 0; j < XVECLEN (x, i); j++)
1536 if (rtx_equal_for_loop_p (XVECEXP (x, i, j), XVECEXP (y, i, j), movables) == 0)
1541 if (rtx_equal_for_loop_p (XEXP (x, i), XEXP (y, i), movables) == 0)
1546 if (strcmp (XSTR (x, i), XSTR (y, i)))
1551 /* These are just backpointers, so they don't matter. */
1557 /* It is believed that rtx's at this level will never
1558 contain anything but integers and other rtx's,
1559 except for within LABEL_REFs and SYMBOL_REFs. */
1567 /* If X contains any LABEL_REF's, add REG_LABEL notes for them to all
1568 insns in INSNS which use thet reference. */
1571 add_label_notes (x, insns)
1575 enum rtx_code code = GET_CODE (x);
1580 if (code == LABEL_REF && !LABEL_REF_NONLOCAL_P (x))
1582 rtx next = next_real_insn (XEXP (x, 0));
1584 /* Don't record labels that refer to dispatch tables.
1585 This is not necessary, since the tablejump references the same label.
1586 And if we did record them, flow.c would make worse code. */
1588 || ! (GET_CODE (next) == JUMP_INSN
1589 && (GET_CODE (PATTERN (next)) == ADDR_VEC
1590 || GET_CODE (PATTERN (next)) == ADDR_DIFF_VEC)))
1592 for (insn = insns; insn; insn = NEXT_INSN (insn))
1593 if (reg_mentioned_p (XEXP (x, 0), insn))
1594 REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_LABEL, XEXP (x, 0),
1600 fmt = GET_RTX_FORMAT (code);
1601 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1604 add_label_notes (XEXP (x, i), insns);
1605 else if (fmt[i] == 'E')
1606 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1607 add_label_notes (XVECEXP (x, i, j), insns);
1611 /* Scan MOVABLES, and move the insns that deserve to be moved.
1612 If two matching movables are combined, replace one reg with the
1613 other throughout. */
1616 move_movables (movables, threshold, insn_count, loop_start, end, nregs)
1617 struct movable *movables;
1625 register struct movable *m;
1627 /* Map of pseudo-register replacements to handle combining
1628 when we move several insns that load the same value
1629 into different pseudo-registers. */
1630 rtx *reg_map = (rtx *) alloca (nregs * sizeof (rtx));
1631 char *already_moved = (char *) alloca (nregs);
1633 bzero (already_moved, nregs);
1634 bzero ((char *) reg_map, nregs * sizeof (rtx));
1638 for (m = movables; m; m = m->next)
1640 /* Describe this movable insn. */
1642 if (loop_dump_stream)
1644 fprintf (loop_dump_stream, "Insn %d: regno %d (life %d), ",
1645 INSN_UID (m->insn), m->regno, m->lifetime);
1647 fprintf (loop_dump_stream, "consec %d, ", m->consec);
1649 fprintf (loop_dump_stream, "cond ");
1651 fprintf (loop_dump_stream, "force ");
1653 fprintf (loop_dump_stream, "global ");
1655 fprintf (loop_dump_stream, "done ");
1657 fprintf (loop_dump_stream, "move-insn ");
1659 fprintf (loop_dump_stream, "matches %d ",
1660 INSN_UID (m->match->insn));
1662 fprintf (loop_dump_stream, "forces %d ",
1663 INSN_UID (m->forces->insn));
1666 /* Count movables. Value used in heuristics in strength_reduce. */
1669 /* Ignore the insn if it's already done (it matched something else).
1670 Otherwise, see if it is now safe to move. */
1674 || (1 == invariant_p (m->set_src)
1675 && (m->dependencies == 0
1676 || 1 == invariant_p (m->dependencies))
1678 || 1 == consec_sets_invariant_p (m->set_dest,
1681 && (! m->forces || m->forces->done))
1685 int savings = m->savings;
1687 /* We have an insn that is safe to move.
1688 Compute its desirability. */
1693 if (loop_dump_stream)
1694 fprintf (loop_dump_stream, "savings %d ", savings);
1696 if (moved_once[regno])
1700 if (loop_dump_stream)
1701 fprintf (loop_dump_stream, "halved since already moved ");
1704 /* An insn MUST be moved if we already moved something else
1705 which is safe only if this one is moved too: that is,
1706 if already_moved[REGNO] is nonzero. */
1708 /* An insn is desirable to move if the new lifetime of the
1709 register is no more than THRESHOLD times the old lifetime.
1710 If it's not desirable, it means the loop is so big
1711 that moving won't speed things up much,
1712 and it is liable to make register usage worse. */
1714 /* It is also desirable to move if it can be moved at no
1715 extra cost because something else was already moved. */
1717 if (already_moved[regno]
1718 || flag_move_all_movables
1719 || (threshold * savings * m->lifetime) >= insn_count
1720 || (m->forces && m->forces->done
1721 && n_times_used[m->forces->regno] == 1))
1724 register struct movable *m1;
1727 /* Now move the insns that set the reg. */
1729 if (m->partial && m->match)
1733 /* Find the end of this chain of matching regs.
1734 Thus, we load each reg in the chain from that one reg.
1735 And that reg is loaded with 0 directly,
1736 since it has ->match == 0. */
1737 for (m1 = m; m1->match; m1 = m1->match);
1738 newpat = gen_move_insn (SET_DEST (PATTERN (m->insn)),
1739 SET_DEST (PATTERN (m1->insn)));
1740 i1 = emit_insn_before (newpat, loop_start);
1742 /* Mark the moved, invariant reg as being allowed to
1743 share a hard reg with the other matching invariant. */
1744 REG_NOTES (i1) = REG_NOTES (m->insn);
1745 r1 = SET_DEST (PATTERN (m->insn));
1746 r2 = SET_DEST (PATTERN (m1->insn));
1747 regs_may_share = gen_rtx (EXPR_LIST, VOIDmode, r1,
1748 gen_rtx (EXPR_LIST, VOIDmode, r2,
1750 delete_insn (m->insn);
1755 if (loop_dump_stream)
1756 fprintf (loop_dump_stream, " moved to %d", INSN_UID (i1));
1758 /* If we are to re-generate the item being moved with a
1759 new move insn, first delete what we have and then emit
1760 the move insn before the loop. */
1761 else if (m->move_insn)
1765 for (count = m->consec; count >= 0; count--)
1767 /* If this is the first insn of a library call sequence,
1769 if (GET_CODE (p) != NOTE
1770 && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
1773 /* If this is the last insn of a libcall sequence, then
1774 delete every insn in the sequence except the last.
1775 The last insn is handled in the normal manner. */
1776 if (GET_CODE (p) != NOTE
1777 && (temp = find_reg_note (p, REG_RETVAL, NULL_RTX)))
1779 temp = XEXP (temp, 0);
1781 temp = delete_insn (temp);
1784 p = delete_insn (p);
1785 while (p && GET_CODE (p) == NOTE)
1790 emit_move_insn (m->set_dest, m->set_src);
1791 temp = get_insns ();
1794 add_label_notes (m->set_src, temp);
1796 i1 = emit_insns_before (temp, loop_start);
1797 if (! find_reg_note (i1, REG_EQUAL, NULL_RTX))
1799 = gen_rtx (EXPR_LIST,
1800 m->is_equiv ? REG_EQUIV : REG_EQUAL,
1801 m->set_src, REG_NOTES (i1));
1803 if (loop_dump_stream)
1804 fprintf (loop_dump_stream, " moved to %d", INSN_UID (i1));
1806 /* The more regs we move, the less we like moving them. */
1811 for (count = m->consec; count >= 0; count--)
1815 /* If first insn of libcall sequence, skip to end. */
1816 /* Do this at start of loop, since p is guaranteed to
1818 if (GET_CODE (p) != NOTE
1819 && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
1822 /* If last insn of libcall sequence, move all
1823 insns except the last before the loop. The last
1824 insn is handled in the normal manner. */
1825 if (GET_CODE (p) != NOTE
1826 && (temp = find_reg_note (p, REG_RETVAL, NULL_RTX)))
1830 rtx fn_address_insn = 0;
1833 for (temp = XEXP (temp, 0); temp != p;
1834 temp = NEXT_INSN (temp))
1840 if (GET_CODE (temp) == NOTE)
1843 body = PATTERN (temp);
1845 /* Find the next insn after TEMP,
1846 not counting USE or NOTE insns. */
1847 for (next = NEXT_INSN (temp); next != p;
1848 next = NEXT_INSN (next))
1849 if (! (GET_CODE (next) == INSN
1850 && GET_CODE (PATTERN (next)) == USE)
1851 && GET_CODE (next) != NOTE)
1854 /* If that is the call, this may be the insn
1855 that loads the function address.
1857 Extract the function address from the insn
1858 that loads it into a register.
1859 If this insn was cse'd, we get incorrect code.
1861 So emit a new move insn that copies the
1862 function address into the register that the
1863 call insn will use. flow.c will delete any
1864 redundant stores that we have created. */
1865 if (GET_CODE (next) == CALL_INSN
1866 && GET_CODE (body) == SET
1867 && GET_CODE (SET_DEST (body)) == REG
1868 && (n = find_reg_note (temp, REG_EQUAL,
1871 fn_reg = SET_SRC (body);
1872 if (GET_CODE (fn_reg) != REG)
1873 fn_reg = SET_DEST (body);
1874 fn_address = XEXP (n, 0);
1875 fn_address_insn = temp;
1877 /* We have the call insn.
1878 If it uses the register we suspect it might,
1879 load it with the correct address directly. */
1880 if (GET_CODE (temp) == CALL_INSN
1882 && reg_referenced_p (fn_reg, body))
1883 emit_insn_after (gen_move_insn (fn_reg,
1887 if (GET_CODE (temp) == CALL_INSN)
1889 i1 = emit_call_insn_before (body, loop_start);
1890 /* Because the USAGE information potentially
1891 contains objects other than hard registers
1892 we need to copy it. */
1893 if (CALL_INSN_FUNCTION_USAGE (temp))
1894 CALL_INSN_FUNCTION_USAGE (i1)
1895 = copy_rtx (CALL_INSN_FUNCTION_USAGE (temp));
1898 i1 = emit_insn_before (body, loop_start);
1901 if (temp == fn_address_insn)
1902 fn_address_insn = i1;
1903 REG_NOTES (i1) = REG_NOTES (temp);
1907 if (m->savemode != VOIDmode)
1909 /* P sets REG to zero; but we should clear only
1910 the bits that are not covered by the mode
1912 rtx reg = m->set_dest;
1918 (GET_MODE (reg), and_optab, reg,
1919 GEN_INT ((((HOST_WIDE_INT) 1
1920 << GET_MODE_BITSIZE (m->savemode)))
1922 reg, 1, OPTAB_LIB_WIDEN);
1926 emit_move_insn (reg, tem);
1927 sequence = gen_sequence ();
1929 i1 = emit_insn_before (sequence, loop_start);
1931 else if (GET_CODE (p) == CALL_INSN)
1933 i1 = emit_call_insn_before (PATTERN (p), loop_start);
1934 /* Because the USAGE information potentially
1935 contains objects other than hard registers
1936 we need to copy it. */
1937 if (CALL_INSN_FUNCTION_USAGE (p))
1938 CALL_INSN_FUNCTION_USAGE (i1)
1939 = copy_rtx (CALL_INSN_FUNCTION_USAGE (p));
1942 i1 = emit_insn_before (PATTERN (p), loop_start);
1944 REG_NOTES (i1) = REG_NOTES (p);
1946 /* If there is a REG_EQUAL note present whose value is
1947 not loop invariant, then delete it, since it may
1948 cause problems with later optimization passes.
1949 It is possible for cse to create such notes
1950 like this as a result of record_jump_cond. */
1952 if ((temp = find_reg_note (i1, REG_EQUAL, NULL_RTX))
1953 && ! invariant_p (XEXP (temp, 0)))
1954 remove_note (i1, temp);
1959 if (loop_dump_stream)
1960 fprintf (loop_dump_stream, " moved to %d",
1964 /* This isn't needed because REG_NOTES is copied
1965 below and is wrong since P might be a PARALLEL. */
1966 if (REG_NOTES (i1) == 0
1967 && ! m->partial /* But not if it's a zero-extend clr. */
1968 && ! m->global /* and not if used outside the loop
1969 (since it might get set outside). */
1970 && CONSTANT_P (SET_SRC (PATTERN (p))))
1972 = gen_rtx (EXPR_LIST, REG_EQUAL,
1973 SET_SRC (PATTERN (p)), REG_NOTES (i1));
1976 /* If library call, now fix the REG_NOTES that contain
1977 insn pointers, namely REG_LIBCALL on FIRST
1978 and REG_RETVAL on I1. */
1979 if (temp = find_reg_note (i1, REG_RETVAL, NULL_RTX))
1981 XEXP (temp, 0) = first;
1982 temp = find_reg_note (first, REG_LIBCALL, NULL_RTX);
1983 XEXP (temp, 0) = i1;
1987 do p = NEXT_INSN (p);
1988 while (p && GET_CODE (p) == NOTE);
1991 /* The more regs we move, the less we like moving them. */
1995 /* Any other movable that loads the same register
1997 already_moved[regno] = 1;
1999 /* This reg has been moved out of one loop. */
2000 moved_once[regno] = 1;
2002 /* The reg set here is now invariant. */
2004 n_times_set[regno] = 0;
2008 /* Change the length-of-life info for the register
2009 to say it lives at least the full length of this loop.
2010 This will help guide optimizations in outer loops. */
2012 if (uid_luid[REGNO_FIRST_UID (regno)] > INSN_LUID (loop_start))
2013 /* This is the old insn before all the moved insns.
2014 We can't use the moved insn because it is out of range
2015 in uid_luid. Only the old insns have luids. */
2016 REGNO_FIRST_UID (regno) = INSN_UID (loop_start);
2017 if (uid_luid[REGNO_LAST_UID (regno)] < INSN_LUID (end))
2018 REGNO_LAST_UID (regno) = INSN_UID (end);
2020 /* Combine with this moved insn any other matching movables. */
2023 for (m1 = movables; m1; m1 = m1->next)
2028 /* Schedule the reg loaded by M1
2029 for replacement so that shares the reg of M.
2030 If the modes differ (only possible in restricted
2031 circumstances, make a SUBREG. */
2032 if (GET_MODE (m->set_dest) == GET_MODE (m1->set_dest))
2033 reg_map[m1->regno] = m->set_dest;
2036 = gen_lowpart_common (GET_MODE (m1->set_dest),
2039 /* Get rid of the matching insn
2040 and prevent further processing of it. */
2043 /* if library call, delete all insn except last, which
2045 if (temp = find_reg_note (m1->insn, REG_RETVAL,
2048 for (temp = XEXP (temp, 0); temp != m1->insn;
2049 temp = NEXT_INSN (temp))
2052 delete_insn (m1->insn);
2054 /* Any other movable that loads the same register
2056 already_moved[m1->regno] = 1;
2058 /* The reg merged here is now invariant,
2059 if the reg it matches is invariant. */
2061 n_times_set[m1->regno] = 0;
2064 else if (loop_dump_stream)
2065 fprintf (loop_dump_stream, "not desirable");
2067 else if (loop_dump_stream && !m->match)
2068 fprintf (loop_dump_stream, "not safe");
2070 if (loop_dump_stream)
2071 fprintf (loop_dump_stream, "\n");
2075 new_start = loop_start;
2077 /* Go through all the instructions in the loop, making
2078 all the register substitutions scheduled in REG_MAP. */
2079 for (p = new_start; p != end; p = NEXT_INSN (p))
2080 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
2081 || GET_CODE (p) == CALL_INSN)
2083 replace_regs (PATTERN (p), reg_map, nregs, 0);
2084 replace_regs (REG_NOTES (p), reg_map, nregs, 0);
2090 /* Scan X and replace the address of any MEM in it with ADDR.
2091 REG is the address that MEM should have before the replacement. */
2094 replace_call_address (x, reg, addr)
2097 register enum rtx_code code;
2103 code = GET_CODE (x);
2117 /* Short cut for very common case. */
2118 replace_call_address (XEXP (x, 1), reg, addr);
2122 /* Short cut for very common case. */
2123 replace_call_address (XEXP (x, 0), reg, addr);
2127 /* If this MEM uses a reg other than the one we expected,
2128 something is wrong. */
2129 if (XEXP (x, 0) != reg)
2138 fmt = GET_RTX_FORMAT (code);
2139 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2142 replace_call_address (XEXP (x, i), reg, addr);
2146 for (j = 0; j < XVECLEN (x, i); j++)
2147 replace_call_address (XVECEXP (x, i, j), reg, addr);
2153 /* Return the number of memory refs to addresses that vary
2157 count_nonfixed_reads (x)
2160 register enum rtx_code code;
2168 code = GET_CODE (x);
2182 return ((invariant_p (XEXP (x, 0)) != 1)
2183 + count_nonfixed_reads (XEXP (x, 0)));
2190 fmt = GET_RTX_FORMAT (code);
2191 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2194 value += count_nonfixed_reads (XEXP (x, i));
2198 for (j = 0; j < XVECLEN (x, i); j++)
2199 value += count_nonfixed_reads (XVECEXP (x, i, j));
2207 /* P is an instruction that sets a register to the result of a ZERO_EXTEND.
2208 Replace it with an instruction to load just the low bytes
2209 if the machine supports such an instruction,
2210 and insert above LOOP_START an instruction to clear the register. */
2213 constant_high_bytes (p, loop_start)
2217 register int insn_code_number;
2219 /* Try to change (SET (REG ...) (ZERO_EXTEND (..:B ...)))
2220 to (SET (STRICT_LOW_PART (SUBREG:B (REG...))) ...). */
2222 new = gen_rtx (SET, VOIDmode,
2223 gen_rtx (STRICT_LOW_PART, VOIDmode,
2224 gen_rtx (SUBREG, GET_MODE (XEXP (SET_SRC (PATTERN (p)), 0)),
2225 SET_DEST (PATTERN (p)),
2227 XEXP (SET_SRC (PATTERN (p)), 0));
2228 insn_code_number = recog (new, p);
2230 if (insn_code_number)
2234 /* Clear destination register before the loop. */
2235 emit_insn_before (gen_rtx (SET, VOIDmode,
2236 SET_DEST (PATTERN (p)),
2240 /* Inside the loop, just load the low part. */
2246 /* Scan a loop setting the variables `unknown_address_altered',
2247 `num_mem_sets', `loop_continue', loops_enclosed', `loop_has_call',
2248 and `loop_has_volatile'.
2249 Also, fill in the array `loop_store_mems'. */
2252 prescan_loop (start, end)
2255 register int level = 1;
2258 unknown_address_altered = 0;
2260 loop_has_volatile = 0;
2261 loop_store_mems_idx = 0;
2267 for (insn = NEXT_INSN (start); insn != NEXT_INSN (end);
2268 insn = NEXT_INSN (insn))
2270 if (GET_CODE (insn) == NOTE)
2272 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
2275 /* Count number of loops contained in this one. */
2278 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END)
2287 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_CONT)
2290 loop_continue = insn;
2293 else if (GET_CODE (insn) == CALL_INSN)
2295 if (! CONST_CALL_P (insn))
2296 unknown_address_altered = 1;
2301 if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN)
2303 if (volatile_refs_p (PATTERN (insn)))
2304 loop_has_volatile = 1;
2306 note_stores (PATTERN (insn), note_addr_stored);
2312 /* Scan the function looking for loops. Record the start and end of each loop.
2313 Also mark as invalid loops any loops that contain a setjmp or are branched
2314 to from outside the loop. */
2317 find_and_verify_loops (f)
2321 int current_loop = -1;
2325 /* If there are jumps to undefined labels,
2326 treat them as jumps out of any/all loops.
2327 This also avoids writing past end of tables when there are no loops. */
2328 uid_loop_num[0] = -1;
2330 /* Find boundaries of loops, mark which loops are contained within
2331 loops, and invalidate loops that have setjmp. */
2333 for (insn = f; insn; insn = NEXT_INSN (insn))
2335 if (GET_CODE (insn) == NOTE)
2336 switch (NOTE_LINE_NUMBER (insn))
2338 case NOTE_INSN_LOOP_BEG:
2339 loop_number_loop_starts[++next_loop] = insn;
2340 loop_number_loop_ends[next_loop] = 0;
2341 loop_outer_loop[next_loop] = current_loop;
2342 loop_invalid[next_loop] = 0;
2343 loop_number_exit_labels[next_loop] = 0;
2344 loop_number_exit_count[next_loop] = 0;
2345 current_loop = next_loop;
2348 case NOTE_INSN_SETJMP:
2349 /* In this case, we must invalidate our current loop and any
2351 for (loop = current_loop; loop != -1; loop = loop_outer_loop[loop])
2353 loop_invalid[loop] = 1;
2354 if (loop_dump_stream)
2355 fprintf (loop_dump_stream,
2356 "\nLoop at %d ignored due to setjmp.\n",
2357 INSN_UID (loop_number_loop_starts[loop]));
2361 case NOTE_INSN_LOOP_END:
2362 if (current_loop == -1)
2365 loop_number_loop_ends[current_loop] = insn;
2366 current_loop = loop_outer_loop[current_loop];
2373 /* Note that this will mark the NOTE_INSN_LOOP_END note as being in the
2374 enclosing loop, but this doesn't matter. */
2375 uid_loop_num[INSN_UID (insn)] = current_loop;
2378 /* Any loop containing a label used in an initializer must be invalidated,
2379 because it can be jumped into from anywhere. */
2381 for (label = forced_labels; label; label = XEXP (label, 1))
2385 for (loop_num = uid_loop_num[INSN_UID (XEXP (label, 0))];
2387 loop_num = loop_outer_loop[loop_num])
2388 loop_invalid[loop_num] = 1;
2391 /* Any loop containing a label used for an exception handler must be
2392 invalidated, because it can be jumped into from anywhere. */
2394 for (label = exception_handler_labels; label; label = XEXP (label, 1))
2398 for (loop_num = uid_loop_num[INSN_UID (XEXP (label, 0))];
2400 loop_num = loop_outer_loop[loop_num])
2401 loop_invalid[loop_num] = 1;
2404 /* Now scan all insn's in the function. If any JUMP_INSN branches into a
2405 loop that it is not contained within, that loop is marked invalid.
2406 If any INSN or CALL_INSN uses a label's address, then the loop containing
2407 that label is marked invalid, because it could be jumped into from
2410 Also look for blocks of code ending in an unconditional branch that
2411 exits the loop. If such a block is surrounded by a conditional
2412 branch around the block, move the block elsewhere (see below) and
2413 invert the jump to point to the code block. This may eliminate a
2414 label in our loop and will simplify processing by both us and a
2415 possible second cse pass. */
2417 for (insn = f; insn; insn = NEXT_INSN (insn))
2418 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
2420 int this_loop_num = uid_loop_num[INSN_UID (insn)];
2422 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
2424 rtx note = find_reg_note (insn, REG_LABEL, NULL_RTX);
2429 for (loop_num = uid_loop_num[INSN_UID (XEXP (note, 0))];
2431 loop_num = loop_outer_loop[loop_num])
2432 loop_invalid[loop_num] = 1;
2436 if (GET_CODE (insn) != JUMP_INSN)
2439 mark_loop_jump (PATTERN (insn), this_loop_num);
2441 /* See if this is an unconditional branch outside the loop. */
2442 if (this_loop_num != -1
2443 && (GET_CODE (PATTERN (insn)) == RETURN
2444 || (simplejump_p (insn)
2445 && (uid_loop_num[INSN_UID (JUMP_LABEL (insn))]
2447 && get_max_uid () < max_uid_for_loop)
2450 rtx our_next = next_real_insn (insn);
2452 int outer_loop = -1;
2454 /* Go backwards until we reach the start of the loop, a label,
2456 for (p = PREV_INSN (insn);
2457 GET_CODE (p) != CODE_LABEL
2458 && ! (GET_CODE (p) == NOTE
2459 && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
2460 && GET_CODE (p) != JUMP_INSN;
2464 /* Check for the case where we have a jump to an inner nested
2465 loop, and do not perform the optimization in that case. */
2467 if (JUMP_LABEL (insn))
2469 dest_loop = uid_loop_num[INSN_UID (JUMP_LABEL (insn))];
2470 if (dest_loop != -1)
2472 for (outer_loop = dest_loop; outer_loop != -1;
2473 outer_loop = loop_outer_loop[outer_loop])
2474 if (outer_loop == this_loop_num)
2479 /* Make sure that the target of P is within the current loop. */
2481 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p)
2482 && uid_loop_num[INSN_UID (JUMP_LABEL (p))] != this_loop_num)
2483 outer_loop = this_loop_num;
2485 /* If we stopped on a JUMP_INSN to the next insn after INSN,
2486 we have a block of code to try to move.
2488 We look backward and then forward from the target of INSN
2489 to find a BARRIER at the same loop depth as the target.
2490 If we find such a BARRIER, we make a new label for the start
2491 of the block, invert the jump in P and point it to that label,
2492 and move the block of code to the spot we found. */
2494 if (outer_loop == -1
2495 && GET_CODE (p) == JUMP_INSN
2496 && JUMP_LABEL (p) != 0
2497 /* Just ignore jumps to labels that were never emitted.
2498 These always indicate compilation errors. */
2499 && INSN_UID (JUMP_LABEL (p)) != 0
2501 && ! simplejump_p (p)
2502 && next_real_insn (JUMP_LABEL (p)) == our_next)
2505 = JUMP_LABEL (insn) ? JUMP_LABEL (insn) : get_last_insn ();
2506 int target_loop_num = uid_loop_num[INSN_UID (target)];
2509 for (loc = target; loc; loc = PREV_INSN (loc))
2510 if (GET_CODE (loc) == BARRIER
2511 && uid_loop_num[INSN_UID (loc)] == target_loop_num)
2515 for (loc = target; loc; loc = NEXT_INSN (loc))
2516 if (GET_CODE (loc) == BARRIER
2517 && uid_loop_num[INSN_UID (loc)] == target_loop_num)
2522 rtx cond_label = JUMP_LABEL (p);
2523 rtx new_label = get_label_after (p);
2525 /* Ensure our label doesn't go away. */
2526 LABEL_NUSES (cond_label)++;
2528 /* Verify that uid_loop_num is large enough and that
2530 if (invert_jump (p, new_label))
2534 /* Include the BARRIER after INSN and copy the
2536 new_label = squeeze_notes (new_label, NEXT_INSN (insn));
2537 reorder_insns (new_label, NEXT_INSN (insn), loc);
2539 /* All those insns are now in TARGET_LOOP_NUM. */
2540 for (q = new_label; q != NEXT_INSN (NEXT_INSN (insn));
2542 uid_loop_num[INSN_UID (q)] = target_loop_num;
2544 /* The label jumped to by INSN is no longer a loop exit.
2545 Unless INSN does not have a label (e.g., it is a
2546 RETURN insn), search loop_number_exit_labels to find
2547 its label_ref, and remove it. Also turn off
2548 LABEL_OUTSIDE_LOOP_P bit. */
2549 if (JUMP_LABEL (insn))
2554 r = loop_number_exit_labels[this_loop_num];
2555 r; q = r, r = LABEL_NEXTREF (r))
2556 if (XEXP (r, 0) == JUMP_LABEL (insn))
2558 LABEL_OUTSIDE_LOOP_P (r) = 0;
2560 LABEL_NEXTREF (q) = LABEL_NEXTREF (r);
2562 loop_number_exit_labels[this_loop_num]
2563 = LABEL_NEXTREF (r);
2567 for (loop_num = this_loop_num;
2568 loop_num != -1 && loop_num != target_loop_num;
2569 loop_num = loop_outer_loop[loop_num])
2570 loop_number_exit_count[loop_num]--;
2572 /* If we didn't find it, then something is wrong. */
2577 /* P is now a jump outside the loop, so it must be put
2578 in loop_number_exit_labels, and marked as such.
2579 The easiest way to do this is to just call
2580 mark_loop_jump again for P. */
2581 mark_loop_jump (PATTERN (p), this_loop_num);
2583 /* If INSN now jumps to the insn after it,
2585 if (JUMP_LABEL (insn) != 0
2586 && (next_real_insn (JUMP_LABEL (insn))
2587 == next_real_insn (insn)))
2591 /* Continue the loop after where the conditional
2592 branch used to jump, since the only branch insn
2593 in the block (if it still remains) is an inter-loop
2594 branch and hence needs no processing. */
2595 insn = NEXT_INSN (cond_label);
2597 if (--LABEL_NUSES (cond_label) == 0)
2598 delete_insn (cond_label);
2600 /* This loop will be continued with NEXT_INSN (insn). */
2601 insn = PREV_INSN (insn);
2608 /* If any label in X jumps to a loop different from LOOP_NUM and any of the
2609 loops it is contained in, mark the target loop invalid.
2611 For speed, we assume that X is part of a pattern of a JUMP_INSN. */
2614 mark_loop_jump (x, loop_num)
2622 switch (GET_CODE (x))
2635 /* There could be a label reference in here. */
2636 mark_loop_jump (XEXP (x, 0), loop_num);
2642 mark_loop_jump (XEXP (x, 0), loop_num);
2643 mark_loop_jump (XEXP (x, 1), loop_num);
2648 mark_loop_jump (XEXP (x, 0), loop_num);
2652 dest_loop = uid_loop_num[INSN_UID (XEXP (x, 0))];
2654 /* Link together all labels that branch outside the loop. This
2655 is used by final_[bg]iv_value and the loop unrolling code. Also
2656 mark this LABEL_REF so we know that this branch should predict
2659 /* A check to make sure the label is not in an inner nested loop,
2660 since this does not count as a loop exit. */
2661 if (dest_loop != -1)
2663 for (outer_loop = dest_loop; outer_loop != -1;
2664 outer_loop = loop_outer_loop[outer_loop])
2665 if (outer_loop == loop_num)
2671 if (loop_num != -1 && outer_loop == -1)
2673 LABEL_OUTSIDE_LOOP_P (x) = 1;
2674 LABEL_NEXTREF (x) = loop_number_exit_labels[loop_num];
2675 loop_number_exit_labels[loop_num] = x;
2677 for (outer_loop = loop_num;
2678 outer_loop != -1 && outer_loop != dest_loop;
2679 outer_loop = loop_outer_loop[outer_loop])
2680 loop_number_exit_count[outer_loop]++;
2683 /* If this is inside a loop, but not in the current loop or one enclosed
2684 by it, it invalidates at least one loop. */
2686 if (dest_loop == -1)
2689 /* We must invalidate every nested loop containing the target of this
2690 label, except those that also contain the jump insn. */
2692 for (; dest_loop != -1; dest_loop = loop_outer_loop[dest_loop])
2694 /* Stop when we reach a loop that also contains the jump insn. */
2695 for (outer_loop = loop_num; outer_loop != -1;
2696 outer_loop = loop_outer_loop[outer_loop])
2697 if (dest_loop == outer_loop)
2700 /* If we get here, we know we need to invalidate a loop. */
2701 if (loop_dump_stream && ! loop_invalid[dest_loop])
2702 fprintf (loop_dump_stream,
2703 "\nLoop at %d ignored due to multiple entry points.\n",
2704 INSN_UID (loop_number_loop_starts[dest_loop]));
2706 loop_invalid[dest_loop] = 1;
2711 /* If this is not setting pc, ignore. */
2712 if (SET_DEST (x) == pc_rtx)
2713 mark_loop_jump (SET_SRC (x), loop_num);
2717 mark_loop_jump (XEXP (x, 1), loop_num);
2718 mark_loop_jump (XEXP (x, 2), loop_num);
2723 for (i = 0; i < XVECLEN (x, 0); i++)
2724 mark_loop_jump (XVECEXP (x, 0, i), loop_num);
2728 for (i = 0; i < XVECLEN (x, 1); i++)
2729 mark_loop_jump (XVECEXP (x, 1, i), loop_num);
2733 /* Treat anything else (such as a symbol_ref)
2734 as a branch out of this loop, but not into any loop. */
2739 LABEL_OUTSIDE_LOOP_P (x) = 1;
2740 LABEL_NEXTREF (x) = loop_number_exit_labels[loop_num];
2743 loop_number_exit_labels[loop_num] = x;
2745 for (outer_loop = loop_num; outer_loop != -1;
2746 outer_loop = loop_outer_loop[outer_loop])
2747 loop_number_exit_count[outer_loop]++;
2753 /* Return nonzero if there is a label in the range from
2754 insn INSN to and including the insn whose luid is END
2755 INSN must have an assigned luid (i.e., it must not have
2756 been previously created by loop.c). */
2759 labels_in_range_p (insn, end)
2763 while (insn && INSN_LUID (insn) <= end)
2765 if (GET_CODE (insn) == CODE_LABEL)
2767 insn = NEXT_INSN (insn);
2773 /* Record that a memory reference X is being set. */
2776 note_addr_stored (x)
2781 if (x == 0 || GET_CODE (x) != MEM)
2784 /* Count number of memory writes.
2785 This affects heuristics in strength_reduce. */
2788 /* BLKmode MEM means all memory is clobbered. */
2789 if (GET_MODE (x) == BLKmode)
2790 unknown_address_altered = 1;
2792 if (unknown_address_altered)
2795 for (i = 0; i < loop_store_mems_idx; i++)
2796 if (rtx_equal_p (XEXP (loop_store_mems[i], 0), XEXP (x, 0))
2797 && MEM_IN_STRUCT_P (x) == MEM_IN_STRUCT_P (loop_store_mems[i]))
2799 /* We are storing at the same address as previously noted. Save the
2801 if (GET_MODE_SIZE (GET_MODE (x))
2802 > GET_MODE_SIZE (GET_MODE (loop_store_mems[i])))
2803 loop_store_mems[i] = x;
2807 if (i == NUM_STORES)
2808 unknown_address_altered = 1;
2810 else if (i == loop_store_mems_idx)
2811 loop_store_mems[loop_store_mems_idx++] = x;
2814 /* Return nonzero if the rtx X is invariant over the current loop.
2816 The value is 2 if we refer to something only conditionally invariant.
2818 If `unknown_address_altered' is nonzero, no memory ref is invariant.
2819 Otherwise, a memory ref is invariant if it does not conflict with
2820 anything stored in `loop_store_mems'. */
2827 register enum rtx_code code;
2829 int conditional = 0;
2833 code = GET_CODE (x);
2843 /* A LABEL_REF is normally invariant, however, if we are unrolling
2844 loops, and this label is inside the loop, then it isn't invariant.
2845 This is because each unrolled copy of the loop body will have
2846 a copy of this label. If this was invariant, then an insn loading
2847 the address of this label into a register might get moved outside
2848 the loop, and then each loop body would end up using the same label.
2850 We don't know the loop bounds here though, so just fail for all
2852 if (flag_unroll_loops)
2859 case UNSPEC_VOLATILE:
2863 /* We used to check RTX_UNCHANGING_P (x) here, but that is invalid
2864 since the reg might be set by initialization within the loop. */
2866 if ((x == frame_pointer_rtx || x == hard_frame_pointer_rtx
2867 || x == arg_pointer_rtx)
2868 && ! current_function_has_nonlocal_goto)
2872 && REGNO (x) < FIRST_PSEUDO_REGISTER && call_used_regs[REGNO (x)])
2875 if (n_times_set[REGNO (x)] < 0)
2878 return n_times_set[REGNO (x)] == 0;
2881 /* Volatile memory references must be rejected. Do this before
2882 checking for read-only items, so that volatile read-only items
2883 will be rejected also. */
2884 if (MEM_VOLATILE_P (x))
2887 /* Read-only items (such as constants in a constant pool) are
2888 invariant if their address is. */
2889 if (RTX_UNCHANGING_P (x))
2892 /* If we filled the table (or had a subroutine call), any location
2893 in memory could have been clobbered. */
2894 if (unknown_address_altered)
2897 /* See if there is any dependence between a store and this load. */
2898 for (i = loop_store_mems_idx - 1; i >= 0; i--)
2899 if (true_dependence (loop_store_mems[i], VOIDmode, x, rtx_varies_p))
2902 /* It's not invalidated by a store in memory
2903 but we must still verify the address is invariant. */
2907 /* Don't mess with insns declared volatile. */
2908 if (MEM_VOLATILE_P (x))
2916 fmt = GET_RTX_FORMAT (code);
2917 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2921 int tem = invariant_p (XEXP (x, i));
2927 else if (fmt[i] == 'E')
2930 for (j = 0; j < XVECLEN (x, i); j++)
2932 int tem = invariant_p (XVECEXP (x, i, j));
2942 return 1 + conditional;
2946 /* Return nonzero if all the insns in the loop that set REG
2947 are INSN and the immediately following insns,
2948 and if each of those insns sets REG in an invariant way
2949 (not counting uses of REG in them).
2951 The value is 2 if some of these insns are only conditionally invariant.
2953 We assume that INSN itself is the first set of REG
2954 and that its source is invariant. */
2957 consec_sets_invariant_p (reg, n_sets, insn)
2961 register rtx p = insn;
2962 register int regno = REGNO (reg);
2964 /* Number of sets we have to insist on finding after INSN. */
2965 int count = n_sets - 1;
2966 int old = n_times_set[regno];
2970 /* If N_SETS hit the limit, we can't rely on its value. */
2974 n_times_set[regno] = 0;
2978 register enum rtx_code code;
2982 code = GET_CODE (p);
2984 /* If library call, skip to end of of it. */
2985 if (code == INSN && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
2990 && (set = single_set (p))
2991 && GET_CODE (SET_DEST (set)) == REG
2992 && REGNO (SET_DEST (set)) == regno)
2994 this = invariant_p (SET_SRC (set));
2997 else if (temp = find_reg_note (p, REG_EQUAL, NULL_RTX))
2999 /* If this is a libcall, then any invariant REG_EQUAL note is OK.
3000 If this is an ordinary insn, then only CONSTANT_P REG_EQUAL
3002 this = (CONSTANT_P (XEXP (temp, 0))
3003 || (find_reg_note (p, REG_RETVAL, NULL_RTX)
3004 && invariant_p (XEXP (temp, 0))));
3011 else if (code != NOTE)
3013 n_times_set[regno] = old;
3018 n_times_set[regno] = old;
3019 /* If invariant_p ever returned 2, we return 2. */
3020 return 1 + (value & 2);
3024 /* I don't think this condition is sufficient to allow INSN
3025 to be moved, so we no longer test it. */
3027 /* Return 1 if all insns in the basic block of INSN and following INSN
3028 that set REG are invariant according to TABLE. */
3031 all_sets_invariant_p (reg, insn, table)
3035 register rtx p = insn;
3036 register int regno = REGNO (reg);
3040 register enum rtx_code code;
3042 code = GET_CODE (p);
3043 if (code == CODE_LABEL || code == JUMP_INSN)
3045 if (code == INSN && GET_CODE (PATTERN (p)) == SET
3046 && GET_CODE (SET_DEST (PATTERN (p))) == REG
3047 && REGNO (SET_DEST (PATTERN (p))) == regno)
3049 if (!invariant_p (SET_SRC (PATTERN (p)), table))
3056 /* Look at all uses (not sets) of registers in X. For each, if it is
3057 the single use, set USAGE[REGNO] to INSN; if there was a previous use in
3058 a different insn, set USAGE[REGNO] to const0_rtx. */
3061 find_single_use_in_loop (insn, x, usage)
3066 enum rtx_code code = GET_CODE (x);
3067 char *fmt = GET_RTX_FORMAT (code);
3072 = (usage[REGNO (x)] != 0 && usage[REGNO (x)] != insn)
3073 ? const0_rtx : insn;
3075 else if (code == SET)
3077 /* Don't count SET_DEST if it is a REG; otherwise count things
3078 in SET_DEST because if a register is partially modified, it won't
3079 show up as a potential movable so we don't care how USAGE is set
3081 if (GET_CODE (SET_DEST (x)) != REG)
3082 find_single_use_in_loop (insn, SET_DEST (x), usage);
3083 find_single_use_in_loop (insn, SET_SRC (x), usage);
3086 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3088 if (fmt[i] == 'e' && XEXP (x, i) != 0)
3089 find_single_use_in_loop (insn, XEXP (x, i), usage);
3090 else if (fmt[i] == 'E')
3091 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3092 find_single_use_in_loop (insn, XVECEXP (x, i, j), usage);
3096 /* Increment N_TIMES_SET at the index of each register
3097 that is modified by an insn between FROM and TO.
3098 If the value of an element of N_TIMES_SET becomes 127 or more,
3099 stop incrementing it, to avoid overflow.
3101 Store in SINGLE_USAGE[I] the single insn in which register I is
3102 used, if it is only used once. Otherwise, it is set to 0 (for no
3103 uses) or const0_rtx for more than one use. This parameter may be zero,
3104 in which case this processing is not done.
3106 Store in *COUNT_PTR the number of actual instruction
3107 in the loop. We use this to decide what is worth moving out. */
3109 /* last_set[n] is nonzero iff reg n has been set in the current basic block.
3110 In that case, it is the insn that last set reg n. */
3113 count_loop_regs_set (from, to, may_not_move, single_usage, count_ptr, nregs)
3114 register rtx from, to;
3120 register rtx *last_set = (rtx *) alloca (nregs * sizeof (rtx));
3122 register int count = 0;
3125 bzero ((char *) last_set, nregs * sizeof (rtx));
3126 for (insn = from; insn != to; insn = NEXT_INSN (insn))
3128 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
3132 /* If requested, record registers that have exactly one use. */
3135 find_single_use_in_loop (insn, PATTERN (insn), single_usage);
3137 /* Include uses in REG_EQUAL notes. */
3138 if (REG_NOTES (insn))
3139 find_single_use_in_loop (insn, REG_NOTES (insn), single_usage);
3142 if (GET_CODE (PATTERN (insn)) == CLOBBER
3143 && GET_CODE (XEXP (PATTERN (insn), 0)) == REG)
3144 /* Don't move a reg that has an explicit clobber.
3145 We might do so sometimes, but it's not worth the pain. */
3146 may_not_move[REGNO (XEXP (PATTERN (insn), 0))] = 1;
3148 if (GET_CODE (PATTERN (insn)) == SET
3149 || GET_CODE (PATTERN (insn)) == CLOBBER)
3151 dest = SET_DEST (PATTERN (insn));
3152 while (GET_CODE (dest) == SUBREG
3153 || GET_CODE (dest) == ZERO_EXTRACT
3154 || GET_CODE (dest) == SIGN_EXTRACT
3155 || GET_CODE (dest) == STRICT_LOW_PART)
3156 dest = XEXP (dest, 0);
3157 if (GET_CODE (dest) == REG)
3159 register int regno = REGNO (dest);
3160 /* If this is the first setting of this reg
3161 in current basic block, and it was set before,
3162 it must be set in two basic blocks, so it cannot
3163 be moved out of the loop. */
3164 if (n_times_set[regno] > 0 && last_set[regno] == 0)
3165 may_not_move[regno] = 1;
3166 /* If this is not first setting in current basic block,
3167 see if reg was used in between previous one and this.
3168 If so, neither one can be moved. */
3169 if (last_set[regno] != 0
3170 && reg_used_between_p (dest, last_set[regno], insn))
3171 may_not_move[regno] = 1;
3172 if (n_times_set[regno] < 127)
3173 ++n_times_set[regno];
3174 last_set[regno] = insn;
3177 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
3180 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
3182 register rtx x = XVECEXP (PATTERN (insn), 0, i);
3183 if (GET_CODE (x) == CLOBBER && GET_CODE (XEXP (x, 0)) == REG)
3184 /* Don't move a reg that has an explicit clobber.
3185 It's not worth the pain to try to do it correctly. */
3186 may_not_move[REGNO (XEXP (x, 0))] = 1;
3188 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
3190 dest = SET_DEST (x);
3191 while (GET_CODE (dest) == SUBREG
3192 || GET_CODE (dest) == ZERO_EXTRACT
3193 || GET_CODE (dest) == SIGN_EXTRACT
3194 || GET_CODE (dest) == STRICT_LOW_PART)
3195 dest = XEXP (dest, 0);
3196 if (GET_CODE (dest) == REG)
3198 register int regno = REGNO (dest);
3199 if (n_times_set[regno] > 0 && last_set[regno] == 0)
3200 may_not_move[regno] = 1;
3201 if (last_set[regno] != 0
3202 && reg_used_between_p (dest, last_set[regno], insn))
3203 may_not_move[regno] = 1;
3204 if (n_times_set[regno] < 127)
3205 ++n_times_set[regno];
3206 last_set[regno] = insn;
3213 if (GET_CODE (insn) == CODE_LABEL || GET_CODE (insn) == JUMP_INSN)
3214 bzero ((char *) last_set, nregs * sizeof (rtx));
3219 /* Given a loop that is bounded by LOOP_START and LOOP_END
3220 and that is entered at SCAN_START,
3221 return 1 if the register set in SET contained in insn INSN is used by
3222 any insn that precedes INSN in cyclic order starting
3223 from the loop entry point.
3225 We don't want to use INSN_LUID here because if we restrict INSN to those
3226 that have a valid INSN_LUID, it means we cannot move an invariant out
3227 from an inner loop past two loops. */
3230 loop_reg_used_before_p (set, insn, loop_start, scan_start, loop_end)
3231 rtx set, insn, loop_start, scan_start, loop_end;
3233 rtx reg = SET_DEST (set);
3236 /* Scan forward checking for register usage. If we hit INSN, we
3237 are done. Otherwise, if we hit LOOP_END, wrap around to LOOP_START. */
3238 for (p = scan_start; p != insn; p = NEXT_INSN (p))
3240 if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
3241 && reg_overlap_mentioned_p (reg, PATTERN (p)))
3251 /* A "basic induction variable" or biv is a pseudo reg that is set
3252 (within this loop) only by incrementing or decrementing it. */
3253 /* A "general induction variable" or giv is a pseudo reg whose
3254 value is a linear function of a biv. */
3256 /* Bivs are recognized by `basic_induction_var';
3257 Givs by `general_induct_var'. */
3259 /* Indexed by register number, indicates whether or not register is an
3260 induction variable, and if so what type. */
3262 enum iv_mode *reg_iv_type;
3264 /* Indexed by register number, contains pointer to `struct induction'
3265 if register is an induction variable. This holds general info for
3266 all induction variables. */
3268 struct induction **reg_iv_info;
3270 /* Indexed by register number, contains pointer to `struct iv_class'
3271 if register is a basic induction variable. This holds info describing
3272 the class (a related group) of induction variables that the biv belongs
3275 struct iv_class **reg_biv_class;
3277 /* The head of a list which links together (via the next field)
3278 every iv class for the current loop. */
3280 struct iv_class *loop_iv_list;
3282 /* Communication with routines called via `note_stores'. */
3284 static rtx note_insn;
3286 /* Dummy register to have non-zero DEST_REG for DEST_ADDR type givs. */
3288 static rtx addr_placeholder;
3290 /* ??? Unfinished optimizations, and possible future optimizations,
3291 for the strength reduction code. */
3293 /* ??? There is one more optimization you might be interested in doing: to
3294 allocate pseudo registers for frequently-accessed memory locations.
3295 If the same memory location is referenced each time around, it might
3296 be possible to copy it into a register before and out after.
3297 This is especially useful when the memory location is a variable which
3298 is in a stack slot because somewhere its address is taken. If the
3299 loop doesn't contain a function call and the variable isn't volatile,
3300 it is safe to keep the value in a register for the duration of the
3301 loop. One tricky thing is that the copying of the value back from the
3302 register has to be done on all exits from the loop. You need to check that
3303 all the exits from the loop go to the same place. */
3305 /* ??? The interaction of biv elimination, and recognition of 'constant'
3306 bivs, may cause problems. */
3308 /* ??? Add heuristics so that DEST_ADDR strength reduction does not cause
3309 performance problems.
3311 Perhaps don't eliminate things that can be combined with an addressing
3312 mode. Find all givs that have the same biv, mult_val, and add_val;
3313 then for each giv, check to see if its only use dies in a following
3314 memory address. If so, generate a new memory address and check to see
3315 if it is valid. If it is valid, then store the modified memory address,
3316 otherwise, mark the giv as not done so that it will get its own iv. */
3318 /* ??? Could try to optimize branches when it is known that a biv is always
3321 /* ??? When replace a biv in a compare insn, we should replace with closest
3322 giv so that an optimized branch can still be recognized by the combiner,
3323 e.g. the VAX acb insn. */
3325 /* ??? Many of the checks involving uid_luid could be simplified if regscan
3326 was rerun in loop_optimize whenever a register was added or moved.
3327 Also, some of the optimizations could be a little less conservative. */
3329 /* Perform strength reduction and induction variable elimination. */
3331 /* Pseudo registers created during this function will be beyond the last
3332 valid index in several tables including n_times_set and regno_last_uid.
3333 This does not cause a problem here, because the added registers cannot be
3334 givs outside of their loop, and hence will never be reconsidered.
3335 But scan_loop must check regnos to make sure they are in bounds. */
3338 strength_reduce (scan_start, end, loop_top, insn_count,
3339 loop_start, loop_end, unroll_p)
3353 /* This is 1 if current insn is not executed at least once for every loop
3355 int not_every_iteration = 0;
3356 /* This is 1 if current insn may be executed more than once for every
3358 int maybe_multiple = 0;
3359 /* Temporary list pointers for traversing loop_iv_list. */
3360 struct iv_class *bl, **backbl;
3361 /* Ratio of extra register life span we can justify
3362 for saving an instruction. More if loop doesn't call subroutines
3363 since in that case saving an insn makes more difference
3364 and more registers are available. */
3365 /* ??? could set this to last value of threshold in move_movables */
3366 int threshold = (loop_has_call ? 1 : 2) * (3 + n_non_fixed_regs);
3367 /* Map of pseudo-register replacements. */
3371 rtx end_insert_before;
3374 reg_iv_type = (enum iv_mode *) alloca (max_reg_before_loop
3375 * sizeof (enum iv_mode *));
3376 bzero ((char *) reg_iv_type, max_reg_before_loop * sizeof (enum iv_mode *));
3377 reg_iv_info = (struct induction **)
3378 alloca (max_reg_before_loop * sizeof (struct induction *));
3379 bzero ((char *) reg_iv_info, (max_reg_before_loop
3380 * sizeof (struct induction *)));
3381 reg_biv_class = (struct iv_class **)
3382 alloca (max_reg_before_loop * sizeof (struct iv_class *));
3383 bzero ((char *) reg_biv_class, (max_reg_before_loop
3384 * sizeof (struct iv_class *)));
3387 addr_placeholder = gen_reg_rtx (Pmode);
3389 /* Save insn immediately after the loop_end. Insns inserted after loop_end
3390 must be put before this insn, so that they will appear in the right
3391 order (i.e. loop order).
3393 If loop_end is the end of the current function, then emit a
3394 NOTE_INSN_DELETED after loop_end and set end_insert_before to the
3396 if (NEXT_INSN (loop_end) != 0)
3397 end_insert_before = NEXT_INSN (loop_end);
3399 end_insert_before = emit_note_after (NOTE_INSN_DELETED, loop_end);
3401 /* Scan through loop to find all possible bivs. */
3407 /* At end of a straight-in loop, we are done.
3408 At end of a loop entered at the bottom, scan the top. */
3409 if (p == scan_start)
3417 if (p == scan_start)
3421 if (GET_CODE (p) == INSN
3422 && (set = single_set (p))
3423 && GET_CODE (SET_DEST (set)) == REG)
3425 dest_reg = SET_DEST (set);
3426 if (REGNO (dest_reg) < max_reg_before_loop
3427 && REGNO (dest_reg) >= FIRST_PSEUDO_REGISTER
3428 && reg_iv_type[REGNO (dest_reg)] != NOT_BASIC_INDUCT)
3430 if (basic_induction_var (SET_SRC (set), GET_MODE (SET_SRC (set)),
3431 dest_reg, p, &inc_val, &mult_val))
3433 /* It is a possible basic induction variable.
3434 Create and initialize an induction structure for it. */
3437 = (struct induction *) alloca (sizeof (struct induction));
3439 record_biv (v, p, dest_reg, inc_val, mult_val,
3440 not_every_iteration, maybe_multiple);
3441 reg_iv_type[REGNO (dest_reg)] = BASIC_INDUCT;
3443 else if (REGNO (dest_reg) < max_reg_before_loop)
3444 reg_iv_type[REGNO (dest_reg)] = NOT_BASIC_INDUCT;
3448 /* Past CODE_LABEL, we get to insns that may be executed multiple
3449 times. The only way we can be sure that they can't is if every
3450 every jump insn between here and the end of the loop either
3451 returns, exits the loop, is a forward jump, or is a jump
3452 to the loop start. */
3454 if (GET_CODE (p) == CODE_LABEL)
3462 insn = NEXT_INSN (insn);
3463 if (insn == scan_start)
3471 if (insn == scan_start)
3475 if (GET_CODE (insn) == JUMP_INSN
3476 && GET_CODE (PATTERN (insn)) != RETURN
3477 && (! condjump_p (insn)
3478 || (JUMP_LABEL (insn) != 0
3479 && JUMP_LABEL (insn) != scan_start
3480 && (INSN_UID (JUMP_LABEL (insn)) >= max_uid_for_loop
3481 || INSN_UID (insn) >= max_uid_for_loop
3482 || (INSN_LUID (JUMP_LABEL (insn))
3483 < INSN_LUID (insn))))))
3491 /* Past a jump, we get to insns for which we can't count
3492 on whether they will be executed during each iteration. */
3493 /* This code appears twice in strength_reduce. There is also similar
3494 code in scan_loop. */
3495 if (GET_CODE (p) == JUMP_INSN
3496 /* If we enter the loop in the middle, and scan around to the
3497 beginning, don't set not_every_iteration for that.
3498 This can be any kind of jump, since we want to know if insns
3499 will be executed if the loop is executed. */
3500 && ! (JUMP_LABEL (p) == loop_top
3501 && ((NEXT_INSN (NEXT_INSN (p)) == loop_end && simplejump_p (p))
3502 || (NEXT_INSN (p) == loop_end && condjump_p (p)))))
3506 /* If this is a jump outside the loop, then it also doesn't
3507 matter. Check to see if the target of this branch is on the
3508 loop_number_exits_labels list. */
3510 for (label = loop_number_exit_labels[uid_loop_num[INSN_UID (loop_start)]];
3512 label = LABEL_NEXTREF (label))
3513 if (XEXP (label, 0) == JUMP_LABEL (p))
3517 not_every_iteration = 1;
3520 else if (GET_CODE (p) == NOTE)
3522 /* At the virtual top of a converted loop, insns are again known to
3523 be executed each iteration: logically, the loop begins here
3524 even though the exit code has been duplicated. */
3525 if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP && loop_depth == 0)
3526 not_every_iteration = 0;
3527 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
3529 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
3533 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
3534 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
3535 or not an insn is known to be executed each iteration of the
3536 loop, whether or not any iterations are known to occur.
3538 Therefore, if we have just passed a label and have no more labels
3539 between here and the test insn of the loop, we know these insns
3540 will be executed each iteration. */
3542 if (not_every_iteration && GET_CODE (p) == CODE_LABEL
3543 && no_labels_between_p (p, loop_end))
3544 not_every_iteration = 0;
3547 /* Scan loop_iv_list to remove all regs that proved not to be bivs.
3548 Make a sanity check against n_times_set. */
3549 for (backbl = &loop_iv_list, bl = *backbl; bl; bl = bl->next)
3551 if (reg_iv_type[bl->regno] != BASIC_INDUCT
3552 /* Above happens if register modified by subreg, etc. */
3553 /* Make sure it is not recognized as a basic induction var: */
3554 || n_times_set[bl->regno] != bl->biv_count
3555 /* If never incremented, it is invariant that we decided not to
3556 move. So leave it alone. */
3557 || ! bl->incremented)
3559 if (loop_dump_stream)
3560 fprintf (loop_dump_stream, "Reg %d: biv discarded, %s\n",
3562 (reg_iv_type[bl->regno] != BASIC_INDUCT
3563 ? "not induction variable"
3564 : (! bl->incremented ? "never incremented"
3567 reg_iv_type[bl->regno] = NOT_BASIC_INDUCT;
3574 if (loop_dump_stream)
3575 fprintf (loop_dump_stream, "Reg %d: biv verified\n", bl->regno);
3579 /* Exit if there are no bivs. */
3582 /* Can still unroll the loop anyways, but indicate that there is no
3583 strength reduction info available. */
3585 unroll_loop (loop_end, insn_count, loop_start, end_insert_before, 0);
3590 /* Find initial value for each biv by searching backwards from loop_start,
3591 halting at first label. Also record any test condition. */
3594 for (p = loop_start; p && GET_CODE (p) != CODE_LABEL; p = PREV_INSN (p))
3598 if (GET_CODE (p) == CALL_INSN)
3601 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
3602 || GET_CODE (p) == CALL_INSN)
3603 note_stores (PATTERN (p), record_initial);
3605 /* Record any test of a biv that branches around the loop if no store
3606 between it and the start of loop. We only care about tests with
3607 constants and registers and only certain of those. */
3608 if (GET_CODE (p) == JUMP_INSN
3609 && JUMP_LABEL (p) != 0
3610 && next_real_insn (JUMP_LABEL (p)) == next_real_insn (loop_end)
3611 && (test = get_condition_for_loop (p)) != 0
3612 && GET_CODE (XEXP (test, 0)) == REG
3613 && REGNO (XEXP (test, 0)) < max_reg_before_loop
3614 && (bl = reg_biv_class[REGNO (XEXP (test, 0))]) != 0
3615 && valid_initial_value_p (XEXP (test, 1), p, call_seen, loop_start)
3616 && bl->init_insn == 0)
3618 /* If an NE test, we have an initial value! */
3619 if (GET_CODE (test) == NE)
3622 bl->init_set = gen_rtx (SET, VOIDmode,
3623 XEXP (test, 0), XEXP (test, 1));
3626 bl->initial_test = test;
3630 /* Look at the each biv and see if we can say anything better about its
3631 initial value from any initializing insns set up above. (This is done
3632 in two passes to avoid missing SETs in a PARALLEL.) */
3633 for (bl = loop_iv_list; bl; bl = bl->next)
3638 if (! bl->init_insn)
3641 /* IF INIT_INSN has a REG_EQUAL or REG_EQUIV note and the value
3642 is a constant, use the value of that. */
3643 if (((note = find_reg_note (bl->init_insn, REG_EQUAL, 0)) != NULL
3644 && CONSTANT_P (XEXP (note, 0)))
3645 || ((note = find_reg_note (bl->init_insn, REG_EQUIV, 0)) != NULL
3646 && CONSTANT_P (XEXP (note, 0))))
3647 src = XEXP (note, 0);
3649 src = SET_SRC (bl->init_set);
3651 if (loop_dump_stream)
3652 fprintf (loop_dump_stream,
3653 "Biv %d initialized at insn %d: initial value ",
3654 bl->regno, INSN_UID (bl->init_insn));
3656 if ((GET_MODE (src) == GET_MODE (regno_reg_rtx[bl->regno])
3657 || GET_MODE (src) == VOIDmode)
3658 && valid_initial_value_p (src, bl->init_insn, call_seen, loop_start))
3660 bl->initial_value = src;
3662 if (loop_dump_stream)
3664 if (GET_CODE (src) == CONST_INT)
3665 fprintf (loop_dump_stream, "%d\n", INTVAL (src));
3668 print_rtl (loop_dump_stream, src);
3669 fprintf (loop_dump_stream, "\n");
3675 /* Biv initial value is not simple move,
3676 so let it keep initial value of "itself". */
3678 if (loop_dump_stream)
3679 fprintf (loop_dump_stream, "is complex\n");
3683 /* Search the loop for general induction variables. */
3685 /* A register is a giv if: it is only set once, it is a function of a
3686 biv and a constant (or invariant), and it is not a biv. */
3688 not_every_iteration = 0;
3694 /* At end of a straight-in loop, we are done.
3695 At end of a loop entered at the bottom, scan the top. */
3696 if (p == scan_start)
3704 if (p == scan_start)
3708 /* Look for a general induction variable in a register. */
3709 if (GET_CODE (p) == INSN
3710 && (set = single_set (p))
3711 && GET_CODE (SET_DEST (set)) == REG
3712 && ! may_not_optimize[REGNO (SET_DEST (set))])
3720 dest_reg = SET_DEST (set);
3721 if (REGNO (dest_reg) < FIRST_PSEUDO_REGISTER)
3724 if (/* SET_SRC is a giv. */
3725 ((benefit = general_induction_var (SET_SRC (set),
3728 /* Equivalent expression is a giv. */
3729 || ((regnote = find_reg_note (p, REG_EQUAL, NULL_RTX))
3730 && (benefit = general_induction_var (XEXP (regnote, 0),
3732 &add_val, &mult_val))))
3733 /* Don't try to handle any regs made by loop optimization.
3734 We have nothing on them in regno_first_uid, etc. */
3735 && REGNO (dest_reg) < max_reg_before_loop
3736 /* Don't recognize a BASIC_INDUCT_VAR here. */
3737 && dest_reg != src_reg
3738 /* This must be the only place where the register is set. */
3739 && (n_times_set[REGNO (dest_reg)] == 1
3740 /* or all sets must be consecutive and make a giv. */
3741 || (benefit = consec_sets_giv (benefit, p,
3743 &add_val, &mult_val))))
3747 = (struct induction *) alloca (sizeof (struct induction));
3750 /* If this is a library call, increase benefit. */
3751 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
3752 benefit += libcall_benefit (p);
3754 /* Skip the consecutive insns, if there are any. */
3755 for (count = n_times_set[REGNO (dest_reg)] - 1;
3758 /* If first insn of libcall sequence, skip to end.
3759 Do this at start of loop, since INSN is guaranteed to
3761 if (GET_CODE (p) != NOTE
3762 && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
3765 do p = NEXT_INSN (p);
3766 while (GET_CODE (p) == NOTE);
3769 record_giv (v, p, src_reg, dest_reg, mult_val, add_val, benefit,
3770 DEST_REG, not_every_iteration, NULL_PTR, loop_start,
3776 #ifndef DONT_REDUCE_ADDR
3777 /* Look for givs which are memory addresses. */
3778 /* This resulted in worse code on a VAX 8600. I wonder if it
3780 if (GET_CODE (p) == INSN)
3781 find_mem_givs (PATTERN (p), p, not_every_iteration, loop_start,
3785 /* Update the status of whether giv can derive other givs. This can
3786 change when we pass a label or an insn that updates a biv. */
3787 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
3788 || GET_CODE (p) == CODE_LABEL)
3789 update_giv_derive (p);
3791 /* Past a jump, we get to insns for which we can't count
3792 on whether they will be executed during each iteration. */
3793 /* This code appears twice in strength_reduce. There is also similar
3794 code in scan_loop. */
3795 if (GET_CODE (p) == JUMP_INSN
3796 /* If we enter the loop in the middle, and scan around to the
3797 beginning, don't set not_every_iteration for that.
3798 This can be any kind of jump, since we want to know if insns
3799 will be executed if the loop is executed. */
3800 && ! (JUMP_LABEL (p) == loop_top
3801 && ((NEXT_INSN (NEXT_INSN (p)) == loop_end && simplejump_p (p))
3802 || (NEXT_INSN (p) == loop_end && condjump_p (p)))))
3806 /* If this is a jump outside the loop, then it also doesn't
3807 matter. Check to see if the target of this branch is on the
3808 loop_number_exits_labels list. */
3810 for (label = loop_number_exit_labels[uid_loop_num[INSN_UID (loop_start)]];
3812 label = LABEL_NEXTREF (label))
3813 if (XEXP (label, 0) == JUMP_LABEL (p))
3817 not_every_iteration = 1;
3820 else if (GET_CODE (p) == NOTE)
3822 /* At the virtual top of a converted loop, insns are again known to
3823 be executed each iteration: logically, the loop begins here
3824 even though the exit code has been duplicated. */
3825 if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP && loop_depth == 0)
3826 not_every_iteration = 0;
3827 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
3829 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
3833 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
3834 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
3835 or not an insn is known to be executed each iteration of the
3836 loop, whether or not any iterations are known to occur.
3838 Therefore, if we have just passed a label and have no more labels
3839 between here and the test insn of the loop, we know these insns
3840 will be executed each iteration. */
3842 if (not_every_iteration && GET_CODE (p) == CODE_LABEL
3843 && no_labels_between_p (p, loop_end))
3844 not_every_iteration = 0;
3847 /* Try to calculate and save the number of loop iterations. This is
3848 set to zero if the actual number can not be calculated. This must
3849 be called after all giv's have been identified, since otherwise it may
3850 fail if the iteration variable is a giv. */
3852 loop_n_iterations = loop_iterations (loop_start, loop_end);
3854 /* Now for each giv for which we still don't know whether or not it is
3855 replaceable, check to see if it is replaceable because its final value
3856 can be calculated. This must be done after loop_iterations is called,
3857 so that final_giv_value will work correctly. */
3859 for (bl = loop_iv_list; bl; bl = bl->next)
3861 struct induction *v;
3863 for (v = bl->giv; v; v = v->next_iv)
3864 if (! v->replaceable && ! v->not_replaceable)
3865 check_final_value (v, loop_start, loop_end);
3868 /* Try to prove that the loop counter variable (if any) is always
3869 nonnegative; if so, record that fact with a REG_NONNEG note
3870 so that "decrement and branch until zero" insn can be used. */
3871 check_dbra_loop (loop_end, insn_count, loop_start);
3874 /* record loop-variables relevant for BCT optimization before unrolling
3875 the loop. Unrolling may update part of this information, and the
3876 correct data will be used for generating the BCT. */
3877 #ifdef HAVE_decrement_and_branch_on_count
3878 if (HAVE_decrement_and_branch_on_count)
3879 analyze_loop_iterations (loop_start, loop_end);
3883 /* Create reg_map to hold substitutions for replaceable giv regs. */
3884 reg_map = (rtx *) alloca (max_reg_before_loop * sizeof (rtx));
3885 bzero ((char *) reg_map, max_reg_before_loop * sizeof (rtx));
3887 /* Examine each iv class for feasibility of strength reduction/induction
3888 variable elimination. */
3890 for (bl = loop_iv_list; bl; bl = bl->next)
3892 struct induction *v;
3895 rtx final_value = 0;
3897 /* Test whether it will be possible to eliminate this biv
3898 provided all givs are reduced. This is possible if either
3899 the reg is not used outside the loop, or we can compute
3900 what its final value will be.
3902 For architectures with a decrement_and_branch_until_zero insn,
3903 don't do this if we put a REG_NONNEG note on the endtest for
3906 /* Compare against bl->init_insn rather than loop_start.
3907 We aren't concerned with any uses of the biv between
3908 init_insn and loop_start since these won't be affected
3909 by the value of the biv elsewhere in the function, so
3910 long as init_insn doesn't use the biv itself.
3911 March 14, 1989 -- self@bayes.arc.nasa.gov */
3913 if ((uid_luid[REGNO_LAST_UID (bl->regno)] < INSN_LUID (loop_end)
3915 && INSN_UID (bl->init_insn) < max_uid_for_loop
3916 && uid_luid[REGNO_FIRST_UID (bl->regno)] >= INSN_LUID (bl->init_insn)
3917 #ifdef HAVE_decrement_and_branch_until_zero
3920 && ! reg_mentioned_p (bl->biv->dest_reg, SET_SRC (bl->init_set)))
3921 || ((final_value = final_biv_value (bl, loop_start, loop_end))
3922 #ifdef HAVE_decrement_and_branch_until_zero
3926 bl->eliminable = maybe_eliminate_biv (bl, loop_start, end, 0,
3927 threshold, insn_count);
3930 if (loop_dump_stream)
3932 fprintf (loop_dump_stream,
3933 "Cannot eliminate biv %d.\n",
3935 fprintf (loop_dump_stream,
3936 "First use: insn %d, last use: insn %d.\n",
3937 REGNO_FIRST_UID (bl->regno),
3938 REGNO_LAST_UID (bl->regno));
3942 /* Combine all giv's for this iv_class. */
3945 /* This will be true at the end, if all givs which depend on this
3946 biv have been strength reduced.
3947 We can't (currently) eliminate the biv unless this is so. */
3950 /* Check each giv in this class to see if we will benefit by reducing
3951 it. Skip giv's combined with others. */
3952 for (v = bl->giv; v; v = v->next_iv)
3954 struct induction *tv;
3956 if (v->ignore || v->same)
3959 benefit = v->benefit;
3961 /* Reduce benefit if not replaceable, since we will insert
3962 a move-insn to replace the insn that calculates this giv.
3963 Don't do this unless the giv is a user variable, since it
3964 will often be marked non-replaceable because of the duplication
3965 of the exit code outside the loop. In such a case, the copies
3966 we insert are dead and will be deleted. So they don't have
3967 a cost. Similar situations exist. */
3968 /* ??? The new final_[bg]iv_value code does a much better job
3969 of finding replaceable giv's, and hence this code may no longer
3971 if (! v->replaceable && ! bl->eliminable
3972 && REG_USERVAR_P (v->dest_reg))
3973 benefit -= copy_cost;
3975 /* Decrease the benefit to count the add-insns that we will
3976 insert to increment the reduced reg for the giv. */
3977 benefit -= add_cost * bl->biv_count;
3979 /* Decide whether to strength-reduce this giv or to leave the code
3980 unchanged (recompute it from the biv each time it is used).
3981 This decision can be made independently for each giv. */
3984 /* Attempt to guess whether autoincrement will handle some of the
3985 new add insns; if so, increase BENEFIT (undo the subtraction of
3986 add_cost that was done above). */
3987 if (v->giv_type == DEST_ADDR
3988 && GET_CODE (v->mult_val) == CONST_INT)
3990 #if defined (HAVE_POST_INCREMENT) || defined (HAVE_PRE_INCREMENT)
3991 if (INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
3992 benefit += add_cost * bl->biv_count;
3994 #if defined (HAVE_POST_DECREMENT) || defined (HAVE_PRE_DECREMENT)
3995 if (-INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
3996 benefit += add_cost * bl->biv_count;
4001 /* If an insn is not to be strength reduced, then set its ignore
4002 flag, and clear all_reduced. */
4004 /* A giv that depends on a reversed biv must be reduced if it is
4005 used after the loop exit, otherwise, it would have the wrong
4006 value after the loop exit. To make it simple, just reduce all
4007 of such giv's whether or not we know they are used after the loop
4010 if ( ! flag_reduce_all_givs && v->lifetime * threshold * benefit < insn_count
4013 if (loop_dump_stream)
4014 fprintf (loop_dump_stream,
4015 "giv of insn %d not worth while, %d vs %d.\n",
4017 v->lifetime * threshold * benefit, insn_count);
4023 /* Check that we can increment the reduced giv without a
4024 multiply insn. If not, reject it. */
4026 for (tv = bl->biv; tv; tv = tv->next_iv)
4027 if (tv->mult_val == const1_rtx
4028 && ! product_cheap_p (tv->add_val, v->mult_val))
4030 if (loop_dump_stream)
4031 fprintf (loop_dump_stream,
4032 "giv of insn %d: would need a multiply.\n",
4033 INSN_UID (v->insn));
4041 /* Reduce each giv that we decided to reduce. */
4043 for (v = bl->giv; v; v = v->next_iv)
4045 struct induction *tv;
4046 if (! v->ignore && v->same == 0)
4048 int auto_inc_opt = 0;
4050 v->new_reg = gen_reg_rtx (v->mode);
4053 /* If the target has auto-increment addressing modes, and
4054 this is an address giv, then try to put the increment
4055 immediately after its use, so that flow can create an
4056 auto-increment addressing mode. */
4057 if (v->giv_type == DEST_ADDR && bl->biv_count == 1
4058 && bl->biv->always_executed && ! bl->biv->maybe_multiple
4059 /* We don't handle reversed biv's because bl->biv->insn
4060 does not have a valid INSN_LUID. */
4062 && v->always_executed && ! v->maybe_multiple)
4064 /* If other giv's have been combined with this one, then
4065 this will work only if all uses of the other giv's occur
4066 before this giv's insn. This is difficult to check.
4068 We simplify this by looking for the common case where
4069 there is one DEST_REG giv, and this giv's insn is the
4070 last use of the dest_reg of that DEST_REG giv. If the
4071 the increment occurs after the address giv, then we can
4072 perform the optimization. (Otherwise, the increment
4073 would have to go before other_giv, and we would not be
4074 able to combine it with the address giv to get an
4075 auto-inc address.) */
4076 if (v->combined_with)
4078 struct induction *other_giv = 0;
4080 for (tv = bl->giv; tv; tv = tv->next_iv)
4088 if (! tv && other_giv
4089 && REGNO (other_giv->dest_reg) < max_reg_before_loop
4090 && (REGNO_LAST_UID (REGNO (other_giv->dest_reg))
4091 == INSN_UID (v->insn))
4092 && INSN_LUID (v->insn) < INSN_LUID (bl->biv->insn))
4095 /* Check for case where increment is before the the address
4097 else if (INSN_LUID (v->insn) > INSN_LUID (bl->biv->insn))
4106 /* We can't put an insn immediately after one setting
4107 cc0, or immediately before one using cc0. */
4108 if ((auto_inc_opt == 1 && sets_cc0_p (PATTERN (v->insn)))
4109 || (auto_inc_opt == -1
4110 && (prev = prev_nonnote_insn (v->insn)) != 0
4111 && GET_RTX_CLASS (GET_CODE (prev)) == 'i'
4112 && sets_cc0_p (PATTERN (prev))))
4118 v->auto_inc_opt = 1;
4122 /* For each place where the biv is incremented, add an insn
4123 to increment the new, reduced reg for the giv. */
4124 for (tv = bl->biv; tv; tv = tv->next_iv)
4129 insert_before = tv->insn;
4130 else if (auto_inc_opt == 1)
4131 insert_before = NEXT_INSN (v->insn);
4133 insert_before = v->insn;
4135 if (tv->mult_val == const1_rtx)
4136 emit_iv_add_mult (tv->add_val, v->mult_val,
4137 v->new_reg, v->new_reg, insert_before);
4138 else /* tv->mult_val == const0_rtx */
4139 /* A multiply is acceptable here
4140 since this is presumed to be seldom executed. */
4141 emit_iv_add_mult (tv->add_val, v->mult_val,
4142 v->add_val, v->new_reg, insert_before);
4145 /* Add code at loop start to initialize giv's reduced reg. */
4147 emit_iv_add_mult (bl->initial_value, v->mult_val,
4148 v->add_val, v->new_reg, loop_start);
4152 /* Rescan all givs. If a giv is the same as a giv not reduced, mark it
4155 For each giv register that can be reduced now: if replaceable,
4156 substitute reduced reg wherever the old giv occurs;
4157 else add new move insn "giv_reg = reduced_reg".
4159 Also check for givs whose first use is their definition and whose
4160 last use is the definition of another giv. If so, it is likely
4161 dead and should not be used to eliminate a biv. */
4162 for (v = bl->giv; v; v = v->next_iv)
4164 if (v->same && v->same->ignore)
4170 if (v->giv_type == DEST_REG
4171 && REGNO_FIRST_UID (REGNO (v->dest_reg)) == INSN_UID (v->insn))
4173 struct induction *v1;
4175 for (v1 = bl->giv; v1; v1 = v1->next_iv)
4176 if (REGNO_LAST_UID (REGNO (v->dest_reg)) == INSN_UID (v1->insn))
4180 /* Update expression if this was combined, in case other giv was
4183 v->new_reg = replace_rtx (v->new_reg,
4184 v->same->dest_reg, v->same->new_reg);
4186 if (v->giv_type == DEST_ADDR)
4187 /* Store reduced reg as the address in the memref where we found
4189 validate_change (v->insn, v->location, v->new_reg, 0);
4190 else if (v->replaceable)
4192 reg_map[REGNO (v->dest_reg)] = v->new_reg;
4195 /* I can no longer duplicate the original problem. Perhaps
4196 this is unnecessary now? */
4198 /* Replaceable; it isn't strictly necessary to delete the old
4199 insn and emit a new one, because v->dest_reg is now dead.
4201 However, especially when unrolling loops, the special
4202 handling for (set REG0 REG1) in the second cse pass may
4203 make v->dest_reg live again. To avoid this problem, emit
4204 an insn to set the original giv reg from the reduced giv.
4205 We can not delete the original insn, since it may be part
4206 of a LIBCALL, and the code in flow that eliminates dead
4207 libcalls will fail if it is deleted. */
4208 emit_insn_after (gen_move_insn (v->dest_reg, v->new_reg),
4214 /* Not replaceable; emit an insn to set the original giv reg from
4215 the reduced giv, same as above. */
4216 emit_insn_after (gen_move_insn (v->dest_reg, v->new_reg),
4220 /* When a loop is reversed, givs which depend on the reversed
4221 biv, and which are live outside the loop, must be set to their
4222 correct final value. This insn is only needed if the giv is
4223 not replaceable. The correct final value is the same as the
4224 value that the giv starts the reversed loop with. */
4225 if (bl->reversed && ! v->replaceable)
4226 emit_iv_add_mult (bl->initial_value, v->mult_val,
4227 v->add_val, v->dest_reg, end_insert_before);
4228 else if (v->final_value)
4232 /* If the loop has multiple exits, emit the insn before the
4233 loop to ensure that it will always be executed no matter
4234 how the loop exits. Otherwise, emit the insn after the loop,
4235 since this is slightly more efficient. */
4236 if (loop_number_exit_count[uid_loop_num[INSN_UID (loop_start)]])
4237 insert_before = loop_start;
4239 insert_before = end_insert_before;
4240 emit_insn_before (gen_move_insn (v->dest_reg, v->final_value),
4244 /* If the insn to set the final value of the giv was emitted
4245 before the loop, then we must delete the insn inside the loop
4246 that sets it. If this is a LIBCALL, then we must delete
4247 every insn in the libcall. Note, however, that
4248 final_giv_value will only succeed when there are multiple
4249 exits if the giv is dead at each exit, hence it does not
4250 matter that the original insn remains because it is dead
4252 /* Delete the insn inside the loop that sets the giv since
4253 the giv is now set before (or after) the loop. */
4254 delete_insn (v->insn);
4258 if (loop_dump_stream)
4260 fprintf (loop_dump_stream, "giv at %d reduced to ",
4261 INSN_UID (v->insn));
4262 print_rtl (loop_dump_stream, v->new_reg);
4263 fprintf (loop_dump_stream, "\n");
4267 /* All the givs based on the biv bl have been reduced if they
4270 /* For each giv not marked as maybe dead that has been combined with a
4271 second giv, clear any "maybe dead" mark on that second giv.
4272 v->new_reg will either be or refer to the register of the giv it
4275 Doing this clearing avoids problems in biv elimination where a
4276 giv's new_reg is a complex value that can't be put in the insn but
4277 the giv combined with (with a reg as new_reg) is marked maybe_dead.
4278 Since the register will be used in either case, we'd prefer it be
4279 used from the simpler giv. */
4281 for (v = bl->giv; v; v = v->next_iv)
4282 if (! v->maybe_dead && v->same)
4283 v->same->maybe_dead = 0;
4285 /* Try to eliminate the biv, if it is a candidate.
4286 This won't work if ! all_reduced,
4287 since the givs we planned to use might not have been reduced.
4289 We have to be careful that we didn't initially think we could eliminate
4290 this biv because of a giv that we now think may be dead and shouldn't
4291 be used as a biv replacement.
4293 Also, there is the possibility that we may have a giv that looks
4294 like it can be used to eliminate a biv, but the resulting insn
4295 isn't valid. This can happen, for example, on the 88k, where a
4296 JUMP_INSN can compare a register only with zero. Attempts to
4297 replace it with a compare with a constant will fail.
4299 Note that in cases where this call fails, we may have replaced some
4300 of the occurrences of the biv with a giv, but no harm was done in
4301 doing so in the rare cases where it can occur. */
4303 if (all_reduced == 1 && bl->eliminable
4304 && maybe_eliminate_biv (bl, loop_start, end, 1,
4305 threshold, insn_count))
4308 /* ?? If we created a new test to bypass the loop entirely,
4309 or otherwise drop straight in, based on this test, then
4310 we might want to rewrite it also. This way some later
4311 pass has more hope of removing the initialization of this
4314 /* If final_value != 0, then the biv may be used after loop end
4315 and we must emit an insn to set it just in case.
4317 Reversed bivs already have an insn after the loop setting their
4318 value, so we don't need another one. We can't calculate the
4319 proper final value for such a biv here anyways. */
4320 if (final_value != 0 && ! bl->reversed)
4324 /* If the loop has multiple exits, emit the insn before the
4325 loop to ensure that it will always be executed no matter
4326 how the loop exits. Otherwise, emit the insn after the
4327 loop, since this is slightly more efficient. */
4328 if (loop_number_exit_count[uid_loop_num[INSN_UID (loop_start)]])
4329 insert_before = loop_start;
4331 insert_before = end_insert_before;
4333 emit_insn_before (gen_move_insn (bl->biv->dest_reg, final_value),
4338 /* Delete all of the instructions inside the loop which set
4339 the biv, as they are all dead. If is safe to delete them,
4340 because an insn setting a biv will never be part of a libcall. */
4341 /* However, deleting them will invalidate the regno_last_uid info,
4342 so keeping them around is more convenient. Final_biv_value
4343 will only succeed when there are multiple exits if the biv
4344 is dead at each exit, hence it does not matter that the original
4345 insn remains, because it is dead anyways. */
4346 for (v = bl->biv; v; v = v->next_iv)
4347 delete_insn (v->insn);
4350 if (loop_dump_stream)
4351 fprintf (loop_dump_stream, "Reg %d: biv eliminated\n",
4356 /* Go through all the instructions in the loop, making all the
4357 register substitutions scheduled in REG_MAP. */
4359 for (p = loop_start; p != end; p = NEXT_INSN (p))
4360 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
4361 || GET_CODE (p) == CALL_INSN)
4363 replace_regs (PATTERN (p), reg_map, max_reg_before_loop, 0);
4364 replace_regs (REG_NOTES (p), reg_map, max_reg_before_loop, 0);
4368 /* Unroll loops from within strength reduction so that we can use the
4369 induction variable information that strength_reduce has already
4373 unroll_loop (loop_end, insn_count, loop_start, end_insert_before, 1);
4376 /* instrument the loop with bct insn */
4377 #ifdef HAVE_decrement_and_branch_on_count
4378 if (HAVE_decrement_and_branch_on_count)
4379 insert_bct (loop_start, loop_end);
4383 if (loop_dump_stream)
4384 fprintf (loop_dump_stream, "\n");
4387 /* Return 1 if X is a valid source for an initial value (or as value being
4388 compared against in an initial test).
4390 X must be either a register or constant and must not be clobbered between
4391 the current insn and the start of the loop.
4393 INSN is the insn containing X. */
4396 valid_initial_value_p (x, insn, call_seen, loop_start)
4405 /* Only consider pseudos we know about initialized in insns whose luids
4407 if (GET_CODE (x) != REG
4408 || REGNO (x) >= max_reg_before_loop)
4411 /* Don't use call-clobbered registers across a call which clobbers it. On
4412 some machines, don't use any hard registers at all. */
4413 if (REGNO (x) < FIRST_PSEUDO_REGISTER
4414 && (SMALL_REGISTER_CLASSES
4415 || (call_used_regs[REGNO (x)] && call_seen)))
4418 /* Don't use registers that have been clobbered before the start of the
4420 if (reg_set_between_p (x, insn, loop_start))
4426 /* Scan X for memory refs and check each memory address
4427 as a possible giv. INSN is the insn whose pattern X comes from.
4428 NOT_EVERY_ITERATION is 1 if the insn might not be executed during
4429 every loop iteration. */
4432 find_mem_givs (x, insn, not_every_iteration, loop_start, loop_end)
4435 int not_every_iteration;
4436 rtx loop_start, loop_end;
4439 register enum rtx_code code;
4445 code = GET_CODE (x);
4469 benefit = general_induction_var (XEXP (x, 0),
4470 &src_reg, &add_val, &mult_val);
4472 /* Don't make a DEST_ADDR giv with mult_val == 1 && add_val == 0.
4473 Such a giv isn't useful. */
4474 if (benefit > 0 && (mult_val != const1_rtx || add_val != const0_rtx))
4476 /* Found one; record it. */
4478 = (struct induction *) oballoc (sizeof (struct induction));
4480 record_giv (v, insn, src_reg, addr_placeholder, mult_val,
4481 add_val, benefit, DEST_ADDR, not_every_iteration,
4482 &XEXP (x, 0), loop_start, loop_end);
4484 v->mem_mode = GET_MODE (x);
4493 /* Recursively scan the subexpressions for other mem refs. */
4495 fmt = GET_RTX_FORMAT (code);
4496 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4498 find_mem_givs (XEXP (x, i), insn, not_every_iteration, loop_start,
4500 else if (fmt[i] == 'E')
4501 for (j = 0; j < XVECLEN (x, i); j++)
4502 find_mem_givs (XVECEXP (x, i, j), insn, not_every_iteration,
4503 loop_start, loop_end);
4506 /* Fill in the data about one biv update.
4507 V is the `struct induction' in which we record the biv. (It is
4508 allocated by the caller, with alloca.)
4509 INSN is the insn that sets it.
4510 DEST_REG is the biv's reg.
4512 MULT_VAL is const1_rtx if the biv is being incremented here, in which case
4513 INC_VAL is the increment. Otherwise, MULT_VAL is const0_rtx and the biv is
4514 being set to INC_VAL.
4516 NOT_EVERY_ITERATION is nonzero if this biv update is not know to be
4517 executed every iteration; MAYBE_MULTIPLE is nonzero if this biv update
4518 can be executed more than once per iteration. If MAYBE_MULTIPLE
4519 and NOT_EVERY_ITERATION are both zero, we know that the biv update is
4520 executed exactly once per iteration. */
4523 record_biv (v, insn, dest_reg, inc_val, mult_val,
4524 not_every_iteration, maybe_multiple)
4525 struct induction *v;
4530 int not_every_iteration;
4533 struct iv_class *bl;
4536 v->src_reg = dest_reg;
4537 v->dest_reg = dest_reg;
4538 v->mult_val = mult_val;
4539 v->add_val = inc_val;
4540 v->mode = GET_MODE (dest_reg);
4541 v->always_computable = ! not_every_iteration;
4542 v->always_executed = ! not_every_iteration;
4543 v->maybe_multiple = maybe_multiple;
4545 /* Add this to the reg's iv_class, creating a class
4546 if this is the first incrementation of the reg. */
4548 bl = reg_biv_class[REGNO (dest_reg)];
4551 /* Create and initialize new iv_class. */
4553 bl = (struct iv_class *) oballoc (sizeof (struct iv_class));
4555 bl->regno = REGNO (dest_reg);
4561 /* Set initial value to the reg itself. */
4562 bl->initial_value = dest_reg;
4563 /* We haven't seen the initializing insn yet */
4566 bl->initial_test = 0;
4567 bl->incremented = 0;
4571 bl->total_benefit = 0;
4573 /* Add this class to loop_iv_list. */
4574 bl->next = loop_iv_list;
4577 /* Put it in the array of biv register classes. */
4578 reg_biv_class[REGNO (dest_reg)] = bl;
4581 /* Update IV_CLASS entry for this biv. */
4582 v->next_iv = bl->biv;
4585 if (mult_val == const1_rtx)
4586 bl->incremented = 1;
4588 if (loop_dump_stream)
4590 fprintf (loop_dump_stream,
4591 "Insn %d: possible biv, reg %d,",
4592 INSN_UID (insn), REGNO (dest_reg));
4593 if (GET_CODE (inc_val) == CONST_INT)
4594 fprintf (loop_dump_stream, " const = %d\n",
4598 fprintf (loop_dump_stream, " const = ");
4599 print_rtl (loop_dump_stream, inc_val);
4600 fprintf (loop_dump_stream, "\n");
4605 /* Fill in the data about one giv.
4606 V is the `struct induction' in which we record the giv. (It is
4607 allocated by the caller, with alloca.)
4608 INSN is the insn that sets it.
4609 BENEFIT estimates the savings from deleting this insn.
4610 TYPE is DEST_REG or DEST_ADDR; it says whether the giv is computed
4611 into a register or is used as a memory address.
4613 SRC_REG is the biv reg which the giv is computed from.
4614 DEST_REG is the giv's reg (if the giv is stored in a reg).
4615 MULT_VAL and ADD_VAL are the coefficients used to compute the giv.
4616 LOCATION points to the place where this giv's value appears in INSN. */
4619 record_giv (v, insn, src_reg, dest_reg, mult_val, add_val, benefit,
4620 type, not_every_iteration, location, loop_start, loop_end)
4621 struct induction *v;
4625 rtx mult_val, add_val;
4628 int not_every_iteration;
4630 rtx loop_start, loop_end;
4632 struct induction *b;
4633 struct iv_class *bl;
4634 rtx set = single_set (insn);
4638 v->src_reg = src_reg;
4640 v->dest_reg = dest_reg;
4641 v->mult_val = mult_val;
4642 v->add_val = add_val;
4643 v->benefit = benefit;
4644 v->location = location;
4646 v->combined_with = 0;
4647 v->maybe_multiple = 0;
4649 v->derive_adjustment = 0;
4655 v->auto_inc_opt = 0;
4659 /* The v->always_computable field is used in update_giv_derive, to
4660 determine whether a giv can be used to derive another giv. For a
4661 DEST_REG giv, INSN computes a new value for the giv, so its value
4662 isn't computable if INSN insn't executed every iteration.
4663 However, for a DEST_ADDR giv, INSN merely uses the value of the giv;
4664 it does not compute a new value. Hence the value is always computable
4665 regardless of whether INSN is executed each iteration. */
4667 if (type == DEST_ADDR)
4668 v->always_computable = 1;
4670 v->always_computable = ! not_every_iteration;
4672 v->always_executed = ! not_every_iteration;
4674 if (type == DEST_ADDR)
4676 v->mode = GET_MODE (*location);
4680 else /* type == DEST_REG */
4682 v->mode = GET_MODE (SET_DEST (set));
4684 v->lifetime = (uid_luid[REGNO_LAST_UID (REGNO (dest_reg))]
4685 - uid_luid[REGNO_FIRST_UID (REGNO (dest_reg))]);
4687 v->times_used = n_times_used[REGNO (dest_reg)];
4689 /* If the lifetime is zero, it means that this register is
4690 really a dead store. So mark this as a giv that can be
4691 ignored. This will not prevent the biv from being eliminated. */
4692 if (v->lifetime == 0)
4695 reg_iv_type[REGNO (dest_reg)] = GENERAL_INDUCT;
4696 reg_iv_info[REGNO (dest_reg)] = v;
4699 /* Add the giv to the class of givs computed from one biv. */
4701 bl = reg_biv_class[REGNO (src_reg)];
4704 v->next_iv = bl->giv;
4706 /* Don't count DEST_ADDR. This is supposed to count the number of
4707 insns that calculate givs. */
4708 if (type == DEST_REG)
4710 bl->total_benefit += benefit;
4713 /* Fatal error, biv missing for this giv? */
4716 if (type == DEST_ADDR)
4720 /* The giv can be replaced outright by the reduced register only if all
4721 of the following conditions are true:
4722 - the insn that sets the giv is always executed on any iteration
4723 on which the giv is used at all
4724 (there are two ways to deduce this:
4725 either the insn is executed on every iteration,
4726 or all uses follow that insn in the same basic block),
4727 - the giv is not used outside the loop
4728 - no assignments to the biv occur during the giv's lifetime. */
4730 if (REGNO_FIRST_UID (REGNO (dest_reg)) == INSN_UID (insn)
4731 /* Previous line always fails if INSN was moved by loop opt. */
4732 && uid_luid[REGNO_LAST_UID (REGNO (dest_reg))] < INSN_LUID (loop_end)
4733 && (! not_every_iteration
4734 || last_use_this_basic_block (dest_reg, insn)))
4736 /* Now check that there are no assignments to the biv within the
4737 giv's lifetime. This requires two separate checks. */
4739 /* Check each biv update, and fail if any are between the first
4740 and last use of the giv.
4742 If this loop contains an inner loop that was unrolled, then
4743 the insn modifying the biv may have been emitted by the loop
4744 unrolling code, and hence does not have a valid luid. Just
4745 mark the biv as not replaceable in this case. It is not very
4746 useful as a biv, because it is used in two different loops.
4747 It is very unlikely that we would be able to optimize the giv
4748 using this biv anyways. */
4751 for (b = bl->biv; b; b = b->next_iv)
4753 if (INSN_UID (b->insn) >= max_uid_for_loop
4754 || ((uid_luid[INSN_UID (b->insn)]
4755 >= uid_luid[REGNO_FIRST_UID (REGNO (dest_reg))])
4756 && (uid_luid[INSN_UID (b->insn)]
4757 <= uid_luid[REGNO_LAST_UID (REGNO (dest_reg))])))
4760 v->not_replaceable = 1;
4765 /* If there are any backwards branches that go from after the
4766 biv update to before it, then this giv is not replaceable. */
4768 for (b = bl->biv; b; b = b->next_iv)
4769 if (back_branch_in_range_p (b->insn, loop_start, loop_end))
4772 v->not_replaceable = 1;
4778 /* May still be replaceable, we don't have enough info here to
4781 v->not_replaceable = 0;
4785 if (loop_dump_stream)
4787 if (type == DEST_REG)
4788 fprintf (loop_dump_stream, "Insn %d: giv reg %d",
4789 INSN_UID (insn), REGNO (dest_reg));
4791 fprintf (loop_dump_stream, "Insn %d: dest address",
4794 fprintf (loop_dump_stream, " src reg %d benefit %d",
4795 REGNO (src_reg), v->benefit);
4796 fprintf (loop_dump_stream, " used %d lifetime %d",
4797 v->times_used, v->lifetime);
4800 fprintf (loop_dump_stream, " replaceable");
4802 if (GET_CODE (mult_val) == CONST_INT)
4803 fprintf (loop_dump_stream, " mult %d",
4807 fprintf (loop_dump_stream, " mult ");
4808 print_rtl (loop_dump_stream, mult_val);
4811 if (GET_CODE (add_val) == CONST_INT)
4812 fprintf (loop_dump_stream, " add %d",
4816 fprintf (loop_dump_stream, " add ");
4817 print_rtl (loop_dump_stream, add_val);
4821 if (loop_dump_stream)
4822 fprintf (loop_dump_stream, "\n");
4827 /* All this does is determine whether a giv can be made replaceable because
4828 its final value can be calculated. This code can not be part of record_giv
4829 above, because final_giv_value requires that the number of loop iterations
4830 be known, and that can not be accurately calculated until after all givs
4831 have been identified. */
4834 check_final_value (v, loop_start, loop_end)
4835 struct induction *v;
4836 rtx loop_start, loop_end;
4838 struct iv_class *bl;
4839 rtx final_value = 0;
4841 bl = reg_biv_class[REGNO (v->src_reg)];
4843 /* DEST_ADDR givs will never reach here, because they are always marked
4844 replaceable above in record_giv. */
4846 /* The giv can be replaced outright by the reduced register only if all
4847 of the following conditions are true:
4848 - the insn that sets the giv is always executed on any iteration
4849 on which the giv is used at all
4850 (there are two ways to deduce this:
4851 either the insn is executed on every iteration,
4852 or all uses follow that insn in the same basic block),
4853 - its final value can be calculated (this condition is different
4854 than the one above in record_giv)
4855 - no assignments to the biv occur during the giv's lifetime. */
4858 /* This is only called now when replaceable is known to be false. */
4859 /* Clear replaceable, so that it won't confuse final_giv_value. */
4863 if ((final_value = final_giv_value (v, loop_start, loop_end))
4864 && (v->always_computable || last_use_this_basic_block (v->dest_reg, v->insn)))
4866 int biv_increment_seen = 0;
4872 /* When trying to determine whether or not a biv increment occurs
4873 during the lifetime of the giv, we can ignore uses of the variable
4874 outside the loop because final_value is true. Hence we can not
4875 use regno_last_uid and regno_first_uid as above in record_giv. */
4877 /* Search the loop to determine whether any assignments to the
4878 biv occur during the giv's lifetime. Start with the insn
4879 that sets the giv, and search around the loop until we come
4880 back to that insn again.
4882 Also fail if there is a jump within the giv's lifetime that jumps
4883 to somewhere outside the lifetime but still within the loop. This
4884 catches spaghetti code where the execution order is not linear, and
4885 hence the above test fails. Here we assume that the giv lifetime
4886 does not extend from one iteration of the loop to the next, so as
4887 to make the test easier. Since the lifetime isn't known yet,
4888 this requires two loops. See also record_giv above. */
4890 last_giv_use = v->insn;
4896 p = NEXT_INSN (loop_start);
4900 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
4901 || GET_CODE (p) == CALL_INSN)
4903 if (biv_increment_seen)
4905 if (reg_mentioned_p (v->dest_reg, PATTERN (p)))
4908 v->not_replaceable = 1;
4912 else if (reg_set_p (v->src_reg, PATTERN (p)))
4913 biv_increment_seen = 1;
4914 else if (reg_mentioned_p (v->dest_reg, PATTERN (p)))
4919 /* Now that the lifetime of the giv is known, check for branches
4920 from within the lifetime to outside the lifetime if it is still
4930 p = NEXT_INSN (loop_start);
4931 if (p == last_giv_use)
4934 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p)
4935 && LABEL_NAME (JUMP_LABEL (p))
4936 && ((INSN_UID (JUMP_LABEL (p)) >= max_uid_for_loop)
4937 || (INSN_UID (v->insn) >= max_uid_for_loop)
4938 || (INSN_UID (last_giv_use) >= max_uid_for_loop)
4939 || (INSN_LUID (JUMP_LABEL (p)) < INSN_LUID (v->insn)
4940 && INSN_LUID (JUMP_LABEL (p)) > INSN_LUID (loop_start))
4941 || (INSN_LUID (JUMP_LABEL (p)) > INSN_LUID (last_giv_use)
4942 && INSN_LUID (JUMP_LABEL (p)) < INSN_LUID (loop_end))))
4945 v->not_replaceable = 1;
4947 if (loop_dump_stream)
4948 fprintf (loop_dump_stream,
4949 "Found branch outside giv lifetime.\n");
4956 /* If it is replaceable, then save the final value. */
4958 v->final_value = final_value;
4961 if (loop_dump_stream && v->replaceable)
4962 fprintf (loop_dump_stream, "Insn %d: giv reg %d final_value replaceable\n",
4963 INSN_UID (v->insn), REGNO (v->dest_reg));
4966 /* Update the status of whether a giv can derive other givs.
4968 We need to do something special if there is or may be an update to the biv
4969 between the time the giv is defined and the time it is used to derive
4972 In addition, a giv that is only conditionally set is not allowed to
4973 derive another giv once a label has been passed.
4975 The cases we look at are when a label or an update to a biv is passed. */
4978 update_giv_derive (p)
4981 struct iv_class *bl;
4982 struct induction *biv, *giv;
4986 /* Search all IV classes, then all bivs, and finally all givs.
4988 There are three cases we are concerned with. First we have the situation
4989 of a giv that is only updated conditionally. In that case, it may not
4990 derive any givs after a label is passed.
4992 The second case is when a biv update occurs, or may occur, after the
4993 definition of a giv. For certain biv updates (see below) that are
4994 known to occur between the giv definition and use, we can adjust the
4995 giv definition. For others, or when the biv update is conditional,
4996 we must prevent the giv from deriving any other givs. There are two
4997 sub-cases within this case.
4999 If this is a label, we are concerned with any biv update that is done
5000 conditionally, since it may be done after the giv is defined followed by
5001 a branch here (actually, we need to pass both a jump and a label, but
5002 this extra tracking doesn't seem worth it).
5004 If this is a jump, we are concerned about any biv update that may be
5005 executed multiple times. We are actually only concerned about
5006 backward jumps, but it is probably not worth performing the test
5007 on the jump again here.
5009 If this is a biv update, we must adjust the giv status to show that a
5010 subsequent biv update was performed. If this adjustment cannot be done,
5011 the giv cannot derive further givs. */
5013 for (bl = loop_iv_list; bl; bl = bl->next)
5014 for (biv = bl->biv; biv; biv = biv->next_iv)
5015 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN
5018 for (giv = bl->giv; giv; giv = giv->next_iv)
5020 /* If cant_derive is already true, there is no point in
5021 checking all of these conditions again. */
5022 if (giv->cant_derive)
5025 /* If this giv is conditionally set and we have passed a label,
5026 it cannot derive anything. */
5027 if (GET_CODE (p) == CODE_LABEL && ! giv->always_computable)
5028 giv->cant_derive = 1;
5030 /* Skip givs that have mult_val == 0, since
5031 they are really invariants. Also skip those that are
5032 replaceable, since we know their lifetime doesn't contain
5034 else if (giv->mult_val == const0_rtx || giv->replaceable)
5037 /* The only way we can allow this giv to derive another
5038 is if this is a biv increment and we can form the product
5039 of biv->add_val and giv->mult_val. In this case, we will
5040 be able to compute a compensation. */
5041 else if (biv->insn == p)
5045 if (biv->mult_val == const1_rtx)
5046 tem = simplify_giv_expr (gen_rtx (MULT, giv->mode,
5051 if (tem && giv->derive_adjustment)
5052 tem = simplify_giv_expr (gen_rtx (PLUS, giv->mode, tem,
5053 giv->derive_adjustment),
5056 giv->derive_adjustment = tem;
5058 giv->cant_derive = 1;
5060 else if ((GET_CODE (p) == CODE_LABEL && ! biv->always_computable)
5061 || (GET_CODE (p) == JUMP_INSN && biv->maybe_multiple))
5062 giv->cant_derive = 1;
5067 /* Check whether an insn is an increment legitimate for a basic induction var.
5068 X is the source of insn P, or a part of it.
5069 MODE is the mode in which X should be interpreted.
5071 DEST_REG is the putative biv, also the destination of the insn.
5072 We accept patterns of these forms:
5073 REG = REG + INVARIANT (includes REG = REG - CONSTANT)
5074 REG = INVARIANT + REG
5076 If X is suitable, we return 1, set *MULT_VAL to CONST1_RTX,
5077 and store the additive term into *INC_VAL.
5079 If X is an assignment of an invariant into DEST_REG, we set
5080 *MULT_VAL to CONST0_RTX, and store the invariant into *INC_VAL.
5082 We also want to detect a BIV when it corresponds to a variable
5083 whose mode was promoted via PROMOTED_MODE. In that case, an increment
5084 of the variable may be a PLUS that adds a SUBREG of that variable to
5085 an invariant and then sign- or zero-extends the result of the PLUS
5088 Most GIVs in such cases will be in the promoted mode, since that is the
5089 probably the natural computation mode (and almost certainly the mode
5090 used for addresses) on the machine. So we view the pseudo-reg containing
5091 the variable as the BIV, as if it were simply incremented.
5093 Note that treating the entire pseudo as a BIV will result in making
5094 simple increments to any GIVs based on it. However, if the variable
5095 overflows in its declared mode but not its promoted mode, the result will
5096 be incorrect. This is acceptable if the variable is signed, since
5097 overflows in such cases are undefined, but not if it is unsigned, since
5098 those overflows are defined. So we only check for SIGN_EXTEND and
5101 If we cannot find a biv, we return 0. */
5104 basic_induction_var (x, mode, dest_reg, p, inc_val, mult_val)
5106 enum machine_mode mode;
5112 register enum rtx_code code;
5116 code = GET_CODE (x);
5120 if (XEXP (x, 0) == dest_reg
5121 || (GET_CODE (XEXP (x, 0)) == SUBREG
5122 && SUBREG_PROMOTED_VAR_P (XEXP (x, 0))
5123 && SUBREG_REG (XEXP (x, 0)) == dest_reg))
5125 else if (XEXP (x, 1) == dest_reg
5126 || (GET_CODE (XEXP (x, 1)) == SUBREG
5127 && SUBREG_PROMOTED_VAR_P (XEXP (x, 1))
5128 && SUBREG_REG (XEXP (x, 1)) == dest_reg))
5133 if (invariant_p (arg) != 1)
5136 *inc_val = convert_modes (GET_MODE (dest_reg), GET_MODE (x), arg, 0);
5137 *mult_val = const1_rtx;
5141 /* If this is a SUBREG for a promoted variable, check the inner
5143 if (SUBREG_PROMOTED_VAR_P (x))
5144 return basic_induction_var (SUBREG_REG (x), GET_MODE (SUBREG_REG (x)),
5145 dest_reg, p, inc_val, mult_val);
5149 /* If this register is assigned in the previous insn, look at its
5150 source, but don't go outside the loop or past a label. */
5152 for (insn = PREV_INSN (p);
5153 (insn && GET_CODE (insn) == NOTE
5154 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG);
5155 insn = PREV_INSN (insn))
5159 set = single_set (insn);
5162 && (SET_DEST (set) == x
5163 || (GET_CODE (SET_DEST (set)) == SUBREG
5164 && (GET_MODE_SIZE (GET_MODE (SET_DEST (set)))
5166 && SUBREG_REG (SET_DEST (set)) == x)))
5167 return basic_induction_var (SET_SRC (set),
5168 (GET_MODE (SET_SRC (set)) == VOIDmode
5170 : GET_MODE (SET_SRC (set))),
5173 /* ... fall through ... */
5175 /* Can accept constant setting of biv only when inside inner most loop.
5176 Otherwise, a biv of an inner loop may be incorrectly recognized
5177 as a biv of the outer loop,
5178 causing code to be moved INTO the inner loop. */
5180 if (invariant_p (x) != 1)
5185 if (loops_enclosed == 1)
5187 /* Possible bug here? Perhaps we don't know the mode of X. */
5188 *inc_val = convert_modes (GET_MODE (dest_reg), mode, x, 0);
5189 *mult_val = const0_rtx;
5196 return basic_induction_var (XEXP (x, 0), GET_MODE (XEXP (x, 0)),
5197 dest_reg, p, inc_val, mult_val);
5199 /* Similar, since this can be a sign extension. */
5200 for (insn = PREV_INSN (p);
5201 (insn && GET_CODE (insn) == NOTE
5202 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG);
5203 insn = PREV_INSN (insn))
5207 set = single_set (insn);
5209 if (set && SET_DEST (set) == XEXP (x, 0)
5210 && GET_CODE (XEXP (x, 1)) == CONST_INT
5211 && INTVAL (XEXP (x, 1)) >= 0
5212 && GET_CODE (SET_SRC (set)) == ASHIFT
5213 && XEXP (x, 1) == XEXP (SET_SRC (set), 1))
5214 return basic_induction_var (XEXP (SET_SRC (set), 0),
5215 GET_MODE (XEXP (x, 0)),
5216 dest_reg, insn, inc_val, mult_val);
5224 /* A general induction variable (giv) is any quantity that is a linear
5225 function of a basic induction variable,
5226 i.e. giv = biv * mult_val + add_val.
5227 The coefficients can be any loop invariant quantity.
5228 A giv need not be computed directly from the biv;
5229 it can be computed by way of other givs. */
5231 /* Determine whether X computes a giv.
5232 If it does, return a nonzero value
5233 which is the benefit from eliminating the computation of X;
5234 set *SRC_REG to the register of the biv that it is computed from;
5235 set *ADD_VAL and *MULT_VAL to the coefficients,
5236 such that the value of X is biv * mult + add; */
5239 general_induction_var (x, src_reg, add_val, mult_val)
5249 /* If this is an invariant, forget it, it isn't a giv. */
5250 if (invariant_p (x) == 1)
5253 /* See if the expression could be a giv and get its form.
5254 Mark our place on the obstack in case we don't find a giv. */
5255 storage = (char *) oballoc (0);
5256 x = simplify_giv_expr (x, &benefit);
5263 switch (GET_CODE (x))
5267 /* Since this is now an invariant and wasn't before, it must be a giv
5268 with MULT_VAL == 0. It doesn't matter which BIV we associate this
5270 *src_reg = loop_iv_list->biv->dest_reg;
5271 *mult_val = const0_rtx;
5276 /* This is equivalent to a BIV. */
5278 *mult_val = const1_rtx;
5279 *add_val = const0_rtx;
5283 /* Either (plus (biv) (invar)) or
5284 (plus (mult (biv) (invar_1)) (invar_2)). */
5285 if (GET_CODE (XEXP (x, 0)) == MULT)
5287 *src_reg = XEXP (XEXP (x, 0), 0);
5288 *mult_val = XEXP (XEXP (x, 0), 1);
5292 *src_reg = XEXP (x, 0);
5293 *mult_val = const1_rtx;
5295 *add_val = XEXP (x, 1);
5299 /* ADD_VAL is zero. */
5300 *src_reg = XEXP (x, 0);
5301 *mult_val = XEXP (x, 1);
5302 *add_val = const0_rtx;
5309 /* Remove any enclosing USE from ADD_VAL and MULT_VAL (there will be
5310 unless they are CONST_INT). */
5311 if (GET_CODE (*add_val) == USE)
5312 *add_val = XEXP (*add_val, 0);
5313 if (GET_CODE (*mult_val) == USE)
5314 *mult_val = XEXP (*mult_val, 0);
5316 benefit += rtx_cost (orig_x, SET);
5318 /* Always return some benefit if this is a giv so it will be detected
5319 as such. This allows elimination of bivs that might otherwise
5320 not be eliminated. */
5321 return benefit == 0 ? 1 : benefit;
5324 /* Given an expression, X, try to form it as a linear function of a biv.
5325 We will canonicalize it to be of the form
5326 (plus (mult (BIV) (invar_1))
5328 with possible degeneracies.
5330 The invariant expressions must each be of a form that can be used as a
5331 machine operand. We surround then with a USE rtx (a hack, but localized
5332 and certainly unambiguous!) if not a CONST_INT for simplicity in this
5333 routine; it is the caller's responsibility to strip them.
5335 If no such canonicalization is possible (i.e., two biv's are used or an
5336 expression that is neither invariant nor a biv or giv), this routine
5339 For a non-zero return, the result will have a code of CONST_INT, USE,
5340 REG (for a BIV), PLUS, or MULT. No other codes will occur.
5342 *BENEFIT will be incremented by the benefit of any sub-giv encountered. */
5345 simplify_giv_expr (x, benefit)
5349 enum machine_mode mode = GET_MODE (x);
5353 /* If this is not an integer mode, or if we cannot do arithmetic in this
5354 mode, this can't be a giv. */
5355 if (mode != VOIDmode
5356 && (GET_MODE_CLASS (mode) != MODE_INT
5357 || GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT))
5360 switch (GET_CODE (x))
5363 arg0 = simplify_giv_expr (XEXP (x, 0), benefit);
5364 arg1 = simplify_giv_expr (XEXP (x, 1), benefit);
5365 if (arg0 == 0 || arg1 == 0)
5368 /* Put constant last, CONST_INT last if both constant. */
5369 if ((GET_CODE (arg0) == USE
5370 || GET_CODE (arg0) == CONST_INT)
5371 && GET_CODE (arg1) != CONST_INT)
5372 tem = arg0, arg0 = arg1, arg1 = tem;
5374 /* Handle addition of zero, then addition of an invariant. */
5375 if (arg1 == const0_rtx)
5377 else if (GET_CODE (arg1) == CONST_INT || GET_CODE (arg1) == USE)
5378 switch (GET_CODE (arg0))
5382 /* Both invariant. Only valid if sum is machine operand.
5383 First strip off possible USE on the operands. */
5384 if (GET_CODE (arg0) == USE)
5385 arg0 = XEXP (arg0, 0);
5387 if (GET_CODE (arg1) == USE)
5388 arg1 = XEXP (arg1, 0);
5391 if (CONSTANT_P (arg0) && GET_CODE (arg1) == CONST_INT)
5393 tem = plus_constant (arg0, INTVAL (arg1));
5394 if (GET_CODE (tem) != CONST_INT)
5395 tem = gen_rtx (USE, mode, tem);
5399 /* Adding two invariants must result in an invariant,
5400 so enclose addition operation inside a USE and
5402 tem = gen_rtx (USE, mode, gen_rtx (PLUS, mode, arg0, arg1));
5409 /* biv + invar or mult + invar. Return sum. */
5410 return gen_rtx (PLUS, mode, arg0, arg1);
5413 /* (a + invar_1) + invar_2. Associate. */
5414 return simplify_giv_expr (gen_rtx (PLUS, mode,
5416 gen_rtx (PLUS, mode,
5417 XEXP (arg0, 1), arg1)),
5424 /* Each argument must be either REG, PLUS, or MULT. Convert REG to
5425 MULT to reduce cases. */
5426 if (GET_CODE (arg0) == REG)
5427 arg0 = gen_rtx (MULT, mode, arg0, const1_rtx);
5428 if (GET_CODE (arg1) == REG)
5429 arg1 = gen_rtx (MULT, mode, arg1, const1_rtx);
5431 /* Now have PLUS + PLUS, PLUS + MULT, MULT + PLUS, or MULT + MULT.
5432 Put a MULT first, leaving PLUS + PLUS, MULT + PLUS, or MULT + MULT.
5433 Recurse to associate the second PLUS. */
5434 if (GET_CODE (arg1) == MULT)
5435 tem = arg0, arg0 = arg1, arg1 = tem;
5437 if (GET_CODE (arg1) == PLUS)
5438 return simplify_giv_expr (gen_rtx (PLUS, mode,
5439 gen_rtx (PLUS, mode,
5440 arg0, XEXP (arg1, 0)),
5444 /* Now must have MULT + MULT. Distribute if same biv, else not giv. */
5445 if (GET_CODE (arg0) != MULT || GET_CODE (arg1) != MULT)
5448 if (XEXP (arg0, 0) != XEXP (arg1, 0))
5451 return simplify_giv_expr (gen_rtx (MULT, mode,
5453 gen_rtx (PLUS, mode,
5459 /* Handle "a - b" as "a + b * (-1)". */
5460 return simplify_giv_expr (gen_rtx (PLUS, mode,
5462 gen_rtx (MULT, mode,
5463 XEXP (x, 1), constm1_rtx)),
5467 arg0 = simplify_giv_expr (XEXP (x, 0), benefit);
5468 arg1 = simplify_giv_expr (XEXP (x, 1), benefit);
5469 if (arg0 == 0 || arg1 == 0)
5472 /* Put constant last, CONST_INT last if both constant. */
5473 if ((GET_CODE (arg0) == USE || GET_CODE (arg0) == CONST_INT)
5474 && GET_CODE (arg1) != CONST_INT)
5475 tem = arg0, arg0 = arg1, arg1 = tem;
5477 /* If second argument is not now constant, not giv. */
5478 if (GET_CODE (arg1) != USE && GET_CODE (arg1) != CONST_INT)
5481 /* Handle multiply by 0 or 1. */
5482 if (arg1 == const0_rtx)
5485 else if (arg1 == const1_rtx)
5488 switch (GET_CODE (arg0))
5491 /* biv * invar. Done. */
5492 return gen_rtx (MULT, mode, arg0, arg1);
5495 /* Product of two constants. */
5496 return GEN_INT (INTVAL (arg0) * INTVAL (arg1));
5499 /* invar * invar. Not giv. */
5503 /* (a * invar_1) * invar_2. Associate. */
5504 return simplify_giv_expr (gen_rtx (MULT, mode,
5506 gen_rtx (MULT, mode,
5507 XEXP (arg0, 1), arg1)),
5511 /* (a + invar_1) * invar_2. Distribute. */
5512 return simplify_giv_expr (gen_rtx (PLUS, mode,
5513 gen_rtx (MULT, mode,
5514 XEXP (arg0, 0), arg1),
5515 gen_rtx (MULT, mode,
5516 XEXP (arg0, 1), arg1)),
5524 /* Shift by constant is multiply by power of two. */
5525 if (GET_CODE (XEXP (x, 1)) != CONST_INT)
5528 return simplify_giv_expr (gen_rtx (MULT, mode,
5530 GEN_INT ((HOST_WIDE_INT) 1
5531 << INTVAL (XEXP (x, 1)))),
5535 /* "-a" is "a * (-1)" */
5536 return simplify_giv_expr (gen_rtx (MULT, mode, XEXP (x, 0), constm1_rtx),
5540 /* "~a" is "-a - 1". Silly, but easy. */
5541 return simplify_giv_expr (gen_rtx (MINUS, mode,
5542 gen_rtx (NEG, mode, XEXP (x, 0)),
5547 /* Already in proper form for invariant. */
5551 /* If this is a new register, we can't deal with it. */
5552 if (REGNO (x) >= max_reg_before_loop)
5555 /* Check for biv or giv. */
5556 switch (reg_iv_type[REGNO (x)])
5560 case GENERAL_INDUCT:
5562 struct induction *v = reg_iv_info[REGNO (x)];
5564 /* Form expression from giv and add benefit. Ensure this giv
5565 can derive another and subtract any needed adjustment if so. */
5566 *benefit += v->benefit;
5570 tem = gen_rtx (PLUS, mode, gen_rtx (MULT, mode,
5571 v->src_reg, v->mult_val),
5573 if (v->derive_adjustment)
5574 tem = gen_rtx (MINUS, mode, tem, v->derive_adjustment);
5575 return simplify_giv_expr (tem, benefit);
5582 /* Fall through to general case. */
5584 /* If invariant, return as USE (unless CONST_INT).
5585 Otherwise, not giv. */
5586 if (GET_CODE (x) == USE)
5589 if (invariant_p (x) == 1)
5591 if (GET_CODE (x) == CONST_INT)
5594 return gen_rtx (USE, mode, x);
5601 /* Help detect a giv that is calculated by several consecutive insns;
5605 The caller has already identified the first insn P as having a giv as dest;
5606 we check that all other insns that set the same register follow
5607 immediately after P, that they alter nothing else,
5608 and that the result of the last is still a giv.
5610 The value is 0 if the reg set in P is not really a giv.
5611 Otherwise, the value is the amount gained by eliminating
5612 all the consecutive insns that compute the value.
5614 FIRST_BENEFIT is the amount gained by eliminating the first insn, P.
5615 SRC_REG is the reg of the biv; DEST_REG is the reg of the giv.
5617 The coefficients of the ultimate giv value are stored in
5618 *MULT_VAL and *ADD_VAL. */
5621 consec_sets_giv (first_benefit, p, src_reg, dest_reg,
5636 /* Indicate that this is a giv so that we can update the value produced in
5637 each insn of the multi-insn sequence.
5639 This induction structure will be used only by the call to
5640 general_induction_var below, so we can allocate it on our stack.
5641 If this is a giv, our caller will replace the induct var entry with
5642 a new induction structure. */
5644 = (struct induction *) alloca (sizeof (struct induction));
5645 v->src_reg = src_reg;
5646 v->mult_val = *mult_val;
5647 v->add_val = *add_val;
5648 v->benefit = first_benefit;
5650 v->derive_adjustment = 0;
5652 reg_iv_type[REGNO (dest_reg)] = GENERAL_INDUCT;
5653 reg_iv_info[REGNO (dest_reg)] = v;
5655 count = n_times_set[REGNO (dest_reg)] - 1;
5660 code = GET_CODE (p);
5662 /* If libcall, skip to end of call sequence. */
5663 if (code == INSN && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
5667 && (set = single_set (p))
5668 && GET_CODE (SET_DEST (set)) == REG
5669 && SET_DEST (set) == dest_reg
5670 && ((benefit = general_induction_var (SET_SRC (set), &src_reg,
5672 /* Giv created by equivalent expression. */
5673 || ((temp = find_reg_note (p, REG_EQUAL, NULL_RTX))
5674 && (benefit = general_induction_var (XEXP (temp, 0), &src_reg,
5675 add_val, mult_val))))
5676 && src_reg == v->src_reg)
5678 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
5679 benefit += libcall_benefit (p);
5682 v->mult_val = *mult_val;
5683 v->add_val = *add_val;
5684 v->benefit = benefit;
5686 else if (code != NOTE)
5688 /* Allow insns that set something other than this giv to a
5689 constant. Such insns are needed on machines which cannot
5690 include long constants and should not disqualify a giv. */
5692 && (set = single_set (p))
5693 && SET_DEST (set) != dest_reg
5694 && CONSTANT_P (SET_SRC (set)))
5697 reg_iv_type[REGNO (dest_reg)] = UNKNOWN_INDUCT;
5705 /* Return an rtx, if any, that expresses giv G2 as a function of the register
5706 represented by G1. If no such expression can be found, or it is clear that
5707 it cannot possibly be a valid address, 0 is returned.
5709 To perform the computation, we note that
5712 where `v' is the biv.
5714 So G2 = (c/a) * G1 + (d - b*c/a) */
5718 express_from (g1, g2)
5719 struct induction *g1, *g2;
5723 /* The value that G1 will be multiplied by must be a constant integer. Also,
5724 the only chance we have of getting a valid address is if b*c/a (see above
5725 for notation) is also an integer. */
5726 if (GET_CODE (g1->mult_val) != CONST_INT
5727 || GET_CODE (g2->mult_val) != CONST_INT
5728 || GET_CODE (g1->add_val) != CONST_INT
5729 || g1->mult_val == const0_rtx
5730 || INTVAL (g2->mult_val) % INTVAL (g1->mult_val) != 0)
5733 mult = GEN_INT (INTVAL (g2->mult_val) / INTVAL (g1->mult_val));
5734 add = plus_constant (g2->add_val, - INTVAL (g1->add_val) * INTVAL (mult));
5736 /* Form simplified final result. */
5737 if (mult == const0_rtx)
5739 else if (mult == const1_rtx)
5740 mult = g1->dest_reg;
5742 mult = gen_rtx (MULT, g2->mode, g1->dest_reg, mult);
5744 if (add == const0_rtx)
5747 return gen_rtx (PLUS, g2->mode, mult, add);
5751 /* Return 1 if giv G2 can be combined with G1. This means that G2 can use
5752 (either directly or via an address expression) a register used to represent
5753 G1. Set g2->new_reg to a represtation of G1 (normally just
5757 combine_givs_p (g1, g2)
5758 struct induction *g1, *g2;
5762 /* If these givs are identical, they can be combined. */
5763 if (rtx_equal_p (g1->mult_val, g2->mult_val)
5764 && rtx_equal_p (g1->add_val, g2->add_val))
5766 g2->new_reg = g1->dest_reg;
5771 /* If G2 can be expressed as a function of G1 and that function is valid
5772 as an address and no more expensive than using a register for G2,
5773 the expression of G2 in terms of G1 can be used. */
5774 if (g2->giv_type == DEST_ADDR
5775 && (tem = express_from (g1, g2)) != 0
5776 && memory_address_p (g2->mem_mode, tem)
5777 && ADDRESS_COST (tem) <= ADDRESS_COST (*g2->location))
5787 #ifdef GIV_SORT_CRITERION
5788 /* Compare two givs and sort the most desirable one for combinations first.
5789 This is used only in one qsort call below. */
5793 struct induction **x, **y;
5795 GIV_SORT_CRITERION (*x, *y);
5801 /* Check all pairs of givs for iv_class BL and see if any can be combined with
5802 any other. If so, point SAME to the giv combined with and set NEW_REG to
5803 be an expression (in terms of the other giv's DEST_REG) equivalent to the
5804 giv. Also, update BENEFIT and related fields for cost/benefit analysis. */
5808 struct iv_class *bl;
5810 struct induction *g1, *g2, **giv_array, *temp_iv;
5811 int i, j, giv_count, pass;
5813 /* Count givs, because bl->giv_count is incorrect here. */
5815 for (g1 = bl->giv; g1; g1 = g1->next_iv)
5819 = (struct induction **) alloca (giv_count * sizeof (struct induction *));
5821 for (g1 = bl->giv; g1; g1 = g1->next_iv)
5822 giv_array[i++] = g1;
5824 #ifdef GIV_SORT_CRITERION
5825 /* Sort the givs if GIV_SORT_CRITERION is defined.
5826 This is usually defined for processors which lack
5827 negative register offsets so more givs may be combined. */
5829 if (loop_dump_stream)
5830 fprintf (loop_dump_stream, "%d givs counted, sorting...\n", giv_count);
5832 qsort (giv_array, giv_count, sizeof (struct induction *), giv_sort);
5835 for (i = 0; i < giv_count; i++)
5838 for (pass = 0; pass <= 1; pass++)
5839 for (j = 0; j < giv_count; j++)
5843 /* First try to combine with replaceable givs, then all givs. */
5844 && (g1->replaceable || pass == 1)
5845 /* If either has already been combined or is to be ignored, can't
5847 && ! g1->ignore && ! g2->ignore && ! g1->same && ! g2->same
5848 /* If something has been based on G2, G2 cannot itself be based
5849 on something else. */
5850 && ! g2->combined_with
5851 && combine_givs_p (g1, g2))
5853 /* g2->new_reg set by `combine_givs_p' */
5855 g1->combined_with = 1;
5857 /* If one of these givs is a DEST_REG that was only used
5858 once, by the other giv, this is actually a single use.
5859 The DEST_REG has the correct cost, while the other giv
5860 counts the REG use too often. */
5861 if (g2->giv_type == DEST_REG
5862 && n_times_used[REGNO (g2->dest_reg)] == 1
5863 && reg_mentioned_p (g2->dest_reg, PATTERN (g1->insn)))
5864 g1->benefit = g2->benefit;
5865 else if (g1->giv_type != DEST_REG
5866 || n_times_used[REGNO (g1->dest_reg)] != 1
5867 || ! reg_mentioned_p (g1->dest_reg,
5868 PATTERN (g2->insn)))
5870 g1->benefit += g2->benefit;
5871 g1->times_used += g2->times_used;
5873 /* ??? The new final_[bg]iv_value code does a much better job
5874 of finding replaceable giv's, and hence this code may no
5875 longer be necessary. */
5876 if (! g2->replaceable && REG_USERVAR_P (g2->dest_reg))
5877 g1->benefit -= copy_cost;
5878 g1->lifetime += g2->lifetime;
5880 if (loop_dump_stream)
5881 fprintf (loop_dump_stream, "giv at %d combined with giv at %d\n",
5882 INSN_UID (g2->insn), INSN_UID (g1->insn));
5888 /* EMIT code before INSERT_BEFORE to set REG = B * M + A. */
5891 emit_iv_add_mult (b, m, a, reg, insert_before)
5892 rtx b; /* initial value of basic induction variable */
5893 rtx m; /* multiplicative constant */
5894 rtx a; /* additive constant */
5895 rtx reg; /* destination register */
5901 /* Prevent unexpected sharing of these rtx. */
5905 /* Increase the lifetime of any invariants moved further in code. */
5906 update_reg_last_use (a, insert_before);
5907 update_reg_last_use (b, insert_before);
5908 update_reg_last_use (m, insert_before);
5911 result = expand_mult_add (b, reg, m, a, GET_MODE (reg), 0);
5913 emit_move_insn (reg, result);
5914 seq = gen_sequence ();
5917 emit_insn_before (seq, insert_before);
5919 record_base_value (REGNO (reg), b);
5922 /* Test whether A * B can be computed without
5923 an actual multiply insn. Value is 1 if so. */
5926 product_cheap_p (a, b)
5932 struct obstack *old_rtl_obstack = rtl_obstack;
5933 char *storage = (char *) obstack_alloc (&temp_obstack, 0);
5936 /* If only one is constant, make it B. */
5937 if (GET_CODE (a) == CONST_INT)
5938 tmp = a, a = b, b = tmp;
5940 /* If first constant, both constant, so don't need multiply. */
5941 if (GET_CODE (a) == CONST_INT)
5944 /* If second not constant, neither is constant, so would need multiply. */
5945 if (GET_CODE (b) != CONST_INT)
5948 /* One operand is constant, so might not need multiply insn. Generate the
5949 code for the multiply and see if a call or multiply, or long sequence
5950 of insns is generated. */
5952 rtl_obstack = &temp_obstack;
5954 expand_mult (GET_MODE (a), a, b, NULL_RTX, 0);
5955 tmp = gen_sequence ();
5958 if (GET_CODE (tmp) == SEQUENCE)
5960 if (XVEC (tmp, 0) == 0)
5962 else if (XVECLEN (tmp, 0) > 3)
5965 for (i = 0; i < XVECLEN (tmp, 0); i++)
5967 rtx insn = XVECEXP (tmp, 0, i);
5969 if (GET_CODE (insn) != INSN
5970 || (GET_CODE (PATTERN (insn)) == SET
5971 && GET_CODE (SET_SRC (PATTERN (insn))) == MULT)
5972 || (GET_CODE (PATTERN (insn)) == PARALLEL
5973 && GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == SET
5974 && GET_CODE (SET_SRC (XVECEXP (PATTERN (insn), 0, 0))) == MULT))
5981 else if (GET_CODE (tmp) == SET
5982 && GET_CODE (SET_SRC (tmp)) == MULT)
5984 else if (GET_CODE (tmp) == PARALLEL
5985 && GET_CODE (XVECEXP (tmp, 0, 0)) == SET
5986 && GET_CODE (SET_SRC (XVECEXP (tmp, 0, 0))) == MULT)
5989 /* Free any storage we obtained in generating this multiply and restore rtl
5990 allocation to its normal obstack. */
5991 obstack_free (&temp_obstack, storage);
5992 rtl_obstack = old_rtl_obstack;
5997 /* Check to see if loop can be terminated by a "decrement and branch until
5998 zero" instruction. If so, add a REG_NONNEG note to the branch insn if so.
5999 Also try reversing an increment loop to a decrement loop
6000 to see if the optimization can be performed.
6001 Value is nonzero if optimization was performed. */
6003 /* This is useful even if the architecture doesn't have such an insn,
6004 because it might change a loops which increments from 0 to n to a loop
6005 which decrements from n to 0. A loop that decrements to zero is usually
6006 faster than one that increments from zero. */
6008 /* ??? This could be rewritten to use some of the loop unrolling procedures,
6009 such as approx_final_value, biv_total_increment, loop_iterations, and
6010 final_[bg]iv_value. */
6013 check_dbra_loop (loop_end, insn_count, loop_start)
6018 struct iv_class *bl;
6025 rtx before_comparison;
6028 /* If last insn is a conditional branch, and the insn before tests a
6029 register value, try to optimize it. Otherwise, we can't do anything. */
6031 comparison = get_condition_for_loop (PREV_INSN (loop_end));
6032 if (comparison == 0)
6035 /* Check all of the bivs to see if the compare uses one of them.
6036 Skip biv's set more than once because we can't guarantee that
6037 it will be zero on the last iteration. Also skip if the biv is
6038 used between its update and the test insn. */
6040 for (bl = loop_iv_list; bl; bl = bl->next)
6042 if (bl->biv_count == 1
6043 && bl->biv->dest_reg == XEXP (comparison, 0)
6044 && ! reg_used_between_p (regno_reg_rtx[bl->regno], bl->biv->insn,
6045 PREV_INSN (PREV_INSN (loop_end))))
6052 /* Look for the case where the basic induction variable is always
6053 nonnegative, and equals zero on the last iteration.
6054 In this case, add a reg_note REG_NONNEG, which allows the
6055 m68k DBRA instruction to be used. */
6057 if (((GET_CODE (comparison) == GT
6058 && GET_CODE (XEXP (comparison, 1)) == CONST_INT
6059 && INTVAL (XEXP (comparison, 1)) == -1)
6060 || (GET_CODE (comparison) == NE && XEXP (comparison, 1) == const0_rtx))
6061 && GET_CODE (bl->biv->add_val) == CONST_INT
6062 && INTVAL (bl->biv->add_val) < 0)
6064 /* Initial value must be greater than 0,
6065 init_val % -dec_value == 0 to ensure that it equals zero on
6066 the last iteration */
6068 if (GET_CODE (bl->initial_value) == CONST_INT
6069 && INTVAL (bl->initial_value) > 0
6070 && (INTVAL (bl->initial_value)
6071 % (-INTVAL (bl->biv->add_val))) == 0)
6073 /* register always nonnegative, add REG_NOTE to branch */
6074 REG_NOTES (PREV_INSN (loop_end))
6075 = gen_rtx (EXPR_LIST, REG_NONNEG, NULL_RTX,
6076 REG_NOTES (PREV_INSN (loop_end)));
6082 /* If the decrement is 1 and the value was tested as >= 0 before
6083 the loop, then we can safely optimize. */
6084 for (p = loop_start; p; p = PREV_INSN (p))
6086 if (GET_CODE (p) == CODE_LABEL)
6088 if (GET_CODE (p) != JUMP_INSN)
6091 before_comparison = get_condition_for_loop (p);
6092 if (before_comparison
6093 && XEXP (before_comparison, 0) == bl->biv->dest_reg
6094 && GET_CODE (before_comparison) == LT
6095 && XEXP (before_comparison, 1) == const0_rtx
6096 && ! reg_set_between_p (bl->biv->dest_reg, p, loop_start)
6097 && INTVAL (bl->biv->add_val) == -1)
6099 REG_NOTES (PREV_INSN (loop_end))
6100 = gen_rtx (EXPR_LIST, REG_NONNEG, NULL_RTX,
6101 REG_NOTES (PREV_INSN (loop_end)));
6108 else if (num_mem_sets <= 1)
6110 /* Try to change inc to dec, so can apply above optimization. */
6112 all registers modified are induction variables or invariant,
6113 all memory references have non-overlapping addresses
6114 (obviously true if only one write)
6115 allow 2 insns for the compare/jump at the end of the loop. */
6116 /* Also, we must avoid any instructions which use both the reversed
6117 biv and another biv. Such instructions will fail if the loop is
6118 reversed. We meet this condition by requiring that either
6119 no_use_except_counting is true, or else that there is only
6121 int num_nonfixed_reads = 0;
6122 /* 1 if the iteration var is used only to count iterations. */
6123 int no_use_except_counting = 0;
6124 /* 1 if the loop has no memory store, or it has a single memory store
6125 which is reversible. */
6126 int reversible_mem_store = 1;
6128 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
6129 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
6130 num_nonfixed_reads += count_nonfixed_reads (PATTERN (p));
6132 if (bl->giv_count == 0
6133 && ! loop_number_exit_count[uid_loop_num[INSN_UID (loop_start)]])
6135 rtx bivreg = regno_reg_rtx[bl->regno];
6137 /* If there are no givs for this biv, and the only exit is the
6138 fall through at the end of the the loop, then
6139 see if perhaps there are no uses except to count. */
6140 no_use_except_counting = 1;
6141 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
6142 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
6144 rtx set = single_set (p);
6146 if (set && GET_CODE (SET_DEST (set)) == REG
6147 && REGNO (SET_DEST (set)) == bl->regno)
6148 /* An insn that sets the biv is okay. */
6150 else if (p == prev_nonnote_insn (prev_nonnote_insn (loop_end))
6151 || p == prev_nonnote_insn (loop_end))
6152 /* Don't bother about the end test. */
6154 else if (reg_mentioned_p (bivreg, PATTERN (p)))
6155 /* Any other use of the biv is no good. */
6157 no_use_except_counting = 0;
6163 /* If the loop has a single store, and the destination address is
6164 invariant, then we can't reverse the loop, because this address
6165 might then have the wrong value at loop exit.
6166 This would work if the source was invariant also, however, in that
6167 case, the insn should have been moved out of the loop. */
6169 if (num_mem_sets == 1)
6170 reversible_mem_store
6171 = (! unknown_address_altered
6172 && ! invariant_p (XEXP (loop_store_mems[0], 0)));
6174 /* This code only acts for innermost loops. Also it simplifies
6175 the memory address check by only reversing loops with
6176 zero or one memory access.
6177 Two memory accesses could involve parts of the same array,
6178 and that can't be reversed. */
6180 if (num_nonfixed_reads <= 1
6182 && !loop_has_volatile
6183 && reversible_mem_store
6184 && (no_use_except_counting
6185 || ((bl->giv_count + bl->biv_count + num_mem_sets
6186 + num_movables + 2 == insn_count)
6187 && (bl == loop_iv_list && bl->next == 0))))
6191 /* Loop can be reversed. */
6192 if (loop_dump_stream)
6193 fprintf (loop_dump_stream, "Can reverse loop\n");
6195 /* Now check other conditions:
6197 The increment must be a constant, as must the initial value,
6198 and the comparison code must be LT.
6200 This test can probably be improved since +/- 1 in the constant
6201 can be obtained by changing LT to LE and vice versa; this is
6205 && GET_CODE (XEXP (comparison, 1)) == CONST_INT
6206 /* LE gets turned into LT */
6207 && GET_CODE (comparison) == LT
6208 && GET_CODE (bl->initial_value) == CONST_INT)
6210 HOST_WIDE_INT add_val, comparison_val;
6213 add_val = INTVAL (bl->biv->add_val);
6214 comparison_val = INTVAL (XEXP (comparison, 1));
6215 initial_value = bl->initial_value;
6217 /* Normalize the initial value if it has no other use
6218 except as a counter. This will allow a few more loops
6220 if (no_use_except_counting)
6222 comparison_val = comparison_val - INTVAL (bl->initial_value);
6223 initial_value = const0_rtx;
6226 /* If the initial value is not zero, or if the comparison
6227 value is not an exact multiple of the increment, then we
6228 can not reverse this loop. */
6229 if (initial_value != const0_rtx
6230 || (comparison_val % add_val) != 0)
6233 /* Reset these in case we normalized the initial value
6234 and comparison value above. */
6235 bl->initial_value = initial_value;
6236 XEXP (comparison, 1) = GEN_INT (comparison_val);
6238 /* Register will always be nonnegative, with value
6239 0 on last iteration if loop reversed */
6241 /* Save some info needed to produce the new insns. */
6242 reg = bl->biv->dest_reg;
6243 jump_label = XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end))), 1);
6244 if (jump_label == pc_rtx)
6245 jump_label = XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end))), 2);
6246 new_add_val = GEN_INT (- INTVAL (bl->biv->add_val));
6248 final_value = XEXP (comparison, 1);
6249 start_value = GEN_INT (INTVAL (XEXP (comparison, 1))
6250 - INTVAL (bl->biv->add_val));
6252 /* Initialize biv to start_value before loop start.
6253 The old initializing insn will be deleted as a
6254 dead store by flow.c. */
6255 emit_insn_before (gen_move_insn (reg, start_value), loop_start);
6257 /* Add insn to decrement register, and delete insn
6258 that incremented the register. */
6259 p = emit_insn_before (gen_add2_insn (reg, new_add_val),
6261 delete_insn (bl->biv->insn);
6263 /* Update biv info to reflect its new status. */
6265 bl->initial_value = start_value;
6266 bl->biv->add_val = new_add_val;
6268 /* Inc LABEL_NUSES so that delete_insn will
6269 not delete the label. */
6270 LABEL_NUSES (XEXP (jump_label, 0)) ++;
6272 /* Emit an insn after the end of the loop to set the biv's
6273 proper exit value if it is used anywhere outside the loop. */
6274 if ((REGNO_LAST_UID (bl->regno)
6275 != INSN_UID (PREV_INSN (PREV_INSN (loop_end))))
6277 || REGNO_FIRST_UID (bl->regno) != INSN_UID (bl->init_insn))
6278 emit_insn_after (gen_move_insn (reg, final_value),
6281 /* Delete compare/branch at end of loop. */
6282 delete_insn (PREV_INSN (loop_end));
6283 delete_insn (PREV_INSN (loop_end));
6285 /* Add new compare/branch insn at end of loop. */
6287 emit_cmp_insn (reg, const0_rtx, GE, NULL_RTX,
6288 GET_MODE (reg), 0, 0);
6289 emit_jump_insn (gen_bge (XEXP (jump_label, 0)));
6290 tem = gen_sequence ();
6292 emit_jump_insn_before (tem, loop_end);
6294 for (tem = PREV_INSN (loop_end);
6295 tem && GET_CODE (tem) != JUMP_INSN; tem = PREV_INSN (tem))
6299 JUMP_LABEL (tem) = XEXP (jump_label, 0);
6301 /* Increment of LABEL_NUSES done above. */
6302 /* Register is now always nonnegative,
6303 so add REG_NONNEG note to the branch. */
6304 REG_NOTES (tem) = gen_rtx (EXPR_LIST, REG_NONNEG, NULL_RTX,
6310 /* Mark that this biv has been reversed. Each giv which depends
6311 on this biv, and which is also live past the end of the loop
6312 will have to be fixed up. */
6316 if (loop_dump_stream)
6317 fprintf (loop_dump_stream,
6318 "Reversed loop and added reg_nonneg\n");
6328 /* Verify whether the biv BL appears to be eliminable,
6329 based on the insns in the loop that refer to it.
6330 LOOP_START is the first insn of the loop, and END is the end insn.
6332 If ELIMINATE_P is non-zero, actually do the elimination.
6334 THRESHOLD and INSN_COUNT are from loop_optimize and are used to
6335 determine whether invariant insns should be placed inside or at the
6336 start of the loop. */
6339 maybe_eliminate_biv (bl, loop_start, end, eliminate_p, threshold, insn_count)
6340 struct iv_class *bl;
6344 int threshold, insn_count;
6346 rtx reg = bl->biv->dest_reg;
6349 /* Scan all insns in the loop, stopping if we find one that uses the
6350 biv in a way that we cannot eliminate. */
6352 for (p = loop_start; p != end; p = NEXT_INSN (p))
6354 enum rtx_code code = GET_CODE (p);
6355 rtx where = threshold >= insn_count ? loop_start : p;
6357 if ((code == INSN || code == JUMP_INSN || code == CALL_INSN)
6358 && reg_mentioned_p (reg, PATTERN (p))
6359 && ! maybe_eliminate_biv_1 (PATTERN (p), p, bl, eliminate_p, where))
6361 if (loop_dump_stream)
6362 fprintf (loop_dump_stream,
6363 "Cannot eliminate biv %d: biv used in insn %d.\n",
6364 bl->regno, INSN_UID (p));
6371 if (loop_dump_stream)
6372 fprintf (loop_dump_stream, "biv %d %s eliminated.\n",
6373 bl->regno, eliminate_p ? "was" : "can be");
6380 /* If BL appears in X (part of the pattern of INSN), see if we can
6381 eliminate its use. If so, return 1. If not, return 0.
6383 If BIV does not appear in X, return 1.
6385 If ELIMINATE_P is non-zero, actually do the elimination. WHERE indicates
6386 where extra insns should be added. Depending on how many items have been
6387 moved out of the loop, it will either be before INSN or at the start of
6391 maybe_eliminate_biv_1 (x, insn, bl, eliminate_p, where)
6393 struct iv_class *bl;
6397 enum rtx_code code = GET_CODE (x);
6398 rtx reg = bl->biv->dest_reg;
6399 enum machine_mode mode = GET_MODE (reg);
6400 struct induction *v;
6409 /* If we haven't already been able to do something with this BIV,
6410 we can't eliminate it. */
6416 /* If this sets the BIV, it is not a problem. */
6417 if (SET_DEST (x) == reg)
6420 /* If this is an insn that defines a giv, it is also ok because
6421 it will go away when the giv is reduced. */
6422 for (v = bl->giv; v; v = v->next_iv)
6423 if (v->giv_type == DEST_REG && SET_DEST (x) == v->dest_reg)
6427 if (SET_DEST (x) == cc0_rtx && SET_SRC (x) == reg)
6429 /* Can replace with any giv that was reduced and
6430 that has (MULT_VAL != 0) and (ADD_VAL == 0).
6431 Require a constant for MULT_VAL, so we know it's nonzero.
6432 ??? We disable this optimization to avoid potential
6435 for (v = bl->giv; v; v = v->next_iv)
6436 if (CONSTANT_P (v->mult_val) && v->mult_val != const0_rtx
6437 && v->add_val == const0_rtx
6438 && ! v->ignore && ! v->maybe_dead && v->always_computable
6442 /* If the giv V had the auto-inc address optimization applied
6443 to it, and INSN occurs between the giv insn and the biv
6444 insn, then we must adjust the value used here.
6445 This is rare, so we don't bother to do so. */
6447 && ((INSN_LUID (v->insn) < INSN_LUID (insn)
6448 && INSN_LUID (insn) < INSN_LUID (bl->biv->insn))
6449 || (INSN_LUID (v->insn) > INSN_LUID (insn)
6450 && INSN_LUID (insn) > INSN_LUID (bl->biv->insn))))
6456 /* If the giv has the opposite direction of change,
6457 then reverse the comparison. */
6458 if (INTVAL (v->mult_val) < 0)
6459 new = gen_rtx (COMPARE, GET_MODE (v->new_reg),
6460 const0_rtx, v->new_reg);
6464 /* We can probably test that giv's reduced reg. */
6465 if (validate_change (insn, &SET_SRC (x), new, 0))
6469 /* Look for a giv with (MULT_VAL != 0) and (ADD_VAL != 0);
6470 replace test insn with a compare insn (cmp REDUCED_GIV ADD_VAL).
6471 Require a constant for MULT_VAL, so we know it's nonzero.
6472 ??? Do this only if ADD_VAL is a pointer to avoid a potential
6473 overflow problem. */
6475 for (v = bl->giv; v; v = v->next_iv)
6476 if (CONSTANT_P (v->mult_val) && v->mult_val != const0_rtx
6477 && ! v->ignore && ! v->maybe_dead && v->always_computable
6479 && (GET_CODE (v->add_val) == SYMBOL_REF
6480 || GET_CODE (v->add_val) == LABEL_REF
6481 || GET_CODE (v->add_val) == CONST
6482 || (GET_CODE (v->add_val) == REG
6483 && REGNO_POINTER_FLAG (REGNO (v->add_val)))))
6485 /* If the giv V had the auto-inc address optimization applied
6486 to it, and INSN occurs between the giv insn and the biv
6487 insn, then we must adjust the value used here.
6488 This is rare, so we don't bother to do so. */
6490 && ((INSN_LUID (v->insn) < INSN_LUID (insn)
6491 && INSN_LUID (insn) < INSN_LUID (bl->biv->insn))
6492 || (INSN_LUID (v->insn) > INSN_LUID (insn)
6493 && INSN_LUID (insn) > INSN_LUID (bl->biv->insn))))
6499 /* If the giv has the opposite direction of change,
6500 then reverse the comparison. */
6501 if (INTVAL (v->mult_val) < 0)
6502 new = gen_rtx (COMPARE, VOIDmode, copy_rtx (v->add_val),
6505 new = gen_rtx (COMPARE, VOIDmode, v->new_reg,
6506 copy_rtx (v->add_val));
6508 /* Replace biv with the giv's reduced register. */
6509 update_reg_last_use (v->add_val, insn);
6510 if (validate_change (insn, &SET_SRC (PATTERN (insn)), new, 0))
6513 /* Insn doesn't support that constant or invariant. Copy it
6514 into a register (it will be a loop invariant.) */
6515 tem = gen_reg_rtx (GET_MODE (v->new_reg));
6517 emit_insn_before (gen_move_insn (tem, copy_rtx (v->add_val)),
6520 /* Substitute the new register for its invariant value in
6521 the compare expression. */
6522 XEXP (new, (INTVAL (v->mult_val) < 0) ? 0 : 1) = tem;
6523 if (validate_change (insn, &SET_SRC (PATTERN (insn)), new, 0))
6532 case GT: case GE: case GTU: case GEU:
6533 case LT: case LE: case LTU: case LEU:
6534 /* See if either argument is the biv. */
6535 if (XEXP (x, 0) == reg)
6536 arg = XEXP (x, 1), arg_operand = 1;
6537 else if (XEXP (x, 1) == reg)
6538 arg = XEXP (x, 0), arg_operand = 0;
6542 if (CONSTANT_P (arg))
6544 /* First try to replace with any giv that has constant positive
6545 mult_val and constant add_val. We might be able to support
6546 negative mult_val, but it seems complex to do it in general. */
6548 for (v = bl->giv; v; v = v->next_iv)
6549 if (CONSTANT_P (v->mult_val) && INTVAL (v->mult_val) > 0
6550 && (GET_CODE (v->add_val) == SYMBOL_REF
6551 || GET_CODE (v->add_val) == LABEL_REF
6552 || GET_CODE (v->add_val) == CONST
6553 || (GET_CODE (v->add_val) == REG
6554 && REGNO_POINTER_FLAG (REGNO (v->add_val))))
6555 && ! v->ignore && ! v->maybe_dead && v->always_computable
6558 /* If the giv V had the auto-inc address optimization applied
6559 to it, and INSN occurs between the giv insn and the biv
6560 insn, then we must adjust the value used here.
6561 This is rare, so we don't bother to do so. */
6563 && ((INSN_LUID (v->insn) < INSN_LUID (insn)
6564 && INSN_LUID (insn) < INSN_LUID (bl->biv->insn))
6565 || (INSN_LUID (v->insn) > INSN_LUID (insn)
6566 && INSN_LUID (insn) > INSN_LUID (bl->biv->insn))))
6572 /* Replace biv with the giv's reduced reg. */
6573 XEXP (x, 1-arg_operand) = v->new_reg;
6575 /* If all constants are actually constant integers and
6576 the derived constant can be directly placed in the COMPARE,
6578 if (GET_CODE (arg) == CONST_INT
6579 && GET_CODE (v->mult_val) == CONST_INT
6580 && GET_CODE (v->add_val) == CONST_INT
6581 && validate_change (insn, &XEXP (x, arg_operand),
6582 GEN_INT (INTVAL (arg)
6583 * INTVAL (v->mult_val)
6584 + INTVAL (v->add_val)), 0))
6587 /* Otherwise, load it into a register. */
6588 tem = gen_reg_rtx (mode);
6589 emit_iv_add_mult (arg, v->mult_val, v->add_val, tem, where);
6590 if (validate_change (insn, &XEXP (x, arg_operand), tem, 0))
6593 /* If that failed, put back the change we made above. */
6594 XEXP (x, 1-arg_operand) = reg;
6597 /* Look for giv with positive constant mult_val and nonconst add_val.
6598 Insert insns to calculate new compare value.
6599 ??? Turn this off due to possible overflow. */
6601 for (v = bl->giv; v; v = v->next_iv)
6602 if (CONSTANT_P (v->mult_val) && INTVAL (v->mult_val) > 0
6603 && ! v->ignore && ! v->maybe_dead && v->always_computable
6609 /* If the giv V had the auto-inc address optimization applied
6610 to it, and INSN occurs between the giv insn and the biv
6611 insn, then we must adjust the value used here.
6612 This is rare, so we don't bother to do so. */
6614 && ((INSN_LUID (v->insn) < INSN_LUID (insn)
6615 && INSN_LUID (insn) < INSN_LUID (bl->biv->insn))
6616 || (INSN_LUID (v->insn) > INSN_LUID (insn)
6617 && INSN_LUID (insn) > INSN_LUID (bl->biv->insn))))
6623 tem = gen_reg_rtx (mode);
6625 /* Replace biv with giv's reduced register. */
6626 validate_change (insn, &XEXP (x, 1 - arg_operand),
6629 /* Compute value to compare against. */
6630 emit_iv_add_mult (arg, v->mult_val, v->add_val, tem, where);
6631 /* Use it in this insn. */
6632 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
6633 if (apply_change_group ())
6637 else if (GET_CODE (arg) == REG || GET_CODE (arg) == MEM)
6639 if (invariant_p (arg) == 1)
6641 /* Look for giv with constant positive mult_val and nonconst
6642 add_val. Insert insns to compute new compare value.
6643 ??? Turn this off due to possible overflow. */
6645 for (v = bl->giv; v; v = v->next_iv)
6646 if (CONSTANT_P (v->mult_val) && INTVAL (v->mult_val) > 0
6647 && ! v->ignore && ! v->maybe_dead && v->always_computable
6653 /* If the giv V had the auto-inc address optimization applied
6654 to it, and INSN occurs between the giv insn and the biv
6655 insn, then we must adjust the value used here.
6656 This is rare, so we don't bother to do so. */
6658 && ((INSN_LUID (v->insn) < INSN_LUID (insn)
6659 && INSN_LUID (insn) < INSN_LUID (bl->biv->insn))
6660 || (INSN_LUID (v->insn) > INSN_LUID (insn)
6661 && INSN_LUID (insn) > INSN_LUID (bl->biv->insn))))
6667 tem = gen_reg_rtx (mode);
6669 /* Replace biv with giv's reduced register. */
6670 validate_change (insn, &XEXP (x, 1 - arg_operand),
6673 /* Compute value to compare against. */
6674 emit_iv_add_mult (arg, v->mult_val, v->add_val,
6676 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
6677 if (apply_change_group ())
6682 /* This code has problems. Basically, you can't know when
6683 seeing if we will eliminate BL, whether a particular giv
6684 of ARG will be reduced. If it isn't going to be reduced,
6685 we can't eliminate BL. We can try forcing it to be reduced,
6686 but that can generate poor code.
6688 The problem is that the benefit of reducing TV, below should
6689 be increased if BL can actually be eliminated, but this means
6690 we might have to do a topological sort of the order in which
6691 we try to process biv. It doesn't seem worthwhile to do
6692 this sort of thing now. */
6695 /* Otherwise the reg compared with had better be a biv. */
6696 if (GET_CODE (arg) != REG
6697 || reg_iv_type[REGNO (arg)] != BASIC_INDUCT)
6700 /* Look for a pair of givs, one for each biv,
6701 with identical coefficients. */
6702 for (v = bl->giv; v; v = v->next_iv)
6704 struct induction *tv;
6706 if (v->ignore || v->maybe_dead || v->mode != mode)
6709 for (tv = reg_biv_class[REGNO (arg)]->giv; tv; tv = tv->next_iv)
6710 if (! tv->ignore && ! tv->maybe_dead
6711 && rtx_equal_p (tv->mult_val, v->mult_val)
6712 && rtx_equal_p (tv->add_val, v->add_val)
6713 && tv->mode == mode)
6715 /* If the giv V had the auto-inc address optimization applied
6716 to it, and INSN occurs between the giv insn and the biv
6717 insn, then we must adjust the value used here.
6718 This is rare, so we don't bother to do so. */
6720 && ((INSN_LUID (v->insn) < INSN_LUID (insn)
6721 && INSN_LUID (insn) < INSN_LUID (bl->biv->insn))
6722 || (INSN_LUID (v->insn) > INSN_LUID (insn)
6723 && INSN_LUID (insn) > INSN_LUID (bl->biv->insn))))
6729 /* Replace biv with its giv's reduced reg. */
6730 XEXP (x, 1-arg_operand) = v->new_reg;
6731 /* Replace other operand with the other giv's
6733 XEXP (x, arg_operand) = tv->new_reg;
6740 /* If we get here, the biv can't be eliminated. */
6744 /* If this address is a DEST_ADDR giv, it doesn't matter if the
6745 biv is used in it, since it will be replaced. */
6746 for (v = bl->giv; v; v = v->next_iv)
6747 if (v->giv_type == DEST_ADDR && v->location == &XEXP (x, 0))
6755 /* See if any subexpression fails elimination. */
6756 fmt = GET_RTX_FORMAT (code);
6757 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6762 if (! maybe_eliminate_biv_1 (XEXP (x, i), insn, bl,
6763 eliminate_p, where))
6768 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6769 if (! maybe_eliminate_biv_1 (XVECEXP (x, i, j), insn, bl,
6770 eliminate_p, where))
6779 /* Return nonzero if the last use of REG
6780 is in an insn following INSN in the same basic block. */
6783 last_use_this_basic_block (reg, insn)
6789 n && GET_CODE (n) != CODE_LABEL && GET_CODE (n) != JUMP_INSN;
6792 if (REGNO_LAST_UID (REGNO (reg)) == INSN_UID (n))
6798 /* Called via `note_stores' to record the initial value of a biv. Here we
6799 just record the location of the set and process it later. */
6802 record_initial (dest, set)
6806 struct iv_class *bl;
6808 if (GET_CODE (dest) != REG
6809 || REGNO (dest) >= max_reg_before_loop
6810 || reg_iv_type[REGNO (dest)] != BASIC_INDUCT)
6813 bl = reg_biv_class[REGNO (dest)];
6815 /* If this is the first set found, record it. */
6816 if (bl->init_insn == 0)
6818 bl->init_insn = note_insn;
6823 /* If any of the registers in X are "old" and currently have a last use earlier
6824 than INSN, update them to have a last use of INSN. Their actual last use
6825 will be the previous insn but it will not have a valid uid_luid so we can't
6829 update_reg_last_use (x, insn)
6833 /* Check for the case where INSN does not have a valid luid. In this case,
6834 there is no need to modify the regno_last_uid, as this can only happen
6835 when code is inserted after the loop_end to set a pseudo's final value,
6836 and hence this insn will never be the last use of x. */
6837 if (GET_CODE (x) == REG && REGNO (x) < max_reg_before_loop
6838 && INSN_UID (insn) < max_uid_for_loop
6839 && uid_luid[REGNO_LAST_UID (REGNO (x))] < uid_luid[INSN_UID (insn)])
6840 REGNO_LAST_UID (REGNO (x)) = INSN_UID (insn);
6844 register char *fmt = GET_RTX_FORMAT (GET_CODE (x));
6845 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
6848 update_reg_last_use (XEXP (x, i), insn);
6849 else if (fmt[i] == 'E')
6850 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6851 update_reg_last_use (XVECEXP (x, i, j), insn);
6856 /* Given a jump insn JUMP, return the condition that will cause it to branch
6857 to its JUMP_LABEL. If the condition cannot be understood, or is an
6858 inequality floating-point comparison which needs to be reversed, 0 will
6861 If EARLIEST is non-zero, it is a pointer to a place where the earliest
6862 insn used in locating the condition was found. If a replacement test
6863 of the condition is desired, it should be placed in front of that
6864 insn and we will be sure that the inputs are still valid.
6866 The condition will be returned in a canonical form to simplify testing by
6867 callers. Specifically:
6869 (1) The code will always be a comparison operation (EQ, NE, GT, etc.).
6870 (2) Both operands will be machine operands; (cc0) will have been replaced.
6871 (3) If an operand is a constant, it will be the second operand.
6872 (4) (LE x const) will be replaced with (LT x <const+1>) and similarly
6873 for GE, GEU, and LEU. */
6876 get_condition (jump, earliest)
6885 int reverse_code = 0;
6886 int did_reverse_condition = 0;
6888 /* If this is not a standard conditional jump, we can't parse it. */
6889 if (GET_CODE (jump) != JUMP_INSN
6890 || ! condjump_p (jump) || simplejump_p (jump))
6893 code = GET_CODE (XEXP (SET_SRC (PATTERN (jump)), 0));
6894 op0 = XEXP (XEXP (SET_SRC (PATTERN (jump)), 0), 0);
6895 op1 = XEXP (XEXP (SET_SRC (PATTERN (jump)), 0), 1);
6900 /* If this branches to JUMP_LABEL when the condition is false, reverse
6902 if (GET_CODE (XEXP (SET_SRC (PATTERN (jump)), 2)) == LABEL_REF
6903 && XEXP (XEXP (SET_SRC (PATTERN (jump)), 2), 0) == JUMP_LABEL (jump))
6904 code = reverse_condition (code), did_reverse_condition ^= 1;
6906 /* If we are comparing a register with zero, see if the register is set
6907 in the previous insn to a COMPARE or a comparison operation. Perform
6908 the same tests as a function of STORE_FLAG_VALUE as find_comparison_args
6911 while (GET_RTX_CLASS (code) == '<' && op1 == CONST0_RTX (GET_MODE (op0)))
6913 /* Set non-zero when we find something of interest. */
6917 /* If comparison with cc0, import actual comparison from compare
6921 if ((prev = prev_nonnote_insn (prev)) == 0
6922 || GET_CODE (prev) != INSN
6923 || (set = single_set (prev)) == 0
6924 || SET_DEST (set) != cc0_rtx)
6927 op0 = SET_SRC (set);
6928 op1 = CONST0_RTX (GET_MODE (op0));
6934 /* If this is a COMPARE, pick up the two things being compared. */
6935 if (GET_CODE (op0) == COMPARE)
6937 op1 = XEXP (op0, 1);
6938 op0 = XEXP (op0, 0);
6941 else if (GET_CODE (op0) != REG)
6944 /* Go back to the previous insn. Stop if it is not an INSN. We also
6945 stop if it isn't a single set or if it has a REG_INC note because
6946 we don't want to bother dealing with it. */
6948 if ((prev = prev_nonnote_insn (prev)) == 0
6949 || GET_CODE (prev) != INSN
6950 || FIND_REG_INC_NOTE (prev, 0)
6951 || (set = single_set (prev)) == 0)
6954 /* If this is setting OP0, get what it sets it to if it looks
6956 if (rtx_equal_p (SET_DEST (set), op0))
6958 enum machine_mode inner_mode = GET_MODE (SET_SRC (set));
6960 if ((GET_CODE (SET_SRC (set)) == COMPARE
6963 && GET_MODE_CLASS (inner_mode) == MODE_INT
6964 && (GET_MODE_BITSIZE (inner_mode)
6965 <= HOST_BITS_PER_WIDE_INT)
6966 && (STORE_FLAG_VALUE
6967 & ((HOST_WIDE_INT) 1
6968 << (GET_MODE_BITSIZE (inner_mode) - 1))))
6969 #ifdef FLOAT_STORE_FLAG_VALUE
6971 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
6972 && FLOAT_STORE_FLAG_VALUE < 0)
6975 && GET_RTX_CLASS (GET_CODE (SET_SRC (set))) == '<')))
6977 else if (((code == EQ
6979 && (GET_MODE_BITSIZE (inner_mode)
6980 <= HOST_BITS_PER_WIDE_INT)
6981 && GET_MODE_CLASS (inner_mode) == MODE_INT
6982 && (STORE_FLAG_VALUE
6983 & ((HOST_WIDE_INT) 1
6984 << (GET_MODE_BITSIZE (inner_mode) - 1))))
6985 #ifdef FLOAT_STORE_FLAG_VALUE
6987 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
6988 && FLOAT_STORE_FLAG_VALUE < 0)
6991 && GET_RTX_CLASS (GET_CODE (SET_SRC (set))) == '<')
6993 /* We might have reversed a LT to get a GE here. But this wasn't
6994 actually the comparison of data, so we don't flag that we
6995 have had to reverse the condition. */
6996 did_reverse_condition ^= 1;
7004 else if (reg_set_p (op0, prev))
7005 /* If this sets OP0, but not directly, we have to give up. */
7010 if (GET_RTX_CLASS (GET_CODE (x)) == '<')
7011 code = GET_CODE (x);
7014 code = reverse_condition (code);
7015 did_reverse_condition ^= 1;
7019 op0 = XEXP (x, 0), op1 = XEXP (x, 1);
7025 /* If constant is first, put it last. */
7026 if (CONSTANT_P (op0))
7027 code = swap_condition (code), tem = op0, op0 = op1, op1 = tem;
7029 /* If OP0 is the result of a comparison, we weren't able to find what
7030 was really being compared, so fail. */
7031 if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_CC)
7034 /* Canonicalize any ordered comparison with integers involving equality
7035 if we can do computations in the relevant mode and we do not
7038 if (GET_CODE (op1) == CONST_INT
7039 && GET_MODE (op0) != VOIDmode
7040 && GET_MODE_BITSIZE (GET_MODE (op0)) <= HOST_BITS_PER_WIDE_INT)
7042 HOST_WIDE_INT const_val = INTVAL (op1);
7043 unsigned HOST_WIDE_INT uconst_val = const_val;
7044 unsigned HOST_WIDE_INT max_val
7045 = (unsigned HOST_WIDE_INT) GET_MODE_MASK (GET_MODE (op0));
7050 if (const_val != max_val >> 1)
7051 code = LT, op1 = GEN_INT (const_val + 1);
7056 != (((HOST_WIDE_INT) 1
7057 << (GET_MODE_BITSIZE (GET_MODE (op0)) - 1))))
7058 code = GT, op1 = GEN_INT (const_val - 1);
7062 if (uconst_val != max_val)
7063 code = LTU, op1 = GEN_INT (uconst_val + 1);
7067 if (uconst_val != 0)
7068 code = GTU, op1 = GEN_INT (uconst_val - 1);
7076 /* If this was floating-point and we reversed anything other than an
7077 EQ or NE, return zero. */
7078 if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT
7079 && did_reverse_condition && code != NE && code != EQ
7081 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_FLOAT)
7085 /* Never return CC0; return zero instead. */
7090 return gen_rtx (code, VOIDmode, op0, op1);
7093 /* Similar to above routine, except that we also put an invariant last
7094 unless both operands are invariants. */
7097 get_condition_for_loop (x)
7100 rtx comparison = get_condition (x, NULL_PTR);
7103 || ! invariant_p (XEXP (comparison, 0))
7104 || invariant_p (XEXP (comparison, 1)))
7107 return gen_rtx (swap_condition (GET_CODE (comparison)), VOIDmode,
7108 XEXP (comparison, 1), XEXP (comparison, 0));
7112 /* Analyze a loop in order to instrument it with the use of count register.
7113 loop_start and loop_end are the first and last insns of the loop.
7114 This function works in cooperation with insert_bct ().
7115 loop_can_insert_bct[loop_num] is set according to whether the optimization
7116 is applicable to the loop. When it is applicable, the following variables
7118 loop_start_value[loop_num]
7119 loop_comparison_value[loop_num]
7120 loop_increment[loop_num]
7121 loop_comparison_code[loop_num] */
7124 void analyze_loop_iterations (loop_start, loop_end)
7125 rtx loop_start, loop_end;
7127 rtx comparison, comparison_value;
7128 rtx iteration_var, initial_value, increment;
7129 enum rtx_code comparison_code;
7135 /* loop_variable mode */
7136 enum machine_mode original_mode;
7138 /* find the number of the loop */
7139 int loop_num = uid_loop_num [INSN_UID (loop_start)];
7141 /* we change our mind only when we are sure that loop will be instrumented */
7142 loop_can_insert_bct[loop_num] = 0;
7144 /* is the optimization suppressed. */
7145 if ( !flag_branch_on_count_reg )
7148 /* make sure that count-reg is not in use */
7149 if (loop_used_count_register[loop_num]){
7150 if (loop_dump_stream)
7151 fprintf (loop_dump_stream,
7152 "analyze_loop_iterations %d: BCT instrumentation failed: count register already in use\n",
7157 /* make sure that the function has no indirect jumps. */
7158 if (indirect_jump_in_function){
7159 if (loop_dump_stream)
7160 fprintf (loop_dump_stream,
7161 "analyze_loop_iterations %d: BCT instrumentation failed: indirect jump in function\n",
7166 /* make sure that the last loop insn is a conditional jump */
7167 last_loop_insn = PREV_INSN (loop_end);
7168 if (GET_CODE (last_loop_insn) != JUMP_INSN || !condjump_p (last_loop_insn)) {
7169 if (loop_dump_stream)
7170 fprintf (loop_dump_stream,
7171 "analyze_loop_iterations %d: BCT instrumentation failed: invalid jump at loop end\n",
7176 /* First find the iteration variable. If the last insn is a conditional
7177 branch, and the insn preceding it tests a register value, make that
7178 register the iteration variable. */
7180 /* We used to use prev_nonnote_insn here, but that fails because it might
7181 accidentally get the branch for a contained loop if the branch for this
7182 loop was deleted. We can only trust branches immediately before the
7185 comparison = get_condition_for_loop (last_loop_insn);
7186 /* ??? Get_condition may switch position of induction variable and
7187 invariant register when it canonicalizes the comparison. */
7189 if (comparison == 0) {
7190 if (loop_dump_stream)
7191 fprintf (loop_dump_stream,
7192 "analyze_loop_iterations %d: BCT instrumentation failed: comparison not found\n",
7197 comparison_code = GET_CODE (comparison);
7198 iteration_var = XEXP (comparison, 0);
7199 comparison_value = XEXP (comparison, 1);
7201 original_mode = GET_MODE (iteration_var);
7202 if (GET_MODE_CLASS (original_mode) != MODE_INT
7203 || GET_MODE_SIZE (original_mode) != UNITS_PER_WORD) {
7204 if (loop_dump_stream)
7205 fprintf (loop_dump_stream,
7206 "analyze_loop_iterations %d: BCT Instrumentation failed: loop variable not integer\n",
7211 /* get info about loop bounds and increment */
7212 iteration_info (iteration_var, &initial_value, &increment,
7213 loop_start, loop_end);
7215 /* make sure that all required loop data were found */
7216 if (!(initial_value && increment && comparison_value
7217 && invariant_p (comparison_value) && invariant_p (increment)
7218 && ! indirect_jump_in_function))
7220 if (loop_dump_stream) {
7221 fprintf (loop_dump_stream,
7222 "analyze_loop_iterations %d: BCT instrumentation failed because of wrong loop: ", loop_num);
7223 if (!(initial_value && increment && comparison_value)) {
7224 fprintf (loop_dump_stream, "\tbounds not available: ");
7225 if ( ! initial_value )
7226 fprintf (loop_dump_stream, "initial ");
7228 fprintf (loop_dump_stream, "increment ");
7229 if ( ! comparison_value )
7230 fprintf (loop_dump_stream, "comparison ");
7231 fprintf (loop_dump_stream, "\n");
7233 if (!invariant_p (comparison_value) || !invariant_p (increment))
7234 fprintf (loop_dump_stream, "\tloop bounds not invariant\n");
7239 /* make sure that the increment is constant */
7240 if (GET_CODE (increment) != CONST_INT) {
7241 if (loop_dump_stream)
7242 fprintf (loop_dump_stream,
7243 "analyze_loop_iterations %d: instrumentation failed: not arithmetic loop\n",
7248 /* make sure that the loop contains neither function call, nor jump on table.
7249 (the count register might be altered by the called function, and might
7250 be used for a branch on table). */
7251 for (insn = loop_start; insn && insn != loop_end; insn = NEXT_INSN (insn)) {
7252 if (GET_CODE (insn) == CALL_INSN){
7253 if (loop_dump_stream)
7254 fprintf (loop_dump_stream,
7255 "analyze_loop_iterations %d: BCT instrumentation failed: function call in the loop\n",
7260 if (GET_CODE (insn) == JUMP_INSN
7261 && (GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC
7262 || GET_CODE (PATTERN (insn)) == ADDR_VEC)){
7263 if (loop_dump_stream)
7264 fprintf (loop_dump_stream,
7265 "analyze_loop_iterations %d: BCT instrumentation failed: computed branch in the loop\n",
7271 /* At this point, we are sure that the loop can be instrumented with BCT.
7272 Some of the loops, however, will not be instrumented - the final decision
7273 is taken by insert_bct () */
7274 if (loop_dump_stream)
7275 fprintf (loop_dump_stream,
7276 "analyze_loop_iterations: loop (luid =%d) can be BCT instrumented.\n",
7279 /* mark all enclosing loops that they cannot use count register */
7280 /* ???: In fact, since insert_bct may decide not to instrument this loop,
7281 marking here may prevent instrumenting an enclosing loop that could
7282 actually be instrumented. But since this is rare, it is safer to mark
7283 here in case the order of calling (analyze/insert)_bct would be changed. */
7284 for (i=loop_num; i != -1; i = loop_outer_loop[i])
7285 loop_used_count_register[i] = 1;
7287 /* Set data structures which will be used by the instrumentation phase */
7288 loop_start_value[loop_num] = initial_value;
7289 loop_comparison_value[loop_num] = comparison_value;
7290 loop_increment[loop_num] = increment;
7291 loop_comparison_code[loop_num] = comparison_code;
7292 loop_can_insert_bct[loop_num] = 1;
7296 /* instrument loop for insertion of bct instruction. We distinguish between
7297 loops with compile-time bounds, to those with run-time bounds. The loop
7298 behaviour is analized according to the following characteristics/variables:
7300 ; comparison-value: the value to which the iteration counter is compared.
7301 ; initial-value: iteration-counter initial value.
7302 ; increment: iteration-counter increment.
7303 ; Computed variables:
7304 ; increment-direction: the sign of the increment.
7305 ; compare-direction: '1' for GT, GTE, '-1' for LT, LTE, '0' for NE.
7306 ; range-direction: sign (comparison-value - initial-value)
7307 We give up on the following cases:
7308 ; loop variable overflow.
7309 ; run-time loop bounds with comparison code NE.
7313 insert_bct (loop_start, loop_end)
7314 rtx loop_start, loop_end;
7316 rtx initial_value, comparison_value, increment;
7317 enum rtx_code comparison_code;
7319 int increment_direction, compare_direction;
7322 /* if the loop condition is <= or >=, the number of iteration
7323 is 1 more than the range of the bounds of the loop */
7324 int add_iteration = 0;
7326 /* the only machine mode we work with - is the integer of the size that the
7328 enum machine_mode loop_var_mode = SImode;
7330 int loop_num = uid_loop_num [INSN_UID (loop_start)];
7332 /* get loop-variables. No need to check that these are valid - already
7333 checked in analyze_loop_iterations (). */
7334 comparison_code = loop_comparison_code[loop_num];
7335 initial_value = loop_start_value[loop_num];
7336 comparison_value = loop_comparison_value[loop_num];
7337 increment = loop_increment[loop_num];
7339 /* check analyze_loop_iterations decision for this loop. */
7340 if (! loop_can_insert_bct[loop_num]){
7341 if (loop_dump_stream)
7342 fprintf (loop_dump_stream,
7343 "insert_bct: [%d] - was decided not to instrument by analyze_loop_iterations ()\n",
7348 /* It's impossible to instrument a competely unrolled loop. */
7349 if (loop_unroll_factor [loop_num] == -1)
7352 /* make sure that the last loop insn is a conditional jump .
7353 This check is repeated from analyze_loop_iterations (),
7354 because unrolling might have changed that. */
7355 if (GET_CODE (PREV_INSN (loop_end)) != JUMP_INSN
7356 || !condjump_p (PREV_INSN (loop_end))) {
7357 if (loop_dump_stream)
7358 fprintf (loop_dump_stream,
7359 "insert_bct: not instrumenting BCT because of invalid branch\n");
7363 /* fix increment in case loop was unrolled. */
7364 if (loop_unroll_factor [loop_num] > 1)
7365 increment = GEN_INT ( INTVAL (increment) * loop_unroll_factor [loop_num] );
7367 /* determine properties and directions of the loop */
7368 increment_direction = (INTVAL (increment) > 0) ? 1:-1;
7369 switch ( comparison_code ) {
7374 compare_direction = 1;
7381 compare_direction = -1;
7385 /* in this case we cannot know the number of iterations */
7386 if (loop_dump_stream)
7387 fprintf (loop_dump_stream,
7388 "insert_bct: %d: loop cannot be instrumented: == in condition\n",
7395 compare_direction = 1;
7401 compare_direction = -1;
7404 compare_direction = 0;
7411 /* make sure that the loop does not end by an overflow */
7412 if (compare_direction != increment_direction) {
7413 if (loop_dump_stream)
7414 fprintf (loop_dump_stream,
7415 "insert_bct: %d: loop cannot be instrumented: terminated by overflow\n",
7420 /* try to instrument the loop. */
7422 /* Handle the simpler case, where the bounds are known at compile time. */
7423 if (GET_CODE (initial_value) == CONST_INT && GET_CODE (comparison_value) == CONST_INT)
7426 int increment_value_abs = INTVAL (increment) * increment_direction;
7428 /* check the relation between compare-val and initial-val */
7429 int difference = INTVAL (comparison_value) - INTVAL (initial_value);
7430 int range_direction = (difference > 0) ? 1 : -1;
7432 /* make sure the loop executes enough iterations to gain from BCT */
7433 if (difference > -3 && difference < 3) {
7434 if (loop_dump_stream)
7435 fprintf (loop_dump_stream,
7436 "insert_bct: loop %d not BCT instrumented: too small iteration count.\n",
7441 /* make sure that the loop executes at least once */
7442 if ((range_direction == 1 && compare_direction == -1)
7443 || (range_direction == -1 && compare_direction == 1))
7445 if (loop_dump_stream)
7446 fprintf (loop_dump_stream,
7447 "insert_bct: loop %d: does not iterate even once. Not instrumenting.\n",
7452 /* make sure that the loop does not end by an overflow (in compile time
7453 bounds we must have an additional check for overflow, because here
7454 we also support the compare code of 'NE'. */
7455 if (comparison_code == NE
7456 && increment_direction != range_direction) {
7457 if (loop_dump_stream)
7458 fprintf (loop_dump_stream,
7459 "insert_bct (compile time bounds): %d: loop not instrumented: terminated by overflow\n",
7464 /* Determine the number of iterations by:
7466 ; compare-val - initial-val + (increment -1) + additional-iteration
7467 ; num_iterations = -----------------------------------------------------------------
7470 difference = (range_direction > 0) ? difference : -difference;
7472 fprintf (stderr, "difference is: %d\n", difference); /* @*/
7473 fprintf (stderr, "increment_value_abs is: %d\n", increment_value_abs); /* @*/
7474 fprintf (stderr, "add_iteration is: %d\n", add_iteration); /* @*/
7475 fprintf (stderr, "INTVAL (comparison_value) is: %d\n", INTVAL (comparison_value)); /* @*/
7476 fprintf (stderr, "INTVAL (initial_value) is: %d\n", INTVAL (initial_value)); /* @*/
7479 if (increment_value_abs == 0) {
7480 fprintf (stderr, "insert_bct: error: increment == 0 !!!\n");
7483 n_iterations = (difference + increment_value_abs - 1 + add_iteration)
7484 / increment_value_abs;
7487 fprintf (stderr, "number of iterations is: %d\n", n_iterations); /* @*/
7489 instrument_loop_bct (loop_start, loop_end, GEN_INT (n_iterations));
7491 /* Done with this loop. */
7495 /* Handle the more complex case, that the bounds are NOT known at compile time. */
7496 /* In this case we generate run_time calculation of the number of iterations */
7498 /* With runtime bounds, if the compare is of the form '!=' we give up */
7499 if (comparison_code == NE) {
7500 if (loop_dump_stream)
7501 fprintf (loop_dump_stream,
7502 "insert_bct: fail for loop %d: runtime bounds with != comparison\n",
7508 /* We rely on the existence of run-time guard to ensure that the
7509 loop executes at least once. */
7511 rtx iterations_num_reg;
7513 int increment_value_abs = INTVAL (increment) * increment_direction;
7515 /* make sure that the increment is a power of two, otherwise (an
7516 expensive) divide is needed. */
7517 if (exact_log2 (increment_value_abs) == -1)
7519 if (loop_dump_stream)
7520 fprintf (loop_dump_stream,
7521 "insert_bct: not instrumenting BCT because the increment is not power of 2\n");
7525 /* compute the number of iterations */
7528 /* CYGNUS LOCAL: HAIFA bug fix */
7531 /* Again, the number of iterations is calculated by:
7533 ; compare-val - initial-val + (increment -1) + additional-iteration
7534 ; num_iterations = -----------------------------------------------------------------
7537 /* ??? Do we have to call copy_rtx here before passing rtx to
7539 if (compare_direction > 0) {
7540 /* <, <= :the loop variable is increasing */
7541 temp_reg = expand_binop (loop_var_mode, sub_optab, comparison_value,
7542 initial_value, NULL_RTX, 0, OPTAB_LIB_WIDEN);
7545 temp_reg = expand_binop (loop_var_mode, sub_optab, initial_value,
7546 comparison_value, NULL_RTX, 0, OPTAB_LIB_WIDEN);
7549 if (increment_value_abs - 1 + add_iteration != 0)
7550 temp_reg = expand_binop (loop_var_mode, add_optab, temp_reg,
7551 GEN_INT (increment_value_abs - 1 + add_iteration),
7552 NULL_RTX, 0, OPTAB_LIB_WIDEN);
7554 if (increment_value_abs != 1)
7556 /* ??? This will generate an expensive divide instruction for
7557 most targets. The original authors apparently expected this
7558 to be a shift, since they test for power-of-2 divisors above,
7559 but just naively generating a divide instruction will not give
7560 a shift. It happens to work for the PowerPC target because
7561 the rs6000.md file has a divide pattern that emits shifts.
7562 It will probably not work for any other target. */
7563 iterations_num_reg = expand_binop (loop_var_mode, sdiv_optab,
7565 GEN_INT (increment_value_abs),
7566 NULL_RTX, 0, OPTAB_LIB_WIDEN);
7569 iterations_num_reg = temp_reg;
7570 /* END CYGNUS LOCAL: HAIFA bug fix */
7572 sequence = gen_sequence ();
7574 emit_insn_before (sequence, loop_start);
7575 instrument_loop_bct (loop_start, loop_end, iterations_num_reg);
7579 /* instrument loop by inserting a bct in it. This is done in the following way:
7580 1. A new register is created and assigned the hard register number of the count
7582 2. In the head of the loop the new variable is initialized by the value passed in the
7583 loop_num_iterations parameter.
7584 3. At the end of the loop, comparison of the register with 0 is generated.
7585 The created comparison follows the pattern defined for the
7586 decrement_and_branch_on_count insn, so this insn will be generated in assembly
7588 4. The compare&branch on the old variable is deleted. So, if the loop-variable was
7589 not used elsewhere, it will be eliminated by data-flow analisys. */
7592 instrument_loop_bct (loop_start, loop_end, loop_num_iterations)
7593 rtx loop_start, loop_end;
7594 rtx loop_num_iterations;
7596 rtx temp_reg1, temp_reg2;
7600 enum machine_mode loop_var_mode = SImode;
7602 #ifdef HAVE_decrement_and_branch_on_count
7603 if (HAVE_decrement_and_branch_on_count)
7605 if (loop_dump_stream)
7606 fprintf (loop_dump_stream, "Loop: Inserting BCT\n");
7608 /* eliminate the check on the old variable */
7609 delete_insn (PREV_INSN (loop_end));
7610 delete_insn (PREV_INSN (loop_end));
7612 /* insert the label which will delimit the start of the loop */
7613 start_label = gen_label_rtx ();
7614 emit_label_after (start_label, loop_start);
7616 /* insert initialization of the count register into the loop header */
7618 temp_reg1 = gen_reg_rtx (loop_var_mode);
7619 emit_insn (gen_move_insn (temp_reg1, loop_num_iterations));
7621 /* this will be count register */
7622 temp_reg2 = gen_rtx (REG, loop_var_mode, COUNT_REGISTER_REGNUM);
7623 /* we have to move the value to the count register from an GPR
7624 because rtx pointed to by loop_num_iterations could contain
7625 expression which cannot be moved into count register */
7626 emit_insn (gen_move_insn (temp_reg2, temp_reg1));
7628 sequence = gen_sequence ();
7630 emit_insn_after (sequence, loop_start);
7632 /* insert new comparison on the count register instead of the
7633 old one, generating the needed BCT pattern (that will be
7634 later recognized by assembly generation phase). */
7635 emit_jump_insn_before (gen_decrement_and_branch_on_count (temp_reg2, start_label),
7637 LABEL_NUSES (start_label)++;
7640 #endif /* HAVE_decrement_and_branch_on_count */
7644 /* Scan the function and determine whether it has indirect (computed) jumps.
7646 This is taken mostly from flow.c; similar code exists elsewhere
7647 in the compiler. It may be useful to put this into rtlanal.c. */
7649 indirect_jump_in_function_p (start)
7653 int is_indirect_jump = 0;
7655 for (insn = start; insn; insn = NEXT_INSN (insn))
7656 if (computed_jump_p (insn))
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