1 /* Perform various loop optimizations, including strength reduction.
2 Copyright (C) 1987, 1988, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
23 /* This is the loop optimization pass of the compiler.
24 It finds invariant computations within loops and moves them
25 to the beginning of the loop. Then it identifies basic and
26 general induction variables. Strength reduction is applied to the general
27 induction variables, and induction variable elimination is applied to
28 the basic induction variables.
30 It also finds cases where
31 a register is set within the loop by zero-extending a narrower value
32 and changes these to zero the entire register once before the loop
33 and merely copy the low part within the loop.
35 Most of the complexity is in heuristics to decide when it is worth
36 while to do these things. */
45 #include "hard-reg-set.h"
46 #include "basic-block.h"
47 #include "insn-config.h"
48 #include "insn-flags.h"
58 /* Vector mapping INSN_UIDs to luids.
59 The luids are like uids but increase monotonically always.
60 We use them to see whether a jump comes from outside a given loop. */
64 /* Indexed by INSN_UID, contains the ordinal giving the (innermost) loop
65 number the insn is contained in. */
67 struct loop **uid_loop;
69 /* 1 + largest uid of any insn. */
73 /* 1 + luid of last insn. */
77 /* Number of loops detected in current function. Used as index to the
80 static int max_loop_num;
82 /* Indexed by register number, contains the number of times the reg
83 is set during the loop being scanned.
84 During code motion, a negative value indicates a reg that has been
85 made a candidate; in particular -2 means that it is an candidate that
86 we know is equal to a constant and -1 means that it is an candidate
87 not known equal to a constant.
88 After code motion, regs moved have 0 (which is accurate now)
89 while the failed candidates have the original number of times set.
91 Therefore, at all times, == 0 indicates an invariant register;
92 < 0 a conditionally invariant one. */
94 static varray_type set_in_loop;
96 /* Original value of set_in_loop; same except that this value
97 is not set negative for a reg whose sets have been made candidates
98 and not set to 0 for a reg that is moved. */
100 static varray_type n_times_set;
102 /* Index by register number, 1 indicates that the register
103 cannot be moved or strength reduced. */
105 static varray_type may_not_optimize;
107 /* Contains the insn in which a register was used if it was used
108 exactly once; contains const0_rtx if it was used more than once. */
110 static varray_type reg_single_usage;
112 /* Nonzero means reg N has already been moved out of one loop.
113 This reduces the desire to move it out of another. */
115 static char *moved_once;
117 /* List of MEMs that are stored in this loop. */
119 static rtx loop_store_mems;
121 /* The insn where the first of these was found. */
122 static rtx first_loop_store_insn;
124 typedef struct loop_mem_info {
125 rtx mem; /* The MEM itself. */
126 rtx reg; /* Corresponding pseudo, if any. */
127 int optimize; /* Nonzero if we can optimize access to this MEM. */
130 /* Array of MEMs that are used (read or written) in this loop, but
131 cannot be aliased by anything in this loop, except perhaps
132 themselves. In other words, if loop_mems[i] is altered during the
133 loop, it is altered by an expression that is rtx_equal_p to it. */
135 static loop_mem_info *loop_mems;
137 /* The index of the next available slot in LOOP_MEMS. */
139 static int loop_mems_idx;
141 /* The number of elements allocated in LOOP_MEMs. */
143 static int loop_mems_allocated;
145 /* Nonzero if we don't know what MEMs were changed in the current
146 loop. This happens if the loop contains a call (in which case
147 `loop_info->has_call' will also be set) or if we store into more
148 than NUM_STORES MEMs. */
150 static int unknown_address_altered;
152 /* The above doesn't count any readonly memory locations that are stored.
155 static int unknown_constant_address_altered;
157 /* Count of movable (i.e. invariant) instructions discovered in the loop. */
158 static int num_movables;
160 /* Count of memory write instructions discovered in the loop. */
161 static int num_mem_sets;
163 /* Bound on pseudo register number before loop optimization.
164 A pseudo has valid regscan info if its number is < max_reg_before_loop. */
165 unsigned int max_reg_before_loop;
167 /* The value to pass to the next call of reg_scan_update. */
168 static int loop_max_reg;
170 /* This obstack is used in product_cheap_p to allocate its rtl. It
171 may call gen_reg_rtx which, in turn, may reallocate regno_reg_rtx.
172 If we used the same obstack that it did, we would be deallocating
175 static struct obstack temp_obstack;
177 /* This is where the pointer to the obstack being used for RTL is stored. */
179 extern struct obstack *rtl_obstack;
181 #define obstack_chunk_alloc xmalloc
182 #define obstack_chunk_free free
184 /* During the analysis of a loop, a chain of `struct movable's
185 is made to record all the movable insns found.
186 Then the entire chain can be scanned to decide which to move. */
190 rtx insn; /* A movable insn */
191 rtx set_src; /* The expression this reg is set from. */
192 rtx set_dest; /* The destination of this SET. */
193 rtx dependencies; /* When INSN is libcall, this is an EXPR_LIST
194 of any registers used within the LIBCALL. */
195 int consec; /* Number of consecutive following insns
196 that must be moved with this one. */
197 unsigned int regno; /* The register it sets */
198 short lifetime; /* lifetime of that register;
199 may be adjusted when matching movables
200 that load the same value are found. */
201 short savings; /* Number of insns we can move for this reg,
202 including other movables that force this
203 or match this one. */
204 unsigned int cond : 1; /* 1 if only conditionally movable */
205 unsigned int force : 1; /* 1 means MUST move this insn */
206 unsigned int global : 1; /* 1 means reg is live outside this loop */
207 /* If PARTIAL is 1, GLOBAL means something different:
208 that the reg is live outside the range from where it is set
209 to the following label. */
210 unsigned int done : 1; /* 1 inhibits further processing of this */
212 unsigned int partial : 1; /* 1 means this reg is used for zero-extending.
213 In particular, moving it does not make it
215 unsigned int move_insn : 1; /* 1 means that we call emit_move_insn to
216 load SRC, rather than copying INSN. */
217 unsigned int move_insn_first:1;/* Same as above, if this is necessary for the
218 first insn of a consecutive sets group. */
219 unsigned int is_equiv : 1; /* 1 means a REG_EQUIV is present on INSN. */
220 enum machine_mode savemode; /* Nonzero means it is a mode for a low part
221 that we should avoid changing when clearing
222 the rest of the reg. */
223 struct movable *match; /* First entry for same value */
224 struct movable *forces; /* An insn that must be moved if this is */
225 struct movable *next;
228 static struct movable *the_movables;
230 FILE *loop_dump_stream;
232 /* Forward declarations. */
234 static void verify_dominator PARAMS ((struct loop *));
235 static void find_and_verify_loops PARAMS ((rtx, struct loops *));
236 static void mark_loop_jump PARAMS ((rtx, struct loop *));
237 static void prescan_loop PARAMS ((struct loop *));
238 static int reg_in_basic_block_p PARAMS ((rtx, rtx));
239 static int consec_sets_invariant_p PARAMS ((const struct loop *,
241 static int labels_in_range_p PARAMS ((rtx, int));
242 static void count_one_set PARAMS ((rtx, rtx, varray_type, rtx *));
244 static void count_loop_regs_set PARAMS ((rtx, rtx, varray_type, varray_type,
246 static void note_addr_stored PARAMS ((rtx, rtx, void *));
247 static void note_set_pseudo_multiple_uses PARAMS ((rtx, rtx, void *));
248 static int loop_reg_used_before_p PARAMS ((const struct loop *, rtx, rtx));
249 static void scan_loop PARAMS ((struct loop*, int));
251 static void replace_call_address PARAMS ((rtx, rtx, rtx));
253 static rtx skip_consec_insns PARAMS ((rtx, int));
254 static int libcall_benefit PARAMS ((rtx));
255 static void ignore_some_movables PARAMS ((struct movable *));
256 static void force_movables PARAMS ((struct movable *));
257 static void combine_movables PARAMS ((struct movable *, int));
258 static int regs_match_p PARAMS ((rtx, rtx, struct movable *));
259 static int rtx_equal_for_loop_p PARAMS ((rtx, rtx, struct movable *));
260 static void add_label_notes PARAMS ((rtx, rtx));
261 static void move_movables PARAMS ((struct loop *loop, struct movable *,
263 static int count_nonfixed_reads PARAMS ((const struct loop *, rtx));
264 static void strength_reduce PARAMS ((struct loop *, int, int));
265 static void find_single_use_in_loop PARAMS ((rtx, rtx, varray_type));
266 static int valid_initial_value_p PARAMS ((rtx, rtx, int, rtx));
267 static void find_mem_givs PARAMS ((const struct loop *, rtx, rtx, int, int));
268 static void record_biv PARAMS ((struct induction *, rtx, rtx, rtx, rtx, rtx *,
270 static void check_final_value PARAMS ((const struct loop *,
271 struct induction *));
272 static void record_giv PARAMS ((const struct loop *, struct induction *,
273 rtx, rtx, rtx, rtx, rtx, int, enum g_types,
275 static void update_giv_derive PARAMS ((const struct loop *, rtx));
276 static int basic_induction_var PARAMS ((const struct loop *, rtx,
277 enum machine_mode, rtx, rtx,
278 rtx *, rtx *, rtx **));
279 static rtx simplify_giv_expr PARAMS ((const struct loop *, rtx, int *));
280 static int general_induction_var PARAMS ((const struct loop *loop, rtx, rtx *,
281 rtx *, rtx *, int, int *, enum machine_mode));
282 static int consec_sets_giv PARAMS ((const struct loop *, int, rtx,
283 rtx, rtx, rtx *, rtx *, rtx *));
284 static int check_dbra_loop PARAMS ((struct loop *, int));
285 static rtx express_from_1 PARAMS ((rtx, rtx, rtx));
286 static rtx combine_givs_p PARAMS ((struct induction *, struct induction *));
287 static void combine_givs PARAMS ((struct iv_class *));
288 struct recombine_givs_stats;
289 static int find_life_end PARAMS ((rtx, struct recombine_givs_stats *,
291 static void recombine_givs PARAMS ((const struct loop *, struct iv_class *,
293 static int product_cheap_p PARAMS ((rtx, rtx));
294 static int maybe_eliminate_biv PARAMS ((const struct loop *, struct iv_class *,
296 static int maybe_eliminate_biv_1 PARAMS ((const struct loop *, rtx, rtx,
297 struct iv_class *, int, rtx));
298 static int last_use_this_basic_block PARAMS ((rtx, rtx));
299 static void record_initial PARAMS ((rtx, rtx, void *));
300 static void update_reg_last_use PARAMS ((rtx, rtx));
301 static rtx next_insn_in_loop PARAMS ((const struct loop *, rtx));
302 static void load_mems_and_recount_loop_regs_set PARAMS ((const struct loop*,
304 static void load_mems PARAMS ((const struct loop *));
305 static int insert_loop_mem PARAMS ((rtx *, void *));
306 static int replace_loop_mem PARAMS ((rtx *, void *));
307 static int replace_loop_reg PARAMS ((rtx *, void *));
308 static void note_reg_stored PARAMS ((rtx, rtx, void *));
309 static void try_copy_prop PARAMS ((const struct loop *, rtx, unsigned int));
310 static int replace_label PARAMS ((rtx *, void *));
311 static rtx check_insn_for_givs PARAMS((struct loop *, rtx, int, int));
312 static rtx check_insn_for_bivs PARAMS((struct loop *, rtx, int, int));
314 typedef struct rtx_and_int {
319 typedef struct rtx_pair {
324 /* Nonzero iff INSN is between START and END, inclusive. */
325 #define INSN_IN_RANGE_P(INSN, START, END) \
326 (INSN_UID (INSN) < max_uid_for_loop \
327 && INSN_LUID (INSN) >= INSN_LUID (START) \
328 && INSN_LUID (INSN) <= INSN_LUID (END))
330 #ifdef HAVE_decrement_and_branch_on_count
331 /* Test whether BCT applicable and safe. */
332 static void insert_bct PARAMS ((struct loop *));
334 /* Auxiliary function that inserts the BCT pattern into the loop. */
335 static void instrument_loop_bct PARAMS ((rtx, rtx, rtx));
336 #endif /* HAVE_decrement_and_branch_on_count */
338 /* Indirect_jump_in_function is computed once per function. */
339 int indirect_jump_in_function = 0;
340 static int indirect_jump_in_function_p PARAMS ((rtx));
342 static int compute_luids PARAMS ((rtx, rtx, int));
344 static int biv_elimination_giv_has_0_offset PARAMS ((struct induction *,
345 struct induction *, rtx));
347 /* Relative gain of eliminating various kinds of operations. */
350 static int shift_cost;
351 static int mult_cost;
354 /* Benefit penalty, if a giv is not replaceable, i.e. must emit an insn to
355 copy the value of the strength reduced giv to its original register. */
356 static int copy_cost;
358 /* Cost of using a register, to normalize the benefits of a giv. */
359 static int reg_address_cost;
365 char *free_point = (char *) oballoc (1);
366 rtx reg = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 1);
368 add_cost = rtx_cost (gen_rtx_PLUS (word_mode, reg, reg), SET);
370 reg_address_cost = address_cost (reg, SImode);
372 /* We multiply by 2 to reconcile the difference in scale between
373 these two ways of computing costs. Otherwise the cost of a copy
374 will be far less than the cost of an add. */
378 /* Free the objects we just allocated. */
381 /* Initialize the obstack used for rtl in product_cheap_p. */
382 gcc_obstack_init (&temp_obstack);
385 /* Compute the mapping from uids to luids.
386 LUIDs are numbers assigned to insns, like uids,
387 except that luids increase monotonically through the code.
388 Start at insn START and stop just before END. Assign LUIDs
389 starting with PREV_LUID + 1. Return the last assigned LUID + 1. */
391 compute_luids (start, end, prev_luid)
398 for (insn = start, i = prev_luid; insn != end; insn = NEXT_INSN (insn))
400 if (INSN_UID (insn) >= max_uid_for_loop)
402 /* Don't assign luids to line-number NOTEs, so that the distance in
403 luids between two insns is not affected by -g. */
404 if (GET_CODE (insn) != NOTE
405 || NOTE_LINE_NUMBER (insn) <= 0)
406 uid_luid[INSN_UID (insn)] = ++i;
408 /* Give a line number note the same luid as preceding insn. */
409 uid_luid[INSN_UID (insn)] = i;
414 /* Entry point of this file. Perform loop optimization
415 on the current function. F is the first insn of the function
416 and DUMPFILE is a stream for output of a trace of actions taken
417 (or 0 if none should be output). */
420 loop_optimize (f, dumpfile, flags)
421 /* f is the first instruction of a chain of insns for one function */
428 struct loops loops_data;
429 struct loops *loops = &loops_data;
430 struct loop_info *loops_info;
432 loop_dump_stream = dumpfile;
434 init_recog_no_volatile ();
436 max_reg_before_loop = max_reg_num ();
437 loop_max_reg = max_reg_before_loop;
441 /* Count the number of loops. */
444 for (insn = f; insn; insn = NEXT_INSN (insn))
446 if (GET_CODE (insn) == NOTE
447 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
451 /* Don't waste time if no loops. */
452 if (max_loop_num == 0)
455 loops->num = max_loop_num;
457 moved_once = (char *) xcalloc (max_reg_before_loop, sizeof (char));
459 /* Get size to use for tables indexed by uids.
460 Leave some space for labels allocated by find_and_verify_loops. */
461 max_uid_for_loop = get_max_uid () + 1 + max_loop_num * 32;
463 uid_luid = (int *) xcalloc (max_uid_for_loop, sizeof (int));
464 uid_loop = (struct loop **) xcalloc (max_uid_for_loop,
465 sizeof (struct loop *));
467 /* Allocate storage for array of loops. */
468 loops->array = (struct loop *)
469 xcalloc (loops->num, sizeof (struct loop));
471 /* Find and process each loop.
472 First, find them, and record them in order of their beginnings. */
473 find_and_verify_loops (f, loops);
475 /* Allocate and initialize auxiliary loop information. */
476 loops_info = xcalloc (loops->num, sizeof (struct loop_info));
477 for (i = 0; i < loops->num; i++)
478 loops->array[i].aux = loops_info + i;
480 /* Now find all register lifetimes. This must be done after
481 find_and_verify_loops, because it might reorder the insns in the
483 reg_scan (f, max_reg_before_loop, 1);
485 /* This must occur after reg_scan so that registers created by gcse
486 will have entries in the register tables.
488 We could have added a call to reg_scan after gcse_main in toplev.c,
489 but moving this call to init_alias_analysis is more efficient. */
490 init_alias_analysis ();
492 /* See if we went too far. Note that get_max_uid already returns
493 one more that the maximum uid of all insn. */
494 if (get_max_uid () > max_uid_for_loop)
496 /* Now reset it to the actual size we need. See above. */
497 max_uid_for_loop = get_max_uid ();
499 /* find_and_verify_loops has already called compute_luids, but it
500 might have rearranged code afterwards, so we need to recompute
502 max_luid = compute_luids (f, NULL_RTX, 0);
504 /* Don't leave gaps in uid_luid for insns that have been
505 deleted. It is possible that the first or last insn
506 using some register has been deleted by cross-jumping.
507 Make sure that uid_luid for that former insn's uid
508 points to the general area where that insn used to be. */
509 for (i = 0; i < max_uid_for_loop; i++)
511 uid_luid[0] = uid_luid[i];
512 if (uid_luid[0] != 0)
515 for (i = 0; i < max_uid_for_loop; i++)
516 if (uid_luid[i] == 0)
517 uid_luid[i] = uid_luid[i - 1];
519 /* Determine if the function has indirect jump. On some systems
520 this prevents low overhead loop instructions from being used. */
521 indirect_jump_in_function = indirect_jump_in_function_p (f);
523 /* Now scan the loops, last ones first, since this means inner ones are done
524 before outer ones. */
525 for (i = max_loop_num - 1; i >= 0; i--)
527 struct loop *loop = &loops->array[i];
529 if (! loop->invalid && loop->end)
530 scan_loop (loop, flags);
533 /* If there were lexical blocks inside the loop, they have been
534 replicated. We will now have more than one NOTE_INSN_BLOCK_BEG
535 and NOTE_INSN_BLOCK_END for each such block. We must duplicate
536 the BLOCKs as well. */
537 if (write_symbols != NO_DEBUG)
540 end_alias_analysis ();
550 /* Returns the next insn, in execution order, after INSN. START and
551 END are the NOTE_INSN_LOOP_BEG and NOTE_INSN_LOOP_END for the loop,
552 respectively. LOOP->TOP, if non-NULL, is the top of the loop in the
553 insn-stream; it is used with loops that are entered near the
557 next_insn_in_loop (loop, insn)
558 const struct loop *loop;
561 insn = NEXT_INSN (insn);
563 if (insn == loop->end)
566 /* Go to the top of the loop, and continue there. */
573 if (insn == loop->scan_start)
580 /* Optimize one loop described by LOOP. */
582 /* ??? Could also move memory writes out of loops if the destination address
583 is invariant, the source is invariant, the memory write is not volatile,
584 and if we can prove that no read inside the loop can read this address
585 before the write occurs. If there is a read of this address after the
586 write, then we can also mark the memory read as invariant. */
589 scan_loop (loop, flags)
594 rtx loop_start = loop->start;
595 rtx loop_end = loop->end;
596 /* Additional information about the current loop being processed
597 that is used to compute the number of loop iterations for loop
598 unrolling and doloop optimization. */
599 struct loop_info *loop_info = LOOP_INFO (loop);
601 /* 1 if we are scanning insns that could be executed zero times. */
603 /* 1 if we are scanning insns that might never be executed
604 due to a subroutine call which might exit before they are reached. */
606 /* Jump insn that enters the loop, or 0 if control drops in. */
607 rtx loop_entry_jump = 0;
608 /* Number of insns in the loop. */
612 rtx temp, update_start, update_end;
613 /* The SET from an insn, if it is the only SET in the insn. */
615 /* Chain describing insns movable in current loop. */
616 struct movable *movables = 0;
617 /* Last element in `movables' -- so we can add elements at the end. */
618 struct movable *last_movable = 0;
619 /* Ratio of extra register life span we can justify
620 for saving an instruction. More if loop doesn't call subroutines
621 since in that case saving an insn makes more difference
622 and more registers are available. */
624 /* Nonzero if we are scanning instructions in a sub-loop. */
630 /* Determine whether this loop starts with a jump down to a test at
631 the end. This will occur for a small number of loops with a test
632 that is too complex to duplicate in front of the loop.
634 We search for the first insn or label in the loop, skipping NOTEs.
635 However, we must be careful not to skip past a NOTE_INSN_LOOP_BEG
636 (because we might have a loop executed only once that contains a
637 loop which starts with a jump to its exit test) or a NOTE_INSN_LOOP_END
638 (in case we have a degenerate loop).
640 Note that if we mistakenly think that a loop is entered at the top
641 when, in fact, it is entered at the exit test, the only effect will be
642 slightly poorer optimization. Making the opposite error can generate
643 incorrect code. Since very few loops now start with a jump to the
644 exit test, the code here to detect that case is very conservative. */
646 for (p = NEXT_INSN (loop_start);
648 && GET_CODE (p) != CODE_LABEL && GET_RTX_CLASS (GET_CODE (p)) != 'i'
649 && (GET_CODE (p) != NOTE
650 || (NOTE_LINE_NUMBER (p) != NOTE_INSN_LOOP_BEG
651 && NOTE_LINE_NUMBER (p) != NOTE_INSN_LOOP_END));
655 loop->scan_start = p;
657 /* Set up variables describing this loop. */
659 threshold = (loop_info->has_call ? 1 : 2) * (1 + n_non_fixed_regs);
661 /* If loop has a jump before the first label,
662 the true entry is the target of that jump.
663 Start scan from there.
664 But record in LOOP->TOP the place where the end-test jumps
665 back to so we can scan that after the end of the loop. */
666 if (GET_CODE (p) == JUMP_INSN)
670 /* Loop entry must be unconditional jump (and not a RETURN) */
671 if (any_uncondjump_p (p)
672 && JUMP_LABEL (p) != 0
673 /* Check to see whether the jump actually
674 jumps out of the loop (meaning it's no loop).
675 This case can happen for things like
676 do {..} while (0). If this label was generated previously
677 by loop, we can't tell anything about it and have to reject
679 && INSN_IN_RANGE_P (JUMP_LABEL (p), loop_start, loop_end))
681 loop->top = next_label (loop->scan_start);
682 loop->scan_start = JUMP_LABEL (p);
686 /* If LOOP->SCAN_START was an insn created by loop, we don't know its luid
687 as required by loop_reg_used_before_p. So skip such loops. (This
688 test may never be true, but it's best to play it safe.)
690 Also, skip loops where we do not start scanning at a label. This
691 test also rejects loops starting with a JUMP_INSN that failed the
694 if (INSN_UID (loop->scan_start) >= max_uid_for_loop
695 || GET_CODE (loop->scan_start) != CODE_LABEL)
697 if (loop_dump_stream)
698 fprintf (loop_dump_stream, "\nLoop from %d to %d is phony.\n\n",
699 INSN_UID (loop_start), INSN_UID (loop_end));
703 /* Count number of times each reg is set during this loop.
704 Set VARRAY_CHAR (may_not_optimize, I) if it is not safe to move out
705 the setting of register I. Set VARRAY_RTX (reg_single_usage, I). */
707 /* Allocate extra space for REGS that might be created by
708 load_mems. We allocate a little extra slop as well, in the hopes
709 that even after the moving of movables creates some new registers
710 we won't have to reallocate these arrays. However, we do grow
711 the arrays, if necessary, in load_mems_recount_loop_regs_set. */
712 nregs = max_reg_num () + loop_mems_idx + 16;
713 VARRAY_INT_INIT (set_in_loop, nregs, "set_in_loop");
714 VARRAY_INT_INIT (n_times_set, nregs, "n_times_set");
715 VARRAY_CHAR_INIT (may_not_optimize, nregs, "may_not_optimize");
716 VARRAY_RTX_INIT (reg_single_usage, nregs, "reg_single_usage");
718 count_loop_regs_set (loop->top ? loop->top : loop->start, loop->end,
719 may_not_optimize, reg_single_usage, &insn_count, nregs);
721 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
723 VARRAY_CHAR (may_not_optimize, i) = 1;
724 VARRAY_INT (set_in_loop, i) = 1;
727 #ifdef AVOID_CCMODE_COPIES
728 /* Don't try to move insns which set CC registers if we should not
729 create CCmode register copies. */
730 for (i = max_reg_num () - 1; i >= FIRST_PSEUDO_REGISTER; i--)
731 if (GET_MODE_CLASS (GET_MODE (regno_reg_rtx[i])) == MODE_CC)
732 VARRAY_CHAR (may_not_optimize, i) = 1;
735 bcopy ((char *) &set_in_loop->data,
736 (char *) &n_times_set->data, nregs * sizeof (int));
738 if (loop_dump_stream)
740 fprintf (loop_dump_stream, "\nLoop from %d to %d: %d real insns.\n",
741 INSN_UID (loop_start), INSN_UID (loop_end), insn_count);
743 fprintf (loop_dump_stream, "Continue at insn %d.\n",
744 INSN_UID (loop->cont));
747 /* Scan through the loop finding insns that are safe to move.
748 Set set_in_loop negative for the reg being set, so that
749 this reg will be considered invariant for subsequent insns.
750 We consider whether subsequent insns use the reg
751 in deciding whether it is worth actually moving.
753 MAYBE_NEVER is nonzero if we have passed a conditional jump insn
754 and therefore it is possible that the insns we are scanning
755 would never be executed. At such times, we must make sure
756 that it is safe to execute the insn once instead of zero times.
757 When MAYBE_NEVER is 0, all insns will be executed at least once
758 so that is not a problem. */
760 for (p = next_insn_in_loop (loop, loop->scan_start);
762 p = next_insn_in_loop (loop, p))
764 if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
765 && find_reg_note (p, REG_LIBCALL, NULL_RTX))
767 else if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
768 && find_reg_note (p, REG_RETVAL, NULL_RTX))
771 if (GET_CODE (p) == INSN
772 && (set = single_set (p))
773 && GET_CODE (SET_DEST (set)) == REG
774 && ! VARRAY_CHAR (may_not_optimize, REGNO (SET_DEST (set))))
779 rtx src = SET_SRC (set);
780 rtx dependencies = 0;
782 /* Figure out what to use as a source of this insn. If a REG_EQUIV
783 note is given or if a REG_EQUAL note with a constant operand is
784 specified, use it as the source and mark that we should move
785 this insn by calling emit_move_insn rather that duplicating the
788 Otherwise, only use the REG_EQUAL contents if a REG_RETVAL note
790 temp = find_reg_note (p, REG_EQUIV, NULL_RTX);
792 src = XEXP (temp, 0), move_insn = 1;
795 temp = find_reg_note (p, REG_EQUAL, NULL_RTX);
796 if (temp && CONSTANT_P (XEXP (temp, 0)))
797 src = XEXP (temp, 0), move_insn = 1;
798 if (temp && find_reg_note (p, REG_RETVAL, NULL_RTX))
800 src = XEXP (temp, 0);
801 /* A libcall block can use regs that don't appear in
802 the equivalent expression. To move the libcall,
803 we must move those regs too. */
804 dependencies = libcall_other_reg (p, src);
808 /* Don't try to optimize a register that was made
809 by loop-optimization for an inner loop.
810 We don't know its life-span, so we can't compute the benefit. */
811 if (REGNO (SET_DEST (set)) >= max_reg_before_loop)
813 else if (/* The register is used in basic blocks other
814 than the one where it is set (meaning that
815 something after this point in the loop might
816 depend on its value before the set). */
817 ! reg_in_basic_block_p (p, SET_DEST (set))
818 /* And the set is not guaranteed to be executed one
819 the loop starts, or the value before the set is
820 needed before the set occurs...
822 ??? Note we have quadratic behaviour here, mitigated
823 by the fact that the previous test will often fail for
824 large loops. Rather than re-scanning the entire loop
825 each time for register usage, we should build tables
826 of the register usage and use them here instead. */
828 || loop_reg_used_before_p (loop, set, p)))
829 /* It is unsafe to move the set.
831 This code used to consider it OK to move a set of a variable
832 which was not created by the user and not used in an exit test.
833 That behavior is incorrect and was removed. */
835 else if ((tem = loop_invariant_p (loop, src))
836 && (dependencies == 0
837 || (tem2 = loop_invariant_p (loop, dependencies)) != 0)
838 && (VARRAY_INT (set_in_loop,
839 REGNO (SET_DEST (set))) == 1
841 = consec_sets_invariant_p
842 (loop, SET_DEST (set),
843 VARRAY_INT (set_in_loop, REGNO (SET_DEST (set))),
845 /* If the insn can cause a trap (such as divide by zero),
846 can't move it unless it's guaranteed to be executed
847 once loop is entered. Even a function call might
848 prevent the trap insn from being reached
849 (since it might exit!) */
850 && ! ((maybe_never || call_passed)
851 && may_trap_p (src)))
853 register struct movable *m;
854 register int regno = REGNO (SET_DEST (set));
856 /* A potential lossage is where we have a case where two insns
857 can be combined as long as they are both in the loop, but
858 we move one of them outside the loop. For large loops,
859 this can lose. The most common case of this is the address
860 of a function being called.
862 Therefore, if this register is marked as being used exactly
863 once if we are in a loop with calls (a "large loop"), see if
864 we can replace the usage of this register with the source
865 of this SET. If we can, delete this insn.
867 Don't do this if P has a REG_RETVAL note or if we have
868 SMALL_REGISTER_CLASSES and SET_SRC is a hard register. */
870 if (loop_info->has_call
871 && VARRAY_RTX (reg_single_usage, regno) != 0
872 && VARRAY_RTX (reg_single_usage, regno) != const0_rtx
873 && REGNO_FIRST_UID (regno) == INSN_UID (p)
874 && (REGNO_LAST_UID (regno)
875 == INSN_UID (VARRAY_RTX (reg_single_usage, regno)))
876 && VARRAY_INT (set_in_loop, regno) == 1
877 && ! side_effects_p (SET_SRC (set))
878 && ! find_reg_note (p, REG_RETVAL, NULL_RTX)
879 && (! SMALL_REGISTER_CLASSES
880 || (! (GET_CODE (SET_SRC (set)) == REG
881 && REGNO (SET_SRC (set)) < FIRST_PSEUDO_REGISTER)))
882 /* This test is not redundant; SET_SRC (set) might be
883 a call-clobbered register and the life of REGNO
884 might span a call. */
885 && ! modified_between_p (SET_SRC (set), p,
887 (reg_single_usage, regno))
888 && no_labels_between_p (p, VARRAY_RTX (reg_single_usage, regno))
889 && validate_replace_rtx (SET_DEST (set), SET_SRC (set),
891 (reg_single_usage, regno)))
893 /* Replace any usage in a REG_EQUAL note. Must copy the
894 new source, so that we don't get rtx sharing between the
895 SET_SOURCE and REG_NOTES of insn p. */
896 REG_NOTES (VARRAY_RTX (reg_single_usage, regno))
897 = replace_rtx (REG_NOTES (VARRAY_RTX
898 (reg_single_usage, regno)),
899 SET_DEST (set), copy_rtx (SET_SRC (set)));
902 NOTE_LINE_NUMBER (p) = NOTE_INSN_DELETED;
903 NOTE_SOURCE_FILE (p) = 0;
904 VARRAY_INT (set_in_loop, regno) = 0;
908 m = (struct movable *) alloca (sizeof (struct movable));
912 m->dependencies = dependencies;
913 m->set_dest = SET_DEST (set);
915 m->consec = VARRAY_INT (set_in_loop,
916 REGNO (SET_DEST (set))) - 1;
920 m->move_insn = move_insn;
921 m->move_insn_first = 0;
922 m->is_equiv = (find_reg_note (p, REG_EQUIV, NULL_RTX) != 0);
923 m->savemode = VOIDmode;
925 /* Set M->cond if either loop_invariant_p
926 or consec_sets_invariant_p returned 2
927 (only conditionally invariant). */
928 m->cond = ((tem | tem1 | tem2) > 1);
929 m->global = (uid_luid[REGNO_LAST_UID (regno)]
930 > INSN_LUID (loop_end)
931 || uid_luid[REGNO_FIRST_UID (regno)] < INSN_LUID (loop_start));
933 m->lifetime = (uid_luid[REGNO_LAST_UID (regno)]
934 - uid_luid[REGNO_FIRST_UID (regno)]);
935 m->savings = VARRAY_INT (n_times_set, regno);
936 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
937 m->savings += libcall_benefit (p);
938 VARRAY_INT (set_in_loop, regno) = move_insn ? -2 : -1;
939 /* Add M to the end of the chain MOVABLES. */
943 last_movable->next = m;
948 /* It is possible for the first instruction to have a
949 REG_EQUAL note but a non-invariant SET_SRC, so we must
950 remember the status of the first instruction in case
951 the last instruction doesn't have a REG_EQUAL note. */
952 m->move_insn_first = m->move_insn;
954 /* Skip this insn, not checking REG_LIBCALL notes. */
955 p = next_nonnote_insn (p);
956 /* Skip the consecutive insns, if there are any. */
957 p = skip_consec_insns (p, m->consec);
958 /* Back up to the last insn of the consecutive group. */
959 p = prev_nonnote_insn (p);
961 /* We must now reset m->move_insn, m->is_equiv, and possibly
962 m->set_src to correspond to the effects of all the
964 temp = find_reg_note (p, REG_EQUIV, NULL_RTX);
966 m->set_src = XEXP (temp, 0), m->move_insn = 1;
969 temp = find_reg_note (p, REG_EQUAL, NULL_RTX);
970 if (temp && CONSTANT_P (XEXP (temp, 0)))
971 m->set_src = XEXP (temp, 0), m->move_insn = 1;
976 m->is_equiv = (find_reg_note (p, REG_EQUIV, NULL_RTX) != 0);
979 /* If this register is always set within a STRICT_LOW_PART
980 or set to zero, then its high bytes are constant.
981 So clear them outside the loop and within the loop
982 just load the low bytes.
983 We must check that the machine has an instruction to do so.
984 Also, if the value loaded into the register
985 depends on the same register, this cannot be done. */
986 else if (SET_SRC (set) == const0_rtx
987 && GET_CODE (NEXT_INSN (p)) == INSN
988 && (set1 = single_set (NEXT_INSN (p)))
989 && GET_CODE (set1) == SET
990 && (GET_CODE (SET_DEST (set1)) == STRICT_LOW_PART)
991 && (GET_CODE (XEXP (SET_DEST (set1), 0)) == SUBREG)
992 && (SUBREG_REG (XEXP (SET_DEST (set1), 0))
994 && !reg_mentioned_p (SET_DEST (set), SET_SRC (set1)))
996 register int regno = REGNO (SET_DEST (set));
997 if (VARRAY_INT (set_in_loop, regno) == 2)
999 register struct movable *m;
1000 m = (struct movable *) alloca (sizeof (struct movable));
1003 m->set_dest = SET_DEST (set);
1004 m->dependencies = 0;
1010 m->move_insn_first = 0;
1012 /* If the insn may not be executed on some cycles,
1013 we can't clear the whole reg; clear just high part.
1014 Not even if the reg is used only within this loop.
1021 Clearing x before the inner loop could clobber a value
1022 being saved from the last time around the outer loop.
1023 However, if the reg is not used outside this loop
1024 and all uses of the register are in the same
1025 basic block as the store, there is no problem.
1027 If this insn was made by loop, we don't know its
1028 INSN_LUID and hence must make a conservative
1030 m->global = (INSN_UID (p) >= max_uid_for_loop
1031 || (uid_luid[REGNO_LAST_UID (regno)]
1032 > INSN_LUID (loop_end))
1033 || (uid_luid[REGNO_FIRST_UID (regno)]
1035 || (labels_in_range_p
1036 (p, uid_luid[REGNO_FIRST_UID (regno)])));
1037 if (maybe_never && m->global)
1038 m->savemode = GET_MODE (SET_SRC (set1));
1040 m->savemode = VOIDmode;
1044 m->lifetime = (uid_luid[REGNO_LAST_UID (regno)]
1045 - uid_luid[REGNO_FIRST_UID (regno)]);
1047 VARRAY_INT (set_in_loop, regno) = -1;
1048 /* Add M to the end of the chain MOVABLES. */
1052 last_movable->next = m;
1057 /* Past a call insn, we get to insns which might not be executed
1058 because the call might exit. This matters for insns that trap.
1059 Call insns inside a REG_LIBCALL/REG_RETVAL block always return,
1060 so they don't count. */
1061 else if (GET_CODE (p) == CALL_INSN && ! in_libcall)
1063 /* Past a label or a jump, we get to insns for which we
1064 can't count on whether or how many times they will be
1065 executed during each iteration. Therefore, we can
1066 only move out sets of trivial variables
1067 (those not used after the loop). */
1068 /* Similar code appears twice in strength_reduce. */
1069 else if ((GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN)
1070 /* If we enter the loop in the middle, and scan around to the
1071 beginning, don't set maybe_never for that. This must be an
1072 unconditional jump, otherwise the code at the top of the
1073 loop might never be executed. Unconditional jumps are
1074 followed a by barrier then loop end. */
1075 && ! (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p) == loop->top
1076 && NEXT_INSN (NEXT_INSN (p)) == loop_end
1077 && any_uncondjump_p (p)))
1079 else if (GET_CODE (p) == NOTE)
1081 /* At the virtual top of a converted loop, insns are again known to
1082 be executed: logically, the loop begins here even though the exit
1083 code has been duplicated. */
1084 if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP && loop_depth == 0)
1085 maybe_never = call_passed = 0;
1086 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
1088 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
1093 /* If one movable subsumes another, ignore that other. */
1095 ignore_some_movables (movables);
1097 /* For each movable insn, see if the reg that it loads
1098 leads when it dies right into another conditionally movable insn.
1099 If so, record that the second insn "forces" the first one,
1100 since the second can be moved only if the first is. */
1102 force_movables (movables);
1104 /* See if there are multiple movable insns that load the same value.
1105 If there are, make all but the first point at the first one
1106 through the `match' field, and add the priorities of them
1107 all together as the priority of the first. */
1109 combine_movables (movables, nregs);
1111 /* Now consider each movable insn to decide whether it is worth moving.
1112 Store 0 in set_in_loop for each reg that is moved.
1114 Generally this increases code size, so do not move moveables when
1115 optimizing for code size. */
1117 if (! optimize_size)
1118 move_movables (loop, movables, threshold, insn_count, nregs);
1120 /* Now candidates that still are negative are those not moved.
1121 Change set_in_loop to indicate that those are not actually invariant. */
1122 for (i = 0; i < nregs; i++)
1123 if (VARRAY_INT (set_in_loop, i) < 0)
1124 VARRAY_INT (set_in_loop, i) = VARRAY_INT (n_times_set, i);
1126 /* Now that we've moved some things out of the loop, we might be able to
1127 hoist even more memory references. */
1128 load_mems_and_recount_loop_regs_set (loop, &insn_count);
1130 for (update_start = loop_start;
1131 PREV_INSN (update_start)
1132 && GET_CODE (PREV_INSN (update_start)) != CODE_LABEL;
1133 update_start = PREV_INSN (update_start))
1135 update_end = NEXT_INSN (loop_end);
1137 reg_scan_update (update_start, update_end, loop_max_reg);
1138 loop_max_reg = max_reg_num ();
1140 if (flag_strength_reduce)
1142 the_movables = movables;
1143 strength_reduce (loop, insn_count, flags);
1145 reg_scan_update (update_start, update_end, loop_max_reg);
1146 loop_max_reg = max_reg_num ();
1149 VARRAY_FREE (reg_single_usage);
1150 VARRAY_FREE (set_in_loop);
1151 VARRAY_FREE (n_times_set);
1152 VARRAY_FREE (may_not_optimize);
1155 /* Add elements to *OUTPUT to record all the pseudo-regs
1156 mentioned in IN_THIS but not mentioned in NOT_IN_THIS. */
1159 record_excess_regs (in_this, not_in_this, output)
1160 rtx in_this, not_in_this;
1167 code = GET_CODE (in_this);
1181 if (REGNO (in_this) >= FIRST_PSEUDO_REGISTER
1182 && ! reg_mentioned_p (in_this, not_in_this))
1183 *output = gen_rtx_EXPR_LIST (VOIDmode, in_this, *output);
1190 fmt = GET_RTX_FORMAT (code);
1191 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1198 for (j = 0; j < XVECLEN (in_this, i); j++)
1199 record_excess_regs (XVECEXP (in_this, i, j), not_in_this, output);
1203 record_excess_regs (XEXP (in_this, i), not_in_this, output);
1209 /* Check what regs are referred to in the libcall block ending with INSN,
1210 aside from those mentioned in the equivalent value.
1211 If there are none, return 0.
1212 If there are one or more, return an EXPR_LIST containing all of them. */
1215 libcall_other_reg (insn, equiv)
1218 rtx note = find_reg_note (insn, REG_RETVAL, NULL_RTX);
1219 rtx p = XEXP (note, 0);
1222 /* First, find all the regs used in the libcall block
1223 that are not mentioned as inputs to the result. */
1227 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
1228 || GET_CODE (p) == CALL_INSN)
1229 record_excess_regs (PATTERN (p), equiv, &output);
1236 /* Return 1 if all uses of REG
1237 are between INSN and the end of the basic block. */
1240 reg_in_basic_block_p (insn, reg)
1243 int regno = REGNO (reg);
1246 if (REGNO_FIRST_UID (regno) != INSN_UID (insn))
1249 /* Search this basic block for the already recorded last use of the reg. */
1250 for (p = insn; p; p = NEXT_INSN (p))
1252 switch (GET_CODE (p))
1259 /* Ordinary insn: if this is the last use, we win. */
1260 if (REGNO_LAST_UID (regno) == INSN_UID (p))
1265 /* Jump insn: if this is the last use, we win. */
1266 if (REGNO_LAST_UID (regno) == INSN_UID (p))
1268 /* Otherwise, it's the end of the basic block, so we lose. */
1273 /* It's the end of the basic block, so we lose. */
1281 /* The "last use" that was recorded can't be found after the first
1282 use. This can happen when the last use was deleted while
1283 processing an inner loop, this inner loop was then completely
1284 unrolled, and the outer loop is always exited after the inner loop,
1285 so that everything after the first use becomes a single basic block. */
1289 /* Compute the benefit of eliminating the insns in the block whose
1290 last insn is LAST. This may be a group of insns used to compute a
1291 value directly or can contain a library call. */
1294 libcall_benefit (last)
1300 for (insn = XEXP (find_reg_note (last, REG_RETVAL, NULL_RTX), 0);
1301 insn != last; insn = NEXT_INSN (insn))
1303 if (GET_CODE (insn) == CALL_INSN)
1304 benefit += 10; /* Assume at least this many insns in a library
1306 else if (GET_CODE (insn) == INSN
1307 && GET_CODE (PATTERN (insn)) != USE
1308 && GET_CODE (PATTERN (insn)) != CLOBBER)
1315 /* Skip COUNT insns from INSN, counting library calls as 1 insn. */
1318 skip_consec_insns (insn, count)
1322 for (; count > 0; count--)
1326 /* If first insn of libcall sequence, skip to end. */
1327 /* Do this at start of loop, since INSN is guaranteed to
1329 if (GET_CODE (insn) != NOTE
1330 && (temp = find_reg_note (insn, REG_LIBCALL, NULL_RTX)))
1331 insn = XEXP (temp, 0);
1333 do insn = NEXT_INSN (insn);
1334 while (GET_CODE (insn) == NOTE);
1340 /* Ignore any movable whose insn falls within a libcall
1341 which is part of another movable.
1342 We make use of the fact that the movable for the libcall value
1343 was made later and so appears later on the chain. */
1346 ignore_some_movables (movables)
1347 struct movable *movables;
1349 register struct movable *m, *m1;
1351 for (m = movables; m; m = m->next)
1353 /* Is this a movable for the value of a libcall? */
1354 rtx note = find_reg_note (m->insn, REG_RETVAL, NULL_RTX);
1358 /* Check for earlier movables inside that range,
1359 and mark them invalid. We cannot use LUIDs here because
1360 insns created by loop.c for prior loops don't have LUIDs.
1361 Rather than reject all such insns from movables, we just
1362 explicitly check each insn in the libcall (since invariant
1363 libcalls aren't that common). */
1364 for (insn = XEXP (note, 0); insn != m->insn; insn = NEXT_INSN (insn))
1365 for (m1 = movables; m1 != m; m1 = m1->next)
1366 if (m1->insn == insn)
1372 /* For each movable insn, see if the reg that it loads
1373 leads when it dies right into another conditionally movable insn.
1374 If so, record that the second insn "forces" the first one,
1375 since the second can be moved only if the first is. */
1378 force_movables (movables)
1379 struct movable *movables;
1381 register struct movable *m, *m1;
1382 for (m1 = movables; m1; m1 = m1->next)
1383 /* Omit this if moving just the (SET (REG) 0) of a zero-extend. */
1384 if (!m1->partial && !m1->done)
1386 int regno = m1->regno;
1387 for (m = m1->next; m; m = m->next)
1388 /* ??? Could this be a bug? What if CSE caused the
1389 register of M1 to be used after this insn?
1390 Since CSE does not update regno_last_uid,
1391 this insn M->insn might not be where it dies.
1392 But very likely this doesn't matter; what matters is
1393 that M's reg is computed from M1's reg. */
1394 if (INSN_UID (m->insn) == REGNO_LAST_UID (regno)
1397 if (m != 0 && m->set_src == m1->set_dest
1398 /* If m->consec, m->set_src isn't valid. */
1402 /* Increase the priority of the moving the first insn
1403 since it permits the second to be moved as well. */
1407 m1->lifetime += m->lifetime;
1408 m1->savings += m->savings;
1413 /* Find invariant expressions that are equal and can be combined into
1417 combine_movables (movables, nregs)
1418 struct movable *movables;
1421 register struct movable *m;
1422 char *matched_regs = (char *) xmalloc (nregs);
1423 enum machine_mode mode;
1425 /* Regs that are set more than once are not allowed to match
1426 or be matched. I'm no longer sure why not. */
1427 /* Perhaps testing m->consec_sets would be more appropriate here? */
1429 for (m = movables; m; m = m->next)
1430 if (m->match == 0 && VARRAY_INT (n_times_set, m->regno) == 1 && !m->partial)
1432 register struct movable *m1;
1433 int regno = m->regno;
1435 bzero (matched_regs, nregs);
1436 matched_regs[regno] = 1;
1438 /* We want later insns to match the first one. Don't make the first
1439 one match any later ones. So start this loop at m->next. */
1440 for (m1 = m->next; m1; m1 = m1->next)
1441 if (m != m1 && m1->match == 0 && VARRAY_INT (n_times_set, m1->regno) == 1
1442 /* A reg used outside the loop mustn't be eliminated. */
1444 /* A reg used for zero-extending mustn't be eliminated. */
1446 && (matched_regs[m1->regno]
1449 /* Can combine regs with different modes loaded from the
1450 same constant only if the modes are the same or
1451 if both are integer modes with M wider or the same
1452 width as M1. The check for integer is redundant, but
1453 safe, since the only case of differing destination
1454 modes with equal sources is when both sources are
1455 VOIDmode, i.e., CONST_INT. */
1456 (GET_MODE (m->set_dest) == GET_MODE (m1->set_dest)
1457 || (GET_MODE_CLASS (GET_MODE (m->set_dest)) == MODE_INT
1458 && GET_MODE_CLASS (GET_MODE (m1->set_dest)) == MODE_INT
1459 && (GET_MODE_BITSIZE (GET_MODE (m->set_dest))
1460 >= GET_MODE_BITSIZE (GET_MODE (m1->set_dest)))))
1461 /* See if the source of M1 says it matches M. */
1462 && ((GET_CODE (m1->set_src) == REG
1463 && matched_regs[REGNO (m1->set_src)])
1464 || rtx_equal_for_loop_p (m->set_src, m1->set_src,
1466 && ((m->dependencies == m1->dependencies)
1467 || rtx_equal_p (m->dependencies, m1->dependencies)))
1469 m->lifetime += m1->lifetime;
1470 m->savings += m1->savings;
1473 matched_regs[m1->regno] = 1;
1477 /* Now combine the regs used for zero-extension.
1478 This can be done for those not marked `global'
1479 provided their lives don't overlap. */
1481 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
1482 mode = GET_MODE_WIDER_MODE (mode))
1484 register struct movable *m0 = 0;
1486 /* Combine all the registers for extension from mode MODE.
1487 Don't combine any that are used outside this loop. */
1488 for (m = movables; m; m = m->next)
1489 if (m->partial && ! m->global
1490 && mode == GET_MODE (SET_SRC (PATTERN (NEXT_INSN (m->insn)))))
1492 register struct movable *m1;
1493 int first = uid_luid[REGNO_FIRST_UID (m->regno)];
1494 int last = uid_luid[REGNO_LAST_UID (m->regno)];
1498 /* First one: don't check for overlap, just record it. */
1503 /* Make sure they extend to the same mode.
1504 (Almost always true.) */
1505 if (GET_MODE (m->set_dest) != GET_MODE (m0->set_dest))
1508 /* We already have one: check for overlap with those
1509 already combined together. */
1510 for (m1 = movables; m1 != m; m1 = m1->next)
1511 if (m1 == m0 || (m1->partial && m1->match == m0))
1512 if (! (uid_luid[REGNO_FIRST_UID (m1->regno)] > last
1513 || uid_luid[REGNO_LAST_UID (m1->regno)] < first))
1516 /* No overlap: we can combine this with the others. */
1517 m0->lifetime += m->lifetime;
1518 m0->savings += m->savings;
1527 free (matched_regs);
1530 /* Return 1 if regs X and Y will become the same if moved. */
1533 regs_match_p (x, y, movables)
1535 struct movable *movables;
1537 unsigned int xn = REGNO (x);
1538 unsigned int yn = REGNO (y);
1539 struct movable *mx, *my;
1541 for (mx = movables; mx; mx = mx->next)
1542 if (mx->regno == xn)
1545 for (my = movables; my; my = my->next)
1546 if (my->regno == yn)
1550 && ((mx->match == my->match && mx->match != 0)
1552 || mx == my->match));
1555 /* Return 1 if X and Y are identical-looking rtx's.
1556 This is the Lisp function EQUAL for rtx arguments.
1558 If two registers are matching movables or a movable register and an
1559 equivalent constant, consider them equal. */
1562 rtx_equal_for_loop_p (x, y, movables)
1564 struct movable *movables;
1568 register struct movable *m;
1569 register enum rtx_code code;
1570 register const char *fmt;
1574 if (x == 0 || y == 0)
1577 code = GET_CODE (x);
1579 /* If we have a register and a constant, they may sometimes be
1581 if (GET_CODE (x) == REG && VARRAY_INT (set_in_loop, REGNO (x)) == -2
1584 for (m = movables; m; m = m->next)
1585 if (m->move_insn && m->regno == REGNO (x)
1586 && rtx_equal_p (m->set_src, y))
1589 else if (GET_CODE (y) == REG && VARRAY_INT (set_in_loop, REGNO (y)) == -2
1592 for (m = movables; m; m = m->next)
1593 if (m->move_insn && m->regno == REGNO (y)
1594 && rtx_equal_p (m->set_src, x))
1598 /* Otherwise, rtx's of different codes cannot be equal. */
1599 if (code != GET_CODE (y))
1602 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
1603 (REG:SI x) and (REG:HI x) are NOT equivalent. */
1605 if (GET_MODE (x) != GET_MODE (y))
1608 /* These three types of rtx's can be compared nonrecursively. */
1610 return (REGNO (x) == REGNO (y) || regs_match_p (x, y, movables));
1612 if (code == LABEL_REF)
1613 return XEXP (x, 0) == XEXP (y, 0);
1614 if (code == SYMBOL_REF)
1615 return XSTR (x, 0) == XSTR (y, 0);
1617 /* Compare the elements. If any pair of corresponding elements
1618 fail to match, return 0 for the whole things. */
1620 fmt = GET_RTX_FORMAT (code);
1621 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1626 if (XWINT (x, i) != XWINT (y, i))
1631 if (XINT (x, i) != XINT (y, i))
1636 /* Two vectors must have the same length. */
1637 if (XVECLEN (x, i) != XVECLEN (y, i))
1640 /* And the corresponding elements must match. */
1641 for (j = 0; j < XVECLEN (x, i); j++)
1642 if (rtx_equal_for_loop_p (XVECEXP (x, i, j), XVECEXP (y, i, j), movables) == 0)
1647 if (rtx_equal_for_loop_p (XEXP (x, i), XEXP (y, i), movables) == 0)
1652 if (strcmp (XSTR (x, i), XSTR (y, i)))
1657 /* These are just backpointers, so they don't matter. */
1663 /* It is believed that rtx's at this level will never
1664 contain anything but integers and other rtx's,
1665 except for within LABEL_REFs and SYMBOL_REFs. */
1673 /* If X contains any LABEL_REF's, add REG_LABEL notes for them to all
1674 insns in INSNS which use the reference. */
1677 add_label_notes (x, insns)
1681 enum rtx_code code = GET_CODE (x);
1686 if (code == LABEL_REF && !LABEL_REF_NONLOCAL_P (x))
1688 /* This code used to ignore labels that referred to dispatch tables to
1689 avoid flow generating (slighly) worse code.
1691 We no longer ignore such label references (see LABEL_REF handling in
1692 mark_jump_label for additional information). */
1693 for (insn = insns; insn; insn = NEXT_INSN (insn))
1694 if (reg_mentioned_p (XEXP (x, 0), insn))
1695 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_LABEL, XEXP (x, 0),
1699 fmt = GET_RTX_FORMAT (code);
1700 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1703 add_label_notes (XEXP (x, i), insns);
1704 else if (fmt[i] == 'E')
1705 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1706 add_label_notes (XVECEXP (x, i, j), insns);
1710 /* Scan MOVABLES, and move the insns that deserve to be moved.
1711 If two matching movables are combined, replace one reg with the
1712 other throughout. */
1715 move_movables (loop, movables, threshold, insn_count, nregs)
1717 struct movable *movables;
1723 register struct movable *m;
1725 rtx loop_start = loop->start;
1726 rtx loop_end = loop->end;
1727 /* Map of pseudo-register replacements to handle combining
1728 when we move several insns that load the same value
1729 into different pseudo-registers. */
1730 rtx *reg_map = (rtx *) xcalloc (nregs, sizeof (rtx));
1731 char *already_moved = (char *) xcalloc (nregs, sizeof (char));
1735 for (m = movables; m; m = m->next)
1737 /* Describe this movable insn. */
1739 if (loop_dump_stream)
1741 fprintf (loop_dump_stream, "Insn %d: regno %d (life %d), ",
1742 INSN_UID (m->insn), m->regno, m->lifetime);
1744 fprintf (loop_dump_stream, "consec %d, ", m->consec);
1746 fprintf (loop_dump_stream, "cond ");
1748 fprintf (loop_dump_stream, "force ");
1750 fprintf (loop_dump_stream, "global ");
1752 fprintf (loop_dump_stream, "done ");
1754 fprintf (loop_dump_stream, "move-insn ");
1756 fprintf (loop_dump_stream, "matches %d ",
1757 INSN_UID (m->match->insn));
1759 fprintf (loop_dump_stream, "forces %d ",
1760 INSN_UID (m->forces->insn));
1763 /* Count movables. Value used in heuristics in strength_reduce. */
1766 /* Ignore the insn if it's already done (it matched something else).
1767 Otherwise, see if it is now safe to move. */
1771 || (1 == loop_invariant_p (loop, m->set_src)
1772 && (m->dependencies == 0
1773 || 1 == loop_invariant_p (loop, m->dependencies))
1775 || 1 == consec_sets_invariant_p (loop, m->set_dest,
1778 && (! m->forces || m->forces->done))
1782 int savings = m->savings;
1784 /* We have an insn that is safe to move.
1785 Compute its desirability. */
1790 if (loop_dump_stream)
1791 fprintf (loop_dump_stream, "savings %d ", savings);
1793 if (moved_once[regno] && loop_dump_stream)
1794 fprintf (loop_dump_stream, "halved since already moved ");
1796 /* An insn MUST be moved if we already moved something else
1797 which is safe only if this one is moved too: that is,
1798 if already_moved[REGNO] is nonzero. */
1800 /* An insn is desirable to move if the new lifetime of the
1801 register is no more than THRESHOLD times the old lifetime.
1802 If it's not desirable, it means the loop is so big
1803 that moving won't speed things up much,
1804 and it is liable to make register usage worse. */
1806 /* It is also desirable to move if it can be moved at no
1807 extra cost because something else was already moved. */
1809 if (already_moved[regno]
1810 || flag_move_all_movables
1811 || (threshold * savings * m->lifetime) >=
1812 (moved_once[regno] ? insn_count * 2 : insn_count)
1813 || (m->forces && m->forces->done
1814 && VARRAY_INT (n_times_set, m->forces->regno) == 1))
1817 register struct movable *m1;
1818 rtx first = NULL_RTX;
1820 /* Now move the insns that set the reg. */
1822 if (m->partial && m->match)
1826 /* Find the end of this chain of matching regs.
1827 Thus, we load each reg in the chain from that one reg.
1828 And that reg is loaded with 0 directly,
1829 since it has ->match == 0. */
1830 for (m1 = m; m1->match; m1 = m1->match);
1831 newpat = gen_move_insn (SET_DEST (PATTERN (m->insn)),
1832 SET_DEST (PATTERN (m1->insn)));
1833 i1 = emit_insn_before (newpat, loop_start);
1835 /* Mark the moved, invariant reg as being allowed to
1836 share a hard reg with the other matching invariant. */
1837 REG_NOTES (i1) = REG_NOTES (m->insn);
1838 r1 = SET_DEST (PATTERN (m->insn));
1839 r2 = SET_DEST (PATTERN (m1->insn));
1841 = gen_rtx_EXPR_LIST (VOIDmode, r1,
1842 gen_rtx_EXPR_LIST (VOIDmode, r2,
1844 delete_insn (m->insn);
1849 if (loop_dump_stream)
1850 fprintf (loop_dump_stream, " moved to %d", INSN_UID (i1));
1852 /* If we are to re-generate the item being moved with a
1853 new move insn, first delete what we have and then emit
1854 the move insn before the loop. */
1855 else if (m->move_insn)
1859 for (count = m->consec; count >= 0; count--)
1861 /* If this is the first insn of a library call sequence,
1863 if (GET_CODE (p) != NOTE
1864 && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
1867 /* If this is the last insn of a libcall sequence, then
1868 delete every insn in the sequence except the last.
1869 The last insn is handled in the normal manner. */
1870 if (GET_CODE (p) != NOTE
1871 && (temp = find_reg_note (p, REG_RETVAL, NULL_RTX)))
1873 temp = XEXP (temp, 0);
1875 temp = delete_insn (temp);
1879 p = delete_insn (p);
1881 /* simplify_giv_expr expects that it can walk the insns
1882 at m->insn forwards and see this old sequence we are
1883 tossing here. delete_insn does preserve the next
1884 pointers, but when we skip over a NOTE we must fix
1885 it up. Otherwise that code walks into the non-deleted
1887 while (p && GET_CODE (p) == NOTE)
1888 p = NEXT_INSN (temp) = NEXT_INSN (p);
1892 emit_move_insn (m->set_dest, m->set_src);
1893 temp = get_insns ();
1896 add_label_notes (m->set_src, temp);
1898 i1 = emit_insns_before (temp, loop_start);
1899 if (! find_reg_note (i1, REG_EQUAL, NULL_RTX))
1901 = gen_rtx_EXPR_LIST (m->is_equiv ? REG_EQUIV : REG_EQUAL,
1902 m->set_src, REG_NOTES (i1));
1904 if (loop_dump_stream)
1905 fprintf (loop_dump_stream, " moved to %d", INSN_UID (i1));
1907 /* The more regs we move, the less we like moving them. */
1912 for (count = m->consec; count >= 0; count--)
1916 /* If first insn of libcall sequence, skip to end. */
1917 /* Do this at start of loop, since p is guaranteed to
1919 if (GET_CODE (p) != NOTE
1920 && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
1923 /* If last insn of libcall sequence, move all
1924 insns except the last before the loop. The last
1925 insn is handled in the normal manner. */
1926 if (GET_CODE (p) != NOTE
1927 && (temp = find_reg_note (p, REG_RETVAL, NULL_RTX)))
1931 rtx fn_address_insn = 0;
1934 for (temp = XEXP (temp, 0); temp != p;
1935 temp = NEXT_INSN (temp))
1941 if (GET_CODE (temp) == NOTE)
1944 body = PATTERN (temp);
1946 /* Find the next insn after TEMP,
1947 not counting USE or NOTE insns. */
1948 for (next = NEXT_INSN (temp); next != p;
1949 next = NEXT_INSN (next))
1950 if (! (GET_CODE (next) == INSN
1951 && GET_CODE (PATTERN (next)) == USE)
1952 && GET_CODE (next) != NOTE)
1955 /* If that is the call, this may be the insn
1956 that loads the function address.
1958 Extract the function address from the insn
1959 that loads it into a register.
1960 If this insn was cse'd, we get incorrect code.
1962 So emit a new move insn that copies the
1963 function address into the register that the
1964 call insn will use. flow.c will delete any
1965 redundant stores that we have created. */
1966 if (GET_CODE (next) == CALL_INSN
1967 && GET_CODE (body) == SET
1968 && GET_CODE (SET_DEST (body)) == REG
1969 && (n = find_reg_note (temp, REG_EQUAL,
1972 fn_reg = SET_SRC (body);
1973 if (GET_CODE (fn_reg) != REG)
1974 fn_reg = SET_DEST (body);
1975 fn_address = XEXP (n, 0);
1976 fn_address_insn = temp;
1978 /* We have the call insn.
1979 If it uses the register we suspect it might,
1980 load it with the correct address directly. */
1981 if (GET_CODE (temp) == CALL_INSN
1983 && reg_referenced_p (fn_reg, body))
1984 emit_insn_after (gen_move_insn (fn_reg,
1988 if (GET_CODE (temp) == CALL_INSN)
1990 i1 = emit_call_insn_before (body, loop_start);
1991 /* Because the USAGE information potentially
1992 contains objects other than hard registers
1993 we need to copy it. */
1994 if (CALL_INSN_FUNCTION_USAGE (temp))
1995 CALL_INSN_FUNCTION_USAGE (i1)
1996 = copy_rtx (CALL_INSN_FUNCTION_USAGE (temp));
1999 i1 = emit_insn_before (body, loop_start);
2002 if (temp == fn_address_insn)
2003 fn_address_insn = i1;
2004 REG_NOTES (i1) = REG_NOTES (temp);
2010 if (m->savemode != VOIDmode)
2012 /* P sets REG to zero; but we should clear only
2013 the bits that are not covered by the mode
2015 rtx reg = m->set_dest;
2021 (GET_MODE (reg), and_optab, reg,
2022 GEN_INT ((((HOST_WIDE_INT) 1
2023 << GET_MODE_BITSIZE (m->savemode)))
2025 reg, 1, OPTAB_LIB_WIDEN);
2029 emit_move_insn (reg, tem);
2030 sequence = gen_sequence ();
2032 i1 = emit_insn_before (sequence, loop_start);
2034 else if (GET_CODE (p) == CALL_INSN)
2036 i1 = emit_call_insn_before (PATTERN (p), loop_start);
2037 /* Because the USAGE information potentially
2038 contains objects other than hard registers
2039 we need to copy it. */
2040 if (CALL_INSN_FUNCTION_USAGE (p))
2041 CALL_INSN_FUNCTION_USAGE (i1)
2042 = copy_rtx (CALL_INSN_FUNCTION_USAGE (p));
2044 else if (count == m->consec && m->move_insn_first)
2046 /* The SET_SRC might not be invariant, so we must
2047 use the REG_EQUAL note. */
2049 emit_move_insn (m->set_dest, m->set_src);
2050 temp = get_insns ();
2053 add_label_notes (m->set_src, temp);
2055 i1 = emit_insns_before (temp, loop_start);
2056 if (! find_reg_note (i1, REG_EQUAL, NULL_RTX))
2058 = gen_rtx_EXPR_LIST ((m->is_equiv ? REG_EQUIV
2060 m->set_src, REG_NOTES (i1));
2063 i1 = emit_insn_before (PATTERN (p), loop_start);
2065 if (REG_NOTES (i1) == 0)
2067 REG_NOTES (i1) = REG_NOTES (p);
2069 /* If there is a REG_EQUAL note present whose value
2070 is not loop invariant, then delete it, since it
2071 may cause problems with later optimization passes.
2072 It is possible for cse to create such notes
2073 like this as a result of record_jump_cond. */
2075 if ((temp = find_reg_note (i1, REG_EQUAL, NULL_RTX))
2076 && ! loop_invariant_p (loop, XEXP (temp, 0)))
2077 remove_note (i1, temp);
2083 if (loop_dump_stream)
2084 fprintf (loop_dump_stream, " moved to %d",
2087 /* If library call, now fix the REG_NOTES that contain
2088 insn pointers, namely REG_LIBCALL on FIRST
2089 and REG_RETVAL on I1. */
2090 if ((temp = find_reg_note (i1, REG_RETVAL, NULL_RTX)))
2092 XEXP (temp, 0) = first;
2093 temp = find_reg_note (first, REG_LIBCALL, NULL_RTX);
2094 XEXP (temp, 0) = i1;
2101 /* simplify_giv_expr expects that it can walk the insns
2102 at m->insn forwards and see this old sequence we are
2103 tossing here. delete_insn does preserve the next
2104 pointers, but when we skip over a NOTE we must fix
2105 it up. Otherwise that code walks into the non-deleted
2107 while (p && GET_CODE (p) == NOTE)
2108 p = NEXT_INSN (temp) = NEXT_INSN (p);
2111 /* The more regs we move, the less we like moving them. */
2115 /* Any other movable that loads the same register
2117 already_moved[regno] = 1;
2119 /* This reg has been moved out of one loop. */
2120 moved_once[regno] = 1;
2122 /* The reg set here is now invariant. */
2124 VARRAY_INT (set_in_loop, regno) = 0;
2128 /* Change the length-of-life info for the register
2129 to say it lives at least the full length of this loop.
2130 This will help guide optimizations in outer loops. */
2132 if (uid_luid[REGNO_FIRST_UID (regno)] > INSN_LUID (loop_start))
2133 /* This is the old insn before all the moved insns.
2134 We can't use the moved insn because it is out of range
2135 in uid_luid. Only the old insns have luids. */
2136 REGNO_FIRST_UID (regno) = INSN_UID (loop_start);
2137 if (uid_luid[REGNO_LAST_UID (regno)] < INSN_LUID (loop_end))
2138 REGNO_LAST_UID (regno) = INSN_UID (loop_end);
2140 /* Combine with this moved insn any other matching movables. */
2143 for (m1 = movables; m1; m1 = m1->next)
2148 /* Schedule the reg loaded by M1
2149 for replacement so that shares the reg of M.
2150 If the modes differ (only possible in restricted
2151 circumstances, make a SUBREG.
2153 Note this assumes that the target dependent files
2154 treat REG and SUBREG equally, including within
2155 GO_IF_LEGITIMATE_ADDRESS and in all the
2156 predicates since we never verify that replacing the
2157 original register with a SUBREG results in a
2158 recognizable insn. */
2159 if (GET_MODE (m->set_dest) == GET_MODE (m1->set_dest))
2160 reg_map[m1->regno] = m->set_dest;
2163 = gen_lowpart_common (GET_MODE (m1->set_dest),
2166 /* Get rid of the matching insn
2167 and prevent further processing of it. */
2170 /* if library call, delete all insn except last, which
2172 if ((temp = find_reg_note (m1->insn, REG_RETVAL,
2175 for (temp = XEXP (temp, 0); temp != m1->insn;
2176 temp = NEXT_INSN (temp))
2179 delete_insn (m1->insn);
2181 /* Any other movable that loads the same register
2183 already_moved[m1->regno] = 1;
2185 /* The reg merged here is now invariant,
2186 if the reg it matches is invariant. */
2188 VARRAY_INT (set_in_loop, m1->regno) = 0;
2191 else if (loop_dump_stream)
2192 fprintf (loop_dump_stream, "not desirable");
2194 else if (loop_dump_stream && !m->match)
2195 fprintf (loop_dump_stream, "not safe");
2197 if (loop_dump_stream)
2198 fprintf (loop_dump_stream, "\n");
2202 new_start = loop_start;
2204 /* Go through all the instructions in the loop, making
2205 all the register substitutions scheduled in REG_MAP. */
2206 for (p = new_start; p != loop_end; p = NEXT_INSN (p))
2207 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
2208 || GET_CODE (p) == CALL_INSN)
2210 replace_regs (PATTERN (p), reg_map, nregs, 0);
2211 replace_regs (REG_NOTES (p), reg_map, nregs, 0);
2217 free (already_moved);
2221 /* Scan X and replace the address of any MEM in it with ADDR.
2222 REG is the address that MEM should have before the replacement. */
2225 replace_call_address (x, reg, addr)
2228 register enum rtx_code code;
2230 register const char *fmt;
2234 code = GET_CODE (x);
2248 /* Short cut for very common case. */
2249 replace_call_address (XEXP (x, 1), reg, addr);
2253 /* Short cut for very common case. */
2254 replace_call_address (XEXP (x, 0), reg, addr);
2258 /* If this MEM uses a reg other than the one we expected,
2259 something is wrong. */
2260 if (XEXP (x, 0) != reg)
2269 fmt = GET_RTX_FORMAT (code);
2270 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2273 replace_call_address (XEXP (x, i), reg, addr);
2274 else if (fmt[i] == 'E')
2277 for (j = 0; j < XVECLEN (x, i); j++)
2278 replace_call_address (XVECEXP (x, i, j), reg, addr);
2284 /* Return the number of memory refs to addresses that vary
2288 count_nonfixed_reads (loop, x)
2289 const struct loop *loop;
2292 register enum rtx_code code;
2294 register const char *fmt;
2300 code = GET_CODE (x);
2314 return ((loop_invariant_p (loop, XEXP (x, 0)) != 1)
2315 + count_nonfixed_reads (loop, XEXP (x, 0)));
2322 fmt = GET_RTX_FORMAT (code);
2323 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2326 value += count_nonfixed_reads (loop, XEXP (x, i));
2330 for (j = 0; j < XVECLEN (x, i); j++)
2331 value += count_nonfixed_reads (loop, XVECEXP (x, i, j));
2339 /* P is an instruction that sets a register to the result of a ZERO_EXTEND.
2340 Replace it with an instruction to load just the low bytes
2341 if the machine supports such an instruction,
2342 and insert above LOOP_START an instruction to clear the register. */
2345 constant_high_bytes (p, loop_start)
2349 register int insn_code_number;
2351 /* Try to change (SET (REG ...) (ZERO_EXTEND (..:B ...)))
2352 to (SET (STRICT_LOW_PART (SUBREG:B (REG...))) ...). */
2357 gen_rtx_STRICT_LOW_PART
2359 gen_rtx_SUBREG (GET_MODE (XEXP (SET_SRC (PATTERN (p)), 0)),
2360 SET_DEST (PATTERN (p)), 0)),
2361 XEXP (SET_SRC (PATTERN (p)), 0));
2363 insn_code_number = recog (new, p);
2365 if (insn_code_number)
2369 /* Clear destination register before the loop. */
2370 emit_insn_before (gen_rtx_SET (VOIDmode,
2371 SET_DEST (PATTERN (p)), const0_rtx),
2374 /* Inside the loop, just load the low part. */
2380 /* Scan a loop setting the elements `cont', `vtop', `loops_enclosed',
2381 `has_call', `has_volatile', and `has_tablejump' within LOOP.
2382 Set the global variables `unknown_address_altered',
2383 `unknown_constant_address_altered', and `num_mem_sets'. Also, fill
2384 in the array `loop_mems' and the list `loop_store_mems'. */
2390 register int level = 1;
2392 struct loop_info *loop_info = LOOP_INFO (loop);
2393 rtx start = loop->start;
2394 rtx end = loop->end;
2395 /* The label after END. Jumping here is just like falling off the
2396 end of the loop. We use next_nonnote_insn instead of next_label
2397 as a hedge against the (pathological) case where some actual insn
2398 might end up between the two. */
2399 rtx exit_target = next_nonnote_insn (end);
2401 loop_info->has_indirect_jump = indirect_jump_in_function;
2402 loop_info->has_call = 0;
2403 loop_info->has_volatile = 0;
2404 loop_info->has_tablejump = 0;
2405 loop_info->has_multiple_exit_targets = 0;
2410 unknown_address_altered = 0;
2411 unknown_constant_address_altered = 0;
2412 loop_store_mems = NULL_RTX;
2413 first_loop_store_insn = NULL_RTX;
2417 for (insn = NEXT_INSN (start); insn != NEXT_INSN (end);
2418 insn = NEXT_INSN (insn))
2420 if (GET_CODE (insn) == NOTE)
2422 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
2425 /* Count number of loops contained in this one. */
2428 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END)
2437 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_CONT)
2442 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_VTOP)
2444 /* If there is a NOTE_INSN_LOOP_VTOP, then this is a for
2445 or while style loop, with a loop exit test at the
2446 start. Thus, we can assume that the loop condition
2447 was true when the loop was entered. */
2452 else if (GET_CODE (insn) == CALL_INSN)
2454 if (! CONST_CALL_P (insn))
2455 unknown_address_altered = 1;
2456 loop_info->has_call = 1;
2458 else if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN)
2460 rtx label1 = NULL_RTX;
2461 rtx label2 = NULL_RTX;
2463 if (volatile_refs_p (PATTERN (insn)))
2464 loop_info->has_volatile = 1;
2466 if (GET_CODE (insn) == JUMP_INSN
2467 && (GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC
2468 || GET_CODE (PATTERN (insn)) == ADDR_VEC))
2469 loop_info->has_tablejump = 1;
2471 note_stores (PATTERN (insn), note_addr_stored, NULL);
2472 if (! first_loop_store_insn && loop_store_mems)
2473 first_loop_store_insn = insn;
2475 if (! loop_info->has_multiple_exit_targets
2476 && GET_CODE (insn) == JUMP_INSN
2477 && GET_CODE (PATTERN (insn)) == SET
2478 && SET_DEST (PATTERN (insn)) == pc_rtx)
2480 if (GET_CODE (SET_SRC (PATTERN (insn))) == IF_THEN_ELSE)
2482 label1 = XEXP (SET_SRC (PATTERN (insn)), 1);
2483 label2 = XEXP (SET_SRC (PATTERN (insn)), 2);
2487 label1 = SET_SRC (PATTERN (insn));
2491 if (label1 && label1 != pc_rtx)
2493 if (GET_CODE (label1) != LABEL_REF)
2495 /* Something tricky. */
2496 loop_info->has_multiple_exit_targets = 1;
2499 else if (XEXP (label1, 0) != exit_target
2500 && LABEL_OUTSIDE_LOOP_P (label1))
2502 /* A jump outside the current loop. */
2503 loop_info->has_multiple_exit_targets = 1;
2513 else if (GET_CODE (insn) == RETURN)
2514 loop_info->has_multiple_exit_targets = 1;
2517 /* Now, rescan the loop, setting up the LOOP_MEMS array. */
2518 if (/* We can't tell what MEMs are aliased by what. */
2519 ! unknown_address_altered
2520 /* An exception thrown by a called function might land us
2522 && ! loop_info->has_call
2523 /* We don't want loads for MEMs moved to a location before the
2524 one at which their stack memory becomes allocated. (Note
2525 that this is not a problem for malloc, etc., since those
2526 require actual function calls. */
2527 && ! current_function_calls_alloca
2528 /* There are ways to leave the loop other than falling off the
2530 && ! loop_info->has_multiple_exit_targets)
2531 for (insn = NEXT_INSN (start); insn != NEXT_INSN (end);
2532 insn = NEXT_INSN (insn))
2533 for_each_rtx (&insn, insert_loop_mem, 0);
2536 /* LOOP->CONT_DOMINATOR is now the last label between the loop start
2537 and the continue note that is a the destination of a (cond)jump after
2538 the continue note. If there is any (cond)jump between the loop start
2539 and what we have so far as LOOP->CONT_DOMINATOR that has a
2540 target between LOOP->DOMINATOR and the continue note, move
2541 LOOP->CONT_DOMINATOR forward to that label; if a jump's
2542 destination cannot be determined, clear LOOP->CONT_DOMINATOR. */
2545 verify_dominator (loop)
2550 if (! loop->cont_dominator)
2551 /* This can happen for an empty loop, e.g. in
2552 gcc.c-torture/compile/920410-2.c */
2554 if (loop->cont_dominator == const0_rtx)
2556 loop->cont_dominator = 0;
2559 for (insn = loop->start; insn != loop->cont_dominator;
2560 insn = NEXT_INSN (insn))
2562 if (GET_CODE (insn) == JUMP_INSN
2563 && GET_CODE (PATTERN (insn)) != RETURN)
2565 rtx label = JUMP_LABEL (insn);
2568 /* If it is not a jump we can easily understand or for
2569 which we do not have jump target information in the JUMP_LABEL
2570 field (consider ADDR_VEC and ADDR_DIFF_VEC insns), then clear
2571 LOOP->CONT_DOMINATOR. */
2572 if (! any_condjump_p (insn)
2573 || label == NULL_RTX)
2575 loop->cont_dominator = NULL_RTX;
2579 label_luid = INSN_LUID (label);
2580 if (label_luid < INSN_LUID (loop->cont)
2582 > INSN_LUID (loop->cont)))
2583 loop->cont_dominator = label;
2588 /* Scan the function looking for loops. Record the start and end of each loop.
2589 Also mark as invalid loops any loops that contain a setjmp or are branched
2590 to from outside the loop. */
2593 find_and_verify_loops (f, loops)
2595 struct loops *loops;
2600 struct loop *current_loop;
2601 struct loop *next_loop;
2604 num_loops = loops->num;
2606 compute_luids (f, NULL_RTX, 0);
2608 /* If there are jumps to undefined labels,
2609 treat them as jumps out of any/all loops.
2610 This also avoids writing past end of tables when there are no loops. */
2613 /* Find boundaries of loops, mark which loops are contained within
2614 loops, and invalidate loops that have setjmp. */
2617 current_loop = NULL;
2618 for (insn = f; insn; insn = NEXT_INSN (insn))
2620 if (GET_CODE (insn) == NOTE)
2621 switch (NOTE_LINE_NUMBER (insn))
2623 case NOTE_INSN_LOOP_BEG:
2624 next_loop = loops->array + num_loops;
2625 next_loop->num = num_loops;
2627 next_loop->start = insn;
2628 next_loop->outer = current_loop;
2629 current_loop = next_loop;
2632 case NOTE_INSN_SETJMP:
2633 /* In this case, we must invalidate our current loop and any
2635 for (loop = current_loop; loop; loop = loop->outer)
2638 if (loop_dump_stream)
2639 fprintf (loop_dump_stream,
2640 "\nLoop at %d ignored due to setjmp.\n",
2641 INSN_UID (loop->start));
2645 case NOTE_INSN_LOOP_CONT:
2646 current_loop->cont = insn;
2648 case NOTE_INSN_LOOP_END:
2652 current_loop->end = insn;
2653 verify_dominator (current_loop);
2654 current_loop = current_loop->outer;
2660 /* If for any loop, this is a jump insn between the NOTE_INSN_LOOP_CONT
2661 and NOTE_INSN_LOOP_END notes, update loop->dominator. */
2662 else if (GET_CODE (insn) == JUMP_INSN
2663 && GET_CODE (PATTERN (insn)) != RETURN
2666 rtx label = JUMP_LABEL (insn);
2668 if (! any_condjump_p (insn))
2671 loop = current_loop;
2674 /* First see if we care about this loop. */
2675 if (loop->cont && loop->cont_dominator != const0_rtx)
2677 /* If the jump destination is not known, invalidate
2678 loop->const_dominator. */
2680 loop->cont_dominator = const0_rtx;
2682 /* Check if the destination is between loop start and
2684 if ((INSN_LUID (label)
2685 < INSN_LUID (loop->cont))
2686 && (INSN_LUID (label)
2687 > INSN_LUID (loop->start))
2688 /* And if there is no later destination already
2690 && (! loop->cont_dominator
2691 || (INSN_LUID (label)
2692 > INSN_LUID (loop->cont_dominator))))
2693 loop->cont_dominator = label;
2700 /* Note that this will mark the NOTE_INSN_LOOP_END note as being in the
2701 enclosing loop, but this doesn't matter. */
2702 uid_loop[INSN_UID (insn)] = current_loop;
2705 /* Any loop containing a label used in an initializer must be invalidated,
2706 because it can be jumped into from anywhere. */
2708 for (label = forced_labels; label; label = XEXP (label, 1))
2710 for (loop = uid_loop[INSN_UID (XEXP (label, 0))];
2711 loop; loop = loop->outer)
2715 /* Any loop containing a label used for an exception handler must be
2716 invalidated, because it can be jumped into from anywhere. */
2718 for (label = exception_handler_labels; label; label = XEXP (label, 1))
2720 for (loop = uid_loop[INSN_UID (XEXP (label, 0))];
2721 loop; loop = loop->outer)
2725 /* Now scan all insn's in the function. If any JUMP_INSN branches into a
2726 loop that it is not contained within, that loop is marked invalid.
2727 If any INSN or CALL_INSN uses a label's address, then the loop containing
2728 that label is marked invalid, because it could be jumped into from
2731 Also look for blocks of code ending in an unconditional branch that
2732 exits the loop. If such a block is surrounded by a conditional
2733 branch around the block, move the block elsewhere (see below) and
2734 invert the jump to point to the code block. This may eliminate a
2735 label in our loop and will simplify processing by both us and a
2736 possible second cse pass. */
2738 for (insn = f; insn; insn = NEXT_INSN (insn))
2739 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
2741 struct loop *this_loop = uid_loop[INSN_UID (insn)];
2743 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
2745 rtx note = find_reg_note (insn, REG_LABEL, NULL_RTX);
2748 for (loop = uid_loop[INSN_UID (XEXP (note, 0))];
2749 loop; loop = loop->outer)
2754 if (GET_CODE (insn) != JUMP_INSN)
2757 mark_loop_jump (PATTERN (insn), this_loop);
2759 /* See if this is an unconditional branch outside the loop. */
2761 && (GET_CODE (PATTERN (insn)) == RETURN
2762 || (any_uncondjump_p (insn)
2763 && onlyjump_p (insn)
2764 && (uid_loop[INSN_UID (JUMP_LABEL (insn))]
2766 && get_max_uid () < max_uid_for_loop)
2769 rtx our_next = next_real_insn (insn);
2770 rtx last_insn_to_move = NEXT_INSN (insn);
2771 struct loop *dest_loop;
2772 struct loop *outer_loop = NULL;
2774 /* Go backwards until we reach the start of the loop, a label,
2776 for (p = PREV_INSN (insn);
2777 GET_CODE (p) != CODE_LABEL
2778 && ! (GET_CODE (p) == NOTE
2779 && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
2780 && GET_CODE (p) != JUMP_INSN;
2784 /* Check for the case where we have a jump to an inner nested
2785 loop, and do not perform the optimization in that case. */
2787 if (JUMP_LABEL (insn))
2789 dest_loop = uid_loop[INSN_UID (JUMP_LABEL (insn))];
2792 for (outer_loop = dest_loop; outer_loop;
2793 outer_loop = outer_loop->outer)
2794 if (outer_loop == this_loop)
2799 /* Make sure that the target of P is within the current loop. */
2801 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p)
2802 && uid_loop[INSN_UID (JUMP_LABEL (p))] != this_loop)
2803 outer_loop = this_loop;
2805 /* If we stopped on a JUMP_INSN to the next insn after INSN,
2806 we have a block of code to try to move.
2808 We look backward and then forward from the target of INSN
2809 to find a BARRIER at the same loop depth as the target.
2810 If we find such a BARRIER, we make a new label for the start
2811 of the block, invert the jump in P and point it to that label,
2812 and move the block of code to the spot we found. */
2815 && GET_CODE (p) == JUMP_INSN
2816 && JUMP_LABEL (p) != 0
2817 /* Just ignore jumps to labels that were never emitted.
2818 These always indicate compilation errors. */
2819 && INSN_UID (JUMP_LABEL (p)) != 0
2820 && any_condjump_p (p) && onlyjump_p (p)
2821 && next_real_insn (JUMP_LABEL (p)) == our_next
2822 /* If it's not safe to move the sequence, then we
2824 && insns_safe_to_move_p (p, NEXT_INSN (insn),
2825 &last_insn_to_move))
2828 = JUMP_LABEL (insn) ? JUMP_LABEL (insn) : get_last_insn ();
2829 struct loop *target_loop = uid_loop[INSN_UID (target)];
2832 for (loc = target; loc; loc = PREV_INSN (loc))
2833 if (GET_CODE (loc) == BARRIER
2834 /* Don't move things inside a tablejump. */
2835 && ((loc2 = next_nonnote_insn (loc)) == 0
2836 || GET_CODE (loc2) != CODE_LABEL
2837 || (loc2 = next_nonnote_insn (loc2)) == 0
2838 || GET_CODE (loc2) != JUMP_INSN
2839 || (GET_CODE (PATTERN (loc2)) != ADDR_VEC
2840 && GET_CODE (PATTERN (loc2)) != ADDR_DIFF_VEC))
2841 && uid_loop[INSN_UID (loc)] == target_loop)
2845 for (loc = target; loc; loc = NEXT_INSN (loc))
2846 if (GET_CODE (loc) == BARRIER
2847 /* Don't move things inside a tablejump. */
2848 && ((loc2 = next_nonnote_insn (loc)) == 0
2849 || GET_CODE (loc2) != CODE_LABEL
2850 || (loc2 = next_nonnote_insn (loc2)) == 0
2851 || GET_CODE (loc2) != JUMP_INSN
2852 || (GET_CODE (PATTERN (loc2)) != ADDR_VEC
2853 && GET_CODE (PATTERN (loc2)) != ADDR_DIFF_VEC))
2854 && uid_loop[INSN_UID (loc)] == target_loop)
2859 rtx cond_label = JUMP_LABEL (p);
2860 rtx new_label = get_label_after (p);
2862 /* Ensure our label doesn't go away. */
2863 LABEL_NUSES (cond_label)++;
2865 /* Verify that uid_loop is large enough and that
2867 if (invert_jump (p, new_label, 1))
2871 /* If no suitable BARRIER was found, create a suitable
2872 one before TARGET. Since TARGET is a fall through
2873 path, we'll need to insert an jump around our block
2874 and a add a BARRIER before TARGET.
2876 This creates an extra unconditional jump outside
2877 the loop. However, the benefits of removing rarely
2878 executed instructions from inside the loop usually
2879 outweighs the cost of the extra unconditional jump
2880 outside the loop. */
2885 temp = gen_jump (JUMP_LABEL (insn));
2886 temp = emit_jump_insn_before (temp, target);
2887 JUMP_LABEL (temp) = JUMP_LABEL (insn);
2888 LABEL_NUSES (JUMP_LABEL (insn))++;
2889 loc = emit_barrier_before (target);
2892 /* Include the BARRIER after INSN and copy the
2894 new_label = squeeze_notes (new_label,
2896 reorder_insns (new_label, last_insn_to_move, loc);
2898 /* All those insns are now in TARGET_LOOP. */
2900 q != NEXT_INSN (last_insn_to_move);
2902 uid_loop[INSN_UID (q)] = target_loop;
2904 /* The label jumped to by INSN is no longer a loop
2905 exit. Unless INSN does not have a label (e.g.,
2906 it is a RETURN insn), search loop->exit_labels
2907 to find its label_ref, and remove it. Also turn
2908 off LABEL_OUTSIDE_LOOP_P bit. */
2909 if (JUMP_LABEL (insn))
2912 r = this_loop->exit_labels;
2913 r; q = r, r = LABEL_NEXTREF (r))
2914 if (XEXP (r, 0) == JUMP_LABEL (insn))
2916 LABEL_OUTSIDE_LOOP_P (r) = 0;
2918 LABEL_NEXTREF (q) = LABEL_NEXTREF (r);
2920 this_loop->exit_labels = LABEL_NEXTREF (r);
2924 for (loop = this_loop; loop && loop != target_loop;
2928 /* If we didn't find it, then something is
2934 /* P is now a jump outside the loop, so it must be put
2935 in loop->exit_labels, and marked as such.
2936 The easiest way to do this is to just call
2937 mark_loop_jump again for P. */
2938 mark_loop_jump (PATTERN (p), this_loop);
2940 /* If INSN now jumps to the insn after it,
2942 if (JUMP_LABEL (insn) != 0
2943 && (next_real_insn (JUMP_LABEL (insn))
2944 == next_real_insn (insn)))
2948 /* Continue the loop after where the conditional
2949 branch used to jump, since the only branch insn
2950 in the block (if it still remains) is an inter-loop
2951 branch and hence needs no processing. */
2952 insn = NEXT_INSN (cond_label);
2954 if (--LABEL_NUSES (cond_label) == 0)
2955 delete_insn (cond_label);
2957 /* This loop will be continued with NEXT_INSN (insn). */
2958 insn = PREV_INSN (insn);
2965 /* If any label in X jumps to a loop different from LOOP_NUM and any of the
2966 loops it is contained in, mark the target loop invalid.
2968 For speed, we assume that X is part of a pattern of a JUMP_INSN. */
2971 mark_loop_jump (x, loop)
2975 struct loop *dest_loop;
2976 struct loop *outer_loop;
2979 switch (GET_CODE (x))
2992 /* There could be a label reference in here. */
2993 mark_loop_jump (XEXP (x, 0), loop);
2999 mark_loop_jump (XEXP (x, 0), loop);
3000 mark_loop_jump (XEXP (x, 1), loop);
3004 /* This may refer to a LABEL_REF or SYMBOL_REF. */
3005 mark_loop_jump (XEXP (x, 1), loop);
3010 mark_loop_jump (XEXP (x, 0), loop);
3014 dest_loop = uid_loop[INSN_UID (XEXP (x, 0))];
3016 /* Link together all labels that branch outside the loop. This
3017 is used by final_[bg]iv_value and the loop unrolling code. Also
3018 mark this LABEL_REF so we know that this branch should predict
3021 /* A check to make sure the label is not in an inner nested loop,
3022 since this does not count as a loop exit. */
3025 for (outer_loop = dest_loop; outer_loop;
3026 outer_loop = outer_loop->outer)
3027 if (outer_loop == loop)
3033 if (loop && ! outer_loop)
3035 LABEL_OUTSIDE_LOOP_P (x) = 1;
3036 LABEL_NEXTREF (x) = loop->exit_labels;
3037 loop->exit_labels = x;
3039 for (outer_loop = loop;
3040 outer_loop && outer_loop != dest_loop;
3041 outer_loop = outer_loop->outer)
3042 outer_loop->exit_count++;
3045 /* If this is inside a loop, but not in the current loop or one enclosed
3046 by it, it invalidates at least one loop. */
3051 /* We must invalidate every nested loop containing the target of this
3052 label, except those that also contain the jump insn. */
3054 for (; dest_loop; dest_loop = dest_loop->outer)
3056 /* Stop when we reach a loop that also contains the jump insn. */
3057 for (outer_loop = loop; outer_loop; outer_loop = outer_loop->outer)
3058 if (dest_loop == outer_loop)
3061 /* If we get here, we know we need to invalidate a loop. */
3062 if (loop_dump_stream && ! dest_loop->invalid)
3063 fprintf (loop_dump_stream,
3064 "\nLoop at %d ignored due to multiple entry points.\n",
3065 INSN_UID (dest_loop->start));
3067 dest_loop->invalid = 1;
3072 /* If this is not setting pc, ignore. */
3073 if (SET_DEST (x) == pc_rtx)
3074 mark_loop_jump (SET_SRC (x), loop);
3078 mark_loop_jump (XEXP (x, 1), loop);
3079 mark_loop_jump (XEXP (x, 2), loop);
3084 for (i = 0; i < XVECLEN (x, 0); i++)
3085 mark_loop_jump (XVECEXP (x, 0, i), loop);
3089 for (i = 0; i < XVECLEN (x, 1); i++)
3090 mark_loop_jump (XVECEXP (x, 1, i), loop);
3094 /* Strictly speaking this is not a jump into the loop, only a possible
3095 jump out of the loop. However, we have no way to link the destination
3096 of this jump onto the list of exit labels. To be safe we mark this
3097 loop and any containing loops as invalid. */
3100 for (outer_loop = loop; outer_loop; outer_loop = outer_loop->outer)
3102 if (loop_dump_stream && ! outer_loop->invalid)
3103 fprintf (loop_dump_stream,
3104 "\nLoop at %d ignored due to unknown exit jump.\n",
3105 INSN_UID (outer_loop->start));
3106 outer_loop->invalid = 1;
3113 /* Return nonzero if there is a label in the range from
3114 insn INSN to and including the insn whose luid is END
3115 INSN must have an assigned luid (i.e., it must not have
3116 been previously created by loop.c). */
3119 labels_in_range_p (insn, end)
3123 while (insn && INSN_LUID (insn) <= end)
3125 if (GET_CODE (insn) == CODE_LABEL)
3127 insn = NEXT_INSN (insn);
3133 /* Record that a memory reference X is being set. */
3136 note_addr_stored (x, y, data)
3138 rtx y ATTRIBUTE_UNUSED;
3139 void *data ATTRIBUTE_UNUSED;
3141 if (x == 0 || GET_CODE (x) != MEM)
3144 /* Count number of memory writes.
3145 This affects heuristics in strength_reduce. */
3148 /* BLKmode MEM means all memory is clobbered. */
3149 if (GET_MODE (x) == BLKmode)
3151 if (RTX_UNCHANGING_P (x))
3152 unknown_constant_address_altered = 1;
3154 unknown_address_altered = 1;
3159 loop_store_mems = gen_rtx_EXPR_LIST (VOIDmode, x, loop_store_mems);
3162 /* X is a value modified by an INSN that references a biv inside a loop
3163 exit test (ie, X is somehow related to the value of the biv). If X
3164 is a pseudo that is used more than once, then the biv is (effectively)
3165 used more than once. DATA is really an `int *', and is set if the
3166 biv is used more than once. */
3169 note_set_pseudo_multiple_uses (x, y, data)
3171 rtx y ATTRIBUTE_UNUSED;
3177 while (GET_CODE (x) == STRICT_LOW_PART
3178 || GET_CODE (x) == SIGN_EXTRACT
3179 || GET_CODE (x) == ZERO_EXTRACT
3180 || GET_CODE (x) == SUBREG)
3183 if (GET_CODE (x) != REG || REGNO (x) < FIRST_PSEUDO_REGISTER)
3186 /* If we do not have usage information, or if we know the register
3187 is used more than once, note that fact for check_dbra_loop. */
3188 if (REGNO (x) >= max_reg_before_loop
3189 || ! VARRAY_RTX (reg_single_usage, REGNO (x))
3190 || VARRAY_RTX (reg_single_usage, REGNO (x)) == const0_rtx)
3191 *((int *) data) = 1;
3194 /* Return nonzero if the rtx X is invariant over the current loop.
3196 The value is 2 if we refer to something only conditionally invariant.
3198 If `unknown_address_altered' is nonzero, no memory ref is invariant.
3199 Otherwise, a memory ref is invariant if it does not conflict with
3200 anything stored in `loop_store_mems'. */
3203 loop_invariant_p (loop, x)
3204 const struct loop *loop;
3208 register enum rtx_code code;
3209 register const char *fmt;
3210 int conditional = 0;
3215 code = GET_CODE (x);
3225 /* A LABEL_REF is normally invariant, however, if we are unrolling
3226 loops, and this label is inside the loop, then it isn't invariant.
3227 This is because each unrolled copy of the loop body will have
3228 a copy of this label. If this was invariant, then an insn loading
3229 the address of this label into a register might get moved outside
3230 the loop, and then each loop body would end up using the same label.
3232 We don't know the loop bounds here though, so just fail for all
3234 if (flag_unroll_loops)
3241 case UNSPEC_VOLATILE:
3245 /* We used to check RTX_UNCHANGING_P (x) here, but that is invalid
3246 since the reg might be set by initialization within the loop. */
3248 if ((x == frame_pointer_rtx || x == hard_frame_pointer_rtx
3249 || x == arg_pointer_rtx)
3250 && ! current_function_has_nonlocal_goto)
3253 if (LOOP_INFO (loop)->has_call
3254 && REGNO (x) < FIRST_PSEUDO_REGISTER && call_used_regs[REGNO (x)])
3257 if (VARRAY_INT (set_in_loop, REGNO (x)) < 0)
3260 return VARRAY_INT (set_in_loop, REGNO (x)) == 0;
3263 /* Volatile memory references must be rejected. Do this before
3264 checking for read-only items, so that volatile read-only items
3265 will be rejected also. */
3266 if (MEM_VOLATILE_P (x))
3269 /* If we had a subroutine call, any location in memory could
3270 have been clobbered. We used to test here for volatile and
3271 readonly, but true_dependence knows how to do that better
3273 if (RTX_UNCHANGING_P (x)
3274 ? unknown_constant_address_altered : unknown_address_altered)
3277 /* See if there is any dependence between a store and this load. */
3278 mem_list_entry = loop_store_mems;
3279 while (mem_list_entry)
3281 if (true_dependence (XEXP (mem_list_entry, 0), VOIDmode,
3285 mem_list_entry = XEXP (mem_list_entry, 1);
3288 /* It's not invalidated by a store in memory
3289 but we must still verify the address is invariant. */
3293 /* Don't mess with insns declared volatile. */
3294 if (MEM_VOLATILE_P (x))
3302 fmt = GET_RTX_FORMAT (code);
3303 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3307 int tem = loop_invariant_p (loop, XEXP (x, i));
3313 else if (fmt[i] == 'E')
3316 for (j = 0; j < XVECLEN (x, i); j++)
3318 int tem = loop_invariant_p (loop, XVECEXP (x, i, j));
3328 return 1 + conditional;
3332 /* Return nonzero if all the insns in the loop that set REG
3333 are INSN and the immediately following insns,
3334 and if each of those insns sets REG in an invariant way
3335 (not counting uses of REG in them).
3337 The value is 2 if some of these insns are only conditionally invariant.
3339 We assume that INSN itself is the first set of REG
3340 and that its source is invariant. */
3343 consec_sets_invariant_p (loop, reg, n_sets, insn)
3344 const struct loop *loop;
3349 unsigned int regno = REGNO (reg);
3351 /* Number of sets we have to insist on finding after INSN. */
3352 int count = n_sets - 1;
3353 int old = VARRAY_INT (set_in_loop, regno);
3357 /* If N_SETS hit the limit, we can't rely on its value. */
3361 VARRAY_INT (set_in_loop, regno) = 0;
3365 register enum rtx_code code;
3369 code = GET_CODE (p);
3371 /* If library call, skip to end of it. */
3372 if (code == INSN && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
3377 && (set = single_set (p))
3378 && GET_CODE (SET_DEST (set)) == REG
3379 && REGNO (SET_DEST (set)) == regno)
3381 this = loop_invariant_p (loop, SET_SRC (set));
3384 else if ((temp = find_reg_note (p, REG_EQUAL, NULL_RTX)))
3386 /* If this is a libcall, then any invariant REG_EQUAL note is OK.
3387 If this is an ordinary insn, then only CONSTANT_P REG_EQUAL
3389 this = (CONSTANT_P (XEXP (temp, 0))
3390 || (find_reg_note (p, REG_RETVAL, NULL_RTX)
3391 && loop_invariant_p (loop, XEXP (temp, 0))));
3398 else if (code != NOTE)
3400 VARRAY_INT (set_in_loop, regno) = old;
3405 VARRAY_INT (set_in_loop, regno) = old;
3406 /* If loop_invariant_p ever returned 2, we return 2. */
3407 return 1 + (value & 2);
3411 /* I don't think this condition is sufficient to allow INSN
3412 to be moved, so we no longer test it. */
3414 /* Return 1 if all insns in the basic block of INSN and following INSN
3415 that set REG are invariant according to TABLE. */
3418 all_sets_invariant_p (reg, insn, table)
3422 register rtx p = insn;
3423 register int regno = REGNO (reg);
3427 register enum rtx_code code;
3429 code = GET_CODE (p);
3430 if (code == CODE_LABEL || code == JUMP_INSN)
3432 if (code == INSN && GET_CODE (PATTERN (p)) == SET
3433 && GET_CODE (SET_DEST (PATTERN (p))) == REG
3434 && REGNO (SET_DEST (PATTERN (p))) == regno)
3436 if (! loop_invariant_p (loop, SET_SRC (PATTERN (p)), table))
3443 /* Look at all uses (not sets) of registers in X. For each, if it is
3444 the single use, set USAGE[REGNO] to INSN; if there was a previous use in
3445 a different insn, set USAGE[REGNO] to const0_rtx. */
3448 find_single_use_in_loop (insn, x, usage)
3453 enum rtx_code code = GET_CODE (x);
3454 const char *fmt = GET_RTX_FORMAT (code);
3458 VARRAY_RTX (usage, REGNO (x))
3459 = (VARRAY_RTX (usage, REGNO (x)) != 0
3460 && VARRAY_RTX (usage, REGNO (x)) != insn)
3461 ? const0_rtx : insn;
3463 else if (code == SET)
3465 /* Don't count SET_DEST if it is a REG; otherwise count things
3466 in SET_DEST because if a register is partially modified, it won't
3467 show up as a potential movable so we don't care how USAGE is set
3469 if (GET_CODE (SET_DEST (x)) != REG)
3470 find_single_use_in_loop (insn, SET_DEST (x), usage);
3471 find_single_use_in_loop (insn, SET_SRC (x), usage);
3474 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3476 if (fmt[i] == 'e' && XEXP (x, i) != 0)
3477 find_single_use_in_loop (insn, XEXP (x, i), usage);
3478 else if (fmt[i] == 'E')
3479 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3480 find_single_use_in_loop (insn, XVECEXP (x, i, j), usage);
3484 /* Count and record any set in X which is contained in INSN. Update
3485 MAY_NOT_MOVE and LAST_SET for any register set in X. */
3488 count_one_set (insn, x, may_not_move, last_set)
3490 varray_type may_not_move;
3493 if (GET_CODE (x) == CLOBBER && GET_CODE (XEXP (x, 0)) == REG)
3494 /* Don't move a reg that has an explicit clobber.
3495 It's not worth the pain to try to do it correctly. */
3496 VARRAY_CHAR (may_not_move, REGNO (XEXP (x, 0))) = 1;
3498 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
3500 rtx dest = SET_DEST (x);
3501 while (GET_CODE (dest) == SUBREG
3502 || GET_CODE (dest) == ZERO_EXTRACT
3503 || GET_CODE (dest) == SIGN_EXTRACT
3504 || GET_CODE (dest) == STRICT_LOW_PART)
3505 dest = XEXP (dest, 0);
3506 if (GET_CODE (dest) == REG)
3508 register int regno = REGNO (dest);
3509 /* If this is the first setting of this reg
3510 in current basic block, and it was set before,
3511 it must be set in two basic blocks, so it cannot
3512 be moved out of the loop. */
3513 if (VARRAY_INT (set_in_loop, regno) > 0
3514 && last_set[regno] == 0)
3515 VARRAY_CHAR (may_not_move, regno) = 1;
3516 /* If this is not first setting in current basic block,
3517 see if reg was used in between previous one and this.
3518 If so, neither one can be moved. */
3519 if (last_set[regno] != 0
3520 && reg_used_between_p (dest, last_set[regno], insn))
3521 VARRAY_CHAR (may_not_move, regno) = 1;
3522 if (VARRAY_INT (set_in_loop, regno) < 127)
3523 ++VARRAY_INT (set_in_loop, regno);
3524 last_set[regno] = insn;
3529 /* Increment SET_IN_LOOP at the index of each register
3530 that is modified by an insn between FROM and TO.
3531 If the value of an element of SET_IN_LOOP becomes 127 or more,
3532 stop incrementing it, to avoid overflow.
3534 Store in SINGLE_USAGE[I] the single insn in which register I is
3535 used, if it is only used once. Otherwise, it is set to 0 (for no
3536 uses) or const0_rtx for more than one use. This parameter may be zero,
3537 in which case this processing is not done.
3539 Store in *COUNT_PTR the number of actual instruction
3540 in the loop. We use this to decide what is worth moving out. */
3542 /* last_set[n] is nonzero iff reg n has been set in the current basic block.
3543 In that case, it is the insn that last set reg n. */
3546 count_loop_regs_set (from, to, may_not_move, single_usage, count_ptr, nregs)
3547 register rtx from, to;
3548 varray_type may_not_move;
3549 varray_type single_usage;
3553 register rtx *last_set = (rtx *) xcalloc (nregs, sizeof (rtx));
3555 register int count = 0;
3557 for (insn = from; insn != to; insn = NEXT_INSN (insn))
3559 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
3563 /* Record registers that have exactly one use. */
3564 find_single_use_in_loop (insn, PATTERN (insn), single_usage);
3566 /* Include uses in REG_EQUAL notes. */
3567 if (REG_NOTES (insn))
3568 find_single_use_in_loop (insn, REG_NOTES (insn), single_usage);
3570 if (GET_CODE (PATTERN (insn)) == SET
3571 || GET_CODE (PATTERN (insn)) == CLOBBER)
3572 count_one_set (insn, PATTERN (insn), may_not_move, last_set);
3573 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
3576 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
3577 count_one_set (insn, XVECEXP (PATTERN (insn), 0, i),
3578 may_not_move, last_set);
3582 if (GET_CODE (insn) == CODE_LABEL || GET_CODE (insn) == JUMP_INSN)
3583 bzero ((char *) last_set, nregs * sizeof (rtx));
3591 /* Given a loop that is bounded by LOOP->START and LOOP->END and that
3592 is entered at LOOP->SCAN_START, return 1 if the register set in SET
3593 contained in insn INSN is used by any insn that precedes INSN in
3594 cyclic order starting from the loop entry point.
3596 We don't want to use INSN_LUID here because if we restrict INSN to those
3597 that have a valid INSN_LUID, it means we cannot move an invariant out
3598 from an inner loop past two loops. */
3601 loop_reg_used_before_p (loop, set, insn)
3602 const struct loop *loop;
3605 rtx reg = SET_DEST (set);
3608 /* Scan forward checking for register usage. If we hit INSN, we
3609 are done. Otherwise, if we hit LOOP->END, wrap around to LOOP->START. */
3610 for (p = loop->scan_start; p != insn; p = NEXT_INSN (p))
3612 if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
3613 && reg_overlap_mentioned_p (reg, PATTERN (p)))
3623 /* A "basic induction variable" or biv is a pseudo reg that is set
3624 (within this loop) only by incrementing or decrementing it. */
3625 /* A "general induction variable" or giv is a pseudo reg whose
3626 value is a linear function of a biv. */
3628 /* Bivs are recognized by `basic_induction_var';
3629 Givs by `general_induction_var'. */
3631 /* Indexed by register number, indicates whether or not register is an
3632 induction variable, and if so what type. */
3634 varray_type reg_iv_type;
3636 /* Indexed by register number, contains pointer to `struct induction'
3637 if register is an induction variable. This holds general info for
3638 all induction variables. */
3640 varray_type reg_iv_info;
3642 /* Indexed by register number, contains pointer to `struct iv_class'
3643 if register is a basic induction variable. This holds info describing
3644 the class (a related group) of induction variables that the biv belongs
3647 struct iv_class **reg_biv_class;
3649 /* The head of a list which links together (via the next field)
3650 every iv class for the current loop. */
3652 struct iv_class *loop_iv_list;
3654 /* Givs made from biv increments are always splittable for loop unrolling.
3655 Since there is no regscan info for them, we have to keep track of them
3657 unsigned int first_increment_giv, last_increment_giv;
3659 /* Communication with routines called via `note_stores'. */
3661 static rtx note_insn;
3663 /* Dummy register to have non-zero DEST_REG for DEST_ADDR type givs. */
3665 static rtx addr_placeholder;
3667 /* ??? Unfinished optimizations, and possible future optimizations,
3668 for the strength reduction code. */
3670 /* ??? The interaction of biv elimination, and recognition of 'constant'
3671 bivs, may cause problems. */
3673 /* ??? Add heuristics so that DEST_ADDR strength reduction does not cause
3674 performance problems.
3676 Perhaps don't eliminate things that can be combined with an addressing
3677 mode. Find all givs that have the same biv, mult_val, and add_val;
3678 then for each giv, check to see if its only use dies in a following
3679 memory address. If so, generate a new memory address and check to see
3680 if it is valid. If it is valid, then store the modified memory address,
3681 otherwise, mark the giv as not done so that it will get its own iv. */
3683 /* ??? Could try to optimize branches when it is known that a biv is always
3686 /* ??? When replace a biv in a compare insn, we should replace with closest
3687 giv so that an optimized branch can still be recognized by the combiner,
3688 e.g. the VAX acb insn. */
3690 /* ??? Many of the checks involving uid_luid could be simplified if regscan
3691 was rerun in loop_optimize whenever a register was added or moved.
3692 Also, some of the optimizations could be a little less conservative. */
3694 /* Scan the loop body and call FNCALL for each insn. In the addition to the
3695 LOOP and INSN parameters pass MAYBE_MULTIPLE and NOT_EVERY_ITERATION to the
3698 NOT_EVERY_ITERATION if current insn is not executed at least once for every
3699 loop iteration except for the last one.
3701 MAYBE_MULTIPLE is 1 if current insn may be executed more than once for every
3705 for_each_insn_in_loop (loop, fncall)
3707 loop_insn_callback fncall;
3709 /* This is 1 if current insn is not executed at least once for every loop
3711 int not_every_iteration = 0;
3712 int maybe_multiple = 0;
3713 int past_loop_latch = 0;
3717 /* If loop_scan_start points to the loop exit test, we have to be wary of
3718 subversive use of gotos inside expression statements. */
3719 if (prev_nonnote_insn (loop->scan_start) != prev_nonnote_insn (loop->start))
3720 maybe_multiple = back_branch_in_range_p (loop, loop->scan_start);
3722 /* Scan through loop to find all possible bivs. */
3724 for (p = next_insn_in_loop (loop, loop->scan_start);
3726 p = next_insn_in_loop (loop, p))
3728 p = fncall (loop, p, not_every_iteration, maybe_multiple);
3730 /* Past CODE_LABEL, we get to insns that may be executed multiple
3731 times. The only way we can be sure that they can't is if every
3732 jump insn between here and the end of the loop either
3733 returns, exits the loop, is a jump to a location that is still
3734 behind the label, or is a jump to the loop start. */
3736 if (GET_CODE (p) == CODE_LABEL)
3744 insn = NEXT_INSN (insn);
3745 if (insn == loop->scan_start)
3747 if (insn == loop->end)
3753 if (insn == loop->scan_start)
3757 if (GET_CODE (insn) == JUMP_INSN
3758 && GET_CODE (PATTERN (insn)) != RETURN
3759 && (!any_condjump_p (insn)
3760 || (JUMP_LABEL (insn) != 0
3761 && JUMP_LABEL (insn) != loop->scan_start
3762 && !loop_insn_first_p (p, JUMP_LABEL (insn)))))
3770 /* Past a jump, we get to insns for which we can't count
3771 on whether they will be executed during each iteration. */
3772 /* This code appears twice in strength_reduce. There is also similar
3773 code in scan_loop. */
3774 if (GET_CODE (p) == JUMP_INSN
3775 /* If we enter the loop in the middle, and scan around to the
3776 beginning, don't set not_every_iteration for that.
3777 This can be any kind of jump, since we want to know if insns
3778 will be executed if the loop is executed. */
3779 && !(JUMP_LABEL (p) == loop->top
3780 && ((NEXT_INSN (NEXT_INSN (p)) == loop->end
3781 && any_uncondjump_p (p))
3782 || (NEXT_INSN (p) == loop->end && any_condjump_p (p)))))
3786 /* If this is a jump outside the loop, then it also doesn't
3787 matter. Check to see if the target of this branch is on the
3788 loop->exits_labels list. */
3790 for (label = loop->exit_labels; label; label = LABEL_NEXTREF (label))
3791 if (XEXP (label, 0) == JUMP_LABEL (p))
3795 not_every_iteration = 1;
3798 else if (GET_CODE (p) == NOTE)
3800 /* At the virtual top of a converted loop, insns are again known to
3801 be executed each iteration: logically, the loop begins here
3802 even though the exit code has been duplicated.
3804 Insns are also again known to be executed each iteration at
3805 the LOOP_CONT note. */
3806 if ((NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP
3807 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_CONT)
3809 not_every_iteration = 0;
3810 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
3812 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
3816 /* Note if we pass a loop latch. If we do, then we can not clear
3817 NOT_EVERY_ITERATION below when we pass the last CODE_LABEL in
3818 a loop since a jump before the last CODE_LABEL may have started
3819 a new loop iteration.
3821 Note that LOOP_TOP is only set for rotated loops and we need
3822 this check for all loops, so compare against the CODE_LABEL
3823 which immediately follows LOOP_START. */
3824 if (GET_CODE (p) == JUMP_INSN
3825 && JUMP_LABEL (p) == NEXT_INSN (loop->start))
3826 past_loop_latch = 1;
3828 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
3829 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
3830 or not an insn is known to be executed each iteration of the
3831 loop, whether or not any iterations are known to occur.
3833 Therefore, if we have just passed a label and have no more labels
3834 between here and the test insn of the loop, and we have not passed
3835 a jump to the top of the loop, then we know these insns will be
3836 executed each iteration. */
3838 if (not_every_iteration
3840 && GET_CODE (p) == CODE_LABEL
3841 && no_labels_between_p (p, loop->end)
3842 && loop_insn_first_p (p, loop->cont))
3843 not_every_iteration = 0;
3847 /* Perform strength reduction and induction variable elimination.
3849 Pseudo registers created during this function will be beyond the last
3850 valid index in several tables including n_times_set and regno_last_uid.
3851 This does not cause a problem here, because the added registers cannot be
3852 givs outside of their loop, and hence will never be reconsidered.
3853 But scan_loop must check regnos to make sure they are in bounds. */
3856 strength_reduce (loop, insn_count, flags)
3862 /* Temporary list pointers for traversing loop_iv_list. */
3863 struct iv_class *bl, **backbl;
3864 struct loop_info *loop_info = LOOP_INFO (loop);
3865 /* Ratio of extra register life span we can justify
3866 for saving an instruction. More if loop doesn't call subroutines
3867 since in that case saving an insn makes more difference
3868 and more registers are available. */
3869 /* ??? could set this to last value of threshold in move_movables */
3870 int threshold = (loop_info->has_call ? 1 : 2) * (3 + n_non_fixed_regs);
3871 /* Map of pseudo-register replacements. */
3872 rtx *reg_map = NULL;
3876 rtx end_insert_before;
3877 int n_extra_increment;
3878 int unrolled_insn_copies = 0;
3879 rtx loop_start = loop->start;
3880 rtx loop_end = loop->end;
3881 rtx loop_scan_start = loop->scan_start;
3883 VARRAY_INT_INIT (reg_iv_type, max_reg_before_loop, "reg_iv_type");
3884 VARRAY_GENERIC_PTR_INIT (reg_iv_info, max_reg_before_loop, "reg_iv_info");
3885 reg_biv_class = (struct iv_class **)
3886 xcalloc (max_reg_before_loop, sizeof (struct iv_class *));
3889 addr_placeholder = gen_reg_rtx (Pmode);
3891 /* Save insn immediately after the loop_end. Insns inserted after loop_end
3892 must be put before this insn, so that they will appear in the right
3893 order (i.e. loop order).
3895 If loop_end is the end of the current function, then emit a
3896 NOTE_INSN_DELETED after loop_end and set end_insert_before to the
3898 if (NEXT_INSN (loop_end) != 0)
3899 end_insert_before = NEXT_INSN (loop_end);
3901 end_insert_before = emit_note_after (NOTE_INSN_DELETED, loop_end);
3903 for_each_insn_in_loop (loop, check_insn_for_bivs);
3905 /* Scan loop_iv_list to remove all regs that proved not to be bivs.
3906 Make a sanity check against n_times_set. */
3907 for (backbl = &loop_iv_list, bl = *backbl; bl; bl = bl->next)
3909 if (REG_IV_TYPE (bl->regno) != BASIC_INDUCT
3910 /* Above happens if register modified by subreg, etc. */
3911 /* Make sure it is not recognized as a basic induction var: */
3912 || VARRAY_INT (n_times_set, bl->regno) != bl->biv_count
3913 /* If never incremented, it is invariant that we decided not to
3914 move. So leave it alone. */
3915 || ! bl->incremented)
3917 if (loop_dump_stream)
3918 fprintf (loop_dump_stream, "Reg %d: biv discarded, %s\n",
3920 (REG_IV_TYPE (bl->regno) != BASIC_INDUCT
3921 ? "not induction variable"
3922 : (! bl->incremented ? "never incremented"
3925 REG_IV_TYPE (bl->regno) = NOT_BASIC_INDUCT;
3932 if (loop_dump_stream)
3933 fprintf (loop_dump_stream, "Reg %d: biv verified\n", bl->regno);
3937 /* Exit if there are no bivs. */
3940 /* Can still unroll the loop anyways, but indicate that there is no
3941 strength reduction info available. */
3942 if (flags & LOOP_UNROLL)
3943 unroll_loop (loop, insn_count, end_insert_before, 0);
3948 /* Find initial value for each biv by searching backwards from loop_start,
3949 halting at first label. Also record any test condition. */
3952 for (p = loop_start; p && GET_CODE (p) != CODE_LABEL; p = PREV_INSN (p))
3956 if (GET_CODE (p) == CALL_INSN)
3960 note_stores (PATTERN (p), record_initial, NULL);
3962 /* Record any test of a biv that branches around the loop if no store
3963 between it and the start of loop. We only care about tests with
3964 constants and registers and only certain of those. */
3965 if (GET_CODE (p) == JUMP_INSN
3966 && JUMP_LABEL (p) != 0
3967 && next_real_insn (JUMP_LABEL (p)) == next_real_insn (loop_end)
3968 && (test = get_condition_for_loop (loop, p)) != 0
3969 && GET_CODE (XEXP (test, 0)) == REG
3970 && REGNO (XEXP (test, 0)) < max_reg_before_loop
3971 && (bl = reg_biv_class[REGNO (XEXP (test, 0))]) != 0
3972 && valid_initial_value_p (XEXP (test, 1), p, call_seen, loop_start)
3973 && bl->init_insn == 0)
3975 /* If an NE test, we have an initial value! */
3976 if (GET_CODE (test) == NE)
3979 bl->init_set = gen_rtx_SET (VOIDmode,
3980 XEXP (test, 0), XEXP (test, 1));
3983 bl->initial_test = test;
3987 /* Look at the each biv and see if we can say anything better about its
3988 initial value from any initializing insns set up above. (This is done
3989 in two passes to avoid missing SETs in a PARALLEL.) */
3990 for (backbl = &loop_iv_list; (bl = *backbl); backbl = &bl->next)
3995 if (! bl->init_insn)
3998 /* IF INIT_INSN has a REG_EQUAL or REG_EQUIV note and the value
3999 is a constant, use the value of that. */
4000 if (((note = find_reg_note (bl->init_insn, REG_EQUAL, 0)) != NULL
4001 && CONSTANT_P (XEXP (note, 0)))
4002 || ((note = find_reg_note (bl->init_insn, REG_EQUIV, 0)) != NULL
4003 && CONSTANT_P (XEXP (note, 0))))
4004 src = XEXP (note, 0);
4006 src = SET_SRC (bl->init_set);
4008 if (loop_dump_stream)
4009 fprintf (loop_dump_stream,
4010 "Biv %d initialized at insn %d: initial value ",
4011 bl->regno, INSN_UID (bl->init_insn));
4013 if ((GET_MODE (src) == GET_MODE (regno_reg_rtx[bl->regno])
4014 || GET_MODE (src) == VOIDmode)
4015 && valid_initial_value_p (src, bl->init_insn, call_seen, loop_start))
4017 bl->initial_value = src;
4019 if (loop_dump_stream)
4021 if (GET_CODE (src) == CONST_INT)
4023 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, INTVAL (src));
4024 fputc ('\n', loop_dump_stream);
4028 print_rtl (loop_dump_stream, src);
4029 fprintf (loop_dump_stream, "\n");
4035 struct iv_class *bl2 = 0;
4036 rtx increment = NULL_RTX;
4038 /* Biv initial value is not a simple move. If it is the sum of
4039 another biv and a constant, check if both bivs are incremented
4040 in lockstep. Then we are actually looking at a giv.
4041 For simplicity, we only handle the case where there is but a
4042 single increment, and the register is not used elsewhere. */
4043 if (bl->biv_count == 1
4044 && bl->regno < max_reg_before_loop
4045 && uid_luid[REGNO_LAST_UID (bl->regno)] < INSN_LUID (loop_end)
4046 && GET_CODE (src) == PLUS
4047 && GET_CODE (XEXP (src, 0)) == REG
4048 && CONSTANT_P (XEXP (src, 1))
4049 && ((increment = biv_total_increment (bl)) != NULL_RTX))
4051 unsigned int regno = REGNO (XEXP (src, 0));
4053 for (bl2 = loop_iv_list; bl2; bl2 = bl2->next)
4054 if (bl2->regno == regno)
4058 /* Now, can we transform this biv into a giv? */
4060 && bl2->biv_count == 1
4061 && rtx_equal_p (increment, biv_total_increment (bl2))
4062 /* init_insn is only set to insns that are before loop_start
4063 without any intervening labels. */
4064 && ! reg_set_between_p (bl2->biv->src_reg,
4065 PREV_INSN (bl->init_insn), loop_start)
4066 /* The register from BL2 must be set before the register from
4067 BL is set, or we must be able to move the latter set after
4068 the former set. Currently there can't be any labels
4069 in-between when biv_total_increment returns nonzero both times
4070 but we test it here in case some day some real cfg analysis
4071 gets used to set always_computable. */
4072 && (loop_insn_first_p (bl2->biv->insn, bl->biv->insn)
4073 ? no_labels_between_p (bl2->biv->insn, bl->biv->insn)
4074 : (! reg_used_between_p (bl->biv->src_reg, bl->biv->insn,
4076 && no_jumps_between_p (bl->biv->insn, bl2->biv->insn)))
4077 && validate_change (bl->biv->insn,
4078 &SET_SRC (single_set (bl->biv->insn)),
4081 rtx dominator = loop->cont_dominator;
4082 rtx giv = bl->biv->src_reg;
4083 rtx giv_insn = bl->biv->insn;
4084 rtx after_giv = NEXT_INSN (giv_insn);
4086 if (loop_dump_stream)
4087 fprintf (loop_dump_stream, "is giv of biv %d\n", bl2->regno);
4088 /* Let this giv be discovered by the generic code. */
4089 REG_IV_TYPE (bl->regno) = UNKNOWN_INDUCT;
4090 reg_biv_class[bl->regno] = (struct iv_class *) NULL_PTR;
4091 /* We can get better optimization if we can move the giv setting
4092 before the first giv use. */
4094 && ! loop_insn_first_p (dominator, loop_scan_start)
4095 && ! reg_set_between_p (bl2->biv->src_reg, loop_start,
4097 && ! reg_used_between_p (giv, loop_start, dominator)
4098 && ! reg_used_between_p (giv, giv_insn, loop_end))
4103 for (next = NEXT_INSN (dominator); ; next = NEXT_INSN (next))
4105 if (GET_CODE (next) == JUMP_INSN
4107 && insn_dependent_p (giv_insn, next)))
4111 || ! sets_cc0_p (PATTERN (next)))
4115 if (loop_dump_stream)
4116 fprintf (loop_dump_stream, "move after insn %d\n",
4117 INSN_UID (dominator));
4118 /* Avoid problems with luids by actually moving the insn
4119 and adjusting all luids in the range. */
4120 reorder_insns (giv_insn, giv_insn, dominator);
4121 for (p = dominator; INSN_UID (p) >= max_uid_for_loop; )
4123 compute_luids (giv_insn, after_giv, INSN_LUID (p));
4124 /* If the only purpose of the init insn is to initialize
4125 this giv, delete it. */
4126 if (single_set (bl->init_insn)
4127 && ! reg_used_between_p (giv, bl->init_insn, loop_start))
4128 delete_insn (bl->init_insn);
4130 else if (! loop_insn_first_p (bl2->biv->insn, bl->biv->insn))
4132 rtx p = PREV_INSN (giv_insn);
4133 while (INSN_UID (p) >= max_uid_for_loop)
4135 reorder_insns (giv_insn, giv_insn, bl2->biv->insn);
4136 compute_luids (after_giv, NEXT_INSN (giv_insn),
4139 /* Remove this biv from the chain. */
4143 /* If we can't make it a giv,
4144 let biv keep initial value of "itself". */
4145 else if (loop_dump_stream)
4146 fprintf (loop_dump_stream, "is complex\n");
4150 /* If a biv is unconditionally incremented several times in a row, convert
4151 all but the last increment into a giv. */
4153 /* Get an upper bound for the number of registers
4154 we might have after all bivs have been processed. */
4155 first_increment_giv = max_reg_num ();
4156 for (n_extra_increment = 0, bl = loop_iv_list; bl; bl = bl->next)
4157 n_extra_increment += bl->biv_count - 1;
4159 /* If the loop contains volatile memory references do not allow any
4160 replacements to take place, since this could loose the volatile
4162 if (n_extra_increment && ! loop_info->has_volatile)
4164 unsigned int nregs = first_increment_giv + n_extra_increment;
4166 /* Reallocate reg_iv_type and reg_iv_info. */
4167 VARRAY_GROW (reg_iv_type, nregs);
4168 VARRAY_GROW (reg_iv_info, nregs);
4170 for (bl = loop_iv_list; bl; bl = bl->next)
4172 struct induction **vp, *v, *next;
4173 int biv_dead_after_loop = 0;
4175 /* The biv increments lists are in reverse order. Fix this
4177 for (v = bl->biv, bl->biv = 0; v; v = next)
4180 v->next_iv = bl->biv;
4184 /* We must guard against the case that an early exit between v->insn
4185 and next->insn leaves the biv live after the loop, since that
4186 would mean that we'd be missing an increment for the final
4187 value. The following test to set biv_dead_after_loop is like
4188 the first part of the test to set bl->eliminable.
4189 We don't check here if we can calculate the final value, since
4190 this can't succeed if we already know that there is a jump
4191 between v->insn and next->insn, yet next->always_executed is
4192 set and next->maybe_multiple is cleared. Such a combination
4193 implies that the jump destination is outside the loop.
4194 If we want to make this check more sophisticated, we should
4195 check each branch between v->insn and next->insn individually
4196 to see if the biv is dead at its destination. */
4198 if (uid_luid[REGNO_LAST_UID (bl->regno)] < INSN_LUID (loop_end)
4200 && INSN_UID (bl->init_insn) < max_uid_for_loop
4201 && (uid_luid[REGNO_FIRST_UID (bl->regno)]
4202 >= INSN_LUID (bl->init_insn))
4203 #ifdef HAVE_decrement_and_branch_until_zero
4206 && ! reg_mentioned_p (bl->biv->dest_reg, SET_SRC (bl->init_set)))
4207 biv_dead_after_loop = 1;
4209 for (vp = &bl->biv, next = *vp; v = next, next = v->next_iv;)
4211 HOST_WIDE_INT offset;
4212 rtx set, add_val, old_reg, dest_reg, last_use_insn, note;
4213 int old_regno, new_regno;
4216 if (! v->always_executed
4217 || v->maybe_multiple
4218 || GET_CODE (v->add_val) != CONST_INT
4219 || ! next->always_executed
4220 || next->maybe_multiple
4221 || ! CONSTANT_P (next->add_val)
4222 || v->mult_val != const1_rtx
4223 || next->mult_val != const1_rtx
4224 || ! (biv_dead_after_loop
4225 || no_jumps_between_p (v->insn, next->insn)))
4230 offset = INTVAL (v->add_val);
4231 set = single_set (v->insn);
4232 add_val = plus_constant (next->add_val, offset);
4233 old_reg = v->dest_reg;
4234 dest_reg = gen_reg_rtx (v->mode);
4236 /* Unlike reg_iv_type / reg_iv_info, the other three arrays
4237 have been allocated with some slop space, so we may not
4238 actually need to reallocate them. If we do, the following
4239 if statement will be executed just once in this loop. */
4240 if ((unsigned) max_reg_num () > n_times_set->num_elements)
4242 /* Grow all the remaining arrays. */
4243 VARRAY_GROW (set_in_loop, nregs);
4244 VARRAY_GROW (n_times_set, nregs);
4245 VARRAY_GROW (may_not_optimize, nregs);
4246 VARRAY_GROW (reg_single_usage, nregs);
4249 /* Some bivs are incremented with a multi-insn sequence.
4250 The first insn contains the add. */
4251 next_loc_insn = next->insn;
4252 while (! loc_mentioned_in_p (next->location,
4253 PATTERN (next_loc_insn)))
4254 next_loc_insn = PREV_INSN (next_loc_insn);
4256 if (next_loc_insn == v->insn)
4259 if (! validate_change (next_loc_insn, next->location, add_val, 0))
4265 /* Here we can try to eliminate the increment by combining
4266 it into the uses. */
4268 /* Set last_use_insn so that we can check against it. */
4270 for (last_use_insn = v->insn, p = NEXT_INSN (v->insn);
4272 p = next_insn_in_loop (loop, p))
4276 if (reg_mentioned_p (old_reg, PATTERN (p)))
4282 /* If we can't get the LUIDs for the insns, we can't
4283 calculate the lifetime. This is likely from unrolling
4284 of an inner loop, so there is little point in making this
4285 a DEST_REG giv anyways. */
4286 if (INSN_UID (v->insn) >= max_uid_for_loop
4287 || INSN_UID (last_use_insn) >= max_uid_for_loop
4288 || ! validate_change (v->insn, &SET_DEST (set), dest_reg, 0))
4290 /* Change the increment at NEXT back to what it was. */
4291 if (! validate_change (next_loc_insn, next->location,
4297 next->add_val = add_val;
4298 v->dest_reg = dest_reg;
4299 v->giv_type = DEST_REG;
4300 v->location = &SET_SRC (set);
4302 v->combined_with = 0;
4304 v->derive_adjustment = 0;
4310 v->auto_inc_opt = 0;
4313 v->derived_from = 0;
4314 v->always_computable = 1;
4315 v->always_executed = 1;
4317 v->no_const_addval = 0;
4319 old_regno = REGNO (old_reg);
4320 new_regno = REGNO (dest_reg);
4321 VARRAY_INT (set_in_loop, old_regno)--;
4322 VARRAY_INT (set_in_loop, new_regno) = 1;
4323 VARRAY_INT (n_times_set, old_regno)--;
4324 VARRAY_INT (n_times_set, new_regno) = 1;
4325 VARRAY_CHAR (may_not_optimize, new_regno) = 0;
4327 REG_IV_TYPE (new_regno) = GENERAL_INDUCT;
4328 REG_IV_INFO (new_regno) = v;
4330 /* If next_insn has a REG_EQUAL note that mentiones OLD_REG,
4331 it must be replaced. */
4332 note = find_reg_note (next->insn, REG_EQUAL, NULL_RTX);
4333 if (note && reg_mentioned_p (old_reg, XEXP (note, 0)))
4334 XEXP (note, 0) = copy_rtx (SET_SRC (single_set (next->insn)));
4336 /* Remove the increment from the list of biv increments,
4337 and record it as a giv. */
4340 v->next_iv = bl->giv;
4343 v->benefit = rtx_cost (SET_SRC (set), SET);
4344 bl->total_benefit += v->benefit;
4346 /* Now replace the biv with DEST_REG in all insns between
4347 the replaced increment and the next increment, and
4348 remember the last insn that needed a replacement. */
4349 for (last_use_insn = v->insn, p = NEXT_INSN (v->insn);
4351 p = next_insn_in_loop (loop, p))
4355 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
4357 if (reg_mentioned_p (old_reg, PATTERN (p)))
4360 if (! validate_replace_rtx (old_reg, dest_reg, p))
4363 for (note = REG_NOTES (p); note; note = XEXP (note, 1))
4365 if (GET_CODE (note) == EXPR_LIST)
4367 = replace_rtx (XEXP (note, 0), old_reg, dest_reg);
4371 v->last_use = last_use_insn;
4372 v->lifetime = INSN_LUID (last_use_insn) - INSN_LUID (v->insn);
4373 /* If the lifetime is zero, it means that this register is really
4374 a dead store. So mark this as a giv that can be ignored.
4375 This will not prevent the biv from being eliminated. */
4376 if (v->lifetime == 0)
4379 if (loop_dump_stream)
4380 fprintf (loop_dump_stream,
4381 "Increment %d of biv %d converted to giv %d.\n\n",
4382 INSN_UID (v->insn), old_regno, new_regno);
4386 last_increment_giv = max_reg_num () - 1;
4388 /* Search the loop for general induction variables. */
4390 for_each_insn_in_loop (loop, check_insn_for_givs);
4392 /* Try to calculate and save the number of loop iterations. This is
4393 set to zero if the actual number can not be calculated. This must
4394 be called after all giv's have been identified, since otherwise it may
4395 fail if the iteration variable is a giv. */
4397 loop_iterations (loop);
4399 /* Now for each giv for which we still don't know whether or not it is
4400 replaceable, check to see if it is replaceable because its final value
4401 can be calculated. This must be done after loop_iterations is called,
4402 so that final_giv_value will work correctly. */
4404 for (bl = loop_iv_list; bl; bl = bl->next)
4406 struct induction *v;
4408 for (v = bl->giv; v; v = v->next_iv)
4409 if (! v->replaceable && ! v->not_replaceable)
4410 check_final_value (loop, v);
4413 /* Try to prove that the loop counter variable (if any) is always
4414 nonnegative; if so, record that fact with a REG_NONNEG note
4415 so that "decrement and branch until zero" insn can be used. */
4416 check_dbra_loop (loop, insn_count);
4418 /* Create reg_map to hold substitutions for replaceable giv regs.
4419 Some givs might have been made from biv increments, so look at
4420 reg_iv_type for a suitable size. */
4421 reg_map_size = reg_iv_type->num_elements;
4422 reg_map = (rtx *) xcalloc (reg_map_size, sizeof (rtx));
4424 /* Examine each iv class for feasibility of strength reduction/induction
4425 variable elimination. */
4427 for (bl = loop_iv_list; bl; bl = bl->next)
4429 struct induction *v;
4432 rtx final_value = 0;
4435 /* Test whether it will be possible to eliminate this biv
4436 provided all givs are reduced. This is possible if either
4437 the reg is not used outside the loop, or we can compute
4438 what its final value will be.
4440 For architectures with a decrement_and_branch_until_zero insn,
4441 don't do this if we put a REG_NONNEG note on the endtest for
4444 /* Compare against bl->init_insn rather than loop_start.
4445 We aren't concerned with any uses of the biv between
4446 init_insn and loop_start since these won't be affected
4447 by the value of the biv elsewhere in the function, so
4448 long as init_insn doesn't use the biv itself.
4449 March 14, 1989 -- self@bayes.arc.nasa.gov */
4451 if ((uid_luid[REGNO_LAST_UID (bl->regno)] < INSN_LUID (loop_end)
4453 && INSN_UID (bl->init_insn) < max_uid_for_loop
4454 && uid_luid[REGNO_FIRST_UID (bl->regno)] >= INSN_LUID (bl->init_insn)
4455 #ifdef HAVE_decrement_and_branch_until_zero
4458 && ! reg_mentioned_p (bl->biv->dest_reg, SET_SRC (bl->init_set)))
4459 || ((final_value = final_biv_value (loop, bl))
4460 #ifdef HAVE_decrement_and_branch_until_zero
4464 bl->eliminable = maybe_eliminate_biv (loop, bl, 0, threshold,
4468 if (loop_dump_stream)
4470 fprintf (loop_dump_stream,
4471 "Cannot eliminate biv %d.\n",
4473 fprintf (loop_dump_stream,
4474 "First use: insn %d, last use: insn %d.\n",
4475 REGNO_FIRST_UID (bl->regno),
4476 REGNO_LAST_UID (bl->regno));
4480 /* Combine all giv's for this iv_class. */
4483 /* This will be true at the end, if all givs which depend on this
4484 biv have been strength reduced.
4485 We can't (currently) eliminate the biv unless this is so. */
4488 /* Check each giv in this class to see if we will benefit by reducing
4489 it. Skip giv's combined with others. */
4490 for (v = bl->giv; v; v = v->next_iv)
4492 struct induction *tv;
4494 if (v->ignore || v->same)
4497 benefit = v->benefit;
4499 /* Reduce benefit if not replaceable, since we will insert
4500 a move-insn to replace the insn that calculates this giv.
4501 Don't do this unless the giv is a user variable, since it
4502 will often be marked non-replaceable because of the duplication
4503 of the exit code outside the loop. In such a case, the copies
4504 we insert are dead and will be deleted. So they don't have
4505 a cost. Similar situations exist. */
4506 /* ??? The new final_[bg]iv_value code does a much better job
4507 of finding replaceable giv's, and hence this code may no longer
4509 if (! v->replaceable && ! bl->eliminable
4510 && REG_USERVAR_P (v->dest_reg))
4511 benefit -= copy_cost;
4513 /* Decrease the benefit to count the add-insns that we will
4514 insert to increment the reduced reg for the giv. */
4515 benefit -= add_cost * bl->biv_count;
4517 /* Decide whether to strength-reduce this giv or to leave the code
4518 unchanged (recompute it from the biv each time it is used).
4519 This decision can be made independently for each giv. */
4522 /* Attempt to guess whether autoincrement will handle some of the
4523 new add insns; if so, increase BENEFIT (undo the subtraction of
4524 add_cost that was done above). */
4525 if (v->giv_type == DEST_ADDR
4526 && GET_CODE (v->mult_val) == CONST_INT)
4528 if (HAVE_POST_INCREMENT
4529 && INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
4530 benefit += add_cost * bl->biv_count;
4531 else if (HAVE_PRE_INCREMENT
4532 && INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
4533 benefit += add_cost * bl->biv_count;
4534 else if (HAVE_POST_DECREMENT
4535 && -INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
4536 benefit += add_cost * bl->biv_count;
4537 else if (HAVE_PRE_DECREMENT
4538 && -INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
4539 benefit += add_cost * bl->biv_count;
4543 /* If an insn is not to be strength reduced, then set its ignore
4544 flag, and clear all_reduced. */
4546 /* A giv that depends on a reversed biv must be reduced if it is
4547 used after the loop exit, otherwise, it would have the wrong
4548 value after the loop exit. To make it simple, just reduce all
4549 of such giv's whether or not we know they are used after the loop
4552 if ( ! flag_reduce_all_givs && v->lifetime * threshold * benefit < insn_count
4555 if (loop_dump_stream)
4556 fprintf (loop_dump_stream,
4557 "giv of insn %d not worth while, %d vs %d.\n",
4559 v->lifetime * threshold * benefit, insn_count);
4565 /* Check that we can increment the reduced giv without a
4566 multiply insn. If not, reject it. */
4568 for (tv = bl->biv; tv; tv = tv->next_iv)
4569 if (tv->mult_val == const1_rtx
4570 && ! product_cheap_p (tv->add_val, v->mult_val))
4572 if (loop_dump_stream)
4573 fprintf (loop_dump_stream,
4574 "giv of insn %d: would need a multiply.\n",
4575 INSN_UID (v->insn));
4583 /* Check for givs whose first use is their definition and whose
4584 last use is the definition of another giv. If so, it is likely
4585 dead and should not be used to derive another giv nor to
4587 for (v = bl->giv; v; v = v->next_iv)
4590 || (v->same && v->same->ignore))
4595 struct induction *v1;
4597 for (v1 = bl->giv; v1; v1 = v1->next_iv)
4598 if (v->last_use == v1->insn)
4601 else if (v->giv_type == DEST_REG
4602 && REGNO_FIRST_UID (REGNO (v->dest_reg)) == INSN_UID (v->insn))
4604 struct induction *v1;
4606 for (v1 = bl->giv; v1; v1 = v1->next_iv)
4607 if (REGNO_LAST_UID (REGNO (v->dest_reg)) == INSN_UID (v1->insn))
4612 /* Now that we know which givs will be reduced, try to rearrange the
4613 combinations to reduce register pressure.
4614 recombine_givs calls find_life_end, which needs reg_iv_type and
4615 reg_iv_info to be valid for all pseudos. We do the necessary
4616 reallocation here since it allows to check if there are still
4617 more bivs to process. */
4618 nregs = max_reg_num ();
4619 if (nregs > reg_iv_type->num_elements)
4621 /* If there are still more bivs to process, allocate some slack
4622 space so that we're not constantly reallocating these arrays. */
4625 /* Reallocate reg_iv_type and reg_iv_info. */
4626 VARRAY_GROW (reg_iv_type, nregs);
4627 VARRAY_GROW (reg_iv_info, nregs);
4629 recombine_givs (loop, bl, flags & LOOP_UNROLL);
4631 /* Reduce each giv that we decided to reduce. */
4633 for (v = bl->giv; v; v = v->next_iv)
4635 struct induction *tv;
4636 if (! v->ignore && v->same == 0)
4638 int auto_inc_opt = 0;
4640 /* If the code for derived givs immediately below has already
4641 allocated a new_reg, we must keep it. */
4643 v->new_reg = gen_reg_rtx (v->mode);
4645 if (v->derived_from)
4647 struct induction *d = v->derived_from;
4649 /* In case d->dest_reg is not replaceable, we have
4650 to replace it in v->insn now. */
4652 d->new_reg = gen_reg_rtx (d->mode);
4654 = replace_rtx (PATTERN (v->insn), d->dest_reg, d->new_reg);
4656 = replace_rtx (PATTERN (v->insn), v->dest_reg, v->new_reg);
4657 /* For each place where the biv is incremented, add an
4658 insn to set the new, reduced reg for the giv.
4659 We used to do this only for biv_count != 1, but
4660 this fails when there is a giv after a single biv
4661 increment, e.g. when the last giv was expressed as
4663 for (tv = bl->biv; tv; tv = tv->next_iv)
4665 /* We always emit reduced giv increments before the
4666 biv increment when bl->biv_count != 1. So by
4667 emitting the add insns for derived givs after the
4668 biv increment, they pick up the updated value of
4670 If the reduced giv is processed with
4671 auto_inc_opt == 1, then it is incremented earlier
4672 than the biv, hence we'll still pick up the right
4674 If it's processed with auto_inc_opt == -1,
4675 that implies that the biv increment is before the
4676 first reduced giv's use. The derived giv's lifetime
4677 is after the reduced giv's lifetime, hence in this
4678 case, the biv increment doesn't matter. */
4679 emit_insn_after (copy_rtx (PATTERN (v->insn)), tv->insn);
4685 /* If the target has auto-increment addressing modes, and
4686 this is an address giv, then try to put the increment
4687 immediately after its use, so that flow can create an
4688 auto-increment addressing mode. */
4689 if (v->giv_type == DEST_ADDR && bl->biv_count == 1
4690 && bl->biv->always_executed && ! bl->biv->maybe_multiple
4691 /* We don't handle reversed biv's because bl->biv->insn
4692 does not have a valid INSN_LUID. */
4694 && v->always_executed && ! v->maybe_multiple
4695 && INSN_UID (v->insn) < max_uid_for_loop)
4697 /* If other giv's have been combined with this one, then
4698 this will work only if all uses of the other giv's occur
4699 before this giv's insn. This is difficult to check.
4701 We simplify this by looking for the common case where
4702 there is one DEST_REG giv, and this giv's insn is the
4703 last use of the dest_reg of that DEST_REG giv. If the
4704 increment occurs after the address giv, then we can
4705 perform the optimization. (Otherwise, the increment
4706 would have to go before other_giv, and we would not be
4707 able to combine it with the address giv to get an
4708 auto-inc address.) */
4709 if (v->combined_with)
4711 struct induction *other_giv = 0;
4713 for (tv = bl->giv; tv; tv = tv->next_iv)
4721 if (! tv && other_giv
4722 && REGNO (other_giv->dest_reg) < max_reg_before_loop
4723 && (REGNO_LAST_UID (REGNO (other_giv->dest_reg))
4724 == INSN_UID (v->insn))
4725 && INSN_LUID (v->insn) < INSN_LUID (bl->biv->insn))
4728 /* Check for case where increment is before the address
4729 giv. Do this test in "loop order". */
4730 else if ((INSN_LUID (v->insn) > INSN_LUID (bl->biv->insn)
4731 && (INSN_LUID (v->insn) < INSN_LUID (loop_scan_start)
4732 || (INSN_LUID (bl->biv->insn)
4733 > INSN_LUID (loop_scan_start))))
4734 || (INSN_LUID (v->insn) < INSN_LUID (loop_scan_start)
4735 && (INSN_LUID (loop_scan_start)
4736 < INSN_LUID (bl->biv->insn))))
4745 /* We can't put an insn immediately after one setting
4746 cc0, or immediately before one using cc0. */
4747 if ((auto_inc_opt == 1 && sets_cc0_p (PATTERN (v->insn)))
4748 || (auto_inc_opt == -1
4749 && (prev = prev_nonnote_insn (v->insn)) != 0
4750 && GET_RTX_CLASS (GET_CODE (prev)) == 'i'
4751 && sets_cc0_p (PATTERN (prev))))
4757 v->auto_inc_opt = 1;
4761 /* For each place where the biv is incremented, add an insn
4762 to increment the new, reduced reg for the giv. */
4763 for (tv = bl->biv; tv; tv = tv->next_iv)
4768 insert_before = tv->insn;
4769 else if (auto_inc_opt == 1)
4770 insert_before = NEXT_INSN (v->insn);
4772 insert_before = v->insn;
4774 if (tv->mult_val == const1_rtx)
4775 emit_iv_add_mult (tv->add_val, v->mult_val,
4776 v->new_reg, v->new_reg, insert_before);
4777 else /* tv->mult_val == const0_rtx */
4778 /* A multiply is acceptable here
4779 since this is presumed to be seldom executed. */
4780 emit_iv_add_mult (tv->add_val, v->mult_val,
4781 v->add_val, v->new_reg, insert_before);
4784 /* Add code at loop start to initialize giv's reduced reg. */
4786 emit_iv_add_mult (bl->initial_value, v->mult_val,
4787 v->add_val, v->new_reg, loop_start);
4791 /* Rescan all givs. If a giv is the same as a giv not reduced, mark it
4794 For each giv register that can be reduced now: if replaceable,
4795 substitute reduced reg wherever the old giv occurs;
4796 else add new move insn "giv_reg = reduced_reg". */
4798 for (v = bl->giv; v; v = v->next_iv)
4800 if (v->same && v->same->ignore)
4806 /* Update expression if this was combined, in case other giv was
4809 v->new_reg = replace_rtx (v->new_reg,
4810 v->same->dest_reg, v->same->new_reg);
4812 if (v->giv_type == DEST_ADDR)
4813 /* Store reduced reg as the address in the memref where we found
4815 validate_change (v->insn, v->location, v->new_reg, 0);
4816 else if (v->replaceable)
4818 reg_map[REGNO (v->dest_reg)] = v->new_reg;
4821 /* I can no longer duplicate the original problem. Perhaps
4822 this is unnecessary now? */
4824 /* Replaceable; it isn't strictly necessary to delete the old
4825 insn and emit a new one, because v->dest_reg is now dead.
4827 However, especially when unrolling loops, the special
4828 handling for (set REG0 REG1) in the second cse pass may
4829 make v->dest_reg live again. To avoid this problem, emit
4830 an insn to set the original giv reg from the reduced giv.
4831 We can not delete the original insn, since it may be part
4832 of a LIBCALL, and the code in flow that eliminates dead
4833 libcalls will fail if it is deleted. */
4834 emit_insn_after (gen_move_insn (v->dest_reg, v->new_reg),
4840 /* Not replaceable; emit an insn to set the original giv reg from
4841 the reduced giv, same as above. */
4842 emit_insn_after (gen_move_insn (v->dest_reg, v->new_reg),
4846 /* When a loop is reversed, givs which depend on the reversed
4847 biv, and which are live outside the loop, must be set to their
4848 correct final value. This insn is only needed if the giv is
4849 not replaceable. The correct final value is the same as the
4850 value that the giv starts the reversed loop with. */
4851 if (bl->reversed && ! v->replaceable)
4852 emit_iv_add_mult (bl->initial_value, v->mult_val,
4853 v->add_val, v->dest_reg, end_insert_before);
4854 else if (v->final_value)
4858 /* If the loop has multiple exits, emit the insn before the
4859 loop to ensure that it will always be executed no matter
4860 how the loop exits. Otherwise, emit the insn after the loop,
4861 since this is slightly more efficient. */
4862 if (loop->exit_count)
4863 insert_before = loop_start;
4865 insert_before = end_insert_before;
4866 emit_insn_before (gen_move_insn (v->dest_reg, v->final_value),
4870 /* If the insn to set the final value of the giv was emitted
4871 before the loop, then we must delete the insn inside the loop
4872 that sets it. If this is a LIBCALL, then we must delete
4873 every insn in the libcall. Note, however, that
4874 final_giv_value will only succeed when there are multiple
4875 exits if the giv is dead at each exit, hence it does not
4876 matter that the original insn remains because it is dead
4878 /* Delete the insn inside the loop that sets the giv since
4879 the giv is now set before (or after) the loop. */
4880 delete_insn (v->insn);
4884 if (loop_dump_stream)
4886 fprintf (loop_dump_stream, "giv at %d reduced to ",
4887 INSN_UID (v->insn));
4888 print_rtl (loop_dump_stream, v->new_reg);
4889 fprintf (loop_dump_stream, "\n");
4893 /* All the givs based on the biv bl have been reduced if they
4896 /* For each giv not marked as maybe dead that has been combined with a
4897 second giv, clear any "maybe dead" mark on that second giv.
4898 v->new_reg will either be or refer to the register of the giv it
4901 Doing this clearing avoids problems in biv elimination where a
4902 giv's new_reg is a complex value that can't be put in the insn but
4903 the giv combined with (with a reg as new_reg) is marked maybe_dead.
4904 Since the register will be used in either case, we'd prefer it be
4905 used from the simpler giv. */
4907 for (v = bl->giv; v; v = v->next_iv)
4908 if (! v->maybe_dead && v->same)
4909 v->same->maybe_dead = 0;
4911 /* Try to eliminate the biv, if it is a candidate.
4912 This won't work if ! all_reduced,
4913 since the givs we planned to use might not have been reduced.
4915 We have to be careful that we didn't initially think we could eliminate
4916 this biv because of a giv that we now think may be dead and shouldn't
4917 be used as a biv replacement.
4919 Also, there is the possibility that we may have a giv that looks
4920 like it can be used to eliminate a biv, but the resulting insn
4921 isn't valid. This can happen, for example, on the 88k, where a
4922 JUMP_INSN can compare a register only with zero. Attempts to
4923 replace it with a compare with a constant will fail.
4925 Note that in cases where this call fails, we may have replaced some
4926 of the occurrences of the biv with a giv, but no harm was done in
4927 doing so in the rare cases where it can occur. */
4929 if (all_reduced == 1 && bl->eliminable
4930 && maybe_eliminate_biv (loop, bl, 1, threshold, insn_count))
4932 /* ?? If we created a new test to bypass the loop entirely,
4933 or otherwise drop straight in, based on this test, then
4934 we might want to rewrite it also. This way some later
4935 pass has more hope of removing the initialization of this
4938 /* If final_value != 0, then the biv may be used after loop end
4939 and we must emit an insn to set it just in case.
4941 Reversed bivs already have an insn after the loop setting their
4942 value, so we don't need another one. We can't calculate the
4943 proper final value for such a biv here anyways. */
4944 if (final_value != 0 && ! bl->reversed)
4948 /* If the loop has multiple exits, emit the insn before the
4949 loop to ensure that it will always be executed no matter
4950 how the loop exits. Otherwise, emit the insn after the
4951 loop, since this is slightly more efficient. */
4952 if (loop->exit_count)
4953 insert_before = loop_start;
4955 insert_before = end_insert_before;
4957 emit_insn_before (gen_move_insn (bl->biv->dest_reg, final_value),
4962 /* Delete all of the instructions inside the loop which set
4963 the biv, as they are all dead. If is safe to delete them,
4964 because an insn setting a biv will never be part of a libcall. */
4965 /* However, deleting them will invalidate the regno_last_uid info,
4966 so keeping them around is more convenient. Final_biv_value
4967 will only succeed when there are multiple exits if the biv
4968 is dead at each exit, hence it does not matter that the original
4969 insn remains, because it is dead anyways. */
4970 for (v = bl->biv; v; v = v->next_iv)
4971 delete_insn (v->insn);
4974 if (loop_dump_stream)
4975 fprintf (loop_dump_stream, "Reg %d: biv eliminated\n",
4980 /* Go through all the instructions in the loop, making all the
4981 register substitutions scheduled in REG_MAP. */
4983 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
4984 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
4985 || GET_CODE (p) == CALL_INSN)
4987 replace_regs (PATTERN (p), reg_map, reg_map_size, 0);
4988 replace_regs (REG_NOTES (p), reg_map, reg_map_size, 0);
4992 if (loop_info->n_iterations > 0)
4994 /* When we completely unroll a loop we will likely not need the increment
4995 of the loop BIV and we will not need the conditional branch at the
4997 unrolled_insn_copies = insn_count - 2;
5000 /* When we completely unroll a loop on a HAVE_cc0 machine we will not
5001 need the comparison before the conditional branch at the end of the
5003 unrolled_insn_copies -= 1;
5006 /* We'll need one copy for each loop iteration. */
5007 unrolled_insn_copies *= loop_info->n_iterations;
5009 /* A little slop to account for the ability to remove initialization
5010 code, better CSE, and other secondary benefits of completely
5011 unrolling some loops. */
5012 unrolled_insn_copies -= 1;
5014 /* Clamp the value. */
5015 if (unrolled_insn_copies < 0)
5016 unrolled_insn_copies = 0;
5019 /* Unroll loops from within strength reduction so that we can use the
5020 induction variable information that strength_reduce has already
5021 collected. Always unroll loops that would be as small or smaller
5022 unrolled than when rolled. */
5023 if ((flags & LOOP_UNROLL)
5024 || (loop_info->n_iterations > 0
5025 && unrolled_insn_copies <= insn_count))
5026 unroll_loop (loop, insn_count, end_insert_before, 1);
5028 #ifdef HAVE_decrement_and_branch_on_count
5029 /* Instrument the loop with BCT insn. */
5030 if (HAVE_decrement_and_branch_on_count && (flags & LOOP_BCT)
5031 && flag_branch_on_count_reg)
5033 #endif /* HAVE_decrement_and_branch_on_count */
5035 if (loop_dump_stream)
5036 fprintf (loop_dump_stream, "\n");
5039 VARRAY_FREE (reg_iv_type);
5040 VARRAY_FREE (reg_iv_info);
5041 free (reg_biv_class);
5046 /*Record all basic induction variables calculated in the insn. */
5048 check_insn_for_bivs (loop, p, not_every_iteration, maybe_multiple)
5051 int not_every_iteration;
5060 if (GET_CODE (p) == INSN
5061 && (set = single_set (p))
5062 && GET_CODE (SET_DEST (set)) == REG)
5064 dest_reg = SET_DEST (set);
5065 if (REGNO (dest_reg) < max_reg_before_loop
5066 && REGNO (dest_reg) >= FIRST_PSEUDO_REGISTER
5067 && REG_IV_TYPE (REGNO (dest_reg)) != NOT_BASIC_INDUCT)
5069 if (basic_induction_var (loop, SET_SRC (set),
5070 GET_MODE (SET_SRC (set)),
5071 dest_reg, p, &inc_val, &mult_val,
5074 /* It is a possible basic induction variable.
5075 Create and initialize an induction structure for it. */
5078 = (struct induction *) oballoc (sizeof (struct induction));
5080 record_biv (v, p, dest_reg, inc_val, mult_val, location,
5081 not_every_iteration, maybe_multiple);
5082 REG_IV_TYPE (REGNO (dest_reg)) = BASIC_INDUCT;
5084 else if (REGNO (dest_reg) < max_reg_before_loop)
5085 REG_IV_TYPE (REGNO (dest_reg)) = NOT_BASIC_INDUCT;
5091 /* Record all givs calculated in the insn.
5092 A register is a giv if: it is only set once, it is a function of a
5093 biv and a constant (or invariant), and it is not a biv. */
5095 check_insn_for_givs (loop, p, not_every_iteration, maybe_multiple)
5098 int not_every_iteration;
5102 /* Look for a general induction variable in a register. */
5103 if (GET_CODE (p) == INSN
5104 && (set = single_set (p))
5105 && GET_CODE (SET_DEST (set)) == REG
5106 && ! VARRAY_CHAR (may_not_optimize, REGNO (SET_DEST (set))))
5114 rtx last_consec_insn;
5116 dest_reg = SET_DEST (set);
5117 if (REGNO (dest_reg) < FIRST_PSEUDO_REGISTER)
5120 if (/* SET_SRC is a giv. */
5121 (general_induction_var (loop, SET_SRC (set), &src_reg, &add_val,
5122 &mult_val, 0, &benefit, VOIDmode)
5123 /* Equivalent expression is a giv. */
5124 || ((regnote = find_reg_note (p, REG_EQUAL, NULL_RTX))
5125 && general_induction_var (loop, XEXP (regnote, 0), &src_reg,
5126 &add_val, &mult_val, 0,
5127 &benefit, VOIDmode)))
5128 /* Don't try to handle any regs made by loop optimization.
5129 We have nothing on them in regno_first_uid, etc. */
5130 && REGNO (dest_reg) < max_reg_before_loop
5131 /* Don't recognize a BASIC_INDUCT_VAR here. */
5132 && dest_reg != src_reg
5133 /* This must be the only place where the register is set. */
5134 && (VARRAY_INT (n_times_set, REGNO (dest_reg)) == 1
5135 /* or all sets must be consecutive and make a giv. */
5136 || (benefit = consec_sets_giv (loop, benefit, p,
5138 &add_val, &mult_val,
5139 &last_consec_insn))))
5142 = (struct induction *) oballoc (sizeof (struct induction));
5144 /* If this is a library call, increase benefit. */
5145 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
5146 benefit += libcall_benefit (p);
5148 /* Skip the consecutive insns, if there are any. */
5149 if (VARRAY_INT (n_times_set, REGNO (dest_reg)) != 1)
5150 p = last_consec_insn;
5152 record_giv (loop, v, p, src_reg, dest_reg, mult_val, add_val,
5153 benefit, DEST_REG, not_every_iteration,
5154 maybe_multiple, NULL_PTR);
5159 #ifndef DONT_REDUCE_ADDR
5160 /* Look for givs which are memory addresses. */
5161 /* This resulted in worse code on a VAX 8600. I wonder if it
5163 if (GET_CODE (p) == INSN)
5164 find_mem_givs (loop, PATTERN (p), p, not_every_iteration,
5168 /* Update the status of whether giv can derive other givs. This can
5169 change when we pass a label or an insn that updates a biv. */
5170 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
5171 || GET_CODE (p) == CODE_LABEL)
5172 update_giv_derive (loop, p);
5176 /* Return 1 if X is a valid source for an initial value (or as value being
5177 compared against in an initial test).
5179 X must be either a register or constant and must not be clobbered between
5180 the current insn and the start of the loop.
5182 INSN is the insn containing X. */
5185 valid_initial_value_p (x, insn, call_seen, loop_start)
5194 /* Only consider pseudos we know about initialized in insns whose luids
5196 if (GET_CODE (x) != REG
5197 || REGNO (x) >= max_reg_before_loop)
5200 /* Don't use call-clobbered registers across a call which clobbers it. On
5201 some machines, don't use any hard registers at all. */
5202 if (REGNO (x) < FIRST_PSEUDO_REGISTER
5203 && (SMALL_REGISTER_CLASSES
5204 || (call_used_regs[REGNO (x)] && call_seen)))
5207 /* Don't use registers that have been clobbered before the start of the
5209 if (reg_set_between_p (x, insn, loop_start))
5215 /* Scan X for memory refs and check each memory address
5216 as a possible giv. INSN is the insn whose pattern X comes from.
5217 NOT_EVERY_ITERATION is 1 if the insn might not be executed during
5218 every loop iteration. MAYBE_MULTIPLE is 1 if the insn might be executed
5219 more thanonce in each loop iteration. */
5222 find_mem_givs (loop, x, insn, not_every_iteration, maybe_multiple)
5223 const struct loop *loop;
5226 int not_every_iteration, maybe_multiple;
5229 register enum rtx_code code;
5230 register const char *fmt;
5235 code = GET_CODE (x);
5259 /* This code used to disable creating GIVs with mult_val == 1 and
5260 add_val == 0. However, this leads to lost optimizations when
5261 it comes time to combine a set of related DEST_ADDR GIVs, since
5262 this one would not be seen. */
5264 if (general_induction_var (loop, XEXP (x, 0), &src_reg, &add_val,
5265 &mult_val, 1, &benefit, GET_MODE (x)))
5267 /* Found one; record it. */
5269 = (struct induction *) oballoc (sizeof (struct induction));
5271 record_giv (loop, v, insn, src_reg, addr_placeholder, mult_val,
5272 add_val, benefit, DEST_ADDR, not_every_iteration,
5273 maybe_multiple, &XEXP (x, 0));
5275 v->mem_mode = GET_MODE (x);
5284 /* Recursively scan the subexpressions for other mem refs. */
5286 fmt = GET_RTX_FORMAT (code);
5287 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5289 find_mem_givs (loop, XEXP (x, i), insn, not_every_iteration,
5291 else if (fmt[i] == 'E')
5292 for (j = 0; j < XVECLEN (x, i); j++)
5293 find_mem_givs (loop, XVECEXP (x, i, j), insn, not_every_iteration,
5297 /* Fill in the data about one biv update.
5298 V is the `struct induction' in which we record the biv. (It is
5299 allocated by the caller, with alloca.)
5300 INSN is the insn that sets it.
5301 DEST_REG is the biv's reg.
5303 MULT_VAL is const1_rtx if the biv is being incremented here, in which case
5304 INC_VAL is the increment. Otherwise, MULT_VAL is const0_rtx and the biv is
5305 being set to INC_VAL.
5307 NOT_EVERY_ITERATION is nonzero if this biv update is not know to be
5308 executed every iteration; MAYBE_MULTIPLE is nonzero if this biv update
5309 can be executed more than once per iteration. If MAYBE_MULTIPLE
5310 and NOT_EVERY_ITERATION are both zero, we know that the biv update is
5311 executed exactly once per iteration. */
5314 record_biv (v, insn, dest_reg, inc_val, mult_val, location,
5315 not_every_iteration, maybe_multiple)
5316 struct induction *v;
5322 int not_every_iteration;
5325 struct iv_class *bl;
5328 v->src_reg = dest_reg;
5329 v->dest_reg = dest_reg;
5330 v->mult_val = mult_val;
5331 v->add_val = inc_val;
5332 v->location = location;
5333 v->mode = GET_MODE (dest_reg);
5334 v->always_computable = ! not_every_iteration;
5335 v->always_executed = ! not_every_iteration;
5336 v->maybe_multiple = maybe_multiple;
5338 /* Add this to the reg's iv_class, creating a class
5339 if this is the first incrementation of the reg. */
5341 bl = reg_biv_class[REGNO (dest_reg)];
5344 /* Create and initialize new iv_class. */
5346 bl = (struct iv_class *) oballoc (sizeof (struct iv_class));
5348 bl->regno = REGNO (dest_reg);
5354 /* Set initial value to the reg itself. */
5355 bl->initial_value = dest_reg;
5356 /* We haven't seen the initializing insn yet */
5359 bl->initial_test = 0;
5360 bl->incremented = 0;
5364 bl->total_benefit = 0;
5366 /* Add this class to loop_iv_list. */
5367 bl->next = loop_iv_list;
5370 /* Put it in the array of biv register classes. */
5371 reg_biv_class[REGNO (dest_reg)] = bl;
5374 /* Update IV_CLASS entry for this biv. */
5375 v->next_iv = bl->biv;
5378 if (mult_val == const1_rtx)
5379 bl->incremented = 1;
5381 if (loop_dump_stream)
5383 fprintf (loop_dump_stream,
5384 "Insn %d: possible biv, reg %d,",
5385 INSN_UID (insn), REGNO (dest_reg));
5386 if (GET_CODE (inc_val) == CONST_INT)
5388 fprintf (loop_dump_stream, " const =");
5389 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, INTVAL (inc_val));
5390 fputc ('\n', loop_dump_stream);
5394 fprintf (loop_dump_stream, " const = ");
5395 print_rtl (loop_dump_stream, inc_val);
5396 fprintf (loop_dump_stream, "\n");
5401 /* Fill in the data about one giv.
5402 V is the `struct induction' in which we record the giv. (It is
5403 allocated by the caller, with alloca.)
5404 INSN is the insn that sets it.
5405 BENEFIT estimates the savings from deleting this insn.
5406 TYPE is DEST_REG or DEST_ADDR; it says whether the giv is computed
5407 into a register or is used as a memory address.
5409 SRC_REG is the biv reg which the giv is computed from.
5410 DEST_REG is the giv's reg (if the giv is stored in a reg).
5411 MULT_VAL and ADD_VAL are the coefficients used to compute the giv.
5412 LOCATION points to the place where this giv's value appears in INSN. */
5415 record_giv (loop, v, insn, src_reg, dest_reg, mult_val, add_val, benefit,
5416 type, not_every_iteration, maybe_multiple, location)
5417 const struct loop *loop;
5418 struct induction *v;
5422 rtx mult_val, add_val;
5425 int not_every_iteration, maybe_multiple;
5428 struct induction *b;
5429 struct iv_class *bl;
5430 rtx set = single_set (insn);
5433 /* Attempt to prove constantness of the values. */
5434 temp = simplify_rtx (add_val);
5439 v->src_reg = src_reg;
5441 v->dest_reg = dest_reg;
5442 v->mult_val = mult_val;
5443 v->add_val = add_val;
5444 v->benefit = benefit;
5445 v->location = location;
5447 v->combined_with = 0;
5448 v->maybe_multiple = maybe_multiple;
5450 v->derive_adjustment = 0;
5456 v->auto_inc_opt = 0;
5459 v->derived_from = 0;
5462 /* The v->always_computable field is used in update_giv_derive, to
5463 determine whether a giv can be used to derive another giv. For a
5464 DEST_REG giv, INSN computes a new value for the giv, so its value
5465 isn't computable if INSN insn't executed every iteration.
5466 However, for a DEST_ADDR giv, INSN merely uses the value of the giv;
5467 it does not compute a new value. Hence the value is always computable
5468 regardless of whether INSN is executed each iteration. */
5470 if (type == DEST_ADDR)
5471 v->always_computable = 1;
5473 v->always_computable = ! not_every_iteration;
5475 v->always_executed = ! not_every_iteration;
5477 if (type == DEST_ADDR)
5479 v->mode = GET_MODE (*location);
5482 else /* type == DEST_REG */
5484 v->mode = GET_MODE (SET_DEST (set));
5486 v->lifetime = (uid_luid[REGNO_LAST_UID (REGNO (dest_reg))]
5487 - uid_luid[REGNO_FIRST_UID (REGNO (dest_reg))]);
5489 /* If the lifetime is zero, it means that this register is
5490 really a dead store. So mark this as a giv that can be
5491 ignored. This will not prevent the biv from being eliminated. */
5492 if (v->lifetime == 0)
5495 REG_IV_TYPE (REGNO (dest_reg)) = GENERAL_INDUCT;
5496 REG_IV_INFO (REGNO (dest_reg)) = v;
5499 /* Add the giv to the class of givs computed from one biv. */
5501 bl = reg_biv_class[REGNO (src_reg)];
5504 v->next_iv = bl->giv;
5506 /* Don't count DEST_ADDR. This is supposed to count the number of
5507 insns that calculate givs. */
5508 if (type == DEST_REG)
5510 bl->total_benefit += benefit;
5513 /* Fatal error, biv missing for this giv? */
5516 if (type == DEST_ADDR)
5520 /* The giv can be replaced outright by the reduced register only if all
5521 of the following conditions are true:
5522 - the insn that sets the giv is always executed on any iteration
5523 on which the giv is used at all
5524 (there are two ways to deduce this:
5525 either the insn is executed on every iteration,
5526 or all uses follow that insn in the same basic block),
5527 - the giv is not used outside the loop
5528 - no assignments to the biv occur during the giv's lifetime. */
5530 if (REGNO_FIRST_UID (REGNO (dest_reg)) == INSN_UID (insn)
5531 /* Previous line always fails if INSN was moved by loop opt. */
5532 && uid_luid[REGNO_LAST_UID (REGNO (dest_reg))]
5533 < INSN_LUID (loop->end)
5534 && (! not_every_iteration
5535 || last_use_this_basic_block (dest_reg, insn)))
5537 /* Now check that there are no assignments to the biv within the
5538 giv's lifetime. This requires two separate checks. */
5540 /* Check each biv update, and fail if any are between the first
5541 and last use of the giv.
5543 If this loop contains an inner loop that was unrolled, then
5544 the insn modifying the biv may have been emitted by the loop
5545 unrolling code, and hence does not have a valid luid. Just
5546 mark the biv as not replaceable in this case. It is not very
5547 useful as a biv, because it is used in two different loops.
5548 It is very unlikely that we would be able to optimize the giv
5549 using this biv anyways. */
5552 for (b = bl->biv; b; b = b->next_iv)
5554 if (INSN_UID (b->insn) >= max_uid_for_loop
5555 || ((uid_luid[INSN_UID (b->insn)]
5556 >= uid_luid[REGNO_FIRST_UID (REGNO (dest_reg))])
5557 && (uid_luid[INSN_UID (b->insn)]
5558 <= uid_luid[REGNO_LAST_UID (REGNO (dest_reg))])))
5561 v->not_replaceable = 1;
5566 /* If there are any backwards branches that go from after the
5567 biv update to before it, then this giv is not replaceable. */
5569 for (b = bl->biv; b; b = b->next_iv)
5570 if (back_branch_in_range_p (loop, b->insn))
5573 v->not_replaceable = 1;
5579 /* May still be replaceable, we don't have enough info here to
5582 v->not_replaceable = 0;
5586 /* Record whether the add_val contains a const_int, for later use by
5591 v->no_const_addval = 1;
5592 if (tem == const0_rtx)
5594 else if (CONSTANT_P (add_val))
5595 v->no_const_addval = 0;
5596 if (GET_CODE (tem) == PLUS)
5600 if (GET_CODE (XEXP (tem, 0)) == PLUS)
5601 tem = XEXP (tem, 0);
5602 else if (GET_CODE (XEXP (tem, 1)) == PLUS)
5603 tem = XEXP (tem, 1);
5607 if (CONSTANT_P (XEXP (tem, 1)))
5608 v->no_const_addval = 0;
5612 if (loop_dump_stream)
5614 if (type == DEST_REG)
5615 fprintf (loop_dump_stream, "Insn %d: giv reg %d",
5616 INSN_UID (insn), REGNO (dest_reg));
5618 fprintf (loop_dump_stream, "Insn %d: dest address",
5621 fprintf (loop_dump_stream, " src reg %d benefit %d",
5622 REGNO (src_reg), v->benefit);
5623 fprintf (loop_dump_stream, " lifetime %d",
5627 fprintf (loop_dump_stream, " replaceable");
5629 if (v->no_const_addval)
5630 fprintf (loop_dump_stream, " ncav");
5632 if (GET_CODE (mult_val) == CONST_INT)
5634 fprintf (loop_dump_stream, " mult ");
5635 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, INTVAL (mult_val));
5639 fprintf (loop_dump_stream, " mult ");
5640 print_rtl (loop_dump_stream, mult_val);
5643 if (GET_CODE (add_val) == CONST_INT)
5645 fprintf (loop_dump_stream, " add ");
5646 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, INTVAL (add_val));
5650 fprintf (loop_dump_stream, " add ");
5651 print_rtl (loop_dump_stream, add_val);
5655 if (loop_dump_stream)
5656 fprintf (loop_dump_stream, "\n");
5661 /* All this does is determine whether a giv can be made replaceable because
5662 its final value can be calculated. This code can not be part of record_giv
5663 above, because final_giv_value requires that the number of loop iterations
5664 be known, and that can not be accurately calculated until after all givs
5665 have been identified. */
5668 check_final_value (loop, v)
5669 const struct loop *loop;
5670 struct induction *v;
5672 struct iv_class *bl;
5673 rtx final_value = 0;
5675 bl = reg_biv_class[REGNO (v->src_reg)];
5677 /* DEST_ADDR givs will never reach here, because they are always marked
5678 replaceable above in record_giv. */
5680 /* The giv can be replaced outright by the reduced register only if all
5681 of the following conditions are true:
5682 - the insn that sets the giv is always executed on any iteration
5683 on which the giv is used at all
5684 (there are two ways to deduce this:
5685 either the insn is executed on every iteration,
5686 or all uses follow that insn in the same basic block),
5687 - its final value can be calculated (this condition is different
5688 than the one above in record_giv)
5689 - no assignments to the biv occur during the giv's lifetime. */
5692 /* This is only called now when replaceable is known to be false. */
5693 /* Clear replaceable, so that it won't confuse final_giv_value. */
5697 if ((final_value = final_giv_value (loop, v))
5698 && (v->always_computable || last_use_this_basic_block (v->dest_reg, v->insn)))
5700 int biv_increment_seen = 0;
5706 /* When trying to determine whether or not a biv increment occurs
5707 during the lifetime of the giv, we can ignore uses of the variable
5708 outside the loop because final_value is true. Hence we can not
5709 use regno_last_uid and regno_first_uid as above in record_giv. */
5711 /* Search the loop to determine whether any assignments to the
5712 biv occur during the giv's lifetime. Start with the insn
5713 that sets the giv, and search around the loop until we come
5714 back to that insn again.
5716 Also fail if there is a jump within the giv's lifetime that jumps
5717 to somewhere outside the lifetime but still within the loop. This
5718 catches spaghetti code where the execution order is not linear, and
5719 hence the above test fails. Here we assume that the giv lifetime
5720 does not extend from one iteration of the loop to the next, so as
5721 to make the test easier. Since the lifetime isn't known yet,
5722 this requires two loops. See also record_giv above. */
5724 last_giv_use = v->insn;
5730 p = NEXT_INSN (loop->start);
5734 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
5735 || GET_CODE (p) == CALL_INSN)
5737 if (biv_increment_seen)
5739 if (reg_mentioned_p (v->dest_reg, PATTERN (p)))
5742 v->not_replaceable = 1;
5746 else if (reg_set_p (v->src_reg, PATTERN (p)))
5747 biv_increment_seen = 1;
5748 else if (reg_mentioned_p (v->dest_reg, PATTERN (p)))
5753 /* Now that the lifetime of the giv is known, check for branches
5754 from within the lifetime to outside the lifetime if it is still
5764 p = NEXT_INSN (loop->start);
5765 if (p == last_giv_use)
5768 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p)
5769 && LABEL_NAME (JUMP_LABEL (p))
5770 && ((loop_insn_first_p (JUMP_LABEL (p), v->insn)
5771 && loop_insn_first_p (loop->start, JUMP_LABEL (p)))
5772 || (loop_insn_first_p (last_giv_use, JUMP_LABEL (p))
5773 && loop_insn_first_p (JUMP_LABEL (p), loop->end))))
5776 v->not_replaceable = 1;
5778 if (loop_dump_stream)
5779 fprintf (loop_dump_stream,
5780 "Found branch outside giv lifetime.\n");
5787 /* If it is replaceable, then save the final value. */
5789 v->final_value = final_value;
5792 if (loop_dump_stream && v->replaceable)
5793 fprintf (loop_dump_stream, "Insn %d: giv reg %d final_value replaceable\n",
5794 INSN_UID (v->insn), REGNO (v->dest_reg));
5797 /* Update the status of whether a giv can derive other givs.
5799 We need to do something special if there is or may be an update to the biv
5800 between the time the giv is defined and the time it is used to derive
5803 In addition, a giv that is only conditionally set is not allowed to
5804 derive another giv once a label has been passed.
5806 The cases we look at are when a label or an update to a biv is passed. */
5809 update_giv_derive (loop, p)
5810 const struct loop *loop;
5813 struct iv_class *bl;
5814 struct induction *biv, *giv;
5818 /* Search all IV classes, then all bivs, and finally all givs.
5820 There are three cases we are concerned with. First we have the situation
5821 of a giv that is only updated conditionally. In that case, it may not
5822 derive any givs after a label is passed.
5824 The second case is when a biv update occurs, or may occur, after the
5825 definition of a giv. For certain biv updates (see below) that are
5826 known to occur between the giv definition and use, we can adjust the
5827 giv definition. For others, or when the biv update is conditional,
5828 we must prevent the giv from deriving any other givs. There are two
5829 sub-cases within this case.
5831 If this is a label, we are concerned with any biv update that is done
5832 conditionally, since it may be done after the giv is defined followed by
5833 a branch here (actually, we need to pass both a jump and a label, but
5834 this extra tracking doesn't seem worth it).
5836 If this is a jump, we are concerned about any biv update that may be
5837 executed multiple times. We are actually only concerned about
5838 backward jumps, but it is probably not worth performing the test
5839 on the jump again here.
5841 If this is a biv update, we must adjust the giv status to show that a
5842 subsequent biv update was performed. If this adjustment cannot be done,
5843 the giv cannot derive further givs. */
5845 for (bl = loop_iv_list; bl; bl = bl->next)
5846 for (biv = bl->biv; biv; biv = biv->next_iv)
5847 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN
5850 for (giv = bl->giv; giv; giv = giv->next_iv)
5852 /* If cant_derive is already true, there is no point in
5853 checking all of these conditions again. */
5854 if (giv->cant_derive)
5857 /* If this giv is conditionally set and we have passed a label,
5858 it cannot derive anything. */
5859 if (GET_CODE (p) == CODE_LABEL && ! giv->always_computable)
5860 giv->cant_derive = 1;
5862 /* Skip givs that have mult_val == 0, since
5863 they are really invariants. Also skip those that are
5864 replaceable, since we know their lifetime doesn't contain
5866 else if (giv->mult_val == const0_rtx || giv->replaceable)
5869 /* The only way we can allow this giv to derive another
5870 is if this is a biv increment and we can form the product
5871 of biv->add_val and giv->mult_val. In this case, we will
5872 be able to compute a compensation. */
5873 else if (biv->insn == p)
5877 if (biv->mult_val == const1_rtx)
5878 tem = simplify_giv_expr (loop,
5879 gen_rtx_MULT (giv->mode,
5884 if (tem && giv->derive_adjustment)
5885 tem = simplify_giv_expr
5887 gen_rtx_PLUS (giv->mode, tem, giv->derive_adjustment),
5891 giv->derive_adjustment = tem;
5893 giv->cant_derive = 1;
5895 else if ((GET_CODE (p) == CODE_LABEL && ! biv->always_computable)
5896 || (GET_CODE (p) == JUMP_INSN && biv->maybe_multiple))
5897 giv->cant_derive = 1;
5902 /* Check whether an insn is an increment legitimate for a basic induction var.
5903 X is the source of insn P, or a part of it.
5904 MODE is the mode in which X should be interpreted.
5906 DEST_REG is the putative biv, also the destination of the insn.
5907 We accept patterns of these forms:
5908 REG = REG + INVARIANT (includes REG = REG - CONSTANT)
5909 REG = INVARIANT + REG
5911 If X is suitable, we return 1, set *MULT_VAL to CONST1_RTX,
5912 store the additive term into *INC_VAL, and store the place where
5913 we found the additive term into *LOCATION.
5915 If X is an assignment of an invariant into DEST_REG, we set
5916 *MULT_VAL to CONST0_RTX, and store the invariant into *INC_VAL.
5918 We also want to detect a BIV when it corresponds to a variable
5919 whose mode was promoted via PROMOTED_MODE. In that case, an increment
5920 of the variable may be a PLUS that adds a SUBREG of that variable to
5921 an invariant and then sign- or zero-extends the result of the PLUS
5924 Most GIVs in such cases will be in the promoted mode, since that is the
5925 probably the natural computation mode (and almost certainly the mode
5926 used for addresses) on the machine. So we view the pseudo-reg containing
5927 the variable as the BIV, as if it were simply incremented.
5929 Note that treating the entire pseudo as a BIV will result in making
5930 simple increments to any GIVs based on it. However, if the variable
5931 overflows in its declared mode but not its promoted mode, the result will
5932 be incorrect. This is acceptable if the variable is signed, since
5933 overflows in such cases are undefined, but not if it is unsigned, since
5934 those overflows are defined. So we only check for SIGN_EXTEND and
5937 If we cannot find a biv, we return 0. */
5940 basic_induction_var (loop, x, mode, dest_reg, p, inc_val, mult_val, location)
5941 const struct loop *loop;
5943 enum machine_mode mode;
5950 register enum rtx_code code;
5954 code = GET_CODE (x);
5959 if (rtx_equal_p (XEXP (x, 0), dest_reg)
5960 || (GET_CODE (XEXP (x, 0)) == SUBREG
5961 && SUBREG_PROMOTED_VAR_P (XEXP (x, 0))
5962 && SUBREG_REG (XEXP (x, 0)) == dest_reg))
5964 argp = &XEXP (x, 1);
5966 else if (rtx_equal_p (XEXP (x, 1), dest_reg)
5967 || (GET_CODE (XEXP (x, 1)) == SUBREG
5968 && SUBREG_PROMOTED_VAR_P (XEXP (x, 1))
5969 && SUBREG_REG (XEXP (x, 1)) == dest_reg))
5971 argp = &XEXP (x, 0);
5977 if (loop_invariant_p (loop, arg) != 1)
5980 *inc_val = convert_modes (GET_MODE (dest_reg), GET_MODE (x), arg, 0);
5981 *mult_val = const1_rtx;
5986 /* If this is a SUBREG for a promoted variable, check the inner
5988 if (SUBREG_PROMOTED_VAR_P (x))
5989 return basic_induction_var (loop, SUBREG_REG (x),
5990 GET_MODE (SUBREG_REG (x)),
5991 dest_reg, p, inc_val, mult_val, location);
5995 /* If this register is assigned in a previous insn, look at its
5996 source, but don't go outside the loop or past a label. */
5998 /* If this sets a register to itself, we would repeat any previous
5999 biv increment if we applied this strategy blindly. */
6000 if (rtx_equal_p (dest_reg, x))
6007 insn = PREV_INSN (insn);
6008 } while (insn && GET_CODE (insn) == NOTE
6009 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG);
6013 set = single_set (insn);
6017 if ((SET_DEST (set) == x
6018 || (GET_CODE (SET_DEST (set)) == SUBREG
6019 && (GET_MODE_SIZE (GET_MODE (SET_DEST (set)))
6021 && (GET_MODE_CLASS (GET_MODE (SET_DEST (set)))
6023 && SUBREG_REG (SET_DEST (set)) == x))
6024 && basic_induction_var (loop, SET_SRC (set),
6025 (GET_MODE (SET_SRC (set)) == VOIDmode
6027 : GET_MODE (SET_SRC (set))),
6029 inc_val, mult_val, location))
6032 /* ... fall through ... */
6034 /* Can accept constant setting of biv only when inside inner most loop.
6035 Otherwise, a biv of an inner loop may be incorrectly recognized
6036 as a biv of the outer loop,
6037 causing code to be moved INTO the inner loop. */
6039 if (loop_invariant_p (loop, x) != 1)
6044 /* convert_modes aborts if we try to convert to or from CCmode, so just
6045 exclude that case. It is very unlikely that a condition code value
6046 would be a useful iterator anyways. */
6047 if (loop->level == 1
6048 && GET_MODE_CLASS (mode) != MODE_CC
6049 && GET_MODE_CLASS (GET_MODE (dest_reg)) != MODE_CC)
6051 /* Possible bug here? Perhaps we don't know the mode of X. */
6052 *inc_val = convert_modes (GET_MODE (dest_reg), mode, x, 0);
6053 *mult_val = const0_rtx;
6060 return basic_induction_var (loop, XEXP (x, 0), GET_MODE (XEXP (x, 0)),
6061 dest_reg, p, inc_val, mult_val, location);
6064 /* Similar, since this can be a sign extension. */
6065 for (insn = PREV_INSN (p);
6066 (insn && GET_CODE (insn) == NOTE
6067 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG);
6068 insn = PREV_INSN (insn))
6072 set = single_set (insn);
6074 if (! rtx_equal_p (dest_reg, XEXP (x, 0))
6075 && set && SET_DEST (set) == XEXP (x, 0)
6076 && GET_CODE (XEXP (x, 1)) == CONST_INT
6077 && INTVAL (XEXP (x, 1)) >= 0
6078 && GET_CODE (SET_SRC (set)) == ASHIFT
6079 && XEXP (x, 1) == XEXP (SET_SRC (set), 1))
6080 return basic_induction_var (loop, XEXP (SET_SRC (set), 0),
6081 GET_MODE (XEXP (x, 0)),
6082 dest_reg, insn, inc_val, mult_val,
6091 /* A general induction variable (giv) is any quantity that is a linear
6092 function of a basic induction variable,
6093 i.e. giv = biv * mult_val + add_val.
6094 The coefficients can be any loop invariant quantity.
6095 A giv need not be computed directly from the biv;
6096 it can be computed by way of other givs. */
6098 /* Determine whether X computes a giv.
6099 If it does, return a nonzero value
6100 which is the benefit from eliminating the computation of X;
6101 set *SRC_REG to the register of the biv that it is computed from;
6102 set *ADD_VAL and *MULT_VAL to the coefficients,
6103 such that the value of X is biv * mult + add; */
6106 general_induction_var (loop, x, src_reg, add_val, mult_val, is_addr,
6107 pbenefit, addr_mode)
6108 const struct loop *loop;
6115 enum machine_mode addr_mode;
6120 /* If this is an invariant, forget it, it isn't a giv. */
6121 if (loop_invariant_p (loop, x) == 1)
6124 /* See if the expression could be a giv and get its form.
6125 Mark our place on the obstack in case we don't find a giv. */
6126 storage = (char *) oballoc (0);
6128 x = simplify_giv_expr (loop, x, pbenefit);
6135 switch (GET_CODE (x))
6139 /* Since this is now an invariant and wasn't before, it must be a giv
6140 with MULT_VAL == 0. It doesn't matter which BIV we associate this
6142 *src_reg = loop_iv_list->biv->dest_reg;
6143 *mult_val = const0_rtx;
6148 /* This is equivalent to a BIV. */
6150 *mult_val = const1_rtx;
6151 *add_val = const0_rtx;
6155 /* Either (plus (biv) (invar)) or
6156 (plus (mult (biv) (invar_1)) (invar_2)). */
6157 if (GET_CODE (XEXP (x, 0)) == MULT)
6159 *src_reg = XEXP (XEXP (x, 0), 0);
6160 *mult_val = XEXP (XEXP (x, 0), 1);
6164 *src_reg = XEXP (x, 0);
6165 *mult_val = const1_rtx;
6167 *add_val = XEXP (x, 1);
6171 /* ADD_VAL is zero. */
6172 *src_reg = XEXP (x, 0);
6173 *mult_val = XEXP (x, 1);
6174 *add_val = const0_rtx;
6181 /* Remove any enclosing USE from ADD_VAL and MULT_VAL (there will be
6182 unless they are CONST_INT). */
6183 if (GET_CODE (*add_val) == USE)
6184 *add_val = XEXP (*add_val, 0);
6185 if (GET_CODE (*mult_val) == USE)
6186 *mult_val = XEXP (*mult_val, 0);
6189 *pbenefit += address_cost (orig_x, addr_mode) - reg_address_cost;
6191 *pbenefit += rtx_cost (orig_x, SET);
6193 /* Always return true if this is a giv so it will be detected as such,
6194 even if the benefit is zero or negative. This allows elimination
6195 of bivs that might otherwise not be eliminated. */
6199 /* Given an expression, X, try to form it as a linear function of a biv.
6200 We will canonicalize it to be of the form
6201 (plus (mult (BIV) (invar_1))
6203 with possible degeneracies.
6205 The invariant expressions must each be of a form that can be used as a
6206 machine operand. We surround then with a USE rtx (a hack, but localized
6207 and certainly unambiguous!) if not a CONST_INT for simplicity in this
6208 routine; it is the caller's responsibility to strip them.
6210 If no such canonicalization is possible (i.e., two biv's are used or an
6211 expression that is neither invariant nor a biv or giv), this routine
6214 For a non-zero return, the result will have a code of CONST_INT, USE,
6215 REG (for a BIV), PLUS, or MULT. No other codes will occur.
6217 *BENEFIT will be incremented by the benefit of any sub-giv encountered. */
6219 static rtx sge_plus PARAMS ((enum machine_mode, rtx, rtx));
6220 static rtx sge_plus_constant PARAMS ((rtx, rtx));
6221 static int cmp_combine_givs_stats PARAMS ((const PTR, const PTR));
6222 static int cmp_recombine_givs_stats PARAMS ((const PTR, const PTR));
6225 simplify_giv_expr (loop, x, benefit)
6226 const struct loop *loop;
6230 enum machine_mode mode = GET_MODE (x);
6234 /* If this is not an integer mode, or if we cannot do arithmetic in this
6235 mode, this can't be a giv. */
6236 if (mode != VOIDmode
6237 && (GET_MODE_CLASS (mode) != MODE_INT
6238 || GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT))
6241 switch (GET_CODE (x))
6244 arg0 = simplify_giv_expr (loop, XEXP (x, 0), benefit);
6245 arg1 = simplify_giv_expr (loop, XEXP (x, 1), benefit);
6246 if (arg0 == 0 || arg1 == 0)
6249 /* Put constant last, CONST_INT last if both constant. */
6250 if ((GET_CODE (arg0) == USE
6251 || GET_CODE (arg0) == CONST_INT)
6252 && ! ((GET_CODE (arg0) == USE
6253 && GET_CODE (arg1) == USE)
6254 || GET_CODE (arg1) == CONST_INT))
6255 tem = arg0, arg0 = arg1, arg1 = tem;
6257 /* Handle addition of zero, then addition of an invariant. */
6258 if (arg1 == const0_rtx)
6260 else if (GET_CODE (arg1) == CONST_INT || GET_CODE (arg1) == USE)
6261 switch (GET_CODE (arg0))
6265 /* Adding two invariants must result in an invariant, so enclose
6266 addition operation inside a USE and return it. */
6267 if (GET_CODE (arg0) == USE)
6268 arg0 = XEXP (arg0, 0);
6269 if (GET_CODE (arg1) == USE)
6270 arg1 = XEXP (arg1, 0);
6272 if (GET_CODE (arg0) == CONST_INT)
6273 tem = arg0, arg0 = arg1, arg1 = tem;
6274 if (GET_CODE (arg1) == CONST_INT)
6275 tem = sge_plus_constant (arg0, arg1);
6277 tem = sge_plus (mode, arg0, arg1);
6279 if (GET_CODE (tem) != CONST_INT)
6280 tem = gen_rtx_USE (mode, tem);
6285 /* biv + invar or mult + invar. Return sum. */
6286 return gen_rtx_PLUS (mode, arg0, arg1);
6289 /* (a + invar_1) + invar_2. Associate. */
6291 simplify_giv_expr (loop,
6303 /* Each argument must be either REG, PLUS, or MULT. Convert REG to
6304 MULT to reduce cases. */
6305 if (GET_CODE (arg0) == REG)
6306 arg0 = gen_rtx_MULT (mode, arg0, const1_rtx);
6307 if (GET_CODE (arg1) == REG)
6308 arg1 = gen_rtx_MULT (mode, arg1, const1_rtx);
6310 /* Now have PLUS + PLUS, PLUS + MULT, MULT + PLUS, or MULT + MULT.
6311 Put a MULT first, leaving PLUS + PLUS, MULT + PLUS, or MULT + MULT.
6312 Recurse to associate the second PLUS. */
6313 if (GET_CODE (arg1) == MULT)
6314 tem = arg0, arg0 = arg1, arg1 = tem;
6316 if (GET_CODE (arg1) == PLUS)
6318 simplify_giv_expr (loop,
6320 gen_rtx_PLUS (mode, arg0,
6325 /* Now must have MULT + MULT. Distribute if same biv, else not giv. */
6326 if (GET_CODE (arg0) != MULT || GET_CODE (arg1) != MULT)
6329 if (!rtx_equal_p (arg0, arg1))
6332 return simplify_giv_expr (loop,
6341 /* Handle "a - b" as "a + b * (-1)". */
6342 return simplify_giv_expr (loop,
6351 arg0 = simplify_giv_expr (loop, XEXP (x, 0), benefit);
6352 arg1 = simplify_giv_expr (loop, XEXP (x, 1), benefit);
6353 if (arg0 == 0 || arg1 == 0)
6356 /* Put constant last, CONST_INT last if both constant. */
6357 if ((GET_CODE (arg0) == USE || GET_CODE (arg0) == CONST_INT)
6358 && GET_CODE (arg1) != CONST_INT)
6359 tem = arg0, arg0 = arg1, arg1 = tem;
6361 /* If second argument is not now constant, not giv. */
6362 if (GET_CODE (arg1) != USE && GET_CODE (arg1) != CONST_INT)
6365 /* Handle multiply by 0 or 1. */
6366 if (arg1 == const0_rtx)
6369 else if (arg1 == const1_rtx)
6372 switch (GET_CODE (arg0))
6375 /* biv * invar. Done. */
6376 return gen_rtx_MULT (mode, arg0, arg1);
6379 /* Product of two constants. */
6380 return GEN_INT (INTVAL (arg0) * INTVAL (arg1));
6383 /* invar * invar is a giv, but attempt to simplify it somehow. */
6384 if (GET_CODE (arg1) != CONST_INT)
6387 arg0 = XEXP (arg0, 0);
6388 if (GET_CODE (arg0) == MULT)
6390 /* (invar_0 * invar_1) * invar_2. Associate. */
6391 return simplify_giv_expr (loop,
6400 /* Porpagate the MULT expressions to the intermost nodes. */
6401 else if (GET_CODE (arg0) == PLUS)
6403 /* (invar_0 + invar_1) * invar_2. Distribute. */
6404 return simplify_giv_expr (loop,
6416 return gen_rtx_USE (mode, gen_rtx_MULT (mode, arg0, arg1));
6419 /* (a * invar_1) * invar_2. Associate. */
6420 return simplify_giv_expr (loop,
6429 /* (a + invar_1) * invar_2. Distribute. */
6430 return simplify_giv_expr (loop,
6445 /* Shift by constant is multiply by power of two. */
6446 if (GET_CODE (XEXP (x, 1)) != CONST_INT)
6450 simplify_giv_expr (loop,
6453 GEN_INT ((HOST_WIDE_INT) 1
6454 << INTVAL (XEXP (x, 1)))),
6458 /* "-a" is "a * (-1)" */
6459 return simplify_giv_expr (loop,
6460 gen_rtx_MULT (mode, XEXP (x, 0), constm1_rtx),
6464 /* "~a" is "-a - 1". Silly, but easy. */
6465 return simplify_giv_expr (loop,
6466 gen_rtx_MINUS (mode,
6467 gen_rtx_NEG (mode, XEXP (x, 0)),
6472 /* Already in proper form for invariant. */
6476 /* If this is a new register, we can't deal with it. */
6477 if (REGNO (x) >= max_reg_before_loop)
6480 /* Check for biv or giv. */
6481 switch (REG_IV_TYPE (REGNO (x)))
6485 case GENERAL_INDUCT:
6487 struct induction *v = REG_IV_INFO (REGNO (x));
6489 /* Form expression from giv and add benefit. Ensure this giv
6490 can derive another and subtract any needed adjustment if so. */
6491 *benefit += v->benefit;
6495 tem = gen_rtx_PLUS (mode, gen_rtx_MULT (mode,
6496 v->src_reg, v->mult_val),
6499 if (v->derive_adjustment)
6500 tem = gen_rtx_MINUS (mode, tem, v->derive_adjustment);
6501 return simplify_giv_expr (loop, tem, benefit);
6505 /* If it isn't an induction variable, and it is invariant, we
6506 may be able to simplify things further by looking through
6507 the bits we just moved outside the loop. */
6508 if (loop_invariant_p (loop, x) == 1)
6512 for (m = the_movables; m ; m = m->next)
6513 if (rtx_equal_p (x, m->set_dest))
6515 /* Ok, we found a match. Substitute and simplify. */
6517 /* If we match another movable, we must use that, as
6518 this one is going away. */
6520 return simplify_giv_expr (loop, m->match->set_dest,
6523 /* If consec is non-zero, this is a member of a group of
6524 instructions that were moved together. We handle this
6525 case only to the point of seeking to the last insn and
6526 looking for a REG_EQUAL. Fail if we don't find one. */
6531 do { tem = NEXT_INSN (tem); } while (--i > 0);
6533 tem = find_reg_note (tem, REG_EQUAL, NULL_RTX);
6535 tem = XEXP (tem, 0);
6539 tem = single_set (m->insn);
6541 tem = SET_SRC (tem);
6546 /* What we are most interested in is pointer
6547 arithmetic on invariants -- only take
6548 patterns we may be able to do something with. */
6549 if (GET_CODE (tem) == PLUS
6550 || GET_CODE (tem) == MULT
6551 || GET_CODE (tem) == ASHIFT
6552 || GET_CODE (tem) == CONST_INT
6553 || GET_CODE (tem) == SYMBOL_REF)
6555 tem = simplify_giv_expr (loop, tem, benefit);
6559 else if (GET_CODE (tem) == CONST
6560 && GET_CODE (XEXP (tem, 0)) == PLUS
6561 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == SYMBOL_REF
6562 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)
6564 tem = simplify_giv_expr (loop, XEXP (tem, 0),
6576 /* Fall through to general case. */
6578 /* If invariant, return as USE (unless CONST_INT).
6579 Otherwise, not giv. */
6580 if (GET_CODE (x) == USE)
6583 if (loop_invariant_p (loop, x) == 1)
6585 if (GET_CODE (x) == CONST_INT)
6587 if (GET_CODE (x) == CONST
6588 && GET_CODE (XEXP (x, 0)) == PLUS
6589 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
6590 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
6592 return gen_rtx_USE (mode, x);
6599 /* This routine folds invariants such that there is only ever one
6600 CONST_INT in the summation. It is only used by simplify_giv_expr. */
6603 sge_plus_constant (x, c)
6606 if (GET_CODE (x) == CONST_INT)
6607 return GEN_INT (INTVAL (x) + INTVAL (c));
6608 else if (GET_CODE (x) != PLUS)
6609 return gen_rtx_PLUS (GET_MODE (x), x, c);
6610 else if (GET_CODE (XEXP (x, 1)) == CONST_INT)
6612 return gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0),
6613 GEN_INT (INTVAL (XEXP (x, 1)) + INTVAL (c)));
6615 else if (GET_CODE (XEXP (x, 0)) == PLUS
6616 || GET_CODE (XEXP (x, 1)) != PLUS)
6618 return gen_rtx_PLUS (GET_MODE (x),
6619 sge_plus_constant (XEXP (x, 0), c), XEXP (x, 1));
6623 return gen_rtx_PLUS (GET_MODE (x),
6624 sge_plus_constant (XEXP (x, 1), c), XEXP (x, 0));
6629 sge_plus (mode, x, y)
6630 enum machine_mode mode;
6633 while (GET_CODE (y) == PLUS)
6635 rtx a = XEXP (y, 0);
6636 if (GET_CODE (a) == CONST_INT)
6637 x = sge_plus_constant (x, a);
6639 x = gen_rtx_PLUS (mode, x, a);
6642 if (GET_CODE (y) == CONST_INT)
6643 x = sge_plus_constant (x, y);
6645 x = gen_rtx_PLUS (mode, x, y);
6649 /* Help detect a giv that is calculated by several consecutive insns;
6653 The caller has already identified the first insn P as having a giv as dest;
6654 we check that all other insns that set the same register follow
6655 immediately after P, that they alter nothing else,
6656 and that the result of the last is still a giv.
6658 The value is 0 if the reg set in P is not really a giv.
6659 Otherwise, the value is the amount gained by eliminating
6660 all the consecutive insns that compute the value.
6662 FIRST_BENEFIT is the amount gained by eliminating the first insn, P.
6663 SRC_REG is the reg of the biv; DEST_REG is the reg of the giv.
6665 The coefficients of the ultimate giv value are stored in
6666 *MULT_VAL and *ADD_VAL. */
6669 consec_sets_giv (loop, first_benefit, p, src_reg, dest_reg,
6670 add_val, mult_val, last_consec_insn)
6671 const struct loop *loop;
6678 rtx *last_consec_insn;
6686 /* Indicate that this is a giv so that we can update the value produced in
6687 each insn of the multi-insn sequence.
6689 This induction structure will be used only by the call to
6690 general_induction_var below, so we can allocate it on our stack.
6691 If this is a giv, our caller will replace the induct var entry with
6692 a new induction structure. */
6694 = (struct induction *) alloca (sizeof (struct induction));
6695 v->src_reg = src_reg;
6696 v->mult_val = *mult_val;
6697 v->add_val = *add_val;
6698 v->benefit = first_benefit;
6700 v->derive_adjustment = 0;
6702 REG_IV_TYPE (REGNO (dest_reg)) = GENERAL_INDUCT;
6703 REG_IV_INFO (REGNO (dest_reg)) = v;
6705 count = VARRAY_INT (n_times_set, REGNO (dest_reg)) - 1;
6710 code = GET_CODE (p);
6712 /* If libcall, skip to end of call sequence. */
6713 if (code == INSN && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
6717 && (set = single_set (p))
6718 && GET_CODE (SET_DEST (set)) == REG
6719 && SET_DEST (set) == dest_reg
6720 && (general_induction_var (loop, SET_SRC (set), &src_reg,
6721 add_val, mult_val, 0, &benefit, VOIDmode)
6722 /* Giv created by equivalent expression. */
6723 || ((temp = find_reg_note (p, REG_EQUAL, NULL_RTX))
6724 && general_induction_var (loop, XEXP (temp, 0), &src_reg,
6725 add_val, mult_val, 0, &benefit,
6727 && src_reg == v->src_reg)
6729 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
6730 benefit += libcall_benefit (p);
6733 v->mult_val = *mult_val;
6734 v->add_val = *add_val;
6735 v->benefit = benefit;
6737 else if (code != NOTE)
6739 /* Allow insns that set something other than this giv to a
6740 constant. Such insns are needed on machines which cannot
6741 include long constants and should not disqualify a giv. */
6743 && (set = single_set (p))
6744 && SET_DEST (set) != dest_reg
6745 && CONSTANT_P (SET_SRC (set)))
6748 REG_IV_TYPE (REGNO (dest_reg)) = UNKNOWN_INDUCT;
6753 *last_consec_insn = p;
6757 /* Return an rtx, if any, that expresses giv G2 as a function of the register
6758 represented by G1. If no such expression can be found, or it is clear that
6759 it cannot possibly be a valid address, 0 is returned.
6761 To perform the computation, we note that
6764 where `v' is the biv.
6766 So G2 = (y/b) * G1 + (b - a*y/x).
6768 Note that MULT = y/x.
6770 Update: A and B are now allowed to be additive expressions such that
6771 B contains all variables in A. That is, computing B-A will not require
6772 subtracting variables. */
6775 express_from_1 (a, b, mult)
6778 /* If MULT is zero, then A*MULT is zero, and our expression is B. */
6780 if (mult == const0_rtx)
6783 /* If MULT is not 1, we cannot handle A with non-constants, since we
6784 would then be required to subtract multiples of the registers in A.
6785 This is theoretically possible, and may even apply to some Fortran
6786 constructs, but it is a lot of work and we do not attempt it here. */
6788 if (mult != const1_rtx && GET_CODE (a) != CONST_INT)
6791 /* In general these structures are sorted top to bottom (down the PLUS
6792 chain), but not left to right across the PLUS. If B is a higher
6793 order giv than A, we can strip one level and recurse. If A is higher
6794 order, we'll eventually bail out, but won't know that until the end.
6795 If they are the same, we'll strip one level around this loop. */
6797 while (GET_CODE (a) == PLUS && GET_CODE (b) == PLUS)
6799 rtx ra, rb, oa, ob, tmp;
6801 ra = XEXP (a, 0), oa = XEXP (a, 1);
6802 if (GET_CODE (ra) == PLUS)
6803 tmp = ra, ra = oa, oa = tmp;
6805 rb = XEXP (b, 0), ob = XEXP (b, 1);
6806 if (GET_CODE (rb) == PLUS)
6807 tmp = rb, rb = ob, ob = tmp;
6809 if (rtx_equal_p (ra, rb))
6810 /* We matched: remove one reg completely. */
6812 else if (GET_CODE (ob) != PLUS && rtx_equal_p (ra, ob))
6813 /* An alternate match. */
6815 else if (GET_CODE (oa) != PLUS && rtx_equal_p (oa, rb))
6816 /* An alternate match. */
6820 /* Indicates an extra register in B. Strip one level from B and
6821 recurse, hoping B was the higher order expression. */
6822 ob = express_from_1 (a, ob, mult);
6825 return gen_rtx_PLUS (GET_MODE (b), rb, ob);
6829 /* Here we are at the last level of A, go through the cases hoping to
6830 get rid of everything but a constant. */
6832 if (GET_CODE (a) == PLUS)
6836 ra = XEXP (a, 0), oa = XEXP (a, 1);
6837 if (rtx_equal_p (oa, b))
6839 else if (!rtx_equal_p (ra, b))
6842 if (GET_CODE (oa) != CONST_INT)
6845 return GEN_INT (-INTVAL (oa) * INTVAL (mult));
6847 else if (GET_CODE (a) == CONST_INT)
6849 return plus_constant (b, -INTVAL (a) * INTVAL (mult));
6851 else if (CONSTANT_P (a))
6853 return simplify_gen_binary (MINUS, GET_MODE (b) != VOIDmode ? GET_MODE (b) : GET_MODE (a), const0_rtx, a);
6855 else if (GET_CODE (b) == PLUS)
6857 if (rtx_equal_p (a, XEXP (b, 0)))
6859 else if (rtx_equal_p (a, XEXP (b, 1)))
6864 else if (rtx_equal_p (a, b))
6871 express_from (g1, g2)
6872 struct induction *g1, *g2;
6876 /* The value that G1 will be multiplied by must be a constant integer. Also,
6877 the only chance we have of getting a valid address is if b*c/a (see above
6878 for notation) is also an integer. */
6879 if (GET_CODE (g1->mult_val) == CONST_INT
6880 && GET_CODE (g2->mult_val) == CONST_INT)
6882 if (g1->mult_val == const0_rtx
6883 || INTVAL (g2->mult_val) % INTVAL (g1->mult_val) != 0)
6885 mult = GEN_INT (INTVAL (g2->mult_val) / INTVAL (g1->mult_val));
6887 else if (rtx_equal_p (g1->mult_val, g2->mult_val))
6891 /* ??? Find out if the one is a multiple of the other? */
6895 add = express_from_1 (g1->add_val, g2->add_val, mult);
6896 if (add == NULL_RTX)
6898 /* Failed. If we've got a multiplication factor between G1 and G2,
6899 scale G1's addend and try again. */
6900 if (INTVAL (mult) > 1)
6902 rtx g1_add_val = g1->add_val;
6903 if (GET_CODE (g1_add_val) == MULT
6904 && GET_CODE (XEXP (g1_add_val, 1)) == CONST_INT)
6907 m = INTVAL (mult) * INTVAL (XEXP (g1_add_val, 1));
6908 g1_add_val = gen_rtx_MULT (GET_MODE (g1_add_val),
6909 XEXP (g1_add_val, 0), GEN_INT (m));
6913 g1_add_val = gen_rtx_MULT (GET_MODE (g1_add_val), g1_add_val,
6917 add = express_from_1 (g1_add_val, g2->add_val, const1_rtx);
6920 if (add == NULL_RTX)
6923 /* Form simplified final result. */
6924 if (mult == const0_rtx)
6926 else if (mult == const1_rtx)
6927 mult = g1->dest_reg;
6929 mult = gen_rtx_MULT (g2->mode, g1->dest_reg, mult);
6931 if (add == const0_rtx)
6935 if (GET_CODE (add) == PLUS
6936 && CONSTANT_P (XEXP (add, 1)))
6938 rtx tem = XEXP (add, 1);
6939 mult = gen_rtx_PLUS (g2->mode, mult, XEXP (add, 0));
6943 return gen_rtx_PLUS (g2->mode, mult, add);
6948 /* Return an rtx, if any, that expresses giv G2 as a function of the register
6949 represented by G1. This indicates that G2 should be combined with G1 and
6950 that G2 can use (either directly or via an address expression) a register
6951 used to represent G1. */
6954 combine_givs_p (g1, g2)
6955 struct induction *g1, *g2;
6957 rtx tem = express_from (g1, g2);
6959 /* If these givs are identical, they can be combined. We use the results
6960 of express_from because the addends are not in a canonical form, so
6961 rtx_equal_p is a weaker test. */
6962 /* But don't combine a DEST_REG giv with a DEST_ADDR giv; we want the
6963 combination to be the other way round. */
6964 if (tem == g1->dest_reg
6965 && (g1->giv_type == DEST_REG || g2->giv_type == DEST_ADDR))
6967 return g1->dest_reg;
6970 /* If G2 can be expressed as a function of G1 and that function is valid
6971 as an address and no more expensive than using a register for G2,
6972 the expression of G2 in terms of G1 can be used. */
6974 && g2->giv_type == DEST_ADDR
6975 && memory_address_p (g2->mem_mode, tem)
6976 /* ??? Looses, especially with -fforce-addr, where *g2->location
6977 will always be a register, and so anything more complicated
6981 && ADDRESS_COST (tem) <= ADDRESS_COST (*g2->location)
6983 && rtx_cost (tem, MEM) <= rtx_cost (*g2->location, MEM)
6994 struct combine_givs_stats
7001 cmp_combine_givs_stats (xp, yp)
7005 const struct combine_givs_stats * const x =
7006 (const struct combine_givs_stats *) xp;
7007 const struct combine_givs_stats * const y =
7008 (const struct combine_givs_stats *) yp;
7010 d = y->total_benefit - x->total_benefit;
7011 /* Stabilize the sort. */
7013 d = x->giv_number - y->giv_number;
7017 /* Check all pairs of givs for iv_class BL and see if any can be combined with
7018 any other. If so, point SAME to the giv combined with and set NEW_REG to
7019 be an expression (in terms of the other giv's DEST_REG) equivalent to the
7020 giv. Also, update BENEFIT and related fields for cost/benefit analysis. */
7024 struct iv_class *bl;
7026 /* Additional benefit to add for being combined multiple times. */
7027 const int extra_benefit = 3;
7029 struct induction *g1, *g2, **giv_array;
7030 int i, j, k, giv_count;
7031 struct combine_givs_stats *stats;
7034 /* Count givs, because bl->giv_count is incorrect here. */
7036 for (g1 = bl->giv; g1; g1 = g1->next_iv)
7041 = (struct induction **) alloca (giv_count * sizeof (struct induction *));
7043 for (g1 = bl->giv; g1; g1 = g1->next_iv)
7045 giv_array[i++] = g1;
7047 stats = (struct combine_givs_stats *) xcalloc (giv_count, sizeof (*stats));
7048 can_combine = (rtx *) xcalloc (giv_count, giv_count * sizeof(rtx));
7050 for (i = 0; i < giv_count; i++)
7056 stats[i].giv_number = i;
7058 /* If a DEST_REG GIV is used only once, do not allow it to combine
7059 with anything, for in doing so we will gain nothing that cannot
7060 be had by simply letting the GIV with which we would have combined
7061 to be reduced on its own. The losage shows up in particular with
7062 DEST_ADDR targets on hosts with reg+reg addressing, though it can
7063 be seen elsewhere as well. */
7064 if (g1->giv_type == DEST_REG
7065 && (single_use = VARRAY_RTX (reg_single_usage, REGNO (g1->dest_reg)))
7066 && single_use != const0_rtx)
7069 this_benefit = g1->benefit;
7070 /* Add an additional weight for zero addends. */
7071 if (g1->no_const_addval)
7074 for (j = 0; j < giv_count; j++)
7080 && (this_combine = combine_givs_p (g1, g2)) != NULL_RTX)
7082 can_combine[i*giv_count + j] = this_combine;
7083 this_benefit += g2->benefit + extra_benefit;
7086 stats[i].total_benefit = this_benefit;
7089 /* Iterate, combining until we can't. */
7091 qsort (stats, giv_count, sizeof(*stats), cmp_combine_givs_stats);
7093 if (loop_dump_stream)
7095 fprintf (loop_dump_stream, "Sorted combine statistics:\n");
7096 for (k = 0; k < giv_count; k++)
7098 g1 = giv_array[stats[k].giv_number];
7099 if (!g1->combined_with && !g1->same)
7100 fprintf (loop_dump_stream, " {%d, %d}",
7101 INSN_UID (giv_array[stats[k].giv_number]->insn),
7102 stats[k].total_benefit);
7104 putc ('\n', loop_dump_stream);
7107 for (k = 0; k < giv_count; k++)
7109 int g1_add_benefit = 0;
7111 i = stats[k].giv_number;
7114 /* If it has already been combined, skip. */
7115 if (g1->combined_with || g1->same)
7118 for (j = 0; j < giv_count; j++)
7121 if (g1 != g2 && can_combine[i*giv_count + j]
7122 /* If it has already been combined, skip. */
7123 && ! g2->same && ! g2->combined_with)
7127 g2->new_reg = can_combine[i*giv_count + j];
7129 g1->combined_with++;
7130 g1->lifetime += g2->lifetime;
7132 g1_add_benefit += g2->benefit;
7134 /* ??? The new final_[bg]iv_value code does a much better job
7135 of finding replaceable giv's, and hence this code may no
7136 longer be necessary. */
7137 if (! g2->replaceable && REG_USERVAR_P (g2->dest_reg))
7138 g1_add_benefit -= copy_cost;
7140 /* To help optimize the next set of combinations, remove
7141 this giv from the benefits of other potential mates. */
7142 for (l = 0; l < giv_count; ++l)
7144 int m = stats[l].giv_number;
7145 if (can_combine[m*giv_count + j])
7146 stats[l].total_benefit -= g2->benefit + extra_benefit;
7149 if (loop_dump_stream)
7150 fprintf (loop_dump_stream,
7151 "giv at %d combined with giv at %d\n",
7152 INSN_UID (g2->insn), INSN_UID (g1->insn));
7156 /* To help optimize the next set of combinations, remove
7157 this giv from the benefits of other potential mates. */
7158 if (g1->combined_with)
7160 for (j = 0; j < giv_count; ++j)
7162 int m = stats[j].giv_number;
7163 if (can_combine[m*giv_count + i])
7164 stats[j].total_benefit -= g1->benefit + extra_benefit;
7167 g1->benefit += g1_add_benefit;
7169 /* We've finished with this giv, and everything it touched.
7170 Restart the combination so that proper weights for the
7171 rest of the givs are properly taken into account. */
7172 /* ??? Ideally we would compact the arrays at this point, so
7173 as to not cover old ground. But sanely compacting
7174 can_combine is tricky. */
7184 struct recombine_givs_stats
7187 int start_luid, end_luid;
7190 /* Used below as comparison function for qsort. We want a ascending luid
7191 when scanning the array starting at the end, thus the arguments are
7194 cmp_recombine_givs_stats (xp, yp)
7198 const struct recombine_givs_stats * const x =
7199 (const struct recombine_givs_stats *) xp;
7200 const struct recombine_givs_stats * const y =
7201 (const struct recombine_givs_stats *) yp;
7203 d = y->start_luid - x->start_luid;
7204 /* Stabilize the sort. */
7206 d = y->giv_number - x->giv_number;
7210 /* Scan X, which is a part of INSN, for the end of life of a giv. Also
7211 look for the start of life of a giv where the start has not been seen
7212 yet to unlock the search for the end of its life.
7213 Only consider givs that belong to BIV.
7214 Return the total number of lifetime ends that have been found. */
7216 find_life_end (x, stats, insn, biv)
7218 struct recombine_givs_stats *stats;
7225 code = GET_CODE (x);
7230 rtx reg = SET_DEST (x);
7231 if (GET_CODE (reg) == REG)
7233 int regno = REGNO (reg);
7234 struct induction *v = REG_IV_INFO (regno);
7236 if (REG_IV_TYPE (regno) == GENERAL_INDUCT
7238 && v->src_reg == biv
7239 && stats[v->ix].end_luid <= 0)
7241 /* If we see a 0 here for end_luid, it means that we have
7242 scanned the entire loop without finding any use at all.
7243 We must not predicate this code on a start_luid match
7244 since that would make the test fail for givs that have
7245 been hoisted out of inner loops. */
7246 if (stats[v->ix].end_luid == 0)
7248 stats[v->ix].end_luid = stats[v->ix].start_luid;
7249 return 1 + find_life_end (SET_SRC (x), stats, insn, biv);
7251 else if (stats[v->ix].start_luid == INSN_LUID (insn))
7252 stats[v->ix].end_luid = 0;
7254 return find_life_end (SET_SRC (x), stats, insn, biv);
7260 int regno = REGNO (x);
7261 struct induction *v = REG_IV_INFO (regno);
7263 if (REG_IV_TYPE (regno) == GENERAL_INDUCT
7265 && v->src_reg == biv
7266 && stats[v->ix].end_luid == 0)
7268 while (INSN_UID (insn) >= max_uid_for_loop)
7269 insn = NEXT_INSN (insn);
7270 stats[v->ix].end_luid = INSN_LUID (insn);
7283 fmt = GET_RTX_FORMAT (code);
7285 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
7288 retval += find_life_end (XEXP (x, i), stats, insn, biv);
7290 else if (fmt[i] == 'E')
7291 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
7292 retval += find_life_end (XVECEXP (x, i, j), stats, insn, biv);
7297 /* For each giv that has been combined with another, look if
7298 we can combine it with the most recently used one instead.
7299 This tends to shorten giv lifetimes, and helps the next step:
7300 try to derive givs from other givs. */
7302 recombine_givs (loop, bl, unroll_p)
7303 const struct loop *loop;
7304 struct iv_class *bl;
7307 struct induction *v, **giv_array, *last_giv;
7308 struct recombine_givs_stats *stats;
7311 int ends_need_computing;
7313 for (giv_count = 0, v = bl->giv; v; v = v->next_iv)
7319 = (struct induction **) xmalloc (giv_count * sizeof (struct induction *));
7320 stats = (struct recombine_givs_stats *) xmalloc (giv_count * sizeof *stats);
7322 /* Initialize stats and set up the ix field for each giv in stats to name
7323 the corresponding index into stats. */
7324 for (i = 0, v = bl->giv; v; v = v->next_iv)
7331 stats[i].giv_number = i;
7332 /* If this giv has been hoisted out of an inner loop, use the luid of
7333 the previous insn. */
7334 for (p = v->insn; INSN_UID (p) >= max_uid_for_loop; )
7336 stats[i].start_luid = INSN_LUID (p);
7340 qsort (stats, giv_count, sizeof(*stats), cmp_recombine_givs_stats);
7342 /* Set up the ix field for each giv in stats to name
7343 the corresponding index into stats, and
7344 do the actual most-recently-used recombination. */
7345 for (last_giv = 0, i = giv_count - 1; i >= 0; i--)
7347 v = giv_array[stats[i].giv_number];
7351 struct induction *old_same = v->same;
7354 /* combine_givs_p actually says if we can make this transformation.
7355 The other tests are here only to avoid keeping a giv alive
7356 that could otherwise be eliminated. */
7358 && ((old_same->maybe_dead && ! old_same->combined_with)
7359 || ! last_giv->maybe_dead
7360 || last_giv->combined_with)
7361 && (new_combine = combine_givs_p (last_giv, v)))
7363 old_same->combined_with--;
7364 v->new_reg = new_combine;
7366 last_giv->combined_with++;
7367 /* No need to update lifetimes / benefits here since we have
7368 already decided what to reduce. */
7370 if (loop_dump_stream)
7372 fprintf (loop_dump_stream,
7373 "giv at %d recombined with giv at %d as ",
7374 INSN_UID (v->insn), INSN_UID (last_giv->insn));
7375 print_rtl (loop_dump_stream, v->new_reg);
7376 putc ('\n', loop_dump_stream);
7382 else if (v->giv_type != DEST_REG)
7385 || (last_giv->maybe_dead && ! last_giv->combined_with)
7387 || v->combined_with)
7391 ends_need_computing = 0;
7392 /* For each DEST_REG giv, compute lifetime starts, and try to compute
7393 lifetime ends from regscan info. */
7394 for (i = giv_count - 1; i >= 0; i--)
7396 v = giv_array[stats[i].giv_number];
7399 if (v->giv_type == DEST_ADDR)
7401 /* Loop unrolling of an inner loop can even create new DEST_REG
7404 for (p = v->insn; INSN_UID (p) >= max_uid_for_loop; )
7406 stats[i].start_luid = stats[i].end_luid = INSN_LUID (p);
7408 stats[i].end_luid++;
7410 else /* v->giv_type == DEST_REG */
7414 stats[i].start_luid = INSN_LUID (v->insn);
7415 stats[i].end_luid = INSN_LUID (v->last_use);
7417 else if (INSN_UID (v->insn) >= max_uid_for_loop)
7420 /* This insn has been created by loop optimization on an inner
7421 loop. We don't have a proper start_luid that will match
7422 when we see the first set. But we do know that there will
7423 be no use before the set, so we can set end_luid to 0 so that
7424 we'll start looking for the last use right away. */
7425 for (p = PREV_INSN (v->insn); INSN_UID (p) >= max_uid_for_loop; )
7427 stats[i].start_luid = INSN_LUID (p);
7428 stats[i].end_luid = 0;
7429 ends_need_computing++;
7433 int regno = REGNO (v->dest_reg);
7434 int count = VARRAY_INT (n_times_set, regno) - 1;
7437 /* Find the first insn that sets the giv, so that we can verify
7438 if this giv's lifetime wraps around the loop. We also need
7439 the luid of the first setting insn in order to detect the
7440 last use properly. */
7443 p = prev_nonnote_insn (p);
7444 if (reg_set_p (v->dest_reg, p))
7448 stats[i].start_luid = INSN_LUID (p);
7449 if (stats[i].start_luid > uid_luid[REGNO_FIRST_UID (regno)])
7451 stats[i].end_luid = -1;
7452 ends_need_computing++;
7456 stats[i].end_luid = uid_luid[REGNO_LAST_UID (regno)];
7457 if (stats[i].end_luid > INSN_LUID (loop->end))
7459 stats[i].end_luid = -1;
7460 ends_need_computing++;
7467 /* If the regscan information was unconclusive for one or more DEST_REG
7468 givs, scan the all insn in the loop to find out lifetime ends. */
7469 if (ends_need_computing)
7471 rtx biv = bl->biv->src_reg;
7476 if (p == loop->start)
7479 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
7481 ends_need_computing -= find_life_end (PATTERN (p), stats, p, biv);
7483 while (ends_need_computing);
7486 /* Set start_luid back to the last insn that sets the giv. This allows
7487 more combinations. */
7488 for (i = giv_count - 1; i >= 0; i--)
7490 v = giv_array[stats[i].giv_number];
7493 if (INSN_UID (v->insn) < max_uid_for_loop)
7494 stats[i].start_luid = INSN_LUID (v->insn);
7497 /* Now adjust lifetime ends by taking combined givs into account. */
7498 for (i = giv_count - 1; i >= 0; i--)
7503 v = giv_array[stats[i].giv_number];
7506 if (v->same && ! v->same->ignore)
7509 luid = stats[i].start_luid;
7510 /* Use unsigned arithmetic to model loop wrap-around. */
7511 if (luid - stats[j].start_luid
7512 > (unsigned) stats[j].end_luid - stats[j].start_luid)
7513 stats[j].end_luid = luid;
7517 qsort (stats, giv_count, sizeof(*stats), cmp_recombine_givs_stats);
7519 /* Try to derive DEST_REG givs from previous DEST_REG givs with the
7520 same mult_val and non-overlapping lifetime. This reduces register
7522 Once we find a DEST_REG giv that is suitable to derive others from,
7523 we set last_giv to this giv, and try to derive as many other DEST_REG
7524 givs from it without joining overlapping lifetimes. If we then
7525 encounter a DEST_REG giv that we can't derive, we set rescan to the
7526 index for this giv (unless rescan is already set).
7527 When we are finished with the current LAST_GIV (i.e. the inner loop
7528 terminates), we start again with rescan, which then becomes the new
7530 for (i = giv_count - 1; i >= 0; i = rescan)
7532 int life_start = 0, life_end = 0;
7534 for (last_giv = 0, rescan = -1; i >= 0; i--)
7538 v = giv_array[stats[i].giv_number];
7539 if (v->giv_type != DEST_REG || v->derived_from || v->same)
7543 /* Don't use a giv that's likely to be dead to derive
7544 others - that would be likely to keep that giv alive. */
7545 if (! v->maybe_dead || v->combined_with)
7548 life_start = stats[i].start_luid;
7549 life_end = stats[i].end_luid;
7553 /* Use unsigned arithmetic to model loop wrap around. */
7554 if (((unsigned) stats[i].start_luid - life_start
7555 >= (unsigned) life_end - life_start)
7556 && ((unsigned) stats[i].end_luid - life_start
7557 > (unsigned) life_end - life_start)
7558 /* Check that the giv insn we're about to use for deriving
7559 precedes all uses of that giv. Note that initializing the
7560 derived giv would defeat the purpose of reducing register
7562 ??? We could arrange to move the insn. */
7563 && ((unsigned) stats[i].end_luid - INSN_LUID (loop->start)
7564 > (unsigned) stats[i].start_luid - INSN_LUID (loop->start))
7565 && rtx_equal_p (last_giv->mult_val, v->mult_val)
7566 /* ??? Could handle libcalls, but would need more logic. */
7567 && ! find_reg_note (v->insn, REG_RETVAL, NULL_RTX)
7568 /* We would really like to know if for any giv that v
7569 is combined with, v->insn or any intervening biv increment
7570 dominates that combined giv. However, we
7571 don't have this detailed control flow information.
7572 N.B. since last_giv will be reduced, it is valid
7573 anywhere in the loop, so we don't need to check the
7574 validity of last_giv.
7575 We rely here on the fact that v->always_executed implies that
7576 there is no jump to someplace else in the loop before the
7577 giv insn, and hence any insn that is executed before the
7578 giv insn in the loop will have a lower luid. */
7579 && (v->always_executed || ! v->combined_with)
7580 && (sum = express_from (last_giv, v))
7581 /* Make sure we don't make the add more expensive. ADD_COST
7582 doesn't take different costs of registers and constants into
7583 account, so compare the cost of the actual SET_SRCs. */
7584 && (rtx_cost (sum, SET)
7585 <= rtx_cost (SET_SRC (single_set (v->insn)), SET))
7586 /* ??? unroll can't understand anything but reg + const_int
7587 sums. It would be cleaner to fix unroll. */
7588 && ((GET_CODE (sum) == PLUS
7589 && GET_CODE (XEXP (sum, 0)) == REG
7590 && GET_CODE (XEXP (sum, 1)) == CONST_INT)
7592 && validate_change (v->insn, &PATTERN (v->insn),
7593 gen_rtx_SET (VOIDmode, v->dest_reg, sum), 0))
7595 v->derived_from = last_giv;
7596 life_end = stats[i].end_luid;
7598 if (loop_dump_stream)
7600 fprintf (loop_dump_stream,
7601 "giv at %d derived from %d as ",
7602 INSN_UID (v->insn), INSN_UID (last_giv->insn));
7603 print_rtl (loop_dump_stream, sum);
7604 putc ('\n', loop_dump_stream);
7607 else if (rescan < 0)
7617 /* EMIT code before INSERT_BEFORE to set REG = B * M + A. */
7620 emit_iv_add_mult (b, m, a, reg, insert_before)
7621 rtx b; /* initial value of basic induction variable */
7622 rtx m; /* multiplicative constant */
7623 rtx a; /* additive constant */
7624 rtx reg; /* destination register */
7630 /* Prevent unexpected sharing of these rtx. */
7634 /* Increase the lifetime of any invariants moved further in code. */
7635 update_reg_last_use (a, insert_before);
7636 update_reg_last_use (b, insert_before);
7637 update_reg_last_use (m, insert_before);
7640 result = expand_mult_add (b, reg, m, a, GET_MODE (reg), 0);
7642 emit_move_insn (reg, result);
7643 seq = gen_sequence ();
7646 emit_insn_before (seq, insert_before);
7648 /* It is entirely possible that the expansion created lots of new
7649 registers. Iterate over the sequence we just created and
7652 if (GET_CODE (seq) == SEQUENCE)
7655 for (i = 0; i < XVECLEN (seq, 0); ++i)
7657 rtx set = single_set (XVECEXP (seq, 0, i));
7658 if (set && GET_CODE (SET_DEST (set)) == REG)
7659 record_base_value (REGNO (SET_DEST (set)), SET_SRC (set), 0);
7662 else if (GET_CODE (seq) == SET
7663 && GET_CODE (SET_DEST (seq)) == REG)
7664 record_base_value (REGNO (SET_DEST (seq)), SET_SRC (seq), 0);
7667 /* Test whether A * B can be computed without
7668 an actual multiply insn. Value is 1 if so. */
7671 product_cheap_p (a, b)
7677 struct obstack *old_rtl_obstack = rtl_obstack;
7678 char *storage = (char *) obstack_alloc (&temp_obstack, 0);
7681 /* If only one is constant, make it B. */
7682 if (GET_CODE (a) == CONST_INT)
7683 tmp = a, a = b, b = tmp;
7685 /* If first constant, both constant, so don't need multiply. */
7686 if (GET_CODE (a) == CONST_INT)
7689 /* If second not constant, neither is constant, so would need multiply. */
7690 if (GET_CODE (b) != CONST_INT)
7693 /* One operand is constant, so might not need multiply insn. Generate the
7694 code for the multiply and see if a call or multiply, or long sequence
7695 of insns is generated. */
7697 rtl_obstack = &temp_obstack;
7699 expand_mult (GET_MODE (a), a, b, NULL_RTX, 0);
7700 tmp = gen_sequence ();
7703 if (GET_CODE (tmp) == SEQUENCE)
7705 if (XVEC (tmp, 0) == 0)
7707 else if (XVECLEN (tmp, 0) > 3)
7710 for (i = 0; i < XVECLEN (tmp, 0); i++)
7712 rtx insn = XVECEXP (tmp, 0, i);
7714 if (GET_CODE (insn) != INSN
7715 || (GET_CODE (PATTERN (insn)) == SET
7716 && GET_CODE (SET_SRC (PATTERN (insn))) == MULT)
7717 || (GET_CODE (PATTERN (insn)) == PARALLEL
7718 && GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == SET
7719 && GET_CODE (SET_SRC (XVECEXP (PATTERN (insn), 0, 0))) == MULT))
7726 else if (GET_CODE (tmp) == SET
7727 && GET_CODE (SET_SRC (tmp)) == MULT)
7729 else if (GET_CODE (tmp) == PARALLEL
7730 && GET_CODE (XVECEXP (tmp, 0, 0)) == SET
7731 && GET_CODE (SET_SRC (XVECEXP (tmp, 0, 0))) == MULT)
7734 /* Free any storage we obtained in generating this multiply and restore rtl
7735 allocation to its normal obstack. */
7736 obstack_free (&temp_obstack, storage);
7737 rtl_obstack = old_rtl_obstack;
7742 /* Check to see if loop can be terminated by a "decrement and branch until
7743 zero" instruction. If so, add a REG_NONNEG note to the branch insn if so.
7744 Also try reversing an increment loop to a decrement loop
7745 to see if the optimization can be performed.
7746 Value is nonzero if optimization was performed. */
7748 /* This is useful even if the architecture doesn't have such an insn,
7749 because it might change a loops which increments from 0 to n to a loop
7750 which decrements from n to 0. A loop that decrements to zero is usually
7751 faster than one that increments from zero. */
7753 /* ??? This could be rewritten to use some of the loop unrolling procedures,
7754 such as approx_final_value, biv_total_increment, loop_iterations, and
7755 final_[bg]iv_value. */
7758 check_dbra_loop (loop, insn_count)
7762 struct iv_class *bl;
7769 rtx before_comparison;
7773 int compare_and_branch;
7774 rtx loop_start = loop->start;
7775 rtx loop_end = loop->end;
7776 struct loop_info *loop_info = LOOP_INFO (loop);
7778 /* If last insn is a conditional branch, and the insn before tests a
7779 register value, try to optimize it. Otherwise, we can't do anything. */
7781 jump = PREV_INSN (loop_end);
7782 comparison = get_condition_for_loop (loop, jump);
7783 if (comparison == 0)
7785 if (!onlyjump_p (jump))
7788 /* Try to compute whether the compare/branch at the loop end is one or
7789 two instructions. */
7790 get_condition (jump, &first_compare);
7791 if (first_compare == jump)
7792 compare_and_branch = 1;
7793 else if (first_compare == prev_nonnote_insn (jump))
7794 compare_and_branch = 2;
7799 /* If more than one condition is present to control the loop, then
7800 do not proceed, as this function does not know how to rewrite
7801 loop tests with more than one condition. */
7804 if ((jump1 = prev_nonnote_insn (jump)) != loop->cont)
7805 if (GET_CODE (jump1) == JUMP_INSN)
7809 /* Check all of the bivs to see if the compare uses one of them.
7810 Skip biv's set more than once because we can't guarantee that
7811 it will be zero on the last iteration. Also skip if the biv is
7812 used between its update and the test insn. */
7814 for (bl = loop_iv_list; bl; bl = bl->next)
7816 if (bl->biv_count == 1
7817 && ! bl->biv->maybe_multiple
7818 && bl->biv->dest_reg == XEXP (comparison, 0)
7819 && ! reg_used_between_p (regno_reg_rtx[bl->regno], bl->biv->insn,
7827 /* Look for the case where the basic induction variable is always
7828 nonnegative, and equals zero on the last iteration.
7829 In this case, add a reg_note REG_NONNEG, which allows the
7830 m68k DBRA instruction to be used. */
7832 if (((GET_CODE (comparison) == GT
7833 && GET_CODE (XEXP (comparison, 1)) == CONST_INT
7834 && INTVAL (XEXP (comparison, 1)) == -1)
7835 || (GET_CODE (comparison) == NE && XEXP (comparison, 1) == const0_rtx))
7836 && GET_CODE (bl->biv->add_val) == CONST_INT
7837 && INTVAL (bl->biv->add_val) < 0)
7839 /* Initial value must be greater than 0,
7840 init_val % -dec_value == 0 to ensure that it equals zero on
7841 the last iteration */
7843 if (GET_CODE (bl->initial_value) == CONST_INT
7844 && INTVAL (bl->initial_value) > 0
7845 && (INTVAL (bl->initial_value)
7846 % (-INTVAL (bl->biv->add_val))) == 0)
7848 /* register always nonnegative, add REG_NOTE to branch */
7849 if (! find_reg_note (jump, REG_NONNEG, NULL_RTX))
7851 = gen_rtx_EXPR_LIST (REG_NONNEG, bl->biv->dest_reg,
7858 /* If the decrement is 1 and the value was tested as >= 0 before
7859 the loop, then we can safely optimize. */
7860 for (p = loop_start; p; p = PREV_INSN (p))
7862 if (GET_CODE (p) == CODE_LABEL)
7864 if (GET_CODE (p) != JUMP_INSN)
7867 before_comparison = get_condition_for_loop (loop, p);
7868 if (before_comparison
7869 && XEXP (before_comparison, 0) == bl->biv->dest_reg
7870 && GET_CODE (before_comparison) == LT
7871 && XEXP (before_comparison, 1) == const0_rtx
7872 && ! reg_set_between_p (bl->biv->dest_reg, p, loop_start)
7873 && INTVAL (bl->biv->add_val) == -1)
7875 if (! find_reg_note (jump, REG_NONNEG, NULL_RTX))
7877 = gen_rtx_EXPR_LIST (REG_NONNEG, bl->biv->dest_reg,
7885 else if (GET_CODE (bl->biv->add_val) == CONST_INT
7886 && INTVAL (bl->biv->add_val) > 0)
7888 /* Try to change inc to dec, so can apply above optimization. */
7890 all registers modified are induction variables or invariant,
7891 all memory references have non-overlapping addresses
7892 (obviously true if only one write)
7893 allow 2 insns for the compare/jump at the end of the loop. */
7894 /* Also, we must avoid any instructions which use both the reversed
7895 biv and another biv. Such instructions will fail if the loop is
7896 reversed. We meet this condition by requiring that either
7897 no_use_except_counting is true, or else that there is only
7899 int num_nonfixed_reads = 0;
7900 /* 1 if the iteration var is used only to count iterations. */
7901 int no_use_except_counting = 0;
7902 /* 1 if the loop has no memory store, or it has a single memory store
7903 which is reversible. */
7904 int reversible_mem_store = 1;
7906 if (bl->giv_count == 0 && ! loop->exit_count)
7908 rtx bivreg = regno_reg_rtx[bl->regno];
7910 /* If there are no givs for this biv, and the only exit is the
7911 fall through at the end of the loop, then
7912 see if perhaps there are no uses except to count. */
7913 no_use_except_counting = 1;
7914 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
7915 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
7917 rtx set = single_set (p);
7919 if (set && GET_CODE (SET_DEST (set)) == REG
7920 && REGNO (SET_DEST (set)) == bl->regno)
7921 /* An insn that sets the biv is okay. */
7923 else if ((p == prev_nonnote_insn (prev_nonnote_insn (loop_end))
7924 || p == prev_nonnote_insn (loop_end))
7925 && reg_mentioned_p (bivreg, PATTERN (p)))
7927 /* If either of these insns uses the biv and sets a pseudo
7928 that has more than one usage, then the biv has uses
7929 other than counting since it's used to derive a value
7930 that is used more than one time. */
7931 int note_set_pseudo_multiple_uses_retval = 0;
7932 note_stores (PATTERN (p), note_set_pseudo_multiple_uses,
7933 ¬e_set_pseudo_multiple_uses_retval);
7934 if (note_set_pseudo_multiple_uses_retval)
7936 no_use_except_counting = 0;
7940 else if (reg_mentioned_p (bivreg, PATTERN (p)))
7942 no_use_except_counting = 0;
7948 if (no_use_except_counting)
7949 ; /* no need to worry about MEMs. */
7950 else if (num_mem_sets <= 1)
7952 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
7953 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
7954 num_nonfixed_reads += count_nonfixed_reads (loop, PATTERN (p));
7956 /* If the loop has a single store, and the destination address is
7957 invariant, then we can't reverse the loop, because this address
7958 might then have the wrong value at loop exit.
7959 This would work if the source was invariant also, however, in that
7960 case, the insn should have been moved out of the loop. */
7962 if (num_mem_sets == 1)
7964 struct induction *v;
7966 reversible_mem_store
7967 = (! unknown_address_altered
7968 && ! unknown_constant_address_altered
7969 && ! loop_invariant_p (loop,
7970 XEXP (XEXP (loop_store_mems, 0),
7973 /* If the store depends on a register that is set after the
7974 store, it depends on the initial value, and is thus not
7976 for (v = bl->giv; reversible_mem_store && v; v = v->next_iv)
7978 if (v->giv_type == DEST_REG
7979 && reg_mentioned_p (v->dest_reg,
7980 PATTERN (first_loop_store_insn))
7981 && loop_insn_first_p (first_loop_store_insn, v->insn))
7982 reversible_mem_store = 0;
7989 /* This code only acts for innermost loops. Also it simplifies
7990 the memory address check by only reversing loops with
7991 zero or one memory access.
7992 Two memory accesses could involve parts of the same array,
7993 and that can't be reversed.
7994 If the biv is used only for counting, than we don't need to worry
7995 about all these things. */
7997 if ((num_nonfixed_reads <= 1
7998 && ! loop_info->has_call
7999 && ! loop_info->has_volatile
8000 && reversible_mem_store
8001 && (bl->giv_count + bl->biv_count + num_mem_sets
8002 + num_movables + compare_and_branch == insn_count)
8003 && (bl == loop_iv_list && bl->next == 0))
8004 || no_use_except_counting)
8008 /* Loop can be reversed. */
8009 if (loop_dump_stream)
8010 fprintf (loop_dump_stream, "Can reverse loop\n");
8012 /* Now check other conditions:
8014 The increment must be a constant, as must the initial value,
8015 and the comparison code must be LT.
8017 This test can probably be improved since +/- 1 in the constant
8018 can be obtained by changing LT to LE and vice versa; this is
8022 /* for constants, LE gets turned into LT */
8023 && (GET_CODE (comparison) == LT
8024 || (GET_CODE (comparison) == LE
8025 && no_use_except_counting)))
8027 HOST_WIDE_INT add_val, add_adjust, comparison_val = 0;
8028 rtx initial_value, comparison_value;
8030 enum rtx_code cmp_code;
8031 int comparison_const_width;
8032 unsigned HOST_WIDE_INT comparison_sign_mask;
8034 add_val = INTVAL (bl->biv->add_val);
8035 comparison_value = XEXP (comparison, 1);
8036 if (GET_MODE (comparison_value) == VOIDmode)
8037 comparison_const_width
8038 = GET_MODE_BITSIZE (GET_MODE (XEXP (comparison, 0)));
8040 comparison_const_width
8041 = GET_MODE_BITSIZE (GET_MODE (comparison_value));
8042 if (comparison_const_width > HOST_BITS_PER_WIDE_INT)
8043 comparison_const_width = HOST_BITS_PER_WIDE_INT;
8044 comparison_sign_mask
8045 = (unsigned HOST_WIDE_INT)1 << (comparison_const_width - 1);
8047 /* If the comparison value is not a loop invariant, then we
8048 can not reverse this loop.
8050 ??? If the insns which initialize the comparison value as
8051 a whole compute an invariant result, then we could move
8052 them out of the loop and proceed with loop reversal. */
8053 if (! loop_invariant_p (loop, comparison_value))
8056 if (GET_CODE (comparison_value) == CONST_INT)
8057 comparison_val = INTVAL (comparison_value);
8058 initial_value = bl->initial_value;
8060 /* Normalize the initial value if it is an integer and
8061 has no other use except as a counter. This will allow
8062 a few more loops to be reversed. */
8063 if (no_use_except_counting
8064 && GET_CODE (comparison_value) == CONST_INT
8065 && GET_CODE (initial_value) == CONST_INT)
8067 comparison_val = comparison_val - INTVAL (bl->initial_value);
8068 /* The code below requires comparison_val to be a multiple
8069 of add_val in order to do the loop reversal, so
8070 round up comparison_val to a multiple of add_val.
8071 Since comparison_value is constant, we know that the
8072 current comparison code is LT. */
8073 comparison_val = comparison_val + add_val - 1;
8075 -= (unsigned HOST_WIDE_INT) comparison_val % add_val;
8076 /* We postpone overflow checks for COMPARISON_VAL here;
8077 even if there is an overflow, we might still be able to
8078 reverse the loop, if converting the loop exit test to
8080 initial_value = const0_rtx;
8083 /* First check if we can do a vanilla loop reversal. */
8084 if (initial_value == const0_rtx
8085 /* If we have a decrement_and_branch_on_count,
8086 prefer the NE test, since this will allow that
8087 instruction to be generated. Note that we must
8088 use a vanilla loop reversal if the biv is used to
8089 calculate a giv or has a non-counting use. */
8090 #if ! defined (HAVE_decrement_and_branch_until_zero) \
8091 && defined (HAVE_decrement_and_branch_on_count)
8092 && (! (add_val == 1 && loop->vtop
8093 && (bl->biv_count == 0
8094 || no_use_except_counting)))
8096 && GET_CODE (comparison_value) == CONST_INT
8097 /* Now do postponed overflow checks on COMPARISON_VAL. */
8098 && ! (((comparison_val - add_val) ^ INTVAL (comparison_value))
8099 & comparison_sign_mask))
8101 /* Register will always be nonnegative, with value
8102 0 on last iteration */
8103 add_adjust = add_val;
8107 else if (add_val == 1 && loop->vtop
8108 && (bl->biv_count == 0
8109 || no_use_except_counting))
8117 if (GET_CODE (comparison) == LE)
8118 add_adjust -= add_val;
8120 /* If the initial value is not zero, or if the comparison
8121 value is not an exact multiple of the increment, then we
8122 can not reverse this loop. */
8123 if (initial_value == const0_rtx
8124 && GET_CODE (comparison_value) == CONST_INT)
8126 if (((unsigned HOST_WIDE_INT) comparison_val % add_val) != 0)
8131 if (! no_use_except_counting || add_val != 1)
8135 final_value = comparison_value;
8137 /* Reset these in case we normalized the initial value
8138 and comparison value above. */
8139 if (GET_CODE (comparison_value) == CONST_INT
8140 && GET_CODE (initial_value) == CONST_INT)
8142 comparison_value = GEN_INT (comparison_val);
8144 = GEN_INT (comparison_val + INTVAL (bl->initial_value));
8146 bl->initial_value = initial_value;
8148 /* Save some info needed to produce the new insns. */
8149 reg = bl->biv->dest_reg;
8150 jump_label = XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end))), 1);
8151 if (jump_label == pc_rtx)
8152 jump_label = XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end))), 2);
8153 new_add_val = GEN_INT (- INTVAL (bl->biv->add_val));
8155 /* Set start_value; if this is not a CONST_INT, we need
8157 Initialize biv to start_value before loop start.
8158 The old initializing insn will be deleted as a
8159 dead store by flow.c. */
8160 if (initial_value == const0_rtx
8161 && GET_CODE (comparison_value) == CONST_INT)
8163 start_value = GEN_INT (comparison_val - add_adjust);
8164 emit_insn_before (gen_move_insn (reg, start_value),
8167 else if (GET_CODE (initial_value) == CONST_INT)
8169 rtx offset = GEN_INT (-INTVAL (initial_value) - add_adjust);
8170 enum machine_mode mode = GET_MODE (reg);
8171 enum insn_code icode
8172 = add_optab->handlers[(int) mode].insn_code;
8174 if (! (*insn_data[icode].operand[0].predicate) (reg, mode)
8175 || ! ((*insn_data[icode].operand[1].predicate)
8176 (comparison_value, mode))
8177 || ! ((*insn_data[icode].operand[2].predicate)
8181 = gen_rtx_PLUS (mode, comparison_value, offset);
8182 emit_insn_before ((GEN_FCN (icode)
8183 (reg, comparison_value, offset)),
8185 if (GET_CODE (comparison) == LE)
8186 final_value = gen_rtx_PLUS (mode, comparison_value,
8189 else if (! add_adjust)
8191 enum machine_mode mode = GET_MODE (reg);
8192 enum insn_code icode
8193 = sub_optab->handlers[(int) mode].insn_code;
8194 if (! (*insn_data[icode].operand[0].predicate) (reg, mode)
8195 || ! ((*insn_data[icode].operand[1].predicate)
8196 (comparison_value, mode))
8197 || ! ((*insn_data[icode].operand[2].predicate)
8198 (initial_value, mode)))
8201 = gen_rtx_MINUS (mode, comparison_value, initial_value);
8202 emit_insn_before ((GEN_FCN (icode)
8203 (reg, comparison_value, initial_value)),
8207 /* We could handle the other cases too, but it'll be
8208 better to have a testcase first. */
8211 /* We may not have a single insn which can increment a reg, so
8212 create a sequence to hold all the insns from expand_inc. */
8214 expand_inc (reg, new_add_val);
8215 tem = gen_sequence ();
8218 p = emit_insn_before (tem, bl->biv->insn);
8219 delete_insn (bl->biv->insn);
8221 /* Update biv info to reflect its new status. */
8223 bl->initial_value = start_value;
8224 bl->biv->add_val = new_add_val;
8226 /* Update loop info. */
8227 loop_info->initial_value = reg;
8228 loop_info->initial_equiv_value = reg;
8229 loop_info->final_value = const0_rtx;
8230 loop_info->final_equiv_value = const0_rtx;
8231 loop_info->comparison_value = const0_rtx;
8232 loop_info->comparison_code = cmp_code;
8233 loop_info->increment = new_add_val;
8235 /* Inc LABEL_NUSES so that delete_insn will
8236 not delete the label. */
8237 LABEL_NUSES (XEXP (jump_label, 0)) ++;
8239 /* Emit an insn after the end of the loop to set the biv's
8240 proper exit value if it is used anywhere outside the loop. */
8241 if ((REGNO_LAST_UID (bl->regno) != INSN_UID (first_compare))
8243 || REGNO_FIRST_UID (bl->regno) != INSN_UID (bl->init_insn))
8244 emit_insn_after (gen_move_insn (reg, final_value),
8247 /* Delete compare/branch at end of loop. */
8248 delete_insn (PREV_INSN (loop_end));
8249 if (compare_and_branch == 2)
8250 delete_insn (first_compare);
8252 /* Add new compare/branch insn at end of loop. */
8254 emit_cmp_and_jump_insns (reg, const0_rtx, cmp_code, NULL_RTX,
8255 GET_MODE (reg), 0, 0,
8256 XEXP (jump_label, 0));
8257 tem = gen_sequence ();
8259 emit_jump_insn_before (tem, loop_end);
8261 for (tem = PREV_INSN (loop_end);
8262 tem && GET_CODE (tem) != JUMP_INSN;
8263 tem = PREV_INSN (tem))
8267 JUMP_LABEL (tem) = XEXP (jump_label, 0);
8273 /* Increment of LABEL_NUSES done above. */
8274 /* Register is now always nonnegative,
8275 so add REG_NONNEG note to the branch. */
8276 REG_NOTES (tem) = gen_rtx_EXPR_LIST (REG_NONNEG, reg,
8282 /* No insn may reference both the reversed and another biv or it
8283 will fail (see comment near the top of the loop reversal
8285 Earlier on, we have verified that the biv has no use except
8286 counting, or it is the only biv in this function.
8287 However, the code that computes no_use_except_counting does
8288 not verify reg notes. It's possible to have an insn that
8289 references another biv, and has a REG_EQUAL note with an
8290 expression based on the reversed biv. To avoid this case,
8291 remove all REG_EQUAL notes based on the reversed biv
8293 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
8294 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
8297 rtx set = single_set (p);
8298 /* If this is a set of a GIV based on the reversed biv, any
8299 REG_EQUAL notes should still be correct. */
8301 || GET_CODE (SET_DEST (set)) != REG
8302 || (size_t) REGNO (SET_DEST (set)) >= reg_iv_type->num_elements
8303 || REG_IV_TYPE (REGNO (SET_DEST (set))) != GENERAL_INDUCT
8304 || REG_IV_INFO (REGNO (SET_DEST (set)))->src_reg != bl->biv->src_reg)
8305 for (pnote = ®_NOTES (p); *pnote;)
8307 if (REG_NOTE_KIND (*pnote) == REG_EQUAL
8308 && reg_mentioned_p (regno_reg_rtx[bl->regno],
8310 *pnote = XEXP (*pnote, 1);
8312 pnote = &XEXP (*pnote, 1);
8316 /* Mark that this biv has been reversed. Each giv which depends
8317 on this biv, and which is also live past the end of the loop
8318 will have to be fixed up. */
8322 if (loop_dump_stream)
8324 fprintf (loop_dump_stream, "Reversed loop");
8326 fprintf (loop_dump_stream, " and added reg_nonneg\n");
8328 fprintf (loop_dump_stream, "\n");
8339 /* Verify whether the biv BL appears to be eliminable,
8340 based on the insns in the loop that refer to it.
8342 If ELIMINATE_P is non-zero, actually do the elimination.
8344 THRESHOLD and INSN_COUNT are from loop_optimize and are used to
8345 determine whether invariant insns should be placed inside or at the
8346 start of the loop. */
8349 maybe_eliminate_biv (loop, bl, eliminate_p, threshold, insn_count)
8350 const struct loop *loop;
8351 struct iv_class *bl;
8353 int threshold, insn_count;
8355 rtx reg = bl->biv->dest_reg;
8356 rtx loop_start = loop->start;
8357 rtx loop_end = loop->end;
8360 /* Scan all insns in the loop, stopping if we find one that uses the
8361 biv in a way that we cannot eliminate. */
8363 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
8365 enum rtx_code code = GET_CODE (p);
8366 rtx where = threshold >= insn_count ? loop_start : p;
8368 /* If this is a libcall that sets a giv, skip ahead to its end. */
8369 if (GET_RTX_CLASS (code) == 'i')
8371 rtx note = find_reg_note (p, REG_LIBCALL, NULL_RTX);
8375 rtx last = XEXP (note, 0);
8376 rtx set = single_set (last);
8378 if (set && GET_CODE (SET_DEST (set)) == REG)
8380 unsigned int regno = REGNO (SET_DEST (set));
8382 if (regno < max_reg_before_loop
8383 && REG_IV_TYPE (regno) == GENERAL_INDUCT
8384 && REG_IV_INFO (regno)->src_reg == bl->biv->src_reg)
8389 if ((code == INSN || code == JUMP_INSN || code == CALL_INSN)
8390 && reg_mentioned_p (reg, PATTERN (p))
8391 && ! maybe_eliminate_biv_1 (loop, PATTERN (p), p, bl,
8392 eliminate_p, where))
8394 if (loop_dump_stream)
8395 fprintf (loop_dump_stream,
8396 "Cannot eliminate biv %d: biv used in insn %d.\n",
8397 bl->regno, INSN_UID (p));
8404 if (loop_dump_stream)
8405 fprintf (loop_dump_stream, "biv %d %s eliminated.\n",
8406 bl->regno, eliminate_p ? "was" : "can be");
8413 /* INSN and REFERENCE are instructions in the same insn chain.
8414 Return non-zero if INSN is first. */
8417 loop_insn_first_p (insn, reference)
8418 rtx insn, reference;
8422 for (p = insn, q = reference; ;)
8424 /* Start with test for not first so that INSN == REFERENCE yields not
8426 if (q == insn || ! p)
8428 if (p == reference || ! q)
8431 /* Either of P or Q might be a NOTE. Notes have the same LUID as the
8432 previous insn, hence the <= comparison below does not work if
8434 if (INSN_UID (p) < max_uid_for_loop
8435 && INSN_UID (q) < max_uid_for_loop
8436 && GET_CODE (p) != NOTE)
8437 return INSN_LUID (p) <= INSN_LUID (q);
8439 if (INSN_UID (p) >= max_uid_for_loop
8440 || GET_CODE (p) == NOTE)
8442 if (INSN_UID (q) >= max_uid_for_loop)
8447 /* We are trying to eliminate BIV in INSN using GIV. Return non-zero if
8448 the offset that we have to take into account due to auto-increment /
8449 div derivation is zero. */
8451 biv_elimination_giv_has_0_offset (biv, giv, insn)
8452 struct induction *biv, *giv;
8455 /* If the giv V had the auto-inc address optimization applied
8456 to it, and INSN occurs between the giv insn and the biv
8457 insn, then we'd have to adjust the value used here.
8458 This is rare, so we don't bother to make this possible. */
8459 if (giv->auto_inc_opt
8460 && ((loop_insn_first_p (giv->insn, insn)
8461 && loop_insn_first_p (insn, biv->insn))
8462 || (loop_insn_first_p (biv->insn, insn)
8463 && loop_insn_first_p (insn, giv->insn))))
8466 /* If the giv V was derived from another giv, and INSN does
8467 not occur between the giv insn and the biv insn, then we'd
8468 have to adjust the value used here. This is rare, so we don't
8469 bother to make this possible. */
8470 if (giv->derived_from
8471 && ! (giv->always_executed
8472 && loop_insn_first_p (giv->insn, insn)
8473 && loop_insn_first_p (insn, biv->insn)))
8476 && giv->same->derived_from
8477 && ! (giv->same->always_executed
8478 && loop_insn_first_p (giv->same->insn, insn)
8479 && loop_insn_first_p (insn, biv->insn)))
8485 /* If BL appears in X (part of the pattern of INSN), see if we can
8486 eliminate its use. If so, return 1. If not, return 0.
8488 If BIV does not appear in X, return 1.
8490 If ELIMINATE_P is non-zero, actually do the elimination. WHERE indicates
8491 where extra insns should be added. Depending on how many items have been
8492 moved out of the loop, it will either be before INSN or at the start of
8496 maybe_eliminate_biv_1 (loop, x, insn, bl, eliminate_p, where)
8497 const struct loop *loop;
8499 struct iv_class *bl;
8503 enum rtx_code code = GET_CODE (x);
8504 rtx reg = bl->biv->dest_reg;
8505 enum machine_mode mode = GET_MODE (reg);
8506 struct induction *v;
8518 /* If we haven't already been able to do something with this BIV,
8519 we can't eliminate it. */
8525 /* If this sets the BIV, it is not a problem. */
8526 if (SET_DEST (x) == reg)
8529 /* If this is an insn that defines a giv, it is also ok because
8530 it will go away when the giv is reduced. */
8531 for (v = bl->giv; v; v = v->next_iv)
8532 if (v->giv_type == DEST_REG && SET_DEST (x) == v->dest_reg)
8536 if (SET_DEST (x) == cc0_rtx && SET_SRC (x) == reg)
8538 /* Can replace with any giv that was reduced and
8539 that has (MULT_VAL != 0) and (ADD_VAL == 0).
8540 Require a constant for MULT_VAL, so we know it's nonzero.
8541 ??? We disable this optimization to avoid potential
8544 for (v = bl->giv; v; v = v->next_iv)
8545 if (GET_CODE (v->mult_val) == CONST_INT && v->mult_val != const0_rtx
8546 && v->add_val == const0_rtx
8547 && ! v->ignore && ! v->maybe_dead && v->always_computable
8551 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8557 /* If the giv has the opposite direction of change,
8558 then reverse the comparison. */
8559 if (INTVAL (v->mult_val) < 0)
8560 new = gen_rtx_COMPARE (GET_MODE (v->new_reg),
8561 const0_rtx, v->new_reg);
8565 /* We can probably test that giv's reduced reg. */
8566 if (validate_change (insn, &SET_SRC (x), new, 0))
8570 /* Look for a giv with (MULT_VAL != 0) and (ADD_VAL != 0);
8571 replace test insn with a compare insn (cmp REDUCED_GIV ADD_VAL).
8572 Require a constant for MULT_VAL, so we know it's nonzero.
8573 ??? Do this only if ADD_VAL is a pointer to avoid a potential
8574 overflow problem. */
8576 for (v = bl->giv; v; v = v->next_iv)
8577 if (GET_CODE (v->mult_val) == CONST_INT && v->mult_val != const0_rtx
8578 && ! v->ignore && ! v->maybe_dead && v->always_computable
8580 && (GET_CODE (v->add_val) == SYMBOL_REF
8581 || GET_CODE (v->add_val) == LABEL_REF
8582 || GET_CODE (v->add_val) == CONST
8583 || (GET_CODE (v->add_val) == REG
8584 && REGNO_POINTER_FLAG (REGNO (v->add_val)))))
8586 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8592 /* If the giv has the opposite direction of change,
8593 then reverse the comparison. */
8594 if (INTVAL (v->mult_val) < 0)
8595 new = gen_rtx_COMPARE (VOIDmode, copy_rtx (v->add_val),
8598 new = gen_rtx_COMPARE (VOIDmode, v->new_reg,
8599 copy_rtx (v->add_val));
8601 /* Replace biv with the giv's reduced register. */
8602 update_reg_last_use (v->add_val, insn);
8603 if (validate_change (insn, &SET_SRC (PATTERN (insn)), new, 0))
8606 /* Insn doesn't support that constant or invariant. Copy it
8607 into a register (it will be a loop invariant.) */
8608 tem = gen_reg_rtx (GET_MODE (v->new_reg));
8610 emit_insn_before (gen_move_insn (tem, copy_rtx (v->add_val)),
8613 /* Substitute the new register for its invariant value in
8614 the compare expression. */
8615 XEXP (new, (INTVAL (v->mult_val) < 0) ? 0 : 1) = tem;
8616 if (validate_change (insn, &SET_SRC (PATTERN (insn)), new, 0))
8625 case GT: case GE: case GTU: case GEU:
8626 case LT: case LE: case LTU: case LEU:
8627 /* See if either argument is the biv. */
8628 if (XEXP (x, 0) == reg)
8629 arg = XEXP (x, 1), arg_operand = 1;
8630 else if (XEXP (x, 1) == reg)
8631 arg = XEXP (x, 0), arg_operand = 0;
8635 if (CONSTANT_P (arg))
8637 /* First try to replace with any giv that has constant positive
8638 mult_val and constant add_val. We might be able to support
8639 negative mult_val, but it seems complex to do it in general. */
8641 for (v = bl->giv; v; v = v->next_iv)
8642 if (GET_CODE (v->mult_val) == CONST_INT && INTVAL (v->mult_val) > 0
8643 && (GET_CODE (v->add_val) == SYMBOL_REF
8644 || GET_CODE (v->add_val) == LABEL_REF
8645 || GET_CODE (v->add_val) == CONST
8646 || (GET_CODE (v->add_val) == REG
8647 && REGNO_POINTER_FLAG (REGNO (v->add_val))))
8648 && ! v->ignore && ! v->maybe_dead && v->always_computable
8651 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8657 /* Replace biv with the giv's reduced reg. */
8658 validate_change (insn, &XEXP (x, 1-arg_operand), v->new_reg, 1);
8660 /* If all constants are actually constant integers and
8661 the derived constant can be directly placed in the COMPARE,
8663 if (GET_CODE (arg) == CONST_INT
8664 && GET_CODE (v->mult_val) == CONST_INT
8665 && GET_CODE (v->add_val) == CONST_INT)
8667 validate_change (insn, &XEXP (x, arg_operand),
8668 GEN_INT (INTVAL (arg)
8669 * INTVAL (v->mult_val)
8670 + INTVAL (v->add_val)), 1);
8674 /* Otherwise, load it into a register. */
8675 tem = gen_reg_rtx (mode);
8676 emit_iv_add_mult (arg, v->mult_val, v->add_val, tem, where);
8677 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
8679 if (apply_change_group ())
8683 /* Look for giv with positive constant mult_val and nonconst add_val.
8684 Insert insns to calculate new compare value.
8685 ??? Turn this off due to possible overflow. */
8687 for (v = bl->giv; v; v = v->next_iv)
8688 if (GET_CODE (v->mult_val) == CONST_INT && INTVAL (v->mult_val) > 0
8689 && ! v->ignore && ! v->maybe_dead && v->always_computable
8695 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8701 tem = gen_reg_rtx (mode);
8703 /* Replace biv with giv's reduced register. */
8704 validate_change (insn, &XEXP (x, 1 - arg_operand),
8707 /* Compute value to compare against. */
8708 emit_iv_add_mult (arg, v->mult_val, v->add_val, tem, where);
8709 /* Use it in this insn. */
8710 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
8711 if (apply_change_group ())
8715 else if (GET_CODE (arg) == REG || GET_CODE (arg) == MEM)
8717 if (loop_invariant_p (loop, arg) == 1)
8719 /* Look for giv with constant positive mult_val and nonconst
8720 add_val. Insert insns to compute new compare value.
8721 ??? Turn this off due to possible overflow. */
8723 for (v = bl->giv; v; v = v->next_iv)
8724 if (GET_CODE (v->mult_val) == CONST_INT && INTVAL (v->mult_val) > 0
8725 && ! v->ignore && ! v->maybe_dead && v->always_computable
8731 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8737 tem = gen_reg_rtx (mode);
8739 /* Replace biv with giv's reduced register. */
8740 validate_change (insn, &XEXP (x, 1 - arg_operand),
8743 /* Compute value to compare against. */
8744 emit_iv_add_mult (arg, v->mult_val, v->add_val,
8746 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
8747 if (apply_change_group ())
8752 /* This code has problems. Basically, you can't know when
8753 seeing if we will eliminate BL, whether a particular giv
8754 of ARG will be reduced. If it isn't going to be reduced,
8755 we can't eliminate BL. We can try forcing it to be reduced,
8756 but that can generate poor code.
8758 The problem is that the benefit of reducing TV, below should
8759 be increased if BL can actually be eliminated, but this means
8760 we might have to do a topological sort of the order in which
8761 we try to process biv. It doesn't seem worthwhile to do
8762 this sort of thing now. */
8765 /* Otherwise the reg compared with had better be a biv. */
8766 if (GET_CODE (arg) != REG
8767 || REG_IV_TYPE (REGNO (arg)) != BASIC_INDUCT)
8770 /* Look for a pair of givs, one for each biv,
8771 with identical coefficients. */
8772 for (v = bl->giv; v; v = v->next_iv)
8774 struct induction *tv;
8776 if (v->ignore || v->maybe_dead || v->mode != mode)
8779 for (tv = reg_biv_class[REGNO (arg)]->giv; tv; tv = tv->next_iv)
8780 if (! tv->ignore && ! tv->maybe_dead
8781 && rtx_equal_p (tv->mult_val, v->mult_val)
8782 && rtx_equal_p (tv->add_val, v->add_val)
8783 && tv->mode == mode)
8785 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8791 /* Replace biv with its giv's reduced reg. */
8792 XEXP (x, 1-arg_operand) = v->new_reg;
8793 /* Replace other operand with the other giv's
8795 XEXP (x, arg_operand) = tv->new_reg;
8802 /* If we get here, the biv can't be eliminated. */
8806 /* If this address is a DEST_ADDR giv, it doesn't matter if the
8807 biv is used in it, since it will be replaced. */
8808 for (v = bl->giv; v; v = v->next_iv)
8809 if (v->giv_type == DEST_ADDR && v->location == &XEXP (x, 0))
8817 /* See if any subexpression fails elimination. */
8818 fmt = GET_RTX_FORMAT (code);
8819 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
8824 if (! maybe_eliminate_biv_1 (loop, XEXP (x, i), insn, bl,
8825 eliminate_p, where))
8830 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
8831 if (! maybe_eliminate_biv_1 (loop, XVECEXP (x, i, j), insn, bl,
8832 eliminate_p, where))
8841 /* Return nonzero if the last use of REG
8842 is in an insn following INSN in the same basic block. */
8845 last_use_this_basic_block (reg, insn)
8851 n && GET_CODE (n) != CODE_LABEL && GET_CODE (n) != JUMP_INSN;
8854 if (REGNO_LAST_UID (REGNO (reg)) == INSN_UID (n))
8860 /* Called via `note_stores' to record the initial value of a biv. Here we
8861 just record the location of the set and process it later. */
8864 record_initial (dest, set, data)
8867 void *data ATTRIBUTE_UNUSED;
8869 struct iv_class *bl;
8871 if (GET_CODE (dest) != REG
8872 || REGNO (dest) >= max_reg_before_loop
8873 || REG_IV_TYPE (REGNO (dest)) != BASIC_INDUCT)
8876 bl = reg_biv_class[REGNO (dest)];
8878 /* If this is the first set found, record it. */
8879 if (bl->init_insn == 0)
8881 bl->init_insn = note_insn;
8886 /* If any of the registers in X are "old" and currently have a last use earlier
8887 than INSN, update them to have a last use of INSN. Their actual last use
8888 will be the previous insn but it will not have a valid uid_luid so we can't
8892 update_reg_last_use (x, insn)
8896 /* Check for the case where INSN does not have a valid luid. In this case,
8897 there is no need to modify the regno_last_uid, as this can only happen
8898 when code is inserted after the loop_end to set a pseudo's final value,
8899 and hence this insn will never be the last use of x. */
8900 if (GET_CODE (x) == REG && REGNO (x) < max_reg_before_loop
8901 && INSN_UID (insn) < max_uid_for_loop
8902 && uid_luid[REGNO_LAST_UID (REGNO (x))] < uid_luid[INSN_UID (insn)])
8903 REGNO_LAST_UID (REGNO (x)) = INSN_UID (insn);
8907 register const char *fmt = GET_RTX_FORMAT (GET_CODE (x));
8908 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
8911 update_reg_last_use (XEXP (x, i), insn);
8912 else if (fmt[i] == 'E')
8913 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
8914 update_reg_last_use (XVECEXP (x, i, j), insn);
8919 /* Given an insn INSN and condition COND, return the condition in a
8920 canonical form to simplify testing by callers. Specifically:
8922 (1) The code will always be a comparison operation (EQ, NE, GT, etc.).
8923 (2) Both operands will be machine operands; (cc0) will have been replaced.
8924 (3) If an operand is a constant, it will be the second operand.
8925 (4) (LE x const) will be replaced with (LT x <const+1>) and similarly
8926 for GE, GEU, and LEU.
8928 If the condition cannot be understood, or is an inequality floating-point
8929 comparison which needs to be reversed, 0 will be returned.
8931 If REVERSE is non-zero, then reverse the condition prior to canonizing it.
8933 If EARLIEST is non-zero, it is a pointer to a place where the earliest
8934 insn used in locating the condition was found. If a replacement test
8935 of the condition is desired, it should be placed in front of that
8936 insn and we will be sure that the inputs are still valid.
8938 If WANT_REG is non-zero, we wish the condition to be relative to that
8939 register, if possible. Therefore, do not canonicalize the condition
8943 canonicalize_condition (insn, cond, reverse, earliest, want_reg)
8955 int reverse_code = 0;
8956 int did_reverse_condition = 0;
8957 enum machine_mode mode;
8959 code = GET_CODE (cond);
8960 mode = GET_MODE (cond);
8961 op0 = XEXP (cond, 0);
8962 op1 = XEXP (cond, 1);
8966 code = reverse_condition (code);
8967 did_reverse_condition ^= 1;
8973 /* If we are comparing a register with zero, see if the register is set
8974 in the previous insn to a COMPARE or a comparison operation. Perform
8975 the same tests as a function of STORE_FLAG_VALUE as find_comparison_args
8978 while (GET_RTX_CLASS (code) == '<'
8979 && op1 == CONST0_RTX (GET_MODE (op0))
8982 /* Set non-zero when we find something of interest. */
8986 /* If comparison with cc0, import actual comparison from compare
8990 if ((prev = prev_nonnote_insn (prev)) == 0
8991 || GET_CODE (prev) != INSN
8992 || (set = single_set (prev)) == 0
8993 || SET_DEST (set) != cc0_rtx)
8996 op0 = SET_SRC (set);
8997 op1 = CONST0_RTX (GET_MODE (op0));
9003 /* If this is a COMPARE, pick up the two things being compared. */
9004 if (GET_CODE (op0) == COMPARE)
9006 op1 = XEXP (op0, 1);
9007 op0 = XEXP (op0, 0);
9010 else if (GET_CODE (op0) != REG)
9013 /* Go back to the previous insn. Stop if it is not an INSN. We also
9014 stop if it isn't a single set or if it has a REG_INC note because
9015 we don't want to bother dealing with it. */
9017 if ((prev = prev_nonnote_insn (prev)) == 0
9018 || GET_CODE (prev) != INSN
9019 || FIND_REG_INC_NOTE (prev, 0)
9020 || (set = single_set (prev)) == 0)
9023 /* If this is setting OP0, get what it sets it to if it looks
9025 if (rtx_equal_p (SET_DEST (set), op0))
9027 enum machine_mode inner_mode = GET_MODE (SET_SRC (set));
9029 /* ??? We may not combine comparisons done in a CCmode with
9030 comparisons not done in a CCmode. This is to aid targets
9031 like Alpha that have an IEEE compliant EQ instruction, and
9032 a non-IEEE compliant BEQ instruction. The use of CCmode is
9033 actually artificial, simply to prevent the combination, but
9034 should not affect other platforms.
9036 However, we must allow VOIDmode comparisons to match either
9037 CCmode or non-CCmode comparison, because some ports have
9038 modeless comparisons inside branch patterns.
9040 ??? This mode check should perhaps look more like the mode check
9041 in simplify_comparison in combine. */
9043 if ((GET_CODE (SET_SRC (set)) == COMPARE
9046 && GET_MODE_CLASS (inner_mode) == MODE_INT
9047 && (GET_MODE_BITSIZE (inner_mode)
9048 <= HOST_BITS_PER_WIDE_INT)
9049 && (STORE_FLAG_VALUE
9050 & ((HOST_WIDE_INT) 1
9051 << (GET_MODE_BITSIZE (inner_mode) - 1))))
9052 #ifdef FLOAT_STORE_FLAG_VALUE
9054 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
9055 && (REAL_VALUE_NEGATIVE
9056 (FLOAT_STORE_FLAG_VALUE (inner_mode))))
9059 && GET_RTX_CLASS (GET_CODE (SET_SRC (set))) == '<'))
9060 && (((GET_MODE_CLASS (mode) == MODE_CC)
9061 == (GET_MODE_CLASS (inner_mode) == MODE_CC))
9062 || mode == VOIDmode || inner_mode == VOIDmode))
9064 else if (((code == EQ
9066 && (GET_MODE_BITSIZE (inner_mode)
9067 <= HOST_BITS_PER_WIDE_INT)
9068 && GET_MODE_CLASS (inner_mode) == MODE_INT
9069 && (STORE_FLAG_VALUE
9070 & ((HOST_WIDE_INT) 1
9071 << (GET_MODE_BITSIZE (inner_mode) - 1))))
9072 #ifdef FLOAT_STORE_FLAG_VALUE
9074 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
9075 && (REAL_VALUE_NEGATIVE
9076 (FLOAT_STORE_FLAG_VALUE (inner_mode))))
9079 && GET_RTX_CLASS (GET_CODE (SET_SRC (set))) == '<'
9080 && (((GET_MODE_CLASS (mode) == MODE_CC)
9081 == (GET_MODE_CLASS (inner_mode) == MODE_CC))
9082 || mode == VOIDmode || inner_mode == VOIDmode))
9085 /* We might have reversed a LT to get a GE here. But this wasn't
9086 actually the comparison of data, so we don't flag that we
9087 have had to reverse the condition. */
9088 did_reverse_condition ^= 1;
9096 else if (reg_set_p (op0, prev))
9097 /* If this sets OP0, but not directly, we have to give up. */
9102 if (GET_RTX_CLASS (GET_CODE (x)) == '<')
9103 code = GET_CODE (x);
9106 code = reverse_condition (code);
9107 if (code == UNKNOWN)
9109 did_reverse_condition ^= 1;
9113 op0 = XEXP (x, 0), op1 = XEXP (x, 1);
9119 /* If constant is first, put it last. */
9120 if (CONSTANT_P (op0))
9121 code = swap_condition (code), tem = op0, op0 = op1, op1 = tem;
9123 /* If OP0 is the result of a comparison, we weren't able to find what
9124 was really being compared, so fail. */
9125 if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_CC)
9128 /* Canonicalize any ordered comparison with integers involving equality
9129 if we can do computations in the relevant mode and we do not
9132 if (GET_CODE (op1) == CONST_INT
9133 && GET_MODE (op0) != VOIDmode
9134 && GET_MODE_BITSIZE (GET_MODE (op0)) <= HOST_BITS_PER_WIDE_INT)
9136 HOST_WIDE_INT const_val = INTVAL (op1);
9137 unsigned HOST_WIDE_INT uconst_val = const_val;
9138 unsigned HOST_WIDE_INT max_val
9139 = (unsigned HOST_WIDE_INT) GET_MODE_MASK (GET_MODE (op0));
9144 if ((unsigned HOST_WIDE_INT) const_val != max_val >> 1)
9145 code = LT, op1 = GEN_INT (const_val + 1);
9148 /* When cross-compiling, const_val might be sign-extended from
9149 BITS_PER_WORD to HOST_BITS_PER_WIDE_INT */
9151 if ((HOST_WIDE_INT) (const_val & max_val)
9152 != (((HOST_WIDE_INT) 1
9153 << (GET_MODE_BITSIZE (GET_MODE (op0)) - 1))))
9154 code = GT, op1 = GEN_INT (const_val - 1);
9158 if (uconst_val < max_val)
9159 code = LTU, op1 = GEN_INT (uconst_val + 1);
9163 if (uconst_val != 0)
9164 code = GTU, op1 = GEN_INT (uconst_val - 1);
9172 /* If this was floating-point and we reversed anything other than an
9173 EQ or NE or (UN)ORDERED, return zero. */
9174 if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT
9175 && did_reverse_condition
9176 && code != NE && code != EQ && code != UNORDERED && code != ORDERED
9178 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_FLOAT)
9182 /* Never return CC0; return zero instead. */
9187 return gen_rtx_fmt_ee (code, VOIDmode, op0, op1);
9190 /* Given a jump insn JUMP, return the condition that will cause it to branch
9191 to its JUMP_LABEL. If the condition cannot be understood, or is an
9192 inequality floating-point comparison which needs to be reversed, 0 will
9195 If EARLIEST is non-zero, it is a pointer to a place where the earliest
9196 insn used in locating the condition was found. If a replacement test
9197 of the condition is desired, it should be placed in front of that
9198 insn and we will be sure that the inputs are still valid. */
9201 get_condition (jump, earliest)
9209 /* If this is not a standard conditional jump, we can't parse it. */
9210 if (GET_CODE (jump) != JUMP_INSN
9211 || ! any_condjump_p (jump))
9213 set = pc_set (jump);
9215 cond = XEXP (SET_SRC (set), 0);
9217 /* If this branches to JUMP_LABEL when the condition is false, reverse
9220 = GET_CODE (XEXP (SET_SRC (set), 2)) == LABEL_REF
9221 && XEXP (XEXP (SET_SRC (set), 2), 0) == JUMP_LABEL (jump);
9223 return canonicalize_condition (jump, cond, reverse, earliest, NULL_RTX);
9226 /* Similar to above routine, except that we also put an invariant last
9227 unless both operands are invariants. */
9230 get_condition_for_loop (loop, x)
9231 const struct loop *loop;
9234 rtx comparison = get_condition (x, NULL_PTR);
9237 || ! loop_invariant_p (loop, XEXP (comparison, 0))
9238 || loop_invariant_p (loop, XEXP (comparison, 1)))
9241 return gen_rtx_fmt_ee (swap_condition (GET_CODE (comparison)), VOIDmode,
9242 XEXP (comparison, 1), XEXP (comparison, 0));
9245 #ifdef HAVE_decrement_and_branch_on_count
9246 /* Instrument loop for insertion of bct instruction. We distinguish between
9247 loops with compile-time bounds and those with run-time bounds.
9248 Information from loop_iterations() is used to compute compile-time bounds.
9249 Run-time bounds should use loop preconditioning, but currently ignored.
9256 unsigned HOST_WIDE_INT n_iterations;
9257 rtx loop_start = loop->start;
9258 rtx loop_end = loop->end;
9259 struct loop_info *loop_info = LOOP_INFO (loop);
9260 int loop_num = loop->num;
9263 int increment_direction, compare_direction;
9264 /* If the loop condition is <= or >=, the number of iteration
9265 is 1 more than the range of the bounds of the loop. */
9266 int add_iteration = 0;
9267 enum machine_mode loop_var_mode = word_mode;
9270 /* It's impossible to instrument a competely unrolled loop. */
9271 if (loop_info->unroll_number == loop_info->n_iterations)
9274 /* Make sure that the count register is not in use. */
9275 if (loop_info->used_count_register)
9277 if (loop_dump_stream)
9278 fprintf (loop_dump_stream,
9279 "insert_bct %d: BCT instrumentation failed: count register already in use\n",
9284 /* Make sure that the function has no indirect jumps. */
9285 if (indirect_jump_in_function)
9287 if (loop_dump_stream)
9288 fprintf (loop_dump_stream,
9289 "insert_bct %d: BCT instrumentation failed: indirect jump in function\n",
9294 /* Make sure that the last loop insn is a conditional jump. */
9295 if (GET_CODE (PREV_INSN (loop_end)) != JUMP_INSN
9296 || ! onlyjump_p (PREV_INSN (loop_end))
9297 || ! any_condjump_p (PREV_INSN (loop_end)))
9299 if (loop_dump_stream)
9300 fprintf (loop_dump_stream,
9301 "insert_bct %d: BCT instrumentation failed: invalid jump at loop end\n",
9306 /* Make sure that the loop does not contain a function call
9307 (the count register might be altered by the called function). */
9308 if (loop_info->has_call)
9310 if (loop_dump_stream)
9311 fprintf (loop_dump_stream,
9312 "insert_bct %d: BCT instrumentation failed: function call in loop\n",
9317 /* Make sure that the loop does not jump via a table.
9318 (the count register might be used to perform the branch on table). */
9319 if (loop_info->has_tablejump)
9321 if (loop_dump_stream)
9322 fprintf (loop_dump_stream,
9323 "insert_bct %d: BCT instrumentation failed: computed branch in the loop\n",
9328 /* Account for loop unrolling in instrumented iteration count. */
9329 if (loop_info->unroll_number > 1)
9330 n_iterations = loop_info->n_iterations / loop_info->unroll_number;
9332 n_iterations = loop_info->n_iterations;
9334 if (n_iterations != 0 && n_iterations < 3)
9336 /* Allow an enclosing outer loop to benefit if possible. */
9337 if (loop_dump_stream)
9338 fprintf (loop_dump_stream,
9339 "insert_bct %d: Too few iterations to benefit from BCT optimization\n",
9344 /* Try to instrument the loop. */
9346 /* Handle the simpler case, where the bounds are known at compile time. */
9347 if (n_iterations > 0)
9349 struct loop *outer_loop;
9350 struct loop_info *outer_loop_info;
9352 /* Mark all enclosing loops that they cannot use count register. */
9353 for (outer_loop = loop; outer_loop; outer_loop = outer_loop->outer)
9355 outer_loop_info = LOOP_INFO (outer_loop);
9356 outer_loop_info->used_count_register = 1;
9358 instrument_loop_bct (loop_start, loop_end, GEN_INT (n_iterations));
9362 /* Handle the more complex case, that the bounds are NOT known
9363 at compile time. In this case we generate run_time calculation
9364 of the number of iterations. */
9366 if (loop_info->iteration_var == 0)
9368 if (loop_dump_stream)
9369 fprintf (loop_dump_stream,
9370 "insert_bct %d: BCT Runtime Instrumentation failed: no loop iteration variable found\n",
9375 if (GET_MODE_CLASS (GET_MODE (loop_info->iteration_var)) != MODE_INT
9376 || GET_MODE_SIZE (GET_MODE (loop_info->iteration_var)) != UNITS_PER_WORD)
9378 if (loop_dump_stream)
9379 fprintf (loop_dump_stream,
9380 "insert_bct %d: BCT Runtime Instrumentation failed: loop variable not integer\n",
9385 /* With runtime bounds, if the compare is of the form '!=' we give up */
9386 if (loop_info->comparison_code == NE)
9388 if (loop_dump_stream)
9389 fprintf (loop_dump_stream,
9390 "insert_bct %d: BCT Runtime Instrumentation failed: runtime bounds with != comparison\n",
9394 /* Use common loop preconditioning code instead. */
9398 /* We rely on the existence of run-time guard to ensure that the
9399 loop executes at least once. */
9401 rtx iterations_num_reg;
9403 unsigned HOST_WIDE_INT increment_value_abs
9404 = INTVAL (increment) * increment_direction;
9406 /* make sure that the increment is a power of two, otherwise (an
9407 expensive) divide is needed. */
9408 if (exact_log2 (increment_value_abs) == -1)
9410 if (loop_dump_stream)
9411 fprintf (loop_dump_stream,
9412 "insert_bct: not instrumenting BCT because the increment is not power of 2\n");
9416 /* compute the number of iterations */
9421 /* Again, the number of iterations is calculated by:
9423 ; compare-val - initial-val + (increment -1) + additional-iteration
9424 ; num_iterations = -----------------------------------------------------------------
9427 /* ??? Do we have to call copy_rtx here before passing rtx to
9429 if (compare_direction > 0)
9431 /* <, <= :the loop variable is increasing */
9432 temp_reg = expand_binop (loop_var_mode, sub_optab,
9433 comparison_value, initial_value,
9434 NULL_RTX, 0, OPTAB_LIB_WIDEN);
9438 temp_reg = expand_binop (loop_var_mode, sub_optab,
9439 initial_value, comparison_value,
9440 NULL_RTX, 0, OPTAB_LIB_WIDEN);
9443 if (increment_value_abs - 1 + add_iteration != 0)
9444 temp_reg = expand_binop (loop_var_mode, add_optab, temp_reg,
9445 GEN_INT (increment_value_abs - 1
9447 NULL_RTX, 0, OPTAB_LIB_WIDEN);
9449 if (increment_value_abs != 1)
9450 iterations_num_reg = expand_binop (loop_var_mode, asr_optab,
9452 GEN_INT (exact_log2 (increment_value_abs)),
9453 NULL_RTX, 0, OPTAB_LIB_WIDEN);
9455 iterations_num_reg = temp_reg;
9457 sequence = gen_sequence ();
9459 emit_insn_before (sequence, loop_start);
9460 instrument_loop_bct (loop_start, loop_end, iterations_num_reg);
9464 #endif /* Complex case */
9467 /* Instrument loop by inserting a bct in it as follows:
9468 1. A new counter register is created.
9469 2. In the head of the loop the new variable is initialized to the value
9470 passed in the loop_num_iterations parameter.
9471 3. At the end of the loop, comparison of the register with 0 is generated.
9472 The created comparison follows the pattern defined for the
9473 decrement_and_branch_on_count insn, so this insn will be generated.
9474 4. The branch on the old variable are deleted. The compare must remain
9475 because it might be used elsewhere. If the loop-variable or condition
9476 register are used elsewhere, they will be eliminated by flow. */
9479 instrument_loop_bct (loop_start, loop_end, loop_num_iterations)
9480 rtx loop_start, loop_end;
9481 rtx loop_num_iterations;
9487 if (HAVE_decrement_and_branch_on_count)
9489 if (loop_dump_stream)
9491 fputs ("instrument_bct: Inserting BCT (", loop_dump_stream);
9492 if (GET_CODE (loop_num_iterations) == CONST_INT)
9493 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC,
9494 INTVAL (loop_num_iterations));
9496 fputs ("runtime", loop_dump_stream);
9497 fputs (" iterations)", loop_dump_stream);
9500 /* Discard original jump to continue loop. Original compare result
9501 may still be live, so it cannot be discarded explicitly. */
9502 delete_insn (PREV_INSN (loop_end));
9504 /* Insert the label which will delimit the start of the loop. */
9505 start_label = gen_label_rtx ();
9506 emit_label_after (start_label, loop_start);
9508 /* Insert initialization of the count register into the loop header. */
9510 counter_reg = gen_reg_rtx (word_mode);
9511 emit_insn (gen_move_insn (counter_reg, loop_num_iterations));
9512 sequence = gen_sequence ();
9514 emit_insn_before (sequence, loop_start);
9516 /* Insert new comparison on the count register instead of the
9517 old one, generating the needed BCT pattern (that will be
9518 later recognized by assembly generation phase). */
9519 sequence = emit_jump_insn_before (
9520 gen_decrement_and_branch_on_count (counter_reg, start_label),
9523 if (GET_CODE (sequence) != JUMP_INSN)
9525 JUMP_LABEL (sequence) = start_label;
9526 LABEL_NUSES (start_label)++;
9529 #endif /* HAVE_decrement_and_branch_on_count */
9531 /* Scan the function and determine whether it has indirect (computed) jumps.
9533 This is taken mostly from flow.c; similar code exists elsewhere
9534 in the compiler. It may be useful to put this into rtlanal.c. */
9536 indirect_jump_in_function_p (start)
9541 for (insn = start; insn; insn = NEXT_INSN (insn))
9542 if (computed_jump_p (insn))
9548 /* Add MEM to the LOOP_MEMS array, if appropriate. See the
9549 documentation for LOOP_MEMS for the definition of `appropriate'.
9550 This function is called from prescan_loop via for_each_rtx. */
9553 insert_loop_mem (mem, data)
9555 void *data ATTRIBUTE_UNUSED;
9563 switch (GET_CODE (m))
9569 /* We're not interested in MEMs that are only clobbered. */
9573 /* We're not interested in the MEM associated with a
9574 CONST_DOUBLE, so there's no need to traverse into this. */
9578 /* We're not interested in any MEMs that only appear in notes. */
9582 /* This is not a MEM. */
9586 /* See if we've already seen this MEM. */
9587 for (i = 0; i < loop_mems_idx; ++i)
9588 if (rtx_equal_p (m, loop_mems[i].mem))
9590 if (GET_MODE (m) != GET_MODE (loop_mems[i].mem))
9591 /* The modes of the two memory accesses are different. If
9592 this happens, something tricky is going on, and we just
9593 don't optimize accesses to this MEM. */
9594 loop_mems[i].optimize = 0;
9599 /* Resize the array, if necessary. */
9600 if (loop_mems_idx == loop_mems_allocated)
9602 if (loop_mems_allocated != 0)
9603 loop_mems_allocated *= 2;
9605 loop_mems_allocated = 32;
9607 loop_mems = (loop_mem_info*)
9608 xrealloc (loop_mems,
9609 loop_mems_allocated * sizeof (loop_mem_info));
9612 /* Actually insert the MEM. */
9613 loop_mems[loop_mems_idx].mem = m;
9614 /* We can't hoist this MEM out of the loop if it's a BLKmode MEM
9615 because we can't put it in a register. We still store it in the
9616 table, though, so that if we see the same address later, but in a
9617 non-BLK mode, we'll not think we can optimize it at that point. */
9618 loop_mems[loop_mems_idx].optimize = (GET_MODE (m) != BLKmode);
9619 loop_mems[loop_mems_idx].reg = NULL_RTX;
9625 /* Like load_mems, but also ensures that SET_IN_LOOP,
9626 MAY_NOT_OPTIMIZE, REG_SINGLE_USAGE, and INSN_COUNT have the correct
9627 values after load_mems. */
9630 load_mems_and_recount_loop_regs_set (loop, insn_count)
9631 const struct loop *loop;
9634 int nregs = max_reg_num ();
9638 /* Recalculate set_in_loop and friends since load_mems may have
9639 created new registers. */
9640 if (max_reg_num () > nregs)
9646 nregs = max_reg_num ();
9648 if ((unsigned) nregs > set_in_loop->num_elements)
9650 /* Grow all the arrays. */
9651 VARRAY_GROW (set_in_loop, nregs);
9652 VARRAY_GROW (n_times_set, nregs);
9653 VARRAY_GROW (may_not_optimize, nregs);
9654 VARRAY_GROW (reg_single_usage, nregs);
9656 /* Clear the arrays */
9657 bzero ((char *) &set_in_loop->data, nregs * sizeof (int));
9658 bzero ((char *) &may_not_optimize->data, nregs * sizeof (char));
9659 bzero ((char *) ®_single_usage->data, nregs * sizeof (rtx));
9661 count_loop_regs_set (loop->top ? loop->top : loop->start, loop->end,
9662 may_not_optimize, reg_single_usage,
9665 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
9667 VARRAY_CHAR (may_not_optimize, i) = 1;
9668 VARRAY_INT (set_in_loop, i) = 1;
9671 #ifdef AVOID_CCMODE_COPIES
9672 /* Don't try to move insns which set CC registers if we should not
9673 create CCmode register copies. */
9674 for (i = max_reg_num () - 1; i >= FIRST_PSEUDO_REGISTER; i--)
9675 if (GET_MODE_CLASS (GET_MODE (regno_reg_rtx[i])) == MODE_CC)
9676 VARRAY_CHAR (may_not_optimize, i) = 1;
9679 /* Set n_times_set for the new registers. */
9680 bcopy ((char *) (&set_in_loop->data.i[0] + old_nregs),
9681 (char *) (&n_times_set->data.i[0] + old_nregs),
9682 (nregs - old_nregs) * sizeof (int));
9686 /* Move MEMs into registers for the duration of the loop. */
9690 const struct loop *loop;
9692 int maybe_never = 0;
9695 rtx label = NULL_RTX;
9696 rtx end_label = NULL_RTX;
9697 /* Nonzero if the next instruction may never be executed. */
9698 int next_maybe_never = 0;
9699 int last_max_reg = max_reg_num ();
9701 if (loop_mems_idx == 0)
9704 /* Find start of the extended basic block that enters the loop. */
9705 for (p = loop->start;
9706 PREV_INSN (p) && GET_CODE (p) != CODE_LABEL;
9712 /* Build table of mems that get set to constant values before the
9714 for (; p != loop->start; p = NEXT_INSN (p))
9715 cselib_process_insn (p);
9717 /* Check to see if it's possible that some instructions in the
9718 loop are never executed. */
9719 for (p = next_insn_in_loop (loop, loop->scan_start);
9720 p != NULL_RTX && ! maybe_never;
9721 p = next_insn_in_loop (loop, p))
9723 if (GET_CODE (p) == CODE_LABEL)
9725 else if (GET_CODE (p) == JUMP_INSN
9726 /* If we enter the loop in the middle, and scan
9727 around to the beginning, don't set maybe_never
9728 for that. This must be an unconditional jump,
9729 otherwise the code at the top of the loop might
9730 never be executed. Unconditional jumps are
9731 followed a by barrier then loop end. */
9732 && ! (GET_CODE (p) == JUMP_INSN
9733 && JUMP_LABEL (p) == loop->top
9734 && NEXT_INSN (NEXT_INSN (p)) == loop->end
9735 && any_uncondjump_p (p)))
9737 if (!any_condjump_p (p))
9738 /* Something complicated. */
9741 /* If there are any more instructions in the loop, they
9742 might not be reached. */
9743 next_maybe_never = 1;
9745 else if (next_maybe_never)
9749 /* Actually move the MEMs. */
9750 for (i = 0; i < loop_mems_idx; ++i)
9755 rtx mem = loop_mems[i].mem;
9758 if (MEM_VOLATILE_P (mem)
9759 || loop_invariant_p (loop, XEXP (mem, 0)) != 1)
9760 /* There's no telling whether or not MEM is modified. */
9761 loop_mems[i].optimize = 0;
9763 /* Go through the MEMs written to in the loop to see if this
9764 one is aliased by one of them. */
9765 mem_list_entry = loop_store_mems;
9766 while (mem_list_entry)
9768 if (rtx_equal_p (mem, XEXP (mem_list_entry, 0)))
9770 else if (true_dependence (XEXP (mem_list_entry, 0), VOIDmode,
9773 /* MEM is indeed aliased by this store. */
9774 loop_mems[i].optimize = 0;
9777 mem_list_entry = XEXP (mem_list_entry, 1);
9780 if (flag_float_store && written
9781 && GET_MODE_CLASS (GET_MODE (mem)) == MODE_FLOAT)
9782 loop_mems[i].optimize = 0;
9784 /* If this MEM is written to, we must be sure that there
9785 are no reads from another MEM that aliases this one. */
9786 if (loop_mems[i].optimize && written)
9790 for (j = 0; j < loop_mems_idx; ++j)
9794 else if (true_dependence (mem,
9799 /* It's not safe to hoist loop_mems[i] out of
9800 the loop because writes to it might not be
9801 seen by reads from loop_mems[j]. */
9802 loop_mems[i].optimize = 0;
9808 if (maybe_never && may_trap_p (mem))
9809 /* We can't access the MEM outside the loop; it might
9810 cause a trap that wouldn't have happened otherwise. */
9811 loop_mems[i].optimize = 0;
9813 if (!loop_mems[i].optimize)
9814 /* We thought we were going to lift this MEM out of the
9815 loop, but later discovered that we could not. */
9818 INIT_REG_SET (&copies);
9820 /* Allocate a pseudo for this MEM. We set REG_USERVAR_P in
9821 order to keep scan_loop from moving stores to this MEM
9822 out of the loop just because this REG is neither a
9823 user-variable nor used in the loop test. */
9824 reg = gen_reg_rtx (GET_MODE (mem));
9825 REG_USERVAR_P (reg) = 1;
9826 loop_mems[i].reg = reg;
9828 /* Now, replace all references to the MEM with the
9829 corresponding pesudos. */
9831 for (p = next_insn_in_loop (loop, loop->scan_start);
9833 p = next_insn_in_loop (loop, p))
9838 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
9840 /* See if this copies the mem into a register that isn't
9841 modified afterwards. We'll try to do copy propagation
9842 a little further on. */
9843 set = single_set (p);
9845 /* @@@ This test is _way_ too conservative. */
9847 && GET_CODE (SET_DEST (set)) == REG
9848 && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER
9849 && REGNO (SET_DEST (set)) < last_max_reg
9850 && VARRAY_INT (n_times_set, REGNO (SET_DEST (set))) == 1
9851 && rtx_equal_p (SET_SRC (set), loop_mems[i].mem))
9852 SET_REGNO_REG_SET (&copies, REGNO (SET_DEST (set)));
9855 for_each_rtx (&p, replace_loop_mem, &ri);
9858 if (GET_CODE (p) == CODE_LABEL
9859 || GET_CODE (p) == JUMP_INSN)
9863 if (! apply_change_group ())
9864 /* We couldn't replace all occurrences of the MEM. */
9865 loop_mems[i].optimize = 0;
9868 /* Load the memory immediately before LOOP->START, which is
9869 the NOTE_LOOP_BEG. */
9870 cselib_val *e = cselib_lookup (mem, VOIDmode, 0);
9874 struct elt_loc_list *const_equiv = 0;
9878 struct elt_loc_list *equiv;
9879 struct elt_loc_list *best_equiv = 0;
9880 for (equiv = e->locs; equiv; equiv = equiv->next)
9882 if (CONSTANT_P (equiv->loc))
9883 const_equiv = equiv;
9884 else if (GET_CODE (equiv->loc) == REG
9885 /* Extending hard register lifetimes cuases crash
9886 on SRC targets. Doing so on non-SRC is
9887 probably also not good idea, since we most
9888 probably have pseudoregister equivalence as
9890 && REGNO (equiv->loc) >= FIRST_PSEUDO_REGISTER)
9893 /* Use the constant equivalence if that is cheap enough. */
9895 best_equiv = const_equiv;
9896 else if (const_equiv
9897 && (rtx_cost (const_equiv->loc, SET)
9898 <= rtx_cost (best_equiv->loc, SET)))
9900 best_equiv = const_equiv;
9904 /* If best_equiv is nonzero, we know that MEM is set to a
9905 constant or register before the loop. We will use this
9906 knowledge to initialize the shadow register with that
9907 constant or reg rather than by loading from MEM. */
9909 best = copy_rtx (best_equiv->loc);
9911 set = gen_move_insn (reg, best);
9912 set = emit_insn_before (set, loop->start);
9914 REG_NOTES (set) = gen_rtx_EXPR_LIST (REG_EQUAL,
9915 copy_rtx (const_equiv->loc),
9920 if (label == NULL_RTX)
9922 /* We must compute the former
9923 right-after-the-end label before we insert
9925 end_label = next_label (loop->end);
9926 label = gen_label_rtx ();
9927 emit_label_after (label, loop->end);
9930 /* Store the memory immediately after END, which is
9931 the NOTE_LOOP_END. */
9932 set = gen_move_insn (copy_rtx (mem), reg);
9933 emit_insn_after (set, label);
9936 if (loop_dump_stream)
9938 fprintf (loop_dump_stream, "Hoisted regno %d %s from ",
9939 REGNO (reg), (written ? "r/w" : "r/o"));
9940 print_rtl (loop_dump_stream, mem);
9941 fputc ('\n', loop_dump_stream);
9944 /* Attempt a bit of copy propagation. This helps untangle the
9945 data flow, and enables {basic,general}_induction_var to find
9947 EXECUTE_IF_SET_IN_REG_SET
9948 (&copies, FIRST_PSEUDO_REGISTER, j,
9950 try_copy_prop (loop, loop_mems[i].reg, j);
9952 CLEAR_REG_SET (&copies);
9956 if (label != NULL_RTX)
9958 /* Now, we need to replace all references to the previous exit
9959 label with the new one. */
9964 for (p = loop->start; p != loop->end; p = NEXT_INSN (p))
9966 for_each_rtx (&p, replace_label, &rr);
9968 /* If this is a JUMP_INSN, then we also need to fix the JUMP_LABEL
9969 field. This is not handled by for_each_rtx because it doesn't
9970 handle unprinted ('0') fields. We need to update JUMP_LABEL
9971 because the immediately following unroll pass will use it.
9972 replace_label would not work anyways, because that only handles
9974 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p) == end_label)
9975 JUMP_LABEL (p) = label;
9982 /* For communication between note_reg_stored and its caller. */
9983 struct note_reg_stored_arg
9989 /* Called via note_stores, record in SET_SEEN whether X, which is written,
9992 note_reg_stored (x, setter, arg)
9993 rtx x, setter ATTRIBUTE_UNUSED;
9996 struct note_reg_stored_arg *t = (struct note_reg_stored_arg *)arg;
10001 /* Try to replace every occurrence of pseudo REGNO with REPLACEMENT.
10002 There must be exactly one insn that sets this pseudo; it will be
10003 deleted if all replacements succeed and we can prove that the register
10004 is not used after the loop. */
10007 try_copy_prop (loop, replacement, regno)
10008 const struct loop *loop;
10010 unsigned int regno;
10012 /* This is the reg that we are copying from. */
10013 rtx reg_rtx = regno_reg_rtx[regno];
10016 /* These help keep track of whether we replaced all uses of the reg. */
10017 int replaced_last = 0;
10018 int store_is_first = 0;
10020 for (insn = next_insn_in_loop (loop, loop->scan_start);
10022 insn = next_insn_in_loop (loop, insn))
10026 /* Only substitute within one extended basic block from the initializing
10028 if (GET_CODE (insn) == CODE_LABEL && init_insn)
10031 if (GET_RTX_CLASS (GET_CODE (insn)) != 'i')
10034 /* Is this the initializing insn? */
10035 set = single_set (insn);
10037 && GET_CODE (SET_DEST (set)) == REG
10038 && REGNO (SET_DEST (set)) == regno)
10044 if (REGNO_FIRST_UID (regno) == INSN_UID (insn))
10045 store_is_first = 1;
10048 /* Only substitute after seeing the initializing insn. */
10049 if (init_insn && insn != init_insn)
10051 struct note_reg_stored_arg arg;
10053 array[0] = reg_rtx;
10054 array[1] = replacement;
10057 for_each_rtx (&insn, replace_loop_reg, array);
10058 if (REGNO_LAST_UID (regno) == INSN_UID (insn))
10061 /* Stop replacing when REPLACEMENT is modified. */
10062 arg.reg = replacement;
10064 note_stores (PATTERN (insn), note_reg_stored, &arg);
10071 if (apply_change_group ())
10073 if (loop_dump_stream)
10074 fprintf (loop_dump_stream, " Replaced reg %d", regno);
10075 if (store_is_first && replaced_last)
10077 PUT_CODE (init_insn, NOTE);
10078 NOTE_LINE_NUMBER (init_insn) = NOTE_INSN_DELETED;
10079 if (loop_dump_stream)
10080 fprintf (loop_dump_stream, ", deleting init_insn (%d)",
10081 INSN_UID (init_insn));
10083 if (loop_dump_stream)
10084 fprintf (loop_dump_stream, ".\n");
10088 /* Replace MEM with its associated pseudo register. This function is
10089 called from load_mems via for_each_rtx. DATA is actually an
10090 rtx_and_int * describing the instruction currently being scanned
10091 and the MEM we are currently replacing. */
10094 replace_loop_mem (mem, data)
10106 switch (GET_CODE (m))
10112 /* We're not interested in the MEM associated with a
10113 CONST_DOUBLE, so there's no need to traverse into one. */
10117 /* This is not a MEM. */
10121 ri = (rtx_and_int*) data;
10124 if (!rtx_equal_p (loop_mems[i].mem, m))
10125 /* This is not the MEM we are currently replacing. */
10130 /* Actually replace the MEM. */
10131 validate_change (insn, mem, loop_mems[i].reg, 1);
10136 /* Replace one register with another. Called through for_each_rtx; PX points
10137 to the rtx being scanned. DATA is actually an array of three rtx's; the
10138 first one is the one to be replaced, and the second one the replacement.
10139 The third one is the current insn. */
10142 replace_loop_reg (px, data)
10147 rtx *array = (rtx *)data;
10153 validate_change (array[2], px, array[1], 1);
10158 /* Replace occurrences of the old exit label for the loop with the new
10159 one. DATA is an rtx_pair containing the old and new labels,
10163 replace_label (x, data)
10168 rtx old_label = ((rtx_pair*) data)->r1;
10169 rtx new_label = ((rtx_pair*) data)->r2;
10174 if (GET_CODE (l) != LABEL_REF)
10177 if (XEXP (l, 0) != old_label)
10180 XEXP (l, 0) = new_label;
10181 ++LABEL_NUSES (new_label);
10182 --LABEL_NUSES (old_label);
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