1 /* Perform various loop optimizations, including strength reduction.
2 Copyright (C) 1987, 1988, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
22 /* This is the loop optimization pass of the compiler.
23 It finds invariant computations within loops and moves them
24 to the beginning of the loop. Then it identifies basic and
25 general induction variables. Strength reduction is applied to the general
26 induction variables, and induction variable elimination is applied to
27 the basic induction variables.
29 It also finds cases where
30 a register is set within the loop by zero-extending a narrower value
31 and changes these to zero the entire register once before the loop
32 and merely copy the low part within the loop.
34 Most of the complexity is in heuristics to decide when it is worth
35 while to do these things. */
39 #include "coretypes.h"
45 #include "hard-reg-set.h"
46 #include "basic-block.h"
47 #include "insn-config.h"
57 #include "insn-flags.h"
61 /* Not really meaningful values, but at least something. */
62 #ifndef SIMULTANEOUS_PREFETCHES
63 #define SIMULTANEOUS_PREFETCHES 3
65 #ifndef PREFETCH_BLOCK
66 #define PREFETCH_BLOCK 32
69 #define HAVE_prefetch 0
70 #define CODE_FOR_prefetch 0
71 #define gen_prefetch(a,b,c) (abort(), NULL_RTX)
74 /* Give up the prefetch optimizations once we exceed a given threshhold.
75 It is unlikely that we would be able to optimize something in a loop
76 with so many detected prefetches. */
77 #define MAX_PREFETCHES 100
78 /* The number of prefetch blocks that are beneficial to fetch at once before
79 a loop with a known (and low) iteration count. */
80 #define PREFETCH_BLOCKS_BEFORE_LOOP_MAX 6
81 /* For very tiny loops it is not worthwhile to prefetch even before the loop,
82 since it is likely that the data are already in the cache. */
83 #define PREFETCH_BLOCKS_BEFORE_LOOP_MIN 2
85 /* Parameterize some prefetch heuristics so they can be turned on and off
86 easily for performance testing on new architectures. These can be
87 defined in target-dependent files. */
89 /* Prefetch is worthwhile only when loads/stores are dense. */
90 #ifndef PREFETCH_ONLY_DENSE_MEM
91 #define PREFETCH_ONLY_DENSE_MEM 1
94 /* Define what we mean by "dense" loads and stores; This value divided by 256
95 is the minimum percentage of memory references that worth prefetching. */
96 #ifndef PREFETCH_DENSE_MEM
97 #define PREFETCH_DENSE_MEM 220
100 /* Do not prefetch for a loop whose iteration count is known to be low. */
101 #ifndef PREFETCH_NO_LOW_LOOPCNT
102 #define PREFETCH_NO_LOW_LOOPCNT 1
105 /* Define what we mean by a "low" iteration count. */
106 #ifndef PREFETCH_LOW_LOOPCNT
107 #define PREFETCH_LOW_LOOPCNT 32
110 /* Do not prefetch for a loop that contains a function call; such a loop is
111 probably not an internal loop. */
112 #ifndef PREFETCH_NO_CALL
113 #define PREFETCH_NO_CALL 1
116 /* Do not prefetch accesses with an extreme stride. */
117 #ifndef PREFETCH_NO_EXTREME_STRIDE
118 #define PREFETCH_NO_EXTREME_STRIDE 1
121 /* Define what we mean by an "extreme" stride. */
122 #ifndef PREFETCH_EXTREME_STRIDE
123 #define PREFETCH_EXTREME_STRIDE 4096
126 /* Define a limit to how far apart indices can be and still be merged
127 into a single prefetch. */
128 #ifndef PREFETCH_EXTREME_DIFFERENCE
129 #define PREFETCH_EXTREME_DIFFERENCE 4096
132 /* Issue prefetch instructions before the loop to fetch data to be used
133 in the first few loop iterations. */
134 #ifndef PREFETCH_BEFORE_LOOP
135 #define PREFETCH_BEFORE_LOOP 1
138 /* Do not handle reversed order prefetches (negative stride). */
139 #ifndef PREFETCH_NO_REVERSE_ORDER
140 #define PREFETCH_NO_REVERSE_ORDER 1
143 /* Prefetch even if the GIV is in conditional code. */
144 #ifndef PREFETCH_CONDITIONAL
145 #define PREFETCH_CONDITIONAL 1
148 #define LOOP_REG_LIFETIME(LOOP, REGNO) \
149 ((REGNO_LAST_LUID (REGNO) - REGNO_FIRST_LUID (REGNO)))
151 #define LOOP_REG_GLOBAL_P(LOOP, REGNO) \
152 ((REGNO_LAST_LUID (REGNO) > INSN_LUID ((LOOP)->end) \
153 || REGNO_FIRST_LUID (REGNO) < INSN_LUID ((LOOP)->start)))
155 #define LOOP_REGNO_NREGS(REGNO, SET_DEST) \
156 ((REGNO) < FIRST_PSEUDO_REGISTER \
157 ? (int) HARD_REGNO_NREGS ((REGNO), GET_MODE (SET_DEST)) : 1)
160 /* Vector mapping INSN_UIDs to luids.
161 The luids are like uids but increase monotonically always.
162 We use them to see whether a jump comes from outside a given loop. */
166 /* Indexed by INSN_UID, contains the ordinal giving the (innermost) loop
167 number the insn is contained in. */
169 struct loop **uid_loop;
171 /* 1 + largest uid of any insn. */
173 int max_uid_for_loop;
175 /* Number of loops detected in current function. Used as index to the
178 static int max_loop_num;
180 /* Bound on pseudo register number before loop optimization.
181 A pseudo has valid regscan info if its number is < max_reg_before_loop. */
182 unsigned int max_reg_before_loop;
184 /* The value to pass to the next call of reg_scan_update. */
185 static int loop_max_reg;
187 /* During the analysis of a loop, a chain of `struct movable's
188 is made to record all the movable insns found.
189 Then the entire chain can be scanned to decide which to move. */
193 rtx insn; /* A movable insn */
194 rtx set_src; /* The expression this reg is set from. */
195 rtx set_dest; /* The destination of this SET. */
196 rtx dependencies; /* When INSN is libcall, this is an EXPR_LIST
197 of any registers used within the LIBCALL. */
198 int consec; /* Number of consecutive following insns
199 that must be moved with this one. */
200 unsigned int regno; /* The register it sets */
201 short lifetime; /* lifetime of that register;
202 may be adjusted when matching movables
203 that load the same value are found. */
204 short savings; /* Number of insns we can move for this reg,
205 including other movables that force this
206 or match this one. */
207 unsigned int cond : 1; /* 1 if only conditionally movable */
208 unsigned int force : 1; /* 1 means MUST move this insn */
209 unsigned int global : 1; /* 1 means reg is live outside this loop */
210 /* If PARTIAL is 1, GLOBAL means something different:
211 that the reg is live outside the range from where it is set
212 to the following label. */
213 unsigned int done : 1; /* 1 inhibits further processing of this */
215 unsigned int partial : 1; /* 1 means this reg is used for zero-extending.
216 In particular, moving it does not make it
218 unsigned int move_insn : 1; /* 1 means that we call emit_move_insn to
219 load SRC, rather than copying INSN. */
220 unsigned int move_insn_first:1;/* Same as above, if this is necessary for the
221 first insn of a consecutive sets group. */
222 unsigned int is_equiv : 1; /* 1 means a REG_EQUIV is present on INSN. */
223 enum machine_mode savemode; /* Nonzero means it is a mode for a low part
224 that we should avoid changing when clearing
225 the rest of the reg. */
226 struct movable *match; /* First entry for same value */
227 struct movable *forces; /* An insn that must be moved if this is */
228 struct movable *next;
232 FILE *loop_dump_stream;
234 /* Forward declarations. */
236 static void invalidate_loops_containing_label PARAMS ((rtx));
237 static void find_and_verify_loops PARAMS ((rtx, struct loops *));
238 static void mark_loop_jump PARAMS ((rtx, struct loop *));
239 static void prescan_loop PARAMS ((struct loop *));
240 static int reg_in_basic_block_p PARAMS ((rtx, rtx));
241 static int consec_sets_invariant_p PARAMS ((const struct loop *,
243 static int labels_in_range_p PARAMS ((rtx, int));
244 static void count_one_set PARAMS ((struct loop_regs *, rtx, rtx, rtx *));
245 static void note_addr_stored PARAMS ((rtx, rtx, void *));
246 static void note_set_pseudo_multiple_uses PARAMS ((rtx, rtx, void *));
247 static int loop_reg_used_before_p PARAMS ((const struct loop *, rtx, rtx));
248 static void scan_loop PARAMS ((struct loop*, int));
250 static void replace_call_address PARAMS ((rtx, rtx, rtx));
252 static rtx skip_consec_insns PARAMS ((rtx, int));
253 static int libcall_benefit PARAMS ((rtx));
254 static void ignore_some_movables PARAMS ((struct loop_movables *));
255 static void force_movables PARAMS ((struct loop_movables *));
256 static void combine_movables PARAMS ((struct loop_movables *,
257 struct loop_regs *));
258 static int num_unmoved_movables PARAMS ((const struct loop *));
259 static int regs_match_p PARAMS ((rtx, rtx, struct loop_movables *));
260 static int rtx_equal_for_loop_p PARAMS ((rtx, rtx, struct loop_movables *,
261 struct loop_regs *));
262 static void add_label_notes PARAMS ((rtx, rtx));
263 static void move_movables PARAMS ((struct loop *loop, struct loop_movables *,
265 static void loop_movables_add PARAMS((struct loop_movables *,
267 static void loop_movables_free PARAMS((struct loop_movables *));
268 static int count_nonfixed_reads PARAMS ((const struct loop *, rtx));
269 static void loop_bivs_find PARAMS((struct loop *));
270 static void loop_bivs_init_find PARAMS((struct loop *));
271 static void loop_bivs_check PARAMS((struct loop *));
272 static void loop_givs_find PARAMS((struct loop *));
273 static void loop_givs_check PARAMS((struct loop *));
274 static int loop_biv_eliminable_p PARAMS((struct loop *, struct iv_class *,
276 static int loop_giv_reduce_benefit PARAMS((struct loop *, struct iv_class *,
277 struct induction *, rtx));
278 static void loop_givs_dead_check PARAMS((struct loop *, struct iv_class *));
279 static void loop_givs_reduce PARAMS((struct loop *, struct iv_class *));
280 static void loop_givs_rescan PARAMS((struct loop *, struct iv_class *,
282 static void loop_ivs_free PARAMS((struct loop *));
283 static void strength_reduce PARAMS ((struct loop *, int));
284 static void find_single_use_in_loop PARAMS ((struct loop_regs *, rtx, rtx));
285 static int valid_initial_value_p PARAMS ((rtx, rtx, int, rtx));
286 static void find_mem_givs PARAMS ((const struct loop *, rtx, rtx, int, int));
287 static void record_biv PARAMS ((struct loop *, struct induction *,
288 rtx, rtx, rtx, rtx, rtx *,
290 static void check_final_value PARAMS ((const struct loop *,
291 struct induction *));
292 static void loop_ivs_dump PARAMS((const struct loop *, FILE *, int));
293 static void loop_iv_class_dump PARAMS((const struct iv_class *, FILE *, int));
294 static void loop_biv_dump PARAMS((const struct induction *, FILE *, int));
295 static void loop_giv_dump PARAMS((const struct induction *, FILE *, int));
296 static void record_giv PARAMS ((const struct loop *, struct induction *,
297 rtx, rtx, rtx, rtx, rtx, rtx, int,
298 enum g_types, int, int, rtx *));
299 static void update_giv_derive PARAMS ((const struct loop *, rtx));
300 static void check_ext_dependent_givs PARAMS ((struct iv_class *,
301 struct loop_info *));
302 static int basic_induction_var PARAMS ((const struct loop *, rtx,
303 enum machine_mode, rtx, rtx,
304 rtx *, rtx *, rtx **));
305 static rtx simplify_giv_expr PARAMS ((const struct loop *, rtx, rtx *, int *));
306 static int general_induction_var PARAMS ((const struct loop *loop, rtx, rtx *,
307 rtx *, rtx *, rtx *, int, int *,
309 static int consec_sets_giv PARAMS ((const struct loop *, int, rtx,
310 rtx, rtx, rtx *, rtx *, rtx *, rtx *));
311 static int check_dbra_loop PARAMS ((struct loop *, int));
312 static rtx express_from_1 PARAMS ((rtx, rtx, rtx));
313 static rtx combine_givs_p PARAMS ((struct induction *, struct induction *));
314 static int cmp_combine_givs_stats PARAMS ((const PTR, const PTR));
315 static void combine_givs PARAMS ((struct loop_regs *, struct iv_class *));
316 static int product_cheap_p PARAMS ((rtx, rtx));
317 static int maybe_eliminate_biv PARAMS ((const struct loop *, struct iv_class *,
319 static int maybe_eliminate_biv_1 PARAMS ((const struct loop *, rtx, rtx,
320 struct iv_class *, int,
322 static int last_use_this_basic_block PARAMS ((rtx, rtx));
323 static void record_initial PARAMS ((rtx, rtx, void *));
324 static void update_reg_last_use PARAMS ((rtx, rtx));
325 static rtx next_insn_in_loop PARAMS ((const struct loop *, rtx));
326 static void loop_regs_scan PARAMS ((const struct loop *, int));
327 static int count_insns_in_loop PARAMS ((const struct loop *));
328 static void load_mems PARAMS ((const struct loop *));
329 static int insert_loop_mem PARAMS ((rtx *, void *));
330 static int replace_loop_mem PARAMS ((rtx *, void *));
331 static void replace_loop_mems PARAMS ((rtx, rtx, rtx));
332 static int replace_loop_reg PARAMS ((rtx *, void *));
333 static void replace_loop_regs PARAMS ((rtx insn, rtx, rtx));
334 static void note_reg_stored PARAMS ((rtx, rtx, void *));
335 static void try_copy_prop PARAMS ((const struct loop *, rtx, unsigned int));
336 static void try_swap_copy_prop PARAMS ((const struct loop *, rtx,
338 static int replace_label PARAMS ((rtx *, void *));
339 static rtx check_insn_for_givs PARAMS((struct loop *, rtx, int, int));
340 static rtx check_insn_for_bivs PARAMS((struct loop *, rtx, int, int));
341 static rtx gen_add_mult PARAMS ((rtx, rtx, rtx, rtx));
342 static void loop_regs_update PARAMS ((const struct loop *, rtx));
343 static int iv_add_mult_cost PARAMS ((rtx, rtx, rtx, rtx));
345 static rtx loop_insn_emit_after PARAMS((const struct loop *, basic_block,
347 static rtx loop_call_insn_emit_before PARAMS((const struct loop *,
348 basic_block, rtx, rtx));
349 static rtx loop_call_insn_hoist PARAMS((const struct loop *, rtx));
350 static rtx loop_insn_sink_or_swim PARAMS((const struct loop *, rtx));
352 static void loop_dump_aux PARAMS ((const struct loop *, FILE *, int));
353 static void loop_delete_insns PARAMS ((rtx, rtx));
354 static HOST_WIDE_INT remove_constant_addition PARAMS ((rtx *));
355 static rtx gen_load_of_final_value PARAMS ((rtx, rtx));
356 void debug_ivs PARAMS ((const struct loop *));
357 void debug_iv_class PARAMS ((const struct iv_class *));
358 void debug_biv PARAMS ((const struct induction *));
359 void debug_giv PARAMS ((const struct induction *));
360 void debug_loop PARAMS ((const struct loop *));
361 void debug_loops PARAMS ((const struct loops *));
363 typedef struct rtx_pair
369 typedef struct loop_replace_args
376 /* Nonzero iff INSN is between START and END, inclusive. */
377 #define INSN_IN_RANGE_P(INSN, START, END) \
378 (INSN_UID (INSN) < max_uid_for_loop \
379 && INSN_LUID (INSN) >= INSN_LUID (START) \
380 && INSN_LUID (INSN) <= INSN_LUID (END))
382 /* Indirect_jump_in_function is computed once per function. */
383 static int indirect_jump_in_function;
384 static int indirect_jump_in_function_p PARAMS ((rtx));
386 static int compute_luids PARAMS ((rtx, rtx, int));
388 static int biv_elimination_giv_has_0_offset PARAMS ((struct induction *,
392 /* Benefit penalty, if a giv is not replaceable, i.e. must emit an insn to
393 copy the value of the strength reduced giv to its original register. */
394 static int copy_cost;
396 /* Cost of using a register, to normalize the benefits of a giv. */
397 static int reg_address_cost;
402 rtx reg = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 1);
404 reg_address_cost = address_cost (reg, SImode);
406 copy_cost = COSTS_N_INSNS (1);
409 /* Compute the mapping from uids to luids.
410 LUIDs are numbers assigned to insns, like uids,
411 except that luids increase monotonically through the code.
412 Start at insn START and stop just before END. Assign LUIDs
413 starting with PREV_LUID + 1. Return the last assigned LUID + 1. */
415 compute_luids (start, end, prev_luid)
422 for (insn = start, i = prev_luid; insn != end; insn = NEXT_INSN (insn))
424 if (INSN_UID (insn) >= max_uid_for_loop)
426 /* Don't assign luids to line-number NOTEs, so that the distance in
427 luids between two insns is not affected by -g. */
428 if (GET_CODE (insn) != NOTE
429 || NOTE_LINE_NUMBER (insn) <= 0)
430 uid_luid[INSN_UID (insn)] = ++i;
432 /* Give a line number note the same luid as preceding insn. */
433 uid_luid[INSN_UID (insn)] = i;
438 /* Entry point of this file. Perform loop optimization
439 on the current function. F is the first insn of the function
440 and DUMPFILE is a stream for output of a trace of actions taken
441 (or 0 if none should be output). */
444 loop_optimize (f, dumpfile, flags)
445 /* f is the first instruction of a chain of insns for one function */
452 struct loops loops_data;
453 struct loops *loops = &loops_data;
454 struct loop_info *loops_info;
456 loop_dump_stream = dumpfile;
458 init_recog_no_volatile ();
460 max_reg_before_loop = max_reg_num ();
461 loop_max_reg = max_reg_before_loop;
465 /* Count the number of loops. */
468 for (insn = f; insn; insn = NEXT_INSN (insn))
470 if (GET_CODE (insn) == NOTE
471 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
475 /* Don't waste time if no loops. */
476 if (max_loop_num == 0)
479 loops->num = max_loop_num;
481 /* Get size to use for tables indexed by uids.
482 Leave some space for labels allocated by find_and_verify_loops. */
483 max_uid_for_loop = get_max_uid () + 1 + max_loop_num * 32;
485 uid_luid = (int *) xcalloc (max_uid_for_loop, sizeof (int));
486 uid_loop = (struct loop **) xcalloc (max_uid_for_loop,
487 sizeof (struct loop *));
489 /* Allocate storage for array of loops. */
490 loops->array = (struct loop *)
491 xcalloc (loops->num, sizeof (struct loop));
493 /* Find and process each loop.
494 First, find them, and record them in order of their beginnings. */
495 find_and_verify_loops (f, loops);
497 /* Allocate and initialize auxiliary loop information. */
498 loops_info = xcalloc (loops->num, sizeof (struct loop_info));
499 for (i = 0; i < (int) loops->num; i++)
500 loops->array[i].aux = loops_info + i;
502 /* Now find all register lifetimes. This must be done after
503 find_and_verify_loops, because it might reorder the insns in the
505 reg_scan (f, max_reg_before_loop, 1);
507 /* This must occur after reg_scan so that registers created by gcse
508 will have entries in the register tables.
510 We could have added a call to reg_scan after gcse_main in toplev.c,
511 but moving this call to init_alias_analysis is more efficient. */
512 init_alias_analysis ();
514 /* See if we went too far. Note that get_max_uid already returns
515 one more that the maximum uid of all insn. */
516 if (get_max_uid () > max_uid_for_loop)
518 /* Now reset it to the actual size we need. See above. */
519 max_uid_for_loop = get_max_uid ();
521 /* find_and_verify_loops has already called compute_luids, but it
522 might have rearranged code afterwards, so we need to recompute
524 compute_luids (f, NULL_RTX, 0);
526 /* Don't leave gaps in uid_luid for insns that have been
527 deleted. It is possible that the first or last insn
528 using some register has been deleted by cross-jumping.
529 Make sure that uid_luid for that former insn's uid
530 points to the general area where that insn used to be. */
531 for (i = 0; i < max_uid_for_loop; i++)
533 uid_luid[0] = uid_luid[i];
534 if (uid_luid[0] != 0)
537 for (i = 0; i < max_uid_for_loop; i++)
538 if (uid_luid[i] == 0)
539 uid_luid[i] = uid_luid[i - 1];
541 /* Determine if the function has indirect jump. On some systems
542 this prevents low overhead loop instructions from being used. */
543 indirect_jump_in_function = indirect_jump_in_function_p (f);
545 /* Now scan the loops, last ones first, since this means inner ones are done
546 before outer ones. */
547 for (i = max_loop_num - 1; i >= 0; i--)
549 struct loop *loop = &loops->array[i];
551 if (! loop->invalid && loop->end)
552 scan_loop (loop, flags);
555 end_alias_analysis ();
564 /* Returns the next insn, in execution order, after INSN. START and
565 END are the NOTE_INSN_LOOP_BEG and NOTE_INSN_LOOP_END for the loop,
566 respectively. LOOP->TOP, if non-NULL, is the top of the loop in the
567 insn-stream; it is used with loops that are entered near the
571 next_insn_in_loop (loop, insn)
572 const struct loop *loop;
575 insn = NEXT_INSN (insn);
577 if (insn == loop->end)
580 /* Go to the top of the loop, and continue there. */
587 if (insn == loop->scan_start)
594 /* Optimize one loop described by LOOP. */
596 /* ??? Could also move memory writes out of loops if the destination address
597 is invariant, the source is invariant, the memory write is not volatile,
598 and if we can prove that no read inside the loop can read this address
599 before the write occurs. If there is a read of this address after the
600 write, then we can also mark the memory read as invariant. */
603 scan_loop (loop, flags)
607 struct loop_info *loop_info = LOOP_INFO (loop);
608 struct loop_regs *regs = LOOP_REGS (loop);
610 rtx loop_start = loop->start;
611 rtx loop_end = loop->end;
613 /* 1 if we are scanning insns that could be executed zero times. */
615 /* 1 if we are scanning insns that might never be executed
616 due to a subroutine call which might exit before they are reached. */
618 /* Number of insns in the loop. */
621 rtx temp, update_start, update_end;
622 /* The SET from an insn, if it is the only SET in the insn. */
624 /* Chain describing insns movable in current loop. */
625 struct loop_movables *movables = LOOP_MOVABLES (loop);
626 /* Ratio of extra register life span we can justify
627 for saving an instruction. More if loop doesn't call subroutines
628 since in that case saving an insn makes more difference
629 and more registers are available. */
631 /* Nonzero if we are scanning instructions in a sub-loop. */
640 /* Determine whether this loop starts with a jump down to a test at
641 the end. This will occur for a small number of loops with a test
642 that is too complex to duplicate in front of the loop.
644 We search for the first insn or label in the loop, skipping NOTEs.
645 However, we must be careful not to skip past a NOTE_INSN_LOOP_BEG
646 (because we might have a loop executed only once that contains a
647 loop which starts with a jump to its exit test) or a NOTE_INSN_LOOP_END
648 (in case we have a degenerate loop).
650 Note that if we mistakenly think that a loop is entered at the top
651 when, in fact, it is entered at the exit test, the only effect will be
652 slightly poorer optimization. Making the opposite error can generate
653 incorrect code. Since very few loops now start with a jump to the
654 exit test, the code here to detect that case is very conservative. */
656 for (p = NEXT_INSN (loop_start);
658 && GET_CODE (p) != CODE_LABEL && ! INSN_P (p)
659 && (GET_CODE (p) != NOTE
660 || (NOTE_LINE_NUMBER (p) != NOTE_INSN_LOOP_BEG
661 && NOTE_LINE_NUMBER (p) != NOTE_INSN_LOOP_END));
665 loop->scan_start = p;
667 /* If loop end is the end of the current function, then emit a
668 NOTE_INSN_DELETED after loop_end and set loop->sink to the dummy
669 note insn. This is the position we use when sinking insns out of
671 if (NEXT_INSN (loop->end) != 0)
672 loop->sink = NEXT_INSN (loop->end);
674 loop->sink = emit_note_after (NOTE_INSN_DELETED, loop->end);
676 /* Set up variables describing this loop. */
678 threshold = (loop_info->has_call ? 1 : 2) * (1 + n_non_fixed_regs);
680 /* If loop has a jump before the first label,
681 the true entry is the target of that jump.
682 Start scan from there.
683 But record in LOOP->TOP the place where the end-test jumps
684 back to so we can scan that after the end of the loop. */
685 if (GET_CODE (p) == JUMP_INSN
686 /* Loop entry must be unconditional jump (and not a RETURN) */
687 && any_uncondjump_p (p)
688 && JUMP_LABEL (p) != 0
689 /* Check to see whether the jump actually
690 jumps out of the loop (meaning it's no loop).
691 This case can happen for things like
692 do {..} while (0). If this label was generated previously
693 by loop, we can't tell anything about it and have to reject
695 && INSN_IN_RANGE_P (JUMP_LABEL (p), loop_start, loop_end))
697 loop->top = next_label (loop->scan_start);
698 loop->scan_start = JUMP_LABEL (p);
701 /* If LOOP->SCAN_START was an insn created by loop, we don't know its luid
702 as required by loop_reg_used_before_p. So skip such loops. (This
703 test may never be true, but it's best to play it safe.)
705 Also, skip loops where we do not start scanning at a label. This
706 test also rejects loops starting with a JUMP_INSN that failed the
709 if (INSN_UID (loop->scan_start) >= max_uid_for_loop
710 || GET_CODE (loop->scan_start) != CODE_LABEL)
712 if (loop_dump_stream)
713 fprintf (loop_dump_stream, "\nLoop from %d to %d is phony.\n\n",
714 INSN_UID (loop_start), INSN_UID (loop_end));
718 /* Allocate extra space for REGs that might be created by load_mems.
719 We allocate a little extra slop as well, in the hopes that we
720 won't have to reallocate the regs array. */
721 loop_regs_scan (loop, loop_info->mems_idx + 16);
722 insn_count = count_insns_in_loop (loop);
724 if (loop_dump_stream)
726 fprintf (loop_dump_stream, "\nLoop from %d to %d: %d real insns.\n",
727 INSN_UID (loop_start), INSN_UID (loop_end), insn_count);
729 fprintf (loop_dump_stream, "Continue at insn %d.\n",
730 INSN_UID (loop->cont));
733 /* Scan through the loop finding insns that are safe to move.
734 Set REGS->ARRAY[I].SET_IN_LOOP negative for the reg I being set, so that
735 this reg will be considered invariant for subsequent insns.
736 We consider whether subsequent insns use the reg
737 in deciding whether it is worth actually moving.
739 MAYBE_NEVER is nonzero if we have passed a conditional jump insn
740 and therefore it is possible that the insns we are scanning
741 would never be executed. At such times, we must make sure
742 that it is safe to execute the insn once instead of zero times.
743 When MAYBE_NEVER is 0, all insns will be executed at least once
744 so that is not a problem. */
746 for (in_libcall = 0, p = next_insn_in_loop (loop, loop->scan_start);
748 p = next_insn_in_loop (loop, p))
750 if (in_libcall && INSN_P (p) && find_reg_note (p, REG_RETVAL, NULL_RTX))
752 if (GET_CODE (p) == INSN)
754 temp = find_reg_note (p, REG_LIBCALL, NULL_RTX);
758 && (set = single_set (p))
759 && GET_CODE (SET_DEST (set)) == REG
760 #ifdef PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
761 && SET_DEST (set) != pic_offset_table_rtx
763 && ! regs->array[REGNO (SET_DEST (set))].may_not_optimize)
768 rtx src = SET_SRC (set);
769 rtx dependencies = 0;
771 /* Figure out what to use as a source of this insn. If a
772 REG_EQUIV note is given or if a REG_EQUAL note with a
773 constant operand is specified, use it as the source and
774 mark that we should move this insn by calling
775 emit_move_insn rather that duplicating the insn.
777 Otherwise, only use the REG_EQUAL contents if a REG_RETVAL
779 temp = find_reg_note (p, REG_EQUIV, NULL_RTX);
781 src = XEXP (temp, 0), move_insn = 1;
784 temp = find_reg_note (p, REG_EQUAL, NULL_RTX);
785 if (temp && CONSTANT_P (XEXP (temp, 0)))
786 src = XEXP (temp, 0), move_insn = 1;
787 if (temp && find_reg_note (p, REG_RETVAL, NULL_RTX))
789 src = XEXP (temp, 0);
790 /* A libcall block can use regs that don't appear in
791 the equivalent expression. To move the libcall,
792 we must move those regs too. */
793 dependencies = libcall_other_reg (p, src);
797 /* For parallels, add any possible uses to the dependencies, as
798 we can't move the insn without resolving them first. */
799 if (GET_CODE (PATTERN (p)) == PARALLEL)
801 for (i = 0; i < XVECLEN (PATTERN (p), 0); i++)
803 rtx x = XVECEXP (PATTERN (p), 0, i);
804 if (GET_CODE (x) == USE)
806 = gen_rtx_EXPR_LIST (VOIDmode, XEXP (x, 0),
811 /* Don't try to optimize a register that was made
812 by loop-optimization for an inner loop.
813 We don't know its life-span, so we can't compute
815 if (REGNO (SET_DEST (set)) >= max_reg_before_loop)
817 else if (/* The register is used in basic blocks other
818 than the one where it is set (meaning that
819 something after this point in the loop might
820 depend on its value before the set). */
821 ! reg_in_basic_block_p (p, SET_DEST (set))
822 /* And the set is not guaranteed to be executed once
823 the loop starts, or the value before the set is
824 needed before the set occurs...
826 ??? Note we have quadratic behavior here, mitigated
827 by the fact that the previous test will often fail for
828 large loops. Rather than re-scanning the entire loop
829 each time for register usage, we should build tables
830 of the register usage and use them here instead. */
832 || loop_reg_used_before_p (loop, set, p)))
833 /* It is unsafe to move the set.
835 This code used to consider it OK to move a set of a variable
836 which was not created by the user and not used in an exit
838 That behavior is incorrect and was removed. */
840 else if ((tem = loop_invariant_p (loop, src))
841 && (dependencies == 0
843 = loop_invariant_p (loop, dependencies)) != 0)
844 && (regs->array[REGNO (SET_DEST (set))].set_in_loop == 1
846 = consec_sets_invariant_p
847 (loop, SET_DEST (set),
848 regs->array[REGNO (SET_DEST (set))].set_in_loop,
850 /* If the insn can cause a trap (such as divide by zero),
851 can't move it unless it's guaranteed to be executed
852 once loop is entered. Even a function call might
853 prevent the trap insn from being reached
854 (since it might exit!) */
855 && ! ((maybe_never || call_passed)
856 && may_trap_p (src)))
859 int regno = REGNO (SET_DEST (set));
861 /* A potential lossage is where we have a case where two insns
862 can be combined as long as they are both in the loop, but
863 we move one of them outside the loop. For large loops,
864 this can lose. The most common case of this is the address
865 of a function being called.
867 Therefore, if this register is marked as being used
868 exactly once if we are in a loop with calls
869 (a "large loop"), see if we can replace the usage of
870 this register with the source of this SET. If we can,
873 Don't do this if P has a REG_RETVAL note or if we have
874 SMALL_REGISTER_CLASSES and SET_SRC is a hard register. */
876 if (loop_info->has_call
877 && regs->array[regno].single_usage != 0
878 && regs->array[regno].single_usage != const0_rtx
879 && REGNO_FIRST_UID (regno) == INSN_UID (p)
880 && (REGNO_LAST_UID (regno)
881 == INSN_UID (regs->array[regno].single_usage))
882 && regs->array[regno].set_in_loop == 1
883 && GET_CODE (SET_SRC (set)) != ASM_OPERANDS
884 && ! side_effects_p (SET_SRC (set))
885 && ! find_reg_note (p, REG_RETVAL, NULL_RTX)
886 && (! SMALL_REGISTER_CLASSES
887 || (! (GET_CODE (SET_SRC (set)) == REG
888 && (REGNO (SET_SRC (set))
889 < FIRST_PSEUDO_REGISTER))))
890 /* This test is not redundant; SET_SRC (set) might be
891 a call-clobbered register and the life of REGNO
892 might span a call. */
893 && ! modified_between_p (SET_SRC (set), p,
894 regs->array[regno].single_usage)
895 && no_labels_between_p (p,
896 regs->array[regno].single_usage)
897 && validate_replace_rtx (SET_DEST (set), SET_SRC (set),
898 regs->array[regno].single_usage))
900 /* Replace any usage in a REG_EQUAL note. Must copy
901 the new source, so that we don't get rtx sharing
902 between the SET_SOURCE and REG_NOTES of insn p. */
903 REG_NOTES (regs->array[regno].single_usage)
905 (REG_NOTES (regs->array[regno].single_usage),
906 SET_DEST (set), copy_rtx (SET_SRC (set))));
909 for (i = 0; i < LOOP_REGNO_NREGS (regno, SET_DEST (set));
911 regs->array[regno+i].set_in_loop = 0;
915 m = (struct movable *) xmalloc (sizeof (struct movable));
919 m->dependencies = dependencies;
920 m->set_dest = SET_DEST (set);
923 = regs->array[REGNO (SET_DEST (set))].set_in_loop - 1;
927 m->move_insn = move_insn;
928 m->move_insn_first = 0;
929 m->is_equiv = (find_reg_note (p, REG_EQUIV, NULL_RTX) != 0);
930 m->savemode = VOIDmode;
932 /* Set M->cond if either loop_invariant_p
933 or consec_sets_invariant_p returned 2
934 (only conditionally invariant). */
935 m->cond = ((tem | tem1 | tem2) > 1);
936 m->global = LOOP_REG_GLOBAL_P (loop, regno);
938 m->lifetime = LOOP_REG_LIFETIME (loop, regno);
939 m->savings = regs->array[regno].n_times_set;
940 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
941 m->savings += libcall_benefit (p);
942 for (i = 0; i < LOOP_REGNO_NREGS (regno, SET_DEST (set)); i++)
943 regs->array[regno+i].set_in_loop = move_insn ? -2 : -1;
944 /* Add M to the end of the chain MOVABLES. */
945 loop_movables_add (movables, m);
949 /* It is possible for the first instruction to have a
950 REG_EQUAL note but a non-invariant SET_SRC, so we must
951 remember the status of the first instruction in case
952 the last instruction doesn't have a REG_EQUAL note. */
953 m->move_insn_first = m->move_insn;
955 /* Skip this insn, not checking REG_LIBCALL notes. */
956 p = next_nonnote_insn (p);
957 /* Skip the consecutive insns, if there are any. */
958 p = skip_consec_insns (p, m->consec);
959 /* Back up to the last insn of the consecutive group. */
960 p = prev_nonnote_insn (p);
962 /* We must now reset m->move_insn, m->is_equiv, and
963 possibly m->set_src to correspond to the effects of
965 temp = find_reg_note (p, REG_EQUIV, NULL_RTX);
967 m->set_src = XEXP (temp, 0), m->move_insn = 1;
970 temp = find_reg_note (p, REG_EQUAL, NULL_RTX);
971 if (temp && CONSTANT_P (XEXP (temp, 0)))
972 m->set_src = XEXP (temp, 0), m->move_insn = 1;
978 = (find_reg_note (p, REG_EQUIV, NULL_RTX) != 0);
981 /* If this register is always set within a STRICT_LOW_PART
982 or set to zero, then its high bytes are constant.
983 So clear them outside the loop and within the loop
984 just load the low bytes.
985 We must check that the machine has an instruction to do so.
986 Also, if the value loaded into the register
987 depends on the same register, this cannot be done. */
988 else if (SET_SRC (set) == const0_rtx
989 && GET_CODE (NEXT_INSN (p)) == INSN
990 && (set1 = single_set (NEXT_INSN (p)))
991 && GET_CODE (set1) == SET
992 && (GET_CODE (SET_DEST (set1)) == STRICT_LOW_PART)
993 && (GET_CODE (XEXP (SET_DEST (set1), 0)) == SUBREG)
994 && (SUBREG_REG (XEXP (SET_DEST (set1), 0))
996 && !reg_mentioned_p (SET_DEST (set), SET_SRC (set1)))
998 int regno = REGNO (SET_DEST (set));
999 if (regs->array[regno].set_in_loop == 2)
1002 m = (struct movable *) xmalloc (sizeof (struct movable));
1005 m->set_dest = SET_DEST (set);
1006 m->dependencies = 0;
1012 m->move_insn_first = 0;
1014 /* If the insn may not be executed on some cycles,
1015 we can't clear the whole reg; clear just high part.
1016 Not even if the reg is used only within this loop.
1023 Clearing x before the inner loop could clobber a value
1024 being saved from the last time around the outer loop.
1025 However, if the reg is not used outside this loop
1026 and all uses of the register are in the same
1027 basic block as the store, there is no problem.
1029 If this insn was made by loop, we don't know its
1030 INSN_LUID and hence must make a conservative
1032 m->global = (INSN_UID (p) >= max_uid_for_loop
1033 || LOOP_REG_GLOBAL_P (loop, regno)
1034 || (labels_in_range_p
1035 (p, REGNO_FIRST_LUID (regno))));
1036 if (maybe_never && m->global)
1037 m->savemode = GET_MODE (SET_SRC (set1));
1039 m->savemode = VOIDmode;
1043 m->lifetime = LOOP_REG_LIFETIME (loop, regno);
1046 i < LOOP_REGNO_NREGS (regno, SET_DEST (set));
1048 regs->array[regno+i].set_in_loop = -1;
1049 /* Add M to the end of the chain MOVABLES. */
1050 loop_movables_add (movables, m);
1055 /* Past a call insn, we get to insns which might not be executed
1056 because the call might exit. This matters for insns that trap.
1057 Constant and pure call insns always return, so they don't count. */
1058 else if (GET_CODE (p) == CALL_INSN && ! CONST_OR_PURE_CALL_P (p))
1060 /* Past a label or a jump, we get to insns for which we
1061 can't count on whether or how many times they will be
1062 executed during each iteration. Therefore, we can
1063 only move out sets of trivial variables
1064 (those not used after the loop). */
1065 /* Similar code appears twice in strength_reduce. */
1066 else if ((GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN)
1067 /* If we enter the loop in the middle, and scan around to the
1068 beginning, don't set maybe_never for that. This must be an
1069 unconditional jump, otherwise the code at the top of the
1070 loop might never be executed. Unconditional jumps are
1071 followed by a barrier then the loop_end. */
1072 && ! (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p) == loop->top
1073 && NEXT_INSN (NEXT_INSN (p)) == loop_end
1074 && any_uncondjump_p (p)))
1076 else if (GET_CODE (p) == NOTE)
1078 /* At the virtual top of a converted loop, insns are again known to
1079 be executed: logically, the loop begins here even though the exit
1080 code has been duplicated. */
1081 if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP && loop_depth == 0)
1082 maybe_never = call_passed = 0;
1083 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
1085 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
1090 /* If one movable subsumes another, ignore that other. */
1092 ignore_some_movables (movables);
1094 /* For each movable insn, see if the reg that it loads
1095 leads when it dies right into another conditionally movable insn.
1096 If so, record that the second insn "forces" the first one,
1097 since the second can be moved only if the first is. */
1099 force_movables (movables);
1101 /* See if there are multiple movable insns that load the same value.
1102 If there are, make all but the first point at the first one
1103 through the `match' field, and add the priorities of them
1104 all together as the priority of the first. */
1106 combine_movables (movables, regs);
1108 /* Now consider each movable insn to decide whether it is worth moving.
1109 Store 0 in regs->array[I].set_in_loop for each reg I that is moved.
1111 For machines with few registers this increases code size, so do not
1112 move moveables when optimizing for code size on such machines.
1113 (The 18 below is the value for i386.) */
1116 || (reg_class_size[GENERAL_REGS] > 18 && !loop_info->has_call))
1118 move_movables (loop, movables, threshold, insn_count);
1120 /* Recalculate regs->array if move_movables has created new
1122 if (max_reg_num () > regs->num)
1124 loop_regs_scan (loop, 0);
1125 for (update_start = loop_start;
1126 PREV_INSN (update_start)
1127 && GET_CODE (PREV_INSN (update_start)) != CODE_LABEL;
1128 update_start = PREV_INSN (update_start))
1130 update_end = NEXT_INSN (loop_end);
1132 reg_scan_update (update_start, update_end, loop_max_reg);
1133 loop_max_reg = max_reg_num ();
1137 /* Now candidates that still are negative are those not moved.
1138 Change regs->array[I].set_in_loop to indicate that those are not actually
1140 for (i = 0; i < regs->num; i++)
1141 if (regs->array[i].set_in_loop < 0)
1142 regs->array[i].set_in_loop = regs->array[i].n_times_set;
1144 /* Now that we've moved some things out of the loop, we might be able to
1145 hoist even more memory references. */
1148 /* Recalculate regs->array if load_mems has created new registers. */
1149 if (max_reg_num () > regs->num)
1150 loop_regs_scan (loop, 0);
1152 for (update_start = loop_start;
1153 PREV_INSN (update_start)
1154 && GET_CODE (PREV_INSN (update_start)) != CODE_LABEL;
1155 update_start = PREV_INSN (update_start))
1157 update_end = NEXT_INSN (loop_end);
1159 reg_scan_update (update_start, update_end, loop_max_reg);
1160 loop_max_reg = max_reg_num ();
1162 if (flag_strength_reduce)
1164 if (update_end && GET_CODE (update_end) == CODE_LABEL)
1165 /* Ensure our label doesn't go away. */
1166 LABEL_NUSES (update_end)++;
1168 strength_reduce (loop, flags);
1170 reg_scan_update (update_start, update_end, loop_max_reg);
1171 loop_max_reg = max_reg_num ();
1173 if (update_end && GET_CODE (update_end) == CODE_LABEL
1174 && --LABEL_NUSES (update_end) == 0)
1175 delete_related_insns (update_end);
1179 /* The movable information is required for strength reduction. */
1180 loop_movables_free (movables);
1187 /* Add elements to *OUTPUT to record all the pseudo-regs
1188 mentioned in IN_THIS but not mentioned in NOT_IN_THIS. */
1191 record_excess_regs (in_this, not_in_this, output)
1192 rtx in_this, not_in_this;
1199 code = GET_CODE (in_this);
1213 if (REGNO (in_this) >= FIRST_PSEUDO_REGISTER
1214 && ! reg_mentioned_p (in_this, not_in_this))
1215 *output = gen_rtx_EXPR_LIST (VOIDmode, in_this, *output);
1222 fmt = GET_RTX_FORMAT (code);
1223 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1230 for (j = 0; j < XVECLEN (in_this, i); j++)
1231 record_excess_regs (XVECEXP (in_this, i, j), not_in_this, output);
1235 record_excess_regs (XEXP (in_this, i), not_in_this, output);
1241 /* Check what regs are referred to in the libcall block ending with INSN,
1242 aside from those mentioned in the equivalent value.
1243 If there are none, return 0.
1244 If there are one or more, return an EXPR_LIST containing all of them. */
1247 libcall_other_reg (insn, equiv)
1250 rtx note = find_reg_note (insn, REG_RETVAL, NULL_RTX);
1251 rtx p = XEXP (note, 0);
1254 /* First, find all the regs used in the libcall block
1255 that are not mentioned as inputs to the result. */
1259 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
1260 || GET_CODE (p) == CALL_INSN)
1261 record_excess_regs (PATTERN (p), equiv, &output);
1268 /* Return 1 if all uses of REG
1269 are between INSN and the end of the basic block. */
1272 reg_in_basic_block_p (insn, reg)
1275 int regno = REGNO (reg);
1278 if (REGNO_FIRST_UID (regno) != INSN_UID (insn))
1281 /* Search this basic block for the already recorded last use of the reg. */
1282 for (p = insn; p; p = NEXT_INSN (p))
1284 switch (GET_CODE (p))
1291 /* Ordinary insn: if this is the last use, we win. */
1292 if (REGNO_LAST_UID (regno) == INSN_UID (p))
1297 /* Jump insn: if this is the last use, we win. */
1298 if (REGNO_LAST_UID (regno) == INSN_UID (p))
1300 /* Otherwise, it's the end of the basic block, so we lose. */
1305 /* It's the end of the basic block, so we lose. */
1313 /* The "last use" that was recorded can't be found after the first
1314 use. This can happen when the last use was deleted while
1315 processing an inner loop, this inner loop was then completely
1316 unrolled, and the outer loop is always exited after the inner loop,
1317 so that everything after the first use becomes a single basic block. */
1321 /* Compute the benefit of eliminating the insns in the block whose
1322 last insn is LAST. This may be a group of insns used to compute a
1323 value directly or can contain a library call. */
1326 libcall_benefit (last)
1332 for (insn = XEXP (find_reg_note (last, REG_RETVAL, NULL_RTX), 0);
1333 insn != last; insn = NEXT_INSN (insn))
1335 if (GET_CODE (insn) == CALL_INSN)
1336 benefit += 10; /* Assume at least this many insns in a library
1338 else if (GET_CODE (insn) == INSN
1339 && GET_CODE (PATTERN (insn)) != USE
1340 && GET_CODE (PATTERN (insn)) != CLOBBER)
1347 /* Skip COUNT insns from INSN, counting library calls as 1 insn. */
1350 skip_consec_insns (insn, count)
1354 for (; count > 0; count--)
1358 /* If first insn of libcall sequence, skip to end. */
1359 /* Do this at start of loop, since INSN is guaranteed to
1361 if (GET_CODE (insn) != NOTE
1362 && (temp = find_reg_note (insn, REG_LIBCALL, NULL_RTX)))
1363 insn = XEXP (temp, 0);
1366 insn = NEXT_INSN (insn);
1367 while (GET_CODE (insn) == NOTE);
1373 /* Ignore any movable whose insn falls within a libcall
1374 which is part of another movable.
1375 We make use of the fact that the movable for the libcall value
1376 was made later and so appears later on the chain. */
1379 ignore_some_movables (movables)
1380 struct loop_movables *movables;
1382 struct movable *m, *m1;
1384 for (m = movables->head; m; m = m->next)
1386 /* Is this a movable for the value of a libcall? */
1387 rtx note = find_reg_note (m->insn, REG_RETVAL, NULL_RTX);
1391 /* Check for earlier movables inside that range,
1392 and mark them invalid. We cannot use LUIDs here because
1393 insns created by loop.c for prior loops don't have LUIDs.
1394 Rather than reject all such insns from movables, we just
1395 explicitly check each insn in the libcall (since invariant
1396 libcalls aren't that common). */
1397 for (insn = XEXP (note, 0); insn != m->insn; insn = NEXT_INSN (insn))
1398 for (m1 = movables->head; m1 != m; m1 = m1->next)
1399 if (m1->insn == insn)
1405 /* For each movable insn, see if the reg that it loads
1406 leads when it dies right into another conditionally movable insn.
1407 If so, record that the second insn "forces" the first one,
1408 since the second can be moved only if the first is. */
1411 force_movables (movables)
1412 struct loop_movables *movables;
1414 struct movable *m, *m1;
1416 for (m1 = movables->head; m1; m1 = m1->next)
1417 /* Omit this if moving just the (SET (REG) 0) of a zero-extend. */
1418 if (!m1->partial && !m1->done)
1420 int regno = m1->regno;
1421 for (m = m1->next; m; m = m->next)
1422 /* ??? Could this be a bug? What if CSE caused the
1423 register of M1 to be used after this insn?
1424 Since CSE does not update regno_last_uid,
1425 this insn M->insn might not be where it dies.
1426 But very likely this doesn't matter; what matters is
1427 that M's reg is computed from M1's reg. */
1428 if (INSN_UID (m->insn) == REGNO_LAST_UID (regno)
1431 if (m != 0 && m->set_src == m1->set_dest
1432 /* If m->consec, m->set_src isn't valid. */
1436 /* Increase the priority of the moving the first insn
1437 since it permits the second to be moved as well. */
1441 m1->lifetime += m->lifetime;
1442 m1->savings += m->savings;
1447 /* Find invariant expressions that are equal and can be combined into
1451 combine_movables (movables, regs)
1452 struct loop_movables *movables;
1453 struct loop_regs *regs;
1456 char *matched_regs = (char *) xmalloc (regs->num);
1457 enum machine_mode mode;
1459 /* Regs that are set more than once are not allowed to match
1460 or be matched. I'm no longer sure why not. */
1461 /* Only pseudo registers are allowed to match or be matched,
1462 since move_movables does not validate the change. */
1463 /* Perhaps testing m->consec_sets would be more appropriate here? */
1465 for (m = movables->head; m; m = m->next)
1466 if (m->match == 0 && regs->array[m->regno].n_times_set == 1
1467 && m->regno >= FIRST_PSEUDO_REGISTER
1471 int regno = m->regno;
1473 memset (matched_regs, 0, regs->num);
1474 matched_regs[regno] = 1;
1476 /* We want later insns to match the first one. Don't make the first
1477 one match any later ones. So start this loop at m->next. */
1478 for (m1 = m->next; m1; m1 = m1->next)
1479 if (m != m1 && m1->match == 0
1480 && regs->array[m1->regno].n_times_set == 1
1481 && m1->regno >= FIRST_PSEUDO_REGISTER
1482 /* A reg used outside the loop mustn't be eliminated. */
1484 /* A reg used for zero-extending mustn't be eliminated. */
1486 && (matched_regs[m1->regno]
1489 /* Can combine regs with different modes loaded from the
1490 same constant only if the modes are the same or
1491 if both are integer modes with M wider or the same
1492 width as M1. The check for integer is redundant, but
1493 safe, since the only case of differing destination
1494 modes with equal sources is when both sources are
1495 VOIDmode, i.e., CONST_INT. */
1496 (GET_MODE (m->set_dest) == GET_MODE (m1->set_dest)
1497 || (GET_MODE_CLASS (GET_MODE (m->set_dest)) == MODE_INT
1498 && GET_MODE_CLASS (GET_MODE (m1->set_dest)) == MODE_INT
1499 && (GET_MODE_BITSIZE (GET_MODE (m->set_dest))
1500 >= GET_MODE_BITSIZE (GET_MODE (m1->set_dest)))))
1501 /* See if the source of M1 says it matches M. */
1502 && ((GET_CODE (m1->set_src) == REG
1503 && matched_regs[REGNO (m1->set_src)])
1504 || rtx_equal_for_loop_p (m->set_src, m1->set_src,
1506 && ((m->dependencies == m1->dependencies)
1507 || rtx_equal_p (m->dependencies, m1->dependencies)))
1509 m->lifetime += m1->lifetime;
1510 m->savings += m1->savings;
1513 matched_regs[m1->regno] = 1;
1517 /* Now combine the regs used for zero-extension.
1518 This can be done for those not marked `global'
1519 provided their lives don't overlap. */
1521 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
1522 mode = GET_MODE_WIDER_MODE (mode))
1524 struct movable *m0 = 0;
1526 /* Combine all the registers for extension from mode MODE.
1527 Don't combine any that are used outside this loop. */
1528 for (m = movables->head; m; m = m->next)
1529 if (m->partial && ! m->global
1530 && mode == GET_MODE (SET_SRC (PATTERN (NEXT_INSN (m->insn)))))
1534 int first = REGNO_FIRST_LUID (m->regno);
1535 int last = REGNO_LAST_LUID (m->regno);
1539 /* First one: don't check for overlap, just record it. */
1544 /* Make sure they extend to the same mode.
1545 (Almost always true.) */
1546 if (GET_MODE (m->set_dest) != GET_MODE (m0->set_dest))
1549 /* We already have one: check for overlap with those
1550 already combined together. */
1551 for (m1 = movables->head; m1 != m; m1 = m1->next)
1552 if (m1 == m0 || (m1->partial && m1->match == m0))
1553 if (! (REGNO_FIRST_LUID (m1->regno) > last
1554 || REGNO_LAST_LUID (m1->regno) < first))
1557 /* No overlap: we can combine this with the others. */
1558 m0->lifetime += m->lifetime;
1559 m0->savings += m->savings;
1569 free (matched_regs);
1572 /* Returns the number of movable instructions in LOOP that were not
1573 moved outside the loop. */
1576 num_unmoved_movables (loop)
1577 const struct loop *loop;
1582 for (m = LOOP_MOVABLES (loop)->head; m; m = m->next)
1590 /* Return 1 if regs X and Y will become the same if moved. */
1593 regs_match_p (x, y, movables)
1595 struct loop_movables *movables;
1597 unsigned int xn = REGNO (x);
1598 unsigned int yn = REGNO (y);
1599 struct movable *mx, *my;
1601 for (mx = movables->head; mx; mx = mx->next)
1602 if (mx->regno == xn)
1605 for (my = movables->head; my; my = my->next)
1606 if (my->regno == yn)
1610 && ((mx->match == my->match && mx->match != 0)
1612 || mx == my->match));
1615 /* Return 1 if X and Y are identical-looking rtx's.
1616 This is the Lisp function EQUAL for rtx arguments.
1618 If two registers are matching movables or a movable register and an
1619 equivalent constant, consider them equal. */
1622 rtx_equal_for_loop_p (x, y, movables, regs)
1624 struct loop_movables *movables;
1625 struct loop_regs *regs;
1635 if (x == 0 || y == 0)
1638 code = GET_CODE (x);
1640 /* If we have a register and a constant, they may sometimes be
1642 if (GET_CODE (x) == REG && regs->array[REGNO (x)].set_in_loop == -2
1645 for (m = movables->head; m; m = m->next)
1646 if (m->move_insn && m->regno == REGNO (x)
1647 && rtx_equal_p (m->set_src, y))
1650 else if (GET_CODE (y) == REG && regs->array[REGNO (y)].set_in_loop == -2
1653 for (m = movables->head; m; m = m->next)
1654 if (m->move_insn && m->regno == REGNO (y)
1655 && rtx_equal_p (m->set_src, x))
1659 /* Otherwise, rtx's of different codes cannot be equal. */
1660 if (code != GET_CODE (y))
1663 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
1664 (REG:SI x) and (REG:HI x) are NOT equivalent. */
1666 if (GET_MODE (x) != GET_MODE (y))
1669 /* These three types of rtx's can be compared nonrecursively. */
1671 return (REGNO (x) == REGNO (y) || regs_match_p (x, y, movables));
1673 if (code == LABEL_REF)
1674 return XEXP (x, 0) == XEXP (y, 0);
1675 if (code == SYMBOL_REF)
1676 return XSTR (x, 0) == XSTR (y, 0);
1678 /* Compare the elements. If any pair of corresponding elements
1679 fail to match, return 0 for the whole things. */
1681 fmt = GET_RTX_FORMAT (code);
1682 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1687 if (XWINT (x, i) != XWINT (y, i))
1692 if (XINT (x, i) != XINT (y, i))
1697 /* Two vectors must have the same length. */
1698 if (XVECLEN (x, i) != XVECLEN (y, i))
1701 /* And the corresponding elements must match. */
1702 for (j = 0; j < XVECLEN (x, i); j++)
1703 if (rtx_equal_for_loop_p (XVECEXP (x, i, j), XVECEXP (y, i, j),
1704 movables, regs) == 0)
1709 if (rtx_equal_for_loop_p (XEXP (x, i), XEXP (y, i), movables, regs)
1715 if (strcmp (XSTR (x, i), XSTR (y, i)))
1720 /* These are just backpointers, so they don't matter. */
1726 /* It is believed that rtx's at this level will never
1727 contain anything but integers and other rtx's,
1728 except for within LABEL_REFs and SYMBOL_REFs. */
1736 /* If X contains any LABEL_REF's, add REG_LABEL notes for them to all
1737 insns in INSNS which use the reference. LABEL_NUSES for CODE_LABEL
1738 references is incremented once for each added note. */
1741 add_label_notes (x, insns)
1745 enum rtx_code code = GET_CODE (x);
1750 if (code == LABEL_REF && !LABEL_REF_NONLOCAL_P (x))
1752 /* This code used to ignore labels that referred to dispatch tables to
1753 avoid flow generating (slighly) worse code.
1755 We no longer ignore such label references (see LABEL_REF handling in
1756 mark_jump_label for additional information). */
1757 for (insn = insns; insn; insn = NEXT_INSN (insn))
1758 if (reg_mentioned_p (XEXP (x, 0), insn))
1760 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_LABEL, XEXP (x, 0),
1762 if (LABEL_P (XEXP (x, 0)))
1763 LABEL_NUSES (XEXP (x, 0))++;
1767 fmt = GET_RTX_FORMAT (code);
1768 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1771 add_label_notes (XEXP (x, i), insns);
1772 else if (fmt[i] == 'E')
1773 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1774 add_label_notes (XVECEXP (x, i, j), insns);
1778 /* Scan MOVABLES, and move the insns that deserve to be moved.
1779 If two matching movables are combined, replace one reg with the
1780 other throughout. */
1783 move_movables (loop, movables, threshold, insn_count)
1785 struct loop_movables *movables;
1789 struct loop_regs *regs = LOOP_REGS (loop);
1790 int nregs = regs->num;
1794 rtx loop_start = loop->start;
1795 rtx loop_end = loop->end;
1796 /* Map of pseudo-register replacements to handle combining
1797 when we move several insns that load the same value
1798 into different pseudo-registers. */
1799 rtx *reg_map = (rtx *) xcalloc (nregs, sizeof (rtx));
1800 char *already_moved = (char *) xcalloc (nregs, sizeof (char));
1802 for (m = movables->head; m; m = m->next)
1804 /* Describe this movable insn. */
1806 if (loop_dump_stream)
1808 fprintf (loop_dump_stream, "Insn %d: regno %d (life %d), ",
1809 INSN_UID (m->insn), m->regno, m->lifetime);
1811 fprintf (loop_dump_stream, "consec %d, ", m->consec);
1813 fprintf (loop_dump_stream, "cond ");
1815 fprintf (loop_dump_stream, "force ");
1817 fprintf (loop_dump_stream, "global ");
1819 fprintf (loop_dump_stream, "done ");
1821 fprintf (loop_dump_stream, "move-insn ");
1823 fprintf (loop_dump_stream, "matches %d ",
1824 INSN_UID (m->match->insn));
1826 fprintf (loop_dump_stream, "forces %d ",
1827 INSN_UID (m->forces->insn));
1830 /* Ignore the insn if it's already done (it matched something else).
1831 Otherwise, see if it is now safe to move. */
1835 || (1 == loop_invariant_p (loop, m->set_src)
1836 && (m->dependencies == 0
1837 || 1 == loop_invariant_p (loop, m->dependencies))
1839 || 1 == consec_sets_invariant_p (loop, m->set_dest,
1842 && (! m->forces || m->forces->done))
1846 int savings = m->savings;
1848 /* We have an insn that is safe to move.
1849 Compute its desirability. */
1854 if (loop_dump_stream)
1855 fprintf (loop_dump_stream, "savings %d ", savings);
1857 if (regs->array[regno].moved_once && loop_dump_stream)
1858 fprintf (loop_dump_stream, "halved since already moved ");
1860 /* An insn MUST be moved if we already moved something else
1861 which is safe only if this one is moved too: that is,
1862 if already_moved[REGNO] is nonzero. */
1864 /* An insn is desirable to move if the new lifetime of the
1865 register is no more than THRESHOLD times the old lifetime.
1866 If it's not desirable, it means the loop is so big
1867 that moving won't speed things up much,
1868 and it is liable to make register usage worse. */
1870 /* It is also desirable to move if it can be moved at no
1871 extra cost because something else was already moved. */
1873 if (already_moved[regno]
1874 || flag_move_all_movables
1875 || (threshold * savings * m->lifetime) >=
1876 (regs->array[regno].moved_once ? insn_count * 2 : insn_count)
1877 || (m->forces && m->forces->done
1878 && regs->array[m->forces->regno].n_times_set == 1))
1882 rtx first = NULL_RTX;
1884 /* Now move the insns that set the reg. */
1886 if (m->partial && m->match)
1890 /* Find the end of this chain of matching regs.
1891 Thus, we load each reg in the chain from that one reg.
1892 And that reg is loaded with 0 directly,
1893 since it has ->match == 0. */
1894 for (m1 = m; m1->match; m1 = m1->match);
1895 newpat = gen_move_insn (SET_DEST (PATTERN (m->insn)),
1896 SET_DEST (PATTERN (m1->insn)));
1897 i1 = loop_insn_hoist (loop, newpat);
1899 /* Mark the moved, invariant reg as being allowed to
1900 share a hard reg with the other matching invariant. */
1901 REG_NOTES (i1) = REG_NOTES (m->insn);
1902 r1 = SET_DEST (PATTERN (m->insn));
1903 r2 = SET_DEST (PATTERN (m1->insn));
1905 = gen_rtx_EXPR_LIST (VOIDmode, r1,
1906 gen_rtx_EXPR_LIST (VOIDmode, r2,
1908 delete_insn (m->insn);
1913 if (loop_dump_stream)
1914 fprintf (loop_dump_stream, " moved to %d", INSN_UID (i1));
1916 /* If we are to re-generate the item being moved with a
1917 new move insn, first delete what we have and then emit
1918 the move insn before the loop. */
1919 else if (m->move_insn)
1923 for (count = m->consec; count >= 0; count--)
1925 /* If this is the first insn of a library call sequence,
1926 something is very wrong. */
1927 if (GET_CODE (p) != NOTE
1928 && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
1931 /* If this is the last insn of a libcall sequence, then
1932 delete every insn in the sequence except the last.
1933 The last insn is handled in the normal manner. */
1934 if (GET_CODE (p) != NOTE
1935 && (temp = find_reg_note (p, REG_RETVAL, NULL_RTX)))
1937 temp = XEXP (temp, 0);
1939 temp = delete_insn (temp);
1943 p = delete_insn (p);
1945 /* simplify_giv_expr expects that it can walk the insns
1946 at m->insn forwards and see this old sequence we are
1947 tossing here. delete_insn does preserve the next
1948 pointers, but when we skip over a NOTE we must fix
1949 it up. Otherwise that code walks into the non-deleted
1951 while (p && GET_CODE (p) == NOTE)
1952 p = NEXT_INSN (temp) = NEXT_INSN (p);
1956 emit_move_insn (m->set_dest, m->set_src);
1960 add_label_notes (m->set_src, seq);
1962 i1 = loop_insn_hoist (loop, seq);
1963 if (! find_reg_note (i1, REG_EQUAL, NULL_RTX))
1964 set_unique_reg_note (i1,
1965 m->is_equiv ? REG_EQUIV : REG_EQUAL,
1968 if (loop_dump_stream)
1969 fprintf (loop_dump_stream, " moved to %d", INSN_UID (i1));
1971 /* The more regs we move, the less we like moving them. */
1976 for (count = m->consec; count >= 0; count--)
1980 /* If first insn of libcall sequence, skip to end. */
1981 /* Do this at start of loop, since p is guaranteed to
1983 if (GET_CODE (p) != NOTE
1984 && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
1987 /* If last insn of libcall sequence, move all
1988 insns except the last before the loop. The last
1989 insn is handled in the normal manner. */
1990 if (GET_CODE (p) != NOTE
1991 && (temp = find_reg_note (p, REG_RETVAL, NULL_RTX)))
1995 rtx fn_address_insn = 0;
1998 for (temp = XEXP (temp, 0); temp != p;
1999 temp = NEXT_INSN (temp))
2005 if (GET_CODE (temp) == NOTE)
2008 body = PATTERN (temp);
2010 /* Find the next insn after TEMP,
2011 not counting USE or NOTE insns. */
2012 for (next = NEXT_INSN (temp); next != p;
2013 next = NEXT_INSN (next))
2014 if (! (GET_CODE (next) == INSN
2015 && GET_CODE (PATTERN (next)) == USE)
2016 && GET_CODE (next) != NOTE)
2019 /* If that is the call, this may be the insn
2020 that loads the function address.
2022 Extract the function address from the insn
2023 that loads it into a register.
2024 If this insn was cse'd, we get incorrect code.
2026 So emit a new move insn that copies the
2027 function address into the register that the
2028 call insn will use. flow.c will delete any
2029 redundant stores that we have created. */
2030 if (GET_CODE (next) == CALL_INSN
2031 && GET_CODE (body) == SET
2032 && GET_CODE (SET_DEST (body)) == REG
2033 && (n = find_reg_note (temp, REG_EQUAL,
2036 fn_reg = SET_SRC (body);
2037 if (GET_CODE (fn_reg) != REG)
2038 fn_reg = SET_DEST (body);
2039 fn_address = XEXP (n, 0);
2040 fn_address_insn = temp;
2042 /* We have the call insn.
2043 If it uses the register we suspect it might,
2044 load it with the correct address directly. */
2045 if (GET_CODE (temp) == CALL_INSN
2047 && reg_referenced_p (fn_reg, body))
2048 loop_insn_emit_after (loop, 0, fn_address_insn,
2050 (fn_reg, fn_address));
2052 if (GET_CODE (temp) == CALL_INSN)
2054 i1 = loop_call_insn_hoist (loop, body);
2055 /* Because the USAGE information potentially
2056 contains objects other than hard registers
2057 we need to copy it. */
2058 if (CALL_INSN_FUNCTION_USAGE (temp))
2059 CALL_INSN_FUNCTION_USAGE (i1)
2060 = copy_rtx (CALL_INSN_FUNCTION_USAGE (temp));
2063 i1 = loop_insn_hoist (loop, body);
2066 if (temp == fn_address_insn)
2067 fn_address_insn = i1;
2068 REG_NOTES (i1) = REG_NOTES (temp);
2069 REG_NOTES (temp) = NULL;
2075 if (m->savemode != VOIDmode)
2077 /* P sets REG to zero; but we should clear only
2078 the bits that are not covered by the mode
2080 rtx reg = m->set_dest;
2085 tem = expand_simple_binop
2086 (GET_MODE (reg), AND, reg,
2087 GEN_INT ((((HOST_WIDE_INT) 1
2088 << GET_MODE_BITSIZE (m->savemode)))
2090 reg, 1, OPTAB_LIB_WIDEN);
2094 emit_move_insn (reg, tem);
2095 sequence = get_insns ();
2097 i1 = loop_insn_hoist (loop, sequence);
2099 else if (GET_CODE (p) == CALL_INSN)
2101 i1 = loop_call_insn_hoist (loop, PATTERN (p));
2102 /* Because the USAGE information potentially
2103 contains objects other than hard registers
2104 we need to copy it. */
2105 if (CALL_INSN_FUNCTION_USAGE (p))
2106 CALL_INSN_FUNCTION_USAGE (i1)
2107 = copy_rtx (CALL_INSN_FUNCTION_USAGE (p));
2109 else if (count == m->consec && m->move_insn_first)
2112 /* The SET_SRC might not be invariant, so we must
2113 use the REG_EQUAL note. */
2115 emit_move_insn (m->set_dest, m->set_src);
2119 add_label_notes (m->set_src, seq);
2121 i1 = loop_insn_hoist (loop, seq);
2122 if (! find_reg_note (i1, REG_EQUAL, NULL_RTX))
2123 set_unique_reg_note (i1, m->is_equiv ? REG_EQUIV
2124 : REG_EQUAL, m->set_src);
2127 i1 = loop_insn_hoist (loop, PATTERN (p));
2129 if (REG_NOTES (i1) == 0)
2131 REG_NOTES (i1) = REG_NOTES (p);
2132 REG_NOTES (p) = NULL;
2134 /* If there is a REG_EQUAL note present whose value
2135 is not loop invariant, then delete it, since it
2136 may cause problems with later optimization passes.
2137 It is possible for cse to create such notes
2138 like this as a result of record_jump_cond. */
2140 if ((temp = find_reg_note (i1, REG_EQUAL, NULL_RTX))
2141 && ! loop_invariant_p (loop, XEXP (temp, 0)))
2142 remove_note (i1, temp);
2148 if (loop_dump_stream)
2149 fprintf (loop_dump_stream, " moved to %d",
2152 /* If library call, now fix the REG_NOTES that contain
2153 insn pointers, namely REG_LIBCALL on FIRST
2154 and REG_RETVAL on I1. */
2155 if ((temp = find_reg_note (i1, REG_RETVAL, NULL_RTX)))
2157 XEXP (temp, 0) = first;
2158 temp = find_reg_note (first, REG_LIBCALL, NULL_RTX);
2159 XEXP (temp, 0) = i1;
2166 /* simplify_giv_expr expects that it can walk the insns
2167 at m->insn forwards and see this old sequence we are
2168 tossing here. delete_insn does preserve the next
2169 pointers, but when we skip over a NOTE we must fix
2170 it up. Otherwise that code walks into the non-deleted
2172 while (p && GET_CODE (p) == NOTE)
2173 p = NEXT_INSN (temp) = NEXT_INSN (p);
2176 /* The more regs we move, the less we like moving them. */
2180 /* Any other movable that loads the same register
2182 already_moved[regno] = 1;
2184 /* This reg has been moved out of one loop. */
2185 regs->array[regno].moved_once = 1;
2187 /* The reg set here is now invariant. */
2191 for (i = 0; i < LOOP_REGNO_NREGS (regno, m->set_dest); i++)
2192 regs->array[regno+i].set_in_loop = 0;
2197 /* Change the length-of-life info for the register
2198 to say it lives at least the full length of this loop.
2199 This will help guide optimizations in outer loops. */
2201 if (REGNO_FIRST_LUID (regno) > INSN_LUID (loop_start))
2202 /* This is the old insn before all the moved insns.
2203 We can't use the moved insn because it is out of range
2204 in uid_luid. Only the old insns have luids. */
2205 REGNO_FIRST_UID (regno) = INSN_UID (loop_start);
2206 if (REGNO_LAST_LUID (regno) < INSN_LUID (loop_end))
2207 REGNO_LAST_UID (regno) = INSN_UID (loop_end);
2209 /* Combine with this moved insn any other matching movables. */
2212 for (m1 = movables->head; m1; m1 = m1->next)
2217 /* Schedule the reg loaded by M1
2218 for replacement so that shares the reg of M.
2219 If the modes differ (only possible in restricted
2220 circumstances, make a SUBREG.
2222 Note this assumes that the target dependent files
2223 treat REG and SUBREG equally, including within
2224 GO_IF_LEGITIMATE_ADDRESS and in all the
2225 predicates since we never verify that replacing the
2226 original register with a SUBREG results in a
2227 recognizable insn. */
2228 if (GET_MODE (m->set_dest) == GET_MODE (m1->set_dest))
2229 reg_map[m1->regno] = m->set_dest;
2232 = gen_lowpart_common (GET_MODE (m1->set_dest),
2235 /* Get rid of the matching insn
2236 and prevent further processing of it. */
2239 /* if library call, delete all insns. */
2240 if ((temp = find_reg_note (m1->insn, REG_RETVAL,
2242 delete_insn_chain (XEXP (temp, 0), m1->insn);
2244 delete_insn (m1->insn);
2246 /* Any other movable that loads the same register
2248 already_moved[m1->regno] = 1;
2250 /* The reg merged here is now invariant,
2251 if the reg it matches is invariant. */
2256 i < LOOP_REGNO_NREGS (regno, m1->set_dest);
2258 regs->array[m1->regno+i].set_in_loop = 0;
2262 else if (loop_dump_stream)
2263 fprintf (loop_dump_stream, "not desirable");
2265 else if (loop_dump_stream && !m->match)
2266 fprintf (loop_dump_stream, "not safe");
2268 if (loop_dump_stream)
2269 fprintf (loop_dump_stream, "\n");
2273 new_start = loop_start;
2275 /* Go through all the instructions in the loop, making
2276 all the register substitutions scheduled in REG_MAP. */
2277 for (p = new_start; p != loop_end; p = NEXT_INSN (p))
2278 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
2279 || GET_CODE (p) == CALL_INSN)
2281 replace_regs (PATTERN (p), reg_map, nregs, 0);
2282 replace_regs (REG_NOTES (p), reg_map, nregs, 0);
2288 free (already_moved);
2293 loop_movables_add (movables, m)
2294 struct loop_movables *movables;
2297 if (movables->head == 0)
2300 movables->last->next = m;
2306 loop_movables_free (movables)
2307 struct loop_movables *movables;
2310 struct movable *m_next;
2312 for (m = movables->head; m; m = m_next)
2320 /* Scan X and replace the address of any MEM in it with ADDR.
2321 REG is the address that MEM should have before the replacement. */
2324 replace_call_address (x, reg, addr)
2333 code = GET_CODE (x);
2347 /* Short cut for very common case. */
2348 replace_call_address (XEXP (x, 1), reg, addr);
2352 /* Short cut for very common case. */
2353 replace_call_address (XEXP (x, 0), reg, addr);
2357 /* If this MEM uses a reg other than the one we expected,
2358 something is wrong. */
2359 if (XEXP (x, 0) != reg)
2368 fmt = GET_RTX_FORMAT (code);
2369 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2372 replace_call_address (XEXP (x, i), reg, addr);
2373 else if (fmt[i] == 'E')
2376 for (j = 0; j < XVECLEN (x, i); j++)
2377 replace_call_address (XVECEXP (x, i, j), reg, addr);
2383 /* Return the number of memory refs to addresses that vary
2387 count_nonfixed_reads (loop, x)
2388 const struct loop *loop;
2399 code = GET_CODE (x);
2413 return ((loop_invariant_p (loop, XEXP (x, 0)) != 1)
2414 + count_nonfixed_reads (loop, XEXP (x, 0)));
2421 fmt = GET_RTX_FORMAT (code);
2422 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2425 value += count_nonfixed_reads (loop, XEXP (x, i));
2429 for (j = 0; j < XVECLEN (x, i); j++)
2430 value += count_nonfixed_reads (loop, XVECEXP (x, i, j));
2436 /* Scan a loop setting the elements `cont', `vtop', `loops_enclosed',
2437 `has_call', `has_nonconst_call', `has_volatile', `has_tablejump',
2438 `unknown_address_altered', `unknown_constant_address_altered', and
2439 `num_mem_sets' in LOOP. Also, fill in the array `mems' and the
2440 list `store_mems' in LOOP. */
2448 struct loop_info *loop_info = LOOP_INFO (loop);
2449 rtx start = loop->start;
2450 rtx end = loop->end;
2451 /* The label after END. Jumping here is just like falling off the
2452 end of the loop. We use next_nonnote_insn instead of next_label
2453 as a hedge against the (pathological) case where some actual insn
2454 might end up between the two. */
2455 rtx exit_target = next_nonnote_insn (end);
2457 loop_info->has_indirect_jump = indirect_jump_in_function;
2458 loop_info->pre_header_has_call = 0;
2459 loop_info->has_call = 0;
2460 loop_info->has_nonconst_call = 0;
2461 loop_info->has_prefetch = 0;
2462 loop_info->has_volatile = 0;
2463 loop_info->has_tablejump = 0;
2464 loop_info->has_multiple_exit_targets = 0;
2467 loop_info->unknown_address_altered = 0;
2468 loop_info->unknown_constant_address_altered = 0;
2469 loop_info->store_mems = NULL_RTX;
2470 loop_info->first_loop_store_insn = NULL_RTX;
2471 loop_info->mems_idx = 0;
2472 loop_info->num_mem_sets = 0;
2473 /* If loop opts run twice, this was set on 1st pass for 2nd. */
2474 loop_info->preconditioned = NOTE_PRECONDITIONED (end);
2476 for (insn = start; insn && GET_CODE (insn) != CODE_LABEL;
2477 insn = PREV_INSN (insn))
2479 if (GET_CODE (insn) == CALL_INSN)
2481 loop_info->pre_header_has_call = 1;
2486 for (insn = NEXT_INSN (start); insn != NEXT_INSN (end);
2487 insn = NEXT_INSN (insn))
2489 switch (GET_CODE (insn))
2492 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
2495 /* Count number of loops contained in this one. */
2498 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END)
2503 if (! CONST_OR_PURE_CALL_P (insn))
2505 loop_info->unknown_address_altered = 1;
2506 loop_info->has_nonconst_call = 1;
2508 else if (pure_call_p (insn))
2509 loop_info->has_nonconst_call = 1;
2510 loop_info->has_call = 1;
2511 if (can_throw_internal (insn))
2512 loop_info->has_multiple_exit_targets = 1;
2516 if (! loop_info->has_multiple_exit_targets)
2518 rtx set = pc_set (insn);
2522 rtx src = SET_SRC (set);
2525 if (GET_CODE (src) == IF_THEN_ELSE)
2527 label1 = XEXP (src, 1);
2528 label2 = XEXP (src, 2);
2538 if (label1 && label1 != pc_rtx)
2540 if (GET_CODE (label1) != LABEL_REF)
2542 /* Something tricky. */
2543 loop_info->has_multiple_exit_targets = 1;
2546 else if (XEXP (label1, 0) != exit_target
2547 && LABEL_OUTSIDE_LOOP_P (label1))
2549 /* A jump outside the current loop. */
2550 loop_info->has_multiple_exit_targets = 1;
2562 /* A return, or something tricky. */
2563 loop_info->has_multiple_exit_targets = 1;
2569 if (volatile_refs_p (PATTERN (insn)))
2570 loop_info->has_volatile = 1;
2572 if (GET_CODE (insn) == JUMP_INSN
2573 && (GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC
2574 || GET_CODE (PATTERN (insn)) == ADDR_VEC))
2575 loop_info->has_tablejump = 1;
2577 note_stores (PATTERN (insn), note_addr_stored, loop_info);
2578 if (! loop_info->first_loop_store_insn && loop_info->store_mems)
2579 loop_info->first_loop_store_insn = insn;
2581 if (flag_non_call_exceptions && can_throw_internal (insn))
2582 loop_info->has_multiple_exit_targets = 1;
2590 /* Now, rescan the loop, setting up the LOOP_MEMS array. */
2591 if (/* An exception thrown by a called function might land us
2593 ! loop_info->has_nonconst_call
2594 /* We don't want loads for MEMs moved to a location before the
2595 one at which their stack memory becomes allocated. (Note
2596 that this is not a problem for malloc, etc., since those
2597 require actual function calls. */
2598 && ! current_function_calls_alloca
2599 /* There are ways to leave the loop other than falling off the
2601 && ! loop_info->has_multiple_exit_targets)
2602 for (insn = NEXT_INSN (start); insn != NEXT_INSN (end);
2603 insn = NEXT_INSN (insn))
2604 for_each_rtx (&insn, insert_loop_mem, loop_info);
2606 /* BLKmode MEMs are added to LOOP_STORE_MEM as necessary so
2607 that loop_invariant_p and load_mems can use true_dependence
2608 to determine what is really clobbered. */
2609 if (loop_info->unknown_address_altered)
2611 rtx mem = gen_rtx_MEM (BLKmode, const0_rtx);
2613 loop_info->store_mems
2614 = gen_rtx_EXPR_LIST (VOIDmode, mem, loop_info->store_mems);
2616 if (loop_info->unknown_constant_address_altered)
2618 rtx mem = gen_rtx_MEM (BLKmode, const0_rtx);
2620 RTX_UNCHANGING_P (mem) = 1;
2621 loop_info->store_mems
2622 = gen_rtx_EXPR_LIST (VOIDmode, mem, loop_info->store_mems);
2626 /* Invalidate all loops containing LABEL. */
2629 invalidate_loops_containing_label (label)
2633 for (loop = uid_loop[INSN_UID (label)]; loop; loop = loop->outer)
2637 /* Scan the function looking for loops. Record the start and end of each loop.
2638 Also mark as invalid loops any loops that contain a setjmp or are branched
2639 to from outside the loop. */
2642 find_and_verify_loops (f, loops)
2644 struct loops *loops;
2649 struct loop *current_loop;
2650 struct loop *next_loop;
2653 num_loops = loops->num;
2655 compute_luids (f, NULL_RTX, 0);
2657 /* If there are jumps to undefined labels,
2658 treat them as jumps out of any/all loops.
2659 This also avoids writing past end of tables when there are no loops. */
2662 /* Find boundaries of loops, mark which loops are contained within
2663 loops, and invalidate loops that have setjmp. */
2666 current_loop = NULL;
2667 for (insn = f; insn; insn = NEXT_INSN (insn))
2669 if (GET_CODE (insn) == NOTE)
2670 switch (NOTE_LINE_NUMBER (insn))
2672 case NOTE_INSN_LOOP_BEG:
2673 next_loop = loops->array + num_loops;
2674 next_loop->num = num_loops;
2676 next_loop->start = insn;
2677 next_loop->outer = current_loop;
2678 current_loop = next_loop;
2681 case NOTE_INSN_LOOP_CONT:
2682 current_loop->cont = insn;
2685 case NOTE_INSN_LOOP_VTOP:
2686 current_loop->vtop = insn;
2689 case NOTE_INSN_LOOP_END:
2693 current_loop->end = insn;
2694 current_loop = current_loop->outer;
2701 if (GET_CODE (insn) == CALL_INSN
2702 && find_reg_note (insn, REG_SETJMP, NULL))
2704 /* In this case, we must invalidate our current loop and any
2706 for (loop = current_loop; loop; loop = loop->outer)
2709 if (loop_dump_stream)
2710 fprintf (loop_dump_stream,
2711 "\nLoop at %d ignored due to setjmp.\n",
2712 INSN_UID (loop->start));
2716 /* Note that this will mark the NOTE_INSN_LOOP_END note as being in the
2717 enclosing loop, but this doesn't matter. */
2718 uid_loop[INSN_UID (insn)] = current_loop;
2721 /* Any loop containing a label used in an initializer must be invalidated,
2722 because it can be jumped into from anywhere. */
2723 for (label = forced_labels; label; label = XEXP (label, 1))
2724 invalidate_loops_containing_label (XEXP (label, 0));
2726 /* Any loop containing a label used for an exception handler must be
2727 invalidated, because it can be jumped into from anywhere. */
2728 for_each_eh_label (invalidate_loops_containing_label);
2730 /* Now scan all insn's in the function. If any JUMP_INSN branches into a
2731 loop that it is not contained within, that loop is marked invalid.
2732 If any INSN or CALL_INSN uses a label's address, then the loop containing
2733 that label is marked invalid, because it could be jumped into from
2736 Also look for blocks of code ending in an unconditional branch that
2737 exits the loop. If such a block is surrounded by a conditional
2738 branch around the block, move the block elsewhere (see below) and
2739 invert the jump to point to the code block. This may eliminate a
2740 label in our loop and will simplify processing by both us and a
2741 possible second cse pass. */
2743 for (insn = f; insn; insn = NEXT_INSN (insn))
2746 struct loop *this_loop = uid_loop[INSN_UID (insn)];
2748 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
2750 rtx note = find_reg_note (insn, REG_LABEL, NULL_RTX);
2752 invalidate_loops_containing_label (XEXP (note, 0));
2755 if (GET_CODE (insn) != JUMP_INSN)
2758 mark_loop_jump (PATTERN (insn), this_loop);
2760 /* See if this is an unconditional branch outside the loop. */
2762 && (GET_CODE (PATTERN (insn)) == RETURN
2763 || (any_uncondjump_p (insn)
2764 && onlyjump_p (insn)
2765 && (uid_loop[INSN_UID (JUMP_LABEL (insn))]
2767 && get_max_uid () < max_uid_for_loop)
2770 rtx our_next = next_real_insn (insn);
2771 rtx last_insn_to_move = NEXT_INSN (insn);
2772 struct loop *dest_loop;
2773 struct loop *outer_loop = NULL;
2775 /* Go backwards until we reach the start of the loop, a label,
2777 for (p = PREV_INSN (insn);
2778 GET_CODE (p) != CODE_LABEL
2779 && ! (GET_CODE (p) == NOTE
2780 && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
2781 && GET_CODE (p) != JUMP_INSN;
2785 /* Check for the case where we have a jump to an inner nested
2786 loop, and do not perform the optimization in that case. */
2788 if (JUMP_LABEL (insn))
2790 dest_loop = uid_loop[INSN_UID (JUMP_LABEL (insn))];
2793 for (outer_loop = dest_loop; outer_loop;
2794 outer_loop = outer_loop->outer)
2795 if (outer_loop == this_loop)
2800 /* Make sure that the target of P is within the current loop. */
2802 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p)
2803 && uid_loop[INSN_UID (JUMP_LABEL (p))] != this_loop)
2804 outer_loop = this_loop;
2806 /* If we stopped on a JUMP_INSN to the next insn after INSN,
2807 we have a block of code to try to move.
2809 We look backward and then forward from the target of INSN
2810 to find a BARRIER at the same loop depth as the target.
2811 If we find such a BARRIER, we make a new label for the start
2812 of the block, invert the jump in P and point it to that label,
2813 and move the block of code to the spot we found. */
2816 && GET_CODE (p) == JUMP_INSN
2817 && JUMP_LABEL (p) != 0
2818 /* Just ignore jumps to labels that were never emitted.
2819 These always indicate compilation errors. */
2820 && INSN_UID (JUMP_LABEL (p)) != 0
2821 && any_condjump_p (p) && onlyjump_p (p)
2822 && next_real_insn (JUMP_LABEL (p)) == our_next
2823 /* If it's not safe to move the sequence, then we
2825 && insns_safe_to_move_p (p, NEXT_INSN (insn),
2826 &last_insn_to_move))
2829 = JUMP_LABEL (insn) ? JUMP_LABEL (insn) : get_last_insn ();
2830 struct loop *target_loop = uid_loop[INSN_UID (target)];
2834 /* Search for possible garbage past the conditional jumps
2835 and look for the last barrier. */
2836 for (tmp = last_insn_to_move;
2837 tmp && GET_CODE (tmp) != CODE_LABEL; tmp = NEXT_INSN (tmp))
2838 if (GET_CODE (tmp) == BARRIER)
2839 last_insn_to_move = tmp;
2841 for (loc = target; loc; loc = PREV_INSN (loc))
2842 if (GET_CODE (loc) == BARRIER
2843 /* Don't move things inside a tablejump. */
2844 && ((loc2 = next_nonnote_insn (loc)) == 0
2845 || GET_CODE (loc2) != CODE_LABEL
2846 || (loc2 = next_nonnote_insn (loc2)) == 0
2847 || GET_CODE (loc2) != JUMP_INSN
2848 || (GET_CODE (PATTERN (loc2)) != ADDR_VEC
2849 && GET_CODE (PATTERN (loc2)) != ADDR_DIFF_VEC))
2850 && uid_loop[INSN_UID (loc)] == target_loop)
2854 for (loc = target; loc; loc = NEXT_INSN (loc))
2855 if (GET_CODE (loc) == BARRIER
2856 /* Don't move things inside a tablejump. */
2857 && ((loc2 = next_nonnote_insn (loc)) == 0
2858 || GET_CODE (loc2) != CODE_LABEL
2859 || (loc2 = next_nonnote_insn (loc2)) == 0
2860 || GET_CODE (loc2) != JUMP_INSN
2861 || (GET_CODE (PATTERN (loc2)) != ADDR_VEC
2862 && GET_CODE (PATTERN (loc2)) != ADDR_DIFF_VEC))
2863 && uid_loop[INSN_UID (loc)] == target_loop)
2868 rtx cond_label = JUMP_LABEL (p);
2869 rtx new_label = get_label_after (p);
2871 /* Ensure our label doesn't go away. */
2872 LABEL_NUSES (cond_label)++;
2874 /* Verify that uid_loop is large enough and that
2876 if (invert_jump (p, new_label, 1))
2880 /* If no suitable BARRIER was found, create a suitable
2881 one before TARGET. Since TARGET is a fall through
2882 path, we'll need to insert a jump around our block
2883 and add a BARRIER before TARGET.
2885 This creates an extra unconditional jump outside
2886 the loop. However, the benefits of removing rarely
2887 executed instructions from inside the loop usually
2888 outweighs the cost of the extra unconditional jump
2889 outside the loop. */
2894 temp = gen_jump (JUMP_LABEL (insn));
2895 temp = emit_jump_insn_before (temp, target);
2896 JUMP_LABEL (temp) = JUMP_LABEL (insn);
2897 LABEL_NUSES (JUMP_LABEL (insn))++;
2898 loc = emit_barrier_before (target);
2901 /* Include the BARRIER after INSN and copy the
2903 if (squeeze_notes (&new_label, &last_insn_to_move))
2905 reorder_insns (new_label, last_insn_to_move, loc);
2907 /* All those insns are now in TARGET_LOOP. */
2909 q != NEXT_INSN (last_insn_to_move);
2911 uid_loop[INSN_UID (q)] = target_loop;
2913 /* The label jumped to by INSN is no longer a loop
2914 exit. Unless INSN does not have a label (e.g.,
2915 it is a RETURN insn), search loop->exit_labels
2916 to find its label_ref, and remove it. Also turn
2917 off LABEL_OUTSIDE_LOOP_P bit. */
2918 if (JUMP_LABEL (insn))
2920 for (q = 0, r = this_loop->exit_labels;
2922 q = r, r = LABEL_NEXTREF (r))
2923 if (XEXP (r, 0) == JUMP_LABEL (insn))
2925 LABEL_OUTSIDE_LOOP_P (r) = 0;
2927 LABEL_NEXTREF (q) = LABEL_NEXTREF (r);
2929 this_loop->exit_labels = LABEL_NEXTREF (r);
2933 for (loop = this_loop; loop && loop != target_loop;
2937 /* If we didn't find it, then something is
2943 /* P is now a jump outside the loop, so it must be put
2944 in loop->exit_labels, and marked as such.
2945 The easiest way to do this is to just call
2946 mark_loop_jump again for P. */
2947 mark_loop_jump (PATTERN (p), this_loop);
2949 /* If INSN now jumps to the insn after it,
2951 if (JUMP_LABEL (insn) != 0
2952 && (next_real_insn (JUMP_LABEL (insn))
2953 == next_real_insn (insn)))
2954 delete_related_insns (insn);
2957 /* Continue the loop after where the conditional
2958 branch used to jump, since the only branch insn
2959 in the block (if it still remains) is an inter-loop
2960 branch and hence needs no processing. */
2961 insn = NEXT_INSN (cond_label);
2963 if (--LABEL_NUSES (cond_label) == 0)
2964 delete_related_insns (cond_label);
2966 /* This loop will be continued with NEXT_INSN (insn). */
2967 insn = PREV_INSN (insn);
2974 /* If any label in X jumps to a loop different from LOOP_NUM and any of the
2975 loops it is contained in, mark the target loop invalid.
2977 For speed, we assume that X is part of a pattern of a JUMP_INSN. */
2980 mark_loop_jump (x, loop)
2984 struct loop *dest_loop;
2985 struct loop *outer_loop;
2988 switch (GET_CODE (x))
3001 /* There could be a label reference in here. */
3002 mark_loop_jump (XEXP (x, 0), loop);
3008 mark_loop_jump (XEXP (x, 0), loop);
3009 mark_loop_jump (XEXP (x, 1), loop);
3013 /* This may refer to a LABEL_REF or SYMBOL_REF. */
3014 mark_loop_jump (XEXP (x, 1), loop);
3019 mark_loop_jump (XEXP (x, 0), loop);
3023 dest_loop = uid_loop[INSN_UID (XEXP (x, 0))];
3025 /* Link together all labels that branch outside the loop. This
3026 is used by final_[bg]iv_value and the loop unrolling code. Also
3027 mark this LABEL_REF so we know that this branch should predict
3030 /* A check to make sure the label is not in an inner nested loop,
3031 since this does not count as a loop exit. */
3034 for (outer_loop = dest_loop; outer_loop;
3035 outer_loop = outer_loop->outer)
3036 if (outer_loop == loop)
3042 if (loop && ! outer_loop)
3044 LABEL_OUTSIDE_LOOP_P (x) = 1;
3045 LABEL_NEXTREF (x) = loop->exit_labels;
3046 loop->exit_labels = x;
3048 for (outer_loop = loop;
3049 outer_loop && outer_loop != dest_loop;
3050 outer_loop = outer_loop->outer)
3051 outer_loop->exit_count++;
3054 /* If this is inside a loop, but not in the current loop or one enclosed
3055 by it, it invalidates at least one loop. */
3060 /* We must invalidate every nested loop containing the target of this
3061 label, except those that also contain the jump insn. */
3063 for (; dest_loop; dest_loop = dest_loop->outer)
3065 /* Stop when we reach a loop that also contains the jump insn. */
3066 for (outer_loop = loop; outer_loop; outer_loop = outer_loop->outer)
3067 if (dest_loop == outer_loop)
3070 /* If we get here, we know we need to invalidate a loop. */
3071 if (loop_dump_stream && ! dest_loop->invalid)
3072 fprintf (loop_dump_stream,
3073 "\nLoop at %d ignored due to multiple entry points.\n",
3074 INSN_UID (dest_loop->start));
3076 dest_loop->invalid = 1;
3081 /* If this is not setting pc, ignore. */
3082 if (SET_DEST (x) == pc_rtx)
3083 mark_loop_jump (SET_SRC (x), loop);
3087 mark_loop_jump (XEXP (x, 1), loop);
3088 mark_loop_jump (XEXP (x, 2), loop);
3093 for (i = 0; i < XVECLEN (x, 0); i++)
3094 mark_loop_jump (XVECEXP (x, 0, i), loop);
3098 for (i = 0; i < XVECLEN (x, 1); i++)
3099 mark_loop_jump (XVECEXP (x, 1, i), loop);
3103 /* Strictly speaking this is not a jump into the loop, only a possible
3104 jump out of the loop. However, we have no way to link the destination
3105 of this jump onto the list of exit labels. To be safe we mark this
3106 loop and any containing loops as invalid. */
3109 for (outer_loop = loop; outer_loop; outer_loop = outer_loop->outer)
3111 if (loop_dump_stream && ! outer_loop->invalid)
3112 fprintf (loop_dump_stream,
3113 "\nLoop at %d ignored due to unknown exit jump.\n",
3114 INSN_UID (outer_loop->start));
3115 outer_loop->invalid = 1;
3122 /* Return nonzero if there is a label in the range from
3123 insn INSN to and including the insn whose luid is END
3124 INSN must have an assigned luid (i.e., it must not have
3125 been previously created by loop.c). */
3128 labels_in_range_p (insn, end)
3132 while (insn && INSN_LUID (insn) <= end)
3134 if (GET_CODE (insn) == CODE_LABEL)
3136 insn = NEXT_INSN (insn);
3142 /* Record that a memory reference X is being set. */
3145 note_addr_stored (x, y, data)
3147 rtx y ATTRIBUTE_UNUSED;
3148 void *data ATTRIBUTE_UNUSED;
3150 struct loop_info *loop_info = data;
3152 if (x == 0 || GET_CODE (x) != MEM)
3155 /* Count number of memory writes.
3156 This affects heuristics in strength_reduce. */
3157 loop_info->num_mem_sets++;
3159 /* BLKmode MEM means all memory is clobbered. */
3160 if (GET_MODE (x) == BLKmode)
3162 if (RTX_UNCHANGING_P (x))
3163 loop_info->unknown_constant_address_altered = 1;
3165 loop_info->unknown_address_altered = 1;
3170 loop_info->store_mems = gen_rtx_EXPR_LIST (VOIDmode, x,
3171 loop_info->store_mems);
3174 /* X is a value modified by an INSN that references a biv inside a loop
3175 exit test (ie, X is somehow related to the value of the biv). If X
3176 is a pseudo that is used more than once, then the biv is (effectively)
3177 used more than once. DATA is a pointer to a loop_regs structure. */
3180 note_set_pseudo_multiple_uses (x, y, data)
3182 rtx y ATTRIBUTE_UNUSED;
3185 struct loop_regs *regs = (struct loop_regs *) data;
3190 while (GET_CODE (x) == STRICT_LOW_PART
3191 || GET_CODE (x) == SIGN_EXTRACT
3192 || GET_CODE (x) == ZERO_EXTRACT
3193 || GET_CODE (x) == SUBREG)
3196 if (GET_CODE (x) != REG || REGNO (x) < FIRST_PSEUDO_REGISTER)
3199 /* If we do not have usage information, or if we know the register
3200 is used more than once, note that fact for check_dbra_loop. */
3201 if (REGNO (x) >= max_reg_before_loop
3202 || ! regs->array[REGNO (x)].single_usage
3203 || regs->array[REGNO (x)].single_usage == const0_rtx)
3204 regs->multiple_uses = 1;
3207 /* Return nonzero if the rtx X is invariant over the current loop.
3209 The value is 2 if we refer to something only conditionally invariant.
3211 A memory ref is invariant if it is not volatile and does not conflict
3212 with anything stored in `loop_info->store_mems'. */
3215 loop_invariant_p (loop, x)
3216 const struct loop *loop;
3219 struct loop_info *loop_info = LOOP_INFO (loop);
3220 struct loop_regs *regs = LOOP_REGS (loop);
3224 int conditional = 0;
3229 code = GET_CODE (x);
3239 /* A LABEL_REF is normally invariant, however, if we are unrolling
3240 loops, and this label is inside the loop, then it isn't invariant.
3241 This is because each unrolled copy of the loop body will have
3242 a copy of this label. If this was invariant, then an insn loading
3243 the address of this label into a register might get moved outside
3244 the loop, and then each loop body would end up using the same label.
3246 We don't know the loop bounds here though, so just fail for all
3248 if (flag_unroll_loops)
3255 case UNSPEC_VOLATILE:
3259 /* We used to check RTX_UNCHANGING_P (x) here, but that is invalid
3260 since the reg might be set by initialization within the loop. */
3262 if ((x == frame_pointer_rtx || x == hard_frame_pointer_rtx
3263 || x == arg_pointer_rtx || x == pic_offset_table_rtx)
3264 && ! current_function_has_nonlocal_goto)
3267 if (LOOP_INFO (loop)->has_call
3268 && REGNO (x) < FIRST_PSEUDO_REGISTER && call_used_regs[REGNO (x)])
3271 /* Out-of-range regs can occur when we are called from unrolling.
3272 These have always been created by the unroller and are set in
3273 the loop, hence are never invariant. */
3275 if (REGNO (x) >= (unsigned) regs->num)
3278 if (regs->array[REGNO (x)].set_in_loop < 0)
3281 return regs->array[REGNO (x)].set_in_loop == 0;
3284 /* Volatile memory references must be rejected. Do this before
3285 checking for read-only items, so that volatile read-only items
3286 will be rejected also. */
3287 if (MEM_VOLATILE_P (x))
3290 /* See if there is any dependence between a store and this load. */
3291 mem_list_entry = loop_info->store_mems;
3292 while (mem_list_entry)
3294 if (true_dependence (XEXP (mem_list_entry, 0), VOIDmode,
3298 mem_list_entry = XEXP (mem_list_entry, 1);
3301 /* It's not invalidated by a store in memory
3302 but we must still verify the address is invariant. */
3306 /* Don't mess with insns declared volatile. */
3307 if (MEM_VOLATILE_P (x))
3315 fmt = GET_RTX_FORMAT (code);
3316 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3320 int tem = loop_invariant_p (loop, XEXP (x, i));
3326 else if (fmt[i] == 'E')
3329 for (j = 0; j < XVECLEN (x, i); j++)
3331 int tem = loop_invariant_p (loop, XVECEXP (x, i, j));
3341 return 1 + conditional;
3344 /* Return nonzero if all the insns in the loop that set REG
3345 are INSN and the immediately following insns,
3346 and if each of those insns sets REG in an invariant way
3347 (not counting uses of REG in them).
3349 The value is 2 if some of these insns are only conditionally invariant.
3351 We assume that INSN itself is the first set of REG
3352 and that its source is invariant. */
3355 consec_sets_invariant_p (loop, reg, n_sets, insn)
3356 const struct loop *loop;
3360 struct loop_regs *regs = LOOP_REGS (loop);
3362 unsigned int regno = REGNO (reg);
3364 /* Number of sets we have to insist on finding after INSN. */
3365 int count = n_sets - 1;
3366 int old = regs->array[regno].set_in_loop;
3370 /* If N_SETS hit the limit, we can't rely on its value. */
3374 regs->array[regno].set_in_loop = 0;
3382 code = GET_CODE (p);
3384 /* If library call, skip to end of it. */
3385 if (code == INSN && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
3390 && (set = single_set (p))
3391 && GET_CODE (SET_DEST (set)) == REG
3392 && REGNO (SET_DEST (set)) == regno)
3394 this = loop_invariant_p (loop, SET_SRC (set));
3397 else if ((temp = find_reg_note (p, REG_EQUAL, NULL_RTX)))
3399 /* If this is a libcall, then any invariant REG_EQUAL note is OK.
3400 If this is an ordinary insn, then only CONSTANT_P REG_EQUAL
3402 this = (CONSTANT_P (XEXP (temp, 0))
3403 || (find_reg_note (p, REG_RETVAL, NULL_RTX)
3404 && loop_invariant_p (loop, XEXP (temp, 0))));
3411 else if (code != NOTE)
3413 regs->array[regno].set_in_loop = old;
3418 regs->array[regno].set_in_loop = old;
3419 /* If loop_invariant_p ever returned 2, we return 2. */
3420 return 1 + (value & 2);
3424 /* I don't think this condition is sufficient to allow INSN
3425 to be moved, so we no longer test it. */
3427 /* Return 1 if all insns in the basic block of INSN and following INSN
3428 that set REG are invariant according to TABLE. */
3431 all_sets_invariant_p (reg, insn, table)
3436 int regno = REGNO (reg);
3442 code = GET_CODE (p);
3443 if (code == CODE_LABEL || code == JUMP_INSN)
3445 if (code == INSN && GET_CODE (PATTERN (p)) == SET
3446 && GET_CODE (SET_DEST (PATTERN (p))) == REG
3447 && REGNO (SET_DEST (PATTERN (p))) == regno)
3449 if (! loop_invariant_p (loop, SET_SRC (PATTERN (p)), table))
3456 /* Look at all uses (not sets) of registers in X. For each, if it is
3457 the single use, set USAGE[REGNO] to INSN; if there was a previous use in
3458 a different insn, set USAGE[REGNO] to const0_rtx. */
3461 find_single_use_in_loop (regs, insn, x)
3462 struct loop_regs *regs;
3466 enum rtx_code code = GET_CODE (x);
3467 const char *fmt = GET_RTX_FORMAT (code);
3471 regs->array[REGNO (x)].single_usage
3472 = (regs->array[REGNO (x)].single_usage != 0
3473 && regs->array[REGNO (x)].single_usage != insn)
3474 ? const0_rtx : insn;
3476 else if (code == SET)
3478 /* Don't count SET_DEST if it is a REG; otherwise count things
3479 in SET_DEST because if a register is partially modified, it won't
3480 show up as a potential movable so we don't care how USAGE is set
3482 if (GET_CODE (SET_DEST (x)) != REG)
3483 find_single_use_in_loop (regs, insn, SET_DEST (x));
3484 find_single_use_in_loop (regs, insn, SET_SRC (x));
3487 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3489 if (fmt[i] == 'e' && XEXP (x, i) != 0)
3490 find_single_use_in_loop (regs, insn, XEXP (x, i));
3491 else if (fmt[i] == 'E')
3492 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3493 find_single_use_in_loop (regs, insn, XVECEXP (x, i, j));
3497 /* Count and record any set in X which is contained in INSN. Update
3498 REGS->array[I].MAY_NOT_OPTIMIZE and LAST_SET for any register I set
3502 count_one_set (regs, insn, x, last_set)
3503 struct loop_regs *regs;
3507 if (GET_CODE (x) == CLOBBER && GET_CODE (XEXP (x, 0)) == REG)
3508 /* Don't move a reg that has an explicit clobber.
3509 It's not worth the pain to try to do it correctly. */
3510 regs->array[REGNO (XEXP (x, 0))].may_not_optimize = 1;
3512 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
3514 rtx dest = SET_DEST (x);
3515 while (GET_CODE (dest) == SUBREG
3516 || GET_CODE (dest) == ZERO_EXTRACT
3517 || GET_CODE (dest) == SIGN_EXTRACT
3518 || GET_CODE (dest) == STRICT_LOW_PART)
3519 dest = XEXP (dest, 0);
3520 if (GET_CODE (dest) == REG)
3523 int regno = REGNO (dest);
3524 for (i = 0; i < LOOP_REGNO_NREGS (regno, dest); i++)
3526 /* If this is the first setting of this reg
3527 in current basic block, and it was set before,
3528 it must be set in two basic blocks, so it cannot
3529 be moved out of the loop. */
3530 if (regs->array[regno].set_in_loop > 0
3532 regs->array[regno+i].may_not_optimize = 1;
3533 /* If this is not first setting in current basic block,
3534 see if reg was used in between previous one and this.
3535 If so, neither one can be moved. */
3536 if (last_set[regno] != 0
3537 && reg_used_between_p (dest, last_set[regno], insn))
3538 regs->array[regno+i].may_not_optimize = 1;
3539 if (regs->array[regno+i].set_in_loop < 127)
3540 ++regs->array[regno+i].set_in_loop;
3541 last_set[regno+i] = insn;
3547 /* Given a loop that is bounded by LOOP->START and LOOP->END and that
3548 is entered at LOOP->SCAN_START, return 1 if the register set in SET
3549 contained in insn INSN is used by any insn that precedes INSN in
3550 cyclic order starting from the loop entry point.
3552 We don't want to use INSN_LUID here because if we restrict INSN to those
3553 that have a valid INSN_LUID, it means we cannot move an invariant out
3554 from an inner loop past two loops. */
3557 loop_reg_used_before_p (loop, set, insn)
3558 const struct loop *loop;
3561 rtx reg = SET_DEST (set);
3564 /* Scan forward checking for register usage. If we hit INSN, we
3565 are done. Otherwise, if we hit LOOP->END, wrap around to LOOP->START. */
3566 for (p = loop->scan_start; p != insn; p = NEXT_INSN (p))
3568 if (INSN_P (p) && reg_overlap_mentioned_p (reg, PATTERN (p)))
3579 /* Information we collect about arrays that we might want to prefetch. */
3580 struct prefetch_info
3582 struct iv_class *class; /* Class this prefetch is based on. */
3583 struct induction *giv; /* GIV this prefetch is based on. */
3584 rtx base_address; /* Start prefetching from this address plus
3586 HOST_WIDE_INT index;
3587 HOST_WIDE_INT stride; /* Prefetch stride in bytes in each
3589 unsigned int bytes_accessed; /* Sum of sizes of all accesses to this
3590 prefetch area in one iteration. */
3591 unsigned int total_bytes; /* Total bytes loop will access in this block.
3592 This is set only for loops with known
3593 iteration counts and is 0xffffffff
3595 int prefetch_in_loop; /* Number of prefetch insns in loop. */
3596 int prefetch_before_loop; /* Number of prefetch insns before loop. */
3597 unsigned int write : 1; /* 1 for read/write prefetches. */
3600 /* Data used by check_store function. */
3601 struct check_store_data
3607 static void check_store PARAMS ((rtx, rtx, void *));
3608 static void emit_prefetch_instructions PARAMS ((struct loop *));
3609 static int rtx_equal_for_prefetch_p PARAMS ((rtx, rtx));
3611 /* Set mem_write when mem_address is found. Used as callback to
3614 check_store (x, pat, data)
3615 rtx x, pat ATTRIBUTE_UNUSED;
3618 struct check_store_data *d = (struct check_store_data *) data;
3620 if ((GET_CODE (x) == MEM) && rtx_equal_p (d->mem_address, XEXP (x, 0)))
3624 /* Like rtx_equal_p, but attempts to swap commutative operands. This is
3625 important to get some addresses combined. Later more sophisticated
3626 transformations can be added when necessary.
3628 ??? Same trick with swapping operand is done at several other places.
3629 It can be nice to develop some common way to handle this. */
3632 rtx_equal_for_prefetch_p (x, y)
3637 enum rtx_code code = GET_CODE (x);
3642 if (code != GET_CODE (y))
3645 code = GET_CODE (x);
3647 if (GET_RTX_CLASS (code) == 'c')
3649 return ((rtx_equal_for_prefetch_p (XEXP (x, 0), XEXP (y, 0))
3650 && rtx_equal_for_prefetch_p (XEXP (x, 1), XEXP (y, 1)))
3651 || (rtx_equal_for_prefetch_p (XEXP (x, 0), XEXP (y, 1))
3652 && rtx_equal_for_prefetch_p (XEXP (x, 1), XEXP (y, 0))));
3654 /* Compare the elements. If any pair of corresponding elements fails to
3655 match, return 0 for the whole thing. */
3657 fmt = GET_RTX_FORMAT (code);
3658 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3663 if (XWINT (x, i) != XWINT (y, i))
3668 if (XINT (x, i) != XINT (y, i))
3673 /* Two vectors must have the same length. */
3674 if (XVECLEN (x, i) != XVECLEN (y, i))
3677 /* And the corresponding elements must match. */
3678 for (j = 0; j < XVECLEN (x, i); j++)
3679 if (rtx_equal_for_prefetch_p (XVECEXP (x, i, j),
3680 XVECEXP (y, i, j)) == 0)
3685 if (rtx_equal_for_prefetch_p (XEXP (x, i), XEXP (y, i)) == 0)
3690 if (strcmp (XSTR (x, i), XSTR (y, i)))
3695 /* These are just backpointers, so they don't matter. */
3701 /* It is believed that rtx's at this level will never
3702 contain anything but integers and other rtx's,
3703 except for within LABEL_REFs and SYMBOL_REFs. */
3711 /* Remove constant addition value from the expression X (when present)
3714 static HOST_WIDE_INT
3715 remove_constant_addition (x)
3718 HOST_WIDE_INT addval = 0;
3721 /* Avoid clobbering a shared CONST expression. */
3722 if (GET_CODE (exp) == CONST)
3724 if (GET_CODE (XEXP (exp, 0)) == PLUS
3725 && GET_CODE (XEXP (XEXP (exp, 0), 0)) == SYMBOL_REF
3726 && GET_CODE (XEXP (XEXP (exp, 0), 1)) == CONST_INT)
3728 *x = XEXP (XEXP (exp, 0), 0);
3729 return INTVAL (XEXP (XEXP (exp, 0), 1));
3734 if (GET_CODE (exp) == CONST_INT)
3736 addval = INTVAL (exp);
3740 /* For plus expression recurse on ourself. */
3741 else if (GET_CODE (exp) == PLUS)
3743 addval += remove_constant_addition (&XEXP (exp, 0));
3744 addval += remove_constant_addition (&XEXP (exp, 1));
3746 /* In case our parameter was constant, remove extra zero from the
3748 if (XEXP (exp, 0) == const0_rtx)
3750 else if (XEXP (exp, 1) == const0_rtx)
3757 /* Attempt to identify accesses to arrays that are most likely to cause cache
3758 misses, and emit prefetch instructions a few prefetch blocks forward.
3760 To detect the arrays we use the GIV information that was collected by the
3761 strength reduction pass.
3763 The prefetch instructions are generated after the GIV information is done
3764 and before the strength reduction process. The new GIVs are injected into
3765 the strength reduction tables, so the prefetch addresses are optimized as
3768 GIVs are split into base address, stride, and constant addition values.
3769 GIVs with the same address, stride and close addition values are combined
3770 into a single prefetch. Also writes to GIVs are detected, so that prefetch
3771 for write instructions can be used for the block we write to, on machines
3772 that support write prefetches.
3774 Several heuristics are used to determine when to prefetch. They are
3775 controlled by defined symbols that can be overridden for each target. */
3778 emit_prefetch_instructions (loop)
3781 int num_prefetches = 0;
3782 int num_real_prefetches = 0;
3783 int num_real_write_prefetches = 0;
3784 int num_prefetches_before = 0;
3785 int num_write_prefetches_before = 0;
3788 struct iv_class *bl;
3789 struct induction *iv;
3790 struct prefetch_info info[MAX_PREFETCHES];
3791 struct loop_ivs *ivs = LOOP_IVS (loop);
3796 /* Consider only loops w/o calls. When a call is done, the loop is probably
3797 slow enough to read the memory. */
3798 if (PREFETCH_NO_CALL && LOOP_INFO (loop)->has_call)
3800 if (loop_dump_stream)
3801 fprintf (loop_dump_stream, "Prefetch: ignoring loop: has call.\n");
3806 /* Don't prefetch in loops known to have few iterations. */
3807 if (PREFETCH_NO_LOW_LOOPCNT
3808 && LOOP_INFO (loop)->n_iterations
3809 && LOOP_INFO (loop)->n_iterations <= PREFETCH_LOW_LOOPCNT)
3811 if (loop_dump_stream)
3812 fprintf (loop_dump_stream,
3813 "Prefetch: ignoring loop: not enough iterations.\n");
3817 /* Search all induction variables and pick those interesting for the prefetch
3819 for (bl = ivs->list; bl; bl = bl->next)
3821 struct induction *biv = bl->biv, *biv1;
3826 /* Expect all BIVs to be executed in each iteration. This makes our
3827 analysis more conservative. */
3830 /* Discard non-constant additions that we can't handle well yet, and
3831 BIVs that are executed multiple times; such BIVs ought to be
3832 handled in the nested loop. We accept not_every_iteration BIVs,
3833 since these only result in larger strides and make our
3834 heuristics more conservative. */
3835 if (GET_CODE (biv->add_val) != CONST_INT)
3837 if (loop_dump_stream)
3839 fprintf (loop_dump_stream,
3840 "Prefetch: ignoring biv %d: non-constant addition at insn %d:",
3841 REGNO (biv->src_reg), INSN_UID (biv->insn));
3842 print_rtl (loop_dump_stream, biv->add_val);
3843 fprintf (loop_dump_stream, "\n");
3848 if (biv->maybe_multiple)
3850 if (loop_dump_stream)
3852 fprintf (loop_dump_stream,
3853 "Prefetch: ignoring biv %d: maybe_multiple at insn %i:",
3854 REGNO (biv->src_reg), INSN_UID (biv->insn));
3855 print_rtl (loop_dump_stream, biv->add_val);
3856 fprintf (loop_dump_stream, "\n");
3861 basestride += INTVAL (biv1->add_val);
3862 biv1 = biv1->next_iv;
3865 if (biv1 || !basestride)
3868 for (iv = bl->giv; iv; iv = iv->next_iv)
3872 HOST_WIDE_INT index = 0;
3874 HOST_WIDE_INT stride = 0;
3875 int stride_sign = 1;
3876 struct check_store_data d;
3877 const char *ignore_reason = NULL;
3878 int size = GET_MODE_SIZE (GET_MODE (iv));
3880 /* See whether an induction variable is interesting to us and if
3881 not, report the reason. */
3882 if (iv->giv_type != DEST_ADDR)
3883 ignore_reason = "giv is not a destination address";
3885 /* We are interested only in constant stride memory references
3886 in order to be able to compute density easily. */
3887 else if (GET_CODE (iv->mult_val) != CONST_INT)
3888 ignore_reason = "stride is not constant";
3892 stride = INTVAL (iv->mult_val) * basestride;
3899 /* On some targets, reversed order prefetches are not
3901 if (PREFETCH_NO_REVERSE_ORDER && stride_sign < 0)
3902 ignore_reason = "reversed order stride";
3904 /* Prefetch of accesses with an extreme stride might not be
3905 worthwhile, either. */
3906 else if (PREFETCH_NO_EXTREME_STRIDE
3907 && stride > PREFETCH_EXTREME_STRIDE)
3908 ignore_reason = "extreme stride";
3910 /* Ignore GIVs with varying add values; we can't predict the
3911 value for the next iteration. */
3912 else if (!loop_invariant_p (loop, iv->add_val))
3913 ignore_reason = "giv has varying add value";
3915 /* Ignore GIVs in the nested loops; they ought to have been
3917 else if (iv->maybe_multiple)
3918 ignore_reason = "giv is in nested loop";
3921 if (ignore_reason != NULL)
3923 if (loop_dump_stream)
3924 fprintf (loop_dump_stream,
3925 "Prefetch: ignoring giv at %d: %s.\n",
3926 INSN_UID (iv->insn), ignore_reason);
3930 /* Determine the pointer to the basic array we are examining. It is
3931 the sum of the BIV's initial value and the GIV's add_val. */
3932 address = copy_rtx (iv->add_val);
3933 temp = copy_rtx (bl->initial_value);
3935 address = simplify_gen_binary (PLUS, Pmode, temp, address);
3936 index = remove_constant_addition (&address);
3939 d.mem_address = *iv->location;
3941 /* When the GIV is not always executed, we might be better off by
3942 not dirtying the cache pages. */
3943 if (PREFETCH_CONDITIONAL || iv->always_executed)
3944 note_stores (PATTERN (iv->insn), check_store, &d);
3947 if (loop_dump_stream)
3948 fprintf (loop_dump_stream, "Prefetch: Ignoring giv at %d: %s\n",
3949 INSN_UID (iv->insn), "in conditional code.");
3953 /* Attempt to find another prefetch to the same array and see if we
3954 can merge this one. */
3955 for (i = 0; i < num_prefetches; i++)
3956 if (rtx_equal_for_prefetch_p (address, info[i].base_address)
3957 && stride == info[i].stride)
3959 /* In case both access same array (same location
3960 just with small difference in constant indexes), merge
3961 the prefetches. Just do the later and the earlier will
3962 get prefetched from previous iteration.
3963 The artificial threshold should not be too small,
3964 but also not bigger than small portion of memory usually
3965 traversed by single loop. */
3966 if (index >= info[i].index
3967 && index - info[i].index < PREFETCH_EXTREME_DIFFERENCE)
3969 info[i].write |= d.mem_write;
3970 info[i].bytes_accessed += size;
3971 info[i].index = index;
3974 info[num_prefetches].base_address = address;
3979 if (index < info[i].index
3980 && info[i].index - index < PREFETCH_EXTREME_DIFFERENCE)
3982 info[i].write |= d.mem_write;
3983 info[i].bytes_accessed += size;
3989 /* Merging failed. */
3992 info[num_prefetches].giv = iv;
3993 info[num_prefetches].class = bl;
3994 info[num_prefetches].index = index;
3995 info[num_prefetches].stride = stride;
3996 info[num_prefetches].base_address = address;
3997 info[num_prefetches].write = d.mem_write;
3998 info[num_prefetches].bytes_accessed = size;
4000 if (num_prefetches >= MAX_PREFETCHES)
4002 if (loop_dump_stream)
4003 fprintf (loop_dump_stream,
4004 "Maximal number of prefetches exceeded.\n");
4011 for (i = 0; i < num_prefetches; i++)
4015 /* Attempt to calculate the total number of bytes fetched by all
4016 iterations of the loop. Avoid overflow. */
4017 if (LOOP_INFO (loop)->n_iterations
4018 && ((unsigned HOST_WIDE_INT) (0xffffffff / info[i].stride)
4019 >= LOOP_INFO (loop)->n_iterations))
4020 info[i].total_bytes = info[i].stride * LOOP_INFO (loop)->n_iterations;
4022 info[i].total_bytes = 0xffffffff;
4024 density = info[i].bytes_accessed * 100 / info[i].stride;
4026 /* Prefetch might be worthwhile only when the loads/stores are dense. */
4027 if (PREFETCH_ONLY_DENSE_MEM)
4028 if (density * 256 > PREFETCH_DENSE_MEM * 100
4029 && (info[i].total_bytes / PREFETCH_BLOCK
4030 >= PREFETCH_BLOCKS_BEFORE_LOOP_MIN))
4032 info[i].prefetch_before_loop = 1;
4033 info[i].prefetch_in_loop
4034 = (info[i].total_bytes / PREFETCH_BLOCK
4035 > PREFETCH_BLOCKS_BEFORE_LOOP_MAX);
4039 info[i].prefetch_in_loop = 0, info[i].prefetch_before_loop = 0;
4040 if (loop_dump_stream)
4041 fprintf (loop_dump_stream,
4042 "Prefetch: ignoring giv at %d: %d%% density is too low.\n",
4043 INSN_UID (info[i].giv->insn), density);
4046 info[i].prefetch_in_loop = 1, info[i].prefetch_before_loop = 1;
4048 /* Find how many prefetch instructions we'll use within the loop. */
4049 if (info[i].prefetch_in_loop != 0)
4051 info[i].prefetch_in_loop = ((info[i].stride + PREFETCH_BLOCK - 1)
4053 num_real_prefetches += info[i].prefetch_in_loop;
4055 num_real_write_prefetches += info[i].prefetch_in_loop;
4059 /* Determine how many iterations ahead to prefetch within the loop, based
4060 on how many prefetches we currently expect to do within the loop. */
4061 if (num_real_prefetches != 0)
4063 if ((ahead = SIMULTANEOUS_PREFETCHES / num_real_prefetches) == 0)
4065 if (loop_dump_stream)
4066 fprintf (loop_dump_stream,
4067 "Prefetch: ignoring prefetches within loop: ahead is zero; %d < %d\n",
4068 SIMULTANEOUS_PREFETCHES, num_real_prefetches);
4069 num_real_prefetches = 0, num_real_write_prefetches = 0;
4072 /* We'll also use AHEAD to determine how many prefetch instructions to
4073 emit before a loop, so don't leave it zero. */
4075 ahead = PREFETCH_BLOCKS_BEFORE_LOOP_MAX;
4077 for (i = 0; i < num_prefetches; i++)
4079 /* Update if we've decided not to prefetch anything within the loop. */
4080 if (num_real_prefetches == 0)
4081 info[i].prefetch_in_loop = 0;
4083 /* Find how many prefetch instructions we'll use before the loop. */
4084 if (info[i].prefetch_before_loop != 0)
4086 int n = info[i].total_bytes / PREFETCH_BLOCK;
4089 info[i].prefetch_before_loop = n;
4090 num_prefetches_before += n;
4092 num_write_prefetches_before += n;
4095 if (loop_dump_stream)
4097 if (info[i].prefetch_in_loop == 0
4098 && info[i].prefetch_before_loop == 0)
4100 fprintf (loop_dump_stream, "Prefetch insn: %d",
4101 INSN_UID (info[i].giv->insn));
4102 fprintf (loop_dump_stream,
4103 "; in loop: %d; before: %d; %s\n",
4104 info[i].prefetch_in_loop,
4105 info[i].prefetch_before_loop,
4106 info[i].write ? "read/write" : "read only");
4107 fprintf (loop_dump_stream,
4108 " density: %d%%; bytes_accessed: %u; total_bytes: %u\n",
4109 (int) (info[i].bytes_accessed * 100 / info[i].stride),
4110 info[i].bytes_accessed, info[i].total_bytes);
4111 fprintf (loop_dump_stream, " index: ");
4112 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, info[i].index);
4113 fprintf (loop_dump_stream, "; stride: ");
4114 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, info[i].stride);
4115 fprintf (loop_dump_stream, "; address: ");
4116 print_rtl (loop_dump_stream, info[i].base_address);
4117 fprintf (loop_dump_stream, "\n");
4121 if (num_real_prefetches + num_prefetches_before > 0)
4123 /* Record that this loop uses prefetch instructions. */
4124 LOOP_INFO (loop)->has_prefetch = 1;
4126 if (loop_dump_stream)
4128 fprintf (loop_dump_stream, "Real prefetches needed within loop: %d (write: %d)\n",
4129 num_real_prefetches, num_real_write_prefetches);
4130 fprintf (loop_dump_stream, "Real prefetches needed before loop: %d (write: %d)\n",
4131 num_prefetches_before, num_write_prefetches_before);
4135 for (i = 0; i < num_prefetches; i++)
4139 for (y = 0; y < info[i].prefetch_in_loop; y++)
4141 rtx loc = copy_rtx (*info[i].giv->location);
4143 int bytes_ahead = PREFETCH_BLOCK * (ahead + y);
4144 rtx before_insn = info[i].giv->insn;
4145 rtx prev_insn = PREV_INSN (info[i].giv->insn);
4148 /* We can save some effort by offsetting the address on
4149 architectures with offsettable memory references. */
4150 if (offsettable_address_p (0, VOIDmode, loc))
4151 loc = plus_constant (loc, bytes_ahead);
4154 rtx reg = gen_reg_rtx (Pmode);
4155 loop_iv_add_mult_emit_before (loop, loc, const1_rtx,
4156 GEN_INT (bytes_ahead), reg,
4162 /* Make sure the address operand is valid for prefetch. */
4163 if (! (*insn_data[(int)CODE_FOR_prefetch].operand[0].predicate)
4164 (loc, insn_data[(int)CODE_FOR_prefetch].operand[0].mode))
4165 loc = force_reg (Pmode, loc);
4166 emit_insn (gen_prefetch (loc, GEN_INT (info[i].write),
4170 emit_insn_before (seq, before_insn);
4172 /* Check all insns emitted and record the new GIV
4174 insn = NEXT_INSN (prev_insn);
4175 while (insn != before_insn)
4177 insn = check_insn_for_givs (loop, insn,
4178 info[i].giv->always_executed,
4179 info[i].giv->maybe_multiple);
4180 insn = NEXT_INSN (insn);
4184 if (PREFETCH_BEFORE_LOOP)
4186 /* Emit insns before the loop to fetch the first cache lines or,
4187 if we're not prefetching within the loop, everything we expect
4189 for (y = 0; y < info[i].prefetch_before_loop; y++)
4191 rtx reg = gen_reg_rtx (Pmode);
4192 rtx loop_start = loop->start;
4193 rtx init_val = info[i].class->initial_value;
4194 rtx add_val = simplify_gen_binary (PLUS, Pmode,
4195 info[i].giv->add_val,
4196 GEN_INT (y * PREFETCH_BLOCK));
4198 /* Functions called by LOOP_IV_ADD_EMIT_BEFORE expect a
4199 non-constant INIT_VAL to have the same mode as REG, which
4200 in this case we know to be Pmode. */
4201 if (GET_MODE (init_val) != Pmode && !CONSTANT_P (init_val))
4202 init_val = convert_to_mode (Pmode, init_val, 0);
4203 loop_iv_add_mult_emit_before (loop, init_val,
4204 info[i].giv->mult_val,
4205 add_val, reg, 0, loop_start);
4206 emit_insn_before (gen_prefetch (reg, GEN_INT (info[i].write),
4216 /* A "basic induction variable" or biv is a pseudo reg that is set
4217 (within this loop) only by incrementing or decrementing it. */
4218 /* A "general induction variable" or giv is a pseudo reg whose
4219 value is a linear function of a biv. */
4221 /* Bivs are recognized by `basic_induction_var';
4222 Givs by `general_induction_var'. */
4224 /* Communication with routines called via `note_stores'. */
4226 static rtx note_insn;
4228 /* Dummy register to have nonzero DEST_REG for DEST_ADDR type givs. */
4230 static rtx addr_placeholder;
4232 /* ??? Unfinished optimizations, and possible future optimizations,
4233 for the strength reduction code. */
4235 /* ??? The interaction of biv elimination, and recognition of 'constant'
4236 bivs, may cause problems. */
4238 /* ??? Add heuristics so that DEST_ADDR strength reduction does not cause
4239 performance problems.
4241 Perhaps don't eliminate things that can be combined with an addressing
4242 mode. Find all givs that have the same biv, mult_val, and add_val;
4243 then for each giv, check to see if its only use dies in a following
4244 memory address. If so, generate a new memory address and check to see
4245 if it is valid. If it is valid, then store the modified memory address,
4246 otherwise, mark the giv as not done so that it will get its own iv. */
4248 /* ??? Could try to optimize branches when it is known that a biv is always
4251 /* ??? When replace a biv in a compare insn, we should replace with closest
4252 giv so that an optimized branch can still be recognized by the combiner,
4253 e.g. the VAX acb insn. */
4255 /* ??? Many of the checks involving uid_luid could be simplified if regscan
4256 was rerun in loop_optimize whenever a register was added or moved.
4257 Also, some of the optimizations could be a little less conservative. */
4259 /* Scan the loop body and call FNCALL for each insn. In the addition to the
4260 LOOP and INSN parameters pass MAYBE_MULTIPLE and NOT_EVERY_ITERATION to the
4263 NOT_EVERY_ITERATION is 1 if current insn is not known to be executed at
4264 least once for every loop iteration except for the last one.
4266 MAYBE_MULTIPLE is 1 if current insn may be executed more than once for every
4270 for_each_insn_in_loop (loop, fncall)
4272 loop_insn_callback fncall;
4274 int not_every_iteration = 0;
4275 int maybe_multiple = 0;
4276 int past_loop_latch = 0;
4280 /* If loop_scan_start points to the loop exit test, we have to be wary of
4281 subversive use of gotos inside expression statements. */
4282 if (prev_nonnote_insn (loop->scan_start) != prev_nonnote_insn (loop->start))
4283 maybe_multiple = back_branch_in_range_p (loop, loop->scan_start);
4285 /* Scan through loop and update NOT_EVERY_ITERATION and MAYBE_MULTIPLE. */
4286 for (p = next_insn_in_loop (loop, loop->scan_start);
4288 p = next_insn_in_loop (loop, p))
4290 p = fncall (loop, p, not_every_iteration, maybe_multiple);
4292 /* Past CODE_LABEL, we get to insns that may be executed multiple
4293 times. The only way we can be sure that they can't is if every
4294 jump insn between here and the end of the loop either
4295 returns, exits the loop, is a jump to a location that is still
4296 behind the label, or is a jump to the loop start. */
4298 if (GET_CODE (p) == CODE_LABEL)
4306 insn = NEXT_INSN (insn);
4307 if (insn == loop->scan_start)
4309 if (insn == loop->end)
4315 if (insn == loop->scan_start)
4319 if (GET_CODE (insn) == JUMP_INSN
4320 && GET_CODE (PATTERN (insn)) != RETURN
4321 && (!any_condjump_p (insn)
4322 || (JUMP_LABEL (insn) != 0
4323 && JUMP_LABEL (insn) != loop->scan_start
4324 && !loop_insn_first_p (p, JUMP_LABEL (insn)))))
4332 /* Past a jump, we get to insns for which we can't count
4333 on whether they will be executed during each iteration. */
4334 /* This code appears twice in strength_reduce. There is also similar
4335 code in scan_loop. */
4336 if (GET_CODE (p) == JUMP_INSN
4337 /* If we enter the loop in the middle, and scan around to the
4338 beginning, don't set not_every_iteration for that.
4339 This can be any kind of jump, since we want to know if insns
4340 will be executed if the loop is executed. */
4341 && !(JUMP_LABEL (p) == loop->top
4342 && ((NEXT_INSN (NEXT_INSN (p)) == loop->end
4343 && any_uncondjump_p (p))
4344 || (NEXT_INSN (p) == loop->end && any_condjump_p (p)))))
4348 /* If this is a jump outside the loop, then it also doesn't
4349 matter. Check to see if the target of this branch is on the
4350 loop->exits_labels list. */
4352 for (label = loop->exit_labels; label; label = LABEL_NEXTREF (label))
4353 if (XEXP (label, 0) == JUMP_LABEL (p))
4357 not_every_iteration = 1;
4360 else if (GET_CODE (p) == NOTE)
4362 /* At the virtual top of a converted loop, insns are again known to
4363 be executed each iteration: logically, the loop begins here
4364 even though the exit code has been duplicated.
4366 Insns are also again known to be executed each iteration at
4367 the LOOP_CONT note. */
4368 if ((NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP
4369 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_CONT)
4371 not_every_iteration = 0;
4372 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
4374 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
4378 /* Note if we pass a loop latch. If we do, then we can not clear
4379 NOT_EVERY_ITERATION below when we pass the last CODE_LABEL in
4380 a loop since a jump before the last CODE_LABEL may have started
4381 a new loop iteration.
4383 Note that LOOP_TOP is only set for rotated loops and we need
4384 this check for all loops, so compare against the CODE_LABEL
4385 which immediately follows LOOP_START. */
4386 if (GET_CODE (p) == JUMP_INSN
4387 && JUMP_LABEL (p) == NEXT_INSN (loop->start))
4388 past_loop_latch = 1;
4390 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
4391 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
4392 or not an insn is known to be executed each iteration of the
4393 loop, whether or not any iterations are known to occur.
4395 Therefore, if we have just passed a label and have no more labels
4396 between here and the test insn of the loop, and we have not passed
4397 a jump to the top of the loop, then we know these insns will be
4398 executed each iteration. */
4400 if (not_every_iteration
4402 && GET_CODE (p) == CODE_LABEL
4403 && no_labels_between_p (p, loop->end)
4404 && loop_insn_first_p (p, loop->cont))
4405 not_every_iteration = 0;
4410 loop_bivs_find (loop)
4413 struct loop_regs *regs = LOOP_REGS (loop);
4414 struct loop_ivs *ivs = LOOP_IVS (loop);
4415 /* Temporary list pointers for traversing ivs->list. */
4416 struct iv_class *bl, **backbl;
4420 for_each_insn_in_loop (loop, check_insn_for_bivs);
4422 /* Scan ivs->list to remove all regs that proved not to be bivs.
4423 Make a sanity check against regs->n_times_set. */
4424 for (backbl = &ivs->list, bl = *backbl; bl; bl = bl->next)
4426 if (REG_IV_TYPE (ivs, bl->regno) != BASIC_INDUCT
4427 /* Above happens if register modified by subreg, etc. */
4428 /* Make sure it is not recognized as a basic induction var: */
4429 || regs->array[bl->regno].n_times_set != bl->biv_count
4430 /* If never incremented, it is invariant that we decided not to
4431 move. So leave it alone. */
4432 || ! bl->incremented)
4434 if (loop_dump_stream)
4435 fprintf (loop_dump_stream, "Biv %d: discarded, %s\n",
4437 (REG_IV_TYPE (ivs, bl->regno) != BASIC_INDUCT
4438 ? "not induction variable"
4439 : (! bl->incremented ? "never incremented"
4442 REG_IV_TYPE (ivs, bl->regno) = NOT_BASIC_INDUCT;
4449 if (loop_dump_stream)
4450 fprintf (loop_dump_stream, "Biv %d: verified\n", bl->regno);
4456 /* Determine how BIVS are initialized by looking through pre-header
4457 extended basic block. */
4459 loop_bivs_init_find (loop)
4462 struct loop_ivs *ivs = LOOP_IVS (loop);
4463 /* Temporary list pointers for traversing ivs->list. */
4464 struct iv_class *bl;
4468 /* Find initial value for each biv by searching backwards from loop_start,
4469 halting at first label. Also record any test condition. */
4472 for (p = loop->start; p && GET_CODE (p) != CODE_LABEL; p = PREV_INSN (p))
4478 if (GET_CODE (p) == CALL_INSN)
4482 note_stores (PATTERN (p), record_initial, ivs);
4484 /* Record any test of a biv that branches around the loop if no store
4485 between it and the start of loop. We only care about tests with
4486 constants and registers and only certain of those. */
4487 if (GET_CODE (p) == JUMP_INSN
4488 && JUMP_LABEL (p) != 0
4489 && next_real_insn (JUMP_LABEL (p)) == next_real_insn (loop->end)
4490 && (test = get_condition_for_loop (loop, p)) != 0
4491 && GET_CODE (XEXP (test, 0)) == REG
4492 && REGNO (XEXP (test, 0)) < max_reg_before_loop
4493 && (bl = REG_IV_CLASS (ivs, REGNO (XEXP (test, 0)))) != 0
4494 && valid_initial_value_p (XEXP (test, 1), p, call_seen, loop->start)
4495 && bl->init_insn == 0)
4497 /* If an NE test, we have an initial value! */
4498 if (GET_CODE (test) == NE)
4501 bl->init_set = gen_rtx_SET (VOIDmode,
4502 XEXP (test, 0), XEXP (test, 1));
4505 bl->initial_test = test;
4511 /* Look at the each biv and see if we can say anything better about its
4512 initial value from any initializing insns set up above. (This is done
4513 in two passes to avoid missing SETs in a PARALLEL.) */
4515 loop_bivs_check (loop)
4518 struct loop_ivs *ivs = LOOP_IVS (loop);
4519 /* Temporary list pointers for traversing ivs->list. */
4520 struct iv_class *bl;
4521 struct iv_class **backbl;
4523 for (backbl = &ivs->list; (bl = *backbl); backbl = &bl->next)
4528 if (! bl->init_insn)
4531 /* IF INIT_INSN has a REG_EQUAL or REG_EQUIV note and the value
4532 is a constant, use the value of that. */
4533 if (((note = find_reg_note (bl->init_insn, REG_EQUAL, 0)) != NULL
4534 && CONSTANT_P (XEXP (note, 0)))
4535 || ((note = find_reg_note (bl->init_insn, REG_EQUIV, 0)) != NULL
4536 && CONSTANT_P (XEXP (note, 0))))
4537 src = XEXP (note, 0);
4539 src = SET_SRC (bl->init_set);
4541 if (loop_dump_stream)
4542 fprintf (loop_dump_stream,
4543 "Biv %d: initialized at insn %d: initial value ",
4544 bl->regno, INSN_UID (bl->init_insn));
4546 if ((GET_MODE (src) == GET_MODE (regno_reg_rtx[bl->regno])
4547 || GET_MODE (src) == VOIDmode)
4548 && valid_initial_value_p (src, bl->init_insn,
4549 LOOP_INFO (loop)->pre_header_has_call,
4552 bl->initial_value = src;
4554 if (loop_dump_stream)
4556 print_simple_rtl (loop_dump_stream, src);
4557 fputc ('\n', loop_dump_stream);
4560 /* If we can't make it a giv,
4561 let biv keep initial value of "itself". */
4562 else if (loop_dump_stream)
4563 fprintf (loop_dump_stream, "is complex\n");
4568 /* Search the loop for general induction variables. */
4571 loop_givs_find (loop)
4574 for_each_insn_in_loop (loop, check_insn_for_givs);
4578 /* For each giv for which we still don't know whether or not it is
4579 replaceable, check to see if it is replaceable because its final value
4580 can be calculated. */
4583 loop_givs_check (loop)
4586 struct loop_ivs *ivs = LOOP_IVS (loop);
4587 struct iv_class *bl;
4589 for (bl = ivs->list; bl; bl = bl->next)
4591 struct induction *v;
4593 for (v = bl->giv; v; v = v->next_iv)
4594 if (! v->replaceable && ! v->not_replaceable)
4595 check_final_value (loop, v);
4600 /* Return nonzero if it is possible to eliminate the biv BL provided
4601 all givs are reduced. This is possible if either the reg is not
4602 used outside the loop, or we can compute what its final value will
4606 loop_biv_eliminable_p (loop, bl, threshold, insn_count)
4608 struct iv_class *bl;
4612 /* For architectures with a decrement_and_branch_until_zero insn,
4613 don't do this if we put a REG_NONNEG note on the endtest for this
4616 #ifdef HAVE_decrement_and_branch_until_zero
4619 if (loop_dump_stream)
4620 fprintf (loop_dump_stream,
4621 "Cannot eliminate nonneg biv %d.\n", bl->regno);
4626 /* Check that biv is used outside loop or if it has a final value.
4627 Compare against bl->init_insn rather than loop->start. We aren't
4628 concerned with any uses of the biv between init_insn and
4629 loop->start since these won't be affected by the value of the biv
4630 elsewhere in the function, so long as init_insn doesn't use the
4633 if ((REGNO_LAST_LUID (bl->regno) < INSN_LUID (loop->end)
4635 && INSN_UID (bl->init_insn) < max_uid_for_loop
4636 && REGNO_FIRST_LUID (bl->regno) >= INSN_LUID (bl->init_insn)
4637 && ! reg_mentioned_p (bl->biv->dest_reg, SET_SRC (bl->init_set)))
4638 || (bl->final_value = final_biv_value (loop, bl)))
4639 return maybe_eliminate_biv (loop, bl, 0, threshold, insn_count);
4641 if (loop_dump_stream)
4643 fprintf (loop_dump_stream,
4644 "Cannot eliminate biv %d.\n",
4646 fprintf (loop_dump_stream,
4647 "First use: insn %d, last use: insn %d.\n",
4648 REGNO_FIRST_UID (bl->regno),
4649 REGNO_LAST_UID (bl->regno));
4655 /* Reduce each giv of BL that we have decided to reduce. */
4658 loop_givs_reduce (loop, bl)
4660 struct iv_class *bl;
4662 struct induction *v;
4664 for (v = bl->giv; v; v = v->next_iv)
4666 struct induction *tv;
4667 if (! v->ignore && v->same == 0)
4669 int auto_inc_opt = 0;
4671 /* If the code for derived givs immediately below has already
4672 allocated a new_reg, we must keep it. */
4674 v->new_reg = gen_reg_rtx (v->mode);
4677 /* If the target has auto-increment addressing modes, and
4678 this is an address giv, then try to put the increment
4679 immediately after its use, so that flow can create an
4680 auto-increment addressing mode. */
4681 if (v->giv_type == DEST_ADDR && bl->biv_count == 1
4682 && bl->biv->always_executed && ! bl->biv->maybe_multiple
4683 /* We don't handle reversed biv's because bl->biv->insn
4684 does not have a valid INSN_LUID. */
4686 && v->always_executed && ! v->maybe_multiple
4687 && INSN_UID (v->insn) < max_uid_for_loop)
4689 /* If other giv's have been combined with this one, then
4690 this will work only if all uses of the other giv's occur
4691 before this giv's insn. This is difficult to check.
4693 We simplify this by looking for the common case where
4694 there is one DEST_REG giv, and this giv's insn is the
4695 last use of the dest_reg of that DEST_REG giv. If the
4696 increment occurs after the address giv, then we can
4697 perform the optimization. (Otherwise, the increment
4698 would have to go before other_giv, and we would not be
4699 able to combine it with the address giv to get an
4700 auto-inc address.) */
4701 if (v->combined_with)
4703 struct induction *other_giv = 0;
4705 for (tv = bl->giv; tv; tv = tv->next_iv)
4713 if (! tv && other_giv
4714 && REGNO (other_giv->dest_reg) < max_reg_before_loop
4715 && (REGNO_LAST_UID (REGNO (other_giv->dest_reg))
4716 == INSN_UID (v->insn))
4717 && INSN_LUID (v->insn) < INSN_LUID (bl->biv->insn))
4720 /* Check for case where increment is before the address
4721 giv. Do this test in "loop order". */
4722 else if ((INSN_LUID (v->insn) > INSN_LUID (bl->biv->insn)
4723 && (INSN_LUID (v->insn) < INSN_LUID (loop->scan_start)
4724 || (INSN_LUID (bl->biv->insn)
4725 > INSN_LUID (loop->scan_start))))
4726 || (INSN_LUID (v->insn) < INSN_LUID (loop->scan_start)
4727 && (INSN_LUID (loop->scan_start)
4728 < INSN_LUID (bl->biv->insn))))
4737 /* We can't put an insn immediately after one setting
4738 cc0, or immediately before one using cc0. */
4739 if ((auto_inc_opt == 1 && sets_cc0_p (PATTERN (v->insn)))
4740 || (auto_inc_opt == -1
4741 && (prev = prev_nonnote_insn (v->insn)) != 0
4743 && sets_cc0_p (PATTERN (prev))))
4749 v->auto_inc_opt = 1;
4753 /* For each place where the biv is incremented, add an insn
4754 to increment the new, reduced reg for the giv. */
4755 for (tv = bl->biv; tv; tv = tv->next_iv)
4760 insert_before = NEXT_INSN (tv->insn);
4761 else if (auto_inc_opt == 1)
4762 insert_before = NEXT_INSN (v->insn);
4764 insert_before = v->insn;
4766 if (tv->mult_val == const1_rtx)
4767 loop_iv_add_mult_emit_before (loop, tv->add_val, v->mult_val,
4768 v->new_reg, v->new_reg,
4770 else /* tv->mult_val == const0_rtx */
4771 /* A multiply is acceptable here
4772 since this is presumed to be seldom executed. */
4773 loop_iv_add_mult_emit_before (loop, tv->add_val, v->mult_val,
4774 v->add_val, v->new_reg,
4778 /* Add code at loop start to initialize giv's reduced reg. */
4780 loop_iv_add_mult_hoist (loop,
4781 extend_value_for_giv (v, bl->initial_value),
4782 v->mult_val, v->add_val, v->new_reg);
4788 /* Check for givs whose first use is their definition and whose
4789 last use is the definition of another giv. If so, it is likely
4790 dead and should not be used to derive another giv nor to
4794 loop_givs_dead_check (loop, bl)
4795 struct loop *loop ATTRIBUTE_UNUSED;
4796 struct iv_class *bl;
4798 struct induction *v;
4800 for (v = bl->giv; v; v = v->next_iv)
4803 || (v->same && v->same->ignore))
4806 if (v->giv_type == DEST_REG
4807 && REGNO_FIRST_UID (REGNO (v->dest_reg)) == INSN_UID (v->insn))
4809 struct induction *v1;
4811 for (v1 = bl->giv; v1; v1 = v1->next_iv)
4812 if (REGNO_LAST_UID (REGNO (v->dest_reg)) == INSN_UID (v1->insn))
4820 loop_givs_rescan (loop, bl, reg_map)
4822 struct iv_class *bl;
4825 struct induction *v;
4827 for (v = bl->giv; v; v = v->next_iv)
4829 if (v->same && v->same->ignore)
4835 /* Update expression if this was combined, in case other giv was
4838 v->new_reg = replace_rtx (v->new_reg,
4839 v->same->dest_reg, v->same->new_reg);
4841 /* See if this register is known to be a pointer to something. If
4842 so, see if we can find the alignment. First see if there is a
4843 destination register that is a pointer. If so, this shares the
4844 alignment too. Next see if we can deduce anything from the
4845 computational information. If not, and this is a DEST_ADDR
4846 giv, at least we know that it's a pointer, though we don't know
4848 if (GET_CODE (v->new_reg) == REG
4849 && v->giv_type == DEST_REG
4850 && REG_POINTER (v->dest_reg))
4851 mark_reg_pointer (v->new_reg,
4852 REGNO_POINTER_ALIGN (REGNO (v->dest_reg)));
4853 else if (GET_CODE (v->new_reg) == REG
4854 && REG_POINTER (v->src_reg))
4856 unsigned int align = REGNO_POINTER_ALIGN (REGNO (v->src_reg));
4859 || GET_CODE (v->add_val) != CONST_INT
4860 || INTVAL (v->add_val) % (align / BITS_PER_UNIT) != 0)
4863 mark_reg_pointer (v->new_reg, align);
4865 else if (GET_CODE (v->new_reg) == REG
4866 && GET_CODE (v->add_val) == REG
4867 && REG_POINTER (v->add_val))
4869 unsigned int align = REGNO_POINTER_ALIGN (REGNO (v->add_val));
4871 if (align == 0 || GET_CODE (v->mult_val) != CONST_INT
4872 || INTVAL (v->mult_val) % (align / BITS_PER_UNIT) != 0)
4875 mark_reg_pointer (v->new_reg, align);
4877 else if (GET_CODE (v->new_reg) == REG && v->giv_type == DEST_ADDR)
4878 mark_reg_pointer (v->new_reg, 0);
4880 if (v->giv_type == DEST_ADDR)
4881 /* Store reduced reg as the address in the memref where we found
4883 validate_change (v->insn, v->location, v->new_reg, 0);
4884 else if (v->replaceable)
4886 reg_map[REGNO (v->dest_reg)] = v->new_reg;
4890 rtx original_insn = v->insn;
4893 /* Not replaceable; emit an insn to set the original giv reg from
4894 the reduced giv, same as above. */
4895 v->insn = loop_insn_emit_after (loop, 0, original_insn,
4896 gen_move_insn (v->dest_reg,
4899 /* The original insn may have a REG_EQUAL note. This note is
4900 now incorrect and may result in invalid substitutions later.
4901 The original insn is dead, but may be part of a libcall
4902 sequence, which doesn't seem worth the bother of handling. */
4903 note = find_reg_note (original_insn, REG_EQUAL, NULL_RTX);
4905 remove_note (original_insn, note);
4908 /* When a loop is reversed, givs which depend on the reversed
4909 biv, and which are live outside the loop, must be set to their
4910 correct final value. This insn is only needed if the giv is
4911 not replaceable. The correct final value is the same as the
4912 value that the giv starts the reversed loop with. */
4913 if (bl->reversed && ! v->replaceable)
4914 loop_iv_add_mult_sink (loop,
4915 extend_value_for_giv (v, bl->initial_value),
4916 v->mult_val, v->add_val, v->dest_reg);
4917 else if (v->final_value)
4918 loop_insn_sink_or_swim (loop,
4919 gen_load_of_final_value (v->dest_reg,
4922 if (loop_dump_stream)
4924 fprintf (loop_dump_stream, "giv at %d reduced to ",
4925 INSN_UID (v->insn));
4926 print_simple_rtl (loop_dump_stream, v->new_reg);
4927 fprintf (loop_dump_stream, "\n");
4934 loop_giv_reduce_benefit (loop, bl, v, test_reg)
4935 struct loop *loop ATTRIBUTE_UNUSED;
4936 struct iv_class *bl;
4937 struct induction *v;
4943 benefit = v->benefit;
4944 PUT_MODE (test_reg, v->mode);
4945 add_cost = iv_add_mult_cost (bl->biv->add_val, v->mult_val,
4946 test_reg, test_reg);
4948 /* Reduce benefit if not replaceable, since we will insert a
4949 move-insn to replace the insn that calculates this giv. Don't do
4950 this unless the giv is a user variable, since it will often be
4951 marked non-replaceable because of the duplication of the exit
4952 code outside the loop. In such a case, the copies we insert are
4953 dead and will be deleted. So they don't have a cost. Similar
4954 situations exist. */
4955 /* ??? The new final_[bg]iv_value code does a much better job of
4956 finding replaceable giv's, and hence this code may no longer be
4958 if (! v->replaceable && ! bl->eliminable
4959 && REG_USERVAR_P (v->dest_reg))
4960 benefit -= copy_cost;
4962 /* Decrease the benefit to count the add-insns that we will insert
4963 to increment the reduced reg for the giv. ??? This can
4964 overestimate the run-time cost of the additional insns, e.g. if
4965 there are multiple basic blocks that increment the biv, but only
4966 one of these blocks is executed during each iteration. There is
4967 no good way to detect cases like this with the current structure
4968 of the loop optimizer. This code is more accurate for
4969 determining code size than run-time benefits. */
4970 benefit -= add_cost * bl->biv_count;
4972 /* Decide whether to strength-reduce this giv or to leave the code
4973 unchanged (recompute it from the biv each time it is used). This
4974 decision can be made independently for each giv. */
4977 /* Attempt to guess whether autoincrement will handle some of the
4978 new add insns; if so, increase BENEFIT (undo the subtraction of
4979 add_cost that was done above). */
4980 if (v->giv_type == DEST_ADDR
4981 /* Increasing the benefit is risky, since this is only a guess.
4982 Avoid increasing register pressure in cases where there would
4983 be no other benefit from reducing this giv. */
4985 && GET_CODE (v->mult_val) == CONST_INT)
4987 int size = GET_MODE_SIZE (GET_MODE (v->mem));
4989 if (HAVE_POST_INCREMENT
4990 && INTVAL (v->mult_val) == size)
4991 benefit += add_cost * bl->biv_count;
4992 else if (HAVE_PRE_INCREMENT
4993 && INTVAL (v->mult_val) == size)
4994 benefit += add_cost * bl->biv_count;
4995 else if (HAVE_POST_DECREMENT
4996 && -INTVAL (v->mult_val) == size)
4997 benefit += add_cost * bl->biv_count;
4998 else if (HAVE_PRE_DECREMENT
4999 && -INTVAL (v->mult_val) == size)
5000 benefit += add_cost * bl->biv_count;
5008 /* Free IV structures for LOOP. */
5011 loop_ivs_free (loop)
5014 struct loop_ivs *ivs = LOOP_IVS (loop);
5015 struct iv_class *iv = ivs->list;
5021 struct iv_class *next = iv->next;
5022 struct induction *induction;
5023 struct induction *next_induction;
5025 for (induction = iv->biv; induction; induction = next_induction)
5027 next_induction = induction->next_iv;
5030 for (induction = iv->giv; induction; induction = next_induction)
5032 next_induction = induction->next_iv;
5042 /* Perform strength reduction and induction variable elimination.
5044 Pseudo registers created during this function will be beyond the
5045 last valid index in several tables including
5046 REGS->ARRAY[I].N_TIMES_SET and REGNO_LAST_UID. This does not cause a
5047 problem here, because the added registers cannot be givs outside of
5048 their loop, and hence will never be reconsidered. But scan_loop
5049 must check regnos to make sure they are in bounds. */
5052 strength_reduce (loop, flags)
5056 struct loop_info *loop_info = LOOP_INFO (loop);
5057 struct loop_regs *regs = LOOP_REGS (loop);
5058 struct loop_ivs *ivs = LOOP_IVS (loop);
5060 /* Temporary list pointer for traversing ivs->list. */
5061 struct iv_class *bl;
5062 /* Ratio of extra register life span we can justify
5063 for saving an instruction. More if loop doesn't call subroutines
5064 since in that case saving an insn makes more difference
5065 and more registers are available. */
5066 /* ??? could set this to last value of threshold in move_movables */
5067 int threshold = (loop_info->has_call ? 1 : 2) * (3 + n_non_fixed_regs);
5068 /* Map of pseudo-register replacements. */
5069 rtx *reg_map = NULL;
5071 int unrolled_insn_copies = 0;
5072 rtx test_reg = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 1);
5073 int insn_count = count_insns_in_loop (loop);
5075 addr_placeholder = gen_reg_rtx (Pmode);
5077 ivs->n_regs = max_reg_before_loop;
5078 ivs->regs = (struct iv *) xcalloc (ivs->n_regs, sizeof (struct iv));
5080 /* Find all BIVs in loop. */
5081 loop_bivs_find (loop);
5083 /* Exit if there are no bivs. */
5086 /* Can still unroll the loop anyways, but indicate that there is no
5087 strength reduction info available. */
5088 if (flags & LOOP_UNROLL)
5089 unroll_loop (loop, insn_count, 0);
5091 loop_ivs_free (loop);
5095 /* Determine how BIVS are initialized by looking through pre-header
5096 extended basic block. */
5097 loop_bivs_init_find (loop);
5099 /* Look at the each biv and see if we can say anything better about its
5100 initial value from any initializing insns set up above. */
5101 loop_bivs_check (loop);
5103 /* Search the loop for general induction variables. */
5104 loop_givs_find (loop);
5106 /* Try to calculate and save the number of loop iterations. This is
5107 set to zero if the actual number can not be calculated. This must
5108 be called after all giv's have been identified, since otherwise it may
5109 fail if the iteration variable is a giv. */
5110 loop_iterations (loop);
5112 #ifdef HAVE_prefetch
5113 if (flags & LOOP_PREFETCH)
5114 emit_prefetch_instructions (loop);
5117 /* Now for each giv for which we still don't know whether or not it is
5118 replaceable, check to see if it is replaceable because its final value
5119 can be calculated. This must be done after loop_iterations is called,
5120 so that final_giv_value will work correctly. */
5121 loop_givs_check (loop);
5123 /* Try to prove that the loop counter variable (if any) is always
5124 nonnegative; if so, record that fact with a REG_NONNEG note
5125 so that "decrement and branch until zero" insn can be used. */
5126 check_dbra_loop (loop, insn_count);
5128 /* Create reg_map to hold substitutions for replaceable giv regs.
5129 Some givs might have been made from biv increments, so look at
5130 ivs->reg_iv_type for a suitable size. */
5131 reg_map_size = ivs->n_regs;
5132 reg_map = (rtx *) xcalloc (reg_map_size, sizeof (rtx));
5134 /* Examine each iv class for feasibility of strength reduction/induction
5135 variable elimination. */
5137 for (bl = ivs->list; bl; bl = bl->next)
5139 struct induction *v;
5142 /* Test whether it will be possible to eliminate this biv
5143 provided all givs are reduced. */
5144 bl->eliminable = loop_biv_eliminable_p (loop, bl, threshold, insn_count);
5146 /* This will be true at the end, if all givs which depend on this
5147 biv have been strength reduced.
5148 We can't (currently) eliminate the biv unless this is so. */
5149 bl->all_reduced = 1;
5151 /* Check each extension dependent giv in this class to see if its
5152 root biv is safe from wrapping in the interior mode. */
5153 check_ext_dependent_givs (bl, loop_info);
5155 /* Combine all giv's for this iv_class. */
5156 combine_givs (regs, bl);
5158 for (v = bl->giv; v; v = v->next_iv)
5160 struct induction *tv;
5162 if (v->ignore || v->same)
5165 benefit = loop_giv_reduce_benefit (loop, bl, v, test_reg);
5167 /* If an insn is not to be strength reduced, then set its ignore
5168 flag, and clear bl->all_reduced. */
5170 /* A giv that depends on a reversed biv must be reduced if it is
5171 used after the loop exit, otherwise, it would have the wrong
5172 value after the loop exit. To make it simple, just reduce all
5173 of such giv's whether or not we know they are used after the loop
5176 if (! flag_reduce_all_givs
5177 && v->lifetime * threshold * benefit < insn_count
5180 if (loop_dump_stream)
5181 fprintf (loop_dump_stream,
5182 "giv of insn %d not worth while, %d vs %d.\n",
5184 v->lifetime * threshold * benefit, insn_count);
5186 bl->all_reduced = 0;
5190 /* Check that we can increment the reduced giv without a
5191 multiply insn. If not, reject it. */
5193 for (tv = bl->biv; tv; tv = tv->next_iv)
5194 if (tv->mult_val == const1_rtx
5195 && ! product_cheap_p (tv->add_val, v->mult_val))
5197 if (loop_dump_stream)
5198 fprintf (loop_dump_stream,
5199 "giv of insn %d: would need a multiply.\n",
5200 INSN_UID (v->insn));
5202 bl->all_reduced = 0;
5208 /* Check for givs whose first use is their definition and whose
5209 last use is the definition of another giv. If so, it is likely
5210 dead and should not be used to derive another giv nor to
5212 loop_givs_dead_check (loop, bl);
5214 /* Reduce each giv that we decided to reduce. */
5215 loop_givs_reduce (loop, bl);
5217 /* Rescan all givs. If a giv is the same as a giv not reduced, mark it
5220 For each giv register that can be reduced now: if replaceable,
5221 substitute reduced reg wherever the old giv occurs;
5222 else add new move insn "giv_reg = reduced_reg". */
5223 loop_givs_rescan (loop, bl, reg_map);
5225 /* All the givs based on the biv bl have been reduced if they
5228 /* For each giv not marked as maybe dead that has been combined with a
5229 second giv, clear any "maybe dead" mark on that second giv.
5230 v->new_reg will either be or refer to the register of the giv it
5233 Doing this clearing avoids problems in biv elimination where
5234 a giv's new_reg is a complex value that can't be put in the
5235 insn but the giv combined with (with a reg as new_reg) is
5236 marked maybe_dead. Since the register will be used in either
5237 case, we'd prefer it be used from the simpler giv. */
5239 for (v = bl->giv; v; v = v->next_iv)
5240 if (! v->maybe_dead && v->same)
5241 v->same->maybe_dead = 0;
5243 /* Try to eliminate the biv, if it is a candidate.
5244 This won't work if ! bl->all_reduced,
5245 since the givs we planned to use might not have been reduced.
5247 We have to be careful that we didn't initially think we could
5248 eliminate this biv because of a giv that we now think may be
5249 dead and shouldn't be used as a biv replacement.
5251 Also, there is the possibility that we may have a giv that looks
5252 like it can be used to eliminate a biv, but the resulting insn
5253 isn't valid. This can happen, for example, on the 88k, where a
5254 JUMP_INSN can compare a register only with zero. Attempts to
5255 replace it with a compare with a constant will fail.
5257 Note that in cases where this call fails, we may have replaced some
5258 of the occurrences of the biv with a giv, but no harm was done in
5259 doing so in the rare cases where it can occur. */
5261 if (bl->all_reduced == 1 && bl->eliminable
5262 && maybe_eliminate_biv (loop, bl, 1, threshold, insn_count))
5264 /* ?? If we created a new test to bypass the loop entirely,
5265 or otherwise drop straight in, based on this test, then
5266 we might want to rewrite it also. This way some later
5267 pass has more hope of removing the initialization of this
5270 /* If final_value != 0, then the biv may be used after loop end
5271 and we must emit an insn to set it just in case.
5273 Reversed bivs already have an insn after the loop setting their
5274 value, so we don't need another one. We can't calculate the
5275 proper final value for such a biv here anyways. */
5276 if (bl->final_value && ! bl->reversed)
5277 loop_insn_sink_or_swim (loop,
5278 gen_load_of_final_value (bl->biv->dest_reg,
5281 if (loop_dump_stream)
5282 fprintf (loop_dump_stream, "Reg %d: biv eliminated\n",
5285 /* See above note wrt final_value. But since we couldn't eliminate
5286 the biv, we must set the value after the loop instead of before. */
5287 else if (bl->final_value && ! bl->reversed)
5288 loop_insn_sink (loop, gen_load_of_final_value (bl->biv->dest_reg,
5292 /* Go through all the instructions in the loop, making all the
5293 register substitutions scheduled in REG_MAP. */
5295 for (p = loop->start; p != loop->end; p = NEXT_INSN (p))
5296 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
5297 || GET_CODE (p) == CALL_INSN)
5299 replace_regs (PATTERN (p), reg_map, reg_map_size, 0);
5300 replace_regs (REG_NOTES (p), reg_map, reg_map_size, 0);
5304 if (loop_info->n_iterations > 0)
5306 /* When we completely unroll a loop we will likely not need the increment
5307 of the loop BIV and we will not need the conditional branch at the
5309 unrolled_insn_copies = insn_count - 2;
5312 /* When we completely unroll a loop on a HAVE_cc0 machine we will not
5313 need the comparison before the conditional branch at the end of the
5315 unrolled_insn_copies -= 1;
5318 /* We'll need one copy for each loop iteration. */
5319 unrolled_insn_copies *= loop_info->n_iterations;
5321 /* A little slop to account for the ability to remove initialization
5322 code, better CSE, and other secondary benefits of completely
5323 unrolling some loops. */
5324 unrolled_insn_copies -= 1;
5326 /* Clamp the value. */
5327 if (unrolled_insn_copies < 0)
5328 unrolled_insn_copies = 0;
5331 /* Unroll loops from within strength reduction so that we can use the
5332 induction variable information that strength_reduce has already
5333 collected. Always unroll loops that would be as small or smaller
5334 unrolled than when rolled. */
5335 if ((flags & LOOP_UNROLL)
5336 || ((flags & LOOP_AUTO_UNROLL)
5337 && loop_info->n_iterations > 0
5338 && unrolled_insn_copies <= insn_count))
5339 unroll_loop (loop, insn_count, 1);
5341 #ifdef HAVE_doloop_end
5342 if (HAVE_doloop_end && (flags & LOOP_BCT) && flag_branch_on_count_reg)
5343 doloop_optimize (loop);
5344 #endif /* HAVE_doloop_end */
5346 /* In case number of iterations is known, drop branch prediction note
5347 in the branch. Do that only in second loop pass, as loop unrolling
5348 may change the number of iterations performed. */
5349 if (flags & LOOP_BCT)
5351 unsigned HOST_WIDE_INT n
5352 = loop_info->n_iterations / loop_info->unroll_number;
5354 predict_insn (prev_nonnote_insn (loop->end), PRED_LOOP_ITERATIONS,
5355 REG_BR_PROB_BASE - REG_BR_PROB_BASE / n);
5358 if (loop_dump_stream)
5359 fprintf (loop_dump_stream, "\n");
5361 loop_ivs_free (loop);
5366 /*Record all basic induction variables calculated in the insn. */
5368 check_insn_for_bivs (loop, p, not_every_iteration, maybe_multiple)
5371 int not_every_iteration;
5374 struct loop_ivs *ivs = LOOP_IVS (loop);
5381 if (GET_CODE (p) == INSN
5382 && (set = single_set (p))
5383 && GET_CODE (SET_DEST (set)) == REG)
5385 dest_reg = SET_DEST (set);
5386 if (REGNO (dest_reg) < max_reg_before_loop
5387 && REGNO (dest_reg) >= FIRST_PSEUDO_REGISTER
5388 && REG_IV_TYPE (ivs, REGNO (dest_reg)) != NOT_BASIC_INDUCT)
5390 if (basic_induction_var (loop, SET_SRC (set),
5391 GET_MODE (SET_SRC (set)),
5392 dest_reg, p, &inc_val, &mult_val,
5395 /* It is a possible basic induction variable.
5396 Create and initialize an induction structure for it. */
5399 = (struct induction *) xmalloc (sizeof (struct induction));
5401 record_biv (loop, v, p, dest_reg, inc_val, mult_val, location,
5402 not_every_iteration, maybe_multiple);
5403 REG_IV_TYPE (ivs, REGNO (dest_reg)) = BASIC_INDUCT;
5405 else if (REGNO (dest_reg) < ivs->n_regs)
5406 REG_IV_TYPE (ivs, REGNO (dest_reg)) = NOT_BASIC_INDUCT;
5412 /* Record all givs calculated in the insn.
5413 A register is a giv if: it is only set once, it is a function of a
5414 biv and a constant (or invariant), and it is not a biv. */
5416 check_insn_for_givs (loop, p, not_every_iteration, maybe_multiple)
5419 int not_every_iteration;
5422 struct loop_regs *regs = LOOP_REGS (loop);
5425 /* Look for a general induction variable in a register. */
5426 if (GET_CODE (p) == INSN
5427 && (set = single_set (p))
5428 && GET_CODE (SET_DEST (set)) == REG
5429 && ! regs->array[REGNO (SET_DEST (set))].may_not_optimize)
5438 rtx last_consec_insn;
5440 dest_reg = SET_DEST (set);
5441 if (REGNO (dest_reg) < FIRST_PSEUDO_REGISTER)
5444 if (/* SET_SRC is a giv. */
5445 (general_induction_var (loop, SET_SRC (set), &src_reg, &add_val,
5446 &mult_val, &ext_val, 0, &benefit, VOIDmode)
5447 /* Equivalent expression is a giv. */
5448 || ((regnote = find_reg_note (p, REG_EQUAL, NULL_RTX))
5449 && general_induction_var (loop, XEXP (regnote, 0), &src_reg,
5450 &add_val, &mult_val, &ext_val, 0,
5451 &benefit, VOIDmode)))
5452 /* Don't try to handle any regs made by loop optimization.
5453 We have nothing on them in regno_first_uid, etc. */
5454 && REGNO (dest_reg) < max_reg_before_loop
5455 /* Don't recognize a BASIC_INDUCT_VAR here. */
5456 && dest_reg != src_reg
5457 /* This must be the only place where the register is set. */
5458 && (regs->array[REGNO (dest_reg)].n_times_set == 1
5459 /* or all sets must be consecutive and make a giv. */
5460 || (benefit = consec_sets_giv (loop, benefit, p,
5462 &add_val, &mult_val, &ext_val,
5463 &last_consec_insn))))
5466 = (struct induction *) xmalloc (sizeof (struct induction));
5468 /* If this is a library call, increase benefit. */
5469 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
5470 benefit += libcall_benefit (p);
5472 /* Skip the consecutive insns, if there are any. */
5473 if (regs->array[REGNO (dest_reg)].n_times_set != 1)
5474 p = last_consec_insn;
5476 record_giv (loop, v, p, src_reg, dest_reg, mult_val, add_val,
5477 ext_val, benefit, DEST_REG, not_every_iteration,
5478 maybe_multiple, (rtx*) 0);
5483 #ifndef DONT_REDUCE_ADDR
5484 /* Look for givs which are memory addresses. */
5485 /* This resulted in worse code on a VAX 8600. I wonder if it
5487 if (GET_CODE (p) == INSN)
5488 find_mem_givs (loop, PATTERN (p), p, not_every_iteration,
5492 /* Update the status of whether giv can derive other givs. This can
5493 change when we pass a label or an insn that updates a biv. */
5494 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
5495 || GET_CODE (p) == CODE_LABEL)
5496 update_giv_derive (loop, p);
5500 /* Return 1 if X is a valid source for an initial value (or as value being
5501 compared against in an initial test).
5503 X must be either a register or constant and must not be clobbered between
5504 the current insn and the start of the loop.
5506 INSN is the insn containing X. */
5509 valid_initial_value_p (x, insn, call_seen, loop_start)
5518 /* Only consider pseudos we know about initialized in insns whose luids
5520 if (GET_CODE (x) != REG
5521 || REGNO (x) >= max_reg_before_loop)
5524 /* Don't use call-clobbered registers across a call which clobbers it. On
5525 some machines, don't use any hard registers at all. */
5526 if (REGNO (x) < FIRST_PSEUDO_REGISTER
5527 && (SMALL_REGISTER_CLASSES
5528 || (call_used_regs[REGNO (x)] && call_seen)))
5531 /* Don't use registers that have been clobbered before the start of the
5533 if (reg_set_between_p (x, insn, loop_start))
5539 /* Scan X for memory refs and check each memory address
5540 as a possible giv. INSN is the insn whose pattern X comes from.
5541 NOT_EVERY_ITERATION is 1 if the insn might not be executed during
5542 every loop iteration. MAYBE_MULTIPLE is 1 if the insn might be executed
5543 more than once in each loop iteration. */
5546 find_mem_givs (loop, x, insn, not_every_iteration, maybe_multiple)
5547 const struct loop *loop;
5550 int not_every_iteration, maybe_multiple;
5559 code = GET_CODE (x);
5584 /* This code used to disable creating GIVs with mult_val == 1 and
5585 add_val == 0. However, this leads to lost optimizations when
5586 it comes time to combine a set of related DEST_ADDR GIVs, since
5587 this one would not be seen. */
5589 if (general_induction_var (loop, XEXP (x, 0), &src_reg, &add_val,
5590 &mult_val, &ext_val, 1, &benefit,
5593 /* Found one; record it. */
5595 = (struct induction *) xmalloc (sizeof (struct induction));
5597 record_giv (loop, v, insn, src_reg, addr_placeholder, mult_val,
5598 add_val, ext_val, benefit, DEST_ADDR,
5599 not_every_iteration, maybe_multiple, &XEXP (x, 0));
5610 /* Recursively scan the subexpressions for other mem refs. */
5612 fmt = GET_RTX_FORMAT (code);
5613 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5615 find_mem_givs (loop, XEXP (x, i), insn, not_every_iteration,
5617 else if (fmt[i] == 'E')
5618 for (j = 0; j < XVECLEN (x, i); j++)
5619 find_mem_givs (loop, XVECEXP (x, i, j), insn, not_every_iteration,
5623 /* Fill in the data about one biv update.
5624 V is the `struct induction' in which we record the biv. (It is
5625 allocated by the caller, with alloca.)
5626 INSN is the insn that sets it.
5627 DEST_REG is the biv's reg.
5629 MULT_VAL is const1_rtx if the biv is being incremented here, in which case
5630 INC_VAL is the increment. Otherwise, MULT_VAL is const0_rtx and the biv is
5631 being set to INC_VAL.
5633 NOT_EVERY_ITERATION is nonzero if this biv update is not know to be
5634 executed every iteration; MAYBE_MULTIPLE is nonzero if this biv update
5635 can be executed more than once per iteration. If MAYBE_MULTIPLE
5636 and NOT_EVERY_ITERATION are both zero, we know that the biv update is
5637 executed exactly once per iteration. */
5640 record_biv (loop, v, insn, dest_reg, inc_val, mult_val, location,
5641 not_every_iteration, maybe_multiple)
5643 struct induction *v;
5649 int not_every_iteration;
5652 struct loop_ivs *ivs = LOOP_IVS (loop);
5653 struct iv_class *bl;
5656 v->src_reg = dest_reg;
5657 v->dest_reg = dest_reg;
5658 v->mult_val = mult_val;
5659 v->add_val = inc_val;
5660 v->ext_dependent = NULL_RTX;
5661 v->location = location;
5662 v->mode = GET_MODE (dest_reg);
5663 v->always_computable = ! not_every_iteration;
5664 v->always_executed = ! not_every_iteration;
5665 v->maybe_multiple = maybe_multiple;
5667 /* Add this to the reg's iv_class, creating a class
5668 if this is the first incrementation of the reg. */
5670 bl = REG_IV_CLASS (ivs, REGNO (dest_reg));
5673 /* Create and initialize new iv_class. */
5675 bl = (struct iv_class *) xmalloc (sizeof (struct iv_class));
5677 bl->regno = REGNO (dest_reg);
5683 /* Set initial value to the reg itself. */
5684 bl->initial_value = dest_reg;
5685 bl->final_value = 0;
5686 /* We haven't seen the initializing insn yet */
5689 bl->initial_test = 0;
5690 bl->incremented = 0;
5694 bl->total_benefit = 0;
5696 /* Add this class to ivs->list. */
5697 bl->next = ivs->list;
5700 /* Put it in the array of biv register classes. */
5701 REG_IV_CLASS (ivs, REGNO (dest_reg)) = bl;
5704 /* Update IV_CLASS entry for this biv. */
5705 v->next_iv = bl->biv;
5708 if (mult_val == const1_rtx)
5709 bl->incremented = 1;
5711 if (loop_dump_stream)
5712 loop_biv_dump (v, loop_dump_stream, 0);
5715 /* Fill in the data about one giv.
5716 V is the `struct induction' in which we record the giv. (It is
5717 allocated by the caller, with alloca.)
5718 INSN is the insn that sets it.
5719 BENEFIT estimates the savings from deleting this insn.
5720 TYPE is DEST_REG or DEST_ADDR; it says whether the giv is computed
5721 into a register or is used as a memory address.
5723 SRC_REG is the biv reg which the giv is computed from.
5724 DEST_REG is the giv's reg (if the giv is stored in a reg).
5725 MULT_VAL and ADD_VAL are the coefficients used to compute the giv.
5726 LOCATION points to the place where this giv's value appears in INSN. */
5729 record_giv (loop, v, insn, src_reg, dest_reg, mult_val, add_val, ext_val,
5730 benefit, type, not_every_iteration, maybe_multiple, location)
5731 const struct loop *loop;
5732 struct induction *v;
5736 rtx mult_val, add_val, ext_val;
5739 int not_every_iteration, maybe_multiple;
5742 struct loop_ivs *ivs = LOOP_IVS (loop);
5743 struct induction *b;
5744 struct iv_class *bl;
5745 rtx set = single_set (insn);
5748 /* Attempt to prove constantness of the values. Don't let simplify_rtx
5749 undo the MULT canonicalization that we performed earlier. */
5750 temp = simplify_rtx (add_val);
5752 && ! (GET_CODE (add_val) == MULT
5753 && GET_CODE (temp) == ASHIFT))
5757 v->src_reg = src_reg;
5759 v->dest_reg = dest_reg;
5760 v->mult_val = mult_val;
5761 v->add_val = add_val;
5762 v->ext_dependent = ext_val;
5763 v->benefit = benefit;
5764 v->location = location;
5766 v->combined_with = 0;
5767 v->maybe_multiple = maybe_multiple;
5769 v->derive_adjustment = 0;
5775 v->auto_inc_opt = 0;
5779 /* The v->always_computable field is used in update_giv_derive, to
5780 determine whether a giv can be used to derive another giv. For a
5781 DEST_REG giv, INSN computes a new value for the giv, so its value
5782 isn't computable if INSN insn't executed every iteration.
5783 However, for a DEST_ADDR giv, INSN merely uses the value of the giv;
5784 it does not compute a new value. Hence the value is always computable
5785 regardless of whether INSN is executed each iteration. */
5787 if (type == DEST_ADDR)
5788 v->always_computable = 1;
5790 v->always_computable = ! not_every_iteration;
5792 v->always_executed = ! not_every_iteration;
5794 if (type == DEST_ADDR)
5796 v->mode = GET_MODE (*location);
5799 else /* type == DEST_REG */
5801 v->mode = GET_MODE (SET_DEST (set));
5803 v->lifetime = LOOP_REG_LIFETIME (loop, REGNO (dest_reg));
5805 /* If the lifetime is zero, it means that this register is
5806 really a dead store. So mark this as a giv that can be
5807 ignored. This will not prevent the biv from being eliminated. */
5808 if (v->lifetime == 0)
5811 REG_IV_TYPE (ivs, REGNO (dest_reg)) = GENERAL_INDUCT;
5812 REG_IV_INFO (ivs, REGNO (dest_reg)) = v;
5815 /* Add the giv to the class of givs computed from one biv. */
5817 bl = REG_IV_CLASS (ivs, REGNO (src_reg));
5820 v->next_iv = bl->giv;
5822 /* Don't count DEST_ADDR. This is supposed to count the number of
5823 insns that calculate givs. */
5824 if (type == DEST_REG)
5826 bl->total_benefit += benefit;
5829 /* Fatal error, biv missing for this giv? */
5832 if (type == DEST_ADDR)
5835 v->not_replaceable = 0;
5839 /* The giv can be replaced outright by the reduced register only if all
5840 of the following conditions are true:
5841 - the insn that sets the giv is always executed on any iteration
5842 on which the giv is used at all
5843 (there are two ways to deduce this:
5844 either the insn is executed on every iteration,
5845 or all uses follow that insn in the same basic block),
5846 - the giv is not used outside the loop
5847 - no assignments to the biv occur during the giv's lifetime. */
5849 if (REGNO_FIRST_UID (REGNO (dest_reg)) == INSN_UID (insn)
5850 /* Previous line always fails if INSN was moved by loop opt. */
5851 && REGNO_LAST_LUID (REGNO (dest_reg))
5852 < INSN_LUID (loop->end)
5853 && (! not_every_iteration
5854 || last_use_this_basic_block (dest_reg, insn)))
5856 /* Now check that there are no assignments to the biv within the
5857 giv's lifetime. This requires two separate checks. */
5859 /* Check each biv update, and fail if any are between the first
5860 and last use of the giv.
5862 If this loop contains an inner loop that was unrolled, then
5863 the insn modifying the biv may have been emitted by the loop
5864 unrolling code, and hence does not have a valid luid. Just
5865 mark the biv as not replaceable in this case. It is not very
5866 useful as a biv, because it is used in two different loops.
5867 It is very unlikely that we would be able to optimize the giv
5868 using this biv anyways. */
5871 v->not_replaceable = 0;
5872 for (b = bl->biv; b; b = b->next_iv)
5874 if (INSN_UID (b->insn) >= max_uid_for_loop
5875 || ((INSN_LUID (b->insn)
5876 >= REGNO_FIRST_LUID (REGNO (dest_reg)))
5877 && (INSN_LUID (b->insn)
5878 <= REGNO_LAST_LUID (REGNO (dest_reg)))))
5881 v->not_replaceable = 1;
5886 /* If there are any backwards branches that go from after the
5887 biv update to before it, then this giv is not replaceable. */
5889 for (b = bl->biv; b; b = b->next_iv)
5890 if (back_branch_in_range_p (loop, b->insn))
5893 v->not_replaceable = 1;
5899 /* May still be replaceable, we don't have enough info here to
5902 v->not_replaceable = 0;
5906 /* Record whether the add_val contains a const_int, for later use by
5911 v->no_const_addval = 1;
5912 if (tem == const0_rtx)
5914 else if (CONSTANT_P (add_val))
5915 v->no_const_addval = 0;
5916 if (GET_CODE (tem) == PLUS)
5920 if (GET_CODE (XEXP (tem, 0)) == PLUS)
5921 tem = XEXP (tem, 0);
5922 else if (GET_CODE (XEXP (tem, 1)) == PLUS)
5923 tem = XEXP (tem, 1);
5927 if (CONSTANT_P (XEXP (tem, 1)))
5928 v->no_const_addval = 0;
5932 if (loop_dump_stream)
5933 loop_giv_dump (v, loop_dump_stream, 0);
5936 /* All this does is determine whether a giv can be made replaceable because
5937 its final value can be calculated. This code can not be part of record_giv
5938 above, because final_giv_value requires that the number of loop iterations
5939 be known, and that can not be accurately calculated until after all givs
5940 have been identified. */
5943 check_final_value (loop, v)
5944 const struct loop *loop;
5945 struct induction *v;
5947 rtx final_value = 0;
5949 /* DEST_ADDR givs will never reach here, because they are always marked
5950 replaceable above in record_giv. */
5952 /* The giv can be replaced outright by the reduced register only if all
5953 of the following conditions are true:
5954 - the insn that sets the giv is always executed on any iteration
5955 on which the giv is used at all
5956 (there are two ways to deduce this:
5957 either the insn is executed on every iteration,
5958 or all uses follow that insn in the same basic block),
5959 - its final value can be calculated (this condition is different
5960 than the one above in record_giv)
5961 - it's not used before the it's set
5962 - no assignments to the biv occur during the giv's lifetime. */
5965 /* This is only called now when replaceable is known to be false. */
5966 /* Clear replaceable, so that it won't confuse final_giv_value. */
5970 if ((final_value = final_giv_value (loop, v))
5971 && (v->always_executed
5972 || last_use_this_basic_block (v->dest_reg, v->insn)))
5974 int biv_increment_seen = 0, before_giv_insn = 0;
5979 v->not_replaceable = 0;
5981 /* When trying to determine whether or not a biv increment occurs
5982 during the lifetime of the giv, we can ignore uses of the variable
5983 outside the loop because final_value is true. Hence we can not
5984 use regno_last_uid and regno_first_uid as above in record_giv. */
5986 /* Search the loop to determine whether any assignments to the
5987 biv occur during the giv's lifetime. Start with the insn
5988 that sets the giv, and search around the loop until we come
5989 back to that insn again.
5991 Also fail if there is a jump within the giv's lifetime that jumps
5992 to somewhere outside the lifetime but still within the loop. This
5993 catches spaghetti code where the execution order is not linear, and
5994 hence the above test fails. Here we assume that the giv lifetime
5995 does not extend from one iteration of the loop to the next, so as
5996 to make the test easier. Since the lifetime isn't known yet,
5997 this requires two loops. See also record_giv above. */
5999 last_giv_use = v->insn;
6006 before_giv_insn = 1;
6007 p = NEXT_INSN (loop->start);
6012 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
6013 || GET_CODE (p) == CALL_INSN)
6015 /* It is possible for the BIV increment to use the GIV if we
6016 have a cycle. Thus we must be sure to check each insn for
6017 both BIV and GIV uses, and we must check for BIV uses
6020 if (! biv_increment_seen
6021 && reg_set_p (v->src_reg, PATTERN (p)))
6022 biv_increment_seen = 1;
6024 if (reg_mentioned_p (v->dest_reg, PATTERN (p)))
6026 if (biv_increment_seen || before_giv_insn)
6029 v->not_replaceable = 1;
6037 /* Now that the lifetime of the giv is known, check for branches
6038 from within the lifetime to outside the lifetime if it is still
6048 p = NEXT_INSN (loop->start);
6049 if (p == last_giv_use)
6052 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p)
6053 && LABEL_NAME (JUMP_LABEL (p))
6054 && ((loop_insn_first_p (JUMP_LABEL (p), v->insn)
6055 && loop_insn_first_p (loop->start, JUMP_LABEL (p)))
6056 || (loop_insn_first_p (last_giv_use, JUMP_LABEL (p))
6057 && loop_insn_first_p (JUMP_LABEL (p), loop->end))))
6060 v->not_replaceable = 1;
6062 if (loop_dump_stream)
6063 fprintf (loop_dump_stream,
6064 "Found branch outside giv lifetime.\n");
6071 /* If it is replaceable, then save the final value. */
6073 v->final_value = final_value;
6076 if (loop_dump_stream && v->replaceable)
6077 fprintf (loop_dump_stream, "Insn %d: giv reg %d final_value replaceable\n",
6078 INSN_UID (v->insn), REGNO (v->dest_reg));
6081 /* Update the status of whether a giv can derive other givs.
6083 We need to do something special if there is or may be an update to the biv
6084 between the time the giv is defined and the time it is used to derive
6087 In addition, a giv that is only conditionally set is not allowed to
6088 derive another giv once a label has been passed.
6090 The cases we look at are when a label or an update to a biv is passed. */
6093 update_giv_derive (loop, p)
6094 const struct loop *loop;
6097 struct loop_ivs *ivs = LOOP_IVS (loop);
6098 struct iv_class *bl;
6099 struct induction *biv, *giv;
6103 /* Search all IV classes, then all bivs, and finally all givs.
6105 There are three cases we are concerned with. First we have the situation
6106 of a giv that is only updated conditionally. In that case, it may not
6107 derive any givs after a label is passed.
6109 The second case is when a biv update occurs, or may occur, after the
6110 definition of a giv. For certain biv updates (see below) that are
6111 known to occur between the giv definition and use, we can adjust the
6112 giv definition. For others, or when the biv update is conditional,
6113 we must prevent the giv from deriving any other givs. There are two
6114 sub-cases within this case.
6116 If this is a label, we are concerned with any biv update that is done
6117 conditionally, since it may be done after the giv is defined followed by
6118 a branch here (actually, we need to pass both a jump and a label, but
6119 this extra tracking doesn't seem worth it).
6121 If this is a jump, we are concerned about any biv update that may be
6122 executed multiple times. We are actually only concerned about
6123 backward jumps, but it is probably not worth performing the test
6124 on the jump again here.
6126 If this is a biv update, we must adjust the giv status to show that a
6127 subsequent biv update was performed. If this adjustment cannot be done,
6128 the giv cannot derive further givs. */
6130 for (bl = ivs->list; bl; bl = bl->next)
6131 for (biv = bl->biv; biv; biv = biv->next_iv)
6132 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN
6135 for (giv = bl->giv; giv; giv = giv->next_iv)
6137 /* If cant_derive is already true, there is no point in
6138 checking all of these conditions again. */
6139 if (giv->cant_derive)
6142 /* If this giv is conditionally set and we have passed a label,
6143 it cannot derive anything. */
6144 if (GET_CODE (p) == CODE_LABEL && ! giv->always_computable)
6145 giv->cant_derive = 1;
6147 /* Skip givs that have mult_val == 0, since
6148 they are really invariants. Also skip those that are
6149 replaceable, since we know their lifetime doesn't contain
6151 else if (giv->mult_val == const0_rtx || giv->replaceable)
6154 /* The only way we can allow this giv to derive another
6155 is if this is a biv increment and we can form the product
6156 of biv->add_val and giv->mult_val. In this case, we will
6157 be able to compute a compensation. */
6158 else if (biv->insn == p)
6163 if (biv->mult_val == const1_rtx)
6164 tem = simplify_giv_expr (loop,
6165 gen_rtx_MULT (giv->mode,
6168 &ext_val_dummy, &dummy);
6170 if (tem && giv->derive_adjustment)
6171 tem = simplify_giv_expr
6173 gen_rtx_PLUS (giv->mode, tem, giv->derive_adjustment),
6174 &ext_val_dummy, &dummy);
6177 giv->derive_adjustment = tem;
6179 giv->cant_derive = 1;
6181 else if ((GET_CODE (p) == CODE_LABEL && ! biv->always_computable)
6182 || (GET_CODE (p) == JUMP_INSN && biv->maybe_multiple))
6183 giv->cant_derive = 1;
6188 /* Check whether an insn is an increment legitimate for a basic induction var.
6189 X is the source of insn P, or a part of it.
6190 MODE is the mode in which X should be interpreted.
6192 DEST_REG is the putative biv, also the destination of the insn.
6193 We accept patterns of these forms:
6194 REG = REG + INVARIANT (includes REG = REG - CONSTANT)
6195 REG = INVARIANT + REG
6197 If X is suitable, we return 1, set *MULT_VAL to CONST1_RTX,
6198 store the additive term into *INC_VAL, and store the place where
6199 we found the additive term into *LOCATION.
6201 If X is an assignment of an invariant into DEST_REG, we set
6202 *MULT_VAL to CONST0_RTX, and store the invariant into *INC_VAL.
6204 We also want to detect a BIV when it corresponds to a variable
6205 whose mode was promoted via PROMOTED_MODE. In that case, an increment
6206 of the variable may be a PLUS that adds a SUBREG of that variable to
6207 an invariant and then sign- or zero-extends the result of the PLUS
6210 Most GIVs in such cases will be in the promoted mode, since that is the
6211 probably the natural computation mode (and almost certainly the mode
6212 used for addresses) on the machine. So we view the pseudo-reg containing
6213 the variable as the BIV, as if it were simply incremented.
6215 Note that treating the entire pseudo as a BIV will result in making
6216 simple increments to any GIVs based on it. However, if the variable
6217 overflows in its declared mode but not its promoted mode, the result will
6218 be incorrect. This is acceptable if the variable is signed, since
6219 overflows in such cases are undefined, but not if it is unsigned, since
6220 those overflows are defined. So we only check for SIGN_EXTEND and
6223 If we cannot find a biv, we return 0. */
6226 basic_induction_var (loop, x, mode, dest_reg, p, inc_val, mult_val, location)
6227 const struct loop *loop;
6229 enum machine_mode mode;
6240 code = GET_CODE (x);
6245 if (rtx_equal_p (XEXP (x, 0), dest_reg)
6246 || (GET_CODE (XEXP (x, 0)) == SUBREG
6247 && SUBREG_PROMOTED_VAR_P (XEXP (x, 0))
6248 && SUBREG_REG (XEXP (x, 0)) == dest_reg))
6250 argp = &XEXP (x, 1);
6252 else if (rtx_equal_p (XEXP (x, 1), dest_reg)
6253 || (GET_CODE (XEXP (x, 1)) == SUBREG
6254 && SUBREG_PROMOTED_VAR_P (XEXP (x, 1))
6255 && SUBREG_REG (XEXP (x, 1)) == dest_reg))
6257 argp = &XEXP (x, 0);
6263 if (loop_invariant_p (loop, arg) != 1)
6266 *inc_val = convert_modes (GET_MODE (dest_reg), GET_MODE (x), arg, 0);
6267 *mult_val = const1_rtx;
6272 /* If what's inside the SUBREG is a BIV, then the SUBREG. This will
6273 handle addition of promoted variables.
6274 ??? The comment at the start of this function is wrong: promoted
6275 variable increments don't look like it says they do. */
6276 return basic_induction_var (loop, SUBREG_REG (x),
6277 GET_MODE (SUBREG_REG (x)),
6278 dest_reg, p, inc_val, mult_val, location);
6281 /* If this register is assigned in a previous insn, look at its
6282 source, but don't go outside the loop or past a label. */
6284 /* If this sets a register to itself, we would repeat any previous
6285 biv increment if we applied this strategy blindly. */
6286 if (rtx_equal_p (dest_reg, x))
6295 insn = PREV_INSN (insn);
6297 while (insn && GET_CODE (insn) == NOTE
6298 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG);
6302 set = single_set (insn);
6305 dest = SET_DEST (set);
6307 || (GET_CODE (dest) == SUBREG
6308 && (GET_MODE_SIZE (GET_MODE (dest)) <= UNITS_PER_WORD)
6309 && (GET_MODE_CLASS (GET_MODE (dest)) == MODE_INT)
6310 && SUBREG_REG (dest) == x))
6311 return basic_induction_var (loop, SET_SRC (set),
6312 (GET_MODE (SET_SRC (set)) == VOIDmode
6314 : GET_MODE (SET_SRC (set))),
6316 inc_val, mult_val, location);
6318 while (GET_CODE (dest) == SIGN_EXTRACT
6319 || GET_CODE (dest) == ZERO_EXTRACT
6320 || GET_CODE (dest) == SUBREG
6321 || GET_CODE (dest) == STRICT_LOW_PART)
6322 dest = XEXP (dest, 0);
6328 /* Can accept constant setting of biv only when inside inner most loop.
6329 Otherwise, a biv of an inner loop may be incorrectly recognized
6330 as a biv of the outer loop,
6331 causing code to be moved INTO the inner loop. */
6333 if (loop_invariant_p (loop, x) != 1)
6338 /* convert_modes aborts if we try to convert to or from CCmode, so just
6339 exclude that case. It is very unlikely that a condition code value
6340 would be a useful iterator anyways. convert_modes aborts if we try to
6341 convert a float mode to non-float or vice versa too. */
6342 if (loop->level == 1
6343 && GET_MODE_CLASS (mode) == GET_MODE_CLASS (GET_MODE (dest_reg))
6344 && GET_MODE_CLASS (mode) != MODE_CC)
6346 /* Possible bug here? Perhaps we don't know the mode of X. */
6347 *inc_val = convert_modes (GET_MODE (dest_reg), mode, x, 0);
6348 *mult_val = const0_rtx;
6355 return basic_induction_var (loop, XEXP (x, 0), GET_MODE (XEXP (x, 0)),
6356 dest_reg, p, inc_val, mult_val, location);
6359 /* Similar, since this can be a sign extension. */
6360 for (insn = PREV_INSN (p);
6361 (insn && GET_CODE (insn) == NOTE
6362 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG);
6363 insn = PREV_INSN (insn))
6367 set = single_set (insn);
6369 if (! rtx_equal_p (dest_reg, XEXP (x, 0))
6370 && set && SET_DEST (set) == XEXP (x, 0)
6371 && GET_CODE (XEXP (x, 1)) == CONST_INT
6372 && INTVAL (XEXP (x, 1)) >= 0
6373 && GET_CODE (SET_SRC (set)) == ASHIFT
6374 && XEXP (x, 1) == XEXP (SET_SRC (set), 1))
6375 return basic_induction_var (loop, XEXP (SET_SRC (set), 0),
6376 GET_MODE (XEXP (x, 0)),
6377 dest_reg, insn, inc_val, mult_val,
6386 /* A general induction variable (giv) is any quantity that is a linear
6387 function of a basic induction variable,
6388 i.e. giv = biv * mult_val + add_val.
6389 The coefficients can be any loop invariant quantity.
6390 A giv need not be computed directly from the biv;
6391 it can be computed by way of other givs. */
6393 /* Determine whether X computes a giv.
6394 If it does, return a nonzero value
6395 which is the benefit from eliminating the computation of X;
6396 set *SRC_REG to the register of the biv that it is computed from;
6397 set *ADD_VAL and *MULT_VAL to the coefficients,
6398 such that the value of X is biv * mult + add; */
6401 general_induction_var (loop, x, src_reg, add_val, mult_val, ext_val,
6402 is_addr, pbenefit, addr_mode)
6403 const struct loop *loop;
6411 enum machine_mode addr_mode;
6413 struct loop_ivs *ivs = LOOP_IVS (loop);
6416 /* If this is an invariant, forget it, it isn't a giv. */
6417 if (loop_invariant_p (loop, x) == 1)
6421 *ext_val = NULL_RTX;
6422 x = simplify_giv_expr (loop, x, ext_val, pbenefit);
6426 switch (GET_CODE (x))
6430 /* Since this is now an invariant and wasn't before, it must be a giv
6431 with MULT_VAL == 0. It doesn't matter which BIV we associate this
6433 *src_reg = ivs->list->biv->dest_reg;
6434 *mult_val = const0_rtx;
6439 /* This is equivalent to a BIV. */
6441 *mult_val = const1_rtx;
6442 *add_val = const0_rtx;
6446 /* Either (plus (biv) (invar)) or
6447 (plus (mult (biv) (invar_1)) (invar_2)). */
6448 if (GET_CODE (XEXP (x, 0)) == MULT)
6450 *src_reg = XEXP (XEXP (x, 0), 0);
6451 *mult_val = XEXP (XEXP (x, 0), 1);
6455 *src_reg = XEXP (x, 0);
6456 *mult_val = const1_rtx;
6458 *add_val = XEXP (x, 1);
6462 /* ADD_VAL is zero. */
6463 *src_reg = XEXP (x, 0);
6464 *mult_val = XEXP (x, 1);
6465 *add_val = const0_rtx;
6472 /* Remove any enclosing USE from ADD_VAL and MULT_VAL (there will be
6473 unless they are CONST_INT). */
6474 if (GET_CODE (*add_val) == USE)
6475 *add_val = XEXP (*add_val, 0);
6476 if (GET_CODE (*mult_val) == USE)
6477 *mult_val = XEXP (*mult_val, 0);
6480 *pbenefit += address_cost (orig_x, addr_mode) - reg_address_cost;
6482 *pbenefit += rtx_cost (orig_x, SET);
6484 /* Always return true if this is a giv so it will be detected as such,
6485 even if the benefit is zero or negative. This allows elimination
6486 of bivs that might otherwise not be eliminated. */
6490 /* Given an expression, X, try to form it as a linear function of a biv.
6491 We will canonicalize it to be of the form
6492 (plus (mult (BIV) (invar_1))
6494 with possible degeneracies.
6496 The invariant expressions must each be of a form that can be used as a
6497 machine operand. We surround then with a USE rtx (a hack, but localized
6498 and certainly unambiguous!) if not a CONST_INT for simplicity in this
6499 routine; it is the caller's responsibility to strip them.
6501 If no such canonicalization is possible (i.e., two biv's are used or an
6502 expression that is neither invariant nor a biv or giv), this routine
6505 For a nonzero return, the result will have a code of CONST_INT, USE,
6506 REG (for a BIV), PLUS, or MULT. No other codes will occur.
6508 *BENEFIT will be incremented by the benefit of any sub-giv encountered. */
6510 static rtx sge_plus PARAMS ((enum machine_mode, rtx, rtx));
6511 static rtx sge_plus_constant PARAMS ((rtx, rtx));
6514 simplify_giv_expr (loop, x, ext_val, benefit)
6515 const struct loop *loop;
6520 struct loop_ivs *ivs = LOOP_IVS (loop);
6521 struct loop_regs *regs = LOOP_REGS (loop);
6522 enum machine_mode mode = GET_MODE (x);
6526 /* If this is not an integer mode, or if we cannot do arithmetic in this
6527 mode, this can't be a giv. */
6528 if (mode != VOIDmode
6529 && (GET_MODE_CLASS (mode) != MODE_INT
6530 || GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT))
6533 switch (GET_CODE (x))
6536 arg0 = simplify_giv_expr (loop, XEXP (x, 0), ext_val, benefit);
6537 arg1 = simplify_giv_expr (loop, XEXP (x, 1), ext_val, benefit);
6538 if (arg0 == 0 || arg1 == 0)
6541 /* Put constant last, CONST_INT last if both constant. */
6542 if ((GET_CODE (arg0) == USE
6543 || GET_CODE (arg0) == CONST_INT)
6544 && ! ((GET_CODE (arg0) == USE
6545 && GET_CODE (arg1) == USE)
6546 || GET_CODE (arg1) == CONST_INT))
6547 tem = arg0, arg0 = arg1, arg1 = tem;
6549 /* Handle addition of zero, then addition of an invariant. */
6550 if (arg1 == const0_rtx)
6552 else if (GET_CODE (arg1) == CONST_INT || GET_CODE (arg1) == USE)
6553 switch (GET_CODE (arg0))
6557 /* Adding two invariants must result in an invariant, so enclose
6558 addition operation inside a USE and return it. */
6559 if (GET_CODE (arg0) == USE)
6560 arg0 = XEXP (arg0, 0);
6561 if (GET_CODE (arg1) == USE)
6562 arg1 = XEXP (arg1, 0);
6564 if (GET_CODE (arg0) == CONST_INT)
6565 tem = arg0, arg0 = arg1, arg1 = tem;
6566 if (GET_CODE (arg1) == CONST_INT)
6567 tem = sge_plus_constant (arg0, arg1);
6569 tem = sge_plus (mode, arg0, arg1);
6571 if (GET_CODE (tem) != CONST_INT)
6572 tem = gen_rtx_USE (mode, tem);
6577 /* biv + invar or mult + invar. Return sum. */
6578 return gen_rtx_PLUS (mode, arg0, arg1);
6581 /* (a + invar_1) + invar_2. Associate. */
6583 simplify_giv_expr (loop,
6595 /* Each argument must be either REG, PLUS, or MULT. Convert REG to
6596 MULT to reduce cases. */
6597 if (GET_CODE (arg0) == REG)
6598 arg0 = gen_rtx_MULT (mode, arg0, const1_rtx);
6599 if (GET_CODE (arg1) == REG)
6600 arg1 = gen_rtx_MULT (mode, arg1, const1_rtx);
6602 /* Now have PLUS + PLUS, PLUS + MULT, MULT + PLUS, or MULT + MULT.
6603 Put a MULT first, leaving PLUS + PLUS, MULT + PLUS, or MULT + MULT.
6604 Recurse to associate the second PLUS. */
6605 if (GET_CODE (arg1) == MULT)
6606 tem = arg0, arg0 = arg1, arg1 = tem;
6608 if (GET_CODE (arg1) == PLUS)
6610 simplify_giv_expr (loop,
6612 gen_rtx_PLUS (mode, arg0,
6617 /* Now must have MULT + MULT. Distribute if same biv, else not giv. */
6618 if (GET_CODE (arg0) != MULT || GET_CODE (arg1) != MULT)
6621 if (!rtx_equal_p (arg0, arg1))
6624 return simplify_giv_expr (loop,
6633 /* Handle "a - b" as "a + b * (-1)". */
6634 return simplify_giv_expr (loop,
6643 arg0 = simplify_giv_expr (loop, XEXP (x, 0), ext_val, benefit);
6644 arg1 = simplify_giv_expr (loop, XEXP (x, 1), ext_val, benefit);
6645 if (arg0 == 0 || arg1 == 0)
6648 /* Put constant last, CONST_INT last if both constant. */
6649 if ((GET_CODE (arg0) == USE || GET_CODE (arg0) == CONST_INT)
6650 && GET_CODE (arg1) != CONST_INT)
6651 tem = arg0, arg0 = arg1, arg1 = tem;
6653 /* If second argument is not now constant, not giv. */
6654 if (GET_CODE (arg1) != USE && GET_CODE (arg1) != CONST_INT)
6657 /* Handle multiply by 0 or 1. */
6658 if (arg1 == const0_rtx)
6661 else if (arg1 == const1_rtx)
6664 switch (GET_CODE (arg0))
6667 /* biv * invar. Done. */
6668 return gen_rtx_MULT (mode, arg0, arg1);
6671 /* Product of two constants. */
6672 return GEN_INT (INTVAL (arg0) * INTVAL (arg1));
6675 /* invar * invar is a giv, but attempt to simplify it somehow. */
6676 if (GET_CODE (arg1) != CONST_INT)
6679 arg0 = XEXP (arg0, 0);
6680 if (GET_CODE (arg0) == MULT)
6682 /* (invar_0 * invar_1) * invar_2. Associate. */
6683 return simplify_giv_expr (loop,
6692 /* Propagate the MULT expressions to the intermost nodes. */
6693 else if (GET_CODE (arg0) == PLUS)
6695 /* (invar_0 + invar_1) * invar_2. Distribute. */
6696 return simplify_giv_expr (loop,
6708 return gen_rtx_USE (mode, gen_rtx_MULT (mode, arg0, arg1));
6711 /* (a * invar_1) * invar_2. Associate. */
6712 return simplify_giv_expr (loop,
6721 /* (a + invar_1) * invar_2. Distribute. */
6722 return simplify_giv_expr (loop,
6737 /* Shift by constant is multiply by power of two. */
6738 if (GET_CODE (XEXP (x, 1)) != CONST_INT)
6742 simplify_giv_expr (loop,
6745 GEN_INT ((HOST_WIDE_INT) 1
6746 << INTVAL (XEXP (x, 1)))),
6750 /* "-a" is "a * (-1)" */
6751 return simplify_giv_expr (loop,
6752 gen_rtx_MULT (mode, XEXP (x, 0), constm1_rtx),
6756 /* "~a" is "-a - 1". Silly, but easy. */
6757 return simplify_giv_expr (loop,
6758 gen_rtx_MINUS (mode,
6759 gen_rtx_NEG (mode, XEXP (x, 0)),
6764 /* Already in proper form for invariant. */
6770 /* Conditionally recognize extensions of simple IVs. After we've
6771 computed loop traversal counts and verified the range of the
6772 source IV, we'll reevaluate this as a GIV. */
6773 if (*ext_val == NULL_RTX)
6775 arg0 = simplify_giv_expr (loop, XEXP (x, 0), ext_val, benefit);
6776 if (arg0 && *ext_val == NULL_RTX && GET_CODE (arg0) == REG)
6778 *ext_val = gen_rtx_fmt_e (GET_CODE (x), mode, arg0);
6785 /* If this is a new register, we can't deal with it. */
6786 if (REGNO (x) >= max_reg_before_loop)
6789 /* Check for biv or giv. */
6790 switch (REG_IV_TYPE (ivs, REGNO (x)))
6794 case GENERAL_INDUCT:
6796 struct induction *v = REG_IV_INFO (ivs, REGNO (x));
6798 /* Form expression from giv and add benefit. Ensure this giv
6799 can derive another and subtract any needed adjustment if so. */
6801 /* Increasing the benefit here is risky. The only case in which it
6802 is arguably correct is if this is the only use of V. In other
6803 cases, this will artificially inflate the benefit of the current
6804 giv, and lead to suboptimal code. Thus, it is disabled, since
6805 potentially not reducing an only marginally beneficial giv is
6806 less harmful than reducing many givs that are not really
6809 rtx single_use = regs->array[REGNO (x)].single_usage;
6810 if (single_use && single_use != const0_rtx)
6811 *benefit += v->benefit;
6817 tem = gen_rtx_PLUS (mode, gen_rtx_MULT (mode,
6818 v->src_reg, v->mult_val),
6821 if (v->derive_adjustment)
6822 tem = gen_rtx_MINUS (mode, tem, v->derive_adjustment);
6823 arg0 = simplify_giv_expr (loop, tem, ext_val, benefit);
6826 if (!v->ext_dependent)
6831 *ext_val = v->ext_dependent;
6839 /* If it isn't an induction variable, and it is invariant, we
6840 may be able to simplify things further by looking through
6841 the bits we just moved outside the loop. */
6842 if (loop_invariant_p (loop, x) == 1)
6845 struct loop_movables *movables = LOOP_MOVABLES (loop);
6847 for (m = movables->head; m; m = m->next)
6848 if (rtx_equal_p (x, m->set_dest))
6850 /* Ok, we found a match. Substitute and simplify. */
6852 /* If we match another movable, we must use that, as
6853 this one is going away. */
6855 return simplify_giv_expr (loop, m->match->set_dest,
6858 /* If consec is nonzero, this is a member of a group of
6859 instructions that were moved together. We handle this
6860 case only to the point of seeking to the last insn and
6861 looking for a REG_EQUAL. Fail if we don't find one. */
6868 tem = NEXT_INSN (tem);
6872 tem = find_reg_note (tem, REG_EQUAL, NULL_RTX);
6874 tem = XEXP (tem, 0);
6878 tem = single_set (m->insn);
6880 tem = SET_SRC (tem);
6885 /* What we are most interested in is pointer
6886 arithmetic on invariants -- only take
6887 patterns we may be able to do something with. */
6888 if (GET_CODE (tem) == PLUS
6889 || GET_CODE (tem) == MULT
6890 || GET_CODE (tem) == ASHIFT
6891 || GET_CODE (tem) == CONST_INT
6892 || GET_CODE (tem) == SYMBOL_REF)
6894 tem = simplify_giv_expr (loop, tem, ext_val,
6899 else if (GET_CODE (tem) == CONST
6900 && GET_CODE (XEXP (tem, 0)) == PLUS
6901 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == SYMBOL_REF
6902 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)
6904 tem = simplify_giv_expr (loop, XEXP (tem, 0),
6916 /* Fall through to general case. */
6918 /* If invariant, return as USE (unless CONST_INT).
6919 Otherwise, not giv. */
6920 if (GET_CODE (x) == USE)
6923 if (loop_invariant_p (loop, x) == 1)
6925 if (GET_CODE (x) == CONST_INT)
6927 if (GET_CODE (x) == CONST
6928 && GET_CODE (XEXP (x, 0)) == PLUS
6929 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
6930 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
6932 return gen_rtx_USE (mode, x);
6939 /* This routine folds invariants such that there is only ever one
6940 CONST_INT in the summation. It is only used by simplify_giv_expr. */
6943 sge_plus_constant (x, c)
6946 if (GET_CODE (x) == CONST_INT)
6947 return GEN_INT (INTVAL (x) + INTVAL (c));
6948 else if (GET_CODE (x) != PLUS)
6949 return gen_rtx_PLUS (GET_MODE (x), x, c);
6950 else if (GET_CODE (XEXP (x, 1)) == CONST_INT)
6952 return gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0),
6953 GEN_INT (INTVAL (XEXP (x, 1)) + INTVAL (c)));
6955 else if (GET_CODE (XEXP (x, 0)) == PLUS
6956 || GET_CODE (XEXP (x, 1)) != PLUS)
6958 return gen_rtx_PLUS (GET_MODE (x),
6959 sge_plus_constant (XEXP (x, 0), c), XEXP (x, 1));
6963 return gen_rtx_PLUS (GET_MODE (x),
6964 sge_plus_constant (XEXP (x, 1), c), XEXP (x, 0));
6969 sge_plus (mode, x, y)
6970 enum machine_mode mode;
6973 while (GET_CODE (y) == PLUS)
6975 rtx a = XEXP (y, 0);
6976 if (GET_CODE (a) == CONST_INT)
6977 x = sge_plus_constant (x, a);
6979 x = gen_rtx_PLUS (mode, x, a);
6982 if (GET_CODE (y) == CONST_INT)
6983 x = sge_plus_constant (x, y);
6985 x = gen_rtx_PLUS (mode, x, y);
6989 /* Help detect a giv that is calculated by several consecutive insns;
6993 The caller has already identified the first insn P as having a giv as dest;
6994 we check that all other insns that set the same register follow
6995 immediately after P, that they alter nothing else,
6996 and that the result of the last is still a giv.
6998 The value is 0 if the reg set in P is not really a giv.
6999 Otherwise, the value is the amount gained by eliminating
7000 all the consecutive insns that compute the value.
7002 FIRST_BENEFIT is the amount gained by eliminating the first insn, P.
7003 SRC_REG is the reg of the biv; DEST_REG is the reg of the giv.
7005 The coefficients of the ultimate giv value are stored in
7006 *MULT_VAL and *ADD_VAL. */
7009 consec_sets_giv (loop, first_benefit, p, src_reg, dest_reg,
7010 add_val, mult_val, ext_val, last_consec_insn)
7011 const struct loop *loop;
7019 rtx *last_consec_insn;
7021 struct loop_ivs *ivs = LOOP_IVS (loop);
7022 struct loop_regs *regs = LOOP_REGS (loop);
7029 /* Indicate that this is a giv so that we can update the value produced in
7030 each insn of the multi-insn sequence.
7032 This induction structure will be used only by the call to
7033 general_induction_var below, so we can allocate it on our stack.
7034 If this is a giv, our caller will replace the induct var entry with
7035 a new induction structure. */
7036 struct induction *v;
7038 if (REG_IV_TYPE (ivs, REGNO (dest_reg)) != UNKNOWN_INDUCT)
7041 v = (struct induction *) alloca (sizeof (struct induction));
7042 v->src_reg = src_reg;
7043 v->mult_val = *mult_val;
7044 v->add_val = *add_val;
7045 v->benefit = first_benefit;
7047 v->derive_adjustment = 0;
7048 v->ext_dependent = NULL_RTX;
7050 REG_IV_TYPE (ivs, REGNO (dest_reg)) = GENERAL_INDUCT;
7051 REG_IV_INFO (ivs, REGNO (dest_reg)) = v;
7053 count = regs->array[REGNO (dest_reg)].n_times_set - 1;
7058 code = GET_CODE (p);
7060 /* If libcall, skip to end of call sequence. */
7061 if (code == INSN && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
7065 && (set = single_set (p))
7066 && GET_CODE (SET_DEST (set)) == REG
7067 && SET_DEST (set) == dest_reg
7068 && (general_induction_var (loop, SET_SRC (set), &src_reg,
7069 add_val, mult_val, ext_val, 0,
7071 /* Giv created by equivalent expression. */
7072 || ((temp = find_reg_note (p, REG_EQUAL, NULL_RTX))
7073 && general_induction_var (loop, XEXP (temp, 0), &src_reg,
7074 add_val, mult_val, ext_val, 0,
7075 &benefit, VOIDmode)))
7076 && src_reg == v->src_reg)
7078 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
7079 benefit += libcall_benefit (p);
7082 v->mult_val = *mult_val;
7083 v->add_val = *add_val;
7084 v->benefit += benefit;
7086 else if (code != NOTE)
7088 /* Allow insns that set something other than this giv to a
7089 constant. Such insns are needed on machines which cannot
7090 include long constants and should not disqualify a giv. */
7092 && (set = single_set (p))
7093 && SET_DEST (set) != dest_reg
7094 && CONSTANT_P (SET_SRC (set)))
7097 REG_IV_TYPE (ivs, REGNO (dest_reg)) = UNKNOWN_INDUCT;
7102 REG_IV_TYPE (ivs, REGNO (dest_reg)) = UNKNOWN_INDUCT;
7103 *last_consec_insn = p;
7107 /* Return an rtx, if any, that expresses giv G2 as a function of the register
7108 represented by G1. If no such expression can be found, or it is clear that
7109 it cannot possibly be a valid address, 0 is returned.
7111 To perform the computation, we note that
7114 where `v' is the biv.
7116 So G2 = (y/b) * G1 + (b - a*y/x).
7118 Note that MULT = y/x.
7120 Update: A and B are now allowed to be additive expressions such that
7121 B contains all variables in A. That is, computing B-A will not require
7122 subtracting variables. */
7125 express_from_1 (a, b, mult)
7128 /* If MULT is zero, then A*MULT is zero, and our expression is B. */
7130 if (mult == const0_rtx)
7133 /* If MULT is not 1, we cannot handle A with non-constants, since we
7134 would then be required to subtract multiples of the registers in A.
7135 This is theoretically possible, and may even apply to some Fortran
7136 constructs, but it is a lot of work and we do not attempt it here. */
7138 if (mult != const1_rtx && GET_CODE (a) != CONST_INT)
7141 /* In general these structures are sorted top to bottom (down the PLUS
7142 chain), but not left to right across the PLUS. If B is a higher
7143 order giv than A, we can strip one level and recurse. If A is higher
7144 order, we'll eventually bail out, but won't know that until the end.
7145 If they are the same, we'll strip one level around this loop. */
7147 while (GET_CODE (a) == PLUS && GET_CODE (b) == PLUS)
7149 rtx ra, rb, oa, ob, tmp;
7151 ra = XEXP (a, 0), oa = XEXP (a, 1);
7152 if (GET_CODE (ra) == PLUS)
7153 tmp = ra, ra = oa, oa = tmp;
7155 rb = XEXP (b, 0), ob = XEXP (b, 1);
7156 if (GET_CODE (rb) == PLUS)
7157 tmp = rb, rb = ob, ob = tmp;
7159 if (rtx_equal_p (ra, rb))
7160 /* We matched: remove one reg completely. */
7162 else if (GET_CODE (ob) != PLUS && rtx_equal_p (ra, ob))
7163 /* An alternate match. */
7165 else if (GET_CODE (oa) != PLUS && rtx_equal_p (oa, rb))
7166 /* An alternate match. */
7170 /* Indicates an extra register in B. Strip one level from B and
7171 recurse, hoping B was the higher order expression. */
7172 ob = express_from_1 (a, ob, mult);
7175 return gen_rtx_PLUS (GET_MODE (b), rb, ob);
7179 /* Here we are at the last level of A, go through the cases hoping to
7180 get rid of everything but a constant. */
7182 if (GET_CODE (a) == PLUS)
7186 ra = XEXP (a, 0), oa = XEXP (a, 1);
7187 if (rtx_equal_p (oa, b))
7189 else if (!rtx_equal_p (ra, b))
7192 if (GET_CODE (oa) != CONST_INT)
7195 return GEN_INT (-INTVAL (oa) * INTVAL (mult));
7197 else if (GET_CODE (a) == CONST_INT)
7199 return plus_constant (b, -INTVAL (a) * INTVAL (mult));
7201 else if (CONSTANT_P (a))
7203 enum machine_mode mode_a = GET_MODE (a);
7204 enum machine_mode mode_b = GET_MODE (b);
7205 enum machine_mode mode = mode_b == VOIDmode ? mode_a : mode_b;
7206 return simplify_gen_binary (MINUS, mode, b, a);
7208 else if (GET_CODE (b) == PLUS)
7210 if (rtx_equal_p (a, XEXP (b, 0)))
7212 else if (rtx_equal_p (a, XEXP (b, 1)))
7217 else if (rtx_equal_p (a, b))
7224 express_from (g1, g2)
7225 struct induction *g1, *g2;
7229 /* The value that G1 will be multiplied by must be a constant integer. Also,
7230 the only chance we have of getting a valid address is if b*c/a (see above
7231 for notation) is also an integer. */
7232 if (GET_CODE (g1->mult_val) == CONST_INT
7233 && GET_CODE (g2->mult_val) == CONST_INT)
7235 if (g1->mult_val == const0_rtx
7236 || INTVAL (g2->mult_val) % INTVAL (g1->mult_val) != 0)
7238 mult = GEN_INT (INTVAL (g2->mult_val) / INTVAL (g1->mult_val));
7240 else if (rtx_equal_p (g1->mult_val, g2->mult_val))
7244 /* ??? Find out if the one is a multiple of the other? */
7248 add = express_from_1 (g1->add_val, g2->add_val, mult);
7249 if (add == NULL_RTX)
7251 /* Failed. If we've got a multiplication factor between G1 and G2,
7252 scale G1's addend and try again. */
7253 if (INTVAL (mult) > 1)
7255 rtx g1_add_val = g1->add_val;
7256 if (GET_CODE (g1_add_val) == MULT
7257 && GET_CODE (XEXP (g1_add_val, 1)) == CONST_INT)
7260 m = INTVAL (mult) * INTVAL (XEXP (g1_add_val, 1));
7261 g1_add_val = gen_rtx_MULT (GET_MODE (g1_add_val),
7262 XEXP (g1_add_val, 0), GEN_INT (m));
7266 g1_add_val = gen_rtx_MULT (GET_MODE (g1_add_val), g1_add_val,
7270 add = express_from_1 (g1_add_val, g2->add_val, const1_rtx);
7273 if (add == NULL_RTX)
7276 /* Form simplified final result. */
7277 if (mult == const0_rtx)
7279 else if (mult == const1_rtx)
7280 mult = g1->dest_reg;
7282 mult = gen_rtx_MULT (g2->mode, g1->dest_reg, mult);
7284 if (add == const0_rtx)
7288 if (GET_CODE (add) == PLUS
7289 && CONSTANT_P (XEXP (add, 1)))
7291 rtx tem = XEXP (add, 1);
7292 mult = gen_rtx_PLUS (g2->mode, mult, XEXP (add, 0));
7296 return gen_rtx_PLUS (g2->mode, mult, add);
7300 /* Return an rtx, if any, that expresses giv G2 as a function of the register
7301 represented by G1. This indicates that G2 should be combined with G1 and
7302 that G2 can use (either directly or via an address expression) a register
7303 used to represent G1. */
7306 combine_givs_p (g1, g2)
7307 struct induction *g1, *g2;
7311 /* With the introduction of ext dependent givs, we must care for modes.
7312 G2 must not use a wider mode than G1. */
7313 if (GET_MODE_SIZE (g1->mode) < GET_MODE_SIZE (g2->mode))
7316 ret = comb = express_from (g1, g2);
7317 if (comb == NULL_RTX)
7319 if (g1->mode != g2->mode)
7320 ret = gen_lowpart (g2->mode, comb);
7322 /* If these givs are identical, they can be combined. We use the results
7323 of express_from because the addends are not in a canonical form, so
7324 rtx_equal_p is a weaker test. */
7325 /* But don't combine a DEST_REG giv with a DEST_ADDR giv; we want the
7326 combination to be the other way round. */
7327 if (comb == g1->dest_reg
7328 && (g1->giv_type == DEST_REG || g2->giv_type == DEST_ADDR))
7333 /* If G2 can be expressed as a function of G1 and that function is valid
7334 as an address and no more expensive than using a register for G2,
7335 the expression of G2 in terms of G1 can be used. */
7337 && g2->giv_type == DEST_ADDR
7338 && memory_address_p (GET_MODE (g2->mem), ret))
7344 /* Check each extension dependent giv in this class to see if its
7345 root biv is safe from wrapping in the interior mode, which would
7346 make the giv illegal. */
7349 check_ext_dependent_givs (bl, loop_info)
7350 struct iv_class *bl;
7351 struct loop_info *loop_info;
7353 int ze_ok = 0, se_ok = 0, info_ok = 0;
7354 enum machine_mode biv_mode = GET_MODE (bl->biv->src_reg);
7355 HOST_WIDE_INT start_val;
7356 unsigned HOST_WIDE_INT u_end_val = 0;
7357 unsigned HOST_WIDE_INT u_start_val = 0;
7359 struct induction *v;
7361 /* Make sure the iteration data is available. We must have
7362 constants in order to be certain of no overflow. */
7363 /* ??? An unknown iteration count with an increment of +-1
7364 combined with friendly exit tests of against an invariant
7365 value is also amenable to optimization. Not implemented. */
7366 if (loop_info->n_iterations > 0
7367 && bl->initial_value
7368 && GET_CODE (bl->initial_value) == CONST_INT
7369 && (incr = biv_total_increment (bl))
7370 && GET_CODE (incr) == CONST_INT
7371 /* Make sure the host can represent the arithmetic. */
7372 && HOST_BITS_PER_WIDE_INT >= GET_MODE_BITSIZE (biv_mode))
7374 unsigned HOST_WIDE_INT abs_incr, total_incr;
7375 HOST_WIDE_INT s_end_val;
7379 start_val = INTVAL (bl->initial_value);
7380 u_start_val = start_val;
7382 neg_incr = 0, abs_incr = INTVAL (incr);
7383 if (INTVAL (incr) < 0)
7384 neg_incr = 1, abs_incr = -abs_incr;
7385 total_incr = abs_incr * loop_info->n_iterations;
7387 /* Check for host arithmetic overflow. */
7388 if (total_incr / loop_info->n_iterations == abs_incr)
7390 unsigned HOST_WIDE_INT u_max;
7391 HOST_WIDE_INT s_max;
7393 u_end_val = start_val + (neg_incr ? -total_incr : total_incr);
7394 s_end_val = u_end_val;
7395 u_max = GET_MODE_MASK (biv_mode);
7398 /* Check zero extension of biv ok. */
7400 /* Check for host arithmetic overflow. */
7402 ? u_end_val < u_start_val
7403 : u_end_val > u_start_val)
7404 /* Check for target arithmetic overflow. */
7406 ? 1 /* taken care of with host overflow */
7407 : u_end_val <= u_max))
7412 /* Check sign extension of biv ok. */
7413 /* ??? While it is true that overflow with signed and pointer
7414 arithmetic is undefined, I fear too many programmers don't
7415 keep this fact in mind -- myself included on occasion.
7416 So leave alone with the signed overflow optimizations. */
7417 if (start_val >= -s_max - 1
7418 /* Check for host arithmetic overflow. */
7420 ? s_end_val < start_val
7421 : s_end_val > start_val)
7422 /* Check for target arithmetic overflow. */
7424 ? s_end_val >= -s_max - 1
7425 : s_end_val <= s_max))
7432 /* Invalidate givs that fail the tests. */
7433 for (v = bl->giv; v; v = v->next_iv)
7434 if (v->ext_dependent)
7436 enum rtx_code code = GET_CODE (v->ext_dependent);
7449 /* We don't know whether this value is being used as either
7450 signed or unsigned, so to safely truncate we must satisfy
7451 both. The initial check here verifies the BIV itself;
7452 once that is successful we may check its range wrt the
7456 enum machine_mode outer_mode = GET_MODE (v->ext_dependent);
7457 unsigned HOST_WIDE_INT max = GET_MODE_MASK (outer_mode) >> 1;
7459 /* We know from the above that both endpoints are nonnegative,
7460 and that there is no wrapping. Verify that both endpoints
7461 are within the (signed) range of the outer mode. */
7462 if (u_start_val <= max && u_end_val <= max)
7473 if (loop_dump_stream)
7475 fprintf (loop_dump_stream,
7476 "Verified ext dependent giv at %d of reg %d\n",
7477 INSN_UID (v->insn), bl->regno);
7482 if (loop_dump_stream)
7487 why = "biv iteration values overflowed";
7491 incr = biv_total_increment (bl);
7492 if (incr == const1_rtx)
7493 why = "biv iteration info incomplete; incr by 1";
7495 why = "biv iteration info incomplete";
7498 fprintf (loop_dump_stream,
7499 "Failed ext dependent giv at %d, %s\n",
7500 INSN_UID (v->insn), why);
7503 bl->all_reduced = 0;
7508 /* Generate a version of VALUE in a mode appropriate for initializing V. */
7511 extend_value_for_giv (v, value)
7512 struct induction *v;
7515 rtx ext_dep = v->ext_dependent;
7520 /* Recall that check_ext_dependent_givs verified that the known bounds
7521 of a biv did not overflow or wrap with respect to the extension for
7522 the giv. Therefore, constants need no additional adjustment. */
7523 if (CONSTANT_P (value) && GET_MODE (value) == VOIDmode)
7526 /* Otherwise, we must adjust the value to compensate for the
7527 differing modes of the biv and the giv. */
7528 return gen_rtx_fmt_e (GET_CODE (ext_dep), GET_MODE (ext_dep), value);
7531 struct combine_givs_stats
7538 cmp_combine_givs_stats (xp, yp)
7542 const struct combine_givs_stats * const x =
7543 (const struct combine_givs_stats *) xp;
7544 const struct combine_givs_stats * const y =
7545 (const struct combine_givs_stats *) yp;
7547 d = y->total_benefit - x->total_benefit;
7548 /* Stabilize the sort. */
7550 d = x->giv_number - y->giv_number;
7554 /* Check all pairs of givs for iv_class BL and see if any can be combined with
7555 any other. If so, point SAME to the giv combined with and set NEW_REG to
7556 be an expression (in terms of the other giv's DEST_REG) equivalent to the
7557 giv. Also, update BENEFIT and related fields for cost/benefit analysis. */
7560 combine_givs (regs, bl)
7561 struct loop_regs *regs;
7562 struct iv_class *bl;
7564 /* Additional benefit to add for being combined multiple times. */
7565 const int extra_benefit = 3;
7567 struct induction *g1, *g2, **giv_array;
7568 int i, j, k, giv_count;
7569 struct combine_givs_stats *stats;
7572 /* Count givs, because bl->giv_count is incorrect here. */
7574 for (g1 = bl->giv; g1; g1 = g1->next_iv)
7579 = (struct induction **) alloca (giv_count * sizeof (struct induction *));
7581 for (g1 = bl->giv; g1; g1 = g1->next_iv)
7583 giv_array[i++] = g1;
7585 stats = (struct combine_givs_stats *) xcalloc (giv_count, sizeof (*stats));
7586 can_combine = (rtx *) xcalloc (giv_count, giv_count * sizeof (rtx));
7588 for (i = 0; i < giv_count; i++)
7594 stats[i].giv_number = i;
7596 /* If a DEST_REG GIV is used only once, do not allow it to combine
7597 with anything, for in doing so we will gain nothing that cannot
7598 be had by simply letting the GIV with which we would have combined
7599 to be reduced on its own. The losage shows up in particular with
7600 DEST_ADDR targets on hosts with reg+reg addressing, though it can
7601 be seen elsewhere as well. */
7602 if (g1->giv_type == DEST_REG
7603 && (single_use = regs->array[REGNO (g1->dest_reg)].single_usage)
7604 && single_use != const0_rtx)
7607 this_benefit = g1->benefit;
7608 /* Add an additional weight for zero addends. */
7609 if (g1->no_const_addval)
7612 for (j = 0; j < giv_count; j++)
7618 && (this_combine = combine_givs_p (g1, g2)) != NULL_RTX)
7620 can_combine[i * giv_count + j] = this_combine;
7621 this_benefit += g2->benefit + extra_benefit;
7624 stats[i].total_benefit = this_benefit;
7627 /* Iterate, combining until we can't. */
7629 qsort (stats, giv_count, sizeof (*stats), cmp_combine_givs_stats);
7631 if (loop_dump_stream)
7633 fprintf (loop_dump_stream, "Sorted combine statistics:\n");
7634 for (k = 0; k < giv_count; k++)
7636 g1 = giv_array[stats[k].giv_number];
7637 if (!g1->combined_with && !g1->same)
7638 fprintf (loop_dump_stream, " {%d, %d}",
7639 INSN_UID (giv_array[stats[k].giv_number]->insn),
7640 stats[k].total_benefit);
7642 putc ('\n', loop_dump_stream);
7645 for (k = 0; k < giv_count; k++)
7647 int g1_add_benefit = 0;
7649 i = stats[k].giv_number;
7652 /* If it has already been combined, skip. */
7653 if (g1->combined_with || g1->same)
7656 for (j = 0; j < giv_count; j++)
7659 if (g1 != g2 && can_combine[i * giv_count + j]
7660 /* If it has already been combined, skip. */
7661 && ! g2->same && ! g2->combined_with)
7665 g2->new_reg = can_combine[i * giv_count + j];
7667 /* For destination, we now may replace by mem expression instead
7668 of register. This changes the costs considerably, so add the
7670 if (g2->giv_type == DEST_ADDR)
7671 g2->benefit = (g2->benefit + reg_address_cost
7672 - address_cost (g2->new_reg,
7673 GET_MODE (g2->mem)));
7674 g1->combined_with++;
7675 g1->lifetime += g2->lifetime;
7677 g1_add_benefit += g2->benefit;
7679 /* ??? The new final_[bg]iv_value code does a much better job
7680 of finding replaceable giv's, and hence this code may no
7681 longer be necessary. */
7682 if (! g2->replaceable && REG_USERVAR_P (g2->dest_reg))
7683 g1_add_benefit -= copy_cost;
7685 /* To help optimize the next set of combinations, remove
7686 this giv from the benefits of other potential mates. */
7687 for (l = 0; l < giv_count; ++l)
7689 int m = stats[l].giv_number;
7690 if (can_combine[m * giv_count + j])
7691 stats[l].total_benefit -= g2->benefit + extra_benefit;
7694 if (loop_dump_stream)
7695 fprintf (loop_dump_stream,
7696 "giv at %d combined with giv at %d; new benefit %d + %d, lifetime %d\n",
7697 INSN_UID (g2->insn), INSN_UID (g1->insn),
7698 g1->benefit, g1_add_benefit, g1->lifetime);
7702 /* To help optimize the next set of combinations, remove
7703 this giv from the benefits of other potential mates. */
7704 if (g1->combined_with)
7706 for (j = 0; j < giv_count; ++j)
7708 int m = stats[j].giv_number;
7709 if (can_combine[m * giv_count + i])
7710 stats[j].total_benefit -= g1->benefit + extra_benefit;
7713 g1->benefit += g1_add_benefit;
7715 /* We've finished with this giv, and everything it touched.
7716 Restart the combination so that proper weights for the
7717 rest of the givs are properly taken into account. */
7718 /* ??? Ideally we would compact the arrays at this point, so
7719 as to not cover old ground. But sanely compacting
7720 can_combine is tricky. */
7730 /* Generate sequence for REG = B * M + A. */
7733 gen_add_mult (b, m, a, reg)
7734 rtx b; /* initial value of basic induction variable */
7735 rtx m; /* multiplicative constant */
7736 rtx a; /* additive constant */
7737 rtx reg; /* destination register */
7743 /* Use unsigned arithmetic. */
7744 result = expand_mult_add (b, reg, m, a, GET_MODE (reg), 1);
7746 emit_move_insn (reg, result);
7754 /* Update registers created in insn sequence SEQ. */
7757 loop_regs_update (loop, seq)
7758 const struct loop *loop ATTRIBUTE_UNUSED;
7763 /* Update register info for alias analysis. */
7765 if (seq == NULL_RTX)
7771 while (insn != NULL_RTX)
7773 rtx set = single_set (insn);
7775 if (set && GET_CODE (SET_DEST (set)) == REG)
7776 record_base_value (REGNO (SET_DEST (set)), SET_SRC (set), 0);
7778 insn = NEXT_INSN (insn);
7781 else if (GET_CODE (seq) == SET
7782 && GET_CODE (SET_DEST (seq)) == REG)
7783 record_base_value (REGNO (SET_DEST (seq)), SET_SRC (seq), 0);
7787 /* EMIT code before BEFORE_BB/BEFORE_INSN to set REG = B * M + A. */
7790 loop_iv_add_mult_emit_before (loop, b, m, a, reg, before_bb, before_insn)
7791 const struct loop *loop;
7792 rtx b; /* initial value of basic induction variable */
7793 rtx m; /* multiplicative constant */
7794 rtx a; /* additive constant */
7795 rtx reg; /* destination register */
7796 basic_block before_bb;
7803 loop_iv_add_mult_hoist (loop, b, m, a, reg);
7807 /* Use copy_rtx to prevent unexpected sharing of these rtx. */
7808 seq = gen_add_mult (copy_rtx (b), copy_rtx (m), copy_rtx (a), reg);
7810 /* Increase the lifetime of any invariants moved further in code. */
7811 update_reg_last_use (a, before_insn);
7812 update_reg_last_use (b, before_insn);
7813 update_reg_last_use (m, before_insn);
7815 loop_insn_emit_before (loop, before_bb, before_insn, seq);
7817 /* It is possible that the expansion created lots of new registers.
7818 Iterate over the sequence we just created and record them all. */
7819 loop_regs_update (loop, seq);
7823 /* Emit insns in loop pre-header to set REG = B * M + A. */
7826 loop_iv_add_mult_sink (loop, b, m, a, reg)
7827 const struct loop *loop;
7828 rtx b; /* initial value of basic induction variable */
7829 rtx m; /* multiplicative constant */
7830 rtx a; /* additive constant */
7831 rtx reg; /* destination register */
7835 /* Use copy_rtx to prevent unexpected sharing of these rtx. */
7836 seq = gen_add_mult (copy_rtx (b), copy_rtx (m), copy_rtx (a), reg);
7838 /* Increase the lifetime of any invariants moved further in code.
7839 ???? Is this really necessary? */
7840 update_reg_last_use (a, loop->sink);
7841 update_reg_last_use (b, loop->sink);
7842 update_reg_last_use (m, loop->sink);
7844 loop_insn_sink (loop, seq);
7846 /* It is possible that the expansion created lots of new registers.
7847 Iterate over the sequence we just created and record them all. */
7848 loop_regs_update (loop, seq);
7852 /* Emit insns after loop to set REG = B * M + A. */
7855 loop_iv_add_mult_hoist (loop, b, m, a, reg)
7856 const struct loop *loop;
7857 rtx b; /* initial value of basic induction variable */
7858 rtx m; /* multiplicative constant */
7859 rtx a; /* additive constant */
7860 rtx reg; /* destination register */
7864 /* Use copy_rtx to prevent unexpected sharing of these rtx. */
7865 seq = gen_add_mult (copy_rtx (b), copy_rtx (m), copy_rtx (a), reg);
7867 loop_insn_hoist (loop, seq);
7869 /* It is possible that the expansion created lots of new registers.
7870 Iterate over the sequence we just created and record them all. */
7871 loop_regs_update (loop, seq);
7876 /* Similar to gen_add_mult, but compute cost rather than generating
7880 iv_add_mult_cost (b, m, a, reg)
7881 rtx b; /* initial value of basic induction variable */
7882 rtx m; /* multiplicative constant */
7883 rtx a; /* additive constant */
7884 rtx reg; /* destination register */
7890 result = expand_mult_add (b, reg, m, a, GET_MODE (reg), 1);
7892 emit_move_insn (reg, result);
7893 last = get_last_insn ();
7896 rtx t = single_set (last);
7898 cost += rtx_cost (SET_SRC (t), SET);
7899 last = PREV_INSN (last);
7905 /* Test whether A * B can be computed without
7906 an actual multiply insn. Value is 1 if so.
7908 ??? This function stinks because it generates a ton of wasted RTL
7909 ??? and as a result fragments GC memory to no end. There are other
7910 ??? places in the compiler which are invoked a lot and do the same
7911 ??? thing, generate wasted RTL just to see if something is possible. */
7914 product_cheap_p (a, b)
7921 /* If only one is constant, make it B. */
7922 if (GET_CODE (a) == CONST_INT)
7923 tmp = a, a = b, b = tmp;
7925 /* If first constant, both constant, so don't need multiply. */
7926 if (GET_CODE (a) == CONST_INT)
7929 /* If second not constant, neither is constant, so would need multiply. */
7930 if (GET_CODE (b) != CONST_INT)
7933 /* One operand is constant, so might not need multiply insn. Generate the
7934 code for the multiply and see if a call or multiply, or long sequence
7935 of insns is generated. */
7938 expand_mult (GET_MODE (a), a, b, NULL_RTX, 1);
7946 while (tmp != NULL_RTX)
7948 rtx next = NEXT_INSN (tmp);
7951 || GET_CODE (tmp) != INSN
7952 || (GET_CODE (PATTERN (tmp)) == SET
7953 && GET_CODE (SET_SRC (PATTERN (tmp))) == MULT)
7954 || (GET_CODE (PATTERN (tmp)) == PARALLEL
7955 && GET_CODE (XVECEXP (PATTERN (tmp), 0, 0)) == SET
7956 && GET_CODE (SET_SRC (XVECEXP (PATTERN (tmp), 0, 0))) == MULT))
7965 else if (GET_CODE (tmp) == SET
7966 && GET_CODE (SET_SRC (tmp)) == MULT)
7968 else if (GET_CODE (tmp) == PARALLEL
7969 && GET_CODE (XVECEXP (tmp, 0, 0)) == SET
7970 && GET_CODE (SET_SRC (XVECEXP (tmp, 0, 0))) == MULT)
7976 /* Check to see if loop can be terminated by a "decrement and branch until
7977 zero" instruction. If so, add a REG_NONNEG note to the branch insn if so.
7978 Also try reversing an increment loop to a decrement loop
7979 to see if the optimization can be performed.
7980 Value is nonzero if optimization was performed. */
7982 /* This is useful even if the architecture doesn't have such an insn,
7983 because it might change a loops which increments from 0 to n to a loop
7984 which decrements from n to 0. A loop that decrements to zero is usually
7985 faster than one that increments from zero. */
7987 /* ??? This could be rewritten to use some of the loop unrolling procedures,
7988 such as approx_final_value, biv_total_increment, loop_iterations, and
7989 final_[bg]iv_value. */
7992 check_dbra_loop (loop, insn_count)
7996 struct loop_info *loop_info = LOOP_INFO (loop);
7997 struct loop_regs *regs = LOOP_REGS (loop);
7998 struct loop_ivs *ivs = LOOP_IVS (loop);
7999 struct iv_class *bl;
8006 rtx before_comparison;
8010 int compare_and_branch;
8011 rtx loop_start = loop->start;
8012 rtx loop_end = loop->end;
8014 /* If last insn is a conditional branch, and the insn before tests a
8015 register value, try to optimize it. Otherwise, we can't do anything. */
8017 jump = PREV_INSN (loop_end);
8018 comparison = get_condition_for_loop (loop, jump);
8019 if (comparison == 0)
8021 if (!onlyjump_p (jump))
8024 /* Try to compute whether the compare/branch at the loop end is one or
8025 two instructions. */
8026 get_condition (jump, &first_compare);
8027 if (first_compare == jump)
8028 compare_and_branch = 1;
8029 else if (first_compare == prev_nonnote_insn (jump))
8030 compare_and_branch = 2;
8035 /* If more than one condition is present to control the loop, then
8036 do not proceed, as this function does not know how to rewrite
8037 loop tests with more than one condition.
8039 Look backwards from the first insn in the last comparison
8040 sequence and see if we've got another comparison sequence. */
8043 if ((jump1 = prev_nonnote_insn (first_compare)) != loop->cont)
8044 if (GET_CODE (jump1) == JUMP_INSN)
8048 /* Check all of the bivs to see if the compare uses one of them.
8049 Skip biv's set more than once because we can't guarantee that
8050 it will be zero on the last iteration. Also skip if the biv is
8051 used between its update and the test insn. */
8053 for (bl = ivs->list; bl; bl = bl->next)
8055 if (bl->biv_count == 1
8056 && ! bl->biv->maybe_multiple
8057 && bl->biv->dest_reg == XEXP (comparison, 0)
8058 && ! reg_used_between_p (regno_reg_rtx[bl->regno], bl->biv->insn,
8066 /* Look for the case where the basic induction variable is always
8067 nonnegative, and equals zero on the last iteration.
8068 In this case, add a reg_note REG_NONNEG, which allows the
8069 m68k DBRA instruction to be used. */
8071 if (((GET_CODE (comparison) == GT
8072 && GET_CODE (XEXP (comparison, 1)) == CONST_INT
8073 && INTVAL (XEXP (comparison, 1)) == -1)
8074 || (GET_CODE (comparison) == NE && XEXP (comparison, 1) == const0_rtx))
8075 && GET_CODE (bl->biv->add_val) == CONST_INT
8076 && INTVAL (bl->biv->add_val) < 0)
8078 /* Initial value must be greater than 0,
8079 init_val % -dec_value == 0 to ensure that it equals zero on
8080 the last iteration */
8082 if (GET_CODE (bl->initial_value) == CONST_INT
8083 && INTVAL (bl->initial_value) > 0
8084 && (INTVAL (bl->initial_value)
8085 % (-INTVAL (bl->biv->add_val))) == 0)
8087 /* register always nonnegative, add REG_NOTE to branch */
8088 if (! find_reg_note (jump, REG_NONNEG, NULL_RTX))
8090 = gen_rtx_EXPR_LIST (REG_NONNEG, bl->biv->dest_reg,
8097 /* If the decrement is 1 and the value was tested as >= 0 before
8098 the loop, then we can safely optimize. */
8099 for (p = loop_start; p; p = PREV_INSN (p))
8101 if (GET_CODE (p) == CODE_LABEL)
8103 if (GET_CODE (p) != JUMP_INSN)
8106 before_comparison = get_condition_for_loop (loop, p);
8107 if (before_comparison
8108 && XEXP (before_comparison, 0) == bl->biv->dest_reg
8109 && GET_CODE (before_comparison) == LT
8110 && XEXP (before_comparison, 1) == const0_rtx
8111 && ! reg_set_between_p (bl->biv->dest_reg, p, loop_start)
8112 && INTVAL (bl->biv->add_val) == -1)
8114 if (! find_reg_note (jump, REG_NONNEG, NULL_RTX))
8116 = gen_rtx_EXPR_LIST (REG_NONNEG, bl->biv->dest_reg,
8124 else if (GET_CODE (bl->biv->add_val) == CONST_INT
8125 && INTVAL (bl->biv->add_val) > 0)
8127 /* Try to change inc to dec, so can apply above optimization. */
8129 all registers modified are induction variables or invariant,
8130 all memory references have non-overlapping addresses
8131 (obviously true if only one write)
8132 allow 2 insns for the compare/jump at the end of the loop. */
8133 /* Also, we must avoid any instructions which use both the reversed
8134 biv and another biv. Such instructions will fail if the loop is
8135 reversed. We meet this condition by requiring that either
8136 no_use_except_counting is true, or else that there is only
8138 int num_nonfixed_reads = 0;
8139 /* 1 if the iteration var is used only to count iterations. */
8140 int no_use_except_counting = 0;
8141 /* 1 if the loop has no memory store, or it has a single memory store
8142 which is reversible. */
8143 int reversible_mem_store = 1;
8145 if (bl->giv_count == 0
8146 && !loop->exit_count
8147 && !loop_info->has_multiple_exit_targets)
8149 rtx bivreg = regno_reg_rtx[bl->regno];
8150 struct iv_class *blt;
8152 /* If there are no givs for this biv, and the only exit is the
8153 fall through at the end of the loop, then
8154 see if perhaps there are no uses except to count. */
8155 no_use_except_counting = 1;
8156 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
8159 rtx set = single_set (p);
8161 if (set && GET_CODE (SET_DEST (set)) == REG
8162 && REGNO (SET_DEST (set)) == bl->regno)
8163 /* An insn that sets the biv is okay. */
8165 else if ((p == prev_nonnote_insn (prev_nonnote_insn (loop_end))
8166 || p == prev_nonnote_insn (loop_end))
8167 && reg_mentioned_p (bivreg, PATTERN (p)))
8169 /* If either of these insns uses the biv and sets a pseudo
8170 that has more than one usage, then the biv has uses
8171 other than counting since it's used to derive a value
8172 that is used more than one time. */
8173 note_stores (PATTERN (p), note_set_pseudo_multiple_uses,
8175 if (regs->multiple_uses)
8177 no_use_except_counting = 0;
8181 else if (reg_mentioned_p (bivreg, PATTERN (p)))
8183 no_use_except_counting = 0;
8188 /* A biv has uses besides counting if it is used to set
8190 for (blt = ivs->list; blt; blt = blt->next)
8192 && reg_mentioned_p (bivreg, SET_SRC (blt->init_set)))
8194 no_use_except_counting = 0;
8199 if (no_use_except_counting)
8200 /* No need to worry about MEMs. */
8202 else if (loop_info->num_mem_sets <= 1)
8204 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
8206 num_nonfixed_reads += count_nonfixed_reads (loop, PATTERN (p));
8208 /* If the loop has a single store, and the destination address is
8209 invariant, then we can't reverse the loop, because this address
8210 might then have the wrong value at loop exit.
8211 This would work if the source was invariant also, however, in that
8212 case, the insn should have been moved out of the loop. */
8214 if (loop_info->num_mem_sets == 1)
8216 struct induction *v;
8218 /* If we could prove that each of the memory locations
8219 written to was different, then we could reverse the
8220 store -- but we don't presently have any way of
8222 reversible_mem_store = 0;
8224 /* If the store depends on a register that is set after the
8225 store, it depends on the initial value, and is thus not
8227 for (v = bl->giv; reversible_mem_store && v; v = v->next_iv)
8229 if (v->giv_type == DEST_REG
8230 && reg_mentioned_p (v->dest_reg,
8231 PATTERN (loop_info->first_loop_store_insn))
8232 && loop_insn_first_p (loop_info->first_loop_store_insn,
8234 reversible_mem_store = 0;
8241 /* This code only acts for innermost loops. Also it simplifies
8242 the memory address check by only reversing loops with
8243 zero or one memory access.
8244 Two memory accesses could involve parts of the same array,
8245 and that can't be reversed.
8246 If the biv is used only for counting, than we don't need to worry
8247 about all these things. */
8249 if ((num_nonfixed_reads <= 1
8250 && ! loop_info->has_nonconst_call
8251 && ! loop_info->has_prefetch
8252 && ! loop_info->has_volatile
8253 && reversible_mem_store
8254 && (bl->giv_count + bl->biv_count + loop_info->num_mem_sets
8255 + num_unmoved_movables (loop) + compare_and_branch == insn_count)
8256 && (bl == ivs->list && bl->next == 0))
8257 || (no_use_except_counting && ! loop_info->has_prefetch))
8261 /* Loop can be reversed. */
8262 if (loop_dump_stream)
8263 fprintf (loop_dump_stream, "Can reverse loop\n");
8265 /* Now check other conditions:
8267 The increment must be a constant, as must the initial value,
8268 and the comparison code must be LT.
8270 This test can probably be improved since +/- 1 in the constant
8271 can be obtained by changing LT to LE and vice versa; this is
8275 /* for constants, LE gets turned into LT */
8276 && (GET_CODE (comparison) == LT
8277 || (GET_CODE (comparison) == LE
8278 && no_use_except_counting)))
8280 HOST_WIDE_INT add_val, add_adjust, comparison_val = 0;
8281 rtx initial_value, comparison_value;
8283 enum rtx_code cmp_code;
8284 int comparison_const_width;
8285 unsigned HOST_WIDE_INT comparison_sign_mask;
8287 add_val = INTVAL (bl->biv->add_val);
8288 comparison_value = XEXP (comparison, 1);
8289 if (GET_MODE (comparison_value) == VOIDmode)
8290 comparison_const_width
8291 = GET_MODE_BITSIZE (GET_MODE (XEXP (comparison, 0)));
8293 comparison_const_width
8294 = GET_MODE_BITSIZE (GET_MODE (comparison_value));
8295 if (comparison_const_width > HOST_BITS_PER_WIDE_INT)
8296 comparison_const_width = HOST_BITS_PER_WIDE_INT;
8297 comparison_sign_mask
8298 = (unsigned HOST_WIDE_INT) 1 << (comparison_const_width - 1);
8300 /* If the comparison value is not a loop invariant, then we
8301 can not reverse this loop.
8303 ??? If the insns which initialize the comparison value as
8304 a whole compute an invariant result, then we could move
8305 them out of the loop and proceed with loop reversal. */
8306 if (! loop_invariant_p (loop, comparison_value))
8309 if (GET_CODE (comparison_value) == CONST_INT)
8310 comparison_val = INTVAL (comparison_value);
8311 initial_value = bl->initial_value;
8313 /* Normalize the initial value if it is an integer and
8314 has no other use except as a counter. This will allow
8315 a few more loops to be reversed. */
8316 if (no_use_except_counting
8317 && GET_CODE (comparison_value) == CONST_INT
8318 && GET_CODE (initial_value) == CONST_INT)
8320 comparison_val = comparison_val - INTVAL (bl->initial_value);
8321 /* The code below requires comparison_val to be a multiple
8322 of add_val in order to do the loop reversal, so
8323 round up comparison_val to a multiple of add_val.
8324 Since comparison_value is constant, we know that the
8325 current comparison code is LT. */
8326 comparison_val = comparison_val + add_val - 1;
8328 -= (unsigned HOST_WIDE_INT) comparison_val % add_val;
8329 /* We postpone overflow checks for COMPARISON_VAL here;
8330 even if there is an overflow, we might still be able to
8331 reverse the loop, if converting the loop exit test to
8333 initial_value = const0_rtx;
8336 /* First check if we can do a vanilla loop reversal. */
8337 if (initial_value == const0_rtx
8338 /* If we have a decrement_and_branch_on_count,
8339 prefer the NE test, since this will allow that
8340 instruction to be generated. Note that we must
8341 use a vanilla loop reversal if the biv is used to
8342 calculate a giv or has a non-counting use. */
8343 #if ! defined (HAVE_decrement_and_branch_until_zero) \
8344 && defined (HAVE_decrement_and_branch_on_count)
8345 && (! (add_val == 1 && loop->vtop
8346 && (bl->biv_count == 0
8347 || no_use_except_counting)))
8349 && GET_CODE (comparison_value) == CONST_INT
8350 /* Now do postponed overflow checks on COMPARISON_VAL. */
8351 && ! (((comparison_val - add_val) ^ INTVAL (comparison_value))
8352 & comparison_sign_mask))
8354 /* Register will always be nonnegative, with value
8355 0 on last iteration */
8356 add_adjust = add_val;
8360 else if (add_val == 1 && loop->vtop
8361 && (bl->biv_count == 0
8362 || no_use_except_counting))
8370 if (GET_CODE (comparison) == LE)
8371 add_adjust -= add_val;
8373 /* If the initial value is not zero, or if the comparison
8374 value is not an exact multiple of the increment, then we
8375 can not reverse this loop. */
8376 if (initial_value == const0_rtx
8377 && GET_CODE (comparison_value) == CONST_INT)
8379 if (((unsigned HOST_WIDE_INT) comparison_val % add_val) != 0)
8384 if (! no_use_except_counting || add_val != 1)
8388 final_value = comparison_value;
8390 /* Reset these in case we normalized the initial value
8391 and comparison value above. */
8392 if (GET_CODE (comparison_value) == CONST_INT
8393 && GET_CODE (initial_value) == CONST_INT)
8395 comparison_value = GEN_INT (comparison_val);
8397 = GEN_INT (comparison_val + INTVAL (bl->initial_value));
8399 bl->initial_value = initial_value;
8401 /* Save some info needed to produce the new insns. */
8402 reg = bl->biv->dest_reg;
8403 jump_label = condjump_label (PREV_INSN (loop_end));
8404 new_add_val = GEN_INT (-INTVAL (bl->biv->add_val));
8406 /* Set start_value; if this is not a CONST_INT, we need
8408 Initialize biv to start_value before loop start.
8409 The old initializing insn will be deleted as a
8410 dead store by flow.c. */
8411 if (initial_value == const0_rtx
8412 && GET_CODE (comparison_value) == CONST_INT)
8414 start_value = GEN_INT (comparison_val - add_adjust);
8415 loop_insn_hoist (loop, gen_move_insn (reg, start_value));
8417 else if (GET_CODE (initial_value) == CONST_INT)
8419 enum machine_mode mode = GET_MODE (reg);
8420 rtx offset = GEN_INT (-INTVAL (initial_value) - add_adjust);
8421 rtx add_insn = gen_add3_insn (reg, comparison_value, offset);
8427 = gen_rtx_PLUS (mode, comparison_value, offset);
8428 loop_insn_hoist (loop, add_insn);
8429 if (GET_CODE (comparison) == LE)
8430 final_value = gen_rtx_PLUS (mode, comparison_value,
8433 else if (! add_adjust)
8435 enum machine_mode mode = GET_MODE (reg);
8436 rtx sub_insn = gen_sub3_insn (reg, comparison_value,
8442 = gen_rtx_MINUS (mode, comparison_value, initial_value);
8443 loop_insn_hoist (loop, sub_insn);
8446 /* We could handle the other cases too, but it'll be
8447 better to have a testcase first. */
8450 /* We may not have a single insn which can increment a reg, so
8451 create a sequence to hold all the insns from expand_inc. */
8453 expand_inc (reg, new_add_val);
8457 p = loop_insn_emit_before (loop, 0, bl->biv->insn, tem);
8458 delete_insn (bl->biv->insn);
8460 /* Update biv info to reflect its new status. */
8462 bl->initial_value = start_value;
8463 bl->biv->add_val = new_add_val;
8465 /* Update loop info. */
8466 loop_info->initial_value = reg;
8467 loop_info->initial_equiv_value = reg;
8468 loop_info->final_value = const0_rtx;
8469 loop_info->final_equiv_value = const0_rtx;
8470 loop_info->comparison_value = const0_rtx;
8471 loop_info->comparison_code = cmp_code;
8472 loop_info->increment = new_add_val;
8474 /* Inc LABEL_NUSES so that delete_insn will
8475 not delete the label. */
8476 LABEL_NUSES (XEXP (jump_label, 0))++;
8478 /* Emit an insn after the end of the loop to set the biv's
8479 proper exit value if it is used anywhere outside the loop. */
8480 if ((REGNO_LAST_UID (bl->regno) != INSN_UID (first_compare))
8482 || REGNO_FIRST_UID (bl->regno) != INSN_UID (bl->init_insn))
8483 loop_insn_sink (loop, gen_load_of_final_value (reg, final_value));
8485 /* Delete compare/branch at end of loop. */
8486 delete_related_insns (PREV_INSN (loop_end));
8487 if (compare_and_branch == 2)
8488 delete_related_insns (first_compare);
8490 /* Add new compare/branch insn at end of loop. */
8492 emit_cmp_and_jump_insns (reg, const0_rtx, cmp_code, NULL_RTX,
8494 XEXP (jump_label, 0));
8497 emit_jump_insn_before (tem, loop_end);
8499 for (tem = PREV_INSN (loop_end);
8500 tem && GET_CODE (tem) != JUMP_INSN;
8501 tem = PREV_INSN (tem))
8505 JUMP_LABEL (tem) = XEXP (jump_label, 0);
8511 /* Increment of LABEL_NUSES done above. */
8512 /* Register is now always nonnegative,
8513 so add REG_NONNEG note to the branch. */
8514 REG_NOTES (tem) = gen_rtx_EXPR_LIST (REG_NONNEG, reg,
8520 /* No insn may reference both the reversed and another biv or it
8521 will fail (see comment near the top of the loop reversal
8523 Earlier on, we have verified that the biv has no use except
8524 counting, or it is the only biv in this function.
8525 However, the code that computes no_use_except_counting does
8526 not verify reg notes. It's possible to have an insn that
8527 references another biv, and has a REG_EQUAL note with an
8528 expression based on the reversed biv. To avoid this case,
8529 remove all REG_EQUAL notes based on the reversed biv
8531 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
8535 rtx set = single_set (p);
8536 /* If this is a set of a GIV based on the reversed biv, any
8537 REG_EQUAL notes should still be correct. */
8539 || GET_CODE (SET_DEST (set)) != REG
8540 || (size_t) REGNO (SET_DEST (set)) >= ivs->n_regs
8541 || REG_IV_TYPE (ivs, REGNO (SET_DEST (set))) != GENERAL_INDUCT
8542 || REG_IV_INFO (ivs, REGNO (SET_DEST (set)))->src_reg != bl->biv->src_reg)
8543 for (pnote = ®_NOTES (p); *pnote;)
8545 if (REG_NOTE_KIND (*pnote) == REG_EQUAL
8546 && reg_mentioned_p (regno_reg_rtx[bl->regno],
8548 *pnote = XEXP (*pnote, 1);
8550 pnote = &XEXP (*pnote, 1);
8554 /* Mark that this biv has been reversed. Each giv which depends
8555 on this biv, and which is also live past the end of the loop
8556 will have to be fixed up. */
8560 if (loop_dump_stream)
8562 fprintf (loop_dump_stream, "Reversed loop");
8564 fprintf (loop_dump_stream, " and added reg_nonneg\n");
8566 fprintf (loop_dump_stream, "\n");
8577 /* Verify whether the biv BL appears to be eliminable,
8578 based on the insns in the loop that refer to it.
8580 If ELIMINATE_P is nonzero, actually do the elimination.
8582 THRESHOLD and INSN_COUNT are from loop_optimize and are used to
8583 determine whether invariant insns should be placed inside or at the
8584 start of the loop. */
8587 maybe_eliminate_biv (loop, bl, eliminate_p, threshold, insn_count)
8588 const struct loop *loop;
8589 struct iv_class *bl;
8591 int threshold, insn_count;
8593 struct loop_ivs *ivs = LOOP_IVS (loop);
8594 rtx reg = bl->biv->dest_reg;
8597 /* Scan all insns in the loop, stopping if we find one that uses the
8598 biv in a way that we cannot eliminate. */
8600 for (p = loop->start; p != loop->end; p = NEXT_INSN (p))
8602 enum rtx_code code = GET_CODE (p);
8603 basic_block where_bb = 0;
8604 rtx where_insn = threshold >= insn_count ? 0 : p;
8607 /* If this is a libcall that sets a giv, skip ahead to its end. */
8608 if (GET_RTX_CLASS (code) == 'i')
8610 note = find_reg_note (p, REG_LIBCALL, NULL_RTX);
8614 rtx last = XEXP (note, 0);
8615 rtx set = single_set (last);
8617 if (set && GET_CODE (SET_DEST (set)) == REG)
8619 unsigned int regno = REGNO (SET_DEST (set));
8621 if (regno < ivs->n_regs
8622 && REG_IV_TYPE (ivs, regno) == GENERAL_INDUCT
8623 && REG_IV_INFO (ivs, regno)->src_reg == bl->biv->src_reg)
8629 /* Closely examine the insn if the biv is mentioned. */
8630 if ((code == INSN || code == JUMP_INSN || code == CALL_INSN)
8631 && reg_mentioned_p (reg, PATTERN (p))
8632 && ! maybe_eliminate_biv_1 (loop, PATTERN (p), p, bl,
8633 eliminate_p, where_bb, where_insn))
8635 if (loop_dump_stream)
8636 fprintf (loop_dump_stream,
8637 "Cannot eliminate biv %d: biv used in insn %d.\n",
8638 bl->regno, INSN_UID (p));
8642 /* If we are eliminating, kill REG_EQUAL notes mentioning the biv. */
8644 && (note = find_reg_note (p, REG_EQUAL, NULL_RTX)) != NULL_RTX
8645 && reg_mentioned_p (reg, XEXP (note, 0)))
8646 remove_note (p, note);
8651 if (loop_dump_stream)
8652 fprintf (loop_dump_stream, "biv %d %s eliminated.\n",
8653 bl->regno, eliminate_p ? "was" : "can be");
8660 /* INSN and REFERENCE are instructions in the same insn chain.
8661 Return nonzero if INSN is first. */
8664 loop_insn_first_p (insn, reference)
8665 rtx insn, reference;
8669 for (p = insn, q = reference;;)
8671 /* Start with test for not first so that INSN == REFERENCE yields not
8673 if (q == insn || ! p)
8675 if (p == reference || ! q)
8678 /* Either of P or Q might be a NOTE. Notes have the same LUID as the
8679 previous insn, hence the <= comparison below does not work if
8681 if (INSN_UID (p) < max_uid_for_loop
8682 && INSN_UID (q) < max_uid_for_loop
8683 && GET_CODE (p) != NOTE)
8684 return INSN_LUID (p) <= INSN_LUID (q);
8686 if (INSN_UID (p) >= max_uid_for_loop
8687 || GET_CODE (p) == NOTE)
8689 if (INSN_UID (q) >= max_uid_for_loop)
8694 /* We are trying to eliminate BIV in INSN using GIV. Return nonzero if
8695 the offset that we have to take into account due to auto-increment /
8696 div derivation is zero. */
8698 biv_elimination_giv_has_0_offset (biv, giv, insn)
8699 struct induction *biv, *giv;
8702 /* If the giv V had the auto-inc address optimization applied
8703 to it, and INSN occurs between the giv insn and the biv
8704 insn, then we'd have to adjust the value used here.
8705 This is rare, so we don't bother to make this possible. */
8706 if (giv->auto_inc_opt
8707 && ((loop_insn_first_p (giv->insn, insn)
8708 && loop_insn_first_p (insn, biv->insn))
8709 || (loop_insn_first_p (biv->insn, insn)
8710 && loop_insn_first_p (insn, giv->insn))))
8716 /* If BL appears in X (part of the pattern of INSN), see if we can
8717 eliminate its use. If so, return 1. If not, return 0.
8719 If BIV does not appear in X, return 1.
8721 If ELIMINATE_P is nonzero, actually do the elimination.
8722 WHERE_INSN/WHERE_BB indicate where extra insns should be added.
8723 Depending on how many items have been moved out of the loop, it
8724 will either be before INSN (when WHERE_INSN is nonzero) or at the
8725 start of the loop (when WHERE_INSN is zero). */
8728 maybe_eliminate_biv_1 (loop, x, insn, bl, eliminate_p, where_bb, where_insn)
8729 const struct loop *loop;
8731 struct iv_class *bl;
8733 basic_block where_bb;
8736 enum rtx_code code = GET_CODE (x);
8737 rtx reg = bl->biv->dest_reg;
8738 enum machine_mode mode = GET_MODE (reg);
8739 struct induction *v;
8751 /* If we haven't already been able to do something with this BIV,
8752 we can't eliminate it. */
8758 /* If this sets the BIV, it is not a problem. */
8759 if (SET_DEST (x) == reg)
8762 /* If this is an insn that defines a giv, it is also ok because
8763 it will go away when the giv is reduced. */
8764 for (v = bl->giv; v; v = v->next_iv)
8765 if (v->giv_type == DEST_REG && SET_DEST (x) == v->dest_reg)
8769 if (SET_DEST (x) == cc0_rtx && SET_SRC (x) == reg)
8771 /* Can replace with any giv that was reduced and
8772 that has (MULT_VAL != 0) and (ADD_VAL == 0).
8773 Require a constant for MULT_VAL, so we know it's nonzero.
8774 ??? We disable this optimization to avoid potential
8777 for (v = bl->giv; v; v = v->next_iv)
8778 if (GET_CODE (v->mult_val) == CONST_INT && v->mult_val != const0_rtx
8779 && v->add_val == const0_rtx
8780 && ! v->ignore && ! v->maybe_dead && v->always_computable
8784 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8790 /* If the giv has the opposite direction of change,
8791 then reverse the comparison. */
8792 if (INTVAL (v->mult_val) < 0)
8793 new = gen_rtx_COMPARE (GET_MODE (v->new_reg),
8794 const0_rtx, v->new_reg);
8798 /* We can probably test that giv's reduced reg. */
8799 if (validate_change (insn, &SET_SRC (x), new, 0))
8803 /* Look for a giv with (MULT_VAL != 0) and (ADD_VAL != 0);
8804 replace test insn with a compare insn (cmp REDUCED_GIV ADD_VAL).
8805 Require a constant for MULT_VAL, so we know it's nonzero.
8806 ??? Do this only if ADD_VAL is a pointer to avoid a potential
8807 overflow problem. */
8809 for (v = bl->giv; v; v = v->next_iv)
8810 if (GET_CODE (v->mult_val) == CONST_INT
8811 && v->mult_val != const0_rtx
8812 && ! v->ignore && ! v->maybe_dead && v->always_computable
8814 && (GET_CODE (v->add_val) == SYMBOL_REF
8815 || GET_CODE (v->add_val) == LABEL_REF
8816 || GET_CODE (v->add_val) == CONST
8817 || (GET_CODE (v->add_val) == REG
8818 && REG_POINTER (v->add_val))))
8820 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8826 /* If the giv has the opposite direction of change,
8827 then reverse the comparison. */
8828 if (INTVAL (v->mult_val) < 0)
8829 new = gen_rtx_COMPARE (VOIDmode, copy_rtx (v->add_val),
8832 new = gen_rtx_COMPARE (VOIDmode, v->new_reg,
8833 copy_rtx (v->add_val));
8835 /* Replace biv with the giv's reduced register. */
8836 update_reg_last_use (v->add_val, insn);
8837 if (validate_change (insn, &SET_SRC (PATTERN (insn)), new, 0))
8840 /* Insn doesn't support that constant or invariant. Copy it
8841 into a register (it will be a loop invariant.) */
8842 tem = gen_reg_rtx (GET_MODE (v->new_reg));
8844 loop_insn_emit_before (loop, 0, where_insn,
8846 copy_rtx (v->add_val)));
8848 /* Substitute the new register for its invariant value in
8849 the compare expression. */
8850 XEXP (new, (INTVAL (v->mult_val) < 0) ? 0 : 1) = tem;
8851 if (validate_change (insn, &SET_SRC (PATTERN (insn)), new, 0))
8860 case GT: case GE: case GTU: case GEU:
8861 case LT: case LE: case LTU: case LEU:
8862 /* See if either argument is the biv. */
8863 if (XEXP (x, 0) == reg)
8864 arg = XEXP (x, 1), arg_operand = 1;
8865 else if (XEXP (x, 1) == reg)
8866 arg = XEXP (x, 0), arg_operand = 0;
8870 if (CONSTANT_P (arg))
8872 /* First try to replace with any giv that has constant positive
8873 mult_val and constant add_val. We might be able to support
8874 negative mult_val, but it seems complex to do it in general. */
8876 for (v = bl->giv; v; v = v->next_iv)
8877 if (GET_CODE (v->mult_val) == CONST_INT
8878 && INTVAL (v->mult_val) > 0
8879 && (GET_CODE (v->add_val) == SYMBOL_REF
8880 || GET_CODE (v->add_val) == LABEL_REF
8881 || GET_CODE (v->add_val) == CONST
8882 || (GET_CODE (v->add_val) == REG
8883 && REG_POINTER (v->add_val)))
8884 && ! v->ignore && ! v->maybe_dead && v->always_computable
8887 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8890 /* Don't eliminate if the linear combination that makes up
8891 the giv overflows when it is applied to ARG. */
8892 if (GET_CODE (arg) == CONST_INT)
8896 if (GET_CODE (v->add_val) == CONST_INT)
8897 add_val = v->add_val;
8899 add_val = const0_rtx;
8901 if (const_mult_add_overflow_p (arg, v->mult_val,
8909 /* Replace biv with the giv's reduced reg. */
8910 validate_change (insn, &XEXP (x, 1 - arg_operand), v->new_reg, 1);
8912 /* If all constants are actually constant integers and
8913 the derived constant can be directly placed in the COMPARE,
8915 if (GET_CODE (arg) == CONST_INT
8916 && GET_CODE (v->add_val) == CONST_INT)
8918 tem = expand_mult_add (arg, NULL_RTX, v->mult_val,
8919 v->add_val, mode, 1);
8923 /* Otherwise, load it into a register. */
8924 tem = gen_reg_rtx (mode);
8925 loop_iv_add_mult_emit_before (loop, arg,
8926 v->mult_val, v->add_val,
8927 tem, where_bb, where_insn);
8930 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
8932 if (apply_change_group ())
8936 /* Look for giv with positive constant mult_val and nonconst add_val.
8937 Insert insns to calculate new compare value.
8938 ??? Turn this off due to possible overflow. */
8940 for (v = bl->giv; v; v = v->next_iv)
8941 if (GET_CODE (v->mult_val) == CONST_INT
8942 && INTVAL (v->mult_val) > 0
8943 && ! v->ignore && ! v->maybe_dead && v->always_computable
8949 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8955 tem = gen_reg_rtx (mode);
8957 /* Replace biv with giv's reduced register. */
8958 validate_change (insn, &XEXP (x, 1 - arg_operand),
8961 /* Compute value to compare against. */
8962 loop_iv_add_mult_emit_before (loop, arg,
8963 v->mult_val, v->add_val,
8964 tem, where_bb, where_insn);
8965 /* Use it in this insn. */
8966 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
8967 if (apply_change_group ())
8971 else if (GET_CODE (arg) == REG || GET_CODE (arg) == MEM)
8973 if (loop_invariant_p (loop, arg) == 1)
8975 /* Look for giv with constant positive mult_val and nonconst
8976 add_val. Insert insns to compute new compare value.
8977 ??? Turn this off due to possible overflow. */
8979 for (v = bl->giv; v; v = v->next_iv)
8980 if (GET_CODE (v->mult_val) == CONST_INT && INTVAL (v->mult_val) > 0
8981 && ! v->ignore && ! v->maybe_dead && v->always_computable
8987 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8993 tem = gen_reg_rtx (mode);
8995 /* Replace biv with giv's reduced register. */
8996 validate_change (insn, &XEXP (x, 1 - arg_operand),
8999 /* Compute value to compare against. */
9000 loop_iv_add_mult_emit_before (loop, arg,
9001 v->mult_val, v->add_val,
9002 tem, where_bb, where_insn);
9003 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
9004 if (apply_change_group ())
9009 /* This code has problems. Basically, you can't know when
9010 seeing if we will eliminate BL, whether a particular giv
9011 of ARG will be reduced. If it isn't going to be reduced,
9012 we can't eliminate BL. We can try forcing it to be reduced,
9013 but that can generate poor code.
9015 The problem is that the benefit of reducing TV, below should
9016 be increased if BL can actually be eliminated, but this means
9017 we might have to do a topological sort of the order in which
9018 we try to process biv. It doesn't seem worthwhile to do
9019 this sort of thing now. */
9022 /* Otherwise the reg compared with had better be a biv. */
9023 if (GET_CODE (arg) != REG
9024 || REG_IV_TYPE (ivs, REGNO (arg)) != BASIC_INDUCT)
9027 /* Look for a pair of givs, one for each biv,
9028 with identical coefficients. */
9029 for (v = bl->giv; v; v = v->next_iv)
9031 struct induction *tv;
9033 if (v->ignore || v->maybe_dead || v->mode != mode)
9036 for (tv = REG_IV_CLASS (ivs, REGNO (arg))->giv; tv;
9038 if (! tv->ignore && ! tv->maybe_dead
9039 && rtx_equal_p (tv->mult_val, v->mult_val)
9040 && rtx_equal_p (tv->add_val, v->add_val)
9041 && tv->mode == mode)
9043 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
9049 /* Replace biv with its giv's reduced reg. */
9050 XEXP (x, 1 - arg_operand) = v->new_reg;
9051 /* Replace other operand with the other giv's
9053 XEXP (x, arg_operand) = tv->new_reg;
9060 /* If we get here, the biv can't be eliminated. */
9064 /* If this address is a DEST_ADDR giv, it doesn't matter if the
9065 biv is used in it, since it will be replaced. */
9066 for (v = bl->giv; v; v = v->next_iv)
9067 if (v->giv_type == DEST_ADDR && v->location == &XEXP (x, 0))
9075 /* See if any subexpression fails elimination. */
9076 fmt = GET_RTX_FORMAT (code);
9077 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
9082 if (! maybe_eliminate_biv_1 (loop, XEXP (x, i), insn, bl,
9083 eliminate_p, where_bb, where_insn))
9088 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
9089 if (! maybe_eliminate_biv_1 (loop, XVECEXP (x, i, j), insn, bl,
9090 eliminate_p, where_bb, where_insn))
9099 /* Return nonzero if the last use of REG
9100 is in an insn following INSN in the same basic block. */
9103 last_use_this_basic_block (reg, insn)
9109 n && GET_CODE (n) != CODE_LABEL && GET_CODE (n) != JUMP_INSN;
9112 if (REGNO_LAST_UID (REGNO (reg)) == INSN_UID (n))
9118 /* Called via `note_stores' to record the initial value of a biv. Here we
9119 just record the location of the set and process it later. */
9122 record_initial (dest, set, data)
9125 void *data ATTRIBUTE_UNUSED;
9127 struct loop_ivs *ivs = (struct loop_ivs *) data;
9128 struct iv_class *bl;
9130 if (GET_CODE (dest) != REG
9131 || REGNO (dest) >= ivs->n_regs
9132 || REG_IV_TYPE (ivs, REGNO (dest)) != BASIC_INDUCT)
9135 bl = REG_IV_CLASS (ivs, REGNO (dest));
9137 /* If this is the first set found, record it. */
9138 if (bl->init_insn == 0)
9140 bl->init_insn = note_insn;
9145 /* If any of the registers in X are "old" and currently have a last use earlier
9146 than INSN, update them to have a last use of INSN. Their actual last use
9147 will be the previous insn but it will not have a valid uid_luid so we can't
9148 use it. X must be a source expression only. */
9151 update_reg_last_use (x, insn)
9155 /* Check for the case where INSN does not have a valid luid. In this case,
9156 there is no need to modify the regno_last_uid, as this can only happen
9157 when code is inserted after the loop_end to set a pseudo's final value,
9158 and hence this insn will never be the last use of x.
9159 ???? This comment is not correct. See for example loop_givs_reduce.
9160 This may insert an insn before another new insn. */
9161 if (GET_CODE (x) == REG && REGNO (x) < max_reg_before_loop
9162 && INSN_UID (insn) < max_uid_for_loop
9163 && REGNO_LAST_LUID (REGNO (x)) < INSN_LUID (insn))
9165 REGNO_LAST_UID (REGNO (x)) = INSN_UID (insn);
9170 const char *fmt = GET_RTX_FORMAT (GET_CODE (x));
9171 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
9174 update_reg_last_use (XEXP (x, i), insn);
9175 else if (fmt[i] == 'E')
9176 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
9177 update_reg_last_use (XVECEXP (x, i, j), insn);
9182 /* Given an insn INSN and condition COND, return the condition in a
9183 canonical form to simplify testing by callers. Specifically:
9185 (1) The code will always be a comparison operation (EQ, NE, GT, etc.).
9186 (2) Both operands will be machine operands; (cc0) will have been replaced.
9187 (3) If an operand is a constant, it will be the second operand.
9188 (4) (LE x const) will be replaced with (LT x <const+1>) and similarly
9189 for GE, GEU, and LEU.
9191 If the condition cannot be understood, or is an inequality floating-point
9192 comparison which needs to be reversed, 0 will be returned.
9194 If REVERSE is nonzero, then reverse the condition prior to canonizing it.
9196 If EARLIEST is nonzero, it is a pointer to a place where the earliest
9197 insn used in locating the condition was found. If a replacement test
9198 of the condition is desired, it should be placed in front of that
9199 insn and we will be sure that the inputs are still valid.
9201 If WANT_REG is nonzero, we wish the condition to be relative to that
9202 register, if possible. Therefore, do not canonicalize the condition
9206 canonicalize_condition (insn, cond, reverse, earliest, want_reg)
9218 int reverse_code = 0;
9219 enum machine_mode mode;
9221 code = GET_CODE (cond);
9222 mode = GET_MODE (cond);
9223 op0 = XEXP (cond, 0);
9224 op1 = XEXP (cond, 1);
9227 code = reversed_comparison_code (cond, insn);
9228 if (code == UNKNOWN)
9234 /* If we are comparing a register with zero, see if the register is set
9235 in the previous insn to a COMPARE or a comparison operation. Perform
9236 the same tests as a function of STORE_FLAG_VALUE as find_comparison_args
9239 while (GET_RTX_CLASS (code) == '<'
9240 && op1 == CONST0_RTX (GET_MODE (op0))
9243 /* Set nonzero when we find something of interest. */
9247 /* If comparison with cc0, import actual comparison from compare
9251 if ((prev = prev_nonnote_insn (prev)) == 0
9252 || GET_CODE (prev) != INSN
9253 || (set = single_set (prev)) == 0
9254 || SET_DEST (set) != cc0_rtx)
9257 op0 = SET_SRC (set);
9258 op1 = CONST0_RTX (GET_MODE (op0));
9264 /* If this is a COMPARE, pick up the two things being compared. */
9265 if (GET_CODE (op0) == COMPARE)
9267 op1 = XEXP (op0, 1);
9268 op0 = XEXP (op0, 0);
9271 else if (GET_CODE (op0) != REG)
9274 /* Go back to the previous insn. Stop if it is not an INSN. We also
9275 stop if it isn't a single set or if it has a REG_INC note because
9276 we don't want to bother dealing with it. */
9278 if ((prev = prev_nonnote_insn (prev)) == 0
9279 || GET_CODE (prev) != INSN
9280 || FIND_REG_INC_NOTE (prev, NULL_RTX))
9283 set = set_of (op0, prev);
9286 && (GET_CODE (set) != SET
9287 || !rtx_equal_p (SET_DEST (set), op0)))
9290 /* If this is setting OP0, get what it sets it to if it looks
9294 enum machine_mode inner_mode = GET_MODE (SET_DEST (set));
9295 #ifdef FLOAT_STORE_FLAG_VALUE
9296 REAL_VALUE_TYPE fsfv;
9299 /* ??? We may not combine comparisons done in a CCmode with
9300 comparisons not done in a CCmode. This is to aid targets
9301 like Alpha that have an IEEE compliant EQ instruction, and
9302 a non-IEEE compliant BEQ instruction. The use of CCmode is
9303 actually artificial, simply to prevent the combination, but
9304 should not affect other platforms.
9306 However, we must allow VOIDmode comparisons to match either
9307 CCmode or non-CCmode comparison, because some ports have
9308 modeless comparisons inside branch patterns.
9310 ??? This mode check should perhaps look more like the mode check
9311 in simplify_comparison in combine. */
9313 if ((GET_CODE (SET_SRC (set)) == COMPARE
9316 && GET_MODE_CLASS (inner_mode) == MODE_INT
9317 && (GET_MODE_BITSIZE (inner_mode)
9318 <= HOST_BITS_PER_WIDE_INT)
9319 && (STORE_FLAG_VALUE
9320 & ((HOST_WIDE_INT) 1
9321 << (GET_MODE_BITSIZE (inner_mode) - 1))))
9322 #ifdef FLOAT_STORE_FLAG_VALUE
9324 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
9325 && (fsfv = FLOAT_STORE_FLAG_VALUE (inner_mode),
9326 REAL_VALUE_NEGATIVE (fsfv)))
9329 && GET_RTX_CLASS (GET_CODE (SET_SRC (set))) == '<'))
9330 && (((GET_MODE_CLASS (mode) == MODE_CC)
9331 == (GET_MODE_CLASS (inner_mode) == MODE_CC))
9332 || mode == VOIDmode || inner_mode == VOIDmode))
9334 else if (((code == EQ
9336 && (GET_MODE_BITSIZE (inner_mode)
9337 <= HOST_BITS_PER_WIDE_INT)
9338 && GET_MODE_CLASS (inner_mode) == MODE_INT
9339 && (STORE_FLAG_VALUE
9340 & ((HOST_WIDE_INT) 1
9341 << (GET_MODE_BITSIZE (inner_mode) - 1))))
9342 #ifdef FLOAT_STORE_FLAG_VALUE
9344 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
9345 && (fsfv = FLOAT_STORE_FLAG_VALUE (inner_mode),
9346 REAL_VALUE_NEGATIVE (fsfv)))
9349 && GET_RTX_CLASS (GET_CODE (SET_SRC (set))) == '<'
9350 && (((GET_MODE_CLASS (mode) == MODE_CC)
9351 == (GET_MODE_CLASS (inner_mode) == MODE_CC))
9352 || mode == VOIDmode || inner_mode == VOIDmode))
9362 else if (reg_set_p (op0, prev))
9363 /* If this sets OP0, but not directly, we have to give up. */
9368 if (GET_RTX_CLASS (GET_CODE (x)) == '<')
9369 code = GET_CODE (x);
9372 code = reversed_comparison_code (x, prev);
9373 if (code == UNKNOWN)
9378 op0 = XEXP (x, 0), op1 = XEXP (x, 1);
9384 /* If constant is first, put it last. */
9385 if (CONSTANT_P (op0))
9386 code = swap_condition (code), tem = op0, op0 = op1, op1 = tem;
9388 /* If OP0 is the result of a comparison, we weren't able to find what
9389 was really being compared, so fail. */
9390 if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_CC)
9393 /* Canonicalize any ordered comparison with integers involving equality
9394 if we can do computations in the relevant mode and we do not
9397 if (GET_CODE (op1) == CONST_INT
9398 && GET_MODE (op0) != VOIDmode
9399 && GET_MODE_BITSIZE (GET_MODE (op0)) <= HOST_BITS_PER_WIDE_INT)
9401 HOST_WIDE_INT const_val = INTVAL (op1);
9402 unsigned HOST_WIDE_INT uconst_val = const_val;
9403 unsigned HOST_WIDE_INT max_val
9404 = (unsigned HOST_WIDE_INT) GET_MODE_MASK (GET_MODE (op0));
9409 if ((unsigned HOST_WIDE_INT) const_val != max_val >> 1)
9410 code = LT, op1 = gen_int_mode (const_val + 1, GET_MODE (op0));
9413 /* When cross-compiling, const_val might be sign-extended from
9414 BITS_PER_WORD to HOST_BITS_PER_WIDE_INT */
9416 if ((HOST_WIDE_INT) (const_val & max_val)
9417 != (((HOST_WIDE_INT) 1
9418 << (GET_MODE_BITSIZE (GET_MODE (op0)) - 1))))
9419 code = GT, op1 = gen_int_mode (const_val - 1, GET_MODE (op0));
9423 if (uconst_val < max_val)
9424 code = LTU, op1 = gen_int_mode (uconst_val + 1, GET_MODE (op0));
9428 if (uconst_val != 0)
9429 code = GTU, op1 = gen_int_mode (uconst_val - 1, GET_MODE (op0));
9438 /* Never return CC0; return zero instead. */
9443 return gen_rtx_fmt_ee (code, VOIDmode, op0, op1);
9446 /* Given a jump insn JUMP, return the condition that will cause it to branch
9447 to its JUMP_LABEL. If the condition cannot be understood, or is an
9448 inequality floating-point comparison which needs to be reversed, 0 will
9451 If EARLIEST is nonzero, it is a pointer to a place where the earliest
9452 insn used in locating the condition was found. If a replacement test
9453 of the condition is desired, it should be placed in front of that
9454 insn and we will be sure that the inputs are still valid. */
9457 get_condition (jump, earliest)
9465 /* If this is not a standard conditional jump, we can't parse it. */
9466 if (GET_CODE (jump) != JUMP_INSN
9467 || ! any_condjump_p (jump))
9469 set = pc_set (jump);
9471 cond = XEXP (SET_SRC (set), 0);
9473 /* If this branches to JUMP_LABEL when the condition is false, reverse
9476 = GET_CODE (XEXP (SET_SRC (set), 2)) == LABEL_REF
9477 && XEXP (XEXP (SET_SRC (set), 2), 0) == JUMP_LABEL (jump);
9479 return canonicalize_condition (jump, cond, reverse, earliest, NULL_RTX);
9482 /* Similar to above routine, except that we also put an invariant last
9483 unless both operands are invariants. */
9486 get_condition_for_loop (loop, x)
9487 const struct loop *loop;
9490 rtx comparison = get_condition (x, (rtx*) 0);
9493 || ! loop_invariant_p (loop, XEXP (comparison, 0))
9494 || loop_invariant_p (loop, XEXP (comparison, 1)))
9497 return gen_rtx_fmt_ee (swap_condition (GET_CODE (comparison)), VOIDmode,
9498 XEXP (comparison, 1), XEXP (comparison, 0));
9501 /* Scan the function and determine whether it has indirect (computed) jumps.
9503 This is taken mostly from flow.c; similar code exists elsewhere
9504 in the compiler. It may be useful to put this into rtlanal.c. */
9506 indirect_jump_in_function_p (start)
9511 for (insn = start; insn; insn = NEXT_INSN (insn))
9512 if (computed_jump_p (insn))
9518 /* Add MEM to the LOOP_MEMS array, if appropriate. See the
9519 documentation for LOOP_MEMS for the definition of `appropriate'.
9520 This function is called from prescan_loop via for_each_rtx. */
9523 insert_loop_mem (mem, data)
9525 void *data ATTRIBUTE_UNUSED;
9527 struct loop_info *loop_info = data;
9534 switch (GET_CODE (m))
9540 /* We're not interested in MEMs that are only clobbered. */
9544 /* We're not interested in the MEM associated with a
9545 CONST_DOUBLE, so there's no need to traverse into this. */
9549 /* We're not interested in any MEMs that only appear in notes. */
9553 /* This is not a MEM. */
9557 /* See if we've already seen this MEM. */
9558 for (i = 0; i < loop_info->mems_idx; ++i)
9559 if (rtx_equal_p (m, loop_info->mems[i].mem))
9561 if (GET_MODE (m) != GET_MODE (loop_info->mems[i].mem))
9562 /* The modes of the two memory accesses are different. If
9563 this happens, something tricky is going on, and we just
9564 don't optimize accesses to this MEM. */
9565 loop_info->mems[i].optimize = 0;
9570 /* Resize the array, if necessary. */
9571 if (loop_info->mems_idx == loop_info->mems_allocated)
9573 if (loop_info->mems_allocated != 0)
9574 loop_info->mems_allocated *= 2;
9576 loop_info->mems_allocated = 32;
9578 loop_info->mems = (loop_mem_info *)
9579 xrealloc (loop_info->mems,
9580 loop_info->mems_allocated * sizeof (loop_mem_info));
9583 /* Actually insert the MEM. */
9584 loop_info->mems[loop_info->mems_idx].mem = m;
9585 /* We can't hoist this MEM out of the loop if it's a BLKmode MEM
9586 because we can't put it in a register. We still store it in the
9587 table, though, so that if we see the same address later, but in a
9588 non-BLK mode, we'll not think we can optimize it at that point. */
9589 loop_info->mems[loop_info->mems_idx].optimize = (GET_MODE (m) != BLKmode);
9590 loop_info->mems[loop_info->mems_idx].reg = NULL_RTX;
9591 ++loop_info->mems_idx;
9597 /* Allocate REGS->ARRAY or reallocate it if it is too small.
9599 Increment REGS->ARRAY[I].SET_IN_LOOP at the index I of each
9600 register that is modified by an insn between FROM and TO. If the
9601 value of an element of REGS->array[I].SET_IN_LOOP becomes 127 or
9602 more, stop incrementing it, to avoid overflow.
9604 Store in REGS->ARRAY[I].SINGLE_USAGE the single insn in which
9605 register I is used, if it is only used once. Otherwise, it is set
9606 to 0 (for no uses) or const0_rtx for more than one use. This
9607 parameter may be zero, in which case this processing is not done.
9609 Set REGS->ARRAY[I].MAY_NOT_OPTIMIZE nonzero if we should not
9610 optimize register I. */
9613 loop_regs_scan (loop, extra_size)
9614 const struct loop *loop;
9617 struct loop_regs *regs = LOOP_REGS (loop);
9619 /* last_set[n] is nonzero iff reg n has been set in the current
9620 basic block. In that case, it is the insn that last set reg n. */
9625 old_nregs = regs->num;
9626 regs->num = max_reg_num ();
9628 /* Grow the regs array if not allocated or too small. */
9629 if (regs->num >= regs->size)
9631 regs->size = regs->num + extra_size;
9633 regs->array = (struct loop_reg *)
9634 xrealloc (regs->array, regs->size * sizeof (*regs->array));
9636 /* Zero the new elements. */
9637 memset (regs->array + old_nregs, 0,
9638 (regs->size - old_nregs) * sizeof (*regs->array));
9641 /* Clear previously scanned fields but do not clear n_times_set. */
9642 for (i = 0; i < old_nregs; i++)
9644 regs->array[i].set_in_loop = 0;
9645 regs->array[i].may_not_optimize = 0;
9646 regs->array[i].single_usage = NULL_RTX;
9649 last_set = (rtx *) xcalloc (regs->num, sizeof (rtx));
9651 /* Scan the loop, recording register usage. */
9652 for (insn = loop->top ? loop->top : loop->start; insn != loop->end;
9653 insn = NEXT_INSN (insn))
9657 /* Record registers that have exactly one use. */
9658 find_single_use_in_loop (regs, insn, PATTERN (insn));
9660 /* Include uses in REG_EQUAL notes. */
9661 if (REG_NOTES (insn))
9662 find_single_use_in_loop (regs, insn, REG_NOTES (insn));
9664 if (GET_CODE (PATTERN (insn)) == SET
9665 || GET_CODE (PATTERN (insn)) == CLOBBER)
9666 count_one_set (regs, insn, PATTERN (insn), last_set);
9667 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
9670 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
9671 count_one_set (regs, insn, XVECEXP (PATTERN (insn), 0, i),
9676 if (GET_CODE (insn) == CODE_LABEL || GET_CODE (insn) == JUMP_INSN)
9677 memset (last_set, 0, regs->num * sizeof (rtx));
9679 /* Invalidate all registers used for function argument passing.
9680 We check rtx_varies_p for the same reason as below, to allow
9681 optimizing PIC calculations. */
9682 if (GET_CODE (insn) == CALL_INSN)
9685 for (link = CALL_INSN_FUNCTION_USAGE (insn);
9687 link = XEXP (link, 1))
9691 if (GET_CODE (op = XEXP (link, 0)) == USE
9692 && GET_CODE (reg = XEXP (op, 0)) == REG
9693 && rtx_varies_p (reg, 1))
9694 regs->array[REGNO (reg)].may_not_optimize = 1;
9699 /* Invalidate all hard registers clobbered by calls. With one exception:
9700 a call-clobbered PIC register is still function-invariant for our
9701 purposes, since we can hoist any PIC calculations out of the loop.
9702 Thus the call to rtx_varies_p. */
9703 if (LOOP_INFO (loop)->has_call)
9704 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
9705 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i)
9706 && rtx_varies_p (regno_reg_rtx[i], 1))
9708 regs->array[i].may_not_optimize = 1;
9709 regs->array[i].set_in_loop = 1;
9712 #ifdef AVOID_CCMODE_COPIES
9713 /* Don't try to move insns which set CC registers if we should not
9714 create CCmode register copies. */
9715 for (i = regs->num - 1; i >= FIRST_PSEUDO_REGISTER; i--)
9716 if (GET_MODE_CLASS (GET_MODE (regno_reg_rtx[i])) == MODE_CC)
9717 regs->array[i].may_not_optimize = 1;
9720 /* Set regs->array[I].n_times_set for the new registers. */
9721 for (i = old_nregs; i < regs->num; i++)
9722 regs->array[i].n_times_set = regs->array[i].set_in_loop;
9727 /* Returns the number of real INSNs in the LOOP. */
9730 count_insns_in_loop (loop)
9731 const struct loop *loop;
9736 for (insn = loop->top ? loop->top : loop->start; insn != loop->end;
9737 insn = NEXT_INSN (insn))
9744 /* Move MEMs into registers for the duration of the loop. */
9748 const struct loop *loop;
9750 struct loop_info *loop_info = LOOP_INFO (loop);
9751 struct loop_regs *regs = LOOP_REGS (loop);
9752 int maybe_never = 0;
9754 rtx p, prev_ebb_head;
9755 rtx label = NULL_RTX;
9757 /* Nonzero if the next instruction may never be executed. */
9758 int next_maybe_never = 0;
9759 unsigned int last_max_reg = max_reg_num ();
9761 if (loop_info->mems_idx == 0)
9764 /* We cannot use next_label here because it skips over normal insns. */
9765 end_label = next_nonnote_insn (loop->end);
9766 if (end_label && GET_CODE (end_label) != CODE_LABEL)
9767 end_label = NULL_RTX;
9769 /* Check to see if it's possible that some instructions in the loop are
9770 never executed. Also check if there is a goto out of the loop other
9771 than right after the end of the loop. */
9772 for (p = next_insn_in_loop (loop, loop->scan_start);
9774 p = next_insn_in_loop (loop, p))
9776 if (GET_CODE (p) == CODE_LABEL)
9778 else if (GET_CODE (p) == JUMP_INSN
9779 /* If we enter the loop in the middle, and scan
9780 around to the beginning, don't set maybe_never
9781 for that. This must be an unconditional jump,
9782 otherwise the code at the top of the loop might
9783 never be executed. Unconditional jumps are
9784 followed a by barrier then loop end. */
9785 && ! (GET_CODE (p) == JUMP_INSN
9786 && JUMP_LABEL (p) == loop->top
9787 && NEXT_INSN (NEXT_INSN (p)) == loop->end
9788 && any_uncondjump_p (p)))
9790 /* If this is a jump outside of the loop but not right
9791 after the end of the loop, we would have to emit new fixup
9792 sequences for each such label. */
9793 if (/* If we can't tell where control might go when this
9794 JUMP_INSN is executed, we must be conservative. */
9796 || (JUMP_LABEL (p) != end_label
9797 && (INSN_UID (JUMP_LABEL (p)) >= max_uid_for_loop
9798 || INSN_LUID (JUMP_LABEL (p)) < INSN_LUID (loop->start)
9799 || INSN_LUID (JUMP_LABEL (p)) > INSN_LUID (loop->end))))
9802 if (!any_condjump_p (p))
9803 /* Something complicated. */
9806 /* If there are any more instructions in the loop, they
9807 might not be reached. */
9808 next_maybe_never = 1;
9810 else if (next_maybe_never)
9814 /* Find start of the extended basic block that enters the loop. */
9815 for (p = loop->start;
9816 PREV_INSN (p) && GET_CODE (p) != CODE_LABEL;
9823 /* Build table of mems that get set to constant values before the
9825 for (; p != loop->start; p = NEXT_INSN (p))
9826 cselib_process_insn (p);
9828 /* Actually move the MEMs. */
9829 for (i = 0; i < loop_info->mems_idx; ++i)
9831 regset_head load_copies;
9832 regset_head store_copies;
9835 rtx mem = loop_info->mems[i].mem;
9838 if (MEM_VOLATILE_P (mem)
9839 || loop_invariant_p (loop, XEXP (mem, 0)) != 1)
9840 /* There's no telling whether or not MEM is modified. */
9841 loop_info->mems[i].optimize = 0;
9843 /* Go through the MEMs written to in the loop to see if this
9844 one is aliased by one of them. */
9845 mem_list_entry = loop_info->store_mems;
9846 while (mem_list_entry)
9848 if (rtx_equal_p (mem, XEXP (mem_list_entry, 0)))
9850 else if (true_dependence (XEXP (mem_list_entry, 0), VOIDmode,
9853 /* MEM is indeed aliased by this store. */
9854 loop_info->mems[i].optimize = 0;
9857 mem_list_entry = XEXP (mem_list_entry, 1);
9860 if (flag_float_store && written
9861 && GET_MODE_CLASS (GET_MODE (mem)) == MODE_FLOAT)
9862 loop_info->mems[i].optimize = 0;
9864 /* If this MEM is written to, we must be sure that there
9865 are no reads from another MEM that aliases this one. */
9866 if (loop_info->mems[i].optimize && written)
9870 for (j = 0; j < loop_info->mems_idx; ++j)
9874 else if (true_dependence (mem,
9876 loop_info->mems[j].mem,
9879 /* It's not safe to hoist loop_info->mems[i] out of
9880 the loop because writes to it might not be
9881 seen by reads from loop_info->mems[j]. */
9882 loop_info->mems[i].optimize = 0;
9888 if (maybe_never && may_trap_p (mem))
9889 /* We can't access the MEM outside the loop; it might
9890 cause a trap that wouldn't have happened otherwise. */
9891 loop_info->mems[i].optimize = 0;
9893 if (!loop_info->mems[i].optimize)
9894 /* We thought we were going to lift this MEM out of the
9895 loop, but later discovered that we could not. */
9898 INIT_REG_SET (&load_copies);
9899 INIT_REG_SET (&store_copies);
9901 /* Allocate a pseudo for this MEM. We set REG_USERVAR_P in
9902 order to keep scan_loop from moving stores to this MEM
9903 out of the loop just because this REG is neither a
9904 user-variable nor used in the loop test. */
9905 reg = gen_reg_rtx (GET_MODE (mem));
9906 REG_USERVAR_P (reg) = 1;
9907 loop_info->mems[i].reg = reg;
9909 /* Now, replace all references to the MEM with the
9910 corresponding pseudos. */
9912 for (p = next_insn_in_loop (loop, loop->scan_start);
9914 p = next_insn_in_loop (loop, p))
9920 set = single_set (p);
9922 /* See if this copies the mem into a register that isn't
9923 modified afterwards. We'll try to do copy propagation
9924 a little further on. */
9926 /* @@@ This test is _way_ too conservative. */
9928 && GET_CODE (SET_DEST (set)) == REG
9929 && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER
9930 && REGNO (SET_DEST (set)) < last_max_reg
9931 && regs->array[REGNO (SET_DEST (set))].n_times_set == 1
9932 && rtx_equal_p (SET_SRC (set), mem))
9933 SET_REGNO_REG_SET (&load_copies, REGNO (SET_DEST (set)));
9935 /* See if this copies the mem from a register that isn't
9936 modified afterwards. We'll try to remove the
9937 redundant copy later on by doing a little register
9938 renaming and copy propagation. This will help
9939 to untangle things for the BIV detection code. */
9942 && GET_CODE (SET_SRC (set)) == REG
9943 && REGNO (SET_SRC (set)) >= FIRST_PSEUDO_REGISTER
9944 && REGNO (SET_SRC (set)) < last_max_reg
9945 && regs->array[REGNO (SET_SRC (set))].n_times_set == 1
9946 && rtx_equal_p (SET_DEST (set), mem))
9947 SET_REGNO_REG_SET (&store_copies, REGNO (SET_SRC (set)));
9949 /* If this is a call which uses / clobbers this memory
9950 location, we must not change the interface here. */
9951 if (GET_CODE (p) == CALL_INSN
9952 && reg_mentioned_p (loop_info->mems[i].mem,
9953 CALL_INSN_FUNCTION_USAGE (p)))
9956 loop_info->mems[i].optimize = 0;
9960 /* Replace the memory reference with the shadow register. */
9961 replace_loop_mems (p, loop_info->mems[i].mem,
9962 loop_info->mems[i].reg);
9965 if (GET_CODE (p) == CODE_LABEL
9966 || GET_CODE (p) == JUMP_INSN)
9970 if (! loop_info->mems[i].optimize)
9971 ; /* We found we couldn't do the replacement, so do nothing. */
9972 else if (! apply_change_group ())
9973 /* We couldn't replace all occurrences of the MEM. */
9974 loop_info->mems[i].optimize = 0;
9977 /* Load the memory immediately before LOOP->START, which is
9978 the NOTE_LOOP_BEG. */
9979 cselib_val *e = cselib_lookup (mem, VOIDmode, 0);
9983 struct elt_loc_list *const_equiv = 0;
9987 struct elt_loc_list *equiv;
9988 struct elt_loc_list *best_equiv = 0;
9989 for (equiv = e->locs; equiv; equiv = equiv->next)
9991 if (CONSTANT_P (equiv->loc))
9992 const_equiv = equiv;
9993 else if (GET_CODE (equiv->loc) == REG
9994 /* Extending hard register lifetimes causes crash
9995 on SRC targets. Doing so on non-SRC is
9996 probably also not good idea, since we most
9997 probably have pseudoregister equivalence as
9999 && REGNO (equiv->loc) >= FIRST_PSEUDO_REGISTER)
10000 best_equiv = equiv;
10002 /* Use the constant equivalence if that is cheap enough. */
10004 best_equiv = const_equiv;
10005 else if (const_equiv
10006 && (rtx_cost (const_equiv->loc, SET)
10007 <= rtx_cost (best_equiv->loc, SET)))
10009 best_equiv = const_equiv;
10013 /* If best_equiv is nonzero, we know that MEM is set to a
10014 constant or register before the loop. We will use this
10015 knowledge to initialize the shadow register with that
10016 constant or reg rather than by loading from MEM. */
10018 best = copy_rtx (best_equiv->loc);
10021 set = gen_move_insn (reg, best);
10022 set = loop_insn_hoist (loop, set);
10025 for (p = prev_ebb_head; p != loop->start; p = NEXT_INSN (p))
10026 if (REGNO_LAST_UID (REGNO (best)) == INSN_UID (p))
10028 REGNO_LAST_UID (REGNO (best)) = INSN_UID (set);
10034 set_unique_reg_note (set, REG_EQUAL, copy_rtx (const_equiv->loc));
10038 if (label == NULL_RTX)
10040 label = gen_label_rtx ();
10041 emit_label_after (label, loop->end);
10044 /* Store the memory immediately after END, which is
10045 the NOTE_LOOP_END. */
10046 set = gen_move_insn (copy_rtx (mem), reg);
10047 loop_insn_emit_after (loop, 0, label, set);
10050 if (loop_dump_stream)
10052 fprintf (loop_dump_stream, "Hoisted regno %d %s from ",
10053 REGNO (reg), (written ? "r/w" : "r/o"));
10054 print_rtl (loop_dump_stream, mem);
10055 fputc ('\n', loop_dump_stream);
10058 /* Attempt a bit of copy propagation. This helps untangle the
10059 data flow, and enables {basic,general}_induction_var to find
10061 EXECUTE_IF_SET_IN_REG_SET
10062 (&load_copies, FIRST_PSEUDO_REGISTER, j,
10064 try_copy_prop (loop, reg, j);
10066 CLEAR_REG_SET (&load_copies);
10068 EXECUTE_IF_SET_IN_REG_SET
10069 (&store_copies, FIRST_PSEUDO_REGISTER, j,
10071 try_swap_copy_prop (loop, reg, j);
10073 CLEAR_REG_SET (&store_copies);
10077 if (label != NULL_RTX && end_label != NULL_RTX)
10079 /* Now, we need to replace all references to the previous exit
10080 label with the new one. */
10085 for (p = loop->start; p != loop->end; p = NEXT_INSN (p))
10087 for_each_rtx (&p, replace_label, &rr);
10089 /* If this is a JUMP_INSN, then we also need to fix the JUMP_LABEL
10090 field. This is not handled by for_each_rtx because it doesn't
10091 handle unprinted ('0') fields. We need to update JUMP_LABEL
10092 because the immediately following unroll pass will use it.
10093 replace_label would not work anyways, because that only handles
10095 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p) == end_label)
10096 JUMP_LABEL (p) = label;
10103 /* For communication between note_reg_stored and its caller. */
10104 struct note_reg_stored_arg
10110 /* Called via note_stores, record in SET_SEEN whether X, which is written,
10111 is equal to ARG. */
10113 note_reg_stored (x, setter, arg)
10114 rtx x, setter ATTRIBUTE_UNUSED;
10117 struct note_reg_stored_arg *t = (struct note_reg_stored_arg *) arg;
10122 /* Try to replace every occurrence of pseudo REGNO with REPLACEMENT.
10123 There must be exactly one insn that sets this pseudo; it will be
10124 deleted if all replacements succeed and we can prove that the register
10125 is not used after the loop. */
10128 try_copy_prop (loop, replacement, regno)
10129 const struct loop *loop;
10131 unsigned int regno;
10133 /* This is the reg that we are copying from. */
10134 rtx reg_rtx = regno_reg_rtx[regno];
10137 /* These help keep track of whether we replaced all uses of the reg. */
10138 int replaced_last = 0;
10139 int store_is_first = 0;
10141 for (insn = next_insn_in_loop (loop, loop->scan_start);
10143 insn = next_insn_in_loop (loop, insn))
10147 /* Only substitute within one extended basic block from the initializing
10149 if (GET_CODE (insn) == CODE_LABEL && init_insn)
10152 if (! INSN_P (insn))
10155 /* Is this the initializing insn? */
10156 set = single_set (insn);
10158 && GET_CODE (SET_DEST (set)) == REG
10159 && REGNO (SET_DEST (set)) == regno)
10165 if (REGNO_FIRST_UID (regno) == INSN_UID (insn))
10166 store_is_first = 1;
10169 /* Only substitute after seeing the initializing insn. */
10170 if (init_insn && insn != init_insn)
10172 struct note_reg_stored_arg arg;
10174 replace_loop_regs (insn, reg_rtx, replacement);
10175 if (REGNO_LAST_UID (regno) == INSN_UID (insn))
10178 /* Stop replacing when REPLACEMENT is modified. */
10179 arg.reg = replacement;
10181 note_stores (PATTERN (insn), note_reg_stored, &arg);
10184 rtx note = find_reg_note (insn, REG_EQUAL, NULL);
10186 /* It is possible that we've turned previously valid REG_EQUAL to
10187 invalid, as we change the REGNO to REPLACEMENT and unlike REGNO,
10188 REPLACEMENT is modified, we get different meaning. */
10189 if (note && reg_mentioned_p (replacement, XEXP (note, 0)))
10190 remove_note (insn, note);
10197 if (apply_change_group ())
10199 if (loop_dump_stream)
10200 fprintf (loop_dump_stream, " Replaced reg %d", regno);
10201 if (store_is_first && replaced_last)
10206 /* Assume we're just deleting INIT_INSN. */
10208 /* Look for REG_RETVAL note. If we're deleting the end of
10209 the libcall sequence, the whole sequence can go. */
10210 retval_note = find_reg_note (init_insn, REG_RETVAL, NULL_RTX);
10211 /* If we found a REG_RETVAL note, find the first instruction
10212 in the sequence. */
10214 first = XEXP (retval_note, 0);
10216 /* Delete the instructions. */
10217 loop_delete_insns (first, init_insn);
10219 if (loop_dump_stream)
10220 fprintf (loop_dump_stream, ".\n");
10224 /* Replace all the instructions from FIRST up to and including LAST
10225 with NOTE_INSN_DELETED notes. */
10228 loop_delete_insns (first, last)
10234 if (loop_dump_stream)
10235 fprintf (loop_dump_stream, ", deleting init_insn (%d)",
10237 delete_insn (first);
10239 /* If this was the LAST instructions we're supposed to delete,
10244 first = NEXT_INSN (first);
10248 /* Try to replace occurrences of pseudo REGNO with REPLACEMENT within
10249 loop LOOP if the order of the sets of these registers can be
10250 swapped. There must be exactly one insn within the loop that sets
10251 this pseudo followed immediately by a move insn that sets
10252 REPLACEMENT with REGNO. */
10254 try_swap_copy_prop (loop, replacement, regno)
10255 const struct loop *loop;
10257 unsigned int regno;
10260 rtx set = NULL_RTX;
10261 unsigned int new_regno;
10263 new_regno = REGNO (replacement);
10265 for (insn = next_insn_in_loop (loop, loop->scan_start);
10267 insn = next_insn_in_loop (loop, insn))
10269 /* Search for the insn that copies REGNO to NEW_REGNO? */
10271 && (set = single_set (insn))
10272 && GET_CODE (SET_DEST (set)) == REG
10273 && REGNO (SET_DEST (set)) == new_regno
10274 && GET_CODE (SET_SRC (set)) == REG
10275 && REGNO (SET_SRC (set)) == regno)
10279 if (insn != NULL_RTX)
10284 /* Some DEF-USE info would come in handy here to make this
10285 function more general. For now, just check the previous insn
10286 which is the most likely candidate for setting REGNO. */
10288 prev_insn = PREV_INSN (insn);
10291 && (prev_set = single_set (prev_insn))
10292 && GET_CODE (SET_DEST (prev_set)) == REG
10293 && REGNO (SET_DEST (prev_set)) == regno)
10296 (set (reg regno) (expr))
10297 (set (reg new_regno) (reg regno))
10299 so try converting this to:
10300 (set (reg new_regno) (expr))
10301 (set (reg regno) (reg new_regno))
10303 The former construct is often generated when a global
10304 variable used for an induction variable is shadowed by a
10305 register (NEW_REGNO). The latter construct improves the
10306 chances of GIV replacement and BIV elimination. */
10308 validate_change (prev_insn, &SET_DEST (prev_set),
10310 validate_change (insn, &SET_DEST (set),
10312 validate_change (insn, &SET_SRC (set),
10315 if (apply_change_group ())
10317 if (loop_dump_stream)
10318 fprintf (loop_dump_stream,
10319 " Swapped set of reg %d at %d with reg %d at %d.\n",
10320 regno, INSN_UID (insn),
10321 new_regno, INSN_UID (prev_insn));
10323 /* Update first use of REGNO. */
10324 if (REGNO_FIRST_UID (regno) == INSN_UID (prev_insn))
10325 REGNO_FIRST_UID (regno) = INSN_UID (insn);
10327 /* Now perform copy propagation to hopefully
10328 remove all uses of REGNO within the loop. */
10329 try_copy_prop (loop, replacement, regno);
10335 /* Replace MEM with its associated pseudo register. This function is
10336 called from load_mems via for_each_rtx. DATA is actually a pointer
10337 to a structure describing the instruction currently being scanned
10338 and the MEM we are currently replacing. */
10341 replace_loop_mem (mem, data)
10345 loop_replace_args *args = (loop_replace_args *) data;
10351 switch (GET_CODE (m))
10357 /* We're not interested in the MEM associated with a
10358 CONST_DOUBLE, so there's no need to traverse into one. */
10362 /* This is not a MEM. */
10366 if (!rtx_equal_p (args->match, m))
10367 /* This is not the MEM we are currently replacing. */
10370 /* Actually replace the MEM. */
10371 validate_change (args->insn, mem, args->replacement, 1);
10377 replace_loop_mems (insn, mem, reg)
10382 loop_replace_args args;
10386 args.replacement = reg;
10388 for_each_rtx (&insn, replace_loop_mem, &args);
10391 /* Replace one register with another. Called through for_each_rtx; PX points
10392 to the rtx being scanned. DATA is actually a pointer to
10393 a structure of arguments. */
10396 replace_loop_reg (px, data)
10401 loop_replace_args *args = (loop_replace_args *) data;
10406 if (x == args->match)
10407 validate_change (args->insn, px, args->replacement, 1);
10413 replace_loop_regs (insn, reg, replacement)
10418 loop_replace_args args;
10422 args.replacement = replacement;
10424 for_each_rtx (&insn, replace_loop_reg, &args);
10427 /* Replace occurrences of the old exit label for the loop with the new
10428 one. DATA is an rtx_pair containing the old and new labels,
10432 replace_label (x, data)
10437 rtx old_label = ((rtx_pair *) data)->r1;
10438 rtx new_label = ((rtx_pair *) data)->r2;
10443 if (GET_CODE (l) != LABEL_REF)
10446 if (XEXP (l, 0) != old_label)
10449 XEXP (l, 0) = new_label;
10450 ++LABEL_NUSES (new_label);
10451 --LABEL_NUSES (old_label);
10456 /* Emit insn for PATTERN after WHERE_INSN in basic block WHERE_BB
10457 (ignored in the interim). */
10460 loop_insn_emit_after (loop, where_bb, where_insn, pattern)
10461 const struct loop *loop ATTRIBUTE_UNUSED;
10462 basic_block where_bb ATTRIBUTE_UNUSED;
10466 return emit_insn_after (pattern, where_insn);
10470 /* If WHERE_INSN is nonzero emit insn for PATTERN before WHERE_INSN
10471 in basic block WHERE_BB (ignored in the interim) within the loop
10472 otherwise hoist PATTERN into the loop pre-header. */
10475 loop_insn_emit_before (loop, where_bb, where_insn, pattern)
10476 const struct loop *loop;
10477 basic_block where_bb ATTRIBUTE_UNUSED;
10482 return loop_insn_hoist (loop, pattern);
10483 return emit_insn_before (pattern, where_insn);
10487 /* Emit call insn for PATTERN before WHERE_INSN in basic block
10488 WHERE_BB (ignored in the interim) within the loop. */
10491 loop_call_insn_emit_before (loop, where_bb, where_insn, pattern)
10492 const struct loop *loop ATTRIBUTE_UNUSED;
10493 basic_block where_bb ATTRIBUTE_UNUSED;
10497 return emit_call_insn_before (pattern, where_insn);
10501 /* Hoist insn for PATTERN into the loop pre-header. */
10504 loop_insn_hoist (loop, pattern)
10505 const struct loop *loop;
10508 return loop_insn_emit_before (loop, 0, loop->start, pattern);
10512 /* Hoist call insn for PATTERN into the loop pre-header. */
10515 loop_call_insn_hoist (loop, pattern)
10516 const struct loop *loop;
10519 return loop_call_insn_emit_before (loop, 0, loop->start, pattern);
10523 /* Sink insn for PATTERN after the loop end. */
10526 loop_insn_sink (loop, pattern)
10527 const struct loop *loop;
10530 return loop_insn_emit_before (loop, 0, loop->sink, pattern);
10533 /* bl->final_value can be eighter general_operand or PLUS of general_operand
10534 and constant. Emit sequence of instructions to load it into REG. */
10536 gen_load_of_final_value (reg, final_value)
10537 rtx reg, final_value;
10541 final_value = force_operand (final_value, reg);
10542 if (final_value != reg)
10543 emit_move_insn (reg, final_value);
10544 seq = get_insns ();
10549 /* If the loop has multiple exits, emit insn for PATTERN before the
10550 loop to ensure that it will always be executed no matter how the
10551 loop exits. Otherwise, emit the insn for PATTERN after the loop,
10552 since this is slightly more efficient. */
10555 loop_insn_sink_or_swim (loop, pattern)
10556 const struct loop *loop;
10559 if (loop->exit_count)
10560 return loop_insn_hoist (loop, pattern);
10562 return loop_insn_sink (loop, pattern);
10566 loop_ivs_dump (loop, file, verbose)
10567 const struct loop *loop;
10571 struct iv_class *bl;
10574 if (! loop || ! file)
10577 for (bl = LOOP_IVS (loop)->list; bl; bl = bl->next)
10580 fprintf (file, "Loop %d: %d IV classes\n", loop->num, iv_num);
10582 for (bl = LOOP_IVS (loop)->list; bl; bl = bl->next)
10584 loop_iv_class_dump (bl, file, verbose);
10585 fputc ('\n', file);
10591 loop_iv_class_dump (bl, file, verbose)
10592 const struct iv_class *bl;
10594 int verbose ATTRIBUTE_UNUSED;
10596 struct induction *v;
10600 if (! bl || ! file)
10603 fprintf (file, "IV class for reg %d, benefit %d\n",
10604 bl->regno, bl->total_benefit);
10606 fprintf (file, " Init insn %d", INSN_UID (bl->init_insn));
10607 if (bl->initial_value)
10609 fprintf (file, ", init val: ");
10610 print_simple_rtl (file, bl->initial_value);
10612 if (bl->initial_test)
10614 fprintf (file, ", init test: ");
10615 print_simple_rtl (file, bl->initial_test);
10617 fputc ('\n', file);
10619 if (bl->final_value)
10621 fprintf (file, " Final val: ");
10622 print_simple_rtl (file, bl->final_value);
10623 fputc ('\n', file);
10626 if ((incr = biv_total_increment (bl)))
10628 fprintf (file, " Total increment: ");
10629 print_simple_rtl (file, incr);
10630 fputc ('\n', file);
10633 /* List the increments. */
10634 for (i = 0, v = bl->biv; v; v = v->next_iv, i++)
10636 fprintf (file, " Inc%d: insn %d, incr: ", i, INSN_UID (v->insn));
10637 print_simple_rtl (file, v->add_val);
10638 fputc ('\n', file);
10641 /* List the givs. */
10642 for (i = 0, v = bl->giv; v; v = v->next_iv, i++)
10644 fprintf (file, " Giv%d: insn %d, benefit %d, ",
10645 i, INSN_UID (v->insn), v->benefit);
10646 if (v->giv_type == DEST_ADDR)
10647 print_simple_rtl (file, v->mem);
10649 print_simple_rtl (file, single_set (v->insn));
10650 fputc ('\n', file);
10656 loop_biv_dump (v, file, verbose)
10657 const struct induction *v;
10666 REGNO (v->dest_reg), INSN_UID (v->insn));
10667 fprintf (file, " const ");
10668 print_simple_rtl (file, v->add_val);
10670 if (verbose && v->final_value)
10672 fputc ('\n', file);
10673 fprintf (file, " final ");
10674 print_simple_rtl (file, v->final_value);
10677 fputc ('\n', file);
10682 loop_giv_dump (v, file, verbose)
10683 const struct induction *v;
10690 if (v->giv_type == DEST_REG)
10691 fprintf (file, "Giv %d: insn %d",
10692 REGNO (v->dest_reg), INSN_UID (v->insn));
10694 fprintf (file, "Dest address: insn %d",
10695 INSN_UID (v->insn));
10697 fprintf (file, " src reg %d benefit %d",
10698 REGNO (v->src_reg), v->benefit);
10699 fprintf (file, " lifetime %d",
10702 if (v->replaceable)
10703 fprintf (file, " replaceable");
10705 if (v->no_const_addval)
10706 fprintf (file, " ncav");
10708 if (v->ext_dependent)
10710 switch (GET_CODE (v->ext_dependent))
10713 fprintf (file, " ext se");
10716 fprintf (file, " ext ze");
10719 fprintf (file, " ext tr");
10726 fputc ('\n', file);
10727 fprintf (file, " mult ");
10728 print_simple_rtl (file, v->mult_val);
10730 fputc ('\n', file);
10731 fprintf (file, " add ");
10732 print_simple_rtl (file, v->add_val);
10734 if (verbose && v->final_value)
10736 fputc ('\n', file);
10737 fprintf (file, " final ");
10738 print_simple_rtl (file, v->final_value);
10741 fputc ('\n', file);
10747 const struct loop *loop;
10749 loop_ivs_dump (loop, stderr, 1);
10754 debug_iv_class (bl)
10755 const struct iv_class *bl;
10757 loop_iv_class_dump (bl, stderr, 1);
10763 const struct induction *v;
10765 loop_biv_dump (v, stderr, 1);
10771 const struct induction *v;
10773 loop_giv_dump (v, stderr, 1);
10777 #define LOOP_BLOCK_NUM_1(INSN) \
10778 ((INSN) ? (BLOCK_FOR_INSN (INSN) ? BLOCK_NUM (INSN) : - 1) : -1)
10780 /* The notes do not have an assigned block, so look at the next insn. */
10781 #define LOOP_BLOCK_NUM(INSN) \
10782 ((INSN) ? (GET_CODE (INSN) == NOTE \
10783 ? LOOP_BLOCK_NUM_1 (next_nonnote_insn (INSN)) \
10784 : LOOP_BLOCK_NUM_1 (INSN)) \
10787 #define LOOP_INSN_UID(INSN) ((INSN) ? INSN_UID (INSN) : -1)
10790 loop_dump_aux (loop, file, verbose)
10791 const struct loop *loop;
10793 int verbose ATTRIBUTE_UNUSED;
10797 if (! loop || ! file)
10800 /* Print diagnostics to compare our concept of a loop with
10801 what the loop notes say. */
10802 if (! PREV_INSN (loop->first->head)
10803 || GET_CODE (PREV_INSN (loop->first->head)) != NOTE
10804 || NOTE_LINE_NUMBER (PREV_INSN (loop->first->head))
10805 != NOTE_INSN_LOOP_BEG)
10806 fprintf (file, ";; No NOTE_INSN_LOOP_BEG at %d\n",
10807 INSN_UID (PREV_INSN (loop->first->head)));
10808 if (! NEXT_INSN (loop->last->end)
10809 || GET_CODE (NEXT_INSN (loop->last->end)) != NOTE
10810 || NOTE_LINE_NUMBER (NEXT_INSN (loop->last->end))
10811 != NOTE_INSN_LOOP_END)
10812 fprintf (file, ";; No NOTE_INSN_LOOP_END at %d\n",
10813 INSN_UID (NEXT_INSN (loop->last->end)));
10818 ";; start %d (%d), cont dom %d (%d), cont %d (%d), vtop %d (%d), end %d (%d)\n",
10819 LOOP_BLOCK_NUM (loop->start),
10820 LOOP_INSN_UID (loop->start),
10821 LOOP_BLOCK_NUM (loop->cont),
10822 LOOP_INSN_UID (loop->cont),
10823 LOOP_BLOCK_NUM (loop->cont),
10824 LOOP_INSN_UID (loop->cont),
10825 LOOP_BLOCK_NUM (loop->vtop),
10826 LOOP_INSN_UID (loop->vtop),
10827 LOOP_BLOCK_NUM (loop->end),
10828 LOOP_INSN_UID (loop->end));
10829 fprintf (file, ";; top %d (%d), scan start %d (%d)\n",
10830 LOOP_BLOCK_NUM (loop->top),
10831 LOOP_INSN_UID (loop->top),
10832 LOOP_BLOCK_NUM (loop->scan_start),
10833 LOOP_INSN_UID (loop->scan_start));
10834 fprintf (file, ";; exit_count %d", loop->exit_count);
10835 if (loop->exit_count)
10837 fputs (", labels:", file);
10838 for (label = loop->exit_labels; label; label = LABEL_NEXTREF (label))
10840 fprintf (file, " %d ",
10841 LOOP_INSN_UID (XEXP (label, 0)));
10844 fputs ("\n", file);
10846 /* This can happen when a marked loop appears as two nested loops,
10847 say from while (a || b) {}. The inner loop won't match
10848 the loop markers but the outer one will. */
10849 if (LOOP_BLOCK_NUM (loop->cont) != loop->latch->index)
10850 fprintf (file, ";; NOTE_INSN_LOOP_CONT not in loop latch\n");
10854 /* Call this function from the debugger to dump LOOP. */
10858 const struct loop *loop;
10860 flow_loop_dump (loop, stderr, loop_dump_aux, 1);
10863 /* Call this function from the debugger to dump LOOPS. */
10866 debug_loops (loops)
10867 const struct loops *loops;
10869 flow_loops_dump (loops, stderr, loop_dump_aux, 1);