1 /* Perform various loop optimizations, including strength reduction.
2 Copyright (C) 1987, 1988, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
22 /* This is the loop optimization pass of the compiler.
23 It finds invariant computations within loops and moves them
24 to the beginning of the loop. Then it identifies basic and
25 general induction variables. Strength reduction is applied to the general
26 induction variables, and induction variable elimination is applied to
27 the basic induction variables.
29 It also finds cases where
30 a register is set within the loop by zero-extending a narrower value
31 and changes these to zero the entire register once before the loop
32 and merely copy the low part within the loop.
34 Most of the complexity is in heuristics to decide when it is worth
35 while to do these things. */
44 #include "hard-reg-set.h"
45 #include "basic-block.h"
46 #include "insn-config.h"
47 #include "insn-flags.h"
57 /* Vector mapping INSN_UIDs to luids.
58 The luids are like uids but increase monotonically always.
59 We use them to see whether a jump comes from outside a given loop. */
63 /* Indexed by INSN_UID, contains the ordinal giving the (innermost) loop
64 number the insn is contained in. */
66 struct loop **uid_loop;
68 /* 1 + largest uid of any insn. */
72 /* 1 + luid of last insn. */
76 /* Number of loops detected in current function. Used as index to the
79 static int max_loop_num;
81 /* Bound on pseudo register number before loop optimization.
82 A pseudo has valid regscan info if its number is < max_reg_before_loop. */
83 unsigned int max_reg_before_loop;
85 /* The value to pass to the next call of reg_scan_update. */
86 static int loop_max_reg;
88 #define obstack_chunk_alloc xmalloc
89 #define obstack_chunk_free free
91 /* During the analysis of a loop, a chain of `struct movable's
92 is made to record all the movable insns found.
93 Then the entire chain can be scanned to decide which to move. */
97 rtx insn; /* A movable insn */
98 rtx set_src; /* The expression this reg is set from. */
99 rtx set_dest; /* The destination of this SET. */
100 rtx dependencies; /* When INSN is libcall, this is an EXPR_LIST
101 of any registers used within the LIBCALL. */
102 int consec; /* Number of consecutive following insns
103 that must be moved with this one. */
104 unsigned int regno; /* The register it sets */
105 short lifetime; /* lifetime of that register;
106 may be adjusted when matching movables
107 that load the same value are found. */
108 short savings; /* Number of insns we can move for this reg,
109 including other movables that force this
110 or match this one. */
111 unsigned int cond : 1; /* 1 if only conditionally movable */
112 unsigned int force : 1; /* 1 means MUST move this insn */
113 unsigned int global : 1; /* 1 means reg is live outside this loop */
114 /* If PARTIAL is 1, GLOBAL means something different:
115 that the reg is live outside the range from where it is set
116 to the following label. */
117 unsigned int done : 1; /* 1 inhibits further processing of this */
119 unsigned int partial : 1; /* 1 means this reg is used for zero-extending.
120 In particular, moving it does not make it
122 unsigned int move_insn : 1; /* 1 means that we call emit_move_insn to
123 load SRC, rather than copying INSN. */
124 unsigned int move_insn_first:1;/* Same as above, if this is necessary for the
125 first insn of a consecutive sets group. */
126 unsigned int is_equiv : 1; /* 1 means a REG_EQUIV is present on INSN. */
127 enum machine_mode savemode; /* Nonzero means it is a mode for a low part
128 that we should avoid changing when clearing
129 the rest of the reg. */
130 struct movable *match; /* First entry for same value */
131 struct movable *forces; /* An insn that must be moved if this is */
132 struct movable *next;
137 /* Head of movable chain. */
138 struct movable *head;
139 /* Last movable in chain. */
140 struct movable *last;
141 /* Number of movables in the loop. */
145 static struct movables the_movables;
147 FILE *loop_dump_stream;
149 /* Forward declarations. */
151 static void find_and_verify_loops PARAMS ((rtx, struct loops *));
152 static void mark_loop_jump PARAMS ((rtx, struct loop *));
153 static void prescan_loop PARAMS ((struct loop *));
154 static int reg_in_basic_block_p PARAMS ((rtx, rtx));
155 static int consec_sets_invariant_p PARAMS ((const struct loop *,
157 static int labels_in_range_p PARAMS ((rtx, int));
158 static void count_one_set PARAMS ((struct loop_regs *, rtx, rtx,
159 varray_type, rtx *));
161 static void count_loop_regs_set PARAMS ((const struct loop*,
162 varray_type, varray_type,
164 static void note_addr_stored PARAMS ((rtx, rtx, void *));
165 static void note_set_pseudo_multiple_uses PARAMS ((rtx, rtx, void *));
166 static int loop_reg_used_before_p PARAMS ((const struct loop *, rtx, rtx));
167 static void scan_loop PARAMS ((struct loop*, int));
169 static void replace_call_address PARAMS ((rtx, rtx, rtx));
171 static rtx skip_consec_insns PARAMS ((rtx, int));
172 static int libcall_benefit PARAMS ((rtx));
173 static void ignore_some_movables PARAMS ((struct movables *));
174 static void force_movables PARAMS ((struct movables *));
175 static void combine_movables PARAMS ((struct movables *, struct loop_regs *));
176 static int regs_match_p PARAMS ((rtx, rtx, struct movables *));
177 static int rtx_equal_for_loop_p PARAMS ((rtx, rtx, struct movables *,
178 struct loop_regs *));
179 static void add_label_notes PARAMS ((rtx, rtx));
180 static void move_movables PARAMS ((struct loop *loop, struct movables *,
182 static int count_nonfixed_reads PARAMS ((const struct loop *, rtx));
183 static void strength_reduce PARAMS ((struct loop *, int, int));
184 static void find_single_use_in_loop PARAMS ((rtx, rtx, varray_type));
185 static int valid_initial_value_p PARAMS ((rtx, rtx, int, rtx));
186 static void find_mem_givs PARAMS ((const struct loop *, rtx, rtx, int, int));
187 static void record_biv PARAMS ((struct loop *, struct induction *,
188 rtx, rtx, rtx, rtx, rtx *,
190 static void check_final_value PARAMS ((const struct loop *,
191 struct induction *));
192 static void record_giv PARAMS ((const struct loop *, struct induction *,
193 rtx, rtx, rtx, rtx, rtx, rtx, int,
194 enum g_types, int, int, rtx *));
195 static void update_giv_derive PARAMS ((const struct loop *, rtx));
196 static void check_ext_dependant_givs PARAMS ((struct iv_class *,
197 struct loop_info *));
198 static int basic_induction_var PARAMS ((const struct loop *, rtx,
199 enum machine_mode, rtx, rtx,
200 rtx *, rtx *, rtx **));
201 static rtx simplify_giv_expr PARAMS ((const struct loop *, rtx, rtx *, int *));
202 static int general_induction_var PARAMS ((const struct loop *loop, rtx, rtx *,
203 rtx *, rtx *, rtx *, int, int *,
205 static int consec_sets_giv PARAMS ((const struct loop *, int, rtx,
206 rtx, rtx, rtx *, rtx *, rtx *, rtx *));
207 static int check_dbra_loop PARAMS ((struct loop *, int));
208 static rtx express_from_1 PARAMS ((rtx, rtx, rtx));
209 static rtx combine_givs_p PARAMS ((struct induction *, struct induction *));
210 static int cmp_combine_givs_stats PARAMS ((const PTR, const PTR));
211 static void combine_givs PARAMS ((struct loop_regs *, struct iv_class *));
212 static int product_cheap_p PARAMS ((rtx, rtx));
213 static int maybe_eliminate_biv PARAMS ((const struct loop *, struct iv_class *,
215 static int maybe_eliminate_biv_1 PARAMS ((const struct loop *, rtx, rtx,
216 struct iv_class *, int, rtx));
217 static int last_use_this_basic_block PARAMS ((rtx, rtx));
218 static void record_initial PARAMS ((rtx, rtx, void *));
219 static void update_reg_last_use PARAMS ((rtx, rtx));
220 static rtx next_insn_in_loop PARAMS ((const struct loop *, rtx));
221 static void load_mems_and_recount_loop_regs_set PARAMS ((const struct loop*,
223 static void load_mems PARAMS ((const struct loop *));
224 static int insert_loop_mem PARAMS ((rtx *, void *));
225 static int replace_loop_mem PARAMS ((rtx *, void *));
226 static void replace_loop_mems PARAMS ((rtx, rtx, rtx));
227 static int replace_loop_reg PARAMS ((rtx *, void *));
228 static void replace_loop_regs PARAMS ((rtx insn, rtx, rtx));
229 static void note_reg_stored PARAMS ((rtx, rtx, void *));
230 static void try_copy_prop PARAMS ((const struct loop *, rtx, unsigned int));
231 static void try_swap_copy_prop PARAMS ((const struct loop *, rtx,
233 static int replace_label PARAMS ((rtx *, void *));
234 static rtx check_insn_for_givs PARAMS((struct loop *, rtx, int, int));
235 static rtx check_insn_for_bivs PARAMS((struct loop *, rtx, int, int));
236 static int iv_add_mult_cost PARAMS ((rtx, rtx, rtx, rtx));
238 static void loop_dump_aux PARAMS ((const struct loop *, FILE *, int));
239 void debug_loop PARAMS ((const struct loop *));
241 typedef struct rtx_pair
247 typedef struct loop_replace_args
254 /* Nonzero iff INSN is between START and END, inclusive. */
255 #define INSN_IN_RANGE_P(INSN, START, END) \
256 (INSN_UID (INSN) < max_uid_for_loop \
257 && INSN_LUID (INSN) >= INSN_LUID (START) \
258 && INSN_LUID (INSN) <= INSN_LUID (END))
260 /* Indirect_jump_in_function is computed once per function. */
261 static int indirect_jump_in_function;
262 static int indirect_jump_in_function_p PARAMS ((rtx));
264 static int compute_luids PARAMS ((rtx, rtx, int));
266 static int biv_elimination_giv_has_0_offset PARAMS ((struct induction *,
270 /* Benefit penalty, if a giv is not replaceable, i.e. must emit an insn to
271 copy the value of the strength reduced giv to its original register. */
272 static int copy_cost;
274 /* Cost of using a register, to normalize the benefits of a giv. */
275 static int reg_address_cost;
280 rtx reg = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 1);
282 reg_address_cost = address_cost (reg, SImode);
284 copy_cost = COSTS_N_INSNS (1);
287 /* Compute the mapping from uids to luids.
288 LUIDs are numbers assigned to insns, like uids,
289 except that luids increase monotonically through the code.
290 Start at insn START and stop just before END. Assign LUIDs
291 starting with PREV_LUID + 1. Return the last assigned LUID + 1. */
293 compute_luids (start, end, prev_luid)
300 for (insn = start, i = prev_luid; insn != end; insn = NEXT_INSN (insn))
302 if (INSN_UID (insn) >= max_uid_for_loop)
304 /* Don't assign luids to line-number NOTEs, so that the distance in
305 luids between two insns is not affected by -g. */
306 if (GET_CODE (insn) != NOTE
307 || NOTE_LINE_NUMBER (insn) <= 0)
308 uid_luid[INSN_UID (insn)] = ++i;
310 /* Give a line number note the same luid as preceding insn. */
311 uid_luid[INSN_UID (insn)] = i;
316 /* Entry point of this file. Perform loop optimization
317 on the current function. F is the first insn of the function
318 and DUMPFILE is a stream for output of a trace of actions taken
319 (or 0 if none should be output). */
322 loop_optimize (f, dumpfile, flags)
323 /* f is the first instruction of a chain of insns for one function */
330 struct loops loops_data;
331 struct loops *loops = &loops_data;
332 struct loop_info *loops_info;
333 static char *moved_once;
335 loop_dump_stream = dumpfile;
337 init_recog_no_volatile ();
339 max_reg_before_loop = max_reg_num ();
340 loop_max_reg = max_reg_before_loop;
344 /* Count the number of loops. */
347 for (insn = f; insn; insn = NEXT_INSN (insn))
349 if (GET_CODE (insn) == NOTE
350 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
354 /* Don't waste time if no loops. */
355 if (max_loop_num == 0)
358 loops->num = max_loop_num;
360 moved_once = (char *) xcalloc (max_reg_before_loop, sizeof (char));
362 /* Get size to use for tables indexed by uids.
363 Leave some space for labels allocated by find_and_verify_loops. */
364 max_uid_for_loop = get_max_uid () + 1 + max_loop_num * 32;
366 uid_luid = (int *) xcalloc (max_uid_for_loop, sizeof (int));
367 uid_loop = (struct loop **) xcalloc (max_uid_for_loop,
368 sizeof (struct loop *));
370 /* Allocate storage for array of loops. */
371 loops->array = (struct loop *)
372 xcalloc (loops->num, sizeof (struct loop));
374 /* Find and process each loop.
375 First, find them, and record them in order of their beginnings. */
376 find_and_verify_loops (f, loops);
378 /* Allocate and initialize auxiliary loop information. */
379 loops_info = xcalloc (loops->num, sizeof (struct loop_info));
380 for (i = 0; i < loops->num; i++)
381 loops->array[i].aux = loops_info + i;
383 /* Now find all register lifetimes. This must be done after
384 find_and_verify_loops, because it might reorder the insns in the
386 reg_scan (f, max_reg_before_loop, 1);
388 /* This must occur after reg_scan so that registers created by gcse
389 will have entries in the register tables.
391 We could have added a call to reg_scan after gcse_main in toplev.c,
392 but moving this call to init_alias_analysis is more efficient. */
393 init_alias_analysis ();
395 /* See if we went too far. Note that get_max_uid already returns
396 one more that the maximum uid of all insn. */
397 if (get_max_uid () > max_uid_for_loop)
399 /* Now reset it to the actual size we need. See above. */
400 max_uid_for_loop = get_max_uid ();
402 /* find_and_verify_loops has already called compute_luids, but it
403 might have rearranged code afterwards, so we need to recompute
405 max_luid = compute_luids (f, NULL_RTX, 0);
407 /* Don't leave gaps in uid_luid for insns that have been
408 deleted. It is possible that the first or last insn
409 using some register has been deleted by cross-jumping.
410 Make sure that uid_luid for that former insn's uid
411 points to the general area where that insn used to be. */
412 for (i = 0; i < max_uid_for_loop; i++)
414 uid_luid[0] = uid_luid[i];
415 if (uid_luid[0] != 0)
418 for (i = 0; i < max_uid_for_loop; i++)
419 if (uid_luid[i] == 0)
420 uid_luid[i] = uid_luid[i - 1];
422 /* Determine if the function has indirect jump. On some systems
423 this prevents low overhead loop instructions from being used. */
424 indirect_jump_in_function = indirect_jump_in_function_p (f);
426 /* Now scan the loops, last ones first, since this means inner ones are done
427 before outer ones. */
428 for (i = max_loop_num - 1; i >= 0; i--)
430 struct loop *loop = &loops->array[i];
431 struct loop_regs *regs = LOOP_REGS (loop);
433 regs->moved_once = moved_once;
435 if (! loop->invalid && loop->end)
436 scan_loop (loop, flags);
439 /* If there were lexical blocks inside the loop, they have been
440 replicated. We will now have more than one NOTE_INSN_BLOCK_BEG
441 and NOTE_INSN_BLOCK_END for each such block. We must duplicate
442 the BLOCKs as well. */
443 if (write_symbols != NO_DEBUG)
446 end_alias_analysis ();
456 /* Returns the next insn, in execution order, after INSN. START and
457 END are the NOTE_INSN_LOOP_BEG and NOTE_INSN_LOOP_END for the loop,
458 respectively. LOOP->TOP, if non-NULL, is the top of the loop in the
459 insn-stream; it is used with loops that are entered near the
463 next_insn_in_loop (loop, insn)
464 const struct loop *loop;
467 insn = NEXT_INSN (insn);
469 if (insn == loop->end)
472 /* Go to the top of the loop, and continue there. */
479 if (insn == loop->scan_start)
486 /* Optimize one loop described by LOOP. */
488 /* ??? Could also move memory writes out of loops if the destination address
489 is invariant, the source is invariant, the memory write is not volatile,
490 and if we can prove that no read inside the loop can read this address
491 before the write occurs. If there is a read of this address after the
492 write, then we can also mark the memory read as invariant. */
495 scan_loop (loop, flags)
499 struct loop_info *loop_info = LOOP_INFO (loop);
500 struct loop_regs *regs = LOOP_REGS (loop);
502 rtx loop_start = loop->start;
503 rtx loop_end = loop->end;
505 /* 1 if we are scanning insns that could be executed zero times. */
507 /* 1 if we are scanning insns that might never be executed
508 due to a subroutine call which might exit before they are reached. */
510 /* Jump insn that enters the loop, or 0 if control drops in. */
511 rtx loop_entry_jump = 0;
512 /* Number of insns in the loop. */
515 rtx temp, update_start, update_end;
516 /* The SET from an insn, if it is the only SET in the insn. */
518 /* Chain describing insns movable in current loop. */
519 struct movables *movables = &the_movables;
520 /* Ratio of extra register life span we can justify
521 for saving an instruction. More if loop doesn't call subroutines
522 since in that case saving an insn makes more difference
523 and more registers are available. */
525 /* Nonzero if we are scanning instructions in a sub-loop. */
535 /* Determine whether this loop starts with a jump down to a test at
536 the end. This will occur for a small number of loops with a test
537 that is too complex to duplicate in front of the loop.
539 We search for the first insn or label in the loop, skipping NOTEs.
540 However, we must be careful not to skip past a NOTE_INSN_LOOP_BEG
541 (because we might have a loop executed only once that contains a
542 loop which starts with a jump to its exit test) or a NOTE_INSN_LOOP_END
543 (in case we have a degenerate loop).
545 Note that if we mistakenly think that a loop is entered at the top
546 when, in fact, it is entered at the exit test, the only effect will be
547 slightly poorer optimization. Making the opposite error can generate
548 incorrect code. Since very few loops now start with a jump to the
549 exit test, the code here to detect that case is very conservative. */
551 for (p = NEXT_INSN (loop_start);
553 && GET_CODE (p) != CODE_LABEL && ! INSN_P (p)
554 && (GET_CODE (p) != NOTE
555 || (NOTE_LINE_NUMBER (p) != NOTE_INSN_LOOP_BEG
556 && NOTE_LINE_NUMBER (p) != NOTE_INSN_LOOP_END));
560 loop->scan_start = p;
562 /* Set up variables describing this loop. */
564 threshold = (loop_info->has_call ? 1 : 2) * (1 + n_non_fixed_regs);
566 /* If loop has a jump before the first label,
567 the true entry is the target of that jump.
568 Start scan from there.
569 But record in LOOP->TOP the place where the end-test jumps
570 back to so we can scan that after the end of the loop. */
571 if (GET_CODE (p) == JUMP_INSN)
575 /* Loop entry must be unconditional jump (and not a RETURN) */
576 if (any_uncondjump_p (p)
577 && JUMP_LABEL (p) != 0
578 /* Check to see whether the jump actually
579 jumps out of the loop (meaning it's no loop).
580 This case can happen for things like
581 do {..} while (0). If this label was generated previously
582 by loop, we can't tell anything about it and have to reject
584 && INSN_IN_RANGE_P (JUMP_LABEL (p), loop_start, loop_end))
586 loop->top = next_label (loop->scan_start);
587 loop->scan_start = JUMP_LABEL (p);
591 /* If LOOP->SCAN_START was an insn created by loop, we don't know its luid
592 as required by loop_reg_used_before_p. So skip such loops. (This
593 test may never be true, but it's best to play it safe.)
595 Also, skip loops where we do not start scanning at a label. This
596 test also rejects loops starting with a JUMP_INSN that failed the
599 if (INSN_UID (loop->scan_start) >= max_uid_for_loop
600 || GET_CODE (loop->scan_start) != CODE_LABEL)
602 if (loop_dump_stream)
603 fprintf (loop_dump_stream, "\nLoop from %d to %d is phony.\n\n",
604 INSN_UID (loop_start), INSN_UID (loop_end));
608 /* Count number of times each reg is set during this loop. Set
609 VARRAY_CHAR (regs->may_not_optimize, I) if it is not safe to move
610 out the setting of register I. Set VARRAY_RTX
611 (regs->single_usage, I). */
613 /* Allocate extra space for REGS that might be created by
614 load_mems. We allocate a little extra slop as well, in the hopes
615 that even after the moving of movables creates some new registers
616 we won't have to reallocate these arrays. However, we do grow
617 the arrays, if necessary, in load_mems_recount_loop_regs_set. */
618 nregs = max_reg_num () + loop_info->mems_idx + 16;
619 VARRAY_INT_INIT (regs->set_in_loop, nregs, "set_in_loop");
620 VARRAY_INT_INIT (regs->n_times_set, nregs, "n_times_set");
621 VARRAY_CHAR_INIT (regs->may_not_optimize, nregs, "may_not_optimize");
622 VARRAY_RTX_INIT (regs->single_usage, nregs, "single_usage");
626 count_loop_regs_set (loop, regs->may_not_optimize, regs->single_usage,
629 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
631 VARRAY_CHAR (regs->may_not_optimize, i) = 1;
632 VARRAY_INT (regs->set_in_loop, i) = 1;
635 #ifdef AVOID_CCMODE_COPIES
636 /* Don't try to move insns which set CC registers if we should not
637 create CCmode register copies. */
638 for (i = max_reg_num () - 1; i >= FIRST_PSEUDO_REGISTER; i--)
639 if (GET_MODE_CLASS (GET_MODE (regno_reg_rtx[i])) == MODE_CC)
640 VARRAY_CHAR (regs->may_not_optimize, i) = 1;
643 bcopy ((char *) ®s->set_in_loop->data,
644 (char *) ®s->n_times_set->data, nregs * sizeof (int));
646 if (loop_dump_stream)
648 fprintf (loop_dump_stream, "\nLoop from %d to %d: %d real insns.\n",
649 INSN_UID (loop_start), INSN_UID (loop_end), insn_count);
651 fprintf (loop_dump_stream, "Continue at insn %d.\n",
652 INSN_UID (loop->cont));
655 /* Scan through the loop finding insns that are safe to move.
656 Set regs->set_in_loop negative for the reg being set, so that
657 this reg will be considered invariant for subsequent insns.
658 We consider whether subsequent insns use the reg
659 in deciding whether it is worth actually moving.
661 MAYBE_NEVER is nonzero if we have passed a conditional jump insn
662 and therefore it is possible that the insns we are scanning
663 would never be executed. At such times, we must make sure
664 that it is safe to execute the insn once instead of zero times.
665 When MAYBE_NEVER is 0, all insns will be executed at least once
666 so that is not a problem. */
668 for (p = next_insn_in_loop (loop, loop->scan_start);
670 p = next_insn_in_loop (loop, p))
672 if (GET_CODE (p) == INSN
673 && (set = single_set (p))
674 && GET_CODE (SET_DEST (set)) == REG
675 && ! VARRAY_CHAR (regs->may_not_optimize, REGNO (SET_DEST (set))))
680 rtx src = SET_SRC (set);
681 rtx dependencies = 0;
683 /* Figure out what to use as a source of this insn. If a REG_EQUIV
684 note is given or if a REG_EQUAL note with a constant operand is
685 specified, use it as the source and mark that we should move
686 this insn by calling emit_move_insn rather that duplicating the
689 Otherwise, only use the REG_EQUAL contents if a REG_RETVAL note
691 temp = find_reg_note (p, REG_EQUIV, NULL_RTX);
693 src = XEXP (temp, 0), move_insn = 1;
696 temp = find_reg_note (p, REG_EQUAL, NULL_RTX);
697 if (temp && CONSTANT_P (XEXP (temp, 0)))
698 src = XEXP (temp, 0), move_insn = 1;
699 if (temp && find_reg_note (p, REG_RETVAL, NULL_RTX))
701 src = XEXP (temp, 0);
702 /* A libcall block can use regs that don't appear in
703 the equivalent expression. To move the libcall,
704 we must move those regs too. */
705 dependencies = libcall_other_reg (p, src);
709 /* Don't try to optimize a register that was made
710 by loop-optimization for an inner loop.
711 We don't know its life-span, so we can't compute the benefit. */
712 if (REGNO (SET_DEST (set)) >= max_reg_before_loop)
714 else if (/* The register is used in basic blocks other
715 than the one where it is set (meaning that
716 something after this point in the loop might
717 depend on its value before the set). */
718 ! reg_in_basic_block_p (p, SET_DEST (set))
719 /* And the set is not guaranteed to be executed one
720 the loop starts, or the value before the set is
721 needed before the set occurs...
723 ??? Note we have quadratic behaviour here, mitigated
724 by the fact that the previous test will often fail for
725 large loops. Rather than re-scanning the entire loop
726 each time for register usage, we should build tables
727 of the register usage and use them here instead. */
729 || loop_reg_used_before_p (loop, set, p)))
730 /* It is unsafe to move the set.
732 This code used to consider it OK to move a set of a variable
733 which was not created by the user and not used in an exit test.
734 That behavior is incorrect and was removed. */
736 else if ((tem = loop_invariant_p (loop, src))
737 && (dependencies == 0
738 || (tem2 = loop_invariant_p (loop, dependencies)) != 0)
739 && (VARRAY_INT (regs->set_in_loop,
740 REGNO (SET_DEST (set))) == 1
742 = consec_sets_invariant_p
743 (loop, SET_DEST (set),
744 VARRAY_INT (regs->set_in_loop,
745 REGNO (SET_DEST (set))),
747 /* If the insn can cause a trap (such as divide by zero),
748 can't move it unless it's guaranteed to be executed
749 once loop is entered. Even a function call might
750 prevent the trap insn from being reached
751 (since it might exit!) */
752 && ! ((maybe_never || call_passed)
753 && may_trap_p (src)))
755 register struct movable *m;
756 register int regno = REGNO (SET_DEST (set));
758 /* A potential lossage is where we have a case where two insns
759 can be combined as long as they are both in the loop, but
760 we move one of them outside the loop. For large loops,
761 this can lose. The most common case of this is the address
762 of a function being called.
764 Therefore, if this register is marked as being used exactly
765 once if we are in a loop with calls (a "large loop"), see if
766 we can replace the usage of this register with the source
767 of this SET. If we can, delete this insn.
769 Don't do this if P has a REG_RETVAL note or if we have
770 SMALL_REGISTER_CLASSES and SET_SRC is a hard register. */
772 if (loop_info->has_call
773 && VARRAY_RTX (regs->single_usage, regno) != 0
774 && VARRAY_RTX (regs->single_usage, regno) != const0_rtx
775 && REGNO_FIRST_UID (regno) == INSN_UID (p)
776 && (REGNO_LAST_UID (regno)
777 == INSN_UID (VARRAY_RTX (regs->single_usage, regno)))
778 && VARRAY_INT (regs->set_in_loop, regno) == 1
779 && ! side_effects_p (SET_SRC (set))
780 && ! find_reg_note (p, REG_RETVAL, NULL_RTX)
781 && (! SMALL_REGISTER_CLASSES
782 || (! (GET_CODE (SET_SRC (set)) == REG
783 && REGNO (SET_SRC (set)) < FIRST_PSEUDO_REGISTER)))
784 /* This test is not redundant; SET_SRC (set) might be
785 a call-clobbered register and the life of REGNO
786 might span a call. */
787 && ! modified_between_p (SET_SRC (set), p,
789 (regs->single_usage, regno))
790 && no_labels_between_p (p, VARRAY_RTX (regs->single_usage,
792 && validate_replace_rtx (SET_DEST (set), SET_SRC (set),
794 (regs->single_usage, regno)))
796 /* Replace any usage in a REG_EQUAL note. Must copy the
797 new source, so that we don't get rtx sharing between the
798 SET_SOURCE and REG_NOTES of insn p. */
799 REG_NOTES (VARRAY_RTX (regs->single_usage, regno))
800 = replace_rtx (REG_NOTES (VARRAY_RTX
801 (regs->single_usage, regno)),
802 SET_DEST (set), copy_rtx (SET_SRC (set)));
805 NOTE_LINE_NUMBER (p) = NOTE_INSN_DELETED;
806 NOTE_SOURCE_FILE (p) = 0;
807 VARRAY_INT (regs->set_in_loop, regno) = 0;
811 m = (struct movable *) alloca (sizeof (struct movable));
815 m->dependencies = dependencies;
816 m->set_dest = SET_DEST (set);
818 m->consec = VARRAY_INT (regs->set_in_loop,
819 REGNO (SET_DEST (set))) - 1;
823 m->move_insn = move_insn;
824 m->move_insn_first = 0;
825 m->is_equiv = (find_reg_note (p, REG_EQUIV, NULL_RTX) != 0);
826 m->savemode = VOIDmode;
828 /* Set M->cond if either loop_invariant_p
829 or consec_sets_invariant_p returned 2
830 (only conditionally invariant). */
831 m->cond = ((tem | tem1 | tem2) > 1);
832 m->global = (uid_luid[REGNO_LAST_UID (regno)]
833 > INSN_LUID (loop_end)
834 || uid_luid[REGNO_FIRST_UID (regno)] < INSN_LUID (loop_start));
836 m->lifetime = (uid_luid[REGNO_LAST_UID (regno)]
837 - uid_luid[REGNO_FIRST_UID (regno)]);
838 m->savings = VARRAY_INT (regs->n_times_set, regno);
839 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
840 m->savings += libcall_benefit (p);
841 VARRAY_INT (regs->set_in_loop, regno) = move_insn ? -2 : -1;
842 /* Add M to the end of the chain MOVABLES. */
843 if (movables->head == 0)
846 movables->last->next = m;
851 /* It is possible for the first instruction to have a
852 REG_EQUAL note but a non-invariant SET_SRC, so we must
853 remember the status of the first instruction in case
854 the last instruction doesn't have a REG_EQUAL note. */
855 m->move_insn_first = m->move_insn;
857 /* Skip this insn, not checking REG_LIBCALL notes. */
858 p = next_nonnote_insn (p);
859 /* Skip the consecutive insns, if there are any. */
860 p = skip_consec_insns (p, m->consec);
861 /* Back up to the last insn of the consecutive group. */
862 p = prev_nonnote_insn (p);
864 /* We must now reset m->move_insn, m->is_equiv, and possibly
865 m->set_src to correspond to the effects of all the
867 temp = find_reg_note (p, REG_EQUIV, NULL_RTX);
869 m->set_src = XEXP (temp, 0), m->move_insn = 1;
872 temp = find_reg_note (p, REG_EQUAL, NULL_RTX);
873 if (temp && CONSTANT_P (XEXP (temp, 0)))
874 m->set_src = XEXP (temp, 0), m->move_insn = 1;
879 m->is_equiv = (find_reg_note (p, REG_EQUIV, NULL_RTX) != 0);
882 /* If this register is always set within a STRICT_LOW_PART
883 or set to zero, then its high bytes are constant.
884 So clear them outside the loop and within the loop
885 just load the low bytes.
886 We must check that the machine has an instruction to do so.
887 Also, if the value loaded into the register
888 depends on the same register, this cannot be done. */
889 else if (SET_SRC (set) == const0_rtx
890 && GET_CODE (NEXT_INSN (p)) == INSN
891 && (set1 = single_set (NEXT_INSN (p)))
892 && GET_CODE (set1) == SET
893 && (GET_CODE (SET_DEST (set1)) == STRICT_LOW_PART)
894 && (GET_CODE (XEXP (SET_DEST (set1), 0)) == SUBREG)
895 && (SUBREG_REG (XEXP (SET_DEST (set1), 0))
897 && !reg_mentioned_p (SET_DEST (set), SET_SRC (set1)))
899 register int regno = REGNO (SET_DEST (set));
900 if (VARRAY_INT (regs->set_in_loop, regno) == 2)
902 register struct movable *m;
903 m = (struct movable *) alloca (sizeof (struct movable));
906 m->set_dest = SET_DEST (set);
913 m->move_insn_first = 0;
915 /* If the insn may not be executed on some cycles,
916 we can't clear the whole reg; clear just high part.
917 Not even if the reg is used only within this loop.
924 Clearing x before the inner loop could clobber a value
925 being saved from the last time around the outer loop.
926 However, if the reg is not used outside this loop
927 and all uses of the register are in the same
928 basic block as the store, there is no problem.
930 If this insn was made by loop, we don't know its
931 INSN_LUID and hence must make a conservative
933 m->global = (INSN_UID (p) >= max_uid_for_loop
934 || (uid_luid[REGNO_LAST_UID (regno)]
935 > INSN_LUID (loop_end))
936 || (uid_luid[REGNO_FIRST_UID (regno)]
938 || (labels_in_range_p
939 (p, uid_luid[REGNO_FIRST_UID (regno)])));
940 if (maybe_never && m->global)
941 m->savemode = GET_MODE (SET_SRC (set1));
943 m->savemode = VOIDmode;
947 m->lifetime = (uid_luid[REGNO_LAST_UID (regno)]
948 - uid_luid[REGNO_FIRST_UID (regno)]);
950 VARRAY_INT (regs->set_in_loop, regno) = -1;
951 /* Add M to the end of the chain MOVABLES. */
952 if (movables->head == 0)
955 movables->last->next = m;
960 /* Past a call insn, we get to insns which might not be executed
961 because the call might exit. This matters for insns that trap.
962 Constant and pure call insns always return, so they don't count. */
963 else if (GET_CODE (p) == CALL_INSN && ! CONST_CALL_P (p))
965 /* Past a label or a jump, we get to insns for which we
966 can't count on whether or how many times they will be
967 executed during each iteration. Therefore, we can
968 only move out sets of trivial variables
969 (those not used after the loop). */
970 /* Similar code appears twice in strength_reduce. */
971 else if ((GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN)
972 /* If we enter the loop in the middle, and scan around to the
973 beginning, don't set maybe_never for that. This must be an
974 unconditional jump, otherwise the code at the top of the
975 loop might never be executed. Unconditional jumps are
976 followed a by barrier then loop end. */
977 && ! (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p) == loop->top
978 && NEXT_INSN (NEXT_INSN (p)) == loop_end
979 && any_uncondjump_p (p)))
981 else if (GET_CODE (p) == NOTE)
983 /* At the virtual top of a converted loop, insns are again known to
984 be executed: logically, the loop begins here even though the exit
985 code has been duplicated. */
986 if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP && loop_depth == 0)
987 maybe_never = call_passed = 0;
988 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
990 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
995 /* If one movable subsumes another, ignore that other. */
997 ignore_some_movables (movables);
999 /* For each movable insn, see if the reg that it loads
1000 leads when it dies right into another conditionally movable insn.
1001 If so, record that the second insn "forces" the first one,
1002 since the second can be moved only if the first is. */
1004 force_movables (movables);
1006 /* See if there are multiple movable insns that load the same value.
1007 If there are, make all but the first point at the first one
1008 through the `match' field, and add the priorities of them
1009 all together as the priority of the first. */
1011 combine_movables (movables, regs);
1013 /* Now consider each movable insn to decide whether it is worth moving.
1014 Store 0 in regs->set_in_loop for each reg that is moved.
1016 Generally this increases code size, so do not move moveables when
1017 optimizing for code size. */
1019 if (! optimize_size)
1020 move_movables (loop, movables, threshold, insn_count);
1022 /* Now candidates that still are negative are those not moved.
1023 Change regs->set_in_loop to indicate that those are not actually
1025 for (i = 0; i < nregs; i++)
1026 if (VARRAY_INT (regs->set_in_loop, i) < 0)
1027 VARRAY_INT (regs->set_in_loop, i) = VARRAY_INT (regs->n_times_set, i);
1029 /* Now that we've moved some things out of the loop, we might be able to
1030 hoist even more memory references. */
1031 load_mems_and_recount_loop_regs_set (loop, &insn_count);
1033 for (update_start = loop_start;
1034 PREV_INSN (update_start)
1035 && GET_CODE (PREV_INSN (update_start)) != CODE_LABEL;
1036 update_start = PREV_INSN (update_start))
1038 update_end = NEXT_INSN (loop_end);
1040 reg_scan_update (update_start, update_end, loop_max_reg);
1041 loop_max_reg = max_reg_num ();
1043 if (flag_strength_reduce)
1045 if (update_end && GET_CODE (update_end) == CODE_LABEL)
1046 /* Ensure our label doesn't go away. */
1047 LABEL_NUSES (update_end)++;
1049 strength_reduce (loop, insn_count, flags);
1051 reg_scan_update (update_start, update_end, loop_max_reg);
1052 loop_max_reg = max_reg_num ();
1054 if (update_end && GET_CODE (update_end) == CODE_LABEL
1055 && --LABEL_NUSES (update_end) == 0)
1056 delete_insn (update_end);
1059 VARRAY_FREE (regs->single_usage);
1060 VARRAY_FREE (regs->set_in_loop);
1061 VARRAY_FREE (regs->n_times_set);
1062 VARRAY_FREE (regs->may_not_optimize);
1065 /* Add elements to *OUTPUT to record all the pseudo-regs
1066 mentioned in IN_THIS but not mentioned in NOT_IN_THIS. */
1069 record_excess_regs (in_this, not_in_this, output)
1070 rtx in_this, not_in_this;
1077 code = GET_CODE (in_this);
1091 if (REGNO (in_this) >= FIRST_PSEUDO_REGISTER
1092 && ! reg_mentioned_p (in_this, not_in_this))
1093 *output = gen_rtx_EXPR_LIST (VOIDmode, in_this, *output);
1100 fmt = GET_RTX_FORMAT (code);
1101 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1108 for (j = 0; j < XVECLEN (in_this, i); j++)
1109 record_excess_regs (XVECEXP (in_this, i, j), not_in_this, output);
1113 record_excess_regs (XEXP (in_this, i), not_in_this, output);
1119 /* Check what regs are referred to in the libcall block ending with INSN,
1120 aside from those mentioned in the equivalent value.
1121 If there are none, return 0.
1122 If there are one or more, return an EXPR_LIST containing all of them. */
1125 libcall_other_reg (insn, equiv)
1128 rtx note = find_reg_note (insn, REG_RETVAL, NULL_RTX);
1129 rtx p = XEXP (note, 0);
1132 /* First, find all the regs used in the libcall block
1133 that are not mentioned as inputs to the result. */
1137 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
1138 || GET_CODE (p) == CALL_INSN)
1139 record_excess_regs (PATTERN (p), equiv, &output);
1146 /* Return 1 if all uses of REG
1147 are between INSN and the end of the basic block. */
1150 reg_in_basic_block_p (insn, reg)
1153 int regno = REGNO (reg);
1156 if (REGNO_FIRST_UID (regno) != INSN_UID (insn))
1159 /* Search this basic block for the already recorded last use of the reg. */
1160 for (p = insn; p; p = NEXT_INSN (p))
1162 switch (GET_CODE (p))
1169 /* Ordinary insn: if this is the last use, we win. */
1170 if (REGNO_LAST_UID (regno) == INSN_UID (p))
1175 /* Jump insn: if this is the last use, we win. */
1176 if (REGNO_LAST_UID (regno) == INSN_UID (p))
1178 /* Otherwise, it's the end of the basic block, so we lose. */
1183 /* It's the end of the basic block, so we lose. */
1191 /* The "last use" that was recorded can't be found after the first
1192 use. This can happen when the last use was deleted while
1193 processing an inner loop, this inner loop was then completely
1194 unrolled, and the outer loop is always exited after the inner loop,
1195 so that everything after the first use becomes a single basic block. */
1199 /* Compute the benefit of eliminating the insns in the block whose
1200 last insn is LAST. This may be a group of insns used to compute a
1201 value directly or can contain a library call. */
1204 libcall_benefit (last)
1210 for (insn = XEXP (find_reg_note (last, REG_RETVAL, NULL_RTX), 0);
1211 insn != last; insn = NEXT_INSN (insn))
1213 if (GET_CODE (insn) == CALL_INSN)
1214 benefit += 10; /* Assume at least this many insns in a library
1216 else if (GET_CODE (insn) == INSN
1217 && GET_CODE (PATTERN (insn)) != USE
1218 && GET_CODE (PATTERN (insn)) != CLOBBER)
1225 /* Skip COUNT insns from INSN, counting library calls as 1 insn. */
1228 skip_consec_insns (insn, count)
1232 for (; count > 0; count--)
1236 /* If first insn of libcall sequence, skip to end. */
1237 /* Do this at start of loop, since INSN is guaranteed to
1239 if (GET_CODE (insn) != NOTE
1240 && (temp = find_reg_note (insn, REG_LIBCALL, NULL_RTX)))
1241 insn = XEXP (temp, 0);
1244 insn = NEXT_INSN (insn);
1245 while (GET_CODE (insn) == NOTE);
1251 /* Ignore any movable whose insn falls within a libcall
1252 which is part of another movable.
1253 We make use of the fact that the movable for the libcall value
1254 was made later and so appears later on the chain. */
1257 ignore_some_movables (movables)
1258 struct movables *movables;
1260 register struct movable *m, *m1;
1262 for (m = movables->head; m; m = m->next)
1264 /* Is this a movable for the value of a libcall? */
1265 rtx note = find_reg_note (m->insn, REG_RETVAL, NULL_RTX);
1269 /* Check for earlier movables inside that range,
1270 and mark them invalid. We cannot use LUIDs here because
1271 insns created by loop.c for prior loops don't have LUIDs.
1272 Rather than reject all such insns from movables, we just
1273 explicitly check each insn in the libcall (since invariant
1274 libcalls aren't that common). */
1275 for (insn = XEXP (note, 0); insn != m->insn; insn = NEXT_INSN (insn))
1276 for (m1 = movables->head; m1 != m; m1 = m1->next)
1277 if (m1->insn == insn)
1283 /* For each movable insn, see if the reg that it loads
1284 leads when it dies right into another conditionally movable insn.
1285 If so, record that the second insn "forces" the first one,
1286 since the second can be moved only if the first is. */
1289 force_movables (movables)
1290 struct movables *movables;
1292 register struct movable *m, *m1;
1293 for (m1 = movables->head; m1; m1 = m1->next)
1294 /* Omit this if moving just the (SET (REG) 0) of a zero-extend. */
1295 if (!m1->partial && !m1->done)
1297 int regno = m1->regno;
1298 for (m = m1->next; m; m = m->next)
1299 /* ??? Could this be a bug? What if CSE caused the
1300 register of M1 to be used after this insn?
1301 Since CSE does not update regno_last_uid,
1302 this insn M->insn might not be where it dies.
1303 But very likely this doesn't matter; what matters is
1304 that M's reg is computed from M1's reg. */
1305 if (INSN_UID (m->insn) == REGNO_LAST_UID (regno)
1308 if (m != 0 && m->set_src == m1->set_dest
1309 /* If m->consec, m->set_src isn't valid. */
1313 /* Increase the priority of the moving the first insn
1314 since it permits the second to be moved as well. */
1318 m1->lifetime += m->lifetime;
1319 m1->savings += m->savings;
1324 /* Find invariant expressions that are equal and can be combined into
1328 combine_movables (movables, regs)
1329 struct movables *movables;
1330 struct loop_regs *regs;
1332 register struct movable *m;
1333 char *matched_regs = (char *) xmalloc (regs->num);
1334 enum machine_mode mode;
1336 /* Regs that are set more than once are not allowed to match
1337 or be matched. I'm no longer sure why not. */
1338 /* Perhaps testing m->consec_sets would be more appropriate here? */
1340 for (m = movables->head; m; m = m->next)
1341 if (m->match == 0 && VARRAY_INT (regs->n_times_set, m->regno) == 1
1344 register struct movable *m1;
1345 int regno = m->regno;
1347 memset (matched_regs, 0, regs->num);
1348 matched_regs[regno] = 1;
1350 /* We want later insns to match the first one. Don't make the first
1351 one match any later ones. So start this loop at m->next. */
1352 for (m1 = m->next; m1; m1 = m1->next)
1353 if (m != m1 && m1->match == 0 && VARRAY_INT (regs->n_times_set,
1355 /* A reg used outside the loop mustn't be eliminated. */
1357 /* A reg used for zero-extending mustn't be eliminated. */
1359 && (matched_regs[m1->regno]
1362 /* Can combine regs with different modes loaded from the
1363 same constant only if the modes are the same or
1364 if both are integer modes with M wider or the same
1365 width as M1. The check for integer is redundant, but
1366 safe, since the only case of differing destination
1367 modes with equal sources is when both sources are
1368 VOIDmode, i.e., CONST_INT. */
1369 (GET_MODE (m->set_dest) == GET_MODE (m1->set_dest)
1370 || (GET_MODE_CLASS (GET_MODE (m->set_dest)) == MODE_INT
1371 && GET_MODE_CLASS (GET_MODE (m1->set_dest)) == MODE_INT
1372 && (GET_MODE_BITSIZE (GET_MODE (m->set_dest))
1373 >= GET_MODE_BITSIZE (GET_MODE (m1->set_dest)))))
1374 /* See if the source of M1 says it matches M. */
1375 && ((GET_CODE (m1->set_src) == REG
1376 && matched_regs[REGNO (m1->set_src)])
1377 || rtx_equal_for_loop_p (m->set_src, m1->set_src,
1379 && ((m->dependencies == m1->dependencies)
1380 || rtx_equal_p (m->dependencies, m1->dependencies)))
1382 m->lifetime += m1->lifetime;
1383 m->savings += m1->savings;
1386 matched_regs[m1->regno] = 1;
1390 /* Now combine the regs used for zero-extension.
1391 This can be done for those not marked `global'
1392 provided their lives don't overlap. */
1394 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
1395 mode = GET_MODE_WIDER_MODE (mode))
1397 register struct movable *m0 = 0;
1399 /* Combine all the registers for extension from mode MODE.
1400 Don't combine any that are used outside this loop. */
1401 for (m = movables->head; m; m = m->next)
1402 if (m->partial && ! m->global
1403 && mode == GET_MODE (SET_SRC (PATTERN (NEXT_INSN (m->insn)))))
1405 register struct movable *m1;
1406 int first = uid_luid[REGNO_FIRST_UID (m->regno)];
1407 int last = uid_luid[REGNO_LAST_UID (m->regno)];
1411 /* First one: don't check for overlap, just record it. */
1416 /* Make sure they extend to the same mode.
1417 (Almost always true.) */
1418 if (GET_MODE (m->set_dest) != GET_MODE (m0->set_dest))
1421 /* We already have one: check for overlap with those
1422 already combined together. */
1423 for (m1 = movables->head; m1 != m; m1 = m1->next)
1424 if (m1 == m0 || (m1->partial && m1->match == m0))
1425 if (! (uid_luid[REGNO_FIRST_UID (m1->regno)] > last
1426 || uid_luid[REGNO_LAST_UID (m1->regno)] < first))
1429 /* No overlap: we can combine this with the others. */
1430 m0->lifetime += m->lifetime;
1431 m0->savings += m->savings;
1441 free (matched_regs);
1444 /* Return 1 if regs X and Y will become the same if moved. */
1447 regs_match_p (x, y, movables)
1449 struct movables *movables;
1451 unsigned int xn = REGNO (x);
1452 unsigned int yn = REGNO (y);
1453 struct movable *mx, *my;
1455 for (mx = movables->head; mx; mx = mx->next)
1456 if (mx->regno == xn)
1459 for (my = movables->head; my; my = my->next)
1460 if (my->regno == yn)
1464 && ((mx->match == my->match && mx->match != 0)
1466 || mx == my->match));
1469 /* Return 1 if X and Y are identical-looking rtx's.
1470 This is the Lisp function EQUAL for rtx arguments.
1472 If two registers are matching movables or a movable register and an
1473 equivalent constant, consider them equal. */
1476 rtx_equal_for_loop_p (x, y, movables, regs)
1478 struct movables *movables;
1479 struct loop_regs *regs;
1483 register struct movable *m;
1484 register enum rtx_code code;
1485 register const char *fmt;
1489 if (x == 0 || y == 0)
1492 code = GET_CODE (x);
1494 /* If we have a register and a constant, they may sometimes be
1496 if (GET_CODE (x) == REG && VARRAY_INT (regs->set_in_loop, REGNO (x)) == -2
1499 for (m = movables->head; m; m = m->next)
1500 if (m->move_insn && m->regno == REGNO (x)
1501 && rtx_equal_p (m->set_src, y))
1504 else if (GET_CODE (y) == REG && VARRAY_INT (regs->set_in_loop,
1508 for (m = movables->head; m; m = m->next)
1509 if (m->move_insn && m->regno == REGNO (y)
1510 && rtx_equal_p (m->set_src, x))
1514 /* Otherwise, rtx's of different codes cannot be equal. */
1515 if (code != GET_CODE (y))
1518 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
1519 (REG:SI x) and (REG:HI x) are NOT equivalent. */
1521 if (GET_MODE (x) != GET_MODE (y))
1524 /* These three types of rtx's can be compared nonrecursively. */
1526 return (REGNO (x) == REGNO (y) || regs_match_p (x, y, movables));
1528 if (code == LABEL_REF)
1529 return XEXP (x, 0) == XEXP (y, 0);
1530 if (code == SYMBOL_REF)
1531 return XSTR (x, 0) == XSTR (y, 0);
1533 /* Compare the elements. If any pair of corresponding elements
1534 fail to match, return 0 for the whole things. */
1536 fmt = GET_RTX_FORMAT (code);
1537 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1542 if (XWINT (x, i) != XWINT (y, i))
1547 if (XINT (x, i) != XINT (y, i))
1552 /* Two vectors must have the same length. */
1553 if (XVECLEN (x, i) != XVECLEN (y, i))
1556 /* And the corresponding elements must match. */
1557 for (j = 0; j < XVECLEN (x, i); j++)
1558 if (rtx_equal_for_loop_p (XVECEXP (x, i, j), XVECEXP (y, i, j),
1559 movables, regs) == 0)
1564 if (rtx_equal_for_loop_p (XEXP (x, i), XEXP (y, i), movables, regs)
1570 if (strcmp (XSTR (x, i), XSTR (y, i)))
1575 /* These are just backpointers, so they don't matter. */
1581 /* It is believed that rtx's at this level will never
1582 contain anything but integers and other rtx's,
1583 except for within LABEL_REFs and SYMBOL_REFs. */
1591 /* If X contains any LABEL_REF's, add REG_LABEL notes for them to all
1592 insns in INSNS which use the reference. */
1595 add_label_notes (x, insns)
1599 enum rtx_code code = GET_CODE (x);
1604 if (code == LABEL_REF && !LABEL_REF_NONLOCAL_P (x))
1606 /* This code used to ignore labels that referred to dispatch tables to
1607 avoid flow generating (slighly) worse code.
1609 We no longer ignore such label references (see LABEL_REF handling in
1610 mark_jump_label for additional information). */
1611 for (insn = insns; insn; insn = NEXT_INSN (insn))
1612 if (reg_mentioned_p (XEXP (x, 0), insn))
1613 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_LABEL, XEXP (x, 0),
1617 fmt = GET_RTX_FORMAT (code);
1618 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1621 add_label_notes (XEXP (x, i), insns);
1622 else if (fmt[i] == 'E')
1623 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1624 add_label_notes (XVECEXP (x, i, j), insns);
1628 /* Scan MOVABLES, and move the insns that deserve to be moved.
1629 If two matching movables are combined, replace one reg with the
1630 other throughout. */
1633 move_movables (loop, movables, threshold, insn_count)
1635 struct movables *movables;
1639 struct loop_regs *regs = LOOP_REGS (loop);
1640 int nregs = regs->num;
1642 register struct movable *m;
1644 rtx loop_start = loop->start;
1645 rtx loop_end = loop->end;
1646 /* Map of pseudo-register replacements to handle combining
1647 when we move several insns that load the same value
1648 into different pseudo-registers. */
1649 rtx *reg_map = (rtx *) xcalloc (nregs, sizeof (rtx));
1650 char *already_moved = (char *) xcalloc (nregs, sizeof (char));
1654 for (m = movables->head; m; m = m->next)
1656 /* Describe this movable insn. */
1658 if (loop_dump_stream)
1660 fprintf (loop_dump_stream, "Insn %d: regno %d (life %d), ",
1661 INSN_UID (m->insn), m->regno, m->lifetime);
1663 fprintf (loop_dump_stream, "consec %d, ", m->consec);
1665 fprintf (loop_dump_stream, "cond ");
1667 fprintf (loop_dump_stream, "force ");
1669 fprintf (loop_dump_stream, "global ");
1671 fprintf (loop_dump_stream, "done ");
1673 fprintf (loop_dump_stream, "move-insn ");
1675 fprintf (loop_dump_stream, "matches %d ",
1676 INSN_UID (m->match->insn));
1678 fprintf (loop_dump_stream, "forces %d ",
1679 INSN_UID (m->forces->insn));
1682 /* Count movables. Value used in heuristics in strength_reduce. */
1685 /* Ignore the insn if it's already done (it matched something else).
1686 Otherwise, see if it is now safe to move. */
1690 || (1 == loop_invariant_p (loop, m->set_src)
1691 && (m->dependencies == 0
1692 || 1 == loop_invariant_p (loop, m->dependencies))
1694 || 1 == consec_sets_invariant_p (loop, m->set_dest,
1697 && (! m->forces || m->forces->done))
1701 int savings = m->savings;
1703 /* We have an insn that is safe to move.
1704 Compute its desirability. */
1709 if (loop_dump_stream)
1710 fprintf (loop_dump_stream, "savings %d ", savings);
1712 if (regs->moved_once[regno] && loop_dump_stream)
1713 fprintf (loop_dump_stream, "halved since already moved ");
1715 /* An insn MUST be moved if we already moved something else
1716 which is safe only if this one is moved too: that is,
1717 if already_moved[REGNO] is nonzero. */
1719 /* An insn is desirable to move if the new lifetime of the
1720 register is no more than THRESHOLD times the old lifetime.
1721 If it's not desirable, it means the loop is so big
1722 that moving won't speed things up much,
1723 and it is liable to make register usage worse. */
1725 /* It is also desirable to move if it can be moved at no
1726 extra cost because something else was already moved. */
1728 if (already_moved[regno]
1729 || flag_move_all_movables
1730 || (threshold * savings * m->lifetime) >=
1731 (regs->moved_once[regno] ? insn_count * 2 : insn_count)
1732 || (m->forces && m->forces->done
1733 && VARRAY_INT (regs->n_times_set, m->forces->regno) == 1))
1736 register struct movable *m1;
1737 rtx first = NULL_RTX;
1739 /* Now move the insns that set the reg. */
1741 if (m->partial && m->match)
1745 /* Find the end of this chain of matching regs.
1746 Thus, we load each reg in the chain from that one reg.
1747 And that reg is loaded with 0 directly,
1748 since it has ->match == 0. */
1749 for (m1 = m; m1->match; m1 = m1->match);
1750 newpat = gen_move_insn (SET_DEST (PATTERN (m->insn)),
1751 SET_DEST (PATTERN (m1->insn)));
1752 i1 = emit_insn_before (newpat, loop_start);
1754 /* Mark the moved, invariant reg as being allowed to
1755 share a hard reg with the other matching invariant. */
1756 REG_NOTES (i1) = REG_NOTES (m->insn);
1757 r1 = SET_DEST (PATTERN (m->insn));
1758 r2 = SET_DEST (PATTERN (m1->insn));
1760 = gen_rtx_EXPR_LIST (VOIDmode, r1,
1761 gen_rtx_EXPR_LIST (VOIDmode, r2,
1763 delete_insn (m->insn);
1768 if (loop_dump_stream)
1769 fprintf (loop_dump_stream, " moved to %d", INSN_UID (i1));
1771 /* If we are to re-generate the item being moved with a
1772 new move insn, first delete what we have and then emit
1773 the move insn before the loop. */
1774 else if (m->move_insn)
1778 for (count = m->consec; count >= 0; count--)
1780 /* If this is the first insn of a library call sequence,
1782 if (GET_CODE (p) != NOTE
1783 && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
1786 /* If this is the last insn of a libcall sequence, then
1787 delete every insn in the sequence except the last.
1788 The last insn is handled in the normal manner. */
1789 if (GET_CODE (p) != NOTE
1790 && (temp = find_reg_note (p, REG_RETVAL, NULL_RTX)))
1792 temp = XEXP (temp, 0);
1794 temp = delete_insn (temp);
1798 p = delete_insn (p);
1800 /* simplify_giv_expr expects that it can walk the insns
1801 at m->insn forwards and see this old sequence we are
1802 tossing here. delete_insn does preserve the next
1803 pointers, but when we skip over a NOTE we must fix
1804 it up. Otherwise that code walks into the non-deleted
1806 while (p && GET_CODE (p) == NOTE)
1807 p = NEXT_INSN (temp) = NEXT_INSN (p);
1811 emit_move_insn (m->set_dest, m->set_src);
1812 temp = get_insns ();
1815 add_label_notes (m->set_src, temp);
1817 i1 = emit_insns_before (temp, loop_start);
1818 if (! find_reg_note (i1, REG_EQUAL, NULL_RTX))
1820 = gen_rtx_EXPR_LIST (m->is_equiv ? REG_EQUIV : REG_EQUAL,
1821 m->set_src, REG_NOTES (i1));
1823 if (loop_dump_stream)
1824 fprintf (loop_dump_stream, " moved to %d", INSN_UID (i1));
1826 /* The more regs we move, the less we like moving them. */
1831 for (count = m->consec; count >= 0; count--)
1835 /* If first insn of libcall sequence, skip to end. */
1836 /* Do this at start of loop, since p is guaranteed to
1838 if (GET_CODE (p) != NOTE
1839 && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
1842 /* If last insn of libcall sequence, move all
1843 insns except the last before the loop. The last
1844 insn is handled in the normal manner. */
1845 if (GET_CODE (p) != NOTE
1846 && (temp = find_reg_note (p, REG_RETVAL, NULL_RTX)))
1850 rtx fn_address_insn = 0;
1853 for (temp = XEXP (temp, 0); temp != p;
1854 temp = NEXT_INSN (temp))
1860 if (GET_CODE (temp) == NOTE)
1863 body = PATTERN (temp);
1865 /* Find the next insn after TEMP,
1866 not counting USE or NOTE insns. */
1867 for (next = NEXT_INSN (temp); next != p;
1868 next = NEXT_INSN (next))
1869 if (! (GET_CODE (next) == INSN
1870 && GET_CODE (PATTERN (next)) == USE)
1871 && GET_CODE (next) != NOTE)
1874 /* If that is the call, this may be the insn
1875 that loads the function address.
1877 Extract the function address from the insn
1878 that loads it into a register.
1879 If this insn was cse'd, we get incorrect code.
1881 So emit a new move insn that copies the
1882 function address into the register that the
1883 call insn will use. flow.c will delete any
1884 redundant stores that we have created. */
1885 if (GET_CODE (next) == CALL_INSN
1886 && GET_CODE (body) == SET
1887 && GET_CODE (SET_DEST (body)) == REG
1888 && (n = find_reg_note (temp, REG_EQUAL,
1891 fn_reg = SET_SRC (body);
1892 if (GET_CODE (fn_reg) != REG)
1893 fn_reg = SET_DEST (body);
1894 fn_address = XEXP (n, 0);
1895 fn_address_insn = temp;
1897 /* We have the call insn.
1898 If it uses the register we suspect it might,
1899 load it with the correct address directly. */
1900 if (GET_CODE (temp) == CALL_INSN
1902 && reg_referenced_p (fn_reg, body))
1903 emit_insn_after (gen_move_insn (fn_reg,
1907 if (GET_CODE (temp) == CALL_INSN)
1909 i1 = emit_call_insn_before (body, loop_start);
1910 /* Because the USAGE information potentially
1911 contains objects other than hard registers
1912 we need to copy it. */
1913 if (CALL_INSN_FUNCTION_USAGE (temp))
1914 CALL_INSN_FUNCTION_USAGE (i1)
1915 = copy_rtx (CALL_INSN_FUNCTION_USAGE (temp));
1918 i1 = emit_insn_before (body, loop_start);
1921 if (temp == fn_address_insn)
1922 fn_address_insn = i1;
1923 REG_NOTES (i1) = REG_NOTES (temp);
1929 if (m->savemode != VOIDmode)
1931 /* P sets REG to zero; but we should clear only
1932 the bits that are not covered by the mode
1934 rtx reg = m->set_dest;
1940 (GET_MODE (reg), and_optab, reg,
1941 GEN_INT ((((HOST_WIDE_INT) 1
1942 << GET_MODE_BITSIZE (m->savemode)))
1944 reg, 1, OPTAB_LIB_WIDEN);
1948 emit_move_insn (reg, tem);
1949 sequence = gen_sequence ();
1951 i1 = emit_insn_before (sequence, loop_start);
1953 else if (GET_CODE (p) == CALL_INSN)
1955 i1 = emit_call_insn_before (PATTERN (p), loop_start);
1956 /* Because the USAGE information potentially
1957 contains objects other than hard registers
1958 we need to copy it. */
1959 if (CALL_INSN_FUNCTION_USAGE (p))
1960 CALL_INSN_FUNCTION_USAGE (i1)
1961 = copy_rtx (CALL_INSN_FUNCTION_USAGE (p));
1963 else if (count == m->consec && m->move_insn_first)
1965 /* The SET_SRC might not be invariant, so we must
1966 use the REG_EQUAL note. */
1968 emit_move_insn (m->set_dest, m->set_src);
1969 temp = get_insns ();
1972 add_label_notes (m->set_src, temp);
1974 i1 = emit_insns_before (temp, loop_start);
1975 if (! find_reg_note (i1, REG_EQUAL, NULL_RTX))
1977 = gen_rtx_EXPR_LIST ((m->is_equiv ? REG_EQUIV
1979 m->set_src, REG_NOTES (i1));
1982 i1 = emit_insn_before (PATTERN (p), loop_start);
1984 if (REG_NOTES (i1) == 0)
1986 REG_NOTES (i1) = REG_NOTES (p);
1988 /* If there is a REG_EQUAL note present whose value
1989 is not loop invariant, then delete it, since it
1990 may cause problems with later optimization passes.
1991 It is possible for cse to create such notes
1992 like this as a result of record_jump_cond. */
1994 if ((temp = find_reg_note (i1, REG_EQUAL, NULL_RTX))
1995 && ! loop_invariant_p (loop, XEXP (temp, 0)))
1996 remove_note (i1, temp);
2002 if (loop_dump_stream)
2003 fprintf (loop_dump_stream, " moved to %d",
2006 /* If library call, now fix the REG_NOTES that contain
2007 insn pointers, namely REG_LIBCALL on FIRST
2008 and REG_RETVAL on I1. */
2009 if ((temp = find_reg_note (i1, REG_RETVAL, NULL_RTX)))
2011 XEXP (temp, 0) = first;
2012 temp = find_reg_note (first, REG_LIBCALL, NULL_RTX);
2013 XEXP (temp, 0) = i1;
2020 /* simplify_giv_expr expects that it can walk the insns
2021 at m->insn forwards and see this old sequence we are
2022 tossing here. delete_insn does preserve the next
2023 pointers, but when we skip over a NOTE we must fix
2024 it up. Otherwise that code walks into the non-deleted
2026 while (p && GET_CODE (p) == NOTE)
2027 p = NEXT_INSN (temp) = NEXT_INSN (p);
2030 /* The more regs we move, the less we like moving them. */
2034 /* Any other movable that loads the same register
2036 already_moved[regno] = 1;
2038 /* This reg has been moved out of one loop. */
2039 regs->moved_once[regno] = 1;
2041 /* The reg set here is now invariant. */
2043 VARRAY_INT (regs->set_in_loop, regno) = 0;
2047 /* Change the length-of-life info for the register
2048 to say it lives at least the full length of this loop.
2049 This will help guide optimizations in outer loops. */
2051 if (uid_luid[REGNO_FIRST_UID (regno)] > INSN_LUID (loop_start))
2052 /* This is the old insn before all the moved insns.
2053 We can't use the moved insn because it is out of range
2054 in uid_luid. Only the old insns have luids. */
2055 REGNO_FIRST_UID (regno) = INSN_UID (loop_start);
2056 if (uid_luid[REGNO_LAST_UID (regno)] < INSN_LUID (loop_end))
2057 REGNO_LAST_UID (regno) = INSN_UID (loop_end);
2059 /* Combine with this moved insn any other matching movables. */
2062 for (m1 = movables->head; m1; m1 = m1->next)
2067 /* Schedule the reg loaded by M1
2068 for replacement so that shares the reg of M.
2069 If the modes differ (only possible in restricted
2070 circumstances, make a SUBREG.
2072 Note this assumes that the target dependent files
2073 treat REG and SUBREG equally, including within
2074 GO_IF_LEGITIMATE_ADDRESS and in all the
2075 predicates since we never verify that replacing the
2076 original register with a SUBREG results in a
2077 recognizable insn. */
2078 if (GET_MODE (m->set_dest) == GET_MODE (m1->set_dest))
2079 reg_map[m1->regno] = m->set_dest;
2082 = gen_lowpart_common (GET_MODE (m1->set_dest),
2085 /* Get rid of the matching insn
2086 and prevent further processing of it. */
2089 /* if library call, delete all insn except last, which
2091 if ((temp = find_reg_note (m1->insn, REG_RETVAL,
2094 for (temp = XEXP (temp, 0); temp != m1->insn;
2095 temp = NEXT_INSN (temp))
2098 delete_insn (m1->insn);
2100 /* Any other movable that loads the same register
2102 already_moved[m1->regno] = 1;
2104 /* The reg merged here is now invariant,
2105 if the reg it matches is invariant. */
2107 VARRAY_INT (regs->set_in_loop, m1->regno) = 0;
2110 else if (loop_dump_stream)
2111 fprintf (loop_dump_stream, "not desirable");
2113 else if (loop_dump_stream && !m->match)
2114 fprintf (loop_dump_stream, "not safe");
2116 if (loop_dump_stream)
2117 fprintf (loop_dump_stream, "\n");
2121 new_start = loop_start;
2123 /* Go through all the instructions in the loop, making
2124 all the register substitutions scheduled in REG_MAP. */
2125 for (p = new_start; p != loop_end; p = NEXT_INSN (p))
2126 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
2127 || GET_CODE (p) == CALL_INSN)
2129 replace_regs (PATTERN (p), reg_map, nregs, 0);
2130 replace_regs (REG_NOTES (p), reg_map, nregs, 0);
2136 free (already_moved);
2140 /* Scan X and replace the address of any MEM in it with ADDR.
2141 REG is the address that MEM should have before the replacement. */
2144 replace_call_address (x, reg, addr)
2147 register enum rtx_code code;
2149 register const char *fmt;
2153 code = GET_CODE (x);
2167 /* Short cut for very common case. */
2168 replace_call_address (XEXP (x, 1), reg, addr);
2172 /* Short cut for very common case. */
2173 replace_call_address (XEXP (x, 0), reg, addr);
2177 /* If this MEM uses a reg other than the one we expected,
2178 something is wrong. */
2179 if (XEXP (x, 0) != reg)
2188 fmt = GET_RTX_FORMAT (code);
2189 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2192 replace_call_address (XEXP (x, i), reg, addr);
2193 else if (fmt[i] == 'E')
2196 for (j = 0; j < XVECLEN (x, i); j++)
2197 replace_call_address (XVECEXP (x, i, j), reg, addr);
2203 /* Return the number of memory refs to addresses that vary
2207 count_nonfixed_reads (loop, x)
2208 const struct loop *loop;
2211 register enum rtx_code code;
2213 register const char *fmt;
2219 code = GET_CODE (x);
2233 return ((loop_invariant_p (loop, XEXP (x, 0)) != 1)
2234 + count_nonfixed_reads (loop, XEXP (x, 0)));
2241 fmt = GET_RTX_FORMAT (code);
2242 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2245 value += count_nonfixed_reads (loop, XEXP (x, i));
2249 for (j = 0; j < XVECLEN (x, i); j++)
2250 value += count_nonfixed_reads (loop, XVECEXP (x, i, j));
2256 /* Scan a loop setting the elements `cont', `vtop', `loops_enclosed',
2257 `has_call', `has_volatile', `has_tablejump',
2258 `unknown_address_altered', `unknown_constant_address_altered', and
2259 `num_mem_sets' in LOOP. Also, fill in the array `mems' and the
2260 list `store_mems' in LOOP. */
2266 register int level = 1;
2268 struct loop_info *loop_info = LOOP_INFO (loop);
2269 rtx start = loop->start;
2270 rtx end = loop->end;
2271 /* The label after END. Jumping here is just like falling off the
2272 end of the loop. We use next_nonnote_insn instead of next_label
2273 as a hedge against the (pathological) case where some actual insn
2274 might end up between the two. */
2275 rtx exit_target = next_nonnote_insn (end);
2277 loop_info->has_indirect_jump = indirect_jump_in_function;
2278 loop_info->has_call = 0;
2279 loop_info->has_volatile = 0;
2280 loop_info->has_tablejump = 0;
2281 loop_info->has_multiple_exit_targets = 0;
2284 loop_info->unknown_address_altered = 0;
2285 loop_info->unknown_constant_address_altered = 0;
2286 loop_info->store_mems = NULL_RTX;
2287 loop_info->first_loop_store_insn = NULL_RTX;
2288 loop_info->mems_idx = 0;
2289 loop_info->num_mem_sets = 0;
2291 for (insn = NEXT_INSN (start); insn != NEXT_INSN (end);
2292 insn = NEXT_INSN (insn))
2294 if (GET_CODE (insn) == NOTE)
2296 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
2299 /* Count number of loops contained in this one. */
2302 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END)
2307 else if (GET_CODE (insn) == CALL_INSN)
2309 if (! CONST_CALL_P (insn))
2310 loop_info->unknown_address_altered = 1;
2311 loop_info->has_call = 1;
2313 else if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN)
2315 rtx label1 = NULL_RTX;
2316 rtx label2 = NULL_RTX;
2318 if (volatile_refs_p (PATTERN (insn)))
2319 loop_info->has_volatile = 1;
2321 if (GET_CODE (insn) == JUMP_INSN
2322 && (GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC
2323 || GET_CODE (PATTERN (insn)) == ADDR_VEC))
2324 loop_info->has_tablejump = 1;
2326 note_stores (PATTERN (insn), note_addr_stored, loop_info);
2327 if (! loop_info->first_loop_store_insn && loop_info->store_mems)
2328 loop_info->first_loop_store_insn = insn;
2330 if (! loop_info->has_multiple_exit_targets
2331 && GET_CODE (insn) == JUMP_INSN
2332 && GET_CODE (PATTERN (insn)) == SET
2333 && SET_DEST (PATTERN (insn)) == pc_rtx)
2335 if (GET_CODE (SET_SRC (PATTERN (insn))) == IF_THEN_ELSE)
2337 label1 = XEXP (SET_SRC (PATTERN (insn)), 1);
2338 label2 = XEXP (SET_SRC (PATTERN (insn)), 2);
2342 label1 = SET_SRC (PATTERN (insn));
2347 if (label1 && label1 != pc_rtx)
2349 if (GET_CODE (label1) != LABEL_REF)
2351 /* Something tricky. */
2352 loop_info->has_multiple_exit_targets = 1;
2355 else if (XEXP (label1, 0) != exit_target
2356 && LABEL_OUTSIDE_LOOP_P (label1))
2358 /* A jump outside the current loop. */
2359 loop_info->has_multiple_exit_targets = 1;
2370 else if (GET_CODE (insn) == RETURN)
2371 loop_info->has_multiple_exit_targets = 1;
2374 /* Now, rescan the loop, setting up the LOOP_MEMS array. */
2375 if (/* An exception thrown by a called function might land us
2377 ! loop_info->has_call
2378 /* We don't want loads for MEMs moved to a location before the
2379 one at which their stack memory becomes allocated. (Note
2380 that this is not a problem for malloc, etc., since those
2381 require actual function calls. */
2382 && ! current_function_calls_alloca
2383 /* There are ways to leave the loop other than falling off the
2385 && ! loop_info->has_multiple_exit_targets)
2386 for (insn = NEXT_INSN (start); insn != NEXT_INSN (end);
2387 insn = NEXT_INSN (insn))
2388 for_each_rtx (&insn, insert_loop_mem, loop_info);
2390 /* BLKmode MEMs are added to LOOP_STORE_MEM as necessary so
2391 that loop_invariant_p and load_mems can use true_dependence
2392 to determine what is really clobbered. */
2393 if (loop_info->unknown_address_altered)
2395 rtx mem = gen_rtx_MEM (BLKmode, const0_rtx);
2397 loop_info->store_mems
2398 = gen_rtx_EXPR_LIST (VOIDmode, mem, loop_info->store_mems);
2400 if (loop_info->unknown_constant_address_altered)
2402 rtx mem = gen_rtx_MEM (BLKmode, const0_rtx);
2404 RTX_UNCHANGING_P (mem) = 1;
2405 loop_info->store_mems
2406 = gen_rtx_EXPR_LIST (VOIDmode, mem, loop_info->store_mems);
2410 /* Scan the function looking for loops. Record the start and end of each loop.
2411 Also mark as invalid loops any loops that contain a setjmp or are branched
2412 to from outside the loop. */
2415 find_and_verify_loops (f, loops)
2417 struct loops *loops;
2422 struct loop *current_loop;
2423 struct loop *next_loop;
2426 num_loops = loops->num;
2428 compute_luids (f, NULL_RTX, 0);
2430 /* If there are jumps to undefined labels,
2431 treat them as jumps out of any/all loops.
2432 This also avoids writing past end of tables when there are no loops. */
2435 /* Find boundaries of loops, mark which loops are contained within
2436 loops, and invalidate loops that have setjmp. */
2439 current_loop = NULL;
2440 for (insn = f; insn; insn = NEXT_INSN (insn))
2442 if (GET_CODE (insn) == NOTE)
2443 switch (NOTE_LINE_NUMBER (insn))
2445 case NOTE_INSN_LOOP_BEG:
2446 next_loop = loops->array + num_loops;
2447 next_loop->num = num_loops;
2449 next_loop->start = insn;
2450 next_loop->outer = current_loop;
2451 current_loop = next_loop;
2454 case NOTE_INSN_SETJMP:
2455 /* In this case, we must invalidate our current loop and any
2457 for (loop = current_loop; loop; loop = loop->outer)
2460 if (loop_dump_stream)
2461 fprintf (loop_dump_stream,
2462 "\nLoop at %d ignored due to setjmp.\n",
2463 INSN_UID (loop->start));
2467 case NOTE_INSN_LOOP_CONT:
2468 current_loop->cont = insn;
2471 case NOTE_INSN_LOOP_VTOP:
2472 current_loop->vtop = insn;
2475 case NOTE_INSN_LOOP_END:
2479 current_loop->end = insn;
2480 current_loop = current_loop->outer;
2487 /* Note that this will mark the NOTE_INSN_LOOP_END note as being in the
2488 enclosing loop, but this doesn't matter. */
2489 uid_loop[INSN_UID (insn)] = current_loop;
2492 /* Any loop containing a label used in an initializer must be invalidated,
2493 because it can be jumped into from anywhere. */
2495 for (label = forced_labels; label; label = XEXP (label, 1))
2497 for (loop = uid_loop[INSN_UID (XEXP (label, 0))];
2498 loop; loop = loop->outer)
2502 /* Any loop containing a label used for an exception handler must be
2503 invalidated, because it can be jumped into from anywhere. */
2505 for (label = exception_handler_labels; label; label = XEXP (label, 1))
2507 for (loop = uid_loop[INSN_UID (XEXP (label, 0))];
2508 loop; loop = loop->outer)
2512 /* Now scan all insn's in the function. If any JUMP_INSN branches into a
2513 loop that it is not contained within, that loop is marked invalid.
2514 If any INSN or CALL_INSN uses a label's address, then the loop containing
2515 that label is marked invalid, because it could be jumped into from
2518 Also look for blocks of code ending in an unconditional branch that
2519 exits the loop. If such a block is surrounded by a conditional
2520 branch around the block, move the block elsewhere (see below) and
2521 invert the jump to point to the code block. This may eliminate a
2522 label in our loop and will simplify processing by both us and a
2523 possible second cse pass. */
2525 for (insn = f; insn; insn = NEXT_INSN (insn))
2528 struct loop *this_loop = uid_loop[INSN_UID (insn)];
2530 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
2532 rtx note = find_reg_note (insn, REG_LABEL, NULL_RTX);
2535 for (loop = uid_loop[INSN_UID (XEXP (note, 0))];
2536 loop; loop = loop->outer)
2541 if (GET_CODE (insn) != JUMP_INSN)
2544 mark_loop_jump (PATTERN (insn), this_loop);
2546 /* See if this is an unconditional branch outside the loop. */
2548 && (GET_CODE (PATTERN (insn)) == RETURN
2549 || (any_uncondjump_p (insn)
2550 && onlyjump_p (insn)
2551 && (uid_loop[INSN_UID (JUMP_LABEL (insn))]
2553 && get_max_uid () < max_uid_for_loop)
2556 rtx our_next = next_real_insn (insn);
2557 rtx last_insn_to_move = NEXT_INSN (insn);
2558 struct loop *dest_loop;
2559 struct loop *outer_loop = NULL;
2561 /* Go backwards until we reach the start of the loop, a label,
2563 for (p = PREV_INSN (insn);
2564 GET_CODE (p) != CODE_LABEL
2565 && ! (GET_CODE (p) == NOTE
2566 && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
2567 && GET_CODE (p) != JUMP_INSN;
2571 /* Check for the case where we have a jump to an inner nested
2572 loop, and do not perform the optimization in that case. */
2574 if (JUMP_LABEL (insn))
2576 dest_loop = uid_loop[INSN_UID (JUMP_LABEL (insn))];
2579 for (outer_loop = dest_loop; outer_loop;
2580 outer_loop = outer_loop->outer)
2581 if (outer_loop == this_loop)
2586 /* Make sure that the target of P is within the current loop. */
2588 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p)
2589 && uid_loop[INSN_UID (JUMP_LABEL (p))] != this_loop)
2590 outer_loop = this_loop;
2592 /* If we stopped on a JUMP_INSN to the next insn after INSN,
2593 we have a block of code to try to move.
2595 We look backward and then forward from the target of INSN
2596 to find a BARRIER at the same loop depth as the target.
2597 If we find such a BARRIER, we make a new label for the start
2598 of the block, invert the jump in P and point it to that label,
2599 and move the block of code to the spot we found. */
2602 && GET_CODE (p) == JUMP_INSN
2603 && JUMP_LABEL (p) != 0
2604 /* Just ignore jumps to labels that were never emitted.
2605 These always indicate compilation errors. */
2606 && INSN_UID (JUMP_LABEL (p)) != 0
2607 && any_condjump_p (p) && onlyjump_p (p)
2608 && next_real_insn (JUMP_LABEL (p)) == our_next
2609 /* If it's not safe to move the sequence, then we
2611 && insns_safe_to_move_p (p, NEXT_INSN (insn),
2612 &last_insn_to_move))
2615 = JUMP_LABEL (insn) ? JUMP_LABEL (insn) : get_last_insn ();
2616 struct loop *target_loop = uid_loop[INSN_UID (target)];
2619 for (loc = target; loc; loc = PREV_INSN (loc))
2620 if (GET_CODE (loc) == BARRIER
2621 /* Don't move things inside a tablejump. */
2622 && ((loc2 = next_nonnote_insn (loc)) == 0
2623 || GET_CODE (loc2) != CODE_LABEL
2624 || (loc2 = next_nonnote_insn (loc2)) == 0
2625 || GET_CODE (loc2) != JUMP_INSN
2626 || (GET_CODE (PATTERN (loc2)) != ADDR_VEC
2627 && GET_CODE (PATTERN (loc2)) != ADDR_DIFF_VEC))
2628 && uid_loop[INSN_UID (loc)] == target_loop)
2632 for (loc = target; loc; loc = NEXT_INSN (loc))
2633 if (GET_CODE (loc) == BARRIER
2634 /* Don't move things inside a tablejump. */
2635 && ((loc2 = next_nonnote_insn (loc)) == 0
2636 || GET_CODE (loc2) != CODE_LABEL
2637 || (loc2 = next_nonnote_insn (loc2)) == 0
2638 || GET_CODE (loc2) != JUMP_INSN
2639 || (GET_CODE (PATTERN (loc2)) != ADDR_VEC
2640 && GET_CODE (PATTERN (loc2)) != ADDR_DIFF_VEC))
2641 && uid_loop[INSN_UID (loc)] == target_loop)
2646 rtx cond_label = JUMP_LABEL (p);
2647 rtx new_label = get_label_after (p);
2649 /* Ensure our label doesn't go away. */
2650 LABEL_NUSES (cond_label)++;
2652 /* Verify that uid_loop is large enough and that
2654 if (invert_jump (p, new_label, 1))
2658 /* If no suitable BARRIER was found, create a suitable
2659 one before TARGET. Since TARGET is a fall through
2660 path, we'll need to insert an jump around our block
2661 and a add a BARRIER before TARGET.
2663 This creates an extra unconditional jump outside
2664 the loop. However, the benefits of removing rarely
2665 executed instructions from inside the loop usually
2666 outweighs the cost of the extra unconditional jump
2667 outside the loop. */
2672 temp = gen_jump (JUMP_LABEL (insn));
2673 temp = emit_jump_insn_before (temp, target);
2674 JUMP_LABEL (temp) = JUMP_LABEL (insn);
2675 LABEL_NUSES (JUMP_LABEL (insn))++;
2676 loc = emit_barrier_before (target);
2679 /* Include the BARRIER after INSN and copy the
2681 new_label = squeeze_notes (new_label,
2683 reorder_insns (new_label, last_insn_to_move, loc);
2685 /* All those insns are now in TARGET_LOOP. */
2687 q != NEXT_INSN (last_insn_to_move);
2689 uid_loop[INSN_UID (q)] = target_loop;
2691 /* The label jumped to by INSN is no longer a loop
2692 exit. Unless INSN does not have a label (e.g.,
2693 it is a RETURN insn), search loop->exit_labels
2694 to find its label_ref, and remove it. Also turn
2695 off LABEL_OUTSIDE_LOOP_P bit. */
2696 if (JUMP_LABEL (insn))
2698 for (q = 0, r = this_loop->exit_labels;
2700 q = r, r = LABEL_NEXTREF (r))
2701 if (XEXP (r, 0) == JUMP_LABEL (insn))
2703 LABEL_OUTSIDE_LOOP_P (r) = 0;
2705 LABEL_NEXTREF (q) = LABEL_NEXTREF (r);
2707 this_loop->exit_labels = LABEL_NEXTREF (r);
2711 for (loop = this_loop; loop && loop != target_loop;
2715 /* If we didn't find it, then something is
2721 /* P is now a jump outside the loop, so it must be put
2722 in loop->exit_labels, and marked as such.
2723 The easiest way to do this is to just call
2724 mark_loop_jump again for P. */
2725 mark_loop_jump (PATTERN (p), this_loop);
2727 /* If INSN now jumps to the insn after it,
2729 if (JUMP_LABEL (insn) != 0
2730 && (next_real_insn (JUMP_LABEL (insn))
2731 == next_real_insn (insn)))
2735 /* Continue the loop after where the conditional
2736 branch used to jump, since the only branch insn
2737 in the block (if it still remains) is an inter-loop
2738 branch and hence needs no processing. */
2739 insn = NEXT_INSN (cond_label);
2741 if (--LABEL_NUSES (cond_label) == 0)
2742 delete_insn (cond_label);
2744 /* This loop will be continued with NEXT_INSN (insn). */
2745 insn = PREV_INSN (insn);
2752 /* If any label in X jumps to a loop different from LOOP_NUM and any of the
2753 loops it is contained in, mark the target loop invalid.
2755 For speed, we assume that X is part of a pattern of a JUMP_INSN. */
2758 mark_loop_jump (x, loop)
2762 struct loop *dest_loop;
2763 struct loop *outer_loop;
2766 switch (GET_CODE (x))
2779 /* There could be a label reference in here. */
2780 mark_loop_jump (XEXP (x, 0), loop);
2786 mark_loop_jump (XEXP (x, 0), loop);
2787 mark_loop_jump (XEXP (x, 1), loop);
2791 /* This may refer to a LABEL_REF or SYMBOL_REF. */
2792 mark_loop_jump (XEXP (x, 1), loop);
2797 mark_loop_jump (XEXP (x, 0), loop);
2801 dest_loop = uid_loop[INSN_UID (XEXP (x, 0))];
2803 /* Link together all labels that branch outside the loop. This
2804 is used by final_[bg]iv_value and the loop unrolling code. Also
2805 mark this LABEL_REF so we know that this branch should predict
2808 /* A check to make sure the label is not in an inner nested loop,
2809 since this does not count as a loop exit. */
2812 for (outer_loop = dest_loop; outer_loop;
2813 outer_loop = outer_loop->outer)
2814 if (outer_loop == loop)
2820 if (loop && ! outer_loop)
2822 LABEL_OUTSIDE_LOOP_P (x) = 1;
2823 LABEL_NEXTREF (x) = loop->exit_labels;
2824 loop->exit_labels = x;
2826 for (outer_loop = loop;
2827 outer_loop && outer_loop != dest_loop;
2828 outer_loop = outer_loop->outer)
2829 outer_loop->exit_count++;
2832 /* If this is inside a loop, but not in the current loop or one enclosed
2833 by it, it invalidates at least one loop. */
2838 /* We must invalidate every nested loop containing the target of this
2839 label, except those that also contain the jump insn. */
2841 for (; dest_loop; dest_loop = dest_loop->outer)
2843 /* Stop when we reach a loop that also contains the jump insn. */
2844 for (outer_loop = loop; outer_loop; outer_loop = outer_loop->outer)
2845 if (dest_loop == outer_loop)
2848 /* If we get here, we know we need to invalidate a loop. */
2849 if (loop_dump_stream && ! dest_loop->invalid)
2850 fprintf (loop_dump_stream,
2851 "\nLoop at %d ignored due to multiple entry points.\n",
2852 INSN_UID (dest_loop->start));
2854 dest_loop->invalid = 1;
2859 /* If this is not setting pc, ignore. */
2860 if (SET_DEST (x) == pc_rtx)
2861 mark_loop_jump (SET_SRC (x), loop);
2865 mark_loop_jump (XEXP (x, 1), loop);
2866 mark_loop_jump (XEXP (x, 2), loop);
2871 for (i = 0; i < XVECLEN (x, 0); i++)
2872 mark_loop_jump (XVECEXP (x, 0, i), loop);
2876 for (i = 0; i < XVECLEN (x, 1); i++)
2877 mark_loop_jump (XVECEXP (x, 1, i), loop);
2881 /* Strictly speaking this is not a jump into the loop, only a possible
2882 jump out of the loop. However, we have no way to link the destination
2883 of this jump onto the list of exit labels. To be safe we mark this
2884 loop and any containing loops as invalid. */
2887 for (outer_loop = loop; outer_loop; outer_loop = outer_loop->outer)
2889 if (loop_dump_stream && ! outer_loop->invalid)
2890 fprintf (loop_dump_stream,
2891 "\nLoop at %d ignored due to unknown exit jump.\n",
2892 INSN_UID (outer_loop->start));
2893 outer_loop->invalid = 1;
2900 /* Return nonzero if there is a label in the range from
2901 insn INSN to and including the insn whose luid is END
2902 INSN must have an assigned luid (i.e., it must not have
2903 been previously created by loop.c). */
2906 labels_in_range_p (insn, end)
2910 while (insn && INSN_LUID (insn) <= end)
2912 if (GET_CODE (insn) == CODE_LABEL)
2914 insn = NEXT_INSN (insn);
2920 /* Record that a memory reference X is being set. */
2923 note_addr_stored (x, y, data)
2925 rtx y ATTRIBUTE_UNUSED;
2926 void *data ATTRIBUTE_UNUSED;
2928 struct loop_info *loop_info = data;
2930 if (x == 0 || GET_CODE (x) != MEM)
2933 /* Count number of memory writes.
2934 This affects heuristics in strength_reduce. */
2935 loop_info->num_mem_sets++;
2937 /* BLKmode MEM means all memory is clobbered. */
2938 if (GET_MODE (x) == BLKmode)
2940 if (RTX_UNCHANGING_P (x))
2941 loop_info->unknown_constant_address_altered = 1;
2943 loop_info->unknown_address_altered = 1;
2948 loop_info->store_mems = gen_rtx_EXPR_LIST (VOIDmode, x,
2949 loop_info->store_mems);
2952 /* X is a value modified by an INSN that references a biv inside a loop
2953 exit test (ie, X is somehow related to the value of the biv). If X
2954 is a pseudo that is used more than once, then the biv is (effectively)
2955 used more than once. DATA is a pointer to a loop_regs structure. */
2958 note_set_pseudo_multiple_uses (x, y, data)
2960 rtx y ATTRIBUTE_UNUSED;
2963 struct loop_regs *regs = (struct loop_regs *) data;
2968 while (GET_CODE (x) == STRICT_LOW_PART
2969 || GET_CODE (x) == SIGN_EXTRACT
2970 || GET_CODE (x) == ZERO_EXTRACT
2971 || GET_CODE (x) == SUBREG)
2974 if (GET_CODE (x) != REG || REGNO (x) < FIRST_PSEUDO_REGISTER)
2977 /* If we do not have usage information, or if we know the register
2978 is used more than once, note that fact for check_dbra_loop. */
2979 if (REGNO (x) >= max_reg_before_loop
2980 || ! VARRAY_RTX (regs->single_usage, REGNO (x))
2981 || VARRAY_RTX (regs->single_usage, REGNO (x)) == const0_rtx)
2982 regs->multiple_uses = 1;
2985 /* Return nonzero if the rtx X is invariant over the current loop.
2987 The value is 2 if we refer to something only conditionally invariant.
2989 A memory ref is invariant if it is not volatile and does not conflict
2990 with anything stored in `loop_info->store_mems'. */
2993 loop_invariant_p (loop, x)
2994 const struct loop *loop;
2997 struct loop_info *loop_info = LOOP_INFO (loop);
2998 struct loop_regs *regs = LOOP_REGS (loop);
3000 register enum rtx_code code;
3001 register const char *fmt;
3002 int conditional = 0;
3007 code = GET_CODE (x);
3017 /* A LABEL_REF is normally invariant, however, if we are unrolling
3018 loops, and this label is inside the loop, then it isn't invariant.
3019 This is because each unrolled copy of the loop body will have
3020 a copy of this label. If this was invariant, then an insn loading
3021 the address of this label into a register might get moved outside
3022 the loop, and then each loop body would end up using the same label.
3024 We don't know the loop bounds here though, so just fail for all
3026 if (flag_unroll_loops)
3033 case UNSPEC_VOLATILE:
3037 /* We used to check RTX_UNCHANGING_P (x) here, but that is invalid
3038 since the reg might be set by initialization within the loop. */
3040 if ((x == frame_pointer_rtx || x == hard_frame_pointer_rtx
3041 || x == arg_pointer_rtx)
3042 && ! current_function_has_nonlocal_goto)
3045 if (LOOP_INFO (loop)->has_call
3046 && REGNO (x) < FIRST_PSEUDO_REGISTER && call_used_regs[REGNO (x)])
3049 if (VARRAY_INT (regs->set_in_loop, REGNO (x)) < 0)
3052 return VARRAY_INT (regs->set_in_loop, REGNO (x)) == 0;
3055 /* Volatile memory references must be rejected. Do this before
3056 checking for read-only items, so that volatile read-only items
3057 will be rejected also. */
3058 if (MEM_VOLATILE_P (x))
3061 /* See if there is any dependence between a store and this load. */
3062 mem_list_entry = loop_info->store_mems;
3063 while (mem_list_entry)
3065 if (true_dependence (XEXP (mem_list_entry, 0), VOIDmode,
3069 mem_list_entry = XEXP (mem_list_entry, 1);
3072 /* It's not invalidated by a store in memory
3073 but we must still verify the address is invariant. */
3077 /* Don't mess with insns declared volatile. */
3078 if (MEM_VOLATILE_P (x))
3086 fmt = GET_RTX_FORMAT (code);
3087 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3091 int tem = loop_invariant_p (loop, XEXP (x, i));
3097 else if (fmt[i] == 'E')
3100 for (j = 0; j < XVECLEN (x, i); j++)
3102 int tem = loop_invariant_p (loop, XVECEXP (x, i, j));
3112 return 1 + conditional;
3115 /* Return nonzero if all the insns in the loop that set REG
3116 are INSN and the immediately following insns,
3117 and if each of those insns sets REG in an invariant way
3118 (not counting uses of REG in them).
3120 The value is 2 if some of these insns are only conditionally invariant.
3122 We assume that INSN itself is the first set of REG
3123 and that its source is invariant. */
3126 consec_sets_invariant_p (loop, reg, n_sets, insn)
3127 const struct loop *loop;
3131 struct loop_regs *regs = LOOP_REGS (loop);
3133 unsigned int regno = REGNO (reg);
3135 /* Number of sets we have to insist on finding after INSN. */
3136 int count = n_sets - 1;
3137 int old = VARRAY_INT (regs->set_in_loop, regno);
3141 /* If N_SETS hit the limit, we can't rely on its value. */
3145 VARRAY_INT (regs->set_in_loop, regno) = 0;
3149 register enum rtx_code code;
3153 code = GET_CODE (p);
3155 /* If library call, skip to end of it. */
3156 if (code == INSN && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
3161 && (set = single_set (p))
3162 && GET_CODE (SET_DEST (set)) == REG
3163 && REGNO (SET_DEST (set)) == regno)
3165 this = loop_invariant_p (loop, SET_SRC (set));
3168 else if ((temp = find_reg_note (p, REG_EQUAL, NULL_RTX)))
3170 /* If this is a libcall, then any invariant REG_EQUAL note is OK.
3171 If this is an ordinary insn, then only CONSTANT_P REG_EQUAL
3173 this = (CONSTANT_P (XEXP (temp, 0))
3174 || (find_reg_note (p, REG_RETVAL, NULL_RTX)
3175 && loop_invariant_p (loop, XEXP (temp, 0))));
3182 else if (code != NOTE)
3184 VARRAY_INT (regs->set_in_loop, regno) = old;
3189 VARRAY_INT (regs->set_in_loop, regno) = old;
3190 /* If loop_invariant_p ever returned 2, we return 2. */
3191 return 1 + (value & 2);
3195 /* I don't think this condition is sufficient to allow INSN
3196 to be moved, so we no longer test it. */
3198 /* Return 1 if all insns in the basic block of INSN and following INSN
3199 that set REG are invariant according to TABLE. */
3202 all_sets_invariant_p (reg, insn, table)
3206 register rtx p = insn;
3207 register int regno = REGNO (reg);
3211 register enum rtx_code code;
3213 code = GET_CODE (p);
3214 if (code == CODE_LABEL || code == JUMP_INSN)
3216 if (code == INSN && GET_CODE (PATTERN (p)) == SET
3217 && GET_CODE (SET_DEST (PATTERN (p))) == REG
3218 && REGNO (SET_DEST (PATTERN (p))) == regno)
3220 if (! loop_invariant_p (loop, SET_SRC (PATTERN (p)), table))
3227 /* Look at all uses (not sets) of registers in X. For each, if it is
3228 the single use, set USAGE[REGNO] to INSN; if there was a previous use in
3229 a different insn, set USAGE[REGNO] to const0_rtx. */
3232 find_single_use_in_loop (insn, x, usage)
3237 enum rtx_code code = GET_CODE (x);
3238 const char *fmt = GET_RTX_FORMAT (code);
3242 VARRAY_RTX (usage, REGNO (x))
3243 = (VARRAY_RTX (usage, REGNO (x)) != 0
3244 && VARRAY_RTX (usage, REGNO (x)) != insn)
3245 ? const0_rtx : insn;
3247 else if (code == SET)
3249 /* Don't count SET_DEST if it is a REG; otherwise count things
3250 in SET_DEST because if a register is partially modified, it won't
3251 show up as a potential movable so we don't care how USAGE is set
3253 if (GET_CODE (SET_DEST (x)) != REG)
3254 find_single_use_in_loop (insn, SET_DEST (x), usage);
3255 find_single_use_in_loop (insn, SET_SRC (x), usage);
3258 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3260 if (fmt[i] == 'e' && XEXP (x, i) != 0)
3261 find_single_use_in_loop (insn, XEXP (x, i), usage);
3262 else if (fmt[i] == 'E')
3263 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3264 find_single_use_in_loop (insn, XVECEXP (x, i, j), usage);
3268 /* Count and record any set in X which is contained in INSN. Update
3269 MAY_NOT_MOVE and LAST_SET for any register set in X. */
3272 count_one_set (regs, insn, x, may_not_move, last_set)
3273 struct loop_regs *regs;
3275 varray_type may_not_move;
3278 if (GET_CODE (x) == CLOBBER && GET_CODE (XEXP (x, 0)) == REG)
3279 /* Don't move a reg that has an explicit clobber.
3280 It's not worth the pain to try to do it correctly. */
3281 VARRAY_CHAR (may_not_move, REGNO (XEXP (x, 0))) = 1;
3283 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
3285 rtx dest = SET_DEST (x);
3286 while (GET_CODE (dest) == SUBREG
3287 || GET_CODE (dest) == ZERO_EXTRACT
3288 || GET_CODE (dest) == SIGN_EXTRACT
3289 || GET_CODE (dest) == STRICT_LOW_PART)
3290 dest = XEXP (dest, 0);
3291 if (GET_CODE (dest) == REG)
3293 register int regno = REGNO (dest);
3294 /* If this is the first setting of this reg
3295 in current basic block, and it was set before,
3296 it must be set in two basic blocks, so it cannot
3297 be moved out of the loop. */
3298 if (VARRAY_INT (regs->set_in_loop, regno) > 0
3299 && last_set[regno] == 0)
3300 VARRAY_CHAR (may_not_move, regno) = 1;
3301 /* If this is not first setting in current basic block,
3302 see if reg was used in between previous one and this.
3303 If so, neither one can be moved. */
3304 if (last_set[regno] != 0
3305 && reg_used_between_p (dest, last_set[regno], insn))
3306 VARRAY_CHAR (may_not_move, regno) = 1;
3307 if (VARRAY_INT (regs->set_in_loop, regno) < 127)
3308 ++VARRAY_INT (regs->set_in_loop, regno);
3309 last_set[regno] = insn;
3314 /* Increment REGS->SET_IN_LOOP at the index of each register
3315 that is modified by an insn between FROM and TO.
3316 If the value of an element of REGS->SET_IN_LOOP becomes 127 or more,
3317 stop incrementing it, to avoid overflow.
3319 Store in SINGLE_USAGE[I] the single insn in which register I is
3320 used, if it is only used once. Otherwise, it is set to 0 (for no
3321 uses) or const0_rtx for more than one use. This parameter may be zero,
3322 in which case this processing is not done.
3324 Store in *COUNT_PTR the number of actual instruction
3325 in the loop. We use this to decide what is worth moving out. */
3327 /* last_set[n] is nonzero iff reg n has been set in the current basic block.
3328 In that case, it is the insn that last set reg n. */
3331 count_loop_regs_set (loop, may_not_move, single_usage, count_ptr, nregs)
3332 const struct loop *loop;
3333 varray_type may_not_move;
3334 varray_type single_usage;
3338 struct loop_regs *regs = LOOP_REGS (loop);
3339 register rtx *last_set = (rtx *) xcalloc (nregs, sizeof (rtx));
3341 register int count = 0;
3343 for (insn = loop->top ? loop->top : loop->start; insn != loop->end;
3344 insn = NEXT_INSN (insn))
3350 /* Record registers that have exactly one use. */
3351 find_single_use_in_loop (insn, PATTERN (insn), single_usage);
3353 /* Include uses in REG_EQUAL notes. */
3354 if (REG_NOTES (insn))
3355 find_single_use_in_loop (insn, REG_NOTES (insn), single_usage);
3357 if (GET_CODE (PATTERN (insn)) == SET
3358 || GET_CODE (PATTERN (insn)) == CLOBBER)
3359 count_one_set (regs, insn, PATTERN (insn), may_not_move, last_set);
3360 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
3363 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
3364 count_one_set (regs, insn, XVECEXP (PATTERN (insn), 0, i),
3365 may_not_move, last_set);
3369 if (GET_CODE (insn) == CODE_LABEL || GET_CODE (insn) == JUMP_INSN)
3370 memset ((char *) last_set, 0, nregs * sizeof (rtx));
3378 /* Given a loop that is bounded by LOOP->START and LOOP->END and that
3379 is entered at LOOP->SCAN_START, return 1 if the register set in SET
3380 contained in insn INSN is used by any insn that precedes INSN in
3381 cyclic order starting from the loop entry point.
3383 We don't want to use INSN_LUID here because if we restrict INSN to those
3384 that have a valid INSN_LUID, it means we cannot move an invariant out
3385 from an inner loop past two loops. */
3388 loop_reg_used_before_p (loop, set, insn)
3389 const struct loop *loop;
3392 rtx reg = SET_DEST (set);
3395 /* Scan forward checking for register usage. If we hit INSN, we
3396 are done. Otherwise, if we hit LOOP->END, wrap around to LOOP->START. */
3397 for (p = loop->scan_start; p != insn; p = NEXT_INSN (p))
3399 if (INSN_P (p) && reg_overlap_mentioned_p (reg, PATTERN (p)))
3409 /* A "basic induction variable" or biv is a pseudo reg that is set
3410 (within this loop) only by incrementing or decrementing it. */
3411 /* A "general induction variable" or giv is a pseudo reg whose
3412 value is a linear function of a biv. */
3414 /* Bivs are recognized by `basic_induction_var';
3415 Givs by `general_induction_var'. */
3417 /* Communication with routines called via `note_stores'. */
3419 static rtx note_insn;
3421 /* Dummy register to have non-zero DEST_REG for DEST_ADDR type givs. */
3423 static rtx addr_placeholder;
3425 /* ??? Unfinished optimizations, and possible future optimizations,
3426 for the strength reduction code. */
3428 /* ??? The interaction of biv elimination, and recognition of 'constant'
3429 bivs, may cause problems. */
3431 /* ??? Add heuristics so that DEST_ADDR strength reduction does not cause
3432 performance problems.
3434 Perhaps don't eliminate things that can be combined with an addressing
3435 mode. Find all givs that have the same biv, mult_val, and add_val;
3436 then for each giv, check to see if its only use dies in a following
3437 memory address. If so, generate a new memory address and check to see
3438 if it is valid. If it is valid, then store the modified memory address,
3439 otherwise, mark the giv as not done so that it will get its own iv. */
3441 /* ??? Could try to optimize branches when it is known that a biv is always
3444 /* ??? When replace a biv in a compare insn, we should replace with closest
3445 giv so that an optimized branch can still be recognized by the combiner,
3446 e.g. the VAX acb insn. */
3448 /* ??? Many of the checks involving uid_luid could be simplified if regscan
3449 was rerun in loop_optimize whenever a register was added or moved.
3450 Also, some of the optimizations could be a little less conservative. */
3452 /* Scan the loop body and call FNCALL for each insn. In the addition to the
3453 LOOP and INSN parameters pass MAYBE_MULTIPLE and NOT_EVERY_ITERATION to the
3456 NOT_EVERY_ITERATION if current insn is not executed at least once for every
3457 loop iteration except for the last one.
3459 MAYBE_MULTIPLE is 1 if current insn may be executed more than once for every
3463 for_each_insn_in_loop (loop, fncall)
3465 loop_insn_callback fncall;
3467 /* This is 1 if current insn is not executed at least once for every loop
3469 int not_every_iteration = 0;
3470 int maybe_multiple = 0;
3471 int past_loop_latch = 0;
3475 /* If loop_scan_start points to the loop exit test, we have to be wary of
3476 subversive use of gotos inside expression statements. */
3477 if (prev_nonnote_insn (loop->scan_start) != prev_nonnote_insn (loop->start))
3478 maybe_multiple = back_branch_in_range_p (loop, loop->scan_start);
3480 /* Scan through loop to find all possible bivs. */
3482 for (p = next_insn_in_loop (loop, loop->scan_start);
3484 p = next_insn_in_loop (loop, p))
3486 p = fncall (loop, p, not_every_iteration, maybe_multiple);
3488 /* Past CODE_LABEL, we get to insns that may be executed multiple
3489 times. The only way we can be sure that they can't is if every
3490 jump insn between here and the end of the loop either
3491 returns, exits the loop, is a jump to a location that is still
3492 behind the label, or is a jump to the loop start. */
3494 if (GET_CODE (p) == CODE_LABEL)
3502 insn = NEXT_INSN (insn);
3503 if (insn == loop->scan_start)
3505 if (insn == loop->end)
3511 if (insn == loop->scan_start)
3515 if (GET_CODE (insn) == JUMP_INSN
3516 && GET_CODE (PATTERN (insn)) != RETURN
3517 && (!any_condjump_p (insn)
3518 || (JUMP_LABEL (insn) != 0
3519 && JUMP_LABEL (insn) != loop->scan_start
3520 && !loop_insn_first_p (p, JUMP_LABEL (insn)))))
3528 /* Past a jump, we get to insns for which we can't count
3529 on whether they will be executed during each iteration. */
3530 /* This code appears twice in strength_reduce. There is also similar
3531 code in scan_loop. */
3532 if (GET_CODE (p) == JUMP_INSN
3533 /* If we enter the loop in the middle, and scan around to the
3534 beginning, don't set not_every_iteration for that.
3535 This can be any kind of jump, since we want to know if insns
3536 will be executed if the loop is executed. */
3537 && !(JUMP_LABEL (p) == loop->top
3538 && ((NEXT_INSN (NEXT_INSN (p)) == loop->end
3539 && any_uncondjump_p (p))
3540 || (NEXT_INSN (p) == loop->end && any_condjump_p (p)))))
3544 /* If this is a jump outside the loop, then it also doesn't
3545 matter. Check to see if the target of this branch is on the
3546 loop->exits_labels list. */
3548 for (label = loop->exit_labels; label; label = LABEL_NEXTREF (label))
3549 if (XEXP (label, 0) == JUMP_LABEL (p))
3553 not_every_iteration = 1;
3556 else if (GET_CODE (p) == NOTE)
3558 /* At the virtual top of a converted loop, insns are again known to
3559 be executed each iteration: logically, the loop begins here
3560 even though the exit code has been duplicated.
3562 Insns are also again known to be executed each iteration at
3563 the LOOP_CONT note. */
3564 if ((NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP
3565 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_CONT)
3567 not_every_iteration = 0;
3568 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
3570 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
3574 /* Note if we pass a loop latch. If we do, then we can not clear
3575 NOT_EVERY_ITERATION below when we pass the last CODE_LABEL in
3576 a loop since a jump before the last CODE_LABEL may have started
3577 a new loop iteration.
3579 Note that LOOP_TOP is only set for rotated loops and we need
3580 this check for all loops, so compare against the CODE_LABEL
3581 which immediately follows LOOP_START. */
3582 if (GET_CODE (p) == JUMP_INSN
3583 && JUMP_LABEL (p) == NEXT_INSN (loop->start))
3584 past_loop_latch = 1;
3586 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
3587 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
3588 or not an insn is known to be executed each iteration of the
3589 loop, whether or not any iterations are known to occur.
3591 Therefore, if we have just passed a label and have no more labels
3592 between here and the test insn of the loop, and we have not passed
3593 a jump to the top of the loop, then we know these insns will be
3594 executed each iteration. */
3596 if (not_every_iteration
3598 && GET_CODE (p) == CODE_LABEL
3599 && no_labels_between_p (p, loop->end)
3600 && loop_insn_first_p (p, loop->cont))
3601 not_every_iteration = 0;
3605 /* Perform strength reduction and induction variable elimination.
3607 Pseudo registers created during this function will be beyond the
3608 last valid index in several tables including regs->n_times_set and
3609 regno_last_uid. This does not cause a problem here, because the
3610 added registers cannot be givs outside of their loop, and hence
3611 will never be reconsidered. But scan_loop must check regnos to
3612 make sure they are in bounds. */
3615 strength_reduce (loop, insn_count, flags)
3620 struct loop_info *loop_info = LOOP_INFO (loop);
3621 struct loop_regs *regs = LOOP_REGS (loop);
3622 struct loop_ivs *ivs = LOOP_IVS (loop);
3624 /* Temporary list pointers for traversing ivs->loop_iv_list. */
3625 struct iv_class *bl, **backbl;
3626 /* Ratio of extra register life span we can justify
3627 for saving an instruction. More if loop doesn't call subroutines
3628 since in that case saving an insn makes more difference
3629 and more registers are available. */
3630 /* ??? could set this to last value of threshold in move_movables */
3631 int threshold = (loop_info->has_call ? 1 : 2) * (3 + n_non_fixed_regs);
3632 /* Map of pseudo-register replacements. */
3633 rtx *reg_map = NULL;
3637 rtx end_insert_before;
3638 int unrolled_insn_copies = 0;
3639 rtx loop_start = loop->start;
3640 rtx loop_end = loop->end;
3641 rtx test_reg = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 1);
3643 VARRAY_INT_INIT (ivs->reg_iv_type, max_reg_before_loop, "reg_iv_type");
3644 VARRAY_GENERIC_PTR_INIT (ivs->reg_iv_info, max_reg_before_loop, "reg_iv_info");
3645 ivs->reg_biv_class = (struct iv_class **)
3646 xcalloc (max_reg_before_loop, sizeof (struct iv_class *));
3648 ivs->loop_iv_list = 0;
3649 addr_placeholder = gen_reg_rtx (Pmode);
3651 /* Save insn immediately after the loop_end. Insns inserted after loop_end
3652 must be put before this insn, so that they will appear in the right
3653 order (i.e. loop order).
3655 If loop_end is the end of the current function, then emit a
3656 NOTE_INSN_DELETED after loop_end and set end_insert_before to the
3658 if (NEXT_INSN (loop_end) != 0)
3659 end_insert_before = NEXT_INSN (loop_end);
3661 end_insert_before = emit_note_after (NOTE_INSN_DELETED, loop_end);
3663 for_each_insn_in_loop (loop, check_insn_for_bivs);
3665 /* Scan ivs->loop_iv_list to remove all regs that proved not to be bivs.
3666 Make a sanity check against regs->n_times_set. */
3667 for (backbl = &ivs->loop_iv_list, bl = *backbl; bl; bl = bl->next)
3669 if (REG_IV_TYPE (ivs, bl->regno) != BASIC_INDUCT
3670 /* Above happens if register modified by subreg, etc. */
3671 /* Make sure it is not recognized as a basic induction var: */
3672 || VARRAY_INT (regs->n_times_set, bl->regno) != bl->biv_count
3673 /* If never incremented, it is invariant that we decided not to
3674 move. So leave it alone. */
3675 || ! bl->incremented)
3677 if (loop_dump_stream)
3678 fprintf (loop_dump_stream, "Reg %d: biv discarded, %s\n",
3680 (REG_IV_TYPE (ivs, bl->regno) != BASIC_INDUCT
3681 ? "not induction variable"
3682 : (! bl->incremented ? "never incremented"
3685 REG_IV_TYPE (ivs, bl->regno) = NOT_BASIC_INDUCT;
3692 if (loop_dump_stream)
3693 fprintf (loop_dump_stream, "Reg %d: biv verified\n", bl->regno);
3697 /* Exit if there are no bivs. */
3698 if (! ivs->loop_iv_list)
3700 /* Can still unroll the loop anyways, but indicate that there is no
3701 strength reduction info available. */
3702 if (flags & LOOP_UNROLL)
3703 unroll_loop (loop, insn_count, end_insert_before, 0);
3708 /* Find initial value for each biv by searching backwards from loop_start,
3709 halting at first label. Also record any test condition. */
3712 for (p = loop_start; p && GET_CODE (p) != CODE_LABEL; p = PREV_INSN (p))
3716 if (GET_CODE (p) == CALL_INSN)
3720 note_stores (PATTERN (p), record_initial, ivs);
3722 /* Record any test of a biv that branches around the loop if no store
3723 between it and the start of loop. We only care about tests with
3724 constants and registers and only certain of those. */
3725 if (GET_CODE (p) == JUMP_INSN
3726 && JUMP_LABEL (p) != 0
3727 && next_real_insn (JUMP_LABEL (p)) == next_real_insn (loop_end)
3728 && (test = get_condition_for_loop (loop, p)) != 0
3729 && GET_CODE (XEXP (test, 0)) == REG
3730 && REGNO (XEXP (test, 0)) < max_reg_before_loop
3731 && (bl = ivs->reg_biv_class[REGNO (XEXP (test, 0))]) != 0
3732 && valid_initial_value_p (XEXP (test, 1), p, call_seen, loop_start)
3733 && bl->init_insn == 0)
3735 /* If an NE test, we have an initial value! */
3736 if (GET_CODE (test) == NE)
3739 bl->init_set = gen_rtx_SET (VOIDmode,
3740 XEXP (test, 0), XEXP (test, 1));
3743 bl->initial_test = test;
3747 /* Look at the each biv and see if we can say anything better about its
3748 initial value from any initializing insns set up above. (This is done
3749 in two passes to avoid missing SETs in a PARALLEL.) */
3750 for (backbl = &ivs->loop_iv_list; (bl = *backbl); backbl = &bl->next)
3755 if (! bl->init_insn)
3758 /* IF INIT_INSN has a REG_EQUAL or REG_EQUIV note and the value
3759 is a constant, use the value of that. */
3760 if (((note = find_reg_note (bl->init_insn, REG_EQUAL, 0)) != NULL
3761 && CONSTANT_P (XEXP (note, 0)))
3762 || ((note = find_reg_note (bl->init_insn, REG_EQUIV, 0)) != NULL
3763 && CONSTANT_P (XEXP (note, 0))))
3764 src = XEXP (note, 0);
3766 src = SET_SRC (bl->init_set);
3768 if (loop_dump_stream)
3769 fprintf (loop_dump_stream,
3770 "Biv %d initialized at insn %d: initial value ",
3771 bl->regno, INSN_UID (bl->init_insn));
3773 if ((GET_MODE (src) == GET_MODE (regno_reg_rtx[bl->regno])
3774 || GET_MODE (src) == VOIDmode)
3775 && valid_initial_value_p (src, bl->init_insn, call_seen, loop_start))
3777 bl->initial_value = src;
3779 if (loop_dump_stream)
3781 if (GET_CODE (src) == CONST_INT)
3783 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, INTVAL (src));
3784 fputc ('\n', loop_dump_stream);
3788 print_rtl (loop_dump_stream, src);
3789 fprintf (loop_dump_stream, "\n");
3793 /* If we can't make it a giv,
3794 let biv keep initial value of "itself". */
3795 else if (loop_dump_stream)
3796 fprintf (loop_dump_stream, "is complex\n");
3799 /* Search the loop for general induction variables. */
3801 for_each_insn_in_loop (loop, check_insn_for_givs);
3803 /* Try to calculate and save the number of loop iterations. This is
3804 set to zero if the actual number can not be calculated. This must
3805 be called after all giv's have been identified, since otherwise it may
3806 fail if the iteration variable is a giv. */
3808 loop_iterations (loop);
3810 /* Now for each giv for which we still don't know whether or not it is
3811 replaceable, check to see if it is replaceable because its final value
3812 can be calculated. This must be done after loop_iterations is called,
3813 so that final_giv_value will work correctly. */
3815 for (bl = ivs->loop_iv_list; bl; bl = bl->next)
3817 struct induction *v;
3819 for (v = bl->giv; v; v = v->next_iv)
3820 if (! v->replaceable && ! v->not_replaceable)
3821 check_final_value (loop, v);
3824 /* Try to prove that the loop counter variable (if any) is always
3825 nonnegative; if so, record that fact with a REG_NONNEG note
3826 so that "decrement and branch until zero" insn can be used. */
3827 check_dbra_loop (loop, insn_count);
3829 /* Create reg_map to hold substitutions for replaceable giv regs.
3830 Some givs might have been made from biv increments, so look at
3831 ivs->reg_iv_type for a suitable size. */
3832 reg_map_size = ivs->reg_iv_type->num_elements;
3833 reg_map = (rtx *) xcalloc (reg_map_size, sizeof (rtx));
3835 /* Examine each iv class for feasibility of strength reduction/induction
3836 variable elimination. */
3838 for (bl = ivs->loop_iv_list; bl; bl = bl->next)
3840 struct induction *v;
3843 rtx final_value = 0;
3845 /* Test whether it will be possible to eliminate this biv
3846 provided all givs are reduced. This is possible if either
3847 the reg is not used outside the loop, or we can compute
3848 what its final value will be.
3850 For architectures with a decrement_and_branch_until_zero insn,
3851 don't do this if we put a REG_NONNEG note on the endtest for
3854 /* Compare against bl->init_insn rather than loop_start.
3855 We aren't concerned with any uses of the biv between
3856 init_insn and loop_start since these won't be affected
3857 by the value of the biv elsewhere in the function, so
3858 long as init_insn doesn't use the biv itself.
3859 March 14, 1989 -- self@bayes.arc.nasa.gov */
3861 if ((uid_luid[REGNO_LAST_UID (bl->regno)] < INSN_LUID (loop_end)
3863 && INSN_UID (bl->init_insn) < max_uid_for_loop
3864 && uid_luid[REGNO_FIRST_UID (bl->regno)] >= INSN_LUID (bl->init_insn)
3865 #ifdef HAVE_decrement_and_branch_until_zero
3868 && ! reg_mentioned_p (bl->biv->dest_reg, SET_SRC (bl->init_set)))
3869 || ((final_value = final_biv_value (loop, bl))
3870 #ifdef HAVE_decrement_and_branch_until_zero
3874 bl->eliminable = maybe_eliminate_biv (loop, bl, 0, threshold,
3878 if (loop_dump_stream)
3880 fprintf (loop_dump_stream,
3881 "Cannot eliminate biv %d.\n",
3883 fprintf (loop_dump_stream,
3884 "First use: insn %d, last use: insn %d.\n",
3885 REGNO_FIRST_UID (bl->regno),
3886 REGNO_LAST_UID (bl->regno));
3890 /* Check each extension dependant giv in this class to see if its
3891 root biv is safe from wrapping in the interior mode. */
3892 check_ext_dependant_givs (bl, loop_info);
3894 /* Combine all giv's for this iv_class. */
3895 combine_givs (regs, bl);
3897 /* This will be true at the end, if all givs which depend on this
3898 biv have been strength reduced.
3899 We can't (currently) eliminate the biv unless this is so. */
3902 /* Check each giv in this class to see if we will benefit by reducing
3903 it. Skip giv's combined with others. */
3904 for (v = bl->giv; v; v = v->next_iv)
3906 struct induction *tv;
3909 if (v->ignore || v->same)
3912 benefit = v->benefit;
3913 PUT_MODE (test_reg, v->mode);
3914 add_cost = iv_add_mult_cost (bl->biv->add_val, v->mult_val,
3915 test_reg, test_reg);
3917 /* Reduce benefit if not replaceable, since we will insert
3918 a move-insn to replace the insn that calculates this giv.
3919 Don't do this unless the giv is a user variable, since it
3920 will often be marked non-replaceable because of the duplication
3921 of the exit code outside the loop. In such a case, the copies
3922 we insert are dead and will be deleted. So they don't have
3923 a cost. Similar situations exist. */
3924 /* ??? The new final_[bg]iv_value code does a much better job
3925 of finding replaceable giv's, and hence this code may no longer
3927 if (! v->replaceable && ! bl->eliminable
3928 && REG_USERVAR_P (v->dest_reg))
3929 benefit -= copy_cost;
3931 /* Decrease the benefit to count the add-insns that we will
3932 insert to increment the reduced reg for the giv.
3933 ??? This can overestimate the run-time cost of the additional
3934 insns, e.g. if there are multiple basic blocks that increment
3935 the biv, but only one of these blocks is executed during each
3936 iteration. There is no good way to detect cases like this with
3937 the current structure of the loop optimizer.
3938 This code is more accurate for determining code size than
3939 run-time benefits. */
3940 benefit -= add_cost * bl->biv_count;
3942 /* Decide whether to strength-reduce this giv or to leave the code
3943 unchanged (recompute it from the biv each time it is used).
3944 This decision can be made independently for each giv. */
3947 /* Attempt to guess whether autoincrement will handle some of the
3948 new add insns; if so, increase BENEFIT (undo the subtraction of
3949 add_cost that was done above). */
3950 if (v->giv_type == DEST_ADDR
3951 /* Increasing the benefit is risky, since this is only a guess.
3952 Avoid increasing register pressure in cases where there would
3953 be no other benefit from reducing this giv. */
3955 && GET_CODE (v->mult_val) == CONST_INT)
3957 if (HAVE_POST_INCREMENT
3958 && INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
3959 benefit += add_cost * bl->biv_count;
3960 else if (HAVE_PRE_INCREMENT
3961 && INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
3962 benefit += add_cost * bl->biv_count;
3963 else if (HAVE_POST_DECREMENT
3964 && -INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
3965 benefit += add_cost * bl->biv_count;
3966 else if (HAVE_PRE_DECREMENT
3967 && -INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
3968 benefit += add_cost * bl->biv_count;
3972 /* If an insn is not to be strength reduced, then set its ignore
3973 flag, and clear all_reduced. */
3975 /* A giv that depends on a reversed biv must be reduced if it is
3976 used after the loop exit, otherwise, it would have the wrong
3977 value after the loop exit. To make it simple, just reduce all
3978 of such giv's whether or not we know they are used after the loop
3981 if ( ! flag_reduce_all_givs && v->lifetime * threshold * benefit < insn_count
3984 if (loop_dump_stream)
3985 fprintf (loop_dump_stream,
3986 "giv of insn %d not worth while, %d vs %d.\n",
3988 v->lifetime * threshold * benefit, insn_count);
3994 /* Check that we can increment the reduced giv without a
3995 multiply insn. If not, reject it. */
3997 for (tv = bl->biv; tv; tv = tv->next_iv)
3998 if (tv->mult_val == const1_rtx
3999 && ! product_cheap_p (tv->add_val, v->mult_val))
4001 if (loop_dump_stream)
4002 fprintf (loop_dump_stream,
4003 "giv of insn %d: would need a multiply.\n",
4004 INSN_UID (v->insn));
4012 /* Check for givs whose first use is their definition and whose
4013 last use is the definition of another giv. If so, it is likely
4014 dead and should not be used to derive another giv nor to
4016 for (v = bl->giv; v; v = v->next_iv)
4019 || (v->same && v->same->ignore))
4022 if (v->giv_type == DEST_REG
4023 && REGNO_FIRST_UID (REGNO (v->dest_reg)) == INSN_UID (v->insn))
4025 struct induction *v1;
4027 for (v1 = bl->giv; v1; v1 = v1->next_iv)
4028 if (REGNO_LAST_UID (REGNO (v->dest_reg)) == INSN_UID (v1->insn))
4033 /* Reduce each giv that we decided to reduce. */
4035 for (v = bl->giv; v; v = v->next_iv)
4037 struct induction *tv;
4038 if (! v->ignore && v->same == 0)
4040 int auto_inc_opt = 0;
4042 /* If the code for derived givs immediately below has already
4043 allocated a new_reg, we must keep it. */
4045 v->new_reg = gen_reg_rtx (v->mode);
4048 /* If the target has auto-increment addressing modes, and
4049 this is an address giv, then try to put the increment
4050 immediately after its use, so that flow can create an
4051 auto-increment addressing mode. */
4052 if (v->giv_type == DEST_ADDR && bl->biv_count == 1
4053 && bl->biv->always_executed && ! bl->biv->maybe_multiple
4054 /* We don't handle reversed biv's because bl->biv->insn
4055 does not have a valid INSN_LUID. */
4057 && v->always_executed && ! v->maybe_multiple
4058 && INSN_UID (v->insn) < max_uid_for_loop)
4060 /* If other giv's have been combined with this one, then
4061 this will work only if all uses of the other giv's occur
4062 before this giv's insn. This is difficult to check.
4064 We simplify this by looking for the common case where
4065 there is one DEST_REG giv, and this giv's insn is the
4066 last use of the dest_reg of that DEST_REG giv. If the
4067 increment occurs after the address giv, then we can
4068 perform the optimization. (Otherwise, the increment
4069 would have to go before other_giv, and we would not be
4070 able to combine it with the address giv to get an
4071 auto-inc address.) */
4072 if (v->combined_with)
4074 struct induction *other_giv = 0;
4076 for (tv = bl->giv; tv; tv = tv->next_iv)
4084 if (! tv && other_giv
4085 && REGNO (other_giv->dest_reg) < max_reg_before_loop
4086 && (REGNO_LAST_UID (REGNO (other_giv->dest_reg))
4087 == INSN_UID (v->insn))
4088 && INSN_LUID (v->insn) < INSN_LUID (bl->biv->insn))
4091 /* Check for case where increment is before the address
4092 giv. Do this test in "loop order". */
4093 else if ((INSN_LUID (v->insn) > INSN_LUID (bl->biv->insn)
4094 && (INSN_LUID (v->insn) < INSN_LUID (loop->scan_start)
4095 || (INSN_LUID (bl->biv->insn)
4096 > INSN_LUID (loop->scan_start))))
4097 || (INSN_LUID (v->insn) < INSN_LUID (loop->scan_start)
4098 && (INSN_LUID (loop->scan_start)
4099 < INSN_LUID (bl->biv->insn))))
4108 /* We can't put an insn immediately after one setting
4109 cc0, or immediately before one using cc0. */
4110 if ((auto_inc_opt == 1 && sets_cc0_p (PATTERN (v->insn)))
4111 || (auto_inc_opt == -1
4112 && (prev = prev_nonnote_insn (v->insn)) != 0
4114 && sets_cc0_p (PATTERN (prev))))
4120 v->auto_inc_opt = 1;
4124 /* For each place where the biv is incremented, add an insn
4125 to increment the new, reduced reg for the giv. */
4126 for (tv = bl->biv; tv; tv = tv->next_iv)
4131 insert_before = tv->insn;
4132 else if (auto_inc_opt == 1)
4133 insert_before = NEXT_INSN (v->insn);
4135 insert_before = v->insn;
4137 if (tv->mult_val == const1_rtx)
4138 emit_iv_add_mult (tv->add_val, v->mult_val,
4139 v->new_reg, v->new_reg, insert_before);
4140 else /* tv->mult_val == const0_rtx */
4141 /* A multiply is acceptable here
4142 since this is presumed to be seldom executed. */
4143 emit_iv_add_mult (tv->add_val, v->mult_val,
4144 v->add_val, v->new_reg, insert_before);
4147 /* Add code at loop start to initialize giv's reduced reg. */
4149 emit_iv_add_mult (extend_value_for_giv (v, bl->initial_value),
4150 v->mult_val, v->add_val, v->new_reg,
4155 /* Rescan all givs. If a giv is the same as a giv not reduced, mark it
4158 For each giv register that can be reduced now: if replaceable,
4159 substitute reduced reg wherever the old giv occurs;
4160 else add new move insn "giv_reg = reduced_reg". */
4162 for (v = bl->giv; v; v = v->next_iv)
4164 if (v->same && v->same->ignore)
4170 /* Update expression if this was combined, in case other giv was
4173 v->new_reg = replace_rtx (v->new_reg,
4174 v->same->dest_reg, v->same->new_reg);
4176 /* See if this register is known to be a pointer to something. If
4177 so, see if we can find the alignment. First see if there is a
4178 destination register that is a pointer. If so, this shares the
4179 alignment too. Next see if we can deduce anything from the
4180 computational information. If not, and this is a DEST_ADDR
4181 giv, at least we know that it's a pointer, though we don't know
4183 if (GET_CODE (v->new_reg) == REG
4184 && v->giv_type == DEST_REG
4185 && REGNO_POINTER_FLAG (REGNO (v->dest_reg)))
4186 mark_reg_pointer (v->new_reg,
4187 REGNO_POINTER_ALIGN (REGNO (v->dest_reg)));
4188 else if (GET_CODE (v->new_reg) == REG
4189 && REGNO_POINTER_FLAG (REGNO (v->src_reg)))
4191 unsigned int align = REGNO_POINTER_ALIGN (REGNO (v->src_reg));
4194 || GET_CODE (v->add_val) != CONST_INT
4195 || INTVAL (v->add_val) % (align / BITS_PER_UNIT) != 0)
4198 mark_reg_pointer (v->new_reg, align);
4200 else if (GET_CODE (v->new_reg) == REG
4201 && GET_CODE (v->add_val) == REG
4202 && REGNO_POINTER_FLAG (REGNO (v->add_val)))
4204 unsigned int align = REGNO_POINTER_ALIGN (REGNO (v->add_val));
4206 if (align == 0 || GET_CODE (v->mult_val) != CONST_INT
4207 || INTVAL (v->mult_val) % (align / BITS_PER_UNIT) != 0)
4210 mark_reg_pointer (v->new_reg, align);
4212 else if (GET_CODE (v->new_reg) == REG && v->giv_type == DEST_ADDR)
4213 mark_reg_pointer (v->new_reg, 0);
4215 if (v->giv_type == DEST_ADDR)
4216 /* Store reduced reg as the address in the memref where we found
4218 validate_change (v->insn, v->location, v->new_reg, 0);
4219 else if (v->replaceable)
4221 reg_map[REGNO (v->dest_reg)] = v->new_reg;
4224 /* I can no longer duplicate the original problem. Perhaps
4225 this is unnecessary now? */
4227 /* Replaceable; it isn't strictly necessary to delete the old
4228 insn and emit a new one, because v->dest_reg is now dead.
4230 However, especially when unrolling loops, the special
4231 handling for (set REG0 REG1) in the second cse pass may
4232 make v->dest_reg live again. To avoid this problem, emit
4233 an insn to set the original giv reg from the reduced giv.
4234 We can not delete the original insn, since it may be part
4235 of a LIBCALL, and the code in flow that eliminates dead
4236 libcalls will fail if it is deleted. */
4237 emit_insn_after (gen_move_insn (v->dest_reg, v->new_reg),
4243 /* Not replaceable; emit an insn to set the original giv reg from
4244 the reduced giv, same as above. */
4245 emit_insn_after (gen_move_insn (v->dest_reg, v->new_reg),
4249 /* When a loop is reversed, givs which depend on the reversed
4250 biv, and which are live outside the loop, must be set to their
4251 correct final value. This insn is only needed if the giv is
4252 not replaceable. The correct final value is the same as the
4253 value that the giv starts the reversed loop with. */
4254 if (bl->reversed && ! v->replaceable)
4255 emit_iv_add_mult (extend_value_for_giv (v, bl->initial_value),
4256 v->mult_val, v->add_val, v->dest_reg,
4258 else if (v->final_value)
4262 /* If the loop has multiple exits, emit the insn before the
4263 loop to ensure that it will always be executed no matter
4264 how the loop exits. Otherwise, emit the insn after the loop,
4265 since this is slightly more efficient. */
4266 if (loop->exit_count)
4267 insert_before = loop_start;
4269 insert_before = end_insert_before;
4270 emit_insn_before (gen_move_insn (v->dest_reg, v->final_value),
4274 /* If the insn to set the final value of the giv was emitted
4275 before the loop, then we must delete the insn inside the loop
4276 that sets it. If this is a LIBCALL, then we must delete
4277 every insn in the libcall. Note, however, that
4278 final_giv_value will only succeed when there are multiple
4279 exits if the giv is dead at each exit, hence it does not
4280 matter that the original insn remains because it is dead
4282 /* Delete the insn inside the loop that sets the giv since
4283 the giv is now set before (or after) the loop. */
4284 delete_insn (v->insn);
4288 if (loop_dump_stream)
4290 fprintf (loop_dump_stream, "giv at %d reduced to ",
4291 INSN_UID (v->insn));
4292 print_rtl (loop_dump_stream, v->new_reg);
4293 fprintf (loop_dump_stream, "\n");
4297 /* All the givs based on the biv bl have been reduced if they
4300 /* For each giv not marked as maybe dead that has been combined with a
4301 second giv, clear any "maybe dead" mark on that second giv.
4302 v->new_reg will either be or refer to the register of the giv it
4305 Doing this clearing avoids problems in biv elimination where a
4306 giv's new_reg is a complex value that can't be put in the insn but
4307 the giv combined with (with a reg as new_reg) is marked maybe_dead.
4308 Since the register will be used in either case, we'd prefer it be
4309 used from the simpler giv. */
4311 for (v = bl->giv; v; v = v->next_iv)
4312 if (! v->maybe_dead && v->same)
4313 v->same->maybe_dead = 0;
4315 /* Try to eliminate the biv, if it is a candidate.
4316 This won't work if ! all_reduced,
4317 since the givs we planned to use might not have been reduced.
4319 We have to be careful that we didn't initially think we could eliminate
4320 this biv because of a giv that we now think may be dead and shouldn't
4321 be used as a biv replacement.
4323 Also, there is the possibility that we may have a giv that looks
4324 like it can be used to eliminate a biv, but the resulting insn
4325 isn't valid. This can happen, for example, on the 88k, where a
4326 JUMP_INSN can compare a register only with zero. Attempts to
4327 replace it with a compare with a constant will fail.
4329 Note that in cases where this call fails, we may have replaced some
4330 of the occurrences of the biv with a giv, but no harm was done in
4331 doing so in the rare cases where it can occur. */
4333 if (all_reduced == 1 && bl->eliminable
4334 && maybe_eliminate_biv (loop, bl, 1, threshold, insn_count))
4336 /* ?? If we created a new test to bypass the loop entirely,
4337 or otherwise drop straight in, based on this test, then
4338 we might want to rewrite it also. This way some later
4339 pass has more hope of removing the initialization of this
4342 /* If final_value != 0, then the biv may be used after loop end
4343 and we must emit an insn to set it just in case.
4345 Reversed bivs already have an insn after the loop setting their
4346 value, so we don't need another one. We can't calculate the
4347 proper final value for such a biv here anyways. */
4348 if (final_value != 0 && ! bl->reversed)
4352 /* If the loop has multiple exits, emit the insn before the
4353 loop to ensure that it will always be executed no matter
4354 how the loop exits. Otherwise, emit the insn after the
4355 loop, since this is slightly more efficient. */
4356 if (loop->exit_count)
4357 insert_before = loop_start;
4359 insert_before = end_insert_before;
4361 emit_insn_before (gen_move_insn (bl->biv->dest_reg, final_value),
4366 /* Delete all of the instructions inside the loop which set
4367 the biv, as they are all dead. If is safe to delete them,
4368 because an insn setting a biv will never be part of a libcall. */
4369 /* However, deleting them will invalidate the regno_last_uid info,
4370 so keeping them around is more convenient. Final_biv_value
4371 will only succeed when there are multiple exits if the biv
4372 is dead at each exit, hence it does not matter that the original
4373 insn remains, because it is dead anyways. */
4374 for (v = bl->biv; v; v = v->next_iv)
4375 delete_insn (v->insn);
4378 if (loop_dump_stream)
4379 fprintf (loop_dump_stream, "Reg %d: biv eliminated\n",
4384 /* Go through all the instructions in the loop, making all the
4385 register substitutions scheduled in REG_MAP. */
4387 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
4388 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
4389 || GET_CODE (p) == CALL_INSN)
4391 replace_regs (PATTERN (p), reg_map, reg_map_size, 0);
4392 replace_regs (REG_NOTES (p), reg_map, reg_map_size, 0);
4396 if (loop_info->n_iterations > 0)
4398 /* When we completely unroll a loop we will likely not need the increment
4399 of the loop BIV and we will not need the conditional branch at the
4401 unrolled_insn_copies = insn_count - 2;
4404 /* When we completely unroll a loop on a HAVE_cc0 machine we will not
4405 need the comparison before the conditional branch at the end of the
4407 unrolled_insn_copies -= 1;
4410 /* We'll need one copy for each loop iteration. */
4411 unrolled_insn_copies *= loop_info->n_iterations;
4413 /* A little slop to account for the ability to remove initialization
4414 code, better CSE, and other secondary benefits of completely
4415 unrolling some loops. */
4416 unrolled_insn_copies -= 1;
4418 /* Clamp the value. */
4419 if (unrolled_insn_copies < 0)
4420 unrolled_insn_copies = 0;
4423 /* Unroll loops from within strength reduction so that we can use the
4424 induction variable information that strength_reduce has already
4425 collected. Always unroll loops that would be as small or smaller
4426 unrolled than when rolled. */
4427 if ((flags & LOOP_UNROLL)
4428 || (loop_info->n_iterations > 0
4429 && unrolled_insn_copies <= insn_count))
4430 unroll_loop (loop, insn_count, end_insert_before, 1);
4432 #ifdef HAVE_doloop_end
4433 if (HAVE_doloop_end && (flags & LOOP_BCT) && flag_branch_on_count_reg)
4434 doloop_optimize (loop);
4435 #endif /* HAVE_doloop_end */
4437 if (loop_dump_stream)
4438 fprintf (loop_dump_stream, "\n");
4441 VARRAY_FREE (ivs->reg_iv_type);
4442 VARRAY_FREE (ivs->reg_iv_info);
4443 free (ivs->reg_biv_class);
4445 struct iv_class *iv = ivs->loop_iv_list;
4448 struct iv_class *next = iv->next;
4449 struct induction *induction;
4450 struct induction *next_induction;
4452 for (induction = iv->biv; induction; induction = next_induction)
4454 next_induction = induction->next_iv;
4457 for (induction = iv->giv; induction; induction = next_induction)
4459 next_induction = induction->next_iv;
4471 /*Record all basic induction variables calculated in the insn. */
4473 check_insn_for_bivs (loop, p, not_every_iteration, maybe_multiple)
4476 int not_every_iteration;
4479 struct loop_ivs *ivs = LOOP_IVS (loop);
4486 if (GET_CODE (p) == INSN
4487 && (set = single_set (p))
4488 && GET_CODE (SET_DEST (set)) == REG)
4490 dest_reg = SET_DEST (set);
4491 if (REGNO (dest_reg) < max_reg_before_loop
4492 && REGNO (dest_reg) >= FIRST_PSEUDO_REGISTER
4493 && REG_IV_TYPE (ivs, REGNO (dest_reg)) != NOT_BASIC_INDUCT)
4495 if (basic_induction_var (loop, SET_SRC (set),
4496 GET_MODE (SET_SRC (set)),
4497 dest_reg, p, &inc_val, &mult_val,
4500 /* It is a possible basic induction variable.
4501 Create and initialize an induction structure for it. */
4504 = (struct induction *) xmalloc (sizeof (struct induction));
4506 record_biv (loop, v, p, dest_reg, inc_val, mult_val, location,
4507 not_every_iteration, maybe_multiple);
4508 REG_IV_TYPE (ivs, REGNO (dest_reg)) = BASIC_INDUCT;
4510 else if (REGNO (dest_reg) < max_reg_before_loop)
4511 REG_IV_TYPE (ivs, REGNO (dest_reg)) = NOT_BASIC_INDUCT;
4517 /* Record all givs calculated in the insn.
4518 A register is a giv if: it is only set once, it is a function of a
4519 biv and a constant (or invariant), and it is not a biv. */
4521 check_insn_for_givs (loop, p, not_every_iteration, maybe_multiple)
4524 int not_every_iteration;
4527 struct loop_regs *regs = LOOP_REGS (loop);
4530 /* Look for a general induction variable in a register. */
4531 if (GET_CODE (p) == INSN
4532 && (set = single_set (p))
4533 && GET_CODE (SET_DEST (set)) == REG
4534 && ! VARRAY_CHAR (regs->may_not_optimize, REGNO (SET_DEST (set))))
4543 rtx last_consec_insn;
4545 dest_reg = SET_DEST (set);
4546 if (REGNO (dest_reg) < FIRST_PSEUDO_REGISTER)
4549 if (/* SET_SRC is a giv. */
4550 (general_induction_var (loop, SET_SRC (set), &src_reg, &add_val,
4551 &mult_val, &ext_val, 0, &benefit, VOIDmode)
4552 /* Equivalent expression is a giv. */
4553 || ((regnote = find_reg_note (p, REG_EQUAL, NULL_RTX))
4554 && general_induction_var (loop, XEXP (regnote, 0), &src_reg,
4555 &add_val, &mult_val, &ext_val, 0,
4556 &benefit, VOIDmode)))
4557 /* Don't try to handle any regs made by loop optimization.
4558 We have nothing on them in regno_first_uid, etc. */
4559 && REGNO (dest_reg) < max_reg_before_loop
4560 /* Don't recognize a BASIC_INDUCT_VAR here. */
4561 && dest_reg != src_reg
4562 /* This must be the only place where the register is set. */
4563 && (VARRAY_INT (regs->n_times_set, REGNO (dest_reg)) == 1
4564 /* or all sets must be consecutive and make a giv. */
4565 || (benefit = consec_sets_giv (loop, benefit, p,
4567 &add_val, &mult_val, &ext_val,
4568 &last_consec_insn))))
4571 = (struct induction *) xmalloc (sizeof (struct induction));
4573 /* If this is a library call, increase benefit. */
4574 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
4575 benefit += libcall_benefit (p);
4577 /* Skip the consecutive insns, if there are any. */
4578 if (VARRAY_INT (regs->n_times_set, REGNO (dest_reg)) != 1)
4579 p = last_consec_insn;
4581 record_giv (loop, v, p, src_reg, dest_reg, mult_val, add_val,
4582 ext_val, benefit, DEST_REG, not_every_iteration,
4583 maybe_multiple, NULL_PTR);
4588 #ifndef DONT_REDUCE_ADDR
4589 /* Look for givs which are memory addresses. */
4590 /* This resulted in worse code on a VAX 8600. I wonder if it
4592 if (GET_CODE (p) == INSN)
4593 find_mem_givs (loop, PATTERN (p), p, not_every_iteration,
4597 /* Update the status of whether giv can derive other givs. This can
4598 change when we pass a label or an insn that updates a biv. */
4599 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
4600 || GET_CODE (p) == CODE_LABEL)
4601 update_giv_derive (loop, p);
4605 /* Return 1 if X is a valid source for an initial value (or as value being
4606 compared against in an initial test).
4608 X must be either a register or constant and must not be clobbered between
4609 the current insn and the start of the loop.
4611 INSN is the insn containing X. */
4614 valid_initial_value_p (x, insn, call_seen, loop_start)
4623 /* Only consider pseudos we know about initialized in insns whose luids
4625 if (GET_CODE (x) != REG
4626 || REGNO (x) >= max_reg_before_loop)
4629 /* Don't use call-clobbered registers across a call which clobbers it. On
4630 some machines, don't use any hard registers at all. */
4631 if (REGNO (x) < FIRST_PSEUDO_REGISTER
4632 && (SMALL_REGISTER_CLASSES
4633 || (call_used_regs[REGNO (x)] && call_seen)))
4636 /* Don't use registers that have been clobbered before the start of the
4638 if (reg_set_between_p (x, insn, loop_start))
4644 /* Scan X for memory refs and check each memory address
4645 as a possible giv. INSN is the insn whose pattern X comes from.
4646 NOT_EVERY_ITERATION is 1 if the insn might not be executed during
4647 every loop iteration. MAYBE_MULTIPLE is 1 if the insn might be executed
4648 more thanonce in each loop iteration. */
4651 find_mem_givs (loop, x, insn, not_every_iteration, maybe_multiple)
4652 const struct loop *loop;
4655 int not_every_iteration, maybe_multiple;
4658 register enum rtx_code code;
4659 register const char *fmt;
4664 code = GET_CODE (x);
4689 /* This code used to disable creating GIVs with mult_val == 1 and
4690 add_val == 0. However, this leads to lost optimizations when
4691 it comes time to combine a set of related DEST_ADDR GIVs, since
4692 this one would not be seen. */
4694 if (general_induction_var (loop, XEXP (x, 0), &src_reg, &add_val,
4695 &mult_val, &ext_val, 1, &benefit,
4698 /* Found one; record it. */
4700 = (struct induction *) xmalloc (sizeof (struct induction));
4702 record_giv (loop, v, insn, src_reg, addr_placeholder, mult_val,
4703 add_val, ext_val, benefit, DEST_ADDR,
4704 not_every_iteration, maybe_multiple, &XEXP (x, 0));
4706 v->mem_mode = GET_MODE (x);
4715 /* Recursively scan the subexpressions for other mem refs. */
4717 fmt = GET_RTX_FORMAT (code);
4718 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4720 find_mem_givs (loop, XEXP (x, i), insn, not_every_iteration,
4722 else if (fmt[i] == 'E')
4723 for (j = 0; j < XVECLEN (x, i); j++)
4724 find_mem_givs (loop, XVECEXP (x, i, j), insn, not_every_iteration,
4728 /* Fill in the data about one biv update.
4729 V is the `struct induction' in which we record the biv. (It is
4730 allocated by the caller, with alloca.)
4731 INSN is the insn that sets it.
4732 DEST_REG is the biv's reg.
4734 MULT_VAL is const1_rtx if the biv is being incremented here, in which case
4735 INC_VAL is the increment. Otherwise, MULT_VAL is const0_rtx and the biv is
4736 being set to INC_VAL.
4738 NOT_EVERY_ITERATION is nonzero if this biv update is not know to be
4739 executed every iteration; MAYBE_MULTIPLE is nonzero if this biv update
4740 can be executed more than once per iteration. If MAYBE_MULTIPLE
4741 and NOT_EVERY_ITERATION are both zero, we know that the biv update is
4742 executed exactly once per iteration. */
4745 record_biv (loop, v, insn, dest_reg, inc_val, mult_val, location,
4746 not_every_iteration, maybe_multiple)
4748 struct induction *v;
4754 int not_every_iteration;
4757 struct loop_ivs *ivs = LOOP_IVS (loop);
4758 struct iv_class *bl;
4761 v->src_reg = dest_reg;
4762 v->dest_reg = dest_reg;
4763 v->mult_val = mult_val;
4764 v->add_val = inc_val;
4765 v->ext_dependant = NULL_RTX;
4766 v->location = location;
4767 v->mode = GET_MODE (dest_reg);
4768 v->always_computable = ! not_every_iteration;
4769 v->always_executed = ! not_every_iteration;
4770 v->maybe_multiple = maybe_multiple;
4772 /* Add this to the reg's iv_class, creating a class
4773 if this is the first incrementation of the reg. */
4775 bl = ivs->reg_biv_class[REGNO (dest_reg)];
4778 /* Create and initialize new iv_class. */
4780 bl = (struct iv_class *) xmalloc (sizeof (struct iv_class));
4782 bl->regno = REGNO (dest_reg);
4788 /* Set initial value to the reg itself. */
4789 bl->initial_value = dest_reg;
4790 /* We haven't seen the initializing insn yet */
4793 bl->initial_test = 0;
4794 bl->incremented = 0;
4798 bl->total_benefit = 0;
4800 /* Add this class to ivs->loop_iv_list. */
4801 bl->next = ivs->loop_iv_list;
4802 ivs->loop_iv_list = bl;
4804 /* Put it in the array of biv register classes. */
4805 ivs->reg_biv_class[REGNO (dest_reg)] = bl;
4808 /* Update IV_CLASS entry for this biv. */
4809 v->next_iv = bl->biv;
4812 if (mult_val == const1_rtx)
4813 bl->incremented = 1;
4815 if (loop_dump_stream)
4817 fprintf (loop_dump_stream,
4818 "Insn %d: possible biv, reg %d,",
4819 INSN_UID (insn), REGNO (dest_reg));
4820 if (GET_CODE (inc_val) == CONST_INT)
4822 fprintf (loop_dump_stream, " const =");
4823 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, INTVAL (inc_val));
4824 fputc ('\n', loop_dump_stream);
4828 fprintf (loop_dump_stream, " const = ");
4829 print_rtl (loop_dump_stream, inc_val);
4830 fprintf (loop_dump_stream, "\n");
4835 /* Fill in the data about one giv.
4836 V is the `struct induction' in which we record the giv. (It is
4837 allocated by the caller, with alloca.)
4838 INSN is the insn that sets it.
4839 BENEFIT estimates the savings from deleting this insn.
4840 TYPE is DEST_REG or DEST_ADDR; it says whether the giv is computed
4841 into a register or is used as a memory address.
4843 SRC_REG is the biv reg which the giv is computed from.
4844 DEST_REG is the giv's reg (if the giv is stored in a reg).
4845 MULT_VAL and ADD_VAL are the coefficients used to compute the giv.
4846 LOCATION points to the place where this giv's value appears in INSN. */
4849 record_giv (loop, v, insn, src_reg, dest_reg, mult_val, add_val, ext_val,
4850 benefit, type, not_every_iteration, maybe_multiple, location)
4851 const struct loop *loop;
4852 struct induction *v;
4856 rtx mult_val, add_val, ext_val;
4859 int not_every_iteration, maybe_multiple;
4862 struct loop_ivs *ivs = LOOP_IVS (loop);
4863 struct induction *b;
4864 struct iv_class *bl;
4865 rtx set = single_set (insn);
4868 /* Attempt to prove constantness of the values. */
4869 temp = simplify_rtx (add_val);
4874 v->src_reg = src_reg;
4876 v->dest_reg = dest_reg;
4877 v->mult_val = mult_val;
4878 v->add_val = add_val;
4879 v->ext_dependant = ext_val;
4880 v->benefit = benefit;
4881 v->location = location;
4883 v->combined_with = 0;
4884 v->maybe_multiple = maybe_multiple;
4886 v->derive_adjustment = 0;
4892 v->auto_inc_opt = 0;
4896 /* The v->always_computable field is used in update_giv_derive, to
4897 determine whether a giv can be used to derive another giv. For a
4898 DEST_REG giv, INSN computes a new value for the giv, so its value
4899 isn't computable if INSN insn't executed every iteration.
4900 However, for a DEST_ADDR giv, INSN merely uses the value of the giv;
4901 it does not compute a new value. Hence the value is always computable
4902 regardless of whether INSN is executed each iteration. */
4904 if (type == DEST_ADDR)
4905 v->always_computable = 1;
4907 v->always_computable = ! not_every_iteration;
4909 v->always_executed = ! not_every_iteration;
4911 if (type == DEST_ADDR)
4913 v->mode = GET_MODE (*location);
4916 else /* type == DEST_REG */
4918 v->mode = GET_MODE (SET_DEST (set));
4920 v->lifetime = (uid_luid[REGNO_LAST_UID (REGNO (dest_reg))]
4921 - uid_luid[REGNO_FIRST_UID (REGNO (dest_reg))]);
4923 /* If the lifetime is zero, it means that this register is
4924 really a dead store. So mark this as a giv that can be
4925 ignored. This will not prevent the biv from being eliminated. */
4926 if (v->lifetime == 0)
4929 REG_IV_TYPE (ivs, REGNO (dest_reg)) = GENERAL_INDUCT;
4930 REG_IV_INFO (ivs, REGNO (dest_reg)) = v;
4933 /* Add the giv to the class of givs computed from one biv. */
4935 bl = ivs->reg_biv_class[REGNO (src_reg)];
4938 v->next_iv = bl->giv;
4940 /* Don't count DEST_ADDR. This is supposed to count the number of
4941 insns that calculate givs. */
4942 if (type == DEST_REG)
4944 bl->total_benefit += benefit;
4947 /* Fatal error, biv missing for this giv? */
4950 if (type == DEST_ADDR)
4954 /* The giv can be replaced outright by the reduced register only if all
4955 of the following conditions are true:
4956 - the insn that sets the giv is always executed on any iteration
4957 on which the giv is used at all
4958 (there are two ways to deduce this:
4959 either the insn is executed on every iteration,
4960 or all uses follow that insn in the same basic block),
4961 - the giv is not used outside the loop
4962 - no assignments to the biv occur during the giv's lifetime. */
4964 if (REGNO_FIRST_UID (REGNO (dest_reg)) == INSN_UID (insn)
4965 /* Previous line always fails if INSN was moved by loop opt. */
4966 && uid_luid[REGNO_LAST_UID (REGNO (dest_reg))]
4967 < INSN_LUID (loop->end)
4968 && (! not_every_iteration
4969 || last_use_this_basic_block (dest_reg, insn)))
4971 /* Now check that there are no assignments to the biv within the
4972 giv's lifetime. This requires two separate checks. */
4974 /* Check each biv update, and fail if any are between the first
4975 and last use of the giv.
4977 If this loop contains an inner loop that was unrolled, then
4978 the insn modifying the biv may have been emitted by the loop
4979 unrolling code, and hence does not have a valid luid. Just
4980 mark the biv as not replaceable in this case. It is not very
4981 useful as a biv, because it is used in two different loops.
4982 It is very unlikely that we would be able to optimize the giv
4983 using this biv anyways. */
4986 for (b = bl->biv; b; b = b->next_iv)
4988 if (INSN_UID (b->insn) >= max_uid_for_loop
4989 || ((uid_luid[INSN_UID (b->insn)]
4990 >= uid_luid[REGNO_FIRST_UID (REGNO (dest_reg))])
4991 && (uid_luid[INSN_UID (b->insn)]
4992 <= uid_luid[REGNO_LAST_UID (REGNO (dest_reg))])))
4995 v->not_replaceable = 1;
5000 /* If there are any backwards branches that go from after the
5001 biv update to before it, then this giv is not replaceable. */
5003 for (b = bl->biv; b; b = b->next_iv)
5004 if (back_branch_in_range_p (loop, b->insn))
5007 v->not_replaceable = 1;
5013 /* May still be replaceable, we don't have enough info here to
5016 v->not_replaceable = 0;
5020 /* Record whether the add_val contains a const_int, for later use by
5025 v->no_const_addval = 1;
5026 if (tem == const0_rtx)
5028 else if (CONSTANT_P (add_val))
5029 v->no_const_addval = 0;
5030 if (GET_CODE (tem) == PLUS)
5034 if (GET_CODE (XEXP (tem, 0)) == PLUS)
5035 tem = XEXP (tem, 0);
5036 else if (GET_CODE (XEXP (tem, 1)) == PLUS)
5037 tem = XEXP (tem, 1);
5041 if (CONSTANT_P (XEXP (tem, 1)))
5042 v->no_const_addval = 0;
5046 if (loop_dump_stream)
5048 if (type == DEST_REG)
5049 fprintf (loop_dump_stream, "Insn %d: giv reg %d",
5050 INSN_UID (insn), REGNO (dest_reg));
5052 fprintf (loop_dump_stream, "Insn %d: dest address",
5055 fprintf (loop_dump_stream, " src reg %d benefit %d",
5056 REGNO (src_reg), v->benefit);
5057 fprintf (loop_dump_stream, " lifetime %d",
5061 fprintf (loop_dump_stream, " replaceable");
5063 if (v->no_const_addval)
5064 fprintf (loop_dump_stream, " ncav");
5066 if (v->ext_dependant)
5068 switch (GET_CODE (v->ext_dependant))
5071 fprintf (loop_dump_stream, " ext se");
5074 fprintf (loop_dump_stream, " ext ze");
5077 fprintf (loop_dump_stream, " ext tr");
5084 if (GET_CODE (mult_val) == CONST_INT)
5086 fprintf (loop_dump_stream, " mult ");
5087 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, INTVAL (mult_val));
5091 fprintf (loop_dump_stream, " mult ");
5092 print_rtl (loop_dump_stream, mult_val);
5095 if (GET_CODE (add_val) == CONST_INT)
5097 fprintf (loop_dump_stream, " add ");
5098 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, INTVAL (add_val));
5102 fprintf (loop_dump_stream, " add ");
5103 print_rtl (loop_dump_stream, add_val);
5107 if (loop_dump_stream)
5108 fprintf (loop_dump_stream, "\n");
5112 /* All this does is determine whether a giv can be made replaceable because
5113 its final value can be calculated. This code can not be part of record_giv
5114 above, because final_giv_value requires that the number of loop iterations
5115 be known, and that can not be accurately calculated until after all givs
5116 have been identified. */
5119 check_final_value (loop, v)
5120 const struct loop *loop;
5121 struct induction *v;
5123 struct loop_ivs *ivs = LOOP_IVS (loop);
5124 struct iv_class *bl;
5125 rtx final_value = 0;
5127 bl = ivs->reg_biv_class[REGNO (v->src_reg)];
5129 /* DEST_ADDR givs will never reach here, because they are always marked
5130 replaceable above in record_giv. */
5132 /* The giv can be replaced outright by the reduced register only if all
5133 of the following conditions are true:
5134 - the insn that sets the giv is always executed on any iteration
5135 on which the giv is used at all
5136 (there are two ways to deduce this:
5137 either the insn is executed on every iteration,
5138 or all uses follow that insn in the same basic block),
5139 - its final value can be calculated (this condition is different
5140 than the one above in record_giv)
5141 - it's not used before the it's set
5142 - no assignments to the biv occur during the giv's lifetime. */
5145 /* This is only called now when replaceable is known to be false. */
5146 /* Clear replaceable, so that it won't confuse final_giv_value. */
5150 if ((final_value = final_giv_value (loop, v))
5151 && (v->always_computable || last_use_this_basic_block (v->dest_reg, v->insn)))
5153 int biv_increment_seen = 0, before_giv_insn = 0;
5159 /* When trying to determine whether or not a biv increment occurs
5160 during the lifetime of the giv, we can ignore uses of the variable
5161 outside the loop because final_value is true. Hence we can not
5162 use regno_last_uid and regno_first_uid as above in record_giv. */
5164 /* Search the loop to determine whether any assignments to the
5165 biv occur during the giv's lifetime. Start with the insn
5166 that sets the giv, and search around the loop until we come
5167 back to that insn again.
5169 Also fail if there is a jump within the giv's lifetime that jumps
5170 to somewhere outside the lifetime but still within the loop. This
5171 catches spaghetti code where the execution order is not linear, and
5172 hence the above test fails. Here we assume that the giv lifetime
5173 does not extend from one iteration of the loop to the next, so as
5174 to make the test easier. Since the lifetime isn't known yet,
5175 this requires two loops. See also record_giv above. */
5177 last_giv_use = v->insn;
5184 before_giv_insn = 1;
5185 p = NEXT_INSN (loop->start);
5190 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
5191 || GET_CODE (p) == CALL_INSN)
5193 /* It is possible for the BIV increment to use the GIV if we
5194 have a cycle. Thus we must be sure to check each insn for
5195 both BIV and GIV uses, and we must check for BIV uses
5198 if (! biv_increment_seen
5199 && reg_set_p (v->src_reg, PATTERN (p)))
5200 biv_increment_seen = 1;
5202 if (reg_mentioned_p (v->dest_reg, PATTERN (p)))
5204 if (biv_increment_seen || before_giv_insn)
5207 v->not_replaceable = 1;
5215 /* Now that the lifetime of the giv is known, check for branches
5216 from within the lifetime to outside the lifetime if it is still
5226 p = NEXT_INSN (loop->start);
5227 if (p == last_giv_use)
5230 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p)
5231 && LABEL_NAME (JUMP_LABEL (p))
5232 && ((loop_insn_first_p (JUMP_LABEL (p), v->insn)
5233 && loop_insn_first_p (loop->start, JUMP_LABEL (p)))
5234 || (loop_insn_first_p (last_giv_use, JUMP_LABEL (p))
5235 && loop_insn_first_p (JUMP_LABEL (p), loop->end))))
5238 v->not_replaceable = 1;
5240 if (loop_dump_stream)
5241 fprintf (loop_dump_stream,
5242 "Found branch outside giv lifetime.\n");
5249 /* If it is replaceable, then save the final value. */
5251 v->final_value = final_value;
5254 if (loop_dump_stream && v->replaceable)
5255 fprintf (loop_dump_stream, "Insn %d: giv reg %d final_value replaceable\n",
5256 INSN_UID (v->insn), REGNO (v->dest_reg));
5259 /* Update the status of whether a giv can derive other givs.
5261 We need to do something special if there is or may be an update to the biv
5262 between the time the giv is defined and the time it is used to derive
5265 In addition, a giv that is only conditionally set is not allowed to
5266 derive another giv once a label has been passed.
5268 The cases we look at are when a label or an update to a biv is passed. */
5271 update_giv_derive (loop, p)
5272 const struct loop *loop;
5275 struct loop_ivs *ivs = LOOP_IVS (loop);
5276 struct iv_class *bl;
5277 struct induction *biv, *giv;
5281 /* Search all IV classes, then all bivs, and finally all givs.
5283 There are three cases we are concerned with. First we have the situation
5284 of a giv that is only updated conditionally. In that case, it may not
5285 derive any givs after a label is passed.
5287 The second case is when a biv update occurs, or may occur, after the
5288 definition of a giv. For certain biv updates (see below) that are
5289 known to occur between the giv definition and use, we can adjust the
5290 giv definition. For others, or when the biv update is conditional,
5291 we must prevent the giv from deriving any other givs. There are two
5292 sub-cases within this case.
5294 If this is a label, we are concerned with any biv update that is done
5295 conditionally, since it may be done after the giv is defined followed by
5296 a branch here (actually, we need to pass both a jump and a label, but
5297 this extra tracking doesn't seem worth it).
5299 If this is a jump, we are concerned about any biv update that may be
5300 executed multiple times. We are actually only concerned about
5301 backward jumps, but it is probably not worth performing the test
5302 on the jump again here.
5304 If this is a biv update, we must adjust the giv status to show that a
5305 subsequent biv update was performed. If this adjustment cannot be done,
5306 the giv cannot derive further givs. */
5308 for (bl = ivs->loop_iv_list; bl; bl = bl->next)
5309 for (biv = bl->biv; biv; biv = biv->next_iv)
5310 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN
5313 for (giv = bl->giv; giv; giv = giv->next_iv)
5315 /* If cant_derive is already true, there is no point in
5316 checking all of these conditions again. */
5317 if (giv->cant_derive)
5320 /* If this giv is conditionally set and we have passed a label,
5321 it cannot derive anything. */
5322 if (GET_CODE (p) == CODE_LABEL && ! giv->always_computable)
5323 giv->cant_derive = 1;
5325 /* Skip givs that have mult_val == 0, since
5326 they are really invariants. Also skip those that are
5327 replaceable, since we know their lifetime doesn't contain
5329 else if (giv->mult_val == const0_rtx || giv->replaceable)
5332 /* The only way we can allow this giv to derive another
5333 is if this is a biv increment and we can form the product
5334 of biv->add_val and giv->mult_val. In this case, we will
5335 be able to compute a compensation. */
5336 else if (biv->insn == p)
5341 if (biv->mult_val == const1_rtx)
5342 tem = simplify_giv_expr (loop,
5343 gen_rtx_MULT (giv->mode,
5346 &ext_val_dummy, &dummy);
5348 if (tem && giv->derive_adjustment)
5349 tem = simplify_giv_expr
5351 gen_rtx_PLUS (giv->mode, tem, giv->derive_adjustment),
5352 &ext_val_dummy, &dummy);
5355 giv->derive_adjustment = tem;
5357 giv->cant_derive = 1;
5359 else if ((GET_CODE (p) == CODE_LABEL && ! biv->always_computable)
5360 || (GET_CODE (p) == JUMP_INSN && biv->maybe_multiple))
5361 giv->cant_derive = 1;
5366 /* Check whether an insn is an increment legitimate for a basic induction var.
5367 X is the source of insn P, or a part of it.
5368 MODE is the mode in which X should be interpreted.
5370 DEST_REG is the putative biv, also the destination of the insn.
5371 We accept patterns of these forms:
5372 REG = REG + INVARIANT (includes REG = REG - CONSTANT)
5373 REG = INVARIANT + REG
5375 If X is suitable, we return 1, set *MULT_VAL to CONST1_RTX,
5376 store the additive term into *INC_VAL, and store the place where
5377 we found the additive term into *LOCATION.
5379 If X is an assignment of an invariant into DEST_REG, we set
5380 *MULT_VAL to CONST0_RTX, and store the invariant into *INC_VAL.
5382 We also want to detect a BIV when it corresponds to a variable
5383 whose mode was promoted via PROMOTED_MODE. In that case, an increment
5384 of the variable may be a PLUS that adds a SUBREG of that variable to
5385 an invariant and then sign- or zero-extends the result of the PLUS
5388 Most GIVs in such cases will be in the promoted mode, since that is the
5389 probably the natural computation mode (and almost certainly the mode
5390 used for addresses) on the machine. So we view the pseudo-reg containing
5391 the variable as the BIV, as if it were simply incremented.
5393 Note that treating the entire pseudo as a BIV will result in making
5394 simple increments to any GIVs based on it. However, if the variable
5395 overflows in its declared mode but not its promoted mode, the result will
5396 be incorrect. This is acceptable if the variable is signed, since
5397 overflows in such cases are undefined, but not if it is unsigned, since
5398 those overflows are defined. So we only check for SIGN_EXTEND and
5401 If we cannot find a biv, we return 0. */
5404 basic_induction_var (loop, x, mode, dest_reg, p, inc_val, mult_val, location)
5405 const struct loop *loop;
5407 enum machine_mode mode;
5414 register enum rtx_code code;
5418 code = GET_CODE (x);
5423 if (rtx_equal_p (XEXP (x, 0), dest_reg)
5424 || (GET_CODE (XEXP (x, 0)) == SUBREG
5425 && SUBREG_PROMOTED_VAR_P (XEXP (x, 0))
5426 && SUBREG_REG (XEXP (x, 0)) == dest_reg))
5428 argp = &XEXP (x, 1);
5430 else if (rtx_equal_p (XEXP (x, 1), dest_reg)
5431 || (GET_CODE (XEXP (x, 1)) == SUBREG
5432 && SUBREG_PROMOTED_VAR_P (XEXP (x, 1))
5433 && SUBREG_REG (XEXP (x, 1)) == dest_reg))
5435 argp = &XEXP (x, 0);
5441 if (loop_invariant_p (loop, arg) != 1)
5444 *inc_val = convert_modes (GET_MODE (dest_reg), GET_MODE (x), arg, 0);
5445 *mult_val = const1_rtx;
5450 /* If this is a SUBREG for a promoted variable, check the inner
5452 if (SUBREG_PROMOTED_VAR_P (x))
5453 return basic_induction_var (loop, SUBREG_REG (x),
5454 GET_MODE (SUBREG_REG (x)),
5455 dest_reg, p, inc_val, mult_val, location);
5459 /* If this register is assigned in a previous insn, look at its
5460 source, but don't go outside the loop or past a label. */
5462 /* If this sets a register to itself, we would repeat any previous
5463 biv increment if we applied this strategy blindly. */
5464 if (rtx_equal_p (dest_reg, x))
5472 insn = PREV_INSN (insn);
5474 while (insn && GET_CODE (insn) == NOTE
5475 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG);
5479 set = single_set (insn);
5483 if ((SET_DEST (set) == x
5484 || (GET_CODE (SET_DEST (set)) == SUBREG
5485 && (GET_MODE_SIZE (GET_MODE (SET_DEST (set)))
5487 && (GET_MODE_CLASS (GET_MODE (SET_DEST (set)))
5489 && SUBREG_REG (SET_DEST (set)) == x)))
5490 return basic_induction_var (loop, SET_SRC (set),
5491 (GET_MODE (SET_SRC (set)) == VOIDmode
5493 : GET_MODE (SET_SRC (set))),
5495 inc_val, mult_val, location);
5499 /* Can accept constant setting of biv only when inside inner most loop.
5500 Otherwise, a biv of an inner loop may be incorrectly recognized
5501 as a biv of the outer loop,
5502 causing code to be moved INTO the inner loop. */
5504 if (loop_invariant_p (loop, x) != 1)
5509 /* convert_modes aborts if we try to convert to or from CCmode, so just
5510 exclude that case. It is very unlikely that a condition code value
5511 would be a useful iterator anyways. */
5512 if (loop->level == 1
5513 && GET_MODE_CLASS (mode) != MODE_CC
5514 && GET_MODE_CLASS (GET_MODE (dest_reg)) != MODE_CC)
5516 /* Possible bug here? Perhaps we don't know the mode of X. */
5517 *inc_val = convert_modes (GET_MODE (dest_reg), mode, x, 0);
5518 *mult_val = const0_rtx;
5525 return basic_induction_var (loop, XEXP (x, 0), GET_MODE (XEXP (x, 0)),
5526 dest_reg, p, inc_val, mult_val, location);
5529 /* Similar, since this can be a sign extension. */
5530 for (insn = PREV_INSN (p);
5531 (insn && GET_CODE (insn) == NOTE
5532 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG);
5533 insn = PREV_INSN (insn))
5537 set = single_set (insn);
5539 if (! rtx_equal_p (dest_reg, XEXP (x, 0))
5540 && set && SET_DEST (set) == XEXP (x, 0)
5541 && GET_CODE (XEXP (x, 1)) == CONST_INT
5542 && INTVAL (XEXP (x, 1)) >= 0
5543 && GET_CODE (SET_SRC (set)) == ASHIFT
5544 && XEXP (x, 1) == XEXP (SET_SRC (set), 1))
5545 return basic_induction_var (loop, XEXP (SET_SRC (set), 0),
5546 GET_MODE (XEXP (x, 0)),
5547 dest_reg, insn, inc_val, mult_val,
5556 /* A general induction variable (giv) is any quantity that is a linear
5557 function of a basic induction variable,
5558 i.e. giv = biv * mult_val + add_val.
5559 The coefficients can be any loop invariant quantity.
5560 A giv need not be computed directly from the biv;
5561 it can be computed by way of other givs. */
5563 /* Determine whether X computes a giv.
5564 If it does, return a nonzero value
5565 which is the benefit from eliminating the computation of X;
5566 set *SRC_REG to the register of the biv that it is computed from;
5567 set *ADD_VAL and *MULT_VAL to the coefficients,
5568 such that the value of X is biv * mult + add; */
5571 general_induction_var (loop, x, src_reg, add_val, mult_val, ext_val,
5572 is_addr, pbenefit, addr_mode)
5573 const struct loop *loop;
5581 enum machine_mode addr_mode;
5583 struct loop_ivs *ivs = LOOP_IVS (loop);
5586 /* If this is an invariant, forget it, it isn't a giv. */
5587 if (loop_invariant_p (loop, x) == 1)
5591 *ext_val = NULL_RTX;
5592 x = simplify_giv_expr (loop, x, ext_val, pbenefit);
5596 switch (GET_CODE (x))
5600 /* Since this is now an invariant and wasn't before, it must be a giv
5601 with MULT_VAL == 0. It doesn't matter which BIV we associate this
5603 *src_reg = ivs->loop_iv_list->biv->dest_reg;
5604 *mult_val = const0_rtx;
5609 /* This is equivalent to a BIV. */
5611 *mult_val = const1_rtx;
5612 *add_val = const0_rtx;
5616 /* Either (plus (biv) (invar)) or
5617 (plus (mult (biv) (invar_1)) (invar_2)). */
5618 if (GET_CODE (XEXP (x, 0)) == MULT)
5620 *src_reg = XEXP (XEXP (x, 0), 0);
5621 *mult_val = XEXP (XEXP (x, 0), 1);
5625 *src_reg = XEXP (x, 0);
5626 *mult_val = const1_rtx;
5628 *add_val = XEXP (x, 1);
5632 /* ADD_VAL is zero. */
5633 *src_reg = XEXP (x, 0);
5634 *mult_val = XEXP (x, 1);
5635 *add_val = const0_rtx;
5642 /* Remove any enclosing USE from ADD_VAL and MULT_VAL (there will be
5643 unless they are CONST_INT). */
5644 if (GET_CODE (*add_val) == USE)
5645 *add_val = XEXP (*add_val, 0);
5646 if (GET_CODE (*mult_val) == USE)
5647 *mult_val = XEXP (*mult_val, 0);
5650 *pbenefit += address_cost (orig_x, addr_mode) - reg_address_cost;
5652 *pbenefit += rtx_cost (orig_x, SET);
5654 /* Always return true if this is a giv so it will be detected as such,
5655 even if the benefit is zero or negative. This allows elimination
5656 of bivs that might otherwise not be eliminated. */
5660 /* Given an expression, X, try to form it as a linear function of a biv.
5661 We will canonicalize it to be of the form
5662 (plus (mult (BIV) (invar_1))
5664 with possible degeneracies.
5666 The invariant expressions must each be of a form that can be used as a
5667 machine operand. We surround then with a USE rtx (a hack, but localized
5668 and certainly unambiguous!) if not a CONST_INT for simplicity in this
5669 routine; it is the caller's responsibility to strip them.
5671 If no such canonicalization is possible (i.e., two biv's are used or an
5672 expression that is neither invariant nor a biv or giv), this routine
5675 For a non-zero return, the result will have a code of CONST_INT, USE,
5676 REG (for a BIV), PLUS, or MULT. No other codes will occur.
5678 *BENEFIT will be incremented by the benefit of any sub-giv encountered. */
5680 static rtx sge_plus PARAMS ((enum machine_mode, rtx, rtx));
5681 static rtx sge_plus_constant PARAMS ((rtx, rtx));
5684 simplify_giv_expr (loop, x, ext_val, benefit)
5685 const struct loop *loop;
5690 struct loop_ivs *ivs = LOOP_IVS (loop);
5691 struct loop_regs *regs = LOOP_REGS (loop);
5692 enum machine_mode mode = GET_MODE (x);
5696 /* If this is not an integer mode, or if we cannot do arithmetic in this
5697 mode, this can't be a giv. */
5698 if (mode != VOIDmode
5699 && (GET_MODE_CLASS (mode) != MODE_INT
5700 || GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT))
5703 switch (GET_CODE (x))
5706 arg0 = simplify_giv_expr (loop, XEXP (x, 0), ext_val, benefit);
5707 arg1 = simplify_giv_expr (loop, XEXP (x, 1), ext_val, benefit);
5708 if (arg0 == 0 || arg1 == 0)
5711 /* Put constant last, CONST_INT last if both constant. */
5712 if ((GET_CODE (arg0) == USE
5713 || GET_CODE (arg0) == CONST_INT)
5714 && ! ((GET_CODE (arg0) == USE
5715 && GET_CODE (arg1) == USE)
5716 || GET_CODE (arg1) == CONST_INT))
5717 tem = arg0, arg0 = arg1, arg1 = tem;
5719 /* Handle addition of zero, then addition of an invariant. */
5720 if (arg1 == const0_rtx)
5722 else if (GET_CODE (arg1) == CONST_INT || GET_CODE (arg1) == USE)
5723 switch (GET_CODE (arg0))
5727 /* Adding two invariants must result in an invariant, so enclose
5728 addition operation inside a USE and return it. */
5729 if (GET_CODE (arg0) == USE)
5730 arg0 = XEXP (arg0, 0);
5731 if (GET_CODE (arg1) == USE)
5732 arg1 = XEXP (arg1, 0);
5734 if (GET_CODE (arg0) == CONST_INT)
5735 tem = arg0, arg0 = arg1, arg1 = tem;
5736 if (GET_CODE (arg1) == CONST_INT)
5737 tem = sge_plus_constant (arg0, arg1);
5739 tem = sge_plus (mode, arg0, arg1);
5741 if (GET_CODE (tem) != CONST_INT)
5742 tem = gen_rtx_USE (mode, tem);
5747 /* biv + invar or mult + invar. Return sum. */
5748 return gen_rtx_PLUS (mode, arg0, arg1);
5751 /* (a + invar_1) + invar_2. Associate. */
5753 simplify_giv_expr (loop,
5765 /* Each argument must be either REG, PLUS, or MULT. Convert REG to
5766 MULT to reduce cases. */
5767 if (GET_CODE (arg0) == REG)
5768 arg0 = gen_rtx_MULT (mode, arg0, const1_rtx);
5769 if (GET_CODE (arg1) == REG)
5770 arg1 = gen_rtx_MULT (mode, arg1, const1_rtx);
5772 /* Now have PLUS + PLUS, PLUS + MULT, MULT + PLUS, or MULT + MULT.
5773 Put a MULT first, leaving PLUS + PLUS, MULT + PLUS, or MULT + MULT.
5774 Recurse to associate the second PLUS. */
5775 if (GET_CODE (arg1) == MULT)
5776 tem = arg0, arg0 = arg1, arg1 = tem;
5778 if (GET_CODE (arg1) == PLUS)
5780 simplify_giv_expr (loop,
5782 gen_rtx_PLUS (mode, arg0,
5787 /* Now must have MULT + MULT. Distribute if same biv, else not giv. */
5788 if (GET_CODE (arg0) != MULT || GET_CODE (arg1) != MULT)
5791 if (!rtx_equal_p (arg0, arg1))
5794 return simplify_giv_expr (loop,
5803 /* Handle "a - b" as "a + b * (-1)". */
5804 return simplify_giv_expr (loop,
5813 arg0 = simplify_giv_expr (loop, XEXP (x, 0), ext_val, benefit);
5814 arg1 = simplify_giv_expr (loop, XEXP (x, 1), ext_val, benefit);
5815 if (arg0 == 0 || arg1 == 0)
5818 /* Put constant last, CONST_INT last if both constant. */
5819 if ((GET_CODE (arg0) == USE || GET_CODE (arg0) == CONST_INT)
5820 && GET_CODE (arg1) != CONST_INT)
5821 tem = arg0, arg0 = arg1, arg1 = tem;
5823 /* If second argument is not now constant, not giv. */
5824 if (GET_CODE (arg1) != USE && GET_CODE (arg1) != CONST_INT)
5827 /* Handle multiply by 0 or 1. */
5828 if (arg1 == const0_rtx)
5831 else if (arg1 == const1_rtx)
5834 switch (GET_CODE (arg0))
5837 /* biv * invar. Done. */
5838 return gen_rtx_MULT (mode, arg0, arg1);
5841 /* Product of two constants. */
5842 return GEN_INT (INTVAL (arg0) * INTVAL (arg1));
5845 /* invar * invar is a giv, but attempt to simplify it somehow. */
5846 if (GET_CODE (arg1) != CONST_INT)
5849 arg0 = XEXP (arg0, 0);
5850 if (GET_CODE (arg0) == MULT)
5852 /* (invar_0 * invar_1) * invar_2. Associate. */
5853 return simplify_giv_expr (loop,
5862 /* Porpagate the MULT expressions to the intermost nodes. */
5863 else if (GET_CODE (arg0) == PLUS)
5865 /* (invar_0 + invar_1) * invar_2. Distribute. */
5866 return simplify_giv_expr (loop,
5878 return gen_rtx_USE (mode, gen_rtx_MULT (mode, arg0, arg1));
5881 /* (a * invar_1) * invar_2. Associate. */
5882 return simplify_giv_expr (loop,
5891 /* (a + invar_1) * invar_2. Distribute. */
5892 return simplify_giv_expr (loop,
5907 /* Shift by constant is multiply by power of two. */
5908 if (GET_CODE (XEXP (x, 1)) != CONST_INT)
5912 simplify_giv_expr (loop,
5915 GEN_INT ((HOST_WIDE_INT) 1
5916 << INTVAL (XEXP (x, 1)))),
5920 /* "-a" is "a * (-1)" */
5921 return simplify_giv_expr (loop,
5922 gen_rtx_MULT (mode, XEXP (x, 0), constm1_rtx),
5926 /* "~a" is "-a - 1". Silly, but easy. */
5927 return simplify_giv_expr (loop,
5928 gen_rtx_MINUS (mode,
5929 gen_rtx_NEG (mode, XEXP (x, 0)),
5934 /* Already in proper form for invariant. */
5940 /* Conditionally recognize extensions of simple IVs. After we've
5941 computed loop traversal counts and verified the range of the
5942 source IV, we'll reevaluate this as a GIV. */
5943 if (*ext_val == NULL_RTX)
5945 arg0 = simplify_giv_expr (loop, XEXP (x, 0), ext_val, benefit);
5946 if (arg0 && *ext_val == NULL_RTX && GET_CODE (arg0) == REG)
5948 *ext_val = gen_rtx_fmt_e (GET_CODE (x), mode, arg0);
5955 /* If this is a new register, we can't deal with it. */
5956 if (REGNO (x) >= max_reg_before_loop)
5959 /* Check for biv or giv. */
5960 switch (REG_IV_TYPE (ivs, REGNO (x)))
5964 case GENERAL_INDUCT:
5966 struct induction *v = REG_IV_INFO (ivs, REGNO (x));
5968 /* Form expression from giv and add benefit. Ensure this giv
5969 can derive another and subtract any needed adjustment if so. */
5971 /* Increasing the benefit here is risky. The only case in which it
5972 is arguably correct is if this is the only use of V. In other
5973 cases, this will artificially inflate the benefit of the current
5974 giv, and lead to suboptimal code. Thus, it is disabled, since
5975 potentially not reducing an only marginally beneficial giv is
5976 less harmful than reducing many givs that are not really
5979 rtx single_use = VARRAY_RTX (regs->single_usage, REGNO (x));
5980 if (single_use && single_use != const0_rtx)
5981 *benefit += v->benefit;
5987 tem = gen_rtx_PLUS (mode, gen_rtx_MULT (mode,
5988 v->src_reg, v->mult_val),
5991 if (v->derive_adjustment)
5992 tem = gen_rtx_MINUS (mode, tem, v->derive_adjustment);
5993 arg0 = simplify_giv_expr (loop, tem, ext_val, benefit);
5996 if (!v->ext_dependant)
6001 *ext_val = v->ext_dependant;
6009 /* If it isn't an induction variable, and it is invariant, we
6010 may be able to simplify things further by looking through
6011 the bits we just moved outside the loop. */
6012 if (loop_invariant_p (loop, x) == 1)
6016 for (m = the_movables.head; m; m = m->next)
6017 if (rtx_equal_p (x, m->set_dest))
6019 /* Ok, we found a match. Substitute and simplify. */
6021 /* If we match another movable, we must use that, as
6022 this one is going away. */
6024 return simplify_giv_expr (loop, m->match->set_dest,
6027 /* If consec is non-zero, this is a member of a group of
6028 instructions that were moved together. We handle this
6029 case only to the point of seeking to the last insn and
6030 looking for a REG_EQUAL. Fail if we don't find one. */
6037 tem = NEXT_INSN (tem);
6041 tem = find_reg_note (tem, REG_EQUAL, NULL_RTX);
6043 tem = XEXP (tem, 0);
6047 tem = single_set (m->insn);
6049 tem = SET_SRC (tem);
6054 /* What we are most interested in is pointer
6055 arithmetic on invariants -- only take
6056 patterns we may be able to do something with. */
6057 if (GET_CODE (tem) == PLUS
6058 || GET_CODE (tem) == MULT
6059 || GET_CODE (tem) == ASHIFT
6060 || GET_CODE (tem) == CONST_INT
6061 || GET_CODE (tem) == SYMBOL_REF)
6063 tem = simplify_giv_expr (loop, tem, ext_val,
6068 else if (GET_CODE (tem) == CONST
6069 && GET_CODE (XEXP (tem, 0)) == PLUS
6070 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == SYMBOL_REF
6071 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)
6073 tem = simplify_giv_expr (loop, XEXP (tem, 0),
6085 /* Fall through to general case. */
6087 /* If invariant, return as USE (unless CONST_INT).
6088 Otherwise, not giv. */
6089 if (GET_CODE (x) == USE)
6092 if (loop_invariant_p (loop, x) == 1)
6094 if (GET_CODE (x) == CONST_INT)
6096 if (GET_CODE (x) == CONST
6097 && GET_CODE (XEXP (x, 0)) == PLUS
6098 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
6099 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
6101 return gen_rtx_USE (mode, x);
6108 /* This routine folds invariants such that there is only ever one
6109 CONST_INT in the summation. It is only used by simplify_giv_expr. */
6112 sge_plus_constant (x, c)
6115 if (GET_CODE (x) == CONST_INT)
6116 return GEN_INT (INTVAL (x) + INTVAL (c));
6117 else if (GET_CODE (x) != PLUS)
6118 return gen_rtx_PLUS (GET_MODE (x), x, c);
6119 else if (GET_CODE (XEXP (x, 1)) == CONST_INT)
6121 return gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0),
6122 GEN_INT (INTVAL (XEXP (x, 1)) + INTVAL (c)));
6124 else if (GET_CODE (XEXP (x, 0)) == PLUS
6125 || GET_CODE (XEXP (x, 1)) != PLUS)
6127 return gen_rtx_PLUS (GET_MODE (x),
6128 sge_plus_constant (XEXP (x, 0), c), XEXP (x, 1));
6132 return gen_rtx_PLUS (GET_MODE (x),
6133 sge_plus_constant (XEXP (x, 1), c), XEXP (x, 0));
6138 sge_plus (mode, x, y)
6139 enum machine_mode mode;
6142 while (GET_CODE (y) == PLUS)
6144 rtx a = XEXP (y, 0);
6145 if (GET_CODE (a) == CONST_INT)
6146 x = sge_plus_constant (x, a);
6148 x = gen_rtx_PLUS (mode, x, a);
6151 if (GET_CODE (y) == CONST_INT)
6152 x = sge_plus_constant (x, y);
6154 x = gen_rtx_PLUS (mode, x, y);
6158 /* Help detect a giv that is calculated by several consecutive insns;
6162 The caller has already identified the first insn P as having a giv as dest;
6163 we check that all other insns that set the same register follow
6164 immediately after P, that they alter nothing else,
6165 and that the result of the last is still a giv.
6167 The value is 0 if the reg set in P is not really a giv.
6168 Otherwise, the value is the amount gained by eliminating
6169 all the consecutive insns that compute the value.
6171 FIRST_BENEFIT is the amount gained by eliminating the first insn, P.
6172 SRC_REG is the reg of the biv; DEST_REG is the reg of the giv.
6174 The coefficients of the ultimate giv value are stored in
6175 *MULT_VAL and *ADD_VAL. */
6178 consec_sets_giv (loop, first_benefit, p, src_reg, dest_reg,
6179 add_val, mult_val, ext_val, last_consec_insn)
6180 const struct loop *loop;
6188 rtx *last_consec_insn;
6190 struct loop_ivs *ivs = LOOP_IVS (loop);
6191 struct loop_regs *regs = LOOP_REGS (loop);
6198 /* Indicate that this is a giv so that we can update the value produced in
6199 each insn of the multi-insn sequence.
6201 This induction structure will be used only by the call to
6202 general_induction_var below, so we can allocate it on our stack.
6203 If this is a giv, our caller will replace the induct var entry with
6204 a new induction structure. */
6206 = (struct induction *) alloca (sizeof (struct induction));
6207 v->src_reg = src_reg;
6208 v->mult_val = *mult_val;
6209 v->add_val = *add_val;
6210 v->benefit = first_benefit;
6212 v->derive_adjustment = 0;
6213 v->ext_dependant = NULL_RTX;
6215 REG_IV_TYPE (ivs, REGNO (dest_reg)) = GENERAL_INDUCT;
6216 REG_IV_INFO (ivs, REGNO (dest_reg)) = v;
6218 count = VARRAY_INT (regs->n_times_set, REGNO (dest_reg)) - 1;
6223 code = GET_CODE (p);
6225 /* If libcall, skip to end of call sequence. */
6226 if (code == INSN && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
6230 && (set = single_set (p))
6231 && GET_CODE (SET_DEST (set)) == REG
6232 && SET_DEST (set) == dest_reg
6233 && (general_induction_var (loop, SET_SRC (set), &src_reg,
6234 add_val, mult_val, ext_val, 0,
6236 /* Giv created by equivalent expression. */
6237 || ((temp = find_reg_note (p, REG_EQUAL, NULL_RTX))
6238 && general_induction_var (loop, XEXP (temp, 0), &src_reg,
6239 add_val, mult_val, ext_val, 0,
6240 &benefit, VOIDmode)))
6241 && src_reg == v->src_reg)
6243 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
6244 benefit += libcall_benefit (p);
6247 v->mult_val = *mult_val;
6248 v->add_val = *add_val;
6249 v->benefit += benefit;
6251 else if (code != NOTE)
6253 /* Allow insns that set something other than this giv to a
6254 constant. Such insns are needed on machines which cannot
6255 include long constants and should not disqualify a giv. */
6257 && (set = single_set (p))
6258 && SET_DEST (set) != dest_reg
6259 && CONSTANT_P (SET_SRC (set)))
6262 REG_IV_TYPE (ivs, REGNO (dest_reg)) = UNKNOWN_INDUCT;
6267 *last_consec_insn = p;
6271 /* Return an rtx, if any, that expresses giv G2 as a function of the register
6272 represented by G1. If no such expression can be found, or it is clear that
6273 it cannot possibly be a valid address, 0 is returned.
6275 To perform the computation, we note that
6278 where `v' is the biv.
6280 So G2 = (y/b) * G1 + (b - a*y/x).
6282 Note that MULT = y/x.
6284 Update: A and B are now allowed to be additive expressions such that
6285 B contains all variables in A. That is, computing B-A will not require
6286 subtracting variables. */
6289 express_from_1 (a, b, mult)
6292 /* If MULT is zero, then A*MULT is zero, and our expression is B. */
6294 if (mult == const0_rtx)
6297 /* If MULT is not 1, we cannot handle A with non-constants, since we
6298 would then be required to subtract multiples of the registers in A.
6299 This is theoretically possible, and may even apply to some Fortran
6300 constructs, but it is a lot of work and we do not attempt it here. */
6302 if (mult != const1_rtx && GET_CODE (a) != CONST_INT)
6305 /* In general these structures are sorted top to bottom (down the PLUS
6306 chain), but not left to right across the PLUS. If B is a higher
6307 order giv than A, we can strip one level and recurse. If A is higher
6308 order, we'll eventually bail out, but won't know that until the end.
6309 If they are the same, we'll strip one level around this loop. */
6311 while (GET_CODE (a) == PLUS && GET_CODE (b) == PLUS)
6313 rtx ra, rb, oa, ob, tmp;
6315 ra = XEXP (a, 0), oa = XEXP (a, 1);
6316 if (GET_CODE (ra) == PLUS)
6317 tmp = ra, ra = oa, oa = tmp;
6319 rb = XEXP (b, 0), ob = XEXP (b, 1);
6320 if (GET_CODE (rb) == PLUS)
6321 tmp = rb, rb = ob, ob = tmp;
6323 if (rtx_equal_p (ra, rb))
6324 /* We matched: remove one reg completely. */
6326 else if (GET_CODE (ob) != PLUS && rtx_equal_p (ra, ob))
6327 /* An alternate match. */
6329 else if (GET_CODE (oa) != PLUS && rtx_equal_p (oa, rb))
6330 /* An alternate match. */
6334 /* Indicates an extra register in B. Strip one level from B and
6335 recurse, hoping B was the higher order expression. */
6336 ob = express_from_1 (a, ob, mult);
6339 return gen_rtx_PLUS (GET_MODE (b), rb, ob);
6343 /* Here we are at the last level of A, go through the cases hoping to
6344 get rid of everything but a constant. */
6346 if (GET_CODE (a) == PLUS)
6350 ra = XEXP (a, 0), oa = XEXP (a, 1);
6351 if (rtx_equal_p (oa, b))
6353 else if (!rtx_equal_p (ra, b))
6356 if (GET_CODE (oa) != CONST_INT)
6359 return GEN_INT (-INTVAL (oa) * INTVAL (mult));
6361 else if (GET_CODE (a) == CONST_INT)
6363 return plus_constant (b, -INTVAL (a) * INTVAL (mult));
6365 else if (CONSTANT_P (a))
6367 return simplify_gen_binary (MINUS, GET_MODE (b) != VOIDmode ? GET_MODE (b) : GET_MODE (a), const0_rtx, a);
6369 else if (GET_CODE (b) == PLUS)
6371 if (rtx_equal_p (a, XEXP (b, 0)))
6373 else if (rtx_equal_p (a, XEXP (b, 1)))
6378 else if (rtx_equal_p (a, b))
6385 express_from (g1, g2)
6386 struct induction *g1, *g2;
6390 /* The value that G1 will be multiplied by must be a constant integer. Also,
6391 the only chance we have of getting a valid address is if b*c/a (see above
6392 for notation) is also an integer. */
6393 if (GET_CODE (g1->mult_val) == CONST_INT
6394 && GET_CODE (g2->mult_val) == CONST_INT)
6396 if (g1->mult_val == const0_rtx
6397 || INTVAL (g2->mult_val) % INTVAL (g1->mult_val) != 0)
6399 mult = GEN_INT (INTVAL (g2->mult_val) / INTVAL (g1->mult_val));
6401 else if (rtx_equal_p (g1->mult_val, g2->mult_val))
6405 /* ??? Find out if the one is a multiple of the other? */
6409 add = express_from_1 (g1->add_val, g2->add_val, mult);
6410 if (add == NULL_RTX)
6412 /* Failed. If we've got a multiplication factor between G1 and G2,
6413 scale G1's addend and try again. */
6414 if (INTVAL (mult) > 1)
6416 rtx g1_add_val = g1->add_val;
6417 if (GET_CODE (g1_add_val) == MULT
6418 && GET_CODE (XEXP (g1_add_val, 1)) == CONST_INT)
6421 m = INTVAL (mult) * INTVAL (XEXP (g1_add_val, 1));
6422 g1_add_val = gen_rtx_MULT (GET_MODE (g1_add_val),
6423 XEXP (g1_add_val, 0), GEN_INT (m));
6427 g1_add_val = gen_rtx_MULT (GET_MODE (g1_add_val), g1_add_val,
6431 add = express_from_1 (g1_add_val, g2->add_val, const1_rtx);
6434 if (add == NULL_RTX)
6437 /* Form simplified final result. */
6438 if (mult == const0_rtx)
6440 else if (mult == const1_rtx)
6441 mult = g1->dest_reg;
6443 mult = gen_rtx_MULT (g2->mode, g1->dest_reg, mult);
6445 if (add == const0_rtx)
6449 if (GET_CODE (add) == PLUS
6450 && CONSTANT_P (XEXP (add, 1)))
6452 rtx tem = XEXP (add, 1);
6453 mult = gen_rtx_PLUS (g2->mode, mult, XEXP (add, 0));
6457 return gen_rtx_PLUS (g2->mode, mult, add);
6461 /* Return an rtx, if any, that expresses giv G2 as a function of the register
6462 represented by G1. This indicates that G2 should be combined with G1 and
6463 that G2 can use (either directly or via an address expression) a register
6464 used to represent G1. */
6467 combine_givs_p (g1, g2)
6468 struct induction *g1, *g2;
6472 /* With the introduction of ext dependant givs, we must care for modes.
6473 G2 must not use a wider mode than G1. */
6474 if (GET_MODE_SIZE (g1->mode) < GET_MODE_SIZE (g2->mode))
6477 ret = comb = express_from (g1, g2);
6478 if (comb == NULL_RTX)
6480 if (g1->mode != g2->mode)
6481 ret = gen_lowpart (g2->mode, comb);
6483 /* If these givs are identical, they can be combined. We use the results
6484 of express_from because the addends are not in a canonical form, so
6485 rtx_equal_p is a weaker test. */
6486 /* But don't combine a DEST_REG giv with a DEST_ADDR giv; we want the
6487 combination to be the other way round. */
6488 if (comb == g1->dest_reg
6489 && (g1->giv_type == DEST_REG || g2->giv_type == DEST_ADDR))
6494 /* If G2 can be expressed as a function of G1 and that function is valid
6495 as an address and no more expensive than using a register for G2,
6496 the expression of G2 in terms of G1 can be used. */
6498 && g2->giv_type == DEST_ADDR
6499 && memory_address_p (g2->mem_mode, ret)
6500 /* ??? Looses, especially with -fforce-addr, where *g2->location
6501 will always be a register, and so anything more complicated
6505 && ADDRESS_COST (tem) <= ADDRESS_COST (*g2->location)
6507 && rtx_cost (tem, MEM) <= rtx_cost (*g2->location, MEM)
6518 /* Check each extension dependant giv in this class to see if its
6519 root biv is safe from wrapping in the interior mode, which would
6520 make the giv illegal. */
6523 check_ext_dependant_givs (bl, loop_info)
6524 struct iv_class *bl;
6525 struct loop_info *loop_info;
6527 int ze_ok = 0, se_ok = 0, info_ok = 0;
6528 enum machine_mode biv_mode = GET_MODE (bl->biv->src_reg);
6529 HOST_WIDE_INT start_val;
6530 unsigned HOST_WIDE_INT u_end_val, u_start_val;
6532 struct induction *v;
6534 /* Make sure the iteration data is available. We must have
6535 constants in order to be certain of no overflow. */
6536 /* ??? An unknown iteration count with an increment of +-1
6537 combined with friendly exit tests of against an invariant
6538 value is also ameanable to optimization. Not implemented. */
6539 if (loop_info->n_iterations > 0
6540 && bl->initial_value
6541 && GET_CODE (bl->initial_value) == CONST_INT
6542 && (incr = biv_total_increment (bl))
6543 && GET_CODE (incr) == CONST_INT
6544 /* Make sure the host can represent the arithmetic. */
6545 && HOST_BITS_PER_WIDE_INT >= GET_MODE_BITSIZE (biv_mode))
6547 unsigned HOST_WIDE_INT abs_incr, total_incr;
6548 HOST_WIDE_INT s_end_val;
6552 start_val = INTVAL (bl->initial_value);
6553 u_start_val = start_val;
6555 neg_incr = 0, abs_incr = INTVAL (incr);
6556 if (INTVAL (incr) < 0)
6557 neg_incr = 1, abs_incr = -abs_incr;
6558 total_incr = abs_incr * loop_info->n_iterations;
6560 /* Check for host arithmatic overflow. */
6561 if (total_incr / loop_info->n_iterations == abs_incr)
6563 unsigned HOST_WIDE_INT u_max;
6564 HOST_WIDE_INT s_max;
6566 u_end_val = start_val + (neg_incr ? -total_incr : total_incr);
6567 s_end_val = u_end_val;
6568 u_max = GET_MODE_MASK (biv_mode);
6571 /* Check zero extension of biv ok. */
6573 /* Check for host arithmatic overflow. */
6575 ? u_end_val < u_start_val
6576 : u_end_val > u_start_val)
6577 /* Check for target arithmetic overflow. */
6579 ? 1 /* taken care of with host overflow */
6580 : u_end_val <= u_max))
6585 /* Check sign extension of biv ok. */
6586 /* ??? While it is true that overflow with signed and pointer
6587 arithmetic is undefined, I fear too many programmers don't
6588 keep this fact in mind -- myself included on occasion.
6589 So leave alone with the signed overflow optimizations. */
6590 if (start_val >= -s_max - 1
6591 /* Check for host arithmatic overflow. */
6593 ? s_end_val < start_val
6594 : s_end_val > start_val)
6595 /* Check for target arithmetic overflow. */
6597 ? s_end_val >= -s_max - 1
6598 : s_end_val <= s_max))
6605 /* Invalidate givs that fail the tests. */
6606 for (v = bl->giv; v; v = v->next_iv)
6607 if (v->ext_dependant)
6609 enum rtx_code code = GET_CODE (v->ext_dependant);
6622 /* We don't know whether this value is being used as either
6623 signed or unsigned, so to safely truncate we must satisfy
6624 both. The initial check here verifies the BIV itself;
6625 once that is successful we may check its range wrt the
6629 enum machine_mode outer_mode = GET_MODE (v->ext_dependant);
6630 unsigned HOST_WIDE_INT max = GET_MODE_MASK (outer_mode) >> 1;
6632 /* We know from the above that both endpoints are nonnegative,
6633 and that there is no wrapping. Verify that both endpoints
6634 are within the (signed) range of the outer mode. */
6635 if (u_start_val <= max && u_end_val <= max)
6646 if (loop_dump_stream)
6648 fprintf (loop_dump_stream,
6649 "Verified ext dependant giv at %d of reg %d\n",
6650 INSN_UID (v->insn), bl->regno);
6655 if (loop_dump_stream)
6660 why = "biv iteration values overflowed";
6664 incr = biv_total_increment (bl);
6665 if (incr == const1_rtx)
6666 why = "biv iteration info incomplete; incr by 1";
6668 why = "biv iteration info incomplete";
6671 fprintf (loop_dump_stream,
6672 "Failed ext dependant giv at %d, %s\n",
6673 INSN_UID (v->insn), why);
6680 /* Generate a version of VALUE in a mode appropriate for initializing V. */
6683 extend_value_for_giv (v, value)
6684 struct induction *v;
6687 rtx ext_dep = v->ext_dependant;
6692 /* Recall that check_ext_dependant_givs verified that the known bounds
6693 of a biv did not overflow or wrap with respect to the extension for
6694 the giv. Therefore, constants need no additional adjustment. */
6695 if (CONSTANT_P (value) && GET_MODE (value) == VOIDmode)
6698 /* Otherwise, we must adjust the value to compensate for the
6699 differing modes of the biv and the giv. */
6700 return gen_rtx_fmt_e (GET_CODE (ext_dep), GET_MODE (ext_dep), value);
6703 struct combine_givs_stats
6710 cmp_combine_givs_stats (xp, yp)
6714 const struct combine_givs_stats * const x =
6715 (const struct combine_givs_stats *) xp;
6716 const struct combine_givs_stats * const y =
6717 (const struct combine_givs_stats *) yp;
6719 d = y->total_benefit - x->total_benefit;
6720 /* Stabilize the sort. */
6722 d = x->giv_number - y->giv_number;
6726 /* Check all pairs of givs for iv_class BL and see if any can be combined with
6727 any other. If so, point SAME to the giv combined with and set NEW_REG to
6728 be an expression (in terms of the other giv's DEST_REG) equivalent to the
6729 giv. Also, update BENEFIT and related fields for cost/benefit analysis. */
6732 combine_givs (regs, bl)
6733 struct loop_regs *regs;
6734 struct iv_class *bl;
6736 /* Additional benefit to add for being combined multiple times. */
6737 const int extra_benefit = 3;
6739 struct induction *g1, *g2, **giv_array;
6740 int i, j, k, giv_count;
6741 struct combine_givs_stats *stats;
6744 /* Count givs, because bl->giv_count is incorrect here. */
6746 for (g1 = bl->giv; g1; g1 = g1->next_iv)
6751 = (struct induction **) alloca (giv_count * sizeof (struct induction *));
6753 for (g1 = bl->giv; g1; g1 = g1->next_iv)
6755 giv_array[i++] = g1;
6757 stats = (struct combine_givs_stats *) xcalloc (giv_count, sizeof (*stats));
6758 can_combine = (rtx *) xcalloc (giv_count, giv_count * sizeof (rtx));
6760 for (i = 0; i < giv_count; i++)
6766 stats[i].giv_number = i;
6768 /* If a DEST_REG GIV is used only once, do not allow it to combine
6769 with anything, for in doing so we will gain nothing that cannot
6770 be had by simply letting the GIV with which we would have combined
6771 to be reduced on its own. The losage shows up in particular with
6772 DEST_ADDR targets on hosts with reg+reg addressing, though it can
6773 be seen elsewhere as well. */
6774 if (g1->giv_type == DEST_REG
6775 && (single_use = VARRAY_RTX (regs->single_usage,
6776 REGNO (g1->dest_reg)))
6777 && single_use != const0_rtx)
6780 this_benefit = g1->benefit;
6781 /* Add an additional weight for zero addends. */
6782 if (g1->no_const_addval)
6785 for (j = 0; j < giv_count; j++)
6791 && (this_combine = combine_givs_p (g1, g2)) != NULL_RTX)
6793 can_combine[i * giv_count + j] = this_combine;
6794 this_benefit += g2->benefit + extra_benefit;
6797 stats[i].total_benefit = this_benefit;
6800 /* Iterate, combining until we can't. */
6802 qsort (stats, giv_count, sizeof (*stats), cmp_combine_givs_stats);
6804 if (loop_dump_stream)
6806 fprintf (loop_dump_stream, "Sorted combine statistics:\n");
6807 for (k = 0; k < giv_count; k++)
6809 g1 = giv_array[stats[k].giv_number];
6810 if (!g1->combined_with && !g1->same)
6811 fprintf (loop_dump_stream, " {%d, %d}",
6812 INSN_UID (giv_array[stats[k].giv_number]->insn),
6813 stats[k].total_benefit);
6815 putc ('\n', loop_dump_stream);
6818 for (k = 0; k < giv_count; k++)
6820 int g1_add_benefit = 0;
6822 i = stats[k].giv_number;
6825 /* If it has already been combined, skip. */
6826 if (g1->combined_with || g1->same)
6829 for (j = 0; j < giv_count; j++)
6832 if (g1 != g2 && can_combine[i * giv_count + j]
6833 /* If it has already been combined, skip. */
6834 && ! g2->same && ! g2->combined_with)
6838 g2->new_reg = can_combine[i * giv_count + j];
6840 g1->combined_with++;
6841 g1->lifetime += g2->lifetime;
6843 g1_add_benefit += g2->benefit;
6845 /* ??? The new final_[bg]iv_value code does a much better job
6846 of finding replaceable giv's, and hence this code may no
6847 longer be necessary. */
6848 if (! g2->replaceable && REG_USERVAR_P (g2->dest_reg))
6849 g1_add_benefit -= copy_cost;
6851 /* To help optimize the next set of combinations, remove
6852 this giv from the benefits of other potential mates. */
6853 for (l = 0; l < giv_count; ++l)
6855 int m = stats[l].giv_number;
6856 if (can_combine[m * giv_count + j])
6857 stats[l].total_benefit -= g2->benefit + extra_benefit;
6860 if (loop_dump_stream)
6861 fprintf (loop_dump_stream,
6862 "giv at %d combined with giv at %d; new benefit %d + %d, lifetime %d\n",
6863 INSN_UID (g2->insn), INSN_UID (g1->insn),
6864 g1->benefit, g1_add_benefit, g1->lifetime);
6868 /* To help optimize the next set of combinations, remove
6869 this giv from the benefits of other potential mates. */
6870 if (g1->combined_with)
6872 for (j = 0; j < giv_count; ++j)
6874 int m = stats[j].giv_number;
6875 if (can_combine[m * giv_count + i])
6876 stats[j].total_benefit -= g1->benefit + extra_benefit;
6879 g1->benefit += g1_add_benefit;
6881 /* We've finished with this giv, and everything it touched.
6882 Restart the combination so that proper weights for the
6883 rest of the givs are properly taken into account. */
6884 /* ??? Ideally we would compact the arrays at this point, so
6885 as to not cover old ground. But sanely compacting
6886 can_combine is tricky. */
6896 /* EMIT code before INSERT_BEFORE to set REG = B * M + A. */
6899 emit_iv_add_mult (b, m, a, reg, insert_before)
6900 rtx b; /* initial value of basic induction variable */
6901 rtx m; /* multiplicative constant */
6902 rtx a; /* additive constant */
6903 rtx reg; /* destination register */
6909 /* Prevent unexpected sharing of these rtx. */
6913 /* Increase the lifetime of any invariants moved further in code. */
6914 update_reg_last_use (a, insert_before);
6915 update_reg_last_use (b, insert_before);
6916 update_reg_last_use (m, insert_before);
6919 result = expand_mult_add (b, reg, m, a, GET_MODE (reg), 1);
6921 emit_move_insn (reg, result);
6922 seq = gen_sequence ();
6925 emit_insn_before (seq, insert_before);
6927 /* It is entirely possible that the expansion created lots of new
6928 registers. Iterate over the sequence we just created and
6931 if (GET_CODE (seq) == SEQUENCE)
6934 for (i = 0; i < XVECLEN (seq, 0); ++i)
6936 rtx set = single_set (XVECEXP (seq, 0, i));
6937 if (set && GET_CODE (SET_DEST (set)) == REG)
6938 record_base_value (REGNO (SET_DEST (set)), SET_SRC (set), 0);
6941 else if (GET_CODE (seq) == SET
6942 && GET_CODE (SET_DEST (seq)) == REG)
6943 record_base_value (REGNO (SET_DEST (seq)), SET_SRC (seq), 0);
6946 /* Similar to emit_iv_add_mult, but compute cost rather than emitting
6949 iv_add_mult_cost (b, m, a, reg)
6950 rtx b; /* initial value of basic induction variable */
6951 rtx m; /* multiplicative constant */
6952 rtx a; /* additive constant */
6953 rtx reg; /* destination register */
6959 result = expand_mult_add (b, reg, m, a, GET_MODE (reg), 0);
6961 emit_move_insn (reg, result);
6962 last = get_last_insn ();
6965 rtx t = single_set (last);
6967 cost += rtx_cost (SET_SRC (t), SET);
6968 last = PREV_INSN (last);
6974 /* Test whether A * B can be computed without
6975 an actual multiply insn. Value is 1 if so. */
6978 product_cheap_p (a, b)
6986 /* If only one is constant, make it B. */
6987 if (GET_CODE (a) == CONST_INT)
6988 tmp = a, a = b, b = tmp;
6990 /* If first constant, both constant, so don't need multiply. */
6991 if (GET_CODE (a) == CONST_INT)
6994 /* If second not constant, neither is constant, so would need multiply. */
6995 if (GET_CODE (b) != CONST_INT)
6998 /* One operand is constant, so might not need multiply insn. Generate the
6999 code for the multiply and see if a call or multiply, or long sequence
7000 of insns is generated. */
7003 expand_mult (GET_MODE (a), a, b, NULL_RTX, 1);
7004 tmp = gen_sequence ();
7007 if (GET_CODE (tmp) == SEQUENCE)
7009 if (XVEC (tmp, 0) == 0)
7011 else if (XVECLEN (tmp, 0) > 3)
7014 for (i = 0; i < XVECLEN (tmp, 0); i++)
7016 rtx insn = XVECEXP (tmp, 0, i);
7018 if (GET_CODE (insn) != INSN
7019 || (GET_CODE (PATTERN (insn)) == SET
7020 && GET_CODE (SET_SRC (PATTERN (insn))) == MULT)
7021 || (GET_CODE (PATTERN (insn)) == PARALLEL
7022 && GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == SET
7023 && GET_CODE (SET_SRC (XVECEXP (PATTERN (insn), 0, 0))) == MULT))
7030 else if (GET_CODE (tmp) == SET
7031 && GET_CODE (SET_SRC (tmp)) == MULT)
7033 else if (GET_CODE (tmp) == PARALLEL
7034 && GET_CODE (XVECEXP (tmp, 0, 0)) == SET
7035 && GET_CODE (SET_SRC (XVECEXP (tmp, 0, 0))) == MULT)
7041 /* Check to see if loop can be terminated by a "decrement and branch until
7042 zero" instruction. If so, add a REG_NONNEG note to the branch insn if so.
7043 Also try reversing an increment loop to a decrement loop
7044 to see if the optimization can be performed.
7045 Value is nonzero if optimization was performed. */
7047 /* This is useful even if the architecture doesn't have such an insn,
7048 because it might change a loops which increments from 0 to n to a loop
7049 which decrements from n to 0. A loop that decrements to zero is usually
7050 faster than one that increments from zero. */
7052 /* ??? This could be rewritten to use some of the loop unrolling procedures,
7053 such as approx_final_value, biv_total_increment, loop_iterations, and
7054 final_[bg]iv_value. */
7057 check_dbra_loop (loop, insn_count)
7061 struct loop_info *loop_info = LOOP_INFO (loop);
7062 struct loop_regs *regs = LOOP_REGS (loop);
7063 struct loop_ivs *ivs = LOOP_IVS (loop);
7064 struct iv_class *bl;
7071 rtx before_comparison;
7075 int compare_and_branch;
7076 rtx loop_start = loop->start;
7077 rtx loop_end = loop->end;
7079 /* If last insn is a conditional branch, and the insn before tests a
7080 register value, try to optimize it. Otherwise, we can't do anything. */
7082 jump = PREV_INSN (loop_end);
7083 comparison = get_condition_for_loop (loop, jump);
7084 if (comparison == 0)
7086 if (!onlyjump_p (jump))
7089 /* Try to compute whether the compare/branch at the loop end is one or
7090 two instructions. */
7091 get_condition (jump, &first_compare);
7092 if (first_compare == jump)
7093 compare_and_branch = 1;
7094 else if (first_compare == prev_nonnote_insn (jump))
7095 compare_and_branch = 2;
7100 /* If more than one condition is present to control the loop, then
7101 do not proceed, as this function does not know how to rewrite
7102 loop tests with more than one condition.
7104 Look backwards from the first insn in the last comparison
7105 sequence and see if we've got another comparison sequence. */
7108 if ((jump1 = prev_nonnote_insn (first_compare)) != loop->cont)
7109 if (GET_CODE (jump1) == JUMP_INSN)
7113 /* Check all of the bivs to see if the compare uses one of them.
7114 Skip biv's set more than once because we can't guarantee that
7115 it will be zero on the last iteration. Also skip if the biv is
7116 used between its update and the test insn. */
7118 for (bl = ivs->loop_iv_list; bl; bl = bl->next)
7120 if (bl->biv_count == 1
7121 && ! bl->biv->maybe_multiple
7122 && bl->biv->dest_reg == XEXP (comparison, 0)
7123 && ! reg_used_between_p (regno_reg_rtx[bl->regno], bl->biv->insn,
7131 /* Look for the case where the basic induction variable is always
7132 nonnegative, and equals zero on the last iteration.
7133 In this case, add a reg_note REG_NONNEG, which allows the
7134 m68k DBRA instruction to be used. */
7136 if (((GET_CODE (comparison) == GT
7137 && GET_CODE (XEXP (comparison, 1)) == CONST_INT
7138 && INTVAL (XEXP (comparison, 1)) == -1)
7139 || (GET_CODE (comparison) == NE && XEXP (comparison, 1) == const0_rtx))
7140 && GET_CODE (bl->biv->add_val) == CONST_INT
7141 && INTVAL (bl->biv->add_val) < 0)
7143 /* Initial value must be greater than 0,
7144 init_val % -dec_value == 0 to ensure that it equals zero on
7145 the last iteration */
7147 if (GET_CODE (bl->initial_value) == CONST_INT
7148 && INTVAL (bl->initial_value) > 0
7149 && (INTVAL (bl->initial_value)
7150 % (-INTVAL (bl->biv->add_val))) == 0)
7152 /* register always nonnegative, add REG_NOTE to branch */
7153 if (! find_reg_note (jump, REG_NONNEG, NULL_RTX))
7155 = gen_rtx_EXPR_LIST (REG_NONNEG, bl->biv->dest_reg,
7162 /* If the decrement is 1 and the value was tested as >= 0 before
7163 the loop, then we can safely optimize. */
7164 for (p = loop_start; p; p = PREV_INSN (p))
7166 if (GET_CODE (p) == CODE_LABEL)
7168 if (GET_CODE (p) != JUMP_INSN)
7171 before_comparison = get_condition_for_loop (loop, p);
7172 if (before_comparison
7173 && XEXP (before_comparison, 0) == bl->biv->dest_reg
7174 && GET_CODE (before_comparison) == LT
7175 && XEXP (before_comparison, 1) == const0_rtx
7176 && ! reg_set_between_p (bl->biv->dest_reg, p, loop_start)
7177 && INTVAL (bl->biv->add_val) == -1)
7179 if (! find_reg_note (jump, REG_NONNEG, NULL_RTX))
7181 = gen_rtx_EXPR_LIST (REG_NONNEG, bl->biv->dest_reg,
7189 else if (GET_CODE (bl->biv->add_val) == CONST_INT
7190 && INTVAL (bl->biv->add_val) > 0)
7192 /* Try to change inc to dec, so can apply above optimization. */
7194 all registers modified are induction variables or invariant,
7195 all memory references have non-overlapping addresses
7196 (obviously true if only one write)
7197 allow 2 insns for the compare/jump at the end of the loop. */
7198 /* Also, we must avoid any instructions which use both the reversed
7199 biv and another biv. Such instructions will fail if the loop is
7200 reversed. We meet this condition by requiring that either
7201 no_use_except_counting is true, or else that there is only
7203 int num_nonfixed_reads = 0;
7204 /* 1 if the iteration var is used only to count iterations. */
7205 int no_use_except_counting = 0;
7206 /* 1 if the loop has no memory store, or it has a single memory store
7207 which is reversible. */
7208 int reversible_mem_store = 1;
7210 if (bl->giv_count == 0 && ! loop->exit_count)
7212 rtx bivreg = regno_reg_rtx[bl->regno];
7214 /* If there are no givs for this biv, and the only exit is the
7215 fall through at the end of the loop, then
7216 see if perhaps there are no uses except to count. */
7217 no_use_except_counting = 1;
7218 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
7221 rtx set = single_set (p);
7223 if (set && GET_CODE (SET_DEST (set)) == REG
7224 && REGNO (SET_DEST (set)) == bl->regno)
7225 /* An insn that sets the biv is okay. */
7227 else if ((p == prev_nonnote_insn (prev_nonnote_insn (loop_end))
7228 || p == prev_nonnote_insn (loop_end))
7229 && reg_mentioned_p (bivreg, PATTERN (p)))
7231 /* If either of these insns uses the biv and sets a pseudo
7232 that has more than one usage, then the biv has uses
7233 other than counting since it's used to derive a value
7234 that is used more than one time. */
7235 note_stores (PATTERN (p), note_set_pseudo_multiple_uses,
7237 if (regs->multiple_uses)
7239 no_use_except_counting = 0;
7243 else if (reg_mentioned_p (bivreg, PATTERN (p)))
7245 no_use_except_counting = 0;
7251 if (no_use_except_counting)
7252 /* No need to worry about MEMs. */
7254 else if (loop_info->num_mem_sets <= 1)
7256 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
7258 num_nonfixed_reads += count_nonfixed_reads (loop, PATTERN (p));
7260 /* If the loop has a single store, and the destination address is
7261 invariant, then we can't reverse the loop, because this address
7262 might then have the wrong value at loop exit.
7263 This would work if the source was invariant also, however, in that
7264 case, the insn should have been moved out of the loop. */
7266 if (loop_info->num_mem_sets == 1)
7268 struct induction *v;
7270 reversible_mem_store
7271 = (! loop_info->unknown_address_altered
7272 && ! loop_info->unknown_constant_address_altered
7273 && ! loop_invariant_p (loop,
7274 XEXP (XEXP (loop_info->store_mems, 0),
7277 /* If the store depends on a register that is set after the
7278 store, it depends on the initial value, and is thus not
7280 for (v = bl->giv; reversible_mem_store && v; v = v->next_iv)
7282 if (v->giv_type == DEST_REG
7283 && reg_mentioned_p (v->dest_reg,
7284 PATTERN (loop_info->first_loop_store_insn))
7285 && loop_insn_first_p (loop_info->first_loop_store_insn,
7287 reversible_mem_store = 0;
7294 /* This code only acts for innermost loops. Also it simplifies
7295 the memory address check by only reversing loops with
7296 zero or one memory access.
7297 Two memory accesses could involve parts of the same array,
7298 and that can't be reversed.
7299 If the biv is used only for counting, than we don't need to worry
7300 about all these things. */
7302 if ((num_nonfixed_reads <= 1
7303 && ! loop_info->has_call
7304 && ! loop_info->has_volatile
7305 && reversible_mem_store
7306 && (bl->giv_count + bl->biv_count + loop_info->num_mem_sets
7307 + the_movables.num + compare_and_branch == insn_count)
7308 && (bl == ivs->loop_iv_list && bl->next == 0))
7309 || no_use_except_counting)
7313 /* Loop can be reversed. */
7314 if (loop_dump_stream)
7315 fprintf (loop_dump_stream, "Can reverse loop\n");
7317 /* Now check other conditions:
7319 The increment must be a constant, as must the initial value,
7320 and the comparison code must be LT.
7322 This test can probably be improved since +/- 1 in the constant
7323 can be obtained by changing LT to LE and vice versa; this is
7327 /* for constants, LE gets turned into LT */
7328 && (GET_CODE (comparison) == LT
7329 || (GET_CODE (comparison) == LE
7330 && no_use_except_counting)))
7332 HOST_WIDE_INT add_val, add_adjust, comparison_val = 0;
7333 rtx initial_value, comparison_value;
7335 enum rtx_code cmp_code;
7336 int comparison_const_width;
7337 unsigned HOST_WIDE_INT comparison_sign_mask;
7339 add_val = INTVAL (bl->biv->add_val);
7340 comparison_value = XEXP (comparison, 1);
7341 if (GET_MODE (comparison_value) == VOIDmode)
7342 comparison_const_width
7343 = GET_MODE_BITSIZE (GET_MODE (XEXP (comparison, 0)));
7345 comparison_const_width
7346 = GET_MODE_BITSIZE (GET_MODE (comparison_value));
7347 if (comparison_const_width > HOST_BITS_PER_WIDE_INT)
7348 comparison_const_width = HOST_BITS_PER_WIDE_INT;
7349 comparison_sign_mask
7350 = (unsigned HOST_WIDE_INT) 1 << (comparison_const_width - 1);
7352 /* If the comparison value is not a loop invariant, then we
7353 can not reverse this loop.
7355 ??? If the insns which initialize the comparison value as
7356 a whole compute an invariant result, then we could move
7357 them out of the loop and proceed with loop reversal. */
7358 if (! loop_invariant_p (loop, comparison_value))
7361 if (GET_CODE (comparison_value) == CONST_INT)
7362 comparison_val = INTVAL (comparison_value);
7363 initial_value = bl->initial_value;
7365 /* Normalize the initial value if it is an integer and
7366 has no other use except as a counter. This will allow
7367 a few more loops to be reversed. */
7368 if (no_use_except_counting
7369 && GET_CODE (comparison_value) == CONST_INT
7370 && GET_CODE (initial_value) == CONST_INT)
7372 comparison_val = comparison_val - INTVAL (bl->initial_value);
7373 /* The code below requires comparison_val to be a multiple
7374 of add_val in order to do the loop reversal, so
7375 round up comparison_val to a multiple of add_val.
7376 Since comparison_value is constant, we know that the
7377 current comparison code is LT. */
7378 comparison_val = comparison_val + add_val - 1;
7380 -= (unsigned HOST_WIDE_INT) comparison_val % add_val;
7381 /* We postpone overflow checks for COMPARISON_VAL here;
7382 even if there is an overflow, we might still be able to
7383 reverse the loop, if converting the loop exit test to
7385 initial_value = const0_rtx;
7388 /* First check if we can do a vanilla loop reversal. */
7389 if (initial_value == const0_rtx
7390 /* If we have a decrement_and_branch_on_count,
7391 prefer the NE test, since this will allow that
7392 instruction to be generated. Note that we must
7393 use a vanilla loop reversal if the biv is used to
7394 calculate a giv or has a non-counting use. */
7395 #if ! defined (HAVE_decrement_and_branch_until_zero) \
7396 && defined (HAVE_decrement_and_branch_on_count)
7397 && (! (add_val == 1 && loop->vtop
7398 && (bl->biv_count == 0
7399 || no_use_except_counting)))
7401 && GET_CODE (comparison_value) == CONST_INT
7402 /* Now do postponed overflow checks on COMPARISON_VAL. */
7403 && ! (((comparison_val - add_val) ^ INTVAL (comparison_value))
7404 & comparison_sign_mask))
7406 /* Register will always be nonnegative, with value
7407 0 on last iteration */
7408 add_adjust = add_val;
7412 else if (add_val == 1 && loop->vtop
7413 && (bl->biv_count == 0
7414 || no_use_except_counting))
7422 if (GET_CODE (comparison) == LE)
7423 add_adjust -= add_val;
7425 /* If the initial value is not zero, or if the comparison
7426 value is not an exact multiple of the increment, then we
7427 can not reverse this loop. */
7428 if (initial_value == const0_rtx
7429 && GET_CODE (comparison_value) == CONST_INT)
7431 if (((unsigned HOST_WIDE_INT) comparison_val % add_val) != 0)
7436 if (! no_use_except_counting || add_val != 1)
7440 final_value = comparison_value;
7442 /* Reset these in case we normalized the initial value
7443 and comparison value above. */
7444 if (GET_CODE (comparison_value) == CONST_INT
7445 && GET_CODE (initial_value) == CONST_INT)
7447 comparison_value = GEN_INT (comparison_val);
7449 = GEN_INT (comparison_val + INTVAL (bl->initial_value));
7451 bl->initial_value = initial_value;
7453 /* Save some info needed to produce the new insns. */
7454 reg = bl->biv->dest_reg;
7455 jump_label = XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end))), 1);
7456 if (jump_label == pc_rtx)
7457 jump_label = XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end))), 2);
7458 new_add_val = GEN_INT (-INTVAL (bl->biv->add_val));
7460 /* Set start_value; if this is not a CONST_INT, we need
7462 Initialize biv to start_value before loop start.
7463 The old initializing insn will be deleted as a
7464 dead store by flow.c. */
7465 if (initial_value == const0_rtx
7466 && GET_CODE (comparison_value) == CONST_INT)
7468 start_value = GEN_INT (comparison_val - add_adjust);
7469 emit_insn_before (gen_move_insn (reg, start_value),
7472 else if (GET_CODE (initial_value) == CONST_INT)
7474 rtx offset = GEN_INT (-INTVAL (initial_value) - add_adjust);
7475 enum machine_mode mode = GET_MODE (reg);
7476 enum insn_code icode
7477 = add_optab->handlers[(int) mode].insn_code;
7479 if (! (*insn_data[icode].operand[0].predicate) (reg, mode)
7480 || ! ((*insn_data[icode].operand[1].predicate)
7481 (comparison_value, mode))
7482 || ! ((*insn_data[icode].operand[2].predicate)
7486 = gen_rtx_PLUS (mode, comparison_value, offset);
7487 emit_insn_before ((GEN_FCN (icode)
7488 (reg, comparison_value, offset)),
7490 if (GET_CODE (comparison) == LE)
7491 final_value = gen_rtx_PLUS (mode, comparison_value,
7494 else if (! add_adjust)
7496 enum machine_mode mode = GET_MODE (reg);
7497 enum insn_code icode
7498 = sub_optab->handlers[(int) mode].insn_code;
7499 if (! (*insn_data[icode].operand[0].predicate) (reg, mode)
7500 || ! ((*insn_data[icode].operand[1].predicate)
7501 (comparison_value, mode))
7502 || ! ((*insn_data[icode].operand[2].predicate)
7503 (initial_value, mode)))
7506 = gen_rtx_MINUS (mode, comparison_value, initial_value);
7507 emit_insn_before ((GEN_FCN (icode)
7508 (reg, comparison_value, initial_value)),
7512 /* We could handle the other cases too, but it'll be
7513 better to have a testcase first. */
7516 /* We may not have a single insn which can increment a reg, so
7517 create a sequence to hold all the insns from expand_inc. */
7519 expand_inc (reg, new_add_val);
7520 tem = gen_sequence ();
7523 p = emit_insn_before (tem, bl->biv->insn);
7524 delete_insn (bl->biv->insn);
7526 /* Update biv info to reflect its new status. */
7528 bl->initial_value = start_value;
7529 bl->biv->add_val = new_add_val;
7531 /* Update loop info. */
7532 loop_info->initial_value = reg;
7533 loop_info->initial_equiv_value = reg;
7534 loop_info->final_value = const0_rtx;
7535 loop_info->final_equiv_value = const0_rtx;
7536 loop_info->comparison_value = const0_rtx;
7537 loop_info->comparison_code = cmp_code;
7538 loop_info->increment = new_add_val;
7540 /* Inc LABEL_NUSES so that delete_insn will
7541 not delete the label. */
7542 LABEL_NUSES (XEXP (jump_label, 0))++;
7544 /* Emit an insn after the end of the loop to set the biv's
7545 proper exit value if it is used anywhere outside the loop. */
7546 if ((REGNO_LAST_UID (bl->regno) != INSN_UID (first_compare))
7548 || REGNO_FIRST_UID (bl->regno) != INSN_UID (bl->init_insn))
7549 emit_insn_after (gen_move_insn (reg, final_value),
7552 /* Delete compare/branch at end of loop. */
7553 delete_insn (PREV_INSN (loop_end));
7554 if (compare_and_branch == 2)
7555 delete_insn (first_compare);
7557 /* Add new compare/branch insn at end of loop. */
7559 emit_cmp_and_jump_insns (reg, const0_rtx, cmp_code, NULL_RTX,
7560 GET_MODE (reg), 0, 0,
7561 XEXP (jump_label, 0));
7562 tem = gen_sequence ();
7564 emit_jump_insn_before (tem, loop_end);
7566 for (tem = PREV_INSN (loop_end);
7567 tem && GET_CODE (tem) != JUMP_INSN;
7568 tem = PREV_INSN (tem))
7572 JUMP_LABEL (tem) = XEXP (jump_label, 0);
7578 /* Increment of LABEL_NUSES done above. */
7579 /* Register is now always nonnegative,
7580 so add REG_NONNEG note to the branch. */
7581 REG_NOTES (tem) = gen_rtx_EXPR_LIST (REG_NONNEG, reg,
7587 /* No insn may reference both the reversed and another biv or it
7588 will fail (see comment near the top of the loop reversal
7590 Earlier on, we have verified that the biv has no use except
7591 counting, or it is the only biv in this function.
7592 However, the code that computes no_use_except_counting does
7593 not verify reg notes. It's possible to have an insn that
7594 references another biv, and has a REG_EQUAL note with an
7595 expression based on the reversed biv. To avoid this case,
7596 remove all REG_EQUAL notes based on the reversed biv
7598 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
7602 rtx set = single_set (p);
7603 /* If this is a set of a GIV based on the reversed biv, any
7604 REG_EQUAL notes should still be correct. */
7606 || GET_CODE (SET_DEST (set)) != REG
7607 || (size_t) REGNO (SET_DEST (set)) >= ivs->reg_iv_type->num_elements
7608 || REG_IV_TYPE (ivs, REGNO (SET_DEST (set))) != GENERAL_INDUCT
7609 || REG_IV_INFO (ivs, REGNO (SET_DEST (set)))->src_reg != bl->biv->src_reg)
7610 for (pnote = ®_NOTES (p); *pnote;)
7612 if (REG_NOTE_KIND (*pnote) == REG_EQUAL
7613 && reg_mentioned_p (regno_reg_rtx[bl->regno],
7615 *pnote = XEXP (*pnote, 1);
7617 pnote = &XEXP (*pnote, 1);
7621 /* Mark that this biv has been reversed. Each giv which depends
7622 on this biv, and which is also live past the end of the loop
7623 will have to be fixed up. */
7627 if (loop_dump_stream)
7629 fprintf (loop_dump_stream, "Reversed loop");
7631 fprintf (loop_dump_stream, " and added reg_nonneg\n");
7633 fprintf (loop_dump_stream, "\n");
7644 /* Verify whether the biv BL appears to be eliminable,
7645 based on the insns in the loop that refer to it.
7647 If ELIMINATE_P is non-zero, actually do the elimination.
7649 THRESHOLD and INSN_COUNT are from loop_optimize and are used to
7650 determine whether invariant insns should be placed inside or at the
7651 start of the loop. */
7654 maybe_eliminate_biv (loop, bl, eliminate_p, threshold, insn_count)
7655 const struct loop *loop;
7656 struct iv_class *bl;
7658 int threshold, insn_count;
7660 struct loop_ivs *ivs = LOOP_IVS (loop);
7661 rtx reg = bl->biv->dest_reg;
7662 rtx loop_start = loop->start;
7663 rtx loop_end = loop->end;
7666 /* Scan all insns in the loop, stopping if we find one that uses the
7667 biv in a way that we cannot eliminate. */
7669 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
7671 enum rtx_code code = GET_CODE (p);
7672 rtx where = threshold >= insn_count ? loop_start : p;
7674 /* If this is a libcall that sets a giv, skip ahead to its end. */
7675 if (GET_RTX_CLASS (code) == 'i')
7677 rtx note = find_reg_note (p, REG_LIBCALL, NULL_RTX);
7681 rtx last = XEXP (note, 0);
7682 rtx set = single_set (last);
7684 if (set && GET_CODE (SET_DEST (set)) == REG)
7686 unsigned int regno = REGNO (SET_DEST (set));
7688 if (regno < max_reg_before_loop
7689 && REG_IV_TYPE (ivs, regno) == GENERAL_INDUCT
7690 && REG_IV_INFO (ivs, regno)->src_reg == bl->biv->src_reg)
7695 if ((code == INSN || code == JUMP_INSN || code == CALL_INSN)
7696 && reg_mentioned_p (reg, PATTERN (p))
7697 && ! maybe_eliminate_biv_1 (loop, PATTERN (p), p, bl,
7698 eliminate_p, where))
7700 if (loop_dump_stream)
7701 fprintf (loop_dump_stream,
7702 "Cannot eliminate biv %d: biv used in insn %d.\n",
7703 bl->regno, INSN_UID (p));
7710 if (loop_dump_stream)
7711 fprintf (loop_dump_stream, "biv %d %s eliminated.\n",
7712 bl->regno, eliminate_p ? "was" : "can be");
7719 /* INSN and REFERENCE are instructions in the same insn chain.
7720 Return non-zero if INSN is first. */
7723 loop_insn_first_p (insn, reference)
7724 rtx insn, reference;
7728 for (p = insn, q = reference;;)
7730 /* Start with test for not first so that INSN == REFERENCE yields not
7732 if (q == insn || ! p)
7734 if (p == reference || ! q)
7737 /* Either of P or Q might be a NOTE. Notes have the same LUID as the
7738 previous insn, hence the <= comparison below does not work if
7740 if (INSN_UID (p) < max_uid_for_loop
7741 && INSN_UID (q) < max_uid_for_loop
7742 && GET_CODE (p) != NOTE)
7743 return INSN_LUID (p) <= INSN_LUID (q);
7745 if (INSN_UID (p) >= max_uid_for_loop
7746 || GET_CODE (p) == NOTE)
7748 if (INSN_UID (q) >= max_uid_for_loop)
7753 /* We are trying to eliminate BIV in INSN using GIV. Return non-zero if
7754 the offset that we have to take into account due to auto-increment /
7755 div derivation is zero. */
7757 biv_elimination_giv_has_0_offset (biv, giv, insn)
7758 struct induction *biv, *giv;
7761 /* If the giv V had the auto-inc address optimization applied
7762 to it, and INSN occurs between the giv insn and the biv
7763 insn, then we'd have to adjust the value used here.
7764 This is rare, so we don't bother to make this possible. */
7765 if (giv->auto_inc_opt
7766 && ((loop_insn_first_p (giv->insn, insn)
7767 && loop_insn_first_p (insn, biv->insn))
7768 || (loop_insn_first_p (biv->insn, insn)
7769 && loop_insn_first_p (insn, giv->insn))))
7775 /* If BL appears in X (part of the pattern of INSN), see if we can
7776 eliminate its use. If so, return 1. If not, return 0.
7778 If BIV does not appear in X, return 1.
7780 If ELIMINATE_P is non-zero, actually do the elimination. WHERE indicates
7781 where extra insns should be added. Depending on how many items have been
7782 moved out of the loop, it will either be before INSN or at the start of
7786 maybe_eliminate_biv_1 (loop, x, insn, bl, eliminate_p, where)
7787 const struct loop *loop;
7789 struct iv_class *bl;
7793 enum rtx_code code = GET_CODE (x);
7794 rtx reg = bl->biv->dest_reg;
7795 enum machine_mode mode = GET_MODE (reg);
7796 struct induction *v;
7808 /* If we haven't already been able to do something with this BIV,
7809 we can't eliminate it. */
7815 /* If this sets the BIV, it is not a problem. */
7816 if (SET_DEST (x) == reg)
7819 /* If this is an insn that defines a giv, it is also ok because
7820 it will go away when the giv is reduced. */
7821 for (v = bl->giv; v; v = v->next_iv)
7822 if (v->giv_type == DEST_REG && SET_DEST (x) == v->dest_reg)
7826 if (SET_DEST (x) == cc0_rtx && SET_SRC (x) == reg)
7828 /* Can replace with any giv that was reduced and
7829 that has (MULT_VAL != 0) and (ADD_VAL == 0).
7830 Require a constant for MULT_VAL, so we know it's nonzero.
7831 ??? We disable this optimization to avoid potential
7834 for (v = bl->giv; v; v = v->next_iv)
7835 if (GET_CODE (v->mult_val) == CONST_INT && v->mult_val != const0_rtx
7836 && v->add_val == const0_rtx
7837 && ! v->ignore && ! v->maybe_dead && v->always_computable
7841 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
7847 /* If the giv has the opposite direction of change,
7848 then reverse the comparison. */
7849 if (INTVAL (v->mult_val) < 0)
7850 new = gen_rtx_COMPARE (GET_MODE (v->new_reg),
7851 const0_rtx, v->new_reg);
7855 /* We can probably test that giv's reduced reg. */
7856 if (validate_change (insn, &SET_SRC (x), new, 0))
7860 /* Look for a giv with (MULT_VAL != 0) and (ADD_VAL != 0);
7861 replace test insn with a compare insn (cmp REDUCED_GIV ADD_VAL).
7862 Require a constant for MULT_VAL, so we know it's nonzero.
7863 ??? Do this only if ADD_VAL is a pointer to avoid a potential
7864 overflow problem. */
7866 for (v = bl->giv; v; v = v->next_iv)
7867 if (GET_CODE (v->mult_val) == CONST_INT
7868 && v->mult_val != const0_rtx
7869 && ! v->ignore && ! v->maybe_dead && v->always_computable
7871 && (GET_CODE (v->add_val) == SYMBOL_REF
7872 || GET_CODE (v->add_val) == LABEL_REF
7873 || GET_CODE (v->add_val) == CONST
7874 || (GET_CODE (v->add_val) == REG
7875 && REGNO_POINTER_FLAG (REGNO (v->add_val)))))
7877 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
7883 /* If the giv has the opposite direction of change,
7884 then reverse the comparison. */
7885 if (INTVAL (v->mult_val) < 0)
7886 new = gen_rtx_COMPARE (VOIDmode, copy_rtx (v->add_val),
7889 new = gen_rtx_COMPARE (VOIDmode, v->new_reg,
7890 copy_rtx (v->add_val));
7892 /* Replace biv with the giv's reduced register. */
7893 update_reg_last_use (v->add_val, insn);
7894 if (validate_change (insn, &SET_SRC (PATTERN (insn)), new, 0))
7897 /* Insn doesn't support that constant or invariant. Copy it
7898 into a register (it will be a loop invariant.) */
7899 tem = gen_reg_rtx (GET_MODE (v->new_reg));
7901 emit_insn_before (gen_move_insn (tem, copy_rtx (v->add_val)),
7904 /* Substitute the new register for its invariant value in
7905 the compare expression. */
7906 XEXP (new, (INTVAL (v->mult_val) < 0) ? 0 : 1) = tem;
7907 if (validate_change (insn, &SET_SRC (PATTERN (insn)), new, 0))
7916 case GT: case GE: case GTU: case GEU:
7917 case LT: case LE: case LTU: case LEU:
7918 /* See if either argument is the biv. */
7919 if (XEXP (x, 0) == reg)
7920 arg = XEXP (x, 1), arg_operand = 1;
7921 else if (XEXP (x, 1) == reg)
7922 arg = XEXP (x, 0), arg_operand = 0;
7926 if (CONSTANT_P (arg))
7928 /* First try to replace with any giv that has constant positive
7929 mult_val and constant add_val. We might be able to support
7930 negative mult_val, but it seems complex to do it in general. */
7932 for (v = bl->giv; v; v = v->next_iv)
7933 if (GET_CODE (v->mult_val) == CONST_INT
7934 && INTVAL (v->mult_val) > 0
7935 && (GET_CODE (v->add_val) == SYMBOL_REF
7936 || GET_CODE (v->add_val) == LABEL_REF
7937 || GET_CODE (v->add_val) == CONST
7938 || (GET_CODE (v->add_val) == REG
7939 && REGNO_POINTER_FLAG (REGNO (v->add_val))))
7940 && ! v->ignore && ! v->maybe_dead && v->always_computable
7943 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
7949 /* Replace biv with the giv's reduced reg. */
7950 validate_change (insn, &XEXP (x, 1 - arg_operand), v->new_reg, 1);
7952 /* If all constants are actually constant integers and
7953 the derived constant can be directly placed in the COMPARE,
7955 if (GET_CODE (arg) == CONST_INT
7956 && GET_CODE (v->mult_val) == CONST_INT
7957 && GET_CODE (v->add_val) == CONST_INT)
7959 validate_change (insn, &XEXP (x, arg_operand),
7960 GEN_INT (INTVAL (arg)
7961 * INTVAL (v->mult_val)
7962 + INTVAL (v->add_val)), 1);
7966 /* Otherwise, load it into a register. */
7967 tem = gen_reg_rtx (mode);
7968 emit_iv_add_mult (arg, v->mult_val, v->add_val, tem, where);
7969 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
7971 if (apply_change_group ())
7975 /* Look for giv with positive constant mult_val and nonconst add_val.
7976 Insert insns to calculate new compare value.
7977 ??? Turn this off due to possible overflow. */
7979 for (v = bl->giv; v; v = v->next_iv)
7980 if (GET_CODE (v->mult_val) == CONST_INT
7981 && INTVAL (v->mult_val) > 0
7982 && ! v->ignore && ! v->maybe_dead && v->always_computable
7988 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
7994 tem = gen_reg_rtx (mode);
7996 /* Replace biv with giv's reduced register. */
7997 validate_change (insn, &XEXP (x, 1 - arg_operand),
8000 /* Compute value to compare against. */
8001 emit_iv_add_mult (arg, v->mult_val, v->add_val, tem, where);
8002 /* Use it in this insn. */
8003 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
8004 if (apply_change_group ())
8008 else if (GET_CODE (arg) == REG || GET_CODE (arg) == MEM)
8010 if (loop_invariant_p (loop, arg) == 1)
8012 /* Look for giv with constant positive mult_val and nonconst
8013 add_val. Insert insns to compute new compare value.
8014 ??? Turn this off due to possible overflow. */
8016 for (v = bl->giv; v; v = v->next_iv)
8017 if (GET_CODE (v->mult_val) == CONST_INT && INTVAL (v->mult_val) > 0
8018 && ! v->ignore && ! v->maybe_dead && v->always_computable
8024 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8030 tem = gen_reg_rtx (mode);
8032 /* Replace biv with giv's reduced register. */
8033 validate_change (insn, &XEXP (x, 1 - arg_operand),
8036 /* Compute value to compare against. */
8037 emit_iv_add_mult (arg, v->mult_val, v->add_val,
8039 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
8040 if (apply_change_group ())
8045 /* This code has problems. Basically, you can't know when
8046 seeing if we will eliminate BL, whether a particular giv
8047 of ARG will be reduced. If it isn't going to be reduced,
8048 we can't eliminate BL. We can try forcing it to be reduced,
8049 but that can generate poor code.
8051 The problem is that the benefit of reducing TV, below should
8052 be increased if BL can actually be eliminated, but this means
8053 we might have to do a topological sort of the order in which
8054 we try to process biv. It doesn't seem worthwhile to do
8055 this sort of thing now. */
8058 /* Otherwise the reg compared with had better be a biv. */
8059 if (GET_CODE (arg) != REG
8060 || REG_IV_TYPE (ivs, REGNO (arg)) != BASIC_INDUCT)
8063 /* Look for a pair of givs, one for each biv,
8064 with identical coefficients. */
8065 for (v = bl->giv; v; v = v->next_iv)
8067 struct induction *tv;
8069 if (v->ignore || v->maybe_dead || v->mode != mode)
8072 for (tv = ivs->reg_biv_class[REGNO (arg)]->giv; tv; tv = tv->next_iv)
8073 if (! tv->ignore && ! tv->maybe_dead
8074 && rtx_equal_p (tv->mult_val, v->mult_val)
8075 && rtx_equal_p (tv->add_val, v->add_val)
8076 && tv->mode == mode)
8078 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8084 /* Replace biv with its giv's reduced reg. */
8085 XEXP (x, 1 - arg_operand) = v->new_reg;
8086 /* Replace other operand with the other giv's
8088 XEXP (x, arg_operand) = tv->new_reg;
8095 /* If we get here, the biv can't be eliminated. */
8099 /* If this address is a DEST_ADDR giv, it doesn't matter if the
8100 biv is used in it, since it will be replaced. */
8101 for (v = bl->giv; v; v = v->next_iv)
8102 if (v->giv_type == DEST_ADDR && v->location == &XEXP (x, 0))
8110 /* See if any subexpression fails elimination. */
8111 fmt = GET_RTX_FORMAT (code);
8112 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
8117 if (! maybe_eliminate_biv_1 (loop, XEXP (x, i), insn, bl,
8118 eliminate_p, where))
8123 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
8124 if (! maybe_eliminate_biv_1 (loop, XVECEXP (x, i, j), insn, bl,
8125 eliminate_p, where))
8134 /* Return nonzero if the last use of REG
8135 is in an insn following INSN in the same basic block. */
8138 last_use_this_basic_block (reg, insn)
8144 n && GET_CODE (n) != CODE_LABEL && GET_CODE (n) != JUMP_INSN;
8147 if (REGNO_LAST_UID (REGNO (reg)) == INSN_UID (n))
8153 /* Called via `note_stores' to record the initial value of a biv. Here we
8154 just record the location of the set and process it later. */
8157 record_initial (dest, set, data)
8160 void *data ATTRIBUTE_UNUSED;
8162 struct loop_ivs *ivs = (struct loop_ivs *) data;
8163 struct iv_class *bl;
8165 if (GET_CODE (dest) != REG
8166 || REGNO (dest) >= max_reg_before_loop
8167 || REG_IV_TYPE (ivs, REGNO (dest)) != BASIC_INDUCT)
8170 bl = ivs->reg_biv_class[REGNO (dest)];
8172 /* If this is the first set found, record it. */
8173 if (bl->init_insn == 0)
8175 bl->init_insn = note_insn;
8180 /* If any of the registers in X are "old" and currently have a last use earlier
8181 than INSN, update them to have a last use of INSN. Their actual last use
8182 will be the previous insn but it will not have a valid uid_luid so we can't
8186 update_reg_last_use (x, insn)
8190 /* Check for the case where INSN does not have a valid luid. In this case,
8191 there is no need to modify the regno_last_uid, as this can only happen
8192 when code is inserted after the loop_end to set a pseudo's final value,
8193 and hence this insn will never be the last use of x. */
8194 if (GET_CODE (x) == REG && REGNO (x) < max_reg_before_loop
8195 && INSN_UID (insn) < max_uid_for_loop
8196 && uid_luid[REGNO_LAST_UID (REGNO (x))] < uid_luid[INSN_UID (insn)])
8197 REGNO_LAST_UID (REGNO (x)) = INSN_UID (insn);
8201 register const char *fmt = GET_RTX_FORMAT (GET_CODE (x));
8202 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
8205 update_reg_last_use (XEXP (x, i), insn);
8206 else if (fmt[i] == 'E')
8207 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
8208 update_reg_last_use (XVECEXP (x, i, j), insn);
8213 /* Given an insn INSN and condition COND, return the condition in a
8214 canonical form to simplify testing by callers. Specifically:
8216 (1) The code will always be a comparison operation (EQ, NE, GT, etc.).
8217 (2) Both operands will be machine operands; (cc0) will have been replaced.
8218 (3) If an operand is a constant, it will be the second operand.
8219 (4) (LE x const) will be replaced with (LT x <const+1>) and similarly
8220 for GE, GEU, and LEU.
8222 If the condition cannot be understood, or is an inequality floating-point
8223 comparison which needs to be reversed, 0 will be returned.
8225 If REVERSE is non-zero, then reverse the condition prior to canonizing it.
8227 If EARLIEST is non-zero, it is a pointer to a place where the earliest
8228 insn used in locating the condition was found. If a replacement test
8229 of the condition is desired, it should be placed in front of that
8230 insn and we will be sure that the inputs are still valid.
8232 If WANT_REG is non-zero, we wish the condition to be relative to that
8233 register, if possible. Therefore, do not canonicalize the condition
8237 canonicalize_condition (insn, cond, reverse, earliest, want_reg)
8249 int reverse_code = 0;
8250 int did_reverse_condition = 0;
8251 enum machine_mode mode;
8253 code = GET_CODE (cond);
8254 mode = GET_MODE (cond);
8255 op0 = XEXP (cond, 0);
8256 op1 = XEXP (cond, 1);
8260 code = reverse_condition (code);
8261 did_reverse_condition ^= 1;
8267 /* If we are comparing a register with zero, see if the register is set
8268 in the previous insn to a COMPARE or a comparison operation. Perform
8269 the same tests as a function of STORE_FLAG_VALUE as find_comparison_args
8272 while (GET_RTX_CLASS (code) == '<'
8273 && op1 == CONST0_RTX (GET_MODE (op0))
8276 /* Set non-zero when we find something of interest. */
8280 /* If comparison with cc0, import actual comparison from compare
8284 if ((prev = prev_nonnote_insn (prev)) == 0
8285 || GET_CODE (prev) != INSN
8286 || (set = single_set (prev)) == 0
8287 || SET_DEST (set) != cc0_rtx)
8290 op0 = SET_SRC (set);
8291 op1 = CONST0_RTX (GET_MODE (op0));
8297 /* If this is a COMPARE, pick up the two things being compared. */
8298 if (GET_CODE (op0) == COMPARE)
8300 op1 = XEXP (op0, 1);
8301 op0 = XEXP (op0, 0);
8304 else if (GET_CODE (op0) != REG)
8307 /* Go back to the previous insn. Stop if it is not an INSN. We also
8308 stop if it isn't a single set or if it has a REG_INC note because
8309 we don't want to bother dealing with it. */
8311 if ((prev = prev_nonnote_insn (prev)) == 0
8312 || GET_CODE (prev) != INSN
8313 || FIND_REG_INC_NOTE (prev, 0)
8314 || (set = single_set (prev)) == 0)
8317 /* If this is setting OP0, get what it sets it to if it looks
8319 if (rtx_equal_p (SET_DEST (set), op0))
8321 enum machine_mode inner_mode = GET_MODE (SET_DEST (set));
8323 /* ??? We may not combine comparisons done in a CCmode with
8324 comparisons not done in a CCmode. This is to aid targets
8325 like Alpha that have an IEEE compliant EQ instruction, and
8326 a non-IEEE compliant BEQ instruction. The use of CCmode is
8327 actually artificial, simply to prevent the combination, but
8328 should not affect other platforms.
8330 However, we must allow VOIDmode comparisons to match either
8331 CCmode or non-CCmode comparison, because some ports have
8332 modeless comparisons inside branch patterns.
8334 ??? This mode check should perhaps look more like the mode check
8335 in simplify_comparison in combine. */
8337 if ((GET_CODE (SET_SRC (set)) == COMPARE
8340 && GET_MODE_CLASS (inner_mode) == MODE_INT
8341 && (GET_MODE_BITSIZE (inner_mode)
8342 <= HOST_BITS_PER_WIDE_INT)
8343 && (STORE_FLAG_VALUE
8344 & ((HOST_WIDE_INT) 1
8345 << (GET_MODE_BITSIZE (inner_mode) - 1))))
8346 #ifdef FLOAT_STORE_FLAG_VALUE
8348 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
8349 && (REAL_VALUE_NEGATIVE
8350 (FLOAT_STORE_FLAG_VALUE (inner_mode))))
8353 && GET_RTX_CLASS (GET_CODE (SET_SRC (set))) == '<'))
8354 && (((GET_MODE_CLASS (mode) == MODE_CC)
8355 == (GET_MODE_CLASS (inner_mode) == MODE_CC))
8356 || mode == VOIDmode || inner_mode == VOIDmode))
8358 else if (((code == EQ
8360 && (GET_MODE_BITSIZE (inner_mode)
8361 <= HOST_BITS_PER_WIDE_INT)
8362 && GET_MODE_CLASS (inner_mode) == MODE_INT
8363 && (STORE_FLAG_VALUE
8364 & ((HOST_WIDE_INT) 1
8365 << (GET_MODE_BITSIZE (inner_mode) - 1))))
8366 #ifdef FLOAT_STORE_FLAG_VALUE
8368 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
8369 && (REAL_VALUE_NEGATIVE
8370 (FLOAT_STORE_FLAG_VALUE (inner_mode))))
8373 && GET_RTX_CLASS (GET_CODE (SET_SRC (set))) == '<'
8374 && (((GET_MODE_CLASS (mode) == MODE_CC)
8375 == (GET_MODE_CLASS (inner_mode) == MODE_CC))
8376 || mode == VOIDmode || inner_mode == VOIDmode))
8379 /* We might have reversed a LT to get a GE here. But this wasn't
8380 actually the comparison of data, so we don't flag that we
8381 have had to reverse the condition. */
8382 did_reverse_condition ^= 1;
8390 else if (reg_set_p (op0, prev))
8391 /* If this sets OP0, but not directly, we have to give up. */
8396 if (GET_RTX_CLASS (GET_CODE (x)) == '<')
8397 code = GET_CODE (x);
8400 code = reverse_condition (code);
8401 if (code == UNKNOWN)
8403 did_reverse_condition ^= 1;
8407 op0 = XEXP (x, 0), op1 = XEXP (x, 1);
8413 /* If constant is first, put it last. */
8414 if (CONSTANT_P (op0))
8415 code = swap_condition (code), tem = op0, op0 = op1, op1 = tem;
8417 /* If OP0 is the result of a comparison, we weren't able to find what
8418 was really being compared, so fail. */
8419 if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_CC)
8422 /* Canonicalize any ordered comparison with integers involving equality
8423 if we can do computations in the relevant mode and we do not
8426 if (GET_CODE (op1) == CONST_INT
8427 && GET_MODE (op0) != VOIDmode
8428 && GET_MODE_BITSIZE (GET_MODE (op0)) <= HOST_BITS_PER_WIDE_INT)
8430 HOST_WIDE_INT const_val = INTVAL (op1);
8431 unsigned HOST_WIDE_INT uconst_val = const_val;
8432 unsigned HOST_WIDE_INT max_val
8433 = (unsigned HOST_WIDE_INT) GET_MODE_MASK (GET_MODE (op0));
8438 if ((unsigned HOST_WIDE_INT) const_val != max_val >> 1)
8439 code = LT, op1 = GEN_INT (const_val + 1);
8442 /* When cross-compiling, const_val might be sign-extended from
8443 BITS_PER_WORD to HOST_BITS_PER_WIDE_INT */
8445 if ((HOST_WIDE_INT) (const_val & max_val)
8446 != (((HOST_WIDE_INT) 1
8447 << (GET_MODE_BITSIZE (GET_MODE (op0)) - 1))))
8448 code = GT, op1 = GEN_INT (const_val - 1);
8452 if (uconst_val < max_val)
8453 code = LTU, op1 = GEN_INT (uconst_val + 1);
8457 if (uconst_val != 0)
8458 code = GTU, op1 = GEN_INT (uconst_val - 1);
8466 /* If this was floating-point and we reversed anything other than an
8467 EQ or NE or (UN)ORDERED, return zero. */
8468 if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT
8469 && did_reverse_condition
8470 && code != NE && code != EQ && code != UNORDERED && code != ORDERED
8472 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_FLOAT)
8476 /* Never return CC0; return zero instead. */
8481 return gen_rtx_fmt_ee (code, VOIDmode, op0, op1);
8484 /* Given a jump insn JUMP, return the condition that will cause it to branch
8485 to its JUMP_LABEL. If the condition cannot be understood, or is an
8486 inequality floating-point comparison which needs to be reversed, 0 will
8489 If EARLIEST is non-zero, it is a pointer to a place where the earliest
8490 insn used in locating the condition was found. If a replacement test
8491 of the condition is desired, it should be placed in front of that
8492 insn and we will be sure that the inputs are still valid. */
8495 get_condition (jump, earliest)
8503 /* If this is not a standard conditional jump, we can't parse it. */
8504 if (GET_CODE (jump) != JUMP_INSN
8505 || ! any_condjump_p (jump))
8507 set = pc_set (jump);
8509 cond = XEXP (SET_SRC (set), 0);
8511 /* If this branches to JUMP_LABEL when the condition is false, reverse
8514 = GET_CODE (XEXP (SET_SRC (set), 2)) == LABEL_REF
8515 && XEXP (XEXP (SET_SRC (set), 2), 0) == JUMP_LABEL (jump);
8517 return canonicalize_condition (jump, cond, reverse, earliest, NULL_RTX);
8520 /* Similar to above routine, except that we also put an invariant last
8521 unless both operands are invariants. */
8524 get_condition_for_loop (loop, x)
8525 const struct loop *loop;
8528 rtx comparison = get_condition (x, NULL_PTR);
8531 || ! loop_invariant_p (loop, XEXP (comparison, 0))
8532 || loop_invariant_p (loop, XEXP (comparison, 1)))
8535 return gen_rtx_fmt_ee (swap_condition (GET_CODE (comparison)), VOIDmode,
8536 XEXP (comparison, 1), XEXP (comparison, 0));
8539 /* Scan the function and determine whether it has indirect (computed) jumps.
8541 This is taken mostly from flow.c; similar code exists elsewhere
8542 in the compiler. It may be useful to put this into rtlanal.c. */
8544 indirect_jump_in_function_p (start)
8549 for (insn = start; insn; insn = NEXT_INSN (insn))
8550 if (computed_jump_p (insn))
8556 /* Add MEM to the LOOP_MEMS array, if appropriate. See the
8557 documentation for LOOP_MEMS for the definition of `appropriate'.
8558 This function is called from prescan_loop via for_each_rtx. */
8561 insert_loop_mem (mem, data)
8563 void *data ATTRIBUTE_UNUSED;
8565 struct loop_info *loop_info = data;
8572 switch (GET_CODE (m))
8578 /* We're not interested in MEMs that are only clobbered. */
8582 /* We're not interested in the MEM associated with a
8583 CONST_DOUBLE, so there's no need to traverse into this. */
8587 /* We're not interested in any MEMs that only appear in notes. */
8591 /* This is not a MEM. */
8595 /* See if we've already seen this MEM. */
8596 for (i = 0; i < loop_info->mems_idx; ++i)
8597 if (rtx_equal_p (m, loop_info->mems[i].mem))
8599 if (GET_MODE (m) != GET_MODE (loop_info->mems[i].mem))
8600 /* The modes of the two memory accesses are different. If
8601 this happens, something tricky is going on, and we just
8602 don't optimize accesses to this MEM. */
8603 loop_info->mems[i].optimize = 0;
8608 /* Resize the array, if necessary. */
8609 if (loop_info->mems_idx == loop_info->mems_allocated)
8611 if (loop_info->mems_allocated != 0)
8612 loop_info->mems_allocated *= 2;
8614 loop_info->mems_allocated = 32;
8616 loop_info->mems = (loop_mem_info *)
8617 xrealloc (loop_info->mems,
8618 loop_info->mems_allocated * sizeof (loop_mem_info));
8621 /* Actually insert the MEM. */
8622 loop_info->mems[loop_info->mems_idx].mem = m;
8623 /* We can't hoist this MEM out of the loop if it's a BLKmode MEM
8624 because we can't put it in a register. We still store it in the
8625 table, though, so that if we see the same address later, but in a
8626 non-BLK mode, we'll not think we can optimize it at that point. */
8627 loop_info->mems[loop_info->mems_idx].optimize = (GET_MODE (m) != BLKmode);
8628 loop_info->mems[loop_info->mems_idx].reg = NULL_RTX;
8629 ++loop_info->mems_idx;
8634 /* Like load_mems, but also ensures that REGS->SET_IN_LOOP,
8635 REGS->MAY_NOT_OPTIMIZE, REGS->SINGLE_USAGE, and INSN_COUNT have the correct
8636 values after load_mems. */
8639 load_mems_and_recount_loop_regs_set (loop, insn_count)
8640 const struct loop *loop;
8643 struct loop_regs *regs = LOOP_REGS (loop);
8644 int nregs = max_reg_num ();
8648 /* Recalculate regs->set_in_loop and friends since load_mems may have
8649 created new registers. */
8650 if (max_reg_num () > nregs)
8656 nregs = max_reg_num ();
8658 if ((unsigned) nregs > regs->set_in_loop->num_elements)
8660 /* Grow all the arrays. */
8661 VARRAY_GROW (regs->set_in_loop, nregs);
8662 VARRAY_GROW (regs->n_times_set, nregs);
8663 VARRAY_GROW (regs->may_not_optimize, nregs);
8664 VARRAY_GROW (regs->single_usage, nregs);
8666 /* Clear the arrays */
8667 memset ((char *) ®s->set_in_loop->data, 0, nregs * sizeof (int));
8668 memset ((char *) ®s->may_not_optimize->data, 0, nregs * sizeof (char));
8669 memset ((char *) ®s->single_usage->data, 0, nregs * sizeof (rtx));
8671 count_loop_regs_set (loop, regs->may_not_optimize, regs->single_usage,
8674 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
8676 VARRAY_CHAR (regs->may_not_optimize, i) = 1;
8677 VARRAY_INT (regs->set_in_loop, i) = 1;
8680 #ifdef AVOID_CCMODE_COPIES
8681 /* Don't try to move insns which set CC registers if we should not
8682 create CCmode register copies. */
8683 for (i = max_reg_num () - 1; i >= FIRST_PSEUDO_REGISTER; i--)
8684 if (GET_MODE_CLASS (GET_MODE (regno_reg_rtx[i])) == MODE_CC)
8685 VARRAY_CHAR (regs->may_not_optimize, i) = 1;
8688 /* Set regs->n_times_set for the new registers. */
8689 bcopy ((char *) (®s->set_in_loop->data.i[0] + old_nregs),
8690 (char *) (®s->n_times_set->data.i[0] + old_nregs),
8691 (nregs - old_nregs) * sizeof (int));
8695 /* Move MEMs into registers for the duration of the loop. */
8699 const struct loop *loop;
8701 struct loop_info *loop_info = LOOP_INFO (loop);
8702 struct loop_regs *regs = LOOP_REGS (loop);
8703 int maybe_never = 0;
8706 rtx label = NULL_RTX;
8707 rtx end_label = NULL_RTX;
8708 /* Nonzero if the next instruction may never be executed. */
8709 int next_maybe_never = 0;
8710 int last_max_reg = max_reg_num ();
8712 if (loop_info->mems_idx == 0)
8715 /* Find start of the extended basic block that enters the loop. */
8716 for (p = loop->start;
8717 PREV_INSN (p) && GET_CODE (p) != CODE_LABEL;
8723 /* Build table of mems that get set to constant values before the
8725 for (; p != loop->start; p = NEXT_INSN (p))
8726 cselib_process_insn (p);
8728 /* Check to see if it's possible that some instructions in the
8729 loop are never executed. */
8730 for (p = next_insn_in_loop (loop, loop->scan_start);
8731 p != NULL_RTX && ! maybe_never;
8732 p = next_insn_in_loop (loop, p))
8734 if (GET_CODE (p) == CODE_LABEL)
8736 else if (GET_CODE (p) == JUMP_INSN
8737 /* If we enter the loop in the middle, and scan
8738 around to the beginning, don't set maybe_never
8739 for that. This must be an unconditional jump,
8740 otherwise the code at the top of the loop might
8741 never be executed. Unconditional jumps are
8742 followed a by barrier then loop end. */
8743 && ! (GET_CODE (p) == JUMP_INSN
8744 && JUMP_LABEL (p) == loop->top
8745 && NEXT_INSN (NEXT_INSN (p)) == loop->end
8746 && any_uncondjump_p (p)))
8748 if (!any_condjump_p (p))
8749 /* Something complicated. */
8752 /* If there are any more instructions in the loop, they
8753 might not be reached. */
8754 next_maybe_never = 1;
8756 else if (next_maybe_never)
8760 /* Actually move the MEMs. */
8761 for (i = 0; i < loop_info->mems_idx; ++i)
8763 regset_head load_copies;
8764 regset_head store_copies;
8767 rtx mem = loop_info->mems[i].mem;
8770 if (MEM_VOLATILE_P (mem)
8771 || loop_invariant_p (loop, XEXP (mem, 0)) != 1)
8772 /* There's no telling whether or not MEM is modified. */
8773 loop_info->mems[i].optimize = 0;
8775 /* Go through the MEMs written to in the loop to see if this
8776 one is aliased by one of them. */
8777 mem_list_entry = loop_info->store_mems;
8778 while (mem_list_entry)
8780 if (rtx_equal_p (mem, XEXP (mem_list_entry, 0)))
8782 else if (true_dependence (XEXP (mem_list_entry, 0), VOIDmode,
8785 /* MEM is indeed aliased by this store. */
8786 loop_info->mems[i].optimize = 0;
8789 mem_list_entry = XEXP (mem_list_entry, 1);
8792 if (flag_float_store && written
8793 && GET_MODE_CLASS (GET_MODE (mem)) == MODE_FLOAT)
8794 loop_info->mems[i].optimize = 0;
8796 /* If this MEM is written to, we must be sure that there
8797 are no reads from another MEM that aliases this one. */
8798 if (loop_info->mems[i].optimize && written)
8802 for (j = 0; j < loop_info->mems_idx; ++j)
8806 else if (true_dependence (mem,
8808 loop_info->mems[j].mem,
8811 /* It's not safe to hoist loop_info->mems[i] out of
8812 the loop because writes to it might not be
8813 seen by reads from loop_info->mems[j]. */
8814 loop_info->mems[i].optimize = 0;
8820 if (maybe_never && may_trap_p (mem))
8821 /* We can't access the MEM outside the loop; it might
8822 cause a trap that wouldn't have happened otherwise. */
8823 loop_info->mems[i].optimize = 0;
8825 if (!loop_info->mems[i].optimize)
8826 /* We thought we were going to lift this MEM out of the
8827 loop, but later discovered that we could not. */
8830 INIT_REG_SET (&load_copies);
8831 INIT_REG_SET (&store_copies);
8833 /* Allocate a pseudo for this MEM. We set REG_USERVAR_P in
8834 order to keep scan_loop from moving stores to this MEM
8835 out of the loop just because this REG is neither a
8836 user-variable nor used in the loop test. */
8837 reg = gen_reg_rtx (GET_MODE (mem));
8838 REG_USERVAR_P (reg) = 1;
8839 loop_info->mems[i].reg = reg;
8841 /* Now, replace all references to the MEM with the
8842 corresponding pesudos. */
8844 for (p = next_insn_in_loop (loop, loop->scan_start);
8846 p = next_insn_in_loop (loop, p))
8852 set = single_set (p);
8854 /* See if this copies the mem into a register that isn't
8855 modified afterwards. We'll try to do copy propagation
8856 a little further on. */
8858 /* @@@ This test is _way_ too conservative. */
8860 && GET_CODE (SET_DEST (set)) == REG
8861 && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER
8862 && REGNO (SET_DEST (set)) < last_max_reg
8863 && VARRAY_INT (regs->n_times_set,
8864 REGNO (SET_DEST (set))) == 1
8865 && rtx_equal_p (SET_SRC (set), mem))
8866 SET_REGNO_REG_SET (&load_copies, REGNO (SET_DEST (set)));
8868 /* See if this copies the mem from a register that isn't
8869 modified afterwards. We'll try to remove the
8870 redundant copy later on by doing a little register
8871 renaming and copy propagation. This will help
8872 to untangle things for the BIV detection code. */
8875 && GET_CODE (SET_SRC (set)) == REG
8876 && REGNO (SET_SRC (set)) >= FIRST_PSEUDO_REGISTER
8877 && REGNO (SET_SRC (set)) < last_max_reg
8878 && VARRAY_INT (regs->n_times_set, REGNO (SET_SRC (set))) == 1
8879 && rtx_equal_p (SET_DEST (set), mem))
8880 SET_REGNO_REG_SET (&store_copies, REGNO (SET_SRC (set)));
8882 /* Replace the memory reference with the shadow register. */
8883 replace_loop_mems (p, loop_info->mems[i].mem,
8884 loop_info->mems[i].reg);
8887 if (GET_CODE (p) == CODE_LABEL
8888 || GET_CODE (p) == JUMP_INSN)
8892 if (! apply_change_group ())
8893 /* We couldn't replace all occurrences of the MEM. */
8894 loop_info->mems[i].optimize = 0;
8897 /* Load the memory immediately before LOOP->START, which is
8898 the NOTE_LOOP_BEG. */
8899 cselib_val *e = cselib_lookup (mem, VOIDmode, 0);
8903 struct elt_loc_list *const_equiv = 0;
8907 struct elt_loc_list *equiv;
8908 struct elt_loc_list *best_equiv = 0;
8909 for (equiv = e->locs; equiv; equiv = equiv->next)
8911 if (CONSTANT_P (equiv->loc))
8912 const_equiv = equiv;
8913 else if (GET_CODE (equiv->loc) == REG
8914 /* Extending hard register lifetimes cuases crash
8915 on SRC targets. Doing so on non-SRC is
8916 probably also not good idea, since we most
8917 probably have pseudoregister equivalence as
8919 && REGNO (equiv->loc) >= FIRST_PSEUDO_REGISTER)
8922 /* Use the constant equivalence if that is cheap enough. */
8924 best_equiv = const_equiv;
8925 else if (const_equiv
8926 && (rtx_cost (const_equiv->loc, SET)
8927 <= rtx_cost (best_equiv->loc, SET)))
8929 best_equiv = const_equiv;
8933 /* If best_equiv is nonzero, we know that MEM is set to a
8934 constant or register before the loop. We will use this
8935 knowledge to initialize the shadow register with that
8936 constant or reg rather than by loading from MEM. */
8938 best = copy_rtx (best_equiv->loc);
8940 set = gen_move_insn (reg, best);
8941 set = emit_insn_before (set, loop->start);
8943 REG_NOTES (set) = gen_rtx_EXPR_LIST (REG_EQUAL,
8944 copy_rtx (const_equiv->loc),
8949 if (label == NULL_RTX)
8951 /* We must compute the former
8952 right-after-the-end label before we insert
8954 end_label = next_label (loop->end);
8955 label = gen_label_rtx ();
8956 emit_label_after (label, loop->end);
8959 /* Store the memory immediately after END, which is
8960 the NOTE_LOOP_END. */
8961 set = gen_move_insn (copy_rtx (mem), reg);
8962 emit_insn_after (set, label);
8965 if (loop_dump_stream)
8967 fprintf (loop_dump_stream, "Hoisted regno %d %s from ",
8968 REGNO (reg), (written ? "r/w" : "r/o"));
8969 print_rtl (loop_dump_stream, mem);
8970 fputc ('\n', loop_dump_stream);
8973 /* Attempt a bit of copy propagation. This helps untangle the
8974 data flow, and enables {basic,general}_induction_var to find
8976 EXECUTE_IF_SET_IN_REG_SET
8977 (&load_copies, FIRST_PSEUDO_REGISTER, j,
8979 try_copy_prop (loop, reg, j);
8981 CLEAR_REG_SET (&load_copies);
8983 EXECUTE_IF_SET_IN_REG_SET
8984 (&store_copies, FIRST_PSEUDO_REGISTER, j,
8986 try_swap_copy_prop (loop, reg, j);
8988 CLEAR_REG_SET (&store_copies);
8992 if (label != NULL_RTX)
8994 /* Now, we need to replace all references to the previous exit
8995 label with the new one. */
9000 for (p = loop->start; p != loop->end; p = NEXT_INSN (p))
9002 for_each_rtx (&p, replace_label, &rr);
9004 /* If this is a JUMP_INSN, then we also need to fix the JUMP_LABEL
9005 field. This is not handled by for_each_rtx because it doesn't
9006 handle unprinted ('0') fields. We need to update JUMP_LABEL
9007 because the immediately following unroll pass will use it.
9008 replace_label would not work anyways, because that only handles
9010 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p) == end_label)
9011 JUMP_LABEL (p) = label;
9018 /* For communication between note_reg_stored and its caller. */
9019 struct note_reg_stored_arg
9025 /* Called via note_stores, record in SET_SEEN whether X, which is written,
9028 note_reg_stored (x, setter, arg)
9029 rtx x, setter ATTRIBUTE_UNUSED;
9032 struct note_reg_stored_arg *t = (struct note_reg_stored_arg *) arg;
9037 /* Try to replace every occurrence of pseudo REGNO with REPLACEMENT.
9038 There must be exactly one insn that sets this pseudo; it will be
9039 deleted if all replacements succeed and we can prove that the register
9040 is not used after the loop. */
9043 try_copy_prop (loop, replacement, regno)
9044 const struct loop *loop;
9048 /* This is the reg that we are copying from. */
9049 rtx reg_rtx = regno_reg_rtx[regno];
9052 /* These help keep track of whether we replaced all uses of the reg. */
9053 int replaced_last = 0;
9054 int store_is_first = 0;
9056 for (insn = next_insn_in_loop (loop, loop->scan_start);
9058 insn = next_insn_in_loop (loop, insn))
9062 /* Only substitute within one extended basic block from the initializing
9064 if (GET_CODE (insn) == CODE_LABEL && init_insn)
9067 if (! INSN_P (insn))
9070 /* Is this the initializing insn? */
9071 set = single_set (insn);
9073 && GET_CODE (SET_DEST (set)) == REG
9074 && REGNO (SET_DEST (set)) == regno)
9080 if (REGNO_FIRST_UID (regno) == INSN_UID (insn))
9084 /* Only substitute after seeing the initializing insn. */
9085 if (init_insn && insn != init_insn)
9087 struct note_reg_stored_arg arg;
9089 replace_loop_regs (insn, reg_rtx, replacement);
9090 if (REGNO_LAST_UID (regno) == INSN_UID (insn))
9093 /* Stop replacing when REPLACEMENT is modified. */
9094 arg.reg = replacement;
9096 note_stores (PATTERN (insn), note_reg_stored, &arg);
9103 if (apply_change_group ())
9105 if (loop_dump_stream)
9106 fprintf (loop_dump_stream, " Replaced reg %d", regno);
9107 if (store_is_first && replaced_last)
9109 PUT_CODE (init_insn, NOTE);
9110 NOTE_LINE_NUMBER (init_insn) = NOTE_INSN_DELETED;
9111 if (loop_dump_stream)
9112 fprintf (loop_dump_stream, ", deleting init_insn (%d)",
9113 INSN_UID (init_insn));
9115 if (loop_dump_stream)
9116 fprintf (loop_dump_stream, ".\n");
9120 /* Try to replace occurrences of pseudo REGNO with REPLACEMENT within
9121 loop LOOP if the order of the sets of these registers can be
9122 swapped. There must be exactly one insn within the loop that sets
9123 this pseudo followed immediately by a move insn that sets
9124 REPLACEMENT with REGNO. */
9126 try_swap_copy_prop (loop, replacement, regno)
9127 const struct loop *loop;
9133 unsigned int new_regno;
9135 new_regno = REGNO (replacement);
9137 for (insn = next_insn_in_loop (loop, loop->scan_start);
9139 insn = next_insn_in_loop (loop, insn))
9141 /* Search for the insn that copies REGNO to NEW_REGNO? */
9142 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
9143 && (set = single_set (insn))
9144 && GET_CODE (SET_DEST (set)) == REG
9145 && REGNO (SET_DEST (set)) == new_regno
9146 && GET_CODE (SET_SRC (set)) == REG
9147 && REGNO (SET_SRC (set)) == regno)
9151 if (insn != NULL_RTX)
9156 /* Some DEF-USE info would come in handy here to make this
9157 function more general. For now, just check the previous insn
9158 which is the most likely candidate for setting REGNO. */
9160 prev_insn = PREV_INSN (insn);
9162 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
9163 && (prev_set = single_set (prev_insn))
9164 && GET_CODE (SET_DEST (prev_set)) == REG
9165 && REGNO (SET_DEST (prev_set)) == regno)
9168 (set (reg regno) (expr))
9169 (set (reg new_regno) (reg regno))
9171 so try converting this to:
9172 (set (reg new_regno) (expr))
9173 (set (reg regno) (reg new_regno))
9175 The former construct is often generated when a global
9176 variable used for an induction variable is shadowed by a
9177 register (NEW_REGNO). The latter construct improves the
9178 chances of GIV replacement and BIV elimination. */
9180 validate_change (prev_insn, &SET_DEST (prev_set),
9182 validate_change (insn, &SET_DEST (set),
9184 validate_change (insn, &SET_SRC (set),
9187 if (apply_change_group ())
9189 if (loop_dump_stream)
9190 fprintf (loop_dump_stream,
9191 " Swapped set of reg %d at %d with reg %d at %d.\n",
9192 regno, INSN_UID (insn),
9193 new_regno, INSN_UID (prev_insn));
9195 /* Update first use of REGNO. */
9196 if (REGNO_FIRST_UID (regno) == INSN_UID (prev_insn))
9197 REGNO_FIRST_UID (regno) = INSN_UID (insn);
9199 /* Now perform copy propagation to hopefully
9200 remove all uses of REGNO within the loop. */
9201 try_copy_prop (loop, replacement, regno);
9207 /* Replace MEM with its associated pseudo register. This function is
9208 called from load_mems via for_each_rtx. DATA is actually a pointer
9209 to a structure describing the instruction currently being scanned
9210 and the MEM we are currently replacing. */
9213 replace_loop_mem (mem, data)
9217 loop_replace_args *args = (loop_replace_args *) data;
9223 switch (GET_CODE (m))
9229 /* We're not interested in the MEM associated with a
9230 CONST_DOUBLE, so there's no need to traverse into one. */
9234 /* This is not a MEM. */
9238 if (!rtx_equal_p (args->match, m))
9239 /* This is not the MEM we are currently replacing. */
9242 /* Actually replace the MEM. */
9243 validate_change (args->insn, mem, args->replacement, 1);
9249 replace_loop_mems (insn, mem, reg)
9254 loop_replace_args args;
9258 args.replacement = reg;
9260 for_each_rtx (&insn, replace_loop_mem, &args);
9263 /* Replace one register with another. Called through for_each_rtx; PX points
9264 to the rtx being scanned. DATA is actually a pointer to
9265 a structure of arguments. */
9268 replace_loop_reg (px, data)
9273 loop_replace_args *args = (loop_replace_args *) data;
9278 if (x == args->match)
9279 validate_change (args->insn, px, args->replacement, 1);
9285 replace_loop_regs (insn, reg, replacement)
9290 loop_replace_args args;
9294 args.replacement = replacement;
9296 for_each_rtx (&insn, replace_loop_reg, &args);
9299 /* Replace occurrences of the old exit label for the loop with the new
9300 one. DATA is an rtx_pair containing the old and new labels,
9304 replace_label (x, data)
9309 rtx old_label = ((rtx_pair *) data)->r1;
9310 rtx new_label = ((rtx_pair *) data)->r2;
9315 if (GET_CODE (l) != LABEL_REF)
9318 if (XEXP (l, 0) != old_label)
9321 XEXP (l, 0) = new_label;
9322 ++LABEL_NUSES (new_label);
9323 --LABEL_NUSES (old_label);
9328 #define LOOP_BLOCK_NUM_1(INSN) \
9329 ((INSN) ? (BLOCK_FOR_INSN (INSN) ? BLOCK_NUM (INSN) : - 1) : -1)
9331 /* The notes do not have an assigned block, so look at the next insn. */
9332 #define LOOP_BLOCK_NUM(INSN) \
9333 ((INSN) ? (GET_CODE (INSN) == NOTE \
9334 ? LOOP_BLOCK_NUM_1 (next_nonnote_insn (INSN)) \
9335 : LOOP_BLOCK_NUM_1 (INSN)) \
9338 #define LOOP_INSN_UID(INSN) ((INSN) ? INSN_UID (INSN) : -1)
9341 loop_dump_aux (loop, file, verbose)
9342 const struct loop *loop;
9344 int verbose ATTRIBUTE_UNUSED;
9348 if (! loop || ! file)
9351 /* Print diagnostics to compare our concept of a loop with
9352 what the loop notes say. */
9353 if (! PREV_INSN (loop->first->head)
9354 || GET_CODE (PREV_INSN (loop->first->head)) != NOTE
9355 || NOTE_LINE_NUMBER (PREV_INSN (loop->first->head))
9356 != NOTE_INSN_LOOP_BEG)
9357 fprintf (file, ";; No NOTE_INSN_LOOP_BEG at %d\n",
9358 INSN_UID (PREV_INSN (loop->first->head)));
9359 if (! NEXT_INSN (loop->last->end)
9360 || GET_CODE (NEXT_INSN (loop->last->end)) != NOTE
9361 || NOTE_LINE_NUMBER (NEXT_INSN (loop->last->end))
9362 != NOTE_INSN_LOOP_END)
9363 fprintf (file, ";; No NOTE_INSN_LOOP_END at %d\n",
9364 INSN_UID (NEXT_INSN (loop->last->end)));
9369 ";; start %d (%d), cont dom %d (%d), cont %d (%d), vtop %d (%d), end %d (%d)\n",
9370 LOOP_BLOCK_NUM (loop->start),
9371 LOOP_INSN_UID (loop->start),
9372 LOOP_BLOCK_NUM (loop->cont),
9373 LOOP_INSN_UID (loop->cont),
9374 LOOP_BLOCK_NUM (loop->cont),
9375 LOOP_INSN_UID (loop->cont),
9376 LOOP_BLOCK_NUM (loop->vtop),
9377 LOOP_INSN_UID (loop->vtop),
9378 LOOP_BLOCK_NUM (loop->end),
9379 LOOP_INSN_UID (loop->end));
9380 fprintf (file, ";; top %d (%d), scan start %d (%d)\n",
9381 LOOP_BLOCK_NUM (loop->top),
9382 LOOP_INSN_UID (loop->top),
9383 LOOP_BLOCK_NUM (loop->scan_start),
9384 LOOP_INSN_UID (loop->scan_start));
9385 fprintf (file, ";; exit_count %d", loop->exit_count);
9386 if (loop->exit_count)
9388 fputs (", labels:", file);
9389 for (label = loop->exit_labels; label; label = LABEL_NEXTREF (label))
9391 fprintf (file, " %d ",
9392 LOOP_INSN_UID (XEXP (label, 0)));
9397 /* This can happen when a marked loop appears as two nested loops,
9398 say from while (a || b) {}. The inner loop won't match
9399 the loop markers but the outer one will. */
9400 if (LOOP_BLOCK_NUM (loop->cont) != loop->latch->index)
9401 fprintf (file, ";; NOTE_INSN_LOOP_CONT not in loop latch\n");
9405 /* Call this function from the debugger to dump LOOP. */
9409 const struct loop *loop;
9411 flow_loop_dump (loop, stderr, loop_dump_aux, 1);
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