1 /* Perform various loop optimizations, including strength reduction.
2 Copyright (C) 1987, 88, 89, 91-99, 2000 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* This is the loop optimization pass of the compiler.
23 It finds invariant computations within loops and moves them
24 to the beginning of the loop. Then it identifies basic and
25 general induction variables. Strength reduction is applied to the general
26 induction variables, and induction variable elimination is applied to
27 the basic induction variables.
29 It also finds cases where
30 a register is set within the loop by zero-extending a narrower value
31 and changes these to zero the entire register once before the loop
32 and merely copy the low part within the loop.
34 Most of the complexity is in heuristics to decide when it is worth
35 while to do these things. */
44 #include "basic-block.h"
45 #include "insn-config.h"
46 #include "insn-flags.h"
48 #include "hard-reg-set.h"
56 /* Vector mapping INSN_UIDs to luids.
57 The luids are like uids but increase monotonically always.
58 We use them to see whether a jump comes from outside a given loop. */
62 /* Indexed by INSN_UID, contains the ordinal giving the (innermost) loop
63 number the insn is contained in. */
65 struct loop **uid_loop;
67 /* 1 + largest uid of any insn. */
71 /* 1 + luid of last insn. */
75 /* Number of loops detected in current function. Used as index to the
78 static int max_loop_num;
80 /* Indexed by register number, contains the number of times the reg
81 is set during the loop being scanned.
82 During code motion, a negative value indicates a reg that has been
83 made a candidate; in particular -2 means that it is an candidate that
84 we know is equal to a constant and -1 means that it is an candidate
85 not known equal to a constant.
86 After code motion, regs moved have 0 (which is accurate now)
87 while the failed candidates have the original number of times set.
89 Therefore, at all times, == 0 indicates an invariant register;
90 < 0 a conditionally invariant one. */
92 static varray_type set_in_loop;
94 /* Original value of set_in_loop; same except that this value
95 is not set negative for a reg whose sets have been made candidates
96 and not set to 0 for a reg that is moved. */
98 static varray_type n_times_set;
100 /* Index by register number, 1 indicates that the register
101 cannot be moved or strength reduced. */
103 static varray_type may_not_optimize;
105 /* Contains the insn in which a register was used if it was used
106 exactly once; contains const0_rtx if it was used more than once. */
108 static varray_type reg_single_usage;
110 /* Nonzero means reg N has already been moved out of one loop.
111 This reduces the desire to move it out of another. */
113 static char *moved_once;
115 /* List of MEMs that are stored in this loop. */
117 static rtx loop_store_mems;
119 /* The insn where the first of these was found. */
120 static rtx first_loop_store_insn;
122 typedef struct loop_mem_info {
123 rtx mem; /* The MEM itself. */
124 rtx reg; /* Corresponding pseudo, if any. */
125 int optimize; /* Nonzero if we can optimize access to this MEM. */
128 /* Array of MEMs that are used (read or written) in this loop, but
129 cannot be aliased by anything in this loop, except perhaps
130 themselves. In other words, if loop_mems[i] is altered during the
131 loop, it is altered by an expression that is rtx_equal_p to it. */
133 static loop_mem_info *loop_mems;
135 /* The index of the next available slot in LOOP_MEMS. */
137 static int loop_mems_idx;
139 /* The number of elements allocated in LOOP_MEMs. */
141 static int loop_mems_allocated;
143 /* Nonzero if we don't know what MEMs were changed in the current
144 loop. This happens if the loop contains a call (in which case
145 `loop_info->has_call' will also be set) or if we store into more
146 than NUM_STORES MEMs. */
148 static int unknown_address_altered;
150 /* The above doesn't count any readonly memory locations that are stored.
153 static int unknown_constant_address_altered;
155 /* Count of movable (i.e. invariant) instructions discovered in the loop. */
156 static int num_movables;
158 /* Count of memory write instructions discovered in the loop. */
159 static int num_mem_sets;
161 /* Bound on pseudo register number before loop optimization.
162 A pseudo has valid regscan info if its number is < max_reg_before_loop. */
163 int max_reg_before_loop;
165 /* The value to pass to the next call of reg_scan_update. */
166 static int loop_max_reg;
168 /* This obstack is used in product_cheap_p to allocate its rtl. It
169 may call gen_reg_rtx which, in turn, may reallocate regno_reg_rtx.
170 If we used the same obstack that it did, we would be deallocating
173 static struct obstack temp_obstack;
175 /* This is where the pointer to the obstack being used for RTL is stored. */
177 extern struct obstack *rtl_obstack;
179 #define obstack_chunk_alloc xmalloc
180 #define obstack_chunk_free free
182 /* During the analysis of a loop, a chain of `struct movable's
183 is made to record all the movable insns found.
184 Then the entire chain can be scanned to decide which to move. */
188 rtx insn; /* A movable insn */
189 rtx set_src; /* The expression this reg is set from. */
190 rtx set_dest; /* The destination of this SET. */
191 rtx dependencies; /* When INSN is libcall, this is an EXPR_LIST
192 of any registers used within the LIBCALL. */
193 int consec; /* Number of consecutive following insns
194 that must be moved with this one. */
195 int regno; /* The register it sets */
196 short lifetime; /* lifetime of that register;
197 may be adjusted when matching movables
198 that load the same value are found. */
199 short savings; /* Number of insns we can move for this reg,
200 including other movables that force this
201 or match this one. */
202 unsigned int cond : 1; /* 1 if only conditionally movable */
203 unsigned int force : 1; /* 1 means MUST move this insn */
204 unsigned int global : 1; /* 1 means reg is live outside this loop */
205 /* If PARTIAL is 1, GLOBAL means something different:
206 that the reg is live outside the range from where it is set
207 to the following label. */
208 unsigned int done : 1; /* 1 inhibits further processing of this */
210 unsigned int partial : 1; /* 1 means this reg is used for zero-extending.
211 In particular, moving it does not make it
213 unsigned int move_insn : 1; /* 1 means that we call emit_move_insn to
214 load SRC, rather than copying INSN. */
215 unsigned int move_insn_first:1;/* Same as above, if this is necessary for the
216 first insn of a consecutive sets group. */
217 unsigned int is_equiv : 1; /* 1 means a REG_EQUIV is present on INSN. */
218 enum machine_mode savemode; /* Nonzero means it is a mode for a low part
219 that we should avoid changing when clearing
220 the rest of the reg. */
221 struct movable *match; /* First entry for same value */
222 struct movable *forces; /* An insn that must be moved if this is */
223 struct movable *next;
226 static struct movable *the_movables;
228 FILE *loop_dump_stream;
230 /* Forward declarations. */
232 static void verify_dominator PARAMS ((struct loop *));
233 static void find_and_verify_loops PARAMS ((rtx, struct loops *));
234 static void mark_loop_jump PARAMS ((rtx, struct loop *));
235 static void prescan_loop PARAMS ((struct loop *));
236 static int reg_in_basic_block_p PARAMS ((rtx, rtx));
237 static int consec_sets_invariant_p PARAMS ((const struct loop *,
239 static int labels_in_range_p PARAMS ((rtx, int));
240 static void count_one_set PARAMS ((rtx, rtx, varray_type, rtx *));
242 static void count_loop_regs_set PARAMS ((rtx, rtx, varray_type, varray_type,
244 static void note_addr_stored PARAMS ((rtx, rtx, void *));
245 static void note_set_pseudo_multiple_uses PARAMS ((rtx, rtx, void *));
246 static int loop_reg_used_before_p PARAMS ((const struct loop *, rtx, rtx));
247 static void scan_loop PARAMS ((struct loop*, int, int));
249 static void replace_call_address PARAMS ((rtx, rtx, rtx));
251 static rtx skip_consec_insns PARAMS ((rtx, int));
252 static int libcall_benefit PARAMS ((rtx));
253 static void ignore_some_movables PARAMS ((struct movable *));
254 static void force_movables PARAMS ((struct movable *));
255 static void combine_movables PARAMS ((struct movable *, int));
256 static int regs_match_p PARAMS ((rtx, rtx, struct movable *));
257 static int rtx_equal_for_loop_p PARAMS ((rtx, rtx, struct movable *));
258 static void add_label_notes PARAMS ((rtx, rtx));
259 static void move_movables PARAMS ((struct loop *loop, struct movable *,
261 static int count_nonfixed_reads PARAMS ((const struct loop *, rtx));
262 static void strength_reduce PARAMS ((struct loop *, int, int, int));
263 static void find_single_use_in_loop PARAMS ((rtx, rtx, varray_type));
264 static int valid_initial_value_p PARAMS ((rtx, rtx, int, rtx));
265 static void find_mem_givs PARAMS ((const struct loop *, rtx, rtx, int, int));
266 static void record_biv PARAMS ((struct induction *, rtx, rtx, rtx, rtx, rtx *,
268 static void check_final_value PARAMS ((const struct loop *,
269 struct induction *));
270 static void record_giv PARAMS ((const struct loop *, struct induction *,
271 rtx, rtx, rtx, rtx, rtx, int, enum g_types,
273 static void update_giv_derive PARAMS ((const struct loop *, rtx));
274 static int basic_induction_var PARAMS ((const struct loop *, rtx,
275 enum machine_mode, rtx, rtx,
276 rtx *, rtx *, rtx **, int *));
277 static rtx simplify_giv_expr PARAMS ((const struct loop *, rtx, int *));
278 static int general_induction_var PARAMS ((const struct loop *loop, rtx, rtx *,
279 rtx *, rtx *, int, int *));
280 static int consec_sets_giv PARAMS ((const struct loop *, int, rtx,
281 rtx, rtx, rtx *, rtx *, rtx *));
282 static int check_dbra_loop PARAMS ((struct loop *, int));
283 static rtx express_from_1 PARAMS ((rtx, rtx, rtx));
284 static rtx combine_givs_p PARAMS ((struct induction *, struct induction *));
285 static void combine_givs PARAMS ((struct iv_class *));
286 struct recombine_givs_stats;
287 static int find_life_end PARAMS ((rtx, struct recombine_givs_stats *,
289 static void recombine_givs PARAMS ((const struct loop *, struct iv_class *,
291 static int product_cheap_p PARAMS ((rtx, rtx));
292 static int maybe_eliminate_biv PARAMS ((const struct loop *, struct iv_class *,
294 static int maybe_eliminate_biv_1 PARAMS ((const struct loop *, rtx, rtx,
295 struct iv_class *, int, rtx));
296 static int last_use_this_basic_block PARAMS ((rtx, rtx));
297 static void record_initial PARAMS ((rtx, rtx, void *));
298 static void update_reg_last_use PARAMS ((rtx, rtx));
299 static rtx next_insn_in_loop PARAMS ((const struct loop *, rtx));
300 static void load_mems_and_recount_loop_regs_set PARAMS ((const struct loop*,
302 static void load_mems PARAMS ((const struct loop *));
303 static int insert_loop_mem PARAMS ((rtx *, void *));
304 static int replace_loop_mem PARAMS ((rtx *, void *));
305 static int replace_loop_reg PARAMS ((rtx *, void *));
306 static void note_reg_stored PARAMS ((rtx, rtx, void *));
307 static void try_copy_prop PARAMS ((const struct loop *, rtx, int));
308 static int replace_label PARAMS ((rtx *, void *));
310 typedef struct rtx_and_int {
315 typedef struct rtx_pair {
320 /* Nonzero iff INSN is between START and END, inclusive. */
321 #define INSN_IN_RANGE_P(INSN, START, END) \
322 (INSN_UID (INSN) < max_uid_for_loop \
323 && INSN_LUID (INSN) >= INSN_LUID (START) \
324 && INSN_LUID (INSN) <= INSN_LUID (END))
326 #ifdef HAVE_decrement_and_branch_on_count
327 /* Test whether BCT applicable and safe. */
328 static void insert_bct PARAMS ((struct loop *));
330 /* Auxiliary function that inserts the BCT pattern into the loop. */
331 static void instrument_loop_bct PARAMS ((rtx, rtx, rtx));
332 #endif /* HAVE_decrement_and_branch_on_count */
334 /* Indirect_jump_in_function is computed once per function. */
335 int indirect_jump_in_function = 0;
336 static int indirect_jump_in_function_p PARAMS ((rtx));
338 static int compute_luids PARAMS ((rtx, rtx, int));
340 static int biv_elimination_giv_has_0_offset PARAMS ((struct induction *,
341 struct induction *, rtx));
343 /* Relative gain of eliminating various kinds of operations. */
346 static int shift_cost;
347 static int mult_cost;
350 /* Benefit penalty, if a giv is not replaceable, i.e. must emit an insn to
351 copy the value of the strength reduced giv to its original register. */
352 static int copy_cost;
354 /* Cost of using a register, to normalize the benefits of a giv. */
355 static int reg_address_cost;
361 char *free_point = (char *) oballoc (1);
362 rtx reg = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 1);
364 add_cost = rtx_cost (gen_rtx_PLUS (word_mode, reg, reg), SET);
367 reg_address_cost = ADDRESS_COST (reg);
369 reg_address_cost = rtx_cost (reg, MEM);
372 /* We multiply by 2 to reconcile the difference in scale between
373 these two ways of computing costs. Otherwise the cost of a copy
374 will be far less than the cost of an add. */
378 /* Free the objects we just allocated. */
381 /* Initialize the obstack used for rtl in product_cheap_p. */
382 gcc_obstack_init (&temp_obstack);
385 /* Compute the mapping from uids to luids.
386 LUIDs are numbers assigned to insns, like uids,
387 except that luids increase monotonically through the code.
388 Start at insn START and stop just before END. Assign LUIDs
389 starting with PREV_LUID + 1. Return the last assigned LUID + 1. */
391 compute_luids (start, end, prev_luid)
398 for (insn = start, i = prev_luid; insn != end; insn = NEXT_INSN (insn))
400 if (INSN_UID (insn) >= max_uid_for_loop)
402 /* Don't assign luids to line-number NOTEs, so that the distance in
403 luids between two insns is not affected by -g. */
404 if (GET_CODE (insn) != NOTE
405 || NOTE_LINE_NUMBER (insn) <= 0)
406 uid_luid[INSN_UID (insn)] = ++i;
408 /* Give a line number note the same luid as preceding insn. */
409 uid_luid[INSN_UID (insn)] = i;
414 /* Entry point of this file. Perform loop optimization
415 on the current function. F is the first insn of the function
416 and DUMPFILE is a stream for output of a trace of actions taken
417 (or 0 if none should be output). */
420 loop_optimize (f, dumpfile, unroll_p, bct_p)
421 /* f is the first instruction of a chain of insns for one function */
428 struct loops loops_data;
429 struct loops *loops = &loops_data;
430 struct loop_info *loops_info;
432 loop_dump_stream = dumpfile;
434 init_recog_no_volatile ();
436 max_reg_before_loop = max_reg_num ();
437 loop_max_reg = max_reg_before_loop;
441 /* Count the number of loops. */
444 for (insn = f; insn; insn = NEXT_INSN (insn))
446 if (GET_CODE (insn) == NOTE
447 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
451 /* Don't waste time if no loops. */
452 if (max_loop_num == 0)
455 loops->num = max_loop_num;
457 moved_once = (char *) xcalloc (max_reg_before_loop, sizeof (char));
459 /* Get size to use for tables indexed by uids.
460 Leave some space for labels allocated by find_and_verify_loops. */
461 max_uid_for_loop = get_max_uid () + 1 + max_loop_num * 32;
463 uid_luid = (int *) xcalloc (max_uid_for_loop, sizeof (int));
464 uid_loop = (struct loop **) xcalloc (max_uid_for_loop,
465 sizeof (struct loop *));
467 /* Allocate storage for array of loops. */
468 loops->array = (struct loop *)
469 xcalloc (loops->num, sizeof (struct loop));
471 /* Find and process each loop.
472 First, find them, and record them in order of their beginnings. */
473 find_and_verify_loops (f, loops);
475 /* Allocate and initialize auxiliary loop information. */
476 loops_info = xcalloc (loops->num, sizeof (struct loop_info));
477 for (i = 0; i < loops->num; i++)
478 loops->array[i].aux = loops_info + i;
480 /* Now find all register lifetimes. This must be done after
481 find_and_verify_loops, because it might reorder the insns in the
483 reg_scan (f, max_reg_before_loop, 1);
485 /* This must occur after reg_scan so that registers created by gcse
486 will have entries in the register tables.
488 We could have added a call to reg_scan after gcse_main in toplev.c,
489 but moving this call to init_alias_analysis is more efficient. */
490 init_alias_analysis ();
492 /* See if we went too far. Note that get_max_uid already returns
493 one more that the maximum uid of all insn. */
494 if (get_max_uid () > max_uid_for_loop)
496 /* Now reset it to the actual size we need. See above. */
497 max_uid_for_loop = get_max_uid ();
499 /* find_and_verify_loops has already called compute_luids, but it
500 might have rearranged code afterwards, so we need to recompute
502 max_luid = compute_luids (f, NULL_RTX, 0);
504 /* Don't leave gaps in uid_luid for insns that have been
505 deleted. It is possible that the first or last insn
506 using some register has been deleted by cross-jumping.
507 Make sure that uid_luid for that former insn's uid
508 points to the general area where that insn used to be. */
509 for (i = 0; i < max_uid_for_loop; i++)
511 uid_luid[0] = uid_luid[i];
512 if (uid_luid[0] != 0)
515 for (i = 0; i < max_uid_for_loop; i++)
516 if (uid_luid[i] == 0)
517 uid_luid[i] = uid_luid[i - 1];
519 /* If debugging and unrolling loops, we must replicate the tree
520 nodes corresponding to the BLOCKs inside the loop, so that the
521 original one to one mapping will remain. We sometimes unroll
522 loops even when unroll_p is false, so we must always do this when
524 if (write_symbols != NO_DEBUG)
525 find_loop_tree_blocks ();
527 /* Determine if the function has indirect jump. On some systems
528 this prevents low overhead loop instructions from being used. */
529 indirect_jump_in_function = indirect_jump_in_function_p (f);
531 /* Now scan the loops, last ones first, since this means inner ones are done
532 before outer ones. */
533 for (i = max_loop_num - 1; i >= 0; i--)
535 struct loop *loop = &loops->array[i];
537 if (! loop->invalid && loop->end)
538 scan_loop (loop, unroll_p, bct_p);
541 /* Replicate the BLOCKs. */
542 if (write_symbols != NO_DEBUG)
543 unroll_block_trees ();
545 end_alias_analysis ();
555 /* Returns the next insn, in execution order, after INSN. START and
556 END are the NOTE_INSN_LOOP_BEG and NOTE_INSN_LOOP_END for the loop,
557 respectively. LOOP->TOP, if non-NULL, is the top of the loop in the
558 insn-stream; it is used with loops that are entered near the
562 next_insn_in_loop (loop, insn)
563 const struct loop *loop;
566 insn = NEXT_INSN (insn);
568 if (insn == loop->end)
571 /* Go to the top of the loop, and continue there. */
578 if (insn == loop->scan_start)
585 /* Optimize one loop described by LOOP. */
587 /* ??? Could also move memory writes out of loops if the destination address
588 is invariant, the source is invariant, the memory write is not volatile,
589 and if we can prove that no read inside the loop can read this address
590 before the write occurs. If there is a read of this address after the
591 write, then we can also mark the memory read as invariant. */
594 scan_loop (loop, unroll_p, bct_p)
599 rtx loop_start = loop->start;
600 rtx loop_end = loop->end;
601 /* Additional information about the current loop being processed
602 that is used to compute the number of loop iterations for loop
603 unrolling and doloop optimization. */
604 struct loop_info *loop_info = LOOP_INFO (loop);
606 /* 1 if we are scanning insns that could be executed zero times. */
608 /* 1 if we are scanning insns that might never be executed
609 due to a subroutine call which might exit before they are reached. */
611 /* Jump insn that enters the loop, or 0 if control drops in. */
612 rtx loop_entry_jump = 0;
613 /* Number of insns in the loop. */
617 rtx temp, update_start, update_end;
618 /* The SET from an insn, if it is the only SET in the insn. */
620 /* Chain describing insns movable in current loop. */
621 struct movable *movables = 0;
622 /* Last element in `movables' -- so we can add elements at the end. */
623 struct movable *last_movable = 0;
624 /* Ratio of extra register life span we can justify
625 for saving an instruction. More if loop doesn't call subroutines
626 since in that case saving an insn makes more difference
627 and more registers are available. */
629 /* Nonzero if we are scanning instructions in a sub-loop. */
635 /* Determine whether this loop starts with a jump down to a test at
636 the end. This will occur for a small number of loops with a test
637 that is too complex to duplicate in front of the loop.
639 We search for the first insn or label in the loop, skipping NOTEs.
640 However, we must be careful not to skip past a NOTE_INSN_LOOP_BEG
641 (because we might have a loop executed only once that contains a
642 loop which starts with a jump to its exit test) or a NOTE_INSN_LOOP_END
643 (in case we have a degenerate loop).
645 Note that if we mistakenly think that a loop is entered at the top
646 when, in fact, it is entered at the exit test, the only effect will be
647 slightly poorer optimization. Making the opposite error can generate
648 incorrect code. Since very few loops now start with a jump to the
649 exit test, the code here to detect that case is very conservative. */
651 for (p = NEXT_INSN (loop_start);
653 && GET_CODE (p) != CODE_LABEL && GET_RTX_CLASS (GET_CODE (p)) != 'i'
654 && (GET_CODE (p) != NOTE
655 || (NOTE_LINE_NUMBER (p) != NOTE_INSN_LOOP_BEG
656 && NOTE_LINE_NUMBER (p) != NOTE_INSN_LOOP_END));
660 loop->scan_start = p;
662 /* Set up variables describing this loop. */
664 threshold = (loop_info->has_call ? 1 : 2) * (1 + n_non_fixed_regs);
666 /* If loop has a jump before the first label,
667 the true entry is the target of that jump.
668 Start scan from there.
669 But record in LOOP->TOP the place where the end-test jumps
670 back to so we can scan that after the end of the loop. */
671 if (GET_CODE (p) == JUMP_INSN)
675 /* Loop entry must be unconditional jump (and not a RETURN) */
677 && JUMP_LABEL (p) != 0
678 /* Check to see whether the jump actually
679 jumps out of the loop (meaning it's no loop).
680 This case can happen for things like
681 do {..} while (0). If this label was generated previously
682 by loop, we can't tell anything about it and have to reject
684 && INSN_IN_RANGE_P (JUMP_LABEL (p), loop_start, loop_end))
686 loop->top = next_label (loop->scan_start);
687 loop->scan_start = JUMP_LABEL (p);
691 /* If LOOP->SCAN_START was an insn created by loop, we don't know its luid
692 as required by loop_reg_used_before_p. So skip such loops. (This
693 test may never be true, but it's best to play it safe.)
695 Also, skip loops where we do not start scanning at a label. This
696 test also rejects loops starting with a JUMP_INSN that failed the
699 if (INSN_UID (loop->scan_start) >= max_uid_for_loop
700 || GET_CODE (loop->scan_start) != CODE_LABEL)
702 if (loop_dump_stream)
703 fprintf (loop_dump_stream, "\nLoop from %d to %d is phony.\n\n",
704 INSN_UID (loop_start), INSN_UID (loop_end));
708 /* Count number of times each reg is set during this loop.
709 Set VARRAY_CHAR (may_not_optimize, I) if it is not safe to move out
710 the setting of register I. Set VARRAY_RTX (reg_single_usage, I). */
712 /* Allocate extra space for REGS that might be created by
713 load_mems. We allocate a little extra slop as well, in the hopes
714 that even after the moving of movables creates some new registers
715 we won't have to reallocate these arrays. However, we do grow
716 the arrays, if necessary, in load_mems_recount_loop_regs_set. */
717 nregs = max_reg_num () + loop_mems_idx + 16;
718 VARRAY_INT_INIT (set_in_loop, nregs, "set_in_loop");
719 VARRAY_INT_INIT (n_times_set, nregs, "n_times_set");
720 VARRAY_CHAR_INIT (may_not_optimize, nregs, "may_not_optimize");
721 VARRAY_RTX_INIT (reg_single_usage, nregs, "reg_single_usage");
723 count_loop_regs_set (loop->top ? loop->top : loop->start, loop->end,
724 may_not_optimize, reg_single_usage, &insn_count, nregs);
726 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
728 VARRAY_CHAR (may_not_optimize, i) = 1;
729 VARRAY_INT (set_in_loop, i) = 1;
732 #ifdef AVOID_CCMODE_COPIES
733 /* Don't try to move insns which set CC registers if we should not
734 create CCmode register copies. */
735 for (i = max_reg_num () - 1; i >= FIRST_PSEUDO_REGISTER; i--)
736 if (GET_MODE_CLASS (GET_MODE (regno_reg_rtx[i])) == MODE_CC)
737 VARRAY_CHAR (may_not_optimize, i) = 1;
740 bcopy ((char *) &set_in_loop->data,
741 (char *) &n_times_set->data, nregs * sizeof (int));
743 if (loop_dump_stream)
745 fprintf (loop_dump_stream, "\nLoop from %d to %d: %d real insns.\n",
746 INSN_UID (loop_start), INSN_UID (loop_end), insn_count);
748 fprintf (loop_dump_stream, "Continue at insn %d.\n",
749 INSN_UID (loop->cont));
752 /* Scan through the loop finding insns that are safe to move.
753 Set set_in_loop negative for the reg being set, so that
754 this reg will be considered invariant for subsequent insns.
755 We consider whether subsequent insns use the reg
756 in deciding whether it is worth actually moving.
758 MAYBE_NEVER is nonzero if we have passed a conditional jump insn
759 and therefore it is possible that the insns we are scanning
760 would never be executed. At such times, we must make sure
761 that it is safe to execute the insn once instead of zero times.
762 When MAYBE_NEVER is 0, all insns will be executed at least once
763 so that is not a problem. */
765 for (p = next_insn_in_loop (loop, loop->scan_start);
767 p = next_insn_in_loop (loop, p))
769 if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
770 && find_reg_note (p, REG_LIBCALL, NULL_RTX))
772 else if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
773 && find_reg_note (p, REG_RETVAL, NULL_RTX))
776 if (GET_CODE (p) == INSN
777 && (set = single_set (p))
778 && GET_CODE (SET_DEST (set)) == REG
779 && ! VARRAY_CHAR (may_not_optimize, REGNO (SET_DEST (set))))
784 rtx src = SET_SRC (set);
785 rtx dependencies = 0;
787 /* Figure out what to use as a source of this insn. If a REG_EQUIV
788 note is given or if a REG_EQUAL note with a constant operand is
789 specified, use it as the source and mark that we should move
790 this insn by calling emit_move_insn rather that duplicating the
793 Otherwise, only use the REG_EQUAL contents if a REG_RETVAL note
795 temp = find_reg_note (p, REG_EQUIV, NULL_RTX);
797 src = XEXP (temp, 0), move_insn = 1;
800 temp = find_reg_note (p, REG_EQUAL, NULL_RTX);
801 if (temp && CONSTANT_P (XEXP (temp, 0)))
802 src = XEXP (temp, 0), move_insn = 1;
803 if (temp && find_reg_note (p, REG_RETVAL, NULL_RTX))
805 src = XEXP (temp, 0);
806 /* A libcall block can use regs that don't appear in
807 the equivalent expression. To move the libcall,
808 we must move those regs too. */
809 dependencies = libcall_other_reg (p, src);
813 /* Don't try to optimize a register that was made
814 by loop-optimization for an inner loop.
815 We don't know its life-span, so we can't compute the benefit. */
816 if (REGNO (SET_DEST (set)) >= max_reg_before_loop)
818 else if (/* The register is used in basic blocks other
819 than the one where it is set (meaning that
820 something after this point in the loop might
821 depend on its value before the set). */
822 ! reg_in_basic_block_p (p, SET_DEST (set))
823 /* And the set is not guaranteed to be executed one
824 the loop starts, or the value before the set is
825 needed before the set occurs...
827 ??? Note we have quadratic behaviour here, mitigated
828 by the fact that the previous test will often fail for
829 large loops. Rather than re-scanning the entire loop
830 each time for register usage, we should build tables
831 of the register usage and use them here instead. */
833 || loop_reg_used_before_p (loop, set, p)))
834 /* It is unsafe to move the set.
836 This code used to consider it OK to move a set of a variable
837 which was not created by the user and not used in an exit test.
838 That behavior is incorrect and was removed. */
840 else if ((tem = loop_invariant_p (loop, src))
841 && (dependencies == 0
842 || (tem2 = loop_invariant_p (loop, dependencies)) != 0)
843 && (VARRAY_INT (set_in_loop,
844 REGNO (SET_DEST (set))) == 1
846 = consec_sets_invariant_p
847 (loop, SET_DEST (set),
848 VARRAY_INT (set_in_loop, REGNO (SET_DEST (set))),
850 /* If the insn can cause a trap (such as divide by zero),
851 can't move it unless it's guaranteed to be executed
852 once loop is entered. Even a function call might
853 prevent the trap insn from being reached
854 (since it might exit!) */
855 && ! ((maybe_never || call_passed)
856 && may_trap_p (src)))
858 register struct movable *m;
859 register int regno = REGNO (SET_DEST (set));
861 /* A potential lossage is where we have a case where two insns
862 can be combined as long as they are both in the loop, but
863 we move one of them outside the loop. For large loops,
864 this can lose. The most common case of this is the address
865 of a function being called.
867 Therefore, if this register is marked as being used exactly
868 once if we are in a loop with calls (a "large loop"), see if
869 we can replace the usage of this register with the source
870 of this SET. If we can, delete this insn.
872 Don't do this if P has a REG_RETVAL note or if we have
873 SMALL_REGISTER_CLASSES and SET_SRC is a hard register. */
875 if (loop_info->has_call
876 && VARRAY_RTX (reg_single_usage, regno) != 0
877 && VARRAY_RTX (reg_single_usage, regno) != const0_rtx
878 && REGNO_FIRST_UID (regno) == INSN_UID (p)
879 && (REGNO_LAST_UID (regno)
880 == INSN_UID (VARRAY_RTX (reg_single_usage, regno)))
881 && VARRAY_INT (set_in_loop, regno) == 1
882 && ! side_effects_p (SET_SRC (set))
883 && ! find_reg_note (p, REG_RETVAL, NULL_RTX)
884 && (! SMALL_REGISTER_CLASSES
885 || (! (GET_CODE (SET_SRC (set)) == REG
886 && REGNO (SET_SRC (set)) < FIRST_PSEUDO_REGISTER)))
887 /* This test is not redundant; SET_SRC (set) might be
888 a call-clobbered register and the life of REGNO
889 might span a call. */
890 && ! modified_between_p (SET_SRC (set), p,
892 (reg_single_usage, regno))
893 && no_labels_between_p (p, VARRAY_RTX (reg_single_usage, regno))
894 && validate_replace_rtx (SET_DEST (set), SET_SRC (set),
896 (reg_single_usage, regno)))
898 /* Replace any usage in a REG_EQUAL note. Must copy the
899 new source, so that we don't get rtx sharing between the
900 SET_SOURCE and REG_NOTES of insn p. */
901 REG_NOTES (VARRAY_RTX (reg_single_usage, regno))
902 = replace_rtx (REG_NOTES (VARRAY_RTX
903 (reg_single_usage, regno)),
904 SET_DEST (set), copy_rtx (SET_SRC (set)));
907 NOTE_LINE_NUMBER (p) = NOTE_INSN_DELETED;
908 NOTE_SOURCE_FILE (p) = 0;
909 VARRAY_INT (set_in_loop, regno) = 0;
913 m = (struct movable *) alloca (sizeof (struct movable));
917 m->dependencies = dependencies;
918 m->set_dest = SET_DEST (set);
920 m->consec = VARRAY_INT (set_in_loop,
921 REGNO (SET_DEST (set))) - 1;
925 m->move_insn = move_insn;
926 m->move_insn_first = 0;
927 m->is_equiv = (find_reg_note (p, REG_EQUIV, NULL_RTX) != 0);
928 m->savemode = VOIDmode;
930 /* Set M->cond if either loop_invariant_p
931 or consec_sets_invariant_p returned 2
932 (only conditionally invariant). */
933 m->cond = ((tem | tem1 | tem2) > 1);
934 m->global = (uid_luid[REGNO_LAST_UID (regno)]
935 > INSN_LUID (loop_end)
936 || uid_luid[REGNO_FIRST_UID (regno)] < INSN_LUID (loop_start));
938 m->lifetime = (uid_luid[REGNO_LAST_UID (regno)]
939 - uid_luid[REGNO_FIRST_UID (regno)]);
940 m->savings = VARRAY_INT (n_times_set, regno);
941 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
942 m->savings += libcall_benefit (p);
943 VARRAY_INT (set_in_loop, regno) = move_insn ? -2 : -1;
944 /* Add M to the end of the chain MOVABLES. */
948 last_movable->next = m;
953 /* It is possible for the first instruction to have a
954 REG_EQUAL note but a non-invariant SET_SRC, so we must
955 remember the status of the first instruction in case
956 the last instruction doesn't have a REG_EQUAL note. */
957 m->move_insn_first = m->move_insn;
959 /* Skip this insn, not checking REG_LIBCALL notes. */
960 p = next_nonnote_insn (p);
961 /* Skip the consecutive insns, if there are any. */
962 p = skip_consec_insns (p, m->consec);
963 /* Back up to the last insn of the consecutive group. */
964 p = prev_nonnote_insn (p);
966 /* We must now reset m->move_insn, m->is_equiv, and possibly
967 m->set_src to correspond to the effects of all the
969 temp = find_reg_note (p, REG_EQUIV, NULL_RTX);
971 m->set_src = XEXP (temp, 0), m->move_insn = 1;
974 temp = find_reg_note (p, REG_EQUAL, NULL_RTX);
975 if (temp && CONSTANT_P (XEXP (temp, 0)))
976 m->set_src = XEXP (temp, 0), m->move_insn = 1;
981 m->is_equiv = (find_reg_note (p, REG_EQUIV, NULL_RTX) != 0);
984 /* If this register is always set within a STRICT_LOW_PART
985 or set to zero, then its high bytes are constant.
986 So clear them outside the loop and within the loop
987 just load the low bytes.
988 We must check that the machine has an instruction to do so.
989 Also, if the value loaded into the register
990 depends on the same register, this cannot be done. */
991 else if (SET_SRC (set) == const0_rtx
992 && GET_CODE (NEXT_INSN (p)) == INSN
993 && (set1 = single_set (NEXT_INSN (p)))
994 && GET_CODE (set1) == SET
995 && (GET_CODE (SET_DEST (set1)) == STRICT_LOW_PART)
996 && (GET_CODE (XEXP (SET_DEST (set1), 0)) == SUBREG)
997 && (SUBREG_REG (XEXP (SET_DEST (set1), 0))
999 && !reg_mentioned_p (SET_DEST (set), SET_SRC (set1)))
1001 register int regno = REGNO (SET_DEST (set));
1002 if (VARRAY_INT (set_in_loop, regno) == 2)
1004 register struct movable *m;
1005 m = (struct movable *) alloca (sizeof (struct movable));
1008 m->set_dest = SET_DEST (set);
1009 m->dependencies = 0;
1015 m->move_insn_first = 0;
1017 /* If the insn may not be executed on some cycles,
1018 we can't clear the whole reg; clear just high part.
1019 Not even if the reg is used only within this loop.
1026 Clearing x before the inner loop could clobber a value
1027 being saved from the last time around the outer loop.
1028 However, if the reg is not used outside this loop
1029 and all uses of the register are in the same
1030 basic block as the store, there is no problem.
1032 If this insn was made by loop, we don't know its
1033 INSN_LUID and hence must make a conservative
1035 m->global = (INSN_UID (p) >= max_uid_for_loop
1036 || (uid_luid[REGNO_LAST_UID (regno)]
1037 > INSN_LUID (loop_end))
1038 || (uid_luid[REGNO_FIRST_UID (regno)]
1040 || (labels_in_range_p
1041 (p, uid_luid[REGNO_FIRST_UID (regno)])));
1042 if (maybe_never && m->global)
1043 m->savemode = GET_MODE (SET_SRC (set1));
1045 m->savemode = VOIDmode;
1049 m->lifetime = (uid_luid[REGNO_LAST_UID (regno)]
1050 - uid_luid[REGNO_FIRST_UID (regno)]);
1052 VARRAY_INT (set_in_loop, regno) = -1;
1053 /* Add M to the end of the chain MOVABLES. */
1057 last_movable->next = m;
1062 /* Past a call insn, we get to insns which might not be executed
1063 because the call might exit. This matters for insns that trap.
1064 Call insns inside a REG_LIBCALL/REG_RETVAL block always return,
1065 so they don't count. */
1066 else if (GET_CODE (p) == CALL_INSN && ! in_libcall)
1068 /* Past a label or a jump, we get to insns for which we
1069 can't count on whether or how many times they will be
1070 executed during each iteration. Therefore, we can
1071 only move out sets of trivial variables
1072 (those not used after the loop). */
1073 /* Similar code appears twice in strength_reduce. */
1074 else if ((GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN)
1075 /* If we enter the loop in the middle, and scan around to the
1076 beginning, don't set maybe_never for that. This must be an
1077 unconditional jump, otherwise the code at the top of the
1078 loop might never be executed. Unconditional jumps are
1079 followed a by barrier then loop end. */
1080 && ! (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p) == loop->top
1081 && NEXT_INSN (NEXT_INSN (p)) == loop_end
1082 && simplejump_p (p)))
1084 else if (GET_CODE (p) == NOTE)
1086 /* At the virtual top of a converted loop, insns are again known to
1087 be executed: logically, the loop begins here even though the exit
1088 code has been duplicated. */
1089 if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP && loop_depth == 0)
1090 maybe_never = call_passed = 0;
1091 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
1093 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
1098 /* If one movable subsumes another, ignore that other. */
1100 ignore_some_movables (movables);
1102 /* For each movable insn, see if the reg that it loads
1103 leads when it dies right into another conditionally movable insn.
1104 If so, record that the second insn "forces" the first one,
1105 since the second can be moved only if the first is. */
1107 force_movables (movables);
1109 /* See if there are multiple movable insns that load the same value.
1110 If there are, make all but the first point at the first one
1111 through the `match' field, and add the priorities of them
1112 all together as the priority of the first. */
1114 combine_movables (movables, nregs);
1116 /* Now consider each movable insn to decide whether it is worth moving.
1117 Store 0 in set_in_loop for each reg that is moved.
1119 Generally this increases code size, so do not move moveables when
1120 optimizing for code size. */
1122 if (! optimize_size)
1123 move_movables (loop, movables, threshold, insn_count, nregs);
1125 /* Now candidates that still are negative are those not moved.
1126 Change set_in_loop to indicate that those are not actually invariant. */
1127 for (i = 0; i < nregs; i++)
1128 if (VARRAY_INT (set_in_loop, i) < 0)
1129 VARRAY_INT (set_in_loop, i) = VARRAY_INT (n_times_set, i);
1131 /* Now that we've moved some things out of the loop, we might be able to
1132 hoist even more memory references. */
1133 load_mems_and_recount_loop_regs_set (loop, &insn_count);
1135 for (update_start = loop_start;
1136 PREV_INSN (update_start)
1137 && GET_CODE (PREV_INSN (update_start)) != CODE_LABEL;
1138 update_start = PREV_INSN (update_start))
1140 update_end = NEXT_INSN (loop_end);
1142 reg_scan_update (update_start, update_end, loop_max_reg);
1143 loop_max_reg = max_reg_num ();
1145 if (flag_strength_reduce)
1147 the_movables = movables;
1148 strength_reduce (loop, insn_count, unroll_p, bct_p);
1150 reg_scan_update (update_start, update_end, loop_max_reg);
1151 loop_max_reg = max_reg_num ();
1154 VARRAY_FREE (reg_single_usage);
1155 VARRAY_FREE (set_in_loop);
1156 VARRAY_FREE (n_times_set);
1157 VARRAY_FREE (may_not_optimize);
1160 /* Add elements to *OUTPUT to record all the pseudo-regs
1161 mentioned in IN_THIS but not mentioned in NOT_IN_THIS. */
1164 record_excess_regs (in_this, not_in_this, output)
1165 rtx in_this, not_in_this;
1172 code = GET_CODE (in_this);
1186 if (REGNO (in_this) >= FIRST_PSEUDO_REGISTER
1187 && ! reg_mentioned_p (in_this, not_in_this))
1188 *output = gen_rtx_EXPR_LIST (VOIDmode, in_this, *output);
1195 fmt = GET_RTX_FORMAT (code);
1196 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1203 for (j = 0; j < XVECLEN (in_this, i); j++)
1204 record_excess_regs (XVECEXP (in_this, i, j), not_in_this, output);
1208 record_excess_regs (XEXP (in_this, i), not_in_this, output);
1214 /* Check what regs are referred to in the libcall block ending with INSN,
1215 aside from those mentioned in the equivalent value.
1216 If there are none, return 0.
1217 If there are one or more, return an EXPR_LIST containing all of them. */
1220 libcall_other_reg (insn, equiv)
1223 rtx note = find_reg_note (insn, REG_RETVAL, NULL_RTX);
1224 rtx p = XEXP (note, 0);
1227 /* First, find all the regs used in the libcall block
1228 that are not mentioned as inputs to the result. */
1232 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
1233 || GET_CODE (p) == CALL_INSN)
1234 record_excess_regs (PATTERN (p), equiv, &output);
1241 /* Return 1 if all uses of REG
1242 are between INSN and the end of the basic block. */
1245 reg_in_basic_block_p (insn, reg)
1248 int regno = REGNO (reg);
1251 if (REGNO_FIRST_UID (regno) != INSN_UID (insn))
1254 /* Search this basic block for the already recorded last use of the reg. */
1255 for (p = insn; p; p = NEXT_INSN (p))
1257 switch (GET_CODE (p))
1264 /* Ordinary insn: if this is the last use, we win. */
1265 if (REGNO_LAST_UID (regno) == INSN_UID (p))
1270 /* Jump insn: if this is the last use, we win. */
1271 if (REGNO_LAST_UID (regno) == INSN_UID (p))
1273 /* Otherwise, it's the end of the basic block, so we lose. */
1278 /* It's the end of the basic block, so we lose. */
1286 /* The "last use" doesn't follow the "first use"?? */
1290 /* Compute the benefit of eliminating the insns in the block whose
1291 last insn is LAST. This may be a group of insns used to compute a
1292 value directly or can contain a library call. */
1295 libcall_benefit (last)
1301 for (insn = XEXP (find_reg_note (last, REG_RETVAL, NULL_RTX), 0);
1302 insn != last; insn = NEXT_INSN (insn))
1304 if (GET_CODE (insn) == CALL_INSN)
1305 benefit += 10; /* Assume at least this many insns in a library
1307 else if (GET_CODE (insn) == INSN
1308 && GET_CODE (PATTERN (insn)) != USE
1309 && GET_CODE (PATTERN (insn)) != CLOBBER)
1316 /* Skip COUNT insns from INSN, counting library calls as 1 insn. */
1319 skip_consec_insns (insn, count)
1323 for (; count > 0; count--)
1327 /* If first insn of libcall sequence, skip to end. */
1328 /* Do this at start of loop, since INSN is guaranteed to
1330 if (GET_CODE (insn) != NOTE
1331 && (temp = find_reg_note (insn, REG_LIBCALL, NULL_RTX)))
1332 insn = XEXP (temp, 0);
1334 do insn = NEXT_INSN (insn);
1335 while (GET_CODE (insn) == NOTE);
1341 /* Ignore any movable whose insn falls within a libcall
1342 which is part of another movable.
1343 We make use of the fact that the movable for the libcall value
1344 was made later and so appears later on the chain. */
1347 ignore_some_movables (movables)
1348 struct movable *movables;
1350 register struct movable *m, *m1;
1352 for (m = movables; m; m = m->next)
1354 /* Is this a movable for the value of a libcall? */
1355 rtx note = find_reg_note (m->insn, REG_RETVAL, NULL_RTX);
1359 /* Check for earlier movables inside that range,
1360 and mark them invalid. We cannot use LUIDs here because
1361 insns created by loop.c for prior loops don't have LUIDs.
1362 Rather than reject all such insns from movables, we just
1363 explicitly check each insn in the libcall (since invariant
1364 libcalls aren't that common). */
1365 for (insn = XEXP (note, 0); insn != m->insn; insn = NEXT_INSN (insn))
1366 for (m1 = movables; m1 != m; m1 = m1->next)
1367 if (m1->insn == insn)
1373 /* For each movable insn, see if the reg that it loads
1374 leads when it dies right into another conditionally movable insn.
1375 If so, record that the second insn "forces" the first one,
1376 since the second can be moved only if the first is. */
1379 force_movables (movables)
1380 struct movable *movables;
1382 register struct movable *m, *m1;
1383 for (m1 = movables; m1; m1 = m1->next)
1384 /* Omit this if moving just the (SET (REG) 0) of a zero-extend. */
1385 if (!m1->partial && !m1->done)
1387 int regno = m1->regno;
1388 for (m = m1->next; m; m = m->next)
1389 /* ??? Could this be a bug? What if CSE caused the
1390 register of M1 to be used after this insn?
1391 Since CSE does not update regno_last_uid,
1392 this insn M->insn might not be where it dies.
1393 But very likely this doesn't matter; what matters is
1394 that M's reg is computed from M1's reg. */
1395 if (INSN_UID (m->insn) == REGNO_LAST_UID (regno)
1398 if (m != 0 && m->set_src == m1->set_dest
1399 /* If m->consec, m->set_src isn't valid. */
1403 /* Increase the priority of the moving the first insn
1404 since it permits the second to be moved as well. */
1408 m1->lifetime += m->lifetime;
1409 m1->savings += m->savings;
1414 /* Find invariant expressions that are equal and can be combined into
1418 combine_movables (movables, nregs)
1419 struct movable *movables;
1422 register struct movable *m;
1423 char *matched_regs = (char *) xmalloc (nregs);
1424 enum machine_mode mode;
1426 /* Regs that are set more than once are not allowed to match
1427 or be matched. I'm no longer sure why not. */
1428 /* Perhaps testing m->consec_sets would be more appropriate here? */
1430 for (m = movables; m; m = m->next)
1431 if (m->match == 0 && VARRAY_INT (n_times_set, m->regno) == 1 && !m->partial)
1433 register struct movable *m1;
1434 int regno = m->regno;
1436 bzero (matched_regs, nregs);
1437 matched_regs[regno] = 1;
1439 /* We want later insns to match the first one. Don't make the first
1440 one match any later ones. So start this loop at m->next. */
1441 for (m1 = m->next; m1; m1 = m1->next)
1442 if (m != m1 && m1->match == 0 && VARRAY_INT (n_times_set, m1->regno) == 1
1443 /* A reg used outside the loop mustn't be eliminated. */
1445 /* A reg used for zero-extending mustn't be eliminated. */
1447 && (matched_regs[m1->regno]
1450 /* Can combine regs with different modes loaded from the
1451 same constant only if the modes are the same or
1452 if both are integer modes with M wider or the same
1453 width as M1. The check for integer is redundant, but
1454 safe, since the only case of differing destination
1455 modes with equal sources is when both sources are
1456 VOIDmode, i.e., CONST_INT. */
1457 (GET_MODE (m->set_dest) == GET_MODE (m1->set_dest)
1458 || (GET_MODE_CLASS (GET_MODE (m->set_dest)) == MODE_INT
1459 && GET_MODE_CLASS (GET_MODE (m1->set_dest)) == MODE_INT
1460 && (GET_MODE_BITSIZE (GET_MODE (m->set_dest))
1461 >= GET_MODE_BITSIZE (GET_MODE (m1->set_dest)))))
1462 /* See if the source of M1 says it matches M. */
1463 && ((GET_CODE (m1->set_src) == REG
1464 && matched_regs[REGNO (m1->set_src)])
1465 || rtx_equal_for_loop_p (m->set_src, m1->set_src,
1467 && ((m->dependencies == m1->dependencies)
1468 || rtx_equal_p (m->dependencies, m1->dependencies)))
1470 m->lifetime += m1->lifetime;
1471 m->savings += m1->savings;
1474 matched_regs[m1->regno] = 1;
1478 /* Now combine the regs used for zero-extension.
1479 This can be done for those not marked `global'
1480 provided their lives don't overlap. */
1482 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
1483 mode = GET_MODE_WIDER_MODE (mode))
1485 register struct movable *m0 = 0;
1487 /* Combine all the registers for extension from mode MODE.
1488 Don't combine any that are used outside this loop. */
1489 for (m = movables; m; m = m->next)
1490 if (m->partial && ! m->global
1491 && mode == GET_MODE (SET_SRC (PATTERN (NEXT_INSN (m->insn)))))
1493 register struct movable *m1;
1494 int first = uid_luid[REGNO_FIRST_UID (m->regno)];
1495 int last = uid_luid[REGNO_LAST_UID (m->regno)];
1499 /* First one: don't check for overlap, just record it. */
1504 /* Make sure they extend to the same mode.
1505 (Almost always true.) */
1506 if (GET_MODE (m->set_dest) != GET_MODE (m0->set_dest))
1509 /* We already have one: check for overlap with those
1510 already combined together. */
1511 for (m1 = movables; m1 != m; m1 = m1->next)
1512 if (m1 == m0 || (m1->partial && m1->match == m0))
1513 if (! (uid_luid[REGNO_FIRST_UID (m1->regno)] > last
1514 || uid_luid[REGNO_LAST_UID (m1->regno)] < first))
1517 /* No overlap: we can combine this with the others. */
1518 m0->lifetime += m->lifetime;
1519 m0->savings += m->savings;
1528 free (matched_regs);
1531 /* Return 1 if regs X and Y will become the same if moved. */
1534 regs_match_p (x, y, movables)
1536 struct movable *movables;
1540 struct movable *mx, *my;
1542 for (mx = movables; mx; mx = mx->next)
1543 if (mx->regno == xn)
1546 for (my = movables; my; my = my->next)
1547 if (my->regno == yn)
1551 && ((mx->match == my->match && mx->match != 0)
1553 || mx == my->match));
1556 /* Return 1 if X and Y are identical-looking rtx's.
1557 This is the Lisp function EQUAL for rtx arguments.
1559 If two registers are matching movables or a movable register and an
1560 equivalent constant, consider them equal. */
1563 rtx_equal_for_loop_p (x, y, movables)
1565 struct movable *movables;
1569 register struct movable *m;
1570 register enum rtx_code code;
1571 register const char *fmt;
1575 if (x == 0 || y == 0)
1578 code = GET_CODE (x);
1580 /* If we have a register and a constant, they may sometimes be
1582 if (GET_CODE (x) == REG && VARRAY_INT (set_in_loop, REGNO (x)) == -2
1585 for (m = movables; m; m = m->next)
1586 if (m->move_insn && m->regno == REGNO (x)
1587 && rtx_equal_p (m->set_src, y))
1590 else if (GET_CODE (y) == REG && VARRAY_INT (set_in_loop, REGNO (y)) == -2
1593 for (m = movables; m; m = m->next)
1594 if (m->move_insn && m->regno == REGNO (y)
1595 && rtx_equal_p (m->set_src, x))
1599 /* Otherwise, rtx's of different codes cannot be equal. */
1600 if (code != GET_CODE (y))
1603 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
1604 (REG:SI x) and (REG:HI x) are NOT equivalent. */
1606 if (GET_MODE (x) != GET_MODE (y))
1609 /* These three types of rtx's can be compared nonrecursively. */
1611 return (REGNO (x) == REGNO (y) || regs_match_p (x, y, movables));
1613 if (code == LABEL_REF)
1614 return XEXP (x, 0) == XEXP (y, 0);
1615 if (code == SYMBOL_REF)
1616 return XSTR (x, 0) == XSTR (y, 0);
1618 /* Compare the elements. If any pair of corresponding elements
1619 fail to match, return 0 for the whole things. */
1621 fmt = GET_RTX_FORMAT (code);
1622 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1627 if (XWINT (x, i) != XWINT (y, i))
1632 if (XINT (x, i) != XINT (y, i))
1637 /* Two vectors must have the same length. */
1638 if (XVECLEN (x, i) != XVECLEN (y, i))
1641 /* And the corresponding elements must match. */
1642 for (j = 0; j < XVECLEN (x, i); j++)
1643 if (rtx_equal_for_loop_p (XVECEXP (x, i, j), XVECEXP (y, i, j), movables) == 0)
1648 if (rtx_equal_for_loop_p (XEXP (x, i), XEXP (y, i), movables) == 0)
1653 if (strcmp (XSTR (x, i), XSTR (y, i)))
1658 /* These are just backpointers, so they don't matter. */
1664 /* It is believed that rtx's at this level will never
1665 contain anything but integers and other rtx's,
1666 except for within LABEL_REFs and SYMBOL_REFs. */
1674 /* If X contains any LABEL_REF's, add REG_LABEL notes for them to all
1675 insns in INSNS which use the reference. */
1678 add_label_notes (x, insns)
1682 enum rtx_code code = GET_CODE (x);
1687 if (code == LABEL_REF && !LABEL_REF_NONLOCAL_P (x))
1689 /* This code used to ignore labels that referred to dispatch tables to
1690 avoid flow generating (slighly) worse code.
1692 We no longer ignore such label references (see LABEL_REF handling in
1693 mark_jump_label for additional information). */
1694 for (insn = insns; insn; insn = NEXT_INSN (insn))
1695 if (reg_mentioned_p (XEXP (x, 0), insn))
1696 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_LABEL, XEXP (x, 0),
1700 fmt = GET_RTX_FORMAT (code);
1701 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1704 add_label_notes (XEXP (x, i), insns);
1705 else if (fmt[i] == 'E')
1706 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1707 add_label_notes (XVECEXP (x, i, j), insns);
1711 /* Scan MOVABLES, and move the insns that deserve to be moved.
1712 If two matching movables are combined, replace one reg with the
1713 other throughout. */
1716 move_movables (loop, movables, threshold, insn_count, nregs)
1718 struct movable *movables;
1724 register struct movable *m;
1726 rtx loop_start = loop->start;
1727 rtx loop_end = loop->end;
1728 /* Map of pseudo-register replacements to handle combining
1729 when we move several insns that load the same value
1730 into different pseudo-registers. */
1731 rtx *reg_map = (rtx *) xcalloc (nregs, sizeof (rtx));
1732 char *already_moved = (char *) xcalloc (nregs, sizeof (char));
1736 for (m = movables; m; m = m->next)
1738 /* Describe this movable insn. */
1740 if (loop_dump_stream)
1742 fprintf (loop_dump_stream, "Insn %d: regno %d (life %d), ",
1743 INSN_UID (m->insn), m->regno, m->lifetime);
1745 fprintf (loop_dump_stream, "consec %d, ", m->consec);
1747 fprintf (loop_dump_stream, "cond ");
1749 fprintf (loop_dump_stream, "force ");
1751 fprintf (loop_dump_stream, "global ");
1753 fprintf (loop_dump_stream, "done ");
1755 fprintf (loop_dump_stream, "move-insn ");
1757 fprintf (loop_dump_stream, "matches %d ",
1758 INSN_UID (m->match->insn));
1760 fprintf (loop_dump_stream, "forces %d ",
1761 INSN_UID (m->forces->insn));
1764 /* Count movables. Value used in heuristics in strength_reduce. */
1767 /* Ignore the insn if it's already done (it matched something else).
1768 Otherwise, see if it is now safe to move. */
1772 || (1 == loop_invariant_p (loop, m->set_src)
1773 && (m->dependencies == 0
1774 || 1 == loop_invariant_p (loop, m->dependencies))
1776 || 1 == consec_sets_invariant_p (loop, m->set_dest,
1779 && (! m->forces || m->forces->done))
1783 int savings = m->savings;
1785 /* We have an insn that is safe to move.
1786 Compute its desirability. */
1791 if (loop_dump_stream)
1792 fprintf (loop_dump_stream, "savings %d ", savings);
1794 if (moved_once[regno] && loop_dump_stream)
1795 fprintf (loop_dump_stream, "halved since already moved ");
1797 /* An insn MUST be moved if we already moved something else
1798 which is safe only if this one is moved too: that is,
1799 if already_moved[REGNO] is nonzero. */
1801 /* An insn is desirable to move if the new lifetime of the
1802 register is no more than THRESHOLD times the old lifetime.
1803 If it's not desirable, it means the loop is so big
1804 that moving won't speed things up much,
1805 and it is liable to make register usage worse. */
1807 /* It is also desirable to move if it can be moved at no
1808 extra cost because something else was already moved. */
1810 if (already_moved[regno]
1811 || flag_move_all_movables
1812 || (threshold * savings * m->lifetime) >=
1813 (moved_once[regno] ? insn_count * 2 : insn_count)
1814 || (m->forces && m->forces->done
1815 && VARRAY_INT (n_times_set, m->forces->regno) == 1))
1818 register struct movable *m1;
1819 rtx first = NULL_RTX;
1821 /* Now move the insns that set the reg. */
1823 if (m->partial && m->match)
1827 /* Find the end of this chain of matching regs.
1828 Thus, we load each reg in the chain from that one reg.
1829 And that reg is loaded with 0 directly,
1830 since it has ->match == 0. */
1831 for (m1 = m; m1->match; m1 = m1->match);
1832 newpat = gen_move_insn (SET_DEST (PATTERN (m->insn)),
1833 SET_DEST (PATTERN (m1->insn)));
1834 i1 = emit_insn_before (newpat, loop_start);
1836 /* Mark the moved, invariant reg as being allowed to
1837 share a hard reg with the other matching invariant. */
1838 REG_NOTES (i1) = REG_NOTES (m->insn);
1839 r1 = SET_DEST (PATTERN (m->insn));
1840 r2 = SET_DEST (PATTERN (m1->insn));
1842 = gen_rtx_EXPR_LIST (VOIDmode, r1,
1843 gen_rtx_EXPR_LIST (VOIDmode, r2,
1845 delete_insn (m->insn);
1850 if (loop_dump_stream)
1851 fprintf (loop_dump_stream, " moved to %d", INSN_UID (i1));
1853 /* If we are to re-generate the item being moved with a
1854 new move insn, first delete what we have and then emit
1855 the move insn before the loop. */
1856 else if (m->move_insn)
1860 for (count = m->consec; count >= 0; count--)
1862 /* If this is the first insn of a library call sequence,
1864 if (GET_CODE (p) != NOTE
1865 && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
1868 /* If this is the last insn of a libcall sequence, then
1869 delete every insn in the sequence except the last.
1870 The last insn is handled in the normal manner. */
1871 if (GET_CODE (p) != NOTE
1872 && (temp = find_reg_note (p, REG_RETVAL, NULL_RTX)))
1874 temp = XEXP (temp, 0);
1876 temp = delete_insn (temp);
1880 p = delete_insn (p);
1882 /* simplify_giv_expr expects that it can walk the insns
1883 at m->insn forwards and see this old sequence we are
1884 tossing here. delete_insn does preserve the next
1885 pointers, but when we skip over a NOTE we must fix
1886 it up. Otherwise that code walks into the non-deleted
1888 while (p && GET_CODE (p) == NOTE)
1889 p = NEXT_INSN (temp) = NEXT_INSN (p);
1893 emit_move_insn (m->set_dest, m->set_src);
1894 temp = get_insns ();
1897 add_label_notes (m->set_src, temp);
1899 i1 = emit_insns_before (temp, loop_start);
1900 if (! find_reg_note (i1, REG_EQUAL, NULL_RTX))
1902 = gen_rtx_EXPR_LIST (m->is_equiv ? REG_EQUIV : REG_EQUAL,
1903 m->set_src, REG_NOTES (i1));
1905 if (loop_dump_stream)
1906 fprintf (loop_dump_stream, " moved to %d", INSN_UID (i1));
1908 /* The more regs we move, the less we like moving them. */
1913 for (count = m->consec; count >= 0; count--)
1917 /* If first insn of libcall sequence, skip to end. */
1918 /* Do this at start of loop, since p is guaranteed to
1920 if (GET_CODE (p) != NOTE
1921 && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
1924 /* If last insn of libcall sequence, move all
1925 insns except the last before the loop. The last
1926 insn is handled in the normal manner. */
1927 if (GET_CODE (p) != NOTE
1928 && (temp = find_reg_note (p, REG_RETVAL, NULL_RTX)))
1932 rtx fn_address_insn = 0;
1935 for (temp = XEXP (temp, 0); temp != p;
1936 temp = NEXT_INSN (temp))
1942 if (GET_CODE (temp) == NOTE)
1945 body = PATTERN (temp);
1947 /* Find the next insn after TEMP,
1948 not counting USE or NOTE insns. */
1949 for (next = NEXT_INSN (temp); next != p;
1950 next = NEXT_INSN (next))
1951 if (! (GET_CODE (next) == INSN
1952 && GET_CODE (PATTERN (next)) == USE)
1953 && GET_CODE (next) != NOTE)
1956 /* If that is the call, this may be the insn
1957 that loads the function address.
1959 Extract the function address from the insn
1960 that loads it into a register.
1961 If this insn was cse'd, we get incorrect code.
1963 So emit a new move insn that copies the
1964 function address into the register that the
1965 call insn will use. flow.c will delete any
1966 redundant stores that we have created. */
1967 if (GET_CODE (next) == CALL_INSN
1968 && GET_CODE (body) == SET
1969 && GET_CODE (SET_DEST (body)) == REG
1970 && (n = find_reg_note (temp, REG_EQUAL,
1973 fn_reg = SET_SRC (body);
1974 if (GET_CODE (fn_reg) != REG)
1975 fn_reg = SET_DEST (body);
1976 fn_address = XEXP (n, 0);
1977 fn_address_insn = temp;
1979 /* We have the call insn.
1980 If it uses the register we suspect it might,
1981 load it with the correct address directly. */
1982 if (GET_CODE (temp) == CALL_INSN
1984 && reg_referenced_p (fn_reg, body))
1985 emit_insn_after (gen_move_insn (fn_reg,
1989 if (GET_CODE (temp) == CALL_INSN)
1991 i1 = emit_call_insn_before (body, loop_start);
1992 /* Because the USAGE information potentially
1993 contains objects other than hard registers
1994 we need to copy it. */
1995 if (CALL_INSN_FUNCTION_USAGE (temp))
1996 CALL_INSN_FUNCTION_USAGE (i1)
1997 = copy_rtx (CALL_INSN_FUNCTION_USAGE (temp));
2000 i1 = emit_insn_before (body, loop_start);
2003 if (temp == fn_address_insn)
2004 fn_address_insn = i1;
2005 REG_NOTES (i1) = REG_NOTES (temp);
2011 if (m->savemode != VOIDmode)
2013 /* P sets REG to zero; but we should clear only
2014 the bits that are not covered by the mode
2016 rtx reg = m->set_dest;
2022 (GET_MODE (reg), and_optab, reg,
2023 GEN_INT ((((HOST_WIDE_INT) 1
2024 << GET_MODE_BITSIZE (m->savemode)))
2026 reg, 1, OPTAB_LIB_WIDEN);
2030 emit_move_insn (reg, tem);
2031 sequence = gen_sequence ();
2033 i1 = emit_insn_before (sequence, loop_start);
2035 else if (GET_CODE (p) == CALL_INSN)
2037 i1 = emit_call_insn_before (PATTERN (p), loop_start);
2038 /* Because the USAGE information potentially
2039 contains objects other than hard registers
2040 we need to copy it. */
2041 if (CALL_INSN_FUNCTION_USAGE (p))
2042 CALL_INSN_FUNCTION_USAGE (i1)
2043 = copy_rtx (CALL_INSN_FUNCTION_USAGE (p));
2045 else if (count == m->consec && m->move_insn_first)
2047 /* The SET_SRC might not be invariant, so we must
2048 use the REG_EQUAL note. */
2050 emit_move_insn (m->set_dest, m->set_src);
2051 temp = get_insns ();
2054 add_label_notes (m->set_src, temp);
2056 i1 = emit_insns_before (temp, loop_start);
2057 if (! find_reg_note (i1, REG_EQUAL, NULL_RTX))
2059 = gen_rtx_EXPR_LIST ((m->is_equiv ? REG_EQUIV
2061 m->set_src, REG_NOTES (i1));
2064 i1 = emit_insn_before (PATTERN (p), loop_start);
2066 if (REG_NOTES (i1) == 0)
2068 REG_NOTES (i1) = REG_NOTES (p);
2070 /* If there is a REG_EQUAL note present whose value
2071 is not loop invariant, then delete it, since it
2072 may cause problems with later optimization passes.
2073 It is possible for cse to create such notes
2074 like this as a result of record_jump_cond. */
2076 if ((temp = find_reg_note (i1, REG_EQUAL, NULL_RTX))
2077 && ! loop_invariant_p (loop, XEXP (temp, 0)))
2078 remove_note (i1, temp);
2084 if (loop_dump_stream)
2085 fprintf (loop_dump_stream, " moved to %d",
2088 /* If library call, now fix the REG_NOTES that contain
2089 insn pointers, namely REG_LIBCALL on FIRST
2090 and REG_RETVAL on I1. */
2091 if ((temp = find_reg_note (i1, REG_RETVAL, NULL_RTX)))
2093 XEXP (temp, 0) = first;
2094 temp = find_reg_note (first, REG_LIBCALL, NULL_RTX);
2095 XEXP (temp, 0) = i1;
2102 /* simplify_giv_expr expects that it can walk the insns
2103 at m->insn forwards and see this old sequence we are
2104 tossing here. delete_insn does preserve the next
2105 pointers, but when we skip over a NOTE we must fix
2106 it up. Otherwise that code walks into the non-deleted
2108 while (p && GET_CODE (p) == NOTE)
2109 p = NEXT_INSN (temp) = NEXT_INSN (p);
2112 /* The more regs we move, the less we like moving them. */
2116 /* Any other movable that loads the same register
2118 already_moved[regno] = 1;
2120 /* This reg has been moved out of one loop. */
2121 moved_once[regno] = 1;
2123 /* The reg set here is now invariant. */
2125 VARRAY_INT (set_in_loop, regno) = 0;
2129 /* Change the length-of-life info for the register
2130 to say it lives at least the full length of this loop.
2131 This will help guide optimizations in outer loops. */
2133 if (uid_luid[REGNO_FIRST_UID (regno)] > INSN_LUID (loop_start))
2134 /* This is the old insn before all the moved insns.
2135 We can't use the moved insn because it is out of range
2136 in uid_luid. Only the old insns have luids. */
2137 REGNO_FIRST_UID (regno) = INSN_UID (loop_start);
2138 if (uid_luid[REGNO_LAST_UID (regno)] < INSN_LUID (loop_end))
2139 REGNO_LAST_UID (regno) = INSN_UID (loop_end);
2141 /* Combine with this moved insn any other matching movables. */
2144 for (m1 = movables; m1; m1 = m1->next)
2149 /* Schedule the reg loaded by M1
2150 for replacement so that shares the reg of M.
2151 If the modes differ (only possible in restricted
2152 circumstances, make a SUBREG.
2154 Note this assumes that the target dependent files
2155 treat REG and SUBREG equally, including within
2156 GO_IF_LEGITIMATE_ADDRESS and in all the
2157 predicates since we never verify that replacing the
2158 original register with a SUBREG results in a
2159 recognizable insn. */
2160 if (GET_MODE (m->set_dest) == GET_MODE (m1->set_dest))
2161 reg_map[m1->regno] = m->set_dest;
2164 = gen_lowpart_common (GET_MODE (m1->set_dest),
2167 /* Get rid of the matching insn
2168 and prevent further processing of it. */
2171 /* if library call, delete all insn except last, which
2173 if ((temp = find_reg_note (m1->insn, REG_RETVAL,
2176 for (temp = XEXP (temp, 0); temp != m1->insn;
2177 temp = NEXT_INSN (temp))
2180 delete_insn (m1->insn);
2182 /* Any other movable that loads the same register
2184 already_moved[m1->regno] = 1;
2186 /* The reg merged here is now invariant,
2187 if the reg it matches is invariant. */
2189 VARRAY_INT (set_in_loop, m1->regno) = 0;
2192 else if (loop_dump_stream)
2193 fprintf (loop_dump_stream, "not desirable");
2195 else if (loop_dump_stream && !m->match)
2196 fprintf (loop_dump_stream, "not safe");
2198 if (loop_dump_stream)
2199 fprintf (loop_dump_stream, "\n");
2203 new_start = loop_start;
2205 /* Go through all the instructions in the loop, making
2206 all the register substitutions scheduled in REG_MAP. */
2207 for (p = new_start; p != loop_end; p = NEXT_INSN (p))
2208 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
2209 || GET_CODE (p) == CALL_INSN)
2211 replace_regs (PATTERN (p), reg_map, nregs, 0);
2212 replace_regs (REG_NOTES (p), reg_map, nregs, 0);
2218 free (already_moved);
2222 /* Scan X and replace the address of any MEM in it with ADDR.
2223 REG is the address that MEM should have before the replacement. */
2226 replace_call_address (x, reg, addr)
2229 register enum rtx_code code;
2231 register const char *fmt;
2235 code = GET_CODE (x);
2249 /* Short cut for very common case. */
2250 replace_call_address (XEXP (x, 1), reg, addr);
2254 /* Short cut for very common case. */
2255 replace_call_address (XEXP (x, 0), reg, addr);
2259 /* If this MEM uses a reg other than the one we expected,
2260 something is wrong. */
2261 if (XEXP (x, 0) != reg)
2270 fmt = GET_RTX_FORMAT (code);
2271 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2274 replace_call_address (XEXP (x, i), reg, addr);
2275 else if (fmt[i] == 'E')
2278 for (j = 0; j < XVECLEN (x, i); j++)
2279 replace_call_address (XVECEXP (x, i, j), reg, addr);
2285 /* Return the number of memory refs to addresses that vary
2289 count_nonfixed_reads (loop, x)
2290 const struct loop *loop;
2293 register enum rtx_code code;
2295 register const char *fmt;
2301 code = GET_CODE (x);
2315 return ((loop_invariant_p (loop, XEXP (x, 0)) != 1)
2316 + count_nonfixed_reads (loop, XEXP (x, 0)));
2323 fmt = GET_RTX_FORMAT (code);
2324 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2327 value += count_nonfixed_reads (loop, XEXP (x, i));
2331 for (j = 0; j < XVECLEN (x, i); j++)
2332 value += count_nonfixed_reads (loop, XVECEXP (x, i, j));
2340 /* P is an instruction that sets a register to the result of a ZERO_EXTEND.
2341 Replace it with an instruction to load just the low bytes
2342 if the machine supports such an instruction,
2343 and insert above LOOP_START an instruction to clear the register. */
2346 constant_high_bytes (p, loop_start)
2350 register int insn_code_number;
2352 /* Try to change (SET (REG ...) (ZERO_EXTEND (..:B ...)))
2353 to (SET (STRICT_LOW_PART (SUBREG:B (REG...))) ...). */
2358 gen_rtx_STRICT_LOW_PART
2360 gen_rtx_SUBREG (GET_MODE (XEXP (SET_SRC (PATTERN (p)), 0)),
2361 SET_DEST (PATTERN (p)), 0)),
2362 XEXP (SET_SRC (PATTERN (p)), 0));
2364 insn_code_number = recog (new, p);
2366 if (insn_code_number)
2370 /* Clear destination register before the loop. */
2371 emit_insn_before (gen_rtx_SET (VOIDmode,
2372 SET_DEST (PATTERN (p)), const0_rtx),
2375 /* Inside the loop, just load the low part. */
2381 /* Scan a loop setting the elements `cont', `vtop', `loops_enclosed',
2382 `has_call', `has_volatile', and `has_tablejump' within LOOP.
2383 Set the global variables `unknown_address_altered',
2384 `unknown_constant_address_altered', and `num_mem_sets'. Also, fill
2385 in the array `loop_mems' and the list `loop_store_mems'. */
2391 register int level = 1;
2393 struct loop_info *loop_info = LOOP_INFO (loop);
2394 rtx start = loop->start;
2395 rtx end = loop->end;
2396 /* The label after END. Jumping here is just like falling off the
2397 end of the loop. We use next_nonnote_insn instead of next_label
2398 as a hedge against the (pathological) case where some actual insn
2399 might end up between the two. */
2400 rtx exit_target = next_nonnote_insn (end);
2402 loop_info->has_indirect_jump = indirect_jump_in_function;
2403 loop_info->has_call = 0;
2404 loop_info->has_volatile = 0;
2405 loop_info->has_tablejump = 0;
2406 loop_info->has_multiple_exit_targets = 0;
2411 unknown_address_altered = 0;
2412 unknown_constant_address_altered = 0;
2413 loop_store_mems = NULL_RTX;
2414 first_loop_store_insn = NULL_RTX;
2418 for (insn = NEXT_INSN (start); insn != NEXT_INSN (end);
2419 insn = NEXT_INSN (insn))
2421 if (GET_CODE (insn) == NOTE)
2423 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
2426 /* Count number of loops contained in this one. */
2429 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END)
2438 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_CONT)
2443 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_VTOP)
2445 /* If there is a NOTE_INSN_LOOP_VTOP, then this is a for
2446 or while style loop, with a loop exit test at the
2447 start. Thus, we can assume that the loop condition
2448 was true when the loop was entered. */
2453 else if (GET_CODE (insn) == CALL_INSN)
2455 if (! CONST_CALL_P (insn))
2456 unknown_address_altered = 1;
2457 loop_info->has_call = 1;
2459 else if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN)
2461 rtx label1 = NULL_RTX;
2462 rtx label2 = NULL_RTX;
2464 if (volatile_refs_p (PATTERN (insn)))
2465 loop_info->has_volatile = 1;
2467 if (GET_CODE (insn) == JUMP_INSN
2468 && (GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC
2469 || GET_CODE (PATTERN (insn)) == ADDR_VEC))
2470 loop_info->has_tablejump = 1;
2472 note_stores (PATTERN (insn), note_addr_stored, NULL);
2473 if (! first_loop_store_insn && loop_store_mems)
2474 first_loop_store_insn = insn;
2476 if (! loop_info->has_multiple_exit_targets
2477 && GET_CODE (insn) == JUMP_INSN
2478 && GET_CODE (PATTERN (insn)) == SET
2479 && SET_DEST (PATTERN (insn)) == pc_rtx)
2481 if (GET_CODE (SET_SRC (PATTERN (insn))) == IF_THEN_ELSE)
2483 label1 = XEXP (SET_SRC (PATTERN (insn)), 1);
2484 label2 = XEXP (SET_SRC (PATTERN (insn)), 2);
2488 label1 = SET_SRC (PATTERN (insn));
2492 if (label1 && label1 != pc_rtx)
2494 if (GET_CODE (label1) != LABEL_REF)
2496 /* Something tricky. */
2497 loop_info->has_multiple_exit_targets = 1;
2500 else if (XEXP (label1, 0) != exit_target
2501 && LABEL_OUTSIDE_LOOP_P (label1))
2503 /* A jump outside the current loop. */
2504 loop_info->has_multiple_exit_targets = 1;
2514 else if (GET_CODE (insn) == RETURN)
2515 loop_info->has_multiple_exit_targets = 1;
2518 /* Now, rescan the loop, setting up the LOOP_MEMS array. */
2519 if (/* We can't tell what MEMs are aliased by what. */
2520 ! unknown_address_altered
2521 /* An exception thrown by a called function might land us
2523 && ! loop_info->has_call
2524 /* We don't want loads for MEMs moved to a location before the
2525 one at which their stack memory becomes allocated. (Note
2526 that this is not a problem for malloc, etc., since those
2527 require actual function calls. */
2528 && ! current_function_calls_alloca
2529 /* There are ways to leave the loop other than falling off the
2531 && ! loop_info->has_multiple_exit_targets)
2532 for (insn = NEXT_INSN (start); insn != NEXT_INSN (end);
2533 insn = NEXT_INSN (insn))
2534 for_each_rtx (&insn, insert_loop_mem, 0);
2537 /* LOOP->CONT_DOMINATOR is now the last label between the loop start
2538 and the continue note that is a the destination of a (cond)jump after
2539 the continue note. If there is any (cond)jump between the loop start
2540 and what we have so far as LOOP->CONT_DOMINATOR that has a
2541 target between LOOP->DOMINATOR and the continue note, move
2542 LOOP->CONT_DOMINATOR forward to that label; if a jump's
2543 destination cannot be determined, clear LOOP->CONT_DOMINATOR. */
2546 verify_dominator (loop)
2551 if (! loop->cont_dominator)
2552 /* This can happen for an empty loop, e.g. in
2553 gcc.c-torture/compile/920410-2.c */
2555 if (loop->cont_dominator == const0_rtx)
2557 loop->cont_dominator = 0;
2560 for (insn = loop->start; insn != loop->cont_dominator;
2561 insn = NEXT_INSN (insn))
2563 if (GET_CODE (insn) == JUMP_INSN
2564 && GET_CODE (PATTERN (insn)) != RETURN)
2566 rtx label = JUMP_LABEL (insn);
2569 /* If it is not a jump we can easily understand or for
2570 which we do not have jump target information in the JUMP_LABEL
2571 field (consider ADDR_VEC and ADDR_DIFF_VEC insns), then clear
2572 LOOP->CONT_DOMINATOR. */
2573 if ((! condjump_p (insn)
2574 && ! condjump_in_parallel_p (insn))
2575 || label == NULL_RTX)
2577 loop->cont_dominator = NULL_RTX;
2581 label_luid = INSN_LUID (label);
2582 if (label_luid < INSN_LUID (loop->cont)
2584 > INSN_LUID (loop->cont)))
2585 loop->cont_dominator = label;
2590 /* Scan the function looking for loops. Record the start and end of each loop.
2591 Also mark as invalid loops any loops that contain a setjmp or are branched
2592 to from outside the loop. */
2595 find_and_verify_loops (f, loops)
2597 struct loops *loops;
2602 struct loop *current_loop;
2603 struct loop *next_loop;
2606 num_loops = loops->num;
2608 compute_luids (f, NULL_RTX, 0);
2610 /* If there are jumps to undefined labels,
2611 treat them as jumps out of any/all loops.
2612 This also avoids writing past end of tables when there are no loops. */
2615 /* Find boundaries of loops, mark which loops are contained within
2616 loops, and invalidate loops that have setjmp. */
2619 current_loop = NULL;
2620 for (insn = f; insn; insn = NEXT_INSN (insn))
2622 if (GET_CODE (insn) == NOTE)
2623 switch (NOTE_LINE_NUMBER (insn))
2625 case NOTE_INSN_LOOP_BEG:
2626 next_loop = loops->array + num_loops;
2627 next_loop->num = num_loops;
2629 next_loop->start = insn;
2630 next_loop->outer = current_loop;
2631 current_loop = next_loop;
2634 case NOTE_INSN_SETJMP:
2635 /* In this case, we must invalidate our current loop and any
2637 for (loop = current_loop; loop; loop = loop->outer)
2640 if (loop_dump_stream)
2641 fprintf (loop_dump_stream,
2642 "\nLoop at %d ignored due to setjmp.\n",
2643 INSN_UID (loop->start));
2647 case NOTE_INSN_LOOP_CONT:
2648 current_loop->cont = insn;
2650 case NOTE_INSN_LOOP_END:
2654 current_loop->end = insn;
2655 verify_dominator (current_loop);
2656 current_loop = current_loop->outer;
2662 /* If for any loop, this is a jump insn between the NOTE_INSN_LOOP_CONT
2663 and NOTE_INSN_LOOP_END notes, update loop->dominator. */
2664 else if (GET_CODE (insn) == JUMP_INSN
2665 && GET_CODE (PATTERN (insn)) != RETURN
2668 rtx label = JUMP_LABEL (insn);
2670 if (! condjump_p (insn) && ! condjump_in_parallel_p (insn))
2673 loop = current_loop;
2676 /* First see if we care about this loop. */
2677 if (loop->cont && loop->cont_dominator != const0_rtx)
2679 /* If the jump destination is not known, invalidate
2680 loop->const_dominator. */
2682 loop->cont_dominator = const0_rtx;
2684 /* Check if the destination is between loop start and
2686 if ((INSN_LUID (label)
2687 < INSN_LUID (loop->cont))
2688 && (INSN_LUID (label)
2689 > INSN_LUID (loop->start))
2690 /* And if there is no later destination already
2692 && (! loop->cont_dominator
2693 || (INSN_LUID (label)
2694 > INSN_LUID (loop->cont_dominator))))
2695 loop->cont_dominator = label;
2702 /* Note that this will mark the NOTE_INSN_LOOP_END note as being in the
2703 enclosing loop, but this doesn't matter. */
2704 uid_loop[INSN_UID (insn)] = current_loop;
2707 /* Any loop containing a label used in an initializer must be invalidated,
2708 because it can be jumped into from anywhere. */
2710 for (label = forced_labels; label; label = XEXP (label, 1))
2712 for (loop = uid_loop[INSN_UID (XEXP (label, 0))];
2713 loop; loop = loop->outer)
2717 /* Any loop containing a label used for an exception handler must be
2718 invalidated, because it can be jumped into from anywhere. */
2720 for (label = exception_handler_labels; label; label = XEXP (label, 1))
2722 for (loop = uid_loop[INSN_UID (XEXP (label, 0))];
2723 loop; loop = loop->outer)
2727 /* Now scan all insn's in the function. If any JUMP_INSN branches into a
2728 loop that it is not contained within, that loop is marked invalid.
2729 If any INSN or CALL_INSN uses a label's address, then the loop containing
2730 that label is marked invalid, because it could be jumped into from
2733 Also look for blocks of code ending in an unconditional branch that
2734 exits the loop. If such a block is surrounded by a conditional
2735 branch around the block, move the block elsewhere (see below) and
2736 invert the jump to point to the code block. This may eliminate a
2737 label in our loop and will simplify processing by both us and a
2738 possible second cse pass. */
2740 for (insn = f; insn; insn = NEXT_INSN (insn))
2741 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
2743 struct loop *this_loop = uid_loop[INSN_UID (insn)];
2745 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
2747 rtx note = find_reg_note (insn, REG_LABEL, NULL_RTX);
2750 for (loop = uid_loop[INSN_UID (XEXP (note, 0))];
2751 loop; loop = loop->outer)
2756 if (GET_CODE (insn) != JUMP_INSN)
2759 mark_loop_jump (PATTERN (insn), this_loop);
2761 /* See if this is an unconditional branch outside the loop. */
2763 && (GET_CODE (PATTERN (insn)) == RETURN
2764 || (simplejump_p (insn)
2765 && (uid_loop[INSN_UID (JUMP_LABEL (insn))]
2767 && get_max_uid () < max_uid_for_loop)
2770 rtx our_next = next_real_insn (insn);
2771 rtx last_insn_to_move = NEXT_INSN (insn);
2772 struct loop *dest_loop;
2773 struct loop *outer_loop = NULL;
2775 /* Go backwards until we reach the start of the loop, a label,
2777 for (p = PREV_INSN (insn);
2778 GET_CODE (p) != CODE_LABEL
2779 && ! (GET_CODE (p) == NOTE
2780 && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
2781 && GET_CODE (p) != JUMP_INSN;
2785 /* Check for the case where we have a jump to an inner nested
2786 loop, and do not perform the optimization in that case. */
2788 if (JUMP_LABEL (insn))
2790 dest_loop = uid_loop[INSN_UID (JUMP_LABEL (insn))];
2793 for (outer_loop = dest_loop; outer_loop;
2794 outer_loop = outer_loop->outer)
2795 if (outer_loop == this_loop)
2800 /* Make sure that the target of P is within the current loop. */
2802 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p)
2803 && uid_loop[INSN_UID (JUMP_LABEL (p))] != this_loop)
2804 outer_loop = this_loop;
2806 /* If we stopped on a JUMP_INSN to the next insn after INSN,
2807 we have a block of code to try to move.
2809 We look backward and then forward from the target of INSN
2810 to find a BARRIER at the same loop depth as the target.
2811 If we find such a BARRIER, we make a new label for the start
2812 of the block, invert the jump in P and point it to that label,
2813 and move the block of code to the spot we found. */
2816 && GET_CODE (p) == JUMP_INSN
2817 && JUMP_LABEL (p) != 0
2818 /* Just ignore jumps to labels that were never emitted.
2819 These always indicate compilation errors. */
2820 && INSN_UID (JUMP_LABEL (p)) != 0
2822 && ! simplejump_p (p)
2823 && next_real_insn (JUMP_LABEL (p)) == our_next
2824 /* If it's not safe to move the sequence, then we
2826 && insns_safe_to_move_p (p, NEXT_INSN (insn),
2827 &last_insn_to_move))
2830 = JUMP_LABEL (insn) ? JUMP_LABEL (insn) : get_last_insn ();
2831 struct loop *target_loop = uid_loop[INSN_UID (target)];
2834 for (loc = target; loc; loc = PREV_INSN (loc))
2835 if (GET_CODE (loc) == BARRIER
2836 /* Don't move things inside a tablejump. */
2837 && ((loc2 = next_nonnote_insn (loc)) == 0
2838 || GET_CODE (loc2) != CODE_LABEL
2839 || (loc2 = next_nonnote_insn (loc2)) == 0
2840 || GET_CODE (loc2) != JUMP_INSN
2841 || (GET_CODE (PATTERN (loc2)) != ADDR_VEC
2842 && GET_CODE (PATTERN (loc2)) != ADDR_DIFF_VEC))
2843 && uid_loop[INSN_UID (loc)] == target_loop)
2847 for (loc = target; loc; loc = NEXT_INSN (loc))
2848 if (GET_CODE (loc) == BARRIER
2849 /* Don't move things inside a tablejump. */
2850 && ((loc2 = next_nonnote_insn (loc)) == 0
2851 || GET_CODE (loc2) != CODE_LABEL
2852 || (loc2 = next_nonnote_insn (loc2)) == 0
2853 || GET_CODE (loc2) != JUMP_INSN
2854 || (GET_CODE (PATTERN (loc2)) != ADDR_VEC
2855 && GET_CODE (PATTERN (loc2)) != ADDR_DIFF_VEC))
2856 && uid_loop[INSN_UID (loc)] == target_loop)
2861 rtx cond_label = JUMP_LABEL (p);
2862 rtx new_label = get_label_after (p);
2864 /* Ensure our label doesn't go away. */
2865 LABEL_NUSES (cond_label)++;
2867 /* Verify that uid_loop is large enough and that
2869 if (invert_jump (p, new_label))
2873 /* If no suitable BARRIER was found, create a suitable
2874 one before TARGET. Since TARGET is a fall through
2875 path, we'll need to insert an jump around our block
2876 and a add a BARRIER before TARGET.
2878 This creates an extra unconditional jump outside
2879 the loop. However, the benefits of removing rarely
2880 executed instructions from inside the loop usually
2881 outweighs the cost of the extra unconditional jump
2882 outside the loop. */
2887 temp = gen_jump (JUMP_LABEL (insn));
2888 temp = emit_jump_insn_before (temp, target);
2889 JUMP_LABEL (temp) = JUMP_LABEL (insn);
2890 LABEL_NUSES (JUMP_LABEL (insn))++;
2891 loc = emit_barrier_before (target);
2894 /* Include the BARRIER after INSN and copy the
2896 new_label = squeeze_notes (new_label,
2898 reorder_insns (new_label, last_insn_to_move, loc);
2900 /* All those insns are now in TARGET_LOOP. */
2902 q != NEXT_INSN (last_insn_to_move);
2904 uid_loop[INSN_UID (q)] = target_loop;
2906 /* The label jumped to by INSN is no longer a loop exit.
2907 Unless INSN does not have a label (e.g., it is a
2908 RETURN insn), search loop->exit_labels to find
2909 its label_ref, and remove it. Also turn off
2910 LABEL_OUTSIDE_LOOP_P bit. */
2911 if (JUMP_LABEL (insn))
2914 r = this_loop->exit_labels;
2915 r; q = r, r = LABEL_NEXTREF (r))
2916 if (XEXP (r, 0) == JUMP_LABEL (insn))
2918 LABEL_OUTSIDE_LOOP_P (r) = 0;
2920 LABEL_NEXTREF (q) = LABEL_NEXTREF (r);
2922 this_loop->exit_labels = LABEL_NEXTREF (r);
2926 for (loop = this_loop; loop && loop != target_loop;
2930 /* If we didn't find it, then something is
2936 /* P is now a jump outside the loop, so it must be put
2937 in loop->exit_labels, and marked as such.
2938 The easiest way to do this is to just call
2939 mark_loop_jump again for P. */
2940 mark_loop_jump (PATTERN (p), this_loop);
2942 /* If INSN now jumps to the insn after it,
2944 if (JUMP_LABEL (insn) != 0
2945 && (next_real_insn (JUMP_LABEL (insn))
2946 == next_real_insn (insn)))
2950 /* Continue the loop after where the conditional
2951 branch used to jump, since the only branch insn
2952 in the block (if it still remains) is an inter-loop
2953 branch and hence needs no processing. */
2954 insn = NEXT_INSN (cond_label);
2956 if (--LABEL_NUSES (cond_label) == 0)
2957 delete_insn (cond_label);
2959 /* This loop will be continued with NEXT_INSN (insn). */
2960 insn = PREV_INSN (insn);
2967 /* If any label in X jumps to a loop different from LOOP_NUM and any of the
2968 loops it is contained in, mark the target loop invalid.
2970 For speed, we assume that X is part of a pattern of a JUMP_INSN. */
2973 mark_loop_jump (x, loop)
2977 struct loop *dest_loop;
2978 struct loop *outer_loop;
2981 switch (GET_CODE (x))
2994 /* There could be a label reference in here. */
2995 mark_loop_jump (XEXP (x, 0), loop);
3001 mark_loop_jump (XEXP (x, 0), loop);
3002 mark_loop_jump (XEXP (x, 1), loop);
3006 /* This may refer to a LABEL_REF or SYMBOL_REF. */
3007 mark_loop_jump (XEXP (x, 1), loop);
3012 mark_loop_jump (XEXP (x, 0), loop);
3016 dest_loop = uid_loop[INSN_UID (XEXP (x, 0))];
3018 /* Link together all labels that branch outside the loop. This
3019 is used by final_[bg]iv_value and the loop unrolling code. Also
3020 mark this LABEL_REF so we know that this branch should predict
3023 /* A check to make sure the label is not in an inner nested loop,
3024 since this does not count as a loop exit. */
3027 for (outer_loop = dest_loop; outer_loop;
3028 outer_loop = outer_loop->outer)
3029 if (outer_loop == loop)
3035 if (loop && ! outer_loop)
3037 LABEL_OUTSIDE_LOOP_P (x) = 1;
3038 LABEL_NEXTREF (x) = loop->exit_labels;
3039 loop->exit_labels = x;
3041 for (outer_loop = loop;
3042 outer_loop && outer_loop != dest_loop;
3043 outer_loop = outer_loop->outer)
3044 outer_loop->exit_count++;
3047 /* If this is inside a loop, but not in the current loop or one enclosed
3048 by it, it invalidates at least one loop. */
3053 /* We must invalidate every nested loop containing the target of this
3054 label, except those that also contain the jump insn. */
3056 for (; dest_loop; dest_loop = dest_loop->outer)
3058 /* Stop when we reach a loop that also contains the jump insn. */
3059 for (outer_loop = loop; outer_loop; outer_loop = outer_loop->outer)
3060 if (dest_loop == outer_loop)
3063 /* If we get here, we know we need to invalidate a loop. */
3064 if (loop_dump_stream && ! dest_loop->invalid)
3065 fprintf (loop_dump_stream,
3066 "\nLoop at %d ignored due to multiple entry points.\n",
3067 INSN_UID (dest_loop->start));
3069 dest_loop->invalid = 1;
3074 /* If this is not setting pc, ignore. */
3075 if (SET_DEST (x) == pc_rtx)
3076 mark_loop_jump (SET_SRC (x), loop);
3080 mark_loop_jump (XEXP (x, 1), loop);
3081 mark_loop_jump (XEXP (x, 2), loop);
3086 for (i = 0; i < XVECLEN (x, 0); i++)
3087 mark_loop_jump (XVECEXP (x, 0, i), loop);
3091 for (i = 0; i < XVECLEN (x, 1); i++)
3092 mark_loop_jump (XVECEXP (x, 1, i), loop);
3096 /* Strictly speaking this is not a jump into the loop, only a possible
3097 jump out of the loop. However, we have no way to link the destination
3098 of this jump onto the list of exit labels. To be safe we mark this
3099 loop and any containing loops as invalid. */
3102 for (outer_loop = loop; outer_loop; outer_loop = outer_loop->outer)
3104 if (loop_dump_stream && ! outer_loop->invalid)
3105 fprintf (loop_dump_stream,
3106 "\nLoop at %d ignored due to unknown exit jump.\n",
3107 INSN_UID (outer_loop->start));
3108 outer_loop->invalid = 1;
3115 /* Return nonzero if there is a label in the range from
3116 insn INSN to and including the insn whose luid is END
3117 INSN must have an assigned luid (i.e., it must not have
3118 been previously created by loop.c). */
3121 labels_in_range_p (insn, end)
3125 while (insn && INSN_LUID (insn) <= end)
3127 if (GET_CODE (insn) == CODE_LABEL)
3129 insn = NEXT_INSN (insn);
3135 /* Record that a memory reference X is being set. */
3138 note_addr_stored (x, y, data)
3140 rtx y ATTRIBUTE_UNUSED;
3141 void *data ATTRIBUTE_UNUSED;
3143 if (x == 0 || GET_CODE (x) != MEM)
3146 /* Count number of memory writes.
3147 This affects heuristics in strength_reduce. */
3150 /* BLKmode MEM means all memory is clobbered. */
3151 if (GET_MODE (x) == BLKmode)
3153 if (RTX_UNCHANGING_P (x))
3154 unknown_constant_address_altered = 1;
3156 unknown_address_altered = 1;
3161 loop_store_mems = gen_rtx_EXPR_LIST (VOIDmode, x, loop_store_mems);
3164 /* X is a value modified by an INSN that references a biv inside a loop
3165 exit test (ie, X is somehow related to the value of the biv). If X
3166 is a pseudo that is used more than once, then the biv is (effectively)
3167 used more than once. DATA is really an `int *', and is set if the
3168 biv is used more than once. */
3171 note_set_pseudo_multiple_uses (x, y, data)
3173 rtx y ATTRIBUTE_UNUSED;
3179 while (GET_CODE (x) == STRICT_LOW_PART
3180 || GET_CODE (x) == SIGN_EXTRACT
3181 || GET_CODE (x) == ZERO_EXTRACT
3182 || GET_CODE (x) == SUBREG)
3185 if (GET_CODE (x) != REG || REGNO (x) < FIRST_PSEUDO_REGISTER)
3188 /* If we do not have usage information, or if we know the register
3189 is used more than once, note that fact for check_dbra_loop. */
3190 if (REGNO (x) >= max_reg_before_loop
3191 || ! VARRAY_RTX (reg_single_usage, REGNO (x))
3192 || VARRAY_RTX (reg_single_usage, REGNO (x)) == const0_rtx)
3193 *((int *) data) = 1;
3196 /* Return nonzero if the rtx X is invariant over the current loop.
3198 The value is 2 if we refer to something only conditionally invariant.
3200 If `unknown_address_altered' is nonzero, no memory ref is invariant.
3201 Otherwise, a memory ref is invariant if it does not conflict with
3202 anything stored in `loop_store_mems'. */
3205 loop_invariant_p (loop, x)
3206 const struct loop *loop;
3210 register enum rtx_code code;
3211 register const char *fmt;
3212 int conditional = 0;
3217 code = GET_CODE (x);
3227 /* A LABEL_REF is normally invariant, however, if we are unrolling
3228 loops, and this label is inside the loop, then it isn't invariant.
3229 This is because each unrolled copy of the loop body will have
3230 a copy of this label. If this was invariant, then an insn loading
3231 the address of this label into a register might get moved outside
3232 the loop, and then each loop body would end up using the same label.
3234 We don't know the loop bounds here though, so just fail for all
3236 if (flag_unroll_loops)
3243 case UNSPEC_VOLATILE:
3247 /* We used to check RTX_UNCHANGING_P (x) here, but that is invalid
3248 since the reg might be set by initialization within the loop. */
3250 if ((x == frame_pointer_rtx || x == hard_frame_pointer_rtx
3251 || x == arg_pointer_rtx)
3252 && ! current_function_has_nonlocal_goto)
3255 if (LOOP_INFO (loop)->has_call
3256 && REGNO (x) < FIRST_PSEUDO_REGISTER && call_used_regs[REGNO (x)])
3259 if (VARRAY_INT (set_in_loop, REGNO (x)) < 0)
3262 return VARRAY_INT (set_in_loop, REGNO (x)) == 0;
3265 /* Volatile memory references must be rejected. Do this before
3266 checking for read-only items, so that volatile read-only items
3267 will be rejected also. */
3268 if (MEM_VOLATILE_P (x))
3271 /* If we had a subroutine call, any location in memory could
3272 have been clobbered. We used to test here for volatile and
3273 readonly, but true_dependence knows how to do that better
3275 if (RTX_UNCHANGING_P (x)
3276 ? unknown_constant_address_altered : unknown_address_altered)
3279 /* See if there is any dependence between a store and this load. */
3280 mem_list_entry = loop_store_mems;
3281 while (mem_list_entry)
3283 if (true_dependence (XEXP (mem_list_entry, 0), VOIDmode,
3287 mem_list_entry = XEXP (mem_list_entry, 1);
3290 /* It's not invalidated by a store in memory
3291 but we must still verify the address is invariant. */
3295 /* Don't mess with insns declared volatile. */
3296 if (MEM_VOLATILE_P (x))
3304 fmt = GET_RTX_FORMAT (code);
3305 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3309 int tem = loop_invariant_p (loop, XEXP (x, i));
3315 else if (fmt[i] == 'E')
3318 for (j = 0; j < XVECLEN (x, i); j++)
3320 int tem = loop_invariant_p (loop, XVECEXP (x, i, j));
3330 return 1 + conditional;
3334 /* Return nonzero if all the insns in the loop that set REG
3335 are INSN and the immediately following insns,
3336 and if each of those insns sets REG in an invariant way
3337 (not counting uses of REG in them).
3339 The value is 2 if some of these insns are only conditionally invariant.
3341 We assume that INSN itself is the first set of REG
3342 and that its source is invariant. */
3345 consec_sets_invariant_p (loop, reg, n_sets, insn)
3346 const struct loop *loop;
3350 register rtx p = insn;
3351 register int regno = REGNO (reg);
3353 /* Number of sets we have to insist on finding after INSN. */
3354 int count = n_sets - 1;
3355 int old = VARRAY_INT (set_in_loop, regno);
3359 /* If N_SETS hit the limit, we can't rely on its value. */
3363 VARRAY_INT (set_in_loop, regno) = 0;
3367 register enum rtx_code code;
3371 code = GET_CODE (p);
3373 /* If library call, skip to end of it. */
3374 if (code == INSN && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
3379 && (set = single_set (p))
3380 && GET_CODE (SET_DEST (set)) == REG
3381 && REGNO (SET_DEST (set)) == regno)
3383 this = loop_invariant_p (loop, SET_SRC (set));
3386 else if ((temp = find_reg_note (p, REG_EQUAL, NULL_RTX)))
3388 /* If this is a libcall, then any invariant REG_EQUAL note is OK.
3389 If this is an ordinary insn, then only CONSTANT_P REG_EQUAL
3391 this = (CONSTANT_P (XEXP (temp, 0))
3392 || (find_reg_note (p, REG_RETVAL, NULL_RTX)
3393 && loop_invariant_p (loop, XEXP (temp, 0))));
3400 else if (code != NOTE)
3402 VARRAY_INT (set_in_loop, regno) = old;
3407 VARRAY_INT (set_in_loop, regno) = old;
3408 /* If loop_invariant_p ever returned 2, we return 2. */
3409 return 1 + (value & 2);
3413 /* I don't think this condition is sufficient to allow INSN
3414 to be moved, so we no longer test it. */
3416 /* Return 1 if all insns in the basic block of INSN and following INSN
3417 that set REG are invariant according to TABLE. */
3420 all_sets_invariant_p (reg, insn, table)
3424 register rtx p = insn;
3425 register int regno = REGNO (reg);
3429 register enum rtx_code code;
3431 code = GET_CODE (p);
3432 if (code == CODE_LABEL || code == JUMP_INSN)
3434 if (code == INSN && GET_CODE (PATTERN (p)) == SET
3435 && GET_CODE (SET_DEST (PATTERN (p))) == REG
3436 && REGNO (SET_DEST (PATTERN (p))) == regno)
3438 if (! loop_invariant_p (loop, SET_SRC (PATTERN (p)), table))
3445 /* Look at all uses (not sets) of registers in X. For each, if it is
3446 the single use, set USAGE[REGNO] to INSN; if there was a previous use in
3447 a different insn, set USAGE[REGNO] to const0_rtx. */
3450 find_single_use_in_loop (insn, x, usage)
3455 enum rtx_code code = GET_CODE (x);
3456 const char *fmt = GET_RTX_FORMAT (code);
3460 VARRAY_RTX (usage, REGNO (x))
3461 = (VARRAY_RTX (usage, REGNO (x)) != 0
3462 && VARRAY_RTX (usage, REGNO (x)) != insn)
3463 ? const0_rtx : insn;
3465 else if (code == SET)
3467 /* Don't count SET_DEST if it is a REG; otherwise count things
3468 in SET_DEST because if a register is partially modified, it won't
3469 show up as a potential movable so we don't care how USAGE is set
3471 if (GET_CODE (SET_DEST (x)) != REG)
3472 find_single_use_in_loop (insn, SET_DEST (x), usage);
3473 find_single_use_in_loop (insn, SET_SRC (x), usage);
3476 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3478 if (fmt[i] == 'e' && XEXP (x, i) != 0)
3479 find_single_use_in_loop (insn, XEXP (x, i), usage);
3480 else if (fmt[i] == 'E')
3481 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3482 find_single_use_in_loop (insn, XVECEXP (x, i, j), usage);
3486 /* Count and record any set in X which is contained in INSN. Update
3487 MAY_NOT_MOVE and LAST_SET for any register set in X. */
3490 count_one_set (insn, x, may_not_move, last_set)
3492 varray_type may_not_move;
3495 if (GET_CODE (x) == CLOBBER && GET_CODE (XEXP (x, 0)) == REG)
3496 /* Don't move a reg that has an explicit clobber.
3497 It's not worth the pain to try to do it correctly. */
3498 VARRAY_CHAR (may_not_move, REGNO (XEXP (x, 0))) = 1;
3500 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
3502 rtx dest = SET_DEST (x);
3503 while (GET_CODE (dest) == SUBREG
3504 || GET_CODE (dest) == ZERO_EXTRACT
3505 || GET_CODE (dest) == SIGN_EXTRACT
3506 || GET_CODE (dest) == STRICT_LOW_PART)
3507 dest = XEXP (dest, 0);
3508 if (GET_CODE (dest) == REG)
3510 register int regno = REGNO (dest);
3511 /* If this is the first setting of this reg
3512 in current basic block, and it was set before,
3513 it must be set in two basic blocks, so it cannot
3514 be moved out of the loop. */
3515 if (VARRAY_INT (set_in_loop, regno) > 0
3516 && last_set[regno] == 0)
3517 VARRAY_CHAR (may_not_move, regno) = 1;
3518 /* If this is not first setting in current basic block,
3519 see if reg was used in between previous one and this.
3520 If so, neither one can be moved. */
3521 if (last_set[regno] != 0
3522 && reg_used_between_p (dest, last_set[regno], insn))
3523 VARRAY_CHAR (may_not_move, regno) = 1;
3524 if (VARRAY_INT (set_in_loop, regno) < 127)
3525 ++VARRAY_INT (set_in_loop, regno);
3526 last_set[regno] = insn;
3531 /* Increment SET_IN_LOOP at the index of each register
3532 that is modified by an insn between FROM and TO.
3533 If the value of an element of SET_IN_LOOP becomes 127 or more,
3534 stop incrementing it, to avoid overflow.
3536 Store in SINGLE_USAGE[I] the single insn in which register I is
3537 used, if it is only used once. Otherwise, it is set to 0 (for no
3538 uses) or const0_rtx for more than one use. This parameter may be zero,
3539 in which case this processing is not done.
3541 Store in *COUNT_PTR the number of actual instruction
3542 in the loop. We use this to decide what is worth moving out. */
3544 /* last_set[n] is nonzero iff reg n has been set in the current basic block.
3545 In that case, it is the insn that last set reg n. */
3548 count_loop_regs_set (from, to, may_not_move, single_usage, count_ptr, nregs)
3549 register rtx from, to;
3550 varray_type may_not_move;
3551 varray_type single_usage;
3555 register rtx *last_set = (rtx *) xcalloc (nregs, sizeof (rtx));
3557 register int count = 0;
3559 for (insn = from; insn != to; insn = NEXT_INSN (insn))
3561 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
3565 /* Record registers that have exactly one use. */
3566 find_single_use_in_loop (insn, PATTERN (insn), single_usage);
3568 /* Include uses in REG_EQUAL notes. */
3569 if (REG_NOTES (insn))
3570 find_single_use_in_loop (insn, REG_NOTES (insn), single_usage);
3572 if (GET_CODE (PATTERN (insn)) == SET
3573 || GET_CODE (PATTERN (insn)) == CLOBBER)
3574 count_one_set (insn, PATTERN (insn), may_not_move, last_set);
3575 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
3578 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
3579 count_one_set (insn, XVECEXP (PATTERN (insn), 0, i),
3580 may_not_move, last_set);
3584 if (GET_CODE (insn) == CODE_LABEL || GET_CODE (insn) == JUMP_INSN)
3585 bzero ((char *) last_set, nregs * sizeof (rtx));
3593 /* Given a loop that is bounded by LOOP->START and LOOP->END and that
3594 is entered at LOOP->SCAN_START, return 1 if the register set in SET
3595 contained in insn INSN is used by any insn that precedes INSN in
3596 cyclic order starting from the loop entry point.
3598 We don't want to use INSN_LUID here because if we restrict INSN to those
3599 that have a valid INSN_LUID, it means we cannot move an invariant out
3600 from an inner loop past two loops. */
3603 loop_reg_used_before_p (loop, set, insn)
3604 const struct loop *loop;
3607 rtx reg = SET_DEST (set);
3610 /* Scan forward checking for register usage. If we hit INSN, we
3611 are done. Otherwise, if we hit LOOP->END, wrap around to LOOP->START. */
3612 for (p = loop->scan_start; p != insn; p = NEXT_INSN (p))
3614 if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
3615 && reg_overlap_mentioned_p (reg, PATTERN (p)))
3625 /* A "basic induction variable" or biv is a pseudo reg that is set
3626 (within this loop) only by incrementing or decrementing it. */
3627 /* A "general induction variable" or giv is a pseudo reg whose
3628 value is a linear function of a biv. */
3630 /* Bivs are recognized by `basic_induction_var';
3631 Givs by `general_induction_var'. */
3633 /* Indexed by register number, indicates whether or not register is an
3634 induction variable, and if so what type. */
3636 varray_type reg_iv_type;
3638 /* Indexed by register number, contains pointer to `struct induction'
3639 if register is an induction variable. This holds general info for
3640 all induction variables. */
3642 varray_type reg_iv_info;
3644 /* Indexed by register number, contains pointer to `struct iv_class'
3645 if register is a basic induction variable. This holds info describing
3646 the class (a related group) of induction variables that the biv belongs
3649 struct iv_class **reg_biv_class;
3651 /* The head of a list which links together (via the next field)
3652 every iv class for the current loop. */
3654 struct iv_class *loop_iv_list;
3656 /* Givs made from biv increments are always splittable for loop unrolling.
3657 Since there is no regscan info for them, we have to keep track of them
3659 int first_increment_giv, last_increment_giv;
3661 /* Communication with routines called via `note_stores'. */
3663 static rtx note_insn;
3665 /* Dummy register to have non-zero DEST_REG for DEST_ADDR type givs. */
3667 static rtx addr_placeholder;
3669 /* ??? Unfinished optimizations, and possible future optimizations,
3670 for the strength reduction code. */
3672 /* ??? The interaction of biv elimination, and recognition of 'constant'
3673 bivs, may cause problems. */
3675 /* ??? Add heuristics so that DEST_ADDR strength reduction does not cause
3676 performance problems.
3678 Perhaps don't eliminate things that can be combined with an addressing
3679 mode. Find all givs that have the same biv, mult_val, and add_val;
3680 then for each giv, check to see if its only use dies in a following
3681 memory address. If so, generate a new memory address and check to see
3682 if it is valid. If it is valid, then store the modified memory address,
3683 otherwise, mark the giv as not done so that it will get its own iv. */
3685 /* ??? Could try to optimize branches when it is known that a biv is always
3688 /* ??? When replace a biv in a compare insn, we should replace with closest
3689 giv so that an optimized branch can still be recognized by the combiner,
3690 e.g. the VAX acb insn. */
3692 /* ??? Many of the checks involving uid_luid could be simplified if regscan
3693 was rerun in loop_optimize whenever a register was added or moved.
3694 Also, some of the optimizations could be a little less conservative. */
3696 /* Perform strength reduction and induction variable elimination.
3698 Pseudo registers created during this function will be beyond the last
3699 valid index in several tables including n_times_set and regno_last_uid.
3700 This does not cause a problem here, because the added registers cannot be
3701 givs outside of their loop, and hence will never be reconsidered.
3702 But scan_loop must check regnos to make sure they are in bounds. */
3705 strength_reduce (loop, insn_count, unroll_p, bct_p)
3708 int unroll_p, bct_p ATTRIBUTE_UNUSED;
3716 /* This is 1 if current insn is not executed at least once for every loop
3718 int not_every_iteration = 0;
3719 /* This is 1 if current insn may be executed more than once for every
3721 int maybe_multiple = 0;
3722 /* This is 1 if we have past a branch back to the top of the loop
3723 (aka a loop latch). */
3724 int past_loop_latch = 0;
3725 /* Temporary list pointers for traversing loop_iv_list. */
3726 struct iv_class *bl, **backbl;
3727 struct loop_info *loop_info = LOOP_INFO (loop);
3728 /* Ratio of extra register life span we can justify
3729 for saving an instruction. More if loop doesn't call subroutines
3730 since in that case saving an insn makes more difference
3731 and more registers are available. */
3732 /* ??? could set this to last value of threshold in move_movables */
3733 int threshold = (loop_info->has_call ? 1 : 2) * (3 + n_non_fixed_regs);
3734 /* Map of pseudo-register replacements. */
3735 rtx *reg_map = NULL;
3739 rtx end_insert_before;
3741 int n_extra_increment;
3742 int unrolled_insn_copies = 0;
3743 rtx loop_start = loop->start;
3744 rtx loop_end = loop->end;
3745 rtx loop_scan_start = loop->scan_start;
3746 rtx loop_top = loop->top;
3747 rtx loop_cont = loop->cont;
3749 /* If loop_scan_start points to the loop exit test, we have to be wary of
3750 subversive use of gotos inside expression statements. */
3751 if (prev_nonnote_insn (loop_scan_start) != prev_nonnote_insn (loop_start))
3752 maybe_multiple = back_branch_in_range_p (loop, loop_scan_start);
3754 VARRAY_INT_INIT (reg_iv_type, max_reg_before_loop, "reg_iv_type");
3755 VARRAY_GENERIC_PTR_INIT (reg_iv_info, max_reg_before_loop, "reg_iv_info");
3756 reg_biv_class = (struct iv_class **)
3757 xcalloc (max_reg_before_loop, sizeof (struct iv_class *));
3760 addr_placeholder = gen_reg_rtx (Pmode);
3762 /* Save insn immediately after the loop_end. Insns inserted after loop_end
3763 must be put before this insn, so that they will appear in the right
3764 order (i.e. loop order).
3766 If loop_end is the end of the current function, then emit a
3767 NOTE_INSN_DELETED after loop_end and set end_insert_before to the
3769 if (NEXT_INSN (loop_end) != 0)
3770 end_insert_before = NEXT_INSN (loop_end);
3772 end_insert_before = emit_note_after (NOTE_INSN_DELETED, loop_end);
3774 /* Scan through loop to find all possible bivs. */
3776 for (p = next_insn_in_loop (loop, loop_scan_start);
3778 p = next_insn_in_loop (loop, p))
3780 if (GET_CODE (p) == INSN
3781 && (set = single_set (p))
3782 && GET_CODE (SET_DEST (set)) == REG)
3784 dest_reg = SET_DEST (set);
3785 if (REGNO (dest_reg) < max_reg_before_loop
3786 && REGNO (dest_reg) >= FIRST_PSEUDO_REGISTER
3787 && REG_IV_TYPE (REGNO (dest_reg)) != NOT_BASIC_INDUCT)
3789 int multi_insn_incr = 0;
3791 if (basic_induction_var (loop, SET_SRC (set),
3792 GET_MODE (SET_SRC (set)),
3793 dest_reg, p, &inc_val, &mult_val,
3794 &location, &multi_insn_incr))
3796 /* It is a possible basic induction variable.
3797 Create and initialize an induction structure for it. */
3800 = (struct induction *) alloca (sizeof (struct induction));
3802 record_biv (v, p, dest_reg, inc_val, mult_val, location,
3803 not_every_iteration, maybe_multiple,
3805 REG_IV_TYPE (REGNO (dest_reg)) = BASIC_INDUCT;
3807 else if (REGNO (dest_reg) < max_reg_before_loop)
3808 REG_IV_TYPE (REGNO (dest_reg)) = NOT_BASIC_INDUCT;
3812 /* Past CODE_LABEL, we get to insns that may be executed multiple
3813 times. The only way we can be sure that they can't is if every
3814 jump insn between here and the end of the loop either
3815 returns, exits the loop, is a jump to a location that is still
3816 behind the label, or is a jump to the loop start. */
3818 if (GET_CODE (p) == CODE_LABEL)
3826 insn = NEXT_INSN (insn);
3827 if (insn == loop_scan_start)
3829 if (insn == loop_end)
3835 if (insn == loop_scan_start)
3839 if (GET_CODE (insn) == JUMP_INSN
3840 && GET_CODE (PATTERN (insn)) != RETURN
3841 && (! condjump_p (insn)
3842 || (JUMP_LABEL (insn) != 0
3843 && JUMP_LABEL (insn) != loop_scan_start
3844 && ! loop_insn_first_p (p, JUMP_LABEL (insn)))))
3852 /* Past a jump, we get to insns for which we can't count
3853 on whether they will be executed during each iteration. */
3854 /* This code appears twice in strength_reduce. There is also similar
3855 code in scan_loop. */
3856 if (GET_CODE (p) == JUMP_INSN
3857 /* If we enter the loop in the middle, and scan around to the
3858 beginning, don't set not_every_iteration for that.
3859 This can be any kind of jump, since we want to know if insns
3860 will be executed if the loop is executed. */
3861 && ! (JUMP_LABEL (p) == loop_top
3862 && ((NEXT_INSN (NEXT_INSN (p)) == loop_end && simplejump_p (p))
3863 || (NEXT_INSN (p) == loop_end && condjump_p (p)))))
3867 /* If this is a jump outside the loop, then it also doesn't
3868 matter. Check to see if the target of this branch is on the
3869 loop->exits_labels list. */
3871 for (label = loop->exit_labels; label; label = LABEL_NEXTREF (label))
3872 if (XEXP (label, 0) == JUMP_LABEL (p))
3876 not_every_iteration = 1;
3879 else if (GET_CODE (p) == NOTE)
3881 /* At the virtual top of a converted loop, insns are again known to
3882 be executed each iteration: logically, the loop begins here
3883 even though the exit code has been duplicated.
3885 Insns are also again known to be executed each iteration at
3886 the LOOP_CONT note. */
3887 if ((NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP
3888 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_CONT)
3890 not_every_iteration = 0;
3891 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
3893 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
3897 /* Note if we pass a loop latch. If we do, then we can not clear
3898 NOT_EVERY_ITERATION below when we pass the last CODE_LABEL in
3899 a loop since a jump before the last CODE_LABEL may have started
3900 a new loop iteration.
3902 Note that LOOP_TOP is only set for rotated loops and we need
3903 this check for all loops, so compare against the CODE_LABEL
3904 which immediately follows LOOP_START. */
3905 if (GET_CODE (p) == JUMP_INSN
3906 && JUMP_LABEL (p) == NEXT_INSN (loop_start))
3907 past_loop_latch = 1;
3909 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
3910 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
3911 or not an insn is known to be executed each iteration of the
3912 loop, whether or not any iterations are known to occur.
3914 Therefore, if we have just passed a label and have no more labels
3915 between here and the test insn of the loop, and we have not passed
3916 a jump to the top of the loop, then we know these insns will be
3917 executed each iteration. */
3919 if (not_every_iteration
3920 && ! past_loop_latch
3921 && GET_CODE (p) == CODE_LABEL
3922 && no_labels_between_p (p, loop_end)
3923 && loop_insn_first_p (p, loop_cont))
3924 not_every_iteration = 0;
3927 /* Scan loop_iv_list to remove all regs that proved not to be bivs.
3928 Make a sanity check against n_times_set. */
3929 for (backbl = &loop_iv_list, bl = *backbl; bl; bl = bl->next)
3933 if (REG_IV_TYPE (bl->regno) != BASIC_INDUCT
3934 /* Above happens if register modified by subreg, etc. */
3935 /* Make sure it is not recognized as a basic induction var: */
3936 || VARRAY_INT (n_times_set, bl->regno) != bl->biv_count
3937 /* If never incremented, it is invariant that we decided not to
3938 move. So leave it alone. */
3939 || ! bl->incremented)
3941 else if (bl->biv_count > 1)
3943 /* ??? If we have multiple increments for this BIV, and any of
3944 them take multiple insns to perform the increment, drop the
3945 BIV, since the bit below that converts the extra increments
3946 into GIVs can't handle the multiple insn increment. */
3948 struct induction *v;
3949 for (v = bl->biv; v ; v = v->next_iv)
3950 if (v->multi_insn_incr)
3956 if (loop_dump_stream)
3957 fprintf (loop_dump_stream, "Reg %d: biv discarded, %s\n",
3959 (REG_IV_TYPE (bl->regno) != BASIC_INDUCT
3960 ? "not induction variable"
3961 : (! bl->incremented ? "never incremented"
3964 REG_IV_TYPE (bl->regno) = NOT_BASIC_INDUCT;
3971 if (loop_dump_stream)
3972 fprintf (loop_dump_stream, "Reg %d: biv verified\n", bl->regno);
3976 /* Exit if there are no bivs. */
3979 /* Can still unroll the loop anyways, but indicate that there is no
3980 strength reduction info available. */
3982 unroll_loop (loop, insn_count, end_insert_before, 0);
3987 /* Find initial value for each biv by searching backwards from loop_start,
3988 halting at first label. Also record any test condition. */
3991 for (p = loop_start; p && GET_CODE (p) != CODE_LABEL; p = PREV_INSN (p))
3995 if (GET_CODE (p) == CALL_INSN)
3998 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
3999 || GET_CODE (p) == CALL_INSN)
4000 note_stores (PATTERN (p), record_initial, NULL);
4002 /* Record any test of a biv that branches around the loop if no store
4003 between it and the start of loop. We only care about tests with
4004 constants and registers and only certain of those. */
4005 if (GET_CODE (p) == JUMP_INSN
4006 && JUMP_LABEL (p) != 0
4007 && next_real_insn (JUMP_LABEL (p)) == next_real_insn (loop_end)
4008 && (test = get_condition_for_loop (loop, p)) != 0
4009 && GET_CODE (XEXP (test, 0)) == REG
4010 && REGNO (XEXP (test, 0)) < max_reg_before_loop
4011 && (bl = reg_biv_class[REGNO (XEXP (test, 0))]) != 0
4012 && valid_initial_value_p (XEXP (test, 1), p, call_seen, loop_start)
4013 && bl->init_insn == 0)
4015 /* If an NE test, we have an initial value! */
4016 if (GET_CODE (test) == NE)
4019 bl->init_set = gen_rtx_SET (VOIDmode,
4020 XEXP (test, 0), XEXP (test, 1));
4023 bl->initial_test = test;
4027 /* Look at the each biv and see if we can say anything better about its
4028 initial value from any initializing insns set up above. (This is done
4029 in two passes to avoid missing SETs in a PARALLEL.) */
4030 for (backbl = &loop_iv_list; (bl = *backbl); backbl = &bl->next)
4035 if (! bl->init_insn)
4038 /* IF INIT_INSN has a REG_EQUAL or REG_EQUIV note and the value
4039 is a constant, use the value of that. */
4040 if (((note = find_reg_note (bl->init_insn, REG_EQUAL, 0)) != NULL
4041 && CONSTANT_P (XEXP (note, 0)))
4042 || ((note = find_reg_note (bl->init_insn, REG_EQUIV, 0)) != NULL
4043 && CONSTANT_P (XEXP (note, 0))))
4044 src = XEXP (note, 0);
4046 src = SET_SRC (bl->init_set);
4048 if (loop_dump_stream)
4049 fprintf (loop_dump_stream,
4050 "Biv %d initialized at insn %d: initial value ",
4051 bl->regno, INSN_UID (bl->init_insn));
4053 if ((GET_MODE (src) == GET_MODE (regno_reg_rtx[bl->regno])
4054 || GET_MODE (src) == VOIDmode)
4055 && valid_initial_value_p (src, bl->init_insn, call_seen, loop_start))
4057 bl->initial_value = src;
4059 if (loop_dump_stream)
4061 if (GET_CODE (src) == CONST_INT)
4063 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, INTVAL (src));
4064 fputc ('\n', loop_dump_stream);
4068 print_rtl (loop_dump_stream, src);
4069 fprintf (loop_dump_stream, "\n");
4075 struct iv_class *bl2 = 0;
4076 rtx increment = NULL_RTX;
4078 /* Biv initial value is not a simple move. If it is the sum of
4079 another biv and a constant, check if both bivs are incremented
4080 in lockstep. Then we are actually looking at a giv.
4081 For simplicity, we only handle the case where there is but a
4082 single increment, and the register is not used elsewhere. */
4083 if (bl->biv_count == 1
4084 && bl->regno < max_reg_before_loop
4085 && uid_luid[REGNO_LAST_UID (bl->regno)] < INSN_LUID (loop_end)
4086 && GET_CODE (src) == PLUS
4087 && GET_CODE (XEXP (src, 0)) == REG
4088 && CONSTANT_P (XEXP (src, 1))
4089 && ((increment = biv_total_increment (bl)) != NULL_RTX))
4091 int regno = REGNO (XEXP (src, 0));
4093 for (bl2 = loop_iv_list; bl2; bl2 = bl2->next)
4094 if (bl2->regno == regno)
4098 /* Now, can we transform this biv into a giv? */
4100 && bl2->biv_count == 1
4101 && rtx_equal_p (increment, biv_total_increment (bl2))
4102 /* init_insn is only set to insns that are before loop_start
4103 without any intervening labels. */
4104 && ! reg_set_between_p (bl2->biv->src_reg,
4105 PREV_INSN (bl->init_insn), loop_start)
4106 /* The register from BL2 must be set before the register from
4107 BL is set, or we must be able to move the latter set after
4108 the former set. Currently there can't be any labels
4109 in-between when biv_total_increment returns nonzero both times
4110 but we test it here in case some day some real cfg analysis
4111 gets used to set always_computable. */
4112 && (loop_insn_first_p (bl2->biv->insn, bl->biv->insn)
4113 ? no_labels_between_p (bl2->biv->insn, bl->biv->insn)
4114 : (! reg_used_between_p (bl->biv->src_reg, bl->biv->insn,
4116 && no_jumps_between_p (bl->biv->insn, bl2->biv->insn)))
4117 && validate_change (bl->biv->insn,
4118 &SET_SRC (single_set (bl->biv->insn)),
4121 rtx dominator = loop->cont_dominator;
4122 rtx giv = bl->biv->src_reg;
4123 rtx giv_insn = bl->biv->insn;
4124 rtx after_giv = NEXT_INSN (giv_insn);
4126 if (loop_dump_stream)
4127 fprintf (loop_dump_stream, "is giv of biv %d\n", bl2->regno);
4128 /* Let this giv be discovered by the generic code. */
4129 REG_IV_TYPE (bl->regno) = UNKNOWN_INDUCT;
4130 reg_biv_class[bl->regno] = (struct iv_class *) NULL_PTR;
4131 /* We can get better optimization if we can move the giv setting
4132 before the first giv use. */
4134 && ! loop_insn_first_p (dominator, loop_scan_start)
4135 && ! reg_set_between_p (bl2->biv->src_reg, loop_start,
4137 && ! reg_used_between_p (giv, loop_start, dominator)
4138 && ! reg_used_between_p (giv, giv_insn, loop_end))
4143 for (next = NEXT_INSN (dominator); ; next = NEXT_INSN (next))
4145 if ((GET_RTX_CLASS (GET_CODE (next)) == 'i'
4146 && (reg_mentioned_p (giv, PATTERN (next))
4147 || reg_set_p (bl2->biv->src_reg, next)))
4148 || GET_CODE (next) == JUMP_INSN)
4151 if (GET_RTX_CLASS (GET_CODE (next)) != 'i'
4152 || ! sets_cc0_p (PATTERN (next)))
4156 if (loop_dump_stream)
4157 fprintf (loop_dump_stream, "move after insn %d\n",
4158 INSN_UID (dominator));
4159 /* Avoid problems with luids by actually moving the insn
4160 and adjusting all luids in the range. */
4161 reorder_insns (giv_insn, giv_insn, dominator);
4162 for (p = dominator; INSN_UID (p) >= max_uid_for_loop; )
4164 compute_luids (giv_insn, after_giv, INSN_LUID (p));
4165 /* If the only purpose of the init insn is to initialize
4166 this giv, delete it. */
4167 if (single_set (bl->init_insn)
4168 && ! reg_used_between_p (giv, bl->init_insn, loop_start))
4169 delete_insn (bl->init_insn);
4171 else if (! loop_insn_first_p (bl2->biv->insn, bl->biv->insn))
4173 rtx p = PREV_INSN (giv_insn);
4174 while (INSN_UID (p) >= max_uid_for_loop)
4176 reorder_insns (giv_insn, giv_insn, bl2->biv->insn);
4177 compute_luids (after_giv, NEXT_INSN (giv_insn),
4180 /* Remove this biv from the chain. */
4183 /* We move the following giv from *bl->next into *bl.
4184 We have to update reg_biv_class for that moved biv
4185 to point to its new address. */
4187 reg_biv_class[bl->regno] = bl;
4196 /* If we can't make it a giv,
4197 let biv keep initial value of "itself". */
4198 else if (loop_dump_stream)
4199 fprintf (loop_dump_stream, "is complex\n");
4203 /* If a biv is unconditionally incremented several times in a row, convert
4204 all but the last increment into a giv. */
4206 /* Get an upper bound for the number of registers
4207 we might have after all bivs have been processed. */
4208 first_increment_giv = max_reg_num ();
4209 for (n_extra_increment = 0, bl = loop_iv_list; bl; bl = bl->next)
4210 n_extra_increment += bl->biv_count - 1;
4212 /* If the loop contains volatile memory references do not allow any
4213 replacements to take place, since this could loose the volatile
4215 if (n_extra_increment && ! loop_info->has_volatile)
4217 int nregs = first_increment_giv + n_extra_increment;
4219 /* Reallocate reg_iv_type and reg_iv_info. */
4220 VARRAY_GROW (reg_iv_type, nregs);
4221 VARRAY_GROW (reg_iv_info, nregs);
4223 for (bl = loop_iv_list; bl; bl = bl->next)
4225 struct induction **vp, *v, *next;
4226 int biv_dead_after_loop = 0;
4228 /* The biv increments lists are in reverse order. Fix this
4230 for (v = bl->biv, bl->biv = 0; v; v = next)
4233 v->next_iv = bl->biv;
4237 /* We must guard against the case that an early exit between v->insn
4238 and next->insn leaves the biv live after the loop, since that
4239 would mean that we'd be missing an increment for the final
4240 value. The following test to set biv_dead_after_loop is like
4241 the first part of the test to set bl->eliminable.
4242 We don't check here if we can calculate the final value, since
4243 this can't succeed if we already know that there is a jump
4244 between v->insn and next->insn, yet next->always_executed is
4245 set and next->maybe_multiple is cleared. Such a combination
4246 implies that the jump destination is outside the loop.
4247 If we want to make this check more sophisticated, we should
4248 check each branch between v->insn and next->insn individually
4249 to see if the biv is dead at its destination. */
4251 if (uid_luid[REGNO_LAST_UID (bl->regno)] < INSN_LUID (loop_end)
4253 && INSN_UID (bl->init_insn) < max_uid_for_loop
4254 && (uid_luid[REGNO_FIRST_UID (bl->regno)]
4255 >= INSN_LUID (bl->init_insn))
4256 #ifdef HAVE_decrement_and_branch_until_zero
4259 && ! reg_mentioned_p (bl->biv->dest_reg, SET_SRC (bl->init_set)))
4260 biv_dead_after_loop = 1;
4262 for (vp = &bl->biv, next = *vp; v = next, next = v->next_iv;)
4264 HOST_WIDE_INT offset;
4265 rtx set, add_val, old_reg, dest_reg, last_use_insn, note;
4266 int old_regno, new_regno;
4268 if (! v->always_executed
4269 || v->maybe_multiple
4270 || GET_CODE (v->add_val) != CONST_INT
4271 || ! next->always_executed
4272 || next->maybe_multiple
4273 || ! CONSTANT_P (next->add_val)
4274 || v->mult_val != const1_rtx
4275 || next->mult_val != const1_rtx
4276 || ! (biv_dead_after_loop
4277 || no_jumps_between_p (v->insn, next->insn)))
4282 offset = INTVAL (v->add_val);
4283 set = single_set (v->insn);
4284 add_val = plus_constant (next->add_val, offset);
4285 old_reg = v->dest_reg;
4286 dest_reg = gen_reg_rtx (v->mode);
4288 /* Unlike reg_iv_type / reg_iv_info, the other three arrays
4289 have been allocated with some slop space, so we may not
4290 actually need to reallocate them. If we do, the following
4291 if statement will be executed just once in this loop. */
4292 if ((unsigned) max_reg_num () > n_times_set->num_elements)
4294 /* Grow all the remaining arrays. */
4295 VARRAY_GROW (set_in_loop, nregs);
4296 VARRAY_GROW (n_times_set, nregs);
4297 VARRAY_GROW (may_not_optimize, nregs);
4298 VARRAY_GROW (reg_single_usage, nregs);
4301 if (! validate_change (next->insn, next->location, add_val, 0))
4307 /* Here we can try to eliminate the increment by combining
4308 it into the uses. */
4310 /* Set last_use_insn so that we can check against it. */
4312 for (last_use_insn = v->insn, p = NEXT_INSN (v->insn);
4314 p = next_insn_in_loop (loop, p))
4316 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
4318 if (reg_mentioned_p (old_reg, PATTERN (p)))
4324 /* If we can't get the LUIDs for the insns, we can't
4325 calculate the lifetime. This is likely from unrolling
4326 of an inner loop, so there is little point in making this
4327 a DEST_REG giv anyways. */
4328 if (INSN_UID (v->insn) >= max_uid_for_loop
4329 || INSN_UID (last_use_insn) >= max_uid_for_loop
4330 || ! validate_change (v->insn, &SET_DEST (set), dest_reg, 0))
4332 /* Change the increment at NEXT back to what it was. */
4333 if (! validate_change (next->insn, next->location,
4339 next->add_val = add_val;
4340 v->dest_reg = dest_reg;
4341 v->giv_type = DEST_REG;
4342 v->location = &SET_SRC (set);
4344 v->combined_with = 0;
4346 v->derive_adjustment = 0;
4352 v->auto_inc_opt = 0;
4355 v->derived_from = 0;
4356 v->always_computable = 1;
4357 v->always_executed = 1;
4359 v->no_const_addval = 0;
4361 old_regno = REGNO (old_reg);
4362 new_regno = REGNO (dest_reg);
4363 VARRAY_INT (set_in_loop, old_regno)--;
4364 VARRAY_INT (set_in_loop, new_regno) = 1;
4365 VARRAY_INT (n_times_set, old_regno)--;
4366 VARRAY_INT (n_times_set, new_regno) = 1;
4367 VARRAY_CHAR (may_not_optimize, new_regno) = 0;
4369 REG_IV_TYPE (new_regno) = GENERAL_INDUCT;
4370 REG_IV_INFO (new_regno) = v;
4372 /* If next_insn has a REG_EQUAL note that mentiones OLD_REG,
4373 it must be replaced. */
4374 note = find_reg_note (next->insn, REG_EQUAL, NULL_RTX);
4375 if (note && reg_mentioned_p (old_reg, XEXP (note, 0)))
4376 XEXP (note, 0) = copy_rtx (SET_SRC (single_set (next->insn)));
4378 /* Remove the increment from the list of biv increments,
4379 and record it as a giv. */
4382 v->next_iv = bl->giv;
4385 v->benefit = rtx_cost (SET_SRC (set), SET);
4386 bl->total_benefit += v->benefit;
4388 /* Now replace the biv with DEST_REG in all insns between
4389 the replaced increment and the next increment, and
4390 remember the last insn that needed a replacement. */
4391 for (last_use_insn = v->insn, p = NEXT_INSN (v->insn);
4393 p = next_insn_in_loop (loop, p))
4397 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
4399 if (reg_mentioned_p (old_reg, PATTERN (p)))
4402 if (! validate_replace_rtx (old_reg, dest_reg, p))
4405 for (note = REG_NOTES (p); note; note = XEXP (note, 1))
4407 if (GET_CODE (note) == EXPR_LIST)
4409 = replace_rtx (XEXP (note, 0), old_reg, dest_reg);
4413 v->last_use = last_use_insn;
4414 v->lifetime = INSN_LUID (last_use_insn) - INSN_LUID (v->insn);
4415 /* If the lifetime is zero, it means that this register is really
4416 a dead store. So mark this as a giv that can be ignored.
4417 This will not prevent the biv from being eliminated. */
4418 if (v->lifetime == 0)
4421 if (loop_dump_stream)
4422 fprintf (loop_dump_stream,
4423 "Increment %d of biv %d converted to giv %d.\n",
4424 INSN_UID (v->insn), old_regno, new_regno);
4428 last_increment_giv = max_reg_num () - 1;
4430 /* Search the loop for general induction variables. */
4432 /* A register is a giv if: it is only set once, it is a function of a
4433 biv and a constant (or invariant), and it is not a biv. */
4435 not_every_iteration = 0;
4438 p = loop_scan_start;
4442 /* At end of a straight-in loop, we are done.
4443 At end of a loop entered at the bottom, scan the top. */
4444 if (p == loop_scan_start)
4452 if (p == loop_scan_start)
4456 /* Look for a general induction variable in a register. */
4457 if (GET_CODE (p) == INSN
4458 && (set = single_set (p))
4459 && GET_CODE (SET_DEST (set)) == REG
4460 && ! VARRAY_CHAR (may_not_optimize, REGNO (SET_DEST (set))))
4467 rtx last_consec_insn;
4469 dest_reg = SET_DEST (set);
4470 if (REGNO (dest_reg) < FIRST_PSEUDO_REGISTER)
4473 if (/* SET_SRC is a giv. */
4474 (general_induction_var (loop, SET_SRC (set), &src_reg, &add_val,
4475 &mult_val, 0, &benefit)
4476 /* Equivalent expression is a giv. */
4477 || ((regnote = find_reg_note (p, REG_EQUAL, NULL_RTX))
4478 && general_induction_var (loop, XEXP (regnote, 0), &src_reg,
4479 &add_val, &mult_val, 0,
4481 /* Don't try to handle any regs made by loop optimization.
4482 We have nothing on them in regno_first_uid, etc. */
4483 && REGNO (dest_reg) < max_reg_before_loop
4484 /* Don't recognize a BASIC_INDUCT_VAR here. */
4485 && dest_reg != src_reg
4486 /* This must be the only place where the register is set. */
4487 && (VARRAY_INT (n_times_set, REGNO (dest_reg)) == 1
4488 /* or all sets must be consecutive and make a giv. */
4489 || (benefit = consec_sets_giv (loop, benefit, p,
4491 &add_val, &mult_val,
4492 &last_consec_insn))))
4495 = (struct induction *) alloca (sizeof (struct induction));
4497 /* If this is a library call, increase benefit. */
4498 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
4499 benefit += libcall_benefit (p);
4501 /* Skip the consecutive insns, if there are any. */
4502 if (VARRAY_INT (n_times_set, REGNO (dest_reg)) != 1)
4503 p = last_consec_insn;
4505 record_giv (loop, v, p, src_reg, dest_reg, mult_val, add_val,
4506 benefit, DEST_REG, not_every_iteration,
4507 maybe_multiple, NULL_PTR);
4512 #ifndef DONT_REDUCE_ADDR
4513 /* Look for givs which are memory addresses. */
4514 /* This resulted in worse code on a VAX 8600. I wonder if it
4516 if (GET_CODE (p) == INSN)
4517 find_mem_givs (loop, PATTERN (p), p, not_every_iteration,
4521 /* Update the status of whether giv can derive other givs. This can
4522 change when we pass a label or an insn that updates a biv. */
4523 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
4524 || GET_CODE (p) == CODE_LABEL)
4525 update_giv_derive (loop, p);
4527 /* Past CODE_LABEL, we get to insns that may be executed multiple
4528 times. The only way we can be sure that they can't is if every
4529 every jump insn between here and the end of the loop either
4530 returns, exits the loop, is a forward jump, or is a jump
4531 to the loop start. */
4533 if (GET_CODE (p) == CODE_LABEL)
4541 insn = NEXT_INSN (insn);
4542 if (insn == loop_scan_start)
4544 if (insn == loop_end)
4550 if (insn == loop_scan_start)
4554 if (GET_CODE (insn) == JUMP_INSN
4555 && GET_CODE (PATTERN (insn)) != RETURN
4556 && (! condjump_p (insn)
4557 || (JUMP_LABEL (insn) != 0
4558 && JUMP_LABEL (insn) != loop_scan_start
4559 && (INSN_UID (JUMP_LABEL (insn)) >= max_uid_for_loop
4560 || INSN_UID (insn) >= max_uid_for_loop
4561 || (INSN_LUID (JUMP_LABEL (insn))
4562 < INSN_LUID (insn))))))
4570 /* Past a jump, we get to insns for which we can't count
4571 on whether they will be executed during each iteration. */
4572 /* This code appears twice in strength_reduce. There is also similar
4573 code in scan_loop. */
4574 if (GET_CODE (p) == JUMP_INSN
4575 /* If we enter the loop in the middle, and scan around to the
4576 beginning, don't set not_every_iteration for that.
4577 This can be any kind of jump, since we want to know if insns
4578 will be executed if the loop is executed. */
4579 && ! (JUMP_LABEL (p) == loop_top
4580 && ((NEXT_INSN (NEXT_INSN (p)) == loop_end && simplejump_p (p))
4581 || (NEXT_INSN (p) == loop_end && condjump_p (p)))))
4585 /* If this is a jump outside the loop, then it also doesn't
4586 matter. Check to see if the target of this branch is on the
4587 loop->exits_labels list. */
4589 for (label = loop->exit_labels; label; label = LABEL_NEXTREF (label))
4590 if (XEXP (label, 0) == JUMP_LABEL (p))
4594 not_every_iteration = 1;
4597 else if (GET_CODE (p) == NOTE)
4599 /* At the virtual top of a converted loop, insns are again known to
4600 be executed each iteration: logically, the loop begins here
4601 even though the exit code has been duplicated.
4603 Insns are also again known to be executed each iteration at
4604 the LOOP_CONT note. */
4605 if ((NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP
4606 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_CONT)
4608 not_every_iteration = 0;
4609 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
4611 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
4615 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
4616 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
4617 or not an insn is known to be executed each iteration of the
4618 loop, whether or not any iterations are known to occur.
4620 Therefore, if we have just passed a label and have no more labels
4621 between here and the test insn of the loop, we know these insns
4622 will be executed each iteration. */
4624 if (not_every_iteration && GET_CODE (p) == CODE_LABEL
4625 && no_labels_between_p (p, loop_end)
4626 && loop_insn_first_p (p, loop_cont))
4627 not_every_iteration = 0;
4630 /* Try to calculate and save the number of loop iterations. This is
4631 set to zero if the actual number can not be calculated. This must
4632 be called after all giv's have been identified, since otherwise it may
4633 fail if the iteration variable is a giv. */
4635 loop_iterations (loop);
4637 /* Now for each giv for which we still don't know whether or not it is
4638 replaceable, check to see if it is replaceable because its final value
4639 can be calculated. This must be done after loop_iterations is called,
4640 so that final_giv_value will work correctly. */
4642 for (bl = loop_iv_list; bl; bl = bl->next)
4644 struct induction *v;
4646 for (v = bl->giv; v; v = v->next_iv)
4647 if (! v->replaceable && ! v->not_replaceable)
4648 check_final_value (loop, v);
4651 /* Try to prove that the loop counter variable (if any) is always
4652 nonnegative; if so, record that fact with a REG_NONNEG note
4653 so that "decrement and branch until zero" insn can be used. */
4654 check_dbra_loop (loop, insn_count);
4656 /* Create reg_map to hold substitutions for replaceable giv regs.
4657 Some givs might have been made from biv increments, so look at
4658 reg_iv_type for a suitable size. */
4659 reg_map_size = reg_iv_type->num_elements;
4660 reg_map = (rtx *) xcalloc (reg_map_size, sizeof (rtx));
4662 /* Examine each iv class for feasibility of strength reduction/induction
4663 variable elimination. */
4665 for (bl = loop_iv_list; bl; bl = bl->next)
4667 struct induction *v;
4670 rtx final_value = 0;
4673 /* Test whether it will be possible to eliminate this biv
4674 provided all givs are reduced. This is possible if either
4675 the reg is not used outside the loop, or we can compute
4676 what its final value will be.
4678 For architectures with a decrement_and_branch_until_zero insn,
4679 don't do this if we put a REG_NONNEG note on the endtest for
4682 /* Compare against bl->init_insn rather than loop_start.
4683 We aren't concerned with any uses of the biv between
4684 init_insn and loop_start since these won't be affected
4685 by the value of the biv elsewhere in the function, so
4686 long as init_insn doesn't use the biv itself.
4687 March 14, 1989 -- self@bayes.arc.nasa.gov */
4689 if ((uid_luid[REGNO_LAST_UID (bl->regno)] < INSN_LUID (loop_end)
4691 && INSN_UID (bl->init_insn) < max_uid_for_loop
4692 && uid_luid[REGNO_FIRST_UID (bl->regno)] >= INSN_LUID (bl->init_insn)
4693 #ifdef HAVE_decrement_and_branch_until_zero
4696 && ! reg_mentioned_p (bl->biv->dest_reg, SET_SRC (bl->init_set)))
4697 || ((final_value = final_biv_value (loop, bl))
4698 #ifdef HAVE_decrement_and_branch_until_zero
4702 bl->eliminable = maybe_eliminate_biv (loop, bl, 0, threshold,
4706 if (loop_dump_stream)
4708 fprintf (loop_dump_stream,
4709 "Cannot eliminate biv %d.\n",
4711 fprintf (loop_dump_stream,
4712 "First use: insn %d, last use: insn %d.\n",
4713 REGNO_FIRST_UID (bl->regno),
4714 REGNO_LAST_UID (bl->regno));
4718 /* Combine all giv's for this iv_class. */
4721 /* This will be true at the end, if all givs which depend on this
4722 biv have been strength reduced.
4723 We can't (currently) eliminate the biv unless this is so. */
4726 /* Check each giv in this class to see if we will benefit by reducing
4727 it. Skip giv's combined with others. */
4728 for (v = bl->giv; v; v = v->next_iv)
4730 struct induction *tv;
4732 if (v->ignore || v->same)
4735 benefit = v->benefit;
4737 /* Reduce benefit if not replaceable, since we will insert
4738 a move-insn to replace the insn that calculates this giv.
4739 Don't do this unless the giv is a user variable, since it
4740 will often be marked non-replaceable because of the duplication
4741 of the exit code outside the loop. In such a case, the copies
4742 we insert are dead and will be deleted. So they don't have
4743 a cost. Similar situations exist. */
4744 /* ??? The new final_[bg]iv_value code does a much better job
4745 of finding replaceable giv's, and hence this code may no longer
4747 if (! v->replaceable && ! bl->eliminable
4748 && REG_USERVAR_P (v->dest_reg))
4749 benefit -= copy_cost;
4751 /* Decrease the benefit to count the add-insns that we will
4752 insert to increment the reduced reg for the giv. */
4753 benefit -= add_cost * bl->biv_count;
4755 /* Decide whether to strength-reduce this giv or to leave the code
4756 unchanged (recompute it from the biv each time it is used).
4757 This decision can be made independently for each giv. */
4760 /* Attempt to guess whether autoincrement will handle some of the
4761 new add insns; if so, increase BENEFIT (undo the subtraction of
4762 add_cost that was done above). */
4763 if (v->giv_type == DEST_ADDR
4764 && GET_CODE (v->mult_val) == CONST_INT)
4766 if (HAVE_POST_INCREMENT
4767 && INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
4768 benefit += add_cost * bl->biv_count;
4769 else if (HAVE_PRE_INCREMENT
4770 && INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
4771 benefit += add_cost * bl->biv_count;
4772 else if (HAVE_POST_DECREMENT
4773 && -INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
4774 benefit += add_cost * bl->biv_count;
4775 else if (HAVE_PRE_DECREMENT
4776 && -INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
4777 benefit += add_cost * bl->biv_count;
4781 /* If an insn is not to be strength reduced, then set its ignore
4782 flag, and clear all_reduced. */
4784 /* A giv that depends on a reversed biv must be reduced if it is
4785 used after the loop exit, otherwise, it would have the wrong
4786 value after the loop exit. To make it simple, just reduce all
4787 of such giv's whether or not we know they are used after the loop
4790 if ( ! flag_reduce_all_givs && v->lifetime * threshold * benefit < insn_count
4793 if (loop_dump_stream)
4794 fprintf (loop_dump_stream,
4795 "giv of insn %d not worth while, %d vs %d.\n",
4797 v->lifetime * threshold * benefit, insn_count);
4803 /* Check that we can increment the reduced giv without a
4804 multiply insn. If not, reject it. */
4806 for (tv = bl->biv; tv; tv = tv->next_iv)
4807 if (tv->mult_val == const1_rtx
4808 && ! product_cheap_p (tv->add_val, v->mult_val))
4810 if (loop_dump_stream)
4811 fprintf (loop_dump_stream,
4812 "giv of insn %d: would need a multiply.\n",
4813 INSN_UID (v->insn));
4821 /* Check for givs whose first use is their definition and whose
4822 last use is the definition of another giv. If so, it is likely
4823 dead and should not be used to derive another giv nor to
4825 for (v = bl->giv; v; v = v->next_iv)
4828 || (v->same && v->same->ignore))
4833 struct induction *v1;
4835 for (v1 = bl->giv; v1; v1 = v1->next_iv)
4836 if (v->last_use == v1->insn)
4839 else if (v->giv_type == DEST_REG
4840 && REGNO_FIRST_UID (REGNO (v->dest_reg)) == INSN_UID (v->insn))
4842 struct induction *v1;
4844 for (v1 = bl->giv; v1; v1 = v1->next_iv)
4845 if (REGNO_LAST_UID (REGNO (v->dest_reg)) == INSN_UID (v1->insn))
4850 /* Now that we know which givs will be reduced, try to rearrange the
4851 combinations to reduce register pressure.
4852 recombine_givs calls find_life_end, which needs reg_iv_type and
4853 reg_iv_info to be valid for all pseudos. We do the necessary
4854 reallocation here since it allows to check if there are still
4855 more bivs to process. */
4856 nregs = max_reg_num ();
4857 if (nregs > reg_iv_type->num_elements)
4859 /* If there are still more bivs to process, allocate some slack
4860 space so that we're not constantly reallocating these arrays. */
4863 /* Reallocate reg_iv_type and reg_iv_info. */
4864 VARRAY_GROW (reg_iv_type, nregs);
4865 VARRAY_GROW (reg_iv_info, nregs);
4867 recombine_givs (loop, bl, unroll_p);
4869 /* Reduce each giv that we decided to reduce. */
4871 for (v = bl->giv; v; v = v->next_iv)
4873 struct induction *tv;
4874 if (! v->ignore && v->same == 0)
4876 int auto_inc_opt = 0;
4878 /* If the code for derived givs immediately below has already
4879 allocated a new_reg, we must keep it. */
4881 v->new_reg = gen_reg_rtx (v->mode);
4883 if (v->derived_from)
4885 struct induction *d = v->derived_from;
4887 /* In case d->dest_reg is not replaceable, we have
4888 to replace it in v->insn now. */
4890 d->new_reg = gen_reg_rtx (d->mode);
4892 = replace_rtx (PATTERN (v->insn), d->dest_reg, d->new_reg);
4894 = replace_rtx (PATTERN (v->insn), v->dest_reg, v->new_reg);
4895 /* For each place where the biv is incremented, add an
4896 insn to set the new, reduced reg for the giv.
4897 We used to do this only for biv_count != 1, but
4898 this fails when there is a giv after a single biv
4899 increment, e.g. when the last giv was expressed as
4901 for (tv = bl->biv; tv; tv = tv->next_iv)
4903 /* We always emit reduced giv increments before the
4904 biv increment when bl->biv_count != 1. So by
4905 emitting the add insns for derived givs after the
4906 biv increment, they pick up the updated value of
4908 If the reduced giv is processed with
4909 auto_inc_opt == 1, then it is incremented earlier
4910 than the biv, hence we'll still pick up the right
4912 If it's processed with auto_inc_opt == -1,
4913 that implies that the biv increment is before the
4914 first reduced giv's use. The derived giv's lifetime
4915 is after the reduced giv's lifetime, hence in this
4916 case, the biv increment doesn't matter. */
4917 emit_insn_after (copy_rtx (PATTERN (v->insn)), tv->insn);
4923 /* If the target has auto-increment addressing modes, and
4924 this is an address giv, then try to put the increment
4925 immediately after its use, so that flow can create an
4926 auto-increment addressing mode. */
4927 if (v->giv_type == DEST_ADDR && bl->biv_count == 1
4928 && bl->biv->always_executed && ! bl->biv->maybe_multiple
4929 /* We don't handle reversed biv's because bl->biv->insn
4930 does not have a valid INSN_LUID. */
4932 && v->always_executed && ! v->maybe_multiple
4933 && INSN_UID (v->insn) < max_uid_for_loop)
4935 /* If other giv's have been combined with this one, then
4936 this will work only if all uses of the other giv's occur
4937 before this giv's insn. This is difficult to check.
4939 We simplify this by looking for the common case where
4940 there is one DEST_REG giv, and this giv's insn is the
4941 last use of the dest_reg of that DEST_REG giv. If the
4942 increment occurs after the address giv, then we can
4943 perform the optimization. (Otherwise, the increment
4944 would have to go before other_giv, and we would not be
4945 able to combine it with the address giv to get an
4946 auto-inc address.) */
4947 if (v->combined_with)
4949 struct induction *other_giv = 0;
4951 for (tv = bl->giv; tv; tv = tv->next_iv)
4959 if (! tv && other_giv
4960 && REGNO (other_giv->dest_reg) < max_reg_before_loop
4961 && (REGNO_LAST_UID (REGNO (other_giv->dest_reg))
4962 == INSN_UID (v->insn))
4963 && INSN_LUID (v->insn) < INSN_LUID (bl->biv->insn))
4966 /* Check for case where increment is before the address
4967 giv. Do this test in "loop order". */
4968 else if ((INSN_LUID (v->insn) > INSN_LUID (bl->biv->insn)
4969 && (INSN_LUID (v->insn) < INSN_LUID (loop_scan_start)
4970 || (INSN_LUID (bl->biv->insn)
4971 > INSN_LUID (loop_scan_start))))
4972 || (INSN_LUID (v->insn) < INSN_LUID (loop_scan_start)
4973 && (INSN_LUID (loop_scan_start)
4974 < INSN_LUID (bl->biv->insn))))
4983 /* We can't put an insn immediately after one setting
4984 cc0, or immediately before one using cc0. */
4985 if ((auto_inc_opt == 1 && sets_cc0_p (PATTERN (v->insn)))
4986 || (auto_inc_opt == -1
4987 && (prev = prev_nonnote_insn (v->insn)) != 0
4988 && GET_RTX_CLASS (GET_CODE (prev)) == 'i'
4989 && sets_cc0_p (PATTERN (prev))))
4995 v->auto_inc_opt = 1;
4999 /* For each place where the biv is incremented, add an insn
5000 to increment the new, reduced reg for the giv. */
5001 for (tv = bl->biv; tv; tv = tv->next_iv)
5006 insert_before = tv->insn;
5007 else if (auto_inc_opt == 1)
5008 insert_before = NEXT_INSN (v->insn);
5010 insert_before = v->insn;
5012 if (tv->mult_val == const1_rtx)
5013 emit_iv_add_mult (tv->add_val, v->mult_val,
5014 v->new_reg, v->new_reg, insert_before);
5015 else /* tv->mult_val == const0_rtx */
5016 /* A multiply is acceptable here
5017 since this is presumed to be seldom executed. */
5018 emit_iv_add_mult (tv->add_val, v->mult_val,
5019 v->add_val, v->new_reg, insert_before);
5022 /* Add code at loop start to initialize giv's reduced reg. */
5024 emit_iv_add_mult (bl->initial_value, v->mult_val,
5025 v->add_val, v->new_reg, loop_start);
5029 /* Rescan all givs. If a giv is the same as a giv not reduced, mark it
5032 For each giv register that can be reduced now: if replaceable,
5033 substitute reduced reg wherever the old giv occurs;
5034 else add new move insn "giv_reg = reduced_reg". */
5036 for (v = bl->giv; v; v = v->next_iv)
5038 if (v->same && v->same->ignore)
5044 /* Update expression if this was combined, in case other giv was
5047 v->new_reg = replace_rtx (v->new_reg,
5048 v->same->dest_reg, v->same->new_reg);
5050 if (v->giv_type == DEST_ADDR)
5051 /* Store reduced reg as the address in the memref where we found
5053 validate_change (v->insn, v->location, v->new_reg, 0);
5054 else if (v->replaceable)
5056 reg_map[REGNO (v->dest_reg)] = v->new_reg;
5059 /* I can no longer duplicate the original problem. Perhaps
5060 this is unnecessary now? */
5062 /* Replaceable; it isn't strictly necessary to delete the old
5063 insn and emit a new one, because v->dest_reg is now dead.
5065 However, especially when unrolling loops, the special
5066 handling for (set REG0 REG1) in the second cse pass may
5067 make v->dest_reg live again. To avoid this problem, emit
5068 an insn to set the original giv reg from the reduced giv.
5069 We can not delete the original insn, since it may be part
5070 of a LIBCALL, and the code in flow that eliminates dead
5071 libcalls will fail if it is deleted. */
5072 emit_insn_after (gen_move_insn (v->dest_reg, v->new_reg),
5078 /* Not replaceable; emit an insn to set the original giv reg from
5079 the reduced giv, same as above. */
5080 emit_insn_after (gen_move_insn (v->dest_reg, v->new_reg),
5084 /* When a loop is reversed, givs which depend on the reversed
5085 biv, and which are live outside the loop, must be set to their
5086 correct final value. This insn is only needed if the giv is
5087 not replaceable. The correct final value is the same as the
5088 value that the giv starts the reversed loop with. */
5089 if (bl->reversed && ! v->replaceable)
5090 emit_iv_add_mult (bl->initial_value, v->mult_val,
5091 v->add_val, v->dest_reg, end_insert_before);
5092 else if (v->final_value)
5096 /* If the loop has multiple exits, emit the insn before the
5097 loop to ensure that it will always be executed no matter
5098 how the loop exits. Otherwise, emit the insn after the loop,
5099 since this is slightly more efficient. */
5100 if (loop->exit_count)
5101 insert_before = loop_start;
5103 insert_before = end_insert_before;
5104 emit_insn_before (gen_move_insn (v->dest_reg, v->final_value),
5108 /* If the insn to set the final value of the giv was emitted
5109 before the loop, then we must delete the insn inside the loop
5110 that sets it. If this is a LIBCALL, then we must delete
5111 every insn in the libcall. Note, however, that
5112 final_giv_value will only succeed when there are multiple
5113 exits if the giv is dead at each exit, hence it does not
5114 matter that the original insn remains because it is dead
5116 /* Delete the insn inside the loop that sets the giv since
5117 the giv is now set before (or after) the loop. */
5118 delete_insn (v->insn);
5122 if (loop_dump_stream)
5124 fprintf (loop_dump_stream, "giv at %d reduced to ",
5125 INSN_UID (v->insn));
5126 print_rtl (loop_dump_stream, v->new_reg);
5127 fprintf (loop_dump_stream, "\n");
5131 /* All the givs based on the biv bl have been reduced if they
5134 /* For each giv not marked as maybe dead that has been combined with a
5135 second giv, clear any "maybe dead" mark on that second giv.
5136 v->new_reg will either be or refer to the register of the giv it
5139 Doing this clearing avoids problems in biv elimination where a
5140 giv's new_reg is a complex value that can't be put in the insn but
5141 the giv combined with (with a reg as new_reg) is marked maybe_dead.
5142 Since the register will be used in either case, we'd prefer it be
5143 used from the simpler giv. */
5145 for (v = bl->giv; v; v = v->next_iv)
5146 if (! v->maybe_dead && v->same)
5147 v->same->maybe_dead = 0;
5149 /* Try to eliminate the biv, if it is a candidate.
5150 This won't work if ! all_reduced,
5151 since the givs we planned to use might not have been reduced.
5153 We have to be careful that we didn't initially think we could eliminate
5154 this biv because of a giv that we now think may be dead and shouldn't
5155 be used as a biv replacement.
5157 Also, there is the possibility that we may have a giv that looks
5158 like it can be used to eliminate a biv, but the resulting insn
5159 isn't valid. This can happen, for example, on the 88k, where a
5160 JUMP_INSN can compare a register only with zero. Attempts to
5161 replace it with a compare with a constant will fail.
5163 Note that in cases where this call fails, we may have replaced some
5164 of the occurrences of the biv with a giv, but no harm was done in
5165 doing so in the rare cases where it can occur. */
5167 if (all_reduced == 1 && bl->eliminable
5168 && maybe_eliminate_biv (loop, bl, 1, threshold, insn_count))
5170 /* ?? If we created a new test to bypass the loop entirely,
5171 or otherwise drop straight in, based on this test, then
5172 we might want to rewrite it also. This way some later
5173 pass has more hope of removing the initialization of this
5176 /* If final_value != 0, then the biv may be used after loop end
5177 and we must emit an insn to set it just in case.
5179 Reversed bivs already have an insn after the loop setting their
5180 value, so we don't need another one. We can't calculate the
5181 proper final value for such a biv here anyways. */
5182 if (final_value != 0 && ! bl->reversed)
5186 /* If the loop has multiple exits, emit the insn before the
5187 loop to ensure that it will always be executed no matter
5188 how the loop exits. Otherwise, emit the insn after the
5189 loop, since this is slightly more efficient. */
5190 if (loop->exit_count)
5191 insert_before = loop_start;
5193 insert_before = end_insert_before;
5195 emit_insn_before (gen_move_insn (bl->biv->dest_reg, final_value),
5200 /* Delete all of the instructions inside the loop which set
5201 the biv, as they are all dead. If is safe to delete them,
5202 because an insn setting a biv will never be part of a libcall. */
5203 /* However, deleting them will invalidate the regno_last_uid info,
5204 so keeping them around is more convenient. Final_biv_value
5205 will only succeed when there are multiple exits if the biv
5206 is dead at each exit, hence it does not matter that the original
5207 insn remains, because it is dead anyways. */
5208 for (v = bl->biv; v; v = v->next_iv)
5209 delete_insn (v->insn);
5212 if (loop_dump_stream)
5213 fprintf (loop_dump_stream, "Reg %d: biv eliminated\n",
5218 /* Go through all the instructions in the loop, making all the
5219 register substitutions scheduled in REG_MAP. */
5221 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
5222 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
5223 || GET_CODE (p) == CALL_INSN)
5225 replace_regs (PATTERN (p), reg_map, reg_map_size, 0);
5226 replace_regs (REG_NOTES (p), reg_map, reg_map_size, 0);
5230 if (loop_info->n_iterations > 0)
5232 /* When we completely unroll a loop we will likely not need the increment
5233 of the loop BIV and we will not need the conditional branch at the
5235 unrolled_insn_copies = insn_count - 2;
5238 /* When we completely unroll a loop on a HAVE_cc0 machine we will not
5239 need the comparison before the conditional branch at the end of the
5241 unrolled_insn_copies -= 1;
5244 /* We'll need one copy for each loop iteration. */
5245 unrolled_insn_copies *= loop_info->n_iterations;
5247 /* A little slop to account for the ability to remove initialization
5248 code, better CSE, and other secondary benefits of completely
5249 unrolling some loops. */
5250 unrolled_insn_copies -= 1;
5252 /* Clamp the value. */
5253 if (unrolled_insn_copies < 0)
5254 unrolled_insn_copies = 0;
5257 /* Unroll loops from within strength reduction so that we can use the
5258 induction variable information that strength_reduce has already
5259 collected. Always unroll loops that would be as small or smaller
5260 unrolled than when rolled. */
5262 || (loop_info->n_iterations > 0
5263 && unrolled_insn_copies <= insn_count))
5264 unroll_loop (loop, insn_count, end_insert_before, 1);
5266 #ifdef HAVE_decrement_and_branch_on_count
5267 /* Instrument the loop with BCT insn. */
5268 if (HAVE_decrement_and_branch_on_count && bct_p
5269 && flag_branch_on_count_reg)
5271 #endif /* HAVE_decrement_and_branch_on_count */
5273 if (loop_dump_stream)
5274 fprintf (loop_dump_stream, "\n");
5277 VARRAY_FREE (reg_iv_type);
5278 VARRAY_FREE (reg_iv_info);
5279 free (reg_biv_class);
5284 /* Return 1 if X is a valid source for an initial value (or as value being
5285 compared against in an initial test).
5287 X must be either a register or constant and must not be clobbered between
5288 the current insn and the start of the loop.
5290 INSN is the insn containing X. */
5293 valid_initial_value_p (x, insn, call_seen, loop_start)
5302 /* Only consider pseudos we know about initialized in insns whose luids
5304 if (GET_CODE (x) != REG
5305 || REGNO (x) >= max_reg_before_loop)
5308 /* Don't use call-clobbered registers across a call which clobbers it. On
5309 some machines, don't use any hard registers at all. */
5310 if (REGNO (x) < FIRST_PSEUDO_REGISTER
5311 && (SMALL_REGISTER_CLASSES
5312 || (call_used_regs[REGNO (x)] && call_seen)))
5315 /* Don't use registers that have been clobbered before the start of the
5317 if (reg_set_between_p (x, insn, loop_start))
5323 /* Scan X for memory refs and check each memory address
5324 as a possible giv. INSN is the insn whose pattern X comes from.
5325 NOT_EVERY_ITERATION is 1 if the insn might not be executed during
5326 every loop iteration. MAYBE_MULTIPLE is 1 if the insn might be executed
5327 more thanonce in each loop iteration. */
5330 find_mem_givs (loop, x, insn, not_every_iteration, maybe_multiple)
5331 const struct loop *loop;
5334 int not_every_iteration, maybe_multiple;
5337 register enum rtx_code code;
5338 register const char *fmt;
5343 code = GET_CODE (x);
5367 /* This code used to disable creating GIVs with mult_val == 1 and
5368 add_val == 0. However, this leads to lost optimizations when
5369 it comes time to combine a set of related DEST_ADDR GIVs, since
5370 this one would not be seen. */
5372 if (general_induction_var (loop, XEXP (x, 0), &src_reg, &add_val,
5373 &mult_val, 1, &benefit))
5375 /* Found one; record it. */
5377 = (struct induction *) oballoc (sizeof (struct induction));
5379 record_giv (loop, v, insn, src_reg, addr_placeholder, mult_val,
5380 add_val, benefit, DEST_ADDR, not_every_iteration,
5381 maybe_multiple, &XEXP (x, 0));
5383 v->mem_mode = GET_MODE (x);
5392 /* Recursively scan the subexpressions for other mem refs. */
5394 fmt = GET_RTX_FORMAT (code);
5395 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5397 find_mem_givs (loop, XEXP (x, i), insn, not_every_iteration,
5399 else if (fmt[i] == 'E')
5400 for (j = 0; j < XVECLEN (x, i); j++)
5401 find_mem_givs (loop, XVECEXP (x, i, j), insn, not_every_iteration,
5405 /* Fill in the data about one biv update.
5406 V is the `struct induction' in which we record the biv. (It is
5407 allocated by the caller, with alloca.)
5408 INSN is the insn that sets it.
5409 DEST_REG is the biv's reg.
5411 MULT_VAL is const1_rtx if the biv is being incremented here, in which case
5412 INC_VAL is the increment. Otherwise, MULT_VAL is const0_rtx and the biv is
5413 being set to INC_VAL.
5415 NOT_EVERY_ITERATION is nonzero if this biv update is not know to be
5416 executed every iteration; MAYBE_MULTIPLE is nonzero if this biv update
5417 can be executed more than once per iteration. If MAYBE_MULTIPLE
5418 and NOT_EVERY_ITERATION are both zero, we know that the biv update is
5419 executed exactly once per iteration. */
5422 record_biv (v, insn, dest_reg, inc_val, mult_val, location,
5423 not_every_iteration, maybe_multiple, multi_insn_incr)
5424 struct induction *v;
5430 int not_every_iteration;
5432 int multi_insn_incr;
5434 struct iv_class *bl;
5437 v->src_reg = dest_reg;
5438 v->dest_reg = dest_reg;
5439 v->mult_val = mult_val;
5440 v->add_val = inc_val;
5441 v->location = location;
5442 v->mode = GET_MODE (dest_reg);
5443 v->always_computable = ! not_every_iteration;
5444 v->always_executed = ! not_every_iteration;
5445 v->maybe_multiple = maybe_multiple;
5446 v->multi_insn_incr = multi_insn_incr;
5448 /* Add this to the reg's iv_class, creating a class
5449 if this is the first incrementation of the reg. */
5451 bl = reg_biv_class[REGNO (dest_reg)];
5454 /* Create and initialize new iv_class. */
5456 bl = (struct iv_class *) oballoc (sizeof (struct iv_class));
5458 bl->regno = REGNO (dest_reg);
5464 /* Set initial value to the reg itself. */
5465 bl->initial_value = dest_reg;
5466 /* We haven't seen the initializing insn yet */
5469 bl->initial_test = 0;
5470 bl->incremented = 0;
5474 bl->total_benefit = 0;
5476 /* Add this class to loop_iv_list. */
5477 bl->next = loop_iv_list;
5480 /* Put it in the array of biv register classes. */
5481 reg_biv_class[REGNO (dest_reg)] = bl;
5484 /* Update IV_CLASS entry for this biv. */
5485 v->next_iv = bl->biv;
5488 if (mult_val == const1_rtx)
5489 bl->incremented = 1;
5491 if (loop_dump_stream)
5493 fprintf (loop_dump_stream,
5494 "Insn %d: possible biv, reg %d,",
5495 INSN_UID (insn), REGNO (dest_reg));
5496 if (GET_CODE (inc_val) == CONST_INT)
5498 fprintf (loop_dump_stream, " const =");
5499 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, INTVAL (inc_val));
5500 fputc ('\n', loop_dump_stream);
5504 fprintf (loop_dump_stream, " const = ");
5505 print_rtl (loop_dump_stream, inc_val);
5506 fprintf (loop_dump_stream, "\n");
5511 /* Fill in the data about one giv.
5512 V is the `struct induction' in which we record the giv. (It is
5513 allocated by the caller, with alloca.)
5514 INSN is the insn that sets it.
5515 BENEFIT estimates the savings from deleting this insn.
5516 TYPE is DEST_REG or DEST_ADDR; it says whether the giv is computed
5517 into a register or is used as a memory address.
5519 SRC_REG is the biv reg which the giv is computed from.
5520 DEST_REG is the giv's reg (if the giv is stored in a reg).
5521 MULT_VAL and ADD_VAL are the coefficients used to compute the giv.
5522 LOCATION points to the place where this giv's value appears in INSN. */
5525 record_giv (loop, v, insn, src_reg, dest_reg, mult_val, add_val, benefit,
5526 type, not_every_iteration, maybe_multiple, location)
5527 const struct loop *loop;
5528 struct induction *v;
5532 rtx mult_val, add_val;
5535 int not_every_iteration, maybe_multiple;
5538 struct induction *b;
5539 struct iv_class *bl;
5540 rtx set = single_set (insn);
5543 v->src_reg = src_reg;
5545 v->dest_reg = dest_reg;
5546 v->mult_val = mult_val;
5547 v->add_val = add_val;
5548 v->benefit = benefit;
5549 v->location = location;
5551 v->combined_with = 0;
5552 v->maybe_multiple = maybe_multiple;
5553 v->multi_insn_incr = 0;
5555 v->derive_adjustment = 0;
5561 v->auto_inc_opt = 0;
5564 v->derived_from = 0;
5567 /* The v->always_computable field is used in update_giv_derive, to
5568 determine whether a giv can be used to derive another giv. For a
5569 DEST_REG giv, INSN computes a new value for the giv, so its value
5570 isn't computable if INSN insn't executed every iteration.
5571 However, for a DEST_ADDR giv, INSN merely uses the value of the giv;
5572 it does not compute a new value. Hence the value is always computable
5573 regardless of whether INSN is executed each iteration. */
5575 if (type == DEST_ADDR)
5576 v->always_computable = 1;
5578 v->always_computable = ! not_every_iteration;
5580 v->always_executed = ! not_every_iteration;
5582 if (type == DEST_ADDR)
5584 v->mode = GET_MODE (*location);
5587 else /* type == DEST_REG */
5589 v->mode = GET_MODE (SET_DEST (set));
5591 v->lifetime = (uid_luid[REGNO_LAST_UID (REGNO (dest_reg))]
5592 - uid_luid[REGNO_FIRST_UID (REGNO (dest_reg))]);
5594 /* If the lifetime is zero, it means that this register is
5595 really a dead store. So mark this as a giv that can be
5596 ignored. This will not prevent the biv from being eliminated. */
5597 if (v->lifetime == 0)
5600 REG_IV_TYPE (REGNO (dest_reg)) = GENERAL_INDUCT;
5601 REG_IV_INFO (REGNO (dest_reg)) = v;
5604 /* Add the giv to the class of givs computed from one biv. */
5606 bl = reg_biv_class[REGNO (src_reg)];
5609 v->next_iv = bl->giv;
5611 /* Don't count DEST_ADDR. This is supposed to count the number of
5612 insns that calculate givs. */
5613 if (type == DEST_REG)
5615 bl->total_benefit += benefit;
5618 /* Fatal error, biv missing for this giv? */
5621 if (type == DEST_ADDR)
5625 /* The giv can be replaced outright by the reduced register only if all
5626 of the following conditions are true:
5627 - the insn that sets the giv is always executed on any iteration
5628 on which the giv is used at all
5629 (there are two ways to deduce this:
5630 either the insn is executed on every iteration,
5631 or all uses follow that insn in the same basic block),
5632 - the giv is not used outside the loop
5633 - no assignments to the biv occur during the giv's lifetime. */
5635 if (REGNO_FIRST_UID (REGNO (dest_reg)) == INSN_UID (insn)
5636 /* Previous line always fails if INSN was moved by loop opt. */
5637 && uid_luid[REGNO_LAST_UID (REGNO (dest_reg))]
5638 < INSN_LUID (loop->end)
5639 && (! not_every_iteration
5640 || last_use_this_basic_block (dest_reg, insn)))
5642 /* Now check that there are no assignments to the biv within the
5643 giv's lifetime. This requires two separate checks. */
5645 /* Check each biv update, and fail if any are between the first
5646 and last use of the giv.
5648 If this loop contains an inner loop that was unrolled, then
5649 the insn modifying the biv may have been emitted by the loop
5650 unrolling code, and hence does not have a valid luid. Just
5651 mark the biv as not replaceable in this case. It is not very
5652 useful as a biv, because it is used in two different loops.
5653 It is very unlikely that we would be able to optimize the giv
5654 using this biv anyways. */
5657 for (b = bl->biv; b; b = b->next_iv)
5659 if (INSN_UID (b->insn) >= max_uid_for_loop
5660 || ((uid_luid[INSN_UID (b->insn)]
5661 >= uid_luid[REGNO_FIRST_UID (REGNO (dest_reg))])
5662 && (uid_luid[INSN_UID (b->insn)]
5663 <= uid_luid[REGNO_LAST_UID (REGNO (dest_reg))])))
5666 v->not_replaceable = 1;
5671 /* If there are any backwards branches that go from after the
5672 biv update to before it, then this giv is not replaceable. */
5674 for (b = bl->biv; b; b = b->next_iv)
5675 if (back_branch_in_range_p (loop, b->insn))
5678 v->not_replaceable = 1;
5684 /* May still be replaceable, we don't have enough info here to
5687 v->not_replaceable = 0;
5691 /* Record whether the add_val contains a const_int, for later use by
5696 v->no_const_addval = 1;
5697 if (tem == const0_rtx)
5699 else if (GET_CODE (tem) == CONST_INT)
5700 v->no_const_addval = 0;
5701 else if (GET_CODE (tem) == PLUS)
5705 if (GET_CODE (XEXP (tem, 0)) == PLUS)
5706 tem = XEXP (tem, 0);
5707 else if (GET_CODE (XEXP (tem, 1)) == PLUS)
5708 tem = XEXP (tem, 1);
5712 if (GET_CODE (XEXP (tem, 1)) == CONST_INT)
5713 v->no_const_addval = 0;
5717 if (loop_dump_stream)
5719 if (type == DEST_REG)
5720 fprintf (loop_dump_stream, "Insn %d: giv reg %d",
5721 INSN_UID (insn), REGNO (dest_reg));
5723 fprintf (loop_dump_stream, "Insn %d: dest address",
5726 fprintf (loop_dump_stream, " src reg %d benefit %d",
5727 REGNO (src_reg), v->benefit);
5728 fprintf (loop_dump_stream, " lifetime %d",
5732 fprintf (loop_dump_stream, " replaceable");
5734 if (v->no_const_addval)
5735 fprintf (loop_dump_stream, " ncav");
5737 if (GET_CODE (mult_val) == CONST_INT)
5739 fprintf (loop_dump_stream, " mult ");
5740 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, INTVAL (mult_val));
5744 fprintf (loop_dump_stream, " mult ");
5745 print_rtl (loop_dump_stream, mult_val);
5748 if (GET_CODE (add_val) == CONST_INT)
5750 fprintf (loop_dump_stream, " add ");
5751 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, INTVAL (add_val));
5755 fprintf (loop_dump_stream, " add ");
5756 print_rtl (loop_dump_stream, add_val);
5760 if (loop_dump_stream)
5761 fprintf (loop_dump_stream, "\n");
5766 /* All this does is determine whether a giv can be made replaceable because
5767 its final value can be calculated. This code can not be part of record_giv
5768 above, because final_giv_value requires that the number of loop iterations
5769 be known, and that can not be accurately calculated until after all givs
5770 have been identified. */
5773 check_final_value (loop, v)
5774 const struct loop *loop;
5775 struct induction *v;
5777 struct iv_class *bl;
5778 rtx final_value = 0;
5780 bl = reg_biv_class[REGNO (v->src_reg)];
5782 /* DEST_ADDR givs will never reach here, because they are always marked
5783 replaceable above in record_giv. */
5785 /* The giv can be replaced outright by the reduced register only if all
5786 of the following conditions are true:
5787 - the insn that sets the giv is always executed on any iteration
5788 on which the giv is used at all
5789 (there are two ways to deduce this:
5790 either the insn is executed on every iteration,
5791 or all uses follow that insn in the same basic block),
5792 - its final value can be calculated (this condition is different
5793 than the one above in record_giv)
5794 - no assignments to the biv occur during the giv's lifetime. */
5797 /* This is only called now when replaceable is known to be false. */
5798 /* Clear replaceable, so that it won't confuse final_giv_value. */
5802 if ((final_value = final_giv_value (loop, v))
5803 && (v->always_computable || last_use_this_basic_block (v->dest_reg, v->insn)))
5805 int biv_increment_seen = 0;
5811 /* When trying to determine whether or not a biv increment occurs
5812 during the lifetime of the giv, we can ignore uses of the variable
5813 outside the loop because final_value is true. Hence we can not
5814 use regno_last_uid and regno_first_uid as above in record_giv. */
5816 /* Search the loop to determine whether any assignments to the
5817 biv occur during the giv's lifetime. Start with the insn
5818 that sets the giv, and search around the loop until we come
5819 back to that insn again.
5821 Also fail if there is a jump within the giv's lifetime that jumps
5822 to somewhere outside the lifetime but still within the loop. This
5823 catches spaghetti code where the execution order is not linear, and
5824 hence the above test fails. Here we assume that the giv lifetime
5825 does not extend from one iteration of the loop to the next, so as
5826 to make the test easier. Since the lifetime isn't known yet,
5827 this requires two loops. See also record_giv above. */
5829 last_giv_use = v->insn;
5835 p = NEXT_INSN (loop->start);
5839 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
5840 || GET_CODE (p) == CALL_INSN)
5842 if (biv_increment_seen)
5844 if (reg_mentioned_p (v->dest_reg, PATTERN (p)))
5847 v->not_replaceable = 1;
5851 else if (reg_set_p (v->src_reg, PATTERN (p)))
5852 biv_increment_seen = 1;
5853 else if (reg_mentioned_p (v->dest_reg, PATTERN (p)))
5858 /* Now that the lifetime of the giv is known, check for branches
5859 from within the lifetime to outside the lifetime if it is still
5869 p = NEXT_INSN (loop->start);
5870 if (p == last_giv_use)
5873 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p)
5874 && LABEL_NAME (JUMP_LABEL (p))
5875 && ((loop_insn_first_p (JUMP_LABEL (p), v->insn)
5876 && loop_insn_first_p (loop->start, JUMP_LABEL (p)))
5877 || (loop_insn_first_p (last_giv_use, JUMP_LABEL (p))
5878 && loop_insn_first_p (JUMP_LABEL (p), loop->end))))
5881 v->not_replaceable = 1;
5883 if (loop_dump_stream)
5884 fprintf (loop_dump_stream,
5885 "Found branch outside giv lifetime.\n");
5892 /* If it is replaceable, then save the final value. */
5894 v->final_value = final_value;
5897 if (loop_dump_stream && v->replaceable)
5898 fprintf (loop_dump_stream, "Insn %d: giv reg %d final_value replaceable\n",
5899 INSN_UID (v->insn), REGNO (v->dest_reg));
5902 /* Update the status of whether a giv can derive other givs.
5904 We need to do something special if there is or may be an update to the biv
5905 between the time the giv is defined and the time it is used to derive
5908 In addition, a giv that is only conditionally set is not allowed to
5909 derive another giv once a label has been passed.
5911 The cases we look at are when a label or an update to a biv is passed. */
5914 update_giv_derive (loop, p)
5915 const struct loop *loop;
5918 struct iv_class *bl;
5919 struct induction *biv, *giv;
5923 /* Search all IV classes, then all bivs, and finally all givs.
5925 There are three cases we are concerned with. First we have the situation
5926 of a giv that is only updated conditionally. In that case, it may not
5927 derive any givs after a label is passed.
5929 The second case is when a biv update occurs, or may occur, after the
5930 definition of a giv. For certain biv updates (see below) that are
5931 known to occur between the giv definition and use, we can adjust the
5932 giv definition. For others, or when the biv update is conditional,
5933 we must prevent the giv from deriving any other givs. There are two
5934 sub-cases within this case.
5936 If this is a label, we are concerned with any biv update that is done
5937 conditionally, since it may be done after the giv is defined followed by
5938 a branch here (actually, we need to pass both a jump and a label, but
5939 this extra tracking doesn't seem worth it).
5941 If this is a jump, we are concerned about any biv update that may be
5942 executed multiple times. We are actually only concerned about
5943 backward jumps, but it is probably not worth performing the test
5944 on the jump again here.
5946 If this is a biv update, we must adjust the giv status to show that a
5947 subsequent biv update was performed. If this adjustment cannot be done,
5948 the giv cannot derive further givs. */
5950 for (bl = loop_iv_list; bl; bl = bl->next)
5951 for (biv = bl->biv; biv; biv = biv->next_iv)
5952 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN
5955 for (giv = bl->giv; giv; giv = giv->next_iv)
5957 /* If cant_derive is already true, there is no point in
5958 checking all of these conditions again. */
5959 if (giv->cant_derive)
5962 /* If this giv is conditionally set and we have passed a label,
5963 it cannot derive anything. */
5964 if (GET_CODE (p) == CODE_LABEL && ! giv->always_computable)
5965 giv->cant_derive = 1;
5967 /* Skip givs that have mult_val == 0, since
5968 they are really invariants. Also skip those that are
5969 replaceable, since we know their lifetime doesn't contain
5971 else if (giv->mult_val == const0_rtx || giv->replaceable)
5974 /* The only way we can allow this giv to derive another
5975 is if this is a biv increment and we can form the product
5976 of biv->add_val and giv->mult_val. In this case, we will
5977 be able to compute a compensation. */
5978 else if (biv->insn == p)
5982 if (biv->mult_val == const1_rtx)
5983 tem = simplify_giv_expr (loop,
5984 gen_rtx_MULT (giv->mode,
5989 if (tem && giv->derive_adjustment)
5990 tem = simplify_giv_expr
5992 gen_rtx_PLUS (giv->mode, tem, giv->derive_adjustment),
5996 giv->derive_adjustment = tem;
5998 giv->cant_derive = 1;
6000 else if ((GET_CODE (p) == CODE_LABEL && ! biv->always_computable)
6001 || (GET_CODE (p) == JUMP_INSN && biv->maybe_multiple))
6002 giv->cant_derive = 1;
6007 /* Check whether an insn is an increment legitimate for a basic induction var.
6008 X is the source of insn P, or a part of it.
6009 MODE is the mode in which X should be interpreted.
6011 DEST_REG is the putative biv, also the destination of the insn.
6012 We accept patterns of these forms:
6013 REG = REG + INVARIANT (includes REG = REG - CONSTANT)
6014 REG = INVARIANT + REG
6016 If X is suitable, we return 1, set *MULT_VAL to CONST1_RTX,
6017 store the additive term into *INC_VAL, and store the place where
6018 we found the additive term into *LOCATION.
6020 If X is an assignment of an invariant into DEST_REG, we set
6021 *MULT_VAL to CONST0_RTX, and store the invariant into *INC_VAL.
6023 We also want to detect a BIV when it corresponds to a variable
6024 whose mode was promoted via PROMOTED_MODE. In that case, an increment
6025 of the variable may be a PLUS that adds a SUBREG of that variable to
6026 an invariant and then sign- or zero-extends the result of the PLUS
6029 Most GIVs in such cases will be in the promoted mode, since that is the
6030 probably the natural computation mode (and almost certainly the mode
6031 used for addresses) on the machine. So we view the pseudo-reg containing
6032 the variable as the BIV, as if it were simply incremented.
6034 Note that treating the entire pseudo as a BIV will result in making
6035 simple increments to any GIVs based on it. However, if the variable
6036 overflows in its declared mode but not its promoted mode, the result will
6037 be incorrect. This is acceptable if the variable is signed, since
6038 overflows in such cases are undefined, but not if it is unsigned, since
6039 those overflows are defined. So we only check for SIGN_EXTEND and
6042 If we cannot find a biv, we return 0. */
6045 basic_induction_var (loop, x, mode, dest_reg, p, inc_val, mult_val,
6046 location, multi_insn_incr)
6047 const struct loop *loop;
6049 enum machine_mode mode;
6055 int *multi_insn_incr;
6057 register enum rtx_code code;
6061 code = GET_CODE (x);
6066 if (rtx_equal_p (XEXP (x, 0), dest_reg)
6067 || (GET_CODE (XEXP (x, 0)) == SUBREG
6068 && SUBREG_PROMOTED_VAR_P (XEXP (x, 0))
6069 && SUBREG_REG (XEXP (x, 0)) == dest_reg))
6071 argp = &XEXP (x, 1);
6073 else if (rtx_equal_p (XEXP (x, 1), dest_reg)
6074 || (GET_CODE (XEXP (x, 1)) == SUBREG
6075 && SUBREG_PROMOTED_VAR_P (XEXP (x, 1))
6076 && SUBREG_REG (XEXP (x, 1)) == dest_reg))
6078 argp = &XEXP (x, 0);
6084 if (loop_invariant_p (loop, arg) != 1)
6087 *inc_val = convert_modes (GET_MODE (dest_reg), GET_MODE (x), arg, 0);
6088 *mult_val = const1_rtx;
6093 /* If this is a SUBREG for a promoted variable, check the inner
6095 if (SUBREG_PROMOTED_VAR_P (x))
6096 return basic_induction_var (loop, SUBREG_REG (x),
6097 GET_MODE (SUBREG_REG (x)),
6098 dest_reg, p, inc_val, mult_val, location,
6103 /* If this register is assigned in a previous insn, look at its
6104 source, but don't go outside the loop or past a label. */
6110 insn = PREV_INSN (insn);
6111 } while (insn && GET_CODE (insn) == NOTE
6112 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG);
6116 set = single_set (insn);
6120 if ((SET_DEST (set) == x
6121 || (GET_CODE (SET_DEST (set)) == SUBREG
6122 && (GET_MODE_SIZE (GET_MODE (SET_DEST (set)))
6124 && (GET_MODE_CLASS (GET_MODE (SET_DEST (set)))
6126 && SUBREG_REG (SET_DEST (set)) == x))
6127 && basic_induction_var (loop, SET_SRC (set),
6128 (GET_MODE (SET_SRC (set)) == VOIDmode
6130 : GET_MODE (SET_SRC (set))),
6132 inc_val, mult_val, location,
6135 *multi_insn_incr = 1;
6139 /* ... fall through ... */
6141 /* Can accept constant setting of biv only when inside inner most loop.
6142 Otherwise, a biv of an inner loop may be incorrectly recognized
6143 as a biv of the outer loop,
6144 causing code to be moved INTO the inner loop. */
6146 if (loop_invariant_p (loop, x) != 1)
6151 /* convert_modes aborts if we try to convert to or from CCmode, so just
6152 exclude that case. It is very unlikely that a condition code value
6153 would be a useful iterator anyways. */
6154 if (loop->level == 1
6155 && GET_MODE_CLASS (mode) != MODE_CC
6156 && GET_MODE_CLASS (GET_MODE (dest_reg)) != MODE_CC)
6158 /* Possible bug here? Perhaps we don't know the mode of X. */
6159 *inc_val = convert_modes (GET_MODE (dest_reg), mode, x, 0);
6160 *mult_val = const0_rtx;
6167 return basic_induction_var (loop, XEXP (x, 0), GET_MODE (XEXP (x, 0)),
6168 dest_reg, p, inc_val, mult_val, location,
6172 /* Similar, since this can be a sign extension. */
6173 for (insn = PREV_INSN (p);
6174 (insn && GET_CODE (insn) == NOTE
6175 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG);
6176 insn = PREV_INSN (insn))
6180 set = single_set (insn);
6182 if (set && SET_DEST (set) == XEXP (x, 0)
6183 && GET_CODE (XEXP (x, 1)) == CONST_INT
6184 && INTVAL (XEXP (x, 1)) >= 0
6185 && GET_CODE (SET_SRC (set)) == ASHIFT
6186 && XEXP (x, 1) == XEXP (SET_SRC (set), 1)
6187 && basic_induction_var (loop, XEXP (SET_SRC (set), 0),
6188 GET_MODE (XEXP (x, 0)),
6189 dest_reg, insn, inc_val, mult_val,
6190 location, multi_insn_incr))
6192 *multi_insn_incr = 1;
6202 /* A general induction variable (giv) is any quantity that is a linear
6203 function of a basic induction variable,
6204 i.e. giv = biv * mult_val + add_val.
6205 The coefficients can be any loop invariant quantity.
6206 A giv need not be computed directly from the biv;
6207 it can be computed by way of other givs. */
6209 /* Determine whether X computes a giv.
6210 If it does, return a nonzero value
6211 which is the benefit from eliminating the computation of X;
6212 set *SRC_REG to the register of the biv that it is computed from;
6213 set *ADD_VAL and *MULT_VAL to the coefficients,
6214 such that the value of X is biv * mult + add; */
6217 general_induction_var (loop, x, src_reg, add_val, mult_val, is_addr, pbenefit)
6218 const struct loop *loop;
6229 /* If this is an invariant, forget it, it isn't a giv. */
6230 if (loop_invariant_p (loop, x) == 1)
6233 /* See if the expression could be a giv and get its form.
6234 Mark our place on the obstack in case we don't find a giv. */
6235 storage = (char *) oballoc (0);
6237 x = simplify_giv_expr (loop, x, pbenefit);
6244 switch (GET_CODE (x))
6248 /* Since this is now an invariant and wasn't before, it must be a giv
6249 with MULT_VAL == 0. It doesn't matter which BIV we associate this
6251 *src_reg = loop_iv_list->biv->dest_reg;
6252 *mult_val = const0_rtx;
6257 /* This is equivalent to a BIV. */
6259 *mult_val = const1_rtx;
6260 *add_val = const0_rtx;
6264 /* Either (plus (biv) (invar)) or
6265 (plus (mult (biv) (invar_1)) (invar_2)). */
6266 if (GET_CODE (XEXP (x, 0)) == MULT)
6268 *src_reg = XEXP (XEXP (x, 0), 0);
6269 *mult_val = XEXP (XEXP (x, 0), 1);
6273 *src_reg = XEXP (x, 0);
6274 *mult_val = const1_rtx;
6276 *add_val = XEXP (x, 1);
6280 /* ADD_VAL is zero. */
6281 *src_reg = XEXP (x, 0);
6282 *mult_val = XEXP (x, 1);
6283 *add_val = const0_rtx;
6290 /* Remove any enclosing USE from ADD_VAL and MULT_VAL (there will be
6291 unless they are CONST_INT). */
6292 if (GET_CODE (*add_val) == USE)
6293 *add_val = XEXP (*add_val, 0);
6294 if (GET_CODE (*mult_val) == USE)
6295 *mult_val = XEXP (*mult_val, 0);
6300 *pbenefit += ADDRESS_COST (orig_x) - reg_address_cost;
6302 *pbenefit += rtx_cost (orig_x, MEM) - reg_address_cost;
6306 *pbenefit += rtx_cost (orig_x, SET);
6308 /* Always return true if this is a giv so it will be detected as such,
6309 even if the benefit is zero or negative. This allows elimination
6310 of bivs that might otherwise not be eliminated. */
6314 /* Given an expression, X, try to form it as a linear function of a biv.
6315 We will canonicalize it to be of the form
6316 (plus (mult (BIV) (invar_1))
6318 with possible degeneracies.
6320 The invariant expressions must each be of a form that can be used as a
6321 machine operand. We surround then with a USE rtx (a hack, but localized
6322 and certainly unambiguous!) if not a CONST_INT for simplicity in this
6323 routine; it is the caller's responsibility to strip them.
6325 If no such canonicalization is possible (i.e., two biv's are used or an
6326 expression that is neither invariant nor a biv or giv), this routine
6329 For a non-zero return, the result will have a code of CONST_INT, USE,
6330 REG (for a BIV), PLUS, or MULT. No other codes will occur.
6332 *BENEFIT will be incremented by the benefit of any sub-giv encountered. */
6334 static rtx sge_plus PARAMS ((enum machine_mode, rtx, rtx));
6335 static rtx sge_plus_constant PARAMS ((rtx, rtx));
6336 static int cmp_combine_givs_stats PARAMS ((const PTR, const PTR));
6337 static int cmp_recombine_givs_stats PARAMS ((const PTR, const PTR));
6340 simplify_giv_expr (loop, x, benefit)
6341 const struct loop *loop;
6345 enum machine_mode mode = GET_MODE (x);
6349 /* If this is not an integer mode, or if we cannot do arithmetic in this
6350 mode, this can't be a giv. */
6351 if (mode != VOIDmode
6352 && (GET_MODE_CLASS (mode) != MODE_INT
6353 || GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT))
6356 switch (GET_CODE (x))
6359 arg0 = simplify_giv_expr (loop, XEXP (x, 0), benefit);
6360 arg1 = simplify_giv_expr (loop, XEXP (x, 1), benefit);
6361 if (arg0 == 0 || arg1 == 0)
6364 /* Put constant last, CONST_INT last if both constant. */
6365 if ((GET_CODE (arg0) == USE
6366 || GET_CODE (arg0) == CONST_INT)
6367 && ! ((GET_CODE (arg0) == USE
6368 && GET_CODE (arg1) == USE)
6369 || GET_CODE (arg1) == CONST_INT))
6370 tem = arg0, arg0 = arg1, arg1 = tem;
6372 /* Handle addition of zero, then addition of an invariant. */
6373 if (arg1 == const0_rtx)
6375 else if (GET_CODE (arg1) == CONST_INT || GET_CODE (arg1) == USE)
6376 switch (GET_CODE (arg0))
6380 /* Adding two invariants must result in an invariant, so enclose
6381 addition operation inside a USE and return it. */
6382 if (GET_CODE (arg0) == USE)
6383 arg0 = XEXP (arg0, 0);
6384 if (GET_CODE (arg1) == USE)
6385 arg1 = XEXP (arg1, 0);
6387 if (GET_CODE (arg0) == CONST_INT)
6388 tem = arg0, arg0 = arg1, arg1 = tem;
6389 if (GET_CODE (arg1) == CONST_INT)
6390 tem = sge_plus_constant (arg0, arg1);
6392 tem = sge_plus (mode, arg0, arg1);
6394 if (GET_CODE (tem) != CONST_INT)
6395 tem = gen_rtx_USE (mode, tem);
6400 /* biv + invar or mult + invar. Return sum. */
6401 return gen_rtx_PLUS (mode, arg0, arg1);
6404 /* (a + invar_1) + invar_2. Associate. */
6406 simplify_giv_expr (loop,
6418 /* Each argument must be either REG, PLUS, or MULT. Convert REG to
6419 MULT to reduce cases. */
6420 if (GET_CODE (arg0) == REG)
6421 arg0 = gen_rtx_MULT (mode, arg0, const1_rtx);
6422 if (GET_CODE (arg1) == REG)
6423 arg1 = gen_rtx_MULT (mode, arg1, const1_rtx);
6425 /* Now have PLUS + PLUS, PLUS + MULT, MULT + PLUS, or MULT + MULT.
6426 Put a MULT first, leaving PLUS + PLUS, MULT + PLUS, or MULT + MULT.
6427 Recurse to associate the second PLUS. */
6428 if (GET_CODE (arg1) == MULT)
6429 tem = arg0, arg0 = arg1, arg1 = tem;
6431 if (GET_CODE (arg1) == PLUS)
6433 simplify_giv_expr (loop,
6435 gen_rtx_PLUS (mode, arg0,
6440 /* Now must have MULT + MULT. Distribute if same biv, else not giv. */
6441 if (GET_CODE (arg0) != MULT || GET_CODE (arg1) != MULT)
6444 if (!rtx_equal_p (arg0, arg1))
6447 return simplify_giv_expr (loop,
6456 /* Handle "a - b" as "a + b * (-1)". */
6457 return simplify_giv_expr (loop,
6466 arg0 = simplify_giv_expr (loop, XEXP (x, 0), benefit);
6467 arg1 = simplify_giv_expr (loop, XEXP (x, 1), benefit);
6468 if (arg0 == 0 || arg1 == 0)
6471 /* Put constant last, CONST_INT last if both constant. */
6472 if ((GET_CODE (arg0) == USE || GET_CODE (arg0) == CONST_INT)
6473 && GET_CODE (arg1) != CONST_INT)
6474 tem = arg0, arg0 = arg1, arg1 = tem;
6476 /* If second argument is not now constant, not giv. */
6477 if (GET_CODE (arg1) != USE && GET_CODE (arg1) != CONST_INT)
6480 /* Handle multiply by 0 or 1. */
6481 if (arg1 == const0_rtx)
6484 else if (arg1 == const1_rtx)
6487 switch (GET_CODE (arg0))
6490 /* biv * invar. Done. */
6491 return gen_rtx_MULT (mode, arg0, arg1);
6494 /* Product of two constants. */
6495 return GEN_INT (INTVAL (arg0) * INTVAL (arg1));
6498 /* invar * invar. It is a giv, but very few of these will
6499 actually pay off, so limit to simple registers. */
6500 if (GET_CODE (arg1) != CONST_INT)
6503 arg0 = XEXP (arg0, 0);
6504 if (GET_CODE (arg0) == REG)
6505 tem = gen_rtx_MULT (mode, arg0, arg1);
6506 else if (GET_CODE (arg0) == MULT
6507 && GET_CODE (XEXP (arg0, 0)) == REG
6508 && GET_CODE (XEXP (arg0, 1)) == CONST_INT)
6510 tem = gen_rtx_MULT (mode, XEXP (arg0, 0),
6511 GEN_INT (INTVAL (XEXP (arg0, 1))
6516 return gen_rtx_USE (mode, tem);
6519 /* (a * invar_1) * invar_2. Associate. */
6520 return simplify_giv_expr (loop,
6529 /* (a + invar_1) * invar_2. Distribute. */
6530 return simplify_giv_expr (loop,
6545 /* Shift by constant is multiply by power of two. */
6546 if (GET_CODE (XEXP (x, 1)) != CONST_INT)
6550 simplify_giv_expr (loop,
6553 GEN_INT ((HOST_WIDE_INT) 1
6554 << INTVAL (XEXP (x, 1)))),
6558 /* "-a" is "a * (-1)" */
6559 return simplify_giv_expr (loop,
6560 gen_rtx_MULT (mode, XEXP (x, 0), constm1_rtx),
6564 /* "~a" is "-a - 1". Silly, but easy. */
6565 return simplify_giv_expr (loop,
6566 gen_rtx_MINUS (mode,
6567 gen_rtx_NEG (mode, XEXP (x, 0)),
6572 /* Already in proper form for invariant. */
6576 /* If this is a new register, we can't deal with it. */
6577 if (REGNO (x) >= max_reg_before_loop)
6580 /* Check for biv or giv. */
6581 switch (REG_IV_TYPE (REGNO (x)))
6585 case GENERAL_INDUCT:
6587 struct induction *v = REG_IV_INFO (REGNO (x));
6589 /* Form expression from giv and add benefit. Ensure this giv
6590 can derive another and subtract any needed adjustment if so. */
6591 *benefit += v->benefit;
6595 tem = gen_rtx_PLUS (mode, gen_rtx_MULT (mode,
6596 v->src_reg, v->mult_val),
6599 if (v->derive_adjustment)
6600 tem = gen_rtx_MINUS (mode, tem, v->derive_adjustment);
6601 return simplify_giv_expr (loop, tem, benefit);
6605 /* If it isn't an induction variable, and it is invariant, we
6606 may be able to simplify things further by looking through
6607 the bits we just moved outside the loop. */
6608 if (loop_invariant_p (loop, x) == 1)
6612 for (m = the_movables; m ; m = m->next)
6613 if (rtx_equal_p (x, m->set_dest))
6615 /* Ok, we found a match. Substitute and simplify. */
6617 /* If we match another movable, we must use that, as
6618 this one is going away. */
6620 return simplify_giv_expr (loop, m->match->set_dest,
6623 /* If consec is non-zero, this is a member of a group of
6624 instructions that were moved together. We handle this
6625 case only to the point of seeking to the last insn and
6626 looking for a REG_EQUAL. Fail if we don't find one. */
6631 do { tem = NEXT_INSN (tem); } while (--i > 0);
6633 tem = find_reg_note (tem, REG_EQUAL, NULL_RTX);
6635 tem = XEXP (tem, 0);
6639 tem = single_set (m->insn);
6641 tem = SET_SRC (tem);
6646 /* What we are most interested in is pointer
6647 arithmetic on invariants -- only take
6648 patterns we may be able to do something with. */
6649 if (GET_CODE (tem) == PLUS
6650 || GET_CODE (tem) == MULT
6651 || GET_CODE (tem) == ASHIFT
6652 || GET_CODE (tem) == CONST_INT
6653 || GET_CODE (tem) == SYMBOL_REF)
6655 tem = simplify_giv_expr (loop, tem, benefit);
6659 else if (GET_CODE (tem) == CONST
6660 && GET_CODE (XEXP (tem, 0)) == PLUS
6661 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == SYMBOL_REF
6662 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)
6664 tem = simplify_giv_expr (loop, XEXP (tem, 0),
6676 /* Fall through to general case. */
6678 /* If invariant, return as USE (unless CONST_INT).
6679 Otherwise, not giv. */
6680 if (GET_CODE (x) == USE)
6683 if (loop_invariant_p (loop, x) == 1)
6685 if (GET_CODE (x) == CONST_INT)
6687 if (GET_CODE (x) == CONST
6688 && GET_CODE (XEXP (x, 0)) == PLUS
6689 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
6690 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
6692 return gen_rtx_USE (mode, x);
6699 /* This routine folds invariants such that there is only ever one
6700 CONST_INT in the summation. It is only used by simplify_giv_expr. */
6703 sge_plus_constant (x, c)
6706 if (GET_CODE (x) == CONST_INT)
6707 return GEN_INT (INTVAL (x) + INTVAL (c));
6708 else if (GET_CODE (x) != PLUS)
6709 return gen_rtx_PLUS (GET_MODE (x), x, c);
6710 else if (GET_CODE (XEXP (x, 1)) == CONST_INT)
6712 return gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0),
6713 GEN_INT (INTVAL (XEXP (x, 1)) + INTVAL (c)));
6715 else if (GET_CODE (XEXP (x, 0)) == PLUS
6716 || GET_CODE (XEXP (x, 1)) != PLUS)
6718 return gen_rtx_PLUS (GET_MODE (x),
6719 sge_plus_constant (XEXP (x, 0), c), XEXP (x, 1));
6723 return gen_rtx_PLUS (GET_MODE (x),
6724 sge_plus_constant (XEXP (x, 1), c), XEXP (x, 0));
6729 sge_plus (mode, x, y)
6730 enum machine_mode mode;
6733 while (GET_CODE (y) == PLUS)
6735 rtx a = XEXP (y, 0);
6736 if (GET_CODE (a) == CONST_INT)
6737 x = sge_plus_constant (x, a);
6739 x = gen_rtx_PLUS (mode, x, a);
6742 if (GET_CODE (y) == CONST_INT)
6743 x = sge_plus_constant (x, y);
6745 x = gen_rtx_PLUS (mode, x, y);
6749 /* Help detect a giv that is calculated by several consecutive insns;
6753 The caller has already identified the first insn P as having a giv as dest;
6754 we check that all other insns that set the same register follow
6755 immediately after P, that they alter nothing else,
6756 and that the result of the last is still a giv.
6758 The value is 0 if the reg set in P is not really a giv.
6759 Otherwise, the value is the amount gained by eliminating
6760 all the consecutive insns that compute the value.
6762 FIRST_BENEFIT is the amount gained by eliminating the first insn, P.
6763 SRC_REG is the reg of the biv; DEST_REG is the reg of the giv.
6765 The coefficients of the ultimate giv value are stored in
6766 *MULT_VAL and *ADD_VAL. */
6769 consec_sets_giv (loop, first_benefit, p, src_reg, dest_reg,
6770 add_val, mult_val, last_consec_insn)
6771 const struct loop *loop;
6778 rtx *last_consec_insn;
6786 /* Indicate that this is a giv so that we can update the value produced in
6787 each insn of the multi-insn sequence.
6789 This induction structure will be used only by the call to
6790 general_induction_var below, so we can allocate it on our stack.
6791 If this is a giv, our caller will replace the induct var entry with
6792 a new induction structure. */
6794 = (struct induction *) alloca (sizeof (struct induction));
6795 v->src_reg = src_reg;
6796 v->mult_val = *mult_val;
6797 v->add_val = *add_val;
6798 v->benefit = first_benefit;
6800 v->derive_adjustment = 0;
6802 REG_IV_TYPE (REGNO (dest_reg)) = GENERAL_INDUCT;
6803 REG_IV_INFO (REGNO (dest_reg)) = v;
6805 count = VARRAY_INT (n_times_set, REGNO (dest_reg)) - 1;
6810 code = GET_CODE (p);
6812 /* If libcall, skip to end of call sequence. */
6813 if (code == INSN && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
6817 && (set = single_set (p))
6818 && GET_CODE (SET_DEST (set)) == REG
6819 && SET_DEST (set) == dest_reg
6820 && (general_induction_var (loop, SET_SRC (set), &src_reg,
6821 add_val, mult_val, 0, &benefit)
6822 /* Giv created by equivalent expression. */
6823 || ((temp = find_reg_note (p, REG_EQUAL, NULL_RTX))
6824 && general_induction_var (loop, XEXP (temp, 0), &src_reg,
6825 add_val, mult_val, 0, &benefit)))
6826 && src_reg == v->src_reg)
6828 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
6829 benefit += libcall_benefit (p);
6832 v->mult_val = *mult_val;
6833 v->add_val = *add_val;
6834 v->benefit = benefit;
6836 else if (code != NOTE)
6838 /* Allow insns that set something other than this giv to a
6839 constant. Such insns are needed on machines which cannot
6840 include long constants and should not disqualify a giv. */
6842 && (set = single_set (p))
6843 && SET_DEST (set) != dest_reg
6844 && CONSTANT_P (SET_SRC (set)))
6847 REG_IV_TYPE (REGNO (dest_reg)) = UNKNOWN_INDUCT;
6852 *last_consec_insn = p;
6856 /* Return an rtx, if any, that expresses giv G2 as a function of the register
6857 represented by G1. If no such expression can be found, or it is clear that
6858 it cannot possibly be a valid address, 0 is returned.
6860 To perform the computation, we note that
6863 where `v' is the biv.
6865 So G2 = (y/b) * G1 + (b - a*y/x).
6867 Note that MULT = y/x.
6869 Update: A and B are now allowed to be additive expressions such that
6870 B contains all variables in A. That is, computing B-A will not require
6871 subtracting variables. */
6874 express_from_1 (a, b, mult)
6877 /* If MULT is zero, then A*MULT is zero, and our expression is B. */
6879 if (mult == const0_rtx)
6882 /* If MULT is not 1, we cannot handle A with non-constants, since we
6883 would then be required to subtract multiples of the registers in A.
6884 This is theoretically possible, and may even apply to some Fortran
6885 constructs, but it is a lot of work and we do not attempt it here. */
6887 if (mult != const1_rtx && GET_CODE (a) != CONST_INT)
6890 /* In general these structures are sorted top to bottom (down the PLUS
6891 chain), but not left to right across the PLUS. If B is a higher
6892 order giv than A, we can strip one level and recurse. If A is higher
6893 order, we'll eventually bail out, but won't know that until the end.
6894 If they are the same, we'll strip one level around this loop. */
6896 while (GET_CODE (a) == PLUS && GET_CODE (b) == PLUS)
6898 rtx ra, rb, oa, ob, tmp;
6900 ra = XEXP (a, 0), oa = XEXP (a, 1);
6901 if (GET_CODE (ra) == PLUS)
6902 tmp = ra, ra = oa, oa = tmp;
6904 rb = XEXP (b, 0), ob = XEXP (b, 1);
6905 if (GET_CODE (rb) == PLUS)
6906 tmp = rb, rb = ob, ob = tmp;
6908 if (rtx_equal_p (ra, rb))
6909 /* We matched: remove one reg completely. */
6911 else if (GET_CODE (ob) != PLUS && rtx_equal_p (ra, ob))
6912 /* An alternate match. */
6914 else if (GET_CODE (oa) != PLUS && rtx_equal_p (oa, rb))
6915 /* An alternate match. */
6919 /* Indicates an extra register in B. Strip one level from B and
6920 recurse, hoping B was the higher order expression. */
6921 ob = express_from_1 (a, ob, mult);
6924 return gen_rtx_PLUS (GET_MODE (b), rb, ob);
6928 /* Here we are at the last level of A, go through the cases hoping to
6929 get rid of everything but a constant. */
6931 if (GET_CODE (a) == PLUS)
6935 ra = XEXP (a, 0), oa = XEXP (a, 1);
6936 if (rtx_equal_p (oa, b))
6938 else if (!rtx_equal_p (ra, b))
6941 if (GET_CODE (oa) != CONST_INT)
6944 return GEN_INT (-INTVAL (oa) * INTVAL (mult));
6946 else if (GET_CODE (a) == CONST_INT)
6948 return plus_constant (b, -INTVAL (a) * INTVAL (mult));
6950 else if (GET_CODE (b) == PLUS)
6952 if (rtx_equal_p (a, XEXP (b, 0)))
6954 else if (rtx_equal_p (a, XEXP (b, 1)))
6959 else if (rtx_equal_p (a, b))
6966 express_from (g1, g2)
6967 struct induction *g1, *g2;
6971 /* The value that G1 will be multiplied by must be a constant integer. Also,
6972 the only chance we have of getting a valid address is if b*c/a (see above
6973 for notation) is also an integer. */
6974 if (GET_CODE (g1->mult_val) == CONST_INT
6975 && GET_CODE (g2->mult_val) == CONST_INT)
6977 if (g1->mult_val == const0_rtx
6978 || INTVAL (g2->mult_val) % INTVAL (g1->mult_val) != 0)
6980 mult = GEN_INT (INTVAL (g2->mult_val) / INTVAL (g1->mult_val));
6982 else if (rtx_equal_p (g1->mult_val, g2->mult_val))
6986 /* ??? Find out if the one is a multiple of the other? */
6990 add = express_from_1 (g1->add_val, g2->add_val, mult);
6991 if (add == NULL_RTX)
6993 /* Failed. If we've got a multiplication factor between G1 and G2,
6994 scale G1's addend and try again. */
6995 if (INTVAL (mult) > 1)
6997 rtx g1_add_val = g1->add_val;
6998 if (GET_CODE (g1_add_val) == MULT
6999 && GET_CODE (XEXP (g1_add_val, 1)) == CONST_INT)
7002 m = INTVAL (mult) * INTVAL (XEXP (g1_add_val, 1));
7003 g1_add_val = gen_rtx_MULT (GET_MODE (g1_add_val),
7004 XEXP (g1_add_val, 0), GEN_INT (m));
7008 g1_add_val = gen_rtx_MULT (GET_MODE (g1_add_val), g1_add_val,
7012 add = express_from_1 (g1_add_val, g2->add_val, const1_rtx);
7015 if (add == NULL_RTX)
7018 /* Form simplified final result. */
7019 if (mult == const0_rtx)
7021 else if (mult == const1_rtx)
7022 mult = g1->dest_reg;
7024 mult = gen_rtx_MULT (g2->mode, g1->dest_reg, mult);
7026 if (add == const0_rtx)
7030 if (GET_CODE (add) == PLUS
7031 && CONSTANT_P (XEXP (add, 1)))
7033 rtx tem = XEXP (add, 1);
7034 mult = gen_rtx_PLUS (g2->mode, mult, XEXP (add, 0));
7038 return gen_rtx_PLUS (g2->mode, mult, add);
7043 /* Return an rtx, if any, that expresses giv G2 as a function of the register
7044 represented by G1. This indicates that G2 should be combined with G1 and
7045 that G2 can use (either directly or via an address expression) a register
7046 used to represent G1. */
7049 combine_givs_p (g1, g2)
7050 struct induction *g1, *g2;
7052 rtx tem = express_from (g1, g2);
7054 /* If these givs are identical, they can be combined. We use the results
7055 of express_from because the addends are not in a canonical form, so
7056 rtx_equal_p is a weaker test. */
7057 /* But don't combine a DEST_REG giv with a DEST_ADDR giv; we want the
7058 combination to be the other way round. */
7059 if (tem == g1->dest_reg
7060 && (g1->giv_type == DEST_REG || g2->giv_type == DEST_ADDR))
7062 return g1->dest_reg;
7065 /* If G2 can be expressed as a function of G1 and that function is valid
7066 as an address and no more expensive than using a register for G2,
7067 the expression of G2 in terms of G1 can be used. */
7069 && g2->giv_type == DEST_ADDR
7070 && memory_address_p (g2->mem_mode, tem)
7071 /* ??? Looses, especially with -fforce-addr, where *g2->location
7072 will always be a register, and so anything more complicated
7076 && ADDRESS_COST (tem) <= ADDRESS_COST (*g2->location)
7078 && rtx_cost (tem, MEM) <= rtx_cost (*g2->location, MEM)
7089 struct combine_givs_stats
7096 cmp_combine_givs_stats (xp, yp)
7100 const struct combine_givs_stats * const x =
7101 (const struct combine_givs_stats *) xp;
7102 const struct combine_givs_stats * const y =
7103 (const struct combine_givs_stats *) yp;
7105 d = y->total_benefit - x->total_benefit;
7106 /* Stabilize the sort. */
7108 d = x->giv_number - y->giv_number;
7112 /* Check all pairs of givs for iv_class BL and see if any can be combined with
7113 any other. If so, point SAME to the giv combined with and set NEW_REG to
7114 be an expression (in terms of the other giv's DEST_REG) equivalent to the
7115 giv. Also, update BENEFIT and related fields for cost/benefit analysis. */
7119 struct iv_class *bl;
7121 /* Additional benefit to add for being combined multiple times. */
7122 const int extra_benefit = 3;
7124 struct induction *g1, *g2, **giv_array;
7125 int i, j, k, giv_count;
7126 struct combine_givs_stats *stats;
7129 /* Count givs, because bl->giv_count is incorrect here. */
7131 for (g1 = bl->giv; g1; g1 = g1->next_iv)
7136 = (struct induction **) alloca (giv_count * sizeof (struct induction *));
7138 for (g1 = bl->giv; g1; g1 = g1->next_iv)
7140 giv_array[i++] = g1;
7142 stats = (struct combine_givs_stats *) xcalloc (giv_count, sizeof (*stats));
7143 can_combine = (rtx *) xcalloc (giv_count, giv_count * sizeof(rtx));
7145 for (i = 0; i < giv_count; i++)
7151 stats[i].giv_number = i;
7153 /* If a DEST_REG GIV is used only once, do not allow it to combine
7154 with anything, for in doing so we will gain nothing that cannot
7155 be had by simply letting the GIV with which we would have combined
7156 to be reduced on its own. The losage shows up in particular with
7157 DEST_ADDR targets on hosts with reg+reg addressing, though it can
7158 be seen elsewhere as well. */
7159 if (g1->giv_type == DEST_REG
7160 && (single_use = VARRAY_RTX (reg_single_usage, REGNO (g1->dest_reg)))
7161 && single_use != const0_rtx)
7164 this_benefit = g1->benefit;
7165 /* Add an additional weight for zero addends. */
7166 if (g1->no_const_addval)
7169 for (j = 0; j < giv_count; j++)
7175 && (this_combine = combine_givs_p (g1, g2)) != NULL_RTX)
7177 can_combine[i*giv_count + j] = this_combine;
7178 this_benefit += g2->benefit + extra_benefit;
7181 stats[i].total_benefit = this_benefit;
7184 /* Iterate, combining until we can't. */
7186 qsort (stats, giv_count, sizeof(*stats), cmp_combine_givs_stats);
7188 if (loop_dump_stream)
7190 fprintf (loop_dump_stream, "Sorted combine statistics:\n");
7191 for (k = 0; k < giv_count; k++)
7193 g1 = giv_array[stats[k].giv_number];
7194 if (!g1->combined_with && !g1->same)
7195 fprintf (loop_dump_stream, " {%d, %d}",
7196 INSN_UID (giv_array[stats[k].giv_number]->insn),
7197 stats[k].total_benefit);
7199 putc ('\n', loop_dump_stream);
7202 for (k = 0; k < giv_count; k++)
7204 int g1_add_benefit = 0;
7206 i = stats[k].giv_number;
7209 /* If it has already been combined, skip. */
7210 if (g1->combined_with || g1->same)
7213 for (j = 0; j < giv_count; j++)
7216 if (g1 != g2 && can_combine[i*giv_count + j]
7217 /* If it has already been combined, skip. */
7218 && ! g2->same && ! g2->combined_with)
7222 g2->new_reg = can_combine[i*giv_count + j];
7224 g1->combined_with++;
7225 g1->lifetime += g2->lifetime;
7227 g1_add_benefit += g2->benefit;
7229 /* ??? The new final_[bg]iv_value code does a much better job
7230 of finding replaceable giv's, and hence this code may no
7231 longer be necessary. */
7232 if (! g2->replaceable && REG_USERVAR_P (g2->dest_reg))
7233 g1_add_benefit -= copy_cost;
7235 /* To help optimize the next set of combinations, remove
7236 this giv from the benefits of other potential mates. */
7237 for (l = 0; l < giv_count; ++l)
7239 int m = stats[l].giv_number;
7240 if (can_combine[m*giv_count + j])
7241 stats[l].total_benefit -= g2->benefit + extra_benefit;
7244 if (loop_dump_stream)
7245 fprintf (loop_dump_stream,
7246 "giv at %d combined with giv at %d\n",
7247 INSN_UID (g2->insn), INSN_UID (g1->insn));
7251 /* To help optimize the next set of combinations, remove
7252 this giv from the benefits of other potential mates. */
7253 if (g1->combined_with)
7255 for (j = 0; j < giv_count; ++j)
7257 int m = stats[j].giv_number;
7258 if (can_combine[m*giv_count + i])
7259 stats[j].total_benefit -= g1->benefit + extra_benefit;
7262 g1->benefit += g1_add_benefit;
7264 /* We've finished with this giv, and everything it touched.
7265 Restart the combination so that proper weights for the
7266 rest of the givs are properly taken into account. */
7267 /* ??? Ideally we would compact the arrays at this point, so
7268 as to not cover old ground. But sanely compacting
7269 can_combine is tricky. */
7279 struct recombine_givs_stats
7282 int start_luid, end_luid;
7285 /* Used below as comparison function for qsort. We want a ascending luid
7286 when scanning the array starting at the end, thus the arguments are
7289 cmp_recombine_givs_stats (xp, yp)
7293 const struct recombine_givs_stats * const x =
7294 (const struct recombine_givs_stats *) xp;
7295 const struct recombine_givs_stats * const y =
7296 (const struct recombine_givs_stats *) yp;
7298 d = y->start_luid - x->start_luid;
7299 /* Stabilize the sort. */
7301 d = y->giv_number - x->giv_number;
7305 /* Scan X, which is a part of INSN, for the end of life of a giv. Also
7306 look for the start of life of a giv where the start has not been seen
7307 yet to unlock the search for the end of its life.
7308 Only consider givs that belong to BIV.
7309 Return the total number of lifetime ends that have been found. */
7311 find_life_end (x, stats, insn, biv)
7313 struct recombine_givs_stats *stats;
7320 code = GET_CODE (x);
7325 rtx reg = SET_DEST (x);
7326 if (GET_CODE (reg) == REG)
7328 int regno = REGNO (reg);
7329 struct induction *v = REG_IV_INFO (regno);
7331 if (REG_IV_TYPE (regno) == GENERAL_INDUCT
7333 && v->src_reg == biv
7334 && stats[v->ix].end_luid <= 0)
7336 /* If we see a 0 here for end_luid, it means that we have
7337 scanned the entire loop without finding any use at all.
7338 We must not predicate this code on a start_luid match
7339 since that would make the test fail for givs that have
7340 been hoisted out of inner loops. */
7341 if (stats[v->ix].end_luid == 0)
7343 stats[v->ix].end_luid = stats[v->ix].start_luid;
7344 return 1 + find_life_end (SET_SRC (x), stats, insn, biv);
7346 else if (stats[v->ix].start_luid == INSN_LUID (insn))
7347 stats[v->ix].end_luid = 0;
7349 return find_life_end (SET_SRC (x), stats, insn, biv);
7355 int regno = REGNO (x);
7356 struct induction *v = REG_IV_INFO (regno);
7358 if (REG_IV_TYPE (regno) == GENERAL_INDUCT
7360 && v->src_reg == biv
7361 && stats[v->ix].end_luid == 0)
7363 while (INSN_UID (insn) >= max_uid_for_loop)
7364 insn = NEXT_INSN (insn);
7365 stats[v->ix].end_luid = INSN_LUID (insn);
7378 fmt = GET_RTX_FORMAT (code);
7380 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
7383 retval += find_life_end (XEXP (x, i), stats, insn, biv);
7385 else if (fmt[i] == 'E')
7386 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
7387 retval += find_life_end (XVECEXP (x, i, j), stats, insn, biv);
7392 /* For each giv that has been combined with another, look if
7393 we can combine it with the most recently used one instead.
7394 This tends to shorten giv lifetimes, and helps the next step:
7395 try to derive givs from other givs. */
7397 recombine_givs (loop, bl, unroll_p)
7398 const struct loop *loop;
7399 struct iv_class *bl;
7402 struct induction *v, **giv_array, *last_giv;
7403 struct recombine_givs_stats *stats;
7406 int ends_need_computing;
7408 for (giv_count = 0, v = bl->giv; v; v = v->next_iv)
7414 = (struct induction **) xmalloc (giv_count * sizeof (struct induction *));
7415 stats = (struct recombine_givs_stats *) xmalloc (giv_count * sizeof *stats);
7417 /* Initialize stats and set up the ix field for each giv in stats to name
7418 the corresponding index into stats. */
7419 for (i = 0, v = bl->giv; v; v = v->next_iv)
7426 stats[i].giv_number = i;
7427 /* If this giv has been hoisted out of an inner loop, use the luid of
7428 the previous insn. */
7429 for (p = v->insn; INSN_UID (p) >= max_uid_for_loop; )
7431 stats[i].start_luid = INSN_LUID (p);
7435 qsort (stats, giv_count, sizeof(*stats), cmp_recombine_givs_stats);
7437 /* Set up the ix field for each giv in stats to name
7438 the corresponding index into stats, and
7439 do the actual most-recently-used recombination. */
7440 for (last_giv = 0, i = giv_count - 1; i >= 0; i--)
7442 v = giv_array[stats[i].giv_number];
7446 struct induction *old_same = v->same;
7449 /* combine_givs_p actually says if we can make this transformation.
7450 The other tests are here only to avoid keeping a giv alive
7451 that could otherwise be eliminated. */
7453 && ((old_same->maybe_dead && ! old_same->combined_with)
7454 || ! last_giv->maybe_dead
7455 || last_giv->combined_with)
7456 && (new_combine = combine_givs_p (last_giv, v)))
7458 old_same->combined_with--;
7459 v->new_reg = new_combine;
7461 last_giv->combined_with++;
7462 /* No need to update lifetimes / benefits here since we have
7463 already decided what to reduce. */
7465 if (loop_dump_stream)
7467 fprintf (loop_dump_stream,
7468 "giv at %d recombined with giv at %d as ",
7469 INSN_UID (v->insn), INSN_UID (last_giv->insn));
7470 print_rtl (loop_dump_stream, v->new_reg);
7471 putc ('\n', loop_dump_stream);
7477 else if (v->giv_type != DEST_REG)
7480 || (last_giv->maybe_dead && ! last_giv->combined_with)
7482 || v->combined_with)
7486 ends_need_computing = 0;
7487 /* For each DEST_REG giv, compute lifetime starts, and try to compute
7488 lifetime ends from regscan info. */
7489 for (i = giv_count - 1; i >= 0; i--)
7491 v = giv_array[stats[i].giv_number];
7494 if (v->giv_type == DEST_ADDR)
7496 /* Loop unrolling of an inner loop can even create new DEST_REG
7499 for (p = v->insn; INSN_UID (p) >= max_uid_for_loop; )
7501 stats[i].start_luid = stats[i].end_luid = INSN_LUID (p);
7503 stats[i].end_luid++;
7505 else /* v->giv_type == DEST_REG */
7509 stats[i].start_luid = INSN_LUID (v->insn);
7510 stats[i].end_luid = INSN_LUID (v->last_use);
7512 else if (INSN_UID (v->insn) >= max_uid_for_loop)
7515 /* This insn has been created by loop optimization on an inner
7516 loop. We don't have a proper start_luid that will match
7517 when we see the first set. But we do know that there will
7518 be no use before the set, so we can set end_luid to 0 so that
7519 we'll start looking for the last use right away. */
7520 for (p = PREV_INSN (v->insn); INSN_UID (p) >= max_uid_for_loop; )
7522 stats[i].start_luid = INSN_LUID (p);
7523 stats[i].end_luid = 0;
7524 ends_need_computing++;
7528 int regno = REGNO (v->dest_reg);
7529 int count = VARRAY_INT (n_times_set, regno) - 1;
7532 /* Find the first insn that sets the giv, so that we can verify
7533 if this giv's lifetime wraps around the loop. We also need
7534 the luid of the first setting insn in order to detect the
7535 last use properly. */
7538 p = prev_nonnote_insn (p);
7539 if (reg_set_p (v->dest_reg, p))
7543 stats[i].start_luid = INSN_LUID (p);
7544 if (stats[i].start_luid > uid_luid[REGNO_FIRST_UID (regno)])
7546 stats[i].end_luid = -1;
7547 ends_need_computing++;
7551 stats[i].end_luid = uid_luid[REGNO_LAST_UID (regno)];
7552 if (stats[i].end_luid > INSN_LUID (loop->end))
7554 stats[i].end_luid = -1;
7555 ends_need_computing++;
7562 /* If the regscan information was unconclusive for one or more DEST_REG
7563 givs, scan the all insn in the loop to find out lifetime ends. */
7564 if (ends_need_computing)
7566 rtx biv = bl->biv->src_reg;
7571 if (p == loop->start)
7574 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
7576 ends_need_computing -= find_life_end (PATTERN (p), stats, p, biv);
7578 while (ends_need_computing);
7581 /* Set start_luid back to the last insn that sets the giv. This allows
7582 more combinations. */
7583 for (i = giv_count - 1; i >= 0; i--)
7585 v = giv_array[stats[i].giv_number];
7588 if (INSN_UID (v->insn) < max_uid_for_loop)
7589 stats[i].start_luid = INSN_LUID (v->insn);
7592 /* Now adjust lifetime ends by taking combined givs into account. */
7593 for (i = giv_count - 1; i >= 0; i--)
7598 v = giv_array[stats[i].giv_number];
7601 if (v->same && ! v->same->ignore)
7604 luid = stats[i].start_luid;
7605 /* Use unsigned arithmetic to model loop wrap-around. */
7606 if (luid - stats[j].start_luid
7607 > (unsigned) stats[j].end_luid - stats[j].start_luid)
7608 stats[j].end_luid = luid;
7612 qsort (stats, giv_count, sizeof(*stats), cmp_recombine_givs_stats);
7614 /* Try to derive DEST_REG givs from previous DEST_REG givs with the
7615 same mult_val and non-overlapping lifetime. This reduces register
7617 Once we find a DEST_REG giv that is suitable to derive others from,
7618 we set last_giv to this giv, and try to derive as many other DEST_REG
7619 givs from it without joining overlapping lifetimes. If we then
7620 encounter a DEST_REG giv that we can't derive, we set rescan to the
7621 index for this giv (unless rescan is already set).
7622 When we are finished with the current LAST_GIV (i.e. the inner loop
7623 terminates), we start again with rescan, which then becomes the new
7625 for (i = giv_count - 1; i >= 0; i = rescan)
7627 int life_start = 0, life_end = 0;
7629 for (last_giv = 0, rescan = -1; i >= 0; i--)
7633 v = giv_array[stats[i].giv_number];
7634 if (v->giv_type != DEST_REG || v->derived_from || v->same)
7638 /* Don't use a giv that's likely to be dead to derive
7639 others - that would be likely to keep that giv alive. */
7640 if (! v->maybe_dead || v->combined_with)
7643 life_start = stats[i].start_luid;
7644 life_end = stats[i].end_luid;
7648 /* Use unsigned arithmetic to model loop wrap around. */
7649 if (((unsigned) stats[i].start_luid - life_start
7650 >= (unsigned) life_end - life_start)
7651 && ((unsigned) stats[i].end_luid - life_start
7652 > (unsigned) life_end - life_start)
7653 /* Check that the giv insn we're about to use for deriving
7654 precedes all uses of that giv. Note that initializing the
7655 derived giv would defeat the purpose of reducing register
7657 ??? We could arrange to move the insn. */
7658 && ((unsigned) stats[i].end_luid - INSN_LUID (loop->start)
7659 > (unsigned) stats[i].start_luid - INSN_LUID (loop->start))
7660 && rtx_equal_p (last_giv->mult_val, v->mult_val)
7661 /* ??? Could handle libcalls, but would need more logic. */
7662 && ! find_reg_note (v->insn, REG_RETVAL, NULL_RTX)
7663 /* We would really like to know if for any giv that v
7664 is combined with, v->insn or any intervening biv increment
7665 dominates that combined giv. However, we
7666 don't have this detailed control flow information.
7667 N.B. since last_giv will be reduced, it is valid
7668 anywhere in the loop, so we don't need to check the
7669 validity of last_giv.
7670 We rely here on the fact that v->always_executed implies that
7671 there is no jump to someplace else in the loop before the
7672 giv insn, and hence any insn that is executed before the
7673 giv insn in the loop will have a lower luid. */
7674 && (v->always_executed || ! v->combined_with)
7675 && (sum = express_from (last_giv, v))
7676 /* Make sure we don't make the add more expensive. ADD_COST
7677 doesn't take different costs of registers and constants into
7678 account, so compare the cost of the actual SET_SRCs. */
7679 && (rtx_cost (sum, SET)
7680 <= rtx_cost (SET_SRC (single_set (v->insn)), SET))
7681 /* ??? unroll can't understand anything but reg + const_int
7682 sums. It would be cleaner to fix unroll. */
7683 && ((GET_CODE (sum) == PLUS
7684 && GET_CODE (XEXP (sum, 0)) == REG
7685 && GET_CODE (XEXP (sum, 1)) == CONST_INT)
7687 && validate_change (v->insn, &PATTERN (v->insn),
7688 gen_rtx_SET (VOIDmode, v->dest_reg, sum), 0))
7690 v->derived_from = last_giv;
7691 life_end = stats[i].end_luid;
7693 if (loop_dump_stream)
7695 fprintf (loop_dump_stream,
7696 "giv at %d derived from %d as ",
7697 INSN_UID (v->insn), INSN_UID (last_giv->insn));
7698 print_rtl (loop_dump_stream, sum);
7699 putc ('\n', loop_dump_stream);
7702 else if (rescan < 0)
7712 /* EMIT code before INSERT_BEFORE to set REG = B * M + A. */
7715 emit_iv_add_mult (b, m, a, reg, insert_before)
7716 rtx b; /* initial value of basic induction variable */
7717 rtx m; /* multiplicative constant */
7718 rtx a; /* additive constant */
7719 rtx reg; /* destination register */
7725 /* Prevent unexpected sharing of these rtx. */
7729 /* Increase the lifetime of any invariants moved further in code. */
7730 update_reg_last_use (a, insert_before);
7731 update_reg_last_use (b, insert_before);
7732 update_reg_last_use (m, insert_before);
7735 result = expand_mult_add (b, reg, m, a, GET_MODE (reg), 0);
7737 emit_move_insn (reg, result);
7738 seq = gen_sequence ();
7741 emit_insn_before (seq, insert_before);
7743 /* It is entirely possible that the expansion created lots of new
7744 registers. Iterate over the sequence we just created and
7747 if (GET_CODE (seq) == SEQUENCE)
7750 for (i = 0; i < XVECLEN (seq, 0); ++i)
7752 rtx set = single_set (XVECEXP (seq, 0, i));
7753 if (set && GET_CODE (SET_DEST (set)) == REG)
7754 record_base_value (REGNO (SET_DEST (set)), SET_SRC (set), 0);
7757 else if (GET_CODE (seq) == SET
7758 && GET_CODE (SET_DEST (seq)) == REG)
7759 record_base_value (REGNO (SET_DEST (seq)), SET_SRC (seq), 0);
7762 /* Test whether A * B can be computed without
7763 an actual multiply insn. Value is 1 if so. */
7766 product_cheap_p (a, b)
7772 struct obstack *old_rtl_obstack = rtl_obstack;
7773 char *storage = (char *) obstack_alloc (&temp_obstack, 0);
7776 /* If only one is constant, make it B. */
7777 if (GET_CODE (a) == CONST_INT)
7778 tmp = a, a = b, b = tmp;
7780 /* If first constant, both constant, so don't need multiply. */
7781 if (GET_CODE (a) == CONST_INT)
7784 /* If second not constant, neither is constant, so would need multiply. */
7785 if (GET_CODE (b) != CONST_INT)
7788 /* One operand is constant, so might not need multiply insn. Generate the
7789 code for the multiply and see if a call or multiply, or long sequence
7790 of insns is generated. */
7792 rtl_obstack = &temp_obstack;
7794 expand_mult (GET_MODE (a), a, b, NULL_RTX, 0);
7795 tmp = gen_sequence ();
7798 if (GET_CODE (tmp) == SEQUENCE)
7800 if (XVEC (tmp, 0) == 0)
7802 else if (XVECLEN (tmp, 0) > 3)
7805 for (i = 0; i < XVECLEN (tmp, 0); i++)
7807 rtx insn = XVECEXP (tmp, 0, i);
7809 if (GET_CODE (insn) != INSN
7810 || (GET_CODE (PATTERN (insn)) == SET
7811 && GET_CODE (SET_SRC (PATTERN (insn))) == MULT)
7812 || (GET_CODE (PATTERN (insn)) == PARALLEL
7813 && GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == SET
7814 && GET_CODE (SET_SRC (XVECEXP (PATTERN (insn), 0, 0))) == MULT))
7821 else if (GET_CODE (tmp) == SET
7822 && GET_CODE (SET_SRC (tmp)) == MULT)
7824 else if (GET_CODE (tmp) == PARALLEL
7825 && GET_CODE (XVECEXP (tmp, 0, 0)) == SET
7826 && GET_CODE (SET_SRC (XVECEXP (tmp, 0, 0))) == MULT)
7829 /* Free any storage we obtained in generating this multiply and restore rtl
7830 allocation to its normal obstack. */
7831 obstack_free (&temp_obstack, storage);
7832 rtl_obstack = old_rtl_obstack;
7837 /* Check to see if loop can be terminated by a "decrement and branch until
7838 zero" instruction. If so, add a REG_NONNEG note to the branch insn if so.
7839 Also try reversing an increment loop to a decrement loop
7840 to see if the optimization can be performed.
7841 Value is nonzero if optimization was performed. */
7843 /* This is useful even if the architecture doesn't have such an insn,
7844 because it might change a loops which increments from 0 to n to a loop
7845 which decrements from n to 0. A loop that decrements to zero is usually
7846 faster than one that increments from zero. */
7848 /* ??? This could be rewritten to use some of the loop unrolling procedures,
7849 such as approx_final_value, biv_total_increment, loop_iterations, and
7850 final_[bg]iv_value. */
7853 check_dbra_loop (loop, insn_count)
7857 struct iv_class *bl;
7864 rtx before_comparison;
7868 int compare_and_branch;
7869 rtx loop_start = loop->start;
7870 rtx loop_end = loop->end;
7871 struct loop_info *loop_info = LOOP_INFO (loop);
7873 /* If last insn is a conditional branch, and the insn before tests a
7874 register value, try to optimize it. Otherwise, we can't do anything. */
7876 jump = PREV_INSN (loop_end);
7877 comparison = get_condition_for_loop (loop, jump);
7878 if (comparison == 0)
7881 /* Try to compute whether the compare/branch at the loop end is one or
7882 two instructions. */
7883 get_condition (jump, &first_compare);
7884 if (first_compare == jump)
7885 compare_and_branch = 1;
7886 else if (first_compare == prev_nonnote_insn (jump))
7887 compare_and_branch = 2;
7891 /* Check all of the bivs to see if the compare uses one of them.
7892 Skip biv's set more than once because we can't guarantee that
7893 it will be zero on the last iteration. Also skip if the biv is
7894 used between its update and the test insn. */
7896 for (bl = loop_iv_list; bl; bl = bl->next)
7898 if (bl->biv_count == 1
7899 && ! bl->biv->maybe_multiple
7900 && bl->biv->dest_reg == XEXP (comparison, 0)
7901 && ! reg_used_between_p (regno_reg_rtx[bl->regno], bl->biv->insn,
7909 /* Look for the case where the basic induction variable is always
7910 nonnegative, and equals zero on the last iteration.
7911 In this case, add a reg_note REG_NONNEG, which allows the
7912 m68k DBRA instruction to be used. */
7914 if (((GET_CODE (comparison) == GT
7915 && GET_CODE (XEXP (comparison, 1)) == CONST_INT
7916 && INTVAL (XEXP (comparison, 1)) == -1)
7917 || (GET_CODE (comparison) == NE && XEXP (comparison, 1) == const0_rtx))
7918 && GET_CODE (bl->biv->add_val) == CONST_INT
7919 && INTVAL (bl->biv->add_val) < 0)
7921 /* Initial value must be greater than 0,
7922 init_val % -dec_value == 0 to ensure that it equals zero on
7923 the last iteration */
7925 if (GET_CODE (bl->initial_value) == CONST_INT
7926 && INTVAL (bl->initial_value) > 0
7927 && (INTVAL (bl->initial_value)
7928 % (-INTVAL (bl->biv->add_val))) == 0)
7930 /* register always nonnegative, add REG_NOTE to branch */
7931 REG_NOTES (PREV_INSN (loop_end))
7932 = gen_rtx_EXPR_LIST (REG_NONNEG, NULL_RTX,
7933 REG_NOTES (PREV_INSN (loop_end)));
7939 /* If the decrement is 1 and the value was tested as >= 0 before
7940 the loop, then we can safely optimize. */
7941 for (p = loop_start; p; p = PREV_INSN (p))
7943 if (GET_CODE (p) == CODE_LABEL)
7945 if (GET_CODE (p) != JUMP_INSN)
7948 before_comparison = get_condition_for_loop (loop, p);
7949 if (before_comparison
7950 && XEXP (before_comparison, 0) == bl->biv->dest_reg
7951 && GET_CODE (before_comparison) == LT
7952 && XEXP (before_comparison, 1) == const0_rtx
7953 && ! reg_set_between_p (bl->biv->dest_reg, p, loop_start)
7954 && INTVAL (bl->biv->add_val) == -1)
7956 REG_NOTES (PREV_INSN (loop_end))
7957 = gen_rtx_EXPR_LIST (REG_NONNEG, NULL_RTX,
7958 REG_NOTES (PREV_INSN (loop_end)));
7965 else if (GET_CODE (bl->biv->add_val) == CONST_INT
7966 && INTVAL (bl->biv->add_val) > 0)
7968 /* Try to change inc to dec, so can apply above optimization. */
7970 all registers modified are induction variables or invariant,
7971 all memory references have non-overlapping addresses
7972 (obviously true if only one write)
7973 allow 2 insns for the compare/jump at the end of the loop. */
7974 /* Also, we must avoid any instructions which use both the reversed
7975 biv and another biv. Such instructions will fail if the loop is
7976 reversed. We meet this condition by requiring that either
7977 no_use_except_counting is true, or else that there is only
7979 int num_nonfixed_reads = 0;
7980 /* 1 if the iteration var is used only to count iterations. */
7981 int no_use_except_counting = 0;
7982 /* 1 if the loop has no memory store, or it has a single memory store
7983 which is reversible. */
7984 int reversible_mem_store = 1;
7986 if (bl->giv_count == 0 && ! loop->exit_count)
7988 rtx bivreg = regno_reg_rtx[bl->regno];
7990 /* If there are no givs for this biv, and the only exit is the
7991 fall through at the end of the loop, then
7992 see if perhaps there are no uses except to count. */
7993 no_use_except_counting = 1;
7994 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
7995 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
7997 rtx set = single_set (p);
7999 if (set && GET_CODE (SET_DEST (set)) == REG
8000 && REGNO (SET_DEST (set)) == bl->regno)
8001 /* An insn that sets the biv is okay. */
8003 else if ((p == prev_nonnote_insn (prev_nonnote_insn (loop_end))
8004 || p == prev_nonnote_insn (loop_end))
8005 && reg_mentioned_p (bivreg, PATTERN (p)))
8007 /* If either of these insns uses the biv and sets a pseudo
8008 that has more than one usage, then the biv has uses
8009 other than counting since it's used to derive a value
8010 that is used more than one time. */
8011 int note_set_pseudo_multiple_uses_retval = 0;
8012 note_stores (PATTERN (p), note_set_pseudo_multiple_uses,
8013 ¬e_set_pseudo_multiple_uses_retval);
8014 if (note_set_pseudo_multiple_uses_retval)
8016 no_use_except_counting = 0;
8020 else if (reg_mentioned_p (bivreg, PATTERN (p)))
8022 no_use_except_counting = 0;
8028 if (no_use_except_counting)
8029 ; /* no need to worry about MEMs. */
8030 else if (num_mem_sets <= 1)
8032 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
8033 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
8034 num_nonfixed_reads += count_nonfixed_reads (loop, PATTERN (p));
8036 /* If the loop has a single store, and the destination address is
8037 invariant, then we can't reverse the loop, because this address
8038 might then have the wrong value at loop exit.
8039 This would work if the source was invariant also, however, in that
8040 case, the insn should have been moved out of the loop. */
8042 if (num_mem_sets == 1)
8044 struct induction *v;
8046 reversible_mem_store
8047 = (! unknown_address_altered
8048 && ! unknown_constant_address_altered
8049 && ! loop_invariant_p (loop,
8050 XEXP (XEXP (loop_store_mems, 0),
8053 /* If the store depends on a register that is set after the
8054 store, it depends on the initial value, and is thus not
8056 for (v = bl->giv; reversible_mem_store && v; v = v->next_iv)
8058 if (v->giv_type == DEST_REG
8059 && reg_mentioned_p (v->dest_reg,
8060 PATTERN (first_loop_store_insn))
8061 && loop_insn_first_p (first_loop_store_insn, v->insn))
8062 reversible_mem_store = 0;
8069 /* This code only acts for innermost loops. Also it simplifies
8070 the memory address check by only reversing loops with
8071 zero or one memory access.
8072 Two memory accesses could involve parts of the same array,
8073 and that can't be reversed.
8074 If the biv is used only for counting, than we don't need to worry
8075 about all these things. */
8077 if ((num_nonfixed_reads <= 1
8078 && ! loop_info->has_call
8079 && ! loop_info->has_volatile
8080 && reversible_mem_store
8081 && (bl->giv_count + bl->biv_count + num_mem_sets
8082 + num_movables + compare_and_branch == insn_count)
8083 && (bl == loop_iv_list && bl->next == 0))
8084 || no_use_except_counting)
8088 /* Loop can be reversed. */
8089 if (loop_dump_stream)
8090 fprintf (loop_dump_stream, "Can reverse loop\n");
8092 /* Now check other conditions:
8094 The increment must be a constant, as must the initial value,
8095 and the comparison code must be LT.
8097 This test can probably be improved since +/- 1 in the constant
8098 can be obtained by changing LT to LE and vice versa; this is
8102 /* for constants, LE gets turned into LT */
8103 && (GET_CODE (comparison) == LT
8104 || (GET_CODE (comparison) == LE
8105 && no_use_except_counting)))
8107 HOST_WIDE_INT add_val, add_adjust, comparison_val = 0;
8108 rtx initial_value, comparison_value;
8110 enum rtx_code cmp_code;
8111 int comparison_const_width;
8112 unsigned HOST_WIDE_INT comparison_sign_mask;
8114 add_val = INTVAL (bl->biv->add_val);
8115 comparison_value = XEXP (comparison, 1);
8116 if (GET_MODE (comparison_value) == VOIDmode)
8117 comparison_const_width
8118 = GET_MODE_BITSIZE (GET_MODE (XEXP (comparison, 0)));
8120 comparison_const_width
8121 = GET_MODE_BITSIZE (GET_MODE (comparison_value));
8122 if (comparison_const_width > HOST_BITS_PER_WIDE_INT)
8123 comparison_const_width = HOST_BITS_PER_WIDE_INT;
8124 comparison_sign_mask
8125 = (unsigned HOST_WIDE_INT)1 << (comparison_const_width - 1);
8127 /* If the comparison value is not a loop invariant, then we
8128 can not reverse this loop.
8130 ??? If the insns which initialize the comparison value as
8131 a whole compute an invariant result, then we could move
8132 them out of the loop and proceed with loop reversal. */
8133 if (! loop_invariant_p (loop, comparison_value))
8136 if (GET_CODE (comparison_value) == CONST_INT)
8137 comparison_val = INTVAL (comparison_value);
8138 initial_value = bl->initial_value;
8140 /* Normalize the initial value if it is an integer and
8141 has no other use except as a counter. This will allow
8142 a few more loops to be reversed. */
8143 if (no_use_except_counting
8144 && GET_CODE (comparison_value) == CONST_INT
8145 && GET_CODE (initial_value) == CONST_INT)
8147 comparison_val = comparison_val - INTVAL (bl->initial_value);
8148 /* The code below requires comparison_val to be a multiple
8149 of add_val in order to do the loop reversal, so
8150 round up comparison_val to a multiple of add_val.
8151 Since comparison_value is constant, we know that the
8152 current comparison code is LT. */
8153 comparison_val = comparison_val + add_val - 1;
8155 -= (unsigned HOST_WIDE_INT) comparison_val % add_val;
8156 /* We postpone overflow checks for COMPARISON_VAL here;
8157 even if there is an overflow, we might still be able to
8158 reverse the loop, if converting the loop exit test to
8160 initial_value = const0_rtx;
8163 /* First check if we can do a vanilla loop reversal. */
8164 if (initial_value == const0_rtx
8165 /* If we have a decrement_and_branch_on_count,
8166 prefer the NE test, since this will allow that
8167 instruction to be generated. Note that we must
8168 use a vanilla loop reversal if the biv is used to
8169 calculate a giv or has a non-counting use. */
8170 #if ! defined (HAVE_decrement_and_branch_until_zero) \
8171 && defined (HAVE_decrement_and_branch_on_count)
8172 && (! (add_val == 1 && loop->vtop
8173 && (bl->biv_count == 0
8174 || no_use_except_counting)))
8176 && GET_CODE (comparison_value) == CONST_INT
8177 /* Now do postponed overflow checks on COMPARISON_VAL. */
8178 && ! (((comparison_val - add_val) ^ INTVAL (comparison_value))
8179 & comparison_sign_mask))
8181 /* Register will always be nonnegative, with value
8182 0 on last iteration */
8183 add_adjust = add_val;
8187 else if (add_val == 1 && loop->vtop
8188 && (bl->biv_count == 0
8189 || no_use_except_counting))
8197 if (GET_CODE (comparison) == LE)
8198 add_adjust -= add_val;
8200 /* If the initial value is not zero, or if the comparison
8201 value is not an exact multiple of the increment, then we
8202 can not reverse this loop. */
8203 if (initial_value == const0_rtx
8204 && GET_CODE (comparison_value) == CONST_INT)
8206 if (((unsigned HOST_WIDE_INT) comparison_val % add_val) != 0)
8211 if (! no_use_except_counting || add_val != 1)
8215 final_value = comparison_value;
8217 /* Reset these in case we normalized the initial value
8218 and comparison value above. */
8219 if (GET_CODE (comparison_value) == CONST_INT
8220 && GET_CODE (initial_value) == CONST_INT)
8222 comparison_value = GEN_INT (comparison_val);
8224 = GEN_INT (comparison_val + INTVAL (bl->initial_value));
8226 bl->initial_value = initial_value;
8228 /* Save some info needed to produce the new insns. */
8229 reg = bl->biv->dest_reg;
8230 jump_label = XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end))), 1);
8231 if (jump_label == pc_rtx)
8232 jump_label = XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end))), 2);
8233 new_add_val = GEN_INT (- INTVAL (bl->biv->add_val));
8235 /* Set start_value; if this is not a CONST_INT, we need
8237 Initialize biv to start_value before loop start.
8238 The old initializing insn will be deleted as a
8239 dead store by flow.c. */
8240 if (initial_value == const0_rtx
8241 && GET_CODE (comparison_value) == CONST_INT)
8243 start_value = GEN_INT (comparison_val - add_adjust);
8244 emit_insn_before (gen_move_insn (reg, start_value),
8247 else if (GET_CODE (initial_value) == CONST_INT)
8249 rtx offset = GEN_INT (-INTVAL (initial_value) - add_adjust);
8250 enum machine_mode mode = GET_MODE (reg);
8251 enum insn_code icode
8252 = add_optab->handlers[(int) mode].insn_code;
8254 if (! (*insn_data[icode].operand[0].predicate) (reg, mode)
8255 || ! ((*insn_data[icode].operand[1].predicate)
8256 (comparison_value, mode))
8257 || ! ((*insn_data[icode].operand[2].predicate)
8261 = gen_rtx_PLUS (mode, comparison_value, offset);
8262 emit_insn_before ((GEN_FCN (icode)
8263 (reg, comparison_value, offset)),
8265 if (GET_CODE (comparison) == LE)
8266 final_value = gen_rtx_PLUS (mode, comparison_value,
8269 else if (! add_adjust)
8271 enum machine_mode mode = GET_MODE (reg);
8272 enum insn_code icode
8273 = sub_optab->handlers[(int) mode].insn_code;
8274 if (! (*insn_data[icode].operand[0].predicate) (reg, mode)
8275 || ! ((*insn_data[icode].operand[1].predicate)
8276 (comparison_value, mode))
8277 || ! ((*insn_data[icode].operand[2].predicate)
8278 (initial_value, mode)))
8281 = gen_rtx_MINUS (mode, comparison_value, initial_value);
8282 emit_insn_before ((GEN_FCN (icode)
8283 (reg, comparison_value, initial_value)),
8287 /* We could handle the other cases too, but it'll be
8288 better to have a testcase first. */
8291 /* We may not have a single insn which can increment a reg, so
8292 create a sequence to hold all the insns from expand_inc. */
8294 expand_inc (reg, new_add_val);
8295 tem = gen_sequence ();
8298 p = emit_insn_before (tem, bl->biv->insn);
8299 delete_insn (bl->biv->insn);
8301 /* Update biv info to reflect its new status. */
8303 bl->initial_value = start_value;
8304 bl->biv->add_val = new_add_val;
8306 /* Update loop info. */
8307 loop_info->initial_value = reg;
8308 loop_info->initial_equiv_value = reg;
8309 loop_info->final_value = const0_rtx;
8310 loop_info->final_equiv_value = const0_rtx;
8311 loop_info->comparison_value = const0_rtx;
8312 loop_info->comparison_code = cmp_code;
8313 loop_info->increment = new_add_val;
8315 /* Inc LABEL_NUSES so that delete_insn will
8316 not delete the label. */
8317 LABEL_NUSES (XEXP (jump_label, 0)) ++;
8319 /* Emit an insn after the end of the loop to set the biv's
8320 proper exit value if it is used anywhere outside the loop. */
8321 if ((REGNO_LAST_UID (bl->regno) != INSN_UID (first_compare))
8323 || REGNO_FIRST_UID (bl->regno) != INSN_UID (bl->init_insn))
8324 emit_insn_after (gen_move_insn (reg, final_value),
8327 /* Delete compare/branch at end of loop. */
8328 delete_insn (PREV_INSN (loop_end));
8329 if (compare_and_branch == 2)
8330 delete_insn (first_compare);
8332 /* Add new compare/branch insn at end of loop. */
8334 emit_cmp_and_jump_insns (reg, const0_rtx, cmp_code, NULL_RTX,
8335 GET_MODE (reg), 0, 0,
8336 XEXP (jump_label, 0));
8337 tem = gen_sequence ();
8339 emit_jump_insn_before (tem, loop_end);
8341 for (tem = PREV_INSN (loop_end);
8342 tem && GET_CODE (tem) != JUMP_INSN;
8343 tem = PREV_INSN (tem))
8347 JUMP_LABEL (tem) = XEXP (jump_label, 0);
8353 /* Increment of LABEL_NUSES done above. */
8354 /* Register is now always nonnegative,
8355 so add REG_NONNEG note to the branch. */
8356 REG_NOTES (tem) = gen_rtx_EXPR_LIST (REG_NONNEG, NULL_RTX,
8362 /* No insn may reference both the reversed and another biv or it
8363 will fail (see comment near the top of the loop reversal
8365 Earlier on, we have verified that the biv has no use except
8366 counting, or it is the only biv in this function.
8367 However, the code that computes no_use_except_counting does
8368 not verify reg notes. It's possible to have an insn that
8369 references another biv, and has a REG_EQUAL note with an
8370 expression based on the reversed biv. To avoid this case,
8371 remove all REG_EQUAL notes based on the reversed biv
8373 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
8374 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
8377 rtx set = single_set (p);
8378 /* If this is a set of a GIV based on the reversed biv, any
8379 REG_EQUAL notes should still be correct. */
8381 || GET_CODE (SET_DEST (set)) != REG
8382 || (size_t) REGNO (SET_DEST (set)) >= reg_iv_type->num_elements
8383 || REG_IV_TYPE (REGNO (SET_DEST (set))) != GENERAL_INDUCT
8384 || REG_IV_INFO (REGNO (SET_DEST (set)))->src_reg != bl->biv->src_reg)
8385 for (pnote = ®_NOTES (p); *pnote;)
8387 if (REG_NOTE_KIND (*pnote) == REG_EQUAL
8388 && reg_mentioned_p (regno_reg_rtx[bl->regno],
8390 *pnote = XEXP (*pnote, 1);
8392 pnote = &XEXP (*pnote, 1);
8396 /* Mark that this biv has been reversed. Each giv which depends
8397 on this biv, and which is also live past the end of the loop
8398 will have to be fixed up. */
8402 if (loop_dump_stream)
8404 fprintf (loop_dump_stream, "Reversed loop");
8406 fprintf (loop_dump_stream, " and added reg_nonneg\n");
8408 fprintf (loop_dump_stream, "\n");
8419 /* Verify whether the biv BL appears to be eliminable,
8420 based on the insns in the loop that refer to it.
8422 If ELIMINATE_P is non-zero, actually do the elimination.
8424 THRESHOLD and INSN_COUNT are from loop_optimize and are used to
8425 determine whether invariant insns should be placed inside or at the
8426 start of the loop. */
8429 maybe_eliminate_biv (loop, bl, eliminate_p, threshold, insn_count)
8430 const struct loop *loop;
8431 struct iv_class *bl;
8433 int threshold, insn_count;
8435 rtx reg = bl->biv->dest_reg;
8436 rtx loop_start = loop->start;
8437 rtx loop_end = loop->end;
8440 /* Scan all insns in the loop, stopping if we find one that uses the
8441 biv in a way that we cannot eliminate. */
8443 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
8445 enum rtx_code code = GET_CODE (p);
8446 rtx where = threshold >= insn_count ? loop_start : p;
8448 /* If this is a libcall that sets a giv, skip ahead to its end. */
8449 if (GET_RTX_CLASS (code) == 'i')
8451 rtx note = find_reg_note (p, REG_LIBCALL, NULL_RTX);
8455 rtx last = XEXP (note, 0);
8456 rtx set = single_set (last);
8458 if (set && GET_CODE (SET_DEST (set)) == REG)
8460 int regno = REGNO (SET_DEST (set));
8462 if (regno < max_reg_before_loop
8463 && REG_IV_TYPE (regno) == GENERAL_INDUCT
8464 && REG_IV_INFO (regno)->src_reg == bl->biv->src_reg)
8469 if ((code == INSN || code == JUMP_INSN || code == CALL_INSN)
8470 && reg_mentioned_p (reg, PATTERN (p))
8471 && ! maybe_eliminate_biv_1 (loop, PATTERN (p), p, bl,
8472 eliminate_p, where))
8474 if (loop_dump_stream)
8475 fprintf (loop_dump_stream,
8476 "Cannot eliminate biv %d: biv used in insn %d.\n",
8477 bl->regno, INSN_UID (p));
8484 if (loop_dump_stream)
8485 fprintf (loop_dump_stream, "biv %d %s eliminated.\n",
8486 bl->regno, eliminate_p ? "was" : "can be");
8493 /* INSN and REFERENCE are instructions in the same insn chain.
8494 Return non-zero if INSN is first. */
8497 loop_insn_first_p (insn, reference)
8498 rtx insn, reference;
8502 for (p = insn, q = reference; ;)
8504 /* Start with test for not first so that INSN == REFERENCE yields not
8506 if (q == insn || ! p)
8508 if (p == reference || ! q)
8511 /* Either of P or Q might be a NOTE. Notes have the same LUID as the
8512 previous insn, hence the <= comparison below does not work if
8514 if (INSN_UID (p) < max_uid_for_loop
8515 && INSN_UID (q) < max_uid_for_loop
8516 && GET_CODE (p) != NOTE)
8517 return INSN_LUID (p) <= INSN_LUID (q);
8519 if (INSN_UID (p) >= max_uid_for_loop
8520 || GET_CODE (p) == NOTE)
8522 if (INSN_UID (q) >= max_uid_for_loop)
8527 /* We are trying to eliminate BIV in INSN using GIV. Return non-zero if
8528 the offset that we have to take into account due to auto-increment /
8529 div derivation is zero. */
8531 biv_elimination_giv_has_0_offset (biv, giv, insn)
8532 struct induction *biv, *giv;
8535 /* If the giv V had the auto-inc address optimization applied
8536 to it, and INSN occurs between the giv insn and the biv
8537 insn, then we'd have to adjust the value used here.
8538 This is rare, so we don't bother to make this possible. */
8539 if (giv->auto_inc_opt
8540 && ((loop_insn_first_p (giv->insn, insn)
8541 && loop_insn_first_p (insn, biv->insn))
8542 || (loop_insn_first_p (biv->insn, insn)
8543 && loop_insn_first_p (insn, giv->insn))))
8546 /* If the giv V was derived from another giv, and INSN does
8547 not occur between the giv insn and the biv insn, then we'd
8548 have to adjust the value used here. This is rare, so we don't
8549 bother to make this possible. */
8550 if (giv->derived_from
8551 && ! (giv->always_executed
8552 && loop_insn_first_p (giv->insn, insn)
8553 && loop_insn_first_p (insn, biv->insn)))
8556 && giv->same->derived_from
8557 && ! (giv->same->always_executed
8558 && loop_insn_first_p (giv->same->insn, insn)
8559 && loop_insn_first_p (insn, biv->insn)))
8565 /* If BL appears in X (part of the pattern of INSN), see if we can
8566 eliminate its use. If so, return 1. If not, return 0.
8568 If BIV does not appear in X, return 1.
8570 If ELIMINATE_P is non-zero, actually do the elimination. WHERE indicates
8571 where extra insns should be added. Depending on how many items have been
8572 moved out of the loop, it will either be before INSN or at the start of
8576 maybe_eliminate_biv_1 (loop, x, insn, bl, eliminate_p, where)
8577 const struct loop *loop;
8579 struct iv_class *bl;
8583 enum rtx_code code = GET_CODE (x);
8584 rtx reg = bl->biv->dest_reg;
8585 enum machine_mode mode = GET_MODE (reg);
8586 struct induction *v;
8598 /* If we haven't already been able to do something with this BIV,
8599 we can't eliminate it. */
8605 /* If this sets the BIV, it is not a problem. */
8606 if (SET_DEST (x) == reg)
8609 /* If this is an insn that defines a giv, it is also ok because
8610 it will go away when the giv is reduced. */
8611 for (v = bl->giv; v; v = v->next_iv)
8612 if (v->giv_type == DEST_REG && SET_DEST (x) == v->dest_reg)
8616 if (SET_DEST (x) == cc0_rtx && SET_SRC (x) == reg)
8618 /* Can replace with any giv that was reduced and
8619 that has (MULT_VAL != 0) and (ADD_VAL == 0).
8620 Require a constant for MULT_VAL, so we know it's nonzero.
8621 ??? We disable this optimization to avoid potential
8624 for (v = bl->giv; v; v = v->next_iv)
8625 if (CONSTANT_P (v->mult_val) && v->mult_val != const0_rtx
8626 && v->add_val == const0_rtx
8627 && ! v->ignore && ! v->maybe_dead && v->always_computable
8631 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8637 /* If the giv has the opposite direction of change,
8638 then reverse the comparison. */
8639 if (INTVAL (v->mult_val) < 0)
8640 new = gen_rtx_COMPARE (GET_MODE (v->new_reg),
8641 const0_rtx, v->new_reg);
8645 /* We can probably test that giv's reduced reg. */
8646 if (validate_change (insn, &SET_SRC (x), new, 0))
8650 /* Look for a giv with (MULT_VAL != 0) and (ADD_VAL != 0);
8651 replace test insn with a compare insn (cmp REDUCED_GIV ADD_VAL).
8652 Require a constant for MULT_VAL, so we know it's nonzero.
8653 ??? Do this only if ADD_VAL is a pointer to avoid a potential
8654 overflow problem. */
8656 for (v = bl->giv; v; v = v->next_iv)
8657 if (CONSTANT_P (v->mult_val) && v->mult_val != const0_rtx
8658 && ! v->ignore && ! v->maybe_dead && v->always_computable
8660 && (GET_CODE (v->add_val) == SYMBOL_REF
8661 || GET_CODE (v->add_val) == LABEL_REF
8662 || GET_CODE (v->add_val) == CONST
8663 || (GET_CODE (v->add_val) == REG
8664 && REGNO_POINTER_FLAG (REGNO (v->add_val)))))
8666 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8672 /* If the giv has the opposite direction of change,
8673 then reverse the comparison. */
8674 if (INTVAL (v->mult_val) < 0)
8675 new = gen_rtx_COMPARE (VOIDmode, copy_rtx (v->add_val),
8678 new = gen_rtx_COMPARE (VOIDmode, v->new_reg,
8679 copy_rtx (v->add_val));
8681 /* Replace biv with the giv's reduced register. */
8682 update_reg_last_use (v->add_val, insn);
8683 if (validate_change (insn, &SET_SRC (PATTERN (insn)), new, 0))
8686 /* Insn doesn't support that constant or invariant. Copy it
8687 into a register (it will be a loop invariant.) */
8688 tem = gen_reg_rtx (GET_MODE (v->new_reg));
8690 emit_insn_before (gen_move_insn (tem, copy_rtx (v->add_val)),
8693 /* Substitute the new register for its invariant value in
8694 the compare expression. */
8695 XEXP (new, (INTVAL (v->mult_val) < 0) ? 0 : 1) = tem;
8696 if (validate_change (insn, &SET_SRC (PATTERN (insn)), new, 0))
8705 case GT: case GE: case GTU: case GEU:
8706 case LT: case LE: case LTU: case LEU:
8707 /* See if either argument is the biv. */
8708 if (XEXP (x, 0) == reg)
8709 arg = XEXP (x, 1), arg_operand = 1;
8710 else if (XEXP (x, 1) == reg)
8711 arg = XEXP (x, 0), arg_operand = 0;
8715 if (CONSTANT_P (arg))
8717 /* First try to replace with any giv that has constant positive
8718 mult_val and constant add_val. We might be able to support
8719 negative mult_val, but it seems complex to do it in general. */
8721 for (v = bl->giv; v; v = v->next_iv)
8722 if (CONSTANT_P (v->mult_val) && INTVAL (v->mult_val) > 0
8723 && (GET_CODE (v->add_val) == SYMBOL_REF
8724 || GET_CODE (v->add_val) == LABEL_REF
8725 || GET_CODE (v->add_val) == CONST
8726 || (GET_CODE (v->add_val) == REG
8727 && REGNO_POINTER_FLAG (REGNO (v->add_val))))
8728 && ! v->ignore && ! v->maybe_dead && v->always_computable
8731 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8737 /* Replace biv with the giv's reduced reg. */
8738 XEXP (x, 1-arg_operand) = v->new_reg;
8740 /* If all constants are actually constant integers and
8741 the derived constant can be directly placed in the COMPARE,
8743 if (GET_CODE (arg) == CONST_INT
8744 && GET_CODE (v->mult_val) == CONST_INT
8745 && GET_CODE (v->add_val) == CONST_INT
8746 && validate_change (insn, &XEXP (x, arg_operand),
8747 GEN_INT (INTVAL (arg)
8748 * INTVAL (v->mult_val)
8749 + INTVAL (v->add_val)), 0))
8752 /* Otherwise, load it into a register. */
8753 tem = gen_reg_rtx (mode);
8754 emit_iv_add_mult (arg, v->mult_val, v->add_val, tem, where);
8755 if (validate_change (insn, &XEXP (x, arg_operand), tem, 0))
8758 /* If that failed, put back the change we made above. */
8759 XEXP (x, 1-arg_operand) = reg;
8762 /* Look for giv with positive constant mult_val and nonconst add_val.
8763 Insert insns to calculate new compare value.
8764 ??? Turn this off due to possible overflow. */
8766 for (v = bl->giv; v; v = v->next_iv)
8767 if (CONSTANT_P (v->mult_val) && INTVAL (v->mult_val) > 0
8768 && ! v->ignore && ! v->maybe_dead && v->always_computable
8774 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8780 tem = gen_reg_rtx (mode);
8782 /* Replace biv with giv's reduced register. */
8783 validate_change (insn, &XEXP (x, 1 - arg_operand),
8786 /* Compute value to compare against. */
8787 emit_iv_add_mult (arg, v->mult_val, v->add_val, tem, where);
8788 /* Use it in this insn. */
8789 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
8790 if (apply_change_group ())
8794 else if (GET_CODE (arg) == REG || GET_CODE (arg) == MEM)
8796 if (loop_invariant_p (loop, arg) == 1)
8798 /* Look for giv with constant positive mult_val and nonconst
8799 add_val. Insert insns to compute new compare value.
8800 ??? Turn this off due to possible overflow. */
8802 for (v = bl->giv; v; v = v->next_iv)
8803 if (CONSTANT_P (v->mult_val) && INTVAL (v->mult_val) > 0
8804 && ! v->ignore && ! v->maybe_dead && v->always_computable
8810 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8816 tem = gen_reg_rtx (mode);
8818 /* Replace biv with giv's reduced register. */
8819 validate_change (insn, &XEXP (x, 1 - arg_operand),
8822 /* Compute value to compare against. */
8823 emit_iv_add_mult (arg, v->mult_val, v->add_val,
8825 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
8826 if (apply_change_group ())
8831 /* This code has problems. Basically, you can't know when
8832 seeing if we will eliminate BL, whether a particular giv
8833 of ARG will be reduced. If it isn't going to be reduced,
8834 we can't eliminate BL. We can try forcing it to be reduced,
8835 but that can generate poor code.
8837 The problem is that the benefit of reducing TV, below should
8838 be increased if BL can actually be eliminated, but this means
8839 we might have to do a topological sort of the order in which
8840 we try to process biv. It doesn't seem worthwhile to do
8841 this sort of thing now. */
8844 /* Otherwise the reg compared with had better be a biv. */
8845 if (GET_CODE (arg) != REG
8846 || REG_IV_TYPE (REGNO (arg)) != BASIC_INDUCT)
8849 /* Look for a pair of givs, one for each biv,
8850 with identical coefficients. */
8851 for (v = bl->giv; v; v = v->next_iv)
8853 struct induction *tv;
8855 if (v->ignore || v->maybe_dead || v->mode != mode)
8858 for (tv = reg_biv_class[REGNO (arg)]->giv; tv; tv = tv->next_iv)
8859 if (! tv->ignore && ! tv->maybe_dead
8860 && rtx_equal_p (tv->mult_val, v->mult_val)
8861 && rtx_equal_p (tv->add_val, v->add_val)
8862 && tv->mode == mode)
8864 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8870 /* Replace biv with its giv's reduced reg. */
8871 XEXP (x, 1-arg_operand) = v->new_reg;
8872 /* Replace other operand with the other giv's
8874 XEXP (x, arg_operand) = tv->new_reg;
8881 /* If we get here, the biv can't be eliminated. */
8885 /* If this address is a DEST_ADDR giv, it doesn't matter if the
8886 biv is used in it, since it will be replaced. */
8887 for (v = bl->giv; v; v = v->next_iv)
8888 if (v->giv_type == DEST_ADDR && v->location == &XEXP (x, 0))
8896 /* See if any subexpression fails elimination. */
8897 fmt = GET_RTX_FORMAT (code);
8898 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
8903 if (! maybe_eliminate_biv_1 (loop, XEXP (x, i), insn, bl,
8904 eliminate_p, where))
8909 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
8910 if (! maybe_eliminate_biv_1 (loop, XVECEXP (x, i, j), insn, bl,
8911 eliminate_p, where))
8920 /* Return nonzero if the last use of REG
8921 is in an insn following INSN in the same basic block. */
8924 last_use_this_basic_block (reg, insn)
8930 n && GET_CODE (n) != CODE_LABEL && GET_CODE (n) != JUMP_INSN;
8933 if (REGNO_LAST_UID (REGNO (reg)) == INSN_UID (n))
8939 /* Called via `note_stores' to record the initial value of a biv. Here we
8940 just record the location of the set and process it later. */
8943 record_initial (dest, set, data)
8946 void *data ATTRIBUTE_UNUSED;
8948 struct iv_class *bl;
8950 if (GET_CODE (dest) != REG
8951 || REGNO (dest) >= max_reg_before_loop
8952 || REG_IV_TYPE (REGNO (dest)) != BASIC_INDUCT)
8955 bl = reg_biv_class[REGNO (dest)];
8957 /* If this is the first set found, record it. */
8958 if (bl->init_insn == 0)
8960 bl->init_insn = note_insn;
8965 /* If any of the registers in X are "old" and currently have a last use earlier
8966 than INSN, update them to have a last use of INSN. Their actual last use
8967 will be the previous insn but it will not have a valid uid_luid so we can't
8971 update_reg_last_use (x, insn)
8975 /* Check for the case where INSN does not have a valid luid. In this case,
8976 there is no need to modify the regno_last_uid, as this can only happen
8977 when code is inserted after the loop_end to set a pseudo's final value,
8978 and hence this insn will never be the last use of x. */
8979 if (GET_CODE (x) == REG && REGNO (x) < max_reg_before_loop
8980 && INSN_UID (insn) < max_uid_for_loop
8981 && uid_luid[REGNO_LAST_UID (REGNO (x))] < uid_luid[INSN_UID (insn)])
8982 REGNO_LAST_UID (REGNO (x)) = INSN_UID (insn);
8986 register const char *fmt = GET_RTX_FORMAT (GET_CODE (x));
8987 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
8990 update_reg_last_use (XEXP (x, i), insn);
8991 else if (fmt[i] == 'E')
8992 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
8993 update_reg_last_use (XVECEXP (x, i, j), insn);
8998 /* Given a jump insn JUMP, return the condition that will cause it to branch
8999 to its JUMP_LABEL. If the condition cannot be understood, or is an
9000 inequality floating-point comparison which needs to be reversed, 0 will
9003 If EARLIEST is non-zero, it is a pointer to a place where the earliest
9004 insn used in locating the condition was found. If a replacement test
9005 of the condition is desired, it should be placed in front of that
9006 insn and we will be sure that the inputs are still valid.
9008 The condition will be returned in a canonical form to simplify testing by
9009 callers. Specifically:
9011 (1) The code will always be a comparison operation (EQ, NE, GT, etc.).
9012 (2) Both operands will be machine operands; (cc0) will have been replaced.
9013 (3) If an operand is a constant, it will be the second operand.
9014 (4) (LE x const) will be replaced with (LT x <const+1>) and similarly
9015 for GE, GEU, and LEU. */
9018 get_condition (jump, earliest)
9027 int reverse_code = 0;
9028 int did_reverse_condition = 0;
9029 enum machine_mode mode;
9031 /* If this is not a standard conditional jump, we can't parse it. */
9032 if (GET_CODE (jump) != JUMP_INSN
9033 || ! condjump_p (jump) || simplejump_p (jump))
9036 code = GET_CODE (XEXP (SET_SRC (PATTERN (jump)), 0));
9037 mode = GET_MODE (XEXP (SET_SRC (PATTERN (jump)), 0));
9038 op0 = XEXP (XEXP (SET_SRC (PATTERN (jump)), 0), 0);
9039 op1 = XEXP (XEXP (SET_SRC (PATTERN (jump)), 0), 1);
9044 /* If this branches to JUMP_LABEL when the condition is false, reverse
9046 if (GET_CODE (XEXP (SET_SRC (PATTERN (jump)), 2)) == LABEL_REF
9047 && XEXP (XEXP (SET_SRC (PATTERN (jump)), 2), 0) == JUMP_LABEL (jump))
9048 code = reverse_condition (code), did_reverse_condition ^= 1;
9050 /* If we are comparing a register with zero, see if the register is set
9051 in the previous insn to a COMPARE or a comparison operation. Perform
9052 the same tests as a function of STORE_FLAG_VALUE as find_comparison_args
9055 while (GET_RTX_CLASS (code) == '<' && op1 == CONST0_RTX (GET_MODE (op0)))
9057 /* Set non-zero when we find something of interest. */
9061 /* If comparison with cc0, import actual comparison from compare
9065 if ((prev = prev_nonnote_insn (prev)) == 0
9066 || GET_CODE (prev) != INSN
9067 || (set = single_set (prev)) == 0
9068 || SET_DEST (set) != cc0_rtx)
9071 op0 = SET_SRC (set);
9072 op1 = CONST0_RTX (GET_MODE (op0));
9078 /* If this is a COMPARE, pick up the two things being compared. */
9079 if (GET_CODE (op0) == COMPARE)
9081 op1 = XEXP (op0, 1);
9082 op0 = XEXP (op0, 0);
9085 else if (GET_CODE (op0) != REG)
9088 /* Go back to the previous insn. Stop if it is not an INSN. We also
9089 stop if it isn't a single set or if it has a REG_INC note because
9090 we don't want to bother dealing with it. */
9092 if ((prev = prev_nonnote_insn (prev)) == 0
9093 || GET_CODE (prev) != INSN
9094 || FIND_REG_INC_NOTE (prev, 0)
9095 || (set = single_set (prev)) == 0)
9098 /* If this is setting OP0, get what it sets it to if it looks
9100 if (rtx_equal_p (SET_DEST (set), op0))
9102 enum machine_mode inner_mode = GET_MODE (SET_SRC (set));
9104 /* ??? We may not combine comparisons done in a CCmode with
9105 comparisons not done in a CCmode. This is to aid targets
9106 like Alpha that have an IEEE compliant EQ instruction, and
9107 a non-IEEE compliant BEQ instruction. The use of CCmode is
9108 actually artificial, simply to prevent the combination, but
9109 should not affect other platforms.
9111 However, we must allow VOIDmode comparisons to match either
9112 CCmode or non-CCmode comparison, because some ports have
9113 modeless comparisons inside branch patterns.
9115 ??? This mode check should perhaps look more like the mode check
9116 in simplify_comparison in combine. */
9118 if ((GET_CODE (SET_SRC (set)) == COMPARE
9121 && GET_MODE_CLASS (inner_mode) == MODE_INT
9122 && (GET_MODE_BITSIZE (inner_mode)
9123 <= HOST_BITS_PER_WIDE_INT)
9124 && (STORE_FLAG_VALUE
9125 & ((HOST_WIDE_INT) 1
9126 << (GET_MODE_BITSIZE (inner_mode) - 1))))
9127 #ifdef FLOAT_STORE_FLAG_VALUE
9129 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
9130 && (REAL_VALUE_NEGATIVE
9131 (FLOAT_STORE_FLAG_VALUE (inner_mode))))
9134 && GET_RTX_CLASS (GET_CODE (SET_SRC (set))) == '<'))
9135 && (((GET_MODE_CLASS (mode) == MODE_CC)
9136 == (GET_MODE_CLASS (inner_mode) == MODE_CC))
9137 || mode == VOIDmode || inner_mode == VOIDmode))
9139 else if (((code == EQ
9141 && (GET_MODE_BITSIZE (inner_mode)
9142 <= HOST_BITS_PER_WIDE_INT)
9143 && GET_MODE_CLASS (inner_mode) == MODE_INT
9144 && (STORE_FLAG_VALUE
9145 & ((HOST_WIDE_INT) 1
9146 << (GET_MODE_BITSIZE (inner_mode) - 1))))
9147 #ifdef FLOAT_STORE_FLAG_VALUE
9149 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
9150 && (REAL_VALUE_NEGATIVE
9151 (FLOAT_STORE_FLAG_VALUE (inner_mode))))
9154 && GET_RTX_CLASS (GET_CODE (SET_SRC (set))) == '<'
9155 && (((GET_MODE_CLASS (mode) == MODE_CC)
9156 == (GET_MODE_CLASS (inner_mode) == MODE_CC))
9157 || mode == VOIDmode || inner_mode == VOIDmode))
9160 /* We might have reversed a LT to get a GE here. But this wasn't
9161 actually the comparison of data, so we don't flag that we
9162 have had to reverse the condition. */
9163 did_reverse_condition ^= 1;
9171 else if (reg_set_p (op0, prev))
9172 /* If this sets OP0, but not directly, we have to give up. */
9177 if (GET_RTX_CLASS (GET_CODE (x)) == '<')
9178 code = GET_CODE (x);
9181 code = reverse_condition (code);
9182 if (code == UNKNOWN)
9184 did_reverse_condition ^= 1;
9188 op0 = XEXP (x, 0), op1 = XEXP (x, 1);
9194 /* If constant is first, put it last. */
9195 if (CONSTANT_P (op0))
9196 code = swap_condition (code), tem = op0, op0 = op1, op1 = tem;
9198 /* If OP0 is the result of a comparison, we weren't able to find what
9199 was really being compared, so fail. */
9200 if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_CC)
9203 /* Canonicalize any ordered comparison with integers involving equality
9204 if we can do computations in the relevant mode and we do not
9207 if (GET_CODE (op1) == CONST_INT
9208 && GET_MODE (op0) != VOIDmode
9209 && GET_MODE_BITSIZE (GET_MODE (op0)) <= HOST_BITS_PER_WIDE_INT)
9211 HOST_WIDE_INT const_val = INTVAL (op1);
9212 unsigned HOST_WIDE_INT uconst_val = const_val;
9213 unsigned HOST_WIDE_INT max_val
9214 = (unsigned HOST_WIDE_INT) GET_MODE_MASK (GET_MODE (op0));
9219 if ((unsigned HOST_WIDE_INT) const_val != max_val >> 1)
9220 code = LT, op1 = GEN_INT (const_val + 1);
9223 /* When cross-compiling, const_val might be sign-extended from
9224 BITS_PER_WORD to HOST_BITS_PER_WIDE_INT */
9226 if ((HOST_WIDE_INT) (const_val & max_val)
9227 != (((HOST_WIDE_INT) 1
9228 << (GET_MODE_BITSIZE (GET_MODE (op0)) - 1))))
9229 code = GT, op1 = GEN_INT (const_val - 1);
9233 if (uconst_val < max_val)
9234 code = LTU, op1 = GEN_INT (uconst_val + 1);
9238 if (uconst_val != 0)
9239 code = GTU, op1 = GEN_INT (uconst_val - 1);
9247 /* If this was floating-point and we reversed anything other than an
9248 EQ or NE or (UN)ORDERED, return zero. */
9249 if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT
9250 && did_reverse_condition
9251 && code != NE && code != EQ && code != UNORDERED && code != ORDERED
9253 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_FLOAT)
9257 /* Never return CC0; return zero instead. */
9262 return gen_rtx_fmt_ee (code, VOIDmode, op0, op1);
9265 /* Similar to above routine, except that we also put an invariant last
9266 unless both operands are invariants. */
9269 get_condition_for_loop (loop, x)
9270 const struct loop *loop;
9273 rtx comparison = get_condition (x, NULL_PTR);
9276 || ! loop_invariant_p (loop, XEXP (comparison, 0))
9277 || loop_invariant_p (loop, XEXP (comparison, 1)))
9280 return gen_rtx_fmt_ee (swap_condition (GET_CODE (comparison)), VOIDmode,
9281 XEXP (comparison, 1), XEXP (comparison, 0));
9284 #ifdef HAVE_decrement_and_branch_on_count
9285 /* Instrument loop for insertion of bct instruction. We distinguish between
9286 loops with compile-time bounds and those with run-time bounds.
9287 Information from loop_iterations() is used to compute compile-time bounds.
9288 Run-time bounds should use loop preconditioning, but currently ignored.
9295 unsigned HOST_WIDE_INT n_iterations;
9296 rtx loop_start = loop->start;
9297 rtx loop_end = loop->end;
9298 struct loop_info *loop_info = LOOP_INFO (loop);
9299 int loop_num = loop->num;
9302 int increment_direction, compare_direction;
9303 /* If the loop condition is <= or >=, the number of iteration
9304 is 1 more than the range of the bounds of the loop. */
9305 int add_iteration = 0;
9306 enum machine_mode loop_var_mode = word_mode;
9309 /* It's impossible to instrument a competely unrolled loop. */
9310 if (loop_info->unroll_number == loop_info->n_iterations)
9313 /* Make sure that the count register is not in use. */
9314 if (loop_info->used_count_register)
9316 if (loop_dump_stream)
9317 fprintf (loop_dump_stream,
9318 "insert_bct %d: BCT instrumentation failed: count register already in use\n",
9323 /* Make sure that the function has no indirect jumps. */
9324 if (indirect_jump_in_function)
9326 if (loop_dump_stream)
9327 fprintf (loop_dump_stream,
9328 "insert_bct %d: BCT instrumentation failed: indirect jump in function\n",
9333 /* Make sure that the last loop insn is a conditional jump. */
9334 if (GET_CODE (PREV_INSN (loop_end)) != JUMP_INSN
9335 || ! condjump_p (PREV_INSN (loop_end))
9336 || simplejump_p (PREV_INSN (loop_end)))
9338 if (loop_dump_stream)
9339 fprintf (loop_dump_stream,
9340 "insert_bct %d: BCT instrumentation failed: invalid jump at loop end\n",
9345 /* Make sure that the loop does not contain a function call
9346 (the count register might be altered by the called function). */
9347 if (loop_info->has_call)
9349 if (loop_dump_stream)
9350 fprintf (loop_dump_stream,
9351 "insert_bct %d: BCT instrumentation failed: function call in loop\n",
9356 /* Make sure that the loop does not jump via a table.
9357 (the count register might be used to perform the branch on table). */
9358 if (loop_info->has_tablejump)
9360 if (loop_dump_stream)
9361 fprintf (loop_dump_stream,
9362 "insert_bct %d: BCT instrumentation failed: computed branch in the loop\n",
9367 /* Account for loop unrolling in instrumented iteration count. */
9368 if (loop_info->unroll_number > 1)
9369 n_iterations = loop_info->n_iterations / loop_info->unroll_number;
9371 n_iterations = loop_info->n_iterations;
9373 if (n_iterations != 0 && n_iterations < 3)
9375 /* Allow an enclosing outer loop to benefit if possible. */
9376 if (loop_dump_stream)
9377 fprintf (loop_dump_stream,
9378 "insert_bct %d: Too few iterations to benefit from BCT optimization\n",
9383 /* Try to instrument the loop. */
9385 /* Handle the simpler case, where the bounds are known at compile time. */
9386 if (n_iterations > 0)
9388 struct loop *outer_loop;
9389 struct loop_info *outer_loop_info;
9391 /* Mark all enclosing loops that they cannot use count register. */
9392 for (outer_loop = loop; outer_loop; outer_loop = outer_loop->outer)
9394 outer_loop_info = LOOP_INFO (outer_loop);
9395 outer_loop_info->used_count_register = 1;
9397 instrument_loop_bct (loop_start, loop_end, GEN_INT (n_iterations));
9401 /* Handle the more complex case, that the bounds are NOT known
9402 at compile time. In this case we generate run_time calculation
9403 of the number of iterations. */
9405 if (loop_info->iteration_var == 0)
9407 if (loop_dump_stream)
9408 fprintf (loop_dump_stream,
9409 "insert_bct %d: BCT Runtime Instrumentation failed: no loop iteration variable found\n",
9414 if (GET_MODE_CLASS (GET_MODE (loop_info->iteration_var)) != MODE_INT
9415 || GET_MODE_SIZE (GET_MODE (loop_info->iteration_var)) != UNITS_PER_WORD)
9417 if (loop_dump_stream)
9418 fprintf (loop_dump_stream,
9419 "insert_bct %d: BCT Runtime Instrumentation failed: loop variable not integer\n",
9424 /* With runtime bounds, if the compare is of the form '!=' we give up */
9425 if (loop_info->comparison_code == NE)
9427 if (loop_dump_stream)
9428 fprintf (loop_dump_stream,
9429 "insert_bct %d: BCT Runtime Instrumentation failed: runtime bounds with != comparison\n",
9433 /* Use common loop preconditioning code instead. */
9437 /* We rely on the existence of run-time guard to ensure that the
9438 loop executes at least once. */
9440 rtx iterations_num_reg;
9442 unsigned HOST_WIDE_INT increment_value_abs
9443 = INTVAL (increment) * increment_direction;
9445 /* make sure that the increment is a power of two, otherwise (an
9446 expensive) divide is needed. */
9447 if (exact_log2 (increment_value_abs) == -1)
9449 if (loop_dump_stream)
9450 fprintf (loop_dump_stream,
9451 "insert_bct: not instrumenting BCT because the increment is not power of 2\n");
9455 /* compute the number of iterations */
9460 /* Again, the number of iterations is calculated by:
9462 ; compare-val - initial-val + (increment -1) + additional-iteration
9463 ; num_iterations = -----------------------------------------------------------------
9466 /* ??? Do we have to call copy_rtx here before passing rtx to
9468 if (compare_direction > 0)
9470 /* <, <= :the loop variable is increasing */
9471 temp_reg = expand_binop (loop_var_mode, sub_optab,
9472 comparison_value, initial_value,
9473 NULL_RTX, 0, OPTAB_LIB_WIDEN);
9477 temp_reg = expand_binop (loop_var_mode, sub_optab,
9478 initial_value, comparison_value,
9479 NULL_RTX, 0, OPTAB_LIB_WIDEN);
9482 if (increment_value_abs - 1 + add_iteration != 0)
9483 temp_reg = expand_binop (loop_var_mode, add_optab, temp_reg,
9484 GEN_INT (increment_value_abs - 1
9486 NULL_RTX, 0, OPTAB_LIB_WIDEN);
9488 if (increment_value_abs != 1)
9489 iterations_num_reg = expand_binop (loop_var_mode, asr_optab,
9491 GEN_INT (exact_log2 (increment_value_abs)),
9492 NULL_RTX, 0, OPTAB_LIB_WIDEN);
9494 iterations_num_reg = temp_reg;
9496 sequence = gen_sequence ();
9498 emit_insn_before (sequence, loop_start);
9499 instrument_loop_bct (loop_start, loop_end, iterations_num_reg);
9503 #endif /* Complex case */
9506 /* Instrument loop by inserting a bct in it as follows:
9507 1. A new counter register is created.
9508 2. In the head of the loop the new variable is initialized to the value
9509 passed in the loop_num_iterations parameter.
9510 3. At the end of the loop, comparison of the register with 0 is generated.
9511 The created comparison follows the pattern defined for the
9512 decrement_and_branch_on_count insn, so this insn will be generated.
9513 4. The branch on the old variable are deleted. The compare must remain
9514 because it might be used elsewhere. If the loop-variable or condition
9515 register are used elsewhere, they will be eliminated by flow. */
9518 instrument_loop_bct (loop_start, loop_end, loop_num_iterations)
9519 rtx loop_start, loop_end;
9520 rtx loop_num_iterations;
9526 if (HAVE_decrement_and_branch_on_count)
9528 if (loop_dump_stream)
9530 fputs ("instrument_bct: Inserting BCT (", loop_dump_stream);
9531 if (GET_CODE (loop_num_iterations) == CONST_INT)
9532 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC,
9533 INTVAL (loop_num_iterations));
9535 fputs ("runtime", loop_dump_stream);
9536 fputs (" iterations)", loop_dump_stream);
9539 /* Discard original jump to continue loop. Original compare result
9540 may still be live, so it cannot be discarded explicitly. */
9541 delete_insn (PREV_INSN (loop_end));
9543 /* Insert the label which will delimit the start of the loop. */
9544 start_label = gen_label_rtx ();
9545 emit_label_after (start_label, loop_start);
9547 /* Insert initialization of the count register into the loop header. */
9549 counter_reg = gen_reg_rtx (word_mode);
9550 emit_insn (gen_move_insn (counter_reg, loop_num_iterations));
9551 sequence = gen_sequence ();
9553 emit_insn_before (sequence, loop_start);
9555 /* Insert new comparison on the count register instead of the
9556 old one, generating the needed BCT pattern (that will be
9557 later recognized by assembly generation phase). */
9558 emit_jump_insn_before (gen_decrement_and_branch_on_count (counter_reg,
9561 LABEL_NUSES (start_label)++;
9565 #endif /* HAVE_decrement_and_branch_on_count */
9567 /* Scan the function and determine whether it has indirect (computed) jumps.
9569 This is taken mostly from flow.c; similar code exists elsewhere
9570 in the compiler. It may be useful to put this into rtlanal.c. */
9572 indirect_jump_in_function_p (start)
9577 for (insn = start; insn; insn = NEXT_INSN (insn))
9578 if (computed_jump_p (insn))
9584 /* Add MEM to the LOOP_MEMS array, if appropriate. See the
9585 documentation for LOOP_MEMS for the definition of `appropriate'.
9586 This function is called from prescan_loop via for_each_rtx. */
9589 insert_loop_mem (mem, data)
9591 void *data ATTRIBUTE_UNUSED;
9599 switch (GET_CODE (m))
9605 /* We're not interested in MEMs that are only clobbered. */
9609 /* We're not interested in the MEM associated with a
9610 CONST_DOUBLE, so there's no need to traverse into this. */
9614 /* We're not interested in any MEMs that only appear in notes. */
9618 /* This is not a MEM. */
9622 /* See if we've already seen this MEM. */
9623 for (i = 0; i < loop_mems_idx; ++i)
9624 if (rtx_equal_p (m, loop_mems[i].mem))
9626 if (GET_MODE (m) != GET_MODE (loop_mems[i].mem))
9627 /* The modes of the two memory accesses are different. If
9628 this happens, something tricky is going on, and we just
9629 don't optimize accesses to this MEM. */
9630 loop_mems[i].optimize = 0;
9635 /* Resize the array, if necessary. */
9636 if (loop_mems_idx == loop_mems_allocated)
9638 if (loop_mems_allocated != 0)
9639 loop_mems_allocated *= 2;
9641 loop_mems_allocated = 32;
9643 loop_mems = (loop_mem_info*)
9644 xrealloc (loop_mems,
9645 loop_mems_allocated * sizeof (loop_mem_info));
9648 /* Actually insert the MEM. */
9649 loop_mems[loop_mems_idx].mem = m;
9650 /* We can't hoist this MEM out of the loop if it's a BLKmode MEM
9651 because we can't put it in a register. We still store it in the
9652 table, though, so that if we see the same address later, but in a
9653 non-BLK mode, we'll not think we can optimize it at that point. */
9654 loop_mems[loop_mems_idx].optimize = (GET_MODE (m) != BLKmode);
9655 loop_mems[loop_mems_idx].reg = NULL_RTX;
9661 /* Like load_mems, but also ensures that SET_IN_LOOP,
9662 MAY_NOT_OPTIMIZE, REG_SINGLE_USAGE, and INSN_COUNT have the correct
9663 values after load_mems. */
9666 load_mems_and_recount_loop_regs_set (loop, insn_count)
9667 const struct loop *loop;
9670 int nregs = max_reg_num ();
9674 /* Recalculate set_in_loop and friends since load_mems may have
9675 created new registers. */
9676 if (max_reg_num () > nregs)
9682 nregs = max_reg_num ();
9684 if ((unsigned) nregs > set_in_loop->num_elements)
9686 /* Grow all the arrays. */
9687 VARRAY_GROW (set_in_loop, nregs);
9688 VARRAY_GROW (n_times_set, nregs);
9689 VARRAY_GROW (may_not_optimize, nregs);
9690 VARRAY_GROW (reg_single_usage, nregs);
9692 /* Clear the arrays */
9693 bzero ((char *) &set_in_loop->data, nregs * sizeof (int));
9694 bzero ((char *) &may_not_optimize->data, nregs * sizeof (char));
9695 bzero ((char *) ®_single_usage->data, nregs * sizeof (rtx));
9697 count_loop_regs_set (loop->top ? loop->top : loop->start, loop->end,
9698 may_not_optimize, reg_single_usage,
9701 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
9703 VARRAY_CHAR (may_not_optimize, i) = 1;
9704 VARRAY_INT (set_in_loop, i) = 1;
9707 #ifdef AVOID_CCMODE_COPIES
9708 /* Don't try to move insns which set CC registers if we should not
9709 create CCmode register copies. */
9710 for (i = max_reg_num () - 1; i >= FIRST_PSEUDO_REGISTER; i--)
9711 if (GET_MODE_CLASS (GET_MODE (regno_reg_rtx[i])) == MODE_CC)
9712 VARRAY_CHAR (may_not_optimize, i) = 1;
9715 /* Set n_times_set for the new registers. */
9716 bcopy ((char *) (&set_in_loop->data.i[0] + old_nregs),
9717 (char *) (&n_times_set->data.i[0] + old_nregs),
9718 (nregs - old_nregs) * sizeof (int));
9722 /* Move MEMs into registers for the duration of the loop. */
9726 const struct loop *loop;
9728 int maybe_never = 0;
9731 rtx label = NULL_RTX;
9732 rtx end_label = NULL_RTX;
9733 /* Nonzero if the next instruction may never be executed. */
9734 int next_maybe_never = 0;
9735 int last_max_reg = max_reg_num ();
9737 if (loop_mems_idx == 0)
9740 /* Check to see if it's possible that some instructions in the
9741 loop are never executed. */
9742 for (p = next_insn_in_loop (loop, loop->scan_start);
9743 p != NULL_RTX && ! maybe_never;
9744 p = next_insn_in_loop (loop, p))
9746 if (GET_CODE (p) == CODE_LABEL)
9748 else if (GET_CODE (p) == JUMP_INSN
9749 /* If we enter the loop in the middle, and scan
9750 around to the beginning, don't set maybe_never
9751 for that. This must be an unconditional jump,
9752 otherwise the code at the top of the loop might
9753 never be executed. Unconditional jumps are
9754 followed a by barrier then loop end. */
9755 && ! (GET_CODE (p) == JUMP_INSN
9756 && JUMP_LABEL (p) == loop->top
9757 && NEXT_INSN (NEXT_INSN (p)) == loop->end
9758 && simplejump_p (p)))
9760 if (!condjump_p (p))
9761 /* Something complicated. */
9764 /* If there are any more instructions in the loop, they
9765 might not be reached. */
9766 next_maybe_never = 1;
9768 else if (next_maybe_never)
9772 /* Actually move the MEMs. */
9773 for (i = 0; i < loop_mems_idx; ++i)
9778 rtx mem = loop_mems[i].mem;
9781 if (MEM_VOLATILE_P (mem)
9782 || loop_invariant_p (loop, XEXP (mem, 0)) != 1)
9783 /* There's no telling whether or not MEM is modified. */
9784 loop_mems[i].optimize = 0;
9786 /* Go through the MEMs written to in the loop to see if this
9787 one is aliased by one of them. */
9788 mem_list_entry = loop_store_mems;
9789 while (mem_list_entry)
9791 if (rtx_equal_p (mem, XEXP (mem_list_entry, 0)))
9793 else if (true_dependence (XEXP (mem_list_entry, 0), VOIDmode,
9796 /* MEM is indeed aliased by this store. */
9797 loop_mems[i].optimize = 0;
9800 mem_list_entry = XEXP (mem_list_entry, 1);
9803 if (flag_float_store && written
9804 && GET_MODE_CLASS (GET_MODE (mem)) == MODE_FLOAT)
9805 loop_mems[i].optimize = 0;
9807 /* If this MEM is written to, we must be sure that there
9808 are no reads from another MEM that aliases this one. */
9809 if (loop_mems[i].optimize && written)
9813 for (j = 0; j < loop_mems_idx; ++j)
9817 else if (true_dependence (mem,
9822 /* It's not safe to hoist loop_mems[i] out of
9823 the loop because writes to it might not be
9824 seen by reads from loop_mems[j]. */
9825 loop_mems[i].optimize = 0;
9831 if (maybe_never && may_trap_p (mem))
9832 /* We can't access the MEM outside the loop; it might
9833 cause a trap that wouldn't have happened otherwise. */
9834 loop_mems[i].optimize = 0;
9836 if (!loop_mems[i].optimize)
9837 /* We thought we were going to lift this MEM out of the
9838 loop, but later discovered that we could not. */
9841 INIT_REG_SET (&copies);
9843 /* Allocate a pseudo for this MEM. We set REG_USERVAR_P in
9844 order to keep scan_loop from moving stores to this MEM
9845 out of the loop just because this REG is neither a
9846 user-variable nor used in the loop test. */
9847 reg = gen_reg_rtx (GET_MODE (mem));
9848 REG_USERVAR_P (reg) = 1;
9849 loop_mems[i].reg = reg;
9851 /* Now, replace all references to the MEM with the
9852 corresponding pesudos. */
9854 for (p = next_insn_in_loop (loop, loop->scan_start);
9856 p = next_insn_in_loop (loop, p))
9861 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
9863 /* See if this copies the mem into a register that isn't
9864 modified afterwards. We'll try to do copy propagation
9865 a little further on. */
9866 set = single_set (p);
9868 /* @@@ This test is _way_ too conservative. */
9870 && GET_CODE (SET_DEST (set)) == REG
9871 && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER
9872 && REGNO (SET_DEST (set)) < last_max_reg
9873 && VARRAY_INT (n_times_set, REGNO (SET_DEST (set))) == 1
9874 && rtx_equal_p (SET_SRC (set), loop_mems[i].mem))
9875 SET_REGNO_REG_SET (&copies, REGNO (SET_DEST (set)));
9878 for_each_rtx (&p, replace_loop_mem, &ri);
9881 if (GET_CODE (p) == CODE_LABEL
9882 || GET_CODE (p) == JUMP_INSN)
9886 if (! apply_change_group ())
9887 /* We couldn't replace all occurrences of the MEM. */
9888 loop_mems[i].optimize = 0;
9894 /* Load the memory immediately before LOOP->START, which is
9895 the NOTE_LOOP_BEG. */
9896 set = gen_move_insn (reg, mem);
9897 emit_insn_before (set, loop->start);
9901 if (label == NULL_RTX)
9903 /* We must compute the former
9904 right-after-the-end label before we insert
9906 end_label = next_label (loop->end);
9907 label = gen_label_rtx ();
9908 emit_label_after (label, loop->end);
9911 /* Store the memory immediately after END, which is
9912 the NOTE_LOOP_END. */
9913 set = gen_move_insn (copy_rtx (mem), reg);
9914 emit_insn_after (set, label);
9917 if (loop_dump_stream)
9919 fprintf (loop_dump_stream, "Hoisted regno %d %s from ",
9920 REGNO (reg), (written ? "r/w" : "r/o"));
9921 print_rtl (loop_dump_stream, mem);
9922 fputc ('\n', loop_dump_stream);
9925 /* Attempt a bit of copy propagation. This helps untangle the
9926 data flow, and enables {basic,general}_induction_var to find
9928 EXECUTE_IF_SET_IN_REG_SET
9929 (&copies, FIRST_PSEUDO_REGISTER, j,
9931 try_copy_prop (loop, loop_mems[i].reg, j);
9933 CLEAR_REG_SET (&copies);
9937 if (label != NULL_RTX)
9939 /* Now, we need to replace all references to the previous exit
9940 label with the new one. */
9945 for (p = loop->start; p != loop->end; p = NEXT_INSN (p))
9947 for_each_rtx (&p, replace_label, &rr);
9949 /* If this is a JUMP_INSN, then we also need to fix the JUMP_LABEL
9950 field. This is not handled by for_each_rtx because it doesn't
9951 handle unprinted ('0') fields. We need to update JUMP_LABEL
9952 because the immediately following unroll pass will use it.
9953 replace_label would not work anyways, because that only handles
9955 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p) == end_label)
9956 JUMP_LABEL (p) = label;
9961 /* For communication between note_reg_stored and its caller. */
9962 struct note_reg_stored_arg
9968 /* Called via note_stores, record in SET_SEEN whether X, which is written,
9971 note_reg_stored (x, setter, arg)
9972 rtx x, setter ATTRIBUTE_UNUSED;
9975 struct note_reg_stored_arg *t = (struct note_reg_stored_arg *)arg;
9980 /* Try to replace every occurrence of pseudo REGNO with REPLACEMENT.
9981 There must be exactly one insn that sets this pseudo; it will be
9982 deleted if all replacements succeed and we can prove that the register
9983 is not used after the loop. */
9985 try_copy_prop (loop, replacement, regno)
9986 const struct loop *loop;
9990 /* This is the reg that we are copying from. */
9991 rtx reg_rtx = regno_reg_rtx[regno];
9994 /* These help keep track of whether we replaced all uses of the reg. */
9995 int replaced_last = 0;
9996 int store_is_first = 0;
9998 for (insn = next_insn_in_loop (loop, loop->scan_start);
10000 insn = next_insn_in_loop (loop, insn))
10004 /* Only substitute within one extended basic block from the initializing
10006 if (GET_CODE (insn) == CODE_LABEL && init_insn)
10009 if (GET_RTX_CLASS (GET_CODE (insn)) != 'i')
10012 /* Is this the initializing insn? */
10013 set = single_set (insn);
10015 && GET_CODE (SET_DEST (set)) == REG
10016 && REGNO (SET_DEST (set)) == regno)
10022 if (REGNO_FIRST_UID (regno) == INSN_UID (insn))
10023 store_is_first = 1;
10026 /* Only substitute after seeing the initializing insn. */
10027 if (init_insn && insn != init_insn)
10029 struct note_reg_stored_arg arg;
10031 array[0] = reg_rtx;
10032 array[1] = replacement;
10035 for_each_rtx (&insn, replace_loop_reg, array);
10036 if (REGNO_LAST_UID (regno) == INSN_UID (insn))
10039 /* Stop replacing when REPLACEMENT is modified. */
10040 arg.reg = replacement;
10042 note_stores (PATTERN (insn), note_reg_stored, &arg);
10049 if (apply_change_group ())
10051 if (loop_dump_stream)
10052 fprintf (loop_dump_stream, " Replaced reg %d", regno);
10053 if (store_is_first && replaced_last)
10055 PUT_CODE (init_insn, NOTE);
10056 NOTE_LINE_NUMBER (init_insn) = NOTE_INSN_DELETED;
10057 if (loop_dump_stream)
10058 fprintf (loop_dump_stream, ", deleting init_insn (%d)",
10059 INSN_UID (init_insn));
10061 if (loop_dump_stream)
10062 fprintf (loop_dump_stream, ".\n");
10066 /* Replace MEM with its associated pseudo register. This function is
10067 called from load_mems via for_each_rtx. DATA is actually an
10068 rtx_and_int * describing the instruction currently being scanned
10069 and the MEM we are currently replacing. */
10072 replace_loop_mem (mem, data)
10084 switch (GET_CODE (m))
10090 /* We're not interested in the MEM associated with a
10091 CONST_DOUBLE, so there's no need to traverse into one. */
10095 /* This is not a MEM. */
10099 ri = (rtx_and_int*) data;
10102 if (!rtx_equal_p (loop_mems[i].mem, m))
10103 /* This is not the MEM we are currently replacing. */
10108 /* Actually replace the MEM. */
10109 validate_change (insn, mem, loop_mems[i].reg, 1);
10114 /* Replace one register with another. Called through for_each_rtx; PX points
10115 to the rtx being scanned. DATA is actually an array of three rtx's; the
10116 first one is the one to be replaced, and the second one the replacement.
10117 The third one is the current insn. */
10120 replace_loop_reg (px, data)
10125 rtx *array = (rtx *)data;
10131 validate_change (array[2], px, array[1], 1);
10136 /* Replace occurrences of the old exit label for the loop with the new
10137 one. DATA is an rtx_pair containing the old and new labels,
10141 replace_label (x, data)
10146 rtx old_label = ((rtx_pair*) data)->r1;
10147 rtx new_label = ((rtx_pair*) data)->r2;
10152 if (GET_CODE (l) != LABEL_REF)
10155 if (XEXP (l, 0) != old_label)
10158 XEXP (l, 0) = new_label;
10159 ++LABEL_NUSES (new_label);
10160 --LABEL_NUSES (old_label);
OSDN Git Service
