1 /* Move constant computations out of loops.
2 Copyright (C) 1987, 88, 89, 91, 92, 93, 1994 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
21 /* This is the loop optimization pass of the compiler.
22 It finds invariant computations within loops and moves them
23 to the beginning of the loop. Then it identifies basic and
24 general induction variables. Strength reduction is applied to the general
25 induction variables, and induction variable elimination is applied to
26 the basic induction variables.
28 It also finds cases where
29 a register is set within the loop by zero-extending a narrower value
30 and changes these to zero the entire register once before the loop
31 and merely copy the low part within the loop.
33 Most of the complexity is in heuristics to decide when it is worth
34 while to do these things. */
41 #include "insn-config.h"
42 #include "insn-flags.h"
44 #include "hard-reg-set.h"
50 /* Vector mapping INSN_UIDs to luids.
51 The luids are like uids but increase monotonically always.
52 We use them to see whether a jump comes from outside a given loop. */
56 /* Indexed by INSN_UID, contains the ordinal giving the (innermost) loop
57 number the insn is contained in. */
61 /* 1 + largest uid of any insn. */
65 /* 1 + luid of last insn. */
69 /* Number of loops detected in current function. Used as index to the
72 static int max_loop_num;
74 /* Indexed by loop number, contains the first and last insn of each loop. */
76 static rtx *loop_number_loop_starts, *loop_number_loop_ends;
78 /* For each loop, gives the containing loop number, -1 if none. */
82 /* Indexed by loop number, contains a nonzero value if the "loop" isn't
83 really a loop (an insn outside the loop branches into it). */
85 static char *loop_invalid;
87 /* Indexed by loop number, links together all LABEL_REFs which refer to
88 code labels outside the loop. Used by routines that need to know all
89 loop exits, such as final_biv_value and final_giv_value.
91 This does not include loop exits due to return instructions. This is
92 because all bivs and givs are pseudos, and hence must be dead after a
93 return, so the presense of a return does not affect any of the
94 optimizations that use this info. It is simpler to just not include return
95 instructions on this list. */
97 rtx *loop_number_exit_labels;
99 /* Holds the number of loop iterations. It is zero if the number could not be
100 calculated. Must be unsigned since the number of iterations can
101 be as high as 2^wordsize-1. For loops with a wider iterator, this number
102 will will be zero if the number of loop iterations is too large for an
103 unsigned integer to hold. */
105 unsigned HOST_WIDE_INT loop_n_iterations;
107 /* Nonzero if there is a subroutine call in the current loop.
108 (unknown_address_altered is also nonzero in this case.) */
110 static int loop_has_call;
112 /* Nonzero if there is a volatile memory reference in the current
115 static int loop_has_volatile;
117 /* Added loop_continue which is the NOTE_INSN_LOOP_CONT of the
118 current loop. A continue statement will generate a branch to
119 NEXT_INSN (loop_continue). */
121 static rtx loop_continue;
123 /* Indexed by register number, contains the number of times the reg
124 is set during the loop being scanned.
125 During code motion, a negative value indicates a reg that has been
126 made a candidate; in particular -2 means that it is an candidate that
127 we know is equal to a constant and -1 means that it is an candidate
128 not known equal to a constant.
129 After code motion, regs moved have 0 (which is accurate now)
130 while the failed candidates have the original number of times set.
132 Therefore, at all times, == 0 indicates an invariant register;
133 < 0 a conditionally invariant one. */
135 static short *n_times_set;
137 /* Original value of n_times_set; same except that this value
138 is not set negative for a reg whose sets have been made candidates
139 and not set to 0 for a reg that is moved. */
141 static short *n_times_used;
143 /* Index by register number, 1 indicates that the register
144 cannot be moved or strength reduced. */
146 static char *may_not_optimize;
148 /* Nonzero means reg N has already been moved out of one loop.
149 This reduces the desire to move it out of another. */
151 static char *moved_once;
153 /* Array of MEMs that are stored in this loop. If there are too many to fit
154 here, we just turn on unknown_address_altered. */
156 #define NUM_STORES 20
157 static rtx loop_store_mems[NUM_STORES];
159 /* Index of first available slot in above array. */
160 static int loop_store_mems_idx;
162 /* Nonzero if we don't know what MEMs were changed in the current loop.
163 This happens if the loop contains a call (in which case `loop_has_call'
164 will also be set) or if we store into more than NUM_STORES MEMs. */
166 static int unknown_address_altered;
168 /* Count of movable (i.e. invariant) instructions discovered in the loop. */
169 static int num_movables;
171 /* Count of memory write instructions discovered in the loop. */
172 static int num_mem_sets;
174 /* Number of loops contained within the current one, including itself. */
175 static int loops_enclosed;
177 /* Bound on pseudo register number before loop optimization.
178 A pseudo has valid regscan info if its number is < max_reg_before_loop. */
179 int max_reg_before_loop;
181 /* This obstack is used in product_cheap_p to allocate its rtl. It
182 may call gen_reg_rtx which, in turn, may reallocate regno_reg_rtx.
183 If we used the same obstack that it did, we would be deallocating
186 static struct obstack temp_obstack;
188 /* This is where the pointer to the obstack being used for RTL is stored. */
190 extern struct obstack *rtl_obstack;
192 #define obstack_chunk_alloc xmalloc
193 #define obstack_chunk_free free
195 extern char *oballoc ();
197 /* During the analysis of a loop, a chain of `struct movable's
198 is made to record all the movable insns found.
199 Then the entire chain can be scanned to decide which to move. */
203 rtx insn; /* A movable insn */
204 rtx set_src; /* The expression this reg is set from. */
205 rtx set_dest; /* The destination of this SET. */
206 rtx dependencies; /* When INSN is libcall, this is an EXPR_LIST
207 of any registers used within the LIBCALL. */
208 int consec; /* Number of consecutive following insns
209 that must be moved with this one. */
210 int regno; /* The register it sets */
211 short lifetime; /* lifetime of that register;
212 may be adjusted when matching movables
213 that load the same value are found. */
214 short savings; /* Number of insns we can move for this reg,
215 including other movables that force this
216 or match this one. */
217 unsigned int cond : 1; /* 1 if only conditionally movable */
218 unsigned int force : 1; /* 1 means MUST move this insn */
219 unsigned int global : 1; /* 1 means reg is live outside this loop */
220 /* If PARTIAL is 1, GLOBAL means something different:
221 that the reg is live outside the range from where it is set
222 to the following label. */
223 unsigned int done : 1; /* 1 inhibits further processing of this */
225 unsigned int partial : 1; /* 1 means this reg is used for zero-extending.
226 In particular, moving it does not make it
228 unsigned int move_insn : 1; /* 1 means that we call emit_move_insn to
229 load SRC, rather than copying INSN. */
230 unsigned int is_equiv : 1; /* 1 means a REG_EQUIV is present on INSN. */
231 enum machine_mode savemode; /* Nonzero means it is a mode for a low part
232 that we should avoid changing when clearing
233 the rest of the reg. */
234 struct movable *match; /* First entry for same value */
235 struct movable *forces; /* An insn that must be moved if this is */
236 struct movable *next;
239 FILE *loop_dump_stream;
241 /* Forward declarations. */
243 static void find_and_verify_loops ();
244 static void mark_loop_jump ();
245 static void prescan_loop ();
246 static int reg_in_basic_block_p ();
247 static int consec_sets_invariant_p ();
248 static rtx libcall_other_reg ();
249 static int labels_in_range_p ();
250 static void count_loop_regs_set ();
251 static void note_addr_stored ();
252 static int loop_reg_used_before_p ();
253 static void scan_loop ();
254 static void replace_call_address ();
255 static rtx skip_consec_insns ();
256 static int libcall_benefit ();
257 static void ignore_some_movables ();
258 static void force_movables ();
259 static void combine_movables ();
260 static int rtx_equal_for_loop_p ();
261 static void move_movables ();
262 static void strength_reduce ();
263 static int valid_initial_value_p ();
264 static void find_mem_givs ();
265 static void record_biv ();
266 static void check_final_value ();
267 static void record_giv ();
268 static void update_giv_derive ();
269 static int basic_induction_var ();
270 static rtx simplify_giv_expr ();
271 static int general_induction_var ();
272 static int consec_sets_giv ();
273 static int check_dbra_loop ();
274 static rtx express_from ();
275 static int combine_givs_p ();
276 static void combine_givs ();
277 static int product_cheap_p ();
278 static int maybe_eliminate_biv ();
279 static int maybe_eliminate_biv_1 ();
280 static int last_use_this_basic_block ();
281 static void record_initial ();
282 static void update_reg_last_use ();
284 /* Relative gain of eliminating various kinds of operations. */
291 /* Benefit penalty, if a giv is not replaceable, i.e. must emit an insn to
292 copy the value of the strength reduced giv to its original register. */
298 char *free_point = (char *) oballoc (1);
299 rtx reg = gen_rtx (REG, word_mode, 0);
301 add_cost = rtx_cost (gen_rtx (PLUS, word_mode, reg, reg), SET);
303 /* We multiply by 2 to reconcile the difference in scale between
304 these two ways of computing costs. Otherwise the cost of a copy
305 will be far less than the cost of an add. */
309 /* Free the objects we just allocated. */
312 /* Initialize the obstack used for rtl in product_cheap_p. */
313 gcc_obstack_init (&temp_obstack);
316 /* Entry point of this file. Perform loop optimization
317 on the current function. F is the first insn of the function
318 and DUMPFILE is a stream for output of a trace of actions taken
319 (or 0 if none should be output). */
322 loop_optimize (f, dumpfile)
323 /* f is the first instruction of a chain of insns for one function */
331 loop_dump_stream = dumpfile;
333 init_recog_no_volatile ();
334 init_alias_analysis ();
336 max_reg_before_loop = max_reg_num ();
338 moved_once = (char *) alloca (max_reg_before_loop);
339 bzero (moved_once, max_reg_before_loop);
343 /* Count the number of loops. */
346 for (insn = f; insn; insn = NEXT_INSN (insn))
348 if (GET_CODE (insn) == NOTE
349 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
353 /* Don't waste time if no loops. */
354 if (max_loop_num == 0)
357 /* Get size to use for tables indexed by uids.
358 Leave some space for labels allocated by find_and_verify_loops. */
359 max_uid_for_loop = get_max_uid () + 1 + max_loop_num * 32;
361 uid_luid = (int *) alloca (max_uid_for_loop * sizeof (int));
362 uid_loop_num = (int *) alloca (max_uid_for_loop * sizeof (int));
364 bzero ((char *) uid_luid, max_uid_for_loop * sizeof (int));
365 bzero ((char *) uid_loop_num, max_uid_for_loop * sizeof (int));
367 /* Allocate tables for recording each loop. We set each entry, so they need
369 loop_number_loop_starts = (rtx *) alloca (max_loop_num * sizeof (rtx));
370 loop_number_loop_ends = (rtx *) alloca (max_loop_num * sizeof (rtx));
371 loop_outer_loop = (int *) alloca (max_loop_num * sizeof (int));
372 loop_invalid = (char *) alloca (max_loop_num * sizeof (char));
373 loop_number_exit_labels = (rtx *) alloca (max_loop_num * sizeof (rtx));
375 /* Find and process each loop.
376 First, find them, and record them in order of their beginnings. */
377 find_and_verify_loops (f);
379 /* Now find all register lifetimes. This must be done after
380 find_and_verify_loops, because it might reorder the insns in the
382 reg_scan (f, max_reg_num (), 1);
384 /* See if we went too far. */
385 if (get_max_uid () > max_uid_for_loop)
388 /* Compute the mapping from uids to luids.
389 LUIDs are numbers assigned to insns, like uids,
390 except that luids increase monotonically through the code.
391 Don't assign luids to line-number NOTEs, so that the distance in luids
392 between two insns is not affected by -g. */
394 for (insn = f, i = 0; insn; insn = NEXT_INSN (insn))
397 if (GET_CODE (insn) != NOTE
398 || NOTE_LINE_NUMBER (insn) <= 0)
399 uid_luid[INSN_UID (insn)] = ++i;
401 /* Give a line number note the same luid as preceding insn. */
402 uid_luid[INSN_UID (insn)] = i;
407 /* Don't leave gaps in uid_luid for insns that have been
408 deleted. It is possible that the first or last insn
409 using some register has been deleted by cross-jumping.
410 Make sure that uid_luid for that former insn's uid
411 points to the general area where that insn used to be. */
412 for (i = 0; i < max_uid_for_loop; i++)
414 uid_luid[0] = uid_luid[i];
415 if (uid_luid[0] != 0)
418 for (i = 0; i < max_uid_for_loop; i++)
419 if (uid_luid[i] == 0)
420 uid_luid[i] = uid_luid[i - 1];
422 /* Create a mapping from loops to BLOCK tree nodes. */
423 if (flag_unroll_loops && write_symbols != NO_DEBUG)
424 find_loop_tree_blocks ();
426 /* Now scan the loops, last ones first, since this means inner ones are done
427 before outer ones. */
428 for (i = max_loop_num-1; i >= 0; i--)
429 if (! loop_invalid[i] && loop_number_loop_ends[i])
430 scan_loop (loop_number_loop_starts[i], loop_number_loop_ends[i],
433 /* If debugging and unrolling loops, we must replicate the tree nodes
434 corresponding to the blocks inside the loop, so that the original one
435 to one mapping will remain. */
436 if (flag_unroll_loops && write_symbols != NO_DEBUG)
437 unroll_block_trees ();
440 /* Optimize one loop whose start is LOOP_START and end is END.
441 LOOP_START is the NOTE_INSN_LOOP_BEG and END is the matching
442 NOTE_INSN_LOOP_END. */
444 /* ??? Could also move memory writes out of loops if the destination address
445 is invariant, the source is invariant, the memory write is not volatile,
446 and if we can prove that no read inside the loop can read this address
447 before the write occurs. If there is a read of this address after the
448 write, then we can also mark the memory read as invariant. */
451 scan_loop (loop_start, end, nregs)
457 /* 1 if we are scanning insns that could be executed zero times. */
459 /* 1 if we are scanning insns that might never be executed
460 due to a subroutine call which might exit before they are reached. */
462 /* For a rotated loop that is entered near the bottom,
463 this is the label at the top. Otherwise it is zero. */
465 /* Jump insn that enters the loop, or 0 if control drops in. */
466 rtx loop_entry_jump = 0;
467 /* Place in the loop where control enters. */
469 /* Number of insns in the loop. */
474 /* The SET from an insn, if it is the only SET in the insn. */
476 /* Chain describing insns movable in current loop. */
477 struct movable *movables = 0;
478 /* Last element in `movables' -- so we can add elements at the end. */
479 struct movable *last_movable = 0;
480 /* Ratio of extra register life span we can justify
481 for saving an instruction. More if loop doesn't call subroutines
482 since in that case saving an insn makes more difference
483 and more registers are available. */
485 /* If we have calls, contains the insn in which a register was used
486 if it was used exactly once; contains const0_rtx if it was used more
488 rtx *reg_single_usage = 0;
489 /* Nonzero if we are scanning instructions in a sub-loop. */
492 n_times_set = (short *) alloca (nregs * sizeof (short));
493 n_times_used = (short *) alloca (nregs * sizeof (short));
494 may_not_optimize = (char *) alloca (nregs);
496 /* Determine whether this loop starts with a jump down to a test at
497 the end. This will occur for a small number of loops with a test
498 that is too complex to duplicate in front of the loop.
500 We search for the first insn or label in the loop, skipping NOTEs.
501 However, we must be careful not to skip past a NOTE_INSN_LOOP_BEG
502 (because we might have a loop executed only once that contains a
503 loop which starts with a jump to its exit test) or a NOTE_INSN_LOOP_END
504 (in case we have a degenerate loop).
506 Note that if we mistakenly think that a loop is entered at the top
507 when, in fact, it is entered at the exit test, the only effect will be
508 slightly poorer optimization. Making the opposite error can generate
509 incorrect code. Since very few loops now start with a jump to the
510 exit test, the code here to detect that case is very conservative. */
512 for (p = NEXT_INSN (loop_start);
514 && GET_CODE (p) != CODE_LABEL && GET_RTX_CLASS (GET_CODE (p)) != 'i'
515 && (GET_CODE (p) != NOTE
516 || (NOTE_LINE_NUMBER (p) != NOTE_INSN_LOOP_BEG
517 && NOTE_LINE_NUMBER (p) != NOTE_INSN_LOOP_END));
523 /* Set up variables describing this loop. */
524 prescan_loop (loop_start, end);
525 threshold = (loop_has_call ? 1 : 2) * (1 + n_non_fixed_regs);
527 /* If loop has a jump before the first label,
528 the true entry is the target of that jump.
529 Start scan from there.
530 But record in LOOP_TOP the place where the end-test jumps
531 back to so we can scan that after the end of the loop. */
532 if (GET_CODE (p) == JUMP_INSN)
536 /* Loop entry must be unconditional jump (and not a RETURN) */
538 && JUMP_LABEL (p) != 0
539 /* Check to see whether the jump actually
540 jumps out of the loop (meaning it's no loop).
541 This case can happen for things like
542 do {..} while (0). If this label was generated previously
543 by loop, we can't tell anything about it and have to reject
545 && INSN_UID (JUMP_LABEL (p)) < max_uid_for_loop
546 && INSN_LUID (JUMP_LABEL (p)) >= INSN_LUID (loop_start)
547 && INSN_LUID (JUMP_LABEL (p)) < INSN_LUID (end))
549 loop_top = next_label (scan_start);
550 scan_start = JUMP_LABEL (p);
554 /* If SCAN_START was an insn created by loop, we don't know its luid
555 as required by loop_reg_used_before_p. So skip such loops. (This
556 test may never be true, but it's best to play it safe.)
558 Also, skip loops where we do not start scanning at a label. This
559 test also rejects loops starting with a JUMP_INSN that failed the
562 if (INSN_UID (scan_start) >= max_uid_for_loop
563 || GET_CODE (scan_start) != CODE_LABEL)
565 if (loop_dump_stream)
566 fprintf (loop_dump_stream, "\nLoop from %d to %d is phony.\n\n",
567 INSN_UID (loop_start), INSN_UID (end));
571 /* Count number of times each reg is set during this loop.
572 Set may_not_optimize[I] if it is not safe to move out
573 the setting of register I. If this loop has calls, set
574 reg_single_usage[I]. */
576 bzero ((char *) n_times_set, nregs * sizeof (short));
577 bzero (may_not_optimize, nregs);
581 reg_single_usage = (rtx *) alloca (nregs * sizeof (rtx));
582 bzero ((char *) reg_single_usage, nregs * sizeof (rtx));
585 count_loop_regs_set (loop_top ? loop_top : loop_start, end,
586 may_not_optimize, reg_single_usage, &insn_count, nregs);
588 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
589 may_not_optimize[i] = 1, n_times_set[i] = 1;
590 bcopy ((char *) n_times_set, (char *) n_times_used, nregs * sizeof (short));
592 if (loop_dump_stream)
594 fprintf (loop_dump_stream, "\nLoop from %d to %d: %d real insns.\n",
595 INSN_UID (loop_start), INSN_UID (end), insn_count);
597 fprintf (loop_dump_stream, "Continue at insn %d.\n",
598 INSN_UID (loop_continue));
601 /* Scan through the loop finding insns that are safe to move.
602 Set n_times_set negative for the reg being set, so that
603 this reg will be considered invariant for subsequent insns.
604 We consider whether subsequent insns use the reg
605 in deciding whether it is worth actually moving.
607 MAYBE_NEVER is nonzero if we have passed a conditional jump insn
608 and therefore it is possible that the insns we are scanning
609 would never be executed. At such times, we must make sure
610 that it is safe to execute the insn once instead of zero times.
611 When MAYBE_NEVER is 0, all insns will be executed at least once
612 so that is not a problem. */
618 /* At end of a straight-in loop, we are done.
619 At end of a loop entered at the bottom, scan the top. */
632 if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
633 && find_reg_note (p, REG_LIBCALL, NULL_RTX))
635 else if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
636 && find_reg_note (p, REG_RETVAL, NULL_RTX))
639 if (GET_CODE (p) == INSN
640 && (set = single_set (p))
641 && GET_CODE (SET_DEST (set)) == REG
642 && ! may_not_optimize[REGNO (SET_DEST (set))])
647 rtx src = SET_SRC (set);
648 rtx dependencies = 0;
650 /* Figure out what to use as a source of this insn. If a REG_EQUIV
651 note is given or if a REG_EQUAL note with a constant operand is
652 specified, use it as the source and mark that we should move
653 this insn by calling emit_move_insn rather that duplicating the
656 Otherwise, only use the REG_EQUAL contents if a REG_RETVAL note
658 temp = find_reg_note (p, REG_EQUIV, NULL_RTX);
660 src = XEXP (temp, 0), move_insn = 1;
663 temp = find_reg_note (p, REG_EQUAL, NULL_RTX);
664 if (temp && CONSTANT_P (XEXP (temp, 0)))
665 src = XEXP (temp, 0), move_insn = 1;
666 if (temp && find_reg_note (p, REG_RETVAL, NULL_RTX))
668 src = XEXP (temp, 0);
669 /* A libcall block can use regs that don't appear in
670 the equivalent expression. To move the libcall,
671 we must move those regs too. */
672 dependencies = libcall_other_reg (p, src);
676 /* Don't try to optimize a register that was made
677 by loop-optimization for an inner loop.
678 We don't know its life-span, so we can't compute the benefit. */
679 if (REGNO (SET_DEST (set)) >= max_reg_before_loop)
681 /* In order to move a register, we need to have one of three cases:
682 (1) it is used only in the same basic block as the set
683 (2) it is not a user variable and it is not used in the
684 exit test (this can cause the variable to be used
685 before it is set just like a user-variable).
686 (3) the set is guaranteed to be executed once the loop starts,
687 and the reg is not used until after that. */
688 else if (! ((! maybe_never
689 && ! loop_reg_used_before_p (set, p, loop_start,
691 || (! REG_USERVAR_P (SET_DEST (set))
692 && ! REG_LOOP_TEST_P (SET_DEST (set)))
693 || reg_in_basic_block_p (p, SET_DEST (set))))
695 else if ((tem = invariant_p (src))
696 && (dependencies == 0
697 || (tem2 = invariant_p (dependencies)) != 0)
698 && (n_times_set[REGNO (SET_DEST (set))] == 1
700 = consec_sets_invariant_p (SET_DEST (set),
701 n_times_set[REGNO (SET_DEST (set))],
703 /* If the insn can cause a trap (such as divide by zero),
704 can't move it unless it's guaranteed to be executed
705 once loop is entered. Even a function call might
706 prevent the trap insn from being reached
707 (since it might exit!) */
708 && ! ((maybe_never || call_passed)
709 && may_trap_p (src)))
711 register struct movable *m;
712 register int regno = REGNO (SET_DEST (set));
714 /* A potential lossage is where we have a case where two insns
715 can be combined as long as they are both in the loop, but
716 we move one of them outside the loop. For large loops,
717 this can lose. The most common case of this is the address
718 of a function being called.
720 Therefore, if this register is marked as being used exactly
721 once if we are in a loop with calls (a "large loop"), see if
722 we can replace the usage of this register with the source
723 of this SET. If we can, delete this insn.
725 Don't do this if P has a REG_RETVAL note or if we have
726 SMALL_REGISTER_CLASSES and SET_SRC is a hard register. */
728 if (reg_single_usage && reg_single_usage[regno] != 0
729 && reg_single_usage[regno] != const0_rtx
730 && regno_first_uid[regno] == INSN_UID (p)
731 && (regno_last_uid[regno]
732 == INSN_UID (reg_single_usage[regno]))
733 && n_times_set[REGNO (SET_DEST (set))] == 1
734 && ! side_effects_p (SET_SRC (set))
735 && ! find_reg_note (p, REG_RETVAL, NULL_RTX)
736 #ifdef SMALL_REGISTER_CLASSES
737 && ! (GET_CODE (SET_SRC (set)) == REG
738 && REGNO (SET_SRC (set)) < FIRST_PSEUDO_REGISTER)
740 /* This test is not redundant; SET_SRC (set) might be
741 a call-clobbered register and the life of REGNO
742 might span a call. */
743 && ! modified_between_p (SET_SRC (set), p,
744 reg_single_usage[regno])
745 && no_labels_between_p (p, reg_single_usage[regno])
746 && validate_replace_rtx (SET_DEST (set), SET_SRC (set),
747 reg_single_usage[regno]))
749 /* Replace any usage in a REG_EQUAL note. */
750 REG_NOTES (reg_single_usage[regno])
751 = replace_rtx (REG_NOTES (reg_single_usage[regno]),
752 SET_DEST (set), SET_SRC (set));
755 NOTE_LINE_NUMBER (p) = NOTE_INSN_DELETED;
756 NOTE_SOURCE_FILE (p) = 0;
757 n_times_set[regno] = 0;
761 m = (struct movable *) alloca (sizeof (struct movable));
765 m->dependencies = dependencies;
766 m->set_dest = SET_DEST (set);
768 m->consec = n_times_set[REGNO (SET_DEST (set))] - 1;
772 m->move_insn = move_insn;
773 m->is_equiv = (find_reg_note (p, REG_EQUIV, NULL_RTX) != 0);
774 m->savemode = VOIDmode;
776 /* Set M->cond if either invariant_p or consec_sets_invariant_p
777 returned 2 (only conditionally invariant). */
778 m->cond = ((tem | tem1 | tem2) > 1);
779 m->global = (uid_luid[regno_last_uid[regno]] > INSN_LUID (end)
780 || uid_luid[regno_first_uid[regno]] < INSN_LUID (loop_start));
782 m->lifetime = (uid_luid[regno_last_uid[regno]]
783 - uid_luid[regno_first_uid[regno]]);
784 m->savings = n_times_used[regno];
785 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
786 m->savings += libcall_benefit (p);
787 n_times_set[regno] = move_insn ? -2 : -1;
788 /* Add M to the end of the chain MOVABLES. */
792 last_movable->next = m;
797 /* Skip this insn, not checking REG_LIBCALL notes. */
798 p = next_nonnote_insn (p);
799 /* Skip the consecutive insns, if there are any. */
800 p = skip_consec_insns (p, m->consec);
801 /* Back up to the last insn of the consecutive group. */
802 p = prev_nonnote_insn (p);
804 /* We must now reset m->move_insn, m->is_equiv, and possibly
805 m->set_src to correspond to the effects of all the
807 temp = find_reg_note (p, REG_EQUIV, NULL_RTX);
809 m->set_src = XEXP (temp, 0), m->move_insn = 1;
812 temp = find_reg_note (p, REG_EQUAL, NULL_RTX);
813 if (temp && CONSTANT_P (XEXP (temp, 0)))
814 m->set_src = XEXP (temp, 0), m->move_insn = 1;
819 m->is_equiv = (find_reg_note (p, REG_EQUIV, NULL_RTX) != 0);
822 /* If this register is always set within a STRICT_LOW_PART
823 or set to zero, then its high bytes are constant.
824 So clear them outside the loop and within the loop
825 just load the low bytes.
826 We must check that the machine has an instruction to do so.
827 Also, if the value loaded into the register
828 depends on the same register, this cannot be done. */
829 else if (SET_SRC (set) == const0_rtx
830 && GET_CODE (NEXT_INSN (p)) == INSN
831 && (set1 = single_set (NEXT_INSN (p)))
832 && GET_CODE (set1) == SET
833 && (GET_CODE (SET_DEST (set1)) == STRICT_LOW_PART)
834 && (GET_CODE (XEXP (SET_DEST (set1), 0)) == SUBREG)
835 && (SUBREG_REG (XEXP (SET_DEST (set1), 0))
837 && !reg_mentioned_p (SET_DEST (set), SET_SRC (set1)))
839 register int regno = REGNO (SET_DEST (set));
840 if (n_times_set[regno] == 2)
842 register struct movable *m;
843 m = (struct movable *) alloca (sizeof (struct movable));
846 m->set_dest = SET_DEST (set);
854 /* If the insn may not be executed on some cycles,
855 we can't clear the whole reg; clear just high part.
856 Not even if the reg is used only within this loop.
863 Clearing x before the inner loop could clobber a value
864 being saved from the last time around the outer loop.
865 However, if the reg is not used outside this loop
866 and all uses of the register are in the same
867 basic block as the store, there is no problem.
869 If this insn was made by loop, we don't know its
870 INSN_LUID and hence must make a conservative
872 m->global = (INSN_UID (p) >= max_uid_for_loop
873 || (uid_luid[regno_last_uid[regno]]
875 || (uid_luid[regno_first_uid[regno]]
877 || (labels_in_range_p
878 (p, uid_luid[regno_first_uid[regno]])));
879 if (maybe_never && m->global)
880 m->savemode = GET_MODE (SET_SRC (set1));
882 m->savemode = VOIDmode;
886 m->lifetime = (uid_luid[regno_last_uid[regno]]
887 - uid_luid[regno_first_uid[regno]]);
889 n_times_set[regno] = -1;
890 /* Add M to the end of the chain MOVABLES. */
894 last_movable->next = m;
899 /* Past a call insn, we get to insns which might not be executed
900 because the call might exit. This matters for insns that trap.
901 Call insns inside a REG_LIBCALL/REG_RETVAL block always return,
902 so they don't count. */
903 else if (GET_CODE (p) == CALL_INSN && ! in_libcall)
905 /* Past a label or a jump, we get to insns for which we
906 can't count on whether or how many times they will be
907 executed during each iteration. Therefore, we can
908 only move out sets of trivial variables
909 (those not used after the loop). */
910 /* This code appears in three places, once in scan_loop, and twice
911 in strength_reduce. */
912 else if ((GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN)
913 /* If we enter the loop in the middle, and scan around to the
914 beginning, don't set maybe_never for that. This must be an
915 unconditional jump, otherwise the code at the top of the
916 loop might never be executed. Unconditional jumps are
917 followed a by barrier then loop end. */
918 && ! (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p) == loop_top
919 && NEXT_INSN (NEXT_INSN (p)) == end
920 && simplejump_p (p)))
922 else if (GET_CODE (p) == NOTE)
924 /* At the virtual top of a converted loop, insns are again known to
925 be executed: logically, the loop begins here even though the exit
926 code has been duplicated. */
927 if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP && loop_depth == 0)
928 maybe_never = call_passed = 0;
929 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
931 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
936 /* If one movable subsumes another, ignore that other. */
938 ignore_some_movables (movables);
940 /* For each movable insn, see if the reg that it loads
941 leads when it dies right into another conditionally movable insn.
942 If so, record that the second insn "forces" the first one,
943 since the second can be moved only if the first is. */
945 force_movables (movables);
947 /* See if there are multiple movable insns that load the same value.
948 If there are, make all but the first point at the first one
949 through the `match' field, and add the priorities of them
950 all together as the priority of the first. */
952 combine_movables (movables, nregs);
954 /* Now consider each movable insn to decide whether it is worth moving.
955 Store 0 in n_times_set for each reg that is moved. */
957 move_movables (movables, threshold,
958 insn_count, loop_start, end, nregs);
960 /* Now candidates that still are negative are those not moved.
961 Change n_times_set to indicate that those are not actually invariant. */
962 for (i = 0; i < nregs; i++)
963 if (n_times_set[i] < 0)
964 n_times_set[i] = n_times_used[i];
966 if (flag_strength_reduce)
967 strength_reduce (scan_start, end, loop_top,
968 insn_count, loop_start, end);
971 /* Add elements to *OUTPUT to record all the pseudo-regs
972 mentioned in IN_THIS but not mentioned in NOT_IN_THIS. */
975 record_excess_regs (in_this, not_in_this, output)
976 rtx in_this, not_in_this;
983 code = GET_CODE (in_this);
997 if (REGNO (in_this) >= FIRST_PSEUDO_REGISTER
998 && ! reg_mentioned_p (in_this, not_in_this))
999 *output = gen_rtx (EXPR_LIST, VOIDmode, in_this, *output);
1003 fmt = GET_RTX_FORMAT (code);
1004 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1011 for (j = 0; j < XVECLEN (in_this, i); j++)
1012 record_excess_regs (XVECEXP (in_this, i, j), not_in_this, output);
1016 record_excess_regs (XEXP (in_this, i), not_in_this, output);
1022 /* Check what regs are referred to in the libcall block ending with INSN,
1023 aside from those mentioned in the equivalent value.
1024 If there are none, return 0.
1025 If there are one or more, return an EXPR_LIST containing all of them. */
1028 libcall_other_reg (insn, equiv)
1031 rtx note = find_reg_note (insn, REG_RETVAL, NULL_RTX);
1032 rtx p = XEXP (note, 0);
1035 /* First, find all the regs used in the libcall block
1036 that are not mentioned as inputs to the result. */
1040 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
1041 || GET_CODE (p) == CALL_INSN)
1042 record_excess_regs (PATTERN (p), equiv, &output);
1049 /* Return 1 if all uses of REG
1050 are between INSN and the end of the basic block. */
1053 reg_in_basic_block_p (insn, reg)
1056 int regno = REGNO (reg);
1059 if (regno_first_uid[regno] != INSN_UID (insn))
1062 /* Search this basic block for the already recorded last use of the reg. */
1063 for (p = insn; p; p = NEXT_INSN (p))
1065 switch (GET_CODE (p))
1072 /* Ordinary insn: if this is the last use, we win. */
1073 if (regno_last_uid[regno] == INSN_UID (p))
1078 /* Jump insn: if this is the last use, we win. */
1079 if (regno_last_uid[regno] == INSN_UID (p))
1081 /* Otherwise, it's the end of the basic block, so we lose. */
1086 /* It's the end of the basic block, so we lose. */
1091 /* The "last use" doesn't follow the "first use"?? */
1095 /* Compute the benefit of eliminating the insns in the block whose
1096 last insn is LAST. This may be a group of insns used to compute a
1097 value directly or can contain a library call. */
1100 libcall_benefit (last)
1106 for (insn = XEXP (find_reg_note (last, REG_RETVAL, NULL_RTX), 0);
1107 insn != last; insn = NEXT_INSN (insn))
1109 if (GET_CODE (insn) == CALL_INSN)
1110 benefit += 10; /* Assume at least this many insns in a library
1112 else if (GET_CODE (insn) == INSN
1113 && GET_CODE (PATTERN (insn)) != USE
1114 && GET_CODE (PATTERN (insn)) != CLOBBER)
1121 /* Skip COUNT insns from INSN, counting library calls as 1 insn. */
1124 skip_consec_insns (insn, count)
1128 for (; count > 0; count--)
1132 /* If first insn of libcall sequence, skip to end. */
1133 /* Do this at start of loop, since INSN is guaranteed to
1135 if (GET_CODE (insn) != NOTE
1136 && (temp = find_reg_note (insn, REG_LIBCALL, NULL_RTX)))
1137 insn = XEXP (temp, 0);
1139 do insn = NEXT_INSN (insn);
1140 while (GET_CODE (insn) == NOTE);
1146 /* Ignore any movable whose insn falls within a libcall
1147 which is part of another movable.
1148 We make use of the fact that the movable for the libcall value
1149 was made later and so appears later on the chain. */
1152 ignore_some_movables (movables)
1153 struct movable *movables;
1155 register struct movable *m, *m1;
1157 for (m = movables; m; m = m->next)
1159 /* Is this a movable for the value of a libcall? */
1160 rtx note = find_reg_note (m->insn, REG_RETVAL, NULL_RTX);
1164 /* Check for earlier movables inside that range,
1165 and mark them invalid. We cannot use LUIDs here because
1166 insns created by loop.c for prior loops don't have LUIDs.
1167 Rather than reject all such insns from movables, we just
1168 explicitly check each insn in the libcall (since invariant
1169 libcalls aren't that common). */
1170 for (insn = XEXP (note, 0); insn != m->insn; insn = NEXT_INSN (insn))
1171 for (m1 = movables; m1 != m; m1 = m1->next)
1172 if (m1->insn == insn)
1178 /* For each movable insn, see if the reg that it loads
1179 leads when it dies right into another conditionally movable insn.
1180 If so, record that the second insn "forces" the first one,
1181 since the second can be moved only if the first is. */
1184 force_movables (movables)
1185 struct movable *movables;
1187 register struct movable *m, *m1;
1188 for (m1 = movables; m1; m1 = m1->next)
1189 /* Omit this if moving just the (SET (REG) 0) of a zero-extend. */
1190 if (!m1->partial && !m1->done)
1192 int regno = m1->regno;
1193 for (m = m1->next; m; m = m->next)
1194 /* ??? Could this be a bug? What if CSE caused the
1195 register of M1 to be used after this insn?
1196 Since CSE does not update regno_last_uid,
1197 this insn M->insn might not be where it dies.
1198 But very likely this doesn't matter; what matters is
1199 that M's reg is computed from M1's reg. */
1200 if (INSN_UID (m->insn) == regno_last_uid[regno]
1203 if (m != 0 && m->set_src == m1->set_dest
1204 /* If m->consec, m->set_src isn't valid. */
1208 /* Increase the priority of the moving the first insn
1209 since it permits the second to be moved as well. */
1213 m1->lifetime += m->lifetime;
1214 m1->savings += m1->savings;
1219 /* Find invariant expressions that are equal and can be combined into
1223 combine_movables (movables, nregs)
1224 struct movable *movables;
1227 register struct movable *m;
1228 char *matched_regs = (char *) alloca (nregs);
1229 enum machine_mode mode;
1231 /* Regs that are set more than once are not allowed to match
1232 or be matched. I'm no longer sure why not. */
1233 /* Perhaps testing m->consec_sets would be more appropriate here? */
1235 for (m = movables; m; m = m->next)
1236 if (m->match == 0 && n_times_used[m->regno] == 1 && !m->partial)
1238 register struct movable *m1;
1239 int regno = m->regno;
1241 bzero (matched_regs, nregs);
1242 matched_regs[regno] = 1;
1244 for (m1 = movables; m1; m1 = m1->next)
1245 if (m != m1 && m1->match == 0 && n_times_used[m1->regno] == 1
1246 /* A reg used outside the loop mustn't be eliminated. */
1248 /* A reg used for zero-extending mustn't be eliminated. */
1250 && (matched_regs[m1->regno]
1253 /* Can combine regs with different modes loaded from the
1254 same constant only if the modes are the same or
1255 if both are integer modes with M wider or the same
1256 width as M1. The check for integer is redundant, but
1257 safe, since the only case of differing destination
1258 modes with equal sources is when both sources are
1259 VOIDmode, i.e., CONST_INT. */
1260 (GET_MODE (m->set_dest) == GET_MODE (m1->set_dest)
1261 || (GET_MODE_CLASS (GET_MODE (m->set_dest)) == MODE_INT
1262 && GET_MODE_CLASS (GET_MODE (m1->set_dest)) == MODE_INT
1263 && (GET_MODE_BITSIZE (GET_MODE (m->set_dest))
1264 >= GET_MODE_BITSIZE (GET_MODE (m1->set_dest)))))
1265 /* See if the source of M1 says it matches M. */
1266 && ((GET_CODE (m1->set_src) == REG
1267 && matched_regs[REGNO (m1->set_src)])
1268 || rtx_equal_for_loop_p (m->set_src, m1->set_src,
1270 && ((m->dependencies == m1->dependencies)
1271 || rtx_equal_p (m->dependencies, m1->dependencies)))
1273 m->lifetime += m1->lifetime;
1274 m->savings += m1->savings;
1277 matched_regs[m1->regno] = 1;
1281 /* Now combine the regs used for zero-extension.
1282 This can be done for those not marked `global'
1283 provided their lives don't overlap. */
1285 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
1286 mode = GET_MODE_WIDER_MODE (mode))
1288 register struct movable *m0 = 0;
1290 /* Combine all the registers for extension from mode MODE.
1291 Don't combine any that are used outside this loop. */
1292 for (m = movables; m; m = m->next)
1293 if (m->partial && ! m->global
1294 && mode == GET_MODE (SET_SRC (PATTERN (NEXT_INSN (m->insn)))))
1296 register struct movable *m1;
1297 int first = uid_luid[regno_first_uid[m->regno]];
1298 int last = uid_luid[regno_last_uid[m->regno]];
1302 /* First one: don't check for overlap, just record it. */
1307 /* Make sure they extend to the same mode.
1308 (Almost always true.) */
1309 if (GET_MODE (m->set_dest) != GET_MODE (m0->set_dest))
1312 /* We already have one: check for overlap with those
1313 already combined together. */
1314 for (m1 = movables; m1 != m; m1 = m1->next)
1315 if (m1 == m0 || (m1->partial && m1->match == m0))
1316 if (! (uid_luid[regno_first_uid[m1->regno]] > last
1317 || uid_luid[regno_last_uid[m1->regno]] < first))
1320 /* No overlap: we can combine this with the others. */
1321 m0->lifetime += m->lifetime;
1322 m0->savings += m->savings;
1331 /* Return 1 if regs X and Y will become the same if moved. */
1334 regs_match_p (x, y, movables)
1336 struct movable *movables;
1340 struct movable *mx, *my;
1342 for (mx = movables; mx; mx = mx->next)
1343 if (mx->regno == xn)
1346 for (my = movables; my; my = my->next)
1347 if (my->regno == yn)
1351 && ((mx->match == my->match && mx->match != 0)
1353 || mx == my->match));
1356 /* Return 1 if X and Y are identical-looking rtx's.
1357 This is the Lisp function EQUAL for rtx arguments.
1359 If two registers are matching movables or a movable register and an
1360 equivalent constant, consider them equal. */
1363 rtx_equal_for_loop_p (x, y, movables)
1365 struct movable *movables;
1369 register struct movable *m;
1370 register enum rtx_code code;
1375 if (x == 0 || y == 0)
1378 code = GET_CODE (x);
1380 /* If we have a register and a constant, they may sometimes be
1382 if (GET_CODE (x) == REG && n_times_set[REGNO (x)] == -2
1384 for (m = movables; m; m = m->next)
1385 if (m->move_insn && m->regno == REGNO (x)
1386 && rtx_equal_p (m->set_src, y))
1389 else if (GET_CODE (y) == REG && n_times_set[REGNO (y)] == -2
1391 for (m = movables; m; m = m->next)
1392 if (m->move_insn && m->regno == REGNO (y)
1393 && rtx_equal_p (m->set_src, x))
1396 /* Otherwise, rtx's of different codes cannot be equal. */
1397 if (code != GET_CODE (y))
1400 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
1401 (REG:SI x) and (REG:HI x) are NOT equivalent. */
1403 if (GET_MODE (x) != GET_MODE (y))
1406 /* These three types of rtx's can be compared nonrecursively. */
1408 return (REGNO (x) == REGNO (y) || regs_match_p (x, y, movables));
1410 if (code == LABEL_REF)
1411 return XEXP (x, 0) == XEXP (y, 0);
1412 if (code == SYMBOL_REF)
1413 return XSTR (x, 0) == XSTR (y, 0);
1415 /* Compare the elements. If any pair of corresponding elements
1416 fail to match, return 0 for the whole things. */
1418 fmt = GET_RTX_FORMAT (code);
1419 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1424 if (XWINT (x, i) != XWINT (y, i))
1429 if (XINT (x, i) != XINT (y, i))
1434 /* Two vectors must have the same length. */
1435 if (XVECLEN (x, i) != XVECLEN (y, i))
1438 /* And the corresponding elements must match. */
1439 for (j = 0; j < XVECLEN (x, i); j++)
1440 if (rtx_equal_for_loop_p (XVECEXP (x, i, j), XVECEXP (y, i, j), movables) == 0)
1445 if (rtx_equal_for_loop_p (XEXP (x, i), XEXP (y, i), movables) == 0)
1450 if (strcmp (XSTR (x, i), XSTR (y, i)))
1455 /* These are just backpointers, so they don't matter. */
1461 /* It is believed that rtx's at this level will never
1462 contain anything but integers and other rtx's,
1463 except for within LABEL_REFs and SYMBOL_REFs. */
1471 /* If X contains any LABEL_REF's, add REG_LABEL notes for them to all
1472 insns in INSNS which use thet reference. */
1475 add_label_notes (x, insns)
1479 enum rtx_code code = GET_CODE (x);
1484 if (code == LABEL_REF && !LABEL_REF_NONLOCAL_P (x))
1486 rtx next = next_real_insn (XEXP (x, 0));
1488 /* Don't record labels that refer to dispatch tables.
1489 This is not necessary, since the tablejump references the same label.
1490 And if we did record them, flow.c would make worse code. */
1492 || ! (GET_CODE (next) == JUMP_INSN
1493 && (GET_CODE (PATTERN (next)) == ADDR_VEC
1494 || GET_CODE (PATTERN (next)) == ADDR_DIFF_VEC)))
1496 for (insn = insns; insn; insn = NEXT_INSN (insn))
1497 if (reg_mentioned_p (XEXP (x, 0), insn))
1498 REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_LABEL, XEXP (x, 0),
1504 fmt = GET_RTX_FORMAT (code);
1505 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1508 add_label_notes (XEXP (x, i), insns);
1509 else if (fmt[i] == 'E')
1510 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1511 add_label_notes (XVECEXP (x, i, j), insns);
1515 /* Scan MOVABLES, and move the insns that deserve to be moved.
1516 If two matching movables are combined, replace one reg with the
1517 other throughout. */
1520 move_movables (movables, threshold, insn_count, loop_start, end, nregs)
1521 struct movable *movables;
1529 register struct movable *m;
1531 /* Map of pseudo-register replacements to handle combining
1532 when we move several insns that load the same value
1533 into different pseudo-registers. */
1534 rtx *reg_map = (rtx *) alloca (nregs * sizeof (rtx));
1535 char *already_moved = (char *) alloca (nregs);
1537 bzero (already_moved, nregs);
1538 bzero ((char *) reg_map, nregs * sizeof (rtx));
1542 for (m = movables; m; m = m->next)
1544 /* Describe this movable insn. */
1546 if (loop_dump_stream)
1548 fprintf (loop_dump_stream, "Insn %d: regno %d (life %d), ",
1549 INSN_UID (m->insn), m->regno, m->lifetime);
1551 fprintf (loop_dump_stream, "consec %d, ", m->consec);
1553 fprintf (loop_dump_stream, "cond ");
1555 fprintf (loop_dump_stream, "force ");
1557 fprintf (loop_dump_stream, "global ");
1559 fprintf (loop_dump_stream, "done ");
1561 fprintf (loop_dump_stream, "move-insn ");
1563 fprintf (loop_dump_stream, "matches %d ",
1564 INSN_UID (m->match->insn));
1566 fprintf (loop_dump_stream, "forces %d ",
1567 INSN_UID (m->forces->insn));
1570 /* Count movables. Value used in heuristics in strength_reduce. */
1573 /* Ignore the insn if it's already done (it matched something else).
1574 Otherwise, see if it is now safe to move. */
1578 || (1 == invariant_p (m->set_src)
1579 && (m->dependencies == 0
1580 || 1 == invariant_p (m->dependencies))
1582 || 1 == consec_sets_invariant_p (m->set_dest,
1585 && (! m->forces || m->forces->done))
1589 int savings = m->savings;
1591 /* We have an insn that is safe to move.
1592 Compute its desirability. */
1597 if (loop_dump_stream)
1598 fprintf (loop_dump_stream, "savings %d ", savings);
1600 if (moved_once[regno])
1604 if (loop_dump_stream)
1605 fprintf (loop_dump_stream, "halved since already moved ");
1608 /* An insn MUST be moved if we already moved something else
1609 which is safe only if this one is moved too: that is,
1610 if already_moved[REGNO] is nonzero. */
1612 /* An insn is desirable to move if the new lifetime of the
1613 register is no more than THRESHOLD times the old lifetime.
1614 If it's not desirable, it means the loop is so big
1615 that moving won't speed things up much,
1616 and it is liable to make register usage worse. */
1618 /* It is also desirable to move if it can be moved at no
1619 extra cost because something else was already moved. */
1621 if (already_moved[regno]
1622 || (threshold * savings * m->lifetime) >= insn_count
1623 || (m->forces && m->forces->done
1624 && n_times_used[m->forces->regno] == 1))
1627 register struct movable *m1;
1630 /* Now move the insns that set the reg. */
1632 if (m->partial && m->match)
1636 /* Find the end of this chain of matching regs.
1637 Thus, we load each reg in the chain from that one reg.
1638 And that reg is loaded with 0 directly,
1639 since it has ->match == 0. */
1640 for (m1 = m; m1->match; m1 = m1->match);
1641 newpat = gen_move_insn (SET_DEST (PATTERN (m->insn)),
1642 SET_DEST (PATTERN (m1->insn)));
1643 i1 = emit_insn_before (newpat, loop_start);
1645 /* Mark the moved, invariant reg as being allowed to
1646 share a hard reg with the other matching invariant. */
1647 REG_NOTES (i1) = REG_NOTES (m->insn);
1648 r1 = SET_DEST (PATTERN (m->insn));
1649 r2 = SET_DEST (PATTERN (m1->insn));
1650 regs_may_share = gen_rtx (EXPR_LIST, VOIDmode, r1,
1651 gen_rtx (EXPR_LIST, VOIDmode, r2,
1653 delete_insn (m->insn);
1658 if (loop_dump_stream)
1659 fprintf (loop_dump_stream, " moved to %d", INSN_UID (i1));
1661 /* If we are to re-generate the item being moved with a
1662 new move insn, first delete what we have and then emit
1663 the move insn before the loop. */
1664 else if (m->move_insn)
1668 for (count = m->consec; count >= 0; count--)
1670 /* If this is the first insn of a library call sequence,
1672 if (GET_CODE (p) != NOTE
1673 && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
1676 /* If this is the last insn of a libcall sequence, then
1677 delete every insn in the sequence except the last.
1678 The last insn is handled in the normal manner. */
1679 if (GET_CODE (p) != NOTE
1680 && (temp = find_reg_note (p, REG_RETVAL, NULL_RTX)))
1682 temp = XEXP (temp, 0);
1684 temp = delete_insn (temp);
1687 p = delete_insn (p);
1688 while (p && GET_CODE (p) == NOTE)
1693 emit_move_insn (m->set_dest, m->set_src);
1694 temp = get_insns ();
1697 add_label_notes (m->set_src, temp);
1699 i1 = emit_insns_before (temp, loop_start);
1700 if (! find_reg_note (i1, REG_EQUAL, NULL_RTX))
1702 = gen_rtx (EXPR_LIST,
1703 m->is_equiv ? REG_EQUIV : REG_EQUAL,
1704 m->set_src, REG_NOTES (i1));
1706 if (loop_dump_stream)
1707 fprintf (loop_dump_stream, " moved to %d", INSN_UID (i1));
1709 /* The more regs we move, the less we like moving them. */
1714 for (count = m->consec; count >= 0; count--)
1718 /* If first insn of libcall sequence, skip to end. */
1719 /* Do this at start of loop, since p is guaranteed to
1721 if (GET_CODE (p) != NOTE
1722 && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
1725 /* If last insn of libcall sequence, move all
1726 insns except the last before the loop. The last
1727 insn is handled in the normal manner. */
1728 if (GET_CODE (p) != NOTE
1729 && (temp = find_reg_note (p, REG_RETVAL, NULL_RTX)))
1733 rtx fn_address_insn = 0;
1736 for (temp = XEXP (temp, 0); temp != p;
1737 temp = NEXT_INSN (temp))
1743 if (GET_CODE (temp) == NOTE)
1746 body = PATTERN (temp);
1748 /* Find the next insn after TEMP,
1749 not counting USE or NOTE insns. */
1750 for (next = NEXT_INSN (temp); next != p;
1751 next = NEXT_INSN (next))
1752 if (! (GET_CODE (next) == INSN
1753 && GET_CODE (PATTERN (next)) == USE)
1754 && GET_CODE (next) != NOTE)
1757 /* If that is the call, this may be the insn
1758 that loads the function address.
1760 Extract the function address from the insn
1761 that loads it into a register.
1762 If this insn was cse'd, we get incorrect code.
1764 So emit a new move insn that copies the
1765 function address into the register that the
1766 call insn will use. flow.c will delete any
1767 redundant stores that we have created. */
1768 if (GET_CODE (next) == CALL_INSN
1769 && GET_CODE (body) == SET
1770 && GET_CODE (SET_DEST (body)) == REG
1771 && (n = find_reg_note (temp, REG_EQUAL,
1774 fn_reg = SET_SRC (body);
1775 if (GET_CODE (fn_reg) != REG)
1776 fn_reg = SET_DEST (body);
1777 fn_address = XEXP (n, 0);
1778 fn_address_insn = temp;
1780 /* We have the call insn.
1781 If it uses the register we suspect it might,
1782 load it with the correct address directly. */
1783 if (GET_CODE (temp) == CALL_INSN
1785 && reg_referenced_p (fn_reg, body))
1786 emit_insn_after (gen_move_insn (fn_reg,
1790 if (GET_CODE (temp) == CALL_INSN)
1792 i1 = emit_call_insn_before (body, loop_start);
1793 /* Because the USAGE information potentially
1794 contains objects other than hard registers
1795 we need to copy it. */
1796 if (CALL_INSN_FUNCTION_USAGE (temp))
1797 CALL_INSN_FUNCTION_USAGE (i1) =
1798 copy_rtx (CALL_INSN_FUNCTION_USAGE (temp));
1801 i1 = emit_insn_before (body, loop_start);
1804 if (temp == fn_address_insn)
1805 fn_address_insn = i1;
1806 REG_NOTES (i1) = REG_NOTES (temp);
1810 if (m->savemode != VOIDmode)
1812 /* P sets REG to zero; but we should clear only
1813 the bits that are not covered by the mode
1815 rtx reg = m->set_dest;
1821 (GET_MODE (reg), and_optab, reg,
1822 GEN_INT ((((HOST_WIDE_INT) 1
1823 << GET_MODE_BITSIZE (m->savemode)))
1825 reg, 1, OPTAB_LIB_WIDEN);
1829 emit_move_insn (reg, tem);
1830 sequence = gen_sequence ();
1832 i1 = emit_insn_before (sequence, loop_start);
1834 else if (GET_CODE (p) == CALL_INSN)
1836 i1 = emit_call_insn_before (PATTERN (p), loop_start);
1837 /* Because the USAGE information potentially
1838 contains objects other than hard registers
1839 we need to copy it. */
1840 if (CALL_INSN_FUNCTION_USAGE (p))
1841 CALL_INSN_FUNCTION_USAGE (i1) =
1842 copy_rtx (CALL_INSN_FUNCTION_USAGE (p));
1845 i1 = emit_insn_before (PATTERN (p), loop_start);
1847 REG_NOTES (i1) = REG_NOTES (p);
1849 /* If there is a REG_EQUAL note present whose value is
1850 not loop invariant, then delete it, since it may
1851 cause problems with later optimization passes.
1852 It is possible for cse to create such notes
1853 like this as a result of record_jump_cond. */
1855 if ((temp = find_reg_note (i1, REG_EQUAL, NULL_RTX))
1856 && ! invariant_p (XEXP (temp, 0)))
1857 remove_note (i1, temp);
1862 if (loop_dump_stream)
1863 fprintf (loop_dump_stream, " moved to %d",
1867 /* This isn't needed because REG_NOTES is copied
1868 below and is wrong since P might be a PARALLEL. */
1869 if (REG_NOTES (i1) == 0
1870 && ! m->partial /* But not if it's a zero-extend clr. */
1871 && ! m->global /* and not if used outside the loop
1872 (since it might get set outside). */
1873 && CONSTANT_P (SET_SRC (PATTERN (p))))
1875 = gen_rtx (EXPR_LIST, REG_EQUAL,
1876 SET_SRC (PATTERN (p)), REG_NOTES (i1));
1879 /* If library call, now fix the REG_NOTES that contain
1880 insn pointers, namely REG_LIBCALL on FIRST
1881 and REG_RETVAL on I1. */
1882 if (temp = find_reg_note (i1, REG_RETVAL, NULL_RTX))
1884 XEXP (temp, 0) = first;
1885 temp = find_reg_note (first, REG_LIBCALL, NULL_RTX);
1886 XEXP (temp, 0) = i1;
1890 do p = NEXT_INSN (p);
1891 while (p && GET_CODE (p) == NOTE);
1894 /* The more regs we move, the less we like moving them. */
1898 /* Any other movable that loads the same register
1900 already_moved[regno] = 1;
1902 /* This reg has been moved out of one loop. */
1903 moved_once[regno] = 1;
1905 /* The reg set here is now invariant. */
1907 n_times_set[regno] = 0;
1911 /* Change the length-of-life info for the register
1912 to say it lives at least the full length of this loop.
1913 This will help guide optimizations in outer loops. */
1915 if (uid_luid[regno_first_uid[regno]] > INSN_LUID (loop_start))
1916 /* This is the old insn before all the moved insns.
1917 We can't use the moved insn because it is out of range
1918 in uid_luid. Only the old insns have luids. */
1919 regno_first_uid[regno] = INSN_UID (loop_start);
1920 if (uid_luid[regno_last_uid[regno]] < INSN_LUID (end))
1921 regno_last_uid[regno] = INSN_UID (end);
1923 /* Combine with this moved insn any other matching movables. */
1926 for (m1 = movables; m1; m1 = m1->next)
1931 /* Schedule the reg loaded by M1
1932 for replacement so that shares the reg of M.
1933 If the modes differ (only possible in restricted
1934 circumstances, make a SUBREG. */
1935 if (GET_MODE (m->set_dest) == GET_MODE (m1->set_dest))
1936 reg_map[m1->regno] = m->set_dest;
1939 = gen_lowpart_common (GET_MODE (m1->set_dest),
1942 /* Get rid of the matching insn
1943 and prevent further processing of it. */
1946 /* if library call, delete all insn except last, which
1948 if (temp = find_reg_note (m1->insn, REG_RETVAL,
1951 for (temp = XEXP (temp, 0); temp != m1->insn;
1952 temp = NEXT_INSN (temp))
1955 delete_insn (m1->insn);
1957 /* Any other movable that loads the same register
1959 already_moved[m1->regno] = 1;
1961 /* The reg merged here is now invariant,
1962 if the reg it matches is invariant. */
1964 n_times_set[m1->regno] = 0;
1967 else if (loop_dump_stream)
1968 fprintf (loop_dump_stream, "not desirable");
1970 else if (loop_dump_stream && !m->match)
1971 fprintf (loop_dump_stream, "not safe");
1973 if (loop_dump_stream)
1974 fprintf (loop_dump_stream, "\n");
1978 new_start = loop_start;
1980 /* Go through all the instructions in the loop, making
1981 all the register substitutions scheduled in REG_MAP. */
1982 for (p = new_start; p != end; p = NEXT_INSN (p))
1983 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
1984 || GET_CODE (p) == CALL_INSN)
1986 replace_regs (PATTERN (p), reg_map, nregs, 0);
1987 replace_regs (REG_NOTES (p), reg_map, nregs, 0);
1993 /* Scan X and replace the address of any MEM in it with ADDR.
1994 REG is the address that MEM should have before the replacement. */
1997 replace_call_address (x, reg, addr)
2000 register enum rtx_code code;
2006 code = GET_CODE (x);
2020 /* Short cut for very common case. */
2021 replace_call_address (XEXP (x, 1), reg, addr);
2025 /* Short cut for very common case. */
2026 replace_call_address (XEXP (x, 0), reg, addr);
2030 /* If this MEM uses a reg other than the one we expected,
2031 something is wrong. */
2032 if (XEXP (x, 0) != reg)
2038 fmt = GET_RTX_FORMAT (code);
2039 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2042 replace_call_address (XEXP (x, i), reg, addr);
2046 for (j = 0; j < XVECLEN (x, i); j++)
2047 replace_call_address (XVECEXP (x, i, j), reg, addr);
2053 /* Return the number of memory refs to addresses that vary
2057 count_nonfixed_reads (x)
2060 register enum rtx_code code;
2068 code = GET_CODE (x);
2082 return ((invariant_p (XEXP (x, 0)) != 1)
2083 + count_nonfixed_reads (XEXP (x, 0)));
2087 fmt = GET_RTX_FORMAT (code);
2088 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2091 value += count_nonfixed_reads (XEXP (x, i));
2095 for (j = 0; j < XVECLEN (x, i); j++)
2096 value += count_nonfixed_reads (XVECEXP (x, i, j));
2104 /* P is an instruction that sets a register to the result of a ZERO_EXTEND.
2105 Replace it with an instruction to load just the low bytes
2106 if the machine supports such an instruction,
2107 and insert above LOOP_START an instruction to clear the register. */
2110 constant_high_bytes (p, loop_start)
2114 register int insn_code_number;
2116 /* Try to change (SET (REG ...) (ZERO_EXTEND (..:B ...)))
2117 to (SET (STRICT_LOW_PART (SUBREG:B (REG...))) ...). */
2119 new = gen_rtx (SET, VOIDmode,
2120 gen_rtx (STRICT_LOW_PART, VOIDmode,
2121 gen_rtx (SUBREG, GET_MODE (XEXP (SET_SRC (PATTERN (p)), 0)),
2122 SET_DEST (PATTERN (p)),
2124 XEXP (SET_SRC (PATTERN (p)), 0));
2125 insn_code_number = recog (new, p);
2127 if (insn_code_number)
2131 /* Clear destination register before the loop. */
2132 emit_insn_before (gen_rtx (SET, VOIDmode,
2133 SET_DEST (PATTERN (p)),
2137 /* Inside the loop, just load the low part. */
2143 /* Scan a loop setting the variables `unknown_address_altered',
2144 `num_mem_sets', `loop_continue', loops_enclosed', `loop_has_call',
2145 and `loop_has_volatile'.
2146 Also, fill in the array `loop_store_mems'. */
2149 prescan_loop (start, end)
2152 register int level = 1;
2155 unknown_address_altered = 0;
2157 loop_has_volatile = 0;
2158 loop_store_mems_idx = 0;
2164 for (insn = NEXT_INSN (start); insn != NEXT_INSN (end);
2165 insn = NEXT_INSN (insn))
2167 if (GET_CODE (insn) == NOTE)
2169 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
2172 /* Count number of loops contained in this one. */
2175 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END)
2184 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_CONT)
2187 loop_continue = insn;
2190 else if (GET_CODE (insn) == CALL_INSN)
2192 unknown_address_altered = 1;
2197 if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN)
2199 if (volatile_refs_p (PATTERN (insn)))
2200 loop_has_volatile = 1;
2202 note_stores (PATTERN (insn), note_addr_stored);
2208 /* Scan the function looking for loops. Record the start and end of each loop.
2209 Also mark as invalid loops any loops that contain a setjmp or are branched
2210 to from outside the loop. */
2213 find_and_verify_loops (f)
2217 int current_loop = -1;
2221 /* If there are jumps to undefined labels,
2222 treat them as jumps out of any/all loops.
2223 This also avoids writing past end of tables when there are no loops. */
2224 uid_loop_num[0] = -1;
2226 /* Find boundaries of loops, mark which loops are contained within
2227 loops, and invalidate loops that have setjmp. */
2229 for (insn = f; insn; insn = NEXT_INSN (insn))
2231 if (GET_CODE (insn) == NOTE)
2232 switch (NOTE_LINE_NUMBER (insn))
2234 case NOTE_INSN_LOOP_BEG:
2235 loop_number_loop_starts[++next_loop] = insn;
2236 loop_number_loop_ends[next_loop] = 0;
2237 loop_outer_loop[next_loop] = current_loop;
2238 loop_invalid[next_loop] = 0;
2239 loop_number_exit_labels[next_loop] = 0;
2240 current_loop = next_loop;
2243 case NOTE_INSN_SETJMP:
2244 /* In this case, we must invalidate our current loop and any
2246 for (loop = current_loop; loop != -1; loop = loop_outer_loop[loop])
2248 loop_invalid[loop] = 1;
2249 if (loop_dump_stream)
2250 fprintf (loop_dump_stream,
2251 "\nLoop at %d ignored due to setjmp.\n",
2252 INSN_UID (loop_number_loop_starts[loop]));
2256 case NOTE_INSN_LOOP_END:
2257 if (current_loop == -1)
2260 loop_number_loop_ends[current_loop] = insn;
2261 current_loop = loop_outer_loop[current_loop];
2266 /* Note that this will mark the NOTE_INSN_LOOP_END note as being in the
2267 enclosing loop, but this doesn't matter. */
2268 uid_loop_num[INSN_UID (insn)] = current_loop;
2271 /* Any loop containing a label used in an initializer must be invalidated,
2272 because it can be jumped into from anywhere. */
2274 for (label = forced_labels; label; label = XEXP (label, 1))
2278 for (loop_num = uid_loop_num[INSN_UID (XEXP (label, 0))];
2280 loop_num = loop_outer_loop[loop_num])
2281 loop_invalid[loop_num] = 1;
2284 /* Now scan all insn's in the function. If any JUMP_INSN branches into a
2285 loop that it is not contained within, that loop is marked invalid.
2286 If any INSN or CALL_INSN uses a label's address, then the loop containing
2287 that label is marked invalid, because it could be jumped into from
2290 Also look for blocks of code ending in an unconditional branch that
2291 exits the loop. If such a block is surrounded by a conditional
2292 branch around the block, move the block elsewhere (see below) and
2293 invert the jump to point to the code block. This may eliminate a
2294 label in our loop and will simplify processing by both us and a
2295 possible second cse pass. */
2297 for (insn = f; insn; insn = NEXT_INSN (insn))
2298 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
2300 int this_loop_num = uid_loop_num[INSN_UID (insn)];
2302 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
2304 rtx note = find_reg_note (insn, REG_LABEL, NULL_RTX);
2309 for (loop_num = uid_loop_num[INSN_UID (XEXP (note, 0))];
2311 loop_num = loop_outer_loop[loop_num])
2312 loop_invalid[loop_num] = 1;
2316 if (GET_CODE (insn) != JUMP_INSN)
2319 mark_loop_jump (PATTERN (insn), this_loop_num);
2321 /* See if this is an unconditional branch outside the loop. */
2322 if (this_loop_num != -1
2323 && (GET_CODE (PATTERN (insn)) == RETURN
2324 || (simplejump_p (insn)
2325 && (uid_loop_num[INSN_UID (JUMP_LABEL (insn))]
2327 && get_max_uid () < max_uid_for_loop)
2330 rtx our_next = next_real_insn (insn);
2332 /* Go backwards until we reach the start of the loop, a label,
2334 for (p = PREV_INSN (insn);
2335 GET_CODE (p) != CODE_LABEL
2336 && ! (GET_CODE (p) == NOTE
2337 && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
2338 && GET_CODE (p) != JUMP_INSN;
2342 /* If we stopped on a JUMP_INSN to the next insn after INSN,
2343 we have a block of code to try to move.
2345 We look backward and then forward from the target of INSN
2346 to find a BARRIER at the same loop depth as the target.
2347 If we find such a BARRIER, we make a new label for the start
2348 of the block, invert the jump in P and point it to that label,
2349 and move the block of code to the spot we found. */
2351 if (GET_CODE (p) == JUMP_INSN
2352 && JUMP_LABEL (p) != 0
2353 /* Just ignore jumps to labels that were never emitted.
2354 These always indicate compilation errors. */
2355 && INSN_UID (JUMP_LABEL (p)) != 0
2357 && ! simplejump_p (p)
2358 && next_real_insn (JUMP_LABEL (p)) == our_next)
2361 = JUMP_LABEL (insn) ? JUMP_LABEL (insn) : get_last_insn ();
2362 int target_loop_num = uid_loop_num[INSN_UID (target)];
2365 for (loc = target; loc; loc = PREV_INSN (loc))
2366 if (GET_CODE (loc) == BARRIER
2367 && uid_loop_num[INSN_UID (loc)] == target_loop_num)
2371 for (loc = target; loc; loc = NEXT_INSN (loc))
2372 if (GET_CODE (loc) == BARRIER
2373 && uid_loop_num[INSN_UID (loc)] == target_loop_num)
2378 rtx cond_label = JUMP_LABEL (p);
2379 rtx new_label = get_label_after (p);
2381 /* Ensure our label doesn't go away. */
2382 LABEL_NUSES (cond_label)++;
2384 /* Verify that uid_loop_num is large enough and that
2386 if (invert_jump (p, new_label))
2390 /* Include the BARRIER after INSN and copy the
2392 new_label = squeeze_notes (new_label, NEXT_INSN (insn));
2393 reorder_insns (new_label, NEXT_INSN (insn), loc);
2395 /* All those insns are now in TARGET_LOOP_NUM. */
2396 for (q = new_label; q != NEXT_INSN (NEXT_INSN (insn));
2398 uid_loop_num[INSN_UID (q)] = target_loop_num;
2400 /* The label jumped to by INSN is no longer a loop exit.
2401 Unless INSN does not have a label (e.g., it is a
2402 RETURN insn), search loop_number_exit_labels to find
2403 its label_ref, and remove it. Also turn off
2404 LABEL_OUTSIDE_LOOP_P bit. */
2405 if (JUMP_LABEL (insn))
2408 r = loop_number_exit_labels[this_loop_num];
2409 r; q = r, r = LABEL_NEXTREF (r))
2410 if (XEXP (r, 0) == JUMP_LABEL (insn))
2412 LABEL_OUTSIDE_LOOP_P (r) = 0;
2414 LABEL_NEXTREF (q) = LABEL_NEXTREF (r);
2416 loop_number_exit_labels[this_loop_num]
2417 = LABEL_NEXTREF (r);
2421 /* If we didn't find it, then something is wrong. */
2426 /* P is now a jump outside the loop, so it must be put
2427 in loop_number_exit_labels, and marked as such.
2428 The easiest way to do this is to just call
2429 mark_loop_jump again for P. */
2430 mark_loop_jump (PATTERN (p), this_loop_num);
2432 /* If INSN now jumps to the insn after it,
2434 if (JUMP_LABEL (insn) != 0
2435 && (next_real_insn (JUMP_LABEL (insn))
2436 == next_real_insn (insn)))
2440 /* Continue the loop after where the conditional
2441 branch used to jump, since the only branch insn
2442 in the block (if it still remains) is an inter-loop
2443 branch and hence needs no processing. */
2444 insn = NEXT_INSN (cond_label);
2446 if (--LABEL_NUSES (cond_label) == 0)
2447 delete_insn (cond_label);
2449 /* This loop will be continued with NEXT_INSN (insn). */
2450 insn = PREV_INSN (insn);
2457 /* If any label in X jumps to a loop different from LOOP_NUM and any of the
2458 loops it is contained in, mark the target loop invalid.
2460 For speed, we assume that X is part of a pattern of a JUMP_INSN. */
2463 mark_loop_jump (x, loop_num)
2471 switch (GET_CODE (x))
2484 /* There could be a label reference in here. */
2485 mark_loop_jump (XEXP (x, 0), loop_num);
2491 mark_loop_jump (XEXP (x, 0), loop_num);
2492 mark_loop_jump (XEXP (x, 1), loop_num);
2497 mark_loop_jump (XEXP (x, 0), loop_num);
2501 dest_loop = uid_loop_num[INSN_UID (XEXP (x, 0))];
2503 /* Link together all labels that branch outside the loop. This
2504 is used by final_[bg]iv_value and the loop unrolling code. Also
2505 mark this LABEL_REF so we know that this branch should predict
2508 if (dest_loop != loop_num && loop_num != -1)
2510 LABEL_OUTSIDE_LOOP_P (x) = 1;
2511 LABEL_NEXTREF (x) = loop_number_exit_labels[loop_num];
2512 loop_number_exit_labels[loop_num] = x;
2515 /* If this is inside a loop, but not in the current loop or one enclosed
2516 by it, it invalidates at least one loop. */
2518 if (dest_loop == -1)
2521 /* We must invalidate every nested loop containing the target of this
2522 label, except those that also contain the jump insn. */
2524 for (; dest_loop != -1; dest_loop = loop_outer_loop[dest_loop])
2526 /* Stop when we reach a loop that also contains the jump insn. */
2527 for (outer_loop = loop_num; outer_loop != -1;
2528 outer_loop = loop_outer_loop[outer_loop])
2529 if (dest_loop == outer_loop)
2532 /* If we get here, we know we need to invalidate a loop. */
2533 if (loop_dump_stream && ! loop_invalid[dest_loop])
2534 fprintf (loop_dump_stream,
2535 "\nLoop at %d ignored due to multiple entry points.\n",
2536 INSN_UID (loop_number_loop_starts[dest_loop]));
2538 loop_invalid[dest_loop] = 1;
2543 /* If this is not setting pc, ignore. */
2544 if (SET_DEST (x) == pc_rtx)
2545 mark_loop_jump (SET_SRC (x), loop_num);
2549 mark_loop_jump (XEXP (x, 1), loop_num);
2550 mark_loop_jump (XEXP (x, 2), loop_num);
2555 for (i = 0; i < XVECLEN (x, 0); i++)
2556 mark_loop_jump (XVECEXP (x, 0, i), loop_num);
2560 for (i = 0; i < XVECLEN (x, 1); i++)
2561 mark_loop_jump (XVECEXP (x, 1, i), loop_num);
2565 /* Treat anything else (such as a symbol_ref)
2566 as a branch out of this loop, but not into any loop. */
2570 LABEL_OUTSIDE_LOOP_P (x) = 1;
2571 LABEL_NEXTREF (x) = loop_number_exit_labels[loop_num];
2572 loop_number_exit_labels[loop_num] = x;
2579 /* Return nonzero if there is a label in the range from
2580 insn INSN to and including the insn whose luid is END
2581 INSN must have an assigned luid (i.e., it must not have
2582 been previously created by loop.c). */
2585 labels_in_range_p (insn, end)
2589 while (insn && INSN_LUID (insn) <= end)
2591 if (GET_CODE (insn) == CODE_LABEL)
2593 insn = NEXT_INSN (insn);
2599 /* Record that a memory reference X is being set. */
2602 note_addr_stored (x)
2607 if (x == 0 || GET_CODE (x) != MEM)
2610 /* Count number of memory writes.
2611 This affects heuristics in strength_reduce. */
2614 /* BLKmode MEM means all memory is clobbered. */
2615 if (GET_MODE (x) == BLKmode)
2616 unknown_address_altered = 1;
2618 if (unknown_address_altered)
2621 for (i = 0; i < loop_store_mems_idx; i++)
2622 if (rtx_equal_p (XEXP (loop_store_mems[i], 0), XEXP (x, 0))
2623 && MEM_IN_STRUCT_P (x) == MEM_IN_STRUCT_P (loop_store_mems[i]))
2625 /* We are storing at the same address as previously noted. Save the
2627 if (GET_MODE_SIZE (GET_MODE (x))
2628 > GET_MODE_SIZE (GET_MODE (loop_store_mems[i])))
2629 loop_store_mems[i] = x;
2633 if (i == NUM_STORES)
2634 unknown_address_altered = 1;
2636 else if (i == loop_store_mems_idx)
2637 loop_store_mems[loop_store_mems_idx++] = x;
2640 /* Return nonzero if the rtx X is invariant over the current loop.
2642 The value is 2 if we refer to something only conditionally invariant.
2644 If `unknown_address_altered' is nonzero, no memory ref is invariant.
2645 Otherwise, a memory ref is invariant if it does not conflict with
2646 anything stored in `loop_store_mems'. */
2653 register enum rtx_code code;
2655 int conditional = 0;
2659 code = GET_CODE (x);
2669 /* A LABEL_REF is normally invariant, however, if we are unrolling
2670 loops, and this label is inside the loop, then it isn't invariant.
2671 This is because each unrolled copy of the loop body will have
2672 a copy of this label. If this was invariant, then an insn loading
2673 the address of this label into a register might get moved outside
2674 the loop, and then each loop body would end up using the same label.
2676 We don't know the loop bounds here though, so just fail for all
2678 if (flag_unroll_loops)
2685 case UNSPEC_VOLATILE:
2689 /* We used to check RTX_UNCHANGING_P (x) here, but that is invalid
2690 since the reg might be set by initialization within the loop. */
2691 if (x == frame_pointer_rtx || x == hard_frame_pointer_rtx
2692 || x == arg_pointer_rtx)
2695 && REGNO (x) < FIRST_PSEUDO_REGISTER && call_used_regs[REGNO (x)])
2697 if (n_times_set[REGNO (x)] < 0)
2699 return n_times_set[REGNO (x)] == 0;
2702 /* Volatile memory references must be rejected. Do this before
2703 checking for read-only items, so that volatile read-only items
2704 will be rejected also. */
2705 if (MEM_VOLATILE_P (x))
2708 /* Read-only items (such as constants in a constant pool) are
2709 invariant if their address is. */
2710 if (RTX_UNCHANGING_P (x))
2713 /* If we filled the table (or had a subroutine call), any location
2714 in memory could have been clobbered. */
2715 if (unknown_address_altered)
2718 /* See if there is any dependence between a store and this load. */
2719 for (i = loop_store_mems_idx - 1; i >= 0; i--)
2720 if (true_dependence (loop_store_mems[i], x))
2723 /* It's not invalidated by a store in memory
2724 but we must still verify the address is invariant. */
2728 /* Don't mess with insns declared volatile. */
2729 if (MEM_VOLATILE_P (x))
2733 fmt = GET_RTX_FORMAT (code);
2734 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2738 int tem = invariant_p (XEXP (x, i));
2744 else if (fmt[i] == 'E')
2747 for (j = 0; j < XVECLEN (x, i); j++)
2749 int tem = invariant_p (XVECEXP (x, i, j));
2759 return 1 + conditional;
2763 /* Return nonzero if all the insns in the loop that set REG
2764 are INSN and the immediately following insns,
2765 and if each of those insns sets REG in an invariant way
2766 (not counting uses of REG in them).
2768 The value is 2 if some of these insns are only conditionally invariant.
2770 We assume that INSN itself is the first set of REG
2771 and that its source is invariant. */
2774 consec_sets_invariant_p (reg, n_sets, insn)
2778 register rtx p = insn;
2779 register int regno = REGNO (reg);
2781 /* Number of sets we have to insist on finding after INSN. */
2782 int count = n_sets - 1;
2783 int old = n_times_set[regno];
2787 /* If N_SETS hit the limit, we can't rely on its value. */
2791 n_times_set[regno] = 0;
2795 register enum rtx_code code;
2799 code = GET_CODE (p);
2801 /* If library call, skip to end of of it. */
2802 if (code == INSN && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
2807 && (set = single_set (p))
2808 && GET_CODE (SET_DEST (set)) == REG
2809 && REGNO (SET_DEST (set)) == regno)
2811 this = invariant_p (SET_SRC (set));
2814 else if (temp = find_reg_note (p, REG_EQUAL, NULL_RTX))
2816 /* If this is a libcall, then any invariant REG_EQUAL note is OK.
2817 If this is an ordinary insn, then only CONSTANT_P REG_EQUAL
2819 this = (CONSTANT_P (XEXP (temp, 0))
2820 || (find_reg_note (p, REG_RETVAL, NULL_RTX)
2821 && invariant_p (XEXP (temp, 0))));
2828 else if (code != NOTE)
2830 n_times_set[regno] = old;
2835 n_times_set[regno] = old;
2836 /* If invariant_p ever returned 2, we return 2. */
2837 return 1 + (value & 2);
2841 /* I don't think this condition is sufficient to allow INSN
2842 to be moved, so we no longer test it. */
2844 /* Return 1 if all insns in the basic block of INSN and following INSN
2845 that set REG are invariant according to TABLE. */
2848 all_sets_invariant_p (reg, insn, table)
2852 register rtx p = insn;
2853 register int regno = REGNO (reg);
2857 register enum rtx_code code;
2859 code = GET_CODE (p);
2860 if (code == CODE_LABEL || code == JUMP_INSN)
2862 if (code == INSN && GET_CODE (PATTERN (p)) == SET
2863 && GET_CODE (SET_DEST (PATTERN (p))) == REG
2864 && REGNO (SET_DEST (PATTERN (p))) == regno)
2866 if (!invariant_p (SET_SRC (PATTERN (p)), table))
2873 /* Look at all uses (not sets) of registers in X. For each, if it is
2874 the single use, set USAGE[REGNO] to INSN; if there was a previous use in
2875 a different insn, set USAGE[REGNO] to const0_rtx. */
2878 find_single_use_in_loop (insn, x, usage)
2883 enum rtx_code code = GET_CODE (x);
2884 char *fmt = GET_RTX_FORMAT (code);
2889 = (usage[REGNO (x)] != 0 && usage[REGNO (x)] != insn)
2890 ? const0_rtx : insn;
2892 else if (code == SET)
2894 /* Don't count SET_DEST if it is a REG; otherwise count things
2895 in SET_DEST because if a register is partially modified, it won't
2896 show up as a potential movable so we don't care how USAGE is set
2898 if (GET_CODE (SET_DEST (x)) != REG)
2899 find_single_use_in_loop (insn, SET_DEST (x), usage);
2900 find_single_use_in_loop (insn, SET_SRC (x), usage);
2903 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2905 if (fmt[i] == 'e' && XEXP (x, i) != 0)
2906 find_single_use_in_loop (insn, XEXP (x, i), usage);
2907 else if (fmt[i] == 'E')
2908 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
2909 find_single_use_in_loop (insn, XVECEXP (x, i, j), usage);
2913 /* Increment N_TIMES_SET at the index of each register
2914 that is modified by an insn between FROM and TO.
2915 If the value of an element of N_TIMES_SET becomes 127 or more,
2916 stop incrementing it, to avoid overflow.
2918 Store in SINGLE_USAGE[I] the single insn in which register I is
2919 used, if it is only used once. Otherwise, it is set to 0 (for no
2920 uses) or const0_rtx for more than one use. This parameter may be zero,
2921 in which case this processing is not done.
2923 Store in *COUNT_PTR the number of actual instruction
2924 in the loop. We use this to decide what is worth moving out. */
2926 /* last_set[n] is nonzero iff reg n has been set in the current basic block.
2927 In that case, it is the insn that last set reg n. */
2930 count_loop_regs_set (from, to, may_not_move, single_usage, count_ptr, nregs)
2931 register rtx from, to;
2937 register rtx *last_set = (rtx *) alloca (nregs * sizeof (rtx));
2939 register int count = 0;
2942 bzero ((char *) last_set, nregs * sizeof (rtx));
2943 for (insn = from; insn != to; insn = NEXT_INSN (insn))
2945 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
2949 /* If requested, record registers that have exactly one use. */
2952 find_single_use_in_loop (insn, PATTERN (insn), single_usage);
2954 /* Include uses in REG_EQUAL notes. */
2955 if (REG_NOTES (insn))
2956 find_single_use_in_loop (insn, REG_NOTES (insn), single_usage);
2959 if (GET_CODE (PATTERN (insn)) == CLOBBER
2960 && GET_CODE (XEXP (PATTERN (insn), 0)) == REG)
2961 /* Don't move a reg that has an explicit clobber.
2962 We might do so sometimes, but it's not worth the pain. */
2963 may_not_move[REGNO (XEXP (PATTERN (insn), 0))] = 1;
2965 if (GET_CODE (PATTERN (insn)) == SET
2966 || GET_CODE (PATTERN (insn)) == CLOBBER)
2968 dest = SET_DEST (PATTERN (insn));
2969 while (GET_CODE (dest) == SUBREG
2970 || GET_CODE (dest) == ZERO_EXTRACT
2971 || GET_CODE (dest) == SIGN_EXTRACT
2972 || GET_CODE (dest) == STRICT_LOW_PART)
2973 dest = XEXP (dest, 0);
2974 if (GET_CODE (dest) == REG)
2976 register int regno = REGNO (dest);
2977 /* If this is the first setting of this reg
2978 in current basic block, and it was set before,
2979 it must be set in two basic blocks, so it cannot
2980 be moved out of the loop. */
2981 if (n_times_set[regno] > 0 && last_set[regno] == 0)
2982 may_not_move[regno] = 1;
2983 /* If this is not first setting in current basic block,
2984 see if reg was used in between previous one and this.
2985 If so, neither one can be moved. */
2986 if (last_set[regno] != 0
2987 && reg_used_between_p (dest, last_set[regno], insn))
2988 may_not_move[regno] = 1;
2989 if (n_times_set[regno] < 127)
2990 ++n_times_set[regno];
2991 last_set[regno] = insn;
2994 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
2997 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
2999 register rtx x = XVECEXP (PATTERN (insn), 0, i);
3000 if (GET_CODE (x) == CLOBBER && GET_CODE (XEXP (x, 0)) == REG)
3001 /* Don't move a reg that has an explicit clobber.
3002 It's not worth the pain to try to do it correctly. */
3003 may_not_move[REGNO (XEXP (x, 0))] = 1;
3005 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
3007 dest = SET_DEST (x);
3008 while (GET_CODE (dest) == SUBREG
3009 || GET_CODE (dest) == ZERO_EXTRACT
3010 || GET_CODE (dest) == SIGN_EXTRACT
3011 || GET_CODE (dest) == STRICT_LOW_PART)
3012 dest = XEXP (dest, 0);
3013 if (GET_CODE (dest) == REG)
3015 register int regno = REGNO (dest);
3016 if (n_times_set[regno] > 0 && last_set[regno] == 0)
3017 may_not_move[regno] = 1;
3018 if (last_set[regno] != 0
3019 && reg_used_between_p (dest, last_set[regno], insn))
3020 may_not_move[regno] = 1;
3021 if (n_times_set[regno] < 127)
3022 ++n_times_set[regno];
3023 last_set[regno] = insn;
3030 if (GET_CODE (insn) == CODE_LABEL || GET_CODE (insn) == JUMP_INSN)
3031 bzero ((char *) last_set, nregs * sizeof (rtx));
3036 /* Given a loop that is bounded by LOOP_START and LOOP_END
3037 and that is entered at SCAN_START,
3038 return 1 if the register set in SET contained in insn INSN is used by
3039 any insn that precedes INSN in cyclic order starting
3040 from the loop entry point.
3042 We don't want to use INSN_LUID here because if we restrict INSN to those
3043 that have a valid INSN_LUID, it means we cannot move an invariant out
3044 from an inner loop past two loops. */
3047 loop_reg_used_before_p (set, insn, loop_start, scan_start, loop_end)
3048 rtx set, insn, loop_start, scan_start, loop_end;
3050 rtx reg = SET_DEST (set);
3053 /* Scan forward checking for register usage. If we hit INSN, we
3054 are done. Otherwise, if we hit LOOP_END, wrap around to LOOP_START. */
3055 for (p = scan_start; p != insn; p = NEXT_INSN (p))
3057 if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
3058 && reg_overlap_mentioned_p (reg, PATTERN (p)))
3068 /* A "basic induction variable" or biv is a pseudo reg that is set
3069 (within this loop) only by incrementing or decrementing it. */
3070 /* A "general induction variable" or giv is a pseudo reg whose
3071 value is a linear function of a biv. */
3073 /* Bivs are recognized by `basic_induction_var';
3074 Givs by `general_induct_var'. */
3076 /* Indexed by register number, indicates whether or not register is an
3077 induction variable, and if so what type. */
3079 enum iv_mode *reg_iv_type;
3081 /* Indexed by register number, contains pointer to `struct induction'
3082 if register is an induction variable. This holds general info for
3083 all induction variables. */
3085 struct induction **reg_iv_info;
3087 /* Indexed by register number, contains pointer to `struct iv_class'
3088 if register is a basic induction variable. This holds info describing
3089 the class (a related group) of induction variables that the biv belongs
3092 struct iv_class **reg_biv_class;
3094 /* The head of a list which links together (via the next field)
3095 every iv class for the current loop. */
3097 struct iv_class *loop_iv_list;
3099 /* Communication with routines called via `note_stores'. */
3101 static rtx note_insn;
3103 /* Dummy register to have non-zero DEST_REG for DEST_ADDR type givs. */
3105 static rtx addr_placeholder;
3107 /* ??? Unfinished optimizations, and possible future optimizations,
3108 for the strength reduction code. */
3110 /* ??? There is one more optimization you might be interested in doing: to
3111 allocate pseudo registers for frequently-accessed memory locations.
3112 If the same memory location is referenced each time around, it might
3113 be possible to copy it into a register before and out after.
3114 This is especially useful when the memory location is a variable which
3115 is in a stack slot because somewhere its address is taken. If the
3116 loop doesn't contain a function call and the variable isn't volatile,
3117 it is safe to keep the value in a register for the duration of the
3118 loop. One tricky thing is that the copying of the value back from the
3119 register has to be done on all exits from the loop. You need to check that
3120 all the exits from the loop go to the same place. */
3122 /* ??? The interaction of biv elimination, and recognition of 'constant'
3123 bivs, may cause problems. */
3125 /* ??? Add heuristics so that DEST_ADDR strength reduction does not cause
3126 performance problems.
3128 Perhaps don't eliminate things that can be combined with an addressing
3129 mode. Find all givs that have the same biv, mult_val, and add_val;
3130 then for each giv, check to see if its only use dies in a following
3131 memory address. If so, generate a new memory address and check to see
3132 if it is valid. If it is valid, then store the modified memory address,
3133 otherwise, mark the giv as not done so that it will get its own iv. */
3135 /* ??? Could try to optimize branches when it is known that a biv is always
3138 /* ??? When replace a biv in a compare insn, we should replace with closest
3139 giv so that an optimized branch can still be recognized by the combiner,
3140 e.g. the VAX acb insn. */
3142 /* ??? Many of the checks involving uid_luid could be simplified if regscan
3143 was rerun in loop_optimize whenever a register was added or moved.
3144 Also, some of the optimizations could be a little less conservative. */
3146 /* Perform strength reduction and induction variable elimination. */
3148 /* Pseudo registers created during this function will be beyond the last
3149 valid index in several tables including n_times_set and regno_last_uid.
3150 This does not cause a problem here, because the added registers cannot be
3151 givs outside of their loop, and hence will never be reconsidered.
3152 But scan_loop must check regnos to make sure they are in bounds. */
3155 strength_reduce (scan_start, end, loop_top, insn_count,
3156 loop_start, loop_end)
3169 /* This is 1 if current insn is not executed at least once for every loop
3171 int not_every_iteration = 0;
3172 /* This is 1 if current insn may be executed more than once for every
3174 int maybe_multiple = 0;
3175 /* Temporary list pointers for traversing loop_iv_list. */
3176 struct iv_class *bl, **backbl;
3177 /* Ratio of extra register life span we can justify
3178 for saving an instruction. More if loop doesn't call subroutines
3179 since in that case saving an insn makes more difference
3180 and more registers are available. */
3181 /* ??? could set this to last value of threshold in move_movables */
3182 int threshold = (loop_has_call ? 1 : 2) * (3 + n_non_fixed_regs);
3183 /* Map of pseudo-register replacements. */
3187 rtx end_insert_before;
3190 reg_iv_type = (enum iv_mode *) alloca (max_reg_before_loop
3191 * sizeof (enum iv_mode *));
3192 bzero ((char *) reg_iv_type, max_reg_before_loop * sizeof (enum iv_mode *));
3193 reg_iv_info = (struct induction **)
3194 alloca (max_reg_before_loop * sizeof (struct induction *));
3195 bzero ((char *) reg_iv_info, (max_reg_before_loop
3196 * sizeof (struct induction *)));
3197 reg_biv_class = (struct iv_class **)
3198 alloca (max_reg_before_loop * sizeof (struct iv_class *));
3199 bzero ((char *) reg_biv_class, (max_reg_before_loop
3200 * sizeof (struct iv_class *)));
3203 addr_placeholder = gen_reg_rtx (Pmode);
3205 /* Save insn immediately after the loop_end. Insns inserted after loop_end
3206 must be put before this insn, so that they will appear in the right
3207 order (i.e. loop order).
3209 If loop_end is the end of the current function, then emit a
3210 NOTE_INSN_DELETED after loop_end and set end_insert_before to the
3212 if (NEXT_INSN (loop_end) != 0)
3213 end_insert_before = NEXT_INSN (loop_end);
3215 end_insert_before = emit_note_after (NOTE_INSN_DELETED, loop_end);
3217 /* Scan through loop to find all possible bivs. */
3223 /* At end of a straight-in loop, we are done.
3224 At end of a loop entered at the bottom, scan the top. */
3225 if (p == scan_start)
3233 if (p == scan_start)
3237 if (GET_CODE (p) == INSN
3238 && (set = single_set (p))
3239 && GET_CODE (SET_DEST (set)) == REG)
3241 dest_reg = SET_DEST (set);
3242 if (REGNO (dest_reg) < max_reg_before_loop
3243 && REGNO (dest_reg) >= FIRST_PSEUDO_REGISTER
3244 && reg_iv_type[REGNO (dest_reg)] != NOT_BASIC_INDUCT)
3246 if (basic_induction_var (SET_SRC (set), GET_MODE (SET_SRC (set)),
3247 dest_reg, p, &inc_val, &mult_val))
3249 /* It is a possible basic induction variable.
3250 Create and initialize an induction structure for it. */
3253 = (struct induction *) alloca (sizeof (struct induction));
3255 record_biv (v, p, dest_reg, inc_val, mult_val,
3256 not_every_iteration, maybe_multiple);
3257 reg_iv_type[REGNO (dest_reg)] = BASIC_INDUCT;
3259 else if (REGNO (dest_reg) < max_reg_before_loop)
3260 reg_iv_type[REGNO (dest_reg)] = NOT_BASIC_INDUCT;
3264 /* Past CODE_LABEL, we get to insns that may be executed multiple
3265 times. The only way we can be sure that they can't is if every
3266 every jump insn between here and the end of the loop either
3267 returns, exits the loop, or is a forward jump. */
3269 if (GET_CODE (p) == CODE_LABEL)
3277 insn = NEXT_INSN (insn);
3278 if (insn == scan_start)
3286 if (insn == scan_start)
3290 if (GET_CODE (insn) == JUMP_INSN
3291 && GET_CODE (PATTERN (insn)) != RETURN
3292 && (! condjump_p (insn)
3293 || (JUMP_LABEL (insn) != 0
3294 && (INSN_UID (JUMP_LABEL (insn)) >= max_uid_for_loop
3295 || INSN_UID (insn) >= max_uid_for_loop
3296 || (INSN_LUID (JUMP_LABEL (insn))
3297 < INSN_LUID (insn))))))
3305 /* Past a label or a jump, we get to insns for which we can't count
3306 on whether or how many times they will be executed during each
3308 /* This code appears in three places, once in scan_loop, and twice
3309 in strength_reduce. */
3310 if ((GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN)
3311 /* If we enter the loop in the middle, and scan around to the
3312 beginning, don't set not_every_iteration for that.
3313 This can be any kind of jump, since we want to know if insns
3314 will be executed if the loop is executed. */
3315 && ! (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p) == loop_top
3316 && ((NEXT_INSN (NEXT_INSN (p)) == loop_end && simplejump_p (p))
3317 || (NEXT_INSN (p) == loop_end && condjump_p (p)))))
3318 not_every_iteration = 1;
3320 else if (GET_CODE (p) == NOTE)
3322 /* At the virtual top of a converted loop, insns are again known to
3323 be executed each iteration: logically, the loop begins here
3324 even though the exit code has been duplicated. */
3325 if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP && loop_depth == 0)
3326 not_every_iteration = 0;
3327 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
3329 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
3333 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
3334 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
3335 or not an insn is known to be executed each iteration of the
3336 loop, whether or not any iterations are known to occur.
3338 Therefore, if we have just passed a label and have no more labels
3339 between here and the test insn of the loop, we know these insns
3340 will be executed each iteration. This can also happen if we
3341 have just passed a jump, for example, when there are nested loops. */
3343 if (not_every_iteration && GET_CODE (p) == CODE_LABEL
3344 && no_labels_between_p (p, loop_end))
3345 not_every_iteration = 0;
3348 /* Scan loop_iv_list to remove all regs that proved not to be bivs.
3349 Make a sanity check against n_times_set. */
3350 for (backbl = &loop_iv_list, bl = *backbl; bl; bl = bl->next)
3352 if (reg_iv_type[bl->regno] != BASIC_INDUCT
3353 /* Above happens if register modified by subreg, etc. */
3354 /* Make sure it is not recognized as a basic induction var: */
3355 || n_times_set[bl->regno] != bl->biv_count
3356 /* If never incremented, it is invariant that we decided not to
3357 move. So leave it alone. */
3358 || ! bl->incremented)
3360 if (loop_dump_stream)
3361 fprintf (loop_dump_stream, "Reg %d: biv discarded, %s\n",
3363 (reg_iv_type[bl->regno] != BASIC_INDUCT
3364 ? "not induction variable"
3365 : (! bl->incremented ? "never incremented"
3368 reg_iv_type[bl->regno] = NOT_BASIC_INDUCT;
3375 if (loop_dump_stream)
3376 fprintf (loop_dump_stream, "Reg %d: biv verified\n", bl->regno);
3380 /* Exit if there are no bivs. */
3383 /* Can still unroll the loop anyways, but indicate that there is no
3384 strength reduction info available. */
3385 if (flag_unroll_loops)
3386 unroll_loop (loop_end, insn_count, loop_start, end_insert_before, 0);
3391 /* Find initial value for each biv by searching backwards from loop_start,
3392 halting at first label. Also record any test condition. */
3395 for (p = loop_start; p && GET_CODE (p) != CODE_LABEL; p = PREV_INSN (p))
3399 if (GET_CODE (p) == CALL_INSN)
3402 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
3403 || GET_CODE (p) == CALL_INSN)
3404 note_stores (PATTERN (p), record_initial);
3406 /* Record any test of a biv that branches around the loop if no store
3407 between it and the start of loop. We only care about tests with
3408 constants and registers and only certain of those. */
3409 if (GET_CODE (p) == JUMP_INSN
3410 && JUMP_LABEL (p) != 0
3411 && next_real_insn (JUMP_LABEL (p)) == next_real_insn (loop_end)
3412 && (test = get_condition_for_loop (p)) != 0
3413 && GET_CODE (XEXP (test, 0)) == REG
3414 && REGNO (XEXP (test, 0)) < max_reg_before_loop
3415 && (bl = reg_biv_class[REGNO (XEXP (test, 0))]) != 0
3416 && valid_initial_value_p (XEXP (test, 1), p, call_seen, loop_start)
3417 && bl->init_insn == 0)
3419 /* If an NE test, we have an initial value! */
3420 if (GET_CODE (test) == NE)
3423 bl->init_set = gen_rtx (SET, VOIDmode,
3424 XEXP (test, 0), XEXP (test, 1));
3427 bl->initial_test = test;
3431 /* Look at the each biv and see if we can say anything better about its
3432 initial value from any initializing insns set up above. (This is done
3433 in two passes to avoid missing SETs in a PARALLEL.) */
3434 for (bl = loop_iv_list; bl; bl = bl->next)
3438 if (! bl->init_insn)
3441 src = SET_SRC (bl->init_set);
3443 if (loop_dump_stream)
3444 fprintf (loop_dump_stream,
3445 "Biv %d initialized at insn %d: initial value ",
3446 bl->regno, INSN_UID (bl->init_insn));
3448 if ((GET_MODE (src) == GET_MODE (regno_reg_rtx[bl->regno])
3449 || GET_MODE (src) == VOIDmode)
3450 && valid_initial_value_p (src, bl->init_insn, call_seen, loop_start))
3452 bl->initial_value = src;
3454 if (loop_dump_stream)
3456 if (GET_CODE (src) == CONST_INT)
3457 fprintf (loop_dump_stream, "%d\n", INTVAL (src));
3460 print_rtl (loop_dump_stream, src);
3461 fprintf (loop_dump_stream, "\n");
3467 /* Biv initial value is not simple move,
3468 so let it keep initial value of "itself". */
3470 if (loop_dump_stream)
3471 fprintf (loop_dump_stream, "is complex\n");
3475 /* Search the loop for general induction variables. */
3477 /* A register is a giv if: it is only set once, it is a function of a
3478 biv and a constant (or invariant), and it is not a biv. */
3480 not_every_iteration = 0;
3486 /* At end of a straight-in loop, we are done.
3487 At end of a loop entered at the bottom, scan the top. */
3488 if (p == scan_start)
3496 if (p == scan_start)
3500 /* Look for a general induction variable in a register. */
3501 if (GET_CODE (p) == INSN
3502 && (set = single_set (p))
3503 && GET_CODE (SET_DEST (set)) == REG
3504 && ! may_not_optimize[REGNO (SET_DEST (set))])
3512 dest_reg = SET_DEST (set);
3513 if (REGNO (dest_reg) < FIRST_PSEUDO_REGISTER)
3516 if (/* SET_SRC is a giv. */
3517 ((benefit = general_induction_var (SET_SRC (set),
3520 /* Equivalent expression is a giv. */
3521 || ((regnote = find_reg_note (p, REG_EQUAL, NULL_RTX))
3522 && (benefit = general_induction_var (XEXP (regnote, 0),
3524 &add_val, &mult_val))))
3525 /* Don't try to handle any regs made by loop optimization.
3526 We have nothing on them in regno_first_uid, etc. */
3527 && REGNO (dest_reg) < max_reg_before_loop
3528 /* Don't recognize a BASIC_INDUCT_VAR here. */
3529 && dest_reg != src_reg
3530 /* This must be the only place where the register is set. */
3531 && (n_times_set[REGNO (dest_reg)] == 1
3532 /* or all sets must be consecutive and make a giv. */
3533 || (benefit = consec_sets_giv (benefit, p,
3535 &add_val, &mult_val))))
3539 = (struct induction *) alloca (sizeof (struct induction));
3542 /* If this is a library call, increase benefit. */
3543 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
3544 benefit += libcall_benefit (p);
3546 /* Skip the consecutive insns, if there are any. */
3547 for (count = n_times_set[REGNO (dest_reg)] - 1;
3550 /* If first insn of libcall sequence, skip to end.
3551 Do this at start of loop, since INSN is guaranteed to
3553 if (GET_CODE (p) != NOTE
3554 && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
3557 do p = NEXT_INSN (p);
3558 while (GET_CODE (p) == NOTE);
3561 record_giv (v, p, src_reg, dest_reg, mult_val, add_val, benefit,
3562 DEST_REG, not_every_iteration, NULL_PTR, loop_start,
3568 #ifndef DONT_REDUCE_ADDR
3569 /* Look for givs which are memory addresses. */
3570 /* This resulted in worse code on a VAX 8600. I wonder if it
3572 if (GET_CODE (p) == INSN)
3573 find_mem_givs (PATTERN (p), p, not_every_iteration, loop_start,
3577 /* Update the status of whether giv can derive other givs. This can
3578 change when we pass a label or an insn that updates a biv. */
3579 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
3580 || GET_CODE (p) == CODE_LABEL)
3581 update_giv_derive (p);
3583 /* Past a label or a jump, we get to insns for which we can't count
3584 on whether or how many times they will be executed during each
3586 /* This code appears in three places, once in scan_loop, and twice
3587 in strength_reduce. */
3588 if ((GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN)
3589 /* If we enter the loop in the middle, and scan around
3590 to the beginning, don't set not_every_iteration for that.
3591 This can be any kind of jump, since we want to know if insns
3592 will be executed if the loop is executed. */
3593 && ! (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p) == loop_top
3594 && ((NEXT_INSN (NEXT_INSN (p)) == loop_end && simplejump_p (p))
3595 || (NEXT_INSN (p) == loop_end && condjump_p (p)))))
3596 not_every_iteration = 1;
3598 else if (GET_CODE (p) == NOTE)
3600 /* At the virtual top of a converted loop, insns are again known to
3601 be executed each iteration: logically, the loop begins here
3602 even though the exit code has been duplicated. */
3603 if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP && loop_depth == 0)
3604 not_every_iteration = 0;
3605 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
3607 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
3611 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
3612 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
3613 or not an insn is known to be executed each iteration of the
3614 loop, whether or not any iterations are known to occur.
3616 Therefore, if we have just passed a label and have no more labels
3617 between here and the test insn of the loop, we know these insns
3618 will be executed each iteration. */
3620 if (not_every_iteration && GET_CODE (p) == CODE_LABEL
3621 && no_labels_between_p (p, loop_end))
3622 not_every_iteration = 0;
3625 /* Try to calculate and save the number of loop iterations. This is
3626 set to zero if the actual number can not be calculated. This must
3627 be called after all giv's have been identified, since otherwise it may
3628 fail if the iteration variable is a giv. */
3630 loop_n_iterations = loop_iterations (loop_start, loop_end);
3632 /* Now for each giv for which we still don't know whether or not it is
3633 replaceable, check to see if it is replaceable because its final value
3634 can be calculated. This must be done after loop_iterations is called,
3635 so that final_giv_value will work correctly. */
3637 for (bl = loop_iv_list; bl; bl = bl->next)
3639 struct induction *v;
3641 for (v = bl->giv; v; v = v->next_iv)
3642 if (! v->replaceable && ! v->not_replaceable)
3643 check_final_value (v, loop_start, loop_end);
3646 /* Try to prove that the loop counter variable (if any) is always
3647 nonnegative; if so, record that fact with a REG_NONNEG note
3648 so that "decrement and branch until zero" insn can be used. */
3649 check_dbra_loop (loop_end, insn_count, loop_start);
3651 /* Create reg_map to hold substitutions for replaceable giv regs. */
3652 reg_map = (rtx *) alloca (max_reg_before_loop * sizeof (rtx));
3653 bzero ((char *) reg_map, max_reg_before_loop * sizeof (rtx));
3655 /* Examine each iv class for feasibility of strength reduction/induction
3656 variable elimination. */
3658 for (bl = loop_iv_list; bl; bl = bl->next)
3660 struct induction *v;
3663 rtx final_value = 0;
3665 /* Test whether it will be possible to eliminate this biv
3666 provided all givs are reduced. This is possible if either
3667 the reg is not used outside the loop, or we can compute
3668 what its final value will be.
3670 For architectures with a decrement_and_branch_until_zero insn,
3671 don't do this if we put a REG_NONNEG note on the endtest for
3674 /* Compare against bl->init_insn rather than loop_start.
3675 We aren't concerned with any uses of the biv between
3676 init_insn and loop_start since these won't be affected
3677 by the value of the biv elsewhere in the function, so
3678 long as init_insn doesn't use the biv itself.
3679 March 14, 1989 -- self@bayes.arc.nasa.gov */
3681 if ((uid_luid[regno_last_uid[bl->regno]] < INSN_LUID (loop_end)
3683 && INSN_UID (bl->init_insn) < max_uid_for_loop
3684 && uid_luid[regno_first_uid[bl->regno]] >= INSN_LUID (bl->init_insn)
3685 #ifdef HAVE_decrement_and_branch_until_zero
3688 && ! reg_mentioned_p (bl->biv->dest_reg, SET_SRC (bl->init_set)))
3689 || ((final_value = final_biv_value (bl, loop_start, loop_end))
3690 #ifdef HAVE_decrement_and_branch_until_zero
3694 bl->eliminable = maybe_eliminate_biv (bl, loop_start, end, 0,
3695 threshold, insn_count);
3698 if (loop_dump_stream)
3700 fprintf (loop_dump_stream,
3701 "Cannot eliminate biv %d.\n",
3703 fprintf (loop_dump_stream,
3704 "First use: insn %d, last use: insn %d.\n",
3705 regno_first_uid[bl->regno],
3706 regno_last_uid[bl->regno]);
3710 /* Combine all giv's for this iv_class. */
3713 /* This will be true at the end, if all givs which depend on this
3714 biv have been strength reduced.
3715 We can't (currently) eliminate the biv unless this is so. */
3718 /* Check each giv in this class to see if we will benefit by reducing
3719 it. Skip giv's combined with others. */
3720 for (v = bl->giv; v; v = v->next_iv)
3722 struct induction *tv;
3724 if (v->ignore || v->same)
3727 benefit = v->benefit;
3729 /* Reduce benefit if not replaceable, since we will insert
3730 a move-insn to replace the insn that calculates this giv.
3731 Don't do this unless the giv is a user variable, since it
3732 will often be marked non-replaceable because of the duplication
3733 of the exit code outside the loop. In such a case, the copies
3734 we insert are dead and will be deleted. So they don't have
3735 a cost. Similar situations exist. */
3736 /* ??? The new final_[bg]iv_value code does a much better job
3737 of finding replaceable giv's, and hence this code may no longer
3739 if (! v->replaceable && ! bl->eliminable
3740 && REG_USERVAR_P (v->dest_reg))
3741 benefit -= copy_cost;
3743 /* Decrease the benefit to count the add-insns that we will
3744 insert to increment the reduced reg for the giv. */
3745 benefit -= add_cost * bl->biv_count;
3747 /* Decide whether to strength-reduce this giv or to leave the code
3748 unchanged (recompute it from the biv each time it is used).
3749 This decision can be made independently for each giv. */
3751 /* ??? Perhaps attempt to guess whether autoincrement will handle
3752 some of the new add insns; if so, can increase BENEFIT
3753 (undo the subtraction of add_cost that was done above). */
3755 /* If an insn is not to be strength reduced, then set its ignore
3756 flag, and clear all_reduced. */
3758 /* A giv that depends on a reversed biv must be reduced if it is
3759 used after the loop exit, otherwise, it would have the wrong
3760 value after the loop exit. To make it simple, just reduce all
3761 of such giv's whether or not we know they are used after the loop
3764 if (v->lifetime * threshold * benefit < insn_count
3767 if (loop_dump_stream)
3768 fprintf (loop_dump_stream,
3769 "giv of insn %d not worth while, %d vs %d.\n",
3771 v->lifetime * threshold * benefit, insn_count);
3777 /* Check that we can increment the reduced giv without a
3778 multiply insn. If not, reject it. */
3780 for (tv = bl->biv; tv; tv = tv->next_iv)
3781 if (tv->mult_val == const1_rtx
3782 && ! product_cheap_p (tv->add_val, v->mult_val))
3784 if (loop_dump_stream)
3785 fprintf (loop_dump_stream,
3786 "giv of insn %d: would need a multiply.\n",
3787 INSN_UID (v->insn));
3795 /* Reduce each giv that we decided to reduce. */
3797 for (v = bl->giv; v; v = v->next_iv)
3799 struct induction *tv;
3800 if (! v->ignore && v->same == 0)
3802 v->new_reg = gen_reg_rtx (v->mode);
3804 /* For each place where the biv is incremented,
3805 add an insn to increment the new, reduced reg for the giv. */
3806 for (tv = bl->biv; tv; tv = tv->next_iv)
3808 if (tv->mult_val == const1_rtx)
3809 emit_iv_add_mult (tv->add_val, v->mult_val,
3810 v->new_reg, v->new_reg, tv->insn);
3811 else /* tv->mult_val == const0_rtx */
3812 /* A multiply is acceptable here
3813 since this is presumed to be seldom executed. */
3814 emit_iv_add_mult (tv->add_val, v->mult_val,
3815 v->add_val, v->new_reg, tv->insn);
3818 /* Add code at loop start to initialize giv's reduced reg. */
3820 emit_iv_add_mult (bl->initial_value, v->mult_val,
3821 v->add_val, v->new_reg, loop_start);
3825 /* Rescan all givs. If a giv is the same as a giv not reduced, mark it
3828 For each giv register that can be reduced now: if replaceable,
3829 substitute reduced reg wherever the old giv occurs;
3830 else add new move insn "giv_reg = reduced_reg".
3832 Also check for givs whose first use is their definition and whose
3833 last use is the definition of another giv. If so, it is likely
3834 dead and should not be used to eliminate a biv. */
3835 for (v = bl->giv; v; v = v->next_iv)
3837 if (v->same && v->same->ignore)
3843 if (v->giv_type == DEST_REG
3844 && regno_first_uid[REGNO (v->dest_reg)] == INSN_UID (v->insn))
3846 struct induction *v1;
3848 for (v1 = bl->giv; v1; v1 = v1->next_iv)
3849 if (regno_last_uid[REGNO (v->dest_reg)] == INSN_UID (v1->insn))
3853 /* Update expression if this was combined, in case other giv was
3856 v->new_reg = replace_rtx (v->new_reg,
3857 v->same->dest_reg, v->same->new_reg);
3859 if (v->giv_type == DEST_ADDR)
3860 /* Store reduced reg as the address in the memref where we found
3862 validate_change (v->insn, v->location, v->new_reg, 0);
3863 else if (v->replaceable)
3865 reg_map[REGNO (v->dest_reg)] = v->new_reg;
3868 /* I can no longer duplicate the original problem. Perhaps
3869 this is unnecessary now? */
3871 /* Replaceable; it isn't strictly necessary to delete the old
3872 insn and emit a new one, because v->dest_reg is now dead.
3874 However, especially when unrolling loops, the special
3875 handling for (set REG0 REG1) in the second cse pass may
3876 make v->dest_reg live again. To avoid this problem, emit
3877 an insn to set the original giv reg from the reduced giv.
3878 We can not delete the original insn, since it may be part
3879 of a LIBCALL, and the code in flow that eliminates dead
3880 libcalls will fail if it is deleted. */
3881 emit_insn_after (gen_move_insn (v->dest_reg, v->new_reg),
3887 /* Not replaceable; emit an insn to set the original giv reg from
3888 the reduced giv, same as above. */
3889 emit_insn_after (gen_move_insn (v->dest_reg, v->new_reg),
3893 /* When a loop is reversed, givs which depend on the reversed
3894 biv, and which are live outside the loop, must be set to their
3895 correct final value. This insn is only needed if the giv is
3896 not replaceable. The correct final value is the same as the
3897 value that the giv starts the reversed loop with. */
3898 if (bl->reversed && ! v->replaceable)
3899 emit_iv_add_mult (bl->initial_value, v->mult_val,
3900 v->add_val, v->dest_reg, end_insert_before);
3901 else if (v->final_value)
3905 /* If the loop has multiple exits, emit the insn before the
3906 loop to ensure that it will always be executed no matter
3907 how the loop exits. Otherwise, emit the insn after the loop,
3908 since this is slightly more efficient. */
3909 if (loop_number_exit_labels[uid_loop_num[INSN_UID (loop_start)]])
3910 insert_before = loop_start;
3912 insert_before = end_insert_before;
3913 emit_insn_before (gen_move_insn (v->dest_reg, v->final_value),
3917 /* If the insn to set the final value of the giv was emitted
3918 before the loop, then we must delete the insn inside the loop
3919 that sets it. If this is a LIBCALL, then we must delete
3920 every insn in the libcall. Note, however, that
3921 final_giv_value will only succeed when there are multiple
3922 exits if the giv is dead at each exit, hence it does not
3923 matter that the original insn remains because it is dead
3925 /* Delete the insn inside the loop that sets the giv since
3926 the giv is now set before (or after) the loop. */
3927 delete_insn (v->insn);
3931 if (loop_dump_stream)
3933 fprintf (loop_dump_stream, "giv at %d reduced to ",
3934 INSN_UID (v->insn));
3935 print_rtl (loop_dump_stream, v->new_reg);
3936 fprintf (loop_dump_stream, "\n");
3940 /* All the givs based on the biv bl have been reduced if they
3943 /* For each giv not marked as maybe dead that has been combined with a
3944 second giv, clear any "maybe dead" mark on that second giv.
3945 v->new_reg will either be or refer to the register of the giv it
3948 Doing this clearing avoids problems in biv elimination where a
3949 giv's new_reg is a complex value that can't be put in the insn but
3950 the giv combined with (with a reg as new_reg) is marked maybe_dead.
3951 Since the register will be used in either case, we'd prefer it be
3952 used from the simpler giv. */
3954 for (v = bl->giv; v; v = v->next_iv)
3955 if (! v->maybe_dead && v->same)
3956 v->same->maybe_dead = 0;
3958 /* Try to eliminate the biv, if it is a candidate.
3959 This won't work if ! all_reduced,
3960 since the givs we planned to use might not have been reduced.
3962 We have to be careful that we didn't initially think we could eliminate
3963 this biv because of a giv that we now think may be dead and shouldn't
3964 be used as a biv replacement.
3966 Also, there is the possibility that we may have a giv that looks
3967 like it can be used to eliminate a biv, but the resulting insn
3968 isn't valid. This can happen, for example, on the 88k, where a
3969 JUMP_INSN can compare a register only with zero. Attempts to
3970 replace it with a compare with a constant will fail.
3972 Note that in cases where this call fails, we may have replaced some
3973 of the occurrences of the biv with a giv, but no harm was done in
3974 doing so in the rare cases where it can occur. */
3976 if (all_reduced == 1 && bl->eliminable
3977 && maybe_eliminate_biv (bl, loop_start, end, 1,
3978 threshold, insn_count))
3981 /* ?? If we created a new test to bypass the loop entirely,
3982 or otherwise drop straight in, based on this test, then
3983 we might want to rewrite it also. This way some later
3984 pass has more hope of removing the initialization of this
3987 /* If final_value != 0, then the biv may be used after loop end
3988 and we must emit an insn to set it just in case.
3990 Reversed bivs already have an insn after the loop setting their
3991 value, so we don't need another one. We can't calculate the
3992 proper final value for such a biv here anyways. */
3993 if (final_value != 0 && ! bl->reversed)
3997 /* If the loop has multiple exits, emit the insn before the
3998 loop to ensure that it will always be executed no matter
3999 how the loop exits. Otherwise, emit the insn after the
4000 loop, since this is slightly more efficient. */
4001 if (loop_number_exit_labels[uid_loop_num[INSN_UID (loop_start)]])
4002 insert_before = loop_start;
4004 insert_before = end_insert_before;
4006 emit_insn_before (gen_move_insn (bl->biv->dest_reg, final_value),
4011 /* Delete all of the instructions inside the loop which set
4012 the biv, as they are all dead. If is safe to delete them,
4013 because an insn setting a biv will never be part of a libcall. */
4014 /* However, deleting them will invalidate the regno_last_uid info,
4015 so keeping them around is more convenient. Final_biv_value
4016 will only succeed when there are multiple exits if the biv
4017 is dead at each exit, hence it does not matter that the original
4018 insn remains, because it is dead anyways. */
4019 for (v = bl->biv; v; v = v->next_iv)
4020 delete_insn (v->insn);
4023 if (loop_dump_stream)
4024 fprintf (loop_dump_stream, "Reg %d: biv eliminated\n",
4029 /* Go through all the instructions in the loop, making all the
4030 register substitutions scheduled in REG_MAP. */
4032 for (p = loop_start; p != end; p = NEXT_INSN (p))
4033 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
4034 || GET_CODE (p) == CALL_INSN)
4036 replace_regs (PATTERN (p), reg_map, max_reg_before_loop, 0);
4037 replace_regs (REG_NOTES (p), reg_map, max_reg_before_loop, 0);
4041 /* Unroll loops from within strength reduction so that we can use the
4042 induction variable information that strength_reduce has already
4045 if (flag_unroll_loops)
4046 unroll_loop (loop_end, insn_count, loop_start, end_insert_before, 1);
4048 if (loop_dump_stream)
4049 fprintf (loop_dump_stream, "\n");
4052 /* Return 1 if X is a valid source for an initial value (or as value being
4053 compared against in an initial test).
4055 X must be either a register or constant and must not be clobbered between
4056 the current insn and the start of the loop.
4058 INSN is the insn containing X. */
4061 valid_initial_value_p (x, insn, call_seen, loop_start)
4070 /* Only consider pseudos we know about initialized in insns whose luids
4072 if (GET_CODE (x) != REG
4073 || REGNO (x) >= max_reg_before_loop)
4076 /* Don't use call-clobbered registers across a call which clobbers it. On
4077 some machines, don't use any hard registers at all. */
4078 if (REGNO (x) < FIRST_PSEUDO_REGISTER
4079 #ifndef SMALL_REGISTER_CLASSES
4080 && call_used_regs[REGNO (x)] && call_seen
4085 /* Don't use registers that have been clobbered before the start of the
4087 if (reg_set_between_p (x, insn, loop_start))
4093 /* Scan X for memory refs and check each memory address
4094 as a possible giv. INSN is the insn whose pattern X comes from.
4095 NOT_EVERY_ITERATION is 1 if the insn might not be executed during
4096 every loop iteration. */
4099 find_mem_givs (x, insn, not_every_iteration, loop_start, loop_end)
4102 int not_every_iteration;
4103 rtx loop_start, loop_end;
4106 register enum rtx_code code;
4112 code = GET_CODE (x);
4136 benefit = general_induction_var (XEXP (x, 0),
4137 &src_reg, &add_val, &mult_val);
4139 /* Don't make a DEST_ADDR giv with mult_val == 1 && add_val == 0.
4140 Such a giv isn't useful. */
4141 if (benefit > 0 && (mult_val != const1_rtx || add_val != const0_rtx))
4143 /* Found one; record it. */
4145 = (struct induction *) oballoc (sizeof (struct induction));
4147 record_giv (v, insn, src_reg, addr_placeholder, mult_val,
4148 add_val, benefit, DEST_ADDR, not_every_iteration,
4149 &XEXP (x, 0), loop_start, loop_end);
4151 v->mem_mode = GET_MODE (x);
4157 /* Recursively scan the subexpressions for other mem refs. */
4159 fmt = GET_RTX_FORMAT (code);
4160 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4162 find_mem_givs (XEXP (x, i), insn, not_every_iteration, loop_start,
4164 else if (fmt[i] == 'E')
4165 for (j = 0; j < XVECLEN (x, i); j++)
4166 find_mem_givs (XVECEXP (x, i, j), insn, not_every_iteration,
4167 loop_start, loop_end);
4170 /* Fill in the data about one biv update.
4171 V is the `struct induction' in which we record the biv. (It is
4172 allocated by the caller, with alloca.)
4173 INSN is the insn that sets it.
4174 DEST_REG is the biv's reg.
4176 MULT_VAL is const1_rtx if the biv is being incremented here, in which case
4177 INC_VAL is the increment. Otherwise, MULT_VAL is const0_rtx and the biv is
4178 being set to INC_VAL.
4180 NOT_EVERY_ITERATION is nonzero if this biv update is not know to be
4181 executed every iteration; MAYBE_MULTIPLE is nonzero if this biv update
4182 can be executed more than once per iteration. If MAYBE_MULTIPLE
4183 and NOT_EVERY_ITERATION are both zero, we know that the biv update is
4184 executed exactly once per iteration. */
4187 record_biv (v, insn, dest_reg, inc_val, mult_val,
4188 not_every_iteration, maybe_multiple)
4189 struct induction *v;
4194 int not_every_iteration;
4197 struct iv_class *bl;
4200 v->src_reg = dest_reg;
4201 v->dest_reg = dest_reg;
4202 v->mult_val = mult_val;
4203 v->add_val = inc_val;
4204 v->mode = GET_MODE (dest_reg);
4205 v->always_computable = ! not_every_iteration;
4206 v->maybe_multiple = maybe_multiple;
4208 /* Add this to the reg's iv_class, creating a class
4209 if this is the first incrementation of the reg. */
4211 bl = reg_biv_class[REGNO (dest_reg)];
4214 /* Create and initialize new iv_class. */
4216 bl = (struct iv_class *) oballoc (sizeof (struct iv_class));
4218 bl->regno = REGNO (dest_reg);
4224 /* Set initial value to the reg itself. */
4225 bl->initial_value = dest_reg;
4226 /* We haven't seen the initializing insn yet */
4229 bl->initial_test = 0;
4230 bl->incremented = 0;
4234 bl->total_benefit = 0;
4236 /* Add this class to loop_iv_list. */
4237 bl->next = loop_iv_list;
4240 /* Put it in the array of biv register classes. */
4241 reg_biv_class[REGNO (dest_reg)] = bl;
4244 /* Update IV_CLASS entry for this biv. */
4245 v->next_iv = bl->biv;
4248 if (mult_val == const1_rtx)
4249 bl->incremented = 1;
4251 if (loop_dump_stream)
4253 fprintf (loop_dump_stream,
4254 "Insn %d: possible biv, reg %d,",
4255 INSN_UID (insn), REGNO (dest_reg));
4256 if (GET_CODE (inc_val) == CONST_INT)
4257 fprintf (loop_dump_stream, " const = %d\n",
4261 fprintf (loop_dump_stream, " const = ");
4262 print_rtl (loop_dump_stream, inc_val);
4263 fprintf (loop_dump_stream, "\n");
4268 /* Fill in the data about one giv.
4269 V is the `struct induction' in which we record the giv. (It is
4270 allocated by the caller, with alloca.)
4271 INSN is the insn that sets it.
4272 BENEFIT estimates the savings from deleting this insn.
4273 TYPE is DEST_REG or DEST_ADDR; it says whether the giv is computed
4274 into a register or is used as a memory address.
4276 SRC_REG is the biv reg which the giv is computed from.
4277 DEST_REG is the giv's reg (if the giv is stored in a reg).
4278 MULT_VAL and ADD_VAL are the coefficients used to compute the giv.
4279 LOCATION points to the place where this giv's value appears in INSN. */
4282 record_giv (v, insn, src_reg, dest_reg, mult_val, add_val, benefit,
4283 type, not_every_iteration, location, loop_start, loop_end)
4284 struct induction *v;
4288 rtx mult_val, add_val;
4291 int not_every_iteration;
4293 rtx loop_start, loop_end;
4295 struct induction *b;
4296 struct iv_class *bl;
4297 rtx set = single_set (insn);
4301 v->src_reg = src_reg;
4303 v->dest_reg = dest_reg;
4304 v->mult_val = mult_val;
4305 v->add_val = add_val;
4306 v->benefit = benefit;
4307 v->location = location;
4309 v->combined_with = 0;
4310 v->maybe_multiple = 0;
4312 v->derive_adjustment = 0;
4318 /* The v->always_computable field is used in update_giv_derive, to
4319 determine whether a giv can be used to derive another giv. For a
4320 DEST_REG giv, INSN computes a new value for the giv, so its value
4321 isn't computable if INSN insn't executed every iteration.
4322 However, for a DEST_ADDR giv, INSN merely uses the value of the giv;
4323 it does not compute a new value. Hence the value is always computable
4324 regardless of whether INSN is executed each iteration. */
4326 if (type == DEST_ADDR)
4327 v->always_computable = 1;
4329 v->always_computable = ! not_every_iteration;
4331 if (type == DEST_ADDR)
4333 v->mode = GET_MODE (*location);
4337 else /* type == DEST_REG */
4339 v->mode = GET_MODE (SET_DEST (set));
4341 v->lifetime = (uid_luid[regno_last_uid[REGNO (dest_reg)]]
4342 - uid_luid[regno_first_uid[REGNO (dest_reg)]]);
4344 v->times_used = n_times_used[REGNO (dest_reg)];
4346 /* If the lifetime is zero, it means that this register is
4347 really a dead store. So mark this as a giv that can be
4348 ignored. This will not prevent the biv from being eliminated. */
4349 if (v->lifetime == 0)
4352 reg_iv_type[REGNO (dest_reg)] = GENERAL_INDUCT;
4353 reg_iv_info[REGNO (dest_reg)] = v;
4356 /* Add the giv to the class of givs computed from one biv. */
4358 bl = reg_biv_class[REGNO (src_reg)];
4361 v->next_iv = bl->giv;
4363 /* Don't count DEST_ADDR. This is supposed to count the number of
4364 insns that calculate givs. */
4365 if (type == DEST_REG)
4367 bl->total_benefit += benefit;
4370 /* Fatal error, biv missing for this giv? */
4373 if (type == DEST_ADDR)
4377 /* The giv can be replaced outright by the reduced register only if all
4378 of the following conditions are true:
4379 - the insn that sets the giv is always executed on any iteration
4380 on which the giv is used at all
4381 (there are two ways to deduce this:
4382 either the insn is executed on every iteration,
4383 or all uses follow that insn in the same basic block),
4384 - the giv is not used outside the loop
4385 - no assignments to the biv occur during the giv's lifetime. */
4387 if (regno_first_uid[REGNO (dest_reg)] == INSN_UID (insn)
4388 /* Previous line always fails if INSN was moved by loop opt. */
4389 && uid_luid[regno_last_uid[REGNO (dest_reg)]] < INSN_LUID (loop_end)
4390 && (! not_every_iteration
4391 || last_use_this_basic_block (dest_reg, insn)))
4393 /* Now check that there are no assignments to the biv within the
4394 giv's lifetime. This requires two separate checks. */
4396 /* Check each biv update, and fail if any are between the first
4397 and last use of the giv.
4399 If this loop contains an inner loop that was unrolled, then
4400 the insn modifying the biv may have been emitted by the loop
4401 unrolling code, and hence does not have a valid luid. Just
4402 mark the biv as not replaceable in this case. It is not very
4403 useful as a biv, because it is used in two different loops.
4404 It is very unlikely that we would be able to optimize the giv
4405 using this biv anyways. */
4408 for (b = bl->biv; b; b = b->next_iv)
4410 if (INSN_UID (b->insn) >= max_uid_for_loop
4411 || ((uid_luid[INSN_UID (b->insn)]
4412 >= uid_luid[regno_first_uid[REGNO (dest_reg)]])
4413 && (uid_luid[INSN_UID (b->insn)]
4414 <= uid_luid[regno_last_uid[REGNO (dest_reg)]])))
4417 v->not_replaceable = 1;
4422 /* Check each insn between the first and last use of the giv,
4423 and fail if any of them are branches that jump to a named label
4424 outside this range, but still inside the loop. This catches
4425 cases of spaghetti code where the execution order of insns
4426 is not linear, and hence the above test fails. For example,
4427 in the following code, j is not replaceable:
4428 for (i = 0; i < 100; ) {
4429 L0: j = 4*i; goto L1;
4433 printf ("k = %d\n", k); }
4434 This test is conservative, but this test succeeds rarely enough
4435 that it isn't a problem. See also check_final_value below. */
4439 INSN_UID (p) >= max_uid_for_loop
4440 || INSN_LUID (p) < uid_luid[regno_last_uid[REGNO (dest_reg)]];
4443 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p)
4444 && LABEL_NAME (JUMP_LABEL (p))
4445 && ((INSN_LUID (JUMP_LABEL (p)) > INSN_LUID (loop_start)
4446 && (INSN_LUID (JUMP_LABEL (p))
4447 < uid_luid[regno_first_uid[REGNO (dest_reg)]]))
4448 || (INSN_LUID (JUMP_LABEL (p)) < INSN_LUID (loop_end)
4449 && (INSN_LUID (JUMP_LABEL (p))
4450 > uid_luid[regno_last_uid[REGNO (dest_reg)]]))))
4453 v->not_replaceable = 1;
4455 if (loop_dump_stream)
4456 fprintf (loop_dump_stream,
4457 "Found branch outside giv lifetime.\n");
4465 /* May still be replaceable, we don't have enough info here to
4468 v->not_replaceable = 0;
4472 if (loop_dump_stream)
4474 if (type == DEST_REG)
4475 fprintf (loop_dump_stream, "Insn %d: giv reg %d",
4476 INSN_UID (insn), REGNO (dest_reg));
4478 fprintf (loop_dump_stream, "Insn %d: dest address",
4481 fprintf (loop_dump_stream, " src reg %d benefit %d",
4482 REGNO (src_reg), v->benefit);
4483 fprintf (loop_dump_stream, " used %d lifetime %d",
4484 v->times_used, v->lifetime);
4487 fprintf (loop_dump_stream, " replaceable");
4489 if (GET_CODE (mult_val) == CONST_INT)
4490 fprintf (loop_dump_stream, " mult %d",
4494 fprintf (loop_dump_stream, " mult ");
4495 print_rtl (loop_dump_stream, mult_val);
4498 if (GET_CODE (add_val) == CONST_INT)
4499 fprintf (loop_dump_stream, " add %d",
4503 fprintf (loop_dump_stream, " add ");
4504 print_rtl (loop_dump_stream, add_val);
4508 if (loop_dump_stream)
4509 fprintf (loop_dump_stream, "\n");
4514 /* All this does is determine whether a giv can be made replaceable because
4515 its final value can be calculated. This code can not be part of record_giv
4516 above, because final_giv_value requires that the number of loop iterations
4517 be known, and that can not be accurately calculated until after all givs
4518 have been identified. */
4521 check_final_value (v, loop_start, loop_end)
4522 struct induction *v;
4523 rtx loop_start, loop_end;
4525 struct iv_class *bl;
4526 rtx final_value = 0;
4528 bl = reg_biv_class[REGNO (v->src_reg)];
4530 /* DEST_ADDR givs will never reach here, because they are always marked
4531 replaceable above in record_giv. */
4533 /* The giv can be replaced outright by the reduced register only if all
4534 of the following conditions are true:
4535 - the insn that sets the giv is always executed on any iteration
4536 on which the giv is used at all
4537 (there are two ways to deduce this:
4538 either the insn is executed on every iteration,
4539 or all uses follow that insn in the same basic block),
4540 - its final value can be calculated (this condition is different
4541 than the one above in record_giv)
4542 - no assignments to the biv occur during the giv's lifetime. */
4545 /* This is only called now when replaceable is known to be false. */
4546 /* Clear replaceable, so that it won't confuse final_giv_value. */
4550 if ((final_value = final_giv_value (v, loop_start, loop_end))
4551 && (v->always_computable || last_use_this_basic_block (v->dest_reg, v->insn)))
4553 int biv_increment_seen = 0;
4559 /* When trying to determine whether or not a biv increment occurs
4560 during the lifetime of the giv, we can ignore uses of the variable
4561 outside the loop because final_value is true. Hence we can not
4562 use regno_last_uid and regno_first_uid as above in record_giv. */
4564 /* Search the loop to determine whether any assignments to the
4565 biv occur during the giv's lifetime. Start with the insn
4566 that sets the giv, and search around the loop until we come
4567 back to that insn again.
4569 Also fail if there is a jump within the giv's lifetime that jumps
4570 to somewhere outside the lifetime but still within the loop. This
4571 catches spaghetti code where the execution order is not linear, and
4572 hence the above test fails. Here we assume that the giv lifetime
4573 does not extend from one iteration of the loop to the next, so as
4574 to make the test easier. Since the lifetime isn't known yet,
4575 this requires two loops. See also record_giv above. */
4577 last_giv_use = v->insn;
4583 p = NEXT_INSN (loop_start);
4587 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
4588 || GET_CODE (p) == CALL_INSN)
4590 if (biv_increment_seen)
4592 if (reg_mentioned_p (v->dest_reg, PATTERN (p)))
4595 v->not_replaceable = 1;
4599 else if (GET_CODE (PATTERN (p)) == SET
4600 && SET_DEST (PATTERN (p)) == v->src_reg)
4601 biv_increment_seen = 1;
4602 else if (reg_mentioned_p (v->dest_reg, PATTERN (p)))
4607 /* Now that the lifetime of the giv is known, check for branches
4608 from within the lifetime to outside the lifetime if it is still
4618 p = NEXT_INSN (loop_start);
4619 if (p == last_giv_use)
4622 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p)
4623 && LABEL_NAME (JUMP_LABEL (p))
4624 && ((INSN_LUID (JUMP_LABEL (p)) < INSN_LUID (v->insn)
4625 && INSN_LUID (JUMP_LABEL (p)) > INSN_LUID (loop_start))
4626 || (INSN_LUID (JUMP_LABEL (p)) > INSN_LUID (last_giv_use)
4627 && INSN_LUID (JUMP_LABEL (p)) < INSN_LUID (loop_end))))
4630 v->not_replaceable = 1;
4632 if (loop_dump_stream)
4633 fprintf (loop_dump_stream,
4634 "Found branch outside giv lifetime.\n");
4641 /* If it is replaceable, then save the final value. */
4643 v->final_value = final_value;
4646 if (loop_dump_stream && v->replaceable)
4647 fprintf (loop_dump_stream, "Insn %d: giv reg %d final_value replaceable\n",
4648 INSN_UID (v->insn), REGNO (v->dest_reg));
4651 /* Update the status of whether a giv can derive other givs.
4653 We need to do something special if there is or may be an update to the biv
4654 between the time the giv is defined and the time it is used to derive
4657 In addition, a giv that is only conditionally set is not allowed to
4658 derive another giv once a label has been passed.
4660 The cases we look at are when a label or an update to a biv is passed. */
4663 update_giv_derive (p)
4666 struct iv_class *bl;
4667 struct induction *biv, *giv;
4671 /* Search all IV classes, then all bivs, and finally all givs.
4673 There are three cases we are concerned with. First we have the situation
4674 of a giv that is only updated conditionally. In that case, it may not
4675 derive any givs after a label is passed.
4677 The second case is when a biv update occurs, or may occur, after the
4678 definition of a giv. For certain biv updates (see below) that are
4679 known to occur between the giv definition and use, we can adjust the
4680 giv definition. For others, or when the biv update is conditional,
4681 we must prevent the giv from deriving any other givs. There are two
4682 sub-cases within this case.
4684 If this is a label, we are concerned with any biv update that is done
4685 conditionally, since it may be done after the giv is defined followed by
4686 a branch here (actually, we need to pass both a jump and a label, but
4687 this extra tracking doesn't seem worth it).
4689 If this is a jump, we are concerned about any biv update that may be
4690 executed multiple times. We are actually only concerned about
4691 backward jumps, but it is probably not worth performing the test
4692 on the jump again here.
4694 If this is a biv update, we must adjust the giv status to show that a
4695 subsequent biv update was performed. If this adjustment cannot be done,
4696 the giv cannot derive further givs. */
4698 for (bl = loop_iv_list; bl; bl = bl->next)
4699 for (biv = bl->biv; biv; biv = biv->next_iv)
4700 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN
4703 for (giv = bl->giv; giv; giv = giv->next_iv)
4705 /* If cant_derive is already true, there is no point in
4706 checking all of these conditions again. */
4707 if (giv->cant_derive)
4710 /* If this giv is conditionally set and we have passed a label,
4711 it cannot derive anything. */
4712 if (GET_CODE (p) == CODE_LABEL && ! giv->always_computable)
4713 giv->cant_derive = 1;
4715 /* Skip givs that have mult_val == 0, since
4716 they are really invariants. Also skip those that are
4717 replaceable, since we know their lifetime doesn't contain
4719 else if (giv->mult_val == const0_rtx || giv->replaceable)
4722 /* The only way we can allow this giv to derive another
4723 is if this is a biv increment and we can form the product
4724 of biv->add_val and giv->mult_val. In this case, we will
4725 be able to compute a compensation. */
4726 else if (biv->insn == p)
4730 if (biv->mult_val == const1_rtx)
4731 tem = simplify_giv_expr (gen_rtx (MULT, giv->mode,
4736 if (tem && giv->derive_adjustment)
4737 tem = simplify_giv_expr (gen_rtx (PLUS, giv->mode, tem,
4738 giv->derive_adjustment),
4741 giv->derive_adjustment = tem;
4743 giv->cant_derive = 1;
4745 else if ((GET_CODE (p) == CODE_LABEL && ! biv->always_computable)
4746 || (GET_CODE (p) == JUMP_INSN && biv->maybe_multiple))
4747 giv->cant_derive = 1;
4752 /* Check whether an insn is an increment legitimate for a basic induction var.
4753 X is the source of insn P, or a part of it.
4754 MODE is the mode in which X should be interpreted.
4756 DEST_REG is the putative biv, also the destination of the insn.
4757 We accept patterns of these forms:
4758 REG = REG + INVARIANT (includes REG = REG - CONSTANT)
4759 REG = INVARIANT + REG
4761 If X is suitable, we return 1, set *MULT_VAL to CONST1_RTX,
4762 and store the additive term into *INC_VAL.
4764 If X is an assignment of an invariant into DEST_REG, we set
4765 *MULT_VAL to CONST0_RTX, and store the invariant into *INC_VAL.
4767 We also want to detect a BIV when it corresponds to a variable
4768 whose mode was promoted via PROMOTED_MODE. In that case, an increment
4769 of the variable may be a PLUS that adds a SUBREG of that variable to
4770 an invariant and then sign- or zero-extends the result of the PLUS
4773 Most GIVs in such cases will be in the promoted mode, since that is the
4774 probably the natural computation mode (and almost certainly the mode
4775 used for addresses) on the machine. So we view the pseudo-reg containing
4776 the variable as the BIV, as if it were simply incremented.
4778 Note that treating the entire pseudo as a BIV will result in making
4779 simple increments to any GIVs based on it. However, if the variable
4780 overflows in its declared mode but not its promoted mode, the result will
4781 be incorrect. This is acceptable if the variable is signed, since
4782 overflows in such cases are undefined, but not if it is unsigned, since
4783 those overflows are defined. So we only check for SIGN_EXTEND and
4786 If we cannot find a biv, we return 0. */
4789 basic_induction_var (x, mode, dest_reg, p, inc_val, mult_val)
4791 enum machine_mode mode;
4797 register enum rtx_code code;
4801 code = GET_CODE (x);
4805 if (XEXP (x, 0) == dest_reg
4806 || (GET_CODE (XEXP (x, 0)) == SUBREG
4807 && SUBREG_PROMOTED_VAR_P (XEXP (x, 0))
4808 && SUBREG_REG (XEXP (x, 0)) == dest_reg))
4810 else if (XEXP (x, 1) == dest_reg
4811 || (GET_CODE (XEXP (x, 1)) == SUBREG
4812 && SUBREG_PROMOTED_VAR_P (XEXP (x, 1))
4813 && SUBREG_REG (XEXP (x, 1)) == dest_reg))
4818 if (invariant_p (arg) != 1)
4821 *inc_val = convert_modes (GET_MODE (dest_reg), GET_MODE (x), arg, 0);
4822 *mult_val = const1_rtx;
4826 /* If this is a SUBREG for a promoted variable, check the inner
4828 if (SUBREG_PROMOTED_VAR_P (x))
4829 return basic_induction_var (SUBREG_REG (x), GET_MODE (SUBREG_REG (x)),
4830 dest_reg, p, inc_val, mult_val);
4833 /* If this register is assigned in the previous insn, look at its
4834 source, but don't go outside the loop or past a label. */
4836 for (insn = PREV_INSN (p);
4837 (insn && GET_CODE (insn) == NOTE
4838 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG);
4839 insn = PREV_INSN (insn))
4843 set = single_set (insn);
4846 && (SET_DEST (set) == x
4847 || (GET_CODE (SET_DEST (set)) == SUBREG
4848 && (GET_MODE_SIZE (GET_MODE (SET_DEST (set)))
4850 && SUBREG_REG (SET_DEST (set)) == x)))
4851 return basic_induction_var (SET_SRC (set),
4852 (GET_MODE (SET_SRC (set)) == VOIDmode
4854 : GET_MODE (SET_SRC (set))),
4857 /* ... fall through ... */
4859 /* Can accept constant setting of biv only when inside inner most loop.
4860 Otherwise, a biv of an inner loop may be incorrectly recognized
4861 as a biv of the outer loop,
4862 causing code to be moved INTO the inner loop. */
4864 if (invariant_p (x) != 1)
4869 if (loops_enclosed == 1)
4871 /* Possible bug here? Perhaps we don't know the mode of X. */
4872 *inc_val = convert_modes (GET_MODE (dest_reg), mode, x, 0);
4873 *mult_val = const0_rtx;
4880 return basic_induction_var (XEXP (x, 0), GET_MODE (XEXP (x, 0)),
4881 dest_reg, p, inc_val, mult_val);
4883 /* Similar, since this can be a sign extension. */
4884 for (insn = PREV_INSN (p);
4885 (insn && GET_CODE (insn) == NOTE
4886 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG);
4887 insn = PREV_INSN (insn))
4891 set = single_set (insn);
4893 if (set && SET_DEST (set) == XEXP (x, 0)
4894 && GET_CODE (XEXP (x, 1)) == CONST_INT
4895 && INTVAL (XEXP (x, 1)) >= 0
4896 && GET_CODE (SET_SRC (set)) == ASHIFT
4897 && XEXP (x, 1) == XEXP (SET_SRC (set), 1))
4898 return basic_induction_var (XEXP (SET_SRC (set), 0),
4899 GET_MODE (XEXP (x, 0)),
4900 dest_reg, insn, inc_val, mult_val);
4908 /* A general induction variable (giv) is any quantity that is a linear
4909 function of a basic induction variable,
4910 i.e. giv = biv * mult_val + add_val.
4911 The coefficients can be any loop invariant quantity.
4912 A giv need not be computed directly from the biv;
4913 it can be computed by way of other givs. */
4915 /* Determine whether X computes a giv.
4916 If it does, return a nonzero value
4917 which is the benefit from eliminating the computation of X;
4918 set *SRC_REG to the register of the biv that it is computed from;
4919 set *ADD_VAL and *MULT_VAL to the coefficients,
4920 such that the value of X is biv * mult + add; */
4923 general_induction_var (x, src_reg, add_val, mult_val)
4933 /* If this is an invariant, forget it, it isn't a giv. */
4934 if (invariant_p (x) == 1)
4937 /* See if the expression could be a giv and get its form.
4938 Mark our place on the obstack in case we don't find a giv. */
4939 storage = (char *) oballoc (0);
4940 x = simplify_giv_expr (x, &benefit);
4947 switch (GET_CODE (x))
4951 /* Since this is now an invariant and wasn't before, it must be a giv
4952 with MULT_VAL == 0. It doesn't matter which BIV we associate this
4954 *src_reg = loop_iv_list->biv->dest_reg;
4955 *mult_val = const0_rtx;
4960 /* This is equivalent to a BIV. */
4962 *mult_val = const1_rtx;
4963 *add_val = const0_rtx;
4967 /* Either (plus (biv) (invar)) or
4968 (plus (mult (biv) (invar_1)) (invar_2)). */
4969 if (GET_CODE (XEXP (x, 0)) == MULT)
4971 *src_reg = XEXP (XEXP (x, 0), 0);
4972 *mult_val = XEXP (XEXP (x, 0), 1);
4976 *src_reg = XEXP (x, 0);
4977 *mult_val = const1_rtx;
4979 *add_val = XEXP (x, 1);
4983 /* ADD_VAL is zero. */
4984 *src_reg = XEXP (x, 0);
4985 *mult_val = XEXP (x, 1);
4986 *add_val = const0_rtx;
4993 /* Remove any enclosing USE from ADD_VAL and MULT_VAL (there will be
4994 unless they are CONST_INT). */
4995 if (GET_CODE (*add_val) == USE)
4996 *add_val = XEXP (*add_val, 0);
4997 if (GET_CODE (*mult_val) == USE)
4998 *mult_val = XEXP (*mult_val, 0);
5000 benefit += rtx_cost (orig_x, SET);
5002 /* Always return some benefit if this is a giv so it will be detected
5003 as such. This allows elimination of bivs that might otherwise
5004 not be eliminated. */
5005 return benefit == 0 ? 1 : benefit;
5008 /* Given an expression, X, try to form it as a linear function of a biv.
5009 We will canonicalize it to be of the form
5010 (plus (mult (BIV) (invar_1))
5012 with possible degeneracies.
5014 The invariant expressions must each be of a form that can be used as a
5015 machine operand. We surround then with a USE rtx (a hack, but localized
5016 and certainly unambiguous!) if not a CONST_INT for simplicity in this
5017 routine; it is the caller's responsibility to strip them.
5019 If no such canonicalization is possible (i.e., two biv's are used or an
5020 expression that is neither invariant nor a biv or giv), this routine
5023 For a non-zero return, the result will have a code of CONST_INT, USE,
5024 REG (for a BIV), PLUS, or MULT. No other codes will occur.
5026 *BENEFIT will be incremented by the benefit of any sub-giv encountered. */
5029 simplify_giv_expr (x, benefit)
5033 enum machine_mode mode = GET_MODE (x);
5037 /* If this is not an integer mode, or if we cannot do arithmetic in this
5038 mode, this can't be a giv. */
5039 if (mode != VOIDmode
5040 && (GET_MODE_CLASS (mode) != MODE_INT
5041 || GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT))
5044 switch (GET_CODE (x))
5047 arg0 = simplify_giv_expr (XEXP (x, 0), benefit);
5048 arg1 = simplify_giv_expr (XEXP (x, 1), benefit);
5049 if (arg0 == 0 || arg1 == 0)
5052 /* Put constant last, CONST_INT last if both constant. */
5053 if ((GET_CODE (arg0) == USE
5054 || GET_CODE (arg0) == CONST_INT)
5055 && GET_CODE (arg1) != CONST_INT)
5056 tem = arg0, arg0 = arg1, arg1 = tem;
5058 /* Handle addition of zero, then addition of an invariant. */
5059 if (arg1 == const0_rtx)
5061 else if (GET_CODE (arg1) == CONST_INT || GET_CODE (arg1) == USE)
5062 switch (GET_CODE (arg0))
5066 /* Both invariant. Only valid if sum is machine operand.
5067 First strip off possible USE on first operand. */
5068 if (GET_CODE (arg0) == USE)
5069 arg0 = XEXP (arg0, 0);
5072 if (CONSTANT_P (arg0) && GET_CODE (arg1) == CONST_INT)
5074 tem = plus_constant (arg0, INTVAL (arg1));
5075 if (GET_CODE (tem) != CONST_INT)
5076 tem = gen_rtx (USE, mode, tem);
5083 /* biv + invar or mult + invar. Return sum. */
5084 return gen_rtx (PLUS, mode, arg0, arg1);
5087 /* (a + invar_1) + invar_2. Associate. */
5088 return simplify_giv_expr (gen_rtx (PLUS, mode,
5090 gen_rtx (PLUS, mode,
5091 XEXP (arg0, 1), arg1)),
5098 /* Each argument must be either REG, PLUS, or MULT. Convert REG to
5099 MULT to reduce cases. */
5100 if (GET_CODE (arg0) == REG)
5101 arg0 = gen_rtx (MULT, mode, arg0, const1_rtx);
5102 if (GET_CODE (arg1) == REG)
5103 arg1 = gen_rtx (MULT, mode, arg1, const1_rtx);
5105 /* Now have PLUS + PLUS, PLUS + MULT, MULT + PLUS, or MULT + MULT.
5106 Put a MULT first, leaving PLUS + PLUS, MULT + PLUS, or MULT + MULT.
5107 Recurse to associate the second PLUS. */
5108 if (GET_CODE (arg1) == MULT)
5109 tem = arg0, arg0 = arg1, arg1 = tem;
5111 if (GET_CODE (arg1) == PLUS)
5112 return simplify_giv_expr (gen_rtx (PLUS, mode,
5113 gen_rtx (PLUS, mode,
5114 arg0, XEXP (arg1, 0)),
5118 /* Now must have MULT + MULT. Distribute if same biv, else not giv. */
5119 if (GET_CODE (arg0) != MULT || GET_CODE (arg1) != MULT)
5122 if (XEXP (arg0, 0) != XEXP (arg1, 0))
5125 return simplify_giv_expr (gen_rtx (MULT, mode,
5127 gen_rtx (PLUS, mode,
5133 /* Handle "a - b" as "a + b * (-1)". */
5134 return simplify_giv_expr (gen_rtx (PLUS, mode,
5136 gen_rtx (MULT, mode,
5137 XEXP (x, 1), constm1_rtx)),
5141 arg0 = simplify_giv_expr (XEXP (x, 0), benefit);
5142 arg1 = simplify_giv_expr (XEXP (x, 1), benefit);
5143 if (arg0 == 0 || arg1 == 0)
5146 /* Put constant last, CONST_INT last if both constant. */
5147 if ((GET_CODE (arg0) == USE || GET_CODE (arg0) == CONST_INT)
5148 && GET_CODE (arg1) != CONST_INT)
5149 tem = arg0, arg0 = arg1, arg1 = tem;
5151 /* If second argument is not now constant, not giv. */
5152 if (GET_CODE (arg1) != USE && GET_CODE (arg1) != CONST_INT)
5155 /* Handle multiply by 0 or 1. */
5156 if (arg1 == const0_rtx)
5159 else if (arg1 == const1_rtx)
5162 switch (GET_CODE (arg0))
5165 /* biv * invar. Done. */
5166 return gen_rtx (MULT, mode, arg0, arg1);
5169 /* Product of two constants. */
5170 return GEN_INT (INTVAL (arg0) * INTVAL (arg1));
5173 /* invar * invar. Not giv. */
5177 /* (a * invar_1) * invar_2. Associate. */
5178 return simplify_giv_expr (gen_rtx (MULT, mode,
5180 gen_rtx (MULT, mode,
5181 XEXP (arg0, 1), arg1)),
5185 /* (a + invar_1) * invar_2. Distribute. */
5186 return simplify_giv_expr (gen_rtx (PLUS, mode,
5187 gen_rtx (MULT, mode,
5188 XEXP (arg0, 0), arg1),
5189 gen_rtx (MULT, mode,
5190 XEXP (arg0, 1), arg1)),
5198 /* Shift by constant is multiply by power of two. */
5199 if (GET_CODE (XEXP (x, 1)) != CONST_INT)
5202 return simplify_giv_expr (gen_rtx (MULT, mode,
5204 GEN_INT ((HOST_WIDE_INT) 1
5205 << INTVAL (XEXP (x, 1)))),
5209 /* "-a" is "a * (-1)" */
5210 return simplify_giv_expr (gen_rtx (MULT, mode, XEXP (x, 0), constm1_rtx),
5214 /* "~a" is "-a - 1". Silly, but easy. */
5215 return simplify_giv_expr (gen_rtx (MINUS, mode,
5216 gen_rtx (NEG, mode, XEXP (x, 0)),
5221 /* Already in proper form for invariant. */
5225 /* If this is a new register, we can't deal with it. */
5226 if (REGNO (x) >= max_reg_before_loop)
5229 /* Check for biv or giv. */
5230 switch (reg_iv_type[REGNO (x)])
5234 case GENERAL_INDUCT:
5236 struct induction *v = reg_iv_info[REGNO (x)];
5238 /* Form expression from giv and add benefit. Ensure this giv
5239 can derive another and subtract any needed adjustment if so. */
5240 *benefit += v->benefit;
5244 tem = gen_rtx (PLUS, mode, gen_rtx (MULT, mode,
5245 v->src_reg, v->mult_val),
5247 if (v->derive_adjustment)
5248 tem = gen_rtx (MINUS, mode, tem, v->derive_adjustment);
5249 return simplify_giv_expr (tem, benefit);
5253 /* Fall through to general case. */
5255 /* If invariant, return as USE (unless CONST_INT).
5256 Otherwise, not giv. */
5257 if (GET_CODE (x) == USE)
5260 if (invariant_p (x) == 1)
5262 if (GET_CODE (x) == CONST_INT)
5265 return gen_rtx (USE, mode, x);
5272 /* Help detect a giv that is calculated by several consecutive insns;
5276 The caller has already identified the first insn P as having a giv as dest;
5277 we check that all other insns that set the same register follow
5278 immediately after P, that they alter nothing else,
5279 and that the result of the last is still a giv.
5281 The value is 0 if the reg set in P is not really a giv.
5282 Otherwise, the value is the amount gained by eliminating
5283 all the consecutive insns that compute the value.
5285 FIRST_BENEFIT is the amount gained by eliminating the first insn, P.
5286 SRC_REG is the reg of the biv; DEST_REG is the reg of the giv.
5288 The coefficients of the ultimate giv value are stored in
5289 *MULT_VAL and *ADD_VAL. */
5292 consec_sets_giv (first_benefit, p, src_reg, dest_reg,
5307 /* Indicate that this is a giv so that we can update the value produced in
5308 each insn of the multi-insn sequence.
5310 This induction structure will be used only by the call to
5311 general_induction_var below, so we can allocate it on our stack.
5312 If this is a giv, our caller will replace the induct var entry with
5313 a new induction structure. */
5315 = (struct induction *) alloca (sizeof (struct induction));
5316 v->src_reg = src_reg;
5317 v->mult_val = *mult_val;
5318 v->add_val = *add_val;
5319 v->benefit = first_benefit;
5321 v->derive_adjustment = 0;
5323 reg_iv_type[REGNO (dest_reg)] = GENERAL_INDUCT;
5324 reg_iv_info[REGNO (dest_reg)] = v;
5326 count = n_times_set[REGNO (dest_reg)] - 1;
5331 code = GET_CODE (p);
5333 /* If libcall, skip to end of call sequence. */
5334 if (code == INSN && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
5338 && (set = single_set (p))
5339 && GET_CODE (SET_DEST (set)) == REG
5340 && SET_DEST (set) == dest_reg
5341 && ((benefit = general_induction_var (SET_SRC (set), &src_reg,
5343 /* Giv created by equivalent expression. */
5344 || ((temp = find_reg_note (p, REG_EQUAL, NULL_RTX))
5345 && (benefit = general_induction_var (XEXP (temp, 0), &src_reg,
5346 add_val, mult_val))))
5347 && src_reg == v->src_reg)
5349 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
5350 benefit += libcall_benefit (p);
5353 v->mult_val = *mult_val;
5354 v->add_val = *add_val;
5355 v->benefit = benefit;
5357 else if (code != NOTE)
5359 /* Allow insns that set something other than this giv to a
5360 constant. Such insns are needed on machines which cannot
5361 include long constants and should not disqualify a giv. */
5363 && (set = single_set (p))
5364 && SET_DEST (set) != dest_reg
5365 && CONSTANT_P (SET_SRC (set)))
5368 reg_iv_type[REGNO (dest_reg)] = UNKNOWN_INDUCT;
5376 /* Return an rtx, if any, that expresses giv G2 as a function of the register
5377 represented by G1. If no such expression can be found, or it is clear that
5378 it cannot possibly be a valid address, 0 is returned.
5380 To perform the computation, we note that
5383 where `v' is the biv.
5385 So G2 = (c/a) * G1 + (d - b*c/a) */
5389 express_from (g1, g2)
5390 struct induction *g1, *g2;
5394 /* The value that G1 will be multiplied by must be a constant integer. Also,
5395 the only chance we have of getting a valid address is if b*c/a (see above
5396 for notation) is also an integer. */
5397 if (GET_CODE (g1->mult_val) != CONST_INT
5398 || GET_CODE (g2->mult_val) != CONST_INT
5399 || GET_CODE (g1->add_val) != CONST_INT
5400 || g1->mult_val == const0_rtx
5401 || INTVAL (g2->mult_val) % INTVAL (g1->mult_val) != 0)
5404 mult = GEN_INT (INTVAL (g2->mult_val) / INTVAL (g1->mult_val));
5405 add = plus_constant (g2->add_val, - INTVAL (g1->add_val) * INTVAL (mult));
5407 /* Form simplified final result. */
5408 if (mult == const0_rtx)
5410 else if (mult == const1_rtx)
5411 mult = g1->dest_reg;
5413 mult = gen_rtx (MULT, g2->mode, g1->dest_reg, mult);
5415 if (add == const0_rtx)
5418 return gen_rtx (PLUS, g2->mode, mult, add);
5422 /* Return 1 if giv G2 can be combined with G1. This means that G2 can use
5423 (either directly or via an address expression) a register used to represent
5424 G1. Set g2->new_reg to a represtation of G1 (normally just
5428 combine_givs_p (g1, g2)
5429 struct induction *g1, *g2;
5433 /* If these givs are identical, they can be combined. */
5434 if (rtx_equal_p (g1->mult_val, g2->mult_val)
5435 && rtx_equal_p (g1->add_val, g2->add_val))
5437 g2->new_reg = g1->dest_reg;
5442 /* If G2 can be expressed as a function of G1 and that function is valid
5443 as an address and no more expensive than using a register for G2,
5444 the expression of G2 in terms of G1 can be used. */
5445 if (g2->giv_type == DEST_ADDR
5446 && (tem = express_from (g1, g2)) != 0
5447 && memory_address_p (g2->mem_mode, tem)
5448 && ADDRESS_COST (tem) <= ADDRESS_COST (*g2->location))
5458 /* Check all pairs of givs for iv_class BL and see if any can be combined with
5459 any other. If so, point SAME to the giv combined with and set NEW_REG to
5460 be an expression (in terms of the other giv's DEST_REG) equivalent to the
5461 giv. Also, update BENEFIT and related fields for cost/benefit analysis. */
5465 struct iv_class *bl;
5467 struct induction *g1, *g2;
5470 for (g1 = bl->giv; g1; g1 = g1->next_iv)
5471 for (pass = 0; pass <= 1; pass++)
5472 for (g2 = bl->giv; g2; g2 = g2->next_iv)
5474 /* First try to combine with replaceable givs, then all givs. */
5475 && (g1->replaceable || pass == 1)
5476 /* If either has already been combined or is to be ignored, can't
5478 && ! g1->ignore && ! g2->ignore && ! g1->same && ! g2->same
5479 /* If something has been based on G2, G2 cannot itself be based
5480 on something else. */
5481 && ! g2->combined_with
5482 && combine_givs_p (g1, g2))
5484 /* g2->new_reg set by `combine_givs_p' */
5486 g1->combined_with = 1;
5487 g1->benefit += g2->benefit;
5488 /* ??? The new final_[bg]iv_value code does a much better job
5489 of finding replaceable giv's, and hence this code may no
5490 longer be necessary. */
5491 if (! g2->replaceable && REG_USERVAR_P (g2->dest_reg))
5492 g1->benefit -= copy_cost;
5493 g1->lifetime += g2->lifetime;
5494 g1->times_used += g2->times_used;
5496 if (loop_dump_stream)
5497 fprintf (loop_dump_stream, "giv at %d combined with giv at %d\n",
5498 INSN_UID (g2->insn), INSN_UID (g1->insn));
5502 /* EMIT code before INSERT_BEFORE to set REG = B * M + A. */
5505 emit_iv_add_mult (b, m, a, reg, insert_before)
5506 rtx b; /* initial value of basic induction variable */
5507 rtx m; /* multiplicative constant */
5508 rtx a; /* additive constant */
5509 rtx reg; /* destination register */
5515 /* Prevent unexpected sharing of these rtx. */
5519 /* Increase the lifetime of any invariants moved further in code. */
5520 update_reg_last_use (a, insert_before);
5521 update_reg_last_use (b, insert_before);
5522 update_reg_last_use (m, insert_before);
5525 result = expand_mult_add (b, reg, m, a, GET_MODE (reg), 0);
5527 emit_move_insn (reg, result);
5528 seq = gen_sequence ();
5531 emit_insn_before (seq, insert_before);
5534 /* Test whether A * B can be computed without
5535 an actual multiply insn. Value is 1 if so. */
5538 product_cheap_p (a, b)
5544 struct obstack *old_rtl_obstack = rtl_obstack;
5545 char *storage = (char *) obstack_alloc (&temp_obstack, 0);
5548 /* If only one is constant, make it B. */
5549 if (GET_CODE (a) == CONST_INT)
5550 tmp = a, a = b, b = tmp;
5552 /* If first constant, both constant, so don't need multiply. */
5553 if (GET_CODE (a) == CONST_INT)
5556 /* If second not constant, neither is constant, so would need multiply. */
5557 if (GET_CODE (b) != CONST_INT)
5560 /* One operand is constant, so might not need multiply insn. Generate the
5561 code for the multiply and see if a call or multiply, or long sequence
5562 of insns is generated. */
5564 rtl_obstack = &temp_obstack;
5566 expand_mult (GET_MODE (a), a, b, NULL_RTX, 0);
5567 tmp = gen_sequence ();
5570 if (GET_CODE (tmp) == SEQUENCE)
5572 if (XVEC (tmp, 0) == 0)
5574 else if (XVECLEN (tmp, 0) > 3)
5577 for (i = 0; i < XVECLEN (tmp, 0); i++)
5579 rtx insn = XVECEXP (tmp, 0, i);
5581 if (GET_CODE (insn) != INSN
5582 || (GET_CODE (PATTERN (insn)) == SET
5583 && GET_CODE (SET_SRC (PATTERN (insn))) == MULT)
5584 || (GET_CODE (PATTERN (insn)) == PARALLEL
5585 && GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == SET
5586 && GET_CODE (SET_SRC (XVECEXP (PATTERN (insn), 0, 0))) == MULT))
5593 else if (GET_CODE (tmp) == SET
5594 && GET_CODE (SET_SRC (tmp)) == MULT)
5596 else if (GET_CODE (tmp) == PARALLEL
5597 && GET_CODE (XVECEXP (tmp, 0, 0)) == SET
5598 && GET_CODE (SET_SRC (XVECEXP (tmp, 0, 0))) == MULT)
5601 /* Free any storage we obtained in generating this multiply and restore rtl
5602 allocation to its normal obstack. */
5603 obstack_free (&temp_obstack, storage);
5604 rtl_obstack = old_rtl_obstack;
5609 /* Check to see if loop can be terminated by a "decrement and branch until
5610 zero" instruction. If so, add a REG_NONNEG note to the branch insn if so.
5611 Also try reversing an increment loop to a decrement loop
5612 to see if the optimization can be performed.
5613 Value is nonzero if optimization was performed. */
5615 /* This is useful even if the architecture doesn't have such an insn,
5616 because it might change a loops which increments from 0 to n to a loop
5617 which decrements from n to 0. A loop that decrements to zero is usually
5618 faster than one that increments from zero. */
5620 /* ??? This could be rewritten to use some of the loop unrolling procedures,
5621 such as approx_final_value, biv_total_increment, loop_iterations, and
5622 final_[bg]iv_value. */
5625 check_dbra_loop (loop_end, insn_count, loop_start)
5630 struct iv_class *bl;
5637 rtx before_comparison;
5640 /* If last insn is a conditional branch, and the insn before tests a
5641 register value, try to optimize it. Otherwise, we can't do anything. */
5643 comparison = get_condition_for_loop (PREV_INSN (loop_end));
5644 if (comparison == 0)
5647 /* Check all of the bivs to see if the compare uses one of them.
5648 Skip biv's set more than once because we can't guarantee that
5649 it will be zero on the last iteration. Also skip if the biv is
5650 used between its update and the test insn. */
5652 for (bl = loop_iv_list; bl; bl = bl->next)
5654 if (bl->biv_count == 1
5655 && bl->biv->dest_reg == XEXP (comparison, 0)
5656 && ! reg_used_between_p (regno_reg_rtx[bl->regno], bl->biv->insn,
5657 PREV_INSN (PREV_INSN (loop_end))))
5664 /* Look for the case where the basic induction variable is always
5665 nonnegative, and equals zero on the last iteration.
5666 In this case, add a reg_note REG_NONNEG, which allows the
5667 m68k DBRA instruction to be used. */
5669 if (((GET_CODE (comparison) == GT
5670 && GET_CODE (XEXP (comparison, 1)) == CONST_INT
5671 && INTVAL (XEXP (comparison, 1)) == -1)
5672 || (GET_CODE (comparison) == NE && XEXP (comparison, 1) == const0_rtx))
5673 && GET_CODE (bl->biv->add_val) == CONST_INT
5674 && INTVAL (bl->biv->add_val) < 0)
5676 /* Initial value must be greater than 0,
5677 init_val % -dec_value == 0 to ensure that it equals zero on
5678 the last iteration */
5680 if (GET_CODE (bl->initial_value) == CONST_INT
5681 && INTVAL (bl->initial_value) > 0
5682 && (INTVAL (bl->initial_value) %
5683 (-INTVAL (bl->biv->add_val))) == 0)
5685 /* register always nonnegative, add REG_NOTE to branch */
5686 REG_NOTES (PREV_INSN (loop_end))
5687 = gen_rtx (EXPR_LIST, REG_NONNEG, NULL_RTX,
5688 REG_NOTES (PREV_INSN (loop_end)));
5694 /* If the decrement is 1 and the value was tested as >= 0 before
5695 the loop, then we can safely optimize. */
5696 for (p = loop_start; p; p = PREV_INSN (p))
5698 if (GET_CODE (p) == CODE_LABEL)
5700 if (GET_CODE (p) != JUMP_INSN)
5703 before_comparison = get_condition_for_loop (p);
5704 if (before_comparison
5705 && XEXP (before_comparison, 0) == bl->biv->dest_reg
5706 && GET_CODE (before_comparison) == LT
5707 && XEXP (before_comparison, 1) == const0_rtx
5708 && ! reg_set_between_p (bl->biv->dest_reg, p, loop_start)
5709 && INTVAL (bl->biv->add_val) == -1)
5711 REG_NOTES (PREV_INSN (loop_end))
5712 = gen_rtx (EXPR_LIST, REG_NONNEG, NULL_RTX,
5713 REG_NOTES (PREV_INSN (loop_end)));
5720 else if (num_mem_sets <= 1)
5722 /* Try to change inc to dec, so can apply above optimization. */
5724 all registers modified are induction variables or invariant,
5725 all memory references have non-overlapping addresses
5726 (obviously true if only one write)
5727 allow 2 insns for the compare/jump at the end of the loop. */
5728 int num_nonfixed_reads = 0;
5729 /* 1 if the iteration var is used only to count iterations. */
5730 int no_use_except_counting = 0;
5731 /* 1 if the loop has no memory store, or it has a single memory store
5732 which is reversible. */
5733 int reversible_mem_store = 1;
5735 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
5736 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
5737 num_nonfixed_reads += count_nonfixed_reads (PATTERN (p));
5739 if (bl->giv_count == 0
5740 && ! loop_number_exit_labels[uid_loop_num[INSN_UID (loop_start)]])
5742 rtx bivreg = regno_reg_rtx[bl->regno];
5744 /* If there are no givs for this biv, and the only exit is the
5745 fall through at the end of the the loop, then
5746 see if perhaps there are no uses except to count. */
5747 no_use_except_counting = 1;
5748 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
5749 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
5751 rtx set = single_set (p);
5753 if (set && GET_CODE (SET_DEST (set)) == REG
5754 && REGNO (SET_DEST (set)) == bl->regno)
5755 /* An insn that sets the biv is okay. */
5757 else if (p == prev_nonnote_insn (prev_nonnote_insn (loop_end))
5758 || p == prev_nonnote_insn (loop_end))
5759 /* Don't bother about the end test. */
5761 else if (reg_mentioned_p (bivreg, PATTERN (p)))
5762 /* Any other use of the biv is no good. */
5764 no_use_except_counting = 0;
5770 /* If the loop has a single store, and the destination address is
5771 invariant, then we can't reverse the loop, because this address
5772 might then have the wrong value at loop exit.
5773 This would work if the source was invariant also, however, in that
5774 case, the insn should have been moved out of the loop. */
5776 if (num_mem_sets == 1)
5777 reversible_mem_store
5778 = (! unknown_address_altered
5779 && ! invariant_p (XEXP (loop_store_mems[0], 0)));
5781 /* This code only acts for innermost loops. Also it simplifies
5782 the memory address check by only reversing loops with
5783 zero or one memory access.
5784 Two memory accesses could involve parts of the same array,
5785 and that can't be reversed. */
5787 if (num_nonfixed_reads <= 1
5789 && !loop_has_volatile
5790 && reversible_mem_store
5791 && (no_use_except_counting
5792 || (bl->giv_count + bl->biv_count + num_mem_sets
5793 + num_movables + 2 == insn_count)))
5797 /* Loop can be reversed. */
5798 if (loop_dump_stream)
5799 fprintf (loop_dump_stream, "Can reverse loop\n");
5801 /* Now check other conditions:
5802 initial_value must be zero,
5803 final_value % add_val == 0, so that when reversed, the
5804 biv will be zero on the last iteration.
5806 This test can probably be improved since +/- 1 in the constant
5807 can be obtained by changing LT to LE and vice versa; this is
5810 if (comparison && bl->initial_value == const0_rtx
5811 && GET_CODE (XEXP (comparison, 1)) == CONST_INT
5812 /* LE gets turned into LT */
5813 && GET_CODE (comparison) == LT
5814 && (INTVAL (XEXP (comparison, 1))
5815 % INTVAL (bl->biv->add_val)) == 0)
5817 /* Register will always be nonnegative, with value
5818 0 on last iteration if loop reversed */
5820 /* Save some info needed to produce the new insns. */
5821 reg = bl->biv->dest_reg;
5822 jump_label = XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end))), 1);
5823 new_add_val = GEN_INT (- INTVAL (bl->biv->add_val));
5825 final_value = XEXP (comparison, 1);
5826 start_value = GEN_INT (INTVAL (XEXP (comparison, 1))
5827 - INTVAL (bl->biv->add_val));
5829 /* Initialize biv to start_value before loop start.
5830 The old initializing insn will be deleted as a
5831 dead store by flow.c. */
5832 emit_insn_before (gen_move_insn (reg, start_value), loop_start);
5834 /* Add insn to decrement register, and delete insn
5835 that incremented the register. */
5836 p = emit_insn_before (gen_add2_insn (reg, new_add_val),
5838 delete_insn (bl->biv->insn);
5840 /* Update biv info to reflect its new status. */
5842 bl->initial_value = start_value;
5843 bl->biv->add_val = new_add_val;
5845 /* Inc LABEL_NUSES so that delete_insn will
5846 not delete the label. */
5847 LABEL_NUSES (XEXP (jump_label, 0)) ++;
5849 /* Emit an insn after the end of the loop to set the biv's
5850 proper exit value if it is used anywhere outside the loop. */
5851 if ((regno_last_uid[bl->regno]
5852 != INSN_UID (PREV_INSN (PREV_INSN (loop_end))))
5854 || regno_first_uid[bl->regno] != INSN_UID (bl->init_insn))
5855 emit_insn_after (gen_move_insn (reg, final_value),
5858 /* Delete compare/branch at end of loop. */
5859 delete_insn (PREV_INSN (loop_end));
5860 delete_insn (PREV_INSN (loop_end));
5862 /* Add new compare/branch insn at end of loop. */
5864 emit_cmp_insn (reg, const0_rtx, GE, NULL_RTX,
5865 GET_MODE (reg), 0, 0);
5866 emit_jump_insn (gen_bge (XEXP (jump_label, 0)));
5867 tem = gen_sequence ();
5869 emit_jump_insn_before (tem, loop_end);
5871 for (tem = PREV_INSN (loop_end);
5872 tem && GET_CODE (tem) != JUMP_INSN; tem = PREV_INSN (tem))
5876 JUMP_LABEL (tem) = XEXP (jump_label, 0);
5878 /* Increment of LABEL_NUSES done above. */
5879 /* Register is now always nonnegative,
5880 so add REG_NONNEG note to the branch. */
5881 REG_NOTES (tem) = gen_rtx (EXPR_LIST, REG_NONNEG, NULL_RTX,
5887 /* Mark that this biv has been reversed. Each giv which depends
5888 on this biv, and which is also live past the end of the loop
5889 will have to be fixed up. */
5893 if (loop_dump_stream)
5894 fprintf (loop_dump_stream,
5895 "Reversed loop and added reg_nonneg\n");
5905 /* Verify whether the biv BL appears to be eliminable,
5906 based on the insns in the loop that refer to it.
5907 LOOP_START is the first insn of the loop, and END is the end insn.
5909 If ELIMINATE_P is non-zero, actually do the elimination.
5911 THRESHOLD and INSN_COUNT are from loop_optimize and are used to
5912 determine whether invariant insns should be placed inside or at the
5913 start of the loop. */
5916 maybe_eliminate_biv (bl, loop_start, end, eliminate_p, threshold, insn_count)
5917 struct iv_class *bl;
5921 int threshold, insn_count;
5923 rtx reg = bl->biv->dest_reg;
5926 /* Scan all insns in the loop, stopping if we find one that uses the
5927 biv in a way that we cannot eliminate. */
5929 for (p = loop_start; p != end; p = NEXT_INSN (p))
5931 enum rtx_code code = GET_CODE (p);
5932 rtx where = threshold >= insn_count ? loop_start : p;
5934 if ((code == INSN || code == JUMP_INSN || code == CALL_INSN)
5935 && reg_mentioned_p (reg, PATTERN (p))
5936 && ! maybe_eliminate_biv_1 (PATTERN (p), p, bl, eliminate_p, where))
5938 if (loop_dump_stream)
5939 fprintf (loop_dump_stream,
5940 "Cannot eliminate biv %d: biv used in insn %d.\n",
5941 bl->regno, INSN_UID (p));
5948 if (loop_dump_stream)
5949 fprintf (loop_dump_stream, "biv %d %s eliminated.\n",
5950 bl->regno, eliminate_p ? "was" : "can be");
5957 /* If BL appears in X (part of the pattern of INSN), see if we can
5958 eliminate its use. If so, return 1. If not, return 0.
5960 If BIV does not appear in X, return 1.
5962 If ELIMINATE_P is non-zero, actually do the elimination. WHERE indicates
5963 where extra insns should be added. Depending on how many items have been
5964 moved out of the loop, it will either be before INSN or at the start of
5968 maybe_eliminate_biv_1 (x, insn, bl, eliminate_p, where)
5970 struct iv_class *bl;
5974 enum rtx_code code = GET_CODE (x);
5975 rtx reg = bl->biv->dest_reg;
5976 enum machine_mode mode = GET_MODE (reg);
5977 struct induction *v;
5986 /* If we haven't already been able to do something with this BIV,
5987 we can't eliminate it. */
5993 /* If this sets the BIV, it is not a problem. */
5994 if (SET_DEST (x) == reg)
5997 /* If this is an insn that defines a giv, it is also ok because
5998 it will go away when the giv is reduced. */
5999 for (v = bl->giv; v; v = v->next_iv)
6000 if (v->giv_type == DEST_REG && SET_DEST (x) == v->dest_reg)
6004 if (SET_DEST (x) == cc0_rtx && SET_SRC (x) == reg)
6006 /* Can replace with any giv that was reduced and
6007 that has (MULT_VAL != 0) and (ADD_VAL == 0).
6008 Require a constant for MULT_VAL, so we know it's nonzero. */
6010 for (v = bl->giv; v; v = v->next_iv)
6011 if (CONSTANT_P (v->mult_val) && v->mult_val != const0_rtx
6012 && v->add_val == const0_rtx
6013 && ! v->ignore && ! v->maybe_dead && v->always_computable
6019 /* If the giv has the opposite direction of change,
6020 then reverse the comparison. */
6021 if (INTVAL (v->mult_val) < 0)
6022 new = gen_rtx (COMPARE, GET_MODE (v->new_reg),
6023 const0_rtx, v->new_reg);
6027 /* We can probably test that giv's reduced reg. */
6028 if (validate_change (insn, &SET_SRC (x), new, 0))
6032 /* Look for a giv with (MULT_VAL != 0) and (ADD_VAL != 0);
6033 replace test insn with a compare insn (cmp REDUCED_GIV ADD_VAL).
6034 Require a constant for MULT_VAL, so we know it's nonzero. */
6036 for (v = bl->giv; v; v = v->next_iv)
6037 if (CONSTANT_P (v->mult_val) && v->mult_val != const0_rtx
6038 && ! v->ignore && ! v->maybe_dead && v->always_computable
6044 /* If the giv has the opposite direction of change,
6045 then reverse the comparison. */
6046 if (INTVAL (v->mult_val) < 0)
6047 new = gen_rtx (COMPARE, VOIDmode, copy_rtx (v->add_val),
6050 new = gen_rtx (COMPARE, VOIDmode, v->new_reg,
6051 copy_rtx (v->add_val));
6053 /* Replace biv with the giv's reduced register. */
6054 update_reg_last_use (v->add_val, insn);
6055 if (validate_change (insn, &SET_SRC (PATTERN (insn)), new, 0))
6058 /* Insn doesn't support that constant or invariant. Copy it
6059 into a register (it will be a loop invariant.) */
6060 tem = gen_reg_rtx (GET_MODE (v->new_reg));
6062 emit_insn_before (gen_move_insn (tem, copy_rtx (v->add_val)),
6065 if (validate_change (insn, &SET_SRC (PATTERN (insn)),
6066 gen_rtx (COMPARE, VOIDmode,
6067 v->new_reg, tem), 0))
6076 case GT: case GE: case GTU: case GEU:
6077 case LT: case LE: case LTU: case LEU:
6078 /* See if either argument is the biv. */
6079 if (XEXP (x, 0) == reg)
6080 arg = XEXP (x, 1), arg_operand = 1;
6081 else if (XEXP (x, 1) == reg)
6082 arg = XEXP (x, 0), arg_operand = 0;
6086 if (CONSTANT_P (arg))
6088 /* First try to replace with any giv that has constant positive
6089 mult_val and constant add_val. We might be able to support
6090 negative mult_val, but it seems complex to do it in general. */
6092 for (v = bl->giv; v; v = v->next_iv)
6093 if (CONSTANT_P (v->mult_val) && INTVAL (v->mult_val) > 0
6094 && CONSTANT_P (v->add_val)
6095 && ! v->ignore && ! v->maybe_dead && v->always_computable
6101 /* Replace biv with the giv's reduced reg. */
6102 XEXP (x, 1-arg_operand) = v->new_reg;
6104 /* If all constants are actually constant integers and
6105 the derived constant can be directly placed in the COMPARE,
6107 if (GET_CODE (arg) == CONST_INT
6108 && GET_CODE (v->mult_val) == CONST_INT
6109 && GET_CODE (v->add_val) == CONST_INT
6110 && validate_change (insn, &XEXP (x, arg_operand),
6111 GEN_INT (INTVAL (arg)
6112 * INTVAL (v->mult_val)
6113 + INTVAL (v->add_val)), 0))
6116 /* Otherwise, load it into a register. */
6117 tem = gen_reg_rtx (mode);
6118 emit_iv_add_mult (arg, v->mult_val, v->add_val, tem, where);
6119 if (validate_change (insn, &XEXP (x, arg_operand), tem, 0))
6122 /* If that failed, put back the change we made above. */
6123 XEXP (x, 1-arg_operand) = reg;
6126 /* Look for giv with positive constant mult_val and nonconst add_val.
6127 Insert insns to calculate new compare value. */
6129 for (v = bl->giv; v; v = v->next_iv)
6130 if (CONSTANT_P (v->mult_val) && INTVAL (v->mult_val) > 0
6131 && ! v->ignore && ! v->maybe_dead && v->always_computable
6139 tem = gen_reg_rtx (mode);
6141 /* Replace biv with giv's reduced register. */
6142 validate_change (insn, &XEXP (x, 1 - arg_operand),
6145 /* Compute value to compare against. */
6146 emit_iv_add_mult (arg, v->mult_val, v->add_val, tem, where);
6147 /* Use it in this insn. */
6148 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
6149 if (apply_change_group ())
6153 else if (GET_CODE (arg) == REG || GET_CODE (arg) == MEM)
6155 if (invariant_p (arg) == 1)
6157 /* Look for giv with constant positive mult_val and nonconst
6158 add_val. Insert insns to compute new compare value. */
6160 for (v = bl->giv; v; v = v->next_iv)
6161 if (CONSTANT_P (v->mult_val) && INTVAL (v->mult_val) > 0
6162 && ! v->ignore && ! v->maybe_dead && v->always_computable
6170 tem = gen_reg_rtx (mode);
6172 /* Replace biv with giv's reduced register. */
6173 validate_change (insn, &XEXP (x, 1 - arg_operand),
6176 /* Compute value to compare against. */
6177 emit_iv_add_mult (arg, v->mult_val, v->add_val,
6179 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
6180 if (apply_change_group ())
6185 /* This code has problems. Basically, you can't know when
6186 seeing if we will eliminate BL, whether a particular giv
6187 of ARG will be reduced. If it isn't going to be reduced,
6188 we can't eliminate BL. We can try forcing it to be reduced,
6189 but that can generate poor code.
6191 The problem is that the benefit of reducing TV, below should
6192 be increased if BL can actually be eliminated, but this means
6193 we might have to do a topological sort of the order in which
6194 we try to process biv. It doesn't seem worthwhile to do
6195 this sort of thing now. */
6198 /* Otherwise the reg compared with had better be a biv. */
6199 if (GET_CODE (arg) != REG
6200 || reg_iv_type[REGNO (arg)] != BASIC_INDUCT)
6203 /* Look for a pair of givs, one for each biv,
6204 with identical coefficients. */
6205 for (v = bl->giv; v; v = v->next_iv)
6207 struct induction *tv;
6209 if (v->ignore || v->maybe_dead || v->mode != mode)
6212 for (tv = reg_biv_class[REGNO (arg)]->giv; tv; tv = tv->next_iv)
6213 if (! tv->ignore && ! tv->maybe_dead
6214 && rtx_equal_p (tv->mult_val, v->mult_val)
6215 && rtx_equal_p (tv->add_val, v->add_val)
6216 && tv->mode == mode)
6221 /* Replace biv with its giv's reduced reg. */
6222 XEXP (x, 1-arg_operand) = v->new_reg;
6223 /* Replace other operand with the other giv's
6225 XEXP (x, arg_operand) = tv->new_reg;
6232 /* If we get here, the biv can't be eliminated. */
6236 /* If this address is a DEST_ADDR giv, it doesn't matter if the
6237 biv is used in it, since it will be replaced. */
6238 for (v = bl->giv; v; v = v->next_iv)
6239 if (v->giv_type == DEST_ADDR && v->location == &XEXP (x, 0))
6244 /* See if any subexpression fails elimination. */
6245 fmt = GET_RTX_FORMAT (code);
6246 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6251 if (! maybe_eliminate_biv_1 (XEXP (x, i), insn, bl,
6252 eliminate_p, where))
6257 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6258 if (! maybe_eliminate_biv_1 (XVECEXP (x, i, j), insn, bl,
6259 eliminate_p, where))
6268 /* Return nonzero if the last use of REG
6269 is in an insn following INSN in the same basic block. */
6272 last_use_this_basic_block (reg, insn)
6278 n && GET_CODE (n) != CODE_LABEL && GET_CODE (n) != JUMP_INSN;
6281 if (regno_last_uid[REGNO (reg)] == INSN_UID (n))
6287 /* Called via `note_stores' to record the initial value of a biv. Here we
6288 just record the location of the set and process it later. */
6291 record_initial (dest, set)
6295 struct iv_class *bl;
6297 if (GET_CODE (dest) != REG
6298 || REGNO (dest) >= max_reg_before_loop
6299 || reg_iv_type[REGNO (dest)] != BASIC_INDUCT)
6302 bl = reg_biv_class[REGNO (dest)];
6304 /* If this is the first set found, record it. */
6305 if (bl->init_insn == 0)
6307 bl->init_insn = note_insn;
6312 /* If any of the registers in X are "old" and currently have a last use earlier
6313 than INSN, update them to have a last use of INSN. Their actual last use
6314 will be the previous insn but it will not have a valid uid_luid so we can't
6318 update_reg_last_use (x, insn)
6322 /* Check for the case where INSN does not have a valid luid. In this case,
6323 there is no need to modify the regno_last_uid, as this can only happen
6324 when code is inserted after the loop_end to set a pseudo's final value,
6325 and hence this insn will never be the last use of x. */
6326 if (GET_CODE (x) == REG && REGNO (x) < max_reg_before_loop
6327 && INSN_UID (insn) < max_uid_for_loop
6328 && uid_luid[regno_last_uid[REGNO (x)]] < uid_luid[INSN_UID (insn)])
6329 regno_last_uid[REGNO (x)] = INSN_UID (insn);
6333 register char *fmt = GET_RTX_FORMAT (GET_CODE (x));
6334 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
6337 update_reg_last_use (XEXP (x, i), insn);
6338 else if (fmt[i] == 'E')
6339 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6340 update_reg_last_use (XVECEXP (x, i, j), insn);
6345 /* Given a jump insn JUMP, return the condition that will cause it to branch
6346 to its JUMP_LABEL. If the condition cannot be understood, or is an
6347 inequality floating-point comparison which needs to be reversed, 0 will
6350 If EARLIEST is non-zero, it is a pointer to a place where the earliest
6351 insn used in locating the condition was found. If a replacement test
6352 of the condition is desired, it should be placed in front of that
6353 insn and we will be sure that the inputs are still valid.
6355 The condition will be returned in a canonical form to simplify testing by
6356 callers. Specifically:
6358 (1) The code will always be a comparison operation (EQ, NE, GT, etc.).
6359 (2) Both operands will be machine operands; (cc0) will have been replaced.
6360 (3) If an operand is a constant, it will be the second operand.
6361 (4) (LE x const) will be replaced with (LT x <const+1>) and similarly
6362 for GE, GEU, and LEU. */
6365 get_condition (jump, earliest)
6374 int reverse_code = 0;
6375 int did_reverse_condition = 0;
6377 /* If this is not a standard conditional jump, we can't parse it. */
6378 if (GET_CODE (jump) != JUMP_INSN
6379 || ! condjump_p (jump) || simplejump_p (jump))
6382 code = GET_CODE (XEXP (SET_SRC (PATTERN (jump)), 0));
6383 op0 = XEXP (XEXP (SET_SRC (PATTERN (jump)), 0), 0);
6384 op1 = XEXP (XEXP (SET_SRC (PATTERN (jump)), 0), 1);
6389 /* If this branches to JUMP_LABEL when the condition is false, reverse
6391 if (GET_CODE (XEXP (SET_SRC (PATTERN (jump)), 2)) == LABEL_REF
6392 && XEXP (XEXP (SET_SRC (PATTERN (jump)), 2), 0) == JUMP_LABEL (jump))
6393 code = reverse_condition (code), did_reverse_condition ^= 1;
6395 /* If we are comparing a register with zero, see if the register is set
6396 in the previous insn to a COMPARE or a comparison operation. Perform
6397 the same tests as a function of STORE_FLAG_VALUE as find_comparison_args
6400 while (GET_RTX_CLASS (code) == '<' && op1 == const0_rtx)
6402 /* Set non-zero when we find something of interest. */
6406 /* If comparison with cc0, import actual comparison from compare
6410 if ((prev = prev_nonnote_insn (prev)) == 0
6411 || GET_CODE (prev) != INSN
6412 || (set = single_set (prev)) == 0
6413 || SET_DEST (set) != cc0_rtx)
6416 op0 = SET_SRC (set);
6417 op1 = CONST0_RTX (GET_MODE (op0));
6423 /* If this is a COMPARE, pick up the two things being compared. */
6424 if (GET_CODE (op0) == COMPARE)
6426 op1 = XEXP (op0, 1);
6427 op0 = XEXP (op0, 0);
6430 else if (GET_CODE (op0) != REG)
6433 /* Go back to the previous insn. Stop if it is not an INSN. We also
6434 stop if it isn't a single set or if it has a REG_INC note because
6435 we don't want to bother dealing with it. */
6437 if ((prev = prev_nonnote_insn (prev)) == 0
6438 || GET_CODE (prev) != INSN
6439 || FIND_REG_INC_NOTE (prev, 0)
6440 || (set = single_set (prev)) == 0)
6443 /* If this is setting OP0, get what it sets it to if it looks
6445 if (SET_DEST (set) == op0)
6447 enum machine_mode inner_mode = GET_MODE (SET_SRC (set));
6449 if ((GET_CODE (SET_SRC (set)) == COMPARE
6452 && GET_MODE_CLASS (inner_mode) == MODE_INT
6453 && (GET_MODE_BITSIZE (inner_mode)
6454 <= HOST_BITS_PER_WIDE_INT)
6455 && (STORE_FLAG_VALUE
6456 & ((HOST_WIDE_INT) 1
6457 << (GET_MODE_BITSIZE (inner_mode) - 1))))
6458 #ifdef FLOAT_STORE_FLAG_VALUE
6460 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
6461 && FLOAT_STORE_FLAG_VALUE < 0)
6464 && GET_RTX_CLASS (GET_CODE (SET_SRC (set))) == '<')))
6466 else if (((code == EQ
6468 && (GET_MODE_BITSIZE (inner_mode)
6469 <= HOST_BITS_PER_WIDE_INT)
6470 && GET_MODE_CLASS (inner_mode) == MODE_INT
6471 && (STORE_FLAG_VALUE
6472 & ((HOST_WIDE_INT) 1
6473 << (GET_MODE_BITSIZE (inner_mode) - 1))))
6474 #ifdef FLOAT_STORE_FLAG_VALUE
6476 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
6477 && FLOAT_STORE_FLAG_VALUE < 0)
6480 && GET_RTX_CLASS (GET_CODE (SET_SRC (set))) == '<')
6482 /* We might have reversed a LT to get a GE here. But this wasn't
6483 actually the comparison of data, so we don't flag that we
6484 have had to reverse the condition. */
6485 did_reverse_condition ^= 1;
6493 else if (reg_set_p (op0, prev))
6494 /* If this sets OP0, but not directly, we have to give up. */
6499 if (GET_RTX_CLASS (GET_CODE (x)) == '<')
6500 code = GET_CODE (x);
6503 code = reverse_condition (code);
6504 did_reverse_condition ^= 1;
6508 op0 = XEXP (x, 0), op1 = XEXP (x, 1);
6514 /* If constant is first, put it last. */
6515 if (CONSTANT_P (op0))
6516 code = swap_condition (code), tem = op0, op0 = op1, op1 = tem;
6518 /* If OP0 is the result of a comparison, we weren't able to find what
6519 was really being compared, so fail. */
6520 if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_CC)
6523 /* Canonicalize any ordered comparison with integers involving equality
6524 if we can do computations in the relevant mode and we do not
6527 if (GET_CODE (op1) == CONST_INT
6528 && GET_MODE (op0) != VOIDmode
6529 && GET_MODE_BITSIZE (GET_MODE (op0)) <= HOST_BITS_PER_WIDE_INT)
6531 HOST_WIDE_INT const_val = INTVAL (op1);
6532 unsigned HOST_WIDE_INT uconst_val = const_val;
6533 unsigned HOST_WIDE_INT max_val
6534 = (unsigned HOST_WIDE_INT) GET_MODE_MASK (GET_MODE (op0));
6539 if (const_val != max_val >> 1)
6540 code = LT, op1 = GEN_INT (const_val + 1);
6545 != (((HOST_WIDE_INT) 1
6546 << (GET_MODE_BITSIZE (GET_MODE (op0)) - 1))))
6547 code = GT, op1 = GEN_INT (const_val - 1);
6551 if (uconst_val != max_val)
6552 code = LTU, op1 = GEN_INT (uconst_val + 1);
6556 if (uconst_val != 0)
6557 code = GTU, op1 = GEN_INT (uconst_val - 1);
6562 /* If this was floating-point and we reversed anything other than an
6563 EQ or NE, return zero. */
6564 if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT
6565 && did_reverse_condition && code != NE && code != EQ
6567 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_FLOAT)
6571 /* Never return CC0; return zero instead. */
6576 return gen_rtx (code, VOIDmode, op0, op1);
6579 /* Similar to above routine, except that we also put an invariant last
6580 unless both operands are invariants. */
6583 get_condition_for_loop (x)
6586 rtx comparison = get_condition (x, NULL_PTR);
6589 || ! invariant_p (XEXP (comparison, 0))
6590 || invariant_p (XEXP (comparison, 1)))
6593 return gen_rtx (swap_condition (GET_CODE (comparison)), VOIDmode,
6594 XEXP (comparison, 1), XEXP (comparison, 0));