1 /* Perform various loop optimizations, including strength reduction.
2 Copyright (C) 1987, 1988, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
22 /* This is the loop optimization pass of the compiler.
23 It finds invariant computations within loops and moves them
24 to the beginning of the loop. Then it identifies basic and
25 general induction variables. Strength reduction is applied to the general
26 induction variables, and induction variable elimination is applied to
27 the basic induction variables.
29 It also finds cases where
30 a register is set within the loop by zero-extending a narrower value
31 and changes these to zero the entire register once before the loop
32 and merely copy the low part within the loop.
34 Most of the complexity is in heuristics to decide when it is worth
35 while to do these things. */
44 #include "hard-reg-set.h"
45 #include "basic-block.h"
46 #include "insn-config.h"
56 #include "insn-flags.h"
59 /* Not really meaningful values, but at least something. */
60 #ifndef SIMULTANEOUS_PREFETCHES
61 #define SIMULTANEOUS_PREFETCHES 3
63 #ifndef PREFETCH_BLOCK
64 #define PREFETCH_BLOCK 32
67 #define HAVE_prefetch 0
68 #define CODE_FOR_prefetch 0
69 #define gen_prefetch(a,b,c) (abort(), NULL_RTX)
72 /* Give up the prefetch optimizations once we exceed a given threshhold.
73 It is unlikely that we would be able to optimize something in a loop
74 with so many detected prefetches. */
75 #define MAX_PREFETCHES 100
76 /* The number of prefetch blocks that are beneficial to fetch at once before
77 a loop with a known (and low) iteration count. */
78 #define PREFETCH_BLOCKS_BEFORE_LOOP_MAX 6
79 /* For very tiny loops it is not worthwhile to prefetch even before the loop,
80 since it is likely that the data are already in the cache. */
81 #define PREFETCH_BLOCKS_BEFORE_LOOP_MIN 2
82 /* The minimal number of prefetch blocks that a loop must consume to make
83 the emitting of prefetch instruction in the body of loop worthwhile. */
84 #define PREFETCH_BLOCKS_IN_LOOP_MIN 6
86 /* Parameterize some prefetch heuristics so they can be turned on and off
87 easily for performance testing on new architecures. These can be
88 defined in target-dependent files. */
90 /* Prefetch is worthwhile only when loads/stores are dense. */
91 #ifndef PREFETCH_ONLY_DENSE_MEM
92 #define PREFETCH_ONLY_DENSE_MEM 1
95 /* Define what we mean by "dense" loads and stores; This value divided by 256
96 is the minimum percentage of memory references that worth prefetching. */
97 #ifndef PREFETCH_DENSE_MEM
98 #define PREFETCH_DENSE_MEM 220
101 /* Do not prefetch for a loop whose iteration count is known to be low. */
102 #ifndef PREFETCH_NO_LOW_LOOPCNT
103 #define PREFETCH_NO_LOW_LOOPCNT 1
106 /* Define what we mean by a "low" iteration count. */
107 #ifndef PREFETCH_LOW_LOOPCNT
108 #define PREFETCH_LOW_LOOPCNT 32
111 /* Do not prefetch for a loop that contains a function call; such a loop is
112 probably not an internal loop. */
113 #ifndef PREFETCH_NO_CALL
114 #define PREFETCH_NO_CALL 1
117 /* Do not prefetch accesses with an extreme stride. */
118 #ifndef PREFETCH_NO_EXTREME_STRIDE
119 #define PREFETCH_NO_EXTREME_STRIDE 1
122 /* Define what we mean by an "extreme" stride. */
123 #ifndef PREFETCH_EXTREME_STRIDE
124 #define PREFETCH_EXTREME_STRIDE 4096
127 /* Define a limit to how far apart indices can be and still be merged
128 into a single prefetch. */
129 #ifndef PREFETCH_EXTREME_DIFFERENCE
130 #define PREFETCH_EXTREME_DIFFERENCE 4096
133 /* Issue prefetch instructions before the loop to fetch data to be used
134 in the first few loop iterations. */
135 #ifndef PREFETCH_BEFORE_LOOP
136 #define PREFETCH_BEFORE_LOOP 1
139 /* Do not handle reversed order prefetches (negative stride). */
140 #ifndef PREFETCH_NO_REVERSE_ORDER
141 #define PREFETCH_NO_REVERSE_ORDER 1
144 /* Prefetch even if the GIV is in conditional code. */
145 #ifndef PREFETCH_CONDITIONAL
146 #define PREFETCH_CONDITIONAL 0
149 /* If the loop requires more prefetches than the target can process in
150 parallel then don't prefetch anything in that loop. */
151 #ifndef PREFETCH_LIMIT_TO_SIMULTANEOUS
152 #define PREFETCH_LIMIT_TO_SIMULTANEOUS 1
155 #define LOOP_REG_LIFETIME(LOOP, REGNO) \
156 ((REGNO_LAST_LUID (REGNO) - REGNO_FIRST_LUID (REGNO)))
158 #define LOOP_REG_GLOBAL_P(LOOP, REGNO) \
159 ((REGNO_LAST_LUID (REGNO) > INSN_LUID ((LOOP)->end) \
160 || REGNO_FIRST_LUID (REGNO) < INSN_LUID ((LOOP)->start)))
162 #define LOOP_REGNO_NREGS(REGNO, SET_DEST) \
163 ((REGNO) < FIRST_PSEUDO_REGISTER \
164 ? HARD_REGNO_NREGS ((REGNO), GET_MODE (SET_DEST)) : 1)
167 /* Vector mapping INSN_UIDs to luids.
168 The luids are like uids but increase monotonically always.
169 We use them to see whether a jump comes from outside a given loop. */
173 /* Indexed by INSN_UID, contains the ordinal giving the (innermost) loop
174 number the insn is contained in. */
176 struct loop **uid_loop;
178 /* 1 + largest uid of any insn. */
180 int max_uid_for_loop;
182 /* 1 + luid of last insn. */
186 /* Number of loops detected in current function. Used as index to the
189 static int max_loop_num;
191 /* Bound on pseudo register number before loop optimization.
192 A pseudo has valid regscan info if its number is < max_reg_before_loop. */
193 unsigned int max_reg_before_loop;
195 /* The value to pass to the next call of reg_scan_update. */
196 static int loop_max_reg;
198 #define obstack_chunk_alloc xmalloc
199 #define obstack_chunk_free free
201 /* During the analysis of a loop, a chain of `struct movable's
202 is made to record all the movable insns found.
203 Then the entire chain can be scanned to decide which to move. */
207 rtx insn; /* A movable insn */
208 rtx set_src; /* The expression this reg is set from. */
209 rtx set_dest; /* The destination of this SET. */
210 rtx dependencies; /* When INSN is libcall, this is an EXPR_LIST
211 of any registers used within the LIBCALL. */
212 int consec; /* Number of consecutive following insns
213 that must be moved with this one. */
214 unsigned int regno; /* The register it sets */
215 short lifetime; /* lifetime of that register;
216 may be adjusted when matching movables
217 that load the same value are found. */
218 short savings; /* Number of insns we can move for this reg,
219 including other movables that force this
220 or match this one. */
221 unsigned int cond : 1; /* 1 if only conditionally movable */
222 unsigned int force : 1; /* 1 means MUST move this insn */
223 unsigned int global : 1; /* 1 means reg is live outside this loop */
224 /* If PARTIAL is 1, GLOBAL means something different:
225 that the reg is live outside the range from where it is set
226 to the following label. */
227 unsigned int done : 1; /* 1 inhibits further processing of this */
229 unsigned int partial : 1; /* 1 means this reg is used for zero-extending.
230 In particular, moving it does not make it
232 unsigned int move_insn : 1; /* 1 means that we call emit_move_insn to
233 load SRC, rather than copying INSN. */
234 unsigned int move_insn_first:1;/* Same as above, if this is necessary for the
235 first insn of a consecutive sets group. */
236 unsigned int is_equiv : 1; /* 1 means a REG_EQUIV is present on INSN. */
237 enum machine_mode savemode; /* Nonzero means it is a mode for a low part
238 that we should avoid changing when clearing
239 the rest of the reg. */
240 struct movable *match; /* First entry for same value */
241 struct movable *forces; /* An insn that must be moved if this is */
242 struct movable *next;
246 FILE *loop_dump_stream;
248 /* Forward declarations. */
250 static void invalidate_loops_containing_label PARAMS ((rtx));
251 static void find_and_verify_loops PARAMS ((rtx, struct loops *));
252 static void mark_loop_jump PARAMS ((rtx, struct loop *));
253 static void prescan_loop PARAMS ((struct loop *));
254 static int reg_in_basic_block_p PARAMS ((rtx, rtx));
255 static int consec_sets_invariant_p PARAMS ((const struct loop *,
257 static int labels_in_range_p PARAMS ((rtx, int));
258 static void count_one_set PARAMS ((struct loop_regs *, rtx, rtx, rtx *));
259 static void note_addr_stored PARAMS ((rtx, rtx, void *));
260 static void note_set_pseudo_multiple_uses PARAMS ((rtx, rtx, void *));
261 static int loop_reg_used_before_p PARAMS ((const struct loop *, rtx, rtx));
262 static void scan_loop PARAMS ((struct loop*, int));
264 static void replace_call_address PARAMS ((rtx, rtx, rtx));
266 static rtx skip_consec_insns PARAMS ((rtx, int));
267 static int libcall_benefit PARAMS ((rtx));
268 static void ignore_some_movables PARAMS ((struct loop_movables *));
269 static void force_movables PARAMS ((struct loop_movables *));
270 static void combine_movables PARAMS ((struct loop_movables *,
271 struct loop_regs *));
272 static int num_unmoved_movables PARAMS ((const struct loop *));
273 static int regs_match_p PARAMS ((rtx, rtx, struct loop_movables *));
274 static int rtx_equal_for_loop_p PARAMS ((rtx, rtx, struct loop_movables *,
275 struct loop_regs *));
276 static void add_label_notes PARAMS ((rtx, rtx));
277 static void move_movables PARAMS ((struct loop *loop, struct loop_movables *,
279 static void loop_movables_add PARAMS((struct loop_movables *,
281 static void loop_movables_free PARAMS((struct loop_movables *));
282 static int count_nonfixed_reads PARAMS ((const struct loop *, rtx));
283 static void loop_bivs_find PARAMS((struct loop *));
284 static void loop_bivs_init_find PARAMS((struct loop *));
285 static void loop_bivs_check PARAMS((struct loop *));
286 static void loop_givs_find PARAMS((struct loop *));
287 static void loop_givs_check PARAMS((struct loop *));
288 static int loop_biv_eliminable_p PARAMS((struct loop *, struct iv_class *,
290 static int loop_giv_reduce_benefit PARAMS((struct loop *, struct iv_class *,
291 struct induction *, rtx));
292 static void loop_givs_dead_check PARAMS((struct loop *, struct iv_class *));
293 static void loop_givs_reduce PARAMS((struct loop *, struct iv_class *));
294 static void loop_givs_rescan PARAMS((struct loop *, struct iv_class *,
296 static void loop_ivs_free PARAMS((struct loop *));
297 static void strength_reduce PARAMS ((struct loop *, int));
298 static void find_single_use_in_loop PARAMS ((struct loop_regs *, rtx, rtx));
299 static int valid_initial_value_p PARAMS ((rtx, rtx, int, rtx));
300 static void find_mem_givs PARAMS ((const struct loop *, rtx, rtx, int, int));
301 static void record_biv PARAMS ((struct loop *, struct induction *,
302 rtx, rtx, rtx, rtx, rtx *,
304 static void check_final_value PARAMS ((const struct loop *,
305 struct induction *));
306 static void loop_ivs_dump PARAMS((const struct loop *, FILE *, int));
307 static void loop_iv_class_dump PARAMS((const struct iv_class *, FILE *, int));
308 static void loop_biv_dump PARAMS((const struct induction *, FILE *, int));
309 static void loop_giv_dump PARAMS((const struct induction *, FILE *, int));
310 static void record_giv PARAMS ((const struct loop *, struct induction *,
311 rtx, rtx, rtx, rtx, rtx, rtx, int,
312 enum g_types, int, int, rtx *));
313 static void update_giv_derive PARAMS ((const struct loop *, rtx));
314 static void check_ext_dependent_givs PARAMS ((struct iv_class *,
315 struct loop_info *));
316 static int basic_induction_var PARAMS ((const struct loop *, rtx,
317 enum machine_mode, rtx, rtx,
318 rtx *, rtx *, rtx **));
319 static rtx simplify_giv_expr PARAMS ((const struct loop *, rtx, rtx *, int *));
320 static int general_induction_var PARAMS ((const struct loop *loop, rtx, rtx *,
321 rtx *, rtx *, rtx *, int, int *,
323 static int consec_sets_giv PARAMS ((const struct loop *, int, rtx,
324 rtx, rtx, rtx *, rtx *, rtx *, rtx *));
325 static int check_dbra_loop PARAMS ((struct loop *, int));
326 static rtx express_from_1 PARAMS ((rtx, rtx, rtx));
327 static rtx combine_givs_p PARAMS ((struct induction *, struct induction *));
328 static int cmp_combine_givs_stats PARAMS ((const PTR, const PTR));
329 static void combine_givs PARAMS ((struct loop_regs *, struct iv_class *));
330 static int product_cheap_p PARAMS ((rtx, rtx));
331 static int maybe_eliminate_biv PARAMS ((const struct loop *, struct iv_class *,
333 static int maybe_eliminate_biv_1 PARAMS ((const struct loop *, rtx, rtx,
334 struct iv_class *, int,
336 static int last_use_this_basic_block PARAMS ((rtx, rtx));
337 static void record_initial PARAMS ((rtx, rtx, void *));
338 static void update_reg_last_use PARAMS ((rtx, rtx));
339 static rtx next_insn_in_loop PARAMS ((const struct loop *, rtx));
340 static void loop_regs_scan PARAMS ((const struct loop *, int));
341 static int count_insns_in_loop PARAMS ((const struct loop *));
342 static void load_mems PARAMS ((const struct loop *));
343 static int insert_loop_mem PARAMS ((rtx *, void *));
344 static int replace_loop_mem PARAMS ((rtx *, void *));
345 static void replace_loop_mems PARAMS ((rtx, rtx, rtx));
346 static int replace_loop_reg PARAMS ((rtx *, void *));
347 static void replace_loop_regs PARAMS ((rtx insn, rtx, rtx));
348 static void note_reg_stored PARAMS ((rtx, rtx, void *));
349 static void try_copy_prop PARAMS ((const struct loop *, rtx, unsigned int));
350 static void try_swap_copy_prop PARAMS ((const struct loop *, rtx,
352 static int replace_label PARAMS ((rtx *, void *));
353 static rtx check_insn_for_givs PARAMS((struct loop *, rtx, int, int));
354 static rtx check_insn_for_bivs PARAMS((struct loop *, rtx, int, int));
355 static rtx gen_add_mult PARAMS ((rtx, rtx, rtx, rtx));
356 static void loop_regs_update PARAMS ((const struct loop *, rtx));
357 static int iv_add_mult_cost PARAMS ((rtx, rtx, rtx, rtx));
359 static rtx loop_insn_emit_after PARAMS((const struct loop *, basic_block,
361 static rtx loop_call_insn_emit_before PARAMS((const struct loop *,
362 basic_block, rtx, rtx));
363 static rtx loop_call_insn_hoist PARAMS((const struct loop *, rtx));
364 static rtx loop_insn_sink_or_swim PARAMS((const struct loop *, rtx));
366 static void loop_dump_aux PARAMS ((const struct loop *, FILE *, int));
367 static void loop_delete_insns PARAMS ((rtx, rtx));
368 static HOST_WIDE_INT remove_constant_addition PARAMS ((rtx *));
369 static rtx gen_load_of_final_value PARAMS ((rtx, rtx));
370 void debug_ivs PARAMS ((const struct loop *));
371 void debug_iv_class PARAMS ((const struct iv_class *));
372 void debug_biv PARAMS ((const struct induction *));
373 void debug_giv PARAMS ((const struct induction *));
374 void debug_loop PARAMS ((const struct loop *));
375 void debug_loops PARAMS ((const struct loops *));
377 typedef struct rtx_pair
383 typedef struct loop_replace_args
390 /* Nonzero iff INSN is between START and END, inclusive. */
391 #define INSN_IN_RANGE_P(INSN, START, END) \
392 (INSN_UID (INSN) < max_uid_for_loop \
393 && INSN_LUID (INSN) >= INSN_LUID (START) \
394 && INSN_LUID (INSN) <= INSN_LUID (END))
396 /* Indirect_jump_in_function is computed once per function. */
397 static int indirect_jump_in_function;
398 static int indirect_jump_in_function_p PARAMS ((rtx));
400 static int compute_luids PARAMS ((rtx, rtx, int));
402 static int biv_elimination_giv_has_0_offset PARAMS ((struct induction *,
406 /* Benefit penalty, if a giv is not replaceable, i.e. must emit an insn to
407 copy the value of the strength reduced giv to its original register. */
408 static int copy_cost;
410 /* Cost of using a register, to normalize the benefits of a giv. */
411 static int reg_address_cost;
416 rtx reg = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 1);
418 reg_address_cost = address_cost (reg, SImode);
420 copy_cost = COSTS_N_INSNS (1);
423 /* Compute the mapping from uids to luids.
424 LUIDs are numbers assigned to insns, like uids,
425 except that luids increase monotonically through the code.
426 Start at insn START and stop just before END. Assign LUIDs
427 starting with PREV_LUID + 1. Return the last assigned LUID + 1. */
429 compute_luids (start, end, prev_luid)
436 for (insn = start, i = prev_luid; insn != end; insn = NEXT_INSN (insn))
438 if (INSN_UID (insn) >= max_uid_for_loop)
440 /* Don't assign luids to line-number NOTEs, so that the distance in
441 luids between two insns is not affected by -g. */
442 if (GET_CODE (insn) != NOTE
443 || NOTE_LINE_NUMBER (insn) <= 0)
444 uid_luid[INSN_UID (insn)] = ++i;
446 /* Give a line number note the same luid as preceding insn. */
447 uid_luid[INSN_UID (insn)] = i;
452 /* Entry point of this file. Perform loop optimization
453 on the current function. F is the first insn of the function
454 and DUMPFILE is a stream for output of a trace of actions taken
455 (or 0 if none should be output). */
458 loop_optimize (f, dumpfile, flags)
459 /* f is the first instruction of a chain of insns for one function */
466 struct loops loops_data;
467 struct loops *loops = &loops_data;
468 struct loop_info *loops_info;
470 loop_dump_stream = dumpfile;
472 init_recog_no_volatile ();
474 max_reg_before_loop = max_reg_num ();
475 loop_max_reg = max_reg_before_loop;
479 /* Count the number of loops. */
482 for (insn = f; insn; insn = NEXT_INSN (insn))
484 if (GET_CODE (insn) == NOTE
485 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
489 /* Don't waste time if no loops. */
490 if (max_loop_num == 0)
493 loops->num = max_loop_num;
495 /* Get size to use for tables indexed by uids.
496 Leave some space for labels allocated by find_and_verify_loops. */
497 max_uid_for_loop = get_max_uid () + 1 + max_loop_num * 32;
499 uid_luid = (int *) xcalloc (max_uid_for_loop, sizeof (int));
500 uid_loop = (struct loop **) xcalloc (max_uid_for_loop,
501 sizeof (struct loop *));
503 /* Allocate storage for array of loops. */
504 loops->array = (struct loop *)
505 xcalloc (loops->num, sizeof (struct loop));
507 /* Find and process each loop.
508 First, find them, and record them in order of their beginnings. */
509 find_and_verify_loops (f, loops);
511 /* Allocate and initialize auxiliary loop information. */
512 loops_info = xcalloc (loops->num, sizeof (struct loop_info));
513 for (i = 0; i < loops->num; i++)
514 loops->array[i].aux = loops_info + i;
516 /* Now find all register lifetimes. This must be done after
517 find_and_verify_loops, because it might reorder the insns in the
519 reg_scan (f, max_reg_before_loop, 1);
521 /* This must occur after reg_scan so that registers created by gcse
522 will have entries in the register tables.
524 We could have added a call to reg_scan after gcse_main in toplev.c,
525 but moving this call to init_alias_analysis is more efficient. */
526 init_alias_analysis ();
528 /* See if we went too far. Note that get_max_uid already returns
529 one more that the maximum uid of all insn. */
530 if (get_max_uid () > max_uid_for_loop)
532 /* Now reset it to the actual size we need. See above. */
533 max_uid_for_loop = get_max_uid ();
535 /* find_and_verify_loops has already called compute_luids, but it
536 might have rearranged code afterwards, so we need to recompute
538 max_luid = compute_luids (f, NULL_RTX, 0);
540 /* Don't leave gaps in uid_luid for insns that have been
541 deleted. It is possible that the first or last insn
542 using some register has been deleted by cross-jumping.
543 Make sure that uid_luid for that former insn's uid
544 points to the general area where that insn used to be. */
545 for (i = 0; i < max_uid_for_loop; i++)
547 uid_luid[0] = uid_luid[i];
548 if (uid_luid[0] != 0)
551 for (i = 0; i < max_uid_for_loop; i++)
552 if (uid_luid[i] == 0)
553 uid_luid[i] = uid_luid[i - 1];
555 /* Determine if the function has indirect jump. On some systems
556 this prevents low overhead loop instructions from being used. */
557 indirect_jump_in_function = indirect_jump_in_function_p (f);
559 /* Now scan the loops, last ones first, since this means inner ones are done
560 before outer ones. */
561 for (i = max_loop_num - 1; i >= 0; i--)
563 struct loop *loop = &loops->array[i];
565 if (! loop->invalid && loop->end)
566 scan_loop (loop, flags);
569 /* If there were lexical blocks inside the loop, they have been
570 replicated. We will now have more than one NOTE_INSN_BLOCK_BEG
571 and NOTE_INSN_BLOCK_END for each such block. We must duplicate
572 the BLOCKs as well. */
573 if (write_symbols != NO_DEBUG)
576 end_alias_analysis ();
585 /* Returns the next insn, in execution order, after INSN. START and
586 END are the NOTE_INSN_LOOP_BEG and NOTE_INSN_LOOP_END for the loop,
587 respectively. LOOP->TOP, if non-NULL, is the top of the loop in the
588 insn-stream; it is used with loops that are entered near the
592 next_insn_in_loop (loop, insn)
593 const struct loop *loop;
596 insn = NEXT_INSN (insn);
598 if (insn == loop->end)
601 /* Go to the top of the loop, and continue there. */
608 if (insn == loop->scan_start)
615 /* Optimize one loop described by LOOP. */
617 /* ??? Could also move memory writes out of loops if the destination address
618 is invariant, the source is invariant, the memory write is not volatile,
619 and if we can prove that no read inside the loop can read this address
620 before the write occurs. If there is a read of this address after the
621 write, then we can also mark the memory read as invariant. */
624 scan_loop (loop, flags)
628 struct loop_info *loop_info = LOOP_INFO (loop);
629 struct loop_regs *regs = LOOP_REGS (loop);
631 rtx loop_start = loop->start;
632 rtx loop_end = loop->end;
634 /* 1 if we are scanning insns that could be executed zero times. */
636 /* 1 if we are scanning insns that might never be executed
637 due to a subroutine call which might exit before they are reached. */
639 /* Jump insn that enters the loop, or 0 if control drops in. */
640 rtx loop_entry_jump = 0;
641 /* Number of insns in the loop. */
644 rtx temp, update_start, update_end;
645 /* The SET from an insn, if it is the only SET in the insn. */
647 /* Chain describing insns movable in current loop. */
648 struct loop_movables *movables = LOOP_MOVABLES (loop);
649 /* Ratio of extra register life span we can justify
650 for saving an instruction. More if loop doesn't call subroutines
651 since in that case saving an insn makes more difference
652 and more registers are available. */
654 /* Nonzero if we are scanning instructions in a sub-loop. */
662 /* Determine whether this loop starts with a jump down to a test at
663 the end. This will occur for a small number of loops with a test
664 that is too complex to duplicate in front of the loop.
666 We search for the first insn or label in the loop, skipping NOTEs.
667 However, we must be careful not to skip past a NOTE_INSN_LOOP_BEG
668 (because we might have a loop executed only once that contains a
669 loop which starts with a jump to its exit test) or a NOTE_INSN_LOOP_END
670 (in case we have a degenerate loop).
672 Note that if we mistakenly think that a loop is entered at the top
673 when, in fact, it is entered at the exit test, the only effect will be
674 slightly poorer optimization. Making the opposite error can generate
675 incorrect code. Since very few loops now start with a jump to the
676 exit test, the code here to detect that case is very conservative. */
678 for (p = NEXT_INSN (loop_start);
680 && GET_CODE (p) != CODE_LABEL && ! INSN_P (p)
681 && (GET_CODE (p) != NOTE
682 || (NOTE_LINE_NUMBER (p) != NOTE_INSN_LOOP_BEG
683 && NOTE_LINE_NUMBER (p) != NOTE_INSN_LOOP_END));
687 loop->scan_start = p;
689 /* If loop end is the end of the current function, then emit a
690 NOTE_INSN_DELETED after loop_end and set loop->sink to the dummy
691 note insn. This is the position we use when sinking insns out of
693 if (NEXT_INSN (loop->end) != 0)
694 loop->sink = NEXT_INSN (loop->end);
696 loop->sink = emit_note_after (NOTE_INSN_DELETED, loop->end);
698 /* Set up variables describing this loop. */
700 threshold = (loop_info->has_call ? 1 : 2) * (1 + n_non_fixed_regs);
702 /* If loop has a jump before the first label,
703 the true entry is the target of that jump.
704 Start scan from there.
705 But record in LOOP->TOP the place where the end-test jumps
706 back to so we can scan that after the end of the loop. */
707 if (GET_CODE (p) == JUMP_INSN)
711 /* Loop entry must be unconditional jump (and not a RETURN) */
712 if (any_uncondjump_p (p)
713 && JUMP_LABEL (p) != 0
714 /* Check to see whether the jump actually
715 jumps out of the loop (meaning it's no loop).
716 This case can happen for things like
717 do {..} while (0). If this label was generated previously
718 by loop, we can't tell anything about it and have to reject
720 && INSN_IN_RANGE_P (JUMP_LABEL (p), loop_start, loop_end))
722 loop->top = next_label (loop->scan_start);
723 loop->scan_start = JUMP_LABEL (p);
727 /* If LOOP->SCAN_START was an insn created by loop, we don't know its luid
728 as required by loop_reg_used_before_p. So skip such loops. (This
729 test may never be true, but it's best to play it safe.)
731 Also, skip loops where we do not start scanning at a label. This
732 test also rejects loops starting with a JUMP_INSN that failed the
735 if (INSN_UID (loop->scan_start) >= max_uid_for_loop
736 || GET_CODE (loop->scan_start) != CODE_LABEL)
738 if (loop_dump_stream)
739 fprintf (loop_dump_stream, "\nLoop from %d to %d is phony.\n\n",
740 INSN_UID (loop_start), INSN_UID (loop_end));
744 /* Allocate extra space for REGs that might be created by load_mems.
745 We allocate a little extra slop as well, in the hopes that we
746 won't have to reallocate the regs array. */
747 loop_regs_scan (loop, loop_info->mems_idx + 16);
748 insn_count = count_insns_in_loop (loop);
750 if (loop_dump_stream)
752 fprintf (loop_dump_stream, "\nLoop from %d to %d: %d real insns.\n",
753 INSN_UID (loop_start), INSN_UID (loop_end), insn_count);
755 fprintf (loop_dump_stream, "Continue at insn %d.\n",
756 INSN_UID (loop->cont));
759 /* Scan through the loop finding insns that are safe to move.
760 Set REGS->ARRAY[I].SET_IN_LOOP negative for the reg I being set, so that
761 this reg will be considered invariant for subsequent insns.
762 We consider whether subsequent insns use the reg
763 in deciding whether it is worth actually moving.
765 MAYBE_NEVER is nonzero if we have passed a conditional jump insn
766 and therefore it is possible that the insns we are scanning
767 would never be executed. At such times, we must make sure
768 that it is safe to execute the insn once instead of zero times.
769 When MAYBE_NEVER is 0, all insns will be executed at least once
770 so that is not a problem. */
772 for (p = next_insn_in_loop (loop, loop->scan_start);
774 p = next_insn_in_loop (loop, p))
776 if (GET_CODE (p) == INSN
777 && (set = single_set (p))
778 && GET_CODE (SET_DEST (set)) == REG
779 #ifdef PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
780 && SET_DEST (set) != pic_offset_table_rtx
782 && ! regs->array[REGNO (SET_DEST (set))].may_not_optimize)
787 rtx src = SET_SRC (set);
788 rtx dependencies = 0;
790 /* Figure out what to use as a source of this insn. If a REG_EQUIV
791 note is given or if a REG_EQUAL note with a constant operand is
792 specified, use it as the source and mark that we should move
793 this insn by calling emit_move_insn rather that duplicating the
796 Otherwise, only use the REG_EQUAL contents if a REG_RETVAL note
798 temp = find_reg_note (p, REG_EQUIV, NULL_RTX);
800 src = XEXP (temp, 0), move_insn = 1;
803 temp = find_reg_note (p, REG_EQUAL, NULL_RTX);
804 if (temp && CONSTANT_P (XEXP (temp, 0)))
805 src = XEXP (temp, 0), move_insn = 1;
806 if (temp && find_reg_note (p, REG_RETVAL, NULL_RTX))
808 src = XEXP (temp, 0);
809 /* A libcall block can use regs that don't appear in
810 the equivalent expression. To move the libcall,
811 we must move those regs too. */
812 dependencies = libcall_other_reg (p, src);
816 /* For parallels, add any possible uses to the depencies, as we can't move
817 the insn without resolving them first. */
818 if (GET_CODE (PATTERN (p)) == PARALLEL)
820 for (i = 0; i < XVECLEN (PATTERN (p), 0); i++)
822 rtx x = XVECEXP (PATTERN (p), 0, i);
823 if (GET_CODE (x) == USE)
824 dependencies = gen_rtx_EXPR_LIST (VOIDmode, XEXP (x, 0), dependencies);
828 /* Don't try to optimize a register that was made
829 by loop-optimization for an inner loop.
830 We don't know its life-span, so we can't compute the benefit. */
831 if (REGNO (SET_DEST (set)) >= max_reg_before_loop)
833 else if (/* The register is used in basic blocks other
834 than the one where it is set (meaning that
835 something after this point in the loop might
836 depend on its value before the set). */
837 ! reg_in_basic_block_p (p, SET_DEST (set))
838 /* And the set is not guaranteed to be executed once
839 the loop starts, or the value before the set is
840 needed before the set occurs...
842 ??? Note we have quadratic behaviour here, mitigated
843 by the fact that the previous test will often fail for
844 large loops. Rather than re-scanning the entire loop
845 each time for register usage, we should build tables
846 of the register usage and use them here instead. */
848 || loop_reg_used_before_p (loop, set, p)))
849 /* It is unsafe to move the set.
851 This code used to consider it OK to move a set of a variable
852 which was not created by the user and not used in an exit test.
853 That behavior is incorrect and was removed. */
855 else if ((tem = loop_invariant_p (loop, src))
856 && (dependencies == 0
857 || (tem2 = loop_invariant_p (loop, dependencies)) != 0)
858 && (regs->array[REGNO (SET_DEST (set))].set_in_loop == 1
860 = consec_sets_invariant_p
861 (loop, SET_DEST (set),
862 regs->array[REGNO (SET_DEST (set))].set_in_loop,
864 /* If the insn can cause a trap (such as divide by zero),
865 can't move it unless it's guaranteed to be executed
866 once loop is entered. Even a function call might
867 prevent the trap insn from being reached
868 (since it might exit!) */
869 && ! ((maybe_never || call_passed)
870 && may_trap_p (src)))
873 int regno = REGNO (SET_DEST (set));
875 /* A potential lossage is where we have a case where two insns
876 can be combined as long as they are both in the loop, but
877 we move one of them outside the loop. For large loops,
878 this can lose. The most common case of this is the address
879 of a function being called.
881 Therefore, if this register is marked as being used exactly
882 once if we are in a loop with calls (a "large loop"), see if
883 we can replace the usage of this register with the source
884 of this SET. If we can, delete this insn.
886 Don't do this if P has a REG_RETVAL note or if we have
887 SMALL_REGISTER_CLASSES and SET_SRC is a hard register. */
889 if (loop_info->has_call
890 && regs->array[regno].single_usage != 0
891 && regs->array[regno].single_usage != const0_rtx
892 && REGNO_FIRST_UID (regno) == INSN_UID (p)
893 && (REGNO_LAST_UID (regno)
894 == INSN_UID (regs->array[regno].single_usage))
895 && regs->array[regno].set_in_loop == 1
896 && GET_CODE (SET_SRC (set)) != ASM_OPERANDS
897 && ! side_effects_p (SET_SRC (set))
898 && ! find_reg_note (p, REG_RETVAL, NULL_RTX)
899 && (! SMALL_REGISTER_CLASSES
900 || (! (GET_CODE (SET_SRC (set)) == REG
901 && REGNO (SET_SRC (set)) < FIRST_PSEUDO_REGISTER)))
902 /* This test is not redundant; SET_SRC (set) might be
903 a call-clobbered register and the life of REGNO
904 might span a call. */
905 && ! modified_between_p (SET_SRC (set), p,
906 regs->array[regno].single_usage)
907 && no_labels_between_p (p, regs->array[regno].single_usage)
908 && validate_replace_rtx (SET_DEST (set), SET_SRC (set),
909 regs->array[regno].single_usage))
911 /* Replace any usage in a REG_EQUAL note. Must copy the
912 new source, so that we don't get rtx sharing between the
913 SET_SOURCE and REG_NOTES of insn p. */
914 REG_NOTES (regs->array[regno].single_usage)
915 = replace_rtx (REG_NOTES (regs->array[regno].single_usage),
916 SET_DEST (set), copy_rtx (SET_SRC (set)));
919 for (i = 0; i < LOOP_REGNO_NREGS (regno, SET_DEST (set)); i++)
920 regs->array[regno+i].set_in_loop = 0;
924 m = (struct movable *) xmalloc (sizeof (struct movable));
928 m->dependencies = dependencies;
929 m->set_dest = SET_DEST (set);
931 m->consec = regs->array[REGNO (SET_DEST (set))].set_in_loop - 1;
935 m->move_insn = move_insn;
936 m->move_insn_first = 0;
937 m->is_equiv = (find_reg_note (p, REG_EQUIV, NULL_RTX) != 0);
938 m->savemode = VOIDmode;
940 /* Set M->cond if either loop_invariant_p
941 or consec_sets_invariant_p returned 2
942 (only conditionally invariant). */
943 m->cond = ((tem | tem1 | tem2) > 1);
944 m->global = LOOP_REG_GLOBAL_P (loop, regno);
946 m->lifetime = LOOP_REG_LIFETIME (loop, regno);
947 m->savings = regs->array[regno].n_times_set;
948 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
949 m->savings += libcall_benefit (p);
950 for (i = 0; i < LOOP_REGNO_NREGS (regno, SET_DEST (set)); i++)
951 regs->array[regno+i].set_in_loop = move_insn ? -2 : -1;
952 /* Add M to the end of the chain MOVABLES. */
953 loop_movables_add (movables, m);
957 /* It is possible for the first instruction to have a
958 REG_EQUAL note but a non-invariant SET_SRC, so we must
959 remember the status of the first instruction in case
960 the last instruction doesn't have a REG_EQUAL note. */
961 m->move_insn_first = m->move_insn;
963 /* Skip this insn, not checking REG_LIBCALL notes. */
964 p = next_nonnote_insn (p);
965 /* Skip the consecutive insns, if there are any. */
966 p = skip_consec_insns (p, m->consec);
967 /* Back up to the last insn of the consecutive group. */
968 p = prev_nonnote_insn (p);
970 /* We must now reset m->move_insn, m->is_equiv, and possibly
971 m->set_src to correspond to the effects of all the
973 temp = find_reg_note (p, REG_EQUIV, NULL_RTX);
975 m->set_src = XEXP (temp, 0), m->move_insn = 1;
978 temp = find_reg_note (p, REG_EQUAL, NULL_RTX);
979 if (temp && CONSTANT_P (XEXP (temp, 0)))
980 m->set_src = XEXP (temp, 0), m->move_insn = 1;
985 m->is_equiv = (find_reg_note (p, REG_EQUIV, NULL_RTX) != 0);
988 /* If this register is always set within a STRICT_LOW_PART
989 or set to zero, then its high bytes are constant.
990 So clear them outside the loop and within the loop
991 just load the low bytes.
992 We must check that the machine has an instruction to do so.
993 Also, if the value loaded into the register
994 depends on the same register, this cannot be done. */
995 else if (SET_SRC (set) == const0_rtx
996 && GET_CODE (NEXT_INSN (p)) == INSN
997 && (set1 = single_set (NEXT_INSN (p)))
998 && GET_CODE (set1) == SET
999 && (GET_CODE (SET_DEST (set1)) == STRICT_LOW_PART)
1000 && (GET_CODE (XEXP (SET_DEST (set1), 0)) == SUBREG)
1001 && (SUBREG_REG (XEXP (SET_DEST (set1), 0))
1003 && !reg_mentioned_p (SET_DEST (set), SET_SRC (set1)))
1005 int regno = REGNO (SET_DEST (set));
1006 if (regs->array[regno].set_in_loop == 2)
1009 m = (struct movable *) xmalloc (sizeof (struct movable));
1012 m->set_dest = SET_DEST (set);
1013 m->dependencies = 0;
1019 m->move_insn_first = 0;
1021 /* If the insn may not be executed on some cycles,
1022 we can't clear the whole reg; clear just high part.
1023 Not even if the reg is used only within this loop.
1030 Clearing x before the inner loop could clobber a value
1031 being saved from the last time around the outer loop.
1032 However, if the reg is not used outside this loop
1033 and all uses of the register are in the same
1034 basic block as the store, there is no problem.
1036 If this insn was made by loop, we don't know its
1037 INSN_LUID and hence must make a conservative
1039 m->global = (INSN_UID (p) >= max_uid_for_loop
1040 || LOOP_REG_GLOBAL_P (loop, regno)
1041 || (labels_in_range_p
1042 (p, REGNO_FIRST_LUID (regno))));
1043 if (maybe_never && m->global)
1044 m->savemode = GET_MODE (SET_SRC (set1));
1046 m->savemode = VOIDmode;
1050 m->lifetime = LOOP_REG_LIFETIME (loop, regno);
1052 for (i = 0; i < LOOP_REGNO_NREGS (regno, SET_DEST (set)); i++)
1053 regs->array[regno+i].set_in_loop = -1;
1054 /* Add M to the end of the chain MOVABLES. */
1055 loop_movables_add (movables, m);
1059 /* Past a call insn, we get to insns which might not be executed
1060 because the call might exit. This matters for insns that trap.
1061 Constant and pure call insns always return, so they don't count. */
1062 else if (GET_CODE (p) == CALL_INSN && ! CONST_OR_PURE_CALL_P (p))
1064 /* Past a label or a jump, we get to insns for which we
1065 can't count on whether or how many times they will be
1066 executed during each iteration. Therefore, we can
1067 only move out sets of trivial variables
1068 (those not used after the loop). */
1069 /* Similar code appears twice in strength_reduce. */
1070 else if ((GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN)
1071 /* If we enter the loop in the middle, and scan around to the
1072 beginning, don't set maybe_never for that. This must be an
1073 unconditional jump, otherwise the code at the top of the
1074 loop might never be executed. Unconditional jumps are
1075 followed by a barrier then the loop_end. */
1076 && ! (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p) == loop->top
1077 && NEXT_INSN (NEXT_INSN (p)) == loop_end
1078 && any_uncondjump_p (p)))
1080 else if (GET_CODE (p) == NOTE)
1082 /* At the virtual top of a converted loop, insns are again known to
1083 be executed: logically, the loop begins here even though the exit
1084 code has been duplicated. */
1085 if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP && loop_depth == 0)
1086 maybe_never = call_passed = 0;
1087 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
1089 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
1094 /* If one movable subsumes another, ignore that other. */
1096 ignore_some_movables (movables);
1098 /* For each movable insn, see if the reg that it loads
1099 leads when it dies right into another conditionally movable insn.
1100 If so, record that the second insn "forces" the first one,
1101 since the second can be moved only if the first is. */
1103 force_movables (movables);
1105 /* See if there are multiple movable insns that load the same value.
1106 If there are, make all but the first point at the first one
1107 through the `match' field, and add the priorities of them
1108 all together as the priority of the first. */
1110 combine_movables (movables, regs);
1112 /* Now consider each movable insn to decide whether it is worth moving.
1113 Store 0 in regs->array[I].set_in_loop for each reg I that is moved.
1115 Generally this increases code size, so do not move moveables when
1116 optimizing for code size. */
1118 if (! optimize_size)
1120 move_movables (loop, movables, threshold, insn_count);
1122 /* Recalculate regs->array if move_movables has created new
1124 if (max_reg_num () > regs->num)
1126 loop_regs_scan (loop, 0);
1127 for (update_start = loop_start;
1128 PREV_INSN (update_start)
1129 && GET_CODE (PREV_INSN (update_start)) != CODE_LABEL;
1130 update_start = PREV_INSN (update_start))
1132 update_end = NEXT_INSN (loop_end);
1134 reg_scan_update (update_start, update_end, loop_max_reg);
1135 loop_max_reg = max_reg_num ();
1139 /* Now candidates that still are negative are those not moved.
1140 Change regs->array[I].set_in_loop to indicate that those are not actually
1142 for (i = 0; i < regs->num; i++)
1143 if (regs->array[i].set_in_loop < 0)
1144 regs->array[i].set_in_loop = regs->array[i].n_times_set;
1146 /* Now that we've moved some things out of the loop, we might be able to
1147 hoist even more memory references. */
1150 /* Recalculate regs->array if load_mems has created new registers. */
1151 if (max_reg_num () > regs->num)
1152 loop_regs_scan (loop, 0);
1154 for (update_start = loop_start;
1155 PREV_INSN (update_start)
1156 && GET_CODE (PREV_INSN (update_start)) != CODE_LABEL;
1157 update_start = PREV_INSN (update_start))
1159 update_end = NEXT_INSN (loop_end);
1161 reg_scan_update (update_start, update_end, loop_max_reg);
1162 loop_max_reg = max_reg_num ();
1164 if (flag_strength_reduce)
1166 if (update_end && GET_CODE (update_end) == CODE_LABEL)
1167 /* Ensure our label doesn't go away. */
1168 LABEL_NUSES (update_end)++;
1170 strength_reduce (loop, flags);
1172 reg_scan_update (update_start, update_end, loop_max_reg);
1173 loop_max_reg = max_reg_num ();
1175 if (update_end && GET_CODE (update_end) == CODE_LABEL
1176 && --LABEL_NUSES (update_end) == 0)
1177 delete_related_insns (update_end);
1181 /* The movable information is required for strength reduction. */
1182 loop_movables_free (movables);
1189 /* Add elements to *OUTPUT to record all the pseudo-regs
1190 mentioned in IN_THIS but not mentioned in NOT_IN_THIS. */
1193 record_excess_regs (in_this, not_in_this, output)
1194 rtx in_this, not_in_this;
1201 code = GET_CODE (in_this);
1215 if (REGNO (in_this) >= FIRST_PSEUDO_REGISTER
1216 && ! reg_mentioned_p (in_this, not_in_this))
1217 *output = gen_rtx_EXPR_LIST (VOIDmode, in_this, *output);
1224 fmt = GET_RTX_FORMAT (code);
1225 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1232 for (j = 0; j < XVECLEN (in_this, i); j++)
1233 record_excess_regs (XVECEXP (in_this, i, j), not_in_this, output);
1237 record_excess_regs (XEXP (in_this, i), not_in_this, output);
1243 /* Check what regs are referred to in the libcall block ending with INSN,
1244 aside from those mentioned in the equivalent value.
1245 If there are none, return 0.
1246 If there are one or more, return an EXPR_LIST containing all of them. */
1249 libcall_other_reg (insn, equiv)
1252 rtx note = find_reg_note (insn, REG_RETVAL, NULL_RTX);
1253 rtx p = XEXP (note, 0);
1256 /* First, find all the regs used in the libcall block
1257 that are not mentioned as inputs to the result. */
1261 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
1262 || GET_CODE (p) == CALL_INSN)
1263 record_excess_regs (PATTERN (p), equiv, &output);
1270 /* Return 1 if all uses of REG
1271 are between INSN and the end of the basic block. */
1274 reg_in_basic_block_p (insn, reg)
1277 int regno = REGNO (reg);
1280 if (REGNO_FIRST_UID (regno) != INSN_UID (insn))
1283 /* Search this basic block for the already recorded last use of the reg. */
1284 for (p = insn; p; p = NEXT_INSN (p))
1286 switch (GET_CODE (p))
1293 /* Ordinary insn: if this is the last use, we win. */
1294 if (REGNO_LAST_UID (regno) == INSN_UID (p))
1299 /* Jump insn: if this is the last use, we win. */
1300 if (REGNO_LAST_UID (regno) == INSN_UID (p))
1302 /* Otherwise, it's the end of the basic block, so we lose. */
1307 /* It's the end of the basic block, so we lose. */
1315 /* The "last use" that was recorded can't be found after the first
1316 use. This can happen when the last use was deleted while
1317 processing an inner loop, this inner loop was then completely
1318 unrolled, and the outer loop is always exited after the inner loop,
1319 so that everything after the first use becomes a single basic block. */
1323 /* Compute the benefit of eliminating the insns in the block whose
1324 last insn is LAST. This may be a group of insns used to compute a
1325 value directly or can contain a library call. */
1328 libcall_benefit (last)
1334 for (insn = XEXP (find_reg_note (last, REG_RETVAL, NULL_RTX), 0);
1335 insn != last; insn = NEXT_INSN (insn))
1337 if (GET_CODE (insn) == CALL_INSN)
1338 benefit += 10; /* Assume at least this many insns in a library
1340 else if (GET_CODE (insn) == INSN
1341 && GET_CODE (PATTERN (insn)) != USE
1342 && GET_CODE (PATTERN (insn)) != CLOBBER)
1349 /* Skip COUNT insns from INSN, counting library calls as 1 insn. */
1352 skip_consec_insns (insn, count)
1356 for (; count > 0; count--)
1360 /* If first insn of libcall sequence, skip to end. */
1361 /* Do this at start of loop, since INSN is guaranteed to
1363 if (GET_CODE (insn) != NOTE
1364 && (temp = find_reg_note (insn, REG_LIBCALL, NULL_RTX)))
1365 insn = XEXP (temp, 0);
1368 insn = NEXT_INSN (insn);
1369 while (GET_CODE (insn) == NOTE);
1375 /* Ignore any movable whose insn falls within a libcall
1376 which is part of another movable.
1377 We make use of the fact that the movable for the libcall value
1378 was made later and so appears later on the chain. */
1381 ignore_some_movables (movables)
1382 struct loop_movables *movables;
1384 struct movable *m, *m1;
1386 for (m = movables->head; m; m = m->next)
1388 /* Is this a movable for the value of a libcall? */
1389 rtx note = find_reg_note (m->insn, REG_RETVAL, NULL_RTX);
1393 /* Check for earlier movables inside that range,
1394 and mark them invalid. We cannot use LUIDs here because
1395 insns created by loop.c for prior loops don't have LUIDs.
1396 Rather than reject all such insns from movables, we just
1397 explicitly check each insn in the libcall (since invariant
1398 libcalls aren't that common). */
1399 for (insn = XEXP (note, 0); insn != m->insn; insn = NEXT_INSN (insn))
1400 for (m1 = movables->head; m1 != m; m1 = m1->next)
1401 if (m1->insn == insn)
1407 /* For each movable insn, see if the reg that it loads
1408 leads when it dies right into another conditionally movable insn.
1409 If so, record that the second insn "forces" the first one,
1410 since the second can be moved only if the first is. */
1413 force_movables (movables)
1414 struct loop_movables *movables;
1416 struct movable *m, *m1;
1418 for (m1 = movables->head; m1; m1 = m1->next)
1419 /* Omit this if moving just the (SET (REG) 0) of a zero-extend. */
1420 if (!m1->partial && !m1->done)
1422 int regno = m1->regno;
1423 for (m = m1->next; m; m = m->next)
1424 /* ??? Could this be a bug? What if CSE caused the
1425 register of M1 to be used after this insn?
1426 Since CSE does not update regno_last_uid,
1427 this insn M->insn might not be where it dies.
1428 But very likely this doesn't matter; what matters is
1429 that M's reg is computed from M1's reg. */
1430 if (INSN_UID (m->insn) == REGNO_LAST_UID (regno)
1433 if (m != 0 && m->set_src == m1->set_dest
1434 /* If m->consec, m->set_src isn't valid. */
1438 /* Increase the priority of the moving the first insn
1439 since it permits the second to be moved as well. */
1443 m1->lifetime += m->lifetime;
1444 m1->savings += m->savings;
1449 /* Find invariant expressions that are equal and can be combined into
1453 combine_movables (movables, regs)
1454 struct loop_movables *movables;
1455 struct loop_regs *regs;
1458 char *matched_regs = (char *) xmalloc (regs->num);
1459 enum machine_mode mode;
1461 /* Regs that are set more than once are not allowed to match
1462 or be matched. I'm no longer sure why not. */
1463 /* Only pseudo registers are allowed to match or be matched,
1464 since move_movables does not validate the change. */
1465 /* Perhaps testing m->consec_sets would be more appropriate here? */
1467 for (m = movables->head; m; m = m->next)
1468 if (m->match == 0 && regs->array[m->regno].n_times_set == 1
1469 && m->regno >= FIRST_PSEUDO_REGISTER
1473 int regno = m->regno;
1475 memset (matched_regs, 0, regs->num);
1476 matched_regs[regno] = 1;
1478 /* We want later insns to match the first one. Don't make the first
1479 one match any later ones. So start this loop at m->next. */
1480 for (m1 = m->next; m1; m1 = m1->next)
1481 if (m != m1 && m1->match == 0
1482 && regs->array[m1->regno].n_times_set == 1
1483 && m1->regno >= FIRST_PSEUDO_REGISTER
1484 /* A reg used outside the loop mustn't be eliminated. */
1486 /* A reg used for zero-extending mustn't be eliminated. */
1488 && (matched_regs[m1->regno]
1491 /* Can combine regs with different modes loaded from the
1492 same constant only if the modes are the same or
1493 if both are integer modes with M wider or the same
1494 width as M1. The check for integer is redundant, but
1495 safe, since the only case of differing destination
1496 modes with equal sources is when both sources are
1497 VOIDmode, i.e., CONST_INT. */
1498 (GET_MODE (m->set_dest) == GET_MODE (m1->set_dest)
1499 || (GET_MODE_CLASS (GET_MODE (m->set_dest)) == MODE_INT
1500 && GET_MODE_CLASS (GET_MODE (m1->set_dest)) == MODE_INT
1501 && (GET_MODE_BITSIZE (GET_MODE (m->set_dest))
1502 >= GET_MODE_BITSIZE (GET_MODE (m1->set_dest)))))
1503 /* See if the source of M1 says it matches M. */
1504 && ((GET_CODE (m1->set_src) == REG
1505 && matched_regs[REGNO (m1->set_src)])
1506 || rtx_equal_for_loop_p (m->set_src, m1->set_src,
1508 && ((m->dependencies == m1->dependencies)
1509 || rtx_equal_p (m->dependencies, m1->dependencies)))
1511 m->lifetime += m1->lifetime;
1512 m->savings += m1->savings;
1515 matched_regs[m1->regno] = 1;
1519 /* Now combine the regs used for zero-extension.
1520 This can be done for those not marked `global'
1521 provided their lives don't overlap. */
1523 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
1524 mode = GET_MODE_WIDER_MODE (mode))
1526 struct movable *m0 = 0;
1528 /* Combine all the registers for extension from mode MODE.
1529 Don't combine any that are used outside this loop. */
1530 for (m = movables->head; m; m = m->next)
1531 if (m->partial && ! m->global
1532 && mode == GET_MODE (SET_SRC (PATTERN (NEXT_INSN (m->insn)))))
1536 int first = REGNO_FIRST_LUID (m->regno);
1537 int last = REGNO_LAST_LUID (m->regno);
1541 /* First one: don't check for overlap, just record it. */
1546 /* Make sure they extend to the same mode.
1547 (Almost always true.) */
1548 if (GET_MODE (m->set_dest) != GET_MODE (m0->set_dest))
1551 /* We already have one: check for overlap with those
1552 already combined together. */
1553 for (m1 = movables->head; m1 != m; m1 = m1->next)
1554 if (m1 == m0 || (m1->partial && m1->match == m0))
1555 if (! (REGNO_FIRST_LUID (m1->regno) > last
1556 || REGNO_LAST_LUID (m1->regno) < first))
1559 /* No overlap: we can combine this with the others. */
1560 m0->lifetime += m->lifetime;
1561 m0->savings += m->savings;
1571 free (matched_regs);
1574 /* Returns the number of movable instructions in LOOP that were not
1575 moved outside the loop. */
1578 num_unmoved_movables (loop)
1579 const struct loop *loop;
1584 for (m = LOOP_MOVABLES (loop)->head; m; m = m->next)
1592 /* Return 1 if regs X and Y will become the same if moved. */
1595 regs_match_p (x, y, movables)
1597 struct loop_movables *movables;
1599 unsigned int xn = REGNO (x);
1600 unsigned int yn = REGNO (y);
1601 struct movable *mx, *my;
1603 for (mx = movables->head; mx; mx = mx->next)
1604 if (mx->regno == xn)
1607 for (my = movables->head; my; my = my->next)
1608 if (my->regno == yn)
1612 && ((mx->match == my->match && mx->match != 0)
1614 || mx == my->match));
1617 /* Return 1 if X and Y are identical-looking rtx's.
1618 This is the Lisp function EQUAL for rtx arguments.
1620 If two registers are matching movables or a movable register and an
1621 equivalent constant, consider them equal. */
1624 rtx_equal_for_loop_p (x, y, movables, regs)
1626 struct loop_movables *movables;
1627 struct loop_regs *regs;
1637 if (x == 0 || y == 0)
1640 code = GET_CODE (x);
1642 /* If we have a register and a constant, they may sometimes be
1644 if (GET_CODE (x) == REG && regs->array[REGNO (x)].set_in_loop == -2
1647 for (m = movables->head; m; m = m->next)
1648 if (m->move_insn && m->regno == REGNO (x)
1649 && rtx_equal_p (m->set_src, y))
1652 else if (GET_CODE (y) == REG && regs->array[REGNO (y)].set_in_loop == -2
1655 for (m = movables->head; m; m = m->next)
1656 if (m->move_insn && m->regno == REGNO (y)
1657 && rtx_equal_p (m->set_src, x))
1661 /* Otherwise, rtx's of different codes cannot be equal. */
1662 if (code != GET_CODE (y))
1665 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
1666 (REG:SI x) and (REG:HI x) are NOT equivalent. */
1668 if (GET_MODE (x) != GET_MODE (y))
1671 /* These three types of rtx's can be compared nonrecursively. */
1673 return (REGNO (x) == REGNO (y) || regs_match_p (x, y, movables));
1675 if (code == LABEL_REF)
1676 return XEXP (x, 0) == XEXP (y, 0);
1677 if (code == SYMBOL_REF)
1678 return XSTR (x, 0) == XSTR (y, 0);
1680 /* Compare the elements. If any pair of corresponding elements
1681 fail to match, return 0 for the whole things. */
1683 fmt = GET_RTX_FORMAT (code);
1684 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1689 if (XWINT (x, i) != XWINT (y, i))
1694 if (XINT (x, i) != XINT (y, i))
1699 /* Two vectors must have the same length. */
1700 if (XVECLEN (x, i) != XVECLEN (y, i))
1703 /* And the corresponding elements must match. */
1704 for (j = 0; j < XVECLEN (x, i); j++)
1705 if (rtx_equal_for_loop_p (XVECEXP (x, i, j), XVECEXP (y, i, j),
1706 movables, regs) == 0)
1711 if (rtx_equal_for_loop_p (XEXP (x, i), XEXP (y, i), movables, regs)
1717 if (strcmp (XSTR (x, i), XSTR (y, i)))
1722 /* These are just backpointers, so they don't matter. */
1728 /* It is believed that rtx's at this level will never
1729 contain anything but integers and other rtx's,
1730 except for within LABEL_REFs and SYMBOL_REFs. */
1738 /* If X contains any LABEL_REF's, add REG_LABEL notes for them to all
1739 insns in INSNS which use the reference. LABEL_NUSES for CODE_LABEL
1740 references is incremented once for each added note. */
1743 add_label_notes (x, insns)
1747 enum rtx_code code = GET_CODE (x);
1752 if (code == LABEL_REF && !LABEL_REF_NONLOCAL_P (x))
1754 /* This code used to ignore labels that referred to dispatch tables to
1755 avoid flow generating (slighly) worse code.
1757 We no longer ignore such label references (see LABEL_REF handling in
1758 mark_jump_label for additional information). */
1759 for (insn = insns; insn; insn = NEXT_INSN (insn))
1760 if (reg_mentioned_p (XEXP (x, 0), insn))
1762 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_LABEL, XEXP (x, 0),
1764 if (LABEL_P (XEXP (x, 0)))
1765 LABEL_NUSES (XEXP (x, 0))++;
1769 fmt = GET_RTX_FORMAT (code);
1770 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1773 add_label_notes (XEXP (x, i), insns);
1774 else if (fmt[i] == 'E')
1775 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1776 add_label_notes (XVECEXP (x, i, j), insns);
1780 /* Scan MOVABLES, and move the insns that deserve to be moved.
1781 If two matching movables are combined, replace one reg with the
1782 other throughout. */
1785 move_movables (loop, movables, threshold, insn_count)
1787 struct loop_movables *movables;
1791 struct loop_regs *regs = LOOP_REGS (loop);
1792 int nregs = regs->num;
1796 rtx loop_start = loop->start;
1797 rtx loop_end = loop->end;
1798 /* Map of pseudo-register replacements to handle combining
1799 when we move several insns that load the same value
1800 into different pseudo-registers. */
1801 rtx *reg_map = (rtx *) xcalloc (nregs, sizeof (rtx));
1802 char *already_moved = (char *) xcalloc (nregs, sizeof (char));
1804 for (m = movables->head; m; m = m->next)
1806 /* Describe this movable insn. */
1808 if (loop_dump_stream)
1810 fprintf (loop_dump_stream, "Insn %d: regno %d (life %d), ",
1811 INSN_UID (m->insn), m->regno, m->lifetime);
1813 fprintf (loop_dump_stream, "consec %d, ", m->consec);
1815 fprintf (loop_dump_stream, "cond ");
1817 fprintf (loop_dump_stream, "force ");
1819 fprintf (loop_dump_stream, "global ");
1821 fprintf (loop_dump_stream, "done ");
1823 fprintf (loop_dump_stream, "move-insn ");
1825 fprintf (loop_dump_stream, "matches %d ",
1826 INSN_UID (m->match->insn));
1828 fprintf (loop_dump_stream, "forces %d ",
1829 INSN_UID (m->forces->insn));
1832 /* Ignore the insn if it's already done (it matched something else).
1833 Otherwise, see if it is now safe to move. */
1837 || (1 == loop_invariant_p (loop, m->set_src)
1838 && (m->dependencies == 0
1839 || 1 == loop_invariant_p (loop, m->dependencies))
1841 || 1 == consec_sets_invariant_p (loop, m->set_dest,
1844 && (! m->forces || m->forces->done))
1848 int savings = m->savings;
1850 /* We have an insn that is safe to move.
1851 Compute its desirability. */
1856 if (loop_dump_stream)
1857 fprintf (loop_dump_stream, "savings %d ", savings);
1859 if (regs->array[regno].moved_once && loop_dump_stream)
1860 fprintf (loop_dump_stream, "halved since already moved ");
1862 /* An insn MUST be moved if we already moved something else
1863 which is safe only if this one is moved too: that is,
1864 if already_moved[REGNO] is nonzero. */
1866 /* An insn is desirable to move if the new lifetime of the
1867 register is no more than THRESHOLD times the old lifetime.
1868 If it's not desirable, it means the loop is so big
1869 that moving won't speed things up much,
1870 and it is liable to make register usage worse. */
1872 /* It is also desirable to move if it can be moved at no
1873 extra cost because something else was already moved. */
1875 if (already_moved[regno]
1876 || flag_move_all_movables
1877 || (threshold * savings * m->lifetime) >=
1878 (regs->array[regno].moved_once ? insn_count * 2 : insn_count)
1879 || (m->forces && m->forces->done
1880 && regs->array[m->forces->regno].n_times_set == 1))
1884 rtx first = NULL_RTX;
1886 /* Now move the insns that set the reg. */
1888 if (m->partial && m->match)
1892 /* Find the end of this chain of matching regs.
1893 Thus, we load each reg in the chain from that one reg.
1894 And that reg is loaded with 0 directly,
1895 since it has ->match == 0. */
1896 for (m1 = m; m1->match; m1 = m1->match);
1897 newpat = gen_move_insn (SET_DEST (PATTERN (m->insn)),
1898 SET_DEST (PATTERN (m1->insn)));
1899 i1 = loop_insn_hoist (loop, newpat);
1901 /* Mark the moved, invariant reg as being allowed to
1902 share a hard reg with the other matching invariant. */
1903 REG_NOTES (i1) = REG_NOTES (m->insn);
1904 r1 = SET_DEST (PATTERN (m->insn));
1905 r2 = SET_DEST (PATTERN (m1->insn));
1907 = gen_rtx_EXPR_LIST (VOIDmode, r1,
1908 gen_rtx_EXPR_LIST (VOIDmode, r2,
1910 delete_insn (m->insn);
1915 if (loop_dump_stream)
1916 fprintf (loop_dump_stream, " moved to %d", INSN_UID (i1));
1918 /* If we are to re-generate the item being moved with a
1919 new move insn, first delete what we have and then emit
1920 the move insn before the loop. */
1921 else if (m->move_insn)
1925 for (count = m->consec; count >= 0; count--)
1927 /* If this is the first insn of a library call sequence,
1929 if (GET_CODE (p) != NOTE
1930 && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
1933 /* If this is the last insn of a libcall sequence, then
1934 delete every insn in the sequence except the last.
1935 The last insn is handled in the normal manner. */
1936 if (GET_CODE (p) != NOTE
1937 && (temp = find_reg_note (p, REG_RETVAL, NULL_RTX)))
1939 temp = XEXP (temp, 0);
1941 temp = delete_insn (temp);
1945 p = delete_insn (p);
1947 /* simplify_giv_expr expects that it can walk the insns
1948 at m->insn forwards and see this old sequence we are
1949 tossing here. delete_insn does preserve the next
1950 pointers, but when we skip over a NOTE we must fix
1951 it up. Otherwise that code walks into the non-deleted
1953 while (p && GET_CODE (p) == NOTE)
1954 p = NEXT_INSN (temp) = NEXT_INSN (p);
1958 emit_move_insn (m->set_dest, m->set_src);
1959 temp = get_insns ();
1960 seq = gen_sequence ();
1963 add_label_notes (m->set_src, temp);
1965 i1 = loop_insn_hoist (loop, seq);
1966 if (! find_reg_note (i1, REG_EQUAL, NULL_RTX))
1967 set_unique_reg_note (i1,
1968 m->is_equiv ? REG_EQUIV : REG_EQUAL,
1971 if (loop_dump_stream)
1972 fprintf (loop_dump_stream, " moved to %d", INSN_UID (i1));
1974 /* The more regs we move, the less we like moving them. */
1979 for (count = m->consec; count >= 0; count--)
1983 /* If first insn of libcall sequence, skip to end. */
1984 /* Do this at start of loop, since p is guaranteed to
1986 if (GET_CODE (p) != NOTE
1987 && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
1990 /* If last insn of libcall sequence, move all
1991 insns except the last before the loop. The last
1992 insn is handled in the normal manner. */
1993 if (GET_CODE (p) != NOTE
1994 && (temp = find_reg_note (p, REG_RETVAL, NULL_RTX)))
1998 rtx fn_address_insn = 0;
2001 for (temp = XEXP (temp, 0); temp != p;
2002 temp = NEXT_INSN (temp))
2008 if (GET_CODE (temp) == NOTE)
2011 body = PATTERN (temp);
2013 /* Find the next insn after TEMP,
2014 not counting USE or NOTE insns. */
2015 for (next = NEXT_INSN (temp); next != p;
2016 next = NEXT_INSN (next))
2017 if (! (GET_CODE (next) == INSN
2018 && GET_CODE (PATTERN (next)) == USE)
2019 && GET_CODE (next) != NOTE)
2022 /* If that is the call, this may be the insn
2023 that loads the function address.
2025 Extract the function address from the insn
2026 that loads it into a register.
2027 If this insn was cse'd, we get incorrect code.
2029 So emit a new move insn that copies the
2030 function address into the register that the
2031 call insn will use. flow.c will delete any
2032 redundant stores that we have created. */
2033 if (GET_CODE (next) == CALL_INSN
2034 && GET_CODE (body) == SET
2035 && GET_CODE (SET_DEST (body)) == REG
2036 && (n = find_reg_note (temp, REG_EQUAL,
2039 fn_reg = SET_SRC (body);
2040 if (GET_CODE (fn_reg) != REG)
2041 fn_reg = SET_DEST (body);
2042 fn_address = XEXP (n, 0);
2043 fn_address_insn = temp;
2045 /* We have the call insn.
2046 If it uses the register we suspect it might,
2047 load it with the correct address directly. */
2048 if (GET_CODE (temp) == CALL_INSN
2050 && reg_referenced_p (fn_reg, body))
2051 loop_insn_emit_after (loop, 0, fn_address_insn,
2053 (fn_reg, fn_address));
2055 if (GET_CODE (temp) == CALL_INSN)
2057 i1 = loop_call_insn_hoist (loop, body);
2058 /* Because the USAGE information potentially
2059 contains objects other than hard registers
2060 we need to copy it. */
2061 if (CALL_INSN_FUNCTION_USAGE (temp))
2062 CALL_INSN_FUNCTION_USAGE (i1)
2063 = copy_rtx (CALL_INSN_FUNCTION_USAGE (temp));
2066 i1 = loop_insn_hoist (loop, body);
2069 if (temp == fn_address_insn)
2070 fn_address_insn = i1;
2071 REG_NOTES (i1) = REG_NOTES (temp);
2072 REG_NOTES (temp) = NULL;
2078 if (m->savemode != VOIDmode)
2080 /* P sets REG to zero; but we should clear only
2081 the bits that are not covered by the mode
2083 rtx reg = m->set_dest;
2088 tem = expand_simple_binop
2089 (GET_MODE (reg), AND, reg,
2090 GEN_INT ((((HOST_WIDE_INT) 1
2091 << GET_MODE_BITSIZE (m->savemode)))
2093 reg, 1, OPTAB_LIB_WIDEN);
2097 emit_move_insn (reg, tem);
2098 sequence = gen_sequence ();
2100 i1 = loop_insn_hoist (loop, sequence);
2102 else if (GET_CODE (p) == CALL_INSN)
2104 i1 = loop_call_insn_hoist (loop, PATTERN (p));
2105 /* Because the USAGE information potentially
2106 contains objects other than hard registers
2107 we need to copy it. */
2108 if (CALL_INSN_FUNCTION_USAGE (p))
2109 CALL_INSN_FUNCTION_USAGE (i1)
2110 = copy_rtx (CALL_INSN_FUNCTION_USAGE (p));
2112 else if (count == m->consec && m->move_insn_first)
2115 /* The SET_SRC might not be invariant, so we must
2116 use the REG_EQUAL note. */
2118 emit_move_insn (m->set_dest, m->set_src);
2119 temp = get_insns ();
2120 seq = gen_sequence ();
2123 add_label_notes (m->set_src, temp);
2125 i1 = loop_insn_hoist (loop, seq);
2126 if (! find_reg_note (i1, REG_EQUAL, NULL_RTX))
2127 set_unique_reg_note (i1, m->is_equiv ? REG_EQUIV
2128 : REG_EQUAL, m->set_src);
2131 i1 = loop_insn_hoist (loop, PATTERN (p));
2133 if (REG_NOTES (i1) == 0)
2135 REG_NOTES (i1) = REG_NOTES (p);
2136 REG_NOTES (p) = NULL;
2138 /* If there is a REG_EQUAL note present whose value
2139 is not loop invariant, then delete it, since it
2140 may cause problems with later optimization passes.
2141 It is possible for cse to create such notes
2142 like this as a result of record_jump_cond. */
2144 if ((temp = find_reg_note (i1, REG_EQUAL, NULL_RTX))
2145 && ! loop_invariant_p (loop, XEXP (temp, 0)))
2146 remove_note (i1, temp);
2152 if (loop_dump_stream)
2153 fprintf (loop_dump_stream, " moved to %d",
2156 /* If library call, now fix the REG_NOTES that contain
2157 insn pointers, namely REG_LIBCALL on FIRST
2158 and REG_RETVAL on I1. */
2159 if ((temp = find_reg_note (i1, REG_RETVAL, NULL_RTX)))
2161 XEXP (temp, 0) = first;
2162 temp = find_reg_note (first, REG_LIBCALL, NULL_RTX);
2163 XEXP (temp, 0) = i1;
2170 /* simplify_giv_expr expects that it can walk the insns
2171 at m->insn forwards and see this old sequence we are
2172 tossing here. delete_insn does preserve the next
2173 pointers, but when we skip over a NOTE we must fix
2174 it up. Otherwise that code walks into the non-deleted
2176 while (p && GET_CODE (p) == NOTE)
2177 p = NEXT_INSN (temp) = NEXT_INSN (p);
2180 /* The more regs we move, the less we like moving them. */
2184 /* Any other movable that loads the same register
2186 already_moved[regno] = 1;
2188 /* This reg has been moved out of one loop. */
2189 regs->array[regno].moved_once = 1;
2191 /* The reg set here is now invariant. */
2195 for (i = 0; i < LOOP_REGNO_NREGS (regno, m->set_dest); i++)
2196 regs->array[regno+i].set_in_loop = 0;
2201 /* Change the length-of-life info for the register
2202 to say it lives at least the full length of this loop.
2203 This will help guide optimizations in outer loops. */
2205 if (REGNO_FIRST_LUID (regno) > INSN_LUID (loop_start))
2206 /* This is the old insn before all the moved insns.
2207 We can't use the moved insn because it is out of range
2208 in uid_luid. Only the old insns have luids. */
2209 REGNO_FIRST_UID (regno) = INSN_UID (loop_start);
2210 if (REGNO_LAST_LUID (regno) < INSN_LUID (loop_end))
2211 REGNO_LAST_UID (regno) = INSN_UID (loop_end);
2213 /* Combine with this moved insn any other matching movables. */
2216 for (m1 = movables->head; m1; m1 = m1->next)
2221 /* Schedule the reg loaded by M1
2222 for replacement so that shares the reg of M.
2223 If the modes differ (only possible in restricted
2224 circumstances, make a SUBREG.
2226 Note this assumes that the target dependent files
2227 treat REG and SUBREG equally, including within
2228 GO_IF_LEGITIMATE_ADDRESS and in all the
2229 predicates since we never verify that replacing the
2230 original register with a SUBREG results in a
2231 recognizable insn. */
2232 if (GET_MODE (m->set_dest) == GET_MODE (m1->set_dest))
2233 reg_map[m1->regno] = m->set_dest;
2236 = gen_lowpart_common (GET_MODE (m1->set_dest),
2239 /* Get rid of the matching insn
2240 and prevent further processing of it. */
2243 /* if library call, delete all insns. */
2244 if ((temp = find_reg_note (m1->insn, REG_RETVAL,
2246 delete_insn_chain (XEXP (temp, 0), m1->insn);
2248 delete_insn (m1->insn);
2250 /* Any other movable that loads the same register
2252 already_moved[m1->regno] = 1;
2254 /* The reg merged here is now invariant,
2255 if the reg it matches is invariant. */
2260 i < LOOP_REGNO_NREGS (regno, m1->set_dest);
2262 regs->array[m1->regno+i].set_in_loop = 0;
2266 else if (loop_dump_stream)
2267 fprintf (loop_dump_stream, "not desirable");
2269 else if (loop_dump_stream && !m->match)
2270 fprintf (loop_dump_stream, "not safe");
2272 if (loop_dump_stream)
2273 fprintf (loop_dump_stream, "\n");
2277 new_start = loop_start;
2279 /* Go through all the instructions in the loop, making
2280 all the register substitutions scheduled in REG_MAP. */
2281 for (p = new_start; p != loop_end; p = NEXT_INSN (p))
2282 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
2283 || GET_CODE (p) == CALL_INSN)
2285 replace_regs (PATTERN (p), reg_map, nregs, 0);
2286 replace_regs (REG_NOTES (p), reg_map, nregs, 0);
2292 free (already_moved);
2297 loop_movables_add (movables, m)
2298 struct loop_movables *movables;
2301 if (movables->head == 0)
2304 movables->last->next = m;
2310 loop_movables_free (movables)
2311 struct loop_movables *movables;
2314 struct movable *m_next;
2316 for (m = movables->head; m; m = m_next)
2324 /* Scan X and replace the address of any MEM in it with ADDR.
2325 REG is the address that MEM should have before the replacement. */
2328 replace_call_address (x, reg, addr)
2337 code = GET_CODE (x);
2351 /* Short cut for very common case. */
2352 replace_call_address (XEXP (x, 1), reg, addr);
2356 /* Short cut for very common case. */
2357 replace_call_address (XEXP (x, 0), reg, addr);
2361 /* If this MEM uses a reg other than the one we expected,
2362 something is wrong. */
2363 if (XEXP (x, 0) != reg)
2372 fmt = GET_RTX_FORMAT (code);
2373 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2376 replace_call_address (XEXP (x, i), reg, addr);
2377 else if (fmt[i] == 'E')
2380 for (j = 0; j < XVECLEN (x, i); j++)
2381 replace_call_address (XVECEXP (x, i, j), reg, addr);
2387 /* Return the number of memory refs to addresses that vary
2391 count_nonfixed_reads (loop, x)
2392 const struct loop *loop;
2403 code = GET_CODE (x);
2417 return ((loop_invariant_p (loop, XEXP (x, 0)) != 1)
2418 + count_nonfixed_reads (loop, XEXP (x, 0)));
2425 fmt = GET_RTX_FORMAT (code);
2426 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2429 value += count_nonfixed_reads (loop, XEXP (x, i));
2433 for (j = 0; j < XVECLEN (x, i); j++)
2434 value += count_nonfixed_reads (loop, XVECEXP (x, i, j));
2440 /* Scan a loop setting the elements `cont', `vtop', `loops_enclosed',
2441 `has_call', `has_nonconst_call', `has_volatile', `has_tablejump',
2442 `unknown_address_altered', `unknown_constant_address_altered', and
2443 `num_mem_sets' in LOOP. Also, fill in the array `mems' and the
2444 list `store_mems' in LOOP. */
2452 struct loop_info *loop_info = LOOP_INFO (loop);
2453 rtx start = loop->start;
2454 rtx end = loop->end;
2455 /* The label after END. Jumping here is just like falling off the
2456 end of the loop. We use next_nonnote_insn instead of next_label
2457 as a hedge against the (pathological) case where some actual insn
2458 might end up between the two. */
2459 rtx exit_target = next_nonnote_insn (end);
2461 loop_info->has_indirect_jump = indirect_jump_in_function;
2462 loop_info->pre_header_has_call = 0;
2463 loop_info->has_call = 0;
2464 loop_info->has_nonconst_call = 0;
2465 loop_info->has_volatile = 0;
2466 loop_info->has_tablejump = 0;
2467 loop_info->has_multiple_exit_targets = 0;
2470 loop_info->unknown_address_altered = 0;
2471 loop_info->unknown_constant_address_altered = 0;
2472 loop_info->store_mems = NULL_RTX;
2473 loop_info->first_loop_store_insn = NULL_RTX;
2474 loop_info->mems_idx = 0;
2475 loop_info->num_mem_sets = 0;
2478 for (insn = start; insn && GET_CODE (insn) != CODE_LABEL;
2479 insn = PREV_INSN (insn))
2481 if (GET_CODE (insn) == CALL_INSN)
2483 loop_info->pre_header_has_call = 1;
2488 for (insn = NEXT_INSN (start); insn != NEXT_INSN (end);
2489 insn = NEXT_INSN (insn))
2491 switch (GET_CODE (insn))
2494 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
2497 /* Count number of loops contained in this one. */
2500 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END)
2505 if (! CONST_OR_PURE_CALL_P (insn))
2507 loop_info->unknown_address_altered = 1;
2508 loop_info->has_nonconst_call = 1;
2510 else if (pure_call_p (insn))
2511 loop_info->has_nonconst_call = 1;
2512 loop_info->has_call = 1;
2513 if (can_throw_internal (insn))
2514 loop_info->has_multiple_exit_targets = 1;
2518 if (! loop_info->has_multiple_exit_targets)
2520 rtx set = pc_set (insn);
2524 rtx src = SET_SRC (set);
2527 if (GET_CODE (src) == IF_THEN_ELSE)
2529 label1 = XEXP (src, 1);
2530 label2 = XEXP (src, 2);
2540 if (label1 && label1 != pc_rtx)
2542 if (GET_CODE (label1) != LABEL_REF)
2544 /* Something tricky. */
2545 loop_info->has_multiple_exit_targets = 1;
2548 else if (XEXP (label1, 0) != exit_target
2549 && LABEL_OUTSIDE_LOOP_P (label1))
2551 /* A jump outside the current loop. */
2552 loop_info->has_multiple_exit_targets = 1;
2564 /* A return, or something tricky. */
2565 loop_info->has_multiple_exit_targets = 1;
2571 if (volatile_refs_p (PATTERN (insn)))
2572 loop_info->has_volatile = 1;
2574 if (GET_CODE (insn) == JUMP_INSN
2575 && (GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC
2576 || GET_CODE (PATTERN (insn)) == ADDR_VEC))
2577 loop_info->has_tablejump = 1;
2579 note_stores (PATTERN (insn), note_addr_stored, loop_info);
2580 if (! loop_info->first_loop_store_insn && loop_info->store_mems)
2581 loop_info->first_loop_store_insn = insn;
2583 if (flag_non_call_exceptions && can_throw_internal (insn))
2584 loop_info->has_multiple_exit_targets = 1;
2592 /* Now, rescan the loop, setting up the LOOP_MEMS array. */
2593 if (/* An exception thrown by a called function might land us
2595 ! loop_info->has_nonconst_call
2596 /* We don't want loads for MEMs moved to a location before the
2597 one at which their stack memory becomes allocated. (Note
2598 that this is not a problem for malloc, etc., since those
2599 require actual function calls. */
2600 && ! current_function_calls_alloca
2601 /* There are ways to leave the loop other than falling off the
2603 && ! loop_info->has_multiple_exit_targets)
2604 for (insn = NEXT_INSN (start); insn != NEXT_INSN (end);
2605 insn = NEXT_INSN (insn))
2606 for_each_rtx (&insn, insert_loop_mem, loop_info);
2608 /* BLKmode MEMs are added to LOOP_STORE_MEM as necessary so
2609 that loop_invariant_p and load_mems can use true_dependence
2610 to determine what is really clobbered. */
2611 if (loop_info->unknown_address_altered)
2613 rtx mem = gen_rtx_MEM (BLKmode, const0_rtx);
2615 loop_info->store_mems
2616 = gen_rtx_EXPR_LIST (VOIDmode, mem, loop_info->store_mems);
2618 if (loop_info->unknown_constant_address_altered)
2620 rtx mem = gen_rtx_MEM (BLKmode, const0_rtx);
2622 RTX_UNCHANGING_P (mem) = 1;
2623 loop_info->store_mems
2624 = gen_rtx_EXPR_LIST (VOIDmode, mem, loop_info->store_mems);
2628 /* Invalidate all loops containing LABEL. */
2631 invalidate_loops_containing_label (label)
2635 for (loop = uid_loop[INSN_UID (label)]; loop; loop = loop->outer)
2639 /* Scan the function looking for loops. Record the start and end of each loop.
2640 Also mark as invalid loops any loops that contain a setjmp or are branched
2641 to from outside the loop. */
2644 find_and_verify_loops (f, loops)
2646 struct loops *loops;
2651 struct loop *current_loop;
2652 struct loop *next_loop;
2655 num_loops = loops->num;
2657 compute_luids (f, NULL_RTX, 0);
2659 /* If there are jumps to undefined labels,
2660 treat them as jumps out of any/all loops.
2661 This also avoids writing past end of tables when there are no loops. */
2664 /* Find boundaries of loops, mark which loops are contained within
2665 loops, and invalidate loops that have setjmp. */
2668 current_loop = NULL;
2669 for (insn = f; insn; insn = NEXT_INSN (insn))
2671 if (GET_CODE (insn) == NOTE)
2672 switch (NOTE_LINE_NUMBER (insn))
2674 case NOTE_INSN_LOOP_BEG:
2675 next_loop = loops->array + num_loops;
2676 next_loop->num = num_loops;
2678 next_loop->start = insn;
2679 next_loop->outer = current_loop;
2680 current_loop = next_loop;
2683 case NOTE_INSN_LOOP_CONT:
2684 current_loop->cont = insn;
2687 case NOTE_INSN_LOOP_VTOP:
2688 current_loop->vtop = insn;
2691 case NOTE_INSN_LOOP_END:
2695 current_loop->end = insn;
2696 current_loop = current_loop->outer;
2703 if (GET_CODE (insn) == CALL_INSN
2704 && find_reg_note (insn, REG_SETJMP, NULL))
2706 /* In this case, we must invalidate our current loop and any
2708 for (loop = current_loop; loop; loop = loop->outer)
2711 if (loop_dump_stream)
2712 fprintf (loop_dump_stream,
2713 "\nLoop at %d ignored due to setjmp.\n",
2714 INSN_UID (loop->start));
2718 /* Note that this will mark the NOTE_INSN_LOOP_END note as being in the
2719 enclosing loop, but this doesn't matter. */
2720 uid_loop[INSN_UID (insn)] = current_loop;
2723 /* Any loop containing a label used in an initializer must be invalidated,
2724 because it can be jumped into from anywhere. */
2725 for (label = forced_labels; label; label = XEXP (label, 1))
2726 invalidate_loops_containing_label (XEXP (label, 0));
2728 /* Any loop containing a label used for an exception handler must be
2729 invalidated, because it can be jumped into from anywhere. */
2730 for_each_eh_label (invalidate_loops_containing_label);
2732 /* Now scan all insn's in the function. If any JUMP_INSN branches into a
2733 loop that it is not contained within, that loop is marked invalid.
2734 If any INSN or CALL_INSN uses a label's address, then the loop containing
2735 that label is marked invalid, because it could be jumped into from
2738 Also look for blocks of code ending in an unconditional branch that
2739 exits the loop. If such a block is surrounded by a conditional
2740 branch around the block, move the block elsewhere (see below) and
2741 invert the jump to point to the code block. This may eliminate a
2742 label in our loop and will simplify processing by both us and a
2743 possible second cse pass. */
2745 for (insn = f; insn; insn = NEXT_INSN (insn))
2748 struct loop *this_loop = uid_loop[INSN_UID (insn)];
2750 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
2752 rtx note = find_reg_note (insn, REG_LABEL, NULL_RTX);
2754 invalidate_loops_containing_label (XEXP (note, 0));
2757 if (GET_CODE (insn) != JUMP_INSN)
2760 mark_loop_jump (PATTERN (insn), this_loop);
2762 /* See if this is an unconditional branch outside the loop. */
2764 && (GET_CODE (PATTERN (insn)) == RETURN
2765 || (any_uncondjump_p (insn)
2766 && onlyjump_p (insn)
2767 && (uid_loop[INSN_UID (JUMP_LABEL (insn))]
2769 && get_max_uid () < max_uid_for_loop)
2772 rtx our_next = next_real_insn (insn);
2773 rtx last_insn_to_move = NEXT_INSN (insn);
2774 struct loop *dest_loop;
2775 struct loop *outer_loop = NULL;
2777 /* Go backwards until we reach the start of the loop, a label,
2779 for (p = PREV_INSN (insn);
2780 GET_CODE (p) != CODE_LABEL
2781 && ! (GET_CODE (p) == NOTE
2782 && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
2783 && GET_CODE (p) != JUMP_INSN;
2787 /* Check for the case where we have a jump to an inner nested
2788 loop, and do not perform the optimization in that case. */
2790 if (JUMP_LABEL (insn))
2792 dest_loop = uid_loop[INSN_UID (JUMP_LABEL (insn))];
2795 for (outer_loop = dest_loop; outer_loop;
2796 outer_loop = outer_loop->outer)
2797 if (outer_loop == this_loop)
2802 /* Make sure that the target of P is within the current loop. */
2804 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p)
2805 && uid_loop[INSN_UID (JUMP_LABEL (p))] != this_loop)
2806 outer_loop = this_loop;
2808 /* If we stopped on a JUMP_INSN to the next insn after INSN,
2809 we have a block of code to try to move.
2811 We look backward and then forward from the target of INSN
2812 to find a BARRIER at the same loop depth as the target.
2813 If we find such a BARRIER, we make a new label for the start
2814 of the block, invert the jump in P and point it to that label,
2815 and move the block of code to the spot we found. */
2818 && GET_CODE (p) == JUMP_INSN
2819 && JUMP_LABEL (p) != 0
2820 /* Just ignore jumps to labels that were never emitted.
2821 These always indicate compilation errors. */
2822 && INSN_UID (JUMP_LABEL (p)) != 0
2823 && any_condjump_p (p) && onlyjump_p (p)
2824 && next_real_insn (JUMP_LABEL (p)) == our_next
2825 /* If it's not safe to move the sequence, then we
2827 && insns_safe_to_move_p (p, NEXT_INSN (insn),
2828 &last_insn_to_move))
2831 = JUMP_LABEL (insn) ? JUMP_LABEL (insn) : get_last_insn ();
2832 struct loop *target_loop = uid_loop[INSN_UID (target)];
2836 /* Search for possible garbage past the conditional jumps
2837 and look for the last barrier. */
2838 for (tmp = last_insn_to_move;
2839 tmp && GET_CODE (tmp) != CODE_LABEL; tmp = NEXT_INSN (tmp))
2840 if (GET_CODE (tmp) == BARRIER)
2841 last_insn_to_move = tmp;
2843 for (loc = target; loc; loc = PREV_INSN (loc))
2844 if (GET_CODE (loc) == BARRIER
2845 /* Don't move things inside a tablejump. */
2846 && ((loc2 = next_nonnote_insn (loc)) == 0
2847 || GET_CODE (loc2) != CODE_LABEL
2848 || (loc2 = next_nonnote_insn (loc2)) == 0
2849 || GET_CODE (loc2) != JUMP_INSN
2850 || (GET_CODE (PATTERN (loc2)) != ADDR_VEC
2851 && GET_CODE (PATTERN (loc2)) != ADDR_DIFF_VEC))
2852 && uid_loop[INSN_UID (loc)] == target_loop)
2856 for (loc = target; loc; loc = NEXT_INSN (loc))
2857 if (GET_CODE (loc) == BARRIER
2858 /* Don't move things inside a tablejump. */
2859 && ((loc2 = next_nonnote_insn (loc)) == 0
2860 || GET_CODE (loc2) != CODE_LABEL
2861 || (loc2 = next_nonnote_insn (loc2)) == 0
2862 || GET_CODE (loc2) != JUMP_INSN
2863 || (GET_CODE (PATTERN (loc2)) != ADDR_VEC
2864 && GET_CODE (PATTERN (loc2)) != ADDR_DIFF_VEC))
2865 && uid_loop[INSN_UID (loc)] == target_loop)
2870 rtx cond_label = JUMP_LABEL (p);
2871 rtx new_label = get_label_after (p);
2873 /* Ensure our label doesn't go away. */
2874 LABEL_NUSES (cond_label)++;
2876 /* Verify that uid_loop is large enough and that
2878 if (invert_jump (p, new_label, 1))
2882 /* If no suitable BARRIER was found, create a suitable
2883 one before TARGET. Since TARGET is a fall through
2884 path, we'll need to insert an jump around our block
2885 and add a BARRIER before TARGET.
2887 This creates an extra unconditional jump outside
2888 the loop. However, the benefits of removing rarely
2889 executed instructions from inside the loop usually
2890 outweighs the cost of the extra unconditional jump
2891 outside the loop. */
2896 temp = gen_jump (JUMP_LABEL (insn));
2897 temp = emit_jump_insn_before (temp, target);
2898 JUMP_LABEL (temp) = JUMP_LABEL (insn);
2899 LABEL_NUSES (JUMP_LABEL (insn))++;
2900 loc = emit_barrier_before (target);
2903 /* Include the BARRIER after INSN and copy the
2905 if (squeeze_notes (&new_label, &last_insn_to_move))
2907 reorder_insns (new_label, last_insn_to_move, loc);
2909 /* All those insns are now in TARGET_LOOP. */
2911 q != NEXT_INSN (last_insn_to_move);
2913 uid_loop[INSN_UID (q)] = target_loop;
2915 /* The label jumped to by INSN is no longer a loop
2916 exit. Unless INSN does not have a label (e.g.,
2917 it is a RETURN insn), search loop->exit_labels
2918 to find its label_ref, and remove it. Also turn
2919 off LABEL_OUTSIDE_LOOP_P bit. */
2920 if (JUMP_LABEL (insn))
2922 for (q = 0, r = this_loop->exit_labels;
2924 q = r, r = LABEL_NEXTREF (r))
2925 if (XEXP (r, 0) == JUMP_LABEL (insn))
2927 LABEL_OUTSIDE_LOOP_P (r) = 0;
2929 LABEL_NEXTREF (q) = LABEL_NEXTREF (r);
2931 this_loop->exit_labels = LABEL_NEXTREF (r);
2935 for (loop = this_loop; loop && loop != target_loop;
2939 /* If we didn't find it, then something is
2945 /* P is now a jump outside the loop, so it must be put
2946 in loop->exit_labels, and marked as such.
2947 The easiest way to do this is to just call
2948 mark_loop_jump again for P. */
2949 mark_loop_jump (PATTERN (p), this_loop);
2951 /* If INSN now jumps to the insn after it,
2953 if (JUMP_LABEL (insn) != 0
2954 && (next_real_insn (JUMP_LABEL (insn))
2955 == next_real_insn (insn)))
2956 delete_related_insns (insn);
2959 /* Continue the loop after where the conditional
2960 branch used to jump, since the only branch insn
2961 in the block (if it still remains) is an inter-loop
2962 branch and hence needs no processing. */
2963 insn = NEXT_INSN (cond_label);
2965 if (--LABEL_NUSES (cond_label) == 0)
2966 delete_related_insns (cond_label);
2968 /* This loop will be continued with NEXT_INSN (insn). */
2969 insn = PREV_INSN (insn);
2976 /* If any label in X jumps to a loop different from LOOP_NUM and any of the
2977 loops it is contained in, mark the target loop invalid.
2979 For speed, we assume that X is part of a pattern of a JUMP_INSN. */
2982 mark_loop_jump (x, loop)
2986 struct loop *dest_loop;
2987 struct loop *outer_loop;
2990 switch (GET_CODE (x))
3003 /* There could be a label reference in here. */
3004 mark_loop_jump (XEXP (x, 0), loop);
3010 mark_loop_jump (XEXP (x, 0), loop);
3011 mark_loop_jump (XEXP (x, 1), loop);
3015 /* This may refer to a LABEL_REF or SYMBOL_REF. */
3016 mark_loop_jump (XEXP (x, 1), loop);
3021 mark_loop_jump (XEXP (x, 0), loop);
3025 dest_loop = uid_loop[INSN_UID (XEXP (x, 0))];
3027 /* Link together all labels that branch outside the loop. This
3028 is used by final_[bg]iv_value and the loop unrolling code. Also
3029 mark this LABEL_REF so we know that this branch should predict
3032 /* A check to make sure the label is not in an inner nested loop,
3033 since this does not count as a loop exit. */
3036 for (outer_loop = dest_loop; outer_loop;
3037 outer_loop = outer_loop->outer)
3038 if (outer_loop == loop)
3044 if (loop && ! outer_loop)
3046 LABEL_OUTSIDE_LOOP_P (x) = 1;
3047 LABEL_NEXTREF (x) = loop->exit_labels;
3048 loop->exit_labels = x;
3050 for (outer_loop = loop;
3051 outer_loop && outer_loop != dest_loop;
3052 outer_loop = outer_loop->outer)
3053 outer_loop->exit_count++;
3056 /* If this is inside a loop, but not in the current loop or one enclosed
3057 by it, it invalidates at least one loop. */
3062 /* We must invalidate every nested loop containing the target of this
3063 label, except those that also contain the jump insn. */
3065 for (; dest_loop; dest_loop = dest_loop->outer)
3067 /* Stop when we reach a loop that also contains the jump insn. */
3068 for (outer_loop = loop; outer_loop; outer_loop = outer_loop->outer)
3069 if (dest_loop == outer_loop)
3072 /* If we get here, we know we need to invalidate a loop. */
3073 if (loop_dump_stream && ! dest_loop->invalid)
3074 fprintf (loop_dump_stream,
3075 "\nLoop at %d ignored due to multiple entry points.\n",
3076 INSN_UID (dest_loop->start));
3078 dest_loop->invalid = 1;
3083 /* If this is not setting pc, ignore. */
3084 if (SET_DEST (x) == pc_rtx)
3085 mark_loop_jump (SET_SRC (x), loop);
3089 mark_loop_jump (XEXP (x, 1), loop);
3090 mark_loop_jump (XEXP (x, 2), loop);
3095 for (i = 0; i < XVECLEN (x, 0); i++)
3096 mark_loop_jump (XVECEXP (x, 0, i), loop);
3100 for (i = 0; i < XVECLEN (x, 1); i++)
3101 mark_loop_jump (XVECEXP (x, 1, i), loop);
3105 /* Strictly speaking this is not a jump into the loop, only a possible
3106 jump out of the loop. However, we have no way to link the destination
3107 of this jump onto the list of exit labels. To be safe we mark this
3108 loop and any containing loops as invalid. */
3111 for (outer_loop = loop; outer_loop; outer_loop = outer_loop->outer)
3113 if (loop_dump_stream && ! outer_loop->invalid)
3114 fprintf (loop_dump_stream,
3115 "\nLoop at %d ignored due to unknown exit jump.\n",
3116 INSN_UID (outer_loop->start));
3117 outer_loop->invalid = 1;
3124 /* Return nonzero if there is a label in the range from
3125 insn INSN to and including the insn whose luid is END
3126 INSN must have an assigned luid (i.e., it must not have
3127 been previously created by loop.c). */
3130 labels_in_range_p (insn, end)
3134 while (insn && INSN_LUID (insn) <= end)
3136 if (GET_CODE (insn) == CODE_LABEL)
3138 insn = NEXT_INSN (insn);
3144 /* Record that a memory reference X is being set. */
3147 note_addr_stored (x, y, data)
3149 rtx y ATTRIBUTE_UNUSED;
3150 void *data ATTRIBUTE_UNUSED;
3152 struct loop_info *loop_info = data;
3154 if (x == 0 || GET_CODE (x) != MEM)
3157 /* Count number of memory writes.
3158 This affects heuristics in strength_reduce. */
3159 loop_info->num_mem_sets++;
3161 /* BLKmode MEM means all memory is clobbered. */
3162 if (GET_MODE (x) == BLKmode)
3164 if (RTX_UNCHANGING_P (x))
3165 loop_info->unknown_constant_address_altered = 1;
3167 loop_info->unknown_address_altered = 1;
3172 loop_info->store_mems = gen_rtx_EXPR_LIST (VOIDmode, x,
3173 loop_info->store_mems);
3176 /* X is a value modified by an INSN that references a biv inside a loop
3177 exit test (ie, X is somehow related to the value of the biv). If X
3178 is a pseudo that is used more than once, then the biv is (effectively)
3179 used more than once. DATA is a pointer to a loop_regs structure. */
3182 note_set_pseudo_multiple_uses (x, y, data)
3184 rtx y ATTRIBUTE_UNUSED;
3187 struct loop_regs *regs = (struct loop_regs *) data;
3192 while (GET_CODE (x) == STRICT_LOW_PART
3193 || GET_CODE (x) == SIGN_EXTRACT
3194 || GET_CODE (x) == ZERO_EXTRACT
3195 || GET_CODE (x) == SUBREG)
3198 if (GET_CODE (x) != REG || REGNO (x) < FIRST_PSEUDO_REGISTER)
3201 /* If we do not have usage information, or if we know the register
3202 is used more than once, note that fact for check_dbra_loop. */
3203 if (REGNO (x) >= max_reg_before_loop
3204 || ! regs->array[REGNO (x)].single_usage
3205 || regs->array[REGNO (x)].single_usage == const0_rtx)
3206 regs->multiple_uses = 1;
3209 /* Return nonzero if the rtx X is invariant over the current loop.
3211 The value is 2 if we refer to something only conditionally invariant.
3213 A memory ref is invariant if it is not volatile and does not conflict
3214 with anything stored in `loop_info->store_mems'. */
3217 loop_invariant_p (loop, x)
3218 const struct loop *loop;
3221 struct loop_info *loop_info = LOOP_INFO (loop);
3222 struct loop_regs *regs = LOOP_REGS (loop);
3226 int conditional = 0;
3231 code = GET_CODE (x);
3241 /* A LABEL_REF is normally invariant, however, if we are unrolling
3242 loops, and this label is inside the loop, then it isn't invariant.
3243 This is because each unrolled copy of the loop body will have
3244 a copy of this label. If this was invariant, then an insn loading
3245 the address of this label into a register might get moved outside
3246 the loop, and then each loop body would end up using the same label.
3248 We don't know the loop bounds here though, so just fail for all
3250 if (flag_unroll_loops)
3257 case UNSPEC_VOLATILE:
3261 /* We used to check RTX_UNCHANGING_P (x) here, but that is invalid
3262 since the reg might be set by initialization within the loop. */
3264 if ((x == frame_pointer_rtx || x == hard_frame_pointer_rtx
3265 || x == arg_pointer_rtx || x == pic_offset_table_rtx)
3266 && ! current_function_has_nonlocal_goto)
3269 if (LOOP_INFO (loop)->has_call
3270 && REGNO (x) < FIRST_PSEUDO_REGISTER && call_used_regs[REGNO (x)])
3273 if (regs->array[REGNO (x)].set_in_loop < 0)
3276 return regs->array[REGNO (x)].set_in_loop == 0;
3279 /* Volatile memory references must be rejected. Do this before
3280 checking for read-only items, so that volatile read-only items
3281 will be rejected also. */
3282 if (MEM_VOLATILE_P (x))
3285 /* See if there is any dependence between a store and this load. */
3286 mem_list_entry = loop_info->store_mems;
3287 while (mem_list_entry)
3289 if (true_dependence (XEXP (mem_list_entry, 0), VOIDmode,
3293 mem_list_entry = XEXP (mem_list_entry, 1);
3296 /* It's not invalidated by a store in memory
3297 but we must still verify the address is invariant. */
3301 /* Don't mess with insns declared volatile. */
3302 if (MEM_VOLATILE_P (x))
3310 fmt = GET_RTX_FORMAT (code);
3311 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3315 int tem = loop_invariant_p (loop, XEXP (x, i));
3321 else if (fmt[i] == 'E')
3324 for (j = 0; j < XVECLEN (x, i); j++)
3326 int tem = loop_invariant_p (loop, XVECEXP (x, i, j));
3336 return 1 + conditional;
3339 /* Return nonzero if all the insns in the loop that set REG
3340 are INSN and the immediately following insns,
3341 and if each of those insns sets REG in an invariant way
3342 (not counting uses of REG in them).
3344 The value is 2 if some of these insns are only conditionally invariant.
3346 We assume that INSN itself is the first set of REG
3347 and that its source is invariant. */
3350 consec_sets_invariant_p (loop, reg, n_sets, insn)
3351 const struct loop *loop;
3355 struct loop_regs *regs = LOOP_REGS (loop);
3357 unsigned int regno = REGNO (reg);
3359 /* Number of sets we have to insist on finding after INSN. */
3360 int count = n_sets - 1;
3361 int old = regs->array[regno].set_in_loop;
3365 /* If N_SETS hit the limit, we can't rely on its value. */
3369 regs->array[regno].set_in_loop = 0;
3377 code = GET_CODE (p);
3379 /* If library call, skip to end of it. */
3380 if (code == INSN && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
3385 && (set = single_set (p))
3386 && GET_CODE (SET_DEST (set)) == REG
3387 && REGNO (SET_DEST (set)) == regno)
3389 this = loop_invariant_p (loop, SET_SRC (set));
3392 else if ((temp = find_reg_note (p, REG_EQUAL, NULL_RTX)))
3394 /* If this is a libcall, then any invariant REG_EQUAL note is OK.
3395 If this is an ordinary insn, then only CONSTANT_P REG_EQUAL
3397 this = (CONSTANT_P (XEXP (temp, 0))
3398 || (find_reg_note (p, REG_RETVAL, NULL_RTX)
3399 && loop_invariant_p (loop, XEXP (temp, 0))));
3406 else if (code != NOTE)
3408 regs->array[regno].set_in_loop = old;
3413 regs->array[regno].set_in_loop = old;
3414 /* If loop_invariant_p ever returned 2, we return 2. */
3415 return 1 + (value & 2);
3419 /* I don't think this condition is sufficient to allow INSN
3420 to be moved, so we no longer test it. */
3422 /* Return 1 if all insns in the basic block of INSN and following INSN
3423 that set REG are invariant according to TABLE. */
3426 all_sets_invariant_p (reg, insn, table)
3431 int regno = REGNO (reg);
3437 code = GET_CODE (p);
3438 if (code == CODE_LABEL || code == JUMP_INSN)
3440 if (code == INSN && GET_CODE (PATTERN (p)) == SET
3441 && GET_CODE (SET_DEST (PATTERN (p))) == REG
3442 && REGNO (SET_DEST (PATTERN (p))) == regno)
3444 if (! loop_invariant_p (loop, SET_SRC (PATTERN (p)), table))
3451 /* Look at all uses (not sets) of registers in X. For each, if it is
3452 the single use, set USAGE[REGNO] to INSN; if there was a previous use in
3453 a different insn, set USAGE[REGNO] to const0_rtx. */
3456 find_single_use_in_loop (regs, insn, x)
3457 struct loop_regs *regs;
3461 enum rtx_code code = GET_CODE (x);
3462 const char *fmt = GET_RTX_FORMAT (code);
3466 regs->array[REGNO (x)].single_usage
3467 = (regs->array[REGNO (x)].single_usage != 0
3468 && regs->array[REGNO (x)].single_usage != insn)
3469 ? const0_rtx : insn;
3471 else if (code == SET)
3473 /* Don't count SET_DEST if it is a REG; otherwise count things
3474 in SET_DEST because if a register is partially modified, it won't
3475 show up as a potential movable so we don't care how USAGE is set
3477 if (GET_CODE (SET_DEST (x)) != REG)
3478 find_single_use_in_loop (regs, insn, SET_DEST (x));
3479 find_single_use_in_loop (regs, insn, SET_SRC (x));
3482 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3484 if (fmt[i] == 'e' && XEXP (x, i) != 0)
3485 find_single_use_in_loop (regs, insn, XEXP (x, i));
3486 else if (fmt[i] == 'E')
3487 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3488 find_single_use_in_loop (regs, insn, XVECEXP (x, i, j));
3492 /* Count and record any set in X which is contained in INSN. Update
3493 REGS->array[I].MAY_NOT_OPTIMIZE and LAST_SET for any register I set
3497 count_one_set (regs, insn, x, last_set)
3498 struct loop_regs *regs;
3502 if (GET_CODE (x) == CLOBBER && GET_CODE (XEXP (x, 0)) == REG)
3503 /* Don't move a reg that has an explicit clobber.
3504 It's not worth the pain to try to do it correctly. */
3505 regs->array[REGNO (XEXP (x, 0))].may_not_optimize = 1;
3507 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
3509 rtx dest = SET_DEST (x);
3510 while (GET_CODE (dest) == SUBREG
3511 || GET_CODE (dest) == ZERO_EXTRACT
3512 || GET_CODE (dest) == SIGN_EXTRACT
3513 || GET_CODE (dest) == STRICT_LOW_PART)
3514 dest = XEXP (dest, 0);
3515 if (GET_CODE (dest) == REG)
3518 int regno = REGNO (dest);
3519 for (i = 0; i < LOOP_REGNO_NREGS (regno, dest); i++)
3521 /* If this is the first setting of this reg
3522 in current basic block, and it was set before,
3523 it must be set in two basic blocks, so it cannot
3524 be moved out of the loop. */
3525 if (regs->array[regno].set_in_loop > 0
3527 regs->array[regno+i].may_not_optimize = 1;
3528 /* If this is not first setting in current basic block,
3529 see if reg was used in between previous one and this.
3530 If so, neither one can be moved. */
3531 if (last_set[regno] != 0
3532 && reg_used_between_p (dest, last_set[regno], insn))
3533 regs->array[regno+i].may_not_optimize = 1;
3534 if (regs->array[regno+i].set_in_loop < 127)
3535 ++regs->array[regno+i].set_in_loop;
3536 last_set[regno+i] = insn;
3542 /* Given a loop that is bounded by LOOP->START and LOOP->END and that
3543 is entered at LOOP->SCAN_START, return 1 if the register set in SET
3544 contained in insn INSN is used by any insn that precedes INSN in
3545 cyclic order starting from the loop entry point.
3547 We don't want to use INSN_LUID here because if we restrict INSN to those
3548 that have a valid INSN_LUID, it means we cannot move an invariant out
3549 from an inner loop past two loops. */
3552 loop_reg_used_before_p (loop, set, insn)
3553 const struct loop *loop;
3556 rtx reg = SET_DEST (set);
3559 /* Scan forward checking for register usage. If we hit INSN, we
3560 are done. Otherwise, if we hit LOOP->END, wrap around to LOOP->START. */
3561 for (p = loop->scan_start; p != insn; p = NEXT_INSN (p))
3563 if (INSN_P (p) && reg_overlap_mentioned_p (reg, PATTERN (p)))
3574 /* Information we collect about arrays that we might want to prefetch. */
3575 struct prefetch_info
3577 struct iv_class *class; /* Class this prefetch is based on. */
3578 struct induction *giv; /* GIV this prefetch is based on. */
3579 rtx base_address; /* Start prefetching from this address plus
3581 HOST_WIDE_INT index;
3582 HOST_WIDE_INT stride; /* Prefetch stride in bytes in each
3584 unsigned int bytes_accessed; /* Sum of sizes of all acceses to this
3585 prefetch area in one iteration. */
3586 unsigned int total_bytes; /* Total bytes loop will access in this block.
3587 This is set only for loops with known
3588 iteration counts and is 0xffffffff
3590 unsigned int write : 1; /* 1 for read/write prefetches. */
3591 unsigned int prefetch_in_loop : 1;
3592 /* 1 for those chosen for prefetching. */
3593 unsigned int prefetch_before_loop : 1;
3594 /* 1 for those chosen for prefetching. */
3597 /* Data used by check_store function. */
3598 struct check_store_data
3604 static void check_store PARAMS ((rtx, rtx, void *));
3605 static void emit_prefetch_instructions PARAMS ((struct loop *));
3606 static int rtx_equal_for_prefetch_p PARAMS ((rtx, rtx));
3608 /* Set mem_write when mem_address is found. Used as callback to
3611 check_store (x, pat, data)
3612 rtx x, pat ATTRIBUTE_UNUSED;
3615 struct check_store_data *d = (struct check_store_data *) data;
3617 if ((GET_CODE (x) == MEM) && rtx_equal_p (d->mem_address, XEXP (x, 0)))
3621 /* Like rtx_equal_p, but attempts to swap commutative operands. This is
3622 important to get some addresses combined. Later more sophisticated
3623 transformations can be added when necesary.
3625 ??? Same trick with swapping operand is done at several other places.
3626 It can be nice to develop some common way to handle this. */
3629 rtx_equal_for_prefetch_p (x, y)
3634 enum rtx_code code = GET_CODE (x);
3639 if (code != GET_CODE (y))
3642 code = GET_CODE (x);
3644 if (GET_RTX_CLASS (code) == 'c')
3646 return ((rtx_equal_for_prefetch_p (XEXP (x, 0), XEXP (y, 0))
3647 && rtx_equal_for_prefetch_p (XEXP (x, 1), XEXP (y, 1)))
3648 || (rtx_equal_for_prefetch_p (XEXP (x, 0), XEXP (y, 1))
3649 && rtx_equal_for_prefetch_p (XEXP (x, 1), XEXP (y, 0))));
3651 /* Compare the elements. If any pair of corresponding elements fails to
3652 match, return 0 for the whole thing. */
3654 fmt = GET_RTX_FORMAT (code);
3655 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3660 if (XWINT (x, i) != XWINT (y, i))
3665 if (XINT (x, i) != XINT (y, i))
3670 /* Two vectors must have the same length. */
3671 if (XVECLEN (x, i) != XVECLEN (y, i))
3674 /* And the corresponding elements must match. */
3675 for (j = 0; j < XVECLEN (x, i); j++)
3676 if (rtx_equal_for_prefetch_p (XVECEXP (x, i, j),
3677 XVECEXP (y, i, j)) == 0)
3682 if (rtx_equal_for_prefetch_p (XEXP (x, i), XEXP (y, i)) == 0)
3687 if (strcmp (XSTR (x, i), XSTR (y, i)))
3692 /* These are just backpointers, so they don't matter. */
3698 /* It is believed that rtx's at this level will never
3699 contain anything but integers and other rtx's,
3700 except for within LABEL_REFs and SYMBOL_REFs. */
3708 /* Remove constant addition value from the expression X (when present)
3711 static HOST_WIDE_INT
3712 remove_constant_addition (x)
3715 HOST_WIDE_INT addval = 0;
3718 /* Avoid clobbering a shared CONST expression. */
3719 if (GET_CODE (exp) == CONST)
3721 if (GET_CODE (XEXP (exp, 0)) == PLUS
3722 && GET_CODE (XEXP (XEXP (exp, 0), 0)) == SYMBOL_REF
3723 && GET_CODE (XEXP (XEXP (exp, 0), 1)) == CONST_INT)
3725 *x = XEXP (XEXP (exp, 0), 0);
3726 return INTVAL (XEXP (XEXP (exp, 0), 1));
3731 if (GET_CODE (exp) == CONST_INT)
3733 addval = INTVAL (exp);
3737 /* For plus expression recurse on ourself. */
3738 else if (GET_CODE (exp) == PLUS)
3740 addval += remove_constant_addition (&XEXP (exp, 0));
3741 addval += remove_constant_addition (&XEXP (exp, 1));
3743 /* In case our parameter was constant, remove extra zero from the
3745 if (XEXP (exp, 0) == const0_rtx)
3747 else if (XEXP (exp, 1) == const0_rtx)
3754 /* Attempt to identify accesses to arrays that are most likely to cause cache
3755 misses, and emit prefetch instructions a few prefetch blocks forward.
3757 To detect the arrays we use the GIV information that was collected by the
3758 strength reduction pass.
3760 The prefetch instructions are generated after the GIV information is done
3761 and before the strength reduction process. The new GIVs are injected into
3762 the strength reduction tables, so the prefetch addresses are optimized as
3765 GIVs are split into base address, stride, and constant addition values.
3766 GIVs with the same address, stride and close addition values are combined
3767 into a single prefetch. Also writes to GIVs are detected, so that prefetch
3768 for write instructions can be used for the block we write to, on machines
3769 that support write prefetches.
3771 Several heuristics are used to determine when to prefetch. They are
3772 controlled by defined symbols that can be overridden for each target. */
3775 emit_prefetch_instructions (loop)
3778 int num_prefetches = 0;
3779 int num_real_prefetches = 0;
3780 int num_real_write_prefetches = 0;
3783 struct iv_class *bl;
3784 struct induction *iv;
3785 struct prefetch_info info[MAX_PREFETCHES];
3786 struct loop_ivs *ivs = LOOP_IVS (loop);
3791 /* Consider only loops w/o calls. When a call is done, the loop is probably
3792 slow enough to read the memory. */
3793 if (PREFETCH_NO_CALL && LOOP_INFO (loop)->has_call)
3795 if (loop_dump_stream)
3796 fprintf (loop_dump_stream, "Prefetch: ignoring loop: has call.\n");
3801 /* Don't prefetch in loops known to have few iterations. */
3802 if (PREFETCH_NO_LOW_LOOPCNT
3803 && LOOP_INFO (loop)->n_iterations
3804 && LOOP_INFO (loop)->n_iterations <= PREFETCH_LOW_LOOPCNT)
3806 if (loop_dump_stream)
3807 fprintf (loop_dump_stream,
3808 "Prefetch: ignoring loop: not enough iterations.\n");
3812 /* Search all induction variables and pick those interesting for the prefetch
3814 for (bl = ivs->list; bl; bl = bl->next)
3816 struct induction *biv = bl->biv, *biv1;
3821 /* Expect all BIVs to be executed in each iteration. This makes our
3822 analysis more conservative. */
3825 /* Discard non-constant additions that we can't handle well yet, and
3826 BIVs that are executed multiple times; such BIVs ought to be
3827 handled in the nested loop. We accept not_every_iteration BIVs,
3828 since these only result in larger strides and make our
3829 heuristics more conservative. */
3830 if (GET_CODE (biv->add_val) != CONST_INT)
3832 if (loop_dump_stream)
3834 fprintf (loop_dump_stream,
3835 "Prefetch: ignoring biv %d: non-constant addition at insn %d:",
3836 REGNO (biv->src_reg), INSN_UID (biv->insn));
3837 print_rtl (loop_dump_stream, biv->add_val);
3838 fprintf (loop_dump_stream, "\n");
3843 if (biv->maybe_multiple)
3845 if (loop_dump_stream)
3847 fprintf (loop_dump_stream,
3848 "Prefetch: ignoring biv %d: maybe_multiple at insn %i:",
3849 REGNO (biv->src_reg), INSN_UID (biv->insn));
3850 print_rtl (loop_dump_stream, biv->add_val);
3851 fprintf (loop_dump_stream, "\n");
3856 basestride += INTVAL (biv1->add_val);
3857 biv1 = biv1->next_iv;
3860 if (biv1 || !basestride)
3863 for (iv = bl->giv; iv; iv = iv->next_iv)
3867 HOST_WIDE_INT index = 0;
3869 HOST_WIDE_INT stride = 0;
3870 int stride_sign = 1;
3871 struct check_store_data d;
3872 const char *ignore_reason = NULL;
3873 int size = GET_MODE_SIZE (GET_MODE (iv));
3875 /* See whether an induction variable is interesting to us and if
3876 not, report the reason. */
3877 if (iv->giv_type != DEST_ADDR)
3878 ignore_reason = "giv is not a destination address";
3880 /* We are interested only in constant stride memory references
3881 in order to be able to compute density easily. */
3882 else if (GET_CODE (iv->mult_val) != CONST_INT)
3883 ignore_reason = "stride is not constant";
3887 stride = INTVAL (iv->mult_val) * basestride;
3894 /* On some targets, reversed order prefetches are not
3896 if (PREFETCH_NO_REVERSE_ORDER && stride_sign < 0)
3897 ignore_reason = "reversed order stride";
3899 /* Prefetch of accesses with an extreme stride might not be
3900 worthwhile, either. */
3901 else if (PREFETCH_NO_EXTREME_STRIDE
3902 && stride > PREFETCH_EXTREME_STRIDE)
3903 ignore_reason = "extreme stride";
3905 /* Ignore GIVs with varying add values; we can't predict the
3906 value for the next iteration. */
3907 else if (!loop_invariant_p (loop, iv->add_val))
3908 ignore_reason = "giv has varying add value";
3910 /* Ignore GIVs in the nested loops; they ought to have been
3912 else if (iv->maybe_multiple)
3913 ignore_reason = "giv is in nested loop";
3916 if (ignore_reason != NULL)
3918 if (loop_dump_stream)
3919 fprintf (loop_dump_stream,
3920 "Prefetch: ignoring giv at %d: %s.\n",
3921 INSN_UID (iv->insn), ignore_reason);
3925 /* Determine the pointer to the basic array we are examining. It is
3926 the sum of the BIV's initial value and the GIV's add_val. */
3927 address = copy_rtx (iv->add_val);
3928 temp = copy_rtx (bl->initial_value);
3930 address = simplify_gen_binary (PLUS, Pmode, temp, address);
3931 index = remove_constant_addition (&address);
3935 d.mem_address = *iv->location;
3937 /* When the GIV is not always executed, we might be better off by
3938 not dirtying the cache pages. */
3939 if (PREFETCH_CONDITIONAL || iv->always_executed)
3940 note_stores (PATTERN (iv->insn), check_store, &d);
3942 /* Attempt to find another prefetch to the same array and see if we
3943 can merge this one. */
3944 for (i = 0; i < num_prefetches; i++)
3945 if (rtx_equal_for_prefetch_p (address, info[i].base_address)
3946 && stride == info[i].stride)
3948 /* In case both access same array (same location
3949 just with small difference in constant indexes), merge
3950 the prefetches. Just do the later and the earlier will
3951 get prefetched from previous iteration.
3952 The artificial threshold should not be too small,
3953 but also not bigger than small portion of memory usually
3954 traversed by single loop. */
3955 if (index >= info[i].index
3956 && index - info[i].index < PREFETCH_EXTREME_DIFFERENCE)
3958 info[i].write |= d.mem_write;
3959 info[i].bytes_accessed += size;
3960 info[i].index = index;
3963 info[num_prefetches].base_address = address;
3968 if (index < info[i].index
3969 && info[i].index - index < PREFETCH_EXTREME_DIFFERENCE)
3971 info[i].write |= d.mem_write;
3972 info[i].bytes_accessed += size;
3978 /* Merging failed. */
3981 info[num_prefetches].giv = iv;
3982 info[num_prefetches].class = bl;
3983 info[num_prefetches].index = index;
3984 info[num_prefetches].stride = stride;
3985 info[num_prefetches].base_address = address;
3986 info[num_prefetches].write = d.mem_write;
3987 info[num_prefetches].bytes_accessed = size;
3989 if (num_prefetches >= MAX_PREFETCHES)
3991 if (loop_dump_stream)
3992 fprintf (loop_dump_stream,
3993 "Maximal number of prefetches exceeded.\n");
4000 for (i = 0; i < num_prefetches; i++)
4004 /* Attempt to calculate the total number of bytes fetched by all
4005 iterations of the loop. Avoid overflow. */
4006 if (LOOP_INFO (loop)->n_iterations
4007 && ((unsigned HOST_WIDE_INT) (0xffffffff / info[i].stride)
4008 >= LOOP_INFO (loop)->n_iterations))
4009 info[i].total_bytes = info[i].stride * LOOP_INFO (loop)->n_iterations;
4011 info[i].total_bytes = 0xffffffff;
4013 density = info[i].bytes_accessed * 100 / info[i].stride;
4015 /* Prefetch might be worthwhile only when the loads/stores are dense. */
4016 if (PREFETCH_ONLY_DENSE_MEM)
4017 if (density * 256 > PREFETCH_DENSE_MEM * 100
4018 && (info[i].total_bytes / PREFETCH_BLOCK
4019 >= PREFETCH_BLOCKS_BEFORE_LOOP_MIN))
4021 info[i].prefetch_before_loop = 1;
4022 info[i].prefetch_in_loop
4023 = (info[i].total_bytes / PREFETCH_BLOCK
4024 > PREFETCH_BLOCKS_BEFORE_LOOP_MAX);
4028 info[i].prefetch_in_loop = 0, info[i].prefetch_before_loop = 0;
4029 if (loop_dump_stream)
4030 fprintf (loop_dump_stream,
4031 "Prefetch: ignoring giv at %d: %d%% density is too low.\n",
4032 INSN_UID (info[i].giv->insn), density);
4035 info[i].prefetch_in_loop = 1, info[i].prefetch_before_loop = 1;
4037 if (info[i].prefetch_in_loop)
4039 num_real_prefetches += ((info[i].stride + PREFETCH_BLOCK - 1)
4042 num_real_write_prefetches
4043 += (info[i].stride + PREFETCH_BLOCK - 1) / PREFETCH_BLOCK;
4047 if (loop_dump_stream)
4049 for (i = 0; i < num_prefetches; i++)
4051 if (info[i].prefetch_in_loop == 0
4052 && info[i].prefetch_before_loop == 0)
4054 fprintf (loop_dump_stream, "Prefetch insn: %d",
4055 INSN_UID (info[i].giv->insn));
4056 fprintf (loop_dump_stream,
4057 "; in loop: %s; before: %s; %s\n",
4058 info[i].prefetch_in_loop ? "yes" : "no",
4059 info[i].prefetch_before_loop ? "yes" : "no",
4060 info[i].write ? "read/write" : "read only");
4061 fprintf (loop_dump_stream,
4062 " density: %d%%; bytes_accessed: %u; total_bytes: %u\n",
4063 (int) (info[i].bytes_accessed * 100 / info[i].stride),
4064 info[i].bytes_accessed, info[i].total_bytes);
4065 fprintf (loop_dump_stream, " index: ");
4066 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, info[i].index);
4067 fprintf (loop_dump_stream, "; stride: ");
4068 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, info[i].stride);
4069 fprintf (loop_dump_stream, "; address: ");
4070 print_rtl (loop_dump_stream, info[i].base_address);
4071 fprintf (loop_dump_stream, "\n");
4074 fprintf (loop_dump_stream, "Real prefetches needed: %d (write: %d)\n",
4075 num_real_prefetches, num_real_write_prefetches);
4078 if (!num_real_prefetches)
4081 ahead = SIMULTANEOUS_PREFETCHES / num_real_prefetches;
4085 if (loop_dump_stream)
4086 fprintf (loop_dump_stream,
4087 "Prefetch: ignoring loop: ahead is zero; %d < %d\n",
4088 SIMULTANEOUS_PREFETCHES, num_real_prefetches);
4092 for (i = 0; i < num_prefetches; i++)
4094 if (info[i].prefetch_in_loop)
4098 for (y = 0; y < ((info[i].stride + PREFETCH_BLOCK - 1)
4099 / PREFETCH_BLOCK); y++)
4101 rtx loc = copy_rtx (*info[i].giv->location);
4103 int bytes_ahead = PREFETCH_BLOCK * (ahead + y);
4104 rtx before_insn = info[i].giv->insn;
4105 rtx prev_insn = PREV_INSN (info[i].giv->insn);
4107 /* We can save some effort by offsetting the address on
4108 architectures with offsettable memory references. */
4109 if (offsettable_address_p (0, VOIDmode, loc))
4110 loc = plus_constant (loc, bytes_ahead);
4113 rtx reg = gen_reg_rtx (Pmode);
4114 loop_iv_add_mult_emit_before (loop, loc, const1_rtx,
4115 GEN_INT (bytes_ahead), reg,
4120 /* Make sure the address operand is valid for prefetch. */
4121 if (! (*insn_data[(int)CODE_FOR_prefetch].operand[0].predicate)
4123 insn_data[(int)CODE_FOR_prefetch].operand[0].mode))
4124 loc = force_reg (Pmode, loc);
4125 emit_insn_before (gen_prefetch (loc, GEN_INT (info[i].write),
4129 /* Check all insns emitted and record the new GIV
4131 insn = NEXT_INSN (prev_insn);
4132 while (insn != before_insn)
4134 insn = check_insn_for_givs (loop, insn,
4135 info[i].giv->always_executed,
4136 info[i].giv->maybe_multiple);
4137 insn = NEXT_INSN (insn);
4142 if (PREFETCH_BEFORE_LOOP && info[i].prefetch_before_loop)
4146 /* Emit INSNs before the loop to fetch the first cache lines. */
4148 (!info[i].prefetch_in_loop || y < ahead)
4149 && y * PREFETCH_BLOCK < (int) info[i].total_bytes; y ++)
4151 rtx reg = gen_reg_rtx (Pmode);
4152 rtx loop_start = loop->start;
4153 rtx add_val = simplify_gen_binary (PLUS, Pmode,
4154 info[i].giv->add_val,
4155 GEN_INT (y * PREFETCH_BLOCK));
4157 loop_iv_add_mult_emit_before (loop, info[i].class->initial_value,
4158 info[i].giv->mult_val,
4159 add_val, reg, 0, loop_start);
4160 emit_insn_before (gen_prefetch (reg, GEN_INT (info[i].write),
4170 /* A "basic induction variable" or biv is a pseudo reg that is set
4171 (within this loop) only by incrementing or decrementing it. */
4172 /* A "general induction variable" or giv is a pseudo reg whose
4173 value is a linear function of a biv. */
4175 /* Bivs are recognized by `basic_induction_var';
4176 Givs by `general_induction_var'. */
4178 /* Communication with routines called via `note_stores'. */
4180 static rtx note_insn;
4182 /* Dummy register to have non-zero DEST_REG for DEST_ADDR type givs. */
4184 static rtx addr_placeholder;
4186 /* ??? Unfinished optimizations, and possible future optimizations,
4187 for the strength reduction code. */
4189 /* ??? The interaction of biv elimination, and recognition of 'constant'
4190 bivs, may cause problems. */
4192 /* ??? Add heuristics so that DEST_ADDR strength reduction does not cause
4193 performance problems.
4195 Perhaps don't eliminate things that can be combined with an addressing
4196 mode. Find all givs that have the same biv, mult_val, and add_val;
4197 then for each giv, check to see if its only use dies in a following
4198 memory address. If so, generate a new memory address and check to see
4199 if it is valid. If it is valid, then store the modified memory address,
4200 otherwise, mark the giv as not done so that it will get its own iv. */
4202 /* ??? Could try to optimize branches when it is known that a biv is always
4205 /* ??? When replace a biv in a compare insn, we should replace with closest
4206 giv so that an optimized branch can still be recognized by the combiner,
4207 e.g. the VAX acb insn. */
4209 /* ??? Many of the checks involving uid_luid could be simplified if regscan
4210 was rerun in loop_optimize whenever a register was added or moved.
4211 Also, some of the optimizations could be a little less conservative. */
4213 /* Scan the loop body and call FNCALL for each insn. In the addition to the
4214 LOOP and INSN parameters pass MAYBE_MULTIPLE and NOT_EVERY_ITERATION to the
4217 NOT_EVERY_ITERATION if current insn is not executed at least once for every
4218 loop iteration except for the last one.
4220 MAYBE_MULTIPLE is 1 if current insn may be executed more than once for every
4224 for_each_insn_in_loop (loop, fncall)
4226 loop_insn_callback fncall;
4228 /* This is 1 if current insn is not executed at least once for every loop
4230 int not_every_iteration = 0;
4231 int maybe_multiple = 0;
4232 int past_loop_latch = 0;
4236 /* If loop_scan_start points to the loop exit test, we have to be wary of
4237 subversive use of gotos inside expression statements. */
4238 if (prev_nonnote_insn (loop->scan_start) != prev_nonnote_insn (loop->start))
4239 maybe_multiple = back_branch_in_range_p (loop, loop->scan_start);
4241 /* Scan through loop to find all possible bivs. */
4243 for (p = next_insn_in_loop (loop, loop->scan_start);
4245 p = next_insn_in_loop (loop, p))
4247 p = fncall (loop, p, not_every_iteration, maybe_multiple);
4249 /* Past CODE_LABEL, we get to insns that may be executed multiple
4250 times. The only way we can be sure that they can't is if every
4251 jump insn between here and the end of the loop either
4252 returns, exits the loop, is a jump to a location that is still
4253 behind the label, or is a jump to the loop start. */
4255 if (GET_CODE (p) == CODE_LABEL)
4263 insn = NEXT_INSN (insn);
4264 if (insn == loop->scan_start)
4266 if (insn == loop->end)
4272 if (insn == loop->scan_start)
4276 if (GET_CODE (insn) == JUMP_INSN
4277 && GET_CODE (PATTERN (insn)) != RETURN
4278 && (!any_condjump_p (insn)
4279 || (JUMP_LABEL (insn) != 0
4280 && JUMP_LABEL (insn) != loop->scan_start
4281 && !loop_insn_first_p (p, JUMP_LABEL (insn)))))
4289 /* Past a jump, we get to insns for which we can't count
4290 on whether they will be executed during each iteration. */
4291 /* This code appears twice in strength_reduce. There is also similar
4292 code in scan_loop. */
4293 if (GET_CODE (p) == JUMP_INSN
4294 /* If we enter the loop in the middle, and scan around to the
4295 beginning, don't set not_every_iteration for that.
4296 This can be any kind of jump, since we want to know if insns
4297 will be executed if the loop is executed. */
4298 && !(JUMP_LABEL (p) == loop->top
4299 && ((NEXT_INSN (NEXT_INSN (p)) == loop->end
4300 && any_uncondjump_p (p))
4301 || (NEXT_INSN (p) == loop->end && any_condjump_p (p)))))
4305 /* If this is a jump outside the loop, then it also doesn't
4306 matter. Check to see if the target of this branch is on the
4307 loop->exits_labels list. */
4309 for (label = loop->exit_labels; label; label = LABEL_NEXTREF (label))
4310 if (XEXP (label, 0) == JUMP_LABEL (p))
4314 not_every_iteration = 1;
4317 else if (GET_CODE (p) == NOTE)
4319 /* At the virtual top of a converted loop, insns are again known to
4320 be executed each iteration: logically, the loop begins here
4321 even though the exit code has been duplicated.
4323 Insns are also again known to be executed each iteration at
4324 the LOOP_CONT note. */
4325 if ((NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP
4326 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_CONT)
4328 not_every_iteration = 0;
4329 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
4331 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
4335 /* Note if we pass a loop latch. If we do, then we can not clear
4336 NOT_EVERY_ITERATION below when we pass the last CODE_LABEL in
4337 a loop since a jump before the last CODE_LABEL may have started
4338 a new loop iteration.
4340 Note that LOOP_TOP is only set for rotated loops and we need
4341 this check for all loops, so compare against the CODE_LABEL
4342 which immediately follows LOOP_START. */
4343 if (GET_CODE (p) == JUMP_INSN
4344 && JUMP_LABEL (p) == NEXT_INSN (loop->start))
4345 past_loop_latch = 1;
4347 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
4348 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
4349 or not an insn is known to be executed each iteration of the
4350 loop, whether or not any iterations are known to occur.
4352 Therefore, if we have just passed a label and have no more labels
4353 between here and the test insn of the loop, and we have not passed
4354 a jump to the top of the loop, then we know these insns will be
4355 executed each iteration. */
4357 if (not_every_iteration
4359 && GET_CODE (p) == CODE_LABEL
4360 && no_labels_between_p (p, loop->end)
4361 && loop_insn_first_p (p, loop->cont))
4362 not_every_iteration = 0;
4367 loop_bivs_find (loop)
4370 struct loop_regs *regs = LOOP_REGS (loop);
4371 struct loop_ivs *ivs = LOOP_IVS (loop);
4372 /* Temporary list pointers for traversing ivs->list. */
4373 struct iv_class *bl, **backbl;
4377 for_each_insn_in_loop (loop, check_insn_for_bivs);
4379 /* Scan ivs->list to remove all regs that proved not to be bivs.
4380 Make a sanity check against regs->n_times_set. */
4381 for (backbl = &ivs->list, bl = *backbl; bl; bl = bl->next)
4383 if (REG_IV_TYPE (ivs, bl->regno) != BASIC_INDUCT
4384 /* Above happens if register modified by subreg, etc. */
4385 /* Make sure it is not recognized as a basic induction var: */
4386 || regs->array[bl->regno].n_times_set != bl->biv_count
4387 /* If never incremented, it is invariant that we decided not to
4388 move. So leave it alone. */
4389 || ! bl->incremented)
4391 if (loop_dump_stream)
4392 fprintf (loop_dump_stream, "Biv %d: discarded, %s\n",
4394 (REG_IV_TYPE (ivs, bl->regno) != BASIC_INDUCT
4395 ? "not induction variable"
4396 : (! bl->incremented ? "never incremented"
4399 REG_IV_TYPE (ivs, bl->regno) = NOT_BASIC_INDUCT;
4406 if (loop_dump_stream)
4407 fprintf (loop_dump_stream, "Biv %d: verified\n", bl->regno);
4413 /* Determine how BIVS are initialised by looking through pre-header
4414 extended basic block. */
4416 loop_bivs_init_find (loop)
4419 struct loop_ivs *ivs = LOOP_IVS (loop);
4420 /* Temporary list pointers for traversing ivs->list. */
4421 struct iv_class *bl;
4425 /* Find initial value for each biv by searching backwards from loop_start,
4426 halting at first label. Also record any test condition. */
4429 for (p = loop->start; p && GET_CODE (p) != CODE_LABEL; p = PREV_INSN (p))
4435 if (GET_CODE (p) == CALL_INSN)
4439 note_stores (PATTERN (p), record_initial, ivs);
4441 /* Record any test of a biv that branches around the loop if no store
4442 between it and the start of loop. We only care about tests with
4443 constants and registers and only certain of those. */
4444 if (GET_CODE (p) == JUMP_INSN
4445 && JUMP_LABEL (p) != 0
4446 && next_real_insn (JUMP_LABEL (p)) == next_real_insn (loop->end)
4447 && (test = get_condition_for_loop (loop, p)) != 0
4448 && GET_CODE (XEXP (test, 0)) == REG
4449 && REGNO (XEXP (test, 0)) < max_reg_before_loop
4450 && (bl = REG_IV_CLASS (ivs, REGNO (XEXP (test, 0)))) != 0
4451 && valid_initial_value_p (XEXP (test, 1), p, call_seen, loop->start)
4452 && bl->init_insn == 0)
4454 /* If an NE test, we have an initial value! */
4455 if (GET_CODE (test) == NE)
4458 bl->init_set = gen_rtx_SET (VOIDmode,
4459 XEXP (test, 0), XEXP (test, 1));
4462 bl->initial_test = test;
4468 /* Look at the each biv and see if we can say anything better about its
4469 initial value from any initializing insns set up above. (This is done
4470 in two passes to avoid missing SETs in a PARALLEL.) */
4472 loop_bivs_check (loop)
4475 struct loop_ivs *ivs = LOOP_IVS (loop);
4476 /* Temporary list pointers for traversing ivs->list. */
4477 struct iv_class *bl;
4478 struct iv_class **backbl;
4480 for (backbl = &ivs->list; (bl = *backbl); backbl = &bl->next)
4485 if (! bl->init_insn)
4488 /* IF INIT_INSN has a REG_EQUAL or REG_EQUIV note and the value
4489 is a constant, use the value of that. */
4490 if (((note = find_reg_note (bl->init_insn, REG_EQUAL, 0)) != NULL
4491 && CONSTANT_P (XEXP (note, 0)))
4492 || ((note = find_reg_note (bl->init_insn, REG_EQUIV, 0)) != NULL
4493 && CONSTANT_P (XEXP (note, 0))))
4494 src = XEXP (note, 0);
4496 src = SET_SRC (bl->init_set);
4498 if (loop_dump_stream)
4499 fprintf (loop_dump_stream,
4500 "Biv %d: initialized at insn %d: initial value ",
4501 bl->regno, INSN_UID (bl->init_insn));
4503 if ((GET_MODE (src) == GET_MODE (regno_reg_rtx[bl->regno])
4504 || GET_MODE (src) == VOIDmode)
4505 && valid_initial_value_p (src, bl->init_insn,
4506 LOOP_INFO (loop)->pre_header_has_call,
4509 bl->initial_value = src;
4511 if (loop_dump_stream)
4513 print_simple_rtl (loop_dump_stream, src);
4514 fputc ('\n', loop_dump_stream);
4517 /* If we can't make it a giv,
4518 let biv keep initial value of "itself". */
4519 else if (loop_dump_stream)
4520 fprintf (loop_dump_stream, "is complex\n");
4525 /* Search the loop for general induction variables. */
4528 loop_givs_find (loop)
4531 for_each_insn_in_loop (loop, check_insn_for_givs);
4535 /* For each giv for which we still don't know whether or not it is
4536 replaceable, check to see if it is replaceable because its final value
4537 can be calculated. */
4540 loop_givs_check (loop)
4543 struct loop_ivs *ivs = LOOP_IVS (loop);
4544 struct iv_class *bl;
4546 for (bl = ivs->list; bl; bl = bl->next)
4548 struct induction *v;
4550 for (v = bl->giv; v; v = v->next_iv)
4551 if (! v->replaceable && ! v->not_replaceable)
4552 check_final_value (loop, v);
4557 /* Return non-zero if it is possible to eliminate the biv BL provided
4558 all givs are reduced. This is possible if either the reg is not
4559 used outside the loop, or we can compute what its final value will
4563 loop_biv_eliminable_p (loop, bl, threshold, insn_count)
4565 struct iv_class *bl;
4569 /* For architectures with a decrement_and_branch_until_zero insn,
4570 don't do this if we put a REG_NONNEG note on the endtest for this
4573 #ifdef HAVE_decrement_and_branch_until_zero
4576 if (loop_dump_stream)
4577 fprintf (loop_dump_stream,
4578 "Cannot eliminate nonneg biv %d.\n", bl->regno);
4583 /* Check that biv is used outside loop or if it has a final value.
4584 Compare against bl->init_insn rather than loop->start. We aren't
4585 concerned with any uses of the biv between init_insn and
4586 loop->start since these won't be affected by the value of the biv
4587 elsewhere in the function, so long as init_insn doesn't use the
4590 if ((REGNO_LAST_LUID (bl->regno) < INSN_LUID (loop->end)
4592 && INSN_UID (bl->init_insn) < max_uid_for_loop
4593 && REGNO_FIRST_LUID (bl->regno) >= INSN_LUID (bl->init_insn)
4594 && ! reg_mentioned_p (bl->biv->dest_reg, SET_SRC (bl->init_set)))
4595 || (bl->final_value = final_biv_value (loop, bl)))
4596 return maybe_eliminate_biv (loop, bl, 0, threshold, insn_count);
4598 if (loop_dump_stream)
4600 fprintf (loop_dump_stream,
4601 "Cannot eliminate biv %d.\n",
4603 fprintf (loop_dump_stream,
4604 "First use: insn %d, last use: insn %d.\n",
4605 REGNO_FIRST_UID (bl->regno),
4606 REGNO_LAST_UID (bl->regno));
4612 /* Reduce each giv of BL that we have decided to reduce. */
4615 loop_givs_reduce (loop, bl)
4617 struct iv_class *bl;
4619 struct induction *v;
4621 for (v = bl->giv; v; v = v->next_iv)
4623 struct induction *tv;
4624 if (! v->ignore && v->same == 0)
4626 int auto_inc_opt = 0;
4628 /* If the code for derived givs immediately below has already
4629 allocated a new_reg, we must keep it. */
4631 v->new_reg = gen_reg_rtx (v->mode);
4634 /* If the target has auto-increment addressing modes, and
4635 this is an address giv, then try to put the increment
4636 immediately after its use, so that flow can create an
4637 auto-increment addressing mode. */
4638 if (v->giv_type == DEST_ADDR && bl->biv_count == 1
4639 && bl->biv->always_executed && ! bl->biv->maybe_multiple
4640 /* We don't handle reversed biv's because bl->biv->insn
4641 does not have a valid INSN_LUID. */
4643 && v->always_executed && ! v->maybe_multiple
4644 && INSN_UID (v->insn) < max_uid_for_loop)
4646 /* If other giv's have been combined with this one, then
4647 this will work only if all uses of the other giv's occur
4648 before this giv's insn. This is difficult to check.
4650 We simplify this by looking for the common case where
4651 there is one DEST_REG giv, and this giv's insn is the
4652 last use of the dest_reg of that DEST_REG giv. If the
4653 increment occurs after the address giv, then we can
4654 perform the optimization. (Otherwise, the increment
4655 would have to go before other_giv, and we would not be
4656 able to combine it with the address giv to get an
4657 auto-inc address.) */
4658 if (v->combined_with)
4660 struct induction *other_giv = 0;
4662 for (tv = bl->giv; tv; tv = tv->next_iv)
4670 if (! tv && other_giv
4671 && REGNO (other_giv->dest_reg) < max_reg_before_loop
4672 && (REGNO_LAST_UID (REGNO (other_giv->dest_reg))
4673 == INSN_UID (v->insn))
4674 && INSN_LUID (v->insn) < INSN_LUID (bl->biv->insn))
4677 /* Check for case where increment is before the address
4678 giv. Do this test in "loop order". */
4679 else if ((INSN_LUID (v->insn) > INSN_LUID (bl->biv->insn)
4680 && (INSN_LUID (v->insn) < INSN_LUID (loop->scan_start)
4681 || (INSN_LUID (bl->biv->insn)
4682 > INSN_LUID (loop->scan_start))))
4683 || (INSN_LUID (v->insn) < INSN_LUID (loop->scan_start)
4684 && (INSN_LUID (loop->scan_start)
4685 < INSN_LUID (bl->biv->insn))))
4694 /* We can't put an insn immediately after one setting
4695 cc0, or immediately before one using cc0. */
4696 if ((auto_inc_opt == 1 && sets_cc0_p (PATTERN (v->insn)))
4697 || (auto_inc_opt == -1
4698 && (prev = prev_nonnote_insn (v->insn)) != 0
4700 && sets_cc0_p (PATTERN (prev))))
4706 v->auto_inc_opt = 1;
4710 /* For each place where the biv is incremented, add an insn
4711 to increment the new, reduced reg for the giv. */
4712 for (tv = bl->biv; tv; tv = tv->next_iv)
4717 insert_before = tv->insn;
4718 else if (auto_inc_opt == 1)
4719 insert_before = NEXT_INSN (v->insn);
4721 insert_before = v->insn;
4723 if (tv->mult_val == const1_rtx)
4724 loop_iv_add_mult_emit_before (loop, tv->add_val, v->mult_val,
4725 v->new_reg, v->new_reg,
4727 else /* tv->mult_val == const0_rtx */
4728 /* A multiply is acceptable here
4729 since this is presumed to be seldom executed. */
4730 loop_iv_add_mult_emit_before (loop, tv->add_val, v->mult_val,
4731 v->add_val, v->new_reg,
4735 /* Add code at loop start to initialize giv's reduced reg. */
4737 loop_iv_add_mult_hoist (loop,
4738 extend_value_for_giv (v, bl->initial_value),
4739 v->mult_val, v->add_val, v->new_reg);
4745 /* Check for givs whose first use is their definition and whose
4746 last use is the definition of another giv. If so, it is likely
4747 dead and should not be used to derive another giv nor to
4751 loop_givs_dead_check (loop, bl)
4752 struct loop *loop ATTRIBUTE_UNUSED;
4753 struct iv_class *bl;
4755 struct induction *v;
4757 for (v = bl->giv; v; v = v->next_iv)
4760 || (v->same && v->same->ignore))
4763 if (v->giv_type == DEST_REG
4764 && REGNO_FIRST_UID (REGNO (v->dest_reg)) == INSN_UID (v->insn))
4766 struct induction *v1;
4768 for (v1 = bl->giv; v1; v1 = v1->next_iv)
4769 if (REGNO_LAST_UID (REGNO (v->dest_reg)) == INSN_UID (v1->insn))
4777 loop_givs_rescan (loop, bl, reg_map)
4779 struct iv_class *bl;
4782 struct induction *v;
4784 for (v = bl->giv; v; v = v->next_iv)
4786 if (v->same && v->same->ignore)
4792 /* Update expression if this was combined, in case other giv was
4795 v->new_reg = replace_rtx (v->new_reg,
4796 v->same->dest_reg, v->same->new_reg);
4798 /* See if this register is known to be a pointer to something. If
4799 so, see if we can find the alignment. First see if there is a
4800 destination register that is a pointer. If so, this shares the
4801 alignment too. Next see if we can deduce anything from the
4802 computational information. If not, and this is a DEST_ADDR
4803 giv, at least we know that it's a pointer, though we don't know
4805 if (GET_CODE (v->new_reg) == REG
4806 && v->giv_type == DEST_REG
4807 && REG_POINTER (v->dest_reg))
4808 mark_reg_pointer (v->new_reg,
4809 REGNO_POINTER_ALIGN (REGNO (v->dest_reg)));
4810 else if (GET_CODE (v->new_reg) == REG
4811 && REG_POINTER (v->src_reg))
4813 unsigned int align = REGNO_POINTER_ALIGN (REGNO (v->src_reg));
4816 || GET_CODE (v->add_val) != CONST_INT
4817 || INTVAL (v->add_val) % (align / BITS_PER_UNIT) != 0)
4820 mark_reg_pointer (v->new_reg, align);
4822 else if (GET_CODE (v->new_reg) == REG
4823 && GET_CODE (v->add_val) == REG
4824 && REG_POINTER (v->add_val))
4826 unsigned int align = REGNO_POINTER_ALIGN (REGNO (v->add_val));
4828 if (align == 0 || GET_CODE (v->mult_val) != CONST_INT
4829 || INTVAL (v->mult_val) % (align / BITS_PER_UNIT) != 0)
4832 mark_reg_pointer (v->new_reg, align);
4834 else if (GET_CODE (v->new_reg) == REG && v->giv_type == DEST_ADDR)
4835 mark_reg_pointer (v->new_reg, 0);
4837 if (v->giv_type == DEST_ADDR)
4838 /* Store reduced reg as the address in the memref where we found
4840 validate_change (v->insn, v->location, v->new_reg, 0);
4841 else if (v->replaceable)
4843 reg_map[REGNO (v->dest_reg)] = v->new_reg;
4847 /* Not replaceable; emit an insn to set the original giv reg from
4848 the reduced giv, same as above. */
4849 loop_insn_emit_after (loop, 0, v->insn,
4850 gen_move_insn (v->dest_reg, v->new_reg));
4853 /* When a loop is reversed, givs which depend on the reversed
4854 biv, and which are live outside the loop, must be set to their
4855 correct final value. This insn is only needed if the giv is
4856 not replaceable. The correct final value is the same as the
4857 value that the giv starts the reversed loop with. */
4858 if (bl->reversed && ! v->replaceable)
4859 loop_iv_add_mult_sink (loop,
4860 extend_value_for_giv (v, bl->initial_value),
4861 v->mult_val, v->add_val, v->dest_reg);
4862 else if (v->final_value)
4863 loop_insn_sink_or_swim (loop,
4864 gen_load_of_final_value (v->dest_reg,
4867 if (loop_dump_stream)
4869 fprintf (loop_dump_stream, "giv at %d reduced to ",
4870 INSN_UID (v->insn));
4871 print_simple_rtl (loop_dump_stream, v->new_reg);
4872 fprintf (loop_dump_stream, "\n");
4879 loop_giv_reduce_benefit (loop, bl, v, test_reg)
4880 struct loop *loop ATTRIBUTE_UNUSED;
4881 struct iv_class *bl;
4882 struct induction *v;
4888 benefit = v->benefit;
4889 PUT_MODE (test_reg, v->mode);
4890 add_cost = iv_add_mult_cost (bl->biv->add_val, v->mult_val,
4891 test_reg, test_reg);
4893 /* Reduce benefit if not replaceable, since we will insert a
4894 move-insn to replace the insn that calculates this giv. Don't do
4895 this unless the giv is a user variable, since it will often be
4896 marked non-replaceable because of the duplication of the exit
4897 code outside the loop. In such a case, the copies we insert are
4898 dead and will be deleted. So they don't have a cost. Similar
4899 situations exist. */
4900 /* ??? The new final_[bg]iv_value code does a much better job of
4901 finding replaceable giv's, and hence this code may no longer be
4903 if (! v->replaceable && ! bl->eliminable
4904 && REG_USERVAR_P (v->dest_reg))
4905 benefit -= copy_cost;
4907 /* Decrease the benefit to count the add-insns that we will insert
4908 to increment the reduced reg for the giv. ??? This can
4909 overestimate the run-time cost of the additional insns, e.g. if
4910 there are multiple basic blocks that increment the biv, but only
4911 one of these blocks is executed during each iteration. There is
4912 no good way to detect cases like this with the current structure
4913 of the loop optimizer. This code is more accurate for
4914 determining code size than run-time benefits. */
4915 benefit -= add_cost * bl->biv_count;
4917 /* Decide whether to strength-reduce this giv or to leave the code
4918 unchanged (recompute it from the biv each time it is used). This
4919 decision can be made independently for each giv. */
4922 /* Attempt to guess whether autoincrement will handle some of the
4923 new add insns; if so, increase BENEFIT (undo the subtraction of
4924 add_cost that was done above). */
4925 if (v->giv_type == DEST_ADDR
4926 /* Increasing the benefit is risky, since this is only a guess.
4927 Avoid increasing register pressure in cases where there would
4928 be no other benefit from reducing this giv. */
4930 && GET_CODE (v->mult_val) == CONST_INT)
4932 int size = GET_MODE_SIZE (GET_MODE (v->mem));
4934 if (HAVE_POST_INCREMENT
4935 && INTVAL (v->mult_val) == size)
4936 benefit += add_cost * bl->biv_count;
4937 else if (HAVE_PRE_INCREMENT
4938 && INTVAL (v->mult_val) == size)
4939 benefit += add_cost * bl->biv_count;
4940 else if (HAVE_POST_DECREMENT
4941 && -INTVAL (v->mult_val) == size)
4942 benefit += add_cost * bl->biv_count;
4943 else if (HAVE_PRE_DECREMENT
4944 && -INTVAL (v->mult_val) == size)
4945 benefit += add_cost * bl->biv_count;
4953 /* Free IV structures for LOOP. */
4956 loop_ivs_free (loop)
4959 struct loop_ivs *ivs = LOOP_IVS (loop);
4960 struct iv_class *iv = ivs->list;
4966 struct iv_class *next = iv->next;
4967 struct induction *induction;
4968 struct induction *next_induction;
4970 for (induction = iv->biv; induction; induction = next_induction)
4972 next_induction = induction->next_iv;
4975 for (induction = iv->giv; induction; induction = next_induction)
4977 next_induction = induction->next_iv;
4987 /* Perform strength reduction and induction variable elimination.
4989 Pseudo registers created during this function will be beyond the
4990 last valid index in several tables including
4991 REGS->ARRAY[I].N_TIMES_SET and REGNO_LAST_UID. This does not cause a
4992 problem here, because the added registers cannot be givs outside of
4993 their loop, and hence will never be reconsidered. But scan_loop
4994 must check regnos to make sure they are in bounds. */
4997 strength_reduce (loop, flags)
5001 struct loop_info *loop_info = LOOP_INFO (loop);
5002 struct loop_regs *regs = LOOP_REGS (loop);
5003 struct loop_ivs *ivs = LOOP_IVS (loop);
5005 /* Temporary list pointer for traversing ivs->list. */
5006 struct iv_class *bl;
5007 /* Ratio of extra register life span we can justify
5008 for saving an instruction. More if loop doesn't call subroutines
5009 since in that case saving an insn makes more difference
5010 and more registers are available. */
5011 /* ??? could set this to last value of threshold in move_movables */
5012 int threshold = (loop_info->has_call ? 1 : 2) * (3 + n_non_fixed_regs);
5013 /* Map of pseudo-register replacements. */
5014 rtx *reg_map = NULL;
5016 int unrolled_insn_copies = 0;
5017 rtx test_reg = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 1);
5018 int insn_count = count_insns_in_loop (loop);
5020 addr_placeholder = gen_reg_rtx (Pmode);
5022 ivs->n_regs = max_reg_before_loop;
5023 ivs->regs = (struct iv *) xcalloc (ivs->n_regs, sizeof (struct iv));
5025 /* Find all BIVs in loop. */
5026 loop_bivs_find (loop);
5028 /* Exit if there are no bivs. */
5031 /* Can still unroll the loop anyways, but indicate that there is no
5032 strength reduction info available. */
5033 if (flags & LOOP_UNROLL)
5034 unroll_loop (loop, insn_count, 0);
5036 loop_ivs_free (loop);
5040 /* Determine how BIVS are initialised by looking through pre-header
5041 extended basic block. */
5042 loop_bivs_init_find (loop);
5044 /* Look at the each biv and see if we can say anything better about its
5045 initial value from any initializing insns set up above. */
5046 loop_bivs_check (loop);
5048 /* Search the loop for general induction variables. */
5049 loop_givs_find (loop);
5051 /* Try to calculate and save the number of loop iterations. This is
5052 set to zero if the actual number can not be calculated. This must
5053 be called after all giv's have been identified, since otherwise it may
5054 fail if the iteration variable is a giv. */
5055 loop_iterations (loop);
5057 #ifdef HAVE_prefetch
5058 if (flags & LOOP_PREFETCH)
5059 emit_prefetch_instructions (loop);
5062 /* Now for each giv for which we still don't know whether or not it is
5063 replaceable, check to see if it is replaceable because its final value
5064 can be calculated. This must be done after loop_iterations is called,
5065 so that final_giv_value will work correctly. */
5066 loop_givs_check (loop);
5068 /* Try to prove that the loop counter variable (if any) is always
5069 nonnegative; if so, record that fact with a REG_NONNEG note
5070 so that "decrement and branch until zero" insn can be used. */
5071 check_dbra_loop (loop, insn_count);
5073 /* Create reg_map to hold substitutions for replaceable giv regs.
5074 Some givs might have been made from biv increments, so look at
5075 ivs->reg_iv_type for a suitable size. */
5076 reg_map_size = ivs->n_regs;
5077 reg_map = (rtx *) xcalloc (reg_map_size, sizeof (rtx));
5079 /* Examine each iv class for feasibility of strength reduction/induction
5080 variable elimination. */
5082 for (bl = ivs->list; bl; bl = bl->next)
5084 struct induction *v;
5087 /* Test whether it will be possible to eliminate this biv
5088 provided all givs are reduced. */
5089 bl->eliminable = loop_biv_eliminable_p (loop, bl, threshold, insn_count);
5091 /* This will be true at the end, if all givs which depend on this
5092 biv have been strength reduced.
5093 We can't (currently) eliminate the biv unless this is so. */
5094 bl->all_reduced = 1;
5096 /* Check each extension dependent giv in this class to see if its
5097 root biv is safe from wrapping in the interior mode. */
5098 check_ext_dependent_givs (bl, loop_info);
5100 /* Combine all giv's for this iv_class. */
5101 combine_givs (regs, bl);
5103 for (v = bl->giv; v; v = v->next_iv)
5105 struct induction *tv;
5107 if (v->ignore || v->same)
5110 benefit = loop_giv_reduce_benefit (loop, bl, v, test_reg);
5112 /* If an insn is not to be strength reduced, then set its ignore
5113 flag, and clear bl->all_reduced. */
5115 /* A giv that depends on a reversed biv must be reduced if it is
5116 used after the loop exit, otherwise, it would have the wrong
5117 value after the loop exit. To make it simple, just reduce all
5118 of such giv's whether or not we know they are used after the loop
5121 if (! flag_reduce_all_givs
5122 && v->lifetime * threshold * benefit < insn_count
5125 if (loop_dump_stream)
5126 fprintf (loop_dump_stream,
5127 "giv of insn %d not worth while, %d vs %d.\n",
5129 v->lifetime * threshold * benefit, insn_count);
5131 bl->all_reduced = 0;
5135 /* Check that we can increment the reduced giv without a
5136 multiply insn. If not, reject it. */
5138 for (tv = bl->biv; tv; tv = tv->next_iv)
5139 if (tv->mult_val == const1_rtx
5140 && ! product_cheap_p (tv->add_val, v->mult_val))
5142 if (loop_dump_stream)
5143 fprintf (loop_dump_stream,
5144 "giv of insn %d: would need a multiply.\n",
5145 INSN_UID (v->insn));
5147 bl->all_reduced = 0;
5153 /* Check for givs whose first use is their definition and whose
5154 last use is the definition of another giv. If so, it is likely
5155 dead and should not be used to derive another giv nor to
5157 loop_givs_dead_check (loop, bl);
5159 /* Reduce each giv that we decided to reduce. */
5160 loop_givs_reduce (loop, bl);
5162 /* Rescan all givs. If a giv is the same as a giv not reduced, mark it
5165 For each giv register that can be reduced now: if replaceable,
5166 substitute reduced reg wherever the old giv occurs;
5167 else add new move insn "giv_reg = reduced_reg". */
5168 loop_givs_rescan (loop, bl, reg_map);
5170 /* All the givs based on the biv bl have been reduced if they
5173 /* For each giv not marked as maybe dead that has been combined with a
5174 second giv, clear any "maybe dead" mark on that second giv.
5175 v->new_reg will either be or refer to the register of the giv it
5178 Doing this clearing avoids problems in biv elimination where
5179 a giv's new_reg is a complex value that can't be put in the
5180 insn but the giv combined with (with a reg as new_reg) is
5181 marked maybe_dead. Since the register will be used in either
5182 case, we'd prefer it be used from the simpler giv. */
5184 for (v = bl->giv; v; v = v->next_iv)
5185 if (! v->maybe_dead && v->same)
5186 v->same->maybe_dead = 0;
5188 /* Try to eliminate the biv, if it is a candidate.
5189 This won't work if ! bl->all_reduced,
5190 since the givs we planned to use might not have been reduced.
5192 We have to be careful that we didn't initially think we could
5193 eliminate this biv because of a giv that we now think may be
5194 dead and shouldn't be used as a biv replacement.
5196 Also, there is the possibility that we may have a giv that looks
5197 like it can be used to eliminate a biv, but the resulting insn
5198 isn't valid. This can happen, for example, on the 88k, where a
5199 JUMP_INSN can compare a register only with zero. Attempts to
5200 replace it with a compare with a constant will fail.
5202 Note that in cases where this call fails, we may have replaced some
5203 of the occurrences of the biv with a giv, but no harm was done in
5204 doing so in the rare cases where it can occur. */
5206 if (bl->all_reduced == 1 && bl->eliminable
5207 && maybe_eliminate_biv (loop, bl, 1, threshold, insn_count))
5209 /* ?? If we created a new test to bypass the loop entirely,
5210 or otherwise drop straight in, based on this test, then
5211 we might want to rewrite it also. This way some later
5212 pass has more hope of removing the initialization of this
5215 /* If final_value != 0, then the biv may be used after loop end
5216 and we must emit an insn to set it just in case.
5218 Reversed bivs already have an insn after the loop setting their
5219 value, so we don't need another one. We can't calculate the
5220 proper final value for such a biv here anyways. */
5221 if (bl->final_value && ! bl->reversed)
5222 loop_insn_sink_or_swim (loop,
5223 gen_load_of_final_value (bl->biv->dest_reg,
5226 if (loop_dump_stream)
5227 fprintf (loop_dump_stream, "Reg %d: biv eliminated\n",
5230 /* See above note wrt final_value. But since we couldn't eliminate
5231 the biv, we must set the value after the loop instead of before. */
5232 else if (bl->final_value && ! bl->reversed)
5233 loop_insn_sink (loop, gen_load_of_final_value (bl->biv->dest_reg,
5237 /* Go through all the instructions in the loop, making all the
5238 register substitutions scheduled in REG_MAP. */
5240 for (p = loop->start; p != loop->end; p = NEXT_INSN (p))
5241 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
5242 || GET_CODE (p) == CALL_INSN)
5244 replace_regs (PATTERN (p), reg_map, reg_map_size, 0);
5245 replace_regs (REG_NOTES (p), reg_map, reg_map_size, 0);
5249 if (loop_info->n_iterations > 0)
5251 /* When we completely unroll a loop we will likely not need the increment
5252 of the loop BIV and we will not need the conditional branch at the
5254 unrolled_insn_copies = insn_count - 2;
5257 /* When we completely unroll a loop on a HAVE_cc0 machine we will not
5258 need the comparison before the conditional branch at the end of the
5260 unrolled_insn_copies -= 1;
5263 /* We'll need one copy for each loop iteration. */
5264 unrolled_insn_copies *= loop_info->n_iterations;
5266 /* A little slop to account for the ability to remove initialization
5267 code, better CSE, and other secondary benefits of completely
5268 unrolling some loops. */
5269 unrolled_insn_copies -= 1;
5271 /* Clamp the value. */
5272 if (unrolled_insn_copies < 0)
5273 unrolled_insn_copies = 0;
5276 /* Unroll loops from within strength reduction so that we can use the
5277 induction variable information that strength_reduce has already
5278 collected. Always unroll loops that would be as small or smaller
5279 unrolled than when rolled. */
5280 if ((flags & LOOP_UNROLL)
5281 || (!(flags & LOOP_FIRST_PASS)
5282 && loop_info->n_iterations > 0
5283 && unrolled_insn_copies <= insn_count))
5284 unroll_loop (loop, insn_count, 1);
5286 #ifdef HAVE_doloop_end
5287 if (HAVE_doloop_end && (flags & LOOP_BCT) && flag_branch_on_count_reg)
5288 doloop_optimize (loop);
5289 #endif /* HAVE_doloop_end */
5291 /* In case number of iterations is known, drop branch prediction note
5292 in the branch. Do that only in second loop pass, as loop unrolling
5293 may change the number of iterations performed. */
5294 if (flags & LOOP_BCT)
5296 unsigned HOST_WIDE_INT n
5297 = loop_info->n_iterations / loop_info->unroll_number;
5299 predict_insn (PREV_INSN (loop->end), PRED_LOOP_ITERATIONS,
5300 REG_BR_PROB_BASE - REG_BR_PROB_BASE / n);
5303 if (loop_dump_stream)
5304 fprintf (loop_dump_stream, "\n");
5306 loop_ivs_free (loop);
5311 /*Record all basic induction variables calculated in the insn. */
5313 check_insn_for_bivs (loop, p, not_every_iteration, maybe_multiple)
5316 int not_every_iteration;
5319 struct loop_ivs *ivs = LOOP_IVS (loop);
5326 if (GET_CODE (p) == INSN
5327 && (set = single_set (p))
5328 && GET_CODE (SET_DEST (set)) == REG)
5330 dest_reg = SET_DEST (set);
5331 if (REGNO (dest_reg) < max_reg_before_loop
5332 && REGNO (dest_reg) >= FIRST_PSEUDO_REGISTER
5333 && REG_IV_TYPE (ivs, REGNO (dest_reg)) != NOT_BASIC_INDUCT)
5335 if (basic_induction_var (loop, SET_SRC (set),
5336 GET_MODE (SET_SRC (set)),
5337 dest_reg, p, &inc_val, &mult_val,
5340 /* It is a possible basic induction variable.
5341 Create and initialize an induction structure for it. */
5344 = (struct induction *) xmalloc (sizeof (struct induction));
5346 record_biv (loop, v, p, dest_reg, inc_val, mult_val, location,
5347 not_every_iteration, maybe_multiple);
5348 REG_IV_TYPE (ivs, REGNO (dest_reg)) = BASIC_INDUCT;
5350 else if (REGNO (dest_reg) < ivs->n_regs)
5351 REG_IV_TYPE (ivs, REGNO (dest_reg)) = NOT_BASIC_INDUCT;
5357 /* Record all givs calculated in the insn.
5358 A register is a giv if: it is only set once, it is a function of a
5359 biv and a constant (or invariant), and it is not a biv. */
5361 check_insn_for_givs (loop, p, not_every_iteration, maybe_multiple)
5364 int not_every_iteration;
5367 struct loop_regs *regs = LOOP_REGS (loop);
5370 /* Look for a general induction variable in a register. */
5371 if (GET_CODE (p) == INSN
5372 && (set = single_set (p))
5373 && GET_CODE (SET_DEST (set)) == REG
5374 && ! regs->array[REGNO (SET_DEST (set))].may_not_optimize)
5383 rtx last_consec_insn;
5385 dest_reg = SET_DEST (set);
5386 if (REGNO (dest_reg) < FIRST_PSEUDO_REGISTER)
5389 if (/* SET_SRC is a giv. */
5390 (general_induction_var (loop, SET_SRC (set), &src_reg, &add_val,
5391 &mult_val, &ext_val, 0, &benefit, VOIDmode)
5392 /* Equivalent expression is a giv. */
5393 || ((regnote = find_reg_note (p, REG_EQUAL, NULL_RTX))
5394 && general_induction_var (loop, XEXP (regnote, 0), &src_reg,
5395 &add_val, &mult_val, &ext_val, 0,
5396 &benefit, VOIDmode)))
5397 /* Don't try to handle any regs made by loop optimization.
5398 We have nothing on them in regno_first_uid, etc. */
5399 && REGNO (dest_reg) < max_reg_before_loop
5400 /* Don't recognize a BASIC_INDUCT_VAR here. */
5401 && dest_reg != src_reg
5402 /* This must be the only place where the register is set. */
5403 && (regs->array[REGNO (dest_reg)].n_times_set == 1
5404 /* or all sets must be consecutive and make a giv. */
5405 || (benefit = consec_sets_giv (loop, benefit, p,
5407 &add_val, &mult_val, &ext_val,
5408 &last_consec_insn))))
5411 = (struct induction *) xmalloc (sizeof (struct induction));
5413 /* If this is a library call, increase benefit. */
5414 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
5415 benefit += libcall_benefit (p);
5417 /* Skip the consecutive insns, if there are any. */
5418 if (regs->array[REGNO (dest_reg)].n_times_set != 1)
5419 p = last_consec_insn;
5421 record_giv (loop, v, p, src_reg, dest_reg, mult_val, add_val,
5422 ext_val, benefit, DEST_REG, not_every_iteration,
5423 maybe_multiple, (rtx*) 0);
5428 #ifndef DONT_REDUCE_ADDR
5429 /* Look for givs which are memory addresses. */
5430 /* This resulted in worse code on a VAX 8600. I wonder if it
5432 if (GET_CODE (p) == INSN)
5433 find_mem_givs (loop, PATTERN (p), p, not_every_iteration,
5437 /* Update the status of whether giv can derive other givs. This can
5438 change when we pass a label or an insn that updates a biv. */
5439 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
5440 || GET_CODE (p) == CODE_LABEL)
5441 update_giv_derive (loop, p);
5445 /* Return 1 if X is a valid source for an initial value (or as value being
5446 compared against in an initial test).
5448 X must be either a register or constant and must not be clobbered between
5449 the current insn and the start of the loop.
5451 INSN is the insn containing X. */
5454 valid_initial_value_p (x, insn, call_seen, loop_start)
5463 /* Only consider pseudos we know about initialized in insns whose luids
5465 if (GET_CODE (x) != REG
5466 || REGNO (x) >= max_reg_before_loop)
5469 /* Don't use call-clobbered registers across a call which clobbers it. On
5470 some machines, don't use any hard registers at all. */
5471 if (REGNO (x) < FIRST_PSEUDO_REGISTER
5472 && (SMALL_REGISTER_CLASSES
5473 || (call_used_regs[REGNO (x)] && call_seen)))
5476 /* Don't use registers that have been clobbered before the start of the
5478 if (reg_set_between_p (x, insn, loop_start))
5484 /* Scan X for memory refs and check each memory address
5485 as a possible giv. INSN is the insn whose pattern X comes from.
5486 NOT_EVERY_ITERATION is 1 if the insn might not be executed during
5487 every loop iteration. MAYBE_MULTIPLE is 1 if the insn might be executed
5488 more thanonce in each loop iteration. */
5491 find_mem_givs (loop, x, insn, not_every_iteration, maybe_multiple)
5492 const struct loop *loop;
5495 int not_every_iteration, maybe_multiple;
5504 code = GET_CODE (x);
5529 /* This code used to disable creating GIVs with mult_val == 1 and
5530 add_val == 0. However, this leads to lost optimizations when
5531 it comes time to combine a set of related DEST_ADDR GIVs, since
5532 this one would not be seen. */
5534 if (general_induction_var (loop, XEXP (x, 0), &src_reg, &add_val,
5535 &mult_val, &ext_val, 1, &benefit,
5538 /* Found one; record it. */
5540 = (struct induction *) xmalloc (sizeof (struct induction));
5542 record_giv (loop, v, insn, src_reg, addr_placeholder, mult_val,
5543 add_val, ext_val, benefit, DEST_ADDR,
5544 not_every_iteration, maybe_multiple, &XEXP (x, 0));
5555 /* Recursively scan the subexpressions for other mem refs. */
5557 fmt = GET_RTX_FORMAT (code);
5558 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5560 find_mem_givs (loop, XEXP (x, i), insn, not_every_iteration,
5562 else if (fmt[i] == 'E')
5563 for (j = 0; j < XVECLEN (x, i); j++)
5564 find_mem_givs (loop, XVECEXP (x, i, j), insn, not_every_iteration,
5568 /* Fill in the data about one biv update.
5569 V is the `struct induction' in which we record the biv. (It is
5570 allocated by the caller, with alloca.)
5571 INSN is the insn that sets it.
5572 DEST_REG is the biv's reg.
5574 MULT_VAL is const1_rtx if the biv is being incremented here, in which case
5575 INC_VAL is the increment. Otherwise, MULT_VAL is const0_rtx and the biv is
5576 being set to INC_VAL.
5578 NOT_EVERY_ITERATION is nonzero if this biv update is not know to be
5579 executed every iteration; MAYBE_MULTIPLE is nonzero if this biv update
5580 can be executed more than once per iteration. If MAYBE_MULTIPLE
5581 and NOT_EVERY_ITERATION are both zero, we know that the biv update is
5582 executed exactly once per iteration. */
5585 record_biv (loop, v, insn, dest_reg, inc_val, mult_val, location,
5586 not_every_iteration, maybe_multiple)
5588 struct induction *v;
5594 int not_every_iteration;
5597 struct loop_ivs *ivs = LOOP_IVS (loop);
5598 struct iv_class *bl;
5601 v->src_reg = dest_reg;
5602 v->dest_reg = dest_reg;
5603 v->mult_val = mult_val;
5604 v->add_val = inc_val;
5605 v->ext_dependent = NULL_RTX;
5606 v->location = location;
5607 v->mode = GET_MODE (dest_reg);
5608 v->always_computable = ! not_every_iteration;
5609 v->always_executed = ! not_every_iteration;
5610 v->maybe_multiple = maybe_multiple;
5612 /* Add this to the reg's iv_class, creating a class
5613 if this is the first incrementation of the reg. */
5615 bl = REG_IV_CLASS (ivs, REGNO (dest_reg));
5618 /* Create and initialize new iv_class. */
5620 bl = (struct iv_class *) xmalloc (sizeof (struct iv_class));
5622 bl->regno = REGNO (dest_reg);
5628 /* Set initial value to the reg itself. */
5629 bl->initial_value = dest_reg;
5630 bl->final_value = 0;
5631 /* We haven't seen the initializing insn yet */
5634 bl->initial_test = 0;
5635 bl->incremented = 0;
5639 bl->total_benefit = 0;
5641 /* Add this class to ivs->list. */
5642 bl->next = ivs->list;
5645 /* Put it in the array of biv register classes. */
5646 REG_IV_CLASS (ivs, REGNO (dest_reg)) = bl;
5649 /* Update IV_CLASS entry for this biv. */
5650 v->next_iv = bl->biv;
5653 if (mult_val == const1_rtx)
5654 bl->incremented = 1;
5656 if (loop_dump_stream)
5657 loop_biv_dump (v, loop_dump_stream, 0);
5660 /* Fill in the data about one giv.
5661 V is the `struct induction' in which we record the giv. (It is
5662 allocated by the caller, with alloca.)
5663 INSN is the insn that sets it.
5664 BENEFIT estimates the savings from deleting this insn.
5665 TYPE is DEST_REG or DEST_ADDR; it says whether the giv is computed
5666 into a register or is used as a memory address.
5668 SRC_REG is the biv reg which the giv is computed from.
5669 DEST_REG is the giv's reg (if the giv is stored in a reg).
5670 MULT_VAL and ADD_VAL are the coefficients used to compute the giv.
5671 LOCATION points to the place where this giv's value appears in INSN. */
5674 record_giv (loop, v, insn, src_reg, dest_reg, mult_val, add_val, ext_val,
5675 benefit, type, not_every_iteration, maybe_multiple, location)
5676 const struct loop *loop;
5677 struct induction *v;
5681 rtx mult_val, add_val, ext_val;
5684 int not_every_iteration, maybe_multiple;
5687 struct loop_ivs *ivs = LOOP_IVS (loop);
5688 struct induction *b;
5689 struct iv_class *bl;
5690 rtx set = single_set (insn);
5693 /* Attempt to prove constantness of the values. Don't let simplity_rtx
5694 undo the MULT canonicalization that we performed earlier. */
5695 temp = simplify_rtx (add_val);
5697 && ! (GET_CODE (add_val) == MULT
5698 && GET_CODE (temp) == ASHIFT))
5702 v->src_reg = src_reg;
5704 v->dest_reg = dest_reg;
5705 v->mult_val = mult_val;
5706 v->add_val = add_val;
5707 v->ext_dependent = ext_val;
5708 v->benefit = benefit;
5709 v->location = location;
5711 v->combined_with = 0;
5712 v->maybe_multiple = maybe_multiple;
5714 v->derive_adjustment = 0;
5720 v->auto_inc_opt = 0;
5724 /* The v->always_computable field is used in update_giv_derive, to
5725 determine whether a giv can be used to derive another giv. For a
5726 DEST_REG giv, INSN computes a new value for the giv, so its value
5727 isn't computable if INSN insn't executed every iteration.
5728 However, for a DEST_ADDR giv, INSN merely uses the value of the giv;
5729 it does not compute a new value. Hence the value is always computable
5730 regardless of whether INSN is executed each iteration. */
5732 if (type == DEST_ADDR)
5733 v->always_computable = 1;
5735 v->always_computable = ! not_every_iteration;
5737 v->always_executed = ! not_every_iteration;
5739 if (type == DEST_ADDR)
5741 v->mode = GET_MODE (*location);
5744 else /* type == DEST_REG */
5746 v->mode = GET_MODE (SET_DEST (set));
5748 v->lifetime = LOOP_REG_LIFETIME (loop, REGNO (dest_reg));
5750 /* If the lifetime is zero, it means that this register is
5751 really a dead store. So mark this as a giv that can be
5752 ignored. This will not prevent the biv from being eliminated. */
5753 if (v->lifetime == 0)
5756 REG_IV_TYPE (ivs, REGNO (dest_reg)) = GENERAL_INDUCT;
5757 REG_IV_INFO (ivs, REGNO (dest_reg)) = v;
5760 /* Add the giv to the class of givs computed from one biv. */
5762 bl = REG_IV_CLASS (ivs, REGNO (src_reg));
5765 v->next_iv = bl->giv;
5767 /* Don't count DEST_ADDR. This is supposed to count the number of
5768 insns that calculate givs. */
5769 if (type == DEST_REG)
5771 bl->total_benefit += benefit;
5774 /* Fatal error, biv missing for this giv? */
5777 if (type == DEST_ADDR)
5781 /* The giv can be replaced outright by the reduced register only if all
5782 of the following conditions are true:
5783 - the insn that sets the giv is always executed on any iteration
5784 on which the giv is used at all
5785 (there are two ways to deduce this:
5786 either the insn is executed on every iteration,
5787 or all uses follow that insn in the same basic block),
5788 - the giv is not used outside the loop
5789 - no assignments to the biv occur during the giv's lifetime. */
5791 if (REGNO_FIRST_UID (REGNO (dest_reg)) == INSN_UID (insn)
5792 /* Previous line always fails if INSN was moved by loop opt. */
5793 && REGNO_LAST_LUID (REGNO (dest_reg))
5794 < INSN_LUID (loop->end)
5795 && (! not_every_iteration
5796 || last_use_this_basic_block (dest_reg, insn)))
5798 /* Now check that there are no assignments to the biv within the
5799 giv's lifetime. This requires two separate checks. */
5801 /* Check each biv update, and fail if any are between the first
5802 and last use of the giv.
5804 If this loop contains an inner loop that was unrolled, then
5805 the insn modifying the biv may have been emitted by the loop
5806 unrolling code, and hence does not have a valid luid. Just
5807 mark the biv as not replaceable in this case. It is not very
5808 useful as a biv, because it is used in two different loops.
5809 It is very unlikely that we would be able to optimize the giv
5810 using this biv anyways. */
5813 for (b = bl->biv; b; b = b->next_iv)
5815 if (INSN_UID (b->insn) >= max_uid_for_loop
5816 || ((INSN_LUID (b->insn)
5817 >= REGNO_FIRST_LUID (REGNO (dest_reg)))
5818 && (INSN_LUID (b->insn)
5819 <= REGNO_LAST_LUID (REGNO (dest_reg)))))
5822 v->not_replaceable = 1;
5827 /* If there are any backwards branches that go from after the
5828 biv update to before it, then this giv is not replaceable. */
5830 for (b = bl->biv; b; b = b->next_iv)
5831 if (back_branch_in_range_p (loop, b->insn))
5834 v->not_replaceable = 1;
5840 /* May still be replaceable, we don't have enough info here to
5843 v->not_replaceable = 0;
5847 /* Record whether the add_val contains a const_int, for later use by
5852 v->no_const_addval = 1;
5853 if (tem == const0_rtx)
5855 else if (CONSTANT_P (add_val))
5856 v->no_const_addval = 0;
5857 if (GET_CODE (tem) == PLUS)
5861 if (GET_CODE (XEXP (tem, 0)) == PLUS)
5862 tem = XEXP (tem, 0);
5863 else if (GET_CODE (XEXP (tem, 1)) == PLUS)
5864 tem = XEXP (tem, 1);
5868 if (CONSTANT_P (XEXP (tem, 1)))
5869 v->no_const_addval = 0;
5873 if (loop_dump_stream)
5874 loop_giv_dump (v, loop_dump_stream, 0);
5877 /* All this does is determine whether a giv can be made replaceable because
5878 its final value can be calculated. This code can not be part of record_giv
5879 above, because final_giv_value requires that the number of loop iterations
5880 be known, and that can not be accurately calculated until after all givs
5881 have been identified. */
5884 check_final_value (loop, v)
5885 const struct loop *loop;
5886 struct induction *v;
5888 struct loop_ivs *ivs = LOOP_IVS (loop);
5889 struct iv_class *bl;
5890 rtx final_value = 0;
5892 bl = REG_IV_CLASS (ivs, REGNO (v->src_reg));
5894 /* DEST_ADDR givs will never reach here, because they are always marked
5895 replaceable above in record_giv. */
5897 /* The giv can be replaced outright by the reduced register only if all
5898 of the following conditions are true:
5899 - the insn that sets the giv is always executed on any iteration
5900 on which the giv is used at all
5901 (there are two ways to deduce this:
5902 either the insn is executed on every iteration,
5903 or all uses follow that insn in the same basic block),
5904 - its final value can be calculated (this condition is different
5905 than the one above in record_giv)
5906 - it's not used before the it's set
5907 - no assignments to the biv occur during the giv's lifetime. */
5910 /* This is only called now when replaceable is known to be false. */
5911 /* Clear replaceable, so that it won't confuse final_giv_value. */
5915 if ((final_value = final_giv_value (loop, v))
5916 && (v->always_computable || last_use_this_basic_block (v->dest_reg, v->insn)))
5918 int biv_increment_seen = 0, before_giv_insn = 0;
5924 /* When trying to determine whether or not a biv increment occurs
5925 during the lifetime of the giv, we can ignore uses of the variable
5926 outside the loop because final_value is true. Hence we can not
5927 use regno_last_uid and regno_first_uid as above in record_giv. */
5929 /* Search the loop to determine whether any assignments to the
5930 biv occur during the giv's lifetime. Start with the insn
5931 that sets the giv, and search around the loop until we come
5932 back to that insn again.
5934 Also fail if there is a jump within the giv's lifetime that jumps
5935 to somewhere outside the lifetime but still within the loop. This
5936 catches spaghetti code where the execution order is not linear, and
5937 hence the above test fails. Here we assume that the giv lifetime
5938 does not extend from one iteration of the loop to the next, so as
5939 to make the test easier. Since the lifetime isn't known yet,
5940 this requires two loops. See also record_giv above. */
5942 last_giv_use = v->insn;
5949 before_giv_insn = 1;
5950 p = NEXT_INSN (loop->start);
5955 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
5956 || GET_CODE (p) == CALL_INSN)
5958 /* It is possible for the BIV increment to use the GIV if we
5959 have a cycle. Thus we must be sure to check each insn for
5960 both BIV and GIV uses, and we must check for BIV uses
5963 if (! biv_increment_seen
5964 && reg_set_p (v->src_reg, PATTERN (p)))
5965 biv_increment_seen = 1;
5967 if (reg_mentioned_p (v->dest_reg, PATTERN (p)))
5969 if (biv_increment_seen || before_giv_insn)
5972 v->not_replaceable = 1;
5980 /* Now that the lifetime of the giv is known, check for branches
5981 from within the lifetime to outside the lifetime if it is still
5991 p = NEXT_INSN (loop->start);
5992 if (p == last_giv_use)
5995 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p)
5996 && LABEL_NAME (JUMP_LABEL (p))
5997 && ((loop_insn_first_p (JUMP_LABEL (p), v->insn)
5998 && loop_insn_first_p (loop->start, JUMP_LABEL (p)))
5999 || (loop_insn_first_p (last_giv_use, JUMP_LABEL (p))
6000 && loop_insn_first_p (JUMP_LABEL (p), loop->end))))
6003 v->not_replaceable = 1;
6005 if (loop_dump_stream)
6006 fprintf (loop_dump_stream,
6007 "Found branch outside giv lifetime.\n");
6014 /* If it is replaceable, then save the final value. */
6016 v->final_value = final_value;
6019 if (loop_dump_stream && v->replaceable)
6020 fprintf (loop_dump_stream, "Insn %d: giv reg %d final_value replaceable\n",
6021 INSN_UID (v->insn), REGNO (v->dest_reg));
6024 /* Update the status of whether a giv can derive other givs.
6026 We need to do something special if there is or may be an update to the biv
6027 between the time the giv is defined and the time it is used to derive
6030 In addition, a giv that is only conditionally set is not allowed to
6031 derive another giv once a label has been passed.
6033 The cases we look at are when a label or an update to a biv is passed. */
6036 update_giv_derive (loop, p)
6037 const struct loop *loop;
6040 struct loop_ivs *ivs = LOOP_IVS (loop);
6041 struct iv_class *bl;
6042 struct induction *biv, *giv;
6046 /* Search all IV classes, then all bivs, and finally all givs.
6048 There are three cases we are concerned with. First we have the situation
6049 of a giv that is only updated conditionally. In that case, it may not
6050 derive any givs after a label is passed.
6052 The second case is when a biv update occurs, or may occur, after the
6053 definition of a giv. For certain biv updates (see below) that are
6054 known to occur between the giv definition and use, we can adjust the
6055 giv definition. For others, or when the biv update is conditional,
6056 we must prevent the giv from deriving any other givs. There are two
6057 sub-cases within this case.
6059 If this is a label, we are concerned with any biv update that is done
6060 conditionally, since it may be done after the giv is defined followed by
6061 a branch here (actually, we need to pass both a jump and a label, but
6062 this extra tracking doesn't seem worth it).
6064 If this is a jump, we are concerned about any biv update that may be
6065 executed multiple times. We are actually only concerned about
6066 backward jumps, but it is probably not worth performing the test
6067 on the jump again here.
6069 If this is a biv update, we must adjust the giv status to show that a
6070 subsequent biv update was performed. If this adjustment cannot be done,
6071 the giv cannot derive further givs. */
6073 for (bl = ivs->list; bl; bl = bl->next)
6074 for (biv = bl->biv; biv; biv = biv->next_iv)
6075 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN
6078 for (giv = bl->giv; giv; giv = giv->next_iv)
6080 /* If cant_derive is already true, there is no point in
6081 checking all of these conditions again. */
6082 if (giv->cant_derive)
6085 /* If this giv is conditionally set and we have passed a label,
6086 it cannot derive anything. */
6087 if (GET_CODE (p) == CODE_LABEL && ! giv->always_computable)
6088 giv->cant_derive = 1;
6090 /* Skip givs that have mult_val == 0, since
6091 they are really invariants. Also skip those that are
6092 replaceable, since we know their lifetime doesn't contain
6094 else if (giv->mult_val == const0_rtx || giv->replaceable)
6097 /* The only way we can allow this giv to derive another
6098 is if this is a biv increment and we can form the product
6099 of biv->add_val and giv->mult_val. In this case, we will
6100 be able to compute a compensation. */
6101 else if (biv->insn == p)
6106 if (biv->mult_val == const1_rtx)
6107 tem = simplify_giv_expr (loop,
6108 gen_rtx_MULT (giv->mode,
6111 &ext_val_dummy, &dummy);
6113 if (tem && giv->derive_adjustment)
6114 tem = simplify_giv_expr
6116 gen_rtx_PLUS (giv->mode, tem, giv->derive_adjustment),
6117 &ext_val_dummy, &dummy);
6120 giv->derive_adjustment = tem;
6122 giv->cant_derive = 1;
6124 else if ((GET_CODE (p) == CODE_LABEL && ! biv->always_computable)
6125 || (GET_CODE (p) == JUMP_INSN && biv->maybe_multiple))
6126 giv->cant_derive = 1;
6131 /* Check whether an insn is an increment legitimate for a basic induction var.
6132 X is the source of insn P, or a part of it.
6133 MODE is the mode in which X should be interpreted.
6135 DEST_REG is the putative biv, also the destination of the insn.
6136 We accept patterns of these forms:
6137 REG = REG + INVARIANT (includes REG = REG - CONSTANT)
6138 REG = INVARIANT + REG
6140 If X is suitable, we return 1, set *MULT_VAL to CONST1_RTX,
6141 store the additive term into *INC_VAL, and store the place where
6142 we found the additive term into *LOCATION.
6144 If X is an assignment of an invariant into DEST_REG, we set
6145 *MULT_VAL to CONST0_RTX, and store the invariant into *INC_VAL.
6147 We also want to detect a BIV when it corresponds to a variable
6148 whose mode was promoted via PROMOTED_MODE. In that case, an increment
6149 of the variable may be a PLUS that adds a SUBREG of that variable to
6150 an invariant and then sign- or zero-extends the result of the PLUS
6153 Most GIVs in such cases will be in the promoted mode, since that is the
6154 probably the natural computation mode (and almost certainly the mode
6155 used for addresses) on the machine. So we view the pseudo-reg containing
6156 the variable as the BIV, as if it were simply incremented.
6158 Note that treating the entire pseudo as a BIV will result in making
6159 simple increments to any GIVs based on it. However, if the variable
6160 overflows in its declared mode but not its promoted mode, the result will
6161 be incorrect. This is acceptable if the variable is signed, since
6162 overflows in such cases are undefined, but not if it is unsigned, since
6163 those overflows are defined. So we only check for SIGN_EXTEND and
6166 If we cannot find a biv, we return 0. */
6169 basic_induction_var (loop, x, mode, dest_reg, p, inc_val, mult_val, location)
6170 const struct loop *loop;
6172 enum machine_mode mode;
6183 code = GET_CODE (x);
6188 if (rtx_equal_p (XEXP (x, 0), dest_reg)
6189 || (GET_CODE (XEXP (x, 0)) == SUBREG
6190 && SUBREG_PROMOTED_VAR_P (XEXP (x, 0))
6191 && SUBREG_REG (XEXP (x, 0)) == dest_reg))
6193 argp = &XEXP (x, 1);
6195 else if (rtx_equal_p (XEXP (x, 1), dest_reg)
6196 || (GET_CODE (XEXP (x, 1)) == SUBREG
6197 && SUBREG_PROMOTED_VAR_P (XEXP (x, 1))
6198 && SUBREG_REG (XEXP (x, 1)) == dest_reg))
6200 argp = &XEXP (x, 0);
6206 if (loop_invariant_p (loop, arg) != 1)
6209 *inc_val = convert_modes (GET_MODE (dest_reg), GET_MODE (x), arg, 0);
6210 *mult_val = const1_rtx;
6215 /* If what's inside the SUBREG is a BIV, then the SUBREG. This will
6216 handle addition of promoted variables.
6217 ??? The comment at the start of this function is wrong: promoted
6218 variable increments don't look like it says they do. */
6219 return basic_induction_var (loop, SUBREG_REG (x),
6220 GET_MODE (SUBREG_REG (x)),
6221 dest_reg, p, inc_val, mult_val, location);
6224 /* If this register is assigned in a previous insn, look at its
6225 source, but don't go outside the loop or past a label. */
6227 /* If this sets a register to itself, we would repeat any previous
6228 biv increment if we applied this strategy blindly. */
6229 if (rtx_equal_p (dest_reg, x))
6238 insn = PREV_INSN (insn);
6240 while (insn && GET_CODE (insn) == NOTE
6241 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG);
6245 set = single_set (insn);
6248 dest = SET_DEST (set);
6250 || (GET_CODE (dest) == SUBREG
6251 && (GET_MODE_SIZE (GET_MODE (dest)) <= UNITS_PER_WORD)
6252 && (GET_MODE_CLASS (GET_MODE (dest)) == MODE_INT)
6253 && SUBREG_REG (dest) == x))
6254 return basic_induction_var (loop, SET_SRC (set),
6255 (GET_MODE (SET_SRC (set)) == VOIDmode
6257 : GET_MODE (SET_SRC (set))),
6259 inc_val, mult_val, location);
6261 while (GET_CODE (dest) == SIGN_EXTRACT
6262 || GET_CODE (dest) == ZERO_EXTRACT
6263 || GET_CODE (dest) == SUBREG
6264 || GET_CODE (dest) == STRICT_LOW_PART)
6265 dest = XEXP (dest, 0);
6271 /* Can accept constant setting of biv only when inside inner most loop.
6272 Otherwise, a biv of an inner loop may be incorrectly recognized
6273 as a biv of the outer loop,
6274 causing code to be moved INTO the inner loop. */
6276 if (loop_invariant_p (loop, x) != 1)
6281 /* convert_modes aborts if we try to convert to or from CCmode, so just
6282 exclude that case. It is very unlikely that a condition code value
6283 would be a useful iterator anyways. convert_modes aborts if we try to
6284 convert a float mode to non-float or vice versa too. */
6285 if (loop->level == 1
6286 && GET_MODE_CLASS (mode) == GET_MODE_CLASS (GET_MODE (dest_reg))
6287 && GET_MODE_CLASS (mode) != MODE_CC)
6289 /* Possible bug here? Perhaps we don't know the mode of X. */
6290 *inc_val = convert_modes (GET_MODE (dest_reg), mode, x, 0);
6291 *mult_val = const0_rtx;
6298 return basic_induction_var (loop, XEXP (x, 0), GET_MODE (XEXP (x, 0)),
6299 dest_reg, p, inc_val, mult_val, location);
6302 /* Similar, since this can be a sign extension. */
6303 for (insn = PREV_INSN (p);
6304 (insn && GET_CODE (insn) == NOTE
6305 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG);
6306 insn = PREV_INSN (insn))
6310 set = single_set (insn);
6312 if (! rtx_equal_p (dest_reg, XEXP (x, 0))
6313 && set && SET_DEST (set) == XEXP (x, 0)
6314 && GET_CODE (XEXP (x, 1)) == CONST_INT
6315 && INTVAL (XEXP (x, 1)) >= 0
6316 && GET_CODE (SET_SRC (set)) == ASHIFT
6317 && XEXP (x, 1) == XEXP (SET_SRC (set), 1))
6318 return basic_induction_var (loop, XEXP (SET_SRC (set), 0),
6319 GET_MODE (XEXP (x, 0)),
6320 dest_reg, insn, inc_val, mult_val,
6329 /* A general induction variable (giv) is any quantity that is a linear
6330 function of a basic induction variable,
6331 i.e. giv = biv * mult_val + add_val.
6332 The coefficients can be any loop invariant quantity.
6333 A giv need not be computed directly from the biv;
6334 it can be computed by way of other givs. */
6336 /* Determine whether X computes a giv.
6337 If it does, return a nonzero value
6338 which is the benefit from eliminating the computation of X;
6339 set *SRC_REG to the register of the biv that it is computed from;
6340 set *ADD_VAL and *MULT_VAL to the coefficients,
6341 such that the value of X is biv * mult + add; */
6344 general_induction_var (loop, x, src_reg, add_val, mult_val, ext_val,
6345 is_addr, pbenefit, addr_mode)
6346 const struct loop *loop;
6354 enum machine_mode addr_mode;
6356 struct loop_ivs *ivs = LOOP_IVS (loop);
6359 /* If this is an invariant, forget it, it isn't a giv. */
6360 if (loop_invariant_p (loop, x) == 1)
6364 *ext_val = NULL_RTX;
6365 x = simplify_giv_expr (loop, x, ext_val, pbenefit);
6369 switch (GET_CODE (x))
6373 /* Since this is now an invariant and wasn't before, it must be a giv
6374 with MULT_VAL == 0. It doesn't matter which BIV we associate this
6376 *src_reg = ivs->list->biv->dest_reg;
6377 *mult_val = const0_rtx;
6382 /* This is equivalent to a BIV. */
6384 *mult_val = const1_rtx;
6385 *add_val = const0_rtx;
6389 /* Either (plus (biv) (invar)) or
6390 (plus (mult (biv) (invar_1)) (invar_2)). */
6391 if (GET_CODE (XEXP (x, 0)) == MULT)
6393 *src_reg = XEXP (XEXP (x, 0), 0);
6394 *mult_val = XEXP (XEXP (x, 0), 1);
6398 *src_reg = XEXP (x, 0);
6399 *mult_val = const1_rtx;
6401 *add_val = XEXP (x, 1);
6405 /* ADD_VAL is zero. */
6406 *src_reg = XEXP (x, 0);
6407 *mult_val = XEXP (x, 1);
6408 *add_val = const0_rtx;
6415 /* Remove any enclosing USE from ADD_VAL and MULT_VAL (there will be
6416 unless they are CONST_INT). */
6417 if (GET_CODE (*add_val) == USE)
6418 *add_val = XEXP (*add_val, 0);
6419 if (GET_CODE (*mult_val) == USE)
6420 *mult_val = XEXP (*mult_val, 0);
6423 *pbenefit += address_cost (orig_x, addr_mode) - reg_address_cost;
6425 *pbenefit += rtx_cost (orig_x, SET);
6427 /* Always return true if this is a giv so it will be detected as such,
6428 even if the benefit is zero or negative. This allows elimination
6429 of bivs that might otherwise not be eliminated. */
6433 /* Given an expression, X, try to form it as a linear function of a biv.
6434 We will canonicalize it to be of the form
6435 (plus (mult (BIV) (invar_1))
6437 with possible degeneracies.
6439 The invariant expressions must each be of a form that can be used as a
6440 machine operand. We surround then with a USE rtx (a hack, but localized
6441 and certainly unambiguous!) if not a CONST_INT for simplicity in this
6442 routine; it is the caller's responsibility to strip them.
6444 If no such canonicalization is possible (i.e., two biv's are used or an
6445 expression that is neither invariant nor a biv or giv), this routine
6448 For a non-zero return, the result will have a code of CONST_INT, USE,
6449 REG (for a BIV), PLUS, or MULT. No other codes will occur.
6451 *BENEFIT will be incremented by the benefit of any sub-giv encountered. */
6453 static rtx sge_plus PARAMS ((enum machine_mode, rtx, rtx));
6454 static rtx sge_plus_constant PARAMS ((rtx, rtx));
6457 simplify_giv_expr (loop, x, ext_val, benefit)
6458 const struct loop *loop;
6463 struct loop_ivs *ivs = LOOP_IVS (loop);
6464 struct loop_regs *regs = LOOP_REGS (loop);
6465 enum machine_mode mode = GET_MODE (x);
6469 /* If this is not an integer mode, or if we cannot do arithmetic in this
6470 mode, this can't be a giv. */
6471 if (mode != VOIDmode
6472 && (GET_MODE_CLASS (mode) != MODE_INT
6473 || GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT))
6476 switch (GET_CODE (x))
6479 arg0 = simplify_giv_expr (loop, XEXP (x, 0), ext_val, benefit);
6480 arg1 = simplify_giv_expr (loop, XEXP (x, 1), ext_val, benefit);
6481 if (arg0 == 0 || arg1 == 0)
6484 /* Put constant last, CONST_INT last if both constant. */
6485 if ((GET_CODE (arg0) == USE
6486 || GET_CODE (arg0) == CONST_INT)
6487 && ! ((GET_CODE (arg0) == USE
6488 && GET_CODE (arg1) == USE)
6489 || GET_CODE (arg1) == CONST_INT))
6490 tem = arg0, arg0 = arg1, arg1 = tem;
6492 /* Handle addition of zero, then addition of an invariant. */
6493 if (arg1 == const0_rtx)
6495 else if (GET_CODE (arg1) == CONST_INT || GET_CODE (arg1) == USE)
6496 switch (GET_CODE (arg0))
6500 /* Adding two invariants must result in an invariant, so enclose
6501 addition operation inside a USE and return it. */
6502 if (GET_CODE (arg0) == USE)
6503 arg0 = XEXP (arg0, 0);
6504 if (GET_CODE (arg1) == USE)
6505 arg1 = XEXP (arg1, 0);
6507 if (GET_CODE (arg0) == CONST_INT)
6508 tem = arg0, arg0 = arg1, arg1 = tem;
6509 if (GET_CODE (arg1) == CONST_INT)
6510 tem = sge_plus_constant (arg0, arg1);
6512 tem = sge_plus (mode, arg0, arg1);
6514 if (GET_CODE (tem) != CONST_INT)
6515 tem = gen_rtx_USE (mode, tem);
6520 /* biv + invar or mult + invar. Return sum. */
6521 return gen_rtx_PLUS (mode, arg0, arg1);
6524 /* (a + invar_1) + invar_2. Associate. */
6526 simplify_giv_expr (loop,
6538 /* Each argument must be either REG, PLUS, or MULT. Convert REG to
6539 MULT to reduce cases. */
6540 if (GET_CODE (arg0) == REG)
6541 arg0 = gen_rtx_MULT (mode, arg0, const1_rtx);
6542 if (GET_CODE (arg1) == REG)
6543 arg1 = gen_rtx_MULT (mode, arg1, const1_rtx);
6545 /* Now have PLUS + PLUS, PLUS + MULT, MULT + PLUS, or MULT + MULT.
6546 Put a MULT first, leaving PLUS + PLUS, MULT + PLUS, or MULT + MULT.
6547 Recurse to associate the second PLUS. */
6548 if (GET_CODE (arg1) == MULT)
6549 tem = arg0, arg0 = arg1, arg1 = tem;
6551 if (GET_CODE (arg1) == PLUS)
6553 simplify_giv_expr (loop,
6555 gen_rtx_PLUS (mode, arg0,
6560 /* Now must have MULT + MULT. Distribute if same biv, else not giv. */
6561 if (GET_CODE (arg0) != MULT || GET_CODE (arg1) != MULT)
6564 if (!rtx_equal_p (arg0, arg1))
6567 return simplify_giv_expr (loop,
6576 /* Handle "a - b" as "a + b * (-1)". */
6577 return simplify_giv_expr (loop,
6586 arg0 = simplify_giv_expr (loop, XEXP (x, 0), ext_val, benefit);
6587 arg1 = simplify_giv_expr (loop, XEXP (x, 1), ext_val, benefit);
6588 if (arg0 == 0 || arg1 == 0)
6591 /* Put constant last, CONST_INT last if both constant. */
6592 if ((GET_CODE (arg0) == USE || GET_CODE (arg0) == CONST_INT)
6593 && GET_CODE (arg1) != CONST_INT)
6594 tem = arg0, arg0 = arg1, arg1 = tem;
6596 /* If second argument is not now constant, not giv. */
6597 if (GET_CODE (arg1) != USE && GET_CODE (arg1) != CONST_INT)
6600 /* Handle multiply by 0 or 1. */
6601 if (arg1 == const0_rtx)
6604 else if (arg1 == const1_rtx)
6607 switch (GET_CODE (arg0))
6610 /* biv * invar. Done. */
6611 return gen_rtx_MULT (mode, arg0, arg1);
6614 /* Product of two constants. */
6615 return GEN_INT (INTVAL (arg0) * INTVAL (arg1));
6618 /* invar * invar is a giv, but attempt to simplify it somehow. */
6619 if (GET_CODE (arg1) != CONST_INT)
6622 arg0 = XEXP (arg0, 0);
6623 if (GET_CODE (arg0) == MULT)
6625 /* (invar_0 * invar_1) * invar_2. Associate. */
6626 return simplify_giv_expr (loop,
6635 /* Porpagate the MULT expressions to the intermost nodes. */
6636 else if (GET_CODE (arg0) == PLUS)
6638 /* (invar_0 + invar_1) * invar_2. Distribute. */
6639 return simplify_giv_expr (loop,
6651 return gen_rtx_USE (mode, gen_rtx_MULT (mode, arg0, arg1));
6654 /* (a * invar_1) * invar_2. Associate. */
6655 return simplify_giv_expr (loop,
6664 /* (a + invar_1) * invar_2. Distribute. */
6665 return simplify_giv_expr (loop,
6680 /* Shift by constant is multiply by power of two. */
6681 if (GET_CODE (XEXP (x, 1)) != CONST_INT)
6685 simplify_giv_expr (loop,
6688 GEN_INT ((HOST_WIDE_INT) 1
6689 << INTVAL (XEXP (x, 1)))),
6693 /* "-a" is "a * (-1)" */
6694 return simplify_giv_expr (loop,
6695 gen_rtx_MULT (mode, XEXP (x, 0), constm1_rtx),
6699 /* "~a" is "-a - 1". Silly, but easy. */
6700 return simplify_giv_expr (loop,
6701 gen_rtx_MINUS (mode,
6702 gen_rtx_NEG (mode, XEXP (x, 0)),
6707 /* Already in proper form for invariant. */
6713 /* Conditionally recognize extensions of simple IVs. After we've
6714 computed loop traversal counts and verified the range of the
6715 source IV, we'll reevaluate this as a GIV. */
6716 if (*ext_val == NULL_RTX)
6718 arg0 = simplify_giv_expr (loop, XEXP (x, 0), ext_val, benefit);
6719 if (arg0 && *ext_val == NULL_RTX && GET_CODE (arg0) == REG)
6721 *ext_val = gen_rtx_fmt_e (GET_CODE (x), mode, arg0);
6728 /* If this is a new register, we can't deal with it. */
6729 if (REGNO (x) >= max_reg_before_loop)
6732 /* Check for biv or giv. */
6733 switch (REG_IV_TYPE (ivs, REGNO (x)))
6737 case GENERAL_INDUCT:
6739 struct induction *v = REG_IV_INFO (ivs, REGNO (x));
6741 /* Form expression from giv and add benefit. Ensure this giv
6742 can derive another and subtract any needed adjustment if so. */
6744 /* Increasing the benefit here is risky. The only case in which it
6745 is arguably correct is if this is the only use of V. In other
6746 cases, this will artificially inflate the benefit of the current
6747 giv, and lead to suboptimal code. Thus, it is disabled, since
6748 potentially not reducing an only marginally beneficial giv is
6749 less harmful than reducing many givs that are not really
6752 rtx single_use = regs->array[REGNO (x)].single_usage;
6753 if (single_use && single_use != const0_rtx)
6754 *benefit += v->benefit;
6760 tem = gen_rtx_PLUS (mode, gen_rtx_MULT (mode,
6761 v->src_reg, v->mult_val),
6764 if (v->derive_adjustment)
6765 tem = gen_rtx_MINUS (mode, tem, v->derive_adjustment);
6766 arg0 = simplify_giv_expr (loop, tem, ext_val, benefit);
6769 if (!v->ext_dependent)
6774 *ext_val = v->ext_dependent;
6782 /* If it isn't an induction variable, and it is invariant, we
6783 may be able to simplify things further by looking through
6784 the bits we just moved outside the loop. */
6785 if (loop_invariant_p (loop, x) == 1)
6788 struct loop_movables *movables = LOOP_MOVABLES (loop);
6790 for (m = movables->head; m; m = m->next)
6791 if (rtx_equal_p (x, m->set_dest))
6793 /* Ok, we found a match. Substitute and simplify. */
6795 /* If we match another movable, we must use that, as
6796 this one is going away. */
6798 return simplify_giv_expr (loop, m->match->set_dest,
6801 /* If consec is non-zero, this is a member of a group of
6802 instructions that were moved together. We handle this
6803 case only to the point of seeking to the last insn and
6804 looking for a REG_EQUAL. Fail if we don't find one. */
6811 tem = NEXT_INSN (tem);
6815 tem = find_reg_note (tem, REG_EQUAL, NULL_RTX);
6817 tem = XEXP (tem, 0);
6821 tem = single_set (m->insn);
6823 tem = SET_SRC (tem);
6828 /* What we are most interested in is pointer
6829 arithmetic on invariants -- only take
6830 patterns we may be able to do something with. */
6831 if (GET_CODE (tem) == PLUS
6832 || GET_CODE (tem) == MULT
6833 || GET_CODE (tem) == ASHIFT
6834 || GET_CODE (tem) == CONST_INT
6835 || GET_CODE (tem) == SYMBOL_REF)
6837 tem = simplify_giv_expr (loop, tem, ext_val,
6842 else if (GET_CODE (tem) == CONST
6843 && GET_CODE (XEXP (tem, 0)) == PLUS
6844 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == SYMBOL_REF
6845 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)
6847 tem = simplify_giv_expr (loop, XEXP (tem, 0),
6859 /* Fall through to general case. */
6861 /* If invariant, return as USE (unless CONST_INT).
6862 Otherwise, not giv. */
6863 if (GET_CODE (x) == USE)
6866 if (loop_invariant_p (loop, x) == 1)
6868 if (GET_CODE (x) == CONST_INT)
6870 if (GET_CODE (x) == CONST
6871 && GET_CODE (XEXP (x, 0)) == PLUS
6872 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
6873 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
6875 return gen_rtx_USE (mode, x);
6882 /* This routine folds invariants such that there is only ever one
6883 CONST_INT in the summation. It is only used by simplify_giv_expr. */
6886 sge_plus_constant (x, c)
6889 if (GET_CODE (x) == CONST_INT)
6890 return GEN_INT (INTVAL (x) + INTVAL (c));
6891 else if (GET_CODE (x) != PLUS)
6892 return gen_rtx_PLUS (GET_MODE (x), x, c);
6893 else if (GET_CODE (XEXP (x, 1)) == CONST_INT)
6895 return gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0),
6896 GEN_INT (INTVAL (XEXP (x, 1)) + INTVAL (c)));
6898 else if (GET_CODE (XEXP (x, 0)) == PLUS
6899 || GET_CODE (XEXP (x, 1)) != PLUS)
6901 return gen_rtx_PLUS (GET_MODE (x),
6902 sge_plus_constant (XEXP (x, 0), c), XEXP (x, 1));
6906 return gen_rtx_PLUS (GET_MODE (x),
6907 sge_plus_constant (XEXP (x, 1), c), XEXP (x, 0));
6912 sge_plus (mode, x, y)
6913 enum machine_mode mode;
6916 while (GET_CODE (y) == PLUS)
6918 rtx a = XEXP (y, 0);
6919 if (GET_CODE (a) == CONST_INT)
6920 x = sge_plus_constant (x, a);
6922 x = gen_rtx_PLUS (mode, x, a);
6925 if (GET_CODE (y) == CONST_INT)
6926 x = sge_plus_constant (x, y);
6928 x = gen_rtx_PLUS (mode, x, y);
6932 /* Help detect a giv that is calculated by several consecutive insns;
6936 The caller has already identified the first insn P as having a giv as dest;
6937 we check that all other insns that set the same register follow
6938 immediately after P, that they alter nothing else,
6939 and that the result of the last is still a giv.
6941 The value is 0 if the reg set in P is not really a giv.
6942 Otherwise, the value is the amount gained by eliminating
6943 all the consecutive insns that compute the value.
6945 FIRST_BENEFIT is the amount gained by eliminating the first insn, P.
6946 SRC_REG is the reg of the biv; DEST_REG is the reg of the giv.
6948 The coefficients of the ultimate giv value are stored in
6949 *MULT_VAL and *ADD_VAL. */
6952 consec_sets_giv (loop, first_benefit, p, src_reg, dest_reg,
6953 add_val, mult_val, ext_val, last_consec_insn)
6954 const struct loop *loop;
6962 rtx *last_consec_insn;
6964 struct loop_ivs *ivs = LOOP_IVS (loop);
6965 struct loop_regs *regs = LOOP_REGS (loop);
6972 /* Indicate that this is a giv so that we can update the value produced in
6973 each insn of the multi-insn sequence.
6975 This induction structure will be used only by the call to
6976 general_induction_var below, so we can allocate it on our stack.
6977 If this is a giv, our caller will replace the induct var entry with
6978 a new induction structure. */
6979 struct induction *v;
6981 if (REG_IV_TYPE (ivs, REGNO (dest_reg)) != UNKNOWN_INDUCT)
6984 v = (struct induction *) alloca (sizeof (struct induction));
6985 v->src_reg = src_reg;
6986 v->mult_val = *mult_val;
6987 v->add_val = *add_val;
6988 v->benefit = first_benefit;
6990 v->derive_adjustment = 0;
6991 v->ext_dependent = NULL_RTX;
6993 REG_IV_TYPE (ivs, REGNO (dest_reg)) = GENERAL_INDUCT;
6994 REG_IV_INFO (ivs, REGNO (dest_reg)) = v;
6996 count = regs->array[REGNO (dest_reg)].n_times_set - 1;
7001 code = GET_CODE (p);
7003 /* If libcall, skip to end of call sequence. */
7004 if (code == INSN && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
7008 && (set = single_set (p))
7009 && GET_CODE (SET_DEST (set)) == REG
7010 && SET_DEST (set) == dest_reg
7011 && (general_induction_var (loop, SET_SRC (set), &src_reg,
7012 add_val, mult_val, ext_val, 0,
7014 /* Giv created by equivalent expression. */
7015 || ((temp = find_reg_note (p, REG_EQUAL, NULL_RTX))
7016 && general_induction_var (loop, XEXP (temp, 0), &src_reg,
7017 add_val, mult_val, ext_val, 0,
7018 &benefit, VOIDmode)))
7019 && src_reg == v->src_reg)
7021 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
7022 benefit += libcall_benefit (p);
7025 v->mult_val = *mult_val;
7026 v->add_val = *add_val;
7027 v->benefit += benefit;
7029 else if (code != NOTE)
7031 /* Allow insns that set something other than this giv to a
7032 constant. Such insns are needed on machines which cannot
7033 include long constants and should not disqualify a giv. */
7035 && (set = single_set (p))
7036 && SET_DEST (set) != dest_reg
7037 && CONSTANT_P (SET_SRC (set)))
7040 REG_IV_TYPE (ivs, REGNO (dest_reg)) = UNKNOWN_INDUCT;
7045 REG_IV_TYPE (ivs, REGNO (dest_reg)) = UNKNOWN_INDUCT;
7046 *last_consec_insn = p;
7050 /* Return an rtx, if any, that expresses giv G2 as a function of the register
7051 represented by G1. If no such expression can be found, or it is clear that
7052 it cannot possibly be a valid address, 0 is returned.
7054 To perform the computation, we note that
7057 where `v' is the biv.
7059 So G2 = (y/b) * G1 + (b - a*y/x).
7061 Note that MULT = y/x.
7063 Update: A and B are now allowed to be additive expressions such that
7064 B contains all variables in A. That is, computing B-A will not require
7065 subtracting variables. */
7068 express_from_1 (a, b, mult)
7071 /* If MULT is zero, then A*MULT is zero, and our expression is B. */
7073 if (mult == const0_rtx)
7076 /* If MULT is not 1, we cannot handle A with non-constants, since we
7077 would then be required to subtract multiples of the registers in A.
7078 This is theoretically possible, and may even apply to some Fortran
7079 constructs, but it is a lot of work and we do not attempt it here. */
7081 if (mult != const1_rtx && GET_CODE (a) != CONST_INT)
7084 /* In general these structures are sorted top to bottom (down the PLUS
7085 chain), but not left to right across the PLUS. If B is a higher
7086 order giv than A, we can strip one level and recurse. If A is higher
7087 order, we'll eventually bail out, but won't know that until the end.
7088 If they are the same, we'll strip one level around this loop. */
7090 while (GET_CODE (a) == PLUS && GET_CODE (b) == PLUS)
7092 rtx ra, rb, oa, ob, tmp;
7094 ra = XEXP (a, 0), oa = XEXP (a, 1);
7095 if (GET_CODE (ra) == PLUS)
7096 tmp = ra, ra = oa, oa = tmp;
7098 rb = XEXP (b, 0), ob = XEXP (b, 1);
7099 if (GET_CODE (rb) == PLUS)
7100 tmp = rb, rb = ob, ob = tmp;
7102 if (rtx_equal_p (ra, rb))
7103 /* We matched: remove one reg completely. */
7105 else if (GET_CODE (ob) != PLUS && rtx_equal_p (ra, ob))
7106 /* An alternate match. */
7108 else if (GET_CODE (oa) != PLUS && rtx_equal_p (oa, rb))
7109 /* An alternate match. */
7113 /* Indicates an extra register in B. Strip one level from B and
7114 recurse, hoping B was the higher order expression. */
7115 ob = express_from_1 (a, ob, mult);
7118 return gen_rtx_PLUS (GET_MODE (b), rb, ob);
7122 /* Here we are at the last level of A, go through the cases hoping to
7123 get rid of everything but a constant. */
7125 if (GET_CODE (a) == PLUS)
7129 ra = XEXP (a, 0), oa = XEXP (a, 1);
7130 if (rtx_equal_p (oa, b))
7132 else if (!rtx_equal_p (ra, b))
7135 if (GET_CODE (oa) != CONST_INT)
7138 return GEN_INT (-INTVAL (oa) * INTVAL (mult));
7140 else if (GET_CODE (a) == CONST_INT)
7142 return plus_constant (b, -INTVAL (a) * INTVAL (mult));
7144 else if (CONSTANT_P (a))
7146 enum machine_mode mode_a = GET_MODE (a);
7147 enum machine_mode mode_b = GET_MODE (b);
7148 enum machine_mode mode = mode_b == VOIDmode ? mode_a : mode_b;
7149 return simplify_gen_binary (MINUS, mode, b, a);
7151 else if (GET_CODE (b) == PLUS)
7153 if (rtx_equal_p (a, XEXP (b, 0)))
7155 else if (rtx_equal_p (a, XEXP (b, 1)))
7160 else if (rtx_equal_p (a, b))
7167 express_from (g1, g2)
7168 struct induction *g1, *g2;
7172 /* The value that G1 will be multiplied by must be a constant integer. Also,
7173 the only chance we have of getting a valid address is if b*c/a (see above
7174 for notation) is also an integer. */
7175 if (GET_CODE (g1->mult_val) == CONST_INT
7176 && GET_CODE (g2->mult_val) == CONST_INT)
7178 if (g1->mult_val == const0_rtx
7179 || INTVAL (g2->mult_val) % INTVAL (g1->mult_val) != 0)
7181 mult = GEN_INT (INTVAL (g2->mult_val) / INTVAL (g1->mult_val));
7183 else if (rtx_equal_p (g1->mult_val, g2->mult_val))
7187 /* ??? Find out if the one is a multiple of the other? */
7191 add = express_from_1 (g1->add_val, g2->add_val, mult);
7192 if (add == NULL_RTX)
7194 /* Failed. If we've got a multiplication factor between G1 and G2,
7195 scale G1's addend and try again. */
7196 if (INTVAL (mult) > 1)
7198 rtx g1_add_val = g1->add_val;
7199 if (GET_CODE (g1_add_val) == MULT
7200 && GET_CODE (XEXP (g1_add_val, 1)) == CONST_INT)
7203 m = INTVAL (mult) * INTVAL (XEXP (g1_add_val, 1));
7204 g1_add_val = gen_rtx_MULT (GET_MODE (g1_add_val),
7205 XEXP (g1_add_val, 0), GEN_INT (m));
7209 g1_add_val = gen_rtx_MULT (GET_MODE (g1_add_val), g1_add_val,
7213 add = express_from_1 (g1_add_val, g2->add_val, const1_rtx);
7216 if (add == NULL_RTX)
7219 /* Form simplified final result. */
7220 if (mult == const0_rtx)
7222 else if (mult == const1_rtx)
7223 mult = g1->dest_reg;
7225 mult = gen_rtx_MULT (g2->mode, g1->dest_reg, mult);
7227 if (add == const0_rtx)
7231 if (GET_CODE (add) == PLUS
7232 && CONSTANT_P (XEXP (add, 1)))
7234 rtx tem = XEXP (add, 1);
7235 mult = gen_rtx_PLUS (g2->mode, mult, XEXP (add, 0));
7239 return gen_rtx_PLUS (g2->mode, mult, add);
7243 /* Return an rtx, if any, that expresses giv G2 as a function of the register
7244 represented by G1. This indicates that G2 should be combined with G1 and
7245 that G2 can use (either directly or via an address expression) a register
7246 used to represent G1. */
7249 combine_givs_p (g1, g2)
7250 struct induction *g1, *g2;
7254 /* With the introduction of ext dependent givs, we must care for modes.
7255 G2 must not use a wider mode than G1. */
7256 if (GET_MODE_SIZE (g1->mode) < GET_MODE_SIZE (g2->mode))
7259 ret = comb = express_from (g1, g2);
7260 if (comb == NULL_RTX)
7262 if (g1->mode != g2->mode)
7263 ret = gen_lowpart (g2->mode, comb);
7265 /* If these givs are identical, they can be combined. We use the results
7266 of express_from because the addends are not in a canonical form, so
7267 rtx_equal_p is a weaker test. */
7268 /* But don't combine a DEST_REG giv with a DEST_ADDR giv; we want the
7269 combination to be the other way round. */
7270 if (comb == g1->dest_reg
7271 && (g1->giv_type == DEST_REG || g2->giv_type == DEST_ADDR))
7276 /* If G2 can be expressed as a function of G1 and that function is valid
7277 as an address and no more expensive than using a register for G2,
7278 the expression of G2 in terms of G1 can be used. */
7280 && g2->giv_type == DEST_ADDR
7281 && memory_address_p (GET_MODE (g2->mem), ret)
7282 /* ??? Looses, especially with -fforce-addr, where *g2->location
7283 will always be a register, and so anything more complicated
7287 && ADDRESS_COST (tem) <= ADDRESS_COST (*g2->location)
7289 && rtx_cost (tem, MEM) <= rtx_cost (*g2->location, MEM)
7300 /* Check each extension dependent giv in this class to see if its
7301 root biv is safe from wrapping in the interior mode, which would
7302 make the giv illegal. */
7305 check_ext_dependent_givs (bl, loop_info)
7306 struct iv_class *bl;
7307 struct loop_info *loop_info;
7309 int ze_ok = 0, se_ok = 0, info_ok = 0;
7310 enum machine_mode biv_mode = GET_MODE (bl->biv->src_reg);
7311 HOST_WIDE_INT start_val;
7312 unsigned HOST_WIDE_INT u_end_val = 0;
7313 unsigned HOST_WIDE_INT u_start_val = 0;
7315 struct induction *v;
7317 /* Make sure the iteration data is available. We must have
7318 constants in order to be certain of no overflow. */
7319 /* ??? An unknown iteration count with an increment of +-1
7320 combined with friendly exit tests of against an invariant
7321 value is also ameanable to optimization. Not implemented. */
7322 if (loop_info->n_iterations > 0
7323 && bl->initial_value
7324 && GET_CODE (bl->initial_value) == CONST_INT
7325 && (incr = biv_total_increment (bl))
7326 && GET_CODE (incr) == CONST_INT
7327 /* Make sure the host can represent the arithmetic. */
7328 && HOST_BITS_PER_WIDE_INT >= GET_MODE_BITSIZE (biv_mode))
7330 unsigned HOST_WIDE_INT abs_incr, total_incr;
7331 HOST_WIDE_INT s_end_val;
7335 start_val = INTVAL (bl->initial_value);
7336 u_start_val = start_val;
7338 neg_incr = 0, abs_incr = INTVAL (incr);
7339 if (INTVAL (incr) < 0)
7340 neg_incr = 1, abs_incr = -abs_incr;
7341 total_incr = abs_incr * loop_info->n_iterations;
7343 /* Check for host arithmatic overflow. */
7344 if (total_incr / loop_info->n_iterations == abs_incr)
7346 unsigned HOST_WIDE_INT u_max;
7347 HOST_WIDE_INT s_max;
7349 u_end_val = start_val + (neg_incr ? -total_incr : total_incr);
7350 s_end_val = u_end_val;
7351 u_max = GET_MODE_MASK (biv_mode);
7354 /* Check zero extension of biv ok. */
7356 /* Check for host arithmatic overflow. */
7358 ? u_end_val < u_start_val
7359 : u_end_val > u_start_val)
7360 /* Check for target arithmetic overflow. */
7362 ? 1 /* taken care of with host overflow */
7363 : u_end_val <= u_max))
7368 /* Check sign extension of biv ok. */
7369 /* ??? While it is true that overflow with signed and pointer
7370 arithmetic is undefined, I fear too many programmers don't
7371 keep this fact in mind -- myself included on occasion.
7372 So leave alone with the signed overflow optimizations. */
7373 if (start_val >= -s_max - 1
7374 /* Check for host arithmatic overflow. */
7376 ? s_end_val < start_val
7377 : s_end_val > start_val)
7378 /* Check for target arithmetic overflow. */
7380 ? s_end_val >= -s_max - 1
7381 : s_end_val <= s_max))
7388 /* Invalidate givs that fail the tests. */
7389 for (v = bl->giv; v; v = v->next_iv)
7390 if (v->ext_dependent)
7392 enum rtx_code code = GET_CODE (v->ext_dependent);
7405 /* We don't know whether this value is being used as either
7406 signed or unsigned, so to safely truncate we must satisfy
7407 both. The initial check here verifies the BIV itself;
7408 once that is successful we may check its range wrt the
7412 enum machine_mode outer_mode = GET_MODE (v->ext_dependent);
7413 unsigned HOST_WIDE_INT max = GET_MODE_MASK (outer_mode) >> 1;
7415 /* We know from the above that both endpoints are nonnegative,
7416 and that there is no wrapping. Verify that both endpoints
7417 are within the (signed) range of the outer mode. */
7418 if (u_start_val <= max && u_end_val <= max)
7429 if (loop_dump_stream)
7431 fprintf (loop_dump_stream,
7432 "Verified ext dependent giv at %d of reg %d\n",
7433 INSN_UID (v->insn), bl->regno);
7438 if (loop_dump_stream)
7443 why = "biv iteration values overflowed";
7447 incr = biv_total_increment (bl);
7448 if (incr == const1_rtx)
7449 why = "biv iteration info incomplete; incr by 1";
7451 why = "biv iteration info incomplete";
7454 fprintf (loop_dump_stream,
7455 "Failed ext dependent giv at %d, %s\n",
7456 INSN_UID (v->insn), why);
7459 bl->all_reduced = 0;
7464 /* Generate a version of VALUE in a mode appropriate for initializing V. */
7467 extend_value_for_giv (v, value)
7468 struct induction *v;
7471 rtx ext_dep = v->ext_dependent;
7476 /* Recall that check_ext_dependent_givs verified that the known bounds
7477 of a biv did not overflow or wrap with respect to the extension for
7478 the giv. Therefore, constants need no additional adjustment. */
7479 if (CONSTANT_P (value) && GET_MODE (value) == VOIDmode)
7482 /* Otherwise, we must adjust the value to compensate for the
7483 differing modes of the biv and the giv. */
7484 return gen_rtx_fmt_e (GET_CODE (ext_dep), GET_MODE (ext_dep), value);
7487 struct combine_givs_stats
7494 cmp_combine_givs_stats (xp, yp)
7498 const struct combine_givs_stats * const x =
7499 (const struct combine_givs_stats *) xp;
7500 const struct combine_givs_stats * const y =
7501 (const struct combine_givs_stats *) yp;
7503 d = y->total_benefit - x->total_benefit;
7504 /* Stabilize the sort. */
7506 d = x->giv_number - y->giv_number;
7510 /* Check all pairs of givs for iv_class BL and see if any can be combined with
7511 any other. If so, point SAME to the giv combined with and set NEW_REG to
7512 be an expression (in terms of the other giv's DEST_REG) equivalent to the
7513 giv. Also, update BENEFIT and related fields for cost/benefit analysis. */
7516 combine_givs (regs, bl)
7517 struct loop_regs *regs;
7518 struct iv_class *bl;
7520 /* Additional benefit to add for being combined multiple times. */
7521 const int extra_benefit = 3;
7523 struct induction *g1, *g2, **giv_array;
7524 int i, j, k, giv_count;
7525 struct combine_givs_stats *stats;
7528 /* Count givs, because bl->giv_count is incorrect here. */
7530 for (g1 = bl->giv; g1; g1 = g1->next_iv)
7535 = (struct induction **) alloca (giv_count * sizeof (struct induction *));
7537 for (g1 = bl->giv; g1; g1 = g1->next_iv)
7539 giv_array[i++] = g1;
7541 stats = (struct combine_givs_stats *) xcalloc (giv_count, sizeof (*stats));
7542 can_combine = (rtx *) xcalloc (giv_count, giv_count * sizeof (rtx));
7544 for (i = 0; i < giv_count; i++)
7550 stats[i].giv_number = i;
7552 /* If a DEST_REG GIV is used only once, do not allow it to combine
7553 with anything, for in doing so we will gain nothing that cannot
7554 be had by simply letting the GIV with which we would have combined
7555 to be reduced on its own. The losage shows up in particular with
7556 DEST_ADDR targets on hosts with reg+reg addressing, though it can
7557 be seen elsewhere as well. */
7558 if (g1->giv_type == DEST_REG
7559 && (single_use = regs->array[REGNO (g1->dest_reg)].single_usage)
7560 && single_use != const0_rtx)
7563 this_benefit = g1->benefit;
7564 /* Add an additional weight for zero addends. */
7565 if (g1->no_const_addval)
7568 for (j = 0; j < giv_count; j++)
7574 && (this_combine = combine_givs_p (g1, g2)) != NULL_RTX)
7576 can_combine[i * giv_count + j] = this_combine;
7577 this_benefit += g2->benefit + extra_benefit;
7580 stats[i].total_benefit = this_benefit;
7583 /* Iterate, combining until we can't. */
7585 qsort (stats, giv_count, sizeof (*stats), cmp_combine_givs_stats);
7587 if (loop_dump_stream)
7589 fprintf (loop_dump_stream, "Sorted combine statistics:\n");
7590 for (k = 0; k < giv_count; k++)
7592 g1 = giv_array[stats[k].giv_number];
7593 if (!g1->combined_with && !g1->same)
7594 fprintf (loop_dump_stream, " {%d, %d}",
7595 INSN_UID (giv_array[stats[k].giv_number]->insn),
7596 stats[k].total_benefit);
7598 putc ('\n', loop_dump_stream);
7601 for (k = 0; k < giv_count; k++)
7603 int g1_add_benefit = 0;
7605 i = stats[k].giv_number;
7608 /* If it has already been combined, skip. */
7609 if (g1->combined_with || g1->same)
7612 for (j = 0; j < giv_count; j++)
7615 if (g1 != g2 && can_combine[i * giv_count + j]
7616 /* If it has already been combined, skip. */
7617 && ! g2->same && ! g2->combined_with)
7621 g2->new_reg = can_combine[i * giv_count + j];
7623 /* For destination, we now may replace by mem expression instead
7624 of register. This changes the costs considerably, so add the
7626 if (g2->giv_type == DEST_ADDR)
7627 g2->benefit = (g2->benefit + reg_address_cost
7628 - address_cost (g2->new_reg,
7629 GET_MODE (g2->mem)));
7630 g1->combined_with++;
7631 g1->lifetime += g2->lifetime;
7633 g1_add_benefit += g2->benefit;
7635 /* ??? The new final_[bg]iv_value code does a much better job
7636 of finding replaceable giv's, and hence this code may no
7637 longer be necessary. */
7638 if (! g2->replaceable && REG_USERVAR_P (g2->dest_reg))
7639 g1_add_benefit -= copy_cost;
7641 /* To help optimize the next set of combinations, remove
7642 this giv from the benefits of other potential mates. */
7643 for (l = 0; l < giv_count; ++l)
7645 int m = stats[l].giv_number;
7646 if (can_combine[m * giv_count + j])
7647 stats[l].total_benefit -= g2->benefit + extra_benefit;
7650 if (loop_dump_stream)
7651 fprintf (loop_dump_stream,
7652 "giv at %d combined with giv at %d; new benefit %d + %d, lifetime %d\n",
7653 INSN_UID (g2->insn), INSN_UID (g1->insn),
7654 g1->benefit, g1_add_benefit, g1->lifetime);
7658 /* To help optimize the next set of combinations, remove
7659 this giv from the benefits of other potential mates. */
7660 if (g1->combined_with)
7662 for (j = 0; j < giv_count; ++j)
7664 int m = stats[j].giv_number;
7665 if (can_combine[m * giv_count + i])
7666 stats[j].total_benefit -= g1->benefit + extra_benefit;
7669 g1->benefit += g1_add_benefit;
7671 /* We've finished with this giv, and everything it touched.
7672 Restart the combination so that proper weights for the
7673 rest of the givs are properly taken into account. */
7674 /* ??? Ideally we would compact the arrays at this point, so
7675 as to not cover old ground. But sanely compacting
7676 can_combine is tricky. */
7686 /* Generate sequence for REG = B * M + A. */
7689 gen_add_mult (b, m, a, reg)
7690 rtx b; /* initial value of basic induction variable */
7691 rtx m; /* multiplicative constant */
7692 rtx a; /* additive constant */
7693 rtx reg; /* destination register */
7699 /* Use unsigned arithmetic. */
7700 result = expand_mult_add (b, reg, m, a, GET_MODE (reg), 1);
7702 emit_move_insn (reg, result);
7703 seq = gen_sequence ();
7710 /* Update registers created in insn sequence SEQ. */
7713 loop_regs_update (loop, seq)
7714 const struct loop *loop ATTRIBUTE_UNUSED;
7717 /* Update register info for alias analysis. */
7719 if (GET_CODE (seq) == SEQUENCE)
7722 for (i = 0; i < XVECLEN (seq, 0); ++i)
7724 rtx set = single_set (XVECEXP (seq, 0, i));
7725 if (set && GET_CODE (SET_DEST (set)) == REG)
7726 record_base_value (REGNO (SET_DEST (set)), SET_SRC (set), 0);
7731 if (GET_CODE (seq) == SET
7732 && GET_CODE (SET_DEST (seq)) == REG)
7733 record_base_value (REGNO (SET_DEST (seq)), SET_SRC (seq), 0);
7738 /* EMIT code before BEFORE_BB/BEFORE_INSN to set REG = B * M + A. */
7741 loop_iv_add_mult_emit_before (loop, b, m, a, reg, before_bb, before_insn)
7742 const struct loop *loop;
7743 rtx b; /* initial value of basic induction variable */
7744 rtx m; /* multiplicative constant */
7745 rtx a; /* additive constant */
7746 rtx reg; /* destination register */
7747 basic_block before_bb;
7754 loop_iv_add_mult_hoist (loop, b, m, a, reg);
7758 /* Use copy_rtx to prevent unexpected sharing of these rtx. */
7759 seq = gen_add_mult (copy_rtx (b), copy_rtx (m), copy_rtx (a), reg);
7761 /* Increase the lifetime of any invariants moved further in code. */
7762 update_reg_last_use (a, before_insn);
7763 update_reg_last_use (b, before_insn);
7764 update_reg_last_use (m, before_insn);
7766 loop_insn_emit_before (loop, before_bb, before_insn, seq);
7768 /* It is possible that the expansion created lots of new registers.
7769 Iterate over the sequence we just created and record them all. */
7770 loop_regs_update (loop, seq);
7774 /* Emit insns in loop pre-header to set REG = B * M + A. */
7777 loop_iv_add_mult_sink (loop, b, m, a, reg)
7778 const struct loop *loop;
7779 rtx b; /* initial value of basic induction variable */
7780 rtx m; /* multiplicative constant */
7781 rtx a; /* additive constant */
7782 rtx reg; /* destination register */
7786 /* Use copy_rtx to prevent unexpected sharing of these rtx. */
7787 seq = gen_add_mult (copy_rtx (b), copy_rtx (m), copy_rtx (a), reg);
7789 /* Increase the lifetime of any invariants moved further in code.
7790 ???? Is this really necessary? */
7791 update_reg_last_use (a, loop->sink);
7792 update_reg_last_use (b, loop->sink);
7793 update_reg_last_use (m, loop->sink);
7795 loop_insn_sink (loop, seq);
7797 /* It is possible that the expansion created lots of new registers.
7798 Iterate over the sequence we just created and record them all. */
7799 loop_regs_update (loop, seq);
7803 /* Emit insns after loop to set REG = B * M + A. */
7806 loop_iv_add_mult_hoist (loop, b, m, a, reg)
7807 const struct loop *loop;
7808 rtx b; /* initial value of basic induction variable */
7809 rtx m; /* multiplicative constant */
7810 rtx a; /* additive constant */
7811 rtx reg; /* destination register */
7815 /* Use copy_rtx to prevent unexpected sharing of these rtx. */
7816 seq = gen_add_mult (copy_rtx (b), copy_rtx (m), copy_rtx (a), reg);
7818 loop_insn_hoist (loop, seq);
7820 /* It is possible that the expansion created lots of new registers.
7821 Iterate over the sequence we just created and record them all. */
7822 loop_regs_update (loop, seq);
7827 /* Similar to gen_add_mult, but compute cost rather than generating
7831 iv_add_mult_cost (b, m, a, reg)
7832 rtx b; /* initial value of basic induction variable */
7833 rtx m; /* multiplicative constant */
7834 rtx a; /* additive constant */
7835 rtx reg; /* destination register */
7841 result = expand_mult_add (b, reg, m, a, GET_MODE (reg), 1);
7843 emit_move_insn (reg, result);
7844 last = get_last_insn ();
7847 rtx t = single_set (last);
7849 cost += rtx_cost (SET_SRC (t), SET);
7850 last = PREV_INSN (last);
7856 /* Test whether A * B can be computed without
7857 an actual multiply insn. Value is 1 if so. */
7860 product_cheap_p (a, b)
7868 /* If only one is constant, make it B. */
7869 if (GET_CODE (a) == CONST_INT)
7870 tmp = a, a = b, b = tmp;
7872 /* If first constant, both constant, so don't need multiply. */
7873 if (GET_CODE (a) == CONST_INT)
7876 /* If second not constant, neither is constant, so would need multiply. */
7877 if (GET_CODE (b) != CONST_INT)
7880 /* One operand is constant, so might not need multiply insn. Generate the
7881 code for the multiply and see if a call or multiply, or long sequence
7882 of insns is generated. */
7885 expand_mult (GET_MODE (a), a, b, NULL_RTX, 1);
7886 tmp = gen_sequence ();
7889 if (GET_CODE (tmp) == SEQUENCE)
7891 if (XVEC (tmp, 0) == 0)
7893 else if (XVECLEN (tmp, 0) > 3)
7896 for (i = 0; i < XVECLEN (tmp, 0); i++)
7898 rtx insn = XVECEXP (tmp, 0, i);
7900 if (GET_CODE (insn) != INSN
7901 || (GET_CODE (PATTERN (insn)) == SET
7902 && GET_CODE (SET_SRC (PATTERN (insn))) == MULT)
7903 || (GET_CODE (PATTERN (insn)) == PARALLEL
7904 && GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == SET
7905 && GET_CODE (SET_SRC (XVECEXP (PATTERN (insn), 0, 0))) == MULT))
7912 else if (GET_CODE (tmp) == SET
7913 && GET_CODE (SET_SRC (tmp)) == MULT)
7915 else if (GET_CODE (tmp) == PARALLEL
7916 && GET_CODE (XVECEXP (tmp, 0, 0)) == SET
7917 && GET_CODE (SET_SRC (XVECEXP (tmp, 0, 0))) == MULT)
7923 /* Check to see if loop can be terminated by a "decrement and branch until
7924 zero" instruction. If so, add a REG_NONNEG note to the branch insn if so.
7925 Also try reversing an increment loop to a decrement loop
7926 to see if the optimization can be performed.
7927 Value is nonzero if optimization was performed. */
7929 /* This is useful even if the architecture doesn't have such an insn,
7930 because it might change a loops which increments from 0 to n to a loop
7931 which decrements from n to 0. A loop that decrements to zero is usually
7932 faster than one that increments from zero. */
7934 /* ??? This could be rewritten to use some of the loop unrolling procedures,
7935 such as approx_final_value, biv_total_increment, loop_iterations, and
7936 final_[bg]iv_value. */
7939 check_dbra_loop (loop, insn_count)
7943 struct loop_info *loop_info = LOOP_INFO (loop);
7944 struct loop_regs *regs = LOOP_REGS (loop);
7945 struct loop_ivs *ivs = LOOP_IVS (loop);
7946 struct iv_class *bl;
7953 rtx before_comparison;
7957 int compare_and_branch;
7958 rtx loop_start = loop->start;
7959 rtx loop_end = loop->end;
7961 /* If last insn is a conditional branch, and the insn before tests a
7962 register value, try to optimize it. Otherwise, we can't do anything. */
7964 jump = PREV_INSN (loop_end);
7965 comparison = get_condition_for_loop (loop, jump);
7966 if (comparison == 0)
7968 if (!onlyjump_p (jump))
7971 /* Try to compute whether the compare/branch at the loop end is one or
7972 two instructions. */
7973 get_condition (jump, &first_compare);
7974 if (first_compare == jump)
7975 compare_and_branch = 1;
7976 else if (first_compare == prev_nonnote_insn (jump))
7977 compare_and_branch = 2;
7982 /* If more than one condition is present to control the loop, then
7983 do not proceed, as this function does not know how to rewrite
7984 loop tests with more than one condition.
7986 Look backwards from the first insn in the last comparison
7987 sequence and see if we've got another comparison sequence. */
7990 if ((jump1 = prev_nonnote_insn (first_compare)) != loop->cont)
7991 if (GET_CODE (jump1) == JUMP_INSN)
7995 /* Check all of the bivs to see if the compare uses one of them.
7996 Skip biv's set more than once because we can't guarantee that
7997 it will be zero on the last iteration. Also skip if the biv is
7998 used between its update and the test insn. */
8000 for (bl = ivs->list; bl; bl = bl->next)
8002 if (bl->biv_count == 1
8003 && ! bl->biv->maybe_multiple
8004 && bl->biv->dest_reg == XEXP (comparison, 0)
8005 && ! reg_used_between_p (regno_reg_rtx[bl->regno], bl->biv->insn,
8013 /* Look for the case where the basic induction variable is always
8014 nonnegative, and equals zero on the last iteration.
8015 In this case, add a reg_note REG_NONNEG, which allows the
8016 m68k DBRA instruction to be used. */
8018 if (((GET_CODE (comparison) == GT
8019 && GET_CODE (XEXP (comparison, 1)) == CONST_INT
8020 && INTVAL (XEXP (comparison, 1)) == -1)
8021 || (GET_CODE (comparison) == NE && XEXP (comparison, 1) == const0_rtx))
8022 && GET_CODE (bl->biv->add_val) == CONST_INT
8023 && INTVAL (bl->biv->add_val) < 0)
8025 /* Initial value must be greater than 0,
8026 init_val % -dec_value == 0 to ensure that it equals zero on
8027 the last iteration */
8029 if (GET_CODE (bl->initial_value) == CONST_INT
8030 && INTVAL (bl->initial_value) > 0
8031 && (INTVAL (bl->initial_value)
8032 % (-INTVAL (bl->biv->add_val))) == 0)
8034 /* register always nonnegative, add REG_NOTE to branch */
8035 if (! find_reg_note (jump, REG_NONNEG, NULL_RTX))
8037 = gen_rtx_EXPR_LIST (REG_NONNEG, bl->biv->dest_reg,
8044 /* If the decrement is 1 and the value was tested as >= 0 before
8045 the loop, then we can safely optimize. */
8046 for (p = loop_start; p; p = PREV_INSN (p))
8048 if (GET_CODE (p) == CODE_LABEL)
8050 if (GET_CODE (p) != JUMP_INSN)
8053 before_comparison = get_condition_for_loop (loop, p);
8054 if (before_comparison
8055 && XEXP (before_comparison, 0) == bl->biv->dest_reg
8056 && GET_CODE (before_comparison) == LT
8057 && XEXP (before_comparison, 1) == const0_rtx
8058 && ! reg_set_between_p (bl->biv->dest_reg, p, loop_start)
8059 && INTVAL (bl->biv->add_val) == -1)
8061 if (! find_reg_note (jump, REG_NONNEG, NULL_RTX))
8063 = gen_rtx_EXPR_LIST (REG_NONNEG, bl->biv->dest_reg,
8071 else if (GET_CODE (bl->biv->add_val) == CONST_INT
8072 && INTVAL (bl->biv->add_val) > 0)
8074 /* Try to change inc to dec, so can apply above optimization. */
8076 all registers modified are induction variables or invariant,
8077 all memory references have non-overlapping addresses
8078 (obviously true if only one write)
8079 allow 2 insns for the compare/jump at the end of the loop. */
8080 /* Also, we must avoid any instructions which use both the reversed
8081 biv and another biv. Such instructions will fail if the loop is
8082 reversed. We meet this condition by requiring that either
8083 no_use_except_counting is true, or else that there is only
8085 int num_nonfixed_reads = 0;
8086 /* 1 if the iteration var is used only to count iterations. */
8087 int no_use_except_counting = 0;
8088 /* 1 if the loop has no memory store, or it has a single memory store
8089 which is reversible. */
8090 int reversible_mem_store = 1;
8092 if (bl->giv_count == 0
8093 && !loop->exit_count
8094 && !loop_info->has_multiple_exit_targets)
8096 rtx bivreg = regno_reg_rtx[bl->regno];
8097 struct iv_class *blt;
8099 /* If there are no givs for this biv, and the only exit is the
8100 fall through at the end of the loop, then
8101 see if perhaps there are no uses except to count. */
8102 no_use_except_counting = 1;
8103 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
8106 rtx set = single_set (p);
8108 if (set && GET_CODE (SET_DEST (set)) == REG
8109 && REGNO (SET_DEST (set)) == bl->regno)
8110 /* An insn that sets the biv is okay. */
8112 else if ((p == prev_nonnote_insn (prev_nonnote_insn (loop_end))
8113 || p == prev_nonnote_insn (loop_end))
8114 && reg_mentioned_p (bivreg, PATTERN (p)))
8116 /* If either of these insns uses the biv and sets a pseudo
8117 that has more than one usage, then the biv has uses
8118 other than counting since it's used to derive a value
8119 that is used more than one time. */
8120 note_stores (PATTERN (p), note_set_pseudo_multiple_uses,
8122 if (regs->multiple_uses)
8124 no_use_except_counting = 0;
8128 else if (reg_mentioned_p (bivreg, PATTERN (p)))
8130 no_use_except_counting = 0;
8135 /* A biv has uses besides counting if it is used to set
8137 for (blt = ivs->list; blt; blt = blt->next)
8139 && reg_mentioned_p (bivreg, SET_SRC (blt->init_set)))
8141 no_use_except_counting = 0;
8146 if (no_use_except_counting)
8147 /* No need to worry about MEMs. */
8149 else if (loop_info->num_mem_sets <= 1)
8151 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
8153 num_nonfixed_reads += count_nonfixed_reads (loop, PATTERN (p));
8155 /* If the loop has a single store, and the destination address is
8156 invariant, then we can't reverse the loop, because this address
8157 might then have the wrong value at loop exit.
8158 This would work if the source was invariant also, however, in that
8159 case, the insn should have been moved out of the loop. */
8161 if (loop_info->num_mem_sets == 1)
8163 struct induction *v;
8165 /* If we could prove that each of the memory locations
8166 written to was different, then we could reverse the
8167 store -- but we don't presently have any way of
8169 reversible_mem_store = 0;
8171 /* If the store depends on a register that is set after the
8172 store, it depends on the initial value, and is thus not
8174 for (v = bl->giv; reversible_mem_store && v; v = v->next_iv)
8176 if (v->giv_type == DEST_REG
8177 && reg_mentioned_p (v->dest_reg,
8178 PATTERN (loop_info->first_loop_store_insn))
8179 && loop_insn_first_p (loop_info->first_loop_store_insn,
8181 reversible_mem_store = 0;
8188 /* This code only acts for innermost loops. Also it simplifies
8189 the memory address check by only reversing loops with
8190 zero or one memory access.
8191 Two memory accesses could involve parts of the same array,
8192 and that can't be reversed.
8193 If the biv is used only for counting, than we don't need to worry
8194 about all these things. */
8196 if ((num_nonfixed_reads <= 1
8197 && ! loop_info->has_nonconst_call
8198 && ! loop_info->has_volatile
8199 && reversible_mem_store
8200 && (bl->giv_count + bl->biv_count + loop_info->num_mem_sets
8201 + num_unmoved_movables (loop) + compare_and_branch == insn_count)
8202 && (bl == ivs->list && bl->next == 0))
8203 || no_use_except_counting)
8207 /* Loop can be reversed. */
8208 if (loop_dump_stream)
8209 fprintf (loop_dump_stream, "Can reverse loop\n");
8211 /* Now check other conditions:
8213 The increment must be a constant, as must the initial value,
8214 and the comparison code must be LT.
8216 This test can probably be improved since +/- 1 in the constant
8217 can be obtained by changing LT to LE and vice versa; this is
8221 /* for constants, LE gets turned into LT */
8222 && (GET_CODE (comparison) == LT
8223 || (GET_CODE (comparison) == LE
8224 && no_use_except_counting)))
8226 HOST_WIDE_INT add_val, add_adjust, comparison_val = 0;
8227 rtx initial_value, comparison_value;
8229 enum rtx_code cmp_code;
8230 int comparison_const_width;
8231 unsigned HOST_WIDE_INT comparison_sign_mask;
8233 add_val = INTVAL (bl->biv->add_val);
8234 comparison_value = XEXP (comparison, 1);
8235 if (GET_MODE (comparison_value) == VOIDmode)
8236 comparison_const_width
8237 = GET_MODE_BITSIZE (GET_MODE (XEXP (comparison, 0)));
8239 comparison_const_width
8240 = GET_MODE_BITSIZE (GET_MODE (comparison_value));
8241 if (comparison_const_width > HOST_BITS_PER_WIDE_INT)
8242 comparison_const_width = HOST_BITS_PER_WIDE_INT;
8243 comparison_sign_mask
8244 = (unsigned HOST_WIDE_INT) 1 << (comparison_const_width - 1);
8246 /* If the comparison value is not a loop invariant, then we
8247 can not reverse this loop.
8249 ??? If the insns which initialize the comparison value as
8250 a whole compute an invariant result, then we could move
8251 them out of the loop and proceed with loop reversal. */
8252 if (! loop_invariant_p (loop, comparison_value))
8255 if (GET_CODE (comparison_value) == CONST_INT)
8256 comparison_val = INTVAL (comparison_value);
8257 initial_value = bl->initial_value;
8259 /* Normalize the initial value if it is an integer and
8260 has no other use except as a counter. This will allow
8261 a few more loops to be reversed. */
8262 if (no_use_except_counting
8263 && GET_CODE (comparison_value) == CONST_INT
8264 && GET_CODE (initial_value) == CONST_INT)
8266 comparison_val = comparison_val - INTVAL (bl->initial_value);
8267 /* The code below requires comparison_val to be a multiple
8268 of add_val in order to do the loop reversal, so
8269 round up comparison_val to a multiple of add_val.
8270 Since comparison_value is constant, we know that the
8271 current comparison code is LT. */
8272 comparison_val = comparison_val + add_val - 1;
8274 -= (unsigned HOST_WIDE_INT) comparison_val % add_val;
8275 /* We postpone overflow checks for COMPARISON_VAL here;
8276 even if there is an overflow, we might still be able to
8277 reverse the loop, if converting the loop exit test to
8279 initial_value = const0_rtx;
8282 /* First check if we can do a vanilla loop reversal. */
8283 if (initial_value == const0_rtx
8284 /* If we have a decrement_and_branch_on_count,
8285 prefer the NE test, since this will allow that
8286 instruction to be generated. Note that we must
8287 use a vanilla loop reversal if the biv is used to
8288 calculate a giv or has a non-counting use. */
8289 #if ! defined (HAVE_decrement_and_branch_until_zero) \
8290 && defined (HAVE_decrement_and_branch_on_count)
8291 && (! (add_val == 1 && loop->vtop
8292 && (bl->biv_count == 0
8293 || no_use_except_counting)))
8295 && GET_CODE (comparison_value) == CONST_INT
8296 /* Now do postponed overflow checks on COMPARISON_VAL. */
8297 && ! (((comparison_val - add_val) ^ INTVAL (comparison_value))
8298 & comparison_sign_mask))
8300 /* Register will always be nonnegative, with value
8301 0 on last iteration */
8302 add_adjust = add_val;
8306 else if (add_val == 1 && loop->vtop
8307 && (bl->biv_count == 0
8308 || no_use_except_counting))
8316 if (GET_CODE (comparison) == LE)
8317 add_adjust -= add_val;
8319 /* If the initial value is not zero, or if the comparison
8320 value is not an exact multiple of the increment, then we
8321 can not reverse this loop. */
8322 if (initial_value == const0_rtx
8323 && GET_CODE (comparison_value) == CONST_INT)
8325 if (((unsigned HOST_WIDE_INT) comparison_val % add_val) != 0)
8330 if (! no_use_except_counting || add_val != 1)
8334 final_value = comparison_value;
8336 /* Reset these in case we normalized the initial value
8337 and comparison value above. */
8338 if (GET_CODE (comparison_value) == CONST_INT
8339 && GET_CODE (initial_value) == CONST_INT)
8341 comparison_value = GEN_INT (comparison_val);
8343 = GEN_INT (comparison_val + INTVAL (bl->initial_value));
8345 bl->initial_value = initial_value;
8347 /* Save some info needed to produce the new insns. */
8348 reg = bl->biv->dest_reg;
8349 jump_label = condjump_label (PREV_INSN (loop_end));
8350 new_add_val = GEN_INT (-INTVAL (bl->biv->add_val));
8352 /* Set start_value; if this is not a CONST_INT, we need
8354 Initialize biv to start_value before loop start.
8355 The old initializing insn will be deleted as a
8356 dead store by flow.c. */
8357 if (initial_value == const0_rtx
8358 && GET_CODE (comparison_value) == CONST_INT)
8360 start_value = GEN_INT (comparison_val - add_adjust);
8361 loop_insn_hoist (loop, gen_move_insn (reg, start_value));
8363 else if (GET_CODE (initial_value) == CONST_INT)
8365 enum machine_mode mode = GET_MODE (reg);
8366 rtx offset = GEN_INT (-INTVAL (initial_value) - add_adjust);
8367 rtx add_insn = gen_add3_insn (reg, comparison_value, offset);
8373 = gen_rtx_PLUS (mode, comparison_value, offset);
8374 loop_insn_hoist (loop, add_insn);
8375 if (GET_CODE (comparison) == LE)
8376 final_value = gen_rtx_PLUS (mode, comparison_value,
8379 else if (! add_adjust)
8381 enum machine_mode mode = GET_MODE (reg);
8382 rtx sub_insn = gen_sub3_insn (reg, comparison_value,
8388 = gen_rtx_MINUS (mode, comparison_value, initial_value);
8389 loop_insn_hoist (loop, sub_insn);
8392 /* We could handle the other cases too, but it'll be
8393 better to have a testcase first. */
8396 /* We may not have a single insn which can increment a reg, so
8397 create a sequence to hold all the insns from expand_inc. */
8399 expand_inc (reg, new_add_val);
8400 tem = gen_sequence ();
8403 p = loop_insn_emit_before (loop, 0, bl->biv->insn, tem);
8404 delete_insn (bl->biv->insn);
8406 /* Update biv info to reflect its new status. */
8408 bl->initial_value = start_value;
8409 bl->biv->add_val = new_add_val;
8411 /* Update loop info. */
8412 loop_info->initial_value = reg;
8413 loop_info->initial_equiv_value = reg;
8414 loop_info->final_value = const0_rtx;
8415 loop_info->final_equiv_value = const0_rtx;
8416 loop_info->comparison_value = const0_rtx;
8417 loop_info->comparison_code = cmp_code;
8418 loop_info->increment = new_add_val;
8420 /* Inc LABEL_NUSES so that delete_insn will
8421 not delete the label. */
8422 LABEL_NUSES (XEXP (jump_label, 0))++;
8424 /* Emit an insn after the end of the loop to set the biv's
8425 proper exit value if it is used anywhere outside the loop. */
8426 if ((REGNO_LAST_UID (bl->regno) != INSN_UID (first_compare))
8428 || REGNO_FIRST_UID (bl->regno) != INSN_UID (bl->init_insn))
8429 loop_insn_sink (loop, gen_load_of_final_value (reg, final_value));
8431 /* Delete compare/branch at end of loop. */
8432 delete_related_insns (PREV_INSN (loop_end));
8433 if (compare_and_branch == 2)
8434 delete_related_insns (first_compare);
8436 /* Add new compare/branch insn at end of loop. */
8438 emit_cmp_and_jump_insns (reg, const0_rtx, cmp_code, NULL_RTX,
8440 XEXP (jump_label, 0));
8441 tem = gen_sequence ();
8443 emit_jump_insn_before (tem, loop_end);
8445 for (tem = PREV_INSN (loop_end);
8446 tem && GET_CODE (tem) != JUMP_INSN;
8447 tem = PREV_INSN (tem))
8451 JUMP_LABEL (tem) = XEXP (jump_label, 0);
8457 /* Increment of LABEL_NUSES done above. */
8458 /* Register is now always nonnegative,
8459 so add REG_NONNEG note to the branch. */
8460 REG_NOTES (tem) = gen_rtx_EXPR_LIST (REG_NONNEG, reg,
8466 /* No insn may reference both the reversed and another biv or it
8467 will fail (see comment near the top of the loop reversal
8469 Earlier on, we have verified that the biv has no use except
8470 counting, or it is the only biv in this function.
8471 However, the code that computes no_use_except_counting does
8472 not verify reg notes. It's possible to have an insn that
8473 references another biv, and has a REG_EQUAL note with an
8474 expression based on the reversed biv. To avoid this case,
8475 remove all REG_EQUAL notes based on the reversed biv
8477 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
8481 rtx set = single_set (p);
8482 /* If this is a set of a GIV based on the reversed biv, any
8483 REG_EQUAL notes should still be correct. */
8485 || GET_CODE (SET_DEST (set)) != REG
8486 || (size_t) REGNO (SET_DEST (set)) >= ivs->n_regs
8487 || REG_IV_TYPE (ivs, REGNO (SET_DEST (set))) != GENERAL_INDUCT
8488 || REG_IV_INFO (ivs, REGNO (SET_DEST (set)))->src_reg != bl->biv->src_reg)
8489 for (pnote = ®_NOTES (p); *pnote;)
8491 if (REG_NOTE_KIND (*pnote) == REG_EQUAL
8492 && reg_mentioned_p (regno_reg_rtx[bl->regno],
8494 *pnote = XEXP (*pnote, 1);
8496 pnote = &XEXP (*pnote, 1);
8500 /* Mark that this biv has been reversed. Each giv which depends
8501 on this biv, and which is also live past the end of the loop
8502 will have to be fixed up. */
8506 if (loop_dump_stream)
8508 fprintf (loop_dump_stream, "Reversed loop");
8510 fprintf (loop_dump_stream, " and added reg_nonneg\n");
8512 fprintf (loop_dump_stream, "\n");
8523 /* Verify whether the biv BL appears to be eliminable,
8524 based on the insns in the loop that refer to it.
8526 If ELIMINATE_P is non-zero, actually do the elimination.
8528 THRESHOLD and INSN_COUNT are from loop_optimize and are used to
8529 determine whether invariant insns should be placed inside or at the
8530 start of the loop. */
8533 maybe_eliminate_biv (loop, bl, eliminate_p, threshold, insn_count)
8534 const struct loop *loop;
8535 struct iv_class *bl;
8537 int threshold, insn_count;
8539 struct loop_ivs *ivs = LOOP_IVS (loop);
8540 rtx reg = bl->biv->dest_reg;
8543 /* Scan all insns in the loop, stopping if we find one that uses the
8544 biv in a way that we cannot eliminate. */
8546 for (p = loop->start; p != loop->end; p = NEXT_INSN (p))
8548 enum rtx_code code = GET_CODE (p);
8549 basic_block where_bb = 0;
8550 rtx where_insn = threshold >= insn_count ? 0 : p;
8552 /* If this is a libcall that sets a giv, skip ahead to its end. */
8553 if (GET_RTX_CLASS (code) == 'i')
8555 rtx note = find_reg_note (p, REG_LIBCALL, NULL_RTX);
8559 rtx last = XEXP (note, 0);
8560 rtx set = single_set (last);
8562 if (set && GET_CODE (SET_DEST (set)) == REG)
8564 unsigned int regno = REGNO (SET_DEST (set));
8566 if (regno < ivs->n_regs
8567 && REG_IV_TYPE (ivs, regno) == GENERAL_INDUCT
8568 && REG_IV_INFO (ivs, regno)->src_reg == bl->biv->src_reg)
8573 if ((code == INSN || code == JUMP_INSN || code == CALL_INSN)
8574 && reg_mentioned_p (reg, PATTERN (p))
8575 && ! maybe_eliminate_biv_1 (loop, PATTERN (p), p, bl,
8576 eliminate_p, where_bb, where_insn))
8578 if (loop_dump_stream)
8579 fprintf (loop_dump_stream,
8580 "Cannot eliminate biv %d: biv used in insn %d.\n",
8581 bl->regno, INSN_UID (p));
8588 if (loop_dump_stream)
8589 fprintf (loop_dump_stream, "biv %d %s eliminated.\n",
8590 bl->regno, eliminate_p ? "was" : "can be");
8597 /* INSN and REFERENCE are instructions in the same insn chain.
8598 Return non-zero if INSN is first. */
8601 loop_insn_first_p (insn, reference)
8602 rtx insn, reference;
8606 for (p = insn, q = reference;;)
8608 /* Start with test for not first so that INSN == REFERENCE yields not
8610 if (q == insn || ! p)
8612 if (p == reference || ! q)
8615 /* Either of P or Q might be a NOTE. Notes have the same LUID as the
8616 previous insn, hence the <= comparison below does not work if
8618 if (INSN_UID (p) < max_uid_for_loop
8619 && INSN_UID (q) < max_uid_for_loop
8620 && GET_CODE (p) != NOTE)
8621 return INSN_LUID (p) <= INSN_LUID (q);
8623 if (INSN_UID (p) >= max_uid_for_loop
8624 || GET_CODE (p) == NOTE)
8626 if (INSN_UID (q) >= max_uid_for_loop)
8631 /* We are trying to eliminate BIV in INSN using GIV. Return non-zero if
8632 the offset that we have to take into account due to auto-increment /
8633 div derivation is zero. */
8635 biv_elimination_giv_has_0_offset (biv, giv, insn)
8636 struct induction *biv, *giv;
8639 /* If the giv V had the auto-inc address optimization applied
8640 to it, and INSN occurs between the giv insn and the biv
8641 insn, then we'd have to adjust the value used here.
8642 This is rare, so we don't bother to make this possible. */
8643 if (giv->auto_inc_opt
8644 && ((loop_insn_first_p (giv->insn, insn)
8645 && loop_insn_first_p (insn, biv->insn))
8646 || (loop_insn_first_p (biv->insn, insn)
8647 && loop_insn_first_p (insn, giv->insn))))
8653 /* If BL appears in X (part of the pattern of INSN), see if we can
8654 eliminate its use. If so, return 1. If not, return 0.
8656 If BIV does not appear in X, return 1.
8658 If ELIMINATE_P is non-zero, actually do the elimination.
8659 WHERE_INSN/WHERE_BB indicate where extra insns should be added.
8660 Depending on how many items have been moved out of the loop, it
8661 will either be before INSN (when WHERE_INSN is non-zero) or at the
8662 start of the loop (when WHERE_INSN is zero). */
8665 maybe_eliminate_biv_1 (loop, x, insn, bl, eliminate_p, where_bb, where_insn)
8666 const struct loop *loop;
8668 struct iv_class *bl;
8670 basic_block where_bb;
8673 enum rtx_code code = GET_CODE (x);
8674 rtx reg = bl->biv->dest_reg;
8675 enum machine_mode mode = GET_MODE (reg);
8676 struct induction *v;
8688 /* If we haven't already been able to do something with this BIV,
8689 we can't eliminate it. */
8695 /* If this sets the BIV, it is not a problem. */
8696 if (SET_DEST (x) == reg)
8699 /* If this is an insn that defines a giv, it is also ok because
8700 it will go away when the giv is reduced. */
8701 for (v = bl->giv; v; v = v->next_iv)
8702 if (v->giv_type == DEST_REG && SET_DEST (x) == v->dest_reg)
8706 if (SET_DEST (x) == cc0_rtx && SET_SRC (x) == reg)
8708 /* Can replace with any giv that was reduced and
8709 that has (MULT_VAL != 0) and (ADD_VAL == 0).
8710 Require a constant for MULT_VAL, so we know it's nonzero.
8711 ??? We disable this optimization to avoid potential
8714 for (v = bl->giv; v; v = v->next_iv)
8715 if (GET_CODE (v->mult_val) == CONST_INT && v->mult_val != const0_rtx
8716 && v->add_val == const0_rtx
8717 && ! v->ignore && ! v->maybe_dead && v->always_computable
8721 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8727 /* If the giv has the opposite direction of change,
8728 then reverse the comparison. */
8729 if (INTVAL (v->mult_val) < 0)
8730 new = gen_rtx_COMPARE (GET_MODE (v->new_reg),
8731 const0_rtx, v->new_reg);
8735 /* We can probably test that giv's reduced reg. */
8736 if (validate_change (insn, &SET_SRC (x), new, 0))
8740 /* Look for a giv with (MULT_VAL != 0) and (ADD_VAL != 0);
8741 replace test insn with a compare insn (cmp REDUCED_GIV ADD_VAL).
8742 Require a constant for MULT_VAL, so we know it's nonzero.
8743 ??? Do this only if ADD_VAL is a pointer to avoid a potential
8744 overflow problem. */
8746 for (v = bl->giv; v; v = v->next_iv)
8747 if (GET_CODE (v->mult_val) == CONST_INT
8748 && v->mult_val != const0_rtx
8749 && ! v->ignore && ! v->maybe_dead && v->always_computable
8751 && (GET_CODE (v->add_val) == SYMBOL_REF
8752 || GET_CODE (v->add_val) == LABEL_REF
8753 || GET_CODE (v->add_val) == CONST
8754 || (GET_CODE (v->add_val) == REG
8755 && REG_POINTER (v->add_val))))
8757 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8763 /* If the giv has the opposite direction of change,
8764 then reverse the comparison. */
8765 if (INTVAL (v->mult_val) < 0)
8766 new = gen_rtx_COMPARE (VOIDmode, copy_rtx (v->add_val),
8769 new = gen_rtx_COMPARE (VOIDmode, v->new_reg,
8770 copy_rtx (v->add_val));
8772 /* Replace biv with the giv's reduced register. */
8773 update_reg_last_use (v->add_val, insn);
8774 if (validate_change (insn, &SET_SRC (PATTERN (insn)), new, 0))
8777 /* Insn doesn't support that constant or invariant. Copy it
8778 into a register (it will be a loop invariant.) */
8779 tem = gen_reg_rtx (GET_MODE (v->new_reg));
8781 loop_insn_emit_before (loop, 0, where_insn,
8783 copy_rtx (v->add_val)));
8785 /* Substitute the new register for its invariant value in
8786 the compare expression. */
8787 XEXP (new, (INTVAL (v->mult_val) < 0) ? 0 : 1) = tem;
8788 if (validate_change (insn, &SET_SRC (PATTERN (insn)), new, 0))
8797 case GT: case GE: case GTU: case GEU:
8798 case LT: case LE: case LTU: case LEU:
8799 /* See if either argument is the biv. */
8800 if (XEXP (x, 0) == reg)
8801 arg = XEXP (x, 1), arg_operand = 1;
8802 else if (XEXP (x, 1) == reg)
8803 arg = XEXP (x, 0), arg_operand = 0;
8807 if (CONSTANT_P (arg))
8809 /* First try to replace with any giv that has constant positive
8810 mult_val and constant add_val. We might be able to support
8811 negative mult_val, but it seems complex to do it in general. */
8813 for (v = bl->giv; v; v = v->next_iv)
8814 if (GET_CODE (v->mult_val) == CONST_INT
8815 && INTVAL (v->mult_val) > 0
8816 && (GET_CODE (v->add_val) == SYMBOL_REF
8817 || GET_CODE (v->add_val) == LABEL_REF
8818 || GET_CODE (v->add_val) == CONST
8819 || (GET_CODE (v->add_val) == REG
8820 && REG_POINTER (v->add_val)))
8821 && ! v->ignore && ! v->maybe_dead && v->always_computable
8824 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8830 /* Replace biv with the giv's reduced reg. */
8831 validate_change (insn, &XEXP (x, 1 - arg_operand), v->new_reg, 1);
8833 /* If all constants are actually constant integers and
8834 the derived constant can be directly placed in the COMPARE,
8836 if (GET_CODE (arg) == CONST_INT
8837 && GET_CODE (v->mult_val) == CONST_INT
8838 && GET_CODE (v->add_val) == CONST_INT)
8840 validate_change (insn, &XEXP (x, arg_operand),
8841 GEN_INT (INTVAL (arg)
8842 * INTVAL (v->mult_val)
8843 + INTVAL (v->add_val)), 1);
8847 /* Otherwise, load it into a register. */
8848 tem = gen_reg_rtx (mode);
8849 loop_iv_add_mult_emit_before (loop, arg,
8850 v->mult_val, v->add_val,
8851 tem, where_bb, where_insn);
8852 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
8854 if (apply_change_group ())
8858 /* Look for giv with positive constant mult_val and nonconst add_val.
8859 Insert insns to calculate new compare value.
8860 ??? Turn this off due to possible overflow. */
8862 for (v = bl->giv; v; v = v->next_iv)
8863 if (GET_CODE (v->mult_val) == CONST_INT
8864 && INTVAL (v->mult_val) > 0
8865 && ! v->ignore && ! v->maybe_dead && v->always_computable
8871 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8877 tem = gen_reg_rtx (mode);
8879 /* Replace biv with giv's reduced register. */
8880 validate_change (insn, &XEXP (x, 1 - arg_operand),
8883 /* Compute value to compare against. */
8884 loop_iv_add_mult_emit_before (loop, arg,
8885 v->mult_val, v->add_val,
8886 tem, where_bb, where_insn);
8887 /* Use it in this insn. */
8888 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
8889 if (apply_change_group ())
8893 else if (GET_CODE (arg) == REG || GET_CODE (arg) == MEM)
8895 if (loop_invariant_p (loop, arg) == 1)
8897 /* Look for giv with constant positive mult_val and nonconst
8898 add_val. Insert insns to compute new compare value.
8899 ??? Turn this off due to possible overflow. */
8901 for (v = bl->giv; v; v = v->next_iv)
8902 if (GET_CODE (v->mult_val) == CONST_INT && INTVAL (v->mult_val) > 0
8903 && ! v->ignore && ! v->maybe_dead && v->always_computable
8909 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8915 tem = gen_reg_rtx (mode);
8917 /* Replace biv with giv's reduced register. */
8918 validate_change (insn, &XEXP (x, 1 - arg_operand),
8921 /* Compute value to compare against. */
8922 loop_iv_add_mult_emit_before (loop, arg,
8923 v->mult_val, v->add_val,
8924 tem, where_bb, where_insn);
8925 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
8926 if (apply_change_group ())
8931 /* This code has problems. Basically, you can't know when
8932 seeing if we will eliminate BL, whether a particular giv
8933 of ARG will be reduced. If it isn't going to be reduced,
8934 we can't eliminate BL. We can try forcing it to be reduced,
8935 but that can generate poor code.
8937 The problem is that the benefit of reducing TV, below should
8938 be increased if BL can actually be eliminated, but this means
8939 we might have to do a topological sort of the order in which
8940 we try to process biv. It doesn't seem worthwhile to do
8941 this sort of thing now. */
8944 /* Otherwise the reg compared with had better be a biv. */
8945 if (GET_CODE (arg) != REG
8946 || REG_IV_TYPE (ivs, REGNO (arg)) != BASIC_INDUCT)
8949 /* Look for a pair of givs, one for each biv,
8950 with identical coefficients. */
8951 for (v = bl->giv; v; v = v->next_iv)
8953 struct induction *tv;
8955 if (v->ignore || v->maybe_dead || v->mode != mode)
8958 for (tv = REG_IV_CLASS (ivs, REGNO (arg))->giv; tv;
8960 if (! tv->ignore && ! tv->maybe_dead
8961 && rtx_equal_p (tv->mult_val, v->mult_val)
8962 && rtx_equal_p (tv->add_val, v->add_val)
8963 && tv->mode == mode)
8965 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8971 /* Replace biv with its giv's reduced reg. */
8972 XEXP (x, 1 - arg_operand) = v->new_reg;
8973 /* Replace other operand with the other giv's
8975 XEXP (x, arg_operand) = tv->new_reg;
8982 /* If we get here, the biv can't be eliminated. */
8986 /* If this address is a DEST_ADDR giv, it doesn't matter if the
8987 biv is used in it, since it will be replaced. */
8988 for (v = bl->giv; v; v = v->next_iv)
8989 if (v->giv_type == DEST_ADDR && v->location == &XEXP (x, 0))
8997 /* See if any subexpression fails elimination. */
8998 fmt = GET_RTX_FORMAT (code);
8999 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
9004 if (! maybe_eliminate_biv_1 (loop, XEXP (x, i), insn, bl,
9005 eliminate_p, where_bb, where_insn))
9010 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
9011 if (! maybe_eliminate_biv_1 (loop, XVECEXP (x, i, j), insn, bl,
9012 eliminate_p, where_bb, where_insn))
9021 /* Return nonzero if the last use of REG
9022 is in an insn following INSN in the same basic block. */
9025 last_use_this_basic_block (reg, insn)
9031 n && GET_CODE (n) != CODE_LABEL && GET_CODE (n) != JUMP_INSN;
9034 if (REGNO_LAST_UID (REGNO (reg)) == INSN_UID (n))
9040 /* Called via `note_stores' to record the initial value of a biv. Here we
9041 just record the location of the set and process it later. */
9044 record_initial (dest, set, data)
9047 void *data ATTRIBUTE_UNUSED;
9049 struct loop_ivs *ivs = (struct loop_ivs *) data;
9050 struct iv_class *bl;
9052 if (GET_CODE (dest) != REG
9053 || REGNO (dest) >= ivs->n_regs
9054 || REG_IV_TYPE (ivs, REGNO (dest)) != BASIC_INDUCT)
9057 bl = REG_IV_CLASS (ivs, REGNO (dest));
9059 /* If this is the first set found, record it. */
9060 if (bl->init_insn == 0)
9062 bl->init_insn = note_insn;
9067 /* If any of the registers in X are "old" and currently have a last use earlier
9068 than INSN, update them to have a last use of INSN. Their actual last use
9069 will be the previous insn but it will not have a valid uid_luid so we can't
9070 use it. X must be a source expression only. */
9073 update_reg_last_use (x, insn)
9077 /* Check for the case where INSN does not have a valid luid. In this case,
9078 there is no need to modify the regno_last_uid, as this can only happen
9079 when code is inserted after the loop_end to set a pseudo's final value,
9080 and hence this insn will never be the last use of x.
9081 ???? This comment is not correct. See for example loop_givs_reduce.
9082 This may insert an insn before another new insn. */
9083 if (GET_CODE (x) == REG && REGNO (x) < max_reg_before_loop
9084 && INSN_UID (insn) < max_uid_for_loop
9085 && REGNO_LAST_LUID (REGNO (x)) < INSN_LUID (insn))
9087 REGNO_LAST_UID (REGNO (x)) = INSN_UID (insn);
9092 const char *fmt = GET_RTX_FORMAT (GET_CODE (x));
9093 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
9096 update_reg_last_use (XEXP (x, i), insn);
9097 else if (fmt[i] == 'E')
9098 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
9099 update_reg_last_use (XVECEXP (x, i, j), insn);
9104 /* Given an insn INSN and condition COND, return the condition in a
9105 canonical form to simplify testing by callers. Specifically:
9107 (1) The code will always be a comparison operation (EQ, NE, GT, etc.).
9108 (2) Both operands will be machine operands; (cc0) will have been replaced.
9109 (3) If an operand is a constant, it will be the second operand.
9110 (4) (LE x const) will be replaced with (LT x <const+1>) and similarly
9111 for GE, GEU, and LEU.
9113 If the condition cannot be understood, or is an inequality floating-point
9114 comparison which needs to be reversed, 0 will be returned.
9116 If REVERSE is non-zero, then reverse the condition prior to canonizing it.
9118 If EARLIEST is non-zero, it is a pointer to a place where the earliest
9119 insn used in locating the condition was found. If a replacement test
9120 of the condition is desired, it should be placed in front of that
9121 insn and we will be sure that the inputs are still valid.
9123 If WANT_REG is non-zero, we wish the condition to be relative to that
9124 register, if possible. Therefore, do not canonicalize the condition
9128 canonicalize_condition (insn, cond, reverse, earliest, want_reg)
9140 int reverse_code = 0;
9141 enum machine_mode mode;
9143 code = GET_CODE (cond);
9144 mode = GET_MODE (cond);
9145 op0 = XEXP (cond, 0);
9146 op1 = XEXP (cond, 1);
9149 code = reversed_comparison_code (cond, insn);
9150 if (code == UNKNOWN)
9156 /* If we are comparing a register with zero, see if the register is set
9157 in the previous insn to a COMPARE or a comparison operation. Perform
9158 the same tests as a function of STORE_FLAG_VALUE as find_comparison_args
9161 while (GET_RTX_CLASS (code) == '<'
9162 && op1 == CONST0_RTX (GET_MODE (op0))
9165 /* Set non-zero when we find something of interest. */
9169 /* If comparison with cc0, import actual comparison from compare
9173 if ((prev = prev_nonnote_insn (prev)) == 0
9174 || GET_CODE (prev) != INSN
9175 || (set = single_set (prev)) == 0
9176 || SET_DEST (set) != cc0_rtx)
9179 op0 = SET_SRC (set);
9180 op1 = CONST0_RTX (GET_MODE (op0));
9186 /* If this is a COMPARE, pick up the two things being compared. */
9187 if (GET_CODE (op0) == COMPARE)
9189 op1 = XEXP (op0, 1);
9190 op0 = XEXP (op0, 0);
9193 else if (GET_CODE (op0) != REG)
9196 /* Go back to the previous insn. Stop if it is not an INSN. We also
9197 stop if it isn't a single set or if it has a REG_INC note because
9198 we don't want to bother dealing with it. */
9200 if ((prev = prev_nonnote_insn (prev)) == 0
9201 || GET_CODE (prev) != INSN
9202 || FIND_REG_INC_NOTE (prev, NULL_RTX))
9205 set = set_of (op0, prev);
9208 && (GET_CODE (set) != SET
9209 || !rtx_equal_p (SET_DEST (set), op0)))
9212 /* If this is setting OP0, get what it sets it to if it looks
9216 enum machine_mode inner_mode = GET_MODE (SET_DEST (set));
9218 /* ??? We may not combine comparisons done in a CCmode with
9219 comparisons not done in a CCmode. This is to aid targets
9220 like Alpha that have an IEEE compliant EQ instruction, and
9221 a non-IEEE compliant BEQ instruction. The use of CCmode is
9222 actually artificial, simply to prevent the combination, but
9223 should not affect other platforms.
9225 However, we must allow VOIDmode comparisons to match either
9226 CCmode or non-CCmode comparison, because some ports have
9227 modeless comparisons inside branch patterns.
9229 ??? This mode check should perhaps look more like the mode check
9230 in simplify_comparison in combine. */
9232 if ((GET_CODE (SET_SRC (set)) == COMPARE
9235 && GET_MODE_CLASS (inner_mode) == MODE_INT
9236 && (GET_MODE_BITSIZE (inner_mode)
9237 <= HOST_BITS_PER_WIDE_INT)
9238 && (STORE_FLAG_VALUE
9239 & ((HOST_WIDE_INT) 1
9240 << (GET_MODE_BITSIZE (inner_mode) - 1))))
9241 #ifdef FLOAT_STORE_FLAG_VALUE
9243 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
9244 && (REAL_VALUE_NEGATIVE
9245 (FLOAT_STORE_FLAG_VALUE (inner_mode))))
9248 && GET_RTX_CLASS (GET_CODE (SET_SRC (set))) == '<'))
9249 && (((GET_MODE_CLASS (mode) == MODE_CC)
9250 == (GET_MODE_CLASS (inner_mode) == MODE_CC))
9251 || mode == VOIDmode || inner_mode == VOIDmode))
9253 else if (((code == EQ
9255 && (GET_MODE_BITSIZE (inner_mode)
9256 <= HOST_BITS_PER_WIDE_INT)
9257 && GET_MODE_CLASS (inner_mode) == MODE_INT
9258 && (STORE_FLAG_VALUE
9259 & ((HOST_WIDE_INT) 1
9260 << (GET_MODE_BITSIZE (inner_mode) - 1))))
9261 #ifdef FLOAT_STORE_FLAG_VALUE
9263 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
9264 && (REAL_VALUE_NEGATIVE
9265 (FLOAT_STORE_FLAG_VALUE (inner_mode))))
9268 && GET_RTX_CLASS (GET_CODE (SET_SRC (set))) == '<'
9269 && (((GET_MODE_CLASS (mode) == MODE_CC)
9270 == (GET_MODE_CLASS (inner_mode) == MODE_CC))
9271 || mode == VOIDmode || inner_mode == VOIDmode))
9281 else if (reg_set_p (op0, prev))
9282 /* If this sets OP0, but not directly, we have to give up. */
9287 if (GET_RTX_CLASS (GET_CODE (x)) == '<')
9288 code = GET_CODE (x);
9291 code = reversed_comparison_code (x, prev);
9292 if (code == UNKNOWN)
9297 op0 = XEXP (x, 0), op1 = XEXP (x, 1);
9303 /* If constant is first, put it last. */
9304 if (CONSTANT_P (op0))
9305 code = swap_condition (code), tem = op0, op0 = op1, op1 = tem;
9307 /* If OP0 is the result of a comparison, we weren't able to find what
9308 was really being compared, so fail. */
9309 if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_CC)
9312 /* Canonicalize any ordered comparison with integers involving equality
9313 if we can do computations in the relevant mode and we do not
9316 if (GET_CODE (op1) == CONST_INT
9317 && GET_MODE (op0) != VOIDmode
9318 && GET_MODE_BITSIZE (GET_MODE (op0)) <= HOST_BITS_PER_WIDE_INT)
9320 HOST_WIDE_INT const_val = INTVAL (op1);
9321 unsigned HOST_WIDE_INT uconst_val = const_val;
9322 unsigned HOST_WIDE_INT max_val
9323 = (unsigned HOST_WIDE_INT) GET_MODE_MASK (GET_MODE (op0));
9328 if ((unsigned HOST_WIDE_INT) const_val != max_val >> 1)
9329 code = LT, op1 = gen_int_mode (const_val + 1, GET_MODE (op0));
9332 /* When cross-compiling, const_val might be sign-extended from
9333 BITS_PER_WORD to HOST_BITS_PER_WIDE_INT */
9335 if ((HOST_WIDE_INT) (const_val & max_val)
9336 != (((HOST_WIDE_INT) 1
9337 << (GET_MODE_BITSIZE (GET_MODE (op0)) - 1))))
9338 code = GT, op1 = gen_int_mode (const_val - 1, GET_MODE (op0));
9342 if (uconst_val < max_val)
9343 code = LTU, op1 = gen_int_mode (uconst_val + 1, GET_MODE (op0));
9347 if (uconst_val != 0)
9348 code = GTU, op1 = gen_int_mode (uconst_val - 1, GET_MODE (op0));
9357 /* Never return CC0; return zero instead. */
9362 return gen_rtx_fmt_ee (code, VOIDmode, op0, op1);
9365 /* Given a jump insn JUMP, return the condition that will cause it to branch
9366 to its JUMP_LABEL. If the condition cannot be understood, or is an
9367 inequality floating-point comparison which needs to be reversed, 0 will
9370 If EARLIEST is non-zero, it is a pointer to a place where the earliest
9371 insn used in locating the condition was found. If a replacement test
9372 of the condition is desired, it should be placed in front of that
9373 insn and we will be sure that the inputs are still valid. */
9376 get_condition (jump, earliest)
9384 /* If this is not a standard conditional jump, we can't parse it. */
9385 if (GET_CODE (jump) != JUMP_INSN
9386 || ! any_condjump_p (jump))
9388 set = pc_set (jump);
9390 cond = XEXP (SET_SRC (set), 0);
9392 /* If this branches to JUMP_LABEL when the condition is false, reverse
9395 = GET_CODE (XEXP (SET_SRC (set), 2)) == LABEL_REF
9396 && XEXP (XEXP (SET_SRC (set), 2), 0) == JUMP_LABEL (jump);
9398 return canonicalize_condition (jump, cond, reverse, earliest, NULL_RTX);
9401 /* Similar to above routine, except that we also put an invariant last
9402 unless both operands are invariants. */
9405 get_condition_for_loop (loop, x)
9406 const struct loop *loop;
9409 rtx comparison = get_condition (x, (rtx*) 0);
9412 || ! loop_invariant_p (loop, XEXP (comparison, 0))
9413 || loop_invariant_p (loop, XEXP (comparison, 1)))
9416 return gen_rtx_fmt_ee (swap_condition (GET_CODE (comparison)), VOIDmode,
9417 XEXP (comparison, 1), XEXP (comparison, 0));
9420 /* Scan the function and determine whether it has indirect (computed) jumps.
9422 This is taken mostly from flow.c; similar code exists elsewhere
9423 in the compiler. It may be useful to put this into rtlanal.c. */
9425 indirect_jump_in_function_p (start)
9430 for (insn = start; insn; insn = NEXT_INSN (insn))
9431 if (computed_jump_p (insn))
9437 /* Add MEM to the LOOP_MEMS array, if appropriate. See the
9438 documentation for LOOP_MEMS for the definition of `appropriate'.
9439 This function is called from prescan_loop via for_each_rtx. */
9442 insert_loop_mem (mem, data)
9444 void *data ATTRIBUTE_UNUSED;
9446 struct loop_info *loop_info = data;
9453 switch (GET_CODE (m))
9459 /* We're not interested in MEMs that are only clobbered. */
9463 /* We're not interested in the MEM associated with a
9464 CONST_DOUBLE, so there's no need to traverse into this. */
9468 /* We're not interested in any MEMs that only appear in notes. */
9472 /* This is not a MEM. */
9476 /* See if we've already seen this MEM. */
9477 for (i = 0; i < loop_info->mems_idx; ++i)
9478 if (rtx_equal_p (m, loop_info->mems[i].mem))
9480 if (GET_MODE (m) != GET_MODE (loop_info->mems[i].mem))
9481 /* The modes of the two memory accesses are different. If
9482 this happens, something tricky is going on, and we just
9483 don't optimize accesses to this MEM. */
9484 loop_info->mems[i].optimize = 0;
9489 /* Resize the array, if necessary. */
9490 if (loop_info->mems_idx == loop_info->mems_allocated)
9492 if (loop_info->mems_allocated != 0)
9493 loop_info->mems_allocated *= 2;
9495 loop_info->mems_allocated = 32;
9497 loop_info->mems = (loop_mem_info *)
9498 xrealloc (loop_info->mems,
9499 loop_info->mems_allocated * sizeof (loop_mem_info));
9502 /* Actually insert the MEM. */
9503 loop_info->mems[loop_info->mems_idx].mem = m;
9504 /* We can't hoist this MEM out of the loop if it's a BLKmode MEM
9505 because we can't put it in a register. We still store it in the
9506 table, though, so that if we see the same address later, but in a
9507 non-BLK mode, we'll not think we can optimize it at that point. */
9508 loop_info->mems[loop_info->mems_idx].optimize = (GET_MODE (m) != BLKmode);
9509 loop_info->mems[loop_info->mems_idx].reg = NULL_RTX;
9510 ++loop_info->mems_idx;
9516 /* Allocate REGS->ARRAY or reallocate it if it is too small.
9518 Increment REGS->ARRAY[I].SET_IN_LOOP at the index I of each
9519 register that is modified by an insn between FROM and TO. If the
9520 value of an element of REGS->array[I].SET_IN_LOOP becomes 127 or
9521 more, stop incrementing it, to avoid overflow.
9523 Store in REGS->ARRAY[I].SINGLE_USAGE the single insn in which
9524 register I is used, if it is only used once. Otherwise, it is set
9525 to 0 (for no uses) or const0_rtx for more than one use. This
9526 parameter may be zero, in which case this processing is not done.
9528 Set REGS->ARRAY[I].MAY_NOT_OPTIMIZE nonzero if we should not
9529 optimize register I. */
9532 loop_regs_scan (loop, extra_size)
9533 const struct loop *loop;
9536 struct loop_regs *regs = LOOP_REGS (loop);
9538 /* last_set[n] is nonzero iff reg n has been set in the current
9539 basic block. In that case, it is the insn that last set reg n. */
9544 old_nregs = regs->num;
9545 regs->num = max_reg_num ();
9547 /* Grow the regs array if not allocated or too small. */
9548 if (regs->num >= regs->size)
9550 regs->size = regs->num + extra_size;
9552 regs->array = (struct loop_reg *)
9553 xrealloc (regs->array, regs->size * sizeof (*regs->array));
9555 /* Zero the new elements. */
9556 memset (regs->array + old_nregs, 0,
9557 (regs->size - old_nregs) * sizeof (*regs->array));
9560 /* Clear previously scanned fields but do not clear n_times_set. */
9561 for (i = 0; i < old_nregs; i++)
9563 regs->array[i].set_in_loop = 0;
9564 regs->array[i].may_not_optimize = 0;
9565 regs->array[i].single_usage = NULL_RTX;
9568 last_set = (rtx *) xcalloc (regs->num, sizeof (rtx));
9570 /* Scan the loop, recording register usage. */
9571 for (insn = loop->top ? loop->top : loop->start; insn != loop->end;
9572 insn = NEXT_INSN (insn))
9576 /* Record registers that have exactly one use. */
9577 find_single_use_in_loop (regs, insn, PATTERN (insn));
9579 /* Include uses in REG_EQUAL notes. */
9580 if (REG_NOTES (insn))
9581 find_single_use_in_loop (regs, insn, REG_NOTES (insn));
9583 if (GET_CODE (PATTERN (insn)) == SET
9584 || GET_CODE (PATTERN (insn)) == CLOBBER)
9585 count_one_set (regs, insn, PATTERN (insn), last_set);
9586 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
9589 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
9590 count_one_set (regs, insn, XVECEXP (PATTERN (insn), 0, i),
9595 if (GET_CODE (insn) == CODE_LABEL || GET_CODE (insn) == JUMP_INSN)
9596 memset (last_set, 0, regs->num * sizeof (rtx));
9599 /* Invalidate all hard registers clobbered by calls. With one exception:
9600 a call-clobbered PIC register is still function-invariant for our
9601 purposes, since we can hoist any PIC calculations out of the loop.
9602 Thus the call to rtx_varies_p. */
9603 if (LOOP_INFO (loop)->has_call)
9604 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
9605 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i)
9606 && rtx_varies_p (gen_rtx_REG (Pmode, i), /*for_alias=*/1))
9608 regs->array[i].may_not_optimize = 1;
9609 regs->array[i].set_in_loop = 1;
9612 #ifdef AVOID_CCMODE_COPIES
9613 /* Don't try to move insns which set CC registers if we should not
9614 create CCmode register copies. */
9615 for (i = regs->num - 1; i >= FIRST_PSEUDO_REGISTER; i--)
9616 if (GET_MODE_CLASS (GET_MODE (regno_reg_rtx[i])) == MODE_CC)
9617 regs->array[i].may_not_optimize = 1;
9620 /* Set regs->array[I].n_times_set for the new registers. */
9621 for (i = old_nregs; i < regs->num; i++)
9622 regs->array[i].n_times_set = regs->array[i].set_in_loop;
9627 /* Returns the number of real INSNs in the LOOP. */
9630 count_insns_in_loop (loop)
9631 const struct loop *loop;
9636 for (insn = loop->top ? loop->top : loop->start; insn != loop->end;
9637 insn = NEXT_INSN (insn))
9644 /* Move MEMs into registers for the duration of the loop. */
9648 const struct loop *loop;
9650 struct loop_info *loop_info = LOOP_INFO (loop);
9651 struct loop_regs *regs = LOOP_REGS (loop);
9652 int maybe_never = 0;
9654 rtx p, prev_ebb_head;
9655 rtx label = NULL_RTX;
9657 /* Nonzero if the next instruction may never be executed. */
9658 int next_maybe_never = 0;
9659 unsigned int last_max_reg = max_reg_num ();
9661 if (loop_info->mems_idx == 0)
9664 /* We cannot use next_label here because it skips over normal insns. */
9665 end_label = next_nonnote_insn (loop->end);
9666 if (end_label && GET_CODE (end_label) != CODE_LABEL)
9667 end_label = NULL_RTX;
9669 /* Check to see if it's possible that some instructions in the loop are
9670 never executed. Also check if there is a goto out of the loop other
9671 than right after the end of the loop. */
9672 for (p = next_insn_in_loop (loop, loop->scan_start);
9674 p = next_insn_in_loop (loop, p))
9676 if (GET_CODE (p) == CODE_LABEL)
9678 else if (GET_CODE (p) == JUMP_INSN
9679 /* If we enter the loop in the middle, and scan
9680 around to the beginning, don't set maybe_never
9681 for that. This must be an unconditional jump,
9682 otherwise the code at the top of the loop might
9683 never be executed. Unconditional jumps are
9684 followed a by barrier then loop end. */
9685 && ! (GET_CODE (p) == JUMP_INSN
9686 && JUMP_LABEL (p) == loop->top
9687 && NEXT_INSN (NEXT_INSN (p)) == loop->end
9688 && any_uncondjump_p (p)))
9690 /* If this is a jump outside of the loop but not right
9691 after the end of the loop, we would have to emit new fixup
9692 sequences for each such label. */
9693 if (/* If we can't tell where control might go when this
9694 JUMP_INSN is executed, we must be conservative. */
9696 || (JUMP_LABEL (p) != end_label
9697 && (INSN_UID (JUMP_LABEL (p)) >= max_uid_for_loop
9698 || INSN_LUID (JUMP_LABEL (p)) < INSN_LUID (loop->start)
9699 || INSN_LUID (JUMP_LABEL (p)) > INSN_LUID (loop->end))))
9702 if (!any_condjump_p (p))
9703 /* Something complicated. */
9706 /* If there are any more instructions in the loop, they
9707 might not be reached. */
9708 next_maybe_never = 1;
9710 else if (next_maybe_never)
9714 /* Find start of the extended basic block that enters the loop. */
9715 for (p = loop->start;
9716 PREV_INSN (p) && GET_CODE (p) != CODE_LABEL;
9723 /* Build table of mems that get set to constant values before the
9725 for (; p != loop->start; p = NEXT_INSN (p))
9726 cselib_process_insn (p);
9728 /* Actually move the MEMs. */
9729 for (i = 0; i < loop_info->mems_idx; ++i)
9731 regset_head load_copies;
9732 regset_head store_copies;
9735 rtx mem = loop_info->mems[i].mem;
9738 if (MEM_VOLATILE_P (mem)
9739 || loop_invariant_p (loop, XEXP (mem, 0)) != 1)
9740 /* There's no telling whether or not MEM is modified. */
9741 loop_info->mems[i].optimize = 0;
9743 /* Go through the MEMs written to in the loop to see if this
9744 one is aliased by one of them. */
9745 mem_list_entry = loop_info->store_mems;
9746 while (mem_list_entry)
9748 if (rtx_equal_p (mem, XEXP (mem_list_entry, 0)))
9750 else if (true_dependence (XEXP (mem_list_entry, 0), VOIDmode,
9753 /* MEM is indeed aliased by this store. */
9754 loop_info->mems[i].optimize = 0;
9757 mem_list_entry = XEXP (mem_list_entry, 1);
9760 if (flag_float_store && written
9761 && GET_MODE_CLASS (GET_MODE (mem)) == MODE_FLOAT)
9762 loop_info->mems[i].optimize = 0;
9764 /* If this MEM is written to, we must be sure that there
9765 are no reads from another MEM that aliases this one. */
9766 if (loop_info->mems[i].optimize && written)
9770 for (j = 0; j < loop_info->mems_idx; ++j)
9774 else if (true_dependence (mem,
9776 loop_info->mems[j].mem,
9779 /* It's not safe to hoist loop_info->mems[i] out of
9780 the loop because writes to it might not be
9781 seen by reads from loop_info->mems[j]. */
9782 loop_info->mems[i].optimize = 0;
9788 if (maybe_never && may_trap_p (mem))
9789 /* We can't access the MEM outside the loop; it might
9790 cause a trap that wouldn't have happened otherwise. */
9791 loop_info->mems[i].optimize = 0;
9793 if (!loop_info->mems[i].optimize)
9794 /* We thought we were going to lift this MEM out of the
9795 loop, but later discovered that we could not. */
9798 INIT_REG_SET (&load_copies);
9799 INIT_REG_SET (&store_copies);
9801 /* Allocate a pseudo for this MEM. We set REG_USERVAR_P in
9802 order to keep scan_loop from moving stores to this MEM
9803 out of the loop just because this REG is neither a
9804 user-variable nor used in the loop test. */
9805 reg = gen_reg_rtx (GET_MODE (mem));
9806 REG_USERVAR_P (reg) = 1;
9807 loop_info->mems[i].reg = reg;
9809 /* Now, replace all references to the MEM with the
9810 corresponding pseudos. */
9812 for (p = next_insn_in_loop (loop, loop->scan_start);
9814 p = next_insn_in_loop (loop, p))
9820 set = single_set (p);
9822 /* See if this copies the mem into a register that isn't
9823 modified afterwards. We'll try to do copy propagation
9824 a little further on. */
9826 /* @@@ This test is _way_ too conservative. */
9828 && GET_CODE (SET_DEST (set)) == REG
9829 && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER
9830 && REGNO (SET_DEST (set)) < last_max_reg
9831 && regs->array[REGNO (SET_DEST (set))].n_times_set == 1
9832 && rtx_equal_p (SET_SRC (set), mem))
9833 SET_REGNO_REG_SET (&load_copies, REGNO (SET_DEST (set)));
9835 /* See if this copies the mem from a register that isn't
9836 modified afterwards. We'll try to remove the
9837 redundant copy later on by doing a little register
9838 renaming and copy propagation. This will help
9839 to untangle things for the BIV detection code. */
9842 && GET_CODE (SET_SRC (set)) == REG
9843 && REGNO (SET_SRC (set)) >= FIRST_PSEUDO_REGISTER
9844 && REGNO (SET_SRC (set)) < last_max_reg
9845 && regs->array[REGNO (SET_SRC (set))].n_times_set == 1
9846 && rtx_equal_p (SET_DEST (set), mem))
9847 SET_REGNO_REG_SET (&store_copies, REGNO (SET_SRC (set)));
9849 /* If this is a call which uses / clobbers this memory
9850 location, we must not change the interface here. */
9851 if (GET_CODE (p) == CALL_INSN
9852 && reg_mentioned_p (loop_info->mems[i].mem,
9853 CALL_INSN_FUNCTION_USAGE (p)))
9856 loop_info->mems[i].optimize = 0;
9860 /* Replace the memory reference with the shadow register. */
9861 replace_loop_mems (p, loop_info->mems[i].mem,
9862 loop_info->mems[i].reg);
9865 if (GET_CODE (p) == CODE_LABEL
9866 || GET_CODE (p) == JUMP_INSN)
9870 if (! loop_info->mems[i].optimize)
9871 ; /* We found we couldn't do the replacement, so do nothing. */
9872 else if (! apply_change_group ())
9873 /* We couldn't replace all occurrences of the MEM. */
9874 loop_info->mems[i].optimize = 0;
9877 /* Load the memory immediately before LOOP->START, which is
9878 the NOTE_LOOP_BEG. */
9879 cselib_val *e = cselib_lookup (mem, VOIDmode, 0);
9883 struct elt_loc_list *const_equiv = 0;
9887 struct elt_loc_list *equiv;
9888 struct elt_loc_list *best_equiv = 0;
9889 for (equiv = e->locs; equiv; equiv = equiv->next)
9891 if (CONSTANT_P (equiv->loc))
9892 const_equiv = equiv;
9893 else if (GET_CODE (equiv->loc) == REG
9894 /* Extending hard register lifetimes causes crash
9895 on SRC targets. Doing so on non-SRC is
9896 probably also not good idea, since we most
9897 probably have pseudoregister equivalence as
9899 && REGNO (equiv->loc) >= FIRST_PSEUDO_REGISTER)
9902 /* Use the constant equivalence if that is cheap enough. */
9904 best_equiv = const_equiv;
9905 else if (const_equiv
9906 && (rtx_cost (const_equiv->loc, SET)
9907 <= rtx_cost (best_equiv->loc, SET)))
9909 best_equiv = const_equiv;
9913 /* If best_equiv is nonzero, we know that MEM is set to a
9914 constant or register before the loop. We will use this
9915 knowledge to initialize the shadow register with that
9916 constant or reg rather than by loading from MEM. */
9918 best = copy_rtx (best_equiv->loc);
9921 set = gen_move_insn (reg, best);
9922 set = loop_insn_hoist (loop, set);
9925 for (p = prev_ebb_head; p != loop->start; p = NEXT_INSN (p))
9926 if (REGNO_LAST_UID (REGNO (best)) == INSN_UID (p))
9928 REGNO_LAST_UID (REGNO (best)) = INSN_UID (set);
9934 set_unique_reg_note (set, REG_EQUAL, copy_rtx (const_equiv->loc));
9938 if (label == NULL_RTX)
9940 label = gen_label_rtx ();
9941 emit_label_after (label, loop->end);
9944 /* Store the memory immediately after END, which is
9945 the NOTE_LOOP_END. */
9946 set = gen_move_insn (copy_rtx (mem), reg);
9947 loop_insn_emit_after (loop, 0, label, set);
9950 if (loop_dump_stream)
9952 fprintf (loop_dump_stream, "Hoisted regno %d %s from ",
9953 REGNO (reg), (written ? "r/w" : "r/o"));
9954 print_rtl (loop_dump_stream, mem);
9955 fputc ('\n', loop_dump_stream);
9958 /* Attempt a bit of copy propagation. This helps untangle the
9959 data flow, and enables {basic,general}_induction_var to find
9961 EXECUTE_IF_SET_IN_REG_SET
9962 (&load_copies, FIRST_PSEUDO_REGISTER, j,
9964 try_copy_prop (loop, reg, j);
9966 CLEAR_REG_SET (&load_copies);
9968 EXECUTE_IF_SET_IN_REG_SET
9969 (&store_copies, FIRST_PSEUDO_REGISTER, j,
9971 try_swap_copy_prop (loop, reg, j);
9973 CLEAR_REG_SET (&store_copies);
9977 if (label != NULL_RTX && end_label != NULL_RTX)
9979 /* Now, we need to replace all references to the previous exit
9980 label with the new one. */
9985 for (p = loop->start; p != loop->end; p = NEXT_INSN (p))
9987 for_each_rtx (&p, replace_label, &rr);
9989 /* If this is a JUMP_INSN, then we also need to fix the JUMP_LABEL
9990 field. This is not handled by for_each_rtx because it doesn't
9991 handle unprinted ('0') fields. We need to update JUMP_LABEL
9992 because the immediately following unroll pass will use it.
9993 replace_label would not work anyways, because that only handles
9995 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p) == end_label)
9996 JUMP_LABEL (p) = label;
10003 /* For communication between note_reg_stored and its caller. */
10004 struct note_reg_stored_arg
10010 /* Called via note_stores, record in SET_SEEN whether X, which is written,
10011 is equal to ARG. */
10013 note_reg_stored (x, setter, arg)
10014 rtx x, setter ATTRIBUTE_UNUSED;
10017 struct note_reg_stored_arg *t = (struct note_reg_stored_arg *) arg;
10022 /* Try to replace every occurrence of pseudo REGNO with REPLACEMENT.
10023 There must be exactly one insn that sets this pseudo; it will be
10024 deleted if all replacements succeed and we can prove that the register
10025 is not used after the loop. */
10028 try_copy_prop (loop, replacement, regno)
10029 const struct loop *loop;
10031 unsigned int regno;
10033 /* This is the reg that we are copying from. */
10034 rtx reg_rtx = regno_reg_rtx[regno];
10037 /* These help keep track of whether we replaced all uses of the reg. */
10038 int replaced_last = 0;
10039 int store_is_first = 0;
10041 for (insn = next_insn_in_loop (loop, loop->scan_start);
10043 insn = next_insn_in_loop (loop, insn))
10047 /* Only substitute within one extended basic block from the initializing
10049 if (GET_CODE (insn) == CODE_LABEL && init_insn)
10052 if (! INSN_P (insn))
10055 /* Is this the initializing insn? */
10056 set = single_set (insn);
10058 && GET_CODE (SET_DEST (set)) == REG
10059 && REGNO (SET_DEST (set)) == regno)
10065 if (REGNO_FIRST_UID (regno) == INSN_UID (insn))
10066 store_is_first = 1;
10069 /* Only substitute after seeing the initializing insn. */
10070 if (init_insn && insn != init_insn)
10072 struct note_reg_stored_arg arg;
10074 replace_loop_regs (insn, reg_rtx, replacement);
10075 if (REGNO_LAST_UID (regno) == INSN_UID (insn))
10078 /* Stop replacing when REPLACEMENT is modified. */
10079 arg.reg = replacement;
10081 note_stores (PATTERN (insn), note_reg_stored, &arg);
10084 rtx note = find_reg_note (insn, REG_EQUAL, NULL);
10086 /* It is possible that we've turned previously valid REG_EQUAL to
10087 invalid, as we change the REGNO to REPLACEMENT and unlike REGNO,
10088 REPLACEMENT is modified, we get different meaning. */
10089 if (note && reg_mentioned_p (replacement, XEXP (note, 0)))
10090 remove_note (insn, note);
10097 if (apply_change_group ())
10099 if (loop_dump_stream)
10100 fprintf (loop_dump_stream, " Replaced reg %d", regno);
10101 if (store_is_first && replaced_last)
10106 /* Assume we're just deleting INIT_INSN. */
10108 /* Look for REG_RETVAL note. If we're deleting the end of
10109 the libcall sequence, the whole sequence can go. */
10110 retval_note = find_reg_note (init_insn, REG_RETVAL, NULL_RTX);
10111 /* If we found a REG_RETVAL note, find the first instruction
10112 in the sequence. */
10114 first = XEXP (retval_note, 0);
10116 /* Delete the instructions. */
10117 loop_delete_insns (first, init_insn);
10119 if (loop_dump_stream)
10120 fprintf (loop_dump_stream, ".\n");
10124 /* Replace all the instructions from FIRST up to and including LAST
10125 with NOTE_INSN_DELETED notes. */
10128 loop_delete_insns (first, last)
10134 if (loop_dump_stream)
10135 fprintf (loop_dump_stream, ", deleting init_insn (%d)",
10137 delete_insn (first);
10139 /* If this was the LAST instructions we're supposed to delete,
10144 first = NEXT_INSN (first);
10148 /* Try to replace occurrences of pseudo REGNO with REPLACEMENT within
10149 loop LOOP if the order of the sets of these registers can be
10150 swapped. There must be exactly one insn within the loop that sets
10151 this pseudo followed immediately by a move insn that sets
10152 REPLACEMENT with REGNO. */
10154 try_swap_copy_prop (loop, replacement, regno)
10155 const struct loop *loop;
10157 unsigned int regno;
10160 rtx set = NULL_RTX;
10161 unsigned int new_regno;
10163 new_regno = REGNO (replacement);
10165 for (insn = next_insn_in_loop (loop, loop->scan_start);
10167 insn = next_insn_in_loop (loop, insn))
10169 /* Search for the insn that copies REGNO to NEW_REGNO? */
10171 && (set = single_set (insn))
10172 && GET_CODE (SET_DEST (set)) == REG
10173 && REGNO (SET_DEST (set)) == new_regno
10174 && GET_CODE (SET_SRC (set)) == REG
10175 && REGNO (SET_SRC (set)) == regno)
10179 if (insn != NULL_RTX)
10184 /* Some DEF-USE info would come in handy here to make this
10185 function more general. For now, just check the previous insn
10186 which is the most likely candidate for setting REGNO. */
10188 prev_insn = PREV_INSN (insn);
10191 && (prev_set = single_set (prev_insn))
10192 && GET_CODE (SET_DEST (prev_set)) == REG
10193 && REGNO (SET_DEST (prev_set)) == regno)
10196 (set (reg regno) (expr))
10197 (set (reg new_regno) (reg regno))
10199 so try converting this to:
10200 (set (reg new_regno) (expr))
10201 (set (reg regno) (reg new_regno))
10203 The former construct is often generated when a global
10204 variable used for an induction variable is shadowed by a
10205 register (NEW_REGNO). The latter construct improves the
10206 chances of GIV replacement and BIV elimination. */
10208 validate_change (prev_insn, &SET_DEST (prev_set),
10210 validate_change (insn, &SET_DEST (set),
10212 validate_change (insn, &SET_SRC (set),
10215 if (apply_change_group ())
10217 if (loop_dump_stream)
10218 fprintf (loop_dump_stream,
10219 " Swapped set of reg %d at %d with reg %d at %d.\n",
10220 regno, INSN_UID (insn),
10221 new_regno, INSN_UID (prev_insn));
10223 /* Update first use of REGNO. */
10224 if (REGNO_FIRST_UID (regno) == INSN_UID (prev_insn))
10225 REGNO_FIRST_UID (regno) = INSN_UID (insn);
10227 /* Now perform copy propagation to hopefully
10228 remove all uses of REGNO within the loop. */
10229 try_copy_prop (loop, replacement, regno);
10235 /* Replace MEM with its associated pseudo register. This function is
10236 called from load_mems via for_each_rtx. DATA is actually a pointer
10237 to a structure describing the instruction currently being scanned
10238 and the MEM we are currently replacing. */
10241 replace_loop_mem (mem, data)
10245 loop_replace_args *args = (loop_replace_args *) data;
10251 switch (GET_CODE (m))
10257 /* We're not interested in the MEM associated with a
10258 CONST_DOUBLE, so there's no need to traverse into one. */
10262 /* This is not a MEM. */
10266 if (!rtx_equal_p (args->match, m))
10267 /* This is not the MEM we are currently replacing. */
10270 /* Actually replace the MEM. */
10271 validate_change (args->insn, mem, args->replacement, 1);
10277 replace_loop_mems (insn, mem, reg)
10282 loop_replace_args args;
10286 args.replacement = reg;
10288 for_each_rtx (&insn, replace_loop_mem, &args);
10291 /* Replace one register with another. Called through for_each_rtx; PX points
10292 to the rtx being scanned. DATA is actually a pointer to
10293 a structure of arguments. */
10296 replace_loop_reg (px, data)
10301 loop_replace_args *args = (loop_replace_args *) data;
10306 if (x == args->match)
10307 validate_change (args->insn, px, args->replacement, 1);
10313 replace_loop_regs (insn, reg, replacement)
10318 loop_replace_args args;
10322 args.replacement = replacement;
10324 for_each_rtx (&insn, replace_loop_reg, &args);
10327 /* Replace occurrences of the old exit label for the loop with the new
10328 one. DATA is an rtx_pair containing the old and new labels,
10332 replace_label (x, data)
10337 rtx old_label = ((rtx_pair *) data)->r1;
10338 rtx new_label = ((rtx_pair *) data)->r2;
10343 if (GET_CODE (l) != LABEL_REF)
10346 if (XEXP (l, 0) != old_label)
10349 XEXP (l, 0) = new_label;
10350 ++LABEL_NUSES (new_label);
10351 --LABEL_NUSES (old_label);
10356 /* Emit insn for PATTERN after WHERE_INSN in basic block WHERE_BB
10357 (ignored in the interim). */
10360 loop_insn_emit_after (loop, where_bb, where_insn, pattern)
10361 const struct loop *loop ATTRIBUTE_UNUSED;
10362 basic_block where_bb ATTRIBUTE_UNUSED;
10366 return emit_insn_after (pattern, where_insn);
10370 /* If WHERE_INSN is non-zero emit insn for PATTERN before WHERE_INSN
10371 in basic block WHERE_BB (ignored in the interim) within the loop
10372 otherwise hoist PATTERN into the loop pre-header. */
10375 loop_insn_emit_before (loop, where_bb, where_insn, pattern)
10376 const struct loop *loop;
10377 basic_block where_bb ATTRIBUTE_UNUSED;
10382 return loop_insn_hoist (loop, pattern);
10383 return emit_insn_before (pattern, where_insn);
10387 /* Emit call insn for PATTERN before WHERE_INSN in basic block
10388 WHERE_BB (ignored in the interim) within the loop. */
10391 loop_call_insn_emit_before (loop, where_bb, where_insn, pattern)
10392 const struct loop *loop ATTRIBUTE_UNUSED;
10393 basic_block where_bb ATTRIBUTE_UNUSED;
10397 return emit_call_insn_before (pattern, where_insn);
10401 /* Hoist insn for PATTERN into the loop pre-header. */
10404 loop_insn_hoist (loop, pattern)
10405 const struct loop *loop;
10408 return loop_insn_emit_before (loop, 0, loop->start, pattern);
10412 /* Hoist call insn for PATTERN into the loop pre-header. */
10415 loop_call_insn_hoist (loop, pattern)
10416 const struct loop *loop;
10419 return loop_call_insn_emit_before (loop, 0, loop->start, pattern);
10423 /* Sink insn for PATTERN after the loop end. */
10426 loop_insn_sink (loop, pattern)
10427 const struct loop *loop;
10430 return loop_insn_emit_before (loop, 0, loop->sink, pattern);
10433 /* bl->final_value can be eighter general_operand or PLUS of general_operand
10434 and constant. Emit sequence of intructions to load it into REG */
10436 gen_load_of_final_value (reg, final_value)
10437 rtx reg, final_value;
10441 final_value = force_operand (final_value, reg);
10442 if (final_value != reg)
10443 emit_move_insn (reg, final_value);
10444 seq = gen_sequence ();
10449 /* If the loop has multiple exits, emit insn for PATTERN before the
10450 loop to ensure that it will always be executed no matter how the
10451 loop exits. Otherwise, emit the insn for PATTERN after the loop,
10452 since this is slightly more efficient. */
10455 loop_insn_sink_or_swim (loop, pattern)
10456 const struct loop *loop;
10459 if (loop->exit_count)
10460 return loop_insn_hoist (loop, pattern);
10462 return loop_insn_sink (loop, pattern);
10466 loop_ivs_dump (loop, file, verbose)
10467 const struct loop *loop;
10471 struct iv_class *bl;
10474 if (! loop || ! file)
10477 for (bl = LOOP_IVS (loop)->list; bl; bl = bl->next)
10480 fprintf (file, "Loop %d: %d IV classes\n", loop->num, iv_num);
10482 for (bl = LOOP_IVS (loop)->list; bl; bl = bl->next)
10484 loop_iv_class_dump (bl, file, verbose);
10485 fputc ('\n', file);
10491 loop_iv_class_dump (bl, file, verbose)
10492 const struct iv_class *bl;
10494 int verbose ATTRIBUTE_UNUSED;
10496 struct induction *v;
10500 if (! bl || ! file)
10503 fprintf (file, "IV class for reg %d, benefit %d\n",
10504 bl->regno, bl->total_benefit);
10506 fprintf (file, " Init insn %d", INSN_UID (bl->init_insn));
10507 if (bl->initial_value)
10509 fprintf (file, ", init val: ");
10510 print_simple_rtl (file, bl->initial_value);
10512 if (bl->initial_test)
10514 fprintf (file, ", init test: ");
10515 print_simple_rtl (file, bl->initial_test);
10517 fputc ('\n', file);
10519 if (bl->final_value)
10521 fprintf (file, " Final val: ");
10522 print_simple_rtl (file, bl->final_value);
10523 fputc ('\n', file);
10526 if ((incr = biv_total_increment (bl)))
10528 fprintf (file, " Total increment: ");
10529 print_simple_rtl (file, incr);
10530 fputc ('\n', file);
10533 /* List the increments. */
10534 for (i = 0, v = bl->biv; v; v = v->next_iv, i++)
10536 fprintf (file, " Inc%d: insn %d, incr: ", i, INSN_UID (v->insn));
10537 print_simple_rtl (file, v->add_val);
10538 fputc ('\n', file);
10541 /* List the givs. */
10542 for (i = 0, v = bl->giv; v; v = v->next_iv, i++)
10544 fprintf (file, " Giv%d: insn %d, benefit %d, ",
10545 i, INSN_UID (v->insn), v->benefit);
10546 if (v->giv_type == DEST_ADDR)
10547 print_simple_rtl (file, v->mem);
10549 print_simple_rtl (file, single_set (v->insn));
10550 fputc ('\n', file);
10556 loop_biv_dump (v, file, verbose)
10557 const struct induction *v;
10566 REGNO (v->dest_reg), INSN_UID (v->insn));
10567 fprintf (file, " const ");
10568 print_simple_rtl (file, v->add_val);
10570 if (verbose && v->final_value)
10572 fputc ('\n', file);
10573 fprintf (file, " final ");
10574 print_simple_rtl (file, v->final_value);
10577 fputc ('\n', file);
10582 loop_giv_dump (v, file, verbose)
10583 const struct induction *v;
10590 if (v->giv_type == DEST_REG)
10591 fprintf (file, "Giv %d: insn %d",
10592 REGNO (v->dest_reg), INSN_UID (v->insn));
10594 fprintf (file, "Dest address: insn %d",
10595 INSN_UID (v->insn));
10597 fprintf (file, " src reg %d benefit %d",
10598 REGNO (v->src_reg), v->benefit);
10599 fprintf (file, " lifetime %d",
10602 if (v->replaceable)
10603 fprintf (file, " replaceable");
10605 if (v->no_const_addval)
10606 fprintf (file, " ncav");
10608 if (v->ext_dependent)
10610 switch (GET_CODE (v->ext_dependent))
10613 fprintf (file, " ext se");
10616 fprintf (file, " ext ze");
10619 fprintf (file, " ext tr");
10626 fputc ('\n', file);
10627 fprintf (file, " mult ");
10628 print_simple_rtl (file, v->mult_val);
10630 fputc ('\n', file);
10631 fprintf (file, " add ");
10632 print_simple_rtl (file, v->add_val);
10634 if (verbose && v->final_value)
10636 fputc ('\n', file);
10637 fprintf (file, " final ");
10638 print_simple_rtl (file, v->final_value);
10641 fputc ('\n', file);
10647 const struct loop *loop;
10649 loop_ivs_dump (loop, stderr, 1);
10654 debug_iv_class (bl)
10655 const struct iv_class *bl;
10657 loop_iv_class_dump (bl, stderr, 1);
10663 const struct induction *v;
10665 loop_biv_dump (v, stderr, 1);
10671 const struct induction *v;
10673 loop_giv_dump (v, stderr, 1);
10677 #define LOOP_BLOCK_NUM_1(INSN) \
10678 ((INSN) ? (BLOCK_FOR_INSN (INSN) ? BLOCK_NUM (INSN) : - 1) : -1)
10680 /* The notes do not have an assigned block, so look at the next insn. */
10681 #define LOOP_BLOCK_NUM(INSN) \
10682 ((INSN) ? (GET_CODE (INSN) == NOTE \
10683 ? LOOP_BLOCK_NUM_1 (next_nonnote_insn (INSN)) \
10684 : LOOP_BLOCK_NUM_1 (INSN)) \
10687 #define LOOP_INSN_UID(INSN) ((INSN) ? INSN_UID (INSN) : -1)
10690 loop_dump_aux (loop, file, verbose)
10691 const struct loop *loop;
10693 int verbose ATTRIBUTE_UNUSED;
10697 if (! loop || ! file)
10700 /* Print diagnostics to compare our concept of a loop with
10701 what the loop notes say. */
10702 if (! PREV_INSN (loop->first->head)
10703 || GET_CODE (PREV_INSN (loop->first->head)) != NOTE
10704 || NOTE_LINE_NUMBER (PREV_INSN (loop->first->head))
10705 != NOTE_INSN_LOOP_BEG)
10706 fprintf (file, ";; No NOTE_INSN_LOOP_BEG at %d\n",
10707 INSN_UID (PREV_INSN (loop->first->head)));
10708 if (! NEXT_INSN (loop->last->end)
10709 || GET_CODE (NEXT_INSN (loop->last->end)) != NOTE
10710 || NOTE_LINE_NUMBER (NEXT_INSN (loop->last->end))
10711 != NOTE_INSN_LOOP_END)
10712 fprintf (file, ";; No NOTE_INSN_LOOP_END at %d\n",
10713 INSN_UID (NEXT_INSN (loop->last->end)));
10718 ";; start %d (%d), cont dom %d (%d), cont %d (%d), vtop %d (%d), end %d (%d)\n",
10719 LOOP_BLOCK_NUM (loop->start),
10720 LOOP_INSN_UID (loop->start),
10721 LOOP_BLOCK_NUM (loop->cont),
10722 LOOP_INSN_UID (loop->cont),
10723 LOOP_BLOCK_NUM (loop->cont),
10724 LOOP_INSN_UID (loop->cont),
10725 LOOP_BLOCK_NUM (loop->vtop),
10726 LOOP_INSN_UID (loop->vtop),
10727 LOOP_BLOCK_NUM (loop->end),
10728 LOOP_INSN_UID (loop->end));
10729 fprintf (file, ";; top %d (%d), scan start %d (%d)\n",
10730 LOOP_BLOCK_NUM (loop->top),
10731 LOOP_INSN_UID (loop->top),
10732 LOOP_BLOCK_NUM (loop->scan_start),
10733 LOOP_INSN_UID (loop->scan_start));
10734 fprintf (file, ";; exit_count %d", loop->exit_count);
10735 if (loop->exit_count)
10737 fputs (", labels:", file);
10738 for (label = loop->exit_labels; label; label = LABEL_NEXTREF (label))
10740 fprintf (file, " %d ",
10741 LOOP_INSN_UID (XEXP (label, 0)));
10744 fputs ("\n", file);
10746 /* This can happen when a marked loop appears as two nested loops,
10747 say from while (a || b) {}. The inner loop won't match
10748 the loop markers but the outer one will. */
10749 if (LOOP_BLOCK_NUM (loop->cont) != loop->latch->sindex)
10750 fprintf (file, ";; NOTE_INSN_LOOP_CONT not in loop latch\n");
10754 /* Call this function from the debugger to dump LOOP. */
10758 const struct loop *loop;
10760 flow_loop_dump (loop, stderr, loop_dump_aux, 1);
10763 /* Call this function from the debugger to dump LOOPS. */
10766 debug_loops (loops)
10767 const struct loops *loops;
10769 flow_loops_dump (loops, stderr, loop_dump_aux, 1);