1 /* Perform various loop optimizations, including strength reduction.
2 Copyright (C) 1987, 1988, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
22 /* This is the loop optimization pass of the compiler.
23 It finds invariant computations within loops and moves them
24 to the beginning of the loop. Then it identifies basic and
25 general induction variables. Strength reduction is applied to the general
26 induction variables, and induction variable elimination is applied to
27 the basic induction variables.
29 It also finds cases where
30 a register is set within the loop by zero-extending a narrower value
31 and changes these to zero the entire register once before the loop
32 and merely copy the low part within the loop.
34 Most of the complexity is in heuristics to decide when it is worth
35 while to do these things. */
44 #include "hard-reg-set.h"
45 #include "basic-block.h"
46 #include "insn-config.h"
56 #include "insn-flags.h"
58 /* Not really meaningful values, but at least something. */
59 #ifndef SIMULTANEOUS_PREFETCHES
60 #define SIMULTANEOUS_PREFETCHES 3
62 #ifndef PREFETCH_BLOCK
63 #define PREFETCH_BLOCK 32
66 #define HAVE_prefetch 0
67 #define gen_prefetch(a,b,c) (abort(), NULL_RTX)
70 /* Give up the prefetch optimizations once we exceed a given threshhold.
71 It is unlikely that we would be able to optimize something in a loop
72 with so many detected prefetches. */
73 #define MAX_PREFETCHES 100
74 /* The number of prefetch blocks that are beneficial to fetch at once before
75 a loop with a known (and low) iteration count. */
76 #define PREFETCH_BLOCKS_BEFORE_LOOP_MAX 6
77 /* For very tiny loops it is not worthwhile to prefetch even before the loop,
78 since it is likely that the data are already in the cache. */
79 #define PREFETCH_BLOCKS_BEFORE_LOOP_MIN 2
80 /* The minimal number of prefetch blocks that a loop must consume to make
81 the emitting of prefetch instruction in the body of loop worthwhile. */
82 #define PREFETCH_BLOCKS_IN_LOOP_MIN 6
84 /* Parameterize some prefetch heuristics so they can be turned on and off
85 easily for performance testing on new architecures. These can be
86 defined in target-dependent files. */
88 /* Prefetch is worthwhile only when loads/stores are dense. */
89 #ifndef PREFETCH_ONLY_DENSE_MEM
90 #define PREFETCH_ONLY_DENSE_MEM 1
93 /* Define what we mean by "dense" loads and stores; This value divided by 256
94 is the minimum percentage of memory references that worth prefetching. */
95 #ifndef PREFETCH_DENSE_MEM
96 #define PREFETCH_DENSE_MEM 220
99 /* Do not prefetch for a loop whose iteration count is known to be low. */
100 #ifndef PREFETCH_NO_LOW_LOOPCNT
101 #define PREFETCH_NO_LOW_LOOPCNT 1
104 /* Define what we mean by a "low" iteration count. */
105 #ifndef PREFETCH_LOW_LOOPCNT
106 #define PREFETCH_LOW_LOOPCNT 32
109 /* Do not prefetch for a loop that contains a function call; such a loop is
110 probably not an internal loop. */
111 #ifndef PREFETCH_NO_CALL
112 #define PREFETCH_NO_CALL 1
115 /* Do not prefetch accesses with an extreme stride. */
116 #ifndef PREFETCH_NO_EXTREME_STRIDE
117 #define PREFETCH_NO_EXTREME_STRIDE 1
120 /* Define what we mean by an "extreme" stride. */
121 #ifndef PREFETCH_EXTREME_STRIDE
122 #define PREFETCH_EXTREME_STRIDE 4096
125 /* Do not handle reversed order prefetches (negative stride). */
126 #ifndef PREFETCH_NO_REVERSE_ORDER
127 #define PREFETCH_NO_REVERSE_ORDER 1
130 /* Prefetch even if the GIV is not always executed. */
131 #ifndef PREFETCH_NOT_ALWAYS
132 #define PREFETCH_NOT_ALWAYS 0
135 /* If the loop requires more prefetches than the target can process in
136 parallel then don't prefetch anything in that loop. */
137 #ifndef PREFETCH_LIMIT_TO_SIMULTANEOUS
138 #define PREFETCH_LIMIT_TO_SIMULTANEOUS 1
141 #define LOOP_REG_LIFETIME(LOOP, REGNO) \
142 ((REGNO_LAST_LUID (REGNO) - REGNO_FIRST_LUID (REGNO)))
144 #define LOOP_REG_GLOBAL_P(LOOP, REGNO) \
145 ((REGNO_LAST_LUID (REGNO) > INSN_LUID ((LOOP)->end) \
146 || REGNO_FIRST_LUID (REGNO) < INSN_LUID ((LOOP)->start)))
149 /* Vector mapping INSN_UIDs to luids.
150 The luids are like uids but increase monotonically always.
151 We use them to see whether a jump comes from outside a given loop. */
155 /* Indexed by INSN_UID, contains the ordinal giving the (innermost) loop
156 number the insn is contained in. */
158 struct loop **uid_loop;
160 /* 1 + largest uid of any insn. */
162 int max_uid_for_loop;
164 /* 1 + luid of last insn. */
168 /* Number of loops detected in current function. Used as index to the
171 static int max_loop_num;
173 /* Bound on pseudo register number before loop optimization.
174 A pseudo has valid regscan info if its number is < max_reg_before_loop. */
175 unsigned int max_reg_before_loop;
177 /* The value to pass to the next call of reg_scan_update. */
178 static int loop_max_reg;
180 #define obstack_chunk_alloc xmalloc
181 #define obstack_chunk_free free
183 /* During the analysis of a loop, a chain of `struct movable's
184 is made to record all the movable insns found.
185 Then the entire chain can be scanned to decide which to move. */
189 rtx insn; /* A movable insn */
190 rtx set_src; /* The expression this reg is set from. */
191 rtx set_dest; /* The destination of this SET. */
192 rtx dependencies; /* When INSN is libcall, this is an EXPR_LIST
193 of any registers used within the LIBCALL. */
194 int consec; /* Number of consecutive following insns
195 that must be moved with this one. */
196 unsigned int regno; /* The register it sets */
197 short lifetime; /* lifetime of that register;
198 may be adjusted when matching movables
199 that load the same value are found. */
200 short savings; /* Number of insns we can move for this reg,
201 including other movables that force this
202 or match this one. */
203 unsigned int cond : 1; /* 1 if only conditionally movable */
204 unsigned int force : 1; /* 1 means MUST move this insn */
205 unsigned int global : 1; /* 1 means reg is live outside this loop */
206 /* If PARTIAL is 1, GLOBAL means something different:
207 that the reg is live outside the range from where it is set
208 to the following label. */
209 unsigned int done : 1; /* 1 inhibits further processing of this */
211 unsigned int partial : 1; /* 1 means this reg is used for zero-extending.
212 In particular, moving it does not make it
214 unsigned int move_insn : 1; /* 1 means that we call emit_move_insn to
215 load SRC, rather than copying INSN. */
216 unsigned int move_insn_first:1;/* Same as above, if this is necessary for the
217 first insn of a consecutive sets group. */
218 unsigned int is_equiv : 1; /* 1 means a REG_EQUIV is present on INSN. */
219 enum machine_mode savemode; /* Nonzero means it is a mode for a low part
220 that we should avoid changing when clearing
221 the rest of the reg. */
222 struct movable *match; /* First entry for same value */
223 struct movable *forces; /* An insn that must be moved if this is */
224 struct movable *next;
228 FILE *loop_dump_stream;
230 /* Forward declarations. */
232 static void find_and_verify_loops PARAMS ((rtx, struct loops *));
233 static void mark_loop_jump PARAMS ((rtx, struct loop *));
234 static void prescan_loop PARAMS ((struct loop *));
235 static int reg_in_basic_block_p PARAMS ((rtx, rtx));
236 static int consec_sets_invariant_p PARAMS ((const struct loop *,
238 static int labels_in_range_p PARAMS ((rtx, int));
239 static void count_one_set PARAMS ((struct loop_regs *, rtx, rtx, rtx *));
240 static void note_addr_stored PARAMS ((rtx, rtx, void *));
241 static void note_set_pseudo_multiple_uses PARAMS ((rtx, rtx, void *));
242 static int loop_reg_used_before_p PARAMS ((const struct loop *, rtx, rtx));
243 static void scan_loop PARAMS ((struct loop*, int));
245 static void replace_call_address PARAMS ((rtx, rtx, rtx));
247 static rtx skip_consec_insns PARAMS ((rtx, int));
248 static int libcall_benefit PARAMS ((rtx));
249 static void ignore_some_movables PARAMS ((struct loop_movables *));
250 static void force_movables PARAMS ((struct loop_movables *));
251 static void combine_movables PARAMS ((struct loop_movables *,
252 struct loop_regs *));
253 static int num_unmoved_movables PARAMS ((const struct loop *));
254 static int regs_match_p PARAMS ((rtx, rtx, struct loop_movables *));
255 static int rtx_equal_for_loop_p PARAMS ((rtx, rtx, struct loop_movables *,
256 struct loop_regs *));
257 static void add_label_notes PARAMS ((rtx, rtx));
258 static void move_movables PARAMS ((struct loop *loop, struct loop_movables *,
260 static void loop_movables_add PARAMS((struct loop_movables *,
262 static void loop_movables_free PARAMS((struct loop_movables *));
263 static int count_nonfixed_reads PARAMS ((const struct loop *, rtx));
264 static void loop_bivs_find PARAMS((struct loop *));
265 static void loop_bivs_init_find PARAMS((struct loop *));
266 static void loop_bivs_check PARAMS((struct loop *));
267 static void loop_givs_find PARAMS((struct loop *));
268 static void loop_givs_check PARAMS((struct loop *));
269 static int loop_biv_eliminable_p PARAMS((struct loop *, struct iv_class *,
271 static int loop_giv_reduce_benefit PARAMS((struct loop *, struct iv_class *,
272 struct induction *, rtx));
273 static void loop_givs_dead_check PARAMS((struct loop *, struct iv_class *));
274 static void loop_givs_reduce PARAMS((struct loop *, struct iv_class *));
275 static void loop_givs_rescan PARAMS((struct loop *, struct iv_class *,
277 static void loop_ivs_free PARAMS((struct loop *));
278 static void strength_reduce PARAMS ((struct loop *, int));
279 static void find_single_use_in_loop PARAMS ((struct loop_regs *, rtx, rtx));
280 static int valid_initial_value_p PARAMS ((rtx, rtx, int, rtx));
281 static void find_mem_givs PARAMS ((const struct loop *, rtx, rtx, int, int));
282 static void record_biv PARAMS ((struct loop *, struct induction *,
283 rtx, rtx, rtx, rtx, rtx *,
285 static void check_final_value PARAMS ((const struct loop *,
286 struct induction *));
287 static void loop_ivs_dump PARAMS((const struct loop *, FILE *, int));
288 static void loop_iv_class_dump PARAMS((const struct iv_class *, FILE *, int));
289 static void loop_biv_dump PARAMS((const struct induction *, FILE *, int));
290 static void loop_giv_dump PARAMS((const struct induction *, FILE *, int));
291 static void record_giv PARAMS ((const struct loop *, struct induction *,
292 rtx, rtx, rtx, rtx, rtx, rtx, int,
293 enum g_types, int, int, rtx *));
294 static void update_giv_derive PARAMS ((const struct loop *, rtx));
295 static void check_ext_dependent_givs PARAMS ((struct iv_class *,
296 struct loop_info *));
297 static int basic_induction_var PARAMS ((const struct loop *, rtx,
298 enum machine_mode, rtx, rtx,
299 rtx *, rtx *, rtx **));
300 static rtx simplify_giv_expr PARAMS ((const struct loop *, rtx, rtx *, int *));
301 static int general_induction_var PARAMS ((const struct loop *loop, rtx, rtx *,
302 rtx *, rtx *, rtx *, int, int *,
304 static int consec_sets_giv PARAMS ((const struct loop *, int, rtx,
305 rtx, rtx, rtx *, rtx *, rtx *, rtx *));
306 static int check_dbra_loop PARAMS ((struct loop *, int));
307 static rtx express_from_1 PARAMS ((rtx, rtx, rtx));
308 static rtx combine_givs_p PARAMS ((struct induction *, struct induction *));
309 static int cmp_combine_givs_stats PARAMS ((const PTR, const PTR));
310 static void combine_givs PARAMS ((struct loop_regs *, struct iv_class *));
311 static int product_cheap_p PARAMS ((rtx, rtx));
312 static int maybe_eliminate_biv PARAMS ((const struct loop *, struct iv_class *,
314 static int maybe_eliminate_biv_1 PARAMS ((const struct loop *, rtx, rtx,
315 struct iv_class *, int,
317 static int last_use_this_basic_block PARAMS ((rtx, rtx));
318 static void record_initial PARAMS ((rtx, rtx, void *));
319 static void update_reg_last_use PARAMS ((rtx, rtx));
320 static rtx next_insn_in_loop PARAMS ((const struct loop *, rtx));
321 static void loop_regs_scan PARAMS ((const struct loop *, int));
322 static int count_insns_in_loop PARAMS ((const struct loop *));
323 static void load_mems PARAMS ((const struct loop *));
324 static int insert_loop_mem PARAMS ((rtx *, void *));
325 static int replace_loop_mem PARAMS ((rtx *, void *));
326 static void replace_loop_mems PARAMS ((rtx, rtx, rtx));
327 static int replace_loop_reg PARAMS ((rtx *, void *));
328 static void replace_loop_regs PARAMS ((rtx insn, rtx, rtx));
329 static void note_reg_stored PARAMS ((rtx, rtx, void *));
330 static void try_copy_prop PARAMS ((const struct loop *, rtx, unsigned int));
331 static void try_swap_copy_prop PARAMS ((const struct loop *, rtx,
333 static int replace_label PARAMS ((rtx *, void *));
334 static rtx check_insn_for_givs PARAMS((struct loop *, rtx, int, int));
335 static rtx check_insn_for_bivs PARAMS((struct loop *, rtx, int, int));
336 static rtx gen_add_mult PARAMS ((rtx, rtx, rtx, rtx));
337 static void loop_regs_update PARAMS ((const struct loop *, rtx));
338 static int iv_add_mult_cost PARAMS ((rtx, rtx, rtx, rtx));
340 static rtx loop_insn_emit_after PARAMS((const struct loop *, basic_block,
342 static rtx loop_call_insn_emit_before PARAMS((const struct loop *,
343 basic_block, rtx, rtx));
344 static rtx loop_call_insn_hoist PARAMS((const struct loop *, rtx));
345 static rtx loop_insn_sink_or_swim PARAMS((const struct loop *, rtx));
347 static void loop_dump_aux PARAMS ((const struct loop *, FILE *, int));
348 static void loop_delete_insns PARAMS ((rtx, rtx));
349 static HOST_WIDE_INT remove_constant_addition PARAMS ((rtx *));
350 void debug_ivs PARAMS ((const struct loop *));
351 void debug_iv_class PARAMS ((const struct iv_class *));
352 void debug_biv PARAMS ((const struct induction *));
353 void debug_giv PARAMS ((const struct induction *));
354 void debug_loop PARAMS ((const struct loop *));
355 void debug_loops PARAMS ((const struct loops *));
357 typedef struct rtx_pair
363 typedef struct loop_replace_args
370 /* Nonzero iff INSN is between START and END, inclusive. */
371 #define INSN_IN_RANGE_P(INSN, START, END) \
372 (INSN_UID (INSN) < max_uid_for_loop \
373 && INSN_LUID (INSN) >= INSN_LUID (START) \
374 && INSN_LUID (INSN) <= INSN_LUID (END))
376 /* Indirect_jump_in_function is computed once per function. */
377 static int indirect_jump_in_function;
378 static int indirect_jump_in_function_p PARAMS ((rtx));
380 static int compute_luids PARAMS ((rtx, rtx, int));
382 static int biv_elimination_giv_has_0_offset PARAMS ((struct induction *,
386 /* Benefit penalty, if a giv is not replaceable, i.e. must emit an insn to
387 copy the value of the strength reduced giv to its original register. */
388 static int copy_cost;
390 /* Cost of using a register, to normalize the benefits of a giv. */
391 static int reg_address_cost;
396 rtx reg = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 1);
398 reg_address_cost = address_cost (reg, SImode);
400 copy_cost = COSTS_N_INSNS (1);
403 /* Compute the mapping from uids to luids.
404 LUIDs are numbers assigned to insns, like uids,
405 except that luids increase monotonically through the code.
406 Start at insn START and stop just before END. Assign LUIDs
407 starting with PREV_LUID + 1. Return the last assigned LUID + 1. */
409 compute_luids (start, end, prev_luid)
416 for (insn = start, i = prev_luid; insn != end; insn = NEXT_INSN (insn))
418 if (INSN_UID (insn) >= max_uid_for_loop)
420 /* Don't assign luids to line-number NOTEs, so that the distance in
421 luids between two insns is not affected by -g. */
422 if (GET_CODE (insn) != NOTE
423 || NOTE_LINE_NUMBER (insn) <= 0)
424 uid_luid[INSN_UID (insn)] = ++i;
426 /* Give a line number note the same luid as preceding insn. */
427 uid_luid[INSN_UID (insn)] = i;
432 /* Entry point of this file. Perform loop optimization
433 on the current function. F is the first insn of the function
434 and DUMPFILE is a stream for output of a trace of actions taken
435 (or 0 if none should be output). */
438 loop_optimize (f, dumpfile, flags)
439 /* f is the first instruction of a chain of insns for one function */
446 struct loops loops_data;
447 struct loops *loops = &loops_data;
448 struct loop_info *loops_info;
450 loop_dump_stream = dumpfile;
452 init_recog_no_volatile ();
454 max_reg_before_loop = max_reg_num ();
455 loop_max_reg = max_reg_before_loop;
459 /* Count the number of loops. */
462 for (insn = f; insn; insn = NEXT_INSN (insn))
464 if (GET_CODE (insn) == NOTE
465 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
469 /* Don't waste time if no loops. */
470 if (max_loop_num == 0)
473 loops->num = max_loop_num;
475 /* Get size to use for tables indexed by uids.
476 Leave some space for labels allocated by find_and_verify_loops. */
477 max_uid_for_loop = get_max_uid () + 1 + max_loop_num * 32;
479 uid_luid = (int *) xcalloc (max_uid_for_loop, sizeof (int));
480 uid_loop = (struct loop **) xcalloc (max_uid_for_loop,
481 sizeof (struct loop *));
483 /* Allocate storage for array of loops. */
484 loops->array = (struct loop *)
485 xcalloc (loops->num, sizeof (struct loop));
487 /* Find and process each loop.
488 First, find them, and record them in order of their beginnings. */
489 find_and_verify_loops (f, loops);
491 /* Allocate and initialize auxiliary loop information. */
492 loops_info = xcalloc (loops->num, sizeof (struct loop_info));
493 for (i = 0; i < loops->num; i++)
494 loops->array[i].aux = loops_info + i;
496 /* Now find all register lifetimes. This must be done after
497 find_and_verify_loops, because it might reorder the insns in the
499 reg_scan (f, max_reg_before_loop, 1);
501 /* This must occur after reg_scan so that registers created by gcse
502 will have entries in the register tables.
504 We could have added a call to reg_scan after gcse_main in toplev.c,
505 but moving this call to init_alias_analysis is more efficient. */
506 init_alias_analysis ();
508 /* See if we went too far. Note that get_max_uid already returns
509 one more that the maximum uid of all insn. */
510 if (get_max_uid () > max_uid_for_loop)
512 /* Now reset it to the actual size we need. See above. */
513 max_uid_for_loop = get_max_uid ();
515 /* find_and_verify_loops has already called compute_luids, but it
516 might have rearranged code afterwards, so we need to recompute
518 max_luid = compute_luids (f, NULL_RTX, 0);
520 /* Don't leave gaps in uid_luid for insns that have been
521 deleted. It is possible that the first or last insn
522 using some register has been deleted by cross-jumping.
523 Make sure that uid_luid for that former insn's uid
524 points to the general area where that insn used to be. */
525 for (i = 0; i < max_uid_for_loop; i++)
527 uid_luid[0] = uid_luid[i];
528 if (uid_luid[0] != 0)
531 for (i = 0; i < max_uid_for_loop; i++)
532 if (uid_luid[i] == 0)
533 uid_luid[i] = uid_luid[i - 1];
535 /* Determine if the function has indirect jump. On some systems
536 this prevents low overhead loop instructions from being used. */
537 indirect_jump_in_function = indirect_jump_in_function_p (f);
539 /* Now scan the loops, last ones first, since this means inner ones are done
540 before outer ones. */
541 for (i = max_loop_num - 1; i >= 0; i--)
543 struct loop *loop = &loops->array[i];
545 if (! loop->invalid && loop->end)
546 scan_loop (loop, flags);
549 /* If there were lexical blocks inside the loop, they have been
550 replicated. We will now have more than one NOTE_INSN_BLOCK_BEG
551 and NOTE_INSN_BLOCK_END for each such block. We must duplicate
552 the BLOCKs as well. */
553 if (write_symbols != NO_DEBUG)
556 end_alias_analysis ();
565 /* Returns the next insn, in execution order, after INSN. START and
566 END are the NOTE_INSN_LOOP_BEG and NOTE_INSN_LOOP_END for the loop,
567 respectively. LOOP->TOP, if non-NULL, is the top of the loop in the
568 insn-stream; it is used with loops that are entered near the
572 next_insn_in_loop (loop, insn)
573 const struct loop *loop;
576 insn = NEXT_INSN (insn);
578 if (insn == loop->end)
581 /* Go to the top of the loop, and continue there. */
588 if (insn == loop->scan_start)
595 /* Optimize one loop described by LOOP. */
597 /* ??? Could also move memory writes out of loops if the destination address
598 is invariant, the source is invariant, the memory write is not volatile,
599 and if we can prove that no read inside the loop can read this address
600 before the write occurs. If there is a read of this address after the
601 write, then we can also mark the memory read as invariant. */
604 scan_loop (loop, flags)
608 struct loop_info *loop_info = LOOP_INFO (loop);
609 struct loop_regs *regs = LOOP_REGS (loop);
611 rtx loop_start = loop->start;
612 rtx loop_end = loop->end;
614 /* 1 if we are scanning insns that could be executed zero times. */
616 /* 1 if we are scanning insns that might never be executed
617 due to a subroutine call which might exit before they are reached. */
619 /* Jump insn that enters the loop, or 0 if control drops in. */
620 rtx loop_entry_jump = 0;
621 /* Number of insns in the loop. */
624 rtx temp, update_start, update_end;
625 /* The SET from an insn, if it is the only SET in the insn. */
627 /* Chain describing insns movable in current loop. */
628 struct loop_movables *movables = LOOP_MOVABLES (loop);
629 /* Ratio of extra register life span we can justify
630 for saving an instruction. More if loop doesn't call subroutines
631 since in that case saving an insn makes more difference
632 and more registers are available. */
634 /* Nonzero if we are scanning instructions in a sub-loop. */
642 /* Determine whether this loop starts with a jump down to a test at
643 the end. This will occur for a small number of loops with a test
644 that is too complex to duplicate in front of the loop.
646 We search for the first insn or label in the loop, skipping NOTEs.
647 However, we must be careful not to skip past a NOTE_INSN_LOOP_BEG
648 (because we might have a loop executed only once that contains a
649 loop which starts with a jump to its exit test) or a NOTE_INSN_LOOP_END
650 (in case we have a degenerate loop).
652 Note that if we mistakenly think that a loop is entered at the top
653 when, in fact, it is entered at the exit test, the only effect will be
654 slightly poorer optimization. Making the opposite error can generate
655 incorrect code. Since very few loops now start with a jump to the
656 exit test, the code here to detect that case is very conservative. */
658 for (p = NEXT_INSN (loop_start);
660 && GET_CODE (p) != CODE_LABEL && ! INSN_P (p)
661 && (GET_CODE (p) != NOTE
662 || (NOTE_LINE_NUMBER (p) != NOTE_INSN_LOOP_BEG
663 && NOTE_LINE_NUMBER (p) != NOTE_INSN_LOOP_END));
667 loop->scan_start = p;
669 /* If loop end is the end of the current function, then emit a
670 NOTE_INSN_DELETED after loop_end and set loop->sink to the dummy
671 note insn. This is the position we use when sinking insns out of
673 if (NEXT_INSN (loop->end) != 0)
674 loop->sink = NEXT_INSN (loop->end);
676 loop->sink = emit_note_after (NOTE_INSN_DELETED, loop->end);
678 /* Set up variables describing this loop. */
680 threshold = (loop_info->has_call ? 1 : 2) * (1 + n_non_fixed_regs);
682 /* If loop has a jump before the first label,
683 the true entry is the target of that jump.
684 Start scan from there.
685 But record in LOOP->TOP the place where the end-test jumps
686 back to so we can scan that after the end of the loop. */
687 if (GET_CODE (p) == JUMP_INSN)
691 /* Loop entry must be unconditional jump (and not a RETURN) */
692 if (any_uncondjump_p (p)
693 && JUMP_LABEL (p) != 0
694 /* Check to see whether the jump actually
695 jumps out of the loop (meaning it's no loop).
696 This case can happen for things like
697 do {..} while (0). If this label was generated previously
698 by loop, we can't tell anything about it and have to reject
700 && INSN_IN_RANGE_P (JUMP_LABEL (p), loop_start, loop_end))
702 loop->top = next_label (loop->scan_start);
703 loop->scan_start = JUMP_LABEL (p);
707 /* If LOOP->SCAN_START was an insn created by loop, we don't know its luid
708 as required by loop_reg_used_before_p. So skip such loops. (This
709 test may never be true, but it's best to play it safe.)
711 Also, skip loops where we do not start scanning at a label. This
712 test also rejects loops starting with a JUMP_INSN that failed the
715 if (INSN_UID (loop->scan_start) >= max_uid_for_loop
716 || GET_CODE (loop->scan_start) != CODE_LABEL)
718 if (loop_dump_stream)
719 fprintf (loop_dump_stream, "\nLoop from %d to %d is phony.\n\n",
720 INSN_UID (loop_start), INSN_UID (loop_end));
724 /* Allocate extra space for REGs that might be created by load_mems.
725 We allocate a little extra slop as well, in the hopes that we
726 won't have to reallocate the regs array. */
727 loop_regs_scan (loop, loop_info->mems_idx + 16);
728 insn_count = count_insns_in_loop (loop);
730 if (loop_dump_stream)
732 fprintf (loop_dump_stream, "\nLoop from %d to %d: %d real insns.\n",
733 INSN_UID (loop_start), INSN_UID (loop_end), insn_count);
735 fprintf (loop_dump_stream, "Continue at insn %d.\n",
736 INSN_UID (loop->cont));
739 /* Scan through the loop finding insns that are safe to move.
740 Set REGS->ARRAY[I].SET_IN_LOOP negative for the reg I being set, so that
741 this reg will be considered invariant for subsequent insns.
742 We consider whether subsequent insns use the reg
743 in deciding whether it is worth actually moving.
745 MAYBE_NEVER is nonzero if we have passed a conditional jump insn
746 and therefore it is possible that the insns we are scanning
747 would never be executed. At such times, we must make sure
748 that it is safe to execute the insn once instead of zero times.
749 When MAYBE_NEVER is 0, all insns will be executed at least once
750 so that is not a problem. */
752 for (p = next_insn_in_loop (loop, loop->scan_start);
754 p = next_insn_in_loop (loop, p))
756 if (GET_CODE (p) == INSN
757 && (set = single_set (p))
758 && GET_CODE (SET_DEST (set)) == REG
759 && ! regs->array[REGNO (SET_DEST (set))].may_not_optimize)
764 rtx src = SET_SRC (set);
765 rtx dependencies = 0;
767 /* Figure out what to use as a source of this insn. If a REG_EQUIV
768 note is given or if a REG_EQUAL note with a constant operand is
769 specified, use it as the source and mark that we should move
770 this insn by calling emit_move_insn rather that duplicating the
773 Otherwise, only use the REG_EQUAL contents if a REG_RETVAL note
775 temp = find_reg_note (p, REG_EQUIV, NULL_RTX);
777 src = XEXP (temp, 0), move_insn = 1;
780 temp = find_reg_note (p, REG_EQUAL, NULL_RTX);
781 if (temp && CONSTANT_P (XEXP (temp, 0)))
782 src = XEXP (temp, 0), move_insn = 1;
783 if (temp && find_reg_note (p, REG_RETVAL, NULL_RTX))
785 src = XEXP (temp, 0);
786 /* A libcall block can use regs that don't appear in
787 the equivalent expression. To move the libcall,
788 we must move those regs too. */
789 dependencies = libcall_other_reg (p, src);
793 /* For parallels, add any possible uses to the depencies, as we can't move
794 the insn without resolving them first. */
795 if (GET_CODE (PATTERN (p)) == PARALLEL)
797 for (i = 0; i < XVECLEN (PATTERN (p), 0); i++)
799 rtx x = XVECEXP (PATTERN (p), 0, i);
800 if (GET_CODE (x) == USE)
801 dependencies = gen_rtx_EXPR_LIST (VOIDmode, XEXP (x, 0), dependencies);
805 /* Don't try to optimize a register that was made
806 by loop-optimization for an inner loop.
807 We don't know its life-span, so we can't compute the benefit. */
808 if (REGNO (SET_DEST (set)) >= max_reg_before_loop)
810 else if (/* The register is used in basic blocks other
811 than the one where it is set (meaning that
812 something after this point in the loop might
813 depend on its value before the set). */
814 ! reg_in_basic_block_p (p, SET_DEST (set))
815 /* And the set is not guaranteed to be executed once
816 the loop starts, or the value before the set is
817 needed before the set occurs...
819 ??? Note we have quadratic behaviour here, mitigated
820 by the fact that the previous test will often fail for
821 large loops. Rather than re-scanning the entire loop
822 each time for register usage, we should build tables
823 of the register usage and use them here instead. */
825 || loop_reg_used_before_p (loop, set, p)))
826 /* It is unsafe to move the set.
828 This code used to consider it OK to move a set of a variable
829 which was not created by the user and not used in an exit test.
830 That behavior is incorrect and was removed. */
832 else if ((tem = loop_invariant_p (loop, src))
833 && (dependencies == 0
834 || (tem2 = loop_invariant_p (loop, dependencies)) != 0)
835 && (regs->array[REGNO (SET_DEST (set))].set_in_loop == 1
837 = consec_sets_invariant_p
838 (loop, SET_DEST (set),
839 regs->array[REGNO (SET_DEST (set))].set_in_loop,
841 /* If the insn can cause a trap (such as divide by zero),
842 can't move it unless it's guaranteed to be executed
843 once loop is entered. Even a function call might
844 prevent the trap insn from being reached
845 (since it might exit!) */
846 && ! ((maybe_never || call_passed)
847 && may_trap_p (src)))
850 int regno = REGNO (SET_DEST (set));
852 /* A potential lossage is where we have a case where two insns
853 can be combined as long as they are both in the loop, but
854 we move one of them outside the loop. For large loops,
855 this can lose. The most common case of this is the address
856 of a function being called.
858 Therefore, if this register is marked as being used exactly
859 once if we are in a loop with calls (a "large loop"), see if
860 we can replace the usage of this register with the source
861 of this SET. If we can, delete this insn.
863 Don't do this if P has a REG_RETVAL note or if we have
864 SMALL_REGISTER_CLASSES and SET_SRC is a hard register. */
866 if (loop_info->has_call
867 && regs->array[regno].single_usage != 0
868 && regs->array[regno].single_usage != const0_rtx
869 && REGNO_FIRST_UID (regno) == INSN_UID (p)
870 && (REGNO_LAST_UID (regno)
871 == INSN_UID (regs->array[regno].single_usage))
872 && regs->array[regno].set_in_loop == 1
873 && GET_CODE (SET_SRC (set)) != ASM_OPERANDS
874 && ! side_effects_p (SET_SRC (set))
875 && ! find_reg_note (p, REG_RETVAL, NULL_RTX)
876 && (! SMALL_REGISTER_CLASSES
877 || (! (GET_CODE (SET_SRC (set)) == REG
878 && REGNO (SET_SRC (set)) < FIRST_PSEUDO_REGISTER)))
879 /* This test is not redundant; SET_SRC (set) might be
880 a call-clobbered register and the life of REGNO
881 might span a call. */
882 && ! modified_between_p (SET_SRC (set), p,
883 regs->array[regno].single_usage)
884 && no_labels_between_p (p, regs->array[regno].single_usage)
885 && validate_replace_rtx (SET_DEST (set), SET_SRC (set),
886 regs->array[regno].single_usage))
888 /* Replace any usage in a REG_EQUAL note. Must copy the
889 new source, so that we don't get rtx sharing between the
890 SET_SOURCE and REG_NOTES of insn p. */
891 REG_NOTES (regs->array[regno].single_usage)
892 = replace_rtx (REG_NOTES (regs->array[regno].single_usage),
893 SET_DEST (set), copy_rtx (SET_SRC (set)));
896 regs->array[regno].set_in_loop = 0;
900 m = (struct movable *) xmalloc (sizeof (struct movable));
904 m->dependencies = dependencies;
905 m->set_dest = SET_DEST (set);
907 m->consec = regs->array[REGNO (SET_DEST (set))].set_in_loop - 1;
911 m->move_insn = move_insn;
912 m->move_insn_first = 0;
913 m->is_equiv = (find_reg_note (p, REG_EQUIV, NULL_RTX) != 0);
914 m->savemode = VOIDmode;
916 /* Set M->cond if either loop_invariant_p
917 or consec_sets_invariant_p returned 2
918 (only conditionally invariant). */
919 m->cond = ((tem | tem1 | tem2) > 1);
920 m->global = LOOP_REG_GLOBAL_P (loop, regno);
922 m->lifetime = LOOP_REG_LIFETIME (loop, regno);
923 m->savings = regs->array[regno].n_times_set;
924 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
925 m->savings += libcall_benefit (p);
926 regs->array[regno].set_in_loop = move_insn ? -2 : -1;
927 /* Add M to the end of the chain MOVABLES. */
928 loop_movables_add (movables, m);
932 /* It is possible for the first instruction to have a
933 REG_EQUAL note but a non-invariant SET_SRC, so we must
934 remember the status of the first instruction in case
935 the last instruction doesn't have a REG_EQUAL note. */
936 m->move_insn_first = m->move_insn;
938 /* Skip this insn, not checking REG_LIBCALL notes. */
939 p = next_nonnote_insn (p);
940 /* Skip the consecutive insns, if there are any. */
941 p = skip_consec_insns (p, m->consec);
942 /* Back up to the last insn of the consecutive group. */
943 p = prev_nonnote_insn (p);
945 /* We must now reset m->move_insn, m->is_equiv, and possibly
946 m->set_src to correspond to the effects of all the
948 temp = find_reg_note (p, REG_EQUIV, NULL_RTX);
950 m->set_src = XEXP (temp, 0), m->move_insn = 1;
953 temp = find_reg_note (p, REG_EQUAL, NULL_RTX);
954 if (temp && CONSTANT_P (XEXP (temp, 0)))
955 m->set_src = XEXP (temp, 0), m->move_insn = 1;
960 m->is_equiv = (find_reg_note (p, REG_EQUIV, NULL_RTX) != 0);
963 /* If this register is always set within a STRICT_LOW_PART
964 or set to zero, then its high bytes are constant.
965 So clear them outside the loop and within the loop
966 just load the low bytes.
967 We must check that the machine has an instruction to do so.
968 Also, if the value loaded into the register
969 depends on the same register, this cannot be done. */
970 else if (SET_SRC (set) == const0_rtx
971 && GET_CODE (NEXT_INSN (p)) == INSN
972 && (set1 = single_set (NEXT_INSN (p)))
973 && GET_CODE (set1) == SET
974 && (GET_CODE (SET_DEST (set1)) == STRICT_LOW_PART)
975 && (GET_CODE (XEXP (SET_DEST (set1), 0)) == SUBREG)
976 && (SUBREG_REG (XEXP (SET_DEST (set1), 0))
978 && !reg_mentioned_p (SET_DEST (set), SET_SRC (set1)))
980 int regno = REGNO (SET_DEST (set));
981 if (regs->array[regno].set_in_loop == 2)
984 m = (struct movable *) xmalloc (sizeof (struct movable));
987 m->set_dest = SET_DEST (set);
994 m->move_insn_first = 0;
996 /* If the insn may not be executed on some cycles,
997 we can't clear the whole reg; clear just high part.
998 Not even if the reg is used only within this loop.
1005 Clearing x before the inner loop could clobber a value
1006 being saved from the last time around the outer loop.
1007 However, if the reg is not used outside this loop
1008 and all uses of the register are in the same
1009 basic block as the store, there is no problem.
1011 If this insn was made by loop, we don't know its
1012 INSN_LUID and hence must make a conservative
1014 m->global = (INSN_UID (p) >= max_uid_for_loop
1015 || LOOP_REG_GLOBAL_P (loop, regno)
1016 || (labels_in_range_p
1017 (p, REGNO_FIRST_LUID (regno))));
1018 if (maybe_never && m->global)
1019 m->savemode = GET_MODE (SET_SRC (set1));
1021 m->savemode = VOIDmode;
1025 m->lifetime = LOOP_REG_LIFETIME (loop, regno);
1027 regs->array[regno].set_in_loop = -1;
1028 /* Add M to the end of the chain MOVABLES. */
1029 loop_movables_add (movables, m);
1033 /* Past a call insn, we get to insns which might not be executed
1034 because the call might exit. This matters for insns that trap.
1035 Constant and pure call insns always return, so they don't count. */
1036 else if (GET_CODE (p) == CALL_INSN && ! CONST_OR_PURE_CALL_P (p))
1038 /* Past a label or a jump, we get to insns for which we
1039 can't count on whether or how many times they will be
1040 executed during each iteration. Therefore, we can
1041 only move out sets of trivial variables
1042 (those not used after the loop). */
1043 /* Similar code appears twice in strength_reduce. */
1044 else if ((GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN)
1045 /* If we enter the loop in the middle, and scan around to the
1046 beginning, don't set maybe_never for that. This must be an
1047 unconditional jump, otherwise the code at the top of the
1048 loop might never be executed. Unconditional jumps are
1049 followed by a barrier then the loop_end. */
1050 && ! (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p) == loop->top
1051 && NEXT_INSN (NEXT_INSN (p)) == loop_end
1052 && any_uncondjump_p (p)))
1054 else if (GET_CODE (p) == NOTE)
1056 /* At the virtual top of a converted loop, insns are again known to
1057 be executed: logically, the loop begins here even though the exit
1058 code has been duplicated. */
1059 if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP && loop_depth == 0)
1060 maybe_never = call_passed = 0;
1061 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
1063 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
1068 /* If one movable subsumes another, ignore that other. */
1070 ignore_some_movables (movables);
1072 /* For each movable insn, see if the reg that it loads
1073 leads when it dies right into another conditionally movable insn.
1074 If so, record that the second insn "forces" the first one,
1075 since the second can be moved only if the first is. */
1077 force_movables (movables);
1079 /* See if there are multiple movable insns that load the same value.
1080 If there are, make all but the first point at the first one
1081 through the `match' field, and add the priorities of them
1082 all together as the priority of the first. */
1084 combine_movables (movables, regs);
1086 /* Now consider each movable insn to decide whether it is worth moving.
1087 Store 0 in regs->array[I].set_in_loop for each reg I that is moved.
1089 Generally this increases code size, so do not move moveables when
1090 optimizing for code size. */
1092 if (! optimize_size)
1093 move_movables (loop, movables, threshold, insn_count);
1095 /* Now candidates that still are negative are those not moved.
1096 Change regs->array[I].set_in_loop to indicate that those are not actually
1098 for (i = 0; i < regs->num; i++)
1099 if (regs->array[i].set_in_loop < 0)
1100 regs->array[i].set_in_loop = regs->array[i].n_times_set;
1102 /* Now that we've moved some things out of the loop, we might be able to
1103 hoist even more memory references. */
1106 /* Recalculate regs->array if load_mems has created new registers. */
1107 if (max_reg_num () > regs->num)
1108 loop_regs_scan (loop, 0);
1110 for (update_start = loop_start;
1111 PREV_INSN (update_start)
1112 && GET_CODE (PREV_INSN (update_start)) != CODE_LABEL;
1113 update_start = PREV_INSN (update_start))
1115 update_end = NEXT_INSN (loop_end);
1117 reg_scan_update (update_start, update_end, loop_max_reg);
1118 loop_max_reg = max_reg_num ();
1120 if (flag_strength_reduce)
1122 if (update_end && GET_CODE (update_end) == CODE_LABEL)
1123 /* Ensure our label doesn't go away. */
1124 LABEL_NUSES (update_end)++;
1126 strength_reduce (loop, flags);
1128 reg_scan_update (update_start, update_end, loop_max_reg);
1129 loop_max_reg = max_reg_num ();
1131 if (update_end && GET_CODE (update_end) == CODE_LABEL
1132 && --LABEL_NUSES (update_end) == 0)
1133 delete_related_insns (update_end);
1137 /* The movable information is required for strength reduction. */
1138 loop_movables_free (movables);
1145 /* Add elements to *OUTPUT to record all the pseudo-regs
1146 mentioned in IN_THIS but not mentioned in NOT_IN_THIS. */
1149 record_excess_regs (in_this, not_in_this, output)
1150 rtx in_this, not_in_this;
1157 code = GET_CODE (in_this);
1171 if (REGNO (in_this) >= FIRST_PSEUDO_REGISTER
1172 && ! reg_mentioned_p (in_this, not_in_this))
1173 *output = gen_rtx_EXPR_LIST (VOIDmode, in_this, *output);
1180 fmt = GET_RTX_FORMAT (code);
1181 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1188 for (j = 0; j < XVECLEN (in_this, i); j++)
1189 record_excess_regs (XVECEXP (in_this, i, j), not_in_this, output);
1193 record_excess_regs (XEXP (in_this, i), not_in_this, output);
1199 /* Check what regs are referred to in the libcall block ending with INSN,
1200 aside from those mentioned in the equivalent value.
1201 If there are none, return 0.
1202 If there are one or more, return an EXPR_LIST containing all of them. */
1205 libcall_other_reg (insn, equiv)
1208 rtx note = find_reg_note (insn, REG_RETVAL, NULL_RTX);
1209 rtx p = XEXP (note, 0);
1212 /* First, find all the regs used in the libcall block
1213 that are not mentioned as inputs to the result. */
1217 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
1218 || GET_CODE (p) == CALL_INSN)
1219 record_excess_regs (PATTERN (p), equiv, &output);
1226 /* Return 1 if all uses of REG
1227 are between INSN and the end of the basic block. */
1230 reg_in_basic_block_p (insn, reg)
1233 int regno = REGNO (reg);
1236 if (REGNO_FIRST_UID (regno) != INSN_UID (insn))
1239 /* Search this basic block for the already recorded last use of the reg. */
1240 for (p = insn; p; p = NEXT_INSN (p))
1242 switch (GET_CODE (p))
1249 /* Ordinary insn: if this is the last use, we win. */
1250 if (REGNO_LAST_UID (regno) == INSN_UID (p))
1255 /* Jump insn: if this is the last use, we win. */
1256 if (REGNO_LAST_UID (regno) == INSN_UID (p))
1258 /* Otherwise, it's the end of the basic block, so we lose. */
1263 /* It's the end of the basic block, so we lose. */
1271 /* The "last use" that was recorded can't be found after the first
1272 use. This can happen when the last use was deleted while
1273 processing an inner loop, this inner loop was then completely
1274 unrolled, and the outer loop is always exited after the inner loop,
1275 so that everything after the first use becomes a single basic block. */
1279 /* Compute the benefit of eliminating the insns in the block whose
1280 last insn is LAST. This may be a group of insns used to compute a
1281 value directly or can contain a library call. */
1284 libcall_benefit (last)
1290 for (insn = XEXP (find_reg_note (last, REG_RETVAL, NULL_RTX), 0);
1291 insn != last; insn = NEXT_INSN (insn))
1293 if (GET_CODE (insn) == CALL_INSN)
1294 benefit += 10; /* Assume at least this many insns in a library
1296 else if (GET_CODE (insn) == INSN
1297 && GET_CODE (PATTERN (insn)) != USE
1298 && GET_CODE (PATTERN (insn)) != CLOBBER)
1305 /* Skip COUNT insns from INSN, counting library calls as 1 insn. */
1308 skip_consec_insns (insn, count)
1312 for (; count > 0; count--)
1316 /* If first insn of libcall sequence, skip to end. */
1317 /* Do this at start of loop, since INSN is guaranteed to
1319 if (GET_CODE (insn) != NOTE
1320 && (temp = find_reg_note (insn, REG_LIBCALL, NULL_RTX)))
1321 insn = XEXP (temp, 0);
1324 insn = NEXT_INSN (insn);
1325 while (GET_CODE (insn) == NOTE);
1331 /* Ignore any movable whose insn falls within a libcall
1332 which is part of another movable.
1333 We make use of the fact that the movable for the libcall value
1334 was made later and so appears later on the chain. */
1337 ignore_some_movables (movables)
1338 struct loop_movables *movables;
1340 struct movable *m, *m1;
1342 for (m = movables->head; m; m = m->next)
1344 /* Is this a movable for the value of a libcall? */
1345 rtx note = find_reg_note (m->insn, REG_RETVAL, NULL_RTX);
1349 /* Check for earlier movables inside that range,
1350 and mark them invalid. We cannot use LUIDs here because
1351 insns created by loop.c for prior loops don't have LUIDs.
1352 Rather than reject all such insns from movables, we just
1353 explicitly check each insn in the libcall (since invariant
1354 libcalls aren't that common). */
1355 for (insn = XEXP (note, 0); insn != m->insn; insn = NEXT_INSN (insn))
1356 for (m1 = movables->head; m1 != m; m1 = m1->next)
1357 if (m1->insn == insn)
1363 /* For each movable insn, see if the reg that it loads
1364 leads when it dies right into another conditionally movable insn.
1365 If so, record that the second insn "forces" the first one,
1366 since the second can be moved only if the first is. */
1369 force_movables (movables)
1370 struct loop_movables *movables;
1372 struct movable *m, *m1;
1374 for (m1 = movables->head; m1; m1 = m1->next)
1375 /* Omit this if moving just the (SET (REG) 0) of a zero-extend. */
1376 if (!m1->partial && !m1->done)
1378 int regno = m1->regno;
1379 for (m = m1->next; m; m = m->next)
1380 /* ??? Could this be a bug? What if CSE caused the
1381 register of M1 to be used after this insn?
1382 Since CSE does not update regno_last_uid,
1383 this insn M->insn might not be where it dies.
1384 But very likely this doesn't matter; what matters is
1385 that M's reg is computed from M1's reg. */
1386 if (INSN_UID (m->insn) == REGNO_LAST_UID (regno)
1389 if (m != 0 && m->set_src == m1->set_dest
1390 /* If m->consec, m->set_src isn't valid. */
1394 /* Increase the priority of the moving the first insn
1395 since it permits the second to be moved as well. */
1399 m1->lifetime += m->lifetime;
1400 m1->savings += m->savings;
1405 /* Find invariant expressions that are equal and can be combined into
1409 combine_movables (movables, regs)
1410 struct loop_movables *movables;
1411 struct loop_regs *regs;
1414 char *matched_regs = (char *) xmalloc (regs->num);
1415 enum machine_mode mode;
1417 /* Regs that are set more than once are not allowed to match
1418 or be matched. I'm no longer sure why not. */
1419 /* Perhaps testing m->consec_sets would be more appropriate here? */
1421 for (m = movables->head; m; m = m->next)
1422 if (m->match == 0 && regs->array[m->regno].n_times_set == 1
1426 int regno = m->regno;
1428 memset (matched_regs, 0, regs->num);
1429 matched_regs[regno] = 1;
1431 /* We want later insns to match the first one. Don't make the first
1432 one match any later ones. So start this loop at m->next. */
1433 for (m1 = m->next; m1; m1 = m1->next)
1434 /* ??? HACK! move_movables does not verify that the replacement
1435 is valid, which can have disasterous effects with hard regs
1436 and match_dup. Turn combination off for now. */
1437 if (0 && m != m1 && m1->match == 0
1438 && regs->array[m1->regno].n_times_set == 1
1439 /* A reg used outside the loop mustn't be eliminated. */
1441 /* A reg used for zero-extending mustn't be eliminated. */
1443 && (matched_regs[m1->regno]
1446 /* Can combine regs with different modes loaded from the
1447 same constant only if the modes are the same or
1448 if both are integer modes with M wider or the same
1449 width as M1. The check for integer is redundant, but
1450 safe, since the only case of differing destination
1451 modes with equal sources is when both sources are
1452 VOIDmode, i.e., CONST_INT. */
1453 (GET_MODE (m->set_dest) == GET_MODE (m1->set_dest)
1454 || (GET_MODE_CLASS (GET_MODE (m->set_dest)) == MODE_INT
1455 && GET_MODE_CLASS (GET_MODE (m1->set_dest)) == MODE_INT
1456 && (GET_MODE_BITSIZE (GET_MODE (m->set_dest))
1457 >= GET_MODE_BITSIZE (GET_MODE (m1->set_dest)))))
1458 /* See if the source of M1 says it matches M. */
1459 && ((GET_CODE (m1->set_src) == REG
1460 && matched_regs[REGNO (m1->set_src)])
1461 || rtx_equal_for_loop_p (m->set_src, m1->set_src,
1463 && ((m->dependencies == m1->dependencies)
1464 || rtx_equal_p (m->dependencies, m1->dependencies)))
1466 m->lifetime += m1->lifetime;
1467 m->savings += m1->savings;
1470 matched_regs[m1->regno] = 1;
1474 /* Now combine the regs used for zero-extension.
1475 This can be done for those not marked `global'
1476 provided their lives don't overlap. */
1478 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
1479 mode = GET_MODE_WIDER_MODE (mode))
1481 struct movable *m0 = 0;
1483 /* Combine all the registers for extension from mode MODE.
1484 Don't combine any that are used outside this loop. */
1485 for (m = movables->head; m; m = m->next)
1486 if (m->partial && ! m->global
1487 && mode == GET_MODE (SET_SRC (PATTERN (NEXT_INSN (m->insn)))))
1491 int first = REGNO_FIRST_LUID (m->regno);
1492 int last = REGNO_LAST_LUID (m->regno);
1496 /* First one: don't check for overlap, just record it. */
1501 /* Make sure they extend to the same mode.
1502 (Almost always true.) */
1503 if (GET_MODE (m->set_dest) != GET_MODE (m0->set_dest))
1506 /* We already have one: check for overlap with those
1507 already combined together. */
1508 for (m1 = movables->head; m1 != m; m1 = m1->next)
1509 if (m1 == m0 || (m1->partial && m1->match == m0))
1510 if (! (REGNO_FIRST_LUID (m1->regno) > last
1511 || REGNO_LAST_LUID (m1->regno) < first))
1514 /* No overlap: we can combine this with the others. */
1515 m0->lifetime += m->lifetime;
1516 m0->savings += m->savings;
1526 free (matched_regs);
1529 /* Returns the number of movable instructions in LOOP that were not
1530 moved outside the loop. */
1533 num_unmoved_movables (loop)
1534 const struct loop *loop;
1539 for (m = LOOP_MOVABLES (loop)->head; m; m = m->next)
1547 /* Return 1 if regs X and Y will become the same if moved. */
1550 regs_match_p (x, y, movables)
1552 struct loop_movables *movables;
1554 unsigned int xn = REGNO (x);
1555 unsigned int yn = REGNO (y);
1556 struct movable *mx, *my;
1558 for (mx = movables->head; mx; mx = mx->next)
1559 if (mx->regno == xn)
1562 for (my = movables->head; my; my = my->next)
1563 if (my->regno == yn)
1567 && ((mx->match == my->match && mx->match != 0)
1569 || mx == my->match));
1572 /* Return 1 if X and Y are identical-looking rtx's.
1573 This is the Lisp function EQUAL for rtx arguments.
1575 If two registers are matching movables or a movable register and an
1576 equivalent constant, consider them equal. */
1579 rtx_equal_for_loop_p (x, y, movables, regs)
1581 struct loop_movables *movables;
1582 struct loop_regs *regs;
1592 if (x == 0 || y == 0)
1595 code = GET_CODE (x);
1597 /* If we have a register and a constant, they may sometimes be
1599 if (GET_CODE (x) == REG && regs->array[REGNO (x)].set_in_loop == -2
1602 for (m = movables->head; m; m = m->next)
1603 if (m->move_insn && m->regno == REGNO (x)
1604 && rtx_equal_p (m->set_src, y))
1607 else if (GET_CODE (y) == REG && regs->array[REGNO (y)].set_in_loop == -2
1610 for (m = movables->head; m; m = m->next)
1611 if (m->move_insn && m->regno == REGNO (y)
1612 && rtx_equal_p (m->set_src, x))
1616 /* Otherwise, rtx's of different codes cannot be equal. */
1617 if (code != GET_CODE (y))
1620 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
1621 (REG:SI x) and (REG:HI x) are NOT equivalent. */
1623 if (GET_MODE (x) != GET_MODE (y))
1626 /* These three types of rtx's can be compared nonrecursively. */
1628 return (REGNO (x) == REGNO (y) || regs_match_p (x, y, movables));
1630 if (code == LABEL_REF)
1631 return XEXP (x, 0) == XEXP (y, 0);
1632 if (code == SYMBOL_REF)
1633 return XSTR (x, 0) == XSTR (y, 0);
1635 /* Compare the elements. If any pair of corresponding elements
1636 fail to match, return 0 for the whole things. */
1638 fmt = GET_RTX_FORMAT (code);
1639 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1644 if (XWINT (x, i) != XWINT (y, i))
1649 if (XINT (x, i) != XINT (y, i))
1654 /* Two vectors must have the same length. */
1655 if (XVECLEN (x, i) != XVECLEN (y, i))
1658 /* And the corresponding elements must match. */
1659 for (j = 0; j < XVECLEN (x, i); j++)
1660 if (rtx_equal_for_loop_p (XVECEXP (x, i, j), XVECEXP (y, i, j),
1661 movables, regs) == 0)
1666 if (rtx_equal_for_loop_p (XEXP (x, i), XEXP (y, i), movables, regs)
1672 if (strcmp (XSTR (x, i), XSTR (y, i)))
1677 /* These are just backpointers, so they don't matter. */
1683 /* It is believed that rtx's at this level will never
1684 contain anything but integers and other rtx's,
1685 except for within LABEL_REFs and SYMBOL_REFs. */
1693 /* If X contains any LABEL_REF's, add REG_LABEL notes for them to all
1694 insns in INSNS which use the reference. LABEL_NUSES for CODE_LABEL
1695 references is incremented once for each added note. */
1698 add_label_notes (x, insns)
1702 enum rtx_code code = GET_CODE (x);
1707 if (code == LABEL_REF && !LABEL_REF_NONLOCAL_P (x))
1709 /* This code used to ignore labels that referred to dispatch tables to
1710 avoid flow generating (slighly) worse code.
1712 We no longer ignore such label references (see LABEL_REF handling in
1713 mark_jump_label for additional information). */
1714 for (insn = insns; insn; insn = NEXT_INSN (insn))
1715 if (reg_mentioned_p (XEXP (x, 0), insn))
1717 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_LABEL, XEXP (x, 0),
1719 if (LABEL_P (XEXP (x, 0)))
1720 LABEL_NUSES (XEXP (x, 0))++;
1724 fmt = GET_RTX_FORMAT (code);
1725 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1728 add_label_notes (XEXP (x, i), insns);
1729 else if (fmt[i] == 'E')
1730 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1731 add_label_notes (XVECEXP (x, i, j), insns);
1735 /* Scan MOVABLES, and move the insns that deserve to be moved.
1736 If two matching movables are combined, replace one reg with the
1737 other throughout. */
1740 move_movables (loop, movables, threshold, insn_count)
1742 struct loop_movables *movables;
1746 struct loop_regs *regs = LOOP_REGS (loop);
1747 int nregs = regs->num;
1751 rtx loop_start = loop->start;
1752 rtx loop_end = loop->end;
1753 /* Map of pseudo-register replacements to handle combining
1754 when we move several insns that load the same value
1755 into different pseudo-registers. */
1756 rtx *reg_map = (rtx *) xcalloc (nregs, sizeof (rtx));
1757 char *already_moved = (char *) xcalloc (nregs, sizeof (char));
1759 for (m = movables->head; m; m = m->next)
1761 /* Describe this movable insn. */
1763 if (loop_dump_stream)
1765 fprintf (loop_dump_stream, "Insn %d: regno %d (life %d), ",
1766 INSN_UID (m->insn), m->regno, m->lifetime);
1768 fprintf (loop_dump_stream, "consec %d, ", m->consec);
1770 fprintf (loop_dump_stream, "cond ");
1772 fprintf (loop_dump_stream, "force ");
1774 fprintf (loop_dump_stream, "global ");
1776 fprintf (loop_dump_stream, "done ");
1778 fprintf (loop_dump_stream, "move-insn ");
1780 fprintf (loop_dump_stream, "matches %d ",
1781 INSN_UID (m->match->insn));
1783 fprintf (loop_dump_stream, "forces %d ",
1784 INSN_UID (m->forces->insn));
1787 /* Ignore the insn if it's already done (it matched something else).
1788 Otherwise, see if it is now safe to move. */
1792 || (1 == loop_invariant_p (loop, m->set_src)
1793 && (m->dependencies == 0
1794 || 1 == loop_invariant_p (loop, m->dependencies))
1796 || 1 == consec_sets_invariant_p (loop, m->set_dest,
1799 && (! m->forces || m->forces->done))
1803 int savings = m->savings;
1805 /* We have an insn that is safe to move.
1806 Compute its desirability. */
1811 if (loop_dump_stream)
1812 fprintf (loop_dump_stream, "savings %d ", savings);
1814 if (regs->array[regno].moved_once && loop_dump_stream)
1815 fprintf (loop_dump_stream, "halved since already moved ");
1817 /* An insn MUST be moved if we already moved something else
1818 which is safe only if this one is moved too: that is,
1819 if already_moved[REGNO] is nonzero. */
1821 /* An insn is desirable to move if the new lifetime of the
1822 register is no more than THRESHOLD times the old lifetime.
1823 If it's not desirable, it means the loop is so big
1824 that moving won't speed things up much,
1825 and it is liable to make register usage worse. */
1827 /* It is also desirable to move if it can be moved at no
1828 extra cost because something else was already moved. */
1830 if (already_moved[regno]
1831 || flag_move_all_movables
1832 || (threshold * savings * m->lifetime) >=
1833 (regs->array[regno].moved_once ? insn_count * 2 : insn_count)
1834 || (m->forces && m->forces->done
1835 && regs->array[m->forces->regno].n_times_set == 1))
1839 rtx first = NULL_RTX;
1841 /* Now move the insns that set the reg. */
1843 if (m->partial && m->match)
1847 /* Find the end of this chain of matching regs.
1848 Thus, we load each reg in the chain from that one reg.
1849 And that reg is loaded with 0 directly,
1850 since it has ->match == 0. */
1851 for (m1 = m; m1->match; m1 = m1->match);
1852 newpat = gen_move_insn (SET_DEST (PATTERN (m->insn)),
1853 SET_DEST (PATTERN (m1->insn)));
1854 i1 = loop_insn_hoist (loop, newpat);
1856 /* Mark the moved, invariant reg as being allowed to
1857 share a hard reg with the other matching invariant. */
1858 REG_NOTES (i1) = REG_NOTES (m->insn);
1859 r1 = SET_DEST (PATTERN (m->insn));
1860 r2 = SET_DEST (PATTERN (m1->insn));
1862 = gen_rtx_EXPR_LIST (VOIDmode, r1,
1863 gen_rtx_EXPR_LIST (VOIDmode, r2,
1865 delete_insn (m->insn);
1870 if (loop_dump_stream)
1871 fprintf (loop_dump_stream, " moved to %d", INSN_UID (i1));
1873 /* If we are to re-generate the item being moved with a
1874 new move insn, first delete what we have and then emit
1875 the move insn before the loop. */
1876 else if (m->move_insn)
1880 for (count = m->consec; count >= 0; count--)
1882 /* If this is the first insn of a library call sequence,
1884 if (GET_CODE (p) != NOTE
1885 && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
1888 /* If this is the last insn of a libcall sequence, then
1889 delete every insn in the sequence except the last.
1890 The last insn is handled in the normal manner. */
1891 if (GET_CODE (p) != NOTE
1892 && (temp = find_reg_note (p, REG_RETVAL, NULL_RTX)))
1894 temp = XEXP (temp, 0);
1896 temp = delete_insn (temp);
1900 p = delete_insn (p);
1902 /* simplify_giv_expr expects that it can walk the insns
1903 at m->insn forwards and see this old sequence we are
1904 tossing here. delete_insn does preserve the next
1905 pointers, but when we skip over a NOTE we must fix
1906 it up. Otherwise that code walks into the non-deleted
1908 while (p && GET_CODE (p) == NOTE)
1909 p = NEXT_INSN (temp) = NEXT_INSN (p);
1913 emit_move_insn (m->set_dest, m->set_src);
1914 temp = get_insns ();
1915 seq = gen_sequence ();
1918 add_label_notes (m->set_src, temp);
1920 i1 = loop_insn_hoist (loop, seq);
1921 if (! find_reg_note (i1, REG_EQUAL, NULL_RTX))
1922 set_unique_reg_note (i1,
1923 m->is_equiv ? REG_EQUIV : REG_EQUAL,
1926 if (loop_dump_stream)
1927 fprintf (loop_dump_stream, " moved to %d", INSN_UID (i1));
1929 /* The more regs we move, the less we like moving them. */
1934 for (count = m->consec; count >= 0; count--)
1938 /* If first insn of libcall sequence, skip to end. */
1939 /* Do this at start of loop, since p is guaranteed to
1941 if (GET_CODE (p) != NOTE
1942 && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
1945 /* If last insn of libcall sequence, move all
1946 insns except the last before the loop. The last
1947 insn is handled in the normal manner. */
1948 if (GET_CODE (p) != NOTE
1949 && (temp = find_reg_note (p, REG_RETVAL, NULL_RTX)))
1953 rtx fn_address_insn = 0;
1956 for (temp = XEXP (temp, 0); temp != p;
1957 temp = NEXT_INSN (temp))
1963 if (GET_CODE (temp) == NOTE)
1966 body = PATTERN (temp);
1968 /* Find the next insn after TEMP,
1969 not counting USE or NOTE insns. */
1970 for (next = NEXT_INSN (temp); next != p;
1971 next = NEXT_INSN (next))
1972 if (! (GET_CODE (next) == INSN
1973 && GET_CODE (PATTERN (next)) == USE)
1974 && GET_CODE (next) != NOTE)
1977 /* If that is the call, this may be the insn
1978 that loads the function address.
1980 Extract the function address from the insn
1981 that loads it into a register.
1982 If this insn was cse'd, we get incorrect code.
1984 So emit a new move insn that copies the
1985 function address into the register that the
1986 call insn will use. flow.c will delete any
1987 redundant stores that we have created. */
1988 if (GET_CODE (next) == CALL_INSN
1989 && GET_CODE (body) == SET
1990 && GET_CODE (SET_DEST (body)) == REG
1991 && (n = find_reg_note (temp, REG_EQUAL,
1994 fn_reg = SET_SRC (body);
1995 if (GET_CODE (fn_reg) != REG)
1996 fn_reg = SET_DEST (body);
1997 fn_address = XEXP (n, 0);
1998 fn_address_insn = temp;
2000 /* We have the call insn.
2001 If it uses the register we suspect it might,
2002 load it with the correct address directly. */
2003 if (GET_CODE (temp) == CALL_INSN
2005 && reg_referenced_p (fn_reg, body))
2006 loop_insn_emit_after (loop, 0, fn_address_insn,
2008 (fn_reg, fn_address));
2010 if (GET_CODE (temp) == CALL_INSN)
2012 i1 = loop_call_insn_hoist (loop, body);
2013 /* Because the USAGE information potentially
2014 contains objects other than hard registers
2015 we need to copy it. */
2016 if (CALL_INSN_FUNCTION_USAGE (temp))
2017 CALL_INSN_FUNCTION_USAGE (i1)
2018 = copy_rtx (CALL_INSN_FUNCTION_USAGE (temp));
2021 i1 = loop_insn_hoist (loop, body);
2024 if (temp == fn_address_insn)
2025 fn_address_insn = i1;
2026 REG_NOTES (i1) = REG_NOTES (temp);
2027 REG_NOTES (temp) = NULL;
2033 if (m->savemode != VOIDmode)
2035 /* P sets REG to zero; but we should clear only
2036 the bits that are not covered by the mode
2038 rtx reg = m->set_dest;
2043 tem = expand_simple_binop
2044 (GET_MODE (reg), AND, reg,
2045 GEN_INT ((((HOST_WIDE_INT) 1
2046 << GET_MODE_BITSIZE (m->savemode)))
2048 reg, 1, OPTAB_LIB_WIDEN);
2052 emit_move_insn (reg, tem);
2053 sequence = gen_sequence ();
2055 i1 = loop_insn_hoist (loop, sequence);
2057 else if (GET_CODE (p) == CALL_INSN)
2059 i1 = loop_call_insn_hoist (loop, PATTERN (p));
2060 /* Because the USAGE information potentially
2061 contains objects other than hard registers
2062 we need to copy it. */
2063 if (CALL_INSN_FUNCTION_USAGE (p))
2064 CALL_INSN_FUNCTION_USAGE (i1)
2065 = copy_rtx (CALL_INSN_FUNCTION_USAGE (p));
2067 else if (count == m->consec && m->move_insn_first)
2070 /* The SET_SRC might not be invariant, so we must
2071 use the REG_EQUAL note. */
2073 emit_move_insn (m->set_dest, m->set_src);
2074 temp = get_insns ();
2075 seq = gen_sequence ();
2078 add_label_notes (m->set_src, temp);
2080 i1 = loop_insn_hoist (loop, seq);
2081 if (! find_reg_note (i1, REG_EQUAL, NULL_RTX))
2082 set_unique_reg_note (i1, m->is_equiv ? REG_EQUIV
2083 : REG_EQUAL, m->set_src);
2086 i1 = loop_insn_hoist (loop, PATTERN (p));
2088 if (REG_NOTES (i1) == 0)
2090 REG_NOTES (i1) = REG_NOTES (p);
2091 REG_NOTES (p) = NULL;
2093 /* If there is a REG_EQUAL note present whose value
2094 is not loop invariant, then delete it, since it
2095 may cause problems with later optimization passes.
2096 It is possible for cse to create such notes
2097 like this as a result of record_jump_cond. */
2099 if ((temp = find_reg_note (i1, REG_EQUAL, NULL_RTX))
2100 && ! loop_invariant_p (loop, XEXP (temp, 0)))
2101 remove_note (i1, temp);
2107 if (loop_dump_stream)
2108 fprintf (loop_dump_stream, " moved to %d",
2111 /* If library call, now fix the REG_NOTES that contain
2112 insn pointers, namely REG_LIBCALL on FIRST
2113 and REG_RETVAL on I1. */
2114 if ((temp = find_reg_note (i1, REG_RETVAL, NULL_RTX)))
2116 XEXP (temp, 0) = first;
2117 temp = find_reg_note (first, REG_LIBCALL, NULL_RTX);
2118 XEXP (temp, 0) = i1;
2125 /* simplify_giv_expr expects that it can walk the insns
2126 at m->insn forwards and see this old sequence we are
2127 tossing here. delete_insn does preserve the next
2128 pointers, but when we skip over a NOTE we must fix
2129 it up. Otherwise that code walks into the non-deleted
2131 while (p && GET_CODE (p) == NOTE)
2132 p = NEXT_INSN (temp) = NEXT_INSN (p);
2135 /* The more regs we move, the less we like moving them. */
2139 /* Any other movable that loads the same register
2141 already_moved[regno] = 1;
2143 /* This reg has been moved out of one loop. */
2144 regs->array[regno].moved_once = 1;
2146 /* The reg set here is now invariant. */
2148 regs->array[regno].set_in_loop = 0;
2152 /* Change the length-of-life info for the register
2153 to say it lives at least the full length of this loop.
2154 This will help guide optimizations in outer loops. */
2156 if (REGNO_FIRST_LUID (regno) > INSN_LUID (loop_start))
2157 /* This is the old insn before all the moved insns.
2158 We can't use the moved insn because it is out of range
2159 in uid_luid. Only the old insns have luids. */
2160 REGNO_FIRST_UID (regno) = INSN_UID (loop_start);
2161 if (REGNO_LAST_LUID (regno) < INSN_LUID (loop_end))
2162 REGNO_LAST_UID (regno) = INSN_UID (loop_end);
2164 /* Combine with this moved insn any other matching movables. */
2167 for (m1 = movables->head; m1; m1 = m1->next)
2172 /* Schedule the reg loaded by M1
2173 for replacement so that shares the reg of M.
2174 If the modes differ (only possible in restricted
2175 circumstances, make a SUBREG.
2177 Note this assumes that the target dependent files
2178 treat REG and SUBREG equally, including within
2179 GO_IF_LEGITIMATE_ADDRESS and in all the
2180 predicates since we never verify that replacing the
2181 original register with a SUBREG results in a
2182 recognizable insn. */
2183 if (GET_MODE (m->set_dest) == GET_MODE (m1->set_dest))
2184 reg_map[m1->regno] = m->set_dest;
2187 = gen_lowpart_common (GET_MODE (m1->set_dest),
2190 /* Get rid of the matching insn
2191 and prevent further processing of it. */
2194 /* if library call, delete all insns. */
2195 if ((temp = find_reg_note (m1->insn, REG_RETVAL,
2197 delete_insn_chain (XEXP (temp, 0), m1->insn);
2199 delete_insn (m1->insn);
2201 /* Any other movable that loads the same register
2203 already_moved[m1->regno] = 1;
2205 /* The reg merged here is now invariant,
2206 if the reg it matches is invariant. */
2208 regs->array[m1->regno].set_in_loop = 0;
2211 else if (loop_dump_stream)
2212 fprintf (loop_dump_stream, "not desirable");
2214 else if (loop_dump_stream && !m->match)
2215 fprintf (loop_dump_stream, "not safe");
2217 if (loop_dump_stream)
2218 fprintf (loop_dump_stream, "\n");
2222 new_start = loop_start;
2224 /* Go through all the instructions in the loop, making
2225 all the register substitutions scheduled in REG_MAP. */
2226 for (p = new_start; p != loop_end; p = NEXT_INSN (p))
2227 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
2228 || GET_CODE (p) == CALL_INSN)
2230 replace_regs (PATTERN (p), reg_map, nregs, 0);
2231 replace_regs (REG_NOTES (p), reg_map, nregs, 0);
2237 free (already_moved);
2242 loop_movables_add (movables, m)
2243 struct loop_movables *movables;
2246 if (movables->head == 0)
2249 movables->last->next = m;
2255 loop_movables_free (movables)
2256 struct loop_movables *movables;
2259 struct movable *m_next;
2261 for (m = movables->head; m; m = m_next)
2269 /* Scan X and replace the address of any MEM in it with ADDR.
2270 REG is the address that MEM should have before the replacement. */
2273 replace_call_address (x, reg, addr)
2282 code = GET_CODE (x);
2296 /* Short cut for very common case. */
2297 replace_call_address (XEXP (x, 1), reg, addr);
2301 /* Short cut for very common case. */
2302 replace_call_address (XEXP (x, 0), reg, addr);
2306 /* If this MEM uses a reg other than the one we expected,
2307 something is wrong. */
2308 if (XEXP (x, 0) != reg)
2317 fmt = GET_RTX_FORMAT (code);
2318 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2321 replace_call_address (XEXP (x, i), reg, addr);
2322 else if (fmt[i] == 'E')
2325 for (j = 0; j < XVECLEN (x, i); j++)
2326 replace_call_address (XVECEXP (x, i, j), reg, addr);
2332 /* Return the number of memory refs to addresses that vary
2336 count_nonfixed_reads (loop, x)
2337 const struct loop *loop;
2348 code = GET_CODE (x);
2362 return ((loop_invariant_p (loop, XEXP (x, 0)) != 1)
2363 + count_nonfixed_reads (loop, XEXP (x, 0)));
2370 fmt = GET_RTX_FORMAT (code);
2371 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2374 value += count_nonfixed_reads (loop, XEXP (x, i));
2378 for (j = 0; j < XVECLEN (x, i); j++)
2379 value += count_nonfixed_reads (loop, XVECEXP (x, i, j));
2385 /* Scan a loop setting the elements `cont', `vtop', `loops_enclosed',
2386 `has_call', `has_nonconst_call', `has_volatile', `has_tablejump',
2387 `unknown_address_altered', `unknown_constant_address_altered', and
2388 `num_mem_sets' in LOOP. Also, fill in the array `mems' and the
2389 list `store_mems' in LOOP. */
2397 struct loop_info *loop_info = LOOP_INFO (loop);
2398 rtx start = loop->start;
2399 rtx end = loop->end;
2400 /* The label after END. Jumping here is just like falling off the
2401 end of the loop. We use next_nonnote_insn instead of next_label
2402 as a hedge against the (pathological) case where some actual insn
2403 might end up between the two. */
2404 rtx exit_target = next_nonnote_insn (end);
2406 loop_info->has_indirect_jump = indirect_jump_in_function;
2407 loop_info->pre_header_has_call = 0;
2408 loop_info->has_call = 0;
2409 loop_info->has_nonconst_call = 0;
2410 loop_info->has_volatile = 0;
2411 loop_info->has_tablejump = 0;
2412 loop_info->has_multiple_exit_targets = 0;
2415 loop_info->unknown_address_altered = 0;
2416 loop_info->unknown_constant_address_altered = 0;
2417 loop_info->store_mems = NULL_RTX;
2418 loop_info->first_loop_store_insn = NULL_RTX;
2419 loop_info->mems_idx = 0;
2420 loop_info->num_mem_sets = 0;
2423 for (insn = start; insn && GET_CODE (insn) != CODE_LABEL;
2424 insn = PREV_INSN (insn))
2426 if (GET_CODE (insn) == CALL_INSN)
2428 loop_info->pre_header_has_call = 1;
2433 for (insn = NEXT_INSN (start); insn != NEXT_INSN (end);
2434 insn = NEXT_INSN (insn))
2436 if (GET_CODE (insn) == NOTE)
2438 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
2441 /* Count number of loops contained in this one. */
2444 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END)
2449 else if (GET_CODE (insn) == CALL_INSN)
2451 if (! CONST_OR_PURE_CALL_P (insn))
2453 loop_info->unknown_address_altered = 1;
2454 loop_info->has_nonconst_call = 1;
2456 loop_info->has_call = 1;
2458 else if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN)
2460 rtx label1 = NULL_RTX;
2461 rtx label2 = NULL_RTX;
2463 if (volatile_refs_p (PATTERN (insn)))
2464 loop_info->has_volatile = 1;
2466 if (GET_CODE (insn) == JUMP_INSN
2467 && (GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC
2468 || GET_CODE (PATTERN (insn)) == ADDR_VEC))
2469 loop_info->has_tablejump = 1;
2471 note_stores (PATTERN (insn), note_addr_stored, loop_info);
2472 if (! loop_info->first_loop_store_insn && loop_info->store_mems)
2473 loop_info->first_loop_store_insn = insn;
2475 if (! loop_info->has_multiple_exit_targets
2476 && GET_CODE (insn) == JUMP_INSN
2477 && GET_CODE (PATTERN (insn)) == SET
2478 && SET_DEST (PATTERN (insn)) == pc_rtx)
2480 if (GET_CODE (SET_SRC (PATTERN (insn))) == IF_THEN_ELSE)
2482 label1 = XEXP (SET_SRC (PATTERN (insn)), 1);
2483 label2 = XEXP (SET_SRC (PATTERN (insn)), 2);
2487 label1 = SET_SRC (PATTERN (insn));
2492 if (label1 && label1 != pc_rtx)
2494 if (GET_CODE (label1) != LABEL_REF)
2496 /* Something tricky. */
2497 loop_info->has_multiple_exit_targets = 1;
2500 else if (XEXP (label1, 0) != exit_target
2501 && LABEL_OUTSIDE_LOOP_P (label1))
2503 /* A jump outside the current loop. */
2504 loop_info->has_multiple_exit_targets = 1;
2515 else if (GET_CODE (insn) == RETURN)
2516 loop_info->has_multiple_exit_targets = 1;
2519 /* Now, rescan the loop, setting up the LOOP_MEMS array. */
2520 if (/* An exception thrown by a called function might land us
2522 ! loop_info->has_nonconst_call
2523 /* We don't want loads for MEMs moved to a location before the
2524 one at which their stack memory becomes allocated. (Note
2525 that this is not a problem for malloc, etc., since those
2526 require actual function calls. */
2527 && ! current_function_calls_alloca
2528 /* There are ways to leave the loop other than falling off the
2530 && ! loop_info->has_multiple_exit_targets)
2531 for (insn = NEXT_INSN (start); insn != NEXT_INSN (end);
2532 insn = NEXT_INSN (insn))
2533 for_each_rtx (&insn, insert_loop_mem, loop_info);
2535 /* BLKmode MEMs are added to LOOP_STORE_MEM as necessary so
2536 that loop_invariant_p and load_mems can use true_dependence
2537 to determine what is really clobbered. */
2538 if (loop_info->unknown_address_altered)
2540 rtx mem = gen_rtx_MEM (BLKmode, const0_rtx);
2542 loop_info->store_mems
2543 = gen_rtx_EXPR_LIST (VOIDmode, mem, loop_info->store_mems);
2545 if (loop_info->unknown_constant_address_altered)
2547 rtx mem = gen_rtx_MEM (BLKmode, const0_rtx);
2549 RTX_UNCHANGING_P (mem) = 1;
2550 loop_info->store_mems
2551 = gen_rtx_EXPR_LIST (VOIDmode, mem, loop_info->store_mems);
2555 /* Scan the function looking for loops. Record the start and end of each loop.
2556 Also mark as invalid loops any loops that contain a setjmp or are branched
2557 to from outside the loop. */
2560 find_and_verify_loops (f, loops)
2562 struct loops *loops;
2567 struct loop *current_loop;
2568 struct loop *next_loop;
2571 num_loops = loops->num;
2573 compute_luids (f, NULL_RTX, 0);
2575 /* If there are jumps to undefined labels,
2576 treat them as jumps out of any/all loops.
2577 This also avoids writing past end of tables when there are no loops. */
2580 /* Find boundaries of loops, mark which loops are contained within
2581 loops, and invalidate loops that have setjmp. */
2584 current_loop = NULL;
2585 for (insn = f; insn; insn = NEXT_INSN (insn))
2587 if (GET_CODE (insn) == NOTE)
2588 switch (NOTE_LINE_NUMBER (insn))
2590 case NOTE_INSN_LOOP_BEG:
2591 next_loop = loops->array + num_loops;
2592 next_loop->num = num_loops;
2594 next_loop->start = insn;
2595 next_loop->outer = current_loop;
2596 current_loop = next_loop;
2599 case NOTE_INSN_LOOP_CONT:
2600 current_loop->cont = insn;
2603 case NOTE_INSN_LOOP_VTOP:
2604 current_loop->vtop = insn;
2607 case NOTE_INSN_LOOP_END:
2611 current_loop->end = insn;
2612 current_loop = current_loop->outer;
2619 if (GET_CODE (insn) == CALL_INSN
2620 && find_reg_note (insn, REG_SETJMP, NULL))
2622 /* In this case, we must invalidate our current loop and any
2624 for (loop = current_loop; loop; loop = loop->outer)
2627 if (loop_dump_stream)
2628 fprintf (loop_dump_stream,
2629 "\nLoop at %d ignored due to setjmp.\n",
2630 INSN_UID (loop->start));
2634 /* Note that this will mark the NOTE_INSN_LOOP_END note as being in the
2635 enclosing loop, but this doesn't matter. */
2636 uid_loop[INSN_UID (insn)] = current_loop;
2639 /* Any loop containing a label used in an initializer must be invalidated,
2640 because it can be jumped into from anywhere. */
2642 for (label = forced_labels; label; label = XEXP (label, 1))
2644 for (loop = uid_loop[INSN_UID (XEXP (label, 0))];
2645 loop; loop = loop->outer)
2649 /* Any loop containing a label used for an exception handler must be
2650 invalidated, because it can be jumped into from anywhere. */
2652 for (label = exception_handler_labels; label; label = XEXP (label, 1))
2654 for (loop = uid_loop[INSN_UID (XEXP (label, 0))];
2655 loop; loop = loop->outer)
2659 /* Now scan all insn's in the function. If any JUMP_INSN branches into a
2660 loop that it is not contained within, that loop is marked invalid.
2661 If any INSN or CALL_INSN uses a label's address, then the loop containing
2662 that label is marked invalid, because it could be jumped into from
2665 Also look for blocks of code ending in an unconditional branch that
2666 exits the loop. If such a block is surrounded by a conditional
2667 branch around the block, move the block elsewhere (see below) and
2668 invert the jump to point to the code block. This may eliminate a
2669 label in our loop and will simplify processing by both us and a
2670 possible second cse pass. */
2672 for (insn = f; insn; insn = NEXT_INSN (insn))
2675 struct loop *this_loop = uid_loop[INSN_UID (insn)];
2677 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
2679 rtx note = find_reg_note (insn, REG_LABEL, NULL_RTX);
2682 for (loop = uid_loop[INSN_UID (XEXP (note, 0))];
2683 loop; loop = loop->outer)
2688 if (GET_CODE (insn) != JUMP_INSN)
2691 mark_loop_jump (PATTERN (insn), this_loop);
2693 /* See if this is an unconditional branch outside the loop. */
2695 && (GET_CODE (PATTERN (insn)) == RETURN
2696 || (any_uncondjump_p (insn)
2697 && onlyjump_p (insn)
2698 && (uid_loop[INSN_UID (JUMP_LABEL (insn))]
2700 && get_max_uid () < max_uid_for_loop)
2703 rtx our_next = next_real_insn (insn);
2704 rtx last_insn_to_move = NEXT_INSN (insn);
2705 struct loop *dest_loop;
2706 struct loop *outer_loop = NULL;
2708 /* Go backwards until we reach the start of the loop, a label,
2710 for (p = PREV_INSN (insn);
2711 GET_CODE (p) != CODE_LABEL
2712 && ! (GET_CODE (p) == NOTE
2713 && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
2714 && GET_CODE (p) != JUMP_INSN;
2718 /* Check for the case where we have a jump to an inner nested
2719 loop, and do not perform the optimization in that case. */
2721 if (JUMP_LABEL (insn))
2723 dest_loop = uid_loop[INSN_UID (JUMP_LABEL (insn))];
2726 for (outer_loop = dest_loop; outer_loop;
2727 outer_loop = outer_loop->outer)
2728 if (outer_loop == this_loop)
2733 /* Make sure that the target of P is within the current loop. */
2735 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p)
2736 && uid_loop[INSN_UID (JUMP_LABEL (p))] != this_loop)
2737 outer_loop = this_loop;
2739 /* If we stopped on a JUMP_INSN to the next insn after INSN,
2740 we have a block of code to try to move.
2742 We look backward and then forward from the target of INSN
2743 to find a BARRIER at the same loop depth as the target.
2744 If we find such a BARRIER, we make a new label for the start
2745 of the block, invert the jump in P and point it to that label,
2746 and move the block of code to the spot we found. */
2749 && GET_CODE (p) == JUMP_INSN
2750 && JUMP_LABEL (p) != 0
2751 /* Just ignore jumps to labels that were never emitted.
2752 These always indicate compilation errors. */
2753 && INSN_UID (JUMP_LABEL (p)) != 0
2754 && any_condjump_p (p) && onlyjump_p (p)
2755 && next_real_insn (JUMP_LABEL (p)) == our_next
2756 /* If it's not safe to move the sequence, then we
2758 && insns_safe_to_move_p (p, NEXT_INSN (insn),
2759 &last_insn_to_move))
2762 = JUMP_LABEL (insn) ? JUMP_LABEL (insn) : get_last_insn ();
2763 struct loop *target_loop = uid_loop[INSN_UID (target)];
2767 /* Search for possible garbage past the conditional jumps
2768 and look for the last barrier. */
2769 for (tmp = last_insn_to_move;
2770 tmp && GET_CODE (tmp) != CODE_LABEL; tmp = NEXT_INSN (tmp))
2771 if (GET_CODE (tmp) == BARRIER)
2772 last_insn_to_move = tmp;
2774 for (loc = target; loc; loc = PREV_INSN (loc))
2775 if (GET_CODE (loc) == BARRIER
2776 /* Don't move things inside a tablejump. */
2777 && ((loc2 = next_nonnote_insn (loc)) == 0
2778 || GET_CODE (loc2) != CODE_LABEL
2779 || (loc2 = next_nonnote_insn (loc2)) == 0
2780 || GET_CODE (loc2) != JUMP_INSN
2781 || (GET_CODE (PATTERN (loc2)) != ADDR_VEC
2782 && GET_CODE (PATTERN (loc2)) != ADDR_DIFF_VEC))
2783 && uid_loop[INSN_UID (loc)] == target_loop)
2787 for (loc = target; loc; loc = NEXT_INSN (loc))
2788 if (GET_CODE (loc) == BARRIER
2789 /* Don't move things inside a tablejump. */
2790 && ((loc2 = next_nonnote_insn (loc)) == 0
2791 || GET_CODE (loc2) != CODE_LABEL
2792 || (loc2 = next_nonnote_insn (loc2)) == 0
2793 || GET_CODE (loc2) != JUMP_INSN
2794 || (GET_CODE (PATTERN (loc2)) != ADDR_VEC
2795 && GET_CODE (PATTERN (loc2)) != ADDR_DIFF_VEC))
2796 && uid_loop[INSN_UID (loc)] == target_loop)
2801 rtx cond_label = JUMP_LABEL (p);
2802 rtx new_label = get_label_after (p);
2804 /* Ensure our label doesn't go away. */
2805 LABEL_NUSES (cond_label)++;
2807 /* Verify that uid_loop is large enough and that
2809 if (invert_jump (p, new_label, 1))
2813 /* If no suitable BARRIER was found, create a suitable
2814 one before TARGET. Since TARGET is a fall through
2815 path, we'll need to insert an jump around our block
2816 and add a BARRIER before TARGET.
2818 This creates an extra unconditional jump outside
2819 the loop. However, the benefits of removing rarely
2820 executed instructions from inside the loop usually
2821 outweighs the cost of the extra unconditional jump
2822 outside the loop. */
2827 temp = gen_jump (JUMP_LABEL (insn));
2828 temp = emit_jump_insn_before (temp, target);
2829 JUMP_LABEL (temp) = JUMP_LABEL (insn);
2830 LABEL_NUSES (JUMP_LABEL (insn))++;
2831 loc = emit_barrier_before (target);
2834 /* Include the BARRIER after INSN and copy the
2836 if (squeeze_notes (&new_label, &last_insn_to_move))
2838 reorder_insns (new_label, last_insn_to_move, loc);
2840 /* All those insns are now in TARGET_LOOP. */
2842 q != NEXT_INSN (last_insn_to_move);
2844 uid_loop[INSN_UID (q)] = target_loop;
2846 /* The label jumped to by INSN is no longer a loop
2847 exit. Unless INSN does not have a label (e.g.,
2848 it is a RETURN insn), search loop->exit_labels
2849 to find its label_ref, and remove it. Also turn
2850 off LABEL_OUTSIDE_LOOP_P bit. */
2851 if (JUMP_LABEL (insn))
2853 for (q = 0, r = this_loop->exit_labels;
2855 q = r, r = LABEL_NEXTREF (r))
2856 if (XEXP (r, 0) == JUMP_LABEL (insn))
2858 LABEL_OUTSIDE_LOOP_P (r) = 0;
2860 LABEL_NEXTREF (q) = LABEL_NEXTREF (r);
2862 this_loop->exit_labels = LABEL_NEXTREF (r);
2866 for (loop = this_loop; loop && loop != target_loop;
2870 /* If we didn't find it, then something is
2876 /* P is now a jump outside the loop, so it must be put
2877 in loop->exit_labels, and marked as such.
2878 The easiest way to do this is to just call
2879 mark_loop_jump again for P. */
2880 mark_loop_jump (PATTERN (p), this_loop);
2882 /* If INSN now jumps to the insn after it,
2884 if (JUMP_LABEL (insn) != 0
2885 && (next_real_insn (JUMP_LABEL (insn))
2886 == next_real_insn (insn)))
2887 delete_related_insns (insn);
2890 /* Continue the loop after where the conditional
2891 branch used to jump, since the only branch insn
2892 in the block (if it still remains) is an inter-loop
2893 branch and hence needs no processing. */
2894 insn = NEXT_INSN (cond_label);
2896 if (--LABEL_NUSES (cond_label) == 0)
2897 delete_related_insns (cond_label);
2899 /* This loop will be continued with NEXT_INSN (insn). */
2900 insn = PREV_INSN (insn);
2907 /* If any label in X jumps to a loop different from LOOP_NUM and any of the
2908 loops it is contained in, mark the target loop invalid.
2910 For speed, we assume that X is part of a pattern of a JUMP_INSN. */
2913 mark_loop_jump (x, loop)
2917 struct loop *dest_loop;
2918 struct loop *outer_loop;
2921 switch (GET_CODE (x))
2934 /* There could be a label reference in here. */
2935 mark_loop_jump (XEXP (x, 0), loop);
2941 mark_loop_jump (XEXP (x, 0), loop);
2942 mark_loop_jump (XEXP (x, 1), loop);
2946 /* This may refer to a LABEL_REF or SYMBOL_REF. */
2947 mark_loop_jump (XEXP (x, 1), loop);
2952 mark_loop_jump (XEXP (x, 0), loop);
2956 dest_loop = uid_loop[INSN_UID (XEXP (x, 0))];
2958 /* Link together all labels that branch outside the loop. This
2959 is used by final_[bg]iv_value and the loop unrolling code. Also
2960 mark this LABEL_REF so we know that this branch should predict
2963 /* A check to make sure the label is not in an inner nested loop,
2964 since this does not count as a loop exit. */
2967 for (outer_loop = dest_loop; outer_loop;
2968 outer_loop = outer_loop->outer)
2969 if (outer_loop == loop)
2975 if (loop && ! outer_loop)
2977 LABEL_OUTSIDE_LOOP_P (x) = 1;
2978 LABEL_NEXTREF (x) = loop->exit_labels;
2979 loop->exit_labels = x;
2981 for (outer_loop = loop;
2982 outer_loop && outer_loop != dest_loop;
2983 outer_loop = outer_loop->outer)
2984 outer_loop->exit_count++;
2987 /* If this is inside a loop, but not in the current loop or one enclosed
2988 by it, it invalidates at least one loop. */
2993 /* We must invalidate every nested loop containing the target of this
2994 label, except those that also contain the jump insn. */
2996 for (; dest_loop; dest_loop = dest_loop->outer)
2998 /* Stop when we reach a loop that also contains the jump insn. */
2999 for (outer_loop = loop; outer_loop; outer_loop = outer_loop->outer)
3000 if (dest_loop == outer_loop)
3003 /* If we get here, we know we need to invalidate a loop. */
3004 if (loop_dump_stream && ! dest_loop->invalid)
3005 fprintf (loop_dump_stream,
3006 "\nLoop at %d ignored due to multiple entry points.\n",
3007 INSN_UID (dest_loop->start));
3009 dest_loop->invalid = 1;
3014 /* If this is not setting pc, ignore. */
3015 if (SET_DEST (x) == pc_rtx)
3016 mark_loop_jump (SET_SRC (x), loop);
3020 mark_loop_jump (XEXP (x, 1), loop);
3021 mark_loop_jump (XEXP (x, 2), loop);
3026 for (i = 0; i < XVECLEN (x, 0); i++)
3027 mark_loop_jump (XVECEXP (x, 0, i), loop);
3031 for (i = 0; i < XVECLEN (x, 1); i++)
3032 mark_loop_jump (XVECEXP (x, 1, i), loop);
3036 /* Strictly speaking this is not a jump into the loop, only a possible
3037 jump out of the loop. However, we have no way to link the destination
3038 of this jump onto the list of exit labels. To be safe we mark this
3039 loop and any containing loops as invalid. */
3042 for (outer_loop = loop; outer_loop; outer_loop = outer_loop->outer)
3044 if (loop_dump_stream && ! outer_loop->invalid)
3045 fprintf (loop_dump_stream,
3046 "\nLoop at %d ignored due to unknown exit jump.\n",
3047 INSN_UID (outer_loop->start));
3048 outer_loop->invalid = 1;
3055 /* Return nonzero if there is a label in the range from
3056 insn INSN to and including the insn whose luid is END
3057 INSN must have an assigned luid (i.e., it must not have
3058 been previously created by loop.c). */
3061 labels_in_range_p (insn, end)
3065 while (insn && INSN_LUID (insn) <= end)
3067 if (GET_CODE (insn) == CODE_LABEL)
3069 insn = NEXT_INSN (insn);
3075 /* Record that a memory reference X is being set. */
3078 note_addr_stored (x, y, data)
3080 rtx y ATTRIBUTE_UNUSED;
3081 void *data ATTRIBUTE_UNUSED;
3083 struct loop_info *loop_info = data;
3085 if (x == 0 || GET_CODE (x) != MEM)
3088 /* Count number of memory writes.
3089 This affects heuristics in strength_reduce. */
3090 loop_info->num_mem_sets++;
3092 /* BLKmode MEM means all memory is clobbered. */
3093 if (GET_MODE (x) == BLKmode)
3095 if (RTX_UNCHANGING_P (x))
3096 loop_info->unknown_constant_address_altered = 1;
3098 loop_info->unknown_address_altered = 1;
3103 loop_info->store_mems = gen_rtx_EXPR_LIST (VOIDmode, x,
3104 loop_info->store_mems);
3107 /* X is a value modified by an INSN that references a biv inside a loop
3108 exit test (ie, X is somehow related to the value of the biv). If X
3109 is a pseudo that is used more than once, then the biv is (effectively)
3110 used more than once. DATA is a pointer to a loop_regs structure. */
3113 note_set_pseudo_multiple_uses (x, y, data)
3115 rtx y ATTRIBUTE_UNUSED;
3118 struct loop_regs *regs = (struct loop_regs *) data;
3123 while (GET_CODE (x) == STRICT_LOW_PART
3124 || GET_CODE (x) == SIGN_EXTRACT
3125 || GET_CODE (x) == ZERO_EXTRACT
3126 || GET_CODE (x) == SUBREG)
3129 if (GET_CODE (x) != REG || REGNO (x) < FIRST_PSEUDO_REGISTER)
3132 /* If we do not have usage information, or if we know the register
3133 is used more than once, note that fact for check_dbra_loop. */
3134 if (REGNO (x) >= max_reg_before_loop
3135 || ! regs->array[REGNO (x)].single_usage
3136 || regs->array[REGNO (x)].single_usage == const0_rtx)
3137 regs->multiple_uses = 1;
3140 /* Return nonzero if the rtx X is invariant over the current loop.
3142 The value is 2 if we refer to something only conditionally invariant.
3144 A memory ref is invariant if it is not volatile and does not conflict
3145 with anything stored in `loop_info->store_mems'. */
3148 loop_invariant_p (loop, x)
3149 const struct loop *loop;
3152 struct loop_info *loop_info = LOOP_INFO (loop);
3153 struct loop_regs *regs = LOOP_REGS (loop);
3157 int conditional = 0;
3162 code = GET_CODE (x);
3172 /* A LABEL_REF is normally invariant, however, if we are unrolling
3173 loops, and this label is inside the loop, then it isn't invariant.
3174 This is because each unrolled copy of the loop body will have
3175 a copy of this label. If this was invariant, then an insn loading
3176 the address of this label into a register might get moved outside
3177 the loop, and then each loop body would end up using the same label.
3179 We don't know the loop bounds here though, so just fail for all
3181 if (flag_unroll_loops)
3188 case UNSPEC_VOLATILE:
3192 /* We used to check RTX_UNCHANGING_P (x) here, but that is invalid
3193 since the reg might be set by initialization within the loop. */
3195 if ((x == frame_pointer_rtx || x == hard_frame_pointer_rtx
3196 || x == arg_pointer_rtx)
3197 && ! current_function_has_nonlocal_goto)
3200 if (LOOP_INFO (loop)->has_call
3201 && REGNO (x) < FIRST_PSEUDO_REGISTER && call_used_regs[REGNO (x)])
3204 if (regs->array[REGNO (x)].set_in_loop < 0)
3207 return regs->array[REGNO (x)].set_in_loop == 0;
3210 /* Volatile memory references must be rejected. Do this before
3211 checking for read-only items, so that volatile read-only items
3212 will be rejected also. */
3213 if (MEM_VOLATILE_P (x))
3216 /* See if there is any dependence between a store and this load. */
3217 mem_list_entry = loop_info->store_mems;
3218 while (mem_list_entry)
3220 if (true_dependence (XEXP (mem_list_entry, 0), VOIDmode,
3224 mem_list_entry = XEXP (mem_list_entry, 1);
3227 /* It's not invalidated by a store in memory
3228 but we must still verify the address is invariant. */
3232 /* Don't mess with insns declared volatile. */
3233 if (MEM_VOLATILE_P (x))
3241 fmt = GET_RTX_FORMAT (code);
3242 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3246 int tem = loop_invariant_p (loop, XEXP (x, i));
3252 else if (fmt[i] == 'E')
3255 for (j = 0; j < XVECLEN (x, i); j++)
3257 int tem = loop_invariant_p (loop, XVECEXP (x, i, j));
3267 return 1 + conditional;
3270 /* Return nonzero if all the insns in the loop that set REG
3271 are INSN and the immediately following insns,
3272 and if each of those insns sets REG in an invariant way
3273 (not counting uses of REG in them).
3275 The value is 2 if some of these insns are only conditionally invariant.
3277 We assume that INSN itself is the first set of REG
3278 and that its source is invariant. */
3281 consec_sets_invariant_p (loop, reg, n_sets, insn)
3282 const struct loop *loop;
3286 struct loop_regs *regs = LOOP_REGS (loop);
3288 unsigned int regno = REGNO (reg);
3290 /* Number of sets we have to insist on finding after INSN. */
3291 int count = n_sets - 1;
3292 int old = regs->array[regno].set_in_loop;
3296 /* If N_SETS hit the limit, we can't rely on its value. */
3300 regs->array[regno].set_in_loop = 0;
3308 code = GET_CODE (p);
3310 /* If library call, skip to end of it. */
3311 if (code == INSN && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
3316 && (set = single_set (p))
3317 && GET_CODE (SET_DEST (set)) == REG
3318 && REGNO (SET_DEST (set)) == regno)
3320 this = loop_invariant_p (loop, SET_SRC (set));
3323 else if ((temp = find_reg_note (p, REG_EQUAL, NULL_RTX)))
3325 /* If this is a libcall, then any invariant REG_EQUAL note is OK.
3326 If this is an ordinary insn, then only CONSTANT_P REG_EQUAL
3328 this = (CONSTANT_P (XEXP (temp, 0))
3329 || (find_reg_note (p, REG_RETVAL, NULL_RTX)
3330 && loop_invariant_p (loop, XEXP (temp, 0))));
3337 else if (code != NOTE)
3339 regs->array[regno].set_in_loop = old;
3344 regs->array[regno].set_in_loop = old;
3345 /* If loop_invariant_p ever returned 2, we return 2. */
3346 return 1 + (value & 2);
3350 /* I don't think this condition is sufficient to allow INSN
3351 to be moved, so we no longer test it. */
3353 /* Return 1 if all insns in the basic block of INSN and following INSN
3354 that set REG are invariant according to TABLE. */
3357 all_sets_invariant_p (reg, insn, table)
3362 int regno = REGNO (reg);
3368 code = GET_CODE (p);
3369 if (code == CODE_LABEL || code == JUMP_INSN)
3371 if (code == INSN && GET_CODE (PATTERN (p)) == SET
3372 && GET_CODE (SET_DEST (PATTERN (p))) == REG
3373 && REGNO (SET_DEST (PATTERN (p))) == regno)
3375 if (! loop_invariant_p (loop, SET_SRC (PATTERN (p)), table))
3382 /* Look at all uses (not sets) of registers in X. For each, if it is
3383 the single use, set USAGE[REGNO] to INSN; if there was a previous use in
3384 a different insn, set USAGE[REGNO] to const0_rtx. */
3387 find_single_use_in_loop (regs, insn, x)
3388 struct loop_regs *regs;
3392 enum rtx_code code = GET_CODE (x);
3393 const char *fmt = GET_RTX_FORMAT (code);
3397 regs->array[REGNO (x)].single_usage
3398 = (regs->array[REGNO (x)].single_usage != 0
3399 && regs->array[REGNO (x)].single_usage != insn)
3400 ? const0_rtx : insn;
3402 else if (code == SET)
3404 /* Don't count SET_DEST if it is a REG; otherwise count things
3405 in SET_DEST because if a register is partially modified, it won't
3406 show up as a potential movable so we don't care how USAGE is set
3408 if (GET_CODE (SET_DEST (x)) != REG)
3409 find_single_use_in_loop (regs, insn, SET_DEST (x));
3410 find_single_use_in_loop (regs, insn, SET_SRC (x));
3413 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3415 if (fmt[i] == 'e' && XEXP (x, i) != 0)
3416 find_single_use_in_loop (regs, insn, XEXP (x, i));
3417 else if (fmt[i] == 'E')
3418 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3419 find_single_use_in_loop (regs, insn, XVECEXP (x, i, j));
3423 /* Count and record any set in X which is contained in INSN. Update
3424 REGS->array[I].MAY_NOT_OPTIMIZE and LAST_SET for any register I set
3428 count_one_set (regs, insn, x, last_set)
3429 struct loop_regs *regs;
3433 if (GET_CODE (x) == CLOBBER && GET_CODE (XEXP (x, 0)) == REG)
3434 /* Don't move a reg that has an explicit clobber.
3435 It's not worth the pain to try to do it correctly. */
3436 regs->array[REGNO (XEXP (x, 0))].may_not_optimize = 1;
3438 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
3440 rtx dest = SET_DEST (x);
3441 while (GET_CODE (dest) == SUBREG
3442 || GET_CODE (dest) == ZERO_EXTRACT
3443 || GET_CODE (dest) == SIGN_EXTRACT
3444 || GET_CODE (dest) == STRICT_LOW_PART)
3445 dest = XEXP (dest, 0);
3446 if (GET_CODE (dest) == REG)
3448 int regno = REGNO (dest);
3449 /* If this is the first setting of this reg
3450 in current basic block, and it was set before,
3451 it must be set in two basic blocks, so it cannot
3452 be moved out of the loop. */
3453 if (regs->array[regno].set_in_loop > 0
3455 regs->array[regno].may_not_optimize = 1;
3456 /* If this is not first setting in current basic block,
3457 see if reg was used in between previous one and this.
3458 If so, neither one can be moved. */
3459 if (last_set[regno] != 0
3460 && reg_used_between_p (dest, last_set[regno], insn))
3461 regs->array[regno].may_not_optimize = 1;
3462 if (regs->array[regno].set_in_loop < 127)
3463 ++regs->array[regno].set_in_loop;
3464 last_set[regno] = insn;
3469 /* Given a loop that is bounded by LOOP->START and LOOP->END and that
3470 is entered at LOOP->SCAN_START, return 1 if the register set in SET
3471 contained in insn INSN is used by any insn that precedes INSN in
3472 cyclic order starting from the loop entry point.
3474 We don't want to use INSN_LUID here because if we restrict INSN to those
3475 that have a valid INSN_LUID, it means we cannot move an invariant out
3476 from an inner loop past two loops. */
3479 loop_reg_used_before_p (loop, set, insn)
3480 const struct loop *loop;
3483 rtx reg = SET_DEST (set);
3486 /* Scan forward checking for register usage. If we hit INSN, we
3487 are done. Otherwise, if we hit LOOP->END, wrap around to LOOP->START. */
3488 for (p = loop->scan_start; p != insn; p = NEXT_INSN (p))
3490 if (INSN_P (p) && reg_overlap_mentioned_p (reg, PATTERN (p)))
3501 /* Information we collect about arrays that we might want to prefetch. */
3502 struct prefetch_info
3504 struct iv_class *class; /* Class this prefetch is based on. */
3505 struct induction *giv; /* GIV this prefetch is based on. */
3506 rtx base_address; /* Start prefetching from this address plus
3508 HOST_WIDE_INT index;
3509 HOST_WIDE_INT stride; /* Prefetch stride in bytes in each
3511 unsigned int bytes_accesed; /* Sum of sizes of all acceses to this
3512 prefetch area in one iteration. */
3513 unsigned int total_bytes; /* Total bytes loop will access in this block.
3514 This is set only for loops with known
3515 iteration counts and is 0xffffffff
3517 unsigned int write : 1; /* 1 for read/write prefetches. */
3518 unsigned int prefetch_in_loop : 1;
3519 /* 1 for those chosen for prefetching. */
3520 unsigned int prefetch_before_loop : 1;
3521 /* 1 for those chosen for prefetching. */
3524 /* Data used by check_store function. */
3525 struct check_store_data
3531 static void check_store PARAMS ((rtx, rtx, void *));
3532 static void emit_prefetch_instructions PARAMS ((struct loop *));
3533 static int rtx_equal_for_prefetch_p PARAMS ((rtx, rtx));
3535 /* Set mem_write when mem_address is found. Used as callback to
3538 check_store (x, pat, data)
3539 rtx x, pat ATTRIBUTE_UNUSED;
3542 struct check_store_data *d = (struct check_store_data *)data;
3544 if ((GET_CODE (x) == MEM) && rtx_equal_p (d->mem_address, XEXP (x, 0)))
3548 /* Like rtx_equal_p, but attempts to swap commutative operands. This is
3549 important to get some addresses combined. Later more sophisticated
3550 transformations can be added when necesary.
3552 ??? Same trick with swapping operand is done at several other places.
3553 It can be nice to develop some common way to handle this. */
3556 rtx_equal_for_prefetch_p (x, y)
3561 enum rtx_code code = GET_CODE (x);
3566 if (code != GET_CODE (y))
3569 code = GET_CODE (x);
3571 if (GET_RTX_CLASS (code) == 'c')
3573 return ((rtx_equal_for_prefetch_p (XEXP (x, 0), XEXP (y, 0))
3574 && rtx_equal_for_prefetch_p (XEXP (x, 1), XEXP (y, 1)))
3575 || (rtx_equal_for_prefetch_p (XEXP (x, 0), XEXP (y, 1))
3576 && rtx_equal_for_prefetch_p (XEXP (x, 1), XEXP (y, 0))));
3578 /* Compare the elements. If any pair of corresponding elements fails to
3579 match, return 0 for the whole thing. */
3581 fmt = GET_RTX_FORMAT (code);
3582 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3587 if (XWINT (x, i) != XWINT (y, i))
3592 if (XINT (x, i) != XINT (y, i))
3597 /* Two vectors must have the same length. */
3598 if (XVECLEN (x, i) != XVECLEN (y, i))
3601 /* And the corresponding elements must match. */
3602 for (j = 0; j < XVECLEN (x, i); j++)
3603 if (rtx_equal_for_prefetch_p (XVECEXP (x, i, j),
3604 XVECEXP (y, i, j)) == 0)
3609 if (rtx_equal_for_prefetch_p (XEXP (x, i), XEXP (y, i)) == 0)
3614 if (strcmp (XSTR (x, i), XSTR (y, i)))
3619 /* These are just backpointers, so they don't matter. */
3625 /* It is believed that rtx's at this level will never
3626 contain anything but integers and other rtx's,
3627 except for within LABEL_REFs and SYMBOL_REFs. */
3635 /* Remove constant addition value from the expression X (when present)
3638 static HOST_WIDE_INT
3639 remove_constant_addition (x)
3642 HOST_WIDE_INT addval = 0;
3645 if (GET_CODE (exp) == CONST)
3646 exp = XEXP (exp, 0);
3647 if (GET_CODE (exp) == CONST_INT)
3649 addval = INTVAL (exp);
3653 /* For plus expression recurse on ourself. */
3654 else if (GET_CODE (exp) == PLUS)
3656 addval += remove_constant_addition (&XEXP (exp, 0));
3657 addval += remove_constant_addition (&XEXP (exp, 1));
3659 /* In case our parameter was constant, remove extra zero from the
3661 if (XEXP (exp, 0) == const0_rtx)
3663 else if (XEXP (exp, 1) == const0_rtx)
3670 /* Attempt to identify accesses to arrays that are most likely to cause cache
3671 misses, and emit prefetch instructions a few prefetch blocks forward.
3673 To detect the arrays we use the GIV information that was collected by the
3674 strength reduction pass.
3676 The prefetch instructions are generated after the GIV information is done
3677 and before the strength reduction process. The new GIVs are injected into
3678 the strength reduction tables, so the prefetch addresses are optimized as
3681 GIVs are split into base address, stride, and constant addition values.
3682 GIVs with the same address, stride and close addition values are combined
3683 into a single prefetch. Also writes to GIVs are detected, so that prefetch
3684 for write instructions can be used for the block we write to, on machines
3685 that support write prefetches.
3687 Several heuristics are used to determine when to prefetch. They are
3688 controlled by defined symbols that can be overridden for each target. */
3691 emit_prefetch_instructions (loop)
3694 int num_prefetches = 0;
3695 int num_real_prefetches = 0;
3696 int num_real_write_prefetches = 0;
3699 struct iv_class *bl;
3700 struct induction *iv;
3701 struct prefetch_info info[MAX_PREFETCHES];
3702 struct loop_ivs *ivs = LOOP_IVS (loop);
3707 /* Consider only loops w/o calls. When a call is done, the loop is probably
3708 slow enough to read the memory. */
3709 if (PREFETCH_NO_CALL && LOOP_INFO (loop)->has_call)
3711 if (loop_dump_stream)
3712 fprintf (loop_dump_stream, "Prefetch: ignoring loop - has call.\n");
3717 if (PREFETCH_NO_LOW_LOOPCNT
3718 && LOOP_INFO (loop)->n_iterations
3719 && LOOP_INFO (loop)->n_iterations <= PREFETCH_LOW_LOOPCNT)
3721 if (loop_dump_stream)
3722 fprintf (loop_dump_stream,
3723 "Prefetch: ignoring loop - not enought iterations.\n");
3727 /* Search all induction variables and pick those interesting for the prefetch
3729 for (bl = ivs->list; bl; bl = bl->next)
3731 struct induction *biv = bl->biv, *biv1;
3736 /* Expect all BIVs to be executed in each iteration. This makes our
3737 analysis more conservative. */
3740 /* Discard non-constant additions that we can't handle well yet, and
3741 BIVs that are executed multiple times; such BIVs ought to be
3742 handled in the nested loop. We accept not_every_iteration BIVs,
3743 since these only result in larger strides and make our
3744 heuristics more conservative.
3745 ??? What does the last sentence mean? */
3746 if (GET_CODE (biv->add_val) != CONST_INT)
3748 if (loop_dump_stream)
3750 fprintf (loop_dump_stream,
3751 "Prefetch: biv %i ignored: non-constant addition at insn %i:",
3752 REGNO (biv->src_reg), INSN_UID (biv->insn));
3753 print_rtl (loop_dump_stream, biv->add_val);
3754 fprintf (loop_dump_stream, "\n");
3759 if (biv->maybe_multiple)
3761 if (loop_dump_stream)
3763 fprintf (loop_dump_stream,
3764 "Prefetch: biv %i ignored: maybe_multiple at insn %i:",
3765 REGNO (biv->src_reg), INSN_UID (biv->insn));
3766 print_rtl (loop_dump_stream, biv->add_val);
3767 fprintf (loop_dump_stream, "\n");
3772 basestride += INTVAL (biv1->add_val);
3773 biv1 = biv1->next_iv;
3776 if (biv1 || !basestride)
3779 for (iv = bl->giv; iv; iv = iv->next_iv)
3783 HOST_WIDE_INT index = 0;
3785 HOST_WIDE_INT stride;
3786 struct check_store_data d;
3787 int size = GET_MODE_SIZE (GET_MODE (iv));
3789 /* There are several reasons why an induction variable is not
3790 interesting to us. */
3791 if (iv->giv_type != DEST_ADDR
3792 /* We are interested only in constant stride memory references
3793 in order to be able to compute density easily. */
3794 || GET_CODE (iv->mult_val) != CONST_INT
3795 /* Don't handle reversed order prefetches, since they are usually
3796 ineffective. Later we may be able to reverse such BIVs. */
3797 || (PREFETCH_NO_REVERSE_ORDER
3798 && (stride = INTVAL (iv->mult_val) * basestride) < 0)
3799 /* Prefetching of accesses with such a extreme stride is probably
3800 not worthwhile, either. */
3801 || (PREFETCH_NO_EXTREME_STRIDE
3802 && stride > PREFETCH_EXTREME_STRIDE)
3803 /* Ignore GIVs with varying add values; we can't predict the
3804 value for the next iteration. */
3805 || !loop_invariant_p (loop, iv->add_val)
3806 /* Ignore GIVs in the nested loops; they ought to have been
3808 || iv->maybe_multiple)
3810 if (loop_dump_stream)
3811 fprintf (loop_dump_stream, "Prefetch: Ignoring giv at %i\n",
3812 INSN_UID (iv->insn));
3816 /* Determine the pointer to the basic array we are examining. It is
3817 the sum of the BIV's initial value and the GIV's add_val. */
3820 address = copy_rtx (iv->add_val);
3821 temp = copy_rtx (bl->initial_value);
3823 address = simplify_gen_binary (PLUS, Pmode, temp, address);
3824 index = remove_constant_addition (&address);
3828 d.mem_address = *iv->location;
3830 /* When the GIV is not always executed, we might be better off by
3831 not dirtying the cache pages. */
3832 if (PREFETCH_NOT_ALWAYS || iv->always_executed)
3833 note_stores (PATTERN (iv->insn), check_store, &d);
3835 /* Attempt to find another prefetch to the same array and see if we
3836 can merge this one. */
3837 for (i = 0; i < num_prefetches; i++)
3838 if (rtx_equal_for_prefetch_p (address, info[i].base_address)
3839 && stride == info[i].stride)
3841 /* In case both access same array (same location
3842 just with small difference in constant indexes), merge
3843 the prefetches. Just do the later and the earlier will
3844 get prefetched from previous iteration.
3845 4096 is artificial threshold. It should not be too small,
3846 but also not bigger than small portion of memory usually
3847 traversed by single loop. */
3848 if (index >= info[i].index && index - info[i].index < 4096)
3850 info[i].write |= d.mem_write;
3851 info[i].bytes_accesed += size;
3852 info[i].index = index;
3855 info[num_prefetches].base_address = address;
3860 if (index < info[i].index && info[i].index - index < 4096)
3862 info[i].write |= d.mem_write;
3863 info[i].bytes_accesed += size;
3869 /* Merging failed. */
3872 info[num_prefetches].giv = iv;
3873 info[num_prefetches].class = bl;
3874 info[num_prefetches].index = index;
3875 info[num_prefetches].stride = stride;
3876 info[num_prefetches].base_address = address;
3877 info[num_prefetches].write = d.mem_write;
3878 info[num_prefetches].bytes_accesed = size;
3880 if (num_prefetches >= MAX_PREFETCHES)
3882 if (loop_dump_stream)
3883 fprintf (loop_dump_stream,
3884 "Maximal number of prefetches exceeded.\n");
3891 for (i = 0; i < num_prefetches; i++)
3893 /* Attempt to calculate the number of bytes fetched by the loop.
3895 if (LOOP_INFO (loop)->n_iterations
3896 && ((unsigned HOST_WIDE_INT) (0xffffffff / info[i].stride)
3897 >= LOOP_INFO (loop)->n_iterations))
3898 info[i].total_bytes = info[i].stride * LOOP_INFO (loop)->n_iterations;
3900 info[i].total_bytes = 0xffffffff;
3902 /* Prefetch is worthwhile only when the loads/stores are dense. */
3903 if (PREFETCH_ONLY_DENSE_MEM
3904 && info[i].bytes_accesed * 256 / info[i].stride > PREFETCH_DENSE_MEM
3905 && (info[i].total_bytes / PREFETCH_BLOCK
3906 >= PREFETCH_BLOCKS_BEFORE_LOOP_MIN))
3908 info[i].prefetch_before_loop = 1;
3909 info[i].prefetch_in_loop
3910 = (info[i].total_bytes / PREFETCH_BLOCK
3911 > PREFETCH_BLOCKS_BEFORE_LOOP_MAX);
3914 info[i].prefetch_in_loop = 0, info[i].prefetch_before_loop = 0;
3916 if (info[i].prefetch_in_loop)
3918 num_real_prefetches += ((info[i].stride + PREFETCH_BLOCK - 1)
3921 num_real_write_prefetches
3922 += (info[i].stride + PREFETCH_BLOCK - 1) / PREFETCH_BLOCK;
3926 if (loop_dump_stream)
3928 for (i = 0; i < num_prefetches; i++)
3930 fprintf (loop_dump_stream, "Prefetch insn %i address: ",
3931 INSN_UID (info[i].giv->insn));
3932 print_rtl (loop_dump_stream, info[i].base_address);
3933 fprintf (loop_dump_stream, " Index: ");
3934 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, info[i].index);
3935 fprintf (loop_dump_stream, " stride: ");
3936 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, info[i].stride);
3937 fprintf (loop_dump_stream,
3938 " density: %i%% total_bytes: %u%sin loop: %s before: %s\n",
3939 (int) (info[i].bytes_accesed * 100 / info[i].stride),
3940 info[i].total_bytes,
3941 info[i].write ? " read/write " : " read only ",
3942 info[i].prefetch_in_loop ? "yes" : "no",
3943 info[i].prefetch_before_loop ? "yes" : "no");
3946 fprintf (loop_dump_stream, "Real prefetches needed: %i (write: %i)\n",
3947 num_real_prefetches, num_real_write_prefetches);
3950 if (!num_real_prefetches)
3953 ahead = SIMULTANEOUS_PREFETCHES / num_real_prefetches;
3958 for (i = 0; i < num_prefetches; i++)
3960 if (info[i].prefetch_in_loop)
3964 for (y = 0; y < ((info[i].stride + PREFETCH_BLOCK - 1)
3965 / PREFETCH_BLOCK); y++)
3967 rtx loc = copy_rtx (*info[i].giv->location);
3969 int bytes_ahead = PREFETCH_BLOCK * (ahead + y);
3970 rtx before_insn = info[i].giv->insn;
3971 rtx prev_insn = PREV_INSN (info[i].giv->insn);
3973 /* We can save some effort by offsetting the address on
3974 architectures with offsettable memory references. */
3975 if (offsettable_address_p (0, VOIDmode, loc))
3976 loc = plus_constant (loc, bytes_ahead);
3979 rtx reg = gen_reg_rtx (Pmode);
3980 loop_iv_add_mult_emit_before (loop, loc, const1_rtx,
3981 GEN_INT (bytes_ahead), reg,
3986 emit_insn_before (gen_prefetch (loc, GEN_INT (info[i].write),
3990 /* Check all insns emitted and record the new GIV
3992 insn = NEXT_INSN (prev_insn);
3993 while (insn != before_insn)
3995 insn = check_insn_for_givs (loop, insn,
3996 info[i].giv->always_executed,
3997 info[i].giv->maybe_multiple);
3998 insn = NEXT_INSN (insn);
4003 if (info[i].prefetch_before_loop)
4007 /* Emit INSNs before the loop to fetch the first cache lines. */
4009 (!info[i].prefetch_in_loop || y < ahead)
4010 && y * PREFETCH_BLOCK < (int) info[i].total_bytes; y ++)
4012 rtx reg = gen_reg_rtx (Pmode);
4013 rtx loop_start = loop->start;
4014 rtx add_val = simplify_gen_binary (PLUS, Pmode,
4015 info[i].giv->add_val,
4016 GEN_INT (y * PREFETCH_BLOCK));
4018 loop_iv_add_mult_emit_before (loop, info[i].class->initial_value,
4019 info[i].giv->mult_val,
4020 add_val, reg, 0, loop_start);
4021 emit_insn_before (gen_prefetch (reg, GEN_INT (info[i].write),
4031 /* A "basic induction variable" or biv is a pseudo reg that is set
4032 (within this loop) only by incrementing or decrementing it. */
4033 /* A "general induction variable" or giv is a pseudo reg whose
4034 value is a linear function of a biv. */
4036 /* Bivs are recognized by `basic_induction_var';
4037 Givs by `general_induction_var'. */
4039 /* Communication with routines called via `note_stores'. */
4041 static rtx note_insn;
4043 /* Dummy register to have non-zero DEST_REG for DEST_ADDR type givs. */
4045 static rtx addr_placeholder;
4047 /* ??? Unfinished optimizations, and possible future optimizations,
4048 for the strength reduction code. */
4050 /* ??? The interaction of biv elimination, and recognition of 'constant'
4051 bivs, may cause problems. */
4053 /* ??? Add heuristics so that DEST_ADDR strength reduction does not cause
4054 performance problems.
4056 Perhaps don't eliminate things that can be combined with an addressing
4057 mode. Find all givs that have the same biv, mult_val, and add_val;
4058 then for each giv, check to see if its only use dies in a following
4059 memory address. If so, generate a new memory address and check to see
4060 if it is valid. If it is valid, then store the modified memory address,
4061 otherwise, mark the giv as not done so that it will get its own iv. */
4063 /* ??? Could try to optimize branches when it is known that a biv is always
4066 /* ??? When replace a biv in a compare insn, we should replace with closest
4067 giv so that an optimized branch can still be recognized by the combiner,
4068 e.g. the VAX acb insn. */
4070 /* ??? Many of the checks involving uid_luid could be simplified if regscan
4071 was rerun in loop_optimize whenever a register was added or moved.
4072 Also, some of the optimizations could be a little less conservative. */
4074 /* Scan the loop body and call FNCALL for each insn. In the addition to the
4075 LOOP and INSN parameters pass MAYBE_MULTIPLE and NOT_EVERY_ITERATION to the
4078 NOT_EVERY_ITERATION if current insn is not executed at least once for every
4079 loop iteration except for the last one.
4081 MAYBE_MULTIPLE is 1 if current insn may be executed more than once for every
4085 for_each_insn_in_loop (loop, fncall)
4087 loop_insn_callback fncall;
4089 /* This is 1 if current insn is not executed at least once for every loop
4091 int not_every_iteration = 0;
4092 int maybe_multiple = 0;
4093 int past_loop_latch = 0;
4097 /* If loop_scan_start points to the loop exit test, we have to be wary of
4098 subversive use of gotos inside expression statements. */
4099 if (prev_nonnote_insn (loop->scan_start) != prev_nonnote_insn (loop->start))
4100 maybe_multiple = back_branch_in_range_p (loop, loop->scan_start);
4102 /* Scan through loop to find all possible bivs. */
4104 for (p = next_insn_in_loop (loop, loop->scan_start);
4106 p = next_insn_in_loop (loop, p))
4108 p = fncall (loop, p, not_every_iteration, maybe_multiple);
4110 /* Past CODE_LABEL, we get to insns that may be executed multiple
4111 times. The only way we can be sure that they can't is if every
4112 jump insn between here and the end of the loop either
4113 returns, exits the loop, is a jump to a location that is still
4114 behind the label, or is a jump to the loop start. */
4116 if (GET_CODE (p) == CODE_LABEL)
4124 insn = NEXT_INSN (insn);
4125 if (insn == loop->scan_start)
4127 if (insn == loop->end)
4133 if (insn == loop->scan_start)
4137 if (GET_CODE (insn) == JUMP_INSN
4138 && GET_CODE (PATTERN (insn)) != RETURN
4139 && (!any_condjump_p (insn)
4140 || (JUMP_LABEL (insn) != 0
4141 && JUMP_LABEL (insn) != loop->scan_start
4142 && !loop_insn_first_p (p, JUMP_LABEL (insn)))))
4150 /* Past a jump, we get to insns for which we can't count
4151 on whether they will be executed during each iteration. */
4152 /* This code appears twice in strength_reduce. There is also similar
4153 code in scan_loop. */
4154 if (GET_CODE (p) == JUMP_INSN
4155 /* If we enter the loop in the middle, and scan around to the
4156 beginning, don't set not_every_iteration for that.
4157 This can be any kind of jump, since we want to know if insns
4158 will be executed if the loop is executed. */
4159 && !(JUMP_LABEL (p) == loop->top
4160 && ((NEXT_INSN (NEXT_INSN (p)) == loop->end
4161 && any_uncondjump_p (p))
4162 || (NEXT_INSN (p) == loop->end && any_condjump_p (p)))))
4166 /* If this is a jump outside the loop, then it also doesn't
4167 matter. Check to see if the target of this branch is on the
4168 loop->exits_labels list. */
4170 for (label = loop->exit_labels; label; label = LABEL_NEXTREF (label))
4171 if (XEXP (label, 0) == JUMP_LABEL (p))
4175 not_every_iteration = 1;
4178 else if (GET_CODE (p) == NOTE)
4180 /* At the virtual top of a converted loop, insns are again known to
4181 be executed each iteration: logically, the loop begins here
4182 even though the exit code has been duplicated.
4184 Insns are also again known to be executed each iteration at
4185 the LOOP_CONT note. */
4186 if ((NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP
4187 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_CONT)
4189 not_every_iteration = 0;
4190 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
4192 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
4196 /* Note if we pass a loop latch. If we do, then we can not clear
4197 NOT_EVERY_ITERATION below when we pass the last CODE_LABEL in
4198 a loop since a jump before the last CODE_LABEL may have started
4199 a new loop iteration.
4201 Note that LOOP_TOP is only set for rotated loops and we need
4202 this check for all loops, so compare against the CODE_LABEL
4203 which immediately follows LOOP_START. */
4204 if (GET_CODE (p) == JUMP_INSN
4205 && JUMP_LABEL (p) == NEXT_INSN (loop->start))
4206 past_loop_latch = 1;
4208 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
4209 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
4210 or not an insn is known to be executed each iteration of the
4211 loop, whether or not any iterations are known to occur.
4213 Therefore, if we have just passed a label and have no more labels
4214 between here and the test insn of the loop, and we have not passed
4215 a jump to the top of the loop, then we know these insns will be
4216 executed each iteration. */
4218 if (not_every_iteration
4220 && GET_CODE (p) == CODE_LABEL
4221 && no_labels_between_p (p, loop->end)
4222 && loop_insn_first_p (p, loop->cont))
4223 not_every_iteration = 0;
4228 loop_bivs_find (loop)
4231 struct loop_regs *regs = LOOP_REGS (loop);
4232 struct loop_ivs *ivs = LOOP_IVS (loop);
4233 /* Temporary list pointers for traversing ivs->list. */
4234 struct iv_class *bl, **backbl;
4238 for_each_insn_in_loop (loop, check_insn_for_bivs);
4240 /* Scan ivs->list to remove all regs that proved not to be bivs.
4241 Make a sanity check against regs->n_times_set. */
4242 for (backbl = &ivs->list, bl = *backbl; bl; bl = bl->next)
4244 if (REG_IV_TYPE (ivs, bl->regno) != BASIC_INDUCT
4245 /* Above happens if register modified by subreg, etc. */
4246 /* Make sure it is not recognized as a basic induction var: */
4247 || regs->array[bl->regno].n_times_set != bl->biv_count
4248 /* If never incremented, it is invariant that we decided not to
4249 move. So leave it alone. */
4250 || ! bl->incremented)
4252 if (loop_dump_stream)
4253 fprintf (loop_dump_stream, "Biv %d: discarded, %s\n",
4255 (REG_IV_TYPE (ivs, bl->regno) != BASIC_INDUCT
4256 ? "not induction variable"
4257 : (! bl->incremented ? "never incremented"
4260 REG_IV_TYPE (ivs, bl->regno) = NOT_BASIC_INDUCT;
4267 if (loop_dump_stream)
4268 fprintf (loop_dump_stream, "Biv %d: verified\n", bl->regno);
4274 /* Determine how BIVS are initialised by looking through pre-header
4275 extended basic block. */
4277 loop_bivs_init_find (loop)
4280 struct loop_ivs *ivs = LOOP_IVS (loop);
4281 /* Temporary list pointers for traversing ivs->list. */
4282 struct iv_class *bl;
4286 /* Find initial value for each biv by searching backwards from loop_start,
4287 halting at first label. Also record any test condition. */
4290 for (p = loop->start; p && GET_CODE (p) != CODE_LABEL; p = PREV_INSN (p))
4296 if (GET_CODE (p) == CALL_INSN)
4300 note_stores (PATTERN (p), record_initial, ivs);
4302 /* Record any test of a biv that branches around the loop if no store
4303 between it and the start of loop. We only care about tests with
4304 constants and registers and only certain of those. */
4305 if (GET_CODE (p) == JUMP_INSN
4306 && JUMP_LABEL (p) != 0
4307 && next_real_insn (JUMP_LABEL (p)) == next_real_insn (loop->end)
4308 && (test = get_condition_for_loop (loop, p)) != 0
4309 && GET_CODE (XEXP (test, 0)) == REG
4310 && REGNO (XEXP (test, 0)) < max_reg_before_loop
4311 && (bl = REG_IV_CLASS (ivs, REGNO (XEXP (test, 0)))) != 0
4312 && valid_initial_value_p (XEXP (test, 1), p, call_seen, loop->start)
4313 && bl->init_insn == 0)
4315 /* If an NE test, we have an initial value! */
4316 if (GET_CODE (test) == NE)
4319 bl->init_set = gen_rtx_SET (VOIDmode,
4320 XEXP (test, 0), XEXP (test, 1));
4323 bl->initial_test = test;
4329 /* Look at the each biv and see if we can say anything better about its
4330 initial value from any initializing insns set up above. (This is done
4331 in two passes to avoid missing SETs in a PARALLEL.) */
4333 loop_bivs_check (loop)
4336 struct loop_ivs *ivs = LOOP_IVS (loop);
4337 /* Temporary list pointers for traversing ivs->list. */
4338 struct iv_class *bl;
4339 struct iv_class **backbl;
4341 for (backbl = &ivs->list; (bl = *backbl); backbl = &bl->next)
4346 if (! bl->init_insn)
4349 /* IF INIT_INSN has a REG_EQUAL or REG_EQUIV note and the value
4350 is a constant, use the value of that. */
4351 if (((note = find_reg_note (bl->init_insn, REG_EQUAL, 0)) != NULL
4352 && CONSTANT_P (XEXP (note, 0)))
4353 || ((note = find_reg_note (bl->init_insn, REG_EQUIV, 0)) != NULL
4354 && CONSTANT_P (XEXP (note, 0))))
4355 src = XEXP (note, 0);
4357 src = SET_SRC (bl->init_set);
4359 if (loop_dump_stream)
4360 fprintf (loop_dump_stream,
4361 "Biv %d: initialized at insn %d: initial value ",
4362 bl->regno, INSN_UID (bl->init_insn));
4364 if ((GET_MODE (src) == GET_MODE (regno_reg_rtx[bl->regno])
4365 || GET_MODE (src) == VOIDmode)
4366 && valid_initial_value_p (src, bl->init_insn,
4367 LOOP_INFO (loop)->pre_header_has_call,
4370 bl->initial_value = src;
4372 if (loop_dump_stream)
4374 print_simple_rtl (loop_dump_stream, src);
4375 fputc ('\n', loop_dump_stream);
4378 /* If we can't make it a giv,
4379 let biv keep initial value of "itself". */
4380 else if (loop_dump_stream)
4381 fprintf (loop_dump_stream, "is complex\n");
4386 /* Search the loop for general induction variables. */
4389 loop_givs_find (loop)
4392 for_each_insn_in_loop (loop, check_insn_for_givs);
4396 /* For each giv for which we still don't know whether or not it is
4397 replaceable, check to see if it is replaceable because its final value
4398 can be calculated. */
4401 loop_givs_check (loop)
4404 struct loop_ivs *ivs = LOOP_IVS (loop);
4405 struct iv_class *bl;
4407 for (bl = ivs->list; bl; bl = bl->next)
4409 struct induction *v;
4411 for (v = bl->giv; v; v = v->next_iv)
4412 if (! v->replaceable && ! v->not_replaceable)
4413 check_final_value (loop, v);
4418 /* Return non-zero if it is possible to eliminate the biv BL provided
4419 all givs are reduced. This is possible if either the reg is not
4420 used outside the loop, or we can compute what its final value will
4424 loop_biv_eliminable_p (loop, bl, threshold, insn_count)
4426 struct iv_class *bl;
4430 /* For architectures with a decrement_and_branch_until_zero insn,
4431 don't do this if we put a REG_NONNEG note on the endtest for this
4434 #ifdef HAVE_decrement_and_branch_until_zero
4437 if (loop_dump_stream)
4438 fprintf (loop_dump_stream,
4439 "Cannot eliminate nonneg biv %d.\n", bl->regno);
4444 /* Check that biv is used outside loop or if it has a final value.
4445 Compare against bl->init_insn rather than loop->start. We aren't
4446 concerned with any uses of the biv between init_insn and
4447 loop->start since these won't be affected by the value of the biv
4448 elsewhere in the function, so long as init_insn doesn't use the
4451 if ((REGNO_LAST_LUID (bl->regno) < INSN_LUID (loop->end)
4453 && INSN_UID (bl->init_insn) < max_uid_for_loop
4454 && REGNO_FIRST_LUID (bl->regno) >= INSN_LUID (bl->init_insn)
4455 && ! reg_mentioned_p (bl->biv->dest_reg, SET_SRC (bl->init_set)))
4456 || (bl->final_value = final_biv_value (loop, bl)))
4457 return maybe_eliminate_biv (loop, bl, 0, threshold, insn_count);
4459 if (loop_dump_stream)
4461 fprintf (loop_dump_stream,
4462 "Cannot eliminate biv %d.\n",
4464 fprintf (loop_dump_stream,
4465 "First use: insn %d, last use: insn %d.\n",
4466 REGNO_FIRST_UID (bl->regno),
4467 REGNO_LAST_UID (bl->regno));
4473 /* Reduce each giv of BL that we have decided to reduce. */
4476 loop_givs_reduce (loop, bl)
4478 struct iv_class *bl;
4480 struct induction *v;
4482 for (v = bl->giv; v; v = v->next_iv)
4484 struct induction *tv;
4485 if (! v->ignore && v->same == 0)
4487 int auto_inc_opt = 0;
4489 /* If the code for derived givs immediately below has already
4490 allocated a new_reg, we must keep it. */
4492 v->new_reg = gen_reg_rtx (v->mode);
4495 /* If the target has auto-increment addressing modes, and
4496 this is an address giv, then try to put the increment
4497 immediately after its use, so that flow can create an
4498 auto-increment addressing mode. */
4499 if (v->giv_type == DEST_ADDR && bl->biv_count == 1
4500 && bl->biv->always_executed && ! bl->biv->maybe_multiple
4501 /* We don't handle reversed biv's because bl->biv->insn
4502 does not have a valid INSN_LUID. */
4504 && v->always_executed && ! v->maybe_multiple
4505 && INSN_UID (v->insn) < max_uid_for_loop)
4507 /* If other giv's have been combined with this one, then
4508 this will work only if all uses of the other giv's occur
4509 before this giv's insn. This is difficult to check.
4511 We simplify this by looking for the common case where
4512 there is one DEST_REG giv, and this giv's insn is the
4513 last use of the dest_reg of that DEST_REG giv. If the
4514 increment occurs after the address giv, then we can
4515 perform the optimization. (Otherwise, the increment
4516 would have to go before other_giv, and we would not be
4517 able to combine it with the address giv to get an
4518 auto-inc address.) */
4519 if (v->combined_with)
4521 struct induction *other_giv = 0;
4523 for (tv = bl->giv; tv; tv = tv->next_iv)
4531 if (! tv && other_giv
4532 && REGNO (other_giv->dest_reg) < max_reg_before_loop
4533 && (REGNO_LAST_UID (REGNO (other_giv->dest_reg))
4534 == INSN_UID (v->insn))
4535 && INSN_LUID (v->insn) < INSN_LUID (bl->biv->insn))
4538 /* Check for case where increment is before the address
4539 giv. Do this test in "loop order". */
4540 else if ((INSN_LUID (v->insn) > INSN_LUID (bl->biv->insn)
4541 && (INSN_LUID (v->insn) < INSN_LUID (loop->scan_start)
4542 || (INSN_LUID (bl->biv->insn)
4543 > INSN_LUID (loop->scan_start))))
4544 || (INSN_LUID (v->insn) < INSN_LUID (loop->scan_start)
4545 && (INSN_LUID (loop->scan_start)
4546 < INSN_LUID (bl->biv->insn))))
4555 /* We can't put an insn immediately after one setting
4556 cc0, or immediately before one using cc0. */
4557 if ((auto_inc_opt == 1 && sets_cc0_p (PATTERN (v->insn)))
4558 || (auto_inc_opt == -1
4559 && (prev = prev_nonnote_insn (v->insn)) != 0
4561 && sets_cc0_p (PATTERN (prev))))
4567 v->auto_inc_opt = 1;
4571 /* For each place where the biv is incremented, add an insn
4572 to increment the new, reduced reg for the giv. */
4573 for (tv = bl->biv; tv; tv = tv->next_iv)
4578 insert_before = tv->insn;
4579 else if (auto_inc_opt == 1)
4580 insert_before = NEXT_INSN (v->insn);
4582 insert_before = v->insn;
4584 if (tv->mult_val == const1_rtx)
4585 loop_iv_add_mult_emit_before (loop, tv->add_val, v->mult_val,
4586 v->new_reg, v->new_reg,
4588 else /* tv->mult_val == const0_rtx */
4589 /* A multiply is acceptable here
4590 since this is presumed to be seldom executed. */
4591 loop_iv_add_mult_emit_before (loop, tv->add_val, v->mult_val,
4592 v->add_val, v->new_reg,
4596 /* Add code at loop start to initialize giv's reduced reg. */
4598 loop_iv_add_mult_hoist (loop,
4599 extend_value_for_giv (v, bl->initial_value),
4600 v->mult_val, v->add_val, v->new_reg);
4606 /* Check for givs whose first use is their definition and whose
4607 last use is the definition of another giv. If so, it is likely
4608 dead and should not be used to derive another giv nor to
4612 loop_givs_dead_check (loop, bl)
4613 struct loop *loop ATTRIBUTE_UNUSED;
4614 struct iv_class *bl;
4616 struct induction *v;
4618 for (v = bl->giv; v; v = v->next_iv)
4621 || (v->same && v->same->ignore))
4624 if (v->giv_type == DEST_REG
4625 && REGNO_FIRST_UID (REGNO (v->dest_reg)) == INSN_UID (v->insn))
4627 struct induction *v1;
4629 for (v1 = bl->giv; v1; v1 = v1->next_iv)
4630 if (REGNO_LAST_UID (REGNO (v->dest_reg)) == INSN_UID (v1->insn))
4638 loop_givs_rescan (loop, bl, reg_map)
4640 struct iv_class *bl;
4643 struct induction *v;
4645 for (v = bl->giv; v; v = v->next_iv)
4647 if (v->same && v->same->ignore)
4653 /* Update expression if this was combined, in case other giv was
4656 v->new_reg = replace_rtx (v->new_reg,
4657 v->same->dest_reg, v->same->new_reg);
4659 /* See if this register is known to be a pointer to something. If
4660 so, see if we can find the alignment. First see if there is a
4661 destination register that is a pointer. If so, this shares the
4662 alignment too. Next see if we can deduce anything from the
4663 computational information. If not, and this is a DEST_ADDR
4664 giv, at least we know that it's a pointer, though we don't know
4666 if (GET_CODE (v->new_reg) == REG
4667 && v->giv_type == DEST_REG
4668 && REG_POINTER (v->dest_reg))
4669 mark_reg_pointer (v->new_reg,
4670 REGNO_POINTER_ALIGN (REGNO (v->dest_reg)));
4671 else if (GET_CODE (v->new_reg) == REG
4672 && REG_POINTER (v->src_reg))
4674 unsigned int align = REGNO_POINTER_ALIGN (REGNO (v->src_reg));
4677 || GET_CODE (v->add_val) != CONST_INT
4678 || INTVAL (v->add_val) % (align / BITS_PER_UNIT) != 0)
4681 mark_reg_pointer (v->new_reg, align);
4683 else if (GET_CODE (v->new_reg) == REG
4684 && GET_CODE (v->add_val) == REG
4685 && REG_POINTER (v->add_val))
4687 unsigned int align = REGNO_POINTER_ALIGN (REGNO (v->add_val));
4689 if (align == 0 || GET_CODE (v->mult_val) != CONST_INT
4690 || INTVAL (v->mult_val) % (align / BITS_PER_UNIT) != 0)
4693 mark_reg_pointer (v->new_reg, align);
4695 else if (GET_CODE (v->new_reg) == REG && v->giv_type == DEST_ADDR)
4696 mark_reg_pointer (v->new_reg, 0);
4698 if (v->giv_type == DEST_ADDR)
4699 /* Store reduced reg as the address in the memref where we found
4701 validate_change (v->insn, v->location, v->new_reg, 0);
4702 else if (v->replaceable)
4704 reg_map[REGNO (v->dest_reg)] = v->new_reg;
4708 /* Not replaceable; emit an insn to set the original giv reg from
4709 the reduced giv, same as above. */
4710 loop_insn_emit_after (loop, 0, v->insn,
4711 gen_move_insn (v->dest_reg, v->new_reg));
4714 /* When a loop is reversed, givs which depend on the reversed
4715 biv, and which are live outside the loop, must be set to their
4716 correct final value. This insn is only needed if the giv is
4717 not replaceable. The correct final value is the same as the
4718 value that the giv starts the reversed loop with. */
4719 if (bl->reversed && ! v->replaceable)
4720 loop_iv_add_mult_sink (loop,
4721 extend_value_for_giv (v, bl->initial_value),
4722 v->mult_val, v->add_val, v->dest_reg);
4723 else if (v->final_value)
4724 loop_insn_sink_or_swim (loop,
4725 gen_move_insn (v->dest_reg, v->final_value));
4727 if (loop_dump_stream)
4729 fprintf (loop_dump_stream, "giv at %d reduced to ",
4730 INSN_UID (v->insn));
4731 print_simple_rtl (loop_dump_stream, v->new_reg);
4732 fprintf (loop_dump_stream, "\n");
4739 loop_giv_reduce_benefit (loop, bl, v, test_reg)
4740 struct loop *loop ATTRIBUTE_UNUSED;
4741 struct iv_class *bl;
4742 struct induction *v;
4748 benefit = v->benefit;
4749 PUT_MODE (test_reg, v->mode);
4750 add_cost = iv_add_mult_cost (bl->biv->add_val, v->mult_val,
4751 test_reg, test_reg);
4753 /* Reduce benefit if not replaceable, since we will insert a
4754 move-insn to replace the insn that calculates this giv. Don't do
4755 this unless the giv is a user variable, since it will often be
4756 marked non-replaceable because of the duplication of the exit
4757 code outside the loop. In such a case, the copies we insert are
4758 dead and will be deleted. So they don't have a cost. Similar
4759 situations exist. */
4760 /* ??? The new final_[bg]iv_value code does a much better job of
4761 finding replaceable giv's, and hence this code may no longer be
4763 if (! v->replaceable && ! bl->eliminable
4764 && REG_USERVAR_P (v->dest_reg))
4765 benefit -= copy_cost;
4767 /* Decrease the benefit to count the add-insns that we will insert
4768 to increment the reduced reg for the giv. ??? This can
4769 overestimate the run-time cost of the additional insns, e.g. if
4770 there are multiple basic blocks that increment the biv, but only
4771 one of these blocks is executed during each iteration. There is
4772 no good way to detect cases like this with the current structure
4773 of the loop optimizer. This code is more accurate for
4774 determining code size than run-time benefits. */
4775 benefit -= add_cost * bl->biv_count;
4777 /* Decide whether to strength-reduce this giv or to leave the code
4778 unchanged (recompute it from the biv each time it is used). This
4779 decision can be made independently for each giv. */
4782 /* Attempt to guess whether autoincrement will handle some of the
4783 new add insns; if so, increase BENEFIT (undo the subtraction of
4784 add_cost that was done above). */
4785 if (v->giv_type == DEST_ADDR
4786 /* Increasing the benefit is risky, since this is only a guess.
4787 Avoid increasing register pressure in cases where there would
4788 be no other benefit from reducing this giv. */
4790 && GET_CODE (v->mult_val) == CONST_INT)
4792 int size = GET_MODE_SIZE (GET_MODE (v->mem));
4794 if (HAVE_POST_INCREMENT
4795 && INTVAL (v->mult_val) == size)
4796 benefit += add_cost * bl->biv_count;
4797 else if (HAVE_PRE_INCREMENT
4798 && INTVAL (v->mult_val) == size)
4799 benefit += add_cost * bl->biv_count;
4800 else if (HAVE_POST_DECREMENT
4801 && -INTVAL (v->mult_val) == size)
4802 benefit += add_cost * bl->biv_count;
4803 else if (HAVE_PRE_DECREMENT
4804 && -INTVAL (v->mult_val) == size)
4805 benefit += add_cost * bl->biv_count;
4813 /* Free IV structures for LOOP. */
4816 loop_ivs_free (loop)
4819 struct loop_ivs *ivs = LOOP_IVS (loop);
4820 struct iv_class *iv = ivs->list;
4826 struct iv_class *next = iv->next;
4827 struct induction *induction;
4828 struct induction *next_induction;
4830 for (induction = iv->biv; induction; induction = next_induction)
4832 next_induction = induction->next_iv;
4835 for (induction = iv->giv; induction; induction = next_induction)
4837 next_induction = induction->next_iv;
4847 /* Perform strength reduction and induction variable elimination.
4849 Pseudo registers created during this function will be beyond the
4850 last valid index in several tables including
4851 REGS->ARRAY[I].N_TIMES_SET and REGNO_LAST_UID. This does not cause a
4852 problem here, because the added registers cannot be givs outside of
4853 their loop, and hence will never be reconsidered. But scan_loop
4854 must check regnos to make sure they are in bounds. */
4857 strength_reduce (loop, flags)
4861 struct loop_info *loop_info = LOOP_INFO (loop);
4862 struct loop_regs *regs = LOOP_REGS (loop);
4863 struct loop_ivs *ivs = LOOP_IVS (loop);
4865 /* Temporary list pointer for traversing ivs->list. */
4866 struct iv_class *bl;
4867 /* Ratio of extra register life span we can justify
4868 for saving an instruction. More if loop doesn't call subroutines
4869 since in that case saving an insn makes more difference
4870 and more registers are available. */
4871 /* ??? could set this to last value of threshold in move_movables */
4872 int threshold = (loop_info->has_call ? 1 : 2) * (3 + n_non_fixed_regs);
4873 /* Map of pseudo-register replacements. */
4874 rtx *reg_map = NULL;
4876 int unrolled_insn_copies = 0;
4877 rtx test_reg = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 1);
4878 int insn_count = count_insns_in_loop (loop);
4880 addr_placeholder = gen_reg_rtx (Pmode);
4882 ivs->n_regs = max_reg_before_loop;
4883 ivs->regs = (struct iv *) xcalloc (ivs->n_regs, sizeof (struct iv));
4885 /* Find all BIVs in loop. */
4886 loop_bivs_find (loop);
4888 /* Exit if there are no bivs. */
4891 /* Can still unroll the loop anyways, but indicate that there is no
4892 strength reduction info available. */
4893 if (flags & LOOP_UNROLL)
4894 unroll_loop (loop, insn_count, 0);
4896 loop_ivs_free (loop);
4900 /* Determine how BIVS are initialised by looking through pre-header
4901 extended basic block. */
4902 loop_bivs_init_find (loop);
4904 /* Look at the each biv and see if we can say anything better about its
4905 initial value from any initializing insns set up above. */
4906 loop_bivs_check (loop);
4908 /* Search the loop for general induction variables. */
4909 loop_givs_find (loop);
4911 /* Try to calculate and save the number of loop iterations. This is
4912 set to zero if the actual number can not be calculated. This must
4913 be called after all giv's have been identified, since otherwise it may
4914 fail if the iteration variable is a giv. */
4915 loop_iterations (loop);
4917 #ifdef HAVE_prefetch
4918 if (flags & LOOP_PREFETCH)
4919 emit_prefetch_instructions (loop);
4922 /* Now for each giv for which we still don't know whether or not it is
4923 replaceable, check to see if it is replaceable because its final value
4924 can be calculated. This must be done after loop_iterations is called,
4925 so that final_giv_value will work correctly. */
4926 loop_givs_check (loop);
4928 /* Try to prove that the loop counter variable (if any) is always
4929 nonnegative; if so, record that fact with a REG_NONNEG note
4930 so that "decrement and branch until zero" insn can be used. */
4931 check_dbra_loop (loop, insn_count);
4933 /* Create reg_map to hold substitutions for replaceable giv regs.
4934 Some givs might have been made from biv increments, so look at
4935 ivs->reg_iv_type for a suitable size. */
4936 reg_map_size = ivs->n_regs;
4937 reg_map = (rtx *) xcalloc (reg_map_size, sizeof (rtx));
4939 /* Examine each iv class for feasibility of strength reduction/induction
4940 variable elimination. */
4942 for (bl = ivs->list; bl; bl = bl->next)
4944 struct induction *v;
4947 /* Test whether it will be possible to eliminate this biv
4948 provided all givs are reduced. */
4949 bl->eliminable = loop_biv_eliminable_p (loop, bl, threshold, insn_count);
4951 /* This will be true at the end, if all givs which depend on this
4952 biv have been strength reduced.
4953 We can't (currently) eliminate the biv unless this is so. */
4954 bl->all_reduced = 1;
4956 /* Check each extension dependent giv in this class to see if its
4957 root biv is safe from wrapping in the interior mode. */
4958 check_ext_dependent_givs (bl, loop_info);
4960 /* Combine all giv's for this iv_class. */
4961 combine_givs (regs, bl);
4963 for (v = bl->giv; v; v = v->next_iv)
4965 struct induction *tv;
4967 if (v->ignore || v->same)
4970 benefit = loop_giv_reduce_benefit (loop, bl, v, test_reg);
4972 /* If an insn is not to be strength reduced, then set its ignore
4973 flag, and clear bl->all_reduced. */
4975 /* A giv that depends on a reversed biv must be reduced if it is
4976 used after the loop exit, otherwise, it would have the wrong
4977 value after the loop exit. To make it simple, just reduce all
4978 of such giv's whether or not we know they are used after the loop
4981 if (! flag_reduce_all_givs
4982 && v->lifetime * threshold * benefit < insn_count
4985 if (loop_dump_stream)
4986 fprintf (loop_dump_stream,
4987 "giv of insn %d not worth while, %d vs %d.\n",
4989 v->lifetime * threshold * benefit, insn_count);
4991 bl->all_reduced = 0;
4995 /* Check that we can increment the reduced giv without a
4996 multiply insn. If not, reject it. */
4998 for (tv = bl->biv; tv; tv = tv->next_iv)
4999 if (tv->mult_val == const1_rtx
5000 && ! product_cheap_p (tv->add_val, v->mult_val))
5002 if (loop_dump_stream)
5003 fprintf (loop_dump_stream,
5004 "giv of insn %d: would need a multiply.\n",
5005 INSN_UID (v->insn));
5007 bl->all_reduced = 0;
5013 /* Check for givs whose first use is their definition and whose
5014 last use is the definition of another giv. If so, it is likely
5015 dead and should not be used to derive another giv nor to
5017 loop_givs_dead_check (loop, bl);
5019 /* Reduce each giv that we decided to reduce. */
5020 loop_givs_reduce (loop, bl);
5022 /* Rescan all givs. If a giv is the same as a giv not reduced, mark it
5025 For each giv register that can be reduced now: if replaceable,
5026 substitute reduced reg wherever the old giv occurs;
5027 else add new move insn "giv_reg = reduced_reg". */
5028 loop_givs_rescan (loop, bl, reg_map);
5030 /* All the givs based on the biv bl have been reduced if they
5033 /* For each giv not marked as maybe dead that has been combined with a
5034 second giv, clear any "maybe dead" mark on that second giv.
5035 v->new_reg will either be or refer to the register of the giv it
5038 Doing this clearing avoids problems in biv elimination where
5039 a giv's new_reg is a complex value that can't be put in the
5040 insn but the giv combined with (with a reg as new_reg) is
5041 marked maybe_dead. Since the register will be used in either
5042 case, we'd prefer it be used from the simpler giv. */
5044 for (v = bl->giv; v; v = v->next_iv)
5045 if (! v->maybe_dead && v->same)
5046 v->same->maybe_dead = 0;
5048 /* Try to eliminate the biv, if it is a candidate.
5049 This won't work if ! bl->all_reduced,
5050 since the givs we planned to use might not have been reduced.
5052 We have to be careful that we didn't initially think we could
5053 eliminate this biv because of a giv that we now think may be
5054 dead and shouldn't be used as a biv replacement.
5056 Also, there is the possibility that we may have a giv that looks
5057 like it can be used to eliminate a biv, but the resulting insn
5058 isn't valid. This can happen, for example, on the 88k, where a
5059 JUMP_INSN can compare a register only with zero. Attempts to
5060 replace it with a compare with a constant will fail.
5062 Note that in cases where this call fails, we may have replaced some
5063 of the occurrences of the biv with a giv, but no harm was done in
5064 doing so in the rare cases where it can occur. */
5066 if (bl->all_reduced == 1 && bl->eliminable
5067 && maybe_eliminate_biv (loop, bl, 1, threshold, insn_count))
5069 /* ?? If we created a new test to bypass the loop entirely,
5070 or otherwise drop straight in, based on this test, then
5071 we might want to rewrite it also. This way some later
5072 pass has more hope of removing the initialization of this
5075 /* If final_value != 0, then the biv may be used after loop end
5076 and we must emit an insn to set it just in case.
5078 Reversed bivs already have an insn after the loop setting their
5079 value, so we don't need another one. We can't calculate the
5080 proper final value for such a biv here anyways. */
5081 if (bl->final_value && ! bl->reversed)
5082 loop_insn_sink_or_swim (loop, gen_move_insn
5083 (bl->biv->dest_reg, bl->final_value));
5085 if (loop_dump_stream)
5086 fprintf (loop_dump_stream, "Reg %d: biv eliminated\n",
5091 /* Go through all the instructions in the loop, making all the
5092 register substitutions scheduled in REG_MAP. */
5094 for (p = loop->start; p != loop->end; p = NEXT_INSN (p))
5095 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
5096 || GET_CODE (p) == CALL_INSN)
5098 replace_regs (PATTERN (p), reg_map, reg_map_size, 0);
5099 replace_regs (REG_NOTES (p), reg_map, reg_map_size, 0);
5103 if (loop_info->n_iterations > 0)
5105 /* When we completely unroll a loop we will likely not need the increment
5106 of the loop BIV and we will not need the conditional branch at the
5108 unrolled_insn_copies = insn_count - 2;
5111 /* When we completely unroll a loop on a HAVE_cc0 machine we will not
5112 need the comparison before the conditional branch at the end of the
5114 unrolled_insn_copies -= 1;
5117 /* We'll need one copy for each loop iteration. */
5118 unrolled_insn_copies *= loop_info->n_iterations;
5120 /* A little slop to account for the ability to remove initialization
5121 code, better CSE, and other secondary benefits of completely
5122 unrolling some loops. */
5123 unrolled_insn_copies -= 1;
5125 /* Clamp the value. */
5126 if (unrolled_insn_copies < 0)
5127 unrolled_insn_copies = 0;
5130 /* Unroll loops from within strength reduction so that we can use the
5131 induction variable information that strength_reduce has already
5132 collected. Always unroll loops that would be as small or smaller
5133 unrolled than when rolled. */
5134 if ((flags & LOOP_UNROLL)
5135 || (loop_info->n_iterations > 0
5136 && unrolled_insn_copies <= insn_count))
5137 unroll_loop (loop, insn_count, 1);
5139 #ifdef HAVE_doloop_end
5140 if (HAVE_doloop_end && (flags & LOOP_BCT) && flag_branch_on_count_reg)
5141 doloop_optimize (loop);
5142 #endif /* HAVE_doloop_end */
5144 /* In case number of iterations is known, drop branch prediction note
5145 in the branch. Do that only in second loop pass, as loop unrolling
5146 may change the number of iterations performed. */
5147 if ((flags & LOOP_BCT)
5148 && loop_info->n_iterations / loop_info->unroll_number > 1)
5150 int n = loop_info->n_iterations / loop_info->unroll_number;
5151 predict_insn (PREV_INSN (loop->end),
5152 PRED_LOOP_ITERATIONS,
5153 REG_BR_PROB_BASE - REG_BR_PROB_BASE / n);
5156 if (loop_dump_stream)
5157 fprintf (loop_dump_stream, "\n");
5159 loop_ivs_free (loop);
5164 /*Record all basic induction variables calculated in the insn. */
5166 check_insn_for_bivs (loop, p, not_every_iteration, maybe_multiple)
5169 int not_every_iteration;
5172 struct loop_ivs *ivs = LOOP_IVS (loop);
5179 if (GET_CODE (p) == INSN
5180 && (set = single_set (p))
5181 && GET_CODE (SET_DEST (set)) == REG)
5183 dest_reg = SET_DEST (set);
5184 if (REGNO (dest_reg) < max_reg_before_loop
5185 && REGNO (dest_reg) >= FIRST_PSEUDO_REGISTER
5186 && REG_IV_TYPE (ivs, REGNO (dest_reg)) != NOT_BASIC_INDUCT)
5188 if (basic_induction_var (loop, SET_SRC (set),
5189 GET_MODE (SET_SRC (set)),
5190 dest_reg, p, &inc_val, &mult_val,
5193 /* It is a possible basic induction variable.
5194 Create and initialize an induction structure for it. */
5197 = (struct induction *) xmalloc (sizeof (struct induction));
5199 record_biv (loop, v, p, dest_reg, inc_val, mult_val, location,
5200 not_every_iteration, maybe_multiple);
5201 REG_IV_TYPE (ivs, REGNO (dest_reg)) = BASIC_INDUCT;
5203 else if (REGNO (dest_reg) < ivs->n_regs)
5204 REG_IV_TYPE (ivs, REGNO (dest_reg)) = NOT_BASIC_INDUCT;
5210 /* Record all givs calculated in the insn.
5211 A register is a giv if: it is only set once, it is a function of a
5212 biv and a constant (or invariant), and it is not a biv. */
5214 check_insn_for_givs (loop, p, not_every_iteration, maybe_multiple)
5217 int not_every_iteration;
5220 struct loop_regs *regs = LOOP_REGS (loop);
5223 /* Look for a general induction variable in a register. */
5224 if (GET_CODE (p) == INSN
5225 && (set = single_set (p))
5226 && GET_CODE (SET_DEST (set)) == REG
5227 && ! regs->array[REGNO (SET_DEST (set))].may_not_optimize)
5236 rtx last_consec_insn;
5238 dest_reg = SET_DEST (set);
5239 if (REGNO (dest_reg) < FIRST_PSEUDO_REGISTER)
5242 if (/* SET_SRC is a giv. */
5243 (general_induction_var (loop, SET_SRC (set), &src_reg, &add_val,
5244 &mult_val, &ext_val, 0, &benefit, VOIDmode)
5245 /* Equivalent expression is a giv. */
5246 || ((regnote = find_reg_note (p, REG_EQUAL, NULL_RTX))
5247 && general_induction_var (loop, XEXP (regnote, 0), &src_reg,
5248 &add_val, &mult_val, &ext_val, 0,
5249 &benefit, VOIDmode)))
5250 /* Don't try to handle any regs made by loop optimization.
5251 We have nothing on them in regno_first_uid, etc. */
5252 && REGNO (dest_reg) < max_reg_before_loop
5253 /* Don't recognize a BASIC_INDUCT_VAR here. */
5254 && dest_reg != src_reg
5255 /* This must be the only place where the register is set. */
5256 && (regs->array[REGNO (dest_reg)].n_times_set == 1
5257 /* or all sets must be consecutive and make a giv. */
5258 || (benefit = consec_sets_giv (loop, benefit, p,
5260 &add_val, &mult_val, &ext_val,
5261 &last_consec_insn))))
5264 = (struct induction *) xmalloc (sizeof (struct induction));
5266 /* If this is a library call, increase benefit. */
5267 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
5268 benefit += libcall_benefit (p);
5270 /* Skip the consecutive insns, if there are any. */
5271 if (regs->array[REGNO (dest_reg)].n_times_set != 1)
5272 p = last_consec_insn;
5274 record_giv (loop, v, p, src_reg, dest_reg, mult_val, add_val,
5275 ext_val, benefit, DEST_REG, not_every_iteration,
5276 maybe_multiple, (rtx*)0);
5281 #ifndef DONT_REDUCE_ADDR
5282 /* Look for givs which are memory addresses. */
5283 /* This resulted in worse code on a VAX 8600. I wonder if it
5285 if (GET_CODE (p) == INSN)
5286 find_mem_givs (loop, PATTERN (p), p, not_every_iteration,
5290 /* Update the status of whether giv can derive other givs. This can
5291 change when we pass a label or an insn that updates a biv. */
5292 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
5293 || GET_CODE (p) == CODE_LABEL)
5294 update_giv_derive (loop, p);
5298 /* Return 1 if X is a valid source for an initial value (or as value being
5299 compared against in an initial test).
5301 X must be either a register or constant and must not be clobbered between
5302 the current insn and the start of the loop.
5304 INSN is the insn containing X. */
5307 valid_initial_value_p (x, insn, call_seen, loop_start)
5316 /* Only consider pseudos we know about initialized in insns whose luids
5318 if (GET_CODE (x) != REG
5319 || REGNO (x) >= max_reg_before_loop)
5322 /* Don't use call-clobbered registers across a call which clobbers it. On
5323 some machines, don't use any hard registers at all. */
5324 if (REGNO (x) < FIRST_PSEUDO_REGISTER
5325 && (SMALL_REGISTER_CLASSES
5326 || (call_used_regs[REGNO (x)] && call_seen)))
5329 /* Don't use registers that have been clobbered before the start of the
5331 if (reg_set_between_p (x, insn, loop_start))
5337 /* Scan X for memory refs and check each memory address
5338 as a possible giv. INSN is the insn whose pattern X comes from.
5339 NOT_EVERY_ITERATION is 1 if the insn might not be executed during
5340 every loop iteration. MAYBE_MULTIPLE is 1 if the insn might be executed
5341 more thanonce in each loop iteration. */
5344 find_mem_givs (loop, x, insn, not_every_iteration, maybe_multiple)
5345 const struct loop *loop;
5348 int not_every_iteration, maybe_multiple;
5357 code = GET_CODE (x);
5382 /* This code used to disable creating GIVs with mult_val == 1 and
5383 add_val == 0. However, this leads to lost optimizations when
5384 it comes time to combine a set of related DEST_ADDR GIVs, since
5385 this one would not be seen. */
5387 if (general_induction_var (loop, XEXP (x, 0), &src_reg, &add_val,
5388 &mult_val, &ext_val, 1, &benefit,
5391 /* Found one; record it. */
5393 = (struct induction *) xmalloc (sizeof (struct induction));
5395 record_giv (loop, v, insn, src_reg, addr_placeholder, mult_val,
5396 add_val, ext_val, benefit, DEST_ADDR,
5397 not_every_iteration, maybe_multiple, &XEXP (x, 0));
5408 /* Recursively scan the subexpressions for other mem refs. */
5410 fmt = GET_RTX_FORMAT (code);
5411 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5413 find_mem_givs (loop, XEXP (x, i), insn, not_every_iteration,
5415 else if (fmt[i] == 'E')
5416 for (j = 0; j < XVECLEN (x, i); j++)
5417 find_mem_givs (loop, XVECEXP (x, i, j), insn, not_every_iteration,
5421 /* Fill in the data about one biv update.
5422 V is the `struct induction' in which we record the biv. (It is
5423 allocated by the caller, with alloca.)
5424 INSN is the insn that sets it.
5425 DEST_REG is the biv's reg.
5427 MULT_VAL is const1_rtx if the biv is being incremented here, in which case
5428 INC_VAL is the increment. Otherwise, MULT_VAL is const0_rtx and the biv is
5429 being set to INC_VAL.
5431 NOT_EVERY_ITERATION is nonzero if this biv update is not know to be
5432 executed every iteration; MAYBE_MULTIPLE is nonzero if this biv update
5433 can be executed more than once per iteration. If MAYBE_MULTIPLE
5434 and NOT_EVERY_ITERATION are both zero, we know that the biv update is
5435 executed exactly once per iteration. */
5438 record_biv (loop, v, insn, dest_reg, inc_val, mult_val, location,
5439 not_every_iteration, maybe_multiple)
5441 struct induction *v;
5447 int not_every_iteration;
5450 struct loop_ivs *ivs = LOOP_IVS (loop);
5451 struct iv_class *bl;
5454 v->src_reg = dest_reg;
5455 v->dest_reg = dest_reg;
5456 v->mult_val = mult_val;
5457 v->add_val = inc_val;
5458 v->ext_dependent = NULL_RTX;
5459 v->location = location;
5460 v->mode = GET_MODE (dest_reg);
5461 v->always_computable = ! not_every_iteration;
5462 v->always_executed = ! not_every_iteration;
5463 v->maybe_multiple = maybe_multiple;
5465 /* Add this to the reg's iv_class, creating a class
5466 if this is the first incrementation of the reg. */
5468 bl = REG_IV_CLASS (ivs, REGNO (dest_reg));
5471 /* Create and initialize new iv_class. */
5473 bl = (struct iv_class *) xmalloc (sizeof (struct iv_class));
5475 bl->regno = REGNO (dest_reg);
5481 /* Set initial value to the reg itself. */
5482 bl->initial_value = dest_reg;
5483 bl->final_value = 0;
5484 /* We haven't seen the initializing insn yet */
5487 bl->initial_test = 0;
5488 bl->incremented = 0;
5492 bl->total_benefit = 0;
5494 /* Add this class to ivs->list. */
5495 bl->next = ivs->list;
5498 /* Put it in the array of biv register classes. */
5499 REG_IV_CLASS (ivs, REGNO (dest_reg)) = bl;
5502 /* Update IV_CLASS entry for this biv. */
5503 v->next_iv = bl->biv;
5506 if (mult_val == const1_rtx)
5507 bl->incremented = 1;
5509 if (loop_dump_stream)
5510 loop_biv_dump (v, loop_dump_stream, 0);
5513 /* Fill in the data about one giv.
5514 V is the `struct induction' in which we record the giv. (It is
5515 allocated by the caller, with alloca.)
5516 INSN is the insn that sets it.
5517 BENEFIT estimates the savings from deleting this insn.
5518 TYPE is DEST_REG or DEST_ADDR; it says whether the giv is computed
5519 into a register or is used as a memory address.
5521 SRC_REG is the biv reg which the giv is computed from.
5522 DEST_REG is the giv's reg (if the giv is stored in a reg).
5523 MULT_VAL and ADD_VAL are the coefficients used to compute the giv.
5524 LOCATION points to the place where this giv's value appears in INSN. */
5527 record_giv (loop, v, insn, src_reg, dest_reg, mult_val, add_val, ext_val,
5528 benefit, type, not_every_iteration, maybe_multiple, location)
5529 const struct loop *loop;
5530 struct induction *v;
5534 rtx mult_val, add_val, ext_val;
5537 int not_every_iteration, maybe_multiple;
5540 struct loop_ivs *ivs = LOOP_IVS (loop);
5541 struct induction *b;
5542 struct iv_class *bl;
5543 rtx set = single_set (insn);
5546 /* Attempt to prove constantness of the values. Don't let simplity_rtx
5547 undo the MULT canonicalization that we performed earlier. */
5548 temp = simplify_rtx (add_val);
5550 && ! (GET_CODE (add_val) == MULT
5551 && GET_CODE (temp) == ASHIFT))
5555 v->src_reg = src_reg;
5557 v->dest_reg = dest_reg;
5558 v->mult_val = mult_val;
5559 v->add_val = add_val;
5560 v->ext_dependent = ext_val;
5561 v->benefit = benefit;
5562 v->location = location;
5564 v->combined_with = 0;
5565 v->maybe_multiple = maybe_multiple;
5567 v->derive_adjustment = 0;
5573 v->auto_inc_opt = 0;
5577 /* The v->always_computable field is used in update_giv_derive, to
5578 determine whether a giv can be used to derive another giv. For a
5579 DEST_REG giv, INSN computes a new value for the giv, so its value
5580 isn't computable if INSN insn't executed every iteration.
5581 However, for a DEST_ADDR giv, INSN merely uses the value of the giv;
5582 it does not compute a new value. Hence the value is always computable
5583 regardless of whether INSN is executed each iteration. */
5585 if (type == DEST_ADDR)
5586 v->always_computable = 1;
5588 v->always_computable = ! not_every_iteration;
5590 v->always_executed = ! not_every_iteration;
5592 if (type == DEST_ADDR)
5594 v->mode = GET_MODE (*location);
5597 else /* type == DEST_REG */
5599 v->mode = GET_MODE (SET_DEST (set));
5601 v->lifetime = LOOP_REG_LIFETIME (loop, REGNO (dest_reg));
5603 /* If the lifetime is zero, it means that this register is
5604 really a dead store. So mark this as a giv that can be
5605 ignored. This will not prevent the biv from being eliminated. */
5606 if (v->lifetime == 0)
5609 REG_IV_TYPE (ivs, REGNO (dest_reg)) = GENERAL_INDUCT;
5610 REG_IV_INFO (ivs, REGNO (dest_reg)) = v;
5613 /* Add the giv to the class of givs computed from one biv. */
5615 bl = REG_IV_CLASS (ivs, REGNO (src_reg));
5618 v->next_iv = bl->giv;
5620 /* Don't count DEST_ADDR. This is supposed to count the number of
5621 insns that calculate givs. */
5622 if (type == DEST_REG)
5624 bl->total_benefit += benefit;
5627 /* Fatal error, biv missing for this giv? */
5630 if (type == DEST_ADDR)
5634 /* The giv can be replaced outright by the reduced register only if all
5635 of the following conditions are true:
5636 - the insn that sets the giv is always executed on any iteration
5637 on which the giv is used at all
5638 (there are two ways to deduce this:
5639 either the insn is executed on every iteration,
5640 or all uses follow that insn in the same basic block),
5641 - the giv is not used outside the loop
5642 - no assignments to the biv occur during the giv's lifetime. */
5644 if (REGNO_FIRST_UID (REGNO (dest_reg)) == INSN_UID (insn)
5645 /* Previous line always fails if INSN was moved by loop opt. */
5646 && REGNO_LAST_LUID (REGNO (dest_reg))
5647 < INSN_LUID (loop->end)
5648 && (! not_every_iteration
5649 || last_use_this_basic_block (dest_reg, insn)))
5651 /* Now check that there are no assignments to the biv within the
5652 giv's lifetime. This requires two separate checks. */
5654 /* Check each biv update, and fail if any are between the first
5655 and last use of the giv.
5657 If this loop contains an inner loop that was unrolled, then
5658 the insn modifying the biv may have been emitted by the loop
5659 unrolling code, and hence does not have a valid luid. Just
5660 mark the biv as not replaceable in this case. It is not very
5661 useful as a biv, because it is used in two different loops.
5662 It is very unlikely that we would be able to optimize the giv
5663 using this biv anyways. */
5666 for (b = bl->biv; b; b = b->next_iv)
5668 if (INSN_UID (b->insn) >= max_uid_for_loop
5669 || ((INSN_LUID (b->insn)
5670 >= REGNO_FIRST_LUID (REGNO (dest_reg)))
5671 && (INSN_LUID (b->insn)
5672 <= REGNO_LAST_LUID (REGNO (dest_reg)))))
5675 v->not_replaceable = 1;
5680 /* If there are any backwards branches that go from after the
5681 biv update to before it, then this giv is not replaceable. */
5683 for (b = bl->biv; b; b = b->next_iv)
5684 if (back_branch_in_range_p (loop, b->insn))
5687 v->not_replaceable = 1;
5693 /* May still be replaceable, we don't have enough info here to
5696 v->not_replaceable = 0;
5700 /* Record whether the add_val contains a const_int, for later use by
5705 v->no_const_addval = 1;
5706 if (tem == const0_rtx)
5708 else if (CONSTANT_P (add_val))
5709 v->no_const_addval = 0;
5710 if (GET_CODE (tem) == PLUS)
5714 if (GET_CODE (XEXP (tem, 0)) == PLUS)
5715 tem = XEXP (tem, 0);
5716 else if (GET_CODE (XEXP (tem, 1)) == PLUS)
5717 tem = XEXP (tem, 1);
5721 if (CONSTANT_P (XEXP (tem, 1)))
5722 v->no_const_addval = 0;
5726 if (loop_dump_stream)
5727 loop_giv_dump (v, loop_dump_stream, 0);
5730 /* All this does is determine whether a giv can be made replaceable because
5731 its final value can be calculated. This code can not be part of record_giv
5732 above, because final_giv_value requires that the number of loop iterations
5733 be known, and that can not be accurately calculated until after all givs
5734 have been identified. */
5737 check_final_value (loop, v)
5738 const struct loop *loop;
5739 struct induction *v;
5741 struct loop_ivs *ivs = LOOP_IVS (loop);
5742 struct iv_class *bl;
5743 rtx final_value = 0;
5745 bl = REG_IV_CLASS (ivs, REGNO (v->src_reg));
5747 /* DEST_ADDR givs will never reach here, because they are always marked
5748 replaceable above in record_giv. */
5750 /* The giv can be replaced outright by the reduced register only if all
5751 of the following conditions are true:
5752 - the insn that sets the giv is always executed on any iteration
5753 on which the giv is used at all
5754 (there are two ways to deduce this:
5755 either the insn is executed on every iteration,
5756 or all uses follow that insn in the same basic block),
5757 - its final value can be calculated (this condition is different
5758 than the one above in record_giv)
5759 - it's not used before the it's set
5760 - no assignments to the biv occur during the giv's lifetime. */
5763 /* This is only called now when replaceable is known to be false. */
5764 /* Clear replaceable, so that it won't confuse final_giv_value. */
5768 if ((final_value = final_giv_value (loop, v))
5769 && (v->always_computable || last_use_this_basic_block (v->dest_reg, v->insn)))
5771 int biv_increment_seen = 0, before_giv_insn = 0;
5777 /* When trying to determine whether or not a biv increment occurs
5778 during the lifetime of the giv, we can ignore uses of the variable
5779 outside the loop because final_value is true. Hence we can not
5780 use regno_last_uid and regno_first_uid as above in record_giv. */
5782 /* Search the loop to determine whether any assignments to the
5783 biv occur during the giv's lifetime. Start with the insn
5784 that sets the giv, and search around the loop until we come
5785 back to that insn again.
5787 Also fail if there is a jump within the giv's lifetime that jumps
5788 to somewhere outside the lifetime but still within the loop. This
5789 catches spaghetti code where the execution order is not linear, and
5790 hence the above test fails. Here we assume that the giv lifetime
5791 does not extend from one iteration of the loop to the next, so as
5792 to make the test easier. Since the lifetime isn't known yet,
5793 this requires two loops. See also record_giv above. */
5795 last_giv_use = v->insn;
5802 before_giv_insn = 1;
5803 p = NEXT_INSN (loop->start);
5808 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
5809 || GET_CODE (p) == CALL_INSN)
5811 /* It is possible for the BIV increment to use the GIV if we
5812 have a cycle. Thus we must be sure to check each insn for
5813 both BIV and GIV uses, and we must check for BIV uses
5816 if (! biv_increment_seen
5817 && reg_set_p (v->src_reg, PATTERN (p)))
5818 biv_increment_seen = 1;
5820 if (reg_mentioned_p (v->dest_reg, PATTERN (p)))
5822 if (biv_increment_seen || before_giv_insn)
5825 v->not_replaceable = 1;
5833 /* Now that the lifetime of the giv is known, check for branches
5834 from within the lifetime to outside the lifetime if it is still
5844 p = NEXT_INSN (loop->start);
5845 if (p == last_giv_use)
5848 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p)
5849 && LABEL_NAME (JUMP_LABEL (p))
5850 && ((loop_insn_first_p (JUMP_LABEL (p), v->insn)
5851 && loop_insn_first_p (loop->start, JUMP_LABEL (p)))
5852 || (loop_insn_first_p (last_giv_use, JUMP_LABEL (p))
5853 && loop_insn_first_p (JUMP_LABEL (p), loop->end))))
5856 v->not_replaceable = 1;
5858 if (loop_dump_stream)
5859 fprintf (loop_dump_stream,
5860 "Found branch outside giv lifetime.\n");
5867 /* If it is replaceable, then save the final value. */
5869 v->final_value = final_value;
5872 if (loop_dump_stream && v->replaceable)
5873 fprintf (loop_dump_stream, "Insn %d: giv reg %d final_value replaceable\n",
5874 INSN_UID (v->insn), REGNO (v->dest_reg));
5877 /* Update the status of whether a giv can derive other givs.
5879 We need to do something special if there is or may be an update to the biv
5880 between the time the giv is defined and the time it is used to derive
5883 In addition, a giv that is only conditionally set is not allowed to
5884 derive another giv once a label has been passed.
5886 The cases we look at are when a label or an update to a biv is passed. */
5889 update_giv_derive (loop, p)
5890 const struct loop *loop;
5893 struct loop_ivs *ivs = LOOP_IVS (loop);
5894 struct iv_class *bl;
5895 struct induction *biv, *giv;
5899 /* Search all IV classes, then all bivs, and finally all givs.
5901 There are three cases we are concerned with. First we have the situation
5902 of a giv that is only updated conditionally. In that case, it may not
5903 derive any givs after a label is passed.
5905 The second case is when a biv update occurs, or may occur, after the
5906 definition of a giv. For certain biv updates (see below) that are
5907 known to occur between the giv definition and use, we can adjust the
5908 giv definition. For others, or when the biv update is conditional,
5909 we must prevent the giv from deriving any other givs. There are two
5910 sub-cases within this case.
5912 If this is a label, we are concerned with any biv update that is done
5913 conditionally, since it may be done after the giv is defined followed by
5914 a branch here (actually, we need to pass both a jump and a label, but
5915 this extra tracking doesn't seem worth it).
5917 If this is a jump, we are concerned about any biv update that may be
5918 executed multiple times. We are actually only concerned about
5919 backward jumps, but it is probably not worth performing the test
5920 on the jump again here.
5922 If this is a biv update, we must adjust the giv status to show that a
5923 subsequent biv update was performed. If this adjustment cannot be done,
5924 the giv cannot derive further givs. */
5926 for (bl = ivs->list; bl; bl = bl->next)
5927 for (biv = bl->biv; biv; biv = biv->next_iv)
5928 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN
5931 for (giv = bl->giv; giv; giv = giv->next_iv)
5933 /* If cant_derive is already true, there is no point in
5934 checking all of these conditions again. */
5935 if (giv->cant_derive)
5938 /* If this giv is conditionally set and we have passed a label,
5939 it cannot derive anything. */
5940 if (GET_CODE (p) == CODE_LABEL && ! giv->always_computable)
5941 giv->cant_derive = 1;
5943 /* Skip givs that have mult_val == 0, since
5944 they are really invariants. Also skip those that are
5945 replaceable, since we know their lifetime doesn't contain
5947 else if (giv->mult_val == const0_rtx || giv->replaceable)
5950 /* The only way we can allow this giv to derive another
5951 is if this is a biv increment and we can form the product
5952 of biv->add_val and giv->mult_val. In this case, we will
5953 be able to compute a compensation. */
5954 else if (biv->insn == p)
5959 if (biv->mult_val == const1_rtx)
5960 tem = simplify_giv_expr (loop,
5961 gen_rtx_MULT (giv->mode,
5964 &ext_val_dummy, &dummy);
5966 if (tem && giv->derive_adjustment)
5967 tem = simplify_giv_expr
5969 gen_rtx_PLUS (giv->mode, tem, giv->derive_adjustment),
5970 &ext_val_dummy, &dummy);
5973 giv->derive_adjustment = tem;
5975 giv->cant_derive = 1;
5977 else if ((GET_CODE (p) == CODE_LABEL && ! biv->always_computable)
5978 || (GET_CODE (p) == JUMP_INSN && biv->maybe_multiple))
5979 giv->cant_derive = 1;
5984 /* Check whether an insn is an increment legitimate for a basic induction var.
5985 X is the source of insn P, or a part of it.
5986 MODE is the mode in which X should be interpreted.
5988 DEST_REG is the putative biv, also the destination of the insn.
5989 We accept patterns of these forms:
5990 REG = REG + INVARIANT (includes REG = REG - CONSTANT)
5991 REG = INVARIANT + REG
5993 If X is suitable, we return 1, set *MULT_VAL to CONST1_RTX,
5994 store the additive term into *INC_VAL, and store the place where
5995 we found the additive term into *LOCATION.
5997 If X is an assignment of an invariant into DEST_REG, we set
5998 *MULT_VAL to CONST0_RTX, and store the invariant into *INC_VAL.
6000 We also want to detect a BIV when it corresponds to a variable
6001 whose mode was promoted via PROMOTED_MODE. In that case, an increment
6002 of the variable may be a PLUS that adds a SUBREG of that variable to
6003 an invariant and then sign- or zero-extends the result of the PLUS
6006 Most GIVs in such cases will be in the promoted mode, since that is the
6007 probably the natural computation mode (and almost certainly the mode
6008 used for addresses) on the machine. So we view the pseudo-reg containing
6009 the variable as the BIV, as if it were simply incremented.
6011 Note that treating the entire pseudo as a BIV will result in making
6012 simple increments to any GIVs based on it. However, if the variable
6013 overflows in its declared mode but not its promoted mode, the result will
6014 be incorrect. This is acceptable if the variable is signed, since
6015 overflows in such cases are undefined, but not if it is unsigned, since
6016 those overflows are defined. So we only check for SIGN_EXTEND and
6019 If we cannot find a biv, we return 0. */
6022 basic_induction_var (loop, x, mode, dest_reg, p, inc_val, mult_val, location)
6023 const struct loop *loop;
6025 enum machine_mode mode;
6036 code = GET_CODE (x);
6041 if (rtx_equal_p (XEXP (x, 0), dest_reg)
6042 || (GET_CODE (XEXP (x, 0)) == SUBREG
6043 && SUBREG_PROMOTED_VAR_P (XEXP (x, 0))
6044 && SUBREG_REG (XEXP (x, 0)) == dest_reg))
6046 argp = &XEXP (x, 1);
6048 else if (rtx_equal_p (XEXP (x, 1), dest_reg)
6049 || (GET_CODE (XEXP (x, 1)) == SUBREG
6050 && SUBREG_PROMOTED_VAR_P (XEXP (x, 1))
6051 && SUBREG_REG (XEXP (x, 1)) == dest_reg))
6053 argp = &XEXP (x, 0);
6059 if (loop_invariant_p (loop, arg) != 1)
6062 *inc_val = convert_modes (GET_MODE (dest_reg), GET_MODE (x), arg, 0);
6063 *mult_val = const1_rtx;
6068 /* If this is a SUBREG for a promoted variable, check the inner
6070 if (SUBREG_PROMOTED_VAR_P (x))
6071 return basic_induction_var (loop, SUBREG_REG (x),
6072 GET_MODE (SUBREG_REG (x)),
6073 dest_reg, p, inc_val, mult_val, location);
6077 /* If this register is assigned in a previous insn, look at its
6078 source, but don't go outside the loop or past a label. */
6080 /* If this sets a register to itself, we would repeat any previous
6081 biv increment if we applied this strategy blindly. */
6082 if (rtx_equal_p (dest_reg, x))
6091 insn = PREV_INSN (insn);
6093 while (insn && GET_CODE (insn) == NOTE
6094 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG);
6098 set = single_set (insn);
6101 dest = SET_DEST (set);
6103 || (GET_CODE (dest) == SUBREG
6104 && (GET_MODE_SIZE (GET_MODE (dest)) <= UNITS_PER_WORD)
6105 && (GET_MODE_CLASS (GET_MODE (dest)) == MODE_INT)
6106 && SUBREG_REG (dest) == x))
6107 return basic_induction_var (loop, SET_SRC (set),
6108 (GET_MODE (SET_SRC (set)) == VOIDmode
6110 : GET_MODE (SET_SRC (set))),
6112 inc_val, mult_val, location);
6114 while (GET_CODE (dest) == SIGN_EXTRACT
6115 || GET_CODE (dest) == ZERO_EXTRACT
6116 || GET_CODE (dest) == SUBREG
6117 || GET_CODE (dest) == STRICT_LOW_PART)
6118 dest = XEXP (dest, 0);
6124 /* Can accept constant setting of biv only when inside inner most loop.
6125 Otherwise, a biv of an inner loop may be incorrectly recognized
6126 as a biv of the outer loop,
6127 causing code to be moved INTO the inner loop. */
6129 if (loop_invariant_p (loop, x) != 1)
6134 /* convert_modes aborts if we try to convert to or from CCmode, so just
6135 exclude that case. It is very unlikely that a condition code value
6136 would be a useful iterator anyways. */
6137 if (loop->level == 1
6138 && GET_MODE_CLASS (mode) != MODE_CC
6139 && GET_MODE_CLASS (GET_MODE (dest_reg)) != MODE_CC)
6141 /* Possible bug here? Perhaps we don't know the mode of X. */
6142 *inc_val = convert_modes (GET_MODE (dest_reg), mode, x, 0);
6143 *mult_val = const0_rtx;
6150 return basic_induction_var (loop, XEXP (x, 0), GET_MODE (XEXP (x, 0)),
6151 dest_reg, p, inc_val, mult_val, location);
6154 /* Similar, since this can be a sign extension. */
6155 for (insn = PREV_INSN (p);
6156 (insn && GET_CODE (insn) == NOTE
6157 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG);
6158 insn = PREV_INSN (insn))
6162 set = single_set (insn);
6164 if (! rtx_equal_p (dest_reg, XEXP (x, 0))
6165 && set && SET_DEST (set) == XEXP (x, 0)
6166 && GET_CODE (XEXP (x, 1)) == CONST_INT
6167 && INTVAL (XEXP (x, 1)) >= 0
6168 && GET_CODE (SET_SRC (set)) == ASHIFT
6169 && XEXP (x, 1) == XEXP (SET_SRC (set), 1))
6170 return basic_induction_var (loop, XEXP (SET_SRC (set), 0),
6171 GET_MODE (XEXP (x, 0)),
6172 dest_reg, insn, inc_val, mult_val,
6181 /* A general induction variable (giv) is any quantity that is a linear
6182 function of a basic induction variable,
6183 i.e. giv = biv * mult_val + add_val.
6184 The coefficients can be any loop invariant quantity.
6185 A giv need not be computed directly from the biv;
6186 it can be computed by way of other givs. */
6188 /* Determine whether X computes a giv.
6189 If it does, return a nonzero value
6190 which is the benefit from eliminating the computation of X;
6191 set *SRC_REG to the register of the biv that it is computed from;
6192 set *ADD_VAL and *MULT_VAL to the coefficients,
6193 such that the value of X is biv * mult + add; */
6196 general_induction_var (loop, x, src_reg, add_val, mult_val, ext_val,
6197 is_addr, pbenefit, addr_mode)
6198 const struct loop *loop;
6206 enum machine_mode addr_mode;
6208 struct loop_ivs *ivs = LOOP_IVS (loop);
6211 /* If this is an invariant, forget it, it isn't a giv. */
6212 if (loop_invariant_p (loop, x) == 1)
6216 *ext_val = NULL_RTX;
6217 x = simplify_giv_expr (loop, x, ext_val, pbenefit);
6221 switch (GET_CODE (x))
6225 /* Since this is now an invariant and wasn't before, it must be a giv
6226 with MULT_VAL == 0. It doesn't matter which BIV we associate this
6228 *src_reg = ivs->list->biv->dest_reg;
6229 *mult_val = const0_rtx;
6234 /* This is equivalent to a BIV. */
6236 *mult_val = const1_rtx;
6237 *add_val = const0_rtx;
6241 /* Either (plus (biv) (invar)) or
6242 (plus (mult (biv) (invar_1)) (invar_2)). */
6243 if (GET_CODE (XEXP (x, 0)) == MULT)
6245 *src_reg = XEXP (XEXP (x, 0), 0);
6246 *mult_val = XEXP (XEXP (x, 0), 1);
6250 *src_reg = XEXP (x, 0);
6251 *mult_val = const1_rtx;
6253 *add_val = XEXP (x, 1);
6257 /* ADD_VAL is zero. */
6258 *src_reg = XEXP (x, 0);
6259 *mult_val = XEXP (x, 1);
6260 *add_val = const0_rtx;
6267 /* Remove any enclosing USE from ADD_VAL and MULT_VAL (there will be
6268 unless they are CONST_INT). */
6269 if (GET_CODE (*add_val) == USE)
6270 *add_val = XEXP (*add_val, 0);
6271 if (GET_CODE (*mult_val) == USE)
6272 *mult_val = XEXP (*mult_val, 0);
6275 *pbenefit += address_cost (orig_x, addr_mode) - reg_address_cost;
6277 *pbenefit += rtx_cost (orig_x, SET);
6279 /* Always return true if this is a giv so it will be detected as such,
6280 even if the benefit is zero or negative. This allows elimination
6281 of bivs that might otherwise not be eliminated. */
6285 /* Given an expression, X, try to form it as a linear function of a biv.
6286 We will canonicalize it to be of the form
6287 (plus (mult (BIV) (invar_1))
6289 with possible degeneracies.
6291 The invariant expressions must each be of a form that can be used as a
6292 machine operand. We surround then with a USE rtx (a hack, but localized
6293 and certainly unambiguous!) if not a CONST_INT for simplicity in this
6294 routine; it is the caller's responsibility to strip them.
6296 If no such canonicalization is possible (i.e., two biv's are used or an
6297 expression that is neither invariant nor a biv or giv), this routine
6300 For a non-zero return, the result will have a code of CONST_INT, USE,
6301 REG (for a BIV), PLUS, or MULT. No other codes will occur.
6303 *BENEFIT will be incremented by the benefit of any sub-giv encountered. */
6305 static rtx sge_plus PARAMS ((enum machine_mode, rtx, rtx));
6306 static rtx sge_plus_constant PARAMS ((rtx, rtx));
6309 simplify_giv_expr (loop, x, ext_val, benefit)
6310 const struct loop *loop;
6315 struct loop_ivs *ivs = LOOP_IVS (loop);
6316 struct loop_regs *regs = LOOP_REGS (loop);
6317 enum machine_mode mode = GET_MODE (x);
6321 /* If this is not an integer mode, or if we cannot do arithmetic in this
6322 mode, this can't be a giv. */
6323 if (mode != VOIDmode
6324 && (GET_MODE_CLASS (mode) != MODE_INT
6325 || GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT))
6328 switch (GET_CODE (x))
6331 arg0 = simplify_giv_expr (loop, XEXP (x, 0), ext_val, benefit);
6332 arg1 = simplify_giv_expr (loop, XEXP (x, 1), ext_val, benefit);
6333 if (arg0 == 0 || arg1 == 0)
6336 /* Put constant last, CONST_INT last if both constant. */
6337 if ((GET_CODE (arg0) == USE
6338 || GET_CODE (arg0) == CONST_INT)
6339 && ! ((GET_CODE (arg0) == USE
6340 && GET_CODE (arg1) == USE)
6341 || GET_CODE (arg1) == CONST_INT))
6342 tem = arg0, arg0 = arg1, arg1 = tem;
6344 /* Handle addition of zero, then addition of an invariant. */
6345 if (arg1 == const0_rtx)
6347 else if (GET_CODE (arg1) == CONST_INT || GET_CODE (arg1) == USE)
6348 switch (GET_CODE (arg0))
6352 /* Adding two invariants must result in an invariant, so enclose
6353 addition operation inside a USE and return it. */
6354 if (GET_CODE (arg0) == USE)
6355 arg0 = XEXP (arg0, 0);
6356 if (GET_CODE (arg1) == USE)
6357 arg1 = XEXP (arg1, 0);
6359 if (GET_CODE (arg0) == CONST_INT)
6360 tem = arg0, arg0 = arg1, arg1 = tem;
6361 if (GET_CODE (arg1) == CONST_INT)
6362 tem = sge_plus_constant (arg0, arg1);
6364 tem = sge_plus (mode, arg0, arg1);
6366 if (GET_CODE (tem) != CONST_INT)
6367 tem = gen_rtx_USE (mode, tem);
6372 /* biv + invar or mult + invar. Return sum. */
6373 return gen_rtx_PLUS (mode, arg0, arg1);
6376 /* (a + invar_1) + invar_2. Associate. */
6378 simplify_giv_expr (loop,
6390 /* Each argument must be either REG, PLUS, or MULT. Convert REG to
6391 MULT to reduce cases. */
6392 if (GET_CODE (arg0) == REG)
6393 arg0 = gen_rtx_MULT (mode, arg0, const1_rtx);
6394 if (GET_CODE (arg1) == REG)
6395 arg1 = gen_rtx_MULT (mode, arg1, const1_rtx);
6397 /* Now have PLUS + PLUS, PLUS + MULT, MULT + PLUS, or MULT + MULT.
6398 Put a MULT first, leaving PLUS + PLUS, MULT + PLUS, or MULT + MULT.
6399 Recurse to associate the second PLUS. */
6400 if (GET_CODE (arg1) == MULT)
6401 tem = arg0, arg0 = arg1, arg1 = tem;
6403 if (GET_CODE (arg1) == PLUS)
6405 simplify_giv_expr (loop,
6407 gen_rtx_PLUS (mode, arg0,
6412 /* Now must have MULT + MULT. Distribute if same biv, else not giv. */
6413 if (GET_CODE (arg0) != MULT || GET_CODE (arg1) != MULT)
6416 if (!rtx_equal_p (arg0, arg1))
6419 return simplify_giv_expr (loop,
6428 /* Handle "a - b" as "a + b * (-1)". */
6429 return simplify_giv_expr (loop,
6438 arg0 = simplify_giv_expr (loop, XEXP (x, 0), ext_val, benefit);
6439 arg1 = simplify_giv_expr (loop, XEXP (x, 1), ext_val, benefit);
6440 if (arg0 == 0 || arg1 == 0)
6443 /* Put constant last, CONST_INT last if both constant. */
6444 if ((GET_CODE (arg0) == USE || GET_CODE (arg0) == CONST_INT)
6445 && GET_CODE (arg1) != CONST_INT)
6446 tem = arg0, arg0 = arg1, arg1 = tem;
6448 /* If second argument is not now constant, not giv. */
6449 if (GET_CODE (arg1) != USE && GET_CODE (arg1) != CONST_INT)
6452 /* Handle multiply by 0 or 1. */
6453 if (arg1 == const0_rtx)
6456 else if (arg1 == const1_rtx)
6459 switch (GET_CODE (arg0))
6462 /* biv * invar. Done. */
6463 return gen_rtx_MULT (mode, arg0, arg1);
6466 /* Product of two constants. */
6467 return GEN_INT (INTVAL (arg0) * INTVAL (arg1));
6470 /* invar * invar is a giv, but attempt to simplify it somehow. */
6471 if (GET_CODE (arg1) != CONST_INT)
6474 arg0 = XEXP (arg0, 0);
6475 if (GET_CODE (arg0) == MULT)
6477 /* (invar_0 * invar_1) * invar_2. Associate. */
6478 return simplify_giv_expr (loop,
6487 /* Porpagate the MULT expressions to the intermost nodes. */
6488 else if (GET_CODE (arg0) == PLUS)
6490 /* (invar_0 + invar_1) * invar_2. Distribute. */
6491 return simplify_giv_expr (loop,
6503 return gen_rtx_USE (mode, gen_rtx_MULT (mode, arg0, arg1));
6506 /* (a * invar_1) * invar_2. Associate. */
6507 return simplify_giv_expr (loop,
6516 /* (a + invar_1) * invar_2. Distribute. */
6517 return simplify_giv_expr (loop,
6532 /* Shift by constant is multiply by power of two. */
6533 if (GET_CODE (XEXP (x, 1)) != CONST_INT)
6537 simplify_giv_expr (loop,
6540 GEN_INT ((HOST_WIDE_INT) 1
6541 << INTVAL (XEXP (x, 1)))),
6545 /* "-a" is "a * (-1)" */
6546 return simplify_giv_expr (loop,
6547 gen_rtx_MULT (mode, XEXP (x, 0), constm1_rtx),
6551 /* "~a" is "-a - 1". Silly, but easy. */
6552 return simplify_giv_expr (loop,
6553 gen_rtx_MINUS (mode,
6554 gen_rtx_NEG (mode, XEXP (x, 0)),
6559 /* Already in proper form for invariant. */
6565 /* Conditionally recognize extensions of simple IVs. After we've
6566 computed loop traversal counts and verified the range of the
6567 source IV, we'll reevaluate this as a GIV. */
6568 if (*ext_val == NULL_RTX)
6570 arg0 = simplify_giv_expr (loop, XEXP (x, 0), ext_val, benefit);
6571 if (arg0 && *ext_val == NULL_RTX && GET_CODE (arg0) == REG)
6573 *ext_val = gen_rtx_fmt_e (GET_CODE (x), mode, arg0);
6580 /* If this is a new register, we can't deal with it. */
6581 if (REGNO (x) >= max_reg_before_loop)
6584 /* Check for biv or giv. */
6585 switch (REG_IV_TYPE (ivs, REGNO (x)))
6589 case GENERAL_INDUCT:
6591 struct induction *v = REG_IV_INFO (ivs, REGNO (x));
6593 /* Form expression from giv and add benefit. Ensure this giv
6594 can derive another and subtract any needed adjustment if so. */
6596 /* Increasing the benefit here is risky. The only case in which it
6597 is arguably correct is if this is the only use of V. In other
6598 cases, this will artificially inflate the benefit of the current
6599 giv, and lead to suboptimal code. Thus, it is disabled, since
6600 potentially not reducing an only marginally beneficial giv is
6601 less harmful than reducing many givs that are not really
6604 rtx single_use = regs->array[REGNO (x)].single_usage;
6605 if (single_use && single_use != const0_rtx)
6606 *benefit += v->benefit;
6612 tem = gen_rtx_PLUS (mode, gen_rtx_MULT (mode,
6613 v->src_reg, v->mult_val),
6616 if (v->derive_adjustment)
6617 tem = gen_rtx_MINUS (mode, tem, v->derive_adjustment);
6618 arg0 = simplify_giv_expr (loop, tem, ext_val, benefit);
6621 if (!v->ext_dependent)
6626 *ext_val = v->ext_dependent;
6634 /* If it isn't an induction variable, and it is invariant, we
6635 may be able to simplify things further by looking through
6636 the bits we just moved outside the loop. */
6637 if (loop_invariant_p (loop, x) == 1)
6640 struct loop_movables *movables = LOOP_MOVABLES (loop);
6642 for (m = movables->head; m; m = m->next)
6643 if (rtx_equal_p (x, m->set_dest))
6645 /* Ok, we found a match. Substitute and simplify. */
6647 /* If we match another movable, we must use that, as
6648 this one is going away. */
6650 return simplify_giv_expr (loop, m->match->set_dest,
6653 /* If consec is non-zero, this is a member of a group of
6654 instructions that were moved together. We handle this
6655 case only to the point of seeking to the last insn and
6656 looking for a REG_EQUAL. Fail if we don't find one. */
6663 tem = NEXT_INSN (tem);
6667 tem = find_reg_note (tem, REG_EQUAL, NULL_RTX);
6669 tem = XEXP (tem, 0);
6673 tem = single_set (m->insn);
6675 tem = SET_SRC (tem);
6680 /* What we are most interested in is pointer
6681 arithmetic on invariants -- only take
6682 patterns we may be able to do something with. */
6683 if (GET_CODE (tem) == PLUS
6684 || GET_CODE (tem) == MULT
6685 || GET_CODE (tem) == ASHIFT
6686 || GET_CODE (tem) == CONST_INT
6687 || GET_CODE (tem) == SYMBOL_REF)
6689 tem = simplify_giv_expr (loop, tem, ext_val,
6694 else if (GET_CODE (tem) == CONST
6695 && GET_CODE (XEXP (tem, 0)) == PLUS
6696 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == SYMBOL_REF
6697 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)
6699 tem = simplify_giv_expr (loop, XEXP (tem, 0),
6711 /* Fall through to general case. */
6713 /* If invariant, return as USE (unless CONST_INT).
6714 Otherwise, not giv. */
6715 if (GET_CODE (x) == USE)
6718 if (loop_invariant_p (loop, x) == 1)
6720 if (GET_CODE (x) == CONST_INT)
6722 if (GET_CODE (x) == CONST
6723 && GET_CODE (XEXP (x, 0)) == PLUS
6724 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
6725 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
6727 return gen_rtx_USE (mode, x);
6734 /* This routine folds invariants such that there is only ever one
6735 CONST_INT in the summation. It is only used by simplify_giv_expr. */
6738 sge_plus_constant (x, c)
6741 if (GET_CODE (x) == CONST_INT)
6742 return GEN_INT (INTVAL (x) + INTVAL (c));
6743 else if (GET_CODE (x) != PLUS)
6744 return gen_rtx_PLUS (GET_MODE (x), x, c);
6745 else if (GET_CODE (XEXP (x, 1)) == CONST_INT)
6747 return gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0),
6748 GEN_INT (INTVAL (XEXP (x, 1)) + INTVAL (c)));
6750 else if (GET_CODE (XEXP (x, 0)) == PLUS
6751 || GET_CODE (XEXP (x, 1)) != PLUS)
6753 return gen_rtx_PLUS (GET_MODE (x),
6754 sge_plus_constant (XEXP (x, 0), c), XEXP (x, 1));
6758 return gen_rtx_PLUS (GET_MODE (x),
6759 sge_plus_constant (XEXP (x, 1), c), XEXP (x, 0));
6764 sge_plus (mode, x, y)
6765 enum machine_mode mode;
6768 while (GET_CODE (y) == PLUS)
6770 rtx a = XEXP (y, 0);
6771 if (GET_CODE (a) == CONST_INT)
6772 x = sge_plus_constant (x, a);
6774 x = gen_rtx_PLUS (mode, x, a);
6777 if (GET_CODE (y) == CONST_INT)
6778 x = sge_plus_constant (x, y);
6780 x = gen_rtx_PLUS (mode, x, y);
6784 /* Help detect a giv that is calculated by several consecutive insns;
6788 The caller has already identified the first insn P as having a giv as dest;
6789 we check that all other insns that set the same register follow
6790 immediately after P, that they alter nothing else,
6791 and that the result of the last is still a giv.
6793 The value is 0 if the reg set in P is not really a giv.
6794 Otherwise, the value is the amount gained by eliminating
6795 all the consecutive insns that compute the value.
6797 FIRST_BENEFIT is the amount gained by eliminating the first insn, P.
6798 SRC_REG is the reg of the biv; DEST_REG is the reg of the giv.
6800 The coefficients of the ultimate giv value are stored in
6801 *MULT_VAL and *ADD_VAL. */
6804 consec_sets_giv (loop, first_benefit, p, src_reg, dest_reg,
6805 add_val, mult_val, ext_val, last_consec_insn)
6806 const struct loop *loop;
6814 rtx *last_consec_insn;
6816 struct loop_ivs *ivs = LOOP_IVS (loop);
6817 struct loop_regs *regs = LOOP_REGS (loop);
6824 /* Indicate that this is a giv so that we can update the value produced in
6825 each insn of the multi-insn sequence.
6827 This induction structure will be used only by the call to
6828 general_induction_var below, so we can allocate it on our stack.
6829 If this is a giv, our caller will replace the induct var entry with
6830 a new induction structure. */
6831 struct induction *v;
6833 if (REG_IV_TYPE (ivs, REGNO (dest_reg)) != UNKNOWN_INDUCT)
6836 v = (struct induction *) alloca (sizeof (struct induction));
6837 v->src_reg = src_reg;
6838 v->mult_val = *mult_val;
6839 v->add_val = *add_val;
6840 v->benefit = first_benefit;
6842 v->derive_adjustment = 0;
6843 v->ext_dependent = NULL_RTX;
6845 REG_IV_TYPE (ivs, REGNO (dest_reg)) = GENERAL_INDUCT;
6846 REG_IV_INFO (ivs, REGNO (dest_reg)) = v;
6848 count = regs->array[REGNO (dest_reg)].n_times_set - 1;
6853 code = GET_CODE (p);
6855 /* If libcall, skip to end of call sequence. */
6856 if (code == INSN && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
6860 && (set = single_set (p))
6861 && GET_CODE (SET_DEST (set)) == REG
6862 && SET_DEST (set) == dest_reg
6863 && (general_induction_var (loop, SET_SRC (set), &src_reg,
6864 add_val, mult_val, ext_val, 0,
6866 /* Giv created by equivalent expression. */
6867 || ((temp = find_reg_note (p, REG_EQUAL, NULL_RTX))
6868 && general_induction_var (loop, XEXP (temp, 0), &src_reg,
6869 add_val, mult_val, ext_val, 0,
6870 &benefit, VOIDmode)))
6871 && src_reg == v->src_reg)
6873 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
6874 benefit += libcall_benefit (p);
6877 v->mult_val = *mult_val;
6878 v->add_val = *add_val;
6879 v->benefit += benefit;
6881 else if (code != NOTE)
6883 /* Allow insns that set something other than this giv to a
6884 constant. Such insns are needed on machines which cannot
6885 include long constants and should not disqualify a giv. */
6887 && (set = single_set (p))
6888 && SET_DEST (set) != dest_reg
6889 && CONSTANT_P (SET_SRC (set)))
6892 REG_IV_TYPE (ivs, REGNO (dest_reg)) = UNKNOWN_INDUCT;
6897 REG_IV_TYPE (ivs, REGNO (dest_reg)) = UNKNOWN_INDUCT;
6898 *last_consec_insn = p;
6902 /* Return an rtx, if any, that expresses giv G2 as a function of the register
6903 represented by G1. If no such expression can be found, or it is clear that
6904 it cannot possibly be a valid address, 0 is returned.
6906 To perform the computation, we note that
6909 where `v' is the biv.
6911 So G2 = (y/b) * G1 + (b - a*y/x).
6913 Note that MULT = y/x.
6915 Update: A and B are now allowed to be additive expressions such that
6916 B contains all variables in A. That is, computing B-A will not require
6917 subtracting variables. */
6920 express_from_1 (a, b, mult)
6923 /* If MULT is zero, then A*MULT is zero, and our expression is B. */
6925 if (mult == const0_rtx)
6928 /* If MULT is not 1, we cannot handle A with non-constants, since we
6929 would then be required to subtract multiples of the registers in A.
6930 This is theoretically possible, and may even apply to some Fortran
6931 constructs, but it is a lot of work and we do not attempt it here. */
6933 if (mult != const1_rtx && GET_CODE (a) != CONST_INT)
6936 /* In general these structures are sorted top to bottom (down the PLUS
6937 chain), but not left to right across the PLUS. If B is a higher
6938 order giv than A, we can strip one level and recurse. If A is higher
6939 order, we'll eventually bail out, but won't know that until the end.
6940 If they are the same, we'll strip one level around this loop. */
6942 while (GET_CODE (a) == PLUS && GET_CODE (b) == PLUS)
6944 rtx ra, rb, oa, ob, tmp;
6946 ra = XEXP (a, 0), oa = XEXP (a, 1);
6947 if (GET_CODE (ra) == PLUS)
6948 tmp = ra, ra = oa, oa = tmp;
6950 rb = XEXP (b, 0), ob = XEXP (b, 1);
6951 if (GET_CODE (rb) == PLUS)
6952 tmp = rb, rb = ob, ob = tmp;
6954 if (rtx_equal_p (ra, rb))
6955 /* We matched: remove one reg completely. */
6957 else if (GET_CODE (ob) != PLUS && rtx_equal_p (ra, ob))
6958 /* An alternate match. */
6960 else if (GET_CODE (oa) != PLUS && rtx_equal_p (oa, rb))
6961 /* An alternate match. */
6965 /* Indicates an extra register in B. Strip one level from B and
6966 recurse, hoping B was the higher order expression. */
6967 ob = express_from_1 (a, ob, mult);
6970 return gen_rtx_PLUS (GET_MODE (b), rb, ob);
6974 /* Here we are at the last level of A, go through the cases hoping to
6975 get rid of everything but a constant. */
6977 if (GET_CODE (a) == PLUS)
6981 ra = XEXP (a, 0), oa = XEXP (a, 1);
6982 if (rtx_equal_p (oa, b))
6984 else if (!rtx_equal_p (ra, b))
6987 if (GET_CODE (oa) != CONST_INT)
6990 return GEN_INT (-INTVAL (oa) * INTVAL (mult));
6992 else if (GET_CODE (a) == CONST_INT)
6994 return plus_constant (b, -INTVAL (a) * INTVAL (mult));
6996 else if (CONSTANT_P (a))
6998 enum machine_mode mode_a = GET_MODE (a);
6999 enum machine_mode mode_b = GET_MODE (b);
7000 enum machine_mode mode = mode_b == VOIDmode ? mode_a : mode_b;
7001 return simplify_gen_binary (MINUS, mode, b, a);
7003 else if (GET_CODE (b) == PLUS)
7005 if (rtx_equal_p (a, XEXP (b, 0)))
7007 else if (rtx_equal_p (a, XEXP (b, 1)))
7012 else if (rtx_equal_p (a, b))
7019 express_from (g1, g2)
7020 struct induction *g1, *g2;
7024 /* The value that G1 will be multiplied by must be a constant integer. Also,
7025 the only chance we have of getting a valid address is if b*c/a (see above
7026 for notation) is also an integer. */
7027 if (GET_CODE (g1->mult_val) == CONST_INT
7028 && GET_CODE (g2->mult_val) == CONST_INT)
7030 if (g1->mult_val == const0_rtx
7031 || INTVAL (g2->mult_val) % INTVAL (g1->mult_val) != 0)
7033 mult = GEN_INT (INTVAL (g2->mult_val) / INTVAL (g1->mult_val));
7035 else if (rtx_equal_p (g1->mult_val, g2->mult_val))
7039 /* ??? Find out if the one is a multiple of the other? */
7043 add = express_from_1 (g1->add_val, g2->add_val, mult);
7044 if (add == NULL_RTX)
7046 /* Failed. If we've got a multiplication factor between G1 and G2,
7047 scale G1's addend and try again. */
7048 if (INTVAL (mult) > 1)
7050 rtx g1_add_val = g1->add_val;
7051 if (GET_CODE (g1_add_val) == MULT
7052 && GET_CODE (XEXP (g1_add_val, 1)) == CONST_INT)
7055 m = INTVAL (mult) * INTVAL (XEXP (g1_add_val, 1));
7056 g1_add_val = gen_rtx_MULT (GET_MODE (g1_add_val),
7057 XEXP (g1_add_val, 0), GEN_INT (m));
7061 g1_add_val = gen_rtx_MULT (GET_MODE (g1_add_val), g1_add_val,
7065 add = express_from_1 (g1_add_val, g2->add_val, const1_rtx);
7068 if (add == NULL_RTX)
7071 /* Form simplified final result. */
7072 if (mult == const0_rtx)
7074 else if (mult == const1_rtx)
7075 mult = g1->dest_reg;
7077 mult = gen_rtx_MULT (g2->mode, g1->dest_reg, mult);
7079 if (add == const0_rtx)
7083 if (GET_CODE (add) == PLUS
7084 && CONSTANT_P (XEXP (add, 1)))
7086 rtx tem = XEXP (add, 1);
7087 mult = gen_rtx_PLUS (g2->mode, mult, XEXP (add, 0));
7091 return gen_rtx_PLUS (g2->mode, mult, add);
7095 /* Return an rtx, if any, that expresses giv G2 as a function of the register
7096 represented by G1. This indicates that G2 should be combined with G1 and
7097 that G2 can use (either directly or via an address expression) a register
7098 used to represent G1. */
7101 combine_givs_p (g1, g2)
7102 struct induction *g1, *g2;
7106 /* With the introduction of ext dependent givs, we must care for modes.
7107 G2 must not use a wider mode than G1. */
7108 if (GET_MODE_SIZE (g1->mode) < GET_MODE_SIZE (g2->mode))
7111 ret = comb = express_from (g1, g2);
7112 if (comb == NULL_RTX)
7114 if (g1->mode != g2->mode)
7115 ret = gen_lowpart (g2->mode, comb);
7117 /* If these givs are identical, they can be combined. We use the results
7118 of express_from because the addends are not in a canonical form, so
7119 rtx_equal_p is a weaker test. */
7120 /* But don't combine a DEST_REG giv with a DEST_ADDR giv; we want the
7121 combination to be the other way round. */
7122 if (comb == g1->dest_reg
7123 && (g1->giv_type == DEST_REG || g2->giv_type == DEST_ADDR))
7128 /* If G2 can be expressed as a function of G1 and that function is valid
7129 as an address and no more expensive than using a register for G2,
7130 the expression of G2 in terms of G1 can be used. */
7132 && g2->giv_type == DEST_ADDR
7133 && memory_address_p (GET_MODE (g2->mem), ret)
7134 /* ??? Looses, especially with -fforce-addr, where *g2->location
7135 will always be a register, and so anything more complicated
7139 && ADDRESS_COST (tem) <= ADDRESS_COST (*g2->location)
7141 && rtx_cost (tem, MEM) <= rtx_cost (*g2->location, MEM)
7152 /* Check each extension dependent giv in this class to see if its
7153 root biv is safe from wrapping in the interior mode, which would
7154 make the giv illegal. */
7157 check_ext_dependent_givs (bl, loop_info)
7158 struct iv_class *bl;
7159 struct loop_info *loop_info;
7161 int ze_ok = 0, se_ok = 0, info_ok = 0;
7162 enum machine_mode biv_mode = GET_MODE (bl->biv->src_reg);
7163 HOST_WIDE_INT start_val;
7164 unsigned HOST_WIDE_INT u_end_val = 0;
7165 unsigned HOST_WIDE_INT u_start_val = 0;
7167 struct induction *v;
7169 /* Make sure the iteration data is available. We must have
7170 constants in order to be certain of no overflow. */
7171 /* ??? An unknown iteration count with an increment of +-1
7172 combined with friendly exit tests of against an invariant
7173 value is also ameanable to optimization. Not implemented. */
7174 if (loop_info->n_iterations > 0
7175 && bl->initial_value
7176 && GET_CODE (bl->initial_value) == CONST_INT
7177 && (incr = biv_total_increment (bl))
7178 && GET_CODE (incr) == CONST_INT
7179 /* Make sure the host can represent the arithmetic. */
7180 && HOST_BITS_PER_WIDE_INT >= GET_MODE_BITSIZE (biv_mode))
7182 unsigned HOST_WIDE_INT abs_incr, total_incr;
7183 HOST_WIDE_INT s_end_val;
7187 start_val = INTVAL (bl->initial_value);
7188 u_start_val = start_val;
7190 neg_incr = 0, abs_incr = INTVAL (incr);
7191 if (INTVAL (incr) < 0)
7192 neg_incr = 1, abs_incr = -abs_incr;
7193 total_incr = abs_incr * loop_info->n_iterations;
7195 /* Check for host arithmatic overflow. */
7196 if (total_incr / loop_info->n_iterations == abs_incr)
7198 unsigned HOST_WIDE_INT u_max;
7199 HOST_WIDE_INT s_max;
7201 u_end_val = start_val + (neg_incr ? -total_incr : total_incr);
7202 s_end_val = u_end_val;
7203 u_max = GET_MODE_MASK (biv_mode);
7206 /* Check zero extension of biv ok. */
7208 /* Check for host arithmatic overflow. */
7210 ? u_end_val < u_start_val
7211 : u_end_val > u_start_val)
7212 /* Check for target arithmetic overflow. */
7214 ? 1 /* taken care of with host overflow */
7215 : u_end_val <= u_max))
7220 /* Check sign extension of biv ok. */
7221 /* ??? While it is true that overflow with signed and pointer
7222 arithmetic is undefined, I fear too many programmers don't
7223 keep this fact in mind -- myself included on occasion.
7224 So leave alone with the signed overflow optimizations. */
7225 if (start_val >= -s_max - 1
7226 /* Check for host arithmatic overflow. */
7228 ? s_end_val < start_val
7229 : s_end_val > start_val)
7230 /* Check for target arithmetic overflow. */
7232 ? s_end_val >= -s_max - 1
7233 : s_end_val <= s_max))
7240 /* Invalidate givs that fail the tests. */
7241 for (v = bl->giv; v; v = v->next_iv)
7242 if (v->ext_dependent)
7244 enum rtx_code code = GET_CODE (v->ext_dependent);
7257 /* We don't know whether this value is being used as either
7258 signed or unsigned, so to safely truncate we must satisfy
7259 both. The initial check here verifies the BIV itself;
7260 once that is successful we may check its range wrt the
7264 enum machine_mode outer_mode = GET_MODE (v->ext_dependent);
7265 unsigned HOST_WIDE_INT max = GET_MODE_MASK (outer_mode) >> 1;
7267 /* We know from the above that both endpoints are nonnegative,
7268 and that there is no wrapping. Verify that both endpoints
7269 are within the (signed) range of the outer mode. */
7270 if (u_start_val <= max && u_end_val <= max)
7281 if (loop_dump_stream)
7283 fprintf (loop_dump_stream,
7284 "Verified ext dependent giv at %d of reg %d\n",
7285 INSN_UID (v->insn), bl->regno);
7290 if (loop_dump_stream)
7295 why = "biv iteration values overflowed";
7299 incr = biv_total_increment (bl);
7300 if (incr == const1_rtx)
7301 why = "biv iteration info incomplete; incr by 1";
7303 why = "biv iteration info incomplete";
7306 fprintf (loop_dump_stream,
7307 "Failed ext dependent giv at %d, %s\n",
7308 INSN_UID (v->insn), why);
7311 bl->all_reduced = 0;
7316 /* Generate a version of VALUE in a mode appropriate for initializing V. */
7319 extend_value_for_giv (v, value)
7320 struct induction *v;
7323 rtx ext_dep = v->ext_dependent;
7328 /* Recall that check_ext_dependent_givs verified that the known bounds
7329 of a biv did not overflow or wrap with respect to the extension for
7330 the giv. Therefore, constants need no additional adjustment. */
7331 if (CONSTANT_P (value) && GET_MODE (value) == VOIDmode)
7334 /* Otherwise, we must adjust the value to compensate for the
7335 differing modes of the biv and the giv. */
7336 return gen_rtx_fmt_e (GET_CODE (ext_dep), GET_MODE (ext_dep), value);
7339 struct combine_givs_stats
7346 cmp_combine_givs_stats (xp, yp)
7350 const struct combine_givs_stats * const x =
7351 (const struct combine_givs_stats *) xp;
7352 const struct combine_givs_stats * const y =
7353 (const struct combine_givs_stats *) yp;
7355 d = y->total_benefit - x->total_benefit;
7356 /* Stabilize the sort. */
7358 d = x->giv_number - y->giv_number;
7362 /* Check all pairs of givs for iv_class BL and see if any can be combined with
7363 any other. If so, point SAME to the giv combined with and set NEW_REG to
7364 be an expression (in terms of the other giv's DEST_REG) equivalent to the
7365 giv. Also, update BENEFIT and related fields for cost/benefit analysis. */
7368 combine_givs (regs, bl)
7369 struct loop_regs *regs;
7370 struct iv_class *bl;
7372 /* Additional benefit to add for being combined multiple times. */
7373 const int extra_benefit = 3;
7375 struct induction *g1, *g2, **giv_array;
7376 int i, j, k, giv_count;
7377 struct combine_givs_stats *stats;
7380 /* Count givs, because bl->giv_count is incorrect here. */
7382 for (g1 = bl->giv; g1; g1 = g1->next_iv)
7387 = (struct induction **) alloca (giv_count * sizeof (struct induction *));
7389 for (g1 = bl->giv; g1; g1 = g1->next_iv)
7391 giv_array[i++] = g1;
7393 stats = (struct combine_givs_stats *) xcalloc (giv_count, sizeof (*stats));
7394 can_combine = (rtx *) xcalloc (giv_count, giv_count * sizeof (rtx));
7396 for (i = 0; i < giv_count; i++)
7402 stats[i].giv_number = i;
7404 /* If a DEST_REG GIV is used only once, do not allow it to combine
7405 with anything, for in doing so we will gain nothing that cannot
7406 be had by simply letting the GIV with which we would have combined
7407 to be reduced on its own. The losage shows up in particular with
7408 DEST_ADDR targets on hosts with reg+reg addressing, though it can
7409 be seen elsewhere as well. */
7410 if (g1->giv_type == DEST_REG
7411 && (single_use = regs->array[REGNO (g1->dest_reg)].single_usage)
7412 && single_use != const0_rtx)
7415 this_benefit = g1->benefit;
7416 /* Add an additional weight for zero addends. */
7417 if (g1->no_const_addval)
7420 for (j = 0; j < giv_count; j++)
7426 && (this_combine = combine_givs_p (g1, g2)) != NULL_RTX)
7428 can_combine[i * giv_count + j] = this_combine;
7429 this_benefit += g2->benefit + extra_benefit;
7432 stats[i].total_benefit = this_benefit;
7435 /* Iterate, combining until we can't. */
7437 qsort (stats, giv_count, sizeof (*stats), cmp_combine_givs_stats);
7439 if (loop_dump_stream)
7441 fprintf (loop_dump_stream, "Sorted combine statistics:\n");
7442 for (k = 0; k < giv_count; k++)
7444 g1 = giv_array[stats[k].giv_number];
7445 if (!g1->combined_with && !g1->same)
7446 fprintf (loop_dump_stream, " {%d, %d}",
7447 INSN_UID (giv_array[stats[k].giv_number]->insn),
7448 stats[k].total_benefit);
7450 putc ('\n', loop_dump_stream);
7453 for (k = 0; k < giv_count; k++)
7455 int g1_add_benefit = 0;
7457 i = stats[k].giv_number;
7460 /* If it has already been combined, skip. */
7461 if (g1->combined_with || g1->same)
7464 for (j = 0; j < giv_count; j++)
7467 if (g1 != g2 && can_combine[i * giv_count + j]
7468 /* If it has already been combined, skip. */
7469 && ! g2->same && ! g2->combined_with)
7473 g2->new_reg = can_combine[i * giv_count + j];
7475 /* For destination, we now may replace by mem expression instead
7476 of register. This changes the costs considerably, so add the
7478 if (g2->giv_type == DEST_ADDR)
7479 g2->benefit = (g2->benefit + reg_address_cost
7480 - address_cost (g2->new_reg,
7481 GET_MODE (g2->mem)));
7482 g1->combined_with++;
7483 g1->lifetime += g2->lifetime;
7485 g1_add_benefit += g2->benefit;
7487 /* ??? The new final_[bg]iv_value code does a much better job
7488 of finding replaceable giv's, and hence this code may no
7489 longer be necessary. */
7490 if (! g2->replaceable && REG_USERVAR_P (g2->dest_reg))
7491 g1_add_benefit -= copy_cost;
7493 /* To help optimize the next set of combinations, remove
7494 this giv from the benefits of other potential mates. */
7495 for (l = 0; l < giv_count; ++l)
7497 int m = stats[l].giv_number;
7498 if (can_combine[m * giv_count + j])
7499 stats[l].total_benefit -= g2->benefit + extra_benefit;
7502 if (loop_dump_stream)
7503 fprintf (loop_dump_stream,
7504 "giv at %d combined with giv at %d; new benefit %d + %d, lifetime %d\n",
7505 INSN_UID (g2->insn), INSN_UID (g1->insn),
7506 g1->benefit, g1_add_benefit, g1->lifetime);
7510 /* To help optimize the next set of combinations, remove
7511 this giv from the benefits of other potential mates. */
7512 if (g1->combined_with)
7514 for (j = 0; j < giv_count; ++j)
7516 int m = stats[j].giv_number;
7517 if (can_combine[m * giv_count + i])
7518 stats[j].total_benefit -= g1->benefit + extra_benefit;
7521 g1->benefit += g1_add_benefit;
7523 /* We've finished with this giv, and everything it touched.
7524 Restart the combination so that proper weights for the
7525 rest of the givs are properly taken into account. */
7526 /* ??? Ideally we would compact the arrays at this point, so
7527 as to not cover old ground. But sanely compacting
7528 can_combine is tricky. */
7538 /* Generate sequence for REG = B * M + A. */
7541 gen_add_mult (b, m, a, reg)
7542 rtx b; /* initial value of basic induction variable */
7543 rtx m; /* multiplicative constant */
7544 rtx a; /* additive constant */
7545 rtx reg; /* destination register */
7551 /* Use unsigned arithmetic. */
7552 result = expand_mult_add (b, reg, m, a, GET_MODE (reg), 1);
7554 emit_move_insn (reg, result);
7555 seq = gen_sequence ();
7562 /* Update registers created in insn sequence SEQ. */
7565 loop_regs_update (loop, seq)
7566 const struct loop *loop ATTRIBUTE_UNUSED;
7569 /* Update register info for alias analysis. */
7571 if (GET_CODE (seq) == SEQUENCE)
7574 for (i = 0; i < XVECLEN (seq, 0); ++i)
7576 rtx set = single_set (XVECEXP (seq, 0, i));
7577 if (set && GET_CODE (SET_DEST (set)) == REG)
7578 record_base_value (REGNO (SET_DEST (set)), SET_SRC (set), 0);
7583 rtx set = single_set (seq);
7584 if (set && GET_CODE (SET_DEST (set)) == REG)
7585 record_base_value (REGNO (SET_DEST (set)), SET_SRC (set), 0);
7590 /* EMIT code before BEFORE_BB/BEFORE_INSN to set REG = B * M + A. */
7593 loop_iv_add_mult_emit_before (loop, b, m, a, reg, before_bb, before_insn)
7594 const struct loop *loop;
7595 rtx b; /* initial value of basic induction variable */
7596 rtx m; /* multiplicative constant */
7597 rtx a; /* additive constant */
7598 rtx reg; /* destination register */
7599 basic_block before_bb;
7606 loop_iv_add_mult_hoist (loop, b, m, a, reg);
7610 /* Use copy_rtx to prevent unexpected sharing of these rtx. */
7611 seq = gen_add_mult (copy_rtx (b), m, copy_rtx (a), reg);
7613 /* Increase the lifetime of any invariants moved further in code. */
7614 update_reg_last_use (a, before_insn);
7615 update_reg_last_use (b, before_insn);
7616 update_reg_last_use (m, before_insn);
7618 loop_insn_emit_before (loop, before_bb, before_insn, seq);
7620 /* It is possible that the expansion created lots of new registers.
7621 Iterate over the sequence we just created and record them all. */
7622 loop_regs_update (loop, seq);
7626 /* Emit insns in loop pre-header to set REG = B * M + A. */
7629 loop_iv_add_mult_sink (loop, b, m, a, reg)
7630 const struct loop *loop;
7631 rtx b; /* initial value of basic induction variable */
7632 rtx m; /* multiplicative constant */
7633 rtx a; /* additive constant */
7634 rtx reg; /* destination register */
7638 /* Use copy_rtx to prevent unexpected sharing of these rtx. */
7639 seq = gen_add_mult (copy_rtx (b), m, copy_rtx (a), reg);
7641 /* Increase the lifetime of any invariants moved further in code.
7642 ???? Is this really necessary? */
7643 update_reg_last_use (a, loop->sink);
7644 update_reg_last_use (b, loop->sink);
7645 update_reg_last_use (m, loop->sink);
7647 loop_insn_sink (loop, seq);
7649 /* It is possible that the expansion created lots of new registers.
7650 Iterate over the sequence we just created and record them all. */
7651 loop_regs_update (loop, seq);
7655 /* Emit insns after loop to set REG = B * M + A. */
7658 loop_iv_add_mult_hoist (loop, b, m, a, reg)
7659 const struct loop *loop;
7660 rtx b; /* initial value of basic induction variable */
7661 rtx m; /* multiplicative constant */
7662 rtx a; /* additive constant */
7663 rtx reg; /* destination register */
7667 /* Use copy_rtx to prevent unexpected sharing of these rtx. */
7668 seq = gen_add_mult (copy_rtx (b), m, copy_rtx (a), reg);
7670 loop_insn_hoist (loop, seq);
7672 /* It is possible that the expansion created lots of new registers.
7673 Iterate over the sequence we just created and record them all. */
7674 loop_regs_update (loop, seq);
7679 /* Similar to gen_add_mult, but compute cost rather than generating
7683 iv_add_mult_cost (b, m, a, reg)
7684 rtx b; /* initial value of basic induction variable */
7685 rtx m; /* multiplicative constant */
7686 rtx a; /* additive constant */
7687 rtx reg; /* destination register */
7693 result = expand_mult_add (b, reg, m, a, GET_MODE (reg), 1);
7695 emit_move_insn (reg, result);
7696 last = get_last_insn ();
7699 rtx t = single_set (last);
7701 cost += rtx_cost (SET_SRC (t), SET);
7702 last = PREV_INSN (last);
7708 /* Test whether A * B can be computed without
7709 an actual multiply insn. Value is 1 if so. */
7712 product_cheap_p (a, b)
7720 /* If only one is constant, make it B. */
7721 if (GET_CODE (a) == CONST_INT)
7722 tmp = a, a = b, b = tmp;
7724 /* If first constant, both constant, so don't need multiply. */
7725 if (GET_CODE (a) == CONST_INT)
7728 /* If second not constant, neither is constant, so would need multiply. */
7729 if (GET_CODE (b) != CONST_INT)
7732 /* One operand is constant, so might not need multiply insn. Generate the
7733 code for the multiply and see if a call or multiply, or long sequence
7734 of insns is generated. */
7737 expand_mult (GET_MODE (a), a, b, NULL_RTX, 1);
7738 tmp = gen_sequence ();
7741 if (GET_CODE (tmp) == SEQUENCE)
7743 if (XVEC (tmp, 0) == 0)
7745 else if (XVECLEN (tmp, 0) > 3)
7748 for (i = 0; i < XVECLEN (tmp, 0); i++)
7750 rtx insn = XVECEXP (tmp, 0, i);
7752 if (GET_CODE (insn) != INSN
7753 || (GET_CODE (PATTERN (insn)) == SET
7754 && GET_CODE (SET_SRC (PATTERN (insn))) == MULT)
7755 || (GET_CODE (PATTERN (insn)) == PARALLEL
7756 && GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == SET
7757 && GET_CODE (SET_SRC (XVECEXP (PATTERN (insn), 0, 0))) == MULT))
7764 else if (GET_CODE (tmp) == SET
7765 && GET_CODE (SET_SRC (tmp)) == MULT)
7767 else if (GET_CODE (tmp) == PARALLEL
7768 && GET_CODE (XVECEXP (tmp, 0, 0)) == SET
7769 && GET_CODE (SET_SRC (XVECEXP (tmp, 0, 0))) == MULT)
7775 /* Check to see if loop can be terminated by a "decrement and branch until
7776 zero" instruction. If so, add a REG_NONNEG note to the branch insn if so.
7777 Also try reversing an increment loop to a decrement loop
7778 to see if the optimization can be performed.
7779 Value is nonzero if optimization was performed. */
7781 /* This is useful even if the architecture doesn't have such an insn,
7782 because it might change a loops which increments from 0 to n to a loop
7783 which decrements from n to 0. A loop that decrements to zero is usually
7784 faster than one that increments from zero. */
7786 /* ??? This could be rewritten to use some of the loop unrolling procedures,
7787 such as approx_final_value, biv_total_increment, loop_iterations, and
7788 final_[bg]iv_value. */
7791 check_dbra_loop (loop, insn_count)
7795 struct loop_info *loop_info = LOOP_INFO (loop);
7796 struct loop_regs *regs = LOOP_REGS (loop);
7797 struct loop_ivs *ivs = LOOP_IVS (loop);
7798 struct iv_class *bl;
7805 rtx before_comparison;
7809 int compare_and_branch;
7810 rtx loop_start = loop->start;
7811 rtx loop_end = loop->end;
7813 /* If last insn is a conditional branch, and the insn before tests a
7814 register value, try to optimize it. Otherwise, we can't do anything. */
7816 jump = PREV_INSN (loop_end);
7817 comparison = get_condition_for_loop (loop, jump);
7818 if (comparison == 0)
7820 if (!onlyjump_p (jump))
7823 /* Try to compute whether the compare/branch at the loop end is one or
7824 two instructions. */
7825 get_condition (jump, &first_compare);
7826 if (first_compare == jump)
7827 compare_and_branch = 1;
7828 else if (first_compare == prev_nonnote_insn (jump))
7829 compare_and_branch = 2;
7834 /* If more than one condition is present to control the loop, then
7835 do not proceed, as this function does not know how to rewrite
7836 loop tests with more than one condition.
7838 Look backwards from the first insn in the last comparison
7839 sequence and see if we've got another comparison sequence. */
7842 if ((jump1 = prev_nonnote_insn (first_compare)) != loop->cont)
7843 if (GET_CODE (jump1) == JUMP_INSN)
7847 /* Check all of the bivs to see if the compare uses one of them.
7848 Skip biv's set more than once because we can't guarantee that
7849 it will be zero on the last iteration. Also skip if the biv is
7850 used between its update and the test insn. */
7852 for (bl = ivs->list; bl; bl = bl->next)
7854 if (bl->biv_count == 1
7855 && ! bl->biv->maybe_multiple
7856 && bl->biv->dest_reg == XEXP (comparison, 0)
7857 && ! reg_used_between_p (regno_reg_rtx[bl->regno], bl->biv->insn,
7865 /* Look for the case where the basic induction variable is always
7866 nonnegative, and equals zero on the last iteration.
7867 In this case, add a reg_note REG_NONNEG, which allows the
7868 m68k DBRA instruction to be used. */
7870 if (((GET_CODE (comparison) == GT
7871 && GET_CODE (XEXP (comparison, 1)) == CONST_INT
7872 && INTVAL (XEXP (comparison, 1)) == -1)
7873 || (GET_CODE (comparison) == NE && XEXP (comparison, 1) == const0_rtx))
7874 && GET_CODE (bl->biv->add_val) == CONST_INT
7875 && INTVAL (bl->biv->add_val) < 0)
7877 /* Initial value must be greater than 0,
7878 init_val % -dec_value == 0 to ensure that it equals zero on
7879 the last iteration */
7881 if (GET_CODE (bl->initial_value) == CONST_INT
7882 && INTVAL (bl->initial_value) > 0
7883 && (INTVAL (bl->initial_value)
7884 % (-INTVAL (bl->biv->add_val))) == 0)
7886 /* register always nonnegative, add REG_NOTE to branch */
7887 if (! find_reg_note (jump, REG_NONNEG, NULL_RTX))
7889 = gen_rtx_EXPR_LIST (REG_NONNEG, bl->biv->dest_reg,
7896 /* If the decrement is 1 and the value was tested as >= 0 before
7897 the loop, then we can safely optimize. */
7898 for (p = loop_start; p; p = PREV_INSN (p))
7900 if (GET_CODE (p) == CODE_LABEL)
7902 if (GET_CODE (p) != JUMP_INSN)
7905 before_comparison = get_condition_for_loop (loop, p);
7906 if (before_comparison
7907 && XEXP (before_comparison, 0) == bl->biv->dest_reg
7908 && GET_CODE (before_comparison) == LT
7909 && XEXP (before_comparison, 1) == const0_rtx
7910 && ! reg_set_between_p (bl->biv->dest_reg, p, loop_start)
7911 && INTVAL (bl->biv->add_val) == -1)
7913 if (! find_reg_note (jump, REG_NONNEG, NULL_RTX))
7915 = gen_rtx_EXPR_LIST (REG_NONNEG, bl->biv->dest_reg,
7923 else if (GET_CODE (bl->biv->add_val) == CONST_INT
7924 && INTVAL (bl->biv->add_val) > 0)
7926 /* Try to change inc to dec, so can apply above optimization. */
7928 all registers modified are induction variables or invariant,
7929 all memory references have non-overlapping addresses
7930 (obviously true if only one write)
7931 allow 2 insns for the compare/jump at the end of the loop. */
7932 /* Also, we must avoid any instructions which use both the reversed
7933 biv and another biv. Such instructions will fail if the loop is
7934 reversed. We meet this condition by requiring that either
7935 no_use_except_counting is true, or else that there is only
7937 int num_nonfixed_reads = 0;
7938 /* 1 if the iteration var is used only to count iterations. */
7939 int no_use_except_counting = 0;
7940 /* 1 if the loop has no memory store, or it has a single memory store
7941 which is reversible. */
7942 int reversible_mem_store = 1;
7944 if (bl->giv_count == 0 && ! loop->exit_count)
7946 rtx bivreg = regno_reg_rtx[bl->regno];
7947 struct iv_class *blt;
7949 /* If there are no givs for this biv, and the only exit is the
7950 fall through at the end of the loop, then
7951 see if perhaps there are no uses except to count. */
7952 no_use_except_counting = 1;
7953 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
7956 rtx set = single_set (p);
7958 if (set && GET_CODE (SET_DEST (set)) == REG
7959 && REGNO (SET_DEST (set)) == bl->regno)
7960 /* An insn that sets the biv is okay. */
7962 else if ((p == prev_nonnote_insn (prev_nonnote_insn (loop_end))
7963 || p == prev_nonnote_insn (loop_end))
7964 && reg_mentioned_p (bivreg, PATTERN (p)))
7966 /* If either of these insns uses the biv and sets a pseudo
7967 that has more than one usage, then the biv has uses
7968 other than counting since it's used to derive a value
7969 that is used more than one time. */
7970 note_stores (PATTERN (p), note_set_pseudo_multiple_uses,
7972 if (regs->multiple_uses)
7974 no_use_except_counting = 0;
7978 else if (reg_mentioned_p (bivreg, PATTERN (p)))
7980 no_use_except_counting = 0;
7985 /* A biv has uses besides counting if it is used to set another biv. */
7986 for (blt = ivs->list; blt; blt = blt->next)
7987 if (blt->init_set && reg_mentioned_p (bivreg, SET_SRC (blt->init_set)))
7989 no_use_except_counting = 0;
7994 if (no_use_except_counting)
7995 /* No need to worry about MEMs. */
7997 else if (loop_info->num_mem_sets <= 1)
7999 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
8001 num_nonfixed_reads += count_nonfixed_reads (loop, PATTERN (p));
8003 /* If the loop has a single store, and the destination address is
8004 invariant, then we can't reverse the loop, because this address
8005 might then have the wrong value at loop exit.
8006 This would work if the source was invariant also, however, in that
8007 case, the insn should have been moved out of the loop. */
8009 if (loop_info->num_mem_sets == 1)
8011 struct induction *v;
8013 /* If we could prove that each of the memory locations
8014 written to was different, then we could reverse the
8015 store -- but we don't presently have any way of
8017 reversible_mem_store = 0;
8019 /* If the store depends on a register that is set after the
8020 store, it depends on the initial value, and is thus not
8022 for (v = bl->giv; reversible_mem_store && v; v = v->next_iv)
8024 if (v->giv_type == DEST_REG
8025 && reg_mentioned_p (v->dest_reg,
8026 PATTERN (loop_info->first_loop_store_insn))
8027 && loop_insn_first_p (loop_info->first_loop_store_insn,
8029 reversible_mem_store = 0;
8036 /* This code only acts for innermost loops. Also it simplifies
8037 the memory address check by only reversing loops with
8038 zero or one memory access.
8039 Two memory accesses could involve parts of the same array,
8040 and that can't be reversed.
8041 If the biv is used only for counting, than we don't need to worry
8042 about all these things. */
8044 if ((num_nonfixed_reads <= 1
8045 && ! loop_info->has_nonconst_call
8046 && ! loop_info->has_volatile
8047 && reversible_mem_store
8048 && (bl->giv_count + bl->biv_count + loop_info->num_mem_sets
8049 + num_unmoved_movables (loop) + compare_and_branch == insn_count)
8050 && (bl == ivs->list && bl->next == 0))
8051 || no_use_except_counting)
8055 /* Loop can be reversed. */
8056 if (loop_dump_stream)
8057 fprintf (loop_dump_stream, "Can reverse loop\n");
8059 /* Now check other conditions:
8061 The increment must be a constant, as must the initial value,
8062 and the comparison code must be LT.
8064 This test can probably be improved since +/- 1 in the constant
8065 can be obtained by changing LT to LE and vice versa; this is
8069 /* for constants, LE gets turned into LT */
8070 && (GET_CODE (comparison) == LT
8071 || (GET_CODE (comparison) == LE
8072 && no_use_except_counting)))
8074 HOST_WIDE_INT add_val, add_adjust, comparison_val = 0;
8075 rtx initial_value, comparison_value;
8077 enum rtx_code cmp_code;
8078 int comparison_const_width;
8079 unsigned HOST_WIDE_INT comparison_sign_mask;
8081 add_val = INTVAL (bl->biv->add_val);
8082 comparison_value = XEXP (comparison, 1);
8083 if (GET_MODE (comparison_value) == VOIDmode)
8084 comparison_const_width
8085 = GET_MODE_BITSIZE (GET_MODE (XEXP (comparison, 0)));
8087 comparison_const_width
8088 = GET_MODE_BITSIZE (GET_MODE (comparison_value));
8089 if (comparison_const_width > HOST_BITS_PER_WIDE_INT)
8090 comparison_const_width = HOST_BITS_PER_WIDE_INT;
8091 comparison_sign_mask
8092 = (unsigned HOST_WIDE_INT) 1 << (comparison_const_width - 1);
8094 /* If the comparison value is not a loop invariant, then we
8095 can not reverse this loop.
8097 ??? If the insns which initialize the comparison value as
8098 a whole compute an invariant result, then we could move
8099 them out of the loop and proceed with loop reversal. */
8100 if (! loop_invariant_p (loop, comparison_value))
8103 if (GET_CODE (comparison_value) == CONST_INT)
8104 comparison_val = INTVAL (comparison_value);
8105 initial_value = bl->initial_value;
8107 /* Normalize the initial value if it is an integer and
8108 has no other use except as a counter. This will allow
8109 a few more loops to be reversed. */
8110 if (no_use_except_counting
8111 && GET_CODE (comparison_value) == CONST_INT
8112 && GET_CODE (initial_value) == CONST_INT)
8114 comparison_val = comparison_val - INTVAL (bl->initial_value);
8115 /* The code below requires comparison_val to be a multiple
8116 of add_val in order to do the loop reversal, so
8117 round up comparison_val to a multiple of add_val.
8118 Since comparison_value is constant, we know that the
8119 current comparison code is LT. */
8120 comparison_val = comparison_val + add_val - 1;
8122 -= (unsigned HOST_WIDE_INT) comparison_val % add_val;
8123 /* We postpone overflow checks for COMPARISON_VAL here;
8124 even if there is an overflow, we might still be able to
8125 reverse the loop, if converting the loop exit test to
8127 initial_value = const0_rtx;
8130 /* First check if we can do a vanilla loop reversal. */
8131 if (initial_value == const0_rtx
8132 /* If we have a decrement_and_branch_on_count,
8133 prefer the NE test, since this will allow that
8134 instruction to be generated. Note that we must
8135 use a vanilla loop reversal if the biv is used to
8136 calculate a giv or has a non-counting use. */
8137 #if ! defined (HAVE_decrement_and_branch_until_zero) \
8138 && defined (HAVE_decrement_and_branch_on_count)
8139 && (! (add_val == 1 && loop->vtop
8140 && (bl->biv_count == 0
8141 || no_use_except_counting)))
8143 && GET_CODE (comparison_value) == CONST_INT
8144 /* Now do postponed overflow checks on COMPARISON_VAL. */
8145 && ! (((comparison_val - add_val) ^ INTVAL (comparison_value))
8146 & comparison_sign_mask))
8148 /* Register will always be nonnegative, with value
8149 0 on last iteration */
8150 add_adjust = add_val;
8154 else if (add_val == 1 && loop->vtop
8155 && (bl->biv_count == 0
8156 || no_use_except_counting))
8164 if (GET_CODE (comparison) == LE)
8165 add_adjust -= add_val;
8167 /* If the initial value is not zero, or if the comparison
8168 value is not an exact multiple of the increment, then we
8169 can not reverse this loop. */
8170 if (initial_value == const0_rtx
8171 && GET_CODE (comparison_value) == CONST_INT)
8173 if (((unsigned HOST_WIDE_INT) comparison_val % add_val) != 0)
8178 if (! no_use_except_counting || add_val != 1)
8182 final_value = comparison_value;
8184 /* Reset these in case we normalized the initial value
8185 and comparison value above. */
8186 if (GET_CODE (comparison_value) == CONST_INT
8187 && GET_CODE (initial_value) == CONST_INT)
8189 comparison_value = GEN_INT (comparison_val);
8191 = GEN_INT (comparison_val + INTVAL (bl->initial_value));
8193 bl->initial_value = initial_value;
8195 /* Save some info needed to produce the new insns. */
8196 reg = bl->biv->dest_reg;
8197 jump_label = condjump_label (PREV_INSN (loop_end));
8198 new_add_val = GEN_INT (-INTVAL (bl->biv->add_val));
8200 /* Set start_value; if this is not a CONST_INT, we need
8202 Initialize biv to start_value before loop start.
8203 The old initializing insn will be deleted as a
8204 dead store by flow.c. */
8205 if (initial_value == const0_rtx
8206 && GET_CODE (comparison_value) == CONST_INT)
8208 start_value = GEN_INT (comparison_val - add_adjust);
8209 loop_insn_hoist (loop, gen_move_insn (reg, start_value));
8211 else if (GET_CODE (initial_value) == CONST_INT)
8213 enum machine_mode mode = GET_MODE (reg);
8214 rtx offset = GEN_INT (-INTVAL (initial_value) - add_adjust);
8215 rtx add_insn = gen_add3_insn (reg, comparison_value, offset);
8221 = gen_rtx_PLUS (mode, comparison_value, offset);
8222 loop_insn_hoist (loop, add_insn);
8223 if (GET_CODE (comparison) == LE)
8224 final_value = gen_rtx_PLUS (mode, comparison_value,
8227 else if (! add_adjust)
8229 enum machine_mode mode = GET_MODE (reg);
8230 rtx sub_insn = gen_sub3_insn (reg, comparison_value,
8236 = gen_rtx_MINUS (mode, comparison_value, initial_value);
8237 loop_insn_hoist (loop, sub_insn);
8240 /* We could handle the other cases too, but it'll be
8241 better to have a testcase first. */
8244 /* We may not have a single insn which can increment a reg, so
8245 create a sequence to hold all the insns from expand_inc. */
8247 expand_inc (reg, new_add_val);
8248 tem = gen_sequence ();
8251 p = loop_insn_emit_before (loop, 0, bl->biv->insn, tem);
8252 delete_insn (bl->biv->insn);
8254 /* Update biv info to reflect its new status. */
8256 bl->initial_value = start_value;
8257 bl->biv->add_val = new_add_val;
8259 /* Update loop info. */
8260 loop_info->initial_value = reg;
8261 loop_info->initial_equiv_value = reg;
8262 loop_info->final_value = const0_rtx;
8263 loop_info->final_equiv_value = const0_rtx;
8264 loop_info->comparison_value = const0_rtx;
8265 loop_info->comparison_code = cmp_code;
8266 loop_info->increment = new_add_val;
8268 /* Inc LABEL_NUSES so that delete_insn will
8269 not delete the label. */
8270 LABEL_NUSES (XEXP (jump_label, 0))++;
8272 /* Emit an insn after the end of the loop to set the biv's
8273 proper exit value if it is used anywhere outside the loop. */
8274 if ((REGNO_LAST_UID (bl->regno) != INSN_UID (first_compare))
8276 || REGNO_FIRST_UID (bl->regno) != INSN_UID (bl->init_insn))
8277 loop_insn_sink (loop, gen_move_insn (reg, final_value));
8279 /* Delete compare/branch at end of loop. */
8280 delete_related_insns (PREV_INSN (loop_end));
8281 if (compare_and_branch == 2)
8282 delete_related_insns (first_compare);
8284 /* Add new compare/branch insn at end of loop. */
8286 emit_cmp_and_jump_insns (reg, const0_rtx, cmp_code, NULL_RTX,
8288 XEXP (jump_label, 0));
8289 tem = gen_sequence ();
8291 emit_jump_insn_before (tem, loop_end);
8293 for (tem = PREV_INSN (loop_end);
8294 tem && GET_CODE (tem) != JUMP_INSN;
8295 tem = PREV_INSN (tem))
8299 JUMP_LABEL (tem) = XEXP (jump_label, 0);
8305 /* Increment of LABEL_NUSES done above. */
8306 /* Register is now always nonnegative,
8307 so add REG_NONNEG note to the branch. */
8308 REG_NOTES (tem) = gen_rtx_EXPR_LIST (REG_NONNEG, reg,
8314 /* No insn may reference both the reversed and another biv or it
8315 will fail (see comment near the top of the loop reversal
8317 Earlier on, we have verified that the biv has no use except
8318 counting, or it is the only biv in this function.
8319 However, the code that computes no_use_except_counting does
8320 not verify reg notes. It's possible to have an insn that
8321 references another biv, and has a REG_EQUAL note with an
8322 expression based on the reversed biv. To avoid this case,
8323 remove all REG_EQUAL notes based on the reversed biv
8325 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
8329 rtx set = single_set (p);
8330 /* If this is a set of a GIV based on the reversed biv, any
8331 REG_EQUAL notes should still be correct. */
8333 || GET_CODE (SET_DEST (set)) != REG
8334 || (size_t) REGNO (SET_DEST (set)) >= ivs->n_regs
8335 || REG_IV_TYPE (ivs, REGNO (SET_DEST (set))) != GENERAL_INDUCT
8336 || REG_IV_INFO (ivs, REGNO (SET_DEST (set)))->src_reg != bl->biv->src_reg)
8337 for (pnote = ®_NOTES (p); *pnote;)
8339 if (REG_NOTE_KIND (*pnote) == REG_EQUAL
8340 && reg_mentioned_p (regno_reg_rtx[bl->regno],
8342 *pnote = XEXP (*pnote, 1);
8344 pnote = &XEXP (*pnote, 1);
8348 /* Mark that this biv has been reversed. Each giv which depends
8349 on this biv, and which is also live past the end of the loop
8350 will have to be fixed up. */
8354 if (loop_dump_stream)
8356 fprintf (loop_dump_stream, "Reversed loop");
8358 fprintf (loop_dump_stream, " and added reg_nonneg\n");
8360 fprintf (loop_dump_stream, "\n");
8371 /* Verify whether the biv BL appears to be eliminable,
8372 based on the insns in the loop that refer to it.
8374 If ELIMINATE_P is non-zero, actually do the elimination.
8376 THRESHOLD and INSN_COUNT are from loop_optimize and are used to
8377 determine whether invariant insns should be placed inside or at the
8378 start of the loop. */
8381 maybe_eliminate_biv (loop, bl, eliminate_p, threshold, insn_count)
8382 const struct loop *loop;
8383 struct iv_class *bl;
8385 int threshold, insn_count;
8387 struct loop_ivs *ivs = LOOP_IVS (loop);
8388 rtx reg = bl->biv->dest_reg;
8391 /* Scan all insns in the loop, stopping if we find one that uses the
8392 biv in a way that we cannot eliminate. */
8394 for (p = loop->start; p != loop->end; p = NEXT_INSN (p))
8396 enum rtx_code code = GET_CODE (p);
8397 basic_block where_bb = 0;
8398 rtx where_insn = threshold >= insn_count ? 0 : p;
8400 /* If this is a libcall that sets a giv, skip ahead to its end. */
8401 if (GET_RTX_CLASS (code) == 'i')
8403 rtx note = find_reg_note (p, REG_LIBCALL, NULL_RTX);
8407 rtx last = XEXP (note, 0);
8408 rtx set = single_set (last);
8410 if (set && GET_CODE (SET_DEST (set)) == REG)
8412 unsigned int regno = REGNO (SET_DEST (set));
8414 if (regno < ivs->n_regs
8415 && REG_IV_TYPE (ivs, regno) == GENERAL_INDUCT
8416 && REG_IV_INFO (ivs, regno)->src_reg == bl->biv->src_reg)
8421 if ((code == INSN || code == JUMP_INSN || code == CALL_INSN)
8422 && reg_mentioned_p (reg, PATTERN (p))
8423 && ! maybe_eliminate_biv_1 (loop, PATTERN (p), p, bl,
8424 eliminate_p, where_bb, where_insn))
8426 if (loop_dump_stream)
8427 fprintf (loop_dump_stream,
8428 "Cannot eliminate biv %d: biv used in insn %d.\n",
8429 bl->regno, INSN_UID (p));
8436 if (loop_dump_stream)
8437 fprintf (loop_dump_stream, "biv %d %s eliminated.\n",
8438 bl->regno, eliminate_p ? "was" : "can be");
8445 /* INSN and REFERENCE are instructions in the same insn chain.
8446 Return non-zero if INSN is first. */
8449 loop_insn_first_p (insn, reference)
8450 rtx insn, reference;
8454 for (p = insn, q = reference;;)
8456 /* Start with test for not first so that INSN == REFERENCE yields not
8458 if (q == insn || ! p)
8460 if (p == reference || ! q)
8463 /* Either of P or Q might be a NOTE. Notes have the same LUID as the
8464 previous insn, hence the <= comparison below does not work if
8466 if (INSN_UID (p) < max_uid_for_loop
8467 && INSN_UID (q) < max_uid_for_loop
8468 && GET_CODE (p) != NOTE)
8469 return INSN_LUID (p) <= INSN_LUID (q);
8471 if (INSN_UID (p) >= max_uid_for_loop
8472 || GET_CODE (p) == NOTE)
8474 if (INSN_UID (q) >= max_uid_for_loop)
8479 /* We are trying to eliminate BIV in INSN using GIV. Return non-zero if
8480 the offset that we have to take into account due to auto-increment /
8481 div derivation is zero. */
8483 biv_elimination_giv_has_0_offset (biv, giv, insn)
8484 struct induction *biv, *giv;
8487 /* If the giv V had the auto-inc address optimization applied
8488 to it, and INSN occurs between the giv insn and the biv
8489 insn, then we'd have to adjust the value used here.
8490 This is rare, so we don't bother to make this possible. */
8491 if (giv->auto_inc_opt
8492 && ((loop_insn_first_p (giv->insn, insn)
8493 && loop_insn_first_p (insn, biv->insn))
8494 || (loop_insn_first_p (biv->insn, insn)
8495 && loop_insn_first_p (insn, giv->insn))))
8501 /* If BL appears in X (part of the pattern of INSN), see if we can
8502 eliminate its use. If so, return 1. If not, return 0.
8504 If BIV does not appear in X, return 1.
8506 If ELIMINATE_P is non-zero, actually do the elimination.
8507 WHERE_INSN/WHERE_BB indicate where extra insns should be added.
8508 Depending on how many items have been moved out of the loop, it
8509 will either be before INSN (when WHERE_INSN is non-zero) or at the
8510 start of the loop (when WHERE_INSN is zero). */
8513 maybe_eliminate_biv_1 (loop, x, insn, bl, eliminate_p, where_bb, where_insn)
8514 const struct loop *loop;
8516 struct iv_class *bl;
8518 basic_block where_bb;
8521 enum rtx_code code = GET_CODE (x);
8522 rtx reg = bl->biv->dest_reg;
8523 enum machine_mode mode = GET_MODE (reg);
8524 struct induction *v;
8536 /* If we haven't already been able to do something with this BIV,
8537 we can't eliminate it. */
8543 /* If this sets the BIV, it is not a problem. */
8544 if (SET_DEST (x) == reg)
8547 /* If this is an insn that defines a giv, it is also ok because
8548 it will go away when the giv is reduced. */
8549 for (v = bl->giv; v; v = v->next_iv)
8550 if (v->giv_type == DEST_REG && SET_DEST (x) == v->dest_reg)
8554 if (SET_DEST (x) == cc0_rtx && SET_SRC (x) == reg)
8556 /* Can replace with any giv that was reduced and
8557 that has (MULT_VAL != 0) and (ADD_VAL == 0).
8558 Require a constant for MULT_VAL, so we know it's nonzero.
8559 ??? We disable this optimization to avoid potential
8562 for (v = bl->giv; v; v = v->next_iv)
8563 if (GET_CODE (v->mult_val) == CONST_INT && v->mult_val != const0_rtx
8564 && v->add_val == const0_rtx
8565 && ! v->ignore && ! v->maybe_dead && v->always_computable
8569 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8575 /* If the giv has the opposite direction of change,
8576 then reverse the comparison. */
8577 if (INTVAL (v->mult_val) < 0)
8578 new = gen_rtx_COMPARE (GET_MODE (v->new_reg),
8579 const0_rtx, v->new_reg);
8583 /* We can probably test that giv's reduced reg. */
8584 if (validate_change (insn, &SET_SRC (x), new, 0))
8588 /* Look for a giv with (MULT_VAL != 0) and (ADD_VAL != 0);
8589 replace test insn with a compare insn (cmp REDUCED_GIV ADD_VAL).
8590 Require a constant for MULT_VAL, so we know it's nonzero.
8591 ??? Do this only if ADD_VAL is a pointer to avoid a potential
8592 overflow problem. */
8594 for (v = bl->giv; v; v = v->next_iv)
8595 if (GET_CODE (v->mult_val) == CONST_INT
8596 && v->mult_val != const0_rtx
8597 && ! v->ignore && ! v->maybe_dead && v->always_computable
8599 && (GET_CODE (v->add_val) == SYMBOL_REF
8600 || GET_CODE (v->add_val) == LABEL_REF
8601 || GET_CODE (v->add_val) == CONST
8602 || (GET_CODE (v->add_val) == REG
8603 && REG_POINTER (v->add_val))))
8605 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8611 /* If the giv has the opposite direction of change,
8612 then reverse the comparison. */
8613 if (INTVAL (v->mult_val) < 0)
8614 new = gen_rtx_COMPARE (VOIDmode, copy_rtx (v->add_val),
8617 new = gen_rtx_COMPARE (VOIDmode, v->new_reg,
8618 copy_rtx (v->add_val));
8620 /* Replace biv with the giv's reduced register. */
8621 update_reg_last_use (v->add_val, insn);
8622 if (validate_change (insn, &SET_SRC (PATTERN (insn)), new, 0))
8625 /* Insn doesn't support that constant or invariant. Copy it
8626 into a register (it will be a loop invariant.) */
8627 tem = gen_reg_rtx (GET_MODE (v->new_reg));
8629 loop_insn_emit_before (loop, 0, where_insn,
8631 copy_rtx (v->add_val)));
8633 /* Substitute the new register for its invariant value in
8634 the compare expression. */
8635 XEXP (new, (INTVAL (v->mult_val) < 0) ? 0 : 1) = tem;
8636 if (validate_change (insn, &SET_SRC (PATTERN (insn)), new, 0))
8645 case GT: case GE: case GTU: case GEU:
8646 case LT: case LE: case LTU: case LEU:
8647 /* See if either argument is the biv. */
8648 if (XEXP (x, 0) == reg)
8649 arg = XEXP (x, 1), arg_operand = 1;
8650 else if (XEXP (x, 1) == reg)
8651 arg = XEXP (x, 0), arg_operand = 0;
8655 if (CONSTANT_P (arg))
8657 /* First try to replace with any giv that has constant positive
8658 mult_val and constant add_val. We might be able to support
8659 negative mult_val, but it seems complex to do it in general. */
8661 for (v = bl->giv; v; v = v->next_iv)
8662 if (GET_CODE (v->mult_val) == CONST_INT
8663 && INTVAL (v->mult_val) > 0
8664 && (GET_CODE (v->add_val) == SYMBOL_REF
8665 || GET_CODE (v->add_val) == LABEL_REF
8666 || GET_CODE (v->add_val) == CONST
8667 || (GET_CODE (v->add_val) == REG
8668 && REG_POINTER (v->add_val)))
8669 && ! v->ignore && ! v->maybe_dead && v->always_computable
8672 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8678 /* Replace biv with the giv's reduced reg. */
8679 validate_change (insn, &XEXP (x, 1 - arg_operand), v->new_reg, 1);
8681 /* If all constants are actually constant integers and
8682 the derived constant can be directly placed in the COMPARE,
8684 if (GET_CODE (arg) == CONST_INT
8685 && GET_CODE (v->mult_val) == CONST_INT
8686 && GET_CODE (v->add_val) == CONST_INT)
8688 validate_change (insn, &XEXP (x, arg_operand),
8689 GEN_INT (INTVAL (arg)
8690 * INTVAL (v->mult_val)
8691 + INTVAL (v->add_val)), 1);
8695 /* Otherwise, load it into a register. */
8696 tem = gen_reg_rtx (mode);
8697 loop_iv_add_mult_emit_before (loop, arg,
8698 v->mult_val, v->add_val,
8699 tem, where_bb, where_insn);
8700 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
8702 if (apply_change_group ())
8706 /* Look for giv with positive constant mult_val and nonconst add_val.
8707 Insert insns to calculate new compare value.
8708 ??? Turn this off due to possible overflow. */
8710 for (v = bl->giv; v; v = v->next_iv)
8711 if (GET_CODE (v->mult_val) == CONST_INT
8712 && INTVAL (v->mult_val) > 0
8713 && ! v->ignore && ! v->maybe_dead && v->always_computable
8719 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8725 tem = gen_reg_rtx (mode);
8727 /* Replace biv with giv's reduced register. */
8728 validate_change (insn, &XEXP (x, 1 - arg_operand),
8731 /* Compute value to compare against. */
8732 loop_iv_add_mult_emit_before (loop, arg,
8733 v->mult_val, v->add_val,
8734 tem, where_bb, where_insn);
8735 /* Use it in this insn. */
8736 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
8737 if (apply_change_group ())
8741 else if (GET_CODE (arg) == REG || GET_CODE (arg) == MEM)
8743 if (loop_invariant_p (loop, arg) == 1)
8745 /* Look for giv with constant positive mult_val and nonconst
8746 add_val. Insert insns to compute new compare value.
8747 ??? Turn this off due to possible overflow. */
8749 for (v = bl->giv; v; v = v->next_iv)
8750 if (GET_CODE (v->mult_val) == CONST_INT && INTVAL (v->mult_val) > 0
8751 && ! v->ignore && ! v->maybe_dead && v->always_computable
8757 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8763 tem = gen_reg_rtx (mode);
8765 /* Replace biv with giv's reduced register. */
8766 validate_change (insn, &XEXP (x, 1 - arg_operand),
8769 /* Compute value to compare against. */
8770 loop_iv_add_mult_emit_before (loop, arg,
8771 v->mult_val, v->add_val,
8772 tem, where_bb, where_insn);
8773 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
8774 if (apply_change_group ())
8779 /* This code has problems. Basically, you can't know when
8780 seeing if we will eliminate BL, whether a particular giv
8781 of ARG will be reduced. If it isn't going to be reduced,
8782 we can't eliminate BL. We can try forcing it to be reduced,
8783 but that can generate poor code.
8785 The problem is that the benefit of reducing TV, below should
8786 be increased if BL can actually be eliminated, but this means
8787 we might have to do a topological sort of the order in which
8788 we try to process biv. It doesn't seem worthwhile to do
8789 this sort of thing now. */
8792 /* Otherwise the reg compared with had better be a biv. */
8793 if (GET_CODE (arg) != REG
8794 || REG_IV_TYPE (ivs, REGNO (arg)) != BASIC_INDUCT)
8797 /* Look for a pair of givs, one for each biv,
8798 with identical coefficients. */
8799 for (v = bl->giv; v; v = v->next_iv)
8801 struct induction *tv;
8803 if (v->ignore || v->maybe_dead || v->mode != mode)
8806 for (tv = REG_IV_CLASS (ivs, REGNO (arg))->giv; tv;
8808 if (! tv->ignore && ! tv->maybe_dead
8809 && rtx_equal_p (tv->mult_val, v->mult_val)
8810 && rtx_equal_p (tv->add_val, v->add_val)
8811 && tv->mode == mode)
8813 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8819 /* Replace biv with its giv's reduced reg. */
8820 XEXP (x, 1 - arg_operand) = v->new_reg;
8821 /* Replace other operand with the other giv's
8823 XEXP (x, arg_operand) = tv->new_reg;
8830 /* If we get here, the biv can't be eliminated. */
8834 /* If this address is a DEST_ADDR giv, it doesn't matter if the
8835 biv is used in it, since it will be replaced. */
8836 for (v = bl->giv; v; v = v->next_iv)
8837 if (v->giv_type == DEST_ADDR && v->location == &XEXP (x, 0))
8845 /* See if any subexpression fails elimination. */
8846 fmt = GET_RTX_FORMAT (code);
8847 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
8852 if (! maybe_eliminate_biv_1 (loop, XEXP (x, i), insn, bl,
8853 eliminate_p, where_bb, where_insn))
8858 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
8859 if (! maybe_eliminate_biv_1 (loop, XVECEXP (x, i, j), insn, bl,
8860 eliminate_p, where_bb, where_insn))
8869 /* Return nonzero if the last use of REG
8870 is in an insn following INSN in the same basic block. */
8873 last_use_this_basic_block (reg, insn)
8879 n && GET_CODE (n) != CODE_LABEL && GET_CODE (n) != JUMP_INSN;
8882 if (REGNO_LAST_UID (REGNO (reg)) == INSN_UID (n))
8888 /* Called via `note_stores' to record the initial value of a biv. Here we
8889 just record the location of the set and process it later. */
8892 record_initial (dest, set, data)
8895 void *data ATTRIBUTE_UNUSED;
8897 struct loop_ivs *ivs = (struct loop_ivs *) data;
8898 struct iv_class *bl;
8900 if (GET_CODE (dest) != REG
8901 || REGNO (dest) >= ivs->n_regs
8902 || REG_IV_TYPE (ivs, REGNO (dest)) != BASIC_INDUCT)
8905 bl = REG_IV_CLASS (ivs, REGNO (dest));
8907 /* If this is the first set found, record it. */
8908 if (bl->init_insn == 0)
8910 bl->init_insn = note_insn;
8915 /* If any of the registers in X are "old" and currently have a last use earlier
8916 than INSN, update them to have a last use of INSN. Their actual last use
8917 will be the previous insn but it will not have a valid uid_luid so we can't
8918 use it. X must be a source expression only. */
8921 update_reg_last_use (x, insn)
8925 /* Check for the case where INSN does not have a valid luid. In this case,
8926 there is no need to modify the regno_last_uid, as this can only happen
8927 when code is inserted after the loop_end to set a pseudo's final value,
8928 and hence this insn will never be the last use of x.
8929 ???? This comment is not correct. See for example loop_givs_reduce.
8930 This may insert an insn before another new insn. */
8931 if (GET_CODE (x) == REG && REGNO (x) < max_reg_before_loop
8932 && INSN_UID (insn) < max_uid_for_loop
8933 && REGNO_LAST_LUID (REGNO (x)) < INSN_LUID (insn))
8935 REGNO_LAST_UID (REGNO (x)) = INSN_UID (insn);
8940 const char *fmt = GET_RTX_FORMAT (GET_CODE (x));
8941 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
8944 update_reg_last_use (XEXP (x, i), insn);
8945 else if (fmt[i] == 'E')
8946 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
8947 update_reg_last_use (XVECEXP (x, i, j), insn);
8952 /* Given an insn INSN and condition COND, return the condition in a
8953 canonical form to simplify testing by callers. Specifically:
8955 (1) The code will always be a comparison operation (EQ, NE, GT, etc.).
8956 (2) Both operands will be machine operands; (cc0) will have been replaced.
8957 (3) If an operand is a constant, it will be the second operand.
8958 (4) (LE x const) will be replaced with (LT x <const+1>) and similarly
8959 for GE, GEU, and LEU.
8961 If the condition cannot be understood, or is an inequality floating-point
8962 comparison which needs to be reversed, 0 will be returned.
8964 If REVERSE is non-zero, then reverse the condition prior to canonizing it.
8966 If EARLIEST is non-zero, it is a pointer to a place where the earliest
8967 insn used in locating the condition was found. If a replacement test
8968 of the condition is desired, it should be placed in front of that
8969 insn and we will be sure that the inputs are still valid.
8971 If WANT_REG is non-zero, we wish the condition to be relative to that
8972 register, if possible. Therefore, do not canonicalize the condition
8976 canonicalize_condition (insn, cond, reverse, earliest, want_reg)
8988 int reverse_code = 0;
8989 enum machine_mode mode;
8991 code = GET_CODE (cond);
8992 mode = GET_MODE (cond);
8993 op0 = XEXP (cond, 0);
8994 op1 = XEXP (cond, 1);
8997 code = reversed_comparison_code (cond, insn);
8998 if (code == UNKNOWN)
9004 /* If we are comparing a register with zero, see if the register is set
9005 in the previous insn to a COMPARE or a comparison operation. Perform
9006 the same tests as a function of STORE_FLAG_VALUE as find_comparison_args
9009 while (GET_RTX_CLASS (code) == '<'
9010 && op1 == CONST0_RTX (GET_MODE (op0))
9013 /* Set non-zero when we find something of interest. */
9017 /* If comparison with cc0, import actual comparison from compare
9021 if ((prev = prev_nonnote_insn (prev)) == 0
9022 || GET_CODE (prev) != INSN
9023 || (set = single_set (prev)) == 0
9024 || SET_DEST (set) != cc0_rtx)
9027 op0 = SET_SRC (set);
9028 op1 = CONST0_RTX (GET_MODE (op0));
9034 /* If this is a COMPARE, pick up the two things being compared. */
9035 if (GET_CODE (op0) == COMPARE)
9037 op1 = XEXP (op0, 1);
9038 op0 = XEXP (op0, 0);
9041 else if (GET_CODE (op0) != REG)
9044 /* Go back to the previous insn. Stop if it is not an INSN. We also
9045 stop if it isn't a single set or if it has a REG_INC note because
9046 we don't want to bother dealing with it. */
9048 if ((prev = prev_nonnote_insn (prev)) == 0
9049 || GET_CODE (prev) != INSN
9050 || FIND_REG_INC_NOTE (prev, 0))
9053 set = set_of (op0, prev);
9056 && (GET_CODE (set) != SET
9057 || !rtx_equal_p (SET_DEST (set), op0)))
9060 /* If this is setting OP0, get what it sets it to if it looks
9064 enum machine_mode inner_mode = GET_MODE (SET_DEST (set));
9066 /* ??? We may not combine comparisons done in a CCmode with
9067 comparisons not done in a CCmode. This is to aid targets
9068 like Alpha that have an IEEE compliant EQ instruction, and
9069 a non-IEEE compliant BEQ instruction. The use of CCmode is
9070 actually artificial, simply to prevent the combination, but
9071 should not affect other platforms.
9073 However, we must allow VOIDmode comparisons to match either
9074 CCmode or non-CCmode comparison, because some ports have
9075 modeless comparisons inside branch patterns.
9077 ??? This mode check should perhaps look more like the mode check
9078 in simplify_comparison in combine. */
9080 if ((GET_CODE (SET_SRC (set)) == COMPARE
9083 && GET_MODE_CLASS (inner_mode) == MODE_INT
9084 && (GET_MODE_BITSIZE (inner_mode)
9085 <= HOST_BITS_PER_WIDE_INT)
9086 && (STORE_FLAG_VALUE
9087 & ((HOST_WIDE_INT) 1
9088 << (GET_MODE_BITSIZE (inner_mode) - 1))))
9089 #ifdef FLOAT_STORE_FLAG_VALUE
9091 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
9092 && (REAL_VALUE_NEGATIVE
9093 (FLOAT_STORE_FLAG_VALUE (inner_mode))))
9096 && GET_RTX_CLASS (GET_CODE (SET_SRC (set))) == '<'))
9097 && (((GET_MODE_CLASS (mode) == MODE_CC)
9098 == (GET_MODE_CLASS (inner_mode) == MODE_CC))
9099 || mode == VOIDmode || inner_mode == VOIDmode))
9101 else if (((code == EQ
9103 && (GET_MODE_BITSIZE (inner_mode)
9104 <= HOST_BITS_PER_WIDE_INT)
9105 && GET_MODE_CLASS (inner_mode) == MODE_INT
9106 && (STORE_FLAG_VALUE
9107 & ((HOST_WIDE_INT) 1
9108 << (GET_MODE_BITSIZE (inner_mode) - 1))))
9109 #ifdef FLOAT_STORE_FLAG_VALUE
9111 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
9112 && (REAL_VALUE_NEGATIVE
9113 (FLOAT_STORE_FLAG_VALUE (inner_mode))))
9116 && GET_RTX_CLASS (GET_CODE (SET_SRC (set))) == '<'
9117 && (((GET_MODE_CLASS (mode) == MODE_CC)
9118 == (GET_MODE_CLASS (inner_mode) == MODE_CC))
9119 || mode == VOIDmode || inner_mode == VOIDmode))
9129 else if (reg_set_p (op0, prev))
9130 /* If this sets OP0, but not directly, we have to give up. */
9135 if (GET_RTX_CLASS (GET_CODE (x)) == '<')
9136 code = GET_CODE (x);
9139 code = reversed_comparison_code (x, prev);
9140 if (code == UNKNOWN)
9145 op0 = XEXP (x, 0), op1 = XEXP (x, 1);
9151 /* If constant is first, put it last. */
9152 if (CONSTANT_P (op0))
9153 code = swap_condition (code), tem = op0, op0 = op1, op1 = tem;
9155 /* If OP0 is the result of a comparison, we weren't able to find what
9156 was really being compared, so fail. */
9157 if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_CC)
9160 /* Canonicalize any ordered comparison with integers involving equality
9161 if we can do computations in the relevant mode and we do not
9164 if (GET_CODE (op1) == CONST_INT
9165 && GET_MODE (op0) != VOIDmode
9166 && GET_MODE_BITSIZE (GET_MODE (op0)) <= HOST_BITS_PER_WIDE_INT)
9168 HOST_WIDE_INT const_val = INTVAL (op1);
9169 unsigned HOST_WIDE_INT uconst_val = const_val;
9170 unsigned HOST_WIDE_INT max_val
9171 = (unsigned HOST_WIDE_INT) GET_MODE_MASK (GET_MODE (op0));
9176 if ((unsigned HOST_WIDE_INT) const_val != max_val >> 1)
9177 code = LT, op1 = GEN_INT (const_val + 1);
9180 /* When cross-compiling, const_val might be sign-extended from
9181 BITS_PER_WORD to HOST_BITS_PER_WIDE_INT */
9183 if ((HOST_WIDE_INT) (const_val & max_val)
9184 != (((HOST_WIDE_INT) 1
9185 << (GET_MODE_BITSIZE (GET_MODE (op0)) - 1))))
9186 code = GT, op1 = GEN_INT (const_val - 1);
9190 if (uconst_val < max_val)
9191 code = LTU, op1 = GEN_INT (uconst_val + 1);
9195 if (uconst_val != 0)
9196 code = GTU, op1 = GEN_INT (uconst_val - 1);
9205 /* Never return CC0; return zero instead. */
9210 return gen_rtx_fmt_ee (code, VOIDmode, op0, op1);
9213 /* Given a jump insn JUMP, return the condition that will cause it to branch
9214 to its JUMP_LABEL. If the condition cannot be understood, or is an
9215 inequality floating-point comparison which needs to be reversed, 0 will
9218 If EARLIEST is non-zero, it is a pointer to a place where the earliest
9219 insn used in locating the condition was found. If a replacement test
9220 of the condition is desired, it should be placed in front of that
9221 insn and we will be sure that the inputs are still valid. */
9224 get_condition (jump, earliest)
9232 /* If this is not a standard conditional jump, we can't parse it. */
9233 if (GET_CODE (jump) != JUMP_INSN
9234 || ! any_condjump_p (jump))
9236 set = pc_set (jump);
9238 cond = XEXP (SET_SRC (set), 0);
9240 /* If this branches to JUMP_LABEL when the condition is false, reverse
9243 = GET_CODE (XEXP (SET_SRC (set), 2)) == LABEL_REF
9244 && XEXP (XEXP (SET_SRC (set), 2), 0) == JUMP_LABEL (jump);
9246 return canonicalize_condition (jump, cond, reverse, earliest, NULL_RTX);
9249 /* Similar to above routine, except that we also put an invariant last
9250 unless both operands are invariants. */
9253 get_condition_for_loop (loop, x)
9254 const struct loop *loop;
9257 rtx comparison = get_condition (x, (rtx*)0);
9260 || ! loop_invariant_p (loop, XEXP (comparison, 0))
9261 || loop_invariant_p (loop, XEXP (comparison, 1)))
9264 return gen_rtx_fmt_ee (swap_condition (GET_CODE (comparison)), VOIDmode,
9265 XEXP (comparison, 1), XEXP (comparison, 0));
9268 /* Scan the function and determine whether it has indirect (computed) jumps.
9270 This is taken mostly from flow.c; similar code exists elsewhere
9271 in the compiler. It may be useful to put this into rtlanal.c. */
9273 indirect_jump_in_function_p (start)
9278 for (insn = start; insn; insn = NEXT_INSN (insn))
9279 if (computed_jump_p (insn))
9285 /* Add MEM to the LOOP_MEMS array, if appropriate. See the
9286 documentation for LOOP_MEMS for the definition of `appropriate'.
9287 This function is called from prescan_loop via for_each_rtx. */
9290 insert_loop_mem (mem, data)
9292 void *data ATTRIBUTE_UNUSED;
9294 struct loop_info *loop_info = data;
9301 switch (GET_CODE (m))
9307 /* We're not interested in MEMs that are only clobbered. */
9311 /* We're not interested in the MEM associated with a
9312 CONST_DOUBLE, so there's no need to traverse into this. */
9316 /* We're not interested in any MEMs that only appear in notes. */
9320 /* This is not a MEM. */
9324 /* See if we've already seen this MEM. */
9325 for (i = 0; i < loop_info->mems_idx; ++i)
9326 if (rtx_equal_p (m, loop_info->mems[i].mem))
9328 if (GET_MODE (m) != GET_MODE (loop_info->mems[i].mem))
9329 /* The modes of the two memory accesses are different. If
9330 this happens, something tricky is going on, and we just
9331 don't optimize accesses to this MEM. */
9332 loop_info->mems[i].optimize = 0;
9337 /* Resize the array, if necessary. */
9338 if (loop_info->mems_idx == loop_info->mems_allocated)
9340 if (loop_info->mems_allocated != 0)
9341 loop_info->mems_allocated *= 2;
9343 loop_info->mems_allocated = 32;
9345 loop_info->mems = (loop_mem_info *)
9346 xrealloc (loop_info->mems,
9347 loop_info->mems_allocated * sizeof (loop_mem_info));
9350 /* Actually insert the MEM. */
9351 loop_info->mems[loop_info->mems_idx].mem = m;
9352 /* We can't hoist this MEM out of the loop if it's a BLKmode MEM
9353 because we can't put it in a register. We still store it in the
9354 table, though, so that if we see the same address later, but in a
9355 non-BLK mode, we'll not think we can optimize it at that point. */
9356 loop_info->mems[loop_info->mems_idx].optimize = (GET_MODE (m) != BLKmode);
9357 loop_info->mems[loop_info->mems_idx].reg = NULL_RTX;
9358 ++loop_info->mems_idx;
9364 /* Allocate REGS->ARRAY or reallocate it if it is too small.
9366 Increment REGS->ARRAY[I].SET_IN_LOOP at the index I of each
9367 register that is modified by an insn between FROM and TO. If the
9368 value of an element of REGS->array[I].SET_IN_LOOP becomes 127 or
9369 more, stop incrementing it, to avoid overflow.
9371 Store in REGS->ARRAY[I].SINGLE_USAGE the single insn in which
9372 register I is used, if it is only used once. Otherwise, it is set
9373 to 0 (for no uses) or const0_rtx for more than one use. This
9374 parameter may be zero, in which case this processing is not done.
9376 Set REGS->ARRAY[I].MAY_NOT_OPTIMIZE nonzero if we should not
9377 optimize register I. */
9380 loop_regs_scan (loop, extra_size)
9381 const struct loop *loop;
9384 struct loop_regs *regs = LOOP_REGS (loop);
9386 /* last_set[n] is nonzero iff reg n has been set in the current
9387 basic block. In that case, it is the insn that last set reg n. */
9392 old_nregs = regs->num;
9393 regs->num = max_reg_num ();
9395 /* Grow the regs array if not allocated or too small. */
9396 if (regs->num >= regs->size)
9398 regs->size = regs->num + extra_size;
9400 regs->array = (struct loop_reg *)
9401 xrealloc (regs->array, regs->size * sizeof (*regs->array));
9403 /* Zero the new elements. */
9404 memset (regs->array + old_nregs, 0,
9405 (regs->size - old_nregs) * sizeof (*regs->array));
9408 /* Clear previously scanned fields but do not clear n_times_set. */
9409 for (i = 0; i < old_nregs; i++)
9411 regs->array[i].set_in_loop = 0;
9412 regs->array[i].may_not_optimize = 0;
9413 regs->array[i].single_usage = NULL_RTX;
9416 last_set = (rtx *) xcalloc (regs->num, sizeof (rtx));
9418 /* Scan the loop, recording register usage. */
9419 for (insn = loop->top ? loop->top : loop->start; insn != loop->end;
9420 insn = NEXT_INSN (insn))
9424 /* Record registers that have exactly one use. */
9425 find_single_use_in_loop (regs, insn, PATTERN (insn));
9427 /* Include uses in REG_EQUAL notes. */
9428 if (REG_NOTES (insn))
9429 find_single_use_in_loop (regs, insn, REG_NOTES (insn));
9431 if (GET_CODE (PATTERN (insn)) == SET
9432 || GET_CODE (PATTERN (insn)) == CLOBBER)
9433 count_one_set (regs, insn, PATTERN (insn), last_set);
9434 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
9437 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
9438 count_one_set (regs, insn, XVECEXP (PATTERN (insn), 0, i),
9443 if (GET_CODE (insn) == CODE_LABEL || GET_CODE (insn) == JUMP_INSN)
9444 memset (last_set, 0, regs->num * sizeof (rtx));
9447 /* Invalidate all hard registers clobbered by calls. With one exception:
9448 a call-clobbered PIC register is still function-invariant for our
9449 purposes, since we can hoist any PIC calculations out of the loop.
9450 Thus the call to rtx_varies_p. */
9451 if (LOOP_INFO (loop)->has_call)
9452 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
9453 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i)
9454 && rtx_varies_p (gen_rtx_REG (Pmode, i), /*for_alias=*/1))
9456 regs->array[i].may_not_optimize = 1;
9457 regs->array[i].set_in_loop = 1;
9460 #ifdef AVOID_CCMODE_COPIES
9461 /* Don't try to move insns which set CC registers if we should not
9462 create CCmode register copies. */
9463 for (i = regs->num - 1; i >= FIRST_PSEUDO_REGISTER; i--)
9464 if (GET_MODE_CLASS (GET_MODE (regno_reg_rtx[i])) == MODE_CC)
9465 regs->array[i].may_not_optimize = 1;
9468 /* Set regs->array[I].n_times_set for the new registers. */
9469 for (i = old_nregs; i < regs->num; i++)
9470 regs->array[i].n_times_set = regs->array[i].set_in_loop;
9475 /* Returns the number of real INSNs in the LOOP. */
9478 count_insns_in_loop (loop)
9479 const struct loop *loop;
9484 for (insn = loop->top ? loop->top : loop->start; insn != loop->end;
9485 insn = NEXT_INSN (insn))
9492 /* Move MEMs into registers for the duration of the loop. */
9496 const struct loop *loop;
9498 struct loop_info *loop_info = LOOP_INFO (loop);
9499 struct loop_regs *regs = LOOP_REGS (loop);
9500 int maybe_never = 0;
9502 rtx p, prev_ebb_head;
9503 rtx label = NULL_RTX;
9505 /* Nonzero if the next instruction may never be executed. */
9506 int next_maybe_never = 0;
9507 unsigned int last_max_reg = max_reg_num ();
9509 if (loop_info->mems_idx == 0)
9512 /* We cannot use next_label here because it skips over normal insns. */
9513 end_label = next_nonnote_insn (loop->end);
9514 if (end_label && GET_CODE (end_label) != CODE_LABEL)
9515 end_label = NULL_RTX;
9517 /* Check to see if it's possible that some instructions in the loop are
9518 never executed. Also check if there is a goto out of the loop other
9519 than right after the end of the loop. */
9520 for (p = next_insn_in_loop (loop, loop->scan_start);
9522 p = next_insn_in_loop (loop, p))
9524 if (GET_CODE (p) == CODE_LABEL)
9526 else if (GET_CODE (p) == JUMP_INSN
9527 /* If we enter the loop in the middle, and scan
9528 around to the beginning, don't set maybe_never
9529 for that. This must be an unconditional jump,
9530 otherwise the code at the top of the loop might
9531 never be executed. Unconditional jumps are
9532 followed a by barrier then loop end. */
9533 && ! (GET_CODE (p) == JUMP_INSN
9534 && JUMP_LABEL (p) == loop->top
9535 && NEXT_INSN (NEXT_INSN (p)) == loop->end
9536 && any_uncondjump_p (p)))
9538 /* If this is a jump outside of the loop but not right
9539 after the end of the loop, we would have to emit new fixup
9540 sequences for each such label. */
9541 if (/* If we can't tell where control might go when this
9542 JUMP_INSN is executed, we must be conservative. */
9544 || (JUMP_LABEL (p) != end_label
9545 && (INSN_UID (JUMP_LABEL (p)) >= max_uid_for_loop
9546 || INSN_LUID (JUMP_LABEL (p)) < INSN_LUID (loop->start)
9547 || INSN_LUID (JUMP_LABEL (p)) > INSN_LUID (loop->end))))
9550 if (!any_condjump_p (p))
9551 /* Something complicated. */
9554 /* If there are any more instructions in the loop, they
9555 might not be reached. */
9556 next_maybe_never = 1;
9558 else if (next_maybe_never)
9562 /* Find start of the extended basic block that enters the loop. */
9563 for (p = loop->start;
9564 PREV_INSN (p) && GET_CODE (p) != CODE_LABEL;
9571 /* Build table of mems that get set to constant values before the
9573 for (; p != loop->start; p = NEXT_INSN (p))
9574 cselib_process_insn (p);
9576 /* Actually move the MEMs. */
9577 for (i = 0; i < loop_info->mems_idx; ++i)
9579 regset_head load_copies;
9580 regset_head store_copies;
9583 rtx mem = loop_info->mems[i].mem;
9586 if (MEM_VOLATILE_P (mem)
9587 || loop_invariant_p (loop, XEXP (mem, 0)) != 1)
9588 /* There's no telling whether or not MEM is modified. */
9589 loop_info->mems[i].optimize = 0;
9591 /* Go through the MEMs written to in the loop to see if this
9592 one is aliased by one of them. */
9593 mem_list_entry = loop_info->store_mems;
9594 while (mem_list_entry)
9596 if (rtx_equal_p (mem, XEXP (mem_list_entry, 0)))
9598 else if (true_dependence (XEXP (mem_list_entry, 0), VOIDmode,
9601 /* MEM is indeed aliased by this store. */
9602 loop_info->mems[i].optimize = 0;
9605 mem_list_entry = XEXP (mem_list_entry, 1);
9608 if (flag_float_store && written
9609 && GET_MODE_CLASS (GET_MODE (mem)) == MODE_FLOAT)
9610 loop_info->mems[i].optimize = 0;
9612 /* If this MEM is written to, we must be sure that there
9613 are no reads from another MEM that aliases this one. */
9614 if (loop_info->mems[i].optimize && written)
9618 for (j = 0; j < loop_info->mems_idx; ++j)
9622 else if (true_dependence (mem,
9624 loop_info->mems[j].mem,
9627 /* It's not safe to hoist loop_info->mems[i] out of
9628 the loop because writes to it might not be
9629 seen by reads from loop_info->mems[j]. */
9630 loop_info->mems[i].optimize = 0;
9636 if (maybe_never && may_trap_p (mem))
9637 /* We can't access the MEM outside the loop; it might
9638 cause a trap that wouldn't have happened otherwise. */
9639 loop_info->mems[i].optimize = 0;
9641 if (!loop_info->mems[i].optimize)
9642 /* We thought we were going to lift this MEM out of the
9643 loop, but later discovered that we could not. */
9646 INIT_REG_SET (&load_copies);
9647 INIT_REG_SET (&store_copies);
9649 /* Allocate a pseudo for this MEM. We set REG_USERVAR_P in
9650 order to keep scan_loop from moving stores to this MEM
9651 out of the loop just because this REG is neither a
9652 user-variable nor used in the loop test. */
9653 reg = gen_reg_rtx (GET_MODE (mem));
9654 REG_USERVAR_P (reg) = 1;
9655 loop_info->mems[i].reg = reg;
9657 /* Now, replace all references to the MEM with the
9658 corresponding pseudos. */
9660 for (p = next_insn_in_loop (loop, loop->scan_start);
9662 p = next_insn_in_loop (loop, p))
9668 set = single_set (p);
9670 /* See if this copies the mem into a register that isn't
9671 modified afterwards. We'll try to do copy propagation
9672 a little further on. */
9674 /* @@@ This test is _way_ too conservative. */
9676 && GET_CODE (SET_DEST (set)) == REG
9677 && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER
9678 && REGNO (SET_DEST (set)) < last_max_reg
9679 && regs->array[REGNO (SET_DEST (set))].n_times_set == 1
9680 && rtx_equal_p (SET_SRC (set), mem))
9681 SET_REGNO_REG_SET (&load_copies, REGNO (SET_DEST (set)));
9683 /* See if this copies the mem from a register that isn't
9684 modified afterwards. We'll try to remove the
9685 redundant copy later on by doing a little register
9686 renaming and copy propagation. This will help
9687 to untangle things for the BIV detection code. */
9690 && GET_CODE (SET_SRC (set)) == REG
9691 && REGNO (SET_SRC (set)) >= FIRST_PSEUDO_REGISTER
9692 && REGNO (SET_SRC (set)) < last_max_reg
9693 && regs->array[REGNO (SET_SRC (set))].n_times_set == 1
9694 && rtx_equal_p (SET_DEST (set), mem))
9695 SET_REGNO_REG_SET (&store_copies, REGNO (SET_SRC (set)));
9697 /* Replace the memory reference with the shadow register. */
9698 replace_loop_mems (p, loop_info->mems[i].mem,
9699 loop_info->mems[i].reg);
9702 if (GET_CODE (p) == CODE_LABEL
9703 || GET_CODE (p) == JUMP_INSN)
9707 if (! apply_change_group ())
9708 /* We couldn't replace all occurrences of the MEM. */
9709 loop_info->mems[i].optimize = 0;
9712 /* Load the memory immediately before LOOP->START, which is
9713 the NOTE_LOOP_BEG. */
9714 cselib_val *e = cselib_lookup (mem, VOIDmode, 0);
9718 struct elt_loc_list *const_equiv = 0;
9722 struct elt_loc_list *equiv;
9723 struct elt_loc_list *best_equiv = 0;
9724 for (equiv = e->locs; equiv; equiv = equiv->next)
9726 if (CONSTANT_P (equiv->loc))
9727 const_equiv = equiv;
9728 else if (GET_CODE (equiv->loc) == REG
9729 /* Extending hard register lifetimes causes crash
9730 on SRC targets. Doing so on non-SRC is
9731 probably also not good idea, since we most
9732 probably have pseudoregister equivalence as
9734 && REGNO (equiv->loc) >= FIRST_PSEUDO_REGISTER)
9737 /* Use the constant equivalence if that is cheap enough. */
9739 best_equiv = const_equiv;
9740 else if (const_equiv
9741 && (rtx_cost (const_equiv->loc, SET)
9742 <= rtx_cost (best_equiv->loc, SET)))
9744 best_equiv = const_equiv;
9748 /* If best_equiv is nonzero, we know that MEM is set to a
9749 constant or register before the loop. We will use this
9750 knowledge to initialize the shadow register with that
9751 constant or reg rather than by loading from MEM. */
9753 best = copy_rtx (best_equiv->loc);
9756 set = gen_move_insn (reg, best);
9757 set = loop_insn_hoist (loop, set);
9760 for (p = prev_ebb_head; p != loop->start; p = NEXT_INSN (p))
9761 if (REGNO_LAST_UID (REGNO (best)) == INSN_UID (p))
9763 REGNO_LAST_UID (REGNO (best)) = INSN_UID (set);
9769 set_unique_reg_note (set, REG_EQUAL, copy_rtx (const_equiv->loc));
9773 if (label == NULL_RTX)
9775 label = gen_label_rtx ();
9776 emit_label_after (label, loop->end);
9779 /* Store the memory immediately after END, which is
9780 the NOTE_LOOP_END. */
9781 set = gen_move_insn (copy_rtx (mem), reg);
9782 loop_insn_emit_after (loop, 0, label, set);
9785 if (loop_dump_stream)
9787 fprintf (loop_dump_stream, "Hoisted regno %d %s from ",
9788 REGNO (reg), (written ? "r/w" : "r/o"));
9789 print_rtl (loop_dump_stream, mem);
9790 fputc ('\n', loop_dump_stream);
9793 /* Attempt a bit of copy propagation. This helps untangle the
9794 data flow, and enables {basic,general}_induction_var to find
9796 EXECUTE_IF_SET_IN_REG_SET
9797 (&load_copies, FIRST_PSEUDO_REGISTER, j,
9799 try_copy_prop (loop, reg, j);
9801 CLEAR_REG_SET (&load_copies);
9803 EXECUTE_IF_SET_IN_REG_SET
9804 (&store_copies, FIRST_PSEUDO_REGISTER, j,
9806 try_swap_copy_prop (loop, reg, j);
9808 CLEAR_REG_SET (&store_copies);
9812 if (label != NULL_RTX && end_label != NULL_RTX)
9814 /* Now, we need to replace all references to the previous exit
9815 label with the new one. */
9820 for (p = loop->start; p != loop->end; p = NEXT_INSN (p))
9822 for_each_rtx (&p, replace_label, &rr);
9824 /* If this is a JUMP_INSN, then we also need to fix the JUMP_LABEL
9825 field. This is not handled by for_each_rtx because it doesn't
9826 handle unprinted ('0') fields. We need to update JUMP_LABEL
9827 because the immediately following unroll pass will use it.
9828 replace_label would not work anyways, because that only handles
9830 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p) == end_label)
9831 JUMP_LABEL (p) = label;
9838 /* For communication between note_reg_stored and its caller. */
9839 struct note_reg_stored_arg
9845 /* Called via note_stores, record in SET_SEEN whether X, which is written,
9848 note_reg_stored (x, setter, arg)
9849 rtx x, setter ATTRIBUTE_UNUSED;
9852 struct note_reg_stored_arg *t = (struct note_reg_stored_arg *) arg;
9857 /* Try to replace every occurrence of pseudo REGNO with REPLACEMENT.
9858 There must be exactly one insn that sets this pseudo; it will be
9859 deleted if all replacements succeed and we can prove that the register
9860 is not used after the loop. */
9863 try_copy_prop (loop, replacement, regno)
9864 const struct loop *loop;
9868 /* This is the reg that we are copying from. */
9869 rtx reg_rtx = regno_reg_rtx[regno];
9872 /* These help keep track of whether we replaced all uses of the reg. */
9873 int replaced_last = 0;
9874 int store_is_first = 0;
9876 for (insn = next_insn_in_loop (loop, loop->scan_start);
9878 insn = next_insn_in_loop (loop, insn))
9882 /* Only substitute within one extended basic block from the initializing
9884 if (GET_CODE (insn) == CODE_LABEL && init_insn)
9887 if (! INSN_P (insn))
9890 /* Is this the initializing insn? */
9891 set = single_set (insn);
9893 && GET_CODE (SET_DEST (set)) == REG
9894 && REGNO (SET_DEST (set)) == regno)
9900 if (REGNO_FIRST_UID (regno) == INSN_UID (insn))
9904 /* Only substitute after seeing the initializing insn. */
9905 if (init_insn && insn != init_insn)
9907 struct note_reg_stored_arg arg;
9909 replace_loop_regs (insn, reg_rtx, replacement);
9910 if (REGNO_LAST_UID (regno) == INSN_UID (insn))
9913 /* Stop replacing when REPLACEMENT is modified. */
9914 arg.reg = replacement;
9916 note_stores (PATTERN (insn), note_reg_stored, &arg);
9919 rtx note = find_reg_note (insn, REG_EQUAL, NULL);
9921 /* It is possible that we've turned previously valid REG_EQUAL to
9922 invalid, as we change the REGNO to REPLACEMENT and unlike REGNO,
9923 REPLACEMENT is modified, we get different meaning. */
9924 if (note && reg_mentioned_p (replacement, XEXP (note, 0)))
9925 remove_note (insn, note);
9932 if (apply_change_group ())
9934 if (loop_dump_stream)
9935 fprintf (loop_dump_stream, " Replaced reg %d", regno);
9936 if (store_is_first && replaced_last)
9941 /* Assume we're just deleting INIT_INSN. */
9943 /* Look for REG_RETVAL note. If we're deleting the end of
9944 the libcall sequence, the whole sequence can go. */
9945 retval_note = find_reg_note (init_insn, REG_RETVAL, NULL_RTX);
9946 /* If we found a REG_RETVAL note, find the first instruction
9949 first = XEXP (retval_note, 0);
9951 /* Delete the instructions. */
9952 loop_delete_insns (first, init_insn);
9954 if (loop_dump_stream)
9955 fprintf (loop_dump_stream, ".\n");
9959 /* Replace all the instructions from FIRST up to and including LAST
9960 with NOTE_INSN_DELETED notes. */
9963 loop_delete_insns (first, last)
9969 if (loop_dump_stream)
9970 fprintf (loop_dump_stream, ", deleting init_insn (%d)",
9972 delete_insn (first);
9974 /* If this was the LAST instructions we're supposed to delete,
9979 first = NEXT_INSN (first);
9983 /* Try to replace occurrences of pseudo REGNO with REPLACEMENT within
9984 loop LOOP if the order of the sets of these registers can be
9985 swapped. There must be exactly one insn within the loop that sets
9986 this pseudo followed immediately by a move insn that sets
9987 REPLACEMENT with REGNO. */
9989 try_swap_copy_prop (loop, replacement, regno)
9990 const struct loop *loop;
9996 unsigned int new_regno;
9998 new_regno = REGNO (replacement);
10000 for (insn = next_insn_in_loop (loop, loop->scan_start);
10002 insn = next_insn_in_loop (loop, insn))
10004 /* Search for the insn that copies REGNO to NEW_REGNO? */
10006 && (set = single_set (insn))
10007 && GET_CODE (SET_DEST (set)) == REG
10008 && REGNO (SET_DEST (set)) == new_regno
10009 && GET_CODE (SET_SRC (set)) == REG
10010 && REGNO (SET_SRC (set)) == regno)
10014 if (insn != NULL_RTX)
10019 /* Some DEF-USE info would come in handy here to make this
10020 function more general. For now, just check the previous insn
10021 which is the most likely candidate for setting REGNO. */
10023 prev_insn = PREV_INSN (insn);
10026 && (prev_set = single_set (prev_insn))
10027 && GET_CODE (SET_DEST (prev_set)) == REG
10028 && REGNO (SET_DEST (prev_set)) == regno)
10031 (set (reg regno) (expr))
10032 (set (reg new_regno) (reg regno))
10034 so try converting this to:
10035 (set (reg new_regno) (expr))
10036 (set (reg regno) (reg new_regno))
10038 The former construct is often generated when a global
10039 variable used for an induction variable is shadowed by a
10040 register (NEW_REGNO). The latter construct improves the
10041 chances of GIV replacement and BIV elimination. */
10043 validate_change (prev_insn, &SET_DEST (prev_set),
10045 validate_change (insn, &SET_DEST (set),
10047 validate_change (insn, &SET_SRC (set),
10050 if (apply_change_group ())
10052 if (loop_dump_stream)
10053 fprintf (loop_dump_stream,
10054 " Swapped set of reg %d at %d with reg %d at %d.\n",
10055 regno, INSN_UID (insn),
10056 new_regno, INSN_UID (prev_insn));
10058 /* Update first use of REGNO. */
10059 if (REGNO_FIRST_UID (regno) == INSN_UID (prev_insn))
10060 REGNO_FIRST_UID (regno) = INSN_UID (insn);
10062 /* Now perform copy propagation to hopefully
10063 remove all uses of REGNO within the loop. */
10064 try_copy_prop (loop, replacement, regno);
10070 /* Replace MEM with its associated pseudo register. This function is
10071 called from load_mems via for_each_rtx. DATA is actually a pointer
10072 to a structure describing the instruction currently being scanned
10073 and the MEM we are currently replacing. */
10076 replace_loop_mem (mem, data)
10080 loop_replace_args *args = (loop_replace_args *) data;
10086 switch (GET_CODE (m))
10092 /* We're not interested in the MEM associated with a
10093 CONST_DOUBLE, so there's no need to traverse into one. */
10097 /* This is not a MEM. */
10101 if (!rtx_equal_p (args->match, m))
10102 /* This is not the MEM we are currently replacing. */
10105 /* Actually replace the MEM. */
10106 validate_change (args->insn, mem, args->replacement, 1);
10112 replace_loop_mems (insn, mem, reg)
10117 loop_replace_args args;
10121 args.replacement = reg;
10123 for_each_rtx (&insn, replace_loop_mem, &args);
10126 /* Replace one register with another. Called through for_each_rtx; PX points
10127 to the rtx being scanned. DATA is actually a pointer to
10128 a structure of arguments. */
10131 replace_loop_reg (px, data)
10136 loop_replace_args *args = (loop_replace_args *) data;
10141 if (x == args->match)
10142 validate_change (args->insn, px, args->replacement, 1);
10148 replace_loop_regs (insn, reg, replacement)
10153 loop_replace_args args;
10157 args.replacement = replacement;
10159 for_each_rtx (&insn, replace_loop_reg, &args);
10162 /* Replace occurrences of the old exit label for the loop with the new
10163 one. DATA is an rtx_pair containing the old and new labels,
10167 replace_label (x, data)
10172 rtx old_label = ((rtx_pair *) data)->r1;
10173 rtx new_label = ((rtx_pair *) data)->r2;
10178 if (GET_CODE (l) != LABEL_REF)
10181 if (XEXP (l, 0) != old_label)
10184 XEXP (l, 0) = new_label;
10185 ++LABEL_NUSES (new_label);
10186 --LABEL_NUSES (old_label);
10191 /* Emit insn for PATTERN after WHERE_INSN in basic block WHERE_BB
10192 (ignored in the interim). */
10195 loop_insn_emit_after (loop, where_bb, where_insn, pattern)
10196 const struct loop *loop ATTRIBUTE_UNUSED;
10197 basic_block where_bb ATTRIBUTE_UNUSED;
10201 return emit_insn_after (pattern, where_insn);
10205 /* If WHERE_INSN is non-zero emit insn for PATTERN before WHERE_INSN
10206 in basic block WHERE_BB (ignored in the interim) within the loop
10207 otherwise hoist PATTERN into the loop pre-header. */
10210 loop_insn_emit_before (loop, where_bb, where_insn, pattern)
10211 const struct loop *loop;
10212 basic_block where_bb ATTRIBUTE_UNUSED;
10217 return loop_insn_hoist (loop, pattern);
10218 return emit_insn_before (pattern, where_insn);
10222 /* Emit call insn for PATTERN before WHERE_INSN in basic block
10223 WHERE_BB (ignored in the interim) within the loop. */
10226 loop_call_insn_emit_before (loop, where_bb, where_insn, pattern)
10227 const struct loop *loop ATTRIBUTE_UNUSED;
10228 basic_block where_bb ATTRIBUTE_UNUSED;
10232 return emit_call_insn_before (pattern, where_insn);
10236 /* Hoist insn for PATTERN into the loop pre-header. */
10239 loop_insn_hoist (loop, pattern)
10240 const struct loop *loop;
10243 return loop_insn_emit_before (loop, 0, loop->start, pattern);
10247 /* Hoist call insn for PATTERN into the loop pre-header. */
10250 loop_call_insn_hoist (loop, pattern)
10251 const struct loop *loop;
10254 return loop_call_insn_emit_before (loop, 0, loop->start, pattern);
10258 /* Sink insn for PATTERN after the loop end. */
10261 loop_insn_sink (loop, pattern)
10262 const struct loop *loop;
10265 return loop_insn_emit_before (loop, 0, loop->sink, pattern);
10269 /* If the loop has multiple exits, emit insn for PATTERN before the
10270 loop to ensure that it will always be executed no matter how the
10271 loop exits. Otherwise, emit the insn for PATTERN after the loop,
10272 since this is slightly more efficient. */
10275 loop_insn_sink_or_swim (loop, pattern)
10276 const struct loop *loop;
10279 if (loop->exit_count)
10280 return loop_insn_hoist (loop, pattern);
10282 return loop_insn_sink (loop, pattern);
10286 loop_ivs_dump (loop, file, verbose)
10287 const struct loop *loop;
10291 struct iv_class *bl;
10294 if (! loop || ! file)
10297 for (bl = LOOP_IVS (loop)->list; bl; bl = bl->next)
10300 fprintf (file, "Loop %d: %d IV classes\n", loop->num, iv_num);
10302 for (bl = LOOP_IVS (loop)->list; bl; bl = bl->next)
10304 loop_iv_class_dump (bl, file, verbose);
10305 fputc ('\n', file);
10311 loop_iv_class_dump (bl, file, verbose)
10312 const struct iv_class *bl;
10314 int verbose ATTRIBUTE_UNUSED;
10316 struct induction *v;
10320 if (! bl || ! file)
10323 fprintf (file, "IV class for reg %d, benefit %d\n",
10324 bl->regno, bl->total_benefit);
10326 fprintf (file, " Init insn %d", INSN_UID (bl->init_insn));
10327 if (bl->initial_value)
10329 fprintf (file, ", init val: ");
10330 print_simple_rtl (file, bl->initial_value);
10332 if (bl->initial_test)
10334 fprintf (file, ", init test: ");
10335 print_simple_rtl (file, bl->initial_test);
10337 fputc ('\n', file);
10339 if (bl->final_value)
10341 fprintf (file, " Final val: ");
10342 print_simple_rtl (file, bl->final_value);
10343 fputc ('\n', file);
10346 if ((incr = biv_total_increment (bl)))
10348 fprintf (file, " Total increment: ");
10349 print_simple_rtl (file, incr);
10350 fputc ('\n', file);
10353 /* List the increments. */
10354 for (i = 0, v = bl->biv; v; v = v->next_iv, i++)
10356 fprintf (file, " Inc%d: insn %d, incr: ", i, INSN_UID (v->insn));
10357 print_simple_rtl (file, v->add_val);
10358 fputc ('\n', file);
10361 /* List the givs. */
10362 for (i = 0, v = bl->giv; v; v = v->next_iv, i++)
10364 fprintf (file, " Giv%d: insn %d, benefit %d, ",
10365 i, INSN_UID (v->insn), v->benefit);
10366 if (v->giv_type == DEST_ADDR)
10367 print_simple_rtl (file, v->mem);
10369 print_simple_rtl (file, single_set (v->insn));
10370 fputc ('\n', file);
10376 loop_biv_dump (v, file, verbose)
10377 const struct induction *v;
10386 REGNO (v->dest_reg), INSN_UID (v->insn));
10387 fprintf (file, " const ");
10388 print_simple_rtl (file, v->add_val);
10390 if (verbose && v->final_value)
10392 fputc ('\n', file);
10393 fprintf (file, " final ");
10394 print_simple_rtl (file, v->final_value);
10397 fputc ('\n', file);
10402 loop_giv_dump (v, file, verbose)
10403 const struct induction *v;
10410 if (v->giv_type == DEST_REG)
10411 fprintf (file, "Giv %d: insn %d",
10412 REGNO (v->dest_reg), INSN_UID (v->insn));
10414 fprintf (file, "Dest address: insn %d",
10415 INSN_UID (v->insn));
10417 fprintf (file, " src reg %d benefit %d",
10418 REGNO (v->src_reg), v->benefit);
10419 fprintf (file, " lifetime %d",
10422 if (v->replaceable)
10423 fprintf (file, " replaceable");
10425 if (v->no_const_addval)
10426 fprintf (file, " ncav");
10428 if (v->ext_dependent)
10430 switch (GET_CODE (v->ext_dependent))
10433 fprintf (file, " ext se");
10436 fprintf (file, " ext ze");
10439 fprintf (file, " ext tr");
10446 fputc ('\n', file);
10447 fprintf (file, " mult ");
10448 print_simple_rtl (file, v->mult_val);
10450 fputc ('\n', file);
10451 fprintf (file, " add ");
10452 print_simple_rtl (file, v->add_val);
10454 if (verbose && v->final_value)
10456 fputc ('\n', file);
10457 fprintf (file, " final ");
10458 print_simple_rtl (file, v->final_value);
10461 fputc ('\n', file);
10467 const struct loop *loop;
10469 loop_ivs_dump (loop, stderr, 1);
10474 debug_iv_class (bl)
10475 const struct iv_class *bl;
10477 loop_iv_class_dump (bl, stderr, 1);
10483 const struct induction *v;
10485 loop_biv_dump (v, stderr, 1);
10491 const struct induction *v;
10493 loop_giv_dump (v, stderr, 1);
10497 #define LOOP_BLOCK_NUM_1(INSN) \
10498 ((INSN) ? (BLOCK_FOR_INSN (INSN) ? BLOCK_NUM (INSN) : - 1) : -1)
10500 /* The notes do not have an assigned block, so look at the next insn. */
10501 #define LOOP_BLOCK_NUM(INSN) \
10502 ((INSN) ? (GET_CODE (INSN) == NOTE \
10503 ? LOOP_BLOCK_NUM_1 (next_nonnote_insn (INSN)) \
10504 : LOOP_BLOCK_NUM_1 (INSN)) \
10507 #define LOOP_INSN_UID(INSN) ((INSN) ? INSN_UID (INSN) : -1)
10510 loop_dump_aux (loop, file, verbose)
10511 const struct loop *loop;
10513 int verbose ATTRIBUTE_UNUSED;
10517 if (! loop || ! file)
10520 /* Print diagnostics to compare our concept of a loop with
10521 what the loop notes say. */
10522 if (! PREV_INSN (loop->first->head)
10523 || GET_CODE (PREV_INSN (loop->first->head)) != NOTE
10524 || NOTE_LINE_NUMBER (PREV_INSN (loop->first->head))
10525 != NOTE_INSN_LOOP_BEG)
10526 fprintf (file, ";; No NOTE_INSN_LOOP_BEG at %d\n",
10527 INSN_UID (PREV_INSN (loop->first->head)));
10528 if (! NEXT_INSN (loop->last->end)
10529 || GET_CODE (NEXT_INSN (loop->last->end)) != NOTE
10530 || NOTE_LINE_NUMBER (NEXT_INSN (loop->last->end))
10531 != NOTE_INSN_LOOP_END)
10532 fprintf (file, ";; No NOTE_INSN_LOOP_END at %d\n",
10533 INSN_UID (NEXT_INSN (loop->last->end)));
10538 ";; start %d (%d), cont dom %d (%d), cont %d (%d), vtop %d (%d), end %d (%d)\n",
10539 LOOP_BLOCK_NUM (loop->start),
10540 LOOP_INSN_UID (loop->start),
10541 LOOP_BLOCK_NUM (loop->cont),
10542 LOOP_INSN_UID (loop->cont),
10543 LOOP_BLOCK_NUM (loop->cont),
10544 LOOP_INSN_UID (loop->cont),
10545 LOOP_BLOCK_NUM (loop->vtop),
10546 LOOP_INSN_UID (loop->vtop),
10547 LOOP_BLOCK_NUM (loop->end),
10548 LOOP_INSN_UID (loop->end));
10549 fprintf (file, ";; top %d (%d), scan start %d (%d)\n",
10550 LOOP_BLOCK_NUM (loop->top),
10551 LOOP_INSN_UID (loop->top),
10552 LOOP_BLOCK_NUM (loop->scan_start),
10553 LOOP_INSN_UID (loop->scan_start));
10554 fprintf (file, ";; exit_count %d", loop->exit_count);
10555 if (loop->exit_count)
10557 fputs (", labels:", file);
10558 for (label = loop->exit_labels; label; label = LABEL_NEXTREF (label))
10560 fprintf (file, " %d ",
10561 LOOP_INSN_UID (XEXP (label, 0)));
10564 fputs ("\n", file);
10566 /* This can happen when a marked loop appears as two nested loops,
10567 say from while (a || b) {}. The inner loop won't match
10568 the loop markers but the outer one will. */
10569 if (LOOP_BLOCK_NUM (loop->cont) != loop->latch->index)
10570 fprintf (file, ";; NOTE_INSN_LOOP_CONT not in loop latch\n");
10574 /* Call this function from the debugger to dump LOOP. */
10578 const struct loop *loop;
10580 flow_loop_dump (loop, stderr, loop_dump_aux, 1);
10583 /* Call this function from the debugger to dump LOOPS. */
10586 debug_loops (loops)
10587 const struct loops *loops;
10589 flow_loops_dump (loops, stderr, loop_dump_aux, 1);