1 /* Perform various loop optimizations, including strength reduction.
2 Copyright (C) 1987, 1988, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
22 /* This is the loop optimization pass of the compiler.
23 It finds invariant computations within loops and moves them
24 to the beginning of the loop. Then it identifies basic and
25 general induction variables. Strength reduction is applied to the general
26 induction variables, and induction variable elimination is applied to
27 the basic induction variables.
29 It also finds cases where
30 a register is set within the loop by zero-extending a narrower value
31 and changes these to zero the entire register once before the loop
32 and merely copy the low part within the loop.
34 Most of the complexity is in heuristics to decide when it is worth
35 while to do these things. */
44 #include "hard-reg-set.h"
45 #include "basic-block.h"
46 #include "insn-config.h"
47 #include "insn-flags.h"
57 #define LOOP_REG_LIFETIME(LOOP, REGNO) \
58 ((REGNO_LAST_LUID (REGNO) - REGNO_FIRST_LUID (REGNO)))
60 #define LOOP_REG_GLOBAL_P(LOOP, REGNO) \
61 ((REGNO_LAST_LUID (REGNO) > INSN_LUID ((LOOP)->end) \
62 || REGNO_FIRST_LUID (REGNO) < INSN_LUID ((LOOP)->start)))
65 /* Vector mapping INSN_UIDs to luids.
66 The luids are like uids but increase monotonically always.
67 We use them to see whether a jump comes from outside a given loop. */
71 /* Indexed by INSN_UID, contains the ordinal giving the (innermost) loop
72 number the insn is contained in. */
74 struct loop **uid_loop;
76 /* 1 + largest uid of any insn. */
80 /* 1 + luid of last insn. */
84 /* Number of loops detected in current function. Used as index to the
87 static int max_loop_num;
89 /* Bound on pseudo register number before loop optimization.
90 A pseudo has valid regscan info if its number is < max_reg_before_loop. */
91 unsigned int max_reg_before_loop;
93 /* The value to pass to the next call of reg_scan_update. */
94 static int loop_max_reg;
96 #define obstack_chunk_alloc xmalloc
97 #define obstack_chunk_free free
99 /* During the analysis of a loop, a chain of `struct movable's
100 is made to record all the movable insns found.
101 Then the entire chain can be scanned to decide which to move. */
105 rtx insn; /* A movable insn */
106 rtx set_src; /* The expression this reg is set from. */
107 rtx set_dest; /* The destination of this SET. */
108 rtx dependencies; /* When INSN is libcall, this is an EXPR_LIST
109 of any registers used within the LIBCALL. */
110 int consec; /* Number of consecutive following insns
111 that must be moved with this one. */
112 unsigned int regno; /* The register it sets */
113 short lifetime; /* lifetime of that register;
114 may be adjusted when matching movables
115 that load the same value are found. */
116 short savings; /* Number of insns we can move for this reg,
117 including other movables that force this
118 or match this one. */
119 unsigned int cond : 1; /* 1 if only conditionally movable */
120 unsigned int force : 1; /* 1 means MUST move this insn */
121 unsigned int global : 1; /* 1 means reg is live outside this loop */
122 /* If PARTIAL is 1, GLOBAL means something different:
123 that the reg is live outside the range from where it is set
124 to the following label. */
125 unsigned int done : 1; /* 1 inhibits further processing of this */
127 unsigned int partial : 1; /* 1 means this reg is used for zero-extending.
128 In particular, moving it does not make it
130 unsigned int move_insn : 1; /* 1 means that we call emit_move_insn to
131 load SRC, rather than copying INSN. */
132 unsigned int move_insn_first:1;/* Same as above, if this is necessary for the
133 first insn of a consecutive sets group. */
134 unsigned int is_equiv : 1; /* 1 means a REG_EQUIV is present on INSN. */
135 enum machine_mode savemode; /* Nonzero means it is a mode for a low part
136 that we should avoid changing when clearing
137 the rest of the reg. */
138 struct movable *match; /* First entry for same value */
139 struct movable *forces; /* An insn that must be moved if this is */
140 struct movable *next;
144 FILE *loop_dump_stream;
146 /* Forward declarations. */
148 static void find_and_verify_loops PARAMS ((rtx, struct loops *));
149 static void mark_loop_jump PARAMS ((rtx, struct loop *));
150 static void prescan_loop PARAMS ((struct loop *));
151 static int reg_in_basic_block_p PARAMS ((rtx, rtx));
152 static int consec_sets_invariant_p PARAMS ((const struct loop *,
154 static int labels_in_range_p PARAMS ((rtx, int));
155 static void count_one_set PARAMS ((struct loop_regs *, rtx, rtx, rtx *));
157 static void count_loop_regs_set PARAMS ((const struct loop *, int *));
158 static void note_addr_stored PARAMS ((rtx, rtx, void *));
159 static void note_set_pseudo_multiple_uses PARAMS ((rtx, rtx, void *));
160 static int loop_reg_used_before_p PARAMS ((const struct loop *, rtx, rtx));
161 static void scan_loop PARAMS ((struct loop*, int));
163 static void replace_call_address PARAMS ((rtx, rtx, rtx));
165 static rtx skip_consec_insns PARAMS ((rtx, int));
166 static int libcall_benefit PARAMS ((rtx));
167 static void ignore_some_movables PARAMS ((struct loop_movables *));
168 static void force_movables PARAMS ((struct loop_movables *));
169 static void combine_movables PARAMS ((struct loop_movables *,
170 struct loop_regs *));
171 static int regs_match_p PARAMS ((rtx, rtx, struct loop_movables *));
172 static int rtx_equal_for_loop_p PARAMS ((rtx, rtx, struct loop_movables *,
173 struct loop_regs *));
174 static void add_label_notes PARAMS ((rtx, rtx));
175 static void move_movables PARAMS ((struct loop *loop, struct loop_movables *,
177 static void loop_movables_add PARAMS((struct loop_movables *,
179 static void loop_movables_free PARAMS((struct loop_movables *));
180 static int count_nonfixed_reads PARAMS ((const struct loop *, rtx));
181 static void loop_bivs_find PARAMS((struct loop *));
182 static void loop_bivs_init_find PARAMS((struct loop *));
183 static void loop_bivs_check PARAMS((struct loop *));
184 static void loop_givs_find PARAMS((struct loop *));
185 static void loop_givs_check PARAMS((struct loop *));
186 static int loop_biv_eliminable_p PARAMS((struct loop *, struct iv_class *,
188 static int loop_giv_reduce_benefit PARAMS((struct loop *, struct iv_class *,
189 struct induction *, rtx));
190 static void loop_givs_dead_check PARAMS((struct loop *, struct iv_class *));
191 static void loop_givs_reduce PARAMS((struct loop *, struct iv_class *));
192 static void loop_givs_rescan PARAMS((struct loop *, struct iv_class *,
194 static void loop_ivs_free PARAMS((struct loop *));
195 static void strength_reduce PARAMS ((struct loop *, int, int));
196 static void find_single_use_in_loop PARAMS ((struct loop_regs *, rtx, rtx));
197 static int valid_initial_value_p PARAMS ((rtx, rtx, int, rtx));
198 static void find_mem_givs PARAMS ((const struct loop *, rtx, rtx, int, int));
199 static void record_biv PARAMS ((struct loop *, struct induction *,
200 rtx, rtx, rtx, rtx, rtx *,
202 static void check_final_value PARAMS ((const struct loop *,
203 struct induction *));
204 static void record_giv PARAMS ((const struct loop *, struct induction *,
205 rtx, rtx, rtx, rtx, rtx, rtx, int,
206 enum g_types, int, int, rtx *));
207 static void update_giv_derive PARAMS ((const struct loop *, rtx));
208 static void check_ext_dependant_givs PARAMS ((struct iv_class *,
209 struct loop_info *));
210 static int basic_induction_var PARAMS ((const struct loop *, rtx,
211 enum machine_mode, rtx, rtx,
212 rtx *, rtx *, rtx **));
213 static rtx simplify_giv_expr PARAMS ((const struct loop *, rtx, rtx *, int *));
214 static int general_induction_var PARAMS ((const struct loop *loop, rtx, rtx *,
215 rtx *, rtx *, rtx *, int, int *,
217 static int consec_sets_giv PARAMS ((const struct loop *, int, rtx,
218 rtx, rtx, rtx *, rtx *, rtx *, rtx *));
219 static int check_dbra_loop PARAMS ((struct loop *, int));
220 static rtx express_from_1 PARAMS ((rtx, rtx, rtx));
221 static rtx combine_givs_p PARAMS ((struct induction *, struct induction *));
222 static int cmp_combine_givs_stats PARAMS ((const PTR, const PTR));
223 static void combine_givs PARAMS ((struct loop_regs *, struct iv_class *));
224 static int product_cheap_p PARAMS ((rtx, rtx));
225 static int maybe_eliminate_biv PARAMS ((const struct loop *, struct iv_class *,
227 static int maybe_eliminate_biv_1 PARAMS ((const struct loop *, rtx, rtx,
228 struct iv_class *, int, rtx));
229 static int last_use_this_basic_block PARAMS ((rtx, rtx));
230 static void record_initial PARAMS ((rtx, rtx, void *));
231 static void update_reg_last_use PARAMS ((rtx, rtx));
232 static rtx next_insn_in_loop PARAMS ((const struct loop *, rtx));
233 static void load_mems_and_recount_loop_regs_set PARAMS ((const struct loop*,
235 static void load_mems PARAMS ((const struct loop *));
236 static int insert_loop_mem PARAMS ((rtx *, void *));
237 static int replace_loop_mem PARAMS ((rtx *, void *));
238 static void replace_loop_mems PARAMS ((rtx, rtx, rtx));
239 static int replace_loop_reg PARAMS ((rtx *, void *));
240 static void replace_loop_regs PARAMS ((rtx insn, rtx, rtx));
241 static void note_reg_stored PARAMS ((rtx, rtx, void *));
242 static void try_copy_prop PARAMS ((const struct loop *, rtx, unsigned int));
243 static void try_swap_copy_prop PARAMS ((const struct loop *, rtx,
245 static int replace_label PARAMS ((rtx *, void *));
246 static rtx check_insn_for_givs PARAMS((struct loop *, rtx, int, int));
247 static rtx check_insn_for_bivs PARAMS((struct loop *, rtx, int, int));
248 static int iv_add_mult_cost PARAMS ((rtx, rtx, rtx, rtx));
250 static void loop_dump_aux PARAMS ((const struct loop *, FILE *, int));
251 void debug_loop PARAMS ((const struct loop *));
252 void debug_loops PARAMS ((const struct loops *));
254 typedef struct rtx_pair
260 typedef struct loop_replace_args
267 /* Nonzero iff INSN is between START and END, inclusive. */
268 #define INSN_IN_RANGE_P(INSN, START, END) \
269 (INSN_UID (INSN) < max_uid_for_loop \
270 && INSN_LUID (INSN) >= INSN_LUID (START) \
271 && INSN_LUID (INSN) <= INSN_LUID (END))
273 /* Indirect_jump_in_function is computed once per function. */
274 static int indirect_jump_in_function;
275 static int indirect_jump_in_function_p PARAMS ((rtx));
277 static int compute_luids PARAMS ((rtx, rtx, int));
279 static int biv_elimination_giv_has_0_offset PARAMS ((struct induction *,
283 /* Benefit penalty, if a giv is not replaceable, i.e. must emit an insn to
284 copy the value of the strength reduced giv to its original register. */
285 static int copy_cost;
287 /* Cost of using a register, to normalize the benefits of a giv. */
288 static int reg_address_cost;
293 rtx reg = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 1);
295 reg_address_cost = address_cost (reg, SImode);
297 copy_cost = COSTS_N_INSNS (1);
300 /* Compute the mapping from uids to luids.
301 LUIDs are numbers assigned to insns, like uids,
302 except that luids increase monotonically through the code.
303 Start at insn START and stop just before END. Assign LUIDs
304 starting with PREV_LUID + 1. Return the last assigned LUID + 1. */
306 compute_luids (start, end, prev_luid)
313 for (insn = start, i = prev_luid; insn != end; insn = NEXT_INSN (insn))
315 if (INSN_UID (insn) >= max_uid_for_loop)
317 /* Don't assign luids to line-number NOTEs, so that the distance in
318 luids between two insns is not affected by -g. */
319 if (GET_CODE (insn) != NOTE
320 || NOTE_LINE_NUMBER (insn) <= 0)
321 uid_luid[INSN_UID (insn)] = ++i;
323 /* Give a line number note the same luid as preceding insn. */
324 uid_luid[INSN_UID (insn)] = i;
329 /* Entry point of this file. Perform loop optimization
330 on the current function. F is the first insn of the function
331 and DUMPFILE is a stream for output of a trace of actions taken
332 (or 0 if none should be output). */
335 loop_optimize (f, dumpfile, flags)
336 /* f is the first instruction of a chain of insns for one function */
343 struct loops loops_data;
344 struct loops *loops = &loops_data;
345 struct loop_info *loops_info;
347 loop_dump_stream = dumpfile;
349 init_recog_no_volatile ();
351 max_reg_before_loop = max_reg_num ();
352 loop_max_reg = max_reg_before_loop;
356 /* Count the number of loops. */
359 for (insn = f; insn; insn = NEXT_INSN (insn))
361 if (GET_CODE (insn) == NOTE
362 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
366 /* Don't waste time if no loops. */
367 if (max_loop_num == 0)
370 loops->num = max_loop_num;
372 /* Get size to use for tables indexed by uids.
373 Leave some space for labels allocated by find_and_verify_loops. */
374 max_uid_for_loop = get_max_uid () + 1 + max_loop_num * 32;
376 uid_luid = (int *) xcalloc (max_uid_for_loop, sizeof (int));
377 uid_loop = (struct loop **) xcalloc (max_uid_for_loop,
378 sizeof (struct loop *));
380 /* Allocate storage for array of loops. */
381 loops->array = (struct loop *)
382 xcalloc (loops->num, sizeof (struct loop));
384 /* Find and process each loop.
385 First, find them, and record them in order of their beginnings. */
386 find_and_verify_loops (f, loops);
388 /* Allocate and initialize auxiliary loop information. */
389 loops_info = xcalloc (loops->num, sizeof (struct loop_info));
390 for (i = 0; i < loops->num; i++)
391 loops->array[i].aux = loops_info + i;
393 /* Now find all register lifetimes. This must be done after
394 find_and_verify_loops, because it might reorder the insns in the
396 reg_scan (f, max_reg_before_loop, 1);
398 /* This must occur after reg_scan so that registers created by gcse
399 will have entries in the register tables.
401 We could have added a call to reg_scan after gcse_main in toplev.c,
402 but moving this call to init_alias_analysis is more efficient. */
403 init_alias_analysis ();
405 /* See if we went too far. Note that get_max_uid already returns
406 one more that the maximum uid of all insn. */
407 if (get_max_uid () > max_uid_for_loop)
409 /* Now reset it to the actual size we need. See above. */
410 max_uid_for_loop = get_max_uid ();
412 /* find_and_verify_loops has already called compute_luids, but it
413 might have rearranged code afterwards, so we need to recompute
415 max_luid = compute_luids (f, NULL_RTX, 0);
417 /* Don't leave gaps in uid_luid for insns that have been
418 deleted. It is possible that the first or last insn
419 using some register has been deleted by cross-jumping.
420 Make sure that uid_luid for that former insn's uid
421 points to the general area where that insn used to be. */
422 for (i = 0; i < max_uid_for_loop; i++)
424 uid_luid[0] = uid_luid[i];
425 if (uid_luid[0] != 0)
428 for (i = 0; i < max_uid_for_loop; i++)
429 if (uid_luid[i] == 0)
430 uid_luid[i] = uid_luid[i - 1];
432 /* Determine if the function has indirect jump. On some systems
433 this prevents low overhead loop instructions from being used. */
434 indirect_jump_in_function = indirect_jump_in_function_p (f);
436 /* Now scan the loops, last ones first, since this means inner ones are done
437 before outer ones. */
438 for (i = max_loop_num - 1; i >= 0; i--)
440 struct loop *loop = &loops->array[i];
442 if (! loop->invalid && loop->end)
443 scan_loop (loop, flags);
446 /* If there were lexical blocks inside the loop, they have been
447 replicated. We will now have more than one NOTE_INSN_BLOCK_BEG
448 and NOTE_INSN_BLOCK_END for each such block. We must duplicate
449 the BLOCKs as well. */
450 if (write_symbols != NO_DEBUG)
453 end_alias_analysis ();
462 /* Returns the next insn, in execution order, after INSN. START and
463 END are the NOTE_INSN_LOOP_BEG and NOTE_INSN_LOOP_END for the loop,
464 respectively. LOOP->TOP, if non-NULL, is the top of the loop in the
465 insn-stream; it is used with loops that are entered near the
469 next_insn_in_loop (loop, insn)
470 const struct loop *loop;
473 insn = NEXT_INSN (insn);
475 if (insn == loop->end)
478 /* Go to the top of the loop, and continue there. */
485 if (insn == loop->scan_start)
492 /* Optimize one loop described by LOOP. */
494 /* ??? Could also move memory writes out of loops if the destination address
495 is invariant, the source is invariant, the memory write is not volatile,
496 and if we can prove that no read inside the loop can read this address
497 before the write occurs. If there is a read of this address after the
498 write, then we can also mark the memory read as invariant. */
501 scan_loop (loop, flags)
505 struct loop_info *loop_info = LOOP_INFO (loop);
506 struct loop_regs *regs = LOOP_REGS (loop);
508 rtx loop_start = loop->start;
509 rtx loop_end = loop->end;
511 /* 1 if we are scanning insns that could be executed zero times. */
513 /* 1 if we are scanning insns that might never be executed
514 due to a subroutine call which might exit before they are reached. */
516 /* Jump insn that enters the loop, or 0 if control drops in. */
517 rtx loop_entry_jump = 0;
518 /* Number of insns in the loop. */
521 rtx temp, update_start, update_end;
522 /* The SET from an insn, if it is the only SET in the insn. */
524 /* Chain describing insns movable in current loop. */
525 struct loop_movables *movables = LOOP_MOVABLES (loop);
526 /* Ratio of extra register life span we can justify
527 for saving an instruction. More if loop doesn't call subroutines
528 since in that case saving an insn makes more difference
529 and more registers are available. */
531 /* Nonzero if we are scanning instructions in a sub-loop. */
540 /* Determine whether this loop starts with a jump down to a test at
541 the end. This will occur for a small number of loops with a test
542 that is too complex to duplicate in front of the loop.
544 We search for the first insn or label in the loop, skipping NOTEs.
545 However, we must be careful not to skip past a NOTE_INSN_LOOP_BEG
546 (because we might have a loop executed only once that contains a
547 loop which starts with a jump to its exit test) or a NOTE_INSN_LOOP_END
548 (in case we have a degenerate loop).
550 Note that if we mistakenly think that a loop is entered at the top
551 when, in fact, it is entered at the exit test, the only effect will be
552 slightly poorer optimization. Making the opposite error can generate
553 incorrect code. Since very few loops now start with a jump to the
554 exit test, the code here to detect that case is very conservative. */
556 for (p = NEXT_INSN (loop_start);
558 && GET_CODE (p) != CODE_LABEL && ! INSN_P (p)
559 && (GET_CODE (p) != NOTE
560 || (NOTE_LINE_NUMBER (p) != NOTE_INSN_LOOP_BEG
561 && NOTE_LINE_NUMBER (p) != NOTE_INSN_LOOP_END));
565 loop->scan_start = p;
567 /* Set up variables describing this loop. */
569 threshold = (loop_info->has_call ? 1 : 2) * (1 + n_non_fixed_regs);
571 /* If loop has a jump before the first label,
572 the true entry is the target of that jump.
573 Start scan from there.
574 But record in LOOP->TOP the place where the end-test jumps
575 back to so we can scan that after the end of the loop. */
576 if (GET_CODE (p) == JUMP_INSN)
580 /* Loop entry must be unconditional jump (and not a RETURN) */
581 if (any_uncondjump_p (p)
582 && JUMP_LABEL (p) != 0
583 /* Check to see whether the jump actually
584 jumps out of the loop (meaning it's no loop).
585 This case can happen for things like
586 do {..} while (0). If this label was generated previously
587 by loop, we can't tell anything about it and have to reject
589 && INSN_IN_RANGE_P (JUMP_LABEL (p), loop_start, loop_end))
591 loop->top = next_label (loop->scan_start);
592 loop->scan_start = JUMP_LABEL (p);
596 /* If LOOP->SCAN_START was an insn created by loop, we don't know its luid
597 as required by loop_reg_used_before_p. So skip such loops. (This
598 test may never be true, but it's best to play it safe.)
600 Also, skip loops where we do not start scanning at a label. This
601 test also rejects loops starting with a JUMP_INSN that failed the
604 if (INSN_UID (loop->scan_start) >= max_uid_for_loop
605 || GET_CODE (loop->scan_start) != CODE_LABEL)
607 if (loop_dump_stream)
608 fprintf (loop_dump_stream, "\nLoop from %d to %d is phony.\n\n",
609 INSN_UID (loop_start), INSN_UID (loop_end));
613 /* Count number of times each reg is set during this loop. Set
614 regs->array[I].may_not_optimize if it is not safe to move out the
615 setting of register I. Set regs->array[I].single_usage. */
617 regs->num = max_reg_num ();
619 /* Allocate extra space for REGs that might be created by
620 load_mems. We allocate a little extra slop as well, in the hopes
621 that even after the moving of movables creates some new registers
622 we won't have to reallocate these arrays. However, we do grow
623 the arrays, if necessary, in load_mems_recount_loop_regs_set. */
624 regs->size = regs->num + loop_info->mems_idx + 16;
625 regs->array = (struct loop_reg *)
626 xmalloc (regs->size * sizeof (*regs->array));
628 for (i = 0; i < regs->num; i++)
630 regs->array[i].set_in_loop = 0;
631 regs->array[i].may_not_optimize = 0;
632 regs->array[i].single_usage = NULL_RTX;
635 count_loop_regs_set (loop, &insn_count);
637 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
639 regs->array[i].may_not_optimize = 1;
640 regs->array[i].set_in_loop = 1;
643 #ifdef AVOID_CCMODE_COPIES
644 /* Don't try to move insns which set CC registers if we should not
645 create CCmode register copies. */
646 for (i = regs->num - 1; i >= FIRST_PSEUDO_REGISTER; i--)
647 if (GET_MODE_CLASS (GET_MODE (regno_reg_rtx[i])) == MODE_CC)
648 regs->array[i].may_not_optimize = 1;
651 for (i = 0; i < regs->num; i++)
652 regs->array[i].n_times_set = regs->array[i].set_in_loop;
654 if (loop_dump_stream)
656 fprintf (loop_dump_stream, "\nLoop from %d to %d: %d real insns.\n",
657 INSN_UID (loop_start), INSN_UID (loop_end), insn_count);
659 fprintf (loop_dump_stream, "Continue at insn %d.\n",
660 INSN_UID (loop->cont));
663 /* Scan through the loop finding insns that are safe to move.
664 Set REGS->ARRAY[I].SET_IN_LOOP negative for the reg I being set, so that
665 this reg will be considered invariant for subsequent insns.
666 We consider whether subsequent insns use the reg
667 in deciding whether it is worth actually moving.
669 MAYBE_NEVER is nonzero if we have passed a conditional jump insn
670 and therefore it is possible that the insns we are scanning
671 would never be executed. At such times, we must make sure
672 that it is safe to execute the insn once instead of zero times.
673 When MAYBE_NEVER is 0, all insns will be executed at least once
674 so that is not a problem. */
676 for (p = next_insn_in_loop (loop, loop->scan_start);
678 p = next_insn_in_loop (loop, p))
680 if (GET_CODE (p) == INSN
681 && (set = single_set (p))
682 && GET_CODE (SET_DEST (set)) == REG
683 && ! regs->array[REGNO (SET_DEST (set))].may_not_optimize)
688 rtx src = SET_SRC (set);
689 rtx dependencies = 0;
691 /* Figure out what to use as a source of this insn. If a REG_EQUIV
692 note is given or if a REG_EQUAL note with a constant operand is
693 specified, use it as the source and mark that we should move
694 this insn by calling emit_move_insn rather that duplicating the
697 Otherwise, only use the REG_EQUAL contents if a REG_RETVAL note
699 temp = find_reg_note (p, REG_EQUIV, NULL_RTX);
701 src = XEXP (temp, 0), move_insn = 1;
704 temp = find_reg_note (p, REG_EQUAL, NULL_RTX);
705 if (temp && CONSTANT_P (XEXP (temp, 0)))
706 src = XEXP (temp, 0), move_insn = 1;
707 if (temp && find_reg_note (p, REG_RETVAL, NULL_RTX))
709 src = XEXP (temp, 0);
710 /* A libcall block can use regs that don't appear in
711 the equivalent expression. To move the libcall,
712 we must move those regs too. */
713 dependencies = libcall_other_reg (p, src);
717 /* Don't try to optimize a register that was made
718 by loop-optimization for an inner loop.
719 We don't know its life-span, so we can't compute the benefit. */
720 if (REGNO (SET_DEST (set)) >= max_reg_before_loop)
722 else if (/* The register is used in basic blocks other
723 than the one where it is set (meaning that
724 something after this point in the loop might
725 depend on its value before the set). */
726 ! reg_in_basic_block_p (p, SET_DEST (set))
727 /* And the set is not guaranteed to be executed one
728 the loop starts, or the value before the set is
729 needed before the set occurs...
731 ??? Note we have quadratic behaviour here, mitigated
732 by the fact that the previous test will often fail for
733 large loops. Rather than re-scanning the entire loop
734 each time for register usage, we should build tables
735 of the register usage and use them here instead. */
737 || loop_reg_used_before_p (loop, set, p)))
738 /* It is unsafe to move the set.
740 This code used to consider it OK to move a set of a variable
741 which was not created by the user and not used in an exit test.
742 That behavior is incorrect and was removed. */
744 else if ((tem = loop_invariant_p (loop, src))
745 && (dependencies == 0
746 || (tem2 = loop_invariant_p (loop, dependencies)) != 0)
747 && (regs->array[REGNO (SET_DEST (set))].set_in_loop == 1
749 = consec_sets_invariant_p
750 (loop, SET_DEST (set),
751 regs->array[REGNO (SET_DEST (set))].set_in_loop,
753 /* If the insn can cause a trap (such as divide by zero),
754 can't move it unless it's guaranteed to be executed
755 once loop is entered. Even a function call might
756 prevent the trap insn from being reached
757 (since it might exit!) */
758 && ! ((maybe_never || call_passed)
759 && may_trap_p (src)))
761 register struct movable *m;
762 register int regno = REGNO (SET_DEST (set));
764 /* A potential lossage is where we have a case where two insns
765 can be combined as long as they are both in the loop, but
766 we move one of them outside the loop. For large loops,
767 this can lose. The most common case of this is the address
768 of a function being called.
770 Therefore, if this register is marked as being used exactly
771 once if we are in a loop with calls (a "large loop"), see if
772 we can replace the usage of this register with the source
773 of this SET. If we can, delete this insn.
775 Don't do this if P has a REG_RETVAL note or if we have
776 SMALL_REGISTER_CLASSES and SET_SRC is a hard register. */
778 if (loop_info->has_call
779 && regs->array[regno].single_usage != 0
780 && regs->array[regno].single_usage != const0_rtx
781 && REGNO_FIRST_UID (regno) == INSN_UID (p)
782 && (REGNO_LAST_UID (regno)
783 == INSN_UID (regs->array[regno].single_usage))
784 && regs->array[regno].set_in_loop == 1
785 && ! side_effects_p (SET_SRC (set))
786 && ! find_reg_note (p, REG_RETVAL, NULL_RTX)
787 && (! SMALL_REGISTER_CLASSES
788 || (! (GET_CODE (SET_SRC (set)) == REG
789 && REGNO (SET_SRC (set)) < FIRST_PSEUDO_REGISTER)))
790 /* This test is not redundant; SET_SRC (set) might be
791 a call-clobbered register and the life of REGNO
792 might span a call. */
793 && ! modified_between_p (SET_SRC (set), p,
794 regs->array[regno].single_usage)
795 && no_labels_between_p (p, regs->array[regno].single_usage)
796 && validate_replace_rtx (SET_DEST (set), SET_SRC (set),
797 regs->array[regno].single_usage))
799 /* Replace any usage in a REG_EQUAL note. Must copy the
800 new source, so that we don't get rtx sharing between the
801 SET_SOURCE and REG_NOTES of insn p. */
802 REG_NOTES (regs->array[regno].single_usage)
803 = replace_rtx (REG_NOTES (regs->array[regno].single_usage),
804 SET_DEST (set), copy_rtx (SET_SRC (set)));
807 NOTE_LINE_NUMBER (p) = NOTE_INSN_DELETED;
808 NOTE_SOURCE_FILE (p) = 0;
809 regs->array[regno].set_in_loop = 0;
813 m = (struct movable *) xmalloc (sizeof (struct movable));
817 m->dependencies = dependencies;
818 m->set_dest = SET_DEST (set);
820 m->consec = regs->array[REGNO (SET_DEST (set))].set_in_loop - 1;
824 m->move_insn = move_insn;
825 m->move_insn_first = 0;
826 m->is_equiv = (find_reg_note (p, REG_EQUIV, NULL_RTX) != 0);
827 m->savemode = VOIDmode;
829 /* Set M->cond if either loop_invariant_p
830 or consec_sets_invariant_p returned 2
831 (only conditionally invariant). */
832 m->cond = ((tem | tem1 | tem2) > 1);
833 m->global = LOOP_REG_GLOBAL_P (loop, regno);
835 m->lifetime = LOOP_REG_LIFETIME (loop, regno);
836 m->savings = regs->array[regno].n_times_set;
837 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
838 m->savings += libcall_benefit (p);
839 regs->array[regno].set_in_loop = move_insn ? -2 : -1;
840 /* Add M to the end of the chain MOVABLES. */
841 loop_movables_add (movables, m);
845 /* It is possible for the first instruction to have a
846 REG_EQUAL note but a non-invariant SET_SRC, so we must
847 remember the status of the first instruction in case
848 the last instruction doesn't have a REG_EQUAL note. */
849 m->move_insn_first = m->move_insn;
851 /* Skip this insn, not checking REG_LIBCALL notes. */
852 p = next_nonnote_insn (p);
853 /* Skip the consecutive insns, if there are any. */
854 p = skip_consec_insns (p, m->consec);
855 /* Back up to the last insn of the consecutive group. */
856 p = prev_nonnote_insn (p);
858 /* We must now reset m->move_insn, m->is_equiv, and possibly
859 m->set_src to correspond to the effects of all the
861 temp = find_reg_note (p, REG_EQUIV, NULL_RTX);
863 m->set_src = XEXP (temp, 0), m->move_insn = 1;
866 temp = find_reg_note (p, REG_EQUAL, NULL_RTX);
867 if (temp && CONSTANT_P (XEXP (temp, 0)))
868 m->set_src = XEXP (temp, 0), m->move_insn = 1;
873 m->is_equiv = (find_reg_note (p, REG_EQUIV, NULL_RTX) != 0);
876 /* If this register is always set within a STRICT_LOW_PART
877 or set to zero, then its high bytes are constant.
878 So clear them outside the loop and within the loop
879 just load the low bytes.
880 We must check that the machine has an instruction to do so.
881 Also, if the value loaded into the register
882 depends on the same register, this cannot be done. */
883 else if (SET_SRC (set) == const0_rtx
884 && GET_CODE (NEXT_INSN (p)) == INSN
885 && (set1 = single_set (NEXT_INSN (p)))
886 && GET_CODE (set1) == SET
887 && (GET_CODE (SET_DEST (set1)) == STRICT_LOW_PART)
888 && (GET_CODE (XEXP (SET_DEST (set1), 0)) == SUBREG)
889 && (SUBREG_REG (XEXP (SET_DEST (set1), 0))
891 && !reg_mentioned_p (SET_DEST (set), SET_SRC (set1)))
893 register int regno = REGNO (SET_DEST (set));
894 if (regs->array[regno].set_in_loop == 2)
896 register struct movable *m;
897 m = (struct movable *) xmalloc (sizeof (struct movable));
900 m->set_dest = SET_DEST (set);
907 m->move_insn_first = 0;
909 /* If the insn may not be executed on some cycles,
910 we can't clear the whole reg; clear just high part.
911 Not even if the reg is used only within this loop.
918 Clearing x before the inner loop could clobber a value
919 being saved from the last time around the outer loop.
920 However, if the reg is not used outside this loop
921 and all uses of the register are in the same
922 basic block as the store, there is no problem.
924 If this insn was made by loop, we don't know its
925 INSN_LUID and hence must make a conservative
927 m->global = (INSN_UID (p) >= max_uid_for_loop
928 || LOOP_REG_GLOBAL_P (loop, regno)
929 || (labels_in_range_p
930 (p, REGNO_FIRST_LUID (regno))));
931 if (maybe_never && m->global)
932 m->savemode = GET_MODE (SET_SRC (set1));
934 m->savemode = VOIDmode;
938 m->lifetime = LOOP_REG_LIFETIME (loop, regno);
940 regs->array[regno].set_in_loop = -1;
941 /* Add M to the end of the chain MOVABLES. */
942 loop_movables_add (movables, m);
946 /* Past a call insn, we get to insns which might not be executed
947 because the call might exit. This matters for insns that trap.
948 Constant and pure call insns always return, so they don't count. */
949 else if (GET_CODE (p) == CALL_INSN && ! CONST_CALL_P (p))
951 /* Past a label or a jump, we get to insns for which we
952 can't count on whether or how many times they will be
953 executed during each iteration. Therefore, we can
954 only move out sets of trivial variables
955 (those not used after the loop). */
956 /* Similar code appears twice in strength_reduce. */
957 else if ((GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN)
958 /* If we enter the loop in the middle, and scan around to the
959 beginning, don't set maybe_never for that. This must be an
960 unconditional jump, otherwise the code at the top of the
961 loop might never be executed. Unconditional jumps are
962 followed a by barrier then loop end. */
963 && ! (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p) == loop->top
964 && NEXT_INSN (NEXT_INSN (p)) == loop_end
965 && any_uncondjump_p (p)))
967 else if (GET_CODE (p) == NOTE)
969 /* At the virtual top of a converted loop, insns are again known to
970 be executed: logically, the loop begins here even though the exit
971 code has been duplicated. */
972 if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP && loop_depth == 0)
973 maybe_never = call_passed = 0;
974 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
976 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
981 /* If one movable subsumes another, ignore that other. */
983 ignore_some_movables (movables);
985 /* For each movable insn, see if the reg that it loads
986 leads when it dies right into another conditionally movable insn.
987 If so, record that the second insn "forces" the first one,
988 since the second can be moved only if the first is. */
990 force_movables (movables);
992 /* See if there are multiple movable insns that load the same value.
993 If there are, make all but the first point at the first one
994 through the `match' field, and add the priorities of them
995 all together as the priority of the first. */
997 combine_movables (movables, regs);
999 /* Now consider each movable insn to decide whether it is worth moving.
1000 Store 0 in regs->array[I].set_in_loop for each reg I that is moved.
1002 Generally this increases code size, so do not move moveables when
1003 optimizing for code size. */
1005 if (! optimize_size)
1006 move_movables (loop, movables, threshold, insn_count);
1008 /* Now candidates that still are negative are those not moved.
1009 Change regs->array[I].set_in_loop to indicate that those are not actually
1011 for (i = 0; i < regs->num; i++)
1012 if (regs->array[i].set_in_loop < 0)
1013 regs->array[i].set_in_loop = regs->array[i].n_times_set;
1015 /* Now that we've moved some things out of the loop, we might be able to
1016 hoist even more memory references. */
1017 load_mems_and_recount_loop_regs_set (loop, &insn_count);
1019 for (update_start = loop_start;
1020 PREV_INSN (update_start)
1021 && GET_CODE (PREV_INSN (update_start)) != CODE_LABEL;
1022 update_start = PREV_INSN (update_start))
1024 update_end = NEXT_INSN (loop_end);
1026 reg_scan_update (update_start, update_end, loop_max_reg);
1027 loop_max_reg = max_reg_num ();
1029 if (flag_strength_reduce)
1031 if (update_end && GET_CODE (update_end) == CODE_LABEL)
1032 /* Ensure our label doesn't go away. */
1033 LABEL_NUSES (update_end)++;
1035 strength_reduce (loop, insn_count, flags);
1037 reg_scan_update (update_start, update_end, loop_max_reg);
1038 loop_max_reg = max_reg_num ();
1040 if (update_end && GET_CODE (update_end) == CODE_LABEL
1041 && --LABEL_NUSES (update_end) == 0)
1042 delete_insn (update_end);
1046 /* The movable information is required for strength reduction. */
1047 loop_movables_free (movables);
1054 /* Add elements to *OUTPUT to record all the pseudo-regs
1055 mentioned in IN_THIS but not mentioned in NOT_IN_THIS. */
1058 record_excess_regs (in_this, not_in_this, output)
1059 rtx in_this, not_in_this;
1066 code = GET_CODE (in_this);
1080 if (REGNO (in_this) >= FIRST_PSEUDO_REGISTER
1081 && ! reg_mentioned_p (in_this, not_in_this))
1082 *output = gen_rtx_EXPR_LIST (VOIDmode, in_this, *output);
1089 fmt = GET_RTX_FORMAT (code);
1090 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1097 for (j = 0; j < XVECLEN (in_this, i); j++)
1098 record_excess_regs (XVECEXP (in_this, i, j), not_in_this, output);
1102 record_excess_regs (XEXP (in_this, i), not_in_this, output);
1108 /* Check what regs are referred to in the libcall block ending with INSN,
1109 aside from those mentioned in the equivalent value.
1110 If there are none, return 0.
1111 If there are one or more, return an EXPR_LIST containing all of them. */
1114 libcall_other_reg (insn, equiv)
1117 rtx note = find_reg_note (insn, REG_RETVAL, NULL_RTX);
1118 rtx p = XEXP (note, 0);
1121 /* First, find all the regs used in the libcall block
1122 that are not mentioned as inputs to the result. */
1126 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
1127 || GET_CODE (p) == CALL_INSN)
1128 record_excess_regs (PATTERN (p), equiv, &output);
1135 /* Return 1 if all uses of REG
1136 are between INSN and the end of the basic block. */
1139 reg_in_basic_block_p (insn, reg)
1142 int regno = REGNO (reg);
1145 if (REGNO_FIRST_UID (regno) != INSN_UID (insn))
1148 /* Search this basic block for the already recorded last use of the reg. */
1149 for (p = insn; p; p = NEXT_INSN (p))
1151 switch (GET_CODE (p))
1158 /* Ordinary insn: if this is the last use, we win. */
1159 if (REGNO_LAST_UID (regno) == INSN_UID (p))
1164 /* Jump insn: if this is the last use, we win. */
1165 if (REGNO_LAST_UID (regno) == INSN_UID (p))
1167 /* Otherwise, it's the end of the basic block, so we lose. */
1172 /* It's the end of the basic block, so we lose. */
1180 /* The "last use" that was recorded can't be found after the first
1181 use. This can happen when the last use was deleted while
1182 processing an inner loop, this inner loop was then completely
1183 unrolled, and the outer loop is always exited after the inner loop,
1184 so that everything after the first use becomes a single basic block. */
1188 /* Compute the benefit of eliminating the insns in the block whose
1189 last insn is LAST. This may be a group of insns used to compute a
1190 value directly or can contain a library call. */
1193 libcall_benefit (last)
1199 for (insn = XEXP (find_reg_note (last, REG_RETVAL, NULL_RTX), 0);
1200 insn != last; insn = NEXT_INSN (insn))
1202 if (GET_CODE (insn) == CALL_INSN)
1203 benefit += 10; /* Assume at least this many insns in a library
1205 else if (GET_CODE (insn) == INSN
1206 && GET_CODE (PATTERN (insn)) != USE
1207 && GET_CODE (PATTERN (insn)) != CLOBBER)
1214 /* Skip COUNT insns from INSN, counting library calls as 1 insn. */
1217 skip_consec_insns (insn, count)
1221 for (; count > 0; count--)
1225 /* If first insn of libcall sequence, skip to end. */
1226 /* Do this at start of loop, since INSN is guaranteed to
1228 if (GET_CODE (insn) != NOTE
1229 && (temp = find_reg_note (insn, REG_LIBCALL, NULL_RTX)))
1230 insn = XEXP (temp, 0);
1233 insn = NEXT_INSN (insn);
1234 while (GET_CODE (insn) == NOTE);
1240 /* Ignore any movable whose insn falls within a libcall
1241 which is part of another movable.
1242 We make use of the fact that the movable for the libcall value
1243 was made later and so appears later on the chain. */
1246 ignore_some_movables (movables)
1247 struct loop_movables *movables;
1249 register struct movable *m, *m1;
1251 for (m = movables->head; m; m = m->next)
1253 /* Is this a movable for the value of a libcall? */
1254 rtx note = find_reg_note (m->insn, REG_RETVAL, NULL_RTX);
1258 /* Check for earlier movables inside that range,
1259 and mark them invalid. We cannot use LUIDs here because
1260 insns created by loop.c for prior loops don't have LUIDs.
1261 Rather than reject all such insns from movables, we just
1262 explicitly check each insn in the libcall (since invariant
1263 libcalls aren't that common). */
1264 for (insn = XEXP (note, 0); insn != m->insn; insn = NEXT_INSN (insn))
1265 for (m1 = movables->head; m1 != m; m1 = m1->next)
1266 if (m1->insn == insn)
1272 /* For each movable insn, see if the reg that it loads
1273 leads when it dies right into another conditionally movable insn.
1274 If so, record that the second insn "forces" the first one,
1275 since the second can be moved only if the first is. */
1278 force_movables (movables)
1279 struct loop_movables *movables;
1281 register struct movable *m, *m1;
1282 for (m1 = movables->head; m1; m1 = m1->next)
1283 /* Omit this if moving just the (SET (REG) 0) of a zero-extend. */
1284 if (!m1->partial && !m1->done)
1286 int regno = m1->regno;
1287 for (m = m1->next; m; m = m->next)
1288 /* ??? Could this be a bug? What if CSE caused the
1289 register of M1 to be used after this insn?
1290 Since CSE does not update regno_last_uid,
1291 this insn M->insn might not be where it dies.
1292 But very likely this doesn't matter; what matters is
1293 that M's reg is computed from M1's reg. */
1294 if (INSN_UID (m->insn) == REGNO_LAST_UID (regno)
1297 if (m != 0 && m->set_src == m1->set_dest
1298 /* If m->consec, m->set_src isn't valid. */
1302 /* Increase the priority of the moving the first insn
1303 since it permits the second to be moved as well. */
1307 m1->lifetime += m->lifetime;
1308 m1->savings += m->savings;
1313 /* Find invariant expressions that are equal and can be combined into
1317 combine_movables (movables, regs)
1318 struct loop_movables *movables;
1319 struct loop_regs *regs;
1321 register struct movable *m;
1322 char *matched_regs = (char *) xmalloc (regs->num);
1323 enum machine_mode mode;
1325 /* Regs that are set more than once are not allowed to match
1326 or be matched. I'm no longer sure why not. */
1327 /* Perhaps testing m->consec_sets would be more appropriate here? */
1329 for (m = movables->head; m; m = m->next)
1330 if (m->match == 0 && regs->array[m->regno].n_times_set == 1
1333 register struct movable *m1;
1334 int regno = m->regno;
1336 memset (matched_regs, 0, regs->num);
1337 matched_regs[regno] = 1;
1339 /* We want later insns to match the first one. Don't make the first
1340 one match any later ones. So start this loop at m->next. */
1341 for (m1 = m->next; m1; m1 = m1->next)
1342 if (m != m1 && m1->match == 0
1343 && regs->array[m1->regno].n_times_set == 1
1344 /* A reg used outside the loop mustn't be eliminated. */
1346 /* A reg used for zero-extending mustn't be eliminated. */
1348 && (matched_regs[m1->regno]
1351 /* Can combine regs with different modes loaded from the
1352 same constant only if the modes are the same or
1353 if both are integer modes with M wider or the same
1354 width as M1. The check for integer is redundant, but
1355 safe, since the only case of differing destination
1356 modes with equal sources is when both sources are
1357 VOIDmode, i.e., CONST_INT. */
1358 (GET_MODE (m->set_dest) == GET_MODE (m1->set_dest)
1359 || (GET_MODE_CLASS (GET_MODE (m->set_dest)) == MODE_INT
1360 && GET_MODE_CLASS (GET_MODE (m1->set_dest)) == MODE_INT
1361 && (GET_MODE_BITSIZE (GET_MODE (m->set_dest))
1362 >= GET_MODE_BITSIZE (GET_MODE (m1->set_dest)))))
1363 /* See if the source of M1 says it matches M. */
1364 && ((GET_CODE (m1->set_src) == REG
1365 && matched_regs[REGNO (m1->set_src)])
1366 || rtx_equal_for_loop_p (m->set_src, m1->set_src,
1368 && ((m->dependencies == m1->dependencies)
1369 || rtx_equal_p (m->dependencies, m1->dependencies)))
1371 m->lifetime += m1->lifetime;
1372 m->savings += m1->savings;
1375 matched_regs[m1->regno] = 1;
1379 /* Now combine the regs used for zero-extension.
1380 This can be done for those not marked `global'
1381 provided their lives don't overlap. */
1383 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
1384 mode = GET_MODE_WIDER_MODE (mode))
1386 register struct movable *m0 = 0;
1388 /* Combine all the registers for extension from mode MODE.
1389 Don't combine any that are used outside this loop. */
1390 for (m = movables->head; m; m = m->next)
1391 if (m->partial && ! m->global
1392 && mode == GET_MODE (SET_SRC (PATTERN (NEXT_INSN (m->insn)))))
1394 register struct movable *m1;
1395 int first = REGNO_FIRST_LUID (m->regno);
1396 int last = REGNO_LAST_LUID (m->regno);
1400 /* First one: don't check for overlap, just record it. */
1405 /* Make sure they extend to the same mode.
1406 (Almost always true.) */
1407 if (GET_MODE (m->set_dest) != GET_MODE (m0->set_dest))
1410 /* We already have one: check for overlap with those
1411 already combined together. */
1412 for (m1 = movables->head; m1 != m; m1 = m1->next)
1413 if (m1 == m0 || (m1->partial && m1->match == m0))
1414 if (! (REGNO_FIRST_LUID (m1->regno) > last
1415 || REGNO_LAST_LUID (m1->regno) < first))
1418 /* No overlap: we can combine this with the others. */
1419 m0->lifetime += m->lifetime;
1420 m0->savings += m->savings;
1430 free (matched_regs);
1433 /* Return 1 if regs X and Y will become the same if moved. */
1436 regs_match_p (x, y, movables)
1438 struct loop_movables *movables;
1440 unsigned int xn = REGNO (x);
1441 unsigned int yn = REGNO (y);
1442 struct movable *mx, *my;
1444 for (mx = movables->head; mx; mx = mx->next)
1445 if (mx->regno == xn)
1448 for (my = movables->head; my; my = my->next)
1449 if (my->regno == yn)
1453 && ((mx->match == my->match && mx->match != 0)
1455 || mx == my->match));
1458 /* Return 1 if X and Y are identical-looking rtx's.
1459 This is the Lisp function EQUAL for rtx arguments.
1461 If two registers are matching movables or a movable register and an
1462 equivalent constant, consider them equal. */
1465 rtx_equal_for_loop_p (x, y, movables, regs)
1467 struct loop_movables *movables;
1468 struct loop_regs *regs;
1472 register struct movable *m;
1473 register enum rtx_code code;
1474 register const char *fmt;
1478 if (x == 0 || y == 0)
1481 code = GET_CODE (x);
1483 /* If we have a register and a constant, they may sometimes be
1485 if (GET_CODE (x) == REG && regs->array[REGNO (x)].set_in_loop == -2
1488 for (m = movables->head; m; m = m->next)
1489 if (m->move_insn && m->regno == REGNO (x)
1490 && rtx_equal_p (m->set_src, y))
1493 else if (GET_CODE (y) == REG && regs->array[REGNO (y)].set_in_loop == -2
1496 for (m = movables->head; m; m = m->next)
1497 if (m->move_insn && m->regno == REGNO (y)
1498 && rtx_equal_p (m->set_src, x))
1502 /* Otherwise, rtx's of different codes cannot be equal. */
1503 if (code != GET_CODE (y))
1506 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
1507 (REG:SI x) and (REG:HI x) are NOT equivalent. */
1509 if (GET_MODE (x) != GET_MODE (y))
1512 /* These three types of rtx's can be compared nonrecursively. */
1514 return (REGNO (x) == REGNO (y) || regs_match_p (x, y, movables));
1516 if (code == LABEL_REF)
1517 return XEXP (x, 0) == XEXP (y, 0);
1518 if (code == SYMBOL_REF)
1519 return XSTR (x, 0) == XSTR (y, 0);
1521 /* Compare the elements. If any pair of corresponding elements
1522 fail to match, return 0 for the whole things. */
1524 fmt = GET_RTX_FORMAT (code);
1525 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1530 if (XWINT (x, i) != XWINT (y, i))
1535 if (XINT (x, i) != XINT (y, i))
1540 /* Two vectors must have the same length. */
1541 if (XVECLEN (x, i) != XVECLEN (y, i))
1544 /* And the corresponding elements must match. */
1545 for (j = 0; j < XVECLEN (x, i); j++)
1546 if (rtx_equal_for_loop_p (XVECEXP (x, i, j), XVECEXP (y, i, j),
1547 movables, regs) == 0)
1552 if (rtx_equal_for_loop_p (XEXP (x, i), XEXP (y, i), movables, regs)
1558 if (strcmp (XSTR (x, i), XSTR (y, i)))
1563 /* These are just backpointers, so they don't matter. */
1569 /* It is believed that rtx's at this level will never
1570 contain anything but integers and other rtx's,
1571 except for within LABEL_REFs and SYMBOL_REFs. */
1579 /* If X contains any LABEL_REF's, add REG_LABEL notes for them to all
1580 insns in INSNS which use the reference. LABEL_NUSES for CODE_LABEL
1581 references is incremented once for each added note. */
1584 add_label_notes (x, insns)
1588 enum rtx_code code = GET_CODE (x);
1593 if (code == LABEL_REF && !LABEL_REF_NONLOCAL_P (x))
1595 /* This code used to ignore labels that referred to dispatch tables to
1596 avoid flow generating (slighly) worse code.
1598 We no longer ignore such label references (see LABEL_REF handling in
1599 mark_jump_label for additional information). */
1600 for (insn = insns; insn; insn = NEXT_INSN (insn))
1601 if (reg_mentioned_p (XEXP (x, 0), insn))
1603 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_LABEL, XEXP (x, 0),
1605 if (LABEL_P (XEXP (x, 0)))
1606 LABEL_NUSES (XEXP (x, 0))++;
1610 fmt = GET_RTX_FORMAT (code);
1611 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1614 add_label_notes (XEXP (x, i), insns);
1615 else if (fmt[i] == 'E')
1616 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1617 add_label_notes (XVECEXP (x, i, j), insns);
1621 /* Scan MOVABLES, and move the insns that deserve to be moved.
1622 If two matching movables are combined, replace one reg with the
1623 other throughout. */
1626 move_movables (loop, movables, threshold, insn_count)
1628 struct loop_movables *movables;
1632 struct loop_regs *regs = LOOP_REGS (loop);
1633 int nregs = regs->num;
1635 register struct movable *m;
1637 rtx loop_start = loop->start;
1638 rtx loop_end = loop->end;
1639 /* Map of pseudo-register replacements to handle combining
1640 when we move several insns that load the same value
1641 into different pseudo-registers. */
1642 rtx *reg_map = (rtx *) xcalloc (nregs, sizeof (rtx));
1643 char *already_moved = (char *) xcalloc (nregs, sizeof (char));
1647 for (m = movables->head; m; m = m->next)
1649 /* Describe this movable insn. */
1651 if (loop_dump_stream)
1653 fprintf (loop_dump_stream, "Insn %d: regno %d (life %d), ",
1654 INSN_UID (m->insn), m->regno, m->lifetime);
1656 fprintf (loop_dump_stream, "consec %d, ", m->consec);
1658 fprintf (loop_dump_stream, "cond ");
1660 fprintf (loop_dump_stream, "force ");
1662 fprintf (loop_dump_stream, "global ");
1664 fprintf (loop_dump_stream, "done ");
1666 fprintf (loop_dump_stream, "move-insn ");
1668 fprintf (loop_dump_stream, "matches %d ",
1669 INSN_UID (m->match->insn));
1671 fprintf (loop_dump_stream, "forces %d ",
1672 INSN_UID (m->forces->insn));
1675 /* Count movables. Value used in heuristics in strength_reduce. */
1678 /* Ignore the insn if it's already done (it matched something else).
1679 Otherwise, see if it is now safe to move. */
1683 || (1 == loop_invariant_p (loop, m->set_src)
1684 && (m->dependencies == 0
1685 || 1 == loop_invariant_p (loop, m->dependencies))
1687 || 1 == consec_sets_invariant_p (loop, m->set_dest,
1690 && (! m->forces || m->forces->done))
1694 int savings = m->savings;
1696 /* We have an insn that is safe to move.
1697 Compute its desirability. */
1702 if (loop_dump_stream)
1703 fprintf (loop_dump_stream, "savings %d ", savings);
1705 if (regs->array[regno].moved_once && loop_dump_stream)
1706 fprintf (loop_dump_stream, "halved since already moved ");
1708 /* An insn MUST be moved if we already moved something else
1709 which is safe only if this one is moved too: that is,
1710 if already_moved[REGNO] is nonzero. */
1712 /* An insn is desirable to move if the new lifetime of the
1713 register is no more than THRESHOLD times the old lifetime.
1714 If it's not desirable, it means the loop is so big
1715 that moving won't speed things up much,
1716 and it is liable to make register usage worse. */
1718 /* It is also desirable to move if it can be moved at no
1719 extra cost because something else was already moved. */
1721 if (already_moved[regno]
1722 || flag_move_all_movables
1723 || (threshold * savings * m->lifetime) >=
1724 (regs->array[regno].moved_once ? insn_count * 2 : insn_count)
1725 || (m->forces && m->forces->done
1726 && regs->array[m->forces->regno].n_times_set == 1))
1729 register struct movable *m1;
1730 rtx first = NULL_RTX;
1732 /* Now move the insns that set the reg. */
1734 if (m->partial && m->match)
1738 /* Find the end of this chain of matching regs.
1739 Thus, we load each reg in the chain from that one reg.
1740 And that reg is loaded with 0 directly,
1741 since it has ->match == 0. */
1742 for (m1 = m; m1->match; m1 = m1->match);
1743 newpat = gen_move_insn (SET_DEST (PATTERN (m->insn)),
1744 SET_DEST (PATTERN (m1->insn)));
1745 i1 = emit_insn_before (newpat, loop_start);
1747 /* Mark the moved, invariant reg as being allowed to
1748 share a hard reg with the other matching invariant. */
1749 REG_NOTES (i1) = REG_NOTES (m->insn);
1750 r1 = SET_DEST (PATTERN (m->insn));
1751 r2 = SET_DEST (PATTERN (m1->insn));
1753 = gen_rtx_EXPR_LIST (VOIDmode, r1,
1754 gen_rtx_EXPR_LIST (VOIDmode, r2,
1756 delete_insn (m->insn);
1761 if (loop_dump_stream)
1762 fprintf (loop_dump_stream, " moved to %d", INSN_UID (i1));
1764 /* If we are to re-generate the item being moved with a
1765 new move insn, first delete what we have and then emit
1766 the move insn before the loop. */
1767 else if (m->move_insn)
1771 for (count = m->consec; count >= 0; count--)
1773 /* If this is the first insn of a library call sequence,
1775 if (GET_CODE (p) != NOTE
1776 && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
1779 /* If this is the last insn of a libcall sequence, then
1780 delete every insn in the sequence except the last.
1781 The last insn is handled in the normal manner. */
1782 if (GET_CODE (p) != NOTE
1783 && (temp = find_reg_note (p, REG_RETVAL, NULL_RTX)))
1785 temp = XEXP (temp, 0);
1787 temp = delete_insn (temp);
1791 p = delete_insn (p);
1793 /* simplify_giv_expr expects that it can walk the insns
1794 at m->insn forwards and see this old sequence we are
1795 tossing here. delete_insn does preserve the next
1796 pointers, but when we skip over a NOTE we must fix
1797 it up. Otherwise that code walks into the non-deleted
1799 while (p && GET_CODE (p) == NOTE)
1800 p = NEXT_INSN (temp) = NEXT_INSN (p);
1804 emit_move_insn (m->set_dest, m->set_src);
1805 temp = get_insns ();
1808 add_label_notes (m->set_src, temp);
1810 i1 = emit_insns_before (temp, loop_start);
1811 if (! find_reg_note (i1, REG_EQUAL, NULL_RTX))
1813 = gen_rtx_EXPR_LIST (m->is_equiv ? REG_EQUIV : REG_EQUAL,
1814 m->set_src, REG_NOTES (i1));
1816 if (loop_dump_stream)
1817 fprintf (loop_dump_stream, " moved to %d", INSN_UID (i1));
1819 /* The more regs we move, the less we like moving them. */
1824 for (count = m->consec; count >= 0; count--)
1828 /* If first insn of libcall sequence, skip to end. */
1829 /* Do this at start of loop, since p is guaranteed to
1831 if (GET_CODE (p) != NOTE
1832 && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
1835 /* If last insn of libcall sequence, move all
1836 insns except the last before the loop. The last
1837 insn is handled in the normal manner. */
1838 if (GET_CODE (p) != NOTE
1839 && (temp = find_reg_note (p, REG_RETVAL, NULL_RTX)))
1843 rtx fn_address_insn = 0;
1846 for (temp = XEXP (temp, 0); temp != p;
1847 temp = NEXT_INSN (temp))
1853 if (GET_CODE (temp) == NOTE)
1856 body = PATTERN (temp);
1858 /* Find the next insn after TEMP,
1859 not counting USE or NOTE insns. */
1860 for (next = NEXT_INSN (temp); next != p;
1861 next = NEXT_INSN (next))
1862 if (! (GET_CODE (next) == INSN
1863 && GET_CODE (PATTERN (next)) == USE)
1864 && GET_CODE (next) != NOTE)
1867 /* If that is the call, this may be the insn
1868 that loads the function address.
1870 Extract the function address from the insn
1871 that loads it into a register.
1872 If this insn was cse'd, we get incorrect code.
1874 So emit a new move insn that copies the
1875 function address into the register that the
1876 call insn will use. flow.c will delete any
1877 redundant stores that we have created. */
1878 if (GET_CODE (next) == CALL_INSN
1879 && GET_CODE (body) == SET
1880 && GET_CODE (SET_DEST (body)) == REG
1881 && (n = find_reg_note (temp, REG_EQUAL,
1884 fn_reg = SET_SRC (body);
1885 if (GET_CODE (fn_reg) != REG)
1886 fn_reg = SET_DEST (body);
1887 fn_address = XEXP (n, 0);
1888 fn_address_insn = temp;
1890 /* We have the call insn.
1891 If it uses the register we suspect it might,
1892 load it with the correct address directly. */
1893 if (GET_CODE (temp) == CALL_INSN
1895 && reg_referenced_p (fn_reg, body))
1896 emit_insn_after (gen_move_insn (fn_reg,
1900 if (GET_CODE (temp) == CALL_INSN)
1902 i1 = emit_call_insn_before (body, loop_start);
1903 /* Because the USAGE information potentially
1904 contains objects other than hard registers
1905 we need to copy it. */
1906 if (CALL_INSN_FUNCTION_USAGE (temp))
1907 CALL_INSN_FUNCTION_USAGE (i1)
1908 = copy_rtx (CALL_INSN_FUNCTION_USAGE (temp));
1911 i1 = emit_insn_before (body, loop_start);
1914 if (temp == fn_address_insn)
1915 fn_address_insn = i1;
1916 REG_NOTES (i1) = REG_NOTES (temp);
1922 if (m->savemode != VOIDmode)
1924 /* P sets REG to zero; but we should clear only
1925 the bits that are not covered by the mode
1927 rtx reg = m->set_dest;
1933 (GET_MODE (reg), and_optab, reg,
1934 GEN_INT ((((HOST_WIDE_INT) 1
1935 << GET_MODE_BITSIZE (m->savemode)))
1937 reg, 1, OPTAB_LIB_WIDEN);
1941 emit_move_insn (reg, tem);
1942 sequence = gen_sequence ();
1944 i1 = emit_insn_before (sequence, loop_start);
1946 else if (GET_CODE (p) == CALL_INSN)
1948 i1 = emit_call_insn_before (PATTERN (p), loop_start);
1949 /* Because the USAGE information potentially
1950 contains objects other than hard registers
1951 we need to copy it. */
1952 if (CALL_INSN_FUNCTION_USAGE (p))
1953 CALL_INSN_FUNCTION_USAGE (i1)
1954 = copy_rtx (CALL_INSN_FUNCTION_USAGE (p));
1956 else if (count == m->consec && m->move_insn_first)
1958 /* The SET_SRC might not be invariant, so we must
1959 use the REG_EQUAL note. */
1961 emit_move_insn (m->set_dest, m->set_src);
1962 temp = get_insns ();
1965 add_label_notes (m->set_src, temp);
1967 i1 = emit_insns_before (temp, loop_start);
1968 if (! find_reg_note (i1, REG_EQUAL, NULL_RTX))
1970 = gen_rtx_EXPR_LIST ((m->is_equiv ? REG_EQUIV
1972 m->set_src, REG_NOTES (i1));
1975 i1 = emit_insn_before (PATTERN (p), loop_start);
1977 if (REG_NOTES (i1) == 0)
1979 REG_NOTES (i1) = REG_NOTES (p);
1981 /* If there is a REG_EQUAL note present whose value
1982 is not loop invariant, then delete it, since it
1983 may cause problems with later optimization passes.
1984 It is possible for cse to create such notes
1985 like this as a result of record_jump_cond. */
1987 if ((temp = find_reg_note (i1, REG_EQUAL, NULL_RTX))
1988 && ! loop_invariant_p (loop, XEXP (temp, 0)))
1989 remove_note (i1, temp);
1995 if (loop_dump_stream)
1996 fprintf (loop_dump_stream, " moved to %d",
1999 /* If library call, now fix the REG_NOTES that contain
2000 insn pointers, namely REG_LIBCALL on FIRST
2001 and REG_RETVAL on I1. */
2002 if ((temp = find_reg_note (i1, REG_RETVAL, NULL_RTX)))
2004 XEXP (temp, 0) = first;
2005 temp = find_reg_note (first, REG_LIBCALL, NULL_RTX);
2006 XEXP (temp, 0) = i1;
2013 /* simplify_giv_expr expects that it can walk the insns
2014 at m->insn forwards and see this old sequence we are
2015 tossing here. delete_insn does preserve the next
2016 pointers, but when we skip over a NOTE we must fix
2017 it up. Otherwise that code walks into the non-deleted
2019 while (p && GET_CODE (p) == NOTE)
2020 p = NEXT_INSN (temp) = NEXT_INSN (p);
2023 /* The more regs we move, the less we like moving them. */
2027 /* Any other movable that loads the same register
2029 already_moved[regno] = 1;
2031 /* This reg has been moved out of one loop. */
2032 regs->array[regno].moved_once = 1;
2034 /* The reg set here is now invariant. */
2036 regs->array[regno].set_in_loop = 0;
2040 /* Change the length-of-life info for the register
2041 to say it lives at least the full length of this loop.
2042 This will help guide optimizations in outer loops. */
2044 if (REGNO_FIRST_LUID (regno) > INSN_LUID (loop_start))
2045 /* This is the old insn before all the moved insns.
2046 We can't use the moved insn because it is out of range
2047 in uid_luid. Only the old insns have luids. */
2048 REGNO_FIRST_UID (regno) = INSN_UID (loop_start);
2049 if (REGNO_LAST_LUID (regno) < INSN_LUID (loop_end))
2050 REGNO_LAST_UID (regno) = INSN_UID (loop_end);
2052 /* Combine with this moved insn any other matching movables. */
2055 for (m1 = movables->head; m1; m1 = m1->next)
2060 /* Schedule the reg loaded by M1
2061 for replacement so that shares the reg of M.
2062 If the modes differ (only possible in restricted
2063 circumstances, make a SUBREG.
2065 Note this assumes that the target dependent files
2066 treat REG and SUBREG equally, including within
2067 GO_IF_LEGITIMATE_ADDRESS and in all the
2068 predicates since we never verify that replacing the
2069 original register with a SUBREG results in a
2070 recognizable insn. */
2071 if (GET_MODE (m->set_dest) == GET_MODE (m1->set_dest))
2072 reg_map[m1->regno] = m->set_dest;
2075 = gen_lowpart_common (GET_MODE (m1->set_dest),
2078 /* Get rid of the matching insn
2079 and prevent further processing of it. */
2082 /* if library call, delete all insn except last, which
2084 if ((temp = find_reg_note (m1->insn, REG_RETVAL,
2087 for (temp = XEXP (temp, 0); temp != m1->insn;
2088 temp = NEXT_INSN (temp))
2091 delete_insn (m1->insn);
2093 /* Any other movable that loads the same register
2095 already_moved[m1->regno] = 1;
2097 /* The reg merged here is now invariant,
2098 if the reg it matches is invariant. */
2100 regs->array[m1->regno].set_in_loop = 0;
2103 else if (loop_dump_stream)
2104 fprintf (loop_dump_stream, "not desirable");
2106 else if (loop_dump_stream && !m->match)
2107 fprintf (loop_dump_stream, "not safe");
2109 if (loop_dump_stream)
2110 fprintf (loop_dump_stream, "\n");
2114 new_start = loop_start;
2116 /* Go through all the instructions in the loop, making
2117 all the register substitutions scheduled in REG_MAP. */
2118 for (p = new_start; p != loop_end; p = NEXT_INSN (p))
2119 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
2120 || GET_CODE (p) == CALL_INSN)
2122 replace_regs (PATTERN (p), reg_map, nregs, 0);
2123 replace_regs (REG_NOTES (p), reg_map, nregs, 0);
2129 free (already_moved);
2134 loop_movables_add (movables, m)
2135 struct loop_movables *movables;
2138 if (movables->head == 0)
2141 movables->last->next = m;
2147 loop_movables_free (movables)
2148 struct loop_movables *movables;
2151 struct movable *m_next;
2153 for (m = movables->head; m; m = m_next)
2161 /* Scan X and replace the address of any MEM in it with ADDR.
2162 REG is the address that MEM should have before the replacement. */
2165 replace_call_address (x, reg, addr)
2168 register enum rtx_code code;
2170 register const char *fmt;
2174 code = GET_CODE (x);
2188 /* Short cut for very common case. */
2189 replace_call_address (XEXP (x, 1), reg, addr);
2193 /* Short cut for very common case. */
2194 replace_call_address (XEXP (x, 0), reg, addr);
2198 /* If this MEM uses a reg other than the one we expected,
2199 something is wrong. */
2200 if (XEXP (x, 0) != reg)
2209 fmt = GET_RTX_FORMAT (code);
2210 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2213 replace_call_address (XEXP (x, i), reg, addr);
2214 else if (fmt[i] == 'E')
2217 for (j = 0; j < XVECLEN (x, i); j++)
2218 replace_call_address (XVECEXP (x, i, j), reg, addr);
2224 /* Return the number of memory refs to addresses that vary
2228 count_nonfixed_reads (loop, x)
2229 const struct loop *loop;
2232 register enum rtx_code code;
2234 register const char *fmt;
2240 code = GET_CODE (x);
2254 return ((loop_invariant_p (loop, XEXP (x, 0)) != 1)
2255 + count_nonfixed_reads (loop, XEXP (x, 0)));
2262 fmt = GET_RTX_FORMAT (code);
2263 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2266 value += count_nonfixed_reads (loop, XEXP (x, i));
2270 for (j = 0; j < XVECLEN (x, i); j++)
2271 value += count_nonfixed_reads (loop, XVECEXP (x, i, j));
2277 /* Scan a loop setting the elements `cont', `vtop', `loops_enclosed',
2278 `has_call', `has_nonconst_call', `has_volatile', `has_tablejump',
2279 `unknown_address_altered', `unknown_constant_address_altered', and
2280 `num_mem_sets' in LOOP. Also, fill in the array `mems' and the
2281 list `store_mems' in LOOP. */
2287 register int level = 1;
2289 struct loop_info *loop_info = LOOP_INFO (loop);
2290 rtx start = loop->start;
2291 rtx end = loop->end;
2292 /* The label after END. Jumping here is just like falling off the
2293 end of the loop. We use next_nonnote_insn instead of next_label
2294 as a hedge against the (pathological) case where some actual insn
2295 might end up between the two. */
2296 rtx exit_target = next_nonnote_insn (end);
2298 loop_info->has_indirect_jump = indirect_jump_in_function;
2299 loop_info->pre_header_has_call = 0;
2300 loop_info->has_call = 0;
2301 loop_info->has_nonconst_call = 0;
2302 loop_info->has_volatile = 0;
2303 loop_info->has_tablejump = 0;
2304 loop_info->has_multiple_exit_targets = 0;
2307 loop_info->unknown_address_altered = 0;
2308 loop_info->unknown_constant_address_altered = 0;
2309 loop_info->store_mems = NULL_RTX;
2310 loop_info->first_loop_store_insn = NULL_RTX;
2311 loop_info->mems_idx = 0;
2312 loop_info->num_mem_sets = 0;
2315 for (insn = start; insn && GET_CODE (insn) != CODE_LABEL;
2316 insn = PREV_INSN (insn))
2318 if (GET_CODE (insn) == CALL_INSN)
2320 loop_info->pre_header_has_call = 1;
2325 for (insn = NEXT_INSN (start); insn != NEXT_INSN (end);
2326 insn = NEXT_INSN (insn))
2328 if (GET_CODE (insn) == NOTE)
2330 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
2333 /* Count number of loops contained in this one. */
2336 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END)
2341 else if (GET_CODE (insn) == CALL_INSN)
2343 if (! CONST_CALL_P (insn))
2345 loop_info->unknown_address_altered = 1;
2346 loop_info->has_nonconst_call = 1;
2348 loop_info->has_call = 1;
2350 else if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN)
2352 rtx label1 = NULL_RTX;
2353 rtx label2 = NULL_RTX;
2355 if (volatile_refs_p (PATTERN (insn)))
2356 loop_info->has_volatile = 1;
2358 if (GET_CODE (insn) == JUMP_INSN
2359 && (GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC
2360 || GET_CODE (PATTERN (insn)) == ADDR_VEC))
2361 loop_info->has_tablejump = 1;
2363 note_stores (PATTERN (insn), note_addr_stored, loop_info);
2364 if (! loop_info->first_loop_store_insn && loop_info->store_mems)
2365 loop_info->first_loop_store_insn = insn;
2367 if (! loop_info->has_multiple_exit_targets
2368 && GET_CODE (insn) == JUMP_INSN
2369 && GET_CODE (PATTERN (insn)) == SET
2370 && SET_DEST (PATTERN (insn)) == pc_rtx)
2372 if (GET_CODE (SET_SRC (PATTERN (insn))) == IF_THEN_ELSE)
2374 label1 = XEXP (SET_SRC (PATTERN (insn)), 1);
2375 label2 = XEXP (SET_SRC (PATTERN (insn)), 2);
2379 label1 = SET_SRC (PATTERN (insn));
2384 if (label1 && label1 != pc_rtx)
2386 if (GET_CODE (label1) != LABEL_REF)
2388 /* Something tricky. */
2389 loop_info->has_multiple_exit_targets = 1;
2392 else if (XEXP (label1, 0) != exit_target
2393 && LABEL_OUTSIDE_LOOP_P (label1))
2395 /* A jump outside the current loop. */
2396 loop_info->has_multiple_exit_targets = 1;
2407 else if (GET_CODE (insn) == RETURN)
2408 loop_info->has_multiple_exit_targets = 1;
2411 /* Now, rescan the loop, setting up the LOOP_MEMS array. */
2412 if (/* An exception thrown by a called function might land us
2414 ! loop_info->has_nonconst_call
2415 /* We don't want loads for MEMs moved to a location before the
2416 one at which their stack memory becomes allocated. (Note
2417 that this is not a problem for malloc, etc., since those
2418 require actual function calls. */
2419 && ! current_function_calls_alloca
2420 /* There are ways to leave the loop other than falling off the
2422 && ! loop_info->has_multiple_exit_targets)
2423 for (insn = NEXT_INSN (start); insn != NEXT_INSN (end);
2424 insn = NEXT_INSN (insn))
2425 for_each_rtx (&insn, insert_loop_mem, loop_info);
2427 /* BLKmode MEMs are added to LOOP_STORE_MEM as necessary so
2428 that loop_invariant_p and load_mems can use true_dependence
2429 to determine what is really clobbered. */
2430 if (loop_info->unknown_address_altered)
2432 rtx mem = gen_rtx_MEM (BLKmode, const0_rtx);
2434 loop_info->store_mems
2435 = gen_rtx_EXPR_LIST (VOIDmode, mem, loop_info->store_mems);
2437 if (loop_info->unknown_constant_address_altered)
2439 rtx mem = gen_rtx_MEM (BLKmode, const0_rtx);
2441 RTX_UNCHANGING_P (mem) = 1;
2442 loop_info->store_mems
2443 = gen_rtx_EXPR_LIST (VOIDmode, mem, loop_info->store_mems);
2447 /* Scan the function looking for loops. Record the start and end of each loop.
2448 Also mark as invalid loops any loops that contain a setjmp or are branched
2449 to from outside the loop. */
2452 find_and_verify_loops (f, loops)
2454 struct loops *loops;
2459 struct loop *current_loop;
2460 struct loop *next_loop;
2463 num_loops = loops->num;
2465 compute_luids (f, NULL_RTX, 0);
2467 /* If there are jumps to undefined labels,
2468 treat them as jumps out of any/all loops.
2469 This also avoids writing past end of tables when there are no loops. */
2472 /* Find boundaries of loops, mark which loops are contained within
2473 loops, and invalidate loops that have setjmp. */
2476 current_loop = NULL;
2477 for (insn = f; insn; insn = NEXT_INSN (insn))
2479 if (GET_CODE (insn) == NOTE)
2480 switch (NOTE_LINE_NUMBER (insn))
2482 case NOTE_INSN_LOOP_BEG:
2483 next_loop = loops->array + num_loops;
2484 next_loop->num = num_loops;
2486 next_loop->start = insn;
2487 next_loop->outer = current_loop;
2488 current_loop = next_loop;
2491 case NOTE_INSN_SETJMP:
2492 /* In this case, we must invalidate our current loop and any
2494 for (loop = current_loop; loop; loop = loop->outer)
2497 if (loop_dump_stream)
2498 fprintf (loop_dump_stream,
2499 "\nLoop at %d ignored due to setjmp.\n",
2500 INSN_UID (loop->start));
2504 case NOTE_INSN_LOOP_CONT:
2505 current_loop->cont = insn;
2508 case NOTE_INSN_LOOP_VTOP:
2509 current_loop->vtop = insn;
2512 case NOTE_INSN_LOOP_END:
2516 current_loop->end = insn;
2517 current_loop = current_loop->outer;
2524 /* Note that this will mark the NOTE_INSN_LOOP_END note as being in the
2525 enclosing loop, but this doesn't matter. */
2526 uid_loop[INSN_UID (insn)] = current_loop;
2529 /* Any loop containing a label used in an initializer must be invalidated,
2530 because it can be jumped into from anywhere. */
2532 for (label = forced_labels; label; label = XEXP (label, 1))
2534 for (loop = uid_loop[INSN_UID (XEXP (label, 0))];
2535 loop; loop = loop->outer)
2539 /* Any loop containing a label used for an exception handler must be
2540 invalidated, because it can be jumped into from anywhere. */
2542 for (label = exception_handler_labels; label; label = XEXP (label, 1))
2544 for (loop = uid_loop[INSN_UID (XEXP (label, 0))];
2545 loop; loop = loop->outer)
2549 /* Now scan all insn's in the function. If any JUMP_INSN branches into a
2550 loop that it is not contained within, that loop is marked invalid.
2551 If any INSN or CALL_INSN uses a label's address, then the loop containing
2552 that label is marked invalid, because it could be jumped into from
2555 Also look for blocks of code ending in an unconditional branch that
2556 exits the loop. If such a block is surrounded by a conditional
2557 branch around the block, move the block elsewhere (see below) and
2558 invert the jump to point to the code block. This may eliminate a
2559 label in our loop and will simplify processing by both us and a
2560 possible second cse pass. */
2562 for (insn = f; insn; insn = NEXT_INSN (insn))
2565 struct loop *this_loop = uid_loop[INSN_UID (insn)];
2567 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
2569 rtx note = find_reg_note (insn, REG_LABEL, NULL_RTX);
2572 for (loop = uid_loop[INSN_UID (XEXP (note, 0))];
2573 loop; loop = loop->outer)
2578 if (GET_CODE (insn) != JUMP_INSN)
2581 mark_loop_jump (PATTERN (insn), this_loop);
2583 /* See if this is an unconditional branch outside the loop. */
2585 && (GET_CODE (PATTERN (insn)) == RETURN
2586 || (any_uncondjump_p (insn)
2587 && onlyjump_p (insn)
2588 && (uid_loop[INSN_UID (JUMP_LABEL (insn))]
2590 && get_max_uid () < max_uid_for_loop)
2593 rtx our_next = next_real_insn (insn);
2594 rtx last_insn_to_move = NEXT_INSN (insn);
2595 struct loop *dest_loop;
2596 struct loop *outer_loop = NULL;
2598 /* Go backwards until we reach the start of the loop, a label,
2600 for (p = PREV_INSN (insn);
2601 GET_CODE (p) != CODE_LABEL
2602 && ! (GET_CODE (p) == NOTE
2603 && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
2604 && GET_CODE (p) != JUMP_INSN;
2608 /* Check for the case where we have a jump to an inner nested
2609 loop, and do not perform the optimization in that case. */
2611 if (JUMP_LABEL (insn))
2613 dest_loop = uid_loop[INSN_UID (JUMP_LABEL (insn))];
2616 for (outer_loop = dest_loop; outer_loop;
2617 outer_loop = outer_loop->outer)
2618 if (outer_loop == this_loop)
2623 /* Make sure that the target of P is within the current loop. */
2625 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p)
2626 && uid_loop[INSN_UID (JUMP_LABEL (p))] != this_loop)
2627 outer_loop = this_loop;
2629 /* If we stopped on a JUMP_INSN to the next insn after INSN,
2630 we have a block of code to try to move.
2632 We look backward and then forward from the target of INSN
2633 to find a BARRIER at the same loop depth as the target.
2634 If we find such a BARRIER, we make a new label for the start
2635 of the block, invert the jump in P and point it to that label,
2636 and move the block of code to the spot we found. */
2639 && GET_CODE (p) == JUMP_INSN
2640 && JUMP_LABEL (p) != 0
2641 /* Just ignore jumps to labels that were never emitted.
2642 These always indicate compilation errors. */
2643 && INSN_UID (JUMP_LABEL (p)) != 0
2644 && any_condjump_p (p) && onlyjump_p (p)
2645 && next_real_insn (JUMP_LABEL (p)) == our_next
2646 /* If it's not safe to move the sequence, then we
2648 && insns_safe_to_move_p (p, NEXT_INSN (insn),
2649 &last_insn_to_move))
2652 = JUMP_LABEL (insn) ? JUMP_LABEL (insn) : get_last_insn ();
2653 struct loop *target_loop = uid_loop[INSN_UID (target)];
2656 for (loc = target; loc; loc = PREV_INSN (loc))
2657 if (GET_CODE (loc) == BARRIER
2658 /* Don't move things inside a tablejump. */
2659 && ((loc2 = next_nonnote_insn (loc)) == 0
2660 || GET_CODE (loc2) != CODE_LABEL
2661 || (loc2 = next_nonnote_insn (loc2)) == 0
2662 || GET_CODE (loc2) != JUMP_INSN
2663 || (GET_CODE (PATTERN (loc2)) != ADDR_VEC
2664 && GET_CODE (PATTERN (loc2)) != ADDR_DIFF_VEC))
2665 && uid_loop[INSN_UID (loc)] == target_loop)
2669 for (loc = target; loc; loc = NEXT_INSN (loc))
2670 if (GET_CODE (loc) == BARRIER
2671 /* Don't move things inside a tablejump. */
2672 && ((loc2 = next_nonnote_insn (loc)) == 0
2673 || GET_CODE (loc2) != CODE_LABEL
2674 || (loc2 = next_nonnote_insn (loc2)) == 0
2675 || GET_CODE (loc2) != JUMP_INSN
2676 || (GET_CODE (PATTERN (loc2)) != ADDR_VEC
2677 && GET_CODE (PATTERN (loc2)) != ADDR_DIFF_VEC))
2678 && uid_loop[INSN_UID (loc)] == target_loop)
2683 rtx cond_label = JUMP_LABEL (p);
2684 rtx new_label = get_label_after (p);
2686 /* Ensure our label doesn't go away. */
2687 LABEL_NUSES (cond_label)++;
2689 /* Verify that uid_loop is large enough and that
2691 if (invert_jump (p, new_label, 1))
2695 /* If no suitable BARRIER was found, create a suitable
2696 one before TARGET. Since TARGET is a fall through
2697 path, we'll need to insert an jump around our block
2698 and a add a BARRIER before TARGET.
2700 This creates an extra unconditional jump outside
2701 the loop. However, the benefits of removing rarely
2702 executed instructions from inside the loop usually
2703 outweighs the cost of the extra unconditional jump
2704 outside the loop. */
2709 temp = gen_jump (JUMP_LABEL (insn));
2710 temp = emit_jump_insn_before (temp, target);
2711 JUMP_LABEL (temp) = JUMP_LABEL (insn);
2712 LABEL_NUSES (JUMP_LABEL (insn))++;
2713 loc = emit_barrier_before (target);
2716 /* Include the BARRIER after INSN and copy the
2718 new_label = squeeze_notes (new_label,
2720 reorder_insns (new_label, last_insn_to_move, loc);
2722 /* All those insns are now in TARGET_LOOP. */
2724 q != NEXT_INSN (last_insn_to_move);
2726 uid_loop[INSN_UID (q)] = target_loop;
2728 /* The label jumped to by INSN is no longer a loop
2729 exit. Unless INSN does not have a label (e.g.,
2730 it is a RETURN insn), search loop->exit_labels
2731 to find its label_ref, and remove it. Also turn
2732 off LABEL_OUTSIDE_LOOP_P bit. */
2733 if (JUMP_LABEL (insn))
2735 for (q = 0, r = this_loop->exit_labels;
2737 q = r, r = LABEL_NEXTREF (r))
2738 if (XEXP (r, 0) == JUMP_LABEL (insn))
2740 LABEL_OUTSIDE_LOOP_P (r) = 0;
2742 LABEL_NEXTREF (q) = LABEL_NEXTREF (r);
2744 this_loop->exit_labels = LABEL_NEXTREF (r);
2748 for (loop = this_loop; loop && loop != target_loop;
2752 /* If we didn't find it, then something is
2758 /* P is now a jump outside the loop, so it must be put
2759 in loop->exit_labels, and marked as such.
2760 The easiest way to do this is to just call
2761 mark_loop_jump again for P. */
2762 mark_loop_jump (PATTERN (p), this_loop);
2764 /* If INSN now jumps to the insn after it,
2766 if (JUMP_LABEL (insn) != 0
2767 && (next_real_insn (JUMP_LABEL (insn))
2768 == next_real_insn (insn)))
2772 /* Continue the loop after where the conditional
2773 branch used to jump, since the only branch insn
2774 in the block (if it still remains) is an inter-loop
2775 branch and hence needs no processing. */
2776 insn = NEXT_INSN (cond_label);
2778 if (--LABEL_NUSES (cond_label) == 0)
2779 delete_insn (cond_label);
2781 /* This loop will be continued with NEXT_INSN (insn). */
2782 insn = PREV_INSN (insn);
2789 /* If any label in X jumps to a loop different from LOOP_NUM and any of the
2790 loops it is contained in, mark the target loop invalid.
2792 For speed, we assume that X is part of a pattern of a JUMP_INSN. */
2795 mark_loop_jump (x, loop)
2799 struct loop *dest_loop;
2800 struct loop *outer_loop;
2803 switch (GET_CODE (x))
2816 /* There could be a label reference in here. */
2817 mark_loop_jump (XEXP (x, 0), loop);
2823 mark_loop_jump (XEXP (x, 0), loop);
2824 mark_loop_jump (XEXP (x, 1), loop);
2828 /* This may refer to a LABEL_REF or SYMBOL_REF. */
2829 mark_loop_jump (XEXP (x, 1), loop);
2834 mark_loop_jump (XEXP (x, 0), loop);
2838 dest_loop = uid_loop[INSN_UID (XEXP (x, 0))];
2840 /* Link together all labels that branch outside the loop. This
2841 is used by final_[bg]iv_value and the loop unrolling code. Also
2842 mark this LABEL_REF so we know that this branch should predict
2845 /* A check to make sure the label is not in an inner nested loop,
2846 since this does not count as a loop exit. */
2849 for (outer_loop = dest_loop; outer_loop;
2850 outer_loop = outer_loop->outer)
2851 if (outer_loop == loop)
2857 if (loop && ! outer_loop)
2859 LABEL_OUTSIDE_LOOP_P (x) = 1;
2860 LABEL_NEXTREF (x) = loop->exit_labels;
2861 loop->exit_labels = x;
2863 for (outer_loop = loop;
2864 outer_loop && outer_loop != dest_loop;
2865 outer_loop = outer_loop->outer)
2866 outer_loop->exit_count++;
2869 /* If this is inside a loop, but not in the current loop or one enclosed
2870 by it, it invalidates at least one loop. */
2875 /* We must invalidate every nested loop containing the target of this
2876 label, except those that also contain the jump insn. */
2878 for (; dest_loop; dest_loop = dest_loop->outer)
2880 /* Stop when we reach a loop that also contains the jump insn. */
2881 for (outer_loop = loop; outer_loop; outer_loop = outer_loop->outer)
2882 if (dest_loop == outer_loop)
2885 /* If we get here, we know we need to invalidate a loop. */
2886 if (loop_dump_stream && ! dest_loop->invalid)
2887 fprintf (loop_dump_stream,
2888 "\nLoop at %d ignored due to multiple entry points.\n",
2889 INSN_UID (dest_loop->start));
2891 dest_loop->invalid = 1;
2896 /* If this is not setting pc, ignore. */
2897 if (SET_DEST (x) == pc_rtx)
2898 mark_loop_jump (SET_SRC (x), loop);
2902 mark_loop_jump (XEXP (x, 1), loop);
2903 mark_loop_jump (XEXP (x, 2), loop);
2908 for (i = 0; i < XVECLEN (x, 0); i++)
2909 mark_loop_jump (XVECEXP (x, 0, i), loop);
2913 for (i = 0; i < XVECLEN (x, 1); i++)
2914 mark_loop_jump (XVECEXP (x, 1, i), loop);
2918 /* Strictly speaking this is not a jump into the loop, only a possible
2919 jump out of the loop. However, we have no way to link the destination
2920 of this jump onto the list of exit labels. To be safe we mark this
2921 loop and any containing loops as invalid. */
2924 for (outer_loop = loop; outer_loop; outer_loop = outer_loop->outer)
2926 if (loop_dump_stream && ! outer_loop->invalid)
2927 fprintf (loop_dump_stream,
2928 "\nLoop at %d ignored due to unknown exit jump.\n",
2929 INSN_UID (outer_loop->start));
2930 outer_loop->invalid = 1;
2937 /* Return nonzero if there is a label in the range from
2938 insn INSN to and including the insn whose luid is END
2939 INSN must have an assigned luid (i.e., it must not have
2940 been previously created by loop.c). */
2943 labels_in_range_p (insn, end)
2947 while (insn && INSN_LUID (insn) <= end)
2949 if (GET_CODE (insn) == CODE_LABEL)
2951 insn = NEXT_INSN (insn);
2957 /* Record that a memory reference X is being set. */
2960 note_addr_stored (x, y, data)
2962 rtx y ATTRIBUTE_UNUSED;
2963 void *data ATTRIBUTE_UNUSED;
2965 struct loop_info *loop_info = data;
2967 if (x == 0 || GET_CODE (x) != MEM)
2970 /* Count number of memory writes.
2971 This affects heuristics in strength_reduce. */
2972 loop_info->num_mem_sets++;
2974 /* BLKmode MEM means all memory is clobbered. */
2975 if (GET_MODE (x) == BLKmode)
2977 if (RTX_UNCHANGING_P (x))
2978 loop_info->unknown_constant_address_altered = 1;
2980 loop_info->unknown_address_altered = 1;
2985 loop_info->store_mems = gen_rtx_EXPR_LIST (VOIDmode, x,
2986 loop_info->store_mems);
2989 /* X is a value modified by an INSN that references a biv inside a loop
2990 exit test (ie, X is somehow related to the value of the biv). If X
2991 is a pseudo that is used more than once, then the biv is (effectively)
2992 used more than once. DATA is a pointer to a loop_regs structure. */
2995 note_set_pseudo_multiple_uses (x, y, data)
2997 rtx y ATTRIBUTE_UNUSED;
3000 struct loop_regs *regs = (struct loop_regs *) data;
3005 while (GET_CODE (x) == STRICT_LOW_PART
3006 || GET_CODE (x) == SIGN_EXTRACT
3007 || GET_CODE (x) == ZERO_EXTRACT
3008 || GET_CODE (x) == SUBREG)
3011 if (GET_CODE (x) != REG || REGNO (x) < FIRST_PSEUDO_REGISTER)
3014 /* If we do not have usage information, or if we know the register
3015 is used more than once, note that fact for check_dbra_loop. */
3016 if (REGNO (x) >= max_reg_before_loop
3017 || ! regs->array[REGNO (x)].single_usage
3018 || regs->array[REGNO (x)].single_usage == const0_rtx)
3019 regs->multiple_uses = 1;
3022 /* Return nonzero if the rtx X is invariant over the current loop.
3024 The value is 2 if we refer to something only conditionally invariant.
3026 A memory ref is invariant if it is not volatile and does not conflict
3027 with anything stored in `loop_info->store_mems'. */
3030 loop_invariant_p (loop, x)
3031 const struct loop *loop;
3034 struct loop_info *loop_info = LOOP_INFO (loop);
3035 struct loop_regs *regs = LOOP_REGS (loop);
3037 register enum rtx_code code;
3038 register const char *fmt;
3039 int conditional = 0;
3044 code = GET_CODE (x);
3054 /* A LABEL_REF is normally invariant, however, if we are unrolling
3055 loops, and this label is inside the loop, then it isn't invariant.
3056 This is because each unrolled copy of the loop body will have
3057 a copy of this label. If this was invariant, then an insn loading
3058 the address of this label into a register might get moved outside
3059 the loop, and then each loop body would end up using the same label.
3061 We don't know the loop bounds here though, so just fail for all
3063 if (flag_unroll_loops)
3070 case UNSPEC_VOLATILE:
3074 /* We used to check RTX_UNCHANGING_P (x) here, but that is invalid
3075 since the reg might be set by initialization within the loop. */
3077 if ((x == frame_pointer_rtx || x == hard_frame_pointer_rtx
3078 || x == arg_pointer_rtx)
3079 && ! current_function_has_nonlocal_goto)
3082 if (LOOP_INFO (loop)->has_call
3083 && REGNO (x) < FIRST_PSEUDO_REGISTER && call_used_regs[REGNO (x)])
3086 if (regs->array[REGNO (x)].set_in_loop < 0)
3089 return regs->array[REGNO (x)].set_in_loop == 0;
3092 /* Volatile memory references must be rejected. Do this before
3093 checking for read-only items, so that volatile read-only items
3094 will be rejected also. */
3095 if (MEM_VOLATILE_P (x))
3098 /* See if there is any dependence between a store and this load. */
3099 mem_list_entry = loop_info->store_mems;
3100 while (mem_list_entry)
3102 if (true_dependence (XEXP (mem_list_entry, 0), VOIDmode,
3106 mem_list_entry = XEXP (mem_list_entry, 1);
3109 /* It's not invalidated by a store in memory
3110 but we must still verify the address is invariant. */
3114 /* Don't mess with insns declared volatile. */
3115 if (MEM_VOLATILE_P (x))
3123 fmt = GET_RTX_FORMAT (code);
3124 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3128 int tem = loop_invariant_p (loop, XEXP (x, i));
3134 else if (fmt[i] == 'E')
3137 for (j = 0; j < XVECLEN (x, i); j++)
3139 int tem = loop_invariant_p (loop, XVECEXP (x, i, j));
3149 return 1 + conditional;
3152 /* Return nonzero if all the insns in the loop that set REG
3153 are INSN and the immediately following insns,
3154 and if each of those insns sets REG in an invariant way
3155 (not counting uses of REG in them).
3157 The value is 2 if some of these insns are only conditionally invariant.
3159 We assume that INSN itself is the first set of REG
3160 and that its source is invariant. */
3163 consec_sets_invariant_p (loop, reg, n_sets, insn)
3164 const struct loop *loop;
3168 struct loop_regs *regs = LOOP_REGS (loop);
3170 unsigned int regno = REGNO (reg);
3172 /* Number of sets we have to insist on finding after INSN. */
3173 int count = n_sets - 1;
3174 int old = regs->array[regno].set_in_loop;
3178 /* If N_SETS hit the limit, we can't rely on its value. */
3182 regs->array[regno].set_in_loop = 0;
3186 register enum rtx_code code;
3190 code = GET_CODE (p);
3192 /* If library call, skip to end of it. */
3193 if (code == INSN && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
3198 && (set = single_set (p))
3199 && GET_CODE (SET_DEST (set)) == REG
3200 && REGNO (SET_DEST (set)) == regno)
3202 this = loop_invariant_p (loop, SET_SRC (set));
3205 else if ((temp = find_reg_note (p, REG_EQUAL, NULL_RTX)))
3207 /* If this is a libcall, then any invariant REG_EQUAL note is OK.
3208 If this is an ordinary insn, then only CONSTANT_P REG_EQUAL
3210 this = (CONSTANT_P (XEXP (temp, 0))
3211 || (find_reg_note (p, REG_RETVAL, NULL_RTX)
3212 && loop_invariant_p (loop, XEXP (temp, 0))));
3219 else if (code != NOTE)
3221 regs->array[regno].set_in_loop = old;
3226 regs->array[regno].set_in_loop = old;
3227 /* If loop_invariant_p ever returned 2, we return 2. */
3228 return 1 + (value & 2);
3232 /* I don't think this condition is sufficient to allow INSN
3233 to be moved, so we no longer test it. */
3235 /* Return 1 if all insns in the basic block of INSN and following INSN
3236 that set REG are invariant according to TABLE. */
3239 all_sets_invariant_p (reg, insn, table)
3243 register rtx p = insn;
3244 register int regno = REGNO (reg);
3248 register enum rtx_code code;
3250 code = GET_CODE (p);
3251 if (code == CODE_LABEL || code == JUMP_INSN)
3253 if (code == INSN && GET_CODE (PATTERN (p)) == SET
3254 && GET_CODE (SET_DEST (PATTERN (p))) == REG
3255 && REGNO (SET_DEST (PATTERN (p))) == regno)
3257 if (! loop_invariant_p (loop, SET_SRC (PATTERN (p)), table))
3264 /* Look at all uses (not sets) of registers in X. For each, if it is
3265 the single use, set USAGE[REGNO] to INSN; if there was a previous use in
3266 a different insn, set USAGE[REGNO] to const0_rtx. */
3269 find_single_use_in_loop (regs, insn, x)
3270 struct loop_regs *regs;
3274 enum rtx_code code = GET_CODE (x);
3275 const char *fmt = GET_RTX_FORMAT (code);
3279 regs->array[REGNO (x)].single_usage
3280 = (regs->array[REGNO (x)].single_usage != 0
3281 && regs->array[REGNO (x)].single_usage != insn)
3282 ? const0_rtx : insn;
3284 else if (code == SET)
3286 /* Don't count SET_DEST if it is a REG; otherwise count things
3287 in SET_DEST because if a register is partially modified, it won't
3288 show up as a potential movable so we don't care how USAGE is set
3290 if (GET_CODE (SET_DEST (x)) != REG)
3291 find_single_use_in_loop (regs, insn, SET_DEST (x));
3292 find_single_use_in_loop (regs, insn, SET_SRC (x));
3295 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3297 if (fmt[i] == 'e' && XEXP (x, i) != 0)
3298 find_single_use_in_loop (regs, insn, XEXP (x, i));
3299 else if (fmt[i] == 'E')
3300 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3301 find_single_use_in_loop (regs, insn, XVECEXP (x, i, j));
3305 /* Count and record any set in X which is contained in INSN. Update
3306 REGS->array[I].MAY_NOT_OPTIMIZE and LAST_SET for any register I set
3310 count_one_set (regs, insn, x, last_set)
3311 struct loop_regs *regs;
3315 if (GET_CODE (x) == CLOBBER && GET_CODE (XEXP (x, 0)) == REG)
3316 /* Don't move a reg that has an explicit clobber.
3317 It's not worth the pain to try to do it correctly. */
3318 regs->array[REGNO (XEXP (x, 0))].may_not_optimize = 1;
3320 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
3322 rtx dest = SET_DEST (x);
3323 while (GET_CODE (dest) == SUBREG
3324 || GET_CODE (dest) == ZERO_EXTRACT
3325 || GET_CODE (dest) == SIGN_EXTRACT
3326 || GET_CODE (dest) == STRICT_LOW_PART)
3327 dest = XEXP (dest, 0);
3328 if (GET_CODE (dest) == REG)
3330 register int regno = REGNO (dest);
3331 /* If this is the first setting of this reg
3332 in current basic block, and it was set before,
3333 it must be set in two basic blocks, so it cannot
3334 be moved out of the loop. */
3335 if (regs->array[regno].set_in_loop > 0
3337 regs->array[regno].may_not_optimize = 1;
3338 /* If this is not first setting in current basic block,
3339 see if reg was used in between previous one and this.
3340 If so, neither one can be moved. */
3341 if (last_set[regno] != 0
3342 && reg_used_between_p (dest, last_set[regno], insn))
3343 regs->array[regno].may_not_optimize = 1;
3344 if (regs->array[regno].set_in_loop < 127)
3345 ++regs->array[regno].set_in_loop;
3346 last_set[regno] = insn;
3351 /* Increment REGS->array[I].SET_IN_LOOP at the index I of each
3352 register that is modified by an insn between FROM and TO. If the
3353 value of an element of REGS->array[I].SET_IN_LOOP becomes 127 or
3354 more, stop incrementing it, to avoid overflow.
3356 Store in REGS->array[I].SINGLE_USAGE[I] the single insn in which
3357 register I is used, if it is only used once. Otherwise, it is set
3358 to 0 (for no uses) or const0_rtx for more than one use. This
3359 parameter may be zero, in which case this processing is not done.
3361 Store in *COUNT_PTR the number of actual instruction
3362 in the loop. We use this to decide what is worth moving out. */
3364 /* last_set[n] is nonzero iff reg n has been set in the current basic block.
3365 In that case, it is the insn that last set reg n. */
3368 count_loop_regs_set (loop, count_ptr)
3369 const struct loop *loop;
3372 struct loop_regs *regs = LOOP_REGS (loop);
3373 register rtx *last_set = (rtx *) xcalloc (regs->num, sizeof (rtx));
3375 register int count = 0;
3377 for (insn = loop->top ? loop->top : loop->start; insn != loop->end;
3378 insn = NEXT_INSN (insn))
3384 /* Record registers that have exactly one use. */
3385 find_single_use_in_loop (regs, insn, PATTERN (insn));
3387 /* Include uses in REG_EQUAL notes. */
3388 if (REG_NOTES (insn))
3389 find_single_use_in_loop (regs, insn, REG_NOTES (insn));
3391 if (GET_CODE (PATTERN (insn)) == SET
3392 || GET_CODE (PATTERN (insn)) == CLOBBER)
3393 count_one_set (regs, insn, PATTERN (insn), last_set);
3394 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
3397 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
3398 count_one_set (regs, insn, XVECEXP (PATTERN (insn), 0, i),
3403 if (GET_CODE (insn) == CODE_LABEL || GET_CODE (insn) == JUMP_INSN)
3404 memset ((char *) last_set, 0, regs->num * sizeof (rtx));
3412 /* Given a loop that is bounded by LOOP->START and LOOP->END and that
3413 is entered at LOOP->SCAN_START, return 1 if the register set in SET
3414 contained in insn INSN is used by any insn that precedes INSN in
3415 cyclic order starting from the loop entry point.
3417 We don't want to use INSN_LUID here because if we restrict INSN to those
3418 that have a valid INSN_LUID, it means we cannot move an invariant out
3419 from an inner loop past two loops. */
3422 loop_reg_used_before_p (loop, set, insn)
3423 const struct loop *loop;
3426 rtx reg = SET_DEST (set);
3429 /* Scan forward checking for register usage. If we hit INSN, we
3430 are done. Otherwise, if we hit LOOP->END, wrap around to LOOP->START. */
3431 for (p = loop->scan_start; p != insn; p = NEXT_INSN (p))
3433 if (INSN_P (p) && reg_overlap_mentioned_p (reg, PATTERN (p)))
3443 /* A "basic induction variable" or biv is a pseudo reg that is set
3444 (within this loop) only by incrementing or decrementing it. */
3445 /* A "general induction variable" or giv is a pseudo reg whose
3446 value is a linear function of a biv. */
3448 /* Bivs are recognized by `basic_induction_var';
3449 Givs by `general_induction_var'. */
3451 /* Communication with routines called via `note_stores'. */
3453 static rtx note_insn;
3455 /* Dummy register to have non-zero DEST_REG for DEST_ADDR type givs. */
3457 static rtx addr_placeholder;
3459 /* ??? Unfinished optimizations, and possible future optimizations,
3460 for the strength reduction code. */
3462 /* ??? The interaction of biv elimination, and recognition of 'constant'
3463 bivs, may cause problems. */
3465 /* ??? Add heuristics so that DEST_ADDR strength reduction does not cause
3466 performance problems.
3468 Perhaps don't eliminate things that can be combined with an addressing
3469 mode. Find all givs that have the same biv, mult_val, and add_val;
3470 then for each giv, check to see if its only use dies in a following
3471 memory address. If so, generate a new memory address and check to see
3472 if it is valid. If it is valid, then store the modified memory address,
3473 otherwise, mark the giv as not done so that it will get its own iv. */
3475 /* ??? Could try to optimize branches when it is known that a biv is always
3478 /* ??? When replace a biv in a compare insn, we should replace with closest
3479 giv so that an optimized branch can still be recognized by the combiner,
3480 e.g. the VAX acb insn. */
3482 /* ??? Many of the checks involving uid_luid could be simplified if regscan
3483 was rerun in loop_optimize whenever a register was added or moved.
3484 Also, some of the optimizations could be a little less conservative. */
3486 /* Scan the loop body and call FNCALL for each insn. In the addition to the
3487 LOOP and INSN parameters pass MAYBE_MULTIPLE and NOT_EVERY_ITERATION to the
3490 NOT_EVERY_ITERATION if current insn is not executed at least once for every
3491 loop iteration except for the last one.
3493 MAYBE_MULTIPLE is 1 if current insn may be executed more than once for every
3497 for_each_insn_in_loop (loop, fncall)
3499 loop_insn_callback fncall;
3501 /* This is 1 if current insn is not executed at least once for every loop
3503 int not_every_iteration = 0;
3504 int maybe_multiple = 0;
3505 int past_loop_latch = 0;
3509 /* If loop_scan_start points to the loop exit test, we have to be wary of
3510 subversive use of gotos inside expression statements. */
3511 if (prev_nonnote_insn (loop->scan_start) != prev_nonnote_insn (loop->start))
3512 maybe_multiple = back_branch_in_range_p (loop, loop->scan_start);
3514 /* Scan through loop to find all possible bivs. */
3516 for (p = next_insn_in_loop (loop, loop->scan_start);
3518 p = next_insn_in_loop (loop, p))
3520 p = fncall (loop, p, not_every_iteration, maybe_multiple);
3522 /* Past CODE_LABEL, we get to insns that may be executed multiple
3523 times. The only way we can be sure that they can't is if every
3524 jump insn between here and the end of the loop either
3525 returns, exits the loop, is a jump to a location that is still
3526 behind the label, or is a jump to the loop start. */
3528 if (GET_CODE (p) == CODE_LABEL)
3536 insn = NEXT_INSN (insn);
3537 if (insn == loop->scan_start)
3539 if (insn == loop->end)
3545 if (insn == loop->scan_start)
3549 if (GET_CODE (insn) == JUMP_INSN
3550 && GET_CODE (PATTERN (insn)) != RETURN
3551 && (!any_condjump_p (insn)
3552 || (JUMP_LABEL (insn) != 0
3553 && JUMP_LABEL (insn) != loop->scan_start
3554 && !loop_insn_first_p (p, JUMP_LABEL (insn)))))
3562 /* Past a jump, we get to insns for which we can't count
3563 on whether they will be executed during each iteration. */
3564 /* This code appears twice in strength_reduce. There is also similar
3565 code in scan_loop. */
3566 if (GET_CODE (p) == JUMP_INSN
3567 /* If we enter the loop in the middle, and scan around to the
3568 beginning, don't set not_every_iteration for that.
3569 This can be any kind of jump, since we want to know if insns
3570 will be executed if the loop is executed. */
3571 && !(JUMP_LABEL (p) == loop->top
3572 && ((NEXT_INSN (NEXT_INSN (p)) == loop->end
3573 && any_uncondjump_p (p))
3574 || (NEXT_INSN (p) == loop->end && any_condjump_p (p)))))
3578 /* If this is a jump outside the loop, then it also doesn't
3579 matter. Check to see if the target of this branch is on the
3580 loop->exits_labels list. */
3582 for (label = loop->exit_labels; label; label = LABEL_NEXTREF (label))
3583 if (XEXP (label, 0) == JUMP_LABEL (p))
3587 not_every_iteration = 1;
3590 else if (GET_CODE (p) == NOTE)
3592 /* At the virtual top of a converted loop, insns are again known to
3593 be executed each iteration: logically, the loop begins here
3594 even though the exit code has been duplicated.
3596 Insns are also again known to be executed each iteration at
3597 the LOOP_CONT note. */
3598 if ((NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP
3599 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_CONT)
3601 not_every_iteration = 0;
3602 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
3604 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
3608 /* Note if we pass a loop latch. If we do, then we can not clear
3609 NOT_EVERY_ITERATION below when we pass the last CODE_LABEL in
3610 a loop since a jump before the last CODE_LABEL may have started
3611 a new loop iteration.
3613 Note that LOOP_TOP is only set for rotated loops and we need
3614 this check for all loops, so compare against the CODE_LABEL
3615 which immediately follows LOOP_START. */
3616 if (GET_CODE (p) == JUMP_INSN
3617 && JUMP_LABEL (p) == NEXT_INSN (loop->start))
3618 past_loop_latch = 1;
3620 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
3621 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
3622 or not an insn is known to be executed each iteration of the
3623 loop, whether or not any iterations are known to occur.
3625 Therefore, if we have just passed a label and have no more labels
3626 between here and the test insn of the loop, and we have not passed
3627 a jump to the top of the loop, then we know these insns will be
3628 executed each iteration. */
3630 if (not_every_iteration
3632 && GET_CODE (p) == CODE_LABEL
3633 && no_labels_between_p (p, loop->end)
3634 && loop_insn_first_p (p, loop->cont))
3635 not_every_iteration = 0;
3640 loop_bivs_find (loop)
3643 struct loop_regs *regs = LOOP_REGS (loop);
3644 struct loop_ivs *ivs = LOOP_IVS (loop);
3645 /* Temporary list pointers for traversing ivs->list. */
3646 struct iv_class *bl, **backbl;
3650 for_each_insn_in_loop (loop, check_insn_for_bivs);
3652 /* Scan ivs->list to remove all regs that proved not to be bivs.
3653 Make a sanity check against regs->n_times_set. */
3654 for (backbl = &ivs->list, bl = *backbl; bl; bl = bl->next)
3656 if (REG_IV_TYPE (ivs, bl->regno) != BASIC_INDUCT
3657 /* Above happens if register modified by subreg, etc. */
3658 /* Make sure it is not recognized as a basic induction var: */
3659 || regs->array[bl->regno].n_times_set != bl->biv_count
3660 /* If never incremented, it is invariant that we decided not to
3661 move. So leave it alone. */
3662 || ! bl->incremented)
3664 if (loop_dump_stream)
3665 fprintf (loop_dump_stream, "Reg %d: biv discarded, %s\n",
3667 (REG_IV_TYPE (ivs, bl->regno) != BASIC_INDUCT
3668 ? "not induction variable"
3669 : (! bl->incremented ? "never incremented"
3672 REG_IV_TYPE (ivs, bl->regno) = NOT_BASIC_INDUCT;
3679 if (loop_dump_stream)
3680 fprintf (loop_dump_stream, "Reg %d: biv verified\n", bl->regno);
3686 /* Determine how BIVS are initialised by looking through pre-header
3687 extended basic block. */
3689 loop_bivs_init_find (loop)
3692 struct loop_ivs *ivs = LOOP_IVS (loop);
3693 /* Temporary list pointers for traversing ivs->list. */
3694 struct iv_class *bl;
3698 /* Find initial value for each biv by searching backwards from loop_start,
3699 halting at first label. Also record any test condition. */
3702 for (p = loop->start; p && GET_CODE (p) != CODE_LABEL; p = PREV_INSN (p))
3708 if (GET_CODE (p) == CALL_INSN)
3712 note_stores (PATTERN (p), record_initial, ivs);
3714 /* Record any test of a biv that branches around the loop if no store
3715 between it and the start of loop. We only care about tests with
3716 constants and registers and only certain of those. */
3717 if (GET_CODE (p) == JUMP_INSN
3718 && JUMP_LABEL (p) != 0
3719 && next_real_insn (JUMP_LABEL (p)) == next_real_insn (loop->end)
3720 && (test = get_condition_for_loop (loop, p)) != 0
3721 && GET_CODE (XEXP (test, 0)) == REG
3722 && REGNO (XEXP (test, 0)) < max_reg_before_loop
3723 && (bl = REG_IV_CLASS (ivs, REGNO (XEXP (test, 0)))) != 0
3724 && valid_initial_value_p (XEXP (test, 1), p, call_seen, loop->start)
3725 && bl->init_insn == 0)
3727 /* If an NE test, we have an initial value! */
3728 if (GET_CODE (test) == NE)
3731 bl->init_set = gen_rtx_SET (VOIDmode,
3732 XEXP (test, 0), XEXP (test, 1));
3735 bl->initial_test = test;
3741 /* Look at the each biv and see if we can say anything better about its
3742 initial value from any initializing insns set up above. (This is done
3743 in two passes to avoid missing SETs in a PARALLEL.) */
3745 loop_bivs_check (loop)
3748 struct loop_ivs *ivs = LOOP_IVS (loop);
3749 /* Temporary list pointers for traversing ivs->list. */
3750 struct iv_class *bl;
3751 struct iv_class **backbl;
3753 for (backbl = &ivs->list; (bl = *backbl); backbl = &bl->next)
3758 if (! bl->init_insn)
3761 /* IF INIT_INSN has a REG_EQUAL or REG_EQUIV note and the value
3762 is a constant, use the value of that. */
3763 if (((note = find_reg_note (bl->init_insn, REG_EQUAL, 0)) != NULL
3764 && CONSTANT_P (XEXP (note, 0)))
3765 || ((note = find_reg_note (bl->init_insn, REG_EQUIV, 0)) != NULL
3766 && CONSTANT_P (XEXP (note, 0))))
3767 src = XEXP (note, 0);
3769 src = SET_SRC (bl->init_set);
3771 if (loop_dump_stream)
3772 fprintf (loop_dump_stream,
3773 "Biv %d initialized at insn %d: initial value ",
3774 bl->regno, INSN_UID (bl->init_insn));
3776 if ((GET_MODE (src) == GET_MODE (regno_reg_rtx[bl->regno])
3777 || GET_MODE (src) == VOIDmode)
3778 && valid_initial_value_p (src, bl->init_insn,
3779 LOOP_INFO (loop)->pre_header_has_call,
3782 bl->initial_value = src;
3784 if (loop_dump_stream)
3786 if (GET_CODE (src) == CONST_INT)
3788 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC,
3790 fputc ('\n', loop_dump_stream);
3794 print_rtl (loop_dump_stream, src);
3795 fprintf (loop_dump_stream, "\n");
3799 /* If we can't make it a giv,
3800 let biv keep initial value of "itself". */
3801 else if (loop_dump_stream)
3802 fprintf (loop_dump_stream, "is complex\n");
3807 /* Search the loop for general induction variables. */
3810 loop_givs_find (loop)
3813 for_each_insn_in_loop (loop, check_insn_for_givs);
3817 /* For each giv for which we still don't know whether or not it is
3818 replaceable, check to see if it is replaceable because its final value
3819 can be calculated. */
3822 loop_givs_check (loop)
3825 struct loop_ivs *ivs = LOOP_IVS (loop);
3826 struct iv_class *bl;
3828 for (bl = ivs->list; bl; bl = bl->next)
3830 struct induction *v;
3832 for (v = bl->giv; v; v = v->next_iv)
3833 if (! v->replaceable && ! v->not_replaceable)
3834 check_final_value (loop, v);
3839 /* Return non-zero if it is possible to eliminate the biv BL provided
3840 all givs are reduced. This is possible if either the reg is not
3841 used outside the loop, or we can compute what its final value will
3845 loop_biv_eliminable_p (loop, bl, threshold, insn_count)
3847 struct iv_class *bl;
3851 /* For architectures with a decrement_and_branch_until_zero insn,
3852 don't do this if we put a REG_NONNEG note on the endtest for this
3855 #ifdef HAVE_decrement_and_branch_until_zero
3858 if (loop_dump_stream)
3859 fprintf (loop_dump_stream,
3860 "Cannot eliminate nonneg biv %d.\n", bl->regno);
3865 /* Check that biv is used outside loop or if it has a final value.
3866 Compare against bl->init_insn rather than loop->start. We aren't
3867 concerned with any uses of the biv between init_insn and
3868 loop->start since these won't be affected by the value of the biv
3869 elsewhere in the function, so long as init_insn doesn't use the
3872 if ((REGNO_LAST_LUID (bl->regno) < INSN_LUID (loop->end)
3874 && INSN_UID (bl->init_insn) < max_uid_for_loop
3875 && REGNO_FIRST_LUID (bl->regno) >= INSN_LUID (bl->init_insn)
3876 && ! reg_mentioned_p (bl->biv->dest_reg, SET_SRC (bl->init_set)))
3877 || (bl->final_value = final_biv_value (loop, bl)))
3878 return maybe_eliminate_biv (loop, bl, 0, threshold, insn_count);
3880 if (loop_dump_stream)
3882 fprintf (loop_dump_stream,
3883 "Cannot eliminate biv %d.\n",
3885 fprintf (loop_dump_stream,
3886 "First use: insn %d, last use: insn %d.\n",
3887 REGNO_FIRST_UID (bl->regno),
3888 REGNO_LAST_UID (bl->regno));
3894 /* Reduce each giv of BL that we have decided to reduce. */
3897 loop_givs_reduce (loop, bl)
3899 struct iv_class *bl;
3901 struct induction *v;
3903 for (v = bl->giv; v; v = v->next_iv)
3905 struct induction *tv;
3906 if (! v->ignore && v->same == 0)
3908 int auto_inc_opt = 0;
3910 /* If the code for derived givs immediately below has already
3911 allocated a new_reg, we must keep it. */
3913 v->new_reg = gen_reg_rtx (v->mode);
3916 /* If the target has auto-increment addressing modes, and
3917 this is an address giv, then try to put the increment
3918 immediately after its use, so that flow can create an
3919 auto-increment addressing mode. */
3920 if (v->giv_type == DEST_ADDR && bl->biv_count == 1
3921 && bl->biv->always_executed && ! bl->biv->maybe_multiple
3922 /* We don't handle reversed biv's because bl->biv->insn
3923 does not have a valid INSN_LUID. */
3925 && v->always_executed && ! v->maybe_multiple
3926 && INSN_UID (v->insn) < max_uid_for_loop)
3928 /* If other giv's have been combined with this one, then
3929 this will work only if all uses of the other giv's occur
3930 before this giv's insn. This is difficult to check.
3932 We simplify this by looking for the common case where
3933 there is one DEST_REG giv, and this giv's insn is the
3934 last use of the dest_reg of that DEST_REG giv. If the
3935 increment occurs after the address giv, then we can
3936 perform the optimization. (Otherwise, the increment
3937 would have to go before other_giv, and we would not be
3938 able to combine it with the address giv to get an
3939 auto-inc address.) */
3940 if (v->combined_with)
3942 struct induction *other_giv = 0;
3944 for (tv = bl->giv; tv; tv = tv->next_iv)
3952 if (! tv && other_giv
3953 && REGNO (other_giv->dest_reg) < max_reg_before_loop
3954 && (REGNO_LAST_UID (REGNO (other_giv->dest_reg))
3955 == INSN_UID (v->insn))
3956 && INSN_LUID (v->insn) < INSN_LUID (bl->biv->insn))
3959 /* Check for case where increment is before the address
3960 giv. Do this test in "loop order". */
3961 else if ((INSN_LUID (v->insn) > INSN_LUID (bl->biv->insn)
3962 && (INSN_LUID (v->insn) < INSN_LUID (loop->scan_start)
3963 || (INSN_LUID (bl->biv->insn)
3964 > INSN_LUID (loop->scan_start))))
3965 || (INSN_LUID (v->insn) < INSN_LUID (loop->scan_start)
3966 && (INSN_LUID (loop->scan_start)
3967 < INSN_LUID (bl->biv->insn))))
3976 /* We can't put an insn immediately after one setting
3977 cc0, or immediately before one using cc0. */
3978 if ((auto_inc_opt == 1 && sets_cc0_p (PATTERN (v->insn)))
3979 || (auto_inc_opt == -1
3980 && (prev = prev_nonnote_insn (v->insn)) != 0
3982 && sets_cc0_p (PATTERN (prev))))
3988 v->auto_inc_opt = 1;
3992 /* For each place where the biv is incremented, add an insn
3993 to increment the new, reduced reg for the giv. */
3994 for (tv = bl->biv; tv; tv = tv->next_iv)
3999 insert_before = tv->insn;
4000 else if (auto_inc_opt == 1)
4001 insert_before = NEXT_INSN (v->insn);
4003 insert_before = v->insn;
4005 if (tv->mult_val == const1_rtx)
4006 emit_iv_add_mult (tv->add_val, v->mult_val,
4007 v->new_reg, v->new_reg, insert_before);
4008 else /* tv->mult_val == const0_rtx */
4009 /* A multiply is acceptable here
4010 since this is presumed to be seldom executed. */
4011 emit_iv_add_mult (tv->add_val, v->mult_val,
4012 v->add_val, v->new_reg, insert_before);
4015 /* Add code at loop start to initialize giv's reduced reg. */
4017 emit_iv_add_mult (extend_value_for_giv (v, bl->initial_value),
4018 v->mult_val, v->add_val, v->new_reg,
4025 /* Check for givs whose first use is their definition and whose
4026 last use is the definition of another giv. If so, it is likely
4027 dead and should not be used to derive another giv nor to
4031 loop_givs_dead_check (loop, bl)
4032 struct loop *loop ATTRIBUTE_UNUSED;
4033 struct iv_class *bl;
4035 struct induction *v;
4037 for (v = bl->giv; v; v = v->next_iv)
4040 || (v->same && v->same->ignore))
4043 if (v->giv_type == DEST_REG
4044 && REGNO_FIRST_UID (REGNO (v->dest_reg)) == INSN_UID (v->insn))
4046 struct induction *v1;
4048 for (v1 = bl->giv; v1; v1 = v1->next_iv)
4049 if (REGNO_LAST_UID (REGNO (v->dest_reg)) == INSN_UID (v1->insn))
4057 loop_givs_rescan (loop, bl, reg_map, end_insert_before)
4059 struct iv_class *bl;
4061 rtx end_insert_before;
4063 struct induction *v;
4065 for (v = bl->giv; v; v = v->next_iv)
4067 if (v->same && v->same->ignore)
4073 /* Update expression if this was combined, in case other giv was
4076 v->new_reg = replace_rtx (v->new_reg,
4077 v->same->dest_reg, v->same->new_reg);
4079 /* See if this register is known to be a pointer to something. If
4080 so, see if we can find the alignment. First see if there is a
4081 destination register that is a pointer. If so, this shares the
4082 alignment too. Next see if we can deduce anything from the
4083 computational information. If not, and this is a DEST_ADDR
4084 giv, at least we know that it's a pointer, though we don't know
4086 if (GET_CODE (v->new_reg) == REG
4087 && v->giv_type == DEST_REG
4088 && REG_POINTER (v->dest_reg))
4089 mark_reg_pointer (v->new_reg,
4090 REGNO_POINTER_ALIGN (REGNO (v->dest_reg)));
4091 else if (GET_CODE (v->new_reg) == REG
4092 && REG_POINTER (v->src_reg))
4094 unsigned int align = REGNO_POINTER_ALIGN (REGNO (v->src_reg));
4097 || GET_CODE (v->add_val) != CONST_INT
4098 || INTVAL (v->add_val) % (align / BITS_PER_UNIT) != 0)
4101 mark_reg_pointer (v->new_reg, align);
4103 else if (GET_CODE (v->new_reg) == REG
4104 && GET_CODE (v->add_val) == REG
4105 && REG_POINTER (v->add_val))
4107 unsigned int align = REGNO_POINTER_ALIGN (REGNO (v->add_val));
4109 if (align == 0 || GET_CODE (v->mult_val) != CONST_INT
4110 || INTVAL (v->mult_val) % (align / BITS_PER_UNIT) != 0)
4113 mark_reg_pointer (v->new_reg, align);
4115 else if (GET_CODE (v->new_reg) == REG && v->giv_type == DEST_ADDR)
4116 mark_reg_pointer (v->new_reg, 0);
4118 if (v->giv_type == DEST_ADDR)
4119 /* Store reduced reg as the address in the memref where we found
4121 validate_change (v->insn, v->location, v->new_reg, 0);
4122 else if (v->replaceable)
4124 reg_map[REGNO (v->dest_reg)] = v->new_reg;
4128 /* Not replaceable; emit an insn to set the original giv reg from
4129 the reduced giv, same as above. */
4130 emit_insn_after (gen_move_insn (v->dest_reg, v->new_reg),
4134 /* When a loop is reversed, givs which depend on the reversed
4135 biv, and which are live outside the loop, must be set to their
4136 correct final value. This insn is only needed if the giv is
4137 not replaceable. The correct final value is the same as the
4138 value that the giv starts the reversed loop with. */
4139 if (bl->reversed && ! v->replaceable)
4140 emit_iv_add_mult (extend_value_for_giv (v, bl->initial_value),
4141 v->mult_val, v->add_val, v->dest_reg,
4143 else if (v->final_value)
4147 /* If the loop has multiple exits, emit the insn before the
4148 loop to ensure that it will always be executed no matter
4149 how the loop exits. Otherwise, emit the insn after the loop,
4150 since this is slightly more efficient. */
4151 if (loop->exit_count)
4152 insert_before = loop->start;
4154 insert_before = end_insert_before;
4155 emit_insn_before (gen_move_insn (v->dest_reg, v->final_value),
4159 if (loop_dump_stream)
4161 fprintf (loop_dump_stream, "giv at %d reduced to ",
4162 INSN_UID (v->insn));
4163 print_rtl (loop_dump_stream, v->new_reg);
4164 fprintf (loop_dump_stream, "\n");
4171 loop_giv_reduce_benefit (loop, bl, v, test_reg)
4172 struct loop *loop ATTRIBUTE_UNUSED;
4173 struct iv_class *bl;
4174 struct induction *v;
4180 benefit = v->benefit;
4181 PUT_MODE (test_reg, v->mode);
4182 add_cost = iv_add_mult_cost (bl->biv->add_val, v->mult_val,
4183 test_reg, test_reg);
4185 /* Reduce benefit if not replaceable, since we will insert a
4186 move-insn to replace the insn that calculates this giv. Don't do
4187 this unless the giv is a user variable, since it will often be
4188 marked non-replaceable because of the duplication of the exit
4189 code outside the loop. In such a case, the copies we insert are
4190 dead and will be deleted. So they don't have a cost. Similar
4191 situations exist. */
4192 /* ??? The new final_[bg]iv_value code does a much better job of
4193 finding replaceable giv's, and hence this code may no longer be
4195 if (! v->replaceable && ! bl->eliminable
4196 && REG_USERVAR_P (v->dest_reg))
4197 benefit -= copy_cost;
4199 /* Decrease the benefit to count the add-insns that we will insert
4200 to increment the reduced reg for the giv. ??? This can
4201 overestimate the run-time cost of the additional insns, e.g. if
4202 there are multiple basic blocks that increment the biv, but only
4203 one of these blocks is executed during each iteration. There is
4204 no good way to detect cases like this with the current structure
4205 of the loop optimizer. This code is more accurate for
4206 determining code size than run-time benefits. */
4207 benefit -= add_cost * bl->biv_count;
4209 /* Decide whether to strength-reduce this giv or to leave the code
4210 unchanged (recompute it from the biv each time it is used). This
4211 decision can be made independently for each giv. */
4214 /* Attempt to guess whether autoincrement will handle some of the
4215 new add insns; if so, increase BENEFIT (undo the subtraction of
4216 add_cost that was done above). */
4217 if (v->giv_type == DEST_ADDR
4218 /* Increasing the benefit is risky, since this is only a guess.
4219 Avoid increasing register pressure in cases where there would
4220 be no other benefit from reducing this giv. */
4222 && GET_CODE (v->mult_val) == CONST_INT)
4224 if (HAVE_POST_INCREMENT
4225 && INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
4226 benefit += add_cost * bl->biv_count;
4227 else if (HAVE_PRE_INCREMENT
4228 && INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
4229 benefit += add_cost * bl->biv_count;
4230 else if (HAVE_POST_DECREMENT
4231 && -INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
4232 benefit += add_cost * bl->biv_count;
4233 else if (HAVE_PRE_DECREMENT
4234 && -INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
4235 benefit += add_cost * bl->biv_count;
4243 /* Free IV structures for LOOP. */
4246 loop_ivs_free (loop)
4249 struct loop_ivs *ivs = LOOP_IVS (loop);
4250 struct iv_class *iv = ivs->list;
4256 struct iv_class *next = iv->next;
4257 struct induction *induction;
4258 struct induction *next_induction;
4260 for (induction = iv->biv; induction; induction = next_induction)
4262 next_induction = induction->next_iv;
4265 for (induction = iv->giv; induction; induction = next_induction)
4267 next_induction = induction->next_iv;
4277 /* Perform strength reduction and induction variable elimination.
4279 Pseudo registers created during this function will be beyond the
4280 last valid index in several tables including
4281 REGS->ARRAY[I].N_TIMES_SET and REGNO_LAST_UID. This does not cause a
4282 problem here, because the added registers cannot be givs outside of
4283 their loop, and hence will never be reconsidered. But scan_loop
4284 must check regnos to make sure they are in bounds. */
4287 strength_reduce (loop, insn_count, flags)
4292 struct loop_info *loop_info = LOOP_INFO (loop);
4293 struct loop_regs *regs = LOOP_REGS (loop);
4294 struct loop_ivs *ivs = LOOP_IVS (loop);
4296 /* Temporary list pointer for traversing ivs->list. */
4297 struct iv_class *bl;
4298 /* Ratio of extra register life span we can justify
4299 for saving an instruction. More if loop doesn't call subroutines
4300 since in that case saving an insn makes more difference
4301 and more registers are available. */
4302 /* ??? could set this to last value of threshold in move_movables */
4303 int threshold = (loop_info->has_call ? 1 : 2) * (3 + n_non_fixed_regs);
4304 /* Map of pseudo-register replacements. */
4305 rtx *reg_map = NULL;
4307 rtx end_insert_before;
4308 int unrolled_insn_copies = 0;
4309 rtx test_reg = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 1);
4311 addr_placeholder = gen_reg_rtx (Pmode);
4313 /* Save insn immediately after the loop_end. Insns inserted after loop_end
4314 must be put before this insn, so that they will appear in the right
4315 order (i.e. loop order).
4317 If loop_end is the end of the current function, then emit a
4318 NOTE_INSN_DELETED after loop_end and set end_insert_before to the
4320 if (NEXT_INSN (loop->end) != 0)
4321 end_insert_before = NEXT_INSN (loop->end);
4323 end_insert_before = emit_note_after (NOTE_INSN_DELETED, loop->end);
4325 ivs->n_regs = max_reg_before_loop;
4326 ivs->regs = (struct iv *) xcalloc (ivs->n_regs, sizeof (struct iv));
4328 /* Find all BIVs in loop. */
4329 loop_bivs_find (loop);
4331 /* Exit if there are no bivs. */
4334 /* Can still unroll the loop anyways, but indicate that there is no
4335 strength reduction info available. */
4336 if (flags & LOOP_UNROLL)
4337 unroll_loop (loop, insn_count, end_insert_before, 0);
4339 loop_ivs_free (loop);
4343 /* Determine how BIVS are initialised by looking through pre-header
4344 extended basic block. */
4345 loop_bivs_init_find (loop);
4347 /* Look at the each biv and see if we can say anything better about its
4348 initial value from any initializing insns set up above. */
4349 loop_bivs_check (loop);
4351 /* Search the loop for general induction variables. */
4352 loop_givs_find (loop);
4354 /* Try to calculate and save the number of loop iterations. This is
4355 set to zero if the actual number can not be calculated. This must
4356 be called after all giv's have been identified, since otherwise it may
4357 fail if the iteration variable is a giv. */
4358 loop_iterations (loop);
4360 /* Now for each giv for which we still don't know whether or not it is
4361 replaceable, check to see if it is replaceable because its final value
4362 can be calculated. This must be done after loop_iterations is called,
4363 so that final_giv_value will work correctly. */
4364 loop_givs_check (loop);
4366 /* Try to prove that the loop counter variable (if any) is always
4367 nonnegative; if so, record that fact with a REG_NONNEG note
4368 so that "decrement and branch until zero" insn can be used. */
4369 check_dbra_loop (loop, insn_count);
4371 /* Create reg_map to hold substitutions for replaceable giv regs.
4372 Some givs might have been made from biv increments, so look at
4373 ivs->reg_iv_type for a suitable size. */
4374 reg_map_size = ivs->n_regs;
4375 reg_map = (rtx *) xcalloc (reg_map_size, sizeof (rtx));
4377 /* Examine each iv class for feasibility of strength reduction/induction
4378 variable elimination. */
4380 for (bl = ivs->list; bl; bl = bl->next)
4382 struct induction *v;
4385 /* Test whether it will be possible to eliminate this biv
4386 provided all givs are reduced. */
4387 bl->eliminable = loop_biv_eliminable_p (loop, bl, threshold, insn_count);
4389 /* Check each extension dependent giv in this class to see if its
4390 root biv is safe from wrapping in the interior mode. */
4391 check_ext_dependant_givs (bl, loop_info);
4393 /* Combine all giv's for this iv_class. */
4394 combine_givs (regs, bl);
4396 /* This will be true at the end, if all givs which depend on this
4397 biv have been strength reduced.
4398 We can't (currently) eliminate the biv unless this is so. */
4399 bl->all_reduced = 1;
4401 for (v = bl->giv; v; v = v->next_iv)
4403 struct induction *tv;
4405 if (v->ignore || v->same)
4408 benefit = loop_giv_reduce_benefit (loop, bl, v, test_reg);
4410 /* If an insn is not to be strength reduced, then set its ignore
4411 flag, and clear bl->all_reduced. */
4413 /* A giv that depends on a reversed biv must be reduced if it is
4414 used after the loop exit, otherwise, it would have the wrong
4415 value after the loop exit. To make it simple, just reduce all
4416 of such giv's whether or not we know they are used after the loop
4419 if (! flag_reduce_all_givs
4420 && v->lifetime * threshold * benefit < insn_count
4423 if (loop_dump_stream)
4424 fprintf (loop_dump_stream,
4425 "giv of insn %d not worth while, %d vs %d.\n",
4427 v->lifetime * threshold * benefit, insn_count);
4429 bl->all_reduced = 0;
4433 /* Check that we can increment the reduced giv without a
4434 multiply insn. If not, reject it. */
4436 for (tv = bl->biv; tv; tv = tv->next_iv)
4437 if (tv->mult_val == const1_rtx
4438 && ! product_cheap_p (tv->add_val, v->mult_val))
4440 if (loop_dump_stream)
4441 fprintf (loop_dump_stream,
4442 "giv of insn %d: would need a multiply.\n",
4443 INSN_UID (v->insn));
4445 bl->all_reduced = 0;
4451 /* Check for givs whose first use is their definition and whose
4452 last use is the definition of another giv. If so, it is likely
4453 dead and should not be used to derive another giv nor to
4455 loop_givs_dead_check (loop, bl);
4457 /* Reduce each giv that we decided to reduce. */
4458 loop_givs_reduce (loop, bl);
4460 /* Rescan all givs. If a giv is the same as a giv not reduced, mark it
4463 For each giv register that can be reduced now: if replaceable,
4464 substitute reduced reg wherever the old giv occurs;
4465 else add new move insn "giv_reg = reduced_reg". */
4466 loop_givs_rescan (loop, bl, reg_map, end_insert_before);
4468 /* All the givs based on the biv bl have been reduced if they
4471 /* For each giv not marked as maybe dead that has been combined with a
4472 second giv, clear any "maybe dead" mark on that second giv.
4473 v->new_reg will either be or refer to the register of the giv it
4476 Doing this clearing avoids problems in biv elimination where
4477 a giv's new_reg is a complex value that can't be put in the
4478 insn but the giv combined with (with a reg as new_reg) is
4479 marked maybe_dead. Since the register will be used in either
4480 case, we'd prefer it be used from the simpler giv. */
4482 for (v = bl->giv; v; v = v->next_iv)
4483 if (! v->maybe_dead && v->same)
4484 v->same->maybe_dead = 0;
4486 /* Try to eliminate the biv, if it is a candidate.
4487 This won't work if ! bl->all_reduced,
4488 since the givs we planned to use might not have been reduced.
4490 We have to be careful that we didn't initially think we could
4491 eliminate this biv because of a giv that we now think may be
4492 dead and shouldn't be used as a biv replacement.
4494 Also, there is the possibility that we may have a giv that looks
4495 like it can be used to eliminate a biv, but the resulting insn
4496 isn't valid. This can happen, for example, on the 88k, where a
4497 JUMP_INSN can compare a register only with zero. Attempts to
4498 replace it with a compare with a constant will fail.
4500 Note that in cases where this call fails, we may have replaced some
4501 of the occurrences of the biv with a giv, but no harm was done in
4502 doing so in the rare cases where it can occur. */
4504 if (bl->all_reduced == 1 && bl->eliminable
4505 && maybe_eliminate_biv (loop, bl, 1, threshold, insn_count))
4507 /* ?? If we created a new test to bypass the loop entirely,
4508 or otherwise drop straight in, based on this test, then
4509 we might want to rewrite it also. This way some later
4510 pass has more hope of removing the initialization of this
4513 /* If final_value != 0, then the biv may be used after loop end
4514 and we must emit an insn to set it just in case.
4516 Reversed bivs already have an insn after the loop setting their
4517 value, so we don't need another one. We can't calculate the
4518 proper final value for such a biv here anyways. */
4519 if (bl->final_value && ! bl->reversed)
4523 /* If the loop has multiple exits, emit the insn before the
4524 loop to ensure that it will always be executed no matter
4525 how the loop exits. Otherwise, emit the insn after the
4526 loop, since this is slightly more efficient. */
4527 if (loop->exit_count)
4528 insert_before = loop->start;
4530 insert_before = end_insert_before;
4532 emit_insn_before (gen_move_insn (bl->biv->dest_reg,
4537 if (loop_dump_stream)
4538 fprintf (loop_dump_stream, "Reg %d: biv eliminated\n",
4543 /* Go through all the instructions in the loop, making all the
4544 register substitutions scheduled in REG_MAP. */
4546 for (p = loop->start; p != loop->end; p = NEXT_INSN (p))
4547 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
4548 || GET_CODE (p) == CALL_INSN)
4550 replace_regs (PATTERN (p), reg_map, reg_map_size, 0);
4551 replace_regs (REG_NOTES (p), reg_map, reg_map_size, 0);
4555 if (loop_info->n_iterations > 0)
4557 /* When we completely unroll a loop we will likely not need the increment
4558 of the loop BIV and we will not need the conditional branch at the
4560 unrolled_insn_copies = insn_count - 2;
4563 /* When we completely unroll a loop on a HAVE_cc0 machine we will not
4564 need the comparison before the conditional branch at the end of the
4566 unrolled_insn_copies -= 1;
4569 /* We'll need one copy for each loop iteration. */
4570 unrolled_insn_copies *= loop_info->n_iterations;
4572 /* A little slop to account for the ability to remove initialization
4573 code, better CSE, and other secondary benefits of completely
4574 unrolling some loops. */
4575 unrolled_insn_copies -= 1;
4577 /* Clamp the value. */
4578 if (unrolled_insn_copies < 0)
4579 unrolled_insn_copies = 0;
4582 /* Unroll loops from within strength reduction so that we can use the
4583 induction variable information that strength_reduce has already
4584 collected. Always unroll loops that would be as small or smaller
4585 unrolled than when rolled. */
4586 if ((flags & LOOP_UNROLL)
4587 || (loop_info->n_iterations > 0
4588 && unrolled_insn_copies <= insn_count))
4589 unroll_loop (loop, insn_count, end_insert_before, 1);
4591 #ifdef HAVE_doloop_end
4592 if (HAVE_doloop_end && (flags & LOOP_BCT) && flag_branch_on_count_reg)
4593 doloop_optimize (loop);
4594 #endif /* HAVE_doloop_end */
4596 if (loop_dump_stream)
4597 fprintf (loop_dump_stream, "\n");
4599 loop_ivs_free (loop);
4604 /*Record all basic induction variables calculated in the insn. */
4606 check_insn_for_bivs (loop, p, not_every_iteration, maybe_multiple)
4609 int not_every_iteration;
4612 struct loop_ivs *ivs = LOOP_IVS (loop);
4619 if (GET_CODE (p) == INSN
4620 && (set = single_set (p))
4621 && GET_CODE (SET_DEST (set)) == REG)
4623 dest_reg = SET_DEST (set);
4624 if (REGNO (dest_reg) < max_reg_before_loop
4625 && REGNO (dest_reg) >= FIRST_PSEUDO_REGISTER
4626 && REG_IV_TYPE (ivs, REGNO (dest_reg)) != NOT_BASIC_INDUCT)
4628 if (basic_induction_var (loop, SET_SRC (set),
4629 GET_MODE (SET_SRC (set)),
4630 dest_reg, p, &inc_val, &mult_val,
4633 /* It is a possible basic induction variable.
4634 Create and initialize an induction structure for it. */
4637 = (struct induction *) xmalloc (sizeof (struct induction));
4639 record_biv (loop, v, p, dest_reg, inc_val, mult_val, location,
4640 not_every_iteration, maybe_multiple);
4641 REG_IV_TYPE (ivs, REGNO (dest_reg)) = BASIC_INDUCT;
4643 else if (REGNO (dest_reg) < ivs->n_regs)
4644 REG_IV_TYPE (ivs, REGNO (dest_reg)) = NOT_BASIC_INDUCT;
4650 /* Record all givs calculated in the insn.
4651 A register is a giv if: it is only set once, it is a function of a
4652 biv and a constant (or invariant), and it is not a biv. */
4654 check_insn_for_givs (loop, p, not_every_iteration, maybe_multiple)
4657 int not_every_iteration;
4660 struct loop_regs *regs = LOOP_REGS (loop);
4663 /* Look for a general induction variable in a register. */
4664 if (GET_CODE (p) == INSN
4665 && (set = single_set (p))
4666 && GET_CODE (SET_DEST (set)) == REG
4667 && ! regs->array[REGNO (SET_DEST (set))].may_not_optimize)
4676 rtx last_consec_insn;
4678 dest_reg = SET_DEST (set);
4679 if (REGNO (dest_reg) < FIRST_PSEUDO_REGISTER)
4682 if (/* SET_SRC is a giv. */
4683 (general_induction_var (loop, SET_SRC (set), &src_reg, &add_val,
4684 &mult_val, &ext_val, 0, &benefit, VOIDmode)
4685 /* Equivalent expression is a giv. */
4686 || ((regnote = find_reg_note (p, REG_EQUAL, NULL_RTX))
4687 && general_induction_var (loop, XEXP (regnote, 0), &src_reg,
4688 &add_val, &mult_val, &ext_val, 0,
4689 &benefit, VOIDmode)))
4690 /* Don't try to handle any regs made by loop optimization.
4691 We have nothing on them in regno_first_uid, etc. */
4692 && REGNO (dest_reg) < max_reg_before_loop
4693 /* Don't recognize a BASIC_INDUCT_VAR here. */
4694 && dest_reg != src_reg
4695 /* This must be the only place where the register is set. */
4696 && (regs->array[REGNO (dest_reg)].n_times_set == 1
4697 /* or all sets must be consecutive and make a giv. */
4698 || (benefit = consec_sets_giv (loop, benefit, p,
4700 &add_val, &mult_val, &ext_val,
4701 &last_consec_insn))))
4704 = (struct induction *) xmalloc (sizeof (struct induction));
4706 /* If this is a library call, increase benefit. */
4707 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
4708 benefit += libcall_benefit (p);
4710 /* Skip the consecutive insns, if there are any. */
4711 if (regs->array[REGNO (dest_reg)].n_times_set != 1)
4712 p = last_consec_insn;
4714 record_giv (loop, v, p, src_reg, dest_reg, mult_val, add_val,
4715 ext_val, benefit, DEST_REG, not_every_iteration,
4716 maybe_multiple, NULL_PTR);
4721 #ifndef DONT_REDUCE_ADDR
4722 /* Look for givs which are memory addresses. */
4723 /* This resulted in worse code on a VAX 8600. I wonder if it
4725 if (GET_CODE (p) == INSN)
4726 find_mem_givs (loop, PATTERN (p), p, not_every_iteration,
4730 /* Update the status of whether giv can derive other givs. This can
4731 change when we pass a label or an insn that updates a biv. */
4732 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
4733 || GET_CODE (p) == CODE_LABEL)
4734 update_giv_derive (loop, p);
4738 /* Return 1 if X is a valid source for an initial value (or as value being
4739 compared against in an initial test).
4741 X must be either a register or constant and must not be clobbered between
4742 the current insn and the start of the loop.
4744 INSN is the insn containing X. */
4747 valid_initial_value_p (x, insn, call_seen, loop_start)
4756 /* Only consider pseudos we know about initialized in insns whose luids
4758 if (GET_CODE (x) != REG
4759 || REGNO (x) >= max_reg_before_loop)
4762 /* Don't use call-clobbered registers across a call which clobbers it. On
4763 some machines, don't use any hard registers at all. */
4764 if (REGNO (x) < FIRST_PSEUDO_REGISTER
4765 && (SMALL_REGISTER_CLASSES
4766 || (call_used_regs[REGNO (x)] && call_seen)))
4769 /* Don't use registers that have been clobbered before the start of the
4771 if (reg_set_between_p (x, insn, loop_start))
4777 /* Scan X for memory refs and check each memory address
4778 as a possible giv. INSN is the insn whose pattern X comes from.
4779 NOT_EVERY_ITERATION is 1 if the insn might not be executed during
4780 every loop iteration. MAYBE_MULTIPLE is 1 if the insn might be executed
4781 more thanonce in each loop iteration. */
4784 find_mem_givs (loop, x, insn, not_every_iteration, maybe_multiple)
4785 const struct loop *loop;
4788 int not_every_iteration, maybe_multiple;
4791 register enum rtx_code code;
4792 register const char *fmt;
4797 code = GET_CODE (x);
4822 /* This code used to disable creating GIVs with mult_val == 1 and
4823 add_val == 0. However, this leads to lost optimizations when
4824 it comes time to combine a set of related DEST_ADDR GIVs, since
4825 this one would not be seen. */
4827 if (general_induction_var (loop, XEXP (x, 0), &src_reg, &add_val,
4828 &mult_val, &ext_val, 1, &benefit,
4831 /* Found one; record it. */
4833 = (struct induction *) xmalloc (sizeof (struct induction));
4835 record_giv (loop, v, insn, src_reg, addr_placeholder, mult_val,
4836 add_val, ext_val, benefit, DEST_ADDR,
4837 not_every_iteration, maybe_multiple, &XEXP (x, 0));
4839 v->mem_mode = GET_MODE (x);
4848 /* Recursively scan the subexpressions for other mem refs. */
4850 fmt = GET_RTX_FORMAT (code);
4851 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4853 find_mem_givs (loop, XEXP (x, i), insn, not_every_iteration,
4855 else if (fmt[i] == 'E')
4856 for (j = 0; j < XVECLEN (x, i); j++)
4857 find_mem_givs (loop, XVECEXP (x, i, j), insn, not_every_iteration,
4861 /* Fill in the data about one biv update.
4862 V is the `struct induction' in which we record the biv. (It is
4863 allocated by the caller, with alloca.)
4864 INSN is the insn that sets it.
4865 DEST_REG is the biv's reg.
4867 MULT_VAL is const1_rtx if the biv is being incremented here, in which case
4868 INC_VAL is the increment. Otherwise, MULT_VAL is const0_rtx and the biv is
4869 being set to INC_VAL.
4871 NOT_EVERY_ITERATION is nonzero if this biv update is not know to be
4872 executed every iteration; MAYBE_MULTIPLE is nonzero if this biv update
4873 can be executed more than once per iteration. If MAYBE_MULTIPLE
4874 and NOT_EVERY_ITERATION are both zero, we know that the biv update is
4875 executed exactly once per iteration. */
4878 record_biv (loop, v, insn, dest_reg, inc_val, mult_val, location,
4879 not_every_iteration, maybe_multiple)
4881 struct induction *v;
4887 int not_every_iteration;
4890 struct loop_ivs *ivs = LOOP_IVS (loop);
4891 struct iv_class *bl;
4894 v->src_reg = dest_reg;
4895 v->dest_reg = dest_reg;
4896 v->mult_val = mult_val;
4897 v->add_val = inc_val;
4898 v->ext_dependant = NULL_RTX;
4899 v->location = location;
4900 v->mode = GET_MODE (dest_reg);
4901 v->always_computable = ! not_every_iteration;
4902 v->always_executed = ! not_every_iteration;
4903 v->maybe_multiple = maybe_multiple;
4905 /* Add this to the reg's iv_class, creating a class
4906 if this is the first incrementation of the reg. */
4908 bl = REG_IV_CLASS (ivs, REGNO (dest_reg));
4911 /* Create and initialize new iv_class. */
4913 bl = (struct iv_class *) xmalloc (sizeof (struct iv_class));
4915 bl->regno = REGNO (dest_reg);
4921 /* Set initial value to the reg itself. */
4922 bl->initial_value = dest_reg;
4923 bl->final_value = 0;
4924 /* We haven't seen the initializing insn yet */
4927 bl->initial_test = 0;
4928 bl->incremented = 0;
4932 bl->total_benefit = 0;
4934 /* Add this class to ivs->list. */
4935 bl->next = ivs->list;
4938 /* Put it in the array of biv register classes. */
4939 REG_IV_CLASS (ivs, REGNO (dest_reg)) = bl;
4942 /* Update IV_CLASS entry for this biv. */
4943 v->next_iv = bl->biv;
4946 if (mult_val == const1_rtx)
4947 bl->incremented = 1;
4949 if (loop_dump_stream)
4951 fprintf (loop_dump_stream,
4952 "Insn %d: possible biv, reg %d,",
4953 INSN_UID (insn), REGNO (dest_reg));
4954 if (GET_CODE (inc_val) == CONST_INT)
4956 fprintf (loop_dump_stream, " const =");
4957 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, INTVAL (inc_val));
4958 fputc ('\n', loop_dump_stream);
4962 fprintf (loop_dump_stream, " const = ");
4963 print_rtl (loop_dump_stream, inc_val);
4964 fprintf (loop_dump_stream, "\n");
4969 /* Fill in the data about one giv.
4970 V is the `struct induction' in which we record the giv. (It is
4971 allocated by the caller, with alloca.)
4972 INSN is the insn that sets it.
4973 BENEFIT estimates the savings from deleting this insn.
4974 TYPE is DEST_REG or DEST_ADDR; it says whether the giv is computed
4975 into a register or is used as a memory address.
4977 SRC_REG is the biv reg which the giv is computed from.
4978 DEST_REG is the giv's reg (if the giv is stored in a reg).
4979 MULT_VAL and ADD_VAL are the coefficients used to compute the giv.
4980 LOCATION points to the place where this giv's value appears in INSN. */
4983 record_giv (loop, v, insn, src_reg, dest_reg, mult_val, add_val, ext_val,
4984 benefit, type, not_every_iteration, maybe_multiple, location)
4985 const struct loop *loop;
4986 struct induction *v;
4990 rtx mult_val, add_val, ext_val;
4993 int not_every_iteration, maybe_multiple;
4996 struct loop_ivs *ivs = LOOP_IVS (loop);
4997 struct induction *b;
4998 struct iv_class *bl;
4999 rtx set = single_set (insn);
5002 /* Attempt to prove constantness of the values. */
5003 temp = simplify_rtx (add_val);
5008 v->src_reg = src_reg;
5010 v->dest_reg = dest_reg;
5011 v->mult_val = mult_val;
5012 v->add_val = add_val;
5013 v->ext_dependant = ext_val;
5014 v->benefit = benefit;
5015 v->location = location;
5017 v->combined_with = 0;
5018 v->maybe_multiple = maybe_multiple;
5020 v->derive_adjustment = 0;
5026 v->auto_inc_opt = 0;
5030 /* The v->always_computable field is used in update_giv_derive, to
5031 determine whether a giv can be used to derive another giv. For a
5032 DEST_REG giv, INSN computes a new value for the giv, so its value
5033 isn't computable if INSN insn't executed every iteration.
5034 However, for a DEST_ADDR giv, INSN merely uses the value of the giv;
5035 it does not compute a new value. Hence the value is always computable
5036 regardless of whether INSN is executed each iteration. */
5038 if (type == DEST_ADDR)
5039 v->always_computable = 1;
5041 v->always_computable = ! not_every_iteration;
5043 v->always_executed = ! not_every_iteration;
5045 if (type == DEST_ADDR)
5047 v->mode = GET_MODE (*location);
5050 else /* type == DEST_REG */
5052 v->mode = GET_MODE (SET_DEST (set));
5054 v->lifetime = LOOP_REG_LIFETIME (loop, REGNO (dest_reg));
5056 /* If the lifetime is zero, it means that this register is
5057 really a dead store. So mark this as a giv that can be
5058 ignored. This will not prevent the biv from being eliminated. */
5059 if (v->lifetime == 0)
5062 REG_IV_TYPE (ivs, REGNO (dest_reg)) = GENERAL_INDUCT;
5063 REG_IV_INFO (ivs, REGNO (dest_reg)) = v;
5066 /* Add the giv to the class of givs computed from one biv. */
5068 bl = REG_IV_CLASS (ivs, REGNO (src_reg));
5071 v->next_iv = bl->giv;
5073 /* Don't count DEST_ADDR. This is supposed to count the number of
5074 insns that calculate givs. */
5075 if (type == DEST_REG)
5077 bl->total_benefit += benefit;
5080 /* Fatal error, biv missing for this giv? */
5083 if (type == DEST_ADDR)
5087 /* The giv can be replaced outright by the reduced register only if all
5088 of the following conditions are true:
5089 - the insn that sets the giv is always executed on any iteration
5090 on which the giv is used at all
5091 (there are two ways to deduce this:
5092 either the insn is executed on every iteration,
5093 or all uses follow that insn in the same basic block),
5094 - the giv is not used outside the loop
5095 - no assignments to the biv occur during the giv's lifetime. */
5097 if (REGNO_FIRST_UID (REGNO (dest_reg)) == INSN_UID (insn)
5098 /* Previous line always fails if INSN was moved by loop opt. */
5099 && REGNO_LAST_LUID (REGNO (dest_reg))
5100 < INSN_LUID (loop->end)
5101 && (! not_every_iteration
5102 || last_use_this_basic_block (dest_reg, insn)))
5104 /* Now check that there are no assignments to the biv within the
5105 giv's lifetime. This requires two separate checks. */
5107 /* Check each biv update, and fail if any are between the first
5108 and last use of the giv.
5110 If this loop contains an inner loop that was unrolled, then
5111 the insn modifying the biv may have been emitted by the loop
5112 unrolling code, and hence does not have a valid luid. Just
5113 mark the biv as not replaceable in this case. It is not very
5114 useful as a biv, because it is used in two different loops.
5115 It is very unlikely that we would be able to optimize the giv
5116 using this biv anyways. */
5119 for (b = bl->biv; b; b = b->next_iv)
5121 if (INSN_UID (b->insn) >= max_uid_for_loop
5122 || ((INSN_LUID (b->insn)
5123 >= REGNO_FIRST_LUID (REGNO (dest_reg)))
5124 && (INSN_LUID (b->insn)
5125 <= REGNO_LAST_LUID (REGNO (dest_reg)))))
5128 v->not_replaceable = 1;
5133 /* If there are any backwards branches that go from after the
5134 biv update to before it, then this giv is not replaceable. */
5136 for (b = bl->biv; b; b = b->next_iv)
5137 if (back_branch_in_range_p (loop, b->insn))
5140 v->not_replaceable = 1;
5146 /* May still be replaceable, we don't have enough info here to
5149 v->not_replaceable = 0;
5153 /* Record whether the add_val contains a const_int, for later use by
5158 v->no_const_addval = 1;
5159 if (tem == const0_rtx)
5161 else if (CONSTANT_P (add_val))
5162 v->no_const_addval = 0;
5163 if (GET_CODE (tem) == PLUS)
5167 if (GET_CODE (XEXP (tem, 0)) == PLUS)
5168 tem = XEXP (tem, 0);
5169 else if (GET_CODE (XEXP (tem, 1)) == PLUS)
5170 tem = XEXP (tem, 1);
5174 if (CONSTANT_P (XEXP (tem, 1)))
5175 v->no_const_addval = 0;
5179 if (loop_dump_stream)
5181 if (type == DEST_REG)
5182 fprintf (loop_dump_stream, "Insn %d: giv reg %d",
5183 INSN_UID (insn), REGNO (dest_reg));
5185 fprintf (loop_dump_stream, "Insn %d: dest address",
5188 fprintf (loop_dump_stream, " src reg %d benefit %d",
5189 REGNO (src_reg), v->benefit);
5190 fprintf (loop_dump_stream, " lifetime %d",
5194 fprintf (loop_dump_stream, " replaceable");
5196 if (v->no_const_addval)
5197 fprintf (loop_dump_stream, " ncav");
5199 if (v->ext_dependant)
5201 switch (GET_CODE (v->ext_dependant))
5204 fprintf (loop_dump_stream, " ext se");
5207 fprintf (loop_dump_stream, " ext ze");
5210 fprintf (loop_dump_stream, " ext tr");
5217 if (GET_CODE (mult_val) == CONST_INT)
5219 fprintf (loop_dump_stream, " mult ");
5220 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, INTVAL (mult_val));
5224 fprintf (loop_dump_stream, " mult ");
5225 print_rtl (loop_dump_stream, mult_val);
5228 if (GET_CODE (add_val) == CONST_INT)
5230 fprintf (loop_dump_stream, " add ");
5231 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, INTVAL (add_val));
5235 fprintf (loop_dump_stream, " add ");
5236 print_rtl (loop_dump_stream, add_val);
5240 if (loop_dump_stream)
5241 fprintf (loop_dump_stream, "\n");
5245 /* All this does is determine whether a giv can be made replaceable because
5246 its final value can be calculated. This code can not be part of record_giv
5247 above, because final_giv_value requires that the number of loop iterations
5248 be known, and that can not be accurately calculated until after all givs
5249 have been identified. */
5252 check_final_value (loop, v)
5253 const struct loop *loop;
5254 struct induction *v;
5256 struct loop_ivs *ivs = LOOP_IVS (loop);
5257 struct iv_class *bl;
5258 rtx final_value = 0;
5260 bl = REG_IV_CLASS (ivs, REGNO (v->src_reg));
5262 /* DEST_ADDR givs will never reach here, because they are always marked
5263 replaceable above in record_giv. */
5265 /* The giv can be replaced outright by the reduced register only if all
5266 of the following conditions are true:
5267 - the insn that sets the giv is always executed on any iteration
5268 on which the giv is used at all
5269 (there are two ways to deduce this:
5270 either the insn is executed on every iteration,
5271 or all uses follow that insn in the same basic block),
5272 - its final value can be calculated (this condition is different
5273 than the one above in record_giv)
5274 - it's not used before the it's set
5275 - no assignments to the biv occur during the giv's lifetime. */
5278 /* This is only called now when replaceable is known to be false. */
5279 /* Clear replaceable, so that it won't confuse final_giv_value. */
5283 if ((final_value = final_giv_value (loop, v))
5284 && (v->always_computable || last_use_this_basic_block (v->dest_reg, v->insn)))
5286 int biv_increment_seen = 0, before_giv_insn = 0;
5292 /* When trying to determine whether or not a biv increment occurs
5293 during the lifetime of the giv, we can ignore uses of the variable
5294 outside the loop because final_value is true. Hence we can not
5295 use regno_last_uid and regno_first_uid as above in record_giv. */
5297 /* Search the loop to determine whether any assignments to the
5298 biv occur during the giv's lifetime. Start with the insn
5299 that sets the giv, and search around the loop until we come
5300 back to that insn again.
5302 Also fail if there is a jump within the giv's lifetime that jumps
5303 to somewhere outside the lifetime but still within the loop. This
5304 catches spaghetti code where the execution order is not linear, and
5305 hence the above test fails. Here we assume that the giv lifetime
5306 does not extend from one iteration of the loop to the next, so as
5307 to make the test easier. Since the lifetime isn't known yet,
5308 this requires two loops. See also record_giv above. */
5310 last_giv_use = v->insn;
5317 before_giv_insn = 1;
5318 p = NEXT_INSN (loop->start);
5323 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
5324 || GET_CODE (p) == CALL_INSN)
5326 /* It is possible for the BIV increment to use the GIV if we
5327 have a cycle. Thus we must be sure to check each insn for
5328 both BIV and GIV uses, and we must check for BIV uses
5331 if (! biv_increment_seen
5332 && reg_set_p (v->src_reg, PATTERN (p)))
5333 biv_increment_seen = 1;
5335 if (reg_mentioned_p (v->dest_reg, PATTERN (p)))
5337 if (biv_increment_seen || before_giv_insn)
5340 v->not_replaceable = 1;
5348 /* Now that the lifetime of the giv is known, check for branches
5349 from within the lifetime to outside the lifetime if it is still
5359 p = NEXT_INSN (loop->start);
5360 if (p == last_giv_use)
5363 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p)
5364 && LABEL_NAME (JUMP_LABEL (p))
5365 && ((loop_insn_first_p (JUMP_LABEL (p), v->insn)
5366 && loop_insn_first_p (loop->start, JUMP_LABEL (p)))
5367 || (loop_insn_first_p (last_giv_use, JUMP_LABEL (p))
5368 && loop_insn_first_p (JUMP_LABEL (p), loop->end))))
5371 v->not_replaceable = 1;
5373 if (loop_dump_stream)
5374 fprintf (loop_dump_stream,
5375 "Found branch outside giv lifetime.\n");
5382 /* If it is replaceable, then save the final value. */
5384 v->final_value = final_value;
5387 if (loop_dump_stream && v->replaceable)
5388 fprintf (loop_dump_stream, "Insn %d: giv reg %d final_value replaceable\n",
5389 INSN_UID (v->insn), REGNO (v->dest_reg));
5392 /* Update the status of whether a giv can derive other givs.
5394 We need to do something special if there is or may be an update to the biv
5395 between the time the giv is defined and the time it is used to derive
5398 In addition, a giv that is only conditionally set is not allowed to
5399 derive another giv once a label has been passed.
5401 The cases we look at are when a label or an update to a biv is passed. */
5404 update_giv_derive (loop, p)
5405 const struct loop *loop;
5408 struct loop_ivs *ivs = LOOP_IVS (loop);
5409 struct iv_class *bl;
5410 struct induction *biv, *giv;
5414 /* Search all IV classes, then all bivs, and finally all givs.
5416 There are three cases we are concerned with. First we have the situation
5417 of a giv that is only updated conditionally. In that case, it may not
5418 derive any givs after a label is passed.
5420 The second case is when a biv update occurs, or may occur, after the
5421 definition of a giv. For certain biv updates (see below) that are
5422 known to occur between the giv definition and use, we can adjust the
5423 giv definition. For others, or when the biv update is conditional,
5424 we must prevent the giv from deriving any other givs. There are two
5425 sub-cases within this case.
5427 If this is a label, we are concerned with any biv update that is done
5428 conditionally, since it may be done after the giv is defined followed by
5429 a branch here (actually, we need to pass both a jump and a label, but
5430 this extra tracking doesn't seem worth it).
5432 If this is a jump, we are concerned about any biv update that may be
5433 executed multiple times. We are actually only concerned about
5434 backward jumps, but it is probably not worth performing the test
5435 on the jump again here.
5437 If this is a biv update, we must adjust the giv status to show that a
5438 subsequent biv update was performed. If this adjustment cannot be done,
5439 the giv cannot derive further givs. */
5441 for (bl = ivs->list; bl; bl = bl->next)
5442 for (biv = bl->biv; biv; biv = biv->next_iv)
5443 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN
5446 for (giv = bl->giv; giv; giv = giv->next_iv)
5448 /* If cant_derive is already true, there is no point in
5449 checking all of these conditions again. */
5450 if (giv->cant_derive)
5453 /* If this giv is conditionally set and we have passed a label,
5454 it cannot derive anything. */
5455 if (GET_CODE (p) == CODE_LABEL && ! giv->always_computable)
5456 giv->cant_derive = 1;
5458 /* Skip givs that have mult_val == 0, since
5459 they are really invariants. Also skip those that are
5460 replaceable, since we know their lifetime doesn't contain
5462 else if (giv->mult_val == const0_rtx || giv->replaceable)
5465 /* The only way we can allow this giv to derive another
5466 is if this is a biv increment and we can form the product
5467 of biv->add_val and giv->mult_val. In this case, we will
5468 be able to compute a compensation. */
5469 else if (biv->insn == p)
5474 if (biv->mult_val == const1_rtx)
5475 tem = simplify_giv_expr (loop,
5476 gen_rtx_MULT (giv->mode,
5479 &ext_val_dummy, &dummy);
5481 if (tem && giv->derive_adjustment)
5482 tem = simplify_giv_expr
5484 gen_rtx_PLUS (giv->mode, tem, giv->derive_adjustment),
5485 &ext_val_dummy, &dummy);
5488 giv->derive_adjustment = tem;
5490 giv->cant_derive = 1;
5492 else if ((GET_CODE (p) == CODE_LABEL && ! biv->always_computable)
5493 || (GET_CODE (p) == JUMP_INSN && biv->maybe_multiple))
5494 giv->cant_derive = 1;
5499 /* Check whether an insn is an increment legitimate for a basic induction var.
5500 X is the source of insn P, or a part of it.
5501 MODE is the mode in which X should be interpreted.
5503 DEST_REG is the putative biv, also the destination of the insn.
5504 We accept patterns of these forms:
5505 REG = REG + INVARIANT (includes REG = REG - CONSTANT)
5506 REG = INVARIANT + REG
5508 If X is suitable, we return 1, set *MULT_VAL to CONST1_RTX,
5509 store the additive term into *INC_VAL, and store the place where
5510 we found the additive term into *LOCATION.
5512 If X is an assignment of an invariant into DEST_REG, we set
5513 *MULT_VAL to CONST0_RTX, and store the invariant into *INC_VAL.
5515 We also want to detect a BIV when it corresponds to a variable
5516 whose mode was promoted via PROMOTED_MODE. In that case, an increment
5517 of the variable may be a PLUS that adds a SUBREG of that variable to
5518 an invariant and then sign- or zero-extends the result of the PLUS
5521 Most GIVs in such cases will be in the promoted mode, since that is the
5522 probably the natural computation mode (and almost certainly the mode
5523 used for addresses) on the machine. So we view the pseudo-reg containing
5524 the variable as the BIV, as if it were simply incremented.
5526 Note that treating the entire pseudo as a BIV will result in making
5527 simple increments to any GIVs based on it. However, if the variable
5528 overflows in its declared mode but not its promoted mode, the result will
5529 be incorrect. This is acceptable if the variable is signed, since
5530 overflows in such cases are undefined, but not if it is unsigned, since
5531 those overflows are defined. So we only check for SIGN_EXTEND and
5534 If we cannot find a biv, we return 0. */
5537 basic_induction_var (loop, x, mode, dest_reg, p, inc_val, mult_val, location)
5538 const struct loop *loop;
5540 enum machine_mode mode;
5547 register enum rtx_code code;
5551 code = GET_CODE (x);
5556 if (rtx_equal_p (XEXP (x, 0), dest_reg)
5557 || (GET_CODE (XEXP (x, 0)) == SUBREG
5558 && SUBREG_PROMOTED_VAR_P (XEXP (x, 0))
5559 && SUBREG_REG (XEXP (x, 0)) == dest_reg))
5561 argp = &XEXP (x, 1);
5563 else if (rtx_equal_p (XEXP (x, 1), dest_reg)
5564 || (GET_CODE (XEXP (x, 1)) == SUBREG
5565 && SUBREG_PROMOTED_VAR_P (XEXP (x, 1))
5566 && SUBREG_REG (XEXP (x, 1)) == dest_reg))
5568 argp = &XEXP (x, 0);
5574 if (loop_invariant_p (loop, arg) != 1)
5577 *inc_val = convert_modes (GET_MODE (dest_reg), GET_MODE (x), arg, 0);
5578 *mult_val = const1_rtx;
5583 /* If this is a SUBREG for a promoted variable, check the inner
5585 if (SUBREG_PROMOTED_VAR_P (x))
5586 return basic_induction_var (loop, SUBREG_REG (x),
5587 GET_MODE (SUBREG_REG (x)),
5588 dest_reg, p, inc_val, mult_val, location);
5592 /* If this register is assigned in a previous insn, look at its
5593 source, but don't go outside the loop or past a label. */
5595 /* If this sets a register to itself, we would repeat any previous
5596 biv increment if we applied this strategy blindly. */
5597 if (rtx_equal_p (dest_reg, x))
5606 insn = PREV_INSN (insn);
5608 while (insn && GET_CODE (insn) == NOTE
5609 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG);
5613 set = single_set (insn);
5616 dest = SET_DEST (set);
5618 || (GET_CODE (dest) == SUBREG
5619 && (GET_MODE_SIZE (GET_MODE (dest)) <= UNITS_PER_WORD)
5620 && (GET_MODE_CLASS (GET_MODE (dest)) == MODE_INT)
5621 && SUBREG_REG (dest) == x))
5622 return basic_induction_var (loop, SET_SRC (set),
5623 (GET_MODE (SET_SRC (set)) == VOIDmode
5625 : GET_MODE (SET_SRC (set))),
5627 inc_val, mult_val, location);
5629 while (GET_CODE (dest) == SIGN_EXTRACT
5630 || GET_CODE (dest) == ZERO_EXTRACT
5631 || GET_CODE (dest) == SUBREG
5632 || GET_CODE (dest) == STRICT_LOW_PART)
5633 dest = XEXP (dest, 0);
5639 /* Can accept constant setting of biv only when inside inner most loop.
5640 Otherwise, a biv of an inner loop may be incorrectly recognized
5641 as a biv of the outer loop,
5642 causing code to be moved INTO the inner loop. */
5644 if (loop_invariant_p (loop, x) != 1)
5649 /* convert_modes aborts if we try to convert to or from CCmode, so just
5650 exclude that case. It is very unlikely that a condition code value
5651 would be a useful iterator anyways. */
5652 if (loop->level == 1
5653 && GET_MODE_CLASS (mode) != MODE_CC
5654 && GET_MODE_CLASS (GET_MODE (dest_reg)) != MODE_CC)
5656 /* Possible bug here? Perhaps we don't know the mode of X. */
5657 *inc_val = convert_modes (GET_MODE (dest_reg), mode, x, 0);
5658 *mult_val = const0_rtx;
5665 return basic_induction_var (loop, XEXP (x, 0), GET_MODE (XEXP (x, 0)),
5666 dest_reg, p, inc_val, mult_val, location);
5669 /* Similar, since this can be a sign extension. */
5670 for (insn = PREV_INSN (p);
5671 (insn && GET_CODE (insn) == NOTE
5672 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG);
5673 insn = PREV_INSN (insn))
5677 set = single_set (insn);
5679 if (! rtx_equal_p (dest_reg, XEXP (x, 0))
5680 && set && SET_DEST (set) == XEXP (x, 0)
5681 && GET_CODE (XEXP (x, 1)) == CONST_INT
5682 && INTVAL (XEXP (x, 1)) >= 0
5683 && GET_CODE (SET_SRC (set)) == ASHIFT
5684 && XEXP (x, 1) == XEXP (SET_SRC (set), 1))
5685 return basic_induction_var (loop, XEXP (SET_SRC (set), 0),
5686 GET_MODE (XEXP (x, 0)),
5687 dest_reg, insn, inc_val, mult_val,
5696 /* A general induction variable (giv) is any quantity that is a linear
5697 function of a basic induction variable,
5698 i.e. giv = biv * mult_val + add_val.
5699 The coefficients can be any loop invariant quantity.
5700 A giv need not be computed directly from the biv;
5701 it can be computed by way of other givs. */
5703 /* Determine whether X computes a giv.
5704 If it does, return a nonzero value
5705 which is the benefit from eliminating the computation of X;
5706 set *SRC_REG to the register of the biv that it is computed from;
5707 set *ADD_VAL and *MULT_VAL to the coefficients,
5708 such that the value of X is biv * mult + add; */
5711 general_induction_var (loop, x, src_reg, add_val, mult_val, ext_val,
5712 is_addr, pbenefit, addr_mode)
5713 const struct loop *loop;
5721 enum machine_mode addr_mode;
5723 struct loop_ivs *ivs = LOOP_IVS (loop);
5726 /* If this is an invariant, forget it, it isn't a giv. */
5727 if (loop_invariant_p (loop, x) == 1)
5731 *ext_val = NULL_RTX;
5732 x = simplify_giv_expr (loop, x, ext_val, pbenefit);
5736 switch (GET_CODE (x))
5740 /* Since this is now an invariant and wasn't before, it must be a giv
5741 with MULT_VAL == 0. It doesn't matter which BIV we associate this
5743 *src_reg = ivs->list->biv->dest_reg;
5744 *mult_val = const0_rtx;
5749 /* This is equivalent to a BIV. */
5751 *mult_val = const1_rtx;
5752 *add_val = const0_rtx;
5756 /* Either (plus (biv) (invar)) or
5757 (plus (mult (biv) (invar_1)) (invar_2)). */
5758 if (GET_CODE (XEXP (x, 0)) == MULT)
5760 *src_reg = XEXP (XEXP (x, 0), 0);
5761 *mult_val = XEXP (XEXP (x, 0), 1);
5765 *src_reg = XEXP (x, 0);
5766 *mult_val = const1_rtx;
5768 *add_val = XEXP (x, 1);
5772 /* ADD_VAL is zero. */
5773 *src_reg = XEXP (x, 0);
5774 *mult_val = XEXP (x, 1);
5775 *add_val = const0_rtx;
5782 /* Remove any enclosing USE from ADD_VAL and MULT_VAL (there will be
5783 unless they are CONST_INT). */
5784 if (GET_CODE (*add_val) == USE)
5785 *add_val = XEXP (*add_val, 0);
5786 if (GET_CODE (*mult_val) == USE)
5787 *mult_val = XEXP (*mult_val, 0);
5790 *pbenefit += address_cost (orig_x, addr_mode) - reg_address_cost;
5792 *pbenefit += rtx_cost (orig_x, SET);
5794 /* Always return true if this is a giv so it will be detected as such,
5795 even if the benefit is zero or negative. This allows elimination
5796 of bivs that might otherwise not be eliminated. */
5800 /* Given an expression, X, try to form it as a linear function of a biv.
5801 We will canonicalize it to be of the form
5802 (plus (mult (BIV) (invar_1))
5804 with possible degeneracies.
5806 The invariant expressions must each be of a form that can be used as a
5807 machine operand. We surround then with a USE rtx (a hack, but localized
5808 and certainly unambiguous!) if not a CONST_INT for simplicity in this
5809 routine; it is the caller's responsibility to strip them.
5811 If no such canonicalization is possible (i.e., two biv's are used or an
5812 expression that is neither invariant nor a biv or giv), this routine
5815 For a non-zero return, the result will have a code of CONST_INT, USE,
5816 REG (for a BIV), PLUS, or MULT. No other codes will occur.
5818 *BENEFIT will be incremented by the benefit of any sub-giv encountered. */
5820 static rtx sge_plus PARAMS ((enum machine_mode, rtx, rtx));
5821 static rtx sge_plus_constant PARAMS ((rtx, rtx));
5824 simplify_giv_expr (loop, x, ext_val, benefit)
5825 const struct loop *loop;
5830 struct loop_ivs *ivs = LOOP_IVS (loop);
5831 struct loop_regs *regs = LOOP_REGS (loop);
5832 enum machine_mode mode = GET_MODE (x);
5836 /* If this is not an integer mode, or if we cannot do arithmetic in this
5837 mode, this can't be a giv. */
5838 if (mode != VOIDmode
5839 && (GET_MODE_CLASS (mode) != MODE_INT
5840 || GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT))
5843 switch (GET_CODE (x))
5846 arg0 = simplify_giv_expr (loop, XEXP (x, 0), ext_val, benefit);
5847 arg1 = simplify_giv_expr (loop, XEXP (x, 1), ext_val, benefit);
5848 if (arg0 == 0 || arg1 == 0)
5851 /* Put constant last, CONST_INT last if both constant. */
5852 if ((GET_CODE (arg0) == USE
5853 || GET_CODE (arg0) == CONST_INT)
5854 && ! ((GET_CODE (arg0) == USE
5855 && GET_CODE (arg1) == USE)
5856 || GET_CODE (arg1) == CONST_INT))
5857 tem = arg0, arg0 = arg1, arg1 = tem;
5859 /* Handle addition of zero, then addition of an invariant. */
5860 if (arg1 == const0_rtx)
5862 else if (GET_CODE (arg1) == CONST_INT || GET_CODE (arg1) == USE)
5863 switch (GET_CODE (arg0))
5867 /* Adding two invariants must result in an invariant, so enclose
5868 addition operation inside a USE and return it. */
5869 if (GET_CODE (arg0) == USE)
5870 arg0 = XEXP (arg0, 0);
5871 if (GET_CODE (arg1) == USE)
5872 arg1 = XEXP (arg1, 0);
5874 if (GET_CODE (arg0) == CONST_INT)
5875 tem = arg0, arg0 = arg1, arg1 = tem;
5876 if (GET_CODE (arg1) == CONST_INT)
5877 tem = sge_plus_constant (arg0, arg1);
5879 tem = sge_plus (mode, arg0, arg1);
5881 if (GET_CODE (tem) != CONST_INT)
5882 tem = gen_rtx_USE (mode, tem);
5887 /* biv + invar or mult + invar. Return sum. */
5888 return gen_rtx_PLUS (mode, arg0, arg1);
5891 /* (a + invar_1) + invar_2. Associate. */
5893 simplify_giv_expr (loop,
5905 /* Each argument must be either REG, PLUS, or MULT. Convert REG to
5906 MULT to reduce cases. */
5907 if (GET_CODE (arg0) == REG)
5908 arg0 = gen_rtx_MULT (mode, arg0, const1_rtx);
5909 if (GET_CODE (arg1) == REG)
5910 arg1 = gen_rtx_MULT (mode, arg1, const1_rtx);
5912 /* Now have PLUS + PLUS, PLUS + MULT, MULT + PLUS, or MULT + MULT.
5913 Put a MULT first, leaving PLUS + PLUS, MULT + PLUS, or MULT + MULT.
5914 Recurse to associate the second PLUS. */
5915 if (GET_CODE (arg1) == MULT)
5916 tem = arg0, arg0 = arg1, arg1 = tem;
5918 if (GET_CODE (arg1) == PLUS)
5920 simplify_giv_expr (loop,
5922 gen_rtx_PLUS (mode, arg0,
5927 /* Now must have MULT + MULT. Distribute if same biv, else not giv. */
5928 if (GET_CODE (arg0) != MULT || GET_CODE (arg1) != MULT)
5931 if (!rtx_equal_p (arg0, arg1))
5934 return simplify_giv_expr (loop,
5943 /* Handle "a - b" as "a + b * (-1)". */
5944 return simplify_giv_expr (loop,
5953 arg0 = simplify_giv_expr (loop, XEXP (x, 0), ext_val, benefit);
5954 arg1 = simplify_giv_expr (loop, XEXP (x, 1), ext_val, benefit);
5955 if (arg0 == 0 || arg1 == 0)
5958 /* Put constant last, CONST_INT last if both constant. */
5959 if ((GET_CODE (arg0) == USE || GET_CODE (arg0) == CONST_INT)
5960 && GET_CODE (arg1) != CONST_INT)
5961 tem = arg0, arg0 = arg1, arg1 = tem;
5963 /* If second argument is not now constant, not giv. */
5964 if (GET_CODE (arg1) != USE && GET_CODE (arg1) != CONST_INT)
5967 /* Handle multiply by 0 or 1. */
5968 if (arg1 == const0_rtx)
5971 else if (arg1 == const1_rtx)
5974 switch (GET_CODE (arg0))
5977 /* biv * invar. Done. */
5978 return gen_rtx_MULT (mode, arg0, arg1);
5981 /* Product of two constants. */
5982 return GEN_INT (INTVAL (arg0) * INTVAL (arg1));
5985 /* invar * invar is a giv, but attempt to simplify it somehow. */
5986 if (GET_CODE (arg1) != CONST_INT)
5989 arg0 = XEXP (arg0, 0);
5990 if (GET_CODE (arg0) == MULT)
5992 /* (invar_0 * invar_1) * invar_2. Associate. */
5993 return simplify_giv_expr (loop,
6002 /* Porpagate the MULT expressions to the intermost nodes. */
6003 else if (GET_CODE (arg0) == PLUS)
6005 /* (invar_0 + invar_1) * invar_2. Distribute. */
6006 return simplify_giv_expr (loop,
6018 return gen_rtx_USE (mode, gen_rtx_MULT (mode, arg0, arg1));
6021 /* (a * invar_1) * invar_2. Associate. */
6022 return simplify_giv_expr (loop,
6031 /* (a + invar_1) * invar_2. Distribute. */
6032 return simplify_giv_expr (loop,
6047 /* Shift by constant is multiply by power of two. */
6048 if (GET_CODE (XEXP (x, 1)) != CONST_INT)
6052 simplify_giv_expr (loop,
6055 GEN_INT ((HOST_WIDE_INT) 1
6056 << INTVAL (XEXP (x, 1)))),
6060 /* "-a" is "a * (-1)" */
6061 return simplify_giv_expr (loop,
6062 gen_rtx_MULT (mode, XEXP (x, 0), constm1_rtx),
6066 /* "~a" is "-a - 1". Silly, but easy. */
6067 return simplify_giv_expr (loop,
6068 gen_rtx_MINUS (mode,
6069 gen_rtx_NEG (mode, XEXP (x, 0)),
6074 /* Already in proper form for invariant. */
6080 /* Conditionally recognize extensions of simple IVs. After we've
6081 computed loop traversal counts and verified the range of the
6082 source IV, we'll reevaluate this as a GIV. */
6083 if (*ext_val == NULL_RTX)
6085 arg0 = simplify_giv_expr (loop, XEXP (x, 0), ext_val, benefit);
6086 if (arg0 && *ext_val == NULL_RTX && GET_CODE (arg0) == REG)
6088 *ext_val = gen_rtx_fmt_e (GET_CODE (x), mode, arg0);
6095 /* If this is a new register, we can't deal with it. */
6096 if (REGNO (x) >= max_reg_before_loop)
6099 /* Check for biv or giv. */
6100 switch (REG_IV_TYPE (ivs, REGNO (x)))
6104 case GENERAL_INDUCT:
6106 struct induction *v = REG_IV_INFO (ivs, REGNO (x));
6108 /* Form expression from giv and add benefit. Ensure this giv
6109 can derive another and subtract any needed adjustment if so. */
6111 /* Increasing the benefit here is risky. The only case in which it
6112 is arguably correct is if this is the only use of V. In other
6113 cases, this will artificially inflate the benefit of the current
6114 giv, and lead to suboptimal code. Thus, it is disabled, since
6115 potentially not reducing an only marginally beneficial giv is
6116 less harmful than reducing many givs that are not really
6119 rtx single_use = regs->array[REGNO (x)].single_usage;
6120 if (single_use && single_use != const0_rtx)
6121 *benefit += v->benefit;
6127 tem = gen_rtx_PLUS (mode, gen_rtx_MULT (mode,
6128 v->src_reg, v->mult_val),
6131 if (v->derive_adjustment)
6132 tem = gen_rtx_MINUS (mode, tem, v->derive_adjustment);
6133 arg0 = simplify_giv_expr (loop, tem, ext_val, benefit);
6136 if (!v->ext_dependant)
6141 *ext_val = v->ext_dependant;
6149 /* If it isn't an induction variable, and it is invariant, we
6150 may be able to simplify things further by looking through
6151 the bits we just moved outside the loop. */
6152 if (loop_invariant_p (loop, x) == 1)
6155 struct loop_movables *movables = LOOP_MOVABLES (loop);
6157 for (m = movables->head; m; m = m->next)
6158 if (rtx_equal_p (x, m->set_dest))
6160 /* Ok, we found a match. Substitute and simplify. */
6162 /* If we match another movable, we must use that, as
6163 this one is going away. */
6165 return simplify_giv_expr (loop, m->match->set_dest,
6168 /* If consec is non-zero, this is a member of a group of
6169 instructions that were moved together. We handle this
6170 case only to the point of seeking to the last insn and
6171 looking for a REG_EQUAL. Fail if we don't find one. */
6178 tem = NEXT_INSN (tem);
6182 tem = find_reg_note (tem, REG_EQUAL, NULL_RTX);
6184 tem = XEXP (tem, 0);
6188 tem = single_set (m->insn);
6190 tem = SET_SRC (tem);
6195 /* What we are most interested in is pointer
6196 arithmetic on invariants -- only take
6197 patterns we may be able to do something with. */
6198 if (GET_CODE (tem) == PLUS
6199 || GET_CODE (tem) == MULT
6200 || GET_CODE (tem) == ASHIFT
6201 || GET_CODE (tem) == CONST_INT
6202 || GET_CODE (tem) == SYMBOL_REF)
6204 tem = simplify_giv_expr (loop, tem, ext_val,
6209 else if (GET_CODE (tem) == CONST
6210 && GET_CODE (XEXP (tem, 0)) == PLUS
6211 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == SYMBOL_REF
6212 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)
6214 tem = simplify_giv_expr (loop, XEXP (tem, 0),
6226 /* Fall through to general case. */
6228 /* If invariant, return as USE (unless CONST_INT).
6229 Otherwise, not giv. */
6230 if (GET_CODE (x) == USE)
6233 if (loop_invariant_p (loop, x) == 1)
6235 if (GET_CODE (x) == CONST_INT)
6237 if (GET_CODE (x) == CONST
6238 && GET_CODE (XEXP (x, 0)) == PLUS
6239 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
6240 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
6242 return gen_rtx_USE (mode, x);
6249 /* This routine folds invariants such that there is only ever one
6250 CONST_INT in the summation. It is only used by simplify_giv_expr. */
6253 sge_plus_constant (x, c)
6256 if (GET_CODE (x) == CONST_INT)
6257 return GEN_INT (INTVAL (x) + INTVAL (c));
6258 else if (GET_CODE (x) != PLUS)
6259 return gen_rtx_PLUS (GET_MODE (x), x, c);
6260 else if (GET_CODE (XEXP (x, 1)) == CONST_INT)
6262 return gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0),
6263 GEN_INT (INTVAL (XEXP (x, 1)) + INTVAL (c)));
6265 else if (GET_CODE (XEXP (x, 0)) == PLUS
6266 || GET_CODE (XEXP (x, 1)) != PLUS)
6268 return gen_rtx_PLUS (GET_MODE (x),
6269 sge_plus_constant (XEXP (x, 0), c), XEXP (x, 1));
6273 return gen_rtx_PLUS (GET_MODE (x),
6274 sge_plus_constant (XEXP (x, 1), c), XEXP (x, 0));
6279 sge_plus (mode, x, y)
6280 enum machine_mode mode;
6283 while (GET_CODE (y) == PLUS)
6285 rtx a = XEXP (y, 0);
6286 if (GET_CODE (a) == CONST_INT)
6287 x = sge_plus_constant (x, a);
6289 x = gen_rtx_PLUS (mode, x, a);
6292 if (GET_CODE (y) == CONST_INT)
6293 x = sge_plus_constant (x, y);
6295 x = gen_rtx_PLUS (mode, x, y);
6299 /* Help detect a giv that is calculated by several consecutive insns;
6303 The caller has already identified the first insn P as having a giv as dest;
6304 we check that all other insns that set the same register follow
6305 immediately after P, that they alter nothing else,
6306 and that the result of the last is still a giv.
6308 The value is 0 if the reg set in P is not really a giv.
6309 Otherwise, the value is the amount gained by eliminating
6310 all the consecutive insns that compute the value.
6312 FIRST_BENEFIT is the amount gained by eliminating the first insn, P.
6313 SRC_REG is the reg of the biv; DEST_REG is the reg of the giv.
6315 The coefficients of the ultimate giv value are stored in
6316 *MULT_VAL and *ADD_VAL. */
6319 consec_sets_giv (loop, first_benefit, p, src_reg, dest_reg,
6320 add_val, mult_val, ext_val, last_consec_insn)
6321 const struct loop *loop;
6329 rtx *last_consec_insn;
6331 struct loop_ivs *ivs = LOOP_IVS (loop);
6332 struct loop_regs *regs = LOOP_REGS (loop);
6339 /* Indicate that this is a giv so that we can update the value produced in
6340 each insn of the multi-insn sequence.
6342 This induction structure will be used only by the call to
6343 general_induction_var below, so we can allocate it on our stack.
6344 If this is a giv, our caller will replace the induct var entry with
6345 a new induction structure. */
6346 struct induction *v;
6348 if (REG_IV_TYPE (ivs, REGNO (dest_reg)) != UNKNOWN_INDUCT)
6351 v = (struct induction *) alloca (sizeof (struct induction));
6352 v->src_reg = src_reg;
6353 v->mult_val = *mult_val;
6354 v->add_val = *add_val;
6355 v->benefit = first_benefit;
6357 v->derive_adjustment = 0;
6358 v->ext_dependant = NULL_RTX;
6360 REG_IV_TYPE (ivs, REGNO (dest_reg)) = GENERAL_INDUCT;
6361 REG_IV_INFO (ivs, REGNO (dest_reg)) = v;
6363 count = regs->array[REGNO (dest_reg)].n_times_set - 1;
6368 code = GET_CODE (p);
6370 /* If libcall, skip to end of call sequence. */
6371 if (code == INSN && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
6375 && (set = single_set (p))
6376 && GET_CODE (SET_DEST (set)) == REG
6377 && SET_DEST (set) == dest_reg
6378 && (general_induction_var (loop, SET_SRC (set), &src_reg,
6379 add_val, mult_val, ext_val, 0,
6381 /* Giv created by equivalent expression. */
6382 || ((temp = find_reg_note (p, REG_EQUAL, NULL_RTX))
6383 && general_induction_var (loop, XEXP (temp, 0), &src_reg,
6384 add_val, mult_val, ext_val, 0,
6385 &benefit, VOIDmode)))
6386 && src_reg == v->src_reg)
6388 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
6389 benefit += libcall_benefit (p);
6392 v->mult_val = *mult_val;
6393 v->add_val = *add_val;
6394 v->benefit += benefit;
6396 else if (code != NOTE)
6398 /* Allow insns that set something other than this giv to a
6399 constant. Such insns are needed on machines which cannot
6400 include long constants and should not disqualify a giv. */
6402 && (set = single_set (p))
6403 && SET_DEST (set) != dest_reg
6404 && CONSTANT_P (SET_SRC (set)))
6407 REG_IV_TYPE (ivs, REGNO (dest_reg)) = UNKNOWN_INDUCT;
6412 REG_IV_TYPE (ivs, REGNO (dest_reg)) = UNKNOWN_INDUCT;
6413 *last_consec_insn = p;
6417 /* Return an rtx, if any, that expresses giv G2 as a function of the register
6418 represented by G1. If no such expression can be found, or it is clear that
6419 it cannot possibly be a valid address, 0 is returned.
6421 To perform the computation, we note that
6424 where `v' is the biv.
6426 So G2 = (y/b) * G1 + (b - a*y/x).
6428 Note that MULT = y/x.
6430 Update: A and B are now allowed to be additive expressions such that
6431 B contains all variables in A. That is, computing B-A will not require
6432 subtracting variables. */
6435 express_from_1 (a, b, mult)
6438 /* If MULT is zero, then A*MULT is zero, and our expression is B. */
6440 if (mult == const0_rtx)
6443 /* If MULT is not 1, we cannot handle A with non-constants, since we
6444 would then be required to subtract multiples of the registers in A.
6445 This is theoretically possible, and may even apply to some Fortran
6446 constructs, but it is a lot of work and we do not attempt it here. */
6448 if (mult != const1_rtx && GET_CODE (a) != CONST_INT)
6451 /* In general these structures are sorted top to bottom (down the PLUS
6452 chain), but not left to right across the PLUS. If B is a higher
6453 order giv than A, we can strip one level and recurse. If A is higher
6454 order, we'll eventually bail out, but won't know that until the end.
6455 If they are the same, we'll strip one level around this loop. */
6457 while (GET_CODE (a) == PLUS && GET_CODE (b) == PLUS)
6459 rtx ra, rb, oa, ob, tmp;
6461 ra = XEXP (a, 0), oa = XEXP (a, 1);
6462 if (GET_CODE (ra) == PLUS)
6463 tmp = ra, ra = oa, oa = tmp;
6465 rb = XEXP (b, 0), ob = XEXP (b, 1);
6466 if (GET_CODE (rb) == PLUS)
6467 tmp = rb, rb = ob, ob = tmp;
6469 if (rtx_equal_p (ra, rb))
6470 /* We matched: remove one reg completely. */
6472 else if (GET_CODE (ob) != PLUS && rtx_equal_p (ra, ob))
6473 /* An alternate match. */
6475 else if (GET_CODE (oa) != PLUS && rtx_equal_p (oa, rb))
6476 /* An alternate match. */
6480 /* Indicates an extra register in B. Strip one level from B and
6481 recurse, hoping B was the higher order expression. */
6482 ob = express_from_1 (a, ob, mult);
6485 return gen_rtx_PLUS (GET_MODE (b), rb, ob);
6489 /* Here we are at the last level of A, go through the cases hoping to
6490 get rid of everything but a constant. */
6492 if (GET_CODE (a) == PLUS)
6496 ra = XEXP (a, 0), oa = XEXP (a, 1);
6497 if (rtx_equal_p (oa, b))
6499 else if (!rtx_equal_p (ra, b))
6502 if (GET_CODE (oa) != CONST_INT)
6505 return GEN_INT (-INTVAL (oa) * INTVAL (mult));
6507 else if (GET_CODE (a) == CONST_INT)
6509 return plus_constant (b, -INTVAL (a) * INTVAL (mult));
6511 else if (CONSTANT_P (a))
6513 return simplify_gen_binary (MINUS, GET_MODE (b) != VOIDmode ? GET_MODE (b) : GET_MODE (a), const0_rtx, a);
6515 else if (GET_CODE (b) == PLUS)
6517 if (rtx_equal_p (a, XEXP (b, 0)))
6519 else if (rtx_equal_p (a, XEXP (b, 1)))
6524 else if (rtx_equal_p (a, b))
6531 express_from (g1, g2)
6532 struct induction *g1, *g2;
6536 /* The value that G1 will be multiplied by must be a constant integer. Also,
6537 the only chance we have of getting a valid address is if b*c/a (see above
6538 for notation) is also an integer. */
6539 if (GET_CODE (g1->mult_val) == CONST_INT
6540 && GET_CODE (g2->mult_val) == CONST_INT)
6542 if (g1->mult_val == const0_rtx
6543 || INTVAL (g2->mult_val) % INTVAL (g1->mult_val) != 0)
6545 mult = GEN_INT (INTVAL (g2->mult_val) / INTVAL (g1->mult_val));
6547 else if (rtx_equal_p (g1->mult_val, g2->mult_val))
6551 /* ??? Find out if the one is a multiple of the other? */
6555 add = express_from_1 (g1->add_val, g2->add_val, mult);
6556 if (add == NULL_RTX)
6558 /* Failed. If we've got a multiplication factor between G1 and G2,
6559 scale G1's addend and try again. */
6560 if (INTVAL (mult) > 1)
6562 rtx g1_add_val = g1->add_val;
6563 if (GET_CODE (g1_add_val) == MULT
6564 && GET_CODE (XEXP (g1_add_val, 1)) == CONST_INT)
6567 m = INTVAL (mult) * INTVAL (XEXP (g1_add_val, 1));
6568 g1_add_val = gen_rtx_MULT (GET_MODE (g1_add_val),
6569 XEXP (g1_add_val, 0), GEN_INT (m));
6573 g1_add_val = gen_rtx_MULT (GET_MODE (g1_add_val), g1_add_val,
6577 add = express_from_1 (g1_add_val, g2->add_val, const1_rtx);
6580 if (add == NULL_RTX)
6583 /* Form simplified final result. */
6584 if (mult == const0_rtx)
6586 else if (mult == const1_rtx)
6587 mult = g1->dest_reg;
6589 mult = gen_rtx_MULT (g2->mode, g1->dest_reg, mult);
6591 if (add == const0_rtx)
6595 if (GET_CODE (add) == PLUS
6596 && CONSTANT_P (XEXP (add, 1)))
6598 rtx tem = XEXP (add, 1);
6599 mult = gen_rtx_PLUS (g2->mode, mult, XEXP (add, 0));
6603 return gen_rtx_PLUS (g2->mode, mult, add);
6607 /* Return an rtx, if any, that expresses giv G2 as a function of the register
6608 represented by G1. This indicates that G2 should be combined with G1 and
6609 that G2 can use (either directly or via an address expression) a register
6610 used to represent G1. */
6613 combine_givs_p (g1, g2)
6614 struct induction *g1, *g2;
6618 /* With the introduction of ext dependant givs, we must care for modes.
6619 G2 must not use a wider mode than G1. */
6620 if (GET_MODE_SIZE (g1->mode) < GET_MODE_SIZE (g2->mode))
6623 ret = comb = express_from (g1, g2);
6624 if (comb == NULL_RTX)
6626 if (g1->mode != g2->mode)
6627 ret = gen_lowpart (g2->mode, comb);
6629 /* If these givs are identical, they can be combined. We use the results
6630 of express_from because the addends are not in a canonical form, so
6631 rtx_equal_p is a weaker test. */
6632 /* But don't combine a DEST_REG giv with a DEST_ADDR giv; we want the
6633 combination to be the other way round. */
6634 if (comb == g1->dest_reg
6635 && (g1->giv_type == DEST_REG || g2->giv_type == DEST_ADDR))
6640 /* If G2 can be expressed as a function of G1 and that function is valid
6641 as an address and no more expensive than using a register for G2,
6642 the expression of G2 in terms of G1 can be used. */
6644 && g2->giv_type == DEST_ADDR
6645 && memory_address_p (g2->mem_mode, ret)
6646 /* ??? Looses, especially with -fforce-addr, where *g2->location
6647 will always be a register, and so anything more complicated
6651 && ADDRESS_COST (tem) <= ADDRESS_COST (*g2->location)
6653 && rtx_cost (tem, MEM) <= rtx_cost (*g2->location, MEM)
6664 /* Check each extension dependant giv in this class to see if its
6665 root biv is safe from wrapping in the interior mode, which would
6666 make the giv illegal. */
6669 check_ext_dependant_givs (bl, loop_info)
6670 struct iv_class *bl;
6671 struct loop_info *loop_info;
6673 int ze_ok = 0, se_ok = 0, info_ok = 0;
6674 enum machine_mode biv_mode = GET_MODE (bl->biv->src_reg);
6675 HOST_WIDE_INT start_val;
6676 unsigned HOST_WIDE_INT u_end_val, u_start_val;
6678 struct induction *v;
6680 /* Make sure the iteration data is available. We must have
6681 constants in order to be certain of no overflow. */
6682 /* ??? An unknown iteration count with an increment of +-1
6683 combined with friendly exit tests of against an invariant
6684 value is also ameanable to optimization. Not implemented. */
6685 if (loop_info->n_iterations > 0
6686 && bl->initial_value
6687 && GET_CODE (bl->initial_value) == CONST_INT
6688 && (incr = biv_total_increment (bl))
6689 && GET_CODE (incr) == CONST_INT
6690 /* Make sure the host can represent the arithmetic. */
6691 && HOST_BITS_PER_WIDE_INT >= GET_MODE_BITSIZE (biv_mode))
6693 unsigned HOST_WIDE_INT abs_incr, total_incr;
6694 HOST_WIDE_INT s_end_val;
6698 start_val = INTVAL (bl->initial_value);
6699 u_start_val = start_val;
6701 neg_incr = 0, abs_incr = INTVAL (incr);
6702 if (INTVAL (incr) < 0)
6703 neg_incr = 1, abs_incr = -abs_incr;
6704 total_incr = abs_incr * loop_info->n_iterations;
6706 /* Check for host arithmatic overflow. */
6707 if (total_incr / loop_info->n_iterations == abs_incr)
6709 unsigned HOST_WIDE_INT u_max;
6710 HOST_WIDE_INT s_max;
6712 u_end_val = start_val + (neg_incr ? -total_incr : total_incr);
6713 s_end_val = u_end_val;
6714 u_max = GET_MODE_MASK (biv_mode);
6717 /* Check zero extension of biv ok. */
6719 /* Check for host arithmatic overflow. */
6721 ? u_end_val < u_start_val
6722 : u_end_val > u_start_val)
6723 /* Check for target arithmetic overflow. */
6725 ? 1 /* taken care of with host overflow */
6726 : u_end_val <= u_max))
6731 /* Check sign extension of biv ok. */
6732 /* ??? While it is true that overflow with signed and pointer
6733 arithmetic is undefined, I fear too many programmers don't
6734 keep this fact in mind -- myself included on occasion.
6735 So leave alone with the signed overflow optimizations. */
6736 if (start_val >= -s_max - 1
6737 /* Check for host arithmatic overflow. */
6739 ? s_end_val < start_val
6740 : s_end_val > start_val)
6741 /* Check for target arithmetic overflow. */
6743 ? s_end_val >= -s_max - 1
6744 : s_end_val <= s_max))
6751 /* Invalidate givs that fail the tests. */
6752 for (v = bl->giv; v; v = v->next_iv)
6753 if (v->ext_dependant)
6755 enum rtx_code code = GET_CODE (v->ext_dependant);
6768 /* We don't know whether this value is being used as either
6769 signed or unsigned, so to safely truncate we must satisfy
6770 both. The initial check here verifies the BIV itself;
6771 once that is successful we may check its range wrt the
6775 enum machine_mode outer_mode = GET_MODE (v->ext_dependant);
6776 unsigned HOST_WIDE_INT max = GET_MODE_MASK (outer_mode) >> 1;
6778 /* We know from the above that both endpoints are nonnegative,
6779 and that there is no wrapping. Verify that both endpoints
6780 are within the (signed) range of the outer mode. */
6781 if (u_start_val <= max && u_end_val <= max)
6792 if (loop_dump_stream)
6794 fprintf (loop_dump_stream,
6795 "Verified ext dependant giv at %d of reg %d\n",
6796 INSN_UID (v->insn), bl->regno);
6801 if (loop_dump_stream)
6806 why = "biv iteration values overflowed";
6810 incr = biv_total_increment (bl);
6811 if (incr == const1_rtx)
6812 why = "biv iteration info incomplete; incr by 1";
6814 why = "biv iteration info incomplete";
6817 fprintf (loop_dump_stream,
6818 "Failed ext dependant giv at %d, %s\n",
6819 INSN_UID (v->insn), why);
6826 /* Generate a version of VALUE in a mode appropriate for initializing V. */
6829 extend_value_for_giv (v, value)
6830 struct induction *v;
6833 rtx ext_dep = v->ext_dependant;
6838 /* Recall that check_ext_dependant_givs verified that the known bounds
6839 of a biv did not overflow or wrap with respect to the extension for
6840 the giv. Therefore, constants need no additional adjustment. */
6841 if (CONSTANT_P (value) && GET_MODE (value) == VOIDmode)
6844 /* Otherwise, we must adjust the value to compensate for the
6845 differing modes of the biv and the giv. */
6846 return gen_rtx_fmt_e (GET_CODE (ext_dep), GET_MODE (ext_dep), value);
6849 struct combine_givs_stats
6856 cmp_combine_givs_stats (xp, yp)
6860 const struct combine_givs_stats * const x =
6861 (const struct combine_givs_stats *) xp;
6862 const struct combine_givs_stats * const y =
6863 (const struct combine_givs_stats *) yp;
6865 d = y->total_benefit - x->total_benefit;
6866 /* Stabilize the sort. */
6868 d = x->giv_number - y->giv_number;
6872 /* Check all pairs of givs for iv_class BL and see if any can be combined with
6873 any other. If so, point SAME to the giv combined with and set NEW_REG to
6874 be an expression (in terms of the other giv's DEST_REG) equivalent to the
6875 giv. Also, update BENEFIT and related fields for cost/benefit analysis. */
6878 combine_givs (regs, bl)
6879 struct loop_regs *regs;
6880 struct iv_class *bl;
6882 /* Additional benefit to add for being combined multiple times. */
6883 const int extra_benefit = 3;
6885 struct induction *g1, *g2, **giv_array;
6886 int i, j, k, giv_count;
6887 struct combine_givs_stats *stats;
6890 /* Count givs, because bl->giv_count is incorrect here. */
6892 for (g1 = bl->giv; g1; g1 = g1->next_iv)
6897 = (struct induction **) alloca (giv_count * sizeof (struct induction *));
6899 for (g1 = bl->giv; g1; g1 = g1->next_iv)
6901 giv_array[i++] = g1;
6903 stats = (struct combine_givs_stats *) xcalloc (giv_count, sizeof (*stats));
6904 can_combine = (rtx *) xcalloc (giv_count, giv_count * sizeof (rtx));
6906 for (i = 0; i < giv_count; i++)
6912 stats[i].giv_number = i;
6914 /* If a DEST_REG GIV is used only once, do not allow it to combine
6915 with anything, for in doing so we will gain nothing that cannot
6916 be had by simply letting the GIV with which we would have combined
6917 to be reduced on its own. The losage shows up in particular with
6918 DEST_ADDR targets on hosts with reg+reg addressing, though it can
6919 be seen elsewhere as well. */
6920 if (g1->giv_type == DEST_REG
6921 && (single_use = regs->array[REGNO (g1->dest_reg)].single_usage)
6922 && single_use != const0_rtx)
6925 this_benefit = g1->benefit;
6926 /* Add an additional weight for zero addends. */
6927 if (g1->no_const_addval)
6930 for (j = 0; j < giv_count; j++)
6936 && (this_combine = combine_givs_p (g1, g2)) != NULL_RTX)
6938 can_combine[i * giv_count + j] = this_combine;
6939 this_benefit += g2->benefit + extra_benefit;
6942 stats[i].total_benefit = this_benefit;
6945 /* Iterate, combining until we can't. */
6947 qsort (stats, giv_count, sizeof (*stats), cmp_combine_givs_stats);
6949 if (loop_dump_stream)
6951 fprintf (loop_dump_stream, "Sorted combine statistics:\n");
6952 for (k = 0; k < giv_count; k++)
6954 g1 = giv_array[stats[k].giv_number];
6955 if (!g1->combined_with && !g1->same)
6956 fprintf (loop_dump_stream, " {%d, %d}",
6957 INSN_UID (giv_array[stats[k].giv_number]->insn),
6958 stats[k].total_benefit);
6960 putc ('\n', loop_dump_stream);
6963 for (k = 0; k < giv_count; k++)
6965 int g1_add_benefit = 0;
6967 i = stats[k].giv_number;
6970 /* If it has already been combined, skip. */
6971 if (g1->combined_with || g1->same)
6974 for (j = 0; j < giv_count; j++)
6977 if (g1 != g2 && can_combine[i * giv_count + j]
6978 /* If it has already been combined, skip. */
6979 && ! g2->same && ! g2->combined_with)
6983 g2->new_reg = can_combine[i * giv_count + j];
6985 g1->combined_with++;
6986 g1->lifetime += g2->lifetime;
6988 g1_add_benefit += g2->benefit;
6990 /* ??? The new final_[bg]iv_value code does a much better job
6991 of finding replaceable giv's, and hence this code may no
6992 longer be necessary. */
6993 if (! g2->replaceable && REG_USERVAR_P (g2->dest_reg))
6994 g1_add_benefit -= copy_cost;
6996 /* To help optimize the next set of combinations, remove
6997 this giv from the benefits of other potential mates. */
6998 for (l = 0; l < giv_count; ++l)
7000 int m = stats[l].giv_number;
7001 if (can_combine[m * giv_count + j])
7002 stats[l].total_benefit -= g2->benefit + extra_benefit;
7005 if (loop_dump_stream)
7006 fprintf (loop_dump_stream,
7007 "giv at %d combined with giv at %d; new benefit %d + %d, lifetime %d\n",
7008 INSN_UID (g2->insn), INSN_UID (g1->insn),
7009 g1->benefit, g1_add_benefit, g1->lifetime);
7013 /* To help optimize the next set of combinations, remove
7014 this giv from the benefits of other potential mates. */
7015 if (g1->combined_with)
7017 for (j = 0; j < giv_count; ++j)
7019 int m = stats[j].giv_number;
7020 if (can_combine[m * giv_count + i])
7021 stats[j].total_benefit -= g1->benefit + extra_benefit;
7024 g1->benefit += g1_add_benefit;
7026 /* We've finished with this giv, and everything it touched.
7027 Restart the combination so that proper weights for the
7028 rest of the givs are properly taken into account. */
7029 /* ??? Ideally we would compact the arrays at this point, so
7030 as to not cover old ground. But sanely compacting
7031 can_combine is tricky. */
7041 /* EMIT code before INSERT_BEFORE to set REG = B * M + A. */
7044 emit_iv_add_mult (b, m, a, reg, insert_before)
7045 rtx b; /* initial value of basic induction variable */
7046 rtx m; /* multiplicative constant */
7047 rtx a; /* additive constant */
7048 rtx reg; /* destination register */
7054 /* Prevent unexpected sharing of these rtx. */
7058 /* Increase the lifetime of any invariants moved further in code. */
7059 update_reg_last_use (a, insert_before);
7060 update_reg_last_use (b, insert_before);
7061 update_reg_last_use (m, insert_before);
7064 result = expand_mult_add (b, reg, m, a, GET_MODE (reg), 1);
7066 emit_move_insn (reg, result);
7067 seq = gen_sequence ();
7070 emit_insn_before (seq, insert_before);
7072 /* It is entirely possible that the expansion created lots of new
7073 registers. Iterate over the sequence we just created and
7076 if (GET_CODE (seq) == SEQUENCE)
7079 for (i = 0; i < XVECLEN (seq, 0); ++i)
7081 rtx set = single_set (XVECEXP (seq, 0, i));
7082 if (set && GET_CODE (SET_DEST (set)) == REG)
7083 record_base_value (REGNO (SET_DEST (set)), SET_SRC (set), 0);
7086 else if (GET_CODE (seq) == SET
7087 && GET_CODE (SET_DEST (seq)) == REG)
7088 record_base_value (REGNO (SET_DEST (seq)), SET_SRC (seq), 0);
7091 /* Similar to emit_iv_add_mult, but compute cost rather than emitting
7094 iv_add_mult_cost (b, m, a, reg)
7095 rtx b; /* initial value of basic induction variable */
7096 rtx m; /* multiplicative constant */
7097 rtx a; /* additive constant */
7098 rtx reg; /* destination register */
7104 result = expand_mult_add (b, reg, m, a, GET_MODE (reg), 0);
7106 emit_move_insn (reg, result);
7107 last = get_last_insn ();
7110 rtx t = single_set (last);
7112 cost += rtx_cost (SET_SRC (t), SET);
7113 last = PREV_INSN (last);
7119 /* Test whether A * B can be computed without
7120 an actual multiply insn. Value is 1 if so. */
7123 product_cheap_p (a, b)
7131 /* If only one is constant, make it B. */
7132 if (GET_CODE (a) == CONST_INT)
7133 tmp = a, a = b, b = tmp;
7135 /* If first constant, both constant, so don't need multiply. */
7136 if (GET_CODE (a) == CONST_INT)
7139 /* If second not constant, neither is constant, so would need multiply. */
7140 if (GET_CODE (b) != CONST_INT)
7143 /* One operand is constant, so might not need multiply insn. Generate the
7144 code for the multiply and see if a call or multiply, or long sequence
7145 of insns is generated. */
7148 expand_mult (GET_MODE (a), a, b, NULL_RTX, 1);
7149 tmp = gen_sequence ();
7152 if (GET_CODE (tmp) == SEQUENCE)
7154 if (XVEC (tmp, 0) == 0)
7156 else if (XVECLEN (tmp, 0) > 3)
7159 for (i = 0; i < XVECLEN (tmp, 0); i++)
7161 rtx insn = XVECEXP (tmp, 0, i);
7163 if (GET_CODE (insn) != INSN
7164 || (GET_CODE (PATTERN (insn)) == SET
7165 && GET_CODE (SET_SRC (PATTERN (insn))) == MULT)
7166 || (GET_CODE (PATTERN (insn)) == PARALLEL
7167 && GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == SET
7168 && GET_CODE (SET_SRC (XVECEXP (PATTERN (insn), 0, 0))) == MULT))
7175 else if (GET_CODE (tmp) == SET
7176 && GET_CODE (SET_SRC (tmp)) == MULT)
7178 else if (GET_CODE (tmp) == PARALLEL
7179 && GET_CODE (XVECEXP (tmp, 0, 0)) == SET
7180 && GET_CODE (SET_SRC (XVECEXP (tmp, 0, 0))) == MULT)
7186 /* Check to see if loop can be terminated by a "decrement and branch until
7187 zero" instruction. If so, add a REG_NONNEG note to the branch insn if so.
7188 Also try reversing an increment loop to a decrement loop
7189 to see if the optimization can be performed.
7190 Value is nonzero if optimization was performed. */
7192 /* This is useful even if the architecture doesn't have such an insn,
7193 because it might change a loops which increments from 0 to n to a loop
7194 which decrements from n to 0. A loop that decrements to zero is usually
7195 faster than one that increments from zero. */
7197 /* ??? This could be rewritten to use some of the loop unrolling procedures,
7198 such as approx_final_value, biv_total_increment, loop_iterations, and
7199 final_[bg]iv_value. */
7202 check_dbra_loop (loop, insn_count)
7206 struct loop_info *loop_info = LOOP_INFO (loop);
7207 struct loop_regs *regs = LOOP_REGS (loop);
7208 struct loop_ivs *ivs = LOOP_IVS (loop);
7209 struct iv_class *bl;
7216 rtx before_comparison;
7220 int compare_and_branch;
7221 rtx loop_start = loop->start;
7222 rtx loop_end = loop->end;
7224 /* If last insn is a conditional branch, and the insn before tests a
7225 register value, try to optimize it. Otherwise, we can't do anything. */
7227 jump = PREV_INSN (loop_end);
7228 comparison = get_condition_for_loop (loop, jump);
7229 if (comparison == 0)
7231 if (!onlyjump_p (jump))
7234 /* Try to compute whether the compare/branch at the loop end is one or
7235 two instructions. */
7236 get_condition (jump, &first_compare);
7237 if (first_compare == jump)
7238 compare_and_branch = 1;
7239 else if (first_compare == prev_nonnote_insn (jump))
7240 compare_and_branch = 2;
7245 /* If more than one condition is present to control the loop, then
7246 do not proceed, as this function does not know how to rewrite
7247 loop tests with more than one condition.
7249 Look backwards from the first insn in the last comparison
7250 sequence and see if we've got another comparison sequence. */
7253 if ((jump1 = prev_nonnote_insn (first_compare)) != loop->cont)
7254 if (GET_CODE (jump1) == JUMP_INSN)
7258 /* Check all of the bivs to see if the compare uses one of them.
7259 Skip biv's set more than once because we can't guarantee that
7260 it will be zero on the last iteration. Also skip if the biv is
7261 used between its update and the test insn. */
7263 for (bl = ivs->list; bl; bl = bl->next)
7265 if (bl->biv_count == 1
7266 && ! bl->biv->maybe_multiple
7267 && bl->biv->dest_reg == XEXP (comparison, 0)
7268 && ! reg_used_between_p (regno_reg_rtx[bl->regno], bl->biv->insn,
7276 /* Look for the case where the basic induction variable is always
7277 nonnegative, and equals zero on the last iteration.
7278 In this case, add a reg_note REG_NONNEG, which allows the
7279 m68k DBRA instruction to be used. */
7281 if (((GET_CODE (comparison) == GT
7282 && GET_CODE (XEXP (comparison, 1)) == CONST_INT
7283 && INTVAL (XEXP (comparison, 1)) == -1)
7284 || (GET_CODE (comparison) == NE && XEXP (comparison, 1) == const0_rtx))
7285 && GET_CODE (bl->biv->add_val) == CONST_INT
7286 && INTVAL (bl->biv->add_val) < 0)
7288 /* Initial value must be greater than 0,
7289 init_val % -dec_value == 0 to ensure that it equals zero on
7290 the last iteration */
7292 if (GET_CODE (bl->initial_value) == CONST_INT
7293 && INTVAL (bl->initial_value) > 0
7294 && (INTVAL (bl->initial_value)
7295 % (-INTVAL (bl->biv->add_val))) == 0)
7297 /* register always nonnegative, add REG_NOTE to branch */
7298 if (! find_reg_note (jump, REG_NONNEG, NULL_RTX))
7300 = gen_rtx_EXPR_LIST (REG_NONNEG, bl->biv->dest_reg,
7307 /* If the decrement is 1 and the value was tested as >= 0 before
7308 the loop, then we can safely optimize. */
7309 for (p = loop_start; p; p = PREV_INSN (p))
7311 if (GET_CODE (p) == CODE_LABEL)
7313 if (GET_CODE (p) != JUMP_INSN)
7316 before_comparison = get_condition_for_loop (loop, p);
7317 if (before_comparison
7318 && XEXP (before_comparison, 0) == bl->biv->dest_reg
7319 && GET_CODE (before_comparison) == LT
7320 && XEXP (before_comparison, 1) == const0_rtx
7321 && ! reg_set_between_p (bl->biv->dest_reg, p, loop_start)
7322 && INTVAL (bl->biv->add_val) == -1)
7324 if (! find_reg_note (jump, REG_NONNEG, NULL_RTX))
7326 = gen_rtx_EXPR_LIST (REG_NONNEG, bl->biv->dest_reg,
7334 else if (GET_CODE (bl->biv->add_val) == CONST_INT
7335 && INTVAL (bl->biv->add_val) > 0)
7337 /* Try to change inc to dec, so can apply above optimization. */
7339 all registers modified are induction variables or invariant,
7340 all memory references have non-overlapping addresses
7341 (obviously true if only one write)
7342 allow 2 insns for the compare/jump at the end of the loop. */
7343 /* Also, we must avoid any instructions which use both the reversed
7344 biv and another biv. Such instructions will fail if the loop is
7345 reversed. We meet this condition by requiring that either
7346 no_use_except_counting is true, or else that there is only
7348 int num_nonfixed_reads = 0;
7349 /* 1 if the iteration var is used only to count iterations. */
7350 int no_use_except_counting = 0;
7351 /* 1 if the loop has no memory store, or it has a single memory store
7352 which is reversible. */
7353 int reversible_mem_store = 1;
7355 if (bl->giv_count == 0 && ! loop->exit_count)
7357 rtx bivreg = regno_reg_rtx[bl->regno];
7359 /* If there are no givs for this biv, and the only exit is the
7360 fall through at the end of the loop, then
7361 see if perhaps there are no uses except to count. */
7362 no_use_except_counting = 1;
7363 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
7366 rtx set = single_set (p);
7368 if (set && GET_CODE (SET_DEST (set)) == REG
7369 && REGNO (SET_DEST (set)) == bl->regno)
7370 /* An insn that sets the biv is okay. */
7372 else if ((p == prev_nonnote_insn (prev_nonnote_insn (loop_end))
7373 || p == prev_nonnote_insn (loop_end))
7374 && reg_mentioned_p (bivreg, PATTERN (p)))
7376 /* If either of these insns uses the biv and sets a pseudo
7377 that has more than one usage, then the biv has uses
7378 other than counting since it's used to derive a value
7379 that is used more than one time. */
7380 note_stores (PATTERN (p), note_set_pseudo_multiple_uses,
7382 if (regs->multiple_uses)
7384 no_use_except_counting = 0;
7388 else if (reg_mentioned_p (bivreg, PATTERN (p)))
7390 no_use_except_counting = 0;
7396 if (no_use_except_counting)
7397 /* No need to worry about MEMs. */
7399 else if (loop_info->num_mem_sets <= 1)
7401 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
7403 num_nonfixed_reads += count_nonfixed_reads (loop, PATTERN (p));
7405 /* If the loop has a single store, and the destination address is
7406 invariant, then we can't reverse the loop, because this address
7407 might then have the wrong value at loop exit.
7408 This would work if the source was invariant also, however, in that
7409 case, the insn should have been moved out of the loop. */
7411 if (loop_info->num_mem_sets == 1)
7413 struct induction *v;
7415 reversible_mem_store
7416 = (! loop_info->unknown_address_altered
7417 && ! loop_info->unknown_constant_address_altered
7418 && ! loop_invariant_p (loop,
7419 XEXP (XEXP (loop_info->store_mems, 0),
7422 /* If the store depends on a register that is set after the
7423 store, it depends on the initial value, and is thus not
7425 for (v = bl->giv; reversible_mem_store && v; v = v->next_iv)
7427 if (v->giv_type == DEST_REG
7428 && reg_mentioned_p (v->dest_reg,
7429 PATTERN (loop_info->first_loop_store_insn))
7430 && loop_insn_first_p (loop_info->first_loop_store_insn,
7432 reversible_mem_store = 0;
7439 /* This code only acts for innermost loops. Also it simplifies
7440 the memory address check by only reversing loops with
7441 zero or one memory access.
7442 Two memory accesses could involve parts of the same array,
7443 and that can't be reversed.
7444 If the biv is used only for counting, than we don't need to worry
7445 about all these things. */
7447 if ((num_nonfixed_reads <= 1
7448 && ! loop_info->has_nonconst_call
7449 && ! loop_info->has_volatile
7450 && reversible_mem_store
7451 && (bl->giv_count + bl->biv_count + loop_info->num_mem_sets
7452 + LOOP_MOVABLES (loop)->num + compare_and_branch == insn_count)
7453 && (bl == ivs->list && bl->next == 0))
7454 || no_use_except_counting)
7458 /* Loop can be reversed. */
7459 if (loop_dump_stream)
7460 fprintf (loop_dump_stream, "Can reverse loop\n");
7462 /* Now check other conditions:
7464 The increment must be a constant, as must the initial value,
7465 and the comparison code must be LT.
7467 This test can probably be improved since +/- 1 in the constant
7468 can be obtained by changing LT to LE and vice versa; this is
7472 /* for constants, LE gets turned into LT */
7473 && (GET_CODE (comparison) == LT
7474 || (GET_CODE (comparison) == LE
7475 && no_use_except_counting)))
7477 HOST_WIDE_INT add_val, add_adjust, comparison_val = 0;
7478 rtx initial_value, comparison_value;
7480 enum rtx_code cmp_code;
7481 int comparison_const_width;
7482 unsigned HOST_WIDE_INT comparison_sign_mask;
7484 add_val = INTVAL (bl->biv->add_val);
7485 comparison_value = XEXP (comparison, 1);
7486 if (GET_MODE (comparison_value) == VOIDmode)
7487 comparison_const_width
7488 = GET_MODE_BITSIZE (GET_MODE (XEXP (comparison, 0)));
7490 comparison_const_width
7491 = GET_MODE_BITSIZE (GET_MODE (comparison_value));
7492 if (comparison_const_width > HOST_BITS_PER_WIDE_INT)
7493 comparison_const_width = HOST_BITS_PER_WIDE_INT;
7494 comparison_sign_mask
7495 = (unsigned HOST_WIDE_INT) 1 << (comparison_const_width - 1);
7497 /* If the comparison value is not a loop invariant, then we
7498 can not reverse this loop.
7500 ??? If the insns which initialize the comparison value as
7501 a whole compute an invariant result, then we could move
7502 them out of the loop and proceed with loop reversal. */
7503 if (! loop_invariant_p (loop, comparison_value))
7506 if (GET_CODE (comparison_value) == CONST_INT)
7507 comparison_val = INTVAL (comparison_value);
7508 initial_value = bl->initial_value;
7510 /* Normalize the initial value if it is an integer and
7511 has no other use except as a counter. This will allow
7512 a few more loops to be reversed. */
7513 if (no_use_except_counting
7514 && GET_CODE (comparison_value) == CONST_INT
7515 && GET_CODE (initial_value) == CONST_INT)
7517 comparison_val = comparison_val - INTVAL (bl->initial_value);
7518 /* The code below requires comparison_val to be a multiple
7519 of add_val in order to do the loop reversal, so
7520 round up comparison_val to a multiple of add_val.
7521 Since comparison_value is constant, we know that the
7522 current comparison code is LT. */
7523 comparison_val = comparison_val + add_val - 1;
7525 -= (unsigned HOST_WIDE_INT) comparison_val % add_val;
7526 /* We postpone overflow checks for COMPARISON_VAL here;
7527 even if there is an overflow, we might still be able to
7528 reverse the loop, if converting the loop exit test to
7530 initial_value = const0_rtx;
7533 /* First check if we can do a vanilla loop reversal. */
7534 if (initial_value == const0_rtx
7535 /* If we have a decrement_and_branch_on_count,
7536 prefer the NE test, since this will allow that
7537 instruction to be generated. Note that we must
7538 use a vanilla loop reversal if the biv is used to
7539 calculate a giv or has a non-counting use. */
7540 #if ! defined (HAVE_decrement_and_branch_until_zero) \
7541 && defined (HAVE_decrement_and_branch_on_count)
7542 && (! (add_val == 1 && loop->vtop
7543 && (bl->biv_count == 0
7544 || no_use_except_counting)))
7546 && GET_CODE (comparison_value) == CONST_INT
7547 /* Now do postponed overflow checks on COMPARISON_VAL. */
7548 && ! (((comparison_val - add_val) ^ INTVAL (comparison_value))
7549 & comparison_sign_mask))
7551 /* Register will always be nonnegative, with value
7552 0 on last iteration */
7553 add_adjust = add_val;
7557 else if (add_val == 1 && loop->vtop
7558 && (bl->biv_count == 0
7559 || no_use_except_counting))
7567 if (GET_CODE (comparison) == LE)
7568 add_adjust -= add_val;
7570 /* If the initial value is not zero, or if the comparison
7571 value is not an exact multiple of the increment, then we
7572 can not reverse this loop. */
7573 if (initial_value == const0_rtx
7574 && GET_CODE (comparison_value) == CONST_INT)
7576 if (((unsigned HOST_WIDE_INT) comparison_val % add_val) != 0)
7581 if (! no_use_except_counting || add_val != 1)
7585 final_value = comparison_value;
7587 /* Reset these in case we normalized the initial value
7588 and comparison value above. */
7589 if (GET_CODE (comparison_value) == CONST_INT
7590 && GET_CODE (initial_value) == CONST_INT)
7592 comparison_value = GEN_INT (comparison_val);
7594 = GEN_INT (comparison_val + INTVAL (bl->initial_value));
7596 bl->initial_value = initial_value;
7598 /* Save some info needed to produce the new insns. */
7599 reg = bl->biv->dest_reg;
7600 jump_label = XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end))), 1);
7601 if (jump_label == pc_rtx)
7602 jump_label = XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end))), 2);
7603 new_add_val = GEN_INT (-INTVAL (bl->biv->add_val));
7605 /* Set start_value; if this is not a CONST_INT, we need
7607 Initialize biv to start_value before loop start.
7608 The old initializing insn will be deleted as a
7609 dead store by flow.c. */
7610 if (initial_value == const0_rtx
7611 && GET_CODE (comparison_value) == CONST_INT)
7613 start_value = GEN_INT (comparison_val - add_adjust);
7614 emit_insn_before (gen_move_insn (reg, start_value),
7617 else if (GET_CODE (initial_value) == CONST_INT)
7619 rtx offset = GEN_INT (-INTVAL (initial_value) - add_adjust);
7620 enum machine_mode mode = GET_MODE (reg);
7621 enum insn_code icode
7622 = add_optab->handlers[(int) mode].insn_code;
7624 if (! (*insn_data[icode].operand[0].predicate) (reg, mode)
7625 || ! ((*insn_data[icode].operand[1].predicate)
7626 (comparison_value, mode))
7627 || ! ((*insn_data[icode].operand[2].predicate)
7631 = gen_rtx_PLUS (mode, comparison_value, offset);
7632 emit_insn_before ((GEN_FCN (icode)
7633 (reg, comparison_value, offset)),
7635 if (GET_CODE (comparison) == LE)
7636 final_value = gen_rtx_PLUS (mode, comparison_value,
7639 else if (! add_adjust)
7641 enum machine_mode mode = GET_MODE (reg);
7642 enum insn_code icode
7643 = sub_optab->handlers[(int) mode].insn_code;
7644 if (! (*insn_data[icode].operand[0].predicate) (reg, mode)
7645 || ! ((*insn_data[icode].operand[1].predicate)
7646 (comparison_value, mode))
7647 || ! ((*insn_data[icode].operand[2].predicate)
7648 (initial_value, mode)))
7651 = gen_rtx_MINUS (mode, comparison_value, initial_value);
7652 emit_insn_before ((GEN_FCN (icode)
7653 (reg, comparison_value, initial_value)),
7657 /* We could handle the other cases too, but it'll be
7658 better to have a testcase first. */
7661 /* We may not have a single insn which can increment a reg, so
7662 create a sequence to hold all the insns from expand_inc. */
7664 expand_inc (reg, new_add_val);
7665 tem = gen_sequence ();
7668 p = emit_insn_before (tem, bl->biv->insn);
7669 delete_insn (bl->biv->insn);
7671 /* Update biv info to reflect its new status. */
7673 bl->initial_value = start_value;
7674 bl->biv->add_val = new_add_val;
7676 /* Update loop info. */
7677 loop_info->initial_value = reg;
7678 loop_info->initial_equiv_value = reg;
7679 loop_info->final_value = const0_rtx;
7680 loop_info->final_equiv_value = const0_rtx;
7681 loop_info->comparison_value = const0_rtx;
7682 loop_info->comparison_code = cmp_code;
7683 loop_info->increment = new_add_val;
7685 /* Inc LABEL_NUSES so that delete_insn will
7686 not delete the label. */
7687 LABEL_NUSES (XEXP (jump_label, 0))++;
7689 /* Emit an insn after the end of the loop to set the biv's
7690 proper exit value if it is used anywhere outside the loop. */
7691 if ((REGNO_LAST_UID (bl->regno) != INSN_UID (first_compare))
7693 || REGNO_FIRST_UID (bl->regno) != INSN_UID (bl->init_insn))
7694 emit_insn_after (gen_move_insn (reg, final_value),
7697 /* Delete compare/branch at end of loop. */
7698 delete_insn (PREV_INSN (loop_end));
7699 if (compare_and_branch == 2)
7700 delete_insn (first_compare);
7702 /* Add new compare/branch insn at end of loop. */
7704 emit_cmp_and_jump_insns (reg, const0_rtx, cmp_code, NULL_RTX,
7705 GET_MODE (reg), 0, 0,
7706 XEXP (jump_label, 0));
7707 tem = gen_sequence ();
7709 emit_jump_insn_before (tem, loop_end);
7711 for (tem = PREV_INSN (loop_end);
7712 tem && GET_CODE (tem) != JUMP_INSN;
7713 tem = PREV_INSN (tem))
7717 JUMP_LABEL (tem) = XEXP (jump_label, 0);
7723 /* Increment of LABEL_NUSES done above. */
7724 /* Register is now always nonnegative,
7725 so add REG_NONNEG note to the branch. */
7726 REG_NOTES (tem) = gen_rtx_EXPR_LIST (REG_NONNEG, reg,
7732 /* No insn may reference both the reversed and another biv or it
7733 will fail (see comment near the top of the loop reversal
7735 Earlier on, we have verified that the biv has no use except
7736 counting, or it is the only biv in this function.
7737 However, the code that computes no_use_except_counting does
7738 not verify reg notes. It's possible to have an insn that
7739 references another biv, and has a REG_EQUAL note with an
7740 expression based on the reversed biv. To avoid this case,
7741 remove all REG_EQUAL notes based on the reversed biv
7743 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
7747 rtx set = single_set (p);
7748 /* If this is a set of a GIV based on the reversed biv, any
7749 REG_EQUAL notes should still be correct. */
7751 || GET_CODE (SET_DEST (set)) != REG
7752 || (size_t) REGNO (SET_DEST (set)) >= ivs->n_regs
7753 || REG_IV_TYPE (ivs, REGNO (SET_DEST (set))) != GENERAL_INDUCT
7754 || REG_IV_INFO (ivs, REGNO (SET_DEST (set)))->src_reg != bl->biv->src_reg)
7755 for (pnote = ®_NOTES (p); *pnote;)
7757 if (REG_NOTE_KIND (*pnote) == REG_EQUAL
7758 && reg_mentioned_p (regno_reg_rtx[bl->regno],
7760 *pnote = XEXP (*pnote, 1);
7762 pnote = &XEXP (*pnote, 1);
7766 /* Mark that this biv has been reversed. Each giv which depends
7767 on this biv, and which is also live past the end of the loop
7768 will have to be fixed up. */
7772 if (loop_dump_stream)
7774 fprintf (loop_dump_stream, "Reversed loop");
7776 fprintf (loop_dump_stream, " and added reg_nonneg\n");
7778 fprintf (loop_dump_stream, "\n");
7789 /* Verify whether the biv BL appears to be eliminable,
7790 based on the insns in the loop that refer to it.
7792 If ELIMINATE_P is non-zero, actually do the elimination.
7794 THRESHOLD and INSN_COUNT are from loop_optimize and are used to
7795 determine whether invariant insns should be placed inside or at the
7796 start of the loop. */
7799 maybe_eliminate_biv (loop, bl, eliminate_p, threshold, insn_count)
7800 const struct loop *loop;
7801 struct iv_class *bl;
7803 int threshold, insn_count;
7805 struct loop_ivs *ivs = LOOP_IVS (loop);
7806 rtx reg = bl->biv->dest_reg;
7807 rtx loop_start = loop->start;
7808 rtx loop_end = loop->end;
7811 /* Scan all insns in the loop, stopping if we find one that uses the
7812 biv in a way that we cannot eliminate. */
7814 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
7816 enum rtx_code code = GET_CODE (p);
7817 rtx where = threshold >= insn_count ? loop_start : p;
7819 /* If this is a libcall that sets a giv, skip ahead to its end. */
7820 if (GET_RTX_CLASS (code) == 'i')
7822 rtx note = find_reg_note (p, REG_LIBCALL, NULL_RTX);
7826 rtx last = XEXP (note, 0);
7827 rtx set = single_set (last);
7829 if (set && GET_CODE (SET_DEST (set)) == REG)
7831 unsigned int regno = REGNO (SET_DEST (set));
7833 if (regno < ivs->n_regs
7834 && REG_IV_TYPE (ivs, regno) == GENERAL_INDUCT
7835 && REG_IV_INFO (ivs, regno)->src_reg == bl->biv->src_reg)
7840 if ((code == INSN || code == JUMP_INSN || code == CALL_INSN)
7841 && reg_mentioned_p (reg, PATTERN (p))
7842 && ! maybe_eliminate_biv_1 (loop, PATTERN (p), p, bl,
7843 eliminate_p, where))
7845 if (loop_dump_stream)
7846 fprintf (loop_dump_stream,
7847 "Cannot eliminate biv %d: biv used in insn %d.\n",
7848 bl->regno, INSN_UID (p));
7855 if (loop_dump_stream)
7856 fprintf (loop_dump_stream, "biv %d %s eliminated.\n",
7857 bl->regno, eliminate_p ? "was" : "can be");
7864 /* INSN and REFERENCE are instructions in the same insn chain.
7865 Return non-zero if INSN is first. */
7868 loop_insn_first_p (insn, reference)
7869 rtx insn, reference;
7873 for (p = insn, q = reference;;)
7875 /* Start with test for not first so that INSN == REFERENCE yields not
7877 if (q == insn || ! p)
7879 if (p == reference || ! q)
7882 /* Either of P or Q might be a NOTE. Notes have the same LUID as the
7883 previous insn, hence the <= comparison below does not work if
7885 if (INSN_UID (p) < max_uid_for_loop
7886 && INSN_UID (q) < max_uid_for_loop
7887 && GET_CODE (p) != NOTE)
7888 return INSN_LUID (p) <= INSN_LUID (q);
7890 if (INSN_UID (p) >= max_uid_for_loop
7891 || GET_CODE (p) == NOTE)
7893 if (INSN_UID (q) >= max_uid_for_loop)
7898 /* We are trying to eliminate BIV in INSN using GIV. Return non-zero if
7899 the offset that we have to take into account due to auto-increment /
7900 div derivation is zero. */
7902 biv_elimination_giv_has_0_offset (biv, giv, insn)
7903 struct induction *biv, *giv;
7906 /* If the giv V had the auto-inc address optimization applied
7907 to it, and INSN occurs between the giv insn and the biv
7908 insn, then we'd have to adjust the value used here.
7909 This is rare, so we don't bother to make this possible. */
7910 if (giv->auto_inc_opt
7911 && ((loop_insn_first_p (giv->insn, insn)
7912 && loop_insn_first_p (insn, biv->insn))
7913 || (loop_insn_first_p (biv->insn, insn)
7914 && loop_insn_first_p (insn, giv->insn))))
7920 /* If BL appears in X (part of the pattern of INSN), see if we can
7921 eliminate its use. If so, return 1. If not, return 0.
7923 If BIV does not appear in X, return 1.
7925 If ELIMINATE_P is non-zero, actually do the elimination. WHERE indicates
7926 where extra insns should be added. Depending on how many items have been
7927 moved out of the loop, it will either be before INSN or at the start of
7931 maybe_eliminate_biv_1 (loop, x, insn, bl, eliminate_p, where)
7932 const struct loop *loop;
7934 struct iv_class *bl;
7938 enum rtx_code code = GET_CODE (x);
7939 rtx reg = bl->biv->dest_reg;
7940 enum machine_mode mode = GET_MODE (reg);
7941 struct induction *v;
7953 /* If we haven't already been able to do something with this BIV,
7954 we can't eliminate it. */
7960 /* If this sets the BIV, it is not a problem. */
7961 if (SET_DEST (x) == reg)
7964 /* If this is an insn that defines a giv, it is also ok because
7965 it will go away when the giv is reduced. */
7966 for (v = bl->giv; v; v = v->next_iv)
7967 if (v->giv_type == DEST_REG && SET_DEST (x) == v->dest_reg)
7971 if (SET_DEST (x) == cc0_rtx && SET_SRC (x) == reg)
7973 /* Can replace with any giv that was reduced and
7974 that has (MULT_VAL != 0) and (ADD_VAL == 0).
7975 Require a constant for MULT_VAL, so we know it's nonzero.
7976 ??? We disable this optimization to avoid potential
7979 for (v = bl->giv; v; v = v->next_iv)
7980 if (GET_CODE (v->mult_val) == CONST_INT && v->mult_val != const0_rtx
7981 && v->add_val == const0_rtx
7982 && ! v->ignore && ! v->maybe_dead && v->always_computable
7986 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
7992 /* If the giv has the opposite direction of change,
7993 then reverse the comparison. */
7994 if (INTVAL (v->mult_val) < 0)
7995 new = gen_rtx_COMPARE (GET_MODE (v->new_reg),
7996 const0_rtx, v->new_reg);
8000 /* We can probably test that giv's reduced reg. */
8001 if (validate_change (insn, &SET_SRC (x), new, 0))
8005 /* Look for a giv with (MULT_VAL != 0) and (ADD_VAL != 0);
8006 replace test insn with a compare insn (cmp REDUCED_GIV ADD_VAL).
8007 Require a constant for MULT_VAL, so we know it's nonzero.
8008 ??? Do this only if ADD_VAL is a pointer to avoid a potential
8009 overflow problem. */
8011 for (v = bl->giv; v; v = v->next_iv)
8012 if (GET_CODE (v->mult_val) == CONST_INT
8013 && v->mult_val != const0_rtx
8014 && ! v->ignore && ! v->maybe_dead && v->always_computable
8016 && (GET_CODE (v->add_val) == SYMBOL_REF
8017 || GET_CODE (v->add_val) == LABEL_REF
8018 || GET_CODE (v->add_val) == CONST
8019 || (GET_CODE (v->add_val) == REG
8020 && REG_POINTER (v->add_val))))
8022 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8028 /* If the giv has the opposite direction of change,
8029 then reverse the comparison. */
8030 if (INTVAL (v->mult_val) < 0)
8031 new = gen_rtx_COMPARE (VOIDmode, copy_rtx (v->add_val),
8034 new = gen_rtx_COMPARE (VOIDmode, v->new_reg,
8035 copy_rtx (v->add_val));
8037 /* Replace biv with the giv's reduced register. */
8038 update_reg_last_use (v->add_val, insn);
8039 if (validate_change (insn, &SET_SRC (PATTERN (insn)), new, 0))
8042 /* Insn doesn't support that constant or invariant. Copy it
8043 into a register (it will be a loop invariant.) */
8044 tem = gen_reg_rtx (GET_MODE (v->new_reg));
8046 emit_insn_before (gen_move_insn (tem, copy_rtx (v->add_val)),
8049 /* Substitute the new register for its invariant value in
8050 the compare expression. */
8051 XEXP (new, (INTVAL (v->mult_val) < 0) ? 0 : 1) = tem;
8052 if (validate_change (insn, &SET_SRC (PATTERN (insn)), new, 0))
8061 case GT: case GE: case GTU: case GEU:
8062 case LT: case LE: case LTU: case LEU:
8063 /* See if either argument is the biv. */
8064 if (XEXP (x, 0) == reg)
8065 arg = XEXP (x, 1), arg_operand = 1;
8066 else if (XEXP (x, 1) == reg)
8067 arg = XEXP (x, 0), arg_operand = 0;
8071 if (CONSTANT_P (arg))
8073 /* First try to replace with any giv that has constant positive
8074 mult_val and constant add_val. We might be able to support
8075 negative mult_val, but it seems complex to do it in general. */
8077 for (v = bl->giv; v; v = v->next_iv)
8078 if (GET_CODE (v->mult_val) == CONST_INT
8079 && INTVAL (v->mult_val) > 0
8080 && (GET_CODE (v->add_val) == SYMBOL_REF
8081 || GET_CODE (v->add_val) == LABEL_REF
8082 || GET_CODE (v->add_val) == CONST
8083 || (GET_CODE (v->add_val) == REG
8084 && REG_POINTER (v->add_val)))
8085 && ! v->ignore && ! v->maybe_dead && v->always_computable
8088 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8094 /* Replace biv with the giv's reduced reg. */
8095 validate_change (insn, &XEXP (x, 1 - arg_operand), v->new_reg, 1);
8097 /* If all constants are actually constant integers and
8098 the derived constant can be directly placed in the COMPARE,
8100 if (GET_CODE (arg) == CONST_INT
8101 && GET_CODE (v->mult_val) == CONST_INT
8102 && GET_CODE (v->add_val) == CONST_INT)
8104 validate_change (insn, &XEXP (x, arg_operand),
8105 GEN_INT (INTVAL (arg)
8106 * INTVAL (v->mult_val)
8107 + INTVAL (v->add_val)), 1);
8111 /* Otherwise, load it into a register. */
8112 tem = gen_reg_rtx (mode);
8113 emit_iv_add_mult (arg, v->mult_val, v->add_val, tem, where);
8114 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
8116 if (apply_change_group ())
8120 /* Look for giv with positive constant mult_val and nonconst add_val.
8121 Insert insns to calculate new compare value.
8122 ??? Turn this off due to possible overflow. */
8124 for (v = bl->giv; v; v = v->next_iv)
8125 if (GET_CODE (v->mult_val) == CONST_INT
8126 && INTVAL (v->mult_val) > 0
8127 && ! v->ignore && ! v->maybe_dead && v->always_computable
8133 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8139 tem = gen_reg_rtx (mode);
8141 /* Replace biv with giv's reduced register. */
8142 validate_change (insn, &XEXP (x, 1 - arg_operand),
8145 /* Compute value to compare against. */
8146 emit_iv_add_mult (arg, v->mult_val, v->add_val, tem, where);
8147 /* Use it in this insn. */
8148 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
8149 if (apply_change_group ())
8153 else if (GET_CODE (arg) == REG || GET_CODE (arg) == MEM)
8155 if (loop_invariant_p (loop, arg) == 1)
8157 /* Look for giv with constant positive mult_val and nonconst
8158 add_val. Insert insns to compute new compare value.
8159 ??? Turn this off due to possible overflow. */
8161 for (v = bl->giv; v; v = v->next_iv)
8162 if (GET_CODE (v->mult_val) == CONST_INT && INTVAL (v->mult_val) > 0
8163 && ! v->ignore && ! v->maybe_dead && v->always_computable
8169 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8175 tem = gen_reg_rtx (mode);
8177 /* Replace biv with giv's reduced register. */
8178 validate_change (insn, &XEXP (x, 1 - arg_operand),
8181 /* Compute value to compare against. */
8182 emit_iv_add_mult (arg, v->mult_val, v->add_val,
8184 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
8185 if (apply_change_group ())
8190 /* This code has problems. Basically, you can't know when
8191 seeing if we will eliminate BL, whether a particular giv
8192 of ARG will be reduced. If it isn't going to be reduced,
8193 we can't eliminate BL. We can try forcing it to be reduced,
8194 but that can generate poor code.
8196 The problem is that the benefit of reducing TV, below should
8197 be increased if BL can actually be eliminated, but this means
8198 we might have to do a topological sort of the order in which
8199 we try to process biv. It doesn't seem worthwhile to do
8200 this sort of thing now. */
8203 /* Otherwise the reg compared with had better be a biv. */
8204 if (GET_CODE (arg) != REG
8205 || REG_IV_TYPE (ivs, REGNO (arg)) != BASIC_INDUCT)
8208 /* Look for a pair of givs, one for each biv,
8209 with identical coefficients. */
8210 for (v = bl->giv; v; v = v->next_iv)
8212 struct induction *tv;
8214 if (v->ignore || v->maybe_dead || v->mode != mode)
8217 for (tv = REG_IV_CLASS (ivs, REGNO (arg))->giv; tv;
8219 if (! tv->ignore && ! tv->maybe_dead
8220 && rtx_equal_p (tv->mult_val, v->mult_val)
8221 && rtx_equal_p (tv->add_val, v->add_val)
8222 && tv->mode == mode)
8224 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8230 /* Replace biv with its giv's reduced reg. */
8231 XEXP (x, 1 - arg_operand) = v->new_reg;
8232 /* Replace other operand with the other giv's
8234 XEXP (x, arg_operand) = tv->new_reg;
8241 /* If we get here, the biv can't be eliminated. */
8245 /* If this address is a DEST_ADDR giv, it doesn't matter if the
8246 biv is used in it, since it will be replaced. */
8247 for (v = bl->giv; v; v = v->next_iv)
8248 if (v->giv_type == DEST_ADDR && v->location == &XEXP (x, 0))
8256 /* See if any subexpression fails elimination. */
8257 fmt = GET_RTX_FORMAT (code);
8258 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
8263 if (! maybe_eliminate_biv_1 (loop, XEXP (x, i), insn, bl,
8264 eliminate_p, where))
8269 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
8270 if (! maybe_eliminate_biv_1 (loop, XVECEXP (x, i, j), insn, bl,
8271 eliminate_p, where))
8280 /* Return nonzero if the last use of REG
8281 is in an insn following INSN in the same basic block. */
8284 last_use_this_basic_block (reg, insn)
8290 n && GET_CODE (n) != CODE_LABEL && GET_CODE (n) != JUMP_INSN;
8293 if (REGNO_LAST_UID (REGNO (reg)) == INSN_UID (n))
8299 /* Called via `note_stores' to record the initial value of a biv. Here we
8300 just record the location of the set and process it later. */
8303 record_initial (dest, set, data)
8306 void *data ATTRIBUTE_UNUSED;
8308 struct loop_ivs *ivs = (struct loop_ivs *) data;
8309 struct iv_class *bl;
8311 if (GET_CODE (dest) != REG
8312 || REGNO (dest) >= ivs->n_regs
8313 || REG_IV_TYPE (ivs, REGNO (dest)) != BASIC_INDUCT)
8316 bl = REG_IV_CLASS (ivs, REGNO (dest));
8318 /* If this is the first set found, record it. */
8319 if (bl->init_insn == 0)
8321 bl->init_insn = note_insn;
8326 /* If any of the registers in X are "old" and currently have a last use earlier
8327 than INSN, update them to have a last use of INSN. Their actual last use
8328 will be the previous insn but it will not have a valid uid_luid so we can't
8332 update_reg_last_use (x, insn)
8336 /* Check for the case where INSN does not have a valid luid. In this case,
8337 there is no need to modify the regno_last_uid, as this can only happen
8338 when code is inserted after the loop_end to set a pseudo's final value,
8339 and hence this insn will never be the last use of x. */
8340 if (GET_CODE (x) == REG && REGNO (x) < max_reg_before_loop
8341 && INSN_UID (insn) < max_uid_for_loop
8342 && REGNO_LAST_LUID (REGNO (x)) < INSN_LUID (insn))
8343 REGNO_LAST_UID (REGNO (x)) = INSN_UID (insn);
8347 register const char *fmt = GET_RTX_FORMAT (GET_CODE (x));
8348 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
8351 update_reg_last_use (XEXP (x, i), insn);
8352 else if (fmt[i] == 'E')
8353 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
8354 update_reg_last_use (XVECEXP (x, i, j), insn);
8359 /* Given an insn INSN and condition COND, return the condition in a
8360 canonical form to simplify testing by callers. Specifically:
8362 (1) The code will always be a comparison operation (EQ, NE, GT, etc.).
8363 (2) Both operands will be machine operands; (cc0) will have been replaced.
8364 (3) If an operand is a constant, it will be the second operand.
8365 (4) (LE x const) will be replaced with (LT x <const+1>) and similarly
8366 for GE, GEU, and LEU.
8368 If the condition cannot be understood, or is an inequality floating-point
8369 comparison which needs to be reversed, 0 will be returned.
8371 If REVERSE is non-zero, then reverse the condition prior to canonizing it.
8373 If EARLIEST is non-zero, it is a pointer to a place where the earliest
8374 insn used in locating the condition was found. If a replacement test
8375 of the condition is desired, it should be placed in front of that
8376 insn and we will be sure that the inputs are still valid.
8378 If WANT_REG is non-zero, we wish the condition to be relative to that
8379 register, if possible. Therefore, do not canonicalize the condition
8383 canonicalize_condition (insn, cond, reverse, earliest, want_reg)
8395 int reverse_code = 0;
8396 int did_reverse_condition = 0;
8397 enum machine_mode mode;
8399 code = GET_CODE (cond);
8400 mode = GET_MODE (cond);
8401 op0 = XEXP (cond, 0);
8402 op1 = XEXP (cond, 1);
8406 code = reverse_condition (code);
8407 did_reverse_condition ^= 1;
8413 /* If we are comparing a register with zero, see if the register is set
8414 in the previous insn to a COMPARE or a comparison operation. Perform
8415 the same tests as a function of STORE_FLAG_VALUE as find_comparison_args
8418 while (GET_RTX_CLASS (code) == '<'
8419 && op1 == CONST0_RTX (GET_MODE (op0))
8422 /* Set non-zero when we find something of interest. */
8426 /* If comparison with cc0, import actual comparison from compare
8430 if ((prev = prev_nonnote_insn (prev)) == 0
8431 || GET_CODE (prev) != INSN
8432 || (set = single_set (prev)) == 0
8433 || SET_DEST (set) != cc0_rtx)
8436 op0 = SET_SRC (set);
8437 op1 = CONST0_RTX (GET_MODE (op0));
8443 /* If this is a COMPARE, pick up the two things being compared. */
8444 if (GET_CODE (op0) == COMPARE)
8446 op1 = XEXP (op0, 1);
8447 op0 = XEXP (op0, 0);
8450 else if (GET_CODE (op0) != REG)
8453 /* Go back to the previous insn. Stop if it is not an INSN. We also
8454 stop if it isn't a single set or if it has a REG_INC note because
8455 we don't want to bother dealing with it. */
8457 if ((prev = prev_nonnote_insn (prev)) == 0
8458 || GET_CODE (prev) != INSN
8459 || FIND_REG_INC_NOTE (prev, 0)
8460 || (set = single_set (prev)) == 0)
8463 /* If this is setting OP0, get what it sets it to if it looks
8465 if (rtx_equal_p (SET_DEST (set), op0))
8467 enum machine_mode inner_mode = GET_MODE (SET_DEST (set));
8469 /* ??? We may not combine comparisons done in a CCmode with
8470 comparisons not done in a CCmode. This is to aid targets
8471 like Alpha that have an IEEE compliant EQ instruction, and
8472 a non-IEEE compliant BEQ instruction. The use of CCmode is
8473 actually artificial, simply to prevent the combination, but
8474 should not affect other platforms.
8476 However, we must allow VOIDmode comparisons to match either
8477 CCmode or non-CCmode comparison, because some ports have
8478 modeless comparisons inside branch patterns.
8480 ??? This mode check should perhaps look more like the mode check
8481 in simplify_comparison in combine. */
8483 if ((GET_CODE (SET_SRC (set)) == COMPARE
8486 && GET_MODE_CLASS (inner_mode) == MODE_INT
8487 && (GET_MODE_BITSIZE (inner_mode)
8488 <= HOST_BITS_PER_WIDE_INT)
8489 && (STORE_FLAG_VALUE
8490 & ((HOST_WIDE_INT) 1
8491 << (GET_MODE_BITSIZE (inner_mode) - 1))))
8492 #ifdef FLOAT_STORE_FLAG_VALUE
8494 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
8495 && (REAL_VALUE_NEGATIVE
8496 (FLOAT_STORE_FLAG_VALUE (inner_mode))))
8499 && GET_RTX_CLASS (GET_CODE (SET_SRC (set))) == '<'))
8500 && (((GET_MODE_CLASS (mode) == MODE_CC)
8501 == (GET_MODE_CLASS (inner_mode) == MODE_CC))
8502 || mode == VOIDmode || inner_mode == VOIDmode))
8504 else if (((code == EQ
8506 && (GET_MODE_BITSIZE (inner_mode)
8507 <= HOST_BITS_PER_WIDE_INT)
8508 && GET_MODE_CLASS (inner_mode) == MODE_INT
8509 && (STORE_FLAG_VALUE
8510 & ((HOST_WIDE_INT) 1
8511 << (GET_MODE_BITSIZE (inner_mode) - 1))))
8512 #ifdef FLOAT_STORE_FLAG_VALUE
8514 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
8515 && (REAL_VALUE_NEGATIVE
8516 (FLOAT_STORE_FLAG_VALUE (inner_mode))))
8519 && GET_RTX_CLASS (GET_CODE (SET_SRC (set))) == '<'
8520 && (((GET_MODE_CLASS (mode) == MODE_CC)
8521 == (GET_MODE_CLASS (inner_mode) == MODE_CC))
8522 || mode == VOIDmode || inner_mode == VOIDmode))
8525 /* We might have reversed a LT to get a GE here. But this wasn't
8526 actually the comparison of data, so we don't flag that we
8527 have had to reverse the condition. */
8528 did_reverse_condition ^= 1;
8536 else if (reg_set_p (op0, prev))
8537 /* If this sets OP0, but not directly, we have to give up. */
8542 if (GET_RTX_CLASS (GET_CODE (x)) == '<')
8543 code = GET_CODE (x);
8546 code = reverse_condition (code);
8547 if (code == UNKNOWN)
8549 did_reverse_condition ^= 1;
8553 op0 = XEXP (x, 0), op1 = XEXP (x, 1);
8559 /* If constant is first, put it last. */
8560 if (CONSTANT_P (op0))
8561 code = swap_condition (code), tem = op0, op0 = op1, op1 = tem;
8563 /* If OP0 is the result of a comparison, we weren't able to find what
8564 was really being compared, so fail. */
8565 if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_CC)
8568 /* Canonicalize any ordered comparison with integers involving equality
8569 if we can do computations in the relevant mode and we do not
8572 if (GET_CODE (op1) == CONST_INT
8573 && GET_MODE (op0) != VOIDmode
8574 && GET_MODE_BITSIZE (GET_MODE (op0)) <= HOST_BITS_PER_WIDE_INT)
8576 HOST_WIDE_INT const_val = INTVAL (op1);
8577 unsigned HOST_WIDE_INT uconst_val = const_val;
8578 unsigned HOST_WIDE_INT max_val
8579 = (unsigned HOST_WIDE_INT) GET_MODE_MASK (GET_MODE (op0));
8584 if ((unsigned HOST_WIDE_INT) const_val != max_val >> 1)
8585 code = LT, op1 = GEN_INT (const_val + 1);
8588 /* When cross-compiling, const_val might be sign-extended from
8589 BITS_PER_WORD to HOST_BITS_PER_WIDE_INT */
8591 if ((HOST_WIDE_INT) (const_val & max_val)
8592 != (((HOST_WIDE_INT) 1
8593 << (GET_MODE_BITSIZE (GET_MODE (op0)) - 1))))
8594 code = GT, op1 = GEN_INT (const_val - 1);
8598 if (uconst_val < max_val)
8599 code = LTU, op1 = GEN_INT (uconst_val + 1);
8603 if (uconst_val != 0)
8604 code = GTU, op1 = GEN_INT (uconst_val - 1);
8612 /* If this was floating-point and we reversed anything other than an
8613 EQ or NE or (UN)ORDERED, return zero. */
8614 if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT
8615 && did_reverse_condition
8616 && code != NE && code != EQ && code != UNORDERED && code != ORDERED
8618 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_FLOAT)
8622 /* Never return CC0; return zero instead. */
8627 return gen_rtx_fmt_ee (code, VOIDmode, op0, op1);
8630 /* Given a jump insn JUMP, return the condition that will cause it to branch
8631 to its JUMP_LABEL. If the condition cannot be understood, or is an
8632 inequality floating-point comparison which needs to be reversed, 0 will
8635 If EARLIEST is non-zero, it is a pointer to a place where the earliest
8636 insn used in locating the condition was found. If a replacement test
8637 of the condition is desired, it should be placed in front of that
8638 insn and we will be sure that the inputs are still valid. */
8641 get_condition (jump, earliest)
8649 /* If this is not a standard conditional jump, we can't parse it. */
8650 if (GET_CODE (jump) != JUMP_INSN
8651 || ! any_condjump_p (jump))
8653 set = pc_set (jump);
8655 cond = XEXP (SET_SRC (set), 0);
8657 /* If this branches to JUMP_LABEL when the condition is false, reverse
8660 = GET_CODE (XEXP (SET_SRC (set), 2)) == LABEL_REF
8661 && XEXP (XEXP (SET_SRC (set), 2), 0) == JUMP_LABEL (jump);
8663 return canonicalize_condition (jump, cond, reverse, earliest, NULL_RTX);
8666 /* Similar to above routine, except that we also put an invariant last
8667 unless both operands are invariants. */
8670 get_condition_for_loop (loop, x)
8671 const struct loop *loop;
8674 rtx comparison = get_condition (x, NULL_PTR);
8677 || ! loop_invariant_p (loop, XEXP (comparison, 0))
8678 || loop_invariant_p (loop, XEXP (comparison, 1)))
8681 return gen_rtx_fmt_ee (swap_condition (GET_CODE (comparison)), VOIDmode,
8682 XEXP (comparison, 1), XEXP (comparison, 0));
8685 /* Scan the function and determine whether it has indirect (computed) jumps.
8687 This is taken mostly from flow.c; similar code exists elsewhere
8688 in the compiler. It may be useful to put this into rtlanal.c. */
8690 indirect_jump_in_function_p (start)
8695 for (insn = start; insn; insn = NEXT_INSN (insn))
8696 if (computed_jump_p (insn))
8702 /* Add MEM to the LOOP_MEMS array, if appropriate. See the
8703 documentation for LOOP_MEMS for the definition of `appropriate'.
8704 This function is called from prescan_loop via for_each_rtx. */
8707 insert_loop_mem (mem, data)
8709 void *data ATTRIBUTE_UNUSED;
8711 struct loop_info *loop_info = data;
8718 switch (GET_CODE (m))
8724 /* We're not interested in MEMs that are only clobbered. */
8728 /* We're not interested in the MEM associated with a
8729 CONST_DOUBLE, so there's no need to traverse into this. */
8733 /* We're not interested in any MEMs that only appear in notes. */
8737 /* This is not a MEM. */
8741 /* See if we've already seen this MEM. */
8742 for (i = 0; i < loop_info->mems_idx; ++i)
8743 if (rtx_equal_p (m, loop_info->mems[i].mem))
8745 if (GET_MODE (m) != GET_MODE (loop_info->mems[i].mem))
8746 /* The modes of the two memory accesses are different. If
8747 this happens, something tricky is going on, and we just
8748 don't optimize accesses to this MEM. */
8749 loop_info->mems[i].optimize = 0;
8754 /* Resize the array, if necessary. */
8755 if (loop_info->mems_idx == loop_info->mems_allocated)
8757 if (loop_info->mems_allocated != 0)
8758 loop_info->mems_allocated *= 2;
8760 loop_info->mems_allocated = 32;
8762 loop_info->mems = (loop_mem_info *)
8763 xrealloc (loop_info->mems,
8764 loop_info->mems_allocated * sizeof (loop_mem_info));
8767 /* Actually insert the MEM. */
8768 loop_info->mems[loop_info->mems_idx].mem = m;
8769 /* We can't hoist this MEM out of the loop if it's a BLKmode MEM
8770 because we can't put it in a register. We still store it in the
8771 table, though, so that if we see the same address later, but in a
8772 non-BLK mode, we'll not think we can optimize it at that point. */
8773 loop_info->mems[loop_info->mems_idx].optimize = (GET_MODE (m) != BLKmode);
8774 loop_info->mems[loop_info->mems_idx].reg = NULL_RTX;
8775 ++loop_info->mems_idx;
8780 /* Like load_mems, but also ensures that REGS->array[I].SET_IN_LOOP,
8781 REGS->array[I].MAY_NOT_OPTIMIZE, REGS->array[I].SINGLE_USAGE, and
8782 INSN_COUNT have the correct values after load_mems. */
8785 load_mems_and_recount_loop_regs_set (loop, insn_count)
8786 const struct loop *loop;
8789 struct loop_regs *regs = LOOP_REGS (loop);
8793 /* Recalculate regs->array since load_mems may have created new
8795 if (max_reg_num () > regs->num)
8800 old_nregs = regs->num;
8801 regs->num = max_reg_num ();
8803 if (regs->num >= regs->size)
8805 regs->size = regs->num;
8807 /* Grow the array. */
8808 regs->array = (struct loop_reg *)
8809 xrealloc (regs->array, regs->size * sizeof (*regs->array));
8812 for (i = 0; i < regs->num; i++)
8814 regs->array[i].set_in_loop = 0;
8815 regs->array[i].may_not_optimize = 0;
8816 regs->array[i].single_usage = NULL_RTX;
8819 count_loop_regs_set (loop, insn_count);
8821 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
8823 regs->array[i].may_not_optimize = 1;
8824 regs->array[i].set_in_loop = 1;
8827 #ifdef AVOID_CCMODE_COPIES
8828 /* Don't try to move insns which set CC registers if we should not
8829 create CCmode register copies. */
8830 for (i = regs->num - 1; i >= FIRST_PSEUDO_REGISTER; i--)
8831 if (GET_MODE_CLASS (GET_MODE (regno_reg_rtx[i])) == MODE_CC)
8832 regs->array[i].may_not_optimize = 1;
8835 /* Set regs->array[I].n_times_set for the new registers. */
8836 for (i = old_nregs; i < regs->num; i++)
8837 regs->array[i].n_times_set = regs->array[i].set_in_loop;
8841 /* Move MEMs into registers for the duration of the loop. */
8845 const struct loop *loop;
8847 struct loop_info *loop_info = LOOP_INFO (loop);
8848 struct loop_regs *regs = LOOP_REGS (loop);
8849 int maybe_never = 0;
8852 rtx label = NULL_RTX;
8854 /* Nonzero if the next instruction may never be executed. */
8855 int next_maybe_never = 0;
8856 int last_max_reg = max_reg_num ();
8858 if (loop_info->mems_idx == 0)
8861 /* We cannot use next_label here because it skips over normal insns. */
8862 end_label = next_nonnote_insn (loop->end);
8863 if (end_label && GET_CODE (end_label) != CODE_LABEL)
8864 end_label = NULL_RTX;
8866 /* Check to see if it's possible that some instructions in the loop are
8867 never executed. Also check if there is a goto out of the loop other
8868 than right after the end of the loop. */
8869 for (p = next_insn_in_loop (loop, loop->scan_start);
8870 p != NULL_RTX && ! maybe_never;
8871 p = next_insn_in_loop (loop, p))
8873 if (GET_CODE (p) == CODE_LABEL)
8875 else if (GET_CODE (p) == JUMP_INSN
8876 /* If we enter the loop in the middle, and scan
8877 around to the beginning, don't set maybe_never
8878 for that. This must be an unconditional jump,
8879 otherwise the code at the top of the loop might
8880 never be executed. Unconditional jumps are
8881 followed a by barrier then loop end. */
8882 && ! (GET_CODE (p) == JUMP_INSN
8883 && JUMP_LABEL (p) == loop->top
8884 && NEXT_INSN (NEXT_INSN (p)) == loop->end
8885 && any_uncondjump_p (p)))
8887 /* If this is a jump outside of the loop but not right
8888 after the end of the loop, we would have to emit new fixup
8889 sequences for each such label. */
8890 if (JUMP_LABEL (p) != end_label
8891 && (INSN_UID (JUMP_LABEL (p)) >= max_uid_for_loop
8892 || INSN_LUID (JUMP_LABEL (p)) < INSN_LUID (loop->start)
8893 || INSN_LUID (JUMP_LABEL (p)) > INSN_LUID (loop->end)))
8896 if (!any_condjump_p (p))
8897 /* Something complicated. */
8900 /* If there are any more instructions in the loop, they
8901 might not be reached. */
8902 next_maybe_never = 1;
8904 else if (next_maybe_never)
8908 /* Find start of the extended basic block that enters the loop. */
8909 for (p = loop->start;
8910 PREV_INSN (p) && GET_CODE (p) != CODE_LABEL;
8916 /* Build table of mems that get set to constant values before the
8918 for (; p != loop->start; p = NEXT_INSN (p))
8919 cselib_process_insn (p);
8921 /* Actually move the MEMs. */
8922 for (i = 0; i < loop_info->mems_idx; ++i)
8924 regset_head load_copies;
8925 regset_head store_copies;
8928 rtx mem = loop_info->mems[i].mem;
8931 if (MEM_VOLATILE_P (mem)
8932 || loop_invariant_p (loop, XEXP (mem, 0)) != 1)
8933 /* There's no telling whether or not MEM is modified. */
8934 loop_info->mems[i].optimize = 0;
8936 /* Go through the MEMs written to in the loop to see if this
8937 one is aliased by one of them. */
8938 mem_list_entry = loop_info->store_mems;
8939 while (mem_list_entry)
8941 if (rtx_equal_p (mem, XEXP (mem_list_entry, 0)))
8943 else if (true_dependence (XEXP (mem_list_entry, 0), VOIDmode,
8946 /* MEM is indeed aliased by this store. */
8947 loop_info->mems[i].optimize = 0;
8950 mem_list_entry = XEXP (mem_list_entry, 1);
8953 if (flag_float_store && written
8954 && GET_MODE_CLASS (GET_MODE (mem)) == MODE_FLOAT)
8955 loop_info->mems[i].optimize = 0;
8957 /* If this MEM is written to, we must be sure that there
8958 are no reads from another MEM that aliases this one. */
8959 if (loop_info->mems[i].optimize && written)
8963 for (j = 0; j < loop_info->mems_idx; ++j)
8967 else if (true_dependence (mem,
8969 loop_info->mems[j].mem,
8972 /* It's not safe to hoist loop_info->mems[i] out of
8973 the loop because writes to it might not be
8974 seen by reads from loop_info->mems[j]. */
8975 loop_info->mems[i].optimize = 0;
8981 if (maybe_never && may_trap_p (mem))
8982 /* We can't access the MEM outside the loop; it might
8983 cause a trap that wouldn't have happened otherwise. */
8984 loop_info->mems[i].optimize = 0;
8986 if (!loop_info->mems[i].optimize)
8987 /* We thought we were going to lift this MEM out of the
8988 loop, but later discovered that we could not. */
8991 INIT_REG_SET (&load_copies);
8992 INIT_REG_SET (&store_copies);
8994 /* Allocate a pseudo for this MEM. We set REG_USERVAR_P in
8995 order to keep scan_loop from moving stores to this MEM
8996 out of the loop just because this REG is neither a
8997 user-variable nor used in the loop test. */
8998 reg = gen_reg_rtx (GET_MODE (mem));
8999 REG_USERVAR_P (reg) = 1;
9000 loop_info->mems[i].reg = reg;
9002 /* Now, replace all references to the MEM with the
9003 corresponding pesudos. */
9005 for (p = next_insn_in_loop (loop, loop->scan_start);
9007 p = next_insn_in_loop (loop, p))
9013 set = single_set (p);
9015 /* See if this copies the mem into a register that isn't
9016 modified afterwards. We'll try to do copy propagation
9017 a little further on. */
9019 /* @@@ This test is _way_ too conservative. */
9021 && GET_CODE (SET_DEST (set)) == REG
9022 && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER
9023 && REGNO (SET_DEST (set)) < last_max_reg
9024 && regs->array[REGNO (SET_DEST (set))].n_times_set == 1
9025 && rtx_equal_p (SET_SRC (set), mem))
9026 SET_REGNO_REG_SET (&load_copies, REGNO (SET_DEST (set)));
9028 /* See if this copies the mem from a register that isn't
9029 modified afterwards. We'll try to remove the
9030 redundant copy later on by doing a little register
9031 renaming and copy propagation. This will help
9032 to untangle things for the BIV detection code. */
9035 && GET_CODE (SET_SRC (set)) == REG
9036 && REGNO (SET_SRC (set)) >= FIRST_PSEUDO_REGISTER
9037 && REGNO (SET_SRC (set)) < last_max_reg
9038 && regs->array[REGNO (SET_SRC (set))].n_times_set == 1
9039 && rtx_equal_p (SET_DEST (set), mem))
9040 SET_REGNO_REG_SET (&store_copies, REGNO (SET_SRC (set)));
9042 /* Replace the memory reference with the shadow register. */
9043 replace_loop_mems (p, loop_info->mems[i].mem,
9044 loop_info->mems[i].reg);
9047 if (GET_CODE (p) == CODE_LABEL
9048 || GET_CODE (p) == JUMP_INSN)
9052 if (! apply_change_group ())
9053 /* We couldn't replace all occurrences of the MEM. */
9054 loop_info->mems[i].optimize = 0;
9057 /* Load the memory immediately before LOOP->START, which is
9058 the NOTE_LOOP_BEG. */
9059 cselib_val *e = cselib_lookup (mem, VOIDmode, 0);
9063 struct elt_loc_list *const_equiv = 0;
9067 struct elt_loc_list *equiv;
9068 struct elt_loc_list *best_equiv = 0;
9069 for (equiv = e->locs; equiv; equiv = equiv->next)
9071 if (CONSTANT_P (equiv->loc))
9072 const_equiv = equiv;
9073 else if (GET_CODE (equiv->loc) == REG
9074 /* Extending hard register lifetimes cuases crash
9075 on SRC targets. Doing so on non-SRC is
9076 probably also not good idea, since we most
9077 probably have pseudoregister equivalence as
9079 && REGNO (equiv->loc) >= FIRST_PSEUDO_REGISTER)
9082 /* Use the constant equivalence if that is cheap enough. */
9084 best_equiv = const_equiv;
9085 else if (const_equiv
9086 && (rtx_cost (const_equiv->loc, SET)
9087 <= rtx_cost (best_equiv->loc, SET)))
9089 best_equiv = const_equiv;
9093 /* If best_equiv is nonzero, we know that MEM is set to a
9094 constant or register before the loop. We will use this
9095 knowledge to initialize the shadow register with that
9096 constant or reg rather than by loading from MEM. */
9098 best = copy_rtx (best_equiv->loc);
9100 set = gen_move_insn (reg, best);
9101 set = emit_insn_before (set, loop->start);
9103 REG_NOTES (set) = gen_rtx_EXPR_LIST (REG_EQUAL,
9104 copy_rtx (const_equiv->loc),
9109 if (label == NULL_RTX)
9111 label = gen_label_rtx ();
9112 emit_label_after (label, loop->end);
9115 /* Store the memory immediately after END, which is
9116 the NOTE_LOOP_END. */
9117 set = gen_move_insn (copy_rtx (mem), reg);
9118 emit_insn_after (set, label);
9121 if (loop_dump_stream)
9123 fprintf (loop_dump_stream, "Hoisted regno %d %s from ",
9124 REGNO (reg), (written ? "r/w" : "r/o"));
9125 print_rtl (loop_dump_stream, mem);
9126 fputc ('\n', loop_dump_stream);
9129 /* Attempt a bit of copy propagation. This helps untangle the
9130 data flow, and enables {basic,general}_induction_var to find
9132 EXECUTE_IF_SET_IN_REG_SET
9133 (&load_copies, FIRST_PSEUDO_REGISTER, j,
9135 try_copy_prop (loop, reg, j);
9137 CLEAR_REG_SET (&load_copies);
9139 EXECUTE_IF_SET_IN_REG_SET
9140 (&store_copies, FIRST_PSEUDO_REGISTER, j,
9142 try_swap_copy_prop (loop, reg, j);
9144 CLEAR_REG_SET (&store_copies);
9148 if (label != NULL_RTX && end_label != NULL_RTX)
9150 /* Now, we need to replace all references to the previous exit
9151 label with the new one. */
9156 for (p = loop->start; p != loop->end; p = NEXT_INSN (p))
9158 for_each_rtx (&p, replace_label, &rr);
9160 /* If this is a JUMP_INSN, then we also need to fix the JUMP_LABEL
9161 field. This is not handled by for_each_rtx because it doesn't
9162 handle unprinted ('0') fields. We need to update JUMP_LABEL
9163 because the immediately following unroll pass will use it.
9164 replace_label would not work anyways, because that only handles
9166 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p) == end_label)
9167 JUMP_LABEL (p) = label;
9174 /* For communication between note_reg_stored and its caller. */
9175 struct note_reg_stored_arg
9181 /* Called via note_stores, record in SET_SEEN whether X, which is written,
9184 note_reg_stored (x, setter, arg)
9185 rtx x, setter ATTRIBUTE_UNUSED;
9188 struct note_reg_stored_arg *t = (struct note_reg_stored_arg *) arg;
9193 /* Try to replace every occurrence of pseudo REGNO with REPLACEMENT.
9194 There must be exactly one insn that sets this pseudo; it will be
9195 deleted if all replacements succeed and we can prove that the register
9196 is not used after the loop. */
9199 try_copy_prop (loop, replacement, regno)
9200 const struct loop *loop;
9204 /* This is the reg that we are copying from. */
9205 rtx reg_rtx = regno_reg_rtx[regno];
9208 /* These help keep track of whether we replaced all uses of the reg. */
9209 int replaced_last = 0;
9210 int store_is_first = 0;
9212 for (insn = next_insn_in_loop (loop, loop->scan_start);
9214 insn = next_insn_in_loop (loop, insn))
9218 /* Only substitute within one extended basic block from the initializing
9220 if (GET_CODE (insn) == CODE_LABEL && init_insn)
9223 if (! INSN_P (insn))
9226 /* Is this the initializing insn? */
9227 set = single_set (insn);
9229 && GET_CODE (SET_DEST (set)) == REG
9230 && REGNO (SET_DEST (set)) == regno)
9236 if (REGNO_FIRST_UID (regno) == INSN_UID (insn))
9240 /* Only substitute after seeing the initializing insn. */
9241 if (init_insn && insn != init_insn)
9243 struct note_reg_stored_arg arg;
9245 replace_loop_regs (insn, reg_rtx, replacement);
9246 if (REGNO_LAST_UID (regno) == INSN_UID (insn))
9249 /* Stop replacing when REPLACEMENT is modified. */
9250 arg.reg = replacement;
9252 note_stores (PATTERN (insn), note_reg_stored, &arg);
9259 if (apply_change_group ())
9261 if (loop_dump_stream)
9262 fprintf (loop_dump_stream, " Replaced reg %d", regno);
9263 if (store_is_first && replaced_last)
9265 PUT_CODE (init_insn, NOTE);
9266 NOTE_LINE_NUMBER (init_insn) = NOTE_INSN_DELETED;
9267 if (loop_dump_stream)
9268 fprintf (loop_dump_stream, ", deleting init_insn (%d)",
9269 INSN_UID (init_insn));
9271 if (loop_dump_stream)
9272 fprintf (loop_dump_stream, ".\n");
9276 /* Try to replace occurrences of pseudo REGNO with REPLACEMENT within
9277 loop LOOP if the order of the sets of these registers can be
9278 swapped. There must be exactly one insn within the loop that sets
9279 this pseudo followed immediately by a move insn that sets
9280 REPLACEMENT with REGNO. */
9282 try_swap_copy_prop (loop, replacement, regno)
9283 const struct loop *loop;
9289 unsigned int new_regno;
9291 new_regno = REGNO (replacement);
9293 for (insn = next_insn_in_loop (loop, loop->scan_start);
9295 insn = next_insn_in_loop (loop, insn))
9297 /* Search for the insn that copies REGNO to NEW_REGNO? */
9298 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
9299 && (set = single_set (insn))
9300 && GET_CODE (SET_DEST (set)) == REG
9301 && REGNO (SET_DEST (set)) == new_regno
9302 && GET_CODE (SET_SRC (set)) == REG
9303 && REGNO (SET_SRC (set)) == regno)
9307 if (insn != NULL_RTX)
9312 /* Some DEF-USE info would come in handy here to make this
9313 function more general. For now, just check the previous insn
9314 which is the most likely candidate for setting REGNO. */
9316 prev_insn = PREV_INSN (insn);
9318 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
9319 && (prev_set = single_set (prev_insn))
9320 && GET_CODE (SET_DEST (prev_set)) == REG
9321 && REGNO (SET_DEST (prev_set)) == regno)
9324 (set (reg regno) (expr))
9325 (set (reg new_regno) (reg regno))
9327 so try converting this to:
9328 (set (reg new_regno) (expr))
9329 (set (reg regno) (reg new_regno))
9331 The former construct is often generated when a global
9332 variable used for an induction variable is shadowed by a
9333 register (NEW_REGNO). The latter construct improves the
9334 chances of GIV replacement and BIV elimination. */
9336 validate_change (prev_insn, &SET_DEST (prev_set),
9338 validate_change (insn, &SET_DEST (set),
9340 validate_change (insn, &SET_SRC (set),
9343 if (apply_change_group ())
9345 if (loop_dump_stream)
9346 fprintf (loop_dump_stream,
9347 " Swapped set of reg %d at %d with reg %d at %d.\n",
9348 regno, INSN_UID (insn),
9349 new_regno, INSN_UID (prev_insn));
9351 /* Update first use of REGNO. */
9352 if (REGNO_FIRST_UID (regno) == INSN_UID (prev_insn))
9353 REGNO_FIRST_UID (regno) = INSN_UID (insn);
9355 /* Now perform copy propagation to hopefully
9356 remove all uses of REGNO within the loop. */
9357 try_copy_prop (loop, replacement, regno);
9363 /* Replace MEM with its associated pseudo register. This function is
9364 called from load_mems via for_each_rtx. DATA is actually a pointer
9365 to a structure describing the instruction currently being scanned
9366 and the MEM we are currently replacing. */
9369 replace_loop_mem (mem, data)
9373 loop_replace_args *args = (loop_replace_args *) data;
9379 switch (GET_CODE (m))
9385 /* We're not interested in the MEM associated with a
9386 CONST_DOUBLE, so there's no need to traverse into one. */
9390 /* This is not a MEM. */
9394 if (!rtx_equal_p (args->match, m))
9395 /* This is not the MEM we are currently replacing. */
9398 /* Actually replace the MEM. */
9399 validate_change (args->insn, mem, args->replacement, 1);
9405 replace_loop_mems (insn, mem, reg)
9410 loop_replace_args args;
9414 args.replacement = reg;
9416 for_each_rtx (&insn, replace_loop_mem, &args);
9419 /* Replace one register with another. Called through for_each_rtx; PX points
9420 to the rtx being scanned. DATA is actually a pointer to
9421 a structure of arguments. */
9424 replace_loop_reg (px, data)
9429 loop_replace_args *args = (loop_replace_args *) data;
9434 if (x == args->match)
9435 validate_change (args->insn, px, args->replacement, 1);
9441 replace_loop_regs (insn, reg, replacement)
9446 loop_replace_args args;
9450 args.replacement = replacement;
9452 for_each_rtx (&insn, replace_loop_reg, &args);
9455 /* Replace occurrences of the old exit label for the loop with the new
9456 one. DATA is an rtx_pair containing the old and new labels,
9460 replace_label (x, data)
9465 rtx old_label = ((rtx_pair *) data)->r1;
9466 rtx new_label = ((rtx_pair *) data)->r2;
9471 if (GET_CODE (l) != LABEL_REF)
9474 if (XEXP (l, 0) != old_label)
9477 XEXP (l, 0) = new_label;
9478 ++LABEL_NUSES (new_label);
9479 --LABEL_NUSES (old_label);
9484 #define LOOP_BLOCK_NUM_1(INSN) \
9485 ((INSN) ? (BLOCK_FOR_INSN (INSN) ? BLOCK_NUM (INSN) : - 1) : -1)
9487 /* The notes do not have an assigned block, so look at the next insn. */
9488 #define LOOP_BLOCK_NUM(INSN) \
9489 ((INSN) ? (GET_CODE (INSN) == NOTE \
9490 ? LOOP_BLOCK_NUM_1 (next_nonnote_insn (INSN)) \
9491 : LOOP_BLOCK_NUM_1 (INSN)) \
9494 #define LOOP_INSN_UID(INSN) ((INSN) ? INSN_UID (INSN) : -1)
9497 loop_dump_aux (loop, file, verbose)
9498 const struct loop *loop;
9500 int verbose ATTRIBUTE_UNUSED;
9504 if (! loop || ! file)
9507 /* Print diagnostics to compare our concept of a loop with
9508 what the loop notes say. */
9509 if (! PREV_INSN (loop->first->head)
9510 || GET_CODE (PREV_INSN (loop->first->head)) != NOTE
9511 || NOTE_LINE_NUMBER (PREV_INSN (loop->first->head))
9512 != NOTE_INSN_LOOP_BEG)
9513 fprintf (file, ";; No NOTE_INSN_LOOP_BEG at %d\n",
9514 INSN_UID (PREV_INSN (loop->first->head)));
9515 if (! NEXT_INSN (loop->last->end)
9516 || GET_CODE (NEXT_INSN (loop->last->end)) != NOTE
9517 || NOTE_LINE_NUMBER (NEXT_INSN (loop->last->end))
9518 != NOTE_INSN_LOOP_END)
9519 fprintf (file, ";; No NOTE_INSN_LOOP_END at %d\n",
9520 INSN_UID (NEXT_INSN (loop->last->end)));
9525 ";; start %d (%d), cont dom %d (%d), cont %d (%d), vtop %d (%d), end %d (%d)\n",
9526 LOOP_BLOCK_NUM (loop->start),
9527 LOOP_INSN_UID (loop->start),
9528 LOOP_BLOCK_NUM (loop->cont),
9529 LOOP_INSN_UID (loop->cont),
9530 LOOP_BLOCK_NUM (loop->cont),
9531 LOOP_INSN_UID (loop->cont),
9532 LOOP_BLOCK_NUM (loop->vtop),
9533 LOOP_INSN_UID (loop->vtop),
9534 LOOP_BLOCK_NUM (loop->end),
9535 LOOP_INSN_UID (loop->end));
9536 fprintf (file, ";; top %d (%d), scan start %d (%d)\n",
9537 LOOP_BLOCK_NUM (loop->top),
9538 LOOP_INSN_UID (loop->top),
9539 LOOP_BLOCK_NUM (loop->scan_start),
9540 LOOP_INSN_UID (loop->scan_start));
9541 fprintf (file, ";; exit_count %d", loop->exit_count);
9542 if (loop->exit_count)
9544 fputs (", labels:", file);
9545 for (label = loop->exit_labels; label; label = LABEL_NEXTREF (label))
9547 fprintf (file, " %d ",
9548 LOOP_INSN_UID (XEXP (label, 0)));
9553 /* This can happen when a marked loop appears as two nested loops,
9554 say from while (a || b) {}. The inner loop won't match
9555 the loop markers but the outer one will. */
9556 if (LOOP_BLOCK_NUM (loop->cont) != loop->latch->index)
9557 fprintf (file, ";; NOTE_INSN_LOOP_CONT not in loop latch\n");
9561 /* Call this function from the debugger to dump LOOP. */
9565 const struct loop *loop;
9567 flow_loop_dump (loop, stderr, loop_dump_aux, 1);
9570 /* Call this function from the debugger to dump LOOPS. */
9574 const struct loops *loops;
9576 flow_loops_dump (loops, stderr, loop_dump_aux, 1);