1 /* Perform various loop optimizations, including strength reduction.
2 Copyright (C) 1987, 88, 89, 91-98, 1999 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* This is the loop optimization pass of the compiler.
23 It finds invariant computations within loops and moves them
24 to the beginning of the loop. Then it identifies basic and
25 general induction variables. Strength reduction is applied to the general
26 induction variables, and induction variable elimination is applied to
27 the basic induction variables.
29 It also finds cases where
30 a register is set within the loop by zero-extending a narrower value
31 and changes these to zero the entire register once before the loop
32 and merely copy the low part within the loop.
34 Most of the complexity is in heuristics to decide when it is worth
35 while to do these things. */
42 #include "insn-config.h"
43 #include "insn-flags.h"
45 #include "hard-reg-set.h"
53 /* Vector mapping INSN_UIDs to luids.
54 The luids are like uids but increase monotonically always.
55 We use them to see whether a jump comes from outside a given loop. */
59 /* Indexed by INSN_UID, contains the ordinal giving the (innermost) loop
60 number the insn is contained in. */
64 /* 1 + largest uid of any insn. */
68 /* 1 + luid of last insn. */
72 /* Number of loops detected in current function. Used as index to the
75 static int max_loop_num;
77 /* Indexed by loop number, contains the first and last insn of each loop. */
79 static rtx *loop_number_loop_starts, *loop_number_loop_ends;
81 /* Likewise for the continue insn */
82 static rtx *loop_number_loop_cont;
84 /* The first code_label that is reached in every loop iteration.
85 0 when not computed yet, initially const0_rtx if a jump couldn't be
87 Also set to 0 when there is no such label before the NOTE_INSN_LOOP_CONT
88 of this loop, or in verify_dominator, if a jump couldn't be followed. */
89 static rtx *loop_number_cont_dominator;
91 /* For each loop, gives the containing loop number, -1 if none. */
95 #ifdef HAVE_decrement_and_branch_on_count
96 /* Records whether resource in use by inner loop. */
98 int *loop_used_count_register;
99 #endif /* HAVE_decrement_and_branch_on_count */
101 /* Indexed by loop number, contains a nonzero value if the "loop" isn't
102 really a loop (an insn outside the loop branches into it). */
104 static char *loop_invalid;
106 /* Indexed by loop number, links together all LABEL_REFs which refer to
107 code labels outside the loop. Used by routines that need to know all
108 loop exits, such as final_biv_value and final_giv_value.
110 This does not include loop exits due to return instructions. This is
111 because all bivs and givs are pseudos, and hence must be dead after a
112 return, so the presense of a return does not affect any of the
113 optimizations that use this info. It is simpler to just not include return
114 instructions on this list. */
116 rtx *loop_number_exit_labels;
118 /* Indexed by loop number, counts the number of LABEL_REFs on
119 loop_number_exit_labels for this loop and all loops nested inside it. */
121 int *loop_number_exit_count;
123 /* Nonzero if there is a subroutine call in the current loop. */
125 static int loop_has_call;
127 /* Nonzero if there is a volatile memory reference in the current
130 static int loop_has_volatile;
132 /* Nonzero if there is a tablejump in the current loop. */
134 static int loop_has_tablejump;
136 /* Added loop_continue which is the NOTE_INSN_LOOP_CONT of the
137 current loop. A continue statement will generate a branch to
138 NEXT_INSN (loop_continue). */
140 static rtx loop_continue;
142 /* Indexed by register number, contains the number of times the reg
143 is set during the loop being scanned.
144 During code motion, a negative value indicates a reg that has been
145 made a candidate; in particular -2 means that it is an candidate that
146 we know is equal to a constant and -1 means that it is an candidate
147 not known equal to a constant.
148 After code motion, regs moved have 0 (which is accurate now)
149 while the failed candidates have the original number of times set.
151 Therefore, at all times, == 0 indicates an invariant register;
152 < 0 a conditionally invariant one. */
154 static varray_type set_in_loop;
156 /* Original value of set_in_loop; same except that this value
157 is not set negative for a reg whose sets have been made candidates
158 and not set to 0 for a reg that is moved. */
160 static varray_type n_times_set;
162 /* Index by register number, 1 indicates that the register
163 cannot be moved or strength reduced. */
165 static varray_type may_not_optimize;
167 /* Nonzero means reg N has already been moved out of one loop.
168 This reduces the desire to move it out of another. */
170 static char *moved_once;
172 /* List of MEMs that are stored in this loop. */
174 static rtx loop_store_mems;
176 /* The insn where the first of these was found. */
177 static rtx first_loop_store_insn;
179 typedef struct loop_mem_info {
180 rtx mem; /* The MEM itself. */
181 rtx reg; /* Corresponding pseudo, if any. */
182 int optimize; /* Nonzero if we can optimize access to this MEM. */
185 /* Array of MEMs that are used (read or written) in this loop, but
186 cannot be aliased by anything in this loop, except perhaps
187 themselves. In other words, if loop_mems[i] is altered during the
188 loop, it is altered by an expression that is rtx_equal_p to it. */
190 static loop_mem_info *loop_mems;
192 /* The index of the next available slot in LOOP_MEMS. */
194 static int loop_mems_idx;
196 /* The number of elements allocated in LOOP_MEMs. */
198 static int loop_mems_allocated;
200 /* Nonzero if we don't know what MEMs were changed in the current loop.
201 This happens if the loop contains a call (in which case `loop_has_call'
202 will also be set) or if we store into more than NUM_STORES MEMs. */
204 static int unknown_address_altered;
206 /* Count of movable (i.e. invariant) instructions discovered in the loop. */
207 static int num_movables;
209 /* Count of memory write instructions discovered in the loop. */
210 static int num_mem_sets;
212 /* Number of loops contained within the current one, including itself. */
213 static int loops_enclosed;
215 /* Bound on pseudo register number before loop optimization.
216 A pseudo has valid regscan info if its number is < max_reg_before_loop. */
217 int max_reg_before_loop;
219 /* This obstack is used in product_cheap_p to allocate its rtl. It
220 may call gen_reg_rtx which, in turn, may reallocate regno_reg_rtx.
221 If we used the same obstack that it did, we would be deallocating
224 static struct obstack temp_obstack;
226 /* This is where the pointer to the obstack being used for RTL is stored. */
228 extern struct obstack *rtl_obstack;
230 #define obstack_chunk_alloc xmalloc
231 #define obstack_chunk_free free
233 /* During the analysis of a loop, a chain of `struct movable's
234 is made to record all the movable insns found.
235 Then the entire chain can be scanned to decide which to move. */
239 rtx insn; /* A movable insn */
240 rtx set_src; /* The expression this reg is set from. */
241 rtx set_dest; /* The destination of this SET. */
242 rtx dependencies; /* When INSN is libcall, this is an EXPR_LIST
243 of any registers used within the LIBCALL. */
244 int consec; /* Number of consecutive following insns
245 that must be moved with this one. */
246 int regno; /* The register it sets */
247 short lifetime; /* lifetime of that register;
248 may be adjusted when matching movables
249 that load the same value are found. */
250 short savings; /* Number of insns we can move for this reg,
251 including other movables that force this
252 or match this one. */
253 unsigned int cond : 1; /* 1 if only conditionally movable */
254 unsigned int force : 1; /* 1 means MUST move this insn */
255 unsigned int global : 1; /* 1 means reg is live outside this loop */
256 /* If PARTIAL is 1, GLOBAL means something different:
257 that the reg is live outside the range from where it is set
258 to the following label. */
259 unsigned int done : 1; /* 1 inhibits further processing of this */
261 unsigned int partial : 1; /* 1 means this reg is used for zero-extending.
262 In particular, moving it does not make it
264 unsigned int move_insn : 1; /* 1 means that we call emit_move_insn to
265 load SRC, rather than copying INSN. */
266 unsigned int move_insn_first:1;/* Same as above, if this is necessary for the
267 first insn of a consecutive sets group. */
268 unsigned int is_equiv : 1; /* 1 means a REG_EQUIV is present on INSN. */
269 enum machine_mode savemode; /* Nonzero means it is a mode for a low part
270 that we should avoid changing when clearing
271 the rest of the reg. */
272 struct movable *match; /* First entry for same value */
273 struct movable *forces; /* An insn that must be moved if this is */
274 struct movable *next;
277 static struct movable *the_movables;
279 FILE *loop_dump_stream;
281 /* Forward declarations. */
283 static void verify_dominator PROTO((int));
284 static void find_and_verify_loops PROTO((rtx));
285 static void mark_loop_jump PROTO((rtx, int));
286 static void prescan_loop PROTO((rtx, rtx));
287 static int reg_in_basic_block_p PROTO((rtx, rtx));
288 static int consec_sets_invariant_p PROTO((rtx, int, rtx));
289 static rtx libcall_other_reg PROTO((rtx, rtx));
290 static int labels_in_range_p PROTO((rtx, int));
291 static void count_one_set PROTO((rtx, rtx, varray_type, rtx *));
293 static void count_loop_regs_set PROTO((rtx, rtx, varray_type, varray_type,
295 static void note_addr_stored PROTO((rtx, rtx));
296 static int loop_reg_used_before_p PROTO((rtx, rtx, rtx, rtx, rtx));
297 static void scan_loop PROTO((rtx, rtx, rtx, int, int));
299 static void replace_call_address PROTO((rtx, rtx, rtx));
301 static rtx skip_consec_insns PROTO((rtx, int));
302 static int libcall_benefit PROTO((rtx));
303 static void ignore_some_movables PROTO((struct movable *));
304 static void force_movables PROTO((struct movable *));
305 static void combine_movables PROTO((struct movable *, int));
306 static int regs_match_p PROTO((rtx, rtx, struct movable *));
307 static int rtx_equal_for_loop_p PROTO((rtx, rtx, struct movable *));
308 static void add_label_notes PROTO((rtx, rtx));
309 static void move_movables PROTO((struct movable *, int, int, rtx, rtx, int));
310 static int count_nonfixed_reads PROTO((rtx));
311 static void strength_reduce PROTO((rtx, rtx, rtx, int, rtx, rtx, rtx, int, int));
312 static void find_single_use_in_loop PROTO((rtx, rtx, varray_type));
313 static int valid_initial_value_p PROTO((rtx, rtx, int, rtx));
314 static void find_mem_givs PROTO((rtx, rtx, int, rtx, rtx));
315 static void record_biv PROTO((struct induction *, rtx, rtx, rtx, rtx, rtx *, int, int));
316 static void check_final_value PROTO((struct induction *, rtx, rtx,
317 unsigned HOST_WIDE_INT));
318 static void record_giv PROTO((struct induction *, rtx, rtx, rtx, rtx, rtx, int, enum g_types, int, rtx *, rtx, rtx));
319 static void update_giv_derive PROTO((rtx));
320 static int basic_induction_var PROTO((rtx, enum machine_mode, rtx, rtx, rtx *, rtx *, rtx **));
321 static rtx simplify_giv_expr PROTO((rtx, int *));
322 static int general_induction_var PROTO((rtx, rtx *, rtx *, rtx *, int, int *));
323 static int consec_sets_giv PROTO((int, rtx, rtx, rtx, rtx *, rtx *, rtx *));
324 static int check_dbra_loop PROTO((rtx, int, rtx, struct loop_info *));
325 static rtx express_from_1 PROTO((rtx, rtx, rtx));
326 static rtx combine_givs_p PROTO((struct induction *, struct induction *));
327 static void combine_givs PROTO((struct iv_class *));
328 struct recombine_givs_stats;
329 static int find_life_end PROTO((rtx, struct recombine_givs_stats *, rtx, rtx));
330 static void recombine_givs PROTO((struct iv_class *, rtx, rtx, int));
331 static int product_cheap_p PROTO((rtx, rtx));
332 static int maybe_eliminate_biv PROTO((struct iv_class *, rtx, rtx, int, int, int));
333 static int maybe_eliminate_biv_1 PROTO((rtx, rtx, struct iv_class *, int, rtx));
334 static int last_use_this_basic_block PROTO((rtx, rtx));
335 static void record_initial PROTO((rtx, rtx));
336 static void update_reg_last_use PROTO((rtx, rtx));
337 static rtx next_insn_in_loop PROTO((rtx, rtx, rtx, rtx));
338 static void load_mems_and_recount_loop_regs_set PROTO((rtx, rtx, rtx,
341 static void load_mems PROTO((rtx, rtx, rtx, rtx));
342 static int insert_loop_mem PROTO((rtx *, void *));
343 static int replace_loop_mem PROTO((rtx *, void *));
344 static int replace_label PROTO((rtx *, void *));
346 typedef struct rtx_and_int {
351 typedef struct rtx_pair {
356 /* Nonzero iff INSN is between START and END, inclusive. */
357 #define INSN_IN_RANGE_P(INSN, START, END) \
358 (INSN_UID (INSN) < max_uid_for_loop \
359 && INSN_LUID (INSN) >= INSN_LUID (START) \
360 && INSN_LUID (INSN) <= INSN_LUID (END))
362 #ifdef HAVE_decrement_and_branch_on_count
363 /* Test whether BCT applicable and safe. */
364 static void insert_bct PROTO((rtx, rtx, struct loop_info *));
366 /* Auxiliary function that inserts the BCT pattern into the loop. */
367 static void instrument_loop_bct PROTO((rtx, rtx, rtx));
368 #endif /* HAVE_decrement_and_branch_on_count */
370 /* Indirect_jump_in_function is computed once per function. */
371 int indirect_jump_in_function = 0;
372 static int indirect_jump_in_function_p PROTO((rtx));
374 static int compute_luids PROTO ((rtx, rtx, int));
376 /* Relative gain of eliminating various kinds of operations. */
379 static int shift_cost;
380 static int mult_cost;
383 /* Benefit penalty, if a giv is not replaceable, i.e. must emit an insn to
384 copy the value of the strength reduced giv to its original register. */
385 static int copy_cost;
387 /* Cost of using a register, to normalize the benefits of a giv. */
388 static int reg_address_cost;
394 char *free_point = (char *) oballoc (1);
395 rtx reg = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 1);
397 add_cost = rtx_cost (gen_rtx_PLUS (word_mode, reg, reg), SET);
400 reg_address_cost = ADDRESS_COST (reg);
402 reg_address_cost = rtx_cost (reg, MEM);
405 /* We multiply by 2 to reconcile the difference in scale between
406 these two ways of computing costs. Otherwise the cost of a copy
407 will be far less than the cost of an add. */
411 /* Free the objects we just allocated. */
414 /* Initialize the obstack used for rtl in product_cheap_p. */
415 gcc_obstack_init (&temp_obstack);
418 /* Compute the mapping from uids to luids.
419 LUIDs are numbers assigned to insns, like uids,
420 except that luids increase monotonically through the code.
421 Start at insn START and stop just before END. Assign LUIDs
422 starting with PREV_LUID + 1. Return the last assigned LUID + 1. */
424 compute_luids (start, end, prev_luid)
431 for (insn = start, i = prev_luid; insn != end; insn = NEXT_INSN (insn))
433 if (INSN_UID (insn) >= max_uid_for_loop)
435 /* Don't assign luids to line-number NOTEs, so that the distance in
436 luids between two insns is not affected by -g. */
437 if (GET_CODE (insn) != NOTE
438 || NOTE_LINE_NUMBER (insn) <= 0)
439 uid_luid[INSN_UID (insn)] = ++i;
441 /* Give a line number note the same luid as preceding insn. */
442 uid_luid[INSN_UID (insn)] = i;
447 /* Entry point of this file. Perform loop optimization
448 on the current function. F is the first insn of the function
449 and DUMPFILE is a stream for output of a trace of actions taken
450 (or 0 if none should be output). */
453 loop_optimize (f, dumpfile, unroll_p, bct_p)
454 /* f is the first instruction of a chain of insns for one function */
462 loop_dump_stream = dumpfile;
464 init_recog_no_volatile ();
466 max_reg_before_loop = max_reg_num ();
468 moved_once = (char *) alloca (max_reg_before_loop);
469 bzero (moved_once, max_reg_before_loop);
473 /* Count the number of loops. */
476 for (insn = f; insn; insn = NEXT_INSN (insn))
478 if (GET_CODE (insn) == NOTE
479 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
483 /* Don't waste time if no loops. */
484 if (max_loop_num == 0)
487 /* Get size to use for tables indexed by uids.
488 Leave some space for labels allocated by find_and_verify_loops. */
489 max_uid_for_loop = get_max_uid () + 1 + max_loop_num * 32;
491 uid_luid = (int *) alloca (max_uid_for_loop * sizeof (int));
492 uid_loop_num = (int *) alloca (max_uid_for_loop * sizeof (int));
494 bzero ((char *) uid_luid, max_uid_for_loop * sizeof (int));
495 bzero ((char *) uid_loop_num, max_uid_for_loop * sizeof (int));
497 /* Allocate tables for recording each loop. We set each entry, so they need
499 loop_number_loop_starts = (rtx *) alloca (max_loop_num * sizeof (rtx));
500 loop_number_loop_ends = (rtx *) alloca (max_loop_num * sizeof (rtx));
501 loop_number_loop_cont = (rtx *) alloca (max_loop_num * sizeof (rtx));
502 loop_number_cont_dominator = (rtx *) alloca (max_loop_num * sizeof (rtx));
503 loop_outer_loop = (int *) alloca (max_loop_num * sizeof (int));
504 loop_invalid = (char *) alloca (max_loop_num * sizeof (char));
505 loop_number_exit_labels = (rtx *) alloca (max_loop_num * sizeof (rtx));
506 loop_number_exit_count = (int *) alloca (max_loop_num * sizeof (int));
508 #ifdef HAVE_decrement_and_branch_on_count
509 /* Allocate for BCT optimization */
510 loop_used_count_register = (int *) alloca (max_loop_num * sizeof (int));
511 bzero ((char *) loop_used_count_register, max_loop_num * sizeof (int));
512 #endif /* HAVE_decrement_and_branch_on_count */
514 /* Find and process each loop.
515 First, find them, and record them in order of their beginnings. */
516 find_and_verify_loops (f);
518 /* Now find all register lifetimes. This must be done after
519 find_and_verify_loops, because it might reorder the insns in the
521 reg_scan (f, max_reg_num (), 1);
523 /* This must occur after reg_scan so that registers created by gcse
524 will have entries in the register tables.
526 We could have added a call to reg_scan after gcse_main in toplev.c,
527 but moving this call to init_alias_analysis is more efficient. */
528 init_alias_analysis ();
530 /* See if we went too far. Note that get_max_uid already returns
531 one more that the maximum uid of all insn. */
532 if (get_max_uid () > max_uid_for_loop)
534 /* Now reset it to the actual size we need. See above. */
535 max_uid_for_loop = get_max_uid ();
537 /* find_and_verify_loops has already called compute_luids, but it might
538 have rearranged code afterwards, so we need to recompute the luids now. */
539 max_luid = compute_luids (f, NULL_RTX, 0);
541 /* Don't leave gaps in uid_luid for insns that have been
542 deleted. It is possible that the first or last insn
543 using some register has been deleted by cross-jumping.
544 Make sure that uid_luid for that former insn's uid
545 points to the general area where that insn used to be. */
546 for (i = 0; i < max_uid_for_loop; i++)
548 uid_luid[0] = uid_luid[i];
549 if (uid_luid[0] != 0)
552 for (i = 0; i < max_uid_for_loop; i++)
553 if (uid_luid[i] == 0)
554 uid_luid[i] = uid_luid[i - 1];
556 /* Create a mapping from loops to BLOCK tree nodes. */
557 if (unroll_p && write_symbols != NO_DEBUG)
558 find_loop_tree_blocks ();
560 /* Determine if the function has indirect jump. On some systems
561 this prevents low overhead loop instructions from being used. */
562 indirect_jump_in_function = indirect_jump_in_function_p (f);
564 /* Now scan the loops, last ones first, since this means inner ones are done
565 before outer ones. */
566 for (i = max_loop_num-1; i >= 0; i--)
567 if (! loop_invalid[i] && loop_number_loop_ends[i])
568 scan_loop (loop_number_loop_starts[i], loop_number_loop_ends[i],
569 loop_number_loop_cont[i], unroll_p, bct_p);
571 /* If debugging and unrolling loops, we must replicate the tree nodes
572 corresponding to the blocks inside the loop, so that the original one
573 to one mapping will remain. */
574 if (unroll_p && write_symbols != NO_DEBUG)
575 unroll_block_trees ();
577 end_alias_analysis ();
580 /* Returns the next insn, in execution order, after INSN. START and
581 END are the NOTE_INSN_LOOP_BEG and NOTE_INSN_LOOP_END for the loop,
582 respectively. LOOP_TOP, if non-NULL, is the top of the loop in the
583 insn-stream; it is used with loops that are entered near the
587 next_insn_in_loop (insn, start, end, loop_top)
593 insn = NEXT_INSN (insn);
598 /* Go to the top of the loop, and continue there. */
612 /* Optimize one loop whose start is LOOP_START and end is END.
613 LOOP_START is the NOTE_INSN_LOOP_BEG and END is the matching
615 LOOP_CONT is the NOTE_INSN_LOOP_CONT. */
617 /* ??? Could also move memory writes out of loops if the destination address
618 is invariant, the source is invariant, the memory write is not volatile,
619 and if we can prove that no read inside the loop can read this address
620 before the write occurs. If there is a read of this address after the
621 write, then we can also mark the memory read as invariant. */
624 scan_loop (loop_start, end, loop_cont, unroll_p, bct_p)
625 rtx loop_start, end, loop_cont;
630 /* 1 if we are scanning insns that could be executed zero times. */
632 /* 1 if we are scanning insns that might never be executed
633 due to a subroutine call which might exit before they are reached. */
635 /* For a rotated loop that is entered near the bottom,
636 this is the label at the top. Otherwise it is zero. */
638 /* Jump insn that enters the loop, or 0 if control drops in. */
639 rtx loop_entry_jump = 0;
640 /* Place in the loop where control enters. */
642 /* Number of insns in the loop. */
647 /* The SET from an insn, if it is the only SET in the insn. */
649 /* Chain describing insns movable in current loop. */
650 struct movable *movables = 0;
651 /* Last element in `movables' -- so we can add elements at the end. */
652 struct movable *last_movable = 0;
653 /* Ratio of extra register life span we can justify
654 for saving an instruction. More if loop doesn't call subroutines
655 since in that case saving an insn makes more difference
656 and more registers are available. */
658 /* If we have calls, contains the insn in which a register was used
659 if it was used exactly once; contains const0_rtx if it was used more
661 varray_type reg_single_usage = 0;
662 /* Nonzero if we are scanning instructions in a sub-loop. */
666 /* Determine whether this loop starts with a jump down to a test at
667 the end. This will occur for a small number of loops with a test
668 that is too complex to duplicate in front of the loop.
670 We search for the first insn or label in the loop, skipping NOTEs.
671 However, we must be careful not to skip past a NOTE_INSN_LOOP_BEG
672 (because we might have a loop executed only once that contains a
673 loop which starts with a jump to its exit test) or a NOTE_INSN_LOOP_END
674 (in case we have a degenerate loop).
676 Note that if we mistakenly think that a loop is entered at the top
677 when, in fact, it is entered at the exit test, the only effect will be
678 slightly poorer optimization. Making the opposite error can generate
679 incorrect code. Since very few loops now start with a jump to the
680 exit test, the code here to detect that case is very conservative. */
682 for (p = NEXT_INSN (loop_start);
684 && GET_CODE (p) != CODE_LABEL && GET_RTX_CLASS (GET_CODE (p)) != 'i'
685 && (GET_CODE (p) != NOTE
686 || (NOTE_LINE_NUMBER (p) != NOTE_INSN_LOOP_BEG
687 && NOTE_LINE_NUMBER (p) != NOTE_INSN_LOOP_END));
693 /* Set up variables describing this loop. */
694 prescan_loop (loop_start, end);
695 threshold = (loop_has_call ? 1 : 2) * (1 + n_non_fixed_regs);
697 /* If loop has a jump before the first label,
698 the true entry is the target of that jump.
699 Start scan from there.
700 But record in LOOP_TOP the place where the end-test jumps
701 back to so we can scan that after the end of the loop. */
702 if (GET_CODE (p) == JUMP_INSN)
706 /* Loop entry must be unconditional jump (and not a RETURN) */
708 && JUMP_LABEL (p) != 0
709 /* Check to see whether the jump actually
710 jumps out of the loop (meaning it's no loop).
711 This case can happen for things like
712 do {..} while (0). If this label was generated previously
713 by loop, we can't tell anything about it and have to reject
715 && INSN_IN_RANGE_P (JUMP_LABEL (p), loop_start, end))
717 loop_top = next_label (scan_start);
718 scan_start = JUMP_LABEL (p);
722 /* If SCAN_START was an insn created by loop, we don't know its luid
723 as required by loop_reg_used_before_p. So skip such loops. (This
724 test may never be true, but it's best to play it safe.)
726 Also, skip loops where we do not start scanning at a label. This
727 test also rejects loops starting with a JUMP_INSN that failed the
730 if (INSN_UID (scan_start) >= max_uid_for_loop
731 || GET_CODE (scan_start) != CODE_LABEL)
733 if (loop_dump_stream)
734 fprintf (loop_dump_stream, "\nLoop from %d to %d is phony.\n\n",
735 INSN_UID (loop_start), INSN_UID (end));
739 /* Count number of times each reg is set during this loop.
740 Set VARRAY_CHAR (may_not_optimize, I) if it is not safe to move out
741 the setting of register I. If this loop has calls, set
742 VARRAY_RTX (reg_single_usage, I). */
744 /* Allocate extra space for REGS that might be created by
745 load_mems. We allocate a little extra slop as well, in the hopes
746 that even after the moving of movables creates some new registers
747 we won't have to reallocate these arrays. However, we do grow
748 the arrays, if necessary, in load_mems_recount_loop_regs_set. */
749 nregs = max_reg_num () + loop_mems_idx + 16;
750 VARRAY_INT_INIT (set_in_loop, nregs, "set_in_loop");
751 VARRAY_INT_INIT (n_times_set, nregs, "n_times_set");
752 VARRAY_CHAR_INIT (may_not_optimize, nregs, "may_not_optimize");
755 VARRAY_RTX_INIT (reg_single_usage, nregs, "reg_single_usage");
757 count_loop_regs_set (loop_top ? loop_top : loop_start, end,
758 may_not_optimize, reg_single_usage, &insn_count, nregs);
760 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
762 VARRAY_CHAR (may_not_optimize, i) = 1;
763 VARRAY_INT (set_in_loop, i) = 1;
766 #ifdef AVOID_CCMODE_COPIES
767 /* Don't try to move insns which set CC registers if we should not
768 create CCmode register copies. */
769 for (i = max_reg_num () - 1; i >= FIRST_PSEUDO_REGISTER; i--)
770 if (GET_MODE_CLASS (GET_MODE (regno_reg_rtx[i])) == MODE_CC)
771 VARRAY_CHAR (may_not_optimize, i) = 1;
774 bcopy ((char *) &set_in_loop->data,
775 (char *) &n_times_set->data, nregs * sizeof (int));
777 if (loop_dump_stream)
779 fprintf (loop_dump_stream, "\nLoop from %d to %d: %d real insns.\n",
780 INSN_UID (loop_start), INSN_UID (end), insn_count);
782 fprintf (loop_dump_stream, "Continue at insn %d.\n",
783 INSN_UID (loop_continue));
786 /* Scan through the loop finding insns that are safe to move.
787 Set set_in_loop negative for the reg being set, so that
788 this reg will be considered invariant for subsequent insns.
789 We consider whether subsequent insns use the reg
790 in deciding whether it is worth actually moving.
792 MAYBE_NEVER is nonzero if we have passed a conditional jump insn
793 and therefore it is possible that the insns we are scanning
794 would never be executed. At such times, we must make sure
795 that it is safe to execute the insn once instead of zero times.
796 When MAYBE_NEVER is 0, all insns will be executed at least once
797 so that is not a problem. */
799 for (p = next_insn_in_loop (scan_start, scan_start, end, loop_top);
801 p = next_insn_in_loop (p, scan_start, end, loop_top))
803 if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
804 && find_reg_note (p, REG_LIBCALL, NULL_RTX))
806 else if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
807 && find_reg_note (p, REG_RETVAL, NULL_RTX))
810 if (GET_CODE (p) == INSN
811 && (set = single_set (p))
812 && GET_CODE (SET_DEST (set)) == REG
813 && ! VARRAY_CHAR (may_not_optimize, REGNO (SET_DEST (set))))
818 rtx src = SET_SRC (set);
819 rtx dependencies = 0;
821 /* Figure out what to use as a source of this insn. If a REG_EQUIV
822 note is given or if a REG_EQUAL note with a constant operand is
823 specified, use it as the source and mark that we should move
824 this insn by calling emit_move_insn rather that duplicating the
827 Otherwise, only use the REG_EQUAL contents if a REG_RETVAL note
829 temp = find_reg_note (p, REG_EQUIV, NULL_RTX);
831 src = XEXP (temp, 0), move_insn = 1;
834 temp = find_reg_note (p, REG_EQUAL, NULL_RTX);
835 if (temp && CONSTANT_P (XEXP (temp, 0)))
836 src = XEXP (temp, 0), move_insn = 1;
837 if (temp && find_reg_note (p, REG_RETVAL, NULL_RTX))
839 src = XEXP (temp, 0);
840 /* A libcall block can use regs that don't appear in
841 the equivalent expression. To move the libcall,
842 we must move those regs too. */
843 dependencies = libcall_other_reg (p, src);
847 /* Don't try to optimize a register that was made
848 by loop-optimization for an inner loop.
849 We don't know its life-span, so we can't compute the benefit. */
850 if (REGNO (SET_DEST (set)) >= max_reg_before_loop)
852 else if (/* The set is not guaranteed to be executed one
853 the loop starts, or the value before the set is
854 needed before the set occurs... */
856 || loop_reg_used_before_p (set, p, loop_start,
858 /* And the register is used in basic blocks other
859 than the one where it is set (meaning that
860 something after this point in the loop might
861 depend on its value before the set). */
862 && !reg_in_basic_block_p (p, SET_DEST (set)))
863 /* It is unsafe to move the set.
865 This code used to consider it OK to move a set of a variable
866 which was not created by the user and not used in an exit test.
867 That behavior is incorrect and was removed. */
869 else if ((tem = invariant_p (src))
870 && (dependencies == 0
871 || (tem2 = invariant_p (dependencies)) != 0)
872 && (VARRAY_INT (set_in_loop,
873 REGNO (SET_DEST (set))) == 1
875 = consec_sets_invariant_p
877 VARRAY_INT (set_in_loop, REGNO (SET_DEST (set))),
879 /* If the insn can cause a trap (such as divide by zero),
880 can't move it unless it's guaranteed to be executed
881 once loop is entered. Even a function call might
882 prevent the trap insn from being reached
883 (since it might exit!) */
884 && ! ((maybe_never || call_passed)
885 && may_trap_p (src)))
887 register struct movable *m;
888 register int regno = REGNO (SET_DEST (set));
890 /* A potential lossage is where we have a case where two insns
891 can be combined as long as they are both in the loop, but
892 we move one of them outside the loop. For large loops,
893 this can lose. The most common case of this is the address
894 of a function being called.
896 Therefore, if this register is marked as being used exactly
897 once if we are in a loop with calls (a "large loop"), see if
898 we can replace the usage of this register with the source
899 of this SET. If we can, delete this insn.
901 Don't do this if P has a REG_RETVAL note or if we have
902 SMALL_REGISTER_CLASSES and SET_SRC is a hard register. */
904 if (reg_single_usage && VARRAY_RTX (reg_single_usage, regno) != 0
905 && VARRAY_RTX (reg_single_usage, regno) != const0_rtx
906 && REGNO_FIRST_UID (regno) == INSN_UID (p)
907 && (REGNO_LAST_UID (regno)
908 == INSN_UID (VARRAY_RTX (reg_single_usage, regno)))
909 && VARRAY_INT (set_in_loop, regno) == 1
910 && ! side_effects_p (SET_SRC (set))
911 && ! find_reg_note (p, REG_RETVAL, NULL_RTX)
912 && (! SMALL_REGISTER_CLASSES
913 || (! (GET_CODE (SET_SRC (set)) == REG
914 && REGNO (SET_SRC (set)) < FIRST_PSEUDO_REGISTER)))
915 /* This test is not redundant; SET_SRC (set) might be
916 a call-clobbered register and the life of REGNO
917 might span a call. */
918 && ! modified_between_p (SET_SRC (set), p,
920 (reg_single_usage, regno))
921 && no_labels_between_p (p, VARRAY_RTX (reg_single_usage, regno))
922 && validate_replace_rtx (SET_DEST (set), SET_SRC (set),
924 (reg_single_usage, regno)))
926 /* Replace any usage in a REG_EQUAL note. Must copy the
927 new source, so that we don't get rtx sharing between the
928 SET_SOURCE and REG_NOTES of insn p. */
929 REG_NOTES (VARRAY_RTX (reg_single_usage, regno))
930 = replace_rtx (REG_NOTES (VARRAY_RTX
931 (reg_single_usage, regno)),
932 SET_DEST (set), copy_rtx (SET_SRC (set)));
935 NOTE_LINE_NUMBER (p) = NOTE_INSN_DELETED;
936 NOTE_SOURCE_FILE (p) = 0;
937 VARRAY_INT (set_in_loop, regno) = 0;
941 m = (struct movable *) alloca (sizeof (struct movable));
945 m->dependencies = dependencies;
946 m->set_dest = SET_DEST (set);
948 m->consec = VARRAY_INT (set_in_loop,
949 REGNO (SET_DEST (set))) - 1;
953 m->move_insn = move_insn;
954 m->move_insn_first = 0;
955 m->is_equiv = (find_reg_note (p, REG_EQUIV, NULL_RTX) != 0);
956 m->savemode = VOIDmode;
958 /* Set M->cond if either invariant_p or consec_sets_invariant_p
959 returned 2 (only conditionally invariant). */
960 m->cond = ((tem | tem1 | tem2) > 1);
961 m->global = (uid_luid[REGNO_LAST_UID (regno)] > INSN_LUID (end)
962 || uid_luid[REGNO_FIRST_UID (regno)] < INSN_LUID (loop_start));
964 m->lifetime = (uid_luid[REGNO_LAST_UID (regno)]
965 - uid_luid[REGNO_FIRST_UID (regno)]);
966 m->savings = VARRAY_INT (n_times_set, regno);
967 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
968 m->savings += libcall_benefit (p);
969 VARRAY_INT (set_in_loop, regno) = move_insn ? -2 : -1;
970 /* Add M to the end of the chain MOVABLES. */
974 last_movable->next = m;
979 /* It is possible for the first instruction to have a
980 REG_EQUAL note but a non-invariant SET_SRC, so we must
981 remember the status of the first instruction in case
982 the last instruction doesn't have a REG_EQUAL note. */
983 m->move_insn_first = m->move_insn;
985 /* Skip this insn, not checking REG_LIBCALL notes. */
986 p = next_nonnote_insn (p);
987 /* Skip the consecutive insns, if there are any. */
988 p = skip_consec_insns (p, m->consec);
989 /* Back up to the last insn of the consecutive group. */
990 p = prev_nonnote_insn (p);
992 /* We must now reset m->move_insn, m->is_equiv, and possibly
993 m->set_src to correspond to the effects of all the
995 temp = find_reg_note (p, REG_EQUIV, NULL_RTX);
997 m->set_src = XEXP (temp, 0), m->move_insn = 1;
1000 temp = find_reg_note (p, REG_EQUAL, NULL_RTX);
1001 if (temp && CONSTANT_P (XEXP (temp, 0)))
1002 m->set_src = XEXP (temp, 0), m->move_insn = 1;
1007 m->is_equiv = (find_reg_note (p, REG_EQUIV, NULL_RTX) != 0);
1010 /* If this register is always set within a STRICT_LOW_PART
1011 or set to zero, then its high bytes are constant.
1012 So clear them outside the loop and within the loop
1013 just load the low bytes.
1014 We must check that the machine has an instruction to do so.
1015 Also, if the value loaded into the register
1016 depends on the same register, this cannot be done. */
1017 else if (SET_SRC (set) == const0_rtx
1018 && GET_CODE (NEXT_INSN (p)) == INSN
1019 && (set1 = single_set (NEXT_INSN (p)))
1020 && GET_CODE (set1) == SET
1021 && (GET_CODE (SET_DEST (set1)) == STRICT_LOW_PART)
1022 && (GET_CODE (XEXP (SET_DEST (set1), 0)) == SUBREG)
1023 && (SUBREG_REG (XEXP (SET_DEST (set1), 0))
1025 && !reg_mentioned_p (SET_DEST (set), SET_SRC (set1)))
1027 register int regno = REGNO (SET_DEST (set));
1028 if (VARRAY_INT (set_in_loop, regno) == 2)
1030 register struct movable *m;
1031 m = (struct movable *) alloca (sizeof (struct movable));
1034 m->set_dest = SET_DEST (set);
1035 m->dependencies = 0;
1041 m->move_insn_first = 0;
1043 /* If the insn may not be executed on some cycles,
1044 we can't clear the whole reg; clear just high part.
1045 Not even if the reg is used only within this loop.
1052 Clearing x before the inner loop could clobber a value
1053 being saved from the last time around the outer loop.
1054 However, if the reg is not used outside this loop
1055 and all uses of the register are in the same
1056 basic block as the store, there is no problem.
1058 If this insn was made by loop, we don't know its
1059 INSN_LUID and hence must make a conservative
1061 m->global = (INSN_UID (p) >= max_uid_for_loop
1062 || (uid_luid[REGNO_LAST_UID (regno)]
1064 || (uid_luid[REGNO_FIRST_UID (regno)]
1066 || (labels_in_range_p
1067 (p, uid_luid[REGNO_FIRST_UID (regno)])));
1068 if (maybe_never && m->global)
1069 m->savemode = GET_MODE (SET_SRC (set1));
1071 m->savemode = VOIDmode;
1075 m->lifetime = (uid_luid[REGNO_LAST_UID (regno)]
1076 - uid_luid[REGNO_FIRST_UID (regno)]);
1078 VARRAY_INT (set_in_loop, regno) = -1;
1079 /* Add M to the end of the chain MOVABLES. */
1083 last_movable->next = m;
1088 /* Past a call insn, we get to insns which might not be executed
1089 because the call might exit. This matters for insns that trap.
1090 Call insns inside a REG_LIBCALL/REG_RETVAL block always return,
1091 so they don't count. */
1092 else if (GET_CODE (p) == CALL_INSN && ! in_libcall)
1094 /* Past a label or a jump, we get to insns for which we
1095 can't count on whether or how many times they will be
1096 executed during each iteration. Therefore, we can
1097 only move out sets of trivial variables
1098 (those not used after the loop). */
1099 /* Similar code appears twice in strength_reduce. */
1100 else if ((GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN)
1101 /* If we enter the loop in the middle, and scan around to the
1102 beginning, don't set maybe_never for that. This must be an
1103 unconditional jump, otherwise the code at the top of the
1104 loop might never be executed. Unconditional jumps are
1105 followed a by barrier then loop end. */
1106 && ! (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p) == loop_top
1107 && NEXT_INSN (NEXT_INSN (p)) == end
1108 && simplejump_p (p)))
1110 else if (GET_CODE (p) == NOTE)
1112 /* At the virtual top of a converted loop, insns are again known to
1113 be executed: logically, the loop begins here even though the exit
1114 code has been duplicated. */
1115 if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP && loop_depth == 0)
1116 maybe_never = call_passed = 0;
1117 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
1119 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
1124 /* If one movable subsumes another, ignore that other. */
1126 ignore_some_movables (movables);
1128 /* For each movable insn, see if the reg that it loads
1129 leads when it dies right into another conditionally movable insn.
1130 If so, record that the second insn "forces" the first one,
1131 since the second can be moved only if the first is. */
1133 force_movables (movables);
1135 /* See if there are multiple movable insns that load the same value.
1136 If there are, make all but the first point at the first one
1137 through the `match' field, and add the priorities of them
1138 all together as the priority of the first. */
1140 combine_movables (movables, nregs);
1142 /* Now consider each movable insn to decide whether it is worth moving.
1143 Store 0 in set_in_loop for each reg that is moved.
1145 Generally this increases code size, so do not move moveables when
1146 optimizing for code size. */
1148 if (! optimize_size)
1149 move_movables (movables, threshold,
1150 insn_count, loop_start, end, nregs);
1152 /* Now candidates that still are negative are those not moved.
1153 Change set_in_loop to indicate that those are not actually invariant. */
1154 for (i = 0; i < nregs; i++)
1155 if (VARRAY_INT (set_in_loop, i) < 0)
1156 VARRAY_INT (set_in_loop, i) = VARRAY_INT (n_times_set, i);
1158 /* Now that we've moved some things out of the loop, we might be able to
1159 hoist even more memory references. There's no need to pass
1160 reg_single_usage this time, since we're done with it. */
1161 load_mems_and_recount_loop_regs_set (scan_start, end, loop_top,
1165 /* set_in_loop is still used by invariant_p, so we can't free it now. */
1166 VARRAY_FREE (reg_single_usage);
1168 if (flag_strength_reduce)
1170 the_movables = movables;
1171 strength_reduce (scan_start, end, loop_top,
1172 insn_count, loop_start, end, loop_cont, unroll_p, bct_p);
1175 VARRAY_FREE (set_in_loop);
1176 VARRAY_FREE (n_times_set);
1177 VARRAY_FREE (may_not_optimize);
1180 /* Add elements to *OUTPUT to record all the pseudo-regs
1181 mentioned in IN_THIS but not mentioned in NOT_IN_THIS. */
1184 record_excess_regs (in_this, not_in_this, output)
1185 rtx in_this, not_in_this;
1192 code = GET_CODE (in_this);
1206 if (REGNO (in_this) >= FIRST_PSEUDO_REGISTER
1207 && ! reg_mentioned_p (in_this, not_in_this))
1208 *output = gen_rtx_EXPR_LIST (VOIDmode, in_this, *output);
1215 fmt = GET_RTX_FORMAT (code);
1216 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1223 for (j = 0; j < XVECLEN (in_this, i); j++)
1224 record_excess_regs (XVECEXP (in_this, i, j), not_in_this, output);
1228 record_excess_regs (XEXP (in_this, i), not_in_this, output);
1234 /* Check what regs are referred to in the libcall block ending with INSN,
1235 aside from those mentioned in the equivalent value.
1236 If there are none, return 0.
1237 If there are one or more, return an EXPR_LIST containing all of them. */
1240 libcall_other_reg (insn, equiv)
1243 rtx note = find_reg_note (insn, REG_RETVAL, NULL_RTX);
1244 rtx p = XEXP (note, 0);
1247 /* First, find all the regs used in the libcall block
1248 that are not mentioned as inputs to the result. */
1252 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
1253 || GET_CODE (p) == CALL_INSN)
1254 record_excess_regs (PATTERN (p), equiv, &output);
1261 /* Return 1 if all uses of REG
1262 are between INSN and the end of the basic block. */
1265 reg_in_basic_block_p (insn, reg)
1268 int regno = REGNO (reg);
1271 if (REGNO_FIRST_UID (regno) != INSN_UID (insn))
1274 /* Search this basic block for the already recorded last use of the reg. */
1275 for (p = insn; p; p = NEXT_INSN (p))
1277 switch (GET_CODE (p))
1284 /* Ordinary insn: if this is the last use, we win. */
1285 if (REGNO_LAST_UID (regno) == INSN_UID (p))
1290 /* Jump insn: if this is the last use, we win. */
1291 if (REGNO_LAST_UID (regno) == INSN_UID (p))
1293 /* Otherwise, it's the end of the basic block, so we lose. */
1298 /* It's the end of the basic block, so we lose. */
1306 /* The "last use" doesn't follow the "first use"?? */
1310 /* Compute the benefit of eliminating the insns in the block whose
1311 last insn is LAST. This may be a group of insns used to compute a
1312 value directly or can contain a library call. */
1315 libcall_benefit (last)
1321 for (insn = XEXP (find_reg_note (last, REG_RETVAL, NULL_RTX), 0);
1322 insn != last; insn = NEXT_INSN (insn))
1324 if (GET_CODE (insn) == CALL_INSN)
1325 benefit += 10; /* Assume at least this many insns in a library
1327 else if (GET_CODE (insn) == INSN
1328 && GET_CODE (PATTERN (insn)) != USE
1329 && GET_CODE (PATTERN (insn)) != CLOBBER)
1336 /* Skip COUNT insns from INSN, counting library calls as 1 insn. */
1339 skip_consec_insns (insn, count)
1343 for (; count > 0; count--)
1347 /* If first insn of libcall sequence, skip to end. */
1348 /* Do this at start of loop, since INSN is guaranteed to
1350 if (GET_CODE (insn) != NOTE
1351 && (temp = find_reg_note (insn, REG_LIBCALL, NULL_RTX)))
1352 insn = XEXP (temp, 0);
1354 do insn = NEXT_INSN (insn);
1355 while (GET_CODE (insn) == NOTE);
1361 /* Ignore any movable whose insn falls within a libcall
1362 which is part of another movable.
1363 We make use of the fact that the movable for the libcall value
1364 was made later and so appears later on the chain. */
1367 ignore_some_movables (movables)
1368 struct movable *movables;
1370 register struct movable *m, *m1;
1372 for (m = movables; m; m = m->next)
1374 /* Is this a movable for the value of a libcall? */
1375 rtx note = find_reg_note (m->insn, REG_RETVAL, NULL_RTX);
1379 /* Check for earlier movables inside that range,
1380 and mark them invalid. We cannot use LUIDs here because
1381 insns created by loop.c for prior loops don't have LUIDs.
1382 Rather than reject all such insns from movables, we just
1383 explicitly check each insn in the libcall (since invariant
1384 libcalls aren't that common). */
1385 for (insn = XEXP (note, 0); insn != m->insn; insn = NEXT_INSN (insn))
1386 for (m1 = movables; m1 != m; m1 = m1->next)
1387 if (m1->insn == insn)
1393 /* For each movable insn, see if the reg that it loads
1394 leads when it dies right into another conditionally movable insn.
1395 If so, record that the second insn "forces" the first one,
1396 since the second can be moved only if the first is. */
1399 force_movables (movables)
1400 struct movable *movables;
1402 register struct movable *m, *m1;
1403 for (m1 = movables; m1; m1 = m1->next)
1404 /* Omit this if moving just the (SET (REG) 0) of a zero-extend. */
1405 if (!m1->partial && !m1->done)
1407 int regno = m1->regno;
1408 for (m = m1->next; m; m = m->next)
1409 /* ??? Could this be a bug? What if CSE caused the
1410 register of M1 to be used after this insn?
1411 Since CSE does not update regno_last_uid,
1412 this insn M->insn might not be where it dies.
1413 But very likely this doesn't matter; what matters is
1414 that M's reg is computed from M1's reg. */
1415 if (INSN_UID (m->insn) == REGNO_LAST_UID (regno)
1418 if (m != 0 && m->set_src == m1->set_dest
1419 /* If m->consec, m->set_src isn't valid. */
1423 /* Increase the priority of the moving the first insn
1424 since it permits the second to be moved as well. */
1428 m1->lifetime += m->lifetime;
1429 m1->savings += m->savings;
1434 /* Find invariant expressions that are equal and can be combined into
1438 combine_movables (movables, nregs)
1439 struct movable *movables;
1442 register struct movable *m;
1443 char *matched_regs = (char *) alloca (nregs);
1444 enum machine_mode mode;
1446 /* Regs that are set more than once are not allowed to match
1447 or be matched. I'm no longer sure why not. */
1448 /* Perhaps testing m->consec_sets would be more appropriate here? */
1450 for (m = movables; m; m = m->next)
1451 if (m->match == 0 && VARRAY_INT (n_times_set, m->regno) == 1 && !m->partial)
1453 register struct movable *m1;
1454 int regno = m->regno;
1456 bzero (matched_regs, nregs);
1457 matched_regs[regno] = 1;
1459 /* We want later insns to match the first one. Don't make the first
1460 one match any later ones. So start this loop at m->next. */
1461 for (m1 = m->next; m1; m1 = m1->next)
1462 if (m != m1 && m1->match == 0 && VARRAY_INT (n_times_set, m1->regno) == 1
1463 /* A reg used outside the loop mustn't be eliminated. */
1465 /* A reg used for zero-extending mustn't be eliminated. */
1467 && (matched_regs[m1->regno]
1470 /* Can combine regs with different modes loaded from the
1471 same constant only if the modes are the same or
1472 if both are integer modes with M wider or the same
1473 width as M1. The check for integer is redundant, but
1474 safe, since the only case of differing destination
1475 modes with equal sources is when both sources are
1476 VOIDmode, i.e., CONST_INT. */
1477 (GET_MODE (m->set_dest) == GET_MODE (m1->set_dest)
1478 || (GET_MODE_CLASS (GET_MODE (m->set_dest)) == MODE_INT
1479 && GET_MODE_CLASS (GET_MODE (m1->set_dest)) == MODE_INT
1480 && (GET_MODE_BITSIZE (GET_MODE (m->set_dest))
1481 >= GET_MODE_BITSIZE (GET_MODE (m1->set_dest)))))
1482 /* See if the source of M1 says it matches M. */
1483 && ((GET_CODE (m1->set_src) == REG
1484 && matched_regs[REGNO (m1->set_src)])
1485 || rtx_equal_for_loop_p (m->set_src, m1->set_src,
1487 && ((m->dependencies == m1->dependencies)
1488 || rtx_equal_p (m->dependencies, m1->dependencies)))
1490 m->lifetime += m1->lifetime;
1491 m->savings += m1->savings;
1494 matched_regs[m1->regno] = 1;
1498 /* Now combine the regs used for zero-extension.
1499 This can be done for those not marked `global'
1500 provided their lives don't overlap. */
1502 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
1503 mode = GET_MODE_WIDER_MODE (mode))
1505 register struct movable *m0 = 0;
1507 /* Combine all the registers for extension from mode MODE.
1508 Don't combine any that are used outside this loop. */
1509 for (m = movables; m; m = m->next)
1510 if (m->partial && ! m->global
1511 && mode == GET_MODE (SET_SRC (PATTERN (NEXT_INSN (m->insn)))))
1513 register struct movable *m1;
1514 int first = uid_luid[REGNO_FIRST_UID (m->regno)];
1515 int last = uid_luid[REGNO_LAST_UID (m->regno)];
1519 /* First one: don't check for overlap, just record it. */
1524 /* Make sure they extend to the same mode.
1525 (Almost always true.) */
1526 if (GET_MODE (m->set_dest) != GET_MODE (m0->set_dest))
1529 /* We already have one: check for overlap with those
1530 already combined together. */
1531 for (m1 = movables; m1 != m; m1 = m1->next)
1532 if (m1 == m0 || (m1->partial && m1->match == m0))
1533 if (! (uid_luid[REGNO_FIRST_UID (m1->regno)] > last
1534 || uid_luid[REGNO_LAST_UID (m1->regno)] < first))
1537 /* No overlap: we can combine this with the others. */
1538 m0->lifetime += m->lifetime;
1539 m0->savings += m->savings;
1548 /* Return 1 if regs X and Y will become the same if moved. */
1551 regs_match_p (x, y, movables)
1553 struct movable *movables;
1557 struct movable *mx, *my;
1559 for (mx = movables; mx; mx = mx->next)
1560 if (mx->regno == xn)
1563 for (my = movables; my; my = my->next)
1564 if (my->regno == yn)
1568 && ((mx->match == my->match && mx->match != 0)
1570 || mx == my->match));
1573 /* Return 1 if X and Y are identical-looking rtx's.
1574 This is the Lisp function EQUAL for rtx arguments.
1576 If two registers are matching movables or a movable register and an
1577 equivalent constant, consider them equal. */
1580 rtx_equal_for_loop_p (x, y, movables)
1582 struct movable *movables;
1586 register struct movable *m;
1587 register enum rtx_code code;
1592 if (x == 0 || y == 0)
1595 code = GET_CODE (x);
1597 /* If we have a register and a constant, they may sometimes be
1599 if (GET_CODE (x) == REG && VARRAY_INT (set_in_loop, REGNO (x)) == -2
1602 for (m = movables; m; m = m->next)
1603 if (m->move_insn && m->regno == REGNO (x)
1604 && rtx_equal_p (m->set_src, y))
1607 else if (GET_CODE (y) == REG && VARRAY_INT (set_in_loop, REGNO (y)) == -2
1610 for (m = movables; m; m = m->next)
1611 if (m->move_insn && m->regno == REGNO (y)
1612 && rtx_equal_p (m->set_src, x))
1616 /* Otherwise, rtx's of different codes cannot be equal. */
1617 if (code != GET_CODE (y))
1620 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
1621 (REG:SI x) and (REG:HI x) are NOT equivalent. */
1623 if (GET_MODE (x) != GET_MODE (y))
1626 /* These three types of rtx's can be compared nonrecursively. */
1628 return (REGNO (x) == REGNO (y) || regs_match_p (x, y, movables));
1630 if (code == LABEL_REF)
1631 return XEXP (x, 0) == XEXP (y, 0);
1632 if (code == SYMBOL_REF)
1633 return XSTR (x, 0) == XSTR (y, 0);
1635 /* Compare the elements. If any pair of corresponding elements
1636 fail to match, return 0 for the whole things. */
1638 fmt = GET_RTX_FORMAT (code);
1639 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1644 if (XWINT (x, i) != XWINT (y, i))
1649 if (XINT (x, i) != XINT (y, i))
1654 /* Two vectors must have the same length. */
1655 if (XVECLEN (x, i) != XVECLEN (y, i))
1658 /* And the corresponding elements must match. */
1659 for (j = 0; j < XVECLEN (x, i); j++)
1660 if (rtx_equal_for_loop_p (XVECEXP (x, i, j), XVECEXP (y, i, j), movables) == 0)
1665 if (rtx_equal_for_loop_p (XEXP (x, i), XEXP (y, i), movables) == 0)
1670 if (strcmp (XSTR (x, i), XSTR (y, i)))
1675 /* These are just backpointers, so they don't matter. */
1681 /* It is believed that rtx's at this level will never
1682 contain anything but integers and other rtx's,
1683 except for within LABEL_REFs and SYMBOL_REFs. */
1691 /* If X contains any LABEL_REF's, add REG_LABEL notes for them to all
1692 insns in INSNS which use thet reference. */
1695 add_label_notes (x, insns)
1699 enum rtx_code code = GET_CODE (x);
1704 if (code == LABEL_REF && !LABEL_REF_NONLOCAL_P (x))
1706 /* This code used to ignore labels that referred to dispatch tables to
1707 avoid flow generating (slighly) worse code.
1709 We no longer ignore such label references (see LABEL_REF handling in
1710 mark_jump_label for additional information). */
1711 for (insn = insns; insn; insn = NEXT_INSN (insn))
1712 if (reg_mentioned_p (XEXP (x, 0), insn))
1713 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_LABEL, XEXP (x, 0),
1717 fmt = GET_RTX_FORMAT (code);
1718 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1721 add_label_notes (XEXP (x, i), insns);
1722 else if (fmt[i] == 'E')
1723 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1724 add_label_notes (XVECEXP (x, i, j), insns);
1728 /* Scan MOVABLES, and move the insns that deserve to be moved.
1729 If two matching movables are combined, replace one reg with the
1730 other throughout. */
1733 move_movables (movables, threshold, insn_count, loop_start, end, nregs)
1734 struct movable *movables;
1742 register struct movable *m;
1744 /* Map of pseudo-register replacements to handle combining
1745 when we move several insns that load the same value
1746 into different pseudo-registers. */
1747 rtx *reg_map = (rtx *) alloca (nregs * sizeof (rtx));
1748 char *already_moved = (char *) alloca (nregs);
1750 bzero (already_moved, nregs);
1751 bzero ((char *) reg_map, nregs * sizeof (rtx));
1755 for (m = movables; m; m = m->next)
1757 /* Describe this movable insn. */
1759 if (loop_dump_stream)
1761 fprintf (loop_dump_stream, "Insn %d: regno %d (life %d), ",
1762 INSN_UID (m->insn), m->regno, m->lifetime);
1764 fprintf (loop_dump_stream, "consec %d, ", m->consec);
1766 fprintf (loop_dump_stream, "cond ");
1768 fprintf (loop_dump_stream, "force ");
1770 fprintf (loop_dump_stream, "global ");
1772 fprintf (loop_dump_stream, "done ");
1774 fprintf (loop_dump_stream, "move-insn ");
1776 fprintf (loop_dump_stream, "matches %d ",
1777 INSN_UID (m->match->insn));
1779 fprintf (loop_dump_stream, "forces %d ",
1780 INSN_UID (m->forces->insn));
1783 /* Count movables. Value used in heuristics in strength_reduce. */
1786 /* Ignore the insn if it's already done (it matched something else).
1787 Otherwise, see if it is now safe to move. */
1791 || (1 == invariant_p (m->set_src)
1792 && (m->dependencies == 0
1793 || 1 == invariant_p (m->dependencies))
1795 || 1 == consec_sets_invariant_p (m->set_dest,
1798 && (! m->forces || m->forces->done))
1802 int savings = m->savings;
1804 /* We have an insn that is safe to move.
1805 Compute its desirability. */
1810 if (loop_dump_stream)
1811 fprintf (loop_dump_stream, "savings %d ", savings);
1813 if (moved_once[regno] && loop_dump_stream)
1814 fprintf (loop_dump_stream, "halved since already moved ");
1816 /* An insn MUST be moved if we already moved something else
1817 which is safe only if this one is moved too: that is,
1818 if already_moved[REGNO] is nonzero. */
1820 /* An insn is desirable to move if the new lifetime of the
1821 register is no more than THRESHOLD times the old lifetime.
1822 If it's not desirable, it means the loop is so big
1823 that moving won't speed things up much,
1824 and it is liable to make register usage worse. */
1826 /* It is also desirable to move if it can be moved at no
1827 extra cost because something else was already moved. */
1829 if (already_moved[regno]
1830 || flag_move_all_movables
1831 || (threshold * savings * m->lifetime) >=
1832 (moved_once[regno] ? insn_count * 2 : insn_count)
1833 || (m->forces && m->forces->done
1834 && VARRAY_INT (n_times_set, m->forces->regno) == 1))
1837 register struct movable *m1;
1840 /* Now move the insns that set the reg. */
1842 if (m->partial && m->match)
1846 /* Find the end of this chain of matching regs.
1847 Thus, we load each reg in the chain from that one reg.
1848 And that reg is loaded with 0 directly,
1849 since it has ->match == 0. */
1850 for (m1 = m; m1->match; m1 = m1->match);
1851 newpat = gen_move_insn (SET_DEST (PATTERN (m->insn)),
1852 SET_DEST (PATTERN (m1->insn)));
1853 i1 = emit_insn_before (newpat, loop_start);
1855 /* Mark the moved, invariant reg as being allowed to
1856 share a hard reg with the other matching invariant. */
1857 REG_NOTES (i1) = REG_NOTES (m->insn);
1858 r1 = SET_DEST (PATTERN (m->insn));
1859 r2 = SET_DEST (PATTERN (m1->insn));
1861 = gen_rtx_EXPR_LIST (VOIDmode, r1,
1862 gen_rtx_EXPR_LIST (VOIDmode, r2,
1864 delete_insn (m->insn);
1869 if (loop_dump_stream)
1870 fprintf (loop_dump_stream, " moved to %d", INSN_UID (i1));
1872 /* If we are to re-generate the item being moved with a
1873 new move insn, first delete what we have and then emit
1874 the move insn before the loop. */
1875 else if (m->move_insn)
1879 for (count = m->consec; count >= 0; count--)
1881 /* If this is the first insn of a library call sequence,
1883 if (GET_CODE (p) != NOTE
1884 && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
1887 /* If this is the last insn of a libcall sequence, then
1888 delete every insn in the sequence except the last.
1889 The last insn is handled in the normal manner. */
1890 if (GET_CODE (p) != NOTE
1891 && (temp = find_reg_note (p, REG_RETVAL, NULL_RTX)))
1893 temp = XEXP (temp, 0);
1895 temp = delete_insn (temp);
1899 p = delete_insn (p);
1901 /* simplify_giv_expr expects that it can walk the insns
1902 at m->insn forwards and see this old sequence we are
1903 tossing here. delete_insn does preserve the next
1904 pointers, but when we skip over a NOTE we must fix
1905 it up. Otherwise that code walks into the non-deleted
1907 while (p && GET_CODE (p) == NOTE)
1908 p = NEXT_INSN (temp) = NEXT_INSN (p);
1912 emit_move_insn (m->set_dest, m->set_src);
1913 temp = get_insns ();
1916 add_label_notes (m->set_src, temp);
1918 i1 = emit_insns_before (temp, loop_start);
1919 if (! find_reg_note (i1, REG_EQUAL, NULL_RTX))
1921 = gen_rtx_EXPR_LIST (m->is_equiv ? REG_EQUIV : REG_EQUAL,
1922 m->set_src, REG_NOTES (i1));
1924 if (loop_dump_stream)
1925 fprintf (loop_dump_stream, " moved to %d", INSN_UID (i1));
1927 /* The more regs we move, the less we like moving them. */
1932 for (count = m->consec; count >= 0; count--)
1936 /* If first insn of libcall sequence, skip to end. */
1937 /* Do this at start of loop, since p is guaranteed to
1939 if (GET_CODE (p) != NOTE
1940 && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
1943 /* If last insn of libcall sequence, move all
1944 insns except the last before the loop. The last
1945 insn is handled in the normal manner. */
1946 if (GET_CODE (p) != NOTE
1947 && (temp = find_reg_note (p, REG_RETVAL, NULL_RTX)))
1951 rtx fn_address_insn = 0;
1954 for (temp = XEXP (temp, 0); temp != p;
1955 temp = NEXT_INSN (temp))
1961 if (GET_CODE (temp) == NOTE)
1964 body = PATTERN (temp);
1966 /* Find the next insn after TEMP,
1967 not counting USE or NOTE insns. */
1968 for (next = NEXT_INSN (temp); next != p;
1969 next = NEXT_INSN (next))
1970 if (! (GET_CODE (next) == INSN
1971 && GET_CODE (PATTERN (next)) == USE)
1972 && GET_CODE (next) != NOTE)
1975 /* If that is the call, this may be the insn
1976 that loads the function address.
1978 Extract the function address from the insn
1979 that loads it into a register.
1980 If this insn was cse'd, we get incorrect code.
1982 So emit a new move insn that copies the
1983 function address into the register that the
1984 call insn will use. flow.c will delete any
1985 redundant stores that we have created. */
1986 if (GET_CODE (next) == CALL_INSN
1987 && GET_CODE (body) == SET
1988 && GET_CODE (SET_DEST (body)) == REG
1989 && (n = find_reg_note (temp, REG_EQUAL,
1992 fn_reg = SET_SRC (body);
1993 if (GET_CODE (fn_reg) != REG)
1994 fn_reg = SET_DEST (body);
1995 fn_address = XEXP (n, 0);
1996 fn_address_insn = temp;
1998 /* We have the call insn.
1999 If it uses the register we suspect it might,
2000 load it with the correct address directly. */
2001 if (GET_CODE (temp) == CALL_INSN
2003 && reg_referenced_p (fn_reg, body))
2004 emit_insn_after (gen_move_insn (fn_reg,
2008 if (GET_CODE (temp) == CALL_INSN)
2010 i1 = emit_call_insn_before (body, loop_start);
2011 /* Because the USAGE information potentially
2012 contains objects other than hard registers
2013 we need to copy it. */
2014 if (CALL_INSN_FUNCTION_USAGE (temp))
2015 CALL_INSN_FUNCTION_USAGE (i1)
2016 = copy_rtx (CALL_INSN_FUNCTION_USAGE (temp));
2019 i1 = emit_insn_before (body, loop_start);
2022 if (temp == fn_address_insn)
2023 fn_address_insn = i1;
2024 REG_NOTES (i1) = REG_NOTES (temp);
2030 if (m->savemode != VOIDmode)
2032 /* P sets REG to zero; but we should clear only
2033 the bits that are not covered by the mode
2035 rtx reg = m->set_dest;
2041 (GET_MODE (reg), and_optab, reg,
2042 GEN_INT ((((HOST_WIDE_INT) 1
2043 << GET_MODE_BITSIZE (m->savemode)))
2045 reg, 1, OPTAB_LIB_WIDEN);
2049 emit_move_insn (reg, tem);
2050 sequence = gen_sequence ();
2052 i1 = emit_insn_before (sequence, loop_start);
2054 else if (GET_CODE (p) == CALL_INSN)
2056 i1 = emit_call_insn_before (PATTERN (p), loop_start);
2057 /* Because the USAGE information potentially
2058 contains objects other than hard registers
2059 we need to copy it. */
2060 if (CALL_INSN_FUNCTION_USAGE (p))
2061 CALL_INSN_FUNCTION_USAGE (i1)
2062 = copy_rtx (CALL_INSN_FUNCTION_USAGE (p));
2064 else if (count == m->consec && m->move_insn_first)
2066 /* The SET_SRC might not be invariant, so we must
2067 use the REG_EQUAL note. */
2069 emit_move_insn (m->set_dest, m->set_src);
2070 temp = get_insns ();
2073 add_label_notes (m->set_src, temp);
2075 i1 = emit_insns_before (temp, loop_start);
2076 if (! find_reg_note (i1, REG_EQUAL, NULL_RTX))
2078 = gen_rtx_EXPR_LIST ((m->is_equiv ? REG_EQUIV
2080 m->set_src, REG_NOTES (i1));
2083 i1 = emit_insn_before (PATTERN (p), loop_start);
2085 if (REG_NOTES (i1) == 0)
2087 REG_NOTES (i1) = REG_NOTES (p);
2089 /* If there is a REG_EQUAL note present whose value
2090 is not loop invariant, then delete it, since it
2091 may cause problems with later optimization passes.
2092 It is possible for cse to create such notes
2093 like this as a result of record_jump_cond. */
2095 if ((temp = find_reg_note (i1, REG_EQUAL, NULL_RTX))
2096 && ! invariant_p (XEXP (temp, 0)))
2097 remove_note (i1, temp);
2103 if (loop_dump_stream)
2104 fprintf (loop_dump_stream, " moved to %d",
2107 /* If library call, now fix the REG_NOTES that contain
2108 insn pointers, namely REG_LIBCALL on FIRST
2109 and REG_RETVAL on I1. */
2110 if ((temp = find_reg_note (i1, REG_RETVAL, NULL_RTX)))
2112 XEXP (temp, 0) = first;
2113 temp = find_reg_note (first, REG_LIBCALL, NULL_RTX);
2114 XEXP (temp, 0) = i1;
2121 /* simplify_giv_expr expects that it can walk the insns
2122 at m->insn forwards and see this old sequence we are
2123 tossing here. delete_insn does preserve the next
2124 pointers, but when we skip over a NOTE we must fix
2125 it up. Otherwise that code walks into the non-deleted
2127 while (p && GET_CODE (p) == NOTE)
2128 p = NEXT_INSN (temp) = NEXT_INSN (p);
2131 /* The more regs we move, the less we like moving them. */
2135 /* Any other movable that loads the same register
2137 already_moved[regno] = 1;
2139 /* This reg has been moved out of one loop. */
2140 moved_once[regno] = 1;
2142 /* The reg set here is now invariant. */
2144 VARRAY_INT (set_in_loop, regno) = 0;
2148 /* Change the length-of-life info for the register
2149 to say it lives at least the full length of this loop.
2150 This will help guide optimizations in outer loops. */
2152 if (uid_luid[REGNO_FIRST_UID (regno)] > INSN_LUID (loop_start))
2153 /* This is the old insn before all the moved insns.
2154 We can't use the moved insn because it is out of range
2155 in uid_luid. Only the old insns have luids. */
2156 REGNO_FIRST_UID (regno) = INSN_UID (loop_start);
2157 if (uid_luid[REGNO_LAST_UID (regno)] < INSN_LUID (end))
2158 REGNO_LAST_UID (regno) = INSN_UID (end);
2160 /* Combine with this moved insn any other matching movables. */
2163 for (m1 = movables; m1; m1 = m1->next)
2168 /* Schedule the reg loaded by M1
2169 for replacement so that shares the reg of M.
2170 If the modes differ (only possible in restricted
2171 circumstances, make a SUBREG. */
2172 if (GET_MODE (m->set_dest) == GET_MODE (m1->set_dest))
2173 reg_map[m1->regno] = m->set_dest;
2176 = gen_lowpart_common (GET_MODE (m1->set_dest),
2179 /* Get rid of the matching insn
2180 and prevent further processing of it. */
2183 /* if library call, delete all insn except last, which
2185 if ((temp = find_reg_note (m1->insn, REG_RETVAL,
2188 for (temp = XEXP (temp, 0); temp != m1->insn;
2189 temp = NEXT_INSN (temp))
2192 delete_insn (m1->insn);
2194 /* Any other movable that loads the same register
2196 already_moved[m1->regno] = 1;
2198 /* The reg merged here is now invariant,
2199 if the reg it matches is invariant. */
2201 VARRAY_INT (set_in_loop, m1->regno) = 0;
2204 else if (loop_dump_stream)
2205 fprintf (loop_dump_stream, "not desirable");
2207 else if (loop_dump_stream && !m->match)
2208 fprintf (loop_dump_stream, "not safe");
2210 if (loop_dump_stream)
2211 fprintf (loop_dump_stream, "\n");
2215 new_start = loop_start;
2217 /* Go through all the instructions in the loop, making
2218 all the register substitutions scheduled in REG_MAP. */
2219 for (p = new_start; p != end; p = NEXT_INSN (p))
2220 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
2221 || GET_CODE (p) == CALL_INSN)
2223 replace_regs (PATTERN (p), reg_map, nregs, 0);
2224 replace_regs (REG_NOTES (p), reg_map, nregs, 0);
2230 /* Scan X and replace the address of any MEM in it with ADDR.
2231 REG is the address that MEM should have before the replacement. */
2234 replace_call_address (x, reg, addr)
2237 register enum rtx_code code;
2243 code = GET_CODE (x);
2257 /* Short cut for very common case. */
2258 replace_call_address (XEXP (x, 1), reg, addr);
2262 /* Short cut for very common case. */
2263 replace_call_address (XEXP (x, 0), reg, addr);
2267 /* If this MEM uses a reg other than the one we expected,
2268 something is wrong. */
2269 if (XEXP (x, 0) != reg)
2278 fmt = GET_RTX_FORMAT (code);
2279 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2282 replace_call_address (XEXP (x, i), reg, addr);
2286 for (j = 0; j < XVECLEN (x, i); j++)
2287 replace_call_address (XVECEXP (x, i, j), reg, addr);
2293 /* Return the number of memory refs to addresses that vary
2297 count_nonfixed_reads (x)
2300 register enum rtx_code code;
2308 code = GET_CODE (x);
2322 return ((invariant_p (XEXP (x, 0)) != 1)
2323 + count_nonfixed_reads (XEXP (x, 0)));
2330 fmt = GET_RTX_FORMAT (code);
2331 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2334 value += count_nonfixed_reads (XEXP (x, i));
2338 for (j = 0; j < XVECLEN (x, i); j++)
2339 value += count_nonfixed_reads (XVECEXP (x, i, j));
2347 /* P is an instruction that sets a register to the result of a ZERO_EXTEND.
2348 Replace it with an instruction to load just the low bytes
2349 if the machine supports such an instruction,
2350 and insert above LOOP_START an instruction to clear the register. */
2353 constant_high_bytes (p, loop_start)
2357 register int insn_code_number;
2359 /* Try to change (SET (REG ...) (ZERO_EXTEND (..:B ...)))
2360 to (SET (STRICT_LOW_PART (SUBREG:B (REG...))) ...). */
2362 new = gen_rtx_SET (VOIDmode,
2363 gen_rtx_STRICT_LOW_PART (VOIDmode,
2364 gen_rtx_SUBREG (GET_MODE (XEXP (SET_SRC (PATTERN (p)), 0)),
2365 SET_DEST (PATTERN (p)),
2367 XEXP (SET_SRC (PATTERN (p)), 0));
2368 insn_code_number = recog (new, p);
2370 if (insn_code_number)
2374 /* Clear destination register before the loop. */
2375 emit_insn_before (gen_rtx_SET (VOIDmode, SET_DEST (PATTERN (p)),
2379 /* Inside the loop, just load the low part. */
2385 /* Scan a loop setting the variables `unknown_address_altered',
2386 `num_mem_sets', `loop_continue', `loops_enclosed', `loop_has_call',
2387 `loop_has_volatile', and `loop_has_tablejump'.
2388 Also, fill in the array `loop_mems' and the list `loop_store_mems'. */
2391 prescan_loop (start, end)
2394 register int level = 1;
2396 int loop_has_multiple_exit_targets = 0;
2397 /* The label after END. Jumping here is just like falling off the
2398 end of the loop. We use next_nonnote_insn instead of next_label
2399 as a hedge against the (pathological) case where some actual insn
2400 might end up between the two. */
2401 rtx exit_target = next_nonnote_insn (end);
2402 if (exit_target == NULL_RTX || GET_CODE (exit_target) != CODE_LABEL)
2403 loop_has_multiple_exit_targets = 1;
2405 unknown_address_altered = 0;
2407 loop_has_volatile = 0;
2408 loop_has_tablejump = 0;
2409 loop_store_mems = NULL_RTX;
2410 first_loop_store_insn = NULL_RTX;
2417 for (insn = NEXT_INSN (start); insn != NEXT_INSN (end);
2418 insn = NEXT_INSN (insn))
2420 if (GET_CODE (insn) == NOTE)
2422 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
2425 /* Count number of loops contained in this one. */
2428 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END)
2437 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_CONT)
2440 loop_continue = insn;
2443 else if (GET_CODE (insn) == CALL_INSN)
2445 if (! CONST_CALL_P (insn))
2446 unknown_address_altered = 1;
2449 else if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN)
2451 rtx label1 = NULL_RTX;
2452 rtx label2 = NULL_RTX;
2454 if (volatile_refs_p (PATTERN (insn)))
2455 loop_has_volatile = 1;
2457 if (GET_CODE (insn) == JUMP_INSN
2458 && (GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC
2459 || GET_CODE (PATTERN (insn)) == ADDR_VEC))
2460 loop_has_tablejump = 1;
2462 note_stores (PATTERN (insn), note_addr_stored);
2463 if (! first_loop_store_insn && loop_store_mems)
2464 first_loop_store_insn = insn;
2466 if (! loop_has_multiple_exit_targets
2467 && GET_CODE (insn) == JUMP_INSN
2468 && GET_CODE (PATTERN (insn)) == SET
2469 && SET_DEST (PATTERN (insn)) == pc_rtx)
2471 if (GET_CODE (SET_SRC (PATTERN (insn))) == IF_THEN_ELSE)
2473 label1 = XEXP (SET_SRC (PATTERN (insn)), 1);
2474 label2 = XEXP (SET_SRC (PATTERN (insn)), 2);
2478 label1 = SET_SRC (PATTERN (insn));
2482 if (label1 && label1 != pc_rtx)
2484 if (GET_CODE (label1) != LABEL_REF)
2486 /* Something tricky. */
2487 loop_has_multiple_exit_targets = 1;
2490 else if (XEXP (label1, 0) != exit_target
2491 && LABEL_OUTSIDE_LOOP_P (label1))
2493 /* A jump outside the current loop. */
2494 loop_has_multiple_exit_targets = 1;
2504 else if (GET_CODE (insn) == RETURN)
2505 loop_has_multiple_exit_targets = 1;
2508 /* Now, rescan the loop, setting up the LOOP_MEMS array. */
2509 if (/* We can't tell what MEMs are aliased by what. */
2510 !unknown_address_altered
2511 /* An exception thrown by a called function might land us
2514 /* We don't want loads for MEMs moved to a location before the
2515 one at which their stack memory becomes allocated. (Note
2516 that this is not a problem for malloc, etc., since those
2517 require actual function calls. */
2518 && !current_function_calls_alloca
2519 /* There are ways to leave the loop other than falling off the
2521 && !loop_has_multiple_exit_targets)
2522 for (insn = NEXT_INSN (start); insn != NEXT_INSN (end);
2523 insn = NEXT_INSN (insn))
2524 for_each_rtx (&insn, insert_loop_mem, 0);
2527 /* LOOP_NUMBER_CONT_DOMINATOR is now the last label between the loop start
2528 and the continue note that is a the destination of a (cond)jump after
2529 the continue note. If there is any (cond)jump between the loop start
2530 and what we have so far as LOOP_NUMBER_CONT_DOMINATOR that has a
2531 target between LOOP_DOMINATOR and the continue note, move
2532 LOOP_NUMBER_CONT_DOMINATOR forward to that label; if a jump's
2533 destination cannot be determined, clear LOOP_NUMBER_CONT_DOMINATOR. */
2536 verify_dominator (loop_number)
2541 if (! loop_number_cont_dominator[loop_number])
2542 /* This can happen for an empty loop, e.g. in
2543 gcc.c-torture/compile/920410-2.c */
2545 if (loop_number_cont_dominator[loop_number] == const0_rtx)
2547 loop_number_cont_dominator[loop_number] = 0;
2550 for (insn = loop_number_loop_starts[loop_number];
2551 insn != loop_number_cont_dominator[loop_number];
2552 insn = NEXT_INSN (insn))
2554 if (GET_CODE (insn) == JUMP_INSN
2555 && GET_CODE (PATTERN (insn)) != RETURN)
2557 rtx label = JUMP_LABEL (insn);
2558 int label_luid = INSN_LUID (label);
2560 if (! condjump_p (insn)
2561 && ! condjump_in_parallel_p (insn))
2563 loop_number_cont_dominator[loop_number] = NULL_RTX;
2566 if (label_luid < INSN_LUID (loop_number_loop_cont[loop_number])
2568 > INSN_LUID (loop_number_cont_dominator[loop_number])))
2569 loop_number_cont_dominator[loop_number] = label;
2574 /* Scan the function looking for loops. Record the start and end of each loop.
2575 Also mark as invalid loops any loops that contain a setjmp or are branched
2576 to from outside the loop. */
2579 find_and_verify_loops (f)
2583 int current_loop = -1;
2587 compute_luids (f, NULL_RTX, 0);
2589 /* If there are jumps to undefined labels,
2590 treat them as jumps out of any/all loops.
2591 This also avoids writing past end of tables when there are no loops. */
2592 uid_loop_num[0] = -1;
2594 /* Find boundaries of loops, mark which loops are contained within
2595 loops, and invalidate loops that have setjmp. */
2597 for (insn = f; insn; insn = NEXT_INSN (insn))
2599 if (GET_CODE (insn) == NOTE)
2600 switch (NOTE_LINE_NUMBER (insn))
2602 case NOTE_INSN_LOOP_BEG:
2603 loop_number_loop_starts[++next_loop] = insn;
2604 loop_number_loop_ends[next_loop] = 0;
2605 loop_number_loop_cont[next_loop] = 0;
2606 loop_number_cont_dominator[next_loop] = 0;
2607 loop_outer_loop[next_loop] = current_loop;
2608 loop_invalid[next_loop] = 0;
2609 loop_number_exit_labels[next_loop] = 0;
2610 loop_number_exit_count[next_loop] = 0;
2611 current_loop = next_loop;
2614 case NOTE_INSN_SETJMP:
2615 /* In this case, we must invalidate our current loop and any
2617 for (loop = current_loop; loop != -1; loop = loop_outer_loop[loop])
2619 loop_invalid[loop] = 1;
2620 if (loop_dump_stream)
2621 fprintf (loop_dump_stream,
2622 "\nLoop at %d ignored due to setjmp.\n",
2623 INSN_UID (loop_number_loop_starts[loop]));
2627 case NOTE_INSN_LOOP_CONT:
2628 loop_number_loop_cont[current_loop] = insn;
2630 case NOTE_INSN_LOOP_END:
2631 if (current_loop == -1)
2634 loop_number_loop_ends[current_loop] = insn;
2635 verify_dominator (current_loop);
2636 current_loop = loop_outer_loop[current_loop];
2642 /* If for any loop, this is a jump insn between the NOTE_INSN_LOOP_CONT
2643 and NOTE_INSN_LOOP_END notes, update loop_number_loop_dominator. */
2644 else if (GET_CODE (insn) == JUMP_INSN
2645 && GET_CODE (PATTERN (insn)) != RETURN
2646 && current_loop >= 0)
2649 rtx label = JUMP_LABEL (insn);
2651 if (! condjump_p (insn) && ! condjump_in_parallel_p (insn))
2654 this_loop = current_loop;
2657 /* First see if we care about this loop. */
2658 if (loop_number_loop_cont[this_loop]
2659 && loop_number_cont_dominator[this_loop] != const0_rtx)
2661 /* If the jump destination is not known, invalidate
2662 loop_number_const_dominator. */
2664 loop_number_cont_dominator[this_loop] = const0_rtx;
2666 /* Check if the destination is between loop start and
2668 if ((INSN_LUID (label)
2669 < INSN_LUID (loop_number_loop_cont[this_loop]))
2670 && (INSN_LUID (label)
2671 > INSN_LUID (loop_number_loop_starts[this_loop]))
2672 /* And if there is no later destination already
2674 && (! loop_number_cont_dominator[this_loop]
2675 || (INSN_LUID (label)
2676 > INSN_LUID (loop_number_cont_dominator
2678 loop_number_cont_dominator[this_loop] = label;
2680 this_loop = loop_outer_loop[this_loop];
2682 while (this_loop >= 0);
2685 /* Note that this will mark the NOTE_INSN_LOOP_END note as being in the
2686 enclosing loop, but this doesn't matter. */
2687 uid_loop_num[INSN_UID (insn)] = current_loop;
2690 /* Any loop containing a label used in an initializer must be invalidated,
2691 because it can be jumped into from anywhere. */
2693 for (label = forced_labels; label; label = XEXP (label, 1))
2697 for (loop_num = uid_loop_num[INSN_UID (XEXP (label, 0))];
2699 loop_num = loop_outer_loop[loop_num])
2700 loop_invalid[loop_num] = 1;
2703 /* Any loop containing a label used for an exception handler must be
2704 invalidated, because it can be jumped into from anywhere. */
2706 for (label = exception_handler_labels; label; label = XEXP (label, 1))
2710 for (loop_num = uid_loop_num[INSN_UID (XEXP (label, 0))];
2712 loop_num = loop_outer_loop[loop_num])
2713 loop_invalid[loop_num] = 1;
2716 /* Now scan all insn's in the function. If any JUMP_INSN branches into a
2717 loop that it is not contained within, that loop is marked invalid.
2718 If any INSN or CALL_INSN uses a label's address, then the loop containing
2719 that label is marked invalid, because it could be jumped into from
2722 Also look for blocks of code ending in an unconditional branch that
2723 exits the loop. If such a block is surrounded by a conditional
2724 branch around the block, move the block elsewhere (see below) and
2725 invert the jump to point to the code block. This may eliminate a
2726 label in our loop and will simplify processing by both us and a
2727 possible second cse pass. */
2729 for (insn = f; insn; insn = NEXT_INSN (insn))
2730 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
2732 int this_loop_num = uid_loop_num[INSN_UID (insn)];
2734 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
2736 rtx note = find_reg_note (insn, REG_LABEL, NULL_RTX);
2741 for (loop_num = uid_loop_num[INSN_UID (XEXP (note, 0))];
2743 loop_num = loop_outer_loop[loop_num])
2744 loop_invalid[loop_num] = 1;
2748 if (GET_CODE (insn) != JUMP_INSN)
2751 mark_loop_jump (PATTERN (insn), this_loop_num);
2753 /* See if this is an unconditional branch outside the loop. */
2754 if (this_loop_num != -1
2755 && (GET_CODE (PATTERN (insn)) == RETURN
2756 || (simplejump_p (insn)
2757 && (uid_loop_num[INSN_UID (JUMP_LABEL (insn))]
2759 && get_max_uid () < max_uid_for_loop)
2762 rtx our_next = next_real_insn (insn);
2764 int outer_loop = -1;
2766 /* Go backwards until we reach the start of the loop, a label,
2768 for (p = PREV_INSN (insn);
2769 GET_CODE (p) != CODE_LABEL
2770 && ! (GET_CODE (p) == NOTE
2771 && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
2772 && GET_CODE (p) != JUMP_INSN;
2776 /* Check for the case where we have a jump to an inner nested
2777 loop, and do not perform the optimization in that case. */
2779 if (JUMP_LABEL (insn))
2781 dest_loop = uid_loop_num[INSN_UID (JUMP_LABEL (insn))];
2782 if (dest_loop != -1)
2784 for (outer_loop = dest_loop; outer_loop != -1;
2785 outer_loop = loop_outer_loop[outer_loop])
2786 if (outer_loop == this_loop_num)
2791 /* Make sure that the target of P is within the current loop. */
2793 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p)
2794 && uid_loop_num[INSN_UID (JUMP_LABEL (p))] != this_loop_num)
2795 outer_loop = this_loop_num;
2797 /* If we stopped on a JUMP_INSN to the next insn after INSN,
2798 we have a block of code to try to move.
2800 We look backward and then forward from the target of INSN
2801 to find a BARRIER at the same loop depth as the target.
2802 If we find such a BARRIER, we make a new label for the start
2803 of the block, invert the jump in P and point it to that label,
2804 and move the block of code to the spot we found. */
2806 if (outer_loop == -1
2807 && GET_CODE (p) == JUMP_INSN
2808 && JUMP_LABEL (p) != 0
2809 /* Just ignore jumps to labels that were never emitted.
2810 These always indicate compilation errors. */
2811 && INSN_UID (JUMP_LABEL (p)) != 0
2813 && ! simplejump_p (p)
2814 && next_real_insn (JUMP_LABEL (p)) == our_next)
2817 = JUMP_LABEL (insn) ? JUMP_LABEL (insn) : get_last_insn ();
2818 int target_loop_num = uid_loop_num[INSN_UID (target)];
2821 for (loc = target; loc; loc = PREV_INSN (loc))
2822 if (GET_CODE (loc) == BARRIER
2823 && uid_loop_num[INSN_UID (loc)] == target_loop_num)
2827 for (loc = target; loc; loc = NEXT_INSN (loc))
2828 if (GET_CODE (loc) == BARRIER
2829 && uid_loop_num[INSN_UID (loc)] == target_loop_num)
2834 rtx cond_label = JUMP_LABEL (p);
2835 rtx new_label = get_label_after (p);
2837 /* Ensure our label doesn't go away. */
2838 LABEL_NUSES (cond_label)++;
2840 /* Verify that uid_loop_num is large enough and that
2842 if (invert_jump (p, new_label))
2846 /* If no suitable BARRIER was found, create a suitable
2847 one before TARGET. Since TARGET is a fall through
2848 path, we'll need to insert an jump around our block
2849 and a add a BARRIER before TARGET.
2851 This creates an extra unconditional jump outside
2852 the loop. However, the benefits of removing rarely
2853 executed instructions from inside the loop usually
2854 outweighs the cost of the extra unconditional jump
2855 outside the loop. */
2860 temp = gen_jump (JUMP_LABEL (insn));
2861 temp = emit_jump_insn_before (temp, target);
2862 JUMP_LABEL (temp) = JUMP_LABEL (insn);
2863 LABEL_NUSES (JUMP_LABEL (insn))++;
2864 loc = emit_barrier_before (target);
2867 /* Include the BARRIER after INSN and copy the
2869 new_label = squeeze_notes (new_label, NEXT_INSN (insn));
2870 reorder_insns (new_label, NEXT_INSN (insn), loc);
2872 /* All those insns are now in TARGET_LOOP_NUM. */
2873 for (q = new_label; q != NEXT_INSN (NEXT_INSN (insn));
2875 uid_loop_num[INSN_UID (q)] = target_loop_num;
2877 /* The label jumped to by INSN is no longer a loop exit.
2878 Unless INSN does not have a label (e.g., it is a
2879 RETURN insn), search loop_number_exit_labels to find
2880 its label_ref, and remove it. Also turn off
2881 LABEL_OUTSIDE_LOOP_P bit. */
2882 if (JUMP_LABEL (insn))
2887 r = loop_number_exit_labels[this_loop_num];
2888 r; q = r, r = LABEL_NEXTREF (r))
2889 if (XEXP (r, 0) == JUMP_LABEL (insn))
2891 LABEL_OUTSIDE_LOOP_P (r) = 0;
2893 LABEL_NEXTREF (q) = LABEL_NEXTREF (r);
2895 loop_number_exit_labels[this_loop_num]
2896 = LABEL_NEXTREF (r);
2900 for (loop_num = this_loop_num;
2901 loop_num != -1 && loop_num != target_loop_num;
2902 loop_num = loop_outer_loop[loop_num])
2903 loop_number_exit_count[loop_num]--;
2905 /* If we didn't find it, then something is wrong. */
2910 /* P is now a jump outside the loop, so it must be put
2911 in loop_number_exit_labels, and marked as such.
2912 The easiest way to do this is to just call
2913 mark_loop_jump again for P. */
2914 mark_loop_jump (PATTERN (p), this_loop_num);
2916 /* If INSN now jumps to the insn after it,
2918 if (JUMP_LABEL (insn) != 0
2919 && (next_real_insn (JUMP_LABEL (insn))
2920 == next_real_insn (insn)))
2924 /* Continue the loop after where the conditional
2925 branch used to jump, since the only branch insn
2926 in the block (if it still remains) is an inter-loop
2927 branch and hence needs no processing. */
2928 insn = NEXT_INSN (cond_label);
2930 if (--LABEL_NUSES (cond_label) == 0)
2931 delete_insn (cond_label);
2933 /* This loop will be continued with NEXT_INSN (insn). */
2934 insn = PREV_INSN (insn);
2941 /* If any label in X jumps to a loop different from LOOP_NUM and any of the
2942 loops it is contained in, mark the target loop invalid.
2944 For speed, we assume that X is part of a pattern of a JUMP_INSN. */
2947 mark_loop_jump (x, loop_num)
2955 switch (GET_CODE (x))
2968 /* There could be a label reference in here. */
2969 mark_loop_jump (XEXP (x, 0), loop_num);
2975 mark_loop_jump (XEXP (x, 0), loop_num);
2976 mark_loop_jump (XEXP (x, 1), loop_num);
2981 mark_loop_jump (XEXP (x, 0), loop_num);
2985 dest_loop = uid_loop_num[INSN_UID (XEXP (x, 0))];
2987 /* Link together all labels that branch outside the loop. This
2988 is used by final_[bg]iv_value and the loop unrolling code. Also
2989 mark this LABEL_REF so we know that this branch should predict
2992 /* A check to make sure the label is not in an inner nested loop,
2993 since this does not count as a loop exit. */
2994 if (dest_loop != -1)
2996 for (outer_loop = dest_loop; outer_loop != -1;
2997 outer_loop = loop_outer_loop[outer_loop])
2998 if (outer_loop == loop_num)
3004 if (loop_num != -1 && outer_loop == -1)
3006 LABEL_OUTSIDE_LOOP_P (x) = 1;
3007 LABEL_NEXTREF (x) = loop_number_exit_labels[loop_num];
3008 loop_number_exit_labels[loop_num] = x;
3010 for (outer_loop = loop_num;
3011 outer_loop != -1 && outer_loop != dest_loop;
3012 outer_loop = loop_outer_loop[outer_loop])
3013 loop_number_exit_count[outer_loop]++;
3016 /* If this is inside a loop, but not in the current loop or one enclosed
3017 by it, it invalidates at least one loop. */
3019 if (dest_loop == -1)
3022 /* We must invalidate every nested loop containing the target of this
3023 label, except those that also contain the jump insn. */
3025 for (; dest_loop != -1; dest_loop = loop_outer_loop[dest_loop])
3027 /* Stop when we reach a loop that also contains the jump insn. */
3028 for (outer_loop = loop_num; outer_loop != -1;
3029 outer_loop = loop_outer_loop[outer_loop])
3030 if (dest_loop == outer_loop)
3033 /* If we get here, we know we need to invalidate a loop. */
3034 if (loop_dump_stream && ! loop_invalid[dest_loop])
3035 fprintf (loop_dump_stream,
3036 "\nLoop at %d ignored due to multiple entry points.\n",
3037 INSN_UID (loop_number_loop_starts[dest_loop]));
3039 loop_invalid[dest_loop] = 1;
3044 /* If this is not setting pc, ignore. */
3045 if (SET_DEST (x) == pc_rtx)
3046 mark_loop_jump (SET_SRC (x), loop_num);
3050 mark_loop_jump (XEXP (x, 1), loop_num);
3051 mark_loop_jump (XEXP (x, 2), loop_num);
3056 for (i = 0; i < XVECLEN (x, 0); i++)
3057 mark_loop_jump (XVECEXP (x, 0, i), loop_num);
3061 for (i = 0; i < XVECLEN (x, 1); i++)
3062 mark_loop_jump (XVECEXP (x, 1, i), loop_num);
3066 /* Treat anything else (such as a symbol_ref)
3067 as a branch out of this loop, but not into any loop. */
3071 #ifdef HAVE_decrement_and_branch_on_count
3072 LABEL_OUTSIDE_LOOP_P (x) = 1;
3073 LABEL_NEXTREF (x) = loop_number_exit_labels[loop_num];
3074 #endif /* HAVE_decrement_and_branch_on_count */
3076 loop_number_exit_labels[loop_num] = x;
3078 for (outer_loop = loop_num; outer_loop != -1;
3079 outer_loop = loop_outer_loop[outer_loop])
3080 loop_number_exit_count[outer_loop]++;
3086 /* Return nonzero if there is a label in the range from
3087 insn INSN to and including the insn whose luid is END
3088 INSN must have an assigned luid (i.e., it must not have
3089 been previously created by loop.c). */
3092 labels_in_range_p (insn, end)
3096 while (insn && INSN_LUID (insn) <= end)
3098 if (GET_CODE (insn) == CODE_LABEL)
3100 insn = NEXT_INSN (insn);
3106 /* Record that a memory reference X is being set. */
3109 note_addr_stored (x, y)
3111 rtx y ATTRIBUTE_UNUSED;
3113 if (x == 0 || GET_CODE (x) != MEM)
3116 /* Count number of memory writes.
3117 This affects heuristics in strength_reduce. */
3120 /* BLKmode MEM means all memory is clobbered. */
3121 if (GET_MODE (x) == BLKmode)
3122 unknown_address_altered = 1;
3124 if (unknown_address_altered)
3127 loop_store_mems = gen_rtx_EXPR_LIST (VOIDmode, x, loop_store_mems);
3130 /* Return nonzero if the rtx X is invariant over the current loop.
3132 The value is 2 if we refer to something only conditionally invariant.
3134 If `unknown_address_altered' is nonzero, no memory ref is invariant.
3135 Otherwise, a memory ref is invariant if it does not conflict with
3136 anything stored in `loop_store_mems'. */
3143 register enum rtx_code code;
3145 int conditional = 0;
3150 code = GET_CODE (x);
3160 /* A LABEL_REF is normally invariant, however, if we are unrolling
3161 loops, and this label is inside the loop, then it isn't invariant.
3162 This is because each unrolled copy of the loop body will have
3163 a copy of this label. If this was invariant, then an insn loading
3164 the address of this label into a register might get moved outside
3165 the loop, and then each loop body would end up using the same label.
3167 We don't know the loop bounds here though, so just fail for all
3169 if (flag_unroll_loops)
3176 case UNSPEC_VOLATILE:
3180 /* We used to check RTX_UNCHANGING_P (x) here, but that is invalid
3181 since the reg might be set by initialization within the loop. */
3183 if ((x == frame_pointer_rtx || x == hard_frame_pointer_rtx
3184 || x == arg_pointer_rtx)
3185 && ! current_function_has_nonlocal_goto)
3189 && REGNO (x) < FIRST_PSEUDO_REGISTER && call_used_regs[REGNO (x)])
3192 if (VARRAY_INT (set_in_loop, REGNO (x)) < 0)
3195 return VARRAY_INT (set_in_loop, REGNO (x)) == 0;
3198 /* Volatile memory references must be rejected. Do this before
3199 checking for read-only items, so that volatile read-only items
3200 will be rejected also. */
3201 if (MEM_VOLATILE_P (x))
3204 /* Read-only items (such as constants in a constant pool) are
3205 invariant if their address is. */
3206 if (RTX_UNCHANGING_P (x))
3209 /* If we had a subroutine call, any location in memory could have been
3211 if (unknown_address_altered)
3214 /* See if there is any dependence between a store and this load. */
3215 mem_list_entry = loop_store_mems;
3216 while (mem_list_entry)
3218 if (true_dependence (XEXP (mem_list_entry, 0), VOIDmode,
3221 mem_list_entry = XEXP (mem_list_entry, 1);
3224 /* It's not invalidated by a store in memory
3225 but we must still verify the address is invariant. */
3229 /* Don't mess with insns declared volatile. */
3230 if (MEM_VOLATILE_P (x))
3238 fmt = GET_RTX_FORMAT (code);
3239 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3243 int tem = invariant_p (XEXP (x, i));
3249 else if (fmt[i] == 'E')
3252 for (j = 0; j < XVECLEN (x, i); j++)
3254 int tem = invariant_p (XVECEXP (x, i, j));
3264 return 1 + conditional;
3268 /* Return nonzero if all the insns in the loop that set REG
3269 are INSN and the immediately following insns,
3270 and if each of those insns sets REG in an invariant way
3271 (not counting uses of REG in them).
3273 The value is 2 if some of these insns are only conditionally invariant.
3275 We assume that INSN itself is the first set of REG
3276 and that its source is invariant. */
3279 consec_sets_invariant_p (reg, n_sets, insn)
3283 register rtx p = insn;
3284 register int regno = REGNO (reg);
3286 /* Number of sets we have to insist on finding after INSN. */
3287 int count = n_sets - 1;
3288 int old = VARRAY_INT (set_in_loop, regno);
3292 /* If N_SETS hit the limit, we can't rely on its value. */
3296 VARRAY_INT (set_in_loop, regno) = 0;
3300 register enum rtx_code code;
3304 code = GET_CODE (p);
3306 /* If library call, skip to end of it. */
3307 if (code == INSN && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
3312 && (set = single_set (p))
3313 && GET_CODE (SET_DEST (set)) == REG
3314 && REGNO (SET_DEST (set)) == regno)
3316 this = invariant_p (SET_SRC (set));
3319 else if ((temp = find_reg_note (p, REG_EQUAL, NULL_RTX)))
3321 /* If this is a libcall, then any invariant REG_EQUAL note is OK.
3322 If this is an ordinary insn, then only CONSTANT_P REG_EQUAL
3324 this = (CONSTANT_P (XEXP (temp, 0))
3325 || (find_reg_note (p, REG_RETVAL, NULL_RTX)
3326 && invariant_p (XEXP (temp, 0))));
3333 else if (code != NOTE)
3335 VARRAY_INT (set_in_loop, regno) = old;
3340 VARRAY_INT (set_in_loop, regno) = old;
3341 /* If invariant_p ever returned 2, we return 2. */
3342 return 1 + (value & 2);
3346 /* I don't think this condition is sufficient to allow INSN
3347 to be moved, so we no longer test it. */
3349 /* Return 1 if all insns in the basic block of INSN and following INSN
3350 that set REG are invariant according to TABLE. */
3353 all_sets_invariant_p (reg, insn, table)
3357 register rtx p = insn;
3358 register int regno = REGNO (reg);
3362 register enum rtx_code code;
3364 code = GET_CODE (p);
3365 if (code == CODE_LABEL || code == JUMP_INSN)
3367 if (code == INSN && GET_CODE (PATTERN (p)) == SET
3368 && GET_CODE (SET_DEST (PATTERN (p))) == REG
3369 && REGNO (SET_DEST (PATTERN (p))) == regno)
3371 if (!invariant_p (SET_SRC (PATTERN (p)), table))
3378 /* Look at all uses (not sets) of registers in X. For each, if it is
3379 the single use, set USAGE[REGNO] to INSN; if there was a previous use in
3380 a different insn, set USAGE[REGNO] to const0_rtx. */
3383 find_single_use_in_loop (insn, x, usage)
3388 enum rtx_code code = GET_CODE (x);
3389 char *fmt = GET_RTX_FORMAT (code);
3393 VARRAY_RTX (usage, REGNO (x))
3394 = (VARRAY_RTX (usage, REGNO (x)) != 0
3395 && VARRAY_RTX (usage, REGNO (x)) != insn)
3396 ? const0_rtx : insn;
3398 else if (code == SET)
3400 /* Don't count SET_DEST if it is a REG; otherwise count things
3401 in SET_DEST because if a register is partially modified, it won't
3402 show up as a potential movable so we don't care how USAGE is set
3404 if (GET_CODE (SET_DEST (x)) != REG)
3405 find_single_use_in_loop (insn, SET_DEST (x), usage);
3406 find_single_use_in_loop (insn, SET_SRC (x), usage);
3409 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3411 if (fmt[i] == 'e' && XEXP (x, i) != 0)
3412 find_single_use_in_loop (insn, XEXP (x, i), usage);
3413 else if (fmt[i] == 'E')
3414 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3415 find_single_use_in_loop (insn, XVECEXP (x, i, j), usage);
3419 /* Count and record any set in X which is contained in INSN. Update
3420 MAY_NOT_MOVE and LAST_SET for any register set in X. */
3423 count_one_set (insn, x, may_not_move, last_set)
3425 varray_type may_not_move;
3428 if (GET_CODE (x) == CLOBBER && GET_CODE (XEXP (x, 0)) == REG)
3429 /* Don't move a reg that has an explicit clobber.
3430 It's not worth the pain to try to do it correctly. */
3431 VARRAY_CHAR (may_not_move, REGNO (XEXP (x, 0))) = 1;
3433 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
3435 rtx dest = SET_DEST (x);
3436 while (GET_CODE (dest) == SUBREG
3437 || GET_CODE (dest) == ZERO_EXTRACT
3438 || GET_CODE (dest) == SIGN_EXTRACT
3439 || GET_CODE (dest) == STRICT_LOW_PART)
3440 dest = XEXP (dest, 0);
3441 if (GET_CODE (dest) == REG)
3443 register int regno = REGNO (dest);
3444 /* If this is the first setting of this reg
3445 in current basic block, and it was set before,
3446 it must be set in two basic blocks, so it cannot
3447 be moved out of the loop. */
3448 if (VARRAY_INT (set_in_loop, regno) > 0
3449 && last_set[regno] == 0)
3450 VARRAY_CHAR (may_not_move, regno) = 1;
3451 /* If this is not first setting in current basic block,
3452 see if reg was used in between previous one and this.
3453 If so, neither one can be moved. */
3454 if (last_set[regno] != 0
3455 && reg_used_between_p (dest, last_set[regno], insn))
3456 VARRAY_CHAR (may_not_move, regno) = 1;
3457 if (VARRAY_INT (set_in_loop, regno) < 127)
3458 ++VARRAY_INT (set_in_loop, regno);
3459 last_set[regno] = insn;
3464 /* Increment SET_IN_LOOP at the index of each register
3465 that is modified by an insn between FROM and TO.
3466 If the value of an element of SET_IN_LOOP becomes 127 or more,
3467 stop incrementing it, to avoid overflow.
3469 Store in SINGLE_USAGE[I] the single insn in which register I is
3470 used, if it is only used once. Otherwise, it is set to 0 (for no
3471 uses) or const0_rtx for more than one use. This parameter may be zero,
3472 in which case this processing is not done.
3474 Store in *COUNT_PTR the number of actual instruction
3475 in the loop. We use this to decide what is worth moving out. */
3477 /* last_set[n] is nonzero iff reg n has been set in the current basic block.
3478 In that case, it is the insn that last set reg n. */
3481 count_loop_regs_set (from, to, may_not_move, single_usage, count_ptr, nregs)
3482 register rtx from, to;
3483 varray_type may_not_move;
3484 varray_type single_usage;
3488 register rtx *last_set = (rtx *) alloca (nregs * sizeof (rtx));
3490 register int count = 0;
3492 bzero ((char *) last_set, nregs * sizeof (rtx));
3493 for (insn = from; insn != to; insn = NEXT_INSN (insn))
3495 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
3499 /* If requested, record registers that have exactly one use. */
3502 find_single_use_in_loop (insn, PATTERN (insn), single_usage);
3504 /* Include uses in REG_EQUAL notes. */
3505 if (REG_NOTES (insn))
3506 find_single_use_in_loop (insn, REG_NOTES (insn), single_usage);
3509 if (GET_CODE (PATTERN (insn)) == SET
3510 || GET_CODE (PATTERN (insn)) == CLOBBER)
3511 count_one_set (insn, PATTERN (insn), may_not_move, last_set);
3512 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
3515 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
3516 count_one_set (insn, XVECEXP (PATTERN (insn), 0, i),
3517 may_not_move, last_set);
3521 if (GET_CODE (insn) == CODE_LABEL || GET_CODE (insn) == JUMP_INSN)
3522 bzero ((char *) last_set, nregs * sizeof (rtx));
3527 /* Given a loop that is bounded by LOOP_START and LOOP_END
3528 and that is entered at SCAN_START,
3529 return 1 if the register set in SET contained in insn INSN is used by
3530 any insn that precedes INSN in cyclic order starting
3531 from the loop entry point.
3533 We don't want to use INSN_LUID here because if we restrict INSN to those
3534 that have a valid INSN_LUID, it means we cannot move an invariant out
3535 from an inner loop past two loops. */
3538 loop_reg_used_before_p (set, insn, loop_start, scan_start, loop_end)
3539 rtx set, insn, loop_start, scan_start, loop_end;
3541 rtx reg = SET_DEST (set);
3544 /* Scan forward checking for register usage. If we hit INSN, we
3545 are done. Otherwise, if we hit LOOP_END, wrap around to LOOP_START. */
3546 for (p = scan_start; p != insn; p = NEXT_INSN (p))
3548 if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
3549 && reg_overlap_mentioned_p (reg, PATTERN (p)))
3559 /* A "basic induction variable" or biv is a pseudo reg that is set
3560 (within this loop) only by incrementing or decrementing it. */
3561 /* A "general induction variable" or giv is a pseudo reg whose
3562 value is a linear function of a biv. */
3564 /* Bivs are recognized by `basic_induction_var';
3565 Givs by `general_induction_var'. */
3567 /* Indexed by register number, indicates whether or not register is an
3568 induction variable, and if so what type. */
3570 varray_type reg_iv_type;
3572 /* Indexed by register number, contains pointer to `struct induction'
3573 if register is an induction variable. This holds general info for
3574 all induction variables. */
3576 varray_type reg_iv_info;
3578 /* Indexed by register number, contains pointer to `struct iv_class'
3579 if register is a basic induction variable. This holds info describing
3580 the class (a related group) of induction variables that the biv belongs
3583 struct iv_class **reg_biv_class;
3585 /* The head of a list which links together (via the next field)
3586 every iv class for the current loop. */
3588 struct iv_class *loop_iv_list;
3590 /* Givs made from biv increments are always splittable for loop unrolling.
3591 Since there is no regscan info for them, we have to keep track of them
3593 int first_increment_giv, last_increment_giv;
3595 /* Communication with routines called via `note_stores'. */
3597 static rtx note_insn;
3599 /* Dummy register to have non-zero DEST_REG for DEST_ADDR type givs. */
3601 static rtx addr_placeholder;
3603 /* ??? Unfinished optimizations, and possible future optimizations,
3604 for the strength reduction code. */
3606 /* ??? The interaction of biv elimination, and recognition of 'constant'
3607 bivs, may cause problems. */
3609 /* ??? Add heuristics so that DEST_ADDR strength reduction does not cause
3610 performance problems.
3612 Perhaps don't eliminate things that can be combined with an addressing
3613 mode. Find all givs that have the same biv, mult_val, and add_val;
3614 then for each giv, check to see if its only use dies in a following
3615 memory address. If so, generate a new memory address and check to see
3616 if it is valid. If it is valid, then store the modified memory address,
3617 otherwise, mark the giv as not done so that it will get its own iv. */
3619 /* ??? Could try to optimize branches when it is known that a biv is always
3622 /* ??? When replace a biv in a compare insn, we should replace with closest
3623 giv so that an optimized branch can still be recognized by the combiner,
3624 e.g. the VAX acb insn. */
3626 /* ??? Many of the checks involving uid_luid could be simplified if regscan
3627 was rerun in loop_optimize whenever a register was added or moved.
3628 Also, some of the optimizations could be a little less conservative. */
3630 /* Perform strength reduction and induction variable elimination.
3632 Pseudo registers created during this function will be beyond the last
3633 valid index in several tables including n_times_set and regno_last_uid.
3634 This does not cause a problem here, because the added registers cannot be
3635 givs outside of their loop, and hence will never be reconsidered.
3636 But scan_loop must check regnos to make sure they are in bounds.
3638 SCAN_START is the first instruction in the loop, as the loop would
3639 actually be executed. END is the NOTE_INSN_LOOP_END. LOOP_TOP is
3640 the first instruction in the loop, as it is layed out in the
3641 instruction stream. LOOP_START is the NOTE_INSN_LOOP_BEG.
3642 LOOP_CONT is the NOTE_INSN_LOOP_CONT. */
3645 strength_reduce (scan_start, end, loop_top, insn_count,
3646 loop_start, loop_end, loop_cont, unroll_p, bct_p)
3654 int unroll_p, bct_p ATTRIBUTE_UNUSED;
3662 /* This is 1 if current insn is not executed at least once for every loop
3664 int not_every_iteration = 0;
3665 /* This is 1 if current insn may be executed more than once for every
3667 int maybe_multiple = 0;
3668 /* Temporary list pointers for traversing loop_iv_list. */
3669 struct iv_class *bl, **backbl;
3670 /* Ratio of extra register life span we can justify
3671 for saving an instruction. More if loop doesn't call subroutines
3672 since in that case saving an insn makes more difference
3673 and more registers are available. */
3674 /* ??? could set this to last value of threshold in move_movables */
3675 int threshold = (loop_has_call ? 1 : 2) * (3 + n_non_fixed_regs);
3676 /* Map of pseudo-register replacements. */
3681 rtx end_insert_before;
3683 int n_extra_increment;
3684 struct loop_info loop_iteration_info;
3685 struct loop_info *loop_info = &loop_iteration_info;
3687 /* If scan_start points to the loop exit test, we have to be wary of
3688 subversive use of gotos inside expression statements. */
3689 if (prev_nonnote_insn (scan_start) != prev_nonnote_insn (loop_start))
3690 maybe_multiple = back_branch_in_range_p (scan_start, loop_start, loop_end);
3692 VARRAY_INT_INIT (reg_iv_type, max_reg_before_loop, "reg_iv_type");
3693 VARRAY_GENERIC_PTR_INIT (reg_iv_info, max_reg_before_loop, "reg_iv_info");
3694 reg_biv_class = (struct iv_class **)
3695 alloca (max_reg_before_loop * sizeof (struct iv_class *));
3696 bzero ((char *) reg_biv_class, (max_reg_before_loop
3697 * sizeof (struct iv_class *)));
3700 addr_placeholder = gen_reg_rtx (Pmode);
3702 /* Save insn immediately after the loop_end. Insns inserted after loop_end
3703 must be put before this insn, so that they will appear in the right
3704 order (i.e. loop order).
3706 If loop_end is the end of the current function, then emit a
3707 NOTE_INSN_DELETED after loop_end and set end_insert_before to the
3709 if (NEXT_INSN (loop_end) != 0)
3710 end_insert_before = NEXT_INSN (loop_end);
3712 end_insert_before = emit_note_after (NOTE_INSN_DELETED, loop_end);
3714 /* Scan through loop to find all possible bivs. */
3716 for (p = next_insn_in_loop (scan_start, scan_start, end, loop_top);
3718 p = next_insn_in_loop (p, scan_start, end, loop_top))
3720 if (GET_CODE (p) == INSN
3721 && (set = single_set (p))
3722 && GET_CODE (SET_DEST (set)) == REG)
3724 dest_reg = SET_DEST (set);
3725 if (REGNO (dest_reg) < max_reg_before_loop
3726 && REGNO (dest_reg) >= FIRST_PSEUDO_REGISTER
3727 && REG_IV_TYPE (REGNO (dest_reg)) != NOT_BASIC_INDUCT)
3729 if (basic_induction_var (SET_SRC (set), GET_MODE (SET_SRC (set)),
3730 dest_reg, p, &inc_val, &mult_val,
3733 /* It is a possible basic induction variable.
3734 Create and initialize an induction structure for it. */
3737 = (struct induction *) alloca (sizeof (struct induction));
3739 record_biv (v, p, dest_reg, inc_val, mult_val, location,
3740 not_every_iteration, maybe_multiple);
3741 REG_IV_TYPE (REGNO (dest_reg)) = BASIC_INDUCT;
3743 else if (REGNO (dest_reg) < max_reg_before_loop)
3744 REG_IV_TYPE (REGNO (dest_reg)) = NOT_BASIC_INDUCT;
3748 /* Past CODE_LABEL, we get to insns that may be executed multiple
3749 times. The only way we can be sure that they can't is if every
3750 jump insn between here and the end of the loop either
3751 returns, exits the loop, is a jump to a location that is still
3752 behind the label, or is a jump to the loop start. */
3754 if (GET_CODE (p) == CODE_LABEL)
3762 insn = NEXT_INSN (insn);
3763 if (insn == scan_start)
3771 if (insn == scan_start)
3775 if (GET_CODE (insn) == JUMP_INSN
3776 && GET_CODE (PATTERN (insn)) != RETURN
3777 && (! condjump_p (insn)
3778 || (JUMP_LABEL (insn) != 0
3779 && JUMP_LABEL (insn) != scan_start
3780 && (INSN_UID (JUMP_LABEL (insn)) >= max_uid_for_loop
3781 || (INSN_UID (p) < max_uid_for_loop
3782 ? (INSN_LUID (JUMP_LABEL (insn))
3784 : (INSN_UID (insn) >= max_uid_for_loop
3785 || (INSN_LUID (JUMP_LABEL (insn))
3786 < INSN_LUID (insn))))))))
3794 /* Past a jump, we get to insns for which we can't count
3795 on whether they will be executed during each iteration. */
3796 /* This code appears twice in strength_reduce. There is also similar
3797 code in scan_loop. */
3798 if (GET_CODE (p) == JUMP_INSN
3799 /* If we enter the loop in the middle, and scan around to the
3800 beginning, don't set not_every_iteration for that.
3801 This can be any kind of jump, since we want to know if insns
3802 will be executed if the loop is executed. */
3803 && ! (JUMP_LABEL (p) == loop_top
3804 && ((NEXT_INSN (NEXT_INSN (p)) == loop_end && simplejump_p (p))
3805 || (NEXT_INSN (p) == loop_end && condjump_p (p)))))
3809 /* If this is a jump outside the loop, then it also doesn't
3810 matter. Check to see if the target of this branch is on the
3811 loop_number_exits_labels list. */
3813 for (label = loop_number_exit_labels[uid_loop_num[INSN_UID (loop_start)]];
3815 label = LABEL_NEXTREF (label))
3816 if (XEXP (label, 0) == JUMP_LABEL (p))
3820 not_every_iteration = 1;
3823 else if (GET_CODE (p) == NOTE)
3825 /* At the virtual top of a converted loop, insns are again known to
3826 be executed each iteration: logically, the loop begins here
3827 even though the exit code has been duplicated.
3829 Insns are also again known to be executed each iteration at
3830 the LOOP_CONT note. */
3831 if ((NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP
3832 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_CONT)
3834 not_every_iteration = 0;
3835 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
3837 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
3841 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
3842 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
3843 or not an insn is known to be executed each iteration of the
3844 loop, whether or not any iterations are known to occur.
3846 Therefore, if we have just passed a label and have no more labels
3847 between here and the test insn of the loop, we know these insns
3848 will be executed each iteration. */
3850 if (not_every_iteration && GET_CODE (p) == CODE_LABEL
3851 && no_labels_between_p (p, loop_end)
3852 && insn_first_p (p, loop_cont))
3853 not_every_iteration = 0;
3856 /* Scan loop_iv_list to remove all regs that proved not to be bivs.
3857 Make a sanity check against n_times_set. */
3858 for (backbl = &loop_iv_list, bl = *backbl; bl; bl = bl->next)
3860 if (REG_IV_TYPE (bl->regno) != BASIC_INDUCT
3861 /* Above happens if register modified by subreg, etc. */
3862 /* Make sure it is not recognized as a basic induction var: */
3863 || VARRAY_INT (n_times_set, bl->regno) != bl->biv_count
3864 /* If never incremented, it is invariant that we decided not to
3865 move. So leave it alone. */
3866 || ! bl->incremented)
3868 if (loop_dump_stream)
3869 fprintf (loop_dump_stream, "Reg %d: biv discarded, %s\n",
3871 (REG_IV_TYPE (bl->regno) != BASIC_INDUCT
3872 ? "not induction variable"
3873 : (! bl->incremented ? "never incremented"
3876 REG_IV_TYPE (bl->regno) = NOT_BASIC_INDUCT;
3883 if (loop_dump_stream)
3884 fprintf (loop_dump_stream, "Reg %d: biv verified\n", bl->regno);
3888 /* Exit if there are no bivs. */
3891 /* Can still unroll the loop anyways, but indicate that there is no
3892 strength reduction info available. */
3894 unroll_loop (loop_end, insn_count, loop_start, end_insert_before,
3900 /* Find initial value for each biv by searching backwards from loop_start,
3901 halting at first label. Also record any test condition. */
3904 for (p = loop_start; p && GET_CODE (p) != CODE_LABEL; p = PREV_INSN (p))
3908 if (GET_CODE (p) == CALL_INSN)
3911 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
3912 || GET_CODE (p) == CALL_INSN)
3913 note_stores (PATTERN (p), record_initial);
3915 /* Record any test of a biv that branches around the loop if no store
3916 between it and the start of loop. We only care about tests with
3917 constants and registers and only certain of those. */
3918 if (GET_CODE (p) == JUMP_INSN
3919 && JUMP_LABEL (p) != 0
3920 && next_real_insn (JUMP_LABEL (p)) == next_real_insn (loop_end)
3921 && (test = get_condition_for_loop (p)) != 0
3922 && GET_CODE (XEXP (test, 0)) == REG
3923 && REGNO (XEXP (test, 0)) < max_reg_before_loop
3924 && (bl = reg_biv_class[REGNO (XEXP (test, 0))]) != 0
3925 && valid_initial_value_p (XEXP (test, 1), p, call_seen, loop_start)
3926 && bl->init_insn == 0)
3928 /* If an NE test, we have an initial value! */
3929 if (GET_CODE (test) == NE)
3932 bl->init_set = gen_rtx_SET (VOIDmode,
3933 XEXP (test, 0), XEXP (test, 1));
3936 bl->initial_test = test;
3940 /* Look at the each biv and see if we can say anything better about its
3941 initial value from any initializing insns set up above. (This is done
3942 in two passes to avoid missing SETs in a PARALLEL.) */
3943 for (backbl = &loop_iv_list; (bl = *backbl); backbl = &bl->next)
3948 if (! bl->init_insn)
3951 /* IF INIT_INSN has a REG_EQUAL or REG_EQUIV note and the value
3952 is a constant, use the value of that. */
3953 if (((note = find_reg_note (bl->init_insn, REG_EQUAL, 0)) != NULL
3954 && CONSTANT_P (XEXP (note, 0)))
3955 || ((note = find_reg_note (bl->init_insn, REG_EQUIV, 0)) != NULL
3956 && CONSTANT_P (XEXP (note, 0))))
3957 src = XEXP (note, 0);
3959 src = SET_SRC (bl->init_set);
3961 if (loop_dump_stream)
3962 fprintf (loop_dump_stream,
3963 "Biv %d initialized at insn %d: initial value ",
3964 bl->regno, INSN_UID (bl->init_insn));
3966 if ((GET_MODE (src) == GET_MODE (regno_reg_rtx[bl->regno])
3967 || GET_MODE (src) == VOIDmode)
3968 && valid_initial_value_p (src, bl->init_insn, call_seen, loop_start))
3970 bl->initial_value = src;
3972 if (loop_dump_stream)
3974 if (GET_CODE (src) == CONST_INT)
3976 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, INTVAL (src));
3977 fputc ('\n', loop_dump_stream);
3981 print_rtl (loop_dump_stream, src);
3982 fprintf (loop_dump_stream, "\n");
3988 struct iv_class *bl2 = 0;
3991 /* Biv initial value is not a simple move. If it is the sum of
3992 another biv and a constant, check if both bivs are incremented
3993 in lockstep. Then we are actually looking at a giv.
3994 For simplicity, we only handle the case where there is but a
3995 single increment, and the register is not used elsewhere. */
3996 if (bl->biv_count == 1
3997 && bl->regno < max_reg_before_loop
3998 && uid_luid[REGNO_LAST_UID (bl->regno)] < INSN_LUID (loop_end)
3999 && GET_CODE (src) == PLUS
4000 && GET_CODE (XEXP (src, 0)) == REG
4001 && CONSTANT_P (XEXP (src, 1))
4002 && ((increment = biv_total_increment (bl, loop_start, loop_end))
4005 int regno = REGNO (XEXP (src, 0));
4007 for (bl2 = loop_iv_list; bl2; bl2 = bl2->next)
4008 if (bl2->regno == regno)
4012 /* Now, can we transform this biv into a giv? */
4014 && bl2->biv_count == 1
4015 && rtx_equal_p (increment,
4016 biv_total_increment (bl2, loop_start, loop_end))
4017 /* init_insn is only set to insns that are before loop_start
4018 without any intervening labels. */
4019 && ! reg_set_between_p (bl2->biv->src_reg,
4020 PREV_INSN (bl->init_insn), loop_start)
4021 /* The register from BL2 must be set before the register from
4022 BL is set, or we must be able to move the latter set after
4023 the former set. Currently there can't be any labels
4024 in-between when biv_toal_increment returns nonzero both times
4025 but we test it here in case some day some real cfg analysis
4026 gets used to set always_computable. */
4027 && ((insn_first_p (bl2->biv->insn, bl->biv->insn)
4028 && no_labels_between_p (bl2->biv->insn, bl->biv->insn))
4029 || (! reg_used_between_p (bl->biv->src_reg, bl->biv->insn,
4031 && no_jumps_between_p (bl->biv->insn, bl2->biv->insn)))
4032 && validate_change (bl->biv->insn,
4033 &SET_SRC (single_set (bl->biv->insn)),
4036 int loop_num = uid_loop_num[INSN_UID (loop_start)];
4037 rtx dominator = loop_number_cont_dominator[loop_num];
4038 rtx giv = bl->biv->src_reg;
4039 rtx giv_insn = bl->biv->insn;
4040 rtx after_giv = NEXT_INSN (giv_insn);
4042 if (loop_dump_stream)
4043 fprintf (loop_dump_stream, "is giv of biv %d\n", bl2->regno);
4044 /* Let this giv be discovered by the generic code. */
4045 REG_IV_TYPE (bl->regno) = UNKNOWN_INDUCT;
4046 /* We can get better optimization if we can move the giv setting
4047 before the first giv use. */
4049 && ! reg_set_between_p (bl2->biv->src_reg, loop_start,
4051 && ! reg_used_between_p (giv, loop_start, dominator)
4052 && ! reg_used_between_p (giv, giv_insn, loop_end))
4057 for (next = NEXT_INSN (dominator); ; next = NEXT_INSN (next))
4059 if ((GET_RTX_CLASS (GET_CODE (next)) == 'i'
4060 && (reg_mentioned_p (giv, PATTERN (next))
4061 || reg_set_p (bl2->biv->src_reg, next)))
4062 || GET_CODE (next) == JUMP_INSN)
4065 if (GET_RTX_CLASS (GET_CODE (next)) != 'i'
4066 || ! sets_cc0_p (PATTERN (next)))
4070 if (loop_dump_stream)
4071 fprintf (loop_dump_stream, "move after insn %d\n",
4072 INSN_UID (dominator));
4073 /* Avoid problems with luids by actually moving the insn
4074 and adjusting all luids in the range. */
4075 reorder_insns (giv_insn, giv_insn, dominator);
4076 for (p = dominator; INSN_UID (p) >= max_uid_for_loop; )
4078 compute_luids (giv_insn, after_giv, INSN_LUID (p));
4079 /* If the only purpose of the init insn is to initialize
4080 this giv, delete it. */
4081 if (single_set (bl->init_insn)
4082 && ! reg_used_between_p (giv, bl->init_insn, loop_start))
4083 delete_insn (bl->init_insn);
4085 else if (! insn_first_p (bl2->biv->insn, bl->biv->insn))
4087 rtx p = PREV_INSN (giv_insn);
4088 while (INSN_UID (p) >= max_uid_for_loop)
4090 reorder_insns (giv_insn, giv_insn, bl2->biv->insn);
4091 compute_luids (after_giv, NEXT_INSN (giv_insn),
4094 /* Remove this biv from the chain. */
4104 /* If we can't make it a giv,
4105 let biv keep initial value of "itself". */
4106 else if (loop_dump_stream)
4107 fprintf (loop_dump_stream, "is complex\n");
4111 /* If a biv is unconditionally incremented several times in a row, convert
4112 all but the last increment into a giv. */
4114 /* Get an upper bound for the number of registers
4115 we might have after all bivs have been processed. */
4116 first_increment_giv = max_reg_num ();
4117 for (n_extra_increment = 0, bl = loop_iv_list; bl; bl = bl->next)
4118 n_extra_increment += bl->biv_count - 1;
4119 if (n_extra_increment)
4121 int nregs = first_increment_giv + n_extra_increment;
4123 /* Reallocate reg_iv_type and reg_iv_info. */
4124 VARRAY_GROW (reg_iv_type, nregs);
4125 VARRAY_GROW (reg_iv_info, nregs);
4127 for (bl = loop_iv_list; bl; bl = bl->next)
4129 struct induction **vp, *v, *next;
4131 /* The biv increments lists are in reverse order. Fix this first. */
4132 for (v = bl->biv, bl->biv = 0; v; v = next)
4135 v->next_iv = bl->biv;
4139 for (vp = &bl->biv, next = *vp; v = next, next = v->next_iv;)
4141 HOST_WIDE_INT offset;
4142 rtx set, add_val, old_reg, dest_reg, last_use_insn;
4143 int old_regno, new_regno;
4145 if (! v->always_executed
4146 || v->maybe_multiple
4147 || GET_CODE (v->add_val) != CONST_INT
4148 || ! next->always_executed
4149 || next->maybe_multiple
4150 || ! CONSTANT_P (next->add_val))
4155 offset = INTVAL (v->add_val);
4156 set = single_set (v->insn);
4157 add_val = plus_constant (next->add_val, offset);
4158 old_reg = v->dest_reg;
4159 dest_reg = gen_reg_rtx (v->mode);
4161 /* Unlike reg_iv_type / reg_iv_info, the other three arrays
4162 have been allocated with some slop space, so we may not
4163 actually need to reallocate them. If we do, the following
4164 if statement will be executed just once in this loop. */
4165 if ((unsigned) max_reg_num () > n_times_set->num_elements)
4167 /* Grow all the remaining arrays. */
4168 VARRAY_GROW (set_in_loop, nregs);
4169 VARRAY_GROW (n_times_set, nregs);
4170 VARRAY_GROW (may_not_optimize, nregs);
4173 validate_change (v->insn, &SET_DEST (set), dest_reg, 1);
4174 validate_change (next->insn, next->location, add_val, 1);
4175 if (! apply_change_group ())
4180 next->add_val = add_val;
4181 v->dest_reg = dest_reg;
4182 v->giv_type = DEST_REG;
4183 v->location = &SET_SRC (set);
4185 v->combined_with = 0;
4187 v->derive_adjustment = 0;
4193 v->auto_inc_opt = 0;
4196 v->derived_from = 0;
4197 v->always_computable = 1;
4198 v->always_executed = 1;
4200 v->no_const_addval = 0;
4202 old_regno = REGNO (old_reg);
4203 new_regno = REGNO (dest_reg);
4204 VARRAY_INT (set_in_loop, old_regno)--;
4205 VARRAY_INT (set_in_loop, new_regno) = 1;
4206 VARRAY_INT (n_times_set, old_regno)--;
4207 VARRAY_INT (n_times_set, new_regno) = 1;
4208 VARRAY_CHAR (may_not_optimize, new_regno) = 0;
4210 REG_IV_TYPE (new_regno) = GENERAL_INDUCT;
4211 REG_IV_INFO (new_regno) = v;
4213 /* Remove the increment from the list of biv increments,
4214 and record it as a giv. */
4217 v->next_iv = bl->giv;
4220 v->benefit = rtx_cost (SET_SRC (set), SET);
4221 bl->total_benefit += v->benefit;
4223 /* Now replace the biv with DEST_REG in all insns between
4224 the replaced increment and the next increment, and
4225 remember the last insn that needed a replacement. */
4226 for (last_use_insn = v->insn, p = NEXT_INSN (v->insn);
4228 p = next_insn_in_loop (p, scan_start, end, loop_top))
4232 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
4234 if (reg_mentioned_p (old_reg, PATTERN (p)))
4237 if (! validate_replace_rtx (old_reg, dest_reg, p))
4240 for (note = REG_NOTES (p); note; note = XEXP (note, 1))
4242 if (GET_CODE (note) == EXPR_LIST)
4244 = replace_rtx (XEXP (note, 0), old_reg, dest_reg);
4248 v->last_use = last_use_insn;
4249 v->lifetime = INSN_LUID (v->insn) - INSN_LUID (last_use_insn);
4250 /* If the lifetime is zero, it means that this register is really
4251 a dead store. So mark this as a giv that can be ignored.
4252 This will not prevent the biv from being eliminated. */
4253 if (v->lifetime == 0)
4258 last_increment_giv = max_reg_num () - 1;
4260 /* Search the loop for general induction variables. */
4262 /* A register is a giv if: it is only set once, it is a function of a
4263 biv and a constant (or invariant), and it is not a biv. */
4265 not_every_iteration = 0;
4271 /* At end of a straight-in loop, we are done.
4272 At end of a loop entered at the bottom, scan the top. */
4273 if (p == scan_start)
4281 if (p == scan_start)
4285 /* Look for a general induction variable in a register. */
4286 if (GET_CODE (p) == INSN
4287 && (set = single_set (p))
4288 && GET_CODE (SET_DEST (set)) == REG
4289 && ! VARRAY_CHAR (may_not_optimize, REGNO (SET_DEST (set))))
4296 rtx last_consec_insn;
4298 dest_reg = SET_DEST (set);
4299 if (REGNO (dest_reg) < FIRST_PSEUDO_REGISTER)
4302 if (/* SET_SRC is a giv. */
4303 (general_induction_var (SET_SRC (set), &src_reg, &add_val,
4304 &mult_val, 0, &benefit)
4305 /* Equivalent expression is a giv. */
4306 || ((regnote = find_reg_note (p, REG_EQUAL, NULL_RTX))
4307 && general_induction_var (XEXP (regnote, 0), &src_reg,
4308 &add_val, &mult_val, 0,
4310 /* Don't try to handle any regs made by loop optimization.
4311 We have nothing on them in regno_first_uid, etc. */
4312 && REGNO (dest_reg) < max_reg_before_loop
4313 /* Don't recognize a BASIC_INDUCT_VAR here. */
4314 && dest_reg != src_reg
4315 /* This must be the only place where the register is set. */
4316 && (VARRAY_INT (n_times_set, REGNO (dest_reg)) == 1
4317 /* or all sets must be consecutive and make a giv. */
4318 || (benefit = consec_sets_giv (benefit, p,
4320 &add_val, &mult_val,
4321 &last_consec_insn))))
4324 = (struct induction *) alloca (sizeof (struct induction));
4326 /* If this is a library call, increase benefit. */
4327 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
4328 benefit += libcall_benefit (p);
4330 /* Skip the consecutive insns, if there are any. */
4331 if (VARRAY_INT (n_times_set, REGNO (dest_reg)) != 1)
4332 p = last_consec_insn;
4334 record_giv (v, p, src_reg, dest_reg, mult_val, add_val, benefit,
4335 DEST_REG, not_every_iteration, NULL_PTR, loop_start,
4341 #ifndef DONT_REDUCE_ADDR
4342 /* Look for givs which are memory addresses. */
4343 /* This resulted in worse code on a VAX 8600. I wonder if it
4345 if (GET_CODE (p) == INSN)
4346 find_mem_givs (PATTERN (p), p, not_every_iteration, loop_start,
4350 /* Update the status of whether giv can derive other givs. This can
4351 change when we pass a label or an insn that updates a biv. */
4352 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
4353 || GET_CODE (p) == CODE_LABEL)
4354 update_giv_derive (p);
4356 /* Past a jump, we get to insns for which we can't count
4357 on whether they will be executed during each iteration. */
4358 /* This code appears twice in strength_reduce. There is also similar
4359 code in scan_loop. */
4360 if (GET_CODE (p) == JUMP_INSN
4361 /* If we enter the loop in the middle, and scan around to the
4362 beginning, don't set not_every_iteration for that.
4363 This can be any kind of jump, since we want to know if insns
4364 will be executed if the loop is executed. */
4365 && ! (JUMP_LABEL (p) == loop_top
4366 && ((NEXT_INSN (NEXT_INSN (p)) == loop_end && simplejump_p (p))
4367 || (NEXT_INSN (p) == loop_end && condjump_p (p)))))
4371 /* If this is a jump outside the loop, then it also doesn't
4372 matter. Check to see if the target of this branch is on the
4373 loop_number_exits_labels list. */
4375 for (label = loop_number_exit_labels[uid_loop_num[INSN_UID (loop_start)]];
4377 label = LABEL_NEXTREF (label))
4378 if (XEXP (label, 0) == JUMP_LABEL (p))
4382 not_every_iteration = 1;
4385 else if (GET_CODE (p) == NOTE)
4387 /* At the virtual top of a converted loop, insns are again known to
4388 be executed each iteration: logically, the loop begins here
4389 even though the exit code has been duplicated.
4391 Insns are also again known to be executed each iteration at
4392 the LOOP_CONT note. */
4393 if ((NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP
4394 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_CONT)
4396 not_every_iteration = 0;
4397 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
4399 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
4403 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
4404 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
4405 or not an insn is known to be executed each iteration of the
4406 loop, whether or not any iterations are known to occur.
4408 Therefore, if we have just passed a label and have no more labels
4409 between here and the test insn of the loop, we know these insns
4410 will be executed each iteration. */
4412 if (not_every_iteration && GET_CODE (p) == CODE_LABEL
4413 && no_labels_between_p (p, loop_end)
4414 && insn_first_p (p, loop_cont))
4415 not_every_iteration = 0;
4418 /* Try to calculate and save the number of loop iterations. This is
4419 set to zero if the actual number can not be calculated. This must
4420 be called after all giv's have been identified, since otherwise it may
4421 fail if the iteration variable is a giv. */
4423 loop_iterations (loop_start, loop_end, loop_info);
4425 /* Now for each giv for which we still don't know whether or not it is
4426 replaceable, check to see if it is replaceable because its final value
4427 can be calculated. This must be done after loop_iterations is called,
4428 so that final_giv_value will work correctly. */
4430 for (bl = loop_iv_list; bl; bl = bl->next)
4432 struct induction *v;
4434 for (v = bl->giv; v; v = v->next_iv)
4435 if (! v->replaceable && ! v->not_replaceable)
4436 check_final_value (v, loop_start, loop_end, loop_info->n_iterations);
4439 /* Try to prove that the loop counter variable (if any) is always
4440 nonnegative; if so, record that fact with a REG_NONNEG note
4441 so that "decrement and branch until zero" insn can be used. */
4442 check_dbra_loop (loop_end, insn_count, loop_start, loop_info);
4444 /* Create reg_map to hold substitutions for replaceable giv regs.
4445 Some givs might have been made from biv increments, so look at
4446 reg_iv_type for a suitable size. */
4447 reg_map_size = reg_iv_type->num_elements;
4448 reg_map = (rtx *) alloca (reg_map_size * sizeof (rtx));
4449 bzero ((char *) reg_map, reg_map_size * sizeof (rtx));
4451 /* Examine each iv class for feasibility of strength reduction/induction
4452 variable elimination. */
4454 for (bl = loop_iv_list; bl; bl = bl->next)
4456 struct induction *v;
4459 rtx final_value = 0;
4462 /* Test whether it will be possible to eliminate this biv
4463 provided all givs are reduced. This is possible if either
4464 the reg is not used outside the loop, or we can compute
4465 what its final value will be.
4467 For architectures with a decrement_and_branch_until_zero insn,
4468 don't do this if we put a REG_NONNEG note on the endtest for
4471 /* Compare against bl->init_insn rather than loop_start.
4472 We aren't concerned with any uses of the biv between
4473 init_insn and loop_start since these won't be affected
4474 by the value of the biv elsewhere in the function, so
4475 long as init_insn doesn't use the biv itself.
4476 March 14, 1989 -- self@bayes.arc.nasa.gov */
4478 if ((uid_luid[REGNO_LAST_UID (bl->regno)] < INSN_LUID (loop_end)
4480 && INSN_UID (bl->init_insn) < max_uid_for_loop
4481 && uid_luid[REGNO_FIRST_UID (bl->regno)] >= INSN_LUID (bl->init_insn)
4482 #ifdef HAVE_decrement_and_branch_until_zero
4485 && ! reg_mentioned_p (bl->biv->dest_reg, SET_SRC (bl->init_set)))
4486 || ((final_value = final_biv_value (bl, loop_start, loop_end,
4487 loop_info->n_iterations))
4488 #ifdef HAVE_decrement_and_branch_until_zero
4492 bl->eliminable = maybe_eliminate_biv (bl, loop_start, end, 0,
4493 threshold, insn_count);
4496 if (loop_dump_stream)
4498 fprintf (loop_dump_stream,
4499 "Cannot eliminate biv %d.\n",
4501 fprintf (loop_dump_stream,
4502 "First use: insn %d, last use: insn %d.\n",
4503 REGNO_FIRST_UID (bl->regno),
4504 REGNO_LAST_UID (bl->regno));
4508 /* Combine all giv's for this iv_class. */
4511 /* This will be true at the end, if all givs which depend on this
4512 biv have been strength reduced.
4513 We can't (currently) eliminate the biv unless this is so. */
4516 /* Check each giv in this class to see if we will benefit by reducing
4517 it. Skip giv's combined with others. */
4518 for (v = bl->giv; v; v = v->next_iv)
4520 struct induction *tv;
4522 if (v->ignore || v->same)
4525 benefit = v->benefit;
4527 /* Reduce benefit if not replaceable, since we will insert
4528 a move-insn to replace the insn that calculates this giv.
4529 Don't do this unless the giv is a user variable, since it
4530 will often be marked non-replaceable because of the duplication
4531 of the exit code outside the loop. In such a case, the copies
4532 we insert are dead and will be deleted. So they don't have
4533 a cost. Similar situations exist. */
4534 /* ??? The new final_[bg]iv_value code does a much better job
4535 of finding replaceable giv's, and hence this code may no longer
4537 if (! v->replaceable && ! bl->eliminable
4538 && REG_USERVAR_P (v->dest_reg))
4539 benefit -= copy_cost;
4541 /* Decrease the benefit to count the add-insns that we will
4542 insert to increment the reduced reg for the giv. */
4543 benefit -= add_cost * bl->biv_count;
4545 /* Decide whether to strength-reduce this giv or to leave the code
4546 unchanged (recompute it from the biv each time it is used).
4547 This decision can be made independently for each giv. */
4550 /* Attempt to guess whether autoincrement will handle some of the
4551 new add insns; if so, increase BENEFIT (undo the subtraction of
4552 add_cost that was done above). */
4553 if (v->giv_type == DEST_ADDR
4554 && GET_CODE (v->mult_val) == CONST_INT)
4556 if (HAVE_POST_INCREMENT
4557 && INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
4558 benefit += add_cost * bl->biv_count;
4559 else if (HAVE_PRE_INCREMENT
4560 && INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
4561 benefit += add_cost * bl->biv_count;
4562 else if (HAVE_POST_DECREMENT
4563 && -INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
4564 benefit += add_cost * bl->biv_count;
4565 else if (HAVE_PRE_DECREMENT
4566 && -INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
4567 benefit += add_cost * bl->biv_count;
4571 /* If an insn is not to be strength reduced, then set its ignore
4572 flag, and clear all_reduced. */
4574 /* A giv that depends on a reversed biv must be reduced if it is
4575 used after the loop exit, otherwise, it would have the wrong
4576 value after the loop exit. To make it simple, just reduce all
4577 of such giv's whether or not we know they are used after the loop
4580 if ( ! flag_reduce_all_givs && v->lifetime * threshold * benefit < insn_count
4583 if (loop_dump_stream)
4584 fprintf (loop_dump_stream,
4585 "giv of insn %d not worth while, %d vs %d.\n",
4587 v->lifetime * threshold * benefit, insn_count);
4593 /* Check that we can increment the reduced giv without a
4594 multiply insn. If not, reject it. */
4596 for (tv = bl->biv; tv; tv = tv->next_iv)
4597 if (tv->mult_val == const1_rtx
4598 && ! product_cheap_p (tv->add_val, v->mult_val))
4600 if (loop_dump_stream)
4601 fprintf (loop_dump_stream,
4602 "giv of insn %d: would need a multiply.\n",
4603 INSN_UID (v->insn));
4611 /* Now that we know which givs will be reduced, try to rearrange the
4612 combinations to reduce register pressure.
4613 recombine_givs calls find_life_end, which needs reg_iv_type and
4614 reg_iv_info to be valid for all pseudos. We do the necessary
4615 reallocation here since it allows to check if there are still
4616 more bivs to process. */
4617 nregs = max_reg_num ();
4618 if (nregs > reg_iv_type->num_elements)
4620 /* If there are still more bivs to process, allocate some slack
4621 space so that we're not constantly reallocating these arrays. */
4624 /* Reallocate reg_iv_type and reg_iv_info. */
4625 VARRAY_GROW (reg_iv_type, nregs);
4626 VARRAY_GROW (reg_iv_info, nregs);
4628 recombine_givs (bl, loop_start, loop_end, unroll_p);
4630 /* Reduce each giv that we decided to reduce. */
4632 for (v = bl->giv; v; v = v->next_iv)
4634 struct induction *tv;
4635 if (! v->ignore && v->same == 0)
4637 int auto_inc_opt = 0;
4639 v->new_reg = gen_reg_rtx (v->mode);
4641 if (v->derived_from)
4644 = replace_rtx (PATTERN (v->insn), v->dest_reg, v->new_reg);
4645 if (bl->biv_count != 1)
4647 /* For each place where the biv is incremented, add an
4648 insn to set the new, reduced reg for the giv. */
4649 for (tv = bl->biv; tv; tv = tv->next_iv)
4651 /* We always emit reduced giv increments before the
4652 biv increment when bl->biv_count != 1. So by
4653 emitting the add insns for derived givs after the
4654 biv increment, they pick up the updated value of
4656 emit_insn_after (copy_rtx (PATTERN (v->insn)),
4665 /* If the target has auto-increment addressing modes, and
4666 this is an address giv, then try to put the increment
4667 immediately after its use, so that flow can create an
4668 auto-increment addressing mode. */
4669 if (v->giv_type == DEST_ADDR && bl->biv_count == 1
4670 && bl->biv->always_executed && ! bl->biv->maybe_multiple
4671 /* We don't handle reversed biv's because bl->biv->insn
4672 does not have a valid INSN_LUID. */
4674 && v->always_executed && ! v->maybe_multiple
4675 && INSN_UID (v->insn) < max_uid_for_loop)
4677 /* If other giv's have been combined with this one, then
4678 this will work only if all uses of the other giv's occur
4679 before this giv's insn. This is difficult to check.
4681 We simplify this by looking for the common case where
4682 there is one DEST_REG giv, and this giv's insn is the
4683 last use of the dest_reg of that DEST_REG giv. If the
4684 increment occurs after the address giv, then we can
4685 perform the optimization. (Otherwise, the increment
4686 would have to go before other_giv, and we would not be
4687 able to combine it with the address giv to get an
4688 auto-inc address.) */
4689 if (v->combined_with)
4691 struct induction *other_giv = 0;
4693 for (tv = bl->giv; tv; tv = tv->next_iv)
4701 if (! tv && other_giv
4702 && REGNO (other_giv->dest_reg) < max_reg_before_loop
4703 && (REGNO_LAST_UID (REGNO (other_giv->dest_reg))
4704 == INSN_UID (v->insn))
4705 && INSN_LUID (v->insn) < INSN_LUID (bl->biv->insn))
4708 /* Check for case where increment is before the address
4709 giv. Do this test in "loop order". */
4710 else if ((INSN_LUID (v->insn) > INSN_LUID (bl->biv->insn)
4711 && (INSN_LUID (v->insn) < INSN_LUID (scan_start)
4712 || (INSN_LUID (bl->biv->insn)
4713 > INSN_LUID (scan_start))))
4714 || (INSN_LUID (v->insn) < INSN_LUID (scan_start)
4715 && (INSN_LUID (scan_start)
4716 < INSN_LUID (bl->biv->insn))))
4725 /* We can't put an insn immediately after one setting
4726 cc0, or immediately before one using cc0. */
4727 if ((auto_inc_opt == 1 && sets_cc0_p (PATTERN (v->insn)))
4728 || (auto_inc_opt == -1
4729 && (prev = prev_nonnote_insn (v->insn)) != 0
4730 && GET_RTX_CLASS (GET_CODE (prev)) == 'i'
4731 && sets_cc0_p (PATTERN (prev))))
4737 v->auto_inc_opt = 1;
4741 /* For each place where the biv is incremented, add an insn
4742 to increment the new, reduced reg for the giv. */
4743 for (tv = bl->biv; tv; tv = tv->next_iv)
4748 insert_before = tv->insn;
4749 else if (auto_inc_opt == 1)
4750 insert_before = NEXT_INSN (v->insn);
4752 insert_before = v->insn;
4754 if (tv->mult_val == const1_rtx)
4755 emit_iv_add_mult (tv->add_val, v->mult_val,
4756 v->new_reg, v->new_reg, insert_before);
4757 else /* tv->mult_val == const0_rtx */
4758 /* A multiply is acceptable here
4759 since this is presumed to be seldom executed. */
4760 emit_iv_add_mult (tv->add_val, v->mult_val,
4761 v->add_val, v->new_reg, insert_before);
4764 /* Add code at loop start to initialize giv's reduced reg. */
4766 emit_iv_add_mult (bl->initial_value, v->mult_val,
4767 v->add_val, v->new_reg, loop_start);
4771 /* Rescan all givs. If a giv is the same as a giv not reduced, mark it
4774 For each giv register that can be reduced now: if replaceable,
4775 substitute reduced reg wherever the old giv occurs;
4776 else add new move insn "giv_reg = reduced_reg".
4778 Also check for givs whose first use is their definition and whose
4779 last use is the definition of another giv. If so, it is likely
4780 dead and should not be used to eliminate a biv. */
4781 for (v = bl->giv; v; v = v->next_iv)
4783 if (v->same && v->same->ignore)
4791 struct induction *v1;
4793 for (v1 = bl->giv; v1; v1 = v1->next_iv)
4794 if (v->last_use == v1->insn)
4797 else if (v->giv_type == DEST_REG
4798 && REGNO_FIRST_UID (REGNO (v->dest_reg)) == INSN_UID (v->insn))
4800 struct induction *v1;
4802 for (v1 = bl->giv; v1; v1 = v1->next_iv)
4803 if (REGNO_LAST_UID (REGNO (v->dest_reg)) == INSN_UID (v1->insn))
4807 /* Update expression if this was combined, in case other giv was
4810 v->new_reg = replace_rtx (v->new_reg,
4811 v->same->dest_reg, v->same->new_reg);
4813 if (v->giv_type == DEST_ADDR)
4814 /* Store reduced reg as the address in the memref where we found
4816 validate_change (v->insn, v->location, v->new_reg, 0);
4817 else if (v->replaceable)
4819 reg_map[REGNO (v->dest_reg)] = v->new_reg;
4822 /* I can no longer duplicate the original problem. Perhaps
4823 this is unnecessary now? */
4825 /* Replaceable; it isn't strictly necessary to delete the old
4826 insn and emit a new one, because v->dest_reg is now dead.
4828 However, especially when unrolling loops, the special
4829 handling for (set REG0 REG1) in the second cse pass may
4830 make v->dest_reg live again. To avoid this problem, emit
4831 an insn to set the original giv reg from the reduced giv.
4832 We can not delete the original insn, since it may be part
4833 of a LIBCALL, and the code in flow that eliminates dead
4834 libcalls will fail if it is deleted. */
4835 emit_insn_after (gen_move_insn (v->dest_reg, v->new_reg),
4841 /* Not replaceable; emit an insn to set the original giv reg from
4842 the reduced giv, same as above. */
4843 emit_insn_after (gen_move_insn (v->dest_reg, v->new_reg),
4847 /* When a loop is reversed, givs which depend on the reversed
4848 biv, and which are live outside the loop, must be set to their
4849 correct final value. This insn is only needed if the giv is
4850 not replaceable. The correct final value is the same as the
4851 value that the giv starts the reversed loop with. */
4852 if (bl->reversed && ! v->replaceable)
4853 emit_iv_add_mult (bl->initial_value, v->mult_val,
4854 v->add_val, v->dest_reg, end_insert_before);
4855 else if (v->final_value)
4859 /* If the loop has multiple exits, emit the insn before the
4860 loop to ensure that it will always be executed no matter
4861 how the loop exits. Otherwise, emit the insn after the loop,
4862 since this is slightly more efficient. */
4863 if (loop_number_exit_count[uid_loop_num[INSN_UID (loop_start)]])
4864 insert_before = loop_start;
4866 insert_before = end_insert_before;
4867 emit_insn_before (gen_move_insn (v->dest_reg, v->final_value),
4871 /* If the insn to set the final value of the giv was emitted
4872 before the loop, then we must delete the insn inside the loop
4873 that sets it. If this is a LIBCALL, then we must delete
4874 every insn in the libcall. Note, however, that
4875 final_giv_value will only succeed when there are multiple
4876 exits if the giv is dead at each exit, hence it does not
4877 matter that the original insn remains because it is dead
4879 /* Delete the insn inside the loop that sets the giv since
4880 the giv is now set before (or after) the loop. */
4881 delete_insn (v->insn);
4885 if (loop_dump_stream)
4887 fprintf (loop_dump_stream, "giv at %d reduced to ",
4888 INSN_UID (v->insn));
4889 print_rtl (loop_dump_stream, v->new_reg);
4890 fprintf (loop_dump_stream, "\n");
4894 /* All the givs based on the biv bl have been reduced if they
4897 /* For each giv not marked as maybe dead that has been combined with a
4898 second giv, clear any "maybe dead" mark on that second giv.
4899 v->new_reg will either be or refer to the register of the giv it
4902 Doing this clearing avoids problems in biv elimination where a
4903 giv's new_reg is a complex value that can't be put in the insn but
4904 the giv combined with (with a reg as new_reg) is marked maybe_dead.
4905 Since the register will be used in either case, we'd prefer it be
4906 used from the simpler giv. */
4908 for (v = bl->giv; v; v = v->next_iv)
4909 if (! v->maybe_dead && v->same)
4910 v->same->maybe_dead = 0;
4912 /* Try to eliminate the biv, if it is a candidate.
4913 This won't work if ! all_reduced,
4914 since the givs we planned to use might not have been reduced.
4916 We have to be careful that we didn't initially think we could eliminate
4917 this biv because of a giv that we now think may be dead and shouldn't
4918 be used as a biv replacement.
4920 Also, there is the possibility that we may have a giv that looks
4921 like it can be used to eliminate a biv, but the resulting insn
4922 isn't valid. This can happen, for example, on the 88k, where a
4923 JUMP_INSN can compare a register only with zero. Attempts to
4924 replace it with a compare with a constant will fail.
4926 Note that in cases where this call fails, we may have replaced some
4927 of the occurrences of the biv with a giv, but no harm was done in
4928 doing so in the rare cases where it can occur. */
4930 if (all_reduced == 1 && bl->eliminable
4931 && maybe_eliminate_biv (bl, loop_start, end, 1,
4932 threshold, insn_count))
4935 /* ?? If we created a new test to bypass the loop entirely,
4936 or otherwise drop straight in, based on this test, then
4937 we might want to rewrite it also. This way some later
4938 pass has more hope of removing the initialization of this
4941 /* If final_value != 0, then the biv may be used after loop end
4942 and we must emit an insn to set it just in case.
4944 Reversed bivs already have an insn after the loop setting their
4945 value, so we don't need another one. We can't calculate the
4946 proper final value for such a biv here anyways. */
4947 if (final_value != 0 && ! bl->reversed)
4951 /* If the loop has multiple exits, emit the insn before the
4952 loop to ensure that it will always be executed no matter
4953 how the loop exits. Otherwise, emit the insn after the
4954 loop, since this is slightly more efficient. */
4955 if (loop_number_exit_count[uid_loop_num[INSN_UID (loop_start)]])
4956 insert_before = loop_start;
4958 insert_before = end_insert_before;
4960 emit_insn_before (gen_move_insn (bl->biv->dest_reg, final_value),
4965 /* Delete all of the instructions inside the loop which set
4966 the biv, as they are all dead. If is safe to delete them,
4967 because an insn setting a biv will never be part of a libcall. */
4968 /* However, deleting them will invalidate the regno_last_uid info,
4969 so keeping them around is more convenient. Final_biv_value
4970 will only succeed when there are multiple exits if the biv
4971 is dead at each exit, hence it does not matter that the original
4972 insn remains, because it is dead anyways. */
4973 for (v = bl->biv; v; v = v->next_iv)
4974 delete_insn (v->insn);
4977 if (loop_dump_stream)
4978 fprintf (loop_dump_stream, "Reg %d: biv eliminated\n",
4983 /* Go through all the instructions in the loop, making all the
4984 register substitutions scheduled in REG_MAP. */
4986 for (p = loop_start; p != end; p = NEXT_INSN (p))
4987 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
4988 || GET_CODE (p) == CALL_INSN)
4990 replace_regs (PATTERN (p), reg_map, reg_map_size, 0);
4991 replace_regs (REG_NOTES (p), reg_map, reg_map_size, 0);
4995 /* Unroll loops from within strength reduction so that we can use the
4996 induction variable information that strength_reduce has already
5000 unroll_loop (loop_end, insn_count, loop_start, end_insert_before,
5003 #ifdef HAVE_decrement_and_branch_on_count
5004 /* Instrument the loop with BCT insn. */
5005 if (HAVE_decrement_and_branch_on_count && bct_p
5006 && flag_branch_on_count_reg)
5007 insert_bct (loop_start, loop_end, loop_info);
5008 #endif /* HAVE_decrement_and_branch_on_count */
5010 if (loop_dump_stream)
5011 fprintf (loop_dump_stream, "\n");
5012 VARRAY_FREE (reg_iv_type);
5013 VARRAY_FREE (reg_iv_info);
5016 /* Return 1 if X is a valid source for an initial value (or as value being
5017 compared against in an initial test).
5019 X must be either a register or constant and must not be clobbered between
5020 the current insn and the start of the loop.
5022 INSN is the insn containing X. */
5025 valid_initial_value_p (x, insn, call_seen, loop_start)
5034 /* Only consider pseudos we know about initialized in insns whose luids
5036 if (GET_CODE (x) != REG
5037 || REGNO (x) >= max_reg_before_loop)
5040 /* Don't use call-clobbered registers across a call which clobbers it. On
5041 some machines, don't use any hard registers at all. */
5042 if (REGNO (x) < FIRST_PSEUDO_REGISTER
5043 && (SMALL_REGISTER_CLASSES
5044 || (call_used_regs[REGNO (x)] && call_seen)))
5047 /* Don't use registers that have been clobbered before the start of the
5049 if (reg_set_between_p (x, insn, loop_start))
5055 /* Scan X for memory refs and check each memory address
5056 as a possible giv. INSN is the insn whose pattern X comes from.
5057 NOT_EVERY_ITERATION is 1 if the insn might not be executed during
5058 every loop iteration. */
5061 find_mem_givs (x, insn, not_every_iteration, loop_start, loop_end)
5064 int not_every_iteration;
5065 rtx loop_start, loop_end;
5068 register enum rtx_code code;
5074 code = GET_CODE (x);
5098 /* This code used to disable creating GIVs with mult_val == 1 and
5099 add_val == 0. However, this leads to lost optimizations when
5100 it comes time to combine a set of related DEST_ADDR GIVs, since
5101 this one would not be seen. */
5103 if (general_induction_var (XEXP (x, 0), &src_reg, &add_val,
5104 &mult_val, 1, &benefit))
5106 /* Found one; record it. */
5108 = (struct induction *) oballoc (sizeof (struct induction));
5110 record_giv (v, insn, src_reg, addr_placeholder, mult_val,
5111 add_val, benefit, DEST_ADDR, not_every_iteration,
5112 &XEXP (x, 0), loop_start, loop_end);
5114 v->mem_mode = GET_MODE (x);
5123 /* Recursively scan the subexpressions for other mem refs. */
5125 fmt = GET_RTX_FORMAT (code);
5126 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5128 find_mem_givs (XEXP (x, i), insn, not_every_iteration, loop_start,
5130 else if (fmt[i] == 'E')
5131 for (j = 0; j < XVECLEN (x, i); j++)
5132 find_mem_givs (XVECEXP (x, i, j), insn, not_every_iteration,
5133 loop_start, loop_end);
5136 /* Fill in the data about one biv update.
5137 V is the `struct induction' in which we record the biv. (It is
5138 allocated by the caller, with alloca.)
5139 INSN is the insn that sets it.
5140 DEST_REG is the biv's reg.
5142 MULT_VAL is const1_rtx if the biv is being incremented here, in which case
5143 INC_VAL is the increment. Otherwise, MULT_VAL is const0_rtx and the biv is
5144 being set to INC_VAL.
5146 NOT_EVERY_ITERATION is nonzero if this biv update is not know to be
5147 executed every iteration; MAYBE_MULTIPLE is nonzero if this biv update
5148 can be executed more than once per iteration. If MAYBE_MULTIPLE
5149 and NOT_EVERY_ITERATION are both zero, we know that the biv update is
5150 executed exactly once per iteration. */
5153 record_biv (v, insn, dest_reg, inc_val, mult_val, location,
5154 not_every_iteration, maybe_multiple)
5155 struct induction *v;
5161 int not_every_iteration;
5164 struct iv_class *bl;
5167 v->src_reg = dest_reg;
5168 v->dest_reg = dest_reg;
5169 v->mult_val = mult_val;
5170 v->add_val = inc_val;
5171 v->location = location;
5172 v->mode = GET_MODE (dest_reg);
5173 v->always_computable = ! not_every_iteration;
5174 v->always_executed = ! not_every_iteration;
5175 v->maybe_multiple = maybe_multiple;
5177 /* Add this to the reg's iv_class, creating a class
5178 if this is the first incrementation of the reg. */
5180 bl = reg_biv_class[REGNO (dest_reg)];
5183 /* Create and initialize new iv_class. */
5185 bl = (struct iv_class *) oballoc (sizeof (struct iv_class));
5187 bl->regno = REGNO (dest_reg);
5193 /* Set initial value to the reg itself. */
5194 bl->initial_value = dest_reg;
5195 /* We haven't seen the initializing insn yet */
5198 bl->initial_test = 0;
5199 bl->incremented = 0;
5203 bl->total_benefit = 0;
5205 /* Add this class to loop_iv_list. */
5206 bl->next = loop_iv_list;
5209 /* Put it in the array of biv register classes. */
5210 reg_biv_class[REGNO (dest_reg)] = bl;
5213 /* Update IV_CLASS entry for this biv. */
5214 v->next_iv = bl->biv;
5217 if (mult_val == const1_rtx)
5218 bl->incremented = 1;
5220 if (loop_dump_stream)
5222 fprintf (loop_dump_stream,
5223 "Insn %d: possible biv, reg %d,",
5224 INSN_UID (insn), REGNO (dest_reg));
5225 if (GET_CODE (inc_val) == CONST_INT)
5227 fprintf (loop_dump_stream, " const =");
5228 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, INTVAL (inc_val));
5229 fputc ('\n', loop_dump_stream);
5233 fprintf (loop_dump_stream, " const = ");
5234 print_rtl (loop_dump_stream, inc_val);
5235 fprintf (loop_dump_stream, "\n");
5240 /* Fill in the data about one giv.
5241 V is the `struct induction' in which we record the giv. (It is
5242 allocated by the caller, with alloca.)
5243 INSN is the insn that sets it.
5244 BENEFIT estimates the savings from deleting this insn.
5245 TYPE is DEST_REG or DEST_ADDR; it says whether the giv is computed
5246 into a register or is used as a memory address.
5248 SRC_REG is the biv reg which the giv is computed from.
5249 DEST_REG is the giv's reg (if the giv is stored in a reg).
5250 MULT_VAL and ADD_VAL are the coefficients used to compute the giv.
5251 LOCATION points to the place where this giv's value appears in INSN. */
5254 record_giv (v, insn, src_reg, dest_reg, mult_val, add_val, benefit,
5255 type, not_every_iteration, location, loop_start, loop_end)
5256 struct induction *v;
5260 rtx mult_val, add_val;
5263 int not_every_iteration;
5265 rtx loop_start, loop_end;
5267 struct induction *b;
5268 struct iv_class *bl;
5269 rtx set = single_set (insn);
5272 v->src_reg = src_reg;
5274 v->dest_reg = dest_reg;
5275 v->mult_val = mult_val;
5276 v->add_val = add_val;
5277 v->benefit = benefit;
5278 v->location = location;
5280 v->combined_with = 0;
5281 v->maybe_multiple = 0;
5283 v->derive_adjustment = 0;
5289 v->auto_inc_opt = 0;
5292 v->derived_from = 0;
5295 /* The v->always_computable field is used in update_giv_derive, to
5296 determine whether a giv can be used to derive another giv. For a
5297 DEST_REG giv, INSN computes a new value for the giv, so its value
5298 isn't computable if INSN insn't executed every iteration.
5299 However, for a DEST_ADDR giv, INSN merely uses the value of the giv;
5300 it does not compute a new value. Hence the value is always computable
5301 regardless of whether INSN is executed each iteration. */
5303 if (type == DEST_ADDR)
5304 v->always_computable = 1;
5306 v->always_computable = ! not_every_iteration;
5308 v->always_executed = ! not_every_iteration;
5310 if (type == DEST_ADDR)
5312 v->mode = GET_MODE (*location);
5315 else /* type == DEST_REG */
5317 v->mode = GET_MODE (SET_DEST (set));
5319 v->lifetime = (uid_luid[REGNO_LAST_UID (REGNO (dest_reg))]
5320 - uid_luid[REGNO_FIRST_UID (REGNO (dest_reg))]);
5322 /* If the lifetime is zero, it means that this register is
5323 really a dead store. So mark this as a giv that can be
5324 ignored. This will not prevent the biv from being eliminated. */
5325 if (v->lifetime == 0)
5328 REG_IV_TYPE (REGNO (dest_reg)) = GENERAL_INDUCT;
5329 REG_IV_INFO (REGNO (dest_reg)) = v;
5332 /* Add the giv to the class of givs computed from one biv. */
5334 bl = reg_biv_class[REGNO (src_reg)];
5337 v->next_iv = bl->giv;
5339 /* Don't count DEST_ADDR. This is supposed to count the number of
5340 insns that calculate givs. */
5341 if (type == DEST_REG)
5343 bl->total_benefit += benefit;
5346 /* Fatal error, biv missing for this giv? */
5349 if (type == DEST_ADDR)
5353 /* The giv can be replaced outright by the reduced register only if all
5354 of the following conditions are true:
5355 - the insn that sets the giv is always executed on any iteration
5356 on which the giv is used at all
5357 (there are two ways to deduce this:
5358 either the insn is executed on every iteration,
5359 or all uses follow that insn in the same basic block),
5360 - the giv is not used outside the loop
5361 - no assignments to the biv occur during the giv's lifetime. */
5363 if (REGNO_FIRST_UID (REGNO (dest_reg)) == INSN_UID (insn)
5364 /* Previous line always fails if INSN was moved by loop opt. */
5365 && uid_luid[REGNO_LAST_UID (REGNO (dest_reg))] < INSN_LUID (loop_end)
5366 && (! not_every_iteration
5367 || last_use_this_basic_block (dest_reg, insn)))
5369 /* Now check that there are no assignments to the biv within the
5370 giv's lifetime. This requires two separate checks. */
5372 /* Check each biv update, and fail if any are between the first
5373 and last use of the giv.
5375 If this loop contains an inner loop that was unrolled, then
5376 the insn modifying the biv may have been emitted by the loop
5377 unrolling code, and hence does not have a valid luid. Just
5378 mark the biv as not replaceable in this case. It is not very
5379 useful as a biv, because it is used in two different loops.
5380 It is very unlikely that we would be able to optimize the giv
5381 using this biv anyways. */
5384 for (b = bl->biv; b; b = b->next_iv)
5386 if (INSN_UID (b->insn) >= max_uid_for_loop
5387 || ((uid_luid[INSN_UID (b->insn)]
5388 >= uid_luid[REGNO_FIRST_UID (REGNO (dest_reg))])
5389 && (uid_luid[INSN_UID (b->insn)]
5390 <= uid_luid[REGNO_LAST_UID (REGNO (dest_reg))])))
5393 v->not_replaceable = 1;
5398 /* If there are any backwards branches that go from after the
5399 biv update to before it, then this giv is not replaceable. */
5401 for (b = bl->biv; b; b = b->next_iv)
5402 if (back_branch_in_range_p (b->insn, loop_start, loop_end))
5405 v->not_replaceable = 1;
5411 /* May still be replaceable, we don't have enough info here to
5414 v->not_replaceable = 0;
5418 /* Record whether the add_val contains a const_int, for later use by
5423 v->no_const_addval = 1;
5424 if (tem == const0_rtx)
5426 else if (GET_CODE (tem) == CONST_INT)
5427 v->no_const_addval = 0;
5428 else if (GET_CODE (tem) == PLUS)
5432 if (GET_CODE (XEXP (tem, 0)) == PLUS)
5433 tem = XEXP (tem, 0);
5434 else if (GET_CODE (XEXP (tem, 1)) == PLUS)
5435 tem = XEXP (tem, 1);
5439 if (GET_CODE (XEXP (tem, 1)) == CONST_INT)
5440 v->no_const_addval = 0;
5444 if (loop_dump_stream)
5446 if (type == DEST_REG)
5447 fprintf (loop_dump_stream, "Insn %d: giv reg %d",
5448 INSN_UID (insn), REGNO (dest_reg));
5450 fprintf (loop_dump_stream, "Insn %d: dest address",
5453 fprintf (loop_dump_stream, " src reg %d benefit %d",
5454 REGNO (src_reg), v->benefit);
5455 fprintf (loop_dump_stream, " lifetime %d",
5459 fprintf (loop_dump_stream, " replaceable");
5461 if (v->no_const_addval)
5462 fprintf (loop_dump_stream, " ncav");
5464 if (GET_CODE (mult_val) == CONST_INT)
5466 fprintf (loop_dump_stream, " mult ");
5467 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, INTVAL (mult_val));
5471 fprintf (loop_dump_stream, " mult ");
5472 print_rtl (loop_dump_stream, mult_val);
5475 if (GET_CODE (add_val) == CONST_INT)
5477 fprintf (loop_dump_stream, " add ");
5478 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, INTVAL (add_val));
5482 fprintf (loop_dump_stream, " add ");
5483 print_rtl (loop_dump_stream, add_val);
5487 if (loop_dump_stream)
5488 fprintf (loop_dump_stream, "\n");
5493 /* All this does is determine whether a giv can be made replaceable because
5494 its final value can be calculated. This code can not be part of record_giv
5495 above, because final_giv_value requires that the number of loop iterations
5496 be known, and that can not be accurately calculated until after all givs
5497 have been identified. */
5500 check_final_value (v, loop_start, loop_end, n_iterations)
5501 struct induction *v;
5502 rtx loop_start, loop_end;
5503 unsigned HOST_WIDE_INT n_iterations;
5505 struct iv_class *bl;
5506 rtx final_value = 0;
5508 bl = reg_biv_class[REGNO (v->src_reg)];
5510 /* DEST_ADDR givs will never reach here, because they are always marked
5511 replaceable above in record_giv. */
5513 /* The giv can be replaced outright by the reduced register only if all
5514 of the following conditions are true:
5515 - the insn that sets the giv is always executed on any iteration
5516 on which the giv is used at all
5517 (there are two ways to deduce this:
5518 either the insn is executed on every iteration,
5519 or all uses follow that insn in the same basic block),
5520 - its final value can be calculated (this condition is different
5521 than the one above in record_giv)
5522 - no assignments to the biv occur during the giv's lifetime. */
5525 /* This is only called now when replaceable is known to be false. */
5526 /* Clear replaceable, so that it won't confuse final_giv_value. */
5530 if ((final_value = final_giv_value (v, loop_start, loop_end, n_iterations))
5531 && (v->always_computable || last_use_this_basic_block (v->dest_reg, v->insn)))
5533 int biv_increment_seen = 0;
5539 /* When trying to determine whether or not a biv increment occurs
5540 during the lifetime of the giv, we can ignore uses of the variable
5541 outside the loop because final_value is true. Hence we can not
5542 use regno_last_uid and regno_first_uid as above in record_giv. */
5544 /* Search the loop to determine whether any assignments to the
5545 biv occur during the giv's lifetime. Start with the insn
5546 that sets the giv, and search around the loop until we come
5547 back to that insn again.
5549 Also fail if there is a jump within the giv's lifetime that jumps
5550 to somewhere outside the lifetime but still within the loop. This
5551 catches spaghetti code where the execution order is not linear, and
5552 hence the above test fails. Here we assume that the giv lifetime
5553 does not extend from one iteration of the loop to the next, so as
5554 to make the test easier. Since the lifetime isn't known yet,
5555 this requires two loops. See also record_giv above. */
5557 last_giv_use = v->insn;
5563 p = NEXT_INSN (loop_start);
5567 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
5568 || GET_CODE (p) == CALL_INSN)
5570 if (biv_increment_seen)
5572 if (reg_mentioned_p (v->dest_reg, PATTERN (p)))
5575 v->not_replaceable = 1;
5579 else if (reg_set_p (v->src_reg, PATTERN (p)))
5580 biv_increment_seen = 1;
5581 else if (reg_mentioned_p (v->dest_reg, PATTERN (p)))
5586 /* Now that the lifetime of the giv is known, check for branches
5587 from within the lifetime to outside the lifetime if it is still
5597 p = NEXT_INSN (loop_start);
5598 if (p == last_giv_use)
5601 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p)
5602 && LABEL_NAME (JUMP_LABEL (p))
5603 && ((INSN_UID (JUMP_LABEL (p)) >= max_uid_for_loop)
5604 || (INSN_UID (v->insn) >= max_uid_for_loop)
5605 || (INSN_UID (last_giv_use) >= max_uid_for_loop)
5606 || (INSN_LUID (JUMP_LABEL (p)) < INSN_LUID (v->insn)
5607 && INSN_LUID (JUMP_LABEL (p)) > INSN_LUID (loop_start))
5608 || (INSN_LUID (JUMP_LABEL (p)) > INSN_LUID (last_giv_use)
5609 && INSN_LUID (JUMP_LABEL (p)) < INSN_LUID (loop_end))))
5612 v->not_replaceable = 1;
5614 if (loop_dump_stream)
5615 fprintf (loop_dump_stream,
5616 "Found branch outside giv lifetime.\n");
5623 /* If it is replaceable, then save the final value. */
5625 v->final_value = final_value;
5628 if (loop_dump_stream && v->replaceable)
5629 fprintf (loop_dump_stream, "Insn %d: giv reg %d final_value replaceable\n",
5630 INSN_UID (v->insn), REGNO (v->dest_reg));
5633 /* Update the status of whether a giv can derive other givs.
5635 We need to do something special if there is or may be an update to the biv
5636 between the time the giv is defined and the time it is used to derive
5639 In addition, a giv that is only conditionally set is not allowed to
5640 derive another giv once a label has been passed.
5642 The cases we look at are when a label or an update to a biv is passed. */
5645 update_giv_derive (p)
5648 struct iv_class *bl;
5649 struct induction *biv, *giv;
5653 /* Search all IV classes, then all bivs, and finally all givs.
5655 There are three cases we are concerned with. First we have the situation
5656 of a giv that is only updated conditionally. In that case, it may not
5657 derive any givs after a label is passed.
5659 The second case is when a biv update occurs, or may occur, after the
5660 definition of a giv. For certain biv updates (see below) that are
5661 known to occur between the giv definition and use, we can adjust the
5662 giv definition. For others, or when the biv update is conditional,
5663 we must prevent the giv from deriving any other givs. There are two
5664 sub-cases within this case.
5666 If this is a label, we are concerned with any biv update that is done
5667 conditionally, since it may be done after the giv is defined followed by
5668 a branch here (actually, we need to pass both a jump and a label, but
5669 this extra tracking doesn't seem worth it).
5671 If this is a jump, we are concerned about any biv update that may be
5672 executed multiple times. We are actually only concerned about
5673 backward jumps, but it is probably not worth performing the test
5674 on the jump again here.
5676 If this is a biv update, we must adjust the giv status to show that a
5677 subsequent biv update was performed. If this adjustment cannot be done,
5678 the giv cannot derive further givs. */
5680 for (bl = loop_iv_list; bl; bl = bl->next)
5681 for (biv = bl->biv; biv; biv = biv->next_iv)
5682 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN
5685 for (giv = bl->giv; giv; giv = giv->next_iv)
5687 /* If cant_derive is already true, there is no point in
5688 checking all of these conditions again. */
5689 if (giv->cant_derive)
5692 /* If this giv is conditionally set and we have passed a label,
5693 it cannot derive anything. */
5694 if (GET_CODE (p) == CODE_LABEL && ! giv->always_computable)
5695 giv->cant_derive = 1;
5697 /* Skip givs that have mult_val == 0, since
5698 they are really invariants. Also skip those that are
5699 replaceable, since we know their lifetime doesn't contain
5701 else if (giv->mult_val == const0_rtx || giv->replaceable)
5704 /* The only way we can allow this giv to derive another
5705 is if this is a biv increment and we can form the product
5706 of biv->add_val and giv->mult_val. In this case, we will
5707 be able to compute a compensation. */
5708 else if (biv->insn == p)
5712 if (biv->mult_val == const1_rtx)
5713 tem = simplify_giv_expr (gen_rtx_MULT (giv->mode,
5718 if (tem && giv->derive_adjustment)
5719 tem = simplify_giv_expr (gen_rtx_PLUS (giv->mode, tem,
5720 giv->derive_adjustment),
5723 giv->derive_adjustment = tem;
5725 giv->cant_derive = 1;
5727 else if ((GET_CODE (p) == CODE_LABEL && ! biv->always_computable)
5728 || (GET_CODE (p) == JUMP_INSN && biv->maybe_multiple))
5729 giv->cant_derive = 1;
5734 /* Check whether an insn is an increment legitimate for a basic induction var.
5735 X is the source of insn P, or a part of it.
5736 MODE is the mode in which X should be interpreted.
5738 DEST_REG is the putative biv, also the destination of the insn.
5739 We accept patterns of these forms:
5740 REG = REG + INVARIANT (includes REG = REG - CONSTANT)
5741 REG = INVARIANT + REG
5743 If X is suitable, we return 1, set *MULT_VAL to CONST1_RTX,
5744 store the additive term into *INC_VAL, and store the place where
5745 we found the additive term into *LOCATION.
5747 If X is an assignment of an invariant into DEST_REG, we set
5748 *MULT_VAL to CONST0_RTX, and store the invariant into *INC_VAL.
5750 We also want to detect a BIV when it corresponds to a variable
5751 whose mode was promoted via PROMOTED_MODE. In that case, an increment
5752 of the variable may be a PLUS that adds a SUBREG of that variable to
5753 an invariant and then sign- or zero-extends the result of the PLUS
5756 Most GIVs in such cases will be in the promoted mode, since that is the
5757 probably the natural computation mode (and almost certainly the mode
5758 used for addresses) on the machine. So we view the pseudo-reg containing
5759 the variable as the BIV, as if it were simply incremented.
5761 Note that treating the entire pseudo as a BIV will result in making
5762 simple increments to any GIVs based on it. However, if the variable
5763 overflows in its declared mode but not its promoted mode, the result will
5764 be incorrect. This is acceptable if the variable is signed, since
5765 overflows in such cases are undefined, but not if it is unsigned, since
5766 those overflows are defined. So we only check for SIGN_EXTEND and
5769 If we cannot find a biv, we return 0. */
5772 basic_induction_var (x, mode, dest_reg, p, inc_val, mult_val, location)
5774 enum machine_mode mode;
5781 register enum rtx_code code;
5785 code = GET_CODE (x);
5789 if (rtx_equal_p (XEXP (x, 0), dest_reg)
5790 || (GET_CODE (XEXP (x, 0)) == SUBREG
5791 && SUBREG_PROMOTED_VAR_P (XEXP (x, 0))
5792 && SUBREG_REG (XEXP (x, 0)) == dest_reg))
5794 argp = &XEXP (x, 1);
5796 else if (rtx_equal_p (XEXP (x, 1), dest_reg)
5797 || (GET_CODE (XEXP (x, 1)) == SUBREG
5798 && SUBREG_PROMOTED_VAR_P (XEXP (x, 1))
5799 && SUBREG_REG (XEXP (x, 1)) == dest_reg))
5801 argp = &XEXP (x, 0);
5807 if (invariant_p (arg) != 1)
5810 *inc_val = convert_modes (GET_MODE (dest_reg), GET_MODE (x), arg, 0);
5811 *mult_val = const1_rtx;
5816 /* If this is a SUBREG for a promoted variable, check the inner
5818 if (SUBREG_PROMOTED_VAR_P (x))
5819 return basic_induction_var (SUBREG_REG (x), GET_MODE (SUBREG_REG (x)),
5820 dest_reg, p, inc_val, mult_val, location);
5824 /* If this register is assigned in a previous insn, look at its
5825 source, but don't go outside the loop or past a label. */
5831 insn = PREV_INSN (insn);
5832 } while (insn && GET_CODE (insn) == NOTE
5833 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG);
5837 set = single_set (insn);
5841 if ((SET_DEST (set) == x
5842 || (GET_CODE (SET_DEST (set)) == SUBREG
5843 && (GET_MODE_SIZE (GET_MODE (SET_DEST (set)))
5845 && SUBREG_REG (SET_DEST (set)) == x))
5846 && basic_induction_var (SET_SRC (set),
5847 (GET_MODE (SET_SRC (set)) == VOIDmode
5849 : GET_MODE (SET_SRC (set))),
5851 inc_val, mult_val, location))
5854 /* ... fall through ... */
5856 /* Can accept constant setting of biv only when inside inner most loop.
5857 Otherwise, a biv of an inner loop may be incorrectly recognized
5858 as a biv of the outer loop,
5859 causing code to be moved INTO the inner loop. */
5861 if (invariant_p (x) != 1)
5866 /* convert_modes aborts if we try to convert to or from CCmode, so just
5867 exclude that case. It is very unlikely that a condition code value
5868 would be a useful iterator anyways. */
5869 if (loops_enclosed == 1
5870 && GET_MODE_CLASS (mode) != MODE_CC
5871 && GET_MODE_CLASS (GET_MODE (dest_reg)) != MODE_CC)
5873 /* Possible bug here? Perhaps we don't know the mode of X. */
5874 *inc_val = convert_modes (GET_MODE (dest_reg), mode, x, 0);
5875 *mult_val = const0_rtx;
5882 return basic_induction_var (XEXP (x, 0), GET_MODE (XEXP (x, 0)),
5883 dest_reg, p, inc_val, mult_val, location);
5886 /* Similar, since this can be a sign extension. */
5887 for (insn = PREV_INSN (p);
5888 (insn && GET_CODE (insn) == NOTE
5889 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG);
5890 insn = PREV_INSN (insn))
5894 set = single_set (insn);
5896 if (set && SET_DEST (set) == XEXP (x, 0)
5897 && GET_CODE (XEXP (x, 1)) == CONST_INT
5898 && INTVAL (XEXP (x, 1)) >= 0
5899 && GET_CODE (SET_SRC (set)) == ASHIFT
5900 && XEXP (x, 1) == XEXP (SET_SRC (set), 1))
5901 return basic_induction_var (XEXP (SET_SRC (set), 0),
5902 GET_MODE (XEXP (x, 0)),
5903 dest_reg, insn, inc_val, mult_val,
5912 /* A general induction variable (giv) is any quantity that is a linear
5913 function of a basic induction variable,
5914 i.e. giv = biv * mult_val + add_val.
5915 The coefficients can be any loop invariant quantity.
5916 A giv need not be computed directly from the biv;
5917 it can be computed by way of other givs. */
5919 /* Determine whether X computes a giv.
5920 If it does, return a nonzero value
5921 which is the benefit from eliminating the computation of X;
5922 set *SRC_REG to the register of the biv that it is computed from;
5923 set *ADD_VAL and *MULT_VAL to the coefficients,
5924 such that the value of X is biv * mult + add; */
5927 general_induction_var (x, src_reg, add_val, mult_val, is_addr, pbenefit)
5938 /* If this is an invariant, forget it, it isn't a giv. */
5939 if (invariant_p (x) == 1)
5942 /* See if the expression could be a giv and get its form.
5943 Mark our place on the obstack in case we don't find a giv. */
5944 storage = (char *) oballoc (0);
5946 x = simplify_giv_expr (x, pbenefit);
5953 switch (GET_CODE (x))
5957 /* Since this is now an invariant and wasn't before, it must be a giv
5958 with MULT_VAL == 0. It doesn't matter which BIV we associate this
5960 *src_reg = loop_iv_list->biv->dest_reg;
5961 *mult_val = const0_rtx;
5966 /* This is equivalent to a BIV. */
5968 *mult_val = const1_rtx;
5969 *add_val = const0_rtx;
5973 /* Either (plus (biv) (invar)) or
5974 (plus (mult (biv) (invar_1)) (invar_2)). */
5975 if (GET_CODE (XEXP (x, 0)) == MULT)
5977 *src_reg = XEXP (XEXP (x, 0), 0);
5978 *mult_val = XEXP (XEXP (x, 0), 1);
5982 *src_reg = XEXP (x, 0);
5983 *mult_val = const1_rtx;
5985 *add_val = XEXP (x, 1);
5989 /* ADD_VAL is zero. */
5990 *src_reg = XEXP (x, 0);
5991 *mult_val = XEXP (x, 1);
5992 *add_val = const0_rtx;
5999 /* Remove any enclosing USE from ADD_VAL and MULT_VAL (there will be
6000 unless they are CONST_INT). */
6001 if (GET_CODE (*add_val) == USE)
6002 *add_val = XEXP (*add_val, 0);
6003 if (GET_CODE (*mult_val) == USE)
6004 *mult_val = XEXP (*mult_val, 0);
6009 *pbenefit += ADDRESS_COST (orig_x) - reg_address_cost;
6011 *pbenefit += rtx_cost (orig_x, MEM) - reg_address_cost;
6015 *pbenefit += rtx_cost (orig_x, SET);
6017 /* Always return true if this is a giv so it will be detected as such,
6018 even if the benefit is zero or negative. This allows elimination
6019 of bivs that might otherwise not be eliminated. */
6023 /* Given an expression, X, try to form it as a linear function of a biv.
6024 We will canonicalize it to be of the form
6025 (plus (mult (BIV) (invar_1))
6027 with possible degeneracies.
6029 The invariant expressions must each be of a form that can be used as a
6030 machine operand. We surround then with a USE rtx (a hack, but localized
6031 and certainly unambiguous!) if not a CONST_INT for simplicity in this
6032 routine; it is the caller's responsibility to strip them.
6034 If no such canonicalization is possible (i.e., two biv's are used or an
6035 expression that is neither invariant nor a biv or giv), this routine
6038 For a non-zero return, the result will have a code of CONST_INT, USE,
6039 REG (for a BIV), PLUS, or MULT. No other codes will occur.
6041 *BENEFIT will be incremented by the benefit of any sub-giv encountered. */
6043 static rtx sge_plus PROTO ((enum machine_mode, rtx, rtx));
6044 static rtx sge_plus_constant PROTO ((rtx, rtx));
6047 simplify_giv_expr (x, benefit)
6051 enum machine_mode mode = GET_MODE (x);
6055 /* If this is not an integer mode, or if we cannot do arithmetic in this
6056 mode, this can't be a giv. */
6057 if (mode != VOIDmode
6058 && (GET_MODE_CLASS (mode) != MODE_INT
6059 || GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT))
6062 switch (GET_CODE (x))
6065 arg0 = simplify_giv_expr (XEXP (x, 0), benefit);
6066 arg1 = simplify_giv_expr (XEXP (x, 1), benefit);
6067 if (arg0 == 0 || arg1 == 0)
6070 /* Put constant last, CONST_INT last if both constant. */
6071 if ((GET_CODE (arg0) == USE
6072 || GET_CODE (arg0) == CONST_INT)
6073 && ! ((GET_CODE (arg0) == USE
6074 && GET_CODE (arg1) == USE)
6075 || GET_CODE (arg1) == CONST_INT))
6076 tem = arg0, arg0 = arg1, arg1 = tem;
6078 /* Handle addition of zero, then addition of an invariant. */
6079 if (arg1 == const0_rtx)
6081 else if (GET_CODE (arg1) == CONST_INT || GET_CODE (arg1) == USE)
6082 switch (GET_CODE (arg0))
6086 /* Adding two invariants must result in an invariant, so enclose
6087 addition operation inside a USE and return it. */
6088 if (GET_CODE (arg0) == USE)
6089 arg0 = XEXP (arg0, 0);
6090 if (GET_CODE (arg1) == USE)
6091 arg1 = XEXP (arg1, 0);
6093 if (GET_CODE (arg0) == CONST_INT)
6094 tem = arg0, arg0 = arg1, arg1 = tem;
6095 if (GET_CODE (arg1) == CONST_INT)
6096 tem = sge_plus_constant (arg0, arg1);
6098 tem = sge_plus (mode, arg0, arg1);
6100 if (GET_CODE (tem) != CONST_INT)
6101 tem = gen_rtx_USE (mode, tem);
6106 /* biv + invar or mult + invar. Return sum. */
6107 return gen_rtx_PLUS (mode, arg0, arg1);
6110 /* (a + invar_1) + invar_2. Associate. */
6111 return simplify_giv_expr (
6112 gen_rtx_PLUS (mode, XEXP (arg0, 0),
6113 gen_rtx_PLUS (mode, XEXP (arg0, 1), arg1)),
6120 /* Each argument must be either REG, PLUS, or MULT. Convert REG to
6121 MULT to reduce cases. */
6122 if (GET_CODE (arg0) == REG)
6123 arg0 = gen_rtx_MULT (mode, arg0, const1_rtx);
6124 if (GET_CODE (arg1) == REG)
6125 arg1 = gen_rtx_MULT (mode, arg1, const1_rtx);
6127 /* Now have PLUS + PLUS, PLUS + MULT, MULT + PLUS, or MULT + MULT.
6128 Put a MULT first, leaving PLUS + PLUS, MULT + PLUS, or MULT + MULT.
6129 Recurse to associate the second PLUS. */
6130 if (GET_CODE (arg1) == MULT)
6131 tem = arg0, arg0 = arg1, arg1 = tem;
6133 if (GET_CODE (arg1) == PLUS)
6134 return simplify_giv_expr (gen_rtx_PLUS (mode,
6135 gen_rtx_PLUS (mode, arg0,
6140 /* Now must have MULT + MULT. Distribute if same biv, else not giv. */
6141 if (GET_CODE (arg0) != MULT || GET_CODE (arg1) != MULT)
6144 if (!rtx_equal_p (arg0, arg1))
6147 return simplify_giv_expr (gen_rtx_MULT (mode,
6155 /* Handle "a - b" as "a + b * (-1)". */
6156 return simplify_giv_expr (gen_rtx_PLUS (mode,
6158 gen_rtx_MULT (mode, XEXP (x, 1),
6163 arg0 = simplify_giv_expr (XEXP (x, 0), benefit);
6164 arg1 = simplify_giv_expr (XEXP (x, 1), benefit);
6165 if (arg0 == 0 || arg1 == 0)
6168 /* Put constant last, CONST_INT last if both constant. */
6169 if ((GET_CODE (arg0) == USE || GET_CODE (arg0) == CONST_INT)
6170 && GET_CODE (arg1) != CONST_INT)
6171 tem = arg0, arg0 = arg1, arg1 = tem;
6173 /* If second argument is not now constant, not giv. */
6174 if (GET_CODE (arg1) != USE && GET_CODE (arg1) != CONST_INT)
6177 /* Handle multiply by 0 or 1. */
6178 if (arg1 == const0_rtx)
6181 else if (arg1 == const1_rtx)
6184 switch (GET_CODE (arg0))
6187 /* biv * invar. Done. */
6188 return gen_rtx_MULT (mode, arg0, arg1);
6191 /* Product of two constants. */
6192 return GEN_INT (INTVAL (arg0) * INTVAL (arg1));
6195 /* invar * invar. It is a giv, but very few of these will
6196 actually pay off, so limit to simple registers. */
6197 if (GET_CODE (arg1) != CONST_INT)
6200 arg0 = XEXP (arg0, 0);
6201 if (GET_CODE (arg0) == REG)
6202 tem = gen_rtx_MULT (mode, arg0, arg1);
6203 else if (GET_CODE (arg0) == MULT
6204 && GET_CODE (XEXP (arg0, 0)) == REG
6205 && GET_CODE (XEXP (arg0, 1)) == CONST_INT)
6207 tem = gen_rtx_MULT (mode, XEXP (arg0, 0),
6208 GEN_INT (INTVAL (XEXP (arg0, 1))
6213 return gen_rtx_USE (mode, tem);
6216 /* (a * invar_1) * invar_2. Associate. */
6217 return simplify_giv_expr (gen_rtx_MULT (mode, XEXP (arg0, 0),
6224 /* (a + invar_1) * invar_2. Distribute. */
6225 return simplify_giv_expr (gen_rtx_PLUS (mode,
6239 /* Shift by constant is multiply by power of two. */
6240 if (GET_CODE (XEXP (x, 1)) != CONST_INT)
6243 return simplify_giv_expr (gen_rtx_MULT (mode,
6245 GEN_INT ((HOST_WIDE_INT) 1
6246 << INTVAL (XEXP (x, 1)))),
6250 /* "-a" is "a * (-1)" */
6251 return simplify_giv_expr (gen_rtx_MULT (mode, XEXP (x, 0), constm1_rtx),
6255 /* "~a" is "-a - 1". Silly, but easy. */
6256 return simplify_giv_expr (gen_rtx_MINUS (mode,
6257 gen_rtx_NEG (mode, XEXP (x, 0)),
6262 /* Already in proper form for invariant. */
6266 /* If this is a new register, we can't deal with it. */
6267 if (REGNO (x) >= max_reg_before_loop)
6270 /* Check for biv or giv. */
6271 switch (REG_IV_TYPE (REGNO (x)))
6275 case GENERAL_INDUCT:
6277 struct induction *v = REG_IV_INFO (REGNO (x));
6279 /* Form expression from giv and add benefit. Ensure this giv
6280 can derive another and subtract any needed adjustment if so. */
6281 *benefit += v->benefit;
6285 tem = gen_rtx_PLUS (mode, gen_rtx_MULT (mode, v->src_reg,
6288 if (v->derive_adjustment)
6289 tem = gen_rtx_MINUS (mode, tem, v->derive_adjustment);
6290 return simplify_giv_expr (tem, benefit);
6294 /* If it isn't an induction variable, and it is invariant, we
6295 may be able to simplify things further by looking through
6296 the bits we just moved outside the loop. */
6297 if (invariant_p (x) == 1)
6301 for (m = the_movables; m ; m = m->next)
6302 if (rtx_equal_p (x, m->set_dest))
6304 /* Ok, we found a match. Substitute and simplify. */
6306 /* If we match another movable, we must use that, as
6307 this one is going away. */
6309 return simplify_giv_expr (m->match->set_dest, benefit);
6311 /* If consec is non-zero, this is a member of a group of
6312 instructions that were moved together. We handle this
6313 case only to the point of seeking to the last insn and
6314 looking for a REG_EQUAL. Fail if we don't find one. */
6319 do { tem = NEXT_INSN (tem); } while (--i > 0);
6321 tem = find_reg_note (tem, REG_EQUAL, NULL_RTX);
6323 tem = XEXP (tem, 0);
6327 tem = single_set (m->insn);
6329 tem = SET_SRC (tem);
6334 /* What we are most interested in is pointer
6335 arithmetic on invariants -- only take
6336 patterns we may be able to do something with. */
6337 if (GET_CODE (tem) == PLUS
6338 || GET_CODE (tem) == MULT
6339 || GET_CODE (tem) == ASHIFT
6340 || GET_CODE (tem) == CONST_INT
6341 || GET_CODE (tem) == SYMBOL_REF)
6343 tem = simplify_giv_expr (tem, benefit);
6347 else if (GET_CODE (tem) == CONST
6348 && GET_CODE (XEXP (tem, 0)) == PLUS
6349 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == SYMBOL_REF
6350 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)
6352 tem = simplify_giv_expr (XEXP (tem, 0), benefit);
6363 /* Fall through to general case. */
6365 /* If invariant, return as USE (unless CONST_INT).
6366 Otherwise, not giv. */
6367 if (GET_CODE (x) == USE)
6370 if (invariant_p (x) == 1)
6372 if (GET_CODE (x) == CONST_INT)
6374 if (GET_CODE (x) == CONST
6375 && GET_CODE (XEXP (x, 0)) == PLUS
6376 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
6377 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
6379 return gen_rtx_USE (mode, x);
6386 /* This routine folds invariants such that there is only ever one
6387 CONST_INT in the summation. It is only used by simplify_giv_expr. */
6390 sge_plus_constant (x, c)
6393 if (GET_CODE (x) == CONST_INT)
6394 return GEN_INT (INTVAL (x) + INTVAL (c));
6395 else if (GET_CODE (x) != PLUS)
6396 return gen_rtx_PLUS (GET_MODE (x), x, c);
6397 else if (GET_CODE (XEXP (x, 1)) == CONST_INT)
6399 return gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0),
6400 GEN_INT (INTVAL (XEXP (x, 1)) + INTVAL (c)));
6402 else if (GET_CODE (XEXP (x, 0)) == PLUS
6403 || GET_CODE (XEXP (x, 1)) != PLUS)
6405 return gen_rtx_PLUS (GET_MODE (x),
6406 sge_plus_constant (XEXP (x, 0), c), XEXP (x, 1));
6410 return gen_rtx_PLUS (GET_MODE (x),
6411 sge_plus_constant (XEXP (x, 1), c), XEXP (x, 0));
6416 sge_plus (mode, x, y)
6417 enum machine_mode mode;
6420 while (GET_CODE (y) == PLUS)
6422 rtx a = XEXP (y, 0);
6423 if (GET_CODE (a) == CONST_INT)
6424 x = sge_plus_constant (x, a);
6426 x = gen_rtx_PLUS (mode, x, a);
6429 if (GET_CODE (y) == CONST_INT)
6430 x = sge_plus_constant (x, y);
6432 x = gen_rtx_PLUS (mode, x, y);
6436 /* Help detect a giv that is calculated by several consecutive insns;
6440 The caller has already identified the first insn P as having a giv as dest;
6441 we check that all other insns that set the same register follow
6442 immediately after P, that they alter nothing else,
6443 and that the result of the last is still a giv.
6445 The value is 0 if the reg set in P is not really a giv.
6446 Otherwise, the value is the amount gained by eliminating
6447 all the consecutive insns that compute the value.
6449 FIRST_BENEFIT is the amount gained by eliminating the first insn, P.
6450 SRC_REG is the reg of the biv; DEST_REG is the reg of the giv.
6452 The coefficients of the ultimate giv value are stored in
6453 *MULT_VAL and *ADD_VAL. */
6456 consec_sets_giv (first_benefit, p, src_reg, dest_reg,
6457 add_val, mult_val, last_consec_insn)
6464 rtx *last_consec_insn;
6472 /* Indicate that this is a giv so that we can update the value produced in
6473 each insn of the multi-insn sequence.
6475 This induction structure will be used only by the call to
6476 general_induction_var below, so we can allocate it on our stack.
6477 If this is a giv, our caller will replace the induct var entry with
6478 a new induction structure. */
6480 = (struct induction *) alloca (sizeof (struct induction));
6481 v->src_reg = src_reg;
6482 v->mult_val = *mult_val;
6483 v->add_val = *add_val;
6484 v->benefit = first_benefit;
6486 v->derive_adjustment = 0;
6488 REG_IV_TYPE (REGNO (dest_reg)) = GENERAL_INDUCT;
6489 REG_IV_INFO (REGNO (dest_reg)) = v;
6491 count = VARRAY_INT (n_times_set, REGNO (dest_reg)) - 1;
6496 code = GET_CODE (p);
6498 /* If libcall, skip to end of call sequence. */
6499 if (code == INSN && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
6503 && (set = single_set (p))
6504 && GET_CODE (SET_DEST (set)) == REG
6505 && SET_DEST (set) == dest_reg
6506 && (general_induction_var (SET_SRC (set), &src_reg,
6507 add_val, mult_val, 0, &benefit)
6508 /* Giv created by equivalent expression. */
6509 || ((temp = find_reg_note (p, REG_EQUAL, NULL_RTX))
6510 && general_induction_var (XEXP (temp, 0), &src_reg,
6511 add_val, mult_val, 0, &benefit)))
6512 && src_reg == v->src_reg)
6514 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
6515 benefit += libcall_benefit (p);
6518 v->mult_val = *mult_val;
6519 v->add_val = *add_val;
6520 v->benefit = benefit;
6522 else if (code != NOTE)
6524 /* Allow insns that set something other than this giv to a
6525 constant. Such insns are needed on machines which cannot
6526 include long constants and should not disqualify a giv. */
6528 && (set = single_set (p))
6529 && SET_DEST (set) != dest_reg
6530 && CONSTANT_P (SET_SRC (set)))
6533 REG_IV_TYPE (REGNO (dest_reg)) = UNKNOWN_INDUCT;
6538 *last_consec_insn = p;
6542 /* Return an rtx, if any, that expresses giv G2 as a function of the register
6543 represented by G1. If no such expression can be found, or it is clear that
6544 it cannot possibly be a valid address, 0 is returned.
6546 To perform the computation, we note that
6549 where `v' is the biv.
6551 So G2 = (y/b) * G1 + (b - a*y/x).
6553 Note that MULT = y/x.
6555 Update: A and B are now allowed to be additive expressions such that
6556 B contains all variables in A. That is, computing B-A will not require
6557 subtracting variables. */
6560 express_from_1 (a, b, mult)
6563 /* If MULT is zero, then A*MULT is zero, and our expression is B. */
6565 if (mult == const0_rtx)
6568 /* If MULT is not 1, we cannot handle A with non-constants, since we
6569 would then be required to subtract multiples of the registers in A.
6570 This is theoretically possible, and may even apply to some Fortran
6571 constructs, but it is a lot of work and we do not attempt it here. */
6573 if (mult != const1_rtx && GET_CODE (a) != CONST_INT)
6576 /* In general these structures are sorted top to bottom (down the PLUS
6577 chain), but not left to right across the PLUS. If B is a higher
6578 order giv than A, we can strip one level and recurse. If A is higher
6579 order, we'll eventually bail out, but won't know that until the end.
6580 If they are the same, we'll strip one level around this loop. */
6582 while (GET_CODE (a) == PLUS && GET_CODE (b) == PLUS)
6584 rtx ra, rb, oa, ob, tmp;
6586 ra = XEXP (a, 0), oa = XEXP (a, 1);
6587 if (GET_CODE (ra) == PLUS)
6588 tmp = ra, ra = oa, oa = tmp;
6590 rb = XEXP (b, 0), ob = XEXP (b, 1);
6591 if (GET_CODE (rb) == PLUS)
6592 tmp = rb, rb = ob, ob = tmp;
6594 if (rtx_equal_p (ra, rb))
6595 /* We matched: remove one reg completely. */
6597 else if (GET_CODE (ob) != PLUS && rtx_equal_p (ra, ob))
6598 /* An alternate match. */
6600 else if (GET_CODE (oa) != PLUS && rtx_equal_p (oa, rb))
6601 /* An alternate match. */
6605 /* Indicates an extra register in B. Strip one level from B and
6606 recurse, hoping B was the higher order expression. */
6607 ob = express_from_1 (a, ob, mult);
6610 return gen_rtx_PLUS (GET_MODE (b), rb, ob);
6614 /* Here we are at the last level of A, go through the cases hoping to
6615 get rid of everything but a constant. */
6617 if (GET_CODE (a) == PLUS)
6621 ra = XEXP (a, 0), oa = XEXP (a, 1);
6622 if (rtx_equal_p (oa, b))
6624 else if (!rtx_equal_p (ra, b))
6627 if (GET_CODE (oa) != CONST_INT)
6630 return GEN_INT (-INTVAL (oa) * INTVAL (mult));
6632 else if (GET_CODE (a) == CONST_INT)
6634 return plus_constant (b, -INTVAL (a) * INTVAL (mult));
6636 else if (GET_CODE (b) == PLUS)
6638 if (rtx_equal_p (a, XEXP (b, 0)))
6640 else if (rtx_equal_p (a, XEXP (b, 1)))
6645 else if (rtx_equal_p (a, b))
6652 express_from (g1, g2)
6653 struct induction *g1, *g2;
6657 /* The value that G1 will be multiplied by must be a constant integer. Also,
6658 the only chance we have of getting a valid address is if b*c/a (see above
6659 for notation) is also an integer. */
6660 if (GET_CODE (g1->mult_val) == CONST_INT
6661 && GET_CODE (g2->mult_val) == CONST_INT)
6663 if (g1->mult_val == const0_rtx
6664 || INTVAL (g2->mult_val) % INTVAL (g1->mult_val) != 0)
6666 mult = GEN_INT (INTVAL (g2->mult_val) / INTVAL (g1->mult_val));
6668 else if (rtx_equal_p (g1->mult_val, g2->mult_val))
6672 /* ??? Find out if the one is a multiple of the other? */
6676 add = express_from_1 (g1->add_val, g2->add_val, mult);
6677 if (add == NULL_RTX)
6680 /* Form simplified final result. */
6681 if (mult == const0_rtx)
6683 else if (mult == const1_rtx)
6684 mult = g1->dest_reg;
6686 mult = gen_rtx_MULT (g2->mode, g1->dest_reg, mult);
6688 if (add == const0_rtx)
6692 if (GET_CODE (add) == PLUS
6693 && CONSTANT_P (XEXP (add, 1)))
6695 rtx tem = XEXP (add, 1);
6696 mult = gen_rtx_PLUS (g2->mode, mult, XEXP (add, 0));
6700 return gen_rtx_PLUS (g2->mode, mult, add);
6705 /* Return an rtx, if any, that expresses giv G2 as a function of the register
6706 represented by G1. This indicates that G2 should be combined with G1 and
6707 that G2 can use (either directly or via an address expression) a register
6708 used to represent G1. */
6711 combine_givs_p (g1, g2)
6712 struct induction *g1, *g2;
6714 rtx tem = express_from (g1, g2);
6716 /* If these givs are identical, they can be combined. We use the results
6717 of express_from because the addends are not in a canonical form, so
6718 rtx_equal_p is a weaker test. */
6719 /* But don't combine a DEST_REG giv with a DEST_ADDR giv; we want the
6720 combination to be the other way round. */
6721 if (tem == g1->dest_reg
6722 && (g1->giv_type == DEST_REG || g2->giv_type == DEST_ADDR))
6724 return g1->dest_reg;
6727 /* If G2 can be expressed as a function of G1 and that function is valid
6728 as an address and no more expensive than using a register for G2,
6729 the expression of G2 in terms of G1 can be used. */
6731 && g2->giv_type == DEST_ADDR
6732 && memory_address_p (g2->mem_mode, tem)
6733 /* ??? Looses, especially with -fforce-addr, where *g2->location
6734 will always be a register, and so anything more complicated
6738 && ADDRESS_COST (tem) <= ADDRESS_COST (*g2->location)
6740 && rtx_cost (tem, MEM) <= rtx_cost (*g2->location, MEM)
6751 struct combine_givs_stats
6758 cmp_combine_givs_stats (x, y)
6759 struct combine_givs_stats *x, *y;
6762 d = y->total_benefit - x->total_benefit;
6763 /* Stabilize the sort. */
6765 d = x->giv_number - y->giv_number;
6769 /* If one of these givs is a DEST_REG that was used by the other giv,
6770 this is actually a single use. Return 0 if this is not
6771 the case, -1 if g1 is the DEST_REG involved, and 1 if it was g2. */
6774 combine_givs_used_by_other (g1, g2)
6775 struct induction *g1, *g2;
6777 if (g1->giv_type == DEST_REG
6778 && reg_mentioned_p (g1->dest_reg, PATTERN (g2->insn)))
6781 if (g2->giv_type == DEST_REG
6782 && reg_mentioned_p (g2->dest_reg, PATTERN (g1->insn)))
6789 combine_givs_benefit_from (g1, g2)
6790 struct induction *g1, *g2;
6792 int tmp = combine_givs_used_by_other (g1, g2);
6796 return g2->benefit - g1->benefit;
6801 /* Check all pairs of givs for iv_class BL and see if any can be combined with
6802 any other. If so, point SAME to the giv combined with and set NEW_REG to
6803 be an expression (in terms of the other giv's DEST_REG) equivalent to the
6804 giv. Also, update BENEFIT and related fields for cost/benefit analysis. */
6808 struct iv_class *bl;
6810 struct induction *g1, *g2, **giv_array;
6811 int i, j, k, giv_count;
6812 struct combine_givs_stats *stats;
6815 /* Count givs, because bl->giv_count is incorrect here. */
6817 for (g1 = bl->giv; g1; g1 = g1->next_iv)
6822 = (struct induction **) alloca (giv_count * sizeof (struct induction *));
6824 for (g1 = bl->giv; g1; g1 = g1->next_iv)
6826 giv_array[i++] = g1;
6828 stats = (struct combine_givs_stats *) alloca (giv_count * sizeof (*stats));
6829 bzero ((char *) stats, giv_count * sizeof (*stats));
6831 can_combine = (rtx *) alloca (giv_count * giv_count * sizeof(rtx));
6832 bzero ((char *) can_combine, giv_count * giv_count * sizeof(rtx));
6834 for (i = 0; i < giv_count; i++)
6840 this_benefit = g1->benefit;
6841 /* Add an additional weight for zero addends. */
6842 if (g1->no_const_addval)
6844 for (j = 0; j < giv_count; j++)
6850 && (this_combine = combine_givs_p (g1, g2)) != NULL_RTX)
6852 can_combine[i*giv_count + j] = this_combine;
6853 this_benefit += combine_givs_benefit_from (g1, g2);
6854 /* Add an additional weight for being reused more times. */
6858 stats[i].giv_number = i;
6859 stats[i].total_benefit = this_benefit;
6862 /* Iterate, combining until we can't. */
6864 qsort (stats, giv_count, sizeof(*stats), cmp_combine_givs_stats);
6866 if (loop_dump_stream)
6868 fprintf (loop_dump_stream, "Sorted combine statistics:\n");
6869 for (k = 0; k < giv_count; k++)
6871 g1 = giv_array[stats[k].giv_number];
6872 if (!g1->combined_with && !g1->same)
6873 fprintf (loop_dump_stream, " {%d, %d}",
6874 INSN_UID (giv_array[stats[k].giv_number]->insn),
6875 stats[k].total_benefit);
6877 putc ('\n', loop_dump_stream);
6880 for (k = 0; k < giv_count; k++)
6882 int g1_add_benefit = 0;
6884 i = stats[k].giv_number;
6887 /* If it has already been combined, skip. */
6888 if (g1->combined_with || g1->same)
6891 for (j = 0; j < giv_count; j++)
6894 if (g1 != g2 && can_combine[i*giv_count + j]
6895 /* If it has already been combined, skip. */
6896 && ! g2->same && ! g2->combined_with)
6900 g2->new_reg = can_combine[i*giv_count + j];
6902 g1->combined_with++;
6903 g1->lifetime += g2->lifetime;
6905 g1_add_benefit += combine_givs_benefit_from (g1, g2);
6907 /* ??? The new final_[bg]iv_value code does a much better job
6908 of finding replaceable giv's, and hence this code may no
6909 longer be necessary. */
6910 if (! g2->replaceable && REG_USERVAR_P (g2->dest_reg))
6911 g1_add_benefit -= copy_cost;
6913 /* To help optimize the next set of combinations, remove
6914 this giv from the benefits of other potential mates. */
6915 for (l = 0; l < giv_count; ++l)
6917 int m = stats[l].giv_number;
6918 if (can_combine[m*giv_count + j])
6920 /* Remove additional weight for being reused. */
6921 stats[l].total_benefit -= 3 +
6922 combine_givs_benefit_from (giv_array[m], g2);
6926 if (loop_dump_stream)
6927 fprintf (loop_dump_stream,
6928 "giv at %d combined with giv at %d\n",
6929 INSN_UID (g2->insn), INSN_UID (g1->insn));
6933 /* To help optimize the next set of combinations, remove
6934 this giv from the benefits of other potential mates. */
6935 if (g1->combined_with)
6937 for (j = 0; j < giv_count; ++j)
6939 int m = stats[j].giv_number;
6940 if (can_combine[m*giv_count + j])
6942 /* Remove additional weight for being reused. */
6943 stats[j].total_benefit -= 3 +
6944 combine_givs_benefit_from (giv_array[m], g1);
6948 g1->benefit += g1_add_benefit;
6950 /* We've finished with this giv, and everything it touched.
6951 Restart the combination so that proper weights for the
6952 rest of the givs are properly taken into account. */
6953 /* ??? Ideally we would compact the arrays at this point, so
6954 as to not cover old ground. But sanely compacting
6955 can_combine is tricky. */
6961 struct recombine_givs_stats
6964 int start_luid, end_luid;
6967 /* Used below as comparison function for qsort. We want a ascending luid
6968 when scanning the array starting at the end, thus the arguments are
6971 cmp_recombine_givs_stats (x, y)
6972 struct recombine_givs_stats *x, *y;
6975 d = y->start_luid - x->start_luid;
6976 /* Stabilize the sort. */
6978 d = y->giv_number - x->giv_number;
6982 /* Scan X, which is a part of INSN, for the end of life of a giv. Also
6983 look for the start of life of a giv where the start has not been seen
6984 yet to unlock the search for the end of its life.
6985 Only consider givs that belong to BIV.
6986 Return the total number of lifetime ends that have been found. */
6988 find_life_end (x, stats, insn, biv)
6990 struct recombine_givs_stats *stats;
6997 code = GET_CODE (x);
7002 rtx reg = SET_DEST (x);
7003 if (GET_CODE (reg) == REG)
7005 int regno = REGNO (reg);
7006 struct induction *v = REG_IV_INFO (regno);
7008 if (REG_IV_TYPE (regno) == GENERAL_INDUCT
7010 && v->src_reg == biv
7011 && stats[v->ix].end_luid <= 0)
7013 /* If we see a 0 here for end_luid, it means that we have
7014 scanned the entire loop without finding any use at all.
7015 We must not predicate this code on a start_luid match
7016 since that would make the test fail for givs that have
7017 been hoisted out of inner loops. */
7018 if (stats[v->ix].end_luid == 0)
7020 stats[v->ix].end_luid = stats[v->ix].start_luid;
7021 return 1 + find_life_end (SET_SRC (x), stats, insn, biv);
7023 else if (stats[v->ix].start_luid == INSN_LUID (insn))
7024 stats[v->ix].end_luid = 0;
7026 return find_life_end (SET_SRC (x), stats, insn, biv);
7032 int regno = REGNO (x);
7033 struct induction *v = REG_IV_INFO (regno);
7035 if (REG_IV_TYPE (regno) == GENERAL_INDUCT
7037 && v->src_reg == biv
7038 && stats[v->ix].end_luid == 0)
7040 while (INSN_UID (insn) >= max_uid_for_loop)
7041 insn = NEXT_INSN (insn);
7042 stats[v->ix].end_luid = INSN_LUID (insn);
7055 fmt = GET_RTX_FORMAT (code);
7057 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
7060 retval += find_life_end (XEXP (x, i), stats, insn, biv);
7062 else if (fmt[i] == 'E')
7063 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
7064 retval += find_life_end (XVECEXP (x, i, j), stats, insn, biv);
7069 /* For each giv that has been combined with another, look if
7070 we can combine it with the most recently used one instead.
7071 This tends to shorten giv lifetimes, and helps the next step:
7072 try to derive givs from other givs. */
7074 recombine_givs (bl, loop_start, loop_end, unroll_p)
7075 struct iv_class *bl;
7076 rtx loop_start, loop_end;
7079 struct induction *v, **giv_array, *last_giv;
7080 struct recombine_givs_stats *stats;
7083 int ends_need_computing;
7085 for (giv_count = 0, v = bl->giv; v; v = v->next_iv)
7091 = (struct induction **) alloca (giv_count * sizeof (struct induction *));
7092 stats = (struct recombine_givs_stats *) alloca (giv_count * sizeof *stats);
7094 /* Initialize stats and set up the ix field for each giv in stats to name
7095 the corresponding index into stats. */
7096 for (i = 0, v = bl->giv; v; v = v->next_iv)
7103 stats[i].giv_number = i;
7104 /* If this giv has been hoisted out of an inner loop, use the luid of
7105 the previous insn. */
7106 for (p = v->insn; INSN_UID (p) >= max_uid_for_loop; )
7108 stats[i].start_luid = INSN_LUID (p);
7113 qsort (stats, giv_count, sizeof(*stats), cmp_recombine_givs_stats);
7115 /* Do the actual most-recently-used recombination. */
7116 for (last_giv = 0, i = giv_count - 1; i >= 0; i--)
7118 v = giv_array[stats[i].giv_number];
7121 struct induction *old_same = v->same;
7124 /* combine_givs_p actually says if we can make this transformation.
7125 The other tests are here only to avoid keeping a giv alive
7126 that could otherwise be eliminated. */
7128 && ((old_same->maybe_dead && ! old_same->combined_with)
7129 || ! last_giv->maybe_dead
7130 || last_giv->combined_with)
7131 && (new_combine = combine_givs_p (last_giv, v)))
7133 old_same->combined_with--;
7134 v->new_reg = new_combine;
7136 last_giv->combined_with++;
7137 /* No need to update lifetimes / benefits here since we have
7138 already decided what to reduce. */
7140 if (loop_dump_stream)
7142 fprintf (loop_dump_stream,
7143 "giv at %d recombined with giv at %d as ",
7144 INSN_UID (v->insn), INSN_UID (last_giv->insn));
7145 print_rtl (loop_dump_stream, v->new_reg);
7146 putc ('\n', loop_dump_stream);
7152 else if (v->giv_type != DEST_REG)
7155 || (last_giv->maybe_dead && ! last_giv->combined_with)
7157 || v->combined_with)
7161 ends_need_computing = 0;
7162 /* For each DEST_REG giv, compute lifetime starts, and try to compute
7163 lifetime ends from regscan info. */
7164 for (i = 0, v = bl->giv; v; v = v->next_iv)
7168 if (v->giv_type == DEST_ADDR)
7170 /* Loop unrolling of an inner loop can even create new DEST_REG
7173 for (p = v->insn; INSN_UID (p) >= max_uid_for_loop; )
7175 stats[i].start_luid = stats[i].end_luid = INSN_LUID (p);
7177 stats[i].end_luid++;
7179 else /* v->giv_type == DEST_REG */
7183 stats[i].start_luid = INSN_LUID (v->insn);
7184 stats[i].end_luid = INSN_LUID (v->last_use);
7186 else if (INSN_UID (v->insn) >= max_uid_for_loop)
7189 /* This insn has been created by loop optimization on an inner
7190 loop. We don't have a proper start_luid that will match
7191 when we see the first set. But we do know that there will
7192 be no use before the set, so we can set end_luid to 0 so that
7193 we'll start looking for the last use right away. */
7194 for (p = PREV_INSN (v->insn); INSN_UID (p) >= max_uid_for_loop; )
7196 stats[i].start_luid = INSN_LUID (p);
7197 stats[i].end_luid = 0;
7198 ends_need_computing++;
7202 int regno = REGNO (v->dest_reg);
7203 int count = VARRAY_INT (n_times_set, regno) - 1;
7206 /* Find the first insn that sets the giv, so that we can verify
7207 if this giv's lifetime wraps around the loop. We also need
7208 the luid of the first setting insn in order to detect the
7209 last use properly. */
7212 p = prev_nonnote_insn (p);
7213 if (reg_set_p (v->dest_reg, p))
7217 stats[i].start_luid = INSN_LUID (p);
7218 if (stats[i].start_luid > uid_luid[REGNO_FIRST_UID (regno)])
7220 stats[i].end_luid = -1;
7221 ends_need_computing++;
7225 stats[i].end_luid = uid_luid[REGNO_LAST_UID (regno)];
7226 if (stats[i].end_luid > INSN_LUID (loop_end))
7228 stats[i].end_luid = -1;
7229 ends_need_computing++;
7237 /* If the regscan information was unconclusive for one or more DEST_REG
7238 givs, scan the all insn in the loop to find out lifetime ends. */
7239 if (ends_need_computing)
7241 rtx biv = bl->biv->src_reg;
7246 if (p == loop_start)
7249 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
7251 ends_need_computing -= find_life_end (PATTERN (p), stats, p, biv);
7253 while (ends_need_computing);
7256 /* Set start_luid back to the last insn that sets the giv. This allows
7257 more combinations. */
7258 for (i = 0, v = bl->giv; v; v = v->next_iv)
7262 if (INSN_UID (v->insn) < max_uid_for_loop)
7263 stats[i].start_luid = INSN_LUID (v->insn);
7267 /* Now adjust lifetime ends by taking combined givs into account. */
7268 for (i = 0, v = bl->giv; v; v = v->next_iv)
7275 if (v->same && ! v->same->ignore)
7278 luid = stats[i].start_luid;
7279 /* Use unsigned arithmetic to model loop wrap-around. */
7280 if (luid - stats[j].start_luid
7281 > (unsigned) stats[j].end_luid - stats[j].start_luid)
7282 stats[j].end_luid = luid;
7287 qsort (stats, giv_count, sizeof(*stats), cmp_recombine_givs_stats);
7289 /* Try to derive DEST_REG givs from previous DEST_REG givs with the
7290 same mult_val and non-overlapping lifetime. This reduces register
7292 Once we find a DEST_REG giv that is suitable to derive others from,
7293 we set last_giv to this giv, and try to derive as many other DEST_REG
7294 givs from it without joining overlapping lifetimes. If we then
7295 encounter a DEST_REG giv that we can't derive, we set rescan to the
7296 index for this giv (unless rescan is already set).
7297 When we are finished with the current LAST_GIV (i.e. the inner loop
7298 terminates), we start again with rescan, which then becomes the new
7300 for (i = giv_count - 1; i >= 0; i = rescan)
7302 int life_start, life_end;
7304 for (last_giv = 0, rescan = -1; i >= 0; i--)
7308 v = giv_array[stats[i].giv_number];
7309 if (v->giv_type != DEST_REG || v->derived_from || v->same)
7313 /* Don't use a giv that's likely to be dead to derive
7314 others - that would be likely to keep that giv alive. */
7315 if (! v->maybe_dead || v->combined_with)
7318 life_start = stats[i].start_luid;
7319 life_end = stats[i].end_luid;
7323 /* Use unsigned arithmetic to model loop wrap around. */
7324 if (((unsigned) stats[i].start_luid - life_start
7325 >= (unsigned) life_end - life_start)
7326 && ((unsigned) stats[i].end_luid - life_start
7327 > (unsigned) life_end - life_start)
7328 /* Check that the giv insn we're about to use for deriving
7329 precedes all uses of that giv. Note that initializing the
7330 derived giv would defeat the purpose of reducing register
7332 ??? We could arrange to move the insn. */
7333 && ((unsigned) stats[i].end_luid - INSN_LUID (loop_start)
7334 > (unsigned) stats[i].start_luid - INSN_LUID (loop_start))
7335 && rtx_equal_p (last_giv->mult_val, v->mult_val)
7336 /* ??? Could handle libcalls, but would need more logic. */
7337 && ! find_reg_note (v->insn, REG_RETVAL, NULL_RTX)
7338 /* We would really like to know if for any giv that v
7339 is combined with, v->insn or any intervening biv increment
7340 dominates that combined giv. However, we
7341 don't have this detailed control flow information.
7342 N.B. since last_giv will be reduced, it is valid
7343 anywhere in the loop, so we don't need to check the
7344 validity of last_giv.
7345 We rely here on the fact that v->always_executed implies that
7346 there is no jump to someplace else in the loop before the
7347 giv insn, and hence any insn that is executed before the
7348 giv insn in the loop will have a lower luid. */
7349 && (v->always_executed || ! v->combined_with)
7350 && (sum = express_from (last_giv, v))
7351 /* Make sure we don't make the add more expensive. ADD_COST
7352 doesn't take different costs of registers and constants into
7353 account, so compare the cost of the actual SET_SRCs. */
7354 && (rtx_cost (sum, SET)
7355 <= rtx_cost (SET_SRC (single_set (v->insn)), SET))
7356 /* ??? unroll can't understand anything but reg + const_int
7357 sums. It would be cleaner to fix unroll. */
7358 && ((GET_CODE (sum) == PLUS
7359 && GET_CODE (XEXP (sum, 0)) == REG
7360 && GET_CODE (XEXP (sum, 1)) == CONST_INT)
7362 && validate_change (v->insn, &PATTERN (v->insn),
7363 gen_rtx_SET (GET_MODE (v->dest_reg),
7364 v->dest_reg, sum), 0))
7366 v->derived_from = last_giv;
7367 v->new_reg = v->dest_reg;
7368 life_end = stats[i].end_luid;
7370 if (loop_dump_stream)
7372 fprintf (loop_dump_stream,
7373 "giv at %d derived from %d as ",
7374 INSN_UID (v->insn), INSN_UID (last_giv->insn));
7375 print_rtl (loop_dump_stream, v->new_reg);
7376 putc ('\n', loop_dump_stream);
7379 else if (rescan < 0)
7385 /* EMIT code before INSERT_BEFORE to set REG = B * M + A. */
7388 emit_iv_add_mult (b, m, a, reg, insert_before)
7389 rtx b; /* initial value of basic induction variable */
7390 rtx m; /* multiplicative constant */
7391 rtx a; /* additive constant */
7392 rtx reg; /* destination register */
7398 /* Prevent unexpected sharing of these rtx. */
7402 /* Increase the lifetime of any invariants moved further in code. */
7403 update_reg_last_use (a, insert_before);
7404 update_reg_last_use (b, insert_before);
7405 update_reg_last_use (m, insert_before);
7408 result = expand_mult_add (b, reg, m, a, GET_MODE (reg), 0);
7410 emit_move_insn (reg, result);
7411 seq = gen_sequence ();
7414 emit_insn_before (seq, insert_before);
7416 /* It is entirely possible that the expansion created lots of new
7417 registers. Iterate over the sequence we just created and
7420 if (GET_CODE (seq) == SEQUENCE)
7423 for (i = 0; i < XVECLEN (seq, 0); ++i)
7425 rtx set = single_set (XVECEXP (seq, 0, i));
7426 if (set && GET_CODE (SET_DEST (set)) == REG)
7427 record_base_value (REGNO (SET_DEST (set)), SET_SRC (set), 0);
7430 else if (GET_CODE (seq) == SET
7431 && GET_CODE (SET_DEST (seq)) == REG)
7432 record_base_value (REGNO (SET_DEST (seq)), SET_SRC (seq), 0);
7435 /* Test whether A * B can be computed without
7436 an actual multiply insn. Value is 1 if so. */
7439 product_cheap_p (a, b)
7445 struct obstack *old_rtl_obstack = rtl_obstack;
7446 char *storage = (char *) obstack_alloc (&temp_obstack, 0);
7449 /* If only one is constant, make it B. */
7450 if (GET_CODE (a) == CONST_INT)
7451 tmp = a, a = b, b = tmp;
7453 /* If first constant, both constant, so don't need multiply. */
7454 if (GET_CODE (a) == CONST_INT)
7457 /* If second not constant, neither is constant, so would need multiply. */
7458 if (GET_CODE (b) != CONST_INT)
7461 /* One operand is constant, so might not need multiply insn. Generate the
7462 code for the multiply and see if a call or multiply, or long sequence
7463 of insns is generated. */
7465 rtl_obstack = &temp_obstack;
7467 expand_mult (GET_MODE (a), a, b, NULL_RTX, 0);
7468 tmp = gen_sequence ();
7471 if (GET_CODE (tmp) == SEQUENCE)
7473 if (XVEC (tmp, 0) == 0)
7475 else if (XVECLEN (tmp, 0) > 3)
7478 for (i = 0; i < XVECLEN (tmp, 0); i++)
7480 rtx insn = XVECEXP (tmp, 0, i);
7482 if (GET_CODE (insn) != INSN
7483 || (GET_CODE (PATTERN (insn)) == SET
7484 && GET_CODE (SET_SRC (PATTERN (insn))) == MULT)
7485 || (GET_CODE (PATTERN (insn)) == PARALLEL
7486 && GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == SET
7487 && GET_CODE (SET_SRC (XVECEXP (PATTERN (insn), 0, 0))) == MULT))
7494 else if (GET_CODE (tmp) == SET
7495 && GET_CODE (SET_SRC (tmp)) == MULT)
7497 else if (GET_CODE (tmp) == PARALLEL
7498 && GET_CODE (XVECEXP (tmp, 0, 0)) == SET
7499 && GET_CODE (SET_SRC (XVECEXP (tmp, 0, 0))) == MULT)
7502 /* Free any storage we obtained in generating this multiply and restore rtl
7503 allocation to its normal obstack. */
7504 obstack_free (&temp_obstack, storage);
7505 rtl_obstack = old_rtl_obstack;
7510 /* Check to see if loop can be terminated by a "decrement and branch until
7511 zero" instruction. If so, add a REG_NONNEG note to the branch insn if so.
7512 Also try reversing an increment loop to a decrement loop
7513 to see if the optimization can be performed.
7514 Value is nonzero if optimization was performed. */
7516 /* This is useful even if the architecture doesn't have such an insn,
7517 because it might change a loops which increments from 0 to n to a loop
7518 which decrements from n to 0. A loop that decrements to zero is usually
7519 faster than one that increments from zero. */
7521 /* ??? This could be rewritten to use some of the loop unrolling procedures,
7522 such as approx_final_value, biv_total_increment, loop_iterations, and
7523 final_[bg]iv_value. */
7526 check_dbra_loop (loop_end, insn_count, loop_start, loop_info)
7530 struct loop_info *loop_info;
7532 struct iv_class *bl;
7539 rtx before_comparison;
7543 int compare_and_branch;
7545 /* If last insn is a conditional branch, and the insn before tests a
7546 register value, try to optimize it. Otherwise, we can't do anything. */
7548 jump = PREV_INSN (loop_end);
7549 comparison = get_condition_for_loop (jump);
7550 if (comparison == 0)
7553 /* Try to compute whether the compare/branch at the loop end is one or
7554 two instructions. */
7555 get_condition (jump, &first_compare);
7556 if (first_compare == jump)
7557 compare_and_branch = 1;
7558 else if (first_compare == prev_nonnote_insn (jump))
7559 compare_and_branch = 2;
7563 /* Check all of the bivs to see if the compare uses one of them.
7564 Skip biv's set more than once because we can't guarantee that
7565 it will be zero on the last iteration. Also skip if the biv is
7566 used between its update and the test insn. */
7568 for (bl = loop_iv_list; bl; bl = bl->next)
7570 if (bl->biv_count == 1
7571 && bl->biv->dest_reg == XEXP (comparison, 0)
7572 && ! reg_used_between_p (regno_reg_rtx[bl->regno], bl->biv->insn,
7580 /* Look for the case where the basic induction variable is always
7581 nonnegative, and equals zero on the last iteration.
7582 In this case, add a reg_note REG_NONNEG, which allows the
7583 m68k DBRA instruction to be used. */
7585 if (((GET_CODE (comparison) == GT
7586 && GET_CODE (XEXP (comparison, 1)) == CONST_INT
7587 && INTVAL (XEXP (comparison, 1)) == -1)
7588 || (GET_CODE (comparison) == NE && XEXP (comparison, 1) == const0_rtx))
7589 && GET_CODE (bl->biv->add_val) == CONST_INT
7590 && INTVAL (bl->biv->add_val) < 0)
7592 /* Initial value must be greater than 0,
7593 init_val % -dec_value == 0 to ensure that it equals zero on
7594 the last iteration */
7596 if (GET_CODE (bl->initial_value) == CONST_INT
7597 && INTVAL (bl->initial_value) > 0
7598 && (INTVAL (bl->initial_value)
7599 % (-INTVAL (bl->biv->add_val))) == 0)
7601 /* register always nonnegative, add REG_NOTE to branch */
7602 REG_NOTES (PREV_INSN (loop_end))
7603 = gen_rtx_EXPR_LIST (REG_NONNEG, NULL_RTX,
7604 REG_NOTES (PREV_INSN (loop_end)));
7610 /* If the decrement is 1 and the value was tested as >= 0 before
7611 the loop, then we can safely optimize. */
7612 for (p = loop_start; p; p = PREV_INSN (p))
7614 if (GET_CODE (p) == CODE_LABEL)
7616 if (GET_CODE (p) != JUMP_INSN)
7619 before_comparison = get_condition_for_loop (p);
7620 if (before_comparison
7621 && XEXP (before_comparison, 0) == bl->biv->dest_reg
7622 && GET_CODE (before_comparison) == LT
7623 && XEXP (before_comparison, 1) == const0_rtx
7624 && ! reg_set_between_p (bl->biv->dest_reg, p, loop_start)
7625 && INTVAL (bl->biv->add_val) == -1)
7627 REG_NOTES (PREV_INSN (loop_end))
7628 = gen_rtx_EXPR_LIST (REG_NONNEG, NULL_RTX,
7629 REG_NOTES (PREV_INSN (loop_end)));
7636 else if (INTVAL (bl->biv->add_val) > 0)
7638 /* Try to change inc to dec, so can apply above optimization. */
7640 all registers modified are induction variables or invariant,
7641 all memory references have non-overlapping addresses
7642 (obviously true if only one write)
7643 allow 2 insns for the compare/jump at the end of the loop. */
7644 /* Also, we must avoid any instructions which use both the reversed
7645 biv and another biv. Such instructions will fail if the loop is
7646 reversed. We meet this condition by requiring that either
7647 no_use_except_counting is true, or else that there is only
7649 int num_nonfixed_reads = 0;
7650 /* 1 if the iteration var is used only to count iterations. */
7651 int no_use_except_counting = 0;
7652 /* 1 if the loop has no memory store, or it has a single memory store
7653 which is reversible. */
7654 int reversible_mem_store = 1;
7656 if (bl->giv_count == 0
7657 && ! loop_number_exit_count[uid_loop_num[INSN_UID (loop_start)]])
7659 rtx bivreg = regno_reg_rtx[bl->regno];
7661 /* If there are no givs for this biv, and the only exit is the
7662 fall through at the end of the loop, then
7663 see if perhaps there are no uses except to count. */
7664 no_use_except_counting = 1;
7665 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
7666 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
7668 rtx set = single_set (p);
7670 if (set && GET_CODE (SET_DEST (set)) == REG
7671 && REGNO (SET_DEST (set)) == bl->regno)
7672 /* An insn that sets the biv is okay. */
7674 else if (p == prev_nonnote_insn (prev_nonnote_insn (loop_end))
7675 || p == prev_nonnote_insn (loop_end))
7676 /* Don't bother about the end test. */
7678 else if (reg_mentioned_p (bivreg, PATTERN (p)))
7680 no_use_except_counting = 0;
7686 if (no_use_except_counting)
7687 ; /* no need to worry about MEMs. */
7688 else if (num_mem_sets <= 1)
7690 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
7691 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
7692 num_nonfixed_reads += count_nonfixed_reads (PATTERN (p));
7694 /* If the loop has a single store, and the destination address is
7695 invariant, then we can't reverse the loop, because this address
7696 might then have the wrong value at loop exit.
7697 This would work if the source was invariant also, however, in that
7698 case, the insn should have been moved out of the loop. */
7700 if (num_mem_sets == 1)
7702 struct induction *v;
7704 reversible_mem_store
7705 = (! unknown_address_altered
7706 && ! invariant_p (XEXP (loop_store_mems, 0)));
7708 /* If the store depends on a register that is set after the
7709 store, it depends on the initial value, and is thus not
7711 for (v = bl->giv; reversible_mem_store && v; v = v->next_iv)
7713 if (v->giv_type == DEST_REG
7714 && reg_mentioned_p (v->dest_reg,
7715 XEXP (loop_store_mems, 0))
7716 && (INSN_UID (v->insn) >= max_uid_for_loop
7717 || (INSN_LUID (v->insn)
7718 > INSN_LUID (first_loop_store_insn))))
7719 reversible_mem_store = 0;
7726 /* This code only acts for innermost loops. Also it simplifies
7727 the memory address check by only reversing loops with
7728 zero or one memory access.
7729 Two memory accesses could involve parts of the same array,
7730 and that can't be reversed.
7731 If the biv is used only for counting, than we don't need to worry
7732 about all these things. */
7734 if ((num_nonfixed_reads <= 1
7736 && !loop_has_volatile
7737 && reversible_mem_store
7738 && (bl->giv_count + bl->biv_count + num_mem_sets
7739 + num_movables + compare_and_branch == insn_count)
7740 && (bl == loop_iv_list && bl->next == 0))
7741 || no_use_except_counting)
7745 /* Loop can be reversed. */
7746 if (loop_dump_stream)
7747 fprintf (loop_dump_stream, "Can reverse loop\n");
7749 /* Now check other conditions:
7751 The increment must be a constant, as must the initial value,
7752 and the comparison code must be LT.
7754 This test can probably be improved since +/- 1 in the constant
7755 can be obtained by changing LT to LE and vice versa; this is
7759 /* for constants, LE gets turned into LT */
7760 && (GET_CODE (comparison) == LT
7761 || (GET_CODE (comparison) == LE
7762 && no_use_except_counting)))
7764 HOST_WIDE_INT add_val, add_adjust, comparison_val;
7765 rtx initial_value, comparison_value;
7767 enum rtx_code cmp_code;
7768 int comparison_const_width;
7769 unsigned HOST_WIDE_INT comparison_sign_mask;
7771 add_val = INTVAL (bl->biv->add_val);
7772 comparison_value = XEXP (comparison, 1);
7773 if (GET_MODE (comparison_value) == VOIDmode)
7774 comparison_const_width
7775 = GET_MODE_BITSIZE (GET_MODE (XEXP (comparison, 0)));
7777 comparison_const_width
7778 = GET_MODE_BITSIZE (GET_MODE (comparison_value));
7779 if (comparison_const_width > HOST_BITS_PER_WIDE_INT)
7780 comparison_const_width = HOST_BITS_PER_WIDE_INT;
7781 comparison_sign_mask
7782 = (unsigned HOST_WIDE_INT)1 << (comparison_const_width - 1);
7784 /* If the comparison value is not a loop invariant, then we
7785 can not reverse this loop.
7787 ??? If the insns which initialize the comparison value as
7788 a whole compute an invariant result, then we could move
7789 them out of the loop and proceed with loop reversal. */
7790 if (!invariant_p (comparison_value))
7793 if (GET_CODE (comparison_value) == CONST_INT)
7794 comparison_val = INTVAL (comparison_value);
7795 initial_value = bl->initial_value;
7797 /* Normalize the initial value if it is an integer and
7798 has no other use except as a counter. This will allow
7799 a few more loops to be reversed. */
7800 if (no_use_except_counting
7801 && GET_CODE (comparison_value) == CONST_INT
7802 && GET_CODE (initial_value) == CONST_INT)
7804 comparison_val = comparison_val - INTVAL (bl->initial_value);
7805 /* The code below requires comparison_val to be a multiple
7806 of add_val in order to do the loop reversal, so
7807 round up comparison_val to a multiple of add_val.
7808 Since comparison_value is constant, we know that the
7809 current comparison code is LT. */
7810 comparison_val = comparison_val + add_val - 1;
7812 -= (unsigned HOST_WIDE_INT) comparison_val % add_val;
7813 /* We postpone overflow checks for COMPARISON_VAL here;
7814 even if there is an overflow, we might still be able to
7815 reverse the loop, if converting the loop exit test to
7817 initial_value = const0_rtx;
7820 /* First check if we can do a vanilla loop reversal. */
7821 if (initial_value == const0_rtx
7822 /* If we have a decrement_and_branch_on_count, prefer
7823 the NE test, since this will allow that instruction to
7824 be generated. Note that we must use a vanilla loop
7825 reversal if the biv is used to calculate a giv or has
7826 a non-counting use. */
7827 #if ! defined (HAVE_decrement_and_branch_until_zero) && defined (HAVE_decrement_and_branch_on_count)
7828 && (! (add_val == 1 && loop_info->vtop
7829 && (bl->biv_count == 0
7830 || no_use_except_counting)))
7832 && GET_CODE (comparison_value) == CONST_INT
7833 /* Now do postponed overflow checks on COMPARISON_VAL. */
7834 && ! (((comparison_val - add_val) ^ INTVAL (comparison_value))
7835 & comparison_sign_mask))
7837 /* Register will always be nonnegative, with value
7838 0 on last iteration */
7839 add_adjust = add_val;
7843 else if (add_val == 1 && loop_info->vtop
7844 && (bl->biv_count == 0
7845 || no_use_except_counting))
7853 if (GET_CODE (comparison) == LE)
7854 add_adjust -= add_val;
7856 /* If the initial value is not zero, or if the comparison
7857 value is not an exact multiple of the increment, then we
7858 can not reverse this loop. */
7859 if (initial_value == const0_rtx
7860 && GET_CODE (comparison_value) == CONST_INT)
7862 if (((unsigned HOST_WIDE_INT) comparison_val % add_val) != 0)
7867 if (! no_use_except_counting || add_val != 1)
7871 final_value = comparison_value;
7873 /* Reset these in case we normalized the initial value
7874 and comparison value above. */
7875 if (GET_CODE (comparison_value) == CONST_INT
7876 && GET_CODE (initial_value) == CONST_INT)
7878 comparison_value = GEN_INT (comparison_val);
7880 = GEN_INT (comparison_val + INTVAL (bl->initial_value));
7882 bl->initial_value = initial_value;
7884 /* Save some info needed to produce the new insns. */
7885 reg = bl->biv->dest_reg;
7886 jump_label = XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end))), 1);
7887 if (jump_label == pc_rtx)
7888 jump_label = XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end))), 2);
7889 new_add_val = GEN_INT (- INTVAL (bl->biv->add_val));
7891 /* Set start_value; if this is not a CONST_INT, we need
7893 Initialize biv to start_value before loop start.
7894 The old initializing insn will be deleted as a
7895 dead store by flow.c. */
7896 if (initial_value == const0_rtx
7897 && GET_CODE (comparison_value) == CONST_INT)
7899 start_value = GEN_INT (comparison_val - add_adjust);
7900 emit_insn_before (gen_move_insn (reg, start_value),
7903 else if (GET_CODE (initial_value) == CONST_INT)
7905 rtx offset = GEN_INT (-INTVAL (initial_value) - add_adjust);
7906 enum machine_mode mode = GET_MODE (reg);
7907 enum insn_code icode
7908 = add_optab->handlers[(int) mode].insn_code;
7909 if (! (*insn_operand_predicate[icode][0]) (reg, mode)
7910 || ! ((*insn_operand_predicate[icode][1])
7911 (comparison_value, mode))
7912 || ! (*insn_operand_predicate[icode][2]) (offset, mode))
7915 = gen_rtx_PLUS (mode, comparison_value, offset);
7916 emit_insn_before ((GEN_FCN (icode)
7917 (reg, comparison_value, offset)),
7919 if (GET_CODE (comparison) == LE)
7920 final_value = gen_rtx_PLUS (mode, comparison_value,
7923 else if (! add_adjust)
7925 enum machine_mode mode = GET_MODE (reg);
7926 enum insn_code icode
7927 = sub_optab->handlers[(int) mode].insn_code;
7928 if (! (*insn_operand_predicate[icode][0]) (reg, mode)
7929 || ! ((*insn_operand_predicate[icode][1])
7930 (comparison_value, mode))
7931 || ! ((*insn_operand_predicate[icode][2])
7932 (initial_value, mode)))
7935 = gen_rtx_MINUS (mode, comparison_value, initial_value);
7936 emit_insn_before ((GEN_FCN (icode)
7937 (reg, comparison_value, initial_value)),
7941 /* We could handle the other cases too, but it'll be
7942 better to have a testcase first. */
7945 /* We may not have a single insn which can increment a reg, so
7946 create a sequence to hold all the insns from expand_inc. */
7948 expand_inc (reg, new_add_val);
7949 tem = gen_sequence ();
7952 p = emit_insn_before (tem, bl->biv->insn);
7953 delete_insn (bl->biv->insn);
7955 /* Update biv info to reflect its new status. */
7957 bl->initial_value = start_value;
7958 bl->biv->add_val = new_add_val;
7960 /* Update loop info. */
7961 loop_info->initial_value = reg;
7962 loop_info->initial_equiv_value = reg;
7963 loop_info->final_value = const0_rtx;
7964 loop_info->final_equiv_value = const0_rtx;
7965 loop_info->comparison_value = const0_rtx;
7966 loop_info->comparison_code = cmp_code;
7967 loop_info->increment = new_add_val;
7969 /* Inc LABEL_NUSES so that delete_insn will
7970 not delete the label. */
7971 LABEL_NUSES (XEXP (jump_label, 0)) ++;
7973 /* Emit an insn after the end of the loop to set the biv's
7974 proper exit value if it is used anywhere outside the loop. */
7975 if ((REGNO_LAST_UID (bl->regno) != INSN_UID (first_compare))
7977 || REGNO_FIRST_UID (bl->regno) != INSN_UID (bl->init_insn))
7978 emit_insn_after (gen_move_insn (reg, final_value),
7981 /* Delete compare/branch at end of loop. */
7982 delete_insn (PREV_INSN (loop_end));
7983 if (compare_and_branch == 2)
7984 delete_insn (first_compare);
7986 /* Add new compare/branch insn at end of loop. */
7988 emit_cmp_and_jump_insns (reg, const0_rtx, cmp_code, NULL_RTX,
7989 GET_MODE (reg), 0, 0,
7990 XEXP (jump_label, 0));
7991 tem = gen_sequence ();
7993 emit_jump_insn_before (tem, loop_end);
7995 for (tem = PREV_INSN (loop_end);
7996 tem && GET_CODE (tem) != JUMP_INSN;
7997 tem = PREV_INSN (tem))
8001 JUMP_LABEL (tem) = XEXP (jump_label, 0);
8007 /* Increment of LABEL_NUSES done above. */
8008 /* Register is now always nonnegative,
8009 so add REG_NONNEG note to the branch. */
8010 REG_NOTES (tem) = gen_rtx_EXPR_LIST (REG_NONNEG, NULL_RTX,
8016 /* Mark that this biv has been reversed. Each giv which depends
8017 on this biv, and which is also live past the end of the loop
8018 will have to be fixed up. */
8022 if (loop_dump_stream)
8023 fprintf (loop_dump_stream,
8024 "Reversed loop and added reg_nonneg\n");
8034 /* Verify whether the biv BL appears to be eliminable,
8035 based on the insns in the loop that refer to it.
8036 LOOP_START is the first insn of the loop, and END is the end insn.
8038 If ELIMINATE_P is non-zero, actually do the elimination.
8040 THRESHOLD and INSN_COUNT are from loop_optimize and are used to
8041 determine whether invariant insns should be placed inside or at the
8042 start of the loop. */
8045 maybe_eliminate_biv (bl, loop_start, end, eliminate_p, threshold, insn_count)
8046 struct iv_class *bl;
8050 int threshold, insn_count;
8052 rtx reg = bl->biv->dest_reg;
8055 /* Scan all insns in the loop, stopping if we find one that uses the
8056 biv in a way that we cannot eliminate. */
8058 for (p = loop_start; p != end; p = NEXT_INSN (p))
8060 enum rtx_code code = GET_CODE (p);
8061 rtx where = threshold >= insn_count ? loop_start : p;
8063 if ((code == INSN || code == JUMP_INSN || code == CALL_INSN)
8064 && reg_mentioned_p (reg, PATTERN (p))
8065 && ! maybe_eliminate_biv_1 (PATTERN (p), p, bl, eliminate_p, where))
8067 if (loop_dump_stream)
8068 fprintf (loop_dump_stream,
8069 "Cannot eliminate biv %d: biv used in insn %d.\n",
8070 bl->regno, INSN_UID (p));
8077 if (loop_dump_stream)
8078 fprintf (loop_dump_stream, "biv %d %s eliminated.\n",
8079 bl->regno, eliminate_p ? "was" : "can be");
8086 /* If BL appears in X (part of the pattern of INSN), see if we can
8087 eliminate its use. If so, return 1. If not, return 0.
8089 If BIV does not appear in X, return 1.
8091 If ELIMINATE_P is non-zero, actually do the elimination. WHERE indicates
8092 where extra insns should be added. Depending on how many items have been
8093 moved out of the loop, it will either be before INSN or at the start of
8097 maybe_eliminate_biv_1 (x, insn, bl, eliminate_p, where)
8099 struct iv_class *bl;
8103 enum rtx_code code = GET_CODE (x);
8104 rtx reg = bl->biv->dest_reg;
8105 enum machine_mode mode = GET_MODE (reg);
8106 struct induction *v;
8118 /* If we haven't already been able to do something with this BIV,
8119 we can't eliminate it. */
8125 /* If this sets the BIV, it is not a problem. */
8126 if (SET_DEST (x) == reg)
8129 /* If this is an insn that defines a giv, it is also ok because
8130 it will go away when the giv is reduced. */
8131 for (v = bl->giv; v; v = v->next_iv)
8132 if (v->giv_type == DEST_REG && SET_DEST (x) == v->dest_reg)
8136 if (SET_DEST (x) == cc0_rtx && SET_SRC (x) == reg)
8138 /* Can replace with any giv that was reduced and
8139 that has (MULT_VAL != 0) and (ADD_VAL == 0).
8140 Require a constant for MULT_VAL, so we know it's nonzero.
8141 ??? We disable this optimization to avoid potential
8144 for (v = bl->giv; v; v = v->next_iv)
8145 if (CONSTANT_P (v->mult_val) && v->mult_val != const0_rtx
8146 && v->add_val == const0_rtx
8147 && ! v->ignore && ! v->maybe_dead && v->always_computable
8151 /* If the giv V had the auto-inc address optimization applied
8152 to it, and INSN occurs between the giv insn and the biv
8153 insn, then we must adjust the value used here.
8154 This is rare, so we don't bother to do so. */
8156 && ((INSN_LUID (v->insn) < INSN_LUID (insn)
8157 && INSN_LUID (insn) < INSN_LUID (bl->biv->insn))
8158 || (INSN_LUID (v->insn) > INSN_LUID (insn)
8159 && INSN_LUID (insn) > INSN_LUID (bl->biv->insn))))
8165 /* If the giv has the opposite direction of change,
8166 then reverse the comparison. */
8167 if (INTVAL (v->mult_val) < 0)
8168 new = gen_rtx_COMPARE (GET_MODE (v->new_reg),
8169 const0_rtx, v->new_reg);
8173 /* We can probably test that giv's reduced reg. */
8174 if (validate_change (insn, &SET_SRC (x), new, 0))
8178 /* Look for a giv with (MULT_VAL != 0) and (ADD_VAL != 0);
8179 replace test insn with a compare insn (cmp REDUCED_GIV ADD_VAL).
8180 Require a constant for MULT_VAL, so we know it's nonzero.
8181 ??? Do this only if ADD_VAL is a pointer to avoid a potential
8182 overflow problem. */
8184 for (v = bl->giv; v; v = v->next_iv)
8185 if (CONSTANT_P (v->mult_val) && v->mult_val != const0_rtx
8186 && ! v->ignore && ! v->maybe_dead && v->always_computable
8188 && (GET_CODE (v->add_val) == SYMBOL_REF
8189 || GET_CODE (v->add_val) == LABEL_REF
8190 || GET_CODE (v->add_val) == CONST
8191 || (GET_CODE (v->add_val) == REG
8192 && REGNO_POINTER_FLAG (REGNO (v->add_val)))))
8194 /* If the giv V had the auto-inc address optimization applied
8195 to it, and INSN occurs between the giv insn and the biv
8196 insn, then we must adjust the value used here.
8197 This is rare, so we don't bother to do so. */
8199 && ((INSN_LUID (v->insn) < INSN_LUID (insn)
8200 && INSN_LUID (insn) < INSN_LUID (bl->biv->insn))
8201 || (INSN_LUID (v->insn) > INSN_LUID (insn)
8202 && INSN_LUID (insn) > INSN_LUID (bl->biv->insn))))
8208 /* If the giv has the opposite direction of change,
8209 then reverse the comparison. */
8210 if (INTVAL (v->mult_val) < 0)
8211 new = gen_rtx_COMPARE (VOIDmode, copy_rtx (v->add_val),
8214 new = gen_rtx_COMPARE (VOIDmode, v->new_reg,
8215 copy_rtx (v->add_val));
8217 /* Replace biv with the giv's reduced register. */
8218 update_reg_last_use (v->add_val, insn);
8219 if (validate_change (insn, &SET_SRC (PATTERN (insn)), new, 0))
8222 /* Insn doesn't support that constant or invariant. Copy it
8223 into a register (it will be a loop invariant.) */
8224 tem = gen_reg_rtx (GET_MODE (v->new_reg));
8226 emit_insn_before (gen_move_insn (tem, copy_rtx (v->add_val)),
8229 /* Substitute the new register for its invariant value in
8230 the compare expression. */
8231 XEXP (new, (INTVAL (v->mult_val) < 0) ? 0 : 1) = tem;
8232 if (validate_change (insn, &SET_SRC (PATTERN (insn)), new, 0))
8241 case GT: case GE: case GTU: case GEU:
8242 case LT: case LE: case LTU: case LEU:
8243 /* See if either argument is the biv. */
8244 if (XEXP (x, 0) == reg)
8245 arg = XEXP (x, 1), arg_operand = 1;
8246 else if (XEXP (x, 1) == reg)
8247 arg = XEXP (x, 0), arg_operand = 0;
8251 if (CONSTANT_P (arg))
8253 /* First try to replace with any giv that has constant positive
8254 mult_val and constant add_val. We might be able to support
8255 negative mult_val, but it seems complex to do it in general. */
8257 for (v = bl->giv; v; v = v->next_iv)
8258 if (CONSTANT_P (v->mult_val) && INTVAL (v->mult_val) > 0
8259 && (GET_CODE (v->add_val) == SYMBOL_REF
8260 || GET_CODE (v->add_val) == LABEL_REF
8261 || GET_CODE (v->add_val) == CONST
8262 || (GET_CODE (v->add_val) == REG
8263 && REGNO_POINTER_FLAG (REGNO (v->add_val))))
8264 && ! v->ignore && ! v->maybe_dead && v->always_computable
8267 /* If the giv V had the auto-inc address optimization applied
8268 to it, and INSN occurs between the giv insn and the biv
8269 insn, then we must adjust the value used here.
8270 This is rare, so we don't bother to do so. */
8272 && ((INSN_LUID (v->insn) < INSN_LUID (insn)
8273 && INSN_LUID (insn) < INSN_LUID (bl->biv->insn))
8274 || (INSN_LUID (v->insn) > INSN_LUID (insn)
8275 && INSN_LUID (insn) > INSN_LUID (bl->biv->insn))))
8281 /* Replace biv with the giv's reduced reg. */
8282 XEXP (x, 1-arg_operand) = v->new_reg;
8284 /* If all constants are actually constant integers and
8285 the derived constant can be directly placed in the COMPARE,
8287 if (GET_CODE (arg) == CONST_INT
8288 && GET_CODE (v->mult_val) == CONST_INT
8289 && GET_CODE (v->add_val) == CONST_INT
8290 && validate_change (insn, &XEXP (x, arg_operand),
8291 GEN_INT (INTVAL (arg)
8292 * INTVAL (v->mult_val)
8293 + INTVAL (v->add_val)), 0))
8296 /* Otherwise, load it into a register. */
8297 tem = gen_reg_rtx (mode);
8298 emit_iv_add_mult (arg, v->mult_val, v->add_val, tem, where);
8299 if (validate_change (insn, &XEXP (x, arg_operand), tem, 0))
8302 /* If that failed, put back the change we made above. */
8303 XEXP (x, 1-arg_operand) = reg;
8306 /* Look for giv with positive constant mult_val and nonconst add_val.
8307 Insert insns to calculate new compare value.
8308 ??? Turn this off due to possible overflow. */
8310 for (v = bl->giv; v; v = v->next_iv)
8311 if (CONSTANT_P (v->mult_val) && INTVAL (v->mult_val) > 0
8312 && ! v->ignore && ! v->maybe_dead && v->always_computable
8318 /* If the giv V had the auto-inc address optimization applied
8319 to it, and INSN occurs between the giv insn and the biv
8320 insn, then we must adjust the value used here.
8321 This is rare, so we don't bother to do so. */
8323 && ((INSN_LUID (v->insn) < INSN_LUID (insn)
8324 && INSN_LUID (insn) < INSN_LUID (bl->biv->insn))
8325 || (INSN_LUID (v->insn) > INSN_LUID (insn)
8326 && INSN_LUID (insn) > INSN_LUID (bl->biv->insn))))
8332 tem = gen_reg_rtx (mode);
8334 /* Replace biv with giv's reduced register. */
8335 validate_change (insn, &XEXP (x, 1 - arg_operand),
8338 /* Compute value to compare against. */
8339 emit_iv_add_mult (arg, v->mult_val, v->add_val, tem, where);
8340 /* Use it in this insn. */
8341 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
8342 if (apply_change_group ())
8346 else if (GET_CODE (arg) == REG || GET_CODE (arg) == MEM)
8348 if (invariant_p (arg) == 1)
8350 /* Look for giv with constant positive mult_val and nonconst
8351 add_val. Insert insns to compute new compare value.
8352 ??? Turn this off due to possible overflow. */
8354 for (v = bl->giv; v; v = v->next_iv)
8355 if (CONSTANT_P (v->mult_val) && INTVAL (v->mult_val) > 0
8356 && ! v->ignore && ! v->maybe_dead && v->always_computable
8362 /* If the giv V had the auto-inc address optimization applied
8363 to it, and INSN occurs between the giv insn and the biv
8364 insn, then we must adjust the value used here.
8365 This is rare, so we don't bother to do so. */
8367 && ((INSN_LUID (v->insn) < INSN_LUID (insn)
8368 && INSN_LUID (insn) < INSN_LUID (bl->biv->insn))
8369 || (INSN_LUID (v->insn) > INSN_LUID (insn)
8370 && INSN_LUID (insn) > INSN_LUID (bl->biv->insn))))
8376 tem = gen_reg_rtx (mode);
8378 /* Replace biv with giv's reduced register. */
8379 validate_change (insn, &XEXP (x, 1 - arg_operand),
8382 /* Compute value to compare against. */
8383 emit_iv_add_mult (arg, v->mult_val, v->add_val,
8385 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
8386 if (apply_change_group ())
8391 /* This code has problems. Basically, you can't know when
8392 seeing if we will eliminate BL, whether a particular giv
8393 of ARG will be reduced. If it isn't going to be reduced,
8394 we can't eliminate BL. We can try forcing it to be reduced,
8395 but that can generate poor code.
8397 The problem is that the benefit of reducing TV, below should
8398 be increased if BL can actually be eliminated, but this means
8399 we might have to do a topological sort of the order in which
8400 we try to process biv. It doesn't seem worthwhile to do
8401 this sort of thing now. */
8404 /* Otherwise the reg compared with had better be a biv. */
8405 if (GET_CODE (arg) != REG
8406 || REG_IV_TYPE (REGNO (arg)) != BASIC_INDUCT)
8409 /* Look for a pair of givs, one for each biv,
8410 with identical coefficients. */
8411 for (v = bl->giv; v; v = v->next_iv)
8413 struct induction *tv;
8415 if (v->ignore || v->maybe_dead || v->mode != mode)
8418 for (tv = reg_biv_class[REGNO (arg)]->giv; tv; tv = tv->next_iv)
8419 if (! tv->ignore && ! tv->maybe_dead
8420 && rtx_equal_p (tv->mult_val, v->mult_val)
8421 && rtx_equal_p (tv->add_val, v->add_val)
8422 && tv->mode == mode)
8424 /* If the giv V had the auto-inc address optimization applied
8425 to it, and INSN occurs between the giv insn and the biv
8426 insn, then we must adjust the value used here.
8427 This is rare, so we don't bother to do so. */
8429 && ((INSN_LUID (v->insn) < INSN_LUID (insn)
8430 && INSN_LUID (insn) < INSN_LUID (bl->biv->insn))
8431 || (INSN_LUID (v->insn) > INSN_LUID (insn)
8432 && INSN_LUID (insn) > INSN_LUID (bl->biv->insn))))
8438 /* Replace biv with its giv's reduced reg. */
8439 XEXP (x, 1-arg_operand) = v->new_reg;
8440 /* Replace other operand with the other giv's
8442 XEXP (x, arg_operand) = tv->new_reg;
8449 /* If we get here, the biv can't be eliminated. */
8453 /* If this address is a DEST_ADDR giv, it doesn't matter if the
8454 biv is used in it, since it will be replaced. */
8455 for (v = bl->giv; v; v = v->next_iv)
8456 if (v->giv_type == DEST_ADDR && v->location == &XEXP (x, 0))
8464 /* See if any subexpression fails elimination. */
8465 fmt = GET_RTX_FORMAT (code);
8466 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
8471 if (! maybe_eliminate_biv_1 (XEXP (x, i), insn, bl,
8472 eliminate_p, where))
8477 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
8478 if (! maybe_eliminate_biv_1 (XVECEXP (x, i, j), insn, bl,
8479 eliminate_p, where))
8488 /* Return nonzero if the last use of REG
8489 is in an insn following INSN in the same basic block. */
8492 last_use_this_basic_block (reg, insn)
8498 n && GET_CODE (n) != CODE_LABEL && GET_CODE (n) != JUMP_INSN;
8501 if (REGNO_LAST_UID (REGNO (reg)) == INSN_UID (n))
8507 /* Called via `note_stores' to record the initial value of a biv. Here we
8508 just record the location of the set and process it later. */
8511 record_initial (dest, set)
8515 struct iv_class *bl;
8517 if (GET_CODE (dest) != REG
8518 || REGNO (dest) >= max_reg_before_loop
8519 || REG_IV_TYPE (REGNO (dest)) != BASIC_INDUCT)
8522 bl = reg_biv_class[REGNO (dest)];
8524 /* If this is the first set found, record it. */
8525 if (bl->init_insn == 0)
8527 bl->init_insn = note_insn;
8532 /* If any of the registers in X are "old" and currently have a last use earlier
8533 than INSN, update them to have a last use of INSN. Their actual last use
8534 will be the previous insn but it will not have a valid uid_luid so we can't
8538 update_reg_last_use (x, insn)
8542 /* Check for the case where INSN does not have a valid luid. In this case,
8543 there is no need to modify the regno_last_uid, as this can only happen
8544 when code is inserted after the loop_end to set a pseudo's final value,
8545 and hence this insn will never be the last use of x. */
8546 if (GET_CODE (x) == REG && REGNO (x) < max_reg_before_loop
8547 && INSN_UID (insn) < max_uid_for_loop
8548 && uid_luid[REGNO_LAST_UID (REGNO (x))] < uid_luid[INSN_UID (insn)])
8549 REGNO_LAST_UID (REGNO (x)) = INSN_UID (insn);
8553 register char *fmt = GET_RTX_FORMAT (GET_CODE (x));
8554 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
8557 update_reg_last_use (XEXP (x, i), insn);
8558 else if (fmt[i] == 'E')
8559 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
8560 update_reg_last_use (XVECEXP (x, i, j), insn);
8565 /* Given a jump insn JUMP, return the condition that will cause it to branch
8566 to its JUMP_LABEL. If the condition cannot be understood, or is an
8567 inequality floating-point comparison which needs to be reversed, 0 will
8570 If EARLIEST is non-zero, it is a pointer to a place where the earliest
8571 insn used in locating the condition was found. If a replacement test
8572 of the condition is desired, it should be placed in front of that
8573 insn and we will be sure that the inputs are still valid.
8575 The condition will be returned in a canonical form to simplify testing by
8576 callers. Specifically:
8578 (1) The code will always be a comparison operation (EQ, NE, GT, etc.).
8579 (2) Both operands will be machine operands; (cc0) will have been replaced.
8580 (3) If an operand is a constant, it will be the second operand.
8581 (4) (LE x const) will be replaced with (LT x <const+1>) and similarly
8582 for GE, GEU, and LEU. */
8585 get_condition (jump, earliest)
8594 int reverse_code = 0;
8595 int did_reverse_condition = 0;
8596 enum machine_mode mode;
8598 /* If this is not a standard conditional jump, we can't parse it. */
8599 if (GET_CODE (jump) != JUMP_INSN
8600 || ! condjump_p (jump) || simplejump_p (jump))
8603 code = GET_CODE (XEXP (SET_SRC (PATTERN (jump)), 0));
8604 mode = GET_MODE (XEXP (SET_SRC (PATTERN (jump)), 0));
8605 op0 = XEXP (XEXP (SET_SRC (PATTERN (jump)), 0), 0);
8606 op1 = XEXP (XEXP (SET_SRC (PATTERN (jump)), 0), 1);
8611 /* If this branches to JUMP_LABEL when the condition is false, reverse
8613 if (GET_CODE (XEXP (SET_SRC (PATTERN (jump)), 2)) == LABEL_REF
8614 && XEXP (XEXP (SET_SRC (PATTERN (jump)), 2), 0) == JUMP_LABEL (jump))
8615 code = reverse_condition (code), did_reverse_condition ^= 1;
8617 /* If we are comparing a register with zero, see if the register is set
8618 in the previous insn to a COMPARE or a comparison operation. Perform
8619 the same tests as a function of STORE_FLAG_VALUE as find_comparison_args
8622 while (GET_RTX_CLASS (code) == '<' && op1 == CONST0_RTX (GET_MODE (op0)))
8624 /* Set non-zero when we find something of interest. */
8628 /* If comparison with cc0, import actual comparison from compare
8632 if ((prev = prev_nonnote_insn (prev)) == 0
8633 || GET_CODE (prev) != INSN
8634 || (set = single_set (prev)) == 0
8635 || SET_DEST (set) != cc0_rtx)
8638 op0 = SET_SRC (set);
8639 op1 = CONST0_RTX (GET_MODE (op0));
8645 /* If this is a COMPARE, pick up the two things being compared. */
8646 if (GET_CODE (op0) == COMPARE)
8648 op1 = XEXP (op0, 1);
8649 op0 = XEXP (op0, 0);
8652 else if (GET_CODE (op0) != REG)
8655 /* Go back to the previous insn. Stop if it is not an INSN. We also
8656 stop if it isn't a single set or if it has a REG_INC note because
8657 we don't want to bother dealing with it. */
8659 if ((prev = prev_nonnote_insn (prev)) == 0
8660 || GET_CODE (prev) != INSN
8661 || FIND_REG_INC_NOTE (prev, 0)
8662 || (set = single_set (prev)) == 0)
8665 /* If this is setting OP0, get what it sets it to if it looks
8667 if (rtx_equal_p (SET_DEST (set), op0))
8669 enum machine_mode inner_mode = GET_MODE (SET_SRC (set));
8671 /* ??? We may not combine comparisons done in a CCmode with
8672 comparisons not done in a CCmode. This is to aid targets
8673 like Alpha that have an IEEE compliant EQ instruction, and
8674 a non-IEEE compliant BEQ instruction. The use of CCmode is
8675 actually artificial, simply to prevent the combination, but
8676 should not affect other platforms.
8678 However, we must allow VOIDmode comparisons to match either
8679 CCmode or non-CCmode comparison, because some ports have
8680 modeless comparisons inside branch patterns.
8682 ??? This mode check should perhaps look more like the mode check
8683 in simplify_comparison in combine. */
8685 if ((GET_CODE (SET_SRC (set)) == COMPARE
8688 && GET_MODE_CLASS (inner_mode) == MODE_INT
8689 && (GET_MODE_BITSIZE (inner_mode)
8690 <= HOST_BITS_PER_WIDE_INT)
8691 && (STORE_FLAG_VALUE
8692 & ((HOST_WIDE_INT) 1
8693 << (GET_MODE_BITSIZE (inner_mode) - 1))))
8694 #ifdef FLOAT_STORE_FLAG_VALUE
8696 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
8697 && FLOAT_STORE_FLAG_VALUE < 0)
8700 && GET_RTX_CLASS (GET_CODE (SET_SRC (set))) == '<'))
8701 && (((GET_MODE_CLASS (mode) == MODE_CC)
8702 == (GET_MODE_CLASS (inner_mode) == MODE_CC))
8703 || mode == VOIDmode || inner_mode == VOIDmode))
8705 else if (((code == EQ
8707 && (GET_MODE_BITSIZE (inner_mode)
8708 <= HOST_BITS_PER_WIDE_INT)
8709 && GET_MODE_CLASS (inner_mode) == MODE_INT
8710 && (STORE_FLAG_VALUE
8711 & ((HOST_WIDE_INT) 1
8712 << (GET_MODE_BITSIZE (inner_mode) - 1))))
8713 #ifdef FLOAT_STORE_FLAG_VALUE
8715 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
8716 && FLOAT_STORE_FLAG_VALUE < 0)
8719 && GET_RTX_CLASS (GET_CODE (SET_SRC (set))) == '<'
8720 && (((GET_MODE_CLASS (mode) == MODE_CC)
8721 == (GET_MODE_CLASS (inner_mode) == MODE_CC))
8722 || mode == VOIDmode || inner_mode == VOIDmode))
8725 /* We might have reversed a LT to get a GE here. But this wasn't
8726 actually the comparison of data, so we don't flag that we
8727 have had to reverse the condition. */
8728 did_reverse_condition ^= 1;
8736 else if (reg_set_p (op0, prev))
8737 /* If this sets OP0, but not directly, we have to give up. */
8742 if (GET_RTX_CLASS (GET_CODE (x)) == '<')
8743 code = GET_CODE (x);
8746 code = reverse_condition (code);
8747 did_reverse_condition ^= 1;
8751 op0 = XEXP (x, 0), op1 = XEXP (x, 1);
8757 /* If constant is first, put it last. */
8758 if (CONSTANT_P (op0))
8759 code = swap_condition (code), tem = op0, op0 = op1, op1 = tem;
8761 /* If OP0 is the result of a comparison, we weren't able to find what
8762 was really being compared, so fail. */
8763 if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_CC)
8766 /* Canonicalize any ordered comparison with integers involving equality
8767 if we can do computations in the relevant mode and we do not
8770 if (GET_CODE (op1) == CONST_INT
8771 && GET_MODE (op0) != VOIDmode
8772 && GET_MODE_BITSIZE (GET_MODE (op0)) <= HOST_BITS_PER_WIDE_INT)
8774 HOST_WIDE_INT const_val = INTVAL (op1);
8775 unsigned HOST_WIDE_INT uconst_val = const_val;
8776 unsigned HOST_WIDE_INT max_val
8777 = (unsigned HOST_WIDE_INT) GET_MODE_MASK (GET_MODE (op0));
8782 if ((unsigned HOST_WIDE_INT) const_val != max_val >> 1)
8783 code = LT, op1 = GEN_INT (const_val + 1);
8786 /* When cross-compiling, const_val might be sign-extended from
8787 BITS_PER_WORD to HOST_BITS_PER_WIDE_INT */
8789 if ((HOST_WIDE_INT) (const_val & max_val)
8790 != (((HOST_WIDE_INT) 1
8791 << (GET_MODE_BITSIZE (GET_MODE (op0)) - 1))))
8792 code = GT, op1 = GEN_INT (const_val - 1);
8796 if (uconst_val < max_val)
8797 code = LTU, op1 = GEN_INT (uconst_val + 1);
8801 if (uconst_val != 0)
8802 code = GTU, op1 = GEN_INT (uconst_val - 1);
8810 /* If this was floating-point and we reversed anything other than an
8811 EQ or NE, return zero. */
8812 if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT
8813 && did_reverse_condition && code != NE && code != EQ
8815 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_FLOAT)
8819 /* Never return CC0; return zero instead. */
8824 return gen_rtx_fmt_ee (code, VOIDmode, op0, op1);
8827 /* Similar to above routine, except that we also put an invariant last
8828 unless both operands are invariants. */
8831 get_condition_for_loop (x)
8834 rtx comparison = get_condition (x, NULL_PTR);
8837 || ! invariant_p (XEXP (comparison, 0))
8838 || invariant_p (XEXP (comparison, 1)))
8841 return gen_rtx_fmt_ee (swap_condition (GET_CODE (comparison)), VOIDmode,
8842 XEXP (comparison, 1), XEXP (comparison, 0));
8845 #ifdef HAVE_decrement_and_branch_on_count
8846 /* Instrument loop for insertion of bct instruction. We distinguish between
8847 loops with compile-time bounds and those with run-time bounds.
8848 Information from loop_iterations() is used to compute compile-time bounds.
8849 Run-time bounds should use loop preconditioning, but currently ignored.
8853 insert_bct (loop_start, loop_end, loop_info)
8854 rtx loop_start, loop_end;
8855 struct loop_info *loop_info;
8858 unsigned HOST_WIDE_INT n_iterations;
8861 int increment_direction, compare_direction;
8863 /* If the loop condition is <= or >=, the number of iteration
8864 is 1 more than the range of the bounds of the loop. */
8865 int add_iteration = 0;
8867 enum machine_mode loop_var_mode = word_mode;
8870 int loop_num = uid_loop_num [INSN_UID (loop_start)];
8872 /* It's impossible to instrument a competely unrolled loop. */
8873 if (loop_info->unroll_number == -1)
8876 /* Make sure that the count register is not in use. */
8877 if (loop_used_count_register [loop_num])
8879 if (loop_dump_stream)
8880 fprintf (loop_dump_stream,
8881 "insert_bct %d: BCT instrumentation failed: count register already in use\n",
8886 /* Make sure that the function has no indirect jumps. */
8887 if (indirect_jump_in_function)
8889 if (loop_dump_stream)
8890 fprintf (loop_dump_stream,
8891 "insert_bct %d: BCT instrumentation failed: indirect jump in function\n",
8896 /* Make sure that the last loop insn is a conditional jump. */
8897 if (GET_CODE (PREV_INSN (loop_end)) != JUMP_INSN
8898 || ! condjump_p (PREV_INSN (loop_end))
8899 || simplejump_p (PREV_INSN (loop_end)))
8901 if (loop_dump_stream)
8902 fprintf (loop_dump_stream,
8903 "insert_bct %d: BCT instrumentation failed: invalid jump at loop end\n",
8908 /* Make sure that the loop does not contain a function call
8909 (the count register might be altered by the called function). */
8912 if (loop_dump_stream)
8913 fprintf (loop_dump_stream,
8914 "insert_bct %d: BCT instrumentation failed: function call in loop\n",
8919 /* Make sure that the loop does not jump via a table.
8920 (the count register might be used to perform the branch on table). */
8921 if (loop_has_tablejump)
8923 if (loop_dump_stream)
8924 fprintf (loop_dump_stream,
8925 "insert_bct %d: BCT instrumentation failed: computed branch in the loop\n",
8930 /* Account for loop unrolling in instrumented iteration count. */
8931 if (loop_info->unroll_number > 1)
8932 n_iterations = loop_info->n_iterations / loop_info->unroll_number;
8934 n_iterations = loop_info->n_iterations;
8936 if (n_iterations != 0 && n_iterations < 3)
8938 /* Allow an enclosing outer loop to benefit if possible. */
8939 if (loop_dump_stream)
8940 fprintf (loop_dump_stream,
8941 "insert_bct %d: Too few iterations to benefit from BCT optimization\n",
8946 /* Try to instrument the loop. */
8948 /* Handle the simpler case, where the bounds are known at compile time. */
8949 if (n_iterations > 0)
8951 /* Mark all enclosing loops that they cannot use count register. */
8952 for (i = loop_num; i != -1; i = loop_outer_loop[i])
8953 loop_used_count_register[i] = 1;
8954 instrument_loop_bct (loop_start, loop_end, GEN_INT (n_iterations));
8958 /* Handle the more complex case, that the bounds are NOT known
8959 at compile time. In this case we generate run_time calculation
8960 of the number of iterations. */
8962 if (loop_info->iteration_var == 0)
8964 if (loop_dump_stream)
8965 fprintf (loop_dump_stream,
8966 "insert_bct %d: BCT Runtime Instrumentation failed: no loop iteration variable found\n",
8971 if (GET_MODE_CLASS (GET_MODE (loop_info->iteration_var)) != MODE_INT
8972 || GET_MODE_SIZE (GET_MODE (loop_info->iteration_var)) != UNITS_PER_WORD)
8974 if (loop_dump_stream)
8975 fprintf (loop_dump_stream,
8976 "insert_bct %d: BCT Runtime Instrumentation failed: loop variable not integer\n",
8981 /* With runtime bounds, if the compare is of the form '!=' we give up */
8982 if (loop_info->comparison_code == NE)
8984 if (loop_dump_stream)
8985 fprintf (loop_dump_stream,
8986 "insert_bct %d: BCT Runtime Instrumentation failed: runtime bounds with != comparison\n",
8990 /* Use common loop preconditioning code instead. */
8994 /* We rely on the existence of run-time guard to ensure that the
8995 loop executes at least once. */
8997 rtx iterations_num_reg;
8999 unsigned HOST_WIDE_INT increment_value_abs
9000 = INTVAL (increment) * increment_direction;
9002 /* make sure that the increment is a power of two, otherwise (an
9003 expensive) divide is needed. */
9004 if (exact_log2 (increment_value_abs) == -1)
9006 if (loop_dump_stream)
9007 fprintf (loop_dump_stream,
9008 "insert_bct: not instrumenting BCT because the increment is not power of 2\n");
9012 /* compute the number of iterations */
9017 /* Again, the number of iterations is calculated by:
9019 ; compare-val - initial-val + (increment -1) + additional-iteration
9020 ; num_iterations = -----------------------------------------------------------------
9023 /* ??? Do we have to call copy_rtx here before passing rtx to
9025 if (compare_direction > 0)
9027 /* <, <= :the loop variable is increasing */
9028 temp_reg = expand_binop (loop_var_mode, sub_optab,
9029 comparison_value, initial_value,
9030 NULL_RTX, 0, OPTAB_LIB_WIDEN);
9034 temp_reg = expand_binop (loop_var_mode, sub_optab,
9035 initial_value, comparison_value,
9036 NULL_RTX, 0, OPTAB_LIB_WIDEN);
9039 if (increment_value_abs - 1 + add_iteration != 0)
9040 temp_reg = expand_binop (loop_var_mode, add_optab, temp_reg,
9041 GEN_INT (increment_value_abs - 1
9043 NULL_RTX, 0, OPTAB_LIB_WIDEN);
9045 if (increment_value_abs != 1)
9047 /* ??? This will generate an expensive divide instruction for
9048 most targets. The original authors apparently expected this
9049 to be a shift, since they test for power-of-2 divisors above,
9050 but just naively generating a divide instruction will not give
9051 a shift. It happens to work for the PowerPC target because
9052 the rs6000.md file has a divide pattern that emits shifts.
9053 It will probably not work for any other target. */
9054 iterations_num_reg = expand_binop (loop_var_mode, sdiv_optab,
9056 GEN_INT (increment_value_abs),
9057 NULL_RTX, 0, OPTAB_LIB_WIDEN);
9060 iterations_num_reg = temp_reg;
9062 sequence = gen_sequence ();
9064 emit_insn_before (sequence, loop_start);
9065 instrument_loop_bct (loop_start, loop_end, iterations_num_reg);
9069 #endif /* Complex case */
9072 /* Instrument loop by inserting a bct in it as follows:
9073 1. A new counter register is created.
9074 2. In the head of the loop the new variable is initialized to the value
9075 passed in the loop_num_iterations parameter.
9076 3. At the end of the loop, comparison of the register with 0 is generated.
9077 The created comparison follows the pattern defined for the
9078 decrement_and_branch_on_count insn, so this insn will be generated.
9079 4. The branch on the old variable are deleted. The compare must remain
9080 because it might be used elsewhere. If the loop-variable or condition
9081 register are used elsewhere, they will be eliminated by flow. */
9084 instrument_loop_bct (loop_start, loop_end, loop_num_iterations)
9085 rtx loop_start, loop_end;
9086 rtx loop_num_iterations;
9092 if (HAVE_decrement_and_branch_on_count)
9094 if (loop_dump_stream)
9096 fputs ("instrument_bct: Inserting BCT (", loop_dump_stream);
9097 if (GET_CODE (loop_num_iterations) == CONST_INT)
9098 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC,
9099 INTVAL (loop_num_iterations));
9101 fputs ("runtime", loop_dump_stream);
9102 fputs (" iterations)", loop_dump_stream);
9105 /* Discard original jump to continue loop. Original compare result
9106 may still be live, so it cannot be discarded explicitly. */
9107 delete_insn (PREV_INSN (loop_end));
9109 /* Insert the label which will delimit the start of the loop. */
9110 start_label = gen_label_rtx ();
9111 emit_label_after (start_label, loop_start);
9113 /* Insert initialization of the count register into the loop header. */
9115 counter_reg = gen_reg_rtx (word_mode);
9116 emit_insn (gen_move_insn (counter_reg, loop_num_iterations));
9117 sequence = gen_sequence ();
9119 emit_insn_before (sequence, loop_start);
9121 /* Insert new comparison on the count register instead of the
9122 old one, generating the needed BCT pattern (that will be
9123 later recognized by assembly generation phase). */
9124 emit_jump_insn_before (gen_decrement_and_branch_on_count (counter_reg,
9127 LABEL_NUSES (start_label)++;
9131 #endif /* HAVE_decrement_and_branch_on_count */
9133 /* Scan the function and determine whether it has indirect (computed) jumps.
9135 This is taken mostly from flow.c; similar code exists elsewhere
9136 in the compiler. It may be useful to put this into rtlanal.c. */
9138 indirect_jump_in_function_p (start)
9143 for (insn = start; insn; insn = NEXT_INSN (insn))
9144 if (computed_jump_p (insn))
9150 /* Add MEM to the LOOP_MEMS array, if appropriate. See the
9151 documentation for LOOP_MEMS for the definition of `appropriate'.
9152 This function is called from prescan_loop via for_each_rtx. */
9155 insert_loop_mem (mem, data)
9157 void *data ATTRIBUTE_UNUSED;
9165 switch (GET_CODE (m))
9171 /* We're not interested in the MEM associated with a
9172 CONST_DOUBLE, so there's no need to traverse into this. */
9176 /* This is not a MEM. */
9180 /* See if we've already seen this MEM. */
9181 for (i = 0; i < loop_mems_idx; ++i)
9182 if (rtx_equal_p (m, loop_mems[i].mem))
9184 if (GET_MODE (m) != GET_MODE (loop_mems[i].mem))
9185 /* The modes of the two memory accesses are different. If
9186 this happens, something tricky is going on, and we just
9187 don't optimize accesses to this MEM. */
9188 loop_mems[i].optimize = 0;
9193 /* Resize the array, if necessary. */
9194 if (loop_mems_idx == loop_mems_allocated)
9196 if (loop_mems_allocated != 0)
9197 loop_mems_allocated *= 2;
9199 loop_mems_allocated = 32;
9201 loop_mems = (loop_mem_info*)
9202 xrealloc (loop_mems,
9203 loop_mems_allocated * sizeof (loop_mem_info));
9206 /* Actually insert the MEM. */
9207 loop_mems[loop_mems_idx].mem = m;
9208 /* We can't hoist this MEM out of the loop if it's a BLKmode MEM
9209 because we can't put it in a register. We still store it in the
9210 table, though, so that if we see the same address later, but in a
9211 non-BLK mode, we'll not think we can optimize it at that point. */
9212 loop_mems[loop_mems_idx].optimize = (GET_MODE (m) != BLKmode);
9213 loop_mems[loop_mems_idx].reg = NULL_RTX;
9219 /* Like load_mems, but also ensures that SET_IN_LOOP,
9220 MAY_NOT_OPTIMIZE, REG_SINGLE_USAGE, and INSN_COUNT have the correct
9221 values after load_mems. */
9224 load_mems_and_recount_loop_regs_set (scan_start, end, loop_top, start,
9225 reg_single_usage, insn_count)
9230 varray_type reg_single_usage;
9233 int nregs = max_reg_num ();
9235 load_mems (scan_start, end, loop_top, start);
9237 /* Recalculate set_in_loop and friends since load_mems may have
9238 created new registers. */
9239 if (max_reg_num () > nregs)
9245 nregs = max_reg_num ();
9247 if ((unsigned) nregs > set_in_loop->num_elements)
9249 /* Grow all the arrays. */
9250 VARRAY_GROW (set_in_loop, nregs);
9251 VARRAY_GROW (n_times_set, nregs);
9252 VARRAY_GROW (may_not_optimize, nregs);
9253 if (reg_single_usage)
9254 VARRAY_GROW (reg_single_usage, nregs);
9256 /* Clear the arrays */
9257 bzero ((char *) &set_in_loop->data, nregs * sizeof (int));
9258 bzero ((char *) &may_not_optimize->data, nregs * sizeof (char));
9259 if (reg_single_usage)
9260 bzero ((char *) ®_single_usage->data, nregs * sizeof (rtx));
9262 count_loop_regs_set (loop_top ? loop_top : start, end,
9263 may_not_optimize, reg_single_usage,
9266 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
9268 VARRAY_CHAR (may_not_optimize, i) = 1;
9269 VARRAY_INT (set_in_loop, i) = 1;
9272 #ifdef AVOID_CCMODE_COPIES
9273 /* Don't try to move insns which set CC registers if we should not
9274 create CCmode register copies. */
9275 for (i = max_reg_num () - 1; i >= FIRST_PSEUDO_REGISTER; i--)
9276 if (GET_MODE_CLASS (GET_MODE (regno_reg_rtx[i])) == MODE_CC)
9277 VARRAY_CHAR (may_not_optimize, i) = 1;
9280 /* Set n_times_set for the new registers. */
9281 bcopy ((char *) (&set_in_loop->data.i[0] + old_nregs),
9282 (char *) (&n_times_set->data.i[0] + old_nregs),
9283 (nregs - old_nregs) * sizeof (int));
9287 /* Move MEMs into registers for the duration of the loop. SCAN_START
9288 is the first instruction in the loop (as it is executed). The
9289 other parameters are as for next_insn_in_loop. */
9292 load_mems (scan_start, end, loop_top, start)
9298 int maybe_never = 0;
9301 rtx label = NULL_RTX;
9304 if (loop_mems_idx > 0)
9306 /* Nonzero if the next instruction may never be executed. */
9307 int next_maybe_never = 0;
9309 /* Check to see if it's possible that some instructions in the
9310 loop are never executed. */
9311 for (p = next_insn_in_loop (scan_start, scan_start, end, loop_top);
9312 p != NULL_RTX && !maybe_never;
9313 p = next_insn_in_loop (p, scan_start, end, loop_top))
9315 if (GET_CODE (p) == CODE_LABEL)
9317 else if (GET_CODE (p) == JUMP_INSN
9318 /* If we enter the loop in the middle, and scan
9319 around to the beginning, don't set maybe_never
9320 for that. This must be an unconditional jump,
9321 otherwise the code at the top of the loop might
9322 never be executed. Unconditional jumps are
9323 followed a by barrier then loop end. */
9324 && ! (GET_CODE (p) == JUMP_INSN
9325 && JUMP_LABEL (p) == loop_top
9326 && NEXT_INSN (NEXT_INSN (p)) == end
9327 && simplejump_p (p)))
9329 if (!condjump_p (p))
9330 /* Something complicated. */
9333 /* If there are any more instructions in the loop, they
9334 might not be reached. */
9335 next_maybe_never = 1;
9337 else if (next_maybe_never)
9341 /* Actually move the MEMs. */
9342 for (i = 0; i < loop_mems_idx; ++i)
9346 rtx mem = loop_mems[i].mem;
9349 if (MEM_VOLATILE_P (mem)
9350 || invariant_p (XEXP (mem, 0)) != 1)
9351 /* There's no telling whether or not MEM is modified. */
9352 loop_mems[i].optimize = 0;
9354 /* Go through the MEMs written to in the loop to see if this
9355 one is aliased by one of them. */
9356 mem_list_entry = loop_store_mems;
9357 while (mem_list_entry)
9359 if (rtx_equal_p (mem, XEXP (mem_list_entry, 0)))
9361 else if (true_dependence (XEXP (mem_list_entry, 0), VOIDmode,
9364 /* MEM is indeed aliased by this store. */
9365 loop_mems[i].optimize = 0;
9368 mem_list_entry = XEXP (mem_list_entry, 1);
9371 /* If this MEM is written to, we must be sure that there
9372 are no reads from another MEM that aliases this one. */
9373 if (loop_mems[i].optimize && written)
9377 for (j = 0; j < loop_mems_idx; ++j)
9381 else if (true_dependence (mem,
9386 /* It's not safe to hoist loop_mems[i] out of
9387 the loop because writes to it might not be
9388 seen by reads from loop_mems[j]. */
9389 loop_mems[i].optimize = 0;
9395 if (maybe_never && may_trap_p (mem))
9396 /* We can't access the MEM outside the loop; it might
9397 cause a trap that wouldn't have happened otherwise. */
9398 loop_mems[i].optimize = 0;
9400 if (!loop_mems[i].optimize)
9401 /* We thought we were going to lift this MEM out of the
9402 loop, but later discovered that we could not. */
9405 /* Allocate a pseudo for this MEM. We set REG_USERVAR_P in
9406 order to keep scan_loop from moving stores to this MEM
9407 out of the loop just because this REG is neither a
9408 user-variable nor used in the loop test. */
9409 reg = gen_reg_rtx (GET_MODE (mem));
9410 REG_USERVAR_P (reg) = 1;
9411 loop_mems[i].reg = reg;
9413 /* Now, replace all references to the MEM with the
9414 corresponding pesudos. */
9415 for (p = next_insn_in_loop (scan_start, scan_start, end, loop_top);
9417 p = next_insn_in_loop (p, scan_start, end, loop_top))
9422 for_each_rtx (&p, replace_loop_mem, &ri);
9425 if (!apply_change_group ())
9426 /* We couldn't replace all occurrences of the MEM. */
9427 loop_mems[i].optimize = 0;
9432 /* Load the memory immediately before START, which is
9433 the NOTE_LOOP_BEG. */
9434 set = gen_rtx_SET (GET_MODE (reg), reg, mem);
9435 emit_insn_before (set, start);
9439 if (label == NULL_RTX)
9441 /* We must compute the former
9442 right-after-the-end label before we insert
9444 end_label = next_label (end);
9445 label = gen_label_rtx ();
9446 emit_label_after (label, end);
9449 /* Store the memory immediately after END, which is
9450 the NOTE_LOOP_END. */
9451 set = gen_rtx_SET (GET_MODE (reg), copy_rtx (mem), reg);
9452 emit_insn_after (set, label);
9455 if (loop_dump_stream)
9457 fprintf (loop_dump_stream, "Hoisted regno %d %s from ",
9458 REGNO (reg), (written ? "r/w" : "r/o"));
9459 print_rtl (loop_dump_stream, mem);
9460 fputc ('\n', loop_dump_stream);
9466 if (label != NULL_RTX)
9468 /* Now, we need to replace all references to the previous exit
9469 label with the new one. */
9474 for (p = start; p != end; p = NEXT_INSN (p))
9476 for_each_rtx (&p, replace_label, &rr);
9478 /* If this is a JUMP_INSN, then we also need to fix the JUMP_LABEL
9479 field. This is not handled by for_each_rtx because it doesn't
9480 handle unprinted ('0') fields. We need to update JUMP_LABEL
9481 because the immediately following unroll pass will use it.
9482 replace_label would not work anyways, because that only handles
9484 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p) == end_label)
9485 JUMP_LABEL (p) = label;
9490 /* Replace MEM with its associated pseudo register. This function is
9491 called from load_mems via for_each_rtx. DATA is actually an
9492 rtx_and_int * describing the instruction currently being scanned
9493 and the MEM we are currently replacing. */
9496 replace_loop_mem (mem, data)
9508 switch (GET_CODE (m))
9514 /* We're not interested in the MEM associated with a
9515 CONST_DOUBLE, so there's no need to traverse into one. */
9519 /* This is not a MEM. */
9523 ri = (rtx_and_int*) data;
9526 if (!rtx_equal_p (loop_mems[i].mem, m))
9527 /* This is not the MEM we are currently replacing. */
9532 /* Actually replace the MEM. */
9533 validate_change (insn, mem, loop_mems[i].reg, 1);
9538 /* Replace occurrences of the old exit label for the loop with the new
9539 one. DATA is an rtx_pair containing the old and new labels,
9543 replace_label (x, data)
9548 rtx old_label = ((rtx_pair*) data)->r1;
9549 rtx new_label = ((rtx_pair*) data)->r2;
9554 if (GET_CODE (l) != LABEL_REF)
9557 if (XEXP (l, 0) != old_label)
9560 XEXP (l, 0) = new_label;
9561 ++LABEL_NUSES (new_label);
9562 --LABEL_NUSES (old_label);