1 /* Perform various loop optimizations, including strength reduction.
2 Copyright (C) 1987, 1988, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
22 /* This is the loop optimization pass of the compiler.
23 It finds invariant computations within loops and moves them
24 to the beginning of the loop. Then it identifies basic and
25 general induction variables. Strength reduction is applied to the general
26 induction variables, and induction variable elimination is applied to
27 the basic induction variables.
29 It also finds cases where
30 a register is set within the loop by zero-extending a narrower value
31 and changes these to zero the entire register once before the loop
32 and merely copy the low part within the loop.
34 Most of the complexity is in heuristics to decide when it is worth
35 while to do these things. */
44 #include "hard-reg-set.h"
45 #include "basic-block.h"
46 #include "insn-config.h"
56 #include "insn-flags.h"
59 /* Not really meaningful values, but at least something. */
60 #ifndef SIMULTANEOUS_PREFETCHES
61 #define SIMULTANEOUS_PREFETCHES 3
63 #ifndef PREFETCH_BLOCK
64 #define PREFETCH_BLOCK 32
67 #define HAVE_prefetch 0
68 #define CODE_FOR_prefetch 0
69 #define gen_prefetch(a,b,c) (abort(), NULL_RTX)
72 /* Give up the prefetch optimizations once we exceed a given threshhold.
73 It is unlikely that we would be able to optimize something in a loop
74 with so many detected prefetches. */
75 #define MAX_PREFETCHES 100
76 /* The number of prefetch blocks that are beneficial to fetch at once before
77 a loop with a known (and low) iteration count. */
78 #define PREFETCH_BLOCKS_BEFORE_LOOP_MAX 6
79 /* For very tiny loops it is not worthwhile to prefetch even before the loop,
80 since it is likely that the data are already in the cache. */
81 #define PREFETCH_BLOCKS_BEFORE_LOOP_MIN 2
82 /* The minimal number of prefetch blocks that a loop must consume to make
83 the emitting of prefetch instruction in the body of loop worthwhile. */
84 #define PREFETCH_BLOCKS_IN_LOOP_MIN 6
86 /* Parameterize some prefetch heuristics so they can be turned on and off
87 easily for performance testing on new architecures. These can be
88 defined in target-dependent files. */
90 /* Prefetch is worthwhile only when loads/stores are dense. */
91 #ifndef PREFETCH_ONLY_DENSE_MEM
92 #define PREFETCH_ONLY_DENSE_MEM 1
95 /* Define what we mean by "dense" loads and stores; This value divided by 256
96 is the minimum percentage of memory references that worth prefetching. */
97 #ifndef PREFETCH_DENSE_MEM
98 #define PREFETCH_DENSE_MEM 220
101 /* Do not prefetch for a loop whose iteration count is known to be low. */
102 #ifndef PREFETCH_NO_LOW_LOOPCNT
103 #define PREFETCH_NO_LOW_LOOPCNT 1
106 /* Define what we mean by a "low" iteration count. */
107 #ifndef PREFETCH_LOW_LOOPCNT
108 #define PREFETCH_LOW_LOOPCNT 32
111 /* Do not prefetch for a loop that contains a function call; such a loop is
112 probably not an internal loop. */
113 #ifndef PREFETCH_NO_CALL
114 #define PREFETCH_NO_CALL 1
117 /* Do not prefetch accesses with an extreme stride. */
118 #ifndef PREFETCH_NO_EXTREME_STRIDE
119 #define PREFETCH_NO_EXTREME_STRIDE 1
122 /* Define what we mean by an "extreme" stride. */
123 #ifndef PREFETCH_EXTREME_STRIDE
124 #define PREFETCH_EXTREME_STRIDE 4096
127 /* Do not handle reversed order prefetches (negative stride). */
128 #ifndef PREFETCH_NO_REVERSE_ORDER
129 #define PREFETCH_NO_REVERSE_ORDER 1
132 /* Prefetch even if the GIV is not always executed. */
133 #ifndef PREFETCH_NOT_ALWAYS
134 #define PREFETCH_NOT_ALWAYS 0
137 /* If the loop requires more prefetches than the target can process in
138 parallel then don't prefetch anything in that loop. */
139 #ifndef PREFETCH_LIMIT_TO_SIMULTANEOUS
140 #define PREFETCH_LIMIT_TO_SIMULTANEOUS 1
143 #define LOOP_REG_LIFETIME(LOOP, REGNO) \
144 ((REGNO_LAST_LUID (REGNO) - REGNO_FIRST_LUID (REGNO)))
146 #define LOOP_REG_GLOBAL_P(LOOP, REGNO) \
147 ((REGNO_LAST_LUID (REGNO) > INSN_LUID ((LOOP)->end) \
148 || REGNO_FIRST_LUID (REGNO) < INSN_LUID ((LOOP)->start)))
150 #define LOOP_REGNO_NREGS(REGNO, SET_DEST) \
151 ((REGNO) < FIRST_PSEUDO_REGISTER \
152 ? HARD_REGNO_NREGS ((REGNO), GET_MODE (SET_DEST)) : 1)
155 /* Vector mapping INSN_UIDs to luids.
156 The luids are like uids but increase monotonically always.
157 We use them to see whether a jump comes from outside a given loop. */
161 /* Indexed by INSN_UID, contains the ordinal giving the (innermost) loop
162 number the insn is contained in. */
164 struct loop **uid_loop;
166 /* 1 + largest uid of any insn. */
168 int max_uid_for_loop;
170 /* 1 + luid of last insn. */
174 /* Number of loops detected in current function. Used as index to the
177 static int max_loop_num;
179 /* Bound on pseudo register number before loop optimization.
180 A pseudo has valid regscan info if its number is < max_reg_before_loop. */
181 unsigned int max_reg_before_loop;
183 /* The value to pass to the next call of reg_scan_update. */
184 static int loop_max_reg;
186 #define obstack_chunk_alloc xmalloc
187 #define obstack_chunk_free free
189 /* During the analysis of a loop, a chain of `struct movable's
190 is made to record all the movable insns found.
191 Then the entire chain can be scanned to decide which to move. */
195 rtx insn; /* A movable insn */
196 rtx set_src; /* The expression this reg is set from. */
197 rtx set_dest; /* The destination of this SET. */
198 rtx dependencies; /* When INSN is libcall, this is an EXPR_LIST
199 of any registers used within the LIBCALL. */
200 int consec; /* Number of consecutive following insns
201 that must be moved with this one. */
202 unsigned int regno; /* The register it sets */
203 short lifetime; /* lifetime of that register;
204 may be adjusted when matching movables
205 that load the same value are found. */
206 short savings; /* Number of insns we can move for this reg,
207 including other movables that force this
208 or match this one. */
209 unsigned int cond : 1; /* 1 if only conditionally movable */
210 unsigned int force : 1; /* 1 means MUST move this insn */
211 unsigned int global : 1; /* 1 means reg is live outside this loop */
212 /* If PARTIAL is 1, GLOBAL means something different:
213 that the reg is live outside the range from where it is set
214 to the following label. */
215 unsigned int done : 1; /* 1 inhibits further processing of this */
217 unsigned int partial : 1; /* 1 means this reg is used for zero-extending.
218 In particular, moving it does not make it
220 unsigned int move_insn : 1; /* 1 means that we call emit_move_insn to
221 load SRC, rather than copying INSN. */
222 unsigned int move_insn_first:1;/* Same as above, if this is necessary for the
223 first insn of a consecutive sets group. */
224 unsigned int is_equiv : 1; /* 1 means a REG_EQUIV is present on INSN. */
225 enum machine_mode savemode; /* Nonzero means it is a mode for a low part
226 that we should avoid changing when clearing
227 the rest of the reg. */
228 struct movable *match; /* First entry for same value */
229 struct movable *forces; /* An insn that must be moved if this is */
230 struct movable *next;
234 FILE *loop_dump_stream;
236 /* Forward declarations. */
238 static void find_and_verify_loops PARAMS ((rtx, struct loops *));
239 static void mark_loop_jump PARAMS ((rtx, struct loop *));
240 static void prescan_loop PARAMS ((struct loop *));
241 static int reg_in_basic_block_p PARAMS ((rtx, rtx));
242 static int consec_sets_invariant_p PARAMS ((const struct loop *,
244 static int labels_in_range_p PARAMS ((rtx, int));
245 static void count_one_set PARAMS ((struct loop_regs *, rtx, rtx, rtx *));
246 static void note_addr_stored PARAMS ((rtx, rtx, void *));
247 static void note_set_pseudo_multiple_uses PARAMS ((rtx, rtx, void *));
248 static int loop_reg_used_before_p PARAMS ((const struct loop *, rtx, rtx));
249 static void scan_loop PARAMS ((struct loop*, int));
251 static void replace_call_address PARAMS ((rtx, rtx, rtx));
253 static rtx skip_consec_insns PARAMS ((rtx, int));
254 static int libcall_benefit PARAMS ((rtx));
255 static void ignore_some_movables PARAMS ((struct loop_movables *));
256 static void force_movables PARAMS ((struct loop_movables *));
257 static void combine_movables PARAMS ((struct loop_movables *,
258 struct loop_regs *));
259 static int num_unmoved_movables PARAMS ((const struct loop *));
260 static int regs_match_p PARAMS ((rtx, rtx, struct loop_movables *));
261 static int rtx_equal_for_loop_p PARAMS ((rtx, rtx, struct loop_movables *,
262 struct loop_regs *));
263 static void add_label_notes PARAMS ((rtx, rtx));
264 static void move_movables PARAMS ((struct loop *loop, struct loop_movables *,
266 static void loop_movables_add PARAMS((struct loop_movables *,
268 static void loop_movables_free PARAMS((struct loop_movables *));
269 static int count_nonfixed_reads PARAMS ((const struct loop *, rtx));
270 static void loop_bivs_find PARAMS((struct loop *));
271 static void loop_bivs_init_find PARAMS((struct loop *));
272 static void loop_bivs_check PARAMS((struct loop *));
273 static void loop_givs_find PARAMS((struct loop *));
274 static void loop_givs_check PARAMS((struct loop *));
275 static int loop_biv_eliminable_p PARAMS((struct loop *, struct iv_class *,
277 static int loop_giv_reduce_benefit PARAMS((struct loop *, struct iv_class *,
278 struct induction *, rtx));
279 static void loop_givs_dead_check PARAMS((struct loop *, struct iv_class *));
280 static void loop_givs_reduce PARAMS((struct loop *, struct iv_class *));
281 static void loop_givs_rescan PARAMS((struct loop *, struct iv_class *,
283 static void loop_ivs_free PARAMS((struct loop *));
284 static void strength_reduce PARAMS ((struct loop *, int));
285 static void find_single_use_in_loop PARAMS ((struct loop_regs *, rtx, rtx));
286 static int valid_initial_value_p PARAMS ((rtx, rtx, int, rtx));
287 static void find_mem_givs PARAMS ((const struct loop *, rtx, rtx, int, int));
288 static void record_biv PARAMS ((struct loop *, struct induction *,
289 rtx, rtx, rtx, rtx, rtx *,
291 static void check_final_value PARAMS ((const struct loop *,
292 struct induction *));
293 static void loop_ivs_dump PARAMS((const struct loop *, FILE *, int));
294 static void loop_iv_class_dump PARAMS((const struct iv_class *, FILE *, int));
295 static void loop_biv_dump PARAMS((const struct induction *, FILE *, int));
296 static void loop_giv_dump PARAMS((const struct induction *, FILE *, int));
297 static void record_giv PARAMS ((const struct loop *, struct induction *,
298 rtx, rtx, rtx, rtx, rtx, rtx, int,
299 enum g_types, int, int, rtx *));
300 static void update_giv_derive PARAMS ((const struct loop *, rtx));
301 static void check_ext_dependent_givs PARAMS ((struct iv_class *,
302 struct loop_info *));
303 static int basic_induction_var PARAMS ((const struct loop *, rtx,
304 enum machine_mode, rtx, rtx,
305 rtx *, rtx *, rtx **));
306 static rtx simplify_giv_expr PARAMS ((const struct loop *, rtx, rtx *, int *));
307 static int general_induction_var PARAMS ((const struct loop *loop, rtx, rtx *,
308 rtx *, rtx *, rtx *, int, int *,
310 static int consec_sets_giv PARAMS ((const struct loop *, int, rtx,
311 rtx, rtx, rtx *, rtx *, rtx *, rtx *));
312 static int check_dbra_loop PARAMS ((struct loop *, int));
313 static rtx express_from_1 PARAMS ((rtx, rtx, rtx));
314 static rtx combine_givs_p PARAMS ((struct induction *, struct induction *));
315 static int cmp_combine_givs_stats PARAMS ((const PTR, const PTR));
316 static void combine_givs PARAMS ((struct loop_regs *, struct iv_class *));
317 static int product_cheap_p PARAMS ((rtx, rtx));
318 static int maybe_eliminate_biv PARAMS ((const struct loop *, struct iv_class *,
320 static int maybe_eliminate_biv_1 PARAMS ((const struct loop *, rtx, rtx,
321 struct iv_class *, int,
323 static int last_use_this_basic_block PARAMS ((rtx, rtx));
324 static void record_initial PARAMS ((rtx, rtx, void *));
325 static void update_reg_last_use PARAMS ((rtx, rtx));
326 static rtx next_insn_in_loop PARAMS ((const struct loop *, rtx));
327 static void loop_regs_scan PARAMS ((const struct loop *, int));
328 static int count_insns_in_loop PARAMS ((const struct loop *));
329 static void load_mems PARAMS ((const struct loop *));
330 static int insert_loop_mem PARAMS ((rtx *, void *));
331 static int replace_loop_mem PARAMS ((rtx *, void *));
332 static void replace_loop_mems PARAMS ((rtx, rtx, rtx));
333 static int replace_loop_reg PARAMS ((rtx *, void *));
334 static void replace_loop_regs PARAMS ((rtx insn, rtx, rtx));
335 static void note_reg_stored PARAMS ((rtx, rtx, void *));
336 static void try_copy_prop PARAMS ((const struct loop *, rtx, unsigned int));
337 static void try_swap_copy_prop PARAMS ((const struct loop *, rtx,
339 static int replace_label PARAMS ((rtx *, void *));
340 static rtx check_insn_for_givs PARAMS((struct loop *, rtx, int, int));
341 static rtx check_insn_for_bivs PARAMS((struct loop *, rtx, int, int));
342 static rtx gen_add_mult PARAMS ((rtx, rtx, rtx, rtx));
343 static void loop_regs_update PARAMS ((const struct loop *, rtx));
344 static int iv_add_mult_cost PARAMS ((rtx, rtx, rtx, rtx));
346 static rtx loop_insn_emit_after PARAMS((const struct loop *, basic_block,
348 static rtx loop_call_insn_emit_before PARAMS((const struct loop *,
349 basic_block, rtx, rtx));
350 static rtx loop_call_insn_hoist PARAMS((const struct loop *, rtx));
351 static rtx loop_insn_sink_or_swim PARAMS((const struct loop *, rtx));
353 static void loop_dump_aux PARAMS ((const struct loop *, FILE *, int));
354 static void loop_delete_insns PARAMS ((rtx, rtx));
355 static HOST_WIDE_INT remove_constant_addition PARAMS ((rtx *));
356 void debug_ivs PARAMS ((const struct loop *));
357 void debug_iv_class PARAMS ((const struct iv_class *));
358 void debug_biv PARAMS ((const struct induction *));
359 void debug_giv PARAMS ((const struct induction *));
360 void debug_loop PARAMS ((const struct loop *));
361 void debug_loops PARAMS ((const struct loops *));
363 typedef struct rtx_pair
369 typedef struct loop_replace_args
376 /* Nonzero iff INSN is between START and END, inclusive. */
377 #define INSN_IN_RANGE_P(INSN, START, END) \
378 (INSN_UID (INSN) < max_uid_for_loop \
379 && INSN_LUID (INSN) >= INSN_LUID (START) \
380 && INSN_LUID (INSN) <= INSN_LUID (END))
382 /* Indirect_jump_in_function is computed once per function. */
383 static int indirect_jump_in_function;
384 static int indirect_jump_in_function_p PARAMS ((rtx));
386 static int compute_luids PARAMS ((rtx, rtx, int));
388 static int biv_elimination_giv_has_0_offset PARAMS ((struct induction *,
392 /* Benefit penalty, if a giv is not replaceable, i.e. must emit an insn to
393 copy the value of the strength reduced giv to its original register. */
394 static int copy_cost;
396 /* Cost of using a register, to normalize the benefits of a giv. */
397 static int reg_address_cost;
402 rtx reg = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 1);
404 reg_address_cost = address_cost (reg, SImode);
406 copy_cost = COSTS_N_INSNS (1);
409 /* Compute the mapping from uids to luids.
410 LUIDs are numbers assigned to insns, like uids,
411 except that luids increase monotonically through the code.
412 Start at insn START and stop just before END. Assign LUIDs
413 starting with PREV_LUID + 1. Return the last assigned LUID + 1. */
415 compute_luids (start, end, prev_luid)
422 for (insn = start, i = prev_luid; insn != end; insn = NEXT_INSN (insn))
424 if (INSN_UID (insn) >= max_uid_for_loop)
426 /* Don't assign luids to line-number NOTEs, so that the distance in
427 luids between two insns is not affected by -g. */
428 if (GET_CODE (insn) != NOTE
429 || NOTE_LINE_NUMBER (insn) <= 0)
430 uid_luid[INSN_UID (insn)] = ++i;
432 /* Give a line number note the same luid as preceding insn. */
433 uid_luid[INSN_UID (insn)] = i;
438 /* Entry point of this file. Perform loop optimization
439 on the current function. F is the first insn of the function
440 and DUMPFILE is a stream for output of a trace of actions taken
441 (or 0 if none should be output). */
444 loop_optimize (f, dumpfile, flags)
445 /* f is the first instruction of a chain of insns for one function */
452 struct loops loops_data;
453 struct loops *loops = &loops_data;
454 struct loop_info *loops_info;
456 loop_dump_stream = dumpfile;
458 init_recog_no_volatile ();
460 max_reg_before_loop = max_reg_num ();
461 loop_max_reg = max_reg_before_loop;
465 /* Count the number of loops. */
468 for (insn = f; insn; insn = NEXT_INSN (insn))
470 if (GET_CODE (insn) == NOTE
471 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
475 /* Don't waste time if no loops. */
476 if (max_loop_num == 0)
479 loops->num = max_loop_num;
481 /* Get size to use for tables indexed by uids.
482 Leave some space for labels allocated by find_and_verify_loops. */
483 max_uid_for_loop = get_max_uid () + 1 + max_loop_num * 32;
485 uid_luid = (int *) xcalloc (max_uid_for_loop, sizeof (int));
486 uid_loop = (struct loop **) xcalloc (max_uid_for_loop,
487 sizeof (struct loop *));
489 /* Allocate storage for array of loops. */
490 loops->array = (struct loop *)
491 xcalloc (loops->num, sizeof (struct loop));
493 /* Find and process each loop.
494 First, find them, and record them in order of their beginnings. */
495 find_and_verify_loops (f, loops);
497 /* Allocate and initialize auxiliary loop information. */
498 loops_info = xcalloc (loops->num, sizeof (struct loop_info));
499 for (i = 0; i < loops->num; i++)
500 loops->array[i].aux = loops_info + i;
502 /* Now find all register lifetimes. This must be done after
503 find_and_verify_loops, because it might reorder the insns in the
505 reg_scan (f, max_reg_before_loop, 1);
507 /* This must occur after reg_scan so that registers created by gcse
508 will have entries in the register tables.
510 We could have added a call to reg_scan after gcse_main in toplev.c,
511 but moving this call to init_alias_analysis is more efficient. */
512 init_alias_analysis ();
514 /* See if we went too far. Note that get_max_uid already returns
515 one more that the maximum uid of all insn. */
516 if (get_max_uid () > max_uid_for_loop)
518 /* Now reset it to the actual size we need. See above. */
519 max_uid_for_loop = get_max_uid ();
521 /* find_and_verify_loops has already called compute_luids, but it
522 might have rearranged code afterwards, so we need to recompute
524 max_luid = compute_luids (f, NULL_RTX, 0);
526 /* Don't leave gaps in uid_luid for insns that have been
527 deleted. It is possible that the first or last insn
528 using some register has been deleted by cross-jumping.
529 Make sure that uid_luid for that former insn's uid
530 points to the general area where that insn used to be. */
531 for (i = 0; i < max_uid_for_loop; i++)
533 uid_luid[0] = uid_luid[i];
534 if (uid_luid[0] != 0)
537 for (i = 0; i < max_uid_for_loop; i++)
538 if (uid_luid[i] == 0)
539 uid_luid[i] = uid_luid[i - 1];
541 /* Determine if the function has indirect jump. On some systems
542 this prevents low overhead loop instructions from being used. */
543 indirect_jump_in_function = indirect_jump_in_function_p (f);
545 /* Now scan the loops, last ones first, since this means inner ones are done
546 before outer ones. */
547 for (i = max_loop_num - 1; i >= 0; i--)
549 struct loop *loop = &loops->array[i];
551 if (! loop->invalid && loop->end)
552 scan_loop (loop, flags);
555 /* If there were lexical blocks inside the loop, they have been
556 replicated. We will now have more than one NOTE_INSN_BLOCK_BEG
557 and NOTE_INSN_BLOCK_END for each such block. We must duplicate
558 the BLOCKs as well. */
559 if (write_symbols != NO_DEBUG)
562 end_alias_analysis ();
571 /* Returns the next insn, in execution order, after INSN. START and
572 END are the NOTE_INSN_LOOP_BEG and NOTE_INSN_LOOP_END for the loop,
573 respectively. LOOP->TOP, if non-NULL, is the top of the loop in the
574 insn-stream; it is used with loops that are entered near the
578 next_insn_in_loop (loop, insn)
579 const struct loop *loop;
582 insn = NEXT_INSN (insn);
584 if (insn == loop->end)
587 /* Go to the top of the loop, and continue there. */
594 if (insn == loop->scan_start)
601 /* Optimize one loop described by LOOP. */
603 /* ??? Could also move memory writes out of loops if the destination address
604 is invariant, the source is invariant, the memory write is not volatile,
605 and if we can prove that no read inside the loop can read this address
606 before the write occurs. If there is a read of this address after the
607 write, then we can also mark the memory read as invariant. */
610 scan_loop (loop, flags)
614 struct loop_info *loop_info = LOOP_INFO (loop);
615 struct loop_regs *regs = LOOP_REGS (loop);
617 rtx loop_start = loop->start;
618 rtx loop_end = loop->end;
620 /* 1 if we are scanning insns that could be executed zero times. */
622 /* 1 if we are scanning insns that might never be executed
623 due to a subroutine call which might exit before they are reached. */
625 /* Jump insn that enters the loop, or 0 if control drops in. */
626 rtx loop_entry_jump = 0;
627 /* Number of insns in the loop. */
630 rtx temp, update_start, update_end;
631 /* The SET from an insn, if it is the only SET in the insn. */
633 /* Chain describing insns movable in current loop. */
634 struct loop_movables *movables = LOOP_MOVABLES (loop);
635 /* Ratio of extra register life span we can justify
636 for saving an instruction. More if loop doesn't call subroutines
637 since in that case saving an insn makes more difference
638 and more registers are available. */
640 /* Nonzero if we are scanning instructions in a sub-loop. */
648 /* Determine whether this loop starts with a jump down to a test at
649 the end. This will occur for a small number of loops with a test
650 that is too complex to duplicate in front of the loop.
652 We search for the first insn or label in the loop, skipping NOTEs.
653 However, we must be careful not to skip past a NOTE_INSN_LOOP_BEG
654 (because we might have a loop executed only once that contains a
655 loop which starts with a jump to its exit test) or a NOTE_INSN_LOOP_END
656 (in case we have a degenerate loop).
658 Note that if we mistakenly think that a loop is entered at the top
659 when, in fact, it is entered at the exit test, the only effect will be
660 slightly poorer optimization. Making the opposite error can generate
661 incorrect code. Since very few loops now start with a jump to the
662 exit test, the code here to detect that case is very conservative. */
664 for (p = NEXT_INSN (loop_start);
666 && GET_CODE (p) != CODE_LABEL && ! INSN_P (p)
667 && (GET_CODE (p) != NOTE
668 || (NOTE_LINE_NUMBER (p) != NOTE_INSN_LOOP_BEG
669 && NOTE_LINE_NUMBER (p) != NOTE_INSN_LOOP_END));
673 loop->scan_start = p;
675 /* If loop end is the end of the current function, then emit a
676 NOTE_INSN_DELETED after loop_end and set loop->sink to the dummy
677 note insn. This is the position we use when sinking insns out of
679 if (NEXT_INSN (loop->end) != 0)
680 loop->sink = NEXT_INSN (loop->end);
682 loop->sink = emit_note_after (NOTE_INSN_DELETED, loop->end);
684 /* Set up variables describing this loop. */
686 threshold = (loop_info->has_call ? 1 : 2) * (1 + n_non_fixed_regs);
688 /* If loop has a jump before the first label,
689 the true entry is the target of that jump.
690 Start scan from there.
691 But record in LOOP->TOP the place where the end-test jumps
692 back to so we can scan that after the end of the loop. */
693 if (GET_CODE (p) == JUMP_INSN)
697 /* Loop entry must be unconditional jump (and not a RETURN) */
698 if (any_uncondjump_p (p)
699 && JUMP_LABEL (p) != 0
700 /* Check to see whether the jump actually
701 jumps out of the loop (meaning it's no loop).
702 This case can happen for things like
703 do {..} while (0). If this label was generated previously
704 by loop, we can't tell anything about it and have to reject
706 && INSN_IN_RANGE_P (JUMP_LABEL (p), loop_start, loop_end))
708 loop->top = next_label (loop->scan_start);
709 loop->scan_start = JUMP_LABEL (p);
713 /* If LOOP->SCAN_START was an insn created by loop, we don't know its luid
714 as required by loop_reg_used_before_p. So skip such loops. (This
715 test may never be true, but it's best to play it safe.)
717 Also, skip loops where we do not start scanning at a label. This
718 test also rejects loops starting with a JUMP_INSN that failed the
721 if (INSN_UID (loop->scan_start) >= max_uid_for_loop
722 || GET_CODE (loop->scan_start) != CODE_LABEL)
724 if (loop_dump_stream)
725 fprintf (loop_dump_stream, "\nLoop from %d to %d is phony.\n\n",
726 INSN_UID (loop_start), INSN_UID (loop_end));
730 /* Allocate extra space for REGs that might be created by load_mems.
731 We allocate a little extra slop as well, in the hopes that we
732 won't have to reallocate the regs array. */
733 loop_regs_scan (loop, loop_info->mems_idx + 16);
734 insn_count = count_insns_in_loop (loop);
736 if (loop_dump_stream)
738 fprintf (loop_dump_stream, "\nLoop from %d to %d: %d real insns.\n",
739 INSN_UID (loop_start), INSN_UID (loop_end), insn_count);
741 fprintf (loop_dump_stream, "Continue at insn %d.\n",
742 INSN_UID (loop->cont));
745 /* Scan through the loop finding insns that are safe to move.
746 Set REGS->ARRAY[I].SET_IN_LOOP negative for the reg I being set, so that
747 this reg will be considered invariant for subsequent insns.
748 We consider whether subsequent insns use the reg
749 in deciding whether it is worth actually moving.
751 MAYBE_NEVER is nonzero if we have passed a conditional jump insn
752 and therefore it is possible that the insns we are scanning
753 would never be executed. At such times, we must make sure
754 that it is safe to execute the insn once instead of zero times.
755 When MAYBE_NEVER is 0, all insns will be executed at least once
756 so that is not a problem. */
758 for (p = next_insn_in_loop (loop, loop->scan_start);
760 p = next_insn_in_loop (loop, p))
762 if (GET_CODE (p) == INSN
763 && (set = single_set (p))
764 && GET_CODE (SET_DEST (set)) == REG
765 #ifdef PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
766 && SET_DEST (set) != pic_offset_table_rtx
768 && ! regs->array[REGNO (SET_DEST (set))].may_not_optimize)
773 rtx src = SET_SRC (set);
774 rtx dependencies = 0;
776 /* Figure out what to use as a source of this insn. If a REG_EQUIV
777 note is given or if a REG_EQUAL note with a constant operand is
778 specified, use it as the source and mark that we should move
779 this insn by calling emit_move_insn rather that duplicating the
782 Otherwise, only use the REG_EQUAL contents if a REG_RETVAL note
784 temp = find_reg_note (p, REG_EQUIV, NULL_RTX);
786 src = XEXP (temp, 0), move_insn = 1;
789 temp = find_reg_note (p, REG_EQUAL, NULL_RTX);
790 if (temp && CONSTANT_P (XEXP (temp, 0)))
791 src = XEXP (temp, 0), move_insn = 1;
792 if (temp && find_reg_note (p, REG_RETVAL, NULL_RTX))
794 src = XEXP (temp, 0);
795 /* A libcall block can use regs that don't appear in
796 the equivalent expression. To move the libcall,
797 we must move those regs too. */
798 dependencies = libcall_other_reg (p, src);
802 /* For parallels, add any possible uses to the depencies, as we can't move
803 the insn without resolving them first. */
804 if (GET_CODE (PATTERN (p)) == PARALLEL)
806 for (i = 0; i < XVECLEN (PATTERN (p), 0); i++)
808 rtx x = XVECEXP (PATTERN (p), 0, i);
809 if (GET_CODE (x) == USE)
810 dependencies = gen_rtx_EXPR_LIST (VOIDmode, XEXP (x, 0), dependencies);
814 /* Don't try to optimize a register that was made
815 by loop-optimization for an inner loop.
816 We don't know its life-span, so we can't compute the benefit. */
817 if (REGNO (SET_DEST (set)) >= max_reg_before_loop)
819 else if (/* The register is used in basic blocks other
820 than the one where it is set (meaning that
821 something after this point in the loop might
822 depend on its value before the set). */
823 ! reg_in_basic_block_p (p, SET_DEST (set))
824 /* And the set is not guaranteed to be executed once
825 the loop starts, or the value before the set is
826 needed before the set occurs...
828 ??? Note we have quadratic behaviour here, mitigated
829 by the fact that the previous test will often fail for
830 large loops. Rather than re-scanning the entire loop
831 each time for register usage, we should build tables
832 of the register usage and use them here instead. */
834 || loop_reg_used_before_p (loop, set, p)))
835 /* It is unsafe to move the set.
837 This code used to consider it OK to move a set of a variable
838 which was not created by the user and not used in an exit test.
839 That behavior is incorrect and was removed. */
841 else if ((tem = loop_invariant_p (loop, src))
842 && (dependencies == 0
843 || (tem2 = loop_invariant_p (loop, dependencies)) != 0)
844 && (regs->array[REGNO (SET_DEST (set))].set_in_loop == 1
846 = consec_sets_invariant_p
847 (loop, SET_DEST (set),
848 regs->array[REGNO (SET_DEST (set))].set_in_loop,
850 /* If the insn can cause a trap (such as divide by zero),
851 can't move it unless it's guaranteed to be executed
852 once loop is entered. Even a function call might
853 prevent the trap insn from being reached
854 (since it might exit!) */
855 && ! ((maybe_never || call_passed)
856 && may_trap_p (src)))
859 int regno = REGNO (SET_DEST (set));
861 /* A potential lossage is where we have a case where two insns
862 can be combined as long as they are both in the loop, but
863 we move one of them outside the loop. For large loops,
864 this can lose. The most common case of this is the address
865 of a function being called.
867 Therefore, if this register is marked as being used exactly
868 once if we are in a loop with calls (a "large loop"), see if
869 we can replace the usage of this register with the source
870 of this SET. If we can, delete this insn.
872 Don't do this if P has a REG_RETVAL note or if we have
873 SMALL_REGISTER_CLASSES and SET_SRC is a hard register. */
875 if (loop_info->has_call
876 && regs->array[regno].single_usage != 0
877 && regs->array[regno].single_usage != const0_rtx
878 && REGNO_FIRST_UID (regno) == INSN_UID (p)
879 && (REGNO_LAST_UID (regno)
880 == INSN_UID (regs->array[regno].single_usage))
881 && regs->array[regno].set_in_loop == 1
882 && GET_CODE (SET_SRC (set)) != ASM_OPERANDS
883 && ! side_effects_p (SET_SRC (set))
884 && ! find_reg_note (p, REG_RETVAL, NULL_RTX)
885 && (! SMALL_REGISTER_CLASSES
886 || (! (GET_CODE (SET_SRC (set)) == REG
887 && REGNO (SET_SRC (set)) < FIRST_PSEUDO_REGISTER)))
888 /* This test is not redundant; SET_SRC (set) might be
889 a call-clobbered register and the life of REGNO
890 might span a call. */
891 && ! modified_between_p (SET_SRC (set), p,
892 regs->array[regno].single_usage)
893 && no_labels_between_p (p, regs->array[regno].single_usage)
894 && validate_replace_rtx (SET_DEST (set), SET_SRC (set),
895 regs->array[regno].single_usage))
897 /* Replace any usage in a REG_EQUAL note. Must copy the
898 new source, so that we don't get rtx sharing between the
899 SET_SOURCE and REG_NOTES of insn p. */
900 REG_NOTES (regs->array[regno].single_usage)
901 = replace_rtx (REG_NOTES (regs->array[regno].single_usage),
902 SET_DEST (set), copy_rtx (SET_SRC (set)));
905 for (i = 0; i < LOOP_REGNO_NREGS (regno, SET_DEST (set)); i++)
906 regs->array[regno+i].set_in_loop = 0;
910 m = (struct movable *) xmalloc (sizeof (struct movable));
914 m->dependencies = dependencies;
915 m->set_dest = SET_DEST (set);
917 m->consec = regs->array[REGNO (SET_DEST (set))].set_in_loop - 1;
921 m->move_insn = move_insn;
922 m->move_insn_first = 0;
923 m->is_equiv = (find_reg_note (p, REG_EQUIV, NULL_RTX) != 0);
924 m->savemode = VOIDmode;
926 /* Set M->cond if either loop_invariant_p
927 or consec_sets_invariant_p returned 2
928 (only conditionally invariant). */
929 m->cond = ((tem | tem1 | tem2) > 1);
930 m->global = LOOP_REG_GLOBAL_P (loop, regno);
932 m->lifetime = LOOP_REG_LIFETIME (loop, regno);
933 m->savings = regs->array[regno].n_times_set;
934 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
935 m->savings += libcall_benefit (p);
936 for (i = 0; i < LOOP_REGNO_NREGS (regno, SET_DEST (set)); i++)
937 regs->array[regno+i].set_in_loop = move_insn ? -2 : -1;
938 /* Add M to the end of the chain MOVABLES. */
939 loop_movables_add (movables, m);
943 /* It is possible for the first instruction to have a
944 REG_EQUAL note but a non-invariant SET_SRC, so we must
945 remember the status of the first instruction in case
946 the last instruction doesn't have a REG_EQUAL note. */
947 m->move_insn_first = m->move_insn;
949 /* Skip this insn, not checking REG_LIBCALL notes. */
950 p = next_nonnote_insn (p);
951 /* Skip the consecutive insns, if there are any. */
952 p = skip_consec_insns (p, m->consec);
953 /* Back up to the last insn of the consecutive group. */
954 p = prev_nonnote_insn (p);
956 /* We must now reset m->move_insn, m->is_equiv, and possibly
957 m->set_src to correspond to the effects of all the
959 temp = find_reg_note (p, REG_EQUIV, NULL_RTX);
961 m->set_src = XEXP (temp, 0), m->move_insn = 1;
964 temp = find_reg_note (p, REG_EQUAL, NULL_RTX);
965 if (temp && CONSTANT_P (XEXP (temp, 0)))
966 m->set_src = XEXP (temp, 0), m->move_insn = 1;
971 m->is_equiv = (find_reg_note (p, REG_EQUIV, NULL_RTX) != 0);
974 /* If this register is always set within a STRICT_LOW_PART
975 or set to zero, then its high bytes are constant.
976 So clear them outside the loop and within the loop
977 just load the low bytes.
978 We must check that the machine has an instruction to do so.
979 Also, if the value loaded into the register
980 depends on the same register, this cannot be done. */
981 else if (SET_SRC (set) == const0_rtx
982 && GET_CODE (NEXT_INSN (p)) == INSN
983 && (set1 = single_set (NEXT_INSN (p)))
984 && GET_CODE (set1) == SET
985 && (GET_CODE (SET_DEST (set1)) == STRICT_LOW_PART)
986 && (GET_CODE (XEXP (SET_DEST (set1), 0)) == SUBREG)
987 && (SUBREG_REG (XEXP (SET_DEST (set1), 0))
989 && !reg_mentioned_p (SET_DEST (set), SET_SRC (set1)))
991 int regno = REGNO (SET_DEST (set));
992 if (regs->array[regno].set_in_loop == 2)
995 m = (struct movable *) xmalloc (sizeof (struct movable));
998 m->set_dest = SET_DEST (set);
1005 m->move_insn_first = 0;
1007 /* If the insn may not be executed on some cycles,
1008 we can't clear the whole reg; clear just high part.
1009 Not even if the reg is used only within this loop.
1016 Clearing x before the inner loop could clobber a value
1017 being saved from the last time around the outer loop.
1018 However, if the reg is not used outside this loop
1019 and all uses of the register are in the same
1020 basic block as the store, there is no problem.
1022 If this insn was made by loop, we don't know its
1023 INSN_LUID and hence must make a conservative
1025 m->global = (INSN_UID (p) >= max_uid_for_loop
1026 || LOOP_REG_GLOBAL_P (loop, regno)
1027 || (labels_in_range_p
1028 (p, REGNO_FIRST_LUID (regno))));
1029 if (maybe_never && m->global)
1030 m->savemode = GET_MODE (SET_SRC (set1));
1032 m->savemode = VOIDmode;
1036 m->lifetime = LOOP_REG_LIFETIME (loop, regno);
1038 for (i = 0; i < LOOP_REGNO_NREGS (regno, SET_DEST (set)); i++)
1039 regs->array[regno+i].set_in_loop = -1;
1040 /* Add M to the end of the chain MOVABLES. */
1041 loop_movables_add (movables, m);
1045 /* Past a call insn, we get to insns which might not be executed
1046 because the call might exit. This matters for insns that trap.
1047 Constant and pure call insns always return, so they don't count. */
1048 else if (GET_CODE (p) == CALL_INSN && ! CONST_OR_PURE_CALL_P (p))
1050 /* Past a label or a jump, we get to insns for which we
1051 can't count on whether or how many times they will be
1052 executed during each iteration. Therefore, we can
1053 only move out sets of trivial variables
1054 (those not used after the loop). */
1055 /* Similar code appears twice in strength_reduce. */
1056 else if ((GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN)
1057 /* If we enter the loop in the middle, and scan around to the
1058 beginning, don't set maybe_never for that. This must be an
1059 unconditional jump, otherwise the code at the top of the
1060 loop might never be executed. Unconditional jumps are
1061 followed by a barrier then the loop_end. */
1062 && ! (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p) == loop->top
1063 && NEXT_INSN (NEXT_INSN (p)) == loop_end
1064 && any_uncondjump_p (p)))
1066 else if (GET_CODE (p) == NOTE)
1068 /* At the virtual top of a converted loop, insns are again known to
1069 be executed: logically, the loop begins here even though the exit
1070 code has been duplicated. */
1071 if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP && loop_depth == 0)
1072 maybe_never = call_passed = 0;
1073 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
1075 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
1080 /* If one movable subsumes another, ignore that other. */
1082 ignore_some_movables (movables);
1084 /* For each movable insn, see if the reg that it loads
1085 leads when it dies right into another conditionally movable insn.
1086 If so, record that the second insn "forces" the first one,
1087 since the second can be moved only if the first is. */
1089 force_movables (movables);
1091 /* See if there are multiple movable insns that load the same value.
1092 If there are, make all but the first point at the first one
1093 through the `match' field, and add the priorities of them
1094 all together as the priority of the first. */
1096 combine_movables (movables, regs);
1098 /* Now consider each movable insn to decide whether it is worth moving.
1099 Store 0 in regs->array[I].set_in_loop for each reg I that is moved.
1101 Generally this increases code size, so do not move moveables when
1102 optimizing for code size. */
1104 if (! optimize_size)
1106 move_movables (loop, movables, threshold, insn_count);
1108 /* Recalculate regs->array if move_movables has created new
1110 if (max_reg_num () > regs->num)
1112 loop_regs_scan (loop, 0);
1113 for (update_start = loop_start;
1114 PREV_INSN (update_start)
1115 && GET_CODE (PREV_INSN (update_start)) != CODE_LABEL;
1116 update_start = PREV_INSN (update_start))
1118 update_end = NEXT_INSN (loop_end);
1120 reg_scan_update (update_start, update_end, loop_max_reg);
1121 loop_max_reg = max_reg_num ();
1125 /* Now candidates that still are negative are those not moved.
1126 Change regs->array[I].set_in_loop to indicate that those are not actually
1128 for (i = 0; i < regs->num; i++)
1129 if (regs->array[i].set_in_loop < 0)
1130 regs->array[i].set_in_loop = regs->array[i].n_times_set;
1132 /* Now that we've moved some things out of the loop, we might be able to
1133 hoist even more memory references. */
1136 /* Recalculate regs->array if load_mems has created new registers. */
1137 if (max_reg_num () > regs->num)
1138 loop_regs_scan (loop, 0);
1140 for (update_start = loop_start;
1141 PREV_INSN (update_start)
1142 && GET_CODE (PREV_INSN (update_start)) != CODE_LABEL;
1143 update_start = PREV_INSN (update_start))
1145 update_end = NEXT_INSN (loop_end);
1147 reg_scan_update (update_start, update_end, loop_max_reg);
1148 loop_max_reg = max_reg_num ();
1150 if (flag_strength_reduce)
1152 if (update_end && GET_CODE (update_end) == CODE_LABEL)
1153 /* Ensure our label doesn't go away. */
1154 LABEL_NUSES (update_end)++;
1156 strength_reduce (loop, flags);
1158 reg_scan_update (update_start, update_end, loop_max_reg);
1159 loop_max_reg = max_reg_num ();
1161 if (update_end && GET_CODE (update_end) == CODE_LABEL
1162 && --LABEL_NUSES (update_end) == 0)
1163 delete_related_insns (update_end);
1167 /* The movable information is required for strength reduction. */
1168 loop_movables_free (movables);
1175 /* Add elements to *OUTPUT to record all the pseudo-regs
1176 mentioned in IN_THIS but not mentioned in NOT_IN_THIS. */
1179 record_excess_regs (in_this, not_in_this, output)
1180 rtx in_this, not_in_this;
1187 code = GET_CODE (in_this);
1201 if (REGNO (in_this) >= FIRST_PSEUDO_REGISTER
1202 && ! reg_mentioned_p (in_this, not_in_this))
1203 *output = gen_rtx_EXPR_LIST (VOIDmode, in_this, *output);
1210 fmt = GET_RTX_FORMAT (code);
1211 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1218 for (j = 0; j < XVECLEN (in_this, i); j++)
1219 record_excess_regs (XVECEXP (in_this, i, j), not_in_this, output);
1223 record_excess_regs (XEXP (in_this, i), not_in_this, output);
1229 /* Check what regs are referred to in the libcall block ending with INSN,
1230 aside from those mentioned in the equivalent value.
1231 If there are none, return 0.
1232 If there are one or more, return an EXPR_LIST containing all of them. */
1235 libcall_other_reg (insn, equiv)
1238 rtx note = find_reg_note (insn, REG_RETVAL, NULL_RTX);
1239 rtx p = XEXP (note, 0);
1242 /* First, find all the regs used in the libcall block
1243 that are not mentioned as inputs to the result. */
1247 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
1248 || GET_CODE (p) == CALL_INSN)
1249 record_excess_regs (PATTERN (p), equiv, &output);
1256 /* Return 1 if all uses of REG
1257 are between INSN and the end of the basic block. */
1260 reg_in_basic_block_p (insn, reg)
1263 int regno = REGNO (reg);
1266 if (REGNO_FIRST_UID (regno) != INSN_UID (insn))
1269 /* Search this basic block for the already recorded last use of the reg. */
1270 for (p = insn; p; p = NEXT_INSN (p))
1272 switch (GET_CODE (p))
1279 /* Ordinary insn: if this is the last use, we win. */
1280 if (REGNO_LAST_UID (regno) == INSN_UID (p))
1285 /* Jump insn: if this is the last use, we win. */
1286 if (REGNO_LAST_UID (regno) == INSN_UID (p))
1288 /* Otherwise, it's the end of the basic block, so we lose. */
1293 /* It's the end of the basic block, so we lose. */
1301 /* The "last use" that was recorded can't be found after the first
1302 use. This can happen when the last use was deleted while
1303 processing an inner loop, this inner loop was then completely
1304 unrolled, and the outer loop is always exited after the inner loop,
1305 so that everything after the first use becomes a single basic block. */
1309 /* Compute the benefit of eliminating the insns in the block whose
1310 last insn is LAST. This may be a group of insns used to compute a
1311 value directly or can contain a library call. */
1314 libcall_benefit (last)
1320 for (insn = XEXP (find_reg_note (last, REG_RETVAL, NULL_RTX), 0);
1321 insn != last; insn = NEXT_INSN (insn))
1323 if (GET_CODE (insn) == CALL_INSN)
1324 benefit += 10; /* Assume at least this many insns in a library
1326 else if (GET_CODE (insn) == INSN
1327 && GET_CODE (PATTERN (insn)) != USE
1328 && GET_CODE (PATTERN (insn)) != CLOBBER)
1335 /* Skip COUNT insns from INSN, counting library calls as 1 insn. */
1338 skip_consec_insns (insn, count)
1342 for (; count > 0; count--)
1346 /* If first insn of libcall sequence, skip to end. */
1347 /* Do this at start of loop, since INSN is guaranteed to
1349 if (GET_CODE (insn) != NOTE
1350 && (temp = find_reg_note (insn, REG_LIBCALL, NULL_RTX)))
1351 insn = XEXP (temp, 0);
1354 insn = NEXT_INSN (insn);
1355 while (GET_CODE (insn) == NOTE);
1361 /* Ignore any movable whose insn falls within a libcall
1362 which is part of another movable.
1363 We make use of the fact that the movable for the libcall value
1364 was made later and so appears later on the chain. */
1367 ignore_some_movables (movables)
1368 struct loop_movables *movables;
1370 struct movable *m, *m1;
1372 for (m = movables->head; m; m = m->next)
1374 /* Is this a movable for the value of a libcall? */
1375 rtx note = find_reg_note (m->insn, REG_RETVAL, NULL_RTX);
1379 /* Check for earlier movables inside that range,
1380 and mark them invalid. We cannot use LUIDs here because
1381 insns created by loop.c for prior loops don't have LUIDs.
1382 Rather than reject all such insns from movables, we just
1383 explicitly check each insn in the libcall (since invariant
1384 libcalls aren't that common). */
1385 for (insn = XEXP (note, 0); insn != m->insn; insn = NEXT_INSN (insn))
1386 for (m1 = movables->head; m1 != m; m1 = m1->next)
1387 if (m1->insn == insn)
1393 /* For each movable insn, see if the reg that it loads
1394 leads when it dies right into another conditionally movable insn.
1395 If so, record that the second insn "forces" the first one,
1396 since the second can be moved only if the first is. */
1399 force_movables (movables)
1400 struct loop_movables *movables;
1402 struct movable *m, *m1;
1404 for (m1 = movables->head; m1; m1 = m1->next)
1405 /* Omit this if moving just the (SET (REG) 0) of a zero-extend. */
1406 if (!m1->partial && !m1->done)
1408 int regno = m1->regno;
1409 for (m = m1->next; m; m = m->next)
1410 /* ??? Could this be a bug? What if CSE caused the
1411 register of M1 to be used after this insn?
1412 Since CSE does not update regno_last_uid,
1413 this insn M->insn might not be where it dies.
1414 But very likely this doesn't matter; what matters is
1415 that M's reg is computed from M1's reg. */
1416 if (INSN_UID (m->insn) == REGNO_LAST_UID (regno)
1419 if (m != 0 && m->set_src == m1->set_dest
1420 /* If m->consec, m->set_src isn't valid. */
1424 /* Increase the priority of the moving the first insn
1425 since it permits the second to be moved as well. */
1429 m1->lifetime += m->lifetime;
1430 m1->savings += m->savings;
1435 /* Find invariant expressions that are equal and can be combined into
1439 combine_movables (movables, regs)
1440 struct loop_movables *movables;
1441 struct loop_regs *regs;
1444 char *matched_regs = (char *) xmalloc (regs->num);
1445 enum machine_mode mode;
1447 /* Regs that are set more than once are not allowed to match
1448 or be matched. I'm no longer sure why not. */
1449 /* Only pseudo registers are allowed to match or be matched,
1450 since move_movables does not validate the change. */
1451 /* Perhaps testing m->consec_sets would be more appropriate here? */
1453 for (m = movables->head; m; m = m->next)
1454 if (m->match == 0 && regs->array[m->regno].n_times_set == 1
1455 && m->regno >= FIRST_PSEUDO_REGISTER
1459 int regno = m->regno;
1461 memset (matched_regs, 0, regs->num);
1462 matched_regs[regno] = 1;
1464 /* We want later insns to match the first one. Don't make the first
1465 one match any later ones. So start this loop at m->next. */
1466 for (m1 = m->next; m1; m1 = m1->next)
1467 if (m != m1 && m1->match == 0
1468 && regs->array[m1->regno].n_times_set == 1
1469 && m1->regno >= FIRST_PSEUDO_REGISTER
1470 /* A reg used outside the loop mustn't be eliminated. */
1472 /* A reg used for zero-extending mustn't be eliminated. */
1474 && (matched_regs[m1->regno]
1477 /* Can combine regs with different modes loaded from the
1478 same constant only if the modes are the same or
1479 if both are integer modes with M wider or the same
1480 width as M1. The check for integer is redundant, but
1481 safe, since the only case of differing destination
1482 modes with equal sources is when both sources are
1483 VOIDmode, i.e., CONST_INT. */
1484 (GET_MODE (m->set_dest) == GET_MODE (m1->set_dest)
1485 || (GET_MODE_CLASS (GET_MODE (m->set_dest)) == MODE_INT
1486 && GET_MODE_CLASS (GET_MODE (m1->set_dest)) == MODE_INT
1487 && (GET_MODE_BITSIZE (GET_MODE (m->set_dest))
1488 >= GET_MODE_BITSIZE (GET_MODE (m1->set_dest)))))
1489 /* See if the source of M1 says it matches M. */
1490 && ((GET_CODE (m1->set_src) == REG
1491 && matched_regs[REGNO (m1->set_src)])
1492 || rtx_equal_for_loop_p (m->set_src, m1->set_src,
1494 && ((m->dependencies == m1->dependencies)
1495 || rtx_equal_p (m->dependencies, m1->dependencies)))
1497 m->lifetime += m1->lifetime;
1498 m->savings += m1->savings;
1501 matched_regs[m1->regno] = 1;
1505 /* Now combine the regs used for zero-extension.
1506 This can be done for those not marked `global'
1507 provided their lives don't overlap. */
1509 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
1510 mode = GET_MODE_WIDER_MODE (mode))
1512 struct movable *m0 = 0;
1514 /* Combine all the registers for extension from mode MODE.
1515 Don't combine any that are used outside this loop. */
1516 for (m = movables->head; m; m = m->next)
1517 if (m->partial && ! m->global
1518 && mode == GET_MODE (SET_SRC (PATTERN (NEXT_INSN (m->insn)))))
1522 int first = REGNO_FIRST_LUID (m->regno);
1523 int last = REGNO_LAST_LUID (m->regno);
1527 /* First one: don't check for overlap, just record it. */
1532 /* Make sure they extend to the same mode.
1533 (Almost always true.) */
1534 if (GET_MODE (m->set_dest) != GET_MODE (m0->set_dest))
1537 /* We already have one: check for overlap with those
1538 already combined together. */
1539 for (m1 = movables->head; m1 != m; m1 = m1->next)
1540 if (m1 == m0 || (m1->partial && m1->match == m0))
1541 if (! (REGNO_FIRST_LUID (m1->regno) > last
1542 || REGNO_LAST_LUID (m1->regno) < first))
1545 /* No overlap: we can combine this with the others. */
1546 m0->lifetime += m->lifetime;
1547 m0->savings += m->savings;
1557 free (matched_regs);
1560 /* Returns the number of movable instructions in LOOP that were not
1561 moved outside the loop. */
1564 num_unmoved_movables (loop)
1565 const struct loop *loop;
1570 for (m = LOOP_MOVABLES (loop)->head; m; m = m->next)
1578 /* Return 1 if regs X and Y will become the same if moved. */
1581 regs_match_p (x, y, movables)
1583 struct loop_movables *movables;
1585 unsigned int xn = REGNO (x);
1586 unsigned int yn = REGNO (y);
1587 struct movable *mx, *my;
1589 for (mx = movables->head; mx; mx = mx->next)
1590 if (mx->regno == xn)
1593 for (my = movables->head; my; my = my->next)
1594 if (my->regno == yn)
1598 && ((mx->match == my->match && mx->match != 0)
1600 || mx == my->match));
1603 /* Return 1 if X and Y are identical-looking rtx's.
1604 This is the Lisp function EQUAL for rtx arguments.
1606 If two registers are matching movables or a movable register and an
1607 equivalent constant, consider them equal. */
1610 rtx_equal_for_loop_p (x, y, movables, regs)
1612 struct loop_movables *movables;
1613 struct loop_regs *regs;
1623 if (x == 0 || y == 0)
1626 code = GET_CODE (x);
1628 /* If we have a register and a constant, they may sometimes be
1630 if (GET_CODE (x) == REG && regs->array[REGNO (x)].set_in_loop == -2
1633 for (m = movables->head; m; m = m->next)
1634 if (m->move_insn && m->regno == REGNO (x)
1635 && rtx_equal_p (m->set_src, y))
1638 else if (GET_CODE (y) == REG && regs->array[REGNO (y)].set_in_loop == -2
1641 for (m = movables->head; m; m = m->next)
1642 if (m->move_insn && m->regno == REGNO (y)
1643 && rtx_equal_p (m->set_src, x))
1647 /* Otherwise, rtx's of different codes cannot be equal. */
1648 if (code != GET_CODE (y))
1651 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
1652 (REG:SI x) and (REG:HI x) are NOT equivalent. */
1654 if (GET_MODE (x) != GET_MODE (y))
1657 /* These three types of rtx's can be compared nonrecursively. */
1659 return (REGNO (x) == REGNO (y) || regs_match_p (x, y, movables));
1661 if (code == LABEL_REF)
1662 return XEXP (x, 0) == XEXP (y, 0);
1663 if (code == SYMBOL_REF)
1664 return XSTR (x, 0) == XSTR (y, 0);
1666 /* Compare the elements. If any pair of corresponding elements
1667 fail to match, return 0 for the whole things. */
1669 fmt = GET_RTX_FORMAT (code);
1670 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1675 if (XWINT (x, i) != XWINT (y, i))
1680 if (XINT (x, i) != XINT (y, i))
1685 /* Two vectors must have the same length. */
1686 if (XVECLEN (x, i) != XVECLEN (y, i))
1689 /* And the corresponding elements must match. */
1690 for (j = 0; j < XVECLEN (x, i); j++)
1691 if (rtx_equal_for_loop_p (XVECEXP (x, i, j), XVECEXP (y, i, j),
1692 movables, regs) == 0)
1697 if (rtx_equal_for_loop_p (XEXP (x, i), XEXP (y, i), movables, regs)
1703 if (strcmp (XSTR (x, i), XSTR (y, i)))
1708 /* These are just backpointers, so they don't matter. */
1714 /* It is believed that rtx's at this level will never
1715 contain anything but integers and other rtx's,
1716 except for within LABEL_REFs and SYMBOL_REFs. */
1724 /* If X contains any LABEL_REF's, add REG_LABEL notes for them to all
1725 insns in INSNS which use the reference. LABEL_NUSES for CODE_LABEL
1726 references is incremented once for each added note. */
1729 add_label_notes (x, insns)
1733 enum rtx_code code = GET_CODE (x);
1738 if (code == LABEL_REF && !LABEL_REF_NONLOCAL_P (x))
1740 /* This code used to ignore labels that referred to dispatch tables to
1741 avoid flow generating (slighly) worse code.
1743 We no longer ignore such label references (see LABEL_REF handling in
1744 mark_jump_label for additional information). */
1745 for (insn = insns; insn; insn = NEXT_INSN (insn))
1746 if (reg_mentioned_p (XEXP (x, 0), insn))
1748 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_LABEL, XEXP (x, 0),
1750 if (LABEL_P (XEXP (x, 0)))
1751 LABEL_NUSES (XEXP (x, 0))++;
1755 fmt = GET_RTX_FORMAT (code);
1756 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1759 add_label_notes (XEXP (x, i), insns);
1760 else if (fmt[i] == 'E')
1761 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1762 add_label_notes (XVECEXP (x, i, j), insns);
1766 /* Scan MOVABLES, and move the insns that deserve to be moved.
1767 If two matching movables are combined, replace one reg with the
1768 other throughout. */
1771 move_movables (loop, movables, threshold, insn_count)
1773 struct loop_movables *movables;
1777 struct loop_regs *regs = LOOP_REGS (loop);
1778 int nregs = regs->num;
1782 rtx loop_start = loop->start;
1783 rtx loop_end = loop->end;
1784 /* Map of pseudo-register replacements to handle combining
1785 when we move several insns that load the same value
1786 into different pseudo-registers. */
1787 rtx *reg_map = (rtx *) xcalloc (nregs, sizeof (rtx));
1788 char *already_moved = (char *) xcalloc (nregs, sizeof (char));
1790 for (m = movables->head; m; m = m->next)
1792 /* Describe this movable insn. */
1794 if (loop_dump_stream)
1796 fprintf (loop_dump_stream, "Insn %d: regno %d (life %d), ",
1797 INSN_UID (m->insn), m->regno, m->lifetime);
1799 fprintf (loop_dump_stream, "consec %d, ", m->consec);
1801 fprintf (loop_dump_stream, "cond ");
1803 fprintf (loop_dump_stream, "force ");
1805 fprintf (loop_dump_stream, "global ");
1807 fprintf (loop_dump_stream, "done ");
1809 fprintf (loop_dump_stream, "move-insn ");
1811 fprintf (loop_dump_stream, "matches %d ",
1812 INSN_UID (m->match->insn));
1814 fprintf (loop_dump_stream, "forces %d ",
1815 INSN_UID (m->forces->insn));
1818 /* Ignore the insn if it's already done (it matched something else).
1819 Otherwise, see if it is now safe to move. */
1823 || (1 == loop_invariant_p (loop, m->set_src)
1824 && (m->dependencies == 0
1825 || 1 == loop_invariant_p (loop, m->dependencies))
1827 || 1 == consec_sets_invariant_p (loop, m->set_dest,
1830 && (! m->forces || m->forces->done))
1834 int savings = m->savings;
1836 /* We have an insn that is safe to move.
1837 Compute its desirability. */
1842 if (loop_dump_stream)
1843 fprintf (loop_dump_stream, "savings %d ", savings);
1845 if (regs->array[regno].moved_once && loop_dump_stream)
1846 fprintf (loop_dump_stream, "halved since already moved ");
1848 /* An insn MUST be moved if we already moved something else
1849 which is safe only if this one is moved too: that is,
1850 if already_moved[REGNO] is nonzero. */
1852 /* An insn is desirable to move if the new lifetime of the
1853 register is no more than THRESHOLD times the old lifetime.
1854 If it's not desirable, it means the loop is so big
1855 that moving won't speed things up much,
1856 and it is liable to make register usage worse. */
1858 /* It is also desirable to move if it can be moved at no
1859 extra cost because something else was already moved. */
1861 if (already_moved[regno]
1862 || flag_move_all_movables
1863 || (threshold * savings * m->lifetime) >=
1864 (regs->array[regno].moved_once ? insn_count * 2 : insn_count)
1865 || (m->forces && m->forces->done
1866 && regs->array[m->forces->regno].n_times_set == 1))
1870 rtx first = NULL_RTX;
1872 /* Now move the insns that set the reg. */
1874 if (m->partial && m->match)
1878 /* Find the end of this chain of matching regs.
1879 Thus, we load each reg in the chain from that one reg.
1880 And that reg is loaded with 0 directly,
1881 since it has ->match == 0. */
1882 for (m1 = m; m1->match; m1 = m1->match);
1883 newpat = gen_move_insn (SET_DEST (PATTERN (m->insn)),
1884 SET_DEST (PATTERN (m1->insn)));
1885 i1 = loop_insn_hoist (loop, newpat);
1887 /* Mark the moved, invariant reg as being allowed to
1888 share a hard reg with the other matching invariant. */
1889 REG_NOTES (i1) = REG_NOTES (m->insn);
1890 r1 = SET_DEST (PATTERN (m->insn));
1891 r2 = SET_DEST (PATTERN (m1->insn));
1893 = gen_rtx_EXPR_LIST (VOIDmode, r1,
1894 gen_rtx_EXPR_LIST (VOIDmode, r2,
1896 delete_insn (m->insn);
1901 if (loop_dump_stream)
1902 fprintf (loop_dump_stream, " moved to %d", INSN_UID (i1));
1904 /* If we are to re-generate the item being moved with a
1905 new move insn, first delete what we have and then emit
1906 the move insn before the loop. */
1907 else if (m->move_insn)
1911 for (count = m->consec; count >= 0; count--)
1913 /* If this is the first insn of a library call sequence,
1915 if (GET_CODE (p) != NOTE
1916 && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
1919 /* If this is the last insn of a libcall sequence, then
1920 delete every insn in the sequence except the last.
1921 The last insn is handled in the normal manner. */
1922 if (GET_CODE (p) != NOTE
1923 && (temp = find_reg_note (p, REG_RETVAL, NULL_RTX)))
1925 temp = XEXP (temp, 0);
1927 temp = delete_insn (temp);
1931 p = delete_insn (p);
1933 /* simplify_giv_expr expects that it can walk the insns
1934 at m->insn forwards and see this old sequence we are
1935 tossing here. delete_insn does preserve the next
1936 pointers, but when we skip over a NOTE we must fix
1937 it up. Otherwise that code walks into the non-deleted
1939 while (p && GET_CODE (p) == NOTE)
1940 p = NEXT_INSN (temp) = NEXT_INSN (p);
1944 emit_move_insn (m->set_dest, m->set_src);
1945 temp = get_insns ();
1946 seq = gen_sequence ();
1949 add_label_notes (m->set_src, temp);
1951 i1 = loop_insn_hoist (loop, seq);
1952 if (! find_reg_note (i1, REG_EQUAL, NULL_RTX))
1953 set_unique_reg_note (i1,
1954 m->is_equiv ? REG_EQUIV : REG_EQUAL,
1957 if (loop_dump_stream)
1958 fprintf (loop_dump_stream, " moved to %d", INSN_UID (i1));
1960 /* The more regs we move, the less we like moving them. */
1965 for (count = m->consec; count >= 0; count--)
1969 /* If first insn of libcall sequence, skip to end. */
1970 /* Do this at start of loop, since p is guaranteed to
1972 if (GET_CODE (p) != NOTE
1973 && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
1976 /* If last insn of libcall sequence, move all
1977 insns except the last before the loop. The last
1978 insn is handled in the normal manner. */
1979 if (GET_CODE (p) != NOTE
1980 && (temp = find_reg_note (p, REG_RETVAL, NULL_RTX)))
1984 rtx fn_address_insn = 0;
1987 for (temp = XEXP (temp, 0); temp != p;
1988 temp = NEXT_INSN (temp))
1994 if (GET_CODE (temp) == NOTE)
1997 body = PATTERN (temp);
1999 /* Find the next insn after TEMP,
2000 not counting USE or NOTE insns. */
2001 for (next = NEXT_INSN (temp); next != p;
2002 next = NEXT_INSN (next))
2003 if (! (GET_CODE (next) == INSN
2004 && GET_CODE (PATTERN (next)) == USE)
2005 && GET_CODE (next) != NOTE)
2008 /* If that is the call, this may be the insn
2009 that loads the function address.
2011 Extract the function address from the insn
2012 that loads it into a register.
2013 If this insn was cse'd, we get incorrect code.
2015 So emit a new move insn that copies the
2016 function address into the register that the
2017 call insn will use. flow.c will delete any
2018 redundant stores that we have created. */
2019 if (GET_CODE (next) == CALL_INSN
2020 && GET_CODE (body) == SET
2021 && GET_CODE (SET_DEST (body)) == REG
2022 && (n = find_reg_note (temp, REG_EQUAL,
2025 fn_reg = SET_SRC (body);
2026 if (GET_CODE (fn_reg) != REG)
2027 fn_reg = SET_DEST (body);
2028 fn_address = XEXP (n, 0);
2029 fn_address_insn = temp;
2031 /* We have the call insn.
2032 If it uses the register we suspect it might,
2033 load it with the correct address directly. */
2034 if (GET_CODE (temp) == CALL_INSN
2036 && reg_referenced_p (fn_reg, body))
2037 loop_insn_emit_after (loop, 0, fn_address_insn,
2039 (fn_reg, fn_address));
2041 if (GET_CODE (temp) == CALL_INSN)
2043 i1 = loop_call_insn_hoist (loop, body);
2044 /* Because the USAGE information potentially
2045 contains objects other than hard registers
2046 we need to copy it. */
2047 if (CALL_INSN_FUNCTION_USAGE (temp))
2048 CALL_INSN_FUNCTION_USAGE (i1)
2049 = copy_rtx (CALL_INSN_FUNCTION_USAGE (temp));
2052 i1 = loop_insn_hoist (loop, body);
2055 if (temp == fn_address_insn)
2056 fn_address_insn = i1;
2057 REG_NOTES (i1) = REG_NOTES (temp);
2058 REG_NOTES (temp) = NULL;
2064 if (m->savemode != VOIDmode)
2066 /* P sets REG to zero; but we should clear only
2067 the bits that are not covered by the mode
2069 rtx reg = m->set_dest;
2074 tem = expand_simple_binop
2075 (GET_MODE (reg), AND, reg,
2076 GEN_INT ((((HOST_WIDE_INT) 1
2077 << GET_MODE_BITSIZE (m->savemode)))
2079 reg, 1, OPTAB_LIB_WIDEN);
2083 emit_move_insn (reg, tem);
2084 sequence = gen_sequence ();
2086 i1 = loop_insn_hoist (loop, sequence);
2088 else if (GET_CODE (p) == CALL_INSN)
2090 i1 = loop_call_insn_hoist (loop, PATTERN (p));
2091 /* Because the USAGE information potentially
2092 contains objects other than hard registers
2093 we need to copy it. */
2094 if (CALL_INSN_FUNCTION_USAGE (p))
2095 CALL_INSN_FUNCTION_USAGE (i1)
2096 = copy_rtx (CALL_INSN_FUNCTION_USAGE (p));
2098 else if (count == m->consec && m->move_insn_first)
2101 /* The SET_SRC might not be invariant, so we must
2102 use the REG_EQUAL note. */
2104 emit_move_insn (m->set_dest, m->set_src);
2105 temp = get_insns ();
2106 seq = gen_sequence ();
2109 add_label_notes (m->set_src, temp);
2111 i1 = loop_insn_hoist (loop, seq);
2112 if (! find_reg_note (i1, REG_EQUAL, NULL_RTX))
2113 set_unique_reg_note (i1, m->is_equiv ? REG_EQUIV
2114 : REG_EQUAL, m->set_src);
2117 i1 = loop_insn_hoist (loop, PATTERN (p));
2119 if (REG_NOTES (i1) == 0)
2121 REG_NOTES (i1) = REG_NOTES (p);
2122 REG_NOTES (p) = NULL;
2124 /* If there is a REG_EQUAL note present whose value
2125 is not loop invariant, then delete it, since it
2126 may cause problems with later optimization passes.
2127 It is possible for cse to create such notes
2128 like this as a result of record_jump_cond. */
2130 if ((temp = find_reg_note (i1, REG_EQUAL, NULL_RTX))
2131 && ! loop_invariant_p (loop, XEXP (temp, 0)))
2132 remove_note (i1, temp);
2138 if (loop_dump_stream)
2139 fprintf (loop_dump_stream, " moved to %d",
2142 /* If library call, now fix the REG_NOTES that contain
2143 insn pointers, namely REG_LIBCALL on FIRST
2144 and REG_RETVAL on I1. */
2145 if ((temp = find_reg_note (i1, REG_RETVAL, NULL_RTX)))
2147 XEXP (temp, 0) = first;
2148 temp = find_reg_note (first, REG_LIBCALL, NULL_RTX);
2149 XEXP (temp, 0) = i1;
2156 /* simplify_giv_expr expects that it can walk the insns
2157 at m->insn forwards and see this old sequence we are
2158 tossing here. delete_insn does preserve the next
2159 pointers, but when we skip over a NOTE we must fix
2160 it up. Otherwise that code walks into the non-deleted
2162 while (p && GET_CODE (p) == NOTE)
2163 p = NEXT_INSN (temp) = NEXT_INSN (p);
2166 /* The more regs we move, the less we like moving them. */
2170 /* Any other movable that loads the same register
2172 already_moved[regno] = 1;
2174 /* This reg has been moved out of one loop. */
2175 regs->array[regno].moved_once = 1;
2177 /* The reg set here is now invariant. */
2181 for (i = 0; i < LOOP_REGNO_NREGS (regno, m->set_dest); i++)
2182 regs->array[regno+i].set_in_loop = 0;
2187 /* Change the length-of-life info for the register
2188 to say it lives at least the full length of this loop.
2189 This will help guide optimizations in outer loops. */
2191 if (REGNO_FIRST_LUID (regno) > INSN_LUID (loop_start))
2192 /* This is the old insn before all the moved insns.
2193 We can't use the moved insn because it is out of range
2194 in uid_luid. Only the old insns have luids. */
2195 REGNO_FIRST_UID (regno) = INSN_UID (loop_start);
2196 if (REGNO_LAST_LUID (regno) < INSN_LUID (loop_end))
2197 REGNO_LAST_UID (regno) = INSN_UID (loop_end);
2199 /* Combine with this moved insn any other matching movables. */
2202 for (m1 = movables->head; m1; m1 = m1->next)
2207 /* Schedule the reg loaded by M1
2208 for replacement so that shares the reg of M.
2209 If the modes differ (only possible in restricted
2210 circumstances, make a SUBREG.
2212 Note this assumes that the target dependent files
2213 treat REG and SUBREG equally, including within
2214 GO_IF_LEGITIMATE_ADDRESS and in all the
2215 predicates since we never verify that replacing the
2216 original register with a SUBREG results in a
2217 recognizable insn. */
2218 if (GET_MODE (m->set_dest) == GET_MODE (m1->set_dest))
2219 reg_map[m1->regno] = m->set_dest;
2222 = gen_lowpart_common (GET_MODE (m1->set_dest),
2225 /* Get rid of the matching insn
2226 and prevent further processing of it. */
2229 /* if library call, delete all insns. */
2230 if ((temp = find_reg_note (m1->insn, REG_RETVAL,
2232 delete_insn_chain (XEXP (temp, 0), m1->insn);
2234 delete_insn (m1->insn);
2236 /* Any other movable that loads the same register
2238 already_moved[m1->regno] = 1;
2240 /* The reg merged here is now invariant,
2241 if the reg it matches is invariant. */
2246 i < LOOP_REGNO_NREGS (regno, m1->set_dest);
2248 regs->array[m1->regno+i].set_in_loop = 0;
2252 else if (loop_dump_stream)
2253 fprintf (loop_dump_stream, "not desirable");
2255 else if (loop_dump_stream && !m->match)
2256 fprintf (loop_dump_stream, "not safe");
2258 if (loop_dump_stream)
2259 fprintf (loop_dump_stream, "\n");
2263 new_start = loop_start;
2265 /* Go through all the instructions in the loop, making
2266 all the register substitutions scheduled in REG_MAP. */
2267 for (p = new_start; p != loop_end; p = NEXT_INSN (p))
2268 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
2269 || GET_CODE (p) == CALL_INSN)
2271 replace_regs (PATTERN (p), reg_map, nregs, 0);
2272 replace_regs (REG_NOTES (p), reg_map, nregs, 0);
2278 free (already_moved);
2283 loop_movables_add (movables, m)
2284 struct loop_movables *movables;
2287 if (movables->head == 0)
2290 movables->last->next = m;
2296 loop_movables_free (movables)
2297 struct loop_movables *movables;
2300 struct movable *m_next;
2302 for (m = movables->head; m; m = m_next)
2310 /* Scan X and replace the address of any MEM in it with ADDR.
2311 REG is the address that MEM should have before the replacement. */
2314 replace_call_address (x, reg, addr)
2323 code = GET_CODE (x);
2337 /* Short cut for very common case. */
2338 replace_call_address (XEXP (x, 1), reg, addr);
2342 /* Short cut for very common case. */
2343 replace_call_address (XEXP (x, 0), reg, addr);
2347 /* If this MEM uses a reg other than the one we expected,
2348 something is wrong. */
2349 if (XEXP (x, 0) != reg)
2358 fmt = GET_RTX_FORMAT (code);
2359 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2362 replace_call_address (XEXP (x, i), reg, addr);
2363 else if (fmt[i] == 'E')
2366 for (j = 0; j < XVECLEN (x, i); j++)
2367 replace_call_address (XVECEXP (x, i, j), reg, addr);
2373 /* Return the number of memory refs to addresses that vary
2377 count_nonfixed_reads (loop, x)
2378 const struct loop *loop;
2389 code = GET_CODE (x);
2403 return ((loop_invariant_p (loop, XEXP (x, 0)) != 1)
2404 + count_nonfixed_reads (loop, XEXP (x, 0)));
2411 fmt = GET_RTX_FORMAT (code);
2412 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2415 value += count_nonfixed_reads (loop, XEXP (x, i));
2419 for (j = 0; j < XVECLEN (x, i); j++)
2420 value += count_nonfixed_reads (loop, XVECEXP (x, i, j));
2426 /* Scan a loop setting the elements `cont', `vtop', `loops_enclosed',
2427 `has_call', `has_nonconst_call', `has_volatile', `has_tablejump',
2428 `unknown_address_altered', `unknown_constant_address_altered', and
2429 `num_mem_sets' in LOOP. Also, fill in the array `mems' and the
2430 list `store_mems' in LOOP. */
2438 struct loop_info *loop_info = LOOP_INFO (loop);
2439 rtx start = loop->start;
2440 rtx end = loop->end;
2441 /* The label after END. Jumping here is just like falling off the
2442 end of the loop. We use next_nonnote_insn instead of next_label
2443 as a hedge against the (pathological) case where some actual insn
2444 might end up between the two. */
2445 rtx exit_target = next_nonnote_insn (end);
2447 loop_info->has_indirect_jump = indirect_jump_in_function;
2448 loop_info->pre_header_has_call = 0;
2449 loop_info->has_call = 0;
2450 loop_info->has_nonconst_call = 0;
2451 loop_info->has_volatile = 0;
2452 loop_info->has_tablejump = 0;
2453 loop_info->has_multiple_exit_targets = 0;
2456 loop_info->unknown_address_altered = 0;
2457 loop_info->unknown_constant_address_altered = 0;
2458 loop_info->store_mems = NULL_RTX;
2459 loop_info->first_loop_store_insn = NULL_RTX;
2460 loop_info->mems_idx = 0;
2461 loop_info->num_mem_sets = 0;
2464 for (insn = start; insn && GET_CODE (insn) != CODE_LABEL;
2465 insn = PREV_INSN (insn))
2467 if (GET_CODE (insn) == CALL_INSN)
2469 loop_info->pre_header_has_call = 1;
2474 for (insn = NEXT_INSN (start); insn != NEXT_INSN (end);
2475 insn = NEXT_INSN (insn))
2477 switch (GET_CODE (insn))
2480 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
2483 /* Count number of loops contained in this one. */
2486 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END)
2491 if (! CONST_OR_PURE_CALL_P (insn))
2493 loop_info->unknown_address_altered = 1;
2494 loop_info->has_nonconst_call = 1;
2496 loop_info->has_call = 1;
2497 if (can_throw_internal (insn))
2498 loop_info->has_multiple_exit_targets = 1;
2502 if (! loop_info->has_multiple_exit_targets)
2504 rtx set = pc_set (insn);
2508 rtx src = SET_SRC (set);
2511 if (GET_CODE (src) == IF_THEN_ELSE)
2513 label1 = XEXP (src, 1);
2514 label2 = XEXP (src, 2);
2524 if (label1 && label1 != pc_rtx)
2526 if (GET_CODE (label1) != LABEL_REF)
2528 /* Something tricky. */
2529 loop_info->has_multiple_exit_targets = 1;
2532 else if (XEXP (label1, 0) != exit_target
2533 && LABEL_OUTSIDE_LOOP_P (label1))
2535 /* A jump outside the current loop. */
2536 loop_info->has_multiple_exit_targets = 1;
2548 /* A return, or something tricky. */
2549 loop_info->has_multiple_exit_targets = 1;
2555 if (volatile_refs_p (PATTERN (insn)))
2556 loop_info->has_volatile = 1;
2558 if (GET_CODE (insn) == JUMP_INSN
2559 && (GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC
2560 || GET_CODE (PATTERN (insn)) == ADDR_VEC))
2561 loop_info->has_tablejump = 1;
2563 note_stores (PATTERN (insn), note_addr_stored, loop_info);
2564 if (! loop_info->first_loop_store_insn && loop_info->store_mems)
2565 loop_info->first_loop_store_insn = insn;
2567 if (flag_non_call_exceptions && can_throw_internal (insn))
2568 loop_info->has_multiple_exit_targets = 1;
2576 /* Now, rescan the loop, setting up the LOOP_MEMS array. */
2577 if (/* An exception thrown by a called function might land us
2579 ! loop_info->has_nonconst_call
2580 /* We don't want loads for MEMs moved to a location before the
2581 one at which their stack memory becomes allocated. (Note
2582 that this is not a problem for malloc, etc., since those
2583 require actual function calls. */
2584 && ! current_function_calls_alloca
2585 /* There are ways to leave the loop other than falling off the
2587 && ! loop_info->has_multiple_exit_targets)
2588 for (insn = NEXT_INSN (start); insn != NEXT_INSN (end);
2589 insn = NEXT_INSN (insn))
2590 for_each_rtx (&insn, insert_loop_mem, loop_info);
2592 /* BLKmode MEMs are added to LOOP_STORE_MEM as necessary so
2593 that loop_invariant_p and load_mems can use true_dependence
2594 to determine what is really clobbered. */
2595 if (loop_info->unknown_address_altered)
2597 rtx mem = gen_rtx_MEM (BLKmode, const0_rtx);
2599 loop_info->store_mems
2600 = gen_rtx_EXPR_LIST (VOIDmode, mem, loop_info->store_mems);
2602 if (loop_info->unknown_constant_address_altered)
2604 rtx mem = gen_rtx_MEM (BLKmode, const0_rtx);
2606 RTX_UNCHANGING_P (mem) = 1;
2607 loop_info->store_mems
2608 = gen_rtx_EXPR_LIST (VOIDmode, mem, loop_info->store_mems);
2612 /* Scan the function looking for loops. Record the start and end of each loop.
2613 Also mark as invalid loops any loops that contain a setjmp or are branched
2614 to from outside the loop. */
2617 find_and_verify_loops (f, loops)
2619 struct loops *loops;
2624 struct loop *current_loop;
2625 struct loop *next_loop;
2628 num_loops = loops->num;
2630 compute_luids (f, NULL_RTX, 0);
2632 /* If there are jumps to undefined labels,
2633 treat them as jumps out of any/all loops.
2634 This also avoids writing past end of tables when there are no loops. */
2637 /* Find boundaries of loops, mark which loops are contained within
2638 loops, and invalidate loops that have setjmp. */
2641 current_loop = NULL;
2642 for (insn = f; insn; insn = NEXT_INSN (insn))
2644 if (GET_CODE (insn) == NOTE)
2645 switch (NOTE_LINE_NUMBER (insn))
2647 case NOTE_INSN_LOOP_BEG:
2648 next_loop = loops->array + num_loops;
2649 next_loop->num = num_loops;
2651 next_loop->start = insn;
2652 next_loop->outer = current_loop;
2653 current_loop = next_loop;
2656 case NOTE_INSN_LOOP_CONT:
2657 current_loop->cont = insn;
2660 case NOTE_INSN_LOOP_VTOP:
2661 current_loop->vtop = insn;
2664 case NOTE_INSN_LOOP_END:
2668 current_loop->end = insn;
2669 current_loop = current_loop->outer;
2676 if (GET_CODE (insn) == CALL_INSN
2677 && find_reg_note (insn, REG_SETJMP, NULL))
2679 /* In this case, we must invalidate our current loop and any
2681 for (loop = current_loop; loop; loop = loop->outer)
2684 if (loop_dump_stream)
2685 fprintf (loop_dump_stream,
2686 "\nLoop at %d ignored due to setjmp.\n",
2687 INSN_UID (loop->start));
2691 /* Note that this will mark the NOTE_INSN_LOOP_END note as being in the
2692 enclosing loop, but this doesn't matter. */
2693 uid_loop[INSN_UID (insn)] = current_loop;
2696 /* Any loop containing a label used in an initializer must be invalidated,
2697 because it can be jumped into from anywhere. */
2699 for (label = forced_labels; label; label = XEXP (label, 1))
2701 for (loop = uid_loop[INSN_UID (XEXP (label, 0))];
2702 loop; loop = loop->outer)
2706 /* Any loop containing a label used for an exception handler must be
2707 invalidated, because it can be jumped into from anywhere. */
2709 for (label = exception_handler_labels; label; label = XEXP (label, 1))
2711 for (loop = uid_loop[INSN_UID (XEXP (label, 0))];
2712 loop; loop = loop->outer)
2716 /* Now scan all insn's in the function. If any JUMP_INSN branches into a
2717 loop that it is not contained within, that loop is marked invalid.
2718 If any INSN or CALL_INSN uses a label's address, then the loop containing
2719 that label is marked invalid, because it could be jumped into from
2722 Also look for blocks of code ending in an unconditional branch that
2723 exits the loop. If such a block is surrounded by a conditional
2724 branch around the block, move the block elsewhere (see below) and
2725 invert the jump to point to the code block. This may eliminate a
2726 label in our loop and will simplify processing by both us and a
2727 possible second cse pass. */
2729 for (insn = f; insn; insn = NEXT_INSN (insn))
2732 struct loop *this_loop = uid_loop[INSN_UID (insn)];
2734 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
2736 rtx note = find_reg_note (insn, REG_LABEL, NULL_RTX);
2739 for (loop = uid_loop[INSN_UID (XEXP (note, 0))];
2740 loop; loop = loop->outer)
2745 if (GET_CODE (insn) != JUMP_INSN)
2748 mark_loop_jump (PATTERN (insn), this_loop);
2750 /* See if this is an unconditional branch outside the loop. */
2752 && (GET_CODE (PATTERN (insn)) == RETURN
2753 || (any_uncondjump_p (insn)
2754 && onlyjump_p (insn)
2755 && (uid_loop[INSN_UID (JUMP_LABEL (insn))]
2757 && get_max_uid () < max_uid_for_loop)
2760 rtx our_next = next_real_insn (insn);
2761 rtx last_insn_to_move = NEXT_INSN (insn);
2762 struct loop *dest_loop;
2763 struct loop *outer_loop = NULL;
2765 /* Go backwards until we reach the start of the loop, a label,
2767 for (p = PREV_INSN (insn);
2768 GET_CODE (p) != CODE_LABEL
2769 && ! (GET_CODE (p) == NOTE
2770 && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
2771 && GET_CODE (p) != JUMP_INSN;
2775 /* Check for the case where we have a jump to an inner nested
2776 loop, and do not perform the optimization in that case. */
2778 if (JUMP_LABEL (insn))
2780 dest_loop = uid_loop[INSN_UID (JUMP_LABEL (insn))];
2783 for (outer_loop = dest_loop; outer_loop;
2784 outer_loop = outer_loop->outer)
2785 if (outer_loop == this_loop)
2790 /* Make sure that the target of P is within the current loop. */
2792 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p)
2793 && uid_loop[INSN_UID (JUMP_LABEL (p))] != this_loop)
2794 outer_loop = this_loop;
2796 /* If we stopped on a JUMP_INSN to the next insn after INSN,
2797 we have a block of code to try to move.
2799 We look backward and then forward from the target of INSN
2800 to find a BARRIER at the same loop depth as the target.
2801 If we find such a BARRIER, we make a new label for the start
2802 of the block, invert the jump in P and point it to that label,
2803 and move the block of code to the spot we found. */
2806 && GET_CODE (p) == JUMP_INSN
2807 && JUMP_LABEL (p) != 0
2808 /* Just ignore jumps to labels that were never emitted.
2809 These always indicate compilation errors. */
2810 && INSN_UID (JUMP_LABEL (p)) != 0
2811 && any_condjump_p (p) && onlyjump_p (p)
2812 && next_real_insn (JUMP_LABEL (p)) == our_next
2813 /* If it's not safe to move the sequence, then we
2815 && insns_safe_to_move_p (p, NEXT_INSN (insn),
2816 &last_insn_to_move))
2819 = JUMP_LABEL (insn) ? JUMP_LABEL (insn) : get_last_insn ();
2820 struct loop *target_loop = uid_loop[INSN_UID (target)];
2824 /* Search for possible garbage past the conditional jumps
2825 and look for the last barrier. */
2826 for (tmp = last_insn_to_move;
2827 tmp && GET_CODE (tmp) != CODE_LABEL; tmp = NEXT_INSN (tmp))
2828 if (GET_CODE (tmp) == BARRIER)
2829 last_insn_to_move = tmp;
2831 for (loc = target; loc; loc = PREV_INSN (loc))
2832 if (GET_CODE (loc) == BARRIER
2833 /* Don't move things inside a tablejump. */
2834 && ((loc2 = next_nonnote_insn (loc)) == 0
2835 || GET_CODE (loc2) != CODE_LABEL
2836 || (loc2 = next_nonnote_insn (loc2)) == 0
2837 || GET_CODE (loc2) != JUMP_INSN
2838 || (GET_CODE (PATTERN (loc2)) != ADDR_VEC
2839 && GET_CODE (PATTERN (loc2)) != ADDR_DIFF_VEC))
2840 && uid_loop[INSN_UID (loc)] == target_loop)
2844 for (loc = target; loc; loc = NEXT_INSN (loc))
2845 if (GET_CODE (loc) == BARRIER
2846 /* Don't move things inside a tablejump. */
2847 && ((loc2 = next_nonnote_insn (loc)) == 0
2848 || GET_CODE (loc2) != CODE_LABEL
2849 || (loc2 = next_nonnote_insn (loc2)) == 0
2850 || GET_CODE (loc2) != JUMP_INSN
2851 || (GET_CODE (PATTERN (loc2)) != ADDR_VEC
2852 && GET_CODE (PATTERN (loc2)) != ADDR_DIFF_VEC))
2853 && uid_loop[INSN_UID (loc)] == target_loop)
2858 rtx cond_label = JUMP_LABEL (p);
2859 rtx new_label = get_label_after (p);
2861 /* Ensure our label doesn't go away. */
2862 LABEL_NUSES (cond_label)++;
2864 /* Verify that uid_loop is large enough and that
2866 if (invert_jump (p, new_label, 1))
2870 /* If no suitable BARRIER was found, create a suitable
2871 one before TARGET. Since TARGET is a fall through
2872 path, we'll need to insert an jump around our block
2873 and add a BARRIER before TARGET.
2875 This creates an extra unconditional jump outside
2876 the loop. However, the benefits of removing rarely
2877 executed instructions from inside the loop usually
2878 outweighs the cost of the extra unconditional jump
2879 outside the loop. */
2884 temp = gen_jump (JUMP_LABEL (insn));
2885 temp = emit_jump_insn_before (temp, target);
2886 JUMP_LABEL (temp) = JUMP_LABEL (insn);
2887 LABEL_NUSES (JUMP_LABEL (insn))++;
2888 loc = emit_barrier_before (target);
2891 /* Include the BARRIER after INSN and copy the
2893 if (squeeze_notes (&new_label, &last_insn_to_move))
2895 reorder_insns (new_label, last_insn_to_move, loc);
2897 /* All those insns are now in TARGET_LOOP. */
2899 q != NEXT_INSN (last_insn_to_move);
2901 uid_loop[INSN_UID (q)] = target_loop;
2903 /* The label jumped to by INSN is no longer a loop
2904 exit. Unless INSN does not have a label (e.g.,
2905 it is a RETURN insn), search loop->exit_labels
2906 to find its label_ref, and remove it. Also turn
2907 off LABEL_OUTSIDE_LOOP_P bit. */
2908 if (JUMP_LABEL (insn))
2910 for (q = 0, r = this_loop->exit_labels;
2912 q = r, r = LABEL_NEXTREF (r))
2913 if (XEXP (r, 0) == JUMP_LABEL (insn))
2915 LABEL_OUTSIDE_LOOP_P (r) = 0;
2917 LABEL_NEXTREF (q) = LABEL_NEXTREF (r);
2919 this_loop->exit_labels = LABEL_NEXTREF (r);
2923 for (loop = this_loop; loop && loop != target_loop;
2927 /* If we didn't find it, then something is
2933 /* P is now a jump outside the loop, so it must be put
2934 in loop->exit_labels, and marked as such.
2935 The easiest way to do this is to just call
2936 mark_loop_jump again for P. */
2937 mark_loop_jump (PATTERN (p), this_loop);
2939 /* If INSN now jumps to the insn after it,
2941 if (JUMP_LABEL (insn) != 0
2942 && (next_real_insn (JUMP_LABEL (insn))
2943 == next_real_insn (insn)))
2944 delete_related_insns (insn);
2947 /* Continue the loop after where the conditional
2948 branch used to jump, since the only branch insn
2949 in the block (if it still remains) is an inter-loop
2950 branch and hence needs no processing. */
2951 insn = NEXT_INSN (cond_label);
2953 if (--LABEL_NUSES (cond_label) == 0)
2954 delete_related_insns (cond_label);
2956 /* This loop will be continued with NEXT_INSN (insn). */
2957 insn = PREV_INSN (insn);
2964 /* If any label in X jumps to a loop different from LOOP_NUM and any of the
2965 loops it is contained in, mark the target loop invalid.
2967 For speed, we assume that X is part of a pattern of a JUMP_INSN. */
2970 mark_loop_jump (x, loop)
2974 struct loop *dest_loop;
2975 struct loop *outer_loop;
2978 switch (GET_CODE (x))
2991 /* There could be a label reference in here. */
2992 mark_loop_jump (XEXP (x, 0), loop);
2998 mark_loop_jump (XEXP (x, 0), loop);
2999 mark_loop_jump (XEXP (x, 1), loop);
3003 /* This may refer to a LABEL_REF or SYMBOL_REF. */
3004 mark_loop_jump (XEXP (x, 1), loop);
3009 mark_loop_jump (XEXP (x, 0), loop);
3013 dest_loop = uid_loop[INSN_UID (XEXP (x, 0))];
3015 /* Link together all labels that branch outside the loop. This
3016 is used by final_[bg]iv_value and the loop unrolling code. Also
3017 mark this LABEL_REF so we know that this branch should predict
3020 /* A check to make sure the label is not in an inner nested loop,
3021 since this does not count as a loop exit. */
3024 for (outer_loop = dest_loop; outer_loop;
3025 outer_loop = outer_loop->outer)
3026 if (outer_loop == loop)
3032 if (loop && ! outer_loop)
3034 LABEL_OUTSIDE_LOOP_P (x) = 1;
3035 LABEL_NEXTREF (x) = loop->exit_labels;
3036 loop->exit_labels = x;
3038 for (outer_loop = loop;
3039 outer_loop && outer_loop != dest_loop;
3040 outer_loop = outer_loop->outer)
3041 outer_loop->exit_count++;
3044 /* If this is inside a loop, but not in the current loop or one enclosed
3045 by it, it invalidates at least one loop. */
3050 /* We must invalidate every nested loop containing the target of this
3051 label, except those that also contain the jump insn. */
3053 for (; dest_loop; dest_loop = dest_loop->outer)
3055 /* Stop when we reach a loop that also contains the jump insn. */
3056 for (outer_loop = loop; outer_loop; outer_loop = outer_loop->outer)
3057 if (dest_loop == outer_loop)
3060 /* If we get here, we know we need to invalidate a loop. */
3061 if (loop_dump_stream && ! dest_loop->invalid)
3062 fprintf (loop_dump_stream,
3063 "\nLoop at %d ignored due to multiple entry points.\n",
3064 INSN_UID (dest_loop->start));
3066 dest_loop->invalid = 1;
3071 /* If this is not setting pc, ignore. */
3072 if (SET_DEST (x) == pc_rtx)
3073 mark_loop_jump (SET_SRC (x), loop);
3077 mark_loop_jump (XEXP (x, 1), loop);
3078 mark_loop_jump (XEXP (x, 2), loop);
3083 for (i = 0; i < XVECLEN (x, 0); i++)
3084 mark_loop_jump (XVECEXP (x, 0, i), loop);
3088 for (i = 0; i < XVECLEN (x, 1); i++)
3089 mark_loop_jump (XVECEXP (x, 1, i), loop);
3093 /* Strictly speaking this is not a jump into the loop, only a possible
3094 jump out of the loop. However, we have no way to link the destination
3095 of this jump onto the list of exit labels. To be safe we mark this
3096 loop and any containing loops as invalid. */
3099 for (outer_loop = loop; outer_loop; outer_loop = outer_loop->outer)
3101 if (loop_dump_stream && ! outer_loop->invalid)
3102 fprintf (loop_dump_stream,
3103 "\nLoop at %d ignored due to unknown exit jump.\n",
3104 INSN_UID (outer_loop->start));
3105 outer_loop->invalid = 1;
3112 /* Return nonzero if there is a label in the range from
3113 insn INSN to and including the insn whose luid is END
3114 INSN must have an assigned luid (i.e., it must not have
3115 been previously created by loop.c). */
3118 labels_in_range_p (insn, end)
3122 while (insn && INSN_LUID (insn) <= end)
3124 if (GET_CODE (insn) == CODE_LABEL)
3126 insn = NEXT_INSN (insn);
3132 /* Record that a memory reference X is being set. */
3135 note_addr_stored (x, y, data)
3137 rtx y ATTRIBUTE_UNUSED;
3138 void *data ATTRIBUTE_UNUSED;
3140 struct loop_info *loop_info = data;
3142 if (x == 0 || GET_CODE (x) != MEM)
3145 /* Count number of memory writes.
3146 This affects heuristics in strength_reduce. */
3147 loop_info->num_mem_sets++;
3149 /* BLKmode MEM means all memory is clobbered. */
3150 if (GET_MODE (x) == BLKmode)
3152 if (RTX_UNCHANGING_P (x))
3153 loop_info->unknown_constant_address_altered = 1;
3155 loop_info->unknown_address_altered = 1;
3160 loop_info->store_mems = gen_rtx_EXPR_LIST (VOIDmode, x,
3161 loop_info->store_mems);
3164 /* X is a value modified by an INSN that references a biv inside a loop
3165 exit test (ie, X is somehow related to the value of the biv). If X
3166 is a pseudo that is used more than once, then the biv is (effectively)
3167 used more than once. DATA is a pointer to a loop_regs structure. */
3170 note_set_pseudo_multiple_uses (x, y, data)
3172 rtx y ATTRIBUTE_UNUSED;
3175 struct loop_regs *regs = (struct loop_regs *) data;
3180 while (GET_CODE (x) == STRICT_LOW_PART
3181 || GET_CODE (x) == SIGN_EXTRACT
3182 || GET_CODE (x) == ZERO_EXTRACT
3183 || GET_CODE (x) == SUBREG)
3186 if (GET_CODE (x) != REG || REGNO (x) < FIRST_PSEUDO_REGISTER)
3189 /* If we do not have usage information, or if we know the register
3190 is used more than once, note that fact for check_dbra_loop. */
3191 if (REGNO (x) >= max_reg_before_loop
3192 || ! regs->array[REGNO (x)].single_usage
3193 || regs->array[REGNO (x)].single_usage == const0_rtx)
3194 regs->multiple_uses = 1;
3197 /* Return nonzero if the rtx X is invariant over the current loop.
3199 The value is 2 if we refer to something only conditionally invariant.
3201 A memory ref is invariant if it is not volatile and does not conflict
3202 with anything stored in `loop_info->store_mems'. */
3205 loop_invariant_p (loop, x)
3206 const struct loop *loop;
3209 struct loop_info *loop_info = LOOP_INFO (loop);
3210 struct loop_regs *regs = LOOP_REGS (loop);
3214 int conditional = 0;
3219 code = GET_CODE (x);
3229 /* A LABEL_REF is normally invariant, however, if we are unrolling
3230 loops, and this label is inside the loop, then it isn't invariant.
3231 This is because each unrolled copy of the loop body will have
3232 a copy of this label. If this was invariant, then an insn loading
3233 the address of this label into a register might get moved outside
3234 the loop, and then each loop body would end up using the same label.
3236 We don't know the loop bounds here though, so just fail for all
3238 if (flag_unroll_loops)
3245 case UNSPEC_VOLATILE:
3249 /* We used to check RTX_UNCHANGING_P (x) here, but that is invalid
3250 since the reg might be set by initialization within the loop. */
3252 if ((x == frame_pointer_rtx || x == hard_frame_pointer_rtx
3253 || x == arg_pointer_rtx || x == pic_offset_table_rtx)
3254 && ! current_function_has_nonlocal_goto)
3257 if (LOOP_INFO (loop)->has_call
3258 && REGNO (x) < FIRST_PSEUDO_REGISTER && call_used_regs[REGNO (x)])
3261 if (regs->array[REGNO (x)].set_in_loop < 0)
3264 return regs->array[REGNO (x)].set_in_loop == 0;
3267 /* Volatile memory references must be rejected. Do this before
3268 checking for read-only items, so that volatile read-only items
3269 will be rejected also. */
3270 if (MEM_VOLATILE_P (x))
3273 /* See if there is any dependence between a store and this load. */
3274 mem_list_entry = loop_info->store_mems;
3275 while (mem_list_entry)
3277 if (true_dependence (XEXP (mem_list_entry, 0), VOIDmode,
3281 mem_list_entry = XEXP (mem_list_entry, 1);
3284 /* It's not invalidated by a store in memory
3285 but we must still verify the address is invariant. */
3289 /* Don't mess with insns declared volatile. */
3290 if (MEM_VOLATILE_P (x))
3298 fmt = GET_RTX_FORMAT (code);
3299 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3303 int tem = loop_invariant_p (loop, XEXP (x, i));
3309 else if (fmt[i] == 'E')
3312 for (j = 0; j < XVECLEN (x, i); j++)
3314 int tem = loop_invariant_p (loop, XVECEXP (x, i, j));
3324 return 1 + conditional;
3327 /* Return nonzero if all the insns in the loop that set REG
3328 are INSN and the immediately following insns,
3329 and if each of those insns sets REG in an invariant way
3330 (not counting uses of REG in them).
3332 The value is 2 if some of these insns are only conditionally invariant.
3334 We assume that INSN itself is the first set of REG
3335 and that its source is invariant. */
3338 consec_sets_invariant_p (loop, reg, n_sets, insn)
3339 const struct loop *loop;
3343 struct loop_regs *regs = LOOP_REGS (loop);
3345 unsigned int regno = REGNO (reg);
3347 /* Number of sets we have to insist on finding after INSN. */
3348 int count = n_sets - 1;
3349 int old = regs->array[regno].set_in_loop;
3353 /* If N_SETS hit the limit, we can't rely on its value. */
3357 regs->array[regno].set_in_loop = 0;
3365 code = GET_CODE (p);
3367 /* If library call, skip to end of it. */
3368 if (code == INSN && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
3373 && (set = single_set (p))
3374 && GET_CODE (SET_DEST (set)) == REG
3375 && REGNO (SET_DEST (set)) == regno)
3377 this = loop_invariant_p (loop, SET_SRC (set));
3380 else if ((temp = find_reg_note (p, REG_EQUAL, NULL_RTX)))
3382 /* If this is a libcall, then any invariant REG_EQUAL note is OK.
3383 If this is an ordinary insn, then only CONSTANT_P REG_EQUAL
3385 this = (CONSTANT_P (XEXP (temp, 0))
3386 || (find_reg_note (p, REG_RETVAL, NULL_RTX)
3387 && loop_invariant_p (loop, XEXP (temp, 0))));
3394 else if (code != NOTE)
3396 regs->array[regno].set_in_loop = old;
3401 regs->array[regno].set_in_loop = old;
3402 /* If loop_invariant_p ever returned 2, we return 2. */
3403 return 1 + (value & 2);
3407 /* I don't think this condition is sufficient to allow INSN
3408 to be moved, so we no longer test it. */
3410 /* Return 1 if all insns in the basic block of INSN and following INSN
3411 that set REG are invariant according to TABLE. */
3414 all_sets_invariant_p (reg, insn, table)
3419 int regno = REGNO (reg);
3425 code = GET_CODE (p);
3426 if (code == CODE_LABEL || code == JUMP_INSN)
3428 if (code == INSN && GET_CODE (PATTERN (p)) == SET
3429 && GET_CODE (SET_DEST (PATTERN (p))) == REG
3430 && REGNO (SET_DEST (PATTERN (p))) == regno)
3432 if (! loop_invariant_p (loop, SET_SRC (PATTERN (p)), table))
3439 /* Look at all uses (not sets) of registers in X. For each, if it is
3440 the single use, set USAGE[REGNO] to INSN; if there was a previous use in
3441 a different insn, set USAGE[REGNO] to const0_rtx. */
3444 find_single_use_in_loop (regs, insn, x)
3445 struct loop_regs *regs;
3449 enum rtx_code code = GET_CODE (x);
3450 const char *fmt = GET_RTX_FORMAT (code);
3454 regs->array[REGNO (x)].single_usage
3455 = (regs->array[REGNO (x)].single_usage != 0
3456 && regs->array[REGNO (x)].single_usage != insn)
3457 ? const0_rtx : insn;
3459 else if (code == SET)
3461 /* Don't count SET_DEST if it is a REG; otherwise count things
3462 in SET_DEST because if a register is partially modified, it won't
3463 show up as a potential movable so we don't care how USAGE is set
3465 if (GET_CODE (SET_DEST (x)) != REG)
3466 find_single_use_in_loop (regs, insn, SET_DEST (x));
3467 find_single_use_in_loop (regs, insn, SET_SRC (x));
3470 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3472 if (fmt[i] == 'e' && XEXP (x, i) != 0)
3473 find_single_use_in_loop (regs, insn, XEXP (x, i));
3474 else if (fmt[i] == 'E')
3475 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3476 find_single_use_in_loop (regs, insn, XVECEXP (x, i, j));
3480 /* Count and record any set in X which is contained in INSN. Update
3481 REGS->array[I].MAY_NOT_OPTIMIZE and LAST_SET for any register I set
3485 count_one_set (regs, insn, x, last_set)
3486 struct loop_regs *regs;
3490 if (GET_CODE (x) == CLOBBER && GET_CODE (XEXP (x, 0)) == REG)
3491 /* Don't move a reg that has an explicit clobber.
3492 It's not worth the pain to try to do it correctly. */
3493 regs->array[REGNO (XEXP (x, 0))].may_not_optimize = 1;
3495 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
3497 rtx dest = SET_DEST (x);
3498 while (GET_CODE (dest) == SUBREG
3499 || GET_CODE (dest) == ZERO_EXTRACT
3500 || GET_CODE (dest) == SIGN_EXTRACT
3501 || GET_CODE (dest) == STRICT_LOW_PART)
3502 dest = XEXP (dest, 0);
3503 if (GET_CODE (dest) == REG)
3506 int regno = REGNO (dest);
3507 for (i = 0; i < LOOP_REGNO_NREGS (regno, dest); i++)
3509 /* If this is the first setting of this reg
3510 in current basic block, and it was set before,
3511 it must be set in two basic blocks, so it cannot
3512 be moved out of the loop. */
3513 if (regs->array[regno].set_in_loop > 0
3515 regs->array[regno+i].may_not_optimize = 1;
3516 /* If this is not first setting in current basic block,
3517 see if reg was used in between previous one and this.
3518 If so, neither one can be moved. */
3519 if (last_set[regno] != 0
3520 && reg_used_between_p (dest, last_set[regno], insn))
3521 regs->array[regno+i].may_not_optimize = 1;
3522 if (regs->array[regno+i].set_in_loop < 127)
3523 ++regs->array[regno+i].set_in_loop;
3524 last_set[regno+i] = insn;
3530 /* Given a loop that is bounded by LOOP->START and LOOP->END and that
3531 is entered at LOOP->SCAN_START, return 1 if the register set in SET
3532 contained in insn INSN is used by any insn that precedes INSN in
3533 cyclic order starting from the loop entry point.
3535 We don't want to use INSN_LUID here because if we restrict INSN to those
3536 that have a valid INSN_LUID, it means we cannot move an invariant out
3537 from an inner loop past two loops. */
3540 loop_reg_used_before_p (loop, set, insn)
3541 const struct loop *loop;
3544 rtx reg = SET_DEST (set);
3547 /* Scan forward checking for register usage. If we hit INSN, we
3548 are done. Otherwise, if we hit LOOP->END, wrap around to LOOP->START. */
3549 for (p = loop->scan_start; p != insn; p = NEXT_INSN (p))
3551 if (INSN_P (p) && reg_overlap_mentioned_p (reg, PATTERN (p)))
3562 /* Information we collect about arrays that we might want to prefetch. */
3563 struct prefetch_info
3565 struct iv_class *class; /* Class this prefetch is based on. */
3566 struct induction *giv; /* GIV this prefetch is based on. */
3567 rtx base_address; /* Start prefetching from this address plus
3569 HOST_WIDE_INT index;
3570 HOST_WIDE_INT stride; /* Prefetch stride in bytes in each
3572 unsigned int bytes_accesed; /* Sum of sizes of all acceses to this
3573 prefetch area in one iteration. */
3574 unsigned int total_bytes; /* Total bytes loop will access in this block.
3575 This is set only for loops with known
3576 iteration counts and is 0xffffffff
3578 unsigned int write : 1; /* 1 for read/write prefetches. */
3579 unsigned int prefetch_in_loop : 1;
3580 /* 1 for those chosen for prefetching. */
3581 unsigned int prefetch_before_loop : 1;
3582 /* 1 for those chosen for prefetching. */
3585 /* Data used by check_store function. */
3586 struct check_store_data
3592 static void check_store PARAMS ((rtx, rtx, void *));
3593 static void emit_prefetch_instructions PARAMS ((struct loop *));
3594 static int rtx_equal_for_prefetch_p PARAMS ((rtx, rtx));
3596 /* Set mem_write when mem_address is found. Used as callback to
3599 check_store (x, pat, data)
3600 rtx x, pat ATTRIBUTE_UNUSED;
3603 struct check_store_data *d = (struct check_store_data *) data;
3605 if ((GET_CODE (x) == MEM) && rtx_equal_p (d->mem_address, XEXP (x, 0)))
3609 /* Like rtx_equal_p, but attempts to swap commutative operands. This is
3610 important to get some addresses combined. Later more sophisticated
3611 transformations can be added when necesary.
3613 ??? Same trick with swapping operand is done at several other places.
3614 It can be nice to develop some common way to handle this. */
3617 rtx_equal_for_prefetch_p (x, y)
3622 enum rtx_code code = GET_CODE (x);
3627 if (code != GET_CODE (y))
3630 code = GET_CODE (x);
3632 if (GET_RTX_CLASS (code) == 'c')
3634 return ((rtx_equal_for_prefetch_p (XEXP (x, 0), XEXP (y, 0))
3635 && rtx_equal_for_prefetch_p (XEXP (x, 1), XEXP (y, 1)))
3636 || (rtx_equal_for_prefetch_p (XEXP (x, 0), XEXP (y, 1))
3637 && rtx_equal_for_prefetch_p (XEXP (x, 1), XEXP (y, 0))));
3639 /* Compare the elements. If any pair of corresponding elements fails to
3640 match, return 0 for the whole thing. */
3642 fmt = GET_RTX_FORMAT (code);
3643 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3648 if (XWINT (x, i) != XWINT (y, i))
3653 if (XINT (x, i) != XINT (y, i))
3658 /* Two vectors must have the same length. */
3659 if (XVECLEN (x, i) != XVECLEN (y, i))
3662 /* And the corresponding elements must match. */
3663 for (j = 0; j < XVECLEN (x, i); j++)
3664 if (rtx_equal_for_prefetch_p (XVECEXP (x, i, j),
3665 XVECEXP (y, i, j)) == 0)
3670 if (rtx_equal_for_prefetch_p (XEXP (x, i), XEXP (y, i)) == 0)
3675 if (strcmp (XSTR (x, i), XSTR (y, i)))
3680 /* These are just backpointers, so they don't matter. */
3686 /* It is believed that rtx's at this level will never
3687 contain anything but integers and other rtx's,
3688 except for within LABEL_REFs and SYMBOL_REFs. */
3696 /* Remove constant addition value from the expression X (when present)
3699 static HOST_WIDE_INT
3700 remove_constant_addition (x)
3703 HOST_WIDE_INT addval = 0;
3706 /* Avoid clobbering a shared CONST expression. */
3707 if (GET_CODE (exp) == CONST)
3709 if (GET_CODE (XEXP (exp, 0)) == PLUS
3710 && GET_CODE (XEXP (XEXP (exp, 0), 0)) == SYMBOL_REF
3711 && GET_CODE (XEXP (XEXP (exp, 0), 1)) == CONST_INT)
3713 *x = XEXP (XEXP (exp, 0), 0);
3714 return INTVAL (XEXP (XEXP (exp, 0), 1));
3719 if (GET_CODE (exp) == CONST_INT)
3721 addval = INTVAL (exp);
3725 /* For plus expression recurse on ourself. */
3726 else if (GET_CODE (exp) == PLUS)
3728 addval += remove_constant_addition (&XEXP (exp, 0));
3729 addval += remove_constant_addition (&XEXP (exp, 1));
3731 /* In case our parameter was constant, remove extra zero from the
3733 if (XEXP (exp, 0) == const0_rtx)
3735 else if (XEXP (exp, 1) == const0_rtx)
3742 /* Attempt to identify accesses to arrays that are most likely to cause cache
3743 misses, and emit prefetch instructions a few prefetch blocks forward.
3745 To detect the arrays we use the GIV information that was collected by the
3746 strength reduction pass.
3748 The prefetch instructions are generated after the GIV information is done
3749 and before the strength reduction process. The new GIVs are injected into
3750 the strength reduction tables, so the prefetch addresses are optimized as
3753 GIVs are split into base address, stride, and constant addition values.
3754 GIVs with the same address, stride and close addition values are combined
3755 into a single prefetch. Also writes to GIVs are detected, so that prefetch
3756 for write instructions can be used for the block we write to, on machines
3757 that support write prefetches.
3759 Several heuristics are used to determine when to prefetch. They are
3760 controlled by defined symbols that can be overridden for each target. */
3763 emit_prefetch_instructions (loop)
3766 int num_prefetches = 0;
3767 int num_real_prefetches = 0;
3768 int num_real_write_prefetches = 0;
3771 struct iv_class *bl;
3772 struct induction *iv;
3773 struct prefetch_info info[MAX_PREFETCHES];
3774 struct loop_ivs *ivs = LOOP_IVS (loop);
3779 /* Consider only loops w/o calls. When a call is done, the loop is probably
3780 slow enough to read the memory. */
3781 if (PREFETCH_NO_CALL && LOOP_INFO (loop)->has_call)
3783 if (loop_dump_stream)
3784 fprintf (loop_dump_stream, "Prefetch: ignoring loop - has call.\n");
3789 if (PREFETCH_NO_LOW_LOOPCNT
3790 && LOOP_INFO (loop)->n_iterations
3791 && LOOP_INFO (loop)->n_iterations <= PREFETCH_LOW_LOOPCNT)
3793 if (loop_dump_stream)
3794 fprintf (loop_dump_stream,
3795 "Prefetch: ignoring loop - not enought iterations.\n");
3799 /* Search all induction variables and pick those interesting for the prefetch
3801 for (bl = ivs->list; bl; bl = bl->next)
3803 struct induction *biv = bl->biv, *biv1;
3808 /* Expect all BIVs to be executed in each iteration. This makes our
3809 analysis more conservative. */
3812 /* Discard non-constant additions that we can't handle well yet, and
3813 BIVs that are executed multiple times; such BIVs ought to be
3814 handled in the nested loop. We accept not_every_iteration BIVs,
3815 since these only result in larger strides and make our
3816 heuristics more conservative.
3817 ??? What does the last sentence mean? */
3818 if (GET_CODE (biv->add_val) != CONST_INT)
3820 if (loop_dump_stream)
3822 fprintf (loop_dump_stream,
3823 "Prefetch: biv %i ignored: non-constant addition at insn %i:",
3824 REGNO (biv->src_reg), INSN_UID (biv->insn));
3825 print_rtl (loop_dump_stream, biv->add_val);
3826 fprintf (loop_dump_stream, "\n");
3831 if (biv->maybe_multiple)
3833 if (loop_dump_stream)
3835 fprintf (loop_dump_stream,
3836 "Prefetch: biv %i ignored: maybe_multiple at insn %i:",
3837 REGNO (biv->src_reg), INSN_UID (biv->insn));
3838 print_rtl (loop_dump_stream, biv->add_val);
3839 fprintf (loop_dump_stream, "\n");
3844 basestride += INTVAL (biv1->add_val);
3845 biv1 = biv1->next_iv;
3848 if (biv1 || !basestride)
3851 for (iv = bl->giv; iv; iv = iv->next_iv)
3855 HOST_WIDE_INT index = 0;
3857 HOST_WIDE_INT stride;
3858 struct check_store_data d;
3859 int size = GET_MODE_SIZE (GET_MODE (iv));
3861 /* There are several reasons why an induction variable is not
3862 interesting to us. */
3863 if (iv->giv_type != DEST_ADDR
3864 /* We are interested only in constant stride memory references
3865 in order to be able to compute density easily. */
3866 || GET_CODE (iv->mult_val) != CONST_INT
3867 /* Don't handle reversed order prefetches, since they are usually
3868 ineffective. Later we may be able to reverse such BIVs. */
3869 || (PREFETCH_NO_REVERSE_ORDER
3870 && (stride = INTVAL (iv->mult_val) * basestride) < 0)
3871 /* Prefetching of accesses with such an extreme stride is probably
3872 not worthwhile, either. */
3873 || (PREFETCH_NO_EXTREME_STRIDE
3874 && stride > PREFETCH_EXTREME_STRIDE)
3875 /* Ignore GIVs with varying add values; we can't predict the
3876 value for the next iteration. */
3877 || !loop_invariant_p (loop, iv->add_val)
3878 /* Ignore GIVs in the nested loops; they ought to have been
3880 || iv->maybe_multiple)
3882 if (loop_dump_stream)
3883 fprintf (loop_dump_stream, "Prefetch: Ignoring giv at %i\n",
3884 INSN_UID (iv->insn));
3888 /* Determine the pointer to the basic array we are examining. It is
3889 the sum of the BIV's initial value and the GIV's add_val. */
3892 address = copy_rtx (iv->add_val);
3893 temp = copy_rtx (bl->initial_value);
3895 address = simplify_gen_binary (PLUS, Pmode, temp, address);
3896 index = remove_constant_addition (&address);
3900 d.mem_address = *iv->location;
3902 /* When the GIV is not always executed, we might be better off by
3903 not dirtying the cache pages. */
3904 if (PREFETCH_NOT_ALWAYS || iv->always_executed)
3905 note_stores (PATTERN (iv->insn), check_store, &d);
3907 /* Attempt to find another prefetch to the same array and see if we
3908 can merge this one. */
3909 for (i = 0; i < num_prefetches; i++)
3910 if (rtx_equal_for_prefetch_p (address, info[i].base_address)
3911 && stride == info[i].stride)
3913 /* In case both access same array (same location
3914 just with small difference in constant indexes), merge
3915 the prefetches. Just do the later and the earlier will
3916 get prefetched from previous iteration.
3917 4096 is artificial threshold. It should not be too small,
3918 but also not bigger than small portion of memory usually
3919 traversed by single loop. */
3920 if (index >= info[i].index && index - info[i].index < 4096)
3922 info[i].write |= d.mem_write;
3923 info[i].bytes_accesed += size;
3924 info[i].index = index;
3927 info[num_prefetches].base_address = address;
3932 if (index < info[i].index && info[i].index - index < 4096)
3934 info[i].write |= d.mem_write;
3935 info[i].bytes_accesed += size;
3941 /* Merging failed. */
3944 info[num_prefetches].giv = iv;
3945 info[num_prefetches].class = bl;
3946 info[num_prefetches].index = index;
3947 info[num_prefetches].stride = stride;
3948 info[num_prefetches].base_address = address;
3949 info[num_prefetches].write = d.mem_write;
3950 info[num_prefetches].bytes_accesed = size;
3952 if (num_prefetches >= MAX_PREFETCHES)
3954 if (loop_dump_stream)
3955 fprintf (loop_dump_stream,
3956 "Maximal number of prefetches exceeded.\n");
3963 for (i = 0; i < num_prefetches; i++)
3965 /* Attempt to calculate the number of bytes fetched by the loop.
3967 if (LOOP_INFO (loop)->n_iterations
3968 && ((unsigned HOST_WIDE_INT) (0xffffffff / info[i].stride)
3969 >= LOOP_INFO (loop)->n_iterations))
3970 info[i].total_bytes = info[i].stride * LOOP_INFO (loop)->n_iterations;
3972 info[i].total_bytes = 0xffffffff;
3974 /* Prefetch is worthwhile only when the loads/stores are dense. */
3975 if (PREFETCH_ONLY_DENSE_MEM
3976 && info[i].bytes_accesed * 256 / info[i].stride > PREFETCH_DENSE_MEM
3977 && (info[i].total_bytes / PREFETCH_BLOCK
3978 >= PREFETCH_BLOCKS_BEFORE_LOOP_MIN))
3980 info[i].prefetch_before_loop = 1;
3981 info[i].prefetch_in_loop
3982 = (info[i].total_bytes / PREFETCH_BLOCK
3983 > PREFETCH_BLOCKS_BEFORE_LOOP_MAX);
3986 info[i].prefetch_in_loop = 0, info[i].prefetch_before_loop = 0;
3988 if (info[i].prefetch_in_loop)
3990 num_real_prefetches += ((info[i].stride + PREFETCH_BLOCK - 1)
3993 num_real_write_prefetches
3994 += (info[i].stride + PREFETCH_BLOCK - 1) / PREFETCH_BLOCK;
3998 if (loop_dump_stream)
4000 for (i = 0; i < num_prefetches; i++)
4002 fprintf (loop_dump_stream, "Prefetch insn %i address: ",
4003 INSN_UID (info[i].giv->insn));
4004 print_rtl (loop_dump_stream, info[i].base_address);
4005 fprintf (loop_dump_stream, " Index: ");
4006 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, info[i].index);
4007 fprintf (loop_dump_stream, " stride: ");
4008 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, info[i].stride);
4009 fprintf (loop_dump_stream,
4010 " density: %i%% total_bytes: %u%sin loop: %s before: %s\n",
4011 (int) (info[i].bytes_accesed * 100 / info[i].stride),
4012 info[i].total_bytes,
4013 info[i].write ? " read/write " : " read only ",
4014 info[i].prefetch_in_loop ? "yes" : "no",
4015 info[i].prefetch_before_loop ? "yes" : "no");
4018 fprintf (loop_dump_stream, "Real prefetches needed: %i (write: %i)\n",
4019 num_real_prefetches, num_real_write_prefetches);
4022 if (!num_real_prefetches)
4025 ahead = SIMULTANEOUS_PREFETCHES / num_real_prefetches;
4030 for (i = 0; i < num_prefetches; i++)
4032 if (info[i].prefetch_in_loop)
4036 for (y = 0; y < ((info[i].stride + PREFETCH_BLOCK - 1)
4037 / PREFETCH_BLOCK); y++)
4039 rtx loc = copy_rtx (*info[i].giv->location);
4041 int bytes_ahead = PREFETCH_BLOCK * (ahead + y);
4042 rtx before_insn = info[i].giv->insn;
4043 rtx prev_insn = PREV_INSN (info[i].giv->insn);
4045 /* We can save some effort by offsetting the address on
4046 architectures with offsettable memory references. */
4047 if (offsettable_address_p (0, VOIDmode, loc))
4048 loc = plus_constant (loc, bytes_ahead);
4051 rtx reg = gen_reg_rtx (Pmode);
4052 loop_iv_add_mult_emit_before (loop, loc, const1_rtx,
4053 GEN_INT (bytes_ahead), reg,
4058 /* Make sure the address operand is valid for prefetch. */
4059 if (! (*insn_data[(int)CODE_FOR_prefetch].operand[0].predicate)
4061 insn_data[(int)CODE_FOR_prefetch].operand[0].mode))
4062 loc = force_reg (Pmode, loc);
4063 emit_insn_before (gen_prefetch (loc, GEN_INT (info[i].write),
4067 /* Check all insns emitted and record the new GIV
4069 insn = NEXT_INSN (prev_insn);
4070 while (insn != before_insn)
4072 insn = check_insn_for_givs (loop, insn,
4073 info[i].giv->always_executed,
4074 info[i].giv->maybe_multiple);
4075 insn = NEXT_INSN (insn);
4080 if (info[i].prefetch_before_loop)
4084 /* Emit INSNs before the loop to fetch the first cache lines. */
4086 (!info[i].prefetch_in_loop || y < ahead)
4087 && y * PREFETCH_BLOCK < (int) info[i].total_bytes; y ++)
4089 rtx reg = gen_reg_rtx (Pmode);
4090 rtx loop_start = loop->start;
4091 rtx add_val = simplify_gen_binary (PLUS, Pmode,
4092 info[i].giv->add_val,
4093 GEN_INT (y * PREFETCH_BLOCK));
4095 loop_iv_add_mult_emit_before (loop, info[i].class->initial_value,
4096 info[i].giv->mult_val,
4097 add_val, reg, 0, loop_start);
4098 emit_insn_before (gen_prefetch (reg, GEN_INT (info[i].write),
4108 /* A "basic induction variable" or biv is a pseudo reg that is set
4109 (within this loop) only by incrementing or decrementing it. */
4110 /* A "general induction variable" or giv is a pseudo reg whose
4111 value is a linear function of a biv. */
4113 /* Bivs are recognized by `basic_induction_var';
4114 Givs by `general_induction_var'. */
4116 /* Communication with routines called via `note_stores'. */
4118 static rtx note_insn;
4120 /* Dummy register to have non-zero DEST_REG for DEST_ADDR type givs. */
4122 static rtx addr_placeholder;
4124 /* ??? Unfinished optimizations, and possible future optimizations,
4125 for the strength reduction code. */
4127 /* ??? The interaction of biv elimination, and recognition of 'constant'
4128 bivs, may cause problems. */
4130 /* ??? Add heuristics so that DEST_ADDR strength reduction does not cause
4131 performance problems.
4133 Perhaps don't eliminate things that can be combined with an addressing
4134 mode. Find all givs that have the same biv, mult_val, and add_val;
4135 then for each giv, check to see if its only use dies in a following
4136 memory address. If so, generate a new memory address and check to see
4137 if it is valid. If it is valid, then store the modified memory address,
4138 otherwise, mark the giv as not done so that it will get its own iv. */
4140 /* ??? Could try to optimize branches when it is known that a biv is always
4143 /* ??? When replace a biv in a compare insn, we should replace with closest
4144 giv so that an optimized branch can still be recognized by the combiner,
4145 e.g. the VAX acb insn. */
4147 /* ??? Many of the checks involving uid_luid could be simplified if regscan
4148 was rerun in loop_optimize whenever a register was added or moved.
4149 Also, some of the optimizations could be a little less conservative. */
4151 /* Scan the loop body and call FNCALL for each insn. In the addition to the
4152 LOOP and INSN parameters pass MAYBE_MULTIPLE and NOT_EVERY_ITERATION to the
4155 NOT_EVERY_ITERATION if current insn is not executed at least once for every
4156 loop iteration except for the last one.
4158 MAYBE_MULTIPLE is 1 if current insn may be executed more than once for every
4162 for_each_insn_in_loop (loop, fncall)
4164 loop_insn_callback fncall;
4166 /* This is 1 if current insn is not executed at least once for every loop
4168 int not_every_iteration = 0;
4169 int maybe_multiple = 0;
4170 int past_loop_latch = 0;
4174 /* If loop_scan_start points to the loop exit test, we have to be wary of
4175 subversive use of gotos inside expression statements. */
4176 if (prev_nonnote_insn (loop->scan_start) != prev_nonnote_insn (loop->start))
4177 maybe_multiple = back_branch_in_range_p (loop, loop->scan_start);
4179 /* Scan through loop to find all possible bivs. */
4181 for (p = next_insn_in_loop (loop, loop->scan_start);
4183 p = next_insn_in_loop (loop, p))
4185 p = fncall (loop, p, not_every_iteration, maybe_multiple);
4187 /* Past CODE_LABEL, we get to insns that may be executed multiple
4188 times. The only way we can be sure that they can't is if every
4189 jump insn between here and the end of the loop either
4190 returns, exits the loop, is a jump to a location that is still
4191 behind the label, or is a jump to the loop start. */
4193 if (GET_CODE (p) == CODE_LABEL)
4201 insn = NEXT_INSN (insn);
4202 if (insn == loop->scan_start)
4204 if (insn == loop->end)
4210 if (insn == loop->scan_start)
4214 if (GET_CODE (insn) == JUMP_INSN
4215 && GET_CODE (PATTERN (insn)) != RETURN
4216 && (!any_condjump_p (insn)
4217 || (JUMP_LABEL (insn) != 0
4218 && JUMP_LABEL (insn) != loop->scan_start
4219 && !loop_insn_first_p (p, JUMP_LABEL (insn)))))
4227 /* Past a jump, we get to insns for which we can't count
4228 on whether they will be executed during each iteration. */
4229 /* This code appears twice in strength_reduce. There is also similar
4230 code in scan_loop. */
4231 if (GET_CODE (p) == JUMP_INSN
4232 /* If we enter the loop in the middle, and scan around to the
4233 beginning, don't set not_every_iteration for that.
4234 This can be any kind of jump, since we want to know if insns
4235 will be executed if the loop is executed. */
4236 && !(JUMP_LABEL (p) == loop->top
4237 && ((NEXT_INSN (NEXT_INSN (p)) == loop->end
4238 && any_uncondjump_p (p))
4239 || (NEXT_INSN (p) == loop->end && any_condjump_p (p)))))
4243 /* If this is a jump outside the loop, then it also doesn't
4244 matter. Check to see if the target of this branch is on the
4245 loop->exits_labels list. */
4247 for (label = loop->exit_labels; label; label = LABEL_NEXTREF (label))
4248 if (XEXP (label, 0) == JUMP_LABEL (p))
4252 not_every_iteration = 1;
4255 else if (GET_CODE (p) == NOTE)
4257 /* At the virtual top of a converted loop, insns are again known to
4258 be executed each iteration: logically, the loop begins here
4259 even though the exit code has been duplicated.
4261 Insns are also again known to be executed each iteration at
4262 the LOOP_CONT note. */
4263 if ((NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP
4264 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_CONT)
4266 not_every_iteration = 0;
4267 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
4269 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
4273 /* Note if we pass a loop latch. If we do, then we can not clear
4274 NOT_EVERY_ITERATION below when we pass the last CODE_LABEL in
4275 a loop since a jump before the last CODE_LABEL may have started
4276 a new loop iteration.
4278 Note that LOOP_TOP is only set for rotated loops and we need
4279 this check for all loops, so compare against the CODE_LABEL
4280 which immediately follows LOOP_START. */
4281 if (GET_CODE (p) == JUMP_INSN
4282 && JUMP_LABEL (p) == NEXT_INSN (loop->start))
4283 past_loop_latch = 1;
4285 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
4286 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
4287 or not an insn is known to be executed each iteration of the
4288 loop, whether or not any iterations are known to occur.
4290 Therefore, if we have just passed a label and have no more labels
4291 between here and the test insn of the loop, and we have not passed
4292 a jump to the top of the loop, then we know these insns will be
4293 executed each iteration. */
4295 if (not_every_iteration
4297 && GET_CODE (p) == CODE_LABEL
4298 && no_labels_between_p (p, loop->end)
4299 && loop_insn_first_p (p, loop->cont))
4300 not_every_iteration = 0;
4305 loop_bivs_find (loop)
4308 struct loop_regs *regs = LOOP_REGS (loop);
4309 struct loop_ivs *ivs = LOOP_IVS (loop);
4310 /* Temporary list pointers for traversing ivs->list. */
4311 struct iv_class *bl, **backbl;
4315 for_each_insn_in_loop (loop, check_insn_for_bivs);
4317 /* Scan ivs->list to remove all regs that proved not to be bivs.
4318 Make a sanity check against regs->n_times_set. */
4319 for (backbl = &ivs->list, bl = *backbl; bl; bl = bl->next)
4321 if (REG_IV_TYPE (ivs, bl->regno) != BASIC_INDUCT
4322 /* Above happens if register modified by subreg, etc. */
4323 /* Make sure it is not recognized as a basic induction var: */
4324 || regs->array[bl->regno].n_times_set != bl->biv_count
4325 /* If never incremented, it is invariant that we decided not to
4326 move. So leave it alone. */
4327 || ! bl->incremented)
4329 if (loop_dump_stream)
4330 fprintf (loop_dump_stream, "Biv %d: discarded, %s\n",
4332 (REG_IV_TYPE (ivs, bl->regno) != BASIC_INDUCT
4333 ? "not induction variable"
4334 : (! bl->incremented ? "never incremented"
4337 REG_IV_TYPE (ivs, bl->regno) = NOT_BASIC_INDUCT;
4344 if (loop_dump_stream)
4345 fprintf (loop_dump_stream, "Biv %d: verified\n", bl->regno);
4351 /* Determine how BIVS are initialised by looking through pre-header
4352 extended basic block. */
4354 loop_bivs_init_find (loop)
4357 struct loop_ivs *ivs = LOOP_IVS (loop);
4358 /* Temporary list pointers for traversing ivs->list. */
4359 struct iv_class *bl;
4363 /* Find initial value for each biv by searching backwards from loop_start,
4364 halting at first label. Also record any test condition. */
4367 for (p = loop->start; p && GET_CODE (p) != CODE_LABEL; p = PREV_INSN (p))
4373 if (GET_CODE (p) == CALL_INSN)
4377 note_stores (PATTERN (p), record_initial, ivs);
4379 /* Record any test of a biv that branches around the loop if no store
4380 between it and the start of loop. We only care about tests with
4381 constants and registers and only certain of those. */
4382 if (GET_CODE (p) == JUMP_INSN
4383 && JUMP_LABEL (p) != 0
4384 && next_real_insn (JUMP_LABEL (p)) == next_real_insn (loop->end)
4385 && (test = get_condition_for_loop (loop, p)) != 0
4386 && GET_CODE (XEXP (test, 0)) == REG
4387 && REGNO (XEXP (test, 0)) < max_reg_before_loop
4388 && (bl = REG_IV_CLASS (ivs, REGNO (XEXP (test, 0)))) != 0
4389 && valid_initial_value_p (XEXP (test, 1), p, call_seen, loop->start)
4390 && bl->init_insn == 0)
4392 /* If an NE test, we have an initial value! */
4393 if (GET_CODE (test) == NE)
4396 bl->init_set = gen_rtx_SET (VOIDmode,
4397 XEXP (test, 0), XEXP (test, 1));
4400 bl->initial_test = test;
4406 /* Look at the each biv and see if we can say anything better about its
4407 initial value from any initializing insns set up above. (This is done
4408 in two passes to avoid missing SETs in a PARALLEL.) */
4410 loop_bivs_check (loop)
4413 struct loop_ivs *ivs = LOOP_IVS (loop);
4414 /* Temporary list pointers for traversing ivs->list. */
4415 struct iv_class *bl;
4416 struct iv_class **backbl;
4418 for (backbl = &ivs->list; (bl = *backbl); backbl = &bl->next)
4423 if (! bl->init_insn)
4426 /* IF INIT_INSN has a REG_EQUAL or REG_EQUIV note and the value
4427 is a constant, use the value of that. */
4428 if (((note = find_reg_note (bl->init_insn, REG_EQUAL, 0)) != NULL
4429 && CONSTANT_P (XEXP (note, 0)))
4430 || ((note = find_reg_note (bl->init_insn, REG_EQUIV, 0)) != NULL
4431 && CONSTANT_P (XEXP (note, 0))))
4432 src = XEXP (note, 0);
4434 src = SET_SRC (bl->init_set);
4436 if (loop_dump_stream)
4437 fprintf (loop_dump_stream,
4438 "Biv %d: initialized at insn %d: initial value ",
4439 bl->regno, INSN_UID (bl->init_insn));
4441 if ((GET_MODE (src) == GET_MODE (regno_reg_rtx[bl->regno])
4442 || GET_MODE (src) == VOIDmode)
4443 && valid_initial_value_p (src, bl->init_insn,
4444 LOOP_INFO (loop)->pre_header_has_call,
4447 bl->initial_value = src;
4449 if (loop_dump_stream)
4451 print_simple_rtl (loop_dump_stream, src);
4452 fputc ('\n', loop_dump_stream);
4455 /* If we can't make it a giv,
4456 let biv keep initial value of "itself". */
4457 else if (loop_dump_stream)
4458 fprintf (loop_dump_stream, "is complex\n");
4463 /* Search the loop for general induction variables. */
4466 loop_givs_find (loop)
4469 for_each_insn_in_loop (loop, check_insn_for_givs);
4473 /* For each giv for which we still don't know whether or not it is
4474 replaceable, check to see if it is replaceable because its final value
4475 can be calculated. */
4478 loop_givs_check (loop)
4481 struct loop_ivs *ivs = LOOP_IVS (loop);
4482 struct iv_class *bl;
4484 for (bl = ivs->list; bl; bl = bl->next)
4486 struct induction *v;
4488 for (v = bl->giv; v; v = v->next_iv)
4489 if (! v->replaceable && ! v->not_replaceable)
4490 check_final_value (loop, v);
4495 /* Return non-zero if it is possible to eliminate the biv BL provided
4496 all givs are reduced. This is possible if either the reg is not
4497 used outside the loop, or we can compute what its final value will
4501 loop_biv_eliminable_p (loop, bl, threshold, insn_count)
4503 struct iv_class *bl;
4507 /* For architectures with a decrement_and_branch_until_zero insn,
4508 don't do this if we put a REG_NONNEG note on the endtest for this
4511 #ifdef HAVE_decrement_and_branch_until_zero
4514 if (loop_dump_stream)
4515 fprintf (loop_dump_stream,
4516 "Cannot eliminate nonneg biv %d.\n", bl->regno);
4521 /* Check that biv is used outside loop or if it has a final value.
4522 Compare against bl->init_insn rather than loop->start. We aren't
4523 concerned with any uses of the biv between init_insn and
4524 loop->start since these won't be affected by the value of the biv
4525 elsewhere in the function, so long as init_insn doesn't use the
4528 if ((REGNO_LAST_LUID (bl->regno) < INSN_LUID (loop->end)
4530 && INSN_UID (bl->init_insn) < max_uid_for_loop
4531 && REGNO_FIRST_LUID (bl->regno) >= INSN_LUID (bl->init_insn)
4532 && ! reg_mentioned_p (bl->biv->dest_reg, SET_SRC (bl->init_set)))
4533 || (bl->final_value = final_biv_value (loop, bl)))
4534 return maybe_eliminate_biv (loop, bl, 0, threshold, insn_count);
4536 if (loop_dump_stream)
4538 fprintf (loop_dump_stream,
4539 "Cannot eliminate biv %d.\n",
4541 fprintf (loop_dump_stream,
4542 "First use: insn %d, last use: insn %d.\n",
4543 REGNO_FIRST_UID (bl->regno),
4544 REGNO_LAST_UID (bl->regno));
4550 /* Reduce each giv of BL that we have decided to reduce. */
4553 loop_givs_reduce (loop, bl)
4555 struct iv_class *bl;
4557 struct induction *v;
4559 for (v = bl->giv; v; v = v->next_iv)
4561 struct induction *tv;
4562 if (! v->ignore && v->same == 0)
4564 int auto_inc_opt = 0;
4566 /* If the code for derived givs immediately below has already
4567 allocated a new_reg, we must keep it. */
4569 v->new_reg = gen_reg_rtx (v->mode);
4572 /* If the target has auto-increment addressing modes, and
4573 this is an address giv, then try to put the increment
4574 immediately after its use, so that flow can create an
4575 auto-increment addressing mode. */
4576 if (v->giv_type == DEST_ADDR && bl->biv_count == 1
4577 && bl->biv->always_executed && ! bl->biv->maybe_multiple
4578 /* We don't handle reversed biv's because bl->biv->insn
4579 does not have a valid INSN_LUID. */
4581 && v->always_executed && ! v->maybe_multiple
4582 && INSN_UID (v->insn) < max_uid_for_loop)
4584 /* If other giv's have been combined with this one, then
4585 this will work only if all uses of the other giv's occur
4586 before this giv's insn. This is difficult to check.
4588 We simplify this by looking for the common case where
4589 there is one DEST_REG giv, and this giv's insn is the
4590 last use of the dest_reg of that DEST_REG giv. If the
4591 increment occurs after the address giv, then we can
4592 perform the optimization. (Otherwise, the increment
4593 would have to go before other_giv, and we would not be
4594 able to combine it with the address giv to get an
4595 auto-inc address.) */
4596 if (v->combined_with)
4598 struct induction *other_giv = 0;
4600 for (tv = bl->giv; tv; tv = tv->next_iv)
4608 if (! tv && other_giv
4609 && REGNO (other_giv->dest_reg) < max_reg_before_loop
4610 && (REGNO_LAST_UID (REGNO (other_giv->dest_reg))
4611 == INSN_UID (v->insn))
4612 && INSN_LUID (v->insn) < INSN_LUID (bl->biv->insn))
4615 /* Check for case where increment is before the address
4616 giv. Do this test in "loop order". */
4617 else if ((INSN_LUID (v->insn) > INSN_LUID (bl->biv->insn)
4618 && (INSN_LUID (v->insn) < INSN_LUID (loop->scan_start)
4619 || (INSN_LUID (bl->biv->insn)
4620 > INSN_LUID (loop->scan_start))))
4621 || (INSN_LUID (v->insn) < INSN_LUID (loop->scan_start)
4622 && (INSN_LUID (loop->scan_start)
4623 < INSN_LUID (bl->biv->insn))))
4632 /* We can't put an insn immediately after one setting
4633 cc0, or immediately before one using cc0. */
4634 if ((auto_inc_opt == 1 && sets_cc0_p (PATTERN (v->insn)))
4635 || (auto_inc_opt == -1
4636 && (prev = prev_nonnote_insn (v->insn)) != 0
4638 && sets_cc0_p (PATTERN (prev))))
4644 v->auto_inc_opt = 1;
4648 /* For each place where the biv is incremented, add an insn
4649 to increment the new, reduced reg for the giv. */
4650 for (tv = bl->biv; tv; tv = tv->next_iv)
4655 insert_before = tv->insn;
4656 else if (auto_inc_opt == 1)
4657 insert_before = NEXT_INSN (v->insn);
4659 insert_before = v->insn;
4661 if (tv->mult_val == const1_rtx)
4662 loop_iv_add_mult_emit_before (loop, tv->add_val, v->mult_val,
4663 v->new_reg, v->new_reg,
4665 else /* tv->mult_val == const0_rtx */
4666 /* A multiply is acceptable here
4667 since this is presumed to be seldom executed. */
4668 loop_iv_add_mult_emit_before (loop, tv->add_val, v->mult_val,
4669 v->add_val, v->new_reg,
4673 /* Add code at loop start to initialize giv's reduced reg. */
4675 loop_iv_add_mult_hoist (loop,
4676 extend_value_for_giv (v, bl->initial_value),
4677 v->mult_val, v->add_val, v->new_reg);
4683 /* Check for givs whose first use is their definition and whose
4684 last use is the definition of another giv. If so, it is likely
4685 dead and should not be used to derive another giv nor to
4689 loop_givs_dead_check (loop, bl)
4690 struct loop *loop ATTRIBUTE_UNUSED;
4691 struct iv_class *bl;
4693 struct induction *v;
4695 for (v = bl->giv; v; v = v->next_iv)
4698 || (v->same && v->same->ignore))
4701 if (v->giv_type == DEST_REG
4702 && REGNO_FIRST_UID (REGNO (v->dest_reg)) == INSN_UID (v->insn))
4704 struct induction *v1;
4706 for (v1 = bl->giv; v1; v1 = v1->next_iv)
4707 if (REGNO_LAST_UID (REGNO (v->dest_reg)) == INSN_UID (v1->insn))
4715 loop_givs_rescan (loop, bl, reg_map)
4717 struct iv_class *bl;
4720 struct induction *v;
4722 for (v = bl->giv; v; v = v->next_iv)
4724 if (v->same && v->same->ignore)
4730 /* Update expression if this was combined, in case other giv was
4733 v->new_reg = replace_rtx (v->new_reg,
4734 v->same->dest_reg, v->same->new_reg);
4736 /* See if this register is known to be a pointer to something. If
4737 so, see if we can find the alignment. First see if there is a
4738 destination register that is a pointer. If so, this shares the
4739 alignment too. Next see if we can deduce anything from the
4740 computational information. If not, and this is a DEST_ADDR
4741 giv, at least we know that it's a pointer, though we don't know
4743 if (GET_CODE (v->new_reg) == REG
4744 && v->giv_type == DEST_REG
4745 && REG_POINTER (v->dest_reg))
4746 mark_reg_pointer (v->new_reg,
4747 REGNO_POINTER_ALIGN (REGNO (v->dest_reg)));
4748 else if (GET_CODE (v->new_reg) == REG
4749 && REG_POINTER (v->src_reg))
4751 unsigned int align = REGNO_POINTER_ALIGN (REGNO (v->src_reg));
4754 || GET_CODE (v->add_val) != CONST_INT
4755 || INTVAL (v->add_val) % (align / BITS_PER_UNIT) != 0)
4758 mark_reg_pointer (v->new_reg, align);
4760 else if (GET_CODE (v->new_reg) == REG
4761 && GET_CODE (v->add_val) == REG
4762 && REG_POINTER (v->add_val))
4764 unsigned int align = REGNO_POINTER_ALIGN (REGNO (v->add_val));
4766 if (align == 0 || GET_CODE (v->mult_val) != CONST_INT
4767 || INTVAL (v->mult_val) % (align / BITS_PER_UNIT) != 0)
4770 mark_reg_pointer (v->new_reg, align);
4772 else if (GET_CODE (v->new_reg) == REG && v->giv_type == DEST_ADDR)
4773 mark_reg_pointer (v->new_reg, 0);
4775 if (v->giv_type == DEST_ADDR)
4776 /* Store reduced reg as the address in the memref where we found
4778 validate_change (v->insn, v->location, v->new_reg, 0);
4779 else if (v->replaceable)
4781 reg_map[REGNO (v->dest_reg)] = v->new_reg;
4785 /* Not replaceable; emit an insn to set the original giv reg from
4786 the reduced giv, same as above. */
4787 loop_insn_emit_after (loop, 0, v->insn,
4788 gen_move_insn (v->dest_reg, v->new_reg));
4791 /* When a loop is reversed, givs which depend on the reversed
4792 biv, and which are live outside the loop, must be set to their
4793 correct final value. This insn is only needed if the giv is
4794 not replaceable. The correct final value is the same as the
4795 value that the giv starts the reversed loop with. */
4796 if (bl->reversed && ! v->replaceable)
4797 loop_iv_add_mult_sink (loop,
4798 extend_value_for_giv (v, bl->initial_value),
4799 v->mult_val, v->add_val, v->dest_reg);
4800 else if (v->final_value)
4801 loop_insn_sink_or_swim (loop,
4802 gen_move_insn (v->dest_reg, v->final_value));
4804 if (loop_dump_stream)
4806 fprintf (loop_dump_stream, "giv at %d reduced to ",
4807 INSN_UID (v->insn));
4808 print_simple_rtl (loop_dump_stream, v->new_reg);
4809 fprintf (loop_dump_stream, "\n");
4816 loop_giv_reduce_benefit (loop, bl, v, test_reg)
4817 struct loop *loop ATTRIBUTE_UNUSED;
4818 struct iv_class *bl;
4819 struct induction *v;
4825 benefit = v->benefit;
4826 PUT_MODE (test_reg, v->mode);
4827 add_cost = iv_add_mult_cost (bl->biv->add_val, v->mult_val,
4828 test_reg, test_reg);
4830 /* Reduce benefit if not replaceable, since we will insert a
4831 move-insn to replace the insn that calculates this giv. Don't do
4832 this unless the giv is a user variable, since it will often be
4833 marked non-replaceable because of the duplication of the exit
4834 code outside the loop. In such a case, the copies we insert are
4835 dead and will be deleted. So they don't have a cost. Similar
4836 situations exist. */
4837 /* ??? The new final_[bg]iv_value code does a much better job of
4838 finding replaceable giv's, and hence this code may no longer be
4840 if (! v->replaceable && ! bl->eliminable
4841 && REG_USERVAR_P (v->dest_reg))
4842 benefit -= copy_cost;
4844 /* Decrease the benefit to count the add-insns that we will insert
4845 to increment the reduced reg for the giv. ??? This can
4846 overestimate the run-time cost of the additional insns, e.g. if
4847 there are multiple basic blocks that increment the biv, but only
4848 one of these blocks is executed during each iteration. There is
4849 no good way to detect cases like this with the current structure
4850 of the loop optimizer. This code is more accurate for
4851 determining code size than run-time benefits. */
4852 benefit -= add_cost * bl->biv_count;
4854 /* Decide whether to strength-reduce this giv or to leave the code
4855 unchanged (recompute it from the biv each time it is used). This
4856 decision can be made independently for each giv. */
4859 /* Attempt to guess whether autoincrement will handle some of the
4860 new add insns; if so, increase BENEFIT (undo the subtraction of
4861 add_cost that was done above). */
4862 if (v->giv_type == DEST_ADDR
4863 /* Increasing the benefit is risky, since this is only a guess.
4864 Avoid increasing register pressure in cases where there would
4865 be no other benefit from reducing this giv. */
4867 && GET_CODE (v->mult_val) == CONST_INT)
4869 int size = GET_MODE_SIZE (GET_MODE (v->mem));
4871 if (HAVE_POST_INCREMENT
4872 && INTVAL (v->mult_val) == size)
4873 benefit += add_cost * bl->biv_count;
4874 else if (HAVE_PRE_INCREMENT
4875 && INTVAL (v->mult_val) == size)
4876 benefit += add_cost * bl->biv_count;
4877 else if (HAVE_POST_DECREMENT
4878 && -INTVAL (v->mult_val) == size)
4879 benefit += add_cost * bl->biv_count;
4880 else if (HAVE_PRE_DECREMENT
4881 && -INTVAL (v->mult_val) == size)
4882 benefit += add_cost * bl->biv_count;
4890 /* Free IV structures for LOOP. */
4893 loop_ivs_free (loop)
4896 struct loop_ivs *ivs = LOOP_IVS (loop);
4897 struct iv_class *iv = ivs->list;
4903 struct iv_class *next = iv->next;
4904 struct induction *induction;
4905 struct induction *next_induction;
4907 for (induction = iv->biv; induction; induction = next_induction)
4909 next_induction = induction->next_iv;
4912 for (induction = iv->giv; induction; induction = next_induction)
4914 next_induction = induction->next_iv;
4924 /* Perform strength reduction and induction variable elimination.
4926 Pseudo registers created during this function will be beyond the
4927 last valid index in several tables including
4928 REGS->ARRAY[I].N_TIMES_SET and REGNO_LAST_UID. This does not cause a
4929 problem here, because the added registers cannot be givs outside of
4930 their loop, and hence will never be reconsidered. But scan_loop
4931 must check regnos to make sure they are in bounds. */
4934 strength_reduce (loop, flags)
4938 struct loop_info *loop_info = LOOP_INFO (loop);
4939 struct loop_regs *regs = LOOP_REGS (loop);
4940 struct loop_ivs *ivs = LOOP_IVS (loop);
4942 /* Temporary list pointer for traversing ivs->list. */
4943 struct iv_class *bl;
4944 /* Ratio of extra register life span we can justify
4945 for saving an instruction. More if loop doesn't call subroutines
4946 since in that case saving an insn makes more difference
4947 and more registers are available. */
4948 /* ??? could set this to last value of threshold in move_movables */
4949 int threshold = (loop_info->has_call ? 1 : 2) * (3 + n_non_fixed_regs);
4950 /* Map of pseudo-register replacements. */
4951 rtx *reg_map = NULL;
4953 int unrolled_insn_copies = 0;
4954 rtx test_reg = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 1);
4955 int insn_count = count_insns_in_loop (loop);
4957 addr_placeholder = gen_reg_rtx (Pmode);
4959 ivs->n_regs = max_reg_before_loop;
4960 ivs->regs = (struct iv *) xcalloc (ivs->n_regs, sizeof (struct iv));
4962 /* Find all BIVs in loop. */
4963 loop_bivs_find (loop);
4965 /* Exit if there are no bivs. */
4968 /* Can still unroll the loop anyways, but indicate that there is no
4969 strength reduction info available. */
4970 if (flags & LOOP_UNROLL)
4971 unroll_loop (loop, insn_count, 0);
4973 loop_ivs_free (loop);
4977 /* Determine how BIVS are initialised by looking through pre-header
4978 extended basic block. */
4979 loop_bivs_init_find (loop);
4981 /* Look at the each biv and see if we can say anything better about its
4982 initial value from any initializing insns set up above. */
4983 loop_bivs_check (loop);
4985 /* Search the loop for general induction variables. */
4986 loop_givs_find (loop);
4988 /* Try to calculate and save the number of loop iterations. This is
4989 set to zero if the actual number can not be calculated. This must
4990 be called after all giv's have been identified, since otherwise it may
4991 fail if the iteration variable is a giv. */
4992 loop_iterations (loop);
4994 #ifdef HAVE_prefetch
4995 if (flags & LOOP_PREFETCH)
4996 emit_prefetch_instructions (loop);
4999 /* Now for each giv for which we still don't know whether or not it is
5000 replaceable, check to see if it is replaceable because its final value
5001 can be calculated. This must be done after loop_iterations is called,
5002 so that final_giv_value will work correctly. */
5003 loop_givs_check (loop);
5005 /* Try to prove that the loop counter variable (if any) is always
5006 nonnegative; if so, record that fact with a REG_NONNEG note
5007 so that "decrement and branch until zero" insn can be used. */
5008 check_dbra_loop (loop, insn_count);
5010 /* Create reg_map to hold substitutions for replaceable giv regs.
5011 Some givs might have been made from biv increments, so look at
5012 ivs->reg_iv_type for a suitable size. */
5013 reg_map_size = ivs->n_regs;
5014 reg_map = (rtx *) xcalloc (reg_map_size, sizeof (rtx));
5016 /* Examine each iv class for feasibility of strength reduction/induction
5017 variable elimination. */
5019 for (bl = ivs->list; bl; bl = bl->next)
5021 struct induction *v;
5024 /* Test whether it will be possible to eliminate this biv
5025 provided all givs are reduced. */
5026 bl->eliminable = loop_biv_eliminable_p (loop, bl, threshold, insn_count);
5028 /* This will be true at the end, if all givs which depend on this
5029 biv have been strength reduced.
5030 We can't (currently) eliminate the biv unless this is so. */
5031 bl->all_reduced = 1;
5033 /* Check each extension dependent giv in this class to see if its
5034 root biv is safe from wrapping in the interior mode. */
5035 check_ext_dependent_givs (bl, loop_info);
5037 /* Combine all giv's for this iv_class. */
5038 combine_givs (regs, bl);
5040 for (v = bl->giv; v; v = v->next_iv)
5042 struct induction *tv;
5044 if (v->ignore || v->same)
5047 benefit = loop_giv_reduce_benefit (loop, bl, v, test_reg);
5049 /* If an insn is not to be strength reduced, then set its ignore
5050 flag, and clear bl->all_reduced. */
5052 /* A giv that depends on a reversed biv must be reduced if it is
5053 used after the loop exit, otherwise, it would have the wrong
5054 value after the loop exit. To make it simple, just reduce all
5055 of such giv's whether or not we know they are used after the loop
5058 if (! flag_reduce_all_givs
5059 && v->lifetime * threshold * benefit < insn_count
5062 if (loop_dump_stream)
5063 fprintf (loop_dump_stream,
5064 "giv of insn %d not worth while, %d vs %d.\n",
5066 v->lifetime * threshold * benefit, insn_count);
5068 bl->all_reduced = 0;
5072 /* Check that we can increment the reduced giv without a
5073 multiply insn. If not, reject it. */
5075 for (tv = bl->biv; tv; tv = tv->next_iv)
5076 if (tv->mult_val == const1_rtx
5077 && ! product_cheap_p (tv->add_val, v->mult_val))
5079 if (loop_dump_stream)
5080 fprintf (loop_dump_stream,
5081 "giv of insn %d: would need a multiply.\n",
5082 INSN_UID (v->insn));
5084 bl->all_reduced = 0;
5090 /* Check for givs whose first use is their definition and whose
5091 last use is the definition of another giv. If so, it is likely
5092 dead and should not be used to derive another giv nor to
5094 loop_givs_dead_check (loop, bl);
5096 /* Reduce each giv that we decided to reduce. */
5097 loop_givs_reduce (loop, bl);
5099 /* Rescan all givs. If a giv is the same as a giv not reduced, mark it
5102 For each giv register that can be reduced now: if replaceable,
5103 substitute reduced reg wherever the old giv occurs;
5104 else add new move insn "giv_reg = reduced_reg". */
5105 loop_givs_rescan (loop, bl, reg_map);
5107 /* All the givs based on the biv bl have been reduced if they
5110 /* For each giv not marked as maybe dead that has been combined with a
5111 second giv, clear any "maybe dead" mark on that second giv.
5112 v->new_reg will either be or refer to the register of the giv it
5115 Doing this clearing avoids problems in biv elimination where
5116 a giv's new_reg is a complex value that can't be put in the
5117 insn but the giv combined with (with a reg as new_reg) is
5118 marked maybe_dead. Since the register will be used in either
5119 case, we'd prefer it be used from the simpler giv. */
5121 for (v = bl->giv; v; v = v->next_iv)
5122 if (! v->maybe_dead && v->same)
5123 v->same->maybe_dead = 0;
5125 /* Try to eliminate the biv, if it is a candidate.
5126 This won't work if ! bl->all_reduced,
5127 since the givs we planned to use might not have been reduced.
5129 We have to be careful that we didn't initially think we could
5130 eliminate this biv because of a giv that we now think may be
5131 dead and shouldn't be used as a biv replacement.
5133 Also, there is the possibility that we may have a giv that looks
5134 like it can be used to eliminate a biv, but the resulting insn
5135 isn't valid. This can happen, for example, on the 88k, where a
5136 JUMP_INSN can compare a register only with zero. Attempts to
5137 replace it with a compare with a constant will fail.
5139 Note that in cases where this call fails, we may have replaced some
5140 of the occurrences of the biv with a giv, but no harm was done in
5141 doing so in the rare cases where it can occur. */
5143 if (bl->all_reduced == 1 && bl->eliminable
5144 && maybe_eliminate_biv (loop, bl, 1, threshold, insn_count))
5146 /* ?? If we created a new test to bypass the loop entirely,
5147 or otherwise drop straight in, based on this test, then
5148 we might want to rewrite it also. This way some later
5149 pass has more hope of removing the initialization of this
5152 /* If final_value != 0, then the biv may be used after loop end
5153 and we must emit an insn to set it just in case.
5155 Reversed bivs already have an insn after the loop setting their
5156 value, so we don't need another one. We can't calculate the
5157 proper final value for such a biv here anyways. */
5158 if (bl->final_value && ! bl->reversed)
5159 loop_insn_sink_or_swim (loop, gen_move_insn
5160 (bl->biv->dest_reg, bl->final_value));
5162 if (loop_dump_stream)
5163 fprintf (loop_dump_stream, "Reg %d: biv eliminated\n",
5166 /* See above note wrt final_value. But since we couldn't eliminate
5167 the biv, we must set the value after the loop instead of before. */
5168 else if (bl->final_value && ! bl->reversed)
5169 loop_insn_sink (loop, gen_move_insn (bl->biv->dest_reg,
5173 /* Go through all the instructions in the loop, making all the
5174 register substitutions scheduled in REG_MAP. */
5176 for (p = loop->start; p != loop->end; p = NEXT_INSN (p))
5177 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
5178 || GET_CODE (p) == CALL_INSN)
5180 replace_regs (PATTERN (p), reg_map, reg_map_size, 0);
5181 replace_regs (REG_NOTES (p), reg_map, reg_map_size, 0);
5185 if (loop_info->n_iterations > 0)
5187 /* When we completely unroll a loop we will likely not need the increment
5188 of the loop BIV and we will not need the conditional branch at the
5190 unrolled_insn_copies = insn_count - 2;
5193 /* When we completely unroll a loop on a HAVE_cc0 machine we will not
5194 need the comparison before the conditional branch at the end of the
5196 unrolled_insn_copies -= 1;
5199 /* We'll need one copy for each loop iteration. */
5200 unrolled_insn_copies *= loop_info->n_iterations;
5202 /* A little slop to account for the ability to remove initialization
5203 code, better CSE, and other secondary benefits of completely
5204 unrolling some loops. */
5205 unrolled_insn_copies -= 1;
5207 /* Clamp the value. */
5208 if (unrolled_insn_copies < 0)
5209 unrolled_insn_copies = 0;
5212 /* Unroll loops from within strength reduction so that we can use the
5213 induction variable information that strength_reduce has already
5214 collected. Always unroll loops that would be as small or smaller
5215 unrolled than when rolled. */
5216 if ((flags & LOOP_UNROLL)
5217 || (loop_info->n_iterations > 0
5218 && unrolled_insn_copies <= insn_count))
5219 unroll_loop (loop, insn_count, 1);
5221 #ifdef HAVE_doloop_end
5222 if (HAVE_doloop_end && (flags & LOOP_BCT) && flag_branch_on_count_reg)
5223 doloop_optimize (loop);
5224 #endif /* HAVE_doloop_end */
5226 /* In case number of iterations is known, drop branch prediction note
5227 in the branch. Do that only in second loop pass, as loop unrolling
5228 may change the number of iterations performed. */
5229 if (flags & LOOP_BCT)
5231 unsigned HOST_WIDE_INT n
5232 = loop_info->n_iterations / loop_info->unroll_number;
5234 predict_insn (PREV_INSN (loop->end), PRED_LOOP_ITERATIONS,
5235 REG_BR_PROB_BASE - REG_BR_PROB_BASE / n);
5238 if (loop_dump_stream)
5239 fprintf (loop_dump_stream, "\n");
5241 loop_ivs_free (loop);
5246 /*Record all basic induction variables calculated in the insn. */
5248 check_insn_for_bivs (loop, p, not_every_iteration, maybe_multiple)
5251 int not_every_iteration;
5254 struct loop_ivs *ivs = LOOP_IVS (loop);
5261 if (GET_CODE (p) == INSN
5262 && (set = single_set (p))
5263 && GET_CODE (SET_DEST (set)) == REG)
5265 dest_reg = SET_DEST (set);
5266 if (REGNO (dest_reg) < max_reg_before_loop
5267 && REGNO (dest_reg) >= FIRST_PSEUDO_REGISTER
5268 && REG_IV_TYPE (ivs, REGNO (dest_reg)) != NOT_BASIC_INDUCT)
5270 if (basic_induction_var (loop, SET_SRC (set),
5271 GET_MODE (SET_SRC (set)),
5272 dest_reg, p, &inc_val, &mult_val,
5275 /* It is a possible basic induction variable.
5276 Create and initialize an induction structure for it. */
5279 = (struct induction *) xmalloc (sizeof (struct induction));
5281 record_biv (loop, v, p, dest_reg, inc_val, mult_val, location,
5282 not_every_iteration, maybe_multiple);
5283 REG_IV_TYPE (ivs, REGNO (dest_reg)) = BASIC_INDUCT;
5285 else if (REGNO (dest_reg) < ivs->n_regs)
5286 REG_IV_TYPE (ivs, REGNO (dest_reg)) = NOT_BASIC_INDUCT;
5292 /* Record all givs calculated in the insn.
5293 A register is a giv if: it is only set once, it is a function of a
5294 biv and a constant (or invariant), and it is not a biv. */
5296 check_insn_for_givs (loop, p, not_every_iteration, maybe_multiple)
5299 int not_every_iteration;
5302 struct loop_regs *regs = LOOP_REGS (loop);
5305 /* Look for a general induction variable in a register. */
5306 if (GET_CODE (p) == INSN
5307 && (set = single_set (p))
5308 && GET_CODE (SET_DEST (set)) == REG
5309 && ! regs->array[REGNO (SET_DEST (set))].may_not_optimize)
5318 rtx last_consec_insn;
5320 dest_reg = SET_DEST (set);
5321 if (REGNO (dest_reg) < FIRST_PSEUDO_REGISTER)
5324 if (/* SET_SRC is a giv. */
5325 (general_induction_var (loop, SET_SRC (set), &src_reg, &add_val,
5326 &mult_val, &ext_val, 0, &benefit, VOIDmode)
5327 /* Equivalent expression is a giv. */
5328 || ((regnote = find_reg_note (p, REG_EQUAL, NULL_RTX))
5329 && general_induction_var (loop, XEXP (regnote, 0), &src_reg,
5330 &add_val, &mult_val, &ext_val, 0,
5331 &benefit, VOIDmode)))
5332 /* Don't try to handle any regs made by loop optimization.
5333 We have nothing on them in regno_first_uid, etc. */
5334 && REGNO (dest_reg) < max_reg_before_loop
5335 /* Don't recognize a BASIC_INDUCT_VAR here. */
5336 && dest_reg != src_reg
5337 /* This must be the only place where the register is set. */
5338 && (regs->array[REGNO (dest_reg)].n_times_set == 1
5339 /* or all sets must be consecutive and make a giv. */
5340 || (benefit = consec_sets_giv (loop, benefit, p,
5342 &add_val, &mult_val, &ext_val,
5343 &last_consec_insn))))
5346 = (struct induction *) xmalloc (sizeof (struct induction));
5348 /* If this is a library call, increase benefit. */
5349 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
5350 benefit += libcall_benefit (p);
5352 /* Skip the consecutive insns, if there are any. */
5353 if (regs->array[REGNO (dest_reg)].n_times_set != 1)
5354 p = last_consec_insn;
5356 record_giv (loop, v, p, src_reg, dest_reg, mult_val, add_val,
5357 ext_val, benefit, DEST_REG, not_every_iteration,
5358 maybe_multiple, (rtx*) 0);
5363 #ifndef DONT_REDUCE_ADDR
5364 /* Look for givs which are memory addresses. */
5365 /* This resulted in worse code on a VAX 8600. I wonder if it
5367 if (GET_CODE (p) == INSN)
5368 find_mem_givs (loop, PATTERN (p), p, not_every_iteration,
5372 /* Update the status of whether giv can derive other givs. This can
5373 change when we pass a label or an insn that updates a biv. */
5374 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
5375 || GET_CODE (p) == CODE_LABEL)
5376 update_giv_derive (loop, p);
5380 /* Return 1 if X is a valid source for an initial value (or as value being
5381 compared against in an initial test).
5383 X must be either a register or constant and must not be clobbered between
5384 the current insn and the start of the loop.
5386 INSN is the insn containing X. */
5389 valid_initial_value_p (x, insn, call_seen, loop_start)
5398 /* Only consider pseudos we know about initialized in insns whose luids
5400 if (GET_CODE (x) != REG
5401 || REGNO (x) >= max_reg_before_loop)
5404 /* Don't use call-clobbered registers across a call which clobbers it. On
5405 some machines, don't use any hard registers at all. */
5406 if (REGNO (x) < FIRST_PSEUDO_REGISTER
5407 && (SMALL_REGISTER_CLASSES
5408 || (call_used_regs[REGNO (x)] && call_seen)))
5411 /* Don't use registers that have been clobbered before the start of the
5413 if (reg_set_between_p (x, insn, loop_start))
5419 /* Scan X for memory refs and check each memory address
5420 as a possible giv. INSN is the insn whose pattern X comes from.
5421 NOT_EVERY_ITERATION is 1 if the insn might not be executed during
5422 every loop iteration. MAYBE_MULTIPLE is 1 if the insn might be executed
5423 more thanonce in each loop iteration. */
5426 find_mem_givs (loop, x, insn, not_every_iteration, maybe_multiple)
5427 const struct loop *loop;
5430 int not_every_iteration, maybe_multiple;
5439 code = GET_CODE (x);
5464 /* This code used to disable creating GIVs with mult_val == 1 and
5465 add_val == 0. However, this leads to lost optimizations when
5466 it comes time to combine a set of related DEST_ADDR GIVs, since
5467 this one would not be seen. */
5469 if (general_induction_var (loop, XEXP (x, 0), &src_reg, &add_val,
5470 &mult_val, &ext_val, 1, &benefit,
5473 /* Found one; record it. */
5475 = (struct induction *) xmalloc (sizeof (struct induction));
5477 record_giv (loop, v, insn, src_reg, addr_placeholder, mult_val,
5478 add_val, ext_val, benefit, DEST_ADDR,
5479 not_every_iteration, maybe_multiple, &XEXP (x, 0));
5490 /* Recursively scan the subexpressions for other mem refs. */
5492 fmt = GET_RTX_FORMAT (code);
5493 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5495 find_mem_givs (loop, XEXP (x, i), insn, not_every_iteration,
5497 else if (fmt[i] == 'E')
5498 for (j = 0; j < XVECLEN (x, i); j++)
5499 find_mem_givs (loop, XVECEXP (x, i, j), insn, not_every_iteration,
5503 /* Fill in the data about one biv update.
5504 V is the `struct induction' in which we record the biv. (It is
5505 allocated by the caller, with alloca.)
5506 INSN is the insn that sets it.
5507 DEST_REG is the biv's reg.
5509 MULT_VAL is const1_rtx if the biv is being incremented here, in which case
5510 INC_VAL is the increment. Otherwise, MULT_VAL is const0_rtx and the biv is
5511 being set to INC_VAL.
5513 NOT_EVERY_ITERATION is nonzero if this biv update is not know to be
5514 executed every iteration; MAYBE_MULTIPLE is nonzero if this biv update
5515 can be executed more than once per iteration. If MAYBE_MULTIPLE
5516 and NOT_EVERY_ITERATION are both zero, we know that the biv update is
5517 executed exactly once per iteration. */
5520 record_biv (loop, v, insn, dest_reg, inc_val, mult_val, location,
5521 not_every_iteration, maybe_multiple)
5523 struct induction *v;
5529 int not_every_iteration;
5532 struct loop_ivs *ivs = LOOP_IVS (loop);
5533 struct iv_class *bl;
5536 v->src_reg = dest_reg;
5537 v->dest_reg = dest_reg;
5538 v->mult_val = mult_val;
5539 v->add_val = inc_val;
5540 v->ext_dependent = NULL_RTX;
5541 v->location = location;
5542 v->mode = GET_MODE (dest_reg);
5543 v->always_computable = ! not_every_iteration;
5544 v->always_executed = ! not_every_iteration;
5545 v->maybe_multiple = maybe_multiple;
5547 /* Add this to the reg's iv_class, creating a class
5548 if this is the first incrementation of the reg. */
5550 bl = REG_IV_CLASS (ivs, REGNO (dest_reg));
5553 /* Create and initialize new iv_class. */
5555 bl = (struct iv_class *) xmalloc (sizeof (struct iv_class));
5557 bl->regno = REGNO (dest_reg);
5563 /* Set initial value to the reg itself. */
5564 bl->initial_value = dest_reg;
5565 bl->final_value = 0;
5566 /* We haven't seen the initializing insn yet */
5569 bl->initial_test = 0;
5570 bl->incremented = 0;
5574 bl->total_benefit = 0;
5576 /* Add this class to ivs->list. */
5577 bl->next = ivs->list;
5580 /* Put it in the array of biv register classes. */
5581 REG_IV_CLASS (ivs, REGNO (dest_reg)) = bl;
5584 /* Update IV_CLASS entry for this biv. */
5585 v->next_iv = bl->biv;
5588 if (mult_val == const1_rtx)
5589 bl->incremented = 1;
5591 if (loop_dump_stream)
5592 loop_biv_dump (v, loop_dump_stream, 0);
5595 /* Fill in the data about one giv.
5596 V is the `struct induction' in which we record the giv. (It is
5597 allocated by the caller, with alloca.)
5598 INSN is the insn that sets it.
5599 BENEFIT estimates the savings from deleting this insn.
5600 TYPE is DEST_REG or DEST_ADDR; it says whether the giv is computed
5601 into a register or is used as a memory address.
5603 SRC_REG is the biv reg which the giv is computed from.
5604 DEST_REG is the giv's reg (if the giv is stored in a reg).
5605 MULT_VAL and ADD_VAL are the coefficients used to compute the giv.
5606 LOCATION points to the place where this giv's value appears in INSN. */
5609 record_giv (loop, v, insn, src_reg, dest_reg, mult_val, add_val, ext_val,
5610 benefit, type, not_every_iteration, maybe_multiple, location)
5611 const struct loop *loop;
5612 struct induction *v;
5616 rtx mult_val, add_val, ext_val;
5619 int not_every_iteration, maybe_multiple;
5622 struct loop_ivs *ivs = LOOP_IVS (loop);
5623 struct induction *b;
5624 struct iv_class *bl;
5625 rtx set = single_set (insn);
5628 /* Attempt to prove constantness of the values. Don't let simplity_rtx
5629 undo the MULT canonicalization that we performed earlier. */
5630 temp = simplify_rtx (add_val);
5632 && ! (GET_CODE (add_val) == MULT
5633 && GET_CODE (temp) == ASHIFT))
5637 v->src_reg = src_reg;
5639 v->dest_reg = dest_reg;
5640 v->mult_val = mult_val;
5641 v->add_val = add_val;
5642 v->ext_dependent = ext_val;
5643 v->benefit = benefit;
5644 v->location = location;
5646 v->combined_with = 0;
5647 v->maybe_multiple = maybe_multiple;
5649 v->derive_adjustment = 0;
5655 v->auto_inc_opt = 0;
5659 /* The v->always_computable field is used in update_giv_derive, to
5660 determine whether a giv can be used to derive another giv. For a
5661 DEST_REG giv, INSN computes a new value for the giv, so its value
5662 isn't computable if INSN insn't executed every iteration.
5663 However, for a DEST_ADDR giv, INSN merely uses the value of the giv;
5664 it does not compute a new value. Hence the value is always computable
5665 regardless of whether INSN is executed each iteration. */
5667 if (type == DEST_ADDR)
5668 v->always_computable = 1;
5670 v->always_computable = ! not_every_iteration;
5672 v->always_executed = ! not_every_iteration;
5674 if (type == DEST_ADDR)
5676 v->mode = GET_MODE (*location);
5679 else /* type == DEST_REG */
5681 v->mode = GET_MODE (SET_DEST (set));
5683 v->lifetime = LOOP_REG_LIFETIME (loop, REGNO (dest_reg));
5685 /* If the lifetime is zero, it means that this register is
5686 really a dead store. So mark this as a giv that can be
5687 ignored. This will not prevent the biv from being eliminated. */
5688 if (v->lifetime == 0)
5691 REG_IV_TYPE (ivs, REGNO (dest_reg)) = GENERAL_INDUCT;
5692 REG_IV_INFO (ivs, REGNO (dest_reg)) = v;
5695 /* Add the giv to the class of givs computed from one biv. */
5697 bl = REG_IV_CLASS (ivs, REGNO (src_reg));
5700 v->next_iv = bl->giv;
5702 /* Don't count DEST_ADDR. This is supposed to count the number of
5703 insns that calculate givs. */
5704 if (type == DEST_REG)
5706 bl->total_benefit += benefit;
5709 /* Fatal error, biv missing for this giv? */
5712 if (type == DEST_ADDR)
5716 /* The giv can be replaced outright by the reduced register only if all
5717 of the following conditions are true:
5718 - the insn that sets the giv is always executed on any iteration
5719 on which the giv is used at all
5720 (there are two ways to deduce this:
5721 either the insn is executed on every iteration,
5722 or all uses follow that insn in the same basic block),
5723 - the giv is not used outside the loop
5724 - no assignments to the biv occur during the giv's lifetime. */
5726 if (REGNO_FIRST_UID (REGNO (dest_reg)) == INSN_UID (insn)
5727 /* Previous line always fails if INSN was moved by loop opt. */
5728 && REGNO_LAST_LUID (REGNO (dest_reg))
5729 < INSN_LUID (loop->end)
5730 && (! not_every_iteration
5731 || last_use_this_basic_block (dest_reg, insn)))
5733 /* Now check that there are no assignments to the biv within the
5734 giv's lifetime. This requires two separate checks. */
5736 /* Check each biv update, and fail if any are between the first
5737 and last use of the giv.
5739 If this loop contains an inner loop that was unrolled, then
5740 the insn modifying the biv may have been emitted by the loop
5741 unrolling code, and hence does not have a valid luid. Just
5742 mark the biv as not replaceable in this case. It is not very
5743 useful as a biv, because it is used in two different loops.
5744 It is very unlikely that we would be able to optimize the giv
5745 using this biv anyways. */
5748 for (b = bl->biv; b; b = b->next_iv)
5750 if (INSN_UID (b->insn) >= max_uid_for_loop
5751 || ((INSN_LUID (b->insn)
5752 >= REGNO_FIRST_LUID (REGNO (dest_reg)))
5753 && (INSN_LUID (b->insn)
5754 <= REGNO_LAST_LUID (REGNO (dest_reg)))))
5757 v->not_replaceable = 1;
5762 /* If there are any backwards branches that go from after the
5763 biv update to before it, then this giv is not replaceable. */
5765 for (b = bl->biv; b; b = b->next_iv)
5766 if (back_branch_in_range_p (loop, b->insn))
5769 v->not_replaceable = 1;
5775 /* May still be replaceable, we don't have enough info here to
5778 v->not_replaceable = 0;
5782 /* Record whether the add_val contains a const_int, for later use by
5787 v->no_const_addval = 1;
5788 if (tem == const0_rtx)
5790 else if (CONSTANT_P (add_val))
5791 v->no_const_addval = 0;
5792 if (GET_CODE (tem) == PLUS)
5796 if (GET_CODE (XEXP (tem, 0)) == PLUS)
5797 tem = XEXP (tem, 0);
5798 else if (GET_CODE (XEXP (tem, 1)) == PLUS)
5799 tem = XEXP (tem, 1);
5803 if (CONSTANT_P (XEXP (tem, 1)))
5804 v->no_const_addval = 0;
5808 if (loop_dump_stream)
5809 loop_giv_dump (v, loop_dump_stream, 0);
5812 /* All this does is determine whether a giv can be made replaceable because
5813 its final value can be calculated. This code can not be part of record_giv
5814 above, because final_giv_value requires that the number of loop iterations
5815 be known, and that can not be accurately calculated until after all givs
5816 have been identified. */
5819 check_final_value (loop, v)
5820 const struct loop *loop;
5821 struct induction *v;
5823 struct loop_ivs *ivs = LOOP_IVS (loop);
5824 struct iv_class *bl;
5825 rtx final_value = 0;
5827 bl = REG_IV_CLASS (ivs, REGNO (v->src_reg));
5829 /* DEST_ADDR givs will never reach here, because they are always marked
5830 replaceable above in record_giv. */
5832 /* The giv can be replaced outright by the reduced register only if all
5833 of the following conditions are true:
5834 - the insn that sets the giv is always executed on any iteration
5835 on which the giv is used at all
5836 (there are two ways to deduce this:
5837 either the insn is executed on every iteration,
5838 or all uses follow that insn in the same basic block),
5839 - its final value can be calculated (this condition is different
5840 than the one above in record_giv)
5841 - it's not used before the it's set
5842 - no assignments to the biv occur during the giv's lifetime. */
5845 /* This is only called now when replaceable is known to be false. */
5846 /* Clear replaceable, so that it won't confuse final_giv_value. */
5850 if ((final_value = final_giv_value (loop, v))
5851 && (v->always_computable || last_use_this_basic_block (v->dest_reg, v->insn)))
5853 int biv_increment_seen = 0, before_giv_insn = 0;
5859 /* When trying to determine whether or not a biv increment occurs
5860 during the lifetime of the giv, we can ignore uses of the variable
5861 outside the loop because final_value is true. Hence we can not
5862 use regno_last_uid and regno_first_uid as above in record_giv. */
5864 /* Search the loop to determine whether any assignments to the
5865 biv occur during the giv's lifetime. Start with the insn
5866 that sets the giv, and search around the loop until we come
5867 back to that insn again.
5869 Also fail if there is a jump within the giv's lifetime that jumps
5870 to somewhere outside the lifetime but still within the loop. This
5871 catches spaghetti code where the execution order is not linear, and
5872 hence the above test fails. Here we assume that the giv lifetime
5873 does not extend from one iteration of the loop to the next, so as
5874 to make the test easier. Since the lifetime isn't known yet,
5875 this requires two loops. See also record_giv above. */
5877 last_giv_use = v->insn;
5884 before_giv_insn = 1;
5885 p = NEXT_INSN (loop->start);
5890 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
5891 || GET_CODE (p) == CALL_INSN)
5893 /* It is possible for the BIV increment to use the GIV if we
5894 have a cycle. Thus we must be sure to check each insn for
5895 both BIV and GIV uses, and we must check for BIV uses
5898 if (! biv_increment_seen
5899 && reg_set_p (v->src_reg, PATTERN (p)))
5900 biv_increment_seen = 1;
5902 if (reg_mentioned_p (v->dest_reg, PATTERN (p)))
5904 if (biv_increment_seen || before_giv_insn)
5907 v->not_replaceable = 1;
5915 /* Now that the lifetime of the giv is known, check for branches
5916 from within the lifetime to outside the lifetime if it is still
5926 p = NEXT_INSN (loop->start);
5927 if (p == last_giv_use)
5930 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p)
5931 && LABEL_NAME (JUMP_LABEL (p))
5932 && ((loop_insn_first_p (JUMP_LABEL (p), v->insn)
5933 && loop_insn_first_p (loop->start, JUMP_LABEL (p)))
5934 || (loop_insn_first_p (last_giv_use, JUMP_LABEL (p))
5935 && loop_insn_first_p (JUMP_LABEL (p), loop->end))))
5938 v->not_replaceable = 1;
5940 if (loop_dump_stream)
5941 fprintf (loop_dump_stream,
5942 "Found branch outside giv lifetime.\n");
5949 /* If it is replaceable, then save the final value. */
5951 v->final_value = final_value;
5954 if (loop_dump_stream && v->replaceable)
5955 fprintf (loop_dump_stream, "Insn %d: giv reg %d final_value replaceable\n",
5956 INSN_UID (v->insn), REGNO (v->dest_reg));
5959 /* Update the status of whether a giv can derive other givs.
5961 We need to do something special if there is or may be an update to the biv
5962 between the time the giv is defined and the time it is used to derive
5965 In addition, a giv that is only conditionally set is not allowed to
5966 derive another giv once a label has been passed.
5968 The cases we look at are when a label or an update to a biv is passed. */
5971 update_giv_derive (loop, p)
5972 const struct loop *loop;
5975 struct loop_ivs *ivs = LOOP_IVS (loop);
5976 struct iv_class *bl;
5977 struct induction *biv, *giv;
5981 /* Search all IV classes, then all bivs, and finally all givs.
5983 There are three cases we are concerned with. First we have the situation
5984 of a giv that is only updated conditionally. In that case, it may not
5985 derive any givs after a label is passed.
5987 The second case is when a biv update occurs, or may occur, after the
5988 definition of a giv. For certain biv updates (see below) that are
5989 known to occur between the giv definition and use, we can adjust the
5990 giv definition. For others, or when the biv update is conditional,
5991 we must prevent the giv from deriving any other givs. There are two
5992 sub-cases within this case.
5994 If this is a label, we are concerned with any biv update that is done
5995 conditionally, since it may be done after the giv is defined followed by
5996 a branch here (actually, we need to pass both a jump and a label, but
5997 this extra tracking doesn't seem worth it).
5999 If this is a jump, we are concerned about any biv update that may be
6000 executed multiple times. We are actually only concerned about
6001 backward jumps, but it is probably not worth performing the test
6002 on the jump again here.
6004 If this is a biv update, we must adjust the giv status to show that a
6005 subsequent biv update was performed. If this adjustment cannot be done,
6006 the giv cannot derive further givs. */
6008 for (bl = ivs->list; bl; bl = bl->next)
6009 for (biv = bl->biv; biv; biv = biv->next_iv)
6010 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN
6013 for (giv = bl->giv; giv; giv = giv->next_iv)
6015 /* If cant_derive is already true, there is no point in
6016 checking all of these conditions again. */
6017 if (giv->cant_derive)
6020 /* If this giv is conditionally set and we have passed a label,
6021 it cannot derive anything. */
6022 if (GET_CODE (p) == CODE_LABEL && ! giv->always_computable)
6023 giv->cant_derive = 1;
6025 /* Skip givs that have mult_val == 0, since
6026 they are really invariants. Also skip those that are
6027 replaceable, since we know their lifetime doesn't contain
6029 else if (giv->mult_val == const0_rtx || giv->replaceable)
6032 /* The only way we can allow this giv to derive another
6033 is if this is a biv increment and we can form the product
6034 of biv->add_val and giv->mult_val. In this case, we will
6035 be able to compute a compensation. */
6036 else if (biv->insn == p)
6041 if (biv->mult_val == const1_rtx)
6042 tem = simplify_giv_expr (loop,
6043 gen_rtx_MULT (giv->mode,
6046 &ext_val_dummy, &dummy);
6048 if (tem && giv->derive_adjustment)
6049 tem = simplify_giv_expr
6051 gen_rtx_PLUS (giv->mode, tem, giv->derive_adjustment),
6052 &ext_val_dummy, &dummy);
6055 giv->derive_adjustment = tem;
6057 giv->cant_derive = 1;
6059 else if ((GET_CODE (p) == CODE_LABEL && ! biv->always_computable)
6060 || (GET_CODE (p) == JUMP_INSN && biv->maybe_multiple))
6061 giv->cant_derive = 1;
6066 /* Check whether an insn is an increment legitimate for a basic induction var.
6067 X is the source of insn P, or a part of it.
6068 MODE is the mode in which X should be interpreted.
6070 DEST_REG is the putative biv, also the destination of the insn.
6071 We accept patterns of these forms:
6072 REG = REG + INVARIANT (includes REG = REG - CONSTANT)
6073 REG = INVARIANT + REG
6075 If X is suitable, we return 1, set *MULT_VAL to CONST1_RTX,
6076 store the additive term into *INC_VAL, and store the place where
6077 we found the additive term into *LOCATION.
6079 If X is an assignment of an invariant into DEST_REG, we set
6080 *MULT_VAL to CONST0_RTX, and store the invariant into *INC_VAL.
6082 We also want to detect a BIV when it corresponds to a variable
6083 whose mode was promoted via PROMOTED_MODE. In that case, an increment
6084 of the variable may be a PLUS that adds a SUBREG of that variable to
6085 an invariant and then sign- or zero-extends the result of the PLUS
6088 Most GIVs in such cases will be in the promoted mode, since that is the
6089 probably the natural computation mode (and almost certainly the mode
6090 used for addresses) on the machine. So we view the pseudo-reg containing
6091 the variable as the BIV, as if it were simply incremented.
6093 Note that treating the entire pseudo as a BIV will result in making
6094 simple increments to any GIVs based on it. However, if the variable
6095 overflows in its declared mode but not its promoted mode, the result will
6096 be incorrect. This is acceptable if the variable is signed, since
6097 overflows in such cases are undefined, but not if it is unsigned, since
6098 those overflows are defined. So we only check for SIGN_EXTEND and
6101 If we cannot find a biv, we return 0. */
6104 basic_induction_var (loop, x, mode, dest_reg, p, inc_val, mult_val, location)
6105 const struct loop *loop;
6107 enum machine_mode mode;
6118 code = GET_CODE (x);
6123 if (rtx_equal_p (XEXP (x, 0), dest_reg)
6124 || (GET_CODE (XEXP (x, 0)) == SUBREG
6125 && SUBREG_PROMOTED_VAR_P (XEXP (x, 0))
6126 && SUBREG_REG (XEXP (x, 0)) == dest_reg))
6128 argp = &XEXP (x, 1);
6130 else if (rtx_equal_p (XEXP (x, 1), dest_reg)
6131 || (GET_CODE (XEXP (x, 1)) == SUBREG
6132 && SUBREG_PROMOTED_VAR_P (XEXP (x, 1))
6133 && SUBREG_REG (XEXP (x, 1)) == dest_reg))
6135 argp = &XEXP (x, 0);
6141 if (loop_invariant_p (loop, arg) != 1)
6144 *inc_val = convert_modes (GET_MODE (dest_reg), GET_MODE (x), arg, 0);
6145 *mult_val = const1_rtx;
6150 /* If what's inside the SUBREG is a BIV, then the SUBREG. This will
6151 handle addition of promoted variables.
6152 ??? The comment at the start of this function is wrong: promoted
6153 variable increments don't look like it says they do. */
6154 return basic_induction_var (loop, SUBREG_REG (x),
6155 GET_MODE (SUBREG_REG (x)),
6156 dest_reg, p, inc_val, mult_val, location);
6159 /* If this register is assigned in a previous insn, look at its
6160 source, but don't go outside the loop or past a label. */
6162 /* If this sets a register to itself, we would repeat any previous
6163 biv increment if we applied this strategy blindly. */
6164 if (rtx_equal_p (dest_reg, x))
6173 insn = PREV_INSN (insn);
6175 while (insn && GET_CODE (insn) == NOTE
6176 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG);
6180 set = single_set (insn);
6183 dest = SET_DEST (set);
6185 || (GET_CODE (dest) == SUBREG
6186 && (GET_MODE_SIZE (GET_MODE (dest)) <= UNITS_PER_WORD)
6187 && (GET_MODE_CLASS (GET_MODE (dest)) == MODE_INT)
6188 && SUBREG_REG (dest) == x))
6189 return basic_induction_var (loop, SET_SRC (set),
6190 (GET_MODE (SET_SRC (set)) == VOIDmode
6192 : GET_MODE (SET_SRC (set))),
6194 inc_val, mult_val, location);
6196 while (GET_CODE (dest) == SIGN_EXTRACT
6197 || GET_CODE (dest) == ZERO_EXTRACT
6198 || GET_CODE (dest) == SUBREG
6199 || GET_CODE (dest) == STRICT_LOW_PART)
6200 dest = XEXP (dest, 0);
6206 /* Can accept constant setting of biv only when inside inner most loop.
6207 Otherwise, a biv of an inner loop may be incorrectly recognized
6208 as a biv of the outer loop,
6209 causing code to be moved INTO the inner loop. */
6211 if (loop_invariant_p (loop, x) != 1)
6216 /* convert_modes aborts if we try to convert to or from CCmode, so just
6217 exclude that case. It is very unlikely that a condition code value
6218 would be a useful iterator anyways. convert_modes aborts if we try to
6219 convert a float mode to non-float or vice versa too. */
6220 if (loop->level == 1
6221 && GET_MODE_CLASS (mode) == GET_MODE_CLASS (GET_MODE (dest_reg))
6222 && GET_MODE_CLASS (mode) != MODE_CC)
6224 /* Possible bug here? Perhaps we don't know the mode of X. */
6225 *inc_val = convert_modes (GET_MODE (dest_reg), mode, x, 0);
6226 *mult_val = const0_rtx;
6233 return basic_induction_var (loop, XEXP (x, 0), GET_MODE (XEXP (x, 0)),
6234 dest_reg, p, inc_val, mult_val, location);
6237 /* Similar, since this can be a sign extension. */
6238 for (insn = PREV_INSN (p);
6239 (insn && GET_CODE (insn) == NOTE
6240 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG);
6241 insn = PREV_INSN (insn))
6245 set = single_set (insn);
6247 if (! rtx_equal_p (dest_reg, XEXP (x, 0))
6248 && set && SET_DEST (set) == XEXP (x, 0)
6249 && GET_CODE (XEXP (x, 1)) == CONST_INT
6250 && INTVAL (XEXP (x, 1)) >= 0
6251 && GET_CODE (SET_SRC (set)) == ASHIFT
6252 && XEXP (x, 1) == XEXP (SET_SRC (set), 1))
6253 return basic_induction_var (loop, XEXP (SET_SRC (set), 0),
6254 GET_MODE (XEXP (x, 0)),
6255 dest_reg, insn, inc_val, mult_val,
6264 /* A general induction variable (giv) is any quantity that is a linear
6265 function of a basic induction variable,
6266 i.e. giv = biv * mult_val + add_val.
6267 The coefficients can be any loop invariant quantity.
6268 A giv need not be computed directly from the biv;
6269 it can be computed by way of other givs. */
6271 /* Determine whether X computes a giv.
6272 If it does, return a nonzero value
6273 which is the benefit from eliminating the computation of X;
6274 set *SRC_REG to the register of the biv that it is computed from;
6275 set *ADD_VAL and *MULT_VAL to the coefficients,
6276 such that the value of X is biv * mult + add; */
6279 general_induction_var (loop, x, src_reg, add_val, mult_val, ext_val,
6280 is_addr, pbenefit, addr_mode)
6281 const struct loop *loop;
6289 enum machine_mode addr_mode;
6291 struct loop_ivs *ivs = LOOP_IVS (loop);
6294 /* If this is an invariant, forget it, it isn't a giv. */
6295 if (loop_invariant_p (loop, x) == 1)
6299 *ext_val = NULL_RTX;
6300 x = simplify_giv_expr (loop, x, ext_val, pbenefit);
6304 switch (GET_CODE (x))
6308 /* Since this is now an invariant and wasn't before, it must be a giv
6309 with MULT_VAL == 0. It doesn't matter which BIV we associate this
6311 *src_reg = ivs->list->biv->dest_reg;
6312 *mult_val = const0_rtx;
6317 /* This is equivalent to a BIV. */
6319 *mult_val = const1_rtx;
6320 *add_val = const0_rtx;
6324 /* Either (plus (biv) (invar)) or
6325 (plus (mult (biv) (invar_1)) (invar_2)). */
6326 if (GET_CODE (XEXP (x, 0)) == MULT)
6328 *src_reg = XEXP (XEXP (x, 0), 0);
6329 *mult_val = XEXP (XEXP (x, 0), 1);
6333 *src_reg = XEXP (x, 0);
6334 *mult_val = const1_rtx;
6336 *add_val = XEXP (x, 1);
6340 /* ADD_VAL is zero. */
6341 *src_reg = XEXP (x, 0);
6342 *mult_val = XEXP (x, 1);
6343 *add_val = const0_rtx;
6350 /* Remove any enclosing USE from ADD_VAL and MULT_VAL (there will be
6351 unless they are CONST_INT). */
6352 if (GET_CODE (*add_val) == USE)
6353 *add_val = XEXP (*add_val, 0);
6354 if (GET_CODE (*mult_val) == USE)
6355 *mult_val = XEXP (*mult_val, 0);
6358 *pbenefit += address_cost (orig_x, addr_mode) - reg_address_cost;
6360 *pbenefit += rtx_cost (orig_x, SET);
6362 /* Always return true if this is a giv so it will be detected as such,
6363 even if the benefit is zero or negative. This allows elimination
6364 of bivs that might otherwise not be eliminated. */
6368 /* Given an expression, X, try to form it as a linear function of a biv.
6369 We will canonicalize it to be of the form
6370 (plus (mult (BIV) (invar_1))
6372 with possible degeneracies.
6374 The invariant expressions must each be of a form that can be used as a
6375 machine operand. We surround then with a USE rtx (a hack, but localized
6376 and certainly unambiguous!) if not a CONST_INT for simplicity in this
6377 routine; it is the caller's responsibility to strip them.
6379 If no such canonicalization is possible (i.e., two biv's are used or an
6380 expression that is neither invariant nor a biv or giv), this routine
6383 For a non-zero return, the result will have a code of CONST_INT, USE,
6384 REG (for a BIV), PLUS, or MULT. No other codes will occur.
6386 *BENEFIT will be incremented by the benefit of any sub-giv encountered. */
6388 static rtx sge_plus PARAMS ((enum machine_mode, rtx, rtx));
6389 static rtx sge_plus_constant PARAMS ((rtx, rtx));
6392 simplify_giv_expr (loop, x, ext_val, benefit)
6393 const struct loop *loop;
6398 struct loop_ivs *ivs = LOOP_IVS (loop);
6399 struct loop_regs *regs = LOOP_REGS (loop);
6400 enum machine_mode mode = GET_MODE (x);
6404 /* If this is not an integer mode, or if we cannot do arithmetic in this
6405 mode, this can't be a giv. */
6406 if (mode != VOIDmode
6407 && (GET_MODE_CLASS (mode) != MODE_INT
6408 || GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT))
6411 switch (GET_CODE (x))
6414 arg0 = simplify_giv_expr (loop, XEXP (x, 0), ext_val, benefit);
6415 arg1 = simplify_giv_expr (loop, XEXP (x, 1), ext_val, benefit);
6416 if (arg0 == 0 || arg1 == 0)
6419 /* Put constant last, CONST_INT last if both constant. */
6420 if ((GET_CODE (arg0) == USE
6421 || GET_CODE (arg0) == CONST_INT)
6422 && ! ((GET_CODE (arg0) == USE
6423 && GET_CODE (arg1) == USE)
6424 || GET_CODE (arg1) == CONST_INT))
6425 tem = arg0, arg0 = arg1, arg1 = tem;
6427 /* Handle addition of zero, then addition of an invariant. */
6428 if (arg1 == const0_rtx)
6430 else if (GET_CODE (arg1) == CONST_INT || GET_CODE (arg1) == USE)
6431 switch (GET_CODE (arg0))
6435 /* Adding two invariants must result in an invariant, so enclose
6436 addition operation inside a USE and return it. */
6437 if (GET_CODE (arg0) == USE)
6438 arg0 = XEXP (arg0, 0);
6439 if (GET_CODE (arg1) == USE)
6440 arg1 = XEXP (arg1, 0);
6442 if (GET_CODE (arg0) == CONST_INT)
6443 tem = arg0, arg0 = arg1, arg1 = tem;
6444 if (GET_CODE (arg1) == CONST_INT)
6445 tem = sge_plus_constant (arg0, arg1);
6447 tem = sge_plus (mode, arg0, arg1);
6449 if (GET_CODE (tem) != CONST_INT)
6450 tem = gen_rtx_USE (mode, tem);
6455 /* biv + invar or mult + invar. Return sum. */
6456 return gen_rtx_PLUS (mode, arg0, arg1);
6459 /* (a + invar_1) + invar_2. Associate. */
6461 simplify_giv_expr (loop,
6473 /* Each argument must be either REG, PLUS, or MULT. Convert REG to
6474 MULT to reduce cases. */
6475 if (GET_CODE (arg0) == REG)
6476 arg0 = gen_rtx_MULT (mode, arg0, const1_rtx);
6477 if (GET_CODE (arg1) == REG)
6478 arg1 = gen_rtx_MULT (mode, arg1, const1_rtx);
6480 /* Now have PLUS + PLUS, PLUS + MULT, MULT + PLUS, or MULT + MULT.
6481 Put a MULT first, leaving PLUS + PLUS, MULT + PLUS, or MULT + MULT.
6482 Recurse to associate the second PLUS. */
6483 if (GET_CODE (arg1) == MULT)
6484 tem = arg0, arg0 = arg1, arg1 = tem;
6486 if (GET_CODE (arg1) == PLUS)
6488 simplify_giv_expr (loop,
6490 gen_rtx_PLUS (mode, arg0,
6495 /* Now must have MULT + MULT. Distribute if same biv, else not giv. */
6496 if (GET_CODE (arg0) != MULT || GET_CODE (arg1) != MULT)
6499 if (!rtx_equal_p (arg0, arg1))
6502 return simplify_giv_expr (loop,
6511 /* Handle "a - b" as "a + b * (-1)". */
6512 return simplify_giv_expr (loop,
6521 arg0 = simplify_giv_expr (loop, XEXP (x, 0), ext_val, benefit);
6522 arg1 = simplify_giv_expr (loop, XEXP (x, 1), ext_val, benefit);
6523 if (arg0 == 0 || arg1 == 0)
6526 /* Put constant last, CONST_INT last if both constant. */
6527 if ((GET_CODE (arg0) == USE || GET_CODE (arg0) == CONST_INT)
6528 && GET_CODE (arg1) != CONST_INT)
6529 tem = arg0, arg0 = arg1, arg1 = tem;
6531 /* If second argument is not now constant, not giv. */
6532 if (GET_CODE (arg1) != USE && GET_CODE (arg1) != CONST_INT)
6535 /* Handle multiply by 0 or 1. */
6536 if (arg1 == const0_rtx)
6539 else if (arg1 == const1_rtx)
6542 switch (GET_CODE (arg0))
6545 /* biv * invar. Done. */
6546 return gen_rtx_MULT (mode, arg0, arg1);
6549 /* Product of two constants. */
6550 return GEN_INT (INTVAL (arg0) * INTVAL (arg1));
6553 /* invar * invar is a giv, but attempt to simplify it somehow. */
6554 if (GET_CODE (arg1) != CONST_INT)
6557 arg0 = XEXP (arg0, 0);
6558 if (GET_CODE (arg0) == MULT)
6560 /* (invar_0 * invar_1) * invar_2. Associate. */
6561 return simplify_giv_expr (loop,
6570 /* Porpagate the MULT expressions to the intermost nodes. */
6571 else if (GET_CODE (arg0) == PLUS)
6573 /* (invar_0 + invar_1) * invar_2. Distribute. */
6574 return simplify_giv_expr (loop,
6586 return gen_rtx_USE (mode, gen_rtx_MULT (mode, arg0, arg1));
6589 /* (a * invar_1) * invar_2. Associate. */
6590 return simplify_giv_expr (loop,
6599 /* (a + invar_1) * invar_2. Distribute. */
6600 return simplify_giv_expr (loop,
6615 /* Shift by constant is multiply by power of two. */
6616 if (GET_CODE (XEXP (x, 1)) != CONST_INT)
6620 simplify_giv_expr (loop,
6623 GEN_INT ((HOST_WIDE_INT) 1
6624 << INTVAL (XEXP (x, 1)))),
6628 /* "-a" is "a * (-1)" */
6629 return simplify_giv_expr (loop,
6630 gen_rtx_MULT (mode, XEXP (x, 0), constm1_rtx),
6634 /* "~a" is "-a - 1". Silly, but easy. */
6635 return simplify_giv_expr (loop,
6636 gen_rtx_MINUS (mode,
6637 gen_rtx_NEG (mode, XEXP (x, 0)),
6642 /* Already in proper form for invariant. */
6648 /* Conditionally recognize extensions of simple IVs. After we've
6649 computed loop traversal counts and verified the range of the
6650 source IV, we'll reevaluate this as a GIV. */
6651 if (*ext_val == NULL_RTX)
6653 arg0 = simplify_giv_expr (loop, XEXP (x, 0), ext_val, benefit);
6654 if (arg0 && *ext_val == NULL_RTX && GET_CODE (arg0) == REG)
6656 *ext_val = gen_rtx_fmt_e (GET_CODE (x), mode, arg0);
6663 /* If this is a new register, we can't deal with it. */
6664 if (REGNO (x) >= max_reg_before_loop)
6667 /* Check for biv or giv. */
6668 switch (REG_IV_TYPE (ivs, REGNO (x)))
6672 case GENERAL_INDUCT:
6674 struct induction *v = REG_IV_INFO (ivs, REGNO (x));
6676 /* Form expression from giv and add benefit. Ensure this giv
6677 can derive another and subtract any needed adjustment if so. */
6679 /* Increasing the benefit here is risky. The only case in which it
6680 is arguably correct is if this is the only use of V. In other
6681 cases, this will artificially inflate the benefit of the current
6682 giv, and lead to suboptimal code. Thus, it is disabled, since
6683 potentially not reducing an only marginally beneficial giv is
6684 less harmful than reducing many givs that are not really
6687 rtx single_use = regs->array[REGNO (x)].single_usage;
6688 if (single_use && single_use != const0_rtx)
6689 *benefit += v->benefit;
6695 tem = gen_rtx_PLUS (mode, gen_rtx_MULT (mode,
6696 v->src_reg, v->mult_val),
6699 if (v->derive_adjustment)
6700 tem = gen_rtx_MINUS (mode, tem, v->derive_adjustment);
6701 arg0 = simplify_giv_expr (loop, tem, ext_val, benefit);
6704 if (!v->ext_dependent)
6709 *ext_val = v->ext_dependent;
6717 /* If it isn't an induction variable, and it is invariant, we
6718 may be able to simplify things further by looking through
6719 the bits we just moved outside the loop. */
6720 if (loop_invariant_p (loop, x) == 1)
6723 struct loop_movables *movables = LOOP_MOVABLES (loop);
6725 for (m = movables->head; m; m = m->next)
6726 if (rtx_equal_p (x, m->set_dest))
6728 /* Ok, we found a match. Substitute and simplify. */
6730 /* If we match another movable, we must use that, as
6731 this one is going away. */
6733 return simplify_giv_expr (loop, m->match->set_dest,
6736 /* If consec is non-zero, this is a member of a group of
6737 instructions that were moved together. We handle this
6738 case only to the point of seeking to the last insn and
6739 looking for a REG_EQUAL. Fail if we don't find one. */
6746 tem = NEXT_INSN (tem);
6750 tem = find_reg_note (tem, REG_EQUAL, NULL_RTX);
6752 tem = XEXP (tem, 0);
6756 tem = single_set (m->insn);
6758 tem = SET_SRC (tem);
6763 /* What we are most interested in is pointer
6764 arithmetic on invariants -- only take
6765 patterns we may be able to do something with. */
6766 if (GET_CODE (tem) == PLUS
6767 || GET_CODE (tem) == MULT
6768 || GET_CODE (tem) == ASHIFT
6769 || GET_CODE (tem) == CONST_INT
6770 || GET_CODE (tem) == SYMBOL_REF)
6772 tem = simplify_giv_expr (loop, tem, ext_val,
6777 else if (GET_CODE (tem) == CONST
6778 && GET_CODE (XEXP (tem, 0)) == PLUS
6779 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == SYMBOL_REF
6780 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)
6782 tem = simplify_giv_expr (loop, XEXP (tem, 0),
6794 /* Fall through to general case. */
6796 /* If invariant, return as USE (unless CONST_INT).
6797 Otherwise, not giv. */
6798 if (GET_CODE (x) == USE)
6801 if (loop_invariant_p (loop, x) == 1)
6803 if (GET_CODE (x) == CONST_INT)
6805 if (GET_CODE (x) == CONST
6806 && GET_CODE (XEXP (x, 0)) == PLUS
6807 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
6808 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
6810 return gen_rtx_USE (mode, x);
6817 /* This routine folds invariants such that there is only ever one
6818 CONST_INT in the summation. It is only used by simplify_giv_expr. */
6821 sge_plus_constant (x, c)
6824 if (GET_CODE (x) == CONST_INT)
6825 return GEN_INT (INTVAL (x) + INTVAL (c));
6826 else if (GET_CODE (x) != PLUS)
6827 return gen_rtx_PLUS (GET_MODE (x), x, c);
6828 else if (GET_CODE (XEXP (x, 1)) == CONST_INT)
6830 return gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0),
6831 GEN_INT (INTVAL (XEXP (x, 1)) + INTVAL (c)));
6833 else if (GET_CODE (XEXP (x, 0)) == PLUS
6834 || GET_CODE (XEXP (x, 1)) != PLUS)
6836 return gen_rtx_PLUS (GET_MODE (x),
6837 sge_plus_constant (XEXP (x, 0), c), XEXP (x, 1));
6841 return gen_rtx_PLUS (GET_MODE (x),
6842 sge_plus_constant (XEXP (x, 1), c), XEXP (x, 0));
6847 sge_plus (mode, x, y)
6848 enum machine_mode mode;
6851 while (GET_CODE (y) == PLUS)
6853 rtx a = XEXP (y, 0);
6854 if (GET_CODE (a) == CONST_INT)
6855 x = sge_plus_constant (x, a);
6857 x = gen_rtx_PLUS (mode, x, a);
6860 if (GET_CODE (y) == CONST_INT)
6861 x = sge_plus_constant (x, y);
6863 x = gen_rtx_PLUS (mode, x, y);
6867 /* Help detect a giv that is calculated by several consecutive insns;
6871 The caller has already identified the first insn P as having a giv as dest;
6872 we check that all other insns that set the same register follow
6873 immediately after P, that they alter nothing else,
6874 and that the result of the last is still a giv.
6876 The value is 0 if the reg set in P is not really a giv.
6877 Otherwise, the value is the amount gained by eliminating
6878 all the consecutive insns that compute the value.
6880 FIRST_BENEFIT is the amount gained by eliminating the first insn, P.
6881 SRC_REG is the reg of the biv; DEST_REG is the reg of the giv.
6883 The coefficients of the ultimate giv value are stored in
6884 *MULT_VAL and *ADD_VAL. */
6887 consec_sets_giv (loop, first_benefit, p, src_reg, dest_reg,
6888 add_val, mult_val, ext_val, last_consec_insn)
6889 const struct loop *loop;
6897 rtx *last_consec_insn;
6899 struct loop_ivs *ivs = LOOP_IVS (loop);
6900 struct loop_regs *regs = LOOP_REGS (loop);
6907 /* Indicate that this is a giv so that we can update the value produced in
6908 each insn of the multi-insn sequence.
6910 This induction structure will be used only by the call to
6911 general_induction_var below, so we can allocate it on our stack.
6912 If this is a giv, our caller will replace the induct var entry with
6913 a new induction structure. */
6914 struct induction *v;
6916 if (REG_IV_TYPE (ivs, REGNO (dest_reg)) != UNKNOWN_INDUCT)
6919 v = (struct induction *) alloca (sizeof (struct induction));
6920 v->src_reg = src_reg;
6921 v->mult_val = *mult_val;
6922 v->add_val = *add_val;
6923 v->benefit = first_benefit;
6925 v->derive_adjustment = 0;
6926 v->ext_dependent = NULL_RTX;
6928 REG_IV_TYPE (ivs, REGNO (dest_reg)) = GENERAL_INDUCT;
6929 REG_IV_INFO (ivs, REGNO (dest_reg)) = v;
6931 count = regs->array[REGNO (dest_reg)].n_times_set - 1;
6936 code = GET_CODE (p);
6938 /* If libcall, skip to end of call sequence. */
6939 if (code == INSN && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
6943 && (set = single_set (p))
6944 && GET_CODE (SET_DEST (set)) == REG
6945 && SET_DEST (set) == dest_reg
6946 && (general_induction_var (loop, SET_SRC (set), &src_reg,
6947 add_val, mult_val, ext_val, 0,
6949 /* Giv created by equivalent expression. */
6950 || ((temp = find_reg_note (p, REG_EQUAL, NULL_RTX))
6951 && general_induction_var (loop, XEXP (temp, 0), &src_reg,
6952 add_val, mult_val, ext_val, 0,
6953 &benefit, VOIDmode)))
6954 && src_reg == v->src_reg)
6956 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
6957 benefit += libcall_benefit (p);
6960 v->mult_val = *mult_val;
6961 v->add_val = *add_val;
6962 v->benefit += benefit;
6964 else if (code != NOTE)
6966 /* Allow insns that set something other than this giv to a
6967 constant. Such insns are needed on machines which cannot
6968 include long constants and should not disqualify a giv. */
6970 && (set = single_set (p))
6971 && SET_DEST (set) != dest_reg
6972 && CONSTANT_P (SET_SRC (set)))
6975 REG_IV_TYPE (ivs, REGNO (dest_reg)) = UNKNOWN_INDUCT;
6980 REG_IV_TYPE (ivs, REGNO (dest_reg)) = UNKNOWN_INDUCT;
6981 *last_consec_insn = p;
6985 /* Return an rtx, if any, that expresses giv G2 as a function of the register
6986 represented by G1. If no such expression can be found, or it is clear that
6987 it cannot possibly be a valid address, 0 is returned.
6989 To perform the computation, we note that
6992 where `v' is the biv.
6994 So G2 = (y/b) * G1 + (b - a*y/x).
6996 Note that MULT = y/x.
6998 Update: A and B are now allowed to be additive expressions such that
6999 B contains all variables in A. That is, computing B-A will not require
7000 subtracting variables. */
7003 express_from_1 (a, b, mult)
7006 /* If MULT is zero, then A*MULT is zero, and our expression is B. */
7008 if (mult == const0_rtx)
7011 /* If MULT is not 1, we cannot handle A with non-constants, since we
7012 would then be required to subtract multiples of the registers in A.
7013 This is theoretically possible, and may even apply to some Fortran
7014 constructs, but it is a lot of work and we do not attempt it here. */
7016 if (mult != const1_rtx && GET_CODE (a) != CONST_INT)
7019 /* In general these structures are sorted top to bottom (down the PLUS
7020 chain), but not left to right across the PLUS. If B is a higher
7021 order giv than A, we can strip one level and recurse. If A is higher
7022 order, we'll eventually bail out, but won't know that until the end.
7023 If they are the same, we'll strip one level around this loop. */
7025 while (GET_CODE (a) == PLUS && GET_CODE (b) == PLUS)
7027 rtx ra, rb, oa, ob, tmp;
7029 ra = XEXP (a, 0), oa = XEXP (a, 1);
7030 if (GET_CODE (ra) == PLUS)
7031 tmp = ra, ra = oa, oa = tmp;
7033 rb = XEXP (b, 0), ob = XEXP (b, 1);
7034 if (GET_CODE (rb) == PLUS)
7035 tmp = rb, rb = ob, ob = tmp;
7037 if (rtx_equal_p (ra, rb))
7038 /* We matched: remove one reg completely. */
7040 else if (GET_CODE (ob) != PLUS && rtx_equal_p (ra, ob))
7041 /* An alternate match. */
7043 else if (GET_CODE (oa) != PLUS && rtx_equal_p (oa, rb))
7044 /* An alternate match. */
7048 /* Indicates an extra register in B. Strip one level from B and
7049 recurse, hoping B was the higher order expression. */
7050 ob = express_from_1 (a, ob, mult);
7053 return gen_rtx_PLUS (GET_MODE (b), rb, ob);
7057 /* Here we are at the last level of A, go through the cases hoping to
7058 get rid of everything but a constant. */
7060 if (GET_CODE (a) == PLUS)
7064 ra = XEXP (a, 0), oa = XEXP (a, 1);
7065 if (rtx_equal_p (oa, b))
7067 else if (!rtx_equal_p (ra, b))
7070 if (GET_CODE (oa) != CONST_INT)
7073 return GEN_INT (-INTVAL (oa) * INTVAL (mult));
7075 else if (GET_CODE (a) == CONST_INT)
7077 return plus_constant (b, -INTVAL (a) * INTVAL (mult));
7079 else if (CONSTANT_P (a))
7081 enum machine_mode mode_a = GET_MODE (a);
7082 enum machine_mode mode_b = GET_MODE (b);
7083 enum machine_mode mode = mode_b == VOIDmode ? mode_a : mode_b;
7084 return simplify_gen_binary (MINUS, mode, b, a);
7086 else if (GET_CODE (b) == PLUS)
7088 if (rtx_equal_p (a, XEXP (b, 0)))
7090 else if (rtx_equal_p (a, XEXP (b, 1)))
7095 else if (rtx_equal_p (a, b))
7102 express_from (g1, g2)
7103 struct induction *g1, *g2;
7107 /* The value that G1 will be multiplied by must be a constant integer. Also,
7108 the only chance we have of getting a valid address is if b*c/a (see above
7109 for notation) is also an integer. */
7110 if (GET_CODE (g1->mult_val) == CONST_INT
7111 && GET_CODE (g2->mult_val) == CONST_INT)
7113 if (g1->mult_val == const0_rtx
7114 || INTVAL (g2->mult_val) % INTVAL (g1->mult_val) != 0)
7116 mult = GEN_INT (INTVAL (g2->mult_val) / INTVAL (g1->mult_val));
7118 else if (rtx_equal_p (g1->mult_val, g2->mult_val))
7122 /* ??? Find out if the one is a multiple of the other? */
7126 add = express_from_1 (g1->add_val, g2->add_val, mult);
7127 if (add == NULL_RTX)
7129 /* Failed. If we've got a multiplication factor between G1 and G2,
7130 scale G1's addend and try again. */
7131 if (INTVAL (mult) > 1)
7133 rtx g1_add_val = g1->add_val;
7134 if (GET_CODE (g1_add_val) == MULT
7135 && GET_CODE (XEXP (g1_add_val, 1)) == CONST_INT)
7138 m = INTVAL (mult) * INTVAL (XEXP (g1_add_val, 1));
7139 g1_add_val = gen_rtx_MULT (GET_MODE (g1_add_val),
7140 XEXP (g1_add_val, 0), GEN_INT (m));
7144 g1_add_val = gen_rtx_MULT (GET_MODE (g1_add_val), g1_add_val,
7148 add = express_from_1 (g1_add_val, g2->add_val, const1_rtx);
7151 if (add == NULL_RTX)
7154 /* Form simplified final result. */
7155 if (mult == const0_rtx)
7157 else if (mult == const1_rtx)
7158 mult = g1->dest_reg;
7160 mult = gen_rtx_MULT (g2->mode, g1->dest_reg, mult);
7162 if (add == const0_rtx)
7166 if (GET_CODE (add) == PLUS
7167 && CONSTANT_P (XEXP (add, 1)))
7169 rtx tem = XEXP (add, 1);
7170 mult = gen_rtx_PLUS (g2->mode, mult, XEXP (add, 0));
7174 return gen_rtx_PLUS (g2->mode, mult, add);
7178 /* Return an rtx, if any, that expresses giv G2 as a function of the register
7179 represented by G1. This indicates that G2 should be combined with G1 and
7180 that G2 can use (either directly or via an address expression) a register
7181 used to represent G1. */
7184 combine_givs_p (g1, g2)
7185 struct induction *g1, *g2;
7189 /* With the introduction of ext dependent givs, we must care for modes.
7190 G2 must not use a wider mode than G1. */
7191 if (GET_MODE_SIZE (g1->mode) < GET_MODE_SIZE (g2->mode))
7194 ret = comb = express_from (g1, g2);
7195 if (comb == NULL_RTX)
7197 if (g1->mode != g2->mode)
7198 ret = gen_lowpart (g2->mode, comb);
7200 /* If these givs are identical, they can be combined. We use the results
7201 of express_from because the addends are not in a canonical form, so
7202 rtx_equal_p is a weaker test. */
7203 /* But don't combine a DEST_REG giv with a DEST_ADDR giv; we want the
7204 combination to be the other way round. */
7205 if (comb == g1->dest_reg
7206 && (g1->giv_type == DEST_REG || g2->giv_type == DEST_ADDR))
7211 /* If G2 can be expressed as a function of G1 and that function is valid
7212 as an address and no more expensive than using a register for G2,
7213 the expression of G2 in terms of G1 can be used. */
7215 && g2->giv_type == DEST_ADDR
7216 && memory_address_p (GET_MODE (g2->mem), ret)
7217 /* ??? Looses, especially with -fforce-addr, where *g2->location
7218 will always be a register, and so anything more complicated
7222 && ADDRESS_COST (tem) <= ADDRESS_COST (*g2->location)
7224 && rtx_cost (tem, MEM) <= rtx_cost (*g2->location, MEM)
7235 /* Check each extension dependent giv in this class to see if its
7236 root biv is safe from wrapping in the interior mode, which would
7237 make the giv illegal. */
7240 check_ext_dependent_givs (bl, loop_info)
7241 struct iv_class *bl;
7242 struct loop_info *loop_info;
7244 int ze_ok = 0, se_ok = 0, info_ok = 0;
7245 enum machine_mode biv_mode = GET_MODE (bl->biv->src_reg);
7246 HOST_WIDE_INT start_val;
7247 unsigned HOST_WIDE_INT u_end_val = 0;
7248 unsigned HOST_WIDE_INT u_start_val = 0;
7250 struct induction *v;
7252 /* Make sure the iteration data is available. We must have
7253 constants in order to be certain of no overflow. */
7254 /* ??? An unknown iteration count with an increment of +-1
7255 combined with friendly exit tests of against an invariant
7256 value is also ameanable to optimization. Not implemented. */
7257 if (loop_info->n_iterations > 0
7258 && bl->initial_value
7259 && GET_CODE (bl->initial_value) == CONST_INT
7260 && (incr = biv_total_increment (bl))
7261 && GET_CODE (incr) == CONST_INT
7262 /* Make sure the host can represent the arithmetic. */
7263 && HOST_BITS_PER_WIDE_INT >= GET_MODE_BITSIZE (biv_mode))
7265 unsigned HOST_WIDE_INT abs_incr, total_incr;
7266 HOST_WIDE_INT s_end_val;
7270 start_val = INTVAL (bl->initial_value);
7271 u_start_val = start_val;
7273 neg_incr = 0, abs_incr = INTVAL (incr);
7274 if (INTVAL (incr) < 0)
7275 neg_incr = 1, abs_incr = -abs_incr;
7276 total_incr = abs_incr * loop_info->n_iterations;
7278 /* Check for host arithmatic overflow. */
7279 if (total_incr / loop_info->n_iterations == abs_incr)
7281 unsigned HOST_WIDE_INT u_max;
7282 HOST_WIDE_INT s_max;
7284 u_end_val = start_val + (neg_incr ? -total_incr : total_incr);
7285 s_end_val = u_end_val;
7286 u_max = GET_MODE_MASK (biv_mode);
7289 /* Check zero extension of biv ok. */
7291 /* Check for host arithmatic overflow. */
7293 ? u_end_val < u_start_val
7294 : u_end_val > u_start_val)
7295 /* Check for target arithmetic overflow. */
7297 ? 1 /* taken care of with host overflow */
7298 : u_end_val <= u_max))
7303 /* Check sign extension of biv ok. */
7304 /* ??? While it is true that overflow with signed and pointer
7305 arithmetic is undefined, I fear too many programmers don't
7306 keep this fact in mind -- myself included on occasion.
7307 So leave alone with the signed overflow optimizations. */
7308 if (start_val >= -s_max - 1
7309 /* Check for host arithmatic overflow. */
7311 ? s_end_val < start_val
7312 : s_end_val > start_val)
7313 /* Check for target arithmetic overflow. */
7315 ? s_end_val >= -s_max - 1
7316 : s_end_val <= s_max))
7323 /* Invalidate givs that fail the tests. */
7324 for (v = bl->giv; v; v = v->next_iv)
7325 if (v->ext_dependent)
7327 enum rtx_code code = GET_CODE (v->ext_dependent);
7340 /* We don't know whether this value is being used as either
7341 signed or unsigned, so to safely truncate we must satisfy
7342 both. The initial check here verifies the BIV itself;
7343 once that is successful we may check its range wrt the
7347 enum machine_mode outer_mode = GET_MODE (v->ext_dependent);
7348 unsigned HOST_WIDE_INT max = GET_MODE_MASK (outer_mode) >> 1;
7350 /* We know from the above that both endpoints are nonnegative,
7351 and that there is no wrapping. Verify that both endpoints
7352 are within the (signed) range of the outer mode. */
7353 if (u_start_val <= max && u_end_val <= max)
7364 if (loop_dump_stream)
7366 fprintf (loop_dump_stream,
7367 "Verified ext dependent giv at %d of reg %d\n",
7368 INSN_UID (v->insn), bl->regno);
7373 if (loop_dump_stream)
7378 why = "biv iteration values overflowed";
7382 incr = biv_total_increment (bl);
7383 if (incr == const1_rtx)
7384 why = "biv iteration info incomplete; incr by 1";
7386 why = "biv iteration info incomplete";
7389 fprintf (loop_dump_stream,
7390 "Failed ext dependent giv at %d, %s\n",
7391 INSN_UID (v->insn), why);
7394 bl->all_reduced = 0;
7399 /* Generate a version of VALUE in a mode appropriate for initializing V. */
7402 extend_value_for_giv (v, value)
7403 struct induction *v;
7406 rtx ext_dep = v->ext_dependent;
7411 /* Recall that check_ext_dependent_givs verified that the known bounds
7412 of a biv did not overflow or wrap with respect to the extension for
7413 the giv. Therefore, constants need no additional adjustment. */
7414 if (CONSTANT_P (value) && GET_MODE (value) == VOIDmode)
7417 /* Otherwise, we must adjust the value to compensate for the
7418 differing modes of the biv and the giv. */
7419 return gen_rtx_fmt_e (GET_CODE (ext_dep), GET_MODE (ext_dep), value);
7422 struct combine_givs_stats
7429 cmp_combine_givs_stats (xp, yp)
7433 const struct combine_givs_stats * const x =
7434 (const struct combine_givs_stats *) xp;
7435 const struct combine_givs_stats * const y =
7436 (const struct combine_givs_stats *) yp;
7438 d = y->total_benefit - x->total_benefit;
7439 /* Stabilize the sort. */
7441 d = x->giv_number - y->giv_number;
7445 /* Check all pairs of givs for iv_class BL and see if any can be combined with
7446 any other. If so, point SAME to the giv combined with and set NEW_REG to
7447 be an expression (in terms of the other giv's DEST_REG) equivalent to the
7448 giv. Also, update BENEFIT and related fields for cost/benefit analysis. */
7451 combine_givs (regs, bl)
7452 struct loop_regs *regs;
7453 struct iv_class *bl;
7455 /* Additional benefit to add for being combined multiple times. */
7456 const int extra_benefit = 3;
7458 struct induction *g1, *g2, **giv_array;
7459 int i, j, k, giv_count;
7460 struct combine_givs_stats *stats;
7463 /* Count givs, because bl->giv_count is incorrect here. */
7465 for (g1 = bl->giv; g1; g1 = g1->next_iv)
7470 = (struct induction **) alloca (giv_count * sizeof (struct induction *));
7472 for (g1 = bl->giv; g1; g1 = g1->next_iv)
7474 giv_array[i++] = g1;
7476 stats = (struct combine_givs_stats *) xcalloc (giv_count, sizeof (*stats));
7477 can_combine = (rtx *) xcalloc (giv_count, giv_count * sizeof (rtx));
7479 for (i = 0; i < giv_count; i++)
7485 stats[i].giv_number = i;
7487 /* If a DEST_REG GIV is used only once, do not allow it to combine
7488 with anything, for in doing so we will gain nothing that cannot
7489 be had by simply letting the GIV with which we would have combined
7490 to be reduced on its own. The losage shows up in particular with
7491 DEST_ADDR targets on hosts with reg+reg addressing, though it can
7492 be seen elsewhere as well. */
7493 if (g1->giv_type == DEST_REG
7494 && (single_use = regs->array[REGNO (g1->dest_reg)].single_usage)
7495 && single_use != const0_rtx)
7498 this_benefit = g1->benefit;
7499 /* Add an additional weight for zero addends. */
7500 if (g1->no_const_addval)
7503 for (j = 0; j < giv_count; j++)
7509 && (this_combine = combine_givs_p (g1, g2)) != NULL_RTX)
7511 can_combine[i * giv_count + j] = this_combine;
7512 this_benefit += g2->benefit + extra_benefit;
7515 stats[i].total_benefit = this_benefit;
7518 /* Iterate, combining until we can't. */
7520 qsort (stats, giv_count, sizeof (*stats), cmp_combine_givs_stats);
7522 if (loop_dump_stream)
7524 fprintf (loop_dump_stream, "Sorted combine statistics:\n");
7525 for (k = 0; k < giv_count; k++)
7527 g1 = giv_array[stats[k].giv_number];
7528 if (!g1->combined_with && !g1->same)
7529 fprintf (loop_dump_stream, " {%d, %d}",
7530 INSN_UID (giv_array[stats[k].giv_number]->insn),
7531 stats[k].total_benefit);
7533 putc ('\n', loop_dump_stream);
7536 for (k = 0; k < giv_count; k++)
7538 int g1_add_benefit = 0;
7540 i = stats[k].giv_number;
7543 /* If it has already been combined, skip. */
7544 if (g1->combined_with || g1->same)
7547 for (j = 0; j < giv_count; j++)
7550 if (g1 != g2 && can_combine[i * giv_count + j]
7551 /* If it has already been combined, skip. */
7552 && ! g2->same && ! g2->combined_with)
7556 g2->new_reg = can_combine[i * giv_count + j];
7558 /* For destination, we now may replace by mem expression instead
7559 of register. This changes the costs considerably, so add the
7561 if (g2->giv_type == DEST_ADDR)
7562 g2->benefit = (g2->benefit + reg_address_cost
7563 - address_cost (g2->new_reg,
7564 GET_MODE (g2->mem)));
7565 g1->combined_with++;
7566 g1->lifetime += g2->lifetime;
7568 g1_add_benefit += g2->benefit;
7570 /* ??? The new final_[bg]iv_value code does a much better job
7571 of finding replaceable giv's, and hence this code may no
7572 longer be necessary. */
7573 if (! g2->replaceable && REG_USERVAR_P (g2->dest_reg))
7574 g1_add_benefit -= copy_cost;
7576 /* To help optimize the next set of combinations, remove
7577 this giv from the benefits of other potential mates. */
7578 for (l = 0; l < giv_count; ++l)
7580 int m = stats[l].giv_number;
7581 if (can_combine[m * giv_count + j])
7582 stats[l].total_benefit -= g2->benefit + extra_benefit;
7585 if (loop_dump_stream)
7586 fprintf (loop_dump_stream,
7587 "giv at %d combined with giv at %d; new benefit %d + %d, lifetime %d\n",
7588 INSN_UID (g2->insn), INSN_UID (g1->insn),
7589 g1->benefit, g1_add_benefit, g1->lifetime);
7593 /* To help optimize the next set of combinations, remove
7594 this giv from the benefits of other potential mates. */
7595 if (g1->combined_with)
7597 for (j = 0; j < giv_count; ++j)
7599 int m = stats[j].giv_number;
7600 if (can_combine[m * giv_count + i])
7601 stats[j].total_benefit -= g1->benefit + extra_benefit;
7604 g1->benefit += g1_add_benefit;
7606 /* We've finished with this giv, and everything it touched.
7607 Restart the combination so that proper weights for the
7608 rest of the givs are properly taken into account. */
7609 /* ??? Ideally we would compact the arrays at this point, so
7610 as to not cover old ground. But sanely compacting
7611 can_combine is tricky. */
7621 /* Generate sequence for REG = B * M + A. */
7624 gen_add_mult (b, m, a, reg)
7625 rtx b; /* initial value of basic induction variable */
7626 rtx m; /* multiplicative constant */
7627 rtx a; /* additive constant */
7628 rtx reg; /* destination register */
7634 /* Use unsigned arithmetic. */
7635 result = expand_mult_add (b, reg, m, a, GET_MODE (reg), 1);
7637 emit_move_insn (reg, result);
7638 seq = gen_sequence ();
7645 /* Update registers created in insn sequence SEQ. */
7648 loop_regs_update (loop, seq)
7649 const struct loop *loop ATTRIBUTE_UNUSED;
7652 /* Update register info for alias analysis. */
7654 if (GET_CODE (seq) == SEQUENCE)
7657 for (i = 0; i < XVECLEN (seq, 0); ++i)
7659 rtx set = single_set (XVECEXP (seq, 0, i));
7660 if (set && GET_CODE (SET_DEST (set)) == REG)
7661 record_base_value (REGNO (SET_DEST (set)), SET_SRC (set), 0);
7666 if (GET_CODE (seq) == SET
7667 && GET_CODE (SET_DEST (seq)) == REG)
7668 record_base_value (REGNO (SET_DEST (seq)), SET_SRC (seq), 0);
7673 /* EMIT code before BEFORE_BB/BEFORE_INSN to set REG = B * M + A. */
7676 loop_iv_add_mult_emit_before (loop, b, m, a, reg, before_bb, before_insn)
7677 const struct loop *loop;
7678 rtx b; /* initial value of basic induction variable */
7679 rtx m; /* multiplicative constant */
7680 rtx a; /* additive constant */
7681 rtx reg; /* destination register */
7682 basic_block before_bb;
7689 loop_iv_add_mult_hoist (loop, b, m, a, reg);
7693 /* Use copy_rtx to prevent unexpected sharing of these rtx. */
7694 seq = gen_add_mult (copy_rtx (b), copy_rtx (m), copy_rtx (a), reg);
7696 /* Increase the lifetime of any invariants moved further in code. */
7697 update_reg_last_use (a, before_insn);
7698 update_reg_last_use (b, before_insn);
7699 update_reg_last_use (m, before_insn);
7701 loop_insn_emit_before (loop, before_bb, before_insn, seq);
7703 /* It is possible that the expansion created lots of new registers.
7704 Iterate over the sequence we just created and record them all. */
7705 loop_regs_update (loop, seq);
7709 /* Emit insns in loop pre-header to set REG = B * M + A. */
7712 loop_iv_add_mult_sink (loop, b, m, a, reg)
7713 const struct loop *loop;
7714 rtx b; /* initial value of basic induction variable */
7715 rtx m; /* multiplicative constant */
7716 rtx a; /* additive constant */
7717 rtx reg; /* destination register */
7721 /* Use copy_rtx to prevent unexpected sharing of these rtx. */
7722 seq = gen_add_mult (copy_rtx (b), copy_rtx (m), copy_rtx (a), reg);
7724 /* Increase the lifetime of any invariants moved further in code.
7725 ???? Is this really necessary? */
7726 update_reg_last_use (a, loop->sink);
7727 update_reg_last_use (b, loop->sink);
7728 update_reg_last_use (m, loop->sink);
7730 loop_insn_sink (loop, seq);
7732 /* It is possible that the expansion created lots of new registers.
7733 Iterate over the sequence we just created and record them all. */
7734 loop_regs_update (loop, seq);
7738 /* Emit insns after loop to set REG = B * M + A. */
7741 loop_iv_add_mult_hoist (loop, b, m, a, reg)
7742 const struct loop *loop;
7743 rtx b; /* initial value of basic induction variable */
7744 rtx m; /* multiplicative constant */
7745 rtx a; /* additive constant */
7746 rtx reg; /* destination register */
7750 /* Use copy_rtx to prevent unexpected sharing of these rtx. */
7751 seq = gen_add_mult (copy_rtx (b), copy_rtx (m), copy_rtx (a), reg);
7753 loop_insn_hoist (loop, seq);
7755 /* It is possible that the expansion created lots of new registers.
7756 Iterate over the sequence we just created and record them all. */
7757 loop_regs_update (loop, seq);
7762 /* Similar to gen_add_mult, but compute cost rather than generating
7766 iv_add_mult_cost (b, m, a, reg)
7767 rtx b; /* initial value of basic induction variable */
7768 rtx m; /* multiplicative constant */
7769 rtx a; /* additive constant */
7770 rtx reg; /* destination register */
7776 result = expand_mult_add (b, reg, m, a, GET_MODE (reg), 1);
7778 emit_move_insn (reg, result);
7779 last = get_last_insn ();
7782 rtx t = single_set (last);
7784 cost += rtx_cost (SET_SRC (t), SET);
7785 last = PREV_INSN (last);
7791 /* Test whether A * B can be computed without
7792 an actual multiply insn. Value is 1 if so. */
7795 product_cheap_p (a, b)
7803 /* If only one is constant, make it B. */
7804 if (GET_CODE (a) == CONST_INT)
7805 tmp = a, a = b, b = tmp;
7807 /* If first constant, both constant, so don't need multiply. */
7808 if (GET_CODE (a) == CONST_INT)
7811 /* If second not constant, neither is constant, so would need multiply. */
7812 if (GET_CODE (b) != CONST_INT)
7815 /* One operand is constant, so might not need multiply insn. Generate the
7816 code for the multiply and see if a call or multiply, or long sequence
7817 of insns is generated. */
7820 expand_mult (GET_MODE (a), a, b, NULL_RTX, 1);
7821 tmp = gen_sequence ();
7824 if (GET_CODE (tmp) == SEQUENCE)
7826 if (XVEC (tmp, 0) == 0)
7828 else if (XVECLEN (tmp, 0) > 3)
7831 for (i = 0; i < XVECLEN (tmp, 0); i++)
7833 rtx insn = XVECEXP (tmp, 0, i);
7835 if (GET_CODE (insn) != INSN
7836 || (GET_CODE (PATTERN (insn)) == SET
7837 && GET_CODE (SET_SRC (PATTERN (insn))) == MULT)
7838 || (GET_CODE (PATTERN (insn)) == PARALLEL
7839 && GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == SET
7840 && GET_CODE (SET_SRC (XVECEXP (PATTERN (insn), 0, 0))) == MULT))
7847 else if (GET_CODE (tmp) == SET
7848 && GET_CODE (SET_SRC (tmp)) == MULT)
7850 else if (GET_CODE (tmp) == PARALLEL
7851 && GET_CODE (XVECEXP (tmp, 0, 0)) == SET
7852 && GET_CODE (SET_SRC (XVECEXP (tmp, 0, 0))) == MULT)
7858 /* Check to see if loop can be terminated by a "decrement and branch until
7859 zero" instruction. If so, add a REG_NONNEG note to the branch insn if so.
7860 Also try reversing an increment loop to a decrement loop
7861 to see if the optimization can be performed.
7862 Value is nonzero if optimization was performed. */
7864 /* This is useful even if the architecture doesn't have such an insn,
7865 because it might change a loops which increments from 0 to n to a loop
7866 which decrements from n to 0. A loop that decrements to zero is usually
7867 faster than one that increments from zero. */
7869 /* ??? This could be rewritten to use some of the loop unrolling procedures,
7870 such as approx_final_value, biv_total_increment, loop_iterations, and
7871 final_[bg]iv_value. */
7874 check_dbra_loop (loop, insn_count)
7878 struct loop_info *loop_info = LOOP_INFO (loop);
7879 struct loop_regs *regs = LOOP_REGS (loop);
7880 struct loop_ivs *ivs = LOOP_IVS (loop);
7881 struct iv_class *bl;
7888 rtx before_comparison;
7892 int compare_and_branch;
7893 rtx loop_start = loop->start;
7894 rtx loop_end = loop->end;
7896 /* If last insn is a conditional branch, and the insn before tests a
7897 register value, try to optimize it. Otherwise, we can't do anything. */
7899 jump = PREV_INSN (loop_end);
7900 comparison = get_condition_for_loop (loop, jump);
7901 if (comparison == 0)
7903 if (!onlyjump_p (jump))
7906 /* Try to compute whether the compare/branch at the loop end is one or
7907 two instructions. */
7908 get_condition (jump, &first_compare);
7909 if (first_compare == jump)
7910 compare_and_branch = 1;
7911 else if (first_compare == prev_nonnote_insn (jump))
7912 compare_and_branch = 2;
7917 /* If more than one condition is present to control the loop, then
7918 do not proceed, as this function does not know how to rewrite
7919 loop tests with more than one condition.
7921 Look backwards from the first insn in the last comparison
7922 sequence and see if we've got another comparison sequence. */
7925 if ((jump1 = prev_nonnote_insn (first_compare)) != loop->cont)
7926 if (GET_CODE (jump1) == JUMP_INSN)
7930 /* Check all of the bivs to see if the compare uses one of them.
7931 Skip biv's set more than once because we can't guarantee that
7932 it will be zero on the last iteration. Also skip if the biv is
7933 used between its update and the test insn. */
7935 for (bl = ivs->list; bl; bl = bl->next)
7937 if (bl->biv_count == 1
7938 && ! bl->biv->maybe_multiple
7939 && bl->biv->dest_reg == XEXP (comparison, 0)
7940 && ! reg_used_between_p (regno_reg_rtx[bl->regno], bl->biv->insn,
7948 /* Look for the case where the basic induction variable is always
7949 nonnegative, and equals zero on the last iteration.
7950 In this case, add a reg_note REG_NONNEG, which allows the
7951 m68k DBRA instruction to be used. */
7953 if (((GET_CODE (comparison) == GT
7954 && GET_CODE (XEXP (comparison, 1)) == CONST_INT
7955 && INTVAL (XEXP (comparison, 1)) == -1)
7956 || (GET_CODE (comparison) == NE && XEXP (comparison, 1) == const0_rtx))
7957 && GET_CODE (bl->biv->add_val) == CONST_INT
7958 && INTVAL (bl->biv->add_val) < 0)
7960 /* Initial value must be greater than 0,
7961 init_val % -dec_value == 0 to ensure that it equals zero on
7962 the last iteration */
7964 if (GET_CODE (bl->initial_value) == CONST_INT
7965 && INTVAL (bl->initial_value) > 0
7966 && (INTVAL (bl->initial_value)
7967 % (-INTVAL (bl->biv->add_val))) == 0)
7969 /* register always nonnegative, add REG_NOTE to branch */
7970 if (! find_reg_note (jump, REG_NONNEG, NULL_RTX))
7972 = gen_rtx_EXPR_LIST (REG_NONNEG, bl->biv->dest_reg,
7979 /* If the decrement is 1 and the value was tested as >= 0 before
7980 the loop, then we can safely optimize. */
7981 for (p = loop_start; p; p = PREV_INSN (p))
7983 if (GET_CODE (p) == CODE_LABEL)
7985 if (GET_CODE (p) != JUMP_INSN)
7988 before_comparison = get_condition_for_loop (loop, p);
7989 if (before_comparison
7990 && XEXP (before_comparison, 0) == bl->biv->dest_reg
7991 && GET_CODE (before_comparison) == LT
7992 && XEXP (before_comparison, 1) == const0_rtx
7993 && ! reg_set_between_p (bl->biv->dest_reg, p, loop_start)
7994 && INTVAL (bl->biv->add_val) == -1)
7996 if (! find_reg_note (jump, REG_NONNEG, NULL_RTX))
7998 = gen_rtx_EXPR_LIST (REG_NONNEG, bl->biv->dest_reg,
8006 else if (GET_CODE (bl->biv->add_val) == CONST_INT
8007 && INTVAL (bl->biv->add_val) > 0)
8009 /* Try to change inc to dec, so can apply above optimization. */
8011 all registers modified are induction variables or invariant,
8012 all memory references have non-overlapping addresses
8013 (obviously true if only one write)
8014 allow 2 insns for the compare/jump at the end of the loop. */
8015 /* Also, we must avoid any instructions which use both the reversed
8016 biv and another biv. Such instructions will fail if the loop is
8017 reversed. We meet this condition by requiring that either
8018 no_use_except_counting is true, or else that there is only
8020 int num_nonfixed_reads = 0;
8021 /* 1 if the iteration var is used only to count iterations. */
8022 int no_use_except_counting = 0;
8023 /* 1 if the loop has no memory store, or it has a single memory store
8024 which is reversible. */
8025 int reversible_mem_store = 1;
8027 if (bl->giv_count == 0
8028 && !loop->exit_count
8029 && !loop_info->has_multiple_exit_targets)
8031 rtx bivreg = regno_reg_rtx[bl->regno];
8032 struct iv_class *blt;
8034 /* If there are no givs for this biv, and the only exit is the
8035 fall through at the end of the loop, then
8036 see if perhaps there are no uses except to count. */
8037 no_use_except_counting = 1;
8038 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
8041 rtx set = single_set (p);
8043 if (set && GET_CODE (SET_DEST (set)) == REG
8044 && REGNO (SET_DEST (set)) == bl->regno)
8045 /* An insn that sets the biv is okay. */
8047 else if ((p == prev_nonnote_insn (prev_nonnote_insn (loop_end))
8048 || p == prev_nonnote_insn (loop_end))
8049 && reg_mentioned_p (bivreg, PATTERN (p)))
8051 /* If either of these insns uses the biv and sets a pseudo
8052 that has more than one usage, then the biv has uses
8053 other than counting since it's used to derive a value
8054 that is used more than one time. */
8055 note_stores (PATTERN (p), note_set_pseudo_multiple_uses,
8057 if (regs->multiple_uses)
8059 no_use_except_counting = 0;
8063 else if (reg_mentioned_p (bivreg, PATTERN (p)))
8065 no_use_except_counting = 0;
8070 /* A biv has uses besides counting if it is used to set
8072 for (blt = ivs->list; blt; blt = blt->next)
8074 && reg_mentioned_p (bivreg, SET_SRC (blt->init_set)))
8076 no_use_except_counting = 0;
8081 if (no_use_except_counting)
8082 /* No need to worry about MEMs. */
8084 else if (loop_info->num_mem_sets <= 1)
8086 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
8088 num_nonfixed_reads += count_nonfixed_reads (loop, PATTERN (p));
8090 /* If the loop has a single store, and the destination address is
8091 invariant, then we can't reverse the loop, because this address
8092 might then have the wrong value at loop exit.
8093 This would work if the source was invariant also, however, in that
8094 case, the insn should have been moved out of the loop. */
8096 if (loop_info->num_mem_sets == 1)
8098 struct induction *v;
8100 /* If we could prove that each of the memory locations
8101 written to was different, then we could reverse the
8102 store -- but we don't presently have any way of
8104 reversible_mem_store = 0;
8106 /* If the store depends on a register that is set after the
8107 store, it depends on the initial value, and is thus not
8109 for (v = bl->giv; reversible_mem_store && v; v = v->next_iv)
8111 if (v->giv_type == DEST_REG
8112 && reg_mentioned_p (v->dest_reg,
8113 PATTERN (loop_info->first_loop_store_insn))
8114 && loop_insn_first_p (loop_info->first_loop_store_insn,
8116 reversible_mem_store = 0;
8123 /* This code only acts for innermost loops. Also it simplifies
8124 the memory address check by only reversing loops with
8125 zero or one memory access.
8126 Two memory accesses could involve parts of the same array,
8127 and that can't be reversed.
8128 If the biv is used only for counting, than we don't need to worry
8129 about all these things. */
8131 if ((num_nonfixed_reads <= 1
8132 && ! loop_info->has_nonconst_call
8133 && ! loop_info->has_volatile
8134 && reversible_mem_store
8135 && (bl->giv_count + bl->biv_count + loop_info->num_mem_sets
8136 + num_unmoved_movables (loop) + compare_and_branch == insn_count)
8137 && (bl == ivs->list && bl->next == 0))
8138 || no_use_except_counting)
8142 /* Loop can be reversed. */
8143 if (loop_dump_stream)
8144 fprintf (loop_dump_stream, "Can reverse loop\n");
8146 /* Now check other conditions:
8148 The increment must be a constant, as must the initial value,
8149 and the comparison code must be LT.
8151 This test can probably be improved since +/- 1 in the constant
8152 can be obtained by changing LT to LE and vice versa; this is
8156 /* for constants, LE gets turned into LT */
8157 && (GET_CODE (comparison) == LT
8158 || (GET_CODE (comparison) == LE
8159 && no_use_except_counting)))
8161 HOST_WIDE_INT add_val, add_adjust, comparison_val = 0;
8162 rtx initial_value, comparison_value;
8164 enum rtx_code cmp_code;
8165 int comparison_const_width;
8166 unsigned HOST_WIDE_INT comparison_sign_mask;
8168 add_val = INTVAL (bl->biv->add_val);
8169 comparison_value = XEXP (comparison, 1);
8170 if (GET_MODE (comparison_value) == VOIDmode)
8171 comparison_const_width
8172 = GET_MODE_BITSIZE (GET_MODE (XEXP (comparison, 0)));
8174 comparison_const_width
8175 = GET_MODE_BITSIZE (GET_MODE (comparison_value));
8176 if (comparison_const_width > HOST_BITS_PER_WIDE_INT)
8177 comparison_const_width = HOST_BITS_PER_WIDE_INT;
8178 comparison_sign_mask
8179 = (unsigned HOST_WIDE_INT) 1 << (comparison_const_width - 1);
8181 /* If the comparison value is not a loop invariant, then we
8182 can not reverse this loop.
8184 ??? If the insns which initialize the comparison value as
8185 a whole compute an invariant result, then we could move
8186 them out of the loop and proceed with loop reversal. */
8187 if (! loop_invariant_p (loop, comparison_value))
8190 if (GET_CODE (comparison_value) == CONST_INT)
8191 comparison_val = INTVAL (comparison_value);
8192 initial_value = bl->initial_value;
8194 /* Normalize the initial value if it is an integer and
8195 has no other use except as a counter. This will allow
8196 a few more loops to be reversed. */
8197 if (no_use_except_counting
8198 && GET_CODE (comparison_value) == CONST_INT
8199 && GET_CODE (initial_value) == CONST_INT)
8201 comparison_val = comparison_val - INTVAL (bl->initial_value);
8202 /* The code below requires comparison_val to be a multiple
8203 of add_val in order to do the loop reversal, so
8204 round up comparison_val to a multiple of add_val.
8205 Since comparison_value is constant, we know that the
8206 current comparison code is LT. */
8207 comparison_val = comparison_val + add_val - 1;
8209 -= (unsigned HOST_WIDE_INT) comparison_val % add_val;
8210 /* We postpone overflow checks for COMPARISON_VAL here;
8211 even if there is an overflow, we might still be able to
8212 reverse the loop, if converting the loop exit test to
8214 initial_value = const0_rtx;
8217 /* First check if we can do a vanilla loop reversal. */
8218 if (initial_value == const0_rtx
8219 /* If we have a decrement_and_branch_on_count,
8220 prefer the NE test, since this will allow that
8221 instruction to be generated. Note that we must
8222 use a vanilla loop reversal if the biv is used to
8223 calculate a giv or has a non-counting use. */
8224 #if ! defined (HAVE_decrement_and_branch_until_zero) \
8225 && defined (HAVE_decrement_and_branch_on_count)
8226 && (! (add_val == 1 && loop->vtop
8227 && (bl->biv_count == 0
8228 || no_use_except_counting)))
8230 && GET_CODE (comparison_value) == CONST_INT
8231 /* Now do postponed overflow checks on COMPARISON_VAL. */
8232 && ! (((comparison_val - add_val) ^ INTVAL (comparison_value))
8233 & comparison_sign_mask))
8235 /* Register will always be nonnegative, with value
8236 0 on last iteration */
8237 add_adjust = add_val;
8241 else if (add_val == 1 && loop->vtop
8242 && (bl->biv_count == 0
8243 || no_use_except_counting))
8251 if (GET_CODE (comparison) == LE)
8252 add_adjust -= add_val;
8254 /* If the initial value is not zero, or if the comparison
8255 value is not an exact multiple of the increment, then we
8256 can not reverse this loop. */
8257 if (initial_value == const0_rtx
8258 && GET_CODE (comparison_value) == CONST_INT)
8260 if (((unsigned HOST_WIDE_INT) comparison_val % add_val) != 0)
8265 if (! no_use_except_counting || add_val != 1)
8269 final_value = comparison_value;
8271 /* Reset these in case we normalized the initial value
8272 and comparison value above. */
8273 if (GET_CODE (comparison_value) == CONST_INT
8274 && GET_CODE (initial_value) == CONST_INT)
8276 comparison_value = GEN_INT (comparison_val);
8278 = GEN_INT (comparison_val + INTVAL (bl->initial_value));
8280 bl->initial_value = initial_value;
8282 /* Save some info needed to produce the new insns. */
8283 reg = bl->biv->dest_reg;
8284 jump_label = condjump_label (PREV_INSN (loop_end));
8285 new_add_val = GEN_INT (-INTVAL (bl->biv->add_val));
8287 /* Set start_value; if this is not a CONST_INT, we need
8289 Initialize biv to start_value before loop start.
8290 The old initializing insn will be deleted as a
8291 dead store by flow.c. */
8292 if (initial_value == const0_rtx
8293 && GET_CODE (comparison_value) == CONST_INT)
8295 start_value = GEN_INT (comparison_val - add_adjust);
8296 loop_insn_hoist (loop, gen_move_insn (reg, start_value));
8298 else if (GET_CODE (initial_value) == CONST_INT)
8300 enum machine_mode mode = GET_MODE (reg);
8301 rtx offset = GEN_INT (-INTVAL (initial_value) - add_adjust);
8302 rtx add_insn = gen_add3_insn (reg, comparison_value, offset);
8308 = gen_rtx_PLUS (mode, comparison_value, offset);
8309 loop_insn_hoist (loop, add_insn);
8310 if (GET_CODE (comparison) == LE)
8311 final_value = gen_rtx_PLUS (mode, comparison_value,
8314 else if (! add_adjust)
8316 enum machine_mode mode = GET_MODE (reg);
8317 rtx sub_insn = gen_sub3_insn (reg, comparison_value,
8323 = gen_rtx_MINUS (mode, comparison_value, initial_value);
8324 loop_insn_hoist (loop, sub_insn);
8327 /* We could handle the other cases too, but it'll be
8328 better to have a testcase first. */
8331 /* We may not have a single insn which can increment a reg, so
8332 create a sequence to hold all the insns from expand_inc. */
8334 expand_inc (reg, new_add_val);
8335 tem = gen_sequence ();
8338 p = loop_insn_emit_before (loop, 0, bl->biv->insn, tem);
8339 delete_insn (bl->biv->insn);
8341 /* Update biv info to reflect its new status. */
8343 bl->initial_value = start_value;
8344 bl->biv->add_val = new_add_val;
8346 /* Update loop info. */
8347 loop_info->initial_value = reg;
8348 loop_info->initial_equiv_value = reg;
8349 loop_info->final_value = const0_rtx;
8350 loop_info->final_equiv_value = const0_rtx;
8351 loop_info->comparison_value = const0_rtx;
8352 loop_info->comparison_code = cmp_code;
8353 loop_info->increment = new_add_val;
8355 /* Inc LABEL_NUSES so that delete_insn will
8356 not delete the label. */
8357 LABEL_NUSES (XEXP (jump_label, 0))++;
8359 /* Emit an insn after the end of the loop to set the biv's
8360 proper exit value if it is used anywhere outside the loop. */
8361 if ((REGNO_LAST_UID (bl->regno) != INSN_UID (first_compare))
8363 || REGNO_FIRST_UID (bl->regno) != INSN_UID (bl->init_insn))
8364 loop_insn_sink (loop, gen_move_insn (reg, final_value));
8366 /* Delete compare/branch at end of loop. */
8367 delete_related_insns (PREV_INSN (loop_end));
8368 if (compare_and_branch == 2)
8369 delete_related_insns (first_compare);
8371 /* Add new compare/branch insn at end of loop. */
8373 emit_cmp_and_jump_insns (reg, const0_rtx, cmp_code, NULL_RTX,
8375 XEXP (jump_label, 0));
8376 tem = gen_sequence ();
8378 emit_jump_insn_before (tem, loop_end);
8380 for (tem = PREV_INSN (loop_end);
8381 tem && GET_CODE (tem) != JUMP_INSN;
8382 tem = PREV_INSN (tem))
8386 JUMP_LABEL (tem) = XEXP (jump_label, 0);
8392 /* Increment of LABEL_NUSES done above. */
8393 /* Register is now always nonnegative,
8394 so add REG_NONNEG note to the branch. */
8395 REG_NOTES (tem) = gen_rtx_EXPR_LIST (REG_NONNEG, reg,
8401 /* No insn may reference both the reversed and another biv or it
8402 will fail (see comment near the top of the loop reversal
8404 Earlier on, we have verified that the biv has no use except
8405 counting, or it is the only biv in this function.
8406 However, the code that computes no_use_except_counting does
8407 not verify reg notes. It's possible to have an insn that
8408 references another biv, and has a REG_EQUAL note with an
8409 expression based on the reversed biv. To avoid this case,
8410 remove all REG_EQUAL notes based on the reversed biv
8412 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
8416 rtx set = single_set (p);
8417 /* If this is a set of a GIV based on the reversed biv, any
8418 REG_EQUAL notes should still be correct. */
8420 || GET_CODE (SET_DEST (set)) != REG
8421 || (size_t) REGNO (SET_DEST (set)) >= ivs->n_regs
8422 || REG_IV_TYPE (ivs, REGNO (SET_DEST (set))) != GENERAL_INDUCT
8423 || REG_IV_INFO (ivs, REGNO (SET_DEST (set)))->src_reg != bl->biv->src_reg)
8424 for (pnote = ®_NOTES (p); *pnote;)
8426 if (REG_NOTE_KIND (*pnote) == REG_EQUAL
8427 && reg_mentioned_p (regno_reg_rtx[bl->regno],
8429 *pnote = XEXP (*pnote, 1);
8431 pnote = &XEXP (*pnote, 1);
8435 /* Mark that this biv has been reversed. Each giv which depends
8436 on this biv, and which is also live past the end of the loop
8437 will have to be fixed up. */
8441 if (loop_dump_stream)
8443 fprintf (loop_dump_stream, "Reversed loop");
8445 fprintf (loop_dump_stream, " and added reg_nonneg\n");
8447 fprintf (loop_dump_stream, "\n");
8458 /* Verify whether the biv BL appears to be eliminable,
8459 based on the insns in the loop that refer to it.
8461 If ELIMINATE_P is non-zero, actually do the elimination.
8463 THRESHOLD and INSN_COUNT are from loop_optimize and are used to
8464 determine whether invariant insns should be placed inside or at the
8465 start of the loop. */
8468 maybe_eliminate_biv (loop, bl, eliminate_p, threshold, insn_count)
8469 const struct loop *loop;
8470 struct iv_class *bl;
8472 int threshold, insn_count;
8474 struct loop_ivs *ivs = LOOP_IVS (loop);
8475 rtx reg = bl->biv->dest_reg;
8478 /* Scan all insns in the loop, stopping if we find one that uses the
8479 biv in a way that we cannot eliminate. */
8481 for (p = loop->start; p != loop->end; p = NEXT_INSN (p))
8483 enum rtx_code code = GET_CODE (p);
8484 basic_block where_bb = 0;
8485 rtx where_insn = threshold >= insn_count ? 0 : p;
8487 /* If this is a libcall that sets a giv, skip ahead to its end. */
8488 if (GET_RTX_CLASS (code) == 'i')
8490 rtx note = find_reg_note (p, REG_LIBCALL, NULL_RTX);
8494 rtx last = XEXP (note, 0);
8495 rtx set = single_set (last);
8497 if (set && GET_CODE (SET_DEST (set)) == REG)
8499 unsigned int regno = REGNO (SET_DEST (set));
8501 if (regno < ivs->n_regs
8502 && REG_IV_TYPE (ivs, regno) == GENERAL_INDUCT
8503 && REG_IV_INFO (ivs, regno)->src_reg == bl->biv->src_reg)
8508 if ((code == INSN || code == JUMP_INSN || code == CALL_INSN)
8509 && reg_mentioned_p (reg, PATTERN (p))
8510 && ! maybe_eliminate_biv_1 (loop, PATTERN (p), p, bl,
8511 eliminate_p, where_bb, where_insn))
8513 if (loop_dump_stream)
8514 fprintf (loop_dump_stream,
8515 "Cannot eliminate biv %d: biv used in insn %d.\n",
8516 bl->regno, INSN_UID (p));
8523 if (loop_dump_stream)
8524 fprintf (loop_dump_stream, "biv %d %s eliminated.\n",
8525 bl->regno, eliminate_p ? "was" : "can be");
8532 /* INSN and REFERENCE are instructions in the same insn chain.
8533 Return non-zero if INSN is first. */
8536 loop_insn_first_p (insn, reference)
8537 rtx insn, reference;
8541 for (p = insn, q = reference;;)
8543 /* Start with test for not first so that INSN == REFERENCE yields not
8545 if (q == insn || ! p)
8547 if (p == reference || ! q)
8550 /* Either of P or Q might be a NOTE. Notes have the same LUID as the
8551 previous insn, hence the <= comparison below does not work if
8553 if (INSN_UID (p) < max_uid_for_loop
8554 && INSN_UID (q) < max_uid_for_loop
8555 && GET_CODE (p) != NOTE)
8556 return INSN_LUID (p) <= INSN_LUID (q);
8558 if (INSN_UID (p) >= max_uid_for_loop
8559 || GET_CODE (p) == NOTE)
8561 if (INSN_UID (q) >= max_uid_for_loop)
8566 /* We are trying to eliminate BIV in INSN using GIV. Return non-zero if
8567 the offset that we have to take into account due to auto-increment /
8568 div derivation is zero. */
8570 biv_elimination_giv_has_0_offset (biv, giv, insn)
8571 struct induction *biv, *giv;
8574 /* If the giv V had the auto-inc address optimization applied
8575 to it, and INSN occurs between the giv insn and the biv
8576 insn, then we'd have to adjust the value used here.
8577 This is rare, so we don't bother to make this possible. */
8578 if (giv->auto_inc_opt
8579 && ((loop_insn_first_p (giv->insn, insn)
8580 && loop_insn_first_p (insn, biv->insn))
8581 || (loop_insn_first_p (biv->insn, insn)
8582 && loop_insn_first_p (insn, giv->insn))))
8588 /* If BL appears in X (part of the pattern of INSN), see if we can
8589 eliminate its use. If so, return 1. If not, return 0.
8591 If BIV does not appear in X, return 1.
8593 If ELIMINATE_P is non-zero, actually do the elimination.
8594 WHERE_INSN/WHERE_BB indicate where extra insns should be added.
8595 Depending on how many items have been moved out of the loop, it
8596 will either be before INSN (when WHERE_INSN is non-zero) or at the
8597 start of the loop (when WHERE_INSN is zero). */
8600 maybe_eliminate_biv_1 (loop, x, insn, bl, eliminate_p, where_bb, where_insn)
8601 const struct loop *loop;
8603 struct iv_class *bl;
8605 basic_block where_bb;
8608 enum rtx_code code = GET_CODE (x);
8609 rtx reg = bl->biv->dest_reg;
8610 enum machine_mode mode = GET_MODE (reg);
8611 struct induction *v;
8623 /* If we haven't already been able to do something with this BIV,
8624 we can't eliminate it. */
8630 /* If this sets the BIV, it is not a problem. */
8631 if (SET_DEST (x) == reg)
8634 /* If this is an insn that defines a giv, it is also ok because
8635 it will go away when the giv is reduced. */
8636 for (v = bl->giv; v; v = v->next_iv)
8637 if (v->giv_type == DEST_REG && SET_DEST (x) == v->dest_reg)
8641 if (SET_DEST (x) == cc0_rtx && SET_SRC (x) == reg)
8643 /* Can replace with any giv that was reduced and
8644 that has (MULT_VAL != 0) and (ADD_VAL == 0).
8645 Require a constant for MULT_VAL, so we know it's nonzero.
8646 ??? We disable this optimization to avoid potential
8649 for (v = bl->giv; v; v = v->next_iv)
8650 if (GET_CODE (v->mult_val) == CONST_INT && v->mult_val != const0_rtx
8651 && v->add_val == const0_rtx
8652 && ! v->ignore && ! v->maybe_dead && v->always_computable
8656 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8662 /* If the giv has the opposite direction of change,
8663 then reverse the comparison. */
8664 if (INTVAL (v->mult_val) < 0)
8665 new = gen_rtx_COMPARE (GET_MODE (v->new_reg),
8666 const0_rtx, v->new_reg);
8670 /* We can probably test that giv's reduced reg. */
8671 if (validate_change (insn, &SET_SRC (x), new, 0))
8675 /* Look for a giv with (MULT_VAL != 0) and (ADD_VAL != 0);
8676 replace test insn with a compare insn (cmp REDUCED_GIV ADD_VAL).
8677 Require a constant for MULT_VAL, so we know it's nonzero.
8678 ??? Do this only if ADD_VAL is a pointer to avoid a potential
8679 overflow problem. */
8681 for (v = bl->giv; v; v = v->next_iv)
8682 if (GET_CODE (v->mult_val) == CONST_INT
8683 && v->mult_val != const0_rtx
8684 && ! v->ignore && ! v->maybe_dead && v->always_computable
8686 && (GET_CODE (v->add_val) == SYMBOL_REF
8687 || GET_CODE (v->add_val) == LABEL_REF
8688 || GET_CODE (v->add_val) == CONST
8689 || (GET_CODE (v->add_val) == REG
8690 && REG_POINTER (v->add_val))))
8692 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8698 /* If the giv has the opposite direction of change,
8699 then reverse the comparison. */
8700 if (INTVAL (v->mult_val) < 0)
8701 new = gen_rtx_COMPARE (VOIDmode, copy_rtx (v->add_val),
8704 new = gen_rtx_COMPARE (VOIDmode, v->new_reg,
8705 copy_rtx (v->add_val));
8707 /* Replace biv with the giv's reduced register. */
8708 update_reg_last_use (v->add_val, insn);
8709 if (validate_change (insn, &SET_SRC (PATTERN (insn)), new, 0))
8712 /* Insn doesn't support that constant or invariant. Copy it
8713 into a register (it will be a loop invariant.) */
8714 tem = gen_reg_rtx (GET_MODE (v->new_reg));
8716 loop_insn_emit_before (loop, 0, where_insn,
8718 copy_rtx (v->add_val)));
8720 /* Substitute the new register for its invariant value in
8721 the compare expression. */
8722 XEXP (new, (INTVAL (v->mult_val) < 0) ? 0 : 1) = tem;
8723 if (validate_change (insn, &SET_SRC (PATTERN (insn)), new, 0))
8732 case GT: case GE: case GTU: case GEU:
8733 case LT: case LE: case LTU: case LEU:
8734 /* See if either argument is the biv. */
8735 if (XEXP (x, 0) == reg)
8736 arg = XEXP (x, 1), arg_operand = 1;
8737 else if (XEXP (x, 1) == reg)
8738 arg = XEXP (x, 0), arg_operand = 0;
8742 if (CONSTANT_P (arg))
8744 /* First try to replace with any giv that has constant positive
8745 mult_val and constant add_val. We might be able to support
8746 negative mult_val, but it seems complex to do it in general. */
8748 for (v = bl->giv; v; v = v->next_iv)
8749 if (GET_CODE (v->mult_val) == CONST_INT
8750 && INTVAL (v->mult_val) > 0
8751 && (GET_CODE (v->add_val) == SYMBOL_REF
8752 || GET_CODE (v->add_val) == LABEL_REF
8753 || GET_CODE (v->add_val) == CONST
8754 || (GET_CODE (v->add_val) == REG
8755 && REG_POINTER (v->add_val)))
8756 && ! v->ignore && ! v->maybe_dead && v->always_computable
8759 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8765 /* Replace biv with the giv's reduced reg. */
8766 validate_change (insn, &XEXP (x, 1 - arg_operand), v->new_reg, 1);
8768 /* If all constants are actually constant integers and
8769 the derived constant can be directly placed in the COMPARE,
8771 if (GET_CODE (arg) == CONST_INT
8772 && GET_CODE (v->mult_val) == CONST_INT
8773 && GET_CODE (v->add_val) == CONST_INT)
8775 validate_change (insn, &XEXP (x, arg_operand),
8776 GEN_INT (INTVAL (arg)
8777 * INTVAL (v->mult_val)
8778 + INTVAL (v->add_val)), 1);
8782 /* Otherwise, load it into a register. */
8783 tem = gen_reg_rtx (mode);
8784 loop_iv_add_mult_emit_before (loop, arg,
8785 v->mult_val, v->add_val,
8786 tem, where_bb, where_insn);
8787 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
8789 if (apply_change_group ())
8793 /* Look for giv with positive constant mult_val and nonconst add_val.
8794 Insert insns to calculate new compare value.
8795 ??? Turn this off due to possible overflow. */
8797 for (v = bl->giv; v; v = v->next_iv)
8798 if (GET_CODE (v->mult_val) == CONST_INT
8799 && INTVAL (v->mult_val) > 0
8800 && ! v->ignore && ! v->maybe_dead && v->always_computable
8806 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8812 tem = gen_reg_rtx (mode);
8814 /* Replace biv with giv's reduced register. */
8815 validate_change (insn, &XEXP (x, 1 - arg_operand),
8818 /* Compute value to compare against. */
8819 loop_iv_add_mult_emit_before (loop, arg,
8820 v->mult_val, v->add_val,
8821 tem, where_bb, where_insn);
8822 /* Use it in this insn. */
8823 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
8824 if (apply_change_group ())
8828 else if (GET_CODE (arg) == REG || GET_CODE (arg) == MEM)
8830 if (loop_invariant_p (loop, arg) == 1)
8832 /* Look for giv with constant positive mult_val and nonconst
8833 add_val. Insert insns to compute new compare value.
8834 ??? Turn this off due to possible overflow. */
8836 for (v = bl->giv; v; v = v->next_iv)
8837 if (GET_CODE (v->mult_val) == CONST_INT && INTVAL (v->mult_val) > 0
8838 && ! v->ignore && ! v->maybe_dead && v->always_computable
8844 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8850 tem = gen_reg_rtx (mode);
8852 /* Replace biv with giv's reduced register. */
8853 validate_change (insn, &XEXP (x, 1 - arg_operand),
8856 /* Compute value to compare against. */
8857 loop_iv_add_mult_emit_before (loop, arg,
8858 v->mult_val, v->add_val,
8859 tem, where_bb, where_insn);
8860 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
8861 if (apply_change_group ())
8866 /* This code has problems. Basically, you can't know when
8867 seeing if we will eliminate BL, whether a particular giv
8868 of ARG will be reduced. If it isn't going to be reduced,
8869 we can't eliminate BL. We can try forcing it to be reduced,
8870 but that can generate poor code.
8872 The problem is that the benefit of reducing TV, below should
8873 be increased if BL can actually be eliminated, but this means
8874 we might have to do a topological sort of the order in which
8875 we try to process biv. It doesn't seem worthwhile to do
8876 this sort of thing now. */
8879 /* Otherwise the reg compared with had better be a biv. */
8880 if (GET_CODE (arg) != REG
8881 || REG_IV_TYPE (ivs, REGNO (arg)) != BASIC_INDUCT)
8884 /* Look for a pair of givs, one for each biv,
8885 with identical coefficients. */
8886 for (v = bl->giv; v; v = v->next_iv)
8888 struct induction *tv;
8890 if (v->ignore || v->maybe_dead || v->mode != mode)
8893 for (tv = REG_IV_CLASS (ivs, REGNO (arg))->giv; tv;
8895 if (! tv->ignore && ! tv->maybe_dead
8896 && rtx_equal_p (tv->mult_val, v->mult_val)
8897 && rtx_equal_p (tv->add_val, v->add_val)
8898 && tv->mode == mode)
8900 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8906 /* Replace biv with its giv's reduced reg. */
8907 XEXP (x, 1 - arg_operand) = v->new_reg;
8908 /* Replace other operand with the other giv's
8910 XEXP (x, arg_operand) = tv->new_reg;
8917 /* If we get here, the biv can't be eliminated. */
8921 /* If this address is a DEST_ADDR giv, it doesn't matter if the
8922 biv is used in it, since it will be replaced. */
8923 for (v = bl->giv; v; v = v->next_iv)
8924 if (v->giv_type == DEST_ADDR && v->location == &XEXP (x, 0))
8932 /* See if any subexpression fails elimination. */
8933 fmt = GET_RTX_FORMAT (code);
8934 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
8939 if (! maybe_eliminate_biv_1 (loop, XEXP (x, i), insn, bl,
8940 eliminate_p, where_bb, where_insn))
8945 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
8946 if (! maybe_eliminate_biv_1 (loop, XVECEXP (x, i, j), insn, bl,
8947 eliminate_p, where_bb, where_insn))
8956 /* Return nonzero if the last use of REG
8957 is in an insn following INSN in the same basic block. */
8960 last_use_this_basic_block (reg, insn)
8966 n && GET_CODE (n) != CODE_LABEL && GET_CODE (n) != JUMP_INSN;
8969 if (REGNO_LAST_UID (REGNO (reg)) == INSN_UID (n))
8975 /* Called via `note_stores' to record the initial value of a biv. Here we
8976 just record the location of the set and process it later. */
8979 record_initial (dest, set, data)
8982 void *data ATTRIBUTE_UNUSED;
8984 struct loop_ivs *ivs = (struct loop_ivs *) data;
8985 struct iv_class *bl;
8987 if (GET_CODE (dest) != REG
8988 || REGNO (dest) >= ivs->n_regs
8989 || REG_IV_TYPE (ivs, REGNO (dest)) != BASIC_INDUCT)
8992 bl = REG_IV_CLASS (ivs, REGNO (dest));
8994 /* If this is the first set found, record it. */
8995 if (bl->init_insn == 0)
8997 bl->init_insn = note_insn;
9002 /* If any of the registers in X are "old" and currently have a last use earlier
9003 than INSN, update them to have a last use of INSN. Their actual last use
9004 will be the previous insn but it will not have a valid uid_luid so we can't
9005 use it. X must be a source expression only. */
9008 update_reg_last_use (x, insn)
9012 /* Check for the case where INSN does not have a valid luid. In this case,
9013 there is no need to modify the regno_last_uid, as this can only happen
9014 when code is inserted after the loop_end to set a pseudo's final value,
9015 and hence this insn will never be the last use of x.
9016 ???? This comment is not correct. See for example loop_givs_reduce.
9017 This may insert an insn before another new insn. */
9018 if (GET_CODE (x) == REG && REGNO (x) < max_reg_before_loop
9019 && INSN_UID (insn) < max_uid_for_loop
9020 && REGNO_LAST_LUID (REGNO (x)) < INSN_LUID (insn))
9022 REGNO_LAST_UID (REGNO (x)) = INSN_UID (insn);
9027 const char *fmt = GET_RTX_FORMAT (GET_CODE (x));
9028 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
9031 update_reg_last_use (XEXP (x, i), insn);
9032 else if (fmt[i] == 'E')
9033 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
9034 update_reg_last_use (XVECEXP (x, i, j), insn);
9039 /* Given an insn INSN and condition COND, return the condition in a
9040 canonical form to simplify testing by callers. Specifically:
9042 (1) The code will always be a comparison operation (EQ, NE, GT, etc.).
9043 (2) Both operands will be machine operands; (cc0) will have been replaced.
9044 (3) If an operand is a constant, it will be the second operand.
9045 (4) (LE x const) will be replaced with (LT x <const+1>) and similarly
9046 for GE, GEU, and LEU.
9048 If the condition cannot be understood, or is an inequality floating-point
9049 comparison which needs to be reversed, 0 will be returned.
9051 If REVERSE is non-zero, then reverse the condition prior to canonizing it.
9053 If EARLIEST is non-zero, it is a pointer to a place where the earliest
9054 insn used in locating the condition was found. If a replacement test
9055 of the condition is desired, it should be placed in front of that
9056 insn and we will be sure that the inputs are still valid.
9058 If WANT_REG is non-zero, we wish the condition to be relative to that
9059 register, if possible. Therefore, do not canonicalize the condition
9063 canonicalize_condition (insn, cond, reverse, earliest, want_reg)
9075 int reverse_code = 0;
9076 enum machine_mode mode;
9078 code = GET_CODE (cond);
9079 mode = GET_MODE (cond);
9080 op0 = XEXP (cond, 0);
9081 op1 = XEXP (cond, 1);
9084 code = reversed_comparison_code (cond, insn);
9085 if (code == UNKNOWN)
9091 /* If we are comparing a register with zero, see if the register is set
9092 in the previous insn to a COMPARE or a comparison operation. Perform
9093 the same tests as a function of STORE_FLAG_VALUE as find_comparison_args
9096 while (GET_RTX_CLASS (code) == '<'
9097 && op1 == CONST0_RTX (GET_MODE (op0))
9100 /* Set non-zero when we find something of interest. */
9104 /* If comparison with cc0, import actual comparison from compare
9108 if ((prev = prev_nonnote_insn (prev)) == 0
9109 || GET_CODE (prev) != INSN
9110 || (set = single_set (prev)) == 0
9111 || SET_DEST (set) != cc0_rtx)
9114 op0 = SET_SRC (set);
9115 op1 = CONST0_RTX (GET_MODE (op0));
9121 /* If this is a COMPARE, pick up the two things being compared. */
9122 if (GET_CODE (op0) == COMPARE)
9124 op1 = XEXP (op0, 1);
9125 op0 = XEXP (op0, 0);
9128 else if (GET_CODE (op0) != REG)
9131 /* Go back to the previous insn. Stop if it is not an INSN. We also
9132 stop if it isn't a single set or if it has a REG_INC note because
9133 we don't want to bother dealing with it. */
9135 if ((prev = prev_nonnote_insn (prev)) == 0
9136 || GET_CODE (prev) != INSN
9137 || FIND_REG_INC_NOTE (prev, NULL_RTX))
9140 set = set_of (op0, prev);
9143 && (GET_CODE (set) != SET
9144 || !rtx_equal_p (SET_DEST (set), op0)))
9147 /* If this is setting OP0, get what it sets it to if it looks
9151 enum machine_mode inner_mode = GET_MODE (SET_DEST (set));
9153 /* ??? We may not combine comparisons done in a CCmode with
9154 comparisons not done in a CCmode. This is to aid targets
9155 like Alpha that have an IEEE compliant EQ instruction, and
9156 a non-IEEE compliant BEQ instruction. The use of CCmode is
9157 actually artificial, simply to prevent the combination, but
9158 should not affect other platforms.
9160 However, we must allow VOIDmode comparisons to match either
9161 CCmode or non-CCmode comparison, because some ports have
9162 modeless comparisons inside branch patterns.
9164 ??? This mode check should perhaps look more like the mode check
9165 in simplify_comparison in combine. */
9167 if ((GET_CODE (SET_SRC (set)) == COMPARE
9170 && GET_MODE_CLASS (inner_mode) == MODE_INT
9171 && (GET_MODE_BITSIZE (inner_mode)
9172 <= HOST_BITS_PER_WIDE_INT)
9173 && (STORE_FLAG_VALUE
9174 & ((HOST_WIDE_INT) 1
9175 << (GET_MODE_BITSIZE (inner_mode) - 1))))
9176 #ifdef FLOAT_STORE_FLAG_VALUE
9178 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
9179 && (REAL_VALUE_NEGATIVE
9180 (FLOAT_STORE_FLAG_VALUE (inner_mode))))
9183 && GET_RTX_CLASS (GET_CODE (SET_SRC (set))) == '<'))
9184 && (((GET_MODE_CLASS (mode) == MODE_CC)
9185 == (GET_MODE_CLASS (inner_mode) == MODE_CC))
9186 || mode == VOIDmode || inner_mode == VOIDmode))
9188 else if (((code == EQ
9190 && (GET_MODE_BITSIZE (inner_mode)
9191 <= HOST_BITS_PER_WIDE_INT)
9192 && GET_MODE_CLASS (inner_mode) == MODE_INT
9193 && (STORE_FLAG_VALUE
9194 & ((HOST_WIDE_INT) 1
9195 << (GET_MODE_BITSIZE (inner_mode) - 1))))
9196 #ifdef FLOAT_STORE_FLAG_VALUE
9198 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
9199 && (REAL_VALUE_NEGATIVE
9200 (FLOAT_STORE_FLAG_VALUE (inner_mode))))
9203 && GET_RTX_CLASS (GET_CODE (SET_SRC (set))) == '<'
9204 && (((GET_MODE_CLASS (mode) == MODE_CC)
9205 == (GET_MODE_CLASS (inner_mode) == MODE_CC))
9206 || mode == VOIDmode || inner_mode == VOIDmode))
9216 else if (reg_set_p (op0, prev))
9217 /* If this sets OP0, but not directly, we have to give up. */
9222 if (GET_RTX_CLASS (GET_CODE (x)) == '<')
9223 code = GET_CODE (x);
9226 code = reversed_comparison_code (x, prev);
9227 if (code == UNKNOWN)
9232 op0 = XEXP (x, 0), op1 = XEXP (x, 1);
9238 /* If constant is first, put it last. */
9239 if (CONSTANT_P (op0))
9240 code = swap_condition (code), tem = op0, op0 = op1, op1 = tem;
9242 /* If OP0 is the result of a comparison, we weren't able to find what
9243 was really being compared, so fail. */
9244 if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_CC)
9247 /* Canonicalize any ordered comparison with integers involving equality
9248 if we can do computations in the relevant mode and we do not
9251 if (GET_CODE (op1) == CONST_INT
9252 && GET_MODE (op0) != VOIDmode
9253 && GET_MODE_BITSIZE (GET_MODE (op0)) <= HOST_BITS_PER_WIDE_INT)
9255 HOST_WIDE_INT const_val = INTVAL (op1);
9256 unsigned HOST_WIDE_INT uconst_val = const_val;
9257 unsigned HOST_WIDE_INT max_val
9258 = (unsigned HOST_WIDE_INT) GET_MODE_MASK (GET_MODE (op0));
9263 if ((unsigned HOST_WIDE_INT) const_val != max_val >> 1)
9264 code = LT, op1 = GEN_INT (const_val + 1);
9267 /* When cross-compiling, const_val might be sign-extended from
9268 BITS_PER_WORD to HOST_BITS_PER_WIDE_INT */
9270 if ((HOST_WIDE_INT) (const_val & max_val)
9271 != (((HOST_WIDE_INT) 1
9272 << (GET_MODE_BITSIZE (GET_MODE (op0)) - 1))))
9273 code = GT, op1 = GEN_INT (const_val - 1);
9277 if (uconst_val < max_val)
9278 code = LTU, op1 = GEN_INT (uconst_val + 1);
9282 if (uconst_val != 0)
9283 code = GTU, op1 = GEN_INT (uconst_val - 1);
9292 /* Never return CC0; return zero instead. */
9297 return gen_rtx_fmt_ee (code, VOIDmode, op0, op1);
9300 /* Given a jump insn JUMP, return the condition that will cause it to branch
9301 to its JUMP_LABEL. If the condition cannot be understood, or is an
9302 inequality floating-point comparison which needs to be reversed, 0 will
9305 If EARLIEST is non-zero, it is a pointer to a place where the earliest
9306 insn used in locating the condition was found. If a replacement test
9307 of the condition is desired, it should be placed in front of that
9308 insn and we will be sure that the inputs are still valid. */
9311 get_condition (jump, earliest)
9319 /* If this is not a standard conditional jump, we can't parse it. */
9320 if (GET_CODE (jump) != JUMP_INSN
9321 || ! any_condjump_p (jump))
9323 set = pc_set (jump);
9325 cond = XEXP (SET_SRC (set), 0);
9327 /* If this branches to JUMP_LABEL when the condition is false, reverse
9330 = GET_CODE (XEXP (SET_SRC (set), 2)) == LABEL_REF
9331 && XEXP (XEXP (SET_SRC (set), 2), 0) == JUMP_LABEL (jump);
9333 return canonicalize_condition (jump, cond, reverse, earliest, NULL_RTX);
9336 /* Similar to above routine, except that we also put an invariant last
9337 unless both operands are invariants. */
9340 get_condition_for_loop (loop, x)
9341 const struct loop *loop;
9344 rtx comparison = get_condition (x, (rtx*) 0);
9347 || ! loop_invariant_p (loop, XEXP (comparison, 0))
9348 || loop_invariant_p (loop, XEXP (comparison, 1)))
9351 return gen_rtx_fmt_ee (swap_condition (GET_CODE (comparison)), VOIDmode,
9352 XEXP (comparison, 1), XEXP (comparison, 0));
9355 /* Scan the function and determine whether it has indirect (computed) jumps.
9357 This is taken mostly from flow.c; similar code exists elsewhere
9358 in the compiler. It may be useful to put this into rtlanal.c. */
9360 indirect_jump_in_function_p (start)
9365 for (insn = start; insn; insn = NEXT_INSN (insn))
9366 if (computed_jump_p (insn))
9372 /* Add MEM to the LOOP_MEMS array, if appropriate. See the
9373 documentation for LOOP_MEMS for the definition of `appropriate'.
9374 This function is called from prescan_loop via for_each_rtx. */
9377 insert_loop_mem (mem, data)
9379 void *data ATTRIBUTE_UNUSED;
9381 struct loop_info *loop_info = data;
9388 switch (GET_CODE (m))
9394 /* We're not interested in MEMs that are only clobbered. */
9398 /* We're not interested in the MEM associated with a
9399 CONST_DOUBLE, so there's no need to traverse into this. */
9403 /* We're not interested in any MEMs that only appear in notes. */
9407 /* This is not a MEM. */
9411 /* See if we've already seen this MEM. */
9412 for (i = 0; i < loop_info->mems_idx; ++i)
9413 if (rtx_equal_p (m, loop_info->mems[i].mem))
9415 if (GET_MODE (m) != GET_MODE (loop_info->mems[i].mem))
9416 /* The modes of the two memory accesses are different. If
9417 this happens, something tricky is going on, and we just
9418 don't optimize accesses to this MEM. */
9419 loop_info->mems[i].optimize = 0;
9424 /* Resize the array, if necessary. */
9425 if (loop_info->mems_idx == loop_info->mems_allocated)
9427 if (loop_info->mems_allocated != 0)
9428 loop_info->mems_allocated *= 2;
9430 loop_info->mems_allocated = 32;
9432 loop_info->mems = (loop_mem_info *)
9433 xrealloc (loop_info->mems,
9434 loop_info->mems_allocated * sizeof (loop_mem_info));
9437 /* Actually insert the MEM. */
9438 loop_info->mems[loop_info->mems_idx].mem = m;
9439 /* We can't hoist this MEM out of the loop if it's a BLKmode MEM
9440 because we can't put it in a register. We still store it in the
9441 table, though, so that if we see the same address later, but in a
9442 non-BLK mode, we'll not think we can optimize it at that point. */
9443 loop_info->mems[loop_info->mems_idx].optimize = (GET_MODE (m) != BLKmode);
9444 loop_info->mems[loop_info->mems_idx].reg = NULL_RTX;
9445 ++loop_info->mems_idx;
9451 /* Allocate REGS->ARRAY or reallocate it if it is too small.
9453 Increment REGS->ARRAY[I].SET_IN_LOOP at the index I of each
9454 register that is modified by an insn between FROM and TO. If the
9455 value of an element of REGS->array[I].SET_IN_LOOP becomes 127 or
9456 more, stop incrementing it, to avoid overflow.
9458 Store in REGS->ARRAY[I].SINGLE_USAGE the single insn in which
9459 register I is used, if it is only used once. Otherwise, it is set
9460 to 0 (for no uses) or const0_rtx for more than one use. This
9461 parameter may be zero, in which case this processing is not done.
9463 Set REGS->ARRAY[I].MAY_NOT_OPTIMIZE nonzero if we should not
9464 optimize register I. */
9467 loop_regs_scan (loop, extra_size)
9468 const struct loop *loop;
9471 struct loop_regs *regs = LOOP_REGS (loop);
9473 /* last_set[n] is nonzero iff reg n has been set in the current
9474 basic block. In that case, it is the insn that last set reg n. */
9479 old_nregs = regs->num;
9480 regs->num = max_reg_num ();
9482 /* Grow the regs array if not allocated or too small. */
9483 if (regs->num >= regs->size)
9485 regs->size = regs->num + extra_size;
9487 regs->array = (struct loop_reg *)
9488 xrealloc (regs->array, regs->size * sizeof (*regs->array));
9490 /* Zero the new elements. */
9491 memset (regs->array + old_nregs, 0,
9492 (regs->size - old_nregs) * sizeof (*regs->array));
9495 /* Clear previously scanned fields but do not clear n_times_set. */
9496 for (i = 0; i < old_nregs; i++)
9498 regs->array[i].set_in_loop = 0;
9499 regs->array[i].may_not_optimize = 0;
9500 regs->array[i].single_usage = NULL_RTX;
9503 last_set = (rtx *) xcalloc (regs->num, sizeof (rtx));
9505 /* Scan the loop, recording register usage. */
9506 for (insn = loop->top ? loop->top : loop->start; insn != loop->end;
9507 insn = NEXT_INSN (insn))
9511 /* Record registers that have exactly one use. */
9512 find_single_use_in_loop (regs, insn, PATTERN (insn));
9514 /* Include uses in REG_EQUAL notes. */
9515 if (REG_NOTES (insn))
9516 find_single_use_in_loop (regs, insn, REG_NOTES (insn));
9518 if (GET_CODE (PATTERN (insn)) == SET
9519 || GET_CODE (PATTERN (insn)) == CLOBBER)
9520 count_one_set (regs, insn, PATTERN (insn), last_set);
9521 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
9524 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
9525 count_one_set (regs, insn, XVECEXP (PATTERN (insn), 0, i),
9530 if (GET_CODE (insn) == CODE_LABEL || GET_CODE (insn) == JUMP_INSN)
9531 memset (last_set, 0, regs->num * sizeof (rtx));
9534 /* Invalidate all hard registers clobbered by calls. With one exception:
9535 a call-clobbered PIC register is still function-invariant for our
9536 purposes, since we can hoist any PIC calculations out of the loop.
9537 Thus the call to rtx_varies_p. */
9538 if (LOOP_INFO (loop)->has_call)
9539 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
9540 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i)
9541 && rtx_varies_p (gen_rtx_REG (Pmode, i), /*for_alias=*/1))
9543 regs->array[i].may_not_optimize = 1;
9544 regs->array[i].set_in_loop = 1;
9547 #ifdef AVOID_CCMODE_COPIES
9548 /* Don't try to move insns which set CC registers if we should not
9549 create CCmode register copies. */
9550 for (i = regs->num - 1; i >= FIRST_PSEUDO_REGISTER; i--)
9551 if (GET_MODE_CLASS (GET_MODE (regno_reg_rtx[i])) == MODE_CC)
9552 regs->array[i].may_not_optimize = 1;
9555 /* Set regs->array[I].n_times_set for the new registers. */
9556 for (i = old_nregs; i < regs->num; i++)
9557 regs->array[i].n_times_set = regs->array[i].set_in_loop;
9562 /* Returns the number of real INSNs in the LOOP. */
9565 count_insns_in_loop (loop)
9566 const struct loop *loop;
9571 for (insn = loop->top ? loop->top : loop->start; insn != loop->end;
9572 insn = NEXT_INSN (insn))
9579 /* Move MEMs into registers for the duration of the loop. */
9583 const struct loop *loop;
9585 struct loop_info *loop_info = LOOP_INFO (loop);
9586 struct loop_regs *regs = LOOP_REGS (loop);
9587 int maybe_never = 0;
9589 rtx p, prev_ebb_head;
9590 rtx label = NULL_RTX;
9592 /* Nonzero if the next instruction may never be executed. */
9593 int next_maybe_never = 0;
9594 unsigned int last_max_reg = max_reg_num ();
9596 if (loop_info->mems_idx == 0)
9599 /* We cannot use next_label here because it skips over normal insns. */
9600 end_label = next_nonnote_insn (loop->end);
9601 if (end_label && GET_CODE (end_label) != CODE_LABEL)
9602 end_label = NULL_RTX;
9604 /* Check to see if it's possible that some instructions in the loop are
9605 never executed. Also check if there is a goto out of the loop other
9606 than right after the end of the loop. */
9607 for (p = next_insn_in_loop (loop, loop->scan_start);
9609 p = next_insn_in_loop (loop, p))
9611 if (GET_CODE (p) == CODE_LABEL)
9613 else if (GET_CODE (p) == JUMP_INSN
9614 /* If we enter the loop in the middle, and scan
9615 around to the beginning, don't set maybe_never
9616 for that. This must be an unconditional jump,
9617 otherwise the code at the top of the loop might
9618 never be executed. Unconditional jumps are
9619 followed a by barrier then loop end. */
9620 && ! (GET_CODE (p) == JUMP_INSN
9621 && JUMP_LABEL (p) == loop->top
9622 && NEXT_INSN (NEXT_INSN (p)) == loop->end
9623 && any_uncondjump_p (p)))
9625 /* If this is a jump outside of the loop but not right
9626 after the end of the loop, we would have to emit new fixup
9627 sequences for each such label. */
9628 if (/* If we can't tell where control might go when this
9629 JUMP_INSN is executed, we must be conservative. */
9631 || (JUMP_LABEL (p) != end_label
9632 && (INSN_UID (JUMP_LABEL (p)) >= max_uid_for_loop
9633 || INSN_LUID (JUMP_LABEL (p)) < INSN_LUID (loop->start)
9634 || INSN_LUID (JUMP_LABEL (p)) > INSN_LUID (loop->end))))
9637 if (!any_condjump_p (p))
9638 /* Something complicated. */
9641 /* If there are any more instructions in the loop, they
9642 might not be reached. */
9643 next_maybe_never = 1;
9645 else if (next_maybe_never)
9649 /* Find start of the extended basic block that enters the loop. */
9650 for (p = loop->start;
9651 PREV_INSN (p) && GET_CODE (p) != CODE_LABEL;
9658 /* Build table of mems that get set to constant values before the
9660 for (; p != loop->start; p = NEXT_INSN (p))
9661 cselib_process_insn (p);
9663 /* Actually move the MEMs. */
9664 for (i = 0; i < loop_info->mems_idx; ++i)
9666 regset_head load_copies;
9667 regset_head store_copies;
9670 rtx mem = loop_info->mems[i].mem;
9673 if (MEM_VOLATILE_P (mem)
9674 || loop_invariant_p (loop, XEXP (mem, 0)) != 1)
9675 /* There's no telling whether or not MEM is modified. */
9676 loop_info->mems[i].optimize = 0;
9678 /* Go through the MEMs written to in the loop to see if this
9679 one is aliased by one of them. */
9680 mem_list_entry = loop_info->store_mems;
9681 while (mem_list_entry)
9683 if (rtx_equal_p (mem, XEXP (mem_list_entry, 0)))
9685 else if (true_dependence (XEXP (mem_list_entry, 0), VOIDmode,
9688 /* MEM is indeed aliased by this store. */
9689 loop_info->mems[i].optimize = 0;
9692 mem_list_entry = XEXP (mem_list_entry, 1);
9695 if (flag_float_store && written
9696 && GET_MODE_CLASS (GET_MODE (mem)) == MODE_FLOAT)
9697 loop_info->mems[i].optimize = 0;
9699 /* If this MEM is written to, we must be sure that there
9700 are no reads from another MEM that aliases this one. */
9701 if (loop_info->mems[i].optimize && written)
9705 for (j = 0; j < loop_info->mems_idx; ++j)
9709 else if (true_dependence (mem,
9711 loop_info->mems[j].mem,
9714 /* It's not safe to hoist loop_info->mems[i] out of
9715 the loop because writes to it might not be
9716 seen by reads from loop_info->mems[j]. */
9717 loop_info->mems[i].optimize = 0;
9723 if (maybe_never && may_trap_p (mem))
9724 /* We can't access the MEM outside the loop; it might
9725 cause a trap that wouldn't have happened otherwise. */
9726 loop_info->mems[i].optimize = 0;
9728 if (!loop_info->mems[i].optimize)
9729 /* We thought we were going to lift this MEM out of the
9730 loop, but later discovered that we could not. */
9733 INIT_REG_SET (&load_copies);
9734 INIT_REG_SET (&store_copies);
9736 /* Allocate a pseudo for this MEM. We set REG_USERVAR_P in
9737 order to keep scan_loop from moving stores to this MEM
9738 out of the loop just because this REG is neither a
9739 user-variable nor used in the loop test. */
9740 reg = gen_reg_rtx (GET_MODE (mem));
9741 REG_USERVAR_P (reg) = 1;
9742 loop_info->mems[i].reg = reg;
9744 /* Now, replace all references to the MEM with the
9745 corresponding pseudos. */
9747 for (p = next_insn_in_loop (loop, loop->scan_start);
9749 p = next_insn_in_loop (loop, p))
9755 set = single_set (p);
9757 /* See if this copies the mem into a register that isn't
9758 modified afterwards. We'll try to do copy propagation
9759 a little further on. */
9761 /* @@@ This test is _way_ too conservative. */
9763 && GET_CODE (SET_DEST (set)) == REG
9764 && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER
9765 && REGNO (SET_DEST (set)) < last_max_reg
9766 && regs->array[REGNO (SET_DEST (set))].n_times_set == 1
9767 && rtx_equal_p (SET_SRC (set), mem))
9768 SET_REGNO_REG_SET (&load_copies, REGNO (SET_DEST (set)));
9770 /* See if this copies the mem from a register that isn't
9771 modified afterwards. We'll try to remove the
9772 redundant copy later on by doing a little register
9773 renaming and copy propagation. This will help
9774 to untangle things for the BIV detection code. */
9777 && GET_CODE (SET_SRC (set)) == REG
9778 && REGNO (SET_SRC (set)) >= FIRST_PSEUDO_REGISTER
9779 && REGNO (SET_SRC (set)) < last_max_reg
9780 && regs->array[REGNO (SET_SRC (set))].n_times_set == 1
9781 && rtx_equal_p (SET_DEST (set), mem))
9782 SET_REGNO_REG_SET (&store_copies, REGNO (SET_SRC (set)));
9784 /* Replace the memory reference with the shadow register. */
9785 replace_loop_mems (p, loop_info->mems[i].mem,
9786 loop_info->mems[i].reg);
9789 if (GET_CODE (p) == CODE_LABEL
9790 || GET_CODE (p) == JUMP_INSN)
9794 if (! apply_change_group ())
9795 /* We couldn't replace all occurrences of the MEM. */
9796 loop_info->mems[i].optimize = 0;
9799 /* Load the memory immediately before LOOP->START, which is
9800 the NOTE_LOOP_BEG. */
9801 cselib_val *e = cselib_lookup (mem, VOIDmode, 0);
9805 struct elt_loc_list *const_equiv = 0;
9809 struct elt_loc_list *equiv;
9810 struct elt_loc_list *best_equiv = 0;
9811 for (equiv = e->locs; equiv; equiv = equiv->next)
9813 if (CONSTANT_P (equiv->loc))
9814 const_equiv = equiv;
9815 else if (GET_CODE (equiv->loc) == REG
9816 /* Extending hard register lifetimes causes crash
9817 on SRC targets. Doing so on non-SRC is
9818 probably also not good idea, since we most
9819 probably have pseudoregister equivalence as
9821 && REGNO (equiv->loc) >= FIRST_PSEUDO_REGISTER)
9824 /* Use the constant equivalence if that is cheap enough. */
9826 best_equiv = const_equiv;
9827 else if (const_equiv
9828 && (rtx_cost (const_equiv->loc, SET)
9829 <= rtx_cost (best_equiv->loc, SET)))
9831 best_equiv = const_equiv;
9835 /* If best_equiv is nonzero, we know that MEM is set to a
9836 constant or register before the loop. We will use this
9837 knowledge to initialize the shadow register with that
9838 constant or reg rather than by loading from MEM. */
9840 best = copy_rtx (best_equiv->loc);
9843 set = gen_move_insn (reg, best);
9844 set = loop_insn_hoist (loop, set);
9847 for (p = prev_ebb_head; p != loop->start; p = NEXT_INSN (p))
9848 if (REGNO_LAST_UID (REGNO (best)) == INSN_UID (p))
9850 REGNO_LAST_UID (REGNO (best)) = INSN_UID (set);
9856 set_unique_reg_note (set, REG_EQUAL, copy_rtx (const_equiv->loc));
9860 if (label == NULL_RTX)
9862 label = gen_label_rtx ();
9863 emit_label_after (label, loop->end);
9866 /* Store the memory immediately after END, which is
9867 the NOTE_LOOP_END. */
9868 set = gen_move_insn (copy_rtx (mem), reg);
9869 loop_insn_emit_after (loop, 0, label, set);
9872 if (loop_dump_stream)
9874 fprintf (loop_dump_stream, "Hoisted regno %d %s from ",
9875 REGNO (reg), (written ? "r/w" : "r/o"));
9876 print_rtl (loop_dump_stream, mem);
9877 fputc ('\n', loop_dump_stream);
9880 /* Attempt a bit of copy propagation. This helps untangle the
9881 data flow, and enables {basic,general}_induction_var to find
9883 EXECUTE_IF_SET_IN_REG_SET
9884 (&load_copies, FIRST_PSEUDO_REGISTER, j,
9886 try_copy_prop (loop, reg, j);
9888 CLEAR_REG_SET (&load_copies);
9890 EXECUTE_IF_SET_IN_REG_SET
9891 (&store_copies, FIRST_PSEUDO_REGISTER, j,
9893 try_swap_copy_prop (loop, reg, j);
9895 CLEAR_REG_SET (&store_copies);
9899 if (label != NULL_RTX && end_label != NULL_RTX)
9901 /* Now, we need to replace all references to the previous exit
9902 label with the new one. */
9907 for (p = loop->start; p != loop->end; p = NEXT_INSN (p))
9909 for_each_rtx (&p, replace_label, &rr);
9911 /* If this is a JUMP_INSN, then we also need to fix the JUMP_LABEL
9912 field. This is not handled by for_each_rtx because it doesn't
9913 handle unprinted ('0') fields. We need to update JUMP_LABEL
9914 because the immediately following unroll pass will use it.
9915 replace_label would not work anyways, because that only handles
9917 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p) == end_label)
9918 JUMP_LABEL (p) = label;
9925 /* For communication between note_reg_stored and its caller. */
9926 struct note_reg_stored_arg
9932 /* Called via note_stores, record in SET_SEEN whether X, which is written,
9935 note_reg_stored (x, setter, arg)
9936 rtx x, setter ATTRIBUTE_UNUSED;
9939 struct note_reg_stored_arg *t = (struct note_reg_stored_arg *) arg;
9944 /* Try to replace every occurrence of pseudo REGNO with REPLACEMENT.
9945 There must be exactly one insn that sets this pseudo; it will be
9946 deleted if all replacements succeed and we can prove that the register
9947 is not used after the loop. */
9950 try_copy_prop (loop, replacement, regno)
9951 const struct loop *loop;
9955 /* This is the reg that we are copying from. */
9956 rtx reg_rtx = regno_reg_rtx[regno];
9959 /* These help keep track of whether we replaced all uses of the reg. */
9960 int replaced_last = 0;
9961 int store_is_first = 0;
9963 for (insn = next_insn_in_loop (loop, loop->scan_start);
9965 insn = next_insn_in_loop (loop, insn))
9969 /* Only substitute within one extended basic block from the initializing
9971 if (GET_CODE (insn) == CODE_LABEL && init_insn)
9974 if (! INSN_P (insn))
9977 /* Is this the initializing insn? */
9978 set = single_set (insn);
9980 && GET_CODE (SET_DEST (set)) == REG
9981 && REGNO (SET_DEST (set)) == regno)
9987 if (REGNO_FIRST_UID (regno) == INSN_UID (insn))
9991 /* Only substitute after seeing the initializing insn. */
9992 if (init_insn && insn != init_insn)
9994 struct note_reg_stored_arg arg;
9996 replace_loop_regs (insn, reg_rtx, replacement);
9997 if (REGNO_LAST_UID (regno) == INSN_UID (insn))
10000 /* Stop replacing when REPLACEMENT is modified. */
10001 arg.reg = replacement;
10003 note_stores (PATTERN (insn), note_reg_stored, &arg);
10006 rtx note = find_reg_note (insn, REG_EQUAL, NULL);
10008 /* It is possible that we've turned previously valid REG_EQUAL to
10009 invalid, as we change the REGNO to REPLACEMENT and unlike REGNO,
10010 REPLACEMENT is modified, we get different meaning. */
10011 if (note && reg_mentioned_p (replacement, XEXP (note, 0)))
10012 remove_note (insn, note);
10019 if (apply_change_group ())
10021 if (loop_dump_stream)
10022 fprintf (loop_dump_stream, " Replaced reg %d", regno);
10023 if (store_is_first && replaced_last)
10028 /* Assume we're just deleting INIT_INSN. */
10030 /* Look for REG_RETVAL note. If we're deleting the end of
10031 the libcall sequence, the whole sequence can go. */
10032 retval_note = find_reg_note (init_insn, REG_RETVAL, NULL_RTX);
10033 /* If we found a REG_RETVAL note, find the first instruction
10034 in the sequence. */
10036 first = XEXP (retval_note, 0);
10038 /* Delete the instructions. */
10039 loop_delete_insns (first, init_insn);
10041 if (loop_dump_stream)
10042 fprintf (loop_dump_stream, ".\n");
10046 /* Replace all the instructions from FIRST up to and including LAST
10047 with NOTE_INSN_DELETED notes. */
10050 loop_delete_insns (first, last)
10056 if (loop_dump_stream)
10057 fprintf (loop_dump_stream, ", deleting init_insn (%d)",
10059 delete_insn (first);
10061 /* If this was the LAST instructions we're supposed to delete,
10066 first = NEXT_INSN (first);
10070 /* Try to replace occurrences of pseudo REGNO with REPLACEMENT within
10071 loop LOOP if the order of the sets of these registers can be
10072 swapped. There must be exactly one insn within the loop that sets
10073 this pseudo followed immediately by a move insn that sets
10074 REPLACEMENT with REGNO. */
10076 try_swap_copy_prop (loop, replacement, regno)
10077 const struct loop *loop;
10079 unsigned int regno;
10082 rtx set = NULL_RTX;
10083 unsigned int new_regno;
10085 new_regno = REGNO (replacement);
10087 for (insn = next_insn_in_loop (loop, loop->scan_start);
10089 insn = next_insn_in_loop (loop, insn))
10091 /* Search for the insn that copies REGNO to NEW_REGNO? */
10093 && (set = single_set (insn))
10094 && GET_CODE (SET_DEST (set)) == REG
10095 && REGNO (SET_DEST (set)) == new_regno
10096 && GET_CODE (SET_SRC (set)) == REG
10097 && REGNO (SET_SRC (set)) == regno)
10101 if (insn != NULL_RTX)
10106 /* Some DEF-USE info would come in handy here to make this
10107 function more general. For now, just check the previous insn
10108 which is the most likely candidate for setting REGNO. */
10110 prev_insn = PREV_INSN (insn);
10113 && (prev_set = single_set (prev_insn))
10114 && GET_CODE (SET_DEST (prev_set)) == REG
10115 && REGNO (SET_DEST (prev_set)) == regno)
10118 (set (reg regno) (expr))
10119 (set (reg new_regno) (reg regno))
10121 so try converting this to:
10122 (set (reg new_regno) (expr))
10123 (set (reg regno) (reg new_regno))
10125 The former construct is often generated when a global
10126 variable used for an induction variable is shadowed by a
10127 register (NEW_REGNO). The latter construct improves the
10128 chances of GIV replacement and BIV elimination. */
10130 validate_change (prev_insn, &SET_DEST (prev_set),
10132 validate_change (insn, &SET_DEST (set),
10134 validate_change (insn, &SET_SRC (set),
10137 if (apply_change_group ())
10139 if (loop_dump_stream)
10140 fprintf (loop_dump_stream,
10141 " Swapped set of reg %d at %d with reg %d at %d.\n",
10142 regno, INSN_UID (insn),
10143 new_regno, INSN_UID (prev_insn));
10145 /* Update first use of REGNO. */
10146 if (REGNO_FIRST_UID (regno) == INSN_UID (prev_insn))
10147 REGNO_FIRST_UID (regno) = INSN_UID (insn);
10149 /* Now perform copy propagation to hopefully
10150 remove all uses of REGNO within the loop. */
10151 try_copy_prop (loop, replacement, regno);
10157 /* Replace MEM with its associated pseudo register. This function is
10158 called from load_mems via for_each_rtx. DATA is actually a pointer
10159 to a structure describing the instruction currently being scanned
10160 and the MEM we are currently replacing. */
10163 replace_loop_mem (mem, data)
10167 loop_replace_args *args = (loop_replace_args *) data;
10173 switch (GET_CODE (m))
10179 /* We're not interested in the MEM associated with a
10180 CONST_DOUBLE, so there's no need to traverse into one. */
10184 /* This is not a MEM. */
10188 if (!rtx_equal_p (args->match, m))
10189 /* This is not the MEM we are currently replacing. */
10192 /* Actually replace the MEM. */
10193 validate_change (args->insn, mem, args->replacement, 1);
10199 replace_loop_mems (insn, mem, reg)
10204 loop_replace_args args;
10208 args.replacement = reg;
10210 for_each_rtx (&insn, replace_loop_mem, &args);
10213 /* Replace one register with another. Called through for_each_rtx; PX points
10214 to the rtx being scanned. DATA is actually a pointer to
10215 a structure of arguments. */
10218 replace_loop_reg (px, data)
10223 loop_replace_args *args = (loop_replace_args *) data;
10228 if (x == args->match)
10229 validate_change (args->insn, px, args->replacement, 1);
10235 replace_loop_regs (insn, reg, replacement)
10240 loop_replace_args args;
10244 args.replacement = replacement;
10246 for_each_rtx (&insn, replace_loop_reg, &args);
10249 /* Replace occurrences of the old exit label for the loop with the new
10250 one. DATA is an rtx_pair containing the old and new labels,
10254 replace_label (x, data)
10259 rtx old_label = ((rtx_pair *) data)->r1;
10260 rtx new_label = ((rtx_pair *) data)->r2;
10265 if (GET_CODE (l) != LABEL_REF)
10268 if (XEXP (l, 0) != old_label)
10271 XEXP (l, 0) = new_label;
10272 ++LABEL_NUSES (new_label);
10273 --LABEL_NUSES (old_label);
10278 /* Emit insn for PATTERN after WHERE_INSN in basic block WHERE_BB
10279 (ignored in the interim). */
10282 loop_insn_emit_after (loop, where_bb, where_insn, pattern)
10283 const struct loop *loop ATTRIBUTE_UNUSED;
10284 basic_block where_bb ATTRIBUTE_UNUSED;
10288 return emit_insn_after (pattern, where_insn);
10292 /* If WHERE_INSN is non-zero emit insn for PATTERN before WHERE_INSN
10293 in basic block WHERE_BB (ignored in the interim) within the loop
10294 otherwise hoist PATTERN into the loop pre-header. */
10297 loop_insn_emit_before (loop, where_bb, where_insn, pattern)
10298 const struct loop *loop;
10299 basic_block where_bb ATTRIBUTE_UNUSED;
10304 return loop_insn_hoist (loop, pattern);
10305 return emit_insn_before (pattern, where_insn);
10309 /* Emit call insn for PATTERN before WHERE_INSN in basic block
10310 WHERE_BB (ignored in the interim) within the loop. */
10313 loop_call_insn_emit_before (loop, where_bb, where_insn, pattern)
10314 const struct loop *loop ATTRIBUTE_UNUSED;
10315 basic_block where_bb ATTRIBUTE_UNUSED;
10319 return emit_call_insn_before (pattern, where_insn);
10323 /* Hoist insn for PATTERN into the loop pre-header. */
10326 loop_insn_hoist (loop, pattern)
10327 const struct loop *loop;
10330 return loop_insn_emit_before (loop, 0, loop->start, pattern);
10334 /* Hoist call insn for PATTERN into the loop pre-header. */
10337 loop_call_insn_hoist (loop, pattern)
10338 const struct loop *loop;
10341 return loop_call_insn_emit_before (loop, 0, loop->start, pattern);
10345 /* Sink insn for PATTERN after the loop end. */
10348 loop_insn_sink (loop, pattern)
10349 const struct loop *loop;
10352 return loop_insn_emit_before (loop, 0, loop->sink, pattern);
10356 /* If the loop has multiple exits, emit insn for PATTERN before the
10357 loop to ensure that it will always be executed no matter how the
10358 loop exits. Otherwise, emit the insn for PATTERN after the loop,
10359 since this is slightly more efficient. */
10362 loop_insn_sink_or_swim (loop, pattern)
10363 const struct loop *loop;
10366 if (loop->exit_count)
10367 return loop_insn_hoist (loop, pattern);
10369 return loop_insn_sink (loop, pattern);
10373 loop_ivs_dump (loop, file, verbose)
10374 const struct loop *loop;
10378 struct iv_class *bl;
10381 if (! loop || ! file)
10384 for (bl = LOOP_IVS (loop)->list; bl; bl = bl->next)
10387 fprintf (file, "Loop %d: %d IV classes\n", loop->num, iv_num);
10389 for (bl = LOOP_IVS (loop)->list; bl; bl = bl->next)
10391 loop_iv_class_dump (bl, file, verbose);
10392 fputc ('\n', file);
10398 loop_iv_class_dump (bl, file, verbose)
10399 const struct iv_class *bl;
10401 int verbose ATTRIBUTE_UNUSED;
10403 struct induction *v;
10407 if (! bl || ! file)
10410 fprintf (file, "IV class for reg %d, benefit %d\n",
10411 bl->regno, bl->total_benefit);
10413 fprintf (file, " Init insn %d", INSN_UID (bl->init_insn));
10414 if (bl->initial_value)
10416 fprintf (file, ", init val: ");
10417 print_simple_rtl (file, bl->initial_value);
10419 if (bl->initial_test)
10421 fprintf (file, ", init test: ");
10422 print_simple_rtl (file, bl->initial_test);
10424 fputc ('\n', file);
10426 if (bl->final_value)
10428 fprintf (file, " Final val: ");
10429 print_simple_rtl (file, bl->final_value);
10430 fputc ('\n', file);
10433 if ((incr = biv_total_increment (bl)))
10435 fprintf (file, " Total increment: ");
10436 print_simple_rtl (file, incr);
10437 fputc ('\n', file);
10440 /* List the increments. */
10441 for (i = 0, v = bl->biv; v; v = v->next_iv, i++)
10443 fprintf (file, " Inc%d: insn %d, incr: ", i, INSN_UID (v->insn));
10444 print_simple_rtl (file, v->add_val);
10445 fputc ('\n', file);
10448 /* List the givs. */
10449 for (i = 0, v = bl->giv; v; v = v->next_iv, i++)
10451 fprintf (file, " Giv%d: insn %d, benefit %d, ",
10452 i, INSN_UID (v->insn), v->benefit);
10453 if (v->giv_type == DEST_ADDR)
10454 print_simple_rtl (file, v->mem);
10456 print_simple_rtl (file, single_set (v->insn));
10457 fputc ('\n', file);
10463 loop_biv_dump (v, file, verbose)
10464 const struct induction *v;
10473 REGNO (v->dest_reg), INSN_UID (v->insn));
10474 fprintf (file, " const ");
10475 print_simple_rtl (file, v->add_val);
10477 if (verbose && v->final_value)
10479 fputc ('\n', file);
10480 fprintf (file, " final ");
10481 print_simple_rtl (file, v->final_value);
10484 fputc ('\n', file);
10489 loop_giv_dump (v, file, verbose)
10490 const struct induction *v;
10497 if (v->giv_type == DEST_REG)
10498 fprintf (file, "Giv %d: insn %d",
10499 REGNO (v->dest_reg), INSN_UID (v->insn));
10501 fprintf (file, "Dest address: insn %d",
10502 INSN_UID (v->insn));
10504 fprintf (file, " src reg %d benefit %d",
10505 REGNO (v->src_reg), v->benefit);
10506 fprintf (file, " lifetime %d",
10509 if (v->replaceable)
10510 fprintf (file, " replaceable");
10512 if (v->no_const_addval)
10513 fprintf (file, " ncav");
10515 if (v->ext_dependent)
10517 switch (GET_CODE (v->ext_dependent))
10520 fprintf (file, " ext se");
10523 fprintf (file, " ext ze");
10526 fprintf (file, " ext tr");
10533 fputc ('\n', file);
10534 fprintf (file, " mult ");
10535 print_simple_rtl (file, v->mult_val);
10537 fputc ('\n', file);
10538 fprintf (file, " add ");
10539 print_simple_rtl (file, v->add_val);
10541 if (verbose && v->final_value)
10543 fputc ('\n', file);
10544 fprintf (file, " final ");
10545 print_simple_rtl (file, v->final_value);
10548 fputc ('\n', file);
10554 const struct loop *loop;
10556 loop_ivs_dump (loop, stderr, 1);
10561 debug_iv_class (bl)
10562 const struct iv_class *bl;
10564 loop_iv_class_dump (bl, stderr, 1);
10570 const struct induction *v;
10572 loop_biv_dump (v, stderr, 1);
10578 const struct induction *v;
10580 loop_giv_dump (v, stderr, 1);
10584 #define LOOP_BLOCK_NUM_1(INSN) \
10585 ((INSN) ? (BLOCK_FOR_INSN (INSN) ? BLOCK_NUM (INSN) : - 1) : -1)
10587 /* The notes do not have an assigned block, so look at the next insn. */
10588 #define LOOP_BLOCK_NUM(INSN) \
10589 ((INSN) ? (GET_CODE (INSN) == NOTE \
10590 ? LOOP_BLOCK_NUM_1 (next_nonnote_insn (INSN)) \
10591 : LOOP_BLOCK_NUM_1 (INSN)) \
10594 #define LOOP_INSN_UID(INSN) ((INSN) ? INSN_UID (INSN) : -1)
10597 loop_dump_aux (loop, file, verbose)
10598 const struct loop *loop;
10600 int verbose ATTRIBUTE_UNUSED;
10604 if (! loop || ! file)
10607 /* Print diagnostics to compare our concept of a loop with
10608 what the loop notes say. */
10609 if (! PREV_INSN (loop->first->head)
10610 || GET_CODE (PREV_INSN (loop->first->head)) != NOTE
10611 || NOTE_LINE_NUMBER (PREV_INSN (loop->first->head))
10612 != NOTE_INSN_LOOP_BEG)
10613 fprintf (file, ";; No NOTE_INSN_LOOP_BEG at %d\n",
10614 INSN_UID (PREV_INSN (loop->first->head)));
10615 if (! NEXT_INSN (loop->last->end)
10616 || GET_CODE (NEXT_INSN (loop->last->end)) != NOTE
10617 || NOTE_LINE_NUMBER (NEXT_INSN (loop->last->end))
10618 != NOTE_INSN_LOOP_END)
10619 fprintf (file, ";; No NOTE_INSN_LOOP_END at %d\n",
10620 INSN_UID (NEXT_INSN (loop->last->end)));
10625 ";; start %d (%d), cont dom %d (%d), cont %d (%d), vtop %d (%d), end %d (%d)\n",
10626 LOOP_BLOCK_NUM (loop->start),
10627 LOOP_INSN_UID (loop->start),
10628 LOOP_BLOCK_NUM (loop->cont),
10629 LOOP_INSN_UID (loop->cont),
10630 LOOP_BLOCK_NUM (loop->cont),
10631 LOOP_INSN_UID (loop->cont),
10632 LOOP_BLOCK_NUM (loop->vtop),
10633 LOOP_INSN_UID (loop->vtop),
10634 LOOP_BLOCK_NUM (loop->end),
10635 LOOP_INSN_UID (loop->end));
10636 fprintf (file, ";; top %d (%d), scan start %d (%d)\n",
10637 LOOP_BLOCK_NUM (loop->top),
10638 LOOP_INSN_UID (loop->top),
10639 LOOP_BLOCK_NUM (loop->scan_start),
10640 LOOP_INSN_UID (loop->scan_start));
10641 fprintf (file, ";; exit_count %d", loop->exit_count);
10642 if (loop->exit_count)
10644 fputs (", labels:", file);
10645 for (label = loop->exit_labels; label; label = LABEL_NEXTREF (label))
10647 fprintf (file, " %d ",
10648 LOOP_INSN_UID (XEXP (label, 0)));
10651 fputs ("\n", file);
10653 /* This can happen when a marked loop appears as two nested loops,
10654 say from while (a || b) {}. The inner loop won't match
10655 the loop markers but the outer one will. */
10656 if (LOOP_BLOCK_NUM (loop->cont) != loop->latch->index)
10657 fprintf (file, ";; NOTE_INSN_LOOP_CONT not in loop latch\n");
10661 /* Call this function from the debugger to dump LOOP. */
10665 const struct loop *loop;
10667 flow_loop_dump (loop, stderr, loop_dump_aux, 1);
10670 /* Call this function from the debugger to dump LOOPS. */
10673 debug_loops (loops)
10674 const struct loops *loops;
10676 flow_loops_dump (loops, stderr, loop_dump_aux, 1);