1 /* Perform various loop optimizations, including strength reduction.
2 Copyright (C) 1987, 88, 89, 91-98, 1999 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* This is the loop optimization pass of the compiler.
23 It finds invariant computations within loops and moves them
24 to the beginning of the loop. Then it identifies basic and
25 general induction variables. Strength reduction is applied to the general
26 induction variables, and induction variable elimination is applied to
27 the basic induction variables.
29 It also finds cases where
30 a register is set within the loop by zero-extending a narrower value
31 and changes these to zero the entire register once before the loop
32 and merely copy the low part within the loop.
34 Most of the complexity is in heuristics to decide when it is worth
35 while to do these things. */
44 #include "basic-block.h"
45 #include "insn-config.h"
46 #include "insn-flags.h"
48 #include "hard-reg-set.h"
56 /* Information about the loop being processed used to compute
57 the number of loop iterations for loop unrolling and doloop
59 static struct loop_info this_loop_info;
61 /* Vector mapping INSN_UIDs to luids.
62 The luids are like uids but increase monotonically always.
63 We use them to see whether a jump comes from outside a given loop. */
67 /* Indexed by INSN_UID, contains the ordinal giving the (innermost) loop
68 number the insn is contained in. */
72 /* 1 + largest uid of any insn. */
76 /* 1 + luid of last insn. */
80 /* Number of loops detected in current function. Used as index to the
83 static int max_loop_num;
85 /* Indexed by loop number, contains the first and last insn of each loop. */
87 static rtx *loop_number_loop_starts, *loop_number_loop_ends;
89 /* Likewise for the continue insn */
90 static rtx *loop_number_loop_cont;
92 /* The first code_label that is reached in every loop iteration.
93 0 when not computed yet, initially const0_rtx if a jump couldn't be
95 Also set to 0 when there is no such label before the NOTE_INSN_LOOP_CONT
96 of this loop, or in verify_dominator, if a jump couldn't be followed. */
97 static rtx *loop_number_cont_dominator;
99 /* For each loop, gives the containing loop number, -1 if none. */
101 int *loop_outer_loop;
103 #ifdef HAVE_decrement_and_branch_on_count
104 /* Records whether resource in use by inner loop. */
106 int *loop_used_count_register;
107 #endif /* HAVE_decrement_and_branch_on_count */
109 /* Indexed by loop number, contains a nonzero value if the "loop" isn't
110 really a loop (an insn outside the loop branches into it). */
112 static char *loop_invalid;
114 /* Indexed by loop number, links together all LABEL_REFs which refer to
115 code labels outside the loop. Used by routines that need to know all
116 loop exits, such as final_biv_value and final_giv_value.
118 This does not include loop exits due to return instructions. This is
119 because all bivs and givs are pseudos, and hence must be dead after a
120 return, so the presense of a return does not affect any of the
121 optimizations that use this info. It is simpler to just not include return
122 instructions on this list. */
124 rtx *loop_number_exit_labels;
126 /* Indexed by loop number, counts the number of LABEL_REFs on
127 loop_number_exit_labels for this loop and all loops nested inside it. */
129 int *loop_number_exit_count;
131 /* Indexed by register number, contains the number of times the reg
132 is set during the loop being scanned.
133 During code motion, a negative value indicates a reg that has been
134 made a candidate; in particular -2 means that it is an candidate that
135 we know is equal to a constant and -1 means that it is an candidate
136 not known equal to a constant.
137 After code motion, regs moved have 0 (which is accurate now)
138 while the failed candidates have the original number of times set.
140 Therefore, at all times, == 0 indicates an invariant register;
141 < 0 a conditionally invariant one. */
143 static varray_type set_in_loop;
145 /* Original value of set_in_loop; same except that this value
146 is not set negative for a reg whose sets have been made candidates
147 and not set to 0 for a reg that is moved. */
149 static varray_type n_times_set;
151 /* Index by register number, 1 indicates that the register
152 cannot be moved or strength reduced. */
154 static varray_type may_not_optimize;
156 /* Contains the insn in which a register was used if it was used
157 exactly once; contains const0_rtx if it was used more than once. */
159 static varray_type reg_single_usage;
161 /* Nonzero means reg N has already been moved out of one loop.
162 This reduces the desire to move it out of another. */
164 static char *moved_once;
166 /* List of MEMs that are stored in this loop. */
168 static rtx loop_store_mems;
170 /* The insn where the first of these was found. */
171 static rtx first_loop_store_insn;
173 typedef struct loop_mem_info {
174 rtx mem; /* The MEM itself. */
175 rtx reg; /* Corresponding pseudo, if any. */
176 int optimize; /* Nonzero if we can optimize access to this MEM. */
179 /* Array of MEMs that are used (read or written) in this loop, but
180 cannot be aliased by anything in this loop, except perhaps
181 themselves. In other words, if loop_mems[i] is altered during the
182 loop, it is altered by an expression that is rtx_equal_p to it. */
184 static loop_mem_info *loop_mems;
186 /* The index of the next available slot in LOOP_MEMS. */
188 static int loop_mems_idx;
190 /* The number of elements allocated in LOOP_MEMs. */
192 static int loop_mems_allocated;
194 /* Nonzero if we don't know what MEMs were changed in the current
195 loop. This happens if the loop contains a call (in which case
196 `loop_info->has_call' will also be set) or if we store into more
197 than NUM_STORES MEMs. */
199 static int unknown_address_altered;
201 /* The above doesn't count any readonly memory locations that are stored.
204 static int unknown_constant_address_altered;
206 /* Count of movable (i.e. invariant) instructions discovered in the loop. */
207 static int num_movables;
209 /* Count of memory write instructions discovered in the loop. */
210 static int num_mem_sets;
212 /* Bound on pseudo register number before loop optimization.
213 A pseudo has valid regscan info if its number is < max_reg_before_loop. */
214 int max_reg_before_loop;
216 /* This obstack is used in product_cheap_p to allocate its rtl. It
217 may call gen_reg_rtx which, in turn, may reallocate regno_reg_rtx.
218 If we used the same obstack that it did, we would be deallocating
221 static struct obstack temp_obstack;
223 /* This is where the pointer to the obstack being used for RTL is stored. */
225 extern struct obstack *rtl_obstack;
227 #define obstack_chunk_alloc xmalloc
228 #define obstack_chunk_free free
230 /* During the analysis of a loop, a chain of `struct movable's
231 is made to record all the movable insns found.
232 Then the entire chain can be scanned to decide which to move. */
236 rtx insn; /* A movable insn */
237 rtx set_src; /* The expression this reg is set from. */
238 rtx set_dest; /* The destination of this SET. */
239 rtx dependencies; /* When INSN is libcall, this is an EXPR_LIST
240 of any registers used within the LIBCALL. */
241 int consec; /* Number of consecutive following insns
242 that must be moved with this one. */
243 int regno; /* The register it sets */
244 short lifetime; /* lifetime of that register;
245 may be adjusted when matching movables
246 that load the same value are found. */
247 short savings; /* Number of insns we can move for this reg,
248 including other movables that force this
249 or match this one. */
250 unsigned int cond : 1; /* 1 if only conditionally movable */
251 unsigned int force : 1; /* 1 means MUST move this insn */
252 unsigned int global : 1; /* 1 means reg is live outside this loop */
253 /* If PARTIAL is 1, GLOBAL means something different:
254 that the reg is live outside the range from where it is set
255 to the following label. */
256 unsigned int done : 1; /* 1 inhibits further processing of this */
258 unsigned int partial : 1; /* 1 means this reg is used for zero-extending.
259 In particular, moving it does not make it
261 unsigned int move_insn : 1; /* 1 means that we call emit_move_insn to
262 load SRC, rather than copying INSN. */
263 unsigned int move_insn_first:1;/* Same as above, if this is necessary for the
264 first insn of a consecutive sets group. */
265 unsigned int is_equiv : 1; /* 1 means a REG_EQUIV is present on INSN. */
266 enum machine_mode savemode; /* Nonzero means it is a mode for a low part
267 that we should avoid changing when clearing
268 the rest of the reg. */
269 struct movable *match; /* First entry for same value */
270 struct movable *forces; /* An insn that must be moved if this is */
271 struct movable *next;
274 static struct movable *the_movables;
276 FILE *loop_dump_stream;
278 /* Forward declarations. */
280 static void verify_dominator PROTO((int));
281 static void find_and_verify_loops PROTO((rtx));
282 static void mark_loop_jump PROTO((rtx, int));
283 static void prescan_loop PROTO((rtx, rtx, struct loop_info *));
284 static int reg_in_basic_block_p PROTO((rtx, rtx));
285 static int consec_sets_invariant_p PROTO((rtx, int, rtx));
286 static int labels_in_range_p PROTO((rtx, int));
287 static void count_one_set PROTO((rtx, rtx, varray_type, rtx *));
289 static void count_loop_regs_set PROTO((rtx, rtx, varray_type, varray_type,
291 static void note_addr_stored PROTO((rtx, rtx, void *));
292 static void note_set_pseudo_multiple_uses PROTO((rtx, rtx, void *));
293 static int loop_reg_used_before_p PROTO((rtx, rtx, rtx, rtx, rtx));
294 static void scan_loop PROTO((rtx, rtx, rtx, int, int));
296 static void replace_call_address PROTO((rtx, rtx, rtx));
298 static rtx skip_consec_insns PROTO((rtx, int));
299 static int libcall_benefit PROTO((rtx));
300 static void ignore_some_movables PROTO((struct movable *));
301 static void force_movables PROTO((struct movable *));
302 static void combine_movables PROTO((struct movable *, int));
303 static int regs_match_p PROTO((rtx, rtx, struct movable *));
304 static int rtx_equal_for_loop_p PROTO((rtx, rtx, struct movable *));
305 static void add_label_notes PROTO((rtx, rtx));
306 static void move_movables PROTO((struct movable *, int, int, rtx, rtx, int));
307 static int count_nonfixed_reads PROTO((rtx));
308 static void strength_reduce PROTO((rtx, rtx, rtx, int, rtx, rtx,
309 struct loop_info *, rtx, int, int));
310 static void find_single_use_in_loop PROTO((rtx, rtx, varray_type));
311 static int valid_initial_value_p PROTO((rtx, rtx, int, rtx));
312 static void find_mem_givs PROTO((rtx, rtx, int, int, rtx, rtx));
313 static void record_biv PROTO((struct induction *, rtx, rtx, rtx, rtx, rtx *, int, int));
314 static void check_final_value PROTO((struct induction *, rtx, rtx,
315 unsigned HOST_WIDE_INT));
316 static void record_giv PROTO((struct induction *, rtx, rtx, rtx, rtx, rtx, int, enum g_types, int, int, rtx *, rtx, rtx));
317 static void update_giv_derive PROTO((rtx));
318 static int basic_induction_var PROTO((rtx, enum machine_mode, rtx, rtx, rtx *, rtx *, rtx **));
319 static rtx simplify_giv_expr PROTO((rtx, int *));
320 static int general_induction_var PROTO((rtx, rtx *, rtx *, rtx *, int, int *));
321 static int consec_sets_giv PROTO((int, rtx, rtx, rtx, rtx *, rtx *, rtx *));
322 static int check_dbra_loop PROTO((rtx, int, rtx, struct loop_info *));
323 static rtx express_from_1 PROTO((rtx, rtx, rtx));
324 static rtx combine_givs_p PROTO((struct induction *, struct induction *));
325 static void combine_givs PROTO((struct iv_class *));
326 struct recombine_givs_stats;
327 static int find_life_end PROTO((rtx, struct recombine_givs_stats *, rtx, rtx));
328 static void recombine_givs PROTO((struct iv_class *, rtx, rtx, int));
329 static int product_cheap_p PROTO((rtx, rtx));
330 static int maybe_eliminate_biv PROTO((struct iv_class *, rtx, rtx, int, int, int));
331 static int maybe_eliminate_biv_1 PROTO((rtx, rtx, struct iv_class *, int, rtx));
332 static int last_use_this_basic_block PROTO((rtx, rtx));
333 static void record_initial PROTO((rtx, rtx, void *));
334 static void update_reg_last_use PROTO((rtx, rtx));
335 static rtx next_insn_in_loop PROTO((rtx, rtx, rtx, rtx));
336 static void load_mems_and_recount_loop_regs_set PROTO((rtx, rtx, rtx,
338 static void load_mems PROTO((rtx, rtx, rtx, rtx));
339 static int insert_loop_mem PROTO((rtx *, void *));
340 static int replace_loop_mem PROTO((rtx *, void *));
341 static int replace_loop_reg PROTO((rtx *, void *));
342 static void try_copy_prop PROTO((rtx, rtx, rtx, rtx, int));
343 static int replace_label PROTO((rtx *, void *));
345 typedef struct rtx_and_int {
350 typedef struct rtx_pair {
355 /* Nonzero iff INSN is between START and END, inclusive. */
356 #define INSN_IN_RANGE_P(INSN, START, END) \
357 (INSN_UID (INSN) < max_uid_for_loop \
358 && INSN_LUID (INSN) >= INSN_LUID (START) \
359 && INSN_LUID (INSN) <= INSN_LUID (END))
361 #ifdef HAVE_decrement_and_branch_on_count
362 /* Test whether BCT applicable and safe. */
363 static void insert_bct PROTO((rtx, rtx, struct loop_info *));
365 /* Auxiliary function that inserts the BCT pattern into the loop. */
366 static void instrument_loop_bct PROTO((rtx, rtx, rtx));
367 #endif /* HAVE_decrement_and_branch_on_count */
369 /* Indirect_jump_in_function is computed once per function. */
370 int indirect_jump_in_function = 0;
371 static int indirect_jump_in_function_p PROTO((rtx));
373 static int compute_luids PROTO((rtx, rtx, int));
375 static int biv_elimination_giv_has_0_offset PROTO((struct induction *,
376 struct induction *, rtx));
378 /* Relative gain of eliminating various kinds of operations. */
381 static int shift_cost;
382 static int mult_cost;
385 /* Benefit penalty, if a giv is not replaceable, i.e. must emit an insn to
386 copy the value of the strength reduced giv to its original register. */
387 static int copy_cost;
389 /* Cost of using a register, to normalize the benefits of a giv. */
390 static int reg_address_cost;
396 char *free_point = (char *) oballoc (1);
397 rtx reg = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 1);
399 add_cost = rtx_cost (gen_rtx_PLUS (word_mode, reg, reg), SET);
402 reg_address_cost = ADDRESS_COST (reg);
404 reg_address_cost = rtx_cost (reg, MEM);
407 /* We multiply by 2 to reconcile the difference in scale between
408 these two ways of computing costs. Otherwise the cost of a copy
409 will be far less than the cost of an add. */
413 /* Free the objects we just allocated. */
416 /* Initialize the obstack used for rtl in product_cheap_p. */
417 gcc_obstack_init (&temp_obstack);
420 /* Compute the mapping from uids to luids.
421 LUIDs are numbers assigned to insns, like uids,
422 except that luids increase monotonically through the code.
423 Start at insn START and stop just before END. Assign LUIDs
424 starting with PREV_LUID + 1. Return the last assigned LUID + 1. */
426 compute_luids (start, end, prev_luid)
433 for (insn = start, i = prev_luid; insn != end; insn = NEXT_INSN (insn))
435 if (INSN_UID (insn) >= max_uid_for_loop)
437 /* Don't assign luids to line-number NOTEs, so that the distance in
438 luids between two insns is not affected by -g. */
439 if (GET_CODE (insn) != NOTE
440 || NOTE_LINE_NUMBER (insn) <= 0)
441 uid_luid[INSN_UID (insn)] = ++i;
443 /* Give a line number note the same luid as preceding insn. */
444 uid_luid[INSN_UID (insn)] = i;
449 /* Entry point of this file. Perform loop optimization
450 on the current function. F is the first insn of the function
451 and DUMPFILE is a stream for output of a trace of actions taken
452 (or 0 if none should be output). */
455 loop_optimize (f, dumpfile, unroll_p, bct_p)
456 /* f is the first instruction of a chain of insns for one function */
464 loop_dump_stream = dumpfile;
466 init_recog_no_volatile ();
468 max_reg_before_loop = max_reg_num ();
472 /* Count the number of loops. */
475 for (insn = f; insn; insn = NEXT_INSN (insn))
477 if (GET_CODE (insn) == NOTE
478 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
482 /* Don't waste time if no loops. */
483 if (max_loop_num == 0)
486 moved_once = (char *) xcalloc (max_reg_before_loop, sizeof (char));
488 /* Get size to use for tables indexed by uids.
489 Leave some space for labels allocated by find_and_verify_loops. */
490 max_uid_for_loop = get_max_uid () + 1 + max_loop_num * 32;
492 uid_luid = (int *) xcalloc (max_uid_for_loop, sizeof (int));
493 uid_loop_num = (int *) xcalloc (max_uid_for_loop, sizeof (int));
495 /* Allocate tables for recording each loop. We set each entry, so they need
497 loop_number_loop_starts = (rtx *) xmalloc (max_loop_num * sizeof (rtx));
498 loop_number_loop_ends = (rtx *) xmalloc (max_loop_num * sizeof (rtx));
499 loop_number_loop_cont = (rtx *) xmalloc (max_loop_num * sizeof (rtx));
500 loop_number_cont_dominator = (rtx *) xmalloc (max_loop_num * sizeof (rtx));
501 loop_outer_loop = (int *) xmalloc (max_loop_num * sizeof (int));
502 loop_invalid = (char *) xmalloc (max_loop_num * sizeof (char));
503 loop_number_exit_labels = (rtx *) xmalloc (max_loop_num * sizeof (rtx));
504 loop_number_exit_count = (int *) xmalloc (max_loop_num * sizeof (int));
506 #ifdef HAVE_decrement_and_branch_on_count
507 /* Allocate for BCT optimization */
508 loop_used_count_register = (int *) xcalloc (max_loop_num, sizeof (int));
509 #endif /* HAVE_decrement_and_branch_on_count */
511 /* Find and process each loop.
512 First, find them, and record them in order of their beginnings. */
513 find_and_verify_loops (f);
515 /* Now find all register lifetimes. This must be done after
516 find_and_verify_loops, because it might reorder the insns in the
518 reg_scan (f, max_reg_num (), 1);
520 /* This must occur after reg_scan so that registers created by gcse
521 will have entries in the register tables.
523 We could have added a call to reg_scan after gcse_main in toplev.c,
524 but moving this call to init_alias_analysis is more efficient. */
525 init_alias_analysis ();
527 /* See if we went too far. Note that get_max_uid already returns
528 one more that the maximum uid of all insn. */
529 if (get_max_uid () > max_uid_for_loop)
531 /* Now reset it to the actual size we need. See above. */
532 max_uid_for_loop = get_max_uid ();
534 /* find_and_verify_loops has already called compute_luids, but it might
535 have rearranged code afterwards, so we need to recompute the luids now. */
536 max_luid = compute_luids (f, NULL_RTX, 0);
538 /* Don't leave gaps in uid_luid for insns that have been
539 deleted. It is possible that the first or last insn
540 using some register has been deleted by cross-jumping.
541 Make sure that uid_luid for that former insn's uid
542 points to the general area where that insn used to be. */
543 for (i = 0; i < max_uid_for_loop; i++)
545 uid_luid[0] = uid_luid[i];
546 if (uid_luid[0] != 0)
549 for (i = 0; i < max_uid_for_loop; i++)
550 if (uid_luid[i] == 0)
551 uid_luid[i] = uid_luid[i - 1];
553 /* Create a mapping from loops to BLOCK tree nodes. */
554 if (unroll_p && write_symbols != NO_DEBUG)
555 find_loop_tree_blocks ();
557 /* Determine if the function has indirect jump. On some systems
558 this prevents low overhead loop instructions from being used. */
559 indirect_jump_in_function = indirect_jump_in_function_p (f);
561 /* Now scan the loops, last ones first, since this means inner ones are done
562 before outer ones. */
563 for (i = max_loop_num-1; i >= 0; i--)
564 if (! loop_invalid[i] && loop_number_loop_ends[i])
565 scan_loop (loop_number_loop_starts[i], loop_number_loop_ends[i],
566 loop_number_loop_cont[i], unroll_p, bct_p);
568 /* If debugging and unrolling loops, we must replicate the tree nodes
569 corresponding to the blocks inside the loop, so that the original one
570 to one mapping will remain. */
571 if (unroll_p && write_symbols != NO_DEBUG)
572 unroll_block_trees ();
574 end_alias_analysis ();
580 free (loop_number_loop_starts);
581 free (loop_number_loop_ends);
582 free (loop_number_loop_cont);
583 free (loop_number_cont_dominator);
584 free (loop_outer_loop);
586 free (loop_number_exit_labels);
587 free (loop_number_exit_count);
588 #ifdef HAVE_decrement_and_branch_on_count
589 free (loop_used_count_register);
590 #endif /* HAVE_decrement_and_branch_on_count */
594 /* Returns the next insn, in execution order, after INSN. START and
595 END are the NOTE_INSN_LOOP_BEG and NOTE_INSN_LOOP_END for the loop,
596 respectively. LOOP_TOP, if non-NULL, is the top of the loop in the
597 insn-stream; it is used with loops that are entered near the
601 next_insn_in_loop (insn, start, end, loop_top)
607 insn = NEXT_INSN (insn);
612 /* Go to the top of the loop, and continue there. */
626 /* Optimize one loop whose start is LOOP_START and end is END.
627 LOOP_START is the NOTE_INSN_LOOP_BEG and END is the matching
629 LOOP_CONT is the NOTE_INSN_LOOP_CONT. */
631 /* ??? Could also move memory writes out of loops if the destination address
632 is invariant, the source is invariant, the memory write is not volatile,
633 and if we can prove that no read inside the loop can read this address
634 before the write occurs. If there is a read of this address after the
635 write, then we can also mark the memory read as invariant. */
638 scan_loop (loop_start, end, loop_cont, unroll_p, bct_p)
639 rtx loop_start, end, loop_cont;
644 /* 1 if we are scanning insns that could be executed zero times. */
646 /* 1 if we are scanning insns that might never be executed
647 due to a subroutine call which might exit before they are reached. */
649 /* For a rotated loop that is entered near the bottom,
650 this is the label at the top. Otherwise it is zero. */
652 /* Jump insn that enters the loop, or 0 if control drops in. */
653 rtx loop_entry_jump = 0;
654 /* Place in the loop where control enters. */
656 /* Number of insns in the loop. */
661 /* The SET from an insn, if it is the only SET in the insn. */
663 /* Chain describing insns movable in current loop. */
664 struct movable *movables = 0;
665 /* Last element in `movables' -- so we can add elements at the end. */
666 struct movable *last_movable = 0;
667 /* Ratio of extra register life span we can justify
668 for saving an instruction. More if loop doesn't call subroutines
669 since in that case saving an insn makes more difference
670 and more registers are available. */
672 /* Nonzero if we are scanning instructions in a sub-loop. */
675 struct loop_info *loop_info = &this_loop_info;
677 /* Determine whether this loop starts with a jump down to a test at
678 the end. This will occur for a small number of loops with a test
679 that is too complex to duplicate in front of the loop.
681 We search for the first insn or label in the loop, skipping NOTEs.
682 However, we must be careful not to skip past a NOTE_INSN_LOOP_BEG
683 (because we might have a loop executed only once that contains a
684 loop which starts with a jump to its exit test) or a NOTE_INSN_LOOP_END
685 (in case we have a degenerate loop).
687 Note that if we mistakenly think that a loop is entered at the top
688 when, in fact, it is entered at the exit test, the only effect will be
689 slightly poorer optimization. Making the opposite error can generate
690 incorrect code. Since very few loops now start with a jump to the
691 exit test, the code here to detect that case is very conservative. */
693 for (p = NEXT_INSN (loop_start);
695 && GET_CODE (p) != CODE_LABEL && GET_RTX_CLASS (GET_CODE (p)) != 'i'
696 && (GET_CODE (p) != NOTE
697 || (NOTE_LINE_NUMBER (p) != NOTE_INSN_LOOP_BEG
698 && NOTE_LINE_NUMBER (p) != NOTE_INSN_LOOP_END));
704 /* Set up variables describing this loop. */
705 prescan_loop (loop_start, end, loop_info);
706 threshold = (loop_info->has_call ? 1 : 2) * (1 + n_non_fixed_regs);
708 /* If loop has a jump before the first label,
709 the true entry is the target of that jump.
710 Start scan from there.
711 But record in LOOP_TOP the place where the end-test jumps
712 back to so we can scan that after the end of the loop. */
713 if (GET_CODE (p) == JUMP_INSN)
717 /* Loop entry must be unconditional jump (and not a RETURN) */
719 && JUMP_LABEL (p) != 0
720 /* Check to see whether the jump actually
721 jumps out of the loop (meaning it's no loop).
722 This case can happen for things like
723 do {..} while (0). If this label was generated previously
724 by loop, we can't tell anything about it and have to reject
726 && INSN_IN_RANGE_P (JUMP_LABEL (p), loop_start, end))
728 loop_top = next_label (scan_start);
729 scan_start = JUMP_LABEL (p);
733 /* If SCAN_START was an insn created by loop, we don't know its luid
734 as required by loop_reg_used_before_p. So skip such loops. (This
735 test may never be true, but it's best to play it safe.)
737 Also, skip loops where we do not start scanning at a label. This
738 test also rejects loops starting with a JUMP_INSN that failed the
741 if (INSN_UID (scan_start) >= max_uid_for_loop
742 || GET_CODE (scan_start) != CODE_LABEL)
744 if (loop_dump_stream)
745 fprintf (loop_dump_stream, "\nLoop from %d to %d is phony.\n\n",
746 INSN_UID (loop_start), INSN_UID (end));
750 /* Count number of times each reg is set during this loop.
751 Set VARRAY_CHAR (may_not_optimize, I) if it is not safe to move out
752 the setting of register I. Set VARRAY_RTX (reg_single_usage, I). */
754 /* Allocate extra space for REGS that might be created by
755 load_mems. We allocate a little extra slop as well, in the hopes
756 that even after the moving of movables creates some new registers
757 we won't have to reallocate these arrays. However, we do grow
758 the arrays, if necessary, in load_mems_recount_loop_regs_set. */
759 nregs = max_reg_num () + loop_mems_idx + 16;
760 VARRAY_INT_INIT (set_in_loop, nregs, "set_in_loop");
761 VARRAY_INT_INIT (n_times_set, nregs, "n_times_set");
762 VARRAY_CHAR_INIT (may_not_optimize, nregs, "may_not_optimize");
763 VARRAY_RTX_INIT (reg_single_usage, nregs, "reg_single_usage");
765 count_loop_regs_set (loop_top ? loop_top : loop_start, end,
766 may_not_optimize, reg_single_usage, &insn_count, nregs);
768 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
770 VARRAY_CHAR (may_not_optimize, i) = 1;
771 VARRAY_INT (set_in_loop, i) = 1;
774 #ifdef AVOID_CCMODE_COPIES
775 /* Don't try to move insns which set CC registers if we should not
776 create CCmode register copies. */
777 for (i = max_reg_num () - 1; i >= FIRST_PSEUDO_REGISTER; i--)
778 if (GET_MODE_CLASS (GET_MODE (regno_reg_rtx[i])) == MODE_CC)
779 VARRAY_CHAR (may_not_optimize, i) = 1;
782 bcopy ((char *) &set_in_loop->data,
783 (char *) &n_times_set->data, nregs * sizeof (int));
785 if (loop_dump_stream)
787 fprintf (loop_dump_stream, "\nLoop from %d to %d: %d real insns.\n",
788 INSN_UID (loop_start), INSN_UID (end), insn_count);
790 fprintf (loop_dump_stream, "Continue at insn %d.\n",
791 INSN_UID (loop_info->cont));
794 /* Scan through the loop finding insns that are safe to move.
795 Set set_in_loop negative for the reg being set, so that
796 this reg will be considered invariant for subsequent insns.
797 We consider whether subsequent insns use the reg
798 in deciding whether it is worth actually moving.
800 MAYBE_NEVER is nonzero if we have passed a conditional jump insn
801 and therefore it is possible that the insns we are scanning
802 would never be executed. At such times, we must make sure
803 that it is safe to execute the insn once instead of zero times.
804 When MAYBE_NEVER is 0, all insns will be executed at least once
805 so that is not a problem. */
807 for (p = next_insn_in_loop (scan_start, scan_start, end, loop_top);
809 p = next_insn_in_loop (p, scan_start, end, loop_top))
811 if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
812 && find_reg_note (p, REG_LIBCALL, NULL_RTX))
814 else if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
815 && find_reg_note (p, REG_RETVAL, NULL_RTX))
818 if (GET_CODE (p) == INSN
819 && (set = single_set (p))
820 && GET_CODE (SET_DEST (set)) == REG
821 && ! VARRAY_CHAR (may_not_optimize, REGNO (SET_DEST (set))))
826 rtx src = SET_SRC (set);
827 rtx dependencies = 0;
829 /* Figure out what to use as a source of this insn. If a REG_EQUIV
830 note is given or if a REG_EQUAL note with a constant operand is
831 specified, use it as the source and mark that we should move
832 this insn by calling emit_move_insn rather that duplicating the
835 Otherwise, only use the REG_EQUAL contents if a REG_RETVAL note
837 temp = find_reg_note (p, REG_EQUIV, NULL_RTX);
839 src = XEXP (temp, 0), move_insn = 1;
842 temp = find_reg_note (p, REG_EQUAL, NULL_RTX);
843 if (temp && CONSTANT_P (XEXP (temp, 0)))
844 src = XEXP (temp, 0), move_insn = 1;
845 if (temp && find_reg_note (p, REG_RETVAL, NULL_RTX))
847 src = XEXP (temp, 0);
848 /* A libcall block can use regs that don't appear in
849 the equivalent expression. To move the libcall,
850 we must move those regs too. */
851 dependencies = libcall_other_reg (p, src);
855 /* Don't try to optimize a register that was made
856 by loop-optimization for an inner loop.
857 We don't know its life-span, so we can't compute the benefit. */
858 if (REGNO (SET_DEST (set)) >= max_reg_before_loop)
860 else if (/* The register is used in basic blocks other
861 than the one where it is set (meaning that
862 something after this point in the loop might
863 depend on its value before the set). */
864 ! reg_in_basic_block_p (p, SET_DEST (set))
865 /* And the set is not guaranteed to be executed one
866 the loop starts, or the value before the set is
867 needed before the set occurs...
869 ??? Note we have quadratic behaviour here, mitigated
870 by the fact that the previous test will often fail for
871 large loops. Rather than re-scanning the entire loop
872 each time for register usage, we should build tables
873 of the register usage and use them here instead. */
875 || loop_reg_used_before_p (set, p, loop_start,
877 /* It is unsafe to move the set.
879 This code used to consider it OK to move a set of a variable
880 which was not created by the user and not used in an exit test.
881 That behavior is incorrect and was removed. */
883 else if ((tem = invariant_p (src))
884 && (dependencies == 0
885 || (tem2 = invariant_p (dependencies)) != 0)
886 && (VARRAY_INT (set_in_loop,
887 REGNO (SET_DEST (set))) == 1
889 = consec_sets_invariant_p
891 VARRAY_INT (set_in_loop, REGNO (SET_DEST (set))),
893 /* If the insn can cause a trap (such as divide by zero),
894 can't move it unless it's guaranteed to be executed
895 once loop is entered. Even a function call might
896 prevent the trap insn from being reached
897 (since it might exit!) */
898 && ! ((maybe_never || call_passed)
899 && may_trap_p (src)))
901 register struct movable *m;
902 register int regno = REGNO (SET_DEST (set));
904 /* A potential lossage is where we have a case where two insns
905 can be combined as long as they are both in the loop, but
906 we move one of them outside the loop. For large loops,
907 this can lose. The most common case of this is the address
908 of a function being called.
910 Therefore, if this register is marked as being used exactly
911 once if we are in a loop with calls (a "large loop"), see if
912 we can replace the usage of this register with the source
913 of this SET. If we can, delete this insn.
915 Don't do this if P has a REG_RETVAL note or if we have
916 SMALL_REGISTER_CLASSES and SET_SRC is a hard register. */
918 if (loop_info->has_call
919 && VARRAY_RTX (reg_single_usage, regno) != 0
920 && VARRAY_RTX (reg_single_usage, regno) != const0_rtx
921 && REGNO_FIRST_UID (regno) == INSN_UID (p)
922 && (REGNO_LAST_UID (regno)
923 == INSN_UID (VARRAY_RTX (reg_single_usage, regno)))
924 && VARRAY_INT (set_in_loop, regno) == 1
925 && ! side_effects_p (SET_SRC (set))
926 && ! find_reg_note (p, REG_RETVAL, NULL_RTX)
927 && (! SMALL_REGISTER_CLASSES
928 || (! (GET_CODE (SET_SRC (set)) == REG
929 && REGNO (SET_SRC (set)) < FIRST_PSEUDO_REGISTER)))
930 /* This test is not redundant; SET_SRC (set) might be
931 a call-clobbered register and the life of REGNO
932 might span a call. */
933 && ! modified_between_p (SET_SRC (set), p,
935 (reg_single_usage, regno))
936 && no_labels_between_p (p, VARRAY_RTX (reg_single_usage, regno))
937 && validate_replace_rtx (SET_DEST (set), SET_SRC (set),
939 (reg_single_usage, regno)))
941 /* Replace any usage in a REG_EQUAL note. Must copy the
942 new source, so that we don't get rtx sharing between the
943 SET_SOURCE and REG_NOTES of insn p. */
944 REG_NOTES (VARRAY_RTX (reg_single_usage, regno))
945 = replace_rtx (REG_NOTES (VARRAY_RTX
946 (reg_single_usage, regno)),
947 SET_DEST (set), copy_rtx (SET_SRC (set)));
950 NOTE_LINE_NUMBER (p) = NOTE_INSN_DELETED;
951 NOTE_SOURCE_FILE (p) = 0;
952 VARRAY_INT (set_in_loop, regno) = 0;
956 m = (struct movable *) alloca (sizeof (struct movable));
960 m->dependencies = dependencies;
961 m->set_dest = SET_DEST (set);
963 m->consec = VARRAY_INT (set_in_loop,
964 REGNO (SET_DEST (set))) - 1;
968 m->move_insn = move_insn;
969 m->move_insn_first = 0;
970 m->is_equiv = (find_reg_note (p, REG_EQUIV, NULL_RTX) != 0);
971 m->savemode = VOIDmode;
973 /* Set M->cond if either invariant_p or consec_sets_invariant_p
974 returned 2 (only conditionally invariant). */
975 m->cond = ((tem | tem1 | tem2) > 1);
976 m->global = (uid_luid[REGNO_LAST_UID (regno)] > INSN_LUID (end)
977 || uid_luid[REGNO_FIRST_UID (regno)] < INSN_LUID (loop_start));
979 m->lifetime = (uid_luid[REGNO_LAST_UID (regno)]
980 - uid_luid[REGNO_FIRST_UID (regno)]);
981 m->savings = VARRAY_INT (n_times_set, regno);
982 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
983 m->savings += libcall_benefit (p);
984 VARRAY_INT (set_in_loop, regno) = move_insn ? -2 : -1;
985 /* Add M to the end of the chain MOVABLES. */
989 last_movable->next = m;
994 /* It is possible for the first instruction to have a
995 REG_EQUAL note but a non-invariant SET_SRC, so we must
996 remember the status of the first instruction in case
997 the last instruction doesn't have a REG_EQUAL note. */
998 m->move_insn_first = m->move_insn;
1000 /* Skip this insn, not checking REG_LIBCALL notes. */
1001 p = next_nonnote_insn (p);
1002 /* Skip the consecutive insns, if there are any. */
1003 p = skip_consec_insns (p, m->consec);
1004 /* Back up to the last insn of the consecutive group. */
1005 p = prev_nonnote_insn (p);
1007 /* We must now reset m->move_insn, m->is_equiv, and possibly
1008 m->set_src to correspond to the effects of all the
1010 temp = find_reg_note (p, REG_EQUIV, NULL_RTX);
1012 m->set_src = XEXP (temp, 0), m->move_insn = 1;
1015 temp = find_reg_note (p, REG_EQUAL, NULL_RTX);
1016 if (temp && CONSTANT_P (XEXP (temp, 0)))
1017 m->set_src = XEXP (temp, 0), m->move_insn = 1;
1022 m->is_equiv = (find_reg_note (p, REG_EQUIV, NULL_RTX) != 0);
1025 /* If this register is always set within a STRICT_LOW_PART
1026 or set to zero, then its high bytes are constant.
1027 So clear them outside the loop and within the loop
1028 just load the low bytes.
1029 We must check that the machine has an instruction to do so.
1030 Also, if the value loaded into the register
1031 depends on the same register, this cannot be done. */
1032 else if (SET_SRC (set) == const0_rtx
1033 && GET_CODE (NEXT_INSN (p)) == INSN
1034 && (set1 = single_set (NEXT_INSN (p)))
1035 && GET_CODE (set1) == SET
1036 && (GET_CODE (SET_DEST (set1)) == STRICT_LOW_PART)
1037 && (GET_CODE (XEXP (SET_DEST (set1), 0)) == SUBREG)
1038 && (SUBREG_REG (XEXP (SET_DEST (set1), 0))
1040 && !reg_mentioned_p (SET_DEST (set), SET_SRC (set1)))
1042 register int regno = REGNO (SET_DEST (set));
1043 if (VARRAY_INT (set_in_loop, regno) == 2)
1045 register struct movable *m;
1046 m = (struct movable *) alloca (sizeof (struct movable));
1049 m->set_dest = SET_DEST (set);
1050 m->dependencies = 0;
1056 m->move_insn_first = 0;
1058 /* If the insn may not be executed on some cycles,
1059 we can't clear the whole reg; clear just high part.
1060 Not even if the reg is used only within this loop.
1067 Clearing x before the inner loop could clobber a value
1068 being saved from the last time around the outer loop.
1069 However, if the reg is not used outside this loop
1070 and all uses of the register are in the same
1071 basic block as the store, there is no problem.
1073 If this insn was made by loop, we don't know its
1074 INSN_LUID and hence must make a conservative
1076 m->global = (INSN_UID (p) >= max_uid_for_loop
1077 || (uid_luid[REGNO_LAST_UID (regno)]
1079 || (uid_luid[REGNO_FIRST_UID (regno)]
1081 || (labels_in_range_p
1082 (p, uid_luid[REGNO_FIRST_UID (regno)])));
1083 if (maybe_never && m->global)
1084 m->savemode = GET_MODE (SET_SRC (set1));
1086 m->savemode = VOIDmode;
1090 m->lifetime = (uid_luid[REGNO_LAST_UID (regno)]
1091 - uid_luid[REGNO_FIRST_UID (regno)]);
1093 VARRAY_INT (set_in_loop, regno) = -1;
1094 /* Add M to the end of the chain MOVABLES. */
1098 last_movable->next = m;
1103 /* Past a call insn, we get to insns which might not be executed
1104 because the call might exit. This matters for insns that trap.
1105 Call insns inside a REG_LIBCALL/REG_RETVAL block always return,
1106 so they don't count. */
1107 else if (GET_CODE (p) == CALL_INSN && ! in_libcall)
1109 /* Past a label or a jump, we get to insns for which we
1110 can't count on whether or how many times they will be
1111 executed during each iteration. Therefore, we can
1112 only move out sets of trivial variables
1113 (those not used after the loop). */
1114 /* Similar code appears twice in strength_reduce. */
1115 else if ((GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN)
1116 /* If we enter the loop in the middle, and scan around to the
1117 beginning, don't set maybe_never for that. This must be an
1118 unconditional jump, otherwise the code at the top of the
1119 loop might never be executed. Unconditional jumps are
1120 followed a by barrier then loop end. */
1121 && ! (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p) == loop_top
1122 && NEXT_INSN (NEXT_INSN (p)) == end
1123 && simplejump_p (p)))
1125 else if (GET_CODE (p) == NOTE)
1127 /* At the virtual top of a converted loop, insns are again known to
1128 be executed: logically, the loop begins here even though the exit
1129 code has been duplicated. */
1130 if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP && loop_depth == 0)
1131 maybe_never = call_passed = 0;
1132 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
1134 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
1139 /* If one movable subsumes another, ignore that other. */
1141 ignore_some_movables (movables);
1143 /* For each movable insn, see if the reg that it loads
1144 leads when it dies right into another conditionally movable insn.
1145 If so, record that the second insn "forces" the first one,
1146 since the second can be moved only if the first is. */
1148 force_movables (movables);
1150 /* See if there are multiple movable insns that load the same value.
1151 If there are, make all but the first point at the first one
1152 through the `match' field, and add the priorities of them
1153 all together as the priority of the first. */
1155 combine_movables (movables, nregs);
1157 /* Now consider each movable insn to decide whether it is worth moving.
1158 Store 0 in set_in_loop for each reg that is moved.
1160 Generally this increases code size, so do not move moveables when
1161 optimizing for code size. */
1163 if (! optimize_size)
1164 move_movables (movables, threshold,
1165 insn_count, loop_start, end, nregs);
1167 /* Now candidates that still are negative are those not moved.
1168 Change set_in_loop to indicate that those are not actually invariant. */
1169 for (i = 0; i < nregs; i++)
1170 if (VARRAY_INT (set_in_loop, i) < 0)
1171 VARRAY_INT (set_in_loop, i) = VARRAY_INT (n_times_set, i);
1173 /* Now that we've moved some things out of the loop, we might be able to
1174 hoist even more memory references. */
1175 load_mems_and_recount_loop_regs_set (scan_start, end, loop_top,
1176 loop_start, &insn_count);
1178 if (flag_strength_reduce)
1180 the_movables = movables;
1181 strength_reduce (scan_start, end, loop_top,
1182 insn_count, loop_start, end,
1183 loop_info, loop_cont, unroll_p, bct_p);
1186 VARRAY_FREE (reg_single_usage);
1187 VARRAY_FREE (set_in_loop);
1188 VARRAY_FREE (n_times_set);
1189 VARRAY_FREE (may_not_optimize);
1192 /* Add elements to *OUTPUT to record all the pseudo-regs
1193 mentioned in IN_THIS but not mentioned in NOT_IN_THIS. */
1196 record_excess_regs (in_this, not_in_this, output)
1197 rtx in_this, not_in_this;
1204 code = GET_CODE (in_this);
1218 if (REGNO (in_this) >= FIRST_PSEUDO_REGISTER
1219 && ! reg_mentioned_p (in_this, not_in_this))
1220 *output = gen_rtx_EXPR_LIST (VOIDmode, in_this, *output);
1227 fmt = GET_RTX_FORMAT (code);
1228 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1235 for (j = 0; j < XVECLEN (in_this, i); j++)
1236 record_excess_regs (XVECEXP (in_this, i, j), not_in_this, output);
1240 record_excess_regs (XEXP (in_this, i), not_in_this, output);
1246 /* Check what regs are referred to in the libcall block ending with INSN,
1247 aside from those mentioned in the equivalent value.
1248 If there are none, return 0.
1249 If there are one or more, return an EXPR_LIST containing all of them. */
1252 libcall_other_reg (insn, equiv)
1255 rtx note = find_reg_note (insn, REG_RETVAL, NULL_RTX);
1256 rtx p = XEXP (note, 0);
1259 /* First, find all the regs used in the libcall block
1260 that are not mentioned as inputs to the result. */
1264 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
1265 || GET_CODE (p) == CALL_INSN)
1266 record_excess_regs (PATTERN (p), equiv, &output);
1273 /* Return 1 if all uses of REG
1274 are between INSN and the end of the basic block. */
1277 reg_in_basic_block_p (insn, reg)
1280 int regno = REGNO (reg);
1283 if (REGNO_FIRST_UID (regno) != INSN_UID (insn))
1286 /* Search this basic block for the already recorded last use of the reg. */
1287 for (p = insn; p; p = NEXT_INSN (p))
1289 switch (GET_CODE (p))
1296 /* Ordinary insn: if this is the last use, we win. */
1297 if (REGNO_LAST_UID (regno) == INSN_UID (p))
1302 /* Jump insn: if this is the last use, we win. */
1303 if (REGNO_LAST_UID (regno) == INSN_UID (p))
1305 /* Otherwise, it's the end of the basic block, so we lose. */
1310 /* It's the end of the basic block, so we lose. */
1318 /* The "last use" doesn't follow the "first use"?? */
1322 /* Compute the benefit of eliminating the insns in the block whose
1323 last insn is LAST. This may be a group of insns used to compute a
1324 value directly or can contain a library call. */
1327 libcall_benefit (last)
1333 for (insn = XEXP (find_reg_note (last, REG_RETVAL, NULL_RTX), 0);
1334 insn != last; insn = NEXT_INSN (insn))
1336 if (GET_CODE (insn) == CALL_INSN)
1337 benefit += 10; /* Assume at least this many insns in a library
1339 else if (GET_CODE (insn) == INSN
1340 && GET_CODE (PATTERN (insn)) != USE
1341 && GET_CODE (PATTERN (insn)) != CLOBBER)
1348 /* Skip COUNT insns from INSN, counting library calls as 1 insn. */
1351 skip_consec_insns (insn, count)
1355 for (; count > 0; count--)
1359 /* If first insn of libcall sequence, skip to end. */
1360 /* Do this at start of loop, since INSN is guaranteed to
1362 if (GET_CODE (insn) != NOTE
1363 && (temp = find_reg_note (insn, REG_LIBCALL, NULL_RTX)))
1364 insn = XEXP (temp, 0);
1366 do insn = NEXT_INSN (insn);
1367 while (GET_CODE (insn) == NOTE);
1373 /* Ignore any movable whose insn falls within a libcall
1374 which is part of another movable.
1375 We make use of the fact that the movable for the libcall value
1376 was made later and so appears later on the chain. */
1379 ignore_some_movables (movables)
1380 struct movable *movables;
1382 register struct movable *m, *m1;
1384 for (m = movables; m; m = m->next)
1386 /* Is this a movable for the value of a libcall? */
1387 rtx note = find_reg_note (m->insn, REG_RETVAL, NULL_RTX);
1391 /* Check for earlier movables inside that range,
1392 and mark them invalid. We cannot use LUIDs here because
1393 insns created by loop.c for prior loops don't have LUIDs.
1394 Rather than reject all such insns from movables, we just
1395 explicitly check each insn in the libcall (since invariant
1396 libcalls aren't that common). */
1397 for (insn = XEXP (note, 0); insn != m->insn; insn = NEXT_INSN (insn))
1398 for (m1 = movables; m1 != m; m1 = m1->next)
1399 if (m1->insn == insn)
1405 /* For each movable insn, see if the reg that it loads
1406 leads when it dies right into another conditionally movable insn.
1407 If so, record that the second insn "forces" the first one,
1408 since the second can be moved only if the first is. */
1411 force_movables (movables)
1412 struct movable *movables;
1414 register struct movable *m, *m1;
1415 for (m1 = movables; m1; m1 = m1->next)
1416 /* Omit this if moving just the (SET (REG) 0) of a zero-extend. */
1417 if (!m1->partial && !m1->done)
1419 int regno = m1->regno;
1420 for (m = m1->next; m; m = m->next)
1421 /* ??? Could this be a bug? What if CSE caused the
1422 register of M1 to be used after this insn?
1423 Since CSE does not update regno_last_uid,
1424 this insn M->insn might not be where it dies.
1425 But very likely this doesn't matter; what matters is
1426 that M's reg is computed from M1's reg. */
1427 if (INSN_UID (m->insn) == REGNO_LAST_UID (regno)
1430 if (m != 0 && m->set_src == m1->set_dest
1431 /* If m->consec, m->set_src isn't valid. */
1435 /* Increase the priority of the moving the first insn
1436 since it permits the second to be moved as well. */
1440 m1->lifetime += m->lifetime;
1441 m1->savings += m->savings;
1446 /* Find invariant expressions that are equal and can be combined into
1450 combine_movables (movables, nregs)
1451 struct movable *movables;
1454 register struct movable *m;
1455 char *matched_regs = (char *) xmalloc (nregs);
1456 enum machine_mode mode;
1458 /* Regs that are set more than once are not allowed to match
1459 or be matched. I'm no longer sure why not. */
1460 /* Perhaps testing m->consec_sets would be more appropriate here? */
1462 for (m = movables; m; m = m->next)
1463 if (m->match == 0 && VARRAY_INT (n_times_set, m->regno) == 1 && !m->partial)
1465 register struct movable *m1;
1466 int regno = m->regno;
1468 bzero (matched_regs, nregs);
1469 matched_regs[regno] = 1;
1471 /* We want later insns to match the first one. Don't make the first
1472 one match any later ones. So start this loop at m->next. */
1473 for (m1 = m->next; m1; m1 = m1->next)
1474 if (m != m1 && m1->match == 0 && VARRAY_INT (n_times_set, m1->regno) == 1
1475 /* A reg used outside the loop mustn't be eliminated. */
1477 /* A reg used for zero-extending mustn't be eliminated. */
1479 && (matched_regs[m1->regno]
1482 /* Can combine regs with different modes loaded from the
1483 same constant only if the modes are the same or
1484 if both are integer modes with M wider or the same
1485 width as M1. The check for integer is redundant, but
1486 safe, since the only case of differing destination
1487 modes with equal sources is when both sources are
1488 VOIDmode, i.e., CONST_INT. */
1489 (GET_MODE (m->set_dest) == GET_MODE (m1->set_dest)
1490 || (GET_MODE_CLASS (GET_MODE (m->set_dest)) == MODE_INT
1491 && GET_MODE_CLASS (GET_MODE (m1->set_dest)) == MODE_INT
1492 && (GET_MODE_BITSIZE (GET_MODE (m->set_dest))
1493 >= GET_MODE_BITSIZE (GET_MODE (m1->set_dest)))))
1494 /* See if the source of M1 says it matches M. */
1495 && ((GET_CODE (m1->set_src) == REG
1496 && matched_regs[REGNO (m1->set_src)])
1497 || rtx_equal_for_loop_p (m->set_src, m1->set_src,
1499 && ((m->dependencies == m1->dependencies)
1500 || rtx_equal_p (m->dependencies, m1->dependencies)))
1502 m->lifetime += m1->lifetime;
1503 m->savings += m1->savings;
1506 matched_regs[m1->regno] = 1;
1510 /* Now combine the regs used for zero-extension.
1511 This can be done for those not marked `global'
1512 provided their lives don't overlap. */
1514 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
1515 mode = GET_MODE_WIDER_MODE (mode))
1517 register struct movable *m0 = 0;
1519 /* Combine all the registers for extension from mode MODE.
1520 Don't combine any that are used outside this loop. */
1521 for (m = movables; m; m = m->next)
1522 if (m->partial && ! m->global
1523 && mode == GET_MODE (SET_SRC (PATTERN (NEXT_INSN (m->insn)))))
1525 register struct movable *m1;
1526 int first = uid_luid[REGNO_FIRST_UID (m->regno)];
1527 int last = uid_luid[REGNO_LAST_UID (m->regno)];
1531 /* First one: don't check for overlap, just record it. */
1536 /* Make sure they extend to the same mode.
1537 (Almost always true.) */
1538 if (GET_MODE (m->set_dest) != GET_MODE (m0->set_dest))
1541 /* We already have one: check for overlap with those
1542 already combined together. */
1543 for (m1 = movables; m1 != m; m1 = m1->next)
1544 if (m1 == m0 || (m1->partial && m1->match == m0))
1545 if (! (uid_luid[REGNO_FIRST_UID (m1->regno)] > last
1546 || uid_luid[REGNO_LAST_UID (m1->regno)] < first))
1549 /* No overlap: we can combine this with the others. */
1550 m0->lifetime += m->lifetime;
1551 m0->savings += m->savings;
1560 free (matched_regs);
1563 /* Return 1 if regs X and Y will become the same if moved. */
1566 regs_match_p (x, y, movables)
1568 struct movable *movables;
1572 struct movable *mx, *my;
1574 for (mx = movables; mx; mx = mx->next)
1575 if (mx->regno == xn)
1578 for (my = movables; my; my = my->next)
1579 if (my->regno == yn)
1583 && ((mx->match == my->match && mx->match != 0)
1585 || mx == my->match));
1588 /* Return 1 if X and Y are identical-looking rtx's.
1589 This is the Lisp function EQUAL for rtx arguments.
1591 If two registers are matching movables or a movable register and an
1592 equivalent constant, consider them equal. */
1595 rtx_equal_for_loop_p (x, y, movables)
1597 struct movable *movables;
1601 register struct movable *m;
1602 register enum rtx_code code;
1603 register const char *fmt;
1607 if (x == 0 || y == 0)
1610 code = GET_CODE (x);
1612 /* If we have a register and a constant, they may sometimes be
1614 if (GET_CODE (x) == REG && VARRAY_INT (set_in_loop, REGNO (x)) == -2
1617 for (m = movables; m; m = m->next)
1618 if (m->move_insn && m->regno == REGNO (x)
1619 && rtx_equal_p (m->set_src, y))
1622 else if (GET_CODE (y) == REG && VARRAY_INT (set_in_loop, REGNO (y)) == -2
1625 for (m = movables; m; m = m->next)
1626 if (m->move_insn && m->regno == REGNO (y)
1627 && rtx_equal_p (m->set_src, x))
1631 /* Otherwise, rtx's of different codes cannot be equal. */
1632 if (code != GET_CODE (y))
1635 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
1636 (REG:SI x) and (REG:HI x) are NOT equivalent. */
1638 if (GET_MODE (x) != GET_MODE (y))
1641 /* These three types of rtx's can be compared nonrecursively. */
1643 return (REGNO (x) == REGNO (y) || regs_match_p (x, y, movables));
1645 if (code == LABEL_REF)
1646 return XEXP (x, 0) == XEXP (y, 0);
1647 if (code == SYMBOL_REF)
1648 return XSTR (x, 0) == XSTR (y, 0);
1650 /* Compare the elements. If any pair of corresponding elements
1651 fail to match, return 0 for the whole things. */
1653 fmt = GET_RTX_FORMAT (code);
1654 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1659 if (XWINT (x, i) != XWINT (y, i))
1664 if (XINT (x, i) != XINT (y, i))
1669 /* Two vectors must have the same length. */
1670 if (XVECLEN (x, i) != XVECLEN (y, i))
1673 /* And the corresponding elements must match. */
1674 for (j = 0; j < XVECLEN (x, i); j++)
1675 if (rtx_equal_for_loop_p (XVECEXP (x, i, j), XVECEXP (y, i, j), movables) == 0)
1680 if (rtx_equal_for_loop_p (XEXP (x, i), XEXP (y, i), movables) == 0)
1685 if (strcmp (XSTR (x, i), XSTR (y, i)))
1690 /* These are just backpointers, so they don't matter. */
1696 /* It is believed that rtx's at this level will never
1697 contain anything but integers and other rtx's,
1698 except for within LABEL_REFs and SYMBOL_REFs. */
1706 /* If X contains any LABEL_REF's, add REG_LABEL notes for them to all
1707 insns in INSNS which use the reference. */
1710 add_label_notes (x, insns)
1714 enum rtx_code code = GET_CODE (x);
1719 if (code == LABEL_REF && !LABEL_REF_NONLOCAL_P (x))
1721 /* This code used to ignore labels that referred to dispatch tables to
1722 avoid flow generating (slighly) worse code.
1724 We no longer ignore such label references (see LABEL_REF handling in
1725 mark_jump_label for additional information). */
1726 for (insn = insns; insn; insn = NEXT_INSN (insn))
1727 if (reg_mentioned_p (XEXP (x, 0), insn))
1728 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_LABEL, XEXP (x, 0),
1732 fmt = GET_RTX_FORMAT (code);
1733 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1736 add_label_notes (XEXP (x, i), insns);
1737 else if (fmt[i] == 'E')
1738 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1739 add_label_notes (XVECEXP (x, i, j), insns);
1743 /* Scan MOVABLES, and move the insns that deserve to be moved.
1744 If two matching movables are combined, replace one reg with the
1745 other throughout. */
1748 move_movables (movables, threshold, insn_count, loop_start, end, nregs)
1749 struct movable *movables;
1757 register struct movable *m;
1759 /* Map of pseudo-register replacements to handle combining
1760 when we move several insns that load the same value
1761 into different pseudo-registers. */
1762 rtx *reg_map = (rtx *) xcalloc (nregs, sizeof (rtx));
1763 char *already_moved = (char *) xcalloc (nregs, sizeof (char));
1767 for (m = movables; m; m = m->next)
1769 /* Describe this movable insn. */
1771 if (loop_dump_stream)
1773 fprintf (loop_dump_stream, "Insn %d: regno %d (life %d), ",
1774 INSN_UID (m->insn), m->regno, m->lifetime);
1776 fprintf (loop_dump_stream, "consec %d, ", m->consec);
1778 fprintf (loop_dump_stream, "cond ");
1780 fprintf (loop_dump_stream, "force ");
1782 fprintf (loop_dump_stream, "global ");
1784 fprintf (loop_dump_stream, "done ");
1786 fprintf (loop_dump_stream, "move-insn ");
1788 fprintf (loop_dump_stream, "matches %d ",
1789 INSN_UID (m->match->insn));
1791 fprintf (loop_dump_stream, "forces %d ",
1792 INSN_UID (m->forces->insn));
1795 /* Count movables. Value used in heuristics in strength_reduce. */
1798 /* Ignore the insn if it's already done (it matched something else).
1799 Otherwise, see if it is now safe to move. */
1803 || (1 == invariant_p (m->set_src)
1804 && (m->dependencies == 0
1805 || 1 == invariant_p (m->dependencies))
1807 || 1 == consec_sets_invariant_p (m->set_dest,
1810 && (! m->forces || m->forces->done))
1814 int savings = m->savings;
1816 /* We have an insn that is safe to move.
1817 Compute its desirability. */
1822 if (loop_dump_stream)
1823 fprintf (loop_dump_stream, "savings %d ", savings);
1825 if (moved_once[regno] && loop_dump_stream)
1826 fprintf (loop_dump_stream, "halved since already moved ");
1828 /* An insn MUST be moved if we already moved something else
1829 which is safe only if this one is moved too: that is,
1830 if already_moved[REGNO] is nonzero. */
1832 /* An insn is desirable to move if the new lifetime of the
1833 register is no more than THRESHOLD times the old lifetime.
1834 If it's not desirable, it means the loop is so big
1835 that moving won't speed things up much,
1836 and it is liable to make register usage worse. */
1838 /* It is also desirable to move if it can be moved at no
1839 extra cost because something else was already moved. */
1841 if (already_moved[regno]
1842 || flag_move_all_movables
1843 || (threshold * savings * m->lifetime) >=
1844 (moved_once[regno] ? insn_count * 2 : insn_count)
1845 || (m->forces && m->forces->done
1846 && VARRAY_INT (n_times_set, m->forces->regno) == 1))
1849 register struct movable *m1;
1850 rtx first = NULL_RTX;
1852 /* Now move the insns that set the reg. */
1854 if (m->partial && m->match)
1858 /* Find the end of this chain of matching regs.
1859 Thus, we load each reg in the chain from that one reg.
1860 And that reg is loaded with 0 directly,
1861 since it has ->match == 0. */
1862 for (m1 = m; m1->match; m1 = m1->match);
1863 newpat = gen_move_insn (SET_DEST (PATTERN (m->insn)),
1864 SET_DEST (PATTERN (m1->insn)));
1865 i1 = emit_insn_before (newpat, loop_start);
1867 /* Mark the moved, invariant reg as being allowed to
1868 share a hard reg with the other matching invariant. */
1869 REG_NOTES (i1) = REG_NOTES (m->insn);
1870 r1 = SET_DEST (PATTERN (m->insn));
1871 r2 = SET_DEST (PATTERN (m1->insn));
1873 = gen_rtx_EXPR_LIST (VOIDmode, r1,
1874 gen_rtx_EXPR_LIST (VOIDmode, r2,
1876 delete_insn (m->insn);
1881 if (loop_dump_stream)
1882 fprintf (loop_dump_stream, " moved to %d", INSN_UID (i1));
1884 /* If we are to re-generate the item being moved with a
1885 new move insn, first delete what we have and then emit
1886 the move insn before the loop. */
1887 else if (m->move_insn)
1891 for (count = m->consec; count >= 0; count--)
1893 /* If this is the first insn of a library call sequence,
1895 if (GET_CODE (p) != NOTE
1896 && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
1899 /* If this is the last insn of a libcall sequence, then
1900 delete every insn in the sequence except the last.
1901 The last insn is handled in the normal manner. */
1902 if (GET_CODE (p) != NOTE
1903 && (temp = find_reg_note (p, REG_RETVAL, NULL_RTX)))
1905 temp = XEXP (temp, 0);
1907 temp = delete_insn (temp);
1911 p = delete_insn (p);
1913 /* simplify_giv_expr expects that it can walk the insns
1914 at m->insn forwards and see this old sequence we are
1915 tossing here. delete_insn does preserve the next
1916 pointers, but when we skip over a NOTE we must fix
1917 it up. Otherwise that code walks into the non-deleted
1919 while (p && GET_CODE (p) == NOTE)
1920 p = NEXT_INSN (temp) = NEXT_INSN (p);
1924 emit_move_insn (m->set_dest, m->set_src);
1925 temp = get_insns ();
1928 add_label_notes (m->set_src, temp);
1930 i1 = emit_insns_before (temp, loop_start);
1931 if (! find_reg_note (i1, REG_EQUAL, NULL_RTX))
1933 = gen_rtx_EXPR_LIST (m->is_equiv ? REG_EQUIV : REG_EQUAL,
1934 m->set_src, REG_NOTES (i1));
1936 if (loop_dump_stream)
1937 fprintf (loop_dump_stream, " moved to %d", INSN_UID (i1));
1939 /* The more regs we move, the less we like moving them. */
1944 for (count = m->consec; count >= 0; count--)
1948 /* If first insn of libcall sequence, skip to end. */
1949 /* Do this at start of loop, since p is guaranteed to
1951 if (GET_CODE (p) != NOTE
1952 && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
1955 /* If last insn of libcall sequence, move all
1956 insns except the last before the loop. The last
1957 insn is handled in the normal manner. */
1958 if (GET_CODE (p) != NOTE
1959 && (temp = find_reg_note (p, REG_RETVAL, NULL_RTX)))
1963 rtx fn_address_insn = 0;
1966 for (temp = XEXP (temp, 0); temp != p;
1967 temp = NEXT_INSN (temp))
1973 if (GET_CODE (temp) == NOTE)
1976 body = PATTERN (temp);
1978 /* Find the next insn after TEMP,
1979 not counting USE or NOTE insns. */
1980 for (next = NEXT_INSN (temp); next != p;
1981 next = NEXT_INSN (next))
1982 if (! (GET_CODE (next) == INSN
1983 && GET_CODE (PATTERN (next)) == USE)
1984 && GET_CODE (next) != NOTE)
1987 /* If that is the call, this may be the insn
1988 that loads the function address.
1990 Extract the function address from the insn
1991 that loads it into a register.
1992 If this insn was cse'd, we get incorrect code.
1994 So emit a new move insn that copies the
1995 function address into the register that the
1996 call insn will use. flow.c will delete any
1997 redundant stores that we have created. */
1998 if (GET_CODE (next) == CALL_INSN
1999 && GET_CODE (body) == SET
2000 && GET_CODE (SET_DEST (body)) == REG
2001 && (n = find_reg_note (temp, REG_EQUAL,
2004 fn_reg = SET_SRC (body);
2005 if (GET_CODE (fn_reg) != REG)
2006 fn_reg = SET_DEST (body);
2007 fn_address = XEXP (n, 0);
2008 fn_address_insn = temp;
2010 /* We have the call insn.
2011 If it uses the register we suspect it might,
2012 load it with the correct address directly. */
2013 if (GET_CODE (temp) == CALL_INSN
2015 && reg_referenced_p (fn_reg, body))
2016 emit_insn_after (gen_move_insn (fn_reg,
2020 if (GET_CODE (temp) == CALL_INSN)
2022 i1 = emit_call_insn_before (body, loop_start);
2023 /* Because the USAGE information potentially
2024 contains objects other than hard registers
2025 we need to copy it. */
2026 if (CALL_INSN_FUNCTION_USAGE (temp))
2027 CALL_INSN_FUNCTION_USAGE (i1)
2028 = copy_rtx (CALL_INSN_FUNCTION_USAGE (temp));
2031 i1 = emit_insn_before (body, loop_start);
2034 if (temp == fn_address_insn)
2035 fn_address_insn = i1;
2036 REG_NOTES (i1) = REG_NOTES (temp);
2042 if (m->savemode != VOIDmode)
2044 /* P sets REG to zero; but we should clear only
2045 the bits that are not covered by the mode
2047 rtx reg = m->set_dest;
2053 (GET_MODE (reg), and_optab, reg,
2054 GEN_INT ((((HOST_WIDE_INT) 1
2055 << GET_MODE_BITSIZE (m->savemode)))
2057 reg, 1, OPTAB_LIB_WIDEN);
2061 emit_move_insn (reg, tem);
2062 sequence = gen_sequence ();
2064 i1 = emit_insn_before (sequence, loop_start);
2066 else if (GET_CODE (p) == CALL_INSN)
2068 i1 = emit_call_insn_before (PATTERN (p), loop_start);
2069 /* Because the USAGE information potentially
2070 contains objects other than hard registers
2071 we need to copy it. */
2072 if (CALL_INSN_FUNCTION_USAGE (p))
2073 CALL_INSN_FUNCTION_USAGE (i1)
2074 = copy_rtx (CALL_INSN_FUNCTION_USAGE (p));
2076 else if (count == m->consec && m->move_insn_first)
2078 /* The SET_SRC might not be invariant, so we must
2079 use the REG_EQUAL note. */
2081 emit_move_insn (m->set_dest, m->set_src);
2082 temp = get_insns ();
2085 add_label_notes (m->set_src, temp);
2087 i1 = emit_insns_before (temp, loop_start);
2088 if (! find_reg_note (i1, REG_EQUAL, NULL_RTX))
2090 = gen_rtx_EXPR_LIST ((m->is_equiv ? REG_EQUIV
2092 m->set_src, REG_NOTES (i1));
2095 i1 = emit_insn_before (PATTERN (p), loop_start);
2097 if (REG_NOTES (i1) == 0)
2099 REG_NOTES (i1) = REG_NOTES (p);
2101 /* If there is a REG_EQUAL note present whose value
2102 is not loop invariant, then delete it, since it
2103 may cause problems with later optimization passes.
2104 It is possible for cse to create such notes
2105 like this as a result of record_jump_cond. */
2107 if ((temp = find_reg_note (i1, REG_EQUAL, NULL_RTX))
2108 && ! invariant_p (XEXP (temp, 0)))
2109 remove_note (i1, temp);
2115 if (loop_dump_stream)
2116 fprintf (loop_dump_stream, " moved to %d",
2119 /* If library call, now fix the REG_NOTES that contain
2120 insn pointers, namely REG_LIBCALL on FIRST
2121 and REG_RETVAL on I1. */
2122 if ((temp = find_reg_note (i1, REG_RETVAL, NULL_RTX)))
2124 XEXP (temp, 0) = first;
2125 temp = find_reg_note (first, REG_LIBCALL, NULL_RTX);
2126 XEXP (temp, 0) = i1;
2133 /* simplify_giv_expr expects that it can walk the insns
2134 at m->insn forwards and see this old sequence we are
2135 tossing here. delete_insn does preserve the next
2136 pointers, but when we skip over a NOTE we must fix
2137 it up. Otherwise that code walks into the non-deleted
2139 while (p && GET_CODE (p) == NOTE)
2140 p = NEXT_INSN (temp) = NEXT_INSN (p);
2143 /* The more regs we move, the less we like moving them. */
2147 /* Any other movable that loads the same register
2149 already_moved[regno] = 1;
2151 /* This reg has been moved out of one loop. */
2152 moved_once[regno] = 1;
2154 /* The reg set here is now invariant. */
2156 VARRAY_INT (set_in_loop, regno) = 0;
2160 /* Change the length-of-life info for the register
2161 to say it lives at least the full length of this loop.
2162 This will help guide optimizations in outer loops. */
2164 if (uid_luid[REGNO_FIRST_UID (regno)] > INSN_LUID (loop_start))
2165 /* This is the old insn before all the moved insns.
2166 We can't use the moved insn because it is out of range
2167 in uid_luid. Only the old insns have luids. */
2168 REGNO_FIRST_UID (regno) = INSN_UID (loop_start);
2169 if (uid_luid[REGNO_LAST_UID (regno)] < INSN_LUID (end))
2170 REGNO_LAST_UID (regno) = INSN_UID (end);
2172 /* Combine with this moved insn any other matching movables. */
2175 for (m1 = movables; m1; m1 = m1->next)
2180 /* Schedule the reg loaded by M1
2181 for replacement so that shares the reg of M.
2182 If the modes differ (only possible in restricted
2183 circumstances, make a SUBREG.
2185 Note this assumes that the target dependent files
2186 treat REG and SUBREG equally, including within
2187 GO_IF_LEGITIMATE_ADDRESS and in all the
2188 predicates since we never verify that replacing the
2189 original register with a SUBREG results in a
2190 recognizable insn. */
2191 if (GET_MODE (m->set_dest) == GET_MODE (m1->set_dest))
2192 reg_map[m1->regno] = m->set_dest;
2195 = gen_lowpart_common (GET_MODE (m1->set_dest),
2198 /* Get rid of the matching insn
2199 and prevent further processing of it. */
2202 /* if library call, delete all insn except last, which
2204 if ((temp = find_reg_note (m1->insn, REG_RETVAL,
2207 for (temp = XEXP (temp, 0); temp != m1->insn;
2208 temp = NEXT_INSN (temp))
2211 delete_insn (m1->insn);
2213 /* Any other movable that loads the same register
2215 already_moved[m1->regno] = 1;
2217 /* The reg merged here is now invariant,
2218 if the reg it matches is invariant. */
2220 VARRAY_INT (set_in_loop, m1->regno) = 0;
2223 else if (loop_dump_stream)
2224 fprintf (loop_dump_stream, "not desirable");
2226 else if (loop_dump_stream && !m->match)
2227 fprintf (loop_dump_stream, "not safe");
2229 if (loop_dump_stream)
2230 fprintf (loop_dump_stream, "\n");
2234 new_start = loop_start;
2236 /* Go through all the instructions in the loop, making
2237 all the register substitutions scheduled in REG_MAP. */
2238 for (p = new_start; p != end; p = NEXT_INSN (p))
2239 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
2240 || GET_CODE (p) == CALL_INSN)
2242 replace_regs (PATTERN (p), reg_map, nregs, 0);
2243 replace_regs (REG_NOTES (p), reg_map, nregs, 0);
2249 free (already_moved);
2253 /* Scan X and replace the address of any MEM in it with ADDR.
2254 REG is the address that MEM should have before the replacement. */
2257 replace_call_address (x, reg, addr)
2260 register enum rtx_code code;
2262 register const char *fmt;
2266 code = GET_CODE (x);
2280 /* Short cut for very common case. */
2281 replace_call_address (XEXP (x, 1), reg, addr);
2285 /* Short cut for very common case. */
2286 replace_call_address (XEXP (x, 0), reg, addr);
2290 /* If this MEM uses a reg other than the one we expected,
2291 something is wrong. */
2292 if (XEXP (x, 0) != reg)
2301 fmt = GET_RTX_FORMAT (code);
2302 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2305 replace_call_address (XEXP (x, i), reg, addr);
2309 for (j = 0; j < XVECLEN (x, i); j++)
2310 replace_call_address (XVECEXP (x, i, j), reg, addr);
2316 /* Return the number of memory refs to addresses that vary
2320 count_nonfixed_reads (x)
2323 register enum rtx_code code;
2325 register const char *fmt;
2331 code = GET_CODE (x);
2345 return ((invariant_p (XEXP (x, 0)) != 1)
2346 + count_nonfixed_reads (XEXP (x, 0)));
2353 fmt = GET_RTX_FORMAT (code);
2354 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2357 value += count_nonfixed_reads (XEXP (x, i));
2361 for (j = 0; j < XVECLEN (x, i); j++)
2362 value += count_nonfixed_reads (XVECEXP (x, i, j));
2370 /* P is an instruction that sets a register to the result of a ZERO_EXTEND.
2371 Replace it with an instruction to load just the low bytes
2372 if the machine supports such an instruction,
2373 and insert above LOOP_START an instruction to clear the register. */
2376 constant_high_bytes (p, loop_start)
2380 register int insn_code_number;
2382 /* Try to change (SET (REG ...) (ZERO_EXTEND (..:B ...)))
2383 to (SET (STRICT_LOW_PART (SUBREG:B (REG...))) ...). */
2388 gen_rtx_STRICT_LOW_PART
2390 gen_rtx_SUBREG (GET_MODE (XEXP (SET_SRC (PATTERN (p)), 0)),
2391 SET_DEST (PATTERN (p)), 0)),
2392 XEXP (SET_SRC (PATTERN (p)), 0));
2394 insn_code_number = recog (new, p);
2396 if (insn_code_number)
2400 /* Clear destination register before the loop. */
2401 emit_insn_before (gen_rtx_SET (VOIDmode,
2402 SET_DEST (PATTERN (p)), const0_rtx),
2405 /* Inside the loop, just load the low part. */
2411 /* Scan a loop setting the elements `cont', `vtop', `loops_enclosed',
2412 `has_call', `has_volatile', and `has_tablejump' within LOOP_INFO.
2413 Set the global variables `unknown_address_altered',
2414 `unknown_constant_address_altered', and `num_mem_sets'. Also, fill
2415 in the array `loop_mems' and the list `loop_store_mems'. */
2418 prescan_loop (start, end, loop_info)
2420 struct loop_info *loop_info;
2422 register int level = 1;
2424 /* The label after END. Jumping here is just like falling off the
2425 end of the loop. We use next_nonnote_insn instead of next_label
2426 as a hedge against the (pathological) case where some actual insn
2427 might end up between the two. */
2428 rtx exit_target = next_nonnote_insn (end);
2430 loop_info->num = uid_loop_num [INSN_UID (start)];
2431 loop_info->has_indirect_jump = indirect_jump_in_function;
2432 loop_info->has_call = 0;
2433 loop_info->has_volatile = 0;
2434 loop_info->has_tablejump = 0;
2435 loop_info->loops_enclosed = 1;
2436 loop_info->has_multiple_exit_targets = 0;
2437 loop_info->cont = 0;
2438 loop_info->vtop = 0;
2440 unknown_address_altered = 0;
2441 unknown_constant_address_altered = 0;
2442 loop_store_mems = NULL_RTX;
2443 first_loop_store_insn = NULL_RTX;
2447 for (insn = NEXT_INSN (start); insn != NEXT_INSN (end);
2448 insn = NEXT_INSN (insn))
2450 if (GET_CODE (insn) == NOTE)
2452 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
2455 /* Count number of loops contained in this one. */
2456 loop_info->loops_enclosed++;
2458 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END)
2467 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_CONT)
2470 loop_info->cont = insn;
2472 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_VTOP)
2474 /* If there is a NOTE_INSN_LOOP_VTOP, then this is a for
2475 or while style loop, with a loop exit test at the
2476 start. Thus, we can assume that the loop condition
2477 was true when the loop was entered. */
2479 loop_info->vtop = insn;
2482 else if (GET_CODE (insn) == CALL_INSN)
2484 if (! CONST_CALL_P (insn))
2485 unknown_address_altered = 1;
2486 loop_info->has_call = 1;
2488 else if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN)
2490 rtx label1 = NULL_RTX;
2491 rtx label2 = NULL_RTX;
2493 if (volatile_refs_p (PATTERN (insn)))
2494 loop_info->has_volatile = 1;
2496 if (GET_CODE (insn) == JUMP_INSN
2497 && (GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC
2498 || GET_CODE (PATTERN (insn)) == ADDR_VEC))
2499 loop_info->has_tablejump = 1;
2501 note_stores (PATTERN (insn), note_addr_stored, NULL);
2502 if (! first_loop_store_insn && loop_store_mems)
2503 first_loop_store_insn = insn;
2505 if (! loop_info->has_multiple_exit_targets
2506 && GET_CODE (insn) == JUMP_INSN
2507 && GET_CODE (PATTERN (insn)) == SET
2508 && SET_DEST (PATTERN (insn)) == pc_rtx)
2510 if (GET_CODE (SET_SRC (PATTERN (insn))) == IF_THEN_ELSE)
2512 label1 = XEXP (SET_SRC (PATTERN (insn)), 1);
2513 label2 = XEXP (SET_SRC (PATTERN (insn)), 2);
2517 label1 = SET_SRC (PATTERN (insn));
2521 if (label1 && label1 != pc_rtx)
2523 if (GET_CODE (label1) != LABEL_REF)
2525 /* Something tricky. */
2526 loop_info->has_multiple_exit_targets = 1;
2529 else if (XEXP (label1, 0) != exit_target
2530 && LABEL_OUTSIDE_LOOP_P (label1))
2532 /* A jump outside the current loop. */
2533 loop_info->has_multiple_exit_targets = 1;
2543 else if (GET_CODE (insn) == RETURN)
2544 loop_info->has_multiple_exit_targets = 1;
2547 /* Now, rescan the loop, setting up the LOOP_MEMS array. */
2548 if (/* We can't tell what MEMs are aliased by what. */
2549 !unknown_address_altered
2550 /* An exception thrown by a called function might land us
2552 && !loop_info->has_call
2553 /* We don't want loads for MEMs moved to a location before the
2554 one at which their stack memory becomes allocated. (Note
2555 that this is not a problem for malloc, etc., since those
2556 require actual function calls. */
2557 && !current_function_calls_alloca
2558 /* There are ways to leave the loop other than falling off the
2560 && !loop_info->has_multiple_exit_targets)
2561 for (insn = NEXT_INSN (start); insn != NEXT_INSN (end);
2562 insn = NEXT_INSN (insn))
2563 for_each_rtx (&insn, insert_loop_mem, 0);
2566 /* LOOP_NUMBER_CONT_DOMINATOR is now the last label between the loop start
2567 and the continue note that is a the destination of a (cond)jump after
2568 the continue note. If there is any (cond)jump between the loop start
2569 and what we have so far as LOOP_NUMBER_CONT_DOMINATOR that has a
2570 target between LOOP_DOMINATOR and the continue note, move
2571 LOOP_NUMBER_CONT_DOMINATOR forward to that label; if a jump's
2572 destination cannot be determined, clear LOOP_NUMBER_CONT_DOMINATOR. */
2575 verify_dominator (loop_number)
2580 if (! loop_number_cont_dominator[loop_number])
2581 /* This can happen for an empty loop, e.g. in
2582 gcc.c-torture/compile/920410-2.c */
2584 if (loop_number_cont_dominator[loop_number] == const0_rtx)
2586 loop_number_cont_dominator[loop_number] = 0;
2589 for (insn = loop_number_loop_starts[loop_number];
2590 insn != loop_number_cont_dominator[loop_number];
2591 insn = NEXT_INSN (insn))
2593 if (GET_CODE (insn) == JUMP_INSN
2594 && GET_CODE (PATTERN (insn)) != RETURN)
2596 rtx label = JUMP_LABEL (insn);
2599 /* If it is not a jump we can easily understand or for
2600 which we do not have jump target information in the JUMP_LABEL
2601 field (consider ADDR_VEC and ADDR_DIFF_VEC insns), then clear
2602 LOOP_NUMBER_CONT_DOMINATOR. */
2603 if ((! condjump_p (insn)
2604 && ! condjump_in_parallel_p (insn))
2605 || label == NULL_RTX)
2607 loop_number_cont_dominator[loop_number] = NULL_RTX;
2611 label_luid = INSN_LUID (label);
2612 if (label_luid < INSN_LUID (loop_number_loop_cont[loop_number])
2614 > INSN_LUID (loop_number_cont_dominator[loop_number])))
2615 loop_number_cont_dominator[loop_number] = label;
2620 /* Scan the function looking for loops. Record the start and end of each loop.
2621 Also mark as invalid loops any loops that contain a setjmp or are branched
2622 to from outside the loop. */
2625 find_and_verify_loops (f)
2629 int current_loop = -1;
2633 compute_luids (f, NULL_RTX, 0);
2635 /* If there are jumps to undefined labels,
2636 treat them as jumps out of any/all loops.
2637 This also avoids writing past end of tables when there are no loops. */
2638 uid_loop_num[0] = -1;
2640 /* Find boundaries of loops, mark which loops are contained within
2641 loops, and invalidate loops that have setjmp. */
2643 for (insn = f; insn; insn = NEXT_INSN (insn))
2645 if (GET_CODE (insn) == NOTE)
2646 switch (NOTE_LINE_NUMBER (insn))
2648 case NOTE_INSN_LOOP_BEG:
2649 loop_number_loop_starts[++next_loop] = insn;
2650 loop_number_loop_ends[next_loop] = 0;
2651 loop_number_loop_cont[next_loop] = 0;
2652 loop_number_cont_dominator[next_loop] = 0;
2653 loop_outer_loop[next_loop] = current_loop;
2654 loop_invalid[next_loop] = 0;
2655 loop_number_exit_labels[next_loop] = 0;
2656 loop_number_exit_count[next_loop] = 0;
2657 current_loop = next_loop;
2660 case NOTE_INSN_SETJMP:
2661 /* In this case, we must invalidate our current loop and any
2663 for (loop = current_loop; loop != -1; loop = loop_outer_loop[loop])
2665 loop_invalid[loop] = 1;
2666 if (loop_dump_stream)
2667 fprintf (loop_dump_stream,
2668 "\nLoop at %d ignored due to setjmp.\n",
2669 INSN_UID (loop_number_loop_starts[loop]));
2673 case NOTE_INSN_LOOP_CONT:
2674 loop_number_loop_cont[current_loop] = insn;
2676 case NOTE_INSN_LOOP_END:
2677 if (current_loop == -1)
2680 loop_number_loop_ends[current_loop] = insn;
2681 verify_dominator (current_loop);
2682 current_loop = loop_outer_loop[current_loop];
2688 /* If for any loop, this is a jump insn between the NOTE_INSN_LOOP_CONT
2689 and NOTE_INSN_LOOP_END notes, update loop_number_loop_dominator. */
2690 else if (GET_CODE (insn) == JUMP_INSN
2691 && GET_CODE (PATTERN (insn)) != RETURN
2692 && current_loop >= 0)
2695 rtx label = JUMP_LABEL (insn);
2697 if (! condjump_p (insn) && ! condjump_in_parallel_p (insn))
2700 this_loop_num = current_loop;
2703 /* First see if we care about this loop. */
2704 if (loop_number_loop_cont[this_loop_num]
2705 && loop_number_cont_dominator[this_loop_num] != const0_rtx)
2707 /* If the jump destination is not known, invalidate
2708 loop_number_const_dominator. */
2710 loop_number_cont_dominator[this_loop_num] = const0_rtx;
2712 /* Check if the destination is between loop start and
2714 if ((INSN_LUID (label)
2715 < INSN_LUID (loop_number_loop_cont[this_loop_num]))
2716 && (INSN_LUID (label)
2717 > INSN_LUID (loop_number_loop_starts[this_loop_num]))
2718 /* And if there is no later destination already
2720 && (! loop_number_cont_dominator[this_loop_num]
2721 || (INSN_LUID (label)
2722 > INSN_LUID (loop_number_cont_dominator
2724 loop_number_cont_dominator[this_loop_num] = label;
2726 this_loop_num = loop_outer_loop[this_loop_num];
2728 while (this_loop_num >= 0);
2731 /* Note that this will mark the NOTE_INSN_LOOP_END note as being in the
2732 enclosing loop, but this doesn't matter. */
2733 uid_loop_num[INSN_UID (insn)] = current_loop;
2736 /* Any loop containing a label used in an initializer must be invalidated,
2737 because it can be jumped into from anywhere. */
2739 for (label = forced_labels; label; label = XEXP (label, 1))
2743 for (loop_num = uid_loop_num[INSN_UID (XEXP (label, 0))];
2745 loop_num = loop_outer_loop[loop_num])
2746 loop_invalid[loop_num] = 1;
2749 /* Any loop containing a label used for an exception handler must be
2750 invalidated, because it can be jumped into from anywhere. */
2752 for (label = exception_handler_labels; label; label = XEXP (label, 1))
2756 for (loop_num = uid_loop_num[INSN_UID (XEXP (label, 0))];
2758 loop_num = loop_outer_loop[loop_num])
2759 loop_invalid[loop_num] = 1;
2762 /* Now scan all insn's in the function. If any JUMP_INSN branches into a
2763 loop that it is not contained within, that loop is marked invalid.
2764 If any INSN or CALL_INSN uses a label's address, then the loop containing
2765 that label is marked invalid, because it could be jumped into from
2768 Also look for blocks of code ending in an unconditional branch that
2769 exits the loop. If such a block is surrounded by a conditional
2770 branch around the block, move the block elsewhere (see below) and
2771 invert the jump to point to the code block. This may eliminate a
2772 label in our loop and will simplify processing by both us and a
2773 possible second cse pass. */
2775 for (insn = f; insn; insn = NEXT_INSN (insn))
2776 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
2778 int this_loop_num = uid_loop_num[INSN_UID (insn)];
2780 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
2782 rtx note = find_reg_note (insn, REG_LABEL, NULL_RTX);
2787 for (loop_num = uid_loop_num[INSN_UID (XEXP (note, 0))];
2789 loop_num = loop_outer_loop[loop_num])
2790 loop_invalid[loop_num] = 1;
2794 if (GET_CODE (insn) != JUMP_INSN)
2797 mark_loop_jump (PATTERN (insn), this_loop_num);
2799 /* See if this is an unconditional branch outside the loop. */
2800 if (this_loop_num != -1
2801 && (GET_CODE (PATTERN (insn)) == RETURN
2802 || (simplejump_p (insn)
2803 && (uid_loop_num[INSN_UID (JUMP_LABEL (insn))]
2805 && get_max_uid () < max_uid_for_loop)
2808 rtx our_next = next_real_insn (insn);
2809 rtx last_insn_to_move = NEXT_INSN (insn);
2811 int outer_loop = -1;
2813 /* Go backwards until we reach the start of the loop, a label,
2815 for (p = PREV_INSN (insn);
2816 GET_CODE (p) != CODE_LABEL
2817 && ! (GET_CODE (p) == NOTE
2818 && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
2819 && GET_CODE (p) != JUMP_INSN;
2823 /* Check for the case where we have a jump to an inner nested
2824 loop, and do not perform the optimization in that case. */
2826 if (JUMP_LABEL (insn))
2828 dest_loop = uid_loop_num[INSN_UID (JUMP_LABEL (insn))];
2829 if (dest_loop != -1)
2831 for (outer_loop = dest_loop; outer_loop != -1;
2832 outer_loop = loop_outer_loop[outer_loop])
2833 if (outer_loop == this_loop_num)
2838 /* Make sure that the target of P is within the current loop. */
2840 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p)
2841 && uid_loop_num[INSN_UID (JUMP_LABEL (p))] != this_loop_num)
2842 outer_loop = this_loop_num;
2844 /* If we stopped on a JUMP_INSN to the next insn after INSN,
2845 we have a block of code to try to move.
2847 We look backward and then forward from the target of INSN
2848 to find a BARRIER at the same loop depth as the target.
2849 If we find such a BARRIER, we make a new label for the start
2850 of the block, invert the jump in P and point it to that label,
2851 and move the block of code to the spot we found. */
2853 if (outer_loop == -1
2854 && GET_CODE (p) == JUMP_INSN
2855 && JUMP_LABEL (p) != 0
2856 /* Just ignore jumps to labels that were never emitted.
2857 These always indicate compilation errors. */
2858 && INSN_UID (JUMP_LABEL (p)) != 0
2860 && ! simplejump_p (p)
2861 && next_real_insn (JUMP_LABEL (p)) == our_next
2862 /* If it's not safe to move the sequence, then we
2864 && insns_safe_to_move_p (p, NEXT_INSN (insn),
2865 &last_insn_to_move))
2868 = JUMP_LABEL (insn) ? JUMP_LABEL (insn) : get_last_insn ();
2869 int target_loop_num = uid_loop_num[INSN_UID (target)];
2872 for (loc = target; loc; loc = PREV_INSN (loc))
2873 if (GET_CODE (loc) == BARRIER
2874 /* Don't move things inside a tablejump. */
2875 && ((loc2 = next_nonnote_insn (loc)) == 0
2876 || GET_CODE (loc2) != CODE_LABEL
2877 || (loc2 = next_nonnote_insn (loc2)) == 0
2878 || GET_CODE (loc2) != JUMP_INSN
2879 || (GET_CODE (PATTERN (loc2)) != ADDR_VEC
2880 && GET_CODE (PATTERN (loc2)) != ADDR_DIFF_VEC))
2881 && uid_loop_num[INSN_UID (loc)] == target_loop_num)
2885 for (loc = target; loc; loc = NEXT_INSN (loc))
2886 if (GET_CODE (loc) == BARRIER
2887 /* Don't move things inside a tablejump. */
2888 && ((loc2 = next_nonnote_insn (loc)) == 0
2889 || GET_CODE (loc2) != CODE_LABEL
2890 || (loc2 = next_nonnote_insn (loc2)) == 0
2891 || GET_CODE (loc2) != JUMP_INSN
2892 || (GET_CODE (PATTERN (loc2)) != ADDR_VEC
2893 && GET_CODE (PATTERN (loc2)) != ADDR_DIFF_VEC))
2894 && uid_loop_num[INSN_UID (loc)] == target_loop_num)
2899 rtx cond_label = JUMP_LABEL (p);
2900 rtx new_label = get_label_after (p);
2902 /* Ensure our label doesn't go away. */
2903 LABEL_NUSES (cond_label)++;
2905 /* Verify that uid_loop_num is large enough and that
2907 if (invert_jump (p, new_label))
2911 /* If no suitable BARRIER was found, create a suitable
2912 one before TARGET. Since TARGET is a fall through
2913 path, we'll need to insert an jump around our block
2914 and a add a BARRIER before TARGET.
2916 This creates an extra unconditional jump outside
2917 the loop. However, the benefits of removing rarely
2918 executed instructions from inside the loop usually
2919 outweighs the cost of the extra unconditional jump
2920 outside the loop. */
2925 temp = gen_jump (JUMP_LABEL (insn));
2926 temp = emit_jump_insn_before (temp, target);
2927 JUMP_LABEL (temp) = JUMP_LABEL (insn);
2928 LABEL_NUSES (JUMP_LABEL (insn))++;
2929 loc = emit_barrier_before (target);
2932 /* Include the BARRIER after INSN and copy the
2934 new_label = squeeze_notes (new_label,
2936 reorder_insns (new_label, last_insn_to_move, loc);
2938 /* All those insns are now in TARGET_LOOP_NUM. */
2940 q != NEXT_INSN (last_insn_to_move);
2942 uid_loop_num[INSN_UID (q)] = target_loop_num;
2944 /* The label jumped to by INSN is no longer a loop exit.
2945 Unless INSN does not have a label (e.g., it is a
2946 RETURN insn), search loop_number_exit_labels to find
2947 its label_ref, and remove it. Also turn off
2948 LABEL_OUTSIDE_LOOP_P bit. */
2949 if (JUMP_LABEL (insn))
2954 r = loop_number_exit_labels[this_loop_num];
2955 r; q = r, r = LABEL_NEXTREF (r))
2956 if (XEXP (r, 0) == JUMP_LABEL (insn))
2958 LABEL_OUTSIDE_LOOP_P (r) = 0;
2960 LABEL_NEXTREF (q) = LABEL_NEXTREF (r);
2962 loop_number_exit_labels[this_loop_num]
2963 = LABEL_NEXTREF (r);
2967 for (loop_num = this_loop_num;
2968 loop_num != -1 && loop_num != target_loop_num;
2969 loop_num = loop_outer_loop[loop_num])
2970 loop_number_exit_count[loop_num]--;
2972 /* If we didn't find it, then something is wrong. */
2977 /* P is now a jump outside the loop, so it must be put
2978 in loop_number_exit_labels, and marked as such.
2979 The easiest way to do this is to just call
2980 mark_loop_jump again for P. */
2981 mark_loop_jump (PATTERN (p), this_loop_num);
2983 /* If INSN now jumps to the insn after it,
2985 if (JUMP_LABEL (insn) != 0
2986 && (next_real_insn (JUMP_LABEL (insn))
2987 == next_real_insn (insn)))
2991 /* Continue the loop after where the conditional
2992 branch used to jump, since the only branch insn
2993 in the block (if it still remains) is an inter-loop
2994 branch and hence needs no processing. */
2995 insn = NEXT_INSN (cond_label);
2997 if (--LABEL_NUSES (cond_label) == 0)
2998 delete_insn (cond_label);
3000 /* This loop will be continued with NEXT_INSN (insn). */
3001 insn = PREV_INSN (insn);
3008 /* If any label in X jumps to a loop different from LOOP_NUM and any of the
3009 loops it is contained in, mark the target loop invalid.
3011 For speed, we assume that X is part of a pattern of a JUMP_INSN. */
3014 mark_loop_jump (x, loop_num)
3022 switch (GET_CODE (x))
3035 /* There could be a label reference in here. */
3036 mark_loop_jump (XEXP (x, 0), loop_num);
3042 mark_loop_jump (XEXP (x, 0), loop_num);
3043 mark_loop_jump (XEXP (x, 1), loop_num);
3047 /* This may refer to a LABEL_REF or SYMBOL_REF. */
3048 mark_loop_jump (XEXP (x, 1), loop_num);
3053 mark_loop_jump (XEXP (x, 0), loop_num);
3057 dest_loop = uid_loop_num[INSN_UID (XEXP (x, 0))];
3059 /* Link together all labels that branch outside the loop. This
3060 is used by final_[bg]iv_value and the loop unrolling code. Also
3061 mark this LABEL_REF so we know that this branch should predict
3064 /* A check to make sure the label is not in an inner nested loop,
3065 since this does not count as a loop exit. */
3066 if (dest_loop != -1)
3068 for (outer_loop = dest_loop; outer_loop != -1;
3069 outer_loop = loop_outer_loop[outer_loop])
3070 if (outer_loop == loop_num)
3076 if (loop_num != -1 && outer_loop == -1)
3078 LABEL_OUTSIDE_LOOP_P (x) = 1;
3079 LABEL_NEXTREF (x) = loop_number_exit_labels[loop_num];
3080 loop_number_exit_labels[loop_num] = x;
3082 for (outer_loop = loop_num;
3083 outer_loop != -1 && outer_loop != dest_loop;
3084 outer_loop = loop_outer_loop[outer_loop])
3085 loop_number_exit_count[outer_loop]++;
3088 /* If this is inside a loop, but not in the current loop or one enclosed
3089 by it, it invalidates at least one loop. */
3091 if (dest_loop == -1)
3094 /* We must invalidate every nested loop containing the target of this
3095 label, except those that also contain the jump insn. */
3097 for (; dest_loop != -1; dest_loop = loop_outer_loop[dest_loop])
3099 /* Stop when we reach a loop that also contains the jump insn. */
3100 for (outer_loop = loop_num; outer_loop != -1;
3101 outer_loop = loop_outer_loop[outer_loop])
3102 if (dest_loop == outer_loop)
3105 /* If we get here, we know we need to invalidate a loop. */
3106 if (loop_dump_stream && ! loop_invalid[dest_loop])
3107 fprintf (loop_dump_stream,
3108 "\nLoop at %d ignored due to multiple entry points.\n",
3109 INSN_UID (loop_number_loop_starts[dest_loop]));
3111 loop_invalid[dest_loop] = 1;
3116 /* If this is not setting pc, ignore. */
3117 if (SET_DEST (x) == pc_rtx)
3118 mark_loop_jump (SET_SRC (x), loop_num);
3122 mark_loop_jump (XEXP (x, 1), loop_num);
3123 mark_loop_jump (XEXP (x, 2), loop_num);
3128 for (i = 0; i < XVECLEN (x, 0); i++)
3129 mark_loop_jump (XVECEXP (x, 0, i), loop_num);
3133 for (i = 0; i < XVECLEN (x, 1); i++)
3134 mark_loop_jump (XVECEXP (x, 1, i), loop_num);
3138 /* Strictly speaking this is not a jump into the loop, only a possible
3139 jump out of the loop. However, we have no way to link the destination
3140 of this jump onto the list of exit labels. To be safe we mark this
3141 loop and any containing loops as invalid. */
3144 for (outer_loop = loop_num; outer_loop != -1;
3145 outer_loop = loop_outer_loop[outer_loop])
3147 if (loop_dump_stream && ! loop_invalid[outer_loop])
3148 fprintf (loop_dump_stream,
3149 "\nLoop at %d ignored due to unknown exit jump.\n",
3150 INSN_UID (loop_number_loop_starts[outer_loop]));
3151 loop_invalid[outer_loop] = 1;
3158 /* Return nonzero if there is a label in the range from
3159 insn INSN to and including the insn whose luid is END
3160 INSN must have an assigned luid (i.e., it must not have
3161 been previously created by loop.c). */
3164 labels_in_range_p (insn, end)
3168 while (insn && INSN_LUID (insn) <= end)
3170 if (GET_CODE (insn) == CODE_LABEL)
3172 insn = NEXT_INSN (insn);
3178 /* Record that a memory reference X is being set. */
3181 note_addr_stored (x, y, data)
3183 rtx y ATTRIBUTE_UNUSED;
3184 void *data ATTRIBUTE_UNUSED;
3186 if (x == 0 || GET_CODE (x) != MEM)
3189 /* Count number of memory writes.
3190 This affects heuristics in strength_reduce. */
3193 /* BLKmode MEM means all memory is clobbered. */
3194 if (GET_MODE (x) == BLKmode)
3196 if (RTX_UNCHANGING_P (x))
3197 unknown_constant_address_altered = 1;
3199 unknown_address_altered = 1;
3204 loop_store_mems = gen_rtx_EXPR_LIST (VOIDmode, x, loop_store_mems);
3207 /* X is a value modified by an INSN that references a biv inside a loop
3208 exit test (ie, X is somehow related to the value of the biv). If X
3209 is a pseudo that is used more than once, then the biv is (effectively)
3210 used more than once. DATA is really an `int *', and is set if the
3211 biv is used more than once. */
3214 note_set_pseudo_multiple_uses (x, y, data)
3216 rtx y ATTRIBUTE_UNUSED;
3222 while (GET_CODE (x) == STRICT_LOW_PART
3223 || GET_CODE (x) == SIGN_EXTRACT
3224 || GET_CODE (x) == ZERO_EXTRACT
3225 || GET_CODE (x) == SUBREG)
3228 if (GET_CODE (x) != REG || REGNO (x) < FIRST_PSEUDO_REGISTER)
3231 /* If we do not have usage information, or if we know the register
3232 is used more than once, note that fact for check_dbra_loop. */
3233 if (REGNO (x) >= max_reg_before_loop
3234 || ! VARRAY_RTX (reg_single_usage, REGNO (x))
3235 || VARRAY_RTX (reg_single_usage, REGNO (x)) == const0_rtx)
3236 *((int *) data) = 1;
3239 /* Return nonzero if the rtx X is invariant over the current loop.
3241 The value is 2 if we refer to something only conditionally invariant.
3243 If `unknown_address_altered' is nonzero, no memory ref is invariant.
3244 Otherwise, a memory ref is invariant if it does not conflict with
3245 anything stored in `loop_store_mems'. */
3252 register enum rtx_code code;
3253 register const char *fmt;
3254 int conditional = 0;
3259 code = GET_CODE (x);
3269 /* A LABEL_REF is normally invariant, however, if we are unrolling
3270 loops, and this label is inside the loop, then it isn't invariant.
3271 This is because each unrolled copy of the loop body will have
3272 a copy of this label. If this was invariant, then an insn loading
3273 the address of this label into a register might get moved outside
3274 the loop, and then each loop body would end up using the same label.
3276 We don't know the loop bounds here though, so just fail for all
3278 if (flag_unroll_loops)
3285 case UNSPEC_VOLATILE:
3289 /* We used to check RTX_UNCHANGING_P (x) here, but that is invalid
3290 since the reg might be set by initialization within the loop. */
3292 if ((x == frame_pointer_rtx || x == hard_frame_pointer_rtx
3293 || x == arg_pointer_rtx)
3294 && ! current_function_has_nonlocal_goto)
3297 if (this_loop_info.has_call
3298 && REGNO (x) < FIRST_PSEUDO_REGISTER && call_used_regs[REGNO (x)])
3301 if (VARRAY_INT (set_in_loop, REGNO (x)) < 0)
3304 return VARRAY_INT (set_in_loop, REGNO (x)) == 0;
3307 /* Volatile memory references must be rejected. Do this before
3308 checking for read-only items, so that volatile read-only items
3309 will be rejected also. */
3310 if (MEM_VOLATILE_P (x))
3313 /* If we had a subroutine call, any location in memory could
3314 have been clobbered. We used to test here for volatile and
3315 readonly, but true_dependence knows how to do that better
3317 if (RTX_UNCHANGING_P (x)
3318 ? unknown_constant_address_altered : unknown_address_altered)
3321 /* See if there is any dependence between a store and this load. */
3322 mem_list_entry = loop_store_mems;
3323 while (mem_list_entry)
3325 if (true_dependence (XEXP (mem_list_entry, 0), VOIDmode,
3329 mem_list_entry = XEXP (mem_list_entry, 1);
3332 /* It's not invalidated by a store in memory
3333 but we must still verify the address is invariant. */
3337 /* Don't mess with insns declared volatile. */
3338 if (MEM_VOLATILE_P (x))
3346 fmt = GET_RTX_FORMAT (code);
3347 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3351 int tem = invariant_p (XEXP (x, i));
3357 else if (fmt[i] == 'E')
3360 for (j = 0; j < XVECLEN (x, i); j++)
3362 int tem = invariant_p (XVECEXP (x, i, j));
3372 return 1 + conditional;
3376 /* Return nonzero if all the insns in the loop that set REG
3377 are INSN and the immediately following insns,
3378 and if each of those insns sets REG in an invariant way
3379 (not counting uses of REG in them).
3381 The value is 2 if some of these insns are only conditionally invariant.
3383 We assume that INSN itself is the first set of REG
3384 and that its source is invariant. */
3387 consec_sets_invariant_p (reg, n_sets, insn)
3391 register rtx p = insn;
3392 register int regno = REGNO (reg);
3394 /* Number of sets we have to insist on finding after INSN. */
3395 int count = n_sets - 1;
3396 int old = VARRAY_INT (set_in_loop, regno);
3400 /* If N_SETS hit the limit, we can't rely on its value. */
3404 VARRAY_INT (set_in_loop, regno) = 0;
3408 register enum rtx_code code;
3412 code = GET_CODE (p);
3414 /* If library call, skip to end of it. */
3415 if (code == INSN && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
3420 && (set = single_set (p))
3421 && GET_CODE (SET_DEST (set)) == REG
3422 && REGNO (SET_DEST (set)) == regno)
3424 this = invariant_p (SET_SRC (set));
3427 else if ((temp = find_reg_note (p, REG_EQUAL, NULL_RTX)))
3429 /* If this is a libcall, then any invariant REG_EQUAL note is OK.
3430 If this is an ordinary insn, then only CONSTANT_P REG_EQUAL
3432 this = (CONSTANT_P (XEXP (temp, 0))
3433 || (find_reg_note (p, REG_RETVAL, NULL_RTX)
3434 && invariant_p (XEXP (temp, 0))));
3441 else if (code != NOTE)
3443 VARRAY_INT (set_in_loop, regno) = old;
3448 VARRAY_INT (set_in_loop, regno) = old;
3449 /* If invariant_p ever returned 2, we return 2. */
3450 return 1 + (value & 2);
3454 /* I don't think this condition is sufficient to allow INSN
3455 to be moved, so we no longer test it. */
3457 /* Return 1 if all insns in the basic block of INSN and following INSN
3458 that set REG are invariant according to TABLE. */
3461 all_sets_invariant_p (reg, insn, table)
3465 register rtx p = insn;
3466 register int regno = REGNO (reg);
3470 register enum rtx_code code;
3472 code = GET_CODE (p);
3473 if (code == CODE_LABEL || code == JUMP_INSN)
3475 if (code == INSN && GET_CODE (PATTERN (p)) == SET
3476 && GET_CODE (SET_DEST (PATTERN (p))) == REG
3477 && REGNO (SET_DEST (PATTERN (p))) == regno)
3479 if (!invariant_p (SET_SRC (PATTERN (p)), table))
3486 /* Look at all uses (not sets) of registers in X. For each, if it is
3487 the single use, set USAGE[REGNO] to INSN; if there was a previous use in
3488 a different insn, set USAGE[REGNO] to const0_rtx. */
3491 find_single_use_in_loop (insn, x, usage)
3496 enum rtx_code code = GET_CODE (x);
3497 const char *fmt = GET_RTX_FORMAT (code);
3501 VARRAY_RTX (usage, REGNO (x))
3502 = (VARRAY_RTX (usage, REGNO (x)) != 0
3503 && VARRAY_RTX (usage, REGNO (x)) != insn)
3504 ? const0_rtx : insn;
3506 else if (code == SET)
3508 /* Don't count SET_DEST if it is a REG; otherwise count things
3509 in SET_DEST because if a register is partially modified, it won't
3510 show up as a potential movable so we don't care how USAGE is set
3512 if (GET_CODE (SET_DEST (x)) != REG)
3513 find_single_use_in_loop (insn, SET_DEST (x), usage);
3514 find_single_use_in_loop (insn, SET_SRC (x), usage);
3517 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3519 if (fmt[i] == 'e' && XEXP (x, i) != 0)
3520 find_single_use_in_loop (insn, XEXP (x, i), usage);
3521 else if (fmt[i] == 'E')
3522 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3523 find_single_use_in_loop (insn, XVECEXP (x, i, j), usage);
3527 /* Count and record any set in X which is contained in INSN. Update
3528 MAY_NOT_MOVE and LAST_SET for any register set in X. */
3531 count_one_set (insn, x, may_not_move, last_set)
3533 varray_type may_not_move;
3536 if (GET_CODE (x) == CLOBBER && GET_CODE (XEXP (x, 0)) == REG)
3537 /* Don't move a reg that has an explicit clobber.
3538 It's not worth the pain to try to do it correctly. */
3539 VARRAY_CHAR (may_not_move, REGNO (XEXP (x, 0))) = 1;
3541 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
3543 rtx dest = SET_DEST (x);
3544 while (GET_CODE (dest) == SUBREG
3545 || GET_CODE (dest) == ZERO_EXTRACT
3546 || GET_CODE (dest) == SIGN_EXTRACT
3547 || GET_CODE (dest) == STRICT_LOW_PART)
3548 dest = XEXP (dest, 0);
3549 if (GET_CODE (dest) == REG)
3551 register int regno = REGNO (dest);
3552 /* If this is the first setting of this reg
3553 in current basic block, and it was set before,
3554 it must be set in two basic blocks, so it cannot
3555 be moved out of the loop. */
3556 if (VARRAY_INT (set_in_loop, regno) > 0
3557 && last_set[regno] == 0)
3558 VARRAY_CHAR (may_not_move, regno) = 1;
3559 /* If this is not first setting in current basic block,
3560 see if reg was used in between previous one and this.
3561 If so, neither one can be moved. */
3562 if (last_set[regno] != 0
3563 && reg_used_between_p (dest, last_set[regno], insn))
3564 VARRAY_CHAR (may_not_move, regno) = 1;
3565 if (VARRAY_INT (set_in_loop, regno) < 127)
3566 ++VARRAY_INT (set_in_loop, regno);
3567 last_set[regno] = insn;
3572 /* Increment SET_IN_LOOP at the index of each register
3573 that is modified by an insn between FROM and TO.
3574 If the value of an element of SET_IN_LOOP becomes 127 or more,
3575 stop incrementing it, to avoid overflow.
3577 Store in SINGLE_USAGE[I] the single insn in which register I is
3578 used, if it is only used once. Otherwise, it is set to 0 (for no
3579 uses) or const0_rtx for more than one use. This parameter may be zero,
3580 in which case this processing is not done.
3582 Store in *COUNT_PTR the number of actual instruction
3583 in the loop. We use this to decide what is worth moving out. */
3585 /* last_set[n] is nonzero iff reg n has been set in the current basic block.
3586 In that case, it is the insn that last set reg n. */
3589 count_loop_regs_set (from, to, may_not_move, single_usage, count_ptr, nregs)
3590 register rtx from, to;
3591 varray_type may_not_move;
3592 varray_type single_usage;
3596 register rtx *last_set = (rtx *) xcalloc (nregs, sizeof (rtx));
3598 register int count = 0;
3600 for (insn = from; insn != to; insn = NEXT_INSN (insn))
3602 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
3606 /* Record registers that have exactly one use. */
3607 find_single_use_in_loop (insn, PATTERN (insn), single_usage);
3609 /* Include uses in REG_EQUAL notes. */
3610 if (REG_NOTES (insn))
3611 find_single_use_in_loop (insn, REG_NOTES (insn), single_usage);
3613 if (GET_CODE (PATTERN (insn)) == SET
3614 || GET_CODE (PATTERN (insn)) == CLOBBER)
3615 count_one_set (insn, PATTERN (insn), may_not_move, last_set);
3616 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
3619 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
3620 count_one_set (insn, XVECEXP (PATTERN (insn), 0, i),
3621 may_not_move, last_set);
3625 if (GET_CODE (insn) == CODE_LABEL || GET_CODE (insn) == JUMP_INSN)
3626 bzero ((char *) last_set, nregs * sizeof (rtx));
3634 /* Given a loop that is bounded by LOOP_START and LOOP_END
3635 and that is entered at SCAN_START,
3636 return 1 if the register set in SET contained in insn INSN is used by
3637 any insn that precedes INSN in cyclic order starting
3638 from the loop entry point.
3640 We don't want to use INSN_LUID here because if we restrict INSN to those
3641 that have a valid INSN_LUID, it means we cannot move an invariant out
3642 from an inner loop past two loops. */
3645 loop_reg_used_before_p (set, insn, loop_start, scan_start, loop_end)
3646 rtx set, insn, loop_start, scan_start, loop_end;
3648 rtx reg = SET_DEST (set);
3651 /* Scan forward checking for register usage. If we hit INSN, we
3652 are done. Otherwise, if we hit LOOP_END, wrap around to LOOP_START. */
3653 for (p = scan_start; p != insn; p = NEXT_INSN (p))
3655 if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
3656 && reg_overlap_mentioned_p (reg, PATTERN (p)))
3666 /* A "basic induction variable" or biv is a pseudo reg that is set
3667 (within this loop) only by incrementing or decrementing it. */
3668 /* A "general induction variable" or giv is a pseudo reg whose
3669 value is a linear function of a biv. */
3671 /* Bivs are recognized by `basic_induction_var';
3672 Givs by `general_induction_var'. */
3674 /* Indexed by register number, indicates whether or not register is an
3675 induction variable, and if so what type. */
3677 varray_type reg_iv_type;
3679 /* Indexed by register number, contains pointer to `struct induction'
3680 if register is an induction variable. This holds general info for
3681 all induction variables. */
3683 varray_type reg_iv_info;
3685 /* Indexed by register number, contains pointer to `struct iv_class'
3686 if register is a basic induction variable. This holds info describing
3687 the class (a related group) of induction variables that the biv belongs
3690 struct iv_class **reg_biv_class;
3692 /* The head of a list which links together (via the next field)
3693 every iv class for the current loop. */
3695 struct iv_class *loop_iv_list;
3697 /* Givs made from biv increments are always splittable for loop unrolling.
3698 Since there is no regscan info for them, we have to keep track of them
3700 int first_increment_giv, last_increment_giv;
3702 /* Communication with routines called via `note_stores'. */
3704 static rtx note_insn;
3706 /* Dummy register to have non-zero DEST_REG for DEST_ADDR type givs. */
3708 static rtx addr_placeholder;
3710 /* ??? Unfinished optimizations, and possible future optimizations,
3711 for the strength reduction code. */
3713 /* ??? The interaction of biv elimination, and recognition of 'constant'
3714 bivs, may cause problems. */
3716 /* ??? Add heuristics so that DEST_ADDR strength reduction does not cause
3717 performance problems.
3719 Perhaps don't eliminate things that can be combined with an addressing
3720 mode. Find all givs that have the same biv, mult_val, and add_val;
3721 then for each giv, check to see if its only use dies in a following
3722 memory address. If so, generate a new memory address and check to see
3723 if it is valid. If it is valid, then store the modified memory address,
3724 otherwise, mark the giv as not done so that it will get its own iv. */
3726 /* ??? Could try to optimize branches when it is known that a biv is always
3729 /* ??? When replace a biv in a compare insn, we should replace with closest
3730 giv so that an optimized branch can still be recognized by the combiner,
3731 e.g. the VAX acb insn. */
3733 /* ??? Many of the checks involving uid_luid could be simplified if regscan
3734 was rerun in loop_optimize whenever a register was added or moved.
3735 Also, some of the optimizations could be a little less conservative. */
3737 /* Perform strength reduction and induction variable elimination.
3739 Pseudo registers created during this function will be beyond the last
3740 valid index in several tables including n_times_set and regno_last_uid.
3741 This does not cause a problem here, because the added registers cannot be
3742 givs outside of their loop, and hence will never be reconsidered.
3743 But scan_loop must check regnos to make sure they are in bounds.
3745 SCAN_START is the first instruction in the loop, as the loop would
3746 actually be executed. END is the NOTE_INSN_LOOP_END. LOOP_TOP is
3747 the first instruction in the loop, as it is layed out in the
3748 instruction stream. LOOP_START is the NOTE_INSN_LOOP_BEG.
3749 LOOP_CONT is the NOTE_INSN_LOOP_CONT. */
3752 strength_reduce (scan_start, end, loop_top, insn_count,
3753 loop_start, loop_end, loop_info, loop_cont, unroll_p, bct_p)
3760 struct loop_info *loop_info;
3762 int unroll_p, bct_p ATTRIBUTE_UNUSED;
3770 /* This is 1 if current insn is not executed at least once for every loop
3772 int not_every_iteration = 0;
3773 /* This is 1 if current insn may be executed more than once for every
3775 int maybe_multiple = 0;
3776 /* This is 1 if we have past a branch back to the top of the loop
3777 (aka a loop latch). */
3778 int past_loop_latch = 0;
3779 /* Temporary list pointers for traversing loop_iv_list. */
3780 struct iv_class *bl, **backbl;
3781 /* Ratio of extra register life span we can justify
3782 for saving an instruction. More if loop doesn't call subroutines
3783 since in that case saving an insn makes more difference
3784 and more registers are available. */
3785 /* ??? could set this to last value of threshold in move_movables */
3786 int threshold = (loop_info->has_call ? 1 : 2) * (3 + n_non_fixed_regs);
3787 /* Map of pseudo-register replacements. */
3788 rtx *reg_map = NULL;
3792 rtx end_insert_before;
3794 int n_extra_increment;
3795 int unrolled_insn_copies = 0;
3797 /* If scan_start points to the loop exit test, we have to be wary of
3798 subversive use of gotos inside expression statements. */
3799 if (prev_nonnote_insn (scan_start) != prev_nonnote_insn (loop_start))
3800 maybe_multiple = back_branch_in_range_p (scan_start, loop_start, loop_end);
3802 VARRAY_INT_INIT (reg_iv_type, max_reg_before_loop, "reg_iv_type");
3803 VARRAY_GENERIC_PTR_INIT (reg_iv_info, max_reg_before_loop, "reg_iv_info");
3804 reg_biv_class = (struct iv_class **)
3805 xcalloc (max_reg_before_loop, sizeof (struct iv_class *));
3808 addr_placeholder = gen_reg_rtx (Pmode);
3810 /* Save insn immediately after the loop_end. Insns inserted after loop_end
3811 must be put before this insn, so that they will appear in the right
3812 order (i.e. loop order).
3814 If loop_end is the end of the current function, then emit a
3815 NOTE_INSN_DELETED after loop_end and set end_insert_before to the
3817 if (NEXT_INSN (loop_end) != 0)
3818 end_insert_before = NEXT_INSN (loop_end);
3820 end_insert_before = emit_note_after (NOTE_INSN_DELETED, loop_end);
3822 /* Scan through loop to find all possible bivs. */
3824 for (p = next_insn_in_loop (scan_start, scan_start, end, loop_top);
3826 p = next_insn_in_loop (p, scan_start, end, loop_top))
3828 if (GET_CODE (p) == INSN
3829 && (set = single_set (p))
3830 && GET_CODE (SET_DEST (set)) == REG)
3832 dest_reg = SET_DEST (set);
3833 if (REGNO (dest_reg) < max_reg_before_loop
3834 && REGNO (dest_reg) >= FIRST_PSEUDO_REGISTER
3835 && REG_IV_TYPE (REGNO (dest_reg)) != NOT_BASIC_INDUCT)
3837 if (basic_induction_var (SET_SRC (set), GET_MODE (SET_SRC (set)),
3838 dest_reg, p, &inc_val, &mult_val,
3841 /* It is a possible basic induction variable.
3842 Create and initialize an induction structure for it. */
3845 = (struct induction *) alloca (sizeof (struct induction));
3847 record_biv (v, p, dest_reg, inc_val, mult_val, location,
3848 not_every_iteration, maybe_multiple);
3849 REG_IV_TYPE (REGNO (dest_reg)) = BASIC_INDUCT;
3851 else if (REGNO (dest_reg) < max_reg_before_loop)
3852 REG_IV_TYPE (REGNO (dest_reg)) = NOT_BASIC_INDUCT;
3856 /* Past CODE_LABEL, we get to insns that may be executed multiple
3857 times. The only way we can be sure that they can't is if every
3858 jump insn between here and the end of the loop either
3859 returns, exits the loop, is a jump to a location that is still
3860 behind the label, or is a jump to the loop start. */
3862 if (GET_CODE (p) == CODE_LABEL)
3870 insn = NEXT_INSN (insn);
3871 if (insn == scan_start)
3879 if (insn == scan_start)
3883 if (GET_CODE (insn) == JUMP_INSN
3884 && GET_CODE (PATTERN (insn)) != RETURN
3885 && (! condjump_p (insn)
3886 || (JUMP_LABEL (insn) != 0
3887 && JUMP_LABEL (insn) != scan_start
3888 && ! loop_insn_first_p (p, JUMP_LABEL (insn)))))
3896 /* Past a jump, we get to insns for which we can't count
3897 on whether they will be executed during each iteration. */
3898 /* This code appears twice in strength_reduce. There is also similar
3899 code in scan_loop. */
3900 if (GET_CODE (p) == JUMP_INSN
3901 /* If we enter the loop in the middle, and scan around to the
3902 beginning, don't set not_every_iteration for that.
3903 This can be any kind of jump, since we want to know if insns
3904 will be executed if the loop is executed. */
3905 && ! (JUMP_LABEL (p) == loop_top
3906 && ((NEXT_INSN (NEXT_INSN (p)) == loop_end && simplejump_p (p))
3907 || (NEXT_INSN (p) == loop_end && condjump_p (p)))))
3911 /* If this is a jump outside the loop, then it also doesn't
3912 matter. Check to see if the target of this branch is on the
3913 loop_number_exits_labels list. */
3915 for (label = loop_number_exit_labels[uid_loop_num[INSN_UID (loop_start)]];
3917 label = LABEL_NEXTREF (label))
3918 if (XEXP (label, 0) == JUMP_LABEL (p))
3922 not_every_iteration = 1;
3925 else if (GET_CODE (p) == NOTE)
3927 /* At the virtual top of a converted loop, insns are again known to
3928 be executed each iteration: logically, the loop begins here
3929 even though the exit code has been duplicated.
3931 Insns are also again known to be executed each iteration at
3932 the LOOP_CONT note. */
3933 if ((NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP
3934 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_CONT)
3936 not_every_iteration = 0;
3937 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
3939 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
3943 /* Note if we pass a loop latch. If we do, then we can not clear
3944 NOT_EVERY_ITERATION below when we pass the last CODE_LABEL in
3945 a loop since a jump before the last CODE_LABEL may have started
3946 a new loop iteration.
3948 Note that LOOP_TOP is only set for rotated loops and we need
3949 this check for all loops, so compare against the CODE_LABEL
3950 which immediately follows LOOP_START. */
3951 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p) == NEXT_INSN (loop_start))
3952 past_loop_latch = 1;
3954 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
3955 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
3956 or not an insn is known to be executed each iteration of the
3957 loop, whether or not any iterations are known to occur.
3959 Therefore, if we have just passed a label and have no more labels
3960 between here and the test insn of the loop, and we have not passed
3961 a jump to the top of the loop, then we know these insns will be
3962 executed each iteration. */
3964 if (not_every_iteration
3965 && ! past_loop_latch
3966 && GET_CODE (p) == CODE_LABEL
3967 && no_labels_between_p (p, loop_end)
3968 && loop_insn_first_p (p, loop_cont))
3969 not_every_iteration = 0;
3972 /* Scan loop_iv_list to remove all regs that proved not to be bivs.
3973 Make a sanity check against n_times_set. */
3974 for (backbl = &loop_iv_list, bl = *backbl; bl; bl = bl->next)
3976 if (REG_IV_TYPE (bl->regno) != BASIC_INDUCT
3977 /* Above happens if register modified by subreg, etc. */
3978 /* Make sure it is not recognized as a basic induction var: */
3979 || VARRAY_INT (n_times_set, bl->regno) != bl->biv_count
3980 /* If never incremented, it is invariant that we decided not to
3981 move. So leave it alone. */
3982 || ! bl->incremented)
3984 if (loop_dump_stream)
3985 fprintf (loop_dump_stream, "Reg %d: biv discarded, %s\n",
3987 (REG_IV_TYPE (bl->regno) != BASIC_INDUCT
3988 ? "not induction variable"
3989 : (! bl->incremented ? "never incremented"
3992 REG_IV_TYPE (bl->regno) = NOT_BASIC_INDUCT;
3999 if (loop_dump_stream)
4000 fprintf (loop_dump_stream, "Reg %d: biv verified\n", bl->regno);
4004 /* Exit if there are no bivs. */
4007 /* Can still unroll the loop anyways, but indicate that there is no
4008 strength reduction info available. */
4010 unroll_loop (loop_end, insn_count, loop_start, end_insert_before,
4016 /* Find initial value for each biv by searching backwards from loop_start,
4017 halting at first label. Also record any test condition. */
4020 for (p = loop_start; p && GET_CODE (p) != CODE_LABEL; p = PREV_INSN (p))
4024 if (GET_CODE (p) == CALL_INSN)
4027 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
4028 || GET_CODE (p) == CALL_INSN)
4029 note_stores (PATTERN (p), record_initial, NULL);
4031 /* Record any test of a biv that branches around the loop if no store
4032 between it and the start of loop. We only care about tests with
4033 constants and registers and only certain of those. */
4034 if (GET_CODE (p) == JUMP_INSN
4035 && JUMP_LABEL (p) != 0
4036 && next_real_insn (JUMP_LABEL (p)) == next_real_insn (loop_end)
4037 && (test = get_condition_for_loop (p)) != 0
4038 && GET_CODE (XEXP (test, 0)) == REG
4039 && REGNO (XEXP (test, 0)) < max_reg_before_loop
4040 && (bl = reg_biv_class[REGNO (XEXP (test, 0))]) != 0
4041 && valid_initial_value_p (XEXP (test, 1), p, call_seen, loop_start)
4042 && bl->init_insn == 0)
4044 /* If an NE test, we have an initial value! */
4045 if (GET_CODE (test) == NE)
4048 bl->init_set = gen_rtx_SET (VOIDmode,
4049 XEXP (test, 0), XEXP (test, 1));
4052 bl->initial_test = test;
4056 /* Look at the each biv and see if we can say anything better about its
4057 initial value from any initializing insns set up above. (This is done
4058 in two passes to avoid missing SETs in a PARALLEL.) */
4059 for (backbl = &loop_iv_list; (bl = *backbl); backbl = &bl->next)
4064 if (! bl->init_insn)
4067 /* IF INIT_INSN has a REG_EQUAL or REG_EQUIV note and the value
4068 is a constant, use the value of that. */
4069 if (((note = find_reg_note (bl->init_insn, REG_EQUAL, 0)) != NULL
4070 && CONSTANT_P (XEXP (note, 0)))
4071 || ((note = find_reg_note (bl->init_insn, REG_EQUIV, 0)) != NULL
4072 && CONSTANT_P (XEXP (note, 0))))
4073 src = XEXP (note, 0);
4075 src = SET_SRC (bl->init_set);
4077 if (loop_dump_stream)
4078 fprintf (loop_dump_stream,
4079 "Biv %d initialized at insn %d: initial value ",
4080 bl->regno, INSN_UID (bl->init_insn));
4082 if ((GET_MODE (src) == GET_MODE (regno_reg_rtx[bl->regno])
4083 || GET_MODE (src) == VOIDmode)
4084 && valid_initial_value_p (src, bl->init_insn, call_seen, loop_start))
4086 bl->initial_value = src;
4088 if (loop_dump_stream)
4090 if (GET_CODE (src) == CONST_INT)
4092 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, INTVAL (src));
4093 fputc ('\n', loop_dump_stream);
4097 print_rtl (loop_dump_stream, src);
4098 fprintf (loop_dump_stream, "\n");
4104 struct iv_class *bl2 = 0;
4105 rtx increment = NULL_RTX;
4107 /* Biv initial value is not a simple move. If it is the sum of
4108 another biv and a constant, check if both bivs are incremented
4109 in lockstep. Then we are actually looking at a giv.
4110 For simplicity, we only handle the case where there is but a
4111 single increment, and the register is not used elsewhere. */
4112 if (bl->biv_count == 1
4113 && bl->regno < max_reg_before_loop
4114 && uid_luid[REGNO_LAST_UID (bl->regno)] < INSN_LUID (loop_end)
4115 && GET_CODE (src) == PLUS
4116 && GET_CODE (XEXP (src, 0)) == REG
4117 && CONSTANT_P (XEXP (src, 1))
4118 && ((increment = biv_total_increment (bl, loop_start, loop_end))
4121 int regno = REGNO (XEXP (src, 0));
4123 for (bl2 = loop_iv_list; bl2; bl2 = bl2->next)
4124 if (bl2->regno == regno)
4128 /* Now, can we transform this biv into a giv? */
4130 && bl2->biv_count == 1
4131 && rtx_equal_p (increment,
4132 biv_total_increment (bl2, loop_start, loop_end))
4133 /* init_insn is only set to insns that are before loop_start
4134 without any intervening labels. */
4135 && ! reg_set_between_p (bl2->biv->src_reg,
4136 PREV_INSN (bl->init_insn), loop_start)
4137 /* The register from BL2 must be set before the register from
4138 BL is set, or we must be able to move the latter set after
4139 the former set. Currently there can't be any labels
4140 in-between when biv_total_increment returns nonzero both times
4141 but we test it here in case some day some real cfg analysis
4142 gets used to set always_computable. */
4143 && (loop_insn_first_p (bl2->biv->insn, bl->biv->insn)
4144 ? no_labels_between_p (bl2->biv->insn, bl->biv->insn)
4145 : (! reg_used_between_p (bl->biv->src_reg, bl->biv->insn,
4147 && no_jumps_between_p (bl->biv->insn, bl2->biv->insn)))
4148 && validate_change (bl->biv->insn,
4149 &SET_SRC (single_set (bl->biv->insn)),
4152 int loop_num = uid_loop_num[INSN_UID (loop_start)];
4153 rtx dominator = loop_number_cont_dominator[loop_num];
4154 rtx giv = bl->biv->src_reg;
4155 rtx giv_insn = bl->biv->insn;
4156 rtx after_giv = NEXT_INSN (giv_insn);
4158 if (loop_dump_stream)
4159 fprintf (loop_dump_stream, "is giv of biv %d\n", bl2->regno);
4160 /* Let this giv be discovered by the generic code. */
4161 REG_IV_TYPE (bl->regno) = UNKNOWN_INDUCT;
4162 reg_biv_class[bl->regno] = NULL_PTR;
4163 /* We can get better optimization if we can move the giv setting
4164 before the first giv use. */
4166 && ! loop_insn_first_p (dominator, scan_start)
4167 && ! reg_set_between_p (bl2->biv->src_reg, loop_start,
4169 && ! reg_used_between_p (giv, loop_start, dominator)
4170 && ! reg_used_between_p (giv, giv_insn, loop_end))
4175 for (next = NEXT_INSN (dominator); ; next = NEXT_INSN (next))
4177 if ((GET_RTX_CLASS (GET_CODE (next)) == 'i'
4178 && (reg_mentioned_p (giv, PATTERN (next))
4179 || reg_set_p (bl2->biv->src_reg, next)))
4180 || GET_CODE (next) == JUMP_INSN)
4183 if (GET_RTX_CLASS (GET_CODE (next)) != 'i'
4184 || ! sets_cc0_p (PATTERN (next)))
4188 if (loop_dump_stream)
4189 fprintf (loop_dump_stream, "move after insn %d\n",
4190 INSN_UID (dominator));
4191 /* Avoid problems with luids by actually moving the insn
4192 and adjusting all luids in the range. */
4193 reorder_insns (giv_insn, giv_insn, dominator);
4194 for (p = dominator; INSN_UID (p) >= max_uid_for_loop; )
4196 compute_luids (giv_insn, after_giv, INSN_LUID (p));
4197 /* If the only purpose of the init insn is to initialize
4198 this giv, delete it. */
4199 if (single_set (bl->init_insn)
4200 && ! reg_used_between_p (giv, bl->init_insn, loop_start))
4201 delete_insn (bl->init_insn);
4203 else if (! loop_insn_first_p (bl2->biv->insn, bl->biv->insn))
4205 rtx p = PREV_INSN (giv_insn);
4206 while (INSN_UID (p) >= max_uid_for_loop)
4208 reorder_insns (giv_insn, giv_insn, bl2->biv->insn);
4209 compute_luids (after_giv, NEXT_INSN (giv_insn),
4212 /* Remove this biv from the chain. */
4215 /* We move the following giv from *bl->next into *bl.
4216 We have to update reg_biv_class for that moved biv
4217 to point to its new address. */
4219 reg_biv_class[bl->regno] = bl;
4228 /* If we can't make it a giv,
4229 let biv keep initial value of "itself". */
4230 else if (loop_dump_stream)
4231 fprintf (loop_dump_stream, "is complex\n");
4235 /* If a biv is unconditionally incremented several times in a row, convert
4236 all but the last increment into a giv. */
4238 /* Get an upper bound for the number of registers
4239 we might have after all bivs have been processed. */
4240 first_increment_giv = max_reg_num ();
4241 for (n_extra_increment = 0, bl = loop_iv_list; bl; bl = bl->next)
4242 n_extra_increment += bl->biv_count - 1;
4244 /* If the loop contains volatile memory references do not allow any
4245 replacements to take place, since this could loose the volatile markers. */
4246 if (n_extra_increment && ! loop_info->has_volatile)
4248 int nregs = first_increment_giv + n_extra_increment;
4250 /* Reallocate reg_iv_type and reg_iv_info. */
4251 VARRAY_GROW (reg_iv_type, nregs);
4252 VARRAY_GROW (reg_iv_info, nregs);
4254 for (bl = loop_iv_list; bl; bl = bl->next)
4256 struct induction **vp, *v, *next;
4257 int biv_dead_after_loop = 0;
4259 /* The biv increments lists are in reverse order. Fix this first. */
4260 for (v = bl->biv, bl->biv = 0; v; v = next)
4263 v->next_iv = bl->biv;
4267 /* We must guard against the case that an early exit between v->insn
4268 and next->insn leaves the biv live after the loop, since that
4269 would mean that we'd be missing an increment for the final
4270 value. The following test to set biv_dead_after_loop is like
4271 the first part of the test to set bl->eliminable.
4272 We don't check here if we can calculate the final value, since
4273 this can't succeed if we already know that there is a jump
4274 between v->insn and next->insn, yet next->always_executed is
4275 set and next->maybe_multiple is cleared. Such a combination
4276 implies that the jump destination is outside the loop.
4277 If we want to make this check more sophisticated, we should
4278 check each branch between v->insn and next->insn individually
4279 to see if the biv is dead at its destination. */
4281 if (uid_luid[REGNO_LAST_UID (bl->regno)] < INSN_LUID (loop_end)
4283 && INSN_UID (bl->init_insn) < max_uid_for_loop
4284 && (uid_luid[REGNO_FIRST_UID (bl->regno)]
4285 >= INSN_LUID (bl->init_insn))
4286 #ifdef HAVE_decrement_and_branch_until_zero
4289 && ! reg_mentioned_p (bl->biv->dest_reg, SET_SRC (bl->init_set)))
4290 biv_dead_after_loop = 1;
4292 for (vp = &bl->biv, next = *vp; v = next, next = v->next_iv;)
4294 HOST_WIDE_INT offset;
4295 rtx set, add_val, old_reg, dest_reg, last_use_insn, note;
4296 int old_regno, new_regno;
4298 if (! v->always_executed
4299 || v->maybe_multiple
4300 || GET_CODE (v->add_val) != CONST_INT
4301 || ! next->always_executed
4302 || next->maybe_multiple
4303 || ! CONSTANT_P (next->add_val)
4304 || v->mult_val != const1_rtx
4305 || next->mult_val != const1_rtx
4306 || ! (biv_dead_after_loop
4307 || no_jumps_between_p (v->insn, next->insn)))
4312 offset = INTVAL (v->add_val);
4313 set = single_set (v->insn);
4314 add_val = plus_constant (next->add_val, offset);
4315 old_reg = v->dest_reg;
4316 dest_reg = gen_reg_rtx (v->mode);
4318 /* Unlike reg_iv_type / reg_iv_info, the other three arrays
4319 have been allocated with some slop space, so we may not
4320 actually need to reallocate them. If we do, the following
4321 if statement will be executed just once in this loop. */
4322 if ((unsigned) max_reg_num () > n_times_set->num_elements)
4324 /* Grow all the remaining arrays. */
4325 VARRAY_GROW (set_in_loop, nregs);
4326 VARRAY_GROW (n_times_set, nregs);
4327 VARRAY_GROW (may_not_optimize, nregs);
4328 VARRAY_GROW (reg_single_usage, nregs);
4331 if (! validate_change (next->insn, next->location, add_val, 0))
4337 /* Here we can try to eliminate the increment by combining
4338 it into the uses. */
4340 /* Set last_use_insn so that we can check against it. */
4342 for (last_use_insn = v->insn, p = NEXT_INSN (v->insn);
4344 p = next_insn_in_loop (p, scan_start, end, loop_top))
4346 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
4348 if (reg_mentioned_p (old_reg, PATTERN (p)))
4354 /* If we can't get the LUIDs for the insns, we can't
4355 calculate the lifetime. This is likely from unrolling
4356 of an inner loop, so there is little point in making this
4357 a DEST_REG giv anyways. */
4358 if (INSN_UID (v->insn) >= max_uid_for_loop
4359 || INSN_UID (last_use_insn) >= max_uid_for_loop
4360 || ! validate_change (v->insn, &SET_DEST (set), dest_reg, 0))
4362 /* Change the increment at NEXT back to what it was. */
4363 if (! validate_change (next->insn, next->location,
4369 next->add_val = add_val;
4370 v->dest_reg = dest_reg;
4371 v->giv_type = DEST_REG;
4372 v->location = &SET_SRC (set);
4374 v->combined_with = 0;
4376 v->derive_adjustment = 0;
4382 v->auto_inc_opt = 0;
4385 v->derived_from = 0;
4386 v->always_computable = 1;
4387 v->always_executed = 1;
4389 v->no_const_addval = 0;
4391 old_regno = REGNO (old_reg);
4392 new_regno = REGNO (dest_reg);
4393 VARRAY_INT (set_in_loop, old_regno)--;
4394 VARRAY_INT (set_in_loop, new_regno) = 1;
4395 VARRAY_INT (n_times_set, old_regno)--;
4396 VARRAY_INT (n_times_set, new_regno) = 1;
4397 VARRAY_CHAR (may_not_optimize, new_regno) = 0;
4399 REG_IV_TYPE (new_regno) = GENERAL_INDUCT;
4400 REG_IV_INFO (new_regno) = v;
4402 /* If next_insn has a REG_EQUAL note that mentiones OLD_REG,
4403 it must be replaced. */
4404 note = find_reg_note (next->insn, REG_EQUAL, NULL_RTX);
4405 if (note && reg_mentioned_p (old_reg, XEXP (note, 0)))
4406 XEXP (note, 0) = copy_rtx (SET_SRC (single_set (next->insn)));
4408 /* Remove the increment from the list of biv increments,
4409 and record it as a giv. */
4412 v->next_iv = bl->giv;
4415 v->benefit = rtx_cost (SET_SRC (set), SET);
4416 bl->total_benefit += v->benefit;
4418 /* Now replace the biv with DEST_REG in all insns between
4419 the replaced increment and the next increment, and
4420 remember the last insn that needed a replacement. */
4421 for (last_use_insn = v->insn, p = NEXT_INSN (v->insn);
4423 p = next_insn_in_loop (p, scan_start, end, loop_top))
4427 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
4429 if (reg_mentioned_p (old_reg, PATTERN (p)))
4432 if (! validate_replace_rtx (old_reg, dest_reg, p))
4435 for (note = REG_NOTES (p); note; note = XEXP (note, 1))
4437 if (GET_CODE (note) == EXPR_LIST)
4439 = replace_rtx (XEXP (note, 0), old_reg, dest_reg);
4443 v->last_use = last_use_insn;
4444 v->lifetime = INSN_LUID (v->insn) - INSN_LUID (last_use_insn);
4445 /* If the lifetime is zero, it means that this register is really
4446 a dead store. So mark this as a giv that can be ignored.
4447 This will not prevent the biv from being eliminated. */
4448 if (v->lifetime == 0)
4451 if (loop_dump_stream)
4452 fprintf (loop_dump_stream,
4453 "Increment %d of biv %d converted to giv %d.\n\n",
4454 INSN_UID (v->insn), old_regno, new_regno);
4458 last_increment_giv = max_reg_num () - 1;
4460 /* Search the loop for general induction variables. */
4462 /* A register is a giv if: it is only set once, it is a function of a
4463 biv and a constant (or invariant), and it is not a biv. */
4465 not_every_iteration = 0;
4472 /* At end of a straight-in loop, we are done.
4473 At end of a loop entered at the bottom, scan the top. */
4474 if (p == scan_start)
4482 if (p == scan_start)
4486 /* Look for a general induction variable in a register. */
4487 if (GET_CODE (p) == INSN
4488 && (set = single_set (p))
4489 && GET_CODE (SET_DEST (set)) == REG
4490 && ! VARRAY_CHAR (may_not_optimize, REGNO (SET_DEST (set))))
4497 rtx last_consec_insn;
4499 dest_reg = SET_DEST (set);
4500 if (REGNO (dest_reg) < FIRST_PSEUDO_REGISTER)
4503 if (/* SET_SRC is a giv. */
4504 (general_induction_var (SET_SRC (set), &src_reg, &add_val,
4505 &mult_val, 0, &benefit)
4506 /* Equivalent expression is a giv. */
4507 || ((regnote = find_reg_note (p, REG_EQUAL, NULL_RTX))
4508 && general_induction_var (XEXP (regnote, 0), &src_reg,
4509 &add_val, &mult_val, 0,
4511 /* Don't try to handle any regs made by loop optimization.
4512 We have nothing on them in regno_first_uid, etc. */
4513 && REGNO (dest_reg) < max_reg_before_loop
4514 /* Don't recognize a BASIC_INDUCT_VAR here. */
4515 && dest_reg != src_reg
4516 /* This must be the only place where the register is set. */
4517 && (VARRAY_INT (n_times_set, REGNO (dest_reg)) == 1
4518 /* or all sets must be consecutive and make a giv. */
4519 || (benefit = consec_sets_giv (benefit, p,
4521 &add_val, &mult_val,
4522 &last_consec_insn))))
4525 = (struct induction *) alloca (sizeof (struct induction));
4527 /* If this is a library call, increase benefit. */
4528 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
4529 benefit += libcall_benefit (p);
4531 /* Skip the consecutive insns, if there are any. */
4532 if (VARRAY_INT (n_times_set, REGNO (dest_reg)) != 1)
4533 p = last_consec_insn;
4535 record_giv (v, p, src_reg, dest_reg, mult_val, add_val, benefit,
4536 DEST_REG, not_every_iteration, maybe_multiple,
4537 NULL_PTR, loop_start, loop_end);
4542 #ifndef DONT_REDUCE_ADDR
4543 /* Look for givs which are memory addresses. */
4544 /* This resulted in worse code on a VAX 8600. I wonder if it
4546 if (GET_CODE (p) == INSN)
4547 find_mem_givs (PATTERN (p), p, not_every_iteration, maybe_multiple,
4548 loop_start, loop_end);
4551 /* Update the status of whether giv can derive other givs. This can
4552 change when we pass a label or an insn that updates a biv. */
4553 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
4554 || GET_CODE (p) == CODE_LABEL)
4555 update_giv_derive (p);
4557 /* Past CODE_LABEL, we get to insns that may be executed multiple
4558 times. The only way we can be sure that they can't is if every
4559 every jump insn between here and the end of the loop either
4560 returns, exits the loop, is a forward jump, or is a jump
4561 to the loop start. */
4563 if (GET_CODE (p) == CODE_LABEL)
4571 insn = NEXT_INSN (insn);
4572 if (insn == scan_start)
4580 if (insn == scan_start)
4584 if (GET_CODE (insn) == JUMP_INSN
4585 && GET_CODE (PATTERN (insn)) != RETURN
4586 && (! condjump_p (insn)
4587 || (JUMP_LABEL (insn) != 0
4588 && JUMP_LABEL (insn) != scan_start
4589 && (INSN_UID (JUMP_LABEL (insn)) >= max_uid_for_loop
4590 || INSN_UID (insn) >= max_uid_for_loop
4591 || (INSN_LUID (JUMP_LABEL (insn))
4592 < INSN_LUID (insn))))))
4600 /* Past a jump, we get to insns for which we can't count
4601 on whether they will be executed during each iteration. */
4602 /* This code appears twice in strength_reduce. There is also similar
4603 code in scan_loop. */
4604 if (GET_CODE (p) == JUMP_INSN
4605 /* If we enter the loop in the middle, and scan around to the
4606 beginning, don't set not_every_iteration for that.
4607 This can be any kind of jump, since we want to know if insns
4608 will be executed if the loop is executed. */
4609 && ! (JUMP_LABEL (p) == loop_top
4610 && ((NEXT_INSN (NEXT_INSN (p)) == loop_end && simplejump_p (p))
4611 || (NEXT_INSN (p) == loop_end && condjump_p (p)))))
4615 /* If this is a jump outside the loop, then it also doesn't
4616 matter. Check to see if the target of this branch is on the
4617 loop_number_exits_labels list. */
4619 for (label = loop_number_exit_labels[uid_loop_num[INSN_UID (loop_start)]];
4621 label = LABEL_NEXTREF (label))
4622 if (XEXP (label, 0) == JUMP_LABEL (p))
4626 not_every_iteration = 1;
4629 else if (GET_CODE (p) == NOTE)
4631 /* At the virtual top of a converted loop, insns are again known to
4632 be executed each iteration: logically, the loop begins here
4633 even though the exit code has been duplicated.
4635 Insns are also again known to be executed each iteration at
4636 the LOOP_CONT note. */
4637 if ((NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP
4638 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_CONT)
4640 not_every_iteration = 0;
4641 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
4643 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
4647 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
4648 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
4649 or not an insn is known to be executed each iteration of the
4650 loop, whether or not any iterations are known to occur.
4652 Therefore, if we have just passed a label and have no more labels
4653 between here and the test insn of the loop, we know these insns
4654 will be executed each iteration. */
4656 if (not_every_iteration && GET_CODE (p) == CODE_LABEL
4657 && no_labels_between_p (p, loop_end)
4658 && loop_insn_first_p (p, loop_cont))
4659 not_every_iteration = 0;
4662 /* Try to calculate and save the number of loop iterations. This is
4663 set to zero if the actual number can not be calculated. This must
4664 be called after all giv's have been identified, since otherwise it may
4665 fail if the iteration variable is a giv. */
4667 loop_iterations (loop_start, loop_end, loop_info);
4669 /* Now for each giv for which we still don't know whether or not it is
4670 replaceable, check to see if it is replaceable because its final value
4671 can be calculated. This must be done after loop_iterations is called,
4672 so that final_giv_value will work correctly. */
4674 for (bl = loop_iv_list; bl; bl = bl->next)
4676 struct induction *v;
4678 for (v = bl->giv; v; v = v->next_iv)
4679 if (! v->replaceable && ! v->not_replaceable)
4680 check_final_value (v, loop_start, loop_end, loop_info->n_iterations);
4683 /* Try to prove that the loop counter variable (if any) is always
4684 nonnegative; if so, record that fact with a REG_NONNEG note
4685 so that "decrement and branch until zero" insn can be used. */
4686 check_dbra_loop (loop_end, insn_count, loop_start, loop_info);
4688 /* Create reg_map to hold substitutions for replaceable giv regs.
4689 Some givs might have been made from biv increments, so look at
4690 reg_iv_type for a suitable size. */
4691 reg_map_size = reg_iv_type->num_elements;
4692 reg_map = (rtx *) xcalloc (reg_map_size, sizeof (rtx));
4694 /* Examine each iv class for feasibility of strength reduction/induction
4695 variable elimination. */
4697 for (bl = loop_iv_list; bl; bl = bl->next)
4699 struct induction *v;
4702 rtx final_value = 0;
4705 /* Test whether it will be possible to eliminate this biv
4706 provided all givs are reduced. This is possible if either
4707 the reg is not used outside the loop, or we can compute
4708 what its final value will be.
4710 For architectures with a decrement_and_branch_until_zero insn,
4711 don't do this if we put a REG_NONNEG note on the endtest for
4714 /* Compare against bl->init_insn rather than loop_start.
4715 We aren't concerned with any uses of the biv between
4716 init_insn and loop_start since these won't be affected
4717 by the value of the biv elsewhere in the function, so
4718 long as init_insn doesn't use the biv itself.
4719 March 14, 1989 -- self@bayes.arc.nasa.gov */
4721 if ((uid_luid[REGNO_LAST_UID (bl->regno)] < INSN_LUID (loop_end)
4723 && INSN_UID (bl->init_insn) < max_uid_for_loop
4724 && uid_luid[REGNO_FIRST_UID (bl->regno)] >= INSN_LUID (bl->init_insn)
4725 #ifdef HAVE_decrement_and_branch_until_zero
4728 && ! reg_mentioned_p (bl->biv->dest_reg, SET_SRC (bl->init_set)))
4729 || ((final_value = final_biv_value (bl, loop_start, loop_end,
4730 loop_info->n_iterations))
4731 #ifdef HAVE_decrement_and_branch_until_zero
4735 bl->eliminable = maybe_eliminate_biv (bl, loop_start, end, 0,
4736 threshold, insn_count);
4739 if (loop_dump_stream)
4741 fprintf (loop_dump_stream,
4742 "Cannot eliminate biv %d.\n",
4744 fprintf (loop_dump_stream,
4745 "First use: insn %d, last use: insn %d.\n",
4746 REGNO_FIRST_UID (bl->regno),
4747 REGNO_LAST_UID (bl->regno));
4751 /* Combine all giv's for this iv_class. */
4754 /* This will be true at the end, if all givs which depend on this
4755 biv have been strength reduced.
4756 We can't (currently) eliminate the biv unless this is so. */
4759 /* Check each giv in this class to see if we will benefit by reducing
4760 it. Skip giv's combined with others. */
4761 for (v = bl->giv; v; v = v->next_iv)
4763 struct induction *tv;
4765 if (v->ignore || v->same)
4768 benefit = v->benefit;
4770 /* Reduce benefit if not replaceable, since we will insert
4771 a move-insn to replace the insn that calculates this giv.
4772 Don't do this unless the giv is a user variable, since it
4773 will often be marked non-replaceable because of the duplication
4774 of the exit code outside the loop. In such a case, the copies
4775 we insert are dead and will be deleted. So they don't have
4776 a cost. Similar situations exist. */
4777 /* ??? The new final_[bg]iv_value code does a much better job
4778 of finding replaceable giv's, and hence this code may no longer
4780 if (! v->replaceable && ! bl->eliminable
4781 && REG_USERVAR_P (v->dest_reg))
4782 benefit -= copy_cost;
4784 /* Decrease the benefit to count the add-insns that we will
4785 insert to increment the reduced reg for the giv. */
4786 benefit -= add_cost * bl->biv_count;
4788 /* Decide whether to strength-reduce this giv or to leave the code
4789 unchanged (recompute it from the biv each time it is used).
4790 This decision can be made independently for each giv. */
4793 /* Attempt to guess whether autoincrement will handle some of the
4794 new add insns; if so, increase BENEFIT (undo the subtraction of
4795 add_cost that was done above). */
4796 if (v->giv_type == DEST_ADDR
4797 && GET_CODE (v->mult_val) == CONST_INT)
4799 if (HAVE_POST_INCREMENT
4800 && INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
4801 benefit += add_cost * bl->biv_count;
4802 else if (HAVE_PRE_INCREMENT
4803 && INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
4804 benefit += add_cost * bl->biv_count;
4805 else if (HAVE_POST_DECREMENT
4806 && -INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
4807 benefit += add_cost * bl->biv_count;
4808 else if (HAVE_PRE_DECREMENT
4809 && -INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
4810 benefit += add_cost * bl->biv_count;
4814 /* If an insn is not to be strength reduced, then set its ignore
4815 flag, and clear all_reduced. */
4817 /* A giv that depends on a reversed biv must be reduced if it is
4818 used after the loop exit, otherwise, it would have the wrong
4819 value after the loop exit. To make it simple, just reduce all
4820 of such giv's whether or not we know they are used after the loop
4823 if ( ! flag_reduce_all_givs && v->lifetime * threshold * benefit < insn_count
4826 if (loop_dump_stream)
4827 fprintf (loop_dump_stream,
4828 "giv of insn %d not worth while, %d vs %d.\n",
4830 v->lifetime * threshold * benefit, insn_count);
4836 /* Check that we can increment the reduced giv without a
4837 multiply insn. If not, reject it. */
4839 for (tv = bl->biv; tv; tv = tv->next_iv)
4840 if (tv->mult_val == const1_rtx
4841 && ! product_cheap_p (tv->add_val, v->mult_val))
4843 if (loop_dump_stream)
4844 fprintf (loop_dump_stream,
4845 "giv of insn %d: would need a multiply.\n",
4846 INSN_UID (v->insn));
4854 /* Check for givs whose first use is their definition and whose
4855 last use is the definition of another giv. If so, it is likely
4856 dead and should not be used to derive another giv nor to
4858 for (v = bl->giv; v; v = v->next_iv)
4861 || (v->same && v->same->ignore))
4866 struct induction *v1;
4868 for (v1 = bl->giv; v1; v1 = v1->next_iv)
4869 if (v->last_use == v1->insn)
4872 else if (v->giv_type == DEST_REG
4873 && REGNO_FIRST_UID (REGNO (v->dest_reg)) == INSN_UID (v->insn))
4875 struct induction *v1;
4877 for (v1 = bl->giv; v1; v1 = v1->next_iv)
4878 if (REGNO_LAST_UID (REGNO (v->dest_reg)) == INSN_UID (v1->insn))
4883 /* Now that we know which givs will be reduced, try to rearrange the
4884 combinations to reduce register pressure.
4885 recombine_givs calls find_life_end, which needs reg_iv_type and
4886 reg_iv_info to be valid for all pseudos. We do the necessary
4887 reallocation here since it allows to check if there are still
4888 more bivs to process. */
4889 nregs = max_reg_num ();
4890 if (nregs > reg_iv_type->num_elements)
4892 /* If there are still more bivs to process, allocate some slack
4893 space so that we're not constantly reallocating these arrays. */
4896 /* Reallocate reg_iv_type and reg_iv_info. */
4897 VARRAY_GROW (reg_iv_type, nregs);
4898 VARRAY_GROW (reg_iv_info, nregs);
4900 recombine_givs (bl, loop_start, loop_end, unroll_p);
4902 /* Reduce each giv that we decided to reduce. */
4904 for (v = bl->giv; v; v = v->next_iv)
4906 struct induction *tv;
4907 if (! v->ignore && v->same == 0)
4909 int auto_inc_opt = 0;
4911 /* If the code for derived givs immediately below has already
4912 allocated a new_reg, we must keep it. */
4914 v->new_reg = gen_reg_rtx (v->mode);
4916 if (v->derived_from)
4918 struct induction *d = v->derived_from;
4920 /* In case d->dest_reg is not replaceable, we have
4921 to replace it in v->insn now. */
4923 d->new_reg = gen_reg_rtx (d->mode);
4925 = replace_rtx (PATTERN (v->insn), d->dest_reg, d->new_reg);
4927 = replace_rtx (PATTERN (v->insn), v->dest_reg, v->new_reg);
4928 /* For each place where the biv is incremented, add an
4929 insn to set the new, reduced reg for the giv.
4930 We used to do this only for biv_count != 1, but
4931 this fails when there is a giv after a single biv
4932 increment, e.g. when the last giv was expressed as
4934 for (tv = bl->biv; tv; tv = tv->next_iv)
4936 /* We always emit reduced giv increments before the
4937 biv increment when bl->biv_count != 1. So by
4938 emitting the add insns for derived givs after the
4939 biv increment, they pick up the updated value of
4941 If the reduced giv is processed with
4942 auto_inc_opt == 1, then it is incremented earlier
4943 than the biv, hence we'll still pick up the right
4945 If it's processed with auto_inc_opt == -1,
4946 that implies that the biv increment is before the
4947 first reduced giv's use. The derived giv's lifetime
4948 is after the reduced giv's lifetime, hence in this
4949 case, the biv increment doesn't matter. */
4950 emit_insn_after (copy_rtx (PATTERN (v->insn)), tv->insn);
4956 /* If the target has auto-increment addressing modes, and
4957 this is an address giv, then try to put the increment
4958 immediately after its use, so that flow can create an
4959 auto-increment addressing mode. */
4960 if (v->giv_type == DEST_ADDR && bl->biv_count == 1
4961 && bl->biv->always_executed && ! bl->biv->maybe_multiple
4962 /* We don't handle reversed biv's because bl->biv->insn
4963 does not have a valid INSN_LUID. */
4965 && v->always_executed && ! v->maybe_multiple
4966 && INSN_UID (v->insn) < max_uid_for_loop)
4968 /* If other giv's have been combined with this one, then
4969 this will work only if all uses of the other giv's occur
4970 before this giv's insn. This is difficult to check.
4972 We simplify this by looking for the common case where
4973 there is one DEST_REG giv, and this giv's insn is the
4974 last use of the dest_reg of that DEST_REG giv. If the
4975 increment occurs after the address giv, then we can
4976 perform the optimization. (Otherwise, the increment
4977 would have to go before other_giv, and we would not be
4978 able to combine it with the address giv to get an
4979 auto-inc address.) */
4980 if (v->combined_with)
4982 struct induction *other_giv = 0;
4984 for (tv = bl->giv; tv; tv = tv->next_iv)
4992 if (! tv && other_giv
4993 && REGNO (other_giv->dest_reg) < max_reg_before_loop
4994 && (REGNO_LAST_UID (REGNO (other_giv->dest_reg))
4995 == INSN_UID (v->insn))
4996 && INSN_LUID (v->insn) < INSN_LUID (bl->biv->insn))
4999 /* Check for case where increment is before the address
5000 giv. Do this test in "loop order". */
5001 else if ((INSN_LUID (v->insn) > INSN_LUID (bl->biv->insn)
5002 && (INSN_LUID (v->insn) < INSN_LUID (scan_start)
5003 || (INSN_LUID (bl->biv->insn)
5004 > INSN_LUID (scan_start))))
5005 || (INSN_LUID (v->insn) < INSN_LUID (scan_start)
5006 && (INSN_LUID (scan_start)
5007 < INSN_LUID (bl->biv->insn))))
5016 /* We can't put an insn immediately after one setting
5017 cc0, or immediately before one using cc0. */
5018 if ((auto_inc_opt == 1 && sets_cc0_p (PATTERN (v->insn)))
5019 || (auto_inc_opt == -1
5020 && (prev = prev_nonnote_insn (v->insn)) != 0
5021 && GET_RTX_CLASS (GET_CODE (prev)) == 'i'
5022 && sets_cc0_p (PATTERN (prev))))
5028 v->auto_inc_opt = 1;
5032 /* For each place where the biv is incremented, add an insn
5033 to increment the new, reduced reg for the giv. */
5034 for (tv = bl->biv; tv; tv = tv->next_iv)
5039 insert_before = tv->insn;
5040 else if (auto_inc_opt == 1)
5041 insert_before = NEXT_INSN (v->insn);
5043 insert_before = v->insn;
5045 if (tv->mult_val == const1_rtx)
5046 emit_iv_add_mult (tv->add_val, v->mult_val,
5047 v->new_reg, v->new_reg, insert_before);
5048 else /* tv->mult_val == const0_rtx */
5049 /* A multiply is acceptable here
5050 since this is presumed to be seldom executed. */
5051 emit_iv_add_mult (tv->add_val, v->mult_val,
5052 v->add_val, v->new_reg, insert_before);
5055 /* Add code at loop start to initialize giv's reduced reg. */
5057 emit_iv_add_mult (bl->initial_value, v->mult_val,
5058 v->add_val, v->new_reg, loop_start);
5062 /* Rescan all givs. If a giv is the same as a giv not reduced, mark it
5065 For each giv register that can be reduced now: if replaceable,
5066 substitute reduced reg wherever the old giv occurs;
5067 else add new move insn "giv_reg = reduced_reg". */
5069 for (v = bl->giv; v; v = v->next_iv)
5071 if (v->same && v->same->ignore)
5077 /* Update expression if this was combined, in case other giv was
5080 v->new_reg = replace_rtx (v->new_reg,
5081 v->same->dest_reg, v->same->new_reg);
5083 if (v->giv_type == DEST_ADDR)
5084 /* Store reduced reg as the address in the memref where we found
5086 validate_change (v->insn, v->location, v->new_reg, 0);
5087 else if (v->replaceable)
5089 reg_map[REGNO (v->dest_reg)] = v->new_reg;
5092 /* I can no longer duplicate the original problem. Perhaps
5093 this is unnecessary now? */
5095 /* Replaceable; it isn't strictly necessary to delete the old
5096 insn and emit a new one, because v->dest_reg is now dead.
5098 However, especially when unrolling loops, the special
5099 handling for (set REG0 REG1) in the second cse pass may
5100 make v->dest_reg live again. To avoid this problem, emit
5101 an insn to set the original giv reg from the reduced giv.
5102 We can not delete the original insn, since it may be part
5103 of a LIBCALL, and the code in flow that eliminates dead
5104 libcalls will fail if it is deleted. */
5105 emit_insn_after (gen_move_insn (v->dest_reg, v->new_reg),
5111 /* Not replaceable; emit an insn to set the original giv reg from
5112 the reduced giv, same as above. */
5113 emit_insn_after (gen_move_insn (v->dest_reg, v->new_reg),
5117 /* When a loop is reversed, givs which depend on the reversed
5118 biv, and which are live outside the loop, must be set to their
5119 correct final value. This insn is only needed if the giv is
5120 not replaceable. The correct final value is the same as the
5121 value that the giv starts the reversed loop with. */
5122 if (bl->reversed && ! v->replaceable)
5123 emit_iv_add_mult (bl->initial_value, v->mult_val,
5124 v->add_val, v->dest_reg, end_insert_before);
5125 else if (v->final_value)
5129 /* If the loop has multiple exits, emit the insn before the
5130 loop to ensure that it will always be executed no matter
5131 how the loop exits. Otherwise, emit the insn after the loop,
5132 since this is slightly more efficient. */
5133 if (loop_number_exit_count[uid_loop_num[INSN_UID (loop_start)]])
5134 insert_before = loop_start;
5136 insert_before = end_insert_before;
5137 emit_insn_before (gen_move_insn (v->dest_reg, v->final_value),
5141 /* If the insn to set the final value of the giv was emitted
5142 before the loop, then we must delete the insn inside the loop
5143 that sets it. If this is a LIBCALL, then we must delete
5144 every insn in the libcall. Note, however, that
5145 final_giv_value will only succeed when there are multiple
5146 exits if the giv is dead at each exit, hence it does not
5147 matter that the original insn remains because it is dead
5149 /* Delete the insn inside the loop that sets the giv since
5150 the giv is now set before (or after) the loop. */
5151 delete_insn (v->insn);
5155 if (loop_dump_stream)
5157 fprintf (loop_dump_stream, "giv at %d reduced to ",
5158 INSN_UID (v->insn));
5159 print_rtl (loop_dump_stream, v->new_reg);
5160 fprintf (loop_dump_stream, "\n");
5164 /* All the givs based on the biv bl have been reduced if they
5167 /* For each giv not marked as maybe dead that has been combined with a
5168 second giv, clear any "maybe dead" mark on that second giv.
5169 v->new_reg will either be or refer to the register of the giv it
5172 Doing this clearing avoids problems in biv elimination where a
5173 giv's new_reg is a complex value that can't be put in the insn but
5174 the giv combined with (with a reg as new_reg) is marked maybe_dead.
5175 Since the register will be used in either case, we'd prefer it be
5176 used from the simpler giv. */
5178 for (v = bl->giv; v; v = v->next_iv)
5179 if (! v->maybe_dead && v->same)
5180 v->same->maybe_dead = 0;
5182 /* Try to eliminate the biv, if it is a candidate.
5183 This won't work if ! all_reduced,
5184 since the givs we planned to use might not have been reduced.
5186 We have to be careful that we didn't initially think we could eliminate
5187 this biv because of a giv that we now think may be dead and shouldn't
5188 be used as a biv replacement.
5190 Also, there is the possibility that we may have a giv that looks
5191 like it can be used to eliminate a biv, but the resulting insn
5192 isn't valid. This can happen, for example, on the 88k, where a
5193 JUMP_INSN can compare a register only with zero. Attempts to
5194 replace it with a compare with a constant will fail.
5196 Note that in cases where this call fails, we may have replaced some
5197 of the occurrences of the biv with a giv, but no harm was done in
5198 doing so in the rare cases where it can occur. */
5200 if (all_reduced == 1 && bl->eliminable
5201 && maybe_eliminate_biv (bl, loop_start, end, 1,
5202 threshold, insn_count))
5205 /* ?? If we created a new test to bypass the loop entirely,
5206 or otherwise drop straight in, based on this test, then
5207 we might want to rewrite it also. This way some later
5208 pass has more hope of removing the initialization of this
5211 /* If final_value != 0, then the biv may be used after loop end
5212 and we must emit an insn to set it just in case.
5214 Reversed bivs already have an insn after the loop setting their
5215 value, so we don't need another one. We can't calculate the
5216 proper final value for such a biv here anyways. */
5217 if (final_value != 0 && ! bl->reversed)
5221 /* If the loop has multiple exits, emit the insn before the
5222 loop to ensure that it will always be executed no matter
5223 how the loop exits. Otherwise, emit the insn after the
5224 loop, since this is slightly more efficient. */
5225 if (loop_number_exit_count[uid_loop_num[INSN_UID (loop_start)]])
5226 insert_before = loop_start;
5228 insert_before = end_insert_before;
5230 emit_insn_before (gen_move_insn (bl->biv->dest_reg, final_value),
5235 /* Delete all of the instructions inside the loop which set
5236 the biv, as they are all dead. If is safe to delete them,
5237 because an insn setting a biv will never be part of a libcall. */
5238 /* However, deleting them will invalidate the regno_last_uid info,
5239 so keeping them around is more convenient. Final_biv_value
5240 will only succeed when there are multiple exits if the biv
5241 is dead at each exit, hence it does not matter that the original
5242 insn remains, because it is dead anyways. */
5243 for (v = bl->biv; v; v = v->next_iv)
5244 delete_insn (v->insn);
5247 if (loop_dump_stream)
5248 fprintf (loop_dump_stream, "Reg %d: biv eliminated\n",
5253 /* Go through all the instructions in the loop, making all the
5254 register substitutions scheduled in REG_MAP. */
5256 for (p = loop_start; p != end; p = NEXT_INSN (p))
5257 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
5258 || GET_CODE (p) == CALL_INSN)
5260 replace_regs (PATTERN (p), reg_map, reg_map_size, 0);
5261 replace_regs (REG_NOTES (p), reg_map, reg_map_size, 0);
5265 if (loop_info->n_iterations > 0)
5267 /* When we completely unroll a loop we will likely not need the increment
5268 of the loop BIV and we will not need the conditional branch at the
5270 unrolled_insn_copies = insn_count - 2;
5273 /* When we completely unroll a loop on a HAVE_cc0 machine we will not
5274 need the comparison before the conditional branch at the end of the
5276 unrolled_insn_copies -= 1;
5279 /* We'll need one copy for each loop iteration. */
5280 unrolled_insn_copies *= loop_info->n_iterations;
5282 /* A little slop to account for the ability to remove initialization
5283 code, better CSE, and other secondary benefits of completely
5284 unrolling some loops. */
5285 unrolled_insn_copies -= 1;
5287 /* Clamp the value. */
5288 if (unrolled_insn_copies < 0)
5289 unrolled_insn_copies = 0;
5292 /* Unroll loops from within strength reduction so that we can use the
5293 induction variable information that strength_reduce has already
5294 collected. Always unroll loops that would be as small or smaller
5295 unrolled than when rolled. */
5297 || (loop_info->n_iterations > 0
5298 && unrolled_insn_copies <= insn_count))
5299 unroll_loop (loop_end, insn_count, loop_start, end_insert_before,
5302 #ifdef HAVE_decrement_and_branch_on_count
5303 /* Instrument the loop with BCT insn. */
5304 if (HAVE_decrement_and_branch_on_count && bct_p
5305 && flag_branch_on_count_reg)
5306 insert_bct (loop_start, loop_end, loop_info);
5307 #endif /* HAVE_decrement_and_branch_on_count */
5309 if (loop_dump_stream)
5310 fprintf (loop_dump_stream, "\n");
5313 VARRAY_FREE (reg_iv_type);
5314 VARRAY_FREE (reg_iv_info);
5315 free (reg_biv_class);
5320 /* Return 1 if X is a valid source for an initial value (or as value being
5321 compared against in an initial test).
5323 X must be either a register or constant and must not be clobbered between
5324 the current insn and the start of the loop.
5326 INSN is the insn containing X. */
5329 valid_initial_value_p (x, insn, call_seen, loop_start)
5338 /* Only consider pseudos we know about initialized in insns whose luids
5340 if (GET_CODE (x) != REG
5341 || REGNO (x) >= max_reg_before_loop)
5344 /* Don't use call-clobbered registers across a call which clobbers it. On
5345 some machines, don't use any hard registers at all. */
5346 if (REGNO (x) < FIRST_PSEUDO_REGISTER
5347 && (SMALL_REGISTER_CLASSES
5348 || (call_used_regs[REGNO (x)] && call_seen)))
5351 /* Don't use registers that have been clobbered before the start of the
5353 if (reg_set_between_p (x, insn, loop_start))
5359 /* Scan X for memory refs and check each memory address
5360 as a possible giv. INSN is the insn whose pattern X comes from.
5361 NOT_EVERY_ITERATION is 1 if the insn might not be executed during
5362 every loop iteration. MAYBE_MULTIPLE is 1 if the insn might be executed
5363 more thanonce in each loop iteration. */
5366 find_mem_givs (x, insn, not_every_iteration, maybe_multiple, loop_start,
5370 int not_every_iteration, maybe_multiple;
5371 rtx loop_start, loop_end;
5374 register enum rtx_code code;
5375 register const char *fmt;
5380 code = GET_CODE (x);
5404 /* This code used to disable creating GIVs with mult_val == 1 and
5405 add_val == 0. However, this leads to lost optimizations when
5406 it comes time to combine a set of related DEST_ADDR GIVs, since
5407 this one would not be seen. */
5409 if (general_induction_var (XEXP (x, 0), &src_reg, &add_val,
5410 &mult_val, 1, &benefit))
5412 /* Found one; record it. */
5414 = (struct induction *) oballoc (sizeof (struct induction));
5416 record_giv (v, insn, src_reg, addr_placeholder, mult_val,
5417 add_val, benefit, DEST_ADDR, not_every_iteration,
5418 maybe_multiple, &XEXP (x, 0), loop_start, loop_end);
5420 v->mem_mode = GET_MODE (x);
5429 /* Recursively scan the subexpressions for other mem refs. */
5431 fmt = GET_RTX_FORMAT (code);
5432 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5434 find_mem_givs (XEXP (x, i), insn, not_every_iteration, maybe_multiple,
5435 loop_start, loop_end);
5436 else if (fmt[i] == 'E')
5437 for (j = 0; j < XVECLEN (x, i); j++)
5438 find_mem_givs (XVECEXP (x, i, j), insn, not_every_iteration,
5439 maybe_multiple, loop_start, loop_end);
5442 /* Fill in the data about one biv update.
5443 V is the `struct induction' in which we record the biv. (It is
5444 allocated by the caller, with alloca.)
5445 INSN is the insn that sets it.
5446 DEST_REG is the biv's reg.
5448 MULT_VAL is const1_rtx if the biv is being incremented here, in which case
5449 INC_VAL is the increment. Otherwise, MULT_VAL is const0_rtx and the biv is
5450 being set to INC_VAL.
5452 NOT_EVERY_ITERATION is nonzero if this biv update is not know to be
5453 executed every iteration; MAYBE_MULTIPLE is nonzero if this biv update
5454 can be executed more than once per iteration. If MAYBE_MULTIPLE
5455 and NOT_EVERY_ITERATION are both zero, we know that the biv update is
5456 executed exactly once per iteration. */
5459 record_biv (v, insn, dest_reg, inc_val, mult_val, location,
5460 not_every_iteration, maybe_multiple)
5461 struct induction *v;
5467 int not_every_iteration;
5470 struct iv_class *bl;
5473 v->src_reg = dest_reg;
5474 v->dest_reg = dest_reg;
5475 v->mult_val = mult_val;
5476 v->add_val = inc_val;
5477 v->location = location;
5478 v->mode = GET_MODE (dest_reg);
5479 v->always_computable = ! not_every_iteration;
5480 v->always_executed = ! not_every_iteration;
5481 v->maybe_multiple = maybe_multiple;
5483 /* Add this to the reg's iv_class, creating a class
5484 if this is the first incrementation of the reg. */
5486 bl = reg_biv_class[REGNO (dest_reg)];
5489 /* Create and initialize new iv_class. */
5491 bl = (struct iv_class *) oballoc (sizeof (struct iv_class));
5493 bl->regno = REGNO (dest_reg);
5499 /* Set initial value to the reg itself. */
5500 bl->initial_value = dest_reg;
5501 /* We haven't seen the initializing insn yet */
5504 bl->initial_test = 0;
5505 bl->incremented = 0;
5509 bl->total_benefit = 0;
5511 /* Add this class to loop_iv_list. */
5512 bl->next = loop_iv_list;
5515 /* Put it in the array of biv register classes. */
5516 reg_biv_class[REGNO (dest_reg)] = bl;
5519 /* Update IV_CLASS entry for this biv. */
5520 v->next_iv = bl->biv;
5523 if (mult_val == const1_rtx)
5524 bl->incremented = 1;
5526 if (loop_dump_stream)
5528 fprintf (loop_dump_stream,
5529 "Insn %d: possible biv, reg %d,",
5530 INSN_UID (insn), REGNO (dest_reg));
5531 if (GET_CODE (inc_val) == CONST_INT)
5533 fprintf (loop_dump_stream, " const =");
5534 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, INTVAL (inc_val));
5535 fputc ('\n', loop_dump_stream);
5539 fprintf (loop_dump_stream, " const = ");
5540 print_rtl (loop_dump_stream, inc_val);
5541 fprintf (loop_dump_stream, "\n");
5546 /* Fill in the data about one giv.
5547 V is the `struct induction' in which we record the giv. (It is
5548 allocated by the caller, with alloca.)
5549 INSN is the insn that sets it.
5550 BENEFIT estimates the savings from deleting this insn.
5551 TYPE is DEST_REG or DEST_ADDR; it says whether the giv is computed
5552 into a register or is used as a memory address.
5554 SRC_REG is the biv reg which the giv is computed from.
5555 DEST_REG is the giv's reg (if the giv is stored in a reg).
5556 MULT_VAL and ADD_VAL are the coefficients used to compute the giv.
5557 LOCATION points to the place where this giv's value appears in INSN. */
5560 record_giv (v, insn, src_reg, dest_reg, mult_val, add_val, benefit,
5561 type, not_every_iteration, maybe_multiple, location, loop_start,
5563 struct induction *v;
5567 rtx mult_val, add_val;
5570 int not_every_iteration, maybe_multiple;
5572 rtx loop_start, loop_end;
5574 struct induction *b;
5575 struct iv_class *bl;
5576 rtx set = single_set (insn);
5579 v->src_reg = src_reg;
5581 v->dest_reg = dest_reg;
5582 v->mult_val = mult_val;
5583 v->add_val = add_val;
5584 v->benefit = benefit;
5585 v->location = location;
5587 v->combined_with = 0;
5588 v->maybe_multiple = maybe_multiple;
5590 v->derive_adjustment = 0;
5596 v->auto_inc_opt = 0;
5599 v->derived_from = 0;
5602 /* The v->always_computable field is used in update_giv_derive, to
5603 determine whether a giv can be used to derive another giv. For a
5604 DEST_REG giv, INSN computes a new value for the giv, so its value
5605 isn't computable if INSN insn't executed every iteration.
5606 However, for a DEST_ADDR giv, INSN merely uses the value of the giv;
5607 it does not compute a new value. Hence the value is always computable
5608 regardless of whether INSN is executed each iteration. */
5610 if (type == DEST_ADDR)
5611 v->always_computable = 1;
5613 v->always_computable = ! not_every_iteration;
5615 v->always_executed = ! not_every_iteration;
5617 if (type == DEST_ADDR)
5619 v->mode = GET_MODE (*location);
5622 else /* type == DEST_REG */
5624 v->mode = GET_MODE (SET_DEST (set));
5626 v->lifetime = (uid_luid[REGNO_LAST_UID (REGNO (dest_reg))]
5627 - uid_luid[REGNO_FIRST_UID (REGNO (dest_reg))]);
5629 /* If the lifetime is zero, it means that this register is
5630 really a dead store. So mark this as a giv that can be
5631 ignored. This will not prevent the biv from being eliminated. */
5632 if (v->lifetime == 0)
5635 REG_IV_TYPE (REGNO (dest_reg)) = GENERAL_INDUCT;
5636 REG_IV_INFO (REGNO (dest_reg)) = v;
5639 /* Add the giv to the class of givs computed from one biv. */
5641 bl = reg_biv_class[REGNO (src_reg)];
5644 v->next_iv = bl->giv;
5646 /* Don't count DEST_ADDR. This is supposed to count the number of
5647 insns that calculate givs. */
5648 if (type == DEST_REG)
5650 bl->total_benefit += benefit;
5653 /* Fatal error, biv missing for this giv? */
5656 if (type == DEST_ADDR)
5660 /* The giv can be replaced outright by the reduced register only if all
5661 of the following conditions are true:
5662 - the insn that sets the giv is always executed on any iteration
5663 on which the giv is used at all
5664 (there are two ways to deduce this:
5665 either the insn is executed on every iteration,
5666 or all uses follow that insn in the same basic block),
5667 - the giv is not used outside the loop
5668 - no assignments to the biv occur during the giv's lifetime. */
5670 if (REGNO_FIRST_UID (REGNO (dest_reg)) == INSN_UID (insn)
5671 /* Previous line always fails if INSN was moved by loop opt. */
5672 && uid_luid[REGNO_LAST_UID (REGNO (dest_reg))] < INSN_LUID (loop_end)
5673 && (! not_every_iteration
5674 || last_use_this_basic_block (dest_reg, insn)))
5676 /* Now check that there are no assignments to the biv within the
5677 giv's lifetime. This requires two separate checks. */
5679 /* Check each biv update, and fail if any are between the first
5680 and last use of the giv.
5682 If this loop contains an inner loop that was unrolled, then
5683 the insn modifying the biv may have been emitted by the loop
5684 unrolling code, and hence does not have a valid luid. Just
5685 mark the biv as not replaceable in this case. It is not very
5686 useful as a biv, because it is used in two different loops.
5687 It is very unlikely that we would be able to optimize the giv
5688 using this biv anyways. */
5691 for (b = bl->biv; b; b = b->next_iv)
5693 if (INSN_UID (b->insn) >= max_uid_for_loop
5694 || ((uid_luid[INSN_UID (b->insn)]
5695 >= uid_luid[REGNO_FIRST_UID (REGNO (dest_reg))])
5696 && (uid_luid[INSN_UID (b->insn)]
5697 <= uid_luid[REGNO_LAST_UID (REGNO (dest_reg))])))
5700 v->not_replaceable = 1;
5705 /* If there are any backwards branches that go from after the
5706 biv update to before it, then this giv is not replaceable. */
5708 for (b = bl->biv; b; b = b->next_iv)
5709 if (back_branch_in_range_p (b->insn, loop_start, loop_end))
5712 v->not_replaceable = 1;
5718 /* May still be replaceable, we don't have enough info here to
5721 v->not_replaceable = 0;
5725 /* Record whether the add_val contains a const_int, for later use by
5730 v->no_const_addval = 1;
5731 if (tem == const0_rtx)
5733 else if (GET_CODE (tem) == CONST_INT)
5734 v->no_const_addval = 0;
5735 else if (GET_CODE (tem) == PLUS)
5739 if (GET_CODE (XEXP (tem, 0)) == PLUS)
5740 tem = XEXP (tem, 0);
5741 else if (GET_CODE (XEXP (tem, 1)) == PLUS)
5742 tem = XEXP (tem, 1);
5746 if (GET_CODE (XEXP (tem, 1)) == CONST_INT)
5747 v->no_const_addval = 0;
5751 if (loop_dump_stream)
5753 if (type == DEST_REG)
5754 fprintf (loop_dump_stream, "Insn %d: giv reg %d",
5755 INSN_UID (insn), REGNO (dest_reg));
5757 fprintf (loop_dump_stream, "Insn %d: dest address",
5760 fprintf (loop_dump_stream, " src reg %d benefit %d",
5761 REGNO (src_reg), v->benefit);
5762 fprintf (loop_dump_stream, " lifetime %d",
5766 fprintf (loop_dump_stream, " replaceable");
5768 if (v->no_const_addval)
5769 fprintf (loop_dump_stream, " ncav");
5771 if (GET_CODE (mult_val) == CONST_INT)
5773 fprintf (loop_dump_stream, " mult ");
5774 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, INTVAL (mult_val));
5778 fprintf (loop_dump_stream, " mult ");
5779 print_rtl (loop_dump_stream, mult_val);
5782 if (GET_CODE (add_val) == CONST_INT)
5784 fprintf (loop_dump_stream, " add ");
5785 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, INTVAL (add_val));
5789 fprintf (loop_dump_stream, " add ");
5790 print_rtl (loop_dump_stream, add_val);
5794 if (loop_dump_stream)
5795 fprintf (loop_dump_stream, "\n");
5800 /* All this does is determine whether a giv can be made replaceable because
5801 its final value can be calculated. This code can not be part of record_giv
5802 above, because final_giv_value requires that the number of loop iterations
5803 be known, and that can not be accurately calculated until after all givs
5804 have been identified. */
5807 check_final_value (v, loop_start, loop_end, n_iterations)
5808 struct induction *v;
5809 rtx loop_start, loop_end;
5810 unsigned HOST_WIDE_INT n_iterations;
5812 struct iv_class *bl;
5813 rtx final_value = 0;
5815 bl = reg_biv_class[REGNO (v->src_reg)];
5817 /* DEST_ADDR givs will never reach here, because they are always marked
5818 replaceable above in record_giv. */
5820 /* The giv can be replaced outright by the reduced register only if all
5821 of the following conditions are true:
5822 - the insn that sets the giv is always executed on any iteration
5823 on which the giv is used at all
5824 (there are two ways to deduce this:
5825 either the insn is executed on every iteration,
5826 or all uses follow that insn in the same basic block),
5827 - its final value can be calculated (this condition is different
5828 than the one above in record_giv)
5829 - no assignments to the biv occur during the giv's lifetime. */
5832 /* This is only called now when replaceable is known to be false. */
5833 /* Clear replaceable, so that it won't confuse final_giv_value. */
5837 if ((final_value = final_giv_value (v, loop_start, loop_end, n_iterations))
5838 && (v->always_computable || last_use_this_basic_block (v->dest_reg, v->insn)))
5840 int biv_increment_seen = 0;
5846 /* When trying to determine whether or not a biv increment occurs
5847 during the lifetime of the giv, we can ignore uses of the variable
5848 outside the loop because final_value is true. Hence we can not
5849 use regno_last_uid and regno_first_uid as above in record_giv. */
5851 /* Search the loop to determine whether any assignments to the
5852 biv occur during the giv's lifetime. Start with the insn
5853 that sets the giv, and search around the loop until we come
5854 back to that insn again.
5856 Also fail if there is a jump within the giv's lifetime that jumps
5857 to somewhere outside the lifetime but still within the loop. This
5858 catches spaghetti code where the execution order is not linear, and
5859 hence the above test fails. Here we assume that the giv lifetime
5860 does not extend from one iteration of the loop to the next, so as
5861 to make the test easier. Since the lifetime isn't known yet,
5862 this requires two loops. See also record_giv above. */
5864 last_giv_use = v->insn;
5870 p = NEXT_INSN (loop_start);
5874 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
5875 || GET_CODE (p) == CALL_INSN)
5877 if (biv_increment_seen)
5879 if (reg_mentioned_p (v->dest_reg, PATTERN (p)))
5882 v->not_replaceable = 1;
5886 else if (reg_set_p (v->src_reg, PATTERN (p)))
5887 biv_increment_seen = 1;
5888 else if (reg_mentioned_p (v->dest_reg, PATTERN (p)))
5893 /* Now that the lifetime of the giv is known, check for branches
5894 from within the lifetime to outside the lifetime if it is still
5904 p = NEXT_INSN (loop_start);
5905 if (p == last_giv_use)
5908 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p)
5909 && LABEL_NAME (JUMP_LABEL (p))
5910 && ((loop_insn_first_p (JUMP_LABEL (p), v->insn)
5911 && loop_insn_first_p (loop_start, JUMP_LABEL (p)))
5912 || (loop_insn_first_p (last_giv_use, JUMP_LABEL (p))
5913 && loop_insn_first_p (JUMP_LABEL (p), loop_end))))
5916 v->not_replaceable = 1;
5918 if (loop_dump_stream)
5919 fprintf (loop_dump_stream,
5920 "Found branch outside giv lifetime.\n");
5927 /* If it is replaceable, then save the final value. */
5929 v->final_value = final_value;
5932 if (loop_dump_stream && v->replaceable)
5933 fprintf (loop_dump_stream, "Insn %d: giv reg %d final_value replaceable\n",
5934 INSN_UID (v->insn), REGNO (v->dest_reg));
5937 /* Update the status of whether a giv can derive other givs.
5939 We need to do something special if there is or may be an update to the biv
5940 between the time the giv is defined and the time it is used to derive
5943 In addition, a giv that is only conditionally set is not allowed to
5944 derive another giv once a label has been passed.
5946 The cases we look at are when a label or an update to a biv is passed. */
5949 update_giv_derive (p)
5952 struct iv_class *bl;
5953 struct induction *biv, *giv;
5957 /* Search all IV classes, then all bivs, and finally all givs.
5959 There are three cases we are concerned with. First we have the situation
5960 of a giv that is only updated conditionally. In that case, it may not
5961 derive any givs after a label is passed.
5963 The second case is when a biv update occurs, or may occur, after the
5964 definition of a giv. For certain biv updates (see below) that are
5965 known to occur between the giv definition and use, we can adjust the
5966 giv definition. For others, or when the biv update is conditional,
5967 we must prevent the giv from deriving any other givs. There are two
5968 sub-cases within this case.
5970 If this is a label, we are concerned with any biv update that is done
5971 conditionally, since it may be done after the giv is defined followed by
5972 a branch here (actually, we need to pass both a jump and a label, but
5973 this extra tracking doesn't seem worth it).
5975 If this is a jump, we are concerned about any biv update that may be
5976 executed multiple times. We are actually only concerned about
5977 backward jumps, but it is probably not worth performing the test
5978 on the jump again here.
5980 If this is a biv update, we must adjust the giv status to show that a
5981 subsequent biv update was performed. If this adjustment cannot be done,
5982 the giv cannot derive further givs. */
5984 for (bl = loop_iv_list; bl; bl = bl->next)
5985 for (biv = bl->biv; biv; biv = biv->next_iv)
5986 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN
5989 for (giv = bl->giv; giv; giv = giv->next_iv)
5991 /* If cant_derive is already true, there is no point in
5992 checking all of these conditions again. */
5993 if (giv->cant_derive)
5996 /* If this giv is conditionally set and we have passed a label,
5997 it cannot derive anything. */
5998 if (GET_CODE (p) == CODE_LABEL && ! giv->always_computable)
5999 giv->cant_derive = 1;
6001 /* Skip givs that have mult_val == 0, since
6002 they are really invariants. Also skip those that are
6003 replaceable, since we know their lifetime doesn't contain
6005 else if (giv->mult_val == const0_rtx || giv->replaceable)
6008 /* The only way we can allow this giv to derive another
6009 is if this is a biv increment and we can form the product
6010 of biv->add_val and giv->mult_val. In this case, we will
6011 be able to compute a compensation. */
6012 else if (biv->insn == p)
6016 if (biv->mult_val == const1_rtx)
6017 tem = simplify_giv_expr (gen_rtx_MULT (giv->mode,
6022 if (tem && giv->derive_adjustment)
6023 tem = simplify_giv_expr
6024 (gen_rtx_PLUS (giv->mode, tem, giv->derive_adjustment),
6028 giv->derive_adjustment = tem;
6030 giv->cant_derive = 1;
6032 else if ((GET_CODE (p) == CODE_LABEL && ! biv->always_computable)
6033 || (GET_CODE (p) == JUMP_INSN && biv->maybe_multiple))
6034 giv->cant_derive = 1;
6039 /* Check whether an insn is an increment legitimate for a basic induction var.
6040 X is the source of insn P, or a part of it.
6041 MODE is the mode in which X should be interpreted.
6043 DEST_REG is the putative biv, also the destination of the insn.
6044 We accept patterns of these forms:
6045 REG = REG + INVARIANT (includes REG = REG - CONSTANT)
6046 REG = INVARIANT + REG
6048 If X is suitable, we return 1, set *MULT_VAL to CONST1_RTX,
6049 store the additive term into *INC_VAL, and store the place where
6050 we found the additive term into *LOCATION.
6052 If X is an assignment of an invariant into DEST_REG, we set
6053 *MULT_VAL to CONST0_RTX, and store the invariant into *INC_VAL.
6055 We also want to detect a BIV when it corresponds to a variable
6056 whose mode was promoted via PROMOTED_MODE. In that case, an increment
6057 of the variable may be a PLUS that adds a SUBREG of that variable to
6058 an invariant and then sign- or zero-extends the result of the PLUS
6061 Most GIVs in such cases will be in the promoted mode, since that is the
6062 probably the natural computation mode (and almost certainly the mode
6063 used for addresses) on the machine. So we view the pseudo-reg containing
6064 the variable as the BIV, as if it were simply incremented.
6066 Note that treating the entire pseudo as a BIV will result in making
6067 simple increments to any GIVs based on it. However, if the variable
6068 overflows in its declared mode but not its promoted mode, the result will
6069 be incorrect. This is acceptable if the variable is signed, since
6070 overflows in such cases are undefined, but not if it is unsigned, since
6071 those overflows are defined. So we only check for SIGN_EXTEND and
6074 If we cannot find a biv, we return 0. */
6077 basic_induction_var (x, mode, dest_reg, p, inc_val, mult_val, location)
6079 enum machine_mode mode;
6086 register enum rtx_code code;
6090 code = GET_CODE (x);
6095 if (rtx_equal_p (XEXP (x, 0), dest_reg)
6096 || (GET_CODE (XEXP (x, 0)) == SUBREG
6097 && SUBREG_PROMOTED_VAR_P (XEXP (x, 0))
6098 && SUBREG_REG (XEXP (x, 0)) == dest_reg))
6100 argp = &XEXP (x, 1);
6102 else if (rtx_equal_p (XEXP (x, 1), dest_reg)
6103 || (GET_CODE (XEXP (x, 1)) == SUBREG
6104 && SUBREG_PROMOTED_VAR_P (XEXP (x, 1))
6105 && SUBREG_REG (XEXP (x, 1)) == dest_reg))
6107 argp = &XEXP (x, 0);
6113 if (invariant_p (arg) != 1)
6116 *inc_val = convert_modes (GET_MODE (dest_reg), GET_MODE (x), arg, 0);
6117 *mult_val = const1_rtx;
6122 /* If this is a SUBREG for a promoted variable, check the inner
6124 if (SUBREG_PROMOTED_VAR_P (x))
6125 return basic_induction_var (SUBREG_REG (x), GET_MODE (SUBREG_REG (x)),
6126 dest_reg, p, inc_val, mult_val, location);
6130 /* If this register is assigned in a previous insn, look at its
6131 source, but don't go outside the loop or past a label. */
6137 insn = PREV_INSN (insn);
6138 } while (insn && GET_CODE (insn) == NOTE
6139 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG);
6143 set = single_set (insn);
6147 if ((SET_DEST (set) == x
6148 || (GET_CODE (SET_DEST (set)) == SUBREG
6149 && (GET_MODE_SIZE (GET_MODE (SET_DEST (set)))
6151 && (GET_MODE_CLASS (GET_MODE (SET_DEST (set)))
6153 && SUBREG_REG (SET_DEST (set)) == x))
6154 && basic_induction_var (SET_SRC (set),
6155 (GET_MODE (SET_SRC (set)) == VOIDmode
6157 : GET_MODE (SET_SRC (set))),
6159 inc_val, mult_val, location))
6162 /* ... fall through ... */
6164 /* Can accept constant setting of biv only when inside inner most loop.
6165 Otherwise, a biv of an inner loop may be incorrectly recognized
6166 as a biv of the outer loop,
6167 causing code to be moved INTO the inner loop. */
6169 if (invariant_p (x) != 1)
6174 /* convert_modes aborts if we try to convert to or from CCmode, so just
6175 exclude that case. It is very unlikely that a condition code value
6176 would be a useful iterator anyways. */
6177 if (this_loop_info.loops_enclosed == 1
6178 && GET_MODE_CLASS (mode) != MODE_CC
6179 && GET_MODE_CLASS (GET_MODE (dest_reg)) != MODE_CC)
6181 /* Possible bug here? Perhaps we don't know the mode of X. */
6182 *inc_val = convert_modes (GET_MODE (dest_reg), mode, x, 0);
6183 *mult_val = const0_rtx;
6190 return basic_induction_var (XEXP (x, 0), GET_MODE (XEXP (x, 0)),
6191 dest_reg, p, inc_val, mult_val, location);
6194 /* Similar, since this can be a sign extension. */
6195 for (insn = PREV_INSN (p);
6196 (insn && GET_CODE (insn) == NOTE
6197 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG);
6198 insn = PREV_INSN (insn))
6202 set = single_set (insn);
6204 if (set && SET_DEST (set) == XEXP (x, 0)
6205 && GET_CODE (XEXP (x, 1)) == CONST_INT
6206 && INTVAL (XEXP (x, 1)) >= 0
6207 && GET_CODE (SET_SRC (set)) == ASHIFT
6208 && XEXP (x, 1) == XEXP (SET_SRC (set), 1))
6209 return basic_induction_var (XEXP (SET_SRC (set), 0),
6210 GET_MODE (XEXP (x, 0)),
6211 dest_reg, insn, inc_val, mult_val,
6220 /* A general induction variable (giv) is any quantity that is a linear
6221 function of a basic induction variable,
6222 i.e. giv = biv * mult_val + add_val.
6223 The coefficients can be any loop invariant quantity.
6224 A giv need not be computed directly from the biv;
6225 it can be computed by way of other givs. */
6227 /* Determine whether X computes a giv.
6228 If it does, return a nonzero value
6229 which is the benefit from eliminating the computation of X;
6230 set *SRC_REG to the register of the biv that it is computed from;
6231 set *ADD_VAL and *MULT_VAL to the coefficients,
6232 such that the value of X is biv * mult + add; */
6235 general_induction_var (x, src_reg, add_val, mult_val, is_addr, pbenefit)
6246 /* If this is an invariant, forget it, it isn't a giv. */
6247 if (invariant_p (x) == 1)
6250 /* See if the expression could be a giv and get its form.
6251 Mark our place on the obstack in case we don't find a giv. */
6252 storage = (char *) oballoc (0);
6254 x = simplify_giv_expr (x, pbenefit);
6261 switch (GET_CODE (x))
6265 /* Since this is now an invariant and wasn't before, it must be a giv
6266 with MULT_VAL == 0. It doesn't matter which BIV we associate this
6268 *src_reg = loop_iv_list->biv->dest_reg;
6269 *mult_val = const0_rtx;
6274 /* This is equivalent to a BIV. */
6276 *mult_val = const1_rtx;
6277 *add_val = const0_rtx;
6281 /* Either (plus (biv) (invar)) or
6282 (plus (mult (biv) (invar_1)) (invar_2)). */
6283 if (GET_CODE (XEXP (x, 0)) == MULT)
6285 *src_reg = XEXP (XEXP (x, 0), 0);
6286 *mult_val = XEXP (XEXP (x, 0), 1);
6290 *src_reg = XEXP (x, 0);
6291 *mult_val = const1_rtx;
6293 *add_val = XEXP (x, 1);
6297 /* ADD_VAL is zero. */
6298 *src_reg = XEXP (x, 0);
6299 *mult_val = XEXP (x, 1);
6300 *add_val = const0_rtx;
6307 /* Remove any enclosing USE from ADD_VAL and MULT_VAL (there will be
6308 unless they are CONST_INT). */
6309 if (GET_CODE (*add_val) == USE)
6310 *add_val = XEXP (*add_val, 0);
6311 if (GET_CODE (*mult_val) == USE)
6312 *mult_val = XEXP (*mult_val, 0);
6317 *pbenefit += ADDRESS_COST (orig_x) - reg_address_cost;
6319 *pbenefit += rtx_cost (orig_x, MEM) - reg_address_cost;
6323 *pbenefit += rtx_cost (orig_x, SET);
6325 /* Always return true if this is a giv so it will be detected as such,
6326 even if the benefit is zero or negative. This allows elimination
6327 of bivs that might otherwise not be eliminated. */
6331 /* Given an expression, X, try to form it as a linear function of a biv.
6332 We will canonicalize it to be of the form
6333 (plus (mult (BIV) (invar_1))
6335 with possible degeneracies.
6337 The invariant expressions must each be of a form that can be used as a
6338 machine operand. We surround then with a USE rtx (a hack, but localized
6339 and certainly unambiguous!) if not a CONST_INT for simplicity in this
6340 routine; it is the caller's responsibility to strip them.
6342 If no such canonicalization is possible (i.e., two biv's are used or an
6343 expression that is neither invariant nor a biv or giv), this routine
6346 For a non-zero return, the result will have a code of CONST_INT, USE,
6347 REG (for a BIV), PLUS, or MULT. No other codes will occur.
6349 *BENEFIT will be incremented by the benefit of any sub-giv encountered. */
6351 static rtx sge_plus PARAMS ((enum machine_mode, rtx, rtx));
6352 static rtx sge_plus_constant PARAMS ((rtx, rtx));
6353 static int cmp_combine_givs_stats PARAMS ((const PTR, const PTR));
6354 static int cmp_recombine_givs_stats PARAMS ((const PTR, const PTR));
6357 simplify_giv_expr (x, benefit)
6361 enum machine_mode mode = GET_MODE (x);
6365 /* If this is not an integer mode, or if we cannot do arithmetic in this
6366 mode, this can't be a giv. */
6367 if (mode != VOIDmode
6368 && (GET_MODE_CLASS (mode) != MODE_INT
6369 || GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT))
6372 switch (GET_CODE (x))
6375 arg0 = simplify_giv_expr (XEXP (x, 0), benefit);
6376 arg1 = simplify_giv_expr (XEXP (x, 1), benefit);
6377 if (arg0 == 0 || arg1 == 0)
6380 /* Put constant last, CONST_INT last if both constant. */
6381 if ((GET_CODE (arg0) == USE
6382 || GET_CODE (arg0) == CONST_INT)
6383 && ! ((GET_CODE (arg0) == USE
6384 && GET_CODE (arg1) == USE)
6385 || GET_CODE (arg1) == CONST_INT))
6386 tem = arg0, arg0 = arg1, arg1 = tem;
6388 /* Handle addition of zero, then addition of an invariant. */
6389 if (arg1 == const0_rtx)
6391 else if (GET_CODE (arg1) == CONST_INT || GET_CODE (arg1) == USE)
6392 switch (GET_CODE (arg0))
6396 /* Adding two invariants must result in an invariant, so enclose
6397 addition operation inside a USE and return it. */
6398 if (GET_CODE (arg0) == USE)
6399 arg0 = XEXP (arg0, 0);
6400 if (GET_CODE (arg1) == USE)
6401 arg1 = XEXP (arg1, 0);
6403 if (GET_CODE (arg0) == CONST_INT)
6404 tem = arg0, arg0 = arg1, arg1 = tem;
6405 if (GET_CODE (arg1) == CONST_INT)
6406 tem = sge_plus_constant (arg0, arg1);
6408 tem = sge_plus (mode, arg0, arg1);
6410 if (GET_CODE (tem) != CONST_INT)
6411 tem = gen_rtx_USE (mode, tem);
6416 /* biv + invar or mult + invar. Return sum. */
6417 return gen_rtx_PLUS (mode, arg0, arg1);
6420 /* (a + invar_1) + invar_2. Associate. */
6422 simplify_giv_expr (gen_rtx_PLUS (mode,
6433 /* Each argument must be either REG, PLUS, or MULT. Convert REG to
6434 MULT to reduce cases. */
6435 if (GET_CODE (arg0) == REG)
6436 arg0 = gen_rtx_MULT (mode, arg0, const1_rtx);
6437 if (GET_CODE (arg1) == REG)
6438 arg1 = gen_rtx_MULT (mode, arg1, const1_rtx);
6440 /* Now have PLUS + PLUS, PLUS + MULT, MULT + PLUS, or MULT + MULT.
6441 Put a MULT first, leaving PLUS + PLUS, MULT + PLUS, or MULT + MULT.
6442 Recurse to associate the second PLUS. */
6443 if (GET_CODE (arg1) == MULT)
6444 tem = arg0, arg0 = arg1, arg1 = tem;
6446 if (GET_CODE (arg1) == PLUS)
6448 simplify_giv_expr (gen_rtx_PLUS (mode,
6449 gen_rtx_PLUS (mode, arg0,
6454 /* Now must have MULT + MULT. Distribute if same biv, else not giv. */
6455 if (GET_CODE (arg0) != MULT || GET_CODE (arg1) != MULT)
6458 if (!rtx_equal_p (arg0, arg1))
6461 return simplify_giv_expr (gen_rtx_MULT (mode,
6469 /* Handle "a - b" as "a + b * (-1)". */
6470 return simplify_giv_expr (gen_rtx_PLUS (mode,
6478 arg0 = simplify_giv_expr (XEXP (x, 0), benefit);
6479 arg1 = simplify_giv_expr (XEXP (x, 1), benefit);
6480 if (arg0 == 0 || arg1 == 0)
6483 /* Put constant last, CONST_INT last if both constant. */
6484 if ((GET_CODE (arg0) == USE || GET_CODE (arg0) == CONST_INT)
6485 && GET_CODE (arg1) != CONST_INT)
6486 tem = arg0, arg0 = arg1, arg1 = tem;
6488 /* If second argument is not now constant, not giv. */
6489 if (GET_CODE (arg1) != USE && GET_CODE (arg1) != CONST_INT)
6492 /* Handle multiply by 0 or 1. */
6493 if (arg1 == const0_rtx)
6496 else if (arg1 == const1_rtx)
6499 switch (GET_CODE (arg0))
6502 /* biv * invar. Done. */
6503 return gen_rtx_MULT (mode, arg0, arg1);
6506 /* Product of two constants. */
6507 return GEN_INT (INTVAL (arg0) * INTVAL (arg1));
6510 /* invar * invar. It is a giv, but very few of these will
6511 actually pay off, so limit to simple registers. */
6512 if (GET_CODE (arg1) != CONST_INT)
6515 arg0 = XEXP (arg0, 0);
6516 if (GET_CODE (arg0) == REG)
6517 tem = gen_rtx_MULT (mode, arg0, arg1);
6518 else if (GET_CODE (arg0) == MULT
6519 && GET_CODE (XEXP (arg0, 0)) == REG
6520 && GET_CODE (XEXP (arg0, 1)) == CONST_INT)
6522 tem = gen_rtx_MULT (mode, XEXP (arg0, 0),
6523 GEN_INT (INTVAL (XEXP (arg0, 1))
6528 return gen_rtx_USE (mode, tem);
6531 /* (a * invar_1) * invar_2. Associate. */
6532 return simplify_giv_expr (gen_rtx_MULT (mode,
6540 /* (a + invar_1) * invar_2. Distribute. */
6541 return simplify_giv_expr (gen_rtx_PLUS (mode,
6555 /* Shift by constant is multiply by power of two. */
6556 if (GET_CODE (XEXP (x, 1)) != CONST_INT)
6560 simplify_giv_expr (gen_rtx_MULT (mode,
6562 GEN_INT ((HOST_WIDE_INT) 1
6563 << INTVAL (XEXP (x, 1)))),
6567 /* "-a" is "a * (-1)" */
6568 return simplify_giv_expr (gen_rtx_MULT (mode, XEXP (x, 0), constm1_rtx),
6572 /* "~a" is "-a - 1". Silly, but easy. */
6573 return simplify_giv_expr (gen_rtx_MINUS (mode,
6574 gen_rtx_NEG (mode, XEXP (x, 0)),
6579 /* Already in proper form for invariant. */
6583 /* If this is a new register, we can't deal with it. */
6584 if (REGNO (x) >= max_reg_before_loop)
6587 /* Check for biv or giv. */
6588 switch (REG_IV_TYPE (REGNO (x)))
6592 case GENERAL_INDUCT:
6594 struct induction *v = REG_IV_INFO (REGNO (x));
6596 /* Form expression from giv and add benefit. Ensure this giv
6597 can derive another and subtract any needed adjustment if so. */
6598 *benefit += v->benefit;
6602 tem = gen_rtx_PLUS (mode, gen_rtx_MULT (mode,
6603 v->src_reg, v->mult_val),
6606 if (v->derive_adjustment)
6607 tem = gen_rtx_MINUS (mode, tem, v->derive_adjustment);
6608 return simplify_giv_expr (tem, benefit);
6612 /* If it isn't an induction variable, and it is invariant, we
6613 may be able to simplify things further by looking through
6614 the bits we just moved outside the loop. */
6615 if (invariant_p (x) == 1)
6619 for (m = the_movables; m ; m = m->next)
6620 if (rtx_equal_p (x, m->set_dest))
6622 /* Ok, we found a match. Substitute and simplify. */
6624 /* If we match another movable, we must use that, as
6625 this one is going away. */
6627 return simplify_giv_expr (m->match->set_dest, benefit);
6629 /* If consec is non-zero, this is a member of a group of
6630 instructions that were moved together. We handle this
6631 case only to the point of seeking to the last insn and
6632 looking for a REG_EQUAL. Fail if we don't find one. */
6637 do { tem = NEXT_INSN (tem); } while (--i > 0);
6639 tem = find_reg_note (tem, REG_EQUAL, NULL_RTX);
6641 tem = XEXP (tem, 0);
6645 tem = single_set (m->insn);
6647 tem = SET_SRC (tem);
6652 /* What we are most interested in is pointer
6653 arithmetic on invariants -- only take
6654 patterns we may be able to do something with. */
6655 if (GET_CODE (tem) == PLUS
6656 || GET_CODE (tem) == MULT
6657 || GET_CODE (tem) == ASHIFT
6658 || GET_CODE (tem) == CONST_INT
6659 || GET_CODE (tem) == SYMBOL_REF)
6661 tem = simplify_giv_expr (tem, benefit);
6665 else if (GET_CODE (tem) == CONST
6666 && GET_CODE (XEXP (tem, 0)) == PLUS
6667 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == SYMBOL_REF
6668 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)
6670 tem = simplify_giv_expr (XEXP (tem, 0), benefit);
6681 /* Fall through to general case. */
6683 /* If invariant, return as USE (unless CONST_INT).
6684 Otherwise, not giv. */
6685 if (GET_CODE (x) == USE)
6688 if (invariant_p (x) == 1)
6690 if (GET_CODE (x) == CONST_INT)
6692 if (GET_CODE (x) == CONST
6693 && GET_CODE (XEXP (x, 0)) == PLUS
6694 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
6695 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
6697 return gen_rtx_USE (mode, x);
6704 /* This routine folds invariants such that there is only ever one
6705 CONST_INT in the summation. It is only used by simplify_giv_expr. */
6708 sge_plus_constant (x, c)
6711 if (GET_CODE (x) == CONST_INT)
6712 return GEN_INT (INTVAL (x) + INTVAL (c));
6713 else if (GET_CODE (x) != PLUS)
6714 return gen_rtx_PLUS (GET_MODE (x), x, c);
6715 else if (GET_CODE (XEXP (x, 1)) == CONST_INT)
6717 return gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0),
6718 GEN_INT (INTVAL (XEXP (x, 1)) + INTVAL (c)));
6720 else if (GET_CODE (XEXP (x, 0)) == PLUS
6721 || GET_CODE (XEXP (x, 1)) != PLUS)
6723 return gen_rtx_PLUS (GET_MODE (x),
6724 sge_plus_constant (XEXP (x, 0), c), XEXP (x, 1));
6728 return gen_rtx_PLUS (GET_MODE (x),
6729 sge_plus_constant (XEXP (x, 1), c), XEXP (x, 0));
6734 sge_plus (mode, x, y)
6735 enum machine_mode mode;
6738 while (GET_CODE (y) == PLUS)
6740 rtx a = XEXP (y, 0);
6741 if (GET_CODE (a) == CONST_INT)
6742 x = sge_plus_constant (x, a);
6744 x = gen_rtx_PLUS (mode, x, a);
6747 if (GET_CODE (y) == CONST_INT)
6748 x = sge_plus_constant (x, y);
6750 x = gen_rtx_PLUS (mode, x, y);
6754 /* Help detect a giv that is calculated by several consecutive insns;
6758 The caller has already identified the first insn P as having a giv as dest;
6759 we check that all other insns that set the same register follow
6760 immediately after P, that they alter nothing else,
6761 and that the result of the last is still a giv.
6763 The value is 0 if the reg set in P is not really a giv.
6764 Otherwise, the value is the amount gained by eliminating
6765 all the consecutive insns that compute the value.
6767 FIRST_BENEFIT is the amount gained by eliminating the first insn, P.
6768 SRC_REG is the reg of the biv; DEST_REG is the reg of the giv.
6770 The coefficients of the ultimate giv value are stored in
6771 *MULT_VAL and *ADD_VAL. */
6774 consec_sets_giv (first_benefit, p, src_reg, dest_reg,
6775 add_val, mult_val, last_consec_insn)
6782 rtx *last_consec_insn;
6790 /* Indicate that this is a giv so that we can update the value produced in
6791 each insn of the multi-insn sequence.
6793 This induction structure will be used only by the call to
6794 general_induction_var below, so we can allocate it on our stack.
6795 If this is a giv, our caller will replace the induct var entry with
6796 a new induction structure. */
6798 = (struct induction *) alloca (sizeof (struct induction));
6799 v->src_reg = src_reg;
6800 v->mult_val = *mult_val;
6801 v->add_val = *add_val;
6802 v->benefit = first_benefit;
6804 v->derive_adjustment = 0;
6806 REG_IV_TYPE (REGNO (dest_reg)) = GENERAL_INDUCT;
6807 REG_IV_INFO (REGNO (dest_reg)) = v;
6809 count = VARRAY_INT (n_times_set, REGNO (dest_reg)) - 1;
6814 code = GET_CODE (p);
6816 /* If libcall, skip to end of call sequence. */
6817 if (code == INSN && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
6821 && (set = single_set (p))
6822 && GET_CODE (SET_DEST (set)) == REG
6823 && SET_DEST (set) == dest_reg
6824 && (general_induction_var (SET_SRC (set), &src_reg,
6825 add_val, mult_val, 0, &benefit)
6826 /* Giv created by equivalent expression. */
6827 || ((temp = find_reg_note (p, REG_EQUAL, NULL_RTX))
6828 && general_induction_var (XEXP (temp, 0), &src_reg,
6829 add_val, mult_val, 0, &benefit)))
6830 && src_reg == v->src_reg)
6832 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
6833 benefit += libcall_benefit (p);
6836 v->mult_val = *mult_val;
6837 v->add_val = *add_val;
6838 v->benefit = benefit;
6840 else if (code != NOTE)
6842 /* Allow insns that set something other than this giv to a
6843 constant. Such insns are needed on machines which cannot
6844 include long constants and should not disqualify a giv. */
6846 && (set = single_set (p))
6847 && SET_DEST (set) != dest_reg
6848 && CONSTANT_P (SET_SRC (set)))
6851 REG_IV_TYPE (REGNO (dest_reg)) = UNKNOWN_INDUCT;
6856 *last_consec_insn = p;
6860 /* Return an rtx, if any, that expresses giv G2 as a function of the register
6861 represented by G1. If no such expression can be found, or it is clear that
6862 it cannot possibly be a valid address, 0 is returned.
6864 To perform the computation, we note that
6867 where `v' is the biv.
6869 So G2 = (y/b) * G1 + (b - a*y/x).
6871 Note that MULT = y/x.
6873 Update: A and B are now allowed to be additive expressions such that
6874 B contains all variables in A. That is, computing B-A will not require
6875 subtracting variables. */
6878 express_from_1 (a, b, mult)
6881 /* If MULT is zero, then A*MULT is zero, and our expression is B. */
6883 if (mult == const0_rtx)
6886 /* If MULT is not 1, we cannot handle A with non-constants, since we
6887 would then be required to subtract multiples of the registers in A.
6888 This is theoretically possible, and may even apply to some Fortran
6889 constructs, but it is a lot of work and we do not attempt it here. */
6891 if (mult != const1_rtx && GET_CODE (a) != CONST_INT)
6894 /* In general these structures are sorted top to bottom (down the PLUS
6895 chain), but not left to right across the PLUS. If B is a higher
6896 order giv than A, we can strip one level and recurse. If A is higher
6897 order, we'll eventually bail out, but won't know that until the end.
6898 If they are the same, we'll strip one level around this loop. */
6900 while (GET_CODE (a) == PLUS && GET_CODE (b) == PLUS)
6902 rtx ra, rb, oa, ob, tmp;
6904 ra = XEXP (a, 0), oa = XEXP (a, 1);
6905 if (GET_CODE (ra) == PLUS)
6906 tmp = ra, ra = oa, oa = tmp;
6908 rb = XEXP (b, 0), ob = XEXP (b, 1);
6909 if (GET_CODE (rb) == PLUS)
6910 tmp = rb, rb = ob, ob = tmp;
6912 if (rtx_equal_p (ra, rb))
6913 /* We matched: remove one reg completely. */
6915 else if (GET_CODE (ob) != PLUS && rtx_equal_p (ra, ob))
6916 /* An alternate match. */
6918 else if (GET_CODE (oa) != PLUS && rtx_equal_p (oa, rb))
6919 /* An alternate match. */
6923 /* Indicates an extra register in B. Strip one level from B and
6924 recurse, hoping B was the higher order expression. */
6925 ob = express_from_1 (a, ob, mult);
6928 return gen_rtx_PLUS (GET_MODE (b), rb, ob);
6932 /* Here we are at the last level of A, go through the cases hoping to
6933 get rid of everything but a constant. */
6935 if (GET_CODE (a) == PLUS)
6939 ra = XEXP (a, 0), oa = XEXP (a, 1);
6940 if (rtx_equal_p (oa, b))
6942 else if (!rtx_equal_p (ra, b))
6945 if (GET_CODE (oa) != CONST_INT)
6948 return GEN_INT (-INTVAL (oa) * INTVAL (mult));
6950 else if (GET_CODE (a) == CONST_INT)
6952 return plus_constant (b, -INTVAL (a) * INTVAL (mult));
6954 else if (GET_CODE (b) == PLUS)
6956 if (rtx_equal_p (a, XEXP (b, 0)))
6958 else if (rtx_equal_p (a, XEXP (b, 1)))
6963 else if (rtx_equal_p (a, b))
6970 express_from (g1, g2)
6971 struct induction *g1, *g2;
6975 /* The value that G1 will be multiplied by must be a constant integer. Also,
6976 the only chance we have of getting a valid address is if b*c/a (see above
6977 for notation) is also an integer. */
6978 if (GET_CODE (g1->mult_val) == CONST_INT
6979 && GET_CODE (g2->mult_val) == CONST_INT)
6981 if (g1->mult_val == const0_rtx
6982 || INTVAL (g2->mult_val) % INTVAL (g1->mult_val) != 0)
6984 mult = GEN_INT (INTVAL (g2->mult_val) / INTVAL (g1->mult_val));
6986 else if (rtx_equal_p (g1->mult_val, g2->mult_val))
6990 /* ??? Find out if the one is a multiple of the other? */
6994 add = express_from_1 (g1->add_val, g2->add_val, mult);
6995 if (add == NULL_RTX)
6997 /* Failed. If we've got a multiplication factor between G1 and G2,
6998 scale G1's addend and try again. */
6999 if (INTVAL (mult) > 1)
7001 rtx g1_add_val = g1->add_val;
7002 if (GET_CODE (g1_add_val) == MULT
7003 && GET_CODE (XEXP (g1_add_val, 1)) == CONST_INT)
7006 m = INTVAL (mult) * INTVAL (XEXP (g1_add_val, 1));
7007 g1_add_val = gen_rtx_MULT (GET_MODE (g1_add_val),
7008 XEXP (g1_add_val, 0), GEN_INT (m));
7012 g1_add_val = gen_rtx_MULT (GET_MODE (g1_add_val), g1_add_val,
7016 add = express_from_1 (g1_add_val, g2->add_val, const1_rtx);
7019 if (add == NULL_RTX)
7022 /* Form simplified final result. */
7023 if (mult == const0_rtx)
7025 else if (mult == const1_rtx)
7026 mult = g1->dest_reg;
7028 mult = gen_rtx_MULT (g2->mode, g1->dest_reg, mult);
7030 if (add == const0_rtx)
7034 if (GET_CODE (add) == PLUS
7035 && CONSTANT_P (XEXP (add, 1)))
7037 rtx tem = XEXP (add, 1);
7038 mult = gen_rtx_PLUS (g2->mode, mult, XEXP (add, 0));
7042 return gen_rtx_PLUS (g2->mode, mult, add);
7047 /* Return an rtx, if any, that expresses giv G2 as a function of the register
7048 represented by G1. This indicates that G2 should be combined with G1 and
7049 that G2 can use (either directly or via an address expression) a register
7050 used to represent G1. */
7053 combine_givs_p (g1, g2)
7054 struct induction *g1, *g2;
7056 rtx tem = express_from (g1, g2);
7058 /* If these givs are identical, they can be combined. We use the results
7059 of express_from because the addends are not in a canonical form, so
7060 rtx_equal_p is a weaker test. */
7061 /* But don't combine a DEST_REG giv with a DEST_ADDR giv; we want the
7062 combination to be the other way round. */
7063 if (tem == g1->dest_reg
7064 && (g1->giv_type == DEST_REG || g2->giv_type == DEST_ADDR))
7066 return g1->dest_reg;
7069 /* If G2 can be expressed as a function of G1 and that function is valid
7070 as an address and no more expensive than using a register for G2,
7071 the expression of G2 in terms of G1 can be used. */
7073 && g2->giv_type == DEST_ADDR
7074 && memory_address_p (g2->mem_mode, tem)
7075 /* ??? Looses, especially with -fforce-addr, where *g2->location
7076 will always be a register, and so anything more complicated
7080 && ADDRESS_COST (tem) <= ADDRESS_COST (*g2->location)
7082 && rtx_cost (tem, MEM) <= rtx_cost (*g2->location, MEM)
7093 struct combine_givs_stats
7100 cmp_combine_givs_stats (xp, yp)
7104 const struct combine_givs_stats * const x =
7105 (const struct combine_givs_stats *) xp;
7106 const struct combine_givs_stats * const y =
7107 (const struct combine_givs_stats *) yp;
7109 d = y->total_benefit - x->total_benefit;
7110 /* Stabilize the sort. */
7112 d = x->giv_number - y->giv_number;
7116 /* Check all pairs of givs for iv_class BL and see if any can be combined with
7117 any other. If so, point SAME to the giv combined with and set NEW_REG to
7118 be an expression (in terms of the other giv's DEST_REG) equivalent to the
7119 giv. Also, update BENEFIT and related fields for cost/benefit analysis. */
7123 struct iv_class *bl;
7125 /* Additional benefit to add for being combined multiple times. */
7126 const int extra_benefit = 3;
7128 struct induction *g1, *g2, **giv_array;
7129 int i, j, k, giv_count;
7130 struct combine_givs_stats *stats;
7133 /* Count givs, because bl->giv_count is incorrect here. */
7135 for (g1 = bl->giv; g1; g1 = g1->next_iv)
7140 = (struct induction **) alloca (giv_count * sizeof (struct induction *));
7142 for (g1 = bl->giv; g1; g1 = g1->next_iv)
7144 giv_array[i++] = g1;
7146 stats = (struct combine_givs_stats *) xcalloc (giv_count, sizeof (*stats));
7147 can_combine = (rtx *) xcalloc (giv_count, giv_count * sizeof(rtx));
7149 for (i = 0; i < giv_count; i++)
7155 stats[i].giv_number = i;
7157 /* If a DEST_REG GIV is used only once, do not allow it to combine
7158 with anything, for in doing so we will gain nothing that cannot
7159 be had by simply letting the GIV with which we would have combined
7160 to be reduced on its own. The losage shows up in particular with
7161 DEST_ADDR targets on hosts with reg+reg addressing, though it can
7162 be seen elsewhere as well. */
7163 if (g1->giv_type == DEST_REG
7164 && (single_use = VARRAY_RTX (reg_single_usage, REGNO (g1->dest_reg)))
7165 && single_use != const0_rtx)
7168 this_benefit = g1->benefit;
7169 /* Add an additional weight for zero addends. */
7170 if (g1->no_const_addval)
7173 for (j = 0; j < giv_count; j++)
7179 && (this_combine = combine_givs_p (g1, g2)) != NULL_RTX)
7181 can_combine[i*giv_count + j] = this_combine;
7182 this_benefit += g2->benefit + extra_benefit;
7185 stats[i].total_benefit = this_benefit;
7188 /* Iterate, combining until we can't. */
7190 qsort (stats, giv_count, sizeof(*stats), cmp_combine_givs_stats);
7192 if (loop_dump_stream)
7194 fprintf (loop_dump_stream, "Sorted combine statistics:\n");
7195 for (k = 0; k < giv_count; k++)
7197 g1 = giv_array[stats[k].giv_number];
7198 if (!g1->combined_with && !g1->same)
7199 fprintf (loop_dump_stream, " {%d, %d}",
7200 INSN_UID (giv_array[stats[k].giv_number]->insn),
7201 stats[k].total_benefit);
7203 putc ('\n', loop_dump_stream);
7206 for (k = 0; k < giv_count; k++)
7208 int g1_add_benefit = 0;
7210 i = stats[k].giv_number;
7213 /* If it has already been combined, skip. */
7214 if (g1->combined_with || g1->same)
7217 for (j = 0; j < giv_count; j++)
7220 if (g1 != g2 && can_combine[i*giv_count + j]
7221 /* If it has already been combined, skip. */
7222 && ! g2->same && ! g2->combined_with)
7226 g2->new_reg = can_combine[i*giv_count + j];
7228 g1->combined_with++;
7229 g1->lifetime += g2->lifetime;
7231 g1_add_benefit += g2->benefit;
7233 /* ??? The new final_[bg]iv_value code does a much better job
7234 of finding replaceable giv's, and hence this code may no
7235 longer be necessary. */
7236 if (! g2->replaceable && REG_USERVAR_P (g2->dest_reg))
7237 g1_add_benefit -= copy_cost;
7239 /* To help optimize the next set of combinations, remove
7240 this giv from the benefits of other potential mates. */
7241 for (l = 0; l < giv_count; ++l)
7243 int m = stats[l].giv_number;
7244 if (can_combine[m*giv_count + j])
7245 stats[l].total_benefit -= g2->benefit + extra_benefit;
7248 if (loop_dump_stream)
7249 fprintf (loop_dump_stream,
7250 "giv at %d combined with giv at %d\n",
7251 INSN_UID (g2->insn), INSN_UID (g1->insn));
7255 /* To help optimize the next set of combinations, remove
7256 this giv from the benefits of other potential mates. */
7257 if (g1->combined_with)
7259 for (j = 0; j < giv_count; ++j)
7261 int m = stats[j].giv_number;
7262 if (can_combine[m*giv_count + i])
7263 stats[j].total_benefit -= g1->benefit + extra_benefit;
7266 g1->benefit += g1_add_benefit;
7268 /* We've finished with this giv, and everything it touched.
7269 Restart the combination so that proper weights for the
7270 rest of the givs are properly taken into account. */
7271 /* ??? Ideally we would compact the arrays at this point, so
7272 as to not cover old ground. But sanely compacting
7273 can_combine is tricky. */
7283 struct recombine_givs_stats
7286 int start_luid, end_luid;
7289 /* Used below as comparison function for qsort. We want a ascending luid
7290 when scanning the array starting at the end, thus the arguments are
7293 cmp_recombine_givs_stats (xp, yp)
7297 const struct recombine_givs_stats * const x =
7298 (const struct recombine_givs_stats *) xp;
7299 const struct recombine_givs_stats * const y =
7300 (const struct recombine_givs_stats *) yp;
7302 d = y->start_luid - x->start_luid;
7303 /* Stabilize the sort. */
7305 d = y->giv_number - x->giv_number;
7309 /* Scan X, which is a part of INSN, for the end of life of a giv. Also
7310 look for the start of life of a giv where the start has not been seen
7311 yet to unlock the search for the end of its life.
7312 Only consider givs that belong to BIV.
7313 Return the total number of lifetime ends that have been found. */
7315 find_life_end (x, stats, insn, biv)
7317 struct recombine_givs_stats *stats;
7324 code = GET_CODE (x);
7329 rtx reg = SET_DEST (x);
7330 if (GET_CODE (reg) == REG)
7332 int regno = REGNO (reg);
7333 struct induction *v = REG_IV_INFO (regno);
7335 if (REG_IV_TYPE (regno) == GENERAL_INDUCT
7337 && v->src_reg == biv
7338 && stats[v->ix].end_luid <= 0)
7340 /* If we see a 0 here for end_luid, it means that we have
7341 scanned the entire loop without finding any use at all.
7342 We must not predicate this code on a start_luid match
7343 since that would make the test fail for givs that have
7344 been hoisted out of inner loops. */
7345 if (stats[v->ix].end_luid == 0)
7347 stats[v->ix].end_luid = stats[v->ix].start_luid;
7348 return 1 + find_life_end (SET_SRC (x), stats, insn, biv);
7350 else if (stats[v->ix].start_luid == INSN_LUID (insn))
7351 stats[v->ix].end_luid = 0;
7353 return find_life_end (SET_SRC (x), stats, insn, biv);
7359 int regno = REGNO (x);
7360 struct induction *v = REG_IV_INFO (regno);
7362 if (REG_IV_TYPE (regno) == GENERAL_INDUCT
7364 && v->src_reg == biv
7365 && stats[v->ix].end_luid == 0)
7367 while (INSN_UID (insn) >= max_uid_for_loop)
7368 insn = NEXT_INSN (insn);
7369 stats[v->ix].end_luid = INSN_LUID (insn);
7382 fmt = GET_RTX_FORMAT (code);
7384 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
7387 retval += find_life_end (XEXP (x, i), stats, insn, biv);
7389 else if (fmt[i] == 'E')
7390 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
7391 retval += find_life_end (XVECEXP (x, i, j), stats, insn, biv);
7396 /* For each giv that has been combined with another, look if
7397 we can combine it with the most recently used one instead.
7398 This tends to shorten giv lifetimes, and helps the next step:
7399 try to derive givs from other givs. */
7401 recombine_givs (bl, loop_start, loop_end, unroll_p)
7402 struct iv_class *bl;
7403 rtx loop_start, loop_end;
7406 struct induction *v, **giv_array, *last_giv;
7407 struct recombine_givs_stats *stats;
7410 int ends_need_computing;
7412 for (giv_count = 0, v = bl->giv; v; v = v->next_iv)
7418 = (struct induction **) xmalloc (giv_count * sizeof (struct induction *));
7419 stats = (struct recombine_givs_stats *) xmalloc (giv_count * sizeof *stats);
7421 /* Initialize stats and set up the ix field for each giv in stats to name
7422 the corresponding index into stats. */
7423 for (i = 0, v = bl->giv; v; v = v->next_iv)
7430 stats[i].giv_number = i;
7431 /* If this giv has been hoisted out of an inner loop, use the luid of
7432 the previous insn. */
7433 for (p = v->insn; INSN_UID (p) >= max_uid_for_loop; )
7435 stats[i].start_luid = INSN_LUID (p);
7439 qsort (stats, giv_count, sizeof(*stats), cmp_recombine_givs_stats);
7441 /* Set up the ix field for each giv in stats to name
7442 the corresponding index into stats, and
7443 do the actual most-recently-used recombination. */
7444 for (last_giv = 0, i = giv_count - 1; i >= 0; i--)
7446 v = giv_array[stats[i].giv_number];
7450 struct induction *old_same = v->same;
7453 /* combine_givs_p actually says if we can make this transformation.
7454 The other tests are here only to avoid keeping a giv alive
7455 that could otherwise be eliminated. */
7457 && ((old_same->maybe_dead && ! old_same->combined_with)
7458 || ! last_giv->maybe_dead
7459 || last_giv->combined_with)
7460 && (new_combine = combine_givs_p (last_giv, v)))
7462 old_same->combined_with--;
7463 v->new_reg = new_combine;
7465 last_giv->combined_with++;
7466 /* No need to update lifetimes / benefits here since we have
7467 already decided what to reduce. */
7469 if (loop_dump_stream)
7471 fprintf (loop_dump_stream,
7472 "giv at %d recombined with giv at %d as ",
7473 INSN_UID (v->insn), INSN_UID (last_giv->insn));
7474 print_rtl (loop_dump_stream, v->new_reg);
7475 putc ('\n', loop_dump_stream);
7481 else if (v->giv_type != DEST_REG)
7484 || (last_giv->maybe_dead && ! last_giv->combined_with)
7486 || v->combined_with)
7490 ends_need_computing = 0;
7491 /* For each DEST_REG giv, compute lifetime starts, and try to compute
7492 lifetime ends from regscan info. */
7493 for (i = giv_count - 1; i >= 0; i--)
7495 v = giv_array[stats[i].giv_number];
7498 if (v->giv_type == DEST_ADDR)
7500 /* Loop unrolling of an inner loop can even create new DEST_REG
7503 for (p = v->insn; INSN_UID (p) >= max_uid_for_loop; )
7505 stats[i].start_luid = stats[i].end_luid = INSN_LUID (p);
7507 stats[i].end_luid++;
7509 else /* v->giv_type == DEST_REG */
7513 stats[i].start_luid = INSN_LUID (v->insn);
7514 stats[i].end_luid = INSN_LUID (v->last_use);
7516 else if (INSN_UID (v->insn) >= max_uid_for_loop)
7519 /* This insn has been created by loop optimization on an inner
7520 loop. We don't have a proper start_luid that will match
7521 when we see the first set. But we do know that there will
7522 be no use before the set, so we can set end_luid to 0 so that
7523 we'll start looking for the last use right away. */
7524 for (p = PREV_INSN (v->insn); INSN_UID (p) >= max_uid_for_loop; )
7526 stats[i].start_luid = INSN_LUID (p);
7527 stats[i].end_luid = 0;
7528 ends_need_computing++;
7532 int regno = REGNO (v->dest_reg);
7533 int count = VARRAY_INT (n_times_set, regno) - 1;
7536 /* Find the first insn that sets the giv, so that we can verify
7537 if this giv's lifetime wraps around the loop. We also need
7538 the luid of the first setting insn in order to detect the
7539 last use properly. */
7542 p = prev_nonnote_insn (p);
7543 if (reg_set_p (v->dest_reg, p))
7547 stats[i].start_luid = INSN_LUID (p);
7548 if (stats[i].start_luid > uid_luid[REGNO_FIRST_UID (regno)])
7550 stats[i].end_luid = -1;
7551 ends_need_computing++;
7555 stats[i].end_luid = uid_luid[REGNO_LAST_UID (regno)];
7556 if (stats[i].end_luid > INSN_LUID (loop_end))
7558 stats[i].end_luid = -1;
7559 ends_need_computing++;
7566 /* If the regscan information was unconclusive for one or more DEST_REG
7567 givs, scan the all insn in the loop to find out lifetime ends. */
7568 if (ends_need_computing)
7570 rtx biv = bl->biv->src_reg;
7575 if (p == loop_start)
7578 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
7580 ends_need_computing -= find_life_end (PATTERN (p), stats, p, biv);
7582 while (ends_need_computing);
7585 /* Set start_luid back to the last insn that sets the giv. This allows
7586 more combinations. */
7587 for (i = giv_count - 1; i >= 0; i--)
7589 v = giv_array[stats[i].giv_number];
7592 if (INSN_UID (v->insn) < max_uid_for_loop)
7593 stats[i].start_luid = INSN_LUID (v->insn);
7596 /* Now adjust lifetime ends by taking combined givs into account. */
7597 for (i = giv_count - 1; i >= 0; i--)
7602 v = giv_array[stats[i].giv_number];
7605 if (v->same && ! v->same->ignore)
7608 luid = stats[i].start_luid;
7609 /* Use unsigned arithmetic to model loop wrap-around. */
7610 if (luid - stats[j].start_luid
7611 > (unsigned) stats[j].end_luid - stats[j].start_luid)
7612 stats[j].end_luid = luid;
7616 qsort (stats, giv_count, sizeof(*stats), cmp_recombine_givs_stats);
7618 /* Try to derive DEST_REG givs from previous DEST_REG givs with the
7619 same mult_val and non-overlapping lifetime. This reduces register
7621 Once we find a DEST_REG giv that is suitable to derive others from,
7622 we set last_giv to this giv, and try to derive as many other DEST_REG
7623 givs from it without joining overlapping lifetimes. If we then
7624 encounter a DEST_REG giv that we can't derive, we set rescan to the
7625 index for this giv (unless rescan is already set).
7626 When we are finished with the current LAST_GIV (i.e. the inner loop
7627 terminates), we start again with rescan, which then becomes the new
7629 for (i = giv_count - 1; i >= 0; i = rescan)
7631 int life_start, life_end;
7633 for (last_giv = 0, rescan = -1; i >= 0; i--)
7637 v = giv_array[stats[i].giv_number];
7638 if (v->giv_type != DEST_REG || v->derived_from || v->same)
7642 /* Don't use a giv that's likely to be dead to derive
7643 others - that would be likely to keep that giv alive. */
7644 if (! v->maybe_dead || v->combined_with)
7647 life_start = stats[i].start_luid;
7648 life_end = stats[i].end_luid;
7652 /* Use unsigned arithmetic to model loop wrap around. */
7653 if (((unsigned) stats[i].start_luid - life_start
7654 >= (unsigned) life_end - life_start)
7655 && ((unsigned) stats[i].end_luid - life_start
7656 > (unsigned) life_end - life_start)
7657 /* Check that the giv insn we're about to use for deriving
7658 precedes all uses of that giv. Note that initializing the
7659 derived giv would defeat the purpose of reducing register
7661 ??? We could arrange to move the insn. */
7662 && ((unsigned) stats[i].end_luid - INSN_LUID (loop_start)
7663 > (unsigned) stats[i].start_luid - INSN_LUID (loop_start))
7664 && rtx_equal_p (last_giv->mult_val, v->mult_val)
7665 /* ??? Could handle libcalls, but would need more logic. */
7666 && ! find_reg_note (v->insn, REG_RETVAL, NULL_RTX)
7667 /* We would really like to know if for any giv that v
7668 is combined with, v->insn or any intervening biv increment
7669 dominates that combined giv. However, we
7670 don't have this detailed control flow information.
7671 N.B. since last_giv will be reduced, it is valid
7672 anywhere in the loop, so we don't need to check the
7673 validity of last_giv.
7674 We rely here on the fact that v->always_executed implies that
7675 there is no jump to someplace else in the loop before the
7676 giv insn, and hence any insn that is executed before the
7677 giv insn in the loop will have a lower luid. */
7678 && (v->always_executed || ! v->combined_with)
7679 && (sum = express_from (last_giv, v))
7680 /* Make sure we don't make the add more expensive. ADD_COST
7681 doesn't take different costs of registers and constants into
7682 account, so compare the cost of the actual SET_SRCs. */
7683 && (rtx_cost (sum, SET)
7684 <= rtx_cost (SET_SRC (single_set (v->insn)), SET))
7685 /* ??? unroll can't understand anything but reg + const_int
7686 sums. It would be cleaner to fix unroll. */
7687 && ((GET_CODE (sum) == PLUS
7688 && GET_CODE (XEXP (sum, 0)) == REG
7689 && GET_CODE (XEXP (sum, 1)) == CONST_INT)
7691 && validate_change (v->insn, &PATTERN (v->insn),
7692 gen_rtx_SET (VOIDmode, v->dest_reg, sum), 0))
7694 v->derived_from = last_giv;
7695 life_end = stats[i].end_luid;
7697 if (loop_dump_stream)
7699 fprintf (loop_dump_stream,
7700 "giv at %d derived from %d as ",
7701 INSN_UID (v->insn), INSN_UID (last_giv->insn));
7702 print_rtl (loop_dump_stream, sum);
7703 putc ('\n', loop_dump_stream);
7706 else if (rescan < 0)
7716 /* EMIT code before INSERT_BEFORE to set REG = B * M + A. */
7719 emit_iv_add_mult (b, m, a, reg, insert_before)
7720 rtx b; /* initial value of basic induction variable */
7721 rtx m; /* multiplicative constant */
7722 rtx a; /* additive constant */
7723 rtx reg; /* destination register */
7729 /* Prevent unexpected sharing of these rtx. */
7733 /* Increase the lifetime of any invariants moved further in code. */
7734 update_reg_last_use (a, insert_before);
7735 update_reg_last_use (b, insert_before);
7736 update_reg_last_use (m, insert_before);
7739 result = expand_mult_add (b, reg, m, a, GET_MODE (reg), 0);
7741 emit_move_insn (reg, result);
7742 seq = gen_sequence ();
7745 emit_insn_before (seq, insert_before);
7747 /* It is entirely possible that the expansion created lots of new
7748 registers. Iterate over the sequence we just created and
7751 if (GET_CODE (seq) == SEQUENCE)
7754 for (i = 0; i < XVECLEN (seq, 0); ++i)
7756 rtx set = single_set (XVECEXP (seq, 0, i));
7757 if (set && GET_CODE (SET_DEST (set)) == REG)
7758 record_base_value (REGNO (SET_DEST (set)), SET_SRC (set), 0);
7761 else if (GET_CODE (seq) == SET
7762 && GET_CODE (SET_DEST (seq)) == REG)
7763 record_base_value (REGNO (SET_DEST (seq)), SET_SRC (seq), 0);
7766 /* Test whether A * B can be computed without
7767 an actual multiply insn. Value is 1 if so. */
7770 product_cheap_p (a, b)
7776 struct obstack *old_rtl_obstack = rtl_obstack;
7777 char *storage = (char *) obstack_alloc (&temp_obstack, 0);
7780 /* If only one is constant, make it B. */
7781 if (GET_CODE (a) == CONST_INT)
7782 tmp = a, a = b, b = tmp;
7784 /* If first constant, both constant, so don't need multiply. */
7785 if (GET_CODE (a) == CONST_INT)
7788 /* If second not constant, neither is constant, so would need multiply. */
7789 if (GET_CODE (b) != CONST_INT)
7792 /* One operand is constant, so might not need multiply insn. Generate the
7793 code for the multiply and see if a call or multiply, or long sequence
7794 of insns is generated. */
7796 rtl_obstack = &temp_obstack;
7798 expand_mult (GET_MODE (a), a, b, NULL_RTX, 0);
7799 tmp = gen_sequence ();
7802 if (GET_CODE (tmp) == SEQUENCE)
7804 if (XVEC (tmp, 0) == 0)
7806 else if (XVECLEN (tmp, 0) > 3)
7809 for (i = 0; i < XVECLEN (tmp, 0); i++)
7811 rtx insn = XVECEXP (tmp, 0, i);
7813 if (GET_CODE (insn) != INSN
7814 || (GET_CODE (PATTERN (insn)) == SET
7815 && GET_CODE (SET_SRC (PATTERN (insn))) == MULT)
7816 || (GET_CODE (PATTERN (insn)) == PARALLEL
7817 && GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == SET
7818 && GET_CODE (SET_SRC (XVECEXP (PATTERN (insn), 0, 0))) == MULT))
7825 else if (GET_CODE (tmp) == SET
7826 && GET_CODE (SET_SRC (tmp)) == MULT)
7828 else if (GET_CODE (tmp) == PARALLEL
7829 && GET_CODE (XVECEXP (tmp, 0, 0)) == SET
7830 && GET_CODE (SET_SRC (XVECEXP (tmp, 0, 0))) == MULT)
7833 /* Free any storage we obtained in generating this multiply and restore rtl
7834 allocation to its normal obstack. */
7835 obstack_free (&temp_obstack, storage);
7836 rtl_obstack = old_rtl_obstack;
7841 /* Check to see if loop can be terminated by a "decrement and branch until
7842 zero" instruction. If so, add a REG_NONNEG note to the branch insn if so.
7843 Also try reversing an increment loop to a decrement loop
7844 to see if the optimization can be performed.
7845 Value is nonzero if optimization was performed. */
7847 /* This is useful even if the architecture doesn't have such an insn,
7848 because it might change a loops which increments from 0 to n to a loop
7849 which decrements from n to 0. A loop that decrements to zero is usually
7850 faster than one that increments from zero. */
7852 /* ??? This could be rewritten to use some of the loop unrolling procedures,
7853 such as approx_final_value, biv_total_increment, loop_iterations, and
7854 final_[bg]iv_value. */
7857 check_dbra_loop (loop_end, insn_count, loop_start, loop_info)
7861 struct loop_info *loop_info;
7863 struct iv_class *bl;
7870 rtx before_comparison;
7874 int compare_and_branch;
7876 /* If last insn is a conditional branch, and the insn before tests a
7877 register value, try to optimize it. Otherwise, we can't do anything. */
7879 jump = PREV_INSN (loop_end);
7880 comparison = get_condition_for_loop (jump);
7881 if (comparison == 0)
7884 /* Try to compute whether the compare/branch at the loop end is one or
7885 two instructions. */
7886 get_condition (jump, &first_compare);
7887 if (first_compare == jump)
7888 compare_and_branch = 1;
7889 else if (first_compare == prev_nonnote_insn (jump))
7890 compare_and_branch = 2;
7894 /* Check all of the bivs to see if the compare uses one of them.
7895 Skip biv's set more than once because we can't guarantee that
7896 it will be zero on the last iteration. Also skip if the biv is
7897 used between its update and the test insn. */
7899 for (bl = loop_iv_list; bl; bl = bl->next)
7901 if (bl->biv_count == 1
7902 && bl->biv->dest_reg == XEXP (comparison, 0)
7903 && ! reg_used_between_p (regno_reg_rtx[bl->regno], bl->biv->insn,
7911 /* Look for the case where the basic induction variable is always
7912 nonnegative, and equals zero on the last iteration.
7913 In this case, add a reg_note REG_NONNEG, which allows the
7914 m68k DBRA instruction to be used. */
7916 if (((GET_CODE (comparison) == GT
7917 && GET_CODE (XEXP (comparison, 1)) == CONST_INT
7918 && INTVAL (XEXP (comparison, 1)) == -1)
7919 || (GET_CODE (comparison) == NE && XEXP (comparison, 1) == const0_rtx))
7920 && GET_CODE (bl->biv->add_val) == CONST_INT
7921 && INTVAL (bl->biv->add_val) < 0)
7923 /* Initial value must be greater than 0,
7924 init_val % -dec_value == 0 to ensure that it equals zero on
7925 the last iteration */
7927 if (GET_CODE (bl->initial_value) == CONST_INT
7928 && INTVAL (bl->initial_value) > 0
7929 && (INTVAL (bl->initial_value)
7930 % (-INTVAL (bl->biv->add_val))) == 0)
7932 /* register always nonnegative, add REG_NOTE to branch */
7933 REG_NOTES (PREV_INSN (loop_end))
7934 = gen_rtx_EXPR_LIST (REG_NONNEG, NULL_RTX,
7935 REG_NOTES (PREV_INSN (loop_end)));
7941 /* If the decrement is 1 and the value was tested as >= 0 before
7942 the loop, then we can safely optimize. */
7943 for (p = loop_start; p; p = PREV_INSN (p))
7945 if (GET_CODE (p) == CODE_LABEL)
7947 if (GET_CODE (p) != JUMP_INSN)
7950 before_comparison = get_condition_for_loop (p);
7951 if (before_comparison
7952 && XEXP (before_comparison, 0) == bl->biv->dest_reg
7953 && GET_CODE (before_comparison) == LT
7954 && XEXP (before_comparison, 1) == const0_rtx
7955 && ! reg_set_between_p (bl->biv->dest_reg, p, loop_start)
7956 && INTVAL (bl->biv->add_val) == -1)
7958 REG_NOTES (PREV_INSN (loop_end))
7959 = gen_rtx_EXPR_LIST (REG_NONNEG, NULL_RTX,
7960 REG_NOTES (PREV_INSN (loop_end)));
7967 else if (GET_CODE (bl->biv->add_val) == CONST_INT
7968 && INTVAL (bl->biv->add_val) > 0)
7970 /* Try to change inc to dec, so can apply above optimization. */
7972 all registers modified are induction variables or invariant,
7973 all memory references have non-overlapping addresses
7974 (obviously true if only one write)
7975 allow 2 insns for the compare/jump at the end of the loop. */
7976 /* Also, we must avoid any instructions which use both the reversed
7977 biv and another biv. Such instructions will fail if the loop is
7978 reversed. We meet this condition by requiring that either
7979 no_use_except_counting is true, or else that there is only
7981 int num_nonfixed_reads = 0;
7982 /* 1 if the iteration var is used only to count iterations. */
7983 int no_use_except_counting = 0;
7984 /* 1 if the loop has no memory store, or it has a single memory store
7985 which is reversible. */
7986 int reversible_mem_store = 1;
7988 if (bl->giv_count == 0
7989 && ! loop_number_exit_count[uid_loop_num[INSN_UID (loop_start)]])
7991 rtx bivreg = regno_reg_rtx[bl->regno];
7993 /* If there are no givs for this biv, and the only exit is the
7994 fall through at the end of the loop, then
7995 see if perhaps there are no uses except to count. */
7996 no_use_except_counting = 1;
7997 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
7998 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
8000 rtx set = single_set (p);
8002 if (set && GET_CODE (SET_DEST (set)) == REG
8003 && REGNO (SET_DEST (set)) == bl->regno)
8004 /* An insn that sets the biv is okay. */
8006 else if ((p == prev_nonnote_insn (prev_nonnote_insn (loop_end))
8007 || p == prev_nonnote_insn (loop_end))
8008 && reg_mentioned_p (bivreg, PATTERN (p)))
8010 /* If either of these insns uses the biv and sets a pseudo
8011 that has more than one usage, then the biv has uses
8012 other than counting since it's used to derive a value
8013 that is used more than one time. */
8014 int note_set_pseudo_multiple_uses_retval = 0;
8015 note_stores (PATTERN (p), note_set_pseudo_multiple_uses,
8016 ¬e_set_pseudo_multiple_uses_retval);
8017 if (note_set_pseudo_multiple_uses_retval)
8019 no_use_except_counting = 0;
8023 else if (reg_mentioned_p (bivreg, PATTERN (p)))
8025 no_use_except_counting = 0;
8031 if (no_use_except_counting)
8032 ; /* no need to worry about MEMs. */
8033 else if (num_mem_sets <= 1)
8035 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
8036 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
8037 num_nonfixed_reads += count_nonfixed_reads (PATTERN (p));
8039 /* If the loop has a single store, and the destination address is
8040 invariant, then we can't reverse the loop, because this address
8041 might then have the wrong value at loop exit.
8042 This would work if the source was invariant also, however, in that
8043 case, the insn should have been moved out of the loop. */
8045 if (num_mem_sets == 1)
8047 struct induction *v;
8049 reversible_mem_store
8050 = (! unknown_address_altered
8051 && ! unknown_constant_address_altered
8052 && ! invariant_p (XEXP (XEXP (loop_store_mems, 0), 0)));
8054 /* If the store depends on a register that is set after the
8055 store, it depends on the initial value, and is thus not
8057 for (v = bl->giv; reversible_mem_store && v; v = v->next_iv)
8059 if (v->giv_type == DEST_REG
8060 && reg_mentioned_p (v->dest_reg,
8061 XEXP (loop_store_mems, 0))
8062 && loop_insn_first_p (first_loop_store_insn, v->insn))
8063 reversible_mem_store = 0;
8070 /* This code only acts for innermost loops. Also it simplifies
8071 the memory address check by only reversing loops with
8072 zero or one memory access.
8073 Two memory accesses could involve parts of the same array,
8074 and that can't be reversed.
8075 If the biv is used only for counting, than we don't need to worry
8076 about all these things. */
8078 if ((num_nonfixed_reads <= 1
8079 && ! loop_info->has_call
8080 && ! loop_info->has_volatile
8081 && reversible_mem_store
8082 && (bl->giv_count + bl->biv_count + num_mem_sets
8083 + num_movables + compare_and_branch == insn_count)
8084 && (bl == loop_iv_list && bl->next == 0))
8085 || no_use_except_counting)
8089 /* Loop can be reversed. */
8090 if (loop_dump_stream)
8091 fprintf (loop_dump_stream, "Can reverse loop\n");
8093 /* Now check other conditions:
8095 The increment must be a constant, as must the initial value,
8096 and the comparison code must be LT.
8098 This test can probably be improved since +/- 1 in the constant
8099 can be obtained by changing LT to LE and vice versa; this is
8103 /* for constants, LE gets turned into LT */
8104 && (GET_CODE (comparison) == LT
8105 || (GET_CODE (comparison) == LE
8106 && no_use_except_counting)))
8108 HOST_WIDE_INT add_val, add_adjust, comparison_val = 0;
8109 rtx initial_value, comparison_value;
8111 enum rtx_code cmp_code;
8112 int comparison_const_width;
8113 unsigned HOST_WIDE_INT comparison_sign_mask;
8115 add_val = INTVAL (bl->biv->add_val);
8116 comparison_value = XEXP (comparison, 1);
8117 if (GET_MODE (comparison_value) == VOIDmode)
8118 comparison_const_width
8119 = GET_MODE_BITSIZE (GET_MODE (XEXP (comparison, 0)));
8121 comparison_const_width
8122 = GET_MODE_BITSIZE (GET_MODE (comparison_value));
8123 if (comparison_const_width > HOST_BITS_PER_WIDE_INT)
8124 comparison_const_width = HOST_BITS_PER_WIDE_INT;
8125 comparison_sign_mask
8126 = (unsigned HOST_WIDE_INT)1 << (comparison_const_width - 1);
8128 /* If the comparison value is not a loop invariant, then we
8129 can not reverse this loop.
8131 ??? If the insns which initialize the comparison value as
8132 a whole compute an invariant result, then we could move
8133 them out of the loop and proceed with loop reversal. */
8134 if (!invariant_p (comparison_value))
8137 if (GET_CODE (comparison_value) == CONST_INT)
8138 comparison_val = INTVAL (comparison_value);
8139 initial_value = bl->initial_value;
8141 /* Normalize the initial value if it is an integer and
8142 has no other use except as a counter. This will allow
8143 a few more loops to be reversed. */
8144 if (no_use_except_counting
8145 && GET_CODE (comparison_value) == CONST_INT
8146 && GET_CODE (initial_value) == CONST_INT)
8148 comparison_val = comparison_val - INTVAL (bl->initial_value);
8149 /* The code below requires comparison_val to be a multiple
8150 of add_val in order to do the loop reversal, so
8151 round up comparison_val to a multiple of add_val.
8152 Since comparison_value is constant, we know that the
8153 current comparison code is LT. */
8154 comparison_val = comparison_val + add_val - 1;
8156 -= (unsigned HOST_WIDE_INT) comparison_val % add_val;
8157 /* We postpone overflow checks for COMPARISON_VAL here;
8158 even if there is an overflow, we might still be able to
8159 reverse the loop, if converting the loop exit test to
8161 initial_value = const0_rtx;
8164 /* First check if we can do a vanilla loop reversal. */
8165 if (initial_value == const0_rtx
8166 /* If we have a decrement_and_branch_on_count,
8167 prefer the NE test, since this will allow that
8168 instruction to be generated. Note that we must
8169 use a vanilla loop reversal if the biv is used to
8170 calculate a giv or has a non-counting use. */
8171 #if ! defined (HAVE_decrement_and_branch_until_zero) \
8172 && defined (HAVE_decrement_and_branch_on_count)
8173 && (! (add_val == 1 && loop_info->vtop
8174 && (bl->biv_count == 0
8175 || no_use_except_counting)))
8177 && GET_CODE (comparison_value) == CONST_INT
8178 /* Now do postponed overflow checks on COMPARISON_VAL. */
8179 && ! (((comparison_val - add_val) ^ INTVAL (comparison_value))
8180 & comparison_sign_mask))
8182 /* Register will always be nonnegative, with value
8183 0 on last iteration */
8184 add_adjust = add_val;
8188 else if (add_val == 1 && loop_info->vtop
8189 && (bl->biv_count == 0
8190 || no_use_except_counting))
8198 if (GET_CODE (comparison) == LE)
8199 add_adjust -= add_val;
8201 /* If the initial value is not zero, or if the comparison
8202 value is not an exact multiple of the increment, then we
8203 can not reverse this loop. */
8204 if (initial_value == const0_rtx
8205 && GET_CODE (comparison_value) == CONST_INT)
8207 if (((unsigned HOST_WIDE_INT) comparison_val % add_val) != 0)
8212 if (! no_use_except_counting || add_val != 1)
8216 final_value = comparison_value;
8218 /* Reset these in case we normalized the initial value
8219 and comparison value above. */
8220 if (GET_CODE (comparison_value) == CONST_INT
8221 && GET_CODE (initial_value) == CONST_INT)
8223 comparison_value = GEN_INT (comparison_val);
8225 = GEN_INT (comparison_val + INTVAL (bl->initial_value));
8227 bl->initial_value = initial_value;
8229 /* Save some info needed to produce the new insns. */
8230 reg = bl->biv->dest_reg;
8231 jump_label = XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end))), 1);
8232 if (jump_label == pc_rtx)
8233 jump_label = XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end))), 2);
8234 new_add_val = GEN_INT (- INTVAL (bl->biv->add_val));
8236 /* Set start_value; if this is not a CONST_INT, we need
8238 Initialize biv to start_value before loop start.
8239 The old initializing insn will be deleted as a
8240 dead store by flow.c. */
8241 if (initial_value == const0_rtx
8242 && GET_CODE (comparison_value) == CONST_INT)
8244 start_value = GEN_INT (comparison_val - add_adjust);
8245 emit_insn_before (gen_move_insn (reg, start_value),
8248 else if (GET_CODE (initial_value) == CONST_INT)
8250 rtx offset = GEN_INT (-INTVAL (initial_value) - add_adjust);
8251 enum machine_mode mode = GET_MODE (reg);
8252 enum insn_code icode
8253 = add_optab->handlers[(int) mode].insn_code;
8255 if (! (*insn_data[icode].operand[0].predicate) (reg, mode)
8256 || ! ((*insn_data[icode].operand[1].predicate)
8257 (comparison_value, mode))
8258 || ! ((*insn_data[icode].operand[2].predicate)
8262 = gen_rtx_PLUS (mode, comparison_value, offset);
8263 emit_insn_before ((GEN_FCN (icode)
8264 (reg, comparison_value, offset)),
8266 if (GET_CODE (comparison) == LE)
8267 final_value = gen_rtx_PLUS (mode, comparison_value,
8270 else if (! add_adjust)
8272 enum machine_mode mode = GET_MODE (reg);
8273 enum insn_code icode
8274 = sub_optab->handlers[(int) mode].insn_code;
8275 if (! (*insn_data[icode].operand[0].predicate) (reg, mode)
8276 || ! ((*insn_data[icode].operand[1].predicate)
8277 (comparison_value, mode))
8278 || ! ((*insn_data[icode].operand[2].predicate)
8279 (initial_value, mode)))
8282 = gen_rtx_MINUS (mode, comparison_value, initial_value);
8283 emit_insn_before ((GEN_FCN (icode)
8284 (reg, comparison_value, initial_value)),
8288 /* We could handle the other cases too, but it'll be
8289 better to have a testcase first. */
8292 /* We may not have a single insn which can increment a reg, so
8293 create a sequence to hold all the insns from expand_inc. */
8295 expand_inc (reg, new_add_val);
8296 tem = gen_sequence ();
8299 p = emit_insn_before (tem, bl->biv->insn);
8300 delete_insn (bl->biv->insn);
8302 /* Update biv info to reflect its new status. */
8304 bl->initial_value = start_value;
8305 bl->biv->add_val = new_add_val;
8307 /* Update loop info. */
8308 loop_info->initial_value = reg;
8309 loop_info->initial_equiv_value = reg;
8310 loop_info->final_value = const0_rtx;
8311 loop_info->final_equiv_value = const0_rtx;
8312 loop_info->comparison_value = const0_rtx;
8313 loop_info->comparison_code = cmp_code;
8314 loop_info->increment = new_add_val;
8316 /* Inc LABEL_NUSES so that delete_insn will
8317 not delete the label. */
8318 LABEL_NUSES (XEXP (jump_label, 0)) ++;
8320 /* Emit an insn after the end of the loop to set the biv's
8321 proper exit value if it is used anywhere outside the loop. */
8322 if ((REGNO_LAST_UID (bl->regno) != INSN_UID (first_compare))
8324 || REGNO_FIRST_UID (bl->regno) != INSN_UID (bl->init_insn))
8325 emit_insn_after (gen_move_insn (reg, final_value),
8328 /* Delete compare/branch at end of loop. */
8329 delete_insn (PREV_INSN (loop_end));
8330 if (compare_and_branch == 2)
8331 delete_insn (first_compare);
8333 /* Add new compare/branch insn at end of loop. */
8335 emit_cmp_and_jump_insns (reg, const0_rtx, cmp_code, NULL_RTX,
8336 GET_MODE (reg), 0, 0,
8337 XEXP (jump_label, 0));
8338 tem = gen_sequence ();
8340 emit_jump_insn_before (tem, loop_end);
8342 for (tem = PREV_INSN (loop_end);
8343 tem && GET_CODE (tem) != JUMP_INSN;
8344 tem = PREV_INSN (tem))
8348 JUMP_LABEL (tem) = XEXP (jump_label, 0);
8354 /* Increment of LABEL_NUSES done above. */
8355 /* Register is now always nonnegative,
8356 so add REG_NONNEG note to the branch. */
8357 REG_NOTES (tem) = gen_rtx_EXPR_LIST (REG_NONNEG, NULL_RTX,
8363 /* No insn may reference both the reversed and another biv or it
8364 will fail (see comment near the top of the loop reversal
8366 Earlier on, we have verified that the biv has no use except
8367 counting, or it is the only biv in this function.
8368 However, the code that computes no_use_except_counting does
8369 not verify reg notes. It's possible to have an insn that
8370 references another biv, and has a REG_EQUAL note with an
8371 expression based on the reversed biv. To avoid this case,
8372 remove all REG_EQUAL notes based on the reversed biv
8374 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
8375 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
8378 rtx set = single_set (p);
8379 /* If this is a set of a GIV based on the reversed biv, any
8380 REG_EQUAL notes should still be correct. */
8382 || GET_CODE (SET_DEST (set)) != REG
8383 || (size_t) REGNO (SET_DEST (set)) >= reg_iv_type->num_elements
8384 || REG_IV_TYPE (REGNO (SET_DEST (set))) != GENERAL_INDUCT
8385 || REG_IV_INFO (REGNO (SET_DEST (set)))->src_reg != bl->biv->src_reg)
8386 for (pnote = ®_NOTES (p); *pnote;)
8388 if (REG_NOTE_KIND (*pnote) == REG_EQUAL
8389 && reg_mentioned_p (regno_reg_rtx[bl->regno],
8391 *pnote = XEXP (*pnote, 1);
8393 pnote = &XEXP (*pnote, 1);
8397 /* Mark that this biv has been reversed. Each giv which depends
8398 on this biv, and which is also live past the end of the loop
8399 will have to be fixed up. */
8403 if (loop_dump_stream)
8405 fprintf (loop_dump_stream, "Reversed loop");
8407 fprintf (loop_dump_stream, " and added reg_nonneg\n");
8409 fprintf (loop_dump_stream, "\n");
8420 /* Verify whether the biv BL appears to be eliminable,
8421 based on the insns in the loop that refer to it.
8422 LOOP_START is the first insn of the loop, and END is the end insn.
8424 If ELIMINATE_P is non-zero, actually do the elimination.
8426 THRESHOLD and INSN_COUNT are from loop_optimize and are used to
8427 determine whether invariant insns should be placed inside or at the
8428 start of the loop. */
8431 maybe_eliminate_biv (bl, loop_start, end, eliminate_p, threshold, insn_count)
8432 struct iv_class *bl;
8436 int threshold, insn_count;
8438 rtx reg = bl->biv->dest_reg;
8441 /* Scan all insns in the loop, stopping if we find one that uses the
8442 biv in a way that we cannot eliminate. */
8444 for (p = loop_start; p != end; p = NEXT_INSN (p))
8446 enum rtx_code code = GET_CODE (p);
8447 rtx where = threshold >= insn_count ? loop_start : p;
8449 /* If this is a libcall that sets a giv, skip ahead to its end. */
8450 if (GET_RTX_CLASS (code) == 'i')
8452 rtx note = find_reg_note (p, REG_LIBCALL, NULL_RTX);
8456 rtx last = XEXP (note, 0);
8457 rtx set = single_set (last);
8459 if (set && GET_CODE (SET_DEST (set)) == REG)
8461 int regno = REGNO (SET_DEST (set));
8463 if (regno < max_reg_before_loop
8464 && REG_IV_TYPE (regno) == GENERAL_INDUCT
8465 && REG_IV_INFO (regno)->src_reg == bl->biv->src_reg)
8470 if ((code == INSN || code == JUMP_INSN || code == CALL_INSN)
8471 && reg_mentioned_p (reg, PATTERN (p))
8472 && ! maybe_eliminate_biv_1 (PATTERN (p), p, bl, eliminate_p, where))
8474 if (loop_dump_stream)
8475 fprintf (loop_dump_stream,
8476 "Cannot eliminate biv %d: biv used in insn %d.\n",
8477 bl->regno, INSN_UID (p));
8484 if (loop_dump_stream)
8485 fprintf (loop_dump_stream, "biv %d %s eliminated.\n",
8486 bl->regno, eliminate_p ? "was" : "can be");
8493 /* INSN and REFERENCE are instructions in the same insn chain.
8494 Return non-zero if INSN is first. */
8497 loop_insn_first_p (insn, reference)
8498 rtx insn, reference;
8502 for (p = insn, q = reference; ;)
8504 /* Start with test for not first so that INSN == REFERENCE yields not
8506 if (q == insn || ! p)
8508 if (p == reference || ! q)
8511 /* Either of P or Q might be a NOTE. Notes have the same LUID as the
8512 previous insn, hence the <= comparison below does not work if
8514 if (INSN_UID (p) < max_uid_for_loop
8515 && INSN_UID (q) < max_uid_for_loop
8516 && GET_CODE (p) != NOTE)
8517 return INSN_LUID (p) <= INSN_LUID (q);
8519 if (INSN_UID (p) >= max_uid_for_loop
8520 || GET_CODE (p) == NOTE)
8522 if (INSN_UID (q) >= max_uid_for_loop)
8527 /* We are trying to eliminate BIV in INSN using GIV. Return non-zero if
8528 the offset that we have to take into account due to auto-increment /
8529 div derivation is zero. */
8531 biv_elimination_giv_has_0_offset (biv, giv, insn)
8532 struct induction *biv, *giv;
8535 /* If the giv V had the auto-inc address optimization applied
8536 to it, and INSN occurs between the giv insn and the biv
8537 insn, then we'd have to adjust the value used here.
8538 This is rare, so we don't bother to make this possible. */
8539 if (giv->auto_inc_opt
8540 && ((loop_insn_first_p (giv->insn, insn)
8541 && loop_insn_first_p (insn, biv->insn))
8542 || (loop_insn_first_p (biv->insn, insn)
8543 && loop_insn_first_p (insn, giv->insn))))
8546 /* If the giv V was derived from another giv, and INSN does
8547 not occur between the giv insn and the biv insn, then we'd
8548 have to adjust the value used here. This is rare, so we don't
8549 bother to make this possible. */
8550 if (giv->derived_from
8551 && ! (giv->always_executed
8552 && loop_insn_first_p (giv->insn, insn)
8553 && loop_insn_first_p (insn, biv->insn)))
8556 && giv->same->derived_from
8557 && ! (giv->same->always_executed
8558 && loop_insn_first_p (giv->same->insn, insn)
8559 && loop_insn_first_p (insn, biv->insn)))
8565 /* If BL appears in X (part of the pattern of INSN), see if we can
8566 eliminate its use. If so, return 1. If not, return 0.
8568 If BIV does not appear in X, return 1.
8570 If ELIMINATE_P is non-zero, actually do the elimination. WHERE indicates
8571 where extra insns should be added. Depending on how many items have been
8572 moved out of the loop, it will either be before INSN or at the start of
8576 maybe_eliminate_biv_1 (x, insn, bl, eliminate_p, where)
8578 struct iv_class *bl;
8582 enum rtx_code code = GET_CODE (x);
8583 rtx reg = bl->biv->dest_reg;
8584 enum machine_mode mode = GET_MODE (reg);
8585 struct induction *v;
8597 /* If we haven't already been able to do something with this BIV,
8598 we can't eliminate it. */
8604 /* If this sets the BIV, it is not a problem. */
8605 if (SET_DEST (x) == reg)
8608 /* If this is an insn that defines a giv, it is also ok because
8609 it will go away when the giv is reduced. */
8610 for (v = bl->giv; v; v = v->next_iv)
8611 if (v->giv_type == DEST_REG && SET_DEST (x) == v->dest_reg)
8615 if (SET_DEST (x) == cc0_rtx && SET_SRC (x) == reg)
8617 /* Can replace with any giv that was reduced and
8618 that has (MULT_VAL != 0) and (ADD_VAL == 0).
8619 Require a constant for MULT_VAL, so we know it's nonzero.
8620 ??? We disable this optimization to avoid potential
8623 for (v = bl->giv; v; v = v->next_iv)
8624 if (CONSTANT_P (v->mult_val) && v->mult_val != const0_rtx
8625 && v->add_val == const0_rtx
8626 && ! v->ignore && ! v->maybe_dead && v->always_computable
8630 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8636 /* If the giv has the opposite direction of change,
8637 then reverse the comparison. */
8638 if (INTVAL (v->mult_val) < 0)
8639 new = gen_rtx_COMPARE (GET_MODE (v->new_reg),
8640 const0_rtx, v->new_reg);
8644 /* We can probably test that giv's reduced reg. */
8645 if (validate_change (insn, &SET_SRC (x), new, 0))
8649 /* Look for a giv with (MULT_VAL != 0) and (ADD_VAL != 0);
8650 replace test insn with a compare insn (cmp REDUCED_GIV ADD_VAL).
8651 Require a constant for MULT_VAL, so we know it's nonzero.
8652 ??? Do this only if ADD_VAL is a pointer to avoid a potential
8653 overflow problem. */
8655 for (v = bl->giv; v; v = v->next_iv)
8656 if (CONSTANT_P (v->mult_val) && v->mult_val != const0_rtx
8657 && ! v->ignore && ! v->maybe_dead && v->always_computable
8659 && (GET_CODE (v->add_val) == SYMBOL_REF
8660 || GET_CODE (v->add_val) == LABEL_REF
8661 || GET_CODE (v->add_val) == CONST
8662 || (GET_CODE (v->add_val) == REG
8663 && REGNO_POINTER_FLAG (REGNO (v->add_val)))))
8665 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8671 /* If the giv has the opposite direction of change,
8672 then reverse the comparison. */
8673 if (INTVAL (v->mult_val) < 0)
8674 new = gen_rtx_COMPARE (VOIDmode, copy_rtx (v->add_val),
8677 new = gen_rtx_COMPARE (VOIDmode, v->new_reg,
8678 copy_rtx (v->add_val));
8680 /* Replace biv with the giv's reduced register. */
8681 update_reg_last_use (v->add_val, insn);
8682 if (validate_change (insn, &SET_SRC (PATTERN (insn)), new, 0))
8685 /* Insn doesn't support that constant or invariant. Copy it
8686 into a register (it will be a loop invariant.) */
8687 tem = gen_reg_rtx (GET_MODE (v->new_reg));
8689 emit_insn_before (gen_move_insn (tem, copy_rtx (v->add_val)),
8692 /* Substitute the new register for its invariant value in
8693 the compare expression. */
8694 XEXP (new, (INTVAL (v->mult_val) < 0) ? 0 : 1) = tem;
8695 if (validate_change (insn, &SET_SRC (PATTERN (insn)), new, 0))
8704 case GT: case GE: case GTU: case GEU:
8705 case LT: case LE: case LTU: case LEU:
8706 /* See if either argument is the biv. */
8707 if (XEXP (x, 0) == reg)
8708 arg = XEXP (x, 1), arg_operand = 1;
8709 else if (XEXP (x, 1) == reg)
8710 arg = XEXP (x, 0), arg_operand = 0;
8714 if (CONSTANT_P (arg))
8716 /* First try to replace with any giv that has constant positive
8717 mult_val and constant add_val. We might be able to support
8718 negative mult_val, but it seems complex to do it in general. */
8720 for (v = bl->giv; v; v = v->next_iv)
8721 if (CONSTANT_P (v->mult_val) && INTVAL (v->mult_val) > 0
8722 && (GET_CODE (v->add_val) == SYMBOL_REF
8723 || GET_CODE (v->add_val) == LABEL_REF
8724 || GET_CODE (v->add_val) == CONST
8725 || (GET_CODE (v->add_val) == REG
8726 && REGNO_POINTER_FLAG (REGNO (v->add_val))))
8727 && ! v->ignore && ! v->maybe_dead && v->always_computable
8730 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8736 /* Replace biv with the giv's reduced reg. */
8737 XEXP (x, 1-arg_operand) = v->new_reg;
8739 /* If all constants are actually constant integers and
8740 the derived constant can be directly placed in the COMPARE,
8742 if (GET_CODE (arg) == CONST_INT
8743 && GET_CODE (v->mult_val) == CONST_INT
8744 && GET_CODE (v->add_val) == CONST_INT
8745 && validate_change (insn, &XEXP (x, arg_operand),
8746 GEN_INT (INTVAL (arg)
8747 * INTVAL (v->mult_val)
8748 + INTVAL (v->add_val)), 0))
8751 /* Otherwise, load it into a register. */
8752 tem = gen_reg_rtx (mode);
8753 emit_iv_add_mult (arg, v->mult_val, v->add_val, tem, where);
8754 if (validate_change (insn, &XEXP (x, arg_operand), tem, 0))
8757 /* If that failed, put back the change we made above. */
8758 XEXP (x, 1-arg_operand) = reg;
8761 /* Look for giv with positive constant mult_val and nonconst add_val.
8762 Insert insns to calculate new compare value.
8763 ??? Turn this off due to possible overflow. */
8765 for (v = bl->giv; v; v = v->next_iv)
8766 if (CONSTANT_P (v->mult_val) && INTVAL (v->mult_val) > 0
8767 && ! v->ignore && ! v->maybe_dead && v->always_computable
8773 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8779 tem = gen_reg_rtx (mode);
8781 /* Replace biv with giv's reduced register. */
8782 validate_change (insn, &XEXP (x, 1 - arg_operand),
8785 /* Compute value to compare against. */
8786 emit_iv_add_mult (arg, v->mult_val, v->add_val, tem, where);
8787 /* Use it in this insn. */
8788 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
8789 if (apply_change_group ())
8793 else if (GET_CODE (arg) == REG || GET_CODE (arg) == MEM)
8795 if (invariant_p (arg) == 1)
8797 /* Look for giv with constant positive mult_val and nonconst
8798 add_val. Insert insns to compute new compare value.
8799 ??? Turn this off due to possible overflow. */
8801 for (v = bl->giv; v; v = v->next_iv)
8802 if (CONSTANT_P (v->mult_val) && INTVAL (v->mult_val) > 0
8803 && ! v->ignore && ! v->maybe_dead && v->always_computable
8809 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8815 tem = gen_reg_rtx (mode);
8817 /* Replace biv with giv's reduced register. */
8818 validate_change (insn, &XEXP (x, 1 - arg_operand),
8821 /* Compute value to compare against. */
8822 emit_iv_add_mult (arg, v->mult_val, v->add_val,
8824 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
8825 if (apply_change_group ())
8830 /* This code has problems. Basically, you can't know when
8831 seeing if we will eliminate BL, whether a particular giv
8832 of ARG will be reduced. If it isn't going to be reduced,
8833 we can't eliminate BL. We can try forcing it to be reduced,
8834 but that can generate poor code.
8836 The problem is that the benefit of reducing TV, below should
8837 be increased if BL can actually be eliminated, but this means
8838 we might have to do a topological sort of the order in which
8839 we try to process biv. It doesn't seem worthwhile to do
8840 this sort of thing now. */
8843 /* Otherwise the reg compared with had better be a biv. */
8844 if (GET_CODE (arg) != REG
8845 || REG_IV_TYPE (REGNO (arg)) != BASIC_INDUCT)
8848 /* Look for a pair of givs, one for each biv,
8849 with identical coefficients. */
8850 for (v = bl->giv; v; v = v->next_iv)
8852 struct induction *tv;
8854 if (v->ignore || v->maybe_dead || v->mode != mode)
8857 for (tv = reg_biv_class[REGNO (arg)]->giv; tv; tv = tv->next_iv)
8858 if (! tv->ignore && ! tv->maybe_dead
8859 && rtx_equal_p (tv->mult_val, v->mult_val)
8860 && rtx_equal_p (tv->add_val, v->add_val)
8861 && tv->mode == mode)
8863 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8869 /* Replace biv with its giv's reduced reg. */
8870 XEXP (x, 1-arg_operand) = v->new_reg;
8871 /* Replace other operand with the other giv's
8873 XEXP (x, arg_operand) = tv->new_reg;
8880 /* If we get here, the biv can't be eliminated. */
8884 /* If this address is a DEST_ADDR giv, it doesn't matter if the
8885 biv is used in it, since it will be replaced. */
8886 for (v = bl->giv; v; v = v->next_iv)
8887 if (v->giv_type == DEST_ADDR && v->location == &XEXP (x, 0))
8895 /* See if any subexpression fails elimination. */
8896 fmt = GET_RTX_FORMAT (code);
8897 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
8902 if (! maybe_eliminate_biv_1 (XEXP (x, i), insn, bl,
8903 eliminate_p, where))
8908 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
8909 if (! maybe_eliminate_biv_1 (XVECEXP (x, i, j), insn, bl,
8910 eliminate_p, where))
8919 /* Return nonzero if the last use of REG
8920 is in an insn following INSN in the same basic block. */
8923 last_use_this_basic_block (reg, insn)
8929 n && GET_CODE (n) != CODE_LABEL && GET_CODE (n) != JUMP_INSN;
8932 if (REGNO_LAST_UID (REGNO (reg)) == INSN_UID (n))
8938 /* Called via `note_stores' to record the initial value of a biv. Here we
8939 just record the location of the set and process it later. */
8942 record_initial (dest, set, data)
8945 void *data ATTRIBUTE_UNUSED;
8947 struct iv_class *bl;
8949 if (GET_CODE (dest) != REG
8950 || REGNO (dest) >= max_reg_before_loop
8951 || REG_IV_TYPE (REGNO (dest)) != BASIC_INDUCT)
8954 bl = reg_biv_class[REGNO (dest)];
8956 /* If this is the first set found, record it. */
8957 if (bl->init_insn == 0)
8959 bl->init_insn = note_insn;
8964 /* If any of the registers in X are "old" and currently have a last use earlier
8965 than INSN, update them to have a last use of INSN. Their actual last use
8966 will be the previous insn but it will not have a valid uid_luid so we can't
8970 update_reg_last_use (x, insn)
8974 /* Check for the case where INSN does not have a valid luid. In this case,
8975 there is no need to modify the regno_last_uid, as this can only happen
8976 when code is inserted after the loop_end to set a pseudo's final value,
8977 and hence this insn will never be the last use of x. */
8978 if (GET_CODE (x) == REG && REGNO (x) < max_reg_before_loop
8979 && INSN_UID (insn) < max_uid_for_loop
8980 && uid_luid[REGNO_LAST_UID (REGNO (x))] < uid_luid[INSN_UID (insn)])
8981 REGNO_LAST_UID (REGNO (x)) = INSN_UID (insn);
8985 register const char *fmt = GET_RTX_FORMAT (GET_CODE (x));
8986 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
8989 update_reg_last_use (XEXP (x, i), insn);
8990 else if (fmt[i] == 'E')
8991 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
8992 update_reg_last_use (XVECEXP (x, i, j), insn);
8997 /* Given a jump insn JUMP, return the condition that will cause it to branch
8998 to its JUMP_LABEL. If the condition cannot be understood, or is an
8999 inequality floating-point comparison which needs to be reversed, 0 will
9002 If EARLIEST is non-zero, it is a pointer to a place where the earliest
9003 insn used in locating the condition was found. If a replacement test
9004 of the condition is desired, it should be placed in front of that
9005 insn and we will be sure that the inputs are still valid.
9007 The condition will be returned in a canonical form to simplify testing by
9008 callers. Specifically:
9010 (1) The code will always be a comparison operation (EQ, NE, GT, etc.).
9011 (2) Both operands will be machine operands; (cc0) will have been replaced.
9012 (3) If an operand is a constant, it will be the second operand.
9013 (4) (LE x const) will be replaced with (LT x <const+1>) and similarly
9014 for GE, GEU, and LEU. */
9017 get_condition (jump, earliest)
9026 int reverse_code = 0;
9027 int did_reverse_condition = 0;
9028 enum machine_mode mode;
9030 /* If this is not a standard conditional jump, we can't parse it. */
9031 if (GET_CODE (jump) != JUMP_INSN
9032 || ! condjump_p (jump) || simplejump_p (jump))
9035 code = GET_CODE (XEXP (SET_SRC (PATTERN (jump)), 0));
9036 mode = GET_MODE (XEXP (SET_SRC (PATTERN (jump)), 0));
9037 op0 = XEXP (XEXP (SET_SRC (PATTERN (jump)), 0), 0);
9038 op1 = XEXP (XEXP (SET_SRC (PATTERN (jump)), 0), 1);
9043 /* If this branches to JUMP_LABEL when the condition is false, reverse
9045 if (GET_CODE (XEXP (SET_SRC (PATTERN (jump)), 2)) == LABEL_REF
9046 && XEXP (XEXP (SET_SRC (PATTERN (jump)), 2), 0) == JUMP_LABEL (jump))
9047 code = reverse_condition (code), did_reverse_condition ^= 1;
9049 /* If we are comparing a register with zero, see if the register is set
9050 in the previous insn to a COMPARE or a comparison operation. Perform
9051 the same tests as a function of STORE_FLAG_VALUE as find_comparison_args
9054 while (GET_RTX_CLASS (code) == '<' && op1 == CONST0_RTX (GET_MODE (op0)))
9056 /* Set non-zero when we find something of interest. */
9060 /* If comparison with cc0, import actual comparison from compare
9064 if ((prev = prev_nonnote_insn (prev)) == 0
9065 || GET_CODE (prev) != INSN
9066 || (set = single_set (prev)) == 0
9067 || SET_DEST (set) != cc0_rtx)
9070 op0 = SET_SRC (set);
9071 op1 = CONST0_RTX (GET_MODE (op0));
9077 /* If this is a COMPARE, pick up the two things being compared. */
9078 if (GET_CODE (op0) == COMPARE)
9080 op1 = XEXP (op0, 1);
9081 op0 = XEXP (op0, 0);
9084 else if (GET_CODE (op0) != REG)
9087 /* Go back to the previous insn. Stop if it is not an INSN. We also
9088 stop if it isn't a single set or if it has a REG_INC note because
9089 we don't want to bother dealing with it. */
9091 if ((prev = prev_nonnote_insn (prev)) == 0
9092 || GET_CODE (prev) != INSN
9093 || FIND_REG_INC_NOTE (prev, 0)
9094 || (set = single_set (prev)) == 0)
9097 /* If this is setting OP0, get what it sets it to if it looks
9099 if (rtx_equal_p (SET_DEST (set), op0))
9101 enum machine_mode inner_mode = GET_MODE (SET_SRC (set));
9103 /* ??? We may not combine comparisons done in a CCmode with
9104 comparisons not done in a CCmode. This is to aid targets
9105 like Alpha that have an IEEE compliant EQ instruction, and
9106 a non-IEEE compliant BEQ instruction. The use of CCmode is
9107 actually artificial, simply to prevent the combination, but
9108 should not affect other platforms.
9110 However, we must allow VOIDmode comparisons to match either
9111 CCmode or non-CCmode comparison, because some ports have
9112 modeless comparisons inside branch patterns.
9114 ??? This mode check should perhaps look more like the mode check
9115 in simplify_comparison in combine. */
9117 if ((GET_CODE (SET_SRC (set)) == COMPARE
9120 && GET_MODE_CLASS (inner_mode) == MODE_INT
9121 && (GET_MODE_BITSIZE (inner_mode)
9122 <= HOST_BITS_PER_WIDE_INT)
9123 && (STORE_FLAG_VALUE
9124 & ((HOST_WIDE_INT) 1
9125 << (GET_MODE_BITSIZE (inner_mode) - 1))))
9126 #ifdef FLOAT_STORE_FLAG_VALUE
9128 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
9129 && FLOAT_STORE_FLAG_VALUE < 0)
9132 && GET_RTX_CLASS (GET_CODE (SET_SRC (set))) == '<'))
9133 && (((GET_MODE_CLASS (mode) == MODE_CC)
9134 == (GET_MODE_CLASS (inner_mode) == MODE_CC))
9135 || mode == VOIDmode || inner_mode == VOIDmode))
9137 else if (((code == EQ
9139 && (GET_MODE_BITSIZE (inner_mode)
9140 <= HOST_BITS_PER_WIDE_INT)
9141 && GET_MODE_CLASS (inner_mode) == MODE_INT
9142 && (STORE_FLAG_VALUE
9143 & ((HOST_WIDE_INT) 1
9144 << (GET_MODE_BITSIZE (inner_mode) - 1))))
9145 #ifdef FLOAT_STORE_FLAG_VALUE
9147 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
9148 && FLOAT_STORE_FLAG_VALUE < 0)
9151 && GET_RTX_CLASS (GET_CODE (SET_SRC (set))) == '<'
9152 && (((GET_MODE_CLASS (mode) == MODE_CC)
9153 == (GET_MODE_CLASS (inner_mode) == MODE_CC))
9154 || mode == VOIDmode || inner_mode == VOIDmode))
9157 /* We might have reversed a LT to get a GE here. But this wasn't
9158 actually the comparison of data, so we don't flag that we
9159 have had to reverse the condition. */
9160 did_reverse_condition ^= 1;
9168 else if (reg_set_p (op0, prev))
9169 /* If this sets OP0, but not directly, we have to give up. */
9174 if (GET_RTX_CLASS (GET_CODE (x)) == '<')
9175 code = GET_CODE (x);
9178 code = reverse_condition (code);
9179 did_reverse_condition ^= 1;
9183 op0 = XEXP (x, 0), op1 = XEXP (x, 1);
9189 /* If constant is first, put it last. */
9190 if (CONSTANT_P (op0))
9191 code = swap_condition (code), tem = op0, op0 = op1, op1 = tem;
9193 /* If OP0 is the result of a comparison, we weren't able to find what
9194 was really being compared, so fail. */
9195 if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_CC)
9198 /* Canonicalize any ordered comparison with integers involving equality
9199 if we can do computations in the relevant mode and we do not
9202 if (GET_CODE (op1) == CONST_INT
9203 && GET_MODE (op0) != VOIDmode
9204 && GET_MODE_BITSIZE (GET_MODE (op0)) <= HOST_BITS_PER_WIDE_INT)
9206 HOST_WIDE_INT const_val = INTVAL (op1);
9207 unsigned HOST_WIDE_INT uconst_val = const_val;
9208 unsigned HOST_WIDE_INT max_val
9209 = (unsigned HOST_WIDE_INT) GET_MODE_MASK (GET_MODE (op0));
9214 if ((unsigned HOST_WIDE_INT) const_val != max_val >> 1)
9215 code = LT, op1 = GEN_INT (const_val + 1);
9218 /* When cross-compiling, const_val might be sign-extended from
9219 BITS_PER_WORD to HOST_BITS_PER_WIDE_INT */
9221 if ((HOST_WIDE_INT) (const_val & max_val)
9222 != (((HOST_WIDE_INT) 1
9223 << (GET_MODE_BITSIZE (GET_MODE (op0)) - 1))))
9224 code = GT, op1 = GEN_INT (const_val - 1);
9228 if (uconst_val < max_val)
9229 code = LTU, op1 = GEN_INT (uconst_val + 1);
9233 if (uconst_val != 0)
9234 code = GTU, op1 = GEN_INT (uconst_val - 1);
9242 /* If this was floating-point and we reversed anything other than an
9243 EQ or NE, return zero. */
9244 if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT
9245 && did_reverse_condition && code != NE && code != EQ
9247 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_FLOAT)
9251 /* Never return CC0; return zero instead. */
9256 return gen_rtx_fmt_ee (code, VOIDmode, op0, op1);
9259 /* Similar to above routine, except that we also put an invariant last
9260 unless both operands are invariants. */
9263 get_condition_for_loop (x)
9266 rtx comparison = get_condition (x, NULL_PTR);
9269 || ! invariant_p (XEXP (comparison, 0))
9270 || invariant_p (XEXP (comparison, 1)))
9273 return gen_rtx_fmt_ee (swap_condition (GET_CODE (comparison)), VOIDmode,
9274 XEXP (comparison, 1), XEXP (comparison, 0));
9277 #ifdef HAVE_decrement_and_branch_on_count
9278 /* Instrument loop for insertion of bct instruction. We distinguish between
9279 loops with compile-time bounds and those with run-time bounds.
9280 Information from loop_iterations() is used to compute compile-time bounds.
9281 Run-time bounds should use loop preconditioning, but currently ignored.
9285 insert_bct (loop_start, loop_end, loop_info)
9286 rtx loop_start, loop_end;
9287 struct loop_info *loop_info;
9290 unsigned HOST_WIDE_INT n_iterations;
9292 int increment_direction, compare_direction;
9294 /* If the loop condition is <= or >=, the number of iteration
9295 is 1 more than the range of the bounds of the loop. */
9296 int add_iteration = 0;
9298 enum machine_mode loop_var_mode = word_mode;
9300 int loop_num = uid_loop_num [INSN_UID (loop_start)];
9302 /* It's impossible to instrument a competely unrolled loop. */
9303 if (loop_info->unroll_number == loop_info->n_iterations)
9306 /* Make sure that the count register is not in use. */
9307 if (loop_used_count_register [loop_num])
9309 if (loop_dump_stream)
9310 fprintf (loop_dump_stream,
9311 "insert_bct %d: BCT instrumentation failed: count register already in use\n",
9316 /* Make sure that the function has no indirect jumps. */
9317 if (indirect_jump_in_function)
9319 if (loop_dump_stream)
9320 fprintf (loop_dump_stream,
9321 "insert_bct %d: BCT instrumentation failed: indirect jump in function\n",
9326 /* Make sure that the last loop insn is a conditional jump. */
9327 if (GET_CODE (PREV_INSN (loop_end)) != JUMP_INSN
9328 || ! condjump_p (PREV_INSN (loop_end))
9329 || simplejump_p (PREV_INSN (loop_end)))
9331 if (loop_dump_stream)
9332 fprintf (loop_dump_stream,
9333 "insert_bct %d: BCT instrumentation failed: invalid jump at loop end\n",
9338 /* Make sure that the loop does not contain a function call
9339 (the count register might be altered by the called function). */
9340 if (loop_info->has_call)
9342 if (loop_dump_stream)
9343 fprintf (loop_dump_stream,
9344 "insert_bct %d: BCT instrumentation failed: function call in loop\n",
9349 /* Make sure that the loop does not jump via a table.
9350 (the count register might be used to perform the branch on table). */
9351 if (loop_info->has_tablejump)
9353 if (loop_dump_stream)
9354 fprintf (loop_dump_stream,
9355 "insert_bct %d: BCT instrumentation failed: computed branch in the loop\n",
9360 /* Account for loop unrolling in instrumented iteration count. */
9361 if (loop_info->unroll_number > 1)
9362 n_iterations = loop_info->n_iterations / loop_info->unroll_number;
9364 n_iterations = loop_info->n_iterations;
9366 if (n_iterations != 0 && n_iterations < 3)
9368 /* Allow an enclosing outer loop to benefit if possible. */
9369 if (loop_dump_stream)
9370 fprintf (loop_dump_stream,
9371 "insert_bct %d: Too few iterations to benefit from BCT optimization\n",
9376 /* Try to instrument the loop. */
9378 /* Handle the simpler case, where the bounds are known at compile time. */
9379 if (n_iterations > 0)
9381 /* Mark all enclosing loops that they cannot use count register. */
9382 for (i = loop_num; i != -1; i = loop_outer_loop[i])
9383 loop_used_count_register[i] = 1;
9384 instrument_loop_bct (loop_start, loop_end, GEN_INT (n_iterations));
9388 /* Handle the more complex case, that the bounds are NOT known
9389 at compile time. In this case we generate run_time calculation
9390 of the number of iterations. */
9392 if (loop_info->iteration_var == 0)
9394 if (loop_dump_stream)
9395 fprintf (loop_dump_stream,
9396 "insert_bct %d: BCT Runtime Instrumentation failed: no loop iteration variable found\n",
9401 if (GET_MODE_CLASS (GET_MODE (loop_info->iteration_var)) != MODE_INT
9402 || GET_MODE_SIZE (GET_MODE (loop_info->iteration_var)) != UNITS_PER_WORD)
9404 if (loop_dump_stream)
9405 fprintf (loop_dump_stream,
9406 "insert_bct %d: BCT Runtime Instrumentation failed: loop variable not integer\n",
9411 /* With runtime bounds, if the compare is of the form '!=' we give up */
9412 if (loop_info->comparison_code == NE)
9414 if (loop_dump_stream)
9415 fprintf (loop_dump_stream,
9416 "insert_bct %d: BCT Runtime Instrumentation failed: runtime bounds with != comparison\n",
9420 /* Use common loop preconditioning code instead. */
9424 /* We rely on the existence of run-time guard to ensure that the
9425 loop executes at least once. */
9427 rtx iterations_num_reg;
9429 unsigned HOST_WIDE_INT increment_value_abs
9430 = INTVAL (increment) * increment_direction;
9432 /* make sure that the increment is a power of two, otherwise (an
9433 expensive) divide is needed. */
9434 if (exact_log2 (increment_value_abs) == -1)
9436 if (loop_dump_stream)
9437 fprintf (loop_dump_stream,
9438 "insert_bct: not instrumenting BCT because the increment is not power of 2\n");
9442 /* compute the number of iterations */
9447 /* Again, the number of iterations is calculated by:
9449 ; compare-val - initial-val + (increment -1) + additional-iteration
9450 ; num_iterations = -----------------------------------------------------------------
9453 /* ??? Do we have to call copy_rtx here before passing rtx to
9455 if (compare_direction > 0)
9457 /* <, <= :the loop variable is increasing */
9458 temp_reg = expand_binop (loop_var_mode, sub_optab,
9459 comparison_value, initial_value,
9460 NULL_RTX, 0, OPTAB_LIB_WIDEN);
9464 temp_reg = expand_binop (loop_var_mode, sub_optab,
9465 initial_value, comparison_value,
9466 NULL_RTX, 0, OPTAB_LIB_WIDEN);
9469 if (increment_value_abs - 1 + add_iteration != 0)
9470 temp_reg = expand_binop (loop_var_mode, add_optab, temp_reg,
9471 GEN_INT (increment_value_abs - 1
9473 NULL_RTX, 0, OPTAB_LIB_WIDEN);
9475 if (increment_value_abs != 1)
9476 iterations_num_reg = expand_binop (loop_var_mode, asr_optab,
9478 GEN_INT (exact_log2 (increment_value_abs)),
9479 NULL_RTX, 0, OPTAB_LIB_WIDEN);
9481 iterations_num_reg = temp_reg;
9483 sequence = gen_sequence ();
9485 emit_insn_before (sequence, loop_start);
9486 instrument_loop_bct (loop_start, loop_end, iterations_num_reg);
9490 #endif /* Complex case */
9493 /* Instrument loop by inserting a bct in it as follows:
9494 1. A new counter register is created.
9495 2. In the head of the loop the new variable is initialized to the value
9496 passed in the loop_num_iterations parameter.
9497 3. At the end of the loop, comparison of the register with 0 is generated.
9498 The created comparison follows the pattern defined for the
9499 decrement_and_branch_on_count insn, so this insn will be generated.
9500 4. The branch on the old variable are deleted. The compare must remain
9501 because it might be used elsewhere. If the loop-variable or condition
9502 register are used elsewhere, they will be eliminated by flow. */
9505 instrument_loop_bct (loop_start, loop_end, loop_num_iterations)
9506 rtx loop_start, loop_end;
9507 rtx loop_num_iterations;
9513 if (HAVE_decrement_and_branch_on_count)
9515 if (loop_dump_stream)
9517 fputs ("instrument_bct: Inserting BCT (", loop_dump_stream);
9518 if (GET_CODE (loop_num_iterations) == CONST_INT)
9519 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC,
9520 INTVAL (loop_num_iterations));
9522 fputs ("runtime", loop_dump_stream);
9523 fputs (" iterations)", loop_dump_stream);
9526 /* Discard original jump to continue loop. Original compare result
9527 may still be live, so it cannot be discarded explicitly. */
9528 delete_insn (PREV_INSN (loop_end));
9530 /* Insert the label which will delimit the start of the loop. */
9531 start_label = gen_label_rtx ();
9532 emit_label_after (start_label, loop_start);
9534 /* Insert initialization of the count register into the loop header. */
9536 counter_reg = gen_reg_rtx (word_mode);
9537 emit_insn (gen_move_insn (counter_reg, loop_num_iterations));
9538 sequence = gen_sequence ();
9540 emit_insn_before (sequence, loop_start);
9542 /* Insert new comparison on the count register instead of the
9543 old one, generating the needed BCT pattern (that will be
9544 later recognized by assembly generation phase). */
9545 emit_jump_insn_before (gen_decrement_and_branch_on_count (counter_reg,
9548 LABEL_NUSES (start_label)++;
9552 #endif /* HAVE_decrement_and_branch_on_count */
9554 /* Scan the function and determine whether it has indirect (computed) jumps.
9556 This is taken mostly from flow.c; similar code exists elsewhere
9557 in the compiler. It may be useful to put this into rtlanal.c. */
9559 indirect_jump_in_function_p (start)
9564 for (insn = start; insn; insn = NEXT_INSN (insn))
9565 if (computed_jump_p (insn))
9571 /* Add MEM to the LOOP_MEMS array, if appropriate. See the
9572 documentation for LOOP_MEMS for the definition of `appropriate'.
9573 This function is called from prescan_loop via for_each_rtx. */
9576 insert_loop_mem (mem, data)
9578 void *data ATTRIBUTE_UNUSED;
9586 switch (GET_CODE (m))
9592 /* We're not interested in the MEM associated with a
9593 CONST_DOUBLE, so there's no need to traverse into this. */
9597 /* This is not a MEM. */
9601 /* See if we've already seen this MEM. */
9602 for (i = 0; i < loop_mems_idx; ++i)
9603 if (rtx_equal_p (m, loop_mems[i].mem))
9605 if (GET_MODE (m) != GET_MODE (loop_mems[i].mem))
9606 /* The modes of the two memory accesses are different. If
9607 this happens, something tricky is going on, and we just
9608 don't optimize accesses to this MEM. */
9609 loop_mems[i].optimize = 0;
9614 /* Resize the array, if necessary. */
9615 if (loop_mems_idx == loop_mems_allocated)
9617 if (loop_mems_allocated != 0)
9618 loop_mems_allocated *= 2;
9620 loop_mems_allocated = 32;
9622 loop_mems = (loop_mem_info*)
9623 xrealloc (loop_mems,
9624 loop_mems_allocated * sizeof (loop_mem_info));
9627 /* Actually insert the MEM. */
9628 loop_mems[loop_mems_idx].mem = m;
9629 /* We can't hoist this MEM out of the loop if it's a BLKmode MEM
9630 because we can't put it in a register. We still store it in the
9631 table, though, so that if we see the same address later, but in a
9632 non-BLK mode, we'll not think we can optimize it at that point. */
9633 loop_mems[loop_mems_idx].optimize = (GET_MODE (m) != BLKmode);
9634 loop_mems[loop_mems_idx].reg = NULL_RTX;
9640 /* Like load_mems, but also ensures that SET_IN_LOOP,
9641 MAY_NOT_OPTIMIZE, REG_SINGLE_USAGE, and INSN_COUNT have the correct
9642 values after load_mems. */
9645 load_mems_and_recount_loop_regs_set (scan_start, end, loop_top, start,
9653 int nregs = max_reg_num ();
9655 load_mems (scan_start, end, loop_top, start);
9657 /* Recalculate set_in_loop and friends since load_mems may have
9658 created new registers. */
9659 if (max_reg_num () > nregs)
9665 nregs = max_reg_num ();
9667 if ((unsigned) nregs > set_in_loop->num_elements)
9669 /* Grow all the arrays. */
9670 VARRAY_GROW (set_in_loop, nregs);
9671 VARRAY_GROW (n_times_set, nregs);
9672 VARRAY_GROW (may_not_optimize, nregs);
9673 VARRAY_GROW (reg_single_usage, nregs);
9675 /* Clear the arrays */
9676 bzero ((char *) &set_in_loop->data, nregs * sizeof (int));
9677 bzero ((char *) &may_not_optimize->data, nregs * sizeof (char));
9678 bzero ((char *) ®_single_usage->data, nregs * sizeof (rtx));
9680 count_loop_regs_set (loop_top ? loop_top : start, end,
9681 may_not_optimize, reg_single_usage,
9684 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
9686 VARRAY_CHAR (may_not_optimize, i) = 1;
9687 VARRAY_INT (set_in_loop, i) = 1;
9690 #ifdef AVOID_CCMODE_COPIES
9691 /* Don't try to move insns which set CC registers if we should not
9692 create CCmode register copies. */
9693 for (i = max_reg_num () - 1; i >= FIRST_PSEUDO_REGISTER; i--)
9694 if (GET_MODE_CLASS (GET_MODE (regno_reg_rtx[i])) == MODE_CC)
9695 VARRAY_CHAR (may_not_optimize, i) = 1;
9698 /* Set n_times_set for the new registers. */
9699 bcopy ((char *) (&set_in_loop->data.i[0] + old_nregs),
9700 (char *) (&n_times_set->data.i[0] + old_nregs),
9701 (nregs - old_nregs) * sizeof (int));
9705 /* Move MEMs into registers for the duration of the loop. SCAN_START
9706 is the first instruction in the loop (as it is executed). The
9707 other parameters are as for next_insn_in_loop. */
9710 load_mems (scan_start, end, loop_top, start)
9716 int maybe_never = 0;
9719 rtx label = NULL_RTX;
9720 rtx end_label = NULL_RTX;
9721 /* Nonzero if the next instruction may never be executed. */
9722 int next_maybe_never = 0;
9723 int last_max_reg = max_reg_num ();
9725 if (loop_mems_idx == 0)
9728 /* Check to see if it's possible that some instructions in the
9729 loop are never executed. */
9730 for (p = next_insn_in_loop (scan_start, scan_start, end, loop_top);
9731 p != NULL_RTX && !maybe_never;
9732 p = next_insn_in_loop (p, scan_start, end, loop_top))
9734 if (GET_CODE (p) == CODE_LABEL)
9736 else if (GET_CODE (p) == JUMP_INSN
9737 /* If we enter the loop in the middle, and scan
9738 around to the beginning, don't set maybe_never
9739 for that. This must be an unconditional jump,
9740 otherwise the code at the top of the loop might
9741 never be executed. Unconditional jumps are
9742 followed a by barrier then loop end. */
9743 && ! (GET_CODE (p) == JUMP_INSN
9744 && JUMP_LABEL (p) == loop_top
9745 && NEXT_INSN (NEXT_INSN (p)) == end
9746 && simplejump_p (p)))
9748 if (!condjump_p (p))
9749 /* Something complicated. */
9752 /* If there are any more instructions in the loop, they
9753 might not be reached. */
9754 next_maybe_never = 1;
9756 else if (next_maybe_never)
9760 /* Actually move the MEMs. */
9761 for (i = 0; i < loop_mems_idx; ++i)
9766 rtx mem = loop_mems[i].mem;
9769 if (MEM_VOLATILE_P (mem)
9770 || invariant_p (XEXP (mem, 0)) != 1)
9771 /* There's no telling whether or not MEM is modified. */
9772 loop_mems[i].optimize = 0;
9774 /* Go through the MEMs written to in the loop to see if this
9775 one is aliased by one of them. */
9776 mem_list_entry = loop_store_mems;
9777 while (mem_list_entry)
9779 if (rtx_equal_p (mem, XEXP (mem_list_entry, 0)))
9781 else if (true_dependence (XEXP (mem_list_entry, 0), VOIDmode,
9784 /* MEM is indeed aliased by this store. */
9785 loop_mems[i].optimize = 0;
9788 mem_list_entry = XEXP (mem_list_entry, 1);
9791 /* If this MEM is written to, we must be sure that there
9792 are no reads from another MEM that aliases this one. */
9793 if (loop_mems[i].optimize && written)
9797 for (j = 0; j < loop_mems_idx; ++j)
9801 else if (true_dependence (mem,
9806 /* It's not safe to hoist loop_mems[i] out of
9807 the loop because writes to it might not be
9808 seen by reads from loop_mems[j]. */
9809 loop_mems[i].optimize = 0;
9815 if (maybe_never && may_trap_p (mem))
9816 /* We can't access the MEM outside the loop; it might
9817 cause a trap that wouldn't have happened otherwise. */
9818 loop_mems[i].optimize = 0;
9820 if (!loop_mems[i].optimize)
9821 /* We thought we were going to lift this MEM out of the
9822 loop, but later discovered that we could not. */
9825 INIT_REG_SET (&copies);
9827 /* Allocate a pseudo for this MEM. We set REG_USERVAR_P in
9828 order to keep scan_loop from moving stores to this MEM
9829 out of the loop just because this REG is neither a
9830 user-variable nor used in the loop test. */
9831 reg = gen_reg_rtx (GET_MODE (mem));
9832 REG_USERVAR_P (reg) = 1;
9833 loop_mems[i].reg = reg;
9835 /* Now, replace all references to the MEM with the
9836 corresponding pesudos. */
9838 for (p = next_insn_in_loop (scan_start, scan_start, end, loop_top);
9840 p = next_insn_in_loop (p, scan_start, end, loop_top))
9845 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
9847 /* See if this copies the mem into a register that isn't
9848 modified afterwards. We'll try to do copy propagation
9849 a little further on. */
9850 set = single_set (p);
9852 /* @@@ This test is _way_ too conservative. */
9854 && GET_CODE (SET_DEST (set)) == REG
9855 && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER
9856 && REGNO (SET_DEST (set)) < last_max_reg
9857 && VARRAY_INT (n_times_set, REGNO (SET_DEST (set))) == 1
9858 && rtx_equal_p (SET_SRC (set), loop_mems[i].mem))
9859 SET_REGNO_REG_SET (&copies, REGNO (SET_DEST (set)));
9862 for_each_rtx (&p, replace_loop_mem, &ri);
9865 if (GET_CODE (p) == CODE_LABEL
9866 || GET_CODE (p) == JUMP_INSN)
9870 if (! apply_change_group ())
9871 /* We couldn't replace all occurrences of the MEM. */
9872 loop_mems[i].optimize = 0;
9878 /* Load the memory immediately before START, which is
9879 the NOTE_LOOP_BEG. */
9880 set = gen_move_insn (reg, mem);
9881 emit_insn_before (set, start);
9885 if (label == NULL_RTX)
9887 /* We must compute the former
9888 right-after-the-end label before we insert
9890 end_label = next_label (end);
9891 label = gen_label_rtx ();
9892 emit_label_after (label, end);
9895 /* Store the memory immediately after END, which is
9896 the NOTE_LOOP_END. */
9897 set = gen_move_insn (copy_rtx (mem), reg);
9898 emit_insn_after (set, label);
9901 if (loop_dump_stream)
9903 fprintf (loop_dump_stream, "Hoisted regno %d %s from ",
9904 REGNO (reg), (written ? "r/w" : "r/o"));
9905 print_rtl (loop_dump_stream, mem);
9906 fputc ('\n', loop_dump_stream);
9909 /* Attempt a bit of copy propagation. This helps untangle the
9910 data flow, and enables {basic,general}_induction_var to find
9912 EXECUTE_IF_SET_IN_REG_SET
9913 (&copies, FIRST_PSEUDO_REGISTER, j,
9915 try_copy_prop (scan_start, loop_top, end, loop_mems[i].reg, j);
9917 CLEAR_REG_SET (&copies);
9921 if (label != NULL_RTX)
9923 /* Now, we need to replace all references to the previous exit
9924 label with the new one. */
9929 for (p = start; p != end; p = NEXT_INSN (p))
9931 for_each_rtx (&p, replace_label, &rr);
9933 /* If this is a JUMP_INSN, then we also need to fix the JUMP_LABEL
9934 field. This is not handled by for_each_rtx because it doesn't
9935 handle unprinted ('0') fields. We need to update JUMP_LABEL
9936 because the immediately following unroll pass will use it.
9937 replace_label would not work anyways, because that only handles
9939 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p) == end_label)
9940 JUMP_LABEL (p) = label;
9945 /* Try to replace every occurrence of pseudo REGNO with REPLACEMENT.
9946 There must be exactly one insn that sets this pseudo; it will be
9947 deleted if all replacements succeed and we can prove that the register
9948 is not used after the loop.
9949 The arguments SCAN_START, LOOP_TOP and END are as in load_mems. */
9951 try_copy_prop (scan_start, loop_top, end, replacement, regno)
9952 rtx scan_start, loop_top, end, replacement;
9957 for (insn = next_insn_in_loop (scan_start, scan_start, end, loop_top);
9959 insn = next_insn_in_loop (insn, scan_start, end, loop_top))
9962 rtx array[3] = { regno_reg_rtx[regno], replacement, insn };
9963 if (GET_RTX_CLASS (GET_CODE (insn)) != 'i')
9965 set = single_set (insn);
9967 && GET_CODE (SET_DEST (set)) == REG
9968 && REGNO (SET_DEST (set)) == regno)
9974 for_each_rtx (&insn, replace_loop_reg, array);
9978 if (apply_change_group ())
9980 if (uid_luid[REGNO_LAST_UID (regno)] < INSN_LUID (end))
9982 PUT_CODE (init_insn, NOTE);
9983 NOTE_LINE_NUMBER (init_insn) = NOTE_INSN_DELETED;
9985 if (loop_dump_stream)
9986 fprintf (loop_dump_stream, " Replaced reg %d.\n", regno);
9990 /* Replace MEM with its associated pseudo register. This function is
9991 called from load_mems via for_each_rtx. DATA is actually an
9992 rtx_and_int * describing the instruction currently being scanned
9993 and the MEM we are currently replacing. */
9996 replace_loop_mem (mem, data)
10008 switch (GET_CODE (m))
10014 /* We're not interested in the MEM associated with a
10015 CONST_DOUBLE, so there's no need to traverse into one. */
10019 /* This is not a MEM. */
10023 ri = (rtx_and_int*) data;
10026 if (!rtx_equal_p (loop_mems[i].mem, m))
10027 /* This is not the MEM we are currently replacing. */
10032 /* Actually replace the MEM. */
10033 validate_change (insn, mem, loop_mems[i].reg, 1);
10038 /* Replace one register with another. Called through for_each_rtx; PX points
10039 to the rtx being scanned. DATA is actually an array of three rtx's; the
10040 first one is the one to be replaced, and the second one the replacement.
10041 The third one is the current insn. */
10044 replace_loop_reg (px, data)
10049 rtx *array = (rtx *)data;
10055 validate_change (array[2], px, array[1], 1);
10060 /* Replace occurrences of the old exit label for the loop with the new
10061 one. DATA is an rtx_pair containing the old and new labels,
10065 replace_label (x, data)
10070 rtx old_label = ((rtx_pair*) data)->r1;
10071 rtx new_label = ((rtx_pair*) data)->r2;
10076 if (GET_CODE (l) != LABEL_REF)
10079 if (XEXP (l, 0) != old_label)
10082 XEXP (l, 0) = new_label;
10083 ++LABEL_NUSES (new_label);
10084 --LABEL_NUSES (old_label);