1 /* Perform various loop optimizations, including strength reduction.
2 Copyright (C) 1987, 88, 89, 91-7, 1998 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* This is the loop optimization pass of the compiler.
23 It finds invariant computations within loops and moves them
24 to the beginning of the loop. Then it identifies basic and
25 general induction variables. Strength reduction is applied to the general
26 induction variables, and induction variable elimination is applied to
27 the basic induction variables.
29 It also finds cases where
30 a register is set within the loop by zero-extending a narrower value
31 and changes these to zero the entire register once before the loop
32 and merely copy the low part within the loop.
34 Most of the complexity is in heuristics to decide when it is worth
35 while to do these things. */
42 #include "insn-config.h"
43 #include "insn-flags.h"
45 #include "hard-reg-set.h"
52 /* Vector mapping INSN_UIDs to luids.
53 The luids are like uids but increase monotonically always.
54 We use them to see whether a jump comes from outside a given loop. */
58 /* Indexed by INSN_UID, contains the ordinal giving the (innermost) loop
59 number the insn is contained in. */
63 /* 1 + largest uid of any insn. */
67 /* 1 + luid of last insn. */
71 /* Number of loops detected in current function. Used as index to the
74 static int max_loop_num;
76 /* Indexed by loop number, contains the first and last insn of each loop. */
78 static rtx *loop_number_loop_starts, *loop_number_loop_ends;
80 /* For each loop, gives the containing loop number, -1 if none. */
85 /* The main output of analyze_loop_iterations is placed here */
87 int *loop_can_insert_bct;
89 /* For each loop, determines whether some of its inner loops has used
92 int *loop_used_count_register;
94 /* loop parameters for arithmetic loops. These loops have a loop variable
95 which is initialized to loop_start_value, incremented in each iteration
96 by "loop_increment". At the end of the iteration the loop variable is
97 compared to the loop_comparison_value (using loop_comparison_code). */
100 rtx *loop_comparison_value;
101 rtx *loop_start_value;
102 enum rtx_code *loop_comparison_code;
105 /* For each loop, keep track of its unrolling factor.
109 -1: completely unrolled
110 >0: holds the unroll exact factor. */
111 int *loop_unroll_factor;
113 /* Indexed by loop number, contains a nonzero value if the "loop" isn't
114 really a loop (an insn outside the loop branches into it). */
116 static char *loop_invalid;
118 /* Indexed by loop number, links together all LABEL_REFs which refer to
119 code labels outside the loop. Used by routines that need to know all
120 loop exits, such as final_biv_value and final_giv_value.
122 This does not include loop exits due to return instructions. This is
123 because all bivs and givs are pseudos, and hence must be dead after a
124 return, so the presense of a return does not affect any of the
125 optimizations that use this info. It is simpler to just not include return
126 instructions on this list. */
128 rtx *loop_number_exit_labels;
130 /* Indexed by loop number, counts the number of LABEL_REFs on
131 loop_number_exit_labels for this loop and all loops nested inside it. */
133 int *loop_number_exit_count;
135 /* Holds the number of loop iterations. It is zero if the number could not be
136 calculated. Must be unsigned since the number of iterations can
137 be as high as 2^wordsize-1. For loops with a wider iterator, this number
138 will will be zero if the number of loop iterations is too large for an
139 unsigned integer to hold. */
141 unsigned HOST_WIDE_INT loop_n_iterations;
143 /* Nonzero if there is a subroutine call in the current loop. */
145 static int loop_has_call;
147 /* Nonzero if there is a volatile memory reference in the current
150 static int loop_has_volatile;
152 /* Added loop_continue which is the NOTE_INSN_LOOP_CONT of the
153 current loop. A continue statement will generate a branch to
154 NEXT_INSN (loop_continue). */
156 static rtx loop_continue;
158 /* Indexed by register number, contains the number of times the reg
159 is set during the loop being scanned.
160 During code motion, a negative value indicates a reg that has been
161 made a candidate; in particular -2 means that it is an candidate that
162 we know is equal to a constant and -1 means that it is an candidate
163 not known equal to a constant.
164 After code motion, regs moved have 0 (which is accurate now)
165 while the failed candidates have the original number of times set.
167 Therefore, at all times, == 0 indicates an invariant register;
168 < 0 a conditionally invariant one. */
170 static int *n_times_set;
172 /* Original value of n_times_set; same except that this value
173 is not set negative for a reg whose sets have been made candidates
174 and not set to 0 for a reg that is moved. */
176 static int *n_times_used;
178 /* Index by register number, 1 indicates that the register
179 cannot be moved or strength reduced. */
181 static char *may_not_optimize;
183 /* Nonzero means reg N has already been moved out of one loop.
184 This reduces the desire to move it out of another. */
186 static char *moved_once;
188 /* Array of MEMs that are stored in this loop. If there are too many to fit
189 here, we just turn on unknown_address_altered. */
191 #define NUM_STORES 30
192 static rtx loop_store_mems[NUM_STORES];
194 /* Index of first available slot in above array. */
195 static int loop_store_mems_idx;
197 /* Nonzero if we don't know what MEMs were changed in the current loop.
198 This happens if the loop contains a call (in which case `loop_has_call'
199 will also be set) or if we store into more than NUM_STORES MEMs. */
201 static int unknown_address_altered;
203 /* Count of movable (i.e. invariant) instructions discovered in the loop. */
204 static int num_movables;
206 /* Count of memory write instructions discovered in the loop. */
207 static int num_mem_sets;
209 /* Number of loops contained within the current one, including itself. */
210 static int loops_enclosed;
212 /* Bound on pseudo register number before loop optimization.
213 A pseudo has valid regscan info if its number is < max_reg_before_loop. */
214 int max_reg_before_loop;
216 /* This obstack is used in product_cheap_p to allocate its rtl. It
217 may call gen_reg_rtx which, in turn, may reallocate regno_reg_rtx.
218 If we used the same obstack that it did, we would be deallocating
221 static struct obstack temp_obstack;
223 /* This is where the pointer to the obstack being used for RTL is stored. */
225 extern struct obstack *rtl_obstack;
227 #define obstack_chunk_alloc xmalloc
228 #define obstack_chunk_free free
230 extern char *oballoc ();
232 /* During the analysis of a loop, a chain of `struct movable's
233 is made to record all the movable insns found.
234 Then the entire chain can be scanned to decide which to move. */
238 rtx insn; /* A movable insn */
239 rtx set_src; /* The expression this reg is set from. */
240 rtx set_dest; /* The destination of this SET. */
241 rtx dependencies; /* When INSN is libcall, this is an EXPR_LIST
242 of any registers used within the LIBCALL. */
243 int consec; /* Number of consecutive following insns
244 that must be moved with this one. */
245 int regno; /* The register it sets */
246 short lifetime; /* lifetime of that register;
247 may be adjusted when matching movables
248 that load the same value are found. */
249 short savings; /* Number of insns we can move for this reg,
250 including other movables that force this
251 or match this one. */
252 unsigned int cond : 1; /* 1 if only conditionally movable */
253 unsigned int force : 1; /* 1 means MUST move this insn */
254 unsigned int global : 1; /* 1 means reg is live outside this loop */
255 /* If PARTIAL is 1, GLOBAL means something different:
256 that the reg is live outside the range from where it is set
257 to the following label. */
258 unsigned int done : 1; /* 1 inhibits further processing of this */
260 unsigned int partial : 1; /* 1 means this reg is used for zero-extending.
261 In particular, moving it does not make it
263 unsigned int move_insn : 1; /* 1 means that we call emit_move_insn to
264 load SRC, rather than copying INSN. */
265 unsigned int is_equiv : 1; /* 1 means a REG_EQUIV is present on INSN. */
266 enum machine_mode savemode; /* Nonzero means it is a mode for a low part
267 that we should avoid changing when clearing
268 the rest of the reg. */
269 struct movable *match; /* First entry for same value */
270 struct movable *forces; /* An insn that must be moved if this is */
271 struct movable *next;
274 FILE *loop_dump_stream;
276 /* Forward declarations. */
278 static void find_and_verify_loops ();
279 static void mark_loop_jump ();
280 static void prescan_loop ();
281 static int reg_in_basic_block_p ();
282 static int consec_sets_invariant_p ();
283 static rtx libcall_other_reg ();
284 static int labels_in_range_p ();
285 static void count_loop_regs_set ();
286 static void note_addr_stored ();
287 static int loop_reg_used_before_p ();
288 static void scan_loop ();
290 static void replace_call_address ();
292 static rtx skip_consec_insns ();
293 static int libcall_benefit ();
294 static void ignore_some_movables ();
295 static void force_movables ();
296 static void combine_movables ();
297 static int rtx_equal_for_loop_p ();
298 static void move_movables ();
299 static void strength_reduce ();
300 static int valid_initial_value_p ();
301 static void find_mem_givs ();
302 static void record_biv ();
303 static void check_final_value ();
304 static void record_giv ();
305 static void update_giv_derive ();
306 static int basic_induction_var ();
307 static rtx simplify_giv_expr ();
308 static int general_induction_var ();
309 static int consec_sets_giv ();
310 static int check_dbra_loop ();
311 static rtx express_from ();
312 static int combine_givs_p ();
313 static void combine_givs ();
314 static int product_cheap_p ();
315 static int maybe_eliminate_biv ();
316 static int maybe_eliminate_biv_1 ();
317 static int last_use_this_basic_block ();
318 static void record_initial ();
319 static void update_reg_last_use ();
322 /* This is extern from unroll.c */
323 void iteration_info ();
325 /* Two main functions for implementing bct:
326 first - to be called before loop unrolling, and the second - after */
327 #ifdef HAVE_decrement_and_branch_on_count
328 static void analyze_loop_iterations ();
329 static void insert_bct ();
331 /* Auxiliary function that inserts the bct pattern into the loop */
332 static void instrument_loop_bct ();
333 #endif /* HAVE_decrement_and_branch_on_count */
336 /* Indirect_jump_in_function is computed once per function. */
337 int indirect_jump_in_function = 0;
338 static int indirect_jump_in_function_p ();
341 /* Relative gain of eliminating various kinds of operations. */
348 /* Benefit penalty, if a giv is not replaceable, i.e. must emit an insn to
349 copy the value of the strength reduced giv to its original register. */
355 char *free_point = (char *) oballoc (1);
356 rtx reg = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 1);
358 add_cost = rtx_cost (gen_rtx_PLUS (word_mode, reg, reg), SET);
360 /* We multiply by 2 to reconcile the difference in scale between
361 these two ways of computing costs. Otherwise the cost of a copy
362 will be far less than the cost of an add. */
366 /* Free the objects we just allocated. */
369 /* Initialize the obstack used for rtl in product_cheap_p. */
370 gcc_obstack_init (&temp_obstack);
373 /* Entry point of this file. Perform loop optimization
374 on the current function. F is the first insn of the function
375 and DUMPFILE is a stream for output of a trace of actions taken
376 (or 0 if none should be output). */
379 loop_optimize (f, dumpfile, unroll_p)
380 /* f is the first instruction of a chain of insns for one function */
389 loop_dump_stream = dumpfile;
391 init_recog_no_volatile ();
392 init_alias_analysis ();
394 max_reg_before_loop = max_reg_num ();
396 moved_once = (char *) alloca (max_reg_before_loop);
397 bzero (moved_once, max_reg_before_loop);
401 /* Count the number of loops. */
404 for (insn = f; insn; insn = NEXT_INSN (insn))
406 if (GET_CODE (insn) == NOTE
407 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
411 /* Don't waste time if no loops. */
412 if (max_loop_num == 0)
415 /* Get size to use for tables indexed by uids.
416 Leave some space for labels allocated by find_and_verify_loops. */
417 max_uid_for_loop = get_max_uid () + 1 + max_loop_num * 32;
419 uid_luid = (int *) alloca (max_uid_for_loop * sizeof (int));
420 uid_loop_num = (int *) alloca (max_uid_for_loop * sizeof (int));
422 bzero ((char *) uid_luid, max_uid_for_loop * sizeof (int));
423 bzero ((char *) uid_loop_num, max_uid_for_loop * sizeof (int));
425 /* Allocate tables for recording each loop. We set each entry, so they need
427 loop_number_loop_starts = (rtx *) alloca (max_loop_num * sizeof (rtx));
428 loop_number_loop_ends = (rtx *) alloca (max_loop_num * sizeof (rtx));
429 loop_outer_loop = (int *) alloca (max_loop_num * sizeof (int));
430 loop_invalid = (char *) alloca (max_loop_num * sizeof (char));
431 loop_number_exit_labels = (rtx *) alloca (max_loop_num * sizeof (rtx));
432 loop_number_exit_count = (int *) alloca (max_loop_num * sizeof (int));
434 /* This is initialized by the unrolling code, so we go ahead
435 and clear them just in case we are not performing loop
437 loop_unroll_factor = (int *) alloca (max_loop_num *sizeof (int));
438 bzero ((char *) loop_unroll_factor, max_loop_num * sizeof (int));
441 /* Allocate for BCT optimization */
442 loop_can_insert_bct = (int *) alloca (max_loop_num * sizeof (int));
443 bzero ((char *) loop_can_insert_bct, max_loop_num * sizeof (int));
445 loop_used_count_register = (int *) alloca (max_loop_num * sizeof (int));
446 bzero ((char *) loop_used_count_register, max_loop_num * sizeof (int));
448 loop_increment = (rtx *) alloca (max_loop_num * sizeof (rtx));
449 loop_comparison_value = (rtx *) alloca (max_loop_num * sizeof (rtx));
450 loop_start_value = (rtx *) alloca (max_loop_num * sizeof (rtx));
451 bzero ((char *) loop_increment, max_loop_num * sizeof (rtx));
452 bzero ((char *) loop_comparison_value, max_loop_num * sizeof (rtx));
453 bzero ((char *) loop_start_value, max_loop_num * sizeof (rtx));
456 = (enum rtx_code *) alloca (max_loop_num * sizeof (enum rtx_code));
457 bzero ((char *) loop_comparison_code, max_loop_num * sizeof (enum rtx_code));
460 /* Find and process each loop.
461 First, find them, and record them in order of their beginnings. */
462 find_and_verify_loops (f);
464 /* Now find all register lifetimes. This must be done after
465 find_and_verify_loops, because it might reorder the insns in the
467 reg_scan (f, max_reg_num (), 1);
469 /* See if we went too far. */
470 if (get_max_uid () > max_uid_for_loop)
473 /* Compute the mapping from uids to luids.
474 LUIDs are numbers assigned to insns, like uids,
475 except that luids increase monotonically through the code.
476 Don't assign luids to line-number NOTEs, so that the distance in luids
477 between two insns is not affected by -g. */
479 for (insn = f, i = 0; insn; insn = NEXT_INSN (insn))
482 if (GET_CODE (insn) != NOTE
483 || NOTE_LINE_NUMBER (insn) <= 0)
484 uid_luid[INSN_UID (insn)] = ++i;
486 /* Give a line number note the same luid as preceding insn. */
487 uid_luid[INSN_UID (insn)] = i;
492 /* Don't leave gaps in uid_luid for insns that have been
493 deleted. It is possible that the first or last insn
494 using some register has been deleted by cross-jumping.
495 Make sure that uid_luid for that former insn's uid
496 points to the general area where that insn used to be. */
497 for (i = 0; i < max_uid_for_loop; i++)
499 uid_luid[0] = uid_luid[i];
500 if (uid_luid[0] != 0)
503 for (i = 0; i < max_uid_for_loop; i++)
504 if (uid_luid[i] == 0)
505 uid_luid[i] = uid_luid[i - 1];
507 /* Create a mapping from loops to BLOCK tree nodes. */
508 if (unroll_p && write_symbols != NO_DEBUG)
509 find_loop_tree_blocks ();
511 /* Determine if the function has indirect jump. On some systems
512 this prevents low overhead loop instructions from being used. */
513 indirect_jump_in_function = indirect_jump_in_function_p (f);
515 /* Now scan the loops, last ones first, since this means inner ones are done
516 before outer ones. */
517 for (i = max_loop_num-1; i >= 0; i--)
518 if (! loop_invalid[i] && loop_number_loop_ends[i])
519 scan_loop (loop_number_loop_starts[i], loop_number_loop_ends[i],
520 max_reg_num (), unroll_p);
522 /* If debugging and unrolling loops, we must replicate the tree nodes
523 corresponding to the blocks inside the loop, so that the original one
524 to one mapping will remain. */
525 if (unroll_p && write_symbols != NO_DEBUG)
526 unroll_block_trees ();
529 /* Optimize one loop whose start is LOOP_START and end is END.
530 LOOP_START is the NOTE_INSN_LOOP_BEG and END is the matching
531 NOTE_INSN_LOOP_END. */
533 /* ??? Could also move memory writes out of loops if the destination address
534 is invariant, the source is invariant, the memory write is not volatile,
535 and if we can prove that no read inside the loop can read this address
536 before the write occurs. If there is a read of this address after the
537 write, then we can also mark the memory read as invariant. */
540 scan_loop (loop_start, end, nregs, unroll_p)
547 /* 1 if we are scanning insns that could be executed zero times. */
549 /* 1 if we are scanning insns that might never be executed
550 due to a subroutine call which might exit before they are reached. */
552 /* For a rotated loop that is entered near the bottom,
553 this is the label at the top. Otherwise it is zero. */
555 /* Jump insn that enters the loop, or 0 if control drops in. */
556 rtx loop_entry_jump = 0;
557 /* Place in the loop where control enters. */
559 /* Number of insns in the loop. */
564 /* The SET from an insn, if it is the only SET in the insn. */
566 /* Chain describing insns movable in current loop. */
567 struct movable *movables = 0;
568 /* Last element in `movables' -- so we can add elements at the end. */
569 struct movable *last_movable = 0;
570 /* Ratio of extra register life span we can justify
571 for saving an instruction. More if loop doesn't call subroutines
572 since in that case saving an insn makes more difference
573 and more registers are available. */
575 /* If we have calls, contains the insn in which a register was used
576 if it was used exactly once; contains const0_rtx if it was used more
578 rtx *reg_single_usage = 0;
579 /* Nonzero if we are scanning instructions in a sub-loop. */
582 n_times_set = (int *) alloca (nregs * sizeof (int));
583 n_times_used = (int *) alloca (nregs * sizeof (int));
584 may_not_optimize = (char *) alloca (nregs);
586 /* Determine whether this loop starts with a jump down to a test at
587 the end. This will occur for a small number of loops with a test
588 that is too complex to duplicate in front of the loop.
590 We search for the first insn or label in the loop, skipping NOTEs.
591 However, we must be careful not to skip past a NOTE_INSN_LOOP_BEG
592 (because we might have a loop executed only once that contains a
593 loop which starts with a jump to its exit test) or a NOTE_INSN_LOOP_END
594 (in case we have a degenerate loop).
596 Note that if we mistakenly think that a loop is entered at the top
597 when, in fact, it is entered at the exit test, the only effect will be
598 slightly poorer optimization. Making the opposite error can generate
599 incorrect code. Since very few loops now start with a jump to the
600 exit test, the code here to detect that case is very conservative. */
602 for (p = NEXT_INSN (loop_start);
604 && GET_CODE (p) != CODE_LABEL && GET_RTX_CLASS (GET_CODE (p)) != 'i'
605 && (GET_CODE (p) != NOTE
606 || (NOTE_LINE_NUMBER (p) != NOTE_INSN_LOOP_BEG
607 && NOTE_LINE_NUMBER (p) != NOTE_INSN_LOOP_END));
613 /* Set up variables describing this loop. */
614 prescan_loop (loop_start, end);
615 threshold = (loop_has_call ? 1 : 2) * (1 + n_non_fixed_regs);
617 /* If loop has a jump before the first label,
618 the true entry is the target of that jump.
619 Start scan from there.
620 But record in LOOP_TOP the place where the end-test jumps
621 back to so we can scan that after the end of the loop. */
622 if (GET_CODE (p) == JUMP_INSN)
626 /* Loop entry must be unconditional jump (and not a RETURN) */
628 && JUMP_LABEL (p) != 0
629 /* Check to see whether the jump actually
630 jumps out of the loop (meaning it's no loop).
631 This case can happen for things like
632 do {..} while (0). If this label was generated previously
633 by loop, we can't tell anything about it and have to reject
635 && INSN_UID (JUMP_LABEL (p)) < max_uid_for_loop
636 && INSN_LUID (JUMP_LABEL (p)) >= INSN_LUID (loop_start)
637 && INSN_LUID (JUMP_LABEL (p)) < INSN_LUID (end))
639 loop_top = next_label (scan_start);
640 scan_start = JUMP_LABEL (p);
644 /* If SCAN_START was an insn created by loop, we don't know its luid
645 as required by loop_reg_used_before_p. So skip such loops. (This
646 test may never be true, but it's best to play it safe.)
648 Also, skip loops where we do not start scanning at a label. This
649 test also rejects loops starting with a JUMP_INSN that failed the
652 if (INSN_UID (scan_start) >= max_uid_for_loop
653 || GET_CODE (scan_start) != CODE_LABEL)
655 if (loop_dump_stream)
656 fprintf (loop_dump_stream, "\nLoop from %d to %d is phony.\n\n",
657 INSN_UID (loop_start), INSN_UID (end));
661 /* Count number of times each reg is set during this loop.
662 Set may_not_optimize[I] if it is not safe to move out
663 the setting of register I. If this loop has calls, set
664 reg_single_usage[I]. */
666 bzero ((char *) n_times_set, nregs * sizeof (int));
667 bzero (may_not_optimize, nregs);
671 reg_single_usage = (rtx *) alloca (nregs * sizeof (rtx));
672 bzero ((char *) reg_single_usage, nregs * sizeof (rtx));
675 count_loop_regs_set (loop_top ? loop_top : loop_start, end,
676 may_not_optimize, reg_single_usage, &insn_count, nregs);
678 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
679 may_not_optimize[i] = 1, n_times_set[i] = 1;
680 bcopy ((char *) n_times_set, (char *) n_times_used, nregs * sizeof (int));
682 if (loop_dump_stream)
684 fprintf (loop_dump_stream, "\nLoop from %d to %d: %d real insns.\n",
685 INSN_UID (loop_start), INSN_UID (end), insn_count);
687 fprintf (loop_dump_stream, "Continue at insn %d.\n",
688 INSN_UID (loop_continue));
691 /* Scan through the loop finding insns that are safe to move.
692 Set n_times_set negative for the reg being set, so that
693 this reg will be considered invariant for subsequent insns.
694 We consider whether subsequent insns use the reg
695 in deciding whether it is worth actually moving.
697 MAYBE_NEVER is nonzero if we have passed a conditional jump insn
698 and therefore it is possible that the insns we are scanning
699 would never be executed. At such times, we must make sure
700 that it is safe to execute the insn once instead of zero times.
701 When MAYBE_NEVER is 0, all insns will be executed at least once
702 so that is not a problem. */
708 /* At end of a straight-in loop, we are done.
709 At end of a loop entered at the bottom, scan the top. */
722 if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
723 && find_reg_note (p, REG_LIBCALL, NULL_RTX))
725 else if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
726 && find_reg_note (p, REG_RETVAL, NULL_RTX))
729 if (GET_CODE (p) == INSN
730 && (set = single_set (p))
731 && GET_CODE (SET_DEST (set)) == REG
732 && ! may_not_optimize[REGNO (SET_DEST (set))])
737 rtx src = SET_SRC (set);
738 rtx dependencies = 0;
740 /* Figure out what to use as a source of this insn. If a REG_EQUIV
741 note is given or if a REG_EQUAL note with a constant operand is
742 specified, use it as the source and mark that we should move
743 this insn by calling emit_move_insn rather that duplicating the
746 Otherwise, only use the REG_EQUAL contents if a REG_RETVAL note
748 temp = find_reg_note (p, REG_EQUIV, NULL_RTX);
750 src = XEXP (temp, 0), move_insn = 1;
753 temp = find_reg_note (p, REG_EQUAL, NULL_RTX);
754 if (temp && CONSTANT_P (XEXP (temp, 0)))
755 src = XEXP (temp, 0), move_insn = 1;
756 if (temp && find_reg_note (p, REG_RETVAL, NULL_RTX))
758 src = XEXP (temp, 0);
759 /* A libcall block can use regs that don't appear in
760 the equivalent expression. To move the libcall,
761 we must move those regs too. */
762 dependencies = libcall_other_reg (p, src);
766 /* Don't try to optimize a register that was made
767 by loop-optimization for an inner loop.
768 We don't know its life-span, so we can't compute the benefit. */
769 if (REGNO (SET_DEST (set)) >= max_reg_before_loop)
771 /* In order to move a register, we need to have one of three cases:
772 (1) it is used only in the same basic block as the set
773 (2) it is not a user variable and it is not used in the
774 exit test (this can cause the variable to be used
775 before it is set just like a user-variable).
776 (3) the set is guaranteed to be executed once the loop starts,
777 and the reg is not used until after that. */
778 else if (! ((! maybe_never
779 && ! loop_reg_used_before_p (set, p, loop_start,
781 || (! REG_USERVAR_P (SET_DEST (set))
782 && ! REG_LOOP_TEST_P (SET_DEST (set)))
783 || reg_in_basic_block_p (p, SET_DEST (set))))
785 else if ((tem = invariant_p (src))
786 && (dependencies == 0
787 || (tem2 = invariant_p (dependencies)) != 0)
788 && (n_times_set[REGNO (SET_DEST (set))] == 1
790 = consec_sets_invariant_p (SET_DEST (set),
791 n_times_set[REGNO (SET_DEST (set))],
793 /* If the insn can cause a trap (such as divide by zero),
794 can't move it unless it's guaranteed to be executed
795 once loop is entered. Even a function call might
796 prevent the trap insn from being reached
797 (since it might exit!) */
798 && ! ((maybe_never || call_passed)
799 && may_trap_p (src)))
801 register struct movable *m;
802 register int regno = REGNO (SET_DEST (set));
804 /* A potential lossage is where we have a case where two insns
805 can be combined as long as they are both in the loop, but
806 we move one of them outside the loop. For large loops,
807 this can lose. The most common case of this is the address
808 of a function being called.
810 Therefore, if this register is marked as being used exactly
811 once if we are in a loop with calls (a "large loop"), see if
812 we can replace the usage of this register with the source
813 of this SET. If we can, delete this insn.
815 Don't do this if P has a REG_RETVAL note or if we have
816 SMALL_REGISTER_CLASSES and SET_SRC is a hard register. */
818 if (reg_single_usage && reg_single_usage[regno] != 0
819 && reg_single_usage[regno] != const0_rtx
820 && REGNO_FIRST_UID (regno) == INSN_UID (p)
821 && (REGNO_LAST_UID (regno)
822 == INSN_UID (reg_single_usage[regno]))
823 && n_times_set[REGNO (SET_DEST (set))] == 1
824 && ! side_effects_p (SET_SRC (set))
825 && ! find_reg_note (p, REG_RETVAL, NULL_RTX)
826 && (! SMALL_REGISTER_CLASSES
827 || (! (GET_CODE (SET_SRC (set)) == REG
828 && REGNO (SET_SRC (set)) < FIRST_PSEUDO_REGISTER)))
829 /* This test is not redundant; SET_SRC (set) might be
830 a call-clobbered register and the life of REGNO
831 might span a call. */
832 && ! modified_between_p (SET_SRC (set), p,
833 reg_single_usage[regno])
834 && no_labels_between_p (p, reg_single_usage[regno])
835 && validate_replace_rtx (SET_DEST (set), SET_SRC (set),
836 reg_single_usage[regno]))
838 /* Replace any usage in a REG_EQUAL note. Must copy the
839 new source, so that we don't get rtx sharing between the
840 SET_SOURCE and REG_NOTES of insn p. */
841 REG_NOTES (reg_single_usage[regno])
842 = replace_rtx (REG_NOTES (reg_single_usage[regno]),
843 SET_DEST (set), copy_rtx (SET_SRC (set)));
846 NOTE_LINE_NUMBER (p) = NOTE_INSN_DELETED;
847 NOTE_SOURCE_FILE (p) = 0;
848 n_times_set[regno] = 0;
852 m = (struct movable *) alloca (sizeof (struct movable));
856 m->dependencies = dependencies;
857 m->set_dest = SET_DEST (set);
859 m->consec = n_times_set[REGNO (SET_DEST (set))] - 1;
863 m->move_insn = move_insn;
864 m->is_equiv = (find_reg_note (p, REG_EQUIV, NULL_RTX) != 0);
865 m->savemode = VOIDmode;
867 /* Set M->cond if either invariant_p or consec_sets_invariant_p
868 returned 2 (only conditionally invariant). */
869 m->cond = ((tem | tem1 | tem2) > 1);
870 m->global = (uid_luid[REGNO_LAST_UID (regno)] > INSN_LUID (end)
871 || uid_luid[REGNO_FIRST_UID (regno)] < INSN_LUID (loop_start));
873 m->lifetime = (uid_luid[REGNO_LAST_UID (regno)]
874 - uid_luid[REGNO_FIRST_UID (regno)]);
875 m->savings = n_times_used[regno];
876 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
877 m->savings += libcall_benefit (p);
878 n_times_set[regno] = move_insn ? -2 : -1;
879 /* Add M to the end of the chain MOVABLES. */
883 last_movable->next = m;
888 /* Skip this insn, not checking REG_LIBCALL notes. */
889 p = next_nonnote_insn (p);
890 /* Skip the consecutive insns, if there are any. */
891 p = skip_consec_insns (p, m->consec);
892 /* Back up to the last insn of the consecutive group. */
893 p = prev_nonnote_insn (p);
895 /* We must now reset m->move_insn, m->is_equiv, and possibly
896 m->set_src to correspond to the effects of all the
898 temp = find_reg_note (p, REG_EQUIV, NULL_RTX);
900 m->set_src = XEXP (temp, 0), m->move_insn = 1;
903 temp = find_reg_note (p, REG_EQUAL, NULL_RTX);
904 if (temp && CONSTANT_P (XEXP (temp, 0)))
905 m->set_src = XEXP (temp, 0), m->move_insn = 1;
910 m->is_equiv = (find_reg_note (p, REG_EQUIV, NULL_RTX) != 0);
913 /* If this register is always set within a STRICT_LOW_PART
914 or set to zero, then its high bytes are constant.
915 So clear them outside the loop and within the loop
916 just load the low bytes.
917 We must check that the machine has an instruction to do so.
918 Also, if the value loaded into the register
919 depends on the same register, this cannot be done. */
920 else if (SET_SRC (set) == const0_rtx
921 && GET_CODE (NEXT_INSN (p)) == INSN
922 && (set1 = single_set (NEXT_INSN (p)))
923 && GET_CODE (set1) == SET
924 && (GET_CODE (SET_DEST (set1)) == STRICT_LOW_PART)
925 && (GET_CODE (XEXP (SET_DEST (set1), 0)) == SUBREG)
926 && (SUBREG_REG (XEXP (SET_DEST (set1), 0))
928 && !reg_mentioned_p (SET_DEST (set), SET_SRC (set1)))
930 register int regno = REGNO (SET_DEST (set));
931 if (n_times_set[regno] == 2)
933 register struct movable *m;
934 m = (struct movable *) alloca (sizeof (struct movable));
937 m->set_dest = SET_DEST (set);
945 /* If the insn may not be executed on some cycles,
946 we can't clear the whole reg; clear just high part.
947 Not even if the reg is used only within this loop.
954 Clearing x before the inner loop could clobber a value
955 being saved from the last time around the outer loop.
956 However, if the reg is not used outside this loop
957 and all uses of the register are in the same
958 basic block as the store, there is no problem.
960 If this insn was made by loop, we don't know its
961 INSN_LUID and hence must make a conservative
963 m->global = (INSN_UID (p) >= max_uid_for_loop
964 || (uid_luid[REGNO_LAST_UID (regno)]
966 || (uid_luid[REGNO_FIRST_UID (regno)]
968 || (labels_in_range_p
969 (p, uid_luid[REGNO_FIRST_UID (regno)])));
970 if (maybe_never && m->global)
971 m->savemode = GET_MODE (SET_SRC (set1));
973 m->savemode = VOIDmode;
977 m->lifetime = (uid_luid[REGNO_LAST_UID (regno)]
978 - uid_luid[REGNO_FIRST_UID (regno)]);
980 n_times_set[regno] = -1;
981 /* Add M to the end of the chain MOVABLES. */
985 last_movable->next = m;
990 /* Past a call insn, we get to insns which might not be executed
991 because the call might exit. This matters for insns that trap.
992 Call insns inside a REG_LIBCALL/REG_RETVAL block always return,
993 so they don't count. */
994 else if (GET_CODE (p) == CALL_INSN && ! in_libcall)
996 /* Past a label or a jump, we get to insns for which we
997 can't count on whether or how many times they will be
998 executed during each iteration. Therefore, we can
999 only move out sets of trivial variables
1000 (those not used after the loop). */
1001 /* Similar code appears twice in strength_reduce. */
1002 else if ((GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN)
1003 /* If we enter the loop in the middle, and scan around to the
1004 beginning, don't set maybe_never for that. This must be an
1005 unconditional jump, otherwise the code at the top of the
1006 loop might never be executed. Unconditional jumps are
1007 followed a by barrier then loop end. */
1008 && ! (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p) == loop_top
1009 && NEXT_INSN (NEXT_INSN (p)) == end
1010 && simplejump_p (p)))
1012 else if (GET_CODE (p) == NOTE)
1014 /* At the virtual top of a converted loop, insns are again known to
1015 be executed: logically, the loop begins here even though the exit
1016 code has been duplicated. */
1017 if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP && loop_depth == 0)
1018 maybe_never = call_passed = 0;
1019 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
1021 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
1026 /* If one movable subsumes another, ignore that other. */
1028 ignore_some_movables (movables);
1030 /* For each movable insn, see if the reg that it loads
1031 leads when it dies right into another conditionally movable insn.
1032 If so, record that the second insn "forces" the first one,
1033 since the second can be moved only if the first is. */
1035 force_movables (movables);
1037 /* See if there are multiple movable insns that load the same value.
1038 If there are, make all but the first point at the first one
1039 through the `match' field, and add the priorities of them
1040 all together as the priority of the first. */
1042 combine_movables (movables, nregs);
1044 /* Now consider each movable insn to decide whether it is worth moving.
1045 Store 0 in n_times_set for each reg that is moved. */
1047 move_movables (movables, threshold,
1048 insn_count, loop_start, end, nregs);
1050 /* Now candidates that still are negative are those not moved.
1051 Change n_times_set to indicate that those are not actually invariant. */
1052 for (i = 0; i < nregs; i++)
1053 if (n_times_set[i] < 0)
1054 n_times_set[i] = n_times_used[i];
1056 if (flag_strength_reduce)
1057 strength_reduce (scan_start, end, loop_top,
1058 insn_count, loop_start, end, unroll_p);
1061 /* Add elements to *OUTPUT to record all the pseudo-regs
1062 mentioned in IN_THIS but not mentioned in NOT_IN_THIS. */
1065 record_excess_regs (in_this, not_in_this, output)
1066 rtx in_this, not_in_this;
1073 code = GET_CODE (in_this);
1087 if (REGNO (in_this) >= FIRST_PSEUDO_REGISTER
1088 && ! reg_mentioned_p (in_this, not_in_this))
1089 *output = gen_rtx_EXPR_LIST (VOIDmode, in_this, *output);
1096 fmt = GET_RTX_FORMAT (code);
1097 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1104 for (j = 0; j < XVECLEN (in_this, i); j++)
1105 record_excess_regs (XVECEXP (in_this, i, j), not_in_this, output);
1109 record_excess_regs (XEXP (in_this, i), not_in_this, output);
1115 /* Check what regs are referred to in the libcall block ending with INSN,
1116 aside from those mentioned in the equivalent value.
1117 If there are none, return 0.
1118 If there are one or more, return an EXPR_LIST containing all of them. */
1121 libcall_other_reg (insn, equiv)
1124 rtx note = find_reg_note (insn, REG_RETVAL, NULL_RTX);
1125 rtx p = XEXP (note, 0);
1128 /* First, find all the regs used in the libcall block
1129 that are not mentioned as inputs to the result. */
1133 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
1134 || GET_CODE (p) == CALL_INSN)
1135 record_excess_regs (PATTERN (p), equiv, &output);
1142 /* Return 1 if all uses of REG
1143 are between INSN and the end of the basic block. */
1146 reg_in_basic_block_p (insn, reg)
1149 int regno = REGNO (reg);
1152 if (REGNO_FIRST_UID (regno) != INSN_UID (insn))
1155 /* Search this basic block for the already recorded last use of the reg. */
1156 for (p = insn; p; p = NEXT_INSN (p))
1158 switch (GET_CODE (p))
1165 /* Ordinary insn: if this is the last use, we win. */
1166 if (REGNO_LAST_UID (regno) == INSN_UID (p))
1171 /* Jump insn: if this is the last use, we win. */
1172 if (REGNO_LAST_UID (regno) == INSN_UID (p))
1174 /* Otherwise, it's the end of the basic block, so we lose. */
1179 /* It's the end of the basic block, so we lose. */
1187 /* The "last use" doesn't follow the "first use"?? */
1191 /* Compute the benefit of eliminating the insns in the block whose
1192 last insn is LAST. This may be a group of insns used to compute a
1193 value directly or can contain a library call. */
1196 libcall_benefit (last)
1202 for (insn = XEXP (find_reg_note (last, REG_RETVAL, NULL_RTX), 0);
1203 insn != last; insn = NEXT_INSN (insn))
1205 if (GET_CODE (insn) == CALL_INSN)
1206 benefit += 10; /* Assume at least this many insns in a library
1208 else if (GET_CODE (insn) == INSN
1209 && GET_CODE (PATTERN (insn)) != USE
1210 && GET_CODE (PATTERN (insn)) != CLOBBER)
1217 /* Skip COUNT insns from INSN, counting library calls as 1 insn. */
1220 skip_consec_insns (insn, count)
1224 for (; count > 0; count--)
1228 /* If first insn of libcall sequence, skip to end. */
1229 /* Do this at start of loop, since INSN is guaranteed to
1231 if (GET_CODE (insn) != NOTE
1232 && (temp = find_reg_note (insn, REG_LIBCALL, NULL_RTX)))
1233 insn = XEXP (temp, 0);
1235 do insn = NEXT_INSN (insn);
1236 while (GET_CODE (insn) == NOTE);
1242 /* Ignore any movable whose insn falls within a libcall
1243 which is part of another movable.
1244 We make use of the fact that the movable for the libcall value
1245 was made later and so appears later on the chain. */
1248 ignore_some_movables (movables)
1249 struct movable *movables;
1251 register struct movable *m, *m1;
1253 for (m = movables; m; m = m->next)
1255 /* Is this a movable for the value of a libcall? */
1256 rtx note = find_reg_note (m->insn, REG_RETVAL, NULL_RTX);
1260 /* Check for earlier movables inside that range,
1261 and mark them invalid. We cannot use LUIDs here because
1262 insns created by loop.c for prior loops don't have LUIDs.
1263 Rather than reject all such insns from movables, we just
1264 explicitly check each insn in the libcall (since invariant
1265 libcalls aren't that common). */
1266 for (insn = XEXP (note, 0); insn != m->insn; insn = NEXT_INSN (insn))
1267 for (m1 = movables; m1 != m; m1 = m1->next)
1268 if (m1->insn == insn)
1274 /* For each movable insn, see if the reg that it loads
1275 leads when it dies right into another conditionally movable insn.
1276 If so, record that the second insn "forces" the first one,
1277 since the second can be moved only if the first is. */
1280 force_movables (movables)
1281 struct movable *movables;
1283 register struct movable *m, *m1;
1284 for (m1 = movables; m1; m1 = m1->next)
1285 /* Omit this if moving just the (SET (REG) 0) of a zero-extend. */
1286 if (!m1->partial && !m1->done)
1288 int regno = m1->regno;
1289 for (m = m1->next; m; m = m->next)
1290 /* ??? Could this be a bug? What if CSE caused the
1291 register of M1 to be used after this insn?
1292 Since CSE does not update regno_last_uid,
1293 this insn M->insn might not be where it dies.
1294 But very likely this doesn't matter; what matters is
1295 that M's reg is computed from M1's reg. */
1296 if (INSN_UID (m->insn) == REGNO_LAST_UID (regno)
1299 if (m != 0 && m->set_src == m1->set_dest
1300 /* If m->consec, m->set_src isn't valid. */
1304 /* Increase the priority of the moving the first insn
1305 since it permits the second to be moved as well. */
1309 m1->lifetime += m->lifetime;
1310 m1->savings += m->savings;
1315 /* Find invariant expressions that are equal and can be combined into
1319 combine_movables (movables, nregs)
1320 struct movable *movables;
1323 register struct movable *m;
1324 char *matched_regs = (char *) alloca (nregs);
1325 enum machine_mode mode;
1327 /* Regs that are set more than once are not allowed to match
1328 or be matched. I'm no longer sure why not. */
1329 /* Perhaps testing m->consec_sets would be more appropriate here? */
1331 for (m = movables; m; m = m->next)
1332 if (m->match == 0 && n_times_used[m->regno] == 1 && !m->partial)
1334 register struct movable *m1;
1335 int regno = m->regno;
1337 bzero (matched_regs, nregs);
1338 matched_regs[regno] = 1;
1340 /* We want later insns to match the first one. Don't make the first
1341 one match any later ones. So start this loop at m->next. */
1342 for (m1 = m->next; m1; m1 = m1->next)
1343 if (m != m1 && m1->match == 0 && n_times_used[m1->regno] == 1
1344 /* A reg used outside the loop mustn't be eliminated. */
1346 /* A reg used for zero-extending mustn't be eliminated. */
1348 && (matched_regs[m1->regno]
1351 /* Can combine regs with different modes loaded from the
1352 same constant only if the modes are the same or
1353 if both are integer modes with M wider or the same
1354 width as M1. The check for integer is redundant, but
1355 safe, since the only case of differing destination
1356 modes with equal sources is when both sources are
1357 VOIDmode, i.e., CONST_INT. */
1358 (GET_MODE (m->set_dest) == GET_MODE (m1->set_dest)
1359 || (GET_MODE_CLASS (GET_MODE (m->set_dest)) == MODE_INT
1360 && GET_MODE_CLASS (GET_MODE (m1->set_dest)) == MODE_INT
1361 && (GET_MODE_BITSIZE (GET_MODE (m->set_dest))
1362 >= GET_MODE_BITSIZE (GET_MODE (m1->set_dest)))))
1363 /* See if the source of M1 says it matches M. */
1364 && ((GET_CODE (m1->set_src) == REG
1365 && matched_regs[REGNO (m1->set_src)])
1366 || rtx_equal_for_loop_p (m->set_src, m1->set_src,
1368 && ((m->dependencies == m1->dependencies)
1369 || rtx_equal_p (m->dependencies, m1->dependencies)))
1371 m->lifetime += m1->lifetime;
1372 m->savings += m1->savings;
1375 matched_regs[m1->regno] = 1;
1379 /* Now combine the regs used for zero-extension.
1380 This can be done for those not marked `global'
1381 provided their lives don't overlap. */
1383 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
1384 mode = GET_MODE_WIDER_MODE (mode))
1386 register struct movable *m0 = 0;
1388 /* Combine all the registers for extension from mode MODE.
1389 Don't combine any that are used outside this loop. */
1390 for (m = movables; m; m = m->next)
1391 if (m->partial && ! m->global
1392 && mode == GET_MODE (SET_SRC (PATTERN (NEXT_INSN (m->insn)))))
1394 register struct movable *m1;
1395 int first = uid_luid[REGNO_FIRST_UID (m->regno)];
1396 int last = uid_luid[REGNO_LAST_UID (m->regno)];
1400 /* First one: don't check for overlap, just record it. */
1405 /* Make sure they extend to the same mode.
1406 (Almost always true.) */
1407 if (GET_MODE (m->set_dest) != GET_MODE (m0->set_dest))
1410 /* We already have one: check for overlap with those
1411 already combined together. */
1412 for (m1 = movables; m1 != m; m1 = m1->next)
1413 if (m1 == m0 || (m1->partial && m1->match == m0))
1414 if (! (uid_luid[REGNO_FIRST_UID (m1->regno)] > last
1415 || uid_luid[REGNO_LAST_UID (m1->regno)] < first))
1418 /* No overlap: we can combine this with the others. */
1419 m0->lifetime += m->lifetime;
1420 m0->savings += m->savings;
1429 /* Return 1 if regs X and Y will become the same if moved. */
1432 regs_match_p (x, y, movables)
1434 struct movable *movables;
1438 struct movable *mx, *my;
1440 for (mx = movables; mx; mx = mx->next)
1441 if (mx->regno == xn)
1444 for (my = movables; my; my = my->next)
1445 if (my->regno == yn)
1449 && ((mx->match == my->match && mx->match != 0)
1451 || mx == my->match));
1454 /* Return 1 if X and Y are identical-looking rtx's.
1455 This is the Lisp function EQUAL for rtx arguments.
1457 If two registers are matching movables or a movable register and an
1458 equivalent constant, consider them equal. */
1461 rtx_equal_for_loop_p (x, y, movables)
1463 struct movable *movables;
1467 register struct movable *m;
1468 register enum rtx_code code;
1473 if (x == 0 || y == 0)
1476 code = GET_CODE (x);
1478 /* If we have a register and a constant, they may sometimes be
1480 if (GET_CODE (x) == REG && n_times_set[REGNO (x)] == -2
1483 for (m = movables; m; m = m->next)
1484 if (m->move_insn && m->regno == REGNO (x)
1485 && rtx_equal_p (m->set_src, y))
1488 else if (GET_CODE (y) == REG && n_times_set[REGNO (y)] == -2
1491 for (m = movables; m; m = m->next)
1492 if (m->move_insn && m->regno == REGNO (y)
1493 && rtx_equal_p (m->set_src, x))
1497 /* Otherwise, rtx's of different codes cannot be equal. */
1498 if (code != GET_CODE (y))
1501 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
1502 (REG:SI x) and (REG:HI x) are NOT equivalent. */
1504 if (GET_MODE (x) != GET_MODE (y))
1507 /* These three types of rtx's can be compared nonrecursively. */
1509 return (REGNO (x) == REGNO (y) || regs_match_p (x, y, movables));
1511 if (code == LABEL_REF)
1512 return XEXP (x, 0) == XEXP (y, 0);
1513 if (code == SYMBOL_REF)
1514 return XSTR (x, 0) == XSTR (y, 0);
1516 /* Compare the elements. If any pair of corresponding elements
1517 fail to match, return 0 for the whole things. */
1519 fmt = GET_RTX_FORMAT (code);
1520 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1525 if (XWINT (x, i) != XWINT (y, i))
1530 if (XINT (x, i) != XINT (y, i))
1535 /* Two vectors must have the same length. */
1536 if (XVECLEN (x, i) != XVECLEN (y, i))
1539 /* And the corresponding elements must match. */
1540 for (j = 0; j < XVECLEN (x, i); j++)
1541 if (rtx_equal_for_loop_p (XVECEXP (x, i, j), XVECEXP (y, i, j), movables) == 0)
1546 if (rtx_equal_for_loop_p (XEXP (x, i), XEXP (y, i), movables) == 0)
1551 if (strcmp (XSTR (x, i), XSTR (y, i)))
1556 /* These are just backpointers, so they don't matter. */
1562 /* It is believed that rtx's at this level will never
1563 contain anything but integers and other rtx's,
1564 except for within LABEL_REFs and SYMBOL_REFs. */
1572 /* If X contains any LABEL_REF's, add REG_LABEL notes for them to all
1573 insns in INSNS which use thet reference. */
1576 add_label_notes (x, insns)
1580 enum rtx_code code = GET_CODE (x);
1585 if (code == LABEL_REF && !LABEL_REF_NONLOCAL_P (x))
1587 rtx next = next_real_insn (XEXP (x, 0));
1589 /* Don't record labels that refer to dispatch tables.
1590 This is not necessary, since the tablejump references the same label.
1591 And if we did record them, flow.c would make worse code. */
1593 || ! (GET_CODE (next) == JUMP_INSN
1594 && (GET_CODE (PATTERN (next)) == ADDR_VEC
1595 || GET_CODE (PATTERN (next)) == ADDR_DIFF_VEC)))
1597 for (insn = insns; insn; insn = NEXT_INSN (insn))
1598 if (reg_mentioned_p (XEXP (x, 0), insn))
1599 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_LABEL, XEXP (x, 0),
1605 fmt = GET_RTX_FORMAT (code);
1606 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1609 add_label_notes (XEXP (x, i), insns);
1610 else if (fmt[i] == 'E')
1611 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1612 add_label_notes (XVECEXP (x, i, j), insns);
1616 /* Scan MOVABLES, and move the insns that deserve to be moved.
1617 If two matching movables are combined, replace one reg with the
1618 other throughout. */
1621 move_movables (movables, threshold, insn_count, loop_start, end, nregs)
1622 struct movable *movables;
1630 register struct movable *m;
1632 /* Map of pseudo-register replacements to handle combining
1633 when we move several insns that load the same value
1634 into different pseudo-registers. */
1635 rtx *reg_map = (rtx *) alloca (nregs * sizeof (rtx));
1636 char *already_moved = (char *) alloca (nregs);
1638 bzero (already_moved, nregs);
1639 bzero ((char *) reg_map, nregs * sizeof (rtx));
1643 for (m = movables; m; m = m->next)
1645 /* Describe this movable insn. */
1647 if (loop_dump_stream)
1649 fprintf (loop_dump_stream, "Insn %d: regno %d (life %d), ",
1650 INSN_UID (m->insn), m->regno, m->lifetime);
1652 fprintf (loop_dump_stream, "consec %d, ", m->consec);
1654 fprintf (loop_dump_stream, "cond ");
1656 fprintf (loop_dump_stream, "force ");
1658 fprintf (loop_dump_stream, "global ");
1660 fprintf (loop_dump_stream, "done ");
1662 fprintf (loop_dump_stream, "move-insn ");
1664 fprintf (loop_dump_stream, "matches %d ",
1665 INSN_UID (m->match->insn));
1667 fprintf (loop_dump_stream, "forces %d ",
1668 INSN_UID (m->forces->insn));
1671 /* Count movables. Value used in heuristics in strength_reduce. */
1674 /* Ignore the insn if it's already done (it matched something else).
1675 Otherwise, see if it is now safe to move. */
1679 || (1 == invariant_p (m->set_src)
1680 && (m->dependencies == 0
1681 || 1 == invariant_p (m->dependencies))
1683 || 1 == consec_sets_invariant_p (m->set_dest,
1686 && (! m->forces || m->forces->done))
1690 int savings = m->savings;
1692 /* We have an insn that is safe to move.
1693 Compute its desirability. */
1698 if (loop_dump_stream)
1699 fprintf (loop_dump_stream, "savings %d ", savings);
1701 if (moved_once[regno])
1705 if (loop_dump_stream)
1706 fprintf (loop_dump_stream, "halved since already moved ");
1709 /* An insn MUST be moved if we already moved something else
1710 which is safe only if this one is moved too: that is,
1711 if already_moved[REGNO] is nonzero. */
1713 /* An insn is desirable to move if the new lifetime of the
1714 register is no more than THRESHOLD times the old lifetime.
1715 If it's not desirable, it means the loop is so big
1716 that moving won't speed things up much,
1717 and it is liable to make register usage worse. */
1719 /* It is also desirable to move if it can be moved at no
1720 extra cost because something else was already moved. */
1722 if (already_moved[regno]
1723 || flag_move_all_movables
1724 || (threshold * savings * m->lifetime) >= insn_count
1725 || (m->forces && m->forces->done
1726 && n_times_used[m->forces->regno] == 1))
1729 register struct movable *m1;
1732 /* Now move the insns that set the reg. */
1734 if (m->partial && m->match)
1738 /* Find the end of this chain of matching regs.
1739 Thus, we load each reg in the chain from that one reg.
1740 And that reg is loaded with 0 directly,
1741 since it has ->match == 0. */
1742 for (m1 = m; m1->match; m1 = m1->match);
1743 newpat = gen_move_insn (SET_DEST (PATTERN (m->insn)),
1744 SET_DEST (PATTERN (m1->insn)));
1745 i1 = emit_insn_before (newpat, loop_start);
1747 /* Mark the moved, invariant reg as being allowed to
1748 share a hard reg with the other matching invariant. */
1749 REG_NOTES (i1) = REG_NOTES (m->insn);
1750 r1 = SET_DEST (PATTERN (m->insn));
1751 r2 = SET_DEST (PATTERN (m1->insn));
1753 = gen_rtx_EXPR_LIST (VOIDmode, r1,
1754 gen_rtx_EXPR_LIST (VOIDmode, r2,
1756 delete_insn (m->insn);
1761 if (loop_dump_stream)
1762 fprintf (loop_dump_stream, " moved to %d", INSN_UID (i1));
1764 /* If we are to re-generate the item being moved with a
1765 new move insn, first delete what we have and then emit
1766 the move insn before the loop. */
1767 else if (m->move_insn)
1771 for (count = m->consec; count >= 0; count--)
1773 /* If this is the first insn of a library call sequence,
1775 if (GET_CODE (p) != NOTE
1776 && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
1779 /* If this is the last insn of a libcall sequence, then
1780 delete every insn in the sequence except the last.
1781 The last insn is handled in the normal manner. */
1782 if (GET_CODE (p) != NOTE
1783 && (temp = find_reg_note (p, REG_RETVAL, NULL_RTX)))
1785 temp = XEXP (temp, 0);
1787 temp = delete_insn (temp);
1790 p = delete_insn (p);
1791 while (p && GET_CODE (p) == NOTE)
1796 emit_move_insn (m->set_dest, m->set_src);
1797 temp = get_insns ();
1800 add_label_notes (m->set_src, temp);
1802 i1 = emit_insns_before (temp, loop_start);
1803 if (! find_reg_note (i1, REG_EQUAL, NULL_RTX))
1805 = gen_rtx_EXPR_LIST (m->is_equiv ? REG_EQUIV : REG_EQUAL,
1806 m->set_src, REG_NOTES (i1));
1808 if (loop_dump_stream)
1809 fprintf (loop_dump_stream, " moved to %d", INSN_UID (i1));
1811 /* The more regs we move, the less we like moving them. */
1816 for (count = m->consec; count >= 0; count--)
1820 /* If first insn of libcall sequence, skip to end. */
1821 /* Do this at start of loop, since p is guaranteed to
1823 if (GET_CODE (p) != NOTE
1824 && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
1827 /* If last insn of libcall sequence, move all
1828 insns except the last before the loop. The last
1829 insn is handled in the normal manner. */
1830 if (GET_CODE (p) != NOTE
1831 && (temp = find_reg_note (p, REG_RETVAL, NULL_RTX)))
1835 rtx fn_address_insn = 0;
1838 for (temp = XEXP (temp, 0); temp != p;
1839 temp = NEXT_INSN (temp))
1845 if (GET_CODE (temp) == NOTE)
1848 body = PATTERN (temp);
1850 /* Find the next insn after TEMP,
1851 not counting USE or NOTE insns. */
1852 for (next = NEXT_INSN (temp); next != p;
1853 next = NEXT_INSN (next))
1854 if (! (GET_CODE (next) == INSN
1855 && GET_CODE (PATTERN (next)) == USE)
1856 && GET_CODE (next) != NOTE)
1859 /* If that is the call, this may be the insn
1860 that loads the function address.
1862 Extract the function address from the insn
1863 that loads it into a register.
1864 If this insn was cse'd, we get incorrect code.
1866 So emit a new move insn that copies the
1867 function address into the register that the
1868 call insn will use. flow.c will delete any
1869 redundant stores that we have created. */
1870 if (GET_CODE (next) == CALL_INSN
1871 && GET_CODE (body) == SET
1872 && GET_CODE (SET_DEST (body)) == REG
1873 && (n = find_reg_note (temp, REG_EQUAL,
1876 fn_reg = SET_SRC (body);
1877 if (GET_CODE (fn_reg) != REG)
1878 fn_reg = SET_DEST (body);
1879 fn_address = XEXP (n, 0);
1880 fn_address_insn = temp;
1882 /* We have the call insn.
1883 If it uses the register we suspect it might,
1884 load it with the correct address directly. */
1885 if (GET_CODE (temp) == CALL_INSN
1887 && reg_referenced_p (fn_reg, body))
1888 emit_insn_after (gen_move_insn (fn_reg,
1892 if (GET_CODE (temp) == CALL_INSN)
1894 i1 = emit_call_insn_before (body, loop_start);
1895 /* Because the USAGE information potentially
1896 contains objects other than hard registers
1897 we need to copy it. */
1898 if (CALL_INSN_FUNCTION_USAGE (temp))
1899 CALL_INSN_FUNCTION_USAGE (i1)
1900 = copy_rtx (CALL_INSN_FUNCTION_USAGE (temp));
1903 i1 = emit_insn_before (body, loop_start);
1906 if (temp == fn_address_insn)
1907 fn_address_insn = i1;
1908 REG_NOTES (i1) = REG_NOTES (temp);
1912 if (m->savemode != VOIDmode)
1914 /* P sets REG to zero; but we should clear only
1915 the bits that are not covered by the mode
1917 rtx reg = m->set_dest;
1923 (GET_MODE (reg), and_optab, reg,
1924 GEN_INT ((((HOST_WIDE_INT) 1
1925 << GET_MODE_BITSIZE (m->savemode)))
1927 reg, 1, OPTAB_LIB_WIDEN);
1931 emit_move_insn (reg, tem);
1932 sequence = gen_sequence ();
1934 i1 = emit_insn_before (sequence, loop_start);
1936 else if (GET_CODE (p) == CALL_INSN)
1938 i1 = emit_call_insn_before (PATTERN (p), loop_start);
1939 /* Because the USAGE information potentially
1940 contains objects other than hard registers
1941 we need to copy it. */
1942 if (CALL_INSN_FUNCTION_USAGE (p))
1943 CALL_INSN_FUNCTION_USAGE (i1)
1944 = copy_rtx (CALL_INSN_FUNCTION_USAGE (p));
1947 i1 = emit_insn_before (PATTERN (p), loop_start);
1949 REG_NOTES (i1) = REG_NOTES (p);
1951 /* If there is a REG_EQUAL note present whose value is
1952 not loop invariant, then delete it, since it may
1953 cause problems with later optimization passes.
1954 It is possible for cse to create such notes
1955 like this as a result of record_jump_cond. */
1957 if ((temp = find_reg_note (i1, REG_EQUAL, NULL_RTX))
1958 && ! invariant_p (XEXP (temp, 0)))
1959 remove_note (i1, temp);
1964 if (loop_dump_stream)
1965 fprintf (loop_dump_stream, " moved to %d",
1969 /* This isn't needed because REG_NOTES is copied
1970 below and is wrong since P might be a PARALLEL. */
1971 if (REG_NOTES (i1) == 0
1972 && ! m->partial /* But not if it's a zero-extend clr. */
1973 && ! m->global /* and not if used outside the loop
1974 (since it might get set outside). */
1975 && CONSTANT_P (SET_SRC (PATTERN (p))))
1977 = gen_rtx_EXPR_LIST (REG_EQUAL,
1978 SET_SRC (PATTERN (p)),
1982 /* If library call, now fix the REG_NOTES that contain
1983 insn pointers, namely REG_LIBCALL on FIRST
1984 and REG_RETVAL on I1. */
1985 if ((temp = find_reg_note (i1, REG_RETVAL, NULL_RTX)))
1987 XEXP (temp, 0) = first;
1988 temp = find_reg_note (first, REG_LIBCALL, NULL_RTX);
1989 XEXP (temp, 0) = i1;
1993 do p = NEXT_INSN (p);
1994 while (p && GET_CODE (p) == NOTE);
1997 /* The more regs we move, the less we like moving them. */
2001 /* Any other movable that loads the same register
2003 already_moved[regno] = 1;
2005 /* This reg has been moved out of one loop. */
2006 moved_once[regno] = 1;
2008 /* The reg set here is now invariant. */
2010 n_times_set[regno] = 0;
2014 /* Change the length-of-life info for the register
2015 to say it lives at least the full length of this loop.
2016 This will help guide optimizations in outer loops. */
2018 if (uid_luid[REGNO_FIRST_UID (regno)] > INSN_LUID (loop_start))
2019 /* This is the old insn before all the moved insns.
2020 We can't use the moved insn because it is out of range
2021 in uid_luid. Only the old insns have luids. */
2022 REGNO_FIRST_UID (regno) = INSN_UID (loop_start);
2023 if (uid_luid[REGNO_LAST_UID (regno)] < INSN_LUID (end))
2024 REGNO_LAST_UID (regno) = INSN_UID (end);
2026 /* Combine with this moved insn any other matching movables. */
2029 for (m1 = movables; m1; m1 = m1->next)
2034 /* Schedule the reg loaded by M1
2035 for replacement so that shares the reg of M.
2036 If the modes differ (only possible in restricted
2037 circumstances, make a SUBREG. */
2038 if (GET_MODE (m->set_dest) == GET_MODE (m1->set_dest))
2039 reg_map[m1->regno] = m->set_dest;
2042 = gen_lowpart_common (GET_MODE (m1->set_dest),
2045 /* Get rid of the matching insn
2046 and prevent further processing of it. */
2049 /* if library call, delete all insn except last, which
2051 if ((temp = find_reg_note (m1->insn, REG_RETVAL,
2054 for (temp = XEXP (temp, 0); temp != m1->insn;
2055 temp = NEXT_INSN (temp))
2058 delete_insn (m1->insn);
2060 /* Any other movable that loads the same register
2062 already_moved[m1->regno] = 1;
2064 /* The reg merged here is now invariant,
2065 if the reg it matches is invariant. */
2067 n_times_set[m1->regno] = 0;
2070 else if (loop_dump_stream)
2071 fprintf (loop_dump_stream, "not desirable");
2073 else if (loop_dump_stream && !m->match)
2074 fprintf (loop_dump_stream, "not safe");
2076 if (loop_dump_stream)
2077 fprintf (loop_dump_stream, "\n");
2081 new_start = loop_start;
2083 /* Go through all the instructions in the loop, making
2084 all the register substitutions scheduled in REG_MAP. */
2085 for (p = new_start; p != end; p = NEXT_INSN (p))
2086 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
2087 || GET_CODE (p) == CALL_INSN)
2089 replace_regs (PATTERN (p), reg_map, nregs, 0);
2090 replace_regs (REG_NOTES (p), reg_map, nregs, 0);
2096 /* Scan X and replace the address of any MEM in it with ADDR.
2097 REG is the address that MEM should have before the replacement. */
2100 replace_call_address (x, reg, addr)
2103 register enum rtx_code code;
2109 code = GET_CODE (x);
2123 /* Short cut for very common case. */
2124 replace_call_address (XEXP (x, 1), reg, addr);
2128 /* Short cut for very common case. */
2129 replace_call_address (XEXP (x, 0), reg, addr);
2133 /* If this MEM uses a reg other than the one we expected,
2134 something is wrong. */
2135 if (XEXP (x, 0) != reg)
2144 fmt = GET_RTX_FORMAT (code);
2145 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2148 replace_call_address (XEXP (x, i), reg, addr);
2152 for (j = 0; j < XVECLEN (x, i); j++)
2153 replace_call_address (XVECEXP (x, i, j), reg, addr);
2159 /* Return the number of memory refs to addresses that vary
2163 count_nonfixed_reads (x)
2166 register enum rtx_code code;
2174 code = GET_CODE (x);
2188 return ((invariant_p (XEXP (x, 0)) != 1)
2189 + count_nonfixed_reads (XEXP (x, 0)));
2196 fmt = GET_RTX_FORMAT (code);
2197 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2200 value += count_nonfixed_reads (XEXP (x, i));
2204 for (j = 0; j < XVECLEN (x, i); j++)
2205 value += count_nonfixed_reads (XVECEXP (x, i, j));
2213 /* P is an instruction that sets a register to the result of a ZERO_EXTEND.
2214 Replace it with an instruction to load just the low bytes
2215 if the machine supports such an instruction,
2216 and insert above LOOP_START an instruction to clear the register. */
2219 constant_high_bytes (p, loop_start)
2223 register int insn_code_number;
2225 /* Try to change (SET (REG ...) (ZERO_EXTEND (..:B ...)))
2226 to (SET (STRICT_LOW_PART (SUBREG:B (REG...))) ...). */
2228 new = gen_rtx_SET (VOIDmode,
2229 gen_rtx_STRICT_LOW_PART (VOIDmode,
2230 gen_rtx_SUBREG (GET_MODE (XEXP (SET_SRC (PATTERN (p)), 0)),
2231 SET_DEST (PATTERN (p)),
2233 XEXP (SET_SRC (PATTERN (p)), 0));
2234 insn_code_number = recog (new, p);
2236 if (insn_code_number)
2240 /* Clear destination register before the loop. */
2241 emit_insn_before (gen_rtx_SET (VOIDmode, SET_DEST (PATTERN (p)),
2245 /* Inside the loop, just load the low part. */
2251 /* Scan a loop setting the variables `unknown_address_altered',
2252 `num_mem_sets', `loop_continue', loops_enclosed', `loop_has_call',
2253 and `loop_has_volatile'.
2254 Also, fill in the array `loop_store_mems'. */
2257 prescan_loop (start, end)
2260 register int level = 1;
2263 unknown_address_altered = 0;
2265 loop_has_volatile = 0;
2266 loop_store_mems_idx = 0;
2272 for (insn = NEXT_INSN (start); insn != NEXT_INSN (end);
2273 insn = NEXT_INSN (insn))
2275 if (GET_CODE (insn) == NOTE)
2277 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
2280 /* Count number of loops contained in this one. */
2283 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END)
2292 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_CONT)
2295 loop_continue = insn;
2298 else if (GET_CODE (insn) == CALL_INSN)
2300 if (! CONST_CALL_P (insn))
2301 unknown_address_altered = 1;
2306 if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN)
2308 if (volatile_refs_p (PATTERN (insn)))
2309 loop_has_volatile = 1;
2311 note_stores (PATTERN (insn), note_addr_stored);
2317 /* Scan the function looking for loops. Record the start and end of each loop.
2318 Also mark as invalid loops any loops that contain a setjmp or are branched
2319 to from outside the loop. */
2322 find_and_verify_loops (f)
2326 int current_loop = -1;
2330 /* If there are jumps to undefined labels,
2331 treat them as jumps out of any/all loops.
2332 This also avoids writing past end of tables when there are no loops. */
2333 uid_loop_num[0] = -1;
2335 /* Find boundaries of loops, mark which loops are contained within
2336 loops, and invalidate loops that have setjmp. */
2338 for (insn = f; insn; insn = NEXT_INSN (insn))
2340 if (GET_CODE (insn) == NOTE)
2341 switch (NOTE_LINE_NUMBER (insn))
2343 case NOTE_INSN_LOOP_BEG:
2344 loop_number_loop_starts[++next_loop] = insn;
2345 loop_number_loop_ends[next_loop] = 0;
2346 loop_outer_loop[next_loop] = current_loop;
2347 loop_invalid[next_loop] = 0;
2348 loop_number_exit_labels[next_loop] = 0;
2349 loop_number_exit_count[next_loop] = 0;
2350 current_loop = next_loop;
2353 case NOTE_INSN_SETJMP:
2354 /* In this case, we must invalidate our current loop and any
2356 for (loop = current_loop; loop != -1; loop = loop_outer_loop[loop])
2358 loop_invalid[loop] = 1;
2359 if (loop_dump_stream)
2360 fprintf (loop_dump_stream,
2361 "\nLoop at %d ignored due to setjmp.\n",
2362 INSN_UID (loop_number_loop_starts[loop]));
2366 case NOTE_INSN_LOOP_END:
2367 if (current_loop == -1)
2370 loop_number_loop_ends[current_loop] = insn;
2371 current_loop = loop_outer_loop[current_loop];
2378 /* Note that this will mark the NOTE_INSN_LOOP_END note as being in the
2379 enclosing loop, but this doesn't matter. */
2380 uid_loop_num[INSN_UID (insn)] = current_loop;
2383 /* Any loop containing a label used in an initializer must be invalidated,
2384 because it can be jumped into from anywhere. */
2386 for (label = forced_labels; label; label = XEXP (label, 1))
2390 for (loop_num = uid_loop_num[INSN_UID (XEXP (label, 0))];
2392 loop_num = loop_outer_loop[loop_num])
2393 loop_invalid[loop_num] = 1;
2396 /* Any loop containing a label used for an exception handler must be
2397 invalidated, because it can be jumped into from anywhere. */
2399 for (label = exception_handler_labels; label; label = XEXP (label, 1))
2403 for (loop_num = uid_loop_num[INSN_UID (XEXP (label, 0))];
2405 loop_num = loop_outer_loop[loop_num])
2406 loop_invalid[loop_num] = 1;
2409 /* Now scan all insn's in the function. If any JUMP_INSN branches into a
2410 loop that it is not contained within, that loop is marked invalid.
2411 If any INSN or CALL_INSN uses a label's address, then the loop containing
2412 that label is marked invalid, because it could be jumped into from
2415 Also look for blocks of code ending in an unconditional branch that
2416 exits the loop. If such a block is surrounded by a conditional
2417 branch around the block, move the block elsewhere (see below) and
2418 invert the jump to point to the code block. This may eliminate a
2419 label in our loop and will simplify processing by both us and a
2420 possible second cse pass. */
2422 for (insn = f; insn; insn = NEXT_INSN (insn))
2423 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
2425 int this_loop_num = uid_loop_num[INSN_UID (insn)];
2427 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
2429 rtx note = find_reg_note (insn, REG_LABEL, NULL_RTX);
2434 for (loop_num = uid_loop_num[INSN_UID (XEXP (note, 0))];
2436 loop_num = loop_outer_loop[loop_num])
2437 loop_invalid[loop_num] = 1;
2441 if (GET_CODE (insn) != JUMP_INSN)
2444 mark_loop_jump (PATTERN (insn), this_loop_num);
2446 /* See if this is an unconditional branch outside the loop. */
2447 if (this_loop_num != -1
2448 && (GET_CODE (PATTERN (insn)) == RETURN
2449 || (simplejump_p (insn)
2450 && (uid_loop_num[INSN_UID (JUMP_LABEL (insn))]
2452 && get_max_uid () < max_uid_for_loop)
2455 rtx our_next = next_real_insn (insn);
2457 int outer_loop = -1;
2459 /* Go backwards until we reach the start of the loop, a label,
2461 for (p = PREV_INSN (insn);
2462 GET_CODE (p) != CODE_LABEL
2463 && ! (GET_CODE (p) == NOTE
2464 && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
2465 && GET_CODE (p) != JUMP_INSN;
2469 /* Check for the case where we have a jump to an inner nested
2470 loop, and do not perform the optimization in that case. */
2472 if (JUMP_LABEL (insn))
2474 dest_loop = uid_loop_num[INSN_UID (JUMP_LABEL (insn))];
2475 if (dest_loop != -1)
2477 for (outer_loop = dest_loop; outer_loop != -1;
2478 outer_loop = loop_outer_loop[outer_loop])
2479 if (outer_loop == this_loop_num)
2484 /* Make sure that the target of P is within the current loop. */
2486 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p)
2487 && uid_loop_num[INSN_UID (JUMP_LABEL (p))] != this_loop_num)
2488 outer_loop = this_loop_num;
2490 /* If we stopped on a JUMP_INSN to the next insn after INSN,
2491 we have a block of code to try to move.
2493 We look backward and then forward from the target of INSN
2494 to find a BARRIER at the same loop depth as the target.
2495 If we find such a BARRIER, we make a new label for the start
2496 of the block, invert the jump in P and point it to that label,
2497 and move the block of code to the spot we found. */
2499 if (outer_loop == -1
2500 && GET_CODE (p) == JUMP_INSN
2501 && JUMP_LABEL (p) != 0
2502 /* Just ignore jumps to labels that were never emitted.
2503 These always indicate compilation errors. */
2504 && INSN_UID (JUMP_LABEL (p)) != 0
2506 && ! simplejump_p (p)
2507 && next_real_insn (JUMP_LABEL (p)) == our_next)
2510 = JUMP_LABEL (insn) ? JUMP_LABEL (insn) : get_last_insn ();
2511 int target_loop_num = uid_loop_num[INSN_UID (target)];
2514 for (loc = target; loc; loc = PREV_INSN (loc))
2515 if (GET_CODE (loc) == BARRIER
2516 && uid_loop_num[INSN_UID (loc)] == target_loop_num)
2520 for (loc = target; loc; loc = NEXT_INSN (loc))
2521 if (GET_CODE (loc) == BARRIER
2522 && uid_loop_num[INSN_UID (loc)] == target_loop_num)
2527 rtx cond_label = JUMP_LABEL (p);
2528 rtx new_label = get_label_after (p);
2530 /* Ensure our label doesn't go away. */
2531 LABEL_NUSES (cond_label)++;
2533 /* Verify that uid_loop_num is large enough and that
2535 if (invert_jump (p, new_label))
2539 /* If no suitable BARRIER was found, create a suitable
2540 one before TARGET. Since TARGET is a fall through
2541 path, we'll need to insert an jump around our block
2542 and a add a BARRIER before TARGET.
2544 This creates an extra unconditional jump outside
2545 the loop. However, the benefits of removing rarely
2546 executed instructions from inside the loop usually
2547 outweighs the cost of the extra unconditional jump
2548 outside the loop. */
2553 temp = gen_jump (JUMP_LABEL (insn));
2554 temp = emit_jump_insn_before (temp, target);
2555 JUMP_LABEL (temp) = JUMP_LABEL (insn);
2556 LABEL_NUSES (JUMP_LABEL (insn))++;
2557 loc = emit_barrier_before (target);
2560 /* Include the BARRIER after INSN and copy the
2562 new_label = squeeze_notes (new_label, NEXT_INSN (insn));
2563 reorder_insns (new_label, NEXT_INSN (insn), loc);
2565 /* All those insns are now in TARGET_LOOP_NUM. */
2566 for (q = new_label; q != NEXT_INSN (NEXT_INSN (insn));
2568 uid_loop_num[INSN_UID (q)] = target_loop_num;
2570 /* The label jumped to by INSN is no longer a loop exit.
2571 Unless INSN does not have a label (e.g., it is a
2572 RETURN insn), search loop_number_exit_labels to find
2573 its label_ref, and remove it. Also turn off
2574 LABEL_OUTSIDE_LOOP_P bit. */
2575 if (JUMP_LABEL (insn))
2580 r = loop_number_exit_labels[this_loop_num];
2581 r; q = r, r = LABEL_NEXTREF (r))
2582 if (XEXP (r, 0) == JUMP_LABEL (insn))
2584 LABEL_OUTSIDE_LOOP_P (r) = 0;
2586 LABEL_NEXTREF (q) = LABEL_NEXTREF (r);
2588 loop_number_exit_labels[this_loop_num]
2589 = LABEL_NEXTREF (r);
2593 for (loop_num = this_loop_num;
2594 loop_num != -1 && loop_num != target_loop_num;
2595 loop_num = loop_outer_loop[loop_num])
2596 loop_number_exit_count[loop_num]--;
2598 /* If we didn't find it, then something is wrong. */
2603 /* P is now a jump outside the loop, so it must be put
2604 in loop_number_exit_labels, and marked as such.
2605 The easiest way to do this is to just call
2606 mark_loop_jump again for P. */
2607 mark_loop_jump (PATTERN (p), this_loop_num);
2609 /* If INSN now jumps to the insn after it,
2611 if (JUMP_LABEL (insn) != 0
2612 && (next_real_insn (JUMP_LABEL (insn))
2613 == next_real_insn (insn)))
2617 /* Continue the loop after where the conditional
2618 branch used to jump, since the only branch insn
2619 in the block (if it still remains) is an inter-loop
2620 branch and hence needs no processing. */
2621 insn = NEXT_INSN (cond_label);
2623 if (--LABEL_NUSES (cond_label) == 0)
2624 delete_insn (cond_label);
2626 /* This loop will be continued with NEXT_INSN (insn). */
2627 insn = PREV_INSN (insn);
2634 /* If any label in X jumps to a loop different from LOOP_NUM and any of the
2635 loops it is contained in, mark the target loop invalid.
2637 For speed, we assume that X is part of a pattern of a JUMP_INSN. */
2640 mark_loop_jump (x, loop_num)
2648 switch (GET_CODE (x))
2661 /* There could be a label reference in here. */
2662 mark_loop_jump (XEXP (x, 0), loop_num);
2668 mark_loop_jump (XEXP (x, 0), loop_num);
2669 mark_loop_jump (XEXP (x, 1), loop_num);
2674 mark_loop_jump (XEXP (x, 0), loop_num);
2678 dest_loop = uid_loop_num[INSN_UID (XEXP (x, 0))];
2680 /* Link together all labels that branch outside the loop. This
2681 is used by final_[bg]iv_value and the loop unrolling code. Also
2682 mark this LABEL_REF so we know that this branch should predict
2685 /* A check to make sure the label is not in an inner nested loop,
2686 since this does not count as a loop exit. */
2687 if (dest_loop != -1)
2689 for (outer_loop = dest_loop; outer_loop != -1;
2690 outer_loop = loop_outer_loop[outer_loop])
2691 if (outer_loop == loop_num)
2697 if (loop_num != -1 && outer_loop == -1)
2699 LABEL_OUTSIDE_LOOP_P (x) = 1;
2700 LABEL_NEXTREF (x) = loop_number_exit_labels[loop_num];
2701 loop_number_exit_labels[loop_num] = x;
2703 for (outer_loop = loop_num;
2704 outer_loop != -1 && outer_loop != dest_loop;
2705 outer_loop = loop_outer_loop[outer_loop])
2706 loop_number_exit_count[outer_loop]++;
2709 /* If this is inside a loop, but not in the current loop or one enclosed
2710 by it, it invalidates at least one loop. */
2712 if (dest_loop == -1)
2715 /* We must invalidate every nested loop containing the target of this
2716 label, except those that also contain the jump insn. */
2718 for (; dest_loop != -1; dest_loop = loop_outer_loop[dest_loop])
2720 /* Stop when we reach a loop that also contains the jump insn. */
2721 for (outer_loop = loop_num; outer_loop != -1;
2722 outer_loop = loop_outer_loop[outer_loop])
2723 if (dest_loop == outer_loop)
2726 /* If we get here, we know we need to invalidate a loop. */
2727 if (loop_dump_stream && ! loop_invalid[dest_loop])
2728 fprintf (loop_dump_stream,
2729 "\nLoop at %d ignored due to multiple entry points.\n",
2730 INSN_UID (loop_number_loop_starts[dest_loop]));
2732 loop_invalid[dest_loop] = 1;
2737 /* If this is not setting pc, ignore. */
2738 if (SET_DEST (x) == pc_rtx)
2739 mark_loop_jump (SET_SRC (x), loop_num);
2743 mark_loop_jump (XEXP (x, 1), loop_num);
2744 mark_loop_jump (XEXP (x, 2), loop_num);
2749 for (i = 0; i < XVECLEN (x, 0); i++)
2750 mark_loop_jump (XVECEXP (x, 0, i), loop_num);
2754 for (i = 0; i < XVECLEN (x, 1); i++)
2755 mark_loop_jump (XVECEXP (x, 1, i), loop_num);
2759 /* Treat anything else (such as a symbol_ref)
2760 as a branch out of this loop, but not into any loop. */
2765 LABEL_OUTSIDE_LOOP_P (x) = 1;
2766 LABEL_NEXTREF (x) = loop_number_exit_labels[loop_num];
2769 loop_number_exit_labels[loop_num] = x;
2771 for (outer_loop = loop_num; outer_loop != -1;
2772 outer_loop = loop_outer_loop[outer_loop])
2773 loop_number_exit_count[outer_loop]++;
2779 /* Return nonzero if there is a label in the range from
2780 insn INSN to and including the insn whose luid is END
2781 INSN must have an assigned luid (i.e., it must not have
2782 been previously created by loop.c). */
2785 labels_in_range_p (insn, end)
2789 while (insn && INSN_LUID (insn) <= end)
2791 if (GET_CODE (insn) == CODE_LABEL)
2793 insn = NEXT_INSN (insn);
2799 /* Record that a memory reference X is being set. */
2802 note_addr_stored (x)
2807 if (x == 0 || GET_CODE (x) != MEM)
2810 /* Count number of memory writes.
2811 This affects heuristics in strength_reduce. */
2814 /* BLKmode MEM means all memory is clobbered. */
2815 if (GET_MODE (x) == BLKmode)
2816 unknown_address_altered = 1;
2818 if (unknown_address_altered)
2821 for (i = 0; i < loop_store_mems_idx; i++)
2822 if (rtx_equal_p (XEXP (loop_store_mems[i], 0), XEXP (x, 0))
2823 && MEM_IN_STRUCT_P (x) == MEM_IN_STRUCT_P (loop_store_mems[i]))
2825 /* We are storing at the same address as previously noted. Save the
2827 if (GET_MODE_SIZE (GET_MODE (x))
2828 > GET_MODE_SIZE (GET_MODE (loop_store_mems[i])))
2829 loop_store_mems[i] = x;
2833 if (i == NUM_STORES)
2834 unknown_address_altered = 1;
2836 else if (i == loop_store_mems_idx)
2837 loop_store_mems[loop_store_mems_idx++] = x;
2840 /* Return nonzero if the rtx X is invariant over the current loop.
2842 The value is 2 if we refer to something only conditionally invariant.
2844 If `unknown_address_altered' is nonzero, no memory ref is invariant.
2845 Otherwise, a memory ref is invariant if it does not conflict with
2846 anything stored in `loop_store_mems'. */
2853 register enum rtx_code code;
2855 int conditional = 0;
2859 code = GET_CODE (x);
2869 /* A LABEL_REF is normally invariant, however, if we are unrolling
2870 loops, and this label is inside the loop, then it isn't invariant.
2871 This is because each unrolled copy of the loop body will have
2872 a copy of this label. If this was invariant, then an insn loading
2873 the address of this label into a register might get moved outside
2874 the loop, and then each loop body would end up using the same label.
2876 We don't know the loop bounds here though, so just fail for all
2878 if (flag_unroll_loops)
2885 case UNSPEC_VOLATILE:
2889 /* We used to check RTX_UNCHANGING_P (x) here, but that is invalid
2890 since the reg might be set by initialization within the loop. */
2892 if ((x == frame_pointer_rtx || x == hard_frame_pointer_rtx
2893 || x == arg_pointer_rtx)
2894 && ! current_function_has_nonlocal_goto)
2898 && REGNO (x) < FIRST_PSEUDO_REGISTER && call_used_regs[REGNO (x)])
2901 if (n_times_set[REGNO (x)] < 0)
2904 return n_times_set[REGNO (x)] == 0;
2907 /* Volatile memory references must be rejected. Do this before
2908 checking for read-only items, so that volatile read-only items
2909 will be rejected also. */
2910 if (MEM_VOLATILE_P (x))
2913 /* Read-only items (such as constants in a constant pool) are
2914 invariant if their address is. */
2915 if (RTX_UNCHANGING_P (x))
2918 /* If we filled the table (or had a subroutine call), any location
2919 in memory could have been clobbered. */
2920 if (unknown_address_altered)
2923 /* See if there is any dependence between a store and this load. */
2924 for (i = loop_store_mems_idx - 1; i >= 0; i--)
2925 if (true_dependence (loop_store_mems[i], VOIDmode, x, rtx_varies_p))
2928 /* It's not invalidated by a store in memory
2929 but we must still verify the address is invariant. */
2933 /* Don't mess with insns declared volatile. */
2934 if (MEM_VOLATILE_P (x))
2942 fmt = GET_RTX_FORMAT (code);
2943 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2947 int tem = invariant_p (XEXP (x, i));
2953 else if (fmt[i] == 'E')
2956 for (j = 0; j < XVECLEN (x, i); j++)
2958 int tem = invariant_p (XVECEXP (x, i, j));
2968 return 1 + conditional;
2972 /* Return nonzero if all the insns in the loop that set REG
2973 are INSN and the immediately following insns,
2974 and if each of those insns sets REG in an invariant way
2975 (not counting uses of REG in them).
2977 The value is 2 if some of these insns are only conditionally invariant.
2979 We assume that INSN itself is the first set of REG
2980 and that its source is invariant. */
2983 consec_sets_invariant_p (reg, n_sets, insn)
2987 register rtx p = insn;
2988 register int regno = REGNO (reg);
2990 /* Number of sets we have to insist on finding after INSN. */
2991 int count = n_sets - 1;
2992 int old = n_times_set[regno];
2996 /* If N_SETS hit the limit, we can't rely on its value. */
3000 n_times_set[regno] = 0;
3004 register enum rtx_code code;
3008 code = GET_CODE (p);
3010 /* If library call, skip to end of of it. */
3011 if (code == INSN && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
3016 && (set = single_set (p))
3017 && GET_CODE (SET_DEST (set)) == REG
3018 && REGNO (SET_DEST (set)) == regno)
3020 this = invariant_p (SET_SRC (set));
3023 else if ((temp = find_reg_note (p, REG_EQUAL, NULL_RTX)))
3025 /* If this is a libcall, then any invariant REG_EQUAL note is OK.
3026 If this is an ordinary insn, then only CONSTANT_P REG_EQUAL
3028 this = (CONSTANT_P (XEXP (temp, 0))
3029 || (find_reg_note (p, REG_RETVAL, NULL_RTX)
3030 && invariant_p (XEXP (temp, 0))));
3037 else if (code != NOTE)
3039 n_times_set[regno] = old;
3044 n_times_set[regno] = old;
3045 /* If invariant_p ever returned 2, we return 2. */
3046 return 1 + (value & 2);
3050 /* I don't think this condition is sufficient to allow INSN
3051 to be moved, so we no longer test it. */
3053 /* Return 1 if all insns in the basic block of INSN and following INSN
3054 that set REG are invariant according to TABLE. */
3057 all_sets_invariant_p (reg, insn, table)
3061 register rtx p = insn;
3062 register int regno = REGNO (reg);
3066 register enum rtx_code code;
3068 code = GET_CODE (p);
3069 if (code == CODE_LABEL || code == JUMP_INSN)
3071 if (code == INSN && GET_CODE (PATTERN (p)) == SET
3072 && GET_CODE (SET_DEST (PATTERN (p))) == REG
3073 && REGNO (SET_DEST (PATTERN (p))) == regno)
3075 if (!invariant_p (SET_SRC (PATTERN (p)), table))
3082 /* Look at all uses (not sets) of registers in X. For each, if it is
3083 the single use, set USAGE[REGNO] to INSN; if there was a previous use in
3084 a different insn, set USAGE[REGNO] to const0_rtx. */
3087 find_single_use_in_loop (insn, x, usage)
3092 enum rtx_code code = GET_CODE (x);
3093 char *fmt = GET_RTX_FORMAT (code);
3098 = (usage[REGNO (x)] != 0 && usage[REGNO (x)] != insn)
3099 ? const0_rtx : insn;
3101 else if (code == SET)
3103 /* Don't count SET_DEST if it is a REG; otherwise count things
3104 in SET_DEST because if a register is partially modified, it won't
3105 show up as a potential movable so we don't care how USAGE is set
3107 if (GET_CODE (SET_DEST (x)) != REG)
3108 find_single_use_in_loop (insn, SET_DEST (x), usage);
3109 find_single_use_in_loop (insn, SET_SRC (x), usage);
3112 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3114 if (fmt[i] == 'e' && XEXP (x, i) != 0)
3115 find_single_use_in_loop (insn, XEXP (x, i), usage);
3116 else if (fmt[i] == 'E')
3117 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3118 find_single_use_in_loop (insn, XVECEXP (x, i, j), usage);
3122 /* Increment N_TIMES_SET at the index of each register
3123 that is modified by an insn between FROM and TO.
3124 If the value of an element of N_TIMES_SET becomes 127 or more,
3125 stop incrementing it, to avoid overflow.
3127 Store in SINGLE_USAGE[I] the single insn in which register I is
3128 used, if it is only used once. Otherwise, it is set to 0 (for no
3129 uses) or const0_rtx for more than one use. This parameter may be zero,
3130 in which case this processing is not done.
3132 Store in *COUNT_PTR the number of actual instruction
3133 in the loop. We use this to decide what is worth moving out. */
3135 /* last_set[n] is nonzero iff reg n has been set in the current basic block.
3136 In that case, it is the insn that last set reg n. */
3139 count_loop_regs_set (from, to, may_not_move, single_usage, count_ptr, nregs)
3140 register rtx from, to;
3146 register rtx *last_set = (rtx *) alloca (nregs * sizeof (rtx));
3148 register int count = 0;
3151 bzero ((char *) last_set, nregs * sizeof (rtx));
3152 for (insn = from; insn != to; insn = NEXT_INSN (insn))
3154 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
3158 /* If requested, record registers that have exactly one use. */
3161 find_single_use_in_loop (insn, PATTERN (insn), single_usage);
3163 /* Include uses in REG_EQUAL notes. */
3164 if (REG_NOTES (insn))
3165 find_single_use_in_loop (insn, REG_NOTES (insn), single_usage);
3168 if (GET_CODE (PATTERN (insn)) == CLOBBER
3169 && GET_CODE (XEXP (PATTERN (insn), 0)) == REG)
3170 /* Don't move a reg that has an explicit clobber.
3171 We might do so sometimes, but it's not worth the pain. */
3172 may_not_move[REGNO (XEXP (PATTERN (insn), 0))] = 1;
3174 if (GET_CODE (PATTERN (insn)) == SET
3175 || GET_CODE (PATTERN (insn)) == CLOBBER)
3177 dest = SET_DEST (PATTERN (insn));
3178 while (GET_CODE (dest) == SUBREG
3179 || GET_CODE (dest) == ZERO_EXTRACT
3180 || GET_CODE (dest) == SIGN_EXTRACT
3181 || GET_CODE (dest) == STRICT_LOW_PART)
3182 dest = XEXP (dest, 0);
3183 if (GET_CODE (dest) == REG)
3185 register int regno = REGNO (dest);
3186 /* If this is the first setting of this reg
3187 in current basic block, and it was set before,
3188 it must be set in two basic blocks, so it cannot
3189 be moved out of the loop. */
3190 if (n_times_set[regno] > 0 && last_set[regno] == 0)
3191 may_not_move[regno] = 1;
3192 /* If this is not first setting in current basic block,
3193 see if reg was used in between previous one and this.
3194 If so, neither one can be moved. */
3195 if (last_set[regno] != 0
3196 && reg_used_between_p (dest, last_set[regno], insn))
3197 may_not_move[regno] = 1;
3198 if (n_times_set[regno] < 127)
3199 ++n_times_set[regno];
3200 last_set[regno] = insn;
3203 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
3206 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
3208 register rtx x = XVECEXP (PATTERN (insn), 0, i);
3209 if (GET_CODE (x) == CLOBBER && GET_CODE (XEXP (x, 0)) == REG)
3210 /* Don't move a reg that has an explicit clobber.
3211 It's not worth the pain to try to do it correctly. */
3212 may_not_move[REGNO (XEXP (x, 0))] = 1;
3214 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
3216 dest = SET_DEST (x);
3217 while (GET_CODE (dest) == SUBREG
3218 || GET_CODE (dest) == ZERO_EXTRACT
3219 || GET_CODE (dest) == SIGN_EXTRACT
3220 || GET_CODE (dest) == STRICT_LOW_PART)
3221 dest = XEXP (dest, 0);
3222 if (GET_CODE (dest) == REG)
3224 register int regno = REGNO (dest);
3225 if (n_times_set[regno] > 0 && last_set[regno] == 0)
3226 may_not_move[regno] = 1;
3227 if (last_set[regno] != 0
3228 && reg_used_between_p (dest, last_set[regno], insn))
3229 may_not_move[regno] = 1;
3230 if (n_times_set[regno] < 127)
3231 ++n_times_set[regno];
3232 last_set[regno] = insn;
3239 if (GET_CODE (insn) == CODE_LABEL || GET_CODE (insn) == JUMP_INSN)
3240 bzero ((char *) last_set, nregs * sizeof (rtx));
3245 /* Given a loop that is bounded by LOOP_START and LOOP_END
3246 and that is entered at SCAN_START,
3247 return 1 if the register set in SET contained in insn INSN is used by
3248 any insn that precedes INSN in cyclic order starting
3249 from the loop entry point.
3251 We don't want to use INSN_LUID here because if we restrict INSN to those
3252 that have a valid INSN_LUID, it means we cannot move an invariant out
3253 from an inner loop past two loops. */
3256 loop_reg_used_before_p (set, insn, loop_start, scan_start, loop_end)
3257 rtx set, insn, loop_start, scan_start, loop_end;
3259 rtx reg = SET_DEST (set);
3262 /* Scan forward checking for register usage. If we hit INSN, we
3263 are done. Otherwise, if we hit LOOP_END, wrap around to LOOP_START. */
3264 for (p = scan_start; p != insn; p = NEXT_INSN (p))
3266 if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
3267 && reg_overlap_mentioned_p (reg, PATTERN (p)))
3277 /* A "basic induction variable" or biv is a pseudo reg that is set
3278 (within this loop) only by incrementing or decrementing it. */
3279 /* A "general induction variable" or giv is a pseudo reg whose
3280 value is a linear function of a biv. */
3282 /* Bivs are recognized by `basic_induction_var';
3283 Givs by `general_induct_var'. */
3285 /* Indexed by register number, indicates whether or not register is an
3286 induction variable, and if so what type. */
3288 enum iv_mode *reg_iv_type;
3290 /* Indexed by register number, contains pointer to `struct induction'
3291 if register is an induction variable. This holds general info for
3292 all induction variables. */
3294 struct induction **reg_iv_info;
3296 /* Indexed by register number, contains pointer to `struct iv_class'
3297 if register is a basic induction variable. This holds info describing
3298 the class (a related group) of induction variables that the biv belongs
3301 struct iv_class **reg_biv_class;
3303 /* The head of a list which links together (via the next field)
3304 every iv class for the current loop. */
3306 struct iv_class *loop_iv_list;
3308 /* Communication with routines called via `note_stores'. */
3310 static rtx note_insn;
3312 /* Dummy register to have non-zero DEST_REG for DEST_ADDR type givs. */
3314 static rtx addr_placeholder;
3316 /* ??? Unfinished optimizations, and possible future optimizations,
3317 for the strength reduction code. */
3319 /* ??? There is one more optimization you might be interested in doing: to
3320 allocate pseudo registers for frequently-accessed memory locations.
3321 If the same memory location is referenced each time around, it might
3322 be possible to copy it into a register before and out after.
3323 This is especially useful when the memory location is a variable which
3324 is in a stack slot because somewhere its address is taken. If the
3325 loop doesn't contain a function call and the variable isn't volatile,
3326 it is safe to keep the value in a register for the duration of the
3327 loop. One tricky thing is that the copying of the value back from the
3328 register has to be done on all exits from the loop. You need to check that
3329 all the exits from the loop go to the same place. */
3331 /* ??? The interaction of biv elimination, and recognition of 'constant'
3332 bivs, may cause problems. */
3334 /* ??? Add heuristics so that DEST_ADDR strength reduction does not cause
3335 performance problems.
3337 Perhaps don't eliminate things that can be combined with an addressing
3338 mode. Find all givs that have the same biv, mult_val, and add_val;
3339 then for each giv, check to see if its only use dies in a following
3340 memory address. If so, generate a new memory address and check to see
3341 if it is valid. If it is valid, then store the modified memory address,
3342 otherwise, mark the giv as not done so that it will get its own iv. */
3344 /* ??? Could try to optimize branches when it is known that a biv is always
3347 /* ??? When replace a biv in a compare insn, we should replace with closest
3348 giv so that an optimized branch can still be recognized by the combiner,
3349 e.g. the VAX acb insn. */
3351 /* ??? Many of the checks involving uid_luid could be simplified if regscan
3352 was rerun in loop_optimize whenever a register was added or moved.
3353 Also, some of the optimizations could be a little less conservative. */
3355 /* Perform strength reduction and induction variable elimination. */
3357 /* Pseudo registers created during this function will be beyond the last
3358 valid index in several tables including n_times_set and regno_last_uid.
3359 This does not cause a problem here, because the added registers cannot be
3360 givs outside of their loop, and hence will never be reconsidered.
3361 But scan_loop must check regnos to make sure they are in bounds. */
3364 strength_reduce (scan_start, end, loop_top, insn_count,
3365 loop_start, loop_end, unroll_p)
3379 /* This is 1 if current insn is not executed at least once for every loop
3381 int not_every_iteration = 0;
3382 /* This is 1 if current insn may be executed more than once for every
3384 int maybe_multiple = 0;
3385 /* Temporary list pointers for traversing loop_iv_list. */
3386 struct iv_class *bl, **backbl;
3387 /* Ratio of extra register life span we can justify
3388 for saving an instruction. More if loop doesn't call subroutines
3389 since in that case saving an insn makes more difference
3390 and more registers are available. */
3391 /* ??? could set this to last value of threshold in move_movables */
3392 int threshold = (loop_has_call ? 1 : 2) * (3 + n_non_fixed_regs);
3393 /* Map of pseudo-register replacements. */
3397 rtx end_insert_before;
3400 reg_iv_type = (enum iv_mode *) alloca (max_reg_before_loop
3401 * sizeof (enum iv_mode *));
3402 bzero ((char *) reg_iv_type, max_reg_before_loop * sizeof (enum iv_mode *));
3403 reg_iv_info = (struct induction **)
3404 alloca (max_reg_before_loop * sizeof (struct induction *));
3405 bzero ((char *) reg_iv_info, (max_reg_before_loop
3406 * sizeof (struct induction *)));
3407 reg_biv_class = (struct iv_class **)
3408 alloca (max_reg_before_loop * sizeof (struct iv_class *));
3409 bzero ((char *) reg_biv_class, (max_reg_before_loop
3410 * sizeof (struct iv_class *)));
3413 addr_placeholder = gen_reg_rtx (Pmode);
3415 /* Save insn immediately after the loop_end. Insns inserted after loop_end
3416 must be put before this insn, so that they will appear in the right
3417 order (i.e. loop order).
3419 If loop_end is the end of the current function, then emit a
3420 NOTE_INSN_DELETED after loop_end and set end_insert_before to the
3422 if (NEXT_INSN (loop_end) != 0)
3423 end_insert_before = NEXT_INSN (loop_end);
3425 end_insert_before = emit_note_after (NOTE_INSN_DELETED, loop_end);
3427 /* Scan through loop to find all possible bivs. */
3433 /* At end of a straight-in loop, we are done.
3434 At end of a loop entered at the bottom, scan the top. */
3435 if (p == scan_start)
3443 if (p == scan_start)
3447 if (GET_CODE (p) == INSN
3448 && (set = single_set (p))
3449 && GET_CODE (SET_DEST (set)) == REG)
3451 dest_reg = SET_DEST (set);
3452 if (REGNO (dest_reg) < max_reg_before_loop
3453 && REGNO (dest_reg) >= FIRST_PSEUDO_REGISTER
3454 && reg_iv_type[REGNO (dest_reg)] != NOT_BASIC_INDUCT)
3456 if (basic_induction_var (SET_SRC (set), GET_MODE (SET_SRC (set)),
3457 dest_reg, p, &inc_val, &mult_val))
3459 /* It is a possible basic induction variable.
3460 Create and initialize an induction structure for it. */
3463 = (struct induction *) alloca (sizeof (struct induction));
3465 record_biv (v, p, dest_reg, inc_val, mult_val,
3466 not_every_iteration, maybe_multiple);
3467 reg_iv_type[REGNO (dest_reg)] = BASIC_INDUCT;
3469 else if (REGNO (dest_reg) < max_reg_before_loop)
3470 reg_iv_type[REGNO (dest_reg)] = NOT_BASIC_INDUCT;
3474 /* Past CODE_LABEL, we get to insns that may be executed multiple
3475 times. The only way we can be sure that they can't is if every
3476 every jump insn between here and the end of the loop either
3477 returns, exits the loop, is a forward jump, or is a jump
3478 to the loop start. */
3480 if (GET_CODE (p) == CODE_LABEL)
3488 insn = NEXT_INSN (insn);
3489 if (insn == scan_start)
3497 if (insn == scan_start)
3501 if (GET_CODE (insn) == JUMP_INSN
3502 && GET_CODE (PATTERN (insn)) != RETURN
3503 && (! condjump_p (insn)
3504 || (JUMP_LABEL (insn) != 0
3505 && JUMP_LABEL (insn) != scan_start
3506 && (INSN_UID (JUMP_LABEL (insn)) >= max_uid_for_loop
3507 || INSN_UID (insn) >= max_uid_for_loop
3508 || (INSN_LUID (JUMP_LABEL (insn))
3509 < INSN_LUID (insn))))))
3517 /* Past a jump, we get to insns for which we can't count
3518 on whether they will be executed during each iteration. */
3519 /* This code appears twice in strength_reduce. There is also similar
3520 code in scan_loop. */
3521 if (GET_CODE (p) == JUMP_INSN
3522 /* If we enter the loop in the middle, and scan around to the
3523 beginning, don't set not_every_iteration for that.
3524 This can be any kind of jump, since we want to know if insns
3525 will be executed if the loop is executed. */
3526 && ! (JUMP_LABEL (p) == loop_top
3527 && ((NEXT_INSN (NEXT_INSN (p)) == loop_end && simplejump_p (p))
3528 || (NEXT_INSN (p) == loop_end && condjump_p (p)))))
3532 /* If this is a jump outside the loop, then it also doesn't
3533 matter. Check to see if the target of this branch is on the
3534 loop_number_exits_labels list. */
3536 for (label = loop_number_exit_labels[uid_loop_num[INSN_UID (loop_start)]];
3538 label = LABEL_NEXTREF (label))
3539 if (XEXP (label, 0) == JUMP_LABEL (p))
3543 not_every_iteration = 1;
3546 else if (GET_CODE (p) == NOTE)
3548 /* At the virtual top of a converted loop, insns are again known to
3549 be executed each iteration: logically, the loop begins here
3550 even though the exit code has been duplicated. */
3551 if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP && loop_depth == 0)
3552 not_every_iteration = 0;
3553 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
3555 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
3559 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
3560 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
3561 or not an insn is known to be executed each iteration of the
3562 loop, whether or not any iterations are known to occur.
3564 Therefore, if we have just passed a label and have no more labels
3565 between here and the test insn of the loop, we know these insns
3566 will be executed each iteration. */
3568 if (not_every_iteration && GET_CODE (p) == CODE_LABEL
3569 && no_labels_between_p (p, loop_end))
3570 not_every_iteration = 0;
3573 /* Scan loop_iv_list to remove all regs that proved not to be bivs.
3574 Make a sanity check against n_times_set. */
3575 for (backbl = &loop_iv_list, bl = *backbl; bl; bl = bl->next)
3577 if (reg_iv_type[bl->regno] != BASIC_INDUCT
3578 /* Above happens if register modified by subreg, etc. */
3579 /* Make sure it is not recognized as a basic induction var: */
3580 || n_times_set[bl->regno] != bl->biv_count
3581 /* If never incremented, it is invariant that we decided not to
3582 move. So leave it alone. */
3583 || ! bl->incremented)
3585 if (loop_dump_stream)
3586 fprintf (loop_dump_stream, "Reg %d: biv discarded, %s\n",
3588 (reg_iv_type[bl->regno] != BASIC_INDUCT
3589 ? "not induction variable"
3590 : (! bl->incremented ? "never incremented"
3593 reg_iv_type[bl->regno] = NOT_BASIC_INDUCT;
3600 if (loop_dump_stream)
3601 fprintf (loop_dump_stream, "Reg %d: biv verified\n", bl->regno);
3605 /* Exit if there are no bivs. */
3608 /* Can still unroll the loop anyways, but indicate that there is no
3609 strength reduction info available. */
3611 unroll_loop (loop_end, insn_count, loop_start, end_insert_before, 0);
3616 /* Find initial value for each biv by searching backwards from loop_start,
3617 halting at first label. Also record any test condition. */
3620 for (p = loop_start; p && GET_CODE (p) != CODE_LABEL; p = PREV_INSN (p))
3624 if (GET_CODE (p) == CALL_INSN)
3627 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
3628 || GET_CODE (p) == CALL_INSN)
3629 note_stores (PATTERN (p), record_initial);
3631 /* Record any test of a biv that branches around the loop if no store
3632 between it and the start of loop. We only care about tests with
3633 constants and registers and only certain of those. */
3634 if (GET_CODE (p) == JUMP_INSN
3635 && JUMP_LABEL (p) != 0
3636 && next_real_insn (JUMP_LABEL (p)) == next_real_insn (loop_end)
3637 && (test = get_condition_for_loop (p)) != 0
3638 && GET_CODE (XEXP (test, 0)) == REG
3639 && REGNO (XEXP (test, 0)) < max_reg_before_loop
3640 && (bl = reg_biv_class[REGNO (XEXP (test, 0))]) != 0
3641 && valid_initial_value_p (XEXP (test, 1), p, call_seen, loop_start)
3642 && bl->init_insn == 0)
3644 /* If an NE test, we have an initial value! */
3645 if (GET_CODE (test) == NE)
3648 bl->init_set = gen_rtx_SET (VOIDmode,
3649 XEXP (test, 0), XEXP (test, 1));
3652 bl->initial_test = test;
3656 /* Look at the each biv and see if we can say anything better about its
3657 initial value from any initializing insns set up above. (This is done
3658 in two passes to avoid missing SETs in a PARALLEL.) */
3659 for (bl = loop_iv_list; bl; bl = bl->next)
3664 if (! bl->init_insn)
3667 /* IF INIT_INSN has a REG_EQUAL or REG_EQUIV note and the value
3668 is a constant, use the value of that. */
3669 if (((note = find_reg_note (bl->init_insn, REG_EQUAL, 0)) != NULL
3670 && CONSTANT_P (XEXP (note, 0)))
3671 || ((note = find_reg_note (bl->init_insn, REG_EQUIV, 0)) != NULL
3672 && CONSTANT_P (XEXP (note, 0))))
3673 src = XEXP (note, 0);
3675 src = SET_SRC (bl->init_set);
3677 if (loop_dump_stream)
3678 fprintf (loop_dump_stream,
3679 "Biv %d initialized at insn %d: initial value ",
3680 bl->regno, INSN_UID (bl->init_insn));
3682 if ((GET_MODE (src) == GET_MODE (regno_reg_rtx[bl->regno])
3683 || GET_MODE (src) == VOIDmode)
3684 && valid_initial_value_p (src, bl->init_insn, call_seen, loop_start))
3686 bl->initial_value = src;
3688 if (loop_dump_stream)
3690 if (GET_CODE (src) == CONST_INT)
3692 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, INTVAL (src));
3693 fputc ('\n', loop_dump_stream);
3697 print_rtl (loop_dump_stream, src);
3698 fprintf (loop_dump_stream, "\n");
3704 /* Biv initial value is not simple move,
3705 so let it keep initial value of "itself". */
3707 if (loop_dump_stream)
3708 fprintf (loop_dump_stream, "is complex\n");
3712 /* Search the loop for general induction variables. */
3714 /* A register is a giv if: it is only set once, it is a function of a
3715 biv and a constant (or invariant), and it is not a biv. */
3717 not_every_iteration = 0;
3723 /* At end of a straight-in loop, we are done.
3724 At end of a loop entered at the bottom, scan the top. */
3725 if (p == scan_start)
3733 if (p == scan_start)
3737 /* Look for a general induction variable in a register. */
3738 if (GET_CODE (p) == INSN
3739 && (set = single_set (p))
3740 && GET_CODE (SET_DEST (set)) == REG
3741 && ! may_not_optimize[REGNO (SET_DEST (set))])
3749 dest_reg = SET_DEST (set);
3750 if (REGNO (dest_reg) < FIRST_PSEUDO_REGISTER)
3753 if (/* SET_SRC is a giv. */
3754 ((benefit = general_induction_var (SET_SRC (set),
3757 /* Equivalent expression is a giv. */
3758 || ((regnote = find_reg_note (p, REG_EQUAL, NULL_RTX))
3759 && (benefit = general_induction_var (XEXP (regnote, 0),
3761 &add_val, &mult_val))))
3762 /* Don't try to handle any regs made by loop optimization.
3763 We have nothing on them in regno_first_uid, etc. */
3764 && REGNO (dest_reg) < max_reg_before_loop
3765 /* Don't recognize a BASIC_INDUCT_VAR here. */
3766 && dest_reg != src_reg
3767 /* This must be the only place where the register is set. */
3768 && (n_times_set[REGNO (dest_reg)] == 1
3769 /* or all sets must be consecutive and make a giv. */
3770 || (benefit = consec_sets_giv (benefit, p,
3772 &add_val, &mult_val))))
3776 = (struct induction *) alloca (sizeof (struct induction));
3779 /* If this is a library call, increase benefit. */
3780 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
3781 benefit += libcall_benefit (p);
3783 /* Skip the consecutive insns, if there are any. */
3784 for (count = n_times_set[REGNO (dest_reg)] - 1;
3787 /* If first insn of libcall sequence, skip to end.
3788 Do this at start of loop, since INSN is guaranteed to
3790 if (GET_CODE (p) != NOTE
3791 && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
3794 do p = NEXT_INSN (p);
3795 while (GET_CODE (p) == NOTE);
3798 record_giv (v, p, src_reg, dest_reg, mult_val, add_val, benefit,
3799 DEST_REG, not_every_iteration, NULL_PTR, loop_start,
3805 #ifndef DONT_REDUCE_ADDR
3806 /* Look for givs which are memory addresses. */
3807 /* This resulted in worse code on a VAX 8600. I wonder if it
3809 if (GET_CODE (p) == INSN)
3810 find_mem_givs (PATTERN (p), p, not_every_iteration, loop_start,
3814 /* Update the status of whether giv can derive other givs. This can
3815 change when we pass a label or an insn that updates a biv. */
3816 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
3817 || GET_CODE (p) == CODE_LABEL)
3818 update_giv_derive (p);
3820 /* Past a jump, we get to insns for which we can't count
3821 on whether they will be executed during each iteration. */
3822 /* This code appears twice in strength_reduce. There is also similar
3823 code in scan_loop. */
3824 if (GET_CODE (p) == JUMP_INSN
3825 /* If we enter the loop in the middle, and scan around to the
3826 beginning, don't set not_every_iteration for that.
3827 This can be any kind of jump, since we want to know if insns
3828 will be executed if the loop is executed. */
3829 && ! (JUMP_LABEL (p) == loop_top
3830 && ((NEXT_INSN (NEXT_INSN (p)) == loop_end && simplejump_p (p))
3831 || (NEXT_INSN (p) == loop_end && condjump_p (p)))))
3835 /* If this is a jump outside the loop, then it also doesn't
3836 matter. Check to see if the target of this branch is on the
3837 loop_number_exits_labels list. */
3839 for (label = loop_number_exit_labels[uid_loop_num[INSN_UID (loop_start)]];
3841 label = LABEL_NEXTREF (label))
3842 if (XEXP (label, 0) == JUMP_LABEL (p))
3846 not_every_iteration = 1;
3849 else if (GET_CODE (p) == NOTE)
3851 /* At the virtual top of a converted loop, insns are again known to
3852 be executed each iteration: logically, the loop begins here
3853 even though the exit code has been duplicated. */
3854 if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP && loop_depth == 0)
3855 not_every_iteration = 0;
3856 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
3858 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
3862 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
3863 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
3864 or not an insn is known to be executed each iteration of the
3865 loop, whether or not any iterations are known to occur.
3867 Therefore, if we have just passed a label and have no more labels
3868 between here and the test insn of the loop, we know these insns
3869 will be executed each iteration. */
3871 if (not_every_iteration && GET_CODE (p) == CODE_LABEL
3872 && no_labels_between_p (p, loop_end))
3873 not_every_iteration = 0;
3876 /* Try to calculate and save the number of loop iterations. This is
3877 set to zero if the actual number can not be calculated. This must
3878 be called after all giv's have been identified, since otherwise it may
3879 fail if the iteration variable is a giv. */
3881 loop_n_iterations = loop_iterations (loop_start, loop_end);
3883 /* Now for each giv for which we still don't know whether or not it is
3884 replaceable, check to see if it is replaceable because its final value
3885 can be calculated. This must be done after loop_iterations is called,
3886 so that final_giv_value will work correctly. */
3888 for (bl = loop_iv_list; bl; bl = bl->next)
3890 struct induction *v;
3892 for (v = bl->giv; v; v = v->next_iv)
3893 if (! v->replaceable && ! v->not_replaceable)
3894 check_final_value (v, loop_start, loop_end);
3897 /* Try to prove that the loop counter variable (if any) is always
3898 nonnegative; if so, record that fact with a REG_NONNEG note
3899 so that "decrement and branch until zero" insn can be used. */
3900 check_dbra_loop (loop_end, insn_count, loop_start);
3903 /* record loop-variables relevant for BCT optimization before unrolling
3904 the loop. Unrolling may update part of this information, and the
3905 correct data will be used for generating the BCT. */
3906 #ifdef HAVE_decrement_and_branch_on_count
3907 if (HAVE_decrement_and_branch_on_count)
3908 analyze_loop_iterations (loop_start, loop_end);
3912 /* Create reg_map to hold substitutions for replaceable giv regs. */
3913 reg_map = (rtx *) alloca (max_reg_before_loop * sizeof (rtx));
3914 bzero ((char *) reg_map, max_reg_before_loop * sizeof (rtx));
3916 /* Examine each iv class for feasibility of strength reduction/induction
3917 variable elimination. */
3919 for (bl = loop_iv_list; bl; bl = bl->next)
3921 struct induction *v;
3924 rtx final_value = 0;
3926 /* Test whether it will be possible to eliminate this biv
3927 provided all givs are reduced. This is possible if either
3928 the reg is not used outside the loop, or we can compute
3929 what its final value will be.
3931 For architectures with a decrement_and_branch_until_zero insn,
3932 don't do this if we put a REG_NONNEG note on the endtest for
3935 /* Compare against bl->init_insn rather than loop_start.
3936 We aren't concerned with any uses of the biv between
3937 init_insn and loop_start since these won't be affected
3938 by the value of the biv elsewhere in the function, so
3939 long as init_insn doesn't use the biv itself.
3940 March 14, 1989 -- self@bayes.arc.nasa.gov */
3942 if ((uid_luid[REGNO_LAST_UID (bl->regno)] < INSN_LUID (loop_end)
3944 && INSN_UID (bl->init_insn) < max_uid_for_loop
3945 && uid_luid[REGNO_FIRST_UID (bl->regno)] >= INSN_LUID (bl->init_insn)
3946 #ifdef HAVE_decrement_and_branch_until_zero
3949 && ! reg_mentioned_p (bl->biv->dest_reg, SET_SRC (bl->init_set)))
3950 || ((final_value = final_biv_value (bl, loop_start, loop_end))
3951 #ifdef HAVE_decrement_and_branch_until_zero
3955 bl->eliminable = maybe_eliminate_biv (bl, loop_start, end, 0,
3956 threshold, insn_count);
3959 if (loop_dump_stream)
3961 fprintf (loop_dump_stream,
3962 "Cannot eliminate biv %d.\n",
3964 fprintf (loop_dump_stream,
3965 "First use: insn %d, last use: insn %d.\n",
3966 REGNO_FIRST_UID (bl->regno),
3967 REGNO_LAST_UID (bl->regno));
3971 /* Combine all giv's for this iv_class. */
3974 /* This will be true at the end, if all givs which depend on this
3975 biv have been strength reduced.
3976 We can't (currently) eliminate the biv unless this is so. */
3979 /* Check each giv in this class to see if we will benefit by reducing
3980 it. Skip giv's combined with others. */
3981 for (v = bl->giv; v; v = v->next_iv)
3983 struct induction *tv;
3985 if (v->ignore || v->same)
3988 benefit = v->benefit;
3990 /* Reduce benefit if not replaceable, since we will insert
3991 a move-insn to replace the insn that calculates this giv.
3992 Don't do this unless the giv is a user variable, since it
3993 will often be marked non-replaceable because of the duplication
3994 of the exit code outside the loop. In such a case, the copies
3995 we insert are dead and will be deleted. So they don't have
3996 a cost. Similar situations exist. */
3997 /* ??? The new final_[bg]iv_value code does a much better job
3998 of finding replaceable giv's, and hence this code may no longer
4000 if (! v->replaceable && ! bl->eliminable
4001 && REG_USERVAR_P (v->dest_reg))
4002 benefit -= copy_cost;
4004 /* Decrease the benefit to count the add-insns that we will
4005 insert to increment the reduced reg for the giv. */
4006 benefit -= add_cost * bl->biv_count;
4008 /* Decide whether to strength-reduce this giv or to leave the code
4009 unchanged (recompute it from the biv each time it is used).
4010 This decision can be made independently for each giv. */
4013 /* Attempt to guess whether autoincrement will handle some of the
4014 new add insns; if so, increase BENEFIT (undo the subtraction of
4015 add_cost that was done above). */
4016 if (v->giv_type == DEST_ADDR
4017 && GET_CODE (v->mult_val) == CONST_INT)
4019 #if defined (HAVE_POST_INCREMENT) || defined (HAVE_PRE_INCREMENT)
4020 if (INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
4021 benefit += add_cost * bl->biv_count;
4023 #if defined (HAVE_POST_DECREMENT) || defined (HAVE_PRE_DECREMENT)
4024 if (-INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
4025 benefit += add_cost * bl->biv_count;
4030 /* If an insn is not to be strength reduced, then set its ignore
4031 flag, and clear all_reduced. */
4033 /* A giv that depends on a reversed biv must be reduced if it is
4034 used after the loop exit, otherwise, it would have the wrong
4035 value after the loop exit. To make it simple, just reduce all
4036 of such giv's whether or not we know they are used after the loop
4039 if ( ! flag_reduce_all_givs && v->lifetime * threshold * benefit < insn_count
4042 if (loop_dump_stream)
4043 fprintf (loop_dump_stream,
4044 "giv of insn %d not worth while, %d vs %d.\n",
4046 v->lifetime * threshold * benefit, insn_count);
4052 /* Check that we can increment the reduced giv without a
4053 multiply insn. If not, reject it. */
4055 for (tv = bl->biv; tv; tv = tv->next_iv)
4056 if (tv->mult_val == const1_rtx
4057 && ! product_cheap_p (tv->add_val, v->mult_val))
4059 if (loop_dump_stream)
4060 fprintf (loop_dump_stream,
4061 "giv of insn %d: would need a multiply.\n",
4062 INSN_UID (v->insn));
4070 /* Reduce each giv that we decided to reduce. */
4072 for (v = bl->giv; v; v = v->next_iv)
4074 struct induction *tv;
4075 if (! v->ignore && v->same == 0)
4077 int auto_inc_opt = 0;
4079 v->new_reg = gen_reg_rtx (v->mode);
4082 /* If the target has auto-increment addressing modes, and
4083 this is an address giv, then try to put the increment
4084 immediately after its use, so that flow can create an
4085 auto-increment addressing mode. */
4086 if (v->giv_type == DEST_ADDR && bl->biv_count == 1
4087 && bl->biv->always_executed && ! bl->biv->maybe_multiple
4088 /* We don't handle reversed biv's because bl->biv->insn
4089 does not have a valid INSN_LUID. */
4091 && v->always_executed && ! v->maybe_multiple)
4093 /* If other giv's have been combined with this one, then
4094 this will work only if all uses of the other giv's occur
4095 before this giv's insn. This is difficult to check.
4097 We simplify this by looking for the common case where
4098 there is one DEST_REG giv, and this giv's insn is the
4099 last use of the dest_reg of that DEST_REG giv. If the
4100 the increment occurs after the address giv, then we can
4101 perform the optimization. (Otherwise, the increment
4102 would have to go before other_giv, and we would not be
4103 able to combine it with the address giv to get an
4104 auto-inc address.) */
4105 if (v->combined_with)
4107 struct induction *other_giv = 0;
4109 for (tv = bl->giv; tv; tv = tv->next_iv)
4117 if (! tv && other_giv
4118 && REGNO (other_giv->dest_reg) < max_reg_before_loop
4119 && (REGNO_LAST_UID (REGNO (other_giv->dest_reg))
4120 == INSN_UID (v->insn))
4121 && INSN_LUID (v->insn) < INSN_LUID (bl->biv->insn))
4124 /* Check for case where increment is before the the address
4125 giv. Do this test in "loop order". */
4126 else if ((INSN_LUID (v->insn) > INSN_LUID (bl->biv->insn)
4127 && (INSN_LUID (v->insn) < INSN_LUID (scan_start)
4128 || (INSN_LUID (bl->biv->insn)
4129 > INSN_LUID (scan_start))))
4130 || (INSN_LUID (v->insn) < INSN_LUID (scan_start)
4131 && (INSN_LUID (scan_start)
4132 < INSN_LUID (bl->biv->insn))))
4141 /* We can't put an insn immediately after one setting
4142 cc0, or immediately before one using cc0. */
4143 if ((auto_inc_opt == 1 && sets_cc0_p (PATTERN (v->insn)))
4144 || (auto_inc_opt == -1
4145 && (prev = prev_nonnote_insn (v->insn)) != 0
4146 && GET_RTX_CLASS (GET_CODE (prev)) == 'i'
4147 && sets_cc0_p (PATTERN (prev))))
4153 v->auto_inc_opt = 1;
4157 /* For each place where the biv is incremented, add an insn
4158 to increment the new, reduced reg for the giv. */
4159 for (tv = bl->biv; tv; tv = tv->next_iv)
4164 insert_before = tv->insn;
4165 else if (auto_inc_opt == 1)
4166 insert_before = NEXT_INSN (v->insn);
4168 insert_before = v->insn;
4170 if (tv->mult_val == const1_rtx)
4171 emit_iv_add_mult (tv->add_val, v->mult_val,
4172 v->new_reg, v->new_reg, insert_before);
4173 else /* tv->mult_val == const0_rtx */
4174 /* A multiply is acceptable here
4175 since this is presumed to be seldom executed. */
4176 emit_iv_add_mult (tv->add_val, v->mult_val,
4177 v->add_val, v->new_reg, insert_before);
4180 /* Add code at loop start to initialize giv's reduced reg. */
4182 emit_iv_add_mult (bl->initial_value, v->mult_val,
4183 v->add_val, v->new_reg, loop_start);
4187 /* Rescan all givs. If a giv is the same as a giv not reduced, mark it
4190 For each giv register that can be reduced now: if replaceable,
4191 substitute reduced reg wherever the old giv occurs;
4192 else add new move insn "giv_reg = reduced_reg".
4194 Also check for givs whose first use is their definition and whose
4195 last use is the definition of another giv. If so, it is likely
4196 dead and should not be used to eliminate a biv. */
4197 for (v = bl->giv; v; v = v->next_iv)
4199 if (v->same && v->same->ignore)
4205 if (v->giv_type == DEST_REG
4206 && REGNO_FIRST_UID (REGNO (v->dest_reg)) == INSN_UID (v->insn))
4208 struct induction *v1;
4210 for (v1 = bl->giv; v1; v1 = v1->next_iv)
4211 if (REGNO_LAST_UID (REGNO (v->dest_reg)) == INSN_UID (v1->insn))
4215 /* Update expression if this was combined, in case other giv was
4218 v->new_reg = replace_rtx (v->new_reg,
4219 v->same->dest_reg, v->same->new_reg);
4221 if (v->giv_type == DEST_ADDR)
4222 /* Store reduced reg as the address in the memref where we found
4224 validate_change (v->insn, v->location, v->new_reg, 0);
4225 else if (v->replaceable)
4227 reg_map[REGNO (v->dest_reg)] = v->new_reg;
4230 /* I can no longer duplicate the original problem. Perhaps
4231 this is unnecessary now? */
4233 /* Replaceable; it isn't strictly necessary to delete the old
4234 insn and emit a new one, because v->dest_reg is now dead.
4236 However, especially when unrolling loops, the special
4237 handling for (set REG0 REG1) in the second cse pass may
4238 make v->dest_reg live again. To avoid this problem, emit
4239 an insn to set the original giv reg from the reduced giv.
4240 We can not delete the original insn, since it may be part
4241 of a LIBCALL, and the code in flow that eliminates dead
4242 libcalls will fail if it is deleted. */
4243 emit_insn_after (gen_move_insn (v->dest_reg, v->new_reg),
4249 /* Not replaceable; emit an insn to set the original giv reg from
4250 the reduced giv, same as above. */
4251 emit_insn_after (gen_move_insn (v->dest_reg, v->new_reg),
4255 /* When a loop is reversed, givs which depend on the reversed
4256 biv, and which are live outside the loop, must be set to their
4257 correct final value. This insn is only needed if the giv is
4258 not replaceable. The correct final value is the same as the
4259 value that the giv starts the reversed loop with. */
4260 if (bl->reversed && ! v->replaceable)
4261 emit_iv_add_mult (bl->initial_value, v->mult_val,
4262 v->add_val, v->dest_reg, end_insert_before);
4263 else if (v->final_value)
4267 /* If the loop has multiple exits, emit the insn before the
4268 loop to ensure that it will always be executed no matter
4269 how the loop exits. Otherwise, emit the insn after the loop,
4270 since this is slightly more efficient. */
4271 if (loop_number_exit_count[uid_loop_num[INSN_UID (loop_start)]])
4272 insert_before = loop_start;
4274 insert_before = end_insert_before;
4275 emit_insn_before (gen_move_insn (v->dest_reg, v->final_value),
4279 /* If the insn to set the final value of the giv was emitted
4280 before the loop, then we must delete the insn inside the loop
4281 that sets it. If this is a LIBCALL, then we must delete
4282 every insn in the libcall. Note, however, that
4283 final_giv_value will only succeed when there are multiple
4284 exits if the giv is dead at each exit, hence it does not
4285 matter that the original insn remains because it is dead
4287 /* Delete the insn inside the loop that sets the giv since
4288 the giv is now set before (or after) the loop. */
4289 delete_insn (v->insn);
4293 if (loop_dump_stream)
4295 fprintf (loop_dump_stream, "giv at %d reduced to ",
4296 INSN_UID (v->insn));
4297 print_rtl (loop_dump_stream, v->new_reg);
4298 fprintf (loop_dump_stream, "\n");
4302 /* All the givs based on the biv bl have been reduced if they
4305 /* For each giv not marked as maybe dead that has been combined with a
4306 second giv, clear any "maybe dead" mark on that second giv.
4307 v->new_reg will either be or refer to the register of the giv it
4310 Doing this clearing avoids problems in biv elimination where a
4311 giv's new_reg is a complex value that can't be put in the insn but
4312 the giv combined with (with a reg as new_reg) is marked maybe_dead.
4313 Since the register will be used in either case, we'd prefer it be
4314 used from the simpler giv. */
4316 for (v = bl->giv; v; v = v->next_iv)
4317 if (! v->maybe_dead && v->same)
4318 v->same->maybe_dead = 0;
4320 /* Try to eliminate the biv, if it is a candidate.
4321 This won't work if ! all_reduced,
4322 since the givs we planned to use might not have been reduced.
4324 We have to be careful that we didn't initially think we could eliminate
4325 this biv because of a giv that we now think may be dead and shouldn't
4326 be used as a biv replacement.
4328 Also, there is the possibility that we may have a giv that looks
4329 like it can be used to eliminate a biv, but the resulting insn
4330 isn't valid. This can happen, for example, on the 88k, where a
4331 JUMP_INSN can compare a register only with zero. Attempts to
4332 replace it with a compare with a constant will fail.
4334 Note that in cases where this call fails, we may have replaced some
4335 of the occurrences of the biv with a giv, but no harm was done in
4336 doing so in the rare cases where it can occur. */
4338 if (all_reduced == 1 && bl->eliminable
4339 && maybe_eliminate_biv (bl, loop_start, end, 1,
4340 threshold, insn_count))
4343 /* ?? If we created a new test to bypass the loop entirely,
4344 or otherwise drop straight in, based on this test, then
4345 we might want to rewrite it also. This way some later
4346 pass has more hope of removing the initialization of this
4349 /* If final_value != 0, then the biv may be used after loop end
4350 and we must emit an insn to set it just in case.
4352 Reversed bivs already have an insn after the loop setting their
4353 value, so we don't need another one. We can't calculate the
4354 proper final value for such a biv here anyways. */
4355 if (final_value != 0 && ! bl->reversed)
4359 /* If the loop has multiple exits, emit the insn before the
4360 loop to ensure that it will always be executed no matter
4361 how the loop exits. Otherwise, emit the insn after the
4362 loop, since this is slightly more efficient. */
4363 if (loop_number_exit_count[uid_loop_num[INSN_UID (loop_start)]])
4364 insert_before = loop_start;
4366 insert_before = end_insert_before;
4368 emit_insn_before (gen_move_insn (bl->biv->dest_reg, final_value),
4373 /* Delete all of the instructions inside the loop which set
4374 the biv, as they are all dead. If is safe to delete them,
4375 because an insn setting a biv will never be part of a libcall. */
4376 /* However, deleting them will invalidate the regno_last_uid info,
4377 so keeping them around is more convenient. Final_biv_value
4378 will only succeed when there are multiple exits if the biv
4379 is dead at each exit, hence it does not matter that the original
4380 insn remains, because it is dead anyways. */
4381 for (v = bl->biv; v; v = v->next_iv)
4382 delete_insn (v->insn);
4385 if (loop_dump_stream)
4386 fprintf (loop_dump_stream, "Reg %d: biv eliminated\n",
4391 /* Go through all the instructions in the loop, making all the
4392 register substitutions scheduled in REG_MAP. */
4394 for (p = loop_start; p != end; p = NEXT_INSN (p))
4395 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
4396 || GET_CODE (p) == CALL_INSN)
4398 replace_regs (PATTERN (p), reg_map, max_reg_before_loop, 0);
4399 replace_regs (REG_NOTES (p), reg_map, max_reg_before_loop, 0);
4403 /* Unroll loops from within strength reduction so that we can use the
4404 induction variable information that strength_reduce has already
4408 unroll_loop (loop_end, insn_count, loop_start, end_insert_before, 1);
4411 /* instrument the loop with bct insn */
4412 #ifdef HAVE_decrement_and_branch_on_count
4413 if (HAVE_decrement_and_branch_on_count)
4414 insert_bct (loop_start, loop_end);
4418 if (loop_dump_stream)
4419 fprintf (loop_dump_stream, "\n");
4422 /* Return 1 if X is a valid source for an initial value (or as value being
4423 compared against in an initial test).
4425 X must be either a register or constant and must not be clobbered between
4426 the current insn and the start of the loop.
4428 INSN is the insn containing X. */
4431 valid_initial_value_p (x, insn, call_seen, loop_start)
4440 /* Only consider pseudos we know about initialized in insns whose luids
4442 if (GET_CODE (x) != REG
4443 || REGNO (x) >= max_reg_before_loop)
4446 /* Don't use call-clobbered registers across a call which clobbers it. On
4447 some machines, don't use any hard registers at all. */
4448 if (REGNO (x) < FIRST_PSEUDO_REGISTER
4449 && (SMALL_REGISTER_CLASSES
4450 || (call_used_regs[REGNO (x)] && call_seen)))
4453 /* Don't use registers that have been clobbered before the start of the
4455 if (reg_set_between_p (x, insn, loop_start))
4461 /* Scan X for memory refs and check each memory address
4462 as a possible giv. INSN is the insn whose pattern X comes from.
4463 NOT_EVERY_ITERATION is 1 if the insn might not be executed during
4464 every loop iteration. */
4467 find_mem_givs (x, insn, not_every_iteration, loop_start, loop_end)
4470 int not_every_iteration;
4471 rtx loop_start, loop_end;
4474 register enum rtx_code code;
4480 code = GET_CODE (x);
4504 benefit = general_induction_var (XEXP (x, 0),
4505 &src_reg, &add_val, &mult_val);
4507 /* Don't make a DEST_ADDR giv with mult_val == 1 && add_val == 0.
4508 Such a giv isn't useful. */
4509 if (benefit > 0 && (mult_val != const1_rtx || add_val != const0_rtx))
4511 /* Found one; record it. */
4513 = (struct induction *) oballoc (sizeof (struct induction));
4515 record_giv (v, insn, src_reg, addr_placeholder, mult_val,
4516 add_val, benefit, DEST_ADDR, not_every_iteration,
4517 &XEXP (x, 0), loop_start, loop_end);
4519 v->mem_mode = GET_MODE (x);
4528 /* Recursively scan the subexpressions for other mem refs. */
4530 fmt = GET_RTX_FORMAT (code);
4531 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4533 find_mem_givs (XEXP (x, i), insn, not_every_iteration, loop_start,
4535 else if (fmt[i] == 'E')
4536 for (j = 0; j < XVECLEN (x, i); j++)
4537 find_mem_givs (XVECEXP (x, i, j), insn, not_every_iteration,
4538 loop_start, loop_end);
4541 /* Fill in the data about one biv update.
4542 V is the `struct induction' in which we record the biv. (It is
4543 allocated by the caller, with alloca.)
4544 INSN is the insn that sets it.
4545 DEST_REG is the biv's reg.
4547 MULT_VAL is const1_rtx if the biv is being incremented here, in which case
4548 INC_VAL is the increment. Otherwise, MULT_VAL is const0_rtx and the biv is
4549 being set to INC_VAL.
4551 NOT_EVERY_ITERATION is nonzero if this biv update is not know to be
4552 executed every iteration; MAYBE_MULTIPLE is nonzero if this biv update
4553 can be executed more than once per iteration. If MAYBE_MULTIPLE
4554 and NOT_EVERY_ITERATION are both zero, we know that the biv update is
4555 executed exactly once per iteration. */
4558 record_biv (v, insn, dest_reg, inc_val, mult_val,
4559 not_every_iteration, maybe_multiple)
4560 struct induction *v;
4565 int not_every_iteration;
4568 struct iv_class *bl;
4571 v->src_reg = dest_reg;
4572 v->dest_reg = dest_reg;
4573 v->mult_val = mult_val;
4574 v->add_val = inc_val;
4575 v->mode = GET_MODE (dest_reg);
4576 v->always_computable = ! not_every_iteration;
4577 v->always_executed = ! not_every_iteration;
4578 v->maybe_multiple = maybe_multiple;
4580 /* Add this to the reg's iv_class, creating a class
4581 if this is the first incrementation of the reg. */
4583 bl = reg_biv_class[REGNO (dest_reg)];
4586 /* Create and initialize new iv_class. */
4588 bl = (struct iv_class *) oballoc (sizeof (struct iv_class));
4590 bl->regno = REGNO (dest_reg);
4596 /* Set initial value to the reg itself. */
4597 bl->initial_value = dest_reg;
4598 /* We haven't seen the initializing insn yet */
4601 bl->initial_test = 0;
4602 bl->incremented = 0;
4606 bl->total_benefit = 0;
4608 /* Add this class to loop_iv_list. */
4609 bl->next = loop_iv_list;
4612 /* Put it in the array of biv register classes. */
4613 reg_biv_class[REGNO (dest_reg)] = bl;
4616 /* Update IV_CLASS entry for this biv. */
4617 v->next_iv = bl->biv;
4620 if (mult_val == const1_rtx)
4621 bl->incremented = 1;
4623 if (loop_dump_stream)
4625 fprintf (loop_dump_stream,
4626 "Insn %d: possible biv, reg %d,",
4627 INSN_UID (insn), REGNO (dest_reg));
4628 if (GET_CODE (inc_val) == CONST_INT)
4630 fprintf (loop_dump_stream, " const =");
4631 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, INTVAL (inc_val));
4632 fputc ('\n', loop_dump_stream);
4636 fprintf (loop_dump_stream, " const = ");
4637 print_rtl (loop_dump_stream, inc_val);
4638 fprintf (loop_dump_stream, "\n");
4643 /* Fill in the data about one giv.
4644 V is the `struct induction' in which we record the giv. (It is
4645 allocated by the caller, with alloca.)
4646 INSN is the insn that sets it.
4647 BENEFIT estimates the savings from deleting this insn.
4648 TYPE is DEST_REG or DEST_ADDR; it says whether the giv is computed
4649 into a register or is used as a memory address.
4651 SRC_REG is the biv reg which the giv is computed from.
4652 DEST_REG is the giv's reg (if the giv is stored in a reg).
4653 MULT_VAL and ADD_VAL are the coefficients used to compute the giv.
4654 LOCATION points to the place where this giv's value appears in INSN. */
4657 record_giv (v, insn, src_reg, dest_reg, mult_val, add_val, benefit,
4658 type, not_every_iteration, location, loop_start, loop_end)
4659 struct induction *v;
4663 rtx mult_val, add_val;
4666 int not_every_iteration;
4668 rtx loop_start, loop_end;
4670 struct induction *b;
4671 struct iv_class *bl;
4672 rtx set = single_set (insn);
4675 v->src_reg = src_reg;
4677 v->dest_reg = dest_reg;
4678 v->mult_val = mult_val;
4679 v->add_val = add_val;
4680 v->benefit = benefit;
4681 v->location = location;
4683 v->combined_with = 0;
4684 v->maybe_multiple = 0;
4686 v->derive_adjustment = 0;
4692 v->auto_inc_opt = 0;
4696 /* The v->always_computable field is used in update_giv_derive, to
4697 determine whether a giv can be used to derive another giv. For a
4698 DEST_REG giv, INSN computes a new value for the giv, so its value
4699 isn't computable if INSN insn't executed every iteration.
4700 However, for a DEST_ADDR giv, INSN merely uses the value of the giv;
4701 it does not compute a new value. Hence the value is always computable
4702 regardless of whether INSN is executed each iteration. */
4704 if (type == DEST_ADDR)
4705 v->always_computable = 1;
4707 v->always_computable = ! not_every_iteration;
4709 v->always_executed = ! not_every_iteration;
4711 if (type == DEST_ADDR)
4713 v->mode = GET_MODE (*location);
4717 else /* type == DEST_REG */
4719 v->mode = GET_MODE (SET_DEST (set));
4721 v->lifetime = (uid_luid[REGNO_LAST_UID (REGNO (dest_reg))]
4722 - uid_luid[REGNO_FIRST_UID (REGNO (dest_reg))]);
4724 v->times_used = n_times_used[REGNO (dest_reg)];
4726 /* If the lifetime is zero, it means that this register is
4727 really a dead store. So mark this as a giv that can be
4728 ignored. This will not prevent the biv from being eliminated. */
4729 if (v->lifetime == 0)
4732 reg_iv_type[REGNO (dest_reg)] = GENERAL_INDUCT;
4733 reg_iv_info[REGNO (dest_reg)] = v;
4736 /* Add the giv to the class of givs computed from one biv. */
4738 bl = reg_biv_class[REGNO (src_reg)];
4741 v->next_iv = bl->giv;
4743 /* Don't count DEST_ADDR. This is supposed to count the number of
4744 insns that calculate givs. */
4745 if (type == DEST_REG)
4747 bl->total_benefit += benefit;
4750 /* Fatal error, biv missing for this giv? */
4753 if (type == DEST_ADDR)
4757 /* The giv can be replaced outright by the reduced register only if all
4758 of the following conditions are true:
4759 - the insn that sets the giv is always executed on any iteration
4760 on which the giv is used at all
4761 (there are two ways to deduce this:
4762 either the insn is executed on every iteration,
4763 or all uses follow that insn in the same basic block),
4764 - the giv is not used outside the loop
4765 - no assignments to the biv occur during the giv's lifetime. */
4767 if (REGNO_FIRST_UID (REGNO (dest_reg)) == INSN_UID (insn)
4768 /* Previous line always fails if INSN was moved by loop opt. */
4769 && uid_luid[REGNO_LAST_UID (REGNO (dest_reg))] < INSN_LUID (loop_end)
4770 && (! not_every_iteration
4771 || last_use_this_basic_block (dest_reg, insn)))
4773 /* Now check that there are no assignments to the biv within the
4774 giv's lifetime. This requires two separate checks. */
4776 /* Check each biv update, and fail if any are between the first
4777 and last use of the giv.
4779 If this loop contains an inner loop that was unrolled, then
4780 the insn modifying the biv may have been emitted by the loop
4781 unrolling code, and hence does not have a valid luid. Just
4782 mark the biv as not replaceable in this case. It is not very
4783 useful as a biv, because it is used in two different loops.
4784 It is very unlikely that we would be able to optimize the giv
4785 using this biv anyways. */
4788 for (b = bl->biv; b; b = b->next_iv)
4790 if (INSN_UID (b->insn) >= max_uid_for_loop
4791 || ((uid_luid[INSN_UID (b->insn)]
4792 >= uid_luid[REGNO_FIRST_UID (REGNO (dest_reg))])
4793 && (uid_luid[INSN_UID (b->insn)]
4794 <= uid_luid[REGNO_LAST_UID (REGNO (dest_reg))])))
4797 v->not_replaceable = 1;
4802 /* If there are any backwards branches that go from after the
4803 biv update to before it, then this giv is not replaceable. */
4805 for (b = bl->biv; b; b = b->next_iv)
4806 if (back_branch_in_range_p (b->insn, loop_start, loop_end))
4809 v->not_replaceable = 1;
4815 /* May still be replaceable, we don't have enough info here to
4818 v->not_replaceable = 0;
4822 if (loop_dump_stream)
4824 if (type == DEST_REG)
4825 fprintf (loop_dump_stream, "Insn %d: giv reg %d",
4826 INSN_UID (insn), REGNO (dest_reg));
4828 fprintf (loop_dump_stream, "Insn %d: dest address",
4831 fprintf (loop_dump_stream, " src reg %d benefit %d",
4832 REGNO (src_reg), v->benefit);
4833 fprintf (loop_dump_stream, " used %d lifetime %d",
4834 v->times_used, v->lifetime);
4837 fprintf (loop_dump_stream, " replaceable");
4839 if (GET_CODE (mult_val) == CONST_INT)
4841 fprintf (loop_dump_stream, " mult ");
4842 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, INTVAL (mult_val));
4846 fprintf (loop_dump_stream, " mult ");
4847 print_rtl (loop_dump_stream, mult_val);
4850 if (GET_CODE (add_val) == CONST_INT)
4852 fprintf (loop_dump_stream, " add ");
4853 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, INTVAL (add_val));
4857 fprintf (loop_dump_stream, " add ");
4858 print_rtl (loop_dump_stream, add_val);
4862 if (loop_dump_stream)
4863 fprintf (loop_dump_stream, "\n");
4868 /* All this does is determine whether a giv can be made replaceable because
4869 its final value can be calculated. This code can not be part of record_giv
4870 above, because final_giv_value requires that the number of loop iterations
4871 be known, and that can not be accurately calculated until after all givs
4872 have been identified. */
4875 check_final_value (v, loop_start, loop_end)
4876 struct induction *v;
4877 rtx loop_start, loop_end;
4879 struct iv_class *bl;
4880 rtx final_value = 0;
4882 bl = reg_biv_class[REGNO (v->src_reg)];
4884 /* DEST_ADDR givs will never reach here, because they are always marked
4885 replaceable above in record_giv. */
4887 /* The giv can be replaced outright by the reduced register only if all
4888 of the following conditions are true:
4889 - the insn that sets the giv is always executed on any iteration
4890 on which the giv is used at all
4891 (there are two ways to deduce this:
4892 either the insn is executed on every iteration,
4893 or all uses follow that insn in the same basic block),
4894 - its final value can be calculated (this condition is different
4895 than the one above in record_giv)
4896 - no assignments to the biv occur during the giv's lifetime. */
4899 /* This is only called now when replaceable is known to be false. */
4900 /* Clear replaceable, so that it won't confuse final_giv_value. */
4904 if ((final_value = final_giv_value (v, loop_start, loop_end))
4905 && (v->always_computable || last_use_this_basic_block (v->dest_reg, v->insn)))
4907 int biv_increment_seen = 0;
4913 /* When trying to determine whether or not a biv increment occurs
4914 during the lifetime of the giv, we can ignore uses of the variable
4915 outside the loop because final_value is true. Hence we can not
4916 use regno_last_uid and regno_first_uid as above in record_giv. */
4918 /* Search the loop to determine whether any assignments to the
4919 biv occur during the giv's lifetime. Start with the insn
4920 that sets the giv, and search around the loop until we come
4921 back to that insn again.
4923 Also fail if there is a jump within the giv's lifetime that jumps
4924 to somewhere outside the lifetime but still within the loop. This
4925 catches spaghetti code where the execution order is not linear, and
4926 hence the above test fails. Here we assume that the giv lifetime
4927 does not extend from one iteration of the loop to the next, so as
4928 to make the test easier. Since the lifetime isn't known yet,
4929 this requires two loops. See also record_giv above. */
4931 last_giv_use = v->insn;
4937 p = NEXT_INSN (loop_start);
4941 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
4942 || GET_CODE (p) == CALL_INSN)
4944 if (biv_increment_seen)
4946 if (reg_mentioned_p (v->dest_reg, PATTERN (p)))
4949 v->not_replaceable = 1;
4953 else if (reg_set_p (v->src_reg, PATTERN (p)))
4954 biv_increment_seen = 1;
4955 else if (reg_mentioned_p (v->dest_reg, PATTERN (p)))
4960 /* Now that the lifetime of the giv is known, check for branches
4961 from within the lifetime to outside the lifetime if it is still
4971 p = NEXT_INSN (loop_start);
4972 if (p == last_giv_use)
4975 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p)
4976 && LABEL_NAME (JUMP_LABEL (p))
4977 && ((INSN_UID (JUMP_LABEL (p)) >= max_uid_for_loop)
4978 || (INSN_UID (v->insn) >= max_uid_for_loop)
4979 || (INSN_UID (last_giv_use) >= max_uid_for_loop)
4980 || (INSN_LUID (JUMP_LABEL (p)) < INSN_LUID (v->insn)
4981 && INSN_LUID (JUMP_LABEL (p)) > INSN_LUID (loop_start))
4982 || (INSN_LUID (JUMP_LABEL (p)) > INSN_LUID (last_giv_use)
4983 && INSN_LUID (JUMP_LABEL (p)) < INSN_LUID (loop_end))))
4986 v->not_replaceable = 1;
4988 if (loop_dump_stream)
4989 fprintf (loop_dump_stream,
4990 "Found branch outside giv lifetime.\n");
4997 /* If it is replaceable, then save the final value. */
4999 v->final_value = final_value;
5002 if (loop_dump_stream && v->replaceable)
5003 fprintf (loop_dump_stream, "Insn %d: giv reg %d final_value replaceable\n",
5004 INSN_UID (v->insn), REGNO (v->dest_reg));
5007 /* Update the status of whether a giv can derive other givs.
5009 We need to do something special if there is or may be an update to the biv
5010 between the time the giv is defined and the time it is used to derive
5013 In addition, a giv that is only conditionally set is not allowed to
5014 derive another giv once a label has been passed.
5016 The cases we look at are when a label or an update to a biv is passed. */
5019 update_giv_derive (p)
5022 struct iv_class *bl;
5023 struct induction *biv, *giv;
5027 /* Search all IV classes, then all bivs, and finally all givs.
5029 There are three cases we are concerned with. First we have the situation
5030 of a giv that is only updated conditionally. In that case, it may not
5031 derive any givs after a label is passed.
5033 The second case is when a biv update occurs, or may occur, after the
5034 definition of a giv. For certain biv updates (see below) that are
5035 known to occur between the giv definition and use, we can adjust the
5036 giv definition. For others, or when the biv update is conditional,
5037 we must prevent the giv from deriving any other givs. There are two
5038 sub-cases within this case.
5040 If this is a label, we are concerned with any biv update that is done
5041 conditionally, since it may be done after the giv is defined followed by
5042 a branch here (actually, we need to pass both a jump and a label, but
5043 this extra tracking doesn't seem worth it).
5045 If this is a jump, we are concerned about any biv update that may be
5046 executed multiple times. We are actually only concerned about
5047 backward jumps, but it is probably not worth performing the test
5048 on the jump again here.
5050 If this is a biv update, we must adjust the giv status to show that a
5051 subsequent biv update was performed. If this adjustment cannot be done,
5052 the giv cannot derive further givs. */
5054 for (bl = loop_iv_list; bl; bl = bl->next)
5055 for (biv = bl->biv; biv; biv = biv->next_iv)
5056 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN
5059 for (giv = bl->giv; giv; giv = giv->next_iv)
5061 /* If cant_derive is already true, there is no point in
5062 checking all of these conditions again. */
5063 if (giv->cant_derive)
5066 /* If this giv is conditionally set and we have passed a label,
5067 it cannot derive anything. */
5068 if (GET_CODE (p) == CODE_LABEL && ! giv->always_computable)
5069 giv->cant_derive = 1;
5071 /* Skip givs that have mult_val == 0, since
5072 they are really invariants. Also skip those that are
5073 replaceable, since we know their lifetime doesn't contain
5075 else if (giv->mult_val == const0_rtx || giv->replaceable)
5078 /* The only way we can allow this giv to derive another
5079 is if this is a biv increment and we can form the product
5080 of biv->add_val and giv->mult_val. In this case, we will
5081 be able to compute a compensation. */
5082 else if (biv->insn == p)
5086 if (biv->mult_val == const1_rtx)
5087 tem = simplify_giv_expr (gen_rtx_MULT (giv->mode,
5092 if (tem && giv->derive_adjustment)
5093 tem = simplify_giv_expr (gen_rtx_PLUS (giv->mode, tem,
5094 giv->derive_adjustment),
5097 giv->derive_adjustment = tem;
5099 giv->cant_derive = 1;
5101 else if ((GET_CODE (p) == CODE_LABEL && ! biv->always_computable)
5102 || (GET_CODE (p) == JUMP_INSN && biv->maybe_multiple))
5103 giv->cant_derive = 1;
5108 /* Check whether an insn is an increment legitimate for a basic induction var.
5109 X is the source of insn P, or a part of it.
5110 MODE is the mode in which X should be interpreted.
5112 DEST_REG is the putative biv, also the destination of the insn.
5113 We accept patterns of these forms:
5114 REG = REG + INVARIANT (includes REG = REG - CONSTANT)
5115 REG = INVARIANT + REG
5117 If X is suitable, we return 1, set *MULT_VAL to CONST1_RTX,
5118 and store the additive term into *INC_VAL.
5120 If X is an assignment of an invariant into DEST_REG, we set
5121 *MULT_VAL to CONST0_RTX, and store the invariant into *INC_VAL.
5123 We also want to detect a BIV when it corresponds to a variable
5124 whose mode was promoted via PROMOTED_MODE. In that case, an increment
5125 of the variable may be a PLUS that adds a SUBREG of that variable to
5126 an invariant and then sign- or zero-extends the result of the PLUS
5129 Most GIVs in such cases will be in the promoted mode, since that is the
5130 probably the natural computation mode (and almost certainly the mode
5131 used for addresses) on the machine. So we view the pseudo-reg containing
5132 the variable as the BIV, as if it were simply incremented.
5134 Note that treating the entire pseudo as a BIV will result in making
5135 simple increments to any GIVs based on it. However, if the variable
5136 overflows in its declared mode but not its promoted mode, the result will
5137 be incorrect. This is acceptable if the variable is signed, since
5138 overflows in such cases are undefined, but not if it is unsigned, since
5139 those overflows are defined. So we only check for SIGN_EXTEND and
5142 If we cannot find a biv, we return 0. */
5145 basic_induction_var (x, mode, dest_reg, p, inc_val, mult_val)
5147 enum machine_mode mode;
5153 register enum rtx_code code;
5157 code = GET_CODE (x);
5161 if (XEXP (x, 0) == dest_reg
5162 || (GET_CODE (XEXP (x, 0)) == SUBREG
5163 && SUBREG_PROMOTED_VAR_P (XEXP (x, 0))
5164 && SUBREG_REG (XEXP (x, 0)) == dest_reg))
5166 else if (XEXP (x, 1) == dest_reg
5167 || (GET_CODE (XEXP (x, 1)) == SUBREG
5168 && SUBREG_PROMOTED_VAR_P (XEXP (x, 1))
5169 && SUBREG_REG (XEXP (x, 1)) == dest_reg))
5174 if (invariant_p (arg) != 1)
5177 *inc_val = convert_modes (GET_MODE (dest_reg), GET_MODE (x), arg, 0);
5178 *mult_val = const1_rtx;
5182 /* If this is a SUBREG for a promoted variable, check the inner
5184 if (SUBREG_PROMOTED_VAR_P (x))
5185 return basic_induction_var (SUBREG_REG (x), GET_MODE (SUBREG_REG (x)),
5186 dest_reg, p, inc_val, mult_val);
5190 /* If this register is assigned in the previous insn, look at its
5191 source, but don't go outside the loop or past a label. */
5193 for (insn = PREV_INSN (p);
5194 (insn && GET_CODE (insn) == NOTE
5195 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG);
5196 insn = PREV_INSN (insn))
5200 set = single_set (insn);
5203 && (SET_DEST (set) == x
5204 || (GET_CODE (SET_DEST (set)) == SUBREG
5205 && (GET_MODE_SIZE (GET_MODE (SET_DEST (set)))
5207 && SUBREG_REG (SET_DEST (set)) == x)))
5208 return basic_induction_var (SET_SRC (set),
5209 (GET_MODE (SET_SRC (set)) == VOIDmode
5211 : GET_MODE (SET_SRC (set))),
5214 /* ... fall through ... */
5216 /* Can accept constant setting of biv only when inside inner most loop.
5217 Otherwise, a biv of an inner loop may be incorrectly recognized
5218 as a biv of the outer loop,
5219 causing code to be moved INTO the inner loop. */
5221 if (invariant_p (x) != 1)
5226 if (loops_enclosed == 1)
5228 /* Possible bug here? Perhaps we don't know the mode of X. */
5229 *inc_val = convert_modes (GET_MODE (dest_reg), mode, x, 0);
5230 *mult_val = const0_rtx;
5237 return basic_induction_var (XEXP (x, 0), GET_MODE (XEXP (x, 0)),
5238 dest_reg, p, inc_val, mult_val);
5240 /* Similar, since this can be a sign extension. */
5241 for (insn = PREV_INSN (p);
5242 (insn && GET_CODE (insn) == NOTE
5243 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG);
5244 insn = PREV_INSN (insn))
5248 set = single_set (insn);
5250 if (set && SET_DEST (set) == XEXP (x, 0)
5251 && GET_CODE (XEXP (x, 1)) == CONST_INT
5252 && INTVAL (XEXP (x, 1)) >= 0
5253 && GET_CODE (SET_SRC (set)) == ASHIFT
5254 && XEXP (x, 1) == XEXP (SET_SRC (set), 1))
5255 return basic_induction_var (XEXP (SET_SRC (set), 0),
5256 GET_MODE (XEXP (x, 0)),
5257 dest_reg, insn, inc_val, mult_val);
5265 /* A general induction variable (giv) is any quantity that is a linear
5266 function of a basic induction variable,
5267 i.e. giv = biv * mult_val + add_val.
5268 The coefficients can be any loop invariant quantity.
5269 A giv need not be computed directly from the biv;
5270 it can be computed by way of other givs. */
5272 /* Determine whether X computes a giv.
5273 If it does, return a nonzero value
5274 which is the benefit from eliminating the computation of X;
5275 set *SRC_REG to the register of the biv that it is computed from;
5276 set *ADD_VAL and *MULT_VAL to the coefficients,
5277 such that the value of X is biv * mult + add; */
5280 general_induction_var (x, src_reg, add_val, mult_val)
5290 /* If this is an invariant, forget it, it isn't a giv. */
5291 if (invariant_p (x) == 1)
5294 /* See if the expression could be a giv and get its form.
5295 Mark our place on the obstack in case we don't find a giv. */
5296 storage = (char *) oballoc (0);
5297 x = simplify_giv_expr (x, &benefit);
5304 switch (GET_CODE (x))
5308 /* Since this is now an invariant and wasn't before, it must be a giv
5309 with MULT_VAL == 0. It doesn't matter which BIV we associate this
5311 *src_reg = loop_iv_list->biv->dest_reg;
5312 *mult_val = const0_rtx;
5317 /* This is equivalent to a BIV. */
5319 *mult_val = const1_rtx;
5320 *add_val = const0_rtx;
5324 /* Either (plus (biv) (invar)) or
5325 (plus (mult (biv) (invar_1)) (invar_2)). */
5326 if (GET_CODE (XEXP (x, 0)) == MULT)
5328 *src_reg = XEXP (XEXP (x, 0), 0);
5329 *mult_val = XEXP (XEXP (x, 0), 1);
5333 *src_reg = XEXP (x, 0);
5334 *mult_val = const1_rtx;
5336 *add_val = XEXP (x, 1);
5340 /* ADD_VAL is zero. */
5341 *src_reg = XEXP (x, 0);
5342 *mult_val = XEXP (x, 1);
5343 *add_val = const0_rtx;
5350 /* Remove any enclosing USE from ADD_VAL and MULT_VAL (there will be
5351 unless they are CONST_INT). */
5352 if (GET_CODE (*add_val) == USE)
5353 *add_val = XEXP (*add_val, 0);
5354 if (GET_CODE (*mult_val) == USE)
5355 *mult_val = XEXP (*mult_val, 0);
5357 benefit += rtx_cost (orig_x, SET);
5359 /* Always return some benefit if this is a giv so it will be detected
5360 as such. This allows elimination of bivs that might otherwise
5361 not be eliminated. */
5362 return benefit == 0 ? 1 : benefit;
5365 /* Given an expression, X, try to form it as a linear function of a biv.
5366 We will canonicalize it to be of the form
5367 (plus (mult (BIV) (invar_1))
5369 with possible degeneracies.
5371 The invariant expressions must each be of a form that can be used as a
5372 machine operand. We surround then with a USE rtx (a hack, but localized
5373 and certainly unambiguous!) if not a CONST_INT for simplicity in this
5374 routine; it is the caller's responsibility to strip them.
5376 If no such canonicalization is possible (i.e., two biv's are used or an
5377 expression that is neither invariant nor a biv or giv), this routine
5380 For a non-zero return, the result will have a code of CONST_INT, USE,
5381 REG (for a BIV), PLUS, or MULT. No other codes will occur.
5383 *BENEFIT will be incremented by the benefit of any sub-giv encountered. */
5386 simplify_giv_expr (x, benefit)
5390 enum machine_mode mode = GET_MODE (x);
5394 /* If this is not an integer mode, or if we cannot do arithmetic in this
5395 mode, this can't be a giv. */
5396 if (mode != VOIDmode
5397 && (GET_MODE_CLASS (mode) != MODE_INT
5398 || GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT))
5401 switch (GET_CODE (x))
5404 arg0 = simplify_giv_expr (XEXP (x, 0), benefit);
5405 arg1 = simplify_giv_expr (XEXP (x, 1), benefit);
5406 if (arg0 == 0 || arg1 == 0)
5409 /* Put constant last, CONST_INT last if both constant. */
5410 if ((GET_CODE (arg0) == USE
5411 || GET_CODE (arg0) == CONST_INT)
5412 && GET_CODE (arg1) != CONST_INT)
5413 tem = arg0, arg0 = arg1, arg1 = tem;
5415 /* Handle addition of zero, then addition of an invariant. */
5416 if (arg1 == const0_rtx)
5418 else if (GET_CODE (arg1) == CONST_INT || GET_CODE (arg1) == USE)
5419 switch (GET_CODE (arg0))
5423 /* Both invariant. Only valid if sum is machine operand.
5424 First strip off possible USE on the operands. */
5425 if (GET_CODE (arg0) == USE)
5426 arg0 = XEXP (arg0, 0);
5428 if (GET_CODE (arg1) == USE)
5429 arg1 = XEXP (arg1, 0);
5432 if (CONSTANT_P (arg0) && GET_CODE (arg1) == CONST_INT)
5434 tem = plus_constant (arg0, INTVAL (arg1));
5435 if (GET_CODE (tem) != CONST_INT)
5436 tem = gen_rtx_USE (mode, tem);
5440 /* Adding two invariants must result in an invariant,
5441 so enclose addition operation inside a USE and
5443 tem = gen_rtx_USE (mode, gen_rtx_PLUS (mode, arg0, arg1));
5450 /* biv + invar or mult + invar. Return sum. */
5451 return gen_rtx_PLUS (mode, arg0, arg1);
5454 /* (a + invar_1) + invar_2. Associate. */
5455 return simplify_giv_expr (gen_rtx_PLUS (mode,
5458 XEXP (arg0, 1), arg1)),
5465 /* Each argument must be either REG, PLUS, or MULT. Convert REG to
5466 MULT to reduce cases. */
5467 if (GET_CODE (arg0) == REG)
5468 arg0 = gen_rtx_MULT (mode, arg0, const1_rtx);
5469 if (GET_CODE (arg1) == REG)
5470 arg1 = gen_rtx_MULT (mode, arg1, const1_rtx);
5472 /* Now have PLUS + PLUS, PLUS + MULT, MULT + PLUS, or MULT + MULT.
5473 Put a MULT first, leaving PLUS + PLUS, MULT + PLUS, or MULT + MULT.
5474 Recurse to associate the second PLUS. */
5475 if (GET_CODE (arg1) == MULT)
5476 tem = arg0, arg0 = arg1, arg1 = tem;
5478 if (GET_CODE (arg1) == PLUS)
5479 return simplify_giv_expr (gen_rtx_PLUS (mode,
5480 gen_rtx_PLUS (mode, arg0,
5485 /* Now must have MULT + MULT. Distribute if same biv, else not giv. */
5486 if (GET_CODE (arg0) != MULT || GET_CODE (arg1) != MULT)
5489 if (XEXP (arg0, 0) != XEXP (arg1, 0))
5492 return simplify_giv_expr (gen_rtx_MULT (mode,
5500 /* Handle "a - b" as "a + b * (-1)". */
5501 return simplify_giv_expr (gen_rtx_PLUS (mode,
5503 gen_rtx_MULT (mode, XEXP (x, 1),
5508 arg0 = simplify_giv_expr (XEXP (x, 0), benefit);
5509 arg1 = simplify_giv_expr (XEXP (x, 1), benefit);
5510 if (arg0 == 0 || arg1 == 0)
5513 /* Put constant last, CONST_INT last if both constant. */
5514 if ((GET_CODE (arg0) == USE || GET_CODE (arg0) == CONST_INT)
5515 && GET_CODE (arg1) != CONST_INT)
5516 tem = arg0, arg0 = arg1, arg1 = tem;
5518 /* If second argument is not now constant, not giv. */
5519 if (GET_CODE (arg1) != USE && GET_CODE (arg1) != CONST_INT)
5522 /* Handle multiply by 0 or 1. */
5523 if (arg1 == const0_rtx)
5526 else if (arg1 == const1_rtx)
5529 switch (GET_CODE (arg0))
5532 /* biv * invar. Done. */
5533 return gen_rtx_MULT (mode, arg0, arg1);
5536 /* Product of two constants. */
5537 return GEN_INT (INTVAL (arg0) * INTVAL (arg1));
5540 /* invar * invar. Not giv. */
5544 /* (a * invar_1) * invar_2. Associate. */
5545 return simplify_giv_expr (gen_rtx_MULT (mode, XEXP (arg0, 0),
5552 /* (a + invar_1) * invar_2. Distribute. */
5553 return simplify_giv_expr (gen_rtx_PLUS (mode,
5567 /* Shift by constant is multiply by power of two. */
5568 if (GET_CODE (XEXP (x, 1)) != CONST_INT)
5571 return simplify_giv_expr (gen_rtx_MULT (mode,
5573 GEN_INT ((HOST_WIDE_INT) 1
5574 << INTVAL (XEXP (x, 1)))),
5578 /* "-a" is "a * (-1)" */
5579 return simplify_giv_expr (gen_rtx_MULT (mode, XEXP (x, 0), constm1_rtx),
5583 /* "~a" is "-a - 1". Silly, but easy. */
5584 return simplify_giv_expr (gen_rtx_MINUS (mode,
5585 gen_rtx_NEG (mode, XEXP (x, 0)),
5590 /* Already in proper form for invariant. */
5594 /* If this is a new register, we can't deal with it. */
5595 if (REGNO (x) >= max_reg_before_loop)
5598 /* Check for biv or giv. */
5599 switch (reg_iv_type[REGNO (x)])
5603 case GENERAL_INDUCT:
5605 struct induction *v = reg_iv_info[REGNO (x)];
5607 /* Form expression from giv and add benefit. Ensure this giv
5608 can derive another and subtract any needed adjustment if so. */
5609 *benefit += v->benefit;
5613 tem = gen_rtx_PLUS (mode, gen_rtx_MULT (mode, v->src_reg,
5616 if (v->derive_adjustment)
5617 tem = gen_rtx_MINUS (mode, tem, v->derive_adjustment);
5618 return simplify_giv_expr (tem, benefit);
5625 /* Fall through to general case. */
5627 /* If invariant, return as USE (unless CONST_INT).
5628 Otherwise, not giv. */
5629 if (GET_CODE (x) == USE)
5632 if (invariant_p (x) == 1)
5634 if (GET_CODE (x) == CONST_INT)
5637 return gen_rtx_USE (mode, x);
5644 /* Help detect a giv that is calculated by several consecutive insns;
5648 The caller has already identified the first insn P as having a giv as dest;
5649 we check that all other insns that set the same register follow
5650 immediately after P, that they alter nothing else,
5651 and that the result of the last is still a giv.
5653 The value is 0 if the reg set in P is not really a giv.
5654 Otherwise, the value is the amount gained by eliminating
5655 all the consecutive insns that compute the value.
5657 FIRST_BENEFIT is the amount gained by eliminating the first insn, P.
5658 SRC_REG is the reg of the biv; DEST_REG is the reg of the giv.
5660 The coefficients of the ultimate giv value are stored in
5661 *MULT_VAL and *ADD_VAL. */
5664 consec_sets_giv (first_benefit, p, src_reg, dest_reg,
5679 /* Indicate that this is a giv so that we can update the value produced in
5680 each insn of the multi-insn sequence.
5682 This induction structure will be used only by the call to
5683 general_induction_var below, so we can allocate it on our stack.
5684 If this is a giv, our caller will replace the induct var entry with
5685 a new induction structure. */
5687 = (struct induction *) alloca (sizeof (struct induction));
5688 v->src_reg = src_reg;
5689 v->mult_val = *mult_val;
5690 v->add_val = *add_val;
5691 v->benefit = first_benefit;
5693 v->derive_adjustment = 0;
5695 reg_iv_type[REGNO (dest_reg)] = GENERAL_INDUCT;
5696 reg_iv_info[REGNO (dest_reg)] = v;
5698 count = n_times_set[REGNO (dest_reg)] - 1;
5703 code = GET_CODE (p);
5705 /* If libcall, skip to end of call sequence. */
5706 if (code == INSN && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
5710 && (set = single_set (p))
5711 && GET_CODE (SET_DEST (set)) == REG
5712 && SET_DEST (set) == dest_reg
5713 && ((benefit = general_induction_var (SET_SRC (set), &src_reg,
5715 /* Giv created by equivalent expression. */
5716 || ((temp = find_reg_note (p, REG_EQUAL, NULL_RTX))
5717 && (benefit = general_induction_var (XEXP (temp, 0), &src_reg,
5718 add_val, mult_val))))
5719 && src_reg == v->src_reg)
5721 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
5722 benefit += libcall_benefit (p);
5725 v->mult_val = *mult_val;
5726 v->add_val = *add_val;
5727 v->benefit = benefit;
5729 else if (code != NOTE)
5731 /* Allow insns that set something other than this giv to a
5732 constant. Such insns are needed on machines which cannot
5733 include long constants and should not disqualify a giv. */
5735 && (set = single_set (p))
5736 && SET_DEST (set) != dest_reg
5737 && CONSTANT_P (SET_SRC (set)))
5740 reg_iv_type[REGNO (dest_reg)] = UNKNOWN_INDUCT;
5748 /* Return an rtx, if any, that expresses giv G2 as a function of the register
5749 represented by G1. If no such expression can be found, or it is clear that
5750 it cannot possibly be a valid address, 0 is returned.
5752 To perform the computation, we note that
5755 where `v' is the biv.
5757 So G2 = (c/a) * G1 + (d - b*c/a) */
5761 express_from (g1, g2)
5762 struct induction *g1, *g2;
5766 /* The value that G1 will be multiplied by must be a constant integer. Also,
5767 the only chance we have of getting a valid address is if b*c/a (see above
5768 for notation) is also an integer. */
5769 if (GET_CODE (g1->mult_val) != CONST_INT
5770 || GET_CODE (g2->mult_val) != CONST_INT
5771 || GET_CODE (g1->add_val) != CONST_INT
5772 || g1->mult_val == const0_rtx
5773 || INTVAL (g2->mult_val) % INTVAL (g1->mult_val) != 0)
5776 mult = GEN_INT (INTVAL (g2->mult_val) / INTVAL (g1->mult_val));
5777 add = plus_constant (g2->add_val, - INTVAL (g1->add_val) * INTVAL (mult));
5779 /* Form simplified final result. */
5780 if (mult == const0_rtx)
5782 else if (mult == const1_rtx)
5783 mult = g1->dest_reg;
5785 mult = gen_rtx_MULT (g2->mode, g1->dest_reg, mult);
5787 if (add == const0_rtx)
5790 return gen_rtx_PLUS (g2->mode, mult, add);
5794 /* Return 1 if giv G2 can be combined with G1. This means that G2 can use
5795 (either directly or via an address expression) a register used to represent
5796 G1. Set g2->new_reg to a represtation of G1 (normally just
5800 combine_givs_p (g1, g2)
5801 struct induction *g1, *g2;
5805 /* If these givs are identical, they can be combined. */
5806 if (rtx_equal_p (g1->mult_val, g2->mult_val)
5807 && rtx_equal_p (g1->add_val, g2->add_val))
5809 g2->new_reg = g1->dest_reg;
5814 /* If G2 can be expressed as a function of G1 and that function is valid
5815 as an address and no more expensive than using a register for G2,
5816 the expression of G2 in terms of G1 can be used. */
5817 if (g2->giv_type == DEST_ADDR
5818 && (tem = express_from (g1, g2)) != 0
5819 && memory_address_p (g2->mem_mode, tem)
5820 && ADDRESS_COST (tem) <= ADDRESS_COST (*g2->location))
5830 #ifdef GIV_SORT_CRITERION
5831 /* Compare two givs and sort the most desirable one for combinations first.
5832 This is used only in one qsort call below. */
5836 struct induction **x, **y;
5838 GIV_SORT_CRITERION (*x, *y);
5844 /* Check all pairs of givs for iv_class BL and see if any can be combined with
5845 any other. If so, point SAME to the giv combined with and set NEW_REG to
5846 be an expression (in terms of the other giv's DEST_REG) equivalent to the
5847 giv. Also, update BENEFIT and related fields for cost/benefit analysis. */
5851 struct iv_class *bl;
5853 struct induction *g1, *g2, **giv_array;
5854 int i, j, giv_count, pass;
5856 /* Count givs, because bl->giv_count is incorrect here. */
5858 for (g1 = bl->giv; g1; g1 = g1->next_iv)
5862 = (struct induction **) alloca (giv_count * sizeof (struct induction *));
5864 for (g1 = bl->giv; g1; g1 = g1->next_iv)
5865 giv_array[i++] = g1;
5867 #ifdef GIV_SORT_CRITERION
5868 /* Sort the givs if GIV_SORT_CRITERION is defined.
5869 This is usually defined for processors which lack
5870 negative register offsets so more givs may be combined. */
5872 if (loop_dump_stream)
5873 fprintf (loop_dump_stream, "%d givs counted, sorting...\n", giv_count);
5875 qsort (giv_array, giv_count, sizeof (struct induction *), giv_sort);
5878 for (i = 0; i < giv_count; i++)
5881 for (pass = 0; pass <= 1; pass++)
5882 for (j = 0; j < giv_count; j++)
5886 /* First try to combine with replaceable givs, then all givs. */
5887 && (g1->replaceable || pass == 1)
5888 /* If either has already been combined or is to be ignored, can't
5890 && ! g1->ignore && ! g2->ignore && ! g1->same && ! g2->same
5891 /* If something has been based on G2, G2 cannot itself be based
5892 on something else. */
5893 && ! g2->combined_with
5894 && combine_givs_p (g1, g2))
5896 /* g2->new_reg set by `combine_givs_p' */
5898 g1->combined_with = 1;
5900 /* If one of these givs is a DEST_REG that was only used
5901 once, by the other giv, this is actually a single use.
5902 The DEST_REG has the correct cost, while the other giv
5903 counts the REG use too often. */
5904 if (g2->giv_type == DEST_REG
5905 && n_times_used[REGNO (g2->dest_reg)] == 1
5906 && reg_mentioned_p (g2->dest_reg, PATTERN (g1->insn)))
5907 g1->benefit = g2->benefit;
5908 else if (g1->giv_type != DEST_REG
5909 || n_times_used[REGNO (g1->dest_reg)] != 1
5910 || ! reg_mentioned_p (g1->dest_reg,
5911 PATTERN (g2->insn)))
5913 g1->benefit += g2->benefit;
5914 g1->times_used += g2->times_used;
5916 /* ??? The new final_[bg]iv_value code does a much better job
5917 of finding replaceable giv's, and hence this code may no
5918 longer be necessary. */
5919 if (! g2->replaceable && REG_USERVAR_P (g2->dest_reg))
5920 g1->benefit -= copy_cost;
5921 g1->lifetime += g2->lifetime;
5923 if (loop_dump_stream)
5924 fprintf (loop_dump_stream, "giv at %d combined with giv at %d\n",
5925 INSN_UID (g2->insn), INSN_UID (g1->insn));
5931 /* EMIT code before INSERT_BEFORE to set REG = B * M + A. */
5934 emit_iv_add_mult (b, m, a, reg, insert_before)
5935 rtx b; /* initial value of basic induction variable */
5936 rtx m; /* multiplicative constant */
5937 rtx a; /* additive constant */
5938 rtx reg; /* destination register */
5944 /* Prevent unexpected sharing of these rtx. */
5948 /* Increase the lifetime of any invariants moved further in code. */
5949 update_reg_last_use (a, insert_before);
5950 update_reg_last_use (b, insert_before);
5951 update_reg_last_use (m, insert_before);
5954 result = expand_mult_add (b, reg, m, a, GET_MODE (reg), 0);
5956 emit_move_insn (reg, result);
5957 seq = gen_sequence ();
5960 emit_insn_before (seq, insert_before);
5962 record_base_value (REGNO (reg), b);
5965 /* Test whether A * B can be computed without
5966 an actual multiply insn. Value is 1 if so. */
5969 product_cheap_p (a, b)
5975 struct obstack *old_rtl_obstack = rtl_obstack;
5976 char *storage = (char *) obstack_alloc (&temp_obstack, 0);
5979 /* If only one is constant, make it B. */
5980 if (GET_CODE (a) == CONST_INT)
5981 tmp = a, a = b, b = tmp;
5983 /* If first constant, both constant, so don't need multiply. */
5984 if (GET_CODE (a) == CONST_INT)
5987 /* If second not constant, neither is constant, so would need multiply. */
5988 if (GET_CODE (b) != CONST_INT)
5991 /* One operand is constant, so might not need multiply insn. Generate the
5992 code for the multiply and see if a call or multiply, or long sequence
5993 of insns is generated. */
5995 rtl_obstack = &temp_obstack;
5997 expand_mult (GET_MODE (a), a, b, NULL_RTX, 0);
5998 tmp = gen_sequence ();
6001 if (GET_CODE (tmp) == SEQUENCE)
6003 if (XVEC (tmp, 0) == 0)
6005 else if (XVECLEN (tmp, 0) > 3)
6008 for (i = 0; i < XVECLEN (tmp, 0); i++)
6010 rtx insn = XVECEXP (tmp, 0, i);
6012 if (GET_CODE (insn) != INSN
6013 || (GET_CODE (PATTERN (insn)) == SET
6014 && GET_CODE (SET_SRC (PATTERN (insn))) == MULT)
6015 || (GET_CODE (PATTERN (insn)) == PARALLEL
6016 && GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == SET
6017 && GET_CODE (SET_SRC (XVECEXP (PATTERN (insn), 0, 0))) == MULT))
6024 else if (GET_CODE (tmp) == SET
6025 && GET_CODE (SET_SRC (tmp)) == MULT)
6027 else if (GET_CODE (tmp) == PARALLEL
6028 && GET_CODE (XVECEXP (tmp, 0, 0)) == SET
6029 && GET_CODE (SET_SRC (XVECEXP (tmp, 0, 0))) == MULT)
6032 /* Free any storage we obtained in generating this multiply and restore rtl
6033 allocation to its normal obstack. */
6034 obstack_free (&temp_obstack, storage);
6035 rtl_obstack = old_rtl_obstack;
6040 /* Check to see if loop can be terminated by a "decrement and branch until
6041 zero" instruction. If so, add a REG_NONNEG note to the branch insn if so.
6042 Also try reversing an increment loop to a decrement loop
6043 to see if the optimization can be performed.
6044 Value is nonzero if optimization was performed. */
6046 /* This is useful even if the architecture doesn't have such an insn,
6047 because it might change a loops which increments from 0 to n to a loop
6048 which decrements from n to 0. A loop that decrements to zero is usually
6049 faster than one that increments from zero. */
6051 /* ??? This could be rewritten to use some of the loop unrolling procedures,
6052 such as approx_final_value, biv_total_increment, loop_iterations, and
6053 final_[bg]iv_value. */
6056 check_dbra_loop (loop_end, insn_count, loop_start)
6061 struct iv_class *bl;
6068 rtx before_comparison;
6071 /* If last insn is a conditional branch, and the insn before tests a
6072 register value, try to optimize it. Otherwise, we can't do anything. */
6074 comparison = get_condition_for_loop (PREV_INSN (loop_end));
6075 if (comparison == 0)
6078 /* Check all of the bivs to see if the compare uses one of them.
6079 Skip biv's set more than once because we can't guarantee that
6080 it will be zero on the last iteration. Also skip if the biv is
6081 used between its update and the test insn. */
6083 for (bl = loop_iv_list; bl; bl = bl->next)
6085 if (bl->biv_count == 1
6086 && bl->biv->dest_reg == XEXP (comparison, 0)
6087 && ! reg_used_between_p (regno_reg_rtx[bl->regno], bl->biv->insn,
6088 PREV_INSN (PREV_INSN (loop_end))))
6095 /* Look for the case where the basic induction variable is always
6096 nonnegative, and equals zero on the last iteration.
6097 In this case, add a reg_note REG_NONNEG, which allows the
6098 m68k DBRA instruction to be used. */
6100 if (((GET_CODE (comparison) == GT
6101 && GET_CODE (XEXP (comparison, 1)) == CONST_INT
6102 && INTVAL (XEXP (comparison, 1)) == -1)
6103 || (GET_CODE (comparison) == NE && XEXP (comparison, 1) == const0_rtx))
6104 && GET_CODE (bl->biv->add_val) == CONST_INT
6105 && INTVAL (bl->biv->add_val) < 0)
6107 /* Initial value must be greater than 0,
6108 init_val % -dec_value == 0 to ensure that it equals zero on
6109 the last iteration */
6111 if (GET_CODE (bl->initial_value) == CONST_INT
6112 && INTVAL (bl->initial_value) > 0
6113 && (INTVAL (bl->initial_value)
6114 % (-INTVAL (bl->biv->add_val))) == 0)
6116 /* register always nonnegative, add REG_NOTE to branch */
6117 REG_NOTES (PREV_INSN (loop_end))
6118 = gen_rtx_EXPR_LIST (REG_NONNEG, NULL_RTX,
6119 REG_NOTES (PREV_INSN (loop_end)));
6125 /* If the decrement is 1 and the value was tested as >= 0 before
6126 the loop, then we can safely optimize. */
6127 for (p = loop_start; p; p = PREV_INSN (p))
6129 if (GET_CODE (p) == CODE_LABEL)
6131 if (GET_CODE (p) != JUMP_INSN)
6134 before_comparison = get_condition_for_loop (p);
6135 if (before_comparison
6136 && XEXP (before_comparison, 0) == bl->biv->dest_reg
6137 && GET_CODE (before_comparison) == LT
6138 && XEXP (before_comparison, 1) == const0_rtx
6139 && ! reg_set_between_p (bl->biv->dest_reg, p, loop_start)
6140 && INTVAL (bl->biv->add_val) == -1)
6142 REG_NOTES (PREV_INSN (loop_end))
6143 = gen_rtx_EXPR_LIST (REG_NONNEG, NULL_RTX,
6144 REG_NOTES (PREV_INSN (loop_end)));
6151 else if (num_mem_sets <= 1)
6153 /* Try to change inc to dec, so can apply above optimization. */
6155 all registers modified are induction variables or invariant,
6156 all memory references have non-overlapping addresses
6157 (obviously true if only one write)
6158 allow 2 insns for the compare/jump at the end of the loop. */
6159 /* Also, we must avoid any instructions which use both the reversed
6160 biv and another biv. Such instructions will fail if the loop is
6161 reversed. We meet this condition by requiring that either
6162 no_use_except_counting is true, or else that there is only
6164 int num_nonfixed_reads = 0;
6165 /* 1 if the iteration var is used only to count iterations. */
6166 int no_use_except_counting = 0;
6167 /* 1 if the loop has no memory store, or it has a single memory store
6168 which is reversible. */
6169 int reversible_mem_store = 1;
6171 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
6172 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
6173 num_nonfixed_reads += count_nonfixed_reads (PATTERN (p));
6175 if (bl->giv_count == 0
6176 && ! loop_number_exit_count[uid_loop_num[INSN_UID (loop_start)]])
6178 rtx bivreg = regno_reg_rtx[bl->regno];
6180 /* If there are no givs for this biv, and the only exit is the
6181 fall through at the end of the the loop, then
6182 see if perhaps there are no uses except to count. */
6183 no_use_except_counting = 1;
6184 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
6185 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
6187 rtx set = single_set (p);
6189 if (set && GET_CODE (SET_DEST (set)) == REG
6190 && REGNO (SET_DEST (set)) == bl->regno)
6191 /* An insn that sets the biv is okay. */
6193 else if (p == prev_nonnote_insn (prev_nonnote_insn (loop_end))
6194 || p == prev_nonnote_insn (loop_end))
6195 /* Don't bother about the end test. */
6197 else if (reg_mentioned_p (bivreg, PATTERN (p)))
6198 /* Any other use of the biv is no good. */
6200 no_use_except_counting = 0;
6206 /* If the loop has a single store, and the destination address is
6207 invariant, then we can't reverse the loop, because this address
6208 might then have the wrong value at loop exit.
6209 This would work if the source was invariant also, however, in that
6210 case, the insn should have been moved out of the loop. */
6212 if (num_mem_sets == 1)
6213 reversible_mem_store
6214 = (! unknown_address_altered
6215 && ! invariant_p (XEXP (loop_store_mems[0], 0)));
6217 /* This code only acts for innermost loops. Also it simplifies
6218 the memory address check by only reversing loops with
6219 zero or one memory access.
6220 Two memory accesses could involve parts of the same array,
6221 and that can't be reversed. */
6223 if (num_nonfixed_reads <= 1
6225 && !loop_has_volatile
6226 && reversible_mem_store
6227 && (no_use_except_counting
6228 || ((bl->giv_count + bl->biv_count + num_mem_sets
6229 + num_movables + 2 == insn_count)
6230 && (bl == loop_iv_list && bl->next == 0))))
6234 /* Loop can be reversed. */
6235 if (loop_dump_stream)
6236 fprintf (loop_dump_stream, "Can reverse loop\n");
6238 /* Now check other conditions:
6240 The increment must be a constant, as must the initial value,
6241 and the comparison code must be LT.
6243 This test can probably be improved since +/- 1 in the constant
6244 can be obtained by changing LT to LE and vice versa; this is
6248 && GET_CODE (XEXP (comparison, 1)) == CONST_INT
6249 /* LE gets turned into LT */
6250 && GET_CODE (comparison) == LT
6251 && GET_CODE (bl->initial_value) == CONST_INT)
6253 HOST_WIDE_INT add_val, comparison_val;
6256 add_val = INTVAL (bl->biv->add_val);
6257 comparison_val = INTVAL (XEXP (comparison, 1));
6258 initial_value = bl->initial_value;
6260 /* Normalize the initial value if it is an integer and
6261 has no other use except as a counter. This will allow
6262 a few more loops to be reversed. */
6263 if (no_use_except_counting
6264 && GET_CODE (initial_value) == CONST_INT)
6266 comparison_val = comparison_val - INTVAL (bl->initial_value);
6267 initial_value = const0_rtx;
6270 /* If the initial value is not zero, or if the comparison
6271 value is not an exact multiple of the increment, then we
6272 can not reverse this loop. */
6273 if (initial_value != const0_rtx
6274 || (comparison_val % add_val) != 0)
6277 /* Reset these in case we normalized the initial value
6278 and comparison value above. */
6279 bl->initial_value = initial_value;
6280 XEXP (comparison, 1) = GEN_INT (comparison_val);
6282 /* Register will always be nonnegative, with value
6283 0 on last iteration if loop reversed */
6285 /* Save some info needed to produce the new insns. */
6286 reg = bl->biv->dest_reg;
6287 jump_label = XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end))), 1);
6288 if (jump_label == pc_rtx)
6289 jump_label = XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end))), 2);
6290 new_add_val = GEN_INT (- INTVAL (bl->biv->add_val));
6292 final_value = XEXP (comparison, 1);
6293 start_value = GEN_INT (INTVAL (XEXP (comparison, 1))
6294 - INTVAL (bl->biv->add_val));
6296 /* Initialize biv to start_value before loop start.
6297 The old initializing insn will be deleted as a
6298 dead store by flow.c. */
6299 emit_insn_before (gen_move_insn (reg, start_value), loop_start);
6301 /* Add insn to decrement register, and delete insn
6302 that incremented the register. */
6303 p = emit_insn_before (gen_add2_insn (reg, new_add_val),
6305 delete_insn (bl->biv->insn);
6307 /* Update biv info to reflect its new status. */
6309 bl->initial_value = start_value;
6310 bl->biv->add_val = new_add_val;
6312 /* Inc LABEL_NUSES so that delete_insn will
6313 not delete the label. */
6314 LABEL_NUSES (XEXP (jump_label, 0)) ++;
6316 /* Emit an insn after the end of the loop to set the biv's
6317 proper exit value if it is used anywhere outside the loop. */
6318 if ((REGNO_LAST_UID (bl->regno)
6319 != INSN_UID (PREV_INSN (PREV_INSN (loop_end))))
6321 || REGNO_FIRST_UID (bl->regno) != INSN_UID (bl->init_insn))
6322 emit_insn_after (gen_move_insn (reg, final_value),
6325 /* Delete compare/branch at end of loop. */
6326 delete_insn (PREV_INSN (loop_end));
6327 delete_insn (PREV_INSN (loop_end));
6329 /* Add new compare/branch insn at end of loop. */
6331 emit_cmp_insn (reg, const0_rtx, GE, NULL_RTX,
6332 GET_MODE (reg), 0, 0);
6333 emit_jump_insn (gen_bge (XEXP (jump_label, 0)));
6334 tem = gen_sequence ();
6336 emit_jump_insn_before (tem, loop_end);
6338 for (tem = PREV_INSN (loop_end);
6339 tem && GET_CODE (tem) != JUMP_INSN; tem = PREV_INSN (tem))
6343 JUMP_LABEL (tem) = XEXP (jump_label, 0);
6345 /* Increment of LABEL_NUSES done above. */
6346 /* Register is now always nonnegative,
6347 so add REG_NONNEG note to the branch. */
6348 REG_NOTES (tem) = gen_rtx_EXPR_LIST (REG_NONNEG, NULL_RTX,
6354 /* Mark that this biv has been reversed. Each giv which depends
6355 on this biv, and which is also live past the end of the loop
6356 will have to be fixed up. */
6360 if (loop_dump_stream)
6361 fprintf (loop_dump_stream,
6362 "Reversed loop and added reg_nonneg\n");
6372 /* Verify whether the biv BL appears to be eliminable,
6373 based on the insns in the loop that refer to it.
6374 LOOP_START is the first insn of the loop, and END is the end insn.
6376 If ELIMINATE_P is non-zero, actually do the elimination.
6378 THRESHOLD and INSN_COUNT are from loop_optimize and are used to
6379 determine whether invariant insns should be placed inside or at the
6380 start of the loop. */
6383 maybe_eliminate_biv (bl, loop_start, end, eliminate_p, threshold, insn_count)
6384 struct iv_class *bl;
6388 int threshold, insn_count;
6390 rtx reg = bl->biv->dest_reg;
6393 /* Scan all insns in the loop, stopping if we find one that uses the
6394 biv in a way that we cannot eliminate. */
6396 for (p = loop_start; p != end; p = NEXT_INSN (p))
6398 enum rtx_code code = GET_CODE (p);
6399 rtx where = threshold >= insn_count ? loop_start : p;
6401 if ((code == INSN || code == JUMP_INSN || code == CALL_INSN)
6402 && reg_mentioned_p (reg, PATTERN (p))
6403 && ! maybe_eliminate_biv_1 (PATTERN (p), p, bl, eliminate_p, where))
6405 if (loop_dump_stream)
6406 fprintf (loop_dump_stream,
6407 "Cannot eliminate biv %d: biv used in insn %d.\n",
6408 bl->regno, INSN_UID (p));
6415 if (loop_dump_stream)
6416 fprintf (loop_dump_stream, "biv %d %s eliminated.\n",
6417 bl->regno, eliminate_p ? "was" : "can be");
6424 /* If BL appears in X (part of the pattern of INSN), see if we can
6425 eliminate its use. If so, return 1. If not, return 0.
6427 If BIV does not appear in X, return 1.
6429 If ELIMINATE_P is non-zero, actually do the elimination. WHERE indicates
6430 where extra insns should be added. Depending on how many items have been
6431 moved out of the loop, it will either be before INSN or at the start of
6435 maybe_eliminate_biv_1 (x, insn, bl, eliminate_p, where)
6437 struct iv_class *bl;
6441 enum rtx_code code = GET_CODE (x);
6442 rtx reg = bl->biv->dest_reg;
6443 enum machine_mode mode = GET_MODE (reg);
6444 struct induction *v;
6456 /* If we haven't already been able to do something with this BIV,
6457 we can't eliminate it. */
6463 /* If this sets the BIV, it is not a problem. */
6464 if (SET_DEST (x) == reg)
6467 /* If this is an insn that defines a giv, it is also ok because
6468 it will go away when the giv is reduced. */
6469 for (v = bl->giv; v; v = v->next_iv)
6470 if (v->giv_type == DEST_REG && SET_DEST (x) == v->dest_reg)
6474 if (SET_DEST (x) == cc0_rtx && SET_SRC (x) == reg)
6476 /* Can replace with any giv that was reduced and
6477 that has (MULT_VAL != 0) and (ADD_VAL == 0).
6478 Require a constant for MULT_VAL, so we know it's nonzero.
6479 ??? We disable this optimization to avoid potential
6482 for (v = bl->giv; v; v = v->next_iv)
6483 if (CONSTANT_P (v->mult_val) && v->mult_val != const0_rtx
6484 && v->add_val == const0_rtx
6485 && ! v->ignore && ! v->maybe_dead && v->always_computable
6489 /* If the giv V had the auto-inc address optimization applied
6490 to it, and INSN occurs between the giv insn and the biv
6491 insn, then we must adjust the value used here.
6492 This is rare, so we don't bother to do so. */
6494 && ((INSN_LUID (v->insn) < INSN_LUID (insn)
6495 && INSN_LUID (insn) < INSN_LUID (bl->biv->insn))
6496 || (INSN_LUID (v->insn) > INSN_LUID (insn)
6497 && INSN_LUID (insn) > INSN_LUID (bl->biv->insn))))
6503 /* If the giv has the opposite direction of change,
6504 then reverse the comparison. */
6505 if (INTVAL (v->mult_val) < 0)
6506 new = gen_rtx_COMPARE (GET_MODE (v->new_reg),
6507 const0_rtx, v->new_reg);
6511 /* We can probably test that giv's reduced reg. */
6512 if (validate_change (insn, &SET_SRC (x), new, 0))
6516 /* Look for a giv with (MULT_VAL != 0) and (ADD_VAL != 0);
6517 replace test insn with a compare insn (cmp REDUCED_GIV ADD_VAL).
6518 Require a constant for MULT_VAL, so we know it's nonzero.
6519 ??? Do this only if ADD_VAL is a pointer to avoid a potential
6520 overflow problem. */
6522 for (v = bl->giv; v; v = v->next_iv)
6523 if (CONSTANT_P (v->mult_val) && v->mult_val != const0_rtx
6524 && ! v->ignore && ! v->maybe_dead && v->always_computable
6526 && (GET_CODE (v->add_val) == SYMBOL_REF
6527 || GET_CODE (v->add_val) == LABEL_REF
6528 || GET_CODE (v->add_val) == CONST
6529 || (GET_CODE (v->add_val) == REG
6530 && REGNO_POINTER_FLAG (REGNO (v->add_val)))))
6532 /* If the giv V had the auto-inc address optimization applied
6533 to it, and INSN occurs between the giv insn and the biv
6534 insn, then we must adjust the value used here.
6535 This is rare, so we don't bother to do so. */
6537 && ((INSN_LUID (v->insn) < INSN_LUID (insn)
6538 && INSN_LUID (insn) < INSN_LUID (bl->biv->insn))
6539 || (INSN_LUID (v->insn) > INSN_LUID (insn)
6540 && INSN_LUID (insn) > INSN_LUID (bl->biv->insn))))
6546 /* If the giv has the opposite direction of change,
6547 then reverse the comparison. */
6548 if (INTVAL (v->mult_val) < 0)
6549 new = gen_rtx_COMPARE (VOIDmode, copy_rtx (v->add_val),
6552 new = gen_rtx_COMPARE (VOIDmode, v->new_reg,
6553 copy_rtx (v->add_val));
6555 /* Replace biv with the giv's reduced register. */
6556 update_reg_last_use (v->add_val, insn);
6557 if (validate_change (insn, &SET_SRC (PATTERN (insn)), new, 0))
6560 /* Insn doesn't support that constant or invariant. Copy it
6561 into a register (it will be a loop invariant.) */
6562 tem = gen_reg_rtx (GET_MODE (v->new_reg));
6564 emit_insn_before (gen_move_insn (tem, copy_rtx (v->add_val)),
6567 /* Substitute the new register for its invariant value in
6568 the compare expression. */
6569 XEXP (new, (INTVAL (v->mult_val) < 0) ? 0 : 1) = tem;
6570 if (validate_change (insn, &SET_SRC (PATTERN (insn)), new, 0))
6579 case GT: case GE: case GTU: case GEU:
6580 case LT: case LE: case LTU: case LEU:
6581 /* See if either argument is the biv. */
6582 if (XEXP (x, 0) == reg)
6583 arg = XEXP (x, 1), arg_operand = 1;
6584 else if (XEXP (x, 1) == reg)
6585 arg = XEXP (x, 0), arg_operand = 0;
6589 if (CONSTANT_P (arg))
6591 /* First try to replace with any giv that has constant positive
6592 mult_val and constant add_val. We might be able to support
6593 negative mult_val, but it seems complex to do it in general. */
6595 for (v = bl->giv; v; v = v->next_iv)
6596 if (CONSTANT_P (v->mult_val) && INTVAL (v->mult_val) > 0
6597 && (GET_CODE (v->add_val) == SYMBOL_REF
6598 || GET_CODE (v->add_val) == LABEL_REF
6599 || GET_CODE (v->add_val) == CONST
6600 || (GET_CODE (v->add_val) == REG
6601 && REGNO_POINTER_FLAG (REGNO (v->add_val))))
6602 && ! v->ignore && ! v->maybe_dead && v->always_computable
6605 /* If the giv V had the auto-inc address optimization applied
6606 to it, and INSN occurs between the giv insn and the biv
6607 insn, then we must adjust the value used here.
6608 This is rare, so we don't bother to do so. */
6610 && ((INSN_LUID (v->insn) < INSN_LUID (insn)
6611 && INSN_LUID (insn) < INSN_LUID (bl->biv->insn))
6612 || (INSN_LUID (v->insn) > INSN_LUID (insn)
6613 && INSN_LUID (insn) > INSN_LUID (bl->biv->insn))))
6619 /* Replace biv with the giv's reduced reg. */
6620 XEXP (x, 1-arg_operand) = v->new_reg;
6622 /* If all constants are actually constant integers and
6623 the derived constant can be directly placed in the COMPARE,
6625 if (GET_CODE (arg) == CONST_INT
6626 && GET_CODE (v->mult_val) == CONST_INT
6627 && GET_CODE (v->add_val) == CONST_INT
6628 && validate_change (insn, &XEXP (x, arg_operand),
6629 GEN_INT (INTVAL (arg)
6630 * INTVAL (v->mult_val)
6631 + INTVAL (v->add_val)), 0))
6634 /* Otherwise, load it into a register. */
6635 tem = gen_reg_rtx (mode);
6636 emit_iv_add_mult (arg, v->mult_val, v->add_val, tem, where);
6637 if (validate_change (insn, &XEXP (x, arg_operand), tem, 0))
6640 /* If that failed, put back the change we made above. */
6641 XEXP (x, 1-arg_operand) = reg;
6644 /* Look for giv with positive constant mult_val and nonconst add_val.
6645 Insert insns to calculate new compare value.
6646 ??? Turn this off due to possible overflow. */
6648 for (v = bl->giv; v; v = v->next_iv)
6649 if (CONSTANT_P (v->mult_val) && INTVAL (v->mult_val) > 0
6650 && ! v->ignore && ! v->maybe_dead && v->always_computable
6656 /* If the giv V had the auto-inc address optimization applied
6657 to it, and INSN occurs between the giv insn and the biv
6658 insn, then we must adjust the value used here.
6659 This is rare, so we don't bother to do so. */
6661 && ((INSN_LUID (v->insn) < INSN_LUID (insn)
6662 && INSN_LUID (insn) < INSN_LUID (bl->biv->insn))
6663 || (INSN_LUID (v->insn) > INSN_LUID (insn)
6664 && INSN_LUID (insn) > INSN_LUID (bl->biv->insn))))
6670 tem = gen_reg_rtx (mode);
6672 /* Replace biv with giv's reduced register. */
6673 validate_change (insn, &XEXP (x, 1 - arg_operand),
6676 /* Compute value to compare against. */
6677 emit_iv_add_mult (arg, v->mult_val, v->add_val, tem, where);
6678 /* Use it in this insn. */
6679 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
6680 if (apply_change_group ())
6684 else if (GET_CODE (arg) == REG || GET_CODE (arg) == MEM)
6686 if (invariant_p (arg) == 1)
6688 /* Look for giv with constant positive mult_val and nonconst
6689 add_val. Insert insns to compute new compare value.
6690 ??? Turn this off due to possible overflow. */
6692 for (v = bl->giv; v; v = v->next_iv)
6693 if (CONSTANT_P (v->mult_val) && INTVAL (v->mult_val) > 0
6694 && ! v->ignore && ! v->maybe_dead && v->always_computable
6700 /* If the giv V had the auto-inc address optimization applied
6701 to it, and INSN occurs between the giv insn and the biv
6702 insn, then we must adjust the value used here.
6703 This is rare, so we don't bother to do so. */
6705 && ((INSN_LUID (v->insn) < INSN_LUID (insn)
6706 && INSN_LUID (insn) < INSN_LUID (bl->biv->insn))
6707 || (INSN_LUID (v->insn) > INSN_LUID (insn)
6708 && INSN_LUID (insn) > INSN_LUID (bl->biv->insn))))
6714 tem = gen_reg_rtx (mode);
6716 /* Replace biv with giv's reduced register. */
6717 validate_change (insn, &XEXP (x, 1 - arg_operand),
6720 /* Compute value to compare against. */
6721 emit_iv_add_mult (arg, v->mult_val, v->add_val,
6723 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
6724 if (apply_change_group ())
6729 /* This code has problems. Basically, you can't know when
6730 seeing if we will eliminate BL, whether a particular giv
6731 of ARG will be reduced. If it isn't going to be reduced,
6732 we can't eliminate BL. We can try forcing it to be reduced,
6733 but that can generate poor code.
6735 The problem is that the benefit of reducing TV, below should
6736 be increased if BL can actually be eliminated, but this means
6737 we might have to do a topological sort of the order in which
6738 we try to process biv. It doesn't seem worthwhile to do
6739 this sort of thing now. */
6742 /* Otherwise the reg compared with had better be a biv. */
6743 if (GET_CODE (arg) != REG
6744 || reg_iv_type[REGNO (arg)] != BASIC_INDUCT)
6747 /* Look for a pair of givs, one for each biv,
6748 with identical coefficients. */
6749 for (v = bl->giv; v; v = v->next_iv)
6751 struct induction *tv;
6753 if (v->ignore || v->maybe_dead || v->mode != mode)
6756 for (tv = reg_biv_class[REGNO (arg)]->giv; tv; tv = tv->next_iv)
6757 if (! tv->ignore && ! tv->maybe_dead
6758 && rtx_equal_p (tv->mult_val, v->mult_val)
6759 && rtx_equal_p (tv->add_val, v->add_val)
6760 && tv->mode == mode)
6762 /* If the giv V had the auto-inc address optimization applied
6763 to it, and INSN occurs between the giv insn and the biv
6764 insn, then we must adjust the value used here.
6765 This is rare, so we don't bother to do so. */
6767 && ((INSN_LUID (v->insn) < INSN_LUID (insn)
6768 && INSN_LUID (insn) < INSN_LUID (bl->biv->insn))
6769 || (INSN_LUID (v->insn) > INSN_LUID (insn)
6770 && INSN_LUID (insn) > INSN_LUID (bl->biv->insn))))
6776 /* Replace biv with its giv's reduced reg. */
6777 XEXP (x, 1-arg_operand) = v->new_reg;
6778 /* Replace other operand with the other giv's
6780 XEXP (x, arg_operand) = tv->new_reg;
6787 /* If we get here, the biv can't be eliminated. */
6791 /* If this address is a DEST_ADDR giv, it doesn't matter if the
6792 biv is used in it, since it will be replaced. */
6793 for (v = bl->giv; v; v = v->next_iv)
6794 if (v->giv_type == DEST_ADDR && v->location == &XEXP (x, 0))
6802 /* See if any subexpression fails elimination. */
6803 fmt = GET_RTX_FORMAT (code);
6804 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6809 if (! maybe_eliminate_biv_1 (XEXP (x, i), insn, bl,
6810 eliminate_p, where))
6815 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6816 if (! maybe_eliminate_biv_1 (XVECEXP (x, i, j), insn, bl,
6817 eliminate_p, where))
6826 /* Return nonzero if the last use of REG
6827 is in an insn following INSN in the same basic block. */
6830 last_use_this_basic_block (reg, insn)
6836 n && GET_CODE (n) != CODE_LABEL && GET_CODE (n) != JUMP_INSN;
6839 if (REGNO_LAST_UID (REGNO (reg)) == INSN_UID (n))
6845 /* Called via `note_stores' to record the initial value of a biv. Here we
6846 just record the location of the set and process it later. */
6849 record_initial (dest, set)
6853 struct iv_class *bl;
6855 if (GET_CODE (dest) != REG
6856 || REGNO (dest) >= max_reg_before_loop
6857 || reg_iv_type[REGNO (dest)] != BASIC_INDUCT)
6860 bl = reg_biv_class[REGNO (dest)];
6862 /* If this is the first set found, record it. */
6863 if (bl->init_insn == 0)
6865 bl->init_insn = note_insn;
6870 /* If any of the registers in X are "old" and currently have a last use earlier
6871 than INSN, update them to have a last use of INSN. Their actual last use
6872 will be the previous insn but it will not have a valid uid_luid so we can't
6876 update_reg_last_use (x, insn)
6880 /* Check for the case where INSN does not have a valid luid. In this case,
6881 there is no need to modify the regno_last_uid, as this can only happen
6882 when code is inserted after the loop_end to set a pseudo's final value,
6883 and hence this insn will never be the last use of x. */
6884 if (GET_CODE (x) == REG && REGNO (x) < max_reg_before_loop
6885 && INSN_UID (insn) < max_uid_for_loop
6886 && uid_luid[REGNO_LAST_UID (REGNO (x))] < uid_luid[INSN_UID (insn)])
6887 REGNO_LAST_UID (REGNO (x)) = INSN_UID (insn);
6891 register char *fmt = GET_RTX_FORMAT (GET_CODE (x));
6892 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
6895 update_reg_last_use (XEXP (x, i), insn);
6896 else if (fmt[i] == 'E')
6897 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6898 update_reg_last_use (XVECEXP (x, i, j), insn);
6903 /* Given a jump insn JUMP, return the condition that will cause it to branch
6904 to its JUMP_LABEL. If the condition cannot be understood, or is an
6905 inequality floating-point comparison which needs to be reversed, 0 will
6908 If EARLIEST is non-zero, it is a pointer to a place where the earliest
6909 insn used in locating the condition was found. If a replacement test
6910 of the condition is desired, it should be placed in front of that
6911 insn and we will be sure that the inputs are still valid.
6913 The condition will be returned in a canonical form to simplify testing by
6914 callers. Specifically:
6916 (1) The code will always be a comparison operation (EQ, NE, GT, etc.).
6917 (2) Both operands will be machine operands; (cc0) will have been replaced.
6918 (3) If an operand is a constant, it will be the second operand.
6919 (4) (LE x const) will be replaced with (LT x <const+1>) and similarly
6920 for GE, GEU, and LEU. */
6923 get_condition (jump, earliest)
6932 int reverse_code = 0;
6933 int did_reverse_condition = 0;
6935 /* If this is not a standard conditional jump, we can't parse it. */
6936 if (GET_CODE (jump) != JUMP_INSN
6937 || ! condjump_p (jump) || simplejump_p (jump))
6940 code = GET_CODE (XEXP (SET_SRC (PATTERN (jump)), 0));
6941 op0 = XEXP (XEXP (SET_SRC (PATTERN (jump)), 0), 0);
6942 op1 = XEXP (XEXP (SET_SRC (PATTERN (jump)), 0), 1);
6947 /* If this branches to JUMP_LABEL when the condition is false, reverse
6949 if (GET_CODE (XEXP (SET_SRC (PATTERN (jump)), 2)) == LABEL_REF
6950 && XEXP (XEXP (SET_SRC (PATTERN (jump)), 2), 0) == JUMP_LABEL (jump))
6951 code = reverse_condition (code), did_reverse_condition ^= 1;
6953 /* If we are comparing a register with zero, see if the register is set
6954 in the previous insn to a COMPARE or a comparison operation. Perform
6955 the same tests as a function of STORE_FLAG_VALUE as find_comparison_args
6958 while (GET_RTX_CLASS (code) == '<' && op1 == CONST0_RTX (GET_MODE (op0)))
6960 /* Set non-zero when we find something of interest. */
6964 /* If comparison with cc0, import actual comparison from compare
6968 if ((prev = prev_nonnote_insn (prev)) == 0
6969 || GET_CODE (prev) != INSN
6970 || (set = single_set (prev)) == 0
6971 || SET_DEST (set) != cc0_rtx)
6974 op0 = SET_SRC (set);
6975 op1 = CONST0_RTX (GET_MODE (op0));
6981 /* If this is a COMPARE, pick up the two things being compared. */
6982 if (GET_CODE (op0) == COMPARE)
6984 op1 = XEXP (op0, 1);
6985 op0 = XEXP (op0, 0);
6988 else if (GET_CODE (op0) != REG)
6991 /* Go back to the previous insn. Stop if it is not an INSN. We also
6992 stop if it isn't a single set or if it has a REG_INC note because
6993 we don't want to bother dealing with it. */
6995 if ((prev = prev_nonnote_insn (prev)) == 0
6996 || GET_CODE (prev) != INSN
6997 || FIND_REG_INC_NOTE (prev, 0)
6998 || (set = single_set (prev)) == 0)
7001 /* If this is setting OP0, get what it sets it to if it looks
7003 if (rtx_equal_p (SET_DEST (set), op0))
7005 enum machine_mode inner_mode = GET_MODE (SET_SRC (set));
7007 if ((GET_CODE (SET_SRC (set)) == COMPARE
7010 && GET_MODE_CLASS (inner_mode) == MODE_INT
7011 && (GET_MODE_BITSIZE (inner_mode)
7012 <= HOST_BITS_PER_WIDE_INT)
7013 && (STORE_FLAG_VALUE
7014 & ((HOST_WIDE_INT) 1
7015 << (GET_MODE_BITSIZE (inner_mode) - 1))))
7016 #ifdef FLOAT_STORE_FLAG_VALUE
7018 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
7019 && FLOAT_STORE_FLAG_VALUE < 0)
7022 && GET_RTX_CLASS (GET_CODE (SET_SRC (set))) == '<')))
7024 else if (((code == EQ
7026 && (GET_MODE_BITSIZE (inner_mode)
7027 <= HOST_BITS_PER_WIDE_INT)
7028 && GET_MODE_CLASS (inner_mode) == MODE_INT
7029 && (STORE_FLAG_VALUE
7030 & ((HOST_WIDE_INT) 1
7031 << (GET_MODE_BITSIZE (inner_mode) - 1))))
7032 #ifdef FLOAT_STORE_FLAG_VALUE
7034 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
7035 && FLOAT_STORE_FLAG_VALUE < 0)
7038 && GET_RTX_CLASS (GET_CODE (SET_SRC (set))) == '<')
7040 /* We might have reversed a LT to get a GE here. But this wasn't
7041 actually the comparison of data, so we don't flag that we
7042 have had to reverse the condition. */
7043 did_reverse_condition ^= 1;
7051 else if (reg_set_p (op0, prev))
7052 /* If this sets OP0, but not directly, we have to give up. */
7057 if (GET_RTX_CLASS (GET_CODE (x)) == '<')
7058 code = GET_CODE (x);
7061 code = reverse_condition (code);
7062 did_reverse_condition ^= 1;
7066 op0 = XEXP (x, 0), op1 = XEXP (x, 1);
7072 /* If constant is first, put it last. */
7073 if (CONSTANT_P (op0))
7074 code = swap_condition (code), tem = op0, op0 = op1, op1 = tem;
7076 /* If OP0 is the result of a comparison, we weren't able to find what
7077 was really being compared, so fail. */
7078 if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_CC)
7081 /* Canonicalize any ordered comparison with integers involving equality
7082 if we can do computations in the relevant mode and we do not
7085 if (GET_CODE (op1) == CONST_INT
7086 && GET_MODE (op0) != VOIDmode
7087 && GET_MODE_BITSIZE (GET_MODE (op0)) <= HOST_BITS_PER_WIDE_INT)
7089 HOST_WIDE_INT const_val = INTVAL (op1);
7090 unsigned HOST_WIDE_INT uconst_val = const_val;
7091 unsigned HOST_WIDE_INT max_val
7092 = (unsigned HOST_WIDE_INT) GET_MODE_MASK (GET_MODE (op0));
7097 if (const_val != max_val >> 1)
7098 code = LT, op1 = GEN_INT (const_val + 1);
7101 /* When cross-compiling, const_val might be sign-extended from
7102 BITS_PER_WORD to HOST_BITS_PER_WIDE_INT */
7104 if ((const_val & max_val)
7105 != (((HOST_WIDE_INT) 1
7106 << (GET_MODE_BITSIZE (GET_MODE (op0)) - 1))))
7107 code = GT, op1 = GEN_INT (const_val - 1);
7111 if (uconst_val < max_val)
7112 code = LTU, op1 = GEN_INT (uconst_val + 1);
7116 if (uconst_val != 0)
7117 code = GTU, op1 = GEN_INT (uconst_val - 1);
7125 /* If this was floating-point and we reversed anything other than an
7126 EQ or NE, return zero. */
7127 if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT
7128 && did_reverse_condition && code != NE && code != EQ
7130 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_FLOAT)
7134 /* Never return CC0; return zero instead. */
7139 return gen_rtx_fmt_ee (code, VOIDmode, op0, op1);
7142 /* Similar to above routine, except that we also put an invariant last
7143 unless both operands are invariants. */
7146 get_condition_for_loop (x)
7149 rtx comparison = get_condition (x, NULL_PTR);
7152 || ! invariant_p (XEXP (comparison, 0))
7153 || invariant_p (XEXP (comparison, 1)))
7156 return gen_rtx_fmt_ee (swap_condition (GET_CODE (comparison)), VOIDmode,
7157 XEXP (comparison, 1), XEXP (comparison, 0));
7161 /* Analyze a loop in order to instrument it with the use of count register.
7162 loop_start and loop_end are the first and last insns of the loop.
7163 This function works in cooperation with insert_bct ().
7164 loop_can_insert_bct[loop_num] is set according to whether the optimization
7165 is applicable to the loop. When it is applicable, the following variables
7167 loop_start_value[loop_num]
7168 loop_comparison_value[loop_num]
7169 loop_increment[loop_num]
7170 loop_comparison_code[loop_num] */
7172 #ifdef HAVE_decrement_and_branch_on_count
7174 void analyze_loop_iterations (loop_start, loop_end)
7175 rtx loop_start, loop_end;
7177 rtx comparison, comparison_value;
7178 rtx iteration_var, initial_value, increment;
7179 enum rtx_code comparison_code;
7185 /* loop_variable mode */
7186 enum machine_mode original_mode;
7188 /* find the number of the loop */
7189 int loop_num = uid_loop_num [INSN_UID (loop_start)];
7191 /* we change our mind only when we are sure that loop will be instrumented */
7192 loop_can_insert_bct[loop_num] = 0;
7194 /* is the optimization suppressed. */
7195 if ( !flag_branch_on_count_reg )
7198 /* make sure that count-reg is not in use */
7199 if (loop_used_count_register[loop_num]){
7200 if (loop_dump_stream)
7201 fprintf (loop_dump_stream,
7202 "analyze_loop_iterations %d: BCT instrumentation failed: count register already in use\n",
7207 /* make sure that the function has no indirect jumps. */
7208 if (indirect_jump_in_function){
7209 if (loop_dump_stream)
7210 fprintf (loop_dump_stream,
7211 "analyze_loop_iterations %d: BCT instrumentation failed: indirect jump in function\n",
7216 /* make sure that the last loop insn is a conditional jump */
7217 last_loop_insn = PREV_INSN (loop_end);
7218 if (GET_CODE (last_loop_insn) != JUMP_INSN || !condjump_p (last_loop_insn)) {
7219 if (loop_dump_stream)
7220 fprintf (loop_dump_stream,
7221 "analyze_loop_iterations %d: BCT instrumentation failed: invalid jump at loop end\n",
7226 /* First find the iteration variable. If the last insn is a conditional
7227 branch, and the insn preceding it tests a register value, make that
7228 register the iteration variable. */
7230 /* We used to use prev_nonnote_insn here, but that fails because it might
7231 accidentally get the branch for a contained loop if the branch for this
7232 loop was deleted. We can only trust branches immediately before the
7235 comparison = get_condition_for_loop (last_loop_insn);
7236 /* ??? Get_condition may switch position of induction variable and
7237 invariant register when it canonicalizes the comparison. */
7239 if (comparison == 0) {
7240 if (loop_dump_stream)
7241 fprintf (loop_dump_stream,
7242 "analyze_loop_iterations %d: BCT instrumentation failed: comparison not found\n",
7247 comparison_code = GET_CODE (comparison);
7248 iteration_var = XEXP (comparison, 0);
7249 comparison_value = XEXP (comparison, 1);
7251 original_mode = GET_MODE (iteration_var);
7252 if (GET_MODE_CLASS (original_mode) != MODE_INT
7253 || GET_MODE_SIZE (original_mode) != UNITS_PER_WORD) {
7254 if (loop_dump_stream)
7255 fprintf (loop_dump_stream,
7256 "analyze_loop_iterations %d: BCT Instrumentation failed: loop variable not integer\n",
7261 /* get info about loop bounds and increment */
7262 iteration_info (iteration_var, &initial_value, &increment,
7263 loop_start, loop_end);
7265 /* make sure that all required loop data were found */
7266 if (!(initial_value && increment && comparison_value
7267 && invariant_p (comparison_value) && invariant_p (increment)
7268 && ! indirect_jump_in_function))
7270 if (loop_dump_stream) {
7271 fprintf (loop_dump_stream,
7272 "analyze_loop_iterations %d: BCT instrumentation failed because of wrong loop: ", loop_num);
7273 if (!(initial_value && increment && comparison_value)) {
7274 fprintf (loop_dump_stream, "\tbounds not available: ");
7275 if ( ! initial_value )
7276 fprintf (loop_dump_stream, "initial ");
7278 fprintf (loop_dump_stream, "increment ");
7279 if ( ! comparison_value )
7280 fprintf (loop_dump_stream, "comparison ");
7281 fprintf (loop_dump_stream, "\n");
7283 if (!invariant_p (comparison_value) || !invariant_p (increment))
7284 fprintf (loop_dump_stream, "\tloop bounds not invariant\n");
7289 /* make sure that the increment is constant */
7290 if (GET_CODE (increment) != CONST_INT) {
7291 if (loop_dump_stream)
7292 fprintf (loop_dump_stream,
7293 "analyze_loop_iterations %d: instrumentation failed: not arithmetic loop\n",
7298 /* make sure that the loop contains neither function call, nor jump on table.
7299 (the count register might be altered by the called function, and might
7300 be used for a branch on table). */
7301 for (insn = loop_start; insn && insn != loop_end; insn = NEXT_INSN (insn)) {
7302 if (GET_CODE (insn) == CALL_INSN){
7303 if (loop_dump_stream)
7304 fprintf (loop_dump_stream,
7305 "analyze_loop_iterations %d: BCT instrumentation failed: function call in the loop\n",
7310 if (GET_CODE (insn) == JUMP_INSN
7311 && (GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC
7312 || GET_CODE (PATTERN (insn)) == ADDR_VEC)){
7313 if (loop_dump_stream)
7314 fprintf (loop_dump_stream,
7315 "analyze_loop_iterations %d: BCT instrumentation failed: computed branch in the loop\n",
7321 /* At this point, we are sure that the loop can be instrumented with BCT.
7322 Some of the loops, however, will not be instrumented - the final decision
7323 is taken by insert_bct () */
7324 if (loop_dump_stream)
7325 fprintf (loop_dump_stream,
7326 "analyze_loop_iterations: loop (luid =%d) can be BCT instrumented.\n",
7329 /* mark all enclosing loops that they cannot use count register */
7330 /* ???: In fact, since insert_bct may decide not to instrument this loop,
7331 marking here may prevent instrumenting an enclosing loop that could
7332 actually be instrumented. But since this is rare, it is safer to mark
7333 here in case the order of calling (analyze/insert)_bct would be changed. */
7334 for (i=loop_num; i != -1; i = loop_outer_loop[i])
7335 loop_used_count_register[i] = 1;
7337 /* Set data structures which will be used by the instrumentation phase */
7338 loop_start_value[loop_num] = initial_value;
7339 loop_comparison_value[loop_num] = comparison_value;
7340 loop_increment[loop_num] = increment;
7341 loop_comparison_code[loop_num] = comparison_code;
7342 loop_can_insert_bct[loop_num] = 1;
7346 /* instrument loop for insertion of bct instruction. We distinguish between
7347 loops with compile-time bounds, to those with run-time bounds. The loop
7348 behaviour is analized according to the following characteristics/variables:
7350 ; comparison-value: the value to which the iteration counter is compared.
7351 ; initial-value: iteration-counter initial value.
7352 ; increment: iteration-counter increment.
7353 ; Computed variables:
7354 ; increment-direction: the sign of the increment.
7355 ; compare-direction: '1' for GT, GTE, '-1' for LT, LTE, '0' for NE.
7356 ; range-direction: sign (comparison-value - initial-value)
7357 We give up on the following cases:
7358 ; loop variable overflow.
7359 ; run-time loop bounds with comparison code NE.
7363 insert_bct (loop_start, loop_end)
7364 rtx loop_start, loop_end;
7366 rtx initial_value, comparison_value, increment;
7367 enum rtx_code comparison_code;
7369 int increment_direction, compare_direction;
7372 /* if the loop condition is <= or >=, the number of iteration
7373 is 1 more than the range of the bounds of the loop */
7374 int add_iteration = 0;
7376 /* the only machine mode we work with - is the integer of the size that the
7378 enum machine_mode loop_var_mode = SImode;
7380 int loop_num = uid_loop_num [INSN_UID (loop_start)];
7382 /* get loop-variables. No need to check that these are valid - already
7383 checked in analyze_loop_iterations (). */
7384 comparison_code = loop_comparison_code[loop_num];
7385 initial_value = loop_start_value[loop_num];
7386 comparison_value = loop_comparison_value[loop_num];
7387 increment = loop_increment[loop_num];
7389 /* check analyze_loop_iterations decision for this loop. */
7390 if (! loop_can_insert_bct[loop_num]){
7391 if (loop_dump_stream)
7392 fprintf (loop_dump_stream,
7393 "insert_bct: [%d] - was decided not to instrument by analyze_loop_iterations ()\n",
7398 /* It's impossible to instrument a competely unrolled loop. */
7399 if (loop_unroll_factor [loop_num] == -1)
7402 /* make sure that the last loop insn is a conditional jump .
7403 This check is repeated from analyze_loop_iterations (),
7404 because unrolling might have changed that. */
7405 if (GET_CODE (PREV_INSN (loop_end)) != JUMP_INSN
7406 || !condjump_p (PREV_INSN (loop_end))) {
7407 if (loop_dump_stream)
7408 fprintf (loop_dump_stream,
7409 "insert_bct: not instrumenting BCT because of invalid branch\n");
7413 /* fix increment in case loop was unrolled. */
7414 if (loop_unroll_factor [loop_num] > 1)
7415 increment = GEN_INT ( INTVAL (increment) * loop_unroll_factor [loop_num] );
7417 /* determine properties and directions of the loop */
7418 increment_direction = (INTVAL (increment) > 0) ? 1:-1;
7419 switch ( comparison_code ) {
7424 compare_direction = 1;
7431 compare_direction = -1;
7435 /* in this case we cannot know the number of iterations */
7436 if (loop_dump_stream)
7437 fprintf (loop_dump_stream,
7438 "insert_bct: %d: loop cannot be instrumented: == in condition\n",
7445 compare_direction = 1;
7451 compare_direction = -1;
7454 compare_direction = 0;
7461 /* make sure that the loop does not end by an overflow */
7462 if (compare_direction != increment_direction) {
7463 if (loop_dump_stream)
7464 fprintf (loop_dump_stream,
7465 "insert_bct: %d: loop cannot be instrumented: terminated by overflow\n",
7470 /* try to instrument the loop. */
7472 /* Handle the simpler case, where the bounds are known at compile time. */
7473 if (GET_CODE (initial_value) == CONST_INT && GET_CODE (comparison_value) == CONST_INT)
7476 int increment_value_abs = INTVAL (increment) * increment_direction;
7478 /* check the relation between compare-val and initial-val */
7479 int difference = INTVAL (comparison_value) - INTVAL (initial_value);
7480 int range_direction = (difference > 0) ? 1 : -1;
7482 /* make sure the loop executes enough iterations to gain from BCT */
7483 if (difference > -3 && difference < 3) {
7484 if (loop_dump_stream)
7485 fprintf (loop_dump_stream,
7486 "insert_bct: loop %d not BCT instrumented: too small iteration count.\n",
7491 /* make sure that the loop executes at least once */
7492 if ((range_direction == 1 && compare_direction == -1)
7493 || (range_direction == -1 && compare_direction == 1))
7495 if (loop_dump_stream)
7496 fprintf (loop_dump_stream,
7497 "insert_bct: loop %d: does not iterate even once. Not instrumenting.\n",
7502 /* make sure that the loop does not end by an overflow (in compile time
7503 bounds we must have an additional check for overflow, because here
7504 we also support the compare code of 'NE'. */
7505 if (comparison_code == NE
7506 && increment_direction != range_direction) {
7507 if (loop_dump_stream)
7508 fprintf (loop_dump_stream,
7509 "insert_bct (compile time bounds): %d: loop not instrumented: terminated by overflow\n",
7514 /* Determine the number of iterations by:
7516 ; compare-val - initial-val + (increment -1) + additional-iteration
7517 ; num_iterations = -----------------------------------------------------------------
7520 difference = (range_direction > 0) ? difference : -difference;
7522 fprintf (stderr, "difference is: %d\n", difference); /* @*/
7523 fprintf (stderr, "increment_value_abs is: %d\n", increment_value_abs); /* @*/
7524 fprintf (stderr, "add_iteration is: %d\n", add_iteration); /* @*/
7525 fprintf (stderr, "INTVAL (comparison_value) is: %d\n", INTVAL (comparison_value)); /* @*/
7526 fprintf (stderr, "INTVAL (initial_value) is: %d\n", INTVAL (initial_value)); /* @*/
7529 if (increment_value_abs == 0) {
7530 fprintf (stderr, "insert_bct: error: increment == 0 !!!\n");
7533 n_iterations = (difference + increment_value_abs - 1 + add_iteration)
7534 / increment_value_abs;
7537 fprintf (stderr, "number of iterations is: %d\n", n_iterations); /* @*/
7539 instrument_loop_bct (loop_start, loop_end, GEN_INT (n_iterations));
7541 /* Done with this loop. */
7545 /* Handle the more complex case, that the bounds are NOT known at compile time. */
7546 /* In this case we generate run_time calculation of the number of iterations */
7548 /* With runtime bounds, if the compare is of the form '!=' we give up */
7549 if (comparison_code == NE) {
7550 if (loop_dump_stream)
7551 fprintf (loop_dump_stream,
7552 "insert_bct: fail for loop %d: runtime bounds with != comparison\n",
7558 /* We rely on the existence of run-time guard to ensure that the
7559 loop executes at least once. */
7561 rtx iterations_num_reg;
7563 int increment_value_abs = INTVAL (increment) * increment_direction;
7565 /* make sure that the increment is a power of two, otherwise (an
7566 expensive) divide is needed. */
7567 if (exact_log2 (increment_value_abs) == -1)
7569 if (loop_dump_stream)
7570 fprintf (loop_dump_stream,
7571 "insert_bct: not instrumenting BCT because the increment is not power of 2\n");
7575 /* compute the number of iterations */
7580 /* Again, the number of iterations is calculated by:
7582 ; compare-val - initial-val + (increment -1) + additional-iteration
7583 ; num_iterations = -----------------------------------------------------------------
7586 /* ??? Do we have to call copy_rtx here before passing rtx to
7588 if (compare_direction > 0) {
7589 /* <, <= :the loop variable is increasing */
7590 temp_reg = expand_binop (loop_var_mode, sub_optab, comparison_value,
7591 initial_value, NULL_RTX, 0, OPTAB_LIB_WIDEN);
7594 temp_reg = expand_binop (loop_var_mode, sub_optab, initial_value,
7595 comparison_value, NULL_RTX, 0, OPTAB_LIB_WIDEN);
7598 if (increment_value_abs - 1 + add_iteration != 0)
7599 temp_reg = expand_binop (loop_var_mode, add_optab, temp_reg,
7600 GEN_INT (increment_value_abs - 1 + add_iteration),
7601 NULL_RTX, 0, OPTAB_LIB_WIDEN);
7603 if (increment_value_abs != 1)
7605 /* ??? This will generate an expensive divide instruction for
7606 most targets. The original authors apparently expected this
7607 to be a shift, since they test for power-of-2 divisors above,
7608 but just naively generating a divide instruction will not give
7609 a shift. It happens to work for the PowerPC target because
7610 the rs6000.md file has a divide pattern that emits shifts.
7611 It will probably not work for any other target. */
7612 iterations_num_reg = expand_binop (loop_var_mode, sdiv_optab,
7614 GEN_INT (increment_value_abs),
7615 NULL_RTX, 0, OPTAB_LIB_WIDEN);
7618 iterations_num_reg = temp_reg;
7620 sequence = gen_sequence ();
7622 emit_insn_before (sequence, loop_start);
7623 instrument_loop_bct (loop_start, loop_end, iterations_num_reg);
7627 /* instrument loop by inserting a bct in it. This is done in the following way:
7628 1. A new register is created and assigned the hard register number of the count
7630 2. In the head of the loop the new variable is initialized by the value passed in the
7631 loop_num_iterations parameter.
7632 3. At the end of the loop, comparison of the register with 0 is generated.
7633 The created comparison follows the pattern defined for the
7634 decrement_and_branch_on_count insn, so this insn will be generated in assembly
7636 4. The compare&branch on the old variable is deleted. So, if the loop-variable was
7637 not used elsewhere, it will be eliminated by data-flow analisys. */
7640 instrument_loop_bct (loop_start, loop_end, loop_num_iterations)
7641 rtx loop_start, loop_end;
7642 rtx loop_num_iterations;
7644 rtx temp_reg1, temp_reg2;
7648 enum machine_mode loop_var_mode = SImode;
7650 if (HAVE_decrement_and_branch_on_count)
7652 if (loop_dump_stream)
7653 fprintf (loop_dump_stream, "Loop: Inserting BCT\n");
7655 /* eliminate the check on the old variable */
7656 delete_insn (PREV_INSN (loop_end));
7657 delete_insn (PREV_INSN (loop_end));
7659 /* insert the label which will delimit the start of the loop */
7660 start_label = gen_label_rtx ();
7661 emit_label_after (start_label, loop_start);
7663 /* insert initialization of the count register into the loop header */
7665 temp_reg1 = gen_reg_rtx (loop_var_mode);
7666 emit_insn (gen_move_insn (temp_reg1, loop_num_iterations));
7668 /* this will be count register */
7669 temp_reg2 = gen_rtx_REG (loop_var_mode, COUNT_REGISTER_REGNUM);
7670 /* we have to move the value to the count register from an GPR
7671 because rtx pointed to by loop_num_iterations could contain
7672 expression which cannot be moved into count register */
7673 emit_insn (gen_move_insn (temp_reg2, temp_reg1));
7675 sequence = gen_sequence ();
7677 emit_insn_after (sequence, loop_start);
7679 /* insert new comparison on the count register instead of the
7680 old one, generating the needed BCT pattern (that will be
7681 later recognized by assembly generation phase). */
7682 emit_jump_insn_before (gen_decrement_and_branch_on_count (temp_reg2, start_label),
7684 LABEL_NUSES (start_label)++;
7688 #endif /* HAVE_decrement_and_branch_on_count */
7692 /* Scan the function and determine whether it has indirect (computed) jumps.
7694 This is taken mostly from flow.c; similar code exists elsewhere
7695 in the compiler. It may be useful to put this into rtlanal.c. */
7697 indirect_jump_in_function_p (start)
7702 for (insn = start; insn; insn = NEXT_INSN (insn))
7703 if (computed_jump_p (insn))