1 /* Perform various loop optimizations, including strength reduction.
2 Copyright (C) 1987, 88, 89, 91-6, 1997 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* This is the loop optimization pass of the compiler.
23 It finds invariant computations within loops and moves them
24 to the beginning of the loop. Then it identifies basic and
25 general induction variables. Strength reduction is applied to the general
26 induction variables, and induction variable elimination is applied to
27 the basic induction variables.
29 It also finds cases where
30 a register is set within the loop by zero-extending a narrower value
31 and changes these to zero the entire register once before the loop
32 and merely copy the low part within the loop.
34 Most of the complexity is in heuristics to decide when it is worth
35 while to do these things. */
42 #include "insn-config.h"
43 #include "insn-flags.h"
45 #include "hard-reg-set.h"
52 /* Vector mapping INSN_UIDs to luids.
53 The luids are like uids but increase monotonically always.
54 We use them to see whether a jump comes from outside a given loop. */
58 /* Indexed by INSN_UID, contains the ordinal giving the (innermost) loop
59 number the insn is contained in. */
63 /* 1 + largest uid of any insn. */
67 /* 1 + luid of last insn. */
71 /* Number of loops detected in current function. Used as index to the
74 static int max_loop_num;
76 /* Indexed by loop number, contains the first and last insn of each loop. */
78 static rtx *loop_number_loop_starts, *loop_number_loop_ends;
80 /* For each loop, gives the containing loop number, -1 if none. */
85 /* The main output of analyze_loop_iterations is placed here */
87 int *loop_can_insert_bct;
89 /* For each loop, determines whether some of its inner loops has used
92 int *loop_used_count_register;
94 /* loop parameters for arithmetic loops. These loops have a loop variable
95 which is initialized to loop_start_value, incremented in each iteration
96 by "loop_increment". At the end of the iteration the loop variable is
97 compared to the loop_comparison_value (using loop_comparison_code). */
100 rtx *loop_comparison_value;
101 rtx *loop_start_value;
102 enum rtx_code *loop_comparison_code;
105 /* For each loop, keep track of its unrolling factor.
109 -1: completely unrolled
110 >0: holds the unroll exact factor. */
111 int *loop_unroll_factor;
113 /* Indexed by loop number, contains a nonzero value if the "loop" isn't
114 really a loop (an insn outside the loop branches into it). */
116 static char *loop_invalid;
118 /* Indexed by loop number, links together all LABEL_REFs which refer to
119 code labels outside the loop. Used by routines that need to know all
120 loop exits, such as final_biv_value and final_giv_value.
122 This does not include loop exits due to return instructions. This is
123 because all bivs and givs are pseudos, and hence must be dead after a
124 return, so the presense of a return does not affect any of the
125 optimizations that use this info. It is simpler to just not include return
126 instructions on this list. */
128 rtx *loop_number_exit_labels;
130 /* Indexed by loop number, counts the number of LABEL_REFs on
131 loop_number_exit_labels for this loop and all loops nested inside it. */
133 int *loop_number_exit_count;
135 /* Holds the number of loop iterations. It is zero if the number could not be
136 calculated. Must be unsigned since the number of iterations can
137 be as high as 2^wordsize-1. For loops with a wider iterator, this number
138 will will be zero if the number of loop iterations is too large for an
139 unsigned integer to hold. */
141 unsigned HOST_WIDE_INT loop_n_iterations;
143 /* Nonzero if there is a subroutine call in the current loop. */
145 static int loop_has_call;
147 /* Nonzero if there is a volatile memory reference in the current
150 static int loop_has_volatile;
152 /* Added loop_continue which is the NOTE_INSN_LOOP_CONT of the
153 current loop. A continue statement will generate a branch to
154 NEXT_INSN (loop_continue). */
156 static rtx loop_continue;
158 /* Indexed by register number, contains the number of times the reg
159 is set during the loop being scanned.
160 During code motion, a negative value indicates a reg that has been
161 made a candidate; in particular -2 means that it is an candidate that
162 we know is equal to a constant and -1 means that it is an candidate
163 not known equal to a constant.
164 After code motion, regs moved have 0 (which is accurate now)
165 while the failed candidates have the original number of times set.
167 Therefore, at all times, == 0 indicates an invariant register;
168 < 0 a conditionally invariant one. */
170 static int *n_times_set;
172 /* Original value of n_times_set; same except that this value
173 is not set negative for a reg whose sets have been made candidates
174 and not set to 0 for a reg that is moved. */
176 static int *n_times_used;
178 /* Index by register number, 1 indicates that the register
179 cannot be moved or strength reduced. */
181 static char *may_not_optimize;
183 /* Nonzero means reg N has already been moved out of one loop.
184 This reduces the desire to move it out of another. */
186 static char *moved_once;
188 /* Array of MEMs that are stored in this loop. If there are too many to fit
189 here, we just turn on unknown_address_altered. */
191 #define NUM_STORES 30
192 static rtx loop_store_mems[NUM_STORES];
194 /* Index of first available slot in above array. */
195 static int loop_store_mems_idx;
197 /* Nonzero if we don't know what MEMs were changed in the current loop.
198 This happens if the loop contains a call (in which case `loop_has_call'
199 will also be set) or if we store into more than NUM_STORES MEMs. */
201 static int unknown_address_altered;
203 /* Count of movable (i.e. invariant) instructions discovered in the loop. */
204 static int num_movables;
206 /* Count of memory write instructions discovered in the loop. */
207 static int num_mem_sets;
209 /* Number of loops contained within the current one, including itself. */
210 static int loops_enclosed;
212 /* Bound on pseudo register number before loop optimization.
213 A pseudo has valid regscan info if its number is < max_reg_before_loop. */
214 int max_reg_before_loop;
216 /* This obstack is used in product_cheap_p to allocate its rtl. It
217 may call gen_reg_rtx which, in turn, may reallocate regno_reg_rtx.
218 If we used the same obstack that it did, we would be deallocating
221 static struct obstack temp_obstack;
223 /* This is where the pointer to the obstack being used for RTL is stored. */
225 extern struct obstack *rtl_obstack;
227 #define obstack_chunk_alloc xmalloc
228 #define obstack_chunk_free free
230 extern char *oballoc ();
232 /* During the analysis of a loop, a chain of `struct movable's
233 is made to record all the movable insns found.
234 Then the entire chain can be scanned to decide which to move. */
238 rtx insn; /* A movable insn */
239 rtx set_src; /* The expression this reg is set from. */
240 rtx set_dest; /* The destination of this SET. */
241 rtx dependencies; /* When INSN is libcall, this is an EXPR_LIST
242 of any registers used within the LIBCALL. */
243 int consec; /* Number of consecutive following insns
244 that must be moved with this one. */
245 int regno; /* The register it sets */
246 short lifetime; /* lifetime of that register;
247 may be adjusted when matching movables
248 that load the same value are found. */
249 short savings; /* Number of insns we can move for this reg,
250 including other movables that force this
251 or match this one. */
252 unsigned int cond : 1; /* 1 if only conditionally movable */
253 unsigned int force : 1; /* 1 means MUST move this insn */
254 unsigned int global : 1; /* 1 means reg is live outside this loop */
255 /* If PARTIAL is 1, GLOBAL means something different:
256 that the reg is live outside the range from where it is set
257 to the following label. */
258 unsigned int done : 1; /* 1 inhibits further processing of this */
260 unsigned int partial : 1; /* 1 means this reg is used for zero-extending.
261 In particular, moving it does not make it
263 unsigned int move_insn : 1; /* 1 means that we call emit_move_insn to
264 load SRC, rather than copying INSN. */
265 unsigned int is_equiv : 1; /* 1 means a REG_EQUIV is present on INSN. */
266 enum machine_mode savemode; /* Nonzero means it is a mode for a low part
267 that we should avoid changing when clearing
268 the rest of the reg. */
269 struct movable *match; /* First entry for same value */
270 struct movable *forces; /* An insn that must be moved if this is */
271 struct movable *next;
274 FILE *loop_dump_stream;
276 /* Forward declarations. */
278 static void find_and_verify_loops ();
279 static void mark_loop_jump ();
280 static void prescan_loop ();
281 static int reg_in_basic_block_p ();
282 static int consec_sets_invariant_p ();
283 static rtx libcall_other_reg ();
284 static int labels_in_range_p ();
285 static void count_loop_regs_set ();
286 static void note_addr_stored ();
287 static int loop_reg_used_before_p ();
288 static void scan_loop ();
289 static void replace_call_address ();
290 static rtx skip_consec_insns ();
291 static int libcall_benefit ();
292 static void ignore_some_movables ();
293 static void force_movables ();
294 static void combine_movables ();
295 static int rtx_equal_for_loop_p ();
296 static void move_movables ();
297 static void strength_reduce ();
298 static int valid_initial_value_p ();
299 static void find_mem_givs ();
300 static void record_biv ();
301 static void check_final_value ();
302 static void record_giv ();
303 static void update_giv_derive ();
304 static int basic_induction_var ();
305 static rtx simplify_giv_expr ();
306 static int general_induction_var ();
307 static int consec_sets_giv ();
308 static int check_dbra_loop ();
309 static rtx express_from ();
310 static int combine_givs_p ();
311 static void combine_givs ();
312 static int product_cheap_p ();
313 static int maybe_eliminate_biv ();
314 static int maybe_eliminate_biv_1 ();
315 static int last_use_this_basic_block ();
316 static void record_initial ();
317 static void update_reg_last_use ();
320 /* This is extern from unroll.c */
321 void iteration_info ();
323 /* Two main functions for implementing bct:
324 first - to be called before loop unrolling, and the second - after */
325 static void analyze_loop_iterations ();
326 static void insert_bct ();
328 /* Auxiliary function that inserts the bct pattern into the loop */
329 static void instrument_loop_bct ();
332 /* Indirect_jump_in_function is computed once per function. */
333 int indirect_jump_in_function = 0;
334 static int indirect_jump_in_function_p ();
337 /* Relative gain of eliminating various kinds of operations. */
344 /* Benefit penalty, if a giv is not replaceable, i.e. must emit an insn to
345 copy the value of the strength reduced giv to its original register. */
351 char *free_point = (char *) oballoc (1);
352 rtx reg = gen_rtx (REG, word_mode, LAST_VIRTUAL_REGISTER + 1);
354 add_cost = rtx_cost (gen_rtx (PLUS, word_mode, reg, reg), SET);
356 /* We multiply by 2 to reconcile the difference in scale between
357 these two ways of computing costs. Otherwise the cost of a copy
358 will be far less than the cost of an add. */
362 /* Free the objects we just allocated. */
365 /* Initialize the obstack used for rtl in product_cheap_p. */
366 gcc_obstack_init (&temp_obstack);
369 /* Entry point of this file. Perform loop optimization
370 on the current function. F is the first insn of the function
371 and DUMPFILE is a stream for output of a trace of actions taken
372 (or 0 if none should be output). */
375 loop_optimize (f, dumpfile)
376 /* f is the first instruction of a chain of insns for one function */
384 loop_dump_stream = dumpfile;
386 init_recog_no_volatile ();
387 init_alias_analysis ();
389 max_reg_before_loop = max_reg_num ();
391 moved_once = (char *) alloca (max_reg_before_loop);
392 bzero (moved_once, max_reg_before_loop);
396 /* Count the number of loops. */
399 for (insn = f; insn; insn = NEXT_INSN (insn))
401 if (GET_CODE (insn) == NOTE
402 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
406 /* Don't waste time if no loops. */
407 if (max_loop_num == 0)
410 /* Get size to use for tables indexed by uids.
411 Leave some space for labels allocated by find_and_verify_loops. */
412 max_uid_for_loop = get_max_uid () + 1 + max_loop_num * 32;
414 uid_luid = (int *) alloca (max_uid_for_loop * sizeof (int));
415 uid_loop_num = (int *) alloca (max_uid_for_loop * sizeof (int));
417 bzero ((char *) uid_luid, max_uid_for_loop * sizeof (int));
418 bzero ((char *) uid_loop_num, max_uid_for_loop * sizeof (int));
420 /* Allocate tables for recording each loop. We set each entry, so they need
422 loop_number_loop_starts = (rtx *) alloca (max_loop_num * sizeof (rtx));
423 loop_number_loop_ends = (rtx *) alloca (max_loop_num * sizeof (rtx));
424 loop_outer_loop = (int *) alloca (max_loop_num * sizeof (int));
425 loop_invalid = (char *) alloca (max_loop_num * sizeof (char));
426 loop_number_exit_labels = (rtx *) alloca (max_loop_num * sizeof (rtx));
427 loop_number_exit_count = (int *) alloca (max_loop_num * sizeof (int));
429 /* This is initialized by the unrolling code, so we go ahead
430 and clear them just in case we are not performing loop
432 loop_unroll_factor = (int *) alloca (max_loop_num *sizeof (int));
433 bzero ((char *) loop_unroll_factor, max_loop_num * sizeof (int));
436 /* Allocate for BCT optimization */
437 loop_can_insert_bct = (int *) alloca (max_loop_num * sizeof (int));
438 bzero ((char *) loop_can_insert_bct, max_loop_num * sizeof (int));
440 loop_used_count_register = (int *) alloca (max_loop_num * sizeof (int));
441 bzero ((char *) loop_used_count_register, max_loop_num * sizeof (int));
443 loop_increment = (rtx *) alloca (max_loop_num * sizeof (rtx));
444 loop_comparison_value = (rtx *) alloca (max_loop_num * sizeof (rtx));
445 loop_start_value = (rtx *) alloca (max_loop_num * sizeof (rtx));
446 bzero ((char *) loop_increment, max_loop_num * sizeof (rtx));
447 bzero ((char *) loop_comparison_value, max_loop_num * sizeof (rtx));
448 bzero ((char *) loop_start_value, max_loop_num * sizeof (rtx));
451 = (enum rtx_code *) alloca (max_loop_num * sizeof (enum rtx_code));
452 bzero ((char *) loop_comparison_code, max_loop_num * sizeof (enum rtx_code));
455 /* Find and process each loop.
456 First, find them, and record them in order of their beginnings. */
457 find_and_verify_loops (f);
459 /* Now find all register lifetimes. This must be done after
460 find_and_verify_loops, because it might reorder the insns in the
462 reg_scan (f, max_reg_num (), 1);
464 /* See if we went too far. */
465 if (get_max_uid () > max_uid_for_loop)
468 /* Compute the mapping from uids to luids.
469 LUIDs are numbers assigned to insns, like uids,
470 except that luids increase monotonically through the code.
471 Don't assign luids to line-number NOTEs, so that the distance in luids
472 between two insns is not affected by -g. */
474 for (insn = f, i = 0; insn; insn = NEXT_INSN (insn))
477 if (GET_CODE (insn) != NOTE
478 || NOTE_LINE_NUMBER (insn) <= 0)
479 uid_luid[INSN_UID (insn)] = ++i;
481 /* Give a line number note the same luid as preceding insn. */
482 uid_luid[INSN_UID (insn)] = i;
487 /* Don't leave gaps in uid_luid for insns that have been
488 deleted. It is possible that the first or last insn
489 using some register has been deleted by cross-jumping.
490 Make sure that uid_luid for that former insn's uid
491 points to the general area where that insn used to be. */
492 for (i = 0; i < max_uid_for_loop; i++)
494 uid_luid[0] = uid_luid[i];
495 if (uid_luid[0] != 0)
498 for (i = 0; i < max_uid_for_loop; i++)
499 if (uid_luid[i] == 0)
500 uid_luid[i] = uid_luid[i - 1];
502 /* Create a mapping from loops to BLOCK tree nodes. */
503 if (flag_unroll_loops && write_symbols != NO_DEBUG)
504 find_loop_tree_blocks ();
506 /* Determine if the function has indirect jump. On some systems
507 this prevents low overhead loop instructions from being used. */
508 indirect_jump_in_function = indirect_jump_in_function_p (f);
510 /* Now scan the loops, last ones first, since this means inner ones are done
511 before outer ones. */
512 for (i = max_loop_num-1; i >= 0; i--)
513 if (! loop_invalid[i] && loop_number_loop_ends[i])
514 scan_loop (loop_number_loop_starts[i], loop_number_loop_ends[i],
517 /* If debugging and unrolling loops, we must replicate the tree nodes
518 corresponding to the blocks inside the loop, so that the original one
519 to one mapping will remain. */
520 if (flag_unroll_loops && write_symbols != NO_DEBUG)
521 unroll_block_trees ();
524 /* Optimize one loop whose start is LOOP_START and end is END.
525 LOOP_START is the NOTE_INSN_LOOP_BEG and END is the matching
526 NOTE_INSN_LOOP_END. */
528 /* ??? Could also move memory writes out of loops if the destination address
529 is invariant, the source is invariant, the memory write is not volatile,
530 and if we can prove that no read inside the loop can read this address
531 before the write occurs. If there is a read of this address after the
532 write, then we can also mark the memory read as invariant. */
535 scan_loop (loop_start, end, nregs)
541 /* 1 if we are scanning insns that could be executed zero times. */
543 /* 1 if we are scanning insns that might never be executed
544 due to a subroutine call which might exit before they are reached. */
546 /* For a rotated loop that is entered near the bottom,
547 this is the label at the top. Otherwise it is zero. */
549 /* Jump insn that enters the loop, or 0 if control drops in. */
550 rtx loop_entry_jump = 0;
551 /* Place in the loop where control enters. */
553 /* Number of insns in the loop. */
558 /* The SET from an insn, if it is the only SET in the insn. */
560 /* Chain describing insns movable in current loop. */
561 struct movable *movables = 0;
562 /* Last element in `movables' -- so we can add elements at the end. */
563 struct movable *last_movable = 0;
564 /* Ratio of extra register life span we can justify
565 for saving an instruction. More if loop doesn't call subroutines
566 since in that case saving an insn makes more difference
567 and more registers are available. */
569 /* If we have calls, contains the insn in which a register was used
570 if it was used exactly once; contains const0_rtx if it was used more
572 rtx *reg_single_usage = 0;
573 /* Nonzero if we are scanning instructions in a sub-loop. */
576 n_times_set = (int *) alloca (nregs * sizeof (int));
577 n_times_used = (int *) alloca (nregs * sizeof (int));
578 may_not_optimize = (char *) alloca (nregs);
580 /* Determine whether this loop starts with a jump down to a test at
581 the end. This will occur for a small number of loops with a test
582 that is too complex to duplicate in front of the loop.
584 We search for the first insn or label in the loop, skipping NOTEs.
585 However, we must be careful not to skip past a NOTE_INSN_LOOP_BEG
586 (because we might have a loop executed only once that contains a
587 loop which starts with a jump to its exit test) or a NOTE_INSN_LOOP_END
588 (in case we have a degenerate loop).
590 Note that if we mistakenly think that a loop is entered at the top
591 when, in fact, it is entered at the exit test, the only effect will be
592 slightly poorer optimization. Making the opposite error can generate
593 incorrect code. Since very few loops now start with a jump to the
594 exit test, the code here to detect that case is very conservative. */
596 for (p = NEXT_INSN (loop_start);
598 && GET_CODE (p) != CODE_LABEL && GET_RTX_CLASS (GET_CODE (p)) != 'i'
599 && (GET_CODE (p) != NOTE
600 || (NOTE_LINE_NUMBER (p) != NOTE_INSN_LOOP_BEG
601 && NOTE_LINE_NUMBER (p) != NOTE_INSN_LOOP_END));
607 /* Set up variables describing this loop. */
608 prescan_loop (loop_start, end);
609 threshold = (loop_has_call ? 1 : 2) * (1 + n_non_fixed_regs);
611 /* If loop has a jump before the first label,
612 the true entry is the target of that jump.
613 Start scan from there.
614 But record in LOOP_TOP the place where the end-test jumps
615 back to so we can scan that after the end of the loop. */
616 if (GET_CODE (p) == JUMP_INSN)
620 /* Loop entry must be unconditional jump (and not a RETURN) */
622 && JUMP_LABEL (p) != 0
623 /* Check to see whether the jump actually
624 jumps out of the loop (meaning it's no loop).
625 This case can happen for things like
626 do {..} while (0). If this label was generated previously
627 by loop, we can't tell anything about it and have to reject
629 && INSN_UID (JUMP_LABEL (p)) < max_uid_for_loop
630 && INSN_LUID (JUMP_LABEL (p)) >= INSN_LUID (loop_start)
631 && INSN_LUID (JUMP_LABEL (p)) < INSN_LUID (end))
633 loop_top = next_label (scan_start);
634 scan_start = JUMP_LABEL (p);
638 /* If SCAN_START was an insn created by loop, we don't know its luid
639 as required by loop_reg_used_before_p. So skip such loops. (This
640 test may never be true, but it's best to play it safe.)
642 Also, skip loops where we do not start scanning at a label. This
643 test also rejects loops starting with a JUMP_INSN that failed the
646 if (INSN_UID (scan_start) >= max_uid_for_loop
647 || GET_CODE (scan_start) != CODE_LABEL)
649 if (loop_dump_stream)
650 fprintf (loop_dump_stream, "\nLoop from %d to %d is phony.\n\n",
651 INSN_UID (loop_start), INSN_UID (end));
655 /* Count number of times each reg is set during this loop.
656 Set may_not_optimize[I] if it is not safe to move out
657 the setting of register I. If this loop has calls, set
658 reg_single_usage[I]. */
660 bzero ((char *) n_times_set, nregs * sizeof (int));
661 bzero (may_not_optimize, nregs);
665 reg_single_usage = (rtx *) alloca (nregs * sizeof (rtx));
666 bzero ((char *) reg_single_usage, nregs * sizeof (rtx));
669 count_loop_regs_set (loop_top ? loop_top : loop_start, end,
670 may_not_optimize, reg_single_usage, &insn_count, nregs);
672 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
673 may_not_optimize[i] = 1, n_times_set[i] = 1;
674 bcopy ((char *) n_times_set, (char *) n_times_used, nregs * sizeof (int));
676 if (loop_dump_stream)
678 fprintf (loop_dump_stream, "\nLoop from %d to %d: %d real insns.\n",
679 INSN_UID (loop_start), INSN_UID (end), insn_count);
681 fprintf (loop_dump_stream, "Continue at insn %d.\n",
682 INSN_UID (loop_continue));
685 /* Scan through the loop finding insns that are safe to move.
686 Set n_times_set negative for the reg being set, so that
687 this reg will be considered invariant for subsequent insns.
688 We consider whether subsequent insns use the reg
689 in deciding whether it is worth actually moving.
691 MAYBE_NEVER is nonzero if we have passed a conditional jump insn
692 and therefore it is possible that the insns we are scanning
693 would never be executed. At such times, we must make sure
694 that it is safe to execute the insn once instead of zero times.
695 When MAYBE_NEVER is 0, all insns will be executed at least once
696 so that is not a problem. */
702 /* At end of a straight-in loop, we are done.
703 At end of a loop entered at the bottom, scan the top. */
716 if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
717 && find_reg_note (p, REG_LIBCALL, NULL_RTX))
719 else if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
720 && find_reg_note (p, REG_RETVAL, NULL_RTX))
723 if (GET_CODE (p) == INSN
724 && (set = single_set (p))
725 && GET_CODE (SET_DEST (set)) == REG
726 && ! may_not_optimize[REGNO (SET_DEST (set))])
731 rtx src = SET_SRC (set);
732 rtx dependencies = 0;
734 /* Figure out what to use as a source of this insn. If a REG_EQUIV
735 note is given or if a REG_EQUAL note with a constant operand is
736 specified, use it as the source and mark that we should move
737 this insn by calling emit_move_insn rather that duplicating the
740 Otherwise, only use the REG_EQUAL contents if a REG_RETVAL note
742 temp = find_reg_note (p, REG_EQUIV, NULL_RTX);
744 src = XEXP (temp, 0), move_insn = 1;
747 temp = find_reg_note (p, REG_EQUAL, NULL_RTX);
748 if (temp && CONSTANT_P (XEXP (temp, 0)))
749 src = XEXP (temp, 0), move_insn = 1;
750 if (temp && find_reg_note (p, REG_RETVAL, NULL_RTX))
752 src = XEXP (temp, 0);
753 /* A libcall block can use regs that don't appear in
754 the equivalent expression. To move the libcall,
755 we must move those regs too. */
756 dependencies = libcall_other_reg (p, src);
760 /* Don't try to optimize a register that was made
761 by loop-optimization for an inner loop.
762 We don't know its life-span, so we can't compute the benefit. */
763 if (REGNO (SET_DEST (set)) >= max_reg_before_loop)
765 /* In order to move a register, we need to have one of three cases:
766 (1) it is used only in the same basic block as the set
767 (2) it is not a user variable and it is not used in the
768 exit test (this can cause the variable to be used
769 before it is set just like a user-variable).
770 (3) the set is guaranteed to be executed once the loop starts,
771 and the reg is not used until after that. */
772 else if (! ((! maybe_never
773 && ! loop_reg_used_before_p (set, p, loop_start,
775 || (! REG_USERVAR_P (SET_DEST (set))
776 && ! REG_LOOP_TEST_P (SET_DEST (set)))
777 || reg_in_basic_block_p (p, SET_DEST (set))))
779 else if ((tem = invariant_p (src))
780 && (dependencies == 0
781 || (tem2 = invariant_p (dependencies)) != 0)
782 && (n_times_set[REGNO (SET_DEST (set))] == 1
784 = consec_sets_invariant_p (SET_DEST (set),
785 n_times_set[REGNO (SET_DEST (set))],
787 /* If the insn can cause a trap (such as divide by zero),
788 can't move it unless it's guaranteed to be executed
789 once loop is entered. Even a function call might
790 prevent the trap insn from being reached
791 (since it might exit!) */
792 && ! ((maybe_never || call_passed)
793 && may_trap_p (src)))
795 register struct movable *m;
796 register int regno = REGNO (SET_DEST (set));
798 /* A potential lossage is where we have a case where two insns
799 can be combined as long as they are both in the loop, but
800 we move one of them outside the loop. For large loops,
801 this can lose. The most common case of this is the address
802 of a function being called.
804 Therefore, if this register is marked as being used exactly
805 once if we are in a loop with calls (a "large loop"), see if
806 we can replace the usage of this register with the source
807 of this SET. If we can, delete this insn.
809 Don't do this if P has a REG_RETVAL note or if we have
810 SMALL_REGISTER_CLASSES and SET_SRC is a hard register. */
812 if (reg_single_usage && reg_single_usage[regno] != 0
813 && reg_single_usage[regno] != const0_rtx
814 && REGNO_FIRST_UID (regno) == INSN_UID (p)
815 && (REGNO_LAST_UID (regno)
816 == INSN_UID (reg_single_usage[regno]))
817 && n_times_set[REGNO (SET_DEST (set))] == 1
818 && ! side_effects_p (SET_SRC (set))
819 && ! find_reg_note (p, REG_RETVAL, NULL_RTX)
820 #ifdef SMALL_REGISTER_CLASSES
821 && ! (SMALL_REGISTER_CLASSES
822 && GET_CODE (SET_SRC (set)) == REG
823 && REGNO (SET_SRC (set)) < FIRST_PSEUDO_REGISTER)
825 /* This test is not redundant; SET_SRC (set) might be
826 a call-clobbered register and the life of REGNO
827 might span a call. */
828 && ! modified_between_p (SET_SRC (set), p,
829 reg_single_usage[regno])
830 && no_labels_between_p (p, reg_single_usage[regno])
831 && validate_replace_rtx (SET_DEST (set), SET_SRC (set),
832 reg_single_usage[regno]))
834 /* Replace any usage in a REG_EQUAL note. Must copy the
835 new source, so that we don't get rtx sharing between the
836 SET_SOURCE and REG_NOTES of insn p. */
837 REG_NOTES (reg_single_usage[regno])
838 = replace_rtx (REG_NOTES (reg_single_usage[regno]),
839 SET_DEST (set), copy_rtx (SET_SRC (set)));
842 NOTE_LINE_NUMBER (p) = NOTE_INSN_DELETED;
843 NOTE_SOURCE_FILE (p) = 0;
844 n_times_set[regno] = 0;
848 m = (struct movable *) alloca (sizeof (struct movable));
852 m->dependencies = dependencies;
853 m->set_dest = SET_DEST (set);
855 m->consec = n_times_set[REGNO (SET_DEST (set))] - 1;
859 m->move_insn = move_insn;
860 m->is_equiv = (find_reg_note (p, REG_EQUIV, NULL_RTX) != 0);
861 m->savemode = VOIDmode;
863 /* Set M->cond if either invariant_p or consec_sets_invariant_p
864 returned 2 (only conditionally invariant). */
865 m->cond = ((tem | tem1 | tem2) > 1);
866 m->global = (uid_luid[REGNO_LAST_UID (regno)] > INSN_LUID (end)
867 || uid_luid[REGNO_FIRST_UID (regno)] < INSN_LUID (loop_start));
869 m->lifetime = (uid_luid[REGNO_LAST_UID (regno)]
870 - uid_luid[REGNO_FIRST_UID (regno)]);
871 m->savings = n_times_used[regno];
872 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
873 m->savings += libcall_benefit (p);
874 n_times_set[regno] = move_insn ? -2 : -1;
875 /* Add M to the end of the chain MOVABLES. */
879 last_movable->next = m;
884 /* Skip this insn, not checking REG_LIBCALL notes. */
885 p = next_nonnote_insn (p);
886 /* Skip the consecutive insns, if there are any. */
887 p = skip_consec_insns (p, m->consec);
888 /* Back up to the last insn of the consecutive group. */
889 p = prev_nonnote_insn (p);
891 /* We must now reset m->move_insn, m->is_equiv, and possibly
892 m->set_src to correspond to the effects of all the
894 temp = find_reg_note (p, REG_EQUIV, NULL_RTX);
896 m->set_src = XEXP (temp, 0), m->move_insn = 1;
899 temp = find_reg_note (p, REG_EQUAL, NULL_RTX);
900 if (temp && CONSTANT_P (XEXP (temp, 0)))
901 m->set_src = XEXP (temp, 0), m->move_insn = 1;
906 m->is_equiv = (find_reg_note (p, REG_EQUIV, NULL_RTX) != 0);
909 /* If this register is always set within a STRICT_LOW_PART
910 or set to zero, then its high bytes are constant.
911 So clear them outside the loop and within the loop
912 just load the low bytes.
913 We must check that the machine has an instruction to do so.
914 Also, if the value loaded into the register
915 depends on the same register, this cannot be done. */
916 else if (SET_SRC (set) == const0_rtx
917 && GET_CODE (NEXT_INSN (p)) == INSN
918 && (set1 = single_set (NEXT_INSN (p)))
919 && GET_CODE (set1) == SET
920 && (GET_CODE (SET_DEST (set1)) == STRICT_LOW_PART)
921 && (GET_CODE (XEXP (SET_DEST (set1), 0)) == SUBREG)
922 && (SUBREG_REG (XEXP (SET_DEST (set1), 0))
924 && !reg_mentioned_p (SET_DEST (set), SET_SRC (set1)))
926 register int regno = REGNO (SET_DEST (set));
927 if (n_times_set[regno] == 2)
929 register struct movable *m;
930 m = (struct movable *) alloca (sizeof (struct movable));
933 m->set_dest = SET_DEST (set);
941 /* If the insn may not be executed on some cycles,
942 we can't clear the whole reg; clear just high part.
943 Not even if the reg is used only within this loop.
950 Clearing x before the inner loop could clobber a value
951 being saved from the last time around the outer loop.
952 However, if the reg is not used outside this loop
953 and all uses of the register are in the same
954 basic block as the store, there is no problem.
956 If this insn was made by loop, we don't know its
957 INSN_LUID and hence must make a conservative
959 m->global = (INSN_UID (p) >= max_uid_for_loop
960 || (uid_luid[REGNO_LAST_UID (regno)]
962 || (uid_luid[REGNO_FIRST_UID (regno)]
964 || (labels_in_range_p
965 (p, uid_luid[REGNO_FIRST_UID (regno)])));
966 if (maybe_never && m->global)
967 m->savemode = GET_MODE (SET_SRC (set1));
969 m->savemode = VOIDmode;
973 m->lifetime = (uid_luid[REGNO_LAST_UID (regno)]
974 - uid_luid[REGNO_FIRST_UID (regno)]);
976 n_times_set[regno] = -1;
977 /* Add M to the end of the chain MOVABLES. */
981 last_movable->next = m;
986 /* Past a call insn, we get to insns which might not be executed
987 because the call might exit. This matters for insns that trap.
988 Call insns inside a REG_LIBCALL/REG_RETVAL block always return,
989 so they don't count. */
990 else if (GET_CODE (p) == CALL_INSN && ! in_libcall)
992 /* Past a label or a jump, we get to insns for which we
993 can't count on whether or how many times they will be
994 executed during each iteration. Therefore, we can
995 only move out sets of trivial variables
996 (those not used after the loop). */
997 /* Similar code appears twice in strength_reduce. */
998 else if ((GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN)
999 /* If we enter the loop in the middle, and scan around to the
1000 beginning, don't set maybe_never for that. This must be an
1001 unconditional jump, otherwise the code at the top of the
1002 loop might never be executed. Unconditional jumps are
1003 followed a by barrier then loop end. */
1004 && ! (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p) == loop_top
1005 && NEXT_INSN (NEXT_INSN (p)) == end
1006 && simplejump_p (p)))
1008 else if (GET_CODE (p) == NOTE)
1010 /* At the virtual top of a converted loop, insns are again known to
1011 be executed: logically, the loop begins here even though the exit
1012 code has been duplicated. */
1013 if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP && loop_depth == 0)
1014 maybe_never = call_passed = 0;
1015 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
1017 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
1022 /* If one movable subsumes another, ignore that other. */
1024 ignore_some_movables (movables);
1026 /* For each movable insn, see if the reg that it loads
1027 leads when it dies right into another conditionally movable insn.
1028 If so, record that the second insn "forces" the first one,
1029 since the second can be moved only if the first is. */
1031 force_movables (movables);
1033 /* See if there are multiple movable insns that load the same value.
1034 If there are, make all but the first point at the first one
1035 through the `match' field, and add the priorities of them
1036 all together as the priority of the first. */
1038 combine_movables (movables, nregs);
1040 /* Now consider each movable insn to decide whether it is worth moving.
1041 Store 0 in n_times_set for each reg that is moved. */
1043 move_movables (movables, threshold,
1044 insn_count, loop_start, end, nregs);
1046 /* Now candidates that still are negative are those not moved.
1047 Change n_times_set to indicate that those are not actually invariant. */
1048 for (i = 0; i < nregs; i++)
1049 if (n_times_set[i] < 0)
1050 n_times_set[i] = n_times_used[i];
1052 if (flag_strength_reduce)
1053 strength_reduce (scan_start, end, loop_top,
1054 insn_count, loop_start, end);
1057 /* Add elements to *OUTPUT to record all the pseudo-regs
1058 mentioned in IN_THIS but not mentioned in NOT_IN_THIS. */
1061 record_excess_regs (in_this, not_in_this, output)
1062 rtx in_this, not_in_this;
1069 code = GET_CODE (in_this);
1083 if (REGNO (in_this) >= FIRST_PSEUDO_REGISTER
1084 && ! reg_mentioned_p (in_this, not_in_this))
1085 *output = gen_rtx (EXPR_LIST, VOIDmode, in_this, *output);
1089 fmt = GET_RTX_FORMAT (code);
1090 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1097 for (j = 0; j < XVECLEN (in_this, i); j++)
1098 record_excess_regs (XVECEXP (in_this, i, j), not_in_this, output);
1102 record_excess_regs (XEXP (in_this, i), not_in_this, output);
1108 /* Check what regs are referred to in the libcall block ending with INSN,
1109 aside from those mentioned in the equivalent value.
1110 If there are none, return 0.
1111 If there are one or more, return an EXPR_LIST containing all of them. */
1114 libcall_other_reg (insn, equiv)
1117 rtx note = find_reg_note (insn, REG_RETVAL, NULL_RTX);
1118 rtx p = XEXP (note, 0);
1121 /* First, find all the regs used in the libcall block
1122 that are not mentioned as inputs to the result. */
1126 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
1127 || GET_CODE (p) == CALL_INSN)
1128 record_excess_regs (PATTERN (p), equiv, &output);
1135 /* Return 1 if all uses of REG
1136 are between INSN and the end of the basic block. */
1139 reg_in_basic_block_p (insn, reg)
1142 int regno = REGNO (reg);
1145 if (REGNO_FIRST_UID (regno) != INSN_UID (insn))
1148 /* Search this basic block for the already recorded last use of the reg. */
1149 for (p = insn; p; p = NEXT_INSN (p))
1151 switch (GET_CODE (p))
1158 /* Ordinary insn: if this is the last use, we win. */
1159 if (REGNO_LAST_UID (regno) == INSN_UID (p))
1164 /* Jump insn: if this is the last use, we win. */
1165 if (REGNO_LAST_UID (regno) == INSN_UID (p))
1167 /* Otherwise, it's the end of the basic block, so we lose. */
1172 /* It's the end of the basic block, so we lose. */
1177 /* The "last use" doesn't follow the "first use"?? */
1181 /* Compute the benefit of eliminating the insns in the block whose
1182 last insn is LAST. This may be a group of insns used to compute a
1183 value directly or can contain a library call. */
1186 libcall_benefit (last)
1192 for (insn = XEXP (find_reg_note (last, REG_RETVAL, NULL_RTX), 0);
1193 insn != last; insn = NEXT_INSN (insn))
1195 if (GET_CODE (insn) == CALL_INSN)
1196 benefit += 10; /* Assume at least this many insns in a library
1198 else if (GET_CODE (insn) == INSN
1199 && GET_CODE (PATTERN (insn)) != USE
1200 && GET_CODE (PATTERN (insn)) != CLOBBER)
1207 /* Skip COUNT insns from INSN, counting library calls as 1 insn. */
1210 skip_consec_insns (insn, count)
1214 for (; count > 0; count--)
1218 /* If first insn of libcall sequence, skip to end. */
1219 /* Do this at start of loop, since INSN is guaranteed to
1221 if (GET_CODE (insn) != NOTE
1222 && (temp = find_reg_note (insn, REG_LIBCALL, NULL_RTX)))
1223 insn = XEXP (temp, 0);
1225 do insn = NEXT_INSN (insn);
1226 while (GET_CODE (insn) == NOTE);
1232 /* Ignore any movable whose insn falls within a libcall
1233 which is part of another movable.
1234 We make use of the fact that the movable for the libcall value
1235 was made later and so appears later on the chain. */
1238 ignore_some_movables (movables)
1239 struct movable *movables;
1241 register struct movable *m, *m1;
1243 for (m = movables; m; m = m->next)
1245 /* Is this a movable for the value of a libcall? */
1246 rtx note = find_reg_note (m->insn, REG_RETVAL, NULL_RTX);
1250 /* Check for earlier movables inside that range,
1251 and mark them invalid. We cannot use LUIDs here because
1252 insns created by loop.c for prior loops don't have LUIDs.
1253 Rather than reject all such insns from movables, we just
1254 explicitly check each insn in the libcall (since invariant
1255 libcalls aren't that common). */
1256 for (insn = XEXP (note, 0); insn != m->insn; insn = NEXT_INSN (insn))
1257 for (m1 = movables; m1 != m; m1 = m1->next)
1258 if (m1->insn == insn)
1264 /* For each movable insn, see if the reg that it loads
1265 leads when it dies right into another conditionally movable insn.
1266 If so, record that the second insn "forces" the first one,
1267 since the second can be moved only if the first is. */
1270 force_movables (movables)
1271 struct movable *movables;
1273 register struct movable *m, *m1;
1274 for (m1 = movables; m1; m1 = m1->next)
1275 /* Omit this if moving just the (SET (REG) 0) of a zero-extend. */
1276 if (!m1->partial && !m1->done)
1278 int regno = m1->regno;
1279 for (m = m1->next; m; m = m->next)
1280 /* ??? Could this be a bug? What if CSE caused the
1281 register of M1 to be used after this insn?
1282 Since CSE does not update regno_last_uid,
1283 this insn M->insn might not be where it dies.
1284 But very likely this doesn't matter; what matters is
1285 that M's reg is computed from M1's reg. */
1286 if (INSN_UID (m->insn) == REGNO_LAST_UID (regno)
1289 if (m != 0 && m->set_src == m1->set_dest
1290 /* If m->consec, m->set_src isn't valid. */
1294 /* Increase the priority of the moving the first insn
1295 since it permits the second to be moved as well. */
1299 m1->lifetime += m->lifetime;
1300 m1->savings += m1->savings;
1305 /* Find invariant expressions that are equal and can be combined into
1309 combine_movables (movables, nregs)
1310 struct movable *movables;
1313 register struct movable *m;
1314 char *matched_regs = (char *) alloca (nregs);
1315 enum machine_mode mode;
1317 /* Regs that are set more than once are not allowed to match
1318 or be matched. I'm no longer sure why not. */
1319 /* Perhaps testing m->consec_sets would be more appropriate here? */
1321 for (m = movables; m; m = m->next)
1322 if (m->match == 0 && n_times_used[m->regno] == 1 && !m->partial)
1324 register struct movable *m1;
1325 int regno = m->regno;
1327 bzero (matched_regs, nregs);
1328 matched_regs[regno] = 1;
1330 /* We want later insns to match the first one. Don't make the first
1331 one match any later ones. So start this loop at m->next. */
1332 for (m1 = m->next; m1; m1 = m1->next)
1333 if (m != m1 && m1->match == 0 && n_times_used[m1->regno] == 1
1334 /* A reg used outside the loop mustn't be eliminated. */
1336 /* A reg used for zero-extending mustn't be eliminated. */
1338 && (matched_regs[m1->regno]
1341 /* Can combine regs with different modes loaded from the
1342 same constant only if the modes are the same or
1343 if both are integer modes with M wider or the same
1344 width as M1. The check for integer is redundant, but
1345 safe, since the only case of differing destination
1346 modes with equal sources is when both sources are
1347 VOIDmode, i.e., CONST_INT. */
1348 (GET_MODE (m->set_dest) == GET_MODE (m1->set_dest)
1349 || (GET_MODE_CLASS (GET_MODE (m->set_dest)) == MODE_INT
1350 && GET_MODE_CLASS (GET_MODE (m1->set_dest)) == MODE_INT
1351 && (GET_MODE_BITSIZE (GET_MODE (m->set_dest))
1352 >= GET_MODE_BITSIZE (GET_MODE (m1->set_dest)))))
1353 /* See if the source of M1 says it matches M. */
1354 && ((GET_CODE (m1->set_src) == REG
1355 && matched_regs[REGNO (m1->set_src)])
1356 || rtx_equal_for_loop_p (m->set_src, m1->set_src,
1358 && ((m->dependencies == m1->dependencies)
1359 || rtx_equal_p (m->dependencies, m1->dependencies)))
1361 m->lifetime += m1->lifetime;
1362 m->savings += m1->savings;
1365 matched_regs[m1->regno] = 1;
1369 /* Now combine the regs used for zero-extension.
1370 This can be done for those not marked `global'
1371 provided their lives don't overlap. */
1373 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
1374 mode = GET_MODE_WIDER_MODE (mode))
1376 register struct movable *m0 = 0;
1378 /* Combine all the registers for extension from mode MODE.
1379 Don't combine any that are used outside this loop. */
1380 for (m = movables; m; m = m->next)
1381 if (m->partial && ! m->global
1382 && mode == GET_MODE (SET_SRC (PATTERN (NEXT_INSN (m->insn)))))
1384 register struct movable *m1;
1385 int first = uid_luid[REGNO_FIRST_UID (m->regno)];
1386 int last = uid_luid[REGNO_LAST_UID (m->regno)];
1390 /* First one: don't check for overlap, just record it. */
1395 /* Make sure they extend to the same mode.
1396 (Almost always true.) */
1397 if (GET_MODE (m->set_dest) != GET_MODE (m0->set_dest))
1400 /* We already have one: check for overlap with those
1401 already combined together. */
1402 for (m1 = movables; m1 != m; m1 = m1->next)
1403 if (m1 == m0 || (m1->partial && m1->match == m0))
1404 if (! (uid_luid[REGNO_FIRST_UID (m1->regno)] > last
1405 || uid_luid[REGNO_LAST_UID (m1->regno)] < first))
1408 /* No overlap: we can combine this with the others. */
1409 m0->lifetime += m->lifetime;
1410 m0->savings += m->savings;
1419 /* Return 1 if regs X and Y will become the same if moved. */
1422 regs_match_p (x, y, movables)
1424 struct movable *movables;
1428 struct movable *mx, *my;
1430 for (mx = movables; mx; mx = mx->next)
1431 if (mx->regno == xn)
1434 for (my = movables; my; my = my->next)
1435 if (my->regno == yn)
1439 && ((mx->match == my->match && mx->match != 0)
1441 || mx == my->match));
1444 /* Return 1 if X and Y are identical-looking rtx's.
1445 This is the Lisp function EQUAL for rtx arguments.
1447 If two registers are matching movables or a movable register and an
1448 equivalent constant, consider them equal. */
1451 rtx_equal_for_loop_p (x, y, movables)
1453 struct movable *movables;
1457 register struct movable *m;
1458 register enum rtx_code code;
1463 if (x == 0 || y == 0)
1466 code = GET_CODE (x);
1468 /* If we have a register and a constant, they may sometimes be
1470 if (GET_CODE (x) == REG && n_times_set[REGNO (x)] == -2
1472 for (m = movables; m; m = m->next)
1473 if (m->move_insn && m->regno == REGNO (x)
1474 && rtx_equal_p (m->set_src, y))
1477 else if (GET_CODE (y) == REG && n_times_set[REGNO (y)] == -2
1479 for (m = movables; m; m = m->next)
1480 if (m->move_insn && m->regno == REGNO (y)
1481 && rtx_equal_p (m->set_src, x))
1484 /* Otherwise, rtx's of different codes cannot be equal. */
1485 if (code != GET_CODE (y))
1488 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
1489 (REG:SI x) and (REG:HI x) are NOT equivalent. */
1491 if (GET_MODE (x) != GET_MODE (y))
1494 /* These three types of rtx's can be compared nonrecursively. */
1496 return (REGNO (x) == REGNO (y) || regs_match_p (x, y, movables));
1498 if (code == LABEL_REF)
1499 return XEXP (x, 0) == XEXP (y, 0);
1500 if (code == SYMBOL_REF)
1501 return XSTR (x, 0) == XSTR (y, 0);
1503 /* Compare the elements. If any pair of corresponding elements
1504 fail to match, return 0 for the whole things. */
1506 fmt = GET_RTX_FORMAT (code);
1507 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1512 if (XWINT (x, i) != XWINT (y, i))
1517 if (XINT (x, i) != XINT (y, i))
1522 /* Two vectors must have the same length. */
1523 if (XVECLEN (x, i) != XVECLEN (y, i))
1526 /* And the corresponding elements must match. */
1527 for (j = 0; j < XVECLEN (x, i); j++)
1528 if (rtx_equal_for_loop_p (XVECEXP (x, i, j), XVECEXP (y, i, j), movables) == 0)
1533 if (rtx_equal_for_loop_p (XEXP (x, i), XEXP (y, i), movables) == 0)
1538 if (strcmp (XSTR (x, i), XSTR (y, i)))
1543 /* These are just backpointers, so they don't matter. */
1549 /* It is believed that rtx's at this level will never
1550 contain anything but integers and other rtx's,
1551 except for within LABEL_REFs and SYMBOL_REFs. */
1559 /* If X contains any LABEL_REF's, add REG_LABEL notes for them to all
1560 insns in INSNS which use thet reference. */
1563 add_label_notes (x, insns)
1567 enum rtx_code code = GET_CODE (x);
1572 if (code == LABEL_REF && !LABEL_REF_NONLOCAL_P (x))
1574 rtx next = next_real_insn (XEXP (x, 0));
1576 /* Don't record labels that refer to dispatch tables.
1577 This is not necessary, since the tablejump references the same label.
1578 And if we did record them, flow.c would make worse code. */
1580 || ! (GET_CODE (next) == JUMP_INSN
1581 && (GET_CODE (PATTERN (next)) == ADDR_VEC
1582 || GET_CODE (PATTERN (next)) == ADDR_DIFF_VEC)))
1584 for (insn = insns; insn; insn = NEXT_INSN (insn))
1585 if (reg_mentioned_p (XEXP (x, 0), insn))
1586 REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_LABEL, XEXP (x, 0),
1592 fmt = GET_RTX_FORMAT (code);
1593 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1596 add_label_notes (XEXP (x, i), insns);
1597 else if (fmt[i] == 'E')
1598 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1599 add_label_notes (XVECEXP (x, i, j), insns);
1603 /* Scan MOVABLES, and move the insns that deserve to be moved.
1604 If two matching movables are combined, replace one reg with the
1605 other throughout. */
1608 move_movables (movables, threshold, insn_count, loop_start, end, nregs)
1609 struct movable *movables;
1617 register struct movable *m;
1619 /* Map of pseudo-register replacements to handle combining
1620 when we move several insns that load the same value
1621 into different pseudo-registers. */
1622 rtx *reg_map = (rtx *) alloca (nregs * sizeof (rtx));
1623 char *already_moved = (char *) alloca (nregs);
1625 bzero (already_moved, nregs);
1626 bzero ((char *) reg_map, nregs * sizeof (rtx));
1630 for (m = movables; m; m = m->next)
1632 /* Describe this movable insn. */
1634 if (loop_dump_stream)
1636 fprintf (loop_dump_stream, "Insn %d: regno %d (life %d), ",
1637 INSN_UID (m->insn), m->regno, m->lifetime);
1639 fprintf (loop_dump_stream, "consec %d, ", m->consec);
1641 fprintf (loop_dump_stream, "cond ");
1643 fprintf (loop_dump_stream, "force ");
1645 fprintf (loop_dump_stream, "global ");
1647 fprintf (loop_dump_stream, "done ");
1649 fprintf (loop_dump_stream, "move-insn ");
1651 fprintf (loop_dump_stream, "matches %d ",
1652 INSN_UID (m->match->insn));
1654 fprintf (loop_dump_stream, "forces %d ",
1655 INSN_UID (m->forces->insn));
1658 /* Count movables. Value used in heuristics in strength_reduce. */
1661 /* Ignore the insn if it's already done (it matched something else).
1662 Otherwise, see if it is now safe to move. */
1666 || (1 == invariant_p (m->set_src)
1667 && (m->dependencies == 0
1668 || 1 == invariant_p (m->dependencies))
1670 || 1 == consec_sets_invariant_p (m->set_dest,
1673 && (! m->forces || m->forces->done))
1677 int savings = m->savings;
1679 /* We have an insn that is safe to move.
1680 Compute its desirability. */
1685 if (loop_dump_stream)
1686 fprintf (loop_dump_stream, "savings %d ", savings);
1688 if (moved_once[regno])
1692 if (loop_dump_stream)
1693 fprintf (loop_dump_stream, "halved since already moved ");
1696 /* An insn MUST be moved if we already moved something else
1697 which is safe only if this one is moved too: that is,
1698 if already_moved[REGNO] is nonzero. */
1700 /* An insn is desirable to move if the new lifetime of the
1701 register is no more than THRESHOLD times the old lifetime.
1702 If it's not desirable, it means the loop is so big
1703 that moving won't speed things up much,
1704 and it is liable to make register usage worse. */
1706 /* It is also desirable to move if it can be moved at no
1707 extra cost because something else was already moved. */
1709 if (already_moved[regno]
1710 || flag_move_all_movables
1711 || (threshold * savings * m->lifetime) >= insn_count
1712 || (m->forces && m->forces->done
1713 && n_times_used[m->forces->regno] == 1))
1716 register struct movable *m1;
1719 /* Now move the insns that set the reg. */
1721 if (m->partial && m->match)
1725 /* Find the end of this chain of matching regs.
1726 Thus, we load each reg in the chain from that one reg.
1727 And that reg is loaded with 0 directly,
1728 since it has ->match == 0. */
1729 for (m1 = m; m1->match; m1 = m1->match);
1730 newpat = gen_move_insn (SET_DEST (PATTERN (m->insn)),
1731 SET_DEST (PATTERN (m1->insn)));
1732 i1 = emit_insn_before (newpat, loop_start);
1734 /* Mark the moved, invariant reg as being allowed to
1735 share a hard reg with the other matching invariant. */
1736 REG_NOTES (i1) = REG_NOTES (m->insn);
1737 r1 = SET_DEST (PATTERN (m->insn));
1738 r2 = SET_DEST (PATTERN (m1->insn));
1739 regs_may_share = gen_rtx (EXPR_LIST, VOIDmode, r1,
1740 gen_rtx (EXPR_LIST, VOIDmode, r2,
1742 delete_insn (m->insn);
1747 if (loop_dump_stream)
1748 fprintf (loop_dump_stream, " moved to %d", INSN_UID (i1));
1750 /* If we are to re-generate the item being moved with a
1751 new move insn, first delete what we have and then emit
1752 the move insn before the loop. */
1753 else if (m->move_insn)
1757 for (count = m->consec; count >= 0; count--)
1759 /* If this is the first insn of a library call sequence,
1761 if (GET_CODE (p) != NOTE
1762 && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
1765 /* If this is the last insn of a libcall sequence, then
1766 delete every insn in the sequence except the last.
1767 The last insn is handled in the normal manner. */
1768 if (GET_CODE (p) != NOTE
1769 && (temp = find_reg_note (p, REG_RETVAL, NULL_RTX)))
1771 temp = XEXP (temp, 0);
1773 temp = delete_insn (temp);
1776 p = delete_insn (p);
1777 while (p && GET_CODE (p) == NOTE)
1782 emit_move_insn (m->set_dest, m->set_src);
1783 temp = get_insns ();
1786 add_label_notes (m->set_src, temp);
1788 i1 = emit_insns_before (temp, loop_start);
1789 if (! find_reg_note (i1, REG_EQUAL, NULL_RTX))
1791 = gen_rtx (EXPR_LIST,
1792 m->is_equiv ? REG_EQUIV : REG_EQUAL,
1793 m->set_src, REG_NOTES (i1));
1795 if (loop_dump_stream)
1796 fprintf (loop_dump_stream, " moved to %d", INSN_UID (i1));
1798 /* The more regs we move, the less we like moving them. */
1803 for (count = m->consec; count >= 0; count--)
1807 /* If first insn of libcall sequence, skip to end. */
1808 /* Do this at start of loop, since p is guaranteed to
1810 if (GET_CODE (p) != NOTE
1811 && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
1814 /* If last insn of libcall sequence, move all
1815 insns except the last before the loop. The last
1816 insn is handled in the normal manner. */
1817 if (GET_CODE (p) != NOTE
1818 && (temp = find_reg_note (p, REG_RETVAL, NULL_RTX)))
1822 rtx fn_address_insn = 0;
1825 for (temp = XEXP (temp, 0); temp != p;
1826 temp = NEXT_INSN (temp))
1832 if (GET_CODE (temp) == NOTE)
1835 body = PATTERN (temp);
1837 /* Find the next insn after TEMP,
1838 not counting USE or NOTE insns. */
1839 for (next = NEXT_INSN (temp); next != p;
1840 next = NEXT_INSN (next))
1841 if (! (GET_CODE (next) == INSN
1842 && GET_CODE (PATTERN (next)) == USE)
1843 && GET_CODE (next) != NOTE)
1846 /* If that is the call, this may be the insn
1847 that loads the function address.
1849 Extract the function address from the insn
1850 that loads it into a register.
1851 If this insn was cse'd, we get incorrect code.
1853 So emit a new move insn that copies the
1854 function address into the register that the
1855 call insn will use. flow.c will delete any
1856 redundant stores that we have created. */
1857 if (GET_CODE (next) == CALL_INSN
1858 && GET_CODE (body) == SET
1859 && GET_CODE (SET_DEST (body)) == REG
1860 && (n = find_reg_note (temp, REG_EQUAL,
1863 fn_reg = SET_SRC (body);
1864 if (GET_CODE (fn_reg) != REG)
1865 fn_reg = SET_DEST (body);
1866 fn_address = XEXP (n, 0);
1867 fn_address_insn = temp;
1869 /* We have the call insn.
1870 If it uses the register we suspect it might,
1871 load it with the correct address directly. */
1872 if (GET_CODE (temp) == CALL_INSN
1874 && reg_referenced_p (fn_reg, body))
1875 emit_insn_after (gen_move_insn (fn_reg,
1879 if (GET_CODE (temp) == CALL_INSN)
1881 i1 = emit_call_insn_before (body, loop_start);
1882 /* Because the USAGE information potentially
1883 contains objects other than hard registers
1884 we need to copy it. */
1885 if (CALL_INSN_FUNCTION_USAGE (temp))
1886 CALL_INSN_FUNCTION_USAGE (i1)
1887 = copy_rtx (CALL_INSN_FUNCTION_USAGE (temp));
1890 i1 = emit_insn_before (body, loop_start);
1893 if (temp == fn_address_insn)
1894 fn_address_insn = i1;
1895 REG_NOTES (i1) = REG_NOTES (temp);
1899 if (m->savemode != VOIDmode)
1901 /* P sets REG to zero; but we should clear only
1902 the bits that are not covered by the mode
1904 rtx reg = m->set_dest;
1910 (GET_MODE (reg), and_optab, reg,
1911 GEN_INT ((((HOST_WIDE_INT) 1
1912 << GET_MODE_BITSIZE (m->savemode)))
1914 reg, 1, OPTAB_LIB_WIDEN);
1918 emit_move_insn (reg, tem);
1919 sequence = gen_sequence ();
1921 i1 = emit_insn_before (sequence, loop_start);
1923 else if (GET_CODE (p) == CALL_INSN)
1925 i1 = emit_call_insn_before (PATTERN (p), loop_start);
1926 /* Because the USAGE information potentially
1927 contains objects other than hard registers
1928 we need to copy it. */
1929 if (CALL_INSN_FUNCTION_USAGE (p))
1930 CALL_INSN_FUNCTION_USAGE (i1)
1931 = copy_rtx (CALL_INSN_FUNCTION_USAGE (p));
1934 i1 = emit_insn_before (PATTERN (p), loop_start);
1936 REG_NOTES (i1) = REG_NOTES (p);
1938 /* If there is a REG_EQUAL note present whose value is
1939 not loop invariant, then delete it, since it may
1940 cause problems with later optimization passes.
1941 It is possible for cse to create such notes
1942 like this as a result of record_jump_cond. */
1944 if ((temp = find_reg_note (i1, REG_EQUAL, NULL_RTX))
1945 && ! invariant_p (XEXP (temp, 0)))
1946 remove_note (i1, temp);
1951 if (loop_dump_stream)
1952 fprintf (loop_dump_stream, " moved to %d",
1956 /* This isn't needed because REG_NOTES is copied
1957 below and is wrong since P might be a PARALLEL. */
1958 if (REG_NOTES (i1) == 0
1959 && ! m->partial /* But not if it's a zero-extend clr. */
1960 && ! m->global /* and not if used outside the loop
1961 (since it might get set outside). */
1962 && CONSTANT_P (SET_SRC (PATTERN (p))))
1964 = gen_rtx (EXPR_LIST, REG_EQUAL,
1965 SET_SRC (PATTERN (p)), REG_NOTES (i1));
1968 /* If library call, now fix the REG_NOTES that contain
1969 insn pointers, namely REG_LIBCALL on FIRST
1970 and REG_RETVAL on I1. */
1971 if (temp = find_reg_note (i1, REG_RETVAL, NULL_RTX))
1973 XEXP (temp, 0) = first;
1974 temp = find_reg_note (first, REG_LIBCALL, NULL_RTX);
1975 XEXP (temp, 0) = i1;
1979 do p = NEXT_INSN (p);
1980 while (p && GET_CODE (p) == NOTE);
1983 /* The more regs we move, the less we like moving them. */
1987 /* Any other movable that loads the same register
1989 already_moved[regno] = 1;
1991 /* This reg has been moved out of one loop. */
1992 moved_once[regno] = 1;
1994 /* The reg set here is now invariant. */
1996 n_times_set[regno] = 0;
2000 /* Change the length-of-life info for the register
2001 to say it lives at least the full length of this loop.
2002 This will help guide optimizations in outer loops. */
2004 if (uid_luid[REGNO_FIRST_UID (regno)] > INSN_LUID (loop_start))
2005 /* This is the old insn before all the moved insns.
2006 We can't use the moved insn because it is out of range
2007 in uid_luid. Only the old insns have luids. */
2008 REGNO_FIRST_UID (regno) = INSN_UID (loop_start);
2009 if (uid_luid[REGNO_LAST_UID (regno)] < INSN_LUID (end))
2010 REGNO_LAST_UID (regno) = INSN_UID (end);
2012 /* Combine with this moved insn any other matching movables. */
2015 for (m1 = movables; m1; m1 = m1->next)
2020 /* Schedule the reg loaded by M1
2021 for replacement so that shares the reg of M.
2022 If the modes differ (only possible in restricted
2023 circumstances, make a SUBREG. */
2024 if (GET_MODE (m->set_dest) == GET_MODE (m1->set_dest))
2025 reg_map[m1->regno] = m->set_dest;
2028 = gen_lowpart_common (GET_MODE (m1->set_dest),
2031 /* Get rid of the matching insn
2032 and prevent further processing of it. */
2035 /* if library call, delete all insn except last, which
2037 if (temp = find_reg_note (m1->insn, REG_RETVAL,
2040 for (temp = XEXP (temp, 0); temp != m1->insn;
2041 temp = NEXT_INSN (temp))
2044 delete_insn (m1->insn);
2046 /* Any other movable that loads the same register
2048 already_moved[m1->regno] = 1;
2050 /* The reg merged here is now invariant,
2051 if the reg it matches is invariant. */
2053 n_times_set[m1->regno] = 0;
2056 else if (loop_dump_stream)
2057 fprintf (loop_dump_stream, "not desirable");
2059 else if (loop_dump_stream && !m->match)
2060 fprintf (loop_dump_stream, "not safe");
2062 if (loop_dump_stream)
2063 fprintf (loop_dump_stream, "\n");
2067 new_start = loop_start;
2069 /* Go through all the instructions in the loop, making
2070 all the register substitutions scheduled in REG_MAP. */
2071 for (p = new_start; p != end; p = NEXT_INSN (p))
2072 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
2073 || GET_CODE (p) == CALL_INSN)
2075 replace_regs (PATTERN (p), reg_map, nregs, 0);
2076 replace_regs (REG_NOTES (p), reg_map, nregs, 0);
2082 /* Scan X and replace the address of any MEM in it with ADDR.
2083 REG is the address that MEM should have before the replacement. */
2086 replace_call_address (x, reg, addr)
2089 register enum rtx_code code;
2095 code = GET_CODE (x);
2109 /* Short cut for very common case. */
2110 replace_call_address (XEXP (x, 1), reg, addr);
2114 /* Short cut for very common case. */
2115 replace_call_address (XEXP (x, 0), reg, addr);
2119 /* If this MEM uses a reg other than the one we expected,
2120 something is wrong. */
2121 if (XEXP (x, 0) != reg)
2127 fmt = GET_RTX_FORMAT (code);
2128 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2131 replace_call_address (XEXP (x, i), reg, addr);
2135 for (j = 0; j < XVECLEN (x, i); j++)
2136 replace_call_address (XVECEXP (x, i, j), reg, addr);
2142 /* Return the number of memory refs to addresses that vary
2146 count_nonfixed_reads (x)
2149 register enum rtx_code code;
2157 code = GET_CODE (x);
2171 return ((invariant_p (XEXP (x, 0)) != 1)
2172 + count_nonfixed_reads (XEXP (x, 0)));
2176 fmt = GET_RTX_FORMAT (code);
2177 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2180 value += count_nonfixed_reads (XEXP (x, i));
2184 for (j = 0; j < XVECLEN (x, i); j++)
2185 value += count_nonfixed_reads (XVECEXP (x, i, j));
2193 /* P is an instruction that sets a register to the result of a ZERO_EXTEND.
2194 Replace it with an instruction to load just the low bytes
2195 if the machine supports such an instruction,
2196 and insert above LOOP_START an instruction to clear the register. */
2199 constant_high_bytes (p, loop_start)
2203 register int insn_code_number;
2205 /* Try to change (SET (REG ...) (ZERO_EXTEND (..:B ...)))
2206 to (SET (STRICT_LOW_PART (SUBREG:B (REG...))) ...). */
2208 new = gen_rtx (SET, VOIDmode,
2209 gen_rtx (STRICT_LOW_PART, VOIDmode,
2210 gen_rtx (SUBREG, GET_MODE (XEXP (SET_SRC (PATTERN (p)), 0)),
2211 SET_DEST (PATTERN (p)),
2213 XEXP (SET_SRC (PATTERN (p)), 0));
2214 insn_code_number = recog (new, p);
2216 if (insn_code_number)
2220 /* Clear destination register before the loop. */
2221 emit_insn_before (gen_rtx (SET, VOIDmode,
2222 SET_DEST (PATTERN (p)),
2226 /* Inside the loop, just load the low part. */
2232 /* Scan a loop setting the variables `unknown_address_altered',
2233 `num_mem_sets', `loop_continue', loops_enclosed', `loop_has_call',
2234 and `loop_has_volatile'.
2235 Also, fill in the array `loop_store_mems'. */
2238 prescan_loop (start, end)
2241 register int level = 1;
2244 unknown_address_altered = 0;
2246 loop_has_volatile = 0;
2247 loop_store_mems_idx = 0;
2253 for (insn = NEXT_INSN (start); insn != NEXT_INSN (end);
2254 insn = NEXT_INSN (insn))
2256 if (GET_CODE (insn) == NOTE)
2258 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
2261 /* Count number of loops contained in this one. */
2264 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END)
2273 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_CONT)
2276 loop_continue = insn;
2279 else if (GET_CODE (insn) == CALL_INSN)
2281 if (! CONST_CALL_P (insn))
2282 unknown_address_altered = 1;
2287 if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN)
2289 if (volatile_refs_p (PATTERN (insn)))
2290 loop_has_volatile = 1;
2292 note_stores (PATTERN (insn), note_addr_stored);
2298 /* Scan the function looking for loops. Record the start and end of each loop.
2299 Also mark as invalid loops any loops that contain a setjmp or are branched
2300 to from outside the loop. */
2303 find_and_verify_loops (f)
2307 int current_loop = -1;
2311 /* If there are jumps to undefined labels,
2312 treat them as jumps out of any/all loops.
2313 This also avoids writing past end of tables when there are no loops. */
2314 uid_loop_num[0] = -1;
2316 /* Find boundaries of loops, mark which loops are contained within
2317 loops, and invalidate loops that have setjmp. */
2319 for (insn = f; insn; insn = NEXT_INSN (insn))
2321 if (GET_CODE (insn) == NOTE)
2322 switch (NOTE_LINE_NUMBER (insn))
2324 case NOTE_INSN_LOOP_BEG:
2325 loop_number_loop_starts[++next_loop] = insn;
2326 loop_number_loop_ends[next_loop] = 0;
2327 loop_outer_loop[next_loop] = current_loop;
2328 loop_invalid[next_loop] = 0;
2329 loop_number_exit_labels[next_loop] = 0;
2330 loop_number_exit_count[next_loop] = 0;
2331 current_loop = next_loop;
2334 case NOTE_INSN_SETJMP:
2335 /* In this case, we must invalidate our current loop and any
2337 for (loop = current_loop; loop != -1; loop = loop_outer_loop[loop])
2339 loop_invalid[loop] = 1;
2340 if (loop_dump_stream)
2341 fprintf (loop_dump_stream,
2342 "\nLoop at %d ignored due to setjmp.\n",
2343 INSN_UID (loop_number_loop_starts[loop]));
2347 case NOTE_INSN_LOOP_END:
2348 if (current_loop == -1)
2351 loop_number_loop_ends[current_loop] = insn;
2352 current_loop = loop_outer_loop[current_loop];
2357 /* Note that this will mark the NOTE_INSN_LOOP_END note as being in the
2358 enclosing loop, but this doesn't matter. */
2359 uid_loop_num[INSN_UID (insn)] = current_loop;
2362 /* Any loop containing a label used in an initializer must be invalidated,
2363 because it can be jumped into from anywhere. */
2365 for (label = forced_labels; label; label = XEXP (label, 1))
2369 for (loop_num = uid_loop_num[INSN_UID (XEXP (label, 0))];
2371 loop_num = loop_outer_loop[loop_num])
2372 loop_invalid[loop_num] = 1;
2375 /* Any loop containing a label used for an exception handler must be
2376 invalidated, because it can be jumped into from anywhere. */
2378 for (label = exception_handler_labels; label; label = XEXP (label, 1))
2382 for (loop_num = uid_loop_num[INSN_UID (XEXP (label, 0))];
2384 loop_num = loop_outer_loop[loop_num])
2385 loop_invalid[loop_num] = 1;
2388 /* Now scan all insn's in the function. If any JUMP_INSN branches into a
2389 loop that it is not contained within, that loop is marked invalid.
2390 If any INSN or CALL_INSN uses a label's address, then the loop containing
2391 that label is marked invalid, because it could be jumped into from
2394 Also look for blocks of code ending in an unconditional branch that
2395 exits the loop. If such a block is surrounded by a conditional
2396 branch around the block, move the block elsewhere (see below) and
2397 invert the jump to point to the code block. This may eliminate a
2398 label in our loop and will simplify processing by both us and a
2399 possible second cse pass. */
2401 for (insn = f; insn; insn = NEXT_INSN (insn))
2402 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
2404 int this_loop_num = uid_loop_num[INSN_UID (insn)];
2406 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
2408 rtx note = find_reg_note (insn, REG_LABEL, NULL_RTX);
2413 for (loop_num = uid_loop_num[INSN_UID (XEXP (note, 0))];
2415 loop_num = loop_outer_loop[loop_num])
2416 loop_invalid[loop_num] = 1;
2420 if (GET_CODE (insn) != JUMP_INSN)
2423 mark_loop_jump (PATTERN (insn), this_loop_num);
2425 /* See if this is an unconditional branch outside the loop. */
2426 if (this_loop_num != -1
2427 && (GET_CODE (PATTERN (insn)) == RETURN
2428 || (simplejump_p (insn)
2429 && (uid_loop_num[INSN_UID (JUMP_LABEL (insn))]
2431 && get_max_uid () < max_uid_for_loop)
2434 rtx our_next = next_real_insn (insn);
2436 int outer_loop = -1;
2438 /* Go backwards until we reach the start of the loop, a label,
2440 for (p = PREV_INSN (insn);
2441 GET_CODE (p) != CODE_LABEL
2442 && ! (GET_CODE (p) == NOTE
2443 && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
2444 && GET_CODE (p) != JUMP_INSN;
2448 /* Check for the case where we have a jump to an inner nested
2449 loop, and do not perform the optimization in that case. */
2451 if (JUMP_LABEL (insn))
2453 dest_loop = uid_loop_num[INSN_UID (JUMP_LABEL (insn))];
2454 if (dest_loop != -1)
2456 for (outer_loop = dest_loop; outer_loop != -1;
2457 outer_loop = loop_outer_loop[outer_loop])
2458 if (outer_loop == this_loop_num)
2463 /* Make sure that the target of P is within the current loop. */
2465 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p)
2466 && uid_loop_num[INSN_UID (JUMP_LABEL (p))] != this_loop_num)
2467 outer_loop = this_loop_num;
2469 /* If we stopped on a JUMP_INSN to the next insn after INSN,
2470 we have a block of code to try to move.
2472 We look backward and then forward from the target of INSN
2473 to find a BARRIER at the same loop depth as the target.
2474 If we find such a BARRIER, we make a new label for the start
2475 of the block, invert the jump in P and point it to that label,
2476 and move the block of code to the spot we found. */
2478 if (outer_loop == -1
2479 && GET_CODE (p) == JUMP_INSN
2480 && JUMP_LABEL (p) != 0
2481 /* Just ignore jumps to labels that were never emitted.
2482 These always indicate compilation errors. */
2483 && INSN_UID (JUMP_LABEL (p)) != 0
2485 && ! simplejump_p (p)
2486 && next_real_insn (JUMP_LABEL (p)) == our_next)
2489 = JUMP_LABEL (insn) ? JUMP_LABEL (insn) : get_last_insn ();
2490 int target_loop_num = uid_loop_num[INSN_UID (target)];
2493 for (loc = target; loc; loc = PREV_INSN (loc))
2494 if (GET_CODE (loc) == BARRIER
2495 && uid_loop_num[INSN_UID (loc)] == target_loop_num)
2499 for (loc = target; loc; loc = NEXT_INSN (loc))
2500 if (GET_CODE (loc) == BARRIER
2501 && uid_loop_num[INSN_UID (loc)] == target_loop_num)
2506 rtx cond_label = JUMP_LABEL (p);
2507 rtx new_label = get_label_after (p);
2509 /* Ensure our label doesn't go away. */
2510 LABEL_NUSES (cond_label)++;
2512 /* Verify that uid_loop_num is large enough and that
2514 if (invert_jump (p, new_label))
2518 /* Include the BARRIER after INSN and copy the
2520 new_label = squeeze_notes (new_label, NEXT_INSN (insn));
2521 reorder_insns (new_label, NEXT_INSN (insn), loc);
2523 /* All those insns are now in TARGET_LOOP_NUM. */
2524 for (q = new_label; q != NEXT_INSN (NEXT_INSN (insn));
2526 uid_loop_num[INSN_UID (q)] = target_loop_num;
2528 /* The label jumped to by INSN is no longer a loop exit.
2529 Unless INSN does not have a label (e.g., it is a
2530 RETURN insn), search loop_number_exit_labels to find
2531 its label_ref, and remove it. Also turn off
2532 LABEL_OUTSIDE_LOOP_P bit. */
2533 if (JUMP_LABEL (insn))
2538 r = loop_number_exit_labels[this_loop_num];
2539 r; q = r, r = LABEL_NEXTREF (r))
2540 if (XEXP (r, 0) == JUMP_LABEL (insn))
2542 LABEL_OUTSIDE_LOOP_P (r) = 0;
2544 LABEL_NEXTREF (q) = LABEL_NEXTREF (r);
2546 loop_number_exit_labels[this_loop_num]
2547 = LABEL_NEXTREF (r);
2551 for (loop_num = this_loop_num;
2552 loop_num != -1 && loop_num != target_loop_num;
2553 loop_num = loop_outer_loop[loop_num])
2554 loop_number_exit_count[loop_num]--;
2556 /* If we didn't find it, then something is wrong. */
2561 /* P is now a jump outside the loop, so it must be put
2562 in loop_number_exit_labels, and marked as such.
2563 The easiest way to do this is to just call
2564 mark_loop_jump again for P. */
2565 mark_loop_jump (PATTERN (p), this_loop_num);
2567 /* If INSN now jumps to the insn after it,
2569 if (JUMP_LABEL (insn) != 0
2570 && (next_real_insn (JUMP_LABEL (insn))
2571 == next_real_insn (insn)))
2575 /* Continue the loop after where the conditional
2576 branch used to jump, since the only branch insn
2577 in the block (if it still remains) is an inter-loop
2578 branch and hence needs no processing. */
2579 insn = NEXT_INSN (cond_label);
2581 if (--LABEL_NUSES (cond_label) == 0)
2582 delete_insn (cond_label);
2584 /* This loop will be continued with NEXT_INSN (insn). */
2585 insn = PREV_INSN (insn);
2592 /* If any label in X jumps to a loop different from LOOP_NUM and any of the
2593 loops it is contained in, mark the target loop invalid.
2595 For speed, we assume that X is part of a pattern of a JUMP_INSN. */
2598 mark_loop_jump (x, loop_num)
2606 switch (GET_CODE (x))
2619 /* There could be a label reference in here. */
2620 mark_loop_jump (XEXP (x, 0), loop_num);
2626 mark_loop_jump (XEXP (x, 0), loop_num);
2627 mark_loop_jump (XEXP (x, 1), loop_num);
2632 mark_loop_jump (XEXP (x, 0), loop_num);
2636 dest_loop = uid_loop_num[INSN_UID (XEXP (x, 0))];
2638 /* Link together all labels that branch outside the loop. This
2639 is used by final_[bg]iv_value and the loop unrolling code. Also
2640 mark this LABEL_REF so we know that this branch should predict
2643 /* A check to make sure the label is not in an inner nested loop,
2644 since this does not count as a loop exit. */
2645 if (dest_loop != -1)
2647 for (outer_loop = dest_loop; outer_loop != -1;
2648 outer_loop = loop_outer_loop[outer_loop])
2649 if (outer_loop == loop_num)
2655 if (loop_num != -1 && outer_loop == -1)
2657 LABEL_OUTSIDE_LOOP_P (x) = 1;
2658 LABEL_NEXTREF (x) = loop_number_exit_labels[loop_num];
2659 loop_number_exit_labels[loop_num] = x;
2661 for (outer_loop = loop_num;
2662 outer_loop != -1 && outer_loop != dest_loop;
2663 outer_loop = loop_outer_loop[outer_loop])
2664 loop_number_exit_count[outer_loop]++;
2667 /* If this is inside a loop, but not in the current loop or one enclosed
2668 by it, it invalidates at least one loop. */
2670 if (dest_loop == -1)
2673 /* We must invalidate every nested loop containing the target of this
2674 label, except those that also contain the jump insn. */
2676 for (; dest_loop != -1; dest_loop = loop_outer_loop[dest_loop])
2678 /* Stop when we reach a loop that also contains the jump insn. */
2679 for (outer_loop = loop_num; outer_loop != -1;
2680 outer_loop = loop_outer_loop[outer_loop])
2681 if (dest_loop == outer_loop)
2684 /* If we get here, we know we need to invalidate a loop. */
2685 if (loop_dump_stream && ! loop_invalid[dest_loop])
2686 fprintf (loop_dump_stream,
2687 "\nLoop at %d ignored due to multiple entry points.\n",
2688 INSN_UID (loop_number_loop_starts[dest_loop]));
2690 loop_invalid[dest_loop] = 1;
2695 /* If this is not setting pc, ignore. */
2696 if (SET_DEST (x) == pc_rtx)
2697 mark_loop_jump (SET_SRC (x), loop_num);
2701 mark_loop_jump (XEXP (x, 1), loop_num);
2702 mark_loop_jump (XEXP (x, 2), loop_num);
2707 for (i = 0; i < XVECLEN (x, 0); i++)
2708 mark_loop_jump (XVECEXP (x, 0, i), loop_num);
2712 for (i = 0; i < XVECLEN (x, 1); i++)
2713 mark_loop_jump (XVECEXP (x, 1, i), loop_num);
2717 /* Treat anything else (such as a symbol_ref)
2718 as a branch out of this loop, but not into any loop. */
2723 LABEL_OUTSIDE_LOOP_P (x) = 1;
2724 LABEL_NEXTREF (x) = loop_number_exit_labels[loop_num];
2727 loop_number_exit_labels[loop_num] = x;
2729 for (outer_loop = loop_num; outer_loop != -1;
2730 outer_loop = loop_outer_loop[outer_loop])
2731 loop_number_exit_count[outer_loop]++;
2737 /* Return nonzero if there is a label in the range from
2738 insn INSN to and including the insn whose luid is END
2739 INSN must have an assigned luid (i.e., it must not have
2740 been previously created by loop.c). */
2743 labels_in_range_p (insn, end)
2747 while (insn && INSN_LUID (insn) <= end)
2749 if (GET_CODE (insn) == CODE_LABEL)
2751 insn = NEXT_INSN (insn);
2757 /* Record that a memory reference X is being set. */
2760 note_addr_stored (x)
2765 if (x == 0 || GET_CODE (x) != MEM)
2768 /* Count number of memory writes.
2769 This affects heuristics in strength_reduce. */
2772 /* BLKmode MEM means all memory is clobbered. */
2773 if (GET_MODE (x) == BLKmode)
2774 unknown_address_altered = 1;
2776 if (unknown_address_altered)
2779 for (i = 0; i < loop_store_mems_idx; i++)
2780 if (rtx_equal_p (XEXP (loop_store_mems[i], 0), XEXP (x, 0))
2781 && MEM_IN_STRUCT_P (x) == MEM_IN_STRUCT_P (loop_store_mems[i]))
2783 /* We are storing at the same address as previously noted. Save the
2785 if (GET_MODE_SIZE (GET_MODE (x))
2786 > GET_MODE_SIZE (GET_MODE (loop_store_mems[i])))
2787 loop_store_mems[i] = x;
2791 if (i == NUM_STORES)
2792 unknown_address_altered = 1;
2794 else if (i == loop_store_mems_idx)
2795 loop_store_mems[loop_store_mems_idx++] = x;
2798 /* Return nonzero if the rtx X is invariant over the current loop.
2800 The value is 2 if we refer to something only conditionally invariant.
2802 If `unknown_address_altered' is nonzero, no memory ref is invariant.
2803 Otherwise, a memory ref is invariant if it does not conflict with
2804 anything stored in `loop_store_mems'. */
2811 register enum rtx_code code;
2813 int conditional = 0;
2817 code = GET_CODE (x);
2827 /* A LABEL_REF is normally invariant, however, if we are unrolling
2828 loops, and this label is inside the loop, then it isn't invariant.
2829 This is because each unrolled copy of the loop body will have
2830 a copy of this label. If this was invariant, then an insn loading
2831 the address of this label into a register might get moved outside
2832 the loop, and then each loop body would end up using the same label.
2834 We don't know the loop bounds here though, so just fail for all
2836 if (flag_unroll_loops)
2843 case UNSPEC_VOLATILE:
2847 /* We used to check RTX_UNCHANGING_P (x) here, but that is invalid
2848 since the reg might be set by initialization within the loop. */
2850 if ((x == frame_pointer_rtx || x == hard_frame_pointer_rtx
2851 || x == arg_pointer_rtx)
2852 && ! current_function_has_nonlocal_goto)
2856 && REGNO (x) < FIRST_PSEUDO_REGISTER && call_used_regs[REGNO (x)])
2859 if (n_times_set[REGNO (x)] < 0)
2862 return n_times_set[REGNO (x)] == 0;
2865 /* Volatile memory references must be rejected. Do this before
2866 checking for read-only items, so that volatile read-only items
2867 will be rejected also. */
2868 if (MEM_VOLATILE_P (x))
2871 /* Read-only items (such as constants in a constant pool) are
2872 invariant if their address is. */
2873 if (RTX_UNCHANGING_P (x))
2876 /* If we filled the table (or had a subroutine call), any location
2877 in memory could have been clobbered. */
2878 if (unknown_address_altered)
2881 /* See if there is any dependence between a store and this load. */
2882 for (i = loop_store_mems_idx - 1; i >= 0; i--)
2883 if (true_dependence (loop_store_mems[i], VOIDmode, x, rtx_varies_p))
2886 /* It's not invalidated by a store in memory
2887 but we must still verify the address is invariant. */
2891 /* Don't mess with insns declared volatile. */
2892 if (MEM_VOLATILE_P (x))
2896 fmt = GET_RTX_FORMAT (code);
2897 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2901 int tem = invariant_p (XEXP (x, i));
2907 else if (fmt[i] == 'E')
2910 for (j = 0; j < XVECLEN (x, i); j++)
2912 int tem = invariant_p (XVECEXP (x, i, j));
2922 return 1 + conditional;
2926 /* Return nonzero if all the insns in the loop that set REG
2927 are INSN and the immediately following insns,
2928 and if each of those insns sets REG in an invariant way
2929 (not counting uses of REG in them).
2931 The value is 2 if some of these insns are only conditionally invariant.
2933 We assume that INSN itself is the first set of REG
2934 and that its source is invariant. */
2937 consec_sets_invariant_p (reg, n_sets, insn)
2941 register rtx p = insn;
2942 register int regno = REGNO (reg);
2944 /* Number of sets we have to insist on finding after INSN. */
2945 int count = n_sets - 1;
2946 int old = n_times_set[regno];
2950 /* If N_SETS hit the limit, we can't rely on its value. */
2954 n_times_set[regno] = 0;
2958 register enum rtx_code code;
2962 code = GET_CODE (p);
2964 /* If library call, skip to end of of it. */
2965 if (code == INSN && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
2970 && (set = single_set (p))
2971 && GET_CODE (SET_DEST (set)) == REG
2972 && REGNO (SET_DEST (set)) == regno)
2974 this = invariant_p (SET_SRC (set));
2977 else if (temp = find_reg_note (p, REG_EQUAL, NULL_RTX))
2979 /* If this is a libcall, then any invariant REG_EQUAL note is OK.
2980 If this is an ordinary insn, then only CONSTANT_P REG_EQUAL
2982 this = (CONSTANT_P (XEXP (temp, 0))
2983 || (find_reg_note (p, REG_RETVAL, NULL_RTX)
2984 && invariant_p (XEXP (temp, 0))));
2991 else if (code != NOTE)
2993 n_times_set[regno] = old;
2998 n_times_set[regno] = old;
2999 /* If invariant_p ever returned 2, we return 2. */
3000 return 1 + (value & 2);
3004 /* I don't think this condition is sufficient to allow INSN
3005 to be moved, so we no longer test it. */
3007 /* Return 1 if all insns in the basic block of INSN and following INSN
3008 that set REG are invariant according to TABLE. */
3011 all_sets_invariant_p (reg, insn, table)
3015 register rtx p = insn;
3016 register int regno = REGNO (reg);
3020 register enum rtx_code code;
3022 code = GET_CODE (p);
3023 if (code == CODE_LABEL || code == JUMP_INSN)
3025 if (code == INSN && GET_CODE (PATTERN (p)) == SET
3026 && GET_CODE (SET_DEST (PATTERN (p))) == REG
3027 && REGNO (SET_DEST (PATTERN (p))) == regno)
3029 if (!invariant_p (SET_SRC (PATTERN (p)), table))
3036 /* Look at all uses (not sets) of registers in X. For each, if it is
3037 the single use, set USAGE[REGNO] to INSN; if there was a previous use in
3038 a different insn, set USAGE[REGNO] to const0_rtx. */
3041 find_single_use_in_loop (insn, x, usage)
3046 enum rtx_code code = GET_CODE (x);
3047 char *fmt = GET_RTX_FORMAT (code);
3052 = (usage[REGNO (x)] != 0 && usage[REGNO (x)] != insn)
3053 ? const0_rtx : insn;
3055 else if (code == SET)
3057 /* Don't count SET_DEST if it is a REG; otherwise count things
3058 in SET_DEST because if a register is partially modified, it won't
3059 show up as a potential movable so we don't care how USAGE is set
3061 if (GET_CODE (SET_DEST (x)) != REG)
3062 find_single_use_in_loop (insn, SET_DEST (x), usage);
3063 find_single_use_in_loop (insn, SET_SRC (x), usage);
3066 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3068 if (fmt[i] == 'e' && XEXP (x, i) != 0)
3069 find_single_use_in_loop (insn, XEXP (x, i), usage);
3070 else if (fmt[i] == 'E')
3071 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3072 find_single_use_in_loop (insn, XVECEXP (x, i, j), usage);
3076 /* Increment N_TIMES_SET at the index of each register
3077 that is modified by an insn between FROM and TO.
3078 If the value of an element of N_TIMES_SET becomes 127 or more,
3079 stop incrementing it, to avoid overflow.
3081 Store in SINGLE_USAGE[I] the single insn in which register I is
3082 used, if it is only used once. Otherwise, it is set to 0 (for no
3083 uses) or const0_rtx for more than one use. This parameter may be zero,
3084 in which case this processing is not done.
3086 Store in *COUNT_PTR the number of actual instruction
3087 in the loop. We use this to decide what is worth moving out. */
3089 /* last_set[n] is nonzero iff reg n has been set in the current basic block.
3090 In that case, it is the insn that last set reg n. */
3093 count_loop_regs_set (from, to, may_not_move, single_usage, count_ptr, nregs)
3094 register rtx from, to;
3100 register rtx *last_set = (rtx *) alloca (nregs * sizeof (rtx));
3102 register int count = 0;
3105 bzero ((char *) last_set, nregs * sizeof (rtx));
3106 for (insn = from; insn != to; insn = NEXT_INSN (insn))
3108 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
3112 /* If requested, record registers that have exactly one use. */
3115 find_single_use_in_loop (insn, PATTERN (insn), single_usage);
3117 /* Include uses in REG_EQUAL notes. */
3118 if (REG_NOTES (insn))
3119 find_single_use_in_loop (insn, REG_NOTES (insn), single_usage);
3122 if (GET_CODE (PATTERN (insn)) == CLOBBER
3123 && GET_CODE (XEXP (PATTERN (insn), 0)) == REG)
3124 /* Don't move a reg that has an explicit clobber.
3125 We might do so sometimes, but it's not worth the pain. */
3126 may_not_move[REGNO (XEXP (PATTERN (insn), 0))] = 1;
3128 if (GET_CODE (PATTERN (insn)) == SET
3129 || GET_CODE (PATTERN (insn)) == CLOBBER)
3131 dest = SET_DEST (PATTERN (insn));
3132 while (GET_CODE (dest) == SUBREG
3133 || GET_CODE (dest) == ZERO_EXTRACT
3134 || GET_CODE (dest) == SIGN_EXTRACT
3135 || GET_CODE (dest) == STRICT_LOW_PART)
3136 dest = XEXP (dest, 0);
3137 if (GET_CODE (dest) == REG)
3139 register int regno = REGNO (dest);
3140 /* If this is the first setting of this reg
3141 in current basic block, and it was set before,
3142 it must be set in two basic blocks, so it cannot
3143 be moved out of the loop. */
3144 if (n_times_set[regno] > 0 && last_set[regno] == 0)
3145 may_not_move[regno] = 1;
3146 /* If this is not first setting in current basic block,
3147 see if reg was used in between previous one and this.
3148 If so, neither one can be moved. */
3149 if (last_set[regno] != 0
3150 && reg_used_between_p (dest, last_set[regno], insn))
3151 may_not_move[regno] = 1;
3152 if (n_times_set[regno] < 127)
3153 ++n_times_set[regno];
3154 last_set[regno] = insn;
3157 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
3160 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
3162 register rtx x = XVECEXP (PATTERN (insn), 0, i);
3163 if (GET_CODE (x) == CLOBBER && GET_CODE (XEXP (x, 0)) == REG)
3164 /* Don't move a reg that has an explicit clobber.
3165 It's not worth the pain to try to do it correctly. */
3166 may_not_move[REGNO (XEXP (x, 0))] = 1;
3168 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
3170 dest = SET_DEST (x);
3171 while (GET_CODE (dest) == SUBREG
3172 || GET_CODE (dest) == ZERO_EXTRACT
3173 || GET_CODE (dest) == SIGN_EXTRACT
3174 || GET_CODE (dest) == STRICT_LOW_PART)
3175 dest = XEXP (dest, 0);
3176 if (GET_CODE (dest) == REG)
3178 register int regno = REGNO (dest);
3179 if (n_times_set[regno] > 0 && last_set[regno] == 0)
3180 may_not_move[regno] = 1;
3181 if (last_set[regno] != 0
3182 && reg_used_between_p (dest, last_set[regno], insn))
3183 may_not_move[regno] = 1;
3184 if (n_times_set[regno] < 127)
3185 ++n_times_set[regno];
3186 last_set[regno] = insn;
3193 if (GET_CODE (insn) == CODE_LABEL || GET_CODE (insn) == JUMP_INSN)
3194 bzero ((char *) last_set, nregs * sizeof (rtx));
3199 /* Given a loop that is bounded by LOOP_START and LOOP_END
3200 and that is entered at SCAN_START,
3201 return 1 if the register set in SET contained in insn INSN is used by
3202 any insn that precedes INSN in cyclic order starting
3203 from the loop entry point.
3205 We don't want to use INSN_LUID here because if we restrict INSN to those
3206 that have a valid INSN_LUID, it means we cannot move an invariant out
3207 from an inner loop past two loops. */
3210 loop_reg_used_before_p (set, insn, loop_start, scan_start, loop_end)
3211 rtx set, insn, loop_start, scan_start, loop_end;
3213 rtx reg = SET_DEST (set);
3216 /* Scan forward checking for register usage. If we hit INSN, we
3217 are done. Otherwise, if we hit LOOP_END, wrap around to LOOP_START. */
3218 for (p = scan_start; p != insn; p = NEXT_INSN (p))
3220 if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
3221 && reg_overlap_mentioned_p (reg, PATTERN (p)))
3231 /* A "basic induction variable" or biv is a pseudo reg that is set
3232 (within this loop) only by incrementing or decrementing it. */
3233 /* A "general induction variable" or giv is a pseudo reg whose
3234 value is a linear function of a biv. */
3236 /* Bivs are recognized by `basic_induction_var';
3237 Givs by `general_induct_var'. */
3239 /* Indexed by register number, indicates whether or not register is an
3240 induction variable, and if so what type. */
3242 enum iv_mode *reg_iv_type;
3244 /* Indexed by register number, contains pointer to `struct induction'
3245 if register is an induction variable. This holds general info for
3246 all induction variables. */
3248 struct induction **reg_iv_info;
3250 /* Indexed by register number, contains pointer to `struct iv_class'
3251 if register is a basic induction variable. This holds info describing
3252 the class (a related group) of induction variables that the biv belongs
3255 struct iv_class **reg_biv_class;
3257 /* The head of a list which links together (via the next field)
3258 every iv class for the current loop. */
3260 struct iv_class *loop_iv_list;
3262 /* Communication with routines called via `note_stores'. */
3264 static rtx note_insn;
3266 /* Dummy register to have non-zero DEST_REG for DEST_ADDR type givs. */
3268 static rtx addr_placeholder;
3270 /* ??? Unfinished optimizations, and possible future optimizations,
3271 for the strength reduction code. */
3273 /* ??? There is one more optimization you might be interested in doing: to
3274 allocate pseudo registers for frequently-accessed memory locations.
3275 If the same memory location is referenced each time around, it might
3276 be possible to copy it into a register before and out after.
3277 This is especially useful when the memory location is a variable which
3278 is in a stack slot because somewhere its address is taken. If the
3279 loop doesn't contain a function call and the variable isn't volatile,
3280 it is safe to keep the value in a register for the duration of the
3281 loop. One tricky thing is that the copying of the value back from the
3282 register has to be done on all exits from the loop. You need to check that
3283 all the exits from the loop go to the same place. */
3285 /* ??? The interaction of biv elimination, and recognition of 'constant'
3286 bivs, may cause problems. */
3288 /* ??? Add heuristics so that DEST_ADDR strength reduction does not cause
3289 performance problems.
3291 Perhaps don't eliminate things that can be combined with an addressing
3292 mode. Find all givs that have the same biv, mult_val, and add_val;
3293 then for each giv, check to see if its only use dies in a following
3294 memory address. If so, generate a new memory address and check to see
3295 if it is valid. If it is valid, then store the modified memory address,
3296 otherwise, mark the giv as not done so that it will get its own iv. */
3298 /* ??? Could try to optimize branches when it is known that a biv is always
3301 /* ??? When replace a biv in a compare insn, we should replace with closest
3302 giv so that an optimized branch can still be recognized by the combiner,
3303 e.g. the VAX acb insn. */
3305 /* ??? Many of the checks involving uid_luid could be simplified if regscan
3306 was rerun in loop_optimize whenever a register was added or moved.
3307 Also, some of the optimizations could be a little less conservative. */
3309 /* Perform strength reduction and induction variable elimination. */
3311 /* Pseudo registers created during this function will be beyond the last
3312 valid index in several tables including n_times_set and regno_last_uid.
3313 This does not cause a problem here, because the added registers cannot be
3314 givs outside of their loop, and hence will never be reconsidered.
3315 But scan_loop must check regnos to make sure they are in bounds. */
3318 strength_reduce (scan_start, end, loop_top, insn_count,
3319 loop_start, loop_end)
3332 /* This is 1 if current insn is not executed at least once for every loop
3334 int not_every_iteration = 0;
3335 /* This is 1 if current insn may be executed more than once for every
3337 int maybe_multiple = 0;
3338 /* Temporary list pointers for traversing loop_iv_list. */
3339 struct iv_class *bl, **backbl;
3340 /* Ratio of extra register life span we can justify
3341 for saving an instruction. More if loop doesn't call subroutines
3342 since in that case saving an insn makes more difference
3343 and more registers are available. */
3344 /* ??? could set this to last value of threshold in move_movables */
3345 int threshold = (loop_has_call ? 1 : 2) * (3 + n_non_fixed_regs);
3346 /* Map of pseudo-register replacements. */
3350 rtx end_insert_before;
3353 reg_iv_type = (enum iv_mode *) alloca (max_reg_before_loop
3354 * sizeof (enum iv_mode *));
3355 bzero ((char *) reg_iv_type, max_reg_before_loop * sizeof (enum iv_mode *));
3356 reg_iv_info = (struct induction **)
3357 alloca (max_reg_before_loop * sizeof (struct induction *));
3358 bzero ((char *) reg_iv_info, (max_reg_before_loop
3359 * sizeof (struct induction *)));
3360 reg_biv_class = (struct iv_class **)
3361 alloca (max_reg_before_loop * sizeof (struct iv_class *));
3362 bzero ((char *) reg_biv_class, (max_reg_before_loop
3363 * sizeof (struct iv_class *)));
3366 addr_placeholder = gen_reg_rtx (Pmode);
3368 /* Save insn immediately after the loop_end. Insns inserted after loop_end
3369 must be put before this insn, so that they will appear in the right
3370 order (i.e. loop order).
3372 If loop_end is the end of the current function, then emit a
3373 NOTE_INSN_DELETED after loop_end and set end_insert_before to the
3375 if (NEXT_INSN (loop_end) != 0)
3376 end_insert_before = NEXT_INSN (loop_end);
3378 end_insert_before = emit_note_after (NOTE_INSN_DELETED, loop_end);
3380 /* Scan through loop to find all possible bivs. */
3386 /* At end of a straight-in loop, we are done.
3387 At end of a loop entered at the bottom, scan the top. */
3388 if (p == scan_start)
3396 if (p == scan_start)
3400 if (GET_CODE (p) == INSN
3401 && (set = single_set (p))
3402 && GET_CODE (SET_DEST (set)) == REG)
3404 dest_reg = SET_DEST (set);
3405 if (REGNO (dest_reg) < max_reg_before_loop
3406 && REGNO (dest_reg) >= FIRST_PSEUDO_REGISTER
3407 && reg_iv_type[REGNO (dest_reg)] != NOT_BASIC_INDUCT)
3409 if (basic_induction_var (SET_SRC (set), GET_MODE (SET_SRC (set)),
3410 dest_reg, p, &inc_val, &mult_val))
3412 /* It is a possible basic induction variable.
3413 Create and initialize an induction structure for it. */
3416 = (struct induction *) alloca (sizeof (struct induction));
3418 record_biv (v, p, dest_reg, inc_val, mult_val,
3419 not_every_iteration, maybe_multiple);
3420 reg_iv_type[REGNO (dest_reg)] = BASIC_INDUCT;
3422 else if (REGNO (dest_reg) < max_reg_before_loop)
3423 reg_iv_type[REGNO (dest_reg)] = NOT_BASIC_INDUCT;
3427 /* Past CODE_LABEL, we get to insns that may be executed multiple
3428 times. The only way we can be sure that they can't is if every
3429 every jump insn between here and the end of the loop either
3430 returns, exits the loop, is a forward jump, or is a jump
3431 to the loop start. */
3433 if (GET_CODE (p) == CODE_LABEL)
3441 insn = NEXT_INSN (insn);
3442 if (insn == scan_start)
3450 if (insn == scan_start)
3454 if (GET_CODE (insn) == JUMP_INSN
3455 && GET_CODE (PATTERN (insn)) != RETURN
3456 && (! condjump_p (insn)
3457 || (JUMP_LABEL (insn) != 0
3458 && JUMP_LABEL (insn) != scan_start
3459 && (INSN_UID (JUMP_LABEL (insn)) >= max_uid_for_loop
3460 || INSN_UID (insn) >= max_uid_for_loop
3461 || (INSN_LUID (JUMP_LABEL (insn))
3462 < INSN_LUID (insn))))))
3470 /* Past a jump, we get to insns for which we can't count
3471 on whether they will be executed during each iteration. */
3472 /* This code appears twice in strength_reduce. There is also similar
3473 code in scan_loop. */
3474 if (GET_CODE (p) == JUMP_INSN
3475 /* If we enter the loop in the middle, and scan around to the
3476 beginning, don't set not_every_iteration for that.
3477 This can be any kind of jump, since we want to know if insns
3478 will be executed if the loop is executed. */
3479 && ! (JUMP_LABEL (p) == loop_top
3480 && ((NEXT_INSN (NEXT_INSN (p)) == loop_end && simplejump_p (p))
3481 || (NEXT_INSN (p) == loop_end && condjump_p (p)))))
3485 /* If this is a jump outside the loop, then it also doesn't
3486 matter. Check to see if the target of this branch is on the
3487 loop_number_exits_labels list. */
3489 for (label = loop_number_exit_labels[uid_loop_num[INSN_UID (loop_start)]];
3491 label = LABEL_NEXTREF (label))
3492 if (XEXP (label, 0) == JUMP_LABEL (p))
3496 not_every_iteration = 1;
3499 else if (GET_CODE (p) == NOTE)
3501 /* At the virtual top of a converted loop, insns are again known to
3502 be executed each iteration: logically, the loop begins here
3503 even though the exit code has been duplicated. */
3504 if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP && loop_depth == 0)
3505 not_every_iteration = 0;
3506 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
3508 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
3512 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
3513 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
3514 or not an insn is known to be executed each iteration of the
3515 loop, whether or not any iterations are known to occur.
3517 Therefore, if we have just passed a label and have no more labels
3518 between here and the test insn of the loop, we know these insns
3519 will be executed each iteration. */
3521 if (not_every_iteration && GET_CODE (p) == CODE_LABEL
3522 && no_labels_between_p (p, loop_end))
3523 not_every_iteration = 0;
3526 /* Scan loop_iv_list to remove all regs that proved not to be bivs.
3527 Make a sanity check against n_times_set. */
3528 for (backbl = &loop_iv_list, bl = *backbl; bl; bl = bl->next)
3530 if (reg_iv_type[bl->regno] != BASIC_INDUCT
3531 /* Above happens if register modified by subreg, etc. */
3532 /* Make sure it is not recognized as a basic induction var: */
3533 || n_times_set[bl->regno] != bl->biv_count
3534 /* If never incremented, it is invariant that we decided not to
3535 move. So leave it alone. */
3536 || ! bl->incremented)
3538 if (loop_dump_stream)
3539 fprintf (loop_dump_stream, "Reg %d: biv discarded, %s\n",
3541 (reg_iv_type[bl->regno] != BASIC_INDUCT
3542 ? "not induction variable"
3543 : (! bl->incremented ? "never incremented"
3546 reg_iv_type[bl->regno] = NOT_BASIC_INDUCT;
3553 if (loop_dump_stream)
3554 fprintf (loop_dump_stream, "Reg %d: biv verified\n", bl->regno);
3558 /* Exit if there are no bivs. */
3561 /* Can still unroll the loop anyways, but indicate that there is no
3562 strength reduction info available. */
3563 if (flag_unroll_loops)
3564 unroll_loop (loop_end, insn_count, loop_start, end_insert_before, 0);
3569 /* Find initial value for each biv by searching backwards from loop_start,
3570 halting at first label. Also record any test condition. */
3573 for (p = loop_start; p && GET_CODE (p) != CODE_LABEL; p = PREV_INSN (p))
3577 if (GET_CODE (p) == CALL_INSN)
3580 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
3581 || GET_CODE (p) == CALL_INSN)
3582 note_stores (PATTERN (p), record_initial);
3584 /* Record any test of a biv that branches around the loop if no store
3585 between it and the start of loop. We only care about tests with
3586 constants and registers and only certain of those. */
3587 if (GET_CODE (p) == JUMP_INSN
3588 && JUMP_LABEL (p) != 0
3589 && next_real_insn (JUMP_LABEL (p)) == next_real_insn (loop_end)
3590 && (test = get_condition_for_loop (p)) != 0
3591 && GET_CODE (XEXP (test, 0)) == REG
3592 && REGNO (XEXP (test, 0)) < max_reg_before_loop
3593 && (bl = reg_biv_class[REGNO (XEXP (test, 0))]) != 0
3594 && valid_initial_value_p (XEXP (test, 1), p, call_seen, loop_start)
3595 && bl->init_insn == 0)
3597 /* If an NE test, we have an initial value! */
3598 if (GET_CODE (test) == NE)
3601 bl->init_set = gen_rtx (SET, VOIDmode,
3602 XEXP (test, 0), XEXP (test, 1));
3605 bl->initial_test = test;
3609 /* Look at the each biv and see if we can say anything better about its
3610 initial value from any initializing insns set up above. (This is done
3611 in two passes to avoid missing SETs in a PARALLEL.) */
3612 for (bl = loop_iv_list; bl; bl = bl->next)
3616 if (! bl->init_insn)
3619 src = SET_SRC (bl->init_set);
3621 if (loop_dump_stream)
3622 fprintf (loop_dump_stream,
3623 "Biv %d initialized at insn %d: initial value ",
3624 bl->regno, INSN_UID (bl->init_insn));
3626 if ((GET_MODE (src) == GET_MODE (regno_reg_rtx[bl->regno])
3627 || GET_MODE (src) == VOIDmode)
3628 && valid_initial_value_p (src, bl->init_insn, call_seen, loop_start))
3630 bl->initial_value = src;
3632 if (loop_dump_stream)
3634 if (GET_CODE (src) == CONST_INT)
3635 fprintf (loop_dump_stream, "%d\n", INTVAL (src));
3638 print_rtl (loop_dump_stream, src);
3639 fprintf (loop_dump_stream, "\n");
3645 /* Biv initial value is not simple move,
3646 so let it keep initial value of "itself". */
3648 if (loop_dump_stream)
3649 fprintf (loop_dump_stream, "is complex\n");
3653 /* Search the loop for general induction variables. */
3655 /* A register is a giv if: it is only set once, it is a function of a
3656 biv and a constant (or invariant), and it is not a biv. */
3658 not_every_iteration = 0;
3664 /* At end of a straight-in loop, we are done.
3665 At end of a loop entered at the bottom, scan the top. */
3666 if (p == scan_start)
3674 if (p == scan_start)
3678 /* Look for a general induction variable in a register. */
3679 if (GET_CODE (p) == INSN
3680 && (set = single_set (p))
3681 && GET_CODE (SET_DEST (set)) == REG
3682 && ! may_not_optimize[REGNO (SET_DEST (set))])
3690 dest_reg = SET_DEST (set);
3691 if (REGNO (dest_reg) < FIRST_PSEUDO_REGISTER)
3694 if (/* SET_SRC is a giv. */
3695 ((benefit = general_induction_var (SET_SRC (set),
3698 /* Equivalent expression is a giv. */
3699 || ((regnote = find_reg_note (p, REG_EQUAL, NULL_RTX))
3700 && (benefit = general_induction_var (XEXP (regnote, 0),
3702 &add_val, &mult_val))))
3703 /* Don't try to handle any regs made by loop optimization.
3704 We have nothing on them in regno_first_uid, etc. */
3705 && REGNO (dest_reg) < max_reg_before_loop
3706 /* Don't recognize a BASIC_INDUCT_VAR here. */
3707 && dest_reg != src_reg
3708 /* This must be the only place where the register is set. */
3709 && (n_times_set[REGNO (dest_reg)] == 1
3710 /* or all sets must be consecutive and make a giv. */
3711 || (benefit = consec_sets_giv (benefit, p,
3713 &add_val, &mult_val))))
3717 = (struct induction *) alloca (sizeof (struct induction));
3720 /* If this is a library call, increase benefit. */
3721 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
3722 benefit += libcall_benefit (p);
3724 /* Skip the consecutive insns, if there are any. */
3725 for (count = n_times_set[REGNO (dest_reg)] - 1;
3728 /* If first insn of libcall sequence, skip to end.
3729 Do this at start of loop, since INSN is guaranteed to
3731 if (GET_CODE (p) != NOTE
3732 && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
3735 do p = NEXT_INSN (p);
3736 while (GET_CODE (p) == NOTE);
3739 record_giv (v, p, src_reg, dest_reg, mult_val, add_val, benefit,
3740 DEST_REG, not_every_iteration, NULL_PTR, loop_start,
3746 #ifndef DONT_REDUCE_ADDR
3747 /* Look for givs which are memory addresses. */
3748 /* This resulted in worse code on a VAX 8600. I wonder if it
3750 if (GET_CODE (p) == INSN)
3751 find_mem_givs (PATTERN (p), p, not_every_iteration, loop_start,
3755 /* Update the status of whether giv can derive other givs. This can
3756 change when we pass a label or an insn that updates a biv. */
3757 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
3758 || GET_CODE (p) == CODE_LABEL)
3759 update_giv_derive (p);
3761 /* Past a jump, we get to insns for which we can't count
3762 on whether they will be executed during each iteration. */
3763 /* This code appears twice in strength_reduce. There is also similar
3764 code in scan_loop. */
3765 if (GET_CODE (p) == JUMP_INSN
3766 /* If we enter the loop in the middle, and scan around to the
3767 beginning, don't set not_every_iteration for that.
3768 This can be any kind of jump, since we want to know if insns
3769 will be executed if the loop is executed. */
3770 && ! (JUMP_LABEL (p) == loop_top
3771 && ((NEXT_INSN (NEXT_INSN (p)) == loop_end && simplejump_p (p))
3772 || (NEXT_INSN (p) == loop_end && condjump_p (p)))))
3776 /* If this is a jump outside the loop, then it also doesn't
3777 matter. Check to see if the target of this branch is on the
3778 loop_number_exits_labels list. */
3780 for (label = loop_number_exit_labels[uid_loop_num[INSN_UID (loop_start)]];
3782 label = LABEL_NEXTREF (label))
3783 if (XEXP (label, 0) == JUMP_LABEL (p))
3787 not_every_iteration = 1;
3790 else if (GET_CODE (p) == NOTE)
3792 /* At the virtual top of a converted loop, insns are again known to
3793 be executed each iteration: logically, the loop begins here
3794 even though the exit code has been duplicated. */
3795 if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP && loop_depth == 0)
3796 not_every_iteration = 0;
3797 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
3799 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
3803 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
3804 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
3805 or not an insn is known to be executed each iteration of the
3806 loop, whether or not any iterations are known to occur.
3808 Therefore, if we have just passed a label and have no more labels
3809 between here and the test insn of the loop, we know these insns
3810 will be executed each iteration. */
3812 if (not_every_iteration && GET_CODE (p) == CODE_LABEL
3813 && no_labels_between_p (p, loop_end))
3814 not_every_iteration = 0;
3817 /* Try to calculate and save the number of loop iterations. This is
3818 set to zero if the actual number can not be calculated. This must
3819 be called after all giv's have been identified, since otherwise it may
3820 fail if the iteration variable is a giv. */
3822 loop_n_iterations = loop_iterations (loop_start, loop_end);
3824 /* Now for each giv for which we still don't know whether or not it is
3825 replaceable, check to see if it is replaceable because its final value
3826 can be calculated. This must be done after loop_iterations is called,
3827 so that final_giv_value will work correctly. */
3829 for (bl = loop_iv_list; bl; bl = bl->next)
3831 struct induction *v;
3833 for (v = bl->giv; v; v = v->next_iv)
3834 if (! v->replaceable && ! v->not_replaceable)
3835 check_final_value (v, loop_start, loop_end);
3838 /* Try to prove that the loop counter variable (if any) is always
3839 nonnegative; if so, record that fact with a REG_NONNEG note
3840 so that "decrement and branch until zero" insn can be used. */
3841 check_dbra_loop (loop_end, insn_count, loop_start);
3844 /* record loop-variables relevant for BCT optimization before unrolling
3845 the loop. Unrolling may update part of this information, and the
3846 correct data will be used for generating the BCT. */
3847 #ifdef HAVE_decrement_and_branch_on_count
3848 if (HAVE_decrement_and_branch_on_count)
3849 analyze_loop_iterations (loop_start, loop_end);
3853 /* Create reg_map to hold substitutions for replaceable giv regs. */
3854 reg_map = (rtx *) alloca (max_reg_before_loop * sizeof (rtx));
3855 bzero ((char *) reg_map, max_reg_before_loop * sizeof (rtx));
3857 /* Examine each iv class for feasibility of strength reduction/induction
3858 variable elimination. */
3860 for (bl = loop_iv_list; bl; bl = bl->next)
3862 struct induction *v;
3865 rtx final_value = 0;
3867 /* Test whether it will be possible to eliminate this biv
3868 provided all givs are reduced. This is possible if either
3869 the reg is not used outside the loop, or we can compute
3870 what its final value will be.
3872 For architectures with a decrement_and_branch_until_zero insn,
3873 don't do this if we put a REG_NONNEG note on the endtest for
3876 /* Compare against bl->init_insn rather than loop_start.
3877 We aren't concerned with any uses of the biv between
3878 init_insn and loop_start since these won't be affected
3879 by the value of the biv elsewhere in the function, so
3880 long as init_insn doesn't use the biv itself.
3881 March 14, 1989 -- self@bayes.arc.nasa.gov */
3883 if ((uid_luid[REGNO_LAST_UID (bl->regno)] < INSN_LUID (loop_end)
3885 && INSN_UID (bl->init_insn) < max_uid_for_loop
3886 && uid_luid[REGNO_FIRST_UID (bl->regno)] >= INSN_LUID (bl->init_insn)
3887 #ifdef HAVE_decrement_and_branch_until_zero
3890 && ! reg_mentioned_p (bl->biv->dest_reg, SET_SRC (bl->init_set)))
3891 || ((final_value = final_biv_value (bl, loop_start, loop_end))
3892 #ifdef HAVE_decrement_and_branch_until_zero
3896 bl->eliminable = maybe_eliminate_biv (bl, loop_start, end, 0,
3897 threshold, insn_count);
3900 if (loop_dump_stream)
3902 fprintf (loop_dump_stream,
3903 "Cannot eliminate biv %d.\n",
3905 fprintf (loop_dump_stream,
3906 "First use: insn %d, last use: insn %d.\n",
3907 REGNO_FIRST_UID (bl->regno),
3908 REGNO_LAST_UID (bl->regno));
3912 /* Combine all giv's for this iv_class. */
3915 /* This will be true at the end, if all givs which depend on this
3916 biv have been strength reduced.
3917 We can't (currently) eliminate the biv unless this is so. */
3920 /* Check each giv in this class to see if we will benefit by reducing
3921 it. Skip giv's combined with others. */
3922 for (v = bl->giv; v; v = v->next_iv)
3924 struct induction *tv;
3926 if (v->ignore || v->same)
3929 benefit = v->benefit;
3931 /* Reduce benefit if not replaceable, since we will insert
3932 a move-insn to replace the insn that calculates this giv.
3933 Don't do this unless the giv is a user variable, since it
3934 will often be marked non-replaceable because of the duplication
3935 of the exit code outside the loop. In such a case, the copies
3936 we insert are dead and will be deleted. So they don't have
3937 a cost. Similar situations exist. */
3938 /* ??? The new final_[bg]iv_value code does a much better job
3939 of finding replaceable giv's, and hence this code may no longer
3941 if (! v->replaceable && ! bl->eliminable
3942 && REG_USERVAR_P (v->dest_reg))
3943 benefit -= copy_cost;
3945 /* Decrease the benefit to count the add-insns that we will
3946 insert to increment the reduced reg for the giv. */
3947 benefit -= add_cost * bl->biv_count;
3949 /* Decide whether to strength-reduce this giv or to leave the code
3950 unchanged (recompute it from the biv each time it is used).
3951 This decision can be made independently for each giv. */
3954 /* Attempt to guess whether autoincrement will handle some of the
3955 new add insns; if so, increase BENEFIT (undo the subtraction of
3956 add_cost that was done above). */
3957 if (v->giv_type == DEST_ADDR
3958 && GET_CODE (v->mult_val) == CONST_INT)
3960 #if defined (HAVE_POST_INCREMENT) || defined (HAVE_PRE_INCREMENT)
3961 if (INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
3962 benefit += add_cost * bl->biv_count;
3964 #if defined (HAVE_POST_DECREMENT) || defined (HAVE_PRE_DECREMENT)
3965 if (-INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
3966 benefit += add_cost * bl->biv_count;
3971 /* If an insn is not to be strength reduced, then set its ignore
3972 flag, and clear all_reduced. */
3974 /* A giv that depends on a reversed biv must be reduced if it is
3975 used after the loop exit, otherwise, it would have the wrong
3976 value after the loop exit. To make it simple, just reduce all
3977 of such giv's whether or not we know they are used after the loop
3980 if ( ! flag_reduce_all_givs && v->lifetime * threshold * benefit < insn_count
3983 if (loop_dump_stream)
3984 fprintf (loop_dump_stream,
3985 "giv of insn %d not worth while, %d vs %d.\n",
3987 v->lifetime * threshold * benefit, insn_count);
3993 /* Check that we can increment the reduced giv without a
3994 multiply insn. If not, reject it. */
3996 for (tv = bl->biv; tv; tv = tv->next_iv)
3997 if (tv->mult_val == const1_rtx
3998 && ! product_cheap_p (tv->add_val, v->mult_val))
4000 if (loop_dump_stream)
4001 fprintf (loop_dump_stream,
4002 "giv of insn %d: would need a multiply.\n",
4003 INSN_UID (v->insn));
4011 /* Reduce each giv that we decided to reduce. */
4013 for (v = bl->giv; v; v = v->next_iv)
4015 struct induction *tv;
4016 if (! v->ignore && v->same == 0)
4018 int auto_inc_opt = 0;
4020 v->new_reg = gen_reg_rtx (v->mode);
4023 /* If the target has auto-increment addressing modes, and
4024 this is an address giv, then try to put the increment
4025 immediately after its use, so that flow can create an
4026 auto-increment addressing mode. */
4027 if (v->giv_type == DEST_ADDR && bl->biv_count == 1
4028 && bl->biv->always_executed && ! bl->biv->maybe_multiple
4029 /* We don't handle reversed biv's because bl->biv->insn
4030 does not have a valid INSN_LUID. */
4032 && v->always_executed && ! v->maybe_multiple)
4034 /* If other giv's have been combined with this one, then
4035 this will work only if all uses of the other giv's occur
4036 before this giv's insn. This is difficult to check.
4038 We simplify this by looking for the common case where
4039 there is one DEST_REG giv, and this giv's insn is the
4040 last use of the dest_reg of that DEST_REG giv. If the
4041 the increment occurs after the address giv, then we can
4042 perform the optimization. (Otherwise, the increment
4043 would have to go before other_giv, and we would not be
4044 able to combine it with the address giv to get an
4045 auto-inc address.) */
4046 if (v->combined_with)
4048 struct induction *other_giv = 0;
4050 for (tv = bl->giv; tv; tv = tv->next_iv)
4058 if (! tv && other_giv
4059 && REGNO (other_giv->dest_reg) < max_reg_before_loop
4060 && (REGNO_LAST_UID (REGNO (other_giv->dest_reg))
4061 == INSN_UID (v->insn))
4062 && INSN_LUID (v->insn) < INSN_LUID (bl->biv->insn))
4065 /* Check for case where increment is before the the address
4067 else if (INSN_LUID (v->insn) > INSN_LUID (bl->biv->insn))
4076 /* We can't put an insn immediately after one setting
4077 cc0, or immediately before one using cc0. */
4078 if ((auto_inc_opt == 1 && sets_cc0_p (PATTERN (v->insn)))
4079 || (auto_inc_opt == -1
4080 && (prev = prev_nonnote_insn (v->insn)) != 0
4081 && GET_RTX_CLASS (GET_CODE (prev)) == 'i'
4082 && sets_cc0_p (PATTERN (prev))))
4088 v->auto_inc_opt = 1;
4092 /* For each place where the biv is incremented, add an insn
4093 to increment the new, reduced reg for the giv. */
4094 for (tv = bl->biv; tv; tv = tv->next_iv)
4099 insert_before = tv->insn;
4100 else if (auto_inc_opt == 1)
4101 insert_before = NEXT_INSN (v->insn);
4103 insert_before = v->insn;
4105 if (tv->mult_val == const1_rtx)
4106 emit_iv_add_mult (tv->add_val, v->mult_val,
4107 v->new_reg, v->new_reg, insert_before);
4108 else /* tv->mult_val == const0_rtx */
4109 /* A multiply is acceptable here
4110 since this is presumed to be seldom executed. */
4111 emit_iv_add_mult (tv->add_val, v->mult_val,
4112 v->add_val, v->new_reg, insert_before);
4115 /* Add code at loop start to initialize giv's reduced reg. */
4117 emit_iv_add_mult (bl->initial_value, v->mult_val,
4118 v->add_val, v->new_reg, loop_start);
4122 /* Rescan all givs. If a giv is the same as a giv not reduced, mark it
4125 For each giv register that can be reduced now: if replaceable,
4126 substitute reduced reg wherever the old giv occurs;
4127 else add new move insn "giv_reg = reduced_reg".
4129 Also check for givs whose first use is their definition and whose
4130 last use is the definition of another giv. If so, it is likely
4131 dead and should not be used to eliminate a biv. */
4132 for (v = bl->giv; v; v = v->next_iv)
4134 if (v->same && v->same->ignore)
4140 if (v->giv_type == DEST_REG
4141 && REGNO_FIRST_UID (REGNO (v->dest_reg)) == INSN_UID (v->insn))
4143 struct induction *v1;
4145 for (v1 = bl->giv; v1; v1 = v1->next_iv)
4146 if (REGNO_LAST_UID (REGNO (v->dest_reg)) == INSN_UID (v1->insn))
4150 /* Update expression if this was combined, in case other giv was
4153 v->new_reg = replace_rtx (v->new_reg,
4154 v->same->dest_reg, v->same->new_reg);
4156 if (v->giv_type == DEST_ADDR)
4157 /* Store reduced reg as the address in the memref where we found
4159 validate_change (v->insn, v->location, v->new_reg, 0);
4160 else if (v->replaceable)
4162 reg_map[REGNO (v->dest_reg)] = v->new_reg;
4165 /* I can no longer duplicate the original problem. Perhaps
4166 this is unnecessary now? */
4168 /* Replaceable; it isn't strictly necessary to delete the old
4169 insn and emit a new one, because v->dest_reg is now dead.
4171 However, especially when unrolling loops, the special
4172 handling for (set REG0 REG1) in the second cse pass may
4173 make v->dest_reg live again. To avoid this problem, emit
4174 an insn to set the original giv reg from the reduced giv.
4175 We can not delete the original insn, since it may be part
4176 of a LIBCALL, and the code in flow that eliminates dead
4177 libcalls will fail if it is deleted. */
4178 emit_insn_after (gen_move_insn (v->dest_reg, v->new_reg),
4184 /* Not replaceable; emit an insn to set the original giv reg from
4185 the reduced giv, same as above. */
4186 emit_insn_after (gen_move_insn (v->dest_reg, v->new_reg),
4190 /* When a loop is reversed, givs which depend on the reversed
4191 biv, and which are live outside the loop, must be set to their
4192 correct final value. This insn is only needed if the giv is
4193 not replaceable. The correct final value is the same as the
4194 value that the giv starts the reversed loop with. */
4195 if (bl->reversed && ! v->replaceable)
4196 emit_iv_add_mult (bl->initial_value, v->mult_val,
4197 v->add_val, v->dest_reg, end_insert_before);
4198 else if (v->final_value)
4202 /* If the loop has multiple exits, emit the insn before the
4203 loop to ensure that it will always be executed no matter
4204 how the loop exits. Otherwise, emit the insn after the loop,
4205 since this is slightly more efficient. */
4206 if (loop_number_exit_count[uid_loop_num[INSN_UID (loop_start)]])
4207 insert_before = loop_start;
4209 insert_before = end_insert_before;
4210 emit_insn_before (gen_move_insn (v->dest_reg, v->final_value),
4214 /* If the insn to set the final value of the giv was emitted
4215 before the loop, then we must delete the insn inside the loop
4216 that sets it. If this is a LIBCALL, then we must delete
4217 every insn in the libcall. Note, however, that
4218 final_giv_value will only succeed when there are multiple
4219 exits if the giv is dead at each exit, hence it does not
4220 matter that the original insn remains because it is dead
4222 /* Delete the insn inside the loop that sets the giv since
4223 the giv is now set before (or after) the loop. */
4224 delete_insn (v->insn);
4228 if (loop_dump_stream)
4230 fprintf (loop_dump_stream, "giv at %d reduced to ",
4231 INSN_UID (v->insn));
4232 print_rtl (loop_dump_stream, v->new_reg);
4233 fprintf (loop_dump_stream, "\n");
4237 /* All the givs based on the biv bl have been reduced if they
4240 /* For each giv not marked as maybe dead that has been combined with a
4241 second giv, clear any "maybe dead" mark on that second giv.
4242 v->new_reg will either be or refer to the register of the giv it
4245 Doing this clearing avoids problems in biv elimination where a
4246 giv's new_reg is a complex value that can't be put in the insn but
4247 the giv combined with (with a reg as new_reg) is marked maybe_dead.
4248 Since the register will be used in either case, we'd prefer it be
4249 used from the simpler giv. */
4251 for (v = bl->giv; v; v = v->next_iv)
4252 if (! v->maybe_dead && v->same)
4253 v->same->maybe_dead = 0;
4255 /* Try to eliminate the biv, if it is a candidate.
4256 This won't work if ! all_reduced,
4257 since the givs we planned to use might not have been reduced.
4259 We have to be careful that we didn't initially think we could eliminate
4260 this biv because of a giv that we now think may be dead and shouldn't
4261 be used as a biv replacement.
4263 Also, there is the possibility that we may have a giv that looks
4264 like it can be used to eliminate a biv, but the resulting insn
4265 isn't valid. This can happen, for example, on the 88k, where a
4266 JUMP_INSN can compare a register only with zero. Attempts to
4267 replace it with a compare with a constant will fail.
4269 Note that in cases where this call fails, we may have replaced some
4270 of the occurrences of the biv with a giv, but no harm was done in
4271 doing so in the rare cases where it can occur. */
4273 if (all_reduced == 1 && bl->eliminable
4274 && maybe_eliminate_biv (bl, loop_start, end, 1,
4275 threshold, insn_count))
4278 /* ?? If we created a new test to bypass the loop entirely,
4279 or otherwise drop straight in, based on this test, then
4280 we might want to rewrite it also. This way some later
4281 pass has more hope of removing the initialization of this
4284 /* If final_value != 0, then the biv may be used after loop end
4285 and we must emit an insn to set it just in case.
4287 Reversed bivs already have an insn after the loop setting their
4288 value, so we don't need another one. We can't calculate the
4289 proper final value for such a biv here anyways. */
4290 if (final_value != 0 && ! bl->reversed)
4294 /* If the loop has multiple exits, emit the insn before the
4295 loop to ensure that it will always be executed no matter
4296 how the loop exits. Otherwise, emit the insn after the
4297 loop, since this is slightly more efficient. */
4298 if (loop_number_exit_count[uid_loop_num[INSN_UID (loop_start)]])
4299 insert_before = loop_start;
4301 insert_before = end_insert_before;
4303 emit_insn_before (gen_move_insn (bl->biv->dest_reg, final_value),
4308 /* Delete all of the instructions inside the loop which set
4309 the biv, as they are all dead. If is safe to delete them,
4310 because an insn setting a biv will never be part of a libcall. */
4311 /* However, deleting them will invalidate the regno_last_uid info,
4312 so keeping them around is more convenient. Final_biv_value
4313 will only succeed when there are multiple exits if the biv
4314 is dead at each exit, hence it does not matter that the original
4315 insn remains, because it is dead anyways. */
4316 for (v = bl->biv; v; v = v->next_iv)
4317 delete_insn (v->insn);
4320 if (loop_dump_stream)
4321 fprintf (loop_dump_stream, "Reg %d: biv eliminated\n",
4326 /* Go through all the instructions in the loop, making all the
4327 register substitutions scheduled in REG_MAP. */
4329 for (p = loop_start; p != end; p = NEXT_INSN (p))
4330 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
4331 || GET_CODE (p) == CALL_INSN)
4333 replace_regs (PATTERN (p), reg_map, max_reg_before_loop, 0);
4334 replace_regs (REG_NOTES (p), reg_map, max_reg_before_loop, 0);
4338 /* Unroll loops from within strength reduction so that we can use the
4339 induction variable information that strength_reduce has already
4342 if (flag_unroll_loops)
4343 unroll_loop (loop_end, insn_count, loop_start, end_insert_before, 1);
4346 /* instrument the loop with bct insn */
4347 #ifdef HAVE_decrement_and_branch_on_count
4348 if (HAVE_decrement_and_branch_on_count)
4349 insert_bct (loop_start, loop_end);
4353 if (loop_dump_stream)
4354 fprintf (loop_dump_stream, "\n");
4357 /* Return 1 if X is a valid source for an initial value (or as value being
4358 compared against in an initial test).
4360 X must be either a register or constant and must not be clobbered between
4361 the current insn and the start of the loop.
4363 INSN is the insn containing X. */
4366 valid_initial_value_p (x, insn, call_seen, loop_start)
4375 /* Only consider pseudos we know about initialized in insns whose luids
4377 if (GET_CODE (x) != REG
4378 || REGNO (x) >= max_reg_before_loop)
4381 /* Don't use call-clobbered registers across a call which clobbers it. On
4382 some machines, don't use any hard registers at all. */
4383 if (REGNO (x) < FIRST_PSEUDO_REGISTER
4385 #ifdef SMALL_REGISTER_CLASSES
4386 SMALL_REGISTER_CLASSES
4390 || (call_used_regs[REGNO (x)] && call_seen))
4394 /* Don't use registers that have been clobbered before the start of the
4396 if (reg_set_between_p (x, insn, loop_start))
4402 /* Scan X for memory refs and check each memory address
4403 as a possible giv. INSN is the insn whose pattern X comes from.
4404 NOT_EVERY_ITERATION is 1 if the insn might not be executed during
4405 every loop iteration. */
4408 find_mem_givs (x, insn, not_every_iteration, loop_start, loop_end)
4411 int not_every_iteration;
4412 rtx loop_start, loop_end;
4415 register enum rtx_code code;
4421 code = GET_CODE (x);
4445 benefit = general_induction_var (XEXP (x, 0),
4446 &src_reg, &add_val, &mult_val);
4448 /* Don't make a DEST_ADDR giv with mult_val == 1 && add_val == 0.
4449 Such a giv isn't useful. */
4450 if (benefit > 0 && (mult_val != const1_rtx || add_val != const0_rtx))
4452 /* Found one; record it. */
4454 = (struct induction *) oballoc (sizeof (struct induction));
4456 record_giv (v, insn, src_reg, addr_placeholder, mult_val,
4457 add_val, benefit, DEST_ADDR, not_every_iteration,
4458 &XEXP (x, 0), loop_start, loop_end);
4460 v->mem_mode = GET_MODE (x);
4466 /* Recursively scan the subexpressions for other mem refs. */
4468 fmt = GET_RTX_FORMAT (code);
4469 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4471 find_mem_givs (XEXP (x, i), insn, not_every_iteration, loop_start,
4473 else if (fmt[i] == 'E')
4474 for (j = 0; j < XVECLEN (x, i); j++)
4475 find_mem_givs (XVECEXP (x, i, j), insn, not_every_iteration,
4476 loop_start, loop_end);
4479 /* Fill in the data about one biv update.
4480 V is the `struct induction' in which we record the biv. (It is
4481 allocated by the caller, with alloca.)
4482 INSN is the insn that sets it.
4483 DEST_REG is the biv's reg.
4485 MULT_VAL is const1_rtx if the biv is being incremented here, in which case
4486 INC_VAL is the increment. Otherwise, MULT_VAL is const0_rtx and the biv is
4487 being set to INC_VAL.
4489 NOT_EVERY_ITERATION is nonzero if this biv update is not know to be
4490 executed every iteration; MAYBE_MULTIPLE is nonzero if this biv update
4491 can be executed more than once per iteration. If MAYBE_MULTIPLE
4492 and NOT_EVERY_ITERATION are both zero, we know that the biv update is
4493 executed exactly once per iteration. */
4496 record_biv (v, insn, dest_reg, inc_val, mult_val,
4497 not_every_iteration, maybe_multiple)
4498 struct induction *v;
4503 int not_every_iteration;
4506 struct iv_class *bl;
4509 v->src_reg = dest_reg;
4510 v->dest_reg = dest_reg;
4511 v->mult_val = mult_val;
4512 v->add_val = inc_val;
4513 v->mode = GET_MODE (dest_reg);
4514 v->always_computable = ! not_every_iteration;
4515 v->always_executed = ! not_every_iteration;
4516 v->maybe_multiple = maybe_multiple;
4518 /* Add this to the reg's iv_class, creating a class
4519 if this is the first incrementation of the reg. */
4521 bl = reg_biv_class[REGNO (dest_reg)];
4524 /* Create and initialize new iv_class. */
4526 bl = (struct iv_class *) oballoc (sizeof (struct iv_class));
4528 bl->regno = REGNO (dest_reg);
4534 /* Set initial value to the reg itself. */
4535 bl->initial_value = dest_reg;
4536 /* We haven't seen the initializing insn yet */
4539 bl->initial_test = 0;
4540 bl->incremented = 0;
4544 bl->total_benefit = 0;
4546 /* Add this class to loop_iv_list. */
4547 bl->next = loop_iv_list;
4550 /* Put it in the array of biv register classes. */
4551 reg_biv_class[REGNO (dest_reg)] = bl;
4554 /* Update IV_CLASS entry for this biv. */
4555 v->next_iv = bl->biv;
4558 if (mult_val == const1_rtx)
4559 bl->incremented = 1;
4561 if (loop_dump_stream)
4563 fprintf (loop_dump_stream,
4564 "Insn %d: possible biv, reg %d,",
4565 INSN_UID (insn), REGNO (dest_reg));
4566 if (GET_CODE (inc_val) == CONST_INT)
4567 fprintf (loop_dump_stream, " const = %d\n",
4571 fprintf (loop_dump_stream, " const = ");
4572 print_rtl (loop_dump_stream, inc_val);
4573 fprintf (loop_dump_stream, "\n");
4578 /* Fill in the data about one giv.
4579 V is the `struct induction' in which we record the giv. (It is
4580 allocated by the caller, with alloca.)
4581 INSN is the insn that sets it.
4582 BENEFIT estimates the savings from deleting this insn.
4583 TYPE is DEST_REG or DEST_ADDR; it says whether the giv is computed
4584 into a register or is used as a memory address.
4586 SRC_REG is the biv reg which the giv is computed from.
4587 DEST_REG is the giv's reg (if the giv is stored in a reg).
4588 MULT_VAL and ADD_VAL are the coefficients used to compute the giv.
4589 LOCATION points to the place where this giv's value appears in INSN. */
4592 record_giv (v, insn, src_reg, dest_reg, mult_val, add_val, benefit,
4593 type, not_every_iteration, location, loop_start, loop_end)
4594 struct induction *v;
4598 rtx mult_val, add_val;
4601 int not_every_iteration;
4603 rtx loop_start, loop_end;
4605 struct induction *b;
4606 struct iv_class *bl;
4607 rtx set = single_set (insn);
4611 v->src_reg = src_reg;
4613 v->dest_reg = dest_reg;
4614 v->mult_val = mult_val;
4615 v->add_val = add_val;
4616 v->benefit = benefit;
4617 v->location = location;
4619 v->combined_with = 0;
4620 v->maybe_multiple = 0;
4622 v->derive_adjustment = 0;
4628 v->auto_inc_opt = 0;
4632 /* The v->always_computable field is used in update_giv_derive, to
4633 determine whether a giv can be used to derive another giv. For a
4634 DEST_REG giv, INSN computes a new value for the giv, so its value
4635 isn't computable if INSN insn't executed every iteration.
4636 However, for a DEST_ADDR giv, INSN merely uses the value of the giv;
4637 it does not compute a new value. Hence the value is always computable
4638 regardless of whether INSN is executed each iteration. */
4640 if (type == DEST_ADDR)
4641 v->always_computable = 1;
4643 v->always_computable = ! not_every_iteration;
4645 v->always_executed = ! not_every_iteration;
4647 if (type == DEST_ADDR)
4649 v->mode = GET_MODE (*location);
4653 else /* type == DEST_REG */
4655 v->mode = GET_MODE (SET_DEST (set));
4657 v->lifetime = (uid_luid[REGNO_LAST_UID (REGNO (dest_reg))]
4658 - uid_luid[REGNO_FIRST_UID (REGNO (dest_reg))]);
4660 v->times_used = n_times_used[REGNO (dest_reg)];
4662 /* If the lifetime is zero, it means that this register is
4663 really a dead store. So mark this as a giv that can be
4664 ignored. This will not prevent the biv from being eliminated. */
4665 if (v->lifetime == 0)
4668 reg_iv_type[REGNO (dest_reg)] = GENERAL_INDUCT;
4669 reg_iv_info[REGNO (dest_reg)] = v;
4672 /* Add the giv to the class of givs computed from one biv. */
4674 bl = reg_biv_class[REGNO (src_reg)];
4677 v->next_iv = bl->giv;
4679 /* Don't count DEST_ADDR. This is supposed to count the number of
4680 insns that calculate givs. */
4681 if (type == DEST_REG)
4683 bl->total_benefit += benefit;
4686 /* Fatal error, biv missing for this giv? */
4689 if (type == DEST_ADDR)
4693 /* The giv can be replaced outright by the reduced register only if all
4694 of the following conditions are true:
4695 - the insn that sets the giv is always executed on any iteration
4696 on which the giv is used at all
4697 (there are two ways to deduce this:
4698 either the insn is executed on every iteration,
4699 or all uses follow that insn in the same basic block),
4700 - the giv is not used outside the loop
4701 - no assignments to the biv occur during the giv's lifetime. */
4703 if (REGNO_FIRST_UID (REGNO (dest_reg)) == INSN_UID (insn)
4704 /* Previous line always fails if INSN was moved by loop opt. */
4705 && uid_luid[REGNO_LAST_UID (REGNO (dest_reg))] < INSN_LUID (loop_end)
4706 && (! not_every_iteration
4707 || last_use_this_basic_block (dest_reg, insn)))
4709 /* Now check that there are no assignments to the biv within the
4710 giv's lifetime. This requires two separate checks. */
4712 /* Check each biv update, and fail if any are between the first
4713 and last use of the giv.
4715 If this loop contains an inner loop that was unrolled, then
4716 the insn modifying the biv may have been emitted by the loop
4717 unrolling code, and hence does not have a valid luid. Just
4718 mark the biv as not replaceable in this case. It is not very
4719 useful as a biv, because it is used in two different loops.
4720 It is very unlikely that we would be able to optimize the giv
4721 using this biv anyways. */
4724 for (b = bl->biv; b; b = b->next_iv)
4726 if (INSN_UID (b->insn) >= max_uid_for_loop
4727 || ((uid_luid[INSN_UID (b->insn)]
4728 >= uid_luid[REGNO_FIRST_UID (REGNO (dest_reg))])
4729 && (uid_luid[INSN_UID (b->insn)]
4730 <= uid_luid[REGNO_LAST_UID (REGNO (dest_reg))])))
4733 v->not_replaceable = 1;
4738 /* If there are any backwards branches that go from after the
4739 biv update to before it, then this giv is not replaceable. */
4741 for (b = bl->biv; b; b = b->next_iv)
4742 if (back_branch_in_range_p (b->insn, loop_start, loop_end))
4745 v->not_replaceable = 1;
4751 /* May still be replaceable, we don't have enough info here to
4754 v->not_replaceable = 0;
4758 if (loop_dump_stream)
4760 if (type == DEST_REG)
4761 fprintf (loop_dump_stream, "Insn %d: giv reg %d",
4762 INSN_UID (insn), REGNO (dest_reg));
4764 fprintf (loop_dump_stream, "Insn %d: dest address",
4767 fprintf (loop_dump_stream, " src reg %d benefit %d",
4768 REGNO (src_reg), v->benefit);
4769 fprintf (loop_dump_stream, " used %d lifetime %d",
4770 v->times_used, v->lifetime);
4773 fprintf (loop_dump_stream, " replaceable");
4775 if (GET_CODE (mult_val) == CONST_INT)
4776 fprintf (loop_dump_stream, " mult %d",
4780 fprintf (loop_dump_stream, " mult ");
4781 print_rtl (loop_dump_stream, mult_val);
4784 if (GET_CODE (add_val) == CONST_INT)
4785 fprintf (loop_dump_stream, " add %d",
4789 fprintf (loop_dump_stream, " add ");
4790 print_rtl (loop_dump_stream, add_val);
4794 if (loop_dump_stream)
4795 fprintf (loop_dump_stream, "\n");
4800 /* All this does is determine whether a giv can be made replaceable because
4801 its final value can be calculated. This code can not be part of record_giv
4802 above, because final_giv_value requires that the number of loop iterations
4803 be known, and that can not be accurately calculated until after all givs
4804 have been identified. */
4807 check_final_value (v, loop_start, loop_end)
4808 struct induction *v;
4809 rtx loop_start, loop_end;
4811 struct iv_class *bl;
4812 rtx final_value = 0;
4814 bl = reg_biv_class[REGNO (v->src_reg)];
4816 /* DEST_ADDR givs will never reach here, because they are always marked
4817 replaceable above in record_giv. */
4819 /* The giv can be replaced outright by the reduced register only if all
4820 of the following conditions are true:
4821 - the insn that sets the giv is always executed on any iteration
4822 on which the giv is used at all
4823 (there are two ways to deduce this:
4824 either the insn is executed on every iteration,
4825 or all uses follow that insn in the same basic block),
4826 - its final value can be calculated (this condition is different
4827 than the one above in record_giv)
4828 - no assignments to the biv occur during the giv's lifetime. */
4831 /* This is only called now when replaceable is known to be false. */
4832 /* Clear replaceable, so that it won't confuse final_giv_value. */
4836 if ((final_value = final_giv_value (v, loop_start, loop_end))
4837 && (v->always_computable || last_use_this_basic_block (v->dest_reg, v->insn)))
4839 int biv_increment_seen = 0;
4845 /* When trying to determine whether or not a biv increment occurs
4846 during the lifetime of the giv, we can ignore uses of the variable
4847 outside the loop because final_value is true. Hence we can not
4848 use regno_last_uid and regno_first_uid as above in record_giv. */
4850 /* Search the loop to determine whether any assignments to the
4851 biv occur during the giv's lifetime. Start with the insn
4852 that sets the giv, and search around the loop until we come
4853 back to that insn again.
4855 Also fail if there is a jump within the giv's lifetime that jumps
4856 to somewhere outside the lifetime but still within the loop. This
4857 catches spaghetti code where the execution order is not linear, and
4858 hence the above test fails. Here we assume that the giv lifetime
4859 does not extend from one iteration of the loop to the next, so as
4860 to make the test easier. Since the lifetime isn't known yet,
4861 this requires two loops. See also record_giv above. */
4863 last_giv_use = v->insn;
4869 p = NEXT_INSN (loop_start);
4873 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
4874 || GET_CODE (p) == CALL_INSN)
4876 if (biv_increment_seen)
4878 if (reg_mentioned_p (v->dest_reg, PATTERN (p)))
4881 v->not_replaceable = 1;
4885 else if (reg_set_p (v->src_reg, PATTERN (p)))
4886 biv_increment_seen = 1;
4887 else if (reg_mentioned_p (v->dest_reg, PATTERN (p)))
4892 /* Now that the lifetime of the giv is known, check for branches
4893 from within the lifetime to outside the lifetime if it is still
4903 p = NEXT_INSN (loop_start);
4904 if (p == last_giv_use)
4907 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p)
4908 && LABEL_NAME (JUMP_LABEL (p))
4909 && ((INSN_UID (JUMP_LABEL (p)) >= max_uid_for_loop)
4910 || (INSN_UID (v->insn) >= max_uid_for_loop)
4911 || (INSN_UID (last_giv_use) >= max_uid_for_loop)
4912 || (INSN_LUID (JUMP_LABEL (p)) < INSN_LUID (v->insn)
4913 && INSN_LUID (JUMP_LABEL (p)) > INSN_LUID (loop_start))
4914 || (INSN_LUID (JUMP_LABEL (p)) > INSN_LUID (last_giv_use)
4915 && INSN_LUID (JUMP_LABEL (p)) < INSN_LUID (loop_end))))
4918 v->not_replaceable = 1;
4920 if (loop_dump_stream)
4921 fprintf (loop_dump_stream,
4922 "Found branch outside giv lifetime.\n");
4929 /* If it is replaceable, then save the final value. */
4931 v->final_value = final_value;
4934 if (loop_dump_stream && v->replaceable)
4935 fprintf (loop_dump_stream, "Insn %d: giv reg %d final_value replaceable\n",
4936 INSN_UID (v->insn), REGNO (v->dest_reg));
4939 /* Update the status of whether a giv can derive other givs.
4941 We need to do something special if there is or may be an update to the biv
4942 between the time the giv is defined and the time it is used to derive
4945 In addition, a giv that is only conditionally set is not allowed to
4946 derive another giv once a label has been passed.
4948 The cases we look at are when a label or an update to a biv is passed. */
4951 update_giv_derive (p)
4954 struct iv_class *bl;
4955 struct induction *biv, *giv;
4959 /* Search all IV classes, then all bivs, and finally all givs.
4961 There are three cases we are concerned with. First we have the situation
4962 of a giv that is only updated conditionally. In that case, it may not
4963 derive any givs after a label is passed.
4965 The second case is when a biv update occurs, or may occur, after the
4966 definition of a giv. For certain biv updates (see below) that are
4967 known to occur between the giv definition and use, we can adjust the
4968 giv definition. For others, or when the biv update is conditional,
4969 we must prevent the giv from deriving any other givs. There are two
4970 sub-cases within this case.
4972 If this is a label, we are concerned with any biv update that is done
4973 conditionally, since it may be done after the giv is defined followed by
4974 a branch here (actually, we need to pass both a jump and a label, but
4975 this extra tracking doesn't seem worth it).
4977 If this is a jump, we are concerned about any biv update that may be
4978 executed multiple times. We are actually only concerned about
4979 backward jumps, but it is probably not worth performing the test
4980 on the jump again here.
4982 If this is a biv update, we must adjust the giv status to show that a
4983 subsequent biv update was performed. If this adjustment cannot be done,
4984 the giv cannot derive further givs. */
4986 for (bl = loop_iv_list; bl; bl = bl->next)
4987 for (biv = bl->biv; biv; biv = biv->next_iv)
4988 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN
4991 for (giv = bl->giv; giv; giv = giv->next_iv)
4993 /* If cant_derive is already true, there is no point in
4994 checking all of these conditions again. */
4995 if (giv->cant_derive)
4998 /* If this giv is conditionally set and we have passed a label,
4999 it cannot derive anything. */
5000 if (GET_CODE (p) == CODE_LABEL && ! giv->always_computable)
5001 giv->cant_derive = 1;
5003 /* Skip givs that have mult_val == 0, since
5004 they are really invariants. Also skip those that are
5005 replaceable, since we know their lifetime doesn't contain
5007 else if (giv->mult_val == const0_rtx || giv->replaceable)
5010 /* The only way we can allow this giv to derive another
5011 is if this is a biv increment and we can form the product
5012 of biv->add_val and giv->mult_val. In this case, we will
5013 be able to compute a compensation. */
5014 else if (biv->insn == p)
5018 if (biv->mult_val == const1_rtx)
5019 tem = simplify_giv_expr (gen_rtx (MULT, giv->mode,
5024 if (tem && giv->derive_adjustment)
5025 tem = simplify_giv_expr (gen_rtx (PLUS, giv->mode, tem,
5026 giv->derive_adjustment),
5029 giv->derive_adjustment = tem;
5031 giv->cant_derive = 1;
5033 else if ((GET_CODE (p) == CODE_LABEL && ! biv->always_computable)
5034 || (GET_CODE (p) == JUMP_INSN && biv->maybe_multiple))
5035 giv->cant_derive = 1;
5040 /* Check whether an insn is an increment legitimate for a basic induction var.
5041 X is the source of insn P, or a part of it.
5042 MODE is the mode in which X should be interpreted.
5044 DEST_REG is the putative biv, also the destination of the insn.
5045 We accept patterns of these forms:
5046 REG = REG + INVARIANT (includes REG = REG - CONSTANT)
5047 REG = INVARIANT + REG
5049 If X is suitable, we return 1, set *MULT_VAL to CONST1_RTX,
5050 and store the additive term into *INC_VAL.
5052 If X is an assignment of an invariant into DEST_REG, we set
5053 *MULT_VAL to CONST0_RTX, and store the invariant into *INC_VAL.
5055 We also want to detect a BIV when it corresponds to a variable
5056 whose mode was promoted via PROMOTED_MODE. In that case, an increment
5057 of the variable may be a PLUS that adds a SUBREG of that variable to
5058 an invariant and then sign- or zero-extends the result of the PLUS
5061 Most GIVs in such cases will be in the promoted mode, since that is the
5062 probably the natural computation mode (and almost certainly the mode
5063 used for addresses) on the machine. So we view the pseudo-reg containing
5064 the variable as the BIV, as if it were simply incremented.
5066 Note that treating the entire pseudo as a BIV will result in making
5067 simple increments to any GIVs based on it. However, if the variable
5068 overflows in its declared mode but not its promoted mode, the result will
5069 be incorrect. This is acceptable if the variable is signed, since
5070 overflows in such cases are undefined, but not if it is unsigned, since
5071 those overflows are defined. So we only check for SIGN_EXTEND and
5074 If we cannot find a biv, we return 0. */
5077 basic_induction_var (x, mode, dest_reg, p, inc_val, mult_val)
5079 enum machine_mode mode;
5085 register enum rtx_code code;
5089 code = GET_CODE (x);
5093 if (XEXP (x, 0) == dest_reg
5094 || (GET_CODE (XEXP (x, 0)) == SUBREG
5095 && SUBREG_PROMOTED_VAR_P (XEXP (x, 0))
5096 && SUBREG_REG (XEXP (x, 0)) == dest_reg))
5098 else if (XEXP (x, 1) == dest_reg
5099 || (GET_CODE (XEXP (x, 1)) == SUBREG
5100 && SUBREG_PROMOTED_VAR_P (XEXP (x, 1))
5101 && SUBREG_REG (XEXP (x, 1)) == dest_reg))
5106 if (invariant_p (arg) != 1)
5109 *inc_val = convert_modes (GET_MODE (dest_reg), GET_MODE (x), arg, 0);
5110 *mult_val = const1_rtx;
5114 /* If this is a SUBREG for a promoted variable, check the inner
5116 if (SUBREG_PROMOTED_VAR_P (x))
5117 return basic_induction_var (SUBREG_REG (x), GET_MODE (SUBREG_REG (x)),
5118 dest_reg, p, inc_val, mult_val);
5122 /* If this register is assigned in the previous insn, look at its
5123 source, but don't go outside the loop or past a label. */
5125 for (insn = PREV_INSN (p);
5126 (insn && GET_CODE (insn) == NOTE
5127 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG);
5128 insn = PREV_INSN (insn))
5132 set = single_set (insn);
5135 && (SET_DEST (set) == x
5136 || (GET_CODE (SET_DEST (set)) == SUBREG
5137 && (GET_MODE_SIZE (GET_MODE (SET_DEST (set)))
5139 && SUBREG_REG (SET_DEST (set)) == x)))
5140 return basic_induction_var (SET_SRC (set),
5141 (GET_MODE (SET_SRC (set)) == VOIDmode
5143 : GET_MODE (SET_SRC (set))),
5146 /* ... fall through ... */
5148 /* Can accept constant setting of biv only when inside inner most loop.
5149 Otherwise, a biv of an inner loop may be incorrectly recognized
5150 as a biv of the outer loop,
5151 causing code to be moved INTO the inner loop. */
5153 if (invariant_p (x) != 1)
5158 if (loops_enclosed == 1)
5160 /* Possible bug here? Perhaps we don't know the mode of X. */
5161 *inc_val = convert_modes (GET_MODE (dest_reg), mode, x, 0);
5162 *mult_val = const0_rtx;
5169 return basic_induction_var (XEXP (x, 0), GET_MODE (XEXP (x, 0)),
5170 dest_reg, p, inc_val, mult_val);
5172 /* Similar, since this can be a sign extension. */
5173 for (insn = PREV_INSN (p);
5174 (insn && GET_CODE (insn) == NOTE
5175 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG);
5176 insn = PREV_INSN (insn))
5180 set = single_set (insn);
5182 if (set && SET_DEST (set) == XEXP (x, 0)
5183 && GET_CODE (XEXP (x, 1)) == CONST_INT
5184 && INTVAL (XEXP (x, 1)) >= 0
5185 && GET_CODE (SET_SRC (set)) == ASHIFT
5186 && XEXP (x, 1) == XEXP (SET_SRC (set), 1))
5187 return basic_induction_var (XEXP (SET_SRC (set), 0),
5188 GET_MODE (XEXP (x, 0)),
5189 dest_reg, insn, inc_val, mult_val);
5197 /* A general induction variable (giv) is any quantity that is a linear
5198 function of a basic induction variable,
5199 i.e. giv = biv * mult_val + add_val.
5200 The coefficients can be any loop invariant quantity.
5201 A giv need not be computed directly from the biv;
5202 it can be computed by way of other givs. */
5204 /* Determine whether X computes a giv.
5205 If it does, return a nonzero value
5206 which is the benefit from eliminating the computation of X;
5207 set *SRC_REG to the register of the biv that it is computed from;
5208 set *ADD_VAL and *MULT_VAL to the coefficients,
5209 such that the value of X is biv * mult + add; */
5212 general_induction_var (x, src_reg, add_val, mult_val)
5222 /* If this is an invariant, forget it, it isn't a giv. */
5223 if (invariant_p (x) == 1)
5226 /* See if the expression could be a giv and get its form.
5227 Mark our place on the obstack in case we don't find a giv. */
5228 storage = (char *) oballoc (0);
5229 x = simplify_giv_expr (x, &benefit);
5236 switch (GET_CODE (x))
5240 /* Since this is now an invariant and wasn't before, it must be a giv
5241 with MULT_VAL == 0. It doesn't matter which BIV we associate this
5243 *src_reg = loop_iv_list->biv->dest_reg;
5244 *mult_val = const0_rtx;
5249 /* This is equivalent to a BIV. */
5251 *mult_val = const1_rtx;
5252 *add_val = const0_rtx;
5256 /* Either (plus (biv) (invar)) or
5257 (plus (mult (biv) (invar_1)) (invar_2)). */
5258 if (GET_CODE (XEXP (x, 0)) == MULT)
5260 *src_reg = XEXP (XEXP (x, 0), 0);
5261 *mult_val = XEXP (XEXP (x, 0), 1);
5265 *src_reg = XEXP (x, 0);
5266 *mult_val = const1_rtx;
5268 *add_val = XEXP (x, 1);
5272 /* ADD_VAL is zero. */
5273 *src_reg = XEXP (x, 0);
5274 *mult_val = XEXP (x, 1);
5275 *add_val = const0_rtx;
5282 /* Remove any enclosing USE from ADD_VAL and MULT_VAL (there will be
5283 unless they are CONST_INT). */
5284 if (GET_CODE (*add_val) == USE)
5285 *add_val = XEXP (*add_val, 0);
5286 if (GET_CODE (*mult_val) == USE)
5287 *mult_val = XEXP (*mult_val, 0);
5289 benefit += rtx_cost (orig_x, SET);
5291 /* Always return some benefit if this is a giv so it will be detected
5292 as such. This allows elimination of bivs that might otherwise
5293 not be eliminated. */
5294 return benefit == 0 ? 1 : benefit;
5297 /* Given an expression, X, try to form it as a linear function of a biv.
5298 We will canonicalize it to be of the form
5299 (plus (mult (BIV) (invar_1))
5301 with possible degeneracies.
5303 The invariant expressions must each be of a form that can be used as a
5304 machine operand. We surround then with a USE rtx (a hack, but localized
5305 and certainly unambiguous!) if not a CONST_INT for simplicity in this
5306 routine; it is the caller's responsibility to strip them.
5308 If no such canonicalization is possible (i.e., two biv's are used or an
5309 expression that is neither invariant nor a biv or giv), this routine
5312 For a non-zero return, the result will have a code of CONST_INT, USE,
5313 REG (for a BIV), PLUS, or MULT. No other codes will occur.
5315 *BENEFIT will be incremented by the benefit of any sub-giv encountered. */
5318 simplify_giv_expr (x, benefit)
5322 enum machine_mode mode = GET_MODE (x);
5326 /* If this is not an integer mode, or if we cannot do arithmetic in this
5327 mode, this can't be a giv. */
5328 if (mode != VOIDmode
5329 && (GET_MODE_CLASS (mode) != MODE_INT
5330 || GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT))
5333 switch (GET_CODE (x))
5336 arg0 = simplify_giv_expr (XEXP (x, 0), benefit);
5337 arg1 = simplify_giv_expr (XEXP (x, 1), benefit);
5338 if (arg0 == 0 || arg1 == 0)
5341 /* Put constant last, CONST_INT last if both constant. */
5342 if ((GET_CODE (arg0) == USE
5343 || GET_CODE (arg0) == CONST_INT)
5344 && GET_CODE (arg1) != CONST_INT)
5345 tem = arg0, arg0 = arg1, arg1 = tem;
5347 /* Handle addition of zero, then addition of an invariant. */
5348 if (arg1 == const0_rtx)
5350 else if (GET_CODE (arg1) == CONST_INT || GET_CODE (arg1) == USE)
5351 switch (GET_CODE (arg0))
5355 /* Both invariant. Only valid if sum is machine operand.
5356 First strip off possible USE on first operand. */
5357 if (GET_CODE (arg0) == USE)
5358 arg0 = XEXP (arg0, 0);
5361 if (CONSTANT_P (arg0) && GET_CODE (arg1) == CONST_INT)
5363 tem = plus_constant (arg0, INTVAL (arg1));
5364 if (GET_CODE (tem) != CONST_INT)
5365 tem = gen_rtx (USE, mode, tem);
5372 /* biv + invar or mult + invar. Return sum. */
5373 return gen_rtx (PLUS, mode, arg0, arg1);
5376 /* (a + invar_1) + invar_2. Associate. */
5377 return simplify_giv_expr (gen_rtx (PLUS, mode,
5379 gen_rtx (PLUS, mode,
5380 XEXP (arg0, 1), arg1)),
5387 /* Each argument must be either REG, PLUS, or MULT. Convert REG to
5388 MULT to reduce cases. */
5389 if (GET_CODE (arg0) == REG)
5390 arg0 = gen_rtx (MULT, mode, arg0, const1_rtx);
5391 if (GET_CODE (arg1) == REG)
5392 arg1 = gen_rtx (MULT, mode, arg1, const1_rtx);
5394 /* Now have PLUS + PLUS, PLUS + MULT, MULT + PLUS, or MULT + MULT.
5395 Put a MULT first, leaving PLUS + PLUS, MULT + PLUS, or MULT + MULT.
5396 Recurse to associate the second PLUS. */
5397 if (GET_CODE (arg1) == MULT)
5398 tem = arg0, arg0 = arg1, arg1 = tem;
5400 if (GET_CODE (arg1) == PLUS)
5401 return simplify_giv_expr (gen_rtx (PLUS, mode,
5402 gen_rtx (PLUS, mode,
5403 arg0, XEXP (arg1, 0)),
5407 /* Now must have MULT + MULT. Distribute if same biv, else not giv. */
5408 if (GET_CODE (arg0) != MULT || GET_CODE (arg1) != MULT)
5411 if (XEXP (arg0, 0) != XEXP (arg1, 0))
5414 return simplify_giv_expr (gen_rtx (MULT, mode,
5416 gen_rtx (PLUS, mode,
5422 /* Handle "a - b" as "a + b * (-1)". */
5423 return simplify_giv_expr (gen_rtx (PLUS, mode,
5425 gen_rtx (MULT, mode,
5426 XEXP (x, 1), constm1_rtx)),
5430 arg0 = simplify_giv_expr (XEXP (x, 0), benefit);
5431 arg1 = simplify_giv_expr (XEXP (x, 1), benefit);
5432 if (arg0 == 0 || arg1 == 0)
5435 /* Put constant last, CONST_INT last if both constant. */
5436 if ((GET_CODE (arg0) == USE || GET_CODE (arg0) == CONST_INT)
5437 && GET_CODE (arg1) != CONST_INT)
5438 tem = arg0, arg0 = arg1, arg1 = tem;
5440 /* If second argument is not now constant, not giv. */
5441 if (GET_CODE (arg1) != USE && GET_CODE (arg1) != CONST_INT)
5444 /* Handle multiply by 0 or 1. */
5445 if (arg1 == const0_rtx)
5448 else if (arg1 == const1_rtx)
5451 switch (GET_CODE (arg0))
5454 /* biv * invar. Done. */
5455 return gen_rtx (MULT, mode, arg0, arg1);
5458 /* Product of two constants. */
5459 return GEN_INT (INTVAL (arg0) * INTVAL (arg1));
5462 /* invar * invar. Not giv. */
5466 /* (a * invar_1) * invar_2. Associate. */
5467 return simplify_giv_expr (gen_rtx (MULT, mode,
5469 gen_rtx (MULT, mode,
5470 XEXP (arg0, 1), arg1)),
5474 /* (a + invar_1) * invar_2. Distribute. */
5475 return simplify_giv_expr (gen_rtx (PLUS, mode,
5476 gen_rtx (MULT, mode,
5477 XEXP (arg0, 0), arg1),
5478 gen_rtx (MULT, mode,
5479 XEXP (arg0, 1), arg1)),
5487 /* Shift by constant is multiply by power of two. */
5488 if (GET_CODE (XEXP (x, 1)) != CONST_INT)
5491 return simplify_giv_expr (gen_rtx (MULT, mode,
5493 GEN_INT ((HOST_WIDE_INT) 1
5494 << INTVAL (XEXP (x, 1)))),
5498 /* "-a" is "a * (-1)" */
5499 return simplify_giv_expr (gen_rtx (MULT, mode, XEXP (x, 0), constm1_rtx),
5503 /* "~a" is "-a - 1". Silly, but easy. */
5504 return simplify_giv_expr (gen_rtx (MINUS, mode,
5505 gen_rtx (NEG, mode, XEXP (x, 0)),
5510 /* Already in proper form for invariant. */
5514 /* If this is a new register, we can't deal with it. */
5515 if (REGNO (x) >= max_reg_before_loop)
5518 /* Check for biv or giv. */
5519 switch (reg_iv_type[REGNO (x)])
5523 case GENERAL_INDUCT:
5525 struct induction *v = reg_iv_info[REGNO (x)];
5527 /* Form expression from giv and add benefit. Ensure this giv
5528 can derive another and subtract any needed adjustment if so. */
5529 *benefit += v->benefit;
5533 tem = gen_rtx (PLUS, mode, gen_rtx (MULT, mode,
5534 v->src_reg, v->mult_val),
5536 if (v->derive_adjustment)
5537 tem = gen_rtx (MINUS, mode, tem, v->derive_adjustment);
5538 return simplify_giv_expr (tem, benefit);
5542 /* Fall through to general case. */
5544 /* If invariant, return as USE (unless CONST_INT).
5545 Otherwise, not giv. */
5546 if (GET_CODE (x) == USE)
5549 if (invariant_p (x) == 1)
5551 if (GET_CODE (x) == CONST_INT)
5554 return gen_rtx (USE, mode, x);
5561 /* Help detect a giv that is calculated by several consecutive insns;
5565 The caller has already identified the first insn P as having a giv as dest;
5566 we check that all other insns that set the same register follow
5567 immediately after P, that they alter nothing else,
5568 and that the result of the last is still a giv.
5570 The value is 0 if the reg set in P is not really a giv.
5571 Otherwise, the value is the amount gained by eliminating
5572 all the consecutive insns that compute the value.
5574 FIRST_BENEFIT is the amount gained by eliminating the first insn, P.
5575 SRC_REG is the reg of the biv; DEST_REG is the reg of the giv.
5577 The coefficients of the ultimate giv value are stored in
5578 *MULT_VAL and *ADD_VAL. */
5581 consec_sets_giv (first_benefit, p, src_reg, dest_reg,
5596 /* Indicate that this is a giv so that we can update the value produced in
5597 each insn of the multi-insn sequence.
5599 This induction structure will be used only by the call to
5600 general_induction_var below, so we can allocate it on our stack.
5601 If this is a giv, our caller will replace the induct var entry with
5602 a new induction structure. */
5604 = (struct induction *) alloca (sizeof (struct induction));
5605 v->src_reg = src_reg;
5606 v->mult_val = *mult_val;
5607 v->add_val = *add_val;
5608 v->benefit = first_benefit;
5610 v->derive_adjustment = 0;
5612 reg_iv_type[REGNO (dest_reg)] = GENERAL_INDUCT;
5613 reg_iv_info[REGNO (dest_reg)] = v;
5615 count = n_times_set[REGNO (dest_reg)] - 1;
5620 code = GET_CODE (p);
5622 /* If libcall, skip to end of call sequence. */
5623 if (code == INSN && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
5627 && (set = single_set (p))
5628 && GET_CODE (SET_DEST (set)) == REG
5629 && SET_DEST (set) == dest_reg
5630 && ((benefit = general_induction_var (SET_SRC (set), &src_reg,
5632 /* Giv created by equivalent expression. */
5633 || ((temp = find_reg_note (p, REG_EQUAL, NULL_RTX))
5634 && (benefit = general_induction_var (XEXP (temp, 0), &src_reg,
5635 add_val, mult_val))))
5636 && src_reg == v->src_reg)
5638 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
5639 benefit += libcall_benefit (p);
5642 v->mult_val = *mult_val;
5643 v->add_val = *add_val;
5644 v->benefit = benefit;
5646 else if (code != NOTE)
5648 /* Allow insns that set something other than this giv to a
5649 constant. Such insns are needed on machines which cannot
5650 include long constants and should not disqualify a giv. */
5652 && (set = single_set (p))
5653 && SET_DEST (set) != dest_reg
5654 && CONSTANT_P (SET_SRC (set)))
5657 reg_iv_type[REGNO (dest_reg)] = UNKNOWN_INDUCT;
5665 /* Return an rtx, if any, that expresses giv G2 as a function of the register
5666 represented by G1. If no such expression can be found, or it is clear that
5667 it cannot possibly be a valid address, 0 is returned.
5669 To perform the computation, we note that
5672 where `v' is the biv.
5674 So G2 = (c/a) * G1 + (d - b*c/a) */
5678 express_from (g1, g2)
5679 struct induction *g1, *g2;
5683 /* The value that G1 will be multiplied by must be a constant integer. Also,
5684 the only chance we have of getting a valid address is if b*c/a (see above
5685 for notation) is also an integer. */
5686 if (GET_CODE (g1->mult_val) != CONST_INT
5687 || GET_CODE (g2->mult_val) != CONST_INT
5688 || GET_CODE (g1->add_val) != CONST_INT
5689 || g1->mult_val == const0_rtx
5690 || INTVAL (g2->mult_val) % INTVAL (g1->mult_val) != 0)
5693 mult = GEN_INT (INTVAL (g2->mult_val) / INTVAL (g1->mult_val));
5694 add = plus_constant (g2->add_val, - INTVAL (g1->add_val) * INTVAL (mult));
5696 /* Form simplified final result. */
5697 if (mult == const0_rtx)
5699 else if (mult == const1_rtx)
5700 mult = g1->dest_reg;
5702 mult = gen_rtx (MULT, g2->mode, g1->dest_reg, mult);
5704 if (add == const0_rtx)
5707 return gen_rtx (PLUS, g2->mode, mult, add);
5711 /* Return 1 if giv G2 can be combined with G1. This means that G2 can use
5712 (either directly or via an address expression) a register used to represent
5713 G1. Set g2->new_reg to a represtation of G1 (normally just
5717 combine_givs_p (g1, g2)
5718 struct induction *g1, *g2;
5722 /* If these givs are identical, they can be combined. */
5723 if (rtx_equal_p (g1->mult_val, g2->mult_val)
5724 && rtx_equal_p (g1->add_val, g2->add_val))
5726 g2->new_reg = g1->dest_reg;
5731 /* If G2 can be expressed as a function of G1 and that function is valid
5732 as an address and no more expensive than using a register for G2,
5733 the expression of G2 in terms of G1 can be used. */
5734 if (g2->giv_type == DEST_ADDR
5735 && (tem = express_from (g1, g2)) != 0
5736 && memory_address_p (g2->mem_mode, tem)
5737 && ADDRESS_COST (tem) <= ADDRESS_COST (*g2->location))
5747 #ifdef GIV_SORT_CRITERION
5748 /* Compare two givs and sort the most desirable one for combinations first.
5749 This is used only in one qsort call below. */
5753 struct induction **x, **y;
5755 GIV_SORT_CRITERION (*x, *y);
5761 /* Check all pairs of givs for iv_class BL and see if any can be combined with
5762 any other. If so, point SAME to the giv combined with and set NEW_REG to
5763 be an expression (in terms of the other giv's DEST_REG) equivalent to the
5764 giv. Also, update BENEFIT and related fields for cost/benefit analysis. */
5768 struct iv_class *bl;
5770 struct induction *g1, *g2, **giv_array, *temp_iv;
5771 int i, j, giv_count, pass;
5773 /* Count givs, because bl->giv_count is incorrect here. */
5775 for (g1 = bl->giv; g1; g1 = g1->next_iv)
5779 = (struct induction **) alloca (giv_count * sizeof (struct induction *));
5781 for (g1 = bl->giv; g1; g1 = g1->next_iv)
5782 giv_array[i++] = g1;
5784 #ifdef GIV_SORT_CRITERION
5785 /* Sort the givs if GIV_SORT_CRITERION is defined.
5786 This is usually defined for processors which lack
5787 negative register offsets so more givs may be combined. */
5789 if (loop_dump_stream)
5790 fprintf (loop_dump_stream, "%d givs counted, sorting...\n", giv_count);
5792 qsort (giv_array, giv_count, sizeof (struct induction *), giv_sort);
5795 for (i = 0; i < giv_count; i++)
5798 for (pass = 0; pass <= 1; pass++)
5799 for (j = 0; j < giv_count; j++)
5803 /* First try to combine with replaceable givs, then all givs. */
5804 && (g1->replaceable || pass == 1)
5805 /* If either has already been combined or is to be ignored, can't
5807 && ! g1->ignore && ! g2->ignore && ! g1->same && ! g2->same
5808 /* If something has been based on G2, G2 cannot itself be based
5809 on something else. */
5810 && ! g2->combined_with
5811 && combine_givs_p (g1, g2))
5813 /* g2->new_reg set by `combine_givs_p' */
5815 g1->combined_with = 1;
5817 /* If one of these givs is a DEST_REG that was only used
5818 once, by the other giv, this is actually a single use.
5819 The DEST_REG has the correct cost, while the other giv
5820 counts the REG use too often. */
5821 if (g2->giv_type == DEST_REG
5822 && n_times_used[REGNO (g2->dest_reg)] == 1
5823 && reg_mentioned_p (g2->dest_reg, PATTERN (g1->insn)))
5824 g1->benefit = g2->benefit;
5825 else if (g1->giv_type != DEST_REG
5826 || n_times_used[REGNO (g1->dest_reg)] != 1
5827 || ! reg_mentioned_p (g1->dest_reg,
5828 PATTERN (g2->insn)))
5830 g1->benefit += g2->benefit;
5831 g1->times_used += g2->times_used;
5833 /* ??? The new final_[bg]iv_value code does a much better job
5834 of finding replaceable giv's, and hence this code may no
5835 longer be necessary. */
5836 if (! g2->replaceable && REG_USERVAR_P (g2->dest_reg))
5837 g1->benefit -= copy_cost;
5838 g1->lifetime += g2->lifetime;
5840 if (loop_dump_stream)
5841 fprintf (loop_dump_stream, "giv at %d combined with giv at %d\n",
5842 INSN_UID (g2->insn), INSN_UID (g1->insn));
5848 /* EMIT code before INSERT_BEFORE to set REG = B * M + A. */
5851 emit_iv_add_mult (b, m, a, reg, insert_before)
5852 rtx b; /* initial value of basic induction variable */
5853 rtx m; /* multiplicative constant */
5854 rtx a; /* additive constant */
5855 rtx reg; /* destination register */
5861 /* Prevent unexpected sharing of these rtx. */
5865 /* Increase the lifetime of any invariants moved further in code. */
5866 update_reg_last_use (a, insert_before);
5867 update_reg_last_use (b, insert_before);
5868 update_reg_last_use (m, insert_before);
5871 result = expand_mult_add (b, reg, m, a, GET_MODE (reg), 0);
5873 emit_move_insn (reg, result);
5874 seq = gen_sequence ();
5877 emit_insn_before (seq, insert_before);
5879 record_base_value (REGNO (reg), b);
5882 /* Test whether A * B can be computed without
5883 an actual multiply insn. Value is 1 if so. */
5886 product_cheap_p (a, b)
5892 struct obstack *old_rtl_obstack = rtl_obstack;
5893 char *storage = (char *) obstack_alloc (&temp_obstack, 0);
5896 /* If only one is constant, make it B. */
5897 if (GET_CODE (a) == CONST_INT)
5898 tmp = a, a = b, b = tmp;
5900 /* If first constant, both constant, so don't need multiply. */
5901 if (GET_CODE (a) == CONST_INT)
5904 /* If second not constant, neither is constant, so would need multiply. */
5905 if (GET_CODE (b) != CONST_INT)
5908 /* One operand is constant, so might not need multiply insn. Generate the
5909 code for the multiply and see if a call or multiply, or long sequence
5910 of insns is generated. */
5912 rtl_obstack = &temp_obstack;
5914 expand_mult (GET_MODE (a), a, b, NULL_RTX, 0);
5915 tmp = gen_sequence ();
5918 if (GET_CODE (tmp) == SEQUENCE)
5920 if (XVEC (tmp, 0) == 0)
5922 else if (XVECLEN (tmp, 0) > 3)
5925 for (i = 0; i < XVECLEN (tmp, 0); i++)
5927 rtx insn = XVECEXP (tmp, 0, i);
5929 if (GET_CODE (insn) != INSN
5930 || (GET_CODE (PATTERN (insn)) == SET
5931 && GET_CODE (SET_SRC (PATTERN (insn))) == MULT)
5932 || (GET_CODE (PATTERN (insn)) == PARALLEL
5933 && GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == SET
5934 && GET_CODE (SET_SRC (XVECEXP (PATTERN (insn), 0, 0))) == MULT))
5941 else if (GET_CODE (tmp) == SET
5942 && GET_CODE (SET_SRC (tmp)) == MULT)
5944 else if (GET_CODE (tmp) == PARALLEL
5945 && GET_CODE (XVECEXP (tmp, 0, 0)) == SET
5946 && GET_CODE (SET_SRC (XVECEXP (tmp, 0, 0))) == MULT)
5949 /* Free any storage we obtained in generating this multiply and restore rtl
5950 allocation to its normal obstack. */
5951 obstack_free (&temp_obstack, storage);
5952 rtl_obstack = old_rtl_obstack;
5957 /* Check to see if loop can be terminated by a "decrement and branch until
5958 zero" instruction. If so, add a REG_NONNEG note to the branch insn if so.
5959 Also try reversing an increment loop to a decrement loop
5960 to see if the optimization can be performed.
5961 Value is nonzero if optimization was performed. */
5963 /* This is useful even if the architecture doesn't have such an insn,
5964 because it might change a loops which increments from 0 to n to a loop
5965 which decrements from n to 0. A loop that decrements to zero is usually
5966 faster than one that increments from zero. */
5968 /* ??? This could be rewritten to use some of the loop unrolling procedures,
5969 such as approx_final_value, biv_total_increment, loop_iterations, and
5970 final_[bg]iv_value. */
5973 check_dbra_loop (loop_end, insn_count, loop_start)
5978 struct iv_class *bl;
5985 rtx before_comparison;
5988 /* If last insn is a conditional branch, and the insn before tests a
5989 register value, try to optimize it. Otherwise, we can't do anything. */
5991 comparison = get_condition_for_loop (PREV_INSN (loop_end));
5992 if (comparison == 0)
5995 /* Check all of the bivs to see if the compare uses one of them.
5996 Skip biv's set more than once because we can't guarantee that
5997 it will be zero on the last iteration. Also skip if the biv is
5998 used between its update and the test insn. */
6000 for (bl = loop_iv_list; bl; bl = bl->next)
6002 if (bl->biv_count == 1
6003 && bl->biv->dest_reg == XEXP (comparison, 0)
6004 && ! reg_used_between_p (regno_reg_rtx[bl->regno], bl->biv->insn,
6005 PREV_INSN (PREV_INSN (loop_end))))
6012 /* Look for the case where the basic induction variable is always
6013 nonnegative, and equals zero on the last iteration.
6014 In this case, add a reg_note REG_NONNEG, which allows the
6015 m68k DBRA instruction to be used. */
6017 if (((GET_CODE (comparison) == GT
6018 && GET_CODE (XEXP (comparison, 1)) == CONST_INT
6019 && INTVAL (XEXP (comparison, 1)) == -1)
6020 || (GET_CODE (comparison) == NE && XEXP (comparison, 1) == const0_rtx))
6021 && GET_CODE (bl->biv->add_val) == CONST_INT
6022 && INTVAL (bl->biv->add_val) < 0)
6024 /* Initial value must be greater than 0,
6025 init_val % -dec_value == 0 to ensure that it equals zero on
6026 the last iteration */
6028 if (GET_CODE (bl->initial_value) == CONST_INT
6029 && INTVAL (bl->initial_value) > 0
6030 && (INTVAL (bl->initial_value)
6031 % (-INTVAL (bl->biv->add_val))) == 0)
6033 /* register always nonnegative, add REG_NOTE to branch */
6034 REG_NOTES (PREV_INSN (loop_end))
6035 = gen_rtx (EXPR_LIST, REG_NONNEG, NULL_RTX,
6036 REG_NOTES (PREV_INSN (loop_end)));
6042 /* If the decrement is 1 and the value was tested as >= 0 before
6043 the loop, then we can safely optimize. */
6044 for (p = loop_start; p; p = PREV_INSN (p))
6046 if (GET_CODE (p) == CODE_LABEL)
6048 if (GET_CODE (p) != JUMP_INSN)
6051 before_comparison = get_condition_for_loop (p);
6052 if (before_comparison
6053 && XEXP (before_comparison, 0) == bl->biv->dest_reg
6054 && GET_CODE (before_comparison) == LT
6055 && XEXP (before_comparison, 1) == const0_rtx
6056 && ! reg_set_between_p (bl->biv->dest_reg, p, loop_start)
6057 && INTVAL (bl->biv->add_val) == -1)
6059 REG_NOTES (PREV_INSN (loop_end))
6060 = gen_rtx (EXPR_LIST, REG_NONNEG, NULL_RTX,
6061 REG_NOTES (PREV_INSN (loop_end)));
6068 else if (num_mem_sets <= 1)
6070 /* Try to change inc to dec, so can apply above optimization. */
6072 all registers modified are induction variables or invariant,
6073 all memory references have non-overlapping addresses
6074 (obviously true if only one write)
6075 allow 2 insns for the compare/jump at the end of the loop. */
6076 /* Also, we must avoid any instructions which use both the reversed
6077 biv and another biv. Such instructions will fail if the loop is
6078 reversed. We meet this condition by requiring that either
6079 no_use_except_counting is true, or else that there is only
6081 int num_nonfixed_reads = 0;
6082 /* 1 if the iteration var is used only to count iterations. */
6083 int no_use_except_counting = 0;
6084 /* 1 if the loop has no memory store, or it has a single memory store
6085 which is reversible. */
6086 int reversible_mem_store = 1;
6088 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
6089 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
6090 num_nonfixed_reads += count_nonfixed_reads (PATTERN (p));
6092 if (bl->giv_count == 0
6093 && ! loop_number_exit_count[uid_loop_num[INSN_UID (loop_start)]])
6095 rtx bivreg = regno_reg_rtx[bl->regno];
6097 /* If there are no givs for this biv, and the only exit is the
6098 fall through at the end of the the loop, then
6099 see if perhaps there are no uses except to count. */
6100 no_use_except_counting = 1;
6101 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
6102 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
6104 rtx set = single_set (p);
6106 if (set && GET_CODE (SET_DEST (set)) == REG
6107 && REGNO (SET_DEST (set)) == bl->regno)
6108 /* An insn that sets the biv is okay. */
6110 else if (p == prev_nonnote_insn (prev_nonnote_insn (loop_end))
6111 || p == prev_nonnote_insn (loop_end))
6112 /* Don't bother about the end test. */
6114 else if (reg_mentioned_p (bivreg, PATTERN (p)))
6115 /* Any other use of the biv is no good. */
6117 no_use_except_counting = 0;
6123 /* If the loop has a single store, and the destination address is
6124 invariant, then we can't reverse the loop, because this address
6125 might then have the wrong value at loop exit.
6126 This would work if the source was invariant also, however, in that
6127 case, the insn should have been moved out of the loop. */
6129 if (num_mem_sets == 1)
6130 reversible_mem_store
6131 = (! unknown_address_altered
6132 && ! invariant_p (XEXP (loop_store_mems[0], 0)));
6134 /* This code only acts for innermost loops. Also it simplifies
6135 the memory address check by only reversing loops with
6136 zero or one memory access.
6137 Two memory accesses could involve parts of the same array,
6138 and that can't be reversed. */
6140 if (num_nonfixed_reads <= 1
6142 && !loop_has_volatile
6143 && reversible_mem_store
6144 && (no_use_except_counting
6145 || ((bl->giv_count + bl->biv_count + num_mem_sets
6146 + num_movables + 2 == insn_count)
6147 && (bl == loop_iv_list && bl->next == 0))))
6151 /* Loop can be reversed. */
6152 if (loop_dump_stream)
6153 fprintf (loop_dump_stream, "Can reverse loop\n");
6155 /* Now check other conditions:
6156 initial_value must be zero,
6157 final_value % add_val == 0, so that when reversed, the
6158 biv will be zero on the last iteration.
6160 This test can probably be improved since +/- 1 in the constant
6161 can be obtained by changing LT to LE and vice versa; this is
6164 if (comparison && bl->initial_value == const0_rtx
6165 && GET_CODE (XEXP (comparison, 1)) == CONST_INT
6166 /* LE gets turned into LT */
6167 && GET_CODE (comparison) == LT
6168 && (INTVAL (XEXP (comparison, 1))
6169 % INTVAL (bl->biv->add_val)) == 0)
6171 /* Register will always be nonnegative, with value
6172 0 on last iteration if loop reversed */
6174 /* Save some info needed to produce the new insns. */
6175 reg = bl->biv->dest_reg;
6176 jump_label = XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end))), 1);
6177 if (jump_label == pc_rtx)
6178 jump_label = XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end))), 2);
6179 new_add_val = GEN_INT (- INTVAL (bl->biv->add_val));
6181 final_value = XEXP (comparison, 1);
6182 start_value = GEN_INT (INTVAL (XEXP (comparison, 1))
6183 - INTVAL (bl->biv->add_val));
6185 /* Initialize biv to start_value before loop start.
6186 The old initializing insn will be deleted as a
6187 dead store by flow.c. */
6188 emit_insn_before (gen_move_insn (reg, start_value), loop_start);
6190 /* Add insn to decrement register, and delete insn
6191 that incremented the register. */
6192 p = emit_insn_before (gen_add2_insn (reg, new_add_val),
6194 delete_insn (bl->biv->insn);
6196 /* Update biv info to reflect its new status. */
6198 bl->initial_value = start_value;
6199 bl->biv->add_val = new_add_val;
6201 /* Inc LABEL_NUSES so that delete_insn will
6202 not delete the label. */
6203 LABEL_NUSES (XEXP (jump_label, 0)) ++;
6205 /* Emit an insn after the end of the loop to set the biv's
6206 proper exit value if it is used anywhere outside the loop. */
6207 if ((REGNO_LAST_UID (bl->regno)
6208 != INSN_UID (PREV_INSN (PREV_INSN (loop_end))))
6210 || REGNO_FIRST_UID (bl->regno) != INSN_UID (bl->init_insn))
6211 emit_insn_after (gen_move_insn (reg, final_value),
6214 /* Delete compare/branch at end of loop. */
6215 delete_insn (PREV_INSN (loop_end));
6216 delete_insn (PREV_INSN (loop_end));
6218 /* Add new compare/branch insn at end of loop. */
6220 emit_cmp_insn (reg, const0_rtx, GE, NULL_RTX,
6221 GET_MODE (reg), 0, 0);
6222 emit_jump_insn (gen_bge (XEXP (jump_label, 0)));
6223 tem = gen_sequence ();
6225 emit_jump_insn_before (tem, loop_end);
6227 for (tem = PREV_INSN (loop_end);
6228 tem && GET_CODE (tem) != JUMP_INSN; tem = PREV_INSN (tem))
6232 JUMP_LABEL (tem) = XEXP (jump_label, 0);
6234 /* Increment of LABEL_NUSES done above. */
6235 /* Register is now always nonnegative,
6236 so add REG_NONNEG note to the branch. */
6237 REG_NOTES (tem) = gen_rtx (EXPR_LIST, REG_NONNEG, NULL_RTX,
6243 /* Mark that this biv has been reversed. Each giv which depends
6244 on this biv, and which is also live past the end of the loop
6245 will have to be fixed up. */
6249 if (loop_dump_stream)
6250 fprintf (loop_dump_stream,
6251 "Reversed loop and added reg_nonneg\n");
6261 /* Verify whether the biv BL appears to be eliminable,
6262 based on the insns in the loop that refer to it.
6263 LOOP_START is the first insn of the loop, and END is the end insn.
6265 If ELIMINATE_P is non-zero, actually do the elimination.
6267 THRESHOLD and INSN_COUNT are from loop_optimize and are used to
6268 determine whether invariant insns should be placed inside or at the
6269 start of the loop. */
6272 maybe_eliminate_biv (bl, loop_start, end, eliminate_p, threshold, insn_count)
6273 struct iv_class *bl;
6277 int threshold, insn_count;
6279 rtx reg = bl->biv->dest_reg;
6282 /* Scan all insns in the loop, stopping if we find one that uses the
6283 biv in a way that we cannot eliminate. */
6285 for (p = loop_start; p != end; p = NEXT_INSN (p))
6287 enum rtx_code code = GET_CODE (p);
6288 rtx where = threshold >= insn_count ? loop_start : p;
6290 if ((code == INSN || code == JUMP_INSN || code == CALL_INSN)
6291 && reg_mentioned_p (reg, PATTERN (p))
6292 && ! maybe_eliminate_biv_1 (PATTERN (p), p, bl, eliminate_p, where))
6294 if (loop_dump_stream)
6295 fprintf (loop_dump_stream,
6296 "Cannot eliminate biv %d: biv used in insn %d.\n",
6297 bl->regno, INSN_UID (p));
6304 if (loop_dump_stream)
6305 fprintf (loop_dump_stream, "biv %d %s eliminated.\n",
6306 bl->regno, eliminate_p ? "was" : "can be");
6313 /* If BL appears in X (part of the pattern of INSN), see if we can
6314 eliminate its use. If so, return 1. If not, return 0.
6316 If BIV does not appear in X, return 1.
6318 If ELIMINATE_P is non-zero, actually do the elimination. WHERE indicates
6319 where extra insns should be added. Depending on how many items have been
6320 moved out of the loop, it will either be before INSN or at the start of
6324 maybe_eliminate_biv_1 (x, insn, bl, eliminate_p, where)
6326 struct iv_class *bl;
6330 enum rtx_code code = GET_CODE (x);
6331 rtx reg = bl->biv->dest_reg;
6332 enum machine_mode mode = GET_MODE (reg);
6333 struct induction *v;
6342 /* If we haven't already been able to do something with this BIV,
6343 we can't eliminate it. */
6349 /* If this sets the BIV, it is not a problem. */
6350 if (SET_DEST (x) == reg)
6353 /* If this is an insn that defines a giv, it is also ok because
6354 it will go away when the giv is reduced. */
6355 for (v = bl->giv; v; v = v->next_iv)
6356 if (v->giv_type == DEST_REG && SET_DEST (x) == v->dest_reg)
6360 if (SET_DEST (x) == cc0_rtx && SET_SRC (x) == reg)
6362 /* Can replace with any giv that was reduced and
6363 that has (MULT_VAL != 0) and (ADD_VAL == 0).
6364 Require a constant for MULT_VAL, so we know it's nonzero.
6365 ??? We disable this optimization to avoid potential
6368 for (v = bl->giv; v; v = v->next_iv)
6369 if (CONSTANT_P (v->mult_val) && v->mult_val != const0_rtx
6370 && v->add_val == const0_rtx
6371 && ! v->ignore && ! v->maybe_dead && v->always_computable
6375 /* If the giv V had the auto-inc address optimization applied
6376 to it, and INSN occurs between the giv insn and the biv
6377 insn, then we must adjust the value used here.
6378 This is rare, so we don't bother to do so. */
6380 && ((INSN_LUID (v->insn) < INSN_LUID (insn)
6381 && INSN_LUID (insn) < INSN_LUID (bl->biv->insn))
6382 || (INSN_LUID (v->insn) > INSN_LUID (insn)
6383 && INSN_LUID (insn) > INSN_LUID (bl->biv->insn))))
6389 /* If the giv has the opposite direction of change,
6390 then reverse the comparison. */
6391 if (INTVAL (v->mult_val) < 0)
6392 new = gen_rtx (COMPARE, GET_MODE (v->new_reg),
6393 const0_rtx, v->new_reg);
6397 /* We can probably test that giv's reduced reg. */
6398 if (validate_change (insn, &SET_SRC (x), new, 0))
6402 /* Look for a giv with (MULT_VAL != 0) and (ADD_VAL != 0);
6403 replace test insn with a compare insn (cmp REDUCED_GIV ADD_VAL).
6404 Require a constant for MULT_VAL, so we know it's nonzero.
6405 ??? Do this only if ADD_VAL is a pointer to avoid a potential
6406 overflow problem. */
6408 for (v = bl->giv; v; v = v->next_iv)
6409 if (CONSTANT_P (v->mult_val) && v->mult_val != const0_rtx
6410 && ! v->ignore && ! v->maybe_dead && v->always_computable
6412 && (GET_CODE (v->add_val) == SYMBOL_REF
6413 || GET_CODE (v->add_val) == LABEL_REF
6414 || GET_CODE (v->add_val) == CONST
6415 || (GET_CODE (v->add_val) == REG
6416 && REGNO_POINTER_FLAG (REGNO (v->add_val)))))
6418 /* If the giv V had the auto-inc address optimization applied
6419 to it, and INSN occurs between the giv insn and the biv
6420 insn, then we must adjust the value used here.
6421 This is rare, so we don't bother to do so. */
6423 && ((INSN_LUID (v->insn) < INSN_LUID (insn)
6424 && INSN_LUID (insn) < INSN_LUID (bl->biv->insn))
6425 || (INSN_LUID (v->insn) > INSN_LUID (insn)
6426 && INSN_LUID (insn) > INSN_LUID (bl->biv->insn))))
6432 /* If the giv has the opposite direction of change,
6433 then reverse the comparison. */
6434 if (INTVAL (v->mult_val) < 0)
6435 new = gen_rtx (COMPARE, VOIDmode, copy_rtx (v->add_val),
6438 new = gen_rtx (COMPARE, VOIDmode, v->new_reg,
6439 copy_rtx (v->add_val));
6441 /* Replace biv with the giv's reduced register. */
6442 update_reg_last_use (v->add_val, insn);
6443 if (validate_change (insn, &SET_SRC (PATTERN (insn)), new, 0))
6446 /* Insn doesn't support that constant or invariant. Copy it
6447 into a register (it will be a loop invariant.) */
6448 tem = gen_reg_rtx (GET_MODE (v->new_reg));
6450 emit_insn_before (gen_move_insn (tem, copy_rtx (v->add_val)),
6453 /* Substitute the new register for its invariant value in
6454 the compare expression. */
6455 XEXP (new, (INTVAL (v->mult_val) < 0) ? 0 : 1) = tem;
6456 if (validate_change (insn, &SET_SRC (PATTERN (insn)), new, 0))
6465 case GT: case GE: case GTU: case GEU:
6466 case LT: case LE: case LTU: case LEU:
6467 /* See if either argument is the biv. */
6468 if (XEXP (x, 0) == reg)
6469 arg = XEXP (x, 1), arg_operand = 1;
6470 else if (XEXP (x, 1) == reg)
6471 arg = XEXP (x, 0), arg_operand = 0;
6475 if (CONSTANT_P (arg))
6477 /* First try to replace with any giv that has constant positive
6478 mult_val and constant add_val. We might be able to support
6479 negative mult_val, but it seems complex to do it in general. */
6481 for (v = bl->giv; v; v = v->next_iv)
6482 if (CONSTANT_P (v->mult_val) && INTVAL (v->mult_val) > 0
6483 && (GET_CODE (v->add_val) == SYMBOL_REF
6484 || GET_CODE (v->add_val) == LABEL_REF
6485 || GET_CODE (v->add_val) == CONST
6486 || (GET_CODE (v->add_val) == REG
6487 && REGNO_POINTER_FLAG (REGNO (v->add_val))))
6488 && ! v->ignore && ! v->maybe_dead && v->always_computable
6491 /* If the giv V had the auto-inc address optimization applied
6492 to it, and INSN occurs between the giv insn and the biv
6493 insn, then we must adjust the value used here.
6494 This is rare, so we don't bother to do so. */
6496 && ((INSN_LUID (v->insn) < INSN_LUID (insn)
6497 && INSN_LUID (insn) < INSN_LUID (bl->biv->insn))
6498 || (INSN_LUID (v->insn) > INSN_LUID (insn)
6499 && INSN_LUID (insn) > INSN_LUID (bl->biv->insn))))
6505 /* Replace biv with the giv's reduced reg. */
6506 XEXP (x, 1-arg_operand) = v->new_reg;
6508 /* If all constants are actually constant integers and
6509 the derived constant can be directly placed in the COMPARE,
6511 if (GET_CODE (arg) == CONST_INT
6512 && GET_CODE (v->mult_val) == CONST_INT
6513 && GET_CODE (v->add_val) == CONST_INT
6514 && validate_change (insn, &XEXP (x, arg_operand),
6515 GEN_INT (INTVAL (arg)
6516 * INTVAL (v->mult_val)
6517 + INTVAL (v->add_val)), 0))
6520 /* Otherwise, load it into a register. */
6521 tem = gen_reg_rtx (mode);
6522 emit_iv_add_mult (arg, v->mult_val, v->add_val, tem, where);
6523 if (validate_change (insn, &XEXP (x, arg_operand), tem, 0))
6526 /* If that failed, put back the change we made above. */
6527 XEXP (x, 1-arg_operand) = reg;
6530 /* Look for giv with positive constant mult_val and nonconst add_val.
6531 Insert insns to calculate new compare value.
6532 ??? Turn this off due to possible overflow. */
6534 for (v = bl->giv; v; v = v->next_iv)
6535 if (CONSTANT_P (v->mult_val) && INTVAL (v->mult_val) > 0
6536 && ! v->ignore && ! v->maybe_dead && v->always_computable
6542 /* If the giv V had the auto-inc address optimization applied
6543 to it, and INSN occurs between the giv insn and the biv
6544 insn, then we must adjust the value used here.
6545 This is rare, so we don't bother to do so. */
6547 && ((INSN_LUID (v->insn) < INSN_LUID (insn)
6548 && INSN_LUID (insn) < INSN_LUID (bl->biv->insn))
6549 || (INSN_LUID (v->insn) > INSN_LUID (insn)
6550 && INSN_LUID (insn) > INSN_LUID (bl->biv->insn))))
6556 tem = gen_reg_rtx (mode);
6558 /* Replace biv with giv's reduced register. */
6559 validate_change (insn, &XEXP (x, 1 - arg_operand),
6562 /* Compute value to compare against. */
6563 emit_iv_add_mult (arg, v->mult_val, v->add_val, tem, where);
6564 /* Use it in this insn. */
6565 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
6566 if (apply_change_group ())
6570 else if (GET_CODE (arg) == REG || GET_CODE (arg) == MEM)
6572 if (invariant_p (arg) == 1)
6574 /* Look for giv with constant positive mult_val and nonconst
6575 add_val. Insert insns to compute new compare value.
6576 ??? Turn this off due to possible overflow. */
6578 for (v = bl->giv; v; v = v->next_iv)
6579 if (CONSTANT_P (v->mult_val) && INTVAL (v->mult_val) > 0
6580 && ! v->ignore && ! v->maybe_dead && v->always_computable
6586 /* If the giv V had the auto-inc address optimization applied
6587 to it, and INSN occurs between the giv insn and the biv
6588 insn, then we must adjust the value used here.
6589 This is rare, so we don't bother to do so. */
6591 && ((INSN_LUID (v->insn) < INSN_LUID (insn)
6592 && INSN_LUID (insn) < INSN_LUID (bl->biv->insn))
6593 || (INSN_LUID (v->insn) > INSN_LUID (insn)
6594 && INSN_LUID (insn) > INSN_LUID (bl->biv->insn))))
6600 tem = gen_reg_rtx (mode);
6602 /* Replace biv with giv's reduced register. */
6603 validate_change (insn, &XEXP (x, 1 - arg_operand),
6606 /* Compute value to compare against. */
6607 emit_iv_add_mult (arg, v->mult_val, v->add_val,
6609 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
6610 if (apply_change_group ())
6615 /* This code has problems. Basically, you can't know when
6616 seeing if we will eliminate BL, whether a particular giv
6617 of ARG will be reduced. If it isn't going to be reduced,
6618 we can't eliminate BL. We can try forcing it to be reduced,
6619 but that can generate poor code.
6621 The problem is that the benefit of reducing TV, below should
6622 be increased if BL can actually be eliminated, but this means
6623 we might have to do a topological sort of the order in which
6624 we try to process biv. It doesn't seem worthwhile to do
6625 this sort of thing now. */
6628 /* Otherwise the reg compared with had better be a biv. */
6629 if (GET_CODE (arg) != REG
6630 || reg_iv_type[REGNO (arg)] != BASIC_INDUCT)
6633 /* Look for a pair of givs, one for each biv,
6634 with identical coefficients. */
6635 for (v = bl->giv; v; v = v->next_iv)
6637 struct induction *tv;
6639 if (v->ignore || v->maybe_dead || v->mode != mode)
6642 for (tv = reg_biv_class[REGNO (arg)]->giv; tv; tv = tv->next_iv)
6643 if (! tv->ignore && ! tv->maybe_dead
6644 && rtx_equal_p (tv->mult_val, v->mult_val)
6645 && rtx_equal_p (tv->add_val, v->add_val)
6646 && tv->mode == mode)
6648 /* If the giv V had the auto-inc address optimization applied
6649 to it, and INSN occurs between the giv insn and the biv
6650 insn, then we must adjust the value used here.
6651 This is rare, so we don't bother to do so. */
6653 && ((INSN_LUID (v->insn) < INSN_LUID (insn)
6654 && INSN_LUID (insn) < INSN_LUID (bl->biv->insn))
6655 || (INSN_LUID (v->insn) > INSN_LUID (insn)
6656 && INSN_LUID (insn) > INSN_LUID (bl->biv->insn))))
6662 /* Replace biv with its giv's reduced reg. */
6663 XEXP (x, 1-arg_operand) = v->new_reg;
6664 /* Replace other operand with the other giv's
6666 XEXP (x, arg_operand) = tv->new_reg;
6673 /* If we get here, the biv can't be eliminated. */
6677 /* If this address is a DEST_ADDR giv, it doesn't matter if the
6678 biv is used in it, since it will be replaced. */
6679 for (v = bl->giv; v; v = v->next_iv)
6680 if (v->giv_type == DEST_ADDR && v->location == &XEXP (x, 0))
6685 /* See if any subexpression fails elimination. */
6686 fmt = GET_RTX_FORMAT (code);
6687 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6692 if (! maybe_eliminate_biv_1 (XEXP (x, i), insn, bl,
6693 eliminate_p, where))
6698 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6699 if (! maybe_eliminate_biv_1 (XVECEXP (x, i, j), insn, bl,
6700 eliminate_p, where))
6709 /* Return nonzero if the last use of REG
6710 is in an insn following INSN in the same basic block. */
6713 last_use_this_basic_block (reg, insn)
6719 n && GET_CODE (n) != CODE_LABEL && GET_CODE (n) != JUMP_INSN;
6722 if (REGNO_LAST_UID (REGNO (reg)) == INSN_UID (n))
6728 /* Called via `note_stores' to record the initial value of a biv. Here we
6729 just record the location of the set and process it later. */
6732 record_initial (dest, set)
6736 struct iv_class *bl;
6738 if (GET_CODE (dest) != REG
6739 || REGNO (dest) >= max_reg_before_loop
6740 || reg_iv_type[REGNO (dest)] != BASIC_INDUCT)
6743 bl = reg_biv_class[REGNO (dest)];
6745 /* If this is the first set found, record it. */
6746 if (bl->init_insn == 0)
6748 bl->init_insn = note_insn;
6753 /* If any of the registers in X are "old" and currently have a last use earlier
6754 than INSN, update them to have a last use of INSN. Their actual last use
6755 will be the previous insn but it will not have a valid uid_luid so we can't
6759 update_reg_last_use (x, insn)
6763 /* Check for the case where INSN does not have a valid luid. In this case,
6764 there is no need to modify the regno_last_uid, as this can only happen
6765 when code is inserted after the loop_end to set a pseudo's final value,
6766 and hence this insn will never be the last use of x. */
6767 if (GET_CODE (x) == REG && REGNO (x) < max_reg_before_loop
6768 && INSN_UID (insn) < max_uid_for_loop
6769 && uid_luid[REGNO_LAST_UID (REGNO (x))] < uid_luid[INSN_UID (insn)])
6770 REGNO_LAST_UID (REGNO (x)) = INSN_UID (insn);
6774 register char *fmt = GET_RTX_FORMAT (GET_CODE (x));
6775 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
6778 update_reg_last_use (XEXP (x, i), insn);
6779 else if (fmt[i] == 'E')
6780 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6781 update_reg_last_use (XVECEXP (x, i, j), insn);
6786 /* Given a jump insn JUMP, return the condition that will cause it to branch
6787 to its JUMP_LABEL. If the condition cannot be understood, or is an
6788 inequality floating-point comparison which needs to be reversed, 0 will
6791 If EARLIEST is non-zero, it is a pointer to a place where the earliest
6792 insn used in locating the condition was found. If a replacement test
6793 of the condition is desired, it should be placed in front of that
6794 insn and we will be sure that the inputs are still valid.
6796 The condition will be returned in a canonical form to simplify testing by
6797 callers. Specifically:
6799 (1) The code will always be a comparison operation (EQ, NE, GT, etc.).
6800 (2) Both operands will be machine operands; (cc0) will have been replaced.
6801 (3) If an operand is a constant, it will be the second operand.
6802 (4) (LE x const) will be replaced with (LT x <const+1>) and similarly
6803 for GE, GEU, and LEU. */
6806 get_condition (jump, earliest)
6815 int reverse_code = 0;
6816 int did_reverse_condition = 0;
6818 /* If this is not a standard conditional jump, we can't parse it. */
6819 if (GET_CODE (jump) != JUMP_INSN
6820 || ! condjump_p (jump) || simplejump_p (jump))
6823 code = GET_CODE (XEXP (SET_SRC (PATTERN (jump)), 0));
6824 op0 = XEXP (XEXP (SET_SRC (PATTERN (jump)), 0), 0);
6825 op1 = XEXP (XEXP (SET_SRC (PATTERN (jump)), 0), 1);
6830 /* If this branches to JUMP_LABEL when the condition is false, reverse
6832 if (GET_CODE (XEXP (SET_SRC (PATTERN (jump)), 2)) == LABEL_REF
6833 && XEXP (XEXP (SET_SRC (PATTERN (jump)), 2), 0) == JUMP_LABEL (jump))
6834 code = reverse_condition (code), did_reverse_condition ^= 1;
6836 /* If we are comparing a register with zero, see if the register is set
6837 in the previous insn to a COMPARE or a comparison operation. Perform
6838 the same tests as a function of STORE_FLAG_VALUE as find_comparison_args
6841 while (GET_RTX_CLASS (code) == '<' && op1 == CONST0_RTX (GET_MODE (op0)))
6843 /* Set non-zero when we find something of interest. */
6847 /* If comparison with cc0, import actual comparison from compare
6851 if ((prev = prev_nonnote_insn (prev)) == 0
6852 || GET_CODE (prev) != INSN
6853 || (set = single_set (prev)) == 0
6854 || SET_DEST (set) != cc0_rtx)
6857 op0 = SET_SRC (set);
6858 op1 = CONST0_RTX (GET_MODE (op0));
6864 /* If this is a COMPARE, pick up the two things being compared. */
6865 if (GET_CODE (op0) == COMPARE)
6867 op1 = XEXP (op0, 1);
6868 op0 = XEXP (op0, 0);
6871 else if (GET_CODE (op0) != REG)
6874 /* Go back to the previous insn. Stop if it is not an INSN. We also
6875 stop if it isn't a single set or if it has a REG_INC note because
6876 we don't want to bother dealing with it. */
6878 if ((prev = prev_nonnote_insn (prev)) == 0
6879 || GET_CODE (prev) != INSN
6880 || FIND_REG_INC_NOTE (prev, 0)
6881 || (set = single_set (prev)) == 0)
6884 /* If this is setting OP0, get what it sets it to if it looks
6886 if (rtx_equal_p (SET_DEST (set), op0))
6888 enum machine_mode inner_mode = GET_MODE (SET_SRC (set));
6890 if ((GET_CODE (SET_SRC (set)) == COMPARE
6893 && GET_MODE_CLASS (inner_mode) == MODE_INT
6894 && (GET_MODE_BITSIZE (inner_mode)
6895 <= HOST_BITS_PER_WIDE_INT)
6896 && (STORE_FLAG_VALUE
6897 & ((HOST_WIDE_INT) 1
6898 << (GET_MODE_BITSIZE (inner_mode) - 1))))
6899 #ifdef FLOAT_STORE_FLAG_VALUE
6901 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
6902 && FLOAT_STORE_FLAG_VALUE < 0)
6905 && GET_RTX_CLASS (GET_CODE (SET_SRC (set))) == '<')))
6907 else if (((code == EQ
6909 && (GET_MODE_BITSIZE (inner_mode)
6910 <= HOST_BITS_PER_WIDE_INT)
6911 && GET_MODE_CLASS (inner_mode) == MODE_INT
6912 && (STORE_FLAG_VALUE
6913 & ((HOST_WIDE_INT) 1
6914 << (GET_MODE_BITSIZE (inner_mode) - 1))))
6915 #ifdef FLOAT_STORE_FLAG_VALUE
6917 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
6918 && FLOAT_STORE_FLAG_VALUE < 0)
6921 && GET_RTX_CLASS (GET_CODE (SET_SRC (set))) == '<')
6923 /* We might have reversed a LT to get a GE here. But this wasn't
6924 actually the comparison of data, so we don't flag that we
6925 have had to reverse the condition. */
6926 did_reverse_condition ^= 1;
6934 else if (reg_set_p (op0, prev))
6935 /* If this sets OP0, but not directly, we have to give up. */
6940 if (GET_RTX_CLASS (GET_CODE (x)) == '<')
6941 code = GET_CODE (x);
6944 code = reverse_condition (code);
6945 did_reverse_condition ^= 1;
6949 op0 = XEXP (x, 0), op1 = XEXP (x, 1);
6955 /* If constant is first, put it last. */
6956 if (CONSTANT_P (op0))
6957 code = swap_condition (code), tem = op0, op0 = op1, op1 = tem;
6959 /* If OP0 is the result of a comparison, we weren't able to find what
6960 was really being compared, so fail. */
6961 if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_CC)
6964 /* Canonicalize any ordered comparison with integers involving equality
6965 if we can do computations in the relevant mode and we do not
6968 if (GET_CODE (op1) == CONST_INT
6969 && GET_MODE (op0) != VOIDmode
6970 && GET_MODE_BITSIZE (GET_MODE (op0)) <= HOST_BITS_PER_WIDE_INT)
6972 HOST_WIDE_INT const_val = INTVAL (op1);
6973 unsigned HOST_WIDE_INT uconst_val = const_val;
6974 unsigned HOST_WIDE_INT max_val
6975 = (unsigned HOST_WIDE_INT) GET_MODE_MASK (GET_MODE (op0));
6980 if (const_val != max_val >> 1)
6981 code = LT, op1 = GEN_INT (const_val + 1);
6986 != (((HOST_WIDE_INT) 1
6987 << (GET_MODE_BITSIZE (GET_MODE (op0)) - 1))))
6988 code = GT, op1 = GEN_INT (const_val - 1);
6992 if (uconst_val != max_val)
6993 code = LTU, op1 = GEN_INT (uconst_val + 1);
6997 if (uconst_val != 0)
6998 code = GTU, op1 = GEN_INT (uconst_val - 1);
7003 /* If this was floating-point and we reversed anything other than an
7004 EQ or NE, return zero. */
7005 if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT
7006 && did_reverse_condition && code != NE && code != EQ
7008 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_FLOAT)
7012 /* Never return CC0; return zero instead. */
7017 return gen_rtx (code, VOIDmode, op0, op1);
7020 /* Similar to above routine, except that we also put an invariant last
7021 unless both operands are invariants. */
7024 get_condition_for_loop (x)
7027 rtx comparison = get_condition (x, NULL_PTR);
7030 || ! invariant_p (XEXP (comparison, 0))
7031 || invariant_p (XEXP (comparison, 1)))
7034 return gen_rtx (swap_condition (GET_CODE (comparison)), VOIDmode,
7035 XEXP (comparison, 1), XEXP (comparison, 0));
7039 /* Analyze a loop in order to instrument it with the use of count register.
7040 loop_start and loop_end are the first and last insns of the loop.
7041 This function works in cooperation with insert_bct ().
7042 loop_can_insert_bct[loop_num] is set according to whether the optimization
7043 is applicable to the loop. When it is applicable, the following variables
7045 loop_start_value[loop_num]
7046 loop_comparison_value[loop_num]
7047 loop_increment[loop_num]
7048 loop_comparison_code[loop_num] */
7051 void analyze_loop_iterations (loop_start, loop_end)
7052 rtx loop_start, loop_end;
7054 rtx comparison, comparison_value;
7055 rtx iteration_var, initial_value, increment;
7056 enum rtx_code comparison_code;
7062 /* loop_variable mode */
7063 enum machine_mode original_mode;
7065 /* find the number of the loop */
7066 int loop_num = uid_loop_num [INSN_UID (loop_start)];
7068 /* we change our mind only when we are sure that loop will be instrumented */
7069 loop_can_insert_bct[loop_num] = 0;
7071 /* is the optimization suppressed. */
7072 if ( !flag_branch_on_count_reg )
7075 /* make sure that count-reg is not in use */
7076 if (loop_used_count_register[loop_num]){
7077 if (loop_dump_stream)
7078 fprintf (loop_dump_stream,
7079 "analyze_loop_iterations %d: BCT instrumentation failed: count register already in use\n",
7084 /* make sure that the function has no indirect jumps. */
7085 if (indirect_jump_in_function){
7086 if (loop_dump_stream)
7087 fprintf (loop_dump_stream,
7088 "analyze_loop_iterations %d: BCT instrumentation failed: indirect jump in function\n",
7093 /* make sure that the last loop insn is a conditional jump */
7094 last_loop_insn = PREV_INSN (loop_end);
7095 if (GET_CODE (last_loop_insn) != JUMP_INSN || !condjump_p (last_loop_insn)) {
7096 if (loop_dump_stream)
7097 fprintf (loop_dump_stream,
7098 "analyze_loop_iterations %d: BCT instrumentation failed: invalid jump at loop end\n",
7103 /* First find the iteration variable. If the last insn is a conditional
7104 branch, and the insn preceding it tests a register value, make that
7105 register the iteration variable. */
7107 /* We used to use prev_nonnote_insn here, but that fails because it might
7108 accidentally get the branch for a contained loop if the branch for this
7109 loop was deleted. We can only trust branches immediately before the
7112 comparison = get_condition_for_loop (last_loop_insn);
7113 /* ??? Get_condition may switch position of induction variable and
7114 invariant register when it canonicalizes the comparison. */
7116 if (comparison == 0) {
7117 if (loop_dump_stream)
7118 fprintf (loop_dump_stream,
7119 "analyze_loop_iterations %d: BCT instrumentation failed: comparison not found\n",
7124 comparison_code = GET_CODE (comparison);
7125 iteration_var = XEXP (comparison, 0);
7126 comparison_value = XEXP (comparison, 1);
7128 original_mode = GET_MODE (iteration_var);
7129 if (GET_MODE_CLASS (original_mode) != MODE_INT
7130 || GET_MODE_SIZE (original_mode) != UNITS_PER_WORD) {
7131 if (loop_dump_stream)
7132 fprintf (loop_dump_stream,
7133 "analyze_loop_iterations %d: BCT Instrumentation failed: loop variable not integer\n",
7138 /* get info about loop bounds and increment */
7139 iteration_info (iteration_var, &initial_value, &increment,
7140 loop_start, loop_end);
7142 /* make sure that all required loop data were found */
7143 if (!(initial_value && increment && comparison_value
7144 && invariant_p (comparison_value) && invariant_p (increment)
7145 && ! indirect_jump_in_function))
7147 if (loop_dump_stream) {
7148 fprintf (loop_dump_stream,
7149 "analyze_loop_iterations %d: BCT instrumentation failed because of wrong loop: ", loop_num);
7150 if (!(initial_value && increment && comparison_value)) {
7151 fprintf (loop_dump_stream, "\tbounds not available: ");
7152 if ( ! initial_value )
7153 fprintf (loop_dump_stream, "initial ");
7155 fprintf (loop_dump_stream, "increment ");
7156 if ( ! comparison_value )
7157 fprintf (loop_dump_stream, "comparison ");
7158 fprintf (loop_dump_stream, "\n");
7160 if (!invariant_p (comparison_value) || !invariant_p (increment))
7161 fprintf (loop_dump_stream, "\tloop bounds not invariant\n");
7166 /* make sure that the increment is constant */
7167 if (GET_CODE (increment) != CONST_INT) {
7168 if (loop_dump_stream)
7169 fprintf (loop_dump_stream,
7170 "analyze_loop_iterations %d: instrumentation failed: not arithmetic loop\n",
7175 /* make sure that the loop contains neither function call, nor jump on table.
7176 (the count register might be altered by the called function, and might
7177 be used for a branch on table). */
7178 for (insn = loop_start; insn && insn != loop_end; insn = NEXT_INSN (insn)) {
7179 if (GET_CODE (insn) == CALL_INSN){
7180 if (loop_dump_stream)
7181 fprintf (loop_dump_stream,
7182 "analyze_loop_iterations %d: BCT instrumentation failed: function call in the loop\n",
7187 if (GET_CODE (insn) == JUMP_INSN
7188 && (GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC
7189 || GET_CODE (PATTERN (insn)) == ADDR_VEC)){
7190 if (loop_dump_stream)
7191 fprintf (loop_dump_stream,
7192 "analyze_loop_iterations %d: BCT instrumentation failed: computed branch in the loop\n",
7198 /* At this point, we are sure that the loop can be instrumented with BCT.
7199 Some of the loops, however, will not be instrumented - the final decision
7200 is taken by insert_bct () */
7201 if (loop_dump_stream)
7202 fprintf (loop_dump_stream,
7203 "analyze_loop_iterations: loop (luid =%d) can be BCT instrumented.\n",
7206 /* mark all enclosing loops that they cannot use count register */
7207 /* ???: In fact, since insert_bct may decide not to instrument this loop,
7208 marking here may prevent instrumenting an enclosing loop that could
7209 actually be instrumented. But since this is rare, it is safer to mark
7210 here in case the order of calling (analyze/insert)_bct would be changed. */
7211 for (i=loop_num; i != -1; i = loop_outer_loop[i])
7212 loop_used_count_register[i] = 1;
7214 /* Set data structures which will be used by the instrumentation phase */
7215 loop_start_value[loop_num] = initial_value;
7216 loop_comparison_value[loop_num] = comparison_value;
7217 loop_increment[loop_num] = increment;
7218 loop_comparison_code[loop_num] = comparison_code;
7219 loop_can_insert_bct[loop_num] = 1;
7223 /* instrument loop for insertion of bct instruction. We distinguish between
7224 loops with compile-time bounds, to those with run-time bounds. The loop
7225 behaviour is analized according to the following characteristics/variables:
7227 ; comparison-value: the value to which the iteration counter is compared.
7228 ; initial-value: iteration-counter initial value.
7229 ; increment: iteration-counter increment.
7230 ; Computed variables:
7231 ; increment-direction: the sign of the increment.
7232 ; compare-direction: '1' for GT, GTE, '-1' for LT, LTE, '0' for NE.
7233 ; range-direction: sign (comparison-value - initial-value)
7234 We give up on the following cases:
7235 ; loop variable overflow.
7236 ; run-time loop bounds with comparison code NE.
7240 insert_bct (loop_start, loop_end)
7241 rtx loop_start, loop_end;
7243 rtx initial_value, comparison_value, increment;
7244 enum rtx_code comparison_code;
7246 int increment_direction, compare_direction;
7249 /* if the loop condition is <= or >=, the number of iteration
7250 is 1 more than the range of the bounds of the loop */
7251 int add_iteration = 0;
7253 /* the only machine mode we work with - is the integer of the size that the
7255 enum machine_mode loop_var_mode = SImode;
7257 int loop_num = uid_loop_num [INSN_UID (loop_start)];
7259 /* get loop-variables. No need to check that these are valid - already
7260 checked in analyze_loop_iterations (). */
7261 comparison_code = loop_comparison_code[loop_num];
7262 initial_value = loop_start_value[loop_num];
7263 comparison_value = loop_comparison_value[loop_num];
7264 increment = loop_increment[loop_num];
7266 /* check analyze_loop_iterations decision for this loop. */
7267 if (! loop_can_insert_bct[loop_num]){
7268 if (loop_dump_stream)
7269 fprintf (loop_dump_stream,
7270 "insert_bct: [%d] - was decided not to instrument by analyze_loop_iterations ()\n",
7275 /* It's impossible to instrument a competely unrolled loop. */
7276 if (loop_unroll_factor [loop_num] == -1)
7279 /* make sure that the last loop insn is a conditional jump .
7280 This check is repeated from analyze_loop_iterations (),
7281 because unrolling might have changed that. */
7282 if (GET_CODE (PREV_INSN (loop_end)) != JUMP_INSN
7283 || !condjump_p (PREV_INSN (loop_end))) {
7284 if (loop_dump_stream)
7285 fprintf (loop_dump_stream,
7286 "insert_bct: not instrumenting BCT because of invalid branch\n");
7290 /* fix increment in case loop was unrolled. */
7291 if (loop_unroll_factor [loop_num] > 1)
7292 increment = GEN_INT ( INTVAL (increment) * loop_unroll_factor [loop_num] );
7294 /* determine properties and directions of the loop */
7295 increment_direction = (INTVAL (increment) > 0) ? 1:-1;
7296 switch ( comparison_code ) {
7301 compare_direction = 1;
7308 compare_direction = -1;
7312 /* in this case we cannot know the number of iterations */
7313 if (loop_dump_stream)
7314 fprintf (loop_dump_stream,
7315 "insert_bct: %d: loop cannot be instrumented: == in condition\n",
7322 compare_direction = 1;
7328 compare_direction = -1;
7331 compare_direction = 0;
7338 /* make sure that the loop does not end by an overflow */
7339 if (compare_direction != increment_direction) {
7340 if (loop_dump_stream)
7341 fprintf (loop_dump_stream,
7342 "insert_bct: %d: loop cannot be instrumented: terminated by overflow\n",
7347 /* try to instrument the loop. */
7349 /* Handle the simpler case, where the bounds are known at compile time. */
7350 if (GET_CODE (initial_value) == CONST_INT && GET_CODE (comparison_value) == CONST_INT)
7353 int increment_value_abs = INTVAL (increment) * increment_direction;
7355 /* check the relation between compare-val and initial-val */
7356 int difference = INTVAL (comparison_value) - INTVAL (initial_value);
7357 int range_direction = (difference > 0) ? 1 : -1;
7359 /* make sure the loop executes enough iterations to gain from BCT */
7360 if (difference > -3 && difference < 3) {
7361 if (loop_dump_stream)
7362 fprintf (loop_dump_stream,
7363 "insert_bct: loop %d not BCT instrumented: too small iteration count.\n",
7368 /* make sure that the loop executes at least once */
7369 if ((range_direction == 1 && compare_direction == -1)
7370 || (range_direction == -1 && compare_direction == 1))
7372 if (loop_dump_stream)
7373 fprintf (loop_dump_stream,
7374 "insert_bct: loop %d: does not iterate even once. Not instrumenting.\n",
7379 /* make sure that the loop does not end by an overflow (in compile time
7380 bounds we must have an additional check for overflow, because here
7381 we also support the compare code of 'NE'. */
7382 if (comparison_code == NE
7383 && increment_direction != range_direction) {
7384 if (loop_dump_stream)
7385 fprintf (loop_dump_stream,
7386 "insert_bct (compile time bounds): %d: loop not instrumented: terminated by overflow\n",
7391 /* Determine the number of iterations by:
7393 ; compare-val - initial-val + (increment -1) + additional-iteration
7394 ; num_iterations = -----------------------------------------------------------------
7397 difference = (range_direction > 0) ? difference : -difference;
7399 fprintf (stderr, "difference is: %d\n", difference); /* @*/
7400 fprintf (stderr, "increment_value_abs is: %d\n", increment_value_abs); /* @*/
7401 fprintf (stderr, "add_iteration is: %d\n", add_iteration); /* @*/
7402 fprintf (stderr, "INTVAL (comparison_value) is: %d\n", INTVAL (comparison_value)); /* @*/
7403 fprintf (stderr, "INTVAL (initial_value) is: %d\n", INTVAL (initial_value)); /* @*/
7406 if (increment_value_abs == 0) {
7407 fprintf (stderr, "insert_bct: error: increment == 0 !!!\n");
7410 n_iterations = (difference + increment_value_abs - 1 + add_iteration)
7411 / increment_value_abs;
7414 fprintf (stderr, "number of iterations is: %d\n", n_iterations); /* @*/
7416 instrument_loop_bct (loop_start, loop_end, GEN_INT (n_iterations));
7418 /* Done with this loop. */
7422 /* Handle the more complex case, that the bounds are NOT known at compile time. */
7423 /* In this case we generate run_time calculation of the number of iterations */
7425 /* With runtime bounds, if the compare is of the form '!=' we give up */
7426 if (comparison_code == NE) {
7427 if (loop_dump_stream)
7428 fprintf (loop_dump_stream,
7429 "insert_bct: fail for loop %d: runtime bounds with != comparison\n",
7435 /* We rely on the existence of run-time guard to ensure that the
7436 loop executes at least once. */
7438 rtx iterations_num_reg;
7440 int increment_value_abs = INTVAL (increment) * increment_direction;
7442 /* make sure that the increment is a power of two, otherwise (an
7443 expensive) divide is needed. */
7444 if (exact_log2 (increment_value_abs) == -1)
7446 if (loop_dump_stream)
7447 fprintf (loop_dump_stream,
7448 "insert_bct: not instrumenting BCT because the increment is not power of 2\n");
7452 /* compute the number of iterations */
7455 /* CYGNUS LOCAL: HAIFA bug fix */
7458 /* Again, the number of iterations is calculated by:
7460 ; compare-val - initial-val + (increment -1) + additional-iteration
7461 ; num_iterations = -----------------------------------------------------------------
7464 /* ??? Do we have to call copy_rtx here before passing rtx to
7466 if (compare_direction > 0) {
7467 /* <, <= :the loop variable is increasing */
7468 temp_reg = expand_binop (loop_var_mode, sub_optab, comparison_value,
7469 initial_value, NULL_RTX, 0, OPTAB_LIB_WIDEN);
7472 temp_reg = expand_binop (loop_var_mode, sub_optab, initial_value,
7473 comparison_value, NULL_RTX, 0, OPTAB_LIB_WIDEN);
7476 if (increment_value_abs - 1 + add_iteration != 0)
7477 temp_reg = expand_binop (loop_var_mode, add_optab, temp_reg,
7478 GEN_INT (increment_value_abs - 1 + add_iteration),
7479 NULL_RTX, 0, OPTAB_LIB_WIDEN);
7481 if (increment_value_abs != 1)
7483 /* ??? This will generate an expensive divide instruction for
7484 most targets. The original authors apparently expected this
7485 to be a shift, since they test for power-of-2 divisors above,
7486 but just naively generating a divide instruction will not give
7487 a shift. It happens to work for the PowerPC target because
7488 the rs6000.md file has a divide pattern that emits shifts.
7489 It will probably not work for any other target. */
7490 iterations_num_reg = expand_binop (loop_var_mode, sdiv_optab,
7492 GEN_INT (increment_value_abs),
7493 NULL_RTX, 0, OPTAB_LIB_WIDEN);
7496 iterations_num_reg = temp_reg;
7497 /* END CYGNUS LOCAL: HAIFA bug fix */
7499 sequence = gen_sequence ();
7501 emit_insn_before (sequence, loop_start);
7502 instrument_loop_bct (loop_start, loop_end, iterations_num_reg);
7506 /* instrument loop by inserting a bct in it. This is done in the following way:
7507 1. A new register is created and assigned the hard register number of the count
7509 2. In the head of the loop the new variable is initialized by the value passed in the
7510 loop_num_iterations parameter.
7511 3. At the end of the loop, comparison of the register with 0 is generated.
7512 The created comparison follows the pattern defined for the
7513 decrement_and_branch_on_count insn, so this insn will be generated in assembly
7515 4. The compare&branch on the old variable is deleted. So, if the loop-variable was
7516 not used elsewhere, it will be eliminated by data-flow analisys. */
7519 instrument_loop_bct (loop_start, loop_end, loop_num_iterations)
7520 rtx loop_start, loop_end;
7521 rtx loop_num_iterations;
7523 rtx temp_reg1, temp_reg2;
7527 enum machine_mode loop_var_mode = SImode;
7529 #ifdef HAVE_decrement_and_branch_on_count
7530 if (HAVE_decrement_and_branch_on_count)
7532 if (loop_dump_stream)
7533 fprintf (loop_dump_stream, "Loop: Inserting BCT\n");
7535 /* eliminate the check on the old variable */
7536 delete_insn (PREV_INSN (loop_end));
7537 delete_insn (PREV_INSN (loop_end));
7539 /* insert the label which will delimit the start of the loop */
7540 start_label = gen_label_rtx ();
7541 emit_label_after (start_label, loop_start);
7543 /* insert initialization of the count register into the loop header */
7545 temp_reg1 = gen_reg_rtx (loop_var_mode);
7546 emit_insn (gen_move_insn (temp_reg1, loop_num_iterations));
7548 /* this will be count register */
7549 temp_reg2 = gen_rtx (REG, loop_var_mode, COUNT_REGISTER_REGNUM);
7550 /* we have to move the value to the count register from an GPR
7551 because rtx pointed to by loop_num_iterations could contain
7552 expression which cannot be moved into count register */
7553 emit_insn (gen_move_insn (temp_reg2, temp_reg1));
7555 sequence = gen_sequence ();
7557 emit_insn_after (sequence, loop_start);
7559 /* insert new comparison on the count register instead of the
7560 old one, generating the needed BCT pattern (that will be
7561 later recognized by assembly generation phase). */
7562 emit_jump_insn_before (gen_decrement_and_branch_on_count (temp_reg2, start_label),
7564 LABEL_NUSES (start_label)++;
7567 #endif /* HAVE_decrement_and_branch_on_count */
7571 /* Scan the function and determine whether it has indirect (computed) jumps.
7573 This is taken mostly from flow.c; similar code exists elsewhere
7574 in the compiler. It may be useful to put this into rtlanal.c. */
7576 indirect_jump_in_function_p (start)
7580 int is_indirect_jump = 0;
7582 for (insn = start; insn; insn = NEXT_INSN (insn))
7583 if (computed_jump_p (insn))
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