1 /* Perform various loop optimizations, including strength reduction.
2 Copyright (C) 1987, 1988, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
22 /* This is the loop optimization pass of the compiler.
23 It finds invariant computations within loops and moves them
24 to the beginning of the loop. Then it identifies basic and
25 general induction variables. Strength reduction is applied to the general
26 induction variables, and induction variable elimination is applied to
27 the basic induction variables.
29 It also finds cases where
30 a register is set within the loop by zero-extending a narrower value
31 and changes these to zero the entire register once before the loop
32 and merely copy the low part within the loop.
34 Most of the complexity is in heuristics to decide when it is worth
35 while to do these things. */
44 #include "hard-reg-set.h"
45 #include "basic-block.h"
46 #include "insn-config.h"
56 #include "insn-flags.h"
59 /* Not really meaningful values, but at least something. */
60 #ifndef SIMULTANEOUS_PREFETCHES
61 #define SIMULTANEOUS_PREFETCHES 3
63 #ifndef PREFETCH_BLOCK
64 #define PREFETCH_BLOCK 32
67 #define HAVE_prefetch 0
68 #define CODE_FOR_prefetch 0
69 #define gen_prefetch(a,b,c) (abort(), NULL_RTX)
72 /* Give up the prefetch optimizations once we exceed a given threshhold.
73 It is unlikely that we would be able to optimize something in a loop
74 with so many detected prefetches. */
75 #define MAX_PREFETCHES 100
76 /* The number of prefetch blocks that are beneficial to fetch at once before
77 a loop with a known (and low) iteration count. */
78 #define PREFETCH_BLOCKS_BEFORE_LOOP_MAX 6
79 /* For very tiny loops it is not worthwhile to prefetch even before the loop,
80 since it is likely that the data are already in the cache. */
81 #define PREFETCH_BLOCKS_BEFORE_LOOP_MIN 2
82 /* The minimal number of prefetch blocks that a loop must consume to make
83 the emitting of prefetch instruction in the body of loop worthwhile. */
84 #define PREFETCH_BLOCKS_IN_LOOP_MIN 6
86 /* Parameterize some prefetch heuristics so they can be turned on and off
87 easily for performance testing on new architecures. These can be
88 defined in target-dependent files. */
90 /* Prefetch is worthwhile only when loads/stores are dense. */
91 #ifndef PREFETCH_ONLY_DENSE_MEM
92 #define PREFETCH_ONLY_DENSE_MEM 1
95 /* Define what we mean by "dense" loads and stores; This value divided by 256
96 is the minimum percentage of memory references that worth prefetching. */
97 #ifndef PREFETCH_DENSE_MEM
98 #define PREFETCH_DENSE_MEM 220
101 /* Do not prefetch for a loop whose iteration count is known to be low. */
102 #ifndef PREFETCH_NO_LOW_LOOPCNT
103 #define PREFETCH_NO_LOW_LOOPCNT 1
106 /* Define what we mean by a "low" iteration count. */
107 #ifndef PREFETCH_LOW_LOOPCNT
108 #define PREFETCH_LOW_LOOPCNT 32
111 /* Do not prefetch for a loop that contains a function call; such a loop is
112 probably not an internal loop. */
113 #ifndef PREFETCH_NO_CALL
114 #define PREFETCH_NO_CALL 1
117 /* Do not prefetch accesses with an extreme stride. */
118 #ifndef PREFETCH_NO_EXTREME_STRIDE
119 #define PREFETCH_NO_EXTREME_STRIDE 1
122 /* Define what we mean by an "extreme" stride. */
123 #ifndef PREFETCH_EXTREME_STRIDE
124 #define PREFETCH_EXTREME_STRIDE 4096
127 /* Do not handle reversed order prefetches (negative stride). */
128 #ifndef PREFETCH_NO_REVERSE_ORDER
129 #define PREFETCH_NO_REVERSE_ORDER 1
132 /* Prefetch even if the GIV is not always executed. */
133 #ifndef PREFETCH_NOT_ALWAYS
134 #define PREFETCH_NOT_ALWAYS 0
137 /* If the loop requires more prefetches than the target can process in
138 parallel then don't prefetch anything in that loop. */
139 #ifndef PREFETCH_LIMIT_TO_SIMULTANEOUS
140 #define PREFETCH_LIMIT_TO_SIMULTANEOUS 1
143 #define LOOP_REG_LIFETIME(LOOP, REGNO) \
144 ((REGNO_LAST_LUID (REGNO) - REGNO_FIRST_LUID (REGNO)))
146 #define LOOP_REG_GLOBAL_P(LOOP, REGNO) \
147 ((REGNO_LAST_LUID (REGNO) > INSN_LUID ((LOOP)->end) \
148 || REGNO_FIRST_LUID (REGNO) < INSN_LUID ((LOOP)->start)))
150 #define LOOP_REGNO_NREGS(REGNO, SET_DEST) \
151 ((REGNO) < FIRST_PSEUDO_REGISTER \
152 ? HARD_REGNO_NREGS ((REGNO), GET_MODE (SET_DEST)) : 1)
155 /* Vector mapping INSN_UIDs to luids.
156 The luids are like uids but increase monotonically always.
157 We use them to see whether a jump comes from outside a given loop. */
161 /* Indexed by INSN_UID, contains the ordinal giving the (innermost) loop
162 number the insn is contained in. */
164 struct loop **uid_loop;
166 /* 1 + largest uid of any insn. */
168 int max_uid_for_loop;
170 /* 1 + luid of last insn. */
174 /* Number of loops detected in current function. Used as index to the
177 static int max_loop_num;
179 /* Bound on pseudo register number before loop optimization.
180 A pseudo has valid regscan info if its number is < max_reg_before_loop. */
181 unsigned int max_reg_before_loop;
183 /* The value to pass to the next call of reg_scan_update. */
184 static int loop_max_reg;
186 #define obstack_chunk_alloc xmalloc
187 #define obstack_chunk_free free
189 /* During the analysis of a loop, a chain of `struct movable's
190 is made to record all the movable insns found.
191 Then the entire chain can be scanned to decide which to move. */
195 rtx insn; /* A movable insn */
196 rtx set_src; /* The expression this reg is set from. */
197 rtx set_dest; /* The destination of this SET. */
198 rtx dependencies; /* When INSN is libcall, this is an EXPR_LIST
199 of any registers used within the LIBCALL. */
200 int consec; /* Number of consecutive following insns
201 that must be moved with this one. */
202 unsigned int regno; /* The register it sets */
203 short lifetime; /* lifetime of that register;
204 may be adjusted when matching movables
205 that load the same value are found. */
206 short savings; /* Number of insns we can move for this reg,
207 including other movables that force this
208 or match this one. */
209 unsigned int cond : 1; /* 1 if only conditionally movable */
210 unsigned int force : 1; /* 1 means MUST move this insn */
211 unsigned int global : 1; /* 1 means reg is live outside this loop */
212 /* If PARTIAL is 1, GLOBAL means something different:
213 that the reg is live outside the range from where it is set
214 to the following label. */
215 unsigned int done : 1; /* 1 inhibits further processing of this */
217 unsigned int partial : 1; /* 1 means this reg is used for zero-extending.
218 In particular, moving it does not make it
220 unsigned int move_insn : 1; /* 1 means that we call emit_move_insn to
221 load SRC, rather than copying INSN. */
222 unsigned int move_insn_first:1;/* Same as above, if this is necessary for the
223 first insn of a consecutive sets group. */
224 unsigned int is_equiv : 1; /* 1 means a REG_EQUIV is present on INSN. */
225 enum machine_mode savemode; /* Nonzero means it is a mode for a low part
226 that we should avoid changing when clearing
227 the rest of the reg. */
228 struct movable *match; /* First entry for same value */
229 struct movable *forces; /* An insn that must be moved if this is */
230 struct movable *next;
234 FILE *loop_dump_stream;
236 /* Forward declarations. */
238 static void invalidate_loops_containing_label PARAMS ((rtx));
239 static void find_and_verify_loops PARAMS ((rtx, struct loops *));
240 static void mark_loop_jump PARAMS ((rtx, struct loop *));
241 static void prescan_loop PARAMS ((struct loop *));
242 static int reg_in_basic_block_p PARAMS ((rtx, rtx));
243 static int consec_sets_invariant_p PARAMS ((const struct loop *,
245 static int labels_in_range_p PARAMS ((rtx, int));
246 static void count_one_set PARAMS ((struct loop_regs *, rtx, rtx, rtx *));
247 static void note_addr_stored PARAMS ((rtx, rtx, void *));
248 static void note_set_pseudo_multiple_uses PARAMS ((rtx, rtx, void *));
249 static int loop_reg_used_before_p PARAMS ((const struct loop *, rtx, rtx));
250 static void scan_loop PARAMS ((struct loop*, int));
252 static void replace_call_address PARAMS ((rtx, rtx, rtx));
254 static rtx skip_consec_insns PARAMS ((rtx, int));
255 static int libcall_benefit PARAMS ((rtx));
256 static void ignore_some_movables PARAMS ((struct loop_movables *));
257 static void force_movables PARAMS ((struct loop_movables *));
258 static void combine_movables PARAMS ((struct loop_movables *,
259 struct loop_regs *));
260 static int num_unmoved_movables PARAMS ((const struct loop *));
261 static int regs_match_p PARAMS ((rtx, rtx, struct loop_movables *));
262 static int rtx_equal_for_loop_p PARAMS ((rtx, rtx, struct loop_movables *,
263 struct loop_regs *));
264 static void add_label_notes PARAMS ((rtx, rtx));
265 static void move_movables PARAMS ((struct loop *loop, struct loop_movables *,
267 static void loop_movables_add PARAMS((struct loop_movables *,
269 static void loop_movables_free PARAMS((struct loop_movables *));
270 static int count_nonfixed_reads PARAMS ((const struct loop *, rtx));
271 static void loop_bivs_find PARAMS((struct loop *));
272 static void loop_bivs_init_find PARAMS((struct loop *));
273 static void loop_bivs_check PARAMS((struct loop *));
274 static void loop_givs_find PARAMS((struct loop *));
275 static void loop_givs_check PARAMS((struct loop *));
276 static int loop_biv_eliminable_p PARAMS((struct loop *, struct iv_class *,
278 static int loop_giv_reduce_benefit PARAMS((struct loop *, struct iv_class *,
279 struct induction *, rtx));
280 static void loop_givs_dead_check PARAMS((struct loop *, struct iv_class *));
281 static void loop_givs_reduce PARAMS((struct loop *, struct iv_class *));
282 static void loop_givs_rescan PARAMS((struct loop *, struct iv_class *,
284 static void loop_ivs_free PARAMS((struct loop *));
285 static void strength_reduce PARAMS ((struct loop *, int));
286 static void find_single_use_in_loop PARAMS ((struct loop_regs *, rtx, rtx));
287 static int valid_initial_value_p PARAMS ((rtx, rtx, int, rtx));
288 static void find_mem_givs PARAMS ((const struct loop *, rtx, rtx, int, int));
289 static void record_biv PARAMS ((struct loop *, struct induction *,
290 rtx, rtx, rtx, rtx, rtx *,
292 static void check_final_value PARAMS ((const struct loop *,
293 struct induction *));
294 static void loop_ivs_dump PARAMS((const struct loop *, FILE *, int));
295 static void loop_iv_class_dump PARAMS((const struct iv_class *, FILE *, int));
296 static void loop_biv_dump PARAMS((const struct induction *, FILE *, int));
297 static void loop_giv_dump PARAMS((const struct induction *, FILE *, int));
298 static void record_giv PARAMS ((const struct loop *, struct induction *,
299 rtx, rtx, rtx, rtx, rtx, rtx, int,
300 enum g_types, int, int, rtx *));
301 static void update_giv_derive PARAMS ((const struct loop *, rtx));
302 static void check_ext_dependent_givs PARAMS ((struct iv_class *,
303 struct loop_info *));
304 static int basic_induction_var PARAMS ((const struct loop *, rtx,
305 enum machine_mode, rtx, rtx,
306 rtx *, rtx *, rtx **));
307 static rtx simplify_giv_expr PARAMS ((const struct loop *, rtx, rtx *, int *));
308 static int general_induction_var PARAMS ((const struct loop *loop, rtx, rtx *,
309 rtx *, rtx *, rtx *, int, int *,
311 static int consec_sets_giv PARAMS ((const struct loop *, int, rtx,
312 rtx, rtx, rtx *, rtx *, rtx *, rtx *));
313 static int check_dbra_loop PARAMS ((struct loop *, int));
314 static rtx express_from_1 PARAMS ((rtx, rtx, rtx));
315 static rtx combine_givs_p PARAMS ((struct induction *, struct induction *));
316 static int cmp_combine_givs_stats PARAMS ((const PTR, const PTR));
317 static void combine_givs PARAMS ((struct loop_regs *, struct iv_class *));
318 static int product_cheap_p PARAMS ((rtx, rtx));
319 static int maybe_eliminate_biv PARAMS ((const struct loop *, struct iv_class *,
321 static int maybe_eliminate_biv_1 PARAMS ((const struct loop *, rtx, rtx,
322 struct iv_class *, int,
324 static int last_use_this_basic_block PARAMS ((rtx, rtx));
325 static void record_initial PARAMS ((rtx, rtx, void *));
326 static void update_reg_last_use PARAMS ((rtx, rtx));
327 static rtx next_insn_in_loop PARAMS ((const struct loop *, rtx));
328 static void loop_regs_scan PARAMS ((const struct loop *, int));
329 static int count_insns_in_loop PARAMS ((const struct loop *));
330 static void load_mems PARAMS ((const struct loop *));
331 static int insert_loop_mem PARAMS ((rtx *, void *));
332 static int replace_loop_mem PARAMS ((rtx *, void *));
333 static void replace_loop_mems PARAMS ((rtx, rtx, rtx));
334 static int replace_loop_reg PARAMS ((rtx *, void *));
335 static void replace_loop_regs PARAMS ((rtx insn, rtx, rtx));
336 static void note_reg_stored PARAMS ((rtx, rtx, void *));
337 static void try_copy_prop PARAMS ((const struct loop *, rtx, unsigned int));
338 static void try_swap_copy_prop PARAMS ((const struct loop *, rtx,
340 static int replace_label PARAMS ((rtx *, void *));
341 static rtx check_insn_for_givs PARAMS((struct loop *, rtx, int, int));
342 static rtx check_insn_for_bivs PARAMS((struct loop *, rtx, int, int));
343 static rtx gen_add_mult PARAMS ((rtx, rtx, rtx, rtx));
344 static void loop_regs_update PARAMS ((const struct loop *, rtx));
345 static int iv_add_mult_cost PARAMS ((rtx, rtx, rtx, rtx));
347 static rtx loop_insn_emit_after PARAMS((const struct loop *, basic_block,
349 static rtx loop_call_insn_emit_before PARAMS((const struct loop *,
350 basic_block, rtx, rtx));
351 static rtx loop_call_insn_hoist PARAMS((const struct loop *, rtx));
352 static rtx loop_insn_sink_or_swim PARAMS((const struct loop *, rtx));
354 static void loop_dump_aux PARAMS ((const struct loop *, FILE *, int));
355 static void loop_delete_insns PARAMS ((rtx, rtx));
356 static HOST_WIDE_INT remove_constant_addition PARAMS ((rtx *));
357 void debug_ivs PARAMS ((const struct loop *));
358 void debug_iv_class PARAMS ((const struct iv_class *));
359 void debug_biv PARAMS ((const struct induction *));
360 void debug_giv PARAMS ((const struct induction *));
361 void debug_loop PARAMS ((const struct loop *));
362 void debug_loops PARAMS ((const struct loops *));
364 typedef struct rtx_pair
370 typedef struct loop_replace_args
377 /* Nonzero iff INSN is between START and END, inclusive. */
378 #define INSN_IN_RANGE_P(INSN, START, END) \
379 (INSN_UID (INSN) < max_uid_for_loop \
380 && INSN_LUID (INSN) >= INSN_LUID (START) \
381 && INSN_LUID (INSN) <= INSN_LUID (END))
383 /* Indirect_jump_in_function is computed once per function. */
384 static int indirect_jump_in_function;
385 static int indirect_jump_in_function_p PARAMS ((rtx));
387 static int compute_luids PARAMS ((rtx, rtx, int));
389 static int biv_elimination_giv_has_0_offset PARAMS ((struct induction *,
393 /* Benefit penalty, if a giv is not replaceable, i.e. must emit an insn to
394 copy the value of the strength reduced giv to its original register. */
395 static int copy_cost;
397 /* Cost of using a register, to normalize the benefits of a giv. */
398 static int reg_address_cost;
403 rtx reg = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 1);
405 reg_address_cost = address_cost (reg, SImode);
407 copy_cost = COSTS_N_INSNS (1);
410 /* Compute the mapping from uids to luids.
411 LUIDs are numbers assigned to insns, like uids,
412 except that luids increase monotonically through the code.
413 Start at insn START and stop just before END. Assign LUIDs
414 starting with PREV_LUID + 1. Return the last assigned LUID + 1. */
416 compute_luids (start, end, prev_luid)
423 for (insn = start, i = prev_luid; insn != end; insn = NEXT_INSN (insn))
425 if (INSN_UID (insn) >= max_uid_for_loop)
427 /* Don't assign luids to line-number NOTEs, so that the distance in
428 luids between two insns is not affected by -g. */
429 if (GET_CODE (insn) != NOTE
430 || NOTE_LINE_NUMBER (insn) <= 0)
431 uid_luid[INSN_UID (insn)] = ++i;
433 /* Give a line number note the same luid as preceding insn. */
434 uid_luid[INSN_UID (insn)] = i;
439 /* Entry point of this file. Perform loop optimization
440 on the current function. F is the first insn of the function
441 and DUMPFILE is a stream for output of a trace of actions taken
442 (or 0 if none should be output). */
445 loop_optimize (f, dumpfile, flags)
446 /* f is the first instruction of a chain of insns for one function */
453 struct loops loops_data;
454 struct loops *loops = &loops_data;
455 struct loop_info *loops_info;
457 loop_dump_stream = dumpfile;
459 init_recog_no_volatile ();
461 max_reg_before_loop = max_reg_num ();
462 loop_max_reg = max_reg_before_loop;
466 /* Count the number of loops. */
469 for (insn = f; insn; insn = NEXT_INSN (insn))
471 if (GET_CODE (insn) == NOTE
472 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
476 /* Don't waste time if no loops. */
477 if (max_loop_num == 0)
480 loops->num = max_loop_num;
482 /* Get size to use for tables indexed by uids.
483 Leave some space for labels allocated by find_and_verify_loops. */
484 max_uid_for_loop = get_max_uid () + 1 + max_loop_num * 32;
486 uid_luid = (int *) xcalloc (max_uid_for_loop, sizeof (int));
487 uid_loop = (struct loop **) xcalloc (max_uid_for_loop,
488 sizeof (struct loop *));
490 /* Allocate storage for array of loops. */
491 loops->array = (struct loop *)
492 xcalloc (loops->num, sizeof (struct loop));
494 /* Find and process each loop.
495 First, find them, and record them in order of their beginnings. */
496 find_and_verify_loops (f, loops);
498 /* Allocate and initialize auxiliary loop information. */
499 loops_info = xcalloc (loops->num, sizeof (struct loop_info));
500 for (i = 0; i < loops->num; i++)
501 loops->array[i].aux = loops_info + i;
503 /* Now find all register lifetimes. This must be done after
504 find_and_verify_loops, because it might reorder the insns in the
506 reg_scan (f, max_reg_before_loop, 1);
508 /* This must occur after reg_scan so that registers created by gcse
509 will have entries in the register tables.
511 We could have added a call to reg_scan after gcse_main in toplev.c,
512 but moving this call to init_alias_analysis is more efficient. */
513 init_alias_analysis ();
515 /* See if we went too far. Note that get_max_uid already returns
516 one more that the maximum uid of all insn. */
517 if (get_max_uid () > max_uid_for_loop)
519 /* Now reset it to the actual size we need. See above. */
520 max_uid_for_loop = get_max_uid ();
522 /* find_and_verify_loops has already called compute_luids, but it
523 might have rearranged code afterwards, so we need to recompute
525 max_luid = compute_luids (f, NULL_RTX, 0);
527 /* Don't leave gaps in uid_luid for insns that have been
528 deleted. It is possible that the first or last insn
529 using some register has been deleted by cross-jumping.
530 Make sure that uid_luid for that former insn's uid
531 points to the general area where that insn used to be. */
532 for (i = 0; i < max_uid_for_loop; i++)
534 uid_luid[0] = uid_luid[i];
535 if (uid_luid[0] != 0)
538 for (i = 0; i < max_uid_for_loop; i++)
539 if (uid_luid[i] == 0)
540 uid_luid[i] = uid_luid[i - 1];
542 /* Determine if the function has indirect jump. On some systems
543 this prevents low overhead loop instructions from being used. */
544 indirect_jump_in_function = indirect_jump_in_function_p (f);
546 /* Now scan the loops, last ones first, since this means inner ones are done
547 before outer ones. */
548 for (i = max_loop_num - 1; i >= 0; i--)
550 struct loop *loop = &loops->array[i];
552 if (! loop->invalid && loop->end)
553 scan_loop (loop, flags);
556 /* If there were lexical blocks inside the loop, they have been
557 replicated. We will now have more than one NOTE_INSN_BLOCK_BEG
558 and NOTE_INSN_BLOCK_END for each such block. We must duplicate
559 the BLOCKs as well. */
560 if (write_symbols != NO_DEBUG)
563 end_alias_analysis ();
572 /* Returns the next insn, in execution order, after INSN. START and
573 END are the NOTE_INSN_LOOP_BEG and NOTE_INSN_LOOP_END for the loop,
574 respectively. LOOP->TOP, if non-NULL, is the top of the loop in the
575 insn-stream; it is used with loops that are entered near the
579 next_insn_in_loop (loop, insn)
580 const struct loop *loop;
583 insn = NEXT_INSN (insn);
585 if (insn == loop->end)
588 /* Go to the top of the loop, and continue there. */
595 if (insn == loop->scan_start)
602 /* Optimize one loop described by LOOP. */
604 /* ??? Could also move memory writes out of loops if the destination address
605 is invariant, the source is invariant, the memory write is not volatile,
606 and if we can prove that no read inside the loop can read this address
607 before the write occurs. If there is a read of this address after the
608 write, then we can also mark the memory read as invariant. */
611 scan_loop (loop, flags)
615 struct loop_info *loop_info = LOOP_INFO (loop);
616 struct loop_regs *regs = LOOP_REGS (loop);
618 rtx loop_start = loop->start;
619 rtx loop_end = loop->end;
621 /* 1 if we are scanning insns that could be executed zero times. */
623 /* 1 if we are scanning insns that might never be executed
624 due to a subroutine call which might exit before they are reached. */
626 /* Jump insn that enters the loop, or 0 if control drops in. */
627 rtx loop_entry_jump = 0;
628 /* Number of insns in the loop. */
631 rtx temp, update_start, update_end;
632 /* The SET from an insn, if it is the only SET in the insn. */
634 /* Chain describing insns movable in current loop. */
635 struct loop_movables *movables = LOOP_MOVABLES (loop);
636 /* Ratio of extra register life span we can justify
637 for saving an instruction. More if loop doesn't call subroutines
638 since in that case saving an insn makes more difference
639 and more registers are available. */
641 /* Nonzero if we are scanning instructions in a sub-loop. */
649 /* Determine whether this loop starts with a jump down to a test at
650 the end. This will occur for a small number of loops with a test
651 that is too complex to duplicate in front of the loop.
653 We search for the first insn or label in the loop, skipping NOTEs.
654 However, we must be careful not to skip past a NOTE_INSN_LOOP_BEG
655 (because we might have a loop executed only once that contains a
656 loop which starts with a jump to its exit test) or a NOTE_INSN_LOOP_END
657 (in case we have a degenerate loop).
659 Note that if we mistakenly think that a loop is entered at the top
660 when, in fact, it is entered at the exit test, the only effect will be
661 slightly poorer optimization. Making the opposite error can generate
662 incorrect code. Since very few loops now start with a jump to the
663 exit test, the code here to detect that case is very conservative. */
665 for (p = NEXT_INSN (loop_start);
667 && GET_CODE (p) != CODE_LABEL && ! INSN_P (p)
668 && (GET_CODE (p) != NOTE
669 || (NOTE_LINE_NUMBER (p) != NOTE_INSN_LOOP_BEG
670 && NOTE_LINE_NUMBER (p) != NOTE_INSN_LOOP_END));
674 loop->scan_start = p;
676 /* If loop end is the end of the current function, then emit a
677 NOTE_INSN_DELETED after loop_end and set loop->sink to the dummy
678 note insn. This is the position we use when sinking insns out of
680 if (NEXT_INSN (loop->end) != 0)
681 loop->sink = NEXT_INSN (loop->end);
683 loop->sink = emit_note_after (NOTE_INSN_DELETED, loop->end);
685 /* Set up variables describing this loop. */
687 threshold = (loop_info->has_call ? 1 : 2) * (1 + n_non_fixed_regs);
689 /* If loop has a jump before the first label,
690 the true entry is the target of that jump.
691 Start scan from there.
692 But record in LOOP->TOP the place where the end-test jumps
693 back to so we can scan that after the end of the loop. */
694 if (GET_CODE (p) == JUMP_INSN)
698 /* Loop entry must be unconditional jump (and not a RETURN) */
699 if (any_uncondjump_p (p)
700 && JUMP_LABEL (p) != 0
701 /* Check to see whether the jump actually
702 jumps out of the loop (meaning it's no loop).
703 This case can happen for things like
704 do {..} while (0). If this label was generated previously
705 by loop, we can't tell anything about it and have to reject
707 && INSN_IN_RANGE_P (JUMP_LABEL (p), loop_start, loop_end))
709 loop->top = next_label (loop->scan_start);
710 loop->scan_start = JUMP_LABEL (p);
714 /* If LOOP->SCAN_START was an insn created by loop, we don't know its luid
715 as required by loop_reg_used_before_p. So skip such loops. (This
716 test may never be true, but it's best to play it safe.)
718 Also, skip loops where we do not start scanning at a label. This
719 test also rejects loops starting with a JUMP_INSN that failed the
722 if (INSN_UID (loop->scan_start) >= max_uid_for_loop
723 || GET_CODE (loop->scan_start) != CODE_LABEL)
725 if (loop_dump_stream)
726 fprintf (loop_dump_stream, "\nLoop from %d to %d is phony.\n\n",
727 INSN_UID (loop_start), INSN_UID (loop_end));
731 /* Allocate extra space for REGs that might be created by load_mems.
732 We allocate a little extra slop as well, in the hopes that we
733 won't have to reallocate the regs array. */
734 loop_regs_scan (loop, loop_info->mems_idx + 16);
735 insn_count = count_insns_in_loop (loop);
737 if (loop_dump_stream)
739 fprintf (loop_dump_stream, "\nLoop from %d to %d: %d real insns.\n",
740 INSN_UID (loop_start), INSN_UID (loop_end), insn_count);
742 fprintf (loop_dump_stream, "Continue at insn %d.\n",
743 INSN_UID (loop->cont));
746 /* Scan through the loop finding insns that are safe to move.
747 Set REGS->ARRAY[I].SET_IN_LOOP negative for the reg I being set, so that
748 this reg will be considered invariant for subsequent insns.
749 We consider whether subsequent insns use the reg
750 in deciding whether it is worth actually moving.
752 MAYBE_NEVER is nonzero if we have passed a conditional jump insn
753 and therefore it is possible that the insns we are scanning
754 would never be executed. At such times, we must make sure
755 that it is safe to execute the insn once instead of zero times.
756 When MAYBE_NEVER is 0, all insns will be executed at least once
757 so that is not a problem. */
759 for (p = next_insn_in_loop (loop, loop->scan_start);
761 p = next_insn_in_loop (loop, p))
763 if (GET_CODE (p) == INSN
764 && (set = single_set (p))
765 && GET_CODE (SET_DEST (set)) == REG
766 #ifdef PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
767 && SET_DEST (set) != pic_offset_table_rtx
769 && ! regs->array[REGNO (SET_DEST (set))].may_not_optimize)
774 rtx src = SET_SRC (set);
775 rtx dependencies = 0;
777 /* Figure out what to use as a source of this insn. If a REG_EQUIV
778 note is given or if a REG_EQUAL note with a constant operand is
779 specified, use it as the source and mark that we should move
780 this insn by calling emit_move_insn rather that duplicating the
783 Otherwise, only use the REG_EQUAL contents if a REG_RETVAL note
785 temp = find_reg_note (p, REG_EQUIV, NULL_RTX);
787 src = XEXP (temp, 0), move_insn = 1;
790 temp = find_reg_note (p, REG_EQUAL, NULL_RTX);
791 if (temp && CONSTANT_P (XEXP (temp, 0)))
792 src = XEXP (temp, 0), move_insn = 1;
793 if (temp && find_reg_note (p, REG_RETVAL, NULL_RTX))
795 src = XEXP (temp, 0);
796 /* A libcall block can use regs that don't appear in
797 the equivalent expression. To move the libcall,
798 we must move those regs too. */
799 dependencies = libcall_other_reg (p, src);
803 /* For parallels, add any possible uses to the depencies, as we can't move
804 the insn without resolving them first. */
805 if (GET_CODE (PATTERN (p)) == PARALLEL)
807 for (i = 0; i < XVECLEN (PATTERN (p), 0); i++)
809 rtx x = XVECEXP (PATTERN (p), 0, i);
810 if (GET_CODE (x) == USE)
811 dependencies = gen_rtx_EXPR_LIST (VOIDmode, XEXP (x, 0), dependencies);
815 /* Don't try to optimize a register that was made
816 by loop-optimization for an inner loop.
817 We don't know its life-span, so we can't compute the benefit. */
818 if (REGNO (SET_DEST (set)) >= max_reg_before_loop)
820 else if (/* The register is used in basic blocks other
821 than the one where it is set (meaning that
822 something after this point in the loop might
823 depend on its value before the set). */
824 ! reg_in_basic_block_p (p, SET_DEST (set))
825 /* And the set is not guaranteed to be executed once
826 the loop starts, or the value before the set is
827 needed before the set occurs...
829 ??? Note we have quadratic behaviour here, mitigated
830 by the fact that the previous test will often fail for
831 large loops. Rather than re-scanning the entire loop
832 each time for register usage, we should build tables
833 of the register usage and use them here instead. */
835 || loop_reg_used_before_p (loop, set, p)))
836 /* It is unsafe to move the set.
838 This code used to consider it OK to move a set of a variable
839 which was not created by the user and not used in an exit test.
840 That behavior is incorrect and was removed. */
842 else if ((tem = loop_invariant_p (loop, src))
843 && (dependencies == 0
844 || (tem2 = loop_invariant_p (loop, dependencies)) != 0)
845 && (regs->array[REGNO (SET_DEST (set))].set_in_loop == 1
847 = consec_sets_invariant_p
848 (loop, SET_DEST (set),
849 regs->array[REGNO (SET_DEST (set))].set_in_loop,
851 /* If the insn can cause a trap (such as divide by zero),
852 can't move it unless it's guaranteed to be executed
853 once loop is entered. Even a function call might
854 prevent the trap insn from being reached
855 (since it might exit!) */
856 && ! ((maybe_never || call_passed)
857 && may_trap_p (src)))
860 int regno = REGNO (SET_DEST (set));
862 /* A potential lossage is where we have a case where two insns
863 can be combined as long as they are both in the loop, but
864 we move one of them outside the loop. For large loops,
865 this can lose. The most common case of this is the address
866 of a function being called.
868 Therefore, if this register is marked as being used exactly
869 once if we are in a loop with calls (a "large loop"), see if
870 we can replace the usage of this register with the source
871 of this SET. If we can, delete this insn.
873 Don't do this if P has a REG_RETVAL note or if we have
874 SMALL_REGISTER_CLASSES and SET_SRC is a hard register. */
876 if (loop_info->has_call
877 && regs->array[regno].single_usage != 0
878 && regs->array[regno].single_usage != const0_rtx
879 && REGNO_FIRST_UID (regno) == INSN_UID (p)
880 && (REGNO_LAST_UID (regno)
881 == INSN_UID (regs->array[regno].single_usage))
882 && regs->array[regno].set_in_loop == 1
883 && GET_CODE (SET_SRC (set)) != ASM_OPERANDS
884 && ! side_effects_p (SET_SRC (set))
885 && ! find_reg_note (p, REG_RETVAL, NULL_RTX)
886 && (! SMALL_REGISTER_CLASSES
887 || (! (GET_CODE (SET_SRC (set)) == REG
888 && REGNO (SET_SRC (set)) < FIRST_PSEUDO_REGISTER)))
889 /* This test is not redundant; SET_SRC (set) might be
890 a call-clobbered register and the life of REGNO
891 might span a call. */
892 && ! modified_between_p (SET_SRC (set), p,
893 regs->array[regno].single_usage)
894 && no_labels_between_p (p, regs->array[regno].single_usage)
895 && validate_replace_rtx (SET_DEST (set), SET_SRC (set),
896 regs->array[regno].single_usage))
898 /* Replace any usage in a REG_EQUAL note. Must copy the
899 new source, so that we don't get rtx sharing between the
900 SET_SOURCE and REG_NOTES of insn p. */
901 REG_NOTES (regs->array[regno].single_usage)
902 = replace_rtx (REG_NOTES (regs->array[regno].single_usage),
903 SET_DEST (set), copy_rtx (SET_SRC (set)));
906 for (i = 0; i < LOOP_REGNO_NREGS (regno, SET_DEST (set)); i++)
907 regs->array[regno+i].set_in_loop = 0;
911 m = (struct movable *) xmalloc (sizeof (struct movable));
915 m->dependencies = dependencies;
916 m->set_dest = SET_DEST (set);
918 m->consec = regs->array[REGNO (SET_DEST (set))].set_in_loop - 1;
922 m->move_insn = move_insn;
923 m->move_insn_first = 0;
924 m->is_equiv = (find_reg_note (p, REG_EQUIV, NULL_RTX) != 0);
925 m->savemode = VOIDmode;
927 /* Set M->cond if either loop_invariant_p
928 or consec_sets_invariant_p returned 2
929 (only conditionally invariant). */
930 m->cond = ((tem | tem1 | tem2) > 1);
931 m->global = LOOP_REG_GLOBAL_P (loop, regno);
933 m->lifetime = LOOP_REG_LIFETIME (loop, regno);
934 m->savings = regs->array[regno].n_times_set;
935 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
936 m->savings += libcall_benefit (p);
937 for (i = 0; i < LOOP_REGNO_NREGS (regno, SET_DEST (set)); i++)
938 regs->array[regno+i].set_in_loop = move_insn ? -2 : -1;
939 /* Add M to the end of the chain MOVABLES. */
940 loop_movables_add (movables, m);
944 /* It is possible for the first instruction to have a
945 REG_EQUAL note but a non-invariant SET_SRC, so we must
946 remember the status of the first instruction in case
947 the last instruction doesn't have a REG_EQUAL note. */
948 m->move_insn_first = m->move_insn;
950 /* Skip this insn, not checking REG_LIBCALL notes. */
951 p = next_nonnote_insn (p);
952 /* Skip the consecutive insns, if there are any. */
953 p = skip_consec_insns (p, m->consec);
954 /* Back up to the last insn of the consecutive group. */
955 p = prev_nonnote_insn (p);
957 /* We must now reset m->move_insn, m->is_equiv, and possibly
958 m->set_src to correspond to the effects of all the
960 temp = find_reg_note (p, REG_EQUIV, NULL_RTX);
962 m->set_src = XEXP (temp, 0), m->move_insn = 1;
965 temp = find_reg_note (p, REG_EQUAL, NULL_RTX);
966 if (temp && CONSTANT_P (XEXP (temp, 0)))
967 m->set_src = XEXP (temp, 0), m->move_insn = 1;
972 m->is_equiv = (find_reg_note (p, REG_EQUIV, NULL_RTX) != 0);
975 /* If this register is always set within a STRICT_LOW_PART
976 or set to zero, then its high bytes are constant.
977 So clear them outside the loop and within the loop
978 just load the low bytes.
979 We must check that the machine has an instruction to do so.
980 Also, if the value loaded into the register
981 depends on the same register, this cannot be done. */
982 else if (SET_SRC (set) == const0_rtx
983 && GET_CODE (NEXT_INSN (p)) == INSN
984 && (set1 = single_set (NEXT_INSN (p)))
985 && GET_CODE (set1) == SET
986 && (GET_CODE (SET_DEST (set1)) == STRICT_LOW_PART)
987 && (GET_CODE (XEXP (SET_DEST (set1), 0)) == SUBREG)
988 && (SUBREG_REG (XEXP (SET_DEST (set1), 0))
990 && !reg_mentioned_p (SET_DEST (set), SET_SRC (set1)))
992 int regno = REGNO (SET_DEST (set));
993 if (regs->array[regno].set_in_loop == 2)
996 m = (struct movable *) xmalloc (sizeof (struct movable));
999 m->set_dest = SET_DEST (set);
1000 m->dependencies = 0;
1006 m->move_insn_first = 0;
1008 /* If the insn may not be executed on some cycles,
1009 we can't clear the whole reg; clear just high part.
1010 Not even if the reg is used only within this loop.
1017 Clearing x before the inner loop could clobber a value
1018 being saved from the last time around the outer loop.
1019 However, if the reg is not used outside this loop
1020 and all uses of the register are in the same
1021 basic block as the store, there is no problem.
1023 If this insn was made by loop, we don't know its
1024 INSN_LUID and hence must make a conservative
1026 m->global = (INSN_UID (p) >= max_uid_for_loop
1027 || LOOP_REG_GLOBAL_P (loop, regno)
1028 || (labels_in_range_p
1029 (p, REGNO_FIRST_LUID (regno))));
1030 if (maybe_never && m->global)
1031 m->savemode = GET_MODE (SET_SRC (set1));
1033 m->savemode = VOIDmode;
1037 m->lifetime = LOOP_REG_LIFETIME (loop, regno);
1039 for (i = 0; i < LOOP_REGNO_NREGS (regno, SET_DEST (set)); i++)
1040 regs->array[regno+i].set_in_loop = -1;
1041 /* Add M to the end of the chain MOVABLES. */
1042 loop_movables_add (movables, m);
1046 /* Past a call insn, we get to insns which might not be executed
1047 because the call might exit. This matters for insns that trap.
1048 Constant and pure call insns always return, so they don't count. */
1049 else if (GET_CODE (p) == CALL_INSN && ! CONST_OR_PURE_CALL_P (p))
1051 /* Past a label or a jump, we get to insns for which we
1052 can't count on whether or how many times they will be
1053 executed during each iteration. Therefore, we can
1054 only move out sets of trivial variables
1055 (those not used after the loop). */
1056 /* Similar code appears twice in strength_reduce. */
1057 else if ((GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN)
1058 /* If we enter the loop in the middle, and scan around to the
1059 beginning, don't set maybe_never for that. This must be an
1060 unconditional jump, otherwise the code at the top of the
1061 loop might never be executed. Unconditional jumps are
1062 followed by a barrier then the loop_end. */
1063 && ! (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p) == loop->top
1064 && NEXT_INSN (NEXT_INSN (p)) == loop_end
1065 && any_uncondjump_p (p)))
1067 else if (GET_CODE (p) == NOTE)
1069 /* At the virtual top of a converted loop, insns are again known to
1070 be executed: logically, the loop begins here even though the exit
1071 code has been duplicated. */
1072 if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP && loop_depth == 0)
1073 maybe_never = call_passed = 0;
1074 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
1076 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
1081 /* If one movable subsumes another, ignore that other. */
1083 ignore_some_movables (movables);
1085 /* For each movable insn, see if the reg that it loads
1086 leads when it dies right into another conditionally movable insn.
1087 If so, record that the second insn "forces" the first one,
1088 since the second can be moved only if the first is. */
1090 force_movables (movables);
1092 /* See if there are multiple movable insns that load the same value.
1093 If there are, make all but the first point at the first one
1094 through the `match' field, and add the priorities of them
1095 all together as the priority of the first. */
1097 combine_movables (movables, regs);
1099 /* Now consider each movable insn to decide whether it is worth moving.
1100 Store 0 in regs->array[I].set_in_loop for each reg I that is moved.
1102 Generally this increases code size, so do not move moveables when
1103 optimizing for code size. */
1105 if (! optimize_size)
1107 move_movables (loop, movables, threshold, insn_count);
1109 /* Recalculate regs->array if move_movables has created new
1111 if (max_reg_num () > regs->num)
1113 loop_regs_scan (loop, 0);
1114 for (update_start = loop_start;
1115 PREV_INSN (update_start)
1116 && GET_CODE (PREV_INSN (update_start)) != CODE_LABEL;
1117 update_start = PREV_INSN (update_start))
1119 update_end = NEXT_INSN (loop_end);
1121 reg_scan_update (update_start, update_end, loop_max_reg);
1122 loop_max_reg = max_reg_num ();
1126 /* Now candidates that still are negative are those not moved.
1127 Change regs->array[I].set_in_loop to indicate that those are not actually
1129 for (i = 0; i < regs->num; i++)
1130 if (regs->array[i].set_in_loop < 0)
1131 regs->array[i].set_in_loop = regs->array[i].n_times_set;
1133 /* Now that we've moved some things out of the loop, we might be able to
1134 hoist even more memory references. */
1137 /* Recalculate regs->array if load_mems has created new registers. */
1138 if (max_reg_num () > regs->num)
1139 loop_regs_scan (loop, 0);
1141 for (update_start = loop_start;
1142 PREV_INSN (update_start)
1143 && GET_CODE (PREV_INSN (update_start)) != CODE_LABEL;
1144 update_start = PREV_INSN (update_start))
1146 update_end = NEXT_INSN (loop_end);
1148 reg_scan_update (update_start, update_end, loop_max_reg);
1149 loop_max_reg = max_reg_num ();
1151 if (flag_strength_reduce)
1153 if (update_end && GET_CODE (update_end) == CODE_LABEL)
1154 /* Ensure our label doesn't go away. */
1155 LABEL_NUSES (update_end)++;
1157 strength_reduce (loop, flags);
1159 reg_scan_update (update_start, update_end, loop_max_reg);
1160 loop_max_reg = max_reg_num ();
1162 if (update_end && GET_CODE (update_end) == CODE_LABEL
1163 && --LABEL_NUSES (update_end) == 0)
1164 delete_related_insns (update_end);
1168 /* The movable information is required for strength reduction. */
1169 loop_movables_free (movables);
1176 /* Add elements to *OUTPUT to record all the pseudo-regs
1177 mentioned in IN_THIS but not mentioned in NOT_IN_THIS. */
1180 record_excess_regs (in_this, not_in_this, output)
1181 rtx in_this, not_in_this;
1188 code = GET_CODE (in_this);
1202 if (REGNO (in_this) >= FIRST_PSEUDO_REGISTER
1203 && ! reg_mentioned_p (in_this, not_in_this))
1204 *output = gen_rtx_EXPR_LIST (VOIDmode, in_this, *output);
1211 fmt = GET_RTX_FORMAT (code);
1212 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1219 for (j = 0; j < XVECLEN (in_this, i); j++)
1220 record_excess_regs (XVECEXP (in_this, i, j), not_in_this, output);
1224 record_excess_regs (XEXP (in_this, i), not_in_this, output);
1230 /* Check what regs are referred to in the libcall block ending with INSN,
1231 aside from those mentioned in the equivalent value.
1232 If there are none, return 0.
1233 If there are one or more, return an EXPR_LIST containing all of them. */
1236 libcall_other_reg (insn, equiv)
1239 rtx note = find_reg_note (insn, REG_RETVAL, NULL_RTX);
1240 rtx p = XEXP (note, 0);
1243 /* First, find all the regs used in the libcall block
1244 that are not mentioned as inputs to the result. */
1248 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
1249 || GET_CODE (p) == CALL_INSN)
1250 record_excess_regs (PATTERN (p), equiv, &output);
1257 /* Return 1 if all uses of REG
1258 are between INSN and the end of the basic block. */
1261 reg_in_basic_block_p (insn, reg)
1264 int regno = REGNO (reg);
1267 if (REGNO_FIRST_UID (regno) != INSN_UID (insn))
1270 /* Search this basic block for the already recorded last use of the reg. */
1271 for (p = insn; p; p = NEXT_INSN (p))
1273 switch (GET_CODE (p))
1280 /* Ordinary insn: if this is the last use, we win. */
1281 if (REGNO_LAST_UID (regno) == INSN_UID (p))
1286 /* Jump insn: if this is the last use, we win. */
1287 if (REGNO_LAST_UID (regno) == INSN_UID (p))
1289 /* Otherwise, it's the end of the basic block, so we lose. */
1294 /* It's the end of the basic block, so we lose. */
1302 /* The "last use" that was recorded can't be found after the first
1303 use. This can happen when the last use was deleted while
1304 processing an inner loop, this inner loop was then completely
1305 unrolled, and the outer loop is always exited after the inner loop,
1306 so that everything after the first use becomes a single basic block. */
1310 /* Compute the benefit of eliminating the insns in the block whose
1311 last insn is LAST. This may be a group of insns used to compute a
1312 value directly or can contain a library call. */
1315 libcall_benefit (last)
1321 for (insn = XEXP (find_reg_note (last, REG_RETVAL, NULL_RTX), 0);
1322 insn != last; insn = NEXT_INSN (insn))
1324 if (GET_CODE (insn) == CALL_INSN)
1325 benefit += 10; /* Assume at least this many insns in a library
1327 else if (GET_CODE (insn) == INSN
1328 && GET_CODE (PATTERN (insn)) != USE
1329 && GET_CODE (PATTERN (insn)) != CLOBBER)
1336 /* Skip COUNT insns from INSN, counting library calls as 1 insn. */
1339 skip_consec_insns (insn, count)
1343 for (; count > 0; count--)
1347 /* If first insn of libcall sequence, skip to end. */
1348 /* Do this at start of loop, since INSN is guaranteed to
1350 if (GET_CODE (insn) != NOTE
1351 && (temp = find_reg_note (insn, REG_LIBCALL, NULL_RTX)))
1352 insn = XEXP (temp, 0);
1355 insn = NEXT_INSN (insn);
1356 while (GET_CODE (insn) == NOTE);
1362 /* Ignore any movable whose insn falls within a libcall
1363 which is part of another movable.
1364 We make use of the fact that the movable for the libcall value
1365 was made later and so appears later on the chain. */
1368 ignore_some_movables (movables)
1369 struct loop_movables *movables;
1371 struct movable *m, *m1;
1373 for (m = movables->head; m; m = m->next)
1375 /* Is this a movable for the value of a libcall? */
1376 rtx note = find_reg_note (m->insn, REG_RETVAL, NULL_RTX);
1380 /* Check for earlier movables inside that range,
1381 and mark them invalid. We cannot use LUIDs here because
1382 insns created by loop.c for prior loops don't have LUIDs.
1383 Rather than reject all such insns from movables, we just
1384 explicitly check each insn in the libcall (since invariant
1385 libcalls aren't that common). */
1386 for (insn = XEXP (note, 0); insn != m->insn; insn = NEXT_INSN (insn))
1387 for (m1 = movables->head; m1 != m; m1 = m1->next)
1388 if (m1->insn == insn)
1394 /* For each movable insn, see if the reg that it loads
1395 leads when it dies right into another conditionally movable insn.
1396 If so, record that the second insn "forces" the first one,
1397 since the second can be moved only if the first is. */
1400 force_movables (movables)
1401 struct loop_movables *movables;
1403 struct movable *m, *m1;
1405 for (m1 = movables->head; m1; m1 = m1->next)
1406 /* Omit this if moving just the (SET (REG) 0) of a zero-extend. */
1407 if (!m1->partial && !m1->done)
1409 int regno = m1->regno;
1410 for (m = m1->next; m; m = m->next)
1411 /* ??? Could this be a bug? What if CSE caused the
1412 register of M1 to be used after this insn?
1413 Since CSE does not update regno_last_uid,
1414 this insn M->insn might not be where it dies.
1415 But very likely this doesn't matter; what matters is
1416 that M's reg is computed from M1's reg. */
1417 if (INSN_UID (m->insn) == REGNO_LAST_UID (regno)
1420 if (m != 0 && m->set_src == m1->set_dest
1421 /* If m->consec, m->set_src isn't valid. */
1425 /* Increase the priority of the moving the first insn
1426 since it permits the second to be moved as well. */
1430 m1->lifetime += m->lifetime;
1431 m1->savings += m->savings;
1436 /* Find invariant expressions that are equal and can be combined into
1440 combine_movables (movables, regs)
1441 struct loop_movables *movables;
1442 struct loop_regs *regs;
1445 char *matched_regs = (char *) xmalloc (regs->num);
1446 enum machine_mode mode;
1448 /* Regs that are set more than once are not allowed to match
1449 or be matched. I'm no longer sure why not. */
1450 /* Only pseudo registers are allowed to match or be matched,
1451 since move_movables does not validate the change. */
1452 /* Perhaps testing m->consec_sets would be more appropriate here? */
1454 for (m = movables->head; m; m = m->next)
1455 if (m->match == 0 && regs->array[m->regno].n_times_set == 1
1456 && m->regno >= FIRST_PSEUDO_REGISTER
1460 int regno = m->regno;
1462 memset (matched_regs, 0, regs->num);
1463 matched_regs[regno] = 1;
1465 /* We want later insns to match the first one. Don't make the first
1466 one match any later ones. So start this loop at m->next. */
1467 for (m1 = m->next; m1; m1 = m1->next)
1468 if (m != m1 && m1->match == 0
1469 && regs->array[m1->regno].n_times_set == 1
1470 && m1->regno >= FIRST_PSEUDO_REGISTER
1471 /* A reg used outside the loop mustn't be eliminated. */
1473 /* A reg used for zero-extending mustn't be eliminated. */
1475 && (matched_regs[m1->regno]
1478 /* Can combine regs with different modes loaded from the
1479 same constant only if the modes are the same or
1480 if both are integer modes with M wider or the same
1481 width as M1. The check for integer is redundant, but
1482 safe, since the only case of differing destination
1483 modes with equal sources is when both sources are
1484 VOIDmode, i.e., CONST_INT. */
1485 (GET_MODE (m->set_dest) == GET_MODE (m1->set_dest)
1486 || (GET_MODE_CLASS (GET_MODE (m->set_dest)) == MODE_INT
1487 && GET_MODE_CLASS (GET_MODE (m1->set_dest)) == MODE_INT
1488 && (GET_MODE_BITSIZE (GET_MODE (m->set_dest))
1489 >= GET_MODE_BITSIZE (GET_MODE (m1->set_dest)))))
1490 /* See if the source of M1 says it matches M. */
1491 && ((GET_CODE (m1->set_src) == REG
1492 && matched_regs[REGNO (m1->set_src)])
1493 || rtx_equal_for_loop_p (m->set_src, m1->set_src,
1495 && ((m->dependencies == m1->dependencies)
1496 || rtx_equal_p (m->dependencies, m1->dependencies)))
1498 m->lifetime += m1->lifetime;
1499 m->savings += m1->savings;
1502 matched_regs[m1->regno] = 1;
1506 /* Now combine the regs used for zero-extension.
1507 This can be done for those not marked `global'
1508 provided their lives don't overlap. */
1510 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
1511 mode = GET_MODE_WIDER_MODE (mode))
1513 struct movable *m0 = 0;
1515 /* Combine all the registers for extension from mode MODE.
1516 Don't combine any that are used outside this loop. */
1517 for (m = movables->head; m; m = m->next)
1518 if (m->partial && ! m->global
1519 && mode == GET_MODE (SET_SRC (PATTERN (NEXT_INSN (m->insn)))))
1523 int first = REGNO_FIRST_LUID (m->regno);
1524 int last = REGNO_LAST_LUID (m->regno);
1528 /* First one: don't check for overlap, just record it. */
1533 /* Make sure they extend to the same mode.
1534 (Almost always true.) */
1535 if (GET_MODE (m->set_dest) != GET_MODE (m0->set_dest))
1538 /* We already have one: check for overlap with those
1539 already combined together. */
1540 for (m1 = movables->head; m1 != m; m1 = m1->next)
1541 if (m1 == m0 || (m1->partial && m1->match == m0))
1542 if (! (REGNO_FIRST_LUID (m1->regno) > last
1543 || REGNO_LAST_LUID (m1->regno) < first))
1546 /* No overlap: we can combine this with the others. */
1547 m0->lifetime += m->lifetime;
1548 m0->savings += m->savings;
1558 free (matched_regs);
1561 /* Returns the number of movable instructions in LOOP that were not
1562 moved outside the loop. */
1565 num_unmoved_movables (loop)
1566 const struct loop *loop;
1571 for (m = LOOP_MOVABLES (loop)->head; m; m = m->next)
1579 /* Return 1 if regs X and Y will become the same if moved. */
1582 regs_match_p (x, y, movables)
1584 struct loop_movables *movables;
1586 unsigned int xn = REGNO (x);
1587 unsigned int yn = REGNO (y);
1588 struct movable *mx, *my;
1590 for (mx = movables->head; mx; mx = mx->next)
1591 if (mx->regno == xn)
1594 for (my = movables->head; my; my = my->next)
1595 if (my->regno == yn)
1599 && ((mx->match == my->match && mx->match != 0)
1601 || mx == my->match));
1604 /* Return 1 if X and Y are identical-looking rtx's.
1605 This is the Lisp function EQUAL for rtx arguments.
1607 If two registers are matching movables or a movable register and an
1608 equivalent constant, consider them equal. */
1611 rtx_equal_for_loop_p (x, y, movables, regs)
1613 struct loop_movables *movables;
1614 struct loop_regs *regs;
1624 if (x == 0 || y == 0)
1627 code = GET_CODE (x);
1629 /* If we have a register and a constant, they may sometimes be
1631 if (GET_CODE (x) == REG && regs->array[REGNO (x)].set_in_loop == -2
1634 for (m = movables->head; m; m = m->next)
1635 if (m->move_insn && m->regno == REGNO (x)
1636 && rtx_equal_p (m->set_src, y))
1639 else if (GET_CODE (y) == REG && regs->array[REGNO (y)].set_in_loop == -2
1642 for (m = movables->head; m; m = m->next)
1643 if (m->move_insn && m->regno == REGNO (y)
1644 && rtx_equal_p (m->set_src, x))
1648 /* Otherwise, rtx's of different codes cannot be equal. */
1649 if (code != GET_CODE (y))
1652 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
1653 (REG:SI x) and (REG:HI x) are NOT equivalent. */
1655 if (GET_MODE (x) != GET_MODE (y))
1658 /* These three types of rtx's can be compared nonrecursively. */
1660 return (REGNO (x) == REGNO (y) || regs_match_p (x, y, movables));
1662 if (code == LABEL_REF)
1663 return XEXP (x, 0) == XEXP (y, 0);
1664 if (code == SYMBOL_REF)
1665 return XSTR (x, 0) == XSTR (y, 0);
1667 /* Compare the elements. If any pair of corresponding elements
1668 fail to match, return 0 for the whole things. */
1670 fmt = GET_RTX_FORMAT (code);
1671 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1676 if (XWINT (x, i) != XWINT (y, i))
1681 if (XINT (x, i) != XINT (y, i))
1686 /* Two vectors must have the same length. */
1687 if (XVECLEN (x, i) != XVECLEN (y, i))
1690 /* And the corresponding elements must match. */
1691 for (j = 0; j < XVECLEN (x, i); j++)
1692 if (rtx_equal_for_loop_p (XVECEXP (x, i, j), XVECEXP (y, i, j),
1693 movables, regs) == 0)
1698 if (rtx_equal_for_loop_p (XEXP (x, i), XEXP (y, i), movables, regs)
1704 if (strcmp (XSTR (x, i), XSTR (y, i)))
1709 /* These are just backpointers, so they don't matter. */
1715 /* It is believed that rtx's at this level will never
1716 contain anything but integers and other rtx's,
1717 except for within LABEL_REFs and SYMBOL_REFs. */
1725 /* If X contains any LABEL_REF's, add REG_LABEL notes for them to all
1726 insns in INSNS which use the reference. LABEL_NUSES for CODE_LABEL
1727 references is incremented once for each added note. */
1730 add_label_notes (x, insns)
1734 enum rtx_code code = GET_CODE (x);
1739 if (code == LABEL_REF && !LABEL_REF_NONLOCAL_P (x))
1741 /* This code used to ignore labels that referred to dispatch tables to
1742 avoid flow generating (slighly) worse code.
1744 We no longer ignore such label references (see LABEL_REF handling in
1745 mark_jump_label for additional information). */
1746 for (insn = insns; insn; insn = NEXT_INSN (insn))
1747 if (reg_mentioned_p (XEXP (x, 0), insn))
1749 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_LABEL, XEXP (x, 0),
1751 if (LABEL_P (XEXP (x, 0)))
1752 LABEL_NUSES (XEXP (x, 0))++;
1756 fmt = GET_RTX_FORMAT (code);
1757 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1760 add_label_notes (XEXP (x, i), insns);
1761 else if (fmt[i] == 'E')
1762 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1763 add_label_notes (XVECEXP (x, i, j), insns);
1767 /* Scan MOVABLES, and move the insns that deserve to be moved.
1768 If two matching movables are combined, replace one reg with the
1769 other throughout. */
1772 move_movables (loop, movables, threshold, insn_count)
1774 struct loop_movables *movables;
1778 struct loop_regs *regs = LOOP_REGS (loop);
1779 int nregs = regs->num;
1783 rtx loop_start = loop->start;
1784 rtx loop_end = loop->end;
1785 /* Map of pseudo-register replacements to handle combining
1786 when we move several insns that load the same value
1787 into different pseudo-registers. */
1788 rtx *reg_map = (rtx *) xcalloc (nregs, sizeof (rtx));
1789 char *already_moved = (char *) xcalloc (nregs, sizeof (char));
1791 for (m = movables->head; m; m = m->next)
1793 /* Describe this movable insn. */
1795 if (loop_dump_stream)
1797 fprintf (loop_dump_stream, "Insn %d: regno %d (life %d), ",
1798 INSN_UID (m->insn), m->regno, m->lifetime);
1800 fprintf (loop_dump_stream, "consec %d, ", m->consec);
1802 fprintf (loop_dump_stream, "cond ");
1804 fprintf (loop_dump_stream, "force ");
1806 fprintf (loop_dump_stream, "global ");
1808 fprintf (loop_dump_stream, "done ");
1810 fprintf (loop_dump_stream, "move-insn ");
1812 fprintf (loop_dump_stream, "matches %d ",
1813 INSN_UID (m->match->insn));
1815 fprintf (loop_dump_stream, "forces %d ",
1816 INSN_UID (m->forces->insn));
1819 /* Ignore the insn if it's already done (it matched something else).
1820 Otherwise, see if it is now safe to move. */
1824 || (1 == loop_invariant_p (loop, m->set_src)
1825 && (m->dependencies == 0
1826 || 1 == loop_invariant_p (loop, m->dependencies))
1828 || 1 == consec_sets_invariant_p (loop, m->set_dest,
1831 && (! m->forces || m->forces->done))
1835 int savings = m->savings;
1837 /* We have an insn that is safe to move.
1838 Compute its desirability. */
1843 if (loop_dump_stream)
1844 fprintf (loop_dump_stream, "savings %d ", savings);
1846 if (regs->array[regno].moved_once && loop_dump_stream)
1847 fprintf (loop_dump_stream, "halved since already moved ");
1849 /* An insn MUST be moved if we already moved something else
1850 which is safe only if this one is moved too: that is,
1851 if already_moved[REGNO] is nonzero. */
1853 /* An insn is desirable to move if the new lifetime of the
1854 register is no more than THRESHOLD times the old lifetime.
1855 If it's not desirable, it means the loop is so big
1856 that moving won't speed things up much,
1857 and it is liable to make register usage worse. */
1859 /* It is also desirable to move if it can be moved at no
1860 extra cost because something else was already moved. */
1862 if (already_moved[regno]
1863 || flag_move_all_movables
1864 || (threshold * savings * m->lifetime) >=
1865 (regs->array[regno].moved_once ? insn_count * 2 : insn_count)
1866 || (m->forces && m->forces->done
1867 && regs->array[m->forces->regno].n_times_set == 1))
1871 rtx first = NULL_RTX;
1873 /* Now move the insns that set the reg. */
1875 if (m->partial && m->match)
1879 /* Find the end of this chain of matching regs.
1880 Thus, we load each reg in the chain from that one reg.
1881 And that reg is loaded with 0 directly,
1882 since it has ->match == 0. */
1883 for (m1 = m; m1->match; m1 = m1->match);
1884 newpat = gen_move_insn (SET_DEST (PATTERN (m->insn)),
1885 SET_DEST (PATTERN (m1->insn)));
1886 i1 = loop_insn_hoist (loop, newpat);
1888 /* Mark the moved, invariant reg as being allowed to
1889 share a hard reg with the other matching invariant. */
1890 REG_NOTES (i1) = REG_NOTES (m->insn);
1891 r1 = SET_DEST (PATTERN (m->insn));
1892 r2 = SET_DEST (PATTERN (m1->insn));
1894 = gen_rtx_EXPR_LIST (VOIDmode, r1,
1895 gen_rtx_EXPR_LIST (VOIDmode, r2,
1897 delete_insn (m->insn);
1902 if (loop_dump_stream)
1903 fprintf (loop_dump_stream, " moved to %d", INSN_UID (i1));
1905 /* If we are to re-generate the item being moved with a
1906 new move insn, first delete what we have and then emit
1907 the move insn before the loop. */
1908 else if (m->move_insn)
1912 for (count = m->consec; count >= 0; count--)
1914 /* If this is the first insn of a library call sequence,
1916 if (GET_CODE (p) != NOTE
1917 && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
1920 /* If this is the last insn of a libcall sequence, then
1921 delete every insn in the sequence except the last.
1922 The last insn is handled in the normal manner. */
1923 if (GET_CODE (p) != NOTE
1924 && (temp = find_reg_note (p, REG_RETVAL, NULL_RTX)))
1926 temp = XEXP (temp, 0);
1928 temp = delete_insn (temp);
1932 p = delete_insn (p);
1934 /* simplify_giv_expr expects that it can walk the insns
1935 at m->insn forwards and see this old sequence we are
1936 tossing here. delete_insn does preserve the next
1937 pointers, but when we skip over a NOTE we must fix
1938 it up. Otherwise that code walks into the non-deleted
1940 while (p && GET_CODE (p) == NOTE)
1941 p = NEXT_INSN (temp) = NEXT_INSN (p);
1945 emit_move_insn (m->set_dest, m->set_src);
1946 temp = get_insns ();
1947 seq = gen_sequence ();
1950 add_label_notes (m->set_src, temp);
1952 i1 = loop_insn_hoist (loop, seq);
1953 if (! find_reg_note (i1, REG_EQUAL, NULL_RTX))
1954 set_unique_reg_note (i1,
1955 m->is_equiv ? REG_EQUIV : REG_EQUAL,
1958 if (loop_dump_stream)
1959 fprintf (loop_dump_stream, " moved to %d", INSN_UID (i1));
1961 /* The more regs we move, the less we like moving them. */
1966 for (count = m->consec; count >= 0; count--)
1970 /* If first insn of libcall sequence, skip to end. */
1971 /* Do this at start of loop, since p is guaranteed to
1973 if (GET_CODE (p) != NOTE
1974 && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
1977 /* If last insn of libcall sequence, move all
1978 insns except the last before the loop. The last
1979 insn is handled in the normal manner. */
1980 if (GET_CODE (p) != NOTE
1981 && (temp = find_reg_note (p, REG_RETVAL, NULL_RTX)))
1985 rtx fn_address_insn = 0;
1988 for (temp = XEXP (temp, 0); temp != p;
1989 temp = NEXT_INSN (temp))
1995 if (GET_CODE (temp) == NOTE)
1998 body = PATTERN (temp);
2000 /* Find the next insn after TEMP,
2001 not counting USE or NOTE insns. */
2002 for (next = NEXT_INSN (temp); next != p;
2003 next = NEXT_INSN (next))
2004 if (! (GET_CODE (next) == INSN
2005 && GET_CODE (PATTERN (next)) == USE)
2006 && GET_CODE (next) != NOTE)
2009 /* If that is the call, this may be the insn
2010 that loads the function address.
2012 Extract the function address from the insn
2013 that loads it into a register.
2014 If this insn was cse'd, we get incorrect code.
2016 So emit a new move insn that copies the
2017 function address into the register that the
2018 call insn will use. flow.c will delete any
2019 redundant stores that we have created. */
2020 if (GET_CODE (next) == CALL_INSN
2021 && GET_CODE (body) == SET
2022 && GET_CODE (SET_DEST (body)) == REG
2023 && (n = find_reg_note (temp, REG_EQUAL,
2026 fn_reg = SET_SRC (body);
2027 if (GET_CODE (fn_reg) != REG)
2028 fn_reg = SET_DEST (body);
2029 fn_address = XEXP (n, 0);
2030 fn_address_insn = temp;
2032 /* We have the call insn.
2033 If it uses the register we suspect it might,
2034 load it with the correct address directly. */
2035 if (GET_CODE (temp) == CALL_INSN
2037 && reg_referenced_p (fn_reg, body))
2038 loop_insn_emit_after (loop, 0, fn_address_insn,
2040 (fn_reg, fn_address));
2042 if (GET_CODE (temp) == CALL_INSN)
2044 i1 = loop_call_insn_hoist (loop, body);
2045 /* Because the USAGE information potentially
2046 contains objects other than hard registers
2047 we need to copy it. */
2048 if (CALL_INSN_FUNCTION_USAGE (temp))
2049 CALL_INSN_FUNCTION_USAGE (i1)
2050 = copy_rtx (CALL_INSN_FUNCTION_USAGE (temp));
2053 i1 = loop_insn_hoist (loop, body);
2056 if (temp == fn_address_insn)
2057 fn_address_insn = i1;
2058 REG_NOTES (i1) = REG_NOTES (temp);
2059 REG_NOTES (temp) = NULL;
2065 if (m->savemode != VOIDmode)
2067 /* P sets REG to zero; but we should clear only
2068 the bits that are not covered by the mode
2070 rtx reg = m->set_dest;
2075 tem = expand_simple_binop
2076 (GET_MODE (reg), AND, reg,
2077 GEN_INT ((((HOST_WIDE_INT) 1
2078 << GET_MODE_BITSIZE (m->savemode)))
2080 reg, 1, OPTAB_LIB_WIDEN);
2084 emit_move_insn (reg, tem);
2085 sequence = gen_sequence ();
2087 i1 = loop_insn_hoist (loop, sequence);
2089 else if (GET_CODE (p) == CALL_INSN)
2091 i1 = loop_call_insn_hoist (loop, PATTERN (p));
2092 /* Because the USAGE information potentially
2093 contains objects other than hard registers
2094 we need to copy it. */
2095 if (CALL_INSN_FUNCTION_USAGE (p))
2096 CALL_INSN_FUNCTION_USAGE (i1)
2097 = copy_rtx (CALL_INSN_FUNCTION_USAGE (p));
2099 else if (count == m->consec && m->move_insn_first)
2102 /* The SET_SRC might not be invariant, so we must
2103 use the REG_EQUAL note. */
2105 emit_move_insn (m->set_dest, m->set_src);
2106 temp = get_insns ();
2107 seq = gen_sequence ();
2110 add_label_notes (m->set_src, temp);
2112 i1 = loop_insn_hoist (loop, seq);
2113 if (! find_reg_note (i1, REG_EQUAL, NULL_RTX))
2114 set_unique_reg_note (i1, m->is_equiv ? REG_EQUIV
2115 : REG_EQUAL, m->set_src);
2118 i1 = loop_insn_hoist (loop, PATTERN (p));
2120 if (REG_NOTES (i1) == 0)
2122 REG_NOTES (i1) = REG_NOTES (p);
2123 REG_NOTES (p) = NULL;
2125 /* If there is a REG_EQUAL note present whose value
2126 is not loop invariant, then delete it, since it
2127 may cause problems with later optimization passes.
2128 It is possible for cse to create such notes
2129 like this as a result of record_jump_cond. */
2131 if ((temp = find_reg_note (i1, REG_EQUAL, NULL_RTX))
2132 && ! loop_invariant_p (loop, XEXP (temp, 0)))
2133 remove_note (i1, temp);
2139 if (loop_dump_stream)
2140 fprintf (loop_dump_stream, " moved to %d",
2143 /* If library call, now fix the REG_NOTES that contain
2144 insn pointers, namely REG_LIBCALL on FIRST
2145 and REG_RETVAL on I1. */
2146 if ((temp = find_reg_note (i1, REG_RETVAL, NULL_RTX)))
2148 XEXP (temp, 0) = first;
2149 temp = find_reg_note (first, REG_LIBCALL, NULL_RTX);
2150 XEXP (temp, 0) = i1;
2157 /* simplify_giv_expr expects that it can walk the insns
2158 at m->insn forwards and see this old sequence we are
2159 tossing here. delete_insn does preserve the next
2160 pointers, but when we skip over a NOTE we must fix
2161 it up. Otherwise that code walks into the non-deleted
2163 while (p && GET_CODE (p) == NOTE)
2164 p = NEXT_INSN (temp) = NEXT_INSN (p);
2167 /* The more regs we move, the less we like moving them. */
2171 /* Any other movable that loads the same register
2173 already_moved[regno] = 1;
2175 /* This reg has been moved out of one loop. */
2176 regs->array[regno].moved_once = 1;
2178 /* The reg set here is now invariant. */
2182 for (i = 0; i < LOOP_REGNO_NREGS (regno, m->set_dest); i++)
2183 regs->array[regno+i].set_in_loop = 0;
2188 /* Change the length-of-life info for the register
2189 to say it lives at least the full length of this loop.
2190 This will help guide optimizations in outer loops. */
2192 if (REGNO_FIRST_LUID (regno) > INSN_LUID (loop_start))
2193 /* This is the old insn before all the moved insns.
2194 We can't use the moved insn because it is out of range
2195 in uid_luid. Only the old insns have luids. */
2196 REGNO_FIRST_UID (regno) = INSN_UID (loop_start);
2197 if (REGNO_LAST_LUID (regno) < INSN_LUID (loop_end))
2198 REGNO_LAST_UID (regno) = INSN_UID (loop_end);
2200 /* Combine with this moved insn any other matching movables. */
2203 for (m1 = movables->head; m1; m1 = m1->next)
2208 /* Schedule the reg loaded by M1
2209 for replacement so that shares the reg of M.
2210 If the modes differ (only possible in restricted
2211 circumstances, make a SUBREG.
2213 Note this assumes that the target dependent files
2214 treat REG and SUBREG equally, including within
2215 GO_IF_LEGITIMATE_ADDRESS and in all the
2216 predicates since we never verify that replacing the
2217 original register with a SUBREG results in a
2218 recognizable insn. */
2219 if (GET_MODE (m->set_dest) == GET_MODE (m1->set_dest))
2220 reg_map[m1->regno] = m->set_dest;
2223 = gen_lowpart_common (GET_MODE (m1->set_dest),
2226 /* Get rid of the matching insn
2227 and prevent further processing of it. */
2230 /* if library call, delete all insns. */
2231 if ((temp = find_reg_note (m1->insn, REG_RETVAL,
2233 delete_insn_chain (XEXP (temp, 0), m1->insn);
2235 delete_insn (m1->insn);
2237 /* Any other movable that loads the same register
2239 already_moved[m1->regno] = 1;
2241 /* The reg merged here is now invariant,
2242 if the reg it matches is invariant. */
2247 i < LOOP_REGNO_NREGS (regno, m1->set_dest);
2249 regs->array[m1->regno+i].set_in_loop = 0;
2253 else if (loop_dump_stream)
2254 fprintf (loop_dump_stream, "not desirable");
2256 else if (loop_dump_stream && !m->match)
2257 fprintf (loop_dump_stream, "not safe");
2259 if (loop_dump_stream)
2260 fprintf (loop_dump_stream, "\n");
2264 new_start = loop_start;
2266 /* Go through all the instructions in the loop, making
2267 all the register substitutions scheduled in REG_MAP. */
2268 for (p = new_start; p != loop_end; p = NEXT_INSN (p))
2269 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
2270 || GET_CODE (p) == CALL_INSN)
2272 replace_regs (PATTERN (p), reg_map, nregs, 0);
2273 replace_regs (REG_NOTES (p), reg_map, nregs, 0);
2279 free (already_moved);
2284 loop_movables_add (movables, m)
2285 struct loop_movables *movables;
2288 if (movables->head == 0)
2291 movables->last->next = m;
2297 loop_movables_free (movables)
2298 struct loop_movables *movables;
2301 struct movable *m_next;
2303 for (m = movables->head; m; m = m_next)
2311 /* Scan X and replace the address of any MEM in it with ADDR.
2312 REG is the address that MEM should have before the replacement. */
2315 replace_call_address (x, reg, addr)
2324 code = GET_CODE (x);
2338 /* Short cut for very common case. */
2339 replace_call_address (XEXP (x, 1), reg, addr);
2343 /* Short cut for very common case. */
2344 replace_call_address (XEXP (x, 0), reg, addr);
2348 /* If this MEM uses a reg other than the one we expected,
2349 something is wrong. */
2350 if (XEXP (x, 0) != reg)
2359 fmt = GET_RTX_FORMAT (code);
2360 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2363 replace_call_address (XEXP (x, i), reg, addr);
2364 else if (fmt[i] == 'E')
2367 for (j = 0; j < XVECLEN (x, i); j++)
2368 replace_call_address (XVECEXP (x, i, j), reg, addr);
2374 /* Return the number of memory refs to addresses that vary
2378 count_nonfixed_reads (loop, x)
2379 const struct loop *loop;
2390 code = GET_CODE (x);
2404 return ((loop_invariant_p (loop, XEXP (x, 0)) != 1)
2405 + count_nonfixed_reads (loop, XEXP (x, 0)));
2412 fmt = GET_RTX_FORMAT (code);
2413 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2416 value += count_nonfixed_reads (loop, XEXP (x, i));
2420 for (j = 0; j < XVECLEN (x, i); j++)
2421 value += count_nonfixed_reads (loop, XVECEXP (x, i, j));
2427 /* Scan a loop setting the elements `cont', `vtop', `loops_enclosed',
2428 `has_call', `has_nonconst_call', `has_volatile', `has_tablejump',
2429 `unknown_address_altered', `unknown_constant_address_altered', and
2430 `num_mem_sets' in LOOP. Also, fill in the array `mems' and the
2431 list `store_mems' in LOOP. */
2439 struct loop_info *loop_info = LOOP_INFO (loop);
2440 rtx start = loop->start;
2441 rtx end = loop->end;
2442 /* The label after END. Jumping here is just like falling off the
2443 end of the loop. We use next_nonnote_insn instead of next_label
2444 as a hedge against the (pathological) case where some actual insn
2445 might end up between the two. */
2446 rtx exit_target = next_nonnote_insn (end);
2448 loop_info->has_indirect_jump = indirect_jump_in_function;
2449 loop_info->pre_header_has_call = 0;
2450 loop_info->has_call = 0;
2451 loop_info->has_nonconst_call = 0;
2452 loop_info->has_volatile = 0;
2453 loop_info->has_tablejump = 0;
2454 loop_info->has_multiple_exit_targets = 0;
2457 loop_info->unknown_address_altered = 0;
2458 loop_info->unknown_constant_address_altered = 0;
2459 loop_info->store_mems = NULL_RTX;
2460 loop_info->first_loop_store_insn = NULL_RTX;
2461 loop_info->mems_idx = 0;
2462 loop_info->num_mem_sets = 0;
2465 for (insn = start; insn && GET_CODE (insn) != CODE_LABEL;
2466 insn = PREV_INSN (insn))
2468 if (GET_CODE (insn) == CALL_INSN)
2470 loop_info->pre_header_has_call = 1;
2475 for (insn = NEXT_INSN (start); insn != NEXT_INSN (end);
2476 insn = NEXT_INSN (insn))
2478 switch (GET_CODE (insn))
2481 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
2484 /* Count number of loops contained in this one. */
2487 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END)
2492 if (! CONST_OR_PURE_CALL_P (insn))
2494 loop_info->unknown_address_altered = 1;
2495 loop_info->has_nonconst_call = 1;
2497 loop_info->has_call = 1;
2498 if (can_throw_internal (insn))
2499 loop_info->has_multiple_exit_targets = 1;
2503 if (! loop_info->has_multiple_exit_targets)
2505 rtx set = pc_set (insn);
2509 rtx src = SET_SRC (set);
2512 if (GET_CODE (src) == IF_THEN_ELSE)
2514 label1 = XEXP (src, 1);
2515 label2 = XEXP (src, 2);
2525 if (label1 && label1 != pc_rtx)
2527 if (GET_CODE (label1) != LABEL_REF)
2529 /* Something tricky. */
2530 loop_info->has_multiple_exit_targets = 1;
2533 else if (XEXP (label1, 0) != exit_target
2534 && LABEL_OUTSIDE_LOOP_P (label1))
2536 /* A jump outside the current loop. */
2537 loop_info->has_multiple_exit_targets = 1;
2549 /* A return, or something tricky. */
2550 loop_info->has_multiple_exit_targets = 1;
2556 if (volatile_refs_p (PATTERN (insn)))
2557 loop_info->has_volatile = 1;
2559 if (GET_CODE (insn) == JUMP_INSN
2560 && (GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC
2561 || GET_CODE (PATTERN (insn)) == ADDR_VEC))
2562 loop_info->has_tablejump = 1;
2564 note_stores (PATTERN (insn), note_addr_stored, loop_info);
2565 if (! loop_info->first_loop_store_insn && loop_info->store_mems)
2566 loop_info->first_loop_store_insn = insn;
2568 if (flag_non_call_exceptions && can_throw_internal (insn))
2569 loop_info->has_multiple_exit_targets = 1;
2577 /* Now, rescan the loop, setting up the LOOP_MEMS array. */
2578 if (/* An exception thrown by a called function might land us
2580 ! loop_info->has_nonconst_call
2581 /* We don't want loads for MEMs moved to a location before the
2582 one at which their stack memory becomes allocated. (Note
2583 that this is not a problem for malloc, etc., since those
2584 require actual function calls. */
2585 && ! current_function_calls_alloca
2586 /* There are ways to leave the loop other than falling off the
2588 && ! loop_info->has_multiple_exit_targets)
2589 for (insn = NEXT_INSN (start); insn != NEXT_INSN (end);
2590 insn = NEXT_INSN (insn))
2591 for_each_rtx (&insn, insert_loop_mem, loop_info);
2593 /* BLKmode MEMs are added to LOOP_STORE_MEM as necessary so
2594 that loop_invariant_p and load_mems can use true_dependence
2595 to determine what is really clobbered. */
2596 if (loop_info->unknown_address_altered)
2598 rtx mem = gen_rtx_MEM (BLKmode, const0_rtx);
2600 loop_info->store_mems
2601 = gen_rtx_EXPR_LIST (VOIDmode, mem, loop_info->store_mems);
2603 if (loop_info->unknown_constant_address_altered)
2605 rtx mem = gen_rtx_MEM (BLKmode, const0_rtx);
2607 RTX_UNCHANGING_P (mem) = 1;
2608 loop_info->store_mems
2609 = gen_rtx_EXPR_LIST (VOIDmode, mem, loop_info->store_mems);
2613 /* Invalidate all loops containing LABEL. */
2616 invalidate_loops_containing_label (label)
2620 for (loop = uid_loop[INSN_UID (label)]; loop; loop = loop->outer)
2624 /* Scan the function looking for loops. Record the start and end of each loop.
2625 Also mark as invalid loops any loops that contain a setjmp or are branched
2626 to from outside the loop. */
2629 find_and_verify_loops (f, loops)
2631 struct loops *loops;
2636 struct loop *current_loop;
2637 struct loop *next_loop;
2640 num_loops = loops->num;
2642 compute_luids (f, NULL_RTX, 0);
2644 /* If there are jumps to undefined labels,
2645 treat them as jumps out of any/all loops.
2646 This also avoids writing past end of tables when there are no loops. */
2649 /* Find boundaries of loops, mark which loops are contained within
2650 loops, and invalidate loops that have setjmp. */
2653 current_loop = NULL;
2654 for (insn = f; insn; insn = NEXT_INSN (insn))
2656 if (GET_CODE (insn) == NOTE)
2657 switch (NOTE_LINE_NUMBER (insn))
2659 case NOTE_INSN_LOOP_BEG:
2660 next_loop = loops->array + num_loops;
2661 next_loop->num = num_loops;
2663 next_loop->start = insn;
2664 next_loop->outer = current_loop;
2665 current_loop = next_loop;
2668 case NOTE_INSN_LOOP_CONT:
2669 current_loop->cont = insn;
2672 case NOTE_INSN_LOOP_VTOP:
2673 current_loop->vtop = insn;
2676 case NOTE_INSN_LOOP_END:
2680 current_loop->end = insn;
2681 current_loop = current_loop->outer;
2688 if (GET_CODE (insn) == CALL_INSN
2689 && find_reg_note (insn, REG_SETJMP, NULL))
2691 /* In this case, we must invalidate our current loop and any
2693 for (loop = current_loop; loop; loop = loop->outer)
2696 if (loop_dump_stream)
2697 fprintf (loop_dump_stream,
2698 "\nLoop at %d ignored due to setjmp.\n",
2699 INSN_UID (loop->start));
2703 /* Note that this will mark the NOTE_INSN_LOOP_END note as being in the
2704 enclosing loop, but this doesn't matter. */
2705 uid_loop[INSN_UID (insn)] = current_loop;
2708 /* Any loop containing a label used in an initializer must be invalidated,
2709 because it can be jumped into from anywhere. */
2710 for (label = forced_labels; label; label = XEXP (label, 1))
2711 invalidate_loops_containing_label (XEXP (label, 0));
2713 /* Any loop containing a label used for an exception handler must be
2714 invalidated, because it can be jumped into from anywhere. */
2715 for_each_eh_label (invalidate_loops_containing_label);
2717 /* Now scan all insn's in the function. If any JUMP_INSN branches into a
2718 loop that it is not contained within, that loop is marked invalid.
2719 If any INSN or CALL_INSN uses a label's address, then the loop containing
2720 that label is marked invalid, because it could be jumped into from
2723 Also look for blocks of code ending in an unconditional branch that
2724 exits the loop. If such a block is surrounded by a conditional
2725 branch around the block, move the block elsewhere (see below) and
2726 invert the jump to point to the code block. This may eliminate a
2727 label in our loop and will simplify processing by both us and a
2728 possible second cse pass. */
2730 for (insn = f; insn; insn = NEXT_INSN (insn))
2733 struct loop *this_loop = uid_loop[INSN_UID (insn)];
2735 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
2737 rtx note = find_reg_note (insn, REG_LABEL, NULL_RTX);
2739 invalidate_loops_containing_label (XEXP (note, 0));
2742 if (GET_CODE (insn) != JUMP_INSN)
2745 mark_loop_jump (PATTERN (insn), this_loop);
2747 /* See if this is an unconditional branch outside the loop. */
2749 && (GET_CODE (PATTERN (insn)) == RETURN
2750 || (any_uncondjump_p (insn)
2751 && onlyjump_p (insn)
2752 && (uid_loop[INSN_UID (JUMP_LABEL (insn))]
2754 && get_max_uid () < max_uid_for_loop)
2757 rtx our_next = next_real_insn (insn);
2758 rtx last_insn_to_move = NEXT_INSN (insn);
2759 struct loop *dest_loop;
2760 struct loop *outer_loop = NULL;
2762 /* Go backwards until we reach the start of the loop, a label,
2764 for (p = PREV_INSN (insn);
2765 GET_CODE (p) != CODE_LABEL
2766 && ! (GET_CODE (p) == NOTE
2767 && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
2768 && GET_CODE (p) != JUMP_INSN;
2772 /* Check for the case where we have a jump to an inner nested
2773 loop, and do not perform the optimization in that case. */
2775 if (JUMP_LABEL (insn))
2777 dest_loop = uid_loop[INSN_UID (JUMP_LABEL (insn))];
2780 for (outer_loop = dest_loop; outer_loop;
2781 outer_loop = outer_loop->outer)
2782 if (outer_loop == this_loop)
2787 /* Make sure that the target of P is within the current loop. */
2789 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p)
2790 && uid_loop[INSN_UID (JUMP_LABEL (p))] != this_loop)
2791 outer_loop = this_loop;
2793 /* If we stopped on a JUMP_INSN to the next insn after INSN,
2794 we have a block of code to try to move.
2796 We look backward and then forward from the target of INSN
2797 to find a BARRIER at the same loop depth as the target.
2798 If we find such a BARRIER, we make a new label for the start
2799 of the block, invert the jump in P and point it to that label,
2800 and move the block of code to the spot we found. */
2803 && GET_CODE (p) == JUMP_INSN
2804 && JUMP_LABEL (p) != 0
2805 /* Just ignore jumps to labels that were never emitted.
2806 These always indicate compilation errors. */
2807 && INSN_UID (JUMP_LABEL (p)) != 0
2808 && any_condjump_p (p) && onlyjump_p (p)
2809 && next_real_insn (JUMP_LABEL (p)) == our_next
2810 /* If it's not safe to move the sequence, then we
2812 && insns_safe_to_move_p (p, NEXT_INSN (insn),
2813 &last_insn_to_move))
2816 = JUMP_LABEL (insn) ? JUMP_LABEL (insn) : get_last_insn ();
2817 struct loop *target_loop = uid_loop[INSN_UID (target)];
2821 /* Search for possible garbage past the conditional jumps
2822 and look for the last barrier. */
2823 for (tmp = last_insn_to_move;
2824 tmp && GET_CODE (tmp) != CODE_LABEL; tmp = NEXT_INSN (tmp))
2825 if (GET_CODE (tmp) == BARRIER)
2826 last_insn_to_move = tmp;
2828 for (loc = target; loc; loc = PREV_INSN (loc))
2829 if (GET_CODE (loc) == BARRIER
2830 /* Don't move things inside a tablejump. */
2831 && ((loc2 = next_nonnote_insn (loc)) == 0
2832 || GET_CODE (loc2) != CODE_LABEL
2833 || (loc2 = next_nonnote_insn (loc2)) == 0
2834 || GET_CODE (loc2) != JUMP_INSN
2835 || (GET_CODE (PATTERN (loc2)) != ADDR_VEC
2836 && GET_CODE (PATTERN (loc2)) != ADDR_DIFF_VEC))
2837 && uid_loop[INSN_UID (loc)] == target_loop)
2841 for (loc = target; loc; loc = NEXT_INSN (loc))
2842 if (GET_CODE (loc) == BARRIER
2843 /* Don't move things inside a tablejump. */
2844 && ((loc2 = next_nonnote_insn (loc)) == 0
2845 || GET_CODE (loc2) != CODE_LABEL
2846 || (loc2 = next_nonnote_insn (loc2)) == 0
2847 || GET_CODE (loc2) != JUMP_INSN
2848 || (GET_CODE (PATTERN (loc2)) != ADDR_VEC
2849 && GET_CODE (PATTERN (loc2)) != ADDR_DIFF_VEC))
2850 && uid_loop[INSN_UID (loc)] == target_loop)
2855 rtx cond_label = JUMP_LABEL (p);
2856 rtx new_label = get_label_after (p);
2858 /* Ensure our label doesn't go away. */
2859 LABEL_NUSES (cond_label)++;
2861 /* Verify that uid_loop is large enough and that
2863 if (invert_jump (p, new_label, 1))
2867 /* If no suitable BARRIER was found, create a suitable
2868 one before TARGET. Since TARGET is a fall through
2869 path, we'll need to insert an jump around our block
2870 and add a BARRIER before TARGET.
2872 This creates an extra unconditional jump outside
2873 the loop. However, the benefits of removing rarely
2874 executed instructions from inside the loop usually
2875 outweighs the cost of the extra unconditional jump
2876 outside the loop. */
2881 temp = gen_jump (JUMP_LABEL (insn));
2882 temp = emit_jump_insn_before (temp, target);
2883 JUMP_LABEL (temp) = JUMP_LABEL (insn);
2884 LABEL_NUSES (JUMP_LABEL (insn))++;
2885 loc = emit_barrier_before (target);
2888 /* Include the BARRIER after INSN and copy the
2890 if (squeeze_notes (&new_label, &last_insn_to_move))
2892 reorder_insns (new_label, last_insn_to_move, loc);
2894 /* All those insns are now in TARGET_LOOP. */
2896 q != NEXT_INSN (last_insn_to_move);
2898 uid_loop[INSN_UID (q)] = target_loop;
2900 /* The label jumped to by INSN is no longer a loop
2901 exit. Unless INSN does not have a label (e.g.,
2902 it is a RETURN insn), search loop->exit_labels
2903 to find its label_ref, and remove it. Also turn
2904 off LABEL_OUTSIDE_LOOP_P bit. */
2905 if (JUMP_LABEL (insn))
2907 for (q = 0, r = this_loop->exit_labels;
2909 q = r, r = LABEL_NEXTREF (r))
2910 if (XEXP (r, 0) == JUMP_LABEL (insn))
2912 LABEL_OUTSIDE_LOOP_P (r) = 0;
2914 LABEL_NEXTREF (q) = LABEL_NEXTREF (r);
2916 this_loop->exit_labels = LABEL_NEXTREF (r);
2920 for (loop = this_loop; loop && loop != target_loop;
2924 /* If we didn't find it, then something is
2930 /* P is now a jump outside the loop, so it must be put
2931 in loop->exit_labels, and marked as such.
2932 The easiest way to do this is to just call
2933 mark_loop_jump again for P. */
2934 mark_loop_jump (PATTERN (p), this_loop);
2936 /* If INSN now jumps to the insn after it,
2938 if (JUMP_LABEL (insn) != 0
2939 && (next_real_insn (JUMP_LABEL (insn))
2940 == next_real_insn (insn)))
2941 delete_related_insns (insn);
2944 /* Continue the loop after where the conditional
2945 branch used to jump, since the only branch insn
2946 in the block (if it still remains) is an inter-loop
2947 branch and hence needs no processing. */
2948 insn = NEXT_INSN (cond_label);
2950 if (--LABEL_NUSES (cond_label) == 0)
2951 delete_related_insns (cond_label);
2953 /* This loop will be continued with NEXT_INSN (insn). */
2954 insn = PREV_INSN (insn);
2961 /* If any label in X jumps to a loop different from LOOP_NUM and any of the
2962 loops it is contained in, mark the target loop invalid.
2964 For speed, we assume that X is part of a pattern of a JUMP_INSN. */
2967 mark_loop_jump (x, loop)
2971 struct loop *dest_loop;
2972 struct loop *outer_loop;
2975 switch (GET_CODE (x))
2988 /* There could be a label reference in here. */
2989 mark_loop_jump (XEXP (x, 0), loop);
2995 mark_loop_jump (XEXP (x, 0), loop);
2996 mark_loop_jump (XEXP (x, 1), loop);
3000 /* This may refer to a LABEL_REF or SYMBOL_REF. */
3001 mark_loop_jump (XEXP (x, 1), loop);
3006 mark_loop_jump (XEXP (x, 0), loop);
3010 dest_loop = uid_loop[INSN_UID (XEXP (x, 0))];
3012 /* Link together all labels that branch outside the loop. This
3013 is used by final_[bg]iv_value and the loop unrolling code. Also
3014 mark this LABEL_REF so we know that this branch should predict
3017 /* A check to make sure the label is not in an inner nested loop,
3018 since this does not count as a loop exit. */
3021 for (outer_loop = dest_loop; outer_loop;
3022 outer_loop = outer_loop->outer)
3023 if (outer_loop == loop)
3029 if (loop && ! outer_loop)
3031 LABEL_OUTSIDE_LOOP_P (x) = 1;
3032 LABEL_NEXTREF (x) = loop->exit_labels;
3033 loop->exit_labels = x;
3035 for (outer_loop = loop;
3036 outer_loop && outer_loop != dest_loop;
3037 outer_loop = outer_loop->outer)
3038 outer_loop->exit_count++;
3041 /* If this is inside a loop, but not in the current loop or one enclosed
3042 by it, it invalidates at least one loop. */
3047 /* We must invalidate every nested loop containing the target of this
3048 label, except those that also contain the jump insn. */
3050 for (; dest_loop; dest_loop = dest_loop->outer)
3052 /* Stop when we reach a loop that also contains the jump insn. */
3053 for (outer_loop = loop; outer_loop; outer_loop = outer_loop->outer)
3054 if (dest_loop == outer_loop)
3057 /* If we get here, we know we need to invalidate a loop. */
3058 if (loop_dump_stream && ! dest_loop->invalid)
3059 fprintf (loop_dump_stream,
3060 "\nLoop at %d ignored due to multiple entry points.\n",
3061 INSN_UID (dest_loop->start));
3063 dest_loop->invalid = 1;
3068 /* If this is not setting pc, ignore. */
3069 if (SET_DEST (x) == pc_rtx)
3070 mark_loop_jump (SET_SRC (x), loop);
3074 mark_loop_jump (XEXP (x, 1), loop);
3075 mark_loop_jump (XEXP (x, 2), loop);
3080 for (i = 0; i < XVECLEN (x, 0); i++)
3081 mark_loop_jump (XVECEXP (x, 0, i), loop);
3085 for (i = 0; i < XVECLEN (x, 1); i++)
3086 mark_loop_jump (XVECEXP (x, 1, i), loop);
3090 /* Strictly speaking this is not a jump into the loop, only a possible
3091 jump out of the loop. However, we have no way to link the destination
3092 of this jump onto the list of exit labels. To be safe we mark this
3093 loop and any containing loops as invalid. */
3096 for (outer_loop = loop; outer_loop; outer_loop = outer_loop->outer)
3098 if (loop_dump_stream && ! outer_loop->invalid)
3099 fprintf (loop_dump_stream,
3100 "\nLoop at %d ignored due to unknown exit jump.\n",
3101 INSN_UID (outer_loop->start));
3102 outer_loop->invalid = 1;
3109 /* Return nonzero if there is a label in the range from
3110 insn INSN to and including the insn whose luid is END
3111 INSN must have an assigned luid (i.e., it must not have
3112 been previously created by loop.c). */
3115 labels_in_range_p (insn, end)
3119 while (insn && INSN_LUID (insn) <= end)
3121 if (GET_CODE (insn) == CODE_LABEL)
3123 insn = NEXT_INSN (insn);
3129 /* Record that a memory reference X is being set. */
3132 note_addr_stored (x, y, data)
3134 rtx y ATTRIBUTE_UNUSED;
3135 void *data ATTRIBUTE_UNUSED;
3137 struct loop_info *loop_info = data;
3139 if (x == 0 || GET_CODE (x) != MEM)
3142 /* Count number of memory writes.
3143 This affects heuristics in strength_reduce. */
3144 loop_info->num_mem_sets++;
3146 /* BLKmode MEM means all memory is clobbered. */
3147 if (GET_MODE (x) == BLKmode)
3149 if (RTX_UNCHANGING_P (x))
3150 loop_info->unknown_constant_address_altered = 1;
3152 loop_info->unknown_address_altered = 1;
3157 loop_info->store_mems = gen_rtx_EXPR_LIST (VOIDmode, x,
3158 loop_info->store_mems);
3161 /* X is a value modified by an INSN that references a biv inside a loop
3162 exit test (ie, X is somehow related to the value of the biv). If X
3163 is a pseudo that is used more than once, then the biv is (effectively)
3164 used more than once. DATA is a pointer to a loop_regs structure. */
3167 note_set_pseudo_multiple_uses (x, y, data)
3169 rtx y ATTRIBUTE_UNUSED;
3172 struct loop_regs *regs = (struct loop_regs *) data;
3177 while (GET_CODE (x) == STRICT_LOW_PART
3178 || GET_CODE (x) == SIGN_EXTRACT
3179 || GET_CODE (x) == ZERO_EXTRACT
3180 || GET_CODE (x) == SUBREG)
3183 if (GET_CODE (x) != REG || REGNO (x) < FIRST_PSEUDO_REGISTER)
3186 /* If we do not have usage information, or if we know the register
3187 is used more than once, note that fact for check_dbra_loop. */
3188 if (REGNO (x) >= max_reg_before_loop
3189 || ! regs->array[REGNO (x)].single_usage
3190 || regs->array[REGNO (x)].single_usage == const0_rtx)
3191 regs->multiple_uses = 1;
3194 /* Return nonzero if the rtx X is invariant over the current loop.
3196 The value is 2 if we refer to something only conditionally invariant.
3198 A memory ref is invariant if it is not volatile and does not conflict
3199 with anything stored in `loop_info->store_mems'. */
3202 loop_invariant_p (loop, x)
3203 const struct loop *loop;
3206 struct loop_info *loop_info = LOOP_INFO (loop);
3207 struct loop_regs *regs = LOOP_REGS (loop);
3211 int conditional = 0;
3216 code = GET_CODE (x);
3226 /* A LABEL_REF is normally invariant, however, if we are unrolling
3227 loops, and this label is inside the loop, then it isn't invariant.
3228 This is because each unrolled copy of the loop body will have
3229 a copy of this label. If this was invariant, then an insn loading
3230 the address of this label into a register might get moved outside
3231 the loop, and then each loop body would end up using the same label.
3233 We don't know the loop bounds here though, so just fail for all
3235 if (flag_unroll_loops)
3242 case UNSPEC_VOLATILE:
3246 /* We used to check RTX_UNCHANGING_P (x) here, but that is invalid
3247 since the reg might be set by initialization within the loop. */
3249 if ((x == frame_pointer_rtx || x == hard_frame_pointer_rtx
3250 || x == arg_pointer_rtx || x == pic_offset_table_rtx)
3251 && ! current_function_has_nonlocal_goto)
3254 if (LOOP_INFO (loop)->has_call
3255 && REGNO (x) < FIRST_PSEUDO_REGISTER && call_used_regs[REGNO (x)])
3258 if (regs->array[REGNO (x)].set_in_loop < 0)
3261 return regs->array[REGNO (x)].set_in_loop == 0;
3264 /* Volatile memory references must be rejected. Do this before
3265 checking for read-only items, so that volatile read-only items
3266 will be rejected also. */
3267 if (MEM_VOLATILE_P (x))
3270 /* See if there is any dependence between a store and this load. */
3271 mem_list_entry = loop_info->store_mems;
3272 while (mem_list_entry)
3274 if (true_dependence (XEXP (mem_list_entry, 0), VOIDmode,
3278 mem_list_entry = XEXP (mem_list_entry, 1);
3281 /* It's not invalidated by a store in memory
3282 but we must still verify the address is invariant. */
3286 /* Don't mess with insns declared volatile. */
3287 if (MEM_VOLATILE_P (x))
3295 fmt = GET_RTX_FORMAT (code);
3296 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3300 int tem = loop_invariant_p (loop, XEXP (x, i));
3306 else if (fmt[i] == 'E')
3309 for (j = 0; j < XVECLEN (x, i); j++)
3311 int tem = loop_invariant_p (loop, XVECEXP (x, i, j));
3321 return 1 + conditional;
3324 /* Return nonzero if all the insns in the loop that set REG
3325 are INSN and the immediately following insns,
3326 and if each of those insns sets REG in an invariant way
3327 (not counting uses of REG in them).
3329 The value is 2 if some of these insns are only conditionally invariant.
3331 We assume that INSN itself is the first set of REG
3332 and that its source is invariant. */
3335 consec_sets_invariant_p (loop, reg, n_sets, insn)
3336 const struct loop *loop;
3340 struct loop_regs *regs = LOOP_REGS (loop);
3342 unsigned int regno = REGNO (reg);
3344 /* Number of sets we have to insist on finding after INSN. */
3345 int count = n_sets - 1;
3346 int old = regs->array[regno].set_in_loop;
3350 /* If N_SETS hit the limit, we can't rely on its value. */
3354 regs->array[regno].set_in_loop = 0;
3362 code = GET_CODE (p);
3364 /* If library call, skip to end of it. */
3365 if (code == INSN && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
3370 && (set = single_set (p))
3371 && GET_CODE (SET_DEST (set)) == REG
3372 && REGNO (SET_DEST (set)) == regno)
3374 this = loop_invariant_p (loop, SET_SRC (set));
3377 else if ((temp = find_reg_note (p, REG_EQUAL, NULL_RTX)))
3379 /* If this is a libcall, then any invariant REG_EQUAL note is OK.
3380 If this is an ordinary insn, then only CONSTANT_P REG_EQUAL
3382 this = (CONSTANT_P (XEXP (temp, 0))
3383 || (find_reg_note (p, REG_RETVAL, NULL_RTX)
3384 && loop_invariant_p (loop, XEXP (temp, 0))));
3391 else if (code != NOTE)
3393 regs->array[regno].set_in_loop = old;
3398 regs->array[regno].set_in_loop = old;
3399 /* If loop_invariant_p ever returned 2, we return 2. */
3400 return 1 + (value & 2);
3404 /* I don't think this condition is sufficient to allow INSN
3405 to be moved, so we no longer test it. */
3407 /* Return 1 if all insns in the basic block of INSN and following INSN
3408 that set REG are invariant according to TABLE. */
3411 all_sets_invariant_p (reg, insn, table)
3416 int regno = REGNO (reg);
3422 code = GET_CODE (p);
3423 if (code == CODE_LABEL || code == JUMP_INSN)
3425 if (code == INSN && GET_CODE (PATTERN (p)) == SET
3426 && GET_CODE (SET_DEST (PATTERN (p))) == REG
3427 && REGNO (SET_DEST (PATTERN (p))) == regno)
3429 if (! loop_invariant_p (loop, SET_SRC (PATTERN (p)), table))
3436 /* Look at all uses (not sets) of registers in X. For each, if it is
3437 the single use, set USAGE[REGNO] to INSN; if there was a previous use in
3438 a different insn, set USAGE[REGNO] to const0_rtx. */
3441 find_single_use_in_loop (regs, insn, x)
3442 struct loop_regs *regs;
3446 enum rtx_code code = GET_CODE (x);
3447 const char *fmt = GET_RTX_FORMAT (code);
3451 regs->array[REGNO (x)].single_usage
3452 = (regs->array[REGNO (x)].single_usage != 0
3453 && regs->array[REGNO (x)].single_usage != insn)
3454 ? const0_rtx : insn;
3456 else if (code == SET)
3458 /* Don't count SET_DEST if it is a REG; otherwise count things
3459 in SET_DEST because if a register is partially modified, it won't
3460 show up as a potential movable so we don't care how USAGE is set
3462 if (GET_CODE (SET_DEST (x)) != REG)
3463 find_single_use_in_loop (regs, insn, SET_DEST (x));
3464 find_single_use_in_loop (regs, insn, SET_SRC (x));
3467 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3469 if (fmt[i] == 'e' && XEXP (x, i) != 0)
3470 find_single_use_in_loop (regs, insn, XEXP (x, i));
3471 else if (fmt[i] == 'E')
3472 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3473 find_single_use_in_loop (regs, insn, XVECEXP (x, i, j));
3477 /* Count and record any set in X which is contained in INSN. Update
3478 REGS->array[I].MAY_NOT_OPTIMIZE and LAST_SET for any register I set
3482 count_one_set (regs, insn, x, last_set)
3483 struct loop_regs *regs;
3487 if (GET_CODE (x) == CLOBBER && GET_CODE (XEXP (x, 0)) == REG)
3488 /* Don't move a reg that has an explicit clobber.
3489 It's not worth the pain to try to do it correctly. */
3490 regs->array[REGNO (XEXP (x, 0))].may_not_optimize = 1;
3492 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
3494 rtx dest = SET_DEST (x);
3495 while (GET_CODE (dest) == SUBREG
3496 || GET_CODE (dest) == ZERO_EXTRACT
3497 || GET_CODE (dest) == SIGN_EXTRACT
3498 || GET_CODE (dest) == STRICT_LOW_PART)
3499 dest = XEXP (dest, 0);
3500 if (GET_CODE (dest) == REG)
3503 int regno = REGNO (dest);
3504 for (i = 0; i < LOOP_REGNO_NREGS (regno, dest); i++)
3506 /* If this is the first setting of this reg
3507 in current basic block, and it was set before,
3508 it must be set in two basic blocks, so it cannot
3509 be moved out of the loop. */
3510 if (regs->array[regno].set_in_loop > 0
3512 regs->array[regno+i].may_not_optimize = 1;
3513 /* If this is not first setting in current basic block,
3514 see if reg was used in between previous one and this.
3515 If so, neither one can be moved. */
3516 if (last_set[regno] != 0
3517 && reg_used_between_p (dest, last_set[regno], insn))
3518 regs->array[regno+i].may_not_optimize = 1;
3519 if (regs->array[regno+i].set_in_loop < 127)
3520 ++regs->array[regno+i].set_in_loop;
3521 last_set[regno+i] = insn;
3527 /* Given a loop that is bounded by LOOP->START and LOOP->END and that
3528 is entered at LOOP->SCAN_START, return 1 if the register set in SET
3529 contained in insn INSN is used by any insn that precedes INSN in
3530 cyclic order starting from the loop entry point.
3532 We don't want to use INSN_LUID here because if we restrict INSN to those
3533 that have a valid INSN_LUID, it means we cannot move an invariant out
3534 from an inner loop past two loops. */
3537 loop_reg_used_before_p (loop, set, insn)
3538 const struct loop *loop;
3541 rtx reg = SET_DEST (set);
3544 /* Scan forward checking for register usage. If we hit INSN, we
3545 are done. Otherwise, if we hit LOOP->END, wrap around to LOOP->START. */
3546 for (p = loop->scan_start; p != insn; p = NEXT_INSN (p))
3548 if (INSN_P (p) && reg_overlap_mentioned_p (reg, PATTERN (p)))
3559 /* Information we collect about arrays that we might want to prefetch. */
3560 struct prefetch_info
3562 struct iv_class *class; /* Class this prefetch is based on. */
3563 struct induction *giv; /* GIV this prefetch is based on. */
3564 rtx base_address; /* Start prefetching from this address plus
3566 HOST_WIDE_INT index;
3567 HOST_WIDE_INT stride; /* Prefetch stride in bytes in each
3569 unsigned int bytes_accesed; /* Sum of sizes of all acceses to this
3570 prefetch area in one iteration. */
3571 unsigned int total_bytes; /* Total bytes loop will access in this block.
3572 This is set only for loops with known
3573 iteration counts and is 0xffffffff
3575 unsigned int write : 1; /* 1 for read/write prefetches. */
3576 unsigned int prefetch_in_loop : 1;
3577 /* 1 for those chosen for prefetching. */
3578 unsigned int prefetch_before_loop : 1;
3579 /* 1 for those chosen for prefetching. */
3582 /* Data used by check_store function. */
3583 struct check_store_data
3589 static void check_store PARAMS ((rtx, rtx, void *));
3590 static void emit_prefetch_instructions PARAMS ((struct loop *));
3591 static int rtx_equal_for_prefetch_p PARAMS ((rtx, rtx));
3593 /* Set mem_write when mem_address is found. Used as callback to
3596 check_store (x, pat, data)
3597 rtx x, pat ATTRIBUTE_UNUSED;
3600 struct check_store_data *d = (struct check_store_data *) data;
3602 if ((GET_CODE (x) == MEM) && rtx_equal_p (d->mem_address, XEXP (x, 0)))
3606 /* Like rtx_equal_p, but attempts to swap commutative operands. This is
3607 important to get some addresses combined. Later more sophisticated
3608 transformations can be added when necesary.
3610 ??? Same trick with swapping operand is done at several other places.
3611 It can be nice to develop some common way to handle this. */
3614 rtx_equal_for_prefetch_p (x, y)
3619 enum rtx_code code = GET_CODE (x);
3624 if (code != GET_CODE (y))
3627 code = GET_CODE (x);
3629 if (GET_RTX_CLASS (code) == 'c')
3631 return ((rtx_equal_for_prefetch_p (XEXP (x, 0), XEXP (y, 0))
3632 && rtx_equal_for_prefetch_p (XEXP (x, 1), XEXP (y, 1)))
3633 || (rtx_equal_for_prefetch_p (XEXP (x, 0), XEXP (y, 1))
3634 && rtx_equal_for_prefetch_p (XEXP (x, 1), XEXP (y, 0))));
3636 /* Compare the elements. If any pair of corresponding elements fails to
3637 match, return 0 for the whole thing. */
3639 fmt = GET_RTX_FORMAT (code);
3640 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3645 if (XWINT (x, i) != XWINT (y, i))
3650 if (XINT (x, i) != XINT (y, i))
3655 /* Two vectors must have the same length. */
3656 if (XVECLEN (x, i) != XVECLEN (y, i))
3659 /* And the corresponding elements must match. */
3660 for (j = 0; j < XVECLEN (x, i); j++)
3661 if (rtx_equal_for_prefetch_p (XVECEXP (x, i, j),
3662 XVECEXP (y, i, j)) == 0)
3667 if (rtx_equal_for_prefetch_p (XEXP (x, i), XEXP (y, i)) == 0)
3672 if (strcmp (XSTR (x, i), XSTR (y, i)))
3677 /* These are just backpointers, so they don't matter. */
3683 /* It is believed that rtx's at this level will never
3684 contain anything but integers and other rtx's,
3685 except for within LABEL_REFs and SYMBOL_REFs. */
3693 /* Remove constant addition value from the expression X (when present)
3696 static HOST_WIDE_INT
3697 remove_constant_addition (x)
3700 HOST_WIDE_INT addval = 0;
3703 /* Avoid clobbering a shared CONST expression. */
3704 if (GET_CODE (exp) == CONST)
3706 if (GET_CODE (XEXP (exp, 0)) == PLUS
3707 && GET_CODE (XEXP (XEXP (exp, 0), 0)) == SYMBOL_REF
3708 && GET_CODE (XEXP (XEXP (exp, 0), 1)) == CONST_INT)
3710 *x = XEXP (XEXP (exp, 0), 0);
3711 return INTVAL (XEXP (XEXP (exp, 0), 1));
3716 if (GET_CODE (exp) == CONST_INT)
3718 addval = INTVAL (exp);
3722 /* For plus expression recurse on ourself. */
3723 else if (GET_CODE (exp) == PLUS)
3725 addval += remove_constant_addition (&XEXP (exp, 0));
3726 addval += remove_constant_addition (&XEXP (exp, 1));
3728 /* In case our parameter was constant, remove extra zero from the
3730 if (XEXP (exp, 0) == const0_rtx)
3732 else if (XEXP (exp, 1) == const0_rtx)
3739 /* Attempt to identify accesses to arrays that are most likely to cause cache
3740 misses, and emit prefetch instructions a few prefetch blocks forward.
3742 To detect the arrays we use the GIV information that was collected by the
3743 strength reduction pass.
3745 The prefetch instructions are generated after the GIV information is done
3746 and before the strength reduction process. The new GIVs are injected into
3747 the strength reduction tables, so the prefetch addresses are optimized as
3750 GIVs are split into base address, stride, and constant addition values.
3751 GIVs with the same address, stride and close addition values are combined
3752 into a single prefetch. Also writes to GIVs are detected, so that prefetch
3753 for write instructions can be used for the block we write to, on machines
3754 that support write prefetches.
3756 Several heuristics are used to determine when to prefetch. They are
3757 controlled by defined symbols that can be overridden for each target. */
3760 emit_prefetch_instructions (loop)
3763 int num_prefetches = 0;
3764 int num_real_prefetches = 0;
3765 int num_real_write_prefetches = 0;
3768 struct iv_class *bl;
3769 struct induction *iv;
3770 struct prefetch_info info[MAX_PREFETCHES];
3771 struct loop_ivs *ivs = LOOP_IVS (loop);
3776 /* Consider only loops w/o calls. When a call is done, the loop is probably
3777 slow enough to read the memory. */
3778 if (PREFETCH_NO_CALL && LOOP_INFO (loop)->has_call)
3780 if (loop_dump_stream)
3781 fprintf (loop_dump_stream, "Prefetch: ignoring loop - has call.\n");
3786 if (PREFETCH_NO_LOW_LOOPCNT
3787 && LOOP_INFO (loop)->n_iterations
3788 && LOOP_INFO (loop)->n_iterations <= PREFETCH_LOW_LOOPCNT)
3790 if (loop_dump_stream)
3791 fprintf (loop_dump_stream,
3792 "Prefetch: ignoring loop - not enought iterations.\n");
3796 /* Search all induction variables and pick those interesting for the prefetch
3798 for (bl = ivs->list; bl; bl = bl->next)
3800 struct induction *biv = bl->biv, *biv1;
3805 /* Expect all BIVs to be executed in each iteration. This makes our
3806 analysis more conservative. */
3809 /* Discard non-constant additions that we can't handle well yet, and
3810 BIVs that are executed multiple times; such BIVs ought to be
3811 handled in the nested loop. We accept not_every_iteration BIVs,
3812 since these only result in larger strides and make our
3813 heuristics more conservative.
3814 ??? What does the last sentence mean? */
3815 if (GET_CODE (biv->add_val) != CONST_INT)
3817 if (loop_dump_stream)
3819 fprintf (loop_dump_stream,
3820 "Prefetch: biv %i ignored: non-constant addition at insn %i:",
3821 REGNO (biv->src_reg), INSN_UID (biv->insn));
3822 print_rtl (loop_dump_stream, biv->add_val);
3823 fprintf (loop_dump_stream, "\n");
3828 if (biv->maybe_multiple)
3830 if (loop_dump_stream)
3832 fprintf (loop_dump_stream,
3833 "Prefetch: biv %i ignored: maybe_multiple at insn %i:",
3834 REGNO (biv->src_reg), INSN_UID (biv->insn));
3835 print_rtl (loop_dump_stream, biv->add_val);
3836 fprintf (loop_dump_stream, "\n");
3841 basestride += INTVAL (biv1->add_val);
3842 biv1 = biv1->next_iv;
3845 if (biv1 || !basestride)
3848 for (iv = bl->giv; iv; iv = iv->next_iv)
3852 HOST_WIDE_INT index = 0;
3854 HOST_WIDE_INT stride;
3855 struct check_store_data d;
3856 int size = GET_MODE_SIZE (GET_MODE (iv));
3858 /* There are several reasons why an induction variable is not
3859 interesting to us. */
3860 if (iv->giv_type != DEST_ADDR
3861 /* We are interested only in constant stride memory references
3862 in order to be able to compute density easily. */
3863 || GET_CODE (iv->mult_val) != CONST_INT
3864 /* Don't handle reversed order prefetches, since they are usually
3865 ineffective. Later we may be able to reverse such BIVs. */
3866 || (PREFETCH_NO_REVERSE_ORDER
3867 && (stride = INTVAL (iv->mult_val) * basestride) < 0)
3868 /* Prefetching of accesses with such an extreme stride is probably
3869 not worthwhile, either. */
3870 || (PREFETCH_NO_EXTREME_STRIDE
3871 && stride > PREFETCH_EXTREME_STRIDE)
3872 /* Ignore GIVs with varying add values; we can't predict the
3873 value for the next iteration. */
3874 || !loop_invariant_p (loop, iv->add_val)
3875 /* Ignore GIVs in the nested loops; they ought to have been
3877 || iv->maybe_multiple)
3879 if (loop_dump_stream)
3880 fprintf (loop_dump_stream, "Prefetch: Ignoring giv at %i\n",
3881 INSN_UID (iv->insn));
3885 /* Determine the pointer to the basic array we are examining. It is
3886 the sum of the BIV's initial value and the GIV's add_val. */
3889 address = copy_rtx (iv->add_val);
3890 temp = copy_rtx (bl->initial_value);
3892 address = simplify_gen_binary (PLUS, Pmode, temp, address);
3893 index = remove_constant_addition (&address);
3897 d.mem_address = *iv->location;
3899 /* When the GIV is not always executed, we might be better off by
3900 not dirtying the cache pages. */
3901 if (PREFETCH_NOT_ALWAYS || iv->always_executed)
3902 note_stores (PATTERN (iv->insn), check_store, &d);
3904 /* Attempt to find another prefetch to the same array and see if we
3905 can merge this one. */
3906 for (i = 0; i < num_prefetches; i++)
3907 if (rtx_equal_for_prefetch_p (address, info[i].base_address)
3908 && stride == info[i].stride)
3910 /* In case both access same array (same location
3911 just with small difference in constant indexes), merge
3912 the prefetches. Just do the later and the earlier will
3913 get prefetched from previous iteration.
3914 4096 is artificial threshold. It should not be too small,
3915 but also not bigger than small portion of memory usually
3916 traversed by single loop. */
3917 if (index >= info[i].index && index - info[i].index < 4096)
3919 info[i].write |= d.mem_write;
3920 info[i].bytes_accesed += size;
3921 info[i].index = index;
3924 info[num_prefetches].base_address = address;
3929 if (index < info[i].index && info[i].index - index < 4096)
3931 info[i].write |= d.mem_write;
3932 info[i].bytes_accesed += size;
3938 /* Merging failed. */
3941 info[num_prefetches].giv = iv;
3942 info[num_prefetches].class = bl;
3943 info[num_prefetches].index = index;
3944 info[num_prefetches].stride = stride;
3945 info[num_prefetches].base_address = address;
3946 info[num_prefetches].write = d.mem_write;
3947 info[num_prefetches].bytes_accesed = size;
3949 if (num_prefetches >= MAX_PREFETCHES)
3951 if (loop_dump_stream)
3952 fprintf (loop_dump_stream,
3953 "Maximal number of prefetches exceeded.\n");
3960 for (i = 0; i < num_prefetches; i++)
3962 /* Attempt to calculate the number of bytes fetched by the loop.
3964 if (LOOP_INFO (loop)->n_iterations
3965 && ((unsigned HOST_WIDE_INT) (0xffffffff / info[i].stride)
3966 >= LOOP_INFO (loop)->n_iterations))
3967 info[i].total_bytes = info[i].stride * LOOP_INFO (loop)->n_iterations;
3969 info[i].total_bytes = 0xffffffff;
3971 /* Prefetch is worthwhile only when the loads/stores are dense. */
3972 if (PREFETCH_ONLY_DENSE_MEM
3973 && info[i].bytes_accesed * 256 / info[i].stride > PREFETCH_DENSE_MEM
3974 && (info[i].total_bytes / PREFETCH_BLOCK
3975 >= PREFETCH_BLOCKS_BEFORE_LOOP_MIN))
3977 info[i].prefetch_before_loop = 1;
3978 info[i].prefetch_in_loop
3979 = (info[i].total_bytes / PREFETCH_BLOCK
3980 > PREFETCH_BLOCKS_BEFORE_LOOP_MAX);
3983 info[i].prefetch_in_loop = 0, info[i].prefetch_before_loop = 0;
3985 if (info[i].prefetch_in_loop)
3987 num_real_prefetches += ((info[i].stride + PREFETCH_BLOCK - 1)
3990 num_real_write_prefetches
3991 += (info[i].stride + PREFETCH_BLOCK - 1) / PREFETCH_BLOCK;
3995 if (loop_dump_stream)
3997 for (i = 0; i < num_prefetches; i++)
3999 fprintf (loop_dump_stream, "Prefetch insn %i address: ",
4000 INSN_UID (info[i].giv->insn));
4001 print_rtl (loop_dump_stream, info[i].base_address);
4002 fprintf (loop_dump_stream, " Index: ");
4003 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, info[i].index);
4004 fprintf (loop_dump_stream, " stride: ");
4005 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, info[i].stride);
4006 fprintf (loop_dump_stream,
4007 " density: %i%% total_bytes: %u%sin loop: %s before: %s\n",
4008 (int) (info[i].bytes_accesed * 100 / info[i].stride),
4009 info[i].total_bytes,
4010 info[i].write ? " read/write " : " read only ",
4011 info[i].prefetch_in_loop ? "yes" : "no",
4012 info[i].prefetch_before_loop ? "yes" : "no");
4015 fprintf (loop_dump_stream, "Real prefetches needed: %i (write: %i)\n",
4016 num_real_prefetches, num_real_write_prefetches);
4019 if (!num_real_prefetches)
4022 ahead = SIMULTANEOUS_PREFETCHES / num_real_prefetches;
4027 for (i = 0; i < num_prefetches; i++)
4029 if (info[i].prefetch_in_loop)
4033 for (y = 0; y < ((info[i].stride + PREFETCH_BLOCK - 1)
4034 / PREFETCH_BLOCK); y++)
4036 rtx loc = copy_rtx (*info[i].giv->location);
4038 int bytes_ahead = PREFETCH_BLOCK * (ahead + y);
4039 rtx before_insn = info[i].giv->insn;
4040 rtx prev_insn = PREV_INSN (info[i].giv->insn);
4042 /* We can save some effort by offsetting the address on
4043 architectures with offsettable memory references. */
4044 if (offsettable_address_p (0, VOIDmode, loc))
4045 loc = plus_constant (loc, bytes_ahead);
4048 rtx reg = gen_reg_rtx (Pmode);
4049 loop_iv_add_mult_emit_before (loop, loc, const1_rtx,
4050 GEN_INT (bytes_ahead), reg,
4055 /* Make sure the address operand is valid for prefetch. */
4056 if (! (*insn_data[(int)CODE_FOR_prefetch].operand[0].predicate)
4058 insn_data[(int)CODE_FOR_prefetch].operand[0].mode))
4059 loc = force_reg (Pmode, loc);
4060 emit_insn_before (gen_prefetch (loc, GEN_INT (info[i].write),
4064 /* Check all insns emitted and record the new GIV
4066 insn = NEXT_INSN (prev_insn);
4067 while (insn != before_insn)
4069 insn = check_insn_for_givs (loop, insn,
4070 info[i].giv->always_executed,
4071 info[i].giv->maybe_multiple);
4072 insn = NEXT_INSN (insn);
4077 if (info[i].prefetch_before_loop)
4081 /* Emit INSNs before the loop to fetch the first cache lines. */
4083 (!info[i].prefetch_in_loop || y < ahead)
4084 && y * PREFETCH_BLOCK < (int) info[i].total_bytes; y ++)
4086 rtx reg = gen_reg_rtx (Pmode);
4087 rtx loop_start = loop->start;
4088 rtx add_val = simplify_gen_binary (PLUS, Pmode,
4089 info[i].giv->add_val,
4090 GEN_INT (y * PREFETCH_BLOCK));
4092 loop_iv_add_mult_emit_before (loop, info[i].class->initial_value,
4093 info[i].giv->mult_val,
4094 add_val, reg, 0, loop_start);
4095 emit_insn_before (gen_prefetch (reg, GEN_INT (info[i].write),
4105 /* A "basic induction variable" or biv is a pseudo reg that is set
4106 (within this loop) only by incrementing or decrementing it. */
4107 /* A "general induction variable" or giv is a pseudo reg whose
4108 value is a linear function of a biv. */
4110 /* Bivs are recognized by `basic_induction_var';
4111 Givs by `general_induction_var'. */
4113 /* Communication with routines called via `note_stores'. */
4115 static rtx note_insn;
4117 /* Dummy register to have non-zero DEST_REG for DEST_ADDR type givs. */
4119 static rtx addr_placeholder;
4121 /* ??? Unfinished optimizations, and possible future optimizations,
4122 for the strength reduction code. */
4124 /* ??? The interaction of biv elimination, and recognition of 'constant'
4125 bivs, may cause problems. */
4127 /* ??? Add heuristics so that DEST_ADDR strength reduction does not cause
4128 performance problems.
4130 Perhaps don't eliminate things that can be combined with an addressing
4131 mode. Find all givs that have the same biv, mult_val, and add_val;
4132 then for each giv, check to see if its only use dies in a following
4133 memory address. If so, generate a new memory address and check to see
4134 if it is valid. If it is valid, then store the modified memory address,
4135 otherwise, mark the giv as not done so that it will get its own iv. */
4137 /* ??? Could try to optimize branches when it is known that a biv is always
4140 /* ??? When replace a biv in a compare insn, we should replace with closest
4141 giv so that an optimized branch can still be recognized by the combiner,
4142 e.g. the VAX acb insn. */
4144 /* ??? Many of the checks involving uid_luid could be simplified if regscan
4145 was rerun in loop_optimize whenever a register was added or moved.
4146 Also, some of the optimizations could be a little less conservative. */
4148 /* Scan the loop body and call FNCALL for each insn. In the addition to the
4149 LOOP and INSN parameters pass MAYBE_MULTIPLE and NOT_EVERY_ITERATION to the
4152 NOT_EVERY_ITERATION if current insn is not executed at least once for every
4153 loop iteration except for the last one.
4155 MAYBE_MULTIPLE is 1 if current insn may be executed more than once for every
4159 for_each_insn_in_loop (loop, fncall)
4161 loop_insn_callback fncall;
4163 /* This is 1 if current insn is not executed at least once for every loop
4165 int not_every_iteration = 0;
4166 int maybe_multiple = 0;
4167 int past_loop_latch = 0;
4171 /* If loop_scan_start points to the loop exit test, we have to be wary of
4172 subversive use of gotos inside expression statements. */
4173 if (prev_nonnote_insn (loop->scan_start) != prev_nonnote_insn (loop->start))
4174 maybe_multiple = back_branch_in_range_p (loop, loop->scan_start);
4176 /* Scan through loop to find all possible bivs. */
4178 for (p = next_insn_in_loop (loop, loop->scan_start);
4180 p = next_insn_in_loop (loop, p))
4182 p = fncall (loop, p, not_every_iteration, maybe_multiple);
4184 /* Past CODE_LABEL, we get to insns that may be executed multiple
4185 times. The only way we can be sure that they can't is if every
4186 jump insn between here and the end of the loop either
4187 returns, exits the loop, is a jump to a location that is still
4188 behind the label, or is a jump to the loop start. */
4190 if (GET_CODE (p) == CODE_LABEL)
4198 insn = NEXT_INSN (insn);
4199 if (insn == loop->scan_start)
4201 if (insn == loop->end)
4207 if (insn == loop->scan_start)
4211 if (GET_CODE (insn) == JUMP_INSN
4212 && GET_CODE (PATTERN (insn)) != RETURN
4213 && (!any_condjump_p (insn)
4214 || (JUMP_LABEL (insn) != 0
4215 && JUMP_LABEL (insn) != loop->scan_start
4216 && !loop_insn_first_p (p, JUMP_LABEL (insn)))))
4224 /* Past a jump, we get to insns for which we can't count
4225 on whether they will be executed during each iteration. */
4226 /* This code appears twice in strength_reduce. There is also similar
4227 code in scan_loop. */
4228 if (GET_CODE (p) == JUMP_INSN
4229 /* If we enter the loop in the middle, and scan around to the
4230 beginning, don't set not_every_iteration for that.
4231 This can be any kind of jump, since we want to know if insns
4232 will be executed if the loop is executed. */
4233 && !(JUMP_LABEL (p) == loop->top
4234 && ((NEXT_INSN (NEXT_INSN (p)) == loop->end
4235 && any_uncondjump_p (p))
4236 || (NEXT_INSN (p) == loop->end && any_condjump_p (p)))))
4240 /* If this is a jump outside the loop, then it also doesn't
4241 matter. Check to see if the target of this branch is on the
4242 loop->exits_labels list. */
4244 for (label = loop->exit_labels; label; label = LABEL_NEXTREF (label))
4245 if (XEXP (label, 0) == JUMP_LABEL (p))
4249 not_every_iteration = 1;
4252 else if (GET_CODE (p) == NOTE)
4254 /* At the virtual top of a converted loop, insns are again known to
4255 be executed each iteration: logically, the loop begins here
4256 even though the exit code has been duplicated.
4258 Insns are also again known to be executed each iteration at
4259 the LOOP_CONT note. */
4260 if ((NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP
4261 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_CONT)
4263 not_every_iteration = 0;
4264 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
4266 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
4270 /* Note if we pass a loop latch. If we do, then we can not clear
4271 NOT_EVERY_ITERATION below when we pass the last CODE_LABEL in
4272 a loop since a jump before the last CODE_LABEL may have started
4273 a new loop iteration.
4275 Note that LOOP_TOP is only set for rotated loops and we need
4276 this check for all loops, so compare against the CODE_LABEL
4277 which immediately follows LOOP_START. */
4278 if (GET_CODE (p) == JUMP_INSN
4279 && JUMP_LABEL (p) == NEXT_INSN (loop->start))
4280 past_loop_latch = 1;
4282 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
4283 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
4284 or not an insn is known to be executed each iteration of the
4285 loop, whether or not any iterations are known to occur.
4287 Therefore, if we have just passed a label and have no more labels
4288 between here and the test insn of the loop, and we have not passed
4289 a jump to the top of the loop, then we know these insns will be
4290 executed each iteration. */
4292 if (not_every_iteration
4294 && GET_CODE (p) == CODE_LABEL
4295 && no_labels_between_p (p, loop->end)
4296 && loop_insn_first_p (p, loop->cont))
4297 not_every_iteration = 0;
4302 loop_bivs_find (loop)
4305 struct loop_regs *regs = LOOP_REGS (loop);
4306 struct loop_ivs *ivs = LOOP_IVS (loop);
4307 /* Temporary list pointers for traversing ivs->list. */
4308 struct iv_class *bl, **backbl;
4312 for_each_insn_in_loop (loop, check_insn_for_bivs);
4314 /* Scan ivs->list to remove all regs that proved not to be bivs.
4315 Make a sanity check against regs->n_times_set. */
4316 for (backbl = &ivs->list, bl = *backbl; bl; bl = bl->next)
4318 if (REG_IV_TYPE (ivs, bl->regno) != BASIC_INDUCT
4319 /* Above happens if register modified by subreg, etc. */
4320 /* Make sure it is not recognized as a basic induction var: */
4321 || regs->array[bl->regno].n_times_set != bl->biv_count
4322 /* If never incremented, it is invariant that we decided not to
4323 move. So leave it alone. */
4324 || ! bl->incremented)
4326 if (loop_dump_stream)
4327 fprintf (loop_dump_stream, "Biv %d: discarded, %s\n",
4329 (REG_IV_TYPE (ivs, bl->regno) != BASIC_INDUCT
4330 ? "not induction variable"
4331 : (! bl->incremented ? "never incremented"
4334 REG_IV_TYPE (ivs, bl->regno) = NOT_BASIC_INDUCT;
4341 if (loop_dump_stream)
4342 fprintf (loop_dump_stream, "Biv %d: verified\n", bl->regno);
4348 /* Determine how BIVS are initialised by looking through pre-header
4349 extended basic block. */
4351 loop_bivs_init_find (loop)
4354 struct loop_ivs *ivs = LOOP_IVS (loop);
4355 /* Temporary list pointers for traversing ivs->list. */
4356 struct iv_class *bl;
4360 /* Find initial value for each biv by searching backwards from loop_start,
4361 halting at first label. Also record any test condition. */
4364 for (p = loop->start; p && GET_CODE (p) != CODE_LABEL; p = PREV_INSN (p))
4370 if (GET_CODE (p) == CALL_INSN)
4374 note_stores (PATTERN (p), record_initial, ivs);
4376 /* Record any test of a biv that branches around the loop if no store
4377 between it and the start of loop. We only care about tests with
4378 constants and registers and only certain of those. */
4379 if (GET_CODE (p) == JUMP_INSN
4380 && JUMP_LABEL (p) != 0
4381 && next_real_insn (JUMP_LABEL (p)) == next_real_insn (loop->end)
4382 && (test = get_condition_for_loop (loop, p)) != 0
4383 && GET_CODE (XEXP (test, 0)) == REG
4384 && REGNO (XEXP (test, 0)) < max_reg_before_loop
4385 && (bl = REG_IV_CLASS (ivs, REGNO (XEXP (test, 0)))) != 0
4386 && valid_initial_value_p (XEXP (test, 1), p, call_seen, loop->start)
4387 && bl->init_insn == 0)
4389 /* If an NE test, we have an initial value! */
4390 if (GET_CODE (test) == NE)
4393 bl->init_set = gen_rtx_SET (VOIDmode,
4394 XEXP (test, 0), XEXP (test, 1));
4397 bl->initial_test = test;
4403 /* Look at the each biv and see if we can say anything better about its
4404 initial value from any initializing insns set up above. (This is done
4405 in two passes to avoid missing SETs in a PARALLEL.) */
4407 loop_bivs_check (loop)
4410 struct loop_ivs *ivs = LOOP_IVS (loop);
4411 /* Temporary list pointers for traversing ivs->list. */
4412 struct iv_class *bl;
4413 struct iv_class **backbl;
4415 for (backbl = &ivs->list; (bl = *backbl); backbl = &bl->next)
4420 if (! bl->init_insn)
4423 /* IF INIT_INSN has a REG_EQUAL or REG_EQUIV note and the value
4424 is a constant, use the value of that. */
4425 if (((note = find_reg_note (bl->init_insn, REG_EQUAL, 0)) != NULL
4426 && CONSTANT_P (XEXP (note, 0)))
4427 || ((note = find_reg_note (bl->init_insn, REG_EQUIV, 0)) != NULL
4428 && CONSTANT_P (XEXP (note, 0))))
4429 src = XEXP (note, 0);
4431 src = SET_SRC (bl->init_set);
4433 if (loop_dump_stream)
4434 fprintf (loop_dump_stream,
4435 "Biv %d: initialized at insn %d: initial value ",
4436 bl->regno, INSN_UID (bl->init_insn));
4438 if ((GET_MODE (src) == GET_MODE (regno_reg_rtx[bl->regno])
4439 || GET_MODE (src) == VOIDmode)
4440 && valid_initial_value_p (src, bl->init_insn,
4441 LOOP_INFO (loop)->pre_header_has_call,
4444 bl->initial_value = src;
4446 if (loop_dump_stream)
4448 print_simple_rtl (loop_dump_stream, src);
4449 fputc ('\n', loop_dump_stream);
4452 /* If we can't make it a giv,
4453 let biv keep initial value of "itself". */
4454 else if (loop_dump_stream)
4455 fprintf (loop_dump_stream, "is complex\n");
4460 /* Search the loop for general induction variables. */
4463 loop_givs_find (loop)
4466 for_each_insn_in_loop (loop, check_insn_for_givs);
4470 /* For each giv for which we still don't know whether or not it is
4471 replaceable, check to see if it is replaceable because its final value
4472 can be calculated. */
4475 loop_givs_check (loop)
4478 struct loop_ivs *ivs = LOOP_IVS (loop);
4479 struct iv_class *bl;
4481 for (bl = ivs->list; bl; bl = bl->next)
4483 struct induction *v;
4485 for (v = bl->giv; v; v = v->next_iv)
4486 if (! v->replaceable && ! v->not_replaceable)
4487 check_final_value (loop, v);
4492 /* Return non-zero if it is possible to eliminate the biv BL provided
4493 all givs are reduced. This is possible if either the reg is not
4494 used outside the loop, or we can compute what its final value will
4498 loop_biv_eliminable_p (loop, bl, threshold, insn_count)
4500 struct iv_class *bl;
4504 /* For architectures with a decrement_and_branch_until_zero insn,
4505 don't do this if we put a REG_NONNEG note on the endtest for this
4508 #ifdef HAVE_decrement_and_branch_until_zero
4511 if (loop_dump_stream)
4512 fprintf (loop_dump_stream,
4513 "Cannot eliminate nonneg biv %d.\n", bl->regno);
4518 /* Check that biv is used outside loop or if it has a final value.
4519 Compare against bl->init_insn rather than loop->start. We aren't
4520 concerned with any uses of the biv between init_insn and
4521 loop->start since these won't be affected by the value of the biv
4522 elsewhere in the function, so long as init_insn doesn't use the
4525 if ((REGNO_LAST_LUID (bl->regno) < INSN_LUID (loop->end)
4527 && INSN_UID (bl->init_insn) < max_uid_for_loop
4528 && REGNO_FIRST_LUID (bl->regno) >= INSN_LUID (bl->init_insn)
4529 && ! reg_mentioned_p (bl->biv->dest_reg, SET_SRC (bl->init_set)))
4530 || (bl->final_value = final_biv_value (loop, bl)))
4531 return maybe_eliminate_biv (loop, bl, 0, threshold, insn_count);
4533 if (loop_dump_stream)
4535 fprintf (loop_dump_stream,
4536 "Cannot eliminate biv %d.\n",
4538 fprintf (loop_dump_stream,
4539 "First use: insn %d, last use: insn %d.\n",
4540 REGNO_FIRST_UID (bl->regno),
4541 REGNO_LAST_UID (bl->regno));
4547 /* Reduce each giv of BL that we have decided to reduce. */
4550 loop_givs_reduce (loop, bl)
4552 struct iv_class *bl;
4554 struct induction *v;
4556 for (v = bl->giv; v; v = v->next_iv)
4558 struct induction *tv;
4559 if (! v->ignore && v->same == 0)
4561 int auto_inc_opt = 0;
4563 /* If the code for derived givs immediately below has already
4564 allocated a new_reg, we must keep it. */
4566 v->new_reg = gen_reg_rtx (v->mode);
4569 /* If the target has auto-increment addressing modes, and
4570 this is an address giv, then try to put the increment
4571 immediately after its use, so that flow can create an
4572 auto-increment addressing mode. */
4573 if (v->giv_type == DEST_ADDR && bl->biv_count == 1
4574 && bl->biv->always_executed && ! bl->biv->maybe_multiple
4575 /* We don't handle reversed biv's because bl->biv->insn
4576 does not have a valid INSN_LUID. */
4578 && v->always_executed && ! v->maybe_multiple
4579 && INSN_UID (v->insn) < max_uid_for_loop)
4581 /* If other giv's have been combined with this one, then
4582 this will work only if all uses of the other giv's occur
4583 before this giv's insn. This is difficult to check.
4585 We simplify this by looking for the common case where
4586 there is one DEST_REG giv, and this giv's insn is the
4587 last use of the dest_reg of that DEST_REG giv. If the
4588 increment occurs after the address giv, then we can
4589 perform the optimization. (Otherwise, the increment
4590 would have to go before other_giv, and we would not be
4591 able to combine it with the address giv to get an
4592 auto-inc address.) */
4593 if (v->combined_with)
4595 struct induction *other_giv = 0;
4597 for (tv = bl->giv; tv; tv = tv->next_iv)
4605 if (! tv && other_giv
4606 && REGNO (other_giv->dest_reg) < max_reg_before_loop
4607 && (REGNO_LAST_UID (REGNO (other_giv->dest_reg))
4608 == INSN_UID (v->insn))
4609 && INSN_LUID (v->insn) < INSN_LUID (bl->biv->insn))
4612 /* Check for case where increment is before the address
4613 giv. Do this test in "loop order". */
4614 else if ((INSN_LUID (v->insn) > INSN_LUID (bl->biv->insn)
4615 && (INSN_LUID (v->insn) < INSN_LUID (loop->scan_start)
4616 || (INSN_LUID (bl->biv->insn)
4617 > INSN_LUID (loop->scan_start))))
4618 || (INSN_LUID (v->insn) < INSN_LUID (loop->scan_start)
4619 && (INSN_LUID (loop->scan_start)
4620 < INSN_LUID (bl->biv->insn))))
4629 /* We can't put an insn immediately after one setting
4630 cc0, or immediately before one using cc0. */
4631 if ((auto_inc_opt == 1 && sets_cc0_p (PATTERN (v->insn)))
4632 || (auto_inc_opt == -1
4633 && (prev = prev_nonnote_insn (v->insn)) != 0
4635 && sets_cc0_p (PATTERN (prev))))
4641 v->auto_inc_opt = 1;
4645 /* For each place where the biv is incremented, add an insn
4646 to increment the new, reduced reg for the giv. */
4647 for (tv = bl->biv; tv; tv = tv->next_iv)
4652 insert_before = tv->insn;
4653 else if (auto_inc_opt == 1)
4654 insert_before = NEXT_INSN (v->insn);
4656 insert_before = v->insn;
4658 if (tv->mult_val == const1_rtx)
4659 loop_iv_add_mult_emit_before (loop, tv->add_val, v->mult_val,
4660 v->new_reg, v->new_reg,
4662 else /* tv->mult_val == const0_rtx */
4663 /* A multiply is acceptable here
4664 since this is presumed to be seldom executed. */
4665 loop_iv_add_mult_emit_before (loop, tv->add_val, v->mult_val,
4666 v->add_val, v->new_reg,
4670 /* Add code at loop start to initialize giv's reduced reg. */
4672 loop_iv_add_mult_hoist (loop,
4673 extend_value_for_giv (v, bl->initial_value),
4674 v->mult_val, v->add_val, v->new_reg);
4680 /* Check for givs whose first use is their definition and whose
4681 last use is the definition of another giv. If so, it is likely
4682 dead and should not be used to derive another giv nor to
4686 loop_givs_dead_check (loop, bl)
4687 struct loop *loop ATTRIBUTE_UNUSED;
4688 struct iv_class *bl;
4690 struct induction *v;
4692 for (v = bl->giv; v; v = v->next_iv)
4695 || (v->same && v->same->ignore))
4698 if (v->giv_type == DEST_REG
4699 && REGNO_FIRST_UID (REGNO (v->dest_reg)) == INSN_UID (v->insn))
4701 struct induction *v1;
4703 for (v1 = bl->giv; v1; v1 = v1->next_iv)
4704 if (REGNO_LAST_UID (REGNO (v->dest_reg)) == INSN_UID (v1->insn))
4712 loop_givs_rescan (loop, bl, reg_map)
4714 struct iv_class *bl;
4717 struct induction *v;
4719 for (v = bl->giv; v; v = v->next_iv)
4721 if (v->same && v->same->ignore)
4727 /* Update expression if this was combined, in case other giv was
4730 v->new_reg = replace_rtx (v->new_reg,
4731 v->same->dest_reg, v->same->new_reg);
4733 /* See if this register is known to be a pointer to something. If
4734 so, see if we can find the alignment. First see if there is a
4735 destination register that is a pointer. If so, this shares the
4736 alignment too. Next see if we can deduce anything from the
4737 computational information. If not, and this is a DEST_ADDR
4738 giv, at least we know that it's a pointer, though we don't know
4740 if (GET_CODE (v->new_reg) == REG
4741 && v->giv_type == DEST_REG
4742 && REG_POINTER (v->dest_reg))
4743 mark_reg_pointer (v->new_reg,
4744 REGNO_POINTER_ALIGN (REGNO (v->dest_reg)));
4745 else if (GET_CODE (v->new_reg) == REG
4746 && REG_POINTER (v->src_reg))
4748 unsigned int align = REGNO_POINTER_ALIGN (REGNO (v->src_reg));
4751 || GET_CODE (v->add_val) != CONST_INT
4752 || INTVAL (v->add_val) % (align / BITS_PER_UNIT) != 0)
4755 mark_reg_pointer (v->new_reg, align);
4757 else if (GET_CODE (v->new_reg) == REG
4758 && GET_CODE (v->add_val) == REG
4759 && REG_POINTER (v->add_val))
4761 unsigned int align = REGNO_POINTER_ALIGN (REGNO (v->add_val));
4763 if (align == 0 || GET_CODE (v->mult_val) != CONST_INT
4764 || INTVAL (v->mult_val) % (align / BITS_PER_UNIT) != 0)
4767 mark_reg_pointer (v->new_reg, align);
4769 else if (GET_CODE (v->new_reg) == REG && v->giv_type == DEST_ADDR)
4770 mark_reg_pointer (v->new_reg, 0);
4772 if (v->giv_type == DEST_ADDR)
4773 /* Store reduced reg as the address in the memref where we found
4775 validate_change (v->insn, v->location, v->new_reg, 0);
4776 else if (v->replaceable)
4778 reg_map[REGNO (v->dest_reg)] = v->new_reg;
4782 /* Not replaceable; emit an insn to set the original giv reg from
4783 the reduced giv, same as above. */
4784 loop_insn_emit_after (loop, 0, v->insn,
4785 gen_move_insn (v->dest_reg, v->new_reg));
4788 /* When a loop is reversed, givs which depend on the reversed
4789 biv, and which are live outside the loop, must be set to their
4790 correct final value. This insn is only needed if the giv is
4791 not replaceable. The correct final value is the same as the
4792 value that the giv starts the reversed loop with. */
4793 if (bl->reversed && ! v->replaceable)
4794 loop_iv_add_mult_sink (loop,
4795 extend_value_for_giv (v, bl->initial_value),
4796 v->mult_val, v->add_val, v->dest_reg);
4797 else if (v->final_value)
4798 loop_insn_sink_or_swim (loop,
4799 gen_move_insn (v->dest_reg, v->final_value));
4801 if (loop_dump_stream)
4803 fprintf (loop_dump_stream, "giv at %d reduced to ",
4804 INSN_UID (v->insn));
4805 print_simple_rtl (loop_dump_stream, v->new_reg);
4806 fprintf (loop_dump_stream, "\n");
4813 loop_giv_reduce_benefit (loop, bl, v, test_reg)
4814 struct loop *loop ATTRIBUTE_UNUSED;
4815 struct iv_class *bl;
4816 struct induction *v;
4822 benefit = v->benefit;
4823 PUT_MODE (test_reg, v->mode);
4824 add_cost = iv_add_mult_cost (bl->biv->add_val, v->mult_val,
4825 test_reg, test_reg);
4827 /* Reduce benefit if not replaceable, since we will insert a
4828 move-insn to replace the insn that calculates this giv. Don't do
4829 this unless the giv is a user variable, since it will often be
4830 marked non-replaceable because of the duplication of the exit
4831 code outside the loop. In such a case, the copies we insert are
4832 dead and will be deleted. So they don't have a cost. Similar
4833 situations exist. */
4834 /* ??? The new final_[bg]iv_value code does a much better job of
4835 finding replaceable giv's, and hence this code may no longer be
4837 if (! v->replaceable && ! bl->eliminable
4838 && REG_USERVAR_P (v->dest_reg))
4839 benefit -= copy_cost;
4841 /* Decrease the benefit to count the add-insns that we will insert
4842 to increment the reduced reg for the giv. ??? This can
4843 overestimate the run-time cost of the additional insns, e.g. if
4844 there are multiple basic blocks that increment the biv, but only
4845 one of these blocks is executed during each iteration. There is
4846 no good way to detect cases like this with the current structure
4847 of the loop optimizer. This code is more accurate for
4848 determining code size than run-time benefits. */
4849 benefit -= add_cost * bl->biv_count;
4851 /* Decide whether to strength-reduce this giv or to leave the code
4852 unchanged (recompute it from the biv each time it is used). This
4853 decision can be made independently for each giv. */
4856 /* Attempt to guess whether autoincrement will handle some of the
4857 new add insns; if so, increase BENEFIT (undo the subtraction of
4858 add_cost that was done above). */
4859 if (v->giv_type == DEST_ADDR
4860 /* Increasing the benefit is risky, since this is only a guess.
4861 Avoid increasing register pressure in cases where there would
4862 be no other benefit from reducing this giv. */
4864 && GET_CODE (v->mult_val) == CONST_INT)
4866 int size = GET_MODE_SIZE (GET_MODE (v->mem));
4868 if (HAVE_POST_INCREMENT
4869 && INTVAL (v->mult_val) == size)
4870 benefit += add_cost * bl->biv_count;
4871 else if (HAVE_PRE_INCREMENT
4872 && INTVAL (v->mult_val) == size)
4873 benefit += add_cost * bl->biv_count;
4874 else if (HAVE_POST_DECREMENT
4875 && -INTVAL (v->mult_val) == size)
4876 benefit += add_cost * bl->biv_count;
4877 else if (HAVE_PRE_DECREMENT
4878 && -INTVAL (v->mult_val) == size)
4879 benefit += add_cost * bl->biv_count;
4887 /* Free IV structures for LOOP. */
4890 loop_ivs_free (loop)
4893 struct loop_ivs *ivs = LOOP_IVS (loop);
4894 struct iv_class *iv = ivs->list;
4900 struct iv_class *next = iv->next;
4901 struct induction *induction;
4902 struct induction *next_induction;
4904 for (induction = iv->biv; induction; induction = next_induction)
4906 next_induction = induction->next_iv;
4909 for (induction = iv->giv; induction; induction = next_induction)
4911 next_induction = induction->next_iv;
4921 /* Perform strength reduction and induction variable elimination.
4923 Pseudo registers created during this function will be beyond the
4924 last valid index in several tables including
4925 REGS->ARRAY[I].N_TIMES_SET and REGNO_LAST_UID. This does not cause a
4926 problem here, because the added registers cannot be givs outside of
4927 their loop, and hence will never be reconsidered. But scan_loop
4928 must check regnos to make sure they are in bounds. */
4931 strength_reduce (loop, flags)
4935 struct loop_info *loop_info = LOOP_INFO (loop);
4936 struct loop_regs *regs = LOOP_REGS (loop);
4937 struct loop_ivs *ivs = LOOP_IVS (loop);
4939 /* Temporary list pointer for traversing ivs->list. */
4940 struct iv_class *bl;
4941 /* Ratio of extra register life span we can justify
4942 for saving an instruction. More if loop doesn't call subroutines
4943 since in that case saving an insn makes more difference
4944 and more registers are available. */
4945 /* ??? could set this to last value of threshold in move_movables */
4946 int threshold = (loop_info->has_call ? 1 : 2) * (3 + n_non_fixed_regs);
4947 /* Map of pseudo-register replacements. */
4948 rtx *reg_map = NULL;
4950 int unrolled_insn_copies = 0;
4951 rtx test_reg = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 1);
4952 int insn_count = count_insns_in_loop (loop);
4954 addr_placeholder = gen_reg_rtx (Pmode);
4956 ivs->n_regs = max_reg_before_loop;
4957 ivs->regs = (struct iv *) xcalloc (ivs->n_regs, sizeof (struct iv));
4959 /* Find all BIVs in loop. */
4960 loop_bivs_find (loop);
4962 /* Exit if there are no bivs. */
4965 /* Can still unroll the loop anyways, but indicate that there is no
4966 strength reduction info available. */
4967 if (flags & LOOP_UNROLL)
4968 unroll_loop (loop, insn_count, 0);
4970 loop_ivs_free (loop);
4974 /* Determine how BIVS are initialised by looking through pre-header
4975 extended basic block. */
4976 loop_bivs_init_find (loop);
4978 /* Look at the each biv and see if we can say anything better about its
4979 initial value from any initializing insns set up above. */
4980 loop_bivs_check (loop);
4982 /* Search the loop for general induction variables. */
4983 loop_givs_find (loop);
4985 /* Try to calculate and save the number of loop iterations. This is
4986 set to zero if the actual number can not be calculated. This must
4987 be called after all giv's have been identified, since otherwise it may
4988 fail if the iteration variable is a giv. */
4989 loop_iterations (loop);
4991 #ifdef HAVE_prefetch
4992 if (flags & LOOP_PREFETCH)
4993 emit_prefetch_instructions (loop);
4996 /* Now for each giv for which we still don't know whether or not it is
4997 replaceable, check to see if it is replaceable because its final value
4998 can be calculated. This must be done after loop_iterations is called,
4999 so that final_giv_value will work correctly. */
5000 loop_givs_check (loop);
5002 /* Try to prove that the loop counter variable (if any) is always
5003 nonnegative; if so, record that fact with a REG_NONNEG note
5004 so that "decrement and branch until zero" insn can be used. */
5005 check_dbra_loop (loop, insn_count);
5007 /* Create reg_map to hold substitutions for replaceable giv regs.
5008 Some givs might have been made from biv increments, so look at
5009 ivs->reg_iv_type for a suitable size. */
5010 reg_map_size = ivs->n_regs;
5011 reg_map = (rtx *) xcalloc (reg_map_size, sizeof (rtx));
5013 /* Examine each iv class for feasibility of strength reduction/induction
5014 variable elimination. */
5016 for (bl = ivs->list; bl; bl = bl->next)
5018 struct induction *v;
5021 /* Test whether it will be possible to eliminate this biv
5022 provided all givs are reduced. */
5023 bl->eliminable = loop_biv_eliminable_p (loop, bl, threshold, insn_count);
5025 /* This will be true at the end, if all givs which depend on this
5026 biv have been strength reduced.
5027 We can't (currently) eliminate the biv unless this is so. */
5028 bl->all_reduced = 1;
5030 /* Check each extension dependent giv in this class to see if its
5031 root biv is safe from wrapping in the interior mode. */
5032 check_ext_dependent_givs (bl, loop_info);
5034 /* Combine all giv's for this iv_class. */
5035 combine_givs (regs, bl);
5037 for (v = bl->giv; v; v = v->next_iv)
5039 struct induction *tv;
5041 if (v->ignore || v->same)
5044 benefit = loop_giv_reduce_benefit (loop, bl, v, test_reg);
5046 /* If an insn is not to be strength reduced, then set its ignore
5047 flag, and clear bl->all_reduced. */
5049 /* A giv that depends on a reversed biv must be reduced if it is
5050 used after the loop exit, otherwise, it would have the wrong
5051 value after the loop exit. To make it simple, just reduce all
5052 of such giv's whether or not we know they are used after the loop
5055 if (! flag_reduce_all_givs
5056 && v->lifetime * threshold * benefit < insn_count
5059 if (loop_dump_stream)
5060 fprintf (loop_dump_stream,
5061 "giv of insn %d not worth while, %d vs %d.\n",
5063 v->lifetime * threshold * benefit, insn_count);
5065 bl->all_reduced = 0;
5069 /* Check that we can increment the reduced giv without a
5070 multiply insn. If not, reject it. */
5072 for (tv = bl->biv; tv; tv = tv->next_iv)
5073 if (tv->mult_val == const1_rtx
5074 && ! product_cheap_p (tv->add_val, v->mult_val))
5076 if (loop_dump_stream)
5077 fprintf (loop_dump_stream,
5078 "giv of insn %d: would need a multiply.\n",
5079 INSN_UID (v->insn));
5081 bl->all_reduced = 0;
5087 /* Check for givs whose first use is their definition and whose
5088 last use is the definition of another giv. If so, it is likely
5089 dead and should not be used to derive another giv nor to
5091 loop_givs_dead_check (loop, bl);
5093 /* Reduce each giv that we decided to reduce. */
5094 loop_givs_reduce (loop, bl);
5096 /* Rescan all givs. If a giv is the same as a giv not reduced, mark it
5099 For each giv register that can be reduced now: if replaceable,
5100 substitute reduced reg wherever the old giv occurs;
5101 else add new move insn "giv_reg = reduced_reg". */
5102 loop_givs_rescan (loop, bl, reg_map);
5104 /* All the givs based on the biv bl have been reduced if they
5107 /* For each giv not marked as maybe dead that has been combined with a
5108 second giv, clear any "maybe dead" mark on that second giv.
5109 v->new_reg will either be or refer to the register of the giv it
5112 Doing this clearing avoids problems in biv elimination where
5113 a giv's new_reg is a complex value that can't be put in the
5114 insn but the giv combined with (with a reg as new_reg) is
5115 marked maybe_dead. Since the register will be used in either
5116 case, we'd prefer it be used from the simpler giv. */
5118 for (v = bl->giv; v; v = v->next_iv)
5119 if (! v->maybe_dead && v->same)
5120 v->same->maybe_dead = 0;
5122 /* Try to eliminate the biv, if it is a candidate.
5123 This won't work if ! bl->all_reduced,
5124 since the givs we planned to use might not have been reduced.
5126 We have to be careful that we didn't initially think we could
5127 eliminate this biv because of a giv that we now think may be
5128 dead and shouldn't be used as a biv replacement.
5130 Also, there is the possibility that we may have a giv that looks
5131 like it can be used to eliminate a biv, but the resulting insn
5132 isn't valid. This can happen, for example, on the 88k, where a
5133 JUMP_INSN can compare a register only with zero. Attempts to
5134 replace it with a compare with a constant will fail.
5136 Note that in cases where this call fails, we may have replaced some
5137 of the occurrences of the biv with a giv, but no harm was done in
5138 doing so in the rare cases where it can occur. */
5140 if (bl->all_reduced == 1 && bl->eliminable
5141 && maybe_eliminate_biv (loop, bl, 1, threshold, insn_count))
5143 /* ?? If we created a new test to bypass the loop entirely,
5144 or otherwise drop straight in, based on this test, then
5145 we might want to rewrite it also. This way some later
5146 pass has more hope of removing the initialization of this
5149 /* If final_value != 0, then the biv may be used after loop end
5150 and we must emit an insn to set it just in case.
5152 Reversed bivs already have an insn after the loop setting their
5153 value, so we don't need another one. We can't calculate the
5154 proper final value for such a biv here anyways. */
5155 if (bl->final_value && ! bl->reversed)
5156 loop_insn_sink_or_swim (loop, gen_move_insn
5157 (bl->biv->dest_reg, bl->final_value));
5159 if (loop_dump_stream)
5160 fprintf (loop_dump_stream, "Reg %d: biv eliminated\n",
5163 /* See above note wrt final_value. But since we couldn't eliminate
5164 the biv, we must set the value after the loop instead of before. */
5165 else if (bl->final_value && ! bl->reversed)
5166 loop_insn_sink (loop, gen_move_insn (bl->biv->dest_reg,
5170 /* Go through all the instructions in the loop, making all the
5171 register substitutions scheduled in REG_MAP. */
5173 for (p = loop->start; p != loop->end; p = NEXT_INSN (p))
5174 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
5175 || GET_CODE (p) == CALL_INSN)
5177 replace_regs (PATTERN (p), reg_map, reg_map_size, 0);
5178 replace_regs (REG_NOTES (p), reg_map, reg_map_size, 0);
5182 if (loop_info->n_iterations > 0)
5184 /* When we completely unroll a loop we will likely not need the increment
5185 of the loop BIV and we will not need the conditional branch at the
5187 unrolled_insn_copies = insn_count - 2;
5190 /* When we completely unroll a loop on a HAVE_cc0 machine we will not
5191 need the comparison before the conditional branch at the end of the
5193 unrolled_insn_copies -= 1;
5196 /* We'll need one copy for each loop iteration. */
5197 unrolled_insn_copies *= loop_info->n_iterations;
5199 /* A little slop to account for the ability to remove initialization
5200 code, better CSE, and other secondary benefits of completely
5201 unrolling some loops. */
5202 unrolled_insn_copies -= 1;
5204 /* Clamp the value. */
5205 if (unrolled_insn_copies < 0)
5206 unrolled_insn_copies = 0;
5209 /* Unroll loops from within strength reduction so that we can use the
5210 induction variable information that strength_reduce has already
5211 collected. Always unroll loops that would be as small or smaller
5212 unrolled than when rolled. */
5213 if ((flags & LOOP_UNROLL)
5214 || (!(flags & LOOP_FIRST_PASS)
5215 && loop_info->n_iterations > 0
5216 && unrolled_insn_copies <= insn_count))
5217 unroll_loop (loop, insn_count, 1);
5219 #ifdef HAVE_doloop_end
5220 if (HAVE_doloop_end && (flags & LOOP_BCT) && flag_branch_on_count_reg)
5221 doloop_optimize (loop);
5222 #endif /* HAVE_doloop_end */
5224 /* In case number of iterations is known, drop branch prediction note
5225 in the branch. Do that only in second loop pass, as loop unrolling
5226 may change the number of iterations performed. */
5227 if (flags & LOOP_BCT)
5229 unsigned HOST_WIDE_INT n
5230 = loop_info->n_iterations / loop_info->unroll_number;
5232 predict_insn (PREV_INSN (loop->end), PRED_LOOP_ITERATIONS,
5233 REG_BR_PROB_BASE - REG_BR_PROB_BASE / n);
5236 if (loop_dump_stream)
5237 fprintf (loop_dump_stream, "\n");
5239 loop_ivs_free (loop);
5244 /*Record all basic induction variables calculated in the insn. */
5246 check_insn_for_bivs (loop, p, not_every_iteration, maybe_multiple)
5249 int not_every_iteration;
5252 struct loop_ivs *ivs = LOOP_IVS (loop);
5259 if (GET_CODE (p) == INSN
5260 && (set = single_set (p))
5261 && GET_CODE (SET_DEST (set)) == REG)
5263 dest_reg = SET_DEST (set);
5264 if (REGNO (dest_reg) < max_reg_before_loop
5265 && REGNO (dest_reg) >= FIRST_PSEUDO_REGISTER
5266 && REG_IV_TYPE (ivs, REGNO (dest_reg)) != NOT_BASIC_INDUCT)
5268 if (basic_induction_var (loop, SET_SRC (set),
5269 GET_MODE (SET_SRC (set)),
5270 dest_reg, p, &inc_val, &mult_val,
5273 /* It is a possible basic induction variable.
5274 Create and initialize an induction structure for it. */
5277 = (struct induction *) xmalloc (sizeof (struct induction));
5279 record_biv (loop, v, p, dest_reg, inc_val, mult_val, location,
5280 not_every_iteration, maybe_multiple);
5281 REG_IV_TYPE (ivs, REGNO (dest_reg)) = BASIC_INDUCT;
5283 else if (REGNO (dest_reg) < ivs->n_regs)
5284 REG_IV_TYPE (ivs, REGNO (dest_reg)) = NOT_BASIC_INDUCT;
5290 /* Record all givs calculated in the insn.
5291 A register is a giv if: it is only set once, it is a function of a
5292 biv and a constant (or invariant), and it is not a biv. */
5294 check_insn_for_givs (loop, p, not_every_iteration, maybe_multiple)
5297 int not_every_iteration;
5300 struct loop_regs *regs = LOOP_REGS (loop);
5303 /* Look for a general induction variable in a register. */
5304 if (GET_CODE (p) == INSN
5305 && (set = single_set (p))
5306 && GET_CODE (SET_DEST (set)) == REG
5307 && ! regs->array[REGNO (SET_DEST (set))].may_not_optimize)
5316 rtx last_consec_insn;
5318 dest_reg = SET_DEST (set);
5319 if (REGNO (dest_reg) < FIRST_PSEUDO_REGISTER)
5322 if (/* SET_SRC is a giv. */
5323 (general_induction_var (loop, SET_SRC (set), &src_reg, &add_val,
5324 &mult_val, &ext_val, 0, &benefit, VOIDmode)
5325 /* Equivalent expression is a giv. */
5326 || ((regnote = find_reg_note (p, REG_EQUAL, NULL_RTX))
5327 && general_induction_var (loop, XEXP (regnote, 0), &src_reg,
5328 &add_val, &mult_val, &ext_val, 0,
5329 &benefit, VOIDmode)))
5330 /* Don't try to handle any regs made by loop optimization.
5331 We have nothing on them in regno_first_uid, etc. */
5332 && REGNO (dest_reg) < max_reg_before_loop
5333 /* Don't recognize a BASIC_INDUCT_VAR here. */
5334 && dest_reg != src_reg
5335 /* This must be the only place where the register is set. */
5336 && (regs->array[REGNO (dest_reg)].n_times_set == 1
5337 /* or all sets must be consecutive and make a giv. */
5338 || (benefit = consec_sets_giv (loop, benefit, p,
5340 &add_val, &mult_val, &ext_val,
5341 &last_consec_insn))))
5344 = (struct induction *) xmalloc (sizeof (struct induction));
5346 /* If this is a library call, increase benefit. */
5347 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
5348 benefit += libcall_benefit (p);
5350 /* Skip the consecutive insns, if there are any. */
5351 if (regs->array[REGNO (dest_reg)].n_times_set != 1)
5352 p = last_consec_insn;
5354 record_giv (loop, v, p, src_reg, dest_reg, mult_val, add_val,
5355 ext_val, benefit, DEST_REG, not_every_iteration,
5356 maybe_multiple, (rtx*) 0);
5361 #ifndef DONT_REDUCE_ADDR
5362 /* Look for givs which are memory addresses. */
5363 /* This resulted in worse code on a VAX 8600. I wonder if it
5365 if (GET_CODE (p) == INSN)
5366 find_mem_givs (loop, PATTERN (p), p, not_every_iteration,
5370 /* Update the status of whether giv can derive other givs. This can
5371 change when we pass a label or an insn that updates a biv. */
5372 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
5373 || GET_CODE (p) == CODE_LABEL)
5374 update_giv_derive (loop, p);
5378 /* Return 1 if X is a valid source for an initial value (or as value being
5379 compared against in an initial test).
5381 X must be either a register or constant and must not be clobbered between
5382 the current insn and the start of the loop.
5384 INSN is the insn containing X. */
5387 valid_initial_value_p (x, insn, call_seen, loop_start)
5396 /* Only consider pseudos we know about initialized in insns whose luids
5398 if (GET_CODE (x) != REG
5399 || REGNO (x) >= max_reg_before_loop)
5402 /* Don't use call-clobbered registers across a call which clobbers it. On
5403 some machines, don't use any hard registers at all. */
5404 if (REGNO (x) < FIRST_PSEUDO_REGISTER
5405 && (SMALL_REGISTER_CLASSES
5406 || (call_used_regs[REGNO (x)] && call_seen)))
5409 /* Don't use registers that have been clobbered before the start of the
5411 if (reg_set_between_p (x, insn, loop_start))
5417 /* Scan X for memory refs and check each memory address
5418 as a possible giv. INSN is the insn whose pattern X comes from.
5419 NOT_EVERY_ITERATION is 1 if the insn might not be executed during
5420 every loop iteration. MAYBE_MULTIPLE is 1 if the insn might be executed
5421 more thanonce in each loop iteration. */
5424 find_mem_givs (loop, x, insn, not_every_iteration, maybe_multiple)
5425 const struct loop *loop;
5428 int not_every_iteration, maybe_multiple;
5437 code = GET_CODE (x);
5462 /* This code used to disable creating GIVs with mult_val == 1 and
5463 add_val == 0. However, this leads to lost optimizations when
5464 it comes time to combine a set of related DEST_ADDR GIVs, since
5465 this one would not be seen. */
5467 if (general_induction_var (loop, XEXP (x, 0), &src_reg, &add_val,
5468 &mult_val, &ext_val, 1, &benefit,
5471 /* Found one; record it. */
5473 = (struct induction *) xmalloc (sizeof (struct induction));
5475 record_giv (loop, v, insn, src_reg, addr_placeholder, mult_val,
5476 add_val, ext_val, benefit, DEST_ADDR,
5477 not_every_iteration, maybe_multiple, &XEXP (x, 0));
5488 /* Recursively scan the subexpressions for other mem refs. */
5490 fmt = GET_RTX_FORMAT (code);
5491 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5493 find_mem_givs (loop, XEXP (x, i), insn, not_every_iteration,
5495 else if (fmt[i] == 'E')
5496 for (j = 0; j < XVECLEN (x, i); j++)
5497 find_mem_givs (loop, XVECEXP (x, i, j), insn, not_every_iteration,
5501 /* Fill in the data about one biv update.
5502 V is the `struct induction' in which we record the biv. (It is
5503 allocated by the caller, with alloca.)
5504 INSN is the insn that sets it.
5505 DEST_REG is the biv's reg.
5507 MULT_VAL is const1_rtx if the biv is being incremented here, in which case
5508 INC_VAL is the increment. Otherwise, MULT_VAL is const0_rtx and the biv is
5509 being set to INC_VAL.
5511 NOT_EVERY_ITERATION is nonzero if this biv update is not know to be
5512 executed every iteration; MAYBE_MULTIPLE is nonzero if this biv update
5513 can be executed more than once per iteration. If MAYBE_MULTIPLE
5514 and NOT_EVERY_ITERATION are both zero, we know that the biv update is
5515 executed exactly once per iteration. */
5518 record_biv (loop, v, insn, dest_reg, inc_val, mult_val, location,
5519 not_every_iteration, maybe_multiple)
5521 struct induction *v;
5527 int not_every_iteration;
5530 struct loop_ivs *ivs = LOOP_IVS (loop);
5531 struct iv_class *bl;
5534 v->src_reg = dest_reg;
5535 v->dest_reg = dest_reg;
5536 v->mult_val = mult_val;
5537 v->add_val = inc_val;
5538 v->ext_dependent = NULL_RTX;
5539 v->location = location;
5540 v->mode = GET_MODE (dest_reg);
5541 v->always_computable = ! not_every_iteration;
5542 v->always_executed = ! not_every_iteration;
5543 v->maybe_multiple = maybe_multiple;
5545 /* Add this to the reg's iv_class, creating a class
5546 if this is the first incrementation of the reg. */
5548 bl = REG_IV_CLASS (ivs, REGNO (dest_reg));
5551 /* Create and initialize new iv_class. */
5553 bl = (struct iv_class *) xmalloc (sizeof (struct iv_class));
5555 bl->regno = REGNO (dest_reg);
5561 /* Set initial value to the reg itself. */
5562 bl->initial_value = dest_reg;
5563 bl->final_value = 0;
5564 /* We haven't seen the initializing insn yet */
5567 bl->initial_test = 0;
5568 bl->incremented = 0;
5572 bl->total_benefit = 0;
5574 /* Add this class to ivs->list. */
5575 bl->next = ivs->list;
5578 /* Put it in the array of biv register classes. */
5579 REG_IV_CLASS (ivs, REGNO (dest_reg)) = bl;
5582 /* Update IV_CLASS entry for this biv. */
5583 v->next_iv = bl->biv;
5586 if (mult_val == const1_rtx)
5587 bl->incremented = 1;
5589 if (loop_dump_stream)
5590 loop_biv_dump (v, loop_dump_stream, 0);
5593 /* Fill in the data about one giv.
5594 V is the `struct induction' in which we record the giv. (It is
5595 allocated by the caller, with alloca.)
5596 INSN is the insn that sets it.
5597 BENEFIT estimates the savings from deleting this insn.
5598 TYPE is DEST_REG or DEST_ADDR; it says whether the giv is computed
5599 into a register or is used as a memory address.
5601 SRC_REG is the biv reg which the giv is computed from.
5602 DEST_REG is the giv's reg (if the giv is stored in a reg).
5603 MULT_VAL and ADD_VAL are the coefficients used to compute the giv.
5604 LOCATION points to the place where this giv's value appears in INSN. */
5607 record_giv (loop, v, insn, src_reg, dest_reg, mult_val, add_val, ext_val,
5608 benefit, type, not_every_iteration, maybe_multiple, location)
5609 const struct loop *loop;
5610 struct induction *v;
5614 rtx mult_val, add_val, ext_val;
5617 int not_every_iteration, maybe_multiple;
5620 struct loop_ivs *ivs = LOOP_IVS (loop);
5621 struct induction *b;
5622 struct iv_class *bl;
5623 rtx set = single_set (insn);
5626 /* Attempt to prove constantness of the values. Don't let simplity_rtx
5627 undo the MULT canonicalization that we performed earlier. */
5628 temp = simplify_rtx (add_val);
5630 && ! (GET_CODE (add_val) == MULT
5631 && GET_CODE (temp) == ASHIFT))
5635 v->src_reg = src_reg;
5637 v->dest_reg = dest_reg;
5638 v->mult_val = mult_val;
5639 v->add_val = add_val;
5640 v->ext_dependent = ext_val;
5641 v->benefit = benefit;
5642 v->location = location;
5644 v->combined_with = 0;
5645 v->maybe_multiple = maybe_multiple;
5647 v->derive_adjustment = 0;
5653 v->auto_inc_opt = 0;
5657 /* The v->always_computable field is used in update_giv_derive, to
5658 determine whether a giv can be used to derive another giv. For a
5659 DEST_REG giv, INSN computes a new value for the giv, so its value
5660 isn't computable if INSN insn't executed every iteration.
5661 However, for a DEST_ADDR giv, INSN merely uses the value of the giv;
5662 it does not compute a new value. Hence the value is always computable
5663 regardless of whether INSN is executed each iteration. */
5665 if (type == DEST_ADDR)
5666 v->always_computable = 1;
5668 v->always_computable = ! not_every_iteration;
5670 v->always_executed = ! not_every_iteration;
5672 if (type == DEST_ADDR)
5674 v->mode = GET_MODE (*location);
5677 else /* type == DEST_REG */
5679 v->mode = GET_MODE (SET_DEST (set));
5681 v->lifetime = LOOP_REG_LIFETIME (loop, REGNO (dest_reg));
5683 /* If the lifetime is zero, it means that this register is
5684 really a dead store. So mark this as a giv that can be
5685 ignored. This will not prevent the biv from being eliminated. */
5686 if (v->lifetime == 0)
5689 REG_IV_TYPE (ivs, REGNO (dest_reg)) = GENERAL_INDUCT;
5690 REG_IV_INFO (ivs, REGNO (dest_reg)) = v;
5693 /* Add the giv to the class of givs computed from one biv. */
5695 bl = REG_IV_CLASS (ivs, REGNO (src_reg));
5698 v->next_iv = bl->giv;
5700 /* Don't count DEST_ADDR. This is supposed to count the number of
5701 insns that calculate givs. */
5702 if (type == DEST_REG)
5704 bl->total_benefit += benefit;
5707 /* Fatal error, biv missing for this giv? */
5710 if (type == DEST_ADDR)
5714 /* The giv can be replaced outright by the reduced register only if all
5715 of the following conditions are true:
5716 - the insn that sets the giv is always executed on any iteration
5717 on which the giv is used at all
5718 (there are two ways to deduce this:
5719 either the insn is executed on every iteration,
5720 or all uses follow that insn in the same basic block),
5721 - the giv is not used outside the loop
5722 - no assignments to the biv occur during the giv's lifetime. */
5724 if (REGNO_FIRST_UID (REGNO (dest_reg)) == INSN_UID (insn)
5725 /* Previous line always fails if INSN was moved by loop opt. */
5726 && REGNO_LAST_LUID (REGNO (dest_reg))
5727 < INSN_LUID (loop->end)
5728 && (! not_every_iteration
5729 || last_use_this_basic_block (dest_reg, insn)))
5731 /* Now check that there are no assignments to the biv within the
5732 giv's lifetime. This requires two separate checks. */
5734 /* Check each biv update, and fail if any are between the first
5735 and last use of the giv.
5737 If this loop contains an inner loop that was unrolled, then
5738 the insn modifying the biv may have been emitted by the loop
5739 unrolling code, and hence does not have a valid luid. Just
5740 mark the biv as not replaceable in this case. It is not very
5741 useful as a biv, because it is used in two different loops.
5742 It is very unlikely that we would be able to optimize the giv
5743 using this biv anyways. */
5746 for (b = bl->biv; b; b = b->next_iv)
5748 if (INSN_UID (b->insn) >= max_uid_for_loop
5749 || ((INSN_LUID (b->insn)
5750 >= REGNO_FIRST_LUID (REGNO (dest_reg)))
5751 && (INSN_LUID (b->insn)
5752 <= REGNO_LAST_LUID (REGNO (dest_reg)))))
5755 v->not_replaceable = 1;
5760 /* If there are any backwards branches that go from after the
5761 biv update to before it, then this giv is not replaceable. */
5763 for (b = bl->biv; b; b = b->next_iv)
5764 if (back_branch_in_range_p (loop, b->insn))
5767 v->not_replaceable = 1;
5773 /* May still be replaceable, we don't have enough info here to
5776 v->not_replaceable = 0;
5780 /* Record whether the add_val contains a const_int, for later use by
5785 v->no_const_addval = 1;
5786 if (tem == const0_rtx)
5788 else if (CONSTANT_P (add_val))
5789 v->no_const_addval = 0;
5790 if (GET_CODE (tem) == PLUS)
5794 if (GET_CODE (XEXP (tem, 0)) == PLUS)
5795 tem = XEXP (tem, 0);
5796 else if (GET_CODE (XEXP (tem, 1)) == PLUS)
5797 tem = XEXP (tem, 1);
5801 if (CONSTANT_P (XEXP (tem, 1)))
5802 v->no_const_addval = 0;
5806 if (loop_dump_stream)
5807 loop_giv_dump (v, loop_dump_stream, 0);
5810 /* All this does is determine whether a giv can be made replaceable because
5811 its final value can be calculated. This code can not be part of record_giv
5812 above, because final_giv_value requires that the number of loop iterations
5813 be known, and that can not be accurately calculated until after all givs
5814 have been identified. */
5817 check_final_value (loop, v)
5818 const struct loop *loop;
5819 struct induction *v;
5821 struct loop_ivs *ivs = LOOP_IVS (loop);
5822 struct iv_class *bl;
5823 rtx final_value = 0;
5825 bl = REG_IV_CLASS (ivs, REGNO (v->src_reg));
5827 /* DEST_ADDR givs will never reach here, because they are always marked
5828 replaceable above in record_giv. */
5830 /* The giv can be replaced outright by the reduced register only if all
5831 of the following conditions are true:
5832 - the insn that sets the giv is always executed on any iteration
5833 on which the giv is used at all
5834 (there are two ways to deduce this:
5835 either the insn is executed on every iteration,
5836 or all uses follow that insn in the same basic block),
5837 - its final value can be calculated (this condition is different
5838 than the one above in record_giv)
5839 - it's not used before the it's set
5840 - no assignments to the biv occur during the giv's lifetime. */
5843 /* This is only called now when replaceable is known to be false. */
5844 /* Clear replaceable, so that it won't confuse final_giv_value. */
5848 if ((final_value = final_giv_value (loop, v))
5849 && (v->always_computable || last_use_this_basic_block (v->dest_reg, v->insn)))
5851 int biv_increment_seen = 0, before_giv_insn = 0;
5857 /* When trying to determine whether or not a biv increment occurs
5858 during the lifetime of the giv, we can ignore uses of the variable
5859 outside the loop because final_value is true. Hence we can not
5860 use regno_last_uid and regno_first_uid as above in record_giv. */
5862 /* Search the loop to determine whether any assignments to the
5863 biv occur during the giv's lifetime. Start with the insn
5864 that sets the giv, and search around the loop until we come
5865 back to that insn again.
5867 Also fail if there is a jump within the giv's lifetime that jumps
5868 to somewhere outside the lifetime but still within the loop. This
5869 catches spaghetti code where the execution order is not linear, and
5870 hence the above test fails. Here we assume that the giv lifetime
5871 does not extend from one iteration of the loop to the next, so as
5872 to make the test easier. Since the lifetime isn't known yet,
5873 this requires two loops. See also record_giv above. */
5875 last_giv_use = v->insn;
5882 before_giv_insn = 1;
5883 p = NEXT_INSN (loop->start);
5888 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
5889 || GET_CODE (p) == CALL_INSN)
5891 /* It is possible for the BIV increment to use the GIV if we
5892 have a cycle. Thus we must be sure to check each insn for
5893 both BIV and GIV uses, and we must check for BIV uses
5896 if (! biv_increment_seen
5897 && reg_set_p (v->src_reg, PATTERN (p)))
5898 biv_increment_seen = 1;
5900 if (reg_mentioned_p (v->dest_reg, PATTERN (p)))
5902 if (biv_increment_seen || before_giv_insn)
5905 v->not_replaceable = 1;
5913 /* Now that the lifetime of the giv is known, check for branches
5914 from within the lifetime to outside the lifetime if it is still
5924 p = NEXT_INSN (loop->start);
5925 if (p == last_giv_use)
5928 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p)
5929 && LABEL_NAME (JUMP_LABEL (p))
5930 && ((loop_insn_first_p (JUMP_LABEL (p), v->insn)
5931 && loop_insn_first_p (loop->start, JUMP_LABEL (p)))
5932 || (loop_insn_first_p (last_giv_use, JUMP_LABEL (p))
5933 && loop_insn_first_p (JUMP_LABEL (p), loop->end))))
5936 v->not_replaceable = 1;
5938 if (loop_dump_stream)
5939 fprintf (loop_dump_stream,
5940 "Found branch outside giv lifetime.\n");
5947 /* If it is replaceable, then save the final value. */
5949 v->final_value = final_value;
5952 if (loop_dump_stream && v->replaceable)
5953 fprintf (loop_dump_stream, "Insn %d: giv reg %d final_value replaceable\n",
5954 INSN_UID (v->insn), REGNO (v->dest_reg));
5957 /* Update the status of whether a giv can derive other givs.
5959 We need to do something special if there is or may be an update to the biv
5960 between the time the giv is defined and the time it is used to derive
5963 In addition, a giv that is only conditionally set is not allowed to
5964 derive another giv once a label has been passed.
5966 The cases we look at are when a label or an update to a biv is passed. */
5969 update_giv_derive (loop, p)
5970 const struct loop *loop;
5973 struct loop_ivs *ivs = LOOP_IVS (loop);
5974 struct iv_class *bl;
5975 struct induction *biv, *giv;
5979 /* Search all IV classes, then all bivs, and finally all givs.
5981 There are three cases we are concerned with. First we have the situation
5982 of a giv that is only updated conditionally. In that case, it may not
5983 derive any givs after a label is passed.
5985 The second case is when a biv update occurs, or may occur, after the
5986 definition of a giv. For certain biv updates (see below) that are
5987 known to occur between the giv definition and use, we can adjust the
5988 giv definition. For others, or when the biv update is conditional,
5989 we must prevent the giv from deriving any other givs. There are two
5990 sub-cases within this case.
5992 If this is a label, we are concerned with any biv update that is done
5993 conditionally, since it may be done after the giv is defined followed by
5994 a branch here (actually, we need to pass both a jump and a label, but
5995 this extra tracking doesn't seem worth it).
5997 If this is a jump, we are concerned about any biv update that may be
5998 executed multiple times. We are actually only concerned about
5999 backward jumps, but it is probably not worth performing the test
6000 on the jump again here.
6002 If this is a biv update, we must adjust the giv status to show that a
6003 subsequent biv update was performed. If this adjustment cannot be done,
6004 the giv cannot derive further givs. */
6006 for (bl = ivs->list; bl; bl = bl->next)
6007 for (biv = bl->biv; biv; biv = biv->next_iv)
6008 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN
6011 for (giv = bl->giv; giv; giv = giv->next_iv)
6013 /* If cant_derive is already true, there is no point in
6014 checking all of these conditions again. */
6015 if (giv->cant_derive)
6018 /* If this giv is conditionally set and we have passed a label,
6019 it cannot derive anything. */
6020 if (GET_CODE (p) == CODE_LABEL && ! giv->always_computable)
6021 giv->cant_derive = 1;
6023 /* Skip givs that have mult_val == 0, since
6024 they are really invariants. Also skip those that are
6025 replaceable, since we know their lifetime doesn't contain
6027 else if (giv->mult_val == const0_rtx || giv->replaceable)
6030 /* The only way we can allow this giv to derive another
6031 is if this is a biv increment and we can form the product
6032 of biv->add_val and giv->mult_val. In this case, we will
6033 be able to compute a compensation. */
6034 else if (biv->insn == p)
6039 if (biv->mult_val == const1_rtx)
6040 tem = simplify_giv_expr (loop,
6041 gen_rtx_MULT (giv->mode,
6044 &ext_val_dummy, &dummy);
6046 if (tem && giv->derive_adjustment)
6047 tem = simplify_giv_expr
6049 gen_rtx_PLUS (giv->mode, tem, giv->derive_adjustment),
6050 &ext_val_dummy, &dummy);
6053 giv->derive_adjustment = tem;
6055 giv->cant_derive = 1;
6057 else if ((GET_CODE (p) == CODE_LABEL && ! biv->always_computable)
6058 || (GET_CODE (p) == JUMP_INSN && biv->maybe_multiple))
6059 giv->cant_derive = 1;
6064 /* Check whether an insn is an increment legitimate for a basic induction var.
6065 X is the source of insn P, or a part of it.
6066 MODE is the mode in which X should be interpreted.
6068 DEST_REG is the putative biv, also the destination of the insn.
6069 We accept patterns of these forms:
6070 REG = REG + INVARIANT (includes REG = REG - CONSTANT)
6071 REG = INVARIANT + REG
6073 If X is suitable, we return 1, set *MULT_VAL to CONST1_RTX,
6074 store the additive term into *INC_VAL, and store the place where
6075 we found the additive term into *LOCATION.
6077 If X is an assignment of an invariant into DEST_REG, we set
6078 *MULT_VAL to CONST0_RTX, and store the invariant into *INC_VAL.
6080 We also want to detect a BIV when it corresponds to a variable
6081 whose mode was promoted via PROMOTED_MODE. In that case, an increment
6082 of the variable may be a PLUS that adds a SUBREG of that variable to
6083 an invariant and then sign- or zero-extends the result of the PLUS
6086 Most GIVs in such cases will be in the promoted mode, since that is the
6087 probably the natural computation mode (and almost certainly the mode
6088 used for addresses) on the machine. So we view the pseudo-reg containing
6089 the variable as the BIV, as if it were simply incremented.
6091 Note that treating the entire pseudo as a BIV will result in making
6092 simple increments to any GIVs based on it. However, if the variable
6093 overflows in its declared mode but not its promoted mode, the result will
6094 be incorrect. This is acceptable if the variable is signed, since
6095 overflows in such cases are undefined, but not if it is unsigned, since
6096 those overflows are defined. So we only check for SIGN_EXTEND and
6099 If we cannot find a biv, we return 0. */
6102 basic_induction_var (loop, x, mode, dest_reg, p, inc_val, mult_val, location)
6103 const struct loop *loop;
6105 enum machine_mode mode;
6116 code = GET_CODE (x);
6121 if (rtx_equal_p (XEXP (x, 0), dest_reg)
6122 || (GET_CODE (XEXP (x, 0)) == SUBREG
6123 && SUBREG_PROMOTED_VAR_P (XEXP (x, 0))
6124 && SUBREG_REG (XEXP (x, 0)) == dest_reg))
6126 argp = &XEXP (x, 1);
6128 else if (rtx_equal_p (XEXP (x, 1), dest_reg)
6129 || (GET_CODE (XEXP (x, 1)) == SUBREG
6130 && SUBREG_PROMOTED_VAR_P (XEXP (x, 1))
6131 && SUBREG_REG (XEXP (x, 1)) == dest_reg))
6133 argp = &XEXP (x, 0);
6139 if (loop_invariant_p (loop, arg) != 1)
6142 *inc_val = convert_modes (GET_MODE (dest_reg), GET_MODE (x), arg, 0);
6143 *mult_val = const1_rtx;
6148 /* If what's inside the SUBREG is a BIV, then the SUBREG. This will
6149 handle addition of promoted variables.
6150 ??? The comment at the start of this function is wrong: promoted
6151 variable increments don't look like it says they do. */
6152 return basic_induction_var (loop, SUBREG_REG (x),
6153 GET_MODE (SUBREG_REG (x)),
6154 dest_reg, p, inc_val, mult_val, location);
6157 /* If this register is assigned in a previous insn, look at its
6158 source, but don't go outside the loop or past a label. */
6160 /* If this sets a register to itself, we would repeat any previous
6161 biv increment if we applied this strategy blindly. */
6162 if (rtx_equal_p (dest_reg, x))
6171 insn = PREV_INSN (insn);
6173 while (insn && GET_CODE (insn) == NOTE
6174 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG);
6178 set = single_set (insn);
6181 dest = SET_DEST (set);
6183 || (GET_CODE (dest) == SUBREG
6184 && (GET_MODE_SIZE (GET_MODE (dest)) <= UNITS_PER_WORD)
6185 && (GET_MODE_CLASS (GET_MODE (dest)) == MODE_INT)
6186 && SUBREG_REG (dest) == x))
6187 return basic_induction_var (loop, SET_SRC (set),
6188 (GET_MODE (SET_SRC (set)) == VOIDmode
6190 : GET_MODE (SET_SRC (set))),
6192 inc_val, mult_val, location);
6194 while (GET_CODE (dest) == SIGN_EXTRACT
6195 || GET_CODE (dest) == ZERO_EXTRACT
6196 || GET_CODE (dest) == SUBREG
6197 || GET_CODE (dest) == STRICT_LOW_PART)
6198 dest = XEXP (dest, 0);
6204 /* Can accept constant setting of biv only when inside inner most loop.
6205 Otherwise, a biv of an inner loop may be incorrectly recognized
6206 as a biv of the outer loop,
6207 causing code to be moved INTO the inner loop. */
6209 if (loop_invariant_p (loop, x) != 1)
6214 /* convert_modes aborts if we try to convert to or from CCmode, so just
6215 exclude that case. It is very unlikely that a condition code value
6216 would be a useful iterator anyways. convert_modes aborts if we try to
6217 convert a float mode to non-float or vice versa too. */
6218 if (loop->level == 1
6219 && GET_MODE_CLASS (mode) == GET_MODE_CLASS (GET_MODE (dest_reg))
6220 && GET_MODE_CLASS (mode) != MODE_CC)
6222 /* Possible bug here? Perhaps we don't know the mode of X. */
6223 *inc_val = convert_modes (GET_MODE (dest_reg), mode, x, 0);
6224 *mult_val = const0_rtx;
6231 return basic_induction_var (loop, XEXP (x, 0), GET_MODE (XEXP (x, 0)),
6232 dest_reg, p, inc_val, mult_val, location);
6235 /* Similar, since this can be a sign extension. */
6236 for (insn = PREV_INSN (p);
6237 (insn && GET_CODE (insn) == NOTE
6238 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG);
6239 insn = PREV_INSN (insn))
6243 set = single_set (insn);
6245 if (! rtx_equal_p (dest_reg, XEXP (x, 0))
6246 && set && SET_DEST (set) == XEXP (x, 0)
6247 && GET_CODE (XEXP (x, 1)) == CONST_INT
6248 && INTVAL (XEXP (x, 1)) >= 0
6249 && GET_CODE (SET_SRC (set)) == ASHIFT
6250 && XEXP (x, 1) == XEXP (SET_SRC (set), 1))
6251 return basic_induction_var (loop, XEXP (SET_SRC (set), 0),
6252 GET_MODE (XEXP (x, 0)),
6253 dest_reg, insn, inc_val, mult_val,
6262 /* A general induction variable (giv) is any quantity that is a linear
6263 function of a basic induction variable,
6264 i.e. giv = biv * mult_val + add_val.
6265 The coefficients can be any loop invariant quantity.
6266 A giv need not be computed directly from the biv;
6267 it can be computed by way of other givs. */
6269 /* Determine whether X computes a giv.
6270 If it does, return a nonzero value
6271 which is the benefit from eliminating the computation of X;
6272 set *SRC_REG to the register of the biv that it is computed from;
6273 set *ADD_VAL and *MULT_VAL to the coefficients,
6274 such that the value of X is biv * mult + add; */
6277 general_induction_var (loop, x, src_reg, add_val, mult_val, ext_val,
6278 is_addr, pbenefit, addr_mode)
6279 const struct loop *loop;
6287 enum machine_mode addr_mode;
6289 struct loop_ivs *ivs = LOOP_IVS (loop);
6292 /* If this is an invariant, forget it, it isn't a giv. */
6293 if (loop_invariant_p (loop, x) == 1)
6297 *ext_val = NULL_RTX;
6298 x = simplify_giv_expr (loop, x, ext_val, pbenefit);
6302 switch (GET_CODE (x))
6306 /* Since this is now an invariant and wasn't before, it must be a giv
6307 with MULT_VAL == 0. It doesn't matter which BIV we associate this
6309 *src_reg = ivs->list->biv->dest_reg;
6310 *mult_val = const0_rtx;
6315 /* This is equivalent to a BIV. */
6317 *mult_val = const1_rtx;
6318 *add_val = const0_rtx;
6322 /* Either (plus (biv) (invar)) or
6323 (plus (mult (biv) (invar_1)) (invar_2)). */
6324 if (GET_CODE (XEXP (x, 0)) == MULT)
6326 *src_reg = XEXP (XEXP (x, 0), 0);
6327 *mult_val = XEXP (XEXP (x, 0), 1);
6331 *src_reg = XEXP (x, 0);
6332 *mult_val = const1_rtx;
6334 *add_val = XEXP (x, 1);
6338 /* ADD_VAL is zero. */
6339 *src_reg = XEXP (x, 0);
6340 *mult_val = XEXP (x, 1);
6341 *add_val = const0_rtx;
6348 /* Remove any enclosing USE from ADD_VAL and MULT_VAL (there will be
6349 unless they are CONST_INT). */
6350 if (GET_CODE (*add_val) == USE)
6351 *add_val = XEXP (*add_val, 0);
6352 if (GET_CODE (*mult_val) == USE)
6353 *mult_val = XEXP (*mult_val, 0);
6356 *pbenefit += address_cost (orig_x, addr_mode) - reg_address_cost;
6358 *pbenefit += rtx_cost (orig_x, SET);
6360 /* Always return true if this is a giv so it will be detected as such,
6361 even if the benefit is zero or negative. This allows elimination
6362 of bivs that might otherwise not be eliminated. */
6366 /* Given an expression, X, try to form it as a linear function of a biv.
6367 We will canonicalize it to be of the form
6368 (plus (mult (BIV) (invar_1))
6370 with possible degeneracies.
6372 The invariant expressions must each be of a form that can be used as a
6373 machine operand. We surround then with a USE rtx (a hack, but localized
6374 and certainly unambiguous!) if not a CONST_INT for simplicity in this
6375 routine; it is the caller's responsibility to strip them.
6377 If no such canonicalization is possible (i.e., two biv's are used or an
6378 expression that is neither invariant nor a biv or giv), this routine
6381 For a non-zero return, the result will have a code of CONST_INT, USE,
6382 REG (for a BIV), PLUS, or MULT. No other codes will occur.
6384 *BENEFIT will be incremented by the benefit of any sub-giv encountered. */
6386 static rtx sge_plus PARAMS ((enum machine_mode, rtx, rtx));
6387 static rtx sge_plus_constant PARAMS ((rtx, rtx));
6390 simplify_giv_expr (loop, x, ext_val, benefit)
6391 const struct loop *loop;
6396 struct loop_ivs *ivs = LOOP_IVS (loop);
6397 struct loop_regs *regs = LOOP_REGS (loop);
6398 enum machine_mode mode = GET_MODE (x);
6402 /* If this is not an integer mode, or if we cannot do arithmetic in this
6403 mode, this can't be a giv. */
6404 if (mode != VOIDmode
6405 && (GET_MODE_CLASS (mode) != MODE_INT
6406 || GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT))
6409 switch (GET_CODE (x))
6412 arg0 = simplify_giv_expr (loop, XEXP (x, 0), ext_val, benefit);
6413 arg1 = simplify_giv_expr (loop, XEXP (x, 1), ext_val, benefit);
6414 if (arg0 == 0 || arg1 == 0)
6417 /* Put constant last, CONST_INT last if both constant. */
6418 if ((GET_CODE (arg0) == USE
6419 || GET_CODE (arg0) == CONST_INT)
6420 && ! ((GET_CODE (arg0) == USE
6421 && GET_CODE (arg1) == USE)
6422 || GET_CODE (arg1) == CONST_INT))
6423 tem = arg0, arg0 = arg1, arg1 = tem;
6425 /* Handle addition of zero, then addition of an invariant. */
6426 if (arg1 == const0_rtx)
6428 else if (GET_CODE (arg1) == CONST_INT || GET_CODE (arg1) == USE)
6429 switch (GET_CODE (arg0))
6433 /* Adding two invariants must result in an invariant, so enclose
6434 addition operation inside a USE and return it. */
6435 if (GET_CODE (arg0) == USE)
6436 arg0 = XEXP (arg0, 0);
6437 if (GET_CODE (arg1) == USE)
6438 arg1 = XEXP (arg1, 0);
6440 if (GET_CODE (arg0) == CONST_INT)
6441 tem = arg0, arg0 = arg1, arg1 = tem;
6442 if (GET_CODE (arg1) == CONST_INT)
6443 tem = sge_plus_constant (arg0, arg1);
6445 tem = sge_plus (mode, arg0, arg1);
6447 if (GET_CODE (tem) != CONST_INT)
6448 tem = gen_rtx_USE (mode, tem);
6453 /* biv + invar or mult + invar. Return sum. */
6454 return gen_rtx_PLUS (mode, arg0, arg1);
6457 /* (a + invar_1) + invar_2. Associate. */
6459 simplify_giv_expr (loop,
6471 /* Each argument must be either REG, PLUS, or MULT. Convert REG to
6472 MULT to reduce cases. */
6473 if (GET_CODE (arg0) == REG)
6474 arg0 = gen_rtx_MULT (mode, arg0, const1_rtx);
6475 if (GET_CODE (arg1) == REG)
6476 arg1 = gen_rtx_MULT (mode, arg1, const1_rtx);
6478 /* Now have PLUS + PLUS, PLUS + MULT, MULT + PLUS, or MULT + MULT.
6479 Put a MULT first, leaving PLUS + PLUS, MULT + PLUS, or MULT + MULT.
6480 Recurse to associate the second PLUS. */
6481 if (GET_CODE (arg1) == MULT)
6482 tem = arg0, arg0 = arg1, arg1 = tem;
6484 if (GET_CODE (arg1) == PLUS)
6486 simplify_giv_expr (loop,
6488 gen_rtx_PLUS (mode, arg0,
6493 /* Now must have MULT + MULT. Distribute if same biv, else not giv. */
6494 if (GET_CODE (arg0) != MULT || GET_CODE (arg1) != MULT)
6497 if (!rtx_equal_p (arg0, arg1))
6500 return simplify_giv_expr (loop,
6509 /* Handle "a - b" as "a + b * (-1)". */
6510 return simplify_giv_expr (loop,
6519 arg0 = simplify_giv_expr (loop, XEXP (x, 0), ext_val, benefit);
6520 arg1 = simplify_giv_expr (loop, XEXP (x, 1), ext_val, benefit);
6521 if (arg0 == 0 || arg1 == 0)
6524 /* Put constant last, CONST_INT last if both constant. */
6525 if ((GET_CODE (arg0) == USE || GET_CODE (arg0) == CONST_INT)
6526 && GET_CODE (arg1) != CONST_INT)
6527 tem = arg0, arg0 = arg1, arg1 = tem;
6529 /* If second argument is not now constant, not giv. */
6530 if (GET_CODE (arg1) != USE && GET_CODE (arg1) != CONST_INT)
6533 /* Handle multiply by 0 or 1. */
6534 if (arg1 == const0_rtx)
6537 else if (arg1 == const1_rtx)
6540 switch (GET_CODE (arg0))
6543 /* biv * invar. Done. */
6544 return gen_rtx_MULT (mode, arg0, arg1);
6547 /* Product of two constants. */
6548 return GEN_INT (INTVAL (arg0) * INTVAL (arg1));
6551 /* invar * invar is a giv, but attempt to simplify it somehow. */
6552 if (GET_CODE (arg1) != CONST_INT)
6555 arg0 = XEXP (arg0, 0);
6556 if (GET_CODE (arg0) == MULT)
6558 /* (invar_0 * invar_1) * invar_2. Associate. */
6559 return simplify_giv_expr (loop,
6568 /* Porpagate the MULT expressions to the intermost nodes. */
6569 else if (GET_CODE (arg0) == PLUS)
6571 /* (invar_0 + invar_1) * invar_2. Distribute. */
6572 return simplify_giv_expr (loop,
6584 return gen_rtx_USE (mode, gen_rtx_MULT (mode, arg0, arg1));
6587 /* (a * invar_1) * invar_2. Associate. */
6588 return simplify_giv_expr (loop,
6597 /* (a + invar_1) * invar_2. Distribute. */
6598 return simplify_giv_expr (loop,
6613 /* Shift by constant is multiply by power of two. */
6614 if (GET_CODE (XEXP (x, 1)) != CONST_INT)
6618 simplify_giv_expr (loop,
6621 GEN_INT ((HOST_WIDE_INT) 1
6622 << INTVAL (XEXP (x, 1)))),
6626 /* "-a" is "a * (-1)" */
6627 return simplify_giv_expr (loop,
6628 gen_rtx_MULT (mode, XEXP (x, 0), constm1_rtx),
6632 /* "~a" is "-a - 1". Silly, but easy. */
6633 return simplify_giv_expr (loop,
6634 gen_rtx_MINUS (mode,
6635 gen_rtx_NEG (mode, XEXP (x, 0)),
6640 /* Already in proper form for invariant. */
6646 /* Conditionally recognize extensions of simple IVs. After we've
6647 computed loop traversal counts and verified the range of the
6648 source IV, we'll reevaluate this as a GIV. */
6649 if (*ext_val == NULL_RTX)
6651 arg0 = simplify_giv_expr (loop, XEXP (x, 0), ext_val, benefit);
6652 if (arg0 && *ext_val == NULL_RTX && GET_CODE (arg0) == REG)
6654 *ext_val = gen_rtx_fmt_e (GET_CODE (x), mode, arg0);
6661 /* If this is a new register, we can't deal with it. */
6662 if (REGNO (x) >= max_reg_before_loop)
6665 /* Check for biv or giv. */
6666 switch (REG_IV_TYPE (ivs, REGNO (x)))
6670 case GENERAL_INDUCT:
6672 struct induction *v = REG_IV_INFO (ivs, REGNO (x));
6674 /* Form expression from giv and add benefit. Ensure this giv
6675 can derive another and subtract any needed adjustment if so. */
6677 /* Increasing the benefit here is risky. The only case in which it
6678 is arguably correct is if this is the only use of V. In other
6679 cases, this will artificially inflate the benefit of the current
6680 giv, and lead to suboptimal code. Thus, it is disabled, since
6681 potentially not reducing an only marginally beneficial giv is
6682 less harmful than reducing many givs that are not really
6685 rtx single_use = regs->array[REGNO (x)].single_usage;
6686 if (single_use && single_use != const0_rtx)
6687 *benefit += v->benefit;
6693 tem = gen_rtx_PLUS (mode, gen_rtx_MULT (mode,
6694 v->src_reg, v->mult_val),
6697 if (v->derive_adjustment)
6698 tem = gen_rtx_MINUS (mode, tem, v->derive_adjustment);
6699 arg0 = simplify_giv_expr (loop, tem, ext_val, benefit);
6702 if (!v->ext_dependent)
6707 *ext_val = v->ext_dependent;
6715 /* If it isn't an induction variable, and it is invariant, we
6716 may be able to simplify things further by looking through
6717 the bits we just moved outside the loop. */
6718 if (loop_invariant_p (loop, x) == 1)
6721 struct loop_movables *movables = LOOP_MOVABLES (loop);
6723 for (m = movables->head; m; m = m->next)
6724 if (rtx_equal_p (x, m->set_dest))
6726 /* Ok, we found a match. Substitute and simplify. */
6728 /* If we match another movable, we must use that, as
6729 this one is going away. */
6731 return simplify_giv_expr (loop, m->match->set_dest,
6734 /* If consec is non-zero, this is a member of a group of
6735 instructions that were moved together. We handle this
6736 case only to the point of seeking to the last insn and
6737 looking for a REG_EQUAL. Fail if we don't find one. */
6744 tem = NEXT_INSN (tem);
6748 tem = find_reg_note (tem, REG_EQUAL, NULL_RTX);
6750 tem = XEXP (tem, 0);
6754 tem = single_set (m->insn);
6756 tem = SET_SRC (tem);
6761 /* What we are most interested in is pointer
6762 arithmetic on invariants -- only take
6763 patterns we may be able to do something with. */
6764 if (GET_CODE (tem) == PLUS
6765 || GET_CODE (tem) == MULT
6766 || GET_CODE (tem) == ASHIFT
6767 || GET_CODE (tem) == CONST_INT
6768 || GET_CODE (tem) == SYMBOL_REF)
6770 tem = simplify_giv_expr (loop, tem, ext_val,
6775 else if (GET_CODE (tem) == CONST
6776 && GET_CODE (XEXP (tem, 0)) == PLUS
6777 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == SYMBOL_REF
6778 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)
6780 tem = simplify_giv_expr (loop, XEXP (tem, 0),
6792 /* Fall through to general case. */
6794 /* If invariant, return as USE (unless CONST_INT).
6795 Otherwise, not giv. */
6796 if (GET_CODE (x) == USE)
6799 if (loop_invariant_p (loop, x) == 1)
6801 if (GET_CODE (x) == CONST_INT)
6803 if (GET_CODE (x) == CONST
6804 && GET_CODE (XEXP (x, 0)) == PLUS
6805 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
6806 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
6808 return gen_rtx_USE (mode, x);
6815 /* This routine folds invariants such that there is only ever one
6816 CONST_INT in the summation. It is only used by simplify_giv_expr. */
6819 sge_plus_constant (x, c)
6822 if (GET_CODE (x) == CONST_INT)
6823 return GEN_INT (INTVAL (x) + INTVAL (c));
6824 else if (GET_CODE (x) != PLUS)
6825 return gen_rtx_PLUS (GET_MODE (x), x, c);
6826 else if (GET_CODE (XEXP (x, 1)) == CONST_INT)
6828 return gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0),
6829 GEN_INT (INTVAL (XEXP (x, 1)) + INTVAL (c)));
6831 else if (GET_CODE (XEXP (x, 0)) == PLUS
6832 || GET_CODE (XEXP (x, 1)) != PLUS)
6834 return gen_rtx_PLUS (GET_MODE (x),
6835 sge_plus_constant (XEXP (x, 0), c), XEXP (x, 1));
6839 return gen_rtx_PLUS (GET_MODE (x),
6840 sge_plus_constant (XEXP (x, 1), c), XEXP (x, 0));
6845 sge_plus (mode, x, y)
6846 enum machine_mode mode;
6849 while (GET_CODE (y) == PLUS)
6851 rtx a = XEXP (y, 0);
6852 if (GET_CODE (a) == CONST_INT)
6853 x = sge_plus_constant (x, a);
6855 x = gen_rtx_PLUS (mode, x, a);
6858 if (GET_CODE (y) == CONST_INT)
6859 x = sge_plus_constant (x, y);
6861 x = gen_rtx_PLUS (mode, x, y);
6865 /* Help detect a giv that is calculated by several consecutive insns;
6869 The caller has already identified the first insn P as having a giv as dest;
6870 we check that all other insns that set the same register follow
6871 immediately after P, that they alter nothing else,
6872 and that the result of the last is still a giv.
6874 The value is 0 if the reg set in P is not really a giv.
6875 Otherwise, the value is the amount gained by eliminating
6876 all the consecutive insns that compute the value.
6878 FIRST_BENEFIT is the amount gained by eliminating the first insn, P.
6879 SRC_REG is the reg of the biv; DEST_REG is the reg of the giv.
6881 The coefficients of the ultimate giv value are stored in
6882 *MULT_VAL and *ADD_VAL. */
6885 consec_sets_giv (loop, first_benefit, p, src_reg, dest_reg,
6886 add_val, mult_val, ext_val, last_consec_insn)
6887 const struct loop *loop;
6895 rtx *last_consec_insn;
6897 struct loop_ivs *ivs = LOOP_IVS (loop);
6898 struct loop_regs *regs = LOOP_REGS (loop);
6905 /* Indicate that this is a giv so that we can update the value produced in
6906 each insn of the multi-insn sequence.
6908 This induction structure will be used only by the call to
6909 general_induction_var below, so we can allocate it on our stack.
6910 If this is a giv, our caller will replace the induct var entry with
6911 a new induction structure. */
6912 struct induction *v;
6914 if (REG_IV_TYPE (ivs, REGNO (dest_reg)) != UNKNOWN_INDUCT)
6917 v = (struct induction *) alloca (sizeof (struct induction));
6918 v->src_reg = src_reg;
6919 v->mult_val = *mult_val;
6920 v->add_val = *add_val;
6921 v->benefit = first_benefit;
6923 v->derive_adjustment = 0;
6924 v->ext_dependent = NULL_RTX;
6926 REG_IV_TYPE (ivs, REGNO (dest_reg)) = GENERAL_INDUCT;
6927 REG_IV_INFO (ivs, REGNO (dest_reg)) = v;
6929 count = regs->array[REGNO (dest_reg)].n_times_set - 1;
6934 code = GET_CODE (p);
6936 /* If libcall, skip to end of call sequence. */
6937 if (code == INSN && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
6941 && (set = single_set (p))
6942 && GET_CODE (SET_DEST (set)) == REG
6943 && SET_DEST (set) == dest_reg
6944 && (general_induction_var (loop, SET_SRC (set), &src_reg,
6945 add_val, mult_val, ext_val, 0,
6947 /* Giv created by equivalent expression. */
6948 || ((temp = find_reg_note (p, REG_EQUAL, NULL_RTX))
6949 && general_induction_var (loop, XEXP (temp, 0), &src_reg,
6950 add_val, mult_val, ext_val, 0,
6951 &benefit, VOIDmode)))
6952 && src_reg == v->src_reg)
6954 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
6955 benefit += libcall_benefit (p);
6958 v->mult_val = *mult_val;
6959 v->add_val = *add_val;
6960 v->benefit += benefit;
6962 else if (code != NOTE)
6964 /* Allow insns that set something other than this giv to a
6965 constant. Such insns are needed on machines which cannot
6966 include long constants and should not disqualify a giv. */
6968 && (set = single_set (p))
6969 && SET_DEST (set) != dest_reg
6970 && CONSTANT_P (SET_SRC (set)))
6973 REG_IV_TYPE (ivs, REGNO (dest_reg)) = UNKNOWN_INDUCT;
6978 REG_IV_TYPE (ivs, REGNO (dest_reg)) = UNKNOWN_INDUCT;
6979 *last_consec_insn = p;
6983 /* Return an rtx, if any, that expresses giv G2 as a function of the register
6984 represented by G1. If no such expression can be found, or it is clear that
6985 it cannot possibly be a valid address, 0 is returned.
6987 To perform the computation, we note that
6990 where `v' is the biv.
6992 So G2 = (y/b) * G1 + (b - a*y/x).
6994 Note that MULT = y/x.
6996 Update: A and B are now allowed to be additive expressions such that
6997 B contains all variables in A. That is, computing B-A will not require
6998 subtracting variables. */
7001 express_from_1 (a, b, mult)
7004 /* If MULT is zero, then A*MULT is zero, and our expression is B. */
7006 if (mult == const0_rtx)
7009 /* If MULT is not 1, we cannot handle A with non-constants, since we
7010 would then be required to subtract multiples of the registers in A.
7011 This is theoretically possible, and may even apply to some Fortran
7012 constructs, but it is a lot of work and we do not attempt it here. */
7014 if (mult != const1_rtx && GET_CODE (a) != CONST_INT)
7017 /* In general these structures are sorted top to bottom (down the PLUS
7018 chain), but not left to right across the PLUS. If B is a higher
7019 order giv than A, we can strip one level and recurse. If A is higher
7020 order, we'll eventually bail out, but won't know that until the end.
7021 If they are the same, we'll strip one level around this loop. */
7023 while (GET_CODE (a) == PLUS && GET_CODE (b) == PLUS)
7025 rtx ra, rb, oa, ob, tmp;
7027 ra = XEXP (a, 0), oa = XEXP (a, 1);
7028 if (GET_CODE (ra) == PLUS)
7029 tmp = ra, ra = oa, oa = tmp;
7031 rb = XEXP (b, 0), ob = XEXP (b, 1);
7032 if (GET_CODE (rb) == PLUS)
7033 tmp = rb, rb = ob, ob = tmp;
7035 if (rtx_equal_p (ra, rb))
7036 /* We matched: remove one reg completely. */
7038 else if (GET_CODE (ob) != PLUS && rtx_equal_p (ra, ob))
7039 /* An alternate match. */
7041 else if (GET_CODE (oa) != PLUS && rtx_equal_p (oa, rb))
7042 /* An alternate match. */
7046 /* Indicates an extra register in B. Strip one level from B and
7047 recurse, hoping B was the higher order expression. */
7048 ob = express_from_1 (a, ob, mult);
7051 return gen_rtx_PLUS (GET_MODE (b), rb, ob);
7055 /* Here we are at the last level of A, go through the cases hoping to
7056 get rid of everything but a constant. */
7058 if (GET_CODE (a) == PLUS)
7062 ra = XEXP (a, 0), oa = XEXP (a, 1);
7063 if (rtx_equal_p (oa, b))
7065 else if (!rtx_equal_p (ra, b))
7068 if (GET_CODE (oa) != CONST_INT)
7071 return GEN_INT (-INTVAL (oa) * INTVAL (mult));
7073 else if (GET_CODE (a) == CONST_INT)
7075 return plus_constant (b, -INTVAL (a) * INTVAL (mult));
7077 else if (CONSTANT_P (a))
7079 enum machine_mode mode_a = GET_MODE (a);
7080 enum machine_mode mode_b = GET_MODE (b);
7081 enum machine_mode mode = mode_b == VOIDmode ? mode_a : mode_b;
7082 return simplify_gen_binary (MINUS, mode, b, a);
7084 else if (GET_CODE (b) == PLUS)
7086 if (rtx_equal_p (a, XEXP (b, 0)))
7088 else if (rtx_equal_p (a, XEXP (b, 1)))
7093 else if (rtx_equal_p (a, b))
7100 express_from (g1, g2)
7101 struct induction *g1, *g2;
7105 /* The value that G1 will be multiplied by must be a constant integer. Also,
7106 the only chance we have of getting a valid address is if b*c/a (see above
7107 for notation) is also an integer. */
7108 if (GET_CODE (g1->mult_val) == CONST_INT
7109 && GET_CODE (g2->mult_val) == CONST_INT)
7111 if (g1->mult_val == const0_rtx
7112 || INTVAL (g2->mult_val) % INTVAL (g1->mult_val) != 0)
7114 mult = GEN_INT (INTVAL (g2->mult_val) / INTVAL (g1->mult_val));
7116 else if (rtx_equal_p (g1->mult_val, g2->mult_val))
7120 /* ??? Find out if the one is a multiple of the other? */
7124 add = express_from_1 (g1->add_val, g2->add_val, mult);
7125 if (add == NULL_RTX)
7127 /* Failed. If we've got a multiplication factor between G1 and G2,
7128 scale G1's addend and try again. */
7129 if (INTVAL (mult) > 1)
7131 rtx g1_add_val = g1->add_val;
7132 if (GET_CODE (g1_add_val) == MULT
7133 && GET_CODE (XEXP (g1_add_val, 1)) == CONST_INT)
7136 m = INTVAL (mult) * INTVAL (XEXP (g1_add_val, 1));
7137 g1_add_val = gen_rtx_MULT (GET_MODE (g1_add_val),
7138 XEXP (g1_add_val, 0), GEN_INT (m));
7142 g1_add_val = gen_rtx_MULT (GET_MODE (g1_add_val), g1_add_val,
7146 add = express_from_1 (g1_add_val, g2->add_val, const1_rtx);
7149 if (add == NULL_RTX)
7152 /* Form simplified final result. */
7153 if (mult == const0_rtx)
7155 else if (mult == const1_rtx)
7156 mult = g1->dest_reg;
7158 mult = gen_rtx_MULT (g2->mode, g1->dest_reg, mult);
7160 if (add == const0_rtx)
7164 if (GET_CODE (add) == PLUS
7165 && CONSTANT_P (XEXP (add, 1)))
7167 rtx tem = XEXP (add, 1);
7168 mult = gen_rtx_PLUS (g2->mode, mult, XEXP (add, 0));
7172 return gen_rtx_PLUS (g2->mode, mult, add);
7176 /* Return an rtx, if any, that expresses giv G2 as a function of the register
7177 represented by G1. This indicates that G2 should be combined with G1 and
7178 that G2 can use (either directly or via an address expression) a register
7179 used to represent G1. */
7182 combine_givs_p (g1, g2)
7183 struct induction *g1, *g2;
7187 /* With the introduction of ext dependent givs, we must care for modes.
7188 G2 must not use a wider mode than G1. */
7189 if (GET_MODE_SIZE (g1->mode) < GET_MODE_SIZE (g2->mode))
7192 ret = comb = express_from (g1, g2);
7193 if (comb == NULL_RTX)
7195 if (g1->mode != g2->mode)
7196 ret = gen_lowpart (g2->mode, comb);
7198 /* If these givs are identical, they can be combined. We use the results
7199 of express_from because the addends are not in a canonical form, so
7200 rtx_equal_p is a weaker test. */
7201 /* But don't combine a DEST_REG giv with a DEST_ADDR giv; we want the
7202 combination to be the other way round. */
7203 if (comb == g1->dest_reg
7204 && (g1->giv_type == DEST_REG || g2->giv_type == DEST_ADDR))
7209 /* If G2 can be expressed as a function of G1 and that function is valid
7210 as an address and no more expensive than using a register for G2,
7211 the expression of G2 in terms of G1 can be used. */
7213 && g2->giv_type == DEST_ADDR
7214 && memory_address_p (GET_MODE (g2->mem), ret)
7215 /* ??? Looses, especially with -fforce-addr, where *g2->location
7216 will always be a register, and so anything more complicated
7220 && ADDRESS_COST (tem) <= ADDRESS_COST (*g2->location)
7222 && rtx_cost (tem, MEM) <= rtx_cost (*g2->location, MEM)
7233 /* Check each extension dependent giv in this class to see if its
7234 root biv is safe from wrapping in the interior mode, which would
7235 make the giv illegal. */
7238 check_ext_dependent_givs (bl, loop_info)
7239 struct iv_class *bl;
7240 struct loop_info *loop_info;
7242 int ze_ok = 0, se_ok = 0, info_ok = 0;
7243 enum machine_mode biv_mode = GET_MODE (bl->biv->src_reg);
7244 HOST_WIDE_INT start_val;
7245 unsigned HOST_WIDE_INT u_end_val = 0;
7246 unsigned HOST_WIDE_INT u_start_val = 0;
7248 struct induction *v;
7250 /* Make sure the iteration data is available. We must have
7251 constants in order to be certain of no overflow. */
7252 /* ??? An unknown iteration count with an increment of +-1
7253 combined with friendly exit tests of against an invariant
7254 value is also ameanable to optimization. Not implemented. */
7255 if (loop_info->n_iterations > 0
7256 && bl->initial_value
7257 && GET_CODE (bl->initial_value) == CONST_INT
7258 && (incr = biv_total_increment (bl))
7259 && GET_CODE (incr) == CONST_INT
7260 /* Make sure the host can represent the arithmetic. */
7261 && HOST_BITS_PER_WIDE_INT >= GET_MODE_BITSIZE (biv_mode))
7263 unsigned HOST_WIDE_INT abs_incr, total_incr;
7264 HOST_WIDE_INT s_end_val;
7268 start_val = INTVAL (bl->initial_value);
7269 u_start_val = start_val;
7271 neg_incr = 0, abs_incr = INTVAL (incr);
7272 if (INTVAL (incr) < 0)
7273 neg_incr = 1, abs_incr = -abs_incr;
7274 total_incr = abs_incr * loop_info->n_iterations;
7276 /* Check for host arithmatic overflow. */
7277 if (total_incr / loop_info->n_iterations == abs_incr)
7279 unsigned HOST_WIDE_INT u_max;
7280 HOST_WIDE_INT s_max;
7282 u_end_val = start_val + (neg_incr ? -total_incr : total_incr);
7283 s_end_val = u_end_val;
7284 u_max = GET_MODE_MASK (biv_mode);
7287 /* Check zero extension of biv ok. */
7289 /* Check for host arithmatic overflow. */
7291 ? u_end_val < u_start_val
7292 : u_end_val > u_start_val)
7293 /* Check for target arithmetic overflow. */
7295 ? 1 /* taken care of with host overflow */
7296 : u_end_val <= u_max))
7301 /* Check sign extension of biv ok. */
7302 /* ??? While it is true that overflow with signed and pointer
7303 arithmetic is undefined, I fear too many programmers don't
7304 keep this fact in mind -- myself included on occasion.
7305 So leave alone with the signed overflow optimizations. */
7306 if (start_val >= -s_max - 1
7307 /* Check for host arithmatic overflow. */
7309 ? s_end_val < start_val
7310 : s_end_val > start_val)
7311 /* Check for target arithmetic overflow. */
7313 ? s_end_val >= -s_max - 1
7314 : s_end_val <= s_max))
7321 /* Invalidate givs that fail the tests. */
7322 for (v = bl->giv; v; v = v->next_iv)
7323 if (v->ext_dependent)
7325 enum rtx_code code = GET_CODE (v->ext_dependent);
7338 /* We don't know whether this value is being used as either
7339 signed or unsigned, so to safely truncate we must satisfy
7340 both. The initial check here verifies the BIV itself;
7341 once that is successful we may check its range wrt the
7345 enum machine_mode outer_mode = GET_MODE (v->ext_dependent);
7346 unsigned HOST_WIDE_INT max = GET_MODE_MASK (outer_mode) >> 1;
7348 /* We know from the above that both endpoints are nonnegative,
7349 and that there is no wrapping. Verify that both endpoints
7350 are within the (signed) range of the outer mode. */
7351 if (u_start_val <= max && u_end_val <= max)
7362 if (loop_dump_stream)
7364 fprintf (loop_dump_stream,
7365 "Verified ext dependent giv at %d of reg %d\n",
7366 INSN_UID (v->insn), bl->regno);
7371 if (loop_dump_stream)
7376 why = "biv iteration values overflowed";
7380 incr = biv_total_increment (bl);
7381 if (incr == const1_rtx)
7382 why = "biv iteration info incomplete; incr by 1";
7384 why = "biv iteration info incomplete";
7387 fprintf (loop_dump_stream,
7388 "Failed ext dependent giv at %d, %s\n",
7389 INSN_UID (v->insn), why);
7392 bl->all_reduced = 0;
7397 /* Generate a version of VALUE in a mode appropriate for initializing V. */
7400 extend_value_for_giv (v, value)
7401 struct induction *v;
7404 rtx ext_dep = v->ext_dependent;
7409 /* Recall that check_ext_dependent_givs verified that the known bounds
7410 of a biv did not overflow or wrap with respect to the extension for
7411 the giv. Therefore, constants need no additional adjustment. */
7412 if (CONSTANT_P (value) && GET_MODE (value) == VOIDmode)
7415 /* Otherwise, we must adjust the value to compensate for the
7416 differing modes of the biv and the giv. */
7417 return gen_rtx_fmt_e (GET_CODE (ext_dep), GET_MODE (ext_dep), value);
7420 struct combine_givs_stats
7427 cmp_combine_givs_stats (xp, yp)
7431 const struct combine_givs_stats * const x =
7432 (const struct combine_givs_stats *) xp;
7433 const struct combine_givs_stats * const y =
7434 (const struct combine_givs_stats *) yp;
7436 d = y->total_benefit - x->total_benefit;
7437 /* Stabilize the sort. */
7439 d = x->giv_number - y->giv_number;
7443 /* Check all pairs of givs for iv_class BL and see if any can be combined with
7444 any other. If so, point SAME to the giv combined with and set NEW_REG to
7445 be an expression (in terms of the other giv's DEST_REG) equivalent to the
7446 giv. Also, update BENEFIT and related fields for cost/benefit analysis. */
7449 combine_givs (regs, bl)
7450 struct loop_regs *regs;
7451 struct iv_class *bl;
7453 /* Additional benefit to add for being combined multiple times. */
7454 const int extra_benefit = 3;
7456 struct induction *g1, *g2, **giv_array;
7457 int i, j, k, giv_count;
7458 struct combine_givs_stats *stats;
7461 /* Count givs, because bl->giv_count is incorrect here. */
7463 for (g1 = bl->giv; g1; g1 = g1->next_iv)
7468 = (struct induction **) alloca (giv_count * sizeof (struct induction *));
7470 for (g1 = bl->giv; g1; g1 = g1->next_iv)
7472 giv_array[i++] = g1;
7474 stats = (struct combine_givs_stats *) xcalloc (giv_count, sizeof (*stats));
7475 can_combine = (rtx *) xcalloc (giv_count, giv_count * sizeof (rtx));
7477 for (i = 0; i < giv_count; i++)
7483 stats[i].giv_number = i;
7485 /* If a DEST_REG GIV is used only once, do not allow it to combine
7486 with anything, for in doing so we will gain nothing that cannot
7487 be had by simply letting the GIV with which we would have combined
7488 to be reduced on its own. The losage shows up in particular with
7489 DEST_ADDR targets on hosts with reg+reg addressing, though it can
7490 be seen elsewhere as well. */
7491 if (g1->giv_type == DEST_REG
7492 && (single_use = regs->array[REGNO (g1->dest_reg)].single_usage)
7493 && single_use != const0_rtx)
7496 this_benefit = g1->benefit;
7497 /* Add an additional weight for zero addends. */
7498 if (g1->no_const_addval)
7501 for (j = 0; j < giv_count; j++)
7507 && (this_combine = combine_givs_p (g1, g2)) != NULL_RTX)
7509 can_combine[i * giv_count + j] = this_combine;
7510 this_benefit += g2->benefit + extra_benefit;
7513 stats[i].total_benefit = this_benefit;
7516 /* Iterate, combining until we can't. */
7518 qsort (stats, giv_count, sizeof (*stats), cmp_combine_givs_stats);
7520 if (loop_dump_stream)
7522 fprintf (loop_dump_stream, "Sorted combine statistics:\n");
7523 for (k = 0; k < giv_count; k++)
7525 g1 = giv_array[stats[k].giv_number];
7526 if (!g1->combined_with && !g1->same)
7527 fprintf (loop_dump_stream, " {%d, %d}",
7528 INSN_UID (giv_array[stats[k].giv_number]->insn),
7529 stats[k].total_benefit);
7531 putc ('\n', loop_dump_stream);
7534 for (k = 0; k < giv_count; k++)
7536 int g1_add_benefit = 0;
7538 i = stats[k].giv_number;
7541 /* If it has already been combined, skip. */
7542 if (g1->combined_with || g1->same)
7545 for (j = 0; j < giv_count; j++)
7548 if (g1 != g2 && can_combine[i * giv_count + j]
7549 /* If it has already been combined, skip. */
7550 && ! g2->same && ! g2->combined_with)
7554 g2->new_reg = can_combine[i * giv_count + j];
7556 /* For destination, we now may replace by mem expression instead
7557 of register. This changes the costs considerably, so add the
7559 if (g2->giv_type == DEST_ADDR)
7560 g2->benefit = (g2->benefit + reg_address_cost
7561 - address_cost (g2->new_reg,
7562 GET_MODE (g2->mem)));
7563 g1->combined_with++;
7564 g1->lifetime += g2->lifetime;
7566 g1_add_benefit += g2->benefit;
7568 /* ??? The new final_[bg]iv_value code does a much better job
7569 of finding replaceable giv's, and hence this code may no
7570 longer be necessary. */
7571 if (! g2->replaceable && REG_USERVAR_P (g2->dest_reg))
7572 g1_add_benefit -= copy_cost;
7574 /* To help optimize the next set of combinations, remove
7575 this giv from the benefits of other potential mates. */
7576 for (l = 0; l < giv_count; ++l)
7578 int m = stats[l].giv_number;
7579 if (can_combine[m * giv_count + j])
7580 stats[l].total_benefit -= g2->benefit + extra_benefit;
7583 if (loop_dump_stream)
7584 fprintf (loop_dump_stream,
7585 "giv at %d combined with giv at %d; new benefit %d + %d, lifetime %d\n",
7586 INSN_UID (g2->insn), INSN_UID (g1->insn),
7587 g1->benefit, g1_add_benefit, g1->lifetime);
7591 /* To help optimize the next set of combinations, remove
7592 this giv from the benefits of other potential mates. */
7593 if (g1->combined_with)
7595 for (j = 0; j < giv_count; ++j)
7597 int m = stats[j].giv_number;
7598 if (can_combine[m * giv_count + i])
7599 stats[j].total_benefit -= g1->benefit + extra_benefit;
7602 g1->benefit += g1_add_benefit;
7604 /* We've finished with this giv, and everything it touched.
7605 Restart the combination so that proper weights for the
7606 rest of the givs are properly taken into account. */
7607 /* ??? Ideally we would compact the arrays at this point, so
7608 as to not cover old ground. But sanely compacting
7609 can_combine is tricky. */
7619 /* Generate sequence for REG = B * M + A. */
7622 gen_add_mult (b, m, a, reg)
7623 rtx b; /* initial value of basic induction variable */
7624 rtx m; /* multiplicative constant */
7625 rtx a; /* additive constant */
7626 rtx reg; /* destination register */
7632 /* Use unsigned arithmetic. */
7633 result = expand_mult_add (b, reg, m, a, GET_MODE (reg), 1);
7635 emit_move_insn (reg, result);
7636 seq = gen_sequence ();
7643 /* Update registers created in insn sequence SEQ. */
7646 loop_regs_update (loop, seq)
7647 const struct loop *loop ATTRIBUTE_UNUSED;
7650 /* Update register info for alias analysis. */
7652 if (GET_CODE (seq) == SEQUENCE)
7655 for (i = 0; i < XVECLEN (seq, 0); ++i)
7657 rtx set = single_set (XVECEXP (seq, 0, i));
7658 if (set && GET_CODE (SET_DEST (set)) == REG)
7659 record_base_value (REGNO (SET_DEST (set)), SET_SRC (set), 0);
7664 if (GET_CODE (seq) == SET
7665 && GET_CODE (SET_DEST (seq)) == REG)
7666 record_base_value (REGNO (SET_DEST (seq)), SET_SRC (seq), 0);
7671 /* EMIT code before BEFORE_BB/BEFORE_INSN to set REG = B * M + A. */
7674 loop_iv_add_mult_emit_before (loop, b, m, a, reg, before_bb, before_insn)
7675 const struct loop *loop;
7676 rtx b; /* initial value of basic induction variable */
7677 rtx m; /* multiplicative constant */
7678 rtx a; /* additive constant */
7679 rtx reg; /* destination register */
7680 basic_block before_bb;
7687 loop_iv_add_mult_hoist (loop, b, m, a, reg);
7691 /* Use copy_rtx to prevent unexpected sharing of these rtx. */
7692 seq = gen_add_mult (copy_rtx (b), copy_rtx (m), copy_rtx (a), reg);
7694 /* Increase the lifetime of any invariants moved further in code. */
7695 update_reg_last_use (a, before_insn);
7696 update_reg_last_use (b, before_insn);
7697 update_reg_last_use (m, before_insn);
7699 loop_insn_emit_before (loop, before_bb, before_insn, seq);
7701 /* It is possible that the expansion created lots of new registers.
7702 Iterate over the sequence we just created and record them all. */
7703 loop_regs_update (loop, seq);
7707 /* Emit insns in loop pre-header to set REG = B * M + A. */
7710 loop_iv_add_mult_sink (loop, b, m, a, reg)
7711 const struct loop *loop;
7712 rtx b; /* initial value of basic induction variable */
7713 rtx m; /* multiplicative constant */
7714 rtx a; /* additive constant */
7715 rtx reg; /* destination register */
7719 /* Use copy_rtx to prevent unexpected sharing of these rtx. */
7720 seq = gen_add_mult (copy_rtx (b), copy_rtx (m), copy_rtx (a), reg);
7722 /* Increase the lifetime of any invariants moved further in code.
7723 ???? Is this really necessary? */
7724 update_reg_last_use (a, loop->sink);
7725 update_reg_last_use (b, loop->sink);
7726 update_reg_last_use (m, loop->sink);
7728 loop_insn_sink (loop, seq);
7730 /* It is possible that the expansion created lots of new registers.
7731 Iterate over the sequence we just created and record them all. */
7732 loop_regs_update (loop, seq);
7736 /* Emit insns after loop to set REG = B * M + A. */
7739 loop_iv_add_mult_hoist (loop, b, m, a, reg)
7740 const struct loop *loop;
7741 rtx b; /* initial value of basic induction variable */
7742 rtx m; /* multiplicative constant */
7743 rtx a; /* additive constant */
7744 rtx reg; /* destination register */
7748 /* Use copy_rtx to prevent unexpected sharing of these rtx. */
7749 seq = gen_add_mult (copy_rtx (b), copy_rtx (m), copy_rtx (a), reg);
7751 loop_insn_hoist (loop, seq);
7753 /* It is possible that the expansion created lots of new registers.
7754 Iterate over the sequence we just created and record them all. */
7755 loop_regs_update (loop, seq);
7760 /* Similar to gen_add_mult, but compute cost rather than generating
7764 iv_add_mult_cost (b, m, a, reg)
7765 rtx b; /* initial value of basic induction variable */
7766 rtx m; /* multiplicative constant */
7767 rtx a; /* additive constant */
7768 rtx reg; /* destination register */
7774 result = expand_mult_add (b, reg, m, a, GET_MODE (reg), 1);
7776 emit_move_insn (reg, result);
7777 last = get_last_insn ();
7780 rtx t = single_set (last);
7782 cost += rtx_cost (SET_SRC (t), SET);
7783 last = PREV_INSN (last);
7789 /* Test whether A * B can be computed without
7790 an actual multiply insn. Value is 1 if so. */
7793 product_cheap_p (a, b)
7801 /* If only one is constant, make it B. */
7802 if (GET_CODE (a) == CONST_INT)
7803 tmp = a, a = b, b = tmp;
7805 /* If first constant, both constant, so don't need multiply. */
7806 if (GET_CODE (a) == CONST_INT)
7809 /* If second not constant, neither is constant, so would need multiply. */
7810 if (GET_CODE (b) != CONST_INT)
7813 /* One operand is constant, so might not need multiply insn. Generate the
7814 code for the multiply and see if a call or multiply, or long sequence
7815 of insns is generated. */
7818 expand_mult (GET_MODE (a), a, b, NULL_RTX, 1);
7819 tmp = gen_sequence ();
7822 if (GET_CODE (tmp) == SEQUENCE)
7824 if (XVEC (tmp, 0) == 0)
7826 else if (XVECLEN (tmp, 0) > 3)
7829 for (i = 0; i < XVECLEN (tmp, 0); i++)
7831 rtx insn = XVECEXP (tmp, 0, i);
7833 if (GET_CODE (insn) != INSN
7834 || (GET_CODE (PATTERN (insn)) == SET
7835 && GET_CODE (SET_SRC (PATTERN (insn))) == MULT)
7836 || (GET_CODE (PATTERN (insn)) == PARALLEL
7837 && GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == SET
7838 && GET_CODE (SET_SRC (XVECEXP (PATTERN (insn), 0, 0))) == MULT))
7845 else if (GET_CODE (tmp) == SET
7846 && GET_CODE (SET_SRC (tmp)) == MULT)
7848 else if (GET_CODE (tmp) == PARALLEL
7849 && GET_CODE (XVECEXP (tmp, 0, 0)) == SET
7850 && GET_CODE (SET_SRC (XVECEXP (tmp, 0, 0))) == MULT)
7856 /* Check to see if loop can be terminated by a "decrement and branch until
7857 zero" instruction. If so, add a REG_NONNEG note to the branch insn if so.
7858 Also try reversing an increment loop to a decrement loop
7859 to see if the optimization can be performed.
7860 Value is nonzero if optimization was performed. */
7862 /* This is useful even if the architecture doesn't have such an insn,
7863 because it might change a loops which increments from 0 to n to a loop
7864 which decrements from n to 0. A loop that decrements to zero is usually
7865 faster than one that increments from zero. */
7867 /* ??? This could be rewritten to use some of the loop unrolling procedures,
7868 such as approx_final_value, biv_total_increment, loop_iterations, and
7869 final_[bg]iv_value. */
7872 check_dbra_loop (loop, insn_count)
7876 struct loop_info *loop_info = LOOP_INFO (loop);
7877 struct loop_regs *regs = LOOP_REGS (loop);
7878 struct loop_ivs *ivs = LOOP_IVS (loop);
7879 struct iv_class *bl;
7886 rtx before_comparison;
7890 int compare_and_branch;
7891 rtx loop_start = loop->start;
7892 rtx loop_end = loop->end;
7894 /* If last insn is a conditional branch, and the insn before tests a
7895 register value, try to optimize it. Otherwise, we can't do anything. */
7897 jump = PREV_INSN (loop_end);
7898 comparison = get_condition_for_loop (loop, jump);
7899 if (comparison == 0)
7901 if (!onlyjump_p (jump))
7904 /* Try to compute whether the compare/branch at the loop end is one or
7905 two instructions. */
7906 get_condition (jump, &first_compare);
7907 if (first_compare == jump)
7908 compare_and_branch = 1;
7909 else if (first_compare == prev_nonnote_insn (jump))
7910 compare_and_branch = 2;
7915 /* If more than one condition is present to control the loop, then
7916 do not proceed, as this function does not know how to rewrite
7917 loop tests with more than one condition.
7919 Look backwards from the first insn in the last comparison
7920 sequence and see if we've got another comparison sequence. */
7923 if ((jump1 = prev_nonnote_insn (first_compare)) != loop->cont)
7924 if (GET_CODE (jump1) == JUMP_INSN)
7928 /* Check all of the bivs to see if the compare uses one of them.
7929 Skip biv's set more than once because we can't guarantee that
7930 it will be zero on the last iteration. Also skip if the biv is
7931 used between its update and the test insn. */
7933 for (bl = ivs->list; bl; bl = bl->next)
7935 if (bl->biv_count == 1
7936 && ! bl->biv->maybe_multiple
7937 && bl->biv->dest_reg == XEXP (comparison, 0)
7938 && ! reg_used_between_p (regno_reg_rtx[bl->regno], bl->biv->insn,
7946 /* Look for the case where the basic induction variable is always
7947 nonnegative, and equals zero on the last iteration.
7948 In this case, add a reg_note REG_NONNEG, which allows the
7949 m68k DBRA instruction to be used. */
7951 if (((GET_CODE (comparison) == GT
7952 && GET_CODE (XEXP (comparison, 1)) == CONST_INT
7953 && INTVAL (XEXP (comparison, 1)) == -1)
7954 || (GET_CODE (comparison) == NE && XEXP (comparison, 1) == const0_rtx))
7955 && GET_CODE (bl->biv->add_val) == CONST_INT
7956 && INTVAL (bl->biv->add_val) < 0)
7958 /* Initial value must be greater than 0,
7959 init_val % -dec_value == 0 to ensure that it equals zero on
7960 the last iteration */
7962 if (GET_CODE (bl->initial_value) == CONST_INT
7963 && INTVAL (bl->initial_value) > 0
7964 && (INTVAL (bl->initial_value)
7965 % (-INTVAL (bl->biv->add_val))) == 0)
7967 /* register always nonnegative, add REG_NOTE to branch */
7968 if (! find_reg_note (jump, REG_NONNEG, NULL_RTX))
7970 = gen_rtx_EXPR_LIST (REG_NONNEG, bl->biv->dest_reg,
7977 /* If the decrement is 1 and the value was tested as >= 0 before
7978 the loop, then we can safely optimize. */
7979 for (p = loop_start; p; p = PREV_INSN (p))
7981 if (GET_CODE (p) == CODE_LABEL)
7983 if (GET_CODE (p) != JUMP_INSN)
7986 before_comparison = get_condition_for_loop (loop, p);
7987 if (before_comparison
7988 && XEXP (before_comparison, 0) == bl->biv->dest_reg
7989 && GET_CODE (before_comparison) == LT
7990 && XEXP (before_comparison, 1) == const0_rtx
7991 && ! reg_set_between_p (bl->biv->dest_reg, p, loop_start)
7992 && INTVAL (bl->biv->add_val) == -1)
7994 if (! find_reg_note (jump, REG_NONNEG, NULL_RTX))
7996 = gen_rtx_EXPR_LIST (REG_NONNEG, bl->biv->dest_reg,
8004 else if (GET_CODE (bl->biv->add_val) == CONST_INT
8005 && INTVAL (bl->biv->add_val) > 0)
8007 /* Try to change inc to dec, so can apply above optimization. */
8009 all registers modified are induction variables or invariant,
8010 all memory references have non-overlapping addresses
8011 (obviously true if only one write)
8012 allow 2 insns for the compare/jump at the end of the loop. */
8013 /* Also, we must avoid any instructions which use both the reversed
8014 biv and another biv. Such instructions will fail if the loop is
8015 reversed. We meet this condition by requiring that either
8016 no_use_except_counting is true, or else that there is only
8018 int num_nonfixed_reads = 0;
8019 /* 1 if the iteration var is used only to count iterations. */
8020 int no_use_except_counting = 0;
8021 /* 1 if the loop has no memory store, or it has a single memory store
8022 which is reversible. */
8023 int reversible_mem_store = 1;
8025 if (bl->giv_count == 0
8026 && !loop->exit_count
8027 && !loop_info->has_multiple_exit_targets)
8029 rtx bivreg = regno_reg_rtx[bl->regno];
8030 struct iv_class *blt;
8032 /* If there are no givs for this biv, and the only exit is the
8033 fall through at the end of the loop, then
8034 see if perhaps there are no uses except to count. */
8035 no_use_except_counting = 1;
8036 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
8039 rtx set = single_set (p);
8041 if (set && GET_CODE (SET_DEST (set)) == REG
8042 && REGNO (SET_DEST (set)) == bl->regno)
8043 /* An insn that sets the biv is okay. */
8045 else if ((p == prev_nonnote_insn (prev_nonnote_insn (loop_end))
8046 || p == prev_nonnote_insn (loop_end))
8047 && reg_mentioned_p (bivreg, PATTERN (p)))
8049 /* If either of these insns uses the biv and sets a pseudo
8050 that has more than one usage, then the biv has uses
8051 other than counting since it's used to derive a value
8052 that is used more than one time. */
8053 note_stores (PATTERN (p), note_set_pseudo_multiple_uses,
8055 if (regs->multiple_uses)
8057 no_use_except_counting = 0;
8061 else if (reg_mentioned_p (bivreg, PATTERN (p)))
8063 no_use_except_counting = 0;
8068 /* A biv has uses besides counting if it is used to set
8070 for (blt = ivs->list; blt; blt = blt->next)
8072 && reg_mentioned_p (bivreg, SET_SRC (blt->init_set)))
8074 no_use_except_counting = 0;
8079 if (no_use_except_counting)
8080 /* No need to worry about MEMs. */
8082 else if (loop_info->num_mem_sets <= 1)
8084 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
8086 num_nonfixed_reads += count_nonfixed_reads (loop, PATTERN (p));
8088 /* If the loop has a single store, and the destination address is
8089 invariant, then we can't reverse the loop, because this address
8090 might then have the wrong value at loop exit.
8091 This would work if the source was invariant also, however, in that
8092 case, the insn should have been moved out of the loop. */
8094 if (loop_info->num_mem_sets == 1)
8096 struct induction *v;
8098 /* If we could prove that each of the memory locations
8099 written to was different, then we could reverse the
8100 store -- but we don't presently have any way of
8102 reversible_mem_store = 0;
8104 /* If the store depends on a register that is set after the
8105 store, it depends on the initial value, and is thus not
8107 for (v = bl->giv; reversible_mem_store && v; v = v->next_iv)
8109 if (v->giv_type == DEST_REG
8110 && reg_mentioned_p (v->dest_reg,
8111 PATTERN (loop_info->first_loop_store_insn))
8112 && loop_insn_first_p (loop_info->first_loop_store_insn,
8114 reversible_mem_store = 0;
8121 /* This code only acts for innermost loops. Also it simplifies
8122 the memory address check by only reversing loops with
8123 zero or one memory access.
8124 Two memory accesses could involve parts of the same array,
8125 and that can't be reversed.
8126 If the biv is used only for counting, than we don't need to worry
8127 about all these things. */
8129 if ((num_nonfixed_reads <= 1
8130 && ! loop_info->has_nonconst_call
8131 && ! loop_info->has_volatile
8132 && reversible_mem_store
8133 && (bl->giv_count + bl->biv_count + loop_info->num_mem_sets
8134 + num_unmoved_movables (loop) + compare_and_branch == insn_count)
8135 && (bl == ivs->list && bl->next == 0))
8136 || no_use_except_counting)
8140 /* Loop can be reversed. */
8141 if (loop_dump_stream)
8142 fprintf (loop_dump_stream, "Can reverse loop\n");
8144 /* Now check other conditions:
8146 The increment must be a constant, as must the initial value,
8147 and the comparison code must be LT.
8149 This test can probably be improved since +/- 1 in the constant
8150 can be obtained by changing LT to LE and vice versa; this is
8154 /* for constants, LE gets turned into LT */
8155 && (GET_CODE (comparison) == LT
8156 || (GET_CODE (comparison) == LE
8157 && no_use_except_counting)))
8159 HOST_WIDE_INT add_val, add_adjust, comparison_val = 0;
8160 rtx initial_value, comparison_value;
8162 enum rtx_code cmp_code;
8163 int comparison_const_width;
8164 unsigned HOST_WIDE_INT comparison_sign_mask;
8166 add_val = INTVAL (bl->biv->add_val);
8167 comparison_value = XEXP (comparison, 1);
8168 if (GET_MODE (comparison_value) == VOIDmode)
8169 comparison_const_width
8170 = GET_MODE_BITSIZE (GET_MODE (XEXP (comparison, 0)));
8172 comparison_const_width
8173 = GET_MODE_BITSIZE (GET_MODE (comparison_value));
8174 if (comparison_const_width > HOST_BITS_PER_WIDE_INT)
8175 comparison_const_width = HOST_BITS_PER_WIDE_INT;
8176 comparison_sign_mask
8177 = (unsigned HOST_WIDE_INT) 1 << (comparison_const_width - 1);
8179 /* If the comparison value is not a loop invariant, then we
8180 can not reverse this loop.
8182 ??? If the insns which initialize the comparison value as
8183 a whole compute an invariant result, then we could move
8184 them out of the loop and proceed with loop reversal. */
8185 if (! loop_invariant_p (loop, comparison_value))
8188 if (GET_CODE (comparison_value) == CONST_INT)
8189 comparison_val = INTVAL (comparison_value);
8190 initial_value = bl->initial_value;
8192 /* Normalize the initial value if it is an integer and
8193 has no other use except as a counter. This will allow
8194 a few more loops to be reversed. */
8195 if (no_use_except_counting
8196 && GET_CODE (comparison_value) == CONST_INT
8197 && GET_CODE (initial_value) == CONST_INT)
8199 comparison_val = comparison_val - INTVAL (bl->initial_value);
8200 /* The code below requires comparison_val to be a multiple
8201 of add_val in order to do the loop reversal, so
8202 round up comparison_val to a multiple of add_val.
8203 Since comparison_value is constant, we know that the
8204 current comparison code is LT. */
8205 comparison_val = comparison_val + add_val - 1;
8207 -= (unsigned HOST_WIDE_INT) comparison_val % add_val;
8208 /* We postpone overflow checks for COMPARISON_VAL here;
8209 even if there is an overflow, we might still be able to
8210 reverse the loop, if converting the loop exit test to
8212 initial_value = const0_rtx;
8215 /* First check if we can do a vanilla loop reversal. */
8216 if (initial_value == const0_rtx
8217 /* If we have a decrement_and_branch_on_count,
8218 prefer the NE test, since this will allow that
8219 instruction to be generated. Note that we must
8220 use a vanilla loop reversal if the biv is used to
8221 calculate a giv or has a non-counting use. */
8222 #if ! defined (HAVE_decrement_and_branch_until_zero) \
8223 && defined (HAVE_decrement_and_branch_on_count)
8224 && (! (add_val == 1 && loop->vtop
8225 && (bl->biv_count == 0
8226 || no_use_except_counting)))
8228 && GET_CODE (comparison_value) == CONST_INT
8229 /* Now do postponed overflow checks on COMPARISON_VAL. */
8230 && ! (((comparison_val - add_val) ^ INTVAL (comparison_value))
8231 & comparison_sign_mask))
8233 /* Register will always be nonnegative, with value
8234 0 on last iteration */
8235 add_adjust = add_val;
8239 else if (add_val == 1 && loop->vtop
8240 && (bl->biv_count == 0
8241 || no_use_except_counting))
8249 if (GET_CODE (comparison) == LE)
8250 add_adjust -= add_val;
8252 /* If the initial value is not zero, or if the comparison
8253 value is not an exact multiple of the increment, then we
8254 can not reverse this loop. */
8255 if (initial_value == const0_rtx
8256 && GET_CODE (comparison_value) == CONST_INT)
8258 if (((unsigned HOST_WIDE_INT) comparison_val % add_val) != 0)
8263 if (! no_use_except_counting || add_val != 1)
8267 final_value = comparison_value;
8269 /* Reset these in case we normalized the initial value
8270 and comparison value above. */
8271 if (GET_CODE (comparison_value) == CONST_INT
8272 && GET_CODE (initial_value) == CONST_INT)
8274 comparison_value = GEN_INT (comparison_val);
8276 = GEN_INT (comparison_val + INTVAL (bl->initial_value));
8278 bl->initial_value = initial_value;
8280 /* Save some info needed to produce the new insns. */
8281 reg = bl->biv->dest_reg;
8282 jump_label = condjump_label (PREV_INSN (loop_end));
8283 new_add_val = GEN_INT (-INTVAL (bl->biv->add_val));
8285 /* Set start_value; if this is not a CONST_INT, we need
8287 Initialize biv to start_value before loop start.
8288 The old initializing insn will be deleted as a
8289 dead store by flow.c. */
8290 if (initial_value == const0_rtx
8291 && GET_CODE (comparison_value) == CONST_INT)
8293 start_value = GEN_INT (comparison_val - add_adjust);
8294 loop_insn_hoist (loop, gen_move_insn (reg, start_value));
8296 else if (GET_CODE (initial_value) == CONST_INT)
8298 enum machine_mode mode = GET_MODE (reg);
8299 rtx offset = GEN_INT (-INTVAL (initial_value) - add_adjust);
8300 rtx add_insn = gen_add3_insn (reg, comparison_value, offset);
8306 = gen_rtx_PLUS (mode, comparison_value, offset);
8307 loop_insn_hoist (loop, add_insn);
8308 if (GET_CODE (comparison) == LE)
8309 final_value = gen_rtx_PLUS (mode, comparison_value,
8312 else if (! add_adjust)
8314 enum machine_mode mode = GET_MODE (reg);
8315 rtx sub_insn = gen_sub3_insn (reg, comparison_value,
8321 = gen_rtx_MINUS (mode, comparison_value, initial_value);
8322 loop_insn_hoist (loop, sub_insn);
8325 /* We could handle the other cases too, but it'll be
8326 better to have a testcase first. */
8329 /* We may not have a single insn which can increment a reg, so
8330 create a sequence to hold all the insns from expand_inc. */
8332 expand_inc (reg, new_add_val);
8333 tem = gen_sequence ();
8336 p = loop_insn_emit_before (loop, 0, bl->biv->insn, tem);
8337 delete_insn (bl->biv->insn);
8339 /* Update biv info to reflect its new status. */
8341 bl->initial_value = start_value;
8342 bl->biv->add_val = new_add_val;
8344 /* Update loop info. */
8345 loop_info->initial_value = reg;
8346 loop_info->initial_equiv_value = reg;
8347 loop_info->final_value = const0_rtx;
8348 loop_info->final_equiv_value = const0_rtx;
8349 loop_info->comparison_value = const0_rtx;
8350 loop_info->comparison_code = cmp_code;
8351 loop_info->increment = new_add_val;
8353 /* Inc LABEL_NUSES so that delete_insn will
8354 not delete the label. */
8355 LABEL_NUSES (XEXP (jump_label, 0))++;
8357 /* Emit an insn after the end of the loop to set the biv's
8358 proper exit value if it is used anywhere outside the loop. */
8359 if ((REGNO_LAST_UID (bl->regno) != INSN_UID (first_compare))
8361 || REGNO_FIRST_UID (bl->regno) != INSN_UID (bl->init_insn))
8362 loop_insn_sink (loop, gen_move_insn (reg, final_value));
8364 /* Delete compare/branch at end of loop. */
8365 delete_related_insns (PREV_INSN (loop_end));
8366 if (compare_and_branch == 2)
8367 delete_related_insns (first_compare);
8369 /* Add new compare/branch insn at end of loop. */
8371 emit_cmp_and_jump_insns (reg, const0_rtx, cmp_code, NULL_RTX,
8373 XEXP (jump_label, 0));
8374 tem = gen_sequence ();
8376 emit_jump_insn_before (tem, loop_end);
8378 for (tem = PREV_INSN (loop_end);
8379 tem && GET_CODE (tem) != JUMP_INSN;
8380 tem = PREV_INSN (tem))
8384 JUMP_LABEL (tem) = XEXP (jump_label, 0);
8390 /* Increment of LABEL_NUSES done above. */
8391 /* Register is now always nonnegative,
8392 so add REG_NONNEG note to the branch. */
8393 REG_NOTES (tem) = gen_rtx_EXPR_LIST (REG_NONNEG, reg,
8399 /* No insn may reference both the reversed and another biv or it
8400 will fail (see comment near the top of the loop reversal
8402 Earlier on, we have verified that the biv has no use except
8403 counting, or it is the only biv in this function.
8404 However, the code that computes no_use_except_counting does
8405 not verify reg notes. It's possible to have an insn that
8406 references another biv, and has a REG_EQUAL note with an
8407 expression based on the reversed biv. To avoid this case,
8408 remove all REG_EQUAL notes based on the reversed biv
8410 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
8414 rtx set = single_set (p);
8415 /* If this is a set of a GIV based on the reversed biv, any
8416 REG_EQUAL notes should still be correct. */
8418 || GET_CODE (SET_DEST (set)) != REG
8419 || (size_t) REGNO (SET_DEST (set)) >= ivs->n_regs
8420 || REG_IV_TYPE (ivs, REGNO (SET_DEST (set))) != GENERAL_INDUCT
8421 || REG_IV_INFO (ivs, REGNO (SET_DEST (set)))->src_reg != bl->biv->src_reg)
8422 for (pnote = ®_NOTES (p); *pnote;)
8424 if (REG_NOTE_KIND (*pnote) == REG_EQUAL
8425 && reg_mentioned_p (regno_reg_rtx[bl->regno],
8427 *pnote = XEXP (*pnote, 1);
8429 pnote = &XEXP (*pnote, 1);
8433 /* Mark that this biv has been reversed. Each giv which depends
8434 on this biv, and which is also live past the end of the loop
8435 will have to be fixed up. */
8439 if (loop_dump_stream)
8441 fprintf (loop_dump_stream, "Reversed loop");
8443 fprintf (loop_dump_stream, " and added reg_nonneg\n");
8445 fprintf (loop_dump_stream, "\n");
8456 /* Verify whether the biv BL appears to be eliminable,
8457 based on the insns in the loop that refer to it.
8459 If ELIMINATE_P is non-zero, actually do the elimination.
8461 THRESHOLD and INSN_COUNT are from loop_optimize and are used to
8462 determine whether invariant insns should be placed inside or at the
8463 start of the loop. */
8466 maybe_eliminate_biv (loop, bl, eliminate_p, threshold, insn_count)
8467 const struct loop *loop;
8468 struct iv_class *bl;
8470 int threshold, insn_count;
8472 struct loop_ivs *ivs = LOOP_IVS (loop);
8473 rtx reg = bl->biv->dest_reg;
8476 /* Scan all insns in the loop, stopping if we find one that uses the
8477 biv in a way that we cannot eliminate. */
8479 for (p = loop->start; p != loop->end; p = NEXT_INSN (p))
8481 enum rtx_code code = GET_CODE (p);
8482 basic_block where_bb = 0;
8483 rtx where_insn = threshold >= insn_count ? 0 : p;
8485 /* If this is a libcall that sets a giv, skip ahead to its end. */
8486 if (GET_RTX_CLASS (code) == 'i')
8488 rtx note = find_reg_note (p, REG_LIBCALL, NULL_RTX);
8492 rtx last = XEXP (note, 0);
8493 rtx set = single_set (last);
8495 if (set && GET_CODE (SET_DEST (set)) == REG)
8497 unsigned int regno = REGNO (SET_DEST (set));
8499 if (regno < ivs->n_regs
8500 && REG_IV_TYPE (ivs, regno) == GENERAL_INDUCT
8501 && REG_IV_INFO (ivs, regno)->src_reg == bl->biv->src_reg)
8506 if ((code == INSN || code == JUMP_INSN || code == CALL_INSN)
8507 && reg_mentioned_p (reg, PATTERN (p))
8508 && ! maybe_eliminate_biv_1 (loop, PATTERN (p), p, bl,
8509 eliminate_p, where_bb, where_insn))
8511 if (loop_dump_stream)
8512 fprintf (loop_dump_stream,
8513 "Cannot eliminate biv %d: biv used in insn %d.\n",
8514 bl->regno, INSN_UID (p));
8521 if (loop_dump_stream)
8522 fprintf (loop_dump_stream, "biv %d %s eliminated.\n",
8523 bl->regno, eliminate_p ? "was" : "can be");
8530 /* INSN and REFERENCE are instructions in the same insn chain.
8531 Return non-zero if INSN is first. */
8534 loop_insn_first_p (insn, reference)
8535 rtx insn, reference;
8539 for (p = insn, q = reference;;)
8541 /* Start with test for not first so that INSN == REFERENCE yields not
8543 if (q == insn || ! p)
8545 if (p == reference || ! q)
8548 /* Either of P or Q might be a NOTE. Notes have the same LUID as the
8549 previous insn, hence the <= comparison below does not work if
8551 if (INSN_UID (p) < max_uid_for_loop
8552 && INSN_UID (q) < max_uid_for_loop
8553 && GET_CODE (p) != NOTE)
8554 return INSN_LUID (p) <= INSN_LUID (q);
8556 if (INSN_UID (p) >= max_uid_for_loop
8557 || GET_CODE (p) == NOTE)
8559 if (INSN_UID (q) >= max_uid_for_loop)
8564 /* We are trying to eliminate BIV in INSN using GIV. Return non-zero if
8565 the offset that we have to take into account due to auto-increment /
8566 div derivation is zero. */
8568 biv_elimination_giv_has_0_offset (biv, giv, insn)
8569 struct induction *biv, *giv;
8572 /* If the giv V had the auto-inc address optimization applied
8573 to it, and INSN occurs between the giv insn and the biv
8574 insn, then we'd have to adjust the value used here.
8575 This is rare, so we don't bother to make this possible. */
8576 if (giv->auto_inc_opt
8577 && ((loop_insn_first_p (giv->insn, insn)
8578 && loop_insn_first_p (insn, biv->insn))
8579 || (loop_insn_first_p (biv->insn, insn)
8580 && loop_insn_first_p (insn, giv->insn))))
8586 /* If BL appears in X (part of the pattern of INSN), see if we can
8587 eliminate its use. If so, return 1. If not, return 0.
8589 If BIV does not appear in X, return 1.
8591 If ELIMINATE_P is non-zero, actually do the elimination.
8592 WHERE_INSN/WHERE_BB indicate where extra insns should be added.
8593 Depending on how many items have been moved out of the loop, it
8594 will either be before INSN (when WHERE_INSN is non-zero) or at the
8595 start of the loop (when WHERE_INSN is zero). */
8598 maybe_eliminate_biv_1 (loop, x, insn, bl, eliminate_p, where_bb, where_insn)
8599 const struct loop *loop;
8601 struct iv_class *bl;
8603 basic_block where_bb;
8606 enum rtx_code code = GET_CODE (x);
8607 rtx reg = bl->biv->dest_reg;
8608 enum machine_mode mode = GET_MODE (reg);
8609 struct induction *v;
8621 /* If we haven't already been able to do something with this BIV,
8622 we can't eliminate it. */
8628 /* If this sets the BIV, it is not a problem. */
8629 if (SET_DEST (x) == reg)
8632 /* If this is an insn that defines a giv, it is also ok because
8633 it will go away when the giv is reduced. */
8634 for (v = bl->giv; v; v = v->next_iv)
8635 if (v->giv_type == DEST_REG && SET_DEST (x) == v->dest_reg)
8639 if (SET_DEST (x) == cc0_rtx && SET_SRC (x) == reg)
8641 /* Can replace with any giv that was reduced and
8642 that has (MULT_VAL != 0) and (ADD_VAL == 0).
8643 Require a constant for MULT_VAL, so we know it's nonzero.
8644 ??? We disable this optimization to avoid potential
8647 for (v = bl->giv; v; v = v->next_iv)
8648 if (GET_CODE (v->mult_val) == CONST_INT && v->mult_val != const0_rtx
8649 && v->add_val == const0_rtx
8650 && ! v->ignore && ! v->maybe_dead && v->always_computable
8654 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8660 /* If the giv has the opposite direction of change,
8661 then reverse the comparison. */
8662 if (INTVAL (v->mult_val) < 0)
8663 new = gen_rtx_COMPARE (GET_MODE (v->new_reg),
8664 const0_rtx, v->new_reg);
8668 /* We can probably test that giv's reduced reg. */
8669 if (validate_change (insn, &SET_SRC (x), new, 0))
8673 /* Look for a giv with (MULT_VAL != 0) and (ADD_VAL != 0);
8674 replace test insn with a compare insn (cmp REDUCED_GIV ADD_VAL).
8675 Require a constant for MULT_VAL, so we know it's nonzero.
8676 ??? Do this only if ADD_VAL is a pointer to avoid a potential
8677 overflow problem. */
8679 for (v = bl->giv; v; v = v->next_iv)
8680 if (GET_CODE (v->mult_val) == CONST_INT
8681 && v->mult_val != const0_rtx
8682 && ! v->ignore && ! v->maybe_dead && v->always_computable
8684 && (GET_CODE (v->add_val) == SYMBOL_REF
8685 || GET_CODE (v->add_val) == LABEL_REF
8686 || GET_CODE (v->add_val) == CONST
8687 || (GET_CODE (v->add_val) == REG
8688 && REG_POINTER (v->add_val))))
8690 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8696 /* If the giv has the opposite direction of change,
8697 then reverse the comparison. */
8698 if (INTVAL (v->mult_val) < 0)
8699 new = gen_rtx_COMPARE (VOIDmode, copy_rtx (v->add_val),
8702 new = gen_rtx_COMPARE (VOIDmode, v->new_reg,
8703 copy_rtx (v->add_val));
8705 /* Replace biv with the giv's reduced register. */
8706 update_reg_last_use (v->add_val, insn);
8707 if (validate_change (insn, &SET_SRC (PATTERN (insn)), new, 0))
8710 /* Insn doesn't support that constant or invariant. Copy it
8711 into a register (it will be a loop invariant.) */
8712 tem = gen_reg_rtx (GET_MODE (v->new_reg));
8714 loop_insn_emit_before (loop, 0, where_insn,
8716 copy_rtx (v->add_val)));
8718 /* Substitute the new register for its invariant value in
8719 the compare expression. */
8720 XEXP (new, (INTVAL (v->mult_val) < 0) ? 0 : 1) = tem;
8721 if (validate_change (insn, &SET_SRC (PATTERN (insn)), new, 0))
8730 case GT: case GE: case GTU: case GEU:
8731 case LT: case LE: case LTU: case LEU:
8732 /* See if either argument is the biv. */
8733 if (XEXP (x, 0) == reg)
8734 arg = XEXP (x, 1), arg_operand = 1;
8735 else if (XEXP (x, 1) == reg)
8736 arg = XEXP (x, 0), arg_operand = 0;
8740 if (CONSTANT_P (arg))
8742 /* First try to replace with any giv that has constant positive
8743 mult_val and constant add_val. We might be able to support
8744 negative mult_val, but it seems complex to do it in general. */
8746 for (v = bl->giv; v; v = v->next_iv)
8747 if (GET_CODE (v->mult_val) == CONST_INT
8748 && INTVAL (v->mult_val) > 0
8749 && (GET_CODE (v->add_val) == SYMBOL_REF
8750 || GET_CODE (v->add_val) == LABEL_REF
8751 || GET_CODE (v->add_val) == CONST
8752 || (GET_CODE (v->add_val) == REG
8753 && REG_POINTER (v->add_val)))
8754 && ! v->ignore && ! v->maybe_dead && v->always_computable
8757 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8763 /* Replace biv with the giv's reduced reg. */
8764 validate_change (insn, &XEXP (x, 1 - arg_operand), v->new_reg, 1);
8766 /* If all constants are actually constant integers and
8767 the derived constant can be directly placed in the COMPARE,
8769 if (GET_CODE (arg) == CONST_INT
8770 && GET_CODE (v->mult_val) == CONST_INT
8771 && GET_CODE (v->add_val) == CONST_INT)
8773 validate_change (insn, &XEXP (x, arg_operand),
8774 GEN_INT (INTVAL (arg)
8775 * INTVAL (v->mult_val)
8776 + INTVAL (v->add_val)), 1);
8780 /* Otherwise, load it into a register. */
8781 tem = gen_reg_rtx (mode);
8782 loop_iv_add_mult_emit_before (loop, arg,
8783 v->mult_val, v->add_val,
8784 tem, where_bb, where_insn);
8785 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
8787 if (apply_change_group ())
8791 /* Look for giv with positive constant mult_val and nonconst add_val.
8792 Insert insns to calculate new compare value.
8793 ??? Turn this off due to possible overflow. */
8795 for (v = bl->giv; v; v = v->next_iv)
8796 if (GET_CODE (v->mult_val) == CONST_INT
8797 && INTVAL (v->mult_val) > 0
8798 && ! v->ignore && ! v->maybe_dead && v->always_computable
8804 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8810 tem = gen_reg_rtx (mode);
8812 /* Replace biv with giv's reduced register. */
8813 validate_change (insn, &XEXP (x, 1 - arg_operand),
8816 /* Compute value to compare against. */
8817 loop_iv_add_mult_emit_before (loop, arg,
8818 v->mult_val, v->add_val,
8819 tem, where_bb, where_insn);
8820 /* Use it in this insn. */
8821 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
8822 if (apply_change_group ())
8826 else if (GET_CODE (arg) == REG || GET_CODE (arg) == MEM)
8828 if (loop_invariant_p (loop, arg) == 1)
8830 /* Look for giv with constant positive mult_val and nonconst
8831 add_val. Insert insns to compute new compare value.
8832 ??? Turn this off due to possible overflow. */
8834 for (v = bl->giv; v; v = v->next_iv)
8835 if (GET_CODE (v->mult_val) == CONST_INT && INTVAL (v->mult_val) > 0
8836 && ! v->ignore && ! v->maybe_dead && v->always_computable
8842 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8848 tem = gen_reg_rtx (mode);
8850 /* Replace biv with giv's reduced register. */
8851 validate_change (insn, &XEXP (x, 1 - arg_operand),
8854 /* Compute value to compare against. */
8855 loop_iv_add_mult_emit_before (loop, arg,
8856 v->mult_val, v->add_val,
8857 tem, where_bb, where_insn);
8858 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
8859 if (apply_change_group ())
8864 /* This code has problems. Basically, you can't know when
8865 seeing if we will eliminate BL, whether a particular giv
8866 of ARG will be reduced. If it isn't going to be reduced,
8867 we can't eliminate BL. We can try forcing it to be reduced,
8868 but that can generate poor code.
8870 The problem is that the benefit of reducing TV, below should
8871 be increased if BL can actually be eliminated, but this means
8872 we might have to do a topological sort of the order in which
8873 we try to process biv. It doesn't seem worthwhile to do
8874 this sort of thing now. */
8877 /* Otherwise the reg compared with had better be a biv. */
8878 if (GET_CODE (arg) != REG
8879 || REG_IV_TYPE (ivs, REGNO (arg)) != BASIC_INDUCT)
8882 /* Look for a pair of givs, one for each biv,
8883 with identical coefficients. */
8884 for (v = bl->giv; v; v = v->next_iv)
8886 struct induction *tv;
8888 if (v->ignore || v->maybe_dead || v->mode != mode)
8891 for (tv = REG_IV_CLASS (ivs, REGNO (arg))->giv; tv;
8893 if (! tv->ignore && ! tv->maybe_dead
8894 && rtx_equal_p (tv->mult_val, v->mult_val)
8895 && rtx_equal_p (tv->add_val, v->add_val)
8896 && tv->mode == mode)
8898 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8904 /* Replace biv with its giv's reduced reg. */
8905 XEXP (x, 1 - arg_operand) = v->new_reg;
8906 /* Replace other operand with the other giv's
8908 XEXP (x, arg_operand) = tv->new_reg;
8915 /* If we get here, the biv can't be eliminated. */
8919 /* If this address is a DEST_ADDR giv, it doesn't matter if the
8920 biv is used in it, since it will be replaced. */
8921 for (v = bl->giv; v; v = v->next_iv)
8922 if (v->giv_type == DEST_ADDR && v->location == &XEXP (x, 0))
8930 /* See if any subexpression fails elimination. */
8931 fmt = GET_RTX_FORMAT (code);
8932 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
8937 if (! maybe_eliminate_biv_1 (loop, XEXP (x, i), insn, bl,
8938 eliminate_p, where_bb, where_insn))
8943 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
8944 if (! maybe_eliminate_biv_1 (loop, XVECEXP (x, i, j), insn, bl,
8945 eliminate_p, where_bb, where_insn))
8954 /* Return nonzero if the last use of REG
8955 is in an insn following INSN in the same basic block. */
8958 last_use_this_basic_block (reg, insn)
8964 n && GET_CODE (n) != CODE_LABEL && GET_CODE (n) != JUMP_INSN;
8967 if (REGNO_LAST_UID (REGNO (reg)) == INSN_UID (n))
8973 /* Called via `note_stores' to record the initial value of a biv. Here we
8974 just record the location of the set and process it later. */
8977 record_initial (dest, set, data)
8980 void *data ATTRIBUTE_UNUSED;
8982 struct loop_ivs *ivs = (struct loop_ivs *) data;
8983 struct iv_class *bl;
8985 if (GET_CODE (dest) != REG
8986 || REGNO (dest) >= ivs->n_regs
8987 || REG_IV_TYPE (ivs, REGNO (dest)) != BASIC_INDUCT)
8990 bl = REG_IV_CLASS (ivs, REGNO (dest));
8992 /* If this is the first set found, record it. */
8993 if (bl->init_insn == 0)
8995 bl->init_insn = note_insn;
9000 /* If any of the registers in X are "old" and currently have a last use earlier
9001 than INSN, update them to have a last use of INSN. Their actual last use
9002 will be the previous insn but it will not have a valid uid_luid so we can't
9003 use it. X must be a source expression only. */
9006 update_reg_last_use (x, insn)
9010 /* Check for the case where INSN does not have a valid luid. In this case,
9011 there is no need to modify the regno_last_uid, as this can only happen
9012 when code is inserted after the loop_end to set a pseudo's final value,
9013 and hence this insn will never be the last use of x.
9014 ???? This comment is not correct. See for example loop_givs_reduce.
9015 This may insert an insn before another new insn. */
9016 if (GET_CODE (x) == REG && REGNO (x) < max_reg_before_loop
9017 && INSN_UID (insn) < max_uid_for_loop
9018 && REGNO_LAST_LUID (REGNO (x)) < INSN_LUID (insn))
9020 REGNO_LAST_UID (REGNO (x)) = INSN_UID (insn);
9025 const char *fmt = GET_RTX_FORMAT (GET_CODE (x));
9026 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
9029 update_reg_last_use (XEXP (x, i), insn);
9030 else if (fmt[i] == 'E')
9031 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
9032 update_reg_last_use (XVECEXP (x, i, j), insn);
9037 /* Given an insn INSN and condition COND, return the condition in a
9038 canonical form to simplify testing by callers. Specifically:
9040 (1) The code will always be a comparison operation (EQ, NE, GT, etc.).
9041 (2) Both operands will be machine operands; (cc0) will have been replaced.
9042 (3) If an operand is a constant, it will be the second operand.
9043 (4) (LE x const) will be replaced with (LT x <const+1>) and similarly
9044 for GE, GEU, and LEU.
9046 If the condition cannot be understood, or is an inequality floating-point
9047 comparison which needs to be reversed, 0 will be returned.
9049 If REVERSE is non-zero, then reverse the condition prior to canonizing it.
9051 If EARLIEST is non-zero, it is a pointer to a place where the earliest
9052 insn used in locating the condition was found. If a replacement test
9053 of the condition is desired, it should be placed in front of that
9054 insn and we will be sure that the inputs are still valid.
9056 If WANT_REG is non-zero, we wish the condition to be relative to that
9057 register, if possible. Therefore, do not canonicalize the condition
9061 canonicalize_condition (insn, cond, reverse, earliest, want_reg)
9073 int reverse_code = 0;
9074 enum machine_mode mode;
9076 code = GET_CODE (cond);
9077 mode = GET_MODE (cond);
9078 op0 = XEXP (cond, 0);
9079 op1 = XEXP (cond, 1);
9082 code = reversed_comparison_code (cond, insn);
9083 if (code == UNKNOWN)
9089 /* If we are comparing a register with zero, see if the register is set
9090 in the previous insn to a COMPARE or a comparison operation. Perform
9091 the same tests as a function of STORE_FLAG_VALUE as find_comparison_args
9094 while (GET_RTX_CLASS (code) == '<'
9095 && op1 == CONST0_RTX (GET_MODE (op0))
9098 /* Set non-zero when we find something of interest. */
9102 /* If comparison with cc0, import actual comparison from compare
9106 if ((prev = prev_nonnote_insn (prev)) == 0
9107 || GET_CODE (prev) != INSN
9108 || (set = single_set (prev)) == 0
9109 || SET_DEST (set) != cc0_rtx)
9112 op0 = SET_SRC (set);
9113 op1 = CONST0_RTX (GET_MODE (op0));
9119 /* If this is a COMPARE, pick up the two things being compared. */
9120 if (GET_CODE (op0) == COMPARE)
9122 op1 = XEXP (op0, 1);
9123 op0 = XEXP (op0, 0);
9126 else if (GET_CODE (op0) != REG)
9129 /* Go back to the previous insn. Stop if it is not an INSN. We also
9130 stop if it isn't a single set or if it has a REG_INC note because
9131 we don't want to bother dealing with it. */
9133 if ((prev = prev_nonnote_insn (prev)) == 0
9134 || GET_CODE (prev) != INSN
9135 || FIND_REG_INC_NOTE (prev, NULL_RTX))
9138 set = set_of (op0, prev);
9141 && (GET_CODE (set) != SET
9142 || !rtx_equal_p (SET_DEST (set), op0)))
9145 /* If this is setting OP0, get what it sets it to if it looks
9149 enum machine_mode inner_mode = GET_MODE (SET_DEST (set));
9151 /* ??? We may not combine comparisons done in a CCmode with
9152 comparisons not done in a CCmode. This is to aid targets
9153 like Alpha that have an IEEE compliant EQ instruction, and
9154 a non-IEEE compliant BEQ instruction. The use of CCmode is
9155 actually artificial, simply to prevent the combination, but
9156 should not affect other platforms.
9158 However, we must allow VOIDmode comparisons to match either
9159 CCmode or non-CCmode comparison, because some ports have
9160 modeless comparisons inside branch patterns.
9162 ??? This mode check should perhaps look more like the mode check
9163 in simplify_comparison in combine. */
9165 if ((GET_CODE (SET_SRC (set)) == COMPARE
9168 && GET_MODE_CLASS (inner_mode) == MODE_INT
9169 && (GET_MODE_BITSIZE (inner_mode)
9170 <= HOST_BITS_PER_WIDE_INT)
9171 && (STORE_FLAG_VALUE
9172 & ((HOST_WIDE_INT) 1
9173 << (GET_MODE_BITSIZE (inner_mode) - 1))))
9174 #ifdef FLOAT_STORE_FLAG_VALUE
9176 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
9177 && (REAL_VALUE_NEGATIVE
9178 (FLOAT_STORE_FLAG_VALUE (inner_mode))))
9181 && GET_RTX_CLASS (GET_CODE (SET_SRC (set))) == '<'))
9182 && (((GET_MODE_CLASS (mode) == MODE_CC)
9183 == (GET_MODE_CLASS (inner_mode) == MODE_CC))
9184 || mode == VOIDmode || inner_mode == VOIDmode))
9186 else if (((code == EQ
9188 && (GET_MODE_BITSIZE (inner_mode)
9189 <= HOST_BITS_PER_WIDE_INT)
9190 && GET_MODE_CLASS (inner_mode) == MODE_INT
9191 && (STORE_FLAG_VALUE
9192 & ((HOST_WIDE_INT) 1
9193 << (GET_MODE_BITSIZE (inner_mode) - 1))))
9194 #ifdef FLOAT_STORE_FLAG_VALUE
9196 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
9197 && (REAL_VALUE_NEGATIVE
9198 (FLOAT_STORE_FLAG_VALUE (inner_mode))))
9201 && GET_RTX_CLASS (GET_CODE (SET_SRC (set))) == '<'
9202 && (((GET_MODE_CLASS (mode) == MODE_CC)
9203 == (GET_MODE_CLASS (inner_mode) == MODE_CC))
9204 || mode == VOIDmode || inner_mode == VOIDmode))
9214 else if (reg_set_p (op0, prev))
9215 /* If this sets OP0, but not directly, we have to give up. */
9220 if (GET_RTX_CLASS (GET_CODE (x)) == '<')
9221 code = GET_CODE (x);
9224 code = reversed_comparison_code (x, prev);
9225 if (code == UNKNOWN)
9230 op0 = XEXP (x, 0), op1 = XEXP (x, 1);
9236 /* If constant is first, put it last. */
9237 if (CONSTANT_P (op0))
9238 code = swap_condition (code), tem = op0, op0 = op1, op1 = tem;
9240 /* If OP0 is the result of a comparison, we weren't able to find what
9241 was really being compared, so fail. */
9242 if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_CC)
9245 /* Canonicalize any ordered comparison with integers involving equality
9246 if we can do computations in the relevant mode and we do not
9249 if (GET_CODE (op1) == CONST_INT
9250 && GET_MODE (op0) != VOIDmode
9251 && GET_MODE_BITSIZE (GET_MODE (op0)) <= HOST_BITS_PER_WIDE_INT)
9253 HOST_WIDE_INT const_val = INTVAL (op1);
9254 unsigned HOST_WIDE_INT uconst_val = const_val;
9255 unsigned HOST_WIDE_INT max_val
9256 = (unsigned HOST_WIDE_INT) GET_MODE_MASK (GET_MODE (op0));
9261 if ((unsigned HOST_WIDE_INT) const_val != max_val >> 1)
9262 code = LT, op1 = GEN_INT (const_val + 1);
9265 /* When cross-compiling, const_val might be sign-extended from
9266 BITS_PER_WORD to HOST_BITS_PER_WIDE_INT */
9268 if ((HOST_WIDE_INT) (const_val & max_val)
9269 != (((HOST_WIDE_INT) 1
9270 << (GET_MODE_BITSIZE (GET_MODE (op0)) - 1))))
9271 code = GT, op1 = GEN_INT (const_val - 1);
9275 if (uconst_val < max_val)
9276 code = LTU, op1 = GEN_INT (uconst_val + 1);
9280 if (uconst_val != 0)
9281 code = GTU, op1 = GEN_INT (uconst_val - 1);
9290 /* Never return CC0; return zero instead. */
9295 return gen_rtx_fmt_ee (code, VOIDmode, op0, op1);
9298 /* Given a jump insn JUMP, return the condition that will cause it to branch
9299 to its JUMP_LABEL. If the condition cannot be understood, or is an
9300 inequality floating-point comparison which needs to be reversed, 0 will
9303 If EARLIEST is non-zero, it is a pointer to a place where the earliest
9304 insn used in locating the condition was found. If a replacement test
9305 of the condition is desired, it should be placed in front of that
9306 insn and we will be sure that the inputs are still valid. */
9309 get_condition (jump, earliest)
9317 /* If this is not a standard conditional jump, we can't parse it. */
9318 if (GET_CODE (jump) != JUMP_INSN
9319 || ! any_condjump_p (jump))
9321 set = pc_set (jump);
9323 cond = XEXP (SET_SRC (set), 0);
9325 /* If this branches to JUMP_LABEL when the condition is false, reverse
9328 = GET_CODE (XEXP (SET_SRC (set), 2)) == LABEL_REF
9329 && XEXP (XEXP (SET_SRC (set), 2), 0) == JUMP_LABEL (jump);
9331 return canonicalize_condition (jump, cond, reverse, earliest, NULL_RTX);
9334 /* Similar to above routine, except that we also put an invariant last
9335 unless both operands are invariants. */
9338 get_condition_for_loop (loop, x)
9339 const struct loop *loop;
9342 rtx comparison = get_condition (x, (rtx*) 0);
9345 || ! loop_invariant_p (loop, XEXP (comparison, 0))
9346 || loop_invariant_p (loop, XEXP (comparison, 1)))
9349 return gen_rtx_fmt_ee (swap_condition (GET_CODE (comparison)), VOIDmode,
9350 XEXP (comparison, 1), XEXP (comparison, 0));
9353 /* Scan the function and determine whether it has indirect (computed) jumps.
9355 This is taken mostly from flow.c; similar code exists elsewhere
9356 in the compiler. It may be useful to put this into rtlanal.c. */
9358 indirect_jump_in_function_p (start)
9363 for (insn = start; insn; insn = NEXT_INSN (insn))
9364 if (computed_jump_p (insn))
9370 /* Add MEM to the LOOP_MEMS array, if appropriate. See the
9371 documentation for LOOP_MEMS for the definition of `appropriate'.
9372 This function is called from prescan_loop via for_each_rtx. */
9375 insert_loop_mem (mem, data)
9377 void *data ATTRIBUTE_UNUSED;
9379 struct loop_info *loop_info = data;
9386 switch (GET_CODE (m))
9392 /* We're not interested in MEMs that are only clobbered. */
9396 /* We're not interested in the MEM associated with a
9397 CONST_DOUBLE, so there's no need to traverse into this. */
9401 /* We're not interested in any MEMs that only appear in notes. */
9405 /* This is not a MEM. */
9409 /* See if we've already seen this MEM. */
9410 for (i = 0; i < loop_info->mems_idx; ++i)
9411 if (rtx_equal_p (m, loop_info->mems[i].mem))
9413 if (GET_MODE (m) != GET_MODE (loop_info->mems[i].mem))
9414 /* The modes of the two memory accesses are different. If
9415 this happens, something tricky is going on, and we just
9416 don't optimize accesses to this MEM. */
9417 loop_info->mems[i].optimize = 0;
9422 /* Resize the array, if necessary. */
9423 if (loop_info->mems_idx == loop_info->mems_allocated)
9425 if (loop_info->mems_allocated != 0)
9426 loop_info->mems_allocated *= 2;
9428 loop_info->mems_allocated = 32;
9430 loop_info->mems = (loop_mem_info *)
9431 xrealloc (loop_info->mems,
9432 loop_info->mems_allocated * sizeof (loop_mem_info));
9435 /* Actually insert the MEM. */
9436 loop_info->mems[loop_info->mems_idx].mem = m;
9437 /* We can't hoist this MEM out of the loop if it's a BLKmode MEM
9438 because we can't put it in a register. We still store it in the
9439 table, though, so that if we see the same address later, but in a
9440 non-BLK mode, we'll not think we can optimize it at that point. */
9441 loop_info->mems[loop_info->mems_idx].optimize = (GET_MODE (m) != BLKmode);
9442 loop_info->mems[loop_info->mems_idx].reg = NULL_RTX;
9443 ++loop_info->mems_idx;
9449 /* Allocate REGS->ARRAY or reallocate it if it is too small.
9451 Increment REGS->ARRAY[I].SET_IN_LOOP at the index I of each
9452 register that is modified by an insn between FROM and TO. If the
9453 value of an element of REGS->array[I].SET_IN_LOOP becomes 127 or
9454 more, stop incrementing it, to avoid overflow.
9456 Store in REGS->ARRAY[I].SINGLE_USAGE the single insn in which
9457 register I is used, if it is only used once. Otherwise, it is set
9458 to 0 (for no uses) or const0_rtx for more than one use. This
9459 parameter may be zero, in which case this processing is not done.
9461 Set REGS->ARRAY[I].MAY_NOT_OPTIMIZE nonzero if we should not
9462 optimize register I. */
9465 loop_regs_scan (loop, extra_size)
9466 const struct loop *loop;
9469 struct loop_regs *regs = LOOP_REGS (loop);
9471 /* last_set[n] is nonzero iff reg n has been set in the current
9472 basic block. In that case, it is the insn that last set reg n. */
9477 old_nregs = regs->num;
9478 regs->num = max_reg_num ();
9480 /* Grow the regs array if not allocated or too small. */
9481 if (regs->num >= regs->size)
9483 regs->size = regs->num + extra_size;
9485 regs->array = (struct loop_reg *)
9486 xrealloc (regs->array, regs->size * sizeof (*regs->array));
9488 /* Zero the new elements. */
9489 memset (regs->array + old_nregs, 0,
9490 (regs->size - old_nregs) * sizeof (*regs->array));
9493 /* Clear previously scanned fields but do not clear n_times_set. */
9494 for (i = 0; i < old_nregs; i++)
9496 regs->array[i].set_in_loop = 0;
9497 regs->array[i].may_not_optimize = 0;
9498 regs->array[i].single_usage = NULL_RTX;
9501 last_set = (rtx *) xcalloc (regs->num, sizeof (rtx));
9503 /* Scan the loop, recording register usage. */
9504 for (insn = loop->top ? loop->top : loop->start; insn != loop->end;
9505 insn = NEXT_INSN (insn))
9509 /* Record registers that have exactly one use. */
9510 find_single_use_in_loop (regs, insn, PATTERN (insn));
9512 /* Include uses in REG_EQUAL notes. */
9513 if (REG_NOTES (insn))
9514 find_single_use_in_loop (regs, insn, REG_NOTES (insn));
9516 if (GET_CODE (PATTERN (insn)) == SET
9517 || GET_CODE (PATTERN (insn)) == CLOBBER)
9518 count_one_set (regs, insn, PATTERN (insn), last_set);
9519 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
9522 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
9523 count_one_set (regs, insn, XVECEXP (PATTERN (insn), 0, i),
9528 if (GET_CODE (insn) == CODE_LABEL || GET_CODE (insn) == JUMP_INSN)
9529 memset (last_set, 0, regs->num * sizeof (rtx));
9532 /* Invalidate all hard registers clobbered by calls. With one exception:
9533 a call-clobbered PIC register is still function-invariant for our
9534 purposes, since we can hoist any PIC calculations out of the loop.
9535 Thus the call to rtx_varies_p. */
9536 if (LOOP_INFO (loop)->has_call)
9537 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
9538 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i)
9539 && rtx_varies_p (gen_rtx_REG (Pmode, i), /*for_alias=*/1))
9541 regs->array[i].may_not_optimize = 1;
9542 regs->array[i].set_in_loop = 1;
9545 #ifdef AVOID_CCMODE_COPIES
9546 /* Don't try to move insns which set CC registers if we should not
9547 create CCmode register copies. */
9548 for (i = regs->num - 1; i >= FIRST_PSEUDO_REGISTER; i--)
9549 if (GET_MODE_CLASS (GET_MODE (regno_reg_rtx[i])) == MODE_CC)
9550 regs->array[i].may_not_optimize = 1;
9553 /* Set regs->array[I].n_times_set for the new registers. */
9554 for (i = old_nregs; i < regs->num; i++)
9555 regs->array[i].n_times_set = regs->array[i].set_in_loop;
9560 /* Returns the number of real INSNs in the LOOP. */
9563 count_insns_in_loop (loop)
9564 const struct loop *loop;
9569 for (insn = loop->top ? loop->top : loop->start; insn != loop->end;
9570 insn = NEXT_INSN (insn))
9577 /* Move MEMs into registers for the duration of the loop. */
9581 const struct loop *loop;
9583 struct loop_info *loop_info = LOOP_INFO (loop);
9584 struct loop_regs *regs = LOOP_REGS (loop);
9585 int maybe_never = 0;
9587 rtx p, prev_ebb_head;
9588 rtx label = NULL_RTX;
9590 /* Nonzero if the next instruction may never be executed. */
9591 int next_maybe_never = 0;
9592 unsigned int last_max_reg = max_reg_num ();
9594 if (loop_info->mems_idx == 0)
9597 /* We cannot use next_label here because it skips over normal insns. */
9598 end_label = next_nonnote_insn (loop->end);
9599 if (end_label && GET_CODE (end_label) != CODE_LABEL)
9600 end_label = NULL_RTX;
9602 /* Check to see if it's possible that some instructions in the loop are
9603 never executed. Also check if there is a goto out of the loop other
9604 than right after the end of the loop. */
9605 for (p = next_insn_in_loop (loop, loop->scan_start);
9607 p = next_insn_in_loop (loop, p))
9609 if (GET_CODE (p) == CODE_LABEL)
9611 else if (GET_CODE (p) == JUMP_INSN
9612 /* If we enter the loop in the middle, and scan
9613 around to the beginning, don't set maybe_never
9614 for that. This must be an unconditional jump,
9615 otherwise the code at the top of the loop might
9616 never be executed. Unconditional jumps are
9617 followed a by barrier then loop end. */
9618 && ! (GET_CODE (p) == JUMP_INSN
9619 && JUMP_LABEL (p) == loop->top
9620 && NEXT_INSN (NEXT_INSN (p)) == loop->end
9621 && any_uncondjump_p (p)))
9623 /* If this is a jump outside of the loop but not right
9624 after the end of the loop, we would have to emit new fixup
9625 sequences for each such label. */
9626 if (/* If we can't tell where control might go when this
9627 JUMP_INSN is executed, we must be conservative. */
9629 || (JUMP_LABEL (p) != end_label
9630 && (INSN_UID (JUMP_LABEL (p)) >= max_uid_for_loop
9631 || INSN_LUID (JUMP_LABEL (p)) < INSN_LUID (loop->start)
9632 || INSN_LUID (JUMP_LABEL (p)) > INSN_LUID (loop->end))))
9635 if (!any_condjump_p (p))
9636 /* Something complicated. */
9639 /* If there are any more instructions in the loop, they
9640 might not be reached. */
9641 next_maybe_never = 1;
9643 else if (next_maybe_never)
9647 /* Find start of the extended basic block that enters the loop. */
9648 for (p = loop->start;
9649 PREV_INSN (p) && GET_CODE (p) != CODE_LABEL;
9656 /* Build table of mems that get set to constant values before the
9658 for (; p != loop->start; p = NEXT_INSN (p))
9659 cselib_process_insn (p);
9661 /* Actually move the MEMs. */
9662 for (i = 0; i < loop_info->mems_idx; ++i)
9664 regset_head load_copies;
9665 regset_head store_copies;
9668 rtx mem = loop_info->mems[i].mem;
9671 if (MEM_VOLATILE_P (mem)
9672 || loop_invariant_p (loop, XEXP (mem, 0)) != 1)
9673 /* There's no telling whether or not MEM is modified. */
9674 loop_info->mems[i].optimize = 0;
9676 /* Go through the MEMs written to in the loop to see if this
9677 one is aliased by one of them. */
9678 mem_list_entry = loop_info->store_mems;
9679 while (mem_list_entry)
9681 if (rtx_equal_p (mem, XEXP (mem_list_entry, 0)))
9683 else if (true_dependence (XEXP (mem_list_entry, 0), VOIDmode,
9686 /* MEM is indeed aliased by this store. */
9687 loop_info->mems[i].optimize = 0;
9690 mem_list_entry = XEXP (mem_list_entry, 1);
9693 if (flag_float_store && written
9694 && GET_MODE_CLASS (GET_MODE (mem)) == MODE_FLOAT)
9695 loop_info->mems[i].optimize = 0;
9697 /* If this MEM is written to, we must be sure that there
9698 are no reads from another MEM that aliases this one. */
9699 if (loop_info->mems[i].optimize && written)
9703 for (j = 0; j < loop_info->mems_idx; ++j)
9707 else if (true_dependence (mem,
9709 loop_info->mems[j].mem,
9712 /* It's not safe to hoist loop_info->mems[i] out of
9713 the loop because writes to it might not be
9714 seen by reads from loop_info->mems[j]. */
9715 loop_info->mems[i].optimize = 0;
9721 if (maybe_never && may_trap_p (mem))
9722 /* We can't access the MEM outside the loop; it might
9723 cause a trap that wouldn't have happened otherwise. */
9724 loop_info->mems[i].optimize = 0;
9726 if (!loop_info->mems[i].optimize)
9727 /* We thought we were going to lift this MEM out of the
9728 loop, but later discovered that we could not. */
9731 INIT_REG_SET (&load_copies);
9732 INIT_REG_SET (&store_copies);
9734 /* Allocate a pseudo for this MEM. We set REG_USERVAR_P in
9735 order to keep scan_loop from moving stores to this MEM
9736 out of the loop just because this REG is neither a
9737 user-variable nor used in the loop test. */
9738 reg = gen_reg_rtx (GET_MODE (mem));
9739 REG_USERVAR_P (reg) = 1;
9740 loop_info->mems[i].reg = reg;
9742 /* Now, replace all references to the MEM with the
9743 corresponding pseudos. */
9745 for (p = next_insn_in_loop (loop, loop->scan_start);
9747 p = next_insn_in_loop (loop, p))
9753 set = single_set (p);
9755 /* See if this copies the mem into a register that isn't
9756 modified afterwards. We'll try to do copy propagation
9757 a little further on. */
9759 /* @@@ This test is _way_ too conservative. */
9761 && GET_CODE (SET_DEST (set)) == REG
9762 && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER
9763 && REGNO (SET_DEST (set)) < last_max_reg
9764 && regs->array[REGNO (SET_DEST (set))].n_times_set == 1
9765 && rtx_equal_p (SET_SRC (set), mem))
9766 SET_REGNO_REG_SET (&load_copies, REGNO (SET_DEST (set)));
9768 /* See if this copies the mem from a register that isn't
9769 modified afterwards. We'll try to remove the
9770 redundant copy later on by doing a little register
9771 renaming and copy propagation. This will help
9772 to untangle things for the BIV detection code. */
9775 && GET_CODE (SET_SRC (set)) == REG
9776 && REGNO (SET_SRC (set)) >= FIRST_PSEUDO_REGISTER
9777 && REGNO (SET_SRC (set)) < last_max_reg
9778 && regs->array[REGNO (SET_SRC (set))].n_times_set == 1
9779 && rtx_equal_p (SET_DEST (set), mem))
9780 SET_REGNO_REG_SET (&store_copies, REGNO (SET_SRC (set)));
9782 /* Replace the memory reference with the shadow register. */
9783 replace_loop_mems (p, loop_info->mems[i].mem,
9784 loop_info->mems[i].reg);
9787 if (GET_CODE (p) == CODE_LABEL
9788 || GET_CODE (p) == JUMP_INSN)
9792 if (! apply_change_group ())
9793 /* We couldn't replace all occurrences of the MEM. */
9794 loop_info->mems[i].optimize = 0;
9797 /* Load the memory immediately before LOOP->START, which is
9798 the NOTE_LOOP_BEG. */
9799 cselib_val *e = cselib_lookup (mem, VOIDmode, 0);
9803 struct elt_loc_list *const_equiv = 0;
9807 struct elt_loc_list *equiv;
9808 struct elt_loc_list *best_equiv = 0;
9809 for (equiv = e->locs; equiv; equiv = equiv->next)
9811 if (CONSTANT_P (equiv->loc))
9812 const_equiv = equiv;
9813 else if (GET_CODE (equiv->loc) == REG
9814 /* Extending hard register lifetimes causes crash
9815 on SRC targets. Doing so on non-SRC is
9816 probably also not good idea, since we most
9817 probably have pseudoregister equivalence as
9819 && REGNO (equiv->loc) >= FIRST_PSEUDO_REGISTER)
9822 /* Use the constant equivalence if that is cheap enough. */
9824 best_equiv = const_equiv;
9825 else if (const_equiv
9826 && (rtx_cost (const_equiv->loc, SET)
9827 <= rtx_cost (best_equiv->loc, SET)))
9829 best_equiv = const_equiv;
9833 /* If best_equiv is nonzero, we know that MEM is set to a
9834 constant or register before the loop. We will use this
9835 knowledge to initialize the shadow register with that
9836 constant or reg rather than by loading from MEM. */
9838 best = copy_rtx (best_equiv->loc);
9841 set = gen_move_insn (reg, best);
9842 set = loop_insn_hoist (loop, set);
9845 for (p = prev_ebb_head; p != loop->start; p = NEXT_INSN (p))
9846 if (REGNO_LAST_UID (REGNO (best)) == INSN_UID (p))
9848 REGNO_LAST_UID (REGNO (best)) = INSN_UID (set);
9854 set_unique_reg_note (set, REG_EQUAL, copy_rtx (const_equiv->loc));
9858 if (label == NULL_RTX)
9860 label = gen_label_rtx ();
9861 emit_label_after (label, loop->end);
9864 /* Store the memory immediately after END, which is
9865 the NOTE_LOOP_END. */
9866 set = gen_move_insn (copy_rtx (mem), reg);
9867 loop_insn_emit_after (loop, 0, label, set);
9870 if (loop_dump_stream)
9872 fprintf (loop_dump_stream, "Hoisted regno %d %s from ",
9873 REGNO (reg), (written ? "r/w" : "r/o"));
9874 print_rtl (loop_dump_stream, mem);
9875 fputc ('\n', loop_dump_stream);
9878 /* Attempt a bit of copy propagation. This helps untangle the
9879 data flow, and enables {basic,general}_induction_var to find
9881 EXECUTE_IF_SET_IN_REG_SET
9882 (&load_copies, FIRST_PSEUDO_REGISTER, j,
9884 try_copy_prop (loop, reg, j);
9886 CLEAR_REG_SET (&load_copies);
9888 EXECUTE_IF_SET_IN_REG_SET
9889 (&store_copies, FIRST_PSEUDO_REGISTER, j,
9891 try_swap_copy_prop (loop, reg, j);
9893 CLEAR_REG_SET (&store_copies);
9897 if (label != NULL_RTX && end_label != NULL_RTX)
9899 /* Now, we need to replace all references to the previous exit
9900 label with the new one. */
9905 for (p = loop->start; p != loop->end; p = NEXT_INSN (p))
9907 for_each_rtx (&p, replace_label, &rr);
9909 /* If this is a JUMP_INSN, then we also need to fix the JUMP_LABEL
9910 field. This is not handled by for_each_rtx because it doesn't
9911 handle unprinted ('0') fields. We need to update JUMP_LABEL
9912 because the immediately following unroll pass will use it.
9913 replace_label would not work anyways, because that only handles
9915 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p) == end_label)
9916 JUMP_LABEL (p) = label;
9923 /* For communication between note_reg_stored and its caller. */
9924 struct note_reg_stored_arg
9930 /* Called via note_stores, record in SET_SEEN whether X, which is written,
9933 note_reg_stored (x, setter, arg)
9934 rtx x, setter ATTRIBUTE_UNUSED;
9937 struct note_reg_stored_arg *t = (struct note_reg_stored_arg *) arg;
9942 /* Try to replace every occurrence of pseudo REGNO with REPLACEMENT.
9943 There must be exactly one insn that sets this pseudo; it will be
9944 deleted if all replacements succeed and we can prove that the register
9945 is not used after the loop. */
9948 try_copy_prop (loop, replacement, regno)
9949 const struct loop *loop;
9953 /* This is the reg that we are copying from. */
9954 rtx reg_rtx = regno_reg_rtx[regno];
9957 /* These help keep track of whether we replaced all uses of the reg. */
9958 int replaced_last = 0;
9959 int store_is_first = 0;
9961 for (insn = next_insn_in_loop (loop, loop->scan_start);
9963 insn = next_insn_in_loop (loop, insn))
9967 /* Only substitute within one extended basic block from the initializing
9969 if (GET_CODE (insn) == CODE_LABEL && init_insn)
9972 if (! INSN_P (insn))
9975 /* Is this the initializing insn? */
9976 set = single_set (insn);
9978 && GET_CODE (SET_DEST (set)) == REG
9979 && REGNO (SET_DEST (set)) == regno)
9985 if (REGNO_FIRST_UID (regno) == INSN_UID (insn))
9989 /* Only substitute after seeing the initializing insn. */
9990 if (init_insn && insn != init_insn)
9992 struct note_reg_stored_arg arg;
9994 replace_loop_regs (insn, reg_rtx, replacement);
9995 if (REGNO_LAST_UID (regno) == INSN_UID (insn))
9998 /* Stop replacing when REPLACEMENT is modified. */
9999 arg.reg = replacement;
10001 note_stores (PATTERN (insn), note_reg_stored, &arg);
10004 rtx note = find_reg_note (insn, REG_EQUAL, NULL);
10006 /* It is possible that we've turned previously valid REG_EQUAL to
10007 invalid, as we change the REGNO to REPLACEMENT and unlike REGNO,
10008 REPLACEMENT is modified, we get different meaning. */
10009 if (note && reg_mentioned_p (replacement, XEXP (note, 0)))
10010 remove_note (insn, note);
10017 if (apply_change_group ())
10019 if (loop_dump_stream)
10020 fprintf (loop_dump_stream, " Replaced reg %d", regno);
10021 if (store_is_first && replaced_last)
10026 /* Assume we're just deleting INIT_INSN. */
10028 /* Look for REG_RETVAL note. If we're deleting the end of
10029 the libcall sequence, the whole sequence can go. */
10030 retval_note = find_reg_note (init_insn, REG_RETVAL, NULL_RTX);
10031 /* If we found a REG_RETVAL note, find the first instruction
10032 in the sequence. */
10034 first = XEXP (retval_note, 0);
10036 /* Delete the instructions. */
10037 loop_delete_insns (first, init_insn);
10039 if (loop_dump_stream)
10040 fprintf (loop_dump_stream, ".\n");
10044 /* Replace all the instructions from FIRST up to and including LAST
10045 with NOTE_INSN_DELETED notes. */
10048 loop_delete_insns (first, last)
10054 if (loop_dump_stream)
10055 fprintf (loop_dump_stream, ", deleting init_insn (%d)",
10057 delete_insn (first);
10059 /* If this was the LAST instructions we're supposed to delete,
10064 first = NEXT_INSN (first);
10068 /* Try to replace occurrences of pseudo REGNO with REPLACEMENT within
10069 loop LOOP if the order of the sets of these registers can be
10070 swapped. There must be exactly one insn within the loop that sets
10071 this pseudo followed immediately by a move insn that sets
10072 REPLACEMENT with REGNO. */
10074 try_swap_copy_prop (loop, replacement, regno)
10075 const struct loop *loop;
10077 unsigned int regno;
10080 rtx set = NULL_RTX;
10081 unsigned int new_regno;
10083 new_regno = REGNO (replacement);
10085 for (insn = next_insn_in_loop (loop, loop->scan_start);
10087 insn = next_insn_in_loop (loop, insn))
10089 /* Search for the insn that copies REGNO to NEW_REGNO? */
10091 && (set = single_set (insn))
10092 && GET_CODE (SET_DEST (set)) == REG
10093 && REGNO (SET_DEST (set)) == new_regno
10094 && GET_CODE (SET_SRC (set)) == REG
10095 && REGNO (SET_SRC (set)) == regno)
10099 if (insn != NULL_RTX)
10104 /* Some DEF-USE info would come in handy here to make this
10105 function more general. For now, just check the previous insn
10106 which is the most likely candidate for setting REGNO. */
10108 prev_insn = PREV_INSN (insn);
10111 && (prev_set = single_set (prev_insn))
10112 && GET_CODE (SET_DEST (prev_set)) == REG
10113 && REGNO (SET_DEST (prev_set)) == regno)
10116 (set (reg regno) (expr))
10117 (set (reg new_regno) (reg regno))
10119 so try converting this to:
10120 (set (reg new_regno) (expr))
10121 (set (reg regno) (reg new_regno))
10123 The former construct is often generated when a global
10124 variable used for an induction variable is shadowed by a
10125 register (NEW_REGNO). The latter construct improves the
10126 chances of GIV replacement and BIV elimination. */
10128 validate_change (prev_insn, &SET_DEST (prev_set),
10130 validate_change (insn, &SET_DEST (set),
10132 validate_change (insn, &SET_SRC (set),
10135 if (apply_change_group ())
10137 if (loop_dump_stream)
10138 fprintf (loop_dump_stream,
10139 " Swapped set of reg %d at %d with reg %d at %d.\n",
10140 regno, INSN_UID (insn),
10141 new_regno, INSN_UID (prev_insn));
10143 /* Update first use of REGNO. */
10144 if (REGNO_FIRST_UID (regno) == INSN_UID (prev_insn))
10145 REGNO_FIRST_UID (regno) = INSN_UID (insn);
10147 /* Now perform copy propagation to hopefully
10148 remove all uses of REGNO within the loop. */
10149 try_copy_prop (loop, replacement, regno);
10155 /* Replace MEM with its associated pseudo register. This function is
10156 called from load_mems via for_each_rtx. DATA is actually a pointer
10157 to a structure describing the instruction currently being scanned
10158 and the MEM we are currently replacing. */
10161 replace_loop_mem (mem, data)
10165 loop_replace_args *args = (loop_replace_args *) data;
10171 switch (GET_CODE (m))
10177 /* We're not interested in the MEM associated with a
10178 CONST_DOUBLE, so there's no need to traverse into one. */
10182 /* This is not a MEM. */
10186 if (!rtx_equal_p (args->match, m))
10187 /* This is not the MEM we are currently replacing. */
10190 /* Actually replace the MEM. */
10191 validate_change (args->insn, mem, args->replacement, 1);
10197 replace_loop_mems (insn, mem, reg)
10202 loop_replace_args args;
10206 args.replacement = reg;
10208 for_each_rtx (&insn, replace_loop_mem, &args);
10211 /* Replace one register with another. Called through for_each_rtx; PX points
10212 to the rtx being scanned. DATA is actually a pointer to
10213 a structure of arguments. */
10216 replace_loop_reg (px, data)
10221 loop_replace_args *args = (loop_replace_args *) data;
10226 if (x == args->match)
10227 validate_change (args->insn, px, args->replacement, 1);
10233 replace_loop_regs (insn, reg, replacement)
10238 loop_replace_args args;
10242 args.replacement = replacement;
10244 for_each_rtx (&insn, replace_loop_reg, &args);
10247 /* Replace occurrences of the old exit label for the loop with the new
10248 one. DATA is an rtx_pair containing the old and new labels,
10252 replace_label (x, data)
10257 rtx old_label = ((rtx_pair *) data)->r1;
10258 rtx new_label = ((rtx_pair *) data)->r2;
10263 if (GET_CODE (l) != LABEL_REF)
10266 if (XEXP (l, 0) != old_label)
10269 XEXP (l, 0) = new_label;
10270 ++LABEL_NUSES (new_label);
10271 --LABEL_NUSES (old_label);
10276 /* Emit insn for PATTERN after WHERE_INSN in basic block WHERE_BB
10277 (ignored in the interim). */
10280 loop_insn_emit_after (loop, where_bb, where_insn, pattern)
10281 const struct loop *loop ATTRIBUTE_UNUSED;
10282 basic_block where_bb ATTRIBUTE_UNUSED;
10286 return emit_insn_after (pattern, where_insn);
10290 /* If WHERE_INSN is non-zero emit insn for PATTERN before WHERE_INSN
10291 in basic block WHERE_BB (ignored in the interim) within the loop
10292 otherwise hoist PATTERN into the loop pre-header. */
10295 loop_insn_emit_before (loop, where_bb, where_insn, pattern)
10296 const struct loop *loop;
10297 basic_block where_bb ATTRIBUTE_UNUSED;
10302 return loop_insn_hoist (loop, pattern);
10303 return emit_insn_before (pattern, where_insn);
10307 /* Emit call insn for PATTERN before WHERE_INSN in basic block
10308 WHERE_BB (ignored in the interim) within the loop. */
10311 loop_call_insn_emit_before (loop, where_bb, where_insn, pattern)
10312 const struct loop *loop ATTRIBUTE_UNUSED;
10313 basic_block where_bb ATTRIBUTE_UNUSED;
10317 return emit_call_insn_before (pattern, where_insn);
10321 /* Hoist insn for PATTERN into the loop pre-header. */
10324 loop_insn_hoist (loop, pattern)
10325 const struct loop *loop;
10328 return loop_insn_emit_before (loop, 0, loop->start, pattern);
10332 /* Hoist call insn for PATTERN into the loop pre-header. */
10335 loop_call_insn_hoist (loop, pattern)
10336 const struct loop *loop;
10339 return loop_call_insn_emit_before (loop, 0, loop->start, pattern);
10343 /* Sink insn for PATTERN after the loop end. */
10346 loop_insn_sink (loop, pattern)
10347 const struct loop *loop;
10350 return loop_insn_emit_before (loop, 0, loop->sink, pattern);
10354 /* If the loop has multiple exits, emit insn for PATTERN before the
10355 loop to ensure that it will always be executed no matter how the
10356 loop exits. Otherwise, emit the insn for PATTERN after the loop,
10357 since this is slightly more efficient. */
10360 loop_insn_sink_or_swim (loop, pattern)
10361 const struct loop *loop;
10364 if (loop->exit_count)
10365 return loop_insn_hoist (loop, pattern);
10367 return loop_insn_sink (loop, pattern);
10371 loop_ivs_dump (loop, file, verbose)
10372 const struct loop *loop;
10376 struct iv_class *bl;
10379 if (! loop || ! file)
10382 for (bl = LOOP_IVS (loop)->list; bl; bl = bl->next)
10385 fprintf (file, "Loop %d: %d IV classes\n", loop->num, iv_num);
10387 for (bl = LOOP_IVS (loop)->list; bl; bl = bl->next)
10389 loop_iv_class_dump (bl, file, verbose);
10390 fputc ('\n', file);
10396 loop_iv_class_dump (bl, file, verbose)
10397 const struct iv_class *bl;
10399 int verbose ATTRIBUTE_UNUSED;
10401 struct induction *v;
10405 if (! bl || ! file)
10408 fprintf (file, "IV class for reg %d, benefit %d\n",
10409 bl->regno, bl->total_benefit);
10411 fprintf (file, " Init insn %d", INSN_UID (bl->init_insn));
10412 if (bl->initial_value)
10414 fprintf (file, ", init val: ");
10415 print_simple_rtl (file, bl->initial_value);
10417 if (bl->initial_test)
10419 fprintf (file, ", init test: ");
10420 print_simple_rtl (file, bl->initial_test);
10422 fputc ('\n', file);
10424 if (bl->final_value)
10426 fprintf (file, " Final val: ");
10427 print_simple_rtl (file, bl->final_value);
10428 fputc ('\n', file);
10431 if ((incr = biv_total_increment (bl)))
10433 fprintf (file, " Total increment: ");
10434 print_simple_rtl (file, incr);
10435 fputc ('\n', file);
10438 /* List the increments. */
10439 for (i = 0, v = bl->biv; v; v = v->next_iv, i++)
10441 fprintf (file, " Inc%d: insn %d, incr: ", i, INSN_UID (v->insn));
10442 print_simple_rtl (file, v->add_val);
10443 fputc ('\n', file);
10446 /* List the givs. */
10447 for (i = 0, v = bl->giv; v; v = v->next_iv, i++)
10449 fprintf (file, " Giv%d: insn %d, benefit %d, ",
10450 i, INSN_UID (v->insn), v->benefit);
10451 if (v->giv_type == DEST_ADDR)
10452 print_simple_rtl (file, v->mem);
10454 print_simple_rtl (file, single_set (v->insn));
10455 fputc ('\n', file);
10461 loop_biv_dump (v, file, verbose)
10462 const struct induction *v;
10471 REGNO (v->dest_reg), INSN_UID (v->insn));
10472 fprintf (file, " const ");
10473 print_simple_rtl (file, v->add_val);
10475 if (verbose && v->final_value)
10477 fputc ('\n', file);
10478 fprintf (file, " final ");
10479 print_simple_rtl (file, v->final_value);
10482 fputc ('\n', file);
10487 loop_giv_dump (v, file, verbose)
10488 const struct induction *v;
10495 if (v->giv_type == DEST_REG)
10496 fprintf (file, "Giv %d: insn %d",
10497 REGNO (v->dest_reg), INSN_UID (v->insn));
10499 fprintf (file, "Dest address: insn %d",
10500 INSN_UID (v->insn));
10502 fprintf (file, " src reg %d benefit %d",
10503 REGNO (v->src_reg), v->benefit);
10504 fprintf (file, " lifetime %d",
10507 if (v->replaceable)
10508 fprintf (file, " replaceable");
10510 if (v->no_const_addval)
10511 fprintf (file, " ncav");
10513 if (v->ext_dependent)
10515 switch (GET_CODE (v->ext_dependent))
10518 fprintf (file, " ext se");
10521 fprintf (file, " ext ze");
10524 fprintf (file, " ext tr");
10531 fputc ('\n', file);
10532 fprintf (file, " mult ");
10533 print_simple_rtl (file, v->mult_val);
10535 fputc ('\n', file);
10536 fprintf (file, " add ");
10537 print_simple_rtl (file, v->add_val);
10539 if (verbose && v->final_value)
10541 fputc ('\n', file);
10542 fprintf (file, " final ");
10543 print_simple_rtl (file, v->final_value);
10546 fputc ('\n', file);
10552 const struct loop *loop;
10554 loop_ivs_dump (loop, stderr, 1);
10559 debug_iv_class (bl)
10560 const struct iv_class *bl;
10562 loop_iv_class_dump (bl, stderr, 1);
10568 const struct induction *v;
10570 loop_biv_dump (v, stderr, 1);
10576 const struct induction *v;
10578 loop_giv_dump (v, stderr, 1);
10582 #define LOOP_BLOCK_NUM_1(INSN) \
10583 ((INSN) ? (BLOCK_FOR_INSN (INSN) ? BLOCK_NUM (INSN) : - 1) : -1)
10585 /* The notes do not have an assigned block, so look at the next insn. */
10586 #define LOOP_BLOCK_NUM(INSN) \
10587 ((INSN) ? (GET_CODE (INSN) == NOTE \
10588 ? LOOP_BLOCK_NUM_1 (next_nonnote_insn (INSN)) \
10589 : LOOP_BLOCK_NUM_1 (INSN)) \
10592 #define LOOP_INSN_UID(INSN) ((INSN) ? INSN_UID (INSN) : -1)
10595 loop_dump_aux (loop, file, verbose)
10596 const struct loop *loop;
10598 int verbose ATTRIBUTE_UNUSED;
10602 if (! loop || ! file)
10605 /* Print diagnostics to compare our concept of a loop with
10606 what the loop notes say. */
10607 if (! PREV_INSN (loop->first->head)
10608 || GET_CODE (PREV_INSN (loop->first->head)) != NOTE
10609 || NOTE_LINE_NUMBER (PREV_INSN (loop->first->head))
10610 != NOTE_INSN_LOOP_BEG)
10611 fprintf (file, ";; No NOTE_INSN_LOOP_BEG at %d\n",
10612 INSN_UID (PREV_INSN (loop->first->head)));
10613 if (! NEXT_INSN (loop->last->end)
10614 || GET_CODE (NEXT_INSN (loop->last->end)) != NOTE
10615 || NOTE_LINE_NUMBER (NEXT_INSN (loop->last->end))
10616 != NOTE_INSN_LOOP_END)
10617 fprintf (file, ";; No NOTE_INSN_LOOP_END at %d\n",
10618 INSN_UID (NEXT_INSN (loop->last->end)));
10623 ";; start %d (%d), cont dom %d (%d), cont %d (%d), vtop %d (%d), end %d (%d)\n",
10624 LOOP_BLOCK_NUM (loop->start),
10625 LOOP_INSN_UID (loop->start),
10626 LOOP_BLOCK_NUM (loop->cont),
10627 LOOP_INSN_UID (loop->cont),
10628 LOOP_BLOCK_NUM (loop->cont),
10629 LOOP_INSN_UID (loop->cont),
10630 LOOP_BLOCK_NUM (loop->vtop),
10631 LOOP_INSN_UID (loop->vtop),
10632 LOOP_BLOCK_NUM (loop->end),
10633 LOOP_INSN_UID (loop->end));
10634 fprintf (file, ";; top %d (%d), scan start %d (%d)\n",
10635 LOOP_BLOCK_NUM (loop->top),
10636 LOOP_INSN_UID (loop->top),
10637 LOOP_BLOCK_NUM (loop->scan_start),
10638 LOOP_INSN_UID (loop->scan_start));
10639 fprintf (file, ";; exit_count %d", loop->exit_count);
10640 if (loop->exit_count)
10642 fputs (", labels:", file);
10643 for (label = loop->exit_labels; label; label = LABEL_NEXTREF (label))
10645 fprintf (file, " %d ",
10646 LOOP_INSN_UID (XEXP (label, 0)));
10649 fputs ("\n", file);
10651 /* This can happen when a marked loop appears as two nested loops,
10652 say from while (a || b) {}. The inner loop won't match
10653 the loop markers but the outer one will. */
10654 if (LOOP_BLOCK_NUM (loop->cont) != loop->latch->index)
10655 fprintf (file, ";; NOTE_INSN_LOOP_CONT not in loop latch\n");
10659 /* Call this function from the debugger to dump LOOP. */
10663 const struct loop *loop;
10665 flow_loop_dump (loop, stderr, loop_dump_aux, 1);
10668 /* Call this function from the debugger to dump LOOPS. */
10671 debug_loops (loops)
10672 const struct loops *loops;
10674 flow_loops_dump (loops, stderr, loop_dump_aux, 1);