1 /* Perform various loop optimizations, including strength reduction.
2 Copyright (C) 1987, 1988, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
22 /* This is the loop optimization pass of the compiler.
23 It finds invariant computations within loops and moves them
24 to the beginning of the loop. Then it identifies basic and
25 general induction variables.
27 Basic induction variables (BIVs) are a pseudo registers which are set within
28 a loop only by incrementing or decrementing its value. General induction
29 variables (GIVs) are pseudo registers with a value which is a linear function
30 of a basic induction variable. BIVs are recognized by `basic_induction_var';
31 GIVs by `general_induction_var'.
33 Once induction variables are identified, strength reduction is applied to the
34 general induction variables, and induction variable elimination is applied to
35 the basic induction variables.
37 It also finds cases where
38 a register is set within the loop by zero-extending a narrower value
39 and changes these to zero the entire register once before the loop
40 and merely copy the low part within the loop.
42 Most of the complexity is in heuristics to decide when it is worth
43 while to do these things. */
47 #include "coretypes.h"
53 #include "hard-reg-set.h"
54 #include "basic-block.h"
55 #include "insn-config.h"
65 #include "insn-flags.h"
69 /* Not really meaningful values, but at least something. */
70 #ifndef SIMULTANEOUS_PREFETCHES
71 #define SIMULTANEOUS_PREFETCHES 3
73 #ifndef PREFETCH_BLOCK
74 #define PREFETCH_BLOCK 32
77 #define HAVE_prefetch 0
78 #define CODE_FOR_prefetch 0
79 #define gen_prefetch(a,b,c) (abort(), NULL_RTX)
82 /* Give up the prefetch optimizations once we exceed a given threshold.
83 It is unlikely that we would be able to optimize something in a loop
84 with so many detected prefetches. */
85 #define MAX_PREFETCHES 100
86 /* The number of prefetch blocks that are beneficial to fetch at once before
87 a loop with a known (and low) iteration count. */
88 #define PREFETCH_BLOCKS_BEFORE_LOOP_MAX 6
89 /* For very tiny loops it is not worthwhile to prefetch even before the loop,
90 since it is likely that the data are already in the cache. */
91 #define PREFETCH_BLOCKS_BEFORE_LOOP_MIN 2
93 /* Parameterize some prefetch heuristics so they can be turned on and off
94 easily for performance testing on new architectures. These can be
95 defined in target-dependent files. */
97 /* Prefetch is worthwhile only when loads/stores are dense. */
98 #ifndef PREFETCH_ONLY_DENSE_MEM
99 #define PREFETCH_ONLY_DENSE_MEM 1
102 /* Define what we mean by "dense" loads and stores; This value divided by 256
103 is the minimum percentage of memory references that worth prefetching. */
104 #ifndef PREFETCH_DENSE_MEM
105 #define PREFETCH_DENSE_MEM 220
108 /* Do not prefetch for a loop whose iteration count is known to be low. */
109 #ifndef PREFETCH_NO_LOW_LOOPCNT
110 #define PREFETCH_NO_LOW_LOOPCNT 1
113 /* Define what we mean by a "low" iteration count. */
114 #ifndef PREFETCH_LOW_LOOPCNT
115 #define PREFETCH_LOW_LOOPCNT 32
118 /* Do not prefetch for a loop that contains a function call; such a loop is
119 probably not an internal loop. */
120 #ifndef PREFETCH_NO_CALL
121 #define PREFETCH_NO_CALL 1
124 /* Do not prefetch accesses with an extreme stride. */
125 #ifndef PREFETCH_NO_EXTREME_STRIDE
126 #define PREFETCH_NO_EXTREME_STRIDE 1
129 /* Define what we mean by an "extreme" stride. */
130 #ifndef PREFETCH_EXTREME_STRIDE
131 #define PREFETCH_EXTREME_STRIDE 4096
134 /* Define a limit to how far apart indices can be and still be merged
135 into a single prefetch. */
136 #ifndef PREFETCH_EXTREME_DIFFERENCE
137 #define PREFETCH_EXTREME_DIFFERENCE 4096
140 /* Issue prefetch instructions before the loop to fetch data to be used
141 in the first few loop iterations. */
142 #ifndef PREFETCH_BEFORE_LOOP
143 #define PREFETCH_BEFORE_LOOP 1
146 /* Do not handle reversed order prefetches (negative stride). */
147 #ifndef PREFETCH_NO_REVERSE_ORDER
148 #define PREFETCH_NO_REVERSE_ORDER 1
151 /* Prefetch even if the GIV is in conditional code. */
152 #ifndef PREFETCH_CONDITIONAL
153 #define PREFETCH_CONDITIONAL 1
156 #define LOOP_REG_LIFETIME(LOOP, REGNO) \
157 ((REGNO_LAST_LUID (REGNO) - REGNO_FIRST_LUID (REGNO)))
159 #define LOOP_REG_GLOBAL_P(LOOP, REGNO) \
160 ((REGNO_LAST_LUID (REGNO) > INSN_LUID ((LOOP)->end) \
161 || REGNO_FIRST_LUID (REGNO) < INSN_LUID ((LOOP)->start)))
163 #define LOOP_REGNO_NREGS(REGNO, SET_DEST) \
164 ((REGNO) < FIRST_PSEUDO_REGISTER \
165 ? (int) HARD_REGNO_NREGS ((REGNO), GET_MODE (SET_DEST)) : 1)
168 /* Vector mapping INSN_UIDs to luids.
169 The luids are like uids but increase monotonically always.
170 We use them to see whether a jump comes from outside a given loop. */
174 /* Indexed by INSN_UID, contains the ordinal giving the (innermost) loop
175 number the insn is contained in. */
177 struct loop **uid_loop;
179 /* 1 + largest uid of any insn. */
181 int max_uid_for_loop;
183 /* Number of loops detected in current function. Used as index to the
186 static int max_loop_num;
188 /* Bound on pseudo register number before loop optimization.
189 A pseudo has valid regscan info if its number is < max_reg_before_loop. */
190 unsigned int max_reg_before_loop;
192 /* The value to pass to the next call of reg_scan_update. */
193 static int loop_max_reg;
195 /* During the analysis of a loop, a chain of `struct movable's
196 is made to record all the movable insns found.
197 Then the entire chain can be scanned to decide which to move. */
201 rtx insn; /* A movable insn */
202 rtx set_src; /* The expression this reg is set from. */
203 rtx set_dest; /* The destination of this SET. */
204 rtx dependencies; /* When INSN is libcall, this is an EXPR_LIST
205 of any registers used within the LIBCALL. */
206 int consec; /* Number of consecutive following insns
207 that must be moved with this one. */
208 unsigned int regno; /* The register it sets */
209 short lifetime; /* lifetime of that register;
210 may be adjusted when matching movables
211 that load the same value are found. */
212 short savings; /* Number of insns we can move for this reg,
213 including other movables that force this
214 or match this one. */
215 ENUM_BITFIELD(machine_mode) savemode : 8; /* Nonzero means it is a mode for
216 a low part that we should avoid changing when
217 clearing the rest of the reg. */
218 unsigned int cond : 1; /* 1 if only conditionally movable */
219 unsigned int force : 1; /* 1 means MUST move this insn */
220 unsigned int global : 1; /* 1 means reg is live outside this loop */
221 /* If PARTIAL is 1, GLOBAL means something different:
222 that the reg is live outside the range from where it is set
223 to the following label. */
224 unsigned int done : 1; /* 1 inhibits further processing of this */
226 unsigned int partial : 1; /* 1 means this reg is used for zero-extending.
227 In particular, moving it does not make it
229 unsigned int move_insn : 1; /* 1 means that we call emit_move_insn to
230 load SRC, rather than copying INSN. */
231 unsigned int move_insn_first:1;/* Same as above, if this is necessary for the
232 first insn of a consecutive sets group. */
233 unsigned int is_equiv : 1; /* 1 means a REG_EQUIV is present on INSN. */
234 unsigned int insert_temp : 1; /* 1 means we copy to a new pseudo and replace
235 the original insn with a copy from that
236 pseudo, rather than deleting it. */
237 struct movable *match; /* First entry for same value */
238 struct movable *forces; /* An insn that must be moved if this is */
239 struct movable *next;
243 FILE *loop_dump_stream;
245 /* Forward declarations. */
247 static void invalidate_loops_containing_label (rtx);
248 static void find_and_verify_loops (rtx, struct loops *);
249 static void mark_loop_jump (rtx, struct loop *);
250 static void prescan_loop (struct loop *);
251 static int reg_in_basic_block_p (rtx, rtx);
252 static int consec_sets_invariant_p (const struct loop *, rtx, int, rtx);
253 static int labels_in_range_p (rtx, int);
254 static void count_one_set (struct loop_regs *, rtx, rtx, rtx *);
255 static void note_addr_stored (rtx, rtx, void *);
256 static void note_set_pseudo_multiple_uses (rtx, rtx, void *);
257 static int loop_reg_used_before_p (const struct loop *, rtx, rtx);
258 static void scan_loop (struct loop*, int);
260 static void replace_call_address (rtx, rtx, rtx);
262 static rtx skip_consec_insns (rtx, int);
263 static int libcall_benefit (rtx);
264 static void ignore_some_movables (struct loop_movables *);
265 static void force_movables (struct loop_movables *);
266 static void combine_movables (struct loop_movables *, struct loop_regs *);
267 static int num_unmoved_movables (const struct loop *);
268 static int regs_match_p (rtx, rtx, struct loop_movables *);
269 static int rtx_equal_for_loop_p (rtx, rtx, struct loop_movables *,
271 static void add_label_notes (rtx, rtx);
272 static void move_movables (struct loop *loop, struct loop_movables *, int,
274 static void loop_movables_add (struct loop_movables *, struct movable *);
275 static void loop_movables_free (struct loop_movables *);
276 static int count_nonfixed_reads (const struct loop *, rtx);
277 static void loop_bivs_find (struct loop *);
278 static void loop_bivs_init_find (struct loop *);
279 static void loop_bivs_check (struct loop *);
280 static void loop_givs_find (struct loop *);
281 static void loop_givs_check (struct loop *);
282 static int loop_biv_eliminable_p (struct loop *, struct iv_class *, int, int);
283 static int loop_giv_reduce_benefit (struct loop *, struct iv_class *,
284 struct induction *, rtx);
285 static void loop_givs_dead_check (struct loop *, struct iv_class *);
286 static void loop_givs_reduce (struct loop *, struct iv_class *);
287 static void loop_givs_rescan (struct loop *, struct iv_class *, rtx *);
288 static void loop_ivs_free (struct loop *);
289 static void strength_reduce (struct loop *, int);
290 static void find_single_use_in_loop (struct loop_regs *, rtx, rtx);
291 static int valid_initial_value_p (rtx, rtx, int, rtx);
292 static void find_mem_givs (const struct loop *, rtx, rtx, int, int);
293 static void record_biv (struct loop *, struct induction *, rtx, rtx, rtx,
294 rtx, rtx *, int, int);
295 static void check_final_value (const struct loop *, struct induction *);
296 static void loop_ivs_dump (const struct loop *, FILE *, int);
297 static void loop_iv_class_dump (const struct iv_class *, FILE *, int);
298 static void loop_biv_dump (const struct induction *, FILE *, int);
299 static void loop_giv_dump (const struct induction *, FILE *, int);
300 static void record_giv (const struct loop *, struct induction *, rtx, rtx,
301 rtx, rtx, rtx, rtx, int, enum g_types, int, int,
303 static void update_giv_derive (const struct loop *, rtx);
304 static void check_ext_dependent_givs (const struct loop *, struct iv_class *);
305 static int basic_induction_var (const struct loop *, rtx, enum machine_mode,
306 rtx, rtx, rtx *, rtx *, rtx **);
307 static rtx simplify_giv_expr (const struct loop *, rtx, rtx *, int *);
308 static int general_induction_var (const struct loop *loop, rtx, rtx *, rtx *,
309 rtx *, rtx *, int, int *, enum machine_mode);
310 static int consec_sets_giv (const struct loop *, int, rtx, rtx, rtx, rtx *,
311 rtx *, rtx *, rtx *);
312 static int check_dbra_loop (struct loop *, int);
313 static rtx express_from_1 (rtx, rtx, rtx);
314 static rtx combine_givs_p (struct induction *, struct induction *);
315 static int cmp_combine_givs_stats (const void *, const void *);
316 static void combine_givs (struct loop_regs *, struct iv_class *);
317 static int product_cheap_p (rtx, rtx);
318 static int maybe_eliminate_biv (const struct loop *, struct iv_class *, int,
320 static int maybe_eliminate_biv_1 (const struct loop *, rtx, rtx,
321 struct iv_class *, int, basic_block, rtx);
322 static int last_use_this_basic_block (rtx, rtx);
323 static void record_initial (rtx, rtx, void *);
324 static void update_reg_last_use (rtx, rtx);
325 static rtx next_insn_in_loop (const struct loop *, rtx);
326 static void loop_regs_scan (const struct loop *, int);
327 static int count_insns_in_loop (const struct loop *);
328 static int find_mem_in_note_1 (rtx *, void *);
329 static rtx find_mem_in_note (rtx);
330 static void load_mems (const struct loop *);
331 static int insert_loop_mem (rtx *, void *);
332 static int replace_loop_mem (rtx *, void *);
333 static void replace_loop_mems (rtx, rtx, rtx, int);
334 static int replace_loop_reg (rtx *, void *);
335 static void replace_loop_regs (rtx insn, rtx, rtx);
336 static void note_reg_stored (rtx, rtx, void *);
337 static void try_copy_prop (const struct loop *, rtx, unsigned int);
338 static void try_swap_copy_prop (const struct loop *, rtx, unsigned int);
339 static rtx check_insn_for_givs (struct loop *, rtx, int, int);
340 static rtx check_insn_for_bivs (struct loop *, rtx, int, int);
341 static rtx gen_add_mult (rtx, rtx, rtx, rtx);
342 static void loop_regs_update (const struct loop *, rtx);
343 static int iv_add_mult_cost (rtx, rtx, rtx, rtx);
345 static rtx loop_insn_emit_after (const struct loop *, basic_block, rtx, rtx);
346 static rtx loop_call_insn_emit_before (const struct loop *, basic_block,
348 static rtx loop_call_insn_hoist (const struct loop *, rtx);
349 static rtx loop_insn_sink_or_swim (const struct loop *, rtx);
351 static void loop_dump_aux (const struct loop *, FILE *, int);
352 static void loop_delete_insns (rtx, rtx);
353 static HOST_WIDE_INT remove_constant_addition (rtx *);
354 static rtx gen_load_of_final_value (rtx, rtx);
355 void debug_ivs (const struct loop *);
356 void debug_iv_class (const struct iv_class *);
357 void debug_biv (const struct induction *);
358 void debug_giv (const struct induction *);
359 void debug_loop (const struct loop *);
360 void debug_loops (const struct loops *);
362 typedef struct loop_replace_args
369 /* Nonzero iff INSN is between START and END, inclusive. */
370 #define INSN_IN_RANGE_P(INSN, START, END) \
371 (INSN_UID (INSN) < max_uid_for_loop \
372 && INSN_LUID (INSN) >= INSN_LUID (START) \
373 && INSN_LUID (INSN) <= INSN_LUID (END))
375 /* Indirect_jump_in_function is computed once per function. */
376 static int indirect_jump_in_function;
377 static int indirect_jump_in_function_p (rtx);
379 static int compute_luids (rtx, rtx, int);
381 static int biv_elimination_giv_has_0_offset (struct induction *,
382 struct induction *, rtx);
384 /* Benefit penalty, if a giv is not replaceable, i.e. must emit an insn to
385 copy the value of the strength reduced giv to its original register. */
386 static int copy_cost;
388 /* Cost of using a register, to normalize the benefits of a giv. */
389 static int reg_address_cost;
394 rtx reg = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 1);
396 reg_address_cost = address_cost (reg, SImode);
398 copy_cost = COSTS_N_INSNS (1);
401 /* Compute the mapping from uids to luids.
402 LUIDs are numbers assigned to insns, like uids,
403 except that luids increase monotonically through the code.
404 Start at insn START and stop just before END. Assign LUIDs
405 starting with PREV_LUID + 1. Return the last assigned LUID + 1. */
407 compute_luids (rtx start, rtx end, int prev_luid)
412 for (insn = start, i = prev_luid; insn != end; insn = NEXT_INSN (insn))
414 if (INSN_UID (insn) >= max_uid_for_loop)
416 /* Don't assign luids to line-number NOTEs, so that the distance in
417 luids between two insns is not affected by -g. */
418 if (GET_CODE (insn) != NOTE
419 || NOTE_LINE_NUMBER (insn) <= 0)
420 uid_luid[INSN_UID (insn)] = ++i;
422 /* Give a line number note the same luid as preceding insn. */
423 uid_luid[INSN_UID (insn)] = i;
428 /* Entry point of this file. Perform loop optimization
429 on the current function. F is the first insn of the function
430 and DUMPFILE is a stream for output of a trace of actions taken
431 (or 0 if none should be output). */
434 loop_optimize (rtx f, FILE *dumpfile, int flags)
438 struct loops loops_data;
439 struct loops *loops = &loops_data;
440 struct loop_info *loops_info;
442 loop_dump_stream = dumpfile;
444 init_recog_no_volatile ();
446 max_reg_before_loop = max_reg_num ();
447 loop_max_reg = max_reg_before_loop;
451 /* Count the number of loops. */
454 for (insn = f; insn; insn = NEXT_INSN (insn))
456 if (GET_CODE (insn) == NOTE
457 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
461 /* Don't waste time if no loops. */
462 if (max_loop_num == 0)
465 loops->num = max_loop_num;
467 /* Get size to use for tables indexed by uids.
468 Leave some space for labels allocated by find_and_verify_loops. */
469 max_uid_for_loop = get_max_uid () + 1 + max_loop_num * 32;
471 uid_luid = xcalloc (max_uid_for_loop, sizeof (int));
472 uid_loop = xcalloc (max_uid_for_loop, sizeof (struct loop *));
474 /* Allocate storage for array of loops. */
475 loops->array = xcalloc (loops->num, sizeof (struct loop));
477 /* Find and process each loop.
478 First, find them, and record them in order of their beginnings. */
479 find_and_verify_loops (f, loops);
481 /* Allocate and initialize auxiliary loop information. */
482 loops_info = xcalloc (loops->num, sizeof (struct loop_info));
483 for (i = 0; i < (int) loops->num; i++)
484 loops->array[i].aux = loops_info + i;
486 /* Now find all register lifetimes. This must be done after
487 find_and_verify_loops, because it might reorder the insns in the
489 reg_scan (f, max_reg_before_loop, 1);
491 /* This must occur after reg_scan so that registers created by gcse
492 will have entries in the register tables.
494 We could have added a call to reg_scan after gcse_main in toplev.c,
495 but moving this call to init_alias_analysis is more efficient. */
496 init_alias_analysis ();
498 /* See if we went too far. Note that get_max_uid already returns
499 one more that the maximum uid of all insn. */
500 if (get_max_uid () > max_uid_for_loop)
502 /* Now reset it to the actual size we need. See above. */
503 max_uid_for_loop = get_max_uid ();
505 /* find_and_verify_loops has already called compute_luids, but it
506 might have rearranged code afterwards, so we need to recompute
508 compute_luids (f, NULL_RTX, 0);
510 /* Don't leave gaps in uid_luid for insns that have been
511 deleted. It is possible that the first or last insn
512 using some register has been deleted by cross-jumping.
513 Make sure that uid_luid for that former insn's uid
514 points to the general area where that insn used to be. */
515 for (i = 0; i < max_uid_for_loop; i++)
517 uid_luid[0] = uid_luid[i];
518 if (uid_luid[0] != 0)
521 for (i = 0; i < max_uid_for_loop; i++)
522 if (uid_luid[i] == 0)
523 uid_luid[i] = uid_luid[i - 1];
525 /* Determine if the function has indirect jump. On some systems
526 this prevents low overhead loop instructions from being used. */
527 indirect_jump_in_function = indirect_jump_in_function_p (f);
529 /* Now scan the loops, last ones first, since this means inner ones are done
530 before outer ones. */
531 for (i = max_loop_num - 1; i >= 0; i--)
533 struct loop *loop = &loops->array[i];
535 if (! loop->invalid && loop->end)
536 scan_loop (loop, flags);
539 end_alias_analysis ();
548 /* Returns the next insn, in execution order, after INSN. START and
549 END are the NOTE_INSN_LOOP_BEG and NOTE_INSN_LOOP_END for the loop,
550 respectively. LOOP->TOP, if non-NULL, is the top of the loop in the
551 insn-stream; it is used with loops that are entered near the
555 next_insn_in_loop (const struct loop *loop, rtx insn)
557 insn = NEXT_INSN (insn);
559 if (insn == loop->end)
562 /* Go to the top of the loop, and continue there. */
569 if (insn == loop->scan_start)
576 /* Optimize one loop described by LOOP. */
578 /* ??? Could also move memory writes out of loops if the destination address
579 is invariant, the source is invariant, the memory write is not volatile,
580 and if we can prove that no read inside the loop can read this address
581 before the write occurs. If there is a read of this address after the
582 write, then we can also mark the memory read as invariant. */
585 scan_loop (struct loop *loop, int flags)
587 struct loop_info *loop_info = LOOP_INFO (loop);
588 struct loop_regs *regs = LOOP_REGS (loop);
590 rtx loop_start = loop->start;
591 rtx loop_end = loop->end;
593 /* 1 if we are scanning insns that could be executed zero times. */
595 /* 1 if we are scanning insns that might never be executed
596 due to a subroutine call which might exit before they are reached. */
598 /* Number of insns in the loop. */
601 rtx temp, update_start, update_end;
602 /* The SET from an insn, if it is the only SET in the insn. */
604 /* Chain describing insns movable in current loop. */
605 struct loop_movables *movables = LOOP_MOVABLES (loop);
606 /* Ratio of extra register life span we can justify
607 for saving an instruction. More if loop doesn't call subroutines
608 since in that case saving an insn makes more difference
609 and more registers are available. */
611 /* Nonzero if we are scanning instructions in a sub-loop. */
620 /* Determine whether this loop starts with a jump down to a test at
621 the end. This will occur for a small number of loops with a test
622 that is too complex to duplicate in front of the loop.
624 We search for the first insn or label in the loop, skipping NOTEs.
625 However, we must be careful not to skip past a NOTE_INSN_LOOP_BEG
626 (because we might have a loop executed only once that contains a
627 loop which starts with a jump to its exit test) or a NOTE_INSN_LOOP_END
628 (in case we have a degenerate loop).
630 Note that if we mistakenly think that a loop is entered at the top
631 when, in fact, it is entered at the exit test, the only effect will be
632 slightly poorer optimization. Making the opposite error can generate
633 incorrect code. Since very few loops now start with a jump to the
634 exit test, the code here to detect that case is very conservative. */
636 for (p = NEXT_INSN (loop_start);
638 && GET_CODE (p) != CODE_LABEL && ! INSN_P (p)
639 && (GET_CODE (p) != NOTE
640 || (NOTE_LINE_NUMBER (p) != NOTE_INSN_LOOP_BEG
641 && NOTE_LINE_NUMBER (p) != NOTE_INSN_LOOP_END));
645 loop->scan_start = p;
647 /* If loop end is the end of the current function, then emit a
648 NOTE_INSN_DELETED after loop_end and set loop->sink to the dummy
649 note insn. This is the position we use when sinking insns out of
651 if (NEXT_INSN (loop->end) != 0)
652 loop->sink = NEXT_INSN (loop->end);
654 loop->sink = emit_note_after (NOTE_INSN_DELETED, loop->end);
656 /* Set up variables describing this loop. */
658 threshold = (loop_info->has_call ? 1 : 2) * (1 + n_non_fixed_regs);
660 /* If loop has a jump before the first label,
661 the true entry is the target of that jump.
662 Start scan from there.
663 But record in LOOP->TOP the place where the end-test jumps
664 back to so we can scan that after the end of the loop. */
665 if (GET_CODE (p) == JUMP_INSN
666 /* Loop entry must be unconditional jump (and not a RETURN) */
667 && any_uncondjump_p (p)
668 && JUMP_LABEL (p) != 0
669 /* Check to see whether the jump actually
670 jumps out of the loop (meaning it's no loop).
671 This case can happen for things like
672 do {..} while (0). If this label was generated previously
673 by loop, we can't tell anything about it and have to reject
675 && INSN_IN_RANGE_P (JUMP_LABEL (p), loop_start, loop_end))
677 loop->top = next_label (loop->scan_start);
678 loop->scan_start = JUMP_LABEL (p);
681 /* If LOOP->SCAN_START was an insn created by loop, we don't know its luid
682 as required by loop_reg_used_before_p. So skip such loops. (This
683 test may never be true, but it's best to play it safe.)
685 Also, skip loops where we do not start scanning at a label. This
686 test also rejects loops starting with a JUMP_INSN that failed the
689 if (INSN_UID (loop->scan_start) >= max_uid_for_loop
690 || GET_CODE (loop->scan_start) != CODE_LABEL)
692 if (loop_dump_stream)
693 fprintf (loop_dump_stream, "\nLoop from %d to %d is phony.\n\n",
694 INSN_UID (loop_start), INSN_UID (loop_end));
698 /* Allocate extra space for REGs that might be created by load_mems.
699 We allocate a little extra slop as well, in the hopes that we
700 won't have to reallocate the regs array. */
701 loop_regs_scan (loop, loop_info->mems_idx + 16);
702 insn_count = count_insns_in_loop (loop);
704 if (loop_dump_stream)
706 fprintf (loop_dump_stream, "\nLoop from %d to %d: %d real insns.\n",
707 INSN_UID (loop_start), INSN_UID (loop_end), insn_count);
709 fprintf (loop_dump_stream, "Continue at insn %d.\n",
710 INSN_UID (loop->cont));
713 /* Scan through the loop finding insns that are safe to move.
714 Set REGS->ARRAY[I].SET_IN_LOOP negative for the reg I being set, so that
715 this reg will be considered invariant for subsequent insns.
716 We consider whether subsequent insns use the reg
717 in deciding whether it is worth actually moving.
719 MAYBE_NEVER is nonzero if we have passed a conditional jump insn
720 and therefore it is possible that the insns we are scanning
721 would never be executed. At such times, we must make sure
722 that it is safe to execute the insn once instead of zero times.
723 When MAYBE_NEVER is 0, all insns will be executed at least once
724 so that is not a problem. */
726 for (in_libcall = 0, p = next_insn_in_loop (loop, loop->scan_start);
728 p = next_insn_in_loop (loop, p))
730 if (in_libcall && INSN_P (p) && find_reg_note (p, REG_RETVAL, NULL_RTX))
732 if (GET_CODE (p) == INSN)
734 temp = find_reg_note (p, REG_LIBCALL, NULL_RTX);
738 && (set = single_set (p))
739 && GET_CODE (SET_DEST (set)) == REG
740 #ifdef PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
741 && SET_DEST (set) != pic_offset_table_rtx
743 && ! regs->array[REGNO (SET_DEST (set))].may_not_optimize)
749 rtx src = SET_SRC (set);
750 rtx dependencies = 0;
752 /* Figure out what to use as a source of this insn. If a
753 REG_EQUIV note is given or if a REG_EQUAL note with a
754 constant operand is specified, use it as the source and
755 mark that we should move this insn by calling
756 emit_move_insn rather that duplicating the insn.
758 Otherwise, only use the REG_EQUAL contents if a REG_RETVAL
760 temp = find_reg_note (p, REG_EQUIV, NULL_RTX);
762 src = XEXP (temp, 0), move_insn = 1;
765 temp = find_reg_note (p, REG_EQUAL, NULL_RTX);
766 if (temp && CONSTANT_P (XEXP (temp, 0)))
767 src = XEXP (temp, 0), move_insn = 1;
768 if (temp && find_reg_note (p, REG_RETVAL, NULL_RTX))
770 src = XEXP (temp, 0);
771 /* A libcall block can use regs that don't appear in
772 the equivalent expression. To move the libcall,
773 we must move those regs too. */
774 dependencies = libcall_other_reg (p, src);
778 /* For parallels, add any possible uses to the dependencies, as
779 we can't move the insn without resolving them first. */
780 if (GET_CODE (PATTERN (p)) == PARALLEL)
782 for (i = 0; i < XVECLEN (PATTERN (p), 0); i++)
784 rtx x = XVECEXP (PATTERN (p), 0, i);
785 if (GET_CODE (x) == USE)
787 = gen_rtx_EXPR_LIST (VOIDmode, XEXP (x, 0),
792 if (/* The register is used in basic blocks other
793 than the one where it is set (meaning that
794 something after this point in the loop might
795 depend on its value before the set). */
796 ! reg_in_basic_block_p (p, SET_DEST (set))
797 /* And the set is not guaranteed to be executed once
798 the loop starts, or the value before the set is
799 needed before the set occurs...
801 ??? Note we have quadratic behavior here, mitigated
802 by the fact that the previous test will often fail for
803 large loops. Rather than re-scanning the entire loop
804 each time for register usage, we should build tables
805 of the register usage and use them here instead. */
807 || loop_reg_used_before_p (loop, set, p)))
808 /* It is unsafe to move the set. However, it may be OK to
809 move the source into a new pseudo, and substitute a
810 reg-to-reg copy for the original insn.
812 This code used to consider it OK to move a set of a variable
813 which was not created by the user and not used in an exit
815 That behavior is incorrect and was removed. */
818 /* Don't try to optimize a MODE_CC set with a constant
819 source. It probably will be combined with a conditional
821 if (GET_MODE_CLASS (GET_MODE (SET_DEST (set))) == MODE_CC
824 /* Don't try to optimize a register that was made
825 by loop-optimization for an inner loop.
826 We don't know its life-span, so we can't compute
828 else if (REGNO (SET_DEST (set)) >= max_reg_before_loop)
830 /* Don't move the source and add a reg-to-reg copy:
831 - with -Os (this certainly increases size),
832 - if the mode doesn't support copy operations (obviously),
833 - if the source is already a reg (the motion will gain nothing),
834 - if the source is a legitimate constant (likewise). */
837 || ! can_copy_p (GET_MODE (SET_SRC (set)))
838 || GET_CODE (SET_SRC (set)) == REG
839 || (CONSTANT_P (SET_SRC (set))
840 && LEGITIMATE_CONSTANT_P (SET_SRC (set)))))
842 else if ((tem = loop_invariant_p (loop, src))
843 && (dependencies == 0
845 = loop_invariant_p (loop, dependencies)) != 0)
846 && (regs->array[REGNO (SET_DEST (set))].set_in_loop == 1
848 = consec_sets_invariant_p
849 (loop, SET_DEST (set),
850 regs->array[REGNO (SET_DEST (set))].set_in_loop,
852 /* If the insn can cause a trap (such as divide by zero),
853 can't move it unless it's guaranteed to be executed
854 once loop is entered. Even a function call might
855 prevent the trap insn from being reached
856 (since it might exit!) */
857 && ! ((maybe_never || call_passed)
858 && may_trap_p (src)))
861 int regno = REGNO (SET_DEST (set));
863 /* A potential lossage is where we have a case where two insns
864 can be combined as long as they are both in the loop, but
865 we move one of them outside the loop. For large loops,
866 this can lose. The most common case of this is the address
867 of a function being called.
869 Therefore, if this register is marked as being used
870 exactly once if we are in a loop with calls
871 (a "large loop"), see if we can replace the usage of
872 this register with the source of this SET. If we can,
875 Don't do this if P has a REG_RETVAL note or if we have
876 SMALL_REGISTER_CLASSES and SET_SRC is a hard register. */
878 if (loop_info->has_call
879 && regs->array[regno].single_usage != 0
880 && regs->array[regno].single_usage != const0_rtx
881 && REGNO_FIRST_UID (regno) == INSN_UID (p)
882 && (REGNO_LAST_UID (regno)
883 == INSN_UID (regs->array[regno].single_usage))
884 && regs->array[regno].set_in_loop == 1
885 && GET_CODE (SET_SRC (set)) != ASM_OPERANDS
886 && ! side_effects_p (SET_SRC (set))
887 && ! find_reg_note (p, REG_RETVAL, NULL_RTX)
888 && (! SMALL_REGISTER_CLASSES
889 || (! (GET_CODE (SET_SRC (set)) == REG
890 && (REGNO (SET_SRC (set))
891 < FIRST_PSEUDO_REGISTER))))
892 /* This test is not redundant; SET_SRC (set) might be
893 a call-clobbered register and the life of REGNO
894 might span a call. */
895 && ! modified_between_p (SET_SRC (set), p,
896 regs->array[regno].single_usage)
897 && no_labels_between_p (p,
898 regs->array[regno].single_usage)
899 && validate_replace_rtx (SET_DEST (set), SET_SRC (set),
900 regs->array[regno].single_usage))
902 /* Replace any usage in a REG_EQUAL note. Must copy
903 the new source, so that we don't get rtx sharing
904 between the SET_SOURCE and REG_NOTES of insn p. */
905 REG_NOTES (regs->array[regno].single_usage)
907 (REG_NOTES (regs->array[regno].single_usage),
908 SET_DEST (set), copy_rtx (SET_SRC (set))));
911 for (i = 0; i < LOOP_REGNO_NREGS (regno, SET_DEST (set));
913 regs->array[regno+i].set_in_loop = 0;
917 m = xmalloc (sizeof (struct movable));
921 m->dependencies = dependencies;
922 m->set_dest = SET_DEST (set);
925 = regs->array[REGNO (SET_DEST (set))].set_in_loop - 1;
929 m->move_insn = move_insn;
930 m->move_insn_first = 0;
931 m->insert_temp = insert_temp;
932 m->is_equiv = (find_reg_note (p, REG_EQUIV, NULL_RTX) != 0);
933 m->savemode = VOIDmode;
935 /* Set M->cond if either loop_invariant_p
936 or consec_sets_invariant_p returned 2
937 (only conditionally invariant). */
938 m->cond = ((tem | tem1 | tem2) > 1);
939 m->global = LOOP_REG_GLOBAL_P (loop, regno);
941 m->lifetime = LOOP_REG_LIFETIME (loop, regno);
942 m->savings = regs->array[regno].n_times_set;
943 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
944 m->savings += libcall_benefit (p);
945 for (i = 0; i < LOOP_REGNO_NREGS (regno, SET_DEST (set)); i++)
946 regs->array[regno+i].set_in_loop = move_insn ? -2 : -1;
947 /* Add M to the end of the chain MOVABLES. */
948 loop_movables_add (movables, m);
952 /* It is possible for the first instruction to have a
953 REG_EQUAL note but a non-invariant SET_SRC, so we must
954 remember the status of the first instruction in case
955 the last instruction doesn't have a REG_EQUAL note. */
956 m->move_insn_first = m->move_insn;
958 /* Skip this insn, not checking REG_LIBCALL notes. */
959 p = next_nonnote_insn (p);
960 /* Skip the consecutive insns, if there are any. */
961 p = skip_consec_insns (p, m->consec);
962 /* Back up to the last insn of the consecutive group. */
963 p = prev_nonnote_insn (p);
965 /* We must now reset m->move_insn, m->is_equiv, and
966 possibly m->set_src to correspond to the effects of
968 temp = find_reg_note (p, REG_EQUIV, NULL_RTX);
970 m->set_src = XEXP (temp, 0), m->move_insn = 1;
973 temp = find_reg_note (p, REG_EQUAL, NULL_RTX);
974 if (temp && CONSTANT_P (XEXP (temp, 0)))
975 m->set_src = XEXP (temp, 0), m->move_insn = 1;
981 = (find_reg_note (p, REG_EQUIV, NULL_RTX) != 0);
984 /* If this register is always set within a STRICT_LOW_PART
985 or set to zero, then its high bytes are constant.
986 So clear them outside the loop and within the loop
987 just load the low bytes.
988 We must check that the machine has an instruction to do so.
989 Also, if the value loaded into the register
990 depends on the same register, this cannot be done. */
991 else if (SET_SRC (set) == const0_rtx
992 && GET_CODE (NEXT_INSN (p)) == INSN
993 && (set1 = single_set (NEXT_INSN (p)))
994 && GET_CODE (set1) == SET
995 && (GET_CODE (SET_DEST (set1)) == STRICT_LOW_PART)
996 && (GET_CODE (XEXP (SET_DEST (set1), 0)) == SUBREG)
997 && (SUBREG_REG (XEXP (SET_DEST (set1), 0))
999 && !reg_mentioned_p (SET_DEST (set), SET_SRC (set1)))
1001 int regno = REGNO (SET_DEST (set));
1002 if (regs->array[regno].set_in_loop == 2)
1005 m = xmalloc (sizeof (struct movable));
1008 m->set_dest = SET_DEST (set);
1009 m->dependencies = 0;
1015 m->move_insn_first = 0;
1016 m->insert_temp = insert_temp;
1018 /* If the insn may not be executed on some cycles,
1019 we can't clear the whole reg; clear just high part.
1020 Not even if the reg is used only within this loop.
1027 Clearing x before the inner loop could clobber a value
1028 being saved from the last time around the outer loop.
1029 However, if the reg is not used outside this loop
1030 and all uses of the register are in the same
1031 basic block as the store, there is no problem.
1033 If this insn was made by loop, we don't know its
1034 INSN_LUID and hence must make a conservative
1036 m->global = (INSN_UID (p) >= max_uid_for_loop
1037 || LOOP_REG_GLOBAL_P (loop, regno)
1038 || (labels_in_range_p
1039 (p, REGNO_FIRST_LUID (regno))));
1040 if (maybe_never && m->global)
1041 m->savemode = GET_MODE (SET_SRC (set1));
1043 m->savemode = VOIDmode;
1047 m->lifetime = LOOP_REG_LIFETIME (loop, regno);
1050 i < LOOP_REGNO_NREGS (regno, SET_DEST (set));
1052 regs->array[regno+i].set_in_loop = -1;
1053 /* Add M to the end of the chain MOVABLES. */
1054 loop_movables_add (movables, m);
1059 /* Past a call insn, we get to insns which might not be executed
1060 because the call might exit. This matters for insns that trap.
1061 Constant and pure call insns always return, so they don't count. */
1062 else if (GET_CODE (p) == CALL_INSN && ! CONST_OR_PURE_CALL_P (p))
1064 /* Past a label or a jump, we get to insns for which we
1065 can't count on whether or how many times they will be
1066 executed during each iteration. Therefore, we can
1067 only move out sets of trivial variables
1068 (those not used after the loop). */
1069 /* Similar code appears twice in strength_reduce. */
1070 else if ((GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN)
1071 /* If we enter the loop in the middle, and scan around to the
1072 beginning, don't set maybe_never for that. This must be an
1073 unconditional jump, otherwise the code at the top of the
1074 loop might never be executed. Unconditional jumps are
1075 followed by a barrier then the loop_end. */
1076 && ! (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p) == loop->top
1077 && NEXT_INSN (NEXT_INSN (p)) == loop_end
1078 && any_uncondjump_p (p)))
1080 else if (GET_CODE (p) == NOTE)
1082 /* At the virtual top of a converted loop, insns are again known to
1083 be executed: logically, the loop begins here even though the exit
1084 code has been duplicated. */
1085 if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP && loop_depth == 0)
1086 maybe_never = call_passed = 0;
1087 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
1089 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
1094 /* If one movable subsumes another, ignore that other. */
1096 ignore_some_movables (movables);
1098 /* For each movable insn, see if the reg that it loads
1099 leads when it dies right into another conditionally movable insn.
1100 If so, record that the second insn "forces" the first one,
1101 since the second can be moved only if the first is. */
1103 force_movables (movables);
1105 /* See if there are multiple movable insns that load the same value.
1106 If there are, make all but the first point at the first one
1107 through the `match' field, and add the priorities of them
1108 all together as the priority of the first. */
1110 combine_movables (movables, regs);
1112 /* Now consider each movable insn to decide whether it is worth moving.
1113 Store 0 in regs->array[I].set_in_loop for each reg I that is moved.
1115 For machines with few registers this increases code size, so do not
1116 move moveables when optimizing for code size on such machines.
1117 (The 18 below is the value for i386.) */
1120 || (reg_class_size[GENERAL_REGS] > 18 && !loop_info->has_call))
1122 move_movables (loop, movables, threshold, insn_count);
1124 /* Recalculate regs->array if move_movables has created new
1126 if (max_reg_num () > regs->num)
1128 loop_regs_scan (loop, 0);
1129 for (update_start = loop_start;
1130 PREV_INSN (update_start)
1131 && GET_CODE (PREV_INSN (update_start)) != CODE_LABEL;
1132 update_start = PREV_INSN (update_start))
1134 update_end = NEXT_INSN (loop_end);
1136 reg_scan_update (update_start, update_end, loop_max_reg);
1137 loop_max_reg = max_reg_num ();
1141 /* Now candidates that still are negative are those not moved.
1142 Change regs->array[I].set_in_loop to indicate that those are not actually
1144 for (i = 0; i < regs->num; i++)
1145 if (regs->array[i].set_in_loop < 0)
1146 regs->array[i].set_in_loop = regs->array[i].n_times_set;
1148 /* Now that we've moved some things out of the loop, we might be able to
1149 hoist even more memory references. */
1152 /* Recalculate regs->array if load_mems has created new registers. */
1153 if (max_reg_num () > regs->num)
1154 loop_regs_scan (loop, 0);
1156 for (update_start = loop_start;
1157 PREV_INSN (update_start)
1158 && GET_CODE (PREV_INSN (update_start)) != CODE_LABEL;
1159 update_start = PREV_INSN (update_start))
1161 update_end = NEXT_INSN (loop_end);
1163 reg_scan_update (update_start, update_end, loop_max_reg);
1164 loop_max_reg = max_reg_num ();
1166 if (flag_strength_reduce)
1168 if (update_end && GET_CODE (update_end) == CODE_LABEL)
1169 /* Ensure our label doesn't go away. */
1170 LABEL_NUSES (update_end)++;
1172 strength_reduce (loop, flags);
1174 reg_scan_update (update_start, update_end, loop_max_reg);
1175 loop_max_reg = max_reg_num ();
1177 if (update_end && GET_CODE (update_end) == CODE_LABEL
1178 && --LABEL_NUSES (update_end) == 0)
1179 delete_related_insns (update_end);
1183 /* The movable information is required for strength reduction. */
1184 loop_movables_free (movables);
1191 /* Add elements to *OUTPUT to record all the pseudo-regs
1192 mentioned in IN_THIS but not mentioned in NOT_IN_THIS. */
1195 record_excess_regs (rtx in_this, rtx not_in_this, rtx *output)
1201 code = GET_CODE (in_this);
1215 if (REGNO (in_this) >= FIRST_PSEUDO_REGISTER
1216 && ! reg_mentioned_p (in_this, not_in_this))
1217 *output = gen_rtx_EXPR_LIST (VOIDmode, in_this, *output);
1224 fmt = GET_RTX_FORMAT (code);
1225 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1232 for (j = 0; j < XVECLEN (in_this, i); j++)
1233 record_excess_regs (XVECEXP (in_this, i, j), not_in_this, output);
1237 record_excess_regs (XEXP (in_this, i), not_in_this, output);
1243 /* Check what regs are referred to in the libcall block ending with INSN,
1244 aside from those mentioned in the equivalent value.
1245 If there are none, return 0.
1246 If there are one or more, return an EXPR_LIST containing all of them. */
1249 libcall_other_reg (rtx insn, rtx equiv)
1251 rtx note = find_reg_note (insn, REG_RETVAL, NULL_RTX);
1252 rtx p = XEXP (note, 0);
1255 /* First, find all the regs used in the libcall block
1256 that are not mentioned as inputs to the result. */
1260 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
1261 || GET_CODE (p) == CALL_INSN)
1262 record_excess_regs (PATTERN (p), equiv, &output);
1269 /* Return 1 if all uses of REG
1270 are between INSN and the end of the basic block. */
1273 reg_in_basic_block_p (rtx insn, rtx reg)
1275 int regno = REGNO (reg);
1278 if (REGNO_FIRST_UID (regno) != INSN_UID (insn))
1281 /* Search this basic block for the already recorded last use of the reg. */
1282 for (p = insn; p; p = NEXT_INSN (p))
1284 switch (GET_CODE (p))
1291 /* Ordinary insn: if this is the last use, we win. */
1292 if (REGNO_LAST_UID (regno) == INSN_UID (p))
1297 /* Jump insn: if this is the last use, we win. */
1298 if (REGNO_LAST_UID (regno) == INSN_UID (p))
1300 /* Otherwise, it's the end of the basic block, so we lose. */
1305 /* It's the end of the basic block, so we lose. */
1313 /* The "last use" that was recorded can't be found after the first
1314 use. This can happen when the last use was deleted while
1315 processing an inner loop, this inner loop was then completely
1316 unrolled, and the outer loop is always exited after the inner loop,
1317 so that everything after the first use becomes a single basic block. */
1321 /* Compute the benefit of eliminating the insns in the block whose
1322 last insn is LAST. This may be a group of insns used to compute a
1323 value directly or can contain a library call. */
1326 libcall_benefit (rtx last)
1331 for (insn = XEXP (find_reg_note (last, REG_RETVAL, NULL_RTX), 0);
1332 insn != last; insn = NEXT_INSN (insn))
1334 if (GET_CODE (insn) == CALL_INSN)
1335 benefit += 10; /* Assume at least this many insns in a library
1337 else if (GET_CODE (insn) == INSN
1338 && GET_CODE (PATTERN (insn)) != USE
1339 && GET_CODE (PATTERN (insn)) != CLOBBER)
1346 /* Skip COUNT insns from INSN, counting library calls as 1 insn. */
1349 skip_consec_insns (rtx insn, int count)
1351 for (; count > 0; count--)
1355 /* If first insn of libcall sequence, skip to end. */
1356 /* Do this at start of loop, since INSN is guaranteed to
1358 if (GET_CODE (insn) != NOTE
1359 && (temp = find_reg_note (insn, REG_LIBCALL, NULL_RTX)))
1360 insn = XEXP (temp, 0);
1363 insn = NEXT_INSN (insn);
1364 while (GET_CODE (insn) == NOTE);
1370 /* Ignore any movable whose insn falls within a libcall
1371 which is part of another movable.
1372 We make use of the fact that the movable for the libcall value
1373 was made later and so appears later on the chain. */
1376 ignore_some_movables (struct loop_movables *movables)
1378 struct movable *m, *m1;
1380 for (m = movables->head; m; m = m->next)
1382 /* Is this a movable for the value of a libcall? */
1383 rtx note = find_reg_note (m->insn, REG_RETVAL, NULL_RTX);
1387 /* Check for earlier movables inside that range,
1388 and mark them invalid. We cannot use LUIDs here because
1389 insns created by loop.c for prior loops don't have LUIDs.
1390 Rather than reject all such insns from movables, we just
1391 explicitly check each insn in the libcall (since invariant
1392 libcalls aren't that common). */
1393 for (insn = XEXP (note, 0); insn != m->insn; insn = NEXT_INSN (insn))
1394 for (m1 = movables->head; m1 != m; m1 = m1->next)
1395 if (m1->insn == insn)
1401 /* For each movable insn, see if the reg that it loads
1402 leads when it dies right into another conditionally movable insn.
1403 If so, record that the second insn "forces" the first one,
1404 since the second can be moved only if the first is. */
1407 force_movables (struct loop_movables *movables)
1409 struct movable *m, *m1;
1411 for (m1 = movables->head; m1; m1 = m1->next)
1412 /* Omit this if moving just the (SET (REG) 0) of a zero-extend. */
1413 if (!m1->partial && !m1->done)
1415 int regno = m1->regno;
1416 for (m = m1->next; m; m = m->next)
1417 /* ??? Could this be a bug? What if CSE caused the
1418 register of M1 to be used after this insn?
1419 Since CSE does not update regno_last_uid,
1420 this insn M->insn might not be where it dies.
1421 But very likely this doesn't matter; what matters is
1422 that M's reg is computed from M1's reg. */
1423 if (INSN_UID (m->insn) == REGNO_LAST_UID (regno)
1426 if (m != 0 && m->set_src == m1->set_dest
1427 /* If m->consec, m->set_src isn't valid. */
1431 /* Increase the priority of the moving the first insn
1432 since it permits the second to be moved as well. */
1436 m1->lifetime += m->lifetime;
1437 m1->savings += m->savings;
1442 /* Find invariant expressions that are equal and can be combined into
1446 combine_movables (struct loop_movables *movables, struct loop_regs *regs)
1449 char *matched_regs = xmalloc (regs->num);
1450 enum machine_mode mode;
1452 /* Regs that are set more than once are not allowed to match
1453 or be matched. I'm no longer sure why not. */
1454 /* Only pseudo registers are allowed to match or be matched,
1455 since move_movables does not validate the change. */
1456 /* Perhaps testing m->consec_sets would be more appropriate here? */
1458 for (m = movables->head; m; m = m->next)
1459 if (m->match == 0 && regs->array[m->regno].n_times_set == 1
1460 && m->regno >= FIRST_PSEUDO_REGISTER
1465 int regno = m->regno;
1467 memset (matched_regs, 0, regs->num);
1468 matched_regs[regno] = 1;
1470 /* We want later insns to match the first one. Don't make the first
1471 one match any later ones. So start this loop at m->next. */
1472 for (m1 = m->next; m1; m1 = m1->next)
1473 if (m != m1 && m1->match == 0
1475 && regs->array[m1->regno].n_times_set == 1
1476 && m1->regno >= FIRST_PSEUDO_REGISTER
1477 /* A reg used outside the loop mustn't be eliminated. */
1479 /* A reg used for zero-extending mustn't be eliminated. */
1481 && (matched_regs[m1->regno]
1484 /* Can combine regs with different modes loaded from the
1485 same constant only if the modes are the same or
1486 if both are integer modes with M wider or the same
1487 width as M1. The check for integer is redundant, but
1488 safe, since the only case of differing destination
1489 modes with equal sources is when both sources are
1490 VOIDmode, i.e., CONST_INT. */
1491 (GET_MODE (m->set_dest) == GET_MODE (m1->set_dest)
1492 || (GET_MODE_CLASS (GET_MODE (m->set_dest)) == MODE_INT
1493 && GET_MODE_CLASS (GET_MODE (m1->set_dest)) == MODE_INT
1494 && (GET_MODE_BITSIZE (GET_MODE (m->set_dest))
1495 >= GET_MODE_BITSIZE (GET_MODE (m1->set_dest)))))
1496 /* See if the source of M1 says it matches M. */
1497 && ((GET_CODE (m1->set_src) == REG
1498 && matched_regs[REGNO (m1->set_src)])
1499 || rtx_equal_for_loop_p (m->set_src, m1->set_src,
1501 && ((m->dependencies == m1->dependencies)
1502 || rtx_equal_p (m->dependencies, m1->dependencies)))
1504 m->lifetime += m1->lifetime;
1505 m->savings += m1->savings;
1508 matched_regs[m1->regno] = 1;
1512 /* Now combine the regs used for zero-extension.
1513 This can be done for those not marked `global'
1514 provided their lives don't overlap. */
1516 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
1517 mode = GET_MODE_WIDER_MODE (mode))
1519 struct movable *m0 = 0;
1521 /* Combine all the registers for extension from mode MODE.
1522 Don't combine any that are used outside this loop. */
1523 for (m = movables->head; m; m = m->next)
1524 if (m->partial && ! m->global
1525 && mode == GET_MODE (SET_SRC (PATTERN (NEXT_INSN (m->insn)))))
1529 int first = REGNO_FIRST_LUID (m->regno);
1530 int last = REGNO_LAST_LUID (m->regno);
1534 /* First one: don't check for overlap, just record it. */
1539 /* Make sure they extend to the same mode.
1540 (Almost always true.) */
1541 if (GET_MODE (m->set_dest) != GET_MODE (m0->set_dest))
1544 /* We already have one: check for overlap with those
1545 already combined together. */
1546 for (m1 = movables->head; m1 != m; m1 = m1->next)
1547 if (m1 == m0 || (m1->partial && m1->match == m0))
1548 if (! (REGNO_FIRST_LUID (m1->regno) > last
1549 || REGNO_LAST_LUID (m1->regno) < first))
1552 /* No overlap: we can combine this with the others. */
1553 m0->lifetime += m->lifetime;
1554 m0->savings += m->savings;
1564 free (matched_regs);
1567 /* Returns the number of movable instructions in LOOP that were not
1568 moved outside the loop. */
1571 num_unmoved_movables (const struct loop *loop)
1576 for (m = LOOP_MOVABLES (loop)->head; m; m = m->next)
1584 /* Return 1 if regs X and Y will become the same if moved. */
1587 regs_match_p (rtx x, rtx y, struct loop_movables *movables)
1589 unsigned int xn = REGNO (x);
1590 unsigned int yn = REGNO (y);
1591 struct movable *mx, *my;
1593 for (mx = movables->head; mx; mx = mx->next)
1594 if (mx->regno == xn)
1597 for (my = movables->head; my; my = my->next)
1598 if (my->regno == yn)
1602 && ((mx->match == my->match && mx->match != 0)
1604 || mx == my->match));
1607 /* Return 1 if X and Y are identical-looking rtx's.
1608 This is the Lisp function EQUAL for rtx arguments.
1610 If two registers are matching movables or a movable register and an
1611 equivalent constant, consider them equal. */
1614 rtx_equal_for_loop_p (rtx x, rtx y, struct loop_movables *movables,
1615 struct loop_regs *regs)
1625 if (x == 0 || y == 0)
1628 code = GET_CODE (x);
1630 /* If we have a register and a constant, they may sometimes be
1632 if (GET_CODE (x) == REG && regs->array[REGNO (x)].set_in_loop == -2
1635 for (m = movables->head; m; m = m->next)
1636 if (m->move_insn && m->regno == REGNO (x)
1637 && rtx_equal_p (m->set_src, y))
1640 else if (GET_CODE (y) == REG && regs->array[REGNO (y)].set_in_loop == -2
1643 for (m = movables->head; m; m = m->next)
1644 if (m->move_insn && m->regno == REGNO (y)
1645 && rtx_equal_p (m->set_src, x))
1649 /* Otherwise, rtx's of different codes cannot be equal. */
1650 if (code != GET_CODE (y))
1653 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
1654 (REG:SI x) and (REG:HI x) are NOT equivalent. */
1656 if (GET_MODE (x) != GET_MODE (y))
1659 /* These three types of rtx's can be compared nonrecursively. */
1661 return (REGNO (x) == REGNO (y) || regs_match_p (x, y, movables));
1663 if (code == LABEL_REF)
1664 return XEXP (x, 0) == XEXP (y, 0);
1665 if (code == SYMBOL_REF)
1666 return XSTR (x, 0) == XSTR (y, 0);
1668 /* Compare the elements. If any pair of corresponding elements
1669 fail to match, return 0 for the whole things. */
1671 fmt = GET_RTX_FORMAT (code);
1672 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1677 if (XWINT (x, i) != XWINT (y, i))
1682 if (XINT (x, i) != XINT (y, i))
1687 /* Two vectors must have the same length. */
1688 if (XVECLEN (x, i) != XVECLEN (y, i))
1691 /* And the corresponding elements must match. */
1692 for (j = 0; j < XVECLEN (x, i); j++)
1693 if (rtx_equal_for_loop_p (XVECEXP (x, i, j), XVECEXP (y, i, j),
1694 movables, regs) == 0)
1699 if (rtx_equal_for_loop_p (XEXP (x, i), XEXP (y, i), movables, regs)
1705 if (strcmp (XSTR (x, i), XSTR (y, i)))
1710 /* These are just backpointers, so they don't matter. */
1716 /* It is believed that rtx's at this level will never
1717 contain anything but integers and other rtx's,
1718 except for within LABEL_REFs and SYMBOL_REFs. */
1726 /* If X contains any LABEL_REF's, add REG_LABEL notes for them to all
1727 insns in INSNS which use the reference. LABEL_NUSES for CODE_LABEL
1728 references is incremented once for each added note. */
1731 add_label_notes (rtx x, rtx insns)
1733 enum rtx_code code = GET_CODE (x);
1738 if (code == LABEL_REF && !LABEL_REF_NONLOCAL_P (x))
1740 /* This code used to ignore labels that referred to dispatch tables to
1741 avoid flow generating (slightly) worse code.
1743 We no longer ignore such label references (see LABEL_REF handling in
1744 mark_jump_label for additional information). */
1745 for (insn = insns; insn; insn = NEXT_INSN (insn))
1746 if (reg_mentioned_p (XEXP (x, 0), insn))
1748 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_LABEL, XEXP (x, 0),
1750 if (LABEL_P (XEXP (x, 0)))
1751 LABEL_NUSES (XEXP (x, 0))++;
1755 fmt = GET_RTX_FORMAT (code);
1756 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1759 add_label_notes (XEXP (x, i), insns);
1760 else if (fmt[i] == 'E')
1761 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1762 add_label_notes (XVECEXP (x, i, j), insns);
1766 /* Scan MOVABLES, and move the insns that deserve to be moved.
1767 If two matching movables are combined, replace one reg with the
1768 other throughout. */
1771 move_movables (struct loop *loop, struct loop_movables *movables,
1772 int threshold, int insn_count)
1774 struct loop_regs *regs = LOOP_REGS (loop);
1775 int nregs = regs->num;
1779 rtx loop_start = loop->start;
1780 rtx loop_end = loop->end;
1781 /* Map of pseudo-register replacements to handle combining
1782 when we move several insns that load the same value
1783 into different pseudo-registers. */
1784 rtx *reg_map = xcalloc (nregs, sizeof (rtx));
1785 char *already_moved = xcalloc (nregs, sizeof (char));
1787 for (m = movables->head; m; m = m->next)
1789 /* Describe this movable insn. */
1791 if (loop_dump_stream)
1793 fprintf (loop_dump_stream, "Insn %d: regno %d (life %d), ",
1794 INSN_UID (m->insn), m->regno, m->lifetime);
1796 fprintf (loop_dump_stream, "consec %d, ", m->consec);
1798 fprintf (loop_dump_stream, "cond ");
1800 fprintf (loop_dump_stream, "force ");
1802 fprintf (loop_dump_stream, "global ");
1804 fprintf (loop_dump_stream, "done ");
1806 fprintf (loop_dump_stream, "move-insn ");
1808 fprintf (loop_dump_stream, "matches %d ",
1809 INSN_UID (m->match->insn));
1811 fprintf (loop_dump_stream, "forces %d ",
1812 INSN_UID (m->forces->insn));
1815 /* Ignore the insn if it's already done (it matched something else).
1816 Otherwise, see if it is now safe to move. */
1820 || (1 == loop_invariant_p (loop, m->set_src)
1821 && (m->dependencies == 0
1822 || 1 == loop_invariant_p (loop, m->dependencies))
1824 || 1 == consec_sets_invariant_p (loop, m->set_dest,
1827 && (! m->forces || m->forces->done))
1831 int savings = m->savings;
1833 /* We have an insn that is safe to move.
1834 Compute its desirability. */
1839 if (loop_dump_stream)
1840 fprintf (loop_dump_stream, "savings %d ", savings);
1842 if (regs->array[regno].moved_once && loop_dump_stream)
1843 fprintf (loop_dump_stream, "halved since already moved ");
1845 /* An insn MUST be moved if we already moved something else
1846 which is safe only if this one is moved too: that is,
1847 if already_moved[REGNO] is nonzero. */
1849 /* An insn is desirable to move if the new lifetime of the
1850 register is no more than THRESHOLD times the old lifetime.
1851 If it's not desirable, it means the loop is so big
1852 that moving won't speed things up much,
1853 and it is liable to make register usage worse. */
1855 /* It is also desirable to move if it can be moved at no
1856 extra cost because something else was already moved. */
1858 if (already_moved[regno]
1859 || flag_move_all_movables
1860 || (threshold * savings * m->lifetime) >=
1861 (regs->array[regno].moved_once ? insn_count * 2 : insn_count)
1862 || (m->forces && m->forces->done
1863 && regs->array[m->forces->regno].n_times_set == 1))
1867 rtx first = NULL_RTX;
1868 rtx newreg = NULL_RTX;
1871 newreg = gen_reg_rtx (GET_MODE (m->set_dest));
1873 /* Now move the insns that set the reg. */
1875 if (m->partial && m->match)
1879 /* Find the end of this chain of matching regs.
1880 Thus, we load each reg in the chain from that one reg.
1881 And that reg is loaded with 0 directly,
1882 since it has ->match == 0. */
1883 for (m1 = m; m1->match; m1 = m1->match);
1884 newpat = gen_move_insn (SET_DEST (PATTERN (m->insn)),
1885 SET_DEST (PATTERN (m1->insn)));
1886 i1 = loop_insn_hoist (loop, newpat);
1888 /* Mark the moved, invariant reg as being allowed to
1889 share a hard reg with the other matching invariant. */
1890 REG_NOTES (i1) = REG_NOTES (m->insn);
1891 r1 = SET_DEST (PATTERN (m->insn));
1892 r2 = SET_DEST (PATTERN (m1->insn));
1894 = gen_rtx_EXPR_LIST (VOIDmode, r1,
1895 gen_rtx_EXPR_LIST (VOIDmode, r2,
1897 delete_insn (m->insn);
1902 if (loop_dump_stream)
1903 fprintf (loop_dump_stream, " moved to %d", INSN_UID (i1));
1905 /* If we are to re-generate the item being moved with a
1906 new move insn, first delete what we have and then emit
1907 the move insn before the loop. */
1908 else if (m->move_insn)
1912 for (count = m->consec; count >= 0; count--)
1914 /* If this is the first insn of a library call sequence,
1915 something is very wrong. */
1916 if (GET_CODE (p) != NOTE
1917 && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
1920 /* If this is the last insn of a libcall sequence, then
1921 delete every insn in the sequence except the last.
1922 The last insn is handled in the normal manner. */
1923 if (GET_CODE (p) != NOTE
1924 && (temp = find_reg_note (p, REG_RETVAL, NULL_RTX)))
1926 temp = XEXP (temp, 0);
1928 temp = delete_insn (temp);
1932 p = delete_insn (p);
1934 /* simplify_giv_expr expects that it can walk the insns
1935 at m->insn forwards and see this old sequence we are
1936 tossing here. delete_insn does preserve the next
1937 pointers, but when we skip over a NOTE we must fix
1938 it up. Otherwise that code walks into the non-deleted
1940 while (p && GET_CODE (p) == NOTE)
1941 p = NEXT_INSN (temp) = NEXT_INSN (p);
1945 /* Replace the original insn with a move from
1946 our newly created temp. */
1948 emit_move_insn (m->set_dest, newreg);
1951 emit_insn_before (seq, p);
1956 emit_move_insn (m->insert_temp ? newreg : m->set_dest,
1961 add_label_notes (m->set_src, seq);
1963 i1 = loop_insn_hoist (loop, seq);
1964 if (! find_reg_note (i1, REG_EQUAL, NULL_RTX))
1965 set_unique_reg_note (i1,
1966 m->is_equiv ? REG_EQUIV : REG_EQUAL,
1969 if (loop_dump_stream)
1970 fprintf (loop_dump_stream, " moved to %d", INSN_UID (i1));
1972 /* The more regs we move, the less we like moving them. */
1977 for (count = m->consec; count >= 0; count--)
1981 /* If first insn of libcall sequence, skip to end. */
1982 /* Do this at start of loop, since p is guaranteed to
1984 if (GET_CODE (p) != NOTE
1985 && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
1988 /* If last insn of libcall sequence, move all
1989 insns except the last before the loop. The last
1990 insn is handled in the normal manner. */
1991 if (GET_CODE (p) != NOTE
1992 && (temp = find_reg_note (p, REG_RETVAL, NULL_RTX)))
1996 rtx fn_address_insn = 0;
1999 for (temp = XEXP (temp, 0); temp != p;
2000 temp = NEXT_INSN (temp))
2006 if (GET_CODE (temp) == NOTE)
2009 body = PATTERN (temp);
2011 /* Find the next insn after TEMP,
2012 not counting USE or NOTE insns. */
2013 for (next = NEXT_INSN (temp); next != p;
2014 next = NEXT_INSN (next))
2015 if (! (GET_CODE (next) == INSN
2016 && GET_CODE (PATTERN (next)) == USE)
2017 && GET_CODE (next) != NOTE)
2020 /* If that is the call, this may be the insn
2021 that loads the function address.
2023 Extract the function address from the insn
2024 that loads it into a register.
2025 If this insn was cse'd, we get incorrect code.
2027 So emit a new move insn that copies the
2028 function address into the register that the
2029 call insn will use. flow.c will delete any
2030 redundant stores that we have created. */
2031 if (GET_CODE (next) == CALL_INSN
2032 && GET_CODE (body) == SET
2033 && GET_CODE (SET_DEST (body)) == REG
2034 && (n = find_reg_note (temp, REG_EQUAL,
2037 fn_reg = SET_SRC (body);
2038 if (GET_CODE (fn_reg) != REG)
2039 fn_reg = SET_DEST (body);
2040 fn_address = XEXP (n, 0);
2041 fn_address_insn = temp;
2043 /* We have the call insn.
2044 If it uses the register we suspect it might,
2045 load it with the correct address directly. */
2046 if (GET_CODE (temp) == CALL_INSN
2048 && reg_referenced_p (fn_reg, body))
2049 loop_insn_emit_after (loop, 0, fn_address_insn,
2051 (fn_reg, fn_address));
2053 if (GET_CODE (temp) == CALL_INSN)
2055 i1 = loop_call_insn_hoist (loop, body);
2056 /* Because the USAGE information potentially
2057 contains objects other than hard registers
2058 we need to copy it. */
2059 if (CALL_INSN_FUNCTION_USAGE (temp))
2060 CALL_INSN_FUNCTION_USAGE (i1)
2061 = copy_rtx (CALL_INSN_FUNCTION_USAGE (temp));
2064 i1 = loop_insn_hoist (loop, body);
2067 if (temp == fn_address_insn)
2068 fn_address_insn = i1;
2069 REG_NOTES (i1) = REG_NOTES (temp);
2070 REG_NOTES (temp) = NULL;
2076 if (m->savemode != VOIDmode)
2078 /* P sets REG to zero; but we should clear only
2079 the bits that are not covered by the mode
2081 rtx reg = m->set_dest;
2086 tem = expand_simple_binop
2087 (GET_MODE (reg), AND, reg,
2088 GEN_INT ((((HOST_WIDE_INT) 1
2089 << GET_MODE_BITSIZE (m->savemode)))
2091 reg, 1, OPTAB_LIB_WIDEN);
2095 emit_move_insn (reg, tem);
2096 sequence = get_insns ();
2098 i1 = loop_insn_hoist (loop, sequence);
2100 else if (GET_CODE (p) == CALL_INSN)
2102 i1 = loop_call_insn_hoist (loop, PATTERN (p));
2103 /* Because the USAGE information potentially
2104 contains objects other than hard registers
2105 we need to copy it. */
2106 if (CALL_INSN_FUNCTION_USAGE (p))
2107 CALL_INSN_FUNCTION_USAGE (i1)
2108 = copy_rtx (CALL_INSN_FUNCTION_USAGE (p));
2110 else if (count == m->consec && m->move_insn_first)
2113 /* The SET_SRC might not be invariant, so we must
2114 use the REG_EQUAL note. */
2116 emit_move_insn (m->set_dest, m->set_src);
2120 add_label_notes (m->set_src, seq);
2122 i1 = loop_insn_hoist (loop, seq);
2123 if (! find_reg_note (i1, REG_EQUAL, NULL_RTX))
2124 set_unique_reg_note (i1, m->is_equiv ? REG_EQUIV
2125 : REG_EQUAL, m->set_src);
2127 else if (m->insert_temp)
2129 rtx *reg_map2 = xcalloc (REGNO (newreg),
2131 reg_map2 [m->regno] = newreg;
2133 i1 = loop_insn_hoist (loop, copy_rtx (PATTERN (p)));
2134 replace_regs (i1, reg_map2, REGNO (newreg), 1);
2138 i1 = loop_insn_hoist (loop, PATTERN (p));
2140 if (REG_NOTES (i1) == 0)
2142 REG_NOTES (i1) = REG_NOTES (p);
2143 REG_NOTES (p) = NULL;
2145 /* If there is a REG_EQUAL note present whose value
2146 is not loop invariant, then delete it, since it
2147 may cause problems with later optimization passes.
2148 It is possible for cse to create such notes
2149 like this as a result of record_jump_cond. */
2151 if ((temp = find_reg_note (i1, REG_EQUAL, NULL_RTX))
2152 && ! loop_invariant_p (loop, XEXP (temp, 0)))
2153 remove_note (i1, temp);
2159 if (loop_dump_stream)
2160 fprintf (loop_dump_stream, " moved to %d",
2163 /* If library call, now fix the REG_NOTES that contain
2164 insn pointers, namely REG_LIBCALL on FIRST
2165 and REG_RETVAL on I1. */
2166 if ((temp = find_reg_note (i1, REG_RETVAL, NULL_RTX)))
2168 XEXP (temp, 0) = first;
2169 temp = find_reg_note (first, REG_LIBCALL, NULL_RTX);
2170 XEXP (temp, 0) = i1;
2177 /* simplify_giv_expr expects that it can walk the insns
2178 at m->insn forwards and see this old sequence we are
2179 tossing here. delete_insn does preserve the next
2180 pointers, but when we skip over a NOTE we must fix
2181 it up. Otherwise that code walks into the non-deleted
2183 while (p && GET_CODE (p) == NOTE)
2184 p = NEXT_INSN (temp) = NEXT_INSN (p);
2189 /* Replace the original insn with a move from
2190 our newly created temp. */
2192 emit_move_insn (m->set_dest, newreg);
2195 emit_insn_before (seq, p);
2199 /* The more regs we move, the less we like moving them. */
2205 if (!m->insert_temp)
2207 /* Any other movable that loads the same register
2209 already_moved[regno] = 1;
2211 /* This reg has been moved out of one loop. */
2212 regs->array[regno].moved_once = 1;
2214 /* The reg set here is now invariant. */
2218 for (i = 0; i < LOOP_REGNO_NREGS (regno, m->set_dest); i++)
2219 regs->array[regno+i].set_in_loop = 0;
2222 /* Change the length-of-life info for the register
2223 to say it lives at least the full length of this loop.
2224 This will help guide optimizations in outer loops. */
2226 if (REGNO_FIRST_LUID (regno) > INSN_LUID (loop_start))
2227 /* This is the old insn before all the moved insns.
2228 We can't use the moved insn because it is out of range
2229 in uid_luid. Only the old insns have luids. */
2230 REGNO_FIRST_UID (regno) = INSN_UID (loop_start);
2231 if (REGNO_LAST_LUID (regno) < INSN_LUID (loop_end))
2232 REGNO_LAST_UID (regno) = INSN_UID (loop_end);
2235 /* Combine with this moved insn any other matching movables. */
2238 for (m1 = movables->head; m1; m1 = m1->next)
2243 /* Schedule the reg loaded by M1
2244 for replacement so that shares the reg of M.
2245 If the modes differ (only possible in restricted
2246 circumstances, make a SUBREG.
2248 Note this assumes that the target dependent files
2249 treat REG and SUBREG equally, including within
2250 GO_IF_LEGITIMATE_ADDRESS and in all the
2251 predicates since we never verify that replacing the
2252 original register with a SUBREG results in a
2253 recognizable insn. */
2254 if (GET_MODE (m->set_dest) == GET_MODE (m1->set_dest))
2255 reg_map[m1->regno] = m->set_dest;
2258 = gen_lowpart_common (GET_MODE (m1->set_dest),
2261 /* Get rid of the matching insn
2262 and prevent further processing of it. */
2265 /* If library call, delete all insns. */
2266 if ((temp = find_reg_note (m1->insn, REG_RETVAL,
2268 delete_insn_chain (XEXP (temp, 0), m1->insn);
2270 delete_insn (m1->insn);
2272 /* Any other movable that loads the same register
2274 already_moved[m1->regno] = 1;
2276 /* The reg merged here is now invariant,
2277 if the reg it matches is invariant. */
2282 i < LOOP_REGNO_NREGS (regno, m1->set_dest);
2284 regs->array[m1->regno+i].set_in_loop = 0;
2288 else if (loop_dump_stream)
2289 fprintf (loop_dump_stream, "not desirable");
2291 else if (loop_dump_stream && !m->match)
2292 fprintf (loop_dump_stream, "not safe");
2294 if (loop_dump_stream)
2295 fprintf (loop_dump_stream, "\n");
2299 new_start = loop_start;
2301 /* Go through all the instructions in the loop, making
2302 all the register substitutions scheduled in REG_MAP. */
2303 for (p = new_start; p != loop_end; p = NEXT_INSN (p))
2304 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
2305 || GET_CODE (p) == CALL_INSN)
2307 replace_regs (PATTERN (p), reg_map, nregs, 0);
2308 replace_regs (REG_NOTES (p), reg_map, nregs, 0);
2314 free (already_moved);
2319 loop_movables_add (struct loop_movables *movables, struct movable *m)
2321 if (movables->head == 0)
2324 movables->last->next = m;
2330 loop_movables_free (struct loop_movables *movables)
2333 struct movable *m_next;
2335 for (m = movables->head; m; m = m_next)
2343 /* Scan X and replace the address of any MEM in it with ADDR.
2344 REG is the address that MEM should have before the replacement. */
2347 replace_call_address (rtx x, rtx reg, rtx addr)
2355 code = GET_CODE (x);
2369 /* Short cut for very common case. */
2370 replace_call_address (XEXP (x, 1), reg, addr);
2374 /* Short cut for very common case. */
2375 replace_call_address (XEXP (x, 0), reg, addr);
2379 /* If this MEM uses a reg other than the one we expected,
2380 something is wrong. */
2381 if (XEXP (x, 0) != reg)
2390 fmt = GET_RTX_FORMAT (code);
2391 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2394 replace_call_address (XEXP (x, i), reg, addr);
2395 else if (fmt[i] == 'E')
2398 for (j = 0; j < XVECLEN (x, i); j++)
2399 replace_call_address (XVECEXP (x, i, j), reg, addr);
2405 /* Return the number of memory refs to addresses that vary
2409 count_nonfixed_reads (const struct loop *loop, rtx x)
2419 code = GET_CODE (x);
2433 return ((loop_invariant_p (loop, XEXP (x, 0)) != 1)
2434 + count_nonfixed_reads (loop, XEXP (x, 0)));
2441 fmt = GET_RTX_FORMAT (code);
2442 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2445 value += count_nonfixed_reads (loop, XEXP (x, i));
2449 for (j = 0; j < XVECLEN (x, i); j++)
2450 value += count_nonfixed_reads (loop, XVECEXP (x, i, j));
2456 /* Scan a loop setting the elements `cont', `vtop', `loops_enclosed',
2457 `has_call', `has_nonconst_call', `has_volatile', `has_tablejump',
2458 `unknown_address_altered', `unknown_constant_address_altered', and
2459 `num_mem_sets' in LOOP. Also, fill in the array `mems' and the
2460 list `store_mems' in LOOP. */
2463 prescan_loop (struct loop *loop)
2467 struct loop_info *loop_info = LOOP_INFO (loop);
2468 rtx start = loop->start;
2469 rtx end = loop->end;
2470 /* The label after END. Jumping here is just like falling off the
2471 end of the loop. We use next_nonnote_insn instead of next_label
2472 as a hedge against the (pathological) case where some actual insn
2473 might end up between the two. */
2474 rtx exit_target = next_nonnote_insn (end);
2476 loop_info->has_indirect_jump = indirect_jump_in_function;
2477 loop_info->pre_header_has_call = 0;
2478 loop_info->has_call = 0;
2479 loop_info->has_nonconst_call = 0;
2480 loop_info->has_prefetch = 0;
2481 loop_info->has_volatile = 0;
2482 loop_info->has_tablejump = 0;
2483 loop_info->has_multiple_exit_targets = 0;
2486 loop_info->unknown_address_altered = 0;
2487 loop_info->unknown_constant_address_altered = 0;
2488 loop_info->store_mems = NULL_RTX;
2489 loop_info->first_loop_store_insn = NULL_RTX;
2490 loop_info->mems_idx = 0;
2491 loop_info->num_mem_sets = 0;
2492 /* If loop opts run twice, this was set on 1st pass for 2nd. */
2493 loop_info->preconditioned = NOTE_PRECONDITIONED (end);
2495 for (insn = start; insn && GET_CODE (insn) != CODE_LABEL;
2496 insn = PREV_INSN (insn))
2498 if (GET_CODE (insn) == CALL_INSN)
2500 loop_info->pre_header_has_call = 1;
2505 for (insn = NEXT_INSN (start); insn != NEXT_INSN (end);
2506 insn = NEXT_INSN (insn))
2508 switch (GET_CODE (insn))
2511 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
2514 /* Count number of loops contained in this one. */
2517 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END)
2522 if (! CONST_OR_PURE_CALL_P (insn))
2524 loop_info->unknown_address_altered = 1;
2525 loop_info->has_nonconst_call = 1;
2527 else if (pure_call_p (insn))
2528 loop_info->has_nonconst_call = 1;
2529 loop_info->has_call = 1;
2530 if (can_throw_internal (insn))
2531 loop_info->has_multiple_exit_targets = 1;
2533 /* Calls initializing constant objects have CLOBBER of MEM /u in the
2534 attached FUNCTION_USAGE expression list, not accounted for by the
2535 code above. We should note these to avoid missing dependencies in
2536 later references. */
2540 for (fusage_entry = CALL_INSN_FUNCTION_USAGE (insn);
2541 fusage_entry; fusage_entry = XEXP (fusage_entry, 1))
2543 rtx fusage = XEXP (fusage_entry, 0);
2545 if (GET_CODE (fusage) == CLOBBER
2546 && GET_CODE (XEXP (fusage, 0)) == MEM
2547 && RTX_UNCHANGING_P (XEXP (fusage, 0)))
2549 note_stores (fusage, note_addr_stored, loop_info);
2550 if (! loop_info->first_loop_store_insn
2551 && loop_info->store_mems)
2552 loop_info->first_loop_store_insn = insn;
2559 if (! loop_info->has_multiple_exit_targets)
2561 rtx set = pc_set (insn);
2565 rtx src = SET_SRC (set);
2568 if (GET_CODE (src) == IF_THEN_ELSE)
2570 label1 = XEXP (src, 1);
2571 label2 = XEXP (src, 2);
2581 if (label1 && label1 != pc_rtx)
2583 if (GET_CODE (label1) != LABEL_REF)
2585 /* Something tricky. */
2586 loop_info->has_multiple_exit_targets = 1;
2589 else if (XEXP (label1, 0) != exit_target
2590 && LABEL_OUTSIDE_LOOP_P (label1))
2592 /* A jump outside the current loop. */
2593 loop_info->has_multiple_exit_targets = 1;
2605 /* A return, or something tricky. */
2606 loop_info->has_multiple_exit_targets = 1;
2612 if (volatile_refs_p (PATTERN (insn)))
2613 loop_info->has_volatile = 1;
2615 if (GET_CODE (insn) == JUMP_INSN
2616 && (GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC
2617 || GET_CODE (PATTERN (insn)) == ADDR_VEC))
2618 loop_info->has_tablejump = 1;
2620 note_stores (PATTERN (insn), note_addr_stored, loop_info);
2621 if (! loop_info->first_loop_store_insn && loop_info->store_mems)
2622 loop_info->first_loop_store_insn = insn;
2624 if (flag_non_call_exceptions && can_throw_internal (insn))
2625 loop_info->has_multiple_exit_targets = 1;
2633 /* Now, rescan the loop, setting up the LOOP_MEMS array. */
2634 if (/* An exception thrown by a called function might land us
2636 ! loop_info->has_nonconst_call
2637 /* We don't want loads for MEMs moved to a location before the
2638 one at which their stack memory becomes allocated. (Note
2639 that this is not a problem for malloc, etc., since those
2640 require actual function calls. */
2641 && ! current_function_calls_alloca
2642 /* There are ways to leave the loop other than falling off the
2644 && ! loop_info->has_multiple_exit_targets)
2645 for (insn = NEXT_INSN (start); insn != NEXT_INSN (end);
2646 insn = NEXT_INSN (insn))
2647 for_each_rtx (&insn, insert_loop_mem, loop_info);
2649 /* BLKmode MEMs are added to LOOP_STORE_MEM as necessary so
2650 that loop_invariant_p and load_mems can use true_dependence
2651 to determine what is really clobbered. */
2652 if (loop_info->unknown_address_altered)
2654 rtx mem = gen_rtx_MEM (BLKmode, const0_rtx);
2656 loop_info->store_mems
2657 = gen_rtx_EXPR_LIST (VOIDmode, mem, loop_info->store_mems);
2659 if (loop_info->unknown_constant_address_altered)
2661 rtx mem = gen_rtx_MEM (BLKmode, const0_rtx);
2663 RTX_UNCHANGING_P (mem) = 1;
2664 loop_info->store_mems
2665 = gen_rtx_EXPR_LIST (VOIDmode, mem, loop_info->store_mems);
2669 /* Invalidate all loops containing LABEL. */
2672 invalidate_loops_containing_label (rtx label)
2675 for (loop = uid_loop[INSN_UID (label)]; loop; loop = loop->outer)
2679 /* Scan the function looking for loops. Record the start and end of each loop.
2680 Also mark as invalid loops any loops that contain a setjmp or are branched
2681 to from outside the loop. */
2684 find_and_verify_loops (rtx f, struct loops *loops)
2689 struct loop *current_loop;
2690 struct loop *next_loop;
2693 num_loops = loops->num;
2695 compute_luids (f, NULL_RTX, 0);
2697 /* If there are jumps to undefined labels,
2698 treat them as jumps out of any/all loops.
2699 This also avoids writing past end of tables when there are no loops. */
2702 /* Find boundaries of loops, mark which loops are contained within
2703 loops, and invalidate loops that have setjmp. */
2706 current_loop = NULL;
2707 for (insn = f; insn; insn = NEXT_INSN (insn))
2709 if (GET_CODE (insn) == NOTE)
2710 switch (NOTE_LINE_NUMBER (insn))
2712 case NOTE_INSN_LOOP_BEG:
2713 next_loop = loops->array + num_loops;
2714 next_loop->num = num_loops;
2716 next_loop->start = insn;
2717 next_loop->outer = current_loop;
2718 current_loop = next_loop;
2721 case NOTE_INSN_LOOP_CONT:
2722 current_loop->cont = insn;
2725 case NOTE_INSN_LOOP_VTOP:
2726 current_loop->vtop = insn;
2729 case NOTE_INSN_LOOP_END:
2733 current_loop->end = insn;
2734 current_loop = current_loop->outer;
2741 if (GET_CODE (insn) == CALL_INSN
2742 && find_reg_note (insn, REG_SETJMP, NULL))
2744 /* In this case, we must invalidate our current loop and any
2746 for (loop = current_loop; loop; loop = loop->outer)
2749 if (loop_dump_stream)
2750 fprintf (loop_dump_stream,
2751 "\nLoop at %d ignored due to setjmp.\n",
2752 INSN_UID (loop->start));
2756 /* Note that this will mark the NOTE_INSN_LOOP_END note as being in the
2757 enclosing loop, but this doesn't matter. */
2758 uid_loop[INSN_UID (insn)] = current_loop;
2761 /* Any loop containing a label used in an initializer must be invalidated,
2762 because it can be jumped into from anywhere. */
2763 for (label = forced_labels; label; label = XEXP (label, 1))
2764 invalidate_loops_containing_label (XEXP (label, 0));
2766 /* Any loop containing a label used for an exception handler must be
2767 invalidated, because it can be jumped into from anywhere. */
2768 for_each_eh_label (invalidate_loops_containing_label);
2770 /* Now scan all insn's in the function. If any JUMP_INSN branches into a
2771 loop that it is not contained within, that loop is marked invalid.
2772 If any INSN or CALL_INSN uses a label's address, then the loop containing
2773 that label is marked invalid, because it could be jumped into from
2776 Also look for blocks of code ending in an unconditional branch that
2777 exits the loop. If such a block is surrounded by a conditional
2778 branch around the block, move the block elsewhere (see below) and
2779 invert the jump to point to the code block. This may eliminate a
2780 label in our loop and will simplify processing by both us and a
2781 possible second cse pass. */
2783 for (insn = f; insn; insn = NEXT_INSN (insn))
2786 struct loop *this_loop = uid_loop[INSN_UID (insn)];
2788 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
2790 rtx note = find_reg_note (insn, REG_LABEL, NULL_RTX);
2792 invalidate_loops_containing_label (XEXP (note, 0));
2795 if (GET_CODE (insn) != JUMP_INSN)
2798 mark_loop_jump (PATTERN (insn), this_loop);
2800 /* See if this is an unconditional branch outside the loop. */
2802 && (GET_CODE (PATTERN (insn)) == RETURN
2803 || (any_uncondjump_p (insn)
2804 && onlyjump_p (insn)
2805 && (uid_loop[INSN_UID (JUMP_LABEL (insn))]
2807 && get_max_uid () < max_uid_for_loop)
2810 rtx our_next = next_real_insn (insn);
2811 rtx last_insn_to_move = NEXT_INSN (insn);
2812 struct loop *dest_loop;
2813 struct loop *outer_loop = NULL;
2815 /* Go backwards until we reach the start of the loop, a label,
2817 for (p = PREV_INSN (insn);
2818 GET_CODE (p) != CODE_LABEL
2819 && ! (GET_CODE (p) == NOTE
2820 && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
2821 && GET_CODE (p) != JUMP_INSN;
2825 /* Check for the case where we have a jump to an inner nested
2826 loop, and do not perform the optimization in that case. */
2828 if (JUMP_LABEL (insn))
2830 dest_loop = uid_loop[INSN_UID (JUMP_LABEL (insn))];
2833 for (outer_loop = dest_loop; outer_loop;
2834 outer_loop = outer_loop->outer)
2835 if (outer_loop == this_loop)
2840 /* Make sure that the target of P is within the current loop. */
2842 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p)
2843 && uid_loop[INSN_UID (JUMP_LABEL (p))] != this_loop)
2844 outer_loop = this_loop;
2846 /* If we stopped on a JUMP_INSN to the next insn after INSN,
2847 we have a block of code to try to move.
2849 We look backward and then forward from the target of INSN
2850 to find a BARRIER at the same loop depth as the target.
2851 If we find such a BARRIER, we make a new label for the start
2852 of the block, invert the jump in P and point it to that label,
2853 and move the block of code to the spot we found. */
2856 && GET_CODE (p) == JUMP_INSN
2857 && JUMP_LABEL (p) != 0
2858 /* Just ignore jumps to labels that were never emitted.
2859 These always indicate compilation errors. */
2860 && INSN_UID (JUMP_LABEL (p)) != 0
2861 && any_condjump_p (p) && onlyjump_p (p)
2862 && next_real_insn (JUMP_LABEL (p)) == our_next
2863 /* If it's not safe to move the sequence, then we
2865 && insns_safe_to_move_p (p, NEXT_INSN (insn),
2866 &last_insn_to_move))
2869 = JUMP_LABEL (insn) ? JUMP_LABEL (insn) : get_last_insn ();
2870 struct loop *target_loop = uid_loop[INSN_UID (target)];
2874 /* Search for possible garbage past the conditional jumps
2875 and look for the last barrier. */
2876 for (tmp = last_insn_to_move;
2877 tmp && GET_CODE (tmp) != CODE_LABEL; tmp = NEXT_INSN (tmp))
2878 if (GET_CODE (tmp) == BARRIER)
2879 last_insn_to_move = tmp;
2881 for (loc = target; loc; loc = PREV_INSN (loc))
2882 if (GET_CODE (loc) == BARRIER
2883 /* Don't move things inside a tablejump. */
2884 && ((loc2 = next_nonnote_insn (loc)) == 0
2885 || GET_CODE (loc2) != CODE_LABEL
2886 || (loc2 = next_nonnote_insn (loc2)) == 0
2887 || GET_CODE (loc2) != JUMP_INSN
2888 || (GET_CODE (PATTERN (loc2)) != ADDR_VEC
2889 && GET_CODE (PATTERN (loc2)) != ADDR_DIFF_VEC))
2890 && uid_loop[INSN_UID (loc)] == target_loop)
2894 for (loc = target; loc; loc = NEXT_INSN (loc))
2895 if (GET_CODE (loc) == BARRIER
2896 /* Don't move things inside a tablejump. */
2897 && ((loc2 = next_nonnote_insn (loc)) == 0
2898 || GET_CODE (loc2) != CODE_LABEL
2899 || (loc2 = next_nonnote_insn (loc2)) == 0
2900 || GET_CODE (loc2) != JUMP_INSN
2901 || (GET_CODE (PATTERN (loc2)) != ADDR_VEC
2902 && GET_CODE (PATTERN (loc2)) != ADDR_DIFF_VEC))
2903 && uid_loop[INSN_UID (loc)] == target_loop)
2908 rtx cond_label = JUMP_LABEL (p);
2909 rtx new_label = get_label_after (p);
2911 /* Ensure our label doesn't go away. */
2912 LABEL_NUSES (cond_label)++;
2914 /* Verify that uid_loop is large enough and that
2916 if (invert_jump (p, new_label, 1))
2920 /* If no suitable BARRIER was found, create a suitable
2921 one before TARGET. Since TARGET is a fall through
2922 path, we'll need to insert a jump around our block
2923 and add a BARRIER before TARGET.
2925 This creates an extra unconditional jump outside
2926 the loop. However, the benefits of removing rarely
2927 executed instructions from inside the loop usually
2928 outweighs the cost of the extra unconditional jump
2929 outside the loop. */
2934 temp = gen_jump (JUMP_LABEL (insn));
2935 temp = emit_jump_insn_before (temp, target);
2936 JUMP_LABEL (temp) = JUMP_LABEL (insn);
2937 LABEL_NUSES (JUMP_LABEL (insn))++;
2938 loc = emit_barrier_before (target);
2941 /* Include the BARRIER after INSN and copy the
2943 if (squeeze_notes (&new_label, &last_insn_to_move))
2945 reorder_insns (new_label, last_insn_to_move, loc);
2947 /* All those insns are now in TARGET_LOOP. */
2949 q != NEXT_INSN (last_insn_to_move);
2951 uid_loop[INSN_UID (q)] = target_loop;
2953 /* The label jumped to by INSN is no longer a loop
2954 exit. Unless INSN does not have a label (e.g.,
2955 it is a RETURN insn), search loop->exit_labels
2956 to find its label_ref, and remove it. Also turn
2957 off LABEL_OUTSIDE_LOOP_P bit. */
2958 if (JUMP_LABEL (insn))
2960 for (q = 0, r = this_loop->exit_labels;
2962 q = r, r = LABEL_NEXTREF (r))
2963 if (XEXP (r, 0) == JUMP_LABEL (insn))
2965 LABEL_OUTSIDE_LOOP_P (r) = 0;
2967 LABEL_NEXTREF (q) = LABEL_NEXTREF (r);
2969 this_loop->exit_labels = LABEL_NEXTREF (r);
2973 for (loop = this_loop; loop && loop != target_loop;
2977 /* If we didn't find it, then something is
2983 /* P is now a jump outside the loop, so it must be put
2984 in loop->exit_labels, and marked as such.
2985 The easiest way to do this is to just call
2986 mark_loop_jump again for P. */
2987 mark_loop_jump (PATTERN (p), this_loop);
2989 /* If INSN now jumps to the insn after it,
2991 if (JUMP_LABEL (insn) != 0
2992 && (next_real_insn (JUMP_LABEL (insn))
2993 == next_real_insn (insn)))
2994 delete_related_insns (insn);
2997 /* Continue the loop after where the conditional
2998 branch used to jump, since the only branch insn
2999 in the block (if it still remains) is an inter-loop
3000 branch and hence needs no processing. */
3001 insn = NEXT_INSN (cond_label);
3003 if (--LABEL_NUSES (cond_label) == 0)
3004 delete_related_insns (cond_label);
3006 /* This loop will be continued with NEXT_INSN (insn). */
3007 insn = PREV_INSN (insn);
3014 /* If any label in X jumps to a loop different from LOOP_NUM and any of the
3015 loops it is contained in, mark the target loop invalid.
3017 For speed, we assume that X is part of a pattern of a JUMP_INSN. */
3020 mark_loop_jump (rtx x, struct loop *loop)
3022 struct loop *dest_loop;
3023 struct loop *outer_loop;
3026 switch (GET_CODE (x))
3039 /* There could be a label reference in here. */
3040 mark_loop_jump (XEXP (x, 0), loop);
3046 mark_loop_jump (XEXP (x, 0), loop);
3047 mark_loop_jump (XEXP (x, 1), loop);
3051 /* This may refer to a LABEL_REF or SYMBOL_REF. */
3052 mark_loop_jump (XEXP (x, 1), loop);
3057 mark_loop_jump (XEXP (x, 0), loop);
3061 dest_loop = uid_loop[INSN_UID (XEXP (x, 0))];
3063 /* Link together all labels that branch outside the loop. This
3064 is used by final_[bg]iv_value and the loop unrolling code. Also
3065 mark this LABEL_REF so we know that this branch should predict
3068 /* A check to make sure the label is not in an inner nested loop,
3069 since this does not count as a loop exit. */
3072 for (outer_loop = dest_loop; outer_loop;
3073 outer_loop = outer_loop->outer)
3074 if (outer_loop == loop)
3080 if (loop && ! outer_loop)
3082 LABEL_OUTSIDE_LOOP_P (x) = 1;
3083 LABEL_NEXTREF (x) = loop->exit_labels;
3084 loop->exit_labels = x;
3086 for (outer_loop = loop;
3087 outer_loop && outer_loop != dest_loop;
3088 outer_loop = outer_loop->outer)
3089 outer_loop->exit_count++;
3092 /* If this is inside a loop, but not in the current loop or one enclosed
3093 by it, it invalidates at least one loop. */
3098 /* We must invalidate every nested loop containing the target of this
3099 label, except those that also contain the jump insn. */
3101 for (; dest_loop; dest_loop = dest_loop->outer)
3103 /* Stop when we reach a loop that also contains the jump insn. */
3104 for (outer_loop = loop; outer_loop; outer_loop = outer_loop->outer)
3105 if (dest_loop == outer_loop)
3108 /* If we get here, we know we need to invalidate a loop. */
3109 if (loop_dump_stream && ! dest_loop->invalid)
3110 fprintf (loop_dump_stream,
3111 "\nLoop at %d ignored due to multiple entry points.\n",
3112 INSN_UID (dest_loop->start));
3114 dest_loop->invalid = 1;
3119 /* If this is not setting pc, ignore. */
3120 if (SET_DEST (x) == pc_rtx)
3121 mark_loop_jump (SET_SRC (x), loop);
3125 mark_loop_jump (XEXP (x, 1), loop);
3126 mark_loop_jump (XEXP (x, 2), loop);
3131 for (i = 0; i < XVECLEN (x, 0); i++)
3132 mark_loop_jump (XVECEXP (x, 0, i), loop);
3136 for (i = 0; i < XVECLEN (x, 1); i++)
3137 mark_loop_jump (XVECEXP (x, 1, i), loop);
3141 /* Strictly speaking this is not a jump into the loop, only a possible
3142 jump out of the loop. However, we have no way to link the destination
3143 of this jump onto the list of exit labels. To be safe we mark this
3144 loop and any containing loops as invalid. */
3147 for (outer_loop = loop; outer_loop; outer_loop = outer_loop->outer)
3149 if (loop_dump_stream && ! outer_loop->invalid)
3150 fprintf (loop_dump_stream,
3151 "\nLoop at %d ignored due to unknown exit jump.\n",
3152 INSN_UID (outer_loop->start));
3153 outer_loop->invalid = 1;
3160 /* Return nonzero if there is a label in the range from
3161 insn INSN to and including the insn whose luid is END
3162 INSN must have an assigned luid (i.e., it must not have
3163 been previously created by loop.c). */
3166 labels_in_range_p (rtx insn, int end)
3168 while (insn && INSN_LUID (insn) <= end)
3170 if (GET_CODE (insn) == CODE_LABEL)
3172 insn = NEXT_INSN (insn);
3178 /* Record that a memory reference X is being set. */
3181 note_addr_stored (rtx x, rtx y ATTRIBUTE_UNUSED,
3182 void *data ATTRIBUTE_UNUSED)
3184 struct loop_info *loop_info = data;
3186 if (x == 0 || GET_CODE (x) != MEM)
3189 /* Count number of memory writes.
3190 This affects heuristics in strength_reduce. */
3191 loop_info->num_mem_sets++;
3193 /* BLKmode MEM means all memory is clobbered. */
3194 if (GET_MODE (x) == BLKmode)
3196 if (RTX_UNCHANGING_P (x))
3197 loop_info->unknown_constant_address_altered = 1;
3199 loop_info->unknown_address_altered = 1;
3204 loop_info->store_mems = gen_rtx_EXPR_LIST (VOIDmode, x,
3205 loop_info->store_mems);
3208 /* X is a value modified by an INSN that references a biv inside a loop
3209 exit test (ie, X is somehow related to the value of the biv). If X
3210 is a pseudo that is used more than once, then the biv is (effectively)
3211 used more than once. DATA is a pointer to a loop_regs structure. */
3214 note_set_pseudo_multiple_uses (rtx x, rtx y ATTRIBUTE_UNUSED, void *data)
3216 struct loop_regs *regs = (struct loop_regs *) data;
3221 while (GET_CODE (x) == STRICT_LOW_PART
3222 || GET_CODE (x) == SIGN_EXTRACT
3223 || GET_CODE (x) == ZERO_EXTRACT
3224 || GET_CODE (x) == SUBREG)
3227 if (GET_CODE (x) != REG || REGNO (x) < FIRST_PSEUDO_REGISTER)
3230 /* If we do not have usage information, or if we know the register
3231 is used more than once, note that fact for check_dbra_loop. */
3232 if (REGNO (x) >= max_reg_before_loop
3233 || ! regs->array[REGNO (x)].single_usage
3234 || regs->array[REGNO (x)].single_usage == const0_rtx)
3235 regs->multiple_uses = 1;
3238 /* Return nonzero if the rtx X is invariant over the current loop.
3240 The value is 2 if we refer to something only conditionally invariant.
3242 A memory ref is invariant if it is not volatile and does not conflict
3243 with anything stored in `loop_info->store_mems'. */
3246 loop_invariant_p (const struct loop *loop, rtx x)
3248 struct loop_info *loop_info = LOOP_INFO (loop);
3249 struct loop_regs *regs = LOOP_REGS (loop);
3253 int conditional = 0;
3258 code = GET_CODE (x);
3268 /* A LABEL_REF is normally invariant, however, if we are unrolling
3269 loops, and this label is inside the loop, then it isn't invariant.
3270 This is because each unrolled copy of the loop body will have
3271 a copy of this label. If this was invariant, then an insn loading
3272 the address of this label into a register might get moved outside
3273 the loop, and then each loop body would end up using the same label.
3275 We don't know the loop bounds here though, so just fail for all
3277 if (flag_old_unroll_loops)
3284 case UNSPEC_VOLATILE:
3288 /* We used to check RTX_UNCHANGING_P (x) here, but that is invalid
3289 since the reg might be set by initialization within the loop. */
3291 if ((x == frame_pointer_rtx || x == hard_frame_pointer_rtx
3292 || x == arg_pointer_rtx || x == pic_offset_table_rtx)
3293 && ! current_function_has_nonlocal_goto)
3296 if (LOOP_INFO (loop)->has_call
3297 && REGNO (x) < FIRST_PSEUDO_REGISTER && call_used_regs[REGNO (x)])
3300 /* Out-of-range regs can occur when we are called from unrolling.
3301 These have always been created by the unroller and are set in
3302 the loop, hence are never invariant. */
3304 if (REGNO (x) >= (unsigned) regs->num)
3307 if (regs->array[REGNO (x)].set_in_loop < 0)
3310 return regs->array[REGNO (x)].set_in_loop == 0;
3313 /* Volatile memory references must be rejected. Do this before
3314 checking for read-only items, so that volatile read-only items
3315 will be rejected also. */
3316 if (MEM_VOLATILE_P (x))
3319 /* See if there is any dependence between a store and this load. */
3320 mem_list_entry = loop_info->store_mems;
3321 while (mem_list_entry)
3323 if (true_dependence (XEXP (mem_list_entry, 0), VOIDmode,
3327 mem_list_entry = XEXP (mem_list_entry, 1);
3330 /* It's not invalidated by a store in memory
3331 but we must still verify the address is invariant. */
3335 /* Don't mess with insns declared volatile. */
3336 if (MEM_VOLATILE_P (x))
3344 fmt = GET_RTX_FORMAT (code);
3345 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3349 int tem = loop_invariant_p (loop, XEXP (x, i));
3355 else if (fmt[i] == 'E')
3358 for (j = 0; j < XVECLEN (x, i); j++)
3360 int tem = loop_invariant_p (loop, XVECEXP (x, i, j));
3370 return 1 + conditional;
3373 /* Return nonzero if all the insns in the loop that set REG
3374 are INSN and the immediately following insns,
3375 and if each of those insns sets REG in an invariant way
3376 (not counting uses of REG in them).
3378 The value is 2 if some of these insns are only conditionally invariant.
3380 We assume that INSN itself is the first set of REG
3381 and that its source is invariant. */
3384 consec_sets_invariant_p (const struct loop *loop, rtx reg, int n_sets,
3387 struct loop_regs *regs = LOOP_REGS (loop);
3389 unsigned int regno = REGNO (reg);
3391 /* Number of sets we have to insist on finding after INSN. */
3392 int count = n_sets - 1;
3393 int old = regs->array[regno].set_in_loop;
3397 /* If N_SETS hit the limit, we can't rely on its value. */
3401 regs->array[regno].set_in_loop = 0;
3409 code = GET_CODE (p);
3411 /* If library call, skip to end of it. */
3412 if (code == INSN && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
3417 && (set = single_set (p))
3418 && GET_CODE (SET_DEST (set)) == REG
3419 && REGNO (SET_DEST (set)) == regno)
3421 this = loop_invariant_p (loop, SET_SRC (set));
3424 else if ((temp = find_reg_note (p, REG_EQUAL, NULL_RTX)))
3426 /* If this is a libcall, then any invariant REG_EQUAL note is OK.
3427 If this is an ordinary insn, then only CONSTANT_P REG_EQUAL
3429 this = (CONSTANT_P (XEXP (temp, 0))
3430 || (find_reg_note (p, REG_RETVAL, NULL_RTX)
3431 && loop_invariant_p (loop, XEXP (temp, 0))));
3438 else if (code != NOTE)
3440 regs->array[regno].set_in_loop = old;
3445 regs->array[regno].set_in_loop = old;
3446 /* If loop_invariant_p ever returned 2, we return 2. */
3447 return 1 + (value & 2);
3451 /* I don't think this condition is sufficient to allow INSN
3452 to be moved, so we no longer test it. */
3454 /* Return 1 if all insns in the basic block of INSN and following INSN
3455 that set REG are invariant according to TABLE. */
3458 all_sets_invariant_p (rtx reg, rtx insn, short *table)
3461 int regno = REGNO (reg);
3467 code = GET_CODE (p);
3468 if (code == CODE_LABEL || code == JUMP_INSN)
3470 if (code == INSN && GET_CODE (PATTERN (p)) == SET
3471 && GET_CODE (SET_DEST (PATTERN (p))) == REG
3472 && REGNO (SET_DEST (PATTERN (p))) == regno)
3474 if (! loop_invariant_p (loop, SET_SRC (PATTERN (p)), table))
3481 /* Look at all uses (not sets) of registers in X. For each, if it is
3482 the single use, set USAGE[REGNO] to INSN; if there was a previous use in
3483 a different insn, set USAGE[REGNO] to const0_rtx. */
3486 find_single_use_in_loop (struct loop_regs *regs, rtx insn, rtx x)
3488 enum rtx_code code = GET_CODE (x);
3489 const char *fmt = GET_RTX_FORMAT (code);
3493 regs->array[REGNO (x)].single_usage
3494 = (regs->array[REGNO (x)].single_usage != 0
3495 && regs->array[REGNO (x)].single_usage != insn)
3496 ? const0_rtx : insn;
3498 else if (code == SET)
3500 /* Don't count SET_DEST if it is a REG; otherwise count things
3501 in SET_DEST because if a register is partially modified, it won't
3502 show up as a potential movable so we don't care how USAGE is set
3504 if (GET_CODE (SET_DEST (x)) != REG)
3505 find_single_use_in_loop (regs, insn, SET_DEST (x));
3506 find_single_use_in_loop (regs, insn, SET_SRC (x));
3509 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3511 if (fmt[i] == 'e' && XEXP (x, i) != 0)
3512 find_single_use_in_loop (regs, insn, XEXP (x, i));
3513 else if (fmt[i] == 'E')
3514 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3515 find_single_use_in_loop (regs, insn, XVECEXP (x, i, j));
3519 /* Count and record any set in X which is contained in INSN. Update
3520 REGS->array[I].MAY_NOT_OPTIMIZE and LAST_SET for any register I set
3524 count_one_set (struct loop_regs *regs, rtx insn, rtx x, rtx *last_set)
3526 if (GET_CODE (x) == CLOBBER && GET_CODE (XEXP (x, 0)) == REG)
3527 /* Don't move a reg that has an explicit clobber.
3528 It's not worth the pain to try to do it correctly. */
3529 regs->array[REGNO (XEXP (x, 0))].may_not_optimize = 1;
3531 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
3533 rtx dest = SET_DEST (x);
3534 while (GET_CODE (dest) == SUBREG
3535 || GET_CODE (dest) == ZERO_EXTRACT
3536 || GET_CODE (dest) == SIGN_EXTRACT
3537 || GET_CODE (dest) == STRICT_LOW_PART)
3538 dest = XEXP (dest, 0);
3539 if (GET_CODE (dest) == REG)
3542 int regno = REGNO (dest);
3543 for (i = 0; i < LOOP_REGNO_NREGS (regno, dest); i++)
3545 /* If this is the first setting of this reg
3546 in current basic block, and it was set before,
3547 it must be set in two basic blocks, so it cannot
3548 be moved out of the loop. */
3549 if (regs->array[regno].set_in_loop > 0
3550 && last_set[regno] == 0)
3551 regs->array[regno+i].may_not_optimize = 1;
3552 /* If this is not first setting in current basic block,
3553 see if reg was used in between previous one and this.
3554 If so, neither one can be moved. */
3555 if (last_set[regno] != 0
3556 && reg_used_between_p (dest, last_set[regno], insn))
3557 regs->array[regno+i].may_not_optimize = 1;
3558 if (regs->array[regno+i].set_in_loop < 127)
3559 ++regs->array[regno+i].set_in_loop;
3560 last_set[regno+i] = insn;
3566 /* Given a loop that is bounded by LOOP->START and LOOP->END and that
3567 is entered at LOOP->SCAN_START, return 1 if the register set in SET
3568 contained in insn INSN is used by any insn that precedes INSN in
3569 cyclic order starting from the loop entry point.
3571 We don't want to use INSN_LUID here because if we restrict INSN to those
3572 that have a valid INSN_LUID, it means we cannot move an invariant out
3573 from an inner loop past two loops. */
3576 loop_reg_used_before_p (const struct loop *loop, rtx set, rtx insn)
3578 rtx reg = SET_DEST (set);
3581 /* Scan forward checking for register usage. If we hit INSN, we
3582 are done. Otherwise, if we hit LOOP->END, wrap around to LOOP->START. */
3583 for (p = loop->scan_start; p != insn; p = NEXT_INSN (p))
3585 if (INSN_P (p) && reg_overlap_mentioned_p (reg, PATTERN (p)))
3596 /* Information we collect about arrays that we might want to prefetch. */
3597 struct prefetch_info
3599 struct iv_class *class; /* Class this prefetch is based on. */
3600 struct induction *giv; /* GIV this prefetch is based on. */
3601 rtx base_address; /* Start prefetching from this address plus
3603 HOST_WIDE_INT index;
3604 HOST_WIDE_INT stride; /* Prefetch stride in bytes in each
3606 unsigned int bytes_accessed; /* Sum of sizes of all accesses to this
3607 prefetch area in one iteration. */
3608 unsigned int total_bytes; /* Total bytes loop will access in this block.
3609 This is set only for loops with known
3610 iteration counts and is 0xffffffff
3612 int prefetch_in_loop; /* Number of prefetch insns in loop. */
3613 int prefetch_before_loop; /* Number of prefetch insns before loop. */
3614 unsigned int write : 1; /* 1 for read/write prefetches. */
3617 /* Data used by check_store function. */
3618 struct check_store_data
3624 static void check_store (rtx, rtx, void *);
3625 static void emit_prefetch_instructions (struct loop *);
3626 static int rtx_equal_for_prefetch_p (rtx, rtx);
3628 /* Set mem_write when mem_address is found. Used as callback to
3631 check_store (rtx x, rtx pat ATTRIBUTE_UNUSED, void *data)
3633 struct check_store_data *d = (struct check_store_data *) data;
3635 if ((GET_CODE (x) == MEM) && rtx_equal_p (d->mem_address, XEXP (x, 0)))
3639 /* Like rtx_equal_p, but attempts to swap commutative operands. This is
3640 important to get some addresses combined. Later more sophisticated
3641 transformations can be added when necessary.
3643 ??? Same trick with swapping operand is done at several other places.
3644 It can be nice to develop some common way to handle this. */
3647 rtx_equal_for_prefetch_p (rtx x, rtx y)
3651 enum rtx_code code = GET_CODE (x);
3656 if (code != GET_CODE (y))
3659 code = GET_CODE (x);
3661 if (GET_RTX_CLASS (code) == 'c')
3663 return ((rtx_equal_for_prefetch_p (XEXP (x, 0), XEXP (y, 0))
3664 && rtx_equal_for_prefetch_p (XEXP (x, 1), XEXP (y, 1)))
3665 || (rtx_equal_for_prefetch_p (XEXP (x, 0), XEXP (y, 1))
3666 && rtx_equal_for_prefetch_p (XEXP (x, 1), XEXP (y, 0))));
3668 /* Compare the elements. If any pair of corresponding elements fails to
3669 match, return 0 for the whole thing. */
3671 fmt = GET_RTX_FORMAT (code);
3672 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3677 if (XWINT (x, i) != XWINT (y, i))
3682 if (XINT (x, i) != XINT (y, i))
3687 /* Two vectors must have the same length. */
3688 if (XVECLEN (x, i) != XVECLEN (y, i))
3691 /* And the corresponding elements must match. */
3692 for (j = 0; j < XVECLEN (x, i); j++)
3693 if (rtx_equal_for_prefetch_p (XVECEXP (x, i, j),
3694 XVECEXP (y, i, j)) == 0)
3699 if (rtx_equal_for_prefetch_p (XEXP (x, i), XEXP (y, i)) == 0)
3704 if (strcmp (XSTR (x, i), XSTR (y, i)))
3709 /* These are just backpointers, so they don't matter. */
3715 /* It is believed that rtx's at this level will never
3716 contain anything but integers and other rtx's,
3717 except for within LABEL_REFs and SYMBOL_REFs. */
3725 /* Remove constant addition value from the expression X (when present)
3728 static HOST_WIDE_INT
3729 remove_constant_addition (rtx *x)
3731 HOST_WIDE_INT addval = 0;
3734 /* Avoid clobbering a shared CONST expression. */
3735 if (GET_CODE (exp) == CONST)
3737 if (GET_CODE (XEXP (exp, 0)) == PLUS
3738 && GET_CODE (XEXP (XEXP (exp, 0), 0)) == SYMBOL_REF
3739 && GET_CODE (XEXP (XEXP (exp, 0), 1)) == CONST_INT)
3741 *x = XEXP (XEXP (exp, 0), 0);
3742 return INTVAL (XEXP (XEXP (exp, 0), 1));
3747 if (GET_CODE (exp) == CONST_INT)
3749 addval = INTVAL (exp);
3753 /* For plus expression recurse on ourself. */
3754 else if (GET_CODE (exp) == PLUS)
3756 addval += remove_constant_addition (&XEXP (exp, 0));
3757 addval += remove_constant_addition (&XEXP (exp, 1));
3759 /* In case our parameter was constant, remove extra zero from the
3761 if (XEXP (exp, 0) == const0_rtx)
3763 else if (XEXP (exp, 1) == const0_rtx)
3770 /* Attempt to identify accesses to arrays that are most likely to cause cache
3771 misses, and emit prefetch instructions a few prefetch blocks forward.
3773 To detect the arrays we use the GIV information that was collected by the
3774 strength reduction pass.
3776 The prefetch instructions are generated after the GIV information is done
3777 and before the strength reduction process. The new GIVs are injected into
3778 the strength reduction tables, so the prefetch addresses are optimized as
3781 GIVs are split into base address, stride, and constant addition values.
3782 GIVs with the same address, stride and close addition values are combined
3783 into a single prefetch. Also writes to GIVs are detected, so that prefetch
3784 for write instructions can be used for the block we write to, on machines
3785 that support write prefetches.
3787 Several heuristics are used to determine when to prefetch. They are
3788 controlled by defined symbols that can be overridden for each target. */
3791 emit_prefetch_instructions (struct loop *loop)
3793 int num_prefetches = 0;
3794 int num_real_prefetches = 0;
3795 int num_real_write_prefetches = 0;
3796 int num_prefetches_before = 0;
3797 int num_write_prefetches_before = 0;
3800 struct iv_class *bl;
3801 struct induction *iv;
3802 struct prefetch_info info[MAX_PREFETCHES];
3803 struct loop_ivs *ivs = LOOP_IVS (loop);
3808 /* Consider only loops w/o calls. When a call is done, the loop is probably
3809 slow enough to read the memory. */
3810 if (PREFETCH_NO_CALL && LOOP_INFO (loop)->has_call)
3812 if (loop_dump_stream)
3813 fprintf (loop_dump_stream, "Prefetch: ignoring loop: has call.\n");
3818 /* Don't prefetch in loops known to have few iterations. */
3819 if (PREFETCH_NO_LOW_LOOPCNT
3820 && LOOP_INFO (loop)->n_iterations
3821 && LOOP_INFO (loop)->n_iterations <= PREFETCH_LOW_LOOPCNT)
3823 if (loop_dump_stream)
3824 fprintf (loop_dump_stream,
3825 "Prefetch: ignoring loop: not enough iterations.\n");
3829 /* Search all induction variables and pick those interesting for the prefetch
3831 for (bl = ivs->list; bl; bl = bl->next)
3833 struct induction *biv = bl->biv, *biv1;
3838 /* Expect all BIVs to be executed in each iteration. This makes our
3839 analysis more conservative. */
3842 /* Discard non-constant additions that we can't handle well yet, and
3843 BIVs that are executed multiple times; such BIVs ought to be
3844 handled in the nested loop. We accept not_every_iteration BIVs,
3845 since these only result in larger strides and make our
3846 heuristics more conservative. */
3847 if (GET_CODE (biv->add_val) != CONST_INT)
3849 if (loop_dump_stream)
3851 fprintf (loop_dump_stream,
3852 "Prefetch: ignoring biv %d: non-constant addition at insn %d:",
3853 REGNO (biv->src_reg), INSN_UID (biv->insn));
3854 print_rtl (loop_dump_stream, biv->add_val);
3855 fprintf (loop_dump_stream, "\n");
3860 if (biv->maybe_multiple)
3862 if (loop_dump_stream)
3864 fprintf (loop_dump_stream,
3865 "Prefetch: ignoring biv %d: maybe_multiple at insn %i:",
3866 REGNO (biv->src_reg), INSN_UID (biv->insn));
3867 print_rtl (loop_dump_stream, biv->add_val);
3868 fprintf (loop_dump_stream, "\n");
3873 basestride += INTVAL (biv1->add_val);
3874 biv1 = biv1->next_iv;
3877 if (biv1 || !basestride)
3880 for (iv = bl->giv; iv; iv = iv->next_iv)
3884 HOST_WIDE_INT index = 0;
3886 HOST_WIDE_INT stride = 0;
3887 int stride_sign = 1;
3888 struct check_store_data d;
3889 const char *ignore_reason = NULL;
3890 int size = GET_MODE_SIZE (GET_MODE (iv));
3892 /* See whether an induction variable is interesting to us and if
3893 not, report the reason. */
3894 if (iv->giv_type != DEST_ADDR)
3895 ignore_reason = "giv is not a destination address";
3897 /* We are interested only in constant stride memory references
3898 in order to be able to compute density easily. */
3899 else if (GET_CODE (iv->mult_val) != CONST_INT)
3900 ignore_reason = "stride is not constant";
3904 stride = INTVAL (iv->mult_val) * basestride;
3911 /* On some targets, reversed order prefetches are not
3913 if (PREFETCH_NO_REVERSE_ORDER && stride_sign < 0)
3914 ignore_reason = "reversed order stride";
3916 /* Prefetch of accesses with an extreme stride might not be
3917 worthwhile, either. */
3918 else if (PREFETCH_NO_EXTREME_STRIDE
3919 && stride > PREFETCH_EXTREME_STRIDE)
3920 ignore_reason = "extreme stride";
3922 /* Ignore GIVs with varying add values; we can't predict the
3923 value for the next iteration. */
3924 else if (!loop_invariant_p (loop, iv->add_val))
3925 ignore_reason = "giv has varying add value";
3927 /* Ignore GIVs in the nested loops; they ought to have been
3929 else if (iv->maybe_multiple)
3930 ignore_reason = "giv is in nested loop";
3933 if (ignore_reason != NULL)
3935 if (loop_dump_stream)
3936 fprintf (loop_dump_stream,
3937 "Prefetch: ignoring giv at %d: %s.\n",
3938 INSN_UID (iv->insn), ignore_reason);
3942 /* Determine the pointer to the basic array we are examining. It is
3943 the sum of the BIV's initial value and the GIV's add_val. */
3944 address = copy_rtx (iv->add_val);
3945 temp = copy_rtx (bl->initial_value);
3947 address = simplify_gen_binary (PLUS, Pmode, temp, address);
3948 index = remove_constant_addition (&address);
3951 d.mem_address = *iv->location;
3953 /* When the GIV is not always executed, we might be better off by
3954 not dirtying the cache pages. */
3955 if (PREFETCH_CONDITIONAL || iv->always_executed)
3956 note_stores (PATTERN (iv->insn), check_store, &d);
3959 if (loop_dump_stream)
3960 fprintf (loop_dump_stream, "Prefetch: Ignoring giv at %d: %s\n",
3961 INSN_UID (iv->insn), "in conditional code.");
3965 /* Attempt to find another prefetch to the same array and see if we
3966 can merge this one. */
3967 for (i = 0; i < num_prefetches; i++)
3968 if (rtx_equal_for_prefetch_p (address, info[i].base_address)
3969 && stride == info[i].stride)
3971 /* In case both access same array (same location
3972 just with small difference in constant indexes), merge
3973 the prefetches. Just do the later and the earlier will
3974 get prefetched from previous iteration.
3975 The artificial threshold should not be too small,
3976 but also not bigger than small portion of memory usually
3977 traversed by single loop. */
3978 if (index >= info[i].index
3979 && index - info[i].index < PREFETCH_EXTREME_DIFFERENCE)
3981 info[i].write |= d.mem_write;
3982 info[i].bytes_accessed += size;
3983 info[i].index = index;
3986 info[num_prefetches].base_address = address;
3991 if (index < info[i].index
3992 && info[i].index - index < PREFETCH_EXTREME_DIFFERENCE)
3994 info[i].write |= d.mem_write;
3995 info[i].bytes_accessed += size;
4001 /* Merging failed. */
4004 info[num_prefetches].giv = iv;
4005 info[num_prefetches].class = bl;
4006 info[num_prefetches].index = index;
4007 info[num_prefetches].stride = stride;
4008 info[num_prefetches].base_address = address;
4009 info[num_prefetches].write = d.mem_write;
4010 info[num_prefetches].bytes_accessed = size;
4012 if (num_prefetches >= MAX_PREFETCHES)
4014 if (loop_dump_stream)
4015 fprintf (loop_dump_stream,
4016 "Maximal number of prefetches exceeded.\n");
4023 for (i = 0; i < num_prefetches; i++)
4027 /* Attempt to calculate the total number of bytes fetched by all
4028 iterations of the loop. Avoid overflow. */
4029 if (LOOP_INFO (loop)->n_iterations
4030 && ((unsigned HOST_WIDE_INT) (0xffffffff / info[i].stride)
4031 >= LOOP_INFO (loop)->n_iterations))
4032 info[i].total_bytes = info[i].stride * LOOP_INFO (loop)->n_iterations;
4034 info[i].total_bytes = 0xffffffff;
4036 density = info[i].bytes_accessed * 100 / info[i].stride;
4038 /* Prefetch might be worthwhile only when the loads/stores are dense. */
4039 if (PREFETCH_ONLY_DENSE_MEM)
4040 if (density * 256 > PREFETCH_DENSE_MEM * 100
4041 && (info[i].total_bytes / PREFETCH_BLOCK
4042 >= PREFETCH_BLOCKS_BEFORE_LOOP_MIN))
4044 info[i].prefetch_before_loop = 1;
4045 info[i].prefetch_in_loop
4046 = (info[i].total_bytes / PREFETCH_BLOCK
4047 > PREFETCH_BLOCKS_BEFORE_LOOP_MAX);
4051 info[i].prefetch_in_loop = 0, info[i].prefetch_before_loop = 0;
4052 if (loop_dump_stream)
4053 fprintf (loop_dump_stream,
4054 "Prefetch: ignoring giv at %d: %d%% density is too low.\n",
4055 INSN_UID (info[i].giv->insn), density);
4058 info[i].prefetch_in_loop = 1, info[i].prefetch_before_loop = 1;
4060 /* Find how many prefetch instructions we'll use within the loop. */
4061 if (info[i].prefetch_in_loop != 0)
4063 info[i].prefetch_in_loop = ((info[i].stride + PREFETCH_BLOCK - 1)
4065 num_real_prefetches += info[i].prefetch_in_loop;
4067 num_real_write_prefetches += info[i].prefetch_in_loop;
4071 /* Determine how many iterations ahead to prefetch within the loop, based
4072 on how many prefetches we currently expect to do within the loop. */
4073 if (num_real_prefetches != 0)
4075 if ((ahead = SIMULTANEOUS_PREFETCHES / num_real_prefetches) == 0)
4077 if (loop_dump_stream)
4078 fprintf (loop_dump_stream,
4079 "Prefetch: ignoring prefetches within loop: ahead is zero; %d < %d\n",
4080 SIMULTANEOUS_PREFETCHES, num_real_prefetches);
4081 num_real_prefetches = 0, num_real_write_prefetches = 0;
4084 /* We'll also use AHEAD to determine how many prefetch instructions to
4085 emit before a loop, so don't leave it zero. */
4087 ahead = PREFETCH_BLOCKS_BEFORE_LOOP_MAX;
4089 for (i = 0; i < num_prefetches; i++)
4091 /* Update if we've decided not to prefetch anything within the loop. */
4092 if (num_real_prefetches == 0)
4093 info[i].prefetch_in_loop = 0;
4095 /* Find how many prefetch instructions we'll use before the loop. */
4096 if (info[i].prefetch_before_loop != 0)
4098 int n = info[i].total_bytes / PREFETCH_BLOCK;
4101 info[i].prefetch_before_loop = n;
4102 num_prefetches_before += n;
4104 num_write_prefetches_before += n;
4107 if (loop_dump_stream)
4109 if (info[i].prefetch_in_loop == 0
4110 && info[i].prefetch_before_loop == 0)
4112 fprintf (loop_dump_stream, "Prefetch insn: %d",
4113 INSN_UID (info[i].giv->insn));
4114 fprintf (loop_dump_stream,
4115 "; in loop: %d; before: %d; %s\n",
4116 info[i].prefetch_in_loop,
4117 info[i].prefetch_before_loop,
4118 info[i].write ? "read/write" : "read only");
4119 fprintf (loop_dump_stream,
4120 " density: %d%%; bytes_accessed: %u; total_bytes: %u\n",
4121 (int) (info[i].bytes_accessed * 100 / info[i].stride),
4122 info[i].bytes_accessed, info[i].total_bytes);
4123 fprintf (loop_dump_stream, " index: " HOST_WIDE_INT_PRINT_DEC
4124 "; stride: " HOST_WIDE_INT_PRINT_DEC "; address: ",
4125 info[i].index, info[i].stride);
4126 print_rtl (loop_dump_stream, info[i].base_address);
4127 fprintf (loop_dump_stream, "\n");
4131 if (num_real_prefetches + num_prefetches_before > 0)
4133 /* Record that this loop uses prefetch instructions. */
4134 LOOP_INFO (loop)->has_prefetch = 1;
4136 if (loop_dump_stream)
4138 fprintf (loop_dump_stream, "Real prefetches needed within loop: %d (write: %d)\n",
4139 num_real_prefetches, num_real_write_prefetches);
4140 fprintf (loop_dump_stream, "Real prefetches needed before loop: %d (write: %d)\n",
4141 num_prefetches_before, num_write_prefetches_before);
4145 for (i = 0; i < num_prefetches; i++)
4149 for (y = 0; y < info[i].prefetch_in_loop; y++)
4151 rtx loc = copy_rtx (*info[i].giv->location);
4153 int bytes_ahead = PREFETCH_BLOCK * (ahead + y);
4154 rtx before_insn = info[i].giv->insn;
4155 rtx prev_insn = PREV_INSN (info[i].giv->insn);
4158 /* We can save some effort by offsetting the address on
4159 architectures with offsettable memory references. */
4160 if (offsettable_address_p (0, VOIDmode, loc))
4161 loc = plus_constant (loc, bytes_ahead);
4164 rtx reg = gen_reg_rtx (Pmode);
4165 loop_iv_add_mult_emit_before (loop, loc, const1_rtx,
4166 GEN_INT (bytes_ahead), reg,
4172 /* Make sure the address operand is valid for prefetch. */
4173 if (! (*insn_data[(int)CODE_FOR_prefetch].operand[0].predicate)
4174 (loc, insn_data[(int)CODE_FOR_prefetch].operand[0].mode))
4175 loc = force_reg (Pmode, loc);
4176 emit_insn (gen_prefetch (loc, GEN_INT (info[i].write),
4180 emit_insn_before (seq, before_insn);
4182 /* Check all insns emitted and record the new GIV
4184 insn = NEXT_INSN (prev_insn);
4185 while (insn != before_insn)
4187 insn = check_insn_for_givs (loop, insn,
4188 info[i].giv->always_executed,
4189 info[i].giv->maybe_multiple);
4190 insn = NEXT_INSN (insn);
4194 if (PREFETCH_BEFORE_LOOP)
4196 /* Emit insns before the loop to fetch the first cache lines or,
4197 if we're not prefetching within the loop, everything we expect
4199 for (y = 0; y < info[i].prefetch_before_loop; y++)
4201 rtx reg = gen_reg_rtx (Pmode);
4202 rtx loop_start = loop->start;
4203 rtx init_val = info[i].class->initial_value;
4204 rtx add_val = simplify_gen_binary (PLUS, Pmode,
4205 info[i].giv->add_val,
4206 GEN_INT (y * PREFETCH_BLOCK));
4208 /* Functions called by LOOP_IV_ADD_EMIT_BEFORE expect a
4209 non-constant INIT_VAL to have the same mode as REG, which
4210 in this case we know to be Pmode. */
4211 if (GET_MODE (init_val) != Pmode && !CONSTANT_P (init_val))
4216 init_val = convert_to_mode (Pmode, init_val, 0);
4219 loop_insn_emit_before (loop, 0, loop_start, seq);
4221 loop_iv_add_mult_emit_before (loop, init_val,
4222 info[i].giv->mult_val,
4223 add_val, reg, 0, loop_start);
4224 emit_insn_before (gen_prefetch (reg, GEN_INT (info[i].write),
4234 /* Communication with routines called via `note_stores'. */
4236 static rtx note_insn;
4238 /* Dummy register to have nonzero DEST_REG for DEST_ADDR type givs. */
4240 static rtx addr_placeholder;
4242 /* ??? Unfinished optimizations, and possible future optimizations,
4243 for the strength reduction code. */
4245 /* ??? The interaction of biv elimination, and recognition of 'constant'
4246 bivs, may cause problems. */
4248 /* ??? Add heuristics so that DEST_ADDR strength reduction does not cause
4249 performance problems.
4251 Perhaps don't eliminate things that can be combined with an addressing
4252 mode. Find all givs that have the same biv, mult_val, and add_val;
4253 then for each giv, check to see if its only use dies in a following
4254 memory address. If so, generate a new memory address and check to see
4255 if it is valid. If it is valid, then store the modified memory address,
4256 otherwise, mark the giv as not done so that it will get its own iv. */
4258 /* ??? Could try to optimize branches when it is known that a biv is always
4261 /* ??? When replace a biv in a compare insn, we should replace with closest
4262 giv so that an optimized branch can still be recognized by the combiner,
4263 e.g. the VAX acb insn. */
4265 /* ??? Many of the checks involving uid_luid could be simplified if regscan
4266 was rerun in loop_optimize whenever a register was added or moved.
4267 Also, some of the optimizations could be a little less conservative. */
4269 /* Scan the loop body and call FNCALL for each insn. In the addition to the
4270 LOOP and INSN parameters pass MAYBE_MULTIPLE and NOT_EVERY_ITERATION to the
4273 NOT_EVERY_ITERATION is 1 if current insn is not known to be executed at
4274 least once for every loop iteration except for the last one.
4276 MAYBE_MULTIPLE is 1 if current insn may be executed more than once for every
4280 for_each_insn_in_loop (struct loop *loop, loop_insn_callback fncall)
4282 int not_every_iteration = 0;
4283 int maybe_multiple = 0;
4284 int past_loop_latch = 0;
4288 /* If loop_scan_start points to the loop exit test, we have to be wary of
4289 subversive use of gotos inside expression statements. */
4290 if (prev_nonnote_insn (loop->scan_start) != prev_nonnote_insn (loop->start))
4291 maybe_multiple = back_branch_in_range_p (loop, loop->scan_start);
4293 /* Scan through loop and update NOT_EVERY_ITERATION and MAYBE_MULTIPLE. */
4294 for (p = next_insn_in_loop (loop, loop->scan_start);
4296 p = next_insn_in_loop (loop, p))
4298 p = fncall (loop, p, not_every_iteration, maybe_multiple);
4300 /* Past CODE_LABEL, we get to insns that may be executed multiple
4301 times. The only way we can be sure that they can't is if every
4302 jump insn between here and the end of the loop either
4303 returns, exits the loop, is a jump to a location that is still
4304 behind the label, or is a jump to the loop start. */
4306 if (GET_CODE (p) == CODE_LABEL)
4314 insn = NEXT_INSN (insn);
4315 if (insn == loop->scan_start)
4317 if (insn == loop->end)
4323 if (insn == loop->scan_start)
4327 if (GET_CODE (insn) == JUMP_INSN
4328 && GET_CODE (PATTERN (insn)) != RETURN
4329 && (!any_condjump_p (insn)
4330 || (JUMP_LABEL (insn) != 0
4331 && JUMP_LABEL (insn) != loop->scan_start
4332 && !loop_insn_first_p (p, JUMP_LABEL (insn)))))
4340 /* Past a jump, we get to insns for which we can't count
4341 on whether they will be executed during each iteration. */
4342 /* This code appears twice in strength_reduce. There is also similar
4343 code in scan_loop. */
4344 if (GET_CODE (p) == JUMP_INSN
4345 /* If we enter the loop in the middle, and scan around to the
4346 beginning, don't set not_every_iteration for that.
4347 This can be any kind of jump, since we want to know if insns
4348 will be executed if the loop is executed. */
4349 && !(JUMP_LABEL (p) == loop->top
4350 && ((NEXT_INSN (NEXT_INSN (p)) == loop->end
4351 && any_uncondjump_p (p))
4352 || (NEXT_INSN (p) == loop->end && any_condjump_p (p)))))
4356 /* If this is a jump outside the loop, then it also doesn't
4357 matter. Check to see if the target of this branch is on the
4358 loop->exits_labels list. */
4360 for (label = loop->exit_labels; label; label = LABEL_NEXTREF (label))
4361 if (XEXP (label, 0) == JUMP_LABEL (p))
4365 not_every_iteration = 1;
4368 else if (GET_CODE (p) == NOTE)
4370 /* At the virtual top of a converted loop, insns are again known to
4371 be executed each iteration: logically, the loop begins here
4372 even though the exit code has been duplicated.
4374 Insns are also again known to be executed each iteration at
4375 the LOOP_CONT note. */
4376 if ((NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP
4377 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_CONT)
4379 not_every_iteration = 0;
4380 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
4382 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
4386 /* Note if we pass a loop latch. If we do, then we can not clear
4387 NOT_EVERY_ITERATION below when we pass the last CODE_LABEL in
4388 a loop since a jump before the last CODE_LABEL may have started
4389 a new loop iteration.
4391 Note that LOOP_TOP is only set for rotated loops and we need
4392 this check for all loops, so compare against the CODE_LABEL
4393 which immediately follows LOOP_START. */
4394 if (GET_CODE (p) == JUMP_INSN
4395 && JUMP_LABEL (p) == NEXT_INSN (loop->start))
4396 past_loop_latch = 1;
4398 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
4399 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
4400 or not an insn is known to be executed each iteration of the
4401 loop, whether or not any iterations are known to occur.
4403 Therefore, if we have just passed a label and have no more labels
4404 between here and the test insn of the loop, and we have not passed
4405 a jump to the top of the loop, then we know these insns will be
4406 executed each iteration. */
4408 if (not_every_iteration
4410 && GET_CODE (p) == CODE_LABEL
4411 && no_labels_between_p (p, loop->end)
4412 && loop_insn_first_p (p, loop->cont))
4413 not_every_iteration = 0;
4418 loop_bivs_find (struct loop *loop)
4420 struct loop_regs *regs = LOOP_REGS (loop);
4421 struct loop_ivs *ivs = LOOP_IVS (loop);
4422 /* Temporary list pointers for traversing ivs->list. */
4423 struct iv_class *bl, **backbl;
4427 for_each_insn_in_loop (loop, check_insn_for_bivs);
4429 /* Scan ivs->list to remove all regs that proved not to be bivs.
4430 Make a sanity check against regs->n_times_set. */
4431 for (backbl = &ivs->list, bl = *backbl; bl; bl = bl->next)
4433 if (REG_IV_TYPE (ivs, bl->regno) != BASIC_INDUCT
4434 /* Above happens if register modified by subreg, etc. */
4435 /* Make sure it is not recognized as a basic induction var: */
4436 || regs->array[bl->regno].n_times_set != bl->biv_count
4437 /* If never incremented, it is invariant that we decided not to
4438 move. So leave it alone. */
4439 || ! bl->incremented)
4441 if (loop_dump_stream)
4442 fprintf (loop_dump_stream, "Biv %d: discarded, %s\n",
4444 (REG_IV_TYPE (ivs, bl->regno) != BASIC_INDUCT
4445 ? "not induction variable"
4446 : (! bl->incremented ? "never incremented"
4449 REG_IV_TYPE (ivs, bl->regno) = NOT_BASIC_INDUCT;
4456 if (loop_dump_stream)
4457 fprintf (loop_dump_stream, "Biv %d: verified\n", bl->regno);
4463 /* Determine how BIVS are initialized by looking through pre-header
4464 extended basic block. */
4466 loop_bivs_init_find (struct loop *loop)
4468 struct loop_ivs *ivs = LOOP_IVS (loop);
4469 /* Temporary list pointers for traversing ivs->list. */
4470 struct iv_class *bl;
4474 /* Find initial value for each biv by searching backwards from loop_start,
4475 halting at first label. Also record any test condition. */
4478 for (p = loop->start; p && GET_CODE (p) != CODE_LABEL; p = PREV_INSN (p))
4484 if (GET_CODE (p) == CALL_INSN)
4488 note_stores (PATTERN (p), record_initial, ivs);
4490 /* Record any test of a biv that branches around the loop if no store
4491 between it and the start of loop. We only care about tests with
4492 constants and registers and only certain of those. */
4493 if (GET_CODE (p) == JUMP_INSN
4494 && JUMP_LABEL (p) != 0
4495 && next_real_insn (JUMP_LABEL (p)) == next_real_insn (loop->end)
4496 && (test = get_condition_for_loop (loop, p)) != 0
4497 && GET_CODE (XEXP (test, 0)) == REG
4498 && REGNO (XEXP (test, 0)) < max_reg_before_loop
4499 && (bl = REG_IV_CLASS (ivs, REGNO (XEXP (test, 0)))) != 0
4500 && valid_initial_value_p (XEXP (test, 1), p, call_seen, loop->start)
4501 && bl->init_insn == 0)
4503 /* If an NE test, we have an initial value! */
4504 if (GET_CODE (test) == NE)
4507 bl->init_set = gen_rtx_SET (VOIDmode,
4508 XEXP (test, 0), XEXP (test, 1));
4511 bl->initial_test = test;
4517 /* Look at the each biv and see if we can say anything better about its
4518 initial value from any initializing insns set up above. (This is done
4519 in two passes to avoid missing SETs in a PARALLEL.) */
4521 loop_bivs_check (struct loop *loop)
4523 struct loop_ivs *ivs = LOOP_IVS (loop);
4524 /* Temporary list pointers for traversing ivs->list. */
4525 struct iv_class *bl;
4526 struct iv_class **backbl;
4528 for (backbl = &ivs->list; (bl = *backbl); backbl = &bl->next)
4533 if (! bl->init_insn)
4536 /* IF INIT_INSN has a REG_EQUAL or REG_EQUIV note and the value
4537 is a constant, use the value of that. */
4538 if (((note = find_reg_note (bl->init_insn, REG_EQUAL, 0)) != NULL
4539 && CONSTANT_P (XEXP (note, 0)))
4540 || ((note = find_reg_note (bl->init_insn, REG_EQUIV, 0)) != NULL
4541 && CONSTANT_P (XEXP (note, 0))))
4542 src = XEXP (note, 0);
4544 src = SET_SRC (bl->init_set);
4546 if (loop_dump_stream)
4547 fprintf (loop_dump_stream,
4548 "Biv %d: initialized at insn %d: initial value ",
4549 bl->regno, INSN_UID (bl->init_insn));
4551 if ((GET_MODE (src) == GET_MODE (regno_reg_rtx[bl->regno])
4552 || GET_MODE (src) == VOIDmode)
4553 && valid_initial_value_p (src, bl->init_insn,
4554 LOOP_INFO (loop)->pre_header_has_call,
4557 bl->initial_value = src;
4559 if (loop_dump_stream)
4561 print_simple_rtl (loop_dump_stream, src);
4562 fputc ('\n', loop_dump_stream);
4565 /* If we can't make it a giv,
4566 let biv keep initial value of "itself". */
4567 else if (loop_dump_stream)
4568 fprintf (loop_dump_stream, "is complex\n");
4573 /* Search the loop for general induction variables. */
4576 loop_givs_find (struct loop* loop)
4578 for_each_insn_in_loop (loop, check_insn_for_givs);
4582 /* For each giv for which we still don't know whether or not it is
4583 replaceable, check to see if it is replaceable because its final value
4584 can be calculated. */
4587 loop_givs_check (struct loop *loop)
4589 struct loop_ivs *ivs = LOOP_IVS (loop);
4590 struct iv_class *bl;
4592 for (bl = ivs->list; bl; bl = bl->next)
4594 struct induction *v;
4596 for (v = bl->giv; v; v = v->next_iv)
4597 if (! v->replaceable && ! v->not_replaceable)
4598 check_final_value (loop, v);
4603 /* Return nonzero if it is possible to eliminate the biv BL provided
4604 all givs are reduced. This is possible if either the reg is not
4605 used outside the loop, or we can compute what its final value will
4609 loop_biv_eliminable_p (struct loop *loop, struct iv_class *bl,
4610 int threshold, int insn_count)
4612 /* For architectures with a decrement_and_branch_until_zero insn,
4613 don't do this if we put a REG_NONNEG note on the endtest for this
4616 #ifdef HAVE_decrement_and_branch_until_zero
4619 if (loop_dump_stream)
4620 fprintf (loop_dump_stream,
4621 "Cannot eliminate nonneg biv %d.\n", bl->regno);
4626 /* Check that biv is used outside loop or if it has a final value.
4627 Compare against bl->init_insn rather than loop->start. We aren't
4628 concerned with any uses of the biv between init_insn and
4629 loop->start since these won't be affected by the value of the biv
4630 elsewhere in the function, so long as init_insn doesn't use the
4633 if ((REGNO_LAST_LUID (bl->regno) < INSN_LUID (loop->end)
4635 && INSN_UID (bl->init_insn) < max_uid_for_loop
4636 && REGNO_FIRST_LUID (bl->regno) >= INSN_LUID (bl->init_insn)
4637 && ! reg_mentioned_p (bl->biv->dest_reg, SET_SRC (bl->init_set)))
4638 || (bl->final_value = final_biv_value (loop, bl)))
4639 return maybe_eliminate_biv (loop, bl, 0, threshold, insn_count);
4641 if (loop_dump_stream)
4643 fprintf (loop_dump_stream,
4644 "Cannot eliminate biv %d.\n",
4646 fprintf (loop_dump_stream,
4647 "First use: insn %d, last use: insn %d.\n",
4648 REGNO_FIRST_UID (bl->regno),
4649 REGNO_LAST_UID (bl->regno));
4655 /* Reduce each giv of BL that we have decided to reduce. */
4658 loop_givs_reduce (struct loop *loop, struct iv_class *bl)
4660 struct induction *v;
4662 for (v = bl->giv; v; v = v->next_iv)
4664 struct induction *tv;
4665 if (! v->ignore && v->same == 0)
4667 int auto_inc_opt = 0;
4669 /* If the code for derived givs immediately below has already
4670 allocated a new_reg, we must keep it. */
4672 v->new_reg = gen_reg_rtx (v->mode);
4675 /* If the target has auto-increment addressing modes, and
4676 this is an address giv, then try to put the increment
4677 immediately after its use, so that flow can create an
4678 auto-increment addressing mode. */
4679 if (v->giv_type == DEST_ADDR && bl->biv_count == 1
4680 && bl->biv->always_executed && ! bl->biv->maybe_multiple
4681 /* We don't handle reversed biv's because bl->biv->insn
4682 does not have a valid INSN_LUID. */
4684 && v->always_executed && ! v->maybe_multiple
4685 && INSN_UID (v->insn) < max_uid_for_loop)
4687 /* If other giv's have been combined with this one, then
4688 this will work only if all uses of the other giv's occur
4689 before this giv's insn. This is difficult to check.
4691 We simplify this by looking for the common case where
4692 there is one DEST_REG giv, and this giv's insn is the
4693 last use of the dest_reg of that DEST_REG giv. If the
4694 increment occurs after the address giv, then we can
4695 perform the optimization. (Otherwise, the increment
4696 would have to go before other_giv, and we would not be
4697 able to combine it with the address giv to get an
4698 auto-inc address.) */
4699 if (v->combined_with)
4701 struct induction *other_giv = 0;
4703 for (tv = bl->giv; tv; tv = tv->next_iv)
4711 if (! tv && other_giv
4712 && REGNO (other_giv->dest_reg) < max_reg_before_loop
4713 && (REGNO_LAST_UID (REGNO (other_giv->dest_reg))
4714 == INSN_UID (v->insn))
4715 && INSN_LUID (v->insn) < INSN_LUID (bl->biv->insn))
4718 /* Check for case where increment is before the address
4719 giv. Do this test in "loop order". */
4720 else if ((INSN_LUID (v->insn) > INSN_LUID (bl->biv->insn)
4721 && (INSN_LUID (v->insn) < INSN_LUID (loop->scan_start)
4722 || (INSN_LUID (bl->biv->insn)
4723 > INSN_LUID (loop->scan_start))))
4724 || (INSN_LUID (v->insn) < INSN_LUID (loop->scan_start)
4725 && (INSN_LUID (loop->scan_start)
4726 < INSN_LUID (bl->biv->insn))))
4735 /* We can't put an insn immediately after one setting
4736 cc0, or immediately before one using cc0. */
4737 if ((auto_inc_opt == 1 && sets_cc0_p (PATTERN (v->insn)))
4738 || (auto_inc_opt == -1
4739 && (prev = prev_nonnote_insn (v->insn)) != 0
4741 && sets_cc0_p (PATTERN (prev))))
4747 v->auto_inc_opt = 1;
4751 /* For each place where the biv is incremented, add an insn
4752 to increment the new, reduced reg for the giv. */
4753 for (tv = bl->biv; tv; tv = tv->next_iv)
4757 /* Skip if location is the same as a previous one. */
4761 insert_before = NEXT_INSN (tv->insn);
4762 else if (auto_inc_opt == 1)
4763 insert_before = NEXT_INSN (v->insn);
4765 insert_before = v->insn;
4767 if (tv->mult_val == const1_rtx)
4768 loop_iv_add_mult_emit_before (loop, tv->add_val, v->mult_val,
4769 v->new_reg, v->new_reg,
4771 else /* tv->mult_val == const0_rtx */
4772 /* A multiply is acceptable here
4773 since this is presumed to be seldom executed. */
4774 loop_iv_add_mult_emit_before (loop, tv->add_val, v->mult_val,
4775 v->add_val, v->new_reg,
4779 /* Add code at loop start to initialize giv's reduced reg. */
4781 loop_iv_add_mult_hoist (loop,
4782 extend_value_for_giv (v, bl->initial_value),
4783 v->mult_val, v->add_val, v->new_reg);
4789 /* Check for givs whose first use is their definition and whose
4790 last use is the definition of another giv. If so, it is likely
4791 dead and should not be used to derive another giv nor to
4795 loop_givs_dead_check (struct loop *loop ATTRIBUTE_UNUSED, struct iv_class *bl)
4797 struct induction *v;
4799 for (v = bl->giv; v; v = v->next_iv)
4802 || (v->same && v->same->ignore))
4805 if (v->giv_type == DEST_REG
4806 && REGNO_FIRST_UID (REGNO (v->dest_reg)) == INSN_UID (v->insn))
4808 struct induction *v1;
4810 for (v1 = bl->giv; v1; v1 = v1->next_iv)
4811 if (REGNO_LAST_UID (REGNO (v->dest_reg)) == INSN_UID (v1->insn))
4819 loop_givs_rescan (struct loop *loop, struct iv_class *bl, rtx *reg_map)
4821 struct induction *v;
4823 for (v = bl->giv; v; v = v->next_iv)
4825 if (v->same && v->same->ignore)
4831 /* Update expression if this was combined, in case other giv was
4834 v->new_reg = replace_rtx (v->new_reg,
4835 v->same->dest_reg, v->same->new_reg);
4837 /* See if this register is known to be a pointer to something. If
4838 so, see if we can find the alignment. First see if there is a
4839 destination register that is a pointer. If so, this shares the
4840 alignment too. Next see if we can deduce anything from the
4841 computational information. If not, and this is a DEST_ADDR
4842 giv, at least we know that it's a pointer, though we don't know
4844 if (GET_CODE (v->new_reg) == REG
4845 && v->giv_type == DEST_REG
4846 && REG_POINTER (v->dest_reg))
4847 mark_reg_pointer (v->new_reg,
4848 REGNO_POINTER_ALIGN (REGNO (v->dest_reg)));
4849 else if (GET_CODE (v->new_reg) == REG
4850 && REG_POINTER (v->src_reg))
4852 unsigned int align = REGNO_POINTER_ALIGN (REGNO (v->src_reg));
4855 || GET_CODE (v->add_val) != CONST_INT
4856 || INTVAL (v->add_val) % (align / BITS_PER_UNIT) != 0)
4859 mark_reg_pointer (v->new_reg, align);
4861 else if (GET_CODE (v->new_reg) == REG
4862 && GET_CODE (v->add_val) == REG
4863 && REG_POINTER (v->add_val))
4865 unsigned int align = REGNO_POINTER_ALIGN (REGNO (v->add_val));
4867 if (align == 0 || GET_CODE (v->mult_val) != CONST_INT
4868 || INTVAL (v->mult_val) % (align / BITS_PER_UNIT) != 0)
4871 mark_reg_pointer (v->new_reg, align);
4873 else if (GET_CODE (v->new_reg) == REG && v->giv_type == DEST_ADDR)
4874 mark_reg_pointer (v->new_reg, 0);
4876 if (v->giv_type == DEST_ADDR)
4877 /* Store reduced reg as the address in the memref where we found
4879 validate_change (v->insn, v->location, v->new_reg, 0);
4880 else if (v->replaceable)
4882 reg_map[REGNO (v->dest_reg)] = v->new_reg;
4886 rtx original_insn = v->insn;
4889 /* Not replaceable; emit an insn to set the original giv reg from
4890 the reduced giv, same as above. */
4891 v->insn = loop_insn_emit_after (loop, 0, original_insn,
4892 gen_move_insn (v->dest_reg,
4895 /* The original insn may have a REG_EQUAL note. This note is
4896 now incorrect and may result in invalid substitutions later.
4897 The original insn is dead, but may be part of a libcall
4898 sequence, which doesn't seem worth the bother of handling. */
4899 note = find_reg_note (original_insn, REG_EQUAL, NULL_RTX);
4901 remove_note (original_insn, note);
4904 /* When a loop is reversed, givs which depend on the reversed
4905 biv, and which are live outside the loop, must be set to their
4906 correct final value. This insn is only needed if the giv is
4907 not replaceable. The correct final value is the same as the
4908 value that the giv starts the reversed loop with. */
4909 if (bl->reversed && ! v->replaceable)
4910 loop_iv_add_mult_sink (loop,
4911 extend_value_for_giv (v, bl->initial_value),
4912 v->mult_val, v->add_val, v->dest_reg);
4913 else if (v->final_value)
4914 loop_insn_sink_or_swim (loop,
4915 gen_load_of_final_value (v->dest_reg,
4918 if (loop_dump_stream)
4920 fprintf (loop_dump_stream, "giv at %d reduced to ",
4921 INSN_UID (v->insn));
4922 print_simple_rtl (loop_dump_stream, v->new_reg);
4923 fprintf (loop_dump_stream, "\n");
4930 loop_giv_reduce_benefit (struct loop *loop ATTRIBUTE_UNUSED,
4931 struct iv_class *bl, struct induction *v,
4937 benefit = v->benefit;
4938 PUT_MODE (test_reg, v->mode);
4939 add_cost = iv_add_mult_cost (bl->biv->add_val, v->mult_val,
4940 test_reg, test_reg);
4942 /* Reduce benefit if not replaceable, since we will insert a
4943 move-insn to replace the insn that calculates this giv. Don't do
4944 this unless the giv is a user variable, since it will often be
4945 marked non-replaceable because of the duplication of the exit
4946 code outside the loop. In such a case, the copies we insert are
4947 dead and will be deleted. So they don't have a cost. Similar
4948 situations exist. */
4949 /* ??? The new final_[bg]iv_value code does a much better job of
4950 finding replaceable giv's, and hence this code may no longer be
4952 if (! v->replaceable && ! bl->eliminable
4953 && REG_USERVAR_P (v->dest_reg))
4954 benefit -= copy_cost;
4956 /* Decrease the benefit to count the add-insns that we will insert
4957 to increment the reduced reg for the giv. ??? This can
4958 overestimate the run-time cost of the additional insns, e.g. if
4959 there are multiple basic blocks that increment the biv, but only
4960 one of these blocks is executed during each iteration. There is
4961 no good way to detect cases like this with the current structure
4962 of the loop optimizer. This code is more accurate for
4963 determining code size than run-time benefits. */
4964 benefit -= add_cost * bl->biv_count;
4966 /* Decide whether to strength-reduce this giv or to leave the code
4967 unchanged (recompute it from the biv each time it is used). This
4968 decision can be made independently for each giv. */
4971 /* Attempt to guess whether autoincrement will handle some of the
4972 new add insns; if so, increase BENEFIT (undo the subtraction of
4973 add_cost that was done above). */
4974 if (v->giv_type == DEST_ADDR
4975 /* Increasing the benefit is risky, since this is only a guess.
4976 Avoid increasing register pressure in cases where there would
4977 be no other benefit from reducing this giv. */
4979 && GET_CODE (v->mult_val) == CONST_INT)
4981 int size = GET_MODE_SIZE (GET_MODE (v->mem));
4983 if (HAVE_POST_INCREMENT
4984 && INTVAL (v->mult_val) == size)
4985 benefit += add_cost * bl->biv_count;
4986 else if (HAVE_PRE_INCREMENT
4987 && INTVAL (v->mult_val) == size)
4988 benefit += add_cost * bl->biv_count;
4989 else if (HAVE_POST_DECREMENT
4990 && -INTVAL (v->mult_val) == size)
4991 benefit += add_cost * bl->biv_count;
4992 else if (HAVE_PRE_DECREMENT
4993 && -INTVAL (v->mult_val) == size)
4994 benefit += add_cost * bl->biv_count;
5002 /* Free IV structures for LOOP. */
5005 loop_ivs_free (struct loop *loop)
5007 struct loop_ivs *ivs = LOOP_IVS (loop);
5008 struct iv_class *iv = ivs->list;
5014 struct iv_class *next = iv->next;
5015 struct induction *induction;
5016 struct induction *next_induction;
5018 for (induction = iv->biv; induction; induction = next_induction)
5020 next_induction = induction->next_iv;
5023 for (induction = iv->giv; induction; induction = next_induction)
5025 next_induction = induction->next_iv;
5035 /* Perform strength reduction and induction variable elimination.
5037 Pseudo registers created during this function will be beyond the
5038 last valid index in several tables including
5039 REGS->ARRAY[I].N_TIMES_SET and REGNO_LAST_UID. This does not cause a
5040 problem here, because the added registers cannot be givs outside of
5041 their loop, and hence will never be reconsidered. But scan_loop
5042 must check regnos to make sure they are in bounds. */
5045 strength_reduce (struct loop *loop, int flags)
5047 struct loop_info *loop_info = LOOP_INFO (loop);
5048 struct loop_regs *regs = LOOP_REGS (loop);
5049 struct loop_ivs *ivs = LOOP_IVS (loop);
5051 /* Temporary list pointer for traversing ivs->list. */
5052 struct iv_class *bl;
5053 /* Ratio of extra register life span we can justify
5054 for saving an instruction. More if loop doesn't call subroutines
5055 since in that case saving an insn makes more difference
5056 and more registers are available. */
5057 /* ??? could set this to last value of threshold in move_movables */
5058 int threshold = (loop_info->has_call ? 1 : 2) * (3 + n_non_fixed_regs);
5059 /* Map of pseudo-register replacements. */
5060 rtx *reg_map = NULL;
5062 int unrolled_insn_copies = 0;
5063 rtx test_reg = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 1);
5064 int insn_count = count_insns_in_loop (loop);
5066 addr_placeholder = gen_reg_rtx (Pmode);
5068 ivs->n_regs = max_reg_before_loop;
5069 ivs->regs = xcalloc (ivs->n_regs, sizeof (struct iv));
5071 /* Find all BIVs in loop. */
5072 loop_bivs_find (loop);
5074 /* Exit if there are no bivs. */
5077 /* Can still unroll the loop anyways, but indicate that there is no
5078 strength reduction info available. */
5079 if (flags & LOOP_UNROLL)
5080 unroll_loop (loop, insn_count, 0);
5082 loop_ivs_free (loop);
5086 /* Determine how BIVS are initialized by looking through pre-header
5087 extended basic block. */
5088 loop_bivs_init_find (loop);
5090 /* Look at the each biv and see if we can say anything better about its
5091 initial value from any initializing insns set up above. */
5092 loop_bivs_check (loop);
5094 /* Search the loop for general induction variables. */
5095 loop_givs_find (loop);
5097 /* Try to calculate and save the number of loop iterations. This is
5098 set to zero if the actual number can not be calculated. This must
5099 be called after all giv's have been identified, since otherwise it may
5100 fail if the iteration variable is a giv. */
5101 loop_iterations (loop);
5103 #ifdef HAVE_prefetch
5104 if (flags & LOOP_PREFETCH)
5105 emit_prefetch_instructions (loop);
5108 /* Now for each giv for which we still don't know whether or not it is
5109 replaceable, check to see if it is replaceable because its final value
5110 can be calculated. This must be done after loop_iterations is called,
5111 so that final_giv_value will work correctly. */
5112 loop_givs_check (loop);
5114 /* Try to prove that the loop counter variable (if any) is always
5115 nonnegative; if so, record that fact with a REG_NONNEG note
5116 so that "decrement and branch until zero" insn can be used. */
5117 check_dbra_loop (loop, insn_count);
5119 /* Create reg_map to hold substitutions for replaceable giv regs.
5120 Some givs might have been made from biv increments, so look at
5121 ivs->reg_iv_type for a suitable size. */
5122 reg_map_size = ivs->n_regs;
5123 reg_map = xcalloc (reg_map_size, sizeof (rtx));
5125 /* Examine each iv class for feasibility of strength reduction/induction
5126 variable elimination. */
5128 for (bl = ivs->list; bl; bl = bl->next)
5130 struct induction *v;
5133 /* Test whether it will be possible to eliminate this biv
5134 provided all givs are reduced. */
5135 bl->eliminable = loop_biv_eliminable_p (loop, bl, threshold, insn_count);
5137 /* This will be true at the end, if all givs which depend on this
5138 biv have been strength reduced.
5139 We can't (currently) eliminate the biv unless this is so. */
5140 bl->all_reduced = 1;
5142 /* Check each extension dependent giv in this class to see if its
5143 root biv is safe from wrapping in the interior mode. */
5144 check_ext_dependent_givs (loop, bl);
5146 /* Combine all giv's for this iv_class. */
5147 combine_givs (regs, bl);
5149 for (v = bl->giv; v; v = v->next_iv)
5151 struct induction *tv;
5153 if (v->ignore || v->same)
5156 benefit = loop_giv_reduce_benefit (loop, bl, v, test_reg);
5158 /* If an insn is not to be strength reduced, then set its ignore
5159 flag, and clear bl->all_reduced. */
5161 /* A giv that depends on a reversed biv must be reduced if it is
5162 used after the loop exit, otherwise, it would have the wrong
5163 value after the loop exit. To make it simple, just reduce all
5164 of such giv's whether or not we know they are used after the loop
5167 if (! flag_reduce_all_givs
5168 && v->lifetime * threshold * benefit < insn_count
5171 if (loop_dump_stream)
5172 fprintf (loop_dump_stream,
5173 "giv of insn %d not worth while, %d vs %d.\n",
5175 v->lifetime * threshold * benefit, insn_count);
5177 bl->all_reduced = 0;
5181 /* Check that we can increment the reduced giv without a
5182 multiply insn. If not, reject it. */
5184 for (tv = bl->biv; tv; tv = tv->next_iv)
5185 if (tv->mult_val == const1_rtx
5186 && ! product_cheap_p (tv->add_val, v->mult_val))
5188 if (loop_dump_stream)
5189 fprintf (loop_dump_stream,
5190 "giv of insn %d: would need a multiply.\n",
5191 INSN_UID (v->insn));
5193 bl->all_reduced = 0;
5199 /* Check for givs whose first use is their definition and whose
5200 last use is the definition of another giv. If so, it is likely
5201 dead and should not be used to derive another giv nor to
5203 loop_givs_dead_check (loop, bl);
5205 /* Reduce each giv that we decided to reduce. */
5206 loop_givs_reduce (loop, bl);
5208 /* Rescan all givs. If a giv is the same as a giv not reduced, mark it
5211 For each giv register that can be reduced now: if replaceable,
5212 substitute reduced reg wherever the old giv occurs;
5213 else add new move insn "giv_reg = reduced_reg". */
5214 loop_givs_rescan (loop, bl, reg_map);
5216 /* All the givs based on the biv bl have been reduced if they
5219 /* For each giv not marked as maybe dead that has been combined with a
5220 second giv, clear any "maybe dead" mark on that second giv.
5221 v->new_reg will either be or refer to the register of the giv it
5224 Doing this clearing avoids problems in biv elimination where
5225 a giv's new_reg is a complex value that can't be put in the
5226 insn but the giv combined with (with a reg as new_reg) is
5227 marked maybe_dead. Since the register will be used in either
5228 case, we'd prefer it be used from the simpler giv. */
5230 for (v = bl->giv; v; v = v->next_iv)
5231 if (! v->maybe_dead && v->same)
5232 v->same->maybe_dead = 0;
5234 /* Try to eliminate the biv, if it is a candidate.
5235 This won't work if ! bl->all_reduced,
5236 since the givs we planned to use might not have been reduced.
5238 We have to be careful that we didn't initially think we could
5239 eliminate this biv because of a giv that we now think may be
5240 dead and shouldn't be used as a biv replacement.
5242 Also, there is the possibility that we may have a giv that looks
5243 like it can be used to eliminate a biv, but the resulting insn
5244 isn't valid. This can happen, for example, on the 88k, where a
5245 JUMP_INSN can compare a register only with zero. Attempts to
5246 replace it with a compare with a constant will fail.
5248 Note that in cases where this call fails, we may have replaced some
5249 of the occurrences of the biv with a giv, but no harm was done in
5250 doing so in the rare cases where it can occur. */
5252 if (bl->all_reduced == 1 && bl->eliminable
5253 && maybe_eliminate_biv (loop, bl, 1, threshold, insn_count))
5255 /* ?? If we created a new test to bypass the loop entirely,
5256 or otherwise drop straight in, based on this test, then
5257 we might want to rewrite it also. This way some later
5258 pass has more hope of removing the initialization of this
5261 /* If final_value != 0, then the biv may be used after loop end
5262 and we must emit an insn to set it just in case.
5264 Reversed bivs already have an insn after the loop setting their
5265 value, so we don't need another one. We can't calculate the
5266 proper final value for such a biv here anyways. */
5267 if (bl->final_value && ! bl->reversed)
5268 loop_insn_sink_or_swim (loop,
5269 gen_load_of_final_value (bl->biv->dest_reg,
5272 if (loop_dump_stream)
5273 fprintf (loop_dump_stream, "Reg %d: biv eliminated\n",
5276 /* See above note wrt final_value. But since we couldn't eliminate
5277 the biv, we must set the value after the loop instead of before. */
5278 else if (bl->final_value && ! bl->reversed)
5279 loop_insn_sink (loop, gen_load_of_final_value (bl->biv->dest_reg,
5283 /* Go through all the instructions in the loop, making all the
5284 register substitutions scheduled in REG_MAP. */
5286 for (p = loop->start; p != loop->end; p = NEXT_INSN (p))
5287 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
5288 || GET_CODE (p) == CALL_INSN)
5290 replace_regs (PATTERN (p), reg_map, reg_map_size, 0);
5291 replace_regs (REG_NOTES (p), reg_map, reg_map_size, 0);
5295 if (loop_info->n_iterations > 0)
5297 /* When we completely unroll a loop we will likely not need the increment
5298 of the loop BIV and we will not need the conditional branch at the
5300 unrolled_insn_copies = insn_count - 2;
5303 /* When we completely unroll a loop on a HAVE_cc0 machine we will not
5304 need the comparison before the conditional branch at the end of the
5306 unrolled_insn_copies -= 1;
5309 /* We'll need one copy for each loop iteration. */
5310 unrolled_insn_copies *= loop_info->n_iterations;
5312 /* A little slop to account for the ability to remove initialization
5313 code, better CSE, and other secondary benefits of completely
5314 unrolling some loops. */
5315 unrolled_insn_copies -= 1;
5317 /* Clamp the value. */
5318 if (unrolled_insn_copies < 0)
5319 unrolled_insn_copies = 0;
5322 /* Unroll loops from within strength reduction so that we can use the
5323 induction variable information that strength_reduce has already
5324 collected. Always unroll loops that would be as small or smaller
5325 unrolled than when rolled. */
5326 if ((flags & LOOP_UNROLL)
5327 || ((flags & LOOP_AUTO_UNROLL)
5328 && loop_info->n_iterations > 0
5329 && unrolled_insn_copies <= insn_count))
5330 unroll_loop (loop, insn_count, 1);
5332 #ifdef HAVE_doloop_end
5333 if (HAVE_doloop_end && (flags & LOOP_BCT) && flag_branch_on_count_reg)
5334 doloop_optimize (loop);
5335 #endif /* HAVE_doloop_end */
5337 /* In case number of iterations is known, drop branch prediction note
5338 in the branch. Do that only in second loop pass, as loop unrolling
5339 may change the number of iterations performed. */
5340 if (flags & LOOP_BCT)
5342 unsigned HOST_WIDE_INT n
5343 = loop_info->n_iterations / loop_info->unroll_number;
5345 predict_insn (prev_nonnote_insn (loop->end), PRED_LOOP_ITERATIONS,
5346 REG_BR_PROB_BASE - REG_BR_PROB_BASE / n);
5349 if (loop_dump_stream)
5350 fprintf (loop_dump_stream, "\n");
5352 loop_ivs_free (loop);
5357 /*Record all basic induction variables calculated in the insn. */
5359 check_insn_for_bivs (struct loop *loop, rtx p, int not_every_iteration,
5362 struct loop_ivs *ivs = LOOP_IVS (loop);
5369 if (GET_CODE (p) == INSN
5370 && (set = single_set (p))
5371 && GET_CODE (SET_DEST (set)) == REG)
5373 dest_reg = SET_DEST (set);
5374 if (REGNO (dest_reg) < max_reg_before_loop
5375 && REGNO (dest_reg) >= FIRST_PSEUDO_REGISTER
5376 && REG_IV_TYPE (ivs, REGNO (dest_reg)) != NOT_BASIC_INDUCT)
5378 if (basic_induction_var (loop, SET_SRC (set),
5379 GET_MODE (SET_SRC (set)),
5380 dest_reg, p, &inc_val, &mult_val,
5383 /* It is a possible basic induction variable.
5384 Create and initialize an induction structure for it. */
5386 struct induction *v = xmalloc (sizeof (struct induction));
5388 record_biv (loop, v, p, dest_reg, inc_val, mult_val, location,
5389 not_every_iteration, maybe_multiple);
5390 REG_IV_TYPE (ivs, REGNO (dest_reg)) = BASIC_INDUCT;
5392 else if (REGNO (dest_reg) < ivs->n_regs)
5393 REG_IV_TYPE (ivs, REGNO (dest_reg)) = NOT_BASIC_INDUCT;
5399 /* Record all givs calculated in the insn.
5400 A register is a giv if: it is only set once, it is a function of a
5401 biv and a constant (or invariant), and it is not a biv. */
5403 check_insn_for_givs (struct loop *loop, rtx p, int not_every_iteration,
5406 struct loop_regs *regs = LOOP_REGS (loop);
5409 /* Look for a general induction variable in a register. */
5410 if (GET_CODE (p) == INSN
5411 && (set = single_set (p))
5412 && GET_CODE (SET_DEST (set)) == REG
5413 && ! regs->array[REGNO (SET_DEST (set))].may_not_optimize)
5422 rtx last_consec_insn;
5424 dest_reg = SET_DEST (set);
5425 if (REGNO (dest_reg) < FIRST_PSEUDO_REGISTER)
5428 if (/* SET_SRC is a giv. */
5429 (general_induction_var (loop, SET_SRC (set), &src_reg, &add_val,
5430 &mult_val, &ext_val, 0, &benefit, VOIDmode)
5431 /* Equivalent expression is a giv. */
5432 || ((regnote = find_reg_note (p, REG_EQUAL, NULL_RTX))
5433 && general_induction_var (loop, XEXP (regnote, 0), &src_reg,
5434 &add_val, &mult_val, &ext_val, 0,
5435 &benefit, VOIDmode)))
5436 /* Don't try to handle any regs made by loop optimization.
5437 We have nothing on them in regno_first_uid, etc. */
5438 && REGNO (dest_reg) < max_reg_before_loop
5439 /* Don't recognize a BASIC_INDUCT_VAR here. */
5440 && dest_reg != src_reg
5441 /* This must be the only place where the register is set. */
5442 && (regs->array[REGNO (dest_reg)].n_times_set == 1
5443 /* or all sets must be consecutive and make a giv. */
5444 || (benefit = consec_sets_giv (loop, benefit, p,
5446 &add_val, &mult_val, &ext_val,
5447 &last_consec_insn))))
5449 struct induction *v = xmalloc (sizeof (struct induction));
5451 /* If this is a library call, increase benefit. */
5452 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
5453 benefit += libcall_benefit (p);
5455 /* Skip the consecutive insns, if there are any. */
5456 if (regs->array[REGNO (dest_reg)].n_times_set != 1)
5457 p = last_consec_insn;
5459 record_giv (loop, v, p, src_reg, dest_reg, mult_val, add_val,
5460 ext_val, benefit, DEST_REG, not_every_iteration,
5461 maybe_multiple, (rtx*) 0);
5466 /* Look for givs which are memory addresses. */
5467 if (GET_CODE (p) == INSN)
5468 find_mem_givs (loop, PATTERN (p), p, not_every_iteration,
5471 /* Update the status of whether giv can derive other givs. This can
5472 change when we pass a label or an insn that updates a biv. */
5473 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
5474 || GET_CODE (p) == CODE_LABEL)
5475 update_giv_derive (loop, p);
5479 /* Return 1 if X is a valid source for an initial value (or as value being
5480 compared against in an initial test).
5482 X must be either a register or constant and must not be clobbered between
5483 the current insn and the start of the loop.
5485 INSN is the insn containing X. */
5488 valid_initial_value_p (rtx x, rtx insn, int call_seen, rtx loop_start)
5493 /* Only consider pseudos we know about initialized in insns whose luids
5495 if (GET_CODE (x) != REG
5496 || REGNO (x) >= max_reg_before_loop)
5499 /* Don't use call-clobbered registers across a call which clobbers it. On
5500 some machines, don't use any hard registers at all. */
5501 if (REGNO (x) < FIRST_PSEUDO_REGISTER
5502 && (SMALL_REGISTER_CLASSES
5503 || (call_used_regs[REGNO (x)] && call_seen)))
5506 /* Don't use registers that have been clobbered before the start of the
5508 if (reg_set_between_p (x, insn, loop_start))
5514 /* Scan X for memory refs and check each memory address
5515 as a possible giv. INSN is the insn whose pattern X comes from.
5516 NOT_EVERY_ITERATION is 1 if the insn might not be executed during
5517 every loop iteration. MAYBE_MULTIPLE is 1 if the insn might be executed
5518 more than once in each loop iteration. */
5521 find_mem_givs (const struct loop *loop, rtx x, rtx insn,
5522 int not_every_iteration, int maybe_multiple)
5531 code = GET_CODE (x);
5556 /* This code used to disable creating GIVs with mult_val == 1 and
5557 add_val == 0. However, this leads to lost optimizations when
5558 it comes time to combine a set of related DEST_ADDR GIVs, since
5559 this one would not be seen. */
5561 if (general_induction_var (loop, XEXP (x, 0), &src_reg, &add_val,
5562 &mult_val, &ext_val, 1, &benefit,
5565 /* Found one; record it. */
5566 struct induction *v = xmalloc (sizeof (struct induction));
5568 record_giv (loop, v, insn, src_reg, addr_placeholder, mult_val,
5569 add_val, ext_val, benefit, DEST_ADDR,
5570 not_every_iteration, maybe_multiple, &XEXP (x, 0));
5581 /* Recursively scan the subexpressions for other mem refs. */
5583 fmt = GET_RTX_FORMAT (code);
5584 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5586 find_mem_givs (loop, XEXP (x, i), insn, not_every_iteration,
5588 else if (fmt[i] == 'E')
5589 for (j = 0; j < XVECLEN (x, i); j++)
5590 find_mem_givs (loop, XVECEXP (x, i, j), insn, not_every_iteration,
5594 /* Fill in the data about one biv update.
5595 V is the `struct induction' in which we record the biv. (It is
5596 allocated by the caller, with alloca.)
5597 INSN is the insn that sets it.
5598 DEST_REG is the biv's reg.
5600 MULT_VAL is const1_rtx if the biv is being incremented here, in which case
5601 INC_VAL is the increment. Otherwise, MULT_VAL is const0_rtx and the biv is
5602 being set to INC_VAL.
5604 NOT_EVERY_ITERATION is nonzero if this biv update is not know to be
5605 executed every iteration; MAYBE_MULTIPLE is nonzero if this biv update
5606 can be executed more than once per iteration. If MAYBE_MULTIPLE
5607 and NOT_EVERY_ITERATION are both zero, we know that the biv update is
5608 executed exactly once per iteration. */
5611 record_biv (struct loop *loop, struct induction *v, rtx insn, rtx dest_reg,
5612 rtx inc_val, rtx mult_val, rtx *location,
5613 int not_every_iteration, int maybe_multiple)
5615 struct loop_ivs *ivs = LOOP_IVS (loop);
5616 struct iv_class *bl;
5619 v->src_reg = dest_reg;
5620 v->dest_reg = dest_reg;
5621 v->mult_val = mult_val;
5622 v->add_val = inc_val;
5623 v->ext_dependent = NULL_RTX;
5624 v->location = location;
5625 v->mode = GET_MODE (dest_reg);
5626 v->always_computable = ! not_every_iteration;
5627 v->always_executed = ! not_every_iteration;
5628 v->maybe_multiple = maybe_multiple;
5631 /* Add this to the reg's iv_class, creating a class
5632 if this is the first incrementation of the reg. */
5634 bl = REG_IV_CLASS (ivs, REGNO (dest_reg));
5637 /* Create and initialize new iv_class. */
5639 bl = xmalloc (sizeof (struct iv_class));
5641 bl->regno = REGNO (dest_reg);
5647 /* Set initial value to the reg itself. */
5648 bl->initial_value = dest_reg;
5649 bl->final_value = 0;
5650 /* We haven't seen the initializing insn yet */
5653 bl->initial_test = 0;
5654 bl->incremented = 0;
5658 bl->total_benefit = 0;
5660 /* Add this class to ivs->list. */
5661 bl->next = ivs->list;
5664 /* Put it in the array of biv register classes. */
5665 REG_IV_CLASS (ivs, REGNO (dest_reg)) = bl;
5669 /* Check if location is the same as a previous one. */
5670 struct induction *induction;
5671 for (induction = bl->biv; induction; induction = induction->next_iv)
5672 if (location == induction->location)
5674 v->same = induction;
5679 /* Update IV_CLASS entry for this biv. */
5680 v->next_iv = bl->biv;
5683 if (mult_val == const1_rtx)
5684 bl->incremented = 1;
5686 if (loop_dump_stream)
5687 loop_biv_dump (v, loop_dump_stream, 0);
5690 /* Fill in the data about one giv.
5691 V is the `struct induction' in which we record the giv. (It is
5692 allocated by the caller, with alloca.)
5693 INSN is the insn that sets it.
5694 BENEFIT estimates the savings from deleting this insn.
5695 TYPE is DEST_REG or DEST_ADDR; it says whether the giv is computed
5696 into a register or is used as a memory address.
5698 SRC_REG is the biv reg which the giv is computed from.
5699 DEST_REG is the giv's reg (if the giv is stored in a reg).
5700 MULT_VAL and ADD_VAL are the coefficients used to compute the giv.
5701 LOCATION points to the place where this giv's value appears in INSN. */
5704 record_giv (const struct loop *loop, struct induction *v, rtx insn,
5705 rtx src_reg, rtx dest_reg, rtx mult_val, rtx add_val,
5706 rtx ext_val, int benefit, enum g_types type,
5707 int not_every_iteration, int maybe_multiple, rtx *location)
5709 struct loop_ivs *ivs = LOOP_IVS (loop);
5710 struct induction *b;
5711 struct iv_class *bl;
5712 rtx set = single_set (insn);
5715 /* Attempt to prove constantness of the values. Don't let simplify_rtx
5716 undo the MULT canonicalization that we performed earlier. */
5717 temp = simplify_rtx (add_val);
5719 && ! (GET_CODE (add_val) == MULT
5720 && GET_CODE (temp) == ASHIFT))
5724 v->src_reg = src_reg;
5726 v->dest_reg = dest_reg;
5727 v->mult_val = mult_val;
5728 v->add_val = add_val;
5729 v->ext_dependent = ext_val;
5730 v->benefit = benefit;
5731 v->location = location;
5733 v->combined_with = 0;
5734 v->maybe_multiple = maybe_multiple;
5736 v->derive_adjustment = 0;
5742 v->auto_inc_opt = 0;
5746 /* The v->always_computable field is used in update_giv_derive, to
5747 determine whether a giv can be used to derive another giv. For a
5748 DEST_REG giv, INSN computes a new value for the giv, so its value
5749 isn't computable if INSN insn't executed every iteration.
5750 However, for a DEST_ADDR giv, INSN merely uses the value of the giv;
5751 it does not compute a new value. Hence the value is always computable
5752 regardless of whether INSN is executed each iteration. */
5754 if (type == DEST_ADDR)
5755 v->always_computable = 1;
5757 v->always_computable = ! not_every_iteration;
5759 v->always_executed = ! not_every_iteration;
5761 if (type == DEST_ADDR)
5763 v->mode = GET_MODE (*location);
5766 else /* type == DEST_REG */
5768 v->mode = GET_MODE (SET_DEST (set));
5770 v->lifetime = LOOP_REG_LIFETIME (loop, REGNO (dest_reg));
5772 /* If the lifetime is zero, it means that this register is
5773 really a dead store. So mark this as a giv that can be
5774 ignored. This will not prevent the biv from being eliminated. */
5775 if (v->lifetime == 0)
5778 REG_IV_TYPE (ivs, REGNO (dest_reg)) = GENERAL_INDUCT;
5779 REG_IV_INFO (ivs, REGNO (dest_reg)) = v;
5782 /* Add the giv to the class of givs computed from one biv. */
5784 bl = REG_IV_CLASS (ivs, REGNO (src_reg));
5787 v->next_iv = bl->giv;
5789 /* Don't count DEST_ADDR. This is supposed to count the number of
5790 insns that calculate givs. */
5791 if (type == DEST_REG)
5793 bl->total_benefit += benefit;
5796 /* Fatal error, biv missing for this giv? */
5799 if (type == DEST_ADDR)
5802 v->not_replaceable = 0;
5806 /* The giv can be replaced outright by the reduced register only if all
5807 of the following conditions are true:
5808 - the insn that sets the giv is always executed on any iteration
5809 on which the giv is used at all
5810 (there are two ways to deduce this:
5811 either the insn is executed on every iteration,
5812 or all uses follow that insn in the same basic block),
5813 - the giv is not used outside the loop
5814 - no assignments to the biv occur during the giv's lifetime. */
5816 if (REGNO_FIRST_UID (REGNO (dest_reg)) == INSN_UID (insn)
5817 /* Previous line always fails if INSN was moved by loop opt. */
5818 && REGNO_LAST_LUID (REGNO (dest_reg))
5819 < INSN_LUID (loop->end)
5820 && (! not_every_iteration
5821 || last_use_this_basic_block (dest_reg, insn)))
5823 /* Now check that there are no assignments to the biv within the
5824 giv's lifetime. This requires two separate checks. */
5826 /* Check each biv update, and fail if any are between the first
5827 and last use of the giv.
5829 If this loop contains an inner loop that was unrolled, then
5830 the insn modifying the biv may have been emitted by the loop
5831 unrolling code, and hence does not have a valid luid. Just
5832 mark the biv as not replaceable in this case. It is not very
5833 useful as a biv, because it is used in two different loops.
5834 It is very unlikely that we would be able to optimize the giv
5835 using this biv anyways. */
5838 v->not_replaceable = 0;
5839 for (b = bl->biv; b; b = b->next_iv)
5841 if (INSN_UID (b->insn) >= max_uid_for_loop
5842 || ((INSN_LUID (b->insn)
5843 >= REGNO_FIRST_LUID (REGNO (dest_reg)))
5844 && (INSN_LUID (b->insn)
5845 <= REGNO_LAST_LUID (REGNO (dest_reg)))))
5848 v->not_replaceable = 1;
5853 /* If there are any backwards branches that go from after the
5854 biv update to before it, then this giv is not replaceable. */
5856 for (b = bl->biv; b; b = b->next_iv)
5857 if (back_branch_in_range_p (loop, b->insn))
5860 v->not_replaceable = 1;
5866 /* May still be replaceable, we don't have enough info here to
5869 v->not_replaceable = 0;
5873 /* Record whether the add_val contains a const_int, for later use by
5878 v->no_const_addval = 1;
5879 if (tem == const0_rtx)
5881 else if (CONSTANT_P (add_val))
5882 v->no_const_addval = 0;
5883 if (GET_CODE (tem) == PLUS)
5887 if (GET_CODE (XEXP (tem, 0)) == PLUS)
5888 tem = XEXP (tem, 0);
5889 else if (GET_CODE (XEXP (tem, 1)) == PLUS)
5890 tem = XEXP (tem, 1);
5894 if (CONSTANT_P (XEXP (tem, 1)))
5895 v->no_const_addval = 0;
5899 if (loop_dump_stream)
5900 loop_giv_dump (v, loop_dump_stream, 0);
5903 /* All this does is determine whether a giv can be made replaceable because
5904 its final value can be calculated. This code can not be part of record_giv
5905 above, because final_giv_value requires that the number of loop iterations
5906 be known, and that can not be accurately calculated until after all givs
5907 have been identified. */
5910 check_final_value (const struct loop *loop, struct induction *v)
5912 rtx final_value = 0;
5914 /* DEST_ADDR givs will never reach here, because they are always marked
5915 replaceable above in record_giv. */
5917 /* The giv can be replaced outright by the reduced register only if all
5918 of the following conditions are true:
5919 - the insn that sets the giv is always executed on any iteration
5920 on which the giv is used at all
5921 (there are two ways to deduce this:
5922 either the insn is executed on every iteration,
5923 or all uses follow that insn in the same basic block),
5924 - its final value can be calculated (this condition is different
5925 than the one above in record_giv)
5926 - it's not used before the it's set
5927 - no assignments to the biv occur during the giv's lifetime. */
5930 /* This is only called now when replaceable is known to be false. */
5931 /* Clear replaceable, so that it won't confuse final_giv_value. */
5935 if ((final_value = final_giv_value (loop, v))
5936 && (v->always_executed
5937 || last_use_this_basic_block (v->dest_reg, v->insn)))
5939 int biv_increment_seen = 0, before_giv_insn = 0;
5944 v->not_replaceable = 0;
5946 /* When trying to determine whether or not a biv increment occurs
5947 during the lifetime of the giv, we can ignore uses of the variable
5948 outside the loop because final_value is true. Hence we can not
5949 use regno_last_uid and regno_first_uid as above in record_giv. */
5951 /* Search the loop to determine whether any assignments to the
5952 biv occur during the giv's lifetime. Start with the insn
5953 that sets the giv, and search around the loop until we come
5954 back to that insn again.
5956 Also fail if there is a jump within the giv's lifetime that jumps
5957 to somewhere outside the lifetime but still within the loop. This
5958 catches spaghetti code where the execution order is not linear, and
5959 hence the above test fails. Here we assume that the giv lifetime
5960 does not extend from one iteration of the loop to the next, so as
5961 to make the test easier. Since the lifetime isn't known yet,
5962 this requires two loops. See also record_giv above. */
5964 last_giv_use = v->insn;
5971 before_giv_insn = 1;
5972 p = NEXT_INSN (loop->start);
5977 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
5978 || GET_CODE (p) == CALL_INSN)
5980 /* It is possible for the BIV increment to use the GIV if we
5981 have a cycle. Thus we must be sure to check each insn for
5982 both BIV and GIV uses, and we must check for BIV uses
5985 if (! biv_increment_seen
5986 && reg_set_p (v->src_reg, PATTERN (p)))
5987 biv_increment_seen = 1;
5989 if (reg_mentioned_p (v->dest_reg, PATTERN (p)))
5991 if (biv_increment_seen || before_giv_insn)
5994 v->not_replaceable = 1;
6002 /* Now that the lifetime of the giv is known, check for branches
6003 from within the lifetime to outside the lifetime if it is still
6013 p = NEXT_INSN (loop->start);
6014 if (p == last_giv_use)
6017 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p)
6018 && LABEL_NAME (JUMP_LABEL (p))
6019 && ((loop_insn_first_p (JUMP_LABEL (p), v->insn)
6020 && loop_insn_first_p (loop->start, JUMP_LABEL (p)))
6021 || (loop_insn_first_p (last_giv_use, JUMP_LABEL (p))
6022 && loop_insn_first_p (JUMP_LABEL (p), loop->end))))
6025 v->not_replaceable = 1;
6027 if (loop_dump_stream)
6028 fprintf (loop_dump_stream,
6029 "Found branch outside giv lifetime.\n");
6036 /* If it is replaceable, then save the final value. */
6038 v->final_value = final_value;
6041 if (loop_dump_stream && v->replaceable)
6042 fprintf (loop_dump_stream, "Insn %d: giv reg %d final_value replaceable\n",
6043 INSN_UID (v->insn), REGNO (v->dest_reg));
6046 /* Update the status of whether a giv can derive other givs.
6048 We need to do something special if there is or may be an update to the biv
6049 between the time the giv is defined and the time it is used to derive
6052 In addition, a giv that is only conditionally set is not allowed to
6053 derive another giv once a label has been passed.
6055 The cases we look at are when a label or an update to a biv is passed. */
6058 update_giv_derive (const struct loop *loop, rtx p)
6060 struct loop_ivs *ivs = LOOP_IVS (loop);
6061 struct iv_class *bl;
6062 struct induction *biv, *giv;
6066 /* Search all IV classes, then all bivs, and finally all givs.
6068 There are three cases we are concerned with. First we have the situation
6069 of a giv that is only updated conditionally. In that case, it may not
6070 derive any givs after a label is passed.
6072 The second case is when a biv update occurs, or may occur, after the
6073 definition of a giv. For certain biv updates (see below) that are
6074 known to occur between the giv definition and use, we can adjust the
6075 giv definition. For others, or when the biv update is conditional,
6076 we must prevent the giv from deriving any other givs. There are two
6077 sub-cases within this case.
6079 If this is a label, we are concerned with any biv update that is done
6080 conditionally, since it may be done after the giv is defined followed by
6081 a branch here (actually, we need to pass both a jump and a label, but
6082 this extra tracking doesn't seem worth it).
6084 If this is a jump, we are concerned about any biv update that may be
6085 executed multiple times. We are actually only concerned about
6086 backward jumps, but it is probably not worth performing the test
6087 on the jump again here.
6089 If this is a biv update, we must adjust the giv status to show that a
6090 subsequent biv update was performed. If this adjustment cannot be done,
6091 the giv cannot derive further givs. */
6093 for (bl = ivs->list; bl; bl = bl->next)
6094 for (biv = bl->biv; biv; biv = biv->next_iv)
6095 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN
6098 for (giv = bl->giv; giv; giv = giv->next_iv)
6100 /* If cant_derive is already true, there is no point in
6101 checking all of these conditions again. */
6102 if (giv->cant_derive)
6105 /* If this giv is conditionally set and we have passed a label,
6106 it cannot derive anything. */
6107 if (GET_CODE (p) == CODE_LABEL && ! giv->always_computable)
6108 giv->cant_derive = 1;
6110 /* Skip givs that have mult_val == 0, since
6111 they are really invariants. Also skip those that are
6112 replaceable, since we know their lifetime doesn't contain
6114 else if (giv->mult_val == const0_rtx || giv->replaceable)
6117 /* The only way we can allow this giv to derive another
6118 is if this is a biv increment and we can form the product
6119 of biv->add_val and giv->mult_val. In this case, we will
6120 be able to compute a compensation. */
6121 else if (biv->insn == p)
6126 if (biv->mult_val == const1_rtx)
6127 tem = simplify_giv_expr (loop,
6128 gen_rtx_MULT (giv->mode,
6131 &ext_val_dummy, &dummy);
6133 if (tem && giv->derive_adjustment)
6134 tem = simplify_giv_expr
6136 gen_rtx_PLUS (giv->mode, tem, giv->derive_adjustment),
6137 &ext_val_dummy, &dummy);
6140 giv->derive_adjustment = tem;
6142 giv->cant_derive = 1;
6144 else if ((GET_CODE (p) == CODE_LABEL && ! biv->always_computable)
6145 || (GET_CODE (p) == JUMP_INSN && biv->maybe_multiple))
6146 giv->cant_derive = 1;
6151 /* Check whether an insn is an increment legitimate for a basic induction var.
6152 X is the source of insn P, or a part of it.
6153 MODE is the mode in which X should be interpreted.
6155 DEST_REG is the putative biv, also the destination of the insn.
6156 We accept patterns of these forms:
6157 REG = REG + INVARIANT (includes REG = REG - CONSTANT)
6158 REG = INVARIANT + REG
6160 If X is suitable, we return 1, set *MULT_VAL to CONST1_RTX,
6161 store the additive term into *INC_VAL, and store the place where
6162 we found the additive term into *LOCATION.
6164 If X is an assignment of an invariant into DEST_REG, we set
6165 *MULT_VAL to CONST0_RTX, and store the invariant into *INC_VAL.
6167 We also want to detect a BIV when it corresponds to a variable
6168 whose mode was promoted via PROMOTED_MODE. In that case, an increment
6169 of the variable may be a PLUS that adds a SUBREG of that variable to
6170 an invariant and then sign- or zero-extends the result of the PLUS
6173 Most GIVs in such cases will be in the promoted mode, since that is the
6174 probably the natural computation mode (and almost certainly the mode
6175 used for addresses) on the machine. So we view the pseudo-reg containing
6176 the variable as the BIV, as if it were simply incremented.
6178 Note that treating the entire pseudo as a BIV will result in making
6179 simple increments to any GIVs based on it. However, if the variable
6180 overflows in its declared mode but not its promoted mode, the result will
6181 be incorrect. This is acceptable if the variable is signed, since
6182 overflows in such cases are undefined, but not if it is unsigned, since
6183 those overflows are defined. So we only check for SIGN_EXTEND and
6186 If we cannot find a biv, we return 0. */
6189 basic_induction_var (const struct loop *loop, rtx x, enum machine_mode mode,
6190 rtx dest_reg, rtx p, rtx *inc_val, rtx *mult_val,
6195 rtx insn, set = 0, last, inc;
6197 code = GET_CODE (x);
6202 if (rtx_equal_p (XEXP (x, 0), dest_reg)
6203 || (GET_CODE (XEXP (x, 0)) == SUBREG
6204 && SUBREG_PROMOTED_VAR_P (XEXP (x, 0))
6205 && SUBREG_REG (XEXP (x, 0)) == dest_reg))
6207 argp = &XEXP (x, 1);
6209 else if (rtx_equal_p (XEXP (x, 1), dest_reg)
6210 || (GET_CODE (XEXP (x, 1)) == SUBREG
6211 && SUBREG_PROMOTED_VAR_P (XEXP (x, 1))
6212 && SUBREG_REG (XEXP (x, 1)) == dest_reg))
6214 argp = &XEXP (x, 0);
6220 if (loop_invariant_p (loop, arg) != 1)
6223 /* convert_modes can emit new instructions, e.g. when arg is a loop
6224 invariant MEM and dest_reg has a different mode.
6225 These instructions would be emitted after the end of the function
6226 and then *inc_val would be an uninitialized pseudo.
6227 Detect this and bail in this case.
6228 Other alternatives to solve this can be introducing a convert_modes
6229 variant which is allowed to fail but not allowed to emit new
6230 instructions, emit these instructions before loop start and let
6231 it be garbage collected if *inc_val is never used or saving the
6232 *inc_val initialization sequence generated here and when *inc_val
6233 is going to be actually used, emit it at some suitable place. */
6234 last = get_last_insn ();
6235 inc = convert_modes (GET_MODE (dest_reg), GET_MODE (x), arg, 0);
6236 if (get_last_insn () != last)
6238 delete_insns_since (last);
6243 *mult_val = const1_rtx;
6248 /* If what's inside the SUBREG is a BIV, then the SUBREG. This will
6249 handle addition of promoted variables.
6250 ??? The comment at the start of this function is wrong: promoted
6251 variable increments don't look like it says they do. */
6252 return basic_induction_var (loop, SUBREG_REG (x),
6253 GET_MODE (SUBREG_REG (x)),
6254 dest_reg, p, inc_val, mult_val, location);
6257 /* If this register is assigned in a previous insn, look at its
6258 source, but don't go outside the loop or past a label. */
6260 /* If this sets a register to itself, we would repeat any previous
6261 biv increment if we applied this strategy blindly. */
6262 if (rtx_equal_p (dest_reg, x))
6271 insn = PREV_INSN (insn);
6273 while (insn && GET_CODE (insn) == NOTE
6274 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG);
6278 set = single_set (insn);
6281 dest = SET_DEST (set);
6283 || (GET_CODE (dest) == SUBREG
6284 && (GET_MODE_SIZE (GET_MODE (dest)) <= UNITS_PER_WORD)
6285 && (GET_MODE_CLASS (GET_MODE (dest)) == MODE_INT)
6286 && SUBREG_REG (dest) == x))
6287 return basic_induction_var (loop, SET_SRC (set),
6288 (GET_MODE (SET_SRC (set)) == VOIDmode
6290 : GET_MODE (SET_SRC (set))),
6292 inc_val, mult_val, location);
6294 while (GET_CODE (dest) == SIGN_EXTRACT
6295 || GET_CODE (dest) == ZERO_EXTRACT
6296 || GET_CODE (dest) == SUBREG
6297 || GET_CODE (dest) == STRICT_LOW_PART)
6298 dest = XEXP (dest, 0);
6304 /* Can accept constant setting of biv only when inside inner most loop.
6305 Otherwise, a biv of an inner loop may be incorrectly recognized
6306 as a biv of the outer loop,
6307 causing code to be moved INTO the inner loop. */
6309 if (loop_invariant_p (loop, x) != 1)
6314 /* convert_modes aborts if we try to convert to or from CCmode, so just
6315 exclude that case. It is very unlikely that a condition code value
6316 would be a useful iterator anyways. convert_modes aborts if we try to
6317 convert a float mode to non-float or vice versa too. */
6318 if (loop->level == 1
6319 && GET_MODE_CLASS (mode) == GET_MODE_CLASS (GET_MODE (dest_reg))
6320 && GET_MODE_CLASS (mode) != MODE_CC)
6322 /* Possible bug here? Perhaps we don't know the mode of X. */
6323 last = get_last_insn ();
6324 inc = convert_modes (GET_MODE (dest_reg), mode, x, 0);
6325 if (get_last_insn () != last)
6327 delete_insns_since (last);
6332 *mult_val = const0_rtx;
6339 /* Ignore this BIV if signed arithmetic overflow is defined. */
6342 return basic_induction_var (loop, XEXP (x, 0), GET_MODE (XEXP (x, 0)),
6343 dest_reg, p, inc_val, mult_val, location);
6346 /* Similar, since this can be a sign extension. */
6347 for (insn = PREV_INSN (p);
6348 (insn && GET_CODE (insn) == NOTE
6349 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG);
6350 insn = PREV_INSN (insn))
6354 set = single_set (insn);
6356 if (! rtx_equal_p (dest_reg, XEXP (x, 0))
6357 && set && SET_DEST (set) == XEXP (x, 0)
6358 && GET_CODE (XEXP (x, 1)) == CONST_INT
6359 && INTVAL (XEXP (x, 1)) >= 0
6360 && GET_CODE (SET_SRC (set)) == ASHIFT
6361 && XEXP (x, 1) == XEXP (SET_SRC (set), 1))
6362 return basic_induction_var (loop, XEXP (SET_SRC (set), 0),
6363 GET_MODE (XEXP (x, 0)),
6364 dest_reg, insn, inc_val, mult_val,
6373 /* A general induction variable (giv) is any quantity that is a linear
6374 function of a basic induction variable,
6375 i.e. giv = biv * mult_val + add_val.
6376 The coefficients can be any loop invariant quantity.
6377 A giv need not be computed directly from the biv;
6378 it can be computed by way of other givs. */
6380 /* Determine whether X computes a giv.
6381 If it does, return a nonzero value
6382 which is the benefit from eliminating the computation of X;
6383 set *SRC_REG to the register of the biv that it is computed from;
6384 set *ADD_VAL and *MULT_VAL to the coefficients,
6385 such that the value of X is biv * mult + add; */
6388 general_induction_var (const struct loop *loop, rtx x, rtx *src_reg,
6389 rtx *add_val, rtx *mult_val, rtx *ext_val,
6390 int is_addr, int *pbenefit,
6391 enum machine_mode addr_mode)
6393 struct loop_ivs *ivs = LOOP_IVS (loop);
6396 /* If this is an invariant, forget it, it isn't a giv. */
6397 if (loop_invariant_p (loop, x) == 1)
6401 *ext_val = NULL_RTX;
6402 x = simplify_giv_expr (loop, x, ext_val, pbenefit);
6406 switch (GET_CODE (x))
6410 /* Since this is now an invariant and wasn't before, it must be a giv
6411 with MULT_VAL == 0. It doesn't matter which BIV we associate this
6413 *src_reg = ivs->list->biv->dest_reg;
6414 *mult_val = const0_rtx;
6419 /* This is equivalent to a BIV. */
6421 *mult_val = const1_rtx;
6422 *add_val = const0_rtx;
6426 /* Either (plus (biv) (invar)) or
6427 (plus (mult (biv) (invar_1)) (invar_2)). */
6428 if (GET_CODE (XEXP (x, 0)) == MULT)
6430 *src_reg = XEXP (XEXP (x, 0), 0);
6431 *mult_val = XEXP (XEXP (x, 0), 1);
6435 *src_reg = XEXP (x, 0);
6436 *mult_val = const1_rtx;
6438 *add_val = XEXP (x, 1);
6442 /* ADD_VAL is zero. */
6443 *src_reg = XEXP (x, 0);
6444 *mult_val = XEXP (x, 1);
6445 *add_val = const0_rtx;
6452 /* Remove any enclosing USE from ADD_VAL and MULT_VAL (there will be
6453 unless they are CONST_INT). */
6454 if (GET_CODE (*add_val) == USE)
6455 *add_val = XEXP (*add_val, 0);
6456 if (GET_CODE (*mult_val) == USE)
6457 *mult_val = XEXP (*mult_val, 0);
6460 *pbenefit += address_cost (orig_x, addr_mode) - reg_address_cost;
6462 *pbenefit += rtx_cost (orig_x, SET);
6464 /* Always return true if this is a giv so it will be detected as such,
6465 even if the benefit is zero or negative. This allows elimination
6466 of bivs that might otherwise not be eliminated. */
6470 /* Given an expression, X, try to form it as a linear function of a biv.
6471 We will canonicalize it to be of the form
6472 (plus (mult (BIV) (invar_1))
6474 with possible degeneracies.
6476 The invariant expressions must each be of a form that can be used as a
6477 machine operand. We surround then with a USE rtx (a hack, but localized
6478 and certainly unambiguous!) if not a CONST_INT for simplicity in this
6479 routine; it is the caller's responsibility to strip them.
6481 If no such canonicalization is possible (i.e., two biv's are used or an
6482 expression that is neither invariant nor a biv or giv), this routine
6485 For a nonzero return, the result will have a code of CONST_INT, USE,
6486 REG (for a BIV), PLUS, or MULT. No other codes will occur.
6488 *BENEFIT will be incremented by the benefit of any sub-giv encountered. */
6490 static rtx sge_plus (enum machine_mode, rtx, rtx);
6491 static rtx sge_plus_constant (rtx, rtx);
6494 simplify_giv_expr (const struct loop *loop, rtx x, rtx *ext_val, int *benefit)
6496 struct loop_ivs *ivs = LOOP_IVS (loop);
6497 struct loop_regs *regs = LOOP_REGS (loop);
6498 enum machine_mode mode = GET_MODE (x);
6502 /* If this is not an integer mode, or if we cannot do arithmetic in this
6503 mode, this can't be a giv. */
6504 if (mode != VOIDmode
6505 && (GET_MODE_CLASS (mode) != MODE_INT
6506 || GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT))
6509 switch (GET_CODE (x))
6512 arg0 = simplify_giv_expr (loop, XEXP (x, 0), ext_val, benefit);
6513 arg1 = simplify_giv_expr (loop, XEXP (x, 1), ext_val, benefit);
6514 if (arg0 == 0 || arg1 == 0)
6517 /* Put constant last, CONST_INT last if both constant. */
6518 if ((GET_CODE (arg0) == USE
6519 || GET_CODE (arg0) == CONST_INT)
6520 && ! ((GET_CODE (arg0) == USE
6521 && GET_CODE (arg1) == USE)
6522 || GET_CODE (arg1) == CONST_INT))
6523 tem = arg0, arg0 = arg1, arg1 = tem;
6525 /* Handle addition of zero, then addition of an invariant. */
6526 if (arg1 == const0_rtx)
6528 else if (GET_CODE (arg1) == CONST_INT || GET_CODE (arg1) == USE)
6529 switch (GET_CODE (arg0))
6533 /* Adding two invariants must result in an invariant, so enclose
6534 addition operation inside a USE and return it. */
6535 if (GET_CODE (arg0) == USE)
6536 arg0 = XEXP (arg0, 0);
6537 if (GET_CODE (arg1) == USE)
6538 arg1 = XEXP (arg1, 0);
6540 if (GET_CODE (arg0) == CONST_INT)
6541 tem = arg0, arg0 = arg1, arg1 = tem;
6542 if (GET_CODE (arg1) == CONST_INT)
6543 tem = sge_plus_constant (arg0, arg1);
6545 tem = sge_plus (mode, arg0, arg1);
6547 if (GET_CODE (tem) != CONST_INT)
6548 tem = gen_rtx_USE (mode, tem);
6553 /* biv + invar or mult + invar. Return sum. */
6554 return gen_rtx_PLUS (mode, arg0, arg1);
6557 /* (a + invar_1) + invar_2. Associate. */
6559 simplify_giv_expr (loop,
6571 /* Each argument must be either REG, PLUS, or MULT. Convert REG to
6572 MULT to reduce cases. */
6573 if (GET_CODE (arg0) == REG)
6574 arg0 = gen_rtx_MULT (mode, arg0, const1_rtx);
6575 if (GET_CODE (arg1) == REG)
6576 arg1 = gen_rtx_MULT (mode, arg1, const1_rtx);
6578 /* Now have PLUS + PLUS, PLUS + MULT, MULT + PLUS, or MULT + MULT.
6579 Put a MULT first, leaving PLUS + PLUS, MULT + PLUS, or MULT + MULT.
6580 Recurse to associate the second PLUS. */
6581 if (GET_CODE (arg1) == MULT)
6582 tem = arg0, arg0 = arg1, arg1 = tem;
6584 if (GET_CODE (arg1) == PLUS)
6586 simplify_giv_expr (loop,
6588 gen_rtx_PLUS (mode, arg0,
6593 /* Now must have MULT + MULT. Distribute if same biv, else not giv. */
6594 if (GET_CODE (arg0) != MULT || GET_CODE (arg1) != MULT)
6597 if (!rtx_equal_p (arg0, arg1))
6600 return simplify_giv_expr (loop,
6609 /* Handle "a - b" as "a + b * (-1)". */
6610 return simplify_giv_expr (loop,
6619 arg0 = simplify_giv_expr (loop, XEXP (x, 0), ext_val, benefit);
6620 arg1 = simplify_giv_expr (loop, XEXP (x, 1), ext_val, benefit);
6621 if (arg0 == 0 || arg1 == 0)
6624 /* Put constant last, CONST_INT last if both constant. */
6625 if ((GET_CODE (arg0) == USE || GET_CODE (arg0) == CONST_INT)
6626 && GET_CODE (arg1) != CONST_INT)
6627 tem = arg0, arg0 = arg1, arg1 = tem;
6629 /* If second argument is not now constant, not giv. */
6630 if (GET_CODE (arg1) != USE && GET_CODE (arg1) != CONST_INT)
6633 /* Handle multiply by 0 or 1. */
6634 if (arg1 == const0_rtx)
6637 else if (arg1 == const1_rtx)
6640 switch (GET_CODE (arg0))
6643 /* biv * invar. Done. */
6644 return gen_rtx_MULT (mode, arg0, arg1);
6647 /* Product of two constants. */
6648 return GEN_INT (INTVAL (arg0) * INTVAL (arg1));
6651 /* invar * invar is a giv, but attempt to simplify it somehow. */
6652 if (GET_CODE (arg1) != CONST_INT)
6655 arg0 = XEXP (arg0, 0);
6656 if (GET_CODE (arg0) == MULT)
6658 /* (invar_0 * invar_1) * invar_2. Associate. */
6659 return simplify_giv_expr (loop,
6668 /* Propagate the MULT expressions to the innermost nodes. */
6669 else if (GET_CODE (arg0) == PLUS)
6671 /* (invar_0 + invar_1) * invar_2. Distribute. */
6672 return simplify_giv_expr (loop,
6684 return gen_rtx_USE (mode, gen_rtx_MULT (mode, arg0, arg1));
6687 /* (a * invar_1) * invar_2. Associate. */
6688 return simplify_giv_expr (loop,
6697 /* (a + invar_1) * invar_2. Distribute. */
6698 return simplify_giv_expr (loop,
6713 /* Shift by constant is multiply by power of two. */
6714 if (GET_CODE (XEXP (x, 1)) != CONST_INT)
6718 simplify_giv_expr (loop,
6721 GEN_INT ((HOST_WIDE_INT) 1
6722 << INTVAL (XEXP (x, 1)))),
6726 /* "-a" is "a * (-1)" */
6727 return simplify_giv_expr (loop,
6728 gen_rtx_MULT (mode, XEXP (x, 0), constm1_rtx),
6732 /* "~a" is "-a - 1". Silly, but easy. */
6733 return simplify_giv_expr (loop,
6734 gen_rtx_MINUS (mode,
6735 gen_rtx_NEG (mode, XEXP (x, 0)),
6740 /* Already in proper form for invariant. */
6746 /* Conditionally recognize extensions of simple IVs. After we've
6747 computed loop traversal counts and verified the range of the
6748 source IV, we'll reevaluate this as a GIV. */
6749 if (*ext_val == NULL_RTX)
6751 arg0 = simplify_giv_expr (loop, XEXP (x, 0), ext_val, benefit);
6752 if (arg0 && *ext_val == NULL_RTX && GET_CODE (arg0) == REG)
6754 *ext_val = gen_rtx_fmt_e (GET_CODE (x), mode, arg0);
6761 /* If this is a new register, we can't deal with it. */
6762 if (REGNO (x) >= max_reg_before_loop)
6765 /* Check for biv or giv. */
6766 switch (REG_IV_TYPE (ivs, REGNO (x)))
6770 case GENERAL_INDUCT:
6772 struct induction *v = REG_IV_INFO (ivs, REGNO (x));
6774 /* Form expression from giv and add benefit. Ensure this giv
6775 can derive another and subtract any needed adjustment if so. */
6777 /* Increasing the benefit here is risky. The only case in which it
6778 is arguably correct is if this is the only use of V. In other
6779 cases, this will artificially inflate the benefit of the current
6780 giv, and lead to suboptimal code. Thus, it is disabled, since
6781 potentially not reducing an only marginally beneficial giv is
6782 less harmful than reducing many givs that are not really
6785 rtx single_use = regs->array[REGNO (x)].single_usage;
6786 if (single_use && single_use != const0_rtx)
6787 *benefit += v->benefit;
6793 tem = gen_rtx_PLUS (mode, gen_rtx_MULT (mode,
6794 v->src_reg, v->mult_val),
6797 if (v->derive_adjustment)
6798 tem = gen_rtx_MINUS (mode, tem, v->derive_adjustment);
6799 arg0 = simplify_giv_expr (loop, tem, ext_val, benefit);
6802 if (!v->ext_dependent)
6807 *ext_val = v->ext_dependent;
6815 /* If it isn't an induction variable, and it is invariant, we
6816 may be able to simplify things further by looking through
6817 the bits we just moved outside the loop. */
6818 if (loop_invariant_p (loop, x) == 1)
6821 struct loop_movables *movables = LOOP_MOVABLES (loop);
6823 for (m = movables->head; m; m = m->next)
6824 if (rtx_equal_p (x, m->set_dest))
6826 /* Ok, we found a match. Substitute and simplify. */
6828 /* If we match another movable, we must use that, as
6829 this one is going away. */
6831 return simplify_giv_expr (loop, m->match->set_dest,
6834 /* If consec is nonzero, this is a member of a group of
6835 instructions that were moved together. We handle this
6836 case only to the point of seeking to the last insn and
6837 looking for a REG_EQUAL. Fail if we don't find one. */
6844 tem = NEXT_INSN (tem);
6848 tem = find_reg_note (tem, REG_EQUAL, NULL_RTX);
6850 tem = XEXP (tem, 0);
6854 tem = single_set (m->insn);
6856 tem = SET_SRC (tem);
6861 /* What we are most interested in is pointer
6862 arithmetic on invariants -- only take
6863 patterns we may be able to do something with. */
6864 if (GET_CODE (tem) == PLUS
6865 || GET_CODE (tem) == MULT
6866 || GET_CODE (tem) == ASHIFT
6867 || GET_CODE (tem) == CONST_INT
6868 || GET_CODE (tem) == SYMBOL_REF)
6870 tem = simplify_giv_expr (loop, tem, ext_val,
6875 else if (GET_CODE (tem) == CONST
6876 && GET_CODE (XEXP (tem, 0)) == PLUS
6877 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == SYMBOL_REF
6878 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)
6880 tem = simplify_giv_expr (loop, XEXP (tem, 0),
6892 /* Fall through to general case. */
6894 /* If invariant, return as USE (unless CONST_INT).
6895 Otherwise, not giv. */
6896 if (GET_CODE (x) == USE)
6899 if (loop_invariant_p (loop, x) == 1)
6901 if (GET_CODE (x) == CONST_INT)
6903 if (GET_CODE (x) == CONST
6904 && GET_CODE (XEXP (x, 0)) == PLUS
6905 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
6906 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
6908 return gen_rtx_USE (mode, x);
6915 /* This routine folds invariants such that there is only ever one
6916 CONST_INT in the summation. It is only used by simplify_giv_expr. */
6919 sge_plus_constant (rtx x, rtx c)
6921 if (GET_CODE (x) == CONST_INT)
6922 return GEN_INT (INTVAL (x) + INTVAL (c));
6923 else if (GET_CODE (x) != PLUS)
6924 return gen_rtx_PLUS (GET_MODE (x), x, c);
6925 else if (GET_CODE (XEXP (x, 1)) == CONST_INT)
6927 return gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0),
6928 GEN_INT (INTVAL (XEXP (x, 1)) + INTVAL (c)));
6930 else if (GET_CODE (XEXP (x, 0)) == PLUS
6931 || GET_CODE (XEXP (x, 1)) != PLUS)
6933 return gen_rtx_PLUS (GET_MODE (x),
6934 sge_plus_constant (XEXP (x, 0), c), XEXP (x, 1));
6938 return gen_rtx_PLUS (GET_MODE (x),
6939 sge_plus_constant (XEXP (x, 1), c), XEXP (x, 0));
6944 sge_plus (enum machine_mode mode, rtx x, rtx y)
6946 while (GET_CODE (y) == PLUS)
6948 rtx a = XEXP (y, 0);
6949 if (GET_CODE (a) == CONST_INT)
6950 x = sge_plus_constant (x, a);
6952 x = gen_rtx_PLUS (mode, x, a);
6955 if (GET_CODE (y) == CONST_INT)
6956 x = sge_plus_constant (x, y);
6958 x = gen_rtx_PLUS (mode, x, y);
6962 /* Help detect a giv that is calculated by several consecutive insns;
6966 The caller has already identified the first insn P as having a giv as dest;
6967 we check that all other insns that set the same register follow
6968 immediately after P, that they alter nothing else,
6969 and that the result of the last is still a giv.
6971 The value is 0 if the reg set in P is not really a giv.
6972 Otherwise, the value is the amount gained by eliminating
6973 all the consecutive insns that compute the value.
6975 FIRST_BENEFIT is the amount gained by eliminating the first insn, P.
6976 SRC_REG is the reg of the biv; DEST_REG is the reg of the giv.
6978 The coefficients of the ultimate giv value are stored in
6979 *MULT_VAL and *ADD_VAL. */
6982 consec_sets_giv (const struct loop *loop, int first_benefit, rtx p,
6983 rtx src_reg, rtx dest_reg, rtx *add_val, rtx *mult_val,
6984 rtx *ext_val, rtx *last_consec_insn)
6986 struct loop_ivs *ivs = LOOP_IVS (loop);
6987 struct loop_regs *regs = LOOP_REGS (loop);
6994 /* Indicate that this is a giv so that we can update the value produced in
6995 each insn of the multi-insn sequence.
6997 This induction structure will be used only by the call to
6998 general_induction_var below, so we can allocate it on our stack.
6999 If this is a giv, our caller will replace the induct var entry with
7000 a new induction structure. */
7001 struct induction *v;
7003 if (REG_IV_TYPE (ivs, REGNO (dest_reg)) != UNKNOWN_INDUCT)
7006 v = alloca (sizeof (struct induction));
7007 v->src_reg = src_reg;
7008 v->mult_val = *mult_val;
7009 v->add_val = *add_val;
7010 v->benefit = first_benefit;
7012 v->derive_adjustment = 0;
7013 v->ext_dependent = NULL_RTX;
7015 REG_IV_TYPE (ivs, REGNO (dest_reg)) = GENERAL_INDUCT;
7016 REG_IV_INFO (ivs, REGNO (dest_reg)) = v;
7018 count = regs->array[REGNO (dest_reg)].n_times_set - 1;
7023 code = GET_CODE (p);
7025 /* If libcall, skip to end of call sequence. */
7026 if (code == INSN && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
7030 && (set = single_set (p))
7031 && GET_CODE (SET_DEST (set)) == REG
7032 && SET_DEST (set) == dest_reg
7033 && (general_induction_var (loop, SET_SRC (set), &src_reg,
7034 add_val, mult_val, ext_val, 0,
7036 /* Giv created by equivalent expression. */
7037 || ((temp = find_reg_note (p, REG_EQUAL, NULL_RTX))
7038 && general_induction_var (loop, XEXP (temp, 0), &src_reg,
7039 add_val, mult_val, ext_val, 0,
7040 &benefit, VOIDmode)))
7041 && src_reg == v->src_reg)
7043 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
7044 benefit += libcall_benefit (p);
7047 v->mult_val = *mult_val;
7048 v->add_val = *add_val;
7049 v->benefit += benefit;
7051 else if (code != NOTE)
7053 /* Allow insns that set something other than this giv to a
7054 constant. Such insns are needed on machines which cannot
7055 include long constants and should not disqualify a giv. */
7057 && (set = single_set (p))
7058 && SET_DEST (set) != dest_reg
7059 && CONSTANT_P (SET_SRC (set)))
7062 REG_IV_TYPE (ivs, REGNO (dest_reg)) = UNKNOWN_INDUCT;
7067 REG_IV_TYPE (ivs, REGNO (dest_reg)) = UNKNOWN_INDUCT;
7068 *last_consec_insn = p;
7072 /* Return an rtx, if any, that expresses giv G2 as a function of the register
7073 represented by G1. If no such expression can be found, or it is clear that
7074 it cannot possibly be a valid address, 0 is returned.
7076 To perform the computation, we note that
7079 where `v' is the biv.
7081 So G2 = (y/b) * G1 + (b - a*y/x).
7083 Note that MULT = y/x.
7085 Update: A and B are now allowed to be additive expressions such that
7086 B contains all variables in A. That is, computing B-A will not require
7087 subtracting variables. */
7090 express_from_1 (rtx a, rtx b, rtx mult)
7092 /* If MULT is zero, then A*MULT is zero, and our expression is B. */
7094 if (mult == const0_rtx)
7097 /* If MULT is not 1, we cannot handle A with non-constants, since we
7098 would then be required to subtract multiples of the registers in A.
7099 This is theoretically possible, and may even apply to some Fortran
7100 constructs, but it is a lot of work and we do not attempt it here. */
7102 if (mult != const1_rtx && GET_CODE (a) != CONST_INT)
7105 /* In general these structures are sorted top to bottom (down the PLUS
7106 chain), but not left to right across the PLUS. If B is a higher
7107 order giv than A, we can strip one level and recurse. If A is higher
7108 order, we'll eventually bail out, but won't know that until the end.
7109 If they are the same, we'll strip one level around this loop. */
7111 while (GET_CODE (a) == PLUS && GET_CODE (b) == PLUS)
7113 rtx ra, rb, oa, ob, tmp;
7115 ra = XEXP (a, 0), oa = XEXP (a, 1);
7116 if (GET_CODE (ra) == PLUS)
7117 tmp = ra, ra = oa, oa = tmp;
7119 rb = XEXP (b, 0), ob = XEXP (b, 1);
7120 if (GET_CODE (rb) == PLUS)
7121 tmp = rb, rb = ob, ob = tmp;
7123 if (rtx_equal_p (ra, rb))
7124 /* We matched: remove one reg completely. */
7126 else if (GET_CODE (ob) != PLUS && rtx_equal_p (ra, ob))
7127 /* An alternate match. */
7129 else if (GET_CODE (oa) != PLUS && rtx_equal_p (oa, rb))
7130 /* An alternate match. */
7134 /* Indicates an extra register in B. Strip one level from B and
7135 recurse, hoping B was the higher order expression. */
7136 ob = express_from_1 (a, ob, mult);
7139 return gen_rtx_PLUS (GET_MODE (b), rb, ob);
7143 /* Here we are at the last level of A, go through the cases hoping to
7144 get rid of everything but a constant. */
7146 if (GET_CODE (a) == PLUS)
7150 ra = XEXP (a, 0), oa = XEXP (a, 1);
7151 if (rtx_equal_p (oa, b))
7153 else if (!rtx_equal_p (ra, b))
7156 if (GET_CODE (oa) != CONST_INT)
7159 return GEN_INT (-INTVAL (oa) * INTVAL (mult));
7161 else if (GET_CODE (a) == CONST_INT)
7163 return plus_constant (b, -INTVAL (a) * INTVAL (mult));
7165 else if (CONSTANT_P (a))
7167 enum machine_mode mode_a = GET_MODE (a);
7168 enum machine_mode mode_b = GET_MODE (b);
7169 enum machine_mode mode = mode_b == VOIDmode ? mode_a : mode_b;
7170 return simplify_gen_binary (MINUS, mode, b, a);
7172 else if (GET_CODE (b) == PLUS)
7174 if (rtx_equal_p (a, XEXP (b, 0)))
7176 else if (rtx_equal_p (a, XEXP (b, 1)))
7181 else if (rtx_equal_p (a, b))
7188 express_from (struct induction *g1, struct induction *g2)
7192 /* The value that G1 will be multiplied by must be a constant integer. Also,
7193 the only chance we have of getting a valid address is if b*c/a (see above
7194 for notation) is also an integer. */
7195 if (GET_CODE (g1->mult_val) == CONST_INT
7196 && GET_CODE (g2->mult_val) == CONST_INT)
7198 if (g1->mult_val == const0_rtx
7199 || (g1->mult_val == constm1_rtx
7200 && INTVAL (g2->mult_val)
7201 == (HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1))
7202 || INTVAL (g2->mult_val) % INTVAL (g1->mult_val) != 0)
7204 mult = GEN_INT (INTVAL (g2->mult_val) / INTVAL (g1->mult_val));
7206 else if (rtx_equal_p (g1->mult_val, g2->mult_val))
7210 /* ??? Find out if the one is a multiple of the other? */
7214 add = express_from_1 (g1->add_val, g2->add_val, mult);
7215 if (add == NULL_RTX)
7217 /* Failed. If we've got a multiplication factor between G1 and G2,
7218 scale G1's addend and try again. */
7219 if (INTVAL (mult) > 1)
7221 rtx g1_add_val = g1->add_val;
7222 if (GET_CODE (g1_add_val) == MULT
7223 && GET_CODE (XEXP (g1_add_val, 1)) == CONST_INT)
7226 m = INTVAL (mult) * INTVAL (XEXP (g1_add_val, 1));
7227 g1_add_val = gen_rtx_MULT (GET_MODE (g1_add_val),
7228 XEXP (g1_add_val, 0), GEN_INT (m));
7232 g1_add_val = gen_rtx_MULT (GET_MODE (g1_add_val), g1_add_val,
7236 add = express_from_1 (g1_add_val, g2->add_val, const1_rtx);
7239 if (add == NULL_RTX)
7242 /* Form simplified final result. */
7243 if (mult == const0_rtx)
7245 else if (mult == const1_rtx)
7246 mult = g1->dest_reg;
7248 mult = gen_rtx_MULT (g2->mode, g1->dest_reg, mult);
7250 if (add == const0_rtx)
7254 if (GET_CODE (add) == PLUS
7255 && CONSTANT_P (XEXP (add, 1)))
7257 rtx tem = XEXP (add, 1);
7258 mult = gen_rtx_PLUS (g2->mode, mult, XEXP (add, 0));
7262 return gen_rtx_PLUS (g2->mode, mult, add);
7266 /* Return an rtx, if any, that expresses giv G2 as a function of the register
7267 represented by G1. This indicates that G2 should be combined with G1 and
7268 that G2 can use (either directly or via an address expression) a register
7269 used to represent G1. */
7272 combine_givs_p (struct induction *g1, struct induction *g2)
7276 /* With the introduction of ext dependent givs, we must care for modes.
7277 G2 must not use a wider mode than G1. */
7278 if (GET_MODE_SIZE (g1->mode) < GET_MODE_SIZE (g2->mode))
7281 ret = comb = express_from (g1, g2);
7282 if (comb == NULL_RTX)
7284 if (g1->mode != g2->mode)
7285 ret = gen_lowpart (g2->mode, comb);
7287 /* If these givs are identical, they can be combined. We use the results
7288 of express_from because the addends are not in a canonical form, so
7289 rtx_equal_p is a weaker test. */
7290 /* But don't combine a DEST_REG giv with a DEST_ADDR giv; we want the
7291 combination to be the other way round. */
7292 if (comb == g1->dest_reg
7293 && (g1->giv_type == DEST_REG || g2->giv_type == DEST_ADDR))
7298 /* If G2 can be expressed as a function of G1 and that function is valid
7299 as an address and no more expensive than using a register for G2,
7300 the expression of G2 in terms of G1 can be used. */
7302 && g2->giv_type == DEST_ADDR
7303 && memory_address_p (GET_MODE (g2->mem), ret))
7309 /* Check each extension dependent giv in this class to see if its
7310 root biv is safe from wrapping in the interior mode, which would
7311 make the giv illegal. */
7314 check_ext_dependent_givs (const struct loop *loop, struct iv_class *bl)
7316 struct loop_info *loop_info = LOOP_INFO (loop);
7317 int ze_ok = 0, se_ok = 0, info_ok = 0;
7318 enum machine_mode biv_mode = GET_MODE (bl->biv->src_reg);
7319 HOST_WIDE_INT start_val;
7320 unsigned HOST_WIDE_INT u_end_val = 0;
7321 unsigned HOST_WIDE_INT u_start_val = 0;
7323 struct induction *v;
7325 /* Make sure the iteration data is available. We must have
7326 constants in order to be certain of no overflow. */
7327 if (loop_info->n_iterations > 0
7328 && bl->initial_value
7329 && GET_CODE (bl->initial_value) == CONST_INT
7330 && (incr = biv_total_increment (bl))
7331 && GET_CODE (incr) == CONST_INT
7332 /* Make sure the host can represent the arithmetic. */
7333 && HOST_BITS_PER_WIDE_INT >= GET_MODE_BITSIZE (biv_mode))
7335 unsigned HOST_WIDE_INT abs_incr, total_incr;
7336 HOST_WIDE_INT s_end_val;
7340 start_val = INTVAL (bl->initial_value);
7341 u_start_val = start_val;
7343 neg_incr = 0, abs_incr = INTVAL (incr);
7344 if (INTVAL (incr) < 0)
7345 neg_incr = 1, abs_incr = -abs_incr;
7346 total_incr = abs_incr * loop_info->n_iterations;
7348 /* Check for host arithmetic overflow. */
7349 if (total_incr / loop_info->n_iterations == abs_incr)
7351 unsigned HOST_WIDE_INT u_max;
7352 HOST_WIDE_INT s_max;
7354 u_end_val = start_val + (neg_incr ? -total_incr : total_incr);
7355 s_end_val = u_end_val;
7356 u_max = GET_MODE_MASK (biv_mode);
7359 /* Check zero extension of biv ok. */
7361 /* Check for host arithmetic overflow. */
7363 ? u_end_val < u_start_val
7364 : u_end_val > u_start_val)
7365 /* Check for target arithmetic overflow. */
7367 ? 1 /* taken care of with host overflow */
7368 : u_end_val <= u_max))
7373 /* Check sign extension of biv ok. */
7374 /* ??? While it is true that overflow with signed and pointer
7375 arithmetic is undefined, I fear too many programmers don't
7376 keep this fact in mind -- myself included on occasion.
7377 So leave alone with the signed overflow optimizations. */
7378 if (start_val >= -s_max - 1
7379 /* Check for host arithmetic overflow. */
7381 ? s_end_val < start_val
7382 : s_end_val > start_val)
7383 /* Check for target arithmetic overflow. */
7385 ? s_end_val >= -s_max - 1
7386 : s_end_val <= s_max))
7393 /* If we know the BIV is compared at run-time against an
7394 invariant value, and the increment is +/- 1, we may also
7395 be able to prove that the BIV cannot overflow. */
7396 else if (bl->biv->src_reg == loop_info->iteration_var
7397 && loop_info->comparison_value
7398 && loop_invariant_p (loop, loop_info->comparison_value)
7399 && (incr = biv_total_increment (bl))
7400 && GET_CODE (incr) == CONST_INT)
7402 /* If the increment is +1, and the exit test is a <,
7403 the BIV cannot overflow. (For <=, we have the
7404 problematic case that the comparison value might
7405 be the maximum value of the range.) */
7406 if (INTVAL (incr) == 1)
7408 if (loop_info->comparison_code == LT)
7410 else if (loop_info->comparison_code == LTU)
7414 /* Likewise for increment -1 and exit test >. */
7415 if (INTVAL (incr) == -1)
7417 if (loop_info->comparison_code == GT)
7419 else if (loop_info->comparison_code == GTU)
7424 /* Invalidate givs that fail the tests. */
7425 for (v = bl->giv; v; v = v->next_iv)
7426 if (v->ext_dependent)
7428 enum rtx_code code = GET_CODE (v->ext_dependent);
7441 /* We don't know whether this value is being used as either
7442 signed or unsigned, so to safely truncate we must satisfy
7443 both. The initial check here verifies the BIV itself;
7444 once that is successful we may check its range wrt the
7445 derived GIV. This works only if we were able to determine
7446 constant start and end values above. */
7447 if (se_ok && ze_ok && info_ok)
7449 enum machine_mode outer_mode = GET_MODE (v->ext_dependent);
7450 unsigned HOST_WIDE_INT max = GET_MODE_MASK (outer_mode) >> 1;
7452 /* We know from the above that both endpoints are nonnegative,
7453 and that there is no wrapping. Verify that both endpoints
7454 are within the (signed) range of the outer mode. */
7455 if (u_start_val <= max && u_end_val <= max)
7466 if (loop_dump_stream)
7468 fprintf (loop_dump_stream,
7469 "Verified ext dependent giv at %d of reg %d\n",
7470 INSN_UID (v->insn), bl->regno);
7475 if (loop_dump_stream)
7480 why = "biv iteration values overflowed";
7484 incr = biv_total_increment (bl);
7485 if (incr == const1_rtx)
7486 why = "biv iteration info incomplete; incr by 1";
7488 why = "biv iteration info incomplete";
7491 fprintf (loop_dump_stream,
7492 "Failed ext dependent giv at %d, %s\n",
7493 INSN_UID (v->insn), why);
7496 bl->all_reduced = 0;
7501 /* Generate a version of VALUE in a mode appropriate for initializing V. */
7504 extend_value_for_giv (struct induction *v, rtx value)
7506 rtx ext_dep = v->ext_dependent;
7511 /* Recall that check_ext_dependent_givs verified that the known bounds
7512 of a biv did not overflow or wrap with respect to the extension for
7513 the giv. Therefore, constants need no additional adjustment. */
7514 if (CONSTANT_P (value) && GET_MODE (value) == VOIDmode)
7517 /* Otherwise, we must adjust the value to compensate for the
7518 differing modes of the biv and the giv. */
7519 return gen_rtx_fmt_e (GET_CODE (ext_dep), GET_MODE (ext_dep), value);
7522 struct combine_givs_stats
7529 cmp_combine_givs_stats (const void *xp, const void *yp)
7531 const struct combine_givs_stats * const x =
7532 (const struct combine_givs_stats *) xp;
7533 const struct combine_givs_stats * const y =
7534 (const struct combine_givs_stats *) yp;
7536 d = y->total_benefit - x->total_benefit;
7537 /* Stabilize the sort. */
7539 d = x->giv_number - y->giv_number;
7543 /* Check all pairs of givs for iv_class BL and see if any can be combined with
7544 any other. If so, point SAME to the giv combined with and set NEW_REG to
7545 be an expression (in terms of the other giv's DEST_REG) equivalent to the
7546 giv. Also, update BENEFIT and related fields for cost/benefit analysis. */
7549 combine_givs (struct loop_regs *regs, struct iv_class *bl)
7551 /* Additional benefit to add for being combined multiple times. */
7552 const int extra_benefit = 3;
7554 struct induction *g1, *g2, **giv_array;
7555 int i, j, k, giv_count;
7556 struct combine_givs_stats *stats;
7559 /* Count givs, because bl->giv_count is incorrect here. */
7561 for (g1 = bl->giv; g1; g1 = g1->next_iv)
7565 giv_array = alloca (giv_count * sizeof (struct induction *));
7567 for (g1 = bl->giv; g1; g1 = g1->next_iv)
7569 giv_array[i++] = g1;
7571 stats = xcalloc (giv_count, sizeof (*stats));
7572 can_combine = xcalloc (giv_count, giv_count * sizeof (rtx));
7574 for (i = 0; i < giv_count; i++)
7580 stats[i].giv_number = i;
7582 /* If a DEST_REG GIV is used only once, do not allow it to combine
7583 with anything, for in doing so we will gain nothing that cannot
7584 be had by simply letting the GIV with which we would have combined
7585 to be reduced on its own. The losage shows up in particular with
7586 DEST_ADDR targets on hosts with reg+reg addressing, though it can
7587 be seen elsewhere as well. */
7588 if (g1->giv_type == DEST_REG
7589 && (single_use = regs->array[REGNO (g1->dest_reg)].single_usage)
7590 && single_use != const0_rtx)
7593 this_benefit = g1->benefit;
7594 /* Add an additional weight for zero addends. */
7595 if (g1->no_const_addval)
7598 for (j = 0; j < giv_count; j++)
7604 && (this_combine = combine_givs_p (g1, g2)) != NULL_RTX)
7606 can_combine[i * giv_count + j] = this_combine;
7607 this_benefit += g2->benefit + extra_benefit;
7610 stats[i].total_benefit = this_benefit;
7613 /* Iterate, combining until we can't. */
7615 qsort (stats, giv_count, sizeof (*stats), cmp_combine_givs_stats);
7617 if (loop_dump_stream)
7619 fprintf (loop_dump_stream, "Sorted combine statistics:\n");
7620 for (k = 0; k < giv_count; k++)
7622 g1 = giv_array[stats[k].giv_number];
7623 if (!g1->combined_with && !g1->same)
7624 fprintf (loop_dump_stream, " {%d, %d}",
7625 INSN_UID (giv_array[stats[k].giv_number]->insn),
7626 stats[k].total_benefit);
7628 putc ('\n', loop_dump_stream);
7631 for (k = 0; k < giv_count; k++)
7633 int g1_add_benefit = 0;
7635 i = stats[k].giv_number;
7638 /* If it has already been combined, skip. */
7639 if (g1->combined_with || g1->same)
7642 for (j = 0; j < giv_count; j++)
7645 if (g1 != g2 && can_combine[i * giv_count + j]
7646 /* If it has already been combined, skip. */
7647 && ! g2->same && ! g2->combined_with)
7651 g2->new_reg = can_combine[i * giv_count + j];
7653 /* For destination, we now may replace by mem expression instead
7654 of register. This changes the costs considerably, so add the
7656 if (g2->giv_type == DEST_ADDR)
7657 g2->benefit = (g2->benefit + reg_address_cost
7658 - address_cost (g2->new_reg,
7659 GET_MODE (g2->mem)));
7660 g1->combined_with++;
7661 g1->lifetime += g2->lifetime;
7663 g1_add_benefit += g2->benefit;
7665 /* ??? The new final_[bg]iv_value code does a much better job
7666 of finding replaceable giv's, and hence this code may no
7667 longer be necessary. */
7668 if (! g2->replaceable && REG_USERVAR_P (g2->dest_reg))
7669 g1_add_benefit -= copy_cost;
7671 /* To help optimize the next set of combinations, remove
7672 this giv from the benefits of other potential mates. */
7673 for (l = 0; l < giv_count; ++l)
7675 int m = stats[l].giv_number;
7676 if (can_combine[m * giv_count + j])
7677 stats[l].total_benefit -= g2->benefit + extra_benefit;
7680 if (loop_dump_stream)
7681 fprintf (loop_dump_stream,
7682 "giv at %d combined with giv at %d; new benefit %d + %d, lifetime %d\n",
7683 INSN_UID (g2->insn), INSN_UID (g1->insn),
7684 g1->benefit, g1_add_benefit, g1->lifetime);
7688 /* To help optimize the next set of combinations, remove
7689 this giv from the benefits of other potential mates. */
7690 if (g1->combined_with)
7692 for (j = 0; j < giv_count; ++j)
7694 int m = stats[j].giv_number;
7695 if (can_combine[m * giv_count + i])
7696 stats[j].total_benefit -= g1->benefit + extra_benefit;
7699 g1->benefit += g1_add_benefit;
7701 /* We've finished with this giv, and everything it touched.
7702 Restart the combination so that proper weights for the
7703 rest of the givs are properly taken into account. */
7704 /* ??? Ideally we would compact the arrays at this point, so
7705 as to not cover old ground. But sanely compacting
7706 can_combine is tricky. */
7716 /* Generate sequence for REG = B * M + A. B is the initial value of
7717 the basic induction variable, M a multiplicative constant, A an
7718 additive constant and REG the destination register. */
7721 gen_add_mult (rtx b, rtx m, rtx a, rtx reg)
7727 /* Use unsigned arithmetic. */
7728 result = expand_mult_add (b, reg, m, a, GET_MODE (reg), 1);
7730 emit_move_insn (reg, result);
7738 /* Update registers created in insn sequence SEQ. */
7741 loop_regs_update (const struct loop *loop ATTRIBUTE_UNUSED, rtx seq)
7745 /* Update register info for alias analysis. */
7748 while (insn != NULL_RTX)
7750 rtx set = single_set (insn);
7752 if (set && GET_CODE (SET_DEST (set)) == REG)
7753 record_base_value (REGNO (SET_DEST (set)), SET_SRC (set), 0);
7755 insn = NEXT_INSN (insn);
7760 /* EMIT code before BEFORE_BB/BEFORE_INSN to set REG = B * M + A. B
7761 is the initial value of the basic induction variable, M a
7762 multiplicative constant, A an additive constant and REG the
7763 destination register. */
7766 loop_iv_add_mult_emit_before (const struct loop *loop, rtx b, rtx m, rtx a,
7767 rtx reg, basic_block before_bb, rtx before_insn)
7773 loop_iv_add_mult_hoist (loop, b, m, a, reg);
7777 /* Use copy_rtx to prevent unexpected sharing of these rtx. */
7778 seq = gen_add_mult (copy_rtx (b), copy_rtx (m), copy_rtx (a), reg);
7780 /* Increase the lifetime of any invariants moved further in code. */
7781 update_reg_last_use (a, before_insn);
7782 update_reg_last_use (b, before_insn);
7783 update_reg_last_use (m, before_insn);
7785 /* It is possible that the expansion created lots of new registers.
7786 Iterate over the sequence we just created and record them all. We
7787 must do this before inserting the sequence. */
7788 loop_regs_update (loop, seq);
7790 loop_insn_emit_before (loop, before_bb, before_insn, seq);
7794 /* Emit insns in loop pre-header to set REG = B * M + A. B is the
7795 initial value of the basic induction variable, M a multiplicative
7796 constant, A an additive constant and REG the destination
7800 loop_iv_add_mult_sink (const struct loop *loop, rtx b, rtx m, rtx a, rtx reg)
7804 /* Use copy_rtx to prevent unexpected sharing of these rtx. */
7805 seq = gen_add_mult (copy_rtx (b), copy_rtx (m), copy_rtx (a), reg);
7807 /* Increase the lifetime of any invariants moved further in code.
7808 ???? Is this really necessary? */
7809 update_reg_last_use (a, loop->sink);
7810 update_reg_last_use (b, loop->sink);
7811 update_reg_last_use (m, loop->sink);
7813 /* It is possible that the expansion created lots of new registers.
7814 Iterate over the sequence we just created and record them all. We
7815 must do this before inserting the sequence. */
7816 loop_regs_update (loop, seq);
7818 loop_insn_sink (loop, seq);
7822 /* Emit insns after loop to set REG = B * M + A. B is the initial
7823 value of the basic induction variable, M a multiplicative constant,
7824 A an additive constant and REG the destination register. */
7827 loop_iv_add_mult_hoist (const struct loop *loop, rtx b, rtx m, rtx a, rtx reg)
7831 /* Use copy_rtx to prevent unexpected sharing of these rtx. */
7832 seq = gen_add_mult (copy_rtx (b), copy_rtx (m), copy_rtx (a), reg);
7834 /* It is possible that the expansion created lots of new registers.
7835 Iterate over the sequence we just created and record them all. We
7836 must do this before inserting the sequence. */
7837 loop_regs_update (loop, seq);
7839 loop_insn_hoist (loop, seq);
7844 /* Similar to gen_add_mult, but compute cost rather than generating
7848 iv_add_mult_cost (rtx b, rtx m, rtx a, rtx reg)
7854 result = expand_mult_add (b, reg, m, a, GET_MODE (reg), 1);
7856 emit_move_insn (reg, result);
7857 last = get_last_insn ();
7860 rtx t = single_set (last);
7862 cost += rtx_cost (SET_SRC (t), SET);
7863 last = PREV_INSN (last);
7869 /* Test whether A * B can be computed without
7870 an actual multiply insn. Value is 1 if so.
7872 ??? This function stinks because it generates a ton of wasted RTL
7873 ??? and as a result fragments GC memory to no end. There are other
7874 ??? places in the compiler which are invoked a lot and do the same
7875 ??? thing, generate wasted RTL just to see if something is possible. */
7878 product_cheap_p (rtx a, rtx b)
7883 /* If only one is constant, make it B. */
7884 if (GET_CODE (a) == CONST_INT)
7885 tmp = a, a = b, b = tmp;
7887 /* If first constant, both constant, so don't need multiply. */
7888 if (GET_CODE (a) == CONST_INT)
7891 /* If second not constant, neither is constant, so would need multiply. */
7892 if (GET_CODE (b) != CONST_INT)
7895 /* One operand is constant, so might not need multiply insn. Generate the
7896 code for the multiply and see if a call or multiply, or long sequence
7897 of insns is generated. */
7900 expand_mult (GET_MODE (a), a, b, NULL_RTX, 1);
7908 while (tmp != NULL_RTX)
7910 rtx next = NEXT_INSN (tmp);
7913 || GET_CODE (tmp) != INSN
7914 || (GET_CODE (PATTERN (tmp)) == SET
7915 && GET_CODE (SET_SRC (PATTERN (tmp))) == MULT)
7916 || (GET_CODE (PATTERN (tmp)) == PARALLEL
7917 && GET_CODE (XVECEXP (PATTERN (tmp), 0, 0)) == SET
7918 && GET_CODE (SET_SRC (XVECEXP (PATTERN (tmp), 0, 0))) == MULT))
7927 else if (GET_CODE (tmp) == SET
7928 && GET_CODE (SET_SRC (tmp)) == MULT)
7930 else if (GET_CODE (tmp) == PARALLEL
7931 && GET_CODE (XVECEXP (tmp, 0, 0)) == SET
7932 && GET_CODE (SET_SRC (XVECEXP (tmp, 0, 0))) == MULT)
7938 /* Check to see if loop can be terminated by a "decrement and branch until
7939 zero" instruction. If so, add a REG_NONNEG note to the branch insn if so.
7940 Also try reversing an increment loop to a decrement loop
7941 to see if the optimization can be performed.
7942 Value is nonzero if optimization was performed. */
7944 /* This is useful even if the architecture doesn't have such an insn,
7945 because it might change a loops which increments from 0 to n to a loop
7946 which decrements from n to 0. A loop that decrements to zero is usually
7947 faster than one that increments from zero. */
7949 /* ??? This could be rewritten to use some of the loop unrolling procedures,
7950 such as approx_final_value, biv_total_increment, loop_iterations, and
7951 final_[bg]iv_value. */
7954 check_dbra_loop (struct loop *loop, int insn_count)
7956 struct loop_info *loop_info = LOOP_INFO (loop);
7957 struct loop_regs *regs = LOOP_REGS (loop);
7958 struct loop_ivs *ivs = LOOP_IVS (loop);
7959 struct iv_class *bl;
7966 rtx before_comparison;
7970 int compare_and_branch;
7971 rtx loop_start = loop->start;
7972 rtx loop_end = loop->end;
7974 /* If last insn is a conditional branch, and the insn before tests a
7975 register value, try to optimize it. Otherwise, we can't do anything. */
7977 jump = PREV_INSN (loop_end);
7978 comparison = get_condition_for_loop (loop, jump);
7979 if (comparison == 0)
7981 if (!onlyjump_p (jump))
7984 /* Try to compute whether the compare/branch at the loop end is one or
7985 two instructions. */
7986 get_condition (jump, &first_compare, false);
7987 if (first_compare == jump)
7988 compare_and_branch = 1;
7989 else if (first_compare == prev_nonnote_insn (jump))
7990 compare_and_branch = 2;
7995 /* If more than one condition is present to control the loop, then
7996 do not proceed, as this function does not know how to rewrite
7997 loop tests with more than one condition.
7999 Look backwards from the first insn in the last comparison
8000 sequence and see if we've got another comparison sequence. */
8003 if ((jump1 = prev_nonnote_insn (first_compare)) != loop->cont)
8004 if (GET_CODE (jump1) == JUMP_INSN)
8008 /* Check all of the bivs to see if the compare uses one of them.
8009 Skip biv's set more than once because we can't guarantee that
8010 it will be zero on the last iteration. Also skip if the biv is
8011 used between its update and the test insn. */
8013 for (bl = ivs->list; bl; bl = bl->next)
8015 if (bl->biv_count == 1
8016 && ! bl->biv->maybe_multiple
8017 && bl->biv->dest_reg == XEXP (comparison, 0)
8018 && ! reg_used_between_p (regno_reg_rtx[bl->regno], bl->biv->insn,
8023 /* Try swapping the comparison to identify a suitable biv. */
8025 for (bl = ivs->list; bl; bl = bl->next)
8026 if (bl->biv_count == 1
8027 && ! bl->biv->maybe_multiple
8028 && bl->biv->dest_reg == XEXP (comparison, 1)
8029 && ! reg_used_between_p (regno_reg_rtx[bl->regno], bl->biv->insn,
8032 comparison = gen_rtx_fmt_ee (swap_condition (GET_CODE (comparison)),
8034 XEXP (comparison, 1),
8035 XEXP (comparison, 0));
8042 /* Look for the case where the basic induction variable is always
8043 nonnegative, and equals zero on the last iteration.
8044 In this case, add a reg_note REG_NONNEG, which allows the
8045 m68k DBRA instruction to be used. */
8047 if (((GET_CODE (comparison) == GT && XEXP (comparison, 1) == constm1_rtx)
8048 || (GET_CODE (comparison) == NE && XEXP (comparison, 1) == const0_rtx))
8049 && GET_CODE (bl->biv->add_val) == CONST_INT
8050 && INTVAL (bl->biv->add_val) < 0)
8052 /* Initial value must be greater than 0,
8053 init_val % -dec_value == 0 to ensure that it equals zero on
8054 the last iteration */
8056 if (GET_CODE (bl->initial_value) == CONST_INT
8057 && INTVAL (bl->initial_value) > 0
8058 && (INTVAL (bl->initial_value)
8059 % (-INTVAL (bl->biv->add_val))) == 0)
8061 /* register always nonnegative, add REG_NOTE to branch */
8062 if (! find_reg_note (jump, REG_NONNEG, NULL_RTX))
8064 = gen_rtx_EXPR_LIST (REG_NONNEG, bl->biv->dest_reg,
8071 /* If the decrement is 1 and the value was tested as >= 0 before
8072 the loop, then we can safely optimize. */
8073 for (p = loop_start; p; p = PREV_INSN (p))
8075 if (GET_CODE (p) == CODE_LABEL)
8077 if (GET_CODE (p) != JUMP_INSN)
8080 before_comparison = get_condition_for_loop (loop, p);
8081 if (before_comparison
8082 && XEXP (before_comparison, 0) == bl->biv->dest_reg
8083 && (GET_CODE (before_comparison) == LT
8084 || GET_CODE (before_comparison) == LTU)
8085 && XEXP (before_comparison, 1) == const0_rtx
8086 && ! reg_set_between_p (bl->biv->dest_reg, p, loop_start)
8087 && INTVAL (bl->biv->add_val) == -1)
8089 if (! find_reg_note (jump, REG_NONNEG, NULL_RTX))
8091 = gen_rtx_EXPR_LIST (REG_NONNEG, bl->biv->dest_reg,
8099 else if (GET_CODE (bl->biv->add_val) == CONST_INT
8100 && INTVAL (bl->biv->add_val) > 0)
8102 /* Try to change inc to dec, so can apply above optimization. */
8104 all registers modified are induction variables or invariant,
8105 all memory references have non-overlapping addresses
8106 (obviously true if only one write)
8107 allow 2 insns for the compare/jump at the end of the loop. */
8108 /* Also, we must avoid any instructions which use both the reversed
8109 biv and another biv. Such instructions will fail if the loop is
8110 reversed. We meet this condition by requiring that either
8111 no_use_except_counting is true, or else that there is only
8113 int num_nonfixed_reads = 0;
8114 /* 1 if the iteration var is used only to count iterations. */
8115 int no_use_except_counting = 0;
8116 /* 1 if the loop has no memory store, or it has a single memory store
8117 which is reversible. */
8118 int reversible_mem_store = 1;
8120 if (bl->giv_count == 0
8121 && !loop->exit_count
8122 && !loop_info->has_multiple_exit_targets)
8124 rtx bivreg = regno_reg_rtx[bl->regno];
8125 struct iv_class *blt;
8127 /* If there are no givs for this biv, and the only exit is the
8128 fall through at the end of the loop, then
8129 see if perhaps there are no uses except to count. */
8130 no_use_except_counting = 1;
8131 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
8134 rtx set = single_set (p);
8136 if (set && GET_CODE (SET_DEST (set)) == REG
8137 && REGNO (SET_DEST (set)) == bl->regno)
8138 /* An insn that sets the biv is okay. */
8140 else if (!reg_mentioned_p (bivreg, PATTERN (p)))
8141 /* An insn that doesn't mention the biv is okay. */
8143 else if (p == prev_nonnote_insn (prev_nonnote_insn (loop_end))
8144 || p == prev_nonnote_insn (loop_end))
8146 /* If either of these insns uses the biv and sets a pseudo
8147 that has more than one usage, then the biv has uses
8148 other than counting since it's used to derive a value
8149 that is used more than one time. */
8150 note_stores (PATTERN (p), note_set_pseudo_multiple_uses,
8152 if (regs->multiple_uses)
8154 no_use_except_counting = 0;
8160 no_use_except_counting = 0;
8165 /* A biv has uses besides counting if it is used to set
8167 for (blt = ivs->list; blt; blt = blt->next)
8169 && reg_mentioned_p (bivreg, SET_SRC (blt->init_set)))
8171 no_use_except_counting = 0;
8176 if (no_use_except_counting)
8177 /* No need to worry about MEMs. */
8179 else if (loop_info->num_mem_sets <= 1)
8181 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
8183 num_nonfixed_reads += count_nonfixed_reads (loop, PATTERN (p));
8185 /* If the loop has a single store, and the destination address is
8186 invariant, then we can't reverse the loop, because this address
8187 might then have the wrong value at loop exit.
8188 This would work if the source was invariant also, however, in that
8189 case, the insn should have been moved out of the loop. */
8191 if (loop_info->num_mem_sets == 1)
8193 struct induction *v;
8195 /* If we could prove that each of the memory locations
8196 written to was different, then we could reverse the
8197 store -- but we don't presently have any way of
8199 reversible_mem_store = 0;
8201 /* If the store depends on a register that is set after the
8202 store, it depends on the initial value, and is thus not
8204 for (v = bl->giv; reversible_mem_store && v; v = v->next_iv)
8206 if (v->giv_type == DEST_REG
8207 && reg_mentioned_p (v->dest_reg,
8208 PATTERN (loop_info->first_loop_store_insn))
8209 && loop_insn_first_p (loop_info->first_loop_store_insn,
8211 reversible_mem_store = 0;
8218 /* This code only acts for innermost loops. Also it simplifies
8219 the memory address check by only reversing loops with
8220 zero or one memory access.
8221 Two memory accesses could involve parts of the same array,
8222 and that can't be reversed.
8223 If the biv is used only for counting, than we don't need to worry
8224 about all these things. */
8226 if ((num_nonfixed_reads <= 1
8227 && ! loop_info->has_nonconst_call
8228 && ! loop_info->has_prefetch
8229 && ! loop_info->has_volatile
8230 && reversible_mem_store
8231 && (bl->giv_count + bl->biv_count + loop_info->num_mem_sets
8232 + num_unmoved_movables (loop) + compare_and_branch == insn_count)
8233 && (bl == ivs->list && bl->next == 0))
8234 || (no_use_except_counting && ! loop_info->has_prefetch))
8238 /* Loop can be reversed. */
8239 if (loop_dump_stream)
8240 fprintf (loop_dump_stream, "Can reverse loop\n");
8242 /* Now check other conditions:
8244 The increment must be a constant, as must the initial value,
8245 and the comparison code must be LT.
8247 This test can probably be improved since +/- 1 in the constant
8248 can be obtained by changing LT to LE and vice versa; this is
8252 /* for constants, LE gets turned into LT */
8253 && (GET_CODE (comparison) == LT
8254 || (GET_CODE (comparison) == LE
8255 && no_use_except_counting)
8256 || GET_CODE (comparison) == LTU))
8258 HOST_WIDE_INT add_val, add_adjust, comparison_val = 0;
8259 rtx initial_value, comparison_value;
8261 enum rtx_code cmp_code;
8262 int comparison_const_width;
8263 unsigned HOST_WIDE_INT comparison_sign_mask;
8265 add_val = INTVAL (bl->biv->add_val);
8266 comparison_value = XEXP (comparison, 1);
8267 if (GET_MODE (comparison_value) == VOIDmode)
8268 comparison_const_width
8269 = GET_MODE_BITSIZE (GET_MODE (XEXP (comparison, 0)));
8271 comparison_const_width
8272 = GET_MODE_BITSIZE (GET_MODE (comparison_value));
8273 if (comparison_const_width > HOST_BITS_PER_WIDE_INT)
8274 comparison_const_width = HOST_BITS_PER_WIDE_INT;
8275 comparison_sign_mask
8276 = (unsigned HOST_WIDE_INT) 1 << (comparison_const_width - 1);
8278 /* If the comparison value is not a loop invariant, then we
8279 can not reverse this loop.
8281 ??? If the insns which initialize the comparison value as
8282 a whole compute an invariant result, then we could move
8283 them out of the loop and proceed with loop reversal. */
8284 if (! loop_invariant_p (loop, comparison_value))
8287 if (GET_CODE (comparison_value) == CONST_INT)
8288 comparison_val = INTVAL (comparison_value);
8289 initial_value = bl->initial_value;
8291 /* Normalize the initial value if it is an integer and
8292 has no other use except as a counter. This will allow
8293 a few more loops to be reversed. */
8294 if (no_use_except_counting
8295 && GET_CODE (comparison_value) == CONST_INT
8296 && GET_CODE (initial_value) == CONST_INT)
8298 comparison_val = comparison_val - INTVAL (bl->initial_value);
8299 /* The code below requires comparison_val to be a multiple
8300 of add_val in order to do the loop reversal, so
8301 round up comparison_val to a multiple of add_val.
8302 Since comparison_value is constant, we know that the
8303 current comparison code is LT. */
8304 comparison_val = comparison_val + add_val - 1;
8306 -= (unsigned HOST_WIDE_INT) comparison_val % add_val;
8307 /* We postpone overflow checks for COMPARISON_VAL here;
8308 even if there is an overflow, we might still be able to
8309 reverse the loop, if converting the loop exit test to
8311 initial_value = const0_rtx;
8314 /* First check if we can do a vanilla loop reversal. */
8315 if (initial_value == const0_rtx
8316 /* If we have a decrement_and_branch_on_count,
8317 prefer the NE test, since this will allow that
8318 instruction to be generated. Note that we must
8319 use a vanilla loop reversal if the biv is used to
8320 calculate a giv or has a non-counting use. */
8321 #if ! defined (HAVE_decrement_and_branch_until_zero) \
8322 && defined (HAVE_decrement_and_branch_on_count)
8323 && (! (add_val == 1 && loop->vtop
8324 && (bl->biv_count == 0
8325 || no_use_except_counting)))
8327 && GET_CODE (comparison_value) == CONST_INT
8328 /* Now do postponed overflow checks on COMPARISON_VAL. */
8329 && ! (((comparison_val - add_val) ^ INTVAL (comparison_value))
8330 & comparison_sign_mask))
8332 /* Register will always be nonnegative, with value
8333 0 on last iteration */
8334 add_adjust = add_val;
8338 else if (add_val == 1 && loop->vtop
8339 && (bl->biv_count == 0
8340 || no_use_except_counting))
8348 if (GET_CODE (comparison) == LE)
8349 add_adjust -= add_val;
8351 /* If the initial value is not zero, or if the comparison
8352 value is not an exact multiple of the increment, then we
8353 can not reverse this loop. */
8354 if (initial_value == const0_rtx
8355 && GET_CODE (comparison_value) == CONST_INT)
8357 if (((unsigned HOST_WIDE_INT) comparison_val % add_val) != 0)
8362 if (! no_use_except_counting || add_val != 1)
8366 final_value = comparison_value;
8368 /* Reset these in case we normalized the initial value
8369 and comparison value above. */
8370 if (GET_CODE (comparison_value) == CONST_INT
8371 && GET_CODE (initial_value) == CONST_INT)
8373 comparison_value = GEN_INT (comparison_val);
8375 = GEN_INT (comparison_val + INTVAL (bl->initial_value));
8377 bl->initial_value = initial_value;
8379 /* Save some info needed to produce the new insns. */
8380 reg = bl->biv->dest_reg;
8381 jump_label = condjump_label (PREV_INSN (loop_end));
8382 new_add_val = GEN_INT (-INTVAL (bl->biv->add_val));
8384 /* Set start_value; if this is not a CONST_INT, we need
8386 Initialize biv to start_value before loop start.
8387 The old initializing insn will be deleted as a
8388 dead store by flow.c. */
8389 if (initial_value == const0_rtx
8390 && GET_CODE (comparison_value) == CONST_INT)
8392 start_value = GEN_INT (comparison_val - add_adjust);
8393 loop_insn_hoist (loop, gen_move_insn (reg, start_value));
8395 else if (GET_CODE (initial_value) == CONST_INT)
8397 enum machine_mode mode = GET_MODE (reg);
8398 rtx offset = GEN_INT (-INTVAL (initial_value) - add_adjust);
8399 rtx add_insn = gen_add3_insn (reg, comparison_value, offset);
8405 = gen_rtx_PLUS (mode, comparison_value, offset);
8406 loop_insn_hoist (loop, add_insn);
8407 if (GET_CODE (comparison) == LE)
8408 final_value = gen_rtx_PLUS (mode, comparison_value,
8411 else if (! add_adjust)
8413 enum machine_mode mode = GET_MODE (reg);
8414 rtx sub_insn = gen_sub3_insn (reg, comparison_value,
8420 = gen_rtx_MINUS (mode, comparison_value, initial_value);
8421 loop_insn_hoist (loop, sub_insn);
8424 /* We could handle the other cases too, but it'll be
8425 better to have a testcase first. */
8428 /* We may not have a single insn which can increment a reg, so
8429 create a sequence to hold all the insns from expand_inc. */
8431 expand_inc (reg, new_add_val);
8435 p = loop_insn_emit_before (loop, 0, bl->biv->insn, tem);
8436 delete_insn (bl->biv->insn);
8438 /* Update biv info to reflect its new status. */
8440 bl->initial_value = start_value;
8441 bl->biv->add_val = new_add_val;
8443 /* Update loop info. */
8444 loop_info->initial_value = reg;
8445 loop_info->initial_equiv_value = reg;
8446 loop_info->final_value = const0_rtx;
8447 loop_info->final_equiv_value = const0_rtx;
8448 loop_info->comparison_value = const0_rtx;
8449 loop_info->comparison_code = cmp_code;
8450 loop_info->increment = new_add_val;
8452 /* Inc LABEL_NUSES so that delete_insn will
8453 not delete the label. */
8454 LABEL_NUSES (XEXP (jump_label, 0))++;
8456 /* Emit an insn after the end of the loop to set the biv's
8457 proper exit value if it is used anywhere outside the loop. */
8458 if ((REGNO_LAST_UID (bl->regno) != INSN_UID (first_compare))
8460 || REGNO_FIRST_UID (bl->regno) != INSN_UID (bl->init_insn))
8461 loop_insn_sink (loop, gen_load_of_final_value (reg, final_value));
8463 /* Delete compare/branch at end of loop. */
8464 delete_related_insns (PREV_INSN (loop_end));
8465 if (compare_and_branch == 2)
8466 delete_related_insns (first_compare);
8468 /* Add new compare/branch insn at end of loop. */
8470 emit_cmp_and_jump_insns (reg, const0_rtx, cmp_code, NULL_RTX,
8472 XEXP (jump_label, 0));
8475 emit_jump_insn_before (tem, loop_end);
8477 for (tem = PREV_INSN (loop_end);
8478 tem && GET_CODE (tem) != JUMP_INSN;
8479 tem = PREV_INSN (tem))
8483 JUMP_LABEL (tem) = XEXP (jump_label, 0);
8489 /* Increment of LABEL_NUSES done above. */
8490 /* Register is now always nonnegative,
8491 so add REG_NONNEG note to the branch. */
8492 REG_NOTES (tem) = gen_rtx_EXPR_LIST (REG_NONNEG, reg,
8498 /* No insn may reference both the reversed and another biv or it
8499 will fail (see comment near the top of the loop reversal
8501 Earlier on, we have verified that the biv has no use except
8502 counting, or it is the only biv in this function.
8503 However, the code that computes no_use_except_counting does
8504 not verify reg notes. It's possible to have an insn that
8505 references another biv, and has a REG_EQUAL note with an
8506 expression based on the reversed biv. To avoid this case,
8507 remove all REG_EQUAL notes based on the reversed biv
8509 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
8513 rtx set = single_set (p);
8514 /* If this is a set of a GIV based on the reversed biv, any
8515 REG_EQUAL notes should still be correct. */
8517 || GET_CODE (SET_DEST (set)) != REG
8518 || (size_t) REGNO (SET_DEST (set)) >= ivs->n_regs
8519 || REG_IV_TYPE (ivs, REGNO (SET_DEST (set))) != GENERAL_INDUCT
8520 || REG_IV_INFO (ivs, REGNO (SET_DEST (set)))->src_reg != bl->biv->src_reg)
8521 for (pnote = ®_NOTES (p); *pnote;)
8523 if (REG_NOTE_KIND (*pnote) == REG_EQUAL
8524 && reg_mentioned_p (regno_reg_rtx[bl->regno],
8526 *pnote = XEXP (*pnote, 1);
8528 pnote = &XEXP (*pnote, 1);
8532 /* Mark that this biv has been reversed. Each giv which depends
8533 on this biv, and which is also live past the end of the loop
8534 will have to be fixed up. */
8538 if (loop_dump_stream)
8540 fprintf (loop_dump_stream, "Reversed loop");
8542 fprintf (loop_dump_stream, " and added reg_nonneg\n");
8544 fprintf (loop_dump_stream, "\n");
8555 /* Verify whether the biv BL appears to be eliminable,
8556 based on the insns in the loop that refer to it.
8558 If ELIMINATE_P is nonzero, actually do the elimination.
8560 THRESHOLD and INSN_COUNT are from loop_optimize and are used to
8561 determine whether invariant insns should be placed inside or at the
8562 start of the loop. */
8565 maybe_eliminate_biv (const struct loop *loop, struct iv_class *bl,
8566 int eliminate_p, int threshold, int insn_count)
8568 struct loop_ivs *ivs = LOOP_IVS (loop);
8569 rtx reg = bl->biv->dest_reg;
8572 /* Scan all insns in the loop, stopping if we find one that uses the
8573 biv in a way that we cannot eliminate. */
8575 for (p = loop->start; p != loop->end; p = NEXT_INSN (p))
8577 enum rtx_code code = GET_CODE (p);
8578 basic_block where_bb = 0;
8579 rtx where_insn = threshold >= insn_count ? 0 : p;
8582 /* If this is a libcall that sets a giv, skip ahead to its end. */
8583 if (GET_RTX_CLASS (code) == 'i')
8585 note = find_reg_note (p, REG_LIBCALL, NULL_RTX);
8589 rtx last = XEXP (note, 0);
8590 rtx set = single_set (last);
8592 if (set && GET_CODE (SET_DEST (set)) == REG)
8594 unsigned int regno = REGNO (SET_DEST (set));
8596 if (regno < ivs->n_regs
8597 && REG_IV_TYPE (ivs, regno) == GENERAL_INDUCT
8598 && REG_IV_INFO (ivs, regno)->src_reg == bl->biv->src_reg)
8604 /* Closely examine the insn if the biv is mentioned. */
8605 if ((code == INSN || code == JUMP_INSN || code == CALL_INSN)
8606 && reg_mentioned_p (reg, PATTERN (p))
8607 && ! maybe_eliminate_biv_1 (loop, PATTERN (p), p, bl,
8608 eliminate_p, where_bb, where_insn))
8610 if (loop_dump_stream)
8611 fprintf (loop_dump_stream,
8612 "Cannot eliminate biv %d: biv used in insn %d.\n",
8613 bl->regno, INSN_UID (p));
8617 /* If we are eliminating, kill REG_EQUAL notes mentioning the biv. */
8619 && (note = find_reg_note (p, REG_EQUAL, NULL_RTX)) != NULL_RTX
8620 && reg_mentioned_p (reg, XEXP (note, 0)))
8621 remove_note (p, note);
8626 if (loop_dump_stream)
8627 fprintf (loop_dump_stream, "biv %d %s eliminated.\n",
8628 bl->regno, eliminate_p ? "was" : "can be");
8635 /* INSN and REFERENCE are instructions in the same insn chain.
8636 Return nonzero if INSN is first. */
8639 loop_insn_first_p (rtx insn, rtx reference)
8643 for (p = insn, q = reference;;)
8645 /* Start with test for not first so that INSN == REFERENCE yields not
8647 if (q == insn || ! p)
8649 if (p == reference || ! q)
8652 /* Either of P or Q might be a NOTE. Notes have the same LUID as the
8653 previous insn, hence the <= comparison below does not work if
8655 if (INSN_UID (p) < max_uid_for_loop
8656 && INSN_UID (q) < max_uid_for_loop
8657 && GET_CODE (p) != NOTE)
8658 return INSN_LUID (p) <= INSN_LUID (q);
8660 if (INSN_UID (p) >= max_uid_for_loop
8661 || GET_CODE (p) == NOTE)
8663 if (INSN_UID (q) >= max_uid_for_loop)
8668 /* We are trying to eliminate BIV in INSN using GIV. Return nonzero if
8669 the offset that we have to take into account due to auto-increment /
8670 div derivation is zero. */
8672 biv_elimination_giv_has_0_offset (struct induction *biv,
8673 struct induction *giv, rtx insn)
8675 /* If the giv V had the auto-inc address optimization applied
8676 to it, and INSN occurs between the giv insn and the biv
8677 insn, then we'd have to adjust the value used here.
8678 This is rare, so we don't bother to make this possible. */
8679 if (giv->auto_inc_opt
8680 && ((loop_insn_first_p (giv->insn, insn)
8681 && loop_insn_first_p (insn, biv->insn))
8682 || (loop_insn_first_p (biv->insn, insn)
8683 && loop_insn_first_p (insn, giv->insn))))
8689 /* If BL appears in X (part of the pattern of INSN), see if we can
8690 eliminate its use. If so, return 1. If not, return 0.
8692 If BIV does not appear in X, return 1.
8694 If ELIMINATE_P is nonzero, actually do the elimination.
8695 WHERE_INSN/WHERE_BB indicate where extra insns should be added.
8696 Depending on how many items have been moved out of the loop, it
8697 will either be before INSN (when WHERE_INSN is nonzero) or at the
8698 start of the loop (when WHERE_INSN is zero). */
8701 maybe_eliminate_biv_1 (const struct loop *loop, rtx x, rtx insn,
8702 struct iv_class *bl, int eliminate_p,
8703 basic_block where_bb, rtx where_insn)
8705 enum rtx_code code = GET_CODE (x);
8706 rtx reg = bl->biv->dest_reg;
8707 enum machine_mode mode = GET_MODE (reg);
8708 struct induction *v;
8720 /* If we haven't already been able to do something with this BIV,
8721 we can't eliminate it. */
8727 /* If this sets the BIV, it is not a problem. */
8728 if (SET_DEST (x) == reg)
8731 /* If this is an insn that defines a giv, it is also ok because
8732 it will go away when the giv is reduced. */
8733 for (v = bl->giv; v; v = v->next_iv)
8734 if (v->giv_type == DEST_REG && SET_DEST (x) == v->dest_reg)
8738 if (SET_DEST (x) == cc0_rtx && SET_SRC (x) == reg)
8740 /* Can replace with any giv that was reduced and
8741 that has (MULT_VAL != 0) and (ADD_VAL == 0).
8742 Require a constant for MULT_VAL, so we know it's nonzero.
8743 ??? We disable this optimization to avoid potential
8746 for (v = bl->giv; v; v = v->next_iv)
8747 if (GET_CODE (v->mult_val) == CONST_INT && v->mult_val != const0_rtx
8748 && v->add_val == const0_rtx
8749 && ! v->ignore && ! v->maybe_dead && v->always_computable
8753 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8759 /* If the giv has the opposite direction of change,
8760 then reverse the comparison. */
8761 if (INTVAL (v->mult_val) < 0)
8762 new = gen_rtx_COMPARE (GET_MODE (v->new_reg),
8763 const0_rtx, v->new_reg);
8767 /* We can probably test that giv's reduced reg. */
8768 if (validate_change (insn, &SET_SRC (x), new, 0))
8772 /* Look for a giv with (MULT_VAL != 0) and (ADD_VAL != 0);
8773 replace test insn with a compare insn (cmp REDUCED_GIV ADD_VAL).
8774 Require a constant for MULT_VAL, so we know it's nonzero.
8775 ??? Do this only if ADD_VAL is a pointer to avoid a potential
8776 overflow problem. */
8778 for (v = bl->giv; v; v = v->next_iv)
8779 if (GET_CODE (v->mult_val) == CONST_INT
8780 && v->mult_val != const0_rtx
8781 && ! v->ignore && ! v->maybe_dead && v->always_computable
8783 && (GET_CODE (v->add_val) == SYMBOL_REF
8784 || GET_CODE (v->add_val) == LABEL_REF
8785 || GET_CODE (v->add_val) == CONST
8786 || (GET_CODE (v->add_val) == REG
8787 && REG_POINTER (v->add_val))))
8789 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8795 /* If the giv has the opposite direction of change,
8796 then reverse the comparison. */
8797 if (INTVAL (v->mult_val) < 0)
8798 new = gen_rtx_COMPARE (VOIDmode, copy_rtx (v->add_val),
8801 new = gen_rtx_COMPARE (VOIDmode, v->new_reg,
8802 copy_rtx (v->add_val));
8804 /* Replace biv with the giv's reduced register. */
8805 update_reg_last_use (v->add_val, insn);
8806 if (validate_change (insn, &SET_SRC (PATTERN (insn)), new, 0))
8809 /* Insn doesn't support that constant or invariant. Copy it
8810 into a register (it will be a loop invariant.) */
8811 tem = gen_reg_rtx (GET_MODE (v->new_reg));
8813 loop_insn_emit_before (loop, 0, where_insn,
8815 copy_rtx (v->add_val)));
8817 /* Substitute the new register for its invariant value in
8818 the compare expression. */
8819 XEXP (new, (INTVAL (v->mult_val) < 0) ? 0 : 1) = tem;
8820 if (validate_change (insn, &SET_SRC (PATTERN (insn)), new, 0))
8829 case GT: case GE: case GTU: case GEU:
8830 case LT: case LE: case LTU: case LEU:
8831 /* See if either argument is the biv. */
8832 if (XEXP (x, 0) == reg)
8833 arg = XEXP (x, 1), arg_operand = 1;
8834 else if (XEXP (x, 1) == reg)
8835 arg = XEXP (x, 0), arg_operand = 0;
8839 if (CONSTANT_P (arg))
8841 /* First try to replace with any giv that has constant positive
8842 mult_val and constant add_val. We might be able to support
8843 negative mult_val, but it seems complex to do it in general. */
8845 for (v = bl->giv; v; v = v->next_iv)
8846 if (GET_CODE (v->mult_val) == CONST_INT
8847 && INTVAL (v->mult_val) > 0
8848 && (GET_CODE (v->add_val) == SYMBOL_REF
8849 || GET_CODE (v->add_val) == LABEL_REF
8850 || GET_CODE (v->add_val) == CONST
8851 || (GET_CODE (v->add_val) == REG
8852 && REG_POINTER (v->add_val)))
8853 && ! v->ignore && ! v->maybe_dead && v->always_computable
8856 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8859 /* Don't eliminate if the linear combination that makes up
8860 the giv overflows when it is applied to ARG. */
8861 if (GET_CODE (arg) == CONST_INT)
8865 if (GET_CODE (v->add_val) == CONST_INT)
8866 add_val = v->add_val;
8868 add_val = const0_rtx;
8870 if (const_mult_add_overflow_p (arg, v->mult_val,
8878 /* Replace biv with the giv's reduced reg. */
8879 validate_change (insn, &XEXP (x, 1 - arg_operand), v->new_reg, 1);
8881 /* If all constants are actually constant integers and
8882 the derived constant can be directly placed in the COMPARE,
8884 if (GET_CODE (arg) == CONST_INT
8885 && GET_CODE (v->add_val) == CONST_INT)
8887 tem = expand_mult_add (arg, NULL_RTX, v->mult_val,
8888 v->add_val, mode, 1);
8892 /* Otherwise, load it into a register. */
8893 tem = gen_reg_rtx (mode);
8894 loop_iv_add_mult_emit_before (loop, arg,
8895 v->mult_val, v->add_val,
8896 tem, where_bb, where_insn);
8899 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
8901 if (apply_change_group ())
8905 /* Look for giv with positive constant mult_val and nonconst add_val.
8906 Insert insns to calculate new compare value.
8907 ??? Turn this off due to possible overflow. */
8909 for (v = bl->giv; v; v = v->next_iv)
8910 if (GET_CODE (v->mult_val) == CONST_INT
8911 && INTVAL (v->mult_val) > 0
8912 && ! v->ignore && ! v->maybe_dead && v->always_computable
8918 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8924 tem = gen_reg_rtx (mode);
8926 /* Replace biv with giv's reduced register. */
8927 validate_change (insn, &XEXP (x, 1 - arg_operand),
8930 /* Compute value to compare against. */
8931 loop_iv_add_mult_emit_before (loop, arg,
8932 v->mult_val, v->add_val,
8933 tem, where_bb, where_insn);
8934 /* Use it in this insn. */
8935 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
8936 if (apply_change_group ())
8940 else if (GET_CODE (arg) == REG || GET_CODE (arg) == MEM)
8942 if (loop_invariant_p (loop, arg) == 1)
8944 /* Look for giv with constant positive mult_val and nonconst
8945 add_val. Insert insns to compute new compare value.
8946 ??? Turn this off due to possible overflow. */
8948 for (v = bl->giv; v; v = v->next_iv)
8949 if (GET_CODE (v->mult_val) == CONST_INT && INTVAL (v->mult_val) > 0
8950 && ! v->ignore && ! v->maybe_dead && v->always_computable
8956 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8962 tem = gen_reg_rtx (mode);
8964 /* Replace biv with giv's reduced register. */
8965 validate_change (insn, &XEXP (x, 1 - arg_operand),
8968 /* Compute value to compare against. */
8969 loop_iv_add_mult_emit_before (loop, arg,
8970 v->mult_val, v->add_val,
8971 tem, where_bb, where_insn);
8972 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
8973 if (apply_change_group ())
8978 /* This code has problems. Basically, you can't know when
8979 seeing if we will eliminate BL, whether a particular giv
8980 of ARG will be reduced. If it isn't going to be reduced,
8981 we can't eliminate BL. We can try forcing it to be reduced,
8982 but that can generate poor code.
8984 The problem is that the benefit of reducing TV, below should
8985 be increased if BL can actually be eliminated, but this means
8986 we might have to do a topological sort of the order in which
8987 we try to process biv. It doesn't seem worthwhile to do
8988 this sort of thing now. */
8991 /* Otherwise the reg compared with had better be a biv. */
8992 if (GET_CODE (arg) != REG
8993 || REG_IV_TYPE (ivs, REGNO (arg)) != BASIC_INDUCT)
8996 /* Look for a pair of givs, one for each biv,
8997 with identical coefficients. */
8998 for (v = bl->giv; v; v = v->next_iv)
9000 struct induction *tv;
9002 if (v->ignore || v->maybe_dead || v->mode != mode)
9005 for (tv = REG_IV_CLASS (ivs, REGNO (arg))->giv; tv;
9007 if (! tv->ignore && ! tv->maybe_dead
9008 && rtx_equal_p (tv->mult_val, v->mult_val)
9009 && rtx_equal_p (tv->add_val, v->add_val)
9010 && tv->mode == mode)
9012 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
9018 /* Replace biv with its giv's reduced reg. */
9019 XEXP (x, 1 - arg_operand) = v->new_reg;
9020 /* Replace other operand with the other giv's
9022 XEXP (x, arg_operand) = tv->new_reg;
9029 /* If we get here, the biv can't be eliminated. */
9033 /* If this address is a DEST_ADDR giv, it doesn't matter if the
9034 biv is used in it, since it will be replaced. */
9035 for (v = bl->giv; v; v = v->next_iv)
9036 if (v->giv_type == DEST_ADDR && v->location == &XEXP (x, 0))
9044 /* See if any subexpression fails elimination. */
9045 fmt = GET_RTX_FORMAT (code);
9046 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
9051 if (! maybe_eliminate_biv_1 (loop, XEXP (x, i), insn, bl,
9052 eliminate_p, where_bb, where_insn))
9057 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
9058 if (! maybe_eliminate_biv_1 (loop, XVECEXP (x, i, j), insn, bl,
9059 eliminate_p, where_bb, where_insn))
9068 /* Return nonzero if the last use of REG
9069 is in an insn following INSN in the same basic block. */
9072 last_use_this_basic_block (rtx reg, rtx insn)
9076 n && GET_CODE (n) != CODE_LABEL && GET_CODE (n) != JUMP_INSN;
9079 if (REGNO_LAST_UID (REGNO (reg)) == INSN_UID (n))
9085 /* Called via `note_stores' to record the initial value of a biv. Here we
9086 just record the location of the set and process it later. */
9089 record_initial (rtx dest, rtx set, void *data ATTRIBUTE_UNUSED)
9091 struct loop_ivs *ivs = (struct loop_ivs *) data;
9092 struct iv_class *bl;
9094 if (GET_CODE (dest) != REG
9095 || REGNO (dest) >= ivs->n_regs
9096 || REG_IV_TYPE (ivs, REGNO (dest)) != BASIC_INDUCT)
9099 bl = REG_IV_CLASS (ivs, REGNO (dest));
9101 /* If this is the first set found, record it. */
9102 if (bl->init_insn == 0)
9104 bl->init_insn = note_insn;
9109 /* If any of the registers in X are "old" and currently have a last use earlier
9110 than INSN, update them to have a last use of INSN. Their actual last use
9111 will be the previous insn but it will not have a valid uid_luid so we can't
9112 use it. X must be a source expression only. */
9115 update_reg_last_use (rtx x, rtx insn)
9117 /* Check for the case where INSN does not have a valid luid. In this case,
9118 there is no need to modify the regno_last_uid, as this can only happen
9119 when code is inserted after the loop_end to set a pseudo's final value,
9120 and hence this insn will never be the last use of x.
9121 ???? This comment is not correct. See for example loop_givs_reduce.
9122 This may insert an insn before another new insn. */
9123 if (GET_CODE (x) == REG && REGNO (x) < max_reg_before_loop
9124 && INSN_UID (insn) < max_uid_for_loop
9125 && REGNO_LAST_LUID (REGNO (x)) < INSN_LUID (insn))
9127 REGNO_LAST_UID (REGNO (x)) = INSN_UID (insn);
9132 const char *fmt = GET_RTX_FORMAT (GET_CODE (x));
9133 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
9136 update_reg_last_use (XEXP (x, i), insn);
9137 else if (fmt[i] == 'E')
9138 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
9139 update_reg_last_use (XVECEXP (x, i, j), insn);
9144 /* Given an insn INSN and condition COND, return the condition in a
9145 canonical form to simplify testing by callers. Specifically:
9147 (1) The code will always be a comparison operation (EQ, NE, GT, etc.).
9148 (2) Both operands will be machine operands; (cc0) will have been replaced.
9149 (3) If an operand is a constant, it will be the second operand.
9150 (4) (LE x const) will be replaced with (LT x <const+1>) and similarly
9151 for GE, GEU, and LEU.
9153 If the condition cannot be understood, or is an inequality floating-point
9154 comparison which needs to be reversed, 0 will be returned.
9156 If REVERSE is nonzero, then reverse the condition prior to canonizing it.
9158 If EARLIEST is nonzero, it is a pointer to a place where the earliest
9159 insn used in locating the condition was found. If a replacement test
9160 of the condition is desired, it should be placed in front of that
9161 insn and we will be sure that the inputs are still valid.
9163 If WANT_REG is nonzero, we wish the condition to be relative to that
9164 register, if possible. Therefore, do not canonicalize the condition
9165 further. If ALLOW_CC_MODE is nonzero, allow the condition returned
9166 to be a compare to a CC mode register. */
9169 canonicalize_condition (rtx insn, rtx cond, int reverse, rtx *earliest,
9170 rtx want_reg, int allow_cc_mode)
9177 int reverse_code = 0;
9178 enum machine_mode mode;
9180 code = GET_CODE (cond);
9181 mode = GET_MODE (cond);
9182 op0 = XEXP (cond, 0);
9183 op1 = XEXP (cond, 1);
9186 code = reversed_comparison_code (cond, insn);
9187 if (code == UNKNOWN)
9193 /* If we are comparing a register with zero, see if the register is set
9194 in the previous insn to a COMPARE or a comparison operation. Perform
9195 the same tests as a function of STORE_FLAG_VALUE as find_comparison_args
9198 while (GET_RTX_CLASS (code) == '<'
9199 && op1 == CONST0_RTX (GET_MODE (op0))
9202 /* Set nonzero when we find something of interest. */
9206 /* If comparison with cc0, import actual comparison from compare
9210 if ((prev = prev_nonnote_insn (prev)) == 0
9211 || GET_CODE (prev) != INSN
9212 || (set = single_set (prev)) == 0
9213 || SET_DEST (set) != cc0_rtx)
9216 op0 = SET_SRC (set);
9217 op1 = CONST0_RTX (GET_MODE (op0));
9223 /* If this is a COMPARE, pick up the two things being compared. */
9224 if (GET_CODE (op0) == COMPARE)
9226 op1 = XEXP (op0, 1);
9227 op0 = XEXP (op0, 0);
9230 else if (GET_CODE (op0) != REG)
9233 /* Go back to the previous insn. Stop if it is not an INSN. We also
9234 stop if it isn't a single set or if it has a REG_INC note because
9235 we don't want to bother dealing with it. */
9237 if ((prev = prev_nonnote_insn (prev)) == 0
9238 || GET_CODE (prev) != INSN
9239 || FIND_REG_INC_NOTE (prev, NULL_RTX))
9242 set = set_of (op0, prev);
9245 && (GET_CODE (set) != SET
9246 || !rtx_equal_p (SET_DEST (set), op0)))
9249 /* If this is setting OP0, get what it sets it to if it looks
9253 enum machine_mode inner_mode = GET_MODE (SET_DEST (set));
9254 #ifdef FLOAT_STORE_FLAG_VALUE
9255 REAL_VALUE_TYPE fsfv;
9258 /* ??? We may not combine comparisons done in a CCmode with
9259 comparisons not done in a CCmode. This is to aid targets
9260 like Alpha that have an IEEE compliant EQ instruction, and
9261 a non-IEEE compliant BEQ instruction. The use of CCmode is
9262 actually artificial, simply to prevent the combination, but
9263 should not affect other platforms.
9265 However, we must allow VOIDmode comparisons to match either
9266 CCmode or non-CCmode comparison, because some ports have
9267 modeless comparisons inside branch patterns.
9269 ??? This mode check should perhaps look more like the mode check
9270 in simplify_comparison in combine. */
9272 if ((GET_CODE (SET_SRC (set)) == COMPARE
9275 && GET_MODE_CLASS (inner_mode) == MODE_INT
9276 && (GET_MODE_BITSIZE (inner_mode)
9277 <= HOST_BITS_PER_WIDE_INT)
9278 && (STORE_FLAG_VALUE
9279 & ((HOST_WIDE_INT) 1
9280 << (GET_MODE_BITSIZE (inner_mode) - 1))))
9281 #ifdef FLOAT_STORE_FLAG_VALUE
9283 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
9284 && (fsfv = FLOAT_STORE_FLAG_VALUE (inner_mode),
9285 REAL_VALUE_NEGATIVE (fsfv)))
9288 && GET_RTX_CLASS (GET_CODE (SET_SRC (set))) == '<'))
9289 && (((GET_MODE_CLASS (mode) == MODE_CC)
9290 == (GET_MODE_CLASS (inner_mode) == MODE_CC))
9291 || mode == VOIDmode || inner_mode == VOIDmode))
9293 else if (((code == EQ
9295 && (GET_MODE_BITSIZE (inner_mode)
9296 <= HOST_BITS_PER_WIDE_INT)
9297 && GET_MODE_CLASS (inner_mode) == MODE_INT
9298 && (STORE_FLAG_VALUE
9299 & ((HOST_WIDE_INT) 1
9300 << (GET_MODE_BITSIZE (inner_mode) - 1))))
9301 #ifdef FLOAT_STORE_FLAG_VALUE
9303 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
9304 && (fsfv = FLOAT_STORE_FLAG_VALUE (inner_mode),
9305 REAL_VALUE_NEGATIVE (fsfv)))
9308 && GET_RTX_CLASS (GET_CODE (SET_SRC (set))) == '<'
9309 && (((GET_MODE_CLASS (mode) == MODE_CC)
9310 == (GET_MODE_CLASS (inner_mode) == MODE_CC))
9311 || mode == VOIDmode || inner_mode == VOIDmode))
9321 else if (reg_set_p (op0, prev))
9322 /* If this sets OP0, but not directly, we have to give up. */
9327 if (GET_RTX_CLASS (GET_CODE (x)) == '<')
9328 code = GET_CODE (x);
9331 code = reversed_comparison_code (x, prev);
9332 if (code == UNKNOWN)
9337 op0 = XEXP (x, 0), op1 = XEXP (x, 1);
9343 /* If constant is first, put it last. */
9344 if (CONSTANT_P (op0))
9345 code = swap_condition (code), tem = op0, op0 = op1, op1 = tem;
9347 /* If OP0 is the result of a comparison, we weren't able to find what
9348 was really being compared, so fail. */
9350 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_CC)
9353 /* Canonicalize any ordered comparison with integers involving equality
9354 if we can do computations in the relevant mode and we do not
9357 if (GET_MODE_CLASS (GET_MODE (op0)) != MODE_CC
9358 && GET_CODE (op1) == CONST_INT
9359 && GET_MODE (op0) != VOIDmode
9360 && GET_MODE_BITSIZE (GET_MODE (op0)) <= HOST_BITS_PER_WIDE_INT)
9362 HOST_WIDE_INT const_val = INTVAL (op1);
9363 unsigned HOST_WIDE_INT uconst_val = const_val;
9364 unsigned HOST_WIDE_INT max_val
9365 = (unsigned HOST_WIDE_INT) GET_MODE_MASK (GET_MODE (op0));
9370 if ((unsigned HOST_WIDE_INT) const_val != max_val >> 1)
9371 code = LT, op1 = gen_int_mode (const_val + 1, GET_MODE (op0));
9374 /* When cross-compiling, const_val might be sign-extended from
9375 BITS_PER_WORD to HOST_BITS_PER_WIDE_INT */
9377 if ((HOST_WIDE_INT) (const_val & max_val)
9378 != (((HOST_WIDE_INT) 1
9379 << (GET_MODE_BITSIZE (GET_MODE (op0)) - 1))))
9380 code = GT, op1 = gen_int_mode (const_val - 1, GET_MODE (op0));
9384 if (uconst_val < max_val)
9385 code = LTU, op1 = gen_int_mode (uconst_val + 1, GET_MODE (op0));
9389 if (uconst_val != 0)
9390 code = GTU, op1 = gen_int_mode (uconst_val - 1, GET_MODE (op0));
9398 /* Never return CC0; return zero instead. */
9402 return gen_rtx_fmt_ee (code, VOIDmode, op0, op1);
9405 /* Given a jump insn JUMP, return the condition that will cause it to branch
9406 to its JUMP_LABEL. If the condition cannot be understood, or is an
9407 inequality floating-point comparison which needs to be reversed, 0 will
9410 If EARLIEST is nonzero, it is a pointer to a place where the earliest
9411 insn used in locating the condition was found. If a replacement test
9412 of the condition is desired, it should be placed in front of that
9413 insn and we will be sure that the inputs are still valid.
9415 If ALLOW_CC_MODE is nonzero, allow the condition returned to be a
9416 compare CC mode register. */
9419 get_condition (rtx jump, rtx *earliest, int allow_cc_mode)
9425 /* If this is not a standard conditional jump, we can't parse it. */
9426 if (GET_CODE (jump) != JUMP_INSN
9427 || ! any_condjump_p (jump))
9429 set = pc_set (jump);
9431 cond = XEXP (SET_SRC (set), 0);
9433 /* If this branches to JUMP_LABEL when the condition is false, reverse
9436 = GET_CODE (XEXP (SET_SRC (set), 2)) == LABEL_REF
9437 && XEXP (XEXP (SET_SRC (set), 2), 0) == JUMP_LABEL (jump);
9439 return canonicalize_condition (jump, cond, reverse, earliest, NULL_RTX,
9443 /* Similar to above routine, except that we also put an invariant last
9444 unless both operands are invariants. */
9447 get_condition_for_loop (const struct loop *loop, rtx x)
9449 rtx comparison = get_condition (x, (rtx*) 0, false);
9452 || ! loop_invariant_p (loop, XEXP (comparison, 0))
9453 || loop_invariant_p (loop, XEXP (comparison, 1)))
9456 return gen_rtx_fmt_ee (swap_condition (GET_CODE (comparison)), VOIDmode,
9457 XEXP (comparison, 1), XEXP (comparison, 0));
9460 /* Scan the function and determine whether it has indirect (computed) jumps.
9462 This is taken mostly from flow.c; similar code exists elsewhere
9463 in the compiler. It may be useful to put this into rtlanal.c. */
9465 indirect_jump_in_function_p (rtx start)
9469 for (insn = start; insn; insn = NEXT_INSN (insn))
9470 if (computed_jump_p (insn))
9476 /* Add MEM to the LOOP_MEMS array, if appropriate. See the
9477 documentation for LOOP_MEMS for the definition of `appropriate'.
9478 This function is called from prescan_loop via for_each_rtx. */
9481 insert_loop_mem (rtx *mem, void *data ATTRIBUTE_UNUSED)
9483 struct loop_info *loop_info = data;
9490 switch (GET_CODE (m))
9496 /* We're not interested in MEMs that are only clobbered. */
9500 /* We're not interested in the MEM associated with a
9501 CONST_DOUBLE, so there's no need to traverse into this. */
9505 /* We're not interested in any MEMs that only appear in notes. */
9509 /* This is not a MEM. */
9513 /* See if we've already seen this MEM. */
9514 for (i = 0; i < loop_info->mems_idx; ++i)
9515 if (rtx_equal_p (m, loop_info->mems[i].mem))
9517 if (GET_MODE (m) != GET_MODE (loop_info->mems[i].mem))
9518 /* The modes of the two memory accesses are different. If
9519 this happens, something tricky is going on, and we just
9520 don't optimize accesses to this MEM. */
9521 loop_info->mems[i].optimize = 0;
9526 /* Resize the array, if necessary. */
9527 if (loop_info->mems_idx == loop_info->mems_allocated)
9529 if (loop_info->mems_allocated != 0)
9530 loop_info->mems_allocated *= 2;
9532 loop_info->mems_allocated = 32;
9534 loop_info->mems = xrealloc (loop_info->mems,
9535 loop_info->mems_allocated * sizeof (loop_mem_info));
9538 /* Actually insert the MEM. */
9539 loop_info->mems[loop_info->mems_idx].mem = m;
9540 /* We can't hoist this MEM out of the loop if it's a BLKmode MEM
9541 because we can't put it in a register. We still store it in the
9542 table, though, so that if we see the same address later, but in a
9543 non-BLK mode, we'll not think we can optimize it at that point. */
9544 loop_info->mems[loop_info->mems_idx].optimize = (GET_MODE (m) != BLKmode);
9545 loop_info->mems[loop_info->mems_idx].reg = NULL_RTX;
9546 ++loop_info->mems_idx;
9552 /* Allocate REGS->ARRAY or reallocate it if it is too small.
9554 Increment REGS->ARRAY[I].SET_IN_LOOP at the index I of each
9555 register that is modified by an insn between FROM and TO. If the
9556 value of an element of REGS->array[I].SET_IN_LOOP becomes 127 or
9557 more, stop incrementing it, to avoid overflow.
9559 Store in REGS->ARRAY[I].SINGLE_USAGE the single insn in which
9560 register I is used, if it is only used once. Otherwise, it is set
9561 to 0 (for no uses) or const0_rtx for more than one use. This
9562 parameter may be zero, in which case this processing is not done.
9564 Set REGS->ARRAY[I].MAY_NOT_OPTIMIZE nonzero if we should not
9565 optimize register I. */
9568 loop_regs_scan (const struct loop *loop, int extra_size)
9570 struct loop_regs *regs = LOOP_REGS (loop);
9572 /* last_set[n] is nonzero iff reg n has been set in the current
9573 basic block. In that case, it is the insn that last set reg n. */
9578 old_nregs = regs->num;
9579 regs->num = max_reg_num ();
9581 /* Grow the regs array if not allocated or too small. */
9582 if (regs->num >= regs->size)
9584 regs->size = regs->num + extra_size;
9586 regs->array = xrealloc (regs->array, regs->size * sizeof (*regs->array));
9588 /* Zero the new elements. */
9589 memset (regs->array + old_nregs, 0,
9590 (regs->size - old_nregs) * sizeof (*regs->array));
9593 /* Clear previously scanned fields but do not clear n_times_set. */
9594 for (i = 0; i < old_nregs; i++)
9596 regs->array[i].set_in_loop = 0;
9597 regs->array[i].may_not_optimize = 0;
9598 regs->array[i].single_usage = NULL_RTX;
9601 last_set = xcalloc (regs->num, sizeof (rtx));
9603 /* Scan the loop, recording register usage. */
9604 for (insn = loop->top ? loop->top : loop->start; insn != loop->end;
9605 insn = NEXT_INSN (insn))
9609 /* Record registers that have exactly one use. */
9610 find_single_use_in_loop (regs, insn, PATTERN (insn));
9612 /* Include uses in REG_EQUAL notes. */
9613 if (REG_NOTES (insn))
9614 find_single_use_in_loop (regs, insn, REG_NOTES (insn));
9616 if (GET_CODE (PATTERN (insn)) == SET
9617 || GET_CODE (PATTERN (insn)) == CLOBBER)
9618 count_one_set (regs, insn, PATTERN (insn), last_set);
9619 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
9622 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
9623 count_one_set (regs, insn, XVECEXP (PATTERN (insn), 0, i),
9628 if (GET_CODE (insn) == CODE_LABEL || GET_CODE (insn) == JUMP_INSN)
9629 memset (last_set, 0, regs->num * sizeof (rtx));
9631 /* Invalidate all registers used for function argument passing.
9632 We check rtx_varies_p for the same reason as below, to allow
9633 optimizing PIC calculations. */
9634 if (GET_CODE (insn) == CALL_INSN)
9637 for (link = CALL_INSN_FUNCTION_USAGE (insn);
9639 link = XEXP (link, 1))
9643 if (GET_CODE (op = XEXP (link, 0)) == USE
9644 && GET_CODE (reg = XEXP (op, 0)) == REG
9645 && rtx_varies_p (reg, 1))
9646 regs->array[REGNO (reg)].may_not_optimize = 1;
9651 /* Invalidate all hard registers clobbered by calls. With one exception:
9652 a call-clobbered PIC register is still function-invariant for our
9653 purposes, since we can hoist any PIC calculations out of the loop.
9654 Thus the call to rtx_varies_p. */
9655 if (LOOP_INFO (loop)->has_call)
9656 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
9657 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i)
9658 && rtx_varies_p (regno_reg_rtx[i], 1))
9660 regs->array[i].may_not_optimize = 1;
9661 regs->array[i].set_in_loop = 1;
9664 #ifdef AVOID_CCMODE_COPIES
9665 /* Don't try to move insns which set CC registers if we should not
9666 create CCmode register copies. */
9667 for (i = regs->num - 1; i >= FIRST_PSEUDO_REGISTER; i--)
9668 if (GET_MODE_CLASS (GET_MODE (regno_reg_rtx[i])) == MODE_CC)
9669 regs->array[i].may_not_optimize = 1;
9672 /* Set regs->array[I].n_times_set for the new registers. */
9673 for (i = old_nregs; i < regs->num; i++)
9674 regs->array[i].n_times_set = regs->array[i].set_in_loop;
9679 /* Returns the number of real INSNs in the LOOP. */
9682 count_insns_in_loop (const struct loop *loop)
9687 for (insn = loop->top ? loop->top : loop->start; insn != loop->end;
9688 insn = NEXT_INSN (insn))
9695 /* Move MEMs into registers for the duration of the loop. */
9698 load_mems (const struct loop *loop)
9700 struct loop_info *loop_info = LOOP_INFO (loop);
9701 struct loop_regs *regs = LOOP_REGS (loop);
9702 int maybe_never = 0;
9704 rtx p, prev_ebb_head;
9705 rtx label = NULL_RTX;
9707 /* Nonzero if the next instruction may never be executed. */
9708 int next_maybe_never = 0;
9709 unsigned int last_max_reg = max_reg_num ();
9711 if (loop_info->mems_idx == 0)
9714 /* We cannot use next_label here because it skips over normal insns. */
9715 end_label = next_nonnote_insn (loop->end);
9716 if (end_label && GET_CODE (end_label) != CODE_LABEL)
9717 end_label = NULL_RTX;
9719 /* Check to see if it's possible that some instructions in the loop are
9720 never executed. Also check if there is a goto out of the loop other
9721 than right after the end of the loop. */
9722 for (p = next_insn_in_loop (loop, loop->scan_start);
9724 p = next_insn_in_loop (loop, p))
9726 if (GET_CODE (p) == CODE_LABEL)
9728 else if (GET_CODE (p) == JUMP_INSN
9729 /* If we enter the loop in the middle, and scan
9730 around to the beginning, don't set maybe_never
9731 for that. This must be an unconditional jump,
9732 otherwise the code at the top of the loop might
9733 never be executed. Unconditional jumps are
9734 followed a by barrier then loop end. */
9735 && ! (GET_CODE (p) == JUMP_INSN
9736 && JUMP_LABEL (p) == loop->top
9737 && NEXT_INSN (NEXT_INSN (p)) == loop->end
9738 && any_uncondjump_p (p)))
9740 /* If this is a jump outside of the loop but not right
9741 after the end of the loop, we would have to emit new fixup
9742 sequences for each such label. */
9743 if (/* If we can't tell where control might go when this
9744 JUMP_INSN is executed, we must be conservative. */
9746 || (JUMP_LABEL (p) != end_label
9747 && (INSN_UID (JUMP_LABEL (p)) >= max_uid_for_loop
9748 || INSN_LUID (JUMP_LABEL (p)) < INSN_LUID (loop->start)
9749 || INSN_LUID (JUMP_LABEL (p)) > INSN_LUID (loop->end))))
9752 if (!any_condjump_p (p))
9753 /* Something complicated. */
9756 /* If there are any more instructions in the loop, they
9757 might not be reached. */
9758 next_maybe_never = 1;
9760 else if (next_maybe_never)
9764 /* Find start of the extended basic block that enters the loop. */
9765 for (p = loop->start;
9766 PREV_INSN (p) && GET_CODE (p) != CODE_LABEL;
9773 /* Build table of mems that get set to constant values before the
9775 for (; p != loop->start; p = NEXT_INSN (p))
9776 cselib_process_insn (p);
9778 /* Actually move the MEMs. */
9779 for (i = 0; i < loop_info->mems_idx; ++i)
9781 regset_head load_copies;
9782 regset_head store_copies;
9785 rtx mem = loop_info->mems[i].mem;
9788 if (MEM_VOLATILE_P (mem)
9789 || loop_invariant_p (loop, XEXP (mem, 0)) != 1)
9790 /* There's no telling whether or not MEM is modified. */
9791 loop_info->mems[i].optimize = 0;
9793 /* Go through the MEMs written to in the loop to see if this
9794 one is aliased by one of them. */
9795 mem_list_entry = loop_info->store_mems;
9796 while (mem_list_entry)
9798 if (rtx_equal_p (mem, XEXP (mem_list_entry, 0)))
9800 else if (true_dependence (XEXP (mem_list_entry, 0), VOIDmode,
9803 /* MEM is indeed aliased by this store. */
9804 loop_info->mems[i].optimize = 0;
9807 mem_list_entry = XEXP (mem_list_entry, 1);
9810 if (flag_float_store && written
9811 && GET_MODE_CLASS (GET_MODE (mem)) == MODE_FLOAT)
9812 loop_info->mems[i].optimize = 0;
9814 /* If this MEM is written to, we must be sure that there
9815 are no reads from another MEM that aliases this one. */
9816 if (loop_info->mems[i].optimize && written)
9820 for (j = 0; j < loop_info->mems_idx; ++j)
9824 else if (true_dependence (mem,
9826 loop_info->mems[j].mem,
9829 /* It's not safe to hoist loop_info->mems[i] out of
9830 the loop because writes to it might not be
9831 seen by reads from loop_info->mems[j]. */
9832 loop_info->mems[i].optimize = 0;
9838 if (maybe_never && may_trap_p (mem))
9839 /* We can't access the MEM outside the loop; it might
9840 cause a trap that wouldn't have happened otherwise. */
9841 loop_info->mems[i].optimize = 0;
9843 if (!loop_info->mems[i].optimize)
9844 /* We thought we were going to lift this MEM out of the
9845 loop, but later discovered that we could not. */
9848 INIT_REG_SET (&load_copies);
9849 INIT_REG_SET (&store_copies);
9851 /* Allocate a pseudo for this MEM. We set REG_USERVAR_P in
9852 order to keep scan_loop from moving stores to this MEM
9853 out of the loop just because this REG is neither a
9854 user-variable nor used in the loop test. */
9855 reg = gen_reg_rtx (GET_MODE (mem));
9856 REG_USERVAR_P (reg) = 1;
9857 loop_info->mems[i].reg = reg;
9859 /* Now, replace all references to the MEM with the
9860 corresponding pseudos. */
9862 for (p = next_insn_in_loop (loop, loop->scan_start);
9864 p = next_insn_in_loop (loop, p))
9870 set = single_set (p);
9872 /* See if this copies the mem into a register that isn't
9873 modified afterwards. We'll try to do copy propagation
9874 a little further on. */
9876 /* @@@ This test is _way_ too conservative. */
9878 && GET_CODE (SET_DEST (set)) == REG
9879 && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER
9880 && REGNO (SET_DEST (set)) < last_max_reg
9881 && regs->array[REGNO (SET_DEST (set))].n_times_set == 1
9882 && rtx_equal_p (SET_SRC (set), mem))
9883 SET_REGNO_REG_SET (&load_copies, REGNO (SET_DEST (set)));
9885 /* See if this copies the mem from a register that isn't
9886 modified afterwards. We'll try to remove the
9887 redundant copy later on by doing a little register
9888 renaming and copy propagation. This will help
9889 to untangle things for the BIV detection code. */
9892 && GET_CODE (SET_SRC (set)) == REG
9893 && REGNO (SET_SRC (set)) >= FIRST_PSEUDO_REGISTER
9894 && REGNO (SET_SRC (set)) < last_max_reg
9895 && regs->array[REGNO (SET_SRC (set))].n_times_set == 1
9896 && rtx_equal_p (SET_DEST (set), mem))
9897 SET_REGNO_REG_SET (&store_copies, REGNO (SET_SRC (set)));
9899 /* If this is a call which uses / clobbers this memory
9900 location, we must not change the interface here. */
9901 if (GET_CODE (p) == CALL_INSN
9902 && reg_mentioned_p (loop_info->mems[i].mem,
9903 CALL_INSN_FUNCTION_USAGE (p)))
9906 loop_info->mems[i].optimize = 0;
9910 /* Replace the memory reference with the shadow register. */
9911 replace_loop_mems (p, loop_info->mems[i].mem,
9912 loop_info->mems[i].reg, written);
9915 if (GET_CODE (p) == CODE_LABEL
9916 || GET_CODE (p) == JUMP_INSN)
9920 if (! loop_info->mems[i].optimize)
9921 ; /* We found we couldn't do the replacement, so do nothing. */
9922 else if (! apply_change_group ())
9923 /* We couldn't replace all occurrences of the MEM. */
9924 loop_info->mems[i].optimize = 0;
9927 /* Load the memory immediately before LOOP->START, which is
9928 the NOTE_LOOP_BEG. */
9929 cselib_val *e = cselib_lookup (mem, VOIDmode, 0);
9933 struct elt_loc_list *const_equiv = 0;
9937 struct elt_loc_list *equiv;
9938 struct elt_loc_list *best_equiv = 0;
9939 for (equiv = e->locs; equiv; equiv = equiv->next)
9941 if (CONSTANT_P (equiv->loc))
9942 const_equiv = equiv;
9943 else if (GET_CODE (equiv->loc) == REG
9944 /* Extending hard register lifetimes causes crash
9945 on SRC targets. Doing so on non-SRC is
9946 probably also not good idea, since we most
9947 probably have pseudoregister equivalence as
9949 && REGNO (equiv->loc) >= FIRST_PSEUDO_REGISTER)
9952 /* Use the constant equivalence if that is cheap enough. */
9954 best_equiv = const_equiv;
9955 else if (const_equiv
9956 && (rtx_cost (const_equiv->loc, SET)
9957 <= rtx_cost (best_equiv->loc, SET)))
9959 best_equiv = const_equiv;
9963 /* If best_equiv is nonzero, we know that MEM is set to a
9964 constant or register before the loop. We will use this
9965 knowledge to initialize the shadow register with that
9966 constant or reg rather than by loading from MEM. */
9968 best = copy_rtx (best_equiv->loc);
9971 set = gen_move_insn (reg, best);
9972 set = loop_insn_hoist (loop, set);
9975 for (p = prev_ebb_head; p != loop->start; p = NEXT_INSN (p))
9976 if (REGNO_LAST_UID (REGNO (best)) == INSN_UID (p))
9978 REGNO_LAST_UID (REGNO (best)) = INSN_UID (set);
9984 set_unique_reg_note (set, REG_EQUAL, copy_rtx (const_equiv->loc));
9988 if (label == NULL_RTX)
9990 label = gen_label_rtx ();
9991 emit_label_after (label, loop->end);
9994 /* Store the memory immediately after END, which is
9995 the NOTE_LOOP_END. */
9996 set = gen_move_insn (copy_rtx (mem), reg);
9997 loop_insn_emit_after (loop, 0, label, set);
10000 if (loop_dump_stream)
10002 fprintf (loop_dump_stream, "Hoisted regno %d %s from ",
10003 REGNO (reg), (written ? "r/w" : "r/o"));
10004 print_rtl (loop_dump_stream, mem);
10005 fputc ('\n', loop_dump_stream);
10008 /* Attempt a bit of copy propagation. This helps untangle the
10009 data flow, and enables {basic,general}_induction_var to find
10011 EXECUTE_IF_SET_IN_REG_SET
10012 (&load_copies, FIRST_PSEUDO_REGISTER, j,
10014 try_copy_prop (loop, reg, j);
10016 CLEAR_REG_SET (&load_copies);
10018 EXECUTE_IF_SET_IN_REG_SET
10019 (&store_copies, FIRST_PSEUDO_REGISTER, j,
10021 try_swap_copy_prop (loop, reg, j);
10023 CLEAR_REG_SET (&store_copies);
10027 /* Now, we need to replace all references to the previous exit
10028 label with the new one. */
10029 if (label != NULL_RTX && end_label != NULL_RTX)
10030 for (p = loop->start; p != loop->end; p = NEXT_INSN (p))
10031 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p) == end_label)
10032 redirect_jump (p, label, false);
10037 /* For communication between note_reg_stored and its caller. */
10038 struct note_reg_stored_arg
10044 /* Called via note_stores, record in SET_SEEN whether X, which is written,
10045 is equal to ARG. */
10047 note_reg_stored (rtx x, rtx setter ATTRIBUTE_UNUSED, void *arg)
10049 struct note_reg_stored_arg *t = (struct note_reg_stored_arg *) arg;
10054 /* Try to replace every occurrence of pseudo REGNO with REPLACEMENT.
10055 There must be exactly one insn that sets this pseudo; it will be
10056 deleted if all replacements succeed and we can prove that the register
10057 is not used after the loop. */
10060 try_copy_prop (const struct loop *loop, rtx replacement, unsigned int regno)
10062 /* This is the reg that we are copying from. */
10063 rtx reg_rtx = regno_reg_rtx[regno];
10066 /* These help keep track of whether we replaced all uses of the reg. */
10067 int replaced_last = 0;
10068 int store_is_first = 0;
10070 for (insn = next_insn_in_loop (loop, loop->scan_start);
10072 insn = next_insn_in_loop (loop, insn))
10076 /* Only substitute within one extended basic block from the initializing
10078 if (GET_CODE (insn) == CODE_LABEL && init_insn)
10081 if (! INSN_P (insn))
10084 /* Is this the initializing insn? */
10085 set = single_set (insn);
10087 && GET_CODE (SET_DEST (set)) == REG
10088 && REGNO (SET_DEST (set)) == regno)
10094 if (REGNO_FIRST_UID (regno) == INSN_UID (insn))
10095 store_is_first = 1;
10098 /* Only substitute after seeing the initializing insn. */
10099 if (init_insn && insn != init_insn)
10101 struct note_reg_stored_arg arg;
10103 replace_loop_regs (insn, reg_rtx, replacement);
10104 if (REGNO_LAST_UID (regno) == INSN_UID (insn))
10107 /* Stop replacing when REPLACEMENT is modified. */
10108 arg.reg = replacement;
10110 note_stores (PATTERN (insn), note_reg_stored, &arg);
10113 rtx note = find_reg_note (insn, REG_EQUAL, NULL);
10115 /* It is possible that we've turned previously valid REG_EQUAL to
10116 invalid, as we change the REGNO to REPLACEMENT and unlike REGNO,
10117 REPLACEMENT is modified, we get different meaning. */
10118 if (note && reg_mentioned_p (replacement, XEXP (note, 0)))
10119 remove_note (insn, note);
10126 if (apply_change_group ())
10128 if (loop_dump_stream)
10129 fprintf (loop_dump_stream, " Replaced reg %d", regno);
10130 if (store_is_first && replaced_last)
10135 /* Assume we're just deleting INIT_INSN. */
10137 /* Look for REG_RETVAL note. If we're deleting the end of
10138 the libcall sequence, the whole sequence can go. */
10139 retval_note = find_reg_note (init_insn, REG_RETVAL, NULL_RTX);
10140 /* If we found a REG_RETVAL note, find the first instruction
10141 in the sequence. */
10143 first = XEXP (retval_note, 0);
10145 /* Delete the instructions. */
10146 loop_delete_insns (first, init_insn);
10148 if (loop_dump_stream)
10149 fprintf (loop_dump_stream, ".\n");
10153 /* Replace all the instructions from FIRST up to and including LAST
10154 with NOTE_INSN_DELETED notes. */
10157 loop_delete_insns (rtx first, rtx last)
10161 if (loop_dump_stream)
10162 fprintf (loop_dump_stream, ", deleting init_insn (%d)",
10164 delete_insn (first);
10166 /* If this was the LAST instructions we're supposed to delete,
10171 first = NEXT_INSN (first);
10175 /* Try to replace occurrences of pseudo REGNO with REPLACEMENT within
10176 loop LOOP if the order of the sets of these registers can be
10177 swapped. There must be exactly one insn within the loop that sets
10178 this pseudo followed immediately by a move insn that sets
10179 REPLACEMENT with REGNO. */
10181 try_swap_copy_prop (const struct loop *loop, rtx replacement,
10182 unsigned int regno)
10185 rtx set = NULL_RTX;
10186 unsigned int new_regno;
10188 new_regno = REGNO (replacement);
10190 for (insn = next_insn_in_loop (loop, loop->scan_start);
10192 insn = next_insn_in_loop (loop, insn))
10194 /* Search for the insn that copies REGNO to NEW_REGNO? */
10196 && (set = single_set (insn))
10197 && GET_CODE (SET_DEST (set)) == REG
10198 && REGNO (SET_DEST (set)) == new_regno
10199 && GET_CODE (SET_SRC (set)) == REG
10200 && REGNO (SET_SRC (set)) == regno)
10204 if (insn != NULL_RTX)
10209 /* Some DEF-USE info would come in handy here to make this
10210 function more general. For now, just check the previous insn
10211 which is the most likely candidate for setting REGNO. */
10213 prev_insn = PREV_INSN (insn);
10216 && (prev_set = single_set (prev_insn))
10217 && GET_CODE (SET_DEST (prev_set)) == REG
10218 && REGNO (SET_DEST (prev_set)) == regno)
10221 (set (reg regno) (expr))
10222 (set (reg new_regno) (reg regno))
10224 so try converting this to:
10225 (set (reg new_regno) (expr))
10226 (set (reg regno) (reg new_regno))
10228 The former construct is often generated when a global
10229 variable used for an induction variable is shadowed by a
10230 register (NEW_REGNO). The latter construct improves the
10231 chances of GIV replacement and BIV elimination. */
10233 validate_change (prev_insn, &SET_DEST (prev_set),
10235 validate_change (insn, &SET_DEST (set),
10237 validate_change (insn, &SET_SRC (set),
10240 if (apply_change_group ())
10242 if (loop_dump_stream)
10243 fprintf (loop_dump_stream,
10244 " Swapped set of reg %d at %d with reg %d at %d.\n",
10245 regno, INSN_UID (insn),
10246 new_regno, INSN_UID (prev_insn));
10248 /* Update first use of REGNO. */
10249 if (REGNO_FIRST_UID (regno) == INSN_UID (prev_insn))
10250 REGNO_FIRST_UID (regno) = INSN_UID (insn);
10252 /* Now perform copy propagation to hopefully
10253 remove all uses of REGNO within the loop. */
10254 try_copy_prop (loop, replacement, regno);
10260 /* Worker function for find_mem_in_note, called via for_each_rtx. */
10263 find_mem_in_note_1 (rtx *x, void *data)
10265 if (*x != NULL_RTX && GET_CODE (*x) == MEM)
10267 rtx *res = (rtx *) data;
10274 /* Returns the first MEM found in NOTE by depth-first search. */
10277 find_mem_in_note (rtx note)
10279 if (note && for_each_rtx (¬e, find_mem_in_note_1, ¬e))
10284 /* Replace MEM with its associated pseudo register. This function is
10285 called from load_mems via for_each_rtx. DATA is actually a pointer
10286 to a structure describing the instruction currently being scanned
10287 and the MEM we are currently replacing. */
10290 replace_loop_mem (rtx *mem, void *data)
10292 loop_replace_args *args = (loop_replace_args *) data;
10298 switch (GET_CODE (m))
10304 /* We're not interested in the MEM associated with a
10305 CONST_DOUBLE, so there's no need to traverse into one. */
10309 /* This is not a MEM. */
10313 if (!rtx_equal_p (args->match, m))
10314 /* This is not the MEM we are currently replacing. */
10317 /* Actually replace the MEM. */
10318 validate_change (args->insn, mem, args->replacement, 1);
10324 replace_loop_mems (rtx insn, rtx mem, rtx reg, int written)
10326 loop_replace_args args;
10330 args.replacement = reg;
10332 for_each_rtx (&insn, replace_loop_mem, &args);
10334 /* If we hoist a mem write out of the loop, then REG_EQUAL
10335 notes referring to the mem are no longer valid. */
10341 for (link = ®_NOTES (insn); (note = *link); link = &XEXP (note, 1))
10343 if (REG_NOTE_KIND (note) == REG_EQUAL
10344 && (sub = find_mem_in_note (note))
10345 && true_dependence (mem, VOIDmode, sub, rtx_varies_p))
10347 /* Remove the note. */
10348 validate_change (NULL_RTX, link, XEXP (note, 1), 1);
10355 /* Replace one register with another. Called through for_each_rtx; PX points
10356 to the rtx being scanned. DATA is actually a pointer to
10357 a structure of arguments. */
10360 replace_loop_reg (rtx *px, void *data)
10363 loop_replace_args *args = (loop_replace_args *) data;
10368 if (x == args->match)
10369 validate_change (args->insn, px, args->replacement, 1);
10375 replace_loop_regs (rtx insn, rtx reg, rtx replacement)
10377 loop_replace_args args;
10381 args.replacement = replacement;
10383 for_each_rtx (&insn, replace_loop_reg, &args);
10386 /* Emit insn for PATTERN after WHERE_INSN in basic block WHERE_BB
10387 (ignored in the interim). */
10390 loop_insn_emit_after (const struct loop *loop ATTRIBUTE_UNUSED,
10391 basic_block where_bb ATTRIBUTE_UNUSED, rtx where_insn,
10394 return emit_insn_after (pattern, where_insn);
10398 /* If WHERE_INSN is nonzero emit insn for PATTERN before WHERE_INSN
10399 in basic block WHERE_BB (ignored in the interim) within the loop
10400 otherwise hoist PATTERN into the loop pre-header. */
10403 loop_insn_emit_before (const struct loop *loop,
10404 basic_block where_bb ATTRIBUTE_UNUSED,
10405 rtx where_insn, rtx pattern)
10408 return loop_insn_hoist (loop, pattern);
10409 return emit_insn_before (pattern, where_insn);
10413 /* Emit call insn for PATTERN before WHERE_INSN in basic block
10414 WHERE_BB (ignored in the interim) within the loop. */
10417 loop_call_insn_emit_before (const struct loop *loop ATTRIBUTE_UNUSED,
10418 basic_block where_bb ATTRIBUTE_UNUSED,
10419 rtx where_insn, rtx pattern)
10421 return emit_call_insn_before (pattern, where_insn);
10425 /* Hoist insn for PATTERN into the loop pre-header. */
10428 loop_insn_hoist (const struct loop *loop, rtx pattern)
10430 return loop_insn_emit_before (loop, 0, loop->start, pattern);
10434 /* Hoist call insn for PATTERN into the loop pre-header. */
10437 loop_call_insn_hoist (const struct loop *loop, rtx pattern)
10439 return loop_call_insn_emit_before (loop, 0, loop->start, pattern);
10443 /* Sink insn for PATTERN after the loop end. */
10446 loop_insn_sink (const struct loop *loop, rtx pattern)
10448 return loop_insn_emit_before (loop, 0, loop->sink, pattern);
10451 /* bl->final_value can be either general_operand or PLUS of general_operand
10452 and constant. Emit sequence of instructions to load it into REG. */
10454 gen_load_of_final_value (rtx reg, rtx final_value)
10458 final_value = force_operand (final_value, reg);
10459 if (final_value != reg)
10460 emit_move_insn (reg, final_value);
10461 seq = get_insns ();
10466 /* If the loop has multiple exits, emit insn for PATTERN before the
10467 loop to ensure that it will always be executed no matter how the
10468 loop exits. Otherwise, emit the insn for PATTERN after the loop,
10469 since this is slightly more efficient. */
10472 loop_insn_sink_or_swim (const struct loop *loop, rtx pattern)
10474 if (loop->exit_count)
10475 return loop_insn_hoist (loop, pattern);
10477 return loop_insn_sink (loop, pattern);
10481 loop_ivs_dump (const struct loop *loop, FILE *file, int verbose)
10483 struct iv_class *bl;
10486 if (! loop || ! file)
10489 for (bl = LOOP_IVS (loop)->list; bl; bl = bl->next)
10492 fprintf (file, "Loop %d: %d IV classes\n", loop->num, iv_num);
10494 for (bl = LOOP_IVS (loop)->list; bl; bl = bl->next)
10496 loop_iv_class_dump (bl, file, verbose);
10497 fputc ('\n', file);
10503 loop_iv_class_dump (const struct iv_class *bl, FILE *file,
10504 int verbose ATTRIBUTE_UNUSED)
10506 struct induction *v;
10510 if (! bl || ! file)
10513 fprintf (file, "IV class for reg %d, benefit %d\n",
10514 bl->regno, bl->total_benefit);
10516 fprintf (file, " Init insn %d", INSN_UID (bl->init_insn));
10517 if (bl->initial_value)
10519 fprintf (file, ", init val: ");
10520 print_simple_rtl (file, bl->initial_value);
10522 if (bl->initial_test)
10524 fprintf (file, ", init test: ");
10525 print_simple_rtl (file, bl->initial_test);
10527 fputc ('\n', file);
10529 if (bl->final_value)
10531 fprintf (file, " Final val: ");
10532 print_simple_rtl (file, bl->final_value);
10533 fputc ('\n', file);
10536 if ((incr = biv_total_increment (bl)))
10538 fprintf (file, " Total increment: ");
10539 print_simple_rtl (file, incr);
10540 fputc ('\n', file);
10543 /* List the increments. */
10544 for (i = 0, v = bl->biv; v; v = v->next_iv, i++)
10546 fprintf (file, " Inc%d: insn %d, incr: ", i, INSN_UID (v->insn));
10547 print_simple_rtl (file, v->add_val);
10548 fputc ('\n', file);
10551 /* List the givs. */
10552 for (i = 0, v = bl->giv; v; v = v->next_iv, i++)
10554 fprintf (file, " Giv%d: insn %d, benefit %d, ",
10555 i, INSN_UID (v->insn), v->benefit);
10556 if (v->giv_type == DEST_ADDR)
10557 print_simple_rtl (file, v->mem);
10559 print_simple_rtl (file, single_set (v->insn));
10560 fputc ('\n', file);
10566 loop_biv_dump (const struct induction *v, FILE *file, int verbose)
10573 REGNO (v->dest_reg), INSN_UID (v->insn));
10574 fprintf (file, " const ");
10575 print_simple_rtl (file, v->add_val);
10577 if (verbose && v->final_value)
10579 fputc ('\n', file);
10580 fprintf (file, " final ");
10581 print_simple_rtl (file, v->final_value);
10584 fputc ('\n', file);
10589 loop_giv_dump (const struct induction *v, FILE *file, int verbose)
10594 if (v->giv_type == DEST_REG)
10595 fprintf (file, "Giv %d: insn %d",
10596 REGNO (v->dest_reg), INSN_UID (v->insn));
10598 fprintf (file, "Dest address: insn %d",
10599 INSN_UID (v->insn));
10601 fprintf (file, " src reg %d benefit %d",
10602 REGNO (v->src_reg), v->benefit);
10603 fprintf (file, " lifetime %d",
10606 if (v->replaceable)
10607 fprintf (file, " replaceable");
10609 if (v->no_const_addval)
10610 fprintf (file, " ncav");
10612 if (v->ext_dependent)
10614 switch (GET_CODE (v->ext_dependent))
10617 fprintf (file, " ext se");
10620 fprintf (file, " ext ze");
10623 fprintf (file, " ext tr");
10630 fputc ('\n', file);
10631 fprintf (file, " mult ");
10632 print_simple_rtl (file, v->mult_val);
10634 fputc ('\n', file);
10635 fprintf (file, " add ");
10636 print_simple_rtl (file, v->add_val);
10638 if (verbose && v->final_value)
10640 fputc ('\n', file);
10641 fprintf (file, " final ");
10642 print_simple_rtl (file, v->final_value);
10645 fputc ('\n', file);
10650 debug_ivs (const struct loop *loop)
10652 loop_ivs_dump (loop, stderr, 1);
10657 debug_iv_class (const struct iv_class *bl)
10659 loop_iv_class_dump (bl, stderr, 1);
10664 debug_biv (const struct induction *v)
10666 loop_biv_dump (v, stderr, 1);
10671 debug_giv (const struct induction *v)
10673 loop_giv_dump (v, stderr, 1);
10677 #define LOOP_BLOCK_NUM_1(INSN) \
10678 ((INSN) ? (BLOCK_FOR_INSN (INSN) ? BLOCK_NUM (INSN) : - 1) : -1)
10680 /* The notes do not have an assigned block, so look at the next insn. */
10681 #define LOOP_BLOCK_NUM(INSN) \
10682 ((INSN) ? (GET_CODE (INSN) == NOTE \
10683 ? LOOP_BLOCK_NUM_1 (next_nonnote_insn (INSN)) \
10684 : LOOP_BLOCK_NUM_1 (INSN)) \
10687 #define LOOP_INSN_UID(INSN) ((INSN) ? INSN_UID (INSN) : -1)
10690 loop_dump_aux (const struct loop *loop, FILE *file,
10691 int verbose ATTRIBUTE_UNUSED)
10695 if (! loop || ! file)
10698 /* Print diagnostics to compare our concept of a loop with
10699 what the loop notes say. */
10700 if (! PREV_INSN (loop->first->head)
10701 || GET_CODE (PREV_INSN (loop->first->head)) != NOTE
10702 || NOTE_LINE_NUMBER (PREV_INSN (loop->first->head))
10703 != NOTE_INSN_LOOP_BEG)
10704 fprintf (file, ";; No NOTE_INSN_LOOP_BEG at %d\n",
10705 INSN_UID (PREV_INSN (loop->first->head)));
10706 if (! NEXT_INSN (loop->last->end)
10707 || GET_CODE (NEXT_INSN (loop->last->end)) != NOTE
10708 || NOTE_LINE_NUMBER (NEXT_INSN (loop->last->end))
10709 != NOTE_INSN_LOOP_END)
10710 fprintf (file, ";; No NOTE_INSN_LOOP_END at %d\n",
10711 INSN_UID (NEXT_INSN (loop->last->end)));
10716 ";; start %d (%d), cont dom %d (%d), cont %d (%d), vtop %d (%d), end %d (%d)\n",
10717 LOOP_BLOCK_NUM (loop->start),
10718 LOOP_INSN_UID (loop->start),
10719 LOOP_BLOCK_NUM (loop->cont),
10720 LOOP_INSN_UID (loop->cont),
10721 LOOP_BLOCK_NUM (loop->cont),
10722 LOOP_INSN_UID (loop->cont),
10723 LOOP_BLOCK_NUM (loop->vtop),
10724 LOOP_INSN_UID (loop->vtop),
10725 LOOP_BLOCK_NUM (loop->end),
10726 LOOP_INSN_UID (loop->end));
10727 fprintf (file, ";; top %d (%d), scan start %d (%d)\n",
10728 LOOP_BLOCK_NUM (loop->top),
10729 LOOP_INSN_UID (loop->top),
10730 LOOP_BLOCK_NUM (loop->scan_start),
10731 LOOP_INSN_UID (loop->scan_start));
10732 fprintf (file, ";; exit_count %d", loop->exit_count);
10733 if (loop->exit_count)
10735 fputs (", labels:", file);
10736 for (label = loop->exit_labels; label; label = LABEL_NEXTREF (label))
10738 fprintf (file, " %d ",
10739 LOOP_INSN_UID (XEXP (label, 0)));
10742 fputs ("\n", file);
10744 /* This can happen when a marked loop appears as two nested loops,
10745 say from while (a || b) {}. The inner loop won't match
10746 the loop markers but the outer one will. */
10747 if (LOOP_BLOCK_NUM (loop->cont) != loop->latch->index)
10748 fprintf (file, ";; NOTE_INSN_LOOP_CONT not in loop latch\n");
10752 /* Call this function from the debugger to dump LOOP. */
10755 debug_loop (const struct loop *loop)
10757 flow_loop_dump (loop, stderr, loop_dump_aux, 1);
10760 /* Call this function from the debugger to dump LOOPS. */
10763 debug_loops (const struct loops *loops)
10765 flow_loops_dump (loops, stderr, loop_dump_aux, 1);
OSDN Git Service
