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[pf3gnuchains/gcc-fork.git] / gcc / longlong.h
1 /* longlong.h -- definitions for mixed size 32/64 bit arithmetic.
2    Copyright (C) 1991, 1992, 1994, 1995 Free Software Foundation, Inc.
3
4    This definition file is free software; you can redistribute it
5    and/or modify it under the terms of the GNU General Public
6    License as published by the Free Software Foundation; either
7    version 2, or (at your option) any later version.
8
9    This definition file is distributed in the hope that it will be
10    useful, but WITHOUT ANY WARRANTY; without even the implied
11    warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
12    See the GNU General Public License for more details.
13
14    You should have received a copy of the GNU General Public License
15    along with this program; if not, write to the Free Software
16    Foundation, Inc., 59 Temple Place - Suite 330,
17    Boston, MA 02111-1307, USA.  */
18
19 #ifndef SI_TYPE_SIZE
20 #define SI_TYPE_SIZE 32
21 #endif
22
23 #define __BITS4 (SI_TYPE_SIZE / 4)
24 #define __ll_B (1L << (SI_TYPE_SIZE / 2))
25 #define __ll_lowpart(t) ((USItype) (t) % __ll_B)
26 #define __ll_highpart(t) ((USItype) (t) / __ll_B)
27
28 /* Define auxiliary asm macros.
29
30    1) umul_ppmm(high_prod, low_prod, multipler, multiplicand)
31    multiplies two USItype integers MULTIPLER and MULTIPLICAND,
32    and generates a two-part USItype product in HIGH_PROD and
33    LOW_PROD.
34
35    2) __umulsidi3(a,b) multiplies two USItype integers A and B,
36    and returns a UDItype product.  This is just a variant of umul_ppmm.
37
38    3) udiv_qrnnd(quotient, remainder, high_numerator, low_numerator,
39    denominator) divides a two-word unsigned integer, composed by the
40    integers HIGH_NUMERATOR and LOW_NUMERATOR, by DENOMINATOR and
41    places the quotient in QUOTIENT and the remainder in REMAINDER.
42    HIGH_NUMERATOR must be less than DENOMINATOR for correct operation.
43    If, in addition, the most significant bit of DENOMINATOR must be 1,
44    then the pre-processor symbol UDIV_NEEDS_NORMALIZATION is defined to 1.
45
46    4) sdiv_qrnnd(quotient, remainder, high_numerator, low_numerator,
47    denominator).  Like udiv_qrnnd but the numbers are signed.  The
48    quotient is rounded towards 0.
49
50    5) count_leading_zeros(count, x) counts the number of zero-bits from
51    the msb to the first non-zero bit.  This is the number of steps X
52    needs to be shifted left to set the msb.  Undefined for X == 0.
53
54    6) add_ssaaaa(high_sum, low_sum, high_addend_1, low_addend_1,
55    high_addend_2, low_addend_2) adds two two-word unsigned integers,
56    composed by HIGH_ADDEND_1 and LOW_ADDEND_1, and HIGH_ADDEND_2 and
57    LOW_ADDEND_2 respectively.  The result is placed in HIGH_SUM and
58    LOW_SUM.  Overflow (i.e. carry out) is not stored anywhere, and is
59    lost.
60
61    7) sub_ddmmss(high_difference, low_difference, high_minuend,
62    low_minuend, high_subtrahend, low_subtrahend) subtracts two
63    two-word unsigned integers, composed by HIGH_MINUEND_1 and
64    LOW_MINUEND_1, and HIGH_SUBTRAHEND_2 and LOW_SUBTRAHEND_2
65    respectively.  The result is placed in HIGH_DIFFERENCE and
66    LOW_DIFFERENCE.  Overflow (i.e. carry out) is not stored anywhere,
67    and is lost.
68
69    If any of these macros are left undefined for a particular CPU,
70    C macros are used.  */
71
72 /* The CPUs come in alphabetical order below.
73
74    Please add support for more CPUs here, or improve the current support
75    for the CPUs below!
76    (E.g. WE32100, IBM360.)  */
77
78 #if defined (__GNUC__) && !defined (NO_ASM)
79
80 /* We sometimes need to clobber "cc" with gcc2, but that would not be
81    understood by gcc1.  Use cpp to avoid major code duplication.  */
82 #if __GNUC__ < 2
83 #define __CLOBBER_CC
84 #define __AND_CLOBBER_CC
85 #else /* __GNUC__ >= 2 */
86 #define __CLOBBER_CC : "cc"
87 #define __AND_CLOBBER_CC , "cc"
88 #endif /* __GNUC__ < 2 */
89
90 #if defined (__a29k__) || defined (_AM29K)
91 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
92   __asm__ ("add %1,%4,%5
93         addc %0,%2,%3"                                                  \
94            : "=r" ((USItype) (sh)),                                     \
95             "=&r" ((USItype) (sl))                                      \
96            : "%r" ((USItype) (ah)),                                     \
97              "rI" ((USItype) (bh)),                                     \
98              "%r" ((USItype) (al)),                                     \
99              "rI" ((USItype) (bl)))
100 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
101   __asm__ ("sub %1,%4,%5
102         subc %0,%2,%3"                                                  \
103            : "=r" ((USItype) (sh)),                                     \
104              "=&r" ((USItype) (sl))                                     \
105            : "r" ((USItype) (ah)),                                      \
106              "rI" ((USItype) (bh)),                                     \
107              "r" ((USItype) (al)),                                      \
108              "rI" ((USItype) (bl)))
109 #define umul_ppmm(xh, xl, m0, m1) \
110   do {                                                                  \
111     USItype __m0 = (m0), __m1 = (m1);                                   \
112     __asm__ ("multiplu %0,%1,%2"                                        \
113              : "=r" ((USItype) (xl))                                    \
114              : "r" (__m0),                                              \
115                "r" (__m1));                                             \
116     __asm__ ("multmu %0,%1,%2"                                          \
117              : "=r" ((USItype) (xh))                                    \
118              : "r" (__m0),                                              \
119                "r" (__m1));                                             \
120   } while (0)
121 #define udiv_qrnnd(q, r, n1, n0, d) \
122   __asm__ ("dividu %0,%3,%4"                                            \
123            : "=r" ((USItype) (q)),                                      \
124              "=q" ((USItype) (r))                                       \
125            : "1" ((USItype) (n1)),                                      \
126              "r" ((USItype) (n0)),                                      \
127              "r" ((USItype) (d)))
128 #define count_leading_zeros(count, x) \
129     __asm__ ("clz %0,%1"                                                \
130              : "=r" ((USItype) (count))                                 \
131              : "r" ((USItype) (x)))
132 #endif /* __a29k__ */
133
134 #if defined (__arm__)
135 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
136   __asm__ ("adds        %1, %4, %5
137         adc     %0, %2, %3"                                             \
138            : "=r" ((USItype) (sh)),                                     \
139              "=&r" ((USItype) (sl))                                     \
140            : "%r" ((USItype) (ah)),                                     \
141              "rI" ((USItype) (bh)),                                     \
142              "%r" ((USItype) (al)),                                     \
143              "rI" ((USItype) (bl)))
144 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
145   __asm__ ("subs        %1, %4, %5
146         sbc     %0, %2, %3"                                             \
147            : "=r" ((USItype) (sh)),                                     \
148              "=&r" ((USItype) (sl))                                     \
149            : "r" ((USItype) (ah)),                                      \
150              "rI" ((USItype) (bh)),                                     \
151              "r" ((USItype) (al)),                                      \
152              "rI" ((USItype) (bl)))
153 #define umul_ppmm(xh, xl, a, b) \
154 {register USItype __t0, __t1, __t2;                                     \
155   __asm__ ("%@ Inlined umul_ppmm
156         mov     %2, %5, lsr #16
157         mov     %0, %6, lsr #16
158         bic     %3, %5, %2, lsl #16
159         bic     %4, %6, %0, lsl #16
160         mul     %1, %3, %4
161         mul     %4, %2, %4
162         mul     %3, %0, %3
163         mul     %0, %2, %0
164         adds    %3, %4, %3
165         addcs   %0, %0, #65536
166         adds    %1, %1, %3, lsl #16
167         adc     %0, %0, %3, lsr #16"                                    \
168            : "=&r" ((USItype)(xh)),                                     \
169              "=r" ((USItype)(xl)),                                      \
170              "=&r" (__t0), "=&r" (__t1), "=r" (__t2)                    \
171            : "r" ((USItype)(a)),                                        \
172              "r" ((USItype)(b)));}
173 #define UMUL_TIME 20
174 #define UDIV_TIME 100
175 #endif /* __arm__ */
176
177 #if defined (__clipper__)
178 #define umul_ppmm(w1, w0, u, v) \
179   ({union {UDItype __ll;                                                \
180            struct {USItype __l, __h;} __i;                              \
181           } __xx;                                                       \
182   __asm__ ("mulwux %2,%0"                                               \
183            : "=r" (__xx.__ll)                                           \
184            : "%0" ((USItype)(u)),                                       \
185              "r" ((USItype)(v)));                                       \
186   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
187 #define smul_ppmm(w1, w0, u, v) \
188   ({union {DItype __ll;                                                 \
189            struct {SItype __l, __h;} __i;                               \
190           } __xx;                                                       \
191   __asm__ ("mulwx %2,%0"                                                \
192            : "=r" (__xx.__ll)                                           \
193            : "%0" ((SItype)(u)),                                        \
194              "r" ((SItype)(v)));                                        \
195   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
196 #define __umulsidi3(u, v) \
197   ({UDItype __w;                                                        \
198     __asm__ ("mulwux %2,%0"                                             \
199              : "=r" (__w)                                               \
200              : "%0" ((USItype)(u)),                                     \
201                "r" ((USItype)(v)));                                     \
202     __w; })
203 #endif /* __clipper__ */
204
205 #if defined (__gmicro__)
206 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
207   __asm__ ("add.w %5,%1
208         addx %3,%0"                                                     \
209            : "=g" ((USItype)(sh)),                                      \
210              "=&g" ((USItype)(sl))                                      \
211            : "%0" ((USItype)(ah)),                                      \
212              "g" ((USItype)(bh)),                                       \
213              "%1" ((USItype)(al)),                                      \
214              "g" ((USItype)(bl)))
215 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
216   __asm__ ("sub.w %5,%1
217         subx %3,%0"                                                     \
218            : "=g" ((USItype)(sh)),                                      \
219              "=&g" ((USItype)(sl))                                      \
220            : "0" ((USItype)(ah)),                                       \
221              "g" ((USItype)(bh)),                                       \
222              "1" ((USItype)(al)),                                       \
223              "g" ((USItype)(bl)))
224 #define umul_ppmm(ph, pl, m0, m1) \
225   __asm__ ("mulx %3,%0,%1"                                              \
226            : "=g" ((USItype)(ph)),                                      \
227              "=r" ((USItype)(pl))                                       \
228            : "%0" ((USItype)(m0)),                                      \
229              "g" ((USItype)(m1)))
230 #define udiv_qrnnd(q, r, nh, nl, d) \
231   __asm__ ("divx %4,%0,%1"                                              \
232            : "=g" ((USItype)(q)),                                       \
233              "=r" ((USItype)(r))                                        \
234            : "1" ((USItype)(nh)),                                       \
235              "0" ((USItype)(nl)),                                       \
236              "g" ((USItype)(d)))
237 #define count_leading_zeros(count, x) \
238   __asm__ ("bsch/1 %1,%0"                                               \
239            : "=g" (count)                                               \
240            : "g" ((USItype)(x)),                                        \
241              "0" ((USItype)0))
242 #endif
243
244 #if defined (__hppa)
245 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
246   __asm__ ("add %4,%5,%1
247         addc %2,%3,%0"                                                  \
248            : "=r" ((USItype)(sh)),                                      \
249              "=&r" ((USItype)(sl))                                      \
250            : "%rM" ((USItype)(ah)),                                     \
251              "rM" ((USItype)(bh)),                                      \
252              "%rM" ((USItype)(al)),                                     \
253              "rM" ((USItype)(bl)))
254 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
255   __asm__ ("sub %4,%5,%1
256         subb %2,%3,%0"                                                  \
257            : "=r" ((USItype)(sh)),                                      \
258              "=&r" ((USItype)(sl))                                      \
259            : "rM" ((USItype)(ah)),                                      \
260              "rM" ((USItype)(bh)),                                      \
261              "rM" ((USItype)(al)),                                      \
262              "rM" ((USItype)(bl)))
263 #if defined (_PA_RISC1_1)
264 #define umul_ppmm(w1, w0, u, v) \
265   do {                                                                  \
266     union                                                               \
267       {                                                                 \
268         UDItype __f;                                                    \
269         struct {USItype __w1, __w0;} __w1w0;                            \
270       } __t;                                                            \
271     __asm__ ("xmpyu %1,%2,%0"                                           \
272              : "=x" (__t.__f)                                           \
273              : "x" ((USItype)(u)),                                      \
274                "x" ((USItype)(v)));                                     \
275     (w1) = __t.__w1w0.__w1;                                             \
276     (w0) = __t.__w1w0.__w0;                                             \
277      } while (0)
278 #define UMUL_TIME 8
279 #else
280 #define UMUL_TIME 30
281 #endif
282 #define UDIV_TIME 40
283 #define count_leading_zeros(count, x) \
284   do {                                                                  \
285     USItype __tmp;                                                      \
286     __asm__ (                                                           \
287        "ldi             1,%0
288         extru,=         %1,15,16,%%r0           ; Bits 31..16 zero?
289         extru,tr        %1,15,16,%1             ; No.  Shift down, skip add.
290         ldo             16(%0),%0               ; Yes.  Perform add.
291         extru,=         %1,23,8,%%r0            ; Bits 15..8 zero?
292         extru,tr        %1,23,8,%1              ; No.  Shift down, skip add.
293         ldo             8(%0),%0                ; Yes.  Perform add.
294         extru,=         %1,27,4,%%r0            ; Bits 7..4 zero?
295         extru,tr        %1,27,4,%1              ; No.  Shift down, skip add.
296         ldo             4(%0),%0                ; Yes.  Perform add.
297         extru,=         %1,29,2,%%r0            ; Bits 3..2 zero?
298         extru,tr        %1,29,2,%1              ; No.  Shift down, skip add.
299         ldo             2(%0),%0                ; Yes.  Perform add.
300         extru           %1,30,1,%1              ; Extract bit 1.
301         sub             %0,%1,%0                ; Subtract it.
302         " : "=r" (count), "=r" (__tmp) : "1" (x));                      \
303   } while (0)
304 #endif
305
306 #if defined (__i386__) || defined (__i486__)
307 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
308   __asm__ ("addl %5,%1
309         adcl %3,%0"                                                     \
310            : "=r" ((USItype)(sh)),                                      \
311              "=&r" ((USItype)(sl))                                      \
312            : "%0" ((USItype)(ah)),                                      \
313              "g" ((USItype)(bh)),                                       \
314              "%1" ((USItype)(al)),                                      \
315              "g" ((USItype)(bl)))
316 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
317   __asm__ ("subl %5,%1
318         sbbl %3,%0"                                                     \
319            : "=r" ((USItype)(sh)),                                      \
320              "=&r" ((USItype)(sl))                                      \
321            : "0" ((USItype)(ah)),                                       \
322              "g" ((USItype)(bh)),                                       \
323              "1" ((USItype)(al)),                                       \
324              "g" ((USItype)(bl)))
325 #define umul_ppmm(w1, w0, u, v) \
326   __asm__ ("mull %3"                                                    \
327            : "=a" ((USItype)(w0)),                                      \
328              "=d" ((USItype)(w1))                                       \
329            : "%0" ((USItype)(u)),                                       \
330              "rm" ((USItype)(v)))
331 #define udiv_qrnnd(q, r, n1, n0, d) \
332   __asm__ ("divl %4"                                                    \
333            : "=a" ((USItype)(q)),                                       \
334              "=d" ((USItype)(r))                                        \
335            : "0" ((USItype)(n0)),                                       \
336              "1" ((USItype)(n1)),                                       \
337              "rm" ((USItype)(d)))
338 #define count_leading_zeros(count, x) \
339   do {                                                                  \
340     USItype __cbtmp;                                                    \
341     __asm__ ("bsrl %1,%0"                                               \
342              : "=r" (__cbtmp) : "rm" ((USItype)(x)));                   \
343     (count) = __cbtmp ^ 31;                                             \
344   } while (0)
345 #define UMUL_TIME 40
346 #define UDIV_TIME 40
347 #endif /* 80x86 */
348
349 #if defined (__i860__)
350 #if 0
351 /* Make sure these patterns really improve the code before
352    switching them on.  */
353 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
354   do {                                                                  \
355     union                                                               \
356       {                                                                 \
357         DItype __ll;                                                    \
358         struct {USItype __l, __h;} __i;                                 \
359       }  __a, __b, __s;                                                 \
360     __a.__i.__l = (al);                                                 \
361     __a.__i.__h = (ah);                                                 \
362     __b.__i.__l = (bl);                                                 \
363     __b.__i.__h = (bh);                                                 \
364     __asm__ ("fiadd.dd %1,%2,%0"                                        \
365              : "=f" (__s.__ll)                                          \
366              : "%f" (__a.__ll), "f" (__b.__ll));                        \
367     (sh) = __s.__i.__h;                                                 \
368     (sl) = __s.__i.__l;                                                 \
369     } while (0)
370 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
371   do {                                                                  \
372     union                                                               \
373       {                                                                 \
374         DItype __ll;                                                    \
375         struct {USItype __l, __h;} __i;                                 \
376       }  __a, __b, __s;                                                 \
377     __a.__i.__l = (al);                                                 \
378     __a.__i.__h = (ah);                                                 \
379     __b.__i.__l = (bl);                                                 \
380     __b.__i.__h = (bh);                                                 \
381     __asm__ ("fisub.dd %1,%2,%0"                                        \
382              : "=f" (__s.__ll)                                          \
383              : "%f" (__a.__ll), "f" (__b.__ll));                        \
384     (sh) = __s.__i.__h;                                                 \
385     (sl) = __s.__i.__l;                                                 \
386     } while (0)
387 #endif
388 #endif /* __i860__ */
389
390 #if defined (__i960__)
391 #define umul_ppmm(w1, w0, u, v) \
392   ({union {UDItype __ll;                                                \
393            struct {USItype __l, __h;} __i;                              \
394           } __xx;                                                       \
395   __asm__ ("emul        %2,%1,%0"                                       \
396            : "=d" (__xx.__ll)                                           \
397            : "%dI" ((USItype)(u)),                                      \
398              "dI" ((USItype)(v)));                                      \
399   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
400 #define __umulsidi3(u, v) \
401   ({UDItype __w;                                                        \
402     __asm__ ("emul      %2,%1,%0"                                       \
403              : "=d" (__w)                                               \
404              : "%dI" ((USItype)(u)),                                    \
405                "dI" ((USItype)(v)));                                    \
406     __w; })  
407 #endif /* __i960__ */
408
409 #if defined (__mc68000__)
410 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
411   __asm__ ("add%.l %5,%1
412         addx%.l %3,%0"                                                  \
413            : "=d" ((USItype)(sh)),                                      \
414              "=&d" ((USItype)(sl))                                      \
415            : "%0" ((USItype)(ah)),                                      \
416              "d" ((USItype)(bh)),                                       \
417              "%1" ((USItype)(al)),                                      \
418              "g" ((USItype)(bl)))
419 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
420   __asm__ ("sub%.l %5,%1
421         subx%.l %3,%0"                                                  \
422            : "=d" ((USItype)(sh)),                                      \
423              "=&d" ((USItype)(sl))                                      \
424            : "0" ((USItype)(ah)),                                       \
425              "d" ((USItype)(bh)),                                       \
426              "1" ((USItype)(al)),                                       \
427              "g" ((USItype)(bl)))
428 #if defined (__mc68020__) || defined (__NeXT__) || defined(mc68020)
429 #define umul_ppmm(w1, w0, u, v) \
430   __asm__ ("mulu%.l %3,%1:%0"                                           \
431            : "=d" ((USItype)(w0)),                                      \
432              "=d" ((USItype)(w1))                                       \
433            : "%0" ((USItype)(u)),                                       \
434              "dmi" ((USItype)(v)))
435 #define UMUL_TIME 45
436 #define udiv_qrnnd(q, r, n1, n0, d) \
437   __asm__ ("divu%.l %4,%1:%0"                                           \
438            : "=d" ((USItype)(q)),                                       \
439              "=d" ((USItype)(r))                                        \
440            : "0" ((USItype)(n0)),                                       \
441              "1" ((USItype)(n1)),                                       \
442              "dmi" ((USItype)(d)))
443 #define UDIV_TIME 90
444 #define sdiv_qrnnd(q, r, n1, n0, d) \
445   __asm__ ("divs%.l %4,%1:%0"                                           \
446            : "=d" ((USItype)(q)),                                       \
447              "=d" ((USItype)(r))                                        \
448            : "0" ((USItype)(n0)),                                       \
449              "1" ((USItype)(n1)),                                       \
450              "dmi" ((USItype)(d)))
451 #define count_leading_zeros(count, x) \
452   __asm__ ("bfffo %1{%b2:%b2},%0"                                       \
453            : "=d" ((USItype)(count))                                    \
454            : "od" ((USItype)(x)), "n" (0))
455 #else /* not mc68020 */
456 /* %/ inserts REGISTER_PREFIX, %# inserts IMMEDIATE_PREFIX.  */
457 #define umul_ppmm(xh, xl, a, b) \
458   __asm__ ("| Inlined umul_ppmm
459         move%.l %2,%/d0
460         move%.l %3,%/d1
461         move%.l %/d0,%/d2
462         swap    %/d0
463         move%.l %/d1,%/d3
464         swap    %/d1
465         move%.w %/d2,%/d4
466         mulu    %/d3,%/d4
467         mulu    %/d1,%/d2
468         mulu    %/d0,%/d3
469         mulu    %/d0,%/d1
470         move%.l %/d4,%/d0
471         eor%.w  %/d0,%/d0
472         swap    %/d0
473         add%.l  %/d0,%/d2
474         add%.l  %/d3,%/d2
475         jcc     1f
476         add%.l  %#65536,%/d1
477 1:      swap    %/d2
478         moveq   %#0,%/d0
479         move%.w %/d2,%/d0
480         move%.w %/d4,%/d2
481         move%.l %/d2,%1
482         add%.l  %/d1,%/d0
483         move%.l %/d0,%0"                                                \
484            : "=g" ((USItype)(xh)),                                      \
485              "=g" ((USItype)(xl))                                       \
486            : "g" ((USItype)(a)),                                        \
487              "g" ((USItype)(b))                                         \
488            : "d0", "d1", "d2", "d3", "d4")
489 #define UMUL_TIME 100
490 #define UDIV_TIME 400
491 #endif /* not mc68020 */
492 #endif /* mc68000 */
493
494 #if defined (__m88000__)
495 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
496   __asm__ ("addu.co %1,%r4,%r5
497         addu.ci %0,%r2,%r3"                                             \
498            : "=r" ((USItype)(sh)),                                      \
499              "=&r" ((USItype)(sl))                                      \
500            : "%rJ" ((USItype)(ah)),                                     \
501              "rJ" ((USItype)(bh)),                                      \
502              "%rJ" ((USItype)(al)),                                     \
503              "rJ" ((USItype)(bl)))
504 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
505   __asm__ ("subu.co %1,%r4,%r5
506         subu.ci %0,%r2,%r3"                                             \
507            : "=r" ((USItype)(sh)),                                      \
508              "=&r" ((USItype)(sl))                                      \
509            : "rJ" ((USItype)(ah)),                                      \
510              "rJ" ((USItype)(bh)),                                      \
511              "rJ" ((USItype)(al)),                                      \
512              "rJ" ((USItype)(bl)))
513 #define count_leading_zeros(count, x) \
514   do {                                                                  \
515     USItype __cbtmp;                                                    \
516     __asm__ ("ff1 %0,%1"                                                \
517              : "=r" (__cbtmp)                                           \
518              : "r" ((USItype)(x)));                                     \
519     (count) = __cbtmp ^ 31;                                             \
520   } while (0)
521 #if defined (__mc88110__)
522 #define umul_ppmm(wh, wl, u, v) \
523   do {                                                                  \
524     union {UDItype __ll;                                                \
525            struct {USItype __h, __l;} __i;                              \
526           } __xx;                                                       \
527     __asm__ ("mulu.d    %0,%1,%2"                                       \
528              : "=r" (__xx.__ll)                                         \
529              : "r" ((USItype)(u)),                                      \
530                "r" ((USItype)(v)));                                     \
531     (wh) = __xx.__i.__h;                                                \
532     (wl) = __xx.__i.__l;                                                \
533   } while (0)
534 #define udiv_qrnnd(q, r, n1, n0, d) \
535   ({union {UDItype __ll;                                                \
536            struct {USItype __h, __l;} __i;                              \
537           } __xx;                                                       \
538   USItype __q;                                                          \
539   __xx.__i.__h = (n1); __xx.__i.__l = (n0);                             \
540   __asm__ ("divu.d %0,%1,%2"                                            \
541            : "=r" (__q)                                                 \
542            : "r" (__xx.__ll),                                           \
543              "r" ((USItype)(d)));                                       \
544   (r) = (n0) - __q * (d); (q) = __q; })
545 #define UMUL_TIME 5
546 #define UDIV_TIME 25
547 #else
548 #define UMUL_TIME 17
549 #define UDIV_TIME 150
550 #endif /* __mc88110__ */
551 #endif /* __m88000__ */
552
553 #if defined (__mips__)
554 #define umul_ppmm(w1, w0, u, v) \
555   __asm__ ("multu %2,%3"                                                \
556            : "=l" ((USItype)(w0)),                                      \
557              "=h" ((USItype)(w1))                                       \
558            : "d" ((USItype)(u)),                                        \
559              "d" ((USItype)(v)))
560 #define UMUL_TIME 10
561 #define UDIV_TIME 100
562 #endif /* __mips__ */
563
564 #if defined (__ns32000__)
565 #define umul_ppmm(w1, w0, u, v) \
566   ({union {UDItype __ll;                                                \
567            struct {USItype __l, __h;} __i;                              \
568           } __xx;                                                       \
569   __asm__ ("meid %2,%0"                                                 \
570            : "=g" (__xx.__ll)                                           \
571            : "%0" ((USItype)(u)),                                       \
572              "g" ((USItype)(v)));                                       \
573   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
574 #define __umulsidi3(u, v) \
575   ({UDItype __w;                                                        \
576     __asm__ ("meid %2,%0"                                               \
577              : "=g" (__w)                                               \
578              : "%0" ((USItype)(u)),                                     \
579                "g" ((USItype)(v)));                                     \
580     __w; })
581 #define udiv_qrnnd(q, r, n1, n0, d) \
582   ({union {UDItype __ll;                                                \
583            struct {USItype __l, __h;} __i;                              \
584           } __xx;                                                       \
585   __xx.__i.__h = (n1); __xx.__i.__l = (n0);                             \
586   __asm__ ("deid %2,%0"                                                 \
587            : "=g" (__xx.__ll)                                           \
588            : "0" (__xx.__ll),                                           \
589              "g" ((USItype)(d)));                                       \
590   (r) = __xx.__i.__l; (q) = __xx.__i.__h; })
591 #endif /* __ns32000__ */
592
593 #if (defined (_ARCH_PPC) || defined (_IBMR2)) && W_TYPE_SIZE == 32
594 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
595   do {                                                                  \
596     if (__builtin_constant_p (bh) && (bh) == 0)                         \
597       __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{aze|addze} %0,%2"           \
598              : "=r" ((USItype)(sh)),                                    \
599                "=&r" ((USItype)(sl))                                    \
600              : "%r" ((USItype)(ah)),                                    \
601                "%r" ((USItype)(al)),                                    \
602                "rI" ((USItype)(bl)));                                   \
603     else if (__builtin_constant_p (bh) && (bh) ==~(USItype) 0)          \
604       __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{ame|addme} %0,%2"           \
605              : "=r" ((USItype)(sh)),                                    \
606                "=&r" ((USItype)(sl))                                    \
607              : "%r" ((USItype)(ah)),                                    \
608                "%r" ((USItype)(al)),                                    \
609                "rI" ((USItype)(bl)));                                   \
610     else                                                                \
611       __asm__ ("{a%I5|add%I5c} %1,%4,%5\n\t{ae|adde} %0,%2,%3"          \
612              : "=r" ((USItype)(sh)),                                    \
613                "=&r" ((USItype)(sl))                                    \
614              : "%r" ((USItype)(ah)),                                    \
615                "r" ((USItype)(bh)),                                     \
616                "%r" ((USItype)(al)),                                    \
617                "rI" ((USItype)(bl)));                                   \
618   } while (0)
619 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
620   do {                                                                  \
621     if (__builtin_constant_p (ah) && (ah) == 0)                         \
622       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfze|subfze} %0,%2"       \
623                : "=r" ((USItype)(sh)),                                  \
624                  "=&r" ((USItype)(sl))                                  \
625                : "r" ((USItype)(bh)),                                   \
626                  "rI" ((USItype)(al)),                                  \
627                  "r" ((USItype)(bl)));                                  \
628     else if (__builtin_constant_p (ah) && (ah) ==~(USItype) 0)          \
629       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfme|subfme} %0,%2"       \
630                : "=r" ((USItype)(sh)),                                  \
631                  "=&r" ((USItype)(sl))                                  \
632                : "r" ((USItype)(bh)),                                   \
633                  "rI" ((USItype)(al)),                                  \
634                  "r" ((USItype)(bl)));                                  \
635     else if (__builtin_constant_p (bh) && (bh) == 0)                    \
636       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{ame|addme} %0,%2"         \
637                : "=r" ((USItype)(sh)),                                  \
638                  "=&r" ((USItype)(sl))                                  \
639                : "r" ((USItype)(ah)),                                   \
640                  "rI" ((USItype)(al)),                                  \
641                  "r" ((USItype)(bl)));                                  \
642     else if (__builtin_constant_p (bh) && (bh) ==~(USItype) 0)          \
643       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{aze|addze} %0,%2"         \
644                : "=r" ((USItype)(sh)),                                  \
645                  "=&r" ((USItype)(sl))                                  \
646                : "r" ((USItype)(ah)),                                   \
647                  "rI" ((USItype)(al)),                                  \
648                  "r" ((USItype)(bl)));                                  \
649     else                                                                \
650       __asm__ ("{sf%I4|subf%I4c} %1,%5,%4\n\t{sfe|subfe} %0,%3,%2"      \
651                : "=r" ((USItype)(sh)),                                  \
652                  "=&r" ((USItype)(sl))                                  \
653                : "r" ((USItype)(ah)),                                   \
654                  "r" ((USItype)(bh)),                                   \
655                  "rI" ((USItype)(al)),                                  \
656                  "r" ((USItype)(bl)));                                  \
657   } while (0)
658 #define count_leading_zeros(count, x) \
659   __asm__ ("{cntlz|cntlzw} %0,%1"                                       \
660            : "=r" ((USItype)(count))                                    \
661            : "r" ((USItype)(x)))
662 #if defined (_ARCH_PPC)
663 #define umul_ppmm(ph, pl, m0, m1) \
664   do {                                                                  \
665     USItype __m0 = (m0), __m1 = (m1);                                   \
666     __asm__ ("mulhwu %0,%1,%2"                                          \
667              : "=r" ((USItype) ph)                                      \
668              : "%r" (__m0),                                             \
669                "r" (__m1));                                             \
670     (pl) = __m0 * __m1;                                                 \
671   } while (0)
672 #define UMUL_TIME 15
673 #define smul_ppmm(ph, pl, m0, m1) \
674   do {                                                                  \
675     SItype __m0 = (m0), __m1 = (m1);                                    \
676     __asm__ ("mulhw %0,%1,%2"                                           \
677              : "=r" ((SItype) ph)                                       \
678              : "%r" (__m0),                                             \
679                "r" (__m1));                                             \
680     (pl) = __m0 * __m1;                                                 \
681   } while (0)
682 #define SMUL_TIME 14
683 #define UDIV_TIME 120
684 #else
685 #define umul_ppmm(xh, xl, m0, m1) \
686   do {                                                                  \
687     USItype __m0 = (m0), __m1 = (m1);                                   \
688     __asm__ ("mul %0,%2,%3"                                             \
689              : "=r" ((USItype)(xh)),                                    \
690                "=q" ((USItype)(xl))                                     \
691              : "r" (__m0),                                              \
692                "r" (__m1));                                             \
693     (xh) += ((((SItype) __m0 >> 31) & __m1)                             \
694              + (((SItype) __m1 >> 31) & __m0));                         \
695   } while (0)
696 #define UMUL_TIME 8
697 #define smul_ppmm(xh, xl, m0, m1) \
698   __asm__ ("mul %0,%2,%3"                                               \
699            : "=r" ((SItype)(xh)),                                       \
700              "=q" ((SItype)(xl))                                        \
701            : "r" (m0),                                                  \
702              "r" (m1))
703 #define SMUL_TIME 4
704 #define sdiv_qrnnd(q, r, nh, nl, d) \
705   __asm__ ("div %0,%2,%4"                                               \
706            : "=r" ((SItype)(q)), "=q" ((SItype)(r))                     \
707            : "r" ((SItype)(nh)), "1" ((SItype)(nl)), "r" ((SItype)(d)))
708 #define UDIV_TIME 100
709 #endif
710 #endif /* Power architecture variants.  */
711
712 #if defined (__pyr__)
713 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
714   __asm__ ("addw        %5,%1
715         addwc   %3,%0"                                                  \
716            : "=r" ((USItype)(sh)),                                      \
717              "=&r" ((USItype)(sl))                                      \
718            : "%0" ((USItype)(ah)),                                      \
719              "g" ((USItype)(bh)),                                       \
720              "%1" ((USItype)(al)),                                      \
721              "g" ((USItype)(bl)))
722 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
723   __asm__ ("subw        %5,%1
724         subwb   %3,%0"                                                  \
725            : "=r" ((USItype)(sh)),                                      \
726              "=&r" ((USItype)(sl))                                      \
727            : "0" ((USItype)(ah)),                                       \
728              "g" ((USItype)(bh)),                                       \
729              "1" ((USItype)(al)),                                       \
730              "g" ((USItype)(bl)))
731 /* This insn works on Pyramids with AP, XP, or MI CPUs, but not with SP.  */
732 #define umul_ppmm(w1, w0, u, v) \
733   ({union {UDItype __ll;                                                \
734            struct {USItype __h, __l;} __i;                              \
735           } __xx;                                                       \
736   __asm__ ("movw %1,%R0
737         uemul %2,%0"                                                    \
738            : "=&r" (__xx.__ll)                                          \
739            : "g" ((USItype) (u)),                                       \
740              "g" ((USItype)(v)));                                       \
741   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
742 #endif /* __pyr__ */
743
744 #if defined (__ibm032__) /* RT/ROMP */
745 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
746   __asm__ ("a %1,%5
747         ae %0,%3"                                                       \
748            : "=r" ((USItype)(sh)),                                      \
749              "=&r" ((USItype)(sl))                                      \
750            : "%0" ((USItype)(ah)),                                      \
751              "r" ((USItype)(bh)),                                       \
752              "%1" ((USItype)(al)),                                      \
753              "r" ((USItype)(bl)))
754 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
755   __asm__ ("s %1,%5
756         se %0,%3"                                                       \
757            : "=r" ((USItype)(sh)),                                      \
758              "=&r" ((USItype)(sl))                                      \
759            : "0" ((USItype)(ah)),                                       \
760              "r" ((USItype)(bh)),                                       \
761              "1" ((USItype)(al)),                                       \
762              "r" ((USItype)(bl)))
763 #define umul_ppmm(ph, pl, m0, m1) \
764   do {                                                                  \
765     USItype __m0 = (m0), __m1 = (m1);                                   \
766     __asm__ (                                                           \
767        "s       r2,r2
768         mts     r10,%2
769         m       r2,%3
770         m       r2,%3
771         m       r2,%3
772         m       r2,%3
773         m       r2,%3
774         m       r2,%3
775         m       r2,%3
776         m       r2,%3
777         m       r2,%3
778         m       r2,%3
779         m       r2,%3
780         m       r2,%3
781         m       r2,%3
782         m       r2,%3
783         m       r2,%3
784         m       r2,%3
785         cas     %0,r2,r0
786         mfs     r10,%1"                                                 \
787              : "=r" ((USItype)(ph)),                                    \
788                "=r" ((USItype)(pl))                                     \
789              : "%r" (__m0),                                             \
790                 "r" (__m1)                                              \
791              : "r2");                                                   \
792     (ph) += ((((SItype) __m0 >> 31) & __m1)                             \
793              + (((SItype) __m1 >> 31) & __m0));                         \
794   } while (0)
795 #define UMUL_TIME 20
796 #define UDIV_TIME 200
797 #define count_leading_zeros(count, x) \
798   do {                                                                  \
799     if ((x) >= 0x10000)                                                 \
800       __asm__ ("clz     %0,%1"                                          \
801                : "=r" ((USItype)(count))                                \
802                : "r" ((USItype)(x) >> 16));                             \
803     else                                                                \
804       {                                                                 \
805         __asm__ ("clz   %0,%1"                                          \
806                  : "=r" ((USItype)(count))                              \
807                  : "r" ((USItype)(x)));                                 \
808         (count) += 16;                                                  \
809       }                                                                 \
810   } while (0)
811 #endif
812
813 #if defined (__sparc__)
814 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
815   __asm__ ("addcc %r4,%5,%1
816         addx %r2,%3,%0"                                                 \
817            : "=r" ((USItype)(sh)),                                      \
818              "=&r" ((USItype)(sl))                                      \
819            : "%rJ" ((USItype)(ah)),                                     \
820              "rI" ((USItype)(bh)),                                      \
821              "%rJ" ((USItype)(al)),                                     \
822              "rI" ((USItype)(bl))                                       \
823            __CLOBBER_CC)
824 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
825   __asm__ ("subcc %r4,%5,%1
826         subx %r2,%3,%0"                                                 \
827            : "=r" ((USItype)(sh)),                                      \
828              "=&r" ((USItype)(sl))                                      \
829            : "rJ" ((USItype)(ah)),                                      \
830              "rI" ((USItype)(bh)),                                      \
831              "rJ" ((USItype)(al)),                                      \
832              "rI" ((USItype)(bl))                                       \
833            __CLOBBER_CC)
834 #if defined (__sparc_v8__)
835 #define umul_ppmm(w1, w0, u, v) \
836   __asm__ ("umul %2,%3,%1;rd %%y,%0"                                    \
837            : "=r" ((USItype)(w1)),                                      \
838              "=r" ((USItype)(w0))                                       \
839            : "r" ((USItype)(u)),                                        \
840              "r" ((USItype)(v)))
841 #define udiv_qrnnd(q, r, n1, n0, d) \
842   __asm__ ("mov %2,%%y;nop;nop;nop;udiv %3,%4,%0;umul %0,%4,%1;sub %3,%1,%1"\
843            : "=&r" ((USItype)(q)),                                      \
844              "=&r" ((USItype)(r))                                       \
845            : "r" ((USItype)(n1)),                                       \
846              "r" ((USItype)(n0)),                                       \
847              "r" ((USItype)(d)))
848 #else
849 #if defined (__sparclite__)
850 /* This has hardware multiply but not divide.  It also has two additional
851    instructions scan (ffs from high bit) and divscc.  */
852 #define umul_ppmm(w1, w0, u, v) \
853   __asm__ ("umul %2,%3,%1;rd %%y,%0"                                    \
854            : "=r" ((USItype)(w1)),                                      \
855              "=r" ((USItype)(w0))                                       \
856            : "r" ((USItype)(u)),                                        \
857              "r" ((USItype)(v)))
858 #define udiv_qrnnd(q, r, n1, n0, d) \
859   __asm__ ("! Inlined udiv_qrnnd
860         wr      %%g0,%2,%%y     ! Not a delayed write for sparclite
861         tst     %%g0
862         divscc  %3,%4,%%g1
863         divscc  %%g1,%4,%%g1
864         divscc  %%g1,%4,%%g1
865         divscc  %%g1,%4,%%g1
866         divscc  %%g1,%4,%%g1
867         divscc  %%g1,%4,%%g1
868         divscc  %%g1,%4,%%g1
869         divscc  %%g1,%4,%%g1
870         divscc  %%g1,%4,%%g1
871         divscc  %%g1,%4,%%g1
872         divscc  %%g1,%4,%%g1
873         divscc  %%g1,%4,%%g1
874         divscc  %%g1,%4,%%g1
875         divscc  %%g1,%4,%%g1
876         divscc  %%g1,%4,%%g1
877         divscc  %%g1,%4,%%g1
878         divscc  %%g1,%4,%%g1
879         divscc  %%g1,%4,%%g1
880         divscc  %%g1,%4,%%g1
881         divscc  %%g1,%4,%%g1
882         divscc  %%g1,%4,%%g1
883         divscc  %%g1,%4,%%g1
884         divscc  %%g1,%4,%%g1
885         divscc  %%g1,%4,%%g1
886         divscc  %%g1,%4,%%g1
887         divscc  %%g1,%4,%%g1
888         divscc  %%g1,%4,%%g1
889         divscc  %%g1,%4,%%g1
890         divscc  %%g1,%4,%%g1
891         divscc  %%g1,%4,%%g1
892         divscc  %%g1,%4,%%g1
893         divscc  %%g1,%4,%0
894         rd      %%y,%1
895         bl,a 1f
896         add     %1,%4,%1
897 1:      ! End of inline udiv_qrnnd"                                     \
898            : "=r" ((USItype)(q)),                                       \
899              "=r" ((USItype)(r))                                        \
900            : "r" ((USItype)(n1)),                                       \
901              "r" ((USItype)(n0)),                                       \
902              "rI" ((USItype)(d))                                        \
903            : "%g1" __AND_CLOBBER_CC)
904 #define UDIV_TIME 37
905 #define count_leading_zeros(count, x) \
906   __asm__ ("scan %1,0,%0"                                               \
907            : "=r" ((USItype)(x))                                        \
908            : "r" ((USItype)(count)))
909 #else
910 /* SPARC without integer multiplication and divide instructions.
911    (i.e. at least Sun4/20,40,60,65,75,110,260,280,330,360,380,470,490) */
912 #define umul_ppmm(w1, w0, u, v) \
913   __asm__ ("! Inlined umul_ppmm
914         wr      %%g0,%2,%%y     ! SPARC has 0-3 delay insn after a wr
915         sra     %3,31,%%g2      ! Don't move this insn
916         and     %2,%%g2,%%g2    ! Don't move this insn
917         andcc   %%g0,0,%%g1     ! Don't move this insn
918         mulscc  %%g1,%3,%%g1
919         mulscc  %%g1,%3,%%g1
920         mulscc  %%g1,%3,%%g1
921         mulscc  %%g1,%3,%%g1
922         mulscc  %%g1,%3,%%g1
923         mulscc  %%g1,%3,%%g1
924         mulscc  %%g1,%3,%%g1
925         mulscc  %%g1,%3,%%g1
926         mulscc  %%g1,%3,%%g1
927         mulscc  %%g1,%3,%%g1
928         mulscc  %%g1,%3,%%g1
929         mulscc  %%g1,%3,%%g1
930         mulscc  %%g1,%3,%%g1
931         mulscc  %%g1,%3,%%g1
932         mulscc  %%g1,%3,%%g1
933         mulscc  %%g1,%3,%%g1
934         mulscc  %%g1,%3,%%g1
935         mulscc  %%g1,%3,%%g1
936         mulscc  %%g1,%3,%%g1
937         mulscc  %%g1,%3,%%g1
938         mulscc  %%g1,%3,%%g1
939         mulscc  %%g1,%3,%%g1
940         mulscc  %%g1,%3,%%g1
941         mulscc  %%g1,%3,%%g1
942         mulscc  %%g1,%3,%%g1
943         mulscc  %%g1,%3,%%g1
944         mulscc  %%g1,%3,%%g1
945         mulscc  %%g1,%3,%%g1
946         mulscc  %%g1,%3,%%g1
947         mulscc  %%g1,%3,%%g1
948         mulscc  %%g1,%3,%%g1
949         mulscc  %%g1,%3,%%g1
950         mulscc  %%g1,0,%%g1
951         add     %%g1,%%g2,%0
952         rd      %%y,%1"                                                 \
953            : "=r" ((USItype)(w1)),                                      \
954              "=r" ((USItype)(w0))                                       \
955            : "%rI" ((USItype)(u)),                                      \
956              "r" ((USItype)(v))                                         \
957            : "%g1", "%g2" __AND_CLOBBER_CC)
958 #define UMUL_TIME 39            /* 39 instructions */
959 /* It's quite necessary to add this much assembler for the sparc.
960    The default udiv_qrnnd (in C) is more than 10 times slower!  */
961 #define udiv_qrnnd(q, r, n1, n0, d) \
962   __asm__ ("! Inlined udiv_qrnnd
963         mov     32,%%g1
964         subcc   %1,%2,%%g0
965 1:      bcs     5f
966          addxcc %0,%0,%0        ! shift n1n0 and a q-bit in lsb
967         sub     %1,%2,%1        ! this kills msb of n
968         addx    %1,%1,%1        ! so this can't give carry
969         subcc   %%g1,1,%%g1
970 2:      bne     1b
971          subcc  %1,%2,%%g0
972         bcs     3f
973          addxcc %0,%0,%0        ! shift n1n0 and a q-bit in lsb
974         b       3f
975          sub    %1,%2,%1        ! this kills msb of n
976 4:      sub     %1,%2,%1
977 5:      addxcc  %1,%1,%1
978         bcc     2b
979          subcc  %%g1,1,%%g1
980 ! Got carry from n.  Subtract next step to cancel this carry.
981         bne     4b
982          addcc  %0,%0,%0        ! shift n1n0 and a 0-bit in lsb
983         sub     %1,%2,%1
984 3:      xnor    %0,0,%0
985         ! End of inline udiv_qrnnd"                                     \
986            : "=&r" ((USItype)(q)),                                      \
987              "=&r" ((USItype)(r))                                       \
988            : "r" ((USItype)(d)),                                        \
989              "1" ((USItype)(n1)),                                       \
990              "0" ((USItype)(n0)) : "%g1" __AND_CLOBBER_CC)
991 #define UDIV_TIME (3+7*32)      /* 7 instructions/iteration. 32 iterations. */
992 #endif /* __sparclite__ */
993 #endif /* __sparc_v8__ */
994 #endif /* __sparc__ */
995
996 #if defined (__vax__)
997 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
998   __asm__ ("addl2 %5,%1
999         adwc %3,%0"                                                     \
1000            : "=g" ((USItype)(sh)),                                      \
1001              "=&g" ((USItype)(sl))                                      \
1002            : "%0" ((USItype)(ah)),                                      \
1003              "g" ((USItype)(bh)),                                       \
1004              "%1" ((USItype)(al)),                                      \
1005              "g" ((USItype)(bl)))
1006 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1007   __asm__ ("subl2 %5,%1
1008         sbwc %3,%0"                                                     \
1009            : "=g" ((USItype)(sh)),                                      \
1010              "=&g" ((USItype)(sl))                                      \
1011            : "0" ((USItype)(ah)),                                       \
1012              "g" ((USItype)(bh)),                                       \
1013              "1" ((USItype)(al)),                                       \
1014              "g" ((USItype)(bl)))
1015 #define umul_ppmm(xh, xl, m0, m1) \
1016   do {                                                                  \
1017     union {                                                             \
1018         UDItype __ll;                                                   \
1019         struct {USItype __l, __h;} __i;                                 \
1020       } __xx;                                                           \
1021     USItype __m0 = (m0), __m1 = (m1);                                   \
1022     __asm__ ("emul %1,%2,$0,%0"                                         \
1023              : "=r" (__xx.__ll)                                         \
1024              : "g" (__m0),                                              \
1025                "g" (__m1));                                             \
1026     (xh) = __xx.__i.__h;                                                \
1027     (xl) = __xx.__i.__l;                                                \
1028     (xh) += ((((SItype) __m0 >> 31) & __m1)                             \
1029              + (((SItype) __m1 >> 31) & __m0));                         \
1030   } while (0)
1031 #define sdiv_qrnnd(q, r, n1, n0, d) \
1032   do {                                                                  \
1033     union {DItype __ll;                                                 \
1034            struct {SItype __l, __h;} __i;                               \
1035           } __xx;                                                       \
1036     __xx.__i.__h = n1; __xx.__i.__l = n0;                               \
1037     __asm__ ("ediv %3,%2,%0,%1"                                         \
1038              : "=g" (q), "=g" (r)                                       \
1039              : "g" (__xx.__ll), "g" (d));                               \
1040   } while (0)
1041 #endif /* __vax__ */
1042
1043 #endif /* __GNUC__ */
1044
1045 /* If this machine has no inline assembler, use C macros.  */
1046
1047 #if !defined (add_ssaaaa)
1048 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1049   do {                                                                  \
1050     USItype __x;                                                        \
1051     __x = (al) + (bl);                                                  \
1052     (sh) = (ah) + (bh) + (__x < (al));                                  \
1053     (sl) = __x;                                                         \
1054   } while (0)
1055 #endif
1056
1057 #if !defined (sub_ddmmss)
1058 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1059   do {                                                                  \
1060     USItype __x;                                                        \
1061     __x = (al) - (bl);                                                  \
1062     (sh) = (ah) - (bh) - (__x > (al));                                  \
1063     (sl) = __x;                                                         \
1064   } while (0)
1065 #endif
1066
1067 #if !defined (umul_ppmm)
1068 #define umul_ppmm(w1, w0, u, v)                                         \
1069   do {                                                                  \
1070     USItype __x0, __x1, __x2, __x3;                                     \
1071     USItype __ul, __vl, __uh, __vh;                                     \
1072                                                                         \
1073     __ul = __ll_lowpart (u);                                            \
1074     __uh = __ll_highpart (u);                                           \
1075     __vl = __ll_lowpart (v);                                            \
1076     __vh = __ll_highpart (v);                                           \
1077                                                                         \
1078     __x0 = (USItype) __ul * __vl;                                       \
1079     __x1 = (USItype) __ul * __vh;                                       \
1080     __x2 = (USItype) __uh * __vl;                                       \
1081     __x3 = (USItype) __uh * __vh;                                       \
1082                                                                         \
1083     __x1 += __ll_highpart (__x0);/* this can't give carry */            \
1084     __x1 += __x2;               /* but this indeed can */               \
1085     if (__x1 < __x2)            /* did we get it? */                    \
1086       __x3 += __ll_B;           /* yes, add it in the proper pos. */    \
1087                                                                         \
1088     (w1) = __x3 + __ll_highpart (__x1);                                 \
1089     (w0) = __ll_lowpart (__x1) * __ll_B + __ll_lowpart (__x0);          \
1090   } while (0)
1091 #endif
1092
1093 #if !defined (__umulsidi3)
1094 #define __umulsidi3(u, v) \
1095   ({DIunion __w;                                                        \
1096     umul_ppmm (__w.s.high, __w.s.low, u, v);                            \
1097     __w.ll; })
1098 #endif
1099
1100 /* Define this unconditionally, so it can be used for debugging.  */
1101 #define __udiv_qrnnd_c(q, r, n1, n0, d) \
1102   do {                                                                  \
1103     USItype __d1, __d0, __q1, __q0;                                     \
1104     USItype __r1, __r0, __m;                                            \
1105     __d1 = __ll_highpart (d);                                           \
1106     __d0 = __ll_lowpart (d);                                            \
1107                                                                         \
1108     __r1 = (n1) % __d1;                                                 \
1109     __q1 = (n1) / __d1;                                                 \
1110     __m = (USItype) __q1 * __d0;                                        \
1111     __r1 = __r1 * __ll_B | __ll_highpart (n0);                          \
1112     if (__r1 < __m)                                                     \
1113       {                                                                 \
1114         __q1--, __r1 += (d);                                            \
1115         if (__r1 >= (d)) /* i.e. we didn't get carry when adding to __r1 */\
1116           if (__r1 < __m)                                               \
1117             __q1--, __r1 += (d);                                        \
1118       }                                                                 \
1119     __r1 -= __m;                                                        \
1120                                                                         \
1121     __r0 = __r1 % __d1;                                                 \
1122     __q0 = __r1 / __d1;                                                 \
1123     __m = (USItype) __q0 * __d0;                                        \
1124     __r0 = __r0 * __ll_B | __ll_lowpart (n0);                           \
1125     if (__r0 < __m)                                                     \
1126       {                                                                 \
1127         __q0--, __r0 += (d);                                            \
1128         if (__r0 >= (d))                                                \
1129           if (__r0 < __m)                                               \
1130             __q0--, __r0 += (d);                                        \
1131       }                                                                 \
1132     __r0 -= __m;                                                        \
1133                                                                         \
1134     (q) = (USItype) __q1 * __ll_B | __q0;                               \
1135     (r) = __r0;                                                         \
1136   } while (0)
1137
1138 /* If the processor has no udiv_qrnnd but sdiv_qrnnd, go through
1139    __udiv_w_sdiv (defined in libgcc or elsewhere).  */
1140 #if !defined (udiv_qrnnd) && defined (sdiv_qrnnd)
1141 #define udiv_qrnnd(q, r, nh, nl, d) \
1142   do {                                                                  \
1143     USItype __r;                                                        \
1144     (q) = __udiv_w_sdiv (&__r, nh, nl, d);                              \
1145     (r) = __r;                                                          \
1146   } while (0)
1147 #endif
1148
1149 /* If udiv_qrnnd was not defined for this processor, use __udiv_qrnnd_c.  */
1150 #if !defined (udiv_qrnnd)
1151 #define UDIV_NEEDS_NORMALIZATION 1
1152 #define udiv_qrnnd __udiv_qrnnd_c
1153 #endif
1154
1155 #if !defined (count_leading_zeros)
1156 extern const UQItype __clz_tab[];
1157 #define count_leading_zeros(count, x) \
1158   do {                                                                  \
1159     USItype __xr = (x);                                                 \
1160     USItype __a;                                                        \
1161                                                                         \
1162     if (SI_TYPE_SIZE <= 32)                                             \
1163       {                                                                 \
1164         __a = __xr < (1<<2*__BITS4)                                     \
1165           ? (__xr < (1<<__BITS4) ? 0 : __BITS4)                         \
1166           : (__xr < (1<<3*__BITS4) ?  2*__BITS4 : 3*__BITS4);           \
1167       }                                                                 \
1168     else                                                                \
1169       {                                                                 \
1170         for (__a = SI_TYPE_SIZE - 8; __a > 0; __a -= 8)                 \
1171           if (((__xr >> __a) & 0xff) != 0)                              \
1172             break;                                                      \
1173       }                                                                 \
1174                                                                         \
1175     (count) = SI_TYPE_SIZE - (__clz_tab[__xr >> __a] + __a);            \
1176   } while (0)
1177 #endif
1178
1179 #ifndef UDIV_NEEDS_NORMALIZATION
1180 #define UDIV_NEEDS_NORMALIZATION 0
1181 #endif