gcc/longlong.h

   1 /* longlong.h -- definitions for mixed size 32/64 bit arithmetic.
   2    Copyright (C) 1991,92,94,95,96,97,98,99, 2000 Free Software Foundation, Inc.
   3
   4    This definition file is free software; you can redistribute it
   5    and/or modify it under the terms of the GNU General Public
   6    License as published by the Free Software Foundation; either
   7    version 2, or (at your option) any later version.
   8
   9    This definition file is distributed in the hope that it will be
  10    useful, but WITHOUT ANY WARRANTY; without even the implied
  11    warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
  12    See the GNU General Public License for more details.
  13
  14    You should have received a copy of the GNU General Public License
  15    along with this program; if not, write to the Free Software
  16    Foundation, Inc., 59 Temple Place - Suite 330,
  17    Boston, MA 02111-1307, USA.  */
  18
  19 /* You have to define the following before including this file:
  20
  21    UWtype -- An unsigned type, default type for operations (typically a "word")
  22    UHWtype -- An unsigned type, at least half the size of UWtype.
  23    UDWtype -- An unsigned type, at least twice as large a UWtype
  24    W_TYPE_SIZE -- size in bits of UWtype
  25
  26    UQItype -- Unsigned 8 bit type.
  27    SItype, USItype -- Signed and unsigned 32 bit types.
  28    DItype, UDItype -- Signed and unsigned 64 bit types.
  29
  30    On a 32 bit machine UWtype should typically be USItype;
  31    on a 64 bit machine, UWtype should typically be UDItype.
  32 */
  33
  34 #define __BITS4 (W_TYPE_SIZE / 4)
  35 #define __ll_B ((UWtype) 1 << (W_TYPE_SIZE / 2))
  36 #define __ll_lowpart(t) ((UWtype) (t) & (__ll_B - 1))
  37 #define __ll_highpart(t) ((UWtype) (t) >> (W_TYPE_SIZE / 2))
  38
  39 #ifndef W_TYPE_SIZE
  40 #define W_TYPE_SIZE     32
  41 #define UWtype          USItype
  42 #define UHWtype         USItype
  43 #define UDWtype         UDItype
  44 #endif
  45
  46 /* Define auxiliary asm macros.
  47
  48    1) umul_ppmm(high_prod, low_prod, multipler, multiplicand) multiplies two
  49    UWtype integers MULTIPLER and MULTIPLICAND, and generates a two UWtype
  50    word product in HIGH_PROD and LOW_PROD.
  51
  52    2) __umulsidi3(a,b) multiplies two UWtype integers A and B, and returns a
  53    UDWtype product.  This is just a variant of umul_ppmm.
  54
  55    3) udiv_qrnnd(quotient, remainder, high_numerator, low_numerator,
  56    denominator) divides a UDWtype, composed by the UWtype integers
  57    HIGH_NUMERATOR and LOW_NUMERATOR, by DENOMINATOR and places the quotient
  58    in QUOTIENT and the remainder in REMAINDER.  HIGH_NUMERATOR must be less
  59    than DENOMINATOR for correct operation.  If, in addition, the most
  60    significant bit of DENOMINATOR must be 1, then the pre-processor symbol
  61    UDIV_NEEDS_NORMALIZATION is defined to 1.
  62
  63    4) sdiv_qrnnd(quotient, remainder, high_numerator, low_numerator,
  64    denominator).  Like udiv_qrnnd but the numbers are signed.  The quotient
  65    is rounded towards 0.
  66
  67    5) count_leading_zeros(count, x) counts the number of zero-bits from the
  68    msb to the first non-zero bit in the UWtype X.  This is the number of
  69    steps X needs to be shifted left to set the msb.  Undefined for X == 0,
  70    unless the symbol COUNT_LEADING_ZEROS_0 is defined to some value.
  71
  72    6) count_trailing_zeros(count, x) like count_leading_zeros, but counts
  73    from the least significant end.
  74
  75    7) add_ssaaaa(high_sum, low_sum, high_addend_1, low_addend_1,
  76    high_addend_2, low_addend_2) adds two UWtype integers, composed by
  77    HIGH_ADDEND_1 and LOW_ADDEND_1, and HIGH_ADDEND_2 and LOW_ADDEND_2
  78    respectively.  The result is placed in HIGH_SUM and LOW_SUM.  Overflow
  79    (i.e. carry out) is not stored anywhere, and is lost.
  80
  81    8) sub_ddmmss(high_difference, low_difference, high_minuend, low_minuend,
  82    high_subtrahend, low_subtrahend) subtracts two two-word UWtype integers,
  83    composed by HIGH_MINUEND_1 and LOW_MINUEND_1, and HIGH_SUBTRAHEND_2 and
  84    LOW_SUBTRAHEND_2 respectively.  The result is placed in HIGH_DIFFERENCE
  85    and LOW_DIFFERENCE.  Overflow (i.e. carry out) is not stored anywhere,
  86    and is lost.
  87
  88    If any of these macros are left undefined for a particular CPU,
  89    C macros are used.  */
  90
  91 /* The CPUs come in alphabetical order below.
  92
  93    Please add support for more CPUs here, or improve the current support
  94    for the CPUs below!
  95    (E.g. WE32100, IBM360.)  */
  96
  97 #if defined (__GNUC__) && !defined (NO_ASM)
  98
  99 /* We sometimes need to clobber "cc" with gcc2, but that would not be
 100    understood by gcc1.  Use cpp to avoid major code duplication.  */
 101 #if __GNUC__ < 2
 102 #define __CLOBBER_CC
 103 #define __AND_CLOBBER_CC
 104 #else /* __GNUC__ >= 2 */
 105 #define __CLOBBER_CC : "cc"
 106 #define __AND_CLOBBER_CC , "cc"
 107 #endif /* __GNUC__ < 2 */
 108
 109 #if (defined (__a29k__) || defined (_AM29K)) && W_TYPE_SIZE == 32
 110 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 111   __asm__ ("add %1,%4,%5\n\taddc %0,%2,%3"                              \
 112            : "=r" ((USItype) (sh)),                                     \
 113             "=&r" ((USItype) (sl))                                      \
 114            : "%r" ((USItype) (ah)),                                     \
 115              "rI" ((USItype) (bh)),                                     \
 116              "%r" ((USItype) (al)),                                     \
 117              "rI" ((USItype) (bl)))
 118 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 119   __asm__ ("sub %1,%4,%5\n\tsubc %0,%2,%3"                              \
 120            : "=r" ((USItype) (sh)),                                     \
 121              "=&r" ((USItype) (sl))                                     \
 122            : "r" ((USItype) (ah)),                                      \
 123              "rI" ((USItype) (bh)),                                     \
 124              "r" ((USItype) (al)),                                      \
 125              "rI" ((USItype) (bl)))
 126 #define umul_ppmm(xh, xl, m0, m1) \
 127   do {                                                                  \
 128     USItype __m0 = (m0), __m1 = (m1);                                   \
 129     __asm__ ("multiplu %0,%1,%2"                                        \
 130              : "=r" ((USItype) (xl))                                    \
 131              : "r" (__m0),                                              \
 132                "r" (__m1));                                             \
 133     __asm__ ("multmu %0,%1,%2"                                          \
 134              : "=r" ((USItype) (xh))                                    \
 135              : "r" (__m0),                                              \
 136                "r" (__m1));                                             \
 137   } while (0)
 138 #define udiv_qrnnd(q, r, n1, n0, d) \
 139   __asm__ ("dividu %0,%3,%4"                                            \
 140            : "=r" ((USItype) (q)),                                      \
 141              "=q" ((USItype) (r))                                       \
 142            : "1" ((USItype) (n1)),                                      \
 143              "r" ((USItype) (n0)),                                      \
 144              "r" ((USItype) (d)))
 145 #define count_leading_zeros(count, x) \
 146     __asm__ ("clz %0,%1"                                                \
 147              : "=r" ((USItype) (count))                                 \
 148              : "r" ((USItype) (x)))
 149 #define COUNT_LEADING_ZEROS_0 32
 150 #endif /* __a29k__ */
 151
 152 #if defined (__alpha) && W_TYPE_SIZE == 64
 153 #define umul_ppmm(ph, pl, m0, m1) \
 154   do {                                                                  \
 155     UDItype __m0 = (m0), __m1 = (m1);                                   \
 156     __asm__ ("umulh %r1,%2,%0"                                          \
 157              : "=r" ((UDItype) ph)                                      \
 158              : "%rJ" (__m0),                                            \
 159                "rI" (__m1));                                            \
 160     (pl) = __m0 * __m1;                                                 \
 161   } while (0)
 162 #define UMUL_TIME 46
 163 #ifndef LONGLONG_STANDALONE
 164 #define udiv_qrnnd(q, r, n1, n0, d) \
 165   do { UDItype __r;                                                     \
 166     (q) = __udiv_qrnnd (&__r, (n1), (n0), (d));                         \
 167     (r) = __r;                                                          \
 168   } while (0)
 169 extern UDItype __udiv_qrnnd PARAMS ((UDItype *, UDItype, UDItype, UDItype));
 170 #define UDIV_TIME 220
 171 #endif /* LONGLONG_STANDALONE */
 172 #endif /* __alpha */
 173
 174 #if defined (__arc__) && W_TYPE_SIZE == 32
 175 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 176   __asm__ ("add.f       %1, %4, %5\n\tadc       %0, %2, %3"             \
 177            : "=r" ((USItype) (sh)),                                     \
 178              "=&r" ((USItype) (sl))                                     \
 179            : "%r" ((USItype) (ah)),                                     \
 180              "rIJ" ((USItype) (bh)),                                    \
 181              "%r" ((USItype) (al)),                                     \
 182              "rIJ" ((USItype) (bl)))
 183 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 184   __asm__ ("sub.f       %1, %4, %5\n\tsbc       %0, %2, %3"             \
 185            : "=r" ((USItype) (sh)),                                     \
 186              "=&r" ((USItype) (sl))                                     \
 187            : "r" ((USItype) (ah)),                                      \
 188              "rIJ" ((USItype) (bh)),                                    \
 189              "r" ((USItype) (al)),                                      \
 190              "rIJ" ((USItype) (bl)))
 191 /* Call libgcc1 routine.  */
 192 #define umul_ppmm(w1, w0, u, v) \
 193 do {                                                                    \
 194   DWunion __w;                                                          \
 195   __w.ll = __umulsidi3 (u, v);                                          \
 196   w1 = __w.s.high;                                                      \
 197   w0 = __w.s.low;                                                       \
 198 } while (0)
 199 #define __umulsidi3 __umulsidi3
 200 UDItype __umulsidi3 (USItype, USItype);
 201 #endif
 202
 203 #if defined (__arm__) && W_TYPE_SIZE == 32
 204 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 205   __asm__ ("adds        %1, %4, %5\n\tadc       %0, %2, %3"             \
 206            : "=r" ((USItype) (sh)),                                     \
 207              "=&r" ((USItype) (sl))                                     \
 208            : "%r" ((USItype) (ah)),                                     \
 209              "rI" ((USItype) (bh)),                                     \
 210              "%r" ((USItype) (al)),                                     \
 211              "rI" ((USItype) (bl)))
 212 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 213   __asm__ ("subs        %1, %4, %5\n\tsbc       %0, %2, %3"             \
 214            : "=r" ((USItype) (sh)),                                     \
 215              "=&r" ((USItype) (sl))                                     \
 216            : "r" ((USItype) (ah)),                                      \
 217              "rI" ((USItype) (bh)),                                     \
 218              "r" ((USItype) (al)),                                      \
 219              "rI" ((USItype) (bl)))
 220 #define umul_ppmm(xh, xl, a, b) \
 221 {register USItype __t0, __t1, __t2;                                     \
 222   __asm__ ("%@ Inlined umul_ppmm\n"                                     \
 223            "    mov     %2, %5, lsr #16\n"                              \
 224            "    mov     %0, %6, lsr #16\n"                              \
 225            "    bic     %3, %5, %2, lsl #16\n"                          \
 226            "    bic     %4, %6, %0, lsl #16\n"                          \
 227            "    mul     %1, %3, %4\n"                                   \
 228            "    mul     %4, %2, %4\n"                                   \
 229            "    mul     %3, %0, %3\n"                                   \
 230            "    mul     %0, %2, %0\n"                                   \
 231            "    adds    %3, %4, %3\n"                                   \
 232            "    addcs   %0, %0, #65536\n"                               \
 233            "    adds    %1, %1, %3, lsl #16\n"                          \
 234            "    adc     %0, %0, %3, lsr #16"                            \
 235            : "=&r" ((USItype) (xh)),                                    \
 236              "=r" ((USItype) (xl)),                                     \
 237              "=&r" (__t0), "=&r" (__t1), "=r" (__t2)                    \
 238            : "r" ((USItype) (a)),                                       \
 239              "r" ((USItype) (b)));}
 240 #define UMUL_TIME 20
 241 #define UDIV_TIME 100
 242 #endif /* __arm__ */
 243
 244 #if defined (__clipper__) && W_TYPE_SIZE == 32
 245 #define umul_ppmm(w1, w0, u, v) \
 246   ({union {UDItype __ll;                                                \
 247            struct {USItype __l, __h;} __i;                              \
 248           } __xx;                                                       \
 249   __asm__ ("mulwux %2,%0"                                               \
 250            : "=r" (__xx.__ll)                                           \
 251            : "%0" ((USItype) (u)),                                      \
 252              "r" ((USItype) (v)));                                      \
 253   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
 254 #define smul_ppmm(w1, w0, u, v) \
 255   ({union {DItype __ll;                                                 \
 256            struct {SItype __l, __h;} __i;                               \
 257           } __xx;                                                       \
 258   __asm__ ("mulwx %2,%0"                                                \
 259            : "=r" (__xx.__ll)                                           \
 260            : "%0" ((SItype) (u)),                                       \
 261              "r" ((SItype) (v)));                                       \
 262   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
 263 #define __umulsidi3(u, v) \
 264   ({UDItype __w;                                                        \
 265     __asm__ ("mulwux %2,%0"                                             \
 266              : "=r" (__w)                                               \
 267              : "%0" ((USItype) (u)),                                    \
 268                "r" ((USItype) (v)));                                    \
 269     __w; })
 270 #endif /* __clipper__ */
 271
 272 #if defined (__gmicro__) && W_TYPE_SIZE == 32
 273 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 274   __asm__ ("add.w %5,%1\n\taddx %3,%0"                                  \
 275            : "=g" ((USItype) (sh)),                                     \
 276              "=&g" ((USItype) (sl))                                     \
 277            : "%0" ((USItype) (ah)),                                     \
 278              "g" ((USItype) (bh)),                                      \
 279              "%1" ((USItype) (al)),                                     \
 280              "g" ((USItype) (bl)))
 281 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 282   __asm__ ("sub.w %5,%1\n\tsubx %3,%0"                                  \
 283            : "=g" ((USItype) (sh)),                                     \
 284              "=&g" ((USItype) (sl))                                     \
 285            : "0" ((USItype) (ah)),                                      \
 286              "g" ((USItype) (bh)),                                      \
 287              "1" ((USItype) (al)),                                      \
 288              "g" ((USItype) (bl)))
 289 #define umul_ppmm(ph, pl, m0, m1) \
 290   __asm__ ("mulx %3,%0,%1"                                              \
 291            : "=g" ((USItype) (ph)),                                     \
 292              "=r" ((USItype) (pl))                                      \
 293            : "%0" ((USItype) (m0)),                                     \
 294              "g" ((USItype) (m1)))
 295 #define udiv_qrnnd(q, r, nh, nl, d) \
 296   __asm__ ("divx %4,%0,%1"                                              \
 297            : "=g" ((USItype) (q)),                                      \
 298              "=r" ((USItype) (r))                                       \
 299            : "1" ((USItype) (nh)),                                      \
 300              "0" ((USItype) (nl)),                                      \
 301              "g" ((USItype) (d)))
 302 #define count_leading_zeros(count, x) \
 303   __asm__ ("bsch/1 %1,%0"                                               \
 304            : "=g" (count)                                               \
 305            : "g" ((USItype) (x)),                                       \
 306              "0" ((USItype) 0))
 307 #endif
 308
 309 #if defined (__hppa) && W_TYPE_SIZE == 32
 310 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 311   __asm__ ("add %4,%5,%1\n\taddc %2,%3,%0"                              \
 312            : "=r" ((USItype) (sh)),                                     \
 313              "=&r" ((USItype) (sl))                                     \
 314            : "%rM" ((USItype) (ah)),                                    \
 315              "rM" ((USItype) (bh)),                                     \
 316              "%rM" ((USItype) (al)),                                    \
 317              "rM" ((USItype) (bl)))
 318 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 319   __asm__ ("sub %4,%5,%1\n\tsubb %2,%3,%0"                              \
 320            : "=r" ((USItype) (sh)),                                     \
 321              "=&r" ((USItype) (sl))                                     \
 322            : "rM" ((USItype) (ah)),                                     \
 323              "rM" ((USItype) (bh)),                                     \
 324              "rM" ((USItype) (al)),                                     \
 325              "rM" ((USItype) (bl)))
 326 #if defined (_PA_RISC1_1)
 327 #define umul_ppmm(w1, w0, u, v) \
 328   do {                                                                  \
 329     union                                                               \
 330       {                                                                 \
 331         UDItype __f;                                                    \
 332         struct {USItype __w1, __w0;} __w1w0;                            \
 333       } __t;                                                            \
 334     __asm__ ("xmpyu %1,%2,%0"                                           \
 335              : "=x" (__t.__f)                                           \
 336              : "x" ((USItype) (u)),                                     \
 337                "x" ((USItype) (v)));                                    \
 338     (w1) = __t.__w1w0.__w1;                                             \
 339     (w0) = __t.__w1w0.__w0;                                             \
 340      } while (0)
 341 #define UMUL_TIME 8
 342 #else
 343 #define UMUL_TIME 30
 344 #endif
 345 #define UDIV_TIME 40
 346 #define count_leading_zeros(count, x) \
 347   do {                                                                  \
 348     USItype __tmp;                                                      \
 349     __asm__ (                                                           \
 350        "ldi             1,%0\n"                                         \
 351 "       extru,=         %1,15,16,%%r0           ; Bits 31..16 zero?\n"  \
 352 "       extru,tr        %1,15,16,%1             ; No.  Shift down, skip add.\n"\
 353 "       ldo             16(%0),%0               ; Yes.  Perform add.\n" \
 354 "       extru,=         %1,23,8,%%r0            ; Bits 15..8 zero?\n"   \
 355 "       extru,tr        %1,23,8,%1              ; No.  Shift down, skip add.\n"\
 356 "       ldo             8(%0),%0                ; Yes.  Perform add.\n" \
 357 "       extru,=         %1,27,4,%%r0            ; Bits 7..4 zero?\n"    \
 358 "       extru,tr        %1,27,4,%1              ; No.  Shift down, skip add.\n"\
 359 "       ldo             4(%0),%0                ; Yes.  Perform add.\n" \
 360 "       extru,=         %1,29,2,%%r0            ; Bits 3..2 zero?\n"    \
 361 "       extru,tr        %1,29,2,%1              ; No.  Shift down, skip add.\n"\
 362 "       ldo             2(%0),%0                ; Yes.  Perform add.\n" \
 363 "       extru           %1,30,1,%1              ; Extract bit 1.\n"     \
 364 "       sub             %0,%1,%0                ; Subtract it.\n"       \
 365         : "=r" (count), "=r" (__tmp) : "1" (x));                        \
 366   } while (0)
 367 #endif
 368
 369 #if (defined (__i370__) || defined (__mvs__)) && W_TYPE_SIZE == 32
 370 #define umul_ppmm(xh, xl, m0, m1) \
 371   do {                                                                  \
 372     union {UDItype __ll;                                                \
 373            struct {USItype __h, __l;} __i;                              \
 374           } __xx;                                                       \
 375     USItype __m0 = (m0), __m1 = (m1);                                   \
 376     __asm__ ("mr %0,%3"                                                 \
 377              : "=r" (__xx.__i.__h),                                     \
 378                "=r" (__xx.__i.__l)                                      \
 379              : "%1" (__m0),                                             \
 380                "r" (__m1));                                             \
 381     (xh) = __xx.__i.__h; (xl) = __xx.__i.__l;                           \
 382     (xh) += ((((SItype) __m0 >> 31) & __m1)                             \
 383              + (((SItype) __m1 >> 31) & __m0));                         \
 384   } while (0)
 385 #define smul_ppmm(xh, xl, m0, m1) \
 386   do {                                                                  \
 387     union {DItype __ll;                                                 \
 388            struct {USItype __h, __l;} __i;                              \
 389           } __xx;                                                       \
 390     __asm__ ("mr %0,%3"                                                 \
 391              : "=r" (__xx.__i.__h),                                     \
 392                "=r" (__xx.__i.__l)                                      \
 393              : "%1" (m0),                                               \
 394                "r" (m1));                                               \
 395     (xh) = __xx.__i.__h; (xl) = __xx.__i.__l;                           \
 396   } while (0)
 397 #define sdiv_qrnnd(q, r, n1, n0, d) \
 398   do {                                                                  \
 399     union {DItype __ll;                                                 \
 400            struct {USItype __h, __l;} __i;                              \
 401           } __xx;                                                       \
 402     __xx.__i.__h = n1; __xx.__i.__l = n0;                               \
 403     __asm__ ("dr %0,%2"                                                 \
 404              : "=r" (__xx.__ll)                                         \
 405              : "0" (__xx.__ll), "r" (d));                               \
 406     (q) = __xx.__i.__l; (r) = __xx.__i.__h;                             \
 407   } while (0)
 408 #endif
 409
 410 #if (defined (__i386__) || defined (__i486__)) && W_TYPE_SIZE == 32
 411 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 412   __asm__ ("addl %5,%1\n\tadcl %3,%0"                                   \
 413            : "=r" ((USItype) (sh)),                                     \
 414              "=&r" ((USItype) (sl))                                     \
 415            : "%0" ((USItype) (ah)),                                     \
 416              "g" ((USItype) (bh)),                                      \
 417              "%1" ((USItype) (al)),                                     \
 418              "g" ((USItype) (bl)))
 419 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 420   __asm__ ("subl %5,%1\n\tsbbl %3,%0"                                   \
 421            : "=r" ((USItype) (sh)),                                     \
 422              "=&r" ((USItype) (sl))                                     \
 423            : "0" ((USItype) (ah)),                                      \
 424              "g" ((USItype) (bh)),                                      \
 425              "1" ((USItype) (al)),                                      \
 426              "g" ((USItype) (bl)))
 427 #define umul_ppmm(w1, w0, u, v) \
 428   __asm__ ("mull %3"                                                    \
 429            : "=a" ((USItype) (w0)),                                     \
 430              "=d" ((USItype) (w1))                                      \
 431            : "%0" ((USItype) (u)),                                      \
 432              "rm" ((USItype) (v)))
 433 #define udiv_qrnnd(q, r, n1, n0, dv) \
 434   __asm__ ("divl %4"                                                    \
 435            : "=a" ((USItype) (q)),                                      \
 436              "=d" ((USItype) (r))                                       \
 437            : "0" ((USItype) (n0)),                                      \
 438              "1" ((USItype) (n1)),                                      \
 439              "rm" ((USItype) (dv)))
 440 #define count_leading_zeros(count, x) \
 441   do {                                                                  \
 442     USItype __cbtmp;                                                    \
 443     __asm__ ("bsrl %1,%0"                                               \
 444              : "=r" (__cbtmp) : "rm" ((USItype) (x)));                  \
 445     (count) = __cbtmp ^ 31;                                             \
 446   } while (0)
 447 #define count_trailing_zeros(count, x) \
 448   __asm__ ("bsfl %1,%0" : "=r" (count) : "rm" ((USItype)(x)))
 449 #define UMUL_TIME 40
 450 #define UDIV_TIME 40
 451 #endif /* 80x86 */
 452
 453 #if defined (__i860__) && W_TYPE_SIZE == 32
 454 #if 0
 455 /* Make sure these patterns really improve the code before
 456    switching them on.  */
 457 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 458   do {                                                                  \
 459     union                                                               \
 460       {                                                                 \
 461         DItype __ll;                                                    \
 462         struct {USItype __l, __h;} __i;                                 \
 463       }  __a, __b, __s;                                                 \
 464     __a.__i.__l = (al);                                                 \
 465     __a.__i.__h = (ah);                                                 \
 466     __b.__i.__l = (bl);                                                 \
 467     __b.__i.__h = (bh);                                                 \
 468     __asm__ ("fiadd.dd %1,%2,%0"                                        \
 469              : "=f" (__s.__ll)                                          \
 470              : "%f" (__a.__ll), "f" (__b.__ll));                        \
 471     (sh) = __s.__i.__h;                                                 \
 472     (sl) = __s.__i.__l;                                                 \
 473     } while (0)
 474 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 475   do {                                                                  \
 476     union                                                               \
 477       {                                                                 \
 478         DItype __ll;                                                    \
 479         struct {USItype __l, __h;} __i;                                 \
 480       }  __a, __b, __s;                                                 \
 481     __a.__i.__l = (al);                                                 \
 482     __a.__i.__h = (ah);                                                 \
 483     __b.__i.__l = (bl);                                                 \
 484     __b.__i.__h = (bh);                                                 \
 485     __asm__ ("fisub.dd %1,%2,%0"                                        \
 486              : "=f" (__s.__ll)                                          \
 487              : "%f" (__a.__ll), "f" (__b.__ll));                        \
 488     (sh) = __s.__i.__h;                                                 \
 489     (sl) = __s.__i.__l;                                                 \
 490     } while (0)
 491 #endif
 492 #endif /* __i860__ */
 493
 494 #if defined (__i960__) && W_TYPE_SIZE == 32
 495 #define umul_ppmm(w1, w0, u, v) \
 496   ({union {UDItype __ll;                                                \
 497            struct {USItype __l, __h;} __i;                              \
 498           } __xx;                                                       \
 499   __asm__ ("emul        %2,%1,%0"                                       \
 500            : "=d" (__xx.__ll)                                           \
 501            : "%dI" ((USItype) (u)),                                     \
 502              "dI" ((USItype) (v)));                                     \
 503   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
 504 #define __umulsidi3(u, v) \
 505   ({UDItype __w;                                                        \
 506     __asm__ ("emul      %2,%1,%0"                                       \
 507              : "=d" (__w)                                               \
 508              : "%dI" ((USItype) (u)),                                   \
 509                "dI" ((USItype) (v)));                                   \
 510     __w; })
 511 #endif /* __i960__ */
 512
 513 #if defined (__M32R__) && W_TYPE_SIZE == 32
 514 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 515   /* The cmp clears the condition bit.  */ \
 516   __asm__ ("cmp %0,%0\n\taddx %%5,%1\n\taddx %%3,%0"                    \
 517            : "=r" ((USItype) (sh)),                                     \
 518              "=&r" ((USItype) (sl))                                     \
 519            : "%0" ((USItype) (ah)),                                     \
 520              "r" ((USItype) (bh)),                                      \
 521              "%1" ((USItype) (al)),                                     \
 522              "r" ((USItype) (bl))                                       \
 523            : "cbit")
 524 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 525   /* The cmp clears the condition bit.  */ \
 526   __asm__ ("cmp %0,%0\n\tsubx %5,%1\n\tsubx %3,%0"                      \
 527            : "=r" ((USItype) (sh)),                                     \
 528              "=&r" ((USItype) (sl))                                     \
 529            : "0" ((USItype) (ah)),                                      \
 530              "r" ((USItype) (bh)),                                      \
 531              "1" ((USItype) (al)),                                      \
 532              "r" ((USItype) (bl))                                       \
 533            : "cbit")
 534 #endif /* __M32R__ */
 535
 536 #if defined (__mc68000__) && W_TYPE_SIZE == 32
 537 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 538   __asm__ ("add%.l %5,%1\n\taddx%.l %3,%0"                              \
 539            : "=d" ((USItype) (sh)),                                     \
 540              "=&d" ((USItype) (sl))                                     \
 541            : "%0" ((USItype) (ah)),                                     \
 542              "d" ((USItype) (bh)),                                      \
 543              "%1" ((USItype) (al)),                                     \
 544              "g" ((USItype) (bl)))
 545 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 546   __asm__ ("sub%.l %5,%1\n\tsubx%.l %3,%0"                              \
 547            : "=d" ((USItype) (sh)),                                     \
 548              "=&d" ((USItype) (sl))                                     \
 549            : "0" ((USItype) (ah)),                                      \
 550              "d" ((USItype) (bh)),                                      \
 551              "1" ((USItype) (al)),                                      \
 552              "g" ((USItype) (bl)))
 553
 554 /* The '020, '030, '040 and CPU32 have 32x32->64 and 64/32->32q-32r. */
 555 #if defined (__mc68020__) || defined(mc68020) \
 556         || defined(__mc68030__) || defined(mc68030) \
 557         || defined(__mc68040__) || defined(mc68040) \
 558         || defined(__mcpu32__) || defined(mcpu32) \
 559         || defined(__NeXT__)
 560 #define umul_ppmm(w1, w0, u, v) \
 561   __asm__ ("mulu%.l %3,%1:%0"                                           \
 562            : "=d" ((USItype) (w0)),                                     \
 563              "=d" ((USItype) (w1))                                      \
 564            : "%0" ((USItype) (u)),                                      \
 565              "dmi" ((USItype) (v)))
 566 #define UMUL_TIME 45
 567 #define udiv_qrnnd(q, r, n1, n0, d) \
 568   __asm__ ("divu%.l %4,%1:%0"                                           \
 569            : "=d" ((USItype) (q)),                                      \
 570              "=d" ((USItype) (r))                                       \
 571            : "0" ((USItype) (n0)),                                      \
 572              "1" ((USItype) (n1)),                                      \
 573              "dmi" ((USItype) (d)))
 574 #define UDIV_TIME 90
 575 #define sdiv_qrnnd(q, r, n1, n0, d) \
 576   __asm__ ("divs%.l %4,%1:%0"                                           \
 577            : "=d" ((USItype) (q)),                                      \
 578              "=d" ((USItype) (r))                                       \
 579            : "0" ((USItype) (n0)),                                      \
 580              "1" ((USItype) (n1)),                                      \
 581              "dmi" ((USItype) (d)))
 582
 583 #else /* not mc68020 */
 584 #if !defined(__mcf5200__)
 585 /* %/ inserts REGISTER_PREFIX, %# inserts IMMEDIATE_PREFIX.  */
 586 #define umul_ppmm(xh, xl, a, b) \
 587   __asm__ ("| Inlined umul_ppmm\n"                                      \
 588            "    move%.l %2,%/d0\n"                                      \
 589            "    move%.l %3,%/d1\n"                                      \
 590            "    move%.l %/d0,%/d2\n"                                    \
 591            "    swap    %/d0\n"                                         \
 592            "    move%.l %/d1,%/d3\n"                                    \
 593            "    swap    %/d1\n"                                         \
 594            "    move%.w %/d2,%/d4\n"                                    \
 595            "    mulu    %/d3,%/d4\n"                                    \
 596            "    mulu    %/d1,%/d2\n"                                    \
 597            "    mulu    %/d0,%/d3\n"                                    \
 598            "    mulu    %/d0,%/d1\n"                                    \
 599            "    move%.l %/d4,%/d0\n"                                    \
 600            "    eor%.w  %/d0,%/d0\n"                                    \
 601            "    swap    %/d0\n"                                         \
 602            "    add%.l  %/d0,%/d2\n"                                    \
 603            "    add%.l  %/d3,%/d2\n"                                    \
 604            "    jcc     1f\n"                                           \
 605            "    add%.l  %#65536,%/d1\n"                                 \
 606            "1:  swap    %/d2\n"                                         \
 607            "    moveq   %#0,%/d0\n"                                     \
 608            "    move%.w %/d2,%/d0\n"                                    \
 609            "    move%.w %/d4,%/d2\n"                                    \
 610            "    move%.l %/d2,%1\n"                                      \
 611            "    add%.l  %/d1,%/d0\n"                                    \
 612            "    move%.l %/d0,%0"                                        \
 613            : "=g" ((USItype) (xh)),                                     \
 614              "=g" ((USItype) (xl))                                      \
 615            : "g" ((USItype) (a)),                                       \
 616              "g" ((USItype) (b))                                        \
 617            : "d0", "d1", "d2", "d3", "d4")
 618 #define UMUL_TIME 100
 619 #define UDIV_TIME 400
 620 #endif /* not mcf5200 */
 621 #endif /* not mc68020 */
 622
 623 /* The '020, '030, '040 and '060 have bitfield insns. */
 624 #if defined (__mc68020__) || defined(mc68020) \
 625         || defined(__mc68030__) || defined(mc68030) \
 626         || defined(__mc68040__) || defined(mc68040) \
 627         || defined(__mc68060__) || defined(mc68060) \
 628         || defined(__NeXT__)
 629 #define count_leading_zeros(count, x) \
 630   __asm__ ("bfffo %1{%b2:%b2},%0"                                       \
 631            : "=d" ((USItype) (count))                                   \
 632            : "od" ((USItype) (x)), "n" (0))
 633 #endif
 634 #endif /* mc68000 */
 635
 636 #if defined (__m88000__) && W_TYPE_SIZE == 32
 637 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 638   __asm__ ("addu.co %1,%r4,%r5\n\taddu.ci %0,%r2,%r3"                   \
 639            : "=r" ((USItype) (sh)),                                     \
 640              "=&r" ((USItype) (sl))                                     \
 641            : "%rJ" ((USItype) (ah)),                                    \
 642              "rJ" ((USItype) (bh)),                                     \
 643              "%rJ" ((USItype) (al)),                                    \
 644              "rJ" ((USItype) (bl)))
 645 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 646   __asm__ ("subu.co %1,%r4,%r5\n\tsubu.ci %0,%r2,%r3"                   \
 647            : "=r" ((USItype) (sh)),                                     \
 648              "=&r" ((USItype) (sl))                                     \
 649            : "rJ" ((USItype) (ah)),                                     \
 650              "rJ" ((USItype) (bh)),                                     \
 651              "rJ" ((USItype) (al)),                                     \
 652              "rJ" ((USItype) (bl)))
 653 #define count_leading_zeros(count, x) \
 654   do {                                                                  \
 655     USItype __cbtmp;                                                    \
 656     __asm__ ("ff1 %0,%1"                                                \
 657              : "=r" (__cbtmp)                                           \
 658              : "r" ((USItype) (x)));                                    \
 659     (count) = __cbtmp ^ 31;                                             \
 660   } while (0)
 661 #define COUNT_LEADING_ZEROS_0 63 /* sic */
 662 #if defined (__mc88110__)
 663 #define umul_ppmm(wh, wl, u, v) \
 664   do {                                                                  \
 665     union {UDItype __ll;                                                \
 666            struct {USItype __h, __l;} __i;                              \
 667           } __xx;                                                       \
 668     __asm__ ("mulu.d    %0,%1,%2"                                       \
 669              : "=r" (__xx.__ll)                                         \
 670              : "r" ((USItype) (u)),                                     \
 671                "r" ((USItype) (v)));                                    \
 672     (wh) = __xx.__i.__h;                                                \
 673     (wl) = __xx.__i.__l;                                                \
 674   } while (0)
 675 #define udiv_qrnnd(q, r, n1, n0, d) \
 676   ({union {UDItype __ll;                                                \
 677            struct {USItype __h, __l;} __i;                              \
 678           } __xx;                                                       \
 679   USItype __q;                                                          \
 680   __xx.__i.__h = (n1); __xx.__i.__l = (n0);                             \
 681   __asm__ ("divu.d %0,%1,%2"                                            \
 682            : "=r" (__q)                                                 \
 683            : "r" (__xx.__ll),                                           \
 684              "r" ((USItype) (d)));                                      \
 685   (r) = (n0) - __q * (d); (q) = __q; })
 686 #define UMUL_TIME 5
 687 #define UDIV_TIME 25
 688 #else
 689 #define UMUL_TIME 17
 690 #define UDIV_TIME 150
 691 #endif /* __mc88110__ */
 692 #endif /* __m88000__ */
 693
 694 #if defined (__mips__) && W_TYPE_SIZE == 32
 695 #define umul_ppmm(w1, w0, u, v) \
 696   __asm__ ("multu %2,%3"                                                \
 697            : "=l" ((USItype) (w0)),                                     \
 698              "=h" ((USItype) (w1))                                      \
 699            : "d" ((USItype) (u)),                                       \
 700              "d" ((USItype) (v)))
 701 #define UMUL_TIME 10
 702 #define UDIV_TIME 100
 703 #endif /* __mips__ */
 704
 705 #if defined (__ns32000__) && W_TYPE_SIZE == 32
 706 #define umul_ppmm(w1, w0, u, v) \
 707   ({union {UDItype __ll;                                                \
 708            struct {USItype __l, __h;} __i;                              \
 709           } __xx;                                                       \
 710   __asm__ ("meid %2,%0"                                                 \
 711            : "=g" (__xx.__ll)                                           \
 712            : "%0" ((USItype) (u)),                                      \
 713              "g" ((USItype) (v)));                                      \
 714   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
 715 #define __umulsidi3(u, v) \
 716   ({UDItype __w;                                                        \
 717     __asm__ ("meid %2,%0"                                               \
 718              : "=g" (__w)                                               \
 719              : "%0" ((USItype) (u)),                                    \
 720                "g" ((USItype) (v)));                                    \
 721     __w; })
 722 #define udiv_qrnnd(q, r, n1, n0, d) \
 723   ({union {UDItype __ll;                                                \
 724            struct {USItype __l, __h;} __i;                              \
 725           } __xx;                                                       \
 726   __xx.__i.__h = (n1); __xx.__i.__l = (n0);                             \
 727   __asm__ ("deid %2,%0"                                                 \
 728            : "=g" (__xx.__ll)                                           \
 729            : "0" (__xx.__ll),                                           \
 730              "g" ((USItype) (d)));                                      \
 731   (r) = __xx.__i.__l; (q) = __xx.__i.__h; })
 732 #define count_trailing_zeros(count,x) \
 733   do {
 734     __asm__ ("ffsd     %2,%0"                                          \
 735             : "=r" ((USItype) (count))                                 \
 736             : "0" ((USItype) 0),                                       \
 737               "r" ((USItype) (x)));                                    \
 738   } while (0)
 739 #endif /* __ns32000__ */
 740
 741 #if (defined (_ARCH_PPC) || defined (_IBMR2))
 742 #if W_TYPE_SIZE == 32
 743 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 744   do {                                                                  \
 745     if (__builtin_constant_p (bh) && (bh) == 0)                         \
 746       __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{aze|addze} %0,%2"           \
 747              : "=r" ((USItype) (sh)),                                   \
 748                "=&r" ((USItype) (sl))                                   \
 749              : "%r" ((USItype) (ah)),                                   \
 750                "%r" ((USItype) (al)),                                   \
 751                "rI" ((USItype) (bl)));                                  \
 752     else if (__builtin_constant_p (bh) && (bh) ==~(USItype) 0)          \
 753       __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{ame|addme} %0,%2"           \
 754              : "=r" ((USItype) (sh)),                                   \
 755                "=&r" ((USItype) (sl))                                   \
 756              : "%r" ((USItype) (ah)),                                   \
 757                "%r" ((USItype) (al)),                                   \
 758                "rI" ((USItype) (bl)));                                  \
 759     else                                                                \
 760       __asm__ ("{a%I5|add%I5c} %1,%4,%5\n\t{ae|adde} %0,%2,%3"          \
 761              : "=r" ((USItype) (sh)),                                   \
 762                "=&r" ((USItype) (sl))                                   \
 763              : "%r" ((USItype) (ah)),                                   \
 764                "r" ((USItype) (bh)),                                    \
 765                "%r" ((USItype) (al)),                                   \
 766                "rI" ((USItype) (bl)));                                  \
 767   } while (0)
 768 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 769   do {                                                                  \
 770     if (__builtin_constant_p (ah) && (ah) == 0)                         \
 771       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfze|subfze} %0,%2"       \
 772                : "=r" ((USItype) (sh)),                                 \
 773                  "=&r" ((USItype) (sl))                                 \
 774                : "r" ((USItype) (bh)),                                  \
 775                  "rI" ((USItype) (al)),                                 \
 776                  "r" ((USItype) (bl)));                                 \
 777     else if (__builtin_constant_p (ah) && (ah) ==~(USItype) 0)          \
 778       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfme|subfme} %0,%2"       \
 779                : "=r" ((USItype) (sh)),                                 \
 780                  "=&r" ((USItype) (sl))                                 \
 781                : "r" ((USItype) (bh)),                                  \
 782                  "rI" ((USItype) (al)),                                 \
 783                  "r" ((USItype) (bl)));                                 \
 784     else if (__builtin_constant_p (bh) && (bh) == 0)                    \
 785       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{ame|addme} %0,%2"         \
 786                : "=r" ((USItype) (sh)),                                 \
 787                  "=&r" ((USItype) (sl))                                 \
 788                : "r" ((USItype) (ah)),                                  \
 789                  "rI" ((USItype) (al)),                                 \
 790                  "r" ((USItype) (bl)));                                 \
 791     else if (__builtin_constant_p (bh) && (bh) ==~(USItype) 0)          \
 792       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{aze|addze} %0,%2"         \
 793                : "=r" ((USItype) (sh)),                                 \
 794                  "=&r" ((USItype) (sl))                                 \
 795                : "r" ((USItype) (ah)),                                  \
 796                  "rI" ((USItype) (al)),                                 \
 797                  "r" ((USItype) (bl)));                                 \
 798     else                                                                \
 799       __asm__ ("{sf%I4|subf%I4c} %1,%5,%4\n\t{sfe|subfe} %0,%3,%2"      \
 800                : "=r" ((USItype) (sh)),                                 \
 801                  "=&r" ((USItype) (sl))                                 \
 802                : "r" ((USItype) (ah)),                                  \
 803                  "r" ((USItype) (bh)),                                  \
 804                  "rI" ((USItype) (al)),                                 \
 805                  "r" ((USItype) (bl)));                                 \
 806   } while (0)
 807 #endif /* W_TYPE_SIZE */
 808 #define count_leading_zeros(count, x) \
 809   __asm__ ("{cntlz|cntlzw} %0,%1"                                       \
 810            : "=r" ((USItype) (count))                                   \
 811            : "r" ((USItype) (x)))
 812 #define COUNT_LEADING_ZEROS_0 32
 813 #if defined (_ARCH_PPC)
 814 #define umul_ppmm(ph, pl, m0, m1) \
 815   do {                                                                  \
 816     USItype __m0 = (m0), __m1 = (m1);                                   \
 817     __asm__ ("mulhwu %0,%1,%2"                                          \
 818              : "=r" ((USItype) ph)                                      \
 819              : "%r" (__m0),                                             \
 820                "r" (__m1));                                             \
 821     (pl) = __m0 * __m1;                                                 \
 822   } while (0)
 823 #define UMUL_TIME 15
 824 #define smul_ppmm(ph, pl, m0, m1) \
 825   do {                                                                  \
 826     SItype __m0 = (m0), __m1 = (m1);                                    \
 827     __asm__ ("mulhw %0,%1,%2"                                           \
 828              : "=r" ((SItype) ph)                                       \
 829              : "%r" (__m0),                                             \
 830                "r" (__m1));                                             \
 831     (pl) = __m0 * __m1;                                                 \
 832   } while (0)
 833 #define SMUL_TIME 14
 834 #define UDIV_TIME 120
 835 #elif defined (_ARCH_POWER)
 836 #define umul_ppmm(xh, xl, m0, m1) \
 837   do {                                                                  \
 838     USItype __m0 = (m0), __m1 = (m1);                                   \
 839     __asm__ ("mul %0,%2,%3"                                             \
 840              : "=r" ((USItype) (xh)),                                   \
 841                "=q" ((USItype) (xl))                                    \
 842              : "r" (__m0),                                              \
 843                "r" (__m1));                                             \
 844     (xh) += ((((SItype) __m0 >> 31) & __m1)                             \
 845              + (((SItype) __m1 >> 31) & __m0));                         \
 846   } while (0)
 847 #define UMUL_TIME 8
 848 #define smul_ppmm(xh, xl, m0, m1) \
 849   __asm__ ("mul %0,%2,%3"                                               \
 850            : "=r" ((SItype) (xh)),                                      \
 851              "=q" ((SItype) (xl))                                       \
 852            : "r" (m0),                                                  \
 853              "r" (m1))
 854 #define SMUL_TIME 4
 855 #define sdiv_qrnnd(q, r, nh, nl, d) \
 856   __asm__ ("div %0,%2,%4"                                               \
 857            : "=r" ((SItype) (q)), "=q" ((SItype) (r))                   \
 858            : "r" ((SItype) (nh)), "1" ((SItype) (nl)), "r" ((SItype) (d)))
 859 #define UDIV_TIME 100
 860 #endif
 861 #endif /* Power architecture variants.  */
 862
 863 #if defined (__pyr__) && W_TYPE_SIZE == 32
 864 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 865   __asm__ ("addw        %5,%1\n\taddwc  %3,%0"                          \
 866            : "=r" ((USItype) (sh)),                                     \
 867              "=&r" ((USItype) (sl))                                     \
 868            : "%0" ((USItype) (ah)),                                     \
 869              "g" ((USItype) (bh)),                                      \
 870              "%1" ((USItype) (al)),                                     \
 871              "g" ((USItype) (bl)))
 872 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 873   __asm__ ("subw        %5,%1\n\tsubwb  %3,%0"                          \
 874            : "=r" ((USItype) (sh)),                                     \
 875              "=&r" ((USItype) (sl))                                     \
 876            : "0" ((USItype) (ah)),                                      \
 877              "g" ((USItype) (bh)),                                      \
 878              "1" ((USItype) (al)),                                      \
 879              "g" ((USItype) (bl)))
 880 /* This insn works on Pyramids with AP, XP, or MI CPUs, but not with SP.  */
 881 #define umul_ppmm(w1, w0, u, v) \
 882   ({union {UDItype __ll;                                                \
 883            struct {USItype __h, __l;} __i;                              \
 884           } __xx;                                                       \
 885   __asm__ ("movw %1,%R0
 886         uemul %2,%0"                                                    \
 887            : "=&r" (__xx.__ll)                                          \
 888            : "g" ((USItype) (u)),                                       \
 889              "g" ((USItype) (v)));                                      \
 890   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
 891 #endif /* __pyr__ */
 892
 893 #if defined (__ibm032__) /* RT/ROMP */ && W_TYPE_SIZE == 32
 894 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 895   __asm__ ("a %1,%5\n\tae %0,%3"                                        \
 896            : "=r" ((USItype) (sh)),                                     \
 897              "=&r" ((USItype) (sl))                                     \
 898            : "%0" ((USItype) (ah)),                                     \
 899              "r" ((USItype) (bh)),                                      \
 900              "%1" ((USItype) (al)),                                     \
 901              "r" ((USItype) (bl)))
 902 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 903   __asm__ ("s %1,%5\n\tse %0,%3"                                        \
 904            : "=r" ((USItype) (sh)),                                     \
 905              "=&r" ((USItype) (sl))                                     \
 906            : "0" ((USItype) (ah)),                                      \
 907              "r" ((USItype) (bh)),                                      \
 908              "1" ((USItype) (al)),                                      \
 909              "r" ((USItype) (bl)))
 910 #define umul_ppmm(ph, pl, m0, m1) \
 911   do {                                                                  \
 912     USItype __m0 = (m0), __m1 = (m1);                                   \
 913     __asm__ (                                                           \
 914        "s       r2,r2\n"                                                \
 915 "       mts     r10,%2\n"                                               \
 916 "       m       r2,%3\n"                                                \
 917 "       m       r2,%3\n"                                                \
 918 "       m       r2,%3\n"                                                \
 919 "       m       r2,%3\n"                                                \
 920 "       m       r2,%3\n"                                                \
 921 "       m       r2,%3\n"                                                \
 922 "       m       r2,%3\n"                                                \
 923 "       m       r2,%3\n"                                                \
 924 "       m       r2,%3\n"                                                \
 925 "       m       r2,%3\n"                                                \
 926 "       m       r2,%3\n"                                                \
 927 "       m       r2,%3\n"                                                \
 928 "       m       r2,%3\n"                                                \
 929 "       m       r2,%3\n"                                                \
 930 "       m       r2,%3\n"                                                \
 931 "       m       r2,%3\n"                                                \
 932 "       cas     %0,r2,r0\n"                                             \
 933 "       mfs     r10,%1"                                                 \
 934              : "=r" ((USItype) (ph)),                                   \
 935                "=r" ((USItype) (pl))                                    \
 936              : "%r" (__m0),                                             \
 937                 "r" (__m1)                                              \
 938              : "r2");                                                   \
 939     (ph) += ((((SItype) __m0 >> 31) & __m1)                             \
 940              + (((SItype) __m1 >> 31) & __m0));                         \
 941   } while (0)
 942 #define UMUL_TIME 20
 943 #define UDIV_TIME 200
 944 #define count_leading_zeros(count, x) \
 945   do {                                                                  \
 946     if ((x) >= 0x10000)                                                 \
 947       __asm__ ("clz     %0,%1"                                          \
 948                : "=r" ((USItype) (count))                               \
 949                : "r" ((USItype) (x) >> 16));                            \
 950     else                                                                \
 951       {                                                                 \
 952         __asm__ ("clz   %0,%1"                                          \
 953                  : "=r" ((USItype) (count))                             \
 954                  : "r" ((USItype) (x)));                                        \
 955         (count) += 16;                                                  \
 956       }                                                                 \
 957   } while (0)
 958 #endif
 959
 960 #if defined (__sh2__) && W_TYPE_SIZE == 32
 961 #define umul_ppmm(w1, w0, u, v) \
 962   __asm__ (                                                             \
 963        "dmulu.l %2,%3\n\tsts    macl,%1\n\tsts  mach,%0"                \
 964            : "=r" ((USItype)(w1)),                                      \
 965              "=r" ((USItype)(w0))                                       \
 966            : "r" ((USItype)(u)),                                        \
 967              "r" ((USItype)(v))                                         \
 968            : "macl", "mach")
 969 #define UMUL_TIME 5
 970 #endif
 971
 972 #if defined (__sparc__) && !defined (__arch64__) && !defined (__sparcv9) \
 973     && W_TYPE_SIZE == 32
 974 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 975   __asm__ ("addcc %r4,%5,%1\n\taddx %r2,%3,%0"                          \
 976            : "=r" ((USItype) (sh)),                                     \
 977              "=&r" ((USItype) (sl))                                     \
 978            : "%rJ" ((USItype) (ah)),                                    \
 979              "rI" ((USItype) (bh)),                                     \
 980              "%rJ" ((USItype) (al)),                                    \
 981              "rI" ((USItype) (bl))                                      \
 982            __CLOBBER_CC)
 983 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 984   __asm__ ("subcc %r4,%5,%1\n\tsubx %r2,%3,%0"                          \
 985            : "=r" ((USItype) (sh)),                                     \
 986              "=&r" ((USItype) (sl))                                     \
 987            : "rJ" ((USItype) (ah)),                                     \
 988              "rI" ((USItype) (bh)),                                     \
 989              "rJ" ((USItype) (al)),                                     \
 990              "rI" ((USItype) (bl))                                      \
 991            __CLOBBER_CC)
 992 #if defined (__sparc_v8__)
 993 #define umul_ppmm(w1, w0, u, v) \
 994   __asm__ ("umul %2,%3,%1;rd %%y,%0"                                    \
 995            : "=r" ((USItype) (w1)),                                     \
 996              "=r" ((USItype) (w0))                                      \
 997            : "r" ((USItype) (u)),                                       \
 998              "r" ((USItype) (v)))
 999 #define udiv_qrnnd(__q, __r, __n1, __n0, __d) \
1000   __asm__ ("mov %2,%%y;nop;nop;nop;udiv %3,%4,%0;umul %0,%4,%1;sub %3,%1,%1"\
1001            : "=&r" ((USItype) (__q)),                                   \
1002              "=&r" ((USItype) (__r))                                    \
1003            : "r" ((USItype) (__n1)),                                    \
1004              "r" ((USItype) (__n0)),                                    \
1005              "r" ((USItype) (__d)))
1006 #else
1007 #if defined (__sparclite__)
1008 /* This has hardware multiply but not divide.  It also has two additional
1009    instructions scan (ffs from high bit) and divscc.  */
1010 #define umul_ppmm(w1, w0, u, v) \
1011   __asm__ ("umul %2,%3,%1;rd %%y,%0"                                    \
1012            : "=r" ((USItype) (w1)),                                     \
1013              "=r" ((USItype) (w0))                                      \
1014            : "r" ((USItype) (u)),                                       \
1015              "r" ((USItype) (v)))
1016 #define udiv_qrnnd(q, r, n1, n0, d) \
1017   __asm__ ("! Inlined udiv_qrnnd\n"                                     \
1018 "       wr      %%g0,%2,%%y     ! Not a delayed write for sparclite\n"  \
1019 "       tst     %%g0\n"                                                 \
1020 "       divscc  %3,%4,%%g1\n"                                           \
1021 "       divscc  %%g1,%4,%%g1\n"                                         \
1022 "       divscc  %%g1,%4,%%g1\n"                                         \
1023 "       divscc  %%g1,%4,%%g1\n"                                         \
1024 "       divscc  %%g1,%4,%%g1\n"                                         \
1025 "       divscc  %%g1,%4,%%g1\n"                                         \
1026 "       divscc  %%g1,%4,%%g1\n"                                         \
1027 "       divscc  %%g1,%4,%%g1\n"                                         \
1028 "       divscc  %%g1,%4,%%g1\n"                                         \
1029 "       divscc  %%g1,%4,%%g1\n"                                         \
1030 "       divscc  %%g1,%4,%%g1\n"                                         \
1031 "       divscc  %%g1,%4,%%g1\n"                                         \
1032 "       divscc  %%g1,%4,%%g1\n"                                         \
1033 "       divscc  %%g1,%4,%%g1\n"                                         \
1034 "       divscc  %%g1,%4,%%g1\n"                                         \
1035 "       divscc  %%g1,%4,%%g1\n"                                         \
1036 "       divscc  %%g1,%4,%%g1\n"                                         \
1037 "       divscc  %%g1,%4,%%g1\n"                                         \
1038 "       divscc  %%g1,%4,%%g1\n"                                         \
1039 "       divscc  %%g1,%4,%%g1\n"                                         \
1040 "       divscc  %%g1,%4,%%g1\n"                                         \
1041 "       divscc  %%g1,%4,%%g1\n"                                         \
1042 "       divscc  %%g1,%4,%%g1\n"                                         \
1043 "       divscc  %%g1,%4,%%g1\n"                                         \
1044 "       divscc  %%g1,%4,%%g1\n"                                         \
1045 "       divscc  %%g1,%4,%%g1\n"                                         \
1046 "       divscc  %%g1,%4,%%g1\n"                                         \
1047 "       divscc  %%g1,%4,%%g1\n"                                         \
1048 "       divscc  %%g1,%4,%%g1\n"                                         \
1049 "       divscc  %%g1,%4,%%g1\n"                                         \
1050 "       divscc  %%g1,%4,%%g1\n"                                         \
1051 "       divscc  %%g1,%4,%0\n"                                           \
1052 "       rd      %%y,%1\n"                                               \
1053 "       bl,a 1f\n"                                                      \
1054 "       add     %1,%4,%1\n"                                             \
1055 "1:     ! End of inline udiv_qrnnd"                                     \
1056            : "=r" ((USItype) (q)),                                      \
1057              "=r" ((USItype) (r))                                       \
1058            : "r" ((USItype) (n1)),                                      \
1059              "r" ((USItype) (n0)),                                      \
1060              "rI" ((USItype) (d))                                       \
1061            : "g1" __AND_CLOBBER_CC)
1062 #define UDIV_TIME 37
1063 #define count_leading_zeros(count, x) \
1064   do {                                                                  \
1065   __asm__ ("scan %1,1,%0"                                               \
1066            : "=r" ((USItype) (count))                                   \
1067            : "r" ((USItype) (x)));                                      \
1068   } while (0)
1069 /* Early sparclites return 63 for an argument of 0, but they warn that future
1070    implementations might change this.  Therefore, leave COUNT_LEADING_ZEROS_0
1071    undefined.  */
1072 #else
1073 /* SPARC without integer multiplication and divide instructions.
1074    (i.e. at least Sun4/20,40,60,65,75,110,260,280,330,360,380,470,490) */
1075 #define umul_ppmm(w1, w0, u, v) \
1076   __asm__ ("! Inlined umul_ppmm\n"                                      \
1077 "       wr      %%g0,%2,%%y     ! SPARC has 0-3 delay insn after a wr\n"\
1078 "       sra     %3,31,%%o5      ! Don't move this insn\n"               \
1079 "       and     %2,%%o5,%%o5    ! Don't move this insn\n"               \
1080 "       andcc   %%g0,0,%%g1     ! Don't move this insn\n"               \
1081 "       mulscc  %%g1,%3,%%g1\n"                                         \
1082 "       mulscc  %%g1,%3,%%g1\n"                                         \
1083 "       mulscc  %%g1,%3,%%g1\n"                                         \
1084 "       mulscc  %%g1,%3,%%g1\n"                                         \
1085 "       mulscc  %%g1,%3,%%g1\n"                                         \
1086 "       mulscc  %%g1,%3,%%g1\n"                                         \
1087 "       mulscc  %%g1,%3,%%g1\n"                                         \
1088 "       mulscc  %%g1,%3,%%g1\n"                                         \
1089 "       mulscc  %%g1,%3,%%g1\n"                                         \
1090 "       mulscc  %%g1,%3,%%g1\n"                                         \
1091 "       mulscc  %%g1,%3,%%g1\n"                                         \
1092 "       mulscc  %%g1,%3,%%g1\n"                                         \
1093 "       mulscc  %%g1,%3,%%g1\n"                                         \
1094 "       mulscc  %%g1,%3,%%g1\n"                                         \
1095 "       mulscc  %%g1,%3,%%g1\n"                                         \
1096 "       mulscc  %%g1,%3,%%g1\n"                                         \
1097 "       mulscc  %%g1,%3,%%g1\n"                                         \
1098 "       mulscc  %%g1,%3,%%g1\n"                                         \
1099 "       mulscc  %%g1,%3,%%g1\n"                                         \
1100 "       mulscc  %%g1,%3,%%g1\n"                                         \
1101 "       mulscc  %%g1,%3,%%g1\n"                                         \
1102 "       mulscc  %%g1,%3,%%g1\n"                                         \
1103 "       mulscc  %%g1,%3,%%g1\n"                                         \
1104 "       mulscc  %%g1,%3,%%g1\n"                                         \
1105 "       mulscc  %%g1,%3,%%g1\n"                                         \
1106 "       mulscc  %%g1,%3,%%g1\n"                                         \
1107 "       mulscc  %%g1,%3,%%g1\n"                                         \
1108 "       mulscc  %%g1,%3,%%g1\n"                                         \
1109 "       mulscc  %%g1,%3,%%g1\n"                                         \
1110 "       mulscc  %%g1,%3,%%g1\n"                                         \
1111 "       mulscc  %%g1,%3,%%g1\n"                                         \
1112 "       mulscc  %%g1,%3,%%g1\n"                                         \
1113 "       mulscc  %%g1,0,%%g1\n"                                          \
1114 "       add     %%g1,%%o5,%0\n"                                         \
1115 "       rd      %%y,%1"                                                 \
1116            : "=r" ((USItype) (w1)),                                     \
1117              "=r" ((USItype) (w0))                                      \
1118            : "%rI" ((USItype) (u)),                                     \
1119              "r" ((USItype) (v))                                                \
1120            : "g1", "o5" __AND_CLOBBER_CC)
1121 #define UMUL_TIME 39            /* 39 instructions */
1122 /* It's quite necessary to add this much assembler for the sparc.
1123    The default udiv_qrnnd (in C) is more than 10 times slower!  */
1124 #define udiv_qrnnd(__q, __r, __n1, __n0, __d) \
1125   __asm__ ("! Inlined udiv_qrnnd\n"                                     \
1126 "       mov     32,%%g1\n"                                              \
1127 "       subcc   %1,%2,%%g0\n"                                           \
1128 "1:     bcs     5f\n"                                                   \
1129 "        addxcc %0,%0,%0        ! shift n1n0 and a q-bit in lsb\n"      \
1130 "       sub     %1,%2,%1        ! this kills msb of n\n"                \
1131 "       addx    %1,%1,%1        ! so this can't give carry\n"           \
1132 "       subcc   %%g1,1,%%g1\n"                                          \
1133 "2:     bne     1b\n"                                                   \
1134 "        subcc  %1,%2,%%g0\n"                                           \
1135 "       bcs     3f\n"                                                   \
1136 "        addxcc %0,%0,%0        ! shift n1n0 and a q-bit in lsb\n"      \
1137 "       b       3f\n"                                                   \
1138 "        sub    %1,%2,%1        ! this kills msb of n\n"                \
1139 "4:     sub     %1,%2,%1\n"                                             \
1140 "5:     addxcc  %1,%1,%1\n"                                             \
1141 "       bcc     2b\n"                                                   \
1142 "        subcc  %%g1,1,%%g1\n"                                          \
1143 "! Got carry from n.  Subtract next step to cancel this carry.\n"       \
1144 "       bne     4b\n"                                                   \
1145 "        addcc  %0,%0,%0        ! shift n1n0 and a 0-bit in lsb\n"      \
1146 "       sub     %1,%2,%1\n"                                             \
1147 "3:     xnor    %0,0,%0\n"                                              \
1148 "       ! End of inline udiv_qrnnd"                                     \
1149            : "=&r" ((USItype) (__q)),                                   \
1150              "=&r" ((USItype) (__r))                                    \
1151            : "r" ((USItype) (__d)),                                     \
1152              "1" ((USItype) (__n1)),                                    \
1153              "0" ((USItype) (__n0)) : "g1" __AND_CLOBBER_CC)
1154 #define UDIV_TIME (3+7*32)      /* 7 instructions/iteration. 32 iterations. */
1155 #endif /* __sparclite__ */
1156 #endif /* __sparc_v8__ */
1157 #endif /* sparc32 */
1158
1159 #if ((defined (__sparc__) && defined (__arch64__)) || defined (__sparcv9)) \
1160     && W_TYPE_SIZE == 64
1161 #define add_ssaaaa(sh, sl, ah, al, bh, bl)                              \
1162   __asm__ ("addcc %r4,%5,%1\n\t"                                        \
1163            "add %r2,%3,%0\n\t"                                          \
1164            "bcs,a,pn %%xcc, 1f\n\t"                                     \
1165            "add %0, 1, %0\n"                                            \
1166            "1:"                                                         \
1167            : "=r" ((UDItype)(sh)),                                      \
1168              "=&r" ((UDItype)(sl))                                      \
1169            : "%rJ" ((UDItype)(ah)),                                     \
1170              "rI" ((UDItype)(bh)),                                      \
1171              "%rJ" ((UDItype)(al)),                                     \
1172              "rI" ((UDItype)(bl))                                       \
1173            __CLOBBER_CC)
1174
1175 #define sub_ddmmss(sh, sl, ah, al, bh, bl)                              \
1176   __asm__ ("subcc %r4,%5,%1\n\t"                                        \
1177            "sub %r2,%3,%0\n\t"                                          \
1178            "bcs,a,pn %%xcc, 1f\n\t"                                     \
1179            "sub %0, 1, %0\n\t"                                          \
1180            "1:"                                                         \
1181            : "=r" ((UDItype)(sh)),                                      \
1182              "=&r" ((UDItype)(sl))                                      \
1183            : "rJ" ((UDItype)(ah)),                                      \
1184              "rI" ((UDItype)(bh)),                                      \
1185              "rJ" ((UDItype)(al)),                                      \
1186              "rI" ((UDItype)(bl))                                       \
1187            __CLOBBER_CC)
1188
1189 #define umul_ppmm(wh, wl, u, v)                                         \
1190   do {                                                                  \
1191           UDItype tmp1, tmp2, tmp3, tmp4;                               \
1192           __asm__ __volatile__ (                                        \
1193                    "srl %7,0,%3\n\t"                                    \
1194                    "mulx %3,%6,%1\n\t"                                  \
1195                    "srlx %6,32,%2\n\t"                                  \
1196                    "mulx %2,%3,%4\n\t"                                  \
1197                    "sllx %4,32,%5\n\t"                                  \
1198                    "srl %6,0,%3\n\t"                                    \
1199                    "sub %1,%5,%5\n\t"                                   \
1200                    "srlx %5,32,%5\n\t"                                  \
1201                    "addcc %4,%5,%4\n\t"                                 \
1202                    "srlx %7,32,%5\n\t"                                  \
1203                    "mulx %3,%5,%3\n\t"                                  \
1204                    "mulx %2,%5,%5\n\t"                                  \
1205                    "sethi %%hi(0x80000000),%2\n\t"                      \
1206                    "addcc %4,%3,%4\n\t"                                 \
1207                    "srlx %4,32,%4\n\t"                                  \
1208                    "add %2,%2,%2\n\t"                                   \
1209                    "movcc %%xcc,%%g0,%2\n\t"                            \
1210                    "addcc %5,%4,%5\n\t"                                 \
1211                    "sllx %3,32,%3\n\t"                                  \
1212                    "add %1,%3,%1\n\t"                                   \
1213                    "add %5,%2,%0"                                       \
1214            : "=r" ((UDItype)(wh)),                                      \
1215              "=&r" ((UDItype)(wl)),                                     \
1216              "=&r" (tmp1), "=&r" (tmp2), "=&r" (tmp3), "=&r" (tmp4)     \
1217            : "r" ((UDItype)(u)),                                        \
1218              "r" ((UDItype)(v))                                         \
1219            __CLOBBER_CC);                                               \
1220   } while (0)
1221 #define UMUL_TIME 96
1222 #define UDIV_TIME 230
1223 #endif /* sparc64 */
1224
1225 #if defined (__vax__) && W_TYPE_SIZE == 32
1226 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1227   __asm__ ("addl2 %5,%1\n\tadwc %3,%0"                                  \
1228            : "=g" ((USItype) (sh)),                                     \
1229              "=&g" ((USItype) (sl))                                     \
1230            : "%0" ((USItype) (ah)),                                     \
1231              "g" ((USItype) (bh)),                                      \
1232              "%1" ((USItype) (al)),                                     \
1233              "g" ((USItype) (bl)))
1234 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1235   __asm__ ("subl2 %5,%1\n\tsbwc %3,%0"                                  \
1236            : "=g" ((USItype) (sh)),                                     \
1237              "=&g" ((USItype) (sl))                                     \
1238            : "0" ((USItype) (ah)),                                      \
1239              "g" ((USItype) (bh)),                                      \
1240              "1" ((USItype) (al)),                                      \
1241              "g" ((USItype) (bl)))
1242 #define umul_ppmm(xh, xl, m0, m1) \
1243   do {                                                                  \
1244     union {                                                             \
1245         UDItype __ll;                                                   \
1246         struct {USItype __l, __h;} __i;                                 \
1247       } __xx;                                                           \
1248     USItype __m0 = (m0), __m1 = (m1);                                   \
1249     __asm__ ("emul %1,%2,$0,%0"                                         \
1250              : "=r" (__xx.__ll)                                         \
1251              : "g" (__m0),                                              \
1252                "g" (__m1));                                             \
1253     (xh) = __xx.__i.__h;                                                \
1254     (xl) = __xx.__i.__l;                                                \
1255     (xh) += ((((SItype) __m0 >> 31) & __m1)                             \
1256              + (((SItype) __m1 >> 31) & __m0));                         \
1257   } while (0)
1258 #define sdiv_qrnnd(q, r, n1, n0, d) \
1259   do {                                                                  \
1260     union {DItype __ll;                                                 \
1261            struct {SItype __l, __h;} __i;                               \
1262           } __xx;                                                       \
1263     __xx.__i.__h = n1; __xx.__i.__l = n0;                               \
1264     __asm__ ("ediv %3,%2,%0,%1"                                         \
1265              : "=g" (q), "=g" (r)                                       \
1266              : "g" (__xx.__ll), "g" (d));                               \
1267   } while (0)
1268 #endif /* __vax__ */
1269
1270 #if defined (__z8000__) && W_TYPE_SIZE == 16
1271 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1272   __asm__ ("add %H1,%H5\n\tadc  %H0,%H3"                                \
1273            : "=r" ((unsigned int)(sh)),                                 \
1274              "=&r" ((unsigned int)(sl))                                 \
1275            : "%0" ((unsigned int)(ah)),                                 \
1276              "r" ((unsigned int)(bh)),                                  \
1277              "%1" ((unsigned int)(al)),                                 \
1278              "rQR" ((unsigned int)(bl)))
1279 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1280   __asm__ ("sub %H1,%H5\n\tsbc  %H0,%H3"                                \
1281            : "=r" ((unsigned int)(sh)),                                 \
1282              "=&r" ((unsigned int)(sl))                                 \
1283            : "0" ((unsigned int)(ah)),                                  \
1284              "r" ((unsigned int)(bh)),                                  \
1285              "1" ((unsigned int)(al)),                                  \
1286              "rQR" ((unsigned int)(bl)))
1287 #define umul_ppmm(xh, xl, m0, m1) \
1288   do {                                                                  \
1289     union {long int __ll;                                               \
1290            struct {unsigned int __h, __l;} __i;                         \
1291           } __xx;                                                       \
1292     unsigned int __m0 = (m0), __m1 = (m1);                              \
1293     __asm__ ("mult      %S0,%H3"                                        \
1294              : "=r" (__xx.__i.__h),                                     \
1295                "=r" (__xx.__i.__l)                                      \
1296              : "%1" (__m0),                                             \
1297                "rQR" (__m1));                                           \
1298     (xh) = __xx.__i.__h; (xl) = __xx.__i.__l;                           \
1299     (xh) += ((((signed int) __m0 >> 15) & __m1)                         \
1300              + (((signed int) __m1 >> 15) & __m0));                     \
1301   } while (0)
1302 #endif /* __z8000__ */
1303
1304 #endif /* __GNUC__ */
1305
1306 /* If this machine has no inline assembler, use C macros.  */
1307
1308 #if !defined (add_ssaaaa)
1309 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1310   do {                                                                  \
1311     UWtype __x;                                                         \
1312     __x = (al) + (bl);                                                  \
1313     (sh) = (ah) + (bh) + (__x < (al));                                  \
1314     (sl) = __x;                                                         \
1315   } while (0)
1316 #endif
1317
1318 #if !defined (sub_ddmmss)
1319 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1320   do {                                                                  \
1321     UWtype __x;                                                         \
1322     __x = (al) - (bl);                                                  \
1323     (sh) = (ah) - (bh) - (__x > (al));                                  \
1324     (sl) = __x;                                                         \
1325   } while (0)
1326 #endif
1327
1328 #if !defined (umul_ppmm)
1329 #define umul_ppmm(w1, w0, u, v)                                         \
1330   do {                                                                  \
1331     UWtype __x0, __x1, __x2, __x3;                                      \
1332     UHWtype __ul, __vl, __uh, __vh;                                     \
1333                                                                         \
1334     __ul = __ll_lowpart (u);                                            \
1335     __uh = __ll_highpart (u);                                           \
1336     __vl = __ll_lowpart (v);                                            \
1337     __vh = __ll_highpart (v);                                           \
1338                                                                         \
1339     __x0 = (UWtype) __ul * __vl;                                        \
1340     __x1 = (UWtype) __ul * __vh;                                        \
1341     __x2 = (UWtype) __uh * __vl;                                        \
1342     __x3 = (UWtype) __uh * __vh;                                        \
1343                                                                         \
1344     __x1 += __ll_highpart (__x0);/* this can't give carry */            \
1345     __x1 += __x2;               /* but this indeed can */               \
1346     if (__x1 < __x2)            /* did we get it? */                    \
1347       __x3 += __ll_B;           /* yes, add it in the proper pos. */    \
1348                                                                         \
1349     (w1) = __x3 + __ll_highpart (__x1);                                 \
1350     (w0) = __ll_lowpart (__x1) * __ll_B + __ll_lowpart (__x0);          \
1351   } while (0)
1352 #endif
1353
1354 #if !defined (__umulsidi3)
1355 #define __umulsidi3(u, v) \
1356   ({DWunion __w;                                                        \
1357     umul_ppmm (__w.s.high, __w.s.low, u, v);                            \
1358     __w.ll; })
1359 #endif
1360
1361 /* Define this unconditionally, so it can be used for debugging.  */
1362 #define __udiv_qrnnd_c(q, r, n1, n0, d) \
1363   do {                                                                  \
1364     UWtype __d1, __d0, __q1, __q0;                                      \
1365     UWtype __r1, __r0, __m;                                             \
1366     __d1 = __ll_highpart (d);                                           \
1367     __d0 = __ll_lowpart (d);                                            \
1368                                                                         \
1369     __r1 = (n1) % __d1;                                                 \
1370     __q1 = (n1) / __d1;                                                 \
1371     __m = (UWtype) __q1 * __d0;                                         \
1372     __r1 = __r1 * __ll_B | __ll_highpart (n0);                          \
1373     if (__r1 < __m)                                                     \
1374       {                                                                 \
1375         __q1--, __r1 += (d);                                            \
1376         if (__r1 >= (d)) /* i.e. we didn't get carry when adding to __r1 */\
1377           if (__r1 < __m)                                               \
1378             __q1--, __r1 += (d);                                        \
1379       }                                                                 \
1380     __r1 -= __m;                                                        \
1381                                                                         \
1382     __r0 = __r1 % __d1;                                                 \
1383     __q0 = __r1 / __d1;                                                 \
1384     __m = (UWtype) __q0 * __d0;                                         \
1385     __r0 = __r0 * __ll_B | __ll_lowpart (n0);                           \
1386     if (__r0 < __m)                                                     \
1387       {                                                                 \
1388         __q0--, __r0 += (d);                                            \
1389         if (__r0 >= (d))                                                \
1390           if (__r0 < __m)                                               \
1391             __q0--, __r0 += (d);                                        \
1392       }                                                                 \
1393     __r0 -= __m;                                                        \
1394                                                                         \
1395     (q) = (UWtype) __q1 * __ll_B | __q0;                                \
1396     (r) = __r0;                                                         \
1397   } while (0)
1398
1399 /* If the processor has no udiv_qrnnd but sdiv_qrnnd, go through
1400    __udiv_w_sdiv (defined in libgcc or elsewhere).  */
1401 #if !defined (udiv_qrnnd) && defined (sdiv_qrnnd)
1402 #define udiv_qrnnd(q, r, nh, nl, d) \
1403   do {                                                                  \
1404     USItype __r;                                                        \
1405     (q) = __udiv_w_sdiv (&__r, nh, nl, d);                              \
1406     (r) = __r;                                                          \
1407   } while (0)
1408 #endif
1409
1410 /* If udiv_qrnnd was not defined for this processor, use __udiv_qrnnd_c.  */
1411 #if !defined (udiv_qrnnd)
1412 #define UDIV_NEEDS_NORMALIZATION 1
1413 #define udiv_qrnnd __udiv_qrnnd_c
1414 #endif
1415
1416 #if !defined (count_leading_zeros)
1417 extern const UQItype __clz_tab[];
1418 #define count_leading_zeros(count, x) \
1419   do {                                                                  \
1420     UWtype __xr = (x);                                                  \
1421     UWtype __a;                                                         \
1422                                                                         \
1423     if (W_TYPE_SIZE <= 32)                                              \
1424       {                                                                 \
1425         __a = __xr < ((UWtype)1<<2*__BITS4)                             \
1426           ? (__xr < ((UWtype)1<<__BITS4) ? 0 : __BITS4)                 \
1427           : (__xr < ((UWtype)1<<3*__BITS4) ?  2*__BITS4 : 3*__BITS4);   \
1428       }                                                                 \
1429     else                                                                \
1430       {                                                                 \
1431         for (__a = W_TYPE_SIZE - 8; __a > 0; __a -= 8)                  \
1432           if (((__xr >> __a) & 0xff) != 0)                              \
1433             break;                                                      \
1434       }                                                                 \
1435                                                                         \
1436     (count) = W_TYPE_SIZE - (__clz_tab[__xr >> __a] + __a);             \
1437   } while (0)
1438 #define COUNT_LEADING_ZEROS_0 W_TYPE_SIZE
1439 #endif
1440
1441 #if !defined (count_trailing_zeros)
1442 /* Define count_trailing_zeros using count_leading_zeros.  The latter might be
1443    defined in asm, but if it is not, the C version above is good enough.  */
1444 #define count_trailing_zeros(count, x) \
1445   do {                                                                  \
1446     UWtype __ctz_x = (x);                                               \
1447     UWtype __ctz_c;                                                     \
1448     count_leading_zeros (__ctz_c, __ctz_x & -__ctz_x);                  \
1449     (count) = W_TYPE_SIZE - 1 - __ctz_c;                                \
1450   } while (0)
1451 #endif
1452
1453 #ifndef UDIV_NEEDS_NORMALIZATION
1454 #define UDIV_NEEDS_NORMALIZATION 0
1455 #endif