1 /* Generate code from to output assembler insns as recognized from rtl.
2 Copyright (C) 1987, 88, 92, 94-95, 97-98, 1999 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* This program reads the machine description for the compiler target machine
23 and produces a file containing these things:
25 1. An array of strings `insn_template' which is indexed by insn code number
26 and contains the template for output of that insn,
28 2. An array of functions `insn_outfun' which, indexed by the insn code
29 number, gives the function that returns a template to use for output of
30 that insn. This is used only in the cases where the template is not
31 constant. These cases are specified by a * or @ at the beginning of the
32 template string in the machine description. They are identified for the
33 sake of other parts of the compiler by a zero element in `insn_template'.
35 3. An array of functions `insn_gen_function' which, indexed
36 by insn code number, gives the function to generate a body
37 for that pattern, given operands as arguments.
39 4. An array of strings `insn_name' which, indexed by insn code number,
40 gives the name for that pattern. Nameless patterns are given a name.
42 5. An array of ints `insn_n_operands' which is indexed by insn code number
43 and contains the number of distinct operands in the pattern for that insn,
45 6. An array of ints `insn_n_dups' which is indexed by insn code number
46 and contains the number of match_dup's that appear in the insn's pattern.
47 This says how many elements of `recog_dup_loc' are significant
48 after an insn has been recognized.
50 7. An array of arrays of operand constraint strings,
51 `insn_operand_constraint',
52 indexed first by insn code number and second by operand number,
53 containing the constraint for that operand.
55 This array is generated only if register constraints appear in
58 8. An array of arrays of chars which indicate which operands of
59 which insn patterns appear within ADDRESS rtx's. This array is
60 called `insn_operand_address_p' and is generated only if there
61 are *no* register constraints in the match_operand rtx's.
63 9. An array of arrays of machine modes, `insn_operand_mode',
64 indexed first by insn code number and second by operand number,
65 containing the machine mode that that operand is supposed to have.
66 Also `insn_operand_strict_low', which is nonzero for operands
67 contained in a STRICT_LOW_PART.
69 10. An array of arrays of int-valued functions, `insn_operand_predicate',
70 indexed first by insn code number and second by operand number,
71 containing the match_operand predicate for this operand.
73 11. An array of ints, `insn_n_alternatives', that gives the number
74 of alternatives in the constraints of each pattern.
76 The code number of an insn is simply its position in the machine description;
77 code numbers are assigned sequentially to entries in the description,
78 starting with code number 0.
80 Thus, the following entry in the machine description
83 [(set (match_operand:DF 0 "general_operand" "")
88 assuming it is the 25th entry present, would cause
89 insn_template[24] to be "clrd %0", and insn_n_operands[24] to be 1.
90 It would not make an case in output_insn_hairy because the template
91 given in the entry is a constant (it does not start with `*'). */
98 /* No instruction can have more operands than this.
99 Sorry for this arbitrary limit, but what machine will
100 have an instruction with this many operands? */
102 #define MAX_MAX_OPERANDS 40
104 static struct obstack obstack;
105 struct obstack *rtl_obstack = &obstack;
107 #define obstack_chunk_alloc xmalloc
108 #define obstack_chunk_free free
110 void fatal PVPROTO ((const char *, ...))
111 ATTRIBUTE_PRINTF_1 ATTRIBUTE_NORETURN;
112 void fancy_abort PROTO((void)) ATTRIBUTE_NORETURN;
113 static void error PVPROTO ((const char *, ...)) ATTRIBUTE_PRINTF_1;
114 static int n_occurrences PROTO((int, char *));
116 /* Define this so we can link with print-rtl.o to get debug_rtx function. */
117 char **insn_name_ptr = 0;
119 /* insns in the machine description are assigned sequential code numbers
120 that are used by insn-recog.c (produced by genrecog) to communicate
121 to insn-output.c (produced by this program). */
123 static int next_code_number;
125 /* This counts all definitions in the md file,
126 for the sake of error messages. */
128 static int next_index_number;
130 /* Record in this chain all information that we will output,
131 associated with the code number of the insn. */
138 char *template; /* string such as "movl %1,%0" */
139 int n_operands; /* Number of operands this insn recognizes */
140 int n_dups; /* Number times match_dup appears in pattern */
141 int n_alternatives; /* Number of alternatives in each constraint */
143 char *constraints[MAX_MAX_OPERANDS];
144 /* Number of alternatives in constraints of operand N. */
145 int op_n_alternatives[MAX_MAX_OPERANDS];
146 char *predicates[MAX_MAX_OPERANDS];
147 char address_p[MAX_MAX_OPERANDS];
148 enum machine_mode modes[MAX_MAX_OPERANDS];
149 char strict_low[MAX_MAX_OPERANDS];
150 char outfun; /* Nonzero means this has an output function */
153 /* This variable points to the first link in the chain. */
155 struct data *insn_data;
157 /* Pointer to the last link in the chain, so new elements
158 can be added at the end. */
160 struct data *end_of_insn_data;
162 /* Nonzero if any match_operand has a constraint string;
163 implies that REGISTER_CONSTRAINTS will be defined
164 for this machine description. */
166 int have_constraints;
168 /* Nonzero if some error has occurred. We will make all errors fatal, but
169 might as well continue until we see all of them. */
171 static int have_error;
173 static char * name_for_index PROTO((int));
174 static void output_prologue PROTO((void));
175 static void output_epilogue PROTO((void));
176 static void scan_operands PROTO((rtx, int, int));
177 static void process_template PROTO((struct data *, char *));
178 static void validate_insn_alternatives PROTO((struct data *));
179 static void gen_insn PROTO((rtx));
180 static void gen_peephole PROTO((rtx));
181 static void gen_expand PROTO((rtx));
182 static void gen_split PROTO((rtx));
183 static int n_occurrences PROTO((int, char *));
186 name_for_index (index)
189 static char buf[100];
191 struct data *i, *last_named = NULL;
192 for (i = insn_data; i ; i = i->next)
194 if (i->index_number == index)
201 sprintf(buf, "%s+%d", last_named->name, index - last_named->index_number);
203 sprintf(buf, "insn %d", index);
211 printf ("/* Generated automatically by the program `genoutput'\n\
212 from the machine description file `md'. */\n\n");
214 printf ("#include \"config.h\"\n");
215 printf ("#include \"system.h\"\n");
216 printf ("#include \"flags.h\"\n");
217 printf ("#include \"rtl.h\"\n");
218 printf ("#include \"function.h\"\n");
219 printf ("#include \"regs.h\"\n");
220 printf ("#include \"hard-reg-set.h\"\n");
221 printf ("#include \"real.h\"\n");
222 printf ("#include \"insn-config.h\"\n\n");
223 printf ("#include \"conditions.h\"\n");
224 printf ("#include \"insn-flags.h\"\n");
225 printf ("#include \"insn-attr.h\"\n\n");
226 printf ("#include \"insn-codes.h\"\n\n");
227 printf ("#include \"recog.h\"\n\n");
229 printf ("#include \"output.h\"\n");
235 register struct data *d;
237 printf ("\nconst char * const insn_template[] =\n {\n");
238 for (d = insn_data; d; d = d->next)
241 printf (" \"%s\",\n", d->template);
247 printf ("\nconst char *(*const insn_outfun[])() =\n {\n");
248 for (d = insn_data; d; d = d->next)
251 printf (" output_%d,\n", d->code_number);
257 printf ("\nrtx (*const insn_gen_function[]) () =\n {\n");
258 for (d = insn_data; d; d = d->next)
260 if (d->name && d->name[0] != '*')
261 printf (" gen_%s,\n", d->name);
267 printf ("\nconst char *insn_name[] =\n {\n");
271 char * last_name = 0;
272 char * next_name = 0;
273 register struct data *n;
275 for (n = insn_data, next = 1; n; n = n->next, next++)
282 for (d = insn_data; d; d = d->next)
286 printf (" \"%s\",\n", d->name);
290 for (n = d->next, next = 1; n; n = n->next, next++)
300 if (next_name && (last_name == 0 || offset > next / 2))
301 printf (" \"%s-%d\",\n", next_name, next - offset);
303 printf (" \"%s+%d\",\n", last_name, offset);
308 printf ("const char **insn_name_ptr = insn_name;\n");
310 printf ("\nconst int insn_n_operands[] =\n {\n");
311 for (d = insn_data; d; d = d->next)
312 printf (" %d,\n", d->n_operands);
315 printf ("\nconst int insn_n_dups[] =\n {\n");
316 for (d = insn_data; d; d = d->next)
317 printf (" %d,\n", d->n_dups);
320 if (have_constraints)
322 printf ("\nconst char *const insn_operand_constraint[][MAX_RECOG_OPERANDS] =\n {\n");
323 for (d = insn_data; d; d = d->next)
327 for (i = 0; i < d->n_operands; i++)
329 if (d->constraints[i] == 0)
332 printf (" \"%s\",", d->constraints[i]);
334 if (d->n_operands == 0)
342 printf ("\nconst char insn_operand_address_p[][MAX_RECOG_OPERANDS] =\n {\n");
343 for (d = insn_data; d; d = d->next)
347 for (i = 0; i < d->n_operands; i++)
348 printf (" %d,", d->address_p[i]);
349 if (d->n_operands == 0)
356 printf ("\nconst enum machine_mode insn_operand_mode[][MAX_RECOG_OPERANDS] =\n {\n");
357 for (d = insn_data; d; d = d->next)
361 for (i = 0; i < d->n_operands; i++)
362 printf (" %smode,", GET_MODE_NAME (d->modes[i]));
363 if (d->n_operands == 0)
364 printf (" VOIDmode");
369 printf ("\nconst char insn_operand_strict_low[][MAX_RECOG_OPERANDS] =\n {\n");
370 for (d = insn_data; d; d = d->next)
374 for (i = 0; i < d->n_operands; i++)
375 printf (" %d,", d->strict_low[i]);
376 if (d->n_operands == 0)
383 /* We need to define all predicates used. Keep a list of those we
384 have defined so far. There normally aren't very many predicates used,
385 so a linked list should be fast enough. */
386 struct predicate { char *name; struct predicate *next; } *predicates = 0;
391 for (d = insn_data; d; d = d->next)
392 for (i = 0; i < d->n_operands; i++)
393 if (d->predicates[i] && d->predicates[i][0])
395 for (p = predicates; p; p = p->next)
396 if (! strcmp (p->name, d->predicates[i]))
401 printf ("extern int %s ();\n", d->predicates[i]);
402 p = (struct predicate *) alloca (sizeof (struct predicate));
403 p->name = d->predicates[i];
404 p->next = predicates;
409 printf ("\nint (*const insn_operand_predicate[][MAX_RECOG_OPERANDS])() =\n {\n");
410 for (d = insn_data; d; d = d->next)
413 for (i = 0; i < d->n_operands; i++)
414 printf (" %s,", ((d->predicates[i] && d->predicates[i][0])
415 ? d->predicates[i] : "0"));
416 if (d->n_operands == 0)
423 printf ("\nconst int insn_n_alternatives[] =\n {\n");
424 for (d = insn_data; d; d = d->next)
425 printf (" %d,\n", d->n_alternatives);
429 /* scan_operands (X) stores in max_opno the largest operand
430 number present in X, if that is larger than the previous
431 value of max_opno. It stores all the constraints in `constraints'
432 and all the machine modes in `modes'.
434 THIS_ADDRESS_P is nonzero if the containing rtx was an ADDRESS.
435 THIS_STRICT_LOW is nonzero if the containing rtx was a STRICT_LOW_PART. */
439 static char *constraints[MAX_MAX_OPERANDS];
440 static int op_n_alternatives[MAX_MAX_OPERANDS];
441 static const char *predicates[MAX_MAX_OPERANDS];
442 static char address_p[MAX_MAX_OPERANDS];
443 static enum machine_mode modes[MAX_MAX_OPERANDS];
444 static char strict_low[MAX_MAX_OPERANDS];
445 static char seen[MAX_MAX_OPERANDS];
448 scan_operands (part, this_address_p, this_strict_low)
454 register char *format_ptr;
460 switch (GET_CODE (part))
463 opno = XINT (part, 0);
466 if (max_opno >= MAX_MAX_OPERANDS)
468 error ("Too many operands (%d) in definition %s.\n",
469 max_opno + 1, name_for_index (next_index_number));
473 error ("Definition %s specified operand number %d more than once.\n",
474 name_for_index (next_index_number), opno);
476 modes[opno] = GET_MODE (part);
477 strict_low[opno] = this_strict_low;
478 predicates[opno] = XSTR (part, 1);
479 constraints[opno] = XSTR (part, 2);
480 if (XSTR (part, 2) != 0 && *XSTR (part, 2) != 0)
482 op_n_alternatives[opno] = n_occurrences (',', XSTR (part, 2)) + 1;
483 have_constraints = 1;
485 address_p[opno] = this_address_p;
489 opno = XINT (part, 0);
492 if (max_opno >= MAX_MAX_OPERANDS)
494 error ("Too many operands (%d) in definition %s.\n",
495 max_opno + 1, name_for_index (next_index_number));
499 error ("Definition %s specified operand number %d more than once.\n",
500 name_for_index (next_index_number), opno);
502 modes[opno] = GET_MODE (part);
503 strict_low[opno] = 0;
504 predicates[opno] = "scratch_operand";
505 constraints[opno] = XSTR (part, 1);
506 if (XSTR (part, 1) != 0 && *XSTR (part, 1) != 0)
508 op_n_alternatives[opno] = n_occurrences (',', XSTR (part, 1)) + 1;
509 have_constraints = 1;
516 opno = XINT (part, 0);
519 if (max_opno >= MAX_MAX_OPERANDS)
521 error ("Too many operands (%d) in definition %s.\n",
522 max_opno + 1, name_for_index (next_index_number));
526 error ("Definition %s specified operand number %d more than once.\n",
527 name_for_index (next_index_number), opno);
529 modes[opno] = GET_MODE (part);
530 strict_low[opno] = 0;
531 predicates[opno] = XSTR (part, 1);
532 constraints[opno] = 0;
534 for (i = 0; i < XVECLEN (part, 2); i++)
535 scan_operands (XVECEXP (part, 2, i), 0, 0);
545 scan_operands (XEXP (part, 0), 1, 0);
548 case STRICT_LOW_PART:
549 scan_operands (XEXP (part, 0), 0, 1);
556 format_ptr = GET_RTX_FORMAT (GET_CODE (part));
558 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (part)); i++)
559 switch (*format_ptr++)
563 scan_operands (XEXP (part, i), 0, 0);
566 if (XVEC (part, i) != NULL)
567 for (j = 0; j < XVECLEN (part, i); j++)
568 scan_operands (XVECEXP (part, i, j), 0, 0);
573 /* Process an assembler template from a define_insn or a define_peephole.
574 It is either the assembler code template, a list of assembler code
575 templates, or C code to generate the assembler code template. */
578 process_template (d, template)
585 /* We need to consider only the instructions whose assembler code template
586 starts with a * or @. These are the ones where C code is run to decide
587 on a template to use. So for all others just return now. */
589 if (template[0] != '*' && template[0] != '@')
591 d->template = template;
599 printf ("\nstatic const char *\n");
600 printf ("output_%d (operands, insn)\n", d->code_number);
601 printf (" rtx *operands ATTRIBUTE_UNUSED;\n");
602 printf (" rtx insn ATTRIBUTE_UNUSED;\n");
605 /* If the assembler code template starts with a @ it is a newline-separated
606 list of assembler code templates, one for each alternative. So produce
607 a routine to select the correct one. */
609 if (template[0] == '@')
612 printf (" static const char *const strings_%d[] = {\n",
615 for (i = 0, cp = &template[1]; *cp; )
617 while (*cp == '\n' || *cp == ' ' || *cp== '\t')
621 while (*cp != '\n' && *cp != '\0')
632 printf (" return strings_%d[which_alternative];\n", d->code_number);
634 if (i != d->n_alternatives)
635 fatal ("Insn pattern %d has %d alternatives but %d assembler choices",
636 d->index_number, d->n_alternatives, i);
641 /* The following is done in a funny way to get around problems in
642 VAX-11 "C" on VMS. It is the equivalent of:
643 printf ("%s\n", &template[1])); */
656 /* Check insn D for consistency in number of constraint alternatives. */
659 validate_insn_alternatives (d)
662 register int n = 0, start;
663 /* Make sure all the operands have the same number of
664 alternatives in their constraints.
665 Let N be that number. */
666 for (start = 0; start < d->n_operands; start++)
667 if (d->op_n_alternatives[start] > 0)
670 n = d->op_n_alternatives[start];
671 else if (n != d->op_n_alternatives[start])
672 error ("wrong number of alternatives in operand %d of insn %s",
673 start, name_for_index (d->index_number));
675 /* Record the insn's overall number of alternatives. */
676 d->n_alternatives = n;
679 /* Look at a define_insn just read. Assign its code number.
680 Record on insn_data the template and the number of arguments.
681 If the insn has a hairy output action, output a function for now. */
687 register struct data *d = (struct data *) xmalloc (sizeof (struct data));
690 d->code_number = next_code_number++;
691 d->index_number = next_index_number;
692 if (XSTR (insn, 0)[0])
693 d->name = XSTR (insn, 0);
697 /* Build up the list in the same order as the insns are seen
698 in the machine description. */
700 if (end_of_insn_data)
701 end_of_insn_data->next = d;
705 end_of_insn_data = d;
710 memset (constraints, 0, sizeof constraints);
711 memset (op_n_alternatives, 0, sizeof op_n_alternatives);
712 memset (predicates, 0, sizeof predicates);
713 memset (address_p, 0, sizeof address_p);
714 memset (modes, 0, sizeof modes);
715 memset (strict_low, 0, sizeof strict_low);
716 memset (seen, 0, sizeof seen);
718 for (i = 0; i < XVECLEN (insn, 1); i++)
719 scan_operands (XVECEXP (insn, 1, i), 0, 0);
721 d->n_operands = max_opno + 1;
722 d->n_dups = num_dups;
724 memcpy (d->constraints, constraints, sizeof constraints);
725 memcpy (d->op_n_alternatives, op_n_alternatives, sizeof op_n_alternatives);
726 memcpy (d->predicates, predicates, sizeof predicates);
727 memcpy (d->address_p, address_p, sizeof address_p);
728 memcpy (d->modes, modes, sizeof modes);
729 memcpy (d->strict_low, strict_low, sizeof strict_low);
731 validate_insn_alternatives (d);
732 process_template (d, XSTR (insn, 3));
735 /* Look at a define_peephole just read. Assign its code number.
736 Record on insn_data the template and the number of arguments.
737 If the insn has a hairy output action, output it now. */
743 register struct data *d = (struct data *) xmalloc (sizeof (struct data));
746 d->code_number = next_code_number++;
747 d->index_number = next_index_number;
750 /* Build up the list in the same order as the insns are seen
751 in the machine description. */
753 if (end_of_insn_data)
754 end_of_insn_data->next = d;
758 end_of_insn_data = d;
761 memset (constraints, 0, sizeof constraints);
762 memset (op_n_alternatives, 0, sizeof op_n_alternatives);
763 memset (predicates, 0, sizeof predicates);
764 memset (address_p, 0, sizeof address_p);
765 memset (modes, 0, sizeof modes);
766 memset (strict_low, 0, sizeof strict_low);
767 memset (seen, 0, sizeof seen);
769 /* Get the number of operands by scanning all the
770 patterns of the peephole optimizer.
771 But ignore all the rest of the information thus obtained. */
772 for (i = 0; i < XVECLEN (peep, 0); i++)
773 scan_operands (XVECEXP (peep, 0, i), 0, 0);
775 d->n_operands = max_opno + 1;
778 memcpy (d->constraints, constraints, sizeof constraints);
779 memcpy (d->op_n_alternatives, op_n_alternatives, sizeof op_n_alternatives);
780 memset (d->predicates, 0, sizeof predicates);
781 memset (d->address_p, 0, sizeof address_p);
782 memset (d->modes, 0, sizeof modes);
783 memset (d->strict_low, 0, sizeof strict_low);
785 validate_insn_alternatives (d);
786 process_template (d, XSTR (peep, 2));
789 /* Process a define_expand just read. Assign its code number,
790 only for the purposes of `insn_gen_function'. */
796 register struct data *d = (struct data *) xmalloc (sizeof (struct data));
799 d->code_number = next_code_number++;
800 d->index_number = next_index_number;
801 if (XSTR (insn, 0)[0])
802 d->name = XSTR (insn, 0);
806 /* Build up the list in the same order as the insns are seen
807 in the machine description. */
809 if (end_of_insn_data)
810 end_of_insn_data->next = d;
814 end_of_insn_data = d;
819 /* Scan the operands to get the specified predicates and modes,
820 since expand_binop needs to know them. */
822 memset (constraints, 0, sizeof constraints);
823 memset (op_n_alternatives, 0, sizeof op_n_alternatives);
824 memset (predicates, 0, sizeof predicates);
825 memset (address_p, 0, sizeof address_p);
826 memset (modes, 0, sizeof modes);
827 memset (strict_low, 0, sizeof strict_low);
828 memset (seen, 0, sizeof seen);
831 for (i = 0; i < XVECLEN (insn, 1); i++)
832 scan_operands (XVECEXP (insn, 1, i), 0, 0);
834 d->n_operands = max_opno + 1;
835 d->n_dups = num_dups;
837 memcpy (d->constraints, constraints, sizeof constraints);
838 memcpy (d->op_n_alternatives, op_n_alternatives, sizeof op_n_alternatives);
839 memcpy (d->predicates, predicates, sizeof predicates);
840 memcpy (d->address_p, address_p, sizeof address_p);
841 memcpy (d->modes, modes, sizeof modes);
842 memcpy (d->strict_low, strict_low, sizeof strict_low);
846 validate_insn_alternatives (d);
849 /* Process a define_split just read. Assign its code number,
850 only for reasons of consistency and to simplify genrecog. */
857 register struct data *d = (struct data *) xmalloc (sizeof (struct data));
860 d->code_number = next_code_number++;
861 d->index_number = next_index_number;
864 /* Build up the list in the same order as the insns are seen
865 in the machine description. */
867 if (end_of_insn_data)
868 end_of_insn_data->next = d;
872 end_of_insn_data = d;
877 memset (constraints, 0, sizeof constraints);
878 memset (op_n_alternatives, 0, sizeof op_n_alternatives);
879 memset (predicates, 0, sizeof predicates);
880 memset (address_p, 0, sizeof address_p);
881 memset (modes, 0, sizeof modes);
882 memset (strict_low, 0, sizeof strict_low);
883 memset (seen, 0, sizeof seen);
885 /* Get the number of operands by scanning all the
886 patterns of the split patterns.
887 But ignore all the rest of the information thus obtained. */
888 for (i = 0; i < XVECLEN (split, 0); i++)
889 scan_operands (XVECEXP (split, 0, i), 0, 0);
891 d->n_operands = max_opno + 1;
893 memset (d->constraints, 0, sizeof constraints);
894 memset (d->op_n_alternatives, 0, sizeof op_n_alternatives);
895 memset (d->predicates, 0, sizeof predicates);
896 memset (d->address_p, 0, sizeof address_p);
897 memset (d->modes, 0, sizeof modes);
898 memset (d->strict_low, 0, sizeof strict_low);
901 d->n_alternatives = 0;
910 register PTR val = (PTR) malloc (size);
913 fatal ("virtual memory exhausted");
924 ptr = (PTR) realloc (old, size);
926 ptr = (PTR) malloc (size);
928 fatal ("virtual memory exhausted");
933 fatal VPROTO ((const char *format, ...))
935 #ifndef ANSI_PROTOTYPES
940 VA_START (ap, format);
942 #ifndef ANSI_PROTOTYPES
943 format = va_arg (ap, const char *);
946 fprintf (stderr, "genoutput: ");
947 vfprintf (stderr, format, ap);
949 fprintf (stderr, "\n");
950 exit (FATAL_EXIT_CODE);
953 /* More 'friendly' abort that prints the line and file.
954 config.h can #define abort fancy_abort if you like that sort of thing. */
959 fatal ("Internal gcc abort.");
963 error VPROTO ((const char *format, ...))
965 #ifndef ANSI_PROTOTYPES
970 VA_START (ap, format);
972 #ifndef ANSI_PROTOTYPES
973 format = va_arg (ap, const char *);
976 fprintf (stderr, "genoutput: ");
977 vfprintf (stderr, format, ap);
979 fprintf (stderr, "\n");
993 obstack_init (rtl_obstack);
996 fatal ("No input file name.");
998 infile = fopen (argv[1], "r");
1002 exit (FATAL_EXIT_CODE);
1008 next_code_number = 0;
1009 next_index_number = 0;
1010 have_constraints = 0;
1012 /* Read the machine description. */
1016 c = read_skip_spaces (infile);
1021 desc = read_rtx (infile);
1022 if (GET_CODE (desc) == DEFINE_INSN)
1024 if (GET_CODE (desc) == DEFINE_PEEPHOLE)
1025 gen_peephole (desc);
1026 if (GET_CODE (desc) == DEFINE_EXPAND)
1028 if (GET_CODE (desc) == DEFINE_SPLIT)
1030 next_index_number++;
1036 exit (ferror (stdout) != 0 || have_error
1037 ? FATAL_EXIT_CODE : SUCCESS_EXIT_CODE);
1044 n_occurrences (c, s)