1 /* Convert RTL to assembler code and output it, for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
22 /* This is the final pass of the compiler.
23 It looks at the rtl code for a function and outputs assembler code.
25 Call `final_start_function' to output the assembler code for function entry,
26 `final' to output assembler code for some RTL code,
27 `final_end_function' to output assembler code for function exit.
28 If a function is compiled in several pieces, each piece is
29 output separately with `final'.
31 Some optimizations are also done at this level.
32 Move instructions that were made unnecessary by good register allocation
33 are detected and omitted from the output. (Though most of these
34 are removed by the last jump pass.)
36 Instructions to set the condition codes are omitted when it can be
37 seen that the condition codes already had the desired values.
39 In some cases it is sufficient if the inherited condition codes
40 have related values, but this may require the following insn
41 (the one that tests the condition codes) to be modified.
43 The code for the function prologue and epilogue are generated
44 directly in assembler by the target functions function_prologue and
45 function_epilogue. Those instructions never exist as rtl. */
49 #include "coretypes.h"
56 #include "insn-config.h"
57 #include "insn-attr.h"
59 #include "conditions.h"
62 #include "hard-reg-set.h"
69 #include "basic-block.h"
73 #include "cfglayout.h"
74 #include "tree-pass.h"
75 #include "tree-flow.h"
85 #ifdef XCOFF_DEBUGGING_INFO
86 #include "xcoffout.h" /* Needed for external data
87 declarations for e.g. AIX 4.x. */
90 #if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO)
91 #include "dwarf2out.h"
94 #ifdef DBX_DEBUGGING_INFO
98 #ifdef SDB_DEBUGGING_INFO
102 /* If we aren't using cc0, CC_STATUS_INIT shouldn't exist. So define a
103 null default for it to save conditionalization later. */
104 #ifndef CC_STATUS_INIT
105 #define CC_STATUS_INIT
108 /* How to start an assembler comment. */
109 #ifndef ASM_COMMENT_START
110 #define ASM_COMMENT_START ";#"
113 /* Is the given character a logical line separator for the assembler? */
114 #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR
115 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == ';')
118 #ifndef JUMP_TABLES_IN_TEXT_SECTION
119 #define JUMP_TABLES_IN_TEXT_SECTION 0
122 /* Bitflags used by final_scan_insn. */
125 #define SEEN_EMITTED 4
127 /* Last insn processed by final_scan_insn. */
128 static rtx debug_insn;
129 rtx current_output_insn;
131 /* Line number of last NOTE. */
132 static int last_linenum;
134 /* Last discriminator written to assembly. */
135 static int last_discriminator;
137 /* Discriminator of current block. */
138 static int discriminator;
140 /* Highest line number in current block. */
141 static int high_block_linenum;
143 /* Likewise for function. */
144 static int high_function_linenum;
146 /* Filename of last NOTE. */
147 static const char *last_filename;
149 /* Override filename and line number. */
150 static const char *override_filename;
151 static int override_linenum;
153 /* Whether to force emission of a line note before the next insn. */
154 static bool force_source_line = false;
156 extern const int length_unit_log; /* This is defined in insn-attrtab.c. */
158 /* Nonzero while outputting an `asm' with operands.
159 This means that inconsistencies are the user's fault, so don't die.
160 The precise value is the insn being output, to pass to error_for_asm. */
161 rtx this_is_asm_operands;
163 /* Number of operands of this insn, for an `asm' with operands. */
164 static unsigned int insn_noperands;
166 /* Compare optimization flag. */
168 static rtx last_ignored_compare = 0;
170 /* Assign a unique number to each insn that is output.
171 This can be used to generate unique local labels. */
173 static int insn_counter = 0;
176 /* This variable contains machine-dependent flags (defined in tm.h)
177 set and examined by output routines
178 that describe how to interpret the condition codes properly. */
182 /* During output of an insn, this contains a copy of cc_status
183 from before the insn. */
185 CC_STATUS cc_prev_status;
188 /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */
190 static int block_depth;
192 /* Nonzero if have enabled APP processing of our assembler output. */
196 /* If we are outputting an insn sequence, this contains the sequence rtx.
201 #ifdef ASSEMBLER_DIALECT
203 /* Number of the assembler dialect to use, starting at 0. */
204 static int dialect_number;
207 #ifdef HAVE_conditional_execution
208 /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */
209 rtx current_insn_predicate;
212 #ifdef HAVE_ATTR_length
213 static int asm_insn_count (rtx);
215 static void profile_function (FILE *);
216 static void profile_after_prologue (FILE *);
217 static bool notice_source_line (rtx, bool *);
218 static rtx walk_alter_subreg (rtx *, bool *);
219 static void output_asm_name (void);
220 static void output_alternate_entry_point (FILE *, rtx);
221 static tree get_mem_expr_from_op (rtx, int *);
222 static void output_asm_operand_names (rtx *, int *, int);
223 static void output_operand (rtx, int);
224 #ifdef LEAF_REGISTERS
225 static void leaf_renumber_regs (rtx);
228 static int alter_cond (rtx);
230 #ifndef ADDR_VEC_ALIGN
231 static int final_addr_vec_align (rtx);
233 #ifdef HAVE_ATTR_length
234 static int align_fuzz (rtx, rtx, int, unsigned);
237 /* Initialize data in final at the beginning of a compilation. */
240 init_final (const char *filename ATTRIBUTE_UNUSED)
245 #ifdef ASSEMBLER_DIALECT
246 dialect_number = ASSEMBLER_DIALECT;
250 /* Default target function prologue and epilogue assembler output.
252 If not overridden for epilogue code, then the function body itself
253 contains return instructions wherever needed. */
255 default_function_pro_epilogue (FILE *file ATTRIBUTE_UNUSED,
256 HOST_WIDE_INT size ATTRIBUTE_UNUSED)
260 /* Default target hook that outputs nothing to a stream. */
262 no_asm_to_stream (FILE *file ATTRIBUTE_UNUSED)
266 /* Enable APP processing of subsequent output.
267 Used before the output from an `asm' statement. */
274 fputs (ASM_APP_ON, asm_out_file);
279 /* Disable APP processing of subsequent output.
280 Called from varasm.c before most kinds of output. */
287 fputs (ASM_APP_OFF, asm_out_file);
292 /* Return the number of slots filled in the current
293 delayed branch sequence (we don't count the insn needing the
294 delay slot). Zero if not in a delayed branch sequence. */
298 dbr_sequence_length (void)
300 if (final_sequence != 0)
301 return XVECLEN (final_sequence, 0) - 1;
307 /* The next two pages contain routines used to compute the length of an insn
308 and to shorten branches. */
310 /* Arrays for insn lengths, and addresses. The latter is referenced by
311 `insn_current_length'. */
313 static int *insn_lengths;
315 VEC(int,heap) *insn_addresses_;
317 /* Max uid for which the above arrays are valid. */
318 static int insn_lengths_max_uid;
320 /* Address of insn being processed. Used by `insn_current_length'. */
321 int insn_current_address;
323 /* Address of insn being processed in previous iteration. */
324 int insn_last_address;
326 /* known invariant alignment of insn being processed. */
327 int insn_current_align;
329 /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)]
330 gives the next following alignment insn that increases the known
331 alignment, or NULL_RTX if there is no such insn.
332 For any alignment obtained this way, we can again index uid_align with
333 its uid to obtain the next following align that in turn increases the
334 alignment, till we reach NULL_RTX; the sequence obtained this way
335 for each insn we'll call the alignment chain of this insn in the following
338 struct label_alignment
344 static rtx *uid_align;
345 static int *uid_shuid;
346 static struct label_alignment *label_align;
348 /* Indicate that branch shortening hasn't yet been done. */
351 init_insn_lengths (void)
362 insn_lengths_max_uid = 0;
364 #ifdef HAVE_ATTR_length
365 INSN_ADDRESSES_FREE ();
374 /* Obtain the current length of an insn. If branch shortening has been done,
375 get its actual length. Otherwise, use FALLBACK_FN to calculate the
378 get_attr_length_1 (rtx insn ATTRIBUTE_UNUSED,
379 int (*fallback_fn) (rtx) ATTRIBUTE_UNUSED)
381 #ifdef HAVE_ATTR_length
386 if (insn_lengths_max_uid > INSN_UID (insn))
387 return insn_lengths[INSN_UID (insn)];
389 switch (GET_CODE (insn))
398 length = fallback_fn (insn);
402 body = PATTERN (insn);
403 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
405 /* Alignment is machine-dependent and should be handled by
409 length = fallback_fn (insn);
413 body = PATTERN (insn);
414 if (GET_CODE (body) == USE || GET_CODE (body) == CLOBBER)
417 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
418 length = asm_insn_count (body) * fallback_fn (insn);
419 else if (GET_CODE (body) == SEQUENCE)
420 for (i = 0; i < XVECLEN (body, 0); i++)
421 length += get_attr_length_1 (XVECEXP (body, 0, i), fallback_fn);
423 length = fallback_fn (insn);
430 #ifdef ADJUST_INSN_LENGTH
431 ADJUST_INSN_LENGTH (insn, length);
434 #else /* not HAVE_ATTR_length */
436 #define insn_default_length 0
437 #define insn_min_length 0
438 #endif /* not HAVE_ATTR_length */
441 /* Obtain the current length of an insn. If branch shortening has been done,
442 get its actual length. Otherwise, get its maximum length. */
444 get_attr_length (rtx insn)
446 return get_attr_length_1 (insn, insn_default_length);
449 /* Obtain the current length of an insn. If branch shortening has been done,
450 get its actual length. Otherwise, get its minimum length. */
452 get_attr_min_length (rtx insn)
454 return get_attr_length_1 (insn, insn_min_length);
457 /* Code to handle alignment inside shorten_branches. */
459 /* Here is an explanation how the algorithm in align_fuzz can give
462 Call a sequence of instructions beginning with alignment point X
463 and continuing until the next alignment point `block X'. When `X'
464 is used in an expression, it means the alignment value of the
467 Call the distance between the start of the first insn of block X, and
468 the end of the last insn of block X `IX', for the `inner size of X'.
469 This is clearly the sum of the instruction lengths.
471 Likewise with the next alignment-delimited block following X, which we
474 Call the distance between the start of the first insn of block X, and
475 the start of the first insn of block Y `OX', for the `outer size of X'.
477 The estimated padding is then OX - IX.
479 OX can be safely estimated as
484 OX = round_up(IX, X) + Y - X
486 Clearly est(IX) >= real(IX), because that only depends on the
487 instruction lengths, and those being overestimated is a given.
489 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so
490 we needn't worry about that when thinking about OX.
492 When X >= Y, the alignment provided by Y adds no uncertainty factor
493 for branch ranges starting before X, so we can just round what we have.
494 But when X < Y, we don't know anything about the, so to speak,
495 `middle bits', so we have to assume the worst when aligning up from an
496 address mod X to one mod Y, which is Y - X. */
499 #define LABEL_ALIGN(LABEL) align_labels_log
502 #ifndef LABEL_ALIGN_MAX_SKIP
503 #define LABEL_ALIGN_MAX_SKIP align_labels_max_skip
507 #define LOOP_ALIGN(LABEL) align_loops_log
510 #ifndef LOOP_ALIGN_MAX_SKIP
511 #define LOOP_ALIGN_MAX_SKIP align_loops_max_skip
514 #ifndef LABEL_ALIGN_AFTER_BARRIER
515 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0
518 #ifndef LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
519 #define LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP 0
523 #define JUMP_ALIGN(LABEL) align_jumps_log
526 #ifndef JUMP_ALIGN_MAX_SKIP
527 #define JUMP_ALIGN_MAX_SKIP align_jumps_max_skip
530 #ifndef ADDR_VEC_ALIGN
532 final_addr_vec_align (rtx addr_vec)
534 int align = GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec)));
536 if (align > BIGGEST_ALIGNMENT / BITS_PER_UNIT)
537 align = BIGGEST_ALIGNMENT / BITS_PER_UNIT;
538 return exact_log2 (align);
542 #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC)
545 #ifndef INSN_LENGTH_ALIGNMENT
546 #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log
549 #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)])
551 static int min_labelno, max_labelno;
553 #define LABEL_TO_ALIGNMENT(LABEL) \
554 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment)
556 #define LABEL_TO_MAX_SKIP(LABEL) \
557 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip)
559 /* For the benefit of port specific code do this also as a function. */
562 label_to_alignment (rtx label)
564 if (CODE_LABEL_NUMBER (label) <= max_labelno)
565 return LABEL_TO_ALIGNMENT (label);
570 label_to_max_skip (rtx label)
572 if (CODE_LABEL_NUMBER (label) <= max_labelno)
573 return LABEL_TO_MAX_SKIP (label);
577 #ifdef HAVE_ATTR_length
578 /* The differences in addresses
579 between a branch and its target might grow or shrink depending on
580 the alignment the start insn of the range (the branch for a forward
581 branch or the label for a backward branch) starts out on; if these
582 differences are used naively, they can even oscillate infinitely.
583 We therefore want to compute a 'worst case' address difference that
584 is independent of the alignment the start insn of the range end
585 up on, and that is at least as large as the actual difference.
586 The function align_fuzz calculates the amount we have to add to the
587 naively computed difference, by traversing the part of the alignment
588 chain of the start insn of the range that is in front of the end insn
589 of the range, and considering for each alignment the maximum amount
590 that it might contribute to a size increase.
592 For casesi tables, we also want to know worst case minimum amounts of
593 address difference, in case a machine description wants to introduce
594 some common offset that is added to all offsets in a table.
595 For this purpose, align_fuzz with a growth argument of 0 computes the
596 appropriate adjustment. */
598 /* Compute the maximum delta by which the difference of the addresses of
599 START and END might grow / shrink due to a different address for start
600 which changes the size of alignment insns between START and END.
601 KNOWN_ALIGN_LOG is the alignment known for START.
602 GROWTH should be ~0 if the objective is to compute potential code size
603 increase, and 0 if the objective is to compute potential shrink.
604 The return value is undefined for any other value of GROWTH. */
607 align_fuzz (rtx start, rtx end, int known_align_log, unsigned int growth)
609 int uid = INSN_UID (start);
611 int known_align = 1 << known_align_log;
612 int end_shuid = INSN_SHUID (end);
615 for (align_label = uid_align[uid]; align_label; align_label = uid_align[uid])
617 int align_addr, new_align;
619 uid = INSN_UID (align_label);
620 align_addr = INSN_ADDRESSES (uid) - insn_lengths[uid];
621 if (uid_shuid[uid] > end_shuid)
623 known_align_log = LABEL_TO_ALIGNMENT (align_label);
624 new_align = 1 << known_align_log;
625 if (new_align < known_align)
627 fuzz += (-align_addr ^ growth) & (new_align - known_align);
628 known_align = new_align;
633 /* Compute a worst-case reference address of a branch so that it
634 can be safely used in the presence of aligned labels. Since the
635 size of the branch itself is unknown, the size of the branch is
636 not included in the range. I.e. for a forward branch, the reference
637 address is the end address of the branch as known from the previous
638 branch shortening pass, minus a value to account for possible size
639 increase due to alignment. For a backward branch, it is the start
640 address of the branch as known from the current pass, plus a value
641 to account for possible size increase due to alignment.
642 NB.: Therefore, the maximum offset allowed for backward branches needs
643 to exclude the branch size. */
646 insn_current_reference_address (rtx branch)
651 if (! INSN_ADDRESSES_SET_P ())
654 seq = NEXT_INSN (PREV_INSN (branch));
655 seq_uid = INSN_UID (seq);
656 if (!JUMP_P (branch))
657 /* This can happen for example on the PA; the objective is to know the
658 offset to address something in front of the start of the function.
659 Thus, we can treat it like a backward branch.
660 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than
661 any alignment we'd encounter, so we skip the call to align_fuzz. */
662 return insn_current_address;
663 dest = JUMP_LABEL (branch);
665 /* BRANCH has no proper alignment chain set, so use SEQ.
666 BRANCH also has no INSN_SHUID. */
667 if (INSN_SHUID (seq) < INSN_SHUID (dest))
669 /* Forward branch. */
670 return (insn_last_address + insn_lengths[seq_uid]
671 - align_fuzz (seq, dest, length_unit_log, ~0));
675 /* Backward branch. */
676 return (insn_current_address
677 + align_fuzz (dest, seq, length_unit_log, ~0));
680 #endif /* HAVE_ATTR_length */
682 /* Compute branch alignments based on frequency information in the
686 compute_alignments (void)
688 int log, max_skip, max_log;
691 int freq_threshold = 0;
699 max_labelno = max_label_num ();
700 min_labelno = get_first_label_num ();
701 label_align = XCNEWVEC (struct label_alignment, max_labelno - min_labelno + 1);
703 /* If not optimizing or optimizing for size, don't assign any alignments. */
704 if (! optimize || optimize_function_for_size_p (cfun))
709 dump_flow_info (dump_file, TDF_DETAILS);
710 flow_loops_dump (dump_file, NULL, 1);
711 loop_optimizer_init (AVOID_CFG_MODIFICATIONS);
714 if (bb->frequency > freq_max)
715 freq_max = bb->frequency;
716 freq_threshold = freq_max / PARAM_VALUE (PARAM_ALIGN_THRESHOLD);
719 fprintf(dump_file, "freq_max: %i\n",freq_max);
722 rtx label = BB_HEAD (bb);
723 int fallthru_frequency = 0, branch_frequency = 0, has_fallthru = 0;
728 || optimize_bb_for_size_p (bb))
731 fprintf(dump_file, "BB %4i freq %4i loop %2i loop_depth %2i skipped.\n",
732 bb->index, bb->frequency, bb->loop_father->num, bb->loop_depth);
735 max_log = LABEL_ALIGN (label);
736 max_skip = LABEL_ALIGN_MAX_SKIP;
738 FOR_EACH_EDGE (e, ei, bb->preds)
740 if (e->flags & EDGE_FALLTHRU)
741 has_fallthru = 1, fallthru_frequency += EDGE_FREQUENCY (e);
743 branch_frequency += EDGE_FREQUENCY (e);
747 fprintf(dump_file, "BB %4i freq %4i loop %2i loop_depth %2i fall %4i branch %4i",
748 bb->index, bb->frequency, bb->loop_father->num,
750 fallthru_frequency, branch_frequency);
751 if (!bb->loop_father->inner && bb->loop_father->num)
752 fprintf (dump_file, " inner_loop");
753 if (bb->loop_father->header == bb)
754 fprintf (dump_file, " loop_header");
755 fprintf (dump_file, "\n");
758 /* There are two purposes to align block with no fallthru incoming edge:
759 1) to avoid fetch stalls when branch destination is near cache boundary
760 2) to improve cache efficiency in case the previous block is not executed
761 (so it does not need to be in the cache).
763 We to catch first case, we align frequently executed blocks.
764 To catch the second, we align blocks that are executed more frequently
765 than the predecessor and the predecessor is likely to not be executed
766 when function is called. */
769 && (branch_frequency > freq_threshold
770 || (bb->frequency > bb->prev_bb->frequency * 10
771 && (bb->prev_bb->frequency
772 <= ENTRY_BLOCK_PTR->frequency / 2))))
774 log = JUMP_ALIGN (label);
776 fprintf(dump_file, " jump alignment added.\n");
780 max_skip = JUMP_ALIGN_MAX_SKIP;
783 /* In case block is frequent and reached mostly by non-fallthru edge,
784 align it. It is most likely a first block of loop. */
786 && optimize_bb_for_speed_p (bb)
787 && branch_frequency + fallthru_frequency > freq_threshold
789 > fallthru_frequency * PARAM_VALUE (PARAM_ALIGN_LOOP_ITERATIONS)))
791 log = LOOP_ALIGN (label);
793 fprintf(dump_file, " internal loop alignment added.\n");
797 max_skip = LOOP_ALIGN_MAX_SKIP;
800 LABEL_TO_ALIGNMENT (label) = max_log;
801 LABEL_TO_MAX_SKIP (label) = max_skip;
806 loop_optimizer_finalize ();
807 free_dominance_info (CDI_DOMINATORS);
812 struct rtl_opt_pass pass_compute_alignments =
816 "alignments", /* name */
818 compute_alignments, /* execute */
821 0, /* static_pass_number */
823 0, /* properties_required */
824 0, /* properties_provided */
825 0, /* properties_destroyed */
826 0, /* todo_flags_start */
827 TODO_dump_func | TODO_verify_rtl_sharing
828 | TODO_ggc_collect /* todo_flags_finish */
833 /* Make a pass over all insns and compute their actual lengths by shortening
834 any branches of variable length if possible. */
836 /* shorten_branches might be called multiple times: for example, the SH
837 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
838 In order to do this, it needs proper length information, which it obtains
839 by calling shorten_branches. This cannot be collapsed with
840 shorten_branches itself into a single pass unless we also want to integrate
841 reorg.c, since the branch splitting exposes new instructions with delay
845 shorten_branches (rtx first ATTRIBUTE_UNUSED)
852 #ifdef HAVE_ATTR_length
853 #define MAX_CODE_ALIGN 16
855 int something_changed = 1;
856 char *varying_length;
859 rtx align_tab[MAX_CODE_ALIGN];
863 /* Compute maximum UID and allocate label_align / uid_shuid. */
864 max_uid = get_max_uid ();
866 /* Free uid_shuid before reallocating it. */
869 uid_shuid = XNEWVEC (int, max_uid);
871 if (max_labelno != max_label_num ())
873 int old = max_labelno;
877 max_labelno = max_label_num ();
879 n_labels = max_labelno - min_labelno + 1;
880 n_old_labels = old - min_labelno + 1;
882 label_align = XRESIZEVEC (struct label_alignment, label_align, n_labels);
884 /* Range of labels grows monotonically in the function. Failing here
885 means that the initialization of array got lost. */
886 gcc_assert (n_old_labels <= n_labels);
888 memset (label_align + n_old_labels, 0,
889 (n_labels - n_old_labels) * sizeof (struct label_alignment));
892 /* Initialize label_align and set up uid_shuid to be strictly
893 monotonically rising with insn order. */
894 /* We use max_log here to keep track of the maximum alignment we want to
895 impose on the next CODE_LABEL (or the current one if we are processing
896 the CODE_LABEL itself). */
901 for (insn = get_insns (), i = 1; insn; insn = NEXT_INSN (insn))
905 INSN_SHUID (insn) = i++;
912 bool next_is_jumptable;
914 /* Merge in alignments computed by compute_alignments. */
915 log = LABEL_TO_ALIGNMENT (insn);
919 max_skip = LABEL_TO_MAX_SKIP (insn);
922 next = next_nonnote_insn (insn);
923 next_is_jumptable = next && JUMP_TABLE_DATA_P (next);
924 if (!next_is_jumptable)
926 log = LABEL_ALIGN (insn);
930 max_skip = LABEL_ALIGN_MAX_SKIP;
933 /* ADDR_VECs only take room if read-only data goes into the text
935 if ((JUMP_TABLES_IN_TEXT_SECTION
936 || readonly_data_section == text_section)
937 && next_is_jumptable)
939 log = ADDR_VEC_ALIGN (next);
943 max_skip = LABEL_ALIGN_MAX_SKIP;
946 LABEL_TO_ALIGNMENT (insn) = max_log;
947 LABEL_TO_MAX_SKIP (insn) = max_skip;
951 else if (BARRIER_P (insn))
955 for (label = insn; label && ! INSN_P (label);
956 label = NEXT_INSN (label))
959 log = LABEL_ALIGN_AFTER_BARRIER (insn);
963 max_skip = LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP;
969 #ifdef HAVE_ATTR_length
971 /* Allocate the rest of the arrays. */
972 insn_lengths = XNEWVEC (int, max_uid);
973 insn_lengths_max_uid = max_uid;
974 /* Syntax errors can lead to labels being outside of the main insn stream.
975 Initialize insn_addresses, so that we get reproducible results. */
976 INSN_ADDRESSES_ALLOC (max_uid);
978 varying_length = XCNEWVEC (char, max_uid);
980 /* Initialize uid_align. We scan instructions
981 from end to start, and keep in align_tab[n] the last seen insn
982 that does an alignment of at least n+1, i.e. the successor
983 in the alignment chain for an insn that does / has a known
985 uid_align = XCNEWVEC (rtx, max_uid);
987 for (i = MAX_CODE_ALIGN; --i >= 0;)
988 align_tab[i] = NULL_RTX;
989 seq = get_last_insn ();
990 for (; seq; seq = PREV_INSN (seq))
992 int uid = INSN_UID (seq);
994 log = (LABEL_P (seq) ? LABEL_TO_ALIGNMENT (seq) : 0);
995 uid_align[uid] = align_tab[0];
998 /* Found an alignment label. */
999 uid_align[uid] = align_tab[log];
1000 for (i = log - 1; i >= 0; i--)
1004 #ifdef CASE_VECTOR_SHORTEN_MODE
1007 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum
1010 int min_shuid = INSN_SHUID (get_insns ()) - 1;
1011 int max_shuid = INSN_SHUID (get_last_insn ()) + 1;
1014 for (insn = first; insn != 0; insn = NEXT_INSN (insn))
1016 rtx min_lab = NULL_RTX, max_lab = NULL_RTX, pat;
1017 int len, i, min, max, insn_shuid;
1019 addr_diff_vec_flags flags;
1022 || GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC)
1024 pat = PATTERN (insn);
1025 len = XVECLEN (pat, 1);
1026 gcc_assert (len > 0);
1027 min_align = MAX_CODE_ALIGN;
1028 for (min = max_shuid, max = min_shuid, i = len - 1; i >= 0; i--)
1030 rtx lab = XEXP (XVECEXP (pat, 1, i), 0);
1031 int shuid = INSN_SHUID (lab);
1042 if (min_align > LABEL_TO_ALIGNMENT (lab))
1043 min_align = LABEL_TO_ALIGNMENT (lab);
1045 XEXP (pat, 2) = gen_rtx_LABEL_REF (Pmode, min_lab);
1046 XEXP (pat, 3) = gen_rtx_LABEL_REF (Pmode, max_lab);
1047 insn_shuid = INSN_SHUID (insn);
1048 rel = INSN_SHUID (XEXP (XEXP (pat, 0), 0));
1049 memset (&flags, 0, sizeof (flags));
1050 flags.min_align = min_align;
1051 flags.base_after_vec = rel > insn_shuid;
1052 flags.min_after_vec = min > insn_shuid;
1053 flags.max_after_vec = max > insn_shuid;
1054 flags.min_after_base = min > rel;
1055 flags.max_after_base = max > rel;
1056 ADDR_DIFF_VEC_FLAGS (pat) = flags;
1059 #endif /* CASE_VECTOR_SHORTEN_MODE */
1061 /* Compute initial lengths, addresses, and varying flags for each insn. */
1062 for (insn_current_address = 0, insn = first;
1064 insn_current_address += insn_lengths[uid], insn = NEXT_INSN (insn))
1066 uid = INSN_UID (insn);
1068 insn_lengths[uid] = 0;
1072 int log = LABEL_TO_ALIGNMENT (insn);
1075 int align = 1 << log;
1076 int new_address = (insn_current_address + align - 1) & -align;
1077 insn_lengths[uid] = new_address - insn_current_address;
1081 INSN_ADDRESSES (uid) = insn_current_address + insn_lengths[uid];
1083 if (NOTE_P (insn) || BARRIER_P (insn)
1084 || LABEL_P (insn) || DEBUG_INSN_P(insn))
1086 if (INSN_DELETED_P (insn))
1089 body = PATTERN (insn);
1090 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
1092 /* This only takes room if read-only data goes into the text
1094 if (JUMP_TABLES_IN_TEXT_SECTION
1095 || readonly_data_section == text_section)
1096 insn_lengths[uid] = (XVECLEN (body,
1097 GET_CODE (body) == ADDR_DIFF_VEC)
1098 * GET_MODE_SIZE (GET_MODE (body)));
1099 /* Alignment is handled by ADDR_VEC_ALIGN. */
1101 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
1102 insn_lengths[uid] = asm_insn_count (body) * insn_default_length (insn);
1103 else if (GET_CODE (body) == SEQUENCE)
1106 int const_delay_slots;
1108 const_delay_slots = const_num_delay_slots (XVECEXP (body, 0, 0));
1110 const_delay_slots = 0;
1112 /* Inside a delay slot sequence, we do not do any branch shortening
1113 if the shortening could change the number of delay slots
1115 for (i = 0; i < XVECLEN (body, 0); i++)
1117 rtx inner_insn = XVECEXP (body, 0, i);
1118 int inner_uid = INSN_UID (inner_insn);
1121 if (GET_CODE (body) == ASM_INPUT
1122 || asm_noperands (PATTERN (XVECEXP (body, 0, i))) >= 0)
1123 inner_length = (asm_insn_count (PATTERN (inner_insn))
1124 * insn_default_length (inner_insn));
1126 inner_length = insn_default_length (inner_insn);
1128 insn_lengths[inner_uid] = inner_length;
1129 if (const_delay_slots)
1131 if ((varying_length[inner_uid]
1132 = insn_variable_length_p (inner_insn)) != 0)
1133 varying_length[uid] = 1;
1134 INSN_ADDRESSES (inner_uid) = (insn_current_address
1135 + insn_lengths[uid]);
1138 varying_length[inner_uid] = 0;
1139 insn_lengths[uid] += inner_length;
1142 else if (GET_CODE (body) != USE && GET_CODE (body) != CLOBBER)
1144 insn_lengths[uid] = insn_default_length (insn);
1145 varying_length[uid] = insn_variable_length_p (insn);
1148 /* If needed, do any adjustment. */
1149 #ifdef ADJUST_INSN_LENGTH
1150 ADJUST_INSN_LENGTH (insn, insn_lengths[uid]);
1151 if (insn_lengths[uid] < 0)
1152 fatal_insn ("negative insn length", insn);
1156 /* Now loop over all the insns finding varying length insns. For each,
1157 get the current insn length. If it has changed, reflect the change.
1158 When nothing changes for a full pass, we are done. */
1160 while (something_changed)
1162 something_changed = 0;
1163 insn_current_align = MAX_CODE_ALIGN - 1;
1164 for (insn_current_address = 0, insn = first;
1166 insn = NEXT_INSN (insn))
1169 #ifdef ADJUST_INSN_LENGTH
1174 uid = INSN_UID (insn);
1178 int log = LABEL_TO_ALIGNMENT (insn);
1179 if (log > insn_current_align)
1181 int align = 1 << log;
1182 int new_address= (insn_current_address + align - 1) & -align;
1183 insn_lengths[uid] = new_address - insn_current_address;
1184 insn_current_align = log;
1185 insn_current_address = new_address;
1188 insn_lengths[uid] = 0;
1189 INSN_ADDRESSES (uid) = insn_current_address;
1193 length_align = INSN_LENGTH_ALIGNMENT (insn);
1194 if (length_align < insn_current_align)
1195 insn_current_align = length_align;
1197 insn_last_address = INSN_ADDRESSES (uid);
1198 INSN_ADDRESSES (uid) = insn_current_address;
1200 #ifdef CASE_VECTOR_SHORTEN_MODE
1201 if (optimize && JUMP_P (insn)
1202 && GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
1204 rtx body = PATTERN (insn);
1205 int old_length = insn_lengths[uid];
1206 rtx rel_lab = XEXP (XEXP (body, 0), 0);
1207 rtx min_lab = XEXP (XEXP (body, 2), 0);
1208 rtx max_lab = XEXP (XEXP (body, 3), 0);
1209 int rel_addr = INSN_ADDRESSES (INSN_UID (rel_lab));
1210 int min_addr = INSN_ADDRESSES (INSN_UID (min_lab));
1211 int max_addr = INSN_ADDRESSES (INSN_UID (max_lab));
1214 addr_diff_vec_flags flags;
1216 /* Avoid automatic aggregate initialization. */
1217 flags = ADDR_DIFF_VEC_FLAGS (body);
1219 /* Try to find a known alignment for rel_lab. */
1220 for (prev = rel_lab;
1222 && ! insn_lengths[INSN_UID (prev)]
1223 && ! (varying_length[INSN_UID (prev)] & 1);
1224 prev = PREV_INSN (prev))
1225 if (varying_length[INSN_UID (prev)] & 2)
1227 rel_align = LABEL_TO_ALIGNMENT (prev);
1231 /* See the comment on addr_diff_vec_flags in rtl.h for the
1232 meaning of the flags values. base: REL_LAB vec: INSN */
1233 /* Anything after INSN has still addresses from the last
1234 pass; adjust these so that they reflect our current
1235 estimate for this pass. */
1236 if (flags.base_after_vec)
1237 rel_addr += insn_current_address - insn_last_address;
1238 if (flags.min_after_vec)
1239 min_addr += insn_current_address - insn_last_address;
1240 if (flags.max_after_vec)
1241 max_addr += insn_current_address - insn_last_address;
1242 /* We want to know the worst case, i.e. lowest possible value
1243 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB,
1244 its offset is positive, and we have to be wary of code shrink;
1245 otherwise, it is negative, and we have to be vary of code
1247 if (flags.min_after_base)
1249 /* If INSN is between REL_LAB and MIN_LAB, the size
1250 changes we are about to make can change the alignment
1251 within the observed offset, therefore we have to break
1252 it up into two parts that are independent. */
1253 if (! flags.base_after_vec && flags.min_after_vec)
1255 min_addr -= align_fuzz (rel_lab, insn, rel_align, 0);
1256 min_addr -= align_fuzz (insn, min_lab, 0, 0);
1259 min_addr -= align_fuzz (rel_lab, min_lab, rel_align, 0);
1263 if (flags.base_after_vec && ! flags.min_after_vec)
1265 min_addr -= align_fuzz (min_lab, insn, 0, ~0);
1266 min_addr -= align_fuzz (insn, rel_lab, 0, ~0);
1269 min_addr -= align_fuzz (min_lab, rel_lab, 0, ~0);
1271 /* Likewise, determine the highest lowest possible value
1272 for the offset of MAX_LAB. */
1273 if (flags.max_after_base)
1275 if (! flags.base_after_vec && flags.max_after_vec)
1277 max_addr += align_fuzz (rel_lab, insn, rel_align, ~0);
1278 max_addr += align_fuzz (insn, max_lab, 0, ~0);
1281 max_addr += align_fuzz (rel_lab, max_lab, rel_align, ~0);
1285 if (flags.base_after_vec && ! flags.max_after_vec)
1287 max_addr += align_fuzz (max_lab, insn, 0, 0);
1288 max_addr += align_fuzz (insn, rel_lab, 0, 0);
1291 max_addr += align_fuzz (max_lab, rel_lab, 0, 0);
1293 PUT_MODE (body, CASE_VECTOR_SHORTEN_MODE (min_addr - rel_addr,
1294 max_addr - rel_addr,
1296 if (JUMP_TABLES_IN_TEXT_SECTION
1297 || readonly_data_section == text_section)
1300 = (XVECLEN (body, 1) * GET_MODE_SIZE (GET_MODE (body)));
1301 insn_current_address += insn_lengths[uid];
1302 if (insn_lengths[uid] != old_length)
1303 something_changed = 1;
1308 #endif /* CASE_VECTOR_SHORTEN_MODE */
1310 if (! (varying_length[uid]))
1312 if (NONJUMP_INSN_P (insn)
1313 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1317 body = PATTERN (insn);
1318 for (i = 0; i < XVECLEN (body, 0); i++)
1320 rtx inner_insn = XVECEXP (body, 0, i);
1321 int inner_uid = INSN_UID (inner_insn);
1323 INSN_ADDRESSES (inner_uid) = insn_current_address;
1325 insn_current_address += insn_lengths[inner_uid];
1329 insn_current_address += insn_lengths[uid];
1334 if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
1338 body = PATTERN (insn);
1340 for (i = 0; i < XVECLEN (body, 0); i++)
1342 rtx inner_insn = XVECEXP (body, 0, i);
1343 int inner_uid = INSN_UID (inner_insn);
1346 INSN_ADDRESSES (inner_uid) = insn_current_address;
1348 /* insn_current_length returns 0 for insns with a
1349 non-varying length. */
1350 if (! varying_length[inner_uid])
1351 inner_length = insn_lengths[inner_uid];
1353 inner_length = insn_current_length (inner_insn);
1355 if (inner_length != insn_lengths[inner_uid])
1357 insn_lengths[inner_uid] = inner_length;
1358 something_changed = 1;
1360 insn_current_address += insn_lengths[inner_uid];
1361 new_length += inner_length;
1366 new_length = insn_current_length (insn);
1367 insn_current_address += new_length;
1370 #ifdef ADJUST_INSN_LENGTH
1371 /* If needed, do any adjustment. */
1372 tmp_length = new_length;
1373 ADJUST_INSN_LENGTH (insn, new_length);
1374 insn_current_address += (new_length - tmp_length);
1377 if (new_length != insn_lengths[uid])
1379 insn_lengths[uid] = new_length;
1380 something_changed = 1;
1383 /* For a non-optimizing compile, do only a single pass. */
1388 free (varying_length);
1390 #endif /* HAVE_ATTR_length */
1393 #ifdef HAVE_ATTR_length
1394 /* Given the body of an INSN known to be generated by an ASM statement, return
1395 the number of machine instructions likely to be generated for this insn.
1396 This is used to compute its length. */
1399 asm_insn_count (rtx body)
1403 if (GET_CODE (body) == ASM_INPUT)
1404 templ = XSTR (body, 0);
1406 templ = decode_asm_operands (body, NULL, NULL, NULL, NULL, NULL);
1408 return asm_str_count (templ);
1412 /* Return the number of machine instructions likely to be generated for the
1413 inline-asm template. */
1415 asm_str_count (const char *templ)
1422 for (; *templ; templ++)
1423 if (IS_ASM_LOGICAL_LINE_SEPARATOR (*templ, templ)
1430 /* ??? This is probably the wrong place for these. */
1431 /* Structure recording the mapping from source file and directory
1432 names at compile time to those to be embedded in debug
1434 typedef struct debug_prefix_map
1436 const char *old_prefix;
1437 const char *new_prefix;
1440 struct debug_prefix_map *next;
1443 /* Linked list of such structures. */
1444 debug_prefix_map *debug_prefix_maps;
1447 /* Record a debug file prefix mapping. ARG is the argument to
1448 -fdebug-prefix-map and must be of the form OLD=NEW. */
1451 add_debug_prefix_map (const char *arg)
1453 debug_prefix_map *map;
1456 p = strchr (arg, '=');
1459 error ("invalid argument %qs to -fdebug-prefix-map", arg);
1462 map = XNEW (debug_prefix_map);
1463 map->old_prefix = xstrndup (arg, p - arg);
1464 map->old_len = p - arg;
1466 map->new_prefix = xstrdup (p);
1467 map->new_len = strlen (p);
1468 map->next = debug_prefix_maps;
1469 debug_prefix_maps = map;
1472 /* Perform user-specified mapping of debug filename prefixes. Return
1473 the new name corresponding to FILENAME. */
1476 remap_debug_filename (const char *filename)
1478 debug_prefix_map *map;
1483 for (map = debug_prefix_maps; map; map = map->next)
1484 if (strncmp (filename, map->old_prefix, map->old_len) == 0)
1488 name = filename + map->old_len;
1489 name_len = strlen (name) + 1;
1490 s = (char *) alloca (name_len + map->new_len);
1491 memcpy (s, map->new_prefix, map->new_len);
1492 memcpy (s + map->new_len, name, name_len);
1493 return ggc_strdup (s);
1496 /* Return true if DWARF2 debug info can be emitted for DECL. */
1499 dwarf2_debug_info_emitted_p (tree decl)
1501 if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG)
1504 if (DECL_IGNORED_P (decl))
1510 /* Output assembler code for the start of a function,
1511 and initialize some of the variables in this file
1512 for the new function. The label for the function and associated
1513 assembler pseudo-ops have already been output in `assemble_start_function'.
1515 FIRST is the first insn of the rtl for the function being compiled.
1516 FILE is the file to write assembler code to.
1517 OPTIMIZE is nonzero if we should eliminate redundant
1518 test and compare insns. */
1521 final_start_function (rtx first ATTRIBUTE_UNUSED, FILE *file,
1522 int optimize ATTRIBUTE_UNUSED)
1526 this_is_asm_operands = 0;
1528 last_filename = locator_file (prologue_locator);
1529 last_linenum = locator_line (prologue_locator);
1530 last_discriminator = discriminator = 0;
1532 high_block_linenum = high_function_linenum = last_linenum;
1534 if (!DECL_IGNORED_P (current_function_decl))
1535 debug_hooks->begin_prologue (last_linenum, last_filename);
1537 #if defined (DWARF2_UNWIND_INFO) || defined (TARGET_UNWIND_INFO)
1538 if (!dwarf2_debug_info_emitted_p (current_function_decl))
1539 dwarf2out_begin_prologue (0, NULL);
1542 #ifdef LEAF_REG_REMAP
1543 if (current_function_uses_only_leaf_regs)
1544 leaf_renumber_regs (first);
1547 /* The Sun386i and perhaps other machines don't work right
1548 if the profiling code comes after the prologue. */
1549 #ifdef PROFILE_BEFORE_PROLOGUE
1551 profile_function (file);
1552 #endif /* PROFILE_BEFORE_PROLOGUE */
1554 #if defined (DWARF2_UNWIND_INFO) && defined (HAVE_prologue)
1555 if (dwarf2out_do_frame ())
1556 dwarf2out_frame_debug (NULL_RTX, false);
1559 /* If debugging, assign block numbers to all of the blocks in this
1563 reemit_insn_block_notes ();
1564 number_blocks (current_function_decl);
1565 /* We never actually put out begin/end notes for the top-level
1566 block in the function. But, conceptually, that block is
1568 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl)) = 1;
1571 if (warn_frame_larger_than
1572 && get_frame_size () > frame_larger_than_size)
1574 /* Issue a warning */
1575 warning (OPT_Wframe_larger_than_,
1576 "the frame size of %wd bytes is larger than %wd bytes",
1577 get_frame_size (), frame_larger_than_size);
1580 /* First output the function prologue: code to set up the stack frame. */
1581 targetm.asm_out.function_prologue (file, get_frame_size ());
1583 /* If the machine represents the prologue as RTL, the profiling code must
1584 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
1585 #ifdef HAVE_prologue
1586 if (! HAVE_prologue)
1588 profile_after_prologue (file);
1592 profile_after_prologue (FILE *file ATTRIBUTE_UNUSED)
1594 #ifndef PROFILE_BEFORE_PROLOGUE
1596 profile_function (file);
1597 #endif /* not PROFILE_BEFORE_PROLOGUE */
1601 profile_function (FILE *file ATTRIBUTE_UNUSED)
1603 #ifndef NO_PROFILE_COUNTERS
1604 # define NO_PROFILE_COUNTERS 0
1606 #ifdef ASM_OUTPUT_REG_PUSH
1607 rtx sval = NULL, chain = NULL;
1609 if (cfun->returns_struct)
1610 sval = targetm.calls.struct_value_rtx (TREE_TYPE (current_function_decl),
1612 if (cfun->static_chain_decl)
1613 chain = targetm.calls.static_chain (current_function_decl, true);
1614 #endif /* ASM_OUTPUT_REG_PUSH */
1616 if (! NO_PROFILE_COUNTERS)
1618 int align = MIN (BIGGEST_ALIGNMENT, LONG_TYPE_SIZE);
1619 switch_to_section (data_section);
1620 ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT));
1621 targetm.asm_out.internal_label (file, "LP", current_function_funcdef_no);
1622 assemble_integer (const0_rtx, LONG_TYPE_SIZE / BITS_PER_UNIT, align, 1);
1625 switch_to_section (current_function_section ());
1627 #ifdef ASM_OUTPUT_REG_PUSH
1628 if (sval && REG_P (sval))
1629 ASM_OUTPUT_REG_PUSH (file, REGNO (sval));
1630 if (chain && REG_P (chain))
1631 ASM_OUTPUT_REG_PUSH (file, REGNO (chain));
1634 FUNCTION_PROFILER (file, current_function_funcdef_no);
1636 #ifdef ASM_OUTPUT_REG_PUSH
1637 if (chain && REG_P (chain))
1638 ASM_OUTPUT_REG_POP (file, REGNO (chain));
1639 if (sval && REG_P (sval))
1640 ASM_OUTPUT_REG_POP (file, REGNO (sval));
1644 /* Output assembler code for the end of a function.
1645 For clarity, args are same as those of `final_start_function'
1646 even though not all of them are needed. */
1649 final_end_function (void)
1653 if (!DECL_IGNORED_P (current_function_decl))
1654 debug_hooks->end_function (high_function_linenum);
1656 /* Finally, output the function epilogue:
1657 code to restore the stack frame and return to the caller. */
1658 targetm.asm_out.function_epilogue (asm_out_file, get_frame_size ());
1660 /* And debug output. */
1661 if (!DECL_IGNORED_P (current_function_decl))
1662 debug_hooks->end_epilogue (last_linenum, last_filename);
1664 #if defined (DWARF2_UNWIND_INFO)
1665 if (!dwarf2_debug_info_emitted_p (current_function_decl)
1666 && dwarf2out_do_frame ())
1667 dwarf2out_end_epilogue (last_linenum, last_filename);
1671 /* Output assembler code for some insns: all or part of a function.
1672 For description of args, see `final_start_function', above. */
1675 final (rtx first, FILE *file, int optimize)
1681 last_ignored_compare = 0;
1683 for (insn = first; insn; insn = NEXT_INSN (insn))
1685 if (INSN_UID (insn) > max_uid) /* Find largest UID. */
1686 max_uid = INSN_UID (insn);
1688 /* If CC tracking across branches is enabled, record the insn which
1689 jumps to each branch only reached from one place. */
1690 if (optimize && JUMP_P (insn))
1692 rtx lab = JUMP_LABEL (insn);
1693 if (lab && LABEL_NUSES (lab) == 1)
1695 LABEL_REFS (lab) = insn;
1705 /* Output the insns. */
1706 for (insn = first; insn;)
1708 #ifdef HAVE_ATTR_length
1709 if ((unsigned) INSN_UID (insn) >= INSN_ADDRESSES_SIZE ())
1711 /* This can be triggered by bugs elsewhere in the compiler if
1712 new insns are created after init_insn_lengths is called. */
1713 gcc_assert (NOTE_P (insn));
1714 insn_current_address = -1;
1717 insn_current_address = INSN_ADDRESSES (INSN_UID (insn));
1718 #endif /* HAVE_ATTR_length */
1720 insn = final_scan_insn (insn, file, optimize, 0, &seen);
1725 get_insn_template (int code, rtx insn)
1727 switch (insn_data[code].output_format)
1729 case INSN_OUTPUT_FORMAT_SINGLE:
1730 return insn_data[code].output.single;
1731 case INSN_OUTPUT_FORMAT_MULTI:
1732 return insn_data[code].output.multi[which_alternative];
1733 case INSN_OUTPUT_FORMAT_FUNCTION:
1735 return (*insn_data[code].output.function) (recog_data.operand, insn);
1742 /* Emit the appropriate declaration for an alternate-entry-point
1743 symbol represented by INSN, to FILE. INSN is a CODE_LABEL with
1744 LABEL_KIND != LABEL_NORMAL.
1746 The case fall-through in this function is intentional. */
1748 output_alternate_entry_point (FILE *file, rtx insn)
1750 const char *name = LABEL_NAME (insn);
1752 switch (LABEL_KIND (insn))
1754 case LABEL_WEAK_ENTRY:
1755 #ifdef ASM_WEAKEN_LABEL
1756 ASM_WEAKEN_LABEL (file, name);
1758 case LABEL_GLOBAL_ENTRY:
1759 targetm.asm_out.globalize_label (file, name);
1760 case LABEL_STATIC_ENTRY:
1761 #ifdef ASM_OUTPUT_TYPE_DIRECTIVE
1762 ASM_OUTPUT_TYPE_DIRECTIVE (file, name, "function");
1764 ASM_OUTPUT_LABEL (file, name);
1773 /* Given a CALL_INSN, find and return the nested CALL. */
1775 call_from_call_insn (rtx insn)
1778 gcc_assert (CALL_P (insn));
1781 while (GET_CODE (x) != CALL)
1783 switch (GET_CODE (x))
1788 x = COND_EXEC_CODE (x);
1791 x = XVECEXP (x, 0, 0);
1801 /* The final scan for one insn, INSN.
1802 Args are same as in `final', except that INSN
1803 is the insn being scanned.
1804 Value returned is the next insn to be scanned.
1806 NOPEEPHOLES is the flag to disallow peephole processing (currently
1807 used for within delayed branch sequence output).
1809 SEEN is used to track the end of the prologue, for emitting
1810 debug information. We force the emission of a line note after
1811 both NOTE_INSN_PROLOGUE_END and NOTE_INSN_FUNCTION_BEG, or
1812 at the beginning of the second basic block, whichever comes
1816 final_scan_insn (rtx insn, FILE *file, int optimize ATTRIBUTE_UNUSED,
1817 int nopeepholes ATTRIBUTE_UNUSED, int *seen)
1826 /* Ignore deleted insns. These can occur when we split insns (due to a
1827 template of "#") while not optimizing. */
1828 if (INSN_DELETED_P (insn))
1829 return NEXT_INSN (insn);
1831 switch (GET_CODE (insn))
1834 switch (NOTE_KIND (insn))
1836 case NOTE_INSN_DELETED:
1839 case NOTE_INSN_SWITCH_TEXT_SECTIONS:
1840 in_cold_section_p = !in_cold_section_p;
1841 #ifdef DWARF2_UNWIND_INFO
1842 if (dwarf2out_do_frame ())
1843 dwarf2out_switch_text_section ();
1846 if (!DECL_IGNORED_P (current_function_decl))
1847 debug_hooks->switch_text_section ();
1849 switch_to_section (current_function_section ());
1852 case NOTE_INSN_BASIC_BLOCK:
1853 #ifdef TARGET_UNWIND_INFO
1854 targetm.asm_out.unwind_emit (asm_out_file, insn);
1858 fprintf (asm_out_file, "\t%s basic block %d\n",
1859 ASM_COMMENT_START, NOTE_BASIC_BLOCK (insn)->index);
1861 if ((*seen & (SEEN_EMITTED | SEEN_BB)) == SEEN_BB)
1863 *seen |= SEEN_EMITTED;
1864 force_source_line = true;
1869 discriminator = NOTE_BASIC_BLOCK (insn)->discriminator;
1873 case NOTE_INSN_EH_REGION_BEG:
1874 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHB",
1875 NOTE_EH_HANDLER (insn));
1878 case NOTE_INSN_EH_REGION_END:
1879 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHE",
1880 NOTE_EH_HANDLER (insn));
1883 case NOTE_INSN_PROLOGUE_END:
1884 targetm.asm_out.function_end_prologue (file);
1885 profile_after_prologue (file);
1887 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE)
1889 *seen |= SEEN_EMITTED;
1890 force_source_line = true;
1897 case NOTE_INSN_EPILOGUE_BEG:
1898 #if defined (DWARF2_UNWIND_INFO) && defined (HAVE_epilogue)
1899 if (dwarf2out_do_frame ())
1900 dwarf2out_begin_epilogue (insn);
1902 targetm.asm_out.function_begin_epilogue (file);
1905 case NOTE_INSN_CFA_RESTORE_STATE:
1906 #if defined (DWARF2_UNWIND_INFO)
1907 dwarf2out_frame_debug_restore_state ();
1911 case NOTE_INSN_FUNCTION_BEG:
1913 if (!DECL_IGNORED_P (current_function_decl))
1914 debug_hooks->end_prologue (last_linenum, last_filename);
1916 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE)
1918 *seen |= SEEN_EMITTED;
1919 force_source_line = true;
1926 case NOTE_INSN_BLOCK_BEG:
1927 if (debug_info_level == DINFO_LEVEL_NORMAL
1928 || debug_info_level == DINFO_LEVEL_VERBOSE
1929 || write_symbols == DWARF2_DEBUG
1930 || write_symbols == VMS_AND_DWARF2_DEBUG
1931 || write_symbols == VMS_DEBUG)
1933 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
1937 high_block_linenum = last_linenum;
1939 /* Output debugging info about the symbol-block beginning. */
1940 if (!DECL_IGNORED_P (current_function_decl))
1941 debug_hooks->begin_block (last_linenum, n);
1943 /* Mark this block as output. */
1944 TREE_ASM_WRITTEN (NOTE_BLOCK (insn)) = 1;
1946 if (write_symbols == DBX_DEBUG
1947 || write_symbols == SDB_DEBUG)
1949 location_t *locus_ptr
1950 = block_nonartificial_location (NOTE_BLOCK (insn));
1952 if (locus_ptr != NULL)
1954 override_filename = LOCATION_FILE (*locus_ptr);
1955 override_linenum = LOCATION_LINE (*locus_ptr);
1960 case NOTE_INSN_BLOCK_END:
1961 if (debug_info_level == DINFO_LEVEL_NORMAL
1962 || debug_info_level == DINFO_LEVEL_VERBOSE
1963 || write_symbols == DWARF2_DEBUG
1964 || write_symbols == VMS_AND_DWARF2_DEBUG
1965 || write_symbols == VMS_DEBUG)
1967 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
1971 /* End of a symbol-block. */
1973 gcc_assert (block_depth >= 0);
1975 if (!DECL_IGNORED_P (current_function_decl))
1976 debug_hooks->end_block (high_block_linenum, n);
1978 if (write_symbols == DBX_DEBUG
1979 || write_symbols == SDB_DEBUG)
1981 tree outer_block = BLOCK_SUPERCONTEXT (NOTE_BLOCK (insn));
1982 location_t *locus_ptr
1983 = block_nonartificial_location (outer_block);
1985 if (locus_ptr != NULL)
1987 override_filename = LOCATION_FILE (*locus_ptr);
1988 override_linenum = LOCATION_LINE (*locus_ptr);
1992 override_filename = NULL;
1993 override_linenum = 0;
1998 case NOTE_INSN_DELETED_LABEL:
1999 /* Emit the label. We may have deleted the CODE_LABEL because
2000 the label could be proved to be unreachable, though still
2001 referenced (in the form of having its address taken. */
2002 ASM_OUTPUT_DEBUG_LABEL (file, "L", CODE_LABEL_NUMBER (insn));
2005 case NOTE_INSN_VAR_LOCATION:
2006 if (!DECL_IGNORED_P (current_function_decl))
2007 debug_hooks->var_location (insn);
2017 #if defined (DWARF2_UNWIND_INFO)
2018 if (dwarf2out_do_frame ())
2019 dwarf2out_frame_debug (insn, false);
2024 /* The target port might emit labels in the output function for
2025 some insn, e.g. sh.c output_branchy_insn. */
2026 if (CODE_LABEL_NUMBER (insn) <= max_labelno)
2028 int align = LABEL_TO_ALIGNMENT (insn);
2029 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2030 int max_skip = LABEL_TO_MAX_SKIP (insn);
2033 if (align && NEXT_INSN (insn))
2035 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2036 ASM_OUTPUT_MAX_SKIP_ALIGN (file, align, max_skip);
2038 #ifdef ASM_OUTPUT_ALIGN_WITH_NOP
2039 ASM_OUTPUT_ALIGN_WITH_NOP (file, align);
2041 ASM_OUTPUT_ALIGN (file, align);
2050 if (!DECL_IGNORED_P (current_function_decl) && LABEL_NAME (insn))
2051 debug_hooks->label (insn);
2055 next = next_nonnote_insn (insn);
2056 /* If this label is followed by a jump-table, make sure we put
2057 the label in the read-only section. Also possibly write the
2058 label and jump table together. */
2059 if (next != 0 && JUMP_TABLE_DATA_P (next))
2061 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2062 /* In this case, the case vector is being moved by the
2063 target, so don't output the label at all. Leave that
2064 to the back end macros. */
2066 if (! JUMP_TABLES_IN_TEXT_SECTION)
2070 switch_to_section (targetm.asm_out.function_rodata_section
2071 (current_function_decl));
2073 #ifdef ADDR_VEC_ALIGN
2074 log_align = ADDR_VEC_ALIGN (next);
2076 log_align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT);
2078 ASM_OUTPUT_ALIGN (file, log_align);
2081 switch_to_section (current_function_section ());
2083 #ifdef ASM_OUTPUT_CASE_LABEL
2084 ASM_OUTPUT_CASE_LABEL (file, "L", CODE_LABEL_NUMBER (insn),
2087 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn));
2092 if (LABEL_ALT_ENTRY_P (insn))
2093 output_alternate_entry_point (file, insn);
2095 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn));
2100 rtx body = PATTERN (insn);
2101 int insn_code_number;
2105 #ifdef HAVE_conditional_execution
2106 /* Reset this early so it is correct for ASM statements. */
2107 current_insn_predicate = NULL_RTX;
2109 /* An INSN, JUMP_INSN or CALL_INSN.
2110 First check for special kinds that recog doesn't recognize. */
2112 if (GET_CODE (body) == USE /* These are just declarations. */
2113 || GET_CODE (body) == CLOBBER)
2118 /* If there is a REG_CC_SETTER note on this insn, it means that
2119 the setting of the condition code was done in the delay slot
2120 of the insn that branched here. So recover the cc status
2121 from the insn that set it. */
2123 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2126 NOTICE_UPDATE_CC (PATTERN (XEXP (note, 0)), XEXP (note, 0));
2127 cc_prev_status = cc_status;
2132 /* Detect insns that are really jump-tables
2133 and output them as such. */
2135 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
2137 #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC))
2141 if (! JUMP_TABLES_IN_TEXT_SECTION)
2142 switch_to_section (targetm.asm_out.function_rodata_section
2143 (current_function_decl));
2145 switch_to_section (current_function_section ());
2149 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2150 if (GET_CODE (body) == ADDR_VEC)
2152 #ifdef ASM_OUTPUT_ADDR_VEC
2153 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn), body);
2160 #ifdef ASM_OUTPUT_ADDR_DIFF_VEC
2161 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn), body);
2167 vlen = XVECLEN (body, GET_CODE (body) == ADDR_DIFF_VEC);
2168 for (idx = 0; idx < vlen; idx++)
2170 if (GET_CODE (body) == ADDR_VEC)
2172 #ifdef ASM_OUTPUT_ADDR_VEC_ELT
2173 ASM_OUTPUT_ADDR_VEC_ELT
2174 (file, CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 0, idx), 0)));
2181 #ifdef ASM_OUTPUT_ADDR_DIFF_ELT
2182 ASM_OUTPUT_ADDR_DIFF_ELT
2185 CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 1, idx), 0)),
2186 CODE_LABEL_NUMBER (XEXP (XEXP (body, 0), 0)));
2192 #ifdef ASM_OUTPUT_CASE_END
2193 ASM_OUTPUT_CASE_END (file,
2194 CODE_LABEL_NUMBER (PREV_INSN (insn)),
2199 switch_to_section (current_function_section ());
2203 /* Output this line note if it is the first or the last line
2205 if (!DECL_IGNORED_P (current_function_decl)
2206 && notice_source_line (insn, &is_stmt))
2207 (*debug_hooks->source_line) (last_linenum, last_filename,
2208 last_discriminator, is_stmt);
2210 if (GET_CODE (body) == ASM_INPUT)
2212 const char *string = XSTR (body, 0);
2214 /* There's no telling what that did to the condition codes. */
2219 expanded_location loc;
2222 loc = expand_location (ASM_INPUT_SOURCE_LOCATION (body));
2223 if (*loc.file && loc.line)
2224 fprintf (asm_out_file, "%s %i \"%s\" 1\n",
2225 ASM_COMMENT_START, loc.line, loc.file);
2226 fprintf (asm_out_file, "\t%s\n", string);
2227 #if HAVE_AS_LINE_ZERO
2228 if (*loc.file && loc.line)
2229 fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START);
2235 /* Detect `asm' construct with operands. */
2236 if (asm_noperands (body) >= 0)
2238 unsigned int noperands = asm_noperands (body);
2239 rtx *ops = XALLOCAVEC (rtx, noperands);
2242 expanded_location expanded;
2244 /* There's no telling what that did to the condition codes. */
2247 /* Get out the operand values. */
2248 string = decode_asm_operands (body, ops, NULL, NULL, NULL, &loc);
2249 /* Inhibit dying on what would otherwise be compiler bugs. */
2250 insn_noperands = noperands;
2251 this_is_asm_operands = insn;
2252 expanded = expand_location (loc);
2254 #ifdef FINAL_PRESCAN_INSN
2255 FINAL_PRESCAN_INSN (insn, ops, insn_noperands);
2258 /* Output the insn using them. */
2262 if (expanded.file && expanded.line)
2263 fprintf (asm_out_file, "%s %i \"%s\" 1\n",
2264 ASM_COMMENT_START, expanded.line, expanded.file);
2265 output_asm_insn (string, ops);
2266 #if HAVE_AS_LINE_ZERO
2267 if (expanded.file && expanded.line)
2268 fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START);
2272 if (targetm.asm_out.final_postscan_insn)
2273 targetm.asm_out.final_postscan_insn (file, insn, ops,
2276 this_is_asm_operands = 0;
2282 if (GET_CODE (body) == SEQUENCE)
2284 /* A delayed-branch sequence */
2287 final_sequence = body;
2289 /* Record the delay slots' frame information before the branch.
2290 This is needed for delayed calls: see execute_cfa_program(). */
2291 #if defined (DWARF2_UNWIND_INFO)
2292 if (dwarf2out_do_frame ())
2293 for (i = 1; i < XVECLEN (body, 0); i++)
2294 dwarf2out_frame_debug (XVECEXP (body, 0, i), false);
2297 /* The first insn in this SEQUENCE might be a JUMP_INSN that will
2298 force the restoration of a comparison that was previously
2299 thought unnecessary. If that happens, cancel this sequence
2300 and cause that insn to be restored. */
2302 next = final_scan_insn (XVECEXP (body, 0, 0), file, 0, 1, seen);
2303 if (next != XVECEXP (body, 0, 1))
2309 for (i = 1; i < XVECLEN (body, 0); i++)
2311 rtx insn = XVECEXP (body, 0, i);
2312 rtx next = NEXT_INSN (insn);
2313 /* We loop in case any instruction in a delay slot gets
2316 insn = final_scan_insn (insn, file, 0, 1, seen);
2317 while (insn != next);
2319 #ifdef DBR_OUTPUT_SEQEND
2320 DBR_OUTPUT_SEQEND (file);
2324 /* If the insn requiring the delay slot was a CALL_INSN, the
2325 insns in the delay slot are actually executed before the
2326 called function. Hence we don't preserve any CC-setting
2327 actions in these insns and the CC must be marked as being
2328 clobbered by the function. */
2329 if (CALL_P (XVECEXP (body, 0, 0)))
2336 /* We have a real machine instruction as rtl. */
2338 body = PATTERN (insn);
2341 set = single_set (insn);
2343 /* Check for redundant test and compare instructions
2344 (when the condition codes are already set up as desired).
2345 This is done only when optimizing; if not optimizing,
2346 it should be possible for the user to alter a variable
2347 with the debugger in between statements
2348 and the next statement should reexamine the variable
2349 to compute the condition codes. */
2354 && GET_CODE (SET_DEST (set)) == CC0
2355 && insn != last_ignored_compare)
2358 if (GET_CODE (SET_SRC (set)) == SUBREG)
2359 SET_SRC (set) = alter_subreg (&SET_SRC (set));
2361 src1 = SET_SRC (set);
2363 if (GET_CODE (SET_SRC (set)) == COMPARE)
2365 if (GET_CODE (XEXP (SET_SRC (set), 0)) == SUBREG)
2366 XEXP (SET_SRC (set), 0)
2367 = alter_subreg (&XEXP (SET_SRC (set), 0));
2368 if (GET_CODE (XEXP (SET_SRC (set), 1)) == SUBREG)
2369 XEXP (SET_SRC (set), 1)
2370 = alter_subreg (&XEXP (SET_SRC (set), 1));
2371 if (XEXP (SET_SRC (set), 1)
2372 == CONST0_RTX (GET_MODE (XEXP (SET_SRC (set), 0))))
2373 src2 = XEXP (SET_SRC (set), 0);
2375 if ((cc_status.value1 != 0
2376 && rtx_equal_p (src1, cc_status.value1))
2377 || (cc_status.value2 != 0
2378 && rtx_equal_p (src1, cc_status.value2))
2379 || (src2 != 0 && cc_status.value1 != 0
2380 && rtx_equal_p (src2, cc_status.value1))
2381 || (src2 != 0 && cc_status.value2 != 0
2382 && rtx_equal_p (src2, cc_status.value2)))
2384 /* Don't delete insn if it has an addressing side-effect. */
2385 if (! FIND_REG_INC_NOTE (insn, NULL_RTX)
2386 /* or if anything in it is volatile. */
2387 && ! volatile_refs_p (PATTERN (insn)))
2389 /* We don't really delete the insn; just ignore it. */
2390 last_ignored_compare = insn;
2397 /* If this is a conditional branch, maybe modify it
2398 if the cc's are in a nonstandard state
2399 so that it accomplishes the same thing that it would
2400 do straightforwardly if the cc's were set up normally. */
2402 if (cc_status.flags != 0
2404 && GET_CODE (body) == SET
2405 && SET_DEST (body) == pc_rtx
2406 && GET_CODE (SET_SRC (body)) == IF_THEN_ELSE
2407 && COMPARISON_P (XEXP (SET_SRC (body), 0))
2408 && XEXP (XEXP (SET_SRC (body), 0), 0) == cc0_rtx)
2410 /* This function may alter the contents of its argument
2411 and clear some of the cc_status.flags bits.
2412 It may also return 1 meaning condition now always true
2413 or -1 meaning condition now always false
2414 or 2 meaning condition nontrivial but altered. */
2415 int result = alter_cond (XEXP (SET_SRC (body), 0));
2416 /* If condition now has fixed value, replace the IF_THEN_ELSE
2417 with its then-operand or its else-operand. */
2419 SET_SRC (body) = XEXP (SET_SRC (body), 1);
2421 SET_SRC (body) = XEXP (SET_SRC (body), 2);
2423 /* The jump is now either unconditional or a no-op.
2424 If it has become a no-op, don't try to output it.
2425 (It would not be recognized.) */
2426 if (SET_SRC (body) == pc_rtx)
2431 else if (GET_CODE (SET_SRC (body)) == RETURN)
2432 /* Replace (set (pc) (return)) with (return). */
2433 PATTERN (insn) = body = SET_SRC (body);
2435 /* Rerecognize the instruction if it has changed. */
2437 INSN_CODE (insn) = -1;
2440 /* If this is a conditional trap, maybe modify it if the cc's
2441 are in a nonstandard state so that it accomplishes the same
2442 thing that it would do straightforwardly if the cc's were
2444 if (cc_status.flags != 0
2445 && NONJUMP_INSN_P (insn)
2446 && GET_CODE (body) == TRAP_IF
2447 && COMPARISON_P (TRAP_CONDITION (body))
2448 && XEXP (TRAP_CONDITION (body), 0) == cc0_rtx)
2450 /* This function may alter the contents of its argument
2451 and clear some of the cc_status.flags bits.
2452 It may also return 1 meaning condition now always true
2453 or -1 meaning condition now always false
2454 or 2 meaning condition nontrivial but altered. */
2455 int result = alter_cond (TRAP_CONDITION (body));
2457 /* If TRAP_CONDITION has become always false, delete the
2465 /* If TRAP_CONDITION has become always true, replace
2466 TRAP_CONDITION with const_true_rtx. */
2468 TRAP_CONDITION (body) = const_true_rtx;
2470 /* Rerecognize the instruction if it has changed. */
2472 INSN_CODE (insn) = -1;
2475 /* Make same adjustments to instructions that examine the
2476 condition codes without jumping and instructions that
2477 handle conditional moves (if this machine has either one). */
2479 if (cc_status.flags != 0
2482 rtx cond_rtx, then_rtx, else_rtx;
2485 && GET_CODE (SET_SRC (set)) == IF_THEN_ELSE)
2487 cond_rtx = XEXP (SET_SRC (set), 0);
2488 then_rtx = XEXP (SET_SRC (set), 1);
2489 else_rtx = XEXP (SET_SRC (set), 2);
2493 cond_rtx = SET_SRC (set);
2494 then_rtx = const_true_rtx;
2495 else_rtx = const0_rtx;
2498 switch (GET_CODE (cond_rtx))
2512 if (XEXP (cond_rtx, 0) != cc0_rtx)
2514 result = alter_cond (cond_rtx);
2516 validate_change (insn, &SET_SRC (set), then_rtx, 0);
2517 else if (result == -1)
2518 validate_change (insn, &SET_SRC (set), else_rtx, 0);
2519 else if (result == 2)
2520 INSN_CODE (insn) = -1;
2521 if (SET_DEST (set) == SET_SRC (set))
2533 #ifdef HAVE_peephole
2534 /* Do machine-specific peephole optimizations if desired. */
2536 if (optimize && !flag_no_peephole && !nopeepholes)
2538 rtx next = peephole (insn);
2539 /* When peepholing, if there were notes within the peephole,
2540 emit them before the peephole. */
2541 if (next != 0 && next != NEXT_INSN (insn))
2543 rtx note, prev = PREV_INSN (insn);
2545 for (note = NEXT_INSN (insn); note != next;
2546 note = NEXT_INSN (note))
2547 final_scan_insn (note, file, optimize, nopeepholes, seen);
2549 /* Put the notes in the proper position for a later
2550 rescan. For example, the SH target can do this
2551 when generating a far jump in a delayed branch
2553 note = NEXT_INSN (insn);
2554 PREV_INSN (note) = prev;
2555 NEXT_INSN (prev) = note;
2556 NEXT_INSN (PREV_INSN (next)) = insn;
2557 PREV_INSN (insn) = PREV_INSN (next);
2558 NEXT_INSN (insn) = next;
2559 PREV_INSN (next) = insn;
2562 /* PEEPHOLE might have changed this. */
2563 body = PATTERN (insn);
2567 /* Try to recognize the instruction.
2568 If successful, verify that the operands satisfy the
2569 constraints for the instruction. Crash if they don't,
2570 since `reload' should have changed them so that they do. */
2572 insn_code_number = recog_memoized (insn);
2573 cleanup_subreg_operands (insn);
2575 /* Dump the insn in the assembly for debugging. */
2576 if (flag_dump_rtl_in_asm)
2578 print_rtx_head = ASM_COMMENT_START;
2579 print_rtl_single (asm_out_file, insn);
2580 print_rtx_head = "";
2583 if (! constrain_operands_cached (1))
2584 fatal_insn_not_found (insn);
2586 /* Some target machines need to prescan each insn before
2589 #ifdef FINAL_PRESCAN_INSN
2590 FINAL_PRESCAN_INSN (insn, recog_data.operand, recog_data.n_operands);
2593 #ifdef HAVE_conditional_execution
2594 if (GET_CODE (PATTERN (insn)) == COND_EXEC)
2595 current_insn_predicate = COND_EXEC_TEST (PATTERN (insn));
2599 cc_prev_status = cc_status;
2601 /* Update `cc_status' for this instruction.
2602 The instruction's output routine may change it further.
2603 If the output routine for a jump insn needs to depend
2604 on the cc status, it should look at cc_prev_status. */
2606 NOTICE_UPDATE_CC (body, insn);
2609 current_output_insn = debug_insn = insn;
2611 #if defined (DWARF2_UNWIND_INFO)
2612 if (CALL_P (insn) && dwarf2out_do_frame ())
2613 dwarf2out_frame_debug (insn, false);
2616 /* Find the proper template for this insn. */
2617 templ = get_insn_template (insn_code_number, insn);
2619 /* If the C code returns 0, it means that it is a jump insn
2620 which follows a deleted test insn, and that test insn
2621 needs to be reinserted. */
2626 gcc_assert (prev_nonnote_insn (insn) == last_ignored_compare);
2628 /* We have already processed the notes between the setter and
2629 the user. Make sure we don't process them again, this is
2630 particularly important if one of the notes is a block
2631 scope note or an EH note. */
2633 prev != last_ignored_compare;
2634 prev = PREV_INSN (prev))
2637 delete_insn (prev); /* Use delete_note. */
2643 /* If the template is the string "#", it means that this insn must
2645 if (templ[0] == '#' && templ[1] == '\0')
2647 rtx new_rtx = try_split (body, insn, 0);
2649 /* If we didn't split the insn, go away. */
2650 if (new_rtx == insn && PATTERN (new_rtx) == body)
2651 fatal_insn ("could not split insn", insn);
2653 #ifdef HAVE_ATTR_length
2654 /* This instruction should have been split in shorten_branches,
2655 to ensure that we would have valid length info for the
2663 #ifdef TARGET_UNWIND_INFO
2664 /* ??? This will put the directives in the wrong place if
2665 get_insn_template outputs assembly directly. However calling it
2666 before get_insn_template breaks if the insns is split. */
2667 targetm.asm_out.unwind_emit (asm_out_file, insn);
2672 rtx x = call_from_call_insn (insn);
2674 if (x && MEM_P (x) && GET_CODE (XEXP (x, 0)) == SYMBOL_REF)
2678 t = SYMBOL_REF_DECL (x);
2680 assemble_external (t);
2684 /* Output assembler code from the template. */
2685 output_asm_insn (templ, recog_data.operand);
2687 /* Record point-of-call information for ICF debugging. */
2688 if (flag_enable_icf_debug && CALL_P (insn))
2690 rtx x = call_from_call_insn (insn);
2694 if (GET_CODE (XEXP (x, 0)) == SYMBOL_REF)
2698 t = SYMBOL_REF_DECL (x);
2700 (*debug_hooks->direct_call) (t);
2703 (*debug_hooks->virtual_call) (INSN_UID (insn));
2707 /* Some target machines need to postscan each insn after
2709 if (targetm.asm_out.final_postscan_insn)
2710 targetm.asm_out.final_postscan_insn (file, insn, recog_data.operand,
2711 recog_data.n_operands);
2713 /* If necessary, report the effect that the instruction has on
2714 the unwind info. We've already done this for delay slots
2715 and call instructions. */
2716 #if defined (DWARF2_UNWIND_INFO)
2717 if (final_sequence == 0
2718 #if !defined (HAVE_prologue)
2719 && !ACCUMULATE_OUTGOING_ARGS
2721 && dwarf2out_do_frame ())
2722 dwarf2out_frame_debug (insn, true);
2725 current_output_insn = debug_insn = 0;
2728 return NEXT_INSN (insn);
2731 /* Return whether a source line note needs to be emitted before INSN.
2732 Sets IS_STMT to TRUE if the line should be marked as a possible
2733 breakpoint location. */
2736 notice_source_line (rtx insn, bool *is_stmt)
2738 const char *filename;
2741 if (override_filename)
2743 filename = override_filename;
2744 linenum = override_linenum;
2748 filename = insn_file (insn);
2749 linenum = insn_line (insn);
2752 if (filename == NULL)
2755 if (force_source_line
2756 || filename != last_filename
2757 || last_linenum != linenum)
2759 force_source_line = false;
2760 last_filename = filename;
2761 last_linenum = linenum;
2762 last_discriminator = discriminator;
2764 high_block_linenum = MAX (last_linenum, high_block_linenum);
2765 high_function_linenum = MAX (last_linenum, high_function_linenum);
2769 if (SUPPORTS_DISCRIMINATOR && last_discriminator != discriminator)
2771 /* If the discriminator changed, but the line number did not,
2772 output the line table entry with is_stmt false so the
2773 debugger does not treat this as a breakpoint location. */
2774 last_discriminator = discriminator;
2782 /* For each operand in INSN, simplify (subreg (reg)) so that it refers
2783 directly to the desired hard register. */
2786 cleanup_subreg_operands (rtx insn)
2789 bool changed = false;
2790 extract_insn_cached (insn);
2791 for (i = 0; i < recog_data.n_operands; i++)
2793 /* The following test cannot use recog_data.operand when testing
2794 for a SUBREG: the underlying object might have been changed
2795 already if we are inside a match_operator expression that
2796 matches the else clause. Instead we test the underlying
2797 expression directly. */
2798 if (GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
2800 recog_data.operand[i] = alter_subreg (recog_data.operand_loc[i]);
2803 else if (GET_CODE (recog_data.operand[i]) == PLUS
2804 || GET_CODE (recog_data.operand[i]) == MULT
2805 || MEM_P (recog_data.operand[i]))
2806 recog_data.operand[i] = walk_alter_subreg (recog_data.operand_loc[i], &changed);
2809 for (i = 0; i < recog_data.n_dups; i++)
2811 if (GET_CODE (*recog_data.dup_loc[i]) == SUBREG)
2813 *recog_data.dup_loc[i] = alter_subreg (recog_data.dup_loc[i]);
2816 else if (GET_CODE (*recog_data.dup_loc[i]) == PLUS
2817 || GET_CODE (*recog_data.dup_loc[i]) == MULT
2818 || MEM_P (*recog_data.dup_loc[i]))
2819 *recog_data.dup_loc[i] = walk_alter_subreg (recog_data.dup_loc[i], &changed);
2822 df_insn_rescan (insn);
2825 /* If X is a SUBREG, replace it with a REG or a MEM,
2826 based on the thing it is a subreg of. */
2829 alter_subreg (rtx *xp)
2832 rtx y = SUBREG_REG (x);
2834 /* simplify_subreg does not remove subreg from volatile references.
2835 We are required to. */
2838 int offset = SUBREG_BYTE (x);
2840 /* For paradoxical subregs on big-endian machines, SUBREG_BYTE
2841 contains 0 instead of the proper offset. See simplify_subreg. */
2843 && GET_MODE_SIZE (GET_MODE (y)) < GET_MODE_SIZE (GET_MODE (x)))
2845 int difference = GET_MODE_SIZE (GET_MODE (y))
2846 - GET_MODE_SIZE (GET_MODE (x));
2847 if (WORDS_BIG_ENDIAN)
2848 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
2849 if (BYTES_BIG_ENDIAN)
2850 offset += difference % UNITS_PER_WORD;
2853 *xp = adjust_address (y, GET_MODE (x), offset);
2857 rtx new_rtx = simplify_subreg (GET_MODE (x), y, GET_MODE (y),
2864 /* Simplify_subreg can't handle some REG cases, but we have to. */
2866 HOST_WIDE_INT offset;
2868 regno = subreg_regno (x);
2869 if (subreg_lowpart_p (x))
2870 offset = byte_lowpart_offset (GET_MODE (x), GET_MODE (y));
2872 offset = SUBREG_BYTE (x);
2873 *xp = gen_rtx_REG_offset (y, GET_MODE (x), regno, offset);
2880 /* Do alter_subreg on all the SUBREGs contained in X. */
2883 walk_alter_subreg (rtx *xp, bool *changed)
2886 switch (GET_CODE (x))
2891 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed);
2892 XEXP (x, 1) = walk_alter_subreg (&XEXP (x, 1), changed);
2897 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed);
2902 return alter_subreg (xp);
2913 /* Given BODY, the body of a jump instruction, alter the jump condition
2914 as required by the bits that are set in cc_status.flags.
2915 Not all of the bits there can be handled at this level in all cases.
2917 The value is normally 0.
2918 1 means that the condition has become always true.
2919 -1 means that the condition has become always false.
2920 2 means that COND has been altered. */
2923 alter_cond (rtx cond)
2927 if (cc_status.flags & CC_REVERSED)
2930 PUT_CODE (cond, swap_condition (GET_CODE (cond)));
2933 if (cc_status.flags & CC_INVERTED)
2936 PUT_CODE (cond, reverse_condition (GET_CODE (cond)));
2939 if (cc_status.flags & CC_NOT_POSITIVE)
2940 switch (GET_CODE (cond))
2945 /* Jump becomes unconditional. */
2951 /* Jump becomes no-op. */
2955 PUT_CODE (cond, EQ);
2960 PUT_CODE (cond, NE);
2968 if (cc_status.flags & CC_NOT_NEGATIVE)
2969 switch (GET_CODE (cond))
2973 /* Jump becomes unconditional. */
2978 /* Jump becomes no-op. */
2983 PUT_CODE (cond, EQ);
2989 PUT_CODE (cond, NE);
2997 if (cc_status.flags & CC_NO_OVERFLOW)
2998 switch (GET_CODE (cond))
3001 /* Jump becomes unconditional. */
3005 PUT_CODE (cond, EQ);
3010 PUT_CODE (cond, NE);
3015 /* Jump becomes no-op. */
3022 if (cc_status.flags & (CC_Z_IN_NOT_N | CC_Z_IN_N))
3023 switch (GET_CODE (cond))
3029 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? GE : LT);
3034 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? LT : GE);
3039 if (cc_status.flags & CC_NOT_SIGNED)
3040 /* The flags are valid if signed condition operators are converted
3042 switch (GET_CODE (cond))
3045 PUT_CODE (cond, LEU);
3050 PUT_CODE (cond, LTU);
3055 PUT_CODE (cond, GTU);
3060 PUT_CODE (cond, GEU);
3072 /* Report inconsistency between the assembler template and the operands.
3073 In an `asm', it's the user's fault; otherwise, the compiler's fault. */
3076 output_operand_lossage (const char *cmsgid, ...)
3080 const char *pfx_str;
3083 va_start (ap, cmsgid);
3085 pfx_str = this_is_asm_operands ? _("invalid 'asm': ") : "output_operand: ";
3086 asprintf (&fmt_string, "%s%s", pfx_str, _(cmsgid));
3087 vasprintf (&new_message, fmt_string, ap);
3089 if (this_is_asm_operands)
3090 error_for_asm (this_is_asm_operands, "%s", new_message);
3092 internal_error ("%s", new_message);
3099 /* Output of assembler code from a template, and its subroutines. */
3101 /* Annotate the assembly with a comment describing the pattern and
3102 alternative used. */
3105 output_asm_name (void)
3109 int num = INSN_CODE (debug_insn);
3110 fprintf (asm_out_file, "\t%s %d\t%s",
3111 ASM_COMMENT_START, INSN_UID (debug_insn),
3112 insn_data[num].name);
3113 if (insn_data[num].n_alternatives > 1)
3114 fprintf (asm_out_file, "/%d", which_alternative + 1);
3115 #ifdef HAVE_ATTR_length
3116 fprintf (asm_out_file, "\t[length = %d]",
3117 get_attr_length (debug_insn));
3119 /* Clear this so only the first assembler insn
3120 of any rtl insn will get the special comment for -dp. */
3125 /* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it
3126 or its address, return that expr . Set *PADDRESSP to 1 if the expr
3127 corresponds to the address of the object and 0 if to the object. */
3130 get_mem_expr_from_op (rtx op, int *paddressp)
3138 return REG_EXPR (op);
3139 else if (!MEM_P (op))
3142 if (MEM_EXPR (op) != 0)
3143 return MEM_EXPR (op);
3145 /* Otherwise we have an address, so indicate it and look at the address. */
3149 /* First check if we have a decl for the address, then look at the right side
3150 if it is a PLUS. Otherwise, strip off arithmetic and keep looking.
3151 But don't allow the address to itself be indirect. */
3152 if ((expr = get_mem_expr_from_op (op, &inner_addressp)) && ! inner_addressp)
3154 else if (GET_CODE (op) == PLUS
3155 && (expr = get_mem_expr_from_op (XEXP (op, 1), &inner_addressp)))
3159 || GET_RTX_CLASS (GET_CODE (op)) == RTX_BIN_ARITH)
3162 expr = get_mem_expr_from_op (op, &inner_addressp);
3163 return inner_addressp ? 0 : expr;
3166 /* Output operand names for assembler instructions. OPERANDS is the
3167 operand vector, OPORDER is the order to write the operands, and NOPS
3168 is the number of operands to write. */
3171 output_asm_operand_names (rtx *operands, int *oporder, int nops)
3176 for (i = 0; i < nops; i++)
3179 rtx op = operands[oporder[i]];
3180 tree expr = get_mem_expr_from_op (op, &addressp);
3182 fprintf (asm_out_file, "%c%s",
3183 wrote ? ',' : '\t', wrote ? "" : ASM_COMMENT_START);
3187 fprintf (asm_out_file, "%s",
3188 addressp ? "*" : "");
3189 print_mem_expr (asm_out_file, expr);
3192 else if (REG_P (op) && ORIGINAL_REGNO (op)
3193 && ORIGINAL_REGNO (op) != REGNO (op))
3194 fprintf (asm_out_file, " tmp%i", ORIGINAL_REGNO (op));
3198 /* Output text from TEMPLATE to the assembler output file,
3199 obeying %-directions to substitute operands taken from
3200 the vector OPERANDS.
3202 %N (for N a digit) means print operand N in usual manner.
3203 %lN means require operand N to be a CODE_LABEL or LABEL_REF
3204 and print the label name with no punctuation.
3205 %cN means require operand N to be a constant
3206 and print the constant expression with no punctuation.
3207 %aN means expect operand N to be a memory address
3208 (not a memory reference!) and print a reference
3210 %nN means expect operand N to be a constant
3211 and print a constant expression for minus the value
3212 of the operand, with no other punctuation. */
3215 output_asm_insn (const char *templ, rtx *operands)
3219 #ifdef ASSEMBLER_DIALECT
3222 int oporder[MAX_RECOG_OPERANDS];
3223 char opoutput[MAX_RECOG_OPERANDS];
3226 /* An insn may return a null string template
3227 in a case where no assembler code is needed. */
3231 memset (opoutput, 0, sizeof opoutput);
3233 putc ('\t', asm_out_file);
3235 #ifdef ASM_OUTPUT_OPCODE
3236 ASM_OUTPUT_OPCODE (asm_out_file, p);
3243 if (flag_verbose_asm)
3244 output_asm_operand_names (operands, oporder, ops);
3245 if (flag_print_asm_name)
3249 memset (opoutput, 0, sizeof opoutput);
3251 putc (c, asm_out_file);
3252 #ifdef ASM_OUTPUT_OPCODE
3253 while ((c = *p) == '\t')
3255 putc (c, asm_out_file);
3258 ASM_OUTPUT_OPCODE (asm_out_file, p);
3262 #ifdef ASSEMBLER_DIALECT
3268 output_operand_lossage ("nested assembly dialect alternatives");
3272 /* If we want the first dialect, do nothing. Otherwise, skip
3273 DIALECT_NUMBER of strings ending with '|'. */
3274 for (i = 0; i < dialect_number; i++)
3276 while (*p && *p != '}' && *p++ != '|')
3285 output_operand_lossage ("unterminated assembly dialect alternative");
3292 /* Skip to close brace. */
3297 output_operand_lossage ("unterminated assembly dialect alternative");
3301 while (*p++ != '}');
3305 putc (c, asm_out_file);
3310 putc (c, asm_out_file);
3316 /* %% outputs a single %. */
3320 putc (c, asm_out_file);
3322 /* %= outputs a number which is unique to each insn in the entire
3323 compilation. This is useful for making local labels that are
3324 referred to more than once in a given insn. */
3328 fprintf (asm_out_file, "%d", insn_counter);
3330 /* % followed by a letter and some digits
3331 outputs an operand in a special way depending on the letter.
3332 Letters `acln' are implemented directly.
3333 Other letters are passed to `output_operand' so that
3334 the PRINT_OPERAND macro can define them. */
3335 else if (ISALPHA (*p))
3338 unsigned long opnum;
3341 opnum = strtoul (p, &endptr, 10);
3344 output_operand_lossage ("operand number missing "
3346 else if (this_is_asm_operands && opnum >= insn_noperands)
3347 output_operand_lossage ("operand number out of range");
3348 else if (letter == 'l')
3349 output_asm_label (operands[opnum]);
3350 else if (letter == 'a')
3351 output_address (operands[opnum]);
3352 else if (letter == 'c')
3354 if (CONSTANT_ADDRESS_P (operands[opnum]))
3355 output_addr_const (asm_out_file, operands[opnum]);
3357 output_operand (operands[opnum], 'c');
3359 else if (letter == 'n')
3361 if (CONST_INT_P (operands[opnum]))
3362 fprintf (asm_out_file, HOST_WIDE_INT_PRINT_DEC,
3363 - INTVAL (operands[opnum]));
3366 putc ('-', asm_out_file);
3367 output_addr_const (asm_out_file, operands[opnum]);
3371 output_operand (operands[opnum], letter);
3373 if (!opoutput[opnum])
3374 oporder[ops++] = opnum;
3375 opoutput[opnum] = 1;
3380 /* % followed by a digit outputs an operand the default way. */
3381 else if (ISDIGIT (*p))
3383 unsigned long opnum;
3386 opnum = strtoul (p, &endptr, 10);
3387 if (this_is_asm_operands && opnum >= insn_noperands)
3388 output_operand_lossage ("operand number out of range");
3390 output_operand (operands[opnum], 0);
3392 if (!opoutput[opnum])
3393 oporder[ops++] = opnum;
3394 opoutput[opnum] = 1;
3399 /* % followed by punctuation: output something for that
3400 punctuation character alone, with no operand.
3401 The PRINT_OPERAND macro decides what is actually done. */
3402 #ifdef PRINT_OPERAND_PUNCT_VALID_P
3403 else if (PRINT_OPERAND_PUNCT_VALID_P ((unsigned char) *p))
3404 output_operand (NULL_RTX, *p++);
3407 output_operand_lossage ("invalid %%-code");
3411 putc (c, asm_out_file);
3414 /* Write out the variable names for operands, if we know them. */
3415 if (flag_verbose_asm)
3416 output_asm_operand_names (operands, oporder, ops);
3417 if (flag_print_asm_name)
3420 putc ('\n', asm_out_file);
3423 /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
3426 output_asm_label (rtx x)
3430 if (GET_CODE (x) == LABEL_REF)
3434 && NOTE_KIND (x) == NOTE_INSN_DELETED_LABEL))
3435 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3437 output_operand_lossage ("'%%l' operand isn't a label");
3439 assemble_name (asm_out_file, buf);
3442 /* Helper rtx-iteration-function for mark_symbol_refs_as_used and
3443 output_operand. Marks SYMBOL_REFs as referenced through use of
3444 assemble_external. */
3447 mark_symbol_ref_as_used (rtx *xp, void *dummy ATTRIBUTE_UNUSED)
3451 /* If we have a used symbol, we may have to emit assembly
3452 annotations corresponding to whether the symbol is external, weak
3453 or has non-default visibility. */
3454 if (GET_CODE (x) == SYMBOL_REF)
3458 t = SYMBOL_REF_DECL (x);
3460 assemble_external (t);
3468 /* Marks SYMBOL_REFs in x as referenced through use of assemble_external. */
3471 mark_symbol_refs_as_used (rtx x)
3473 for_each_rtx (&x, mark_symbol_ref_as_used, NULL);
3476 /* Print operand X using machine-dependent assembler syntax.
3477 The macro PRINT_OPERAND is defined just to control this function.
3478 CODE is a non-digit that preceded the operand-number in the % spec,
3479 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
3480 between the % and the digits.
3481 When CODE is a non-letter, X is 0.
3483 The meanings of the letters are machine-dependent and controlled
3484 by PRINT_OPERAND. */
3487 output_operand (rtx x, int code ATTRIBUTE_UNUSED)
3489 if (x && GET_CODE (x) == SUBREG)
3490 x = alter_subreg (&x);
3492 /* X must not be a pseudo reg. */
3493 gcc_assert (!x || !REG_P (x) || REGNO (x) < FIRST_PSEUDO_REGISTER);
3495 PRINT_OPERAND (asm_out_file, x, code);
3500 for_each_rtx (&x, mark_symbol_ref_as_used, NULL);
3503 /* Print a memory reference operand for address X
3504 using machine-dependent assembler syntax.
3505 The macro PRINT_OPERAND_ADDRESS exists just to control this function. */
3508 output_address (rtx x)
3510 bool changed = false;
3511 walk_alter_subreg (&x, &changed);
3512 PRINT_OPERAND_ADDRESS (asm_out_file, x);
3515 /* Print an integer constant expression in assembler syntax.
3516 Addition and subtraction are the only arithmetic
3517 that may appear in these expressions. */
3520 output_addr_const (FILE *file, rtx x)
3525 switch (GET_CODE (x))
3532 if (SYMBOL_REF_DECL (x))
3534 mark_decl_referenced (SYMBOL_REF_DECL (x));
3535 assemble_external (SYMBOL_REF_DECL (x));
3537 #ifdef ASM_OUTPUT_SYMBOL_REF
3538 ASM_OUTPUT_SYMBOL_REF (file, x);
3540 assemble_name (file, XSTR (x, 0));
3548 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3549 #ifdef ASM_OUTPUT_LABEL_REF
3550 ASM_OUTPUT_LABEL_REF (file, buf);
3552 assemble_name (file, buf);
3557 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x));
3561 /* This used to output parentheses around the expression,
3562 but that does not work on the 386 (either ATT or BSD assembler). */
3563 output_addr_const (file, XEXP (x, 0));
3567 if (GET_MODE (x) == VOIDmode)
3569 /* We can use %d if the number is one word and positive. */
3570 if (CONST_DOUBLE_HIGH (x))
3571 fprintf (file, HOST_WIDE_INT_PRINT_DOUBLE_HEX,
3572 (unsigned HOST_WIDE_INT) CONST_DOUBLE_HIGH (x),
3573 (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x));
3574 else if (CONST_DOUBLE_LOW (x) < 0)
3575 fprintf (file, HOST_WIDE_INT_PRINT_HEX,
3576 (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x));
3578 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x));
3581 /* We can't handle floating point constants;
3582 PRINT_OPERAND must handle them. */
3583 output_operand_lossage ("floating constant misused");
3587 fprintf (file, HOST_WIDE_INT_PRINT_HEX,
3588 (unsigned HOST_WIDE_INT) CONST_FIXED_VALUE_LOW (x));
3592 /* Some assemblers need integer constants to appear last (eg masm). */
3593 if (CONST_INT_P (XEXP (x, 0)))
3595 output_addr_const (file, XEXP (x, 1));
3596 if (INTVAL (XEXP (x, 0)) >= 0)
3597 fprintf (file, "+");
3598 output_addr_const (file, XEXP (x, 0));
3602 output_addr_const (file, XEXP (x, 0));
3603 if (!CONST_INT_P (XEXP (x, 1))
3604 || INTVAL (XEXP (x, 1)) >= 0)
3605 fprintf (file, "+");
3606 output_addr_const (file, XEXP (x, 1));
3611 /* Avoid outputting things like x-x or x+5-x,
3612 since some assemblers can't handle that. */
3613 x = simplify_subtraction (x);
3614 if (GET_CODE (x) != MINUS)
3617 output_addr_const (file, XEXP (x, 0));
3618 fprintf (file, "-");
3619 if ((CONST_INT_P (XEXP (x, 1)) && INTVAL (XEXP (x, 1)) >= 0)
3620 || GET_CODE (XEXP (x, 1)) == PC
3621 || GET_CODE (XEXP (x, 1)) == SYMBOL_REF)
3622 output_addr_const (file, XEXP (x, 1));
3625 fputs (targetm.asm_out.open_paren, file);
3626 output_addr_const (file, XEXP (x, 1));
3627 fputs (targetm.asm_out.close_paren, file);
3635 output_addr_const (file, XEXP (x, 0));
3639 #ifdef OUTPUT_ADDR_CONST_EXTRA
3640 OUTPUT_ADDR_CONST_EXTRA (file, x, fail);
3645 output_operand_lossage ("invalid expression as operand");
3649 /* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
3650 %R prints the value of REGISTER_PREFIX.
3651 %L prints the value of LOCAL_LABEL_PREFIX.
3652 %U prints the value of USER_LABEL_PREFIX.
3653 %I prints the value of IMMEDIATE_PREFIX.
3654 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
3655 Also supported are %d, %i, %u, %x, %X, %o, %c, %s and %%.
3657 We handle alternate assembler dialects here, just like output_asm_insn. */
3660 asm_fprintf (FILE *file, const char *p, ...)
3666 va_start (argptr, p);
3673 #ifdef ASSEMBLER_DIALECT
3678 /* If we want the first dialect, do nothing. Otherwise, skip
3679 DIALECT_NUMBER of strings ending with '|'. */
3680 for (i = 0; i < dialect_number; i++)
3682 while (*p && *p++ != '|')
3692 /* Skip to close brace. */
3693 while (*p && *p++ != '}')
3704 while (strchr ("-+ #0", c))
3709 while (ISDIGIT (c) || c == '.')
3720 case 'd': case 'i': case 'u':
3721 case 'x': case 'X': case 'o':
3725 fprintf (file, buf, va_arg (argptr, int));
3729 /* This is a prefix to the 'd', 'i', 'u', 'x', 'X', and
3730 'o' cases, but we do not check for those cases. It
3731 means that the value is a HOST_WIDE_INT, which may be
3732 either `long' or `long long'. */
3733 memcpy (q, HOST_WIDE_INT_PRINT, strlen (HOST_WIDE_INT_PRINT));
3734 q += strlen (HOST_WIDE_INT_PRINT);
3737 fprintf (file, buf, va_arg (argptr, HOST_WIDE_INT));
3742 #ifdef HAVE_LONG_LONG
3748 fprintf (file, buf, va_arg (argptr, long long));
3755 fprintf (file, buf, va_arg (argptr, long));
3763 fprintf (file, buf, va_arg (argptr, char *));
3767 #ifdef ASM_OUTPUT_OPCODE
3768 ASM_OUTPUT_OPCODE (asm_out_file, p);
3773 #ifdef REGISTER_PREFIX
3774 fprintf (file, "%s", REGISTER_PREFIX);
3779 #ifdef IMMEDIATE_PREFIX
3780 fprintf (file, "%s", IMMEDIATE_PREFIX);
3785 #ifdef LOCAL_LABEL_PREFIX
3786 fprintf (file, "%s", LOCAL_LABEL_PREFIX);
3791 fputs (user_label_prefix, file);
3794 #ifdef ASM_FPRINTF_EXTENSIONS
3795 /* Uppercase letters are reserved for general use by asm_fprintf
3796 and so are not available to target specific code. In order to
3797 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then,
3798 they are defined here. As they get turned into real extensions
3799 to asm_fprintf they should be removed from this list. */
3800 case 'A': case 'B': case 'C': case 'D': case 'E':
3801 case 'F': case 'G': case 'H': case 'J': case 'K':
3802 case 'M': case 'N': case 'P': case 'Q': case 'S':
3803 case 'T': case 'V': case 'W': case 'Y': case 'Z':
3806 ASM_FPRINTF_EXTENSIONS (file, argptr, p)
3819 /* Split up a CONST_DOUBLE or integer constant rtx
3820 into two rtx's for single words,
3821 storing in *FIRST the word that comes first in memory in the target
3822 and in *SECOND the other. */
3825 split_double (rtx value, rtx *first, rtx *second)
3827 if (CONST_INT_P (value))
3829 if (HOST_BITS_PER_WIDE_INT >= (2 * BITS_PER_WORD))
3831 /* In this case the CONST_INT holds both target words.
3832 Extract the bits from it into two word-sized pieces.
3833 Sign extend each half to HOST_WIDE_INT. */
3834 unsigned HOST_WIDE_INT low, high;
3835 unsigned HOST_WIDE_INT mask, sign_bit, sign_extend;
3837 /* Set sign_bit to the most significant bit of a word. */
3839 sign_bit <<= BITS_PER_WORD - 1;
3841 /* Set mask so that all bits of the word are set. We could
3842 have used 1 << BITS_PER_WORD instead of basing the
3843 calculation on sign_bit. However, on machines where
3844 HOST_BITS_PER_WIDE_INT == BITS_PER_WORD, it could cause a
3845 compiler warning, even though the code would never be
3847 mask = sign_bit << 1;
3850 /* Set sign_extend as any remaining bits. */
3851 sign_extend = ~mask;
3853 /* Pick the lower word and sign-extend it. */
3854 low = INTVAL (value);
3859 /* Pick the higher word, shifted to the least significant
3860 bits, and sign-extend it. */
3861 high = INTVAL (value);
3862 high >>= BITS_PER_WORD - 1;
3865 if (high & sign_bit)
3866 high |= sign_extend;
3868 /* Store the words in the target machine order. */
3869 if (WORDS_BIG_ENDIAN)
3871 *first = GEN_INT (high);
3872 *second = GEN_INT (low);
3876 *first = GEN_INT (low);
3877 *second = GEN_INT (high);
3882 /* The rule for using CONST_INT for a wider mode
3883 is that we regard the value as signed.
3884 So sign-extend it. */
3885 rtx high = (INTVAL (value) < 0 ? constm1_rtx : const0_rtx);
3886 if (WORDS_BIG_ENDIAN)
3898 else if (GET_CODE (value) != CONST_DOUBLE)
3900 if (WORDS_BIG_ENDIAN)
3902 *first = const0_rtx;
3908 *second = const0_rtx;
3911 else if (GET_MODE (value) == VOIDmode
3912 /* This is the old way we did CONST_DOUBLE integers. */
3913 || GET_MODE_CLASS (GET_MODE (value)) == MODE_INT)
3915 /* In an integer, the words are defined as most and least significant.
3916 So order them by the target's convention. */
3917 if (WORDS_BIG_ENDIAN)
3919 *first = GEN_INT (CONST_DOUBLE_HIGH (value));
3920 *second = GEN_INT (CONST_DOUBLE_LOW (value));
3924 *first = GEN_INT (CONST_DOUBLE_LOW (value));
3925 *second = GEN_INT (CONST_DOUBLE_HIGH (value));
3932 REAL_VALUE_FROM_CONST_DOUBLE (r, value);
3934 /* Note, this converts the REAL_VALUE_TYPE to the target's
3935 format, splits up the floating point double and outputs
3936 exactly 32 bits of it into each of l[0] and l[1] --
3937 not necessarily BITS_PER_WORD bits. */
3938 REAL_VALUE_TO_TARGET_DOUBLE (r, l);
3940 /* If 32 bits is an entire word for the target, but not for the host,
3941 then sign-extend on the host so that the number will look the same
3942 way on the host that it would on the target. See for instance
3943 simplify_unary_operation. The #if is needed to avoid compiler
3946 #if HOST_BITS_PER_LONG > 32
3947 if (BITS_PER_WORD < HOST_BITS_PER_LONG && BITS_PER_WORD == 32)
3949 if (l[0] & ((long) 1 << 31))
3950 l[0] |= ((long) (-1) << 32);
3951 if (l[1] & ((long) 1 << 31))
3952 l[1] |= ((long) (-1) << 32);
3956 *first = GEN_INT (l[0]);
3957 *second = GEN_INT (l[1]);
3961 /* Return nonzero if this function has no function calls. */
3964 leaf_function_p (void)
3969 if (crtl->profile || profile_arc_flag)
3972 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
3975 && ! SIBLING_CALL_P (insn))
3977 if (NONJUMP_INSN_P (insn)
3978 && GET_CODE (PATTERN (insn)) == SEQUENCE
3979 && CALL_P (XVECEXP (PATTERN (insn), 0, 0))
3980 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0)))
3983 for (link = crtl->epilogue_delay_list;
3985 link = XEXP (link, 1))
3987 insn = XEXP (link, 0);
3990 && ! SIBLING_CALL_P (insn))
3992 if (NONJUMP_INSN_P (insn)
3993 && GET_CODE (PATTERN (insn)) == SEQUENCE
3994 && CALL_P (XVECEXP (PATTERN (insn), 0, 0))
3995 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0)))
4002 /* Return 1 if branch is a forward branch.
4003 Uses insn_shuid array, so it works only in the final pass. May be used by
4004 output templates to customary add branch prediction hints.
4007 final_forward_branch_p (rtx insn)
4009 int insn_id, label_id;
4011 gcc_assert (uid_shuid);
4012 insn_id = INSN_SHUID (insn);
4013 label_id = INSN_SHUID (JUMP_LABEL (insn));
4014 /* We've hit some insns that does not have id information available. */
4015 gcc_assert (insn_id && label_id);
4016 return insn_id < label_id;
4019 /* On some machines, a function with no call insns
4020 can run faster if it doesn't create its own register window.
4021 When output, the leaf function should use only the "output"
4022 registers. Ordinarily, the function would be compiled to use
4023 the "input" registers to find its arguments; it is a candidate
4024 for leaf treatment if it uses only the "input" registers.
4025 Leaf function treatment means renumbering so the function
4026 uses the "output" registers instead. */
4028 #ifdef LEAF_REGISTERS
4030 /* Return 1 if this function uses only the registers that can be
4031 safely renumbered. */
4034 only_leaf_regs_used (void)
4037 const char *const permitted_reg_in_leaf_functions = LEAF_REGISTERS;
4039 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
4040 if ((df_regs_ever_live_p (i) || global_regs[i])
4041 && ! permitted_reg_in_leaf_functions[i])
4044 if (crtl->uses_pic_offset_table
4045 && pic_offset_table_rtx != 0
4046 && REG_P (pic_offset_table_rtx)
4047 && ! permitted_reg_in_leaf_functions[REGNO (pic_offset_table_rtx)])
4053 /* Scan all instructions and renumber all registers into those
4054 available in leaf functions. */
4057 leaf_renumber_regs (rtx first)
4061 /* Renumber only the actual patterns.
4062 The reg-notes can contain frame pointer refs,
4063 and renumbering them could crash, and should not be needed. */
4064 for (insn = first; insn; insn = NEXT_INSN (insn))
4066 leaf_renumber_regs_insn (PATTERN (insn));
4067 for (insn = crtl->epilogue_delay_list;
4069 insn = XEXP (insn, 1))
4070 if (INSN_P (XEXP (insn, 0)))
4071 leaf_renumber_regs_insn (PATTERN (XEXP (insn, 0)));
4074 /* Scan IN_RTX and its subexpressions, and renumber all regs into those
4075 available in leaf functions. */
4078 leaf_renumber_regs_insn (rtx in_rtx)
4081 const char *format_ptr;
4086 /* Renumber all input-registers into output-registers.
4087 renumbered_regs would be 1 for an output-register;
4094 /* Don't renumber the same reg twice. */
4098 newreg = REGNO (in_rtx);
4099 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg
4100 to reach here as part of a REG_NOTE. */
4101 if (newreg >= FIRST_PSEUDO_REGISTER)
4106 newreg = LEAF_REG_REMAP (newreg);
4107 gcc_assert (newreg >= 0);
4108 df_set_regs_ever_live (REGNO (in_rtx), false);
4109 df_set_regs_ever_live (newreg, true);
4110 SET_REGNO (in_rtx, newreg);
4114 if (INSN_P (in_rtx))
4116 /* Inside a SEQUENCE, we find insns.
4117 Renumber just the patterns of these insns,
4118 just as we do for the top-level insns. */
4119 leaf_renumber_regs_insn (PATTERN (in_rtx));
4123 format_ptr = GET_RTX_FORMAT (GET_CODE (in_rtx));
4125 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (in_rtx)); i++)
4126 switch (*format_ptr++)
4129 leaf_renumber_regs_insn (XEXP (in_rtx, i));
4133 if (NULL != XVEC (in_rtx, i))
4135 for (j = 0; j < XVECLEN (in_rtx, i); j++)
4136 leaf_renumber_regs_insn (XVECEXP (in_rtx, i, j));
4156 /* When -gused is used, emit debug info for only used symbols. But in
4157 addition to the standard intercepted debug_hooks there are some direct
4158 calls into this file, i.e., dbxout_symbol, dbxout_parms, and dbxout_reg_params.
4159 Those routines may also be called from a higher level intercepted routine. So
4160 to prevent recording data for an inner call to one of these for an intercept,
4161 we maintain an intercept nesting counter (debug_nesting). We only save the
4162 intercepted arguments if the nesting is 1. */
4163 int debug_nesting = 0;
4165 static tree *symbol_queue;
4166 int symbol_queue_index = 0;
4167 static int symbol_queue_size = 0;
4169 /* Generate the symbols for any queued up type symbols we encountered
4170 while generating the type info for some originally used symbol.
4171 This might generate additional entries in the queue. Only when
4172 the nesting depth goes to 0 is this routine called. */
4175 debug_flush_symbol_queue (void)
4179 /* Make sure that additionally queued items are not flushed
4184 for (i = 0; i < symbol_queue_index; ++i)
4186 /* If we pushed queued symbols then such symbols must be
4187 output no matter what anyone else says. Specifically,
4188 we need to make sure dbxout_symbol() thinks the symbol was
4189 used and also we need to override TYPE_DECL_SUPPRESS_DEBUG
4190 which may be set for outside reasons. */
4191 int saved_tree_used = TREE_USED (symbol_queue[i]);
4192 int saved_suppress_debug = TYPE_DECL_SUPPRESS_DEBUG (symbol_queue[i]);
4193 TREE_USED (symbol_queue[i]) = 1;
4194 TYPE_DECL_SUPPRESS_DEBUG (symbol_queue[i]) = 0;
4196 #ifdef DBX_DEBUGGING_INFO
4197 dbxout_symbol (symbol_queue[i], 0);
4200 TREE_USED (symbol_queue[i]) = saved_tree_used;
4201 TYPE_DECL_SUPPRESS_DEBUG (symbol_queue[i]) = saved_suppress_debug;
4204 symbol_queue_index = 0;
4208 /* Queue a type symbol needed as part of the definition of a decl
4209 symbol. These symbols are generated when debug_flush_symbol_queue()
4213 debug_queue_symbol (tree decl)
4215 if (symbol_queue_index >= symbol_queue_size)
4217 symbol_queue_size += 10;
4218 symbol_queue = XRESIZEVEC (tree, symbol_queue, symbol_queue_size);
4221 symbol_queue[symbol_queue_index++] = decl;
4224 /* Free symbol queue. */
4226 debug_free_queue (void)
4230 free (symbol_queue);
4231 symbol_queue = NULL;
4232 symbol_queue_size = 0;
4236 /* Turn the RTL into assembly. */
4238 rest_of_handle_final (void)
4243 /* Get the function's name, as described by its RTL. This may be
4244 different from the DECL_NAME name used in the source file. */
4246 x = DECL_RTL (current_function_decl);
4247 gcc_assert (MEM_P (x));
4249 gcc_assert (GET_CODE (x) == SYMBOL_REF);
4250 fnname = XSTR (x, 0);
4252 assemble_start_function (current_function_decl, fnname);
4253 final_start_function (get_insns (), asm_out_file, optimize);
4254 final (get_insns (), asm_out_file, optimize);
4255 final_end_function ();
4257 #ifdef TARGET_UNWIND_INFO
4258 /* ??? The IA-64 ".handlerdata" directive must be issued before
4259 the ".endp" directive that closes the procedure descriptor. */
4260 output_function_exception_table (fnname);
4263 assemble_end_function (current_function_decl, fnname);
4265 #ifndef TARGET_UNWIND_INFO
4266 /* Otherwise, it feels unclean to switch sections in the middle. */
4267 output_function_exception_table (fnname);
4270 user_defined_section_attribute = false;
4272 /* Free up reg info memory. */
4276 fflush (asm_out_file);
4278 /* Write DBX symbols if requested. */
4280 /* Note that for those inline functions where we don't initially
4281 know for certain that we will be generating an out-of-line copy,
4282 the first invocation of this routine (rest_of_compilation) will
4283 skip over this code by doing a `goto exit_rest_of_compilation;'.
4284 Later on, wrapup_global_declarations will (indirectly) call
4285 rest_of_compilation again for those inline functions that need
4286 to have out-of-line copies generated. During that call, we
4287 *will* be routed past here. */
4289 timevar_push (TV_SYMOUT);
4290 if (!DECL_IGNORED_P (current_function_decl))
4291 debug_hooks->function_decl (current_function_decl);
4292 timevar_pop (TV_SYMOUT);
4294 /* Release the blocks that are linked to DECL_INITIAL() to free the memory. */
4295 DECL_INITIAL (current_function_decl) = error_mark_node;
4297 if (DECL_STATIC_CONSTRUCTOR (current_function_decl)
4298 && targetm.have_ctors_dtors)
4299 targetm.asm_out.constructor (XEXP (DECL_RTL (current_function_decl), 0),
4300 decl_init_priority_lookup
4301 (current_function_decl));
4302 if (DECL_STATIC_DESTRUCTOR (current_function_decl)
4303 && targetm.have_ctors_dtors)
4304 targetm.asm_out.destructor (XEXP (DECL_RTL (current_function_decl), 0),
4305 decl_fini_priority_lookup
4306 (current_function_decl));
4310 struct rtl_opt_pass pass_final =
4316 rest_of_handle_final, /* execute */
4319 0, /* static_pass_number */
4320 TV_FINAL, /* tv_id */
4321 0, /* properties_required */
4322 0, /* properties_provided */
4323 0, /* properties_destroyed */
4324 0, /* todo_flags_start */
4325 TODO_ggc_collect /* todo_flags_finish */
4331 rest_of_handle_shorten_branches (void)
4333 /* Shorten branches. */
4334 shorten_branches (get_insns ());
4338 struct rtl_opt_pass pass_shorten_branches =
4342 "shorten", /* name */
4344 rest_of_handle_shorten_branches, /* execute */
4347 0, /* static_pass_number */
4348 TV_FINAL, /* tv_id */
4349 0, /* properties_required */
4350 0, /* properties_provided */
4351 0, /* properties_destroyed */
4352 0, /* todo_flags_start */
4353 TODO_dump_func /* todo_flags_finish */
4359 rest_of_clean_state (void)
4362 FILE *final_output = NULL;
4363 int save_unnumbered = flag_dump_unnumbered;
4364 int save_noaddr = flag_dump_noaddr;
4366 if (flag_dump_final_insns)
4368 final_output = fopen (flag_dump_final_insns, "a");
4371 error ("could not open final insn dump file %qs: %s",
4372 flag_dump_final_insns, strerror (errno));
4373 flag_dump_final_insns = NULL;
4379 aname = (IDENTIFIER_POINTER
4380 (DECL_ASSEMBLER_NAME (current_function_decl)));
4381 fprintf (final_output, "\n;; Function (%s) %s\n\n", aname,
4382 cfun->function_frequency == FUNCTION_FREQUENCY_HOT
4384 : cfun->function_frequency == FUNCTION_FREQUENCY_UNLIKELY_EXECUTED
4385 ? " (unlikely executed)"
4388 flag_dump_noaddr = flag_dump_unnumbered = 1;
4390 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4392 INSN_UID (insn) = CODE_LABEL_NUMBER (insn);
4394 INSN_UID (insn) = 0;
4398 /* It is very important to decompose the RTL instruction chain here:
4399 debug information keeps pointing into CODE_LABEL insns inside the function
4400 body. If these remain pointing to the other insns, we end up preserving
4401 whole RTL chain and attached detailed debug info in memory. */
4402 for (insn = get_insns (); insn; insn = next)
4404 next = NEXT_INSN (insn);
4405 NEXT_INSN (insn) = NULL;
4406 PREV_INSN (insn) = NULL;
4409 && (!NOTE_P (insn) ||
4410 (NOTE_KIND (insn) != NOTE_INSN_VAR_LOCATION
4411 && NOTE_KIND (insn) != NOTE_INSN_BLOCK_BEG
4412 && NOTE_KIND (insn) != NOTE_INSN_BLOCK_END
4413 && NOTE_KIND (insn) != NOTE_INSN_CFA_RESTORE_STATE)))
4414 print_rtl_single (final_output, insn);
4420 flag_dump_noaddr = save_noaddr;
4421 flag_dump_unnumbered = save_unnumbered;
4423 if (fclose (final_output))
4425 error ("could not close final insn dump file %qs: %s",
4426 flag_dump_final_insns, strerror (errno));
4427 flag_dump_final_insns = NULL;
4431 /* In case the function was not output,
4432 don't leave any temporary anonymous types
4433 queued up for sdb output. */
4434 #ifdef SDB_DEBUGGING_INFO
4435 if (write_symbols == SDB_DEBUG)
4436 sdbout_types (NULL_TREE);
4439 flag_rerun_cse_after_global_opts = 0;
4440 reload_completed = 0;
4441 epilogue_completed = 0;
4443 regstack_completed = 0;
4446 /* Clear out the insn_length contents now that they are no
4448 init_insn_lengths ();
4450 /* Show no temporary slots allocated. */
4453 free_bb_for_insn ();
4457 if (targetm.binds_local_p (current_function_decl))
4459 unsigned int pref = crtl->preferred_stack_boundary;
4460 if (crtl->stack_alignment_needed > crtl->preferred_stack_boundary)
4461 pref = crtl->stack_alignment_needed;
4462 cgraph_rtl_info (current_function_decl)->preferred_incoming_stack_boundary
4466 /* Make sure volatile mem refs aren't considered valid operands for
4467 arithmetic insns. We must call this here if this is a nested inline
4468 function, since the above code leaves us in the init_recog state,
4469 and the function context push/pop code does not save/restore volatile_ok.
4471 ??? Maybe it isn't necessary for expand_start_function to call this
4472 anymore if we do it here? */
4474 init_recog_no_volatile ();
4476 /* We're done with this function. Free up memory if we can. */
4477 free_after_parsing (cfun);
4478 free_after_compilation (cfun);
4482 struct rtl_opt_pass pass_clean_state =
4486 "*clean_state", /* name */
4488 rest_of_clean_state, /* execute */
4491 0, /* static_pass_number */
4492 TV_FINAL, /* tv_id */
4493 0, /* properties_required */
4494 0, /* properties_provided */
4495 PROP_rtl, /* properties_destroyed */
4496 0, /* todo_flags_start */
4497 0 /* todo_flags_finish */