1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains the functions `gen_rtx', `gen_reg_rtx'
26 and `gen_label_rtx' that are the usual ways of creating rtl
27 expressions for most purposes.
29 It also has the functions for creating insns and linking
30 them in the doubly-linked chain.
32 The patterns of the insns are created by machine-dependent
33 routines in insn-emit.c, which is generated automatically from
34 the machine description. These routines use `gen_rtx' to make
35 the individual rtx's of the pattern; what is machine dependent
36 is the kind of rtx's they make and what arguments they use. */
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
55 #include "basic-block.h"
58 #include "langhooks.h"
60 /* Commonly used modes. */
62 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
63 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
64 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
65 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
68 /* This is *not* reset after each function. It gives each CODE_LABEL
69 in the entire compilation a unique label number. */
71 static int label_num = 1;
73 /* Highest label number in current function.
74 Zero means use the value of label_num instead.
75 This is nonzero only when belatedly compiling an inline function. */
77 static int last_label_num;
79 /* Value label_num had when set_new_first_and_last_label_number was called.
80 If label_num has not changed since then, last_label_num is valid. */
82 static int base_label_num;
84 /* Nonzero means do not generate NOTEs for source line numbers. */
86 static int no_line_numbers;
88 /* Commonly used rtx's, so that we only need space for one copy.
89 These are initialized once for the entire compilation.
90 All of these are unique; no other rtx-object will be equal to any
93 rtx global_rtl[GR_MAX];
95 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
96 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
97 record a copy of const[012]_rtx. */
99 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
103 REAL_VALUE_TYPE dconst0;
104 REAL_VALUE_TYPE dconst1;
105 REAL_VALUE_TYPE dconst2;
106 REAL_VALUE_TYPE dconstm1;
108 /* All references to the following fixed hard registers go through
109 these unique rtl objects. On machines where the frame-pointer and
110 arg-pointer are the same register, they use the same unique object.
112 After register allocation, other rtl objects which used to be pseudo-regs
113 may be clobbered to refer to the frame-pointer register.
114 But references that were originally to the frame-pointer can be
115 distinguished from the others because they contain frame_pointer_rtx.
117 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
118 tricky: until register elimination has taken place hard_frame_pointer_rtx
119 should be used if it is being set, and frame_pointer_rtx otherwise. After
120 register elimination hard_frame_pointer_rtx should always be used.
121 On machines where the two registers are same (most) then these are the
124 In an inline procedure, the stack and frame pointer rtxs may not be
125 used for anything else. */
126 rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
127 rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
128 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
129 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
130 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
132 /* This is used to implement __builtin_return_address for some machines.
133 See for instance the MIPS port. */
134 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
136 /* We make one copy of (const_int C) where C is in
137 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
138 to save space during the compilation and simplify comparisons of
141 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
143 /* A hash table storing CONST_INTs whose absolute value is greater
144 than MAX_SAVED_CONST_INT. */
146 static htab_t const_int_htab;
148 /* A hash table storing memory attribute structures. */
149 static htab_t mem_attrs_htab;
151 /* A hash table storing all CONST_DOUBLEs. */
152 static htab_t const_double_htab;
154 #define first_insn (cfun->emit->x_first_insn)
155 #define last_insn (cfun->emit->x_last_insn)
156 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
157 #define last_linenum (cfun->emit->x_last_linenum)
158 #define last_filename (cfun->emit->x_last_filename)
159 #define first_label_num (cfun->emit->x_first_label_num)
161 static rtx make_jump_insn_raw PARAMS ((rtx));
162 static rtx make_call_insn_raw PARAMS ((rtx));
163 static rtx find_line_note PARAMS ((rtx));
164 static void mark_sequence_stack PARAMS ((struct sequence_stack *));
165 static rtx change_address_1 PARAMS ((rtx, enum machine_mode, rtx,
167 static void unshare_all_rtl_1 PARAMS ((rtx));
168 static void unshare_all_decls PARAMS ((tree));
169 static void reset_used_decls PARAMS ((tree));
170 static void mark_label_nuses PARAMS ((rtx));
171 static hashval_t const_int_htab_hash PARAMS ((const void *));
172 static int const_int_htab_eq PARAMS ((const void *,
174 static hashval_t const_double_htab_hash PARAMS ((const void *));
175 static int const_double_htab_eq PARAMS ((const void *,
177 static rtx lookup_const_double PARAMS ((rtx));
178 static hashval_t mem_attrs_htab_hash PARAMS ((const void *));
179 static int mem_attrs_htab_eq PARAMS ((const void *,
181 static void mem_attrs_mark PARAMS ((const void *));
182 static mem_attrs *get_mem_attrs PARAMS ((HOST_WIDE_INT, tree, rtx,
185 static tree component_ref_for_mem_expr PARAMS ((tree));
186 static rtx gen_const_vector_0 PARAMS ((enum machine_mode));
188 /* Probability of the conditional branch currently proceeded by try_split.
189 Set to -1 otherwise. */
190 int split_branch_probability = -1;
192 /* Returns a hash code for X (which is a really a CONST_INT). */
195 const_int_htab_hash (x)
198 return (hashval_t) INTVAL ((struct rtx_def *) x);
201 /* Returns non-zero if the value represented by X (which is really a
202 CONST_INT) is the same as that given by Y (which is really a
206 const_int_htab_eq (x, y)
210 return (INTVAL ((rtx) x) == *((const HOST_WIDE_INT *) y));
213 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
215 const_double_htab_hash (x)
222 for (i = 0; i < sizeof(CONST_DOUBLE_FORMAT)-1; i++)
223 h ^= XWINT (value, i);
227 /* Returns non-zero if the value represented by X (really a ...)
228 is the same as that represented by Y (really a ...) */
230 const_double_htab_eq (x, y)
234 rtx a = (rtx)x, b = (rtx)y;
237 if (GET_MODE (a) != GET_MODE (b))
239 for (i = 0; i < sizeof(CONST_DOUBLE_FORMAT)-1; i++)
240 if (XWINT (a, i) != XWINT (b, i))
246 /* Returns a hash code for X (which is a really a mem_attrs *). */
249 mem_attrs_htab_hash (x)
252 mem_attrs *p = (mem_attrs *) x;
254 return (p->alias ^ (p->align * 1000)
255 ^ ((p->offset ? INTVAL (p->offset) : 0) * 50000)
256 ^ ((p->size ? INTVAL (p->size) : 0) * 2500000)
260 /* Returns non-zero if the value represented by X (which is really a
261 mem_attrs *) is the same as that given by Y (which is also really a
265 mem_attrs_htab_eq (x, y)
269 mem_attrs *p = (mem_attrs *) x;
270 mem_attrs *q = (mem_attrs *) y;
272 return (p->alias == q->alias && p->expr == q->expr && p->offset == q->offset
273 && p->size == q->size && p->align == q->align);
276 /* This routine is called when we determine that we need a mem_attrs entry.
277 It marks the associated decl and RTL as being used, if present. */
283 mem_attrs *p = (mem_attrs *) x;
286 ggc_mark_tree (p->expr);
289 ggc_mark_rtx (p->offset);
292 ggc_mark_rtx (p->size);
295 /* Allocate a new mem_attrs structure and insert it into the hash table if
296 one identical to it is not already in the table. We are doing this for
300 get_mem_attrs (alias, expr, offset, size, align, mode)
306 enum machine_mode mode;
311 /* If everything is the default, we can just return zero. */
312 if (alias == 0 && expr == 0 && offset == 0
314 || (mode != BLKmode && GET_MODE_SIZE (mode) == INTVAL (size)))
315 && (align == BITS_PER_UNIT
317 && mode != BLKmode && align == GET_MODE_ALIGNMENT (mode))))
322 attrs.offset = offset;
326 slot = htab_find_slot (mem_attrs_htab, &attrs, INSERT);
329 *slot = ggc_alloc (sizeof (mem_attrs));
330 memcpy (*slot, &attrs, sizeof (mem_attrs));
336 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
337 don't attempt to share with the various global pieces of rtl (such as
338 frame_pointer_rtx). */
341 gen_raw_REG (mode, regno)
342 enum machine_mode mode;
345 rtx x = gen_rtx_raw_REG (mode, regno);
346 ORIGINAL_REGNO (x) = regno;
350 /* There are some RTL codes that require special attention; the generation
351 functions do the raw handling. If you add to this list, modify
352 special_rtx in gengenrtl.c as well. */
355 gen_rtx_CONST_INT (mode, arg)
356 enum machine_mode mode ATTRIBUTE_UNUSED;
361 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
362 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
364 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
365 if (const_true_rtx && arg == STORE_FLAG_VALUE)
366 return const_true_rtx;
369 /* Look up the CONST_INT in the hash table. */
370 slot = htab_find_slot_with_hash (const_int_htab, &arg,
371 (hashval_t) arg, INSERT);
373 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
379 gen_int_mode (c, mode)
381 enum machine_mode mode;
383 return GEN_INT (trunc_int_for_mode (c, mode));
386 /* CONST_DOUBLEs might be created from pairs of integers, or from
387 REAL_VALUE_TYPEs. Also, their length is known only at run time,
388 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
390 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
391 hash table. If so, return its counterpart; otherwise add it
392 to the hash table and return it. */
394 lookup_const_double (real)
397 void **slot = htab_find_slot (const_double_htab, real, INSERT);
404 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
405 VALUE in mode MODE. */
407 const_double_from_real_value (value, mode)
408 REAL_VALUE_TYPE value;
409 enum machine_mode mode;
411 rtx real = rtx_alloc (CONST_DOUBLE);
412 PUT_MODE (real, mode);
414 memcpy (&CONST_DOUBLE_LOW (real), &value, sizeof (REAL_VALUE_TYPE));
416 return lookup_const_double (real);
419 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
420 of ints: I0 is the low-order word and I1 is the high-order word.
421 Do not use this routine for non-integer modes; convert to
422 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
425 immed_double_const (i0, i1, mode)
426 HOST_WIDE_INT i0, i1;
427 enum machine_mode mode;
432 if (mode != VOIDmode)
435 if (GET_MODE_CLASS (mode) != MODE_INT
436 && GET_MODE_CLASS (mode) != MODE_PARTIAL_INT)
439 /* We clear out all bits that don't belong in MODE, unless they and
440 our sign bit are all one. So we get either a reasonable negative
441 value or a reasonable unsigned value for this mode. */
442 width = GET_MODE_BITSIZE (mode);
443 if (width < HOST_BITS_PER_WIDE_INT
444 && ((i0 & ((HOST_WIDE_INT) (-1) << (width - 1)))
445 != ((HOST_WIDE_INT) (-1) << (width - 1))))
446 i0 &= ((HOST_WIDE_INT) 1 << width) - 1, i1 = 0;
447 else if (width == HOST_BITS_PER_WIDE_INT
448 && ! (i1 == ~0 && i0 < 0))
450 else if (width > 2 * HOST_BITS_PER_WIDE_INT)
451 /* We cannot represent this value as a constant. */
454 /* If this would be an entire word for the target, but is not for
455 the host, then sign-extend on the host so that the number will
456 look the same way on the host that it would on the target.
458 For example, when building a 64 bit alpha hosted 32 bit sparc
459 targeted compiler, then we want the 32 bit unsigned value -1 to be
460 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
461 The latter confuses the sparc backend. */
463 if (width < HOST_BITS_PER_WIDE_INT
464 && (i0 & ((HOST_WIDE_INT) 1 << (width - 1))))
465 i0 |= ((HOST_WIDE_INT) (-1) << width);
467 /* If MODE fits within HOST_BITS_PER_WIDE_INT, always use a
470 ??? Strictly speaking, this is wrong if we create a CONST_INT for
471 a large unsigned constant with the size of MODE being
472 HOST_BITS_PER_WIDE_INT and later try to interpret that constant
473 in a wider mode. In that case we will mis-interpret it as a
476 Unfortunately, the only alternative is to make a CONST_DOUBLE for
477 any constant in any mode if it is an unsigned constant larger
478 than the maximum signed integer in an int on the host. However,
479 doing this will break everyone that always expects to see a
480 CONST_INT for SImode and smaller.
482 We have always been making CONST_INTs in this case, so nothing
483 new is being broken. */
485 if (width <= HOST_BITS_PER_WIDE_INT)
486 i1 = (i0 < 0) ? ~(HOST_WIDE_INT) 0 : 0;
489 /* If this integer fits in one word, return a CONST_INT. */
490 if ((i1 == 0 && i0 >= 0) || (i1 == ~0 && i0 < 0))
493 /* We use VOIDmode for integers. */
494 value = rtx_alloc (CONST_DOUBLE);
495 PUT_MODE (value, VOIDmode);
497 CONST_DOUBLE_LOW (value) = i0;
498 CONST_DOUBLE_HIGH (value) = i1;
500 for (i = 2; i < (sizeof CONST_DOUBLE_FORMAT - 1); i++)
501 XWINT (value, i) = 0;
503 return lookup_const_double (value);
507 gen_rtx_REG (mode, regno)
508 enum machine_mode mode;
511 /* In case the MD file explicitly references the frame pointer, have
512 all such references point to the same frame pointer. This is
513 used during frame pointer elimination to distinguish the explicit
514 references to these registers from pseudos that happened to be
517 If we have eliminated the frame pointer or arg pointer, we will
518 be using it as a normal register, for example as a spill
519 register. In such cases, we might be accessing it in a mode that
520 is not Pmode and therefore cannot use the pre-allocated rtx.
522 Also don't do this when we are making new REGs in reload, since
523 we don't want to get confused with the real pointers. */
525 if (mode == Pmode && !reload_in_progress)
527 if (regno == FRAME_POINTER_REGNUM)
528 return frame_pointer_rtx;
529 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
530 if (regno == HARD_FRAME_POINTER_REGNUM)
531 return hard_frame_pointer_rtx;
533 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
534 if (regno == ARG_POINTER_REGNUM)
535 return arg_pointer_rtx;
537 #ifdef RETURN_ADDRESS_POINTER_REGNUM
538 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
539 return return_address_pointer_rtx;
541 if (regno == PIC_OFFSET_TABLE_REGNUM
542 && fixed_regs[PIC_OFFSET_TABLE_REGNUM])
543 return pic_offset_table_rtx;
544 if (regno == STACK_POINTER_REGNUM)
545 return stack_pointer_rtx;
548 return gen_raw_REG (mode, regno);
552 gen_rtx_MEM (mode, addr)
553 enum machine_mode mode;
556 rtx rt = gen_rtx_raw_MEM (mode, addr);
558 /* This field is not cleared by the mere allocation of the rtx, so
566 gen_rtx_SUBREG (mode, reg, offset)
567 enum machine_mode mode;
571 /* This is the most common failure type.
572 Catch it early so we can see who does it. */
573 if ((offset % GET_MODE_SIZE (mode)) != 0)
576 /* This check isn't usable right now because combine will
577 throw arbitrary crap like a CALL into a SUBREG in
578 gen_lowpart_for_combine so we must just eat it. */
580 /* Check for this too. */
581 if (offset >= GET_MODE_SIZE (GET_MODE (reg)))
584 return gen_rtx_raw_SUBREG (mode, reg, offset);
587 /* Generate a SUBREG representing the least-significant part of REG if MODE
588 is smaller than mode of REG, otherwise paradoxical SUBREG. */
591 gen_lowpart_SUBREG (mode, reg)
592 enum machine_mode mode;
595 enum machine_mode inmode;
597 inmode = GET_MODE (reg);
598 if (inmode == VOIDmode)
600 return gen_rtx_SUBREG (mode, reg,
601 subreg_lowpart_offset (mode, inmode));
604 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
606 ** This routine generates an RTX of the size specified by
607 ** <code>, which is an RTX code. The RTX structure is initialized
608 ** from the arguments <element1> through <elementn>, which are
609 ** interpreted according to the specific RTX type's format. The
610 ** special machine mode associated with the rtx (if any) is specified
613 ** gen_rtx can be invoked in a way which resembles the lisp-like
614 ** rtx it will generate. For example, the following rtx structure:
616 ** (plus:QI (mem:QI (reg:SI 1))
617 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
619 ** ...would be generated by the following C code:
621 ** gen_rtx (PLUS, QImode,
622 ** gen_rtx (MEM, QImode,
623 ** gen_rtx (REG, SImode, 1)),
624 ** gen_rtx (MEM, QImode,
625 ** gen_rtx (PLUS, SImode,
626 ** gen_rtx (REG, SImode, 2),
627 ** gen_rtx (REG, SImode, 3)))),
632 gen_rtx VPARAMS ((enum rtx_code code, enum machine_mode mode, ...))
634 int i; /* Array indices... */
635 const char *fmt; /* Current rtx's format... */
636 rtx rt_val; /* RTX to return to caller... */
639 VA_FIXEDARG (p, enum rtx_code, code);
640 VA_FIXEDARG (p, enum machine_mode, mode);
645 rt_val = gen_rtx_CONST_INT (mode, va_arg (p, HOST_WIDE_INT));
650 HOST_WIDE_INT arg0 = va_arg (p, HOST_WIDE_INT);
651 HOST_WIDE_INT arg1 = va_arg (p, HOST_WIDE_INT);
653 rt_val = immed_double_const (arg0, arg1, mode);
658 rt_val = gen_rtx_REG (mode, va_arg (p, int));
662 rt_val = gen_rtx_MEM (mode, va_arg (p, rtx));
666 rt_val = rtx_alloc (code); /* Allocate the storage space. */
667 rt_val->mode = mode; /* Store the machine mode... */
669 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
670 for (i = 0; i < GET_RTX_LENGTH (code); i++)
674 case '0': /* Unused field. */
677 case 'i': /* An integer? */
678 XINT (rt_val, i) = va_arg (p, int);
681 case 'w': /* A wide integer? */
682 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
685 case 's': /* A string? */
686 XSTR (rt_val, i) = va_arg (p, char *);
689 case 'e': /* An expression? */
690 case 'u': /* An insn? Same except when printing. */
691 XEXP (rt_val, i) = va_arg (p, rtx);
694 case 'E': /* An RTX vector? */
695 XVEC (rt_val, i) = va_arg (p, rtvec);
698 case 'b': /* A bitmap? */
699 XBITMAP (rt_val, i) = va_arg (p, bitmap);
702 case 't': /* A tree? */
703 XTREE (rt_val, i) = va_arg (p, tree);
717 /* gen_rtvec (n, [rt1, ..., rtn])
719 ** This routine creates an rtvec and stores within it the
720 ** pointers to rtx's which are its arguments.
725 gen_rtvec VPARAMS ((int n, ...))
731 VA_FIXEDARG (p, int, n);
734 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
736 vector = (rtx *) alloca (n * sizeof (rtx));
738 for (i = 0; i < n; i++)
739 vector[i] = va_arg (p, rtx);
741 /* The definition of VA_* in K&R C causes `n' to go out of scope. */
745 return gen_rtvec_v (save_n, vector);
749 gen_rtvec_v (n, argp)
757 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
759 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
761 for (i = 0; i < n; i++)
762 rt_val->elem[i] = *argp++;
767 /* Generate a REG rtx for a new pseudo register of mode MODE.
768 This pseudo is assigned the next sequential register number. */
772 enum machine_mode mode;
774 struct function *f = cfun;
777 /* Don't let anything called after initial flow analysis create new
782 if (generating_concat_p
783 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
784 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
786 /* For complex modes, don't make a single pseudo.
787 Instead, make a CONCAT of two pseudos.
788 This allows noncontiguous allocation of the real and imaginary parts,
789 which makes much better code. Besides, allocating DCmode
790 pseudos overstrains reload on some machines like the 386. */
791 rtx realpart, imagpart;
792 int size = GET_MODE_UNIT_SIZE (mode);
793 enum machine_mode partmode
794 = mode_for_size (size * BITS_PER_UNIT,
795 (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
796 ? MODE_FLOAT : MODE_INT),
799 realpart = gen_reg_rtx (partmode);
800 imagpart = gen_reg_rtx (partmode);
801 return gen_rtx_CONCAT (mode, realpart, imagpart);
804 /* Make sure regno_pointer_align, regno_decl, and regno_reg_rtx are large
805 enough to have an element for this pseudo reg number. */
807 if (reg_rtx_no == f->emit->regno_pointer_align_length)
809 int old_size = f->emit->regno_pointer_align_length;
814 new = xrealloc (f->emit->regno_pointer_align, old_size * 2);
815 memset (new + old_size, 0, old_size);
816 f->emit->regno_pointer_align = (unsigned char *) new;
818 new1 = (rtx *) xrealloc (f->emit->x_regno_reg_rtx,
819 old_size * 2 * sizeof (rtx));
820 memset (new1 + old_size, 0, old_size * sizeof (rtx));
821 regno_reg_rtx = new1;
823 new2 = (tree *) xrealloc (f->emit->regno_decl,
824 old_size * 2 * sizeof (tree));
825 memset (new2 + old_size, 0, old_size * sizeof (tree));
826 f->emit->regno_decl = new2;
828 f->emit->regno_pointer_align_length = old_size * 2;
831 val = gen_raw_REG (mode, reg_rtx_no);
832 regno_reg_rtx[reg_rtx_no++] = val;
836 /* Identify REG (which may be a CONCAT) as a user register. */
842 if (GET_CODE (reg) == CONCAT)
844 REG_USERVAR_P (XEXP (reg, 0)) = 1;
845 REG_USERVAR_P (XEXP (reg, 1)) = 1;
847 else if (GET_CODE (reg) == REG)
848 REG_USERVAR_P (reg) = 1;
853 /* Identify REG as a probable pointer register and show its alignment
854 as ALIGN, if nonzero. */
857 mark_reg_pointer (reg, align)
861 if (! REG_POINTER (reg))
863 REG_POINTER (reg) = 1;
866 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
868 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
869 /* We can no-longer be sure just how aligned this pointer is */
870 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
873 /* Return 1 plus largest pseudo reg number used in the current function. */
881 /* Return 1 + the largest label number used so far in the current function. */
886 if (last_label_num && label_num == base_label_num)
887 return last_label_num;
891 /* Return first label number used in this function (if any were used). */
894 get_first_label_num ()
896 return first_label_num;
899 /* Return the final regno of X, which is a SUBREG of a hard
902 subreg_hard_regno (x, check_mode)
906 enum machine_mode mode = GET_MODE (x);
907 unsigned int byte_offset, base_regno, final_regno;
908 rtx reg = SUBREG_REG (x);
910 /* This is where we attempt to catch illegal subregs
911 created by the compiler. */
912 if (GET_CODE (x) != SUBREG
913 || GET_CODE (reg) != REG)
915 base_regno = REGNO (reg);
916 if (base_regno >= FIRST_PSEUDO_REGISTER)
918 if (check_mode && ! HARD_REGNO_MODE_OK (base_regno, GET_MODE (reg)))
921 /* Catch non-congruent offsets too. */
922 byte_offset = SUBREG_BYTE (x);
923 if ((byte_offset % GET_MODE_SIZE (mode)) != 0)
926 final_regno = subreg_regno (x);
931 /* Return a value representing some low-order bits of X, where the number
932 of low-order bits is given by MODE. Note that no conversion is done
933 between floating-point and fixed-point values, rather, the bit
934 representation is returned.
936 This function handles the cases in common between gen_lowpart, below,
937 and two variants in cse.c and combine.c. These are the cases that can
938 be safely handled at all points in the compilation.
940 If this is not a case we can handle, return 0. */
943 gen_lowpart_common (mode, x)
944 enum machine_mode mode;
947 int msize = GET_MODE_SIZE (mode);
948 int xsize = GET_MODE_SIZE (GET_MODE (x));
951 if (GET_MODE (x) == mode)
954 /* MODE must occupy no more words than the mode of X. */
955 if (GET_MODE (x) != VOIDmode
956 && ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
957 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)))
960 offset = subreg_lowpart_offset (mode, GET_MODE (x));
962 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
963 && (GET_MODE_CLASS (mode) == MODE_INT
964 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
966 /* If we are getting the low-order part of something that has been
967 sign- or zero-extended, we can either just use the object being
968 extended or make a narrower extension. If we want an even smaller
969 piece than the size of the object being extended, call ourselves
972 This case is used mostly by combine and cse. */
974 if (GET_MODE (XEXP (x, 0)) == mode)
976 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
977 return gen_lowpart_common (mode, XEXP (x, 0));
978 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
979 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
981 else if (GET_CODE (x) == SUBREG || GET_CODE (x) == REG
982 || GET_CODE (x) == CONCAT)
983 return simplify_gen_subreg (mode, x, GET_MODE (x), offset);
984 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
985 from the low-order part of the constant. */
986 else if ((GET_MODE_CLASS (mode) == MODE_INT
987 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
988 && GET_MODE (x) == VOIDmode
989 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
991 /* If MODE is twice the host word size, X is already the desired
992 representation. Otherwise, if MODE is wider than a word, we can't
993 do this. If MODE is exactly a word, return just one CONST_INT. */
995 if (GET_MODE_BITSIZE (mode) >= 2 * HOST_BITS_PER_WIDE_INT)
997 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
999 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT)
1000 return (GET_CODE (x) == CONST_INT ? x
1001 : GEN_INT (CONST_DOUBLE_LOW (x)));
1004 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
1005 HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
1006 : CONST_DOUBLE_LOW (x));
1008 /* Sign extend to HOST_WIDE_INT. */
1009 val = trunc_int_for_mode (val, mode);
1011 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
1016 /* The floating-point emulator can handle all conversions between
1017 FP and integer operands. This simplifies reload because it
1018 doesn't have to deal with constructs like (subreg:DI
1019 (const_double:SF ...)) or (subreg:DF (const_int ...)). */
1020 /* Single-precision floats are always 32-bits and double-precision
1021 floats are always 64-bits. */
1023 else if (GET_MODE_CLASS (mode) == MODE_FLOAT
1024 && GET_MODE_BITSIZE (mode) == 32
1025 && GET_CODE (x) == CONST_INT)
1031 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
1032 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
1034 else if (GET_MODE_CLASS (mode) == MODE_FLOAT
1035 && GET_MODE_BITSIZE (mode) == 64
1036 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
1037 && GET_MODE (x) == VOIDmode)
1041 HOST_WIDE_INT low, high;
1043 if (GET_CODE (x) == CONST_INT)
1046 high = low >> (HOST_BITS_PER_WIDE_INT - 1);
1050 low = CONST_DOUBLE_LOW (x);
1051 high = CONST_DOUBLE_HIGH (x);
1054 #if HOST_BITS_PER_WIDE_INT == 32
1055 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
1057 if (WORDS_BIG_ENDIAN)
1058 i[0] = high, i[1] = low;
1060 i[0] = low, i[1] = high;
1065 r = REAL_VALUE_FROM_TARGET_DOUBLE (i);
1066 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
1068 else if ((GET_MODE_CLASS (mode) == MODE_INT
1069 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
1070 && GET_CODE (x) == CONST_DOUBLE
1071 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
1074 long i[4]; /* Only the low 32 bits of each 'long' are used. */
1075 int endian = WORDS_BIG_ENDIAN ? 1 : 0;
1077 /* Convert 'r' into an array of four 32-bit words in target word
1079 REAL_VALUE_FROM_CONST_DOUBLE (r, x);
1080 switch (GET_MODE_BITSIZE (GET_MODE (x)))
1083 REAL_VALUE_TO_TARGET_SINGLE (r, i[3 * endian]);
1086 i[3 - 3 * endian] = 0;
1089 REAL_VALUE_TO_TARGET_DOUBLE (r, i + 2 * endian);
1090 i[2 - 2 * endian] = 0;
1091 i[3 - 2 * endian] = 0;
1094 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i + endian);
1095 i[3 - 3 * endian] = 0;
1098 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i);
1103 /* Now, pack the 32-bit elements of the array into a CONST_DOUBLE
1105 #if HOST_BITS_PER_WIDE_INT == 32
1106 return immed_double_const (i[3 * endian], i[1 + endian], mode);
1108 if (HOST_BITS_PER_WIDE_INT != 64)
1111 return immed_double_const ((((unsigned long) i[3 * endian])
1112 | ((HOST_WIDE_INT) i[1 + endian] << 32)),
1113 (((unsigned long) i[2 - endian])
1114 | ((HOST_WIDE_INT) i[3 - 3 * endian] << 32)),
1119 /* Otherwise, we can't do this. */
1123 /* Return the real part (which has mode MODE) of a complex value X.
1124 This always comes at the low address in memory. */
1127 gen_realpart (mode, x)
1128 enum machine_mode mode;
1131 if (WORDS_BIG_ENDIAN
1132 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1134 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1136 ("can't access real part of complex value in hard register");
1137 else if (WORDS_BIG_ENDIAN)
1138 return gen_highpart (mode, x);
1140 return gen_lowpart (mode, x);
1143 /* Return the imaginary part (which has mode MODE) of a complex value X.
1144 This always comes at the high address in memory. */
1147 gen_imagpart (mode, x)
1148 enum machine_mode mode;
1151 if (WORDS_BIG_ENDIAN)
1152 return gen_lowpart (mode, x);
1153 else if (! WORDS_BIG_ENDIAN
1154 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1156 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1158 ("can't access imaginary part of complex value in hard register");
1160 return gen_highpart (mode, x);
1163 /* Return 1 iff X, assumed to be a SUBREG,
1164 refers to the real part of the complex value in its containing reg.
1165 Complex values are always stored with the real part in the first word,
1166 regardless of WORDS_BIG_ENDIAN. */
1169 subreg_realpart_p (x)
1172 if (GET_CODE (x) != SUBREG)
1175 return ((unsigned int) SUBREG_BYTE (x)
1176 < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x))));
1179 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1180 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1181 least-significant part of X.
1182 MODE specifies how big a part of X to return;
1183 it usually should not be larger than a word.
1184 If X is a MEM whose address is a QUEUED, the value may be so also. */
1187 gen_lowpart (mode, x)
1188 enum machine_mode mode;
1191 rtx result = gen_lowpart_common (mode, x);
1195 else if (GET_CODE (x) == REG)
1197 /* Must be a hard reg that's not valid in MODE. */
1198 result = gen_lowpart_common (mode, copy_to_reg (x));
1203 else if (GET_CODE (x) == MEM)
1205 /* The only additional case we can do is MEM. */
1207 if (WORDS_BIG_ENDIAN)
1208 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
1209 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1211 if (BYTES_BIG_ENDIAN)
1212 /* Adjust the address so that the address-after-the-data
1214 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
1215 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
1217 return adjust_address (x, mode, offset);
1219 else if (GET_CODE (x) == ADDRESSOF)
1220 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
1225 /* Like `gen_lowpart', but refer to the most significant part.
1226 This is used to access the imaginary part of a complex number. */
1229 gen_highpart (mode, x)
1230 enum machine_mode mode;
1233 unsigned int msize = GET_MODE_SIZE (mode);
1236 /* This case loses if X is a subreg. To catch bugs early,
1237 complain if an invalid MODE is used even in other cases. */
1238 if (msize > UNITS_PER_WORD
1239 && msize != GET_MODE_UNIT_SIZE (GET_MODE (x)))
1242 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1243 subreg_highpart_offset (mode, GET_MODE (x)));
1245 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1246 the target if we have a MEM. gen_highpart must return a valid operand,
1247 emitting code if necessary to do so. */
1248 if (result != NULL_RTX && GET_CODE (result) == MEM)
1249 result = validize_mem (result);
1256 /* Like gen_highpart_mode, but accept mode of EXP operand in case EXP can
1257 be VOIDmode constant. */
1259 gen_highpart_mode (outermode, innermode, exp)
1260 enum machine_mode outermode, innermode;
1263 if (GET_MODE (exp) != VOIDmode)
1265 if (GET_MODE (exp) != innermode)
1267 return gen_highpart (outermode, exp);
1269 return simplify_gen_subreg (outermode, exp, innermode,
1270 subreg_highpart_offset (outermode, innermode));
1273 /* Return offset in bytes to get OUTERMODE low part
1274 of the value in mode INNERMODE stored in memory in target format. */
1277 subreg_lowpart_offset (outermode, innermode)
1278 enum machine_mode outermode, innermode;
1280 unsigned int offset = 0;
1281 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1285 if (WORDS_BIG_ENDIAN)
1286 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1287 if (BYTES_BIG_ENDIAN)
1288 offset += difference % UNITS_PER_WORD;
1294 /* Return offset in bytes to get OUTERMODE high part
1295 of the value in mode INNERMODE stored in memory in target format. */
1297 subreg_highpart_offset (outermode, innermode)
1298 enum machine_mode outermode, innermode;
1300 unsigned int offset = 0;
1301 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1303 if (GET_MODE_SIZE (innermode) < GET_MODE_SIZE (outermode))
1308 if (! WORDS_BIG_ENDIAN)
1309 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1310 if (! BYTES_BIG_ENDIAN)
1311 offset += difference % UNITS_PER_WORD;
1317 /* Return 1 iff X, assumed to be a SUBREG,
1318 refers to the least significant part of its containing reg.
1319 If X is not a SUBREG, always return 1 (it is its own low part!). */
1322 subreg_lowpart_p (x)
1325 if (GET_CODE (x) != SUBREG)
1327 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1330 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1331 == SUBREG_BYTE (x));
1335 /* Helper routine for all the constant cases of operand_subword.
1336 Some places invoke this directly. */
1339 constant_subword (op, offset, mode)
1342 enum machine_mode mode;
1344 int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD;
1347 /* If OP is already an integer word, return it. */
1348 if (GET_MODE_CLASS (mode) == MODE_INT
1349 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
1352 /* The output is some bits, the width of the target machine's word.
1353 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1355 if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1356 && GET_MODE_CLASS (mode) == MODE_FLOAT
1357 && GET_MODE_BITSIZE (mode) == 64
1358 && GET_CODE (op) == CONST_DOUBLE)
1363 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1364 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
1366 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1367 which the words are written depends on the word endianness.
1368 ??? This is a potential portability problem and should
1369 be fixed at some point.
1371 We must exercise caution with the sign bit. By definition there
1372 are 32 significant bits in K; there may be more in a HOST_WIDE_INT.
1373 Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT.
1374 So we explicitly mask and sign-extend as necessary. */
1375 if (BITS_PER_WORD == 32)
1378 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1379 return GEN_INT (val);
1381 #if HOST_BITS_PER_WIDE_INT >= 64
1382 else if (BITS_PER_WORD >= 64 && offset == 0)
1384 val = k[! WORDS_BIG_ENDIAN];
1385 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1386 val |= (HOST_WIDE_INT) k[WORDS_BIG_ENDIAN] & 0xffffffff;
1387 return GEN_INT (val);
1390 else if (BITS_PER_WORD == 16)
1392 val = k[offset >> 1];
1393 if ((offset & 1) == ! WORDS_BIG_ENDIAN)
1395 val = ((val & 0xffff) ^ 0x8000) - 0x8000;
1396 return GEN_INT (val);
1401 else if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1402 && GET_MODE_CLASS (mode) == MODE_FLOAT
1403 && GET_MODE_BITSIZE (mode) > 64
1404 && GET_CODE (op) == CONST_DOUBLE)
1409 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1410 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k);
1412 if (BITS_PER_WORD == 32)
1415 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1416 return GEN_INT (val);
1418 #if HOST_BITS_PER_WIDE_INT >= 64
1419 else if (BITS_PER_WORD >= 64 && offset <= 1)
1421 val = k[offset * 2 + ! WORDS_BIG_ENDIAN];
1422 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1423 val |= (HOST_WIDE_INT) k[offset * 2 + WORDS_BIG_ENDIAN] & 0xffffffff;
1424 return GEN_INT (val);
1431 /* Single word float is a little harder, since single- and double-word
1432 values often do not have the same high-order bits. We have already
1433 verified that we want the only defined word of the single-word value. */
1434 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1435 && GET_MODE_BITSIZE (mode) == 32
1436 && GET_CODE (op) == CONST_DOUBLE)
1441 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1442 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
1444 /* Sign extend from known 32-bit value to HOST_WIDE_INT. */
1446 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1448 if (BITS_PER_WORD == 16)
1450 if ((offset & 1) == ! WORDS_BIG_ENDIAN)
1452 val = ((val & 0xffff) ^ 0x8000) - 0x8000;
1455 return GEN_INT (val);
1458 /* The only remaining cases that we can handle are integers.
1459 Convert to proper endianness now since these cases need it.
1460 At this point, offset == 0 means the low-order word.
1462 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1463 in general. However, if OP is (const_int 0), we can just return
1466 if (op == const0_rtx)
1469 if (GET_MODE_CLASS (mode) != MODE_INT
1470 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE)
1471 || BITS_PER_WORD > HOST_BITS_PER_WIDE_INT)
1474 if (WORDS_BIG_ENDIAN)
1475 offset = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - offset;
1477 /* Find out which word on the host machine this value is in and get
1478 it from the constant. */
1479 val = (offset / size_ratio == 0
1480 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
1481 : (GET_CODE (op) == CONST_INT
1482 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
1484 /* Get the value we want into the low bits of val. */
1485 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT)
1486 val = ((val >> ((offset % size_ratio) * BITS_PER_WORD)));
1488 val = trunc_int_for_mode (val, word_mode);
1490 return GEN_INT (val);
1493 /* Return subword OFFSET of operand OP.
1494 The word number, OFFSET, is interpreted as the word number starting
1495 at the low-order address. OFFSET 0 is the low-order word if not
1496 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1498 If we cannot extract the required word, we return zero. Otherwise,
1499 an rtx corresponding to the requested word will be returned.
1501 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1502 reload has completed, a valid address will always be returned. After
1503 reload, if a valid address cannot be returned, we return zero.
1505 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1506 it is the responsibility of the caller.
1508 MODE is the mode of OP in case it is a CONST_INT.
1510 ??? This is still rather broken for some cases. The problem for the
1511 moment is that all callers of this thing provide no 'goal mode' to
1512 tell us to work with. This exists because all callers were written
1513 in a word based SUBREG world.
1514 Now use of this function can be deprecated by simplify_subreg in most
1519 operand_subword (op, offset, validate_address, mode)
1521 unsigned int offset;
1522 int validate_address;
1523 enum machine_mode mode;
1525 if (mode == VOIDmode)
1526 mode = GET_MODE (op);
1528 if (mode == VOIDmode)
1531 /* If OP is narrower than a word, fail. */
1533 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1536 /* If we want a word outside OP, return zero. */
1538 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1541 /* Form a new MEM at the requested address. */
1542 if (GET_CODE (op) == MEM)
1544 rtx new = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1546 if (! validate_address)
1549 else if (reload_completed)
1551 if (! strict_memory_address_p (word_mode, XEXP (new, 0)))
1555 return replace_equiv_address (new, XEXP (new, 0));
1558 /* Rest can be handled by simplify_subreg. */
1559 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1562 /* Similar to `operand_subword', but never return 0. If we can't extract
1563 the required subword, put OP into a register and try again. If that fails,
1564 abort. We always validate the address in this case.
1566 MODE is the mode of OP, in case it is CONST_INT. */
1569 operand_subword_force (op, offset, mode)
1571 unsigned int offset;
1572 enum machine_mode mode;
1574 rtx result = operand_subword (op, offset, 1, mode);
1579 if (mode != BLKmode && mode != VOIDmode)
1581 /* If this is a register which can not be accessed by words, copy it
1582 to a pseudo register. */
1583 if (GET_CODE (op) == REG)
1584 op = copy_to_reg (op);
1586 op = force_reg (mode, op);
1589 result = operand_subword (op, offset, 1, mode);
1596 /* Given a compare instruction, swap the operands.
1597 A test instruction is changed into a compare of 0 against the operand. */
1600 reverse_comparison (insn)
1603 rtx body = PATTERN (insn);
1606 if (GET_CODE (body) == SET)
1607 comp = SET_SRC (body);
1609 comp = SET_SRC (XVECEXP (body, 0, 0));
1611 if (GET_CODE (comp) == COMPARE)
1613 rtx op0 = XEXP (comp, 0);
1614 rtx op1 = XEXP (comp, 1);
1615 XEXP (comp, 0) = op1;
1616 XEXP (comp, 1) = op0;
1620 rtx new = gen_rtx_COMPARE (VOIDmode,
1621 CONST0_RTX (GET_MODE (comp)), comp);
1622 if (GET_CODE (body) == SET)
1623 SET_SRC (body) = new;
1625 SET_SRC (XVECEXP (body, 0, 0)) = new;
1629 /* Within a MEM_EXPR, we care about either (1) a component ref of a decl,
1630 or (2) a component ref of something variable. Represent the later with
1631 a NULL expression. */
1634 component_ref_for_mem_expr (ref)
1637 tree inner = TREE_OPERAND (ref, 0);
1639 if (TREE_CODE (inner) == COMPONENT_REF)
1640 inner = component_ref_for_mem_expr (inner);
1643 tree placeholder_ptr = 0;
1645 /* Now remove any conversions: they don't change what the underlying
1646 object is. Likewise for SAVE_EXPR. Also handle PLACEHOLDER_EXPR. */
1647 while (TREE_CODE (inner) == NOP_EXPR || TREE_CODE (inner) == CONVERT_EXPR
1648 || TREE_CODE (inner) == NON_LVALUE_EXPR
1649 || TREE_CODE (inner) == VIEW_CONVERT_EXPR
1650 || TREE_CODE (inner) == SAVE_EXPR
1651 || TREE_CODE (inner) == PLACEHOLDER_EXPR)
1652 if (TREE_CODE (inner) == PLACEHOLDER_EXPR)
1653 inner = find_placeholder (inner, &placeholder_ptr);
1655 inner = TREE_OPERAND (inner, 0);
1657 if (! DECL_P (inner))
1661 if (inner == TREE_OPERAND (ref, 0))
1664 return build (COMPONENT_REF, TREE_TYPE (ref), inner,
1665 TREE_OPERAND (ref, 1));
1668 /* Given REF, a MEM, and T, either the type of X or the expression
1669 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1670 if we are making a new object of this type. */
1673 set_mem_attributes (ref, t, objectp)
1678 HOST_WIDE_INT alias = MEM_ALIAS_SET (ref);
1679 tree expr = MEM_EXPR (ref);
1680 rtx offset = MEM_OFFSET (ref);
1681 rtx size = MEM_SIZE (ref);
1682 unsigned int align = MEM_ALIGN (ref);
1685 /* It can happen that type_for_mode was given a mode for which there
1686 is no language-level type. In which case it returns NULL, which
1691 type = TYPE_P (t) ? t : TREE_TYPE (t);
1693 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1694 wrong answer, as it assumes that DECL_RTL already has the right alias
1695 info. Callers should not set DECL_RTL until after the call to
1696 set_mem_attributes. */
1697 if (DECL_P (t) && ref == DECL_RTL_IF_SET (t))
1700 /* Get the alias set from the expression or type (perhaps using a
1701 front-end routine) and use it. */
1702 alias = get_alias_set (t);
1704 MEM_VOLATILE_P (ref) = TYPE_VOLATILE (type);
1705 MEM_IN_STRUCT_P (ref) = AGGREGATE_TYPE_P (type);
1706 RTX_UNCHANGING_P (ref)
1707 |= ((lang_hooks.honor_readonly
1708 && (TYPE_READONLY (type) || TREE_READONLY (t)))
1709 || (! TYPE_P (t) && TREE_CONSTANT (t)));
1711 /* If we are making an object of this type, or if this is a DECL, we know
1712 that it is a scalar if the type is not an aggregate. */
1713 if ((objectp || DECL_P (t)) && ! AGGREGATE_TYPE_P (type))
1714 MEM_SCALAR_P (ref) = 1;
1716 /* We can set the alignment from the type if we are making an object,
1717 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1718 if (objectp || TREE_CODE (t) == INDIRECT_REF || TYPE_ALIGN_OK (type))
1719 align = MAX (align, TYPE_ALIGN (type));
1721 /* If the size is known, we can set that. */
1722 if (TYPE_SIZE_UNIT (type) && host_integerp (TYPE_SIZE_UNIT (type), 1))
1723 size = GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type), 1));
1725 /* If T is not a type, we may be able to deduce some more information about
1729 maybe_set_unchanging (ref, t);
1730 if (TREE_THIS_VOLATILE (t))
1731 MEM_VOLATILE_P (ref) = 1;
1733 /* Now remove any conversions: they don't change what the underlying
1734 object is. Likewise for SAVE_EXPR. */
1735 while (TREE_CODE (t) == NOP_EXPR || TREE_CODE (t) == CONVERT_EXPR
1736 || TREE_CODE (t) == NON_LVALUE_EXPR
1737 || TREE_CODE (t) == VIEW_CONVERT_EXPR
1738 || TREE_CODE (t) == SAVE_EXPR)
1739 t = TREE_OPERAND (t, 0);
1741 /* If this expression can't be addressed (e.g., it contains a reference
1742 to a non-addressable field), show we don't change its alias set. */
1743 if (! can_address_p (t))
1744 MEM_KEEP_ALIAS_SET_P (ref) = 1;
1746 /* If this is a decl, set the attributes of the MEM from it. */
1750 offset = const0_rtx;
1751 size = (DECL_SIZE_UNIT (t)
1752 && host_integerp (DECL_SIZE_UNIT (t), 1)
1753 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t), 1)) : 0);
1754 align = DECL_ALIGN (t);
1757 /* If this is a constant, we know the alignment. */
1758 else if (TREE_CODE_CLASS (TREE_CODE (t)) == 'c')
1760 align = TYPE_ALIGN (type);
1761 #ifdef CONSTANT_ALIGNMENT
1762 align = CONSTANT_ALIGNMENT (t, align);
1766 /* If this is a field reference and not a bit-field, record it. */
1767 /* ??? There is some information that can be gleened from bit-fields,
1768 such as the word offset in the structure that might be modified.
1769 But skip it for now. */
1770 else if (TREE_CODE (t) == COMPONENT_REF
1771 && ! DECL_BIT_FIELD (TREE_OPERAND (t, 1)))
1773 expr = component_ref_for_mem_expr (t);
1774 offset = const0_rtx;
1775 /* ??? Any reason the field size would be different than
1776 the size we got from the type? */
1779 /* If this is an array reference, look for an outer field reference. */
1780 else if (TREE_CODE (t) == ARRAY_REF)
1782 tree off_tree = size_zero_node;
1787 = fold (build (PLUS_EXPR, sizetype,
1788 fold (build (MULT_EXPR, sizetype,
1789 TREE_OPERAND (t, 1),
1790 TYPE_SIZE_UNIT (TREE_TYPE (t)))),
1792 t = TREE_OPERAND (t, 0);
1794 while (TREE_CODE (t) == ARRAY_REF);
1796 if (TREE_CODE (t) == COMPONENT_REF)
1798 expr = component_ref_for_mem_expr (t);
1799 if (host_integerp (off_tree, 1))
1800 offset = GEN_INT (tree_low_cst (off_tree, 1));
1801 /* ??? Any reason the field size would be different than
1802 the size we got from the type? */
1807 /* Now set the attributes we computed above. */
1809 = get_mem_attrs (alias, expr, offset, size, align, GET_MODE (ref));
1811 /* If this is already known to be a scalar or aggregate, we are done. */
1812 if (MEM_IN_STRUCT_P (ref) || MEM_SCALAR_P (ref))
1815 /* If it is a reference into an aggregate, this is part of an aggregate.
1816 Otherwise we don't know. */
1817 else if (TREE_CODE (t) == COMPONENT_REF || TREE_CODE (t) == ARRAY_REF
1818 || TREE_CODE (t) == ARRAY_RANGE_REF
1819 || TREE_CODE (t) == BIT_FIELD_REF)
1820 MEM_IN_STRUCT_P (ref) = 1;
1823 /* Set the alias set of MEM to SET. */
1826 set_mem_alias_set (mem, set)
1830 #ifdef ENABLE_CHECKING
1831 /* If the new and old alias sets don't conflict, something is wrong. */
1832 if (!alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)))
1836 MEM_ATTRS (mem) = get_mem_attrs (set, MEM_EXPR (mem), MEM_OFFSET (mem),
1837 MEM_SIZE (mem), MEM_ALIGN (mem),
1841 /* Set the alignment of MEM to ALIGN bits. */
1844 set_mem_align (mem, align)
1848 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1849 MEM_OFFSET (mem), MEM_SIZE (mem), align,
1853 /* Set the expr for MEM to EXPR. */
1856 set_mem_expr (mem, expr)
1861 = get_mem_attrs (MEM_ALIAS_SET (mem), expr, MEM_OFFSET (mem),
1862 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
1865 /* Set the offset of MEM to OFFSET. */
1868 set_mem_offset (mem, offset)
1871 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1872 offset, MEM_SIZE (mem), MEM_ALIGN (mem),
1876 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1877 and its address changed to ADDR. (VOIDmode means don't change the mode.
1878 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1879 returned memory location is required to be valid. The memory
1880 attributes are not changed. */
1883 change_address_1 (memref, mode, addr, validate)
1885 enum machine_mode mode;
1891 if (GET_CODE (memref) != MEM)
1893 if (mode == VOIDmode)
1894 mode = GET_MODE (memref);
1896 addr = XEXP (memref, 0);
1900 if (reload_in_progress || reload_completed)
1902 if (! memory_address_p (mode, addr))
1906 addr = memory_address (mode, addr);
1909 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1912 new = gen_rtx_MEM (mode, addr);
1913 MEM_COPY_ATTRIBUTES (new, memref);
1917 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1918 way we are changing MEMREF, so we only preserve the alias set. */
1921 change_address (memref, mode, addr)
1923 enum machine_mode mode;
1926 rtx new = change_address_1 (memref, mode, addr, 1);
1927 enum machine_mode mmode = GET_MODE (new);
1930 = get_mem_attrs (MEM_ALIAS_SET (memref), 0, 0,
1931 mmode == BLKmode ? 0 : GEN_INT (GET_MODE_SIZE (mmode)),
1932 (mmode == BLKmode ? BITS_PER_UNIT
1933 : GET_MODE_ALIGNMENT (mmode)),
1939 /* Return a memory reference like MEMREF, but with its mode changed
1940 to MODE and its address offset by OFFSET bytes. If VALIDATE is
1941 nonzero, the memory address is forced to be valid.
1942 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
1943 and caller is responsible for adjusting MEMREF base register. */
1946 adjust_address_1 (memref, mode, offset, validate, adjust)
1948 enum machine_mode mode;
1949 HOST_WIDE_INT offset;
1950 int validate, adjust;
1952 rtx addr = XEXP (memref, 0);
1954 rtx memoffset = MEM_OFFSET (memref);
1956 unsigned int memalign = MEM_ALIGN (memref);
1958 /* ??? Prefer to create garbage instead of creating shared rtl.
1959 This may happen even if offset is non-zero -- consider
1960 (plus (plus reg reg) const_int) -- so do this always. */
1961 addr = copy_rtx (addr);
1965 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
1966 object, we can merge it into the LO_SUM. */
1967 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
1969 && (unsigned HOST_WIDE_INT) offset
1970 < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
1971 addr = gen_rtx_LO_SUM (Pmode, XEXP (addr, 0),
1972 plus_constant (XEXP (addr, 1), offset));
1974 addr = plus_constant (addr, offset);
1977 new = change_address_1 (memref, mode, addr, validate);
1979 /* Compute the new values of the memory attributes due to this adjustment.
1980 We add the offsets and update the alignment. */
1982 memoffset = GEN_INT (offset + INTVAL (memoffset));
1984 /* Compute the new alignment by taking the MIN of the alignment and the
1985 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
1990 (unsigned HOST_WIDE_INT) (offset & -offset) * BITS_PER_UNIT);
1992 /* We can compute the size in a number of ways. */
1993 if (GET_MODE (new) != BLKmode)
1994 size = GEN_INT (GET_MODE_SIZE (GET_MODE (new)));
1995 else if (MEM_SIZE (memref))
1996 size = plus_constant (MEM_SIZE (memref), -offset);
1998 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref),
1999 memoffset, size, memalign, GET_MODE (new));
2001 /* At some point, we should validate that this offset is within the object,
2002 if all the appropriate values are known. */
2006 /* Return a memory reference like MEMREF, but with its mode changed
2007 to MODE and its address changed to ADDR, which is assumed to be
2008 MEMREF offseted by OFFSET bytes. If VALIDATE is
2009 nonzero, the memory address is forced to be valid. */
2012 adjust_automodify_address_1 (memref, mode, addr, offset, validate)
2014 enum machine_mode mode;
2016 HOST_WIDE_INT offset;
2019 memref = change_address_1 (memref, VOIDmode, addr, validate);
2020 return adjust_address_1 (memref, mode, offset, validate, 0);
2023 /* Return a memory reference like MEMREF, but whose address is changed by
2024 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2025 known to be in OFFSET (possibly 1). */
2028 offset_address (memref, offset, pow2)
2033 rtx new, addr = XEXP (memref, 0);
2035 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
2037 /* At this point we don't know _why_ the address is invalid. It
2038 could have secondary memory refereces, multiplies or anything.
2040 However, if we did go and rearrange things, we can wind up not
2041 being able to recognize the magic around pic_offset_table_rtx.
2042 This stuff is fragile, and is yet another example of why it is
2043 bad to expose PIC machinery too early. */
2044 if (! memory_address_p (GET_MODE (memref), new)
2045 && GET_CODE (addr) == PLUS
2046 && XEXP (addr, 0) == pic_offset_table_rtx)
2048 addr = force_reg (GET_MODE (addr), addr);
2049 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
2052 update_temp_slot_address (XEXP (memref, 0), new);
2053 new = change_address_1 (memref, VOIDmode, new, 1);
2055 /* Update the alignment to reflect the offset. Reset the offset, which
2058 = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref), 0, 0,
2059 MIN (MEM_ALIGN (memref),
2060 (unsigned HOST_WIDE_INT) pow2 * BITS_PER_UNIT),
2065 /* Return a memory reference like MEMREF, but with its address changed to
2066 ADDR. The caller is asserting that the actual piece of memory pointed
2067 to is the same, just the form of the address is being changed, such as
2068 by putting something into a register. */
2071 replace_equiv_address (memref, addr)
2075 /* change_address_1 copies the memory attribute structure without change
2076 and that's exactly what we want here. */
2077 update_temp_slot_address (XEXP (memref, 0), addr);
2078 return change_address_1 (memref, VOIDmode, addr, 1);
2081 /* Likewise, but the reference is not required to be valid. */
2084 replace_equiv_address_nv (memref, addr)
2088 return change_address_1 (memref, VOIDmode, addr, 0);
2091 /* Return a memory reference like MEMREF, but with its mode widened to
2092 MODE and offset by OFFSET. This would be used by targets that e.g.
2093 cannot issue QImode memory operations and have to use SImode memory
2094 operations plus masking logic. */
2097 widen_memory_access (memref, mode, offset)
2099 enum machine_mode mode;
2100 HOST_WIDE_INT offset;
2102 rtx new = adjust_address_1 (memref, mode, offset, 1, 1);
2103 tree expr = MEM_EXPR (new);
2104 rtx memoffset = MEM_OFFSET (new);
2105 unsigned int size = GET_MODE_SIZE (mode);
2107 /* If we don't know what offset we were at within the expression, then
2108 we can't know if we've overstepped the bounds. */
2114 if (TREE_CODE (expr) == COMPONENT_REF)
2116 tree field = TREE_OPERAND (expr, 1);
2118 if (! DECL_SIZE_UNIT (field))
2124 /* Is the field at least as large as the access? If so, ok,
2125 otherwise strip back to the containing structure. */
2126 if (TREE_CODE (DECL_SIZE_UNIT (field)) == INTEGER_CST
2127 && compare_tree_int (DECL_SIZE_UNIT (field), size) >= 0
2128 && INTVAL (memoffset) >= 0)
2131 if (! host_integerp (DECL_FIELD_OFFSET (field), 1))
2137 expr = TREE_OPERAND (expr, 0);
2138 memoffset = (GEN_INT (INTVAL (memoffset)
2139 + tree_low_cst (DECL_FIELD_OFFSET (field), 1)
2140 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 1)
2143 /* Similarly for the decl. */
2144 else if (DECL_P (expr)
2145 && DECL_SIZE_UNIT (expr)
2146 && TREE_CODE (DECL_SIZE_UNIT (expr)) == INTEGER_CST
2147 && compare_tree_int (DECL_SIZE_UNIT (expr), size) >= 0
2148 && (! memoffset || INTVAL (memoffset) >= 0))
2152 /* The widened memory access overflows the expression, which means
2153 that it could alias another expression. Zap it. */
2160 memoffset = NULL_RTX;
2162 /* The widened memory may alias other stuff, so zap the alias set. */
2163 /* ??? Maybe use get_alias_set on any remaining expression. */
2165 MEM_ATTRS (new) = get_mem_attrs (0, expr, memoffset, GEN_INT (size),
2166 MEM_ALIGN (new), mode);
2171 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2178 label = gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX, NULL_RTX,
2179 NULL, label_num++, NULL, NULL);
2181 LABEL_NUSES (label) = 0;
2182 LABEL_ALTERNATE_NAME (label) = NULL;
2186 /* For procedure integration. */
2188 /* Install new pointers to the first and last insns in the chain.
2189 Also, set cur_insn_uid to one higher than the last in use.
2190 Used for an inline-procedure after copying the insn chain. */
2193 set_new_first_and_last_insn (first, last)
2202 for (insn = first; insn; insn = NEXT_INSN (insn))
2203 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2208 /* Set the range of label numbers found in the current function.
2209 This is used when belatedly compiling an inline function. */
2212 set_new_first_and_last_label_num (first, last)
2215 base_label_num = label_num;
2216 first_label_num = first;
2217 last_label_num = last;
2220 /* Set the last label number found in the current function.
2221 This is used when belatedly compiling an inline function. */
2224 set_new_last_label_num (last)
2227 base_label_num = label_num;
2228 last_label_num = last;
2231 /* Restore all variables describing the current status from the structure *P.
2232 This is used after a nested function. */
2235 restore_emit_status (p)
2236 struct function *p ATTRIBUTE_UNUSED;
2241 /* Clear out all parts of the state in F that can safely be discarded
2242 after the function has been compiled, to let garbage collection
2243 reclaim the memory. */
2246 free_emit_status (f)
2249 free (f->emit->x_regno_reg_rtx);
2250 free (f->emit->regno_pointer_align);
2251 free (f->emit->regno_decl);
2256 /* Go through all the RTL insn bodies and copy any invalid shared
2257 structure. This routine should only be called once. */
2260 unshare_all_rtl (fndecl, insn)
2266 /* Make sure that virtual parameters are not shared. */
2267 for (decl = DECL_ARGUMENTS (fndecl); decl; decl = TREE_CHAIN (decl))
2268 SET_DECL_RTL (decl, copy_rtx_if_shared (DECL_RTL (decl)));
2270 /* Make sure that virtual stack slots are not shared. */
2271 unshare_all_decls (DECL_INITIAL (fndecl));
2273 /* Unshare just about everything else. */
2274 unshare_all_rtl_1 (insn);
2276 /* Make sure the addresses of stack slots found outside the insn chain
2277 (such as, in DECL_RTL of a variable) are not shared
2278 with the insn chain.
2280 This special care is necessary when the stack slot MEM does not
2281 actually appear in the insn chain. If it does appear, its address
2282 is unshared from all else at that point. */
2283 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
2286 /* Go through all the RTL insn bodies and copy any invalid shared
2287 structure, again. This is a fairly expensive thing to do so it
2288 should be done sparingly. */
2291 unshare_all_rtl_again (insn)
2297 for (p = insn; p; p = NEXT_INSN (p))
2300 reset_used_flags (PATTERN (p));
2301 reset_used_flags (REG_NOTES (p));
2302 reset_used_flags (LOG_LINKS (p));
2305 /* Make sure that virtual stack slots are not shared. */
2306 reset_used_decls (DECL_INITIAL (cfun->decl));
2308 /* Make sure that virtual parameters are not shared. */
2309 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
2310 reset_used_flags (DECL_RTL (decl));
2312 reset_used_flags (stack_slot_list);
2314 unshare_all_rtl (cfun->decl, insn);
2317 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2318 Assumes the mark bits are cleared at entry. */
2321 unshare_all_rtl_1 (insn)
2324 for (; insn; insn = NEXT_INSN (insn))
2327 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
2328 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
2329 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
2333 /* Go through all virtual stack slots of a function and copy any
2334 shared structure. */
2336 unshare_all_decls (blk)
2341 /* Copy shared decls. */
2342 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2343 if (DECL_RTL_SET_P (t))
2344 SET_DECL_RTL (t, copy_rtx_if_shared (DECL_RTL (t)));
2346 /* Now process sub-blocks. */
2347 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2348 unshare_all_decls (t);
2351 /* Go through all virtual stack slots of a function and mark them as
2354 reset_used_decls (blk)
2360 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2361 if (DECL_RTL_SET_P (t))
2362 reset_used_flags (DECL_RTL (t));
2364 /* Now process sub-blocks. */
2365 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2366 reset_used_decls (t);
2369 /* Similar to `copy_rtx' except that if MAY_SHARE is present, it is
2370 placed in the result directly, rather than being copied. MAY_SHARE is
2371 either a MEM of an EXPR_LIST of MEMs. */
2374 copy_most_rtx (orig, may_share)
2381 const char *format_ptr;
2383 if (orig == may_share
2384 || (GET_CODE (may_share) == EXPR_LIST
2385 && in_expr_list_p (may_share, orig)))
2388 code = GET_CODE (orig);
2406 copy = rtx_alloc (code);
2407 PUT_MODE (copy, GET_MODE (orig));
2408 RTX_FLAG (copy, in_struct) = RTX_FLAG (orig, in_struct);
2409 RTX_FLAG (copy, volatil) = RTX_FLAG (orig, volatil);
2410 RTX_FLAG (copy, unchanging) = RTX_FLAG (orig, unchanging);
2411 RTX_FLAG (copy, integrated) = RTX_FLAG (orig, integrated);
2412 RTX_FLAG (copy, frame_related) = RTX_FLAG (orig, frame_related);
2414 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
2416 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
2418 switch (*format_ptr++)
2421 XEXP (copy, i) = XEXP (orig, i);
2422 if (XEXP (orig, i) != NULL && XEXP (orig, i) != may_share)
2423 XEXP (copy, i) = copy_most_rtx (XEXP (orig, i), may_share);
2427 XEXP (copy, i) = XEXP (orig, i);
2432 XVEC (copy, i) = XVEC (orig, i);
2433 if (XVEC (orig, i) != NULL)
2435 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
2436 for (j = 0; j < XVECLEN (copy, i); j++)
2437 XVECEXP (copy, i, j)
2438 = copy_most_rtx (XVECEXP (orig, i, j), may_share);
2443 XWINT (copy, i) = XWINT (orig, i);
2448 XINT (copy, i) = XINT (orig, i);
2452 XTREE (copy, i) = XTREE (orig, i);
2457 XSTR (copy, i) = XSTR (orig, i);
2461 /* Copy this through the wide int field; that's safest. */
2462 X0WINT (copy, i) = X0WINT (orig, i);
2472 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2473 Recursively does the same for subexpressions. */
2476 copy_rtx_if_shared (orig)
2482 const char *format_ptr;
2488 code = GET_CODE (x);
2490 /* These types may be freely shared. */
2504 /* SCRATCH must be shared because they represent distinct values. */
2508 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2509 a LABEL_REF, it isn't sharable. */
2510 if (GET_CODE (XEXP (x, 0)) == PLUS
2511 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
2512 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
2521 /* The chain of insns is not being copied. */
2525 /* A MEM is allowed to be shared if its address is constant.
2527 We used to allow sharing of MEMs which referenced
2528 virtual_stack_vars_rtx or virtual_incoming_args_rtx, but
2529 that can lose. instantiate_virtual_regs will not unshare
2530 the MEMs, and combine may change the structure of the address
2531 because it looks safe and profitable in one context, but
2532 in some other context it creates unrecognizable RTL. */
2533 if (CONSTANT_ADDRESS_P (XEXP (x, 0)))
2542 /* This rtx may not be shared. If it has already been seen,
2543 replace it with a copy of itself. */
2545 if (RTX_FLAG (x, used))
2549 copy = rtx_alloc (code);
2551 (sizeof (*copy) - sizeof (copy->fld)
2552 + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code)));
2556 RTX_FLAG (x, used) = 1;
2558 /* Now scan the subexpressions recursively.
2559 We can store any replaced subexpressions directly into X
2560 since we know X is not shared! Any vectors in X
2561 must be copied if X was copied. */
2563 format_ptr = GET_RTX_FORMAT (code);
2565 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2567 switch (*format_ptr++)
2570 XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
2574 if (XVEC (x, i) != NULL)
2577 int len = XVECLEN (x, i);
2579 if (copied && len > 0)
2580 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
2581 for (j = 0; j < len; j++)
2582 XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j));
2590 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2591 to look for shared sub-parts. */
2594 reset_used_flags (x)
2599 const char *format_ptr;
2604 code = GET_CODE (x);
2606 /* These types may be freely shared so we needn't do any resetting
2628 /* The chain of insns is not being copied. */
2635 RTX_FLAG (x, used) = 0;
2637 format_ptr = GET_RTX_FORMAT (code);
2638 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2640 switch (*format_ptr++)
2643 reset_used_flags (XEXP (x, i));
2647 for (j = 0; j < XVECLEN (x, i); j++)
2648 reset_used_flags (XVECEXP (x, i, j));
2654 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2655 Return X or the rtx for the pseudo reg the value of X was copied into.
2656 OTHER must be valid as a SET_DEST. */
2659 make_safe_from (x, other)
2663 switch (GET_CODE (other))
2666 other = SUBREG_REG (other);
2668 case STRICT_LOW_PART:
2671 other = XEXP (other, 0);
2677 if ((GET_CODE (other) == MEM
2679 && GET_CODE (x) != REG
2680 && GET_CODE (x) != SUBREG)
2681 || (GET_CODE (other) == REG
2682 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2683 || reg_mentioned_p (other, x))))
2685 rtx temp = gen_reg_rtx (GET_MODE (x));
2686 emit_move_insn (temp, x);
2692 /* Emission of insns (adding them to the doubly-linked list). */
2694 /* Return the first insn of the current sequence or current function. */
2702 /* Specify a new insn as the first in the chain. */
2705 set_first_insn (insn)
2708 if (PREV_INSN (insn) != 0)
2713 /* Return the last insn emitted in current sequence or current function. */
2721 /* Specify a new insn as the last in the chain. */
2724 set_last_insn (insn)
2727 if (NEXT_INSN (insn) != 0)
2732 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2735 get_last_insn_anywhere ()
2737 struct sequence_stack *stack;
2740 for (stack = seq_stack; stack; stack = stack->next)
2741 if (stack->last != 0)
2746 /* Return a number larger than any instruction's uid in this function. */
2751 return cur_insn_uid;
2754 /* Renumber instructions so that no instruction UIDs are wasted. */
2757 renumber_insns (stream)
2762 /* If we're not supposed to renumber instructions, don't. */
2763 if (!flag_renumber_insns)
2766 /* If there aren't that many instructions, then it's not really
2767 worth renumbering them. */
2768 if (flag_renumber_insns == 1 && get_max_uid () < 25000)
2773 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
2776 fprintf (stream, "Renumbering insn %d to %d\n",
2777 INSN_UID (insn), cur_insn_uid);
2778 INSN_UID (insn) = cur_insn_uid++;
2782 /* Return the next insn. If it is a SEQUENCE, return the first insn
2791 insn = NEXT_INSN (insn);
2792 if (insn && GET_CODE (insn) == INSN
2793 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2794 insn = XVECEXP (PATTERN (insn), 0, 0);
2800 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2804 previous_insn (insn)
2809 insn = PREV_INSN (insn);
2810 if (insn && GET_CODE (insn) == INSN
2811 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2812 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
2818 /* Return the next insn after INSN that is not a NOTE. This routine does not
2819 look inside SEQUENCEs. */
2822 next_nonnote_insn (insn)
2827 insn = NEXT_INSN (insn);
2828 if (insn == 0 || GET_CODE (insn) != NOTE)
2835 /* Return the previous insn before INSN that is not a NOTE. This routine does
2836 not look inside SEQUENCEs. */
2839 prev_nonnote_insn (insn)
2844 insn = PREV_INSN (insn);
2845 if (insn == 0 || GET_CODE (insn) != NOTE)
2852 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2853 or 0, if there is none. This routine does not look inside
2857 next_real_insn (insn)
2862 insn = NEXT_INSN (insn);
2863 if (insn == 0 || GET_CODE (insn) == INSN
2864 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
2871 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2872 or 0, if there is none. This routine does not look inside
2876 prev_real_insn (insn)
2881 insn = PREV_INSN (insn);
2882 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
2883 || GET_CODE (insn) == JUMP_INSN)
2890 /* Find the next insn after INSN that really does something. This routine
2891 does not look inside SEQUENCEs. Until reload has completed, this is the
2892 same as next_real_insn. */
2895 active_insn_p (insn)
2898 return (GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
2899 || (GET_CODE (insn) == INSN
2900 && (! reload_completed
2901 || (GET_CODE (PATTERN (insn)) != USE
2902 && GET_CODE (PATTERN (insn)) != CLOBBER))));
2906 next_active_insn (insn)
2911 insn = NEXT_INSN (insn);
2912 if (insn == 0 || active_insn_p (insn))
2919 /* Find the last insn before INSN that really does something. This routine
2920 does not look inside SEQUENCEs. Until reload has completed, this is the
2921 same as prev_real_insn. */
2924 prev_active_insn (insn)
2929 insn = PREV_INSN (insn);
2930 if (insn == 0 || active_insn_p (insn))
2937 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2945 insn = NEXT_INSN (insn);
2946 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2953 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
2961 insn = PREV_INSN (insn);
2962 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2970 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
2971 and REG_CC_USER notes so we can find it. */
2974 link_cc0_insns (insn)
2977 rtx user = next_nonnote_insn (insn);
2979 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
2980 user = XVECEXP (PATTERN (user), 0, 0);
2982 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn,
2984 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
2987 /* Return the next insn that uses CC0 after INSN, which is assumed to
2988 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
2989 applied to the result of this function should yield INSN).
2991 Normally, this is simply the next insn. However, if a REG_CC_USER note
2992 is present, it contains the insn that uses CC0.
2994 Return 0 if we can't find the insn. */
2997 next_cc0_user (insn)
3000 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
3003 return XEXP (note, 0);
3005 insn = next_nonnote_insn (insn);
3006 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
3007 insn = XVECEXP (PATTERN (insn), 0, 0);
3009 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
3015 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3016 note, it is the previous insn. */
3019 prev_cc0_setter (insn)
3022 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
3025 return XEXP (note, 0);
3027 insn = prev_nonnote_insn (insn);
3028 if (! sets_cc0_p (PATTERN (insn)))
3035 /* Increment the label uses for all labels present in rtx. */
3038 mark_label_nuses (x)
3045 code = GET_CODE (x);
3046 if (code == LABEL_REF)
3047 LABEL_NUSES (XEXP (x, 0))++;
3049 fmt = GET_RTX_FORMAT (code);
3050 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3053 mark_label_nuses (XEXP (x, i));
3054 else if (fmt[i] == 'E')
3055 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3056 mark_label_nuses (XVECEXP (x, i, j));
3061 /* Try splitting insns that can be split for better scheduling.
3062 PAT is the pattern which might split.
3063 TRIAL is the insn providing PAT.
3064 LAST is non-zero if we should return the last insn of the sequence produced.
3066 If this routine succeeds in splitting, it returns the first or last
3067 replacement insn depending on the value of LAST. Otherwise, it
3068 returns TRIAL. If the insn to be returned can be split, it will be. */
3071 try_split (pat, trial, last)
3075 rtx before = PREV_INSN (trial);
3076 rtx after = NEXT_INSN (trial);
3077 int has_barrier = 0;
3082 if (any_condjump_p (trial)
3083 && (note = find_reg_note (trial, REG_BR_PROB, 0)))
3084 split_branch_probability = INTVAL (XEXP (note, 0));
3085 probability = split_branch_probability;
3087 seq = split_insns (pat, trial);
3089 split_branch_probability = -1;
3091 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3092 We may need to handle this specially. */
3093 if (after && GET_CODE (after) == BARRIER)
3096 after = NEXT_INSN (after);
3101 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
3102 The latter case will normally arise only when being done so that
3103 it, in turn, will be split (SFmode on the 29k is an example). */
3104 if (GET_CODE (seq) == SEQUENCE)
3108 /* Avoid infinite loop if any insn of the result matches
3109 the original pattern. */
3110 for (i = 0; i < XVECLEN (seq, 0); i++)
3111 if (GET_CODE (XVECEXP (seq, 0, i)) == INSN
3112 && rtx_equal_p (PATTERN (XVECEXP (seq, 0, i)), pat))
3116 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
3117 if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN)
3119 rtx insn = XVECEXP (seq, 0, i);
3120 mark_jump_label (PATTERN (insn),
3121 XVECEXP (seq, 0, i), 0);
3123 if (probability != -1
3124 && any_condjump_p (insn)
3125 && !find_reg_note (insn, REG_BR_PROB, 0))
3127 /* We can preserve the REG_BR_PROB notes only if exactly
3128 one jump is created, otherwise the machine description
3129 is responsible for this step using
3130 split_branch_probability variable. */
3134 = gen_rtx_EXPR_LIST (REG_BR_PROB,
3135 GEN_INT (probability),
3140 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3141 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3142 if (GET_CODE (trial) == CALL_INSN)
3143 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
3144 if (GET_CODE (XVECEXP (seq, 0, i)) == CALL_INSN)
3145 CALL_INSN_FUNCTION_USAGE (XVECEXP (seq, 0, i))
3146 = CALL_INSN_FUNCTION_USAGE (trial);
3148 /* Copy notes, particularly those related to the CFG. */
3149 for (note = REG_NOTES (trial); note; note = XEXP (note, 1))
3151 switch (REG_NOTE_KIND (note))
3154 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
3156 rtx insn = XVECEXP (seq, 0, i);
3157 if (GET_CODE (insn) == CALL_INSN
3158 || (flag_non_call_exceptions
3159 && may_trap_p (PATTERN (insn))))
3161 = gen_rtx_EXPR_LIST (REG_EH_REGION,
3169 case REG_ALWAYS_RETURN:
3170 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
3172 rtx insn = XVECEXP (seq, 0, i);
3173 if (GET_CODE (insn) == CALL_INSN)
3175 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3181 case REG_NON_LOCAL_GOTO:
3182 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
3184 rtx insn = XVECEXP (seq, 0, i);
3185 if (GET_CODE (insn) == JUMP_INSN)
3187 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3198 /* If there are LABELS inside the split insns increment the
3199 usage count so we don't delete the label. */
3200 if (GET_CODE (trial) == INSN)
3201 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
3202 if (GET_CODE (XVECEXP (seq, 0, i)) == INSN)
3203 mark_label_nuses (PATTERN (XVECEXP (seq, 0, i)));
3205 tem = emit_insn_after (seq, trial);
3207 delete_insn (trial);
3209 emit_barrier_after (tem);
3211 /* Recursively call try_split for each new insn created; by the
3212 time control returns here that insn will be fully split, so
3213 set LAST and continue from the insn after the one returned.
3214 We can't use next_active_insn here since AFTER may be a note.
3215 Ignore deleted insns, which can be occur if not optimizing. */
3216 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
3217 if (! INSN_DELETED_P (tem) && INSN_P (tem))
3218 tem = try_split (PATTERN (tem), tem, 1);
3220 /* Avoid infinite loop if the result matches the original pattern. */
3221 else if (rtx_equal_p (seq, pat))
3225 PATTERN (trial) = seq;
3226 INSN_CODE (trial) = -1;
3227 try_split (seq, trial, last);
3230 /* Return either the first or the last insn, depending on which was
3233 ? (after ? PREV_INSN (after) : last_insn)
3234 : NEXT_INSN (before);
3240 /* Make and return an INSN rtx, initializing all its slots.
3241 Store PATTERN in the pattern slots. */
3244 make_insn_raw (pattern)
3249 insn = rtx_alloc (INSN);
3251 INSN_UID (insn) = cur_insn_uid++;
3252 PATTERN (insn) = pattern;
3253 INSN_CODE (insn) = -1;
3254 LOG_LINKS (insn) = NULL;
3255 REG_NOTES (insn) = NULL;
3256 INSN_SCOPE (insn) = NULL;
3257 BLOCK_FOR_INSN (insn) = NULL;
3259 #ifdef ENABLE_RTL_CHECKING
3262 && (returnjump_p (insn)
3263 || (GET_CODE (insn) == SET
3264 && SET_DEST (insn) == pc_rtx)))
3266 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
3274 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
3277 make_jump_insn_raw (pattern)
3282 insn = rtx_alloc (JUMP_INSN);
3283 INSN_UID (insn) = cur_insn_uid++;
3285 PATTERN (insn) = pattern;
3286 INSN_CODE (insn) = -1;
3287 LOG_LINKS (insn) = NULL;
3288 REG_NOTES (insn) = NULL;
3289 JUMP_LABEL (insn) = NULL;
3290 INSN_SCOPE (insn) = NULL;
3291 BLOCK_FOR_INSN (insn) = NULL;
3296 /* Like `make_insn' but make a CALL_INSN instead of an insn. */
3299 make_call_insn_raw (pattern)
3304 insn = rtx_alloc (CALL_INSN);
3305 INSN_UID (insn) = cur_insn_uid++;
3307 PATTERN (insn) = pattern;
3308 INSN_CODE (insn) = -1;
3309 LOG_LINKS (insn) = NULL;
3310 REG_NOTES (insn) = NULL;
3311 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
3312 INSN_SCOPE (insn) = NULL;
3313 BLOCK_FOR_INSN (insn) = NULL;
3318 /* Add INSN to the end of the doubly-linked list.
3319 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3325 PREV_INSN (insn) = last_insn;
3326 NEXT_INSN (insn) = 0;
3328 if (NULL != last_insn)
3329 NEXT_INSN (last_insn) = insn;
3331 if (NULL == first_insn)
3337 /* Add INSN into the doubly-linked list after insn AFTER. This and
3338 the next should be the only functions called to insert an insn once
3339 delay slots have been filled since only they know how to update a
3343 add_insn_after (insn, after)
3346 rtx next = NEXT_INSN (after);
3349 if (optimize && INSN_DELETED_P (after))
3352 NEXT_INSN (insn) = next;
3353 PREV_INSN (insn) = after;
3357 PREV_INSN (next) = insn;
3358 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3359 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
3361 else if (last_insn == after)
3365 struct sequence_stack *stack = seq_stack;
3366 /* Scan all pending sequences too. */
3367 for (; stack; stack = stack->next)
3368 if (after == stack->last)
3378 if (GET_CODE (after) != BARRIER
3379 && GET_CODE (insn) != BARRIER
3380 && (bb = BLOCK_FOR_INSN (after)))
3382 set_block_for_insn (insn, bb);
3384 bb->flags |= BB_DIRTY;
3385 /* Should not happen as first in the BB is always
3386 either NOTE or LABEL. */
3387 if (bb->end == after
3388 /* Avoid clobbering of structure when creating new BB. */
3389 && GET_CODE (insn) != BARRIER
3390 && (GET_CODE (insn) != NOTE
3391 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3395 NEXT_INSN (after) = insn;
3396 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
3398 rtx sequence = PATTERN (after);
3399 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3403 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3404 the previous should be the only functions called to insert an insn once
3405 delay slots have been filled since only they know how to update a
3409 add_insn_before (insn, before)
3412 rtx prev = PREV_INSN (before);
3415 if (optimize && INSN_DELETED_P (before))
3418 PREV_INSN (insn) = prev;
3419 NEXT_INSN (insn) = before;
3423 NEXT_INSN (prev) = insn;
3424 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3426 rtx sequence = PATTERN (prev);
3427 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3430 else if (first_insn == before)
3434 struct sequence_stack *stack = seq_stack;
3435 /* Scan all pending sequences too. */
3436 for (; stack; stack = stack->next)
3437 if (before == stack->first)
3439 stack->first = insn;
3447 if (GET_CODE (before) != BARRIER
3448 && GET_CODE (insn) != BARRIER
3449 && (bb = BLOCK_FOR_INSN (before)))
3451 set_block_for_insn (insn, bb);
3453 bb->flags |= BB_DIRTY;
3454 /* Should not happen as first in the BB is always
3455 either NOTE or LABEl. */
3456 if (bb->head == insn
3457 /* Avoid clobbering of structure when creating new BB. */
3458 && GET_CODE (insn) != BARRIER
3459 && (GET_CODE (insn) != NOTE
3460 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3464 PREV_INSN (before) = insn;
3465 if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE)
3466 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
3469 /* Remove an insn from its doubly-linked list. This function knows how
3470 to handle sequences. */
3475 rtx next = NEXT_INSN (insn);
3476 rtx prev = PREV_INSN (insn);
3481 NEXT_INSN (prev) = next;
3482 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3484 rtx sequence = PATTERN (prev);
3485 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
3488 else if (first_insn == insn)
3492 struct sequence_stack *stack = seq_stack;
3493 /* Scan all pending sequences too. */
3494 for (; stack; stack = stack->next)
3495 if (insn == stack->first)
3497 stack->first = next;
3507 PREV_INSN (next) = prev;
3508 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3509 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
3511 else if (last_insn == insn)
3515 struct sequence_stack *stack = seq_stack;
3516 /* Scan all pending sequences too. */
3517 for (; stack; stack = stack->next)
3518 if (insn == stack->last)
3527 if (GET_CODE (insn) != BARRIER
3528 && (bb = BLOCK_FOR_INSN (insn)))
3531 bb->flags |= BB_DIRTY;
3532 if (bb->head == insn)
3534 /* Never ever delete the basic block note without deleting whole
3536 if (GET_CODE (insn) == NOTE)
3540 if (bb->end == insn)
3545 /* Delete all insns made since FROM.
3546 FROM becomes the new last instruction. */
3549 delete_insns_since (from)
3555 NEXT_INSN (from) = 0;
3559 /* This function is deprecated, please use sequences instead.
3561 Move a consecutive bunch of insns to a different place in the chain.
3562 The insns to be moved are those between FROM and TO.
3563 They are moved to a new position after the insn AFTER.
3564 AFTER must not be FROM or TO or any insn in between.
3566 This function does not know about SEQUENCEs and hence should not be
3567 called after delay-slot filling has been done. */
3570 reorder_insns_nobb (from, to, after)
3571 rtx from, to, after;
3573 /* Splice this bunch out of where it is now. */
3574 if (PREV_INSN (from))
3575 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
3577 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
3578 if (last_insn == to)
3579 last_insn = PREV_INSN (from);
3580 if (first_insn == from)
3581 first_insn = NEXT_INSN (to);
3583 /* Make the new neighbors point to it and it to them. */
3584 if (NEXT_INSN (after))
3585 PREV_INSN (NEXT_INSN (after)) = to;
3587 NEXT_INSN (to) = NEXT_INSN (after);
3588 PREV_INSN (from) = after;
3589 NEXT_INSN (after) = from;
3590 if (after == last_insn)
3594 /* Same as function above, but take care to update BB boundaries. */
3596 reorder_insns (from, to, after)
3597 rtx from, to, after;
3599 rtx prev = PREV_INSN (from);
3600 basic_block bb, bb2;
3602 reorder_insns_nobb (from, to, after);
3604 if (GET_CODE (after) != BARRIER
3605 && (bb = BLOCK_FOR_INSN (after)))
3608 bb->flags |= BB_DIRTY;
3610 if (GET_CODE (from) != BARRIER
3611 && (bb2 = BLOCK_FOR_INSN (from)))
3615 bb2->flags |= BB_DIRTY;
3618 if (bb->end == after)
3621 for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
3622 set_block_for_insn (x, bb);
3626 /* Return the line note insn preceding INSN. */
3629 find_line_note (insn)
3632 if (no_line_numbers)
3635 for (; insn; insn = PREV_INSN (insn))
3636 if (GET_CODE (insn) == NOTE
3637 && NOTE_LINE_NUMBER (insn) >= 0)
3643 /* Like reorder_insns, but inserts line notes to preserve the line numbers
3644 of the moved insns when debugging. This may insert a note between AFTER
3645 and FROM, and another one after TO. */
3648 reorder_insns_with_line_notes (from, to, after)
3649 rtx from, to, after;
3651 rtx from_line = find_line_note (from);
3652 rtx after_line = find_line_note (after);
3654 reorder_insns (from, to, after);
3656 if (from_line == after_line)
3660 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
3661 NOTE_LINE_NUMBER (from_line),
3664 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
3665 NOTE_LINE_NUMBER (after_line),
3669 /* Remove unnecessary notes from the instruction stream. */
3672 remove_unnecessary_notes ()
3674 rtx block_stack = NULL_RTX;
3675 rtx eh_stack = NULL_RTX;
3680 /* We must not remove the first instruction in the function because
3681 the compiler depends on the first instruction being a note. */
3682 for (insn = NEXT_INSN (get_insns ()); insn; insn = next)
3684 /* Remember what's next. */
3685 next = NEXT_INSN (insn);
3687 /* We're only interested in notes. */
3688 if (GET_CODE (insn) != NOTE)
3691 switch (NOTE_LINE_NUMBER (insn))
3693 case NOTE_INSN_DELETED:
3694 case NOTE_INSN_LOOP_END_TOP_COND:
3698 case NOTE_INSN_EH_REGION_BEG:
3699 eh_stack = alloc_INSN_LIST (insn, eh_stack);
3702 case NOTE_INSN_EH_REGION_END:
3703 /* Too many end notes. */
3704 if (eh_stack == NULL_RTX)
3706 /* Mismatched nesting. */
3707 if (NOTE_EH_HANDLER (XEXP (eh_stack, 0)) != NOTE_EH_HANDLER (insn))
3710 eh_stack = XEXP (eh_stack, 1);
3711 free_INSN_LIST_node (tmp);
3714 case NOTE_INSN_BLOCK_BEG:
3715 /* By now, all notes indicating lexical blocks should have
3716 NOTE_BLOCK filled in. */
3717 if (NOTE_BLOCK (insn) == NULL_TREE)
3719 block_stack = alloc_INSN_LIST (insn, block_stack);
3722 case NOTE_INSN_BLOCK_END:
3723 /* Too many end notes. */
3724 if (block_stack == NULL_RTX)
3726 /* Mismatched nesting. */
3727 if (NOTE_BLOCK (XEXP (block_stack, 0)) != NOTE_BLOCK (insn))
3730 block_stack = XEXP (block_stack, 1);
3731 free_INSN_LIST_node (tmp);
3733 /* Scan back to see if there are any non-note instructions
3734 between INSN and the beginning of this block. If not,
3735 then there is no PC range in the generated code that will
3736 actually be in this block, so there's no point in
3737 remembering the existence of the block. */
3738 for (tmp = PREV_INSN (insn); tmp; tmp = PREV_INSN (tmp))
3740 /* This block contains a real instruction. Note that we
3741 don't include labels; if the only thing in the block
3742 is a label, then there are still no PC values that
3743 lie within the block. */
3747 /* We're only interested in NOTEs. */
3748 if (GET_CODE (tmp) != NOTE)
3751 if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_BEG)
3753 /* We just verified that this BLOCK matches us with
3754 the block_stack check above. Never delete the
3755 BLOCK for the outermost scope of the function; we
3756 can refer to names from that scope even if the
3757 block notes are messed up. */
3758 if (! is_body_block (NOTE_BLOCK (insn))
3759 && (*debug_hooks->ignore_block) (NOTE_BLOCK (insn)))
3766 else if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_END)
3767 /* There's a nested block. We need to leave the
3768 current block in place since otherwise the debugger
3769 wouldn't be able to show symbols from our block in
3770 the nested block. */
3776 /* Too many begin notes. */
3777 if (block_stack || eh_stack)
3782 /* Emit an insn of given code and pattern
3783 at a specified place within the doubly-linked list. */
3785 /* Make an instruction with body PATTERN
3786 and output it before the instruction BEFORE. */
3789 emit_insn_before (pattern, before)
3790 rtx pattern, before;
3794 if (GET_CODE (pattern) == SEQUENCE)
3798 for (i = 0; i < XVECLEN (pattern, 0); i++)
3800 insn = XVECEXP (pattern, 0, i);
3801 add_insn_before (insn, before);
3806 insn = make_insn_raw (pattern);
3807 add_insn_before (insn, before);
3813 /* Make an instruction with body PATTERN and code JUMP_INSN
3814 and output it before the instruction BEFORE. */
3817 emit_jump_insn_before (pattern, before)
3818 rtx pattern, before;
3822 if (GET_CODE (pattern) == SEQUENCE)
3823 insn = emit_insn_before (pattern, before);
3826 insn = make_jump_insn_raw (pattern);
3827 add_insn_before (insn, before);
3833 /* Make an instruction with body PATTERN and code CALL_INSN
3834 and output it before the instruction BEFORE. */
3837 emit_call_insn_before (pattern, before)
3838 rtx pattern, before;
3842 if (GET_CODE (pattern) == SEQUENCE)
3843 insn = emit_insn_before (pattern, before);
3846 insn = make_call_insn_raw (pattern);
3847 add_insn_before (insn, before);
3848 PUT_CODE (insn, CALL_INSN);
3854 /* Make an instruction with body PATTERN and code CALL_INSN
3855 and output it before the instruction BEFORE. */
3858 emit_call_insn_after (pattern, before)
3859 rtx pattern, before;
3863 if (GET_CODE (pattern) == SEQUENCE)
3864 insn = emit_insn_after (pattern, before);
3867 insn = make_call_insn_raw (pattern);
3868 add_insn_after (insn, before);
3869 PUT_CODE (insn, CALL_INSN);
3875 /* Make an insn of code BARRIER
3876 and output it before the insn BEFORE. */
3879 emit_barrier_before (before)
3882 rtx insn = rtx_alloc (BARRIER);
3884 INSN_UID (insn) = cur_insn_uid++;
3886 add_insn_before (insn, before);
3890 /* Emit the label LABEL before the insn BEFORE. */
3893 emit_label_before (label, before)
3896 /* This can be called twice for the same label as a result of the
3897 confusion that follows a syntax error! So make it harmless. */
3898 if (INSN_UID (label) == 0)
3900 INSN_UID (label) = cur_insn_uid++;
3901 add_insn_before (label, before);
3907 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
3910 emit_note_before (subtype, before)
3914 rtx note = rtx_alloc (NOTE);
3915 INSN_UID (note) = cur_insn_uid++;
3916 NOTE_SOURCE_FILE (note) = 0;
3917 NOTE_LINE_NUMBER (note) = subtype;
3918 BLOCK_FOR_INSN (note) = NULL;
3920 add_insn_before (note, before);
3924 /* Make an insn of code INSN with body PATTERN
3925 and output it after the insn AFTER. */
3928 emit_insn_after (pattern, after)
3933 if (GET_CODE (pattern) == SEQUENCE)
3937 for (i = 0; i < XVECLEN (pattern, 0); i++)
3939 insn = XVECEXP (pattern, 0, i);
3940 add_insn_after (insn, after);
3946 insn = make_insn_raw (pattern);
3947 add_insn_after (insn, after);
3953 /* Similar to emit_insn_after, except that line notes are to be inserted so
3954 as to act as if this insn were at FROM. */
3957 emit_insn_after_with_line_notes (pattern, after, from)
3958 rtx pattern, after, from;
3960 rtx from_line = find_line_note (from);
3961 rtx after_line = find_line_note (after);
3962 rtx insn = emit_insn_after (pattern, after);
3965 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
3966 NOTE_LINE_NUMBER (from_line),
3970 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
3971 NOTE_LINE_NUMBER (after_line),
3975 /* Make an insn of code JUMP_INSN with body PATTERN
3976 and output it after the insn AFTER. */
3979 emit_jump_insn_after (pattern, after)
3984 if (GET_CODE (pattern) == SEQUENCE)
3985 insn = emit_insn_after (pattern, after);
3988 insn = make_jump_insn_raw (pattern);
3989 add_insn_after (insn, after);
3995 /* Make an insn of code BARRIER
3996 and output it after the insn AFTER. */
3999 emit_barrier_after (after)
4002 rtx insn = rtx_alloc (BARRIER);
4004 INSN_UID (insn) = cur_insn_uid++;
4006 add_insn_after (insn, after);
4010 /* Emit the label LABEL after the insn AFTER. */
4013 emit_label_after (label, after)
4016 /* This can be called twice for the same label
4017 as a result of the confusion that follows a syntax error!
4018 So make it harmless. */
4019 if (INSN_UID (label) == 0)
4021 INSN_UID (label) = cur_insn_uid++;
4022 add_insn_after (label, after);
4028 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4031 emit_note_after (subtype, after)
4035 rtx note = rtx_alloc (NOTE);
4036 INSN_UID (note) = cur_insn_uid++;
4037 NOTE_SOURCE_FILE (note) = 0;
4038 NOTE_LINE_NUMBER (note) = subtype;
4039 BLOCK_FOR_INSN (note) = NULL;
4040 add_insn_after (note, after);
4044 /* Emit a line note for FILE and LINE after the insn AFTER. */
4047 emit_line_note_after (file, line, after)
4054 if (no_line_numbers && line > 0)
4060 note = rtx_alloc (NOTE);
4061 INSN_UID (note) = cur_insn_uid++;
4062 NOTE_SOURCE_FILE (note) = file;
4063 NOTE_LINE_NUMBER (note) = line;
4064 BLOCK_FOR_INSN (note) = NULL;
4065 add_insn_after (note, after);
4069 /* Make an insn of code INSN with pattern PATTERN
4070 and add it to the end of the doubly-linked list.
4071 If PATTERN is a SEQUENCE, take the elements of it
4072 and emit an insn for each element.
4074 Returns the last insn emitted. */
4080 rtx insn = last_insn;
4082 if (GET_CODE (pattern) == SEQUENCE)
4086 for (i = 0; i < XVECLEN (pattern, 0); i++)
4088 insn = XVECEXP (pattern, 0, i);
4094 insn = make_insn_raw (pattern);
4101 /* Emit the insns in a chain starting with INSN.
4102 Return the last insn emitted. */
4112 rtx next = NEXT_INSN (insn);
4121 /* Emit the insns in a chain starting with INSN and place them in front of
4122 the insn BEFORE. Return the last insn emitted. */
4125 emit_insns_before (insn, before)
4133 rtx next = NEXT_INSN (insn);
4134 add_insn_before (insn, before);
4142 /* Emit the insns in a chain starting with FIRST and place them in back of
4143 the insn AFTER. Return the last insn emitted. */
4146 emit_insns_after (first, after)
4160 if (GET_CODE (after) != BARRIER
4161 && (bb = BLOCK_FOR_INSN (after)))
4163 bb->flags |= BB_DIRTY;
4164 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4165 if (GET_CODE (last) != BARRIER)
4166 set_block_for_insn (last, bb);
4167 if (GET_CODE (last) != BARRIER)
4168 set_block_for_insn (last, bb);
4169 if (bb->end == after)
4173 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4176 after_after = NEXT_INSN (after);
4178 NEXT_INSN (after) = first;
4179 PREV_INSN (first) = after;
4180 NEXT_INSN (last) = after_after;
4182 PREV_INSN (after_after) = last;
4184 if (after == last_insn)
4189 /* Make an insn of code JUMP_INSN with pattern PATTERN
4190 and add it to the end of the doubly-linked list. */
4193 emit_jump_insn (pattern)
4196 if (GET_CODE (pattern) == SEQUENCE)
4197 return emit_insn (pattern);
4200 rtx insn = make_jump_insn_raw (pattern);
4206 /* Make an insn of code CALL_INSN with pattern PATTERN
4207 and add it to the end of the doubly-linked list. */
4210 emit_call_insn (pattern)
4213 if (GET_CODE (pattern) == SEQUENCE)
4214 return emit_insn (pattern);
4217 rtx insn = make_call_insn_raw (pattern);
4219 PUT_CODE (insn, CALL_INSN);
4224 /* Add the label LABEL to the end of the doubly-linked list. */
4230 /* This can be called twice for the same label
4231 as a result of the confusion that follows a syntax error!
4232 So make it harmless. */
4233 if (INSN_UID (label) == 0)
4235 INSN_UID (label) = cur_insn_uid++;
4241 /* Make an insn of code BARRIER
4242 and add it to the end of the doubly-linked list. */
4247 rtx barrier = rtx_alloc (BARRIER);
4248 INSN_UID (barrier) = cur_insn_uid++;
4253 /* Make an insn of code NOTE
4254 with data-fields specified by FILE and LINE
4255 and add it to the end of the doubly-linked list,
4256 but only if line-numbers are desired for debugging info. */
4259 emit_line_note (file, line)
4263 set_file_and_line_for_stmt (file, line);
4266 if (no_line_numbers)
4270 return emit_note (file, line);
4273 /* Make an insn of code NOTE
4274 with data-fields specified by FILE and LINE
4275 and add it to the end of the doubly-linked list.
4276 If it is a line-number NOTE, omit it if it matches the previous one. */
4279 emit_note (file, line)
4287 if (file && last_filename && !strcmp (file, last_filename)
4288 && line == last_linenum)
4290 last_filename = file;
4291 last_linenum = line;
4294 if (no_line_numbers && line > 0)
4300 note = rtx_alloc (NOTE);
4301 INSN_UID (note) = cur_insn_uid++;
4302 NOTE_SOURCE_FILE (note) = file;
4303 NOTE_LINE_NUMBER (note) = line;
4304 BLOCK_FOR_INSN (note) = NULL;
4309 /* Emit a NOTE, and don't omit it even if LINE is the previous note. */
4312 emit_line_note_force (file, line)
4317 return emit_line_note (file, line);
4320 /* Cause next statement to emit a line note even if the line number
4321 has not changed. This is used at the beginning of a function. */
4324 force_next_line_note ()
4329 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4330 note of this type already exists, remove it first. */
4333 set_unique_reg_note (insn, kind, datum)
4338 rtx note = find_reg_note (insn, kind, NULL_RTX);
4344 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4345 has multiple sets (some callers assume single_set
4346 means the insn only has one set, when in fact it
4347 means the insn only has one * useful * set). */
4348 if (GET_CODE (PATTERN (insn)) == PARALLEL && multiple_sets (insn))
4355 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4356 It serves no useful purpose and breaks eliminate_regs. */
4357 if (GET_CODE (datum) == ASM_OPERANDS)
4367 XEXP (note, 0) = datum;
4371 REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn));
4372 return REG_NOTES (insn);
4375 /* Return an indication of which type of insn should have X as a body.
4376 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
4382 if (GET_CODE (x) == CODE_LABEL)
4384 if (GET_CODE (x) == CALL)
4386 if (GET_CODE (x) == RETURN)
4388 if (GET_CODE (x) == SET)
4390 if (SET_DEST (x) == pc_rtx)
4392 else if (GET_CODE (SET_SRC (x)) == CALL)
4397 if (GET_CODE (x) == PARALLEL)
4400 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
4401 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
4403 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4404 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
4406 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4407 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
4413 /* Emit the rtl pattern X as an appropriate kind of insn.
4414 If X is a label, it is simply added into the insn chain. */
4420 enum rtx_code code = classify_insn (x);
4422 if (code == CODE_LABEL)
4423 return emit_label (x);
4424 else if (code == INSN)
4425 return emit_insn (x);
4426 else if (code == JUMP_INSN)
4428 rtx insn = emit_jump_insn (x);
4429 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
4430 return emit_barrier ();
4433 else if (code == CALL_INSN)
4434 return emit_call_insn (x);
4439 /* Begin emitting insns to a sequence which can be packaged in an
4440 RTL_EXPR. If this sequence will contain something that might cause
4441 the compiler to pop arguments to function calls (because those
4442 pops have previously been deferred; see INHIBIT_DEFER_POP for more
4443 details), use do_pending_stack_adjust before calling this function.
4444 That will ensure that the deferred pops are not accidentally
4445 emitted in the middle of this sequence. */
4450 struct sequence_stack *tem;
4452 tem = (struct sequence_stack *) xmalloc (sizeof (struct sequence_stack));
4454 tem->next = seq_stack;
4455 tem->first = first_insn;
4456 tem->last = last_insn;
4457 tem->sequence_rtl_expr = seq_rtl_expr;
4465 /* Similarly, but indicate that this sequence will be placed in T, an
4466 RTL_EXPR. See the documentation for start_sequence for more
4467 information about how to use this function. */
4470 start_sequence_for_rtl_expr (t)
4478 /* Set up the insn chain starting with FIRST as the current sequence,
4479 saving the previously current one. See the documentation for
4480 start_sequence for more information about how to use this function. */
4483 push_to_sequence (first)
4490 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
4496 /* Set up the insn chain from a chain stort in FIRST to LAST. */
4499 push_to_full_sequence (first, last)
4505 /* We really should have the end of the insn chain here. */
4506 if (last && NEXT_INSN (last))
4510 /* Set up the outer-level insn chain
4511 as the current sequence, saving the previously current one. */
4514 push_topmost_sequence ()
4516 struct sequence_stack *stack, *top = NULL;
4520 for (stack = seq_stack; stack; stack = stack->next)
4523 first_insn = top->first;
4524 last_insn = top->last;
4525 seq_rtl_expr = top->sequence_rtl_expr;
4528 /* After emitting to the outer-level insn chain, update the outer-level
4529 insn chain, and restore the previous saved state. */
4532 pop_topmost_sequence ()
4534 struct sequence_stack *stack, *top = NULL;
4536 for (stack = seq_stack; stack; stack = stack->next)
4539 top->first = first_insn;
4540 top->last = last_insn;
4541 /* ??? Why don't we save seq_rtl_expr here? */
4546 /* After emitting to a sequence, restore previous saved state.
4548 To get the contents of the sequence just made, you must call
4549 `gen_sequence' *before* calling here.
4551 If the compiler might have deferred popping arguments while
4552 generating this sequence, and this sequence will not be immediately
4553 inserted into the instruction stream, use do_pending_stack_adjust
4554 before calling gen_sequence. That will ensure that the deferred
4555 pops are inserted into this sequence, and not into some random
4556 location in the instruction stream. See INHIBIT_DEFER_POP for more
4557 information about deferred popping of arguments. */
4562 struct sequence_stack *tem = seq_stack;
4564 first_insn = tem->first;
4565 last_insn = tem->last;
4566 seq_rtl_expr = tem->sequence_rtl_expr;
4567 seq_stack = tem->next;
4572 /* This works like end_sequence, but records the old sequence in FIRST
4576 end_full_sequence (first, last)
4579 *first = first_insn;
4584 /* Return 1 if currently emitting into a sequence. */
4589 return seq_stack != 0;
4592 /* Generate a SEQUENCE rtx containing the insns already emitted
4593 to the current sequence.
4595 This is how the gen_... function from a DEFINE_EXPAND
4596 constructs the SEQUENCE that it returns. */
4606 /* Count the insns in the chain. */
4608 for (tem = first_insn; tem; tem = NEXT_INSN (tem))
4611 /* If only one insn, return it rather than a SEQUENCE.
4612 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
4613 the case of an empty list.)
4614 We only return the pattern of an insn if its code is INSN and it
4615 has no notes. This ensures that no information gets lost. */
4617 && GET_CODE (first_insn) == INSN
4618 && ! RTX_FRAME_RELATED_P (first_insn)
4619 /* Don't throw away any reg notes. */
4620 && REG_NOTES (first_insn) == 0)
4621 return PATTERN (first_insn);
4623 result = gen_rtx_SEQUENCE (VOIDmode, rtvec_alloc (len));
4625 for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++)
4626 XVECEXP (result, 0, i) = tem;
4631 /* Put the various virtual registers into REGNO_REG_RTX. */
4634 init_virtual_regs (es)
4635 struct emit_status *es;
4637 rtx *ptr = es->x_regno_reg_rtx;
4638 ptr[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
4639 ptr[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
4640 ptr[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
4641 ptr[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
4642 ptr[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
4646 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
4647 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
4648 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
4649 static int copy_insn_n_scratches;
4651 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4652 copied an ASM_OPERANDS.
4653 In that case, it is the original input-operand vector. */
4654 static rtvec orig_asm_operands_vector;
4656 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4657 copied an ASM_OPERANDS.
4658 In that case, it is the copied input-operand vector. */
4659 static rtvec copy_asm_operands_vector;
4661 /* Likewise for the constraints vector. */
4662 static rtvec orig_asm_constraints_vector;
4663 static rtvec copy_asm_constraints_vector;
4665 /* Recursively create a new copy of an rtx for copy_insn.
4666 This function differs from copy_rtx in that it handles SCRATCHes and
4667 ASM_OPERANDs properly.
4668 Normally, this function is not used directly; use copy_insn as front end.
4669 However, you could first copy an insn pattern with copy_insn and then use
4670 this function afterwards to properly copy any REG_NOTEs containing
4680 const char *format_ptr;
4682 code = GET_CODE (orig);
4699 for (i = 0; i < copy_insn_n_scratches; i++)
4700 if (copy_insn_scratch_in[i] == orig)
4701 return copy_insn_scratch_out[i];
4705 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
4706 a LABEL_REF, it isn't sharable. */
4707 if (GET_CODE (XEXP (orig, 0)) == PLUS
4708 && GET_CODE (XEXP (XEXP (orig, 0), 0)) == SYMBOL_REF
4709 && GET_CODE (XEXP (XEXP (orig, 0), 1)) == CONST_INT)
4713 /* A MEM with a constant address is not sharable. The problem is that
4714 the constant address may need to be reloaded. If the mem is shared,
4715 then reloading one copy of this mem will cause all copies to appear
4716 to have been reloaded. */
4722 copy = rtx_alloc (code);
4724 /* Copy the various flags, and other information. We assume that
4725 all fields need copying, and then clear the fields that should
4726 not be copied. That is the sensible default behavior, and forces
4727 us to explicitly document why we are *not* copying a flag. */
4728 memcpy (copy, orig, sizeof (struct rtx_def) - sizeof (rtunion));
4730 /* We do not copy the USED flag, which is used as a mark bit during
4731 walks over the RTL. */
4732 RTX_FLAG (copy, used) = 0;
4734 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
4735 if (GET_RTX_CLASS (code) == 'i')
4737 RTX_FLAG (copy, jump) = 0;
4738 RTX_FLAG (copy, call) = 0;
4739 RTX_FLAG (copy, frame_related) = 0;
4742 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
4744 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
4746 copy->fld[i] = orig->fld[i];
4747 switch (*format_ptr++)
4750 if (XEXP (orig, i) != NULL)
4751 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
4756 if (XVEC (orig, i) == orig_asm_constraints_vector)
4757 XVEC (copy, i) = copy_asm_constraints_vector;
4758 else if (XVEC (orig, i) == orig_asm_operands_vector)
4759 XVEC (copy, i) = copy_asm_operands_vector;
4760 else if (XVEC (orig, i) != NULL)
4762 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
4763 for (j = 0; j < XVECLEN (copy, i); j++)
4764 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
4775 /* These are left unchanged. */
4783 if (code == SCRATCH)
4785 i = copy_insn_n_scratches++;
4786 if (i >= MAX_RECOG_OPERANDS)
4788 copy_insn_scratch_in[i] = orig;
4789 copy_insn_scratch_out[i] = copy;
4791 else if (code == ASM_OPERANDS)
4793 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
4794 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
4795 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
4796 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
4802 /* Create a new copy of an rtx.
4803 This function differs from copy_rtx in that it handles SCRATCHes and
4804 ASM_OPERANDs properly.
4805 INSN doesn't really have to be a full INSN; it could be just the
4811 copy_insn_n_scratches = 0;
4812 orig_asm_operands_vector = 0;
4813 orig_asm_constraints_vector = 0;
4814 copy_asm_operands_vector = 0;
4815 copy_asm_constraints_vector = 0;
4816 return copy_insn_1 (insn);
4819 /* Initialize data structures and variables in this file
4820 before generating rtl for each function. */
4825 struct function *f = cfun;
4827 f->emit = (struct emit_status *) xmalloc (sizeof (struct emit_status));
4830 seq_rtl_expr = NULL;
4832 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
4835 first_label_num = label_num;
4839 /* Init the tables that describe all the pseudo regs. */
4841 f->emit->regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
4843 f->emit->regno_pointer_align
4844 = (unsigned char *) xcalloc (f->emit->regno_pointer_align_length,
4845 sizeof (unsigned char));
4848 = (rtx *) xcalloc (f->emit->regno_pointer_align_length, sizeof (rtx));
4851 = (tree *) xcalloc (f->emit->regno_pointer_align_length, sizeof (tree));
4853 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
4854 init_virtual_regs (f->emit);
4856 /* Indicate that the virtual registers and stack locations are
4858 REG_POINTER (stack_pointer_rtx) = 1;
4859 REG_POINTER (frame_pointer_rtx) = 1;
4860 REG_POINTER (hard_frame_pointer_rtx) = 1;
4861 REG_POINTER (arg_pointer_rtx) = 1;
4863 REG_POINTER (virtual_incoming_args_rtx) = 1;
4864 REG_POINTER (virtual_stack_vars_rtx) = 1;
4865 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
4866 REG_POINTER (virtual_outgoing_args_rtx) = 1;
4867 REG_POINTER (virtual_cfa_rtx) = 1;
4869 #ifdef STACK_BOUNDARY
4870 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
4871 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
4872 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
4873 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
4875 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
4876 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
4877 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
4878 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
4879 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
4882 #ifdef INIT_EXPANDERS
4887 /* Mark SS for GC. */
4890 mark_sequence_stack (ss)
4891 struct sequence_stack *ss;
4895 ggc_mark_rtx (ss->first);
4896 ggc_mark_tree (ss->sequence_rtl_expr);
4901 /* Mark ES for GC. */
4904 mark_emit_status (es)
4905 struct emit_status *es;
4914 for (i = es->regno_pointer_align_length, r = es->x_regno_reg_rtx,
4916 i > 0; --i, ++r, ++t)
4922 mark_sequence_stack (es->sequence_stack);
4923 ggc_mark_tree (es->sequence_rtl_expr);
4924 ggc_mark_rtx (es->x_first_insn);
4927 /* Generate the constant 0. */
4930 gen_const_vector_0 (mode)
4931 enum machine_mode mode;
4936 enum machine_mode inner;
4938 units = GET_MODE_NUNITS (mode);
4939 inner = GET_MODE_INNER (mode);
4941 v = rtvec_alloc (units);
4943 /* We need to call this function after we to set CONST0_RTX first. */
4944 if (!CONST0_RTX (inner))
4947 for (i = 0; i < units; ++i)
4948 RTVEC_ELT (v, i) = CONST0_RTX (inner);
4950 tem = gen_rtx_CONST_VECTOR (mode, v);
4954 /* Create some permanent unique rtl objects shared between all functions.
4955 LINE_NUMBERS is nonzero if line numbers are to be generated. */
4958 init_emit_once (line_numbers)
4962 enum machine_mode mode;
4963 enum machine_mode double_mode;
4965 /* Initialize the CONST_INT, CONST_DOUBLE, and memory attribute hash
4967 const_int_htab = htab_create (37, const_int_htab_hash,
4968 const_int_htab_eq, NULL);
4969 ggc_add_deletable_htab (const_int_htab, 0, 0);
4971 const_double_htab = htab_create (37, const_double_htab_hash,
4972 const_double_htab_eq, NULL);
4973 ggc_add_deletable_htab (const_double_htab, 0, 0);
4975 mem_attrs_htab = htab_create (37, mem_attrs_htab_hash,
4976 mem_attrs_htab_eq, NULL);
4977 ggc_add_deletable_htab (mem_attrs_htab, 0, mem_attrs_mark);
4979 no_line_numbers = ! line_numbers;
4981 /* Compute the word and byte modes. */
4983 byte_mode = VOIDmode;
4984 word_mode = VOIDmode;
4985 double_mode = VOIDmode;
4987 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
4988 mode = GET_MODE_WIDER_MODE (mode))
4990 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
4991 && byte_mode == VOIDmode)
4994 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
4995 && word_mode == VOIDmode)
4999 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
5000 mode = GET_MODE_WIDER_MODE (mode))
5002 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
5003 && double_mode == VOIDmode)
5007 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
5009 /* Assign register numbers to the globally defined register rtx.
5010 This must be done at runtime because the register number field
5011 is in a union and some compilers can't initialize unions. */
5013 pc_rtx = gen_rtx (PC, VOIDmode);
5014 cc0_rtx = gen_rtx (CC0, VOIDmode);
5015 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
5016 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
5017 if (hard_frame_pointer_rtx == 0)
5018 hard_frame_pointer_rtx = gen_raw_REG (Pmode,
5019 HARD_FRAME_POINTER_REGNUM);
5020 if (arg_pointer_rtx == 0)
5021 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
5022 virtual_incoming_args_rtx =
5023 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
5024 virtual_stack_vars_rtx =
5025 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
5026 virtual_stack_dynamic_rtx =
5027 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
5028 virtual_outgoing_args_rtx =
5029 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
5030 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
5032 /* These rtx must be roots if GC is enabled. */
5033 ggc_add_rtx_root (global_rtl, GR_MAX);
5035 #ifdef INIT_EXPANDERS
5036 /* This is to initialize {init|mark|free}_machine_status before the first
5037 call to push_function_context_to. This is needed by the Chill front
5038 end which calls push_function_context_to before the first call to
5039 init_function_start. */
5043 /* Create the unique rtx's for certain rtx codes and operand values. */
5045 /* Don't use gen_rtx here since gen_rtx in this case
5046 tries to use these variables. */
5047 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
5048 const_int_rtx[i + MAX_SAVED_CONST_INT] =
5049 gen_rtx_raw_CONST_INT (VOIDmode, i);
5050 ggc_add_rtx_root (const_int_rtx, 2 * MAX_SAVED_CONST_INT + 1);
5052 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
5053 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
5054 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
5056 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
5058 REAL_VALUE_FROM_INT (dconst0, 0, 0, double_mode);
5059 REAL_VALUE_FROM_INT (dconst1, 1, 0, double_mode);
5060 REAL_VALUE_FROM_INT (dconst2, 2, 0, double_mode);
5061 REAL_VALUE_FROM_INT (dconstm1, -1, -1, double_mode);
5063 for (i = 0; i <= 2; i++)
5065 REAL_VALUE_TYPE *r =
5066 (i == 0 ? &dconst0 : i == 1 ? &dconst1 : &dconst2);
5068 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
5069 mode = GET_MODE_WIDER_MODE (mode))
5070 const_tiny_rtx[i][(int) mode] =
5071 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5073 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
5075 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
5076 mode = GET_MODE_WIDER_MODE (mode))
5077 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5079 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
5081 mode = GET_MODE_WIDER_MODE (mode))
5082 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5085 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
5087 mode = GET_MODE_WIDER_MODE (mode))
5088 const_tiny_rtx[0][(int) mode] = gen_const_vector_0 (mode);
5090 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
5092 mode = GET_MODE_WIDER_MODE (mode))
5093 const_tiny_rtx[0][(int) mode] = gen_const_vector_0 (mode);
5095 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
5096 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
5097 const_tiny_rtx[0][i] = const0_rtx;
5099 const_tiny_rtx[0][(int) BImode] = const0_rtx;
5100 if (STORE_FLAG_VALUE == 1)
5101 const_tiny_rtx[1][(int) BImode] = const1_rtx;
5103 /* For bounded pointers, `&const_tiny_rtx[0][0]' is not the same as
5104 `(rtx *) const_tiny_rtx'. The former has bounds that only cover
5105 `const_tiny_rtx[0]', whereas the latter has bounds that cover all. */
5106 ggc_add_rtx_root ((rtx *) const_tiny_rtx, sizeof const_tiny_rtx / sizeof (rtx));
5107 ggc_add_rtx_root (&const_true_rtx, 1);
5109 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5110 return_address_pointer_rtx
5111 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
5115 struct_value_rtx = STRUCT_VALUE;
5117 struct_value_rtx = gen_rtx_REG (Pmode, STRUCT_VALUE_REGNUM);
5120 #ifdef STRUCT_VALUE_INCOMING
5121 struct_value_incoming_rtx = STRUCT_VALUE_INCOMING;
5123 #ifdef STRUCT_VALUE_INCOMING_REGNUM
5124 struct_value_incoming_rtx
5125 = gen_rtx_REG (Pmode, STRUCT_VALUE_INCOMING_REGNUM);
5127 struct_value_incoming_rtx = struct_value_rtx;
5131 #ifdef STATIC_CHAIN_REGNUM
5132 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
5134 #ifdef STATIC_CHAIN_INCOMING_REGNUM
5135 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
5136 static_chain_incoming_rtx
5137 = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
5140 static_chain_incoming_rtx = static_chain_rtx;
5144 static_chain_rtx = STATIC_CHAIN;
5146 #ifdef STATIC_CHAIN_INCOMING
5147 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
5149 static_chain_incoming_rtx = static_chain_rtx;
5153 if (PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
5154 pic_offset_table_rtx = gen_raw_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
5156 ggc_add_rtx_root (&pic_offset_table_rtx, 1);
5157 ggc_add_rtx_root (&struct_value_rtx, 1);
5158 ggc_add_rtx_root (&struct_value_incoming_rtx, 1);
5159 ggc_add_rtx_root (&static_chain_rtx, 1);
5160 ggc_add_rtx_root (&static_chain_incoming_rtx, 1);
5161 ggc_add_rtx_root (&return_address_pointer_rtx, 1);
5164 /* Query and clear/ restore no_line_numbers. This is used by the
5165 switch / case handling in stmt.c to give proper line numbers in
5166 warnings about unreachable code. */
5169 force_line_numbers ()
5171 int old = no_line_numbers;
5173 no_line_numbers = 0;
5175 force_next_line_note ();
5180 restore_line_number_status (old_value)
5183 no_line_numbers = old_value;
5186 /* Produce exact duplicate of insn INSN after AFTER.
5187 Care updating of libcall regions if present. */
5190 emit_copy_of_insn_after (insn, after)
5194 rtx note1, note2, link;
5196 switch (GET_CODE (insn))
5199 new = emit_insn_after (copy_insn (PATTERN (insn)), after);
5203 new = emit_jump_insn_after (copy_insn (PATTERN (insn)), after);
5207 new = emit_call_insn_after (copy_insn (PATTERN (insn)), after);
5208 if (CALL_INSN_FUNCTION_USAGE (insn))
5209 CALL_INSN_FUNCTION_USAGE (new)
5210 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn));
5211 SIBLING_CALL_P (new) = SIBLING_CALL_P (insn);
5212 CONST_OR_PURE_CALL_P (new) = CONST_OR_PURE_CALL_P (insn);
5219 /* Update LABEL_NUSES. */
5220 mark_jump_label (PATTERN (new), new, 0);
5222 INSN_SCOPE (new) = INSN_SCOPE (insn);
5224 /* Copy all REG_NOTES except REG_LABEL since mark_jump_label will
5226 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5227 if (REG_NOTE_KIND (link) != REG_LABEL)
5229 if (GET_CODE (link) == EXPR_LIST)
5231 = copy_insn_1 (gen_rtx_EXPR_LIST (REG_NOTE_KIND (link),
5236 = copy_insn_1 (gen_rtx_INSN_LIST (REG_NOTE_KIND (link),
5241 /* Fix the libcall sequences. */
5242 if ((note1 = find_reg_note (new, REG_RETVAL, NULL_RTX)) != NULL)
5245 while ((note2 = find_reg_note (p, REG_LIBCALL, NULL_RTX)) == NULL)
5247 XEXP (note1, 0) = p;
5248 XEXP (note2, 0) = new;