1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains the functions `gen_rtx', `gen_reg_rtx'
26 and `gen_label_rtx' that are the usual ways of creating rtl
27 expressions for most purposes.
29 It also has the functions for creating insns and linking
30 them in the doubly-linked chain.
32 The patterns of the insns are created by machine-dependent
33 routines in insn-emit.c, which is generated automatically from
34 the machine description. These routines use `gen_rtx' to make
35 the individual rtx's of the pattern; what is machine dependent
36 is the kind of rtx's they make and what arguments they use. */
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
55 #include "basic-block.h"
59 /* Commonly used modes. */
61 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
62 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
63 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
64 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
67 /* This is *not* reset after each function. It gives each CODE_LABEL
68 in the entire compilation a unique label number. */
70 static int label_num = 1;
72 /* Highest label number in current function.
73 Zero means use the value of label_num instead.
74 This is nonzero only when belatedly compiling an inline function. */
76 static int last_label_num;
78 /* Value label_num had when set_new_first_and_last_label_number was called.
79 If label_num has not changed since then, last_label_num is valid. */
81 static int base_label_num;
83 /* Nonzero means do not generate NOTEs for source line numbers. */
85 static int no_line_numbers;
87 /* Commonly used rtx's, so that we only need space for one copy.
88 These are initialized once for the entire compilation.
89 All of these except perhaps the floating-point CONST_DOUBLEs
90 are unique; no other rtx-object will be equal to any of these. */
92 rtx global_rtl[GR_MAX];
94 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
95 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
96 record a copy of const[012]_rtx. */
98 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
102 REAL_VALUE_TYPE dconst0;
103 REAL_VALUE_TYPE dconst1;
104 REAL_VALUE_TYPE dconst2;
105 REAL_VALUE_TYPE dconstm1;
107 /* All references to the following fixed hard registers go through
108 these unique rtl objects. On machines where the frame-pointer and
109 arg-pointer are the same register, they use the same unique object.
111 After register allocation, other rtl objects which used to be pseudo-regs
112 may be clobbered to refer to the frame-pointer register.
113 But references that were originally to the frame-pointer can be
114 distinguished from the others because they contain frame_pointer_rtx.
116 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
117 tricky: until register elimination has taken place hard_frame_pointer_rtx
118 should be used if it is being set, and frame_pointer_rtx otherwise. After
119 register elimination hard_frame_pointer_rtx should always be used.
120 On machines where the two registers are same (most) then these are the
123 In an inline procedure, the stack and frame pointer rtxs may not be
124 used for anything else. */
125 rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
126 rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
127 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
128 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
129 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
131 /* This is used to implement __builtin_return_address for some machines.
132 See for instance the MIPS port. */
133 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
135 /* We make one copy of (const_int C) where C is in
136 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
137 to save space during the compilation and simplify comparisons of
140 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
142 /* A hash table storing CONST_INTs whose absolute value is greater
143 than MAX_SAVED_CONST_INT. */
145 static htab_t const_int_htab;
147 /* A hash table storing memory attribute structures. */
148 static htab_t mem_attrs_htab;
150 /* start_sequence and gen_sequence can make a lot of rtx expressions which are
151 shortly thrown away. We use two mechanisms to prevent this waste:
153 For sizes up to 5 elements, we keep a SEQUENCE and its associated
154 rtvec for use by gen_sequence. One entry for each size is
155 sufficient because most cases are calls to gen_sequence followed by
156 immediately emitting the SEQUENCE. Reuse is safe since emitting a
157 sequence is destructive on the insn in it anyway and hence can't be
160 We do not bother to save this cached data over nested function calls.
161 Instead, we just reinitialize them. */
163 #define SEQUENCE_RESULT_SIZE 5
165 static rtx sequence_result[SEQUENCE_RESULT_SIZE];
167 /* During RTL generation, we also keep a list of free INSN rtl codes. */
168 static rtx free_insn;
170 #define first_insn (cfun->emit->x_first_insn)
171 #define last_insn (cfun->emit->x_last_insn)
172 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
173 #define last_linenum (cfun->emit->x_last_linenum)
174 #define last_filename (cfun->emit->x_last_filename)
175 #define first_label_num (cfun->emit->x_first_label_num)
177 static rtx make_jump_insn_raw PARAMS ((rtx));
178 static rtx make_call_insn_raw PARAMS ((rtx));
179 static rtx find_line_note PARAMS ((rtx));
180 static void mark_sequence_stack PARAMS ((struct sequence_stack *));
181 static rtx change_address_1 PARAMS ((rtx, enum machine_mode, rtx,
183 static void unshare_all_rtl_1 PARAMS ((rtx));
184 static void unshare_all_decls PARAMS ((tree));
185 static void reset_used_decls PARAMS ((tree));
186 static void mark_label_nuses PARAMS ((rtx));
187 static hashval_t const_int_htab_hash PARAMS ((const void *));
188 static int const_int_htab_eq PARAMS ((const void *,
190 static hashval_t mem_attrs_htab_hash PARAMS ((const void *));
191 static int mem_attrs_htab_eq PARAMS ((const void *,
193 static void mem_attrs_mark PARAMS ((const void *));
194 static mem_attrs *get_mem_attrs PARAMS ((HOST_WIDE_INT, tree, rtx,
197 /* Probability of the conditional branch currently proceeded by try_split.
198 Set to -1 otherwise. */
199 int split_branch_probability = -1;
201 /* Returns a hash code for X (which is a really a CONST_INT). */
204 const_int_htab_hash (x)
207 return (hashval_t) INTVAL ((const struct rtx_def *) x);
210 /* Returns non-zero if the value represented by X (which is really a
211 CONST_INT) is the same as that given by Y (which is really a
215 const_int_htab_eq (x, y)
219 return (INTVAL ((const struct rtx_def *) x) == *((const HOST_WIDE_INT *) y));
222 /* Returns a hash code for X (which is a really a mem_attrs *). */
225 mem_attrs_htab_hash (x)
228 mem_attrs *p = (mem_attrs *) x;
230 return (p->alias ^ (p->align * 1000)
231 ^ ((p->offset ? INTVAL (p->offset) : 0) * 50000)
232 ^ ((p->size ? INTVAL (p->size) : 0) * 2500000)
236 /* Returns non-zero if the value represented by X (which is really a
237 mem_attrs *) is the same as that given by Y (which is also really a
241 mem_attrs_htab_eq (x, y)
245 mem_attrs *p = (mem_attrs *) x;
246 mem_attrs *q = (mem_attrs *) y;
248 return (p->alias == q->alias && p->decl == q->decl && p->offset == q->offset
249 && p->size == q->size && p->align == q->align);
252 /* This routine is called when we determine that we need a mem_attrs entry.
253 It marks the associated decl and RTL as being used, if present. */
259 mem_attrs *p = (mem_attrs *) x;
262 ggc_mark_tree (p->decl);
265 ggc_mark_rtx (p->offset);
268 ggc_mark_rtx (p->size);
271 /* Allocate a new mem_attrs structure and insert it into the hash table if
272 one identical to it is not already in the table. */
275 get_mem_attrs (alias, decl, offset, size, align)
287 attrs.offset = offset;
291 slot = htab_find_slot (mem_attrs_htab, &attrs, INSERT);
294 *slot = ggc_alloc (sizeof (mem_attrs));
295 memcpy (*slot, &attrs, sizeof (mem_attrs));
301 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
302 don't attempt to share with the various global pieces of rtl (such as
303 frame_pointer_rtx). */
306 gen_raw_REG (mode, regno)
307 enum machine_mode mode;
310 rtx x = gen_rtx_raw_REG (mode, regno);
311 ORIGINAL_REGNO (x) = regno;
315 /* There are some RTL codes that require special attention; the generation
316 functions do the raw handling. If you add to this list, modify
317 special_rtx in gengenrtl.c as well. */
320 gen_rtx_CONST_INT (mode, arg)
321 enum machine_mode mode ATTRIBUTE_UNUSED;
326 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
327 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
329 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
330 if (const_true_rtx && arg == STORE_FLAG_VALUE)
331 return const_true_rtx;
334 /* Look up the CONST_INT in the hash table. */
335 slot = htab_find_slot_with_hash (const_int_htab, &arg,
336 (hashval_t) arg, INSERT);
338 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
343 /* CONST_DOUBLEs needs special handling because their length is known
347 gen_rtx_CONST_DOUBLE (mode, arg0, arg1, arg2)
348 enum machine_mode mode;
350 HOST_WIDE_INT arg1, arg2;
352 rtx r = rtx_alloc (CONST_DOUBLE);
357 X0EXP (r, 1) = NULL_RTX;
361 for (i = GET_RTX_LENGTH (CONST_DOUBLE) - 1; i > 3; --i)
368 gen_rtx_REG (mode, regno)
369 enum machine_mode mode;
372 /* In case the MD file explicitly references the frame pointer, have
373 all such references point to the same frame pointer. This is
374 used during frame pointer elimination to distinguish the explicit
375 references to these registers from pseudos that happened to be
378 If we have eliminated the frame pointer or arg pointer, we will
379 be using it as a normal register, for example as a spill
380 register. In such cases, we might be accessing it in a mode that
381 is not Pmode and therefore cannot use the pre-allocated rtx.
383 Also don't do this when we are making new REGs in reload, since
384 we don't want to get confused with the real pointers. */
386 if (mode == Pmode && !reload_in_progress)
388 if (regno == FRAME_POINTER_REGNUM)
389 return frame_pointer_rtx;
390 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
391 if (regno == HARD_FRAME_POINTER_REGNUM)
392 return hard_frame_pointer_rtx;
394 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
395 if (regno == ARG_POINTER_REGNUM)
396 return arg_pointer_rtx;
398 #ifdef RETURN_ADDRESS_POINTER_REGNUM
399 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
400 return return_address_pointer_rtx;
402 if (regno == STACK_POINTER_REGNUM)
403 return stack_pointer_rtx;
406 return gen_raw_REG (mode, regno);
410 gen_rtx_MEM (mode, addr)
411 enum machine_mode mode;
414 rtx rt = gen_rtx_raw_MEM (mode, addr);
416 /* This field is not cleared by the mere allocation of the rtx, so
424 gen_rtx_SUBREG (mode, reg, offset)
425 enum machine_mode mode;
429 /* This is the most common failure type.
430 Catch it early so we can see who does it. */
431 if ((offset % GET_MODE_SIZE (mode)) != 0)
434 /* This check isn't usable right now because combine will
435 throw arbitrary crap like a CALL into a SUBREG in
436 gen_lowpart_for_combine so we must just eat it. */
438 /* Check for this too. */
439 if (offset >= GET_MODE_SIZE (GET_MODE (reg)))
442 return gen_rtx_fmt_ei (SUBREG, mode, reg, offset);
445 /* Generate a SUBREG representing the least-significant part of REG if MODE
446 is smaller than mode of REG, otherwise paradoxical SUBREG. */
449 gen_lowpart_SUBREG (mode, reg)
450 enum machine_mode mode;
453 enum machine_mode inmode;
455 inmode = GET_MODE (reg);
456 if (inmode == VOIDmode)
458 return gen_rtx_SUBREG (mode, reg,
459 subreg_lowpart_offset (mode, inmode));
462 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
464 ** This routine generates an RTX of the size specified by
465 ** <code>, which is an RTX code. The RTX structure is initialized
466 ** from the arguments <element1> through <elementn>, which are
467 ** interpreted according to the specific RTX type's format. The
468 ** special machine mode associated with the rtx (if any) is specified
471 ** gen_rtx can be invoked in a way which resembles the lisp-like
472 ** rtx it will generate. For example, the following rtx structure:
474 ** (plus:QI (mem:QI (reg:SI 1))
475 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
477 ** ...would be generated by the following C code:
479 ** gen_rtx (PLUS, QImode,
480 ** gen_rtx (MEM, QImode,
481 ** gen_rtx (REG, SImode, 1)),
482 ** gen_rtx (MEM, QImode,
483 ** gen_rtx (PLUS, SImode,
484 ** gen_rtx (REG, SImode, 2),
485 ** gen_rtx (REG, SImode, 3)))),
490 gen_rtx VPARAMS ((enum rtx_code code, enum machine_mode mode, ...))
492 int i; /* Array indices... */
493 const char *fmt; /* Current rtx's format... */
494 rtx rt_val; /* RTX to return to caller... */
497 VA_FIXEDARG (p, enum rtx_code, code);
498 VA_FIXEDARG (p, enum machine_mode, mode);
503 rt_val = gen_rtx_CONST_INT (mode, va_arg (p, HOST_WIDE_INT));
508 rtx arg0 = va_arg (p, rtx);
509 HOST_WIDE_INT arg1 = va_arg (p, HOST_WIDE_INT);
510 HOST_WIDE_INT arg2 = va_arg (p, HOST_WIDE_INT);
511 rt_val = gen_rtx_CONST_DOUBLE (mode, arg0, arg1, arg2);
516 rt_val = gen_rtx_REG (mode, va_arg (p, int));
520 rt_val = gen_rtx_MEM (mode, va_arg (p, rtx));
524 rt_val = rtx_alloc (code); /* Allocate the storage space. */
525 rt_val->mode = mode; /* Store the machine mode... */
527 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
528 for (i = 0; i < GET_RTX_LENGTH (code); i++)
532 case '0': /* Unused field. */
535 case 'i': /* An integer? */
536 XINT (rt_val, i) = va_arg (p, int);
539 case 'w': /* A wide integer? */
540 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
543 case 's': /* A string? */
544 XSTR (rt_val, i) = va_arg (p, char *);
547 case 'e': /* An expression? */
548 case 'u': /* An insn? Same except when printing. */
549 XEXP (rt_val, i) = va_arg (p, rtx);
552 case 'E': /* An RTX vector? */
553 XVEC (rt_val, i) = va_arg (p, rtvec);
556 case 'b': /* A bitmap? */
557 XBITMAP (rt_val, i) = va_arg (p, bitmap);
560 case 't': /* A tree? */
561 XTREE (rt_val, i) = va_arg (p, tree);
575 /* gen_rtvec (n, [rt1, ..., rtn])
577 ** This routine creates an rtvec and stores within it the
578 ** pointers to rtx's which are its arguments.
583 gen_rtvec VPARAMS ((int n, ...))
589 VA_FIXEDARG (p, int, n);
592 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
594 vector = (rtx *) alloca (n * sizeof (rtx));
596 for (i = 0; i < n; i++)
597 vector[i] = va_arg (p, rtx);
599 /* The definition of VA_* in K&R C causes `n' to go out of scope. */
603 return gen_rtvec_v (save_n, vector);
607 gen_rtvec_v (n, argp)
615 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
617 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
619 for (i = 0; i < n; i++)
620 rt_val->elem[i] = *argp++;
625 /* Generate a REG rtx for a new pseudo register of mode MODE.
626 This pseudo is assigned the next sequential register number. */
630 enum machine_mode mode;
632 struct function *f = cfun;
635 /* Don't let anything called after initial flow analysis create new
640 if (generating_concat_p
641 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
642 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
644 /* For complex modes, don't make a single pseudo.
645 Instead, make a CONCAT of two pseudos.
646 This allows noncontiguous allocation of the real and imaginary parts,
647 which makes much better code. Besides, allocating DCmode
648 pseudos overstrains reload on some machines like the 386. */
649 rtx realpart, imagpart;
650 int size = GET_MODE_UNIT_SIZE (mode);
651 enum machine_mode partmode
652 = mode_for_size (size * BITS_PER_UNIT,
653 (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
654 ? MODE_FLOAT : MODE_INT),
657 realpart = gen_reg_rtx (partmode);
658 imagpart = gen_reg_rtx (partmode);
659 return gen_rtx_CONCAT (mode, realpart, imagpart);
662 /* Make sure regno_pointer_align, regno_decl, and regno_reg_rtx are large
663 enough to have an element for this pseudo reg number. */
665 if (reg_rtx_no == f->emit->regno_pointer_align_length)
667 int old_size = f->emit->regno_pointer_align_length;
672 new = xrealloc (f->emit->regno_pointer_align, old_size * 2);
673 memset (new + old_size, 0, old_size);
674 f->emit->regno_pointer_align = (unsigned char *) new;
676 new1 = (rtx *) xrealloc (f->emit->x_regno_reg_rtx,
677 old_size * 2 * sizeof (rtx));
678 memset (new1 + old_size, 0, old_size * sizeof (rtx));
679 regno_reg_rtx = new1;
681 new2 = (tree *) xrealloc (f->emit->regno_decl,
682 old_size * 2 * sizeof (tree));
683 memset (new2 + old_size, 0, old_size * sizeof (tree));
684 f->emit->regno_decl = new2;
686 f->emit->regno_pointer_align_length = old_size * 2;
689 val = gen_raw_REG (mode, reg_rtx_no);
690 regno_reg_rtx[reg_rtx_no++] = val;
694 /* Identify REG (which may be a CONCAT) as a user register. */
700 if (GET_CODE (reg) == CONCAT)
702 REG_USERVAR_P (XEXP (reg, 0)) = 1;
703 REG_USERVAR_P (XEXP (reg, 1)) = 1;
705 else if (GET_CODE (reg) == REG)
706 REG_USERVAR_P (reg) = 1;
711 /* Identify REG as a probable pointer register and show its alignment
712 as ALIGN, if nonzero. */
715 mark_reg_pointer (reg, align)
719 if (! REG_POINTER (reg))
721 REG_POINTER (reg) = 1;
724 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
726 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
727 /* We can no-longer be sure just how aligned this pointer is */
728 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
731 /* Return 1 plus largest pseudo reg number used in the current function. */
739 /* Return 1 + the largest label number used so far in the current function. */
744 if (last_label_num && label_num == base_label_num)
745 return last_label_num;
749 /* Return first label number used in this function (if any were used). */
752 get_first_label_num ()
754 return first_label_num;
757 /* Return the final regno of X, which is a SUBREG of a hard
760 subreg_hard_regno (x, check_mode)
764 enum machine_mode mode = GET_MODE (x);
765 unsigned int byte_offset, base_regno, final_regno;
766 rtx reg = SUBREG_REG (x);
768 /* This is where we attempt to catch illegal subregs
769 created by the compiler. */
770 if (GET_CODE (x) != SUBREG
771 || GET_CODE (reg) != REG)
773 base_regno = REGNO (reg);
774 if (base_regno >= FIRST_PSEUDO_REGISTER)
776 if (check_mode && ! HARD_REGNO_MODE_OK (base_regno, GET_MODE (reg)))
779 /* Catch non-congruent offsets too. */
780 byte_offset = SUBREG_BYTE (x);
781 if ((byte_offset % GET_MODE_SIZE (mode)) != 0)
784 final_regno = subreg_regno (x);
789 /* Return a value representing some low-order bits of X, where the number
790 of low-order bits is given by MODE. Note that no conversion is done
791 between floating-point and fixed-point values, rather, the bit
792 representation is returned.
794 This function handles the cases in common between gen_lowpart, below,
795 and two variants in cse.c and combine.c. These are the cases that can
796 be safely handled at all points in the compilation.
798 If this is not a case we can handle, return 0. */
801 gen_lowpart_common (mode, x)
802 enum machine_mode mode;
805 int msize = GET_MODE_SIZE (mode);
806 int xsize = GET_MODE_SIZE (GET_MODE (x));
809 if (GET_MODE (x) == mode)
812 /* MODE must occupy no more words than the mode of X. */
813 if (GET_MODE (x) != VOIDmode
814 && ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
815 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)))
818 offset = subreg_lowpart_offset (mode, GET_MODE (x));
820 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
821 && (GET_MODE_CLASS (mode) == MODE_INT
822 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
824 /* If we are getting the low-order part of something that has been
825 sign- or zero-extended, we can either just use the object being
826 extended or make a narrower extension. If we want an even smaller
827 piece than the size of the object being extended, call ourselves
830 This case is used mostly by combine and cse. */
832 if (GET_MODE (XEXP (x, 0)) == mode)
834 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
835 return gen_lowpart_common (mode, XEXP (x, 0));
836 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
837 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
839 else if (GET_CODE (x) == SUBREG || GET_CODE (x) == REG
840 || GET_CODE (x) == CONCAT)
841 return simplify_gen_subreg (mode, x, GET_MODE (x), offset);
842 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
843 from the low-order part of the constant. */
844 else if ((GET_MODE_CLASS (mode) == MODE_INT
845 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
846 && GET_MODE (x) == VOIDmode
847 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
849 /* If MODE is twice the host word size, X is already the desired
850 representation. Otherwise, if MODE is wider than a word, we can't
851 do this. If MODE is exactly a word, return just one CONST_INT. */
853 if (GET_MODE_BITSIZE (mode) >= 2 * HOST_BITS_PER_WIDE_INT)
855 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
857 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT)
858 return (GET_CODE (x) == CONST_INT ? x
859 : GEN_INT (CONST_DOUBLE_LOW (x)));
862 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
863 HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
864 : CONST_DOUBLE_LOW (x));
866 /* Sign extend to HOST_WIDE_INT. */
867 val = trunc_int_for_mode (val, mode);
869 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
874 #ifndef REAL_ARITHMETIC
875 /* If X is an integral constant but we want it in floating-point, it
876 must be the case that we have a union of an integer and a floating-point
877 value. If the machine-parameters allow it, simulate that union here
878 and return the result. The two-word and single-word cases are
881 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
882 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
883 || flag_pretend_float)
884 && GET_MODE_CLASS (mode) == MODE_FLOAT
885 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
886 && GET_CODE (x) == CONST_INT
887 && sizeof (float) * HOST_BITS_PER_CHAR == HOST_BITS_PER_WIDE_INT)
889 union {HOST_WIDE_INT i; float d; } u;
892 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
894 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
895 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
896 || flag_pretend_float)
897 && GET_MODE_CLASS (mode) == MODE_FLOAT
898 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
899 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
900 && GET_MODE (x) == VOIDmode
901 && (sizeof (double) * HOST_BITS_PER_CHAR
902 == 2 * HOST_BITS_PER_WIDE_INT))
904 union {HOST_WIDE_INT i[2]; double d; } u;
905 HOST_WIDE_INT low, high;
907 if (GET_CODE (x) == CONST_INT)
908 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
910 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
912 #ifdef HOST_WORDS_BIG_ENDIAN
913 u.i[0] = high, u.i[1] = low;
915 u.i[0] = low, u.i[1] = high;
918 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
921 /* Similarly, if this is converting a floating-point value into a
922 single-word integer. Only do this is the host and target parameters are
925 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
926 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
927 || flag_pretend_float)
928 && (GET_MODE_CLASS (mode) == MODE_INT
929 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
930 && GET_CODE (x) == CONST_DOUBLE
931 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
932 && GET_MODE_BITSIZE (mode) == BITS_PER_WORD)
933 return constant_subword (x, (offset / UNITS_PER_WORD), GET_MODE (x));
935 /* Similarly, if this is converting a floating-point value into a
936 two-word integer, we can do this one word at a time and make an
937 integer. Only do this is the host and target parameters are
940 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
941 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
942 || flag_pretend_float)
943 && (GET_MODE_CLASS (mode) == MODE_INT
944 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
945 && GET_CODE (x) == CONST_DOUBLE
946 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
947 && GET_MODE_BITSIZE (mode) == 2 * BITS_PER_WORD)
949 rtx lowpart, highpart;
951 lowpart = constant_subword (x,
952 (offset / UNITS_PER_WORD) + WORDS_BIG_ENDIAN,
954 highpart = constant_subword (x,
955 (offset / UNITS_PER_WORD) + (! WORDS_BIG_ENDIAN),
957 if (lowpart && GET_CODE (lowpart) == CONST_INT
958 && highpart && GET_CODE (highpart) == CONST_INT)
959 return immed_double_const (INTVAL (lowpart), INTVAL (highpart), mode);
961 #else /* ifndef REAL_ARITHMETIC */
963 /* When we have a FP emulator, we can handle all conversions between
964 FP and integer operands. This simplifies reload because it
965 doesn't have to deal with constructs like (subreg:DI
966 (const_double:SF ...)) or (subreg:DF (const_int ...)). */
967 /* Single-precision floats are always 32-bits and double-precision
968 floats are always 64-bits. */
970 else if (GET_MODE_CLASS (mode) == MODE_FLOAT
971 && GET_MODE_BITSIZE (mode) == 32
972 && GET_CODE (x) == CONST_INT)
978 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
979 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
981 else if (GET_MODE_CLASS (mode) == MODE_FLOAT
982 && GET_MODE_BITSIZE (mode) == 64
983 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
984 && GET_MODE (x) == VOIDmode)
988 HOST_WIDE_INT low, high;
990 if (GET_CODE (x) == CONST_INT)
993 high = low >> (HOST_BITS_PER_WIDE_INT - 1);
997 low = CONST_DOUBLE_LOW (x);
998 high = CONST_DOUBLE_HIGH (x);
1001 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
1003 if (WORDS_BIG_ENDIAN)
1004 i[0] = high, i[1] = low;
1006 i[0] = low, i[1] = high;
1008 r = REAL_VALUE_FROM_TARGET_DOUBLE (i);
1009 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
1011 else if ((GET_MODE_CLASS (mode) == MODE_INT
1012 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
1013 && GET_CODE (x) == CONST_DOUBLE
1014 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
1017 long i[4]; /* Only the low 32 bits of each 'long' are used. */
1018 int endian = WORDS_BIG_ENDIAN ? 1 : 0;
1020 REAL_VALUE_FROM_CONST_DOUBLE (r, x);
1021 switch (GET_MODE_BITSIZE (GET_MODE (x)))
1024 REAL_VALUE_TO_TARGET_SINGLE (r, i[endian]);
1028 REAL_VALUE_TO_TARGET_DOUBLE (r, i);
1031 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i + endian);
1035 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i);
1041 /* Now, pack the 32-bit elements of the array into a CONST_DOUBLE
1043 #if HOST_BITS_PER_WIDE_INT == 32
1044 return immed_double_const (i[endian], i[1 - endian], mode);
1049 if (HOST_BITS_PER_WIDE_INT != 64)
1052 for (c = 0; c < 4; c++)
1055 switch (GET_MODE_BITSIZE (GET_MODE (x)))
1059 return immed_double_const (((unsigned long) i[endian]) |
1060 (((HOST_WIDE_INT) i[1-endian]) << 32),
1064 return immed_double_const (((unsigned long) i[endian*3]) |
1065 (((HOST_WIDE_INT) i[1+endian]) << 32),
1066 ((unsigned long) i[2-endian]) |
1067 (((HOST_WIDE_INT) i[3-endian*3]) << 32),
1075 #endif /* ifndef REAL_ARITHMETIC */
1077 /* Otherwise, we can't do this. */
1081 /* Return the real part (which has mode MODE) of a complex value X.
1082 This always comes at the low address in memory. */
1085 gen_realpart (mode, x)
1086 enum machine_mode mode;
1089 if (WORDS_BIG_ENDIAN
1090 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1092 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1094 ("Can't access real part of complex value in hard register");
1095 else if (WORDS_BIG_ENDIAN)
1096 return gen_highpart (mode, x);
1098 return gen_lowpart (mode, x);
1101 /* Return the imaginary part (which has mode MODE) of a complex value X.
1102 This always comes at the high address in memory. */
1105 gen_imagpart (mode, x)
1106 enum machine_mode mode;
1109 if (WORDS_BIG_ENDIAN)
1110 return gen_lowpart (mode, x);
1111 else if (! WORDS_BIG_ENDIAN
1112 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1114 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1116 ("can't access imaginary part of complex value in hard register");
1118 return gen_highpart (mode, x);
1121 /* Return 1 iff X, assumed to be a SUBREG,
1122 refers to the real part of the complex value in its containing reg.
1123 Complex values are always stored with the real part in the first word,
1124 regardless of WORDS_BIG_ENDIAN. */
1127 subreg_realpart_p (x)
1130 if (GET_CODE (x) != SUBREG)
1133 return ((unsigned int) SUBREG_BYTE (x)
1134 < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x))));
1137 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1138 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1139 least-significant part of X.
1140 MODE specifies how big a part of X to return;
1141 it usually should not be larger than a word.
1142 If X is a MEM whose address is a QUEUED, the value may be so also. */
1145 gen_lowpart (mode, x)
1146 enum machine_mode mode;
1149 rtx result = gen_lowpart_common (mode, x);
1153 else if (GET_CODE (x) == REG)
1155 /* Must be a hard reg that's not valid in MODE. */
1156 result = gen_lowpart_common (mode, copy_to_reg (x));
1161 else if (GET_CODE (x) == MEM)
1163 /* The only additional case we can do is MEM. */
1165 if (WORDS_BIG_ENDIAN)
1166 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
1167 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1169 if (BYTES_BIG_ENDIAN)
1170 /* Adjust the address so that the address-after-the-data
1172 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
1173 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
1175 return adjust_address (x, mode, offset);
1177 else if (GET_CODE (x) == ADDRESSOF)
1178 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
1183 /* Like `gen_lowpart', but refer to the most significant part.
1184 This is used to access the imaginary part of a complex number. */
1187 gen_highpart (mode, x)
1188 enum machine_mode mode;
1191 unsigned int msize = GET_MODE_SIZE (mode);
1194 /* This case loses if X is a subreg. To catch bugs early,
1195 complain if an invalid MODE is used even in other cases. */
1196 if (msize > UNITS_PER_WORD
1197 && msize != GET_MODE_UNIT_SIZE (GET_MODE (x)))
1200 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1201 subreg_highpart_offset (mode, GET_MODE (x)));
1203 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1204 the target if we have a MEM. gen_highpart must return a valid operand,
1205 emitting code if necessary to do so. */
1206 if (GET_CODE (result) == MEM)
1207 result = validize_mem (result);
1214 /* Like gen_highpart_mode, but accept mode of EXP operand in case EXP can
1215 be VOIDmode constant. */
1217 gen_highpart_mode (outermode, innermode, exp)
1218 enum machine_mode outermode, innermode;
1221 if (GET_MODE (exp) != VOIDmode)
1223 if (GET_MODE (exp) != innermode)
1225 return gen_highpart (outermode, exp);
1227 return simplify_gen_subreg (outermode, exp, innermode,
1228 subreg_highpart_offset (outermode, innermode));
1230 /* Return offset in bytes to get OUTERMODE low part
1231 of the value in mode INNERMODE stored in memory in target format. */
1234 subreg_lowpart_offset (outermode, innermode)
1235 enum machine_mode outermode, innermode;
1237 unsigned int offset = 0;
1238 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1242 if (WORDS_BIG_ENDIAN)
1243 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1244 if (BYTES_BIG_ENDIAN)
1245 offset += difference % UNITS_PER_WORD;
1251 /* Return offset in bytes to get OUTERMODE high part
1252 of the value in mode INNERMODE stored in memory in target format. */
1254 subreg_highpart_offset (outermode, innermode)
1255 enum machine_mode outermode, innermode;
1257 unsigned int offset = 0;
1258 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1260 if (GET_MODE_SIZE (innermode) < GET_MODE_SIZE (outermode))
1265 if (! WORDS_BIG_ENDIAN)
1266 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1267 if (! BYTES_BIG_ENDIAN)
1268 offset += difference % UNITS_PER_WORD;
1274 /* Return 1 iff X, assumed to be a SUBREG,
1275 refers to the least significant part of its containing reg.
1276 If X is not a SUBREG, always return 1 (it is its own low part!). */
1279 subreg_lowpart_p (x)
1282 if (GET_CODE (x) != SUBREG)
1284 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1287 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1288 == SUBREG_BYTE (x));
1292 /* Helper routine for all the constant cases of operand_subword.
1293 Some places invoke this directly. */
1296 constant_subword (op, offset, mode)
1299 enum machine_mode mode;
1301 int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD;
1304 /* If OP is already an integer word, return it. */
1305 if (GET_MODE_CLASS (mode) == MODE_INT
1306 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
1309 #ifdef REAL_ARITHMETIC
1310 /* The output is some bits, the width of the target machine's word.
1311 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1313 if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1314 && GET_MODE_CLASS (mode) == MODE_FLOAT
1315 && GET_MODE_BITSIZE (mode) == 64
1316 && GET_CODE (op) == CONST_DOUBLE)
1321 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1322 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
1324 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1325 which the words are written depends on the word endianness.
1326 ??? This is a potential portability problem and should
1327 be fixed at some point.
1329 We must excercise caution with the sign bit. By definition there
1330 are 32 significant bits in K; there may be more in a HOST_WIDE_INT.
1331 Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT.
1332 So we explicitly mask and sign-extend as necessary. */
1333 if (BITS_PER_WORD == 32)
1336 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1337 return GEN_INT (val);
1339 #if HOST_BITS_PER_WIDE_INT >= 64
1340 else if (BITS_PER_WORD >= 64 && offset == 0)
1342 val = k[! WORDS_BIG_ENDIAN];
1343 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1344 val |= (HOST_WIDE_INT) k[WORDS_BIG_ENDIAN] & 0xffffffff;
1345 return GEN_INT (val);
1348 else if (BITS_PER_WORD == 16)
1350 val = k[offset >> 1];
1351 if ((offset & 1) == ! WORDS_BIG_ENDIAN)
1353 val = ((val & 0xffff) ^ 0x8000) - 0x8000;
1354 return GEN_INT (val);
1359 else if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1360 && GET_MODE_CLASS (mode) == MODE_FLOAT
1361 && GET_MODE_BITSIZE (mode) > 64
1362 && GET_CODE (op) == CONST_DOUBLE)
1367 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1368 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k);
1370 if (BITS_PER_WORD == 32)
1373 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1374 return GEN_INT (val);
1376 #if HOST_BITS_PER_WIDE_INT >= 64
1377 else if (BITS_PER_WORD >= 64 && offset <= 1)
1379 val = k[offset * 2 + ! WORDS_BIG_ENDIAN];
1380 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1381 val |= (HOST_WIDE_INT) k[offset * 2 + WORDS_BIG_ENDIAN] & 0xffffffff;
1382 return GEN_INT (val);
1388 #else /* no REAL_ARITHMETIC */
1389 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1390 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1391 || flag_pretend_float)
1392 && GET_MODE_CLASS (mode) == MODE_FLOAT
1393 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
1394 && GET_CODE (op) == CONST_DOUBLE)
1396 /* The constant is stored in the host's word-ordering,
1397 but we want to access it in the target's word-ordering. Some
1398 compilers don't like a conditional inside macro args, so we have two
1399 copies of the return. */
1400 #ifdef HOST_WORDS_BIG_ENDIAN
1401 return GEN_INT (offset == WORDS_BIG_ENDIAN
1402 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1404 return GEN_INT (offset != WORDS_BIG_ENDIAN
1405 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1408 #endif /* no REAL_ARITHMETIC */
1410 /* Single word float is a little harder, since single- and double-word
1411 values often do not have the same high-order bits. We have already
1412 verified that we want the only defined word of the single-word value. */
1413 #ifdef REAL_ARITHMETIC
1414 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1415 && GET_MODE_BITSIZE (mode) == 32
1416 && GET_CODE (op) == CONST_DOUBLE)
1421 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1422 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
1424 /* Sign extend from known 32-bit value to HOST_WIDE_INT. */
1426 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1428 if (BITS_PER_WORD == 16)
1430 if ((offset & 1) == ! WORDS_BIG_ENDIAN)
1432 val = ((val & 0xffff) ^ 0x8000) - 0x8000;
1435 return GEN_INT (val);
1438 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1439 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1440 || flag_pretend_float)
1441 && sizeof (float) * 8 == HOST_BITS_PER_WIDE_INT
1442 && GET_MODE_CLASS (mode) == MODE_FLOAT
1443 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1444 && GET_CODE (op) == CONST_DOUBLE)
1447 union {float f; HOST_WIDE_INT i; } u;
1449 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1452 return GEN_INT (u.i);
1454 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1455 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1456 || flag_pretend_float)
1457 && sizeof (double) * 8 == HOST_BITS_PER_WIDE_INT
1458 && GET_MODE_CLASS (mode) == MODE_FLOAT
1459 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1460 && GET_CODE (op) == CONST_DOUBLE)
1463 union {double d; HOST_WIDE_INT i; } u;
1465 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1468 return GEN_INT (u.i);
1470 #endif /* no REAL_ARITHMETIC */
1472 /* The only remaining cases that we can handle are integers.
1473 Convert to proper endianness now since these cases need it.
1474 At this point, offset == 0 means the low-order word.
1476 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1477 in general. However, if OP is (const_int 0), we can just return
1480 if (op == const0_rtx)
1483 if (GET_MODE_CLASS (mode) != MODE_INT
1484 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE)
1485 || BITS_PER_WORD > HOST_BITS_PER_WIDE_INT)
1488 if (WORDS_BIG_ENDIAN)
1489 offset = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - offset;
1491 /* Find out which word on the host machine this value is in and get
1492 it from the constant. */
1493 val = (offset / size_ratio == 0
1494 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
1495 : (GET_CODE (op) == CONST_INT
1496 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
1498 /* Get the value we want into the low bits of val. */
1499 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT)
1500 val = ((val >> ((offset % size_ratio) * BITS_PER_WORD)));
1502 val = trunc_int_for_mode (val, word_mode);
1504 return GEN_INT (val);
1507 /* Return subword OFFSET of operand OP.
1508 The word number, OFFSET, is interpreted as the word number starting
1509 at the low-order address. OFFSET 0 is the low-order word if not
1510 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1512 If we cannot extract the required word, we return zero. Otherwise,
1513 an rtx corresponding to the requested word will be returned.
1515 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1516 reload has completed, a valid address will always be returned. After
1517 reload, if a valid address cannot be returned, we return zero.
1519 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1520 it is the responsibility of the caller.
1522 MODE is the mode of OP in case it is a CONST_INT.
1524 ??? This is still rather broken for some cases. The problem for the
1525 moment is that all callers of this thing provide no 'goal mode' to
1526 tell us to work with. This exists because all callers were written
1527 in a word based SUBREG world.
1528 Now use of this function can be deprecated by simplify_subreg in most
1533 operand_subword (op, offset, validate_address, mode)
1535 unsigned int offset;
1536 int validate_address;
1537 enum machine_mode mode;
1539 if (mode == VOIDmode)
1540 mode = GET_MODE (op);
1542 if (mode == VOIDmode)
1545 /* If OP is narrower than a word, fail. */
1547 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1550 /* If we want a word outside OP, return zero. */
1552 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1555 /* Form a new MEM at the requested address. */
1556 if (GET_CODE (op) == MEM)
1558 rtx new = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1560 if (! validate_address)
1563 else if (reload_completed)
1565 if (! strict_memory_address_p (word_mode, XEXP (new, 0)))
1569 return replace_equiv_address (new, XEXP (new, 0));
1572 /* Rest can be handled by simplify_subreg. */
1573 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1576 /* Similar to `operand_subword', but never return 0. If we can't extract
1577 the required subword, put OP into a register and try again. If that fails,
1578 abort. We always validate the address in this case.
1580 MODE is the mode of OP, in case it is CONST_INT. */
1583 operand_subword_force (op, offset, mode)
1585 unsigned int offset;
1586 enum machine_mode mode;
1588 rtx result = operand_subword (op, offset, 1, mode);
1593 if (mode != BLKmode && mode != VOIDmode)
1595 /* If this is a register which can not be accessed by words, copy it
1596 to a pseudo register. */
1597 if (GET_CODE (op) == REG)
1598 op = copy_to_reg (op);
1600 op = force_reg (mode, op);
1603 result = operand_subword (op, offset, 1, mode);
1610 /* Given a compare instruction, swap the operands.
1611 A test instruction is changed into a compare of 0 against the operand. */
1614 reverse_comparison (insn)
1617 rtx body = PATTERN (insn);
1620 if (GET_CODE (body) == SET)
1621 comp = SET_SRC (body);
1623 comp = SET_SRC (XVECEXP (body, 0, 0));
1625 if (GET_CODE (comp) == COMPARE)
1627 rtx op0 = XEXP (comp, 0);
1628 rtx op1 = XEXP (comp, 1);
1629 XEXP (comp, 0) = op1;
1630 XEXP (comp, 1) = op0;
1634 rtx new = gen_rtx_COMPARE (VOIDmode,
1635 CONST0_RTX (GET_MODE (comp)), comp);
1636 if (GET_CODE (body) == SET)
1637 SET_SRC (body) = new;
1639 SET_SRC (XVECEXP (body, 0, 0)) = new;
1644 /* Given REF, a MEM, and T, either the type of X or the expression
1645 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1646 if we are making a new object of this type. */
1649 set_mem_attributes (ref, t, objectp)
1656 /* It can happen that type_for_mode was given a mode for which there
1657 is no language-level type. In which case it returns NULL, which
1662 type = TYPE_P (t) ? t : TREE_TYPE (t);
1664 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1665 wrong answer, as it assumes that DECL_RTL already has the right alias
1666 info. Callers should not set DECL_RTL until after the call to
1667 set_mem_attributes. */
1668 if (DECL_P (t) && ref == DECL_RTL_IF_SET (t))
1671 /* Get the alias set from the expression or type (perhaps using a
1672 front-end routine). */
1673 set_mem_alias_set (ref, get_alias_set (t));
1675 /* It is incorrect to set RTX_UNCHANGING_P from TREE_READONLY (type)
1676 here, because, in C and C++, the fact that a location is accessed
1677 through a const expression does not mean that the value there can
1680 MEM_VOLATILE_P (ref) = TYPE_VOLATILE (type);
1681 MEM_IN_STRUCT_P (ref) = AGGREGATE_TYPE_P (type);
1683 /* If we are making an object of this type, we know that it is a scalar if
1684 the type is not an aggregate. */
1685 if (objectp && ! AGGREGATE_TYPE_P (type))
1686 MEM_SCALAR_P (ref) = 1;
1688 /* If the size is known, we can set that. */
1689 if (TYPE_SIZE_UNIT (type) && host_integerp (TYPE_SIZE_UNIT (type), 1))
1691 = get_mem_attrs (MEM_ALIAS_SET (ref), MEM_DECL (ref), MEM_OFFSET (ref),
1692 GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type), 1)),
1695 /* If T is a type, there's nothing more we can do. Otherwise, we may be able
1696 to deduce some more information about the expression. */
1700 maybe_set_unchanging (ref, t);
1701 if (TREE_THIS_VOLATILE (t))
1702 MEM_VOLATILE_P (ref) = 1;
1704 /* Now remove any NOPs: they don't change what the underlying object is.
1705 Likewise for SAVE_EXPR. */
1706 while (TREE_CODE (t) == NOP_EXPR || TREE_CODE (t) == CONVERT_EXPR
1707 || TREE_CODE (t) == NON_LVALUE_EXPR || TREE_CODE (t) == SAVE_EXPR)
1708 t = TREE_OPERAND (t, 0);
1710 /* If this is a decl, set the attributes of the MEM from it. */
1714 (MEM_ALIAS_SET (ref), t, GEN_INT (0),
1715 (TYPE_SIZE_UNIT (TREE_TYPE (t))
1716 && host_integerp (TYPE_SIZE_UNIT (TREE_TYPE (t)), 1))
1717 ? GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (TREE_TYPE (t)), 1))
1718 : 0, DECL_ALIGN (t) / BITS_PER_UNIT);
1720 /* Now see if we can say more about whether it's an aggregate or
1721 scalar. If we already know it's an aggregate, don't bother. */
1722 if (MEM_IN_STRUCT_P (ref))
1725 /* Since we already know the type isn't an aggregate, if this is a decl,
1726 it must be a scalar. Or if it is a reference into an aggregate,
1727 this is part of an aggregate. Otherwise we don't know. */
1729 MEM_SCALAR_P (ref) = 1;
1730 else if (TREE_CODE (t) == COMPONENT_REF || TREE_CODE (t) == ARRAY_REF
1731 || TREE_CODE (t) == ARRAY_RANGE_REF
1732 || TREE_CODE (t) == BIT_FIELD_REF)
1733 MEM_IN_STRUCT_P (ref) = 1;
1736 /* Set the alias set of MEM to SET. */
1739 set_mem_alias_set (mem, set)
1743 #ifdef ENABLE_CHECKING
1744 /* If the new and old alias sets don't conflict, something is wrong. */
1745 if (!alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)))
1749 MEM_ATTRS (mem) = get_mem_attrs (set, MEM_DECL (mem), MEM_OFFSET (mem),
1750 MEM_SIZE (mem), MEM_ALIGN (mem));
1753 /* Set the alignment of MEM to ALIGN. */
1756 set_mem_align (mem, align)
1760 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_DECL (mem),
1761 MEM_OFFSET (mem), MEM_SIZE (mem), align);
1764 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1765 and its address changed to ADDR. (VOIDmode means don't change the mode.
1766 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1767 returned memory location is required to be valid. The memory
1768 attributes are not changed. */
1771 change_address_1 (memref, mode, addr, validate)
1773 enum machine_mode mode;
1779 if (GET_CODE (memref) != MEM)
1781 if (mode == VOIDmode)
1782 mode = GET_MODE (memref);
1784 addr = XEXP (memref, 0);
1788 if (reload_in_progress || reload_completed)
1790 if (! memory_address_p (mode, addr))
1794 addr = memory_address (mode, addr);
1797 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1800 new = gen_rtx_MEM (mode, addr);
1801 MEM_COPY_ATTRIBUTES (new, memref);
1805 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1806 way we are changing MEMREF, so we only preserve the alias set. */
1809 change_address (memref, mode, addr)
1811 enum machine_mode mode;
1814 rtx new = change_address_1 (memref, mode, addr, 1);
1815 enum machine_mode mmode = GET_MODE (new);
1818 = get_mem_attrs (MEM_ALIAS_SET (memref), 0, 0,
1819 mmode == BLKmode ? 0 : GEN_INT (GET_MODE_SIZE (mmode)),
1820 (mmode == BLKmode ? 1
1821 : GET_MODE_ALIGNMENT (mmode) / BITS_PER_UNIT));
1826 /* Return a memory reference like MEMREF, but with its mode changed
1827 to MODE and its address offset by OFFSET bytes. If VALIDATE is
1828 nonzero, the memory address is forced to be valid. */
1831 adjust_address_1 (memref, mode, offset, validate)
1833 enum machine_mode mode;
1834 HOST_WIDE_INT offset;
1837 rtx addr = XEXP (memref, 0);
1839 rtx memoffset = MEM_OFFSET (memref);
1840 unsigned int memalign = MEM_ALIGN (memref);
1842 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
1843 object, we can merge it into the LO_SUM. */
1844 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
1846 && (unsigned HOST_WIDE_INT) offset
1847 < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
1848 addr = gen_rtx_LO_SUM (Pmode, XEXP (addr, 0),
1849 plus_constant (XEXP (addr, 1), offset));
1850 else if (offset == 0)
1851 /* ??? Prefer to create garbage instead of creating shared rtl. */
1852 addr = copy_rtx (addr);
1854 addr = plus_constant (addr, offset);
1856 new = change_address_1 (memref, mode, addr, validate);
1858 /* Compute the new values of the memory attributes due to this adjustment.
1859 We add the offsets and update the alignment. */
1861 memoffset = GEN_INT (offset + INTVAL (memoffset));
1863 /* If the offset is negative, don't try to update the alignment. If it's
1864 zero, the alignment hasn't changed. Otherwise, the known alignment may
1869 while (offset > 0 && (offset % memalign) != 0)
1873 = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_DECL (memref), memoffset,
1875 ? 0 : GEN_INT (GET_MODE_SIZE (mode)), memalign);
1877 /* At some point, we should validate that this offset is within the object,
1878 if all the appropriate values are known. */
1882 /* Return a memory reference like MEMREF, but with its address changed to
1883 ADDR. The caller is asserting that the actual piece of memory pointed
1884 to is the same, just the form of the address is being changed, such as
1885 by putting something into a register. */
1888 offset_address (memref, offset, pow2)
1893 rtx new = change_address_1 (memref, VOIDmode,
1894 gen_rtx_PLUS (Pmode, XEXP (memref, 0),
1895 force_reg (Pmode, offset)), 1);
1896 unsigned int memalign = MEM_ALIGN (memref);
1898 /* Update the alignment to reflect the offset. Reset the offset, which
1900 while (pow2 % memalign != 0)
1903 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_DECL (memref),
1908 /* Return a memory reference like MEMREF, but with its address changed to
1909 ADDR. The caller is asserting that the actual piece of memory pointed
1910 to is the same, just the form of the address is being changed, such as
1911 by putting something into a register. */
1914 replace_equiv_address (memref, addr)
1918 /* change_address_1 copies the memory attribute structure without change
1919 and that's exactly what we want here. */
1920 return change_address_1 (memref, VOIDmode, addr, 1);
1923 /* Likewise, but the reference is not required to be valid. */
1926 replace_equiv_address_nv (memref, addr)
1930 return change_address_1 (memref, VOIDmode, addr, 0);
1933 /* Return a newly created CODE_LABEL rtx with a unique label number. */
1940 label = gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX,
1941 NULL_RTX, label_num++, NULL, NULL);
1943 LABEL_NUSES (label) = 0;
1944 LABEL_ALTERNATE_NAME (label) = NULL;
1948 /* For procedure integration. */
1950 /* Install new pointers to the first and last insns in the chain.
1951 Also, set cur_insn_uid to one higher than the last in use.
1952 Used for an inline-procedure after copying the insn chain. */
1955 set_new_first_and_last_insn (first, last)
1964 for (insn = first; insn; insn = NEXT_INSN (insn))
1965 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
1970 /* Set the range of label numbers found in the current function.
1971 This is used when belatedly compiling an inline function. */
1974 set_new_first_and_last_label_num (first, last)
1977 base_label_num = label_num;
1978 first_label_num = first;
1979 last_label_num = last;
1982 /* Set the last label number found in the current function.
1983 This is used when belatedly compiling an inline function. */
1986 set_new_last_label_num (last)
1989 base_label_num = label_num;
1990 last_label_num = last;
1993 /* Restore all variables describing the current status from the structure *P.
1994 This is used after a nested function. */
1997 restore_emit_status (p)
1998 struct function *p ATTRIBUTE_UNUSED;
2001 clear_emit_caches ();
2004 /* Clear out all parts of the state in F that can safely be discarded
2005 after the function has been compiled, to let garbage collection
2006 reclaim the memory. */
2009 free_emit_status (f)
2012 free (f->emit->x_regno_reg_rtx);
2013 free (f->emit->regno_pointer_align);
2014 free (f->emit->regno_decl);
2019 /* Go through all the RTL insn bodies and copy any invalid shared
2020 structure. This routine should only be called once. */
2023 unshare_all_rtl (fndecl, insn)
2029 /* Make sure that virtual parameters are not shared. */
2030 for (decl = DECL_ARGUMENTS (fndecl); decl; decl = TREE_CHAIN (decl))
2031 SET_DECL_RTL (decl, copy_rtx_if_shared (DECL_RTL (decl)));
2033 /* Make sure that virtual stack slots are not shared. */
2034 unshare_all_decls (DECL_INITIAL (fndecl));
2036 /* Unshare just about everything else. */
2037 unshare_all_rtl_1 (insn);
2039 /* Make sure the addresses of stack slots found outside the insn chain
2040 (such as, in DECL_RTL of a variable) are not shared
2041 with the insn chain.
2043 This special care is necessary when the stack slot MEM does not
2044 actually appear in the insn chain. If it does appear, its address
2045 is unshared from all else at that point. */
2046 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
2049 /* Go through all the RTL insn bodies and copy any invalid shared
2050 structure, again. This is a fairly expensive thing to do so it
2051 should be done sparingly. */
2054 unshare_all_rtl_again (insn)
2060 for (p = insn; p; p = NEXT_INSN (p))
2063 reset_used_flags (PATTERN (p));
2064 reset_used_flags (REG_NOTES (p));
2065 reset_used_flags (LOG_LINKS (p));
2068 /* Make sure that virtual stack slots are not shared. */
2069 reset_used_decls (DECL_INITIAL (cfun->decl));
2071 /* Make sure that virtual parameters are not shared. */
2072 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
2073 reset_used_flags (DECL_RTL (decl));
2075 reset_used_flags (stack_slot_list);
2077 unshare_all_rtl (cfun->decl, insn);
2080 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2081 Assumes the mark bits are cleared at entry. */
2084 unshare_all_rtl_1 (insn)
2087 for (; insn; insn = NEXT_INSN (insn))
2090 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
2091 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
2092 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
2096 /* Go through all virtual stack slots of a function and copy any
2097 shared structure. */
2099 unshare_all_decls (blk)
2104 /* Copy shared decls. */
2105 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2106 if (DECL_RTL_SET_P (t))
2107 SET_DECL_RTL (t, copy_rtx_if_shared (DECL_RTL (t)));
2109 /* Now process sub-blocks. */
2110 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2111 unshare_all_decls (t);
2114 /* Go through all virtual stack slots of a function and mark them as
2117 reset_used_decls (blk)
2123 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2124 if (DECL_RTL_SET_P (t))
2125 reset_used_flags (DECL_RTL (t));
2127 /* Now process sub-blocks. */
2128 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2129 reset_used_decls (t);
2132 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2133 Recursively does the same for subexpressions. */
2136 copy_rtx_if_shared (orig)
2142 const char *format_ptr;
2148 code = GET_CODE (x);
2150 /* These types may be freely shared. */
2163 /* SCRATCH must be shared because they represent distinct values. */
2167 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2168 a LABEL_REF, it isn't sharable. */
2169 if (GET_CODE (XEXP (x, 0)) == PLUS
2170 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
2171 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
2180 /* The chain of insns is not being copied. */
2184 /* A MEM is allowed to be shared if its address is constant.
2186 We used to allow sharing of MEMs which referenced
2187 virtual_stack_vars_rtx or virtual_incoming_args_rtx, but
2188 that can lose. instantiate_virtual_regs will not unshare
2189 the MEMs, and combine may change the structure of the address
2190 because it looks safe and profitable in one context, but
2191 in some other context it creates unrecognizable RTL. */
2192 if (CONSTANT_ADDRESS_P (XEXP (x, 0)))
2201 /* This rtx may not be shared. If it has already been seen,
2202 replace it with a copy of itself. */
2208 copy = rtx_alloc (code);
2210 (sizeof (*copy) - sizeof (copy->fld)
2211 + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code)));
2217 /* Now scan the subexpressions recursively.
2218 We can store any replaced subexpressions directly into X
2219 since we know X is not shared! Any vectors in X
2220 must be copied if X was copied. */
2222 format_ptr = GET_RTX_FORMAT (code);
2224 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2226 switch (*format_ptr++)
2229 XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
2233 if (XVEC (x, i) != NULL)
2236 int len = XVECLEN (x, i);
2238 if (copied && len > 0)
2239 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
2240 for (j = 0; j < len; j++)
2241 XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j));
2249 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2250 to look for shared sub-parts. */
2253 reset_used_flags (x)
2258 const char *format_ptr;
2263 code = GET_CODE (x);
2265 /* These types may be freely shared so we needn't do any resetting
2286 /* The chain of insns is not being copied. */
2295 format_ptr = GET_RTX_FORMAT (code);
2296 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2298 switch (*format_ptr++)
2301 reset_used_flags (XEXP (x, i));
2305 for (j = 0; j < XVECLEN (x, i); j++)
2306 reset_used_flags (XVECEXP (x, i, j));
2312 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2313 Return X or the rtx for the pseudo reg the value of X was copied into.
2314 OTHER must be valid as a SET_DEST. */
2317 make_safe_from (x, other)
2321 switch (GET_CODE (other))
2324 other = SUBREG_REG (other);
2326 case STRICT_LOW_PART:
2329 other = XEXP (other, 0);
2335 if ((GET_CODE (other) == MEM
2337 && GET_CODE (x) != REG
2338 && GET_CODE (x) != SUBREG)
2339 || (GET_CODE (other) == REG
2340 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2341 || reg_mentioned_p (other, x))))
2343 rtx temp = gen_reg_rtx (GET_MODE (x));
2344 emit_move_insn (temp, x);
2350 /* Emission of insns (adding them to the doubly-linked list). */
2352 /* Return the first insn of the current sequence or current function. */
2360 /* Return the last insn emitted in current sequence or current function. */
2368 /* Specify a new insn as the last in the chain. */
2371 set_last_insn (insn)
2374 if (NEXT_INSN (insn) != 0)
2379 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2382 get_last_insn_anywhere ()
2384 struct sequence_stack *stack;
2387 for (stack = seq_stack; stack; stack = stack->next)
2388 if (stack->last != 0)
2393 /* Return a number larger than any instruction's uid in this function. */
2398 return cur_insn_uid;
2401 /* Renumber instructions so that no instruction UIDs are wasted. */
2404 renumber_insns (stream)
2409 /* If we're not supposed to renumber instructions, don't. */
2410 if (!flag_renumber_insns)
2413 /* If there aren't that many instructions, then it's not really
2414 worth renumbering them. */
2415 if (flag_renumber_insns == 1 && get_max_uid () < 25000)
2420 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
2423 fprintf (stream, "Renumbering insn %d to %d\n",
2424 INSN_UID (insn), cur_insn_uid);
2425 INSN_UID (insn) = cur_insn_uid++;
2429 /* Return the next insn. If it is a SEQUENCE, return the first insn
2438 insn = NEXT_INSN (insn);
2439 if (insn && GET_CODE (insn) == INSN
2440 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2441 insn = XVECEXP (PATTERN (insn), 0, 0);
2447 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2451 previous_insn (insn)
2456 insn = PREV_INSN (insn);
2457 if (insn && GET_CODE (insn) == INSN
2458 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2459 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
2465 /* Return the next insn after INSN that is not a NOTE. This routine does not
2466 look inside SEQUENCEs. */
2469 next_nonnote_insn (insn)
2474 insn = NEXT_INSN (insn);
2475 if (insn == 0 || GET_CODE (insn) != NOTE)
2482 /* Return the previous insn before INSN that is not a NOTE. This routine does
2483 not look inside SEQUENCEs. */
2486 prev_nonnote_insn (insn)
2491 insn = PREV_INSN (insn);
2492 if (insn == 0 || GET_CODE (insn) != NOTE)
2499 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2500 or 0, if there is none. This routine does not look inside
2504 next_real_insn (insn)
2509 insn = NEXT_INSN (insn);
2510 if (insn == 0 || GET_CODE (insn) == INSN
2511 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
2518 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2519 or 0, if there is none. This routine does not look inside
2523 prev_real_insn (insn)
2528 insn = PREV_INSN (insn);
2529 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
2530 || GET_CODE (insn) == JUMP_INSN)
2537 /* Find the next insn after INSN that really does something. This routine
2538 does not look inside SEQUENCEs. Until reload has completed, this is the
2539 same as next_real_insn. */
2542 active_insn_p (insn)
2545 return (GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
2546 || (GET_CODE (insn) == INSN
2547 && (! reload_completed
2548 || (GET_CODE (PATTERN (insn)) != USE
2549 && GET_CODE (PATTERN (insn)) != CLOBBER))));
2553 next_active_insn (insn)
2558 insn = NEXT_INSN (insn);
2559 if (insn == 0 || active_insn_p (insn))
2566 /* Find the last insn before INSN that really does something. This routine
2567 does not look inside SEQUENCEs. Until reload has completed, this is the
2568 same as prev_real_insn. */
2571 prev_active_insn (insn)
2576 insn = PREV_INSN (insn);
2577 if (insn == 0 || active_insn_p (insn))
2584 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2592 insn = NEXT_INSN (insn);
2593 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2600 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
2608 insn = PREV_INSN (insn);
2609 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2617 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
2618 and REG_CC_USER notes so we can find it. */
2621 link_cc0_insns (insn)
2624 rtx user = next_nonnote_insn (insn);
2626 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
2627 user = XVECEXP (PATTERN (user), 0, 0);
2629 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn,
2631 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
2634 /* Return the next insn that uses CC0 after INSN, which is assumed to
2635 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
2636 applied to the result of this function should yield INSN).
2638 Normally, this is simply the next insn. However, if a REG_CC_USER note
2639 is present, it contains the insn that uses CC0.
2641 Return 0 if we can't find the insn. */
2644 next_cc0_user (insn)
2647 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
2650 return XEXP (note, 0);
2652 insn = next_nonnote_insn (insn);
2653 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
2654 insn = XVECEXP (PATTERN (insn), 0, 0);
2656 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
2662 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
2663 note, it is the previous insn. */
2666 prev_cc0_setter (insn)
2669 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2672 return XEXP (note, 0);
2674 insn = prev_nonnote_insn (insn);
2675 if (! sets_cc0_p (PATTERN (insn)))
2682 /* Increment the label uses for all labels present in rtx. */
2692 code = GET_CODE (x);
2693 if (code == LABEL_REF)
2694 LABEL_NUSES (XEXP (x, 0))++;
2696 fmt = GET_RTX_FORMAT (code);
2697 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2700 mark_label_nuses (XEXP (x, i));
2701 else if (fmt[i] == 'E')
2702 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
2703 mark_label_nuses (XVECEXP (x, i, j));
2708 /* Try splitting insns that can be split for better scheduling.
2709 PAT is the pattern which might split.
2710 TRIAL is the insn providing PAT.
2711 LAST is non-zero if we should return the last insn of the sequence produced.
2713 If this routine succeeds in splitting, it returns the first or last
2714 replacement insn depending on the value of LAST. Otherwise, it
2715 returns TRIAL. If the insn to be returned can be split, it will be. */
2718 try_split (pat, trial, last)
2722 rtx before = PREV_INSN (trial);
2723 rtx after = NEXT_INSN (trial);
2724 int has_barrier = 0;
2729 if (any_condjump_p (trial)
2730 && (note = find_reg_note (trial, REG_BR_PROB, 0)))
2731 split_branch_probability = INTVAL (XEXP (note, 0));
2732 probability = split_branch_probability;
2734 seq = split_insns (pat, trial);
2736 split_branch_probability = -1;
2738 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
2739 We may need to handle this specially. */
2740 if (after && GET_CODE (after) == BARRIER)
2743 after = NEXT_INSN (after);
2748 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
2749 The latter case will normally arise only when being done so that
2750 it, in turn, will be split (SFmode on the 29k is an example). */
2751 if (GET_CODE (seq) == SEQUENCE)
2755 /* Avoid infinite loop if any insn of the result matches
2756 the original pattern. */
2757 for (i = 0; i < XVECLEN (seq, 0); i++)
2758 if (GET_CODE (XVECEXP (seq, 0, i)) == INSN
2759 && rtx_equal_p (PATTERN (XVECEXP (seq, 0, i)), pat))
2763 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2764 if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN)
2766 rtx insn = XVECEXP (seq, 0, i);
2767 mark_jump_label (PATTERN (insn),
2768 XVECEXP (seq, 0, i), 0);
2770 if (probability != -1
2771 && any_condjump_p (insn)
2772 && !find_reg_note (insn, REG_BR_PROB, 0))
2774 /* We can preserve the REG_BR_PROB notes only if exactly
2775 one jump is created, otherwise the machinde description
2776 is responsible for this step using
2777 split_branch_probability variable. */
2781 = gen_rtx_EXPR_LIST (REG_BR_PROB,
2782 GEN_INT (probability),
2787 /* If we are splitting a CALL_INSN, look for the CALL_INSN
2788 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
2789 if (GET_CODE (trial) == CALL_INSN)
2790 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2791 if (GET_CODE (XVECEXP (seq, 0, i)) == CALL_INSN)
2792 CALL_INSN_FUNCTION_USAGE (XVECEXP (seq, 0, i))
2793 = CALL_INSN_FUNCTION_USAGE (trial);
2795 /* Copy notes, particularly those related to the CFG. */
2796 for (note = REG_NOTES (trial); note ; note = XEXP (note, 1))
2798 switch (REG_NOTE_KIND (note))
2801 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2803 rtx insn = XVECEXP (seq, 0, i);
2804 if (GET_CODE (insn) == CALL_INSN
2805 || (flag_non_call_exceptions
2806 && may_trap_p (PATTERN (insn))))
2808 = gen_rtx_EXPR_LIST (REG_EH_REGION,
2816 case REG_ALWAYS_RETURN:
2817 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2819 rtx insn = XVECEXP (seq, 0, i);
2820 if (GET_CODE (insn) == CALL_INSN)
2822 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
2828 case REG_NON_LOCAL_GOTO:
2829 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2831 rtx insn = XVECEXP (seq, 0, i);
2832 if (GET_CODE (insn) == JUMP_INSN)
2834 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
2845 /* If there are LABELS inside the split insns increment the
2846 usage count so we don't delete the label. */
2847 if (GET_CODE (trial) == INSN)
2848 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2849 if (GET_CODE (XVECEXP (seq, 0, i)) == INSN)
2850 mark_label_nuses (PATTERN (XVECEXP (seq, 0, i)));
2852 tem = emit_insn_after (seq, trial);
2854 delete_related_insns (trial);
2856 emit_barrier_after (tem);
2858 /* Recursively call try_split for each new insn created; by the
2859 time control returns here that insn will be fully split, so
2860 set LAST and continue from the insn after the one returned.
2861 We can't use next_active_insn here since AFTER may be a note.
2862 Ignore deleted insns, which can be occur if not optimizing. */
2863 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
2864 if (! INSN_DELETED_P (tem) && INSN_P (tem))
2865 tem = try_split (PATTERN (tem), tem, 1);
2867 /* Avoid infinite loop if the result matches the original pattern. */
2868 else if (rtx_equal_p (seq, pat))
2872 PATTERN (trial) = seq;
2873 INSN_CODE (trial) = -1;
2874 try_split (seq, trial, last);
2877 /* Return either the first or the last insn, depending on which was
2880 ? (after ? PREV_INSN (after) : last_insn)
2881 : NEXT_INSN (before);
2887 /* Make and return an INSN rtx, initializing all its slots.
2888 Store PATTERN in the pattern slots. */
2891 make_insn_raw (pattern)
2896 insn = rtx_alloc (INSN);
2898 INSN_UID (insn) = cur_insn_uid++;
2899 PATTERN (insn) = pattern;
2900 INSN_CODE (insn) = -1;
2901 LOG_LINKS (insn) = NULL;
2902 REG_NOTES (insn) = NULL;
2904 #ifdef ENABLE_RTL_CHECKING
2907 && (returnjump_p (insn)
2908 || (GET_CODE (insn) == SET
2909 && SET_DEST (insn) == pc_rtx)))
2911 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
2919 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
2922 make_jump_insn_raw (pattern)
2927 insn = rtx_alloc (JUMP_INSN);
2928 INSN_UID (insn) = cur_insn_uid++;
2930 PATTERN (insn) = pattern;
2931 INSN_CODE (insn) = -1;
2932 LOG_LINKS (insn) = NULL;
2933 REG_NOTES (insn) = NULL;
2934 JUMP_LABEL (insn) = NULL;
2939 /* Like `make_insn' but make a CALL_INSN instead of an insn. */
2942 make_call_insn_raw (pattern)
2947 insn = rtx_alloc (CALL_INSN);
2948 INSN_UID (insn) = cur_insn_uid++;
2950 PATTERN (insn) = pattern;
2951 INSN_CODE (insn) = -1;
2952 LOG_LINKS (insn) = NULL;
2953 REG_NOTES (insn) = NULL;
2954 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
2959 /* Add INSN to the end of the doubly-linked list.
2960 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
2966 PREV_INSN (insn) = last_insn;
2967 NEXT_INSN (insn) = 0;
2969 if (NULL != last_insn)
2970 NEXT_INSN (last_insn) = insn;
2972 if (NULL == first_insn)
2978 /* Add INSN into the doubly-linked list after insn AFTER. This and
2979 the next should be the only functions called to insert an insn once
2980 delay slots have been filled since only they know how to update a
2984 add_insn_after (insn, after)
2987 rtx next = NEXT_INSN (after);
2990 if (optimize && INSN_DELETED_P (after))
2993 NEXT_INSN (insn) = next;
2994 PREV_INSN (insn) = after;
2998 PREV_INSN (next) = insn;
2999 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3000 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
3002 else if (last_insn == after)
3006 struct sequence_stack *stack = seq_stack;
3007 /* Scan all pending sequences too. */
3008 for (; stack; stack = stack->next)
3009 if (after == stack->last)
3019 if (basic_block_for_insn
3020 && (unsigned int)INSN_UID (after) < basic_block_for_insn->num_elements
3021 && (bb = BLOCK_FOR_INSN (after)))
3023 set_block_for_insn (insn, bb);
3024 /* Should not happen as first in the BB is always
3025 eigther NOTE or LABEL. */
3026 if (bb->end == after
3027 /* Avoid clobbering of structure when creating new BB. */
3028 && GET_CODE (insn) != BARRIER
3029 && (GET_CODE (insn) != NOTE
3030 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3034 NEXT_INSN (after) = insn;
3035 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
3037 rtx sequence = PATTERN (after);
3038 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3042 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3043 the previous should be the only functions called to insert an insn once
3044 delay slots have been filled since only they know how to update a
3048 add_insn_before (insn, before)
3051 rtx prev = PREV_INSN (before);
3054 if (optimize && INSN_DELETED_P (before))
3057 PREV_INSN (insn) = prev;
3058 NEXT_INSN (insn) = before;
3062 NEXT_INSN (prev) = insn;
3063 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3065 rtx sequence = PATTERN (prev);
3066 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3069 else if (first_insn == before)
3073 struct sequence_stack *stack = seq_stack;
3074 /* Scan all pending sequences too. */
3075 for (; stack; stack = stack->next)
3076 if (before == stack->first)
3078 stack->first = insn;
3086 if (basic_block_for_insn
3087 && (unsigned int)INSN_UID (before) < basic_block_for_insn->num_elements
3088 && (bb = BLOCK_FOR_INSN (before)))
3090 set_block_for_insn (insn, bb);
3091 /* Should not happen as first in the BB is always
3092 eigther NOTE or LABEl. */
3093 if (bb->head == insn
3094 /* Avoid clobbering of structure when creating new BB. */
3095 && GET_CODE (insn) != BARRIER
3096 && (GET_CODE (insn) != NOTE
3097 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3101 PREV_INSN (before) = insn;
3102 if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE)
3103 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
3106 /* Remove an insn from its doubly-linked list. This function knows how
3107 to handle sequences. */
3112 rtx next = NEXT_INSN (insn);
3113 rtx prev = PREV_INSN (insn);
3118 NEXT_INSN (prev) = next;
3119 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3121 rtx sequence = PATTERN (prev);
3122 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
3125 else if (first_insn == insn)
3129 struct sequence_stack *stack = seq_stack;
3130 /* Scan all pending sequences too. */
3131 for (; stack; stack = stack->next)
3132 if (insn == stack->first)
3134 stack->first = next;
3144 PREV_INSN (next) = prev;
3145 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3146 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
3148 else if (last_insn == insn)
3152 struct sequence_stack *stack = seq_stack;
3153 /* Scan all pending sequences too. */
3154 for (; stack; stack = stack->next)
3155 if (insn == stack->last)
3164 if (basic_block_for_insn
3165 && (unsigned int)INSN_UID (insn) < basic_block_for_insn->num_elements
3166 && (bb = BLOCK_FOR_INSN (insn)))
3168 if (bb->head == insn)
3170 /* Never ever delete the basic block note without deleting whole basic
3172 if (GET_CODE (insn) == NOTE)
3176 if (bb->end == insn)
3181 /* Delete all insns made since FROM.
3182 FROM becomes the new last instruction. */
3185 delete_insns_since (from)
3191 NEXT_INSN (from) = 0;
3195 /* This function is deprecated, please use sequences instead.
3197 Move a consecutive bunch of insns to a different place in the chain.
3198 The insns to be moved are those between FROM and TO.
3199 They are moved to a new position after the insn AFTER.
3200 AFTER must not be FROM or TO or any insn in between.
3202 This function does not know about SEQUENCEs and hence should not be
3203 called after delay-slot filling has been done. */
3206 reorder_insns_nobb (from, to, after)
3207 rtx from, to, after;
3209 /* Splice this bunch out of where it is now. */
3210 if (PREV_INSN (from))
3211 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
3213 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
3214 if (last_insn == to)
3215 last_insn = PREV_INSN (from);
3216 if (first_insn == from)
3217 first_insn = NEXT_INSN (to);
3219 /* Make the new neighbors point to it and it to them. */
3220 if (NEXT_INSN (after))
3221 PREV_INSN (NEXT_INSN (after)) = to;
3223 NEXT_INSN (to) = NEXT_INSN (after);
3224 PREV_INSN (from) = after;
3225 NEXT_INSN (after) = from;
3226 if (after == last_insn)
3230 /* Same as function above, but take care to update BB boundaries. */
3232 reorder_insns (from, to, after)
3233 rtx from, to, after;
3235 rtx prev = PREV_INSN (from);
3236 basic_block bb, bb2;
3238 reorder_insns_nobb (from, to, after);
3240 if (basic_block_for_insn
3241 && (unsigned int)INSN_UID (after) < basic_block_for_insn->num_elements
3242 && (bb = BLOCK_FOR_INSN (after)))
3246 if (basic_block_for_insn
3247 && (unsigned int)INSN_UID (from) < basic_block_for_insn->num_elements
3248 && (bb2 = BLOCK_FOR_INSN (from)))
3254 if (bb->end == after)
3257 for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
3258 set_block_for_insn (x, bb);
3262 /* Return the line note insn preceding INSN. */
3265 find_line_note (insn)
3268 if (no_line_numbers)
3271 for (; insn; insn = PREV_INSN (insn))
3272 if (GET_CODE (insn) == NOTE
3273 && NOTE_LINE_NUMBER (insn) >= 0)
3279 /* Like reorder_insns, but inserts line notes to preserve the line numbers
3280 of the moved insns when debugging. This may insert a note between AFTER
3281 and FROM, and another one after TO. */
3284 reorder_insns_with_line_notes (from, to, after)
3285 rtx from, to, after;
3287 rtx from_line = find_line_note (from);
3288 rtx after_line = find_line_note (after);
3290 reorder_insns (from, to, after);
3292 if (from_line == after_line)
3296 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
3297 NOTE_LINE_NUMBER (from_line),
3300 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
3301 NOTE_LINE_NUMBER (after_line),
3305 /* Remove unnecessary notes from the instruction stream. */
3308 remove_unnecessary_notes ()
3310 rtx block_stack = NULL_RTX;
3311 rtx eh_stack = NULL_RTX;
3316 /* We must not remove the first instruction in the function because
3317 the compiler depends on the first instruction being a note. */
3318 for (insn = NEXT_INSN (get_insns ()); insn; insn = next)
3320 /* Remember what's next. */
3321 next = NEXT_INSN (insn);
3323 /* We're only interested in notes. */
3324 if (GET_CODE (insn) != NOTE)
3327 switch (NOTE_LINE_NUMBER (insn))
3329 case NOTE_INSN_DELETED:
3333 case NOTE_INSN_EH_REGION_BEG:
3334 eh_stack = alloc_INSN_LIST (insn, eh_stack);
3337 case NOTE_INSN_EH_REGION_END:
3338 /* Too many end notes. */
3339 if (eh_stack == NULL_RTX)
3341 /* Mismatched nesting. */
3342 if (NOTE_EH_HANDLER (XEXP (eh_stack, 0)) != NOTE_EH_HANDLER (insn))
3345 eh_stack = XEXP (eh_stack, 1);
3346 free_INSN_LIST_node (tmp);
3349 case NOTE_INSN_BLOCK_BEG:
3350 /* By now, all notes indicating lexical blocks should have
3351 NOTE_BLOCK filled in. */
3352 if (NOTE_BLOCK (insn) == NULL_TREE)
3354 block_stack = alloc_INSN_LIST (insn, block_stack);
3357 case NOTE_INSN_BLOCK_END:
3358 /* Too many end notes. */
3359 if (block_stack == NULL_RTX)
3361 /* Mismatched nesting. */
3362 if (NOTE_BLOCK (XEXP (block_stack, 0)) != NOTE_BLOCK (insn))
3365 block_stack = XEXP (block_stack, 1);
3366 free_INSN_LIST_node (tmp);
3368 /* Scan back to see if there are any non-note instructions
3369 between INSN and the beginning of this block. If not,
3370 then there is no PC range in the generated code that will
3371 actually be in this block, so there's no point in
3372 remembering the existence of the block. */
3373 for (tmp = PREV_INSN (insn); tmp ; tmp = PREV_INSN (tmp))
3375 /* This block contains a real instruction. Note that we
3376 don't include labels; if the only thing in the block
3377 is a label, then there are still no PC values that
3378 lie within the block. */
3382 /* We're only interested in NOTEs. */
3383 if (GET_CODE (tmp) != NOTE)
3386 if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_BEG)
3388 /* We just verified that this BLOCK matches us with
3389 the block_stack check above. Never delete the
3390 BLOCK for the outermost scope of the function; we
3391 can refer to names from that scope even if the
3392 block notes are messed up. */
3393 if (! is_body_block (NOTE_BLOCK (insn))
3394 && (*debug_hooks->ignore_block) (NOTE_BLOCK (insn)))
3401 else if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_END)
3402 /* There's a nested block. We need to leave the
3403 current block in place since otherwise the debugger
3404 wouldn't be able to show symbols from our block in
3405 the nested block. */
3411 /* Too many begin notes. */
3412 if (block_stack || eh_stack)
3417 /* Emit an insn of given code and pattern
3418 at a specified place within the doubly-linked list. */
3420 /* Make an instruction with body PATTERN
3421 and output it before the instruction BEFORE. */
3424 emit_insn_before (pattern, before)
3425 rtx pattern, before;
3429 if (GET_CODE (pattern) == SEQUENCE)
3433 for (i = 0; i < XVECLEN (pattern, 0); i++)
3435 insn = XVECEXP (pattern, 0, i);
3436 add_insn_before (insn, before);
3441 insn = make_insn_raw (pattern);
3442 add_insn_before (insn, before);
3448 /* Make an instruction with body PATTERN and code JUMP_INSN
3449 and output it before the instruction BEFORE. */
3452 emit_jump_insn_before (pattern, before)
3453 rtx pattern, before;
3457 if (GET_CODE (pattern) == SEQUENCE)
3458 insn = emit_insn_before (pattern, before);
3461 insn = make_jump_insn_raw (pattern);
3462 add_insn_before (insn, before);
3468 /* Make an instruction with body PATTERN and code CALL_INSN
3469 and output it before the instruction BEFORE. */
3472 emit_call_insn_before (pattern, before)
3473 rtx pattern, before;
3477 if (GET_CODE (pattern) == SEQUENCE)
3478 insn = emit_insn_before (pattern, before);
3481 insn = make_call_insn_raw (pattern);
3482 add_insn_before (insn, before);
3483 PUT_CODE (insn, CALL_INSN);
3489 /* Make an insn of code BARRIER
3490 and output it before the insn BEFORE. */
3493 emit_barrier_before (before)
3496 rtx insn = rtx_alloc (BARRIER);
3498 INSN_UID (insn) = cur_insn_uid++;
3500 add_insn_before (insn, before);
3504 /* Emit the label LABEL before the insn BEFORE. */
3507 emit_label_before (label, before)
3510 /* This can be called twice for the same label as a result of the
3511 confusion that follows a syntax error! So make it harmless. */
3512 if (INSN_UID (label) == 0)
3514 INSN_UID (label) = cur_insn_uid++;
3515 add_insn_before (label, before);
3521 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
3524 emit_note_before (subtype, before)
3528 rtx note = rtx_alloc (NOTE);
3529 INSN_UID (note) = cur_insn_uid++;
3530 NOTE_SOURCE_FILE (note) = 0;
3531 NOTE_LINE_NUMBER (note) = subtype;
3533 add_insn_before (note, before);
3537 /* Make an insn of code INSN with body PATTERN
3538 and output it after the insn AFTER. */
3541 emit_insn_after (pattern, after)
3546 if (GET_CODE (pattern) == SEQUENCE)
3550 for (i = 0; i < XVECLEN (pattern, 0); i++)
3552 insn = XVECEXP (pattern, 0, i);
3553 add_insn_after (insn, after);
3559 insn = make_insn_raw (pattern);
3560 add_insn_after (insn, after);
3566 /* Similar to emit_insn_after, except that line notes are to be inserted so
3567 as to act as if this insn were at FROM. */
3570 emit_insn_after_with_line_notes (pattern, after, from)
3571 rtx pattern, after, from;
3573 rtx from_line = find_line_note (from);
3574 rtx after_line = find_line_note (after);
3575 rtx insn = emit_insn_after (pattern, after);
3578 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
3579 NOTE_LINE_NUMBER (from_line),
3583 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
3584 NOTE_LINE_NUMBER (after_line),
3588 /* Make an insn of code JUMP_INSN with body PATTERN
3589 and output it after the insn AFTER. */
3592 emit_jump_insn_after (pattern, after)
3597 if (GET_CODE (pattern) == SEQUENCE)
3598 insn = emit_insn_after (pattern, after);
3601 insn = make_jump_insn_raw (pattern);
3602 add_insn_after (insn, after);
3608 /* Make an insn of code BARRIER
3609 and output it after the insn AFTER. */
3612 emit_barrier_after (after)
3615 rtx insn = rtx_alloc (BARRIER);
3617 INSN_UID (insn) = cur_insn_uid++;
3619 add_insn_after (insn, after);
3623 /* Emit the label LABEL after the insn AFTER. */
3626 emit_label_after (label, after)
3629 /* This can be called twice for the same label
3630 as a result of the confusion that follows a syntax error!
3631 So make it harmless. */
3632 if (INSN_UID (label) == 0)
3634 INSN_UID (label) = cur_insn_uid++;
3635 add_insn_after (label, after);
3641 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
3644 emit_note_after (subtype, after)
3648 rtx note = rtx_alloc (NOTE);
3649 INSN_UID (note) = cur_insn_uid++;
3650 NOTE_SOURCE_FILE (note) = 0;
3651 NOTE_LINE_NUMBER (note) = subtype;
3652 add_insn_after (note, after);
3656 /* Emit a line note for FILE and LINE after the insn AFTER. */
3659 emit_line_note_after (file, line, after)
3666 if (no_line_numbers && line > 0)
3672 note = rtx_alloc (NOTE);
3673 INSN_UID (note) = cur_insn_uid++;
3674 NOTE_SOURCE_FILE (note) = file;
3675 NOTE_LINE_NUMBER (note) = line;
3676 add_insn_after (note, after);
3680 /* Make an insn of code INSN with pattern PATTERN
3681 and add it to the end of the doubly-linked list.
3682 If PATTERN is a SEQUENCE, take the elements of it
3683 and emit an insn for each element.
3685 Returns the last insn emitted. */
3691 rtx insn = last_insn;
3693 if (GET_CODE (pattern) == SEQUENCE)
3697 for (i = 0; i < XVECLEN (pattern, 0); i++)
3699 insn = XVECEXP (pattern, 0, i);
3705 insn = make_insn_raw (pattern);
3712 /* Emit the insns in a chain starting with INSN.
3713 Return the last insn emitted. */
3723 rtx next = NEXT_INSN (insn);
3732 /* Emit the insns in a chain starting with INSN and place them in front of
3733 the insn BEFORE. Return the last insn emitted. */
3736 emit_insns_before (insn, before)
3744 rtx next = NEXT_INSN (insn);
3745 add_insn_before (insn, before);
3753 /* Emit the insns in a chain starting with FIRST and place them in back of
3754 the insn AFTER. Return the last insn emitted. */
3757 emit_insns_after (first, after)
3771 if (basic_block_for_insn
3772 && (unsigned int)INSN_UID (after) < basic_block_for_insn->num_elements
3773 && (bb = BLOCK_FOR_INSN (after)))
3775 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
3776 set_block_for_insn (last, bb);
3777 set_block_for_insn (last, bb);
3778 if (bb->end == after)
3782 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
3785 after_after = NEXT_INSN (after);
3787 NEXT_INSN (after) = first;
3788 PREV_INSN (first) = after;
3789 NEXT_INSN (last) = after_after;
3791 PREV_INSN (after_after) = last;
3793 if (after == last_insn)
3798 /* Make an insn of code JUMP_INSN with pattern PATTERN
3799 and add it to the end of the doubly-linked list. */
3802 emit_jump_insn (pattern)
3805 if (GET_CODE (pattern) == SEQUENCE)
3806 return emit_insn (pattern);
3809 rtx insn = make_jump_insn_raw (pattern);
3815 /* Make an insn of code CALL_INSN with pattern PATTERN
3816 and add it to the end of the doubly-linked list. */
3819 emit_call_insn (pattern)
3822 if (GET_CODE (pattern) == SEQUENCE)
3823 return emit_insn (pattern);
3826 rtx insn = make_call_insn_raw (pattern);
3828 PUT_CODE (insn, CALL_INSN);
3833 /* Add the label LABEL to the end of the doubly-linked list. */
3839 /* This can be called twice for the same label
3840 as a result of the confusion that follows a syntax error!
3841 So make it harmless. */
3842 if (INSN_UID (label) == 0)
3844 INSN_UID (label) = cur_insn_uid++;
3850 /* Make an insn of code BARRIER
3851 and add it to the end of the doubly-linked list. */
3856 rtx barrier = rtx_alloc (BARRIER);
3857 INSN_UID (barrier) = cur_insn_uid++;
3862 /* Make an insn of code NOTE
3863 with data-fields specified by FILE and LINE
3864 and add it to the end of the doubly-linked list,
3865 but only if line-numbers are desired for debugging info. */
3868 emit_line_note (file, line)
3872 set_file_and_line_for_stmt (file, line);
3875 if (no_line_numbers)
3879 return emit_note (file, line);
3882 /* Make an insn of code NOTE
3883 with data-fields specified by FILE and LINE
3884 and add it to the end of the doubly-linked list.
3885 If it is a line-number NOTE, omit it if it matches the previous one. */
3888 emit_note (file, line)
3896 if (file && last_filename && !strcmp (file, last_filename)
3897 && line == last_linenum)
3899 last_filename = file;
3900 last_linenum = line;
3903 if (no_line_numbers && line > 0)
3909 note = rtx_alloc (NOTE);
3910 INSN_UID (note) = cur_insn_uid++;
3911 NOTE_SOURCE_FILE (note) = file;
3912 NOTE_LINE_NUMBER (note) = line;
3917 /* Emit a NOTE, and don't omit it even if LINE is the previous note. */
3920 emit_line_note_force (file, line)
3925 return emit_line_note (file, line);
3928 /* Cause next statement to emit a line note even if the line number
3929 has not changed. This is used at the beginning of a function. */
3932 force_next_line_note ()
3937 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
3938 note of this type already exists, remove it first. */
3941 set_unique_reg_note (insn, kind, datum)
3946 rtx note = find_reg_note (insn, kind, NULL_RTX);
3948 /* First remove the note if there already is one. */
3950 remove_note (insn, note);
3952 REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn));
3955 /* Return an indication of which type of insn should have X as a body.
3956 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
3962 if (GET_CODE (x) == CODE_LABEL)
3964 if (GET_CODE (x) == CALL)
3966 if (GET_CODE (x) == RETURN)
3968 if (GET_CODE (x) == SET)
3970 if (SET_DEST (x) == pc_rtx)
3972 else if (GET_CODE (SET_SRC (x)) == CALL)
3977 if (GET_CODE (x) == PARALLEL)
3980 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
3981 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
3983 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3984 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
3986 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3987 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
3993 /* Emit the rtl pattern X as an appropriate kind of insn.
3994 If X is a label, it is simply added into the insn chain. */
4000 enum rtx_code code = classify_insn (x);
4002 if (code == CODE_LABEL)
4003 return emit_label (x);
4004 else if (code == INSN)
4005 return emit_insn (x);
4006 else if (code == JUMP_INSN)
4008 rtx insn = emit_jump_insn (x);
4009 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
4010 return emit_barrier ();
4013 else if (code == CALL_INSN)
4014 return emit_call_insn (x);
4019 /* Begin emitting insns to a sequence which can be packaged in an
4020 RTL_EXPR. If this sequence will contain something that might cause
4021 the compiler to pop arguments to function calls (because those
4022 pops have previously been deferred; see INHIBIT_DEFER_POP for more
4023 details), use do_pending_stack_adjust before calling this function.
4024 That will ensure that the deferred pops are not accidentally
4025 emitted in the middle of this sequence. */
4030 struct sequence_stack *tem;
4032 tem = (struct sequence_stack *) xmalloc (sizeof (struct sequence_stack));
4034 tem->next = seq_stack;
4035 tem->first = first_insn;
4036 tem->last = last_insn;
4037 tem->sequence_rtl_expr = seq_rtl_expr;
4045 /* Similarly, but indicate that this sequence will be placed in T, an
4046 RTL_EXPR. See the documentation for start_sequence for more
4047 information about how to use this function. */
4050 start_sequence_for_rtl_expr (t)
4058 /* Set up the insn chain starting with FIRST as the current sequence,
4059 saving the previously current one. See the documentation for
4060 start_sequence for more information about how to use this function. */
4063 push_to_sequence (first)
4070 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
4076 /* Set up the insn chain from a chain stort in FIRST to LAST. */
4079 push_to_full_sequence (first, last)
4085 /* We really should have the end of the insn chain here. */
4086 if (last && NEXT_INSN (last))
4090 /* Set up the outer-level insn chain
4091 as the current sequence, saving the previously current one. */
4094 push_topmost_sequence ()
4096 struct sequence_stack *stack, *top = NULL;
4100 for (stack = seq_stack; stack; stack = stack->next)
4103 first_insn = top->first;
4104 last_insn = top->last;
4105 seq_rtl_expr = top->sequence_rtl_expr;
4108 /* After emitting to the outer-level insn chain, update the outer-level
4109 insn chain, and restore the previous saved state. */
4112 pop_topmost_sequence ()
4114 struct sequence_stack *stack, *top = NULL;
4116 for (stack = seq_stack; stack; stack = stack->next)
4119 top->first = first_insn;
4120 top->last = last_insn;
4121 /* ??? Why don't we save seq_rtl_expr here? */
4126 /* After emitting to a sequence, restore previous saved state.
4128 To get the contents of the sequence just made, you must call
4129 `gen_sequence' *before* calling here.
4131 If the compiler might have deferred popping arguments while
4132 generating this sequence, and this sequence will not be immediately
4133 inserted into the instruction stream, use do_pending_stack_adjust
4134 before calling gen_sequence. That will ensure that the deferred
4135 pops are inserted into this sequence, and not into some random
4136 location in the instruction stream. See INHIBIT_DEFER_POP for more
4137 information about deferred popping of arguments. */
4142 struct sequence_stack *tem = seq_stack;
4144 first_insn = tem->first;
4145 last_insn = tem->last;
4146 seq_rtl_expr = tem->sequence_rtl_expr;
4147 seq_stack = tem->next;
4152 /* This works like end_sequence, but records the old sequence in FIRST
4156 end_full_sequence (first, last)
4159 *first = first_insn;
4164 /* Return 1 if currently emitting into a sequence. */
4169 return seq_stack != 0;
4172 /* Generate a SEQUENCE rtx containing the insns already emitted
4173 to the current sequence.
4175 This is how the gen_... function from a DEFINE_EXPAND
4176 constructs the SEQUENCE that it returns. */
4186 /* Count the insns in the chain. */
4188 for (tem = first_insn; tem; tem = NEXT_INSN (tem))
4191 /* If only one insn, return it rather than a SEQUENCE.
4192 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
4193 the case of an empty list.)
4194 We only return the pattern of an insn if its code is INSN and it
4195 has no notes. This ensures that no information gets lost. */
4197 && ! RTX_FRAME_RELATED_P (first_insn)
4198 && GET_CODE (first_insn) == INSN
4199 /* Don't throw away any reg notes. */
4200 && REG_NOTES (first_insn) == 0)
4201 return PATTERN (first_insn);
4203 result = gen_rtx_SEQUENCE (VOIDmode, rtvec_alloc (len));
4205 for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++)
4206 XVECEXP (result, 0, i) = tem;
4211 /* Put the various virtual registers into REGNO_REG_RTX. */
4214 init_virtual_regs (es)
4215 struct emit_status *es;
4217 rtx *ptr = es->x_regno_reg_rtx;
4218 ptr[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
4219 ptr[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
4220 ptr[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
4221 ptr[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
4222 ptr[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
4226 clear_emit_caches ()
4230 /* Clear the start_sequence/gen_sequence cache. */
4231 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
4232 sequence_result[i] = 0;
4236 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
4237 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
4238 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
4239 static int copy_insn_n_scratches;
4241 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4242 copied an ASM_OPERANDS.
4243 In that case, it is the original input-operand vector. */
4244 static rtvec orig_asm_operands_vector;
4246 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4247 copied an ASM_OPERANDS.
4248 In that case, it is the copied input-operand vector. */
4249 static rtvec copy_asm_operands_vector;
4251 /* Likewise for the constraints vector. */
4252 static rtvec orig_asm_constraints_vector;
4253 static rtvec copy_asm_constraints_vector;
4255 /* Recursively create a new copy of an rtx for copy_insn.
4256 This function differs from copy_rtx in that it handles SCRATCHes and
4257 ASM_OPERANDs properly.
4258 Normally, this function is not used directly; use copy_insn as front end.
4259 However, you could first copy an insn pattern with copy_insn and then use
4260 this function afterwards to properly copy any REG_NOTEs containing
4270 const char *format_ptr;
4272 code = GET_CODE (orig);
4288 for (i = 0; i < copy_insn_n_scratches; i++)
4289 if (copy_insn_scratch_in[i] == orig)
4290 return copy_insn_scratch_out[i];
4294 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
4295 a LABEL_REF, it isn't sharable. */
4296 if (GET_CODE (XEXP (orig, 0)) == PLUS
4297 && GET_CODE (XEXP (XEXP (orig, 0), 0)) == SYMBOL_REF
4298 && GET_CODE (XEXP (XEXP (orig, 0), 1)) == CONST_INT)
4302 /* A MEM with a constant address is not sharable. The problem is that
4303 the constant address may need to be reloaded. If the mem is shared,
4304 then reloading one copy of this mem will cause all copies to appear
4305 to have been reloaded. */
4311 copy = rtx_alloc (code);
4313 /* Copy the various flags, and other information. We assume that
4314 all fields need copying, and then clear the fields that should
4315 not be copied. That is the sensible default behavior, and forces
4316 us to explicitly document why we are *not* copying a flag. */
4317 memcpy (copy, orig, sizeof (struct rtx_def) - sizeof (rtunion));
4319 /* We do not copy the USED flag, which is used as a mark bit during
4320 walks over the RTL. */
4323 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
4324 if (GET_RTX_CLASS (code) == 'i')
4328 copy->frame_related = 0;
4331 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
4333 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
4335 copy->fld[i] = orig->fld[i];
4336 switch (*format_ptr++)
4339 if (XEXP (orig, i) != NULL)
4340 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
4345 if (XVEC (orig, i) == orig_asm_constraints_vector)
4346 XVEC (copy, i) = copy_asm_constraints_vector;
4347 else if (XVEC (orig, i) == orig_asm_operands_vector)
4348 XVEC (copy, i) = copy_asm_operands_vector;
4349 else if (XVEC (orig, i) != NULL)
4351 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
4352 for (j = 0; j < XVECLEN (copy, i); j++)
4353 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
4364 /* These are left unchanged. */
4372 if (code == SCRATCH)
4374 i = copy_insn_n_scratches++;
4375 if (i >= MAX_RECOG_OPERANDS)
4377 copy_insn_scratch_in[i] = orig;
4378 copy_insn_scratch_out[i] = copy;
4380 else if (code == ASM_OPERANDS)
4382 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
4383 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
4384 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
4385 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
4391 /* Create a new copy of an rtx.
4392 This function differs from copy_rtx in that it handles SCRATCHes and
4393 ASM_OPERANDs properly.
4394 INSN doesn't really have to be a full INSN; it could be just the
4400 copy_insn_n_scratches = 0;
4401 orig_asm_operands_vector = 0;
4402 orig_asm_constraints_vector = 0;
4403 copy_asm_operands_vector = 0;
4404 copy_asm_constraints_vector = 0;
4405 return copy_insn_1 (insn);
4408 /* Initialize data structures and variables in this file
4409 before generating rtl for each function. */
4414 struct function *f = cfun;
4416 f->emit = (struct emit_status *) xmalloc (sizeof (struct emit_status));
4419 seq_rtl_expr = NULL;
4421 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
4424 first_label_num = label_num;
4428 clear_emit_caches ();
4430 /* Init the tables that describe all the pseudo regs. */
4432 f->emit->regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
4434 f->emit->regno_pointer_align
4435 = (unsigned char *) xcalloc (f->emit->regno_pointer_align_length,
4436 sizeof (unsigned char));
4439 = (rtx *) xcalloc (f->emit->regno_pointer_align_length, sizeof (rtx));
4442 = (tree *) xcalloc (f->emit->regno_pointer_align_length, sizeof (tree));
4444 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
4445 init_virtual_regs (f->emit);
4447 /* Indicate that the virtual registers and stack locations are
4449 REG_POINTER (stack_pointer_rtx) = 1;
4450 REG_POINTER (frame_pointer_rtx) = 1;
4451 REG_POINTER (hard_frame_pointer_rtx) = 1;
4452 REG_POINTER (arg_pointer_rtx) = 1;
4454 REG_POINTER (virtual_incoming_args_rtx) = 1;
4455 REG_POINTER (virtual_stack_vars_rtx) = 1;
4456 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
4457 REG_POINTER (virtual_outgoing_args_rtx) = 1;
4458 REG_POINTER (virtual_cfa_rtx) = 1;
4460 #ifdef STACK_BOUNDARY
4461 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
4462 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
4463 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
4464 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
4466 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
4467 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
4468 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
4469 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
4470 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
4473 #ifdef INIT_EXPANDERS
4478 /* Mark SS for GC. */
4481 mark_sequence_stack (ss)
4482 struct sequence_stack *ss;
4486 ggc_mark_rtx (ss->first);
4487 ggc_mark_tree (ss->sequence_rtl_expr);
4492 /* Mark ES for GC. */
4495 mark_emit_status (es)
4496 struct emit_status *es;
4505 for (i = es->regno_pointer_align_length, r = es->x_regno_reg_rtx,
4507 i > 0; --i, ++r, ++t)
4513 mark_sequence_stack (es->sequence_stack);
4514 ggc_mark_tree (es->sequence_rtl_expr);
4515 ggc_mark_rtx (es->x_first_insn);
4518 /* Create some permanent unique rtl objects shared between all functions.
4519 LINE_NUMBERS is nonzero if line numbers are to be generated. */
4522 init_emit_once (line_numbers)
4526 enum machine_mode mode;
4527 enum machine_mode double_mode;
4529 /* Initialize the CONST_INT and memory attribute hash tables. */
4530 const_int_htab = htab_create (37, const_int_htab_hash,
4531 const_int_htab_eq, NULL);
4532 ggc_add_deletable_htab (const_int_htab, 0, 0);
4534 mem_attrs_htab = htab_create (37, mem_attrs_htab_hash,
4535 mem_attrs_htab_eq, NULL);
4536 ggc_add_deletable_htab (mem_attrs_htab, 0, mem_attrs_mark);
4538 no_line_numbers = ! line_numbers;
4540 /* Compute the word and byte modes. */
4542 byte_mode = VOIDmode;
4543 word_mode = VOIDmode;
4544 double_mode = VOIDmode;
4546 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
4547 mode = GET_MODE_WIDER_MODE (mode))
4549 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
4550 && byte_mode == VOIDmode)
4553 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
4554 && word_mode == VOIDmode)
4558 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
4559 mode = GET_MODE_WIDER_MODE (mode))
4561 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
4562 && double_mode == VOIDmode)
4566 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
4568 /* Assign register numbers to the globally defined register rtx.
4569 This must be done at runtime because the register number field
4570 is in a union and some compilers can't initialize unions. */
4572 pc_rtx = gen_rtx (PC, VOIDmode);
4573 cc0_rtx = gen_rtx (CC0, VOIDmode);
4574 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
4575 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
4576 if (hard_frame_pointer_rtx == 0)
4577 hard_frame_pointer_rtx = gen_raw_REG (Pmode,
4578 HARD_FRAME_POINTER_REGNUM);
4579 if (arg_pointer_rtx == 0)
4580 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
4581 virtual_incoming_args_rtx =
4582 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
4583 virtual_stack_vars_rtx =
4584 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
4585 virtual_stack_dynamic_rtx =
4586 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
4587 virtual_outgoing_args_rtx =
4588 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
4589 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
4591 /* These rtx must be roots if GC is enabled. */
4592 ggc_add_rtx_root (global_rtl, GR_MAX);
4594 #ifdef INIT_EXPANDERS
4595 /* This is to initialize {init|mark|free}_machine_status before the first
4596 call to push_function_context_to. This is needed by the Chill front
4597 end which calls push_function_context_to before the first cal to
4598 init_function_start. */
4602 /* Create the unique rtx's for certain rtx codes and operand values. */
4604 /* Don't use gen_rtx here since gen_rtx in this case
4605 tries to use these variables. */
4606 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
4607 const_int_rtx[i + MAX_SAVED_CONST_INT] =
4608 gen_rtx_raw_CONST_INT (VOIDmode, i);
4609 ggc_add_rtx_root (const_int_rtx, 2 * MAX_SAVED_CONST_INT + 1);
4611 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
4612 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
4613 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
4615 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
4617 dconst0 = REAL_VALUE_ATOF ("0", double_mode);
4618 dconst1 = REAL_VALUE_ATOF ("1", double_mode);
4619 dconst2 = REAL_VALUE_ATOF ("2", double_mode);
4620 dconstm1 = REAL_VALUE_ATOF ("-1", double_mode);
4622 for (i = 0; i <= 2; i++)
4624 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
4625 mode = GET_MODE_WIDER_MODE (mode))
4627 rtx tem = rtx_alloc (CONST_DOUBLE);
4628 union real_extract u;
4630 /* Zero any holes in a structure. */
4631 memset ((char *) &u, 0, sizeof u);
4632 u.d = i == 0 ? dconst0 : i == 1 ? dconst1 : dconst2;
4634 /* Avoid trailing garbage in the rtx. */
4635 if (sizeof (u) < sizeof (HOST_WIDE_INT))
4636 CONST_DOUBLE_LOW (tem) = 0;
4637 if (sizeof (u) < 2 * sizeof (HOST_WIDE_INT))
4638 CONST_DOUBLE_HIGH (tem) = 0;
4640 memcpy (&CONST_DOUBLE_LOW (tem), &u, sizeof u);
4641 CONST_DOUBLE_MEM (tem) = cc0_rtx;
4642 CONST_DOUBLE_CHAIN (tem) = NULL_RTX;
4643 PUT_MODE (tem, mode);
4645 const_tiny_rtx[i][(int) mode] = tem;
4648 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
4650 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
4651 mode = GET_MODE_WIDER_MODE (mode))
4652 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
4654 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
4656 mode = GET_MODE_WIDER_MODE (mode))
4657 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
4660 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
4661 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
4662 const_tiny_rtx[0][i] = const0_rtx;
4664 const_tiny_rtx[0][(int) BImode] = const0_rtx;
4665 if (STORE_FLAG_VALUE == 1)
4666 const_tiny_rtx[1][(int) BImode] = const1_rtx;
4668 /* For bounded pointers, `&const_tiny_rtx[0][0]' is not the same as
4669 `(rtx *) const_tiny_rtx'. The former has bounds that only cover
4670 `const_tiny_rtx[0]', whereas the latter has bounds that cover all. */
4671 ggc_add_rtx_root ((rtx *) const_tiny_rtx, sizeof const_tiny_rtx / sizeof (rtx));
4672 ggc_add_rtx_root (&const_true_rtx, 1);
4674 #ifdef RETURN_ADDRESS_POINTER_REGNUM
4675 return_address_pointer_rtx
4676 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
4680 struct_value_rtx = STRUCT_VALUE;
4682 struct_value_rtx = gen_rtx_REG (Pmode, STRUCT_VALUE_REGNUM);
4685 #ifdef STRUCT_VALUE_INCOMING
4686 struct_value_incoming_rtx = STRUCT_VALUE_INCOMING;
4688 #ifdef STRUCT_VALUE_INCOMING_REGNUM
4689 struct_value_incoming_rtx
4690 = gen_rtx_REG (Pmode, STRUCT_VALUE_INCOMING_REGNUM);
4692 struct_value_incoming_rtx = struct_value_rtx;
4696 #ifdef STATIC_CHAIN_REGNUM
4697 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
4699 #ifdef STATIC_CHAIN_INCOMING_REGNUM
4700 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
4701 static_chain_incoming_rtx
4702 = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
4705 static_chain_incoming_rtx = static_chain_rtx;
4709 static_chain_rtx = STATIC_CHAIN;
4711 #ifdef STATIC_CHAIN_INCOMING
4712 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
4714 static_chain_incoming_rtx = static_chain_rtx;
4718 if (PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
4719 pic_offset_table_rtx = gen_rtx_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
4721 ggc_add_rtx_root (&pic_offset_table_rtx, 1);
4722 ggc_add_rtx_root (&struct_value_rtx, 1);
4723 ggc_add_rtx_root (&struct_value_incoming_rtx, 1);
4724 ggc_add_rtx_root (&static_chain_rtx, 1);
4725 ggc_add_rtx_root (&static_chain_incoming_rtx, 1);
4726 ggc_add_rtx_root (&return_address_pointer_rtx, 1);
4729 /* Query and clear/ restore no_line_numbers. This is used by the
4730 switch / case handling in stmt.c to give proper line numbers in
4731 warnings about unreachable code. */
4734 force_line_numbers ()
4736 int old = no_line_numbers;
4738 no_line_numbers = 0;
4740 force_next_line_note ();
4745 restore_line_number_status (old_value)
4748 no_line_numbers = old_value;