1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains the functions `gen_rtx', `gen_reg_rtx'
26 and `gen_label_rtx' that are the usual ways of creating rtl
27 expressions for most purposes.
29 It also has the functions for creating insns and linking
30 them in the doubly-linked chain.
32 The patterns of the insns are created by machine-dependent
33 routines in insn-emit.c, which is generated automatically from
34 the machine description. These routines use `gen_rtx' to make
35 the individual rtx's of the pattern; what is machine dependent
36 is the kind of rtx's they make and what arguments they use. */
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
55 #include "basic-block.h"
58 /* Commonly used modes. */
60 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
61 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
62 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
63 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
66 /* This is *not* reset after each function. It gives each CODE_LABEL
67 in the entire compilation a unique label number. */
69 static int label_num = 1;
71 /* Highest label number in current function.
72 Zero means use the value of label_num instead.
73 This is nonzero only when belatedly compiling an inline function. */
75 static int last_label_num;
77 /* Value label_num had when set_new_first_and_last_label_number was called.
78 If label_num has not changed since then, last_label_num is valid. */
80 static int base_label_num;
82 /* Nonzero means do not generate NOTEs for source line numbers. */
84 static int no_line_numbers;
86 /* Commonly used rtx's, so that we only need space for one copy.
87 These are initialized once for the entire compilation.
88 All of these except perhaps the floating-point CONST_DOUBLEs
89 are unique; no other rtx-object will be equal to any of these. */
91 rtx global_rtl[GR_MAX];
93 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
94 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
95 record a copy of const[012]_rtx. */
97 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
101 REAL_VALUE_TYPE dconst0;
102 REAL_VALUE_TYPE dconst1;
103 REAL_VALUE_TYPE dconst2;
104 REAL_VALUE_TYPE dconstm1;
106 /* All references to the following fixed hard registers go through
107 these unique rtl objects. On machines where the frame-pointer and
108 arg-pointer are the same register, they use the same unique object.
110 After register allocation, other rtl objects which used to be pseudo-regs
111 may be clobbered to refer to the frame-pointer register.
112 But references that were originally to the frame-pointer can be
113 distinguished from the others because they contain frame_pointer_rtx.
115 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
116 tricky: until register elimination has taken place hard_frame_pointer_rtx
117 should be used if it is being set, and frame_pointer_rtx otherwise. After
118 register elimination hard_frame_pointer_rtx should always be used.
119 On machines where the two registers are same (most) then these are the
122 In an inline procedure, the stack and frame pointer rtxs may not be
123 used for anything else. */
124 rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
125 rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
126 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
127 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
128 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
130 /* This is used to implement __builtin_return_address for some machines.
131 See for instance the MIPS port. */
132 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
134 /* We make one copy of (const_int C) where C is in
135 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
136 to save space during the compilation and simplify comparisons of
139 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
141 /* A hash table storing CONST_INTs whose absolute value is greater
142 than MAX_SAVED_CONST_INT. */
144 static htab_t const_int_htab;
146 /* start_sequence and gen_sequence can make a lot of rtx expressions which are
147 shortly thrown away. We use two mechanisms to prevent this waste:
149 For sizes up to 5 elements, we keep a SEQUENCE and its associated
150 rtvec for use by gen_sequence. One entry for each size is
151 sufficient because most cases are calls to gen_sequence followed by
152 immediately emitting the SEQUENCE. Reuse is safe since emitting a
153 sequence is destructive on the insn in it anyway and hence can't be
156 We do not bother to save this cached data over nested function calls.
157 Instead, we just reinitialize them. */
159 #define SEQUENCE_RESULT_SIZE 5
161 static rtx sequence_result[SEQUENCE_RESULT_SIZE];
163 /* During RTL generation, we also keep a list of free INSN rtl codes. */
164 static rtx free_insn;
166 #define first_insn (cfun->emit->x_first_insn)
167 #define last_insn (cfun->emit->x_last_insn)
168 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
169 #define last_linenum (cfun->emit->x_last_linenum)
170 #define last_filename (cfun->emit->x_last_filename)
171 #define first_label_num (cfun->emit->x_first_label_num)
173 static rtx make_jump_insn_raw PARAMS ((rtx));
174 static rtx make_call_insn_raw PARAMS ((rtx));
175 static rtx find_line_note PARAMS ((rtx));
176 static void mark_sequence_stack PARAMS ((struct sequence_stack *));
177 static void unshare_all_rtl_1 PARAMS ((rtx));
178 static void unshare_all_decls PARAMS ((tree));
179 static void reset_used_decls PARAMS ((tree));
180 static void mark_label_nuses PARAMS ((rtx));
181 static hashval_t const_int_htab_hash PARAMS ((const void *));
182 static int const_int_htab_eq PARAMS ((const void *,
184 static int rtx_htab_mark_1 PARAMS ((void **, void *));
185 static void rtx_htab_mark PARAMS ((void *));
188 /* Returns a hash code for X (which is a really a CONST_INT). */
191 const_int_htab_hash (x)
194 return (hashval_t) INTVAL ((const struct rtx_def *) x);
197 /* Returns non-zero if the value represented by X (which is really a
198 CONST_INT) is the same as that given by Y (which is really a
202 const_int_htab_eq (x, y)
206 return (INTVAL ((const struct rtx_def *) x) == *((const HOST_WIDE_INT *) y));
209 /* Mark the hash-table element X (which is really a pointer to an
213 rtx_htab_mark_1 (x, data)
215 void *data ATTRIBUTE_UNUSED;
221 /* Mark all the elements of HTAB (which is really an htab_t full of
228 htab_traverse (*((htab_t *) htab), rtx_htab_mark_1, NULL);
231 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
232 don't attempt to share with the various global pieces of rtl (such as
233 frame_pointer_rtx). */
236 gen_raw_REG (mode, regno)
237 enum machine_mode mode;
240 rtx x = gen_rtx_raw_REG (mode, regno);
241 ORIGINAL_REGNO (x) = regno;
245 /* There are some RTL codes that require special attention; the generation
246 functions do the raw handling. If you add to this list, modify
247 special_rtx in gengenrtl.c as well. */
250 gen_rtx_CONST_INT (mode, arg)
251 enum machine_mode mode ATTRIBUTE_UNUSED;
256 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
257 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
259 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
260 if (const_true_rtx && arg == STORE_FLAG_VALUE)
261 return const_true_rtx;
264 /* Look up the CONST_INT in the hash table. */
265 slot = htab_find_slot_with_hash (const_int_htab, &arg,
266 (hashval_t) arg, INSERT);
268 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
273 /* CONST_DOUBLEs needs special handling because their length is known
277 gen_rtx_CONST_DOUBLE (mode, arg0, arg1, arg2)
278 enum machine_mode mode;
280 HOST_WIDE_INT arg1, arg2;
282 rtx r = rtx_alloc (CONST_DOUBLE);
287 X0EXP (r, 1) = NULL_RTX;
291 for (i = GET_RTX_LENGTH (CONST_DOUBLE) - 1; i > 3; --i)
298 gen_rtx_REG (mode, regno)
299 enum machine_mode mode;
302 /* In case the MD file explicitly references the frame pointer, have
303 all such references point to the same frame pointer. This is
304 used during frame pointer elimination to distinguish the explicit
305 references to these registers from pseudos that happened to be
308 If we have eliminated the frame pointer or arg pointer, we will
309 be using it as a normal register, for example as a spill
310 register. In such cases, we might be accessing it in a mode that
311 is not Pmode and therefore cannot use the pre-allocated rtx.
313 Also don't do this when we are making new REGs in reload, since
314 we don't want to get confused with the real pointers. */
316 if (mode == Pmode && !reload_in_progress)
318 if (regno == FRAME_POINTER_REGNUM)
319 return frame_pointer_rtx;
320 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
321 if (regno == HARD_FRAME_POINTER_REGNUM)
322 return hard_frame_pointer_rtx;
324 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
325 if (regno == ARG_POINTER_REGNUM)
326 return arg_pointer_rtx;
328 #ifdef RETURN_ADDRESS_POINTER_REGNUM
329 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
330 return return_address_pointer_rtx;
332 if (regno == STACK_POINTER_REGNUM)
333 return stack_pointer_rtx;
336 return gen_raw_REG (mode, regno);
340 gen_rtx_MEM (mode, addr)
341 enum machine_mode mode;
344 rtx rt = gen_rtx_raw_MEM (mode, addr);
346 /* This field is not cleared by the mere allocation of the rtx, so
348 MEM_ALIAS_SET (rt) = 0;
354 gen_rtx_SUBREG (mode, reg, offset)
355 enum machine_mode mode;
359 /* This is the most common failure type.
360 Catch it early so we can see who does it. */
361 if ((offset % GET_MODE_SIZE (mode)) != 0)
364 /* This check isn't usable right now because combine will
365 throw arbitrary crap like a CALL into a SUBREG in
366 gen_lowpart_for_combine so we must just eat it. */
368 /* Check for this too. */
369 if (offset >= GET_MODE_SIZE (GET_MODE (reg)))
372 return gen_rtx_fmt_ei (SUBREG, mode, reg, offset);
375 /* Generate a SUBREG representing the least-significant part
376 * of REG if MODE is smaller than mode of REG, otherwise
377 * paradoxical SUBREG. */
379 gen_lowpart_SUBREG (mode, reg)
380 enum machine_mode mode;
383 enum machine_mode inmode;
385 inmode = GET_MODE (reg);
386 if (inmode == VOIDmode)
388 return gen_rtx_SUBREG (mode, reg,
389 subreg_lowpart_offset (mode, inmode));
392 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
394 ** This routine generates an RTX of the size specified by
395 ** <code>, which is an RTX code. The RTX structure is initialized
396 ** from the arguments <element1> through <elementn>, which are
397 ** interpreted according to the specific RTX type's format. The
398 ** special machine mode associated with the rtx (if any) is specified
401 ** gen_rtx can be invoked in a way which resembles the lisp-like
402 ** rtx it will generate. For example, the following rtx structure:
404 ** (plus:QI (mem:QI (reg:SI 1))
405 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
407 ** ...would be generated by the following C code:
409 ** gen_rtx (PLUS, QImode,
410 ** gen_rtx (MEM, QImode,
411 ** gen_rtx (REG, SImode, 1)),
412 ** gen_rtx (MEM, QImode,
413 ** gen_rtx (PLUS, SImode,
414 ** gen_rtx (REG, SImode, 2),
415 ** gen_rtx (REG, SImode, 3)))),
420 gen_rtx VPARAMS ((enum rtx_code code, enum machine_mode mode, ...))
422 #ifndef ANSI_PROTOTYPES
424 enum machine_mode mode;
427 register int i; /* Array indices... */
428 register const char *fmt; /* Current rtx's format... */
429 register rtx rt_val; /* RTX to return to caller... */
433 #ifndef ANSI_PROTOTYPES
434 code = va_arg (p, enum rtx_code);
435 mode = va_arg (p, enum machine_mode);
441 rt_val = gen_rtx_CONST_INT (mode, va_arg (p, HOST_WIDE_INT));
446 rtx arg0 = va_arg (p, rtx);
447 HOST_WIDE_INT arg1 = va_arg (p, HOST_WIDE_INT);
448 HOST_WIDE_INT arg2 = va_arg (p, HOST_WIDE_INT);
449 rt_val = gen_rtx_CONST_DOUBLE (mode, arg0, arg1, arg2);
454 rt_val = gen_rtx_REG (mode, va_arg (p, int));
458 rt_val = gen_rtx_MEM (mode, va_arg (p, rtx));
462 rt_val = rtx_alloc (code); /* Allocate the storage space. */
463 rt_val->mode = mode; /* Store the machine mode... */
465 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
466 for (i = 0; i < GET_RTX_LENGTH (code); i++)
470 case '0': /* Unused field. */
473 case 'i': /* An integer? */
474 XINT (rt_val, i) = va_arg (p, int);
477 case 'w': /* A wide integer? */
478 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
481 case 's': /* A string? */
482 XSTR (rt_val, i) = va_arg (p, char *);
485 case 'e': /* An expression? */
486 case 'u': /* An insn? Same except when printing. */
487 XEXP (rt_val, i) = va_arg (p, rtx);
490 case 'E': /* An RTX vector? */
491 XVEC (rt_val, i) = va_arg (p, rtvec);
494 case 'b': /* A bitmap? */
495 XBITMAP (rt_val, i) = va_arg (p, bitmap);
498 case 't': /* A tree? */
499 XTREE (rt_val, i) = va_arg (p, tree);
513 /* gen_rtvec (n, [rt1, ..., rtn])
515 ** This routine creates an rtvec and stores within it the
516 ** pointers to rtx's which are its arguments.
521 gen_rtvec VPARAMS ((int n, ...))
523 #ifndef ANSI_PROTOTYPES
532 #ifndef ANSI_PROTOTYPES
537 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
539 vector = (rtx *) alloca (n * sizeof (rtx));
541 for (i = 0; i < n; i++)
542 vector[i] = va_arg (p, rtx);
545 return gen_rtvec_v (n, vector);
549 gen_rtvec_v (n, argp)
554 register rtvec rt_val;
557 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
559 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
561 for (i = 0; i < n; i++)
562 rt_val->elem[i] = *argp++;
568 /* Generate a REG rtx for a new pseudo register of mode MODE.
569 This pseudo is assigned the next sequential register number. */
573 enum machine_mode mode;
575 struct function *f = cfun;
578 /* Don't let anything called after initial flow analysis create new
583 if (generating_concat_p
584 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
585 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
587 /* For complex modes, don't make a single pseudo.
588 Instead, make a CONCAT of two pseudos.
589 This allows noncontiguous allocation of the real and imaginary parts,
590 which makes much better code. Besides, allocating DCmode
591 pseudos overstrains reload on some machines like the 386. */
592 rtx realpart, imagpart;
593 int size = GET_MODE_UNIT_SIZE (mode);
594 enum machine_mode partmode
595 = mode_for_size (size * BITS_PER_UNIT,
596 (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
597 ? MODE_FLOAT : MODE_INT),
600 realpart = gen_reg_rtx (partmode);
601 imagpart = gen_reg_rtx (partmode);
602 return gen_rtx_CONCAT (mode, realpart, imagpart);
605 /* Make sure regno_pointer_align and regno_reg_rtx are large enough
606 to have an element for this pseudo reg number. */
608 if (reg_rtx_no == f->emit->regno_pointer_align_length)
610 int old_size = f->emit->regno_pointer_align_length;
613 new = xrealloc (f->emit->regno_pointer_align, old_size * 2);
614 memset (new + old_size, 0, old_size);
615 f->emit->regno_pointer_align = (unsigned char *) new;
617 new1 = (rtx *) xrealloc (f->emit->x_regno_reg_rtx,
618 old_size * 2 * sizeof (rtx));
619 memset (new1 + old_size, 0, old_size * sizeof (rtx));
620 regno_reg_rtx = new1;
622 f->emit->regno_pointer_align_length = old_size * 2;
625 val = gen_raw_REG (mode, reg_rtx_no);
626 regno_reg_rtx[reg_rtx_no++] = val;
630 /* Identify REG (which may be a CONCAT) as a user register. */
636 if (GET_CODE (reg) == CONCAT)
638 REG_USERVAR_P (XEXP (reg, 0)) = 1;
639 REG_USERVAR_P (XEXP (reg, 1)) = 1;
641 else if (GET_CODE (reg) == REG)
642 REG_USERVAR_P (reg) = 1;
647 /* Identify REG as a probable pointer register and show its alignment
648 as ALIGN, if nonzero. */
651 mark_reg_pointer (reg, align)
655 if (! REG_POINTER (reg))
657 REG_POINTER (reg) = 1;
660 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
662 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
663 /* We can no-longer be sure just how aligned this pointer is */
664 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
667 /* Return 1 plus largest pseudo reg number used in the current function. */
675 /* Return 1 + the largest label number used so far in the current function. */
680 if (last_label_num && label_num == base_label_num)
681 return last_label_num;
685 /* Return first label number used in this function (if any were used). */
688 get_first_label_num ()
690 return first_label_num;
693 /* Return the final regno of X, which is a SUBREG of a hard
696 subreg_hard_regno (x, check_mode)
700 enum machine_mode mode = GET_MODE (x);
701 unsigned int byte_offset, base_regno, final_regno;
702 rtx reg = SUBREG_REG (x);
704 /* This is where we attempt to catch illegal subregs
705 created by the compiler. */
706 if (GET_CODE (x) != SUBREG
707 || GET_CODE (reg) != REG)
709 base_regno = REGNO (reg);
710 if (base_regno >= FIRST_PSEUDO_REGISTER)
712 if (check_mode && ! HARD_REGNO_MODE_OK (base_regno, GET_MODE (reg)))
715 /* Catch non-congruent offsets too. */
716 byte_offset = SUBREG_BYTE (x);
717 if ((byte_offset % GET_MODE_SIZE (mode)) != 0)
720 final_regno = subreg_regno (x);
725 /* Return a value representing some low-order bits of X, where the number
726 of low-order bits is given by MODE. Note that no conversion is done
727 between floating-point and fixed-point values, rather, the bit
728 representation is returned.
730 This function handles the cases in common between gen_lowpart, below,
731 and two variants in cse.c and combine.c. These are the cases that can
732 be safely handled at all points in the compilation.
734 If this is not a case we can handle, return 0. */
737 gen_lowpart_common (mode, x)
738 enum machine_mode mode;
741 int msize = GET_MODE_SIZE (mode);
742 int xsize = GET_MODE_SIZE (GET_MODE (x));
745 if (GET_MODE (x) == mode)
748 /* MODE must occupy no more words than the mode of X. */
749 if (GET_MODE (x) != VOIDmode
750 && ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
751 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)))
754 offset = subreg_lowpart_offset (mode, GET_MODE (x));
756 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
757 && (GET_MODE_CLASS (mode) == MODE_INT
758 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
760 /* If we are getting the low-order part of something that has been
761 sign- or zero-extended, we can either just use the object being
762 extended or make a narrower extension. If we want an even smaller
763 piece than the size of the object being extended, call ourselves
766 This case is used mostly by combine and cse. */
768 if (GET_MODE (XEXP (x, 0)) == mode)
770 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
771 return gen_lowpart_common (mode, XEXP (x, 0));
772 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
773 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
775 else if (GET_CODE (x) == SUBREG || GET_CODE (x) == REG
776 || GET_CODE (x) == CONCAT)
777 return simplify_gen_subreg (mode, x, GET_MODE (x), offset);
778 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
779 from the low-order part of the constant. */
780 else if ((GET_MODE_CLASS (mode) == MODE_INT
781 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
782 && GET_MODE (x) == VOIDmode
783 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
785 /* If MODE is twice the host word size, X is already the desired
786 representation. Otherwise, if MODE is wider than a word, we can't
787 do this. If MODE is exactly a word, return just one CONST_INT. */
789 if (GET_MODE_BITSIZE (mode) >= 2 * HOST_BITS_PER_WIDE_INT)
791 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
793 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT)
794 return (GET_CODE (x) == CONST_INT ? x
795 : GEN_INT (CONST_DOUBLE_LOW (x)));
798 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
799 HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
800 : CONST_DOUBLE_LOW (x));
802 /* Sign extend to HOST_WIDE_INT. */
803 val = trunc_int_for_mode (val, mode);
805 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
810 #ifndef REAL_ARITHMETIC
811 /* If X is an integral constant but we want it in floating-point, it
812 must be the case that we have a union of an integer and a floating-point
813 value. If the machine-parameters allow it, simulate that union here
814 and return the result. The two-word and single-word cases are
817 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
818 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
819 || flag_pretend_float)
820 && GET_MODE_CLASS (mode) == MODE_FLOAT
821 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
822 && GET_CODE (x) == CONST_INT
823 && sizeof (float) * HOST_BITS_PER_CHAR == HOST_BITS_PER_WIDE_INT)
825 union {HOST_WIDE_INT i; float d; } u;
828 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
830 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
831 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
832 || flag_pretend_float)
833 && GET_MODE_CLASS (mode) == MODE_FLOAT
834 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
835 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
836 && GET_MODE (x) == VOIDmode
837 && (sizeof (double) * HOST_BITS_PER_CHAR
838 == 2 * HOST_BITS_PER_WIDE_INT))
840 union {HOST_WIDE_INT i[2]; double d; } u;
841 HOST_WIDE_INT low, high;
843 if (GET_CODE (x) == CONST_INT)
844 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
846 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
848 #ifdef HOST_WORDS_BIG_ENDIAN
849 u.i[0] = high, u.i[1] = low;
851 u.i[0] = low, u.i[1] = high;
854 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
857 /* Similarly, if this is converting a floating-point value into a
858 single-word integer. Only do this is the host and target parameters are
861 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
862 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
863 || flag_pretend_float)
864 && (GET_MODE_CLASS (mode) == MODE_INT
865 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
866 && GET_CODE (x) == CONST_DOUBLE
867 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
868 && GET_MODE_BITSIZE (mode) == BITS_PER_WORD)
869 return constant_subword (x, (offset / UNITS_PER_WORD), GET_MODE (x));
871 /* Similarly, if this is converting a floating-point value into a
872 two-word integer, we can do this one word at a time and make an
873 integer. Only do this is the host and target parameters are
876 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
877 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
878 || flag_pretend_float)
879 && (GET_MODE_CLASS (mode) == MODE_INT
880 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
881 && GET_CODE (x) == CONST_DOUBLE
882 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
883 && GET_MODE_BITSIZE (mode) == 2 * BITS_PER_WORD)
885 rtx lowpart, highpart;
887 lowpart = constant_subword (x,
888 (offset / UNITS_PER_WORD) + WORDS_BIG_ENDIAN,
890 highpart = constant_subword (x,
891 (offset / UNITS_PER_WORD) + (! WORDS_BIG_ENDIAN),
893 if (lowpart && GET_CODE (lowpart) == CONST_INT
894 && highpart && GET_CODE (highpart) == CONST_INT)
895 return immed_double_const (INTVAL (lowpart), INTVAL (highpart), mode);
897 #else /* ifndef REAL_ARITHMETIC */
899 /* When we have a FP emulator, we can handle all conversions between
900 FP and integer operands. This simplifies reload because it
901 doesn't have to deal with constructs like (subreg:DI
902 (const_double:SF ...)) or (subreg:DF (const_int ...)). */
903 /* Single-precision floats are always 32-bits and double-precision
904 floats are always 64-bits. */
906 else if (GET_MODE_CLASS (mode) == MODE_FLOAT
907 && GET_MODE_BITSIZE (mode) == 32
908 && GET_CODE (x) == CONST_INT)
914 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
915 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
917 else if (GET_MODE_CLASS (mode) == MODE_FLOAT
918 && GET_MODE_BITSIZE (mode) == 64
919 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
920 && GET_MODE (x) == VOIDmode)
924 HOST_WIDE_INT low, high;
926 if (GET_CODE (x) == CONST_INT)
929 high = low >> (HOST_BITS_PER_WIDE_INT - 1);
933 low = CONST_DOUBLE_LOW (x);
934 high = CONST_DOUBLE_HIGH (x);
937 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
939 if (WORDS_BIG_ENDIAN)
940 i[0] = high, i[1] = low;
942 i[0] = low, i[1] = high;
944 r = REAL_VALUE_FROM_TARGET_DOUBLE (i);
945 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
947 else if ((GET_MODE_CLASS (mode) == MODE_INT
948 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
949 && GET_CODE (x) == CONST_DOUBLE
950 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
953 long i[4]; /* Only the low 32 bits of each 'long' are used. */
954 int endian = WORDS_BIG_ENDIAN ? 1 : 0;
956 REAL_VALUE_FROM_CONST_DOUBLE (r, x);
957 switch (GET_MODE_BITSIZE (GET_MODE (x)))
960 REAL_VALUE_TO_TARGET_SINGLE (r, i[endian]);
964 REAL_VALUE_TO_TARGET_DOUBLE (r, i);
967 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i + endian);
971 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i);
977 /* Now, pack the 32-bit elements of the array into a CONST_DOUBLE
979 #if HOST_BITS_PER_WIDE_INT == 32
980 return immed_double_const (i[endian], i[1 - endian], mode);
985 if (HOST_BITS_PER_WIDE_INT != 64)
988 for (c = 0; c < 4; c++)
991 switch (GET_MODE_BITSIZE (GET_MODE (x)))
995 return immed_double_const (((unsigned long) i[endian]) |
996 (((HOST_WIDE_INT) i[1-endian]) << 32),
1000 return immed_double_const (((unsigned long) i[endian*3]) |
1001 (((HOST_WIDE_INT) i[1+endian]) << 32),
1002 ((unsigned long) i[2-endian]) |
1003 (((HOST_WIDE_INT) i[3-endian*3]) << 32),
1011 #endif /* ifndef REAL_ARITHMETIC */
1013 /* Otherwise, we can't do this. */
1017 /* Return the real part (which has mode MODE) of a complex value X.
1018 This always comes at the low address in memory. */
1021 gen_realpart (mode, x)
1022 enum machine_mode mode;
1025 if (WORDS_BIG_ENDIAN
1026 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1028 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1030 ("Can't access real part of complex value in hard register");
1031 else if (WORDS_BIG_ENDIAN)
1032 return gen_highpart (mode, x);
1034 return gen_lowpart (mode, x);
1037 /* Return the imaginary part (which has mode MODE) of a complex value X.
1038 This always comes at the high address in memory. */
1041 gen_imagpart (mode, x)
1042 enum machine_mode mode;
1045 if (WORDS_BIG_ENDIAN)
1046 return gen_lowpart (mode, x);
1047 else if (! WORDS_BIG_ENDIAN
1048 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1050 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1052 ("can't access imaginary part of complex value in hard register");
1054 return gen_highpart (mode, x);
1057 /* Return 1 iff X, assumed to be a SUBREG,
1058 refers to the real part of the complex value in its containing reg.
1059 Complex values are always stored with the real part in the first word,
1060 regardless of WORDS_BIG_ENDIAN. */
1063 subreg_realpart_p (x)
1066 if (GET_CODE (x) != SUBREG)
1069 return ((unsigned int) SUBREG_BYTE (x)
1070 < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x))));
1073 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1074 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1075 least-significant part of X.
1076 MODE specifies how big a part of X to return;
1077 it usually should not be larger than a word.
1078 If X is a MEM whose address is a QUEUED, the value may be so also. */
1081 gen_lowpart (mode, x)
1082 enum machine_mode mode;
1085 rtx result = gen_lowpart_common (mode, x);
1089 else if (GET_CODE (x) == REG)
1091 /* Must be a hard reg that's not valid in MODE. */
1092 result = gen_lowpart_common (mode, copy_to_reg (x));
1097 else if (GET_CODE (x) == MEM)
1099 /* The only additional case we can do is MEM. */
1100 register int offset = 0;
1101 if (WORDS_BIG_ENDIAN)
1102 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
1103 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1105 if (BYTES_BIG_ENDIAN)
1106 /* Adjust the address so that the address-after-the-data
1108 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
1109 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
1111 return adjust_address (x, mode, offset);
1113 else if (GET_CODE (x) == ADDRESSOF)
1114 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
1119 /* Like `gen_lowpart', but refer to the most significant part.
1120 This is used to access the imaginary part of a complex number. */
1123 gen_highpart (mode, x)
1124 enum machine_mode mode;
1127 unsigned int msize = GET_MODE_SIZE (mode);
1130 /* This case loses if X is a subreg. To catch bugs early,
1131 complain if an invalid MODE is used even in other cases. */
1132 if (msize > UNITS_PER_WORD
1133 && msize != GET_MODE_UNIT_SIZE (GET_MODE (x)))
1136 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1137 subreg_highpart_offset (mode, GET_MODE (x)));
1139 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1140 the target if we have a MEM. gen_highpart must return a valid operand,
1141 emitting code if necessary to do so. */
1142 if (GET_CODE (result) == MEM)
1143 result = validize_mem (result);
1149 /* Return offset in bytes to get OUTERMODE low part
1150 of the value in mode INNERMODE stored in memory in target format. */
1153 subreg_lowpart_offset (outermode, innermode)
1154 enum machine_mode outermode, innermode;
1156 unsigned int offset = 0;
1157 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1161 if (WORDS_BIG_ENDIAN)
1162 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1163 if (BYTES_BIG_ENDIAN)
1164 offset += difference % UNITS_PER_WORD;
1170 /* Return offset in bytes to get OUTERMODE high part
1171 of the value in mode INNERMODE stored in memory in target format. */
1173 subreg_highpart_offset (outermode, innermode)
1174 enum machine_mode outermode, innermode;
1176 unsigned int offset = 0;
1177 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1179 if (GET_MODE_SIZE (innermode) < GET_MODE_SIZE (outermode))
1184 if (! WORDS_BIG_ENDIAN)
1185 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1186 if (! BYTES_BIG_ENDIAN)
1187 offset += difference % UNITS_PER_WORD;
1193 /* Return 1 iff X, assumed to be a SUBREG,
1194 refers to the least significant part of its containing reg.
1195 If X is not a SUBREG, always return 1 (it is its own low part!). */
1198 subreg_lowpart_p (x)
1201 if (GET_CODE (x) != SUBREG)
1203 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1206 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1207 == SUBREG_BYTE (x));
1211 /* Helper routine for all the constant cases of operand_subword.
1212 Some places invoke this directly. */
1215 constant_subword (op, offset, mode)
1218 enum machine_mode mode;
1220 int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD;
1223 /* If OP is already an integer word, return it. */
1224 if (GET_MODE_CLASS (mode) == MODE_INT
1225 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
1228 #ifdef REAL_ARITHMETIC
1229 /* The output is some bits, the width of the target machine's word.
1230 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1232 if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1233 && GET_MODE_CLASS (mode) == MODE_FLOAT
1234 && GET_MODE_BITSIZE (mode) == 64
1235 && GET_CODE (op) == CONST_DOUBLE)
1240 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1241 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
1243 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1244 which the words are written depends on the word endianness.
1245 ??? This is a potential portability problem and should
1246 be fixed at some point.
1248 We must excercise caution with the sign bit. By definition there
1249 are 32 significant bits in K; there may be more in a HOST_WIDE_INT.
1250 Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT.
1251 So we explicitly mask and sign-extend as necessary. */
1252 if (BITS_PER_WORD == 32)
1255 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1256 return GEN_INT (val);
1258 #if HOST_BITS_PER_WIDE_INT >= 64
1259 else if (BITS_PER_WORD >= 64 && offset == 0)
1261 val = k[! WORDS_BIG_ENDIAN];
1262 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1263 val |= (HOST_WIDE_INT) k[WORDS_BIG_ENDIAN] & 0xffffffff;
1264 return GEN_INT (val);
1267 else if (BITS_PER_WORD == 16)
1269 val = k[offset >> 1];
1270 if ((offset & 1) == ! WORDS_BIG_ENDIAN)
1272 val = ((val & 0xffff) ^ 0x8000) - 0x8000;
1273 return GEN_INT (val);
1278 else if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1279 && GET_MODE_CLASS (mode) == MODE_FLOAT
1280 && GET_MODE_BITSIZE (mode) > 64
1281 && GET_CODE (op) == CONST_DOUBLE)
1286 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1287 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k);
1289 if (BITS_PER_WORD == 32)
1292 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1293 return GEN_INT (val);
1295 #if HOST_BITS_PER_WIDE_INT >= 64
1296 else if (BITS_PER_WORD >= 64 && offset <= 1)
1298 val = k[offset * 2 + ! WORDS_BIG_ENDIAN];
1299 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1300 val |= (HOST_WIDE_INT) k[offset * 2 + WORDS_BIG_ENDIAN] & 0xffffffff;
1301 return GEN_INT (val);
1307 #else /* no REAL_ARITHMETIC */
1308 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1309 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1310 || flag_pretend_float)
1311 && GET_MODE_CLASS (mode) == MODE_FLOAT
1312 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
1313 && GET_CODE (op) == CONST_DOUBLE)
1315 /* The constant is stored in the host's word-ordering,
1316 but we want to access it in the target's word-ordering. Some
1317 compilers don't like a conditional inside macro args, so we have two
1318 copies of the return. */
1319 #ifdef HOST_WORDS_BIG_ENDIAN
1320 return GEN_INT (offset == WORDS_BIG_ENDIAN
1321 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1323 return GEN_INT (offset != WORDS_BIG_ENDIAN
1324 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1327 #endif /* no REAL_ARITHMETIC */
1329 /* Single word float is a little harder, since single- and double-word
1330 values often do not have the same high-order bits. We have already
1331 verified that we want the only defined word of the single-word value. */
1332 #ifdef REAL_ARITHMETIC
1333 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1334 && GET_MODE_BITSIZE (mode) == 32
1335 && GET_CODE (op) == CONST_DOUBLE)
1340 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1341 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
1343 /* Sign extend from known 32-bit value to HOST_WIDE_INT. */
1345 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1347 if (BITS_PER_WORD == 16)
1349 if ((offset & 1) == ! WORDS_BIG_ENDIAN)
1351 val = ((val & 0xffff) ^ 0x8000) - 0x8000;
1354 return GEN_INT (val);
1357 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1358 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1359 || flag_pretend_float)
1360 && sizeof (float) * 8 == HOST_BITS_PER_WIDE_INT
1361 && GET_MODE_CLASS (mode) == MODE_FLOAT
1362 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1363 && GET_CODE (op) == CONST_DOUBLE)
1366 union {float f; HOST_WIDE_INT i; } u;
1368 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1371 return GEN_INT (u.i);
1373 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1374 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1375 || flag_pretend_float)
1376 && sizeof (double) * 8 == HOST_BITS_PER_WIDE_INT
1377 && GET_MODE_CLASS (mode) == MODE_FLOAT
1378 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1379 && GET_CODE (op) == CONST_DOUBLE)
1382 union {double d; HOST_WIDE_INT i; } u;
1384 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1387 return GEN_INT (u.i);
1389 #endif /* no REAL_ARITHMETIC */
1391 /* The only remaining cases that we can handle are integers.
1392 Convert to proper endianness now since these cases need it.
1393 At this point, offset == 0 means the low-order word.
1395 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1396 in general. However, if OP is (const_int 0), we can just return
1399 if (op == const0_rtx)
1402 if (GET_MODE_CLASS (mode) != MODE_INT
1403 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE)
1404 || BITS_PER_WORD > HOST_BITS_PER_WIDE_INT)
1407 if (WORDS_BIG_ENDIAN)
1408 offset = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - offset;
1410 /* Find out which word on the host machine this value is in and get
1411 it from the constant. */
1412 val = (offset / size_ratio == 0
1413 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
1414 : (GET_CODE (op) == CONST_INT
1415 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
1417 /* Get the value we want into the low bits of val. */
1418 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT)
1419 val = ((val >> ((offset % size_ratio) * BITS_PER_WORD)));
1421 val = trunc_int_for_mode (val, word_mode);
1423 return GEN_INT (val);
1426 /* Return subword OFFSET of operand OP.
1427 The word number, OFFSET, is interpreted as the word number starting
1428 at the low-order address. OFFSET 0 is the low-order word if not
1429 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1431 If we cannot extract the required word, we return zero. Otherwise,
1432 an rtx corresponding to the requested word will be returned.
1434 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1435 reload has completed, a valid address will always be returned. After
1436 reload, if a valid address cannot be returned, we return zero.
1438 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1439 it is the responsibility of the caller.
1441 MODE is the mode of OP in case it is a CONST_INT.
1443 ??? This is still rather broken for some cases. The problem for the
1444 moment is that all callers of this thing provide no 'goal mode' to
1445 tell us to work with. This exists because all callers were written
1446 in a word based SUBREG world.
1447 Now use of this function can be deprecated by simplify_subreg in most
1452 operand_subword (op, offset, validate_address, mode)
1454 unsigned int offset;
1455 int validate_address;
1456 enum machine_mode mode;
1458 if (mode == VOIDmode)
1459 mode = GET_MODE (op);
1461 if (mode == VOIDmode)
1464 /* If OP is narrower than a word, fail. */
1466 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1469 /* If we want a word outside OP, return zero. */
1471 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1474 /* Form a new MEM at the requested address. */
1475 if (GET_CODE (op) == MEM)
1477 rtx new = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1479 if (! validate_address)
1482 else if (reload_completed)
1484 if (! strict_memory_address_p (word_mode, XEXP (new, 0)))
1488 return replace_equiv_address (new, XEXP (new, 0));
1491 /* Rest can be handled by simplify_subreg. */
1492 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1495 /* Similar to `operand_subword', but never return 0. If we can't extract
1496 the required subword, put OP into a register and try again. If that fails,
1497 abort. We always validate the address in this case.
1499 MODE is the mode of OP, in case it is CONST_INT. */
1502 operand_subword_force (op, offset, mode)
1504 unsigned int offset;
1505 enum machine_mode mode;
1507 rtx result = operand_subword (op, offset, 1, mode);
1512 if (mode != BLKmode && mode != VOIDmode)
1514 /* If this is a register which can not be accessed by words, copy it
1515 to a pseudo register. */
1516 if (GET_CODE (op) == REG)
1517 op = copy_to_reg (op);
1519 op = force_reg (mode, op);
1522 result = operand_subword (op, offset, 1, mode);
1529 /* Given a compare instruction, swap the operands.
1530 A test instruction is changed into a compare of 0 against the operand. */
1533 reverse_comparison (insn)
1536 rtx body = PATTERN (insn);
1539 if (GET_CODE (body) == SET)
1540 comp = SET_SRC (body);
1542 comp = SET_SRC (XVECEXP (body, 0, 0));
1544 if (GET_CODE (comp) == COMPARE)
1546 rtx op0 = XEXP (comp, 0);
1547 rtx op1 = XEXP (comp, 1);
1548 XEXP (comp, 0) = op1;
1549 XEXP (comp, 1) = op0;
1553 rtx new = gen_rtx_COMPARE (VOIDmode,
1554 CONST0_RTX (GET_MODE (comp)), comp);
1555 if (GET_CODE (body) == SET)
1556 SET_SRC (body) = new;
1558 SET_SRC (XVECEXP (body, 0, 0)) = new;
1562 /* Return a memory reference like MEMREF, but with its mode changed
1563 to MODE and its address changed to ADDR.
1564 (VOIDmode means don't change the mode.
1565 NULL for ADDR means don't change the address.)
1566 VALIDATE is nonzero if the returned memory location is required to be
1570 change_address_1 (memref, mode, addr, validate)
1572 enum machine_mode mode;
1578 if (GET_CODE (memref) != MEM)
1580 if (mode == VOIDmode)
1581 mode = GET_MODE (memref);
1583 addr = XEXP (memref, 0);
1587 if (reload_in_progress || reload_completed)
1589 if (! memory_address_p (mode, addr))
1593 addr = memory_address (mode, addr);
1596 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1599 new = gen_rtx_MEM (mode, addr);
1600 MEM_COPY_ATTRIBUTES (new, memref);
1604 /* Return a memory reference like MEMREF, but with its mode changed
1605 to MODE and its address offset by OFFSET bytes. */
1608 adjust_address (memref, mode, offset)
1610 enum machine_mode mode;
1611 HOST_WIDE_INT offset;
1613 /* For now, this is just a wrapper for change_address, but eventually
1614 will do memref tracking. */
1615 rtx addr = XEXP (memref, 0);
1617 /* If MEMREF is a LO_SUM and the offset is within the size of the
1618 object, we can merge it into the LO_SUM. */
1619 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
1620 && offset >= 0 && offset < GET_MODE_SIZE (GET_MODE (memref)))
1621 addr = gen_rtx_LO_SUM (mode, XEXP (addr, 0),
1622 plus_constant (XEXP (addr, 1), offset));
1624 addr = plus_constant (addr, offset);
1626 return change_address (memref, mode, addr);
1629 /* Likewise, but the reference is not required to be valid. */
1632 adjust_address_nv (memref, mode, offset)
1634 enum machine_mode mode;
1635 HOST_WIDE_INT offset;
1637 /* For now, this is just a wrapper for change_address, but eventually
1638 will do memref tracking. */
1639 rtx addr = XEXP (memref, 0);
1641 /* If MEMREF is a LO_SUM and the offset is within the size of the
1642 object, we can merge it into the LO_SUM. */
1643 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
1644 && offset >= 0 && offset < GET_MODE_SIZE (GET_MODE (memref)))
1645 addr = gen_rtx_LO_SUM (mode, XEXP (addr, 0),
1646 plus_constant (XEXP (addr, 1), offset));
1648 addr = plus_constant (addr, offset);
1650 return change_address_1 (memref, mode, addr, 0);
1653 /* Return a memory reference like MEMREF, but with its address changed to
1654 ADDR. The caller is asserting that the actual piece of memory pointed
1655 to is the same, just the form of the address is being changed, such as
1656 by putting something into a register. */
1659 replace_equiv_address (memref, addr)
1663 /* For now, this is just a wrapper for change_address, but eventually
1664 will do memref tracking. */
1665 return change_address (memref, VOIDmode, addr);
1667 /* Likewise, but the reference is not required to be valid. */
1670 replace_equiv_address_nv (memref, addr)
1674 /* For now, this is just a wrapper for change_address, but eventually
1675 will do memref tracking. */
1676 return change_address_1 (memref, VOIDmode, addr, 0);
1679 /* Return a newly created CODE_LABEL rtx with a unique label number. */
1686 label = gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX,
1687 NULL_RTX, label_num++, NULL, NULL);
1689 LABEL_NUSES (label) = 0;
1690 LABEL_ALTERNATE_NAME (label) = NULL;
1694 /* For procedure integration. */
1696 /* Install new pointers to the first and last insns in the chain.
1697 Also, set cur_insn_uid to one higher than the last in use.
1698 Used for an inline-procedure after copying the insn chain. */
1701 set_new_first_and_last_insn (first, last)
1710 for (insn = first; insn; insn = NEXT_INSN (insn))
1711 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
1716 /* Set the range of label numbers found in the current function.
1717 This is used when belatedly compiling an inline function. */
1720 set_new_first_and_last_label_num (first, last)
1723 base_label_num = label_num;
1724 first_label_num = first;
1725 last_label_num = last;
1728 /* Set the last label number found in the current function.
1729 This is used when belatedly compiling an inline function. */
1732 set_new_last_label_num (last)
1735 base_label_num = label_num;
1736 last_label_num = last;
1739 /* Restore all variables describing the current status from the structure *P.
1740 This is used after a nested function. */
1743 restore_emit_status (p)
1744 struct function *p ATTRIBUTE_UNUSED;
1747 clear_emit_caches ();
1750 /* Clear out all parts of the state in F that can safely be discarded
1751 after the function has been compiled, to let garbage collection
1752 reclaim the memory. */
1755 free_emit_status (f)
1758 free (f->emit->x_regno_reg_rtx);
1759 free (f->emit->regno_pointer_align);
1764 /* Go through all the RTL insn bodies and copy any invalid shared
1765 structure. This routine should only be called once. */
1768 unshare_all_rtl (fndecl, insn)
1774 /* Make sure that virtual parameters are not shared. */
1775 for (decl = DECL_ARGUMENTS (fndecl); decl; decl = TREE_CHAIN (decl))
1776 SET_DECL_RTL (decl, copy_rtx_if_shared (DECL_RTL (decl)));
1778 /* Make sure that virtual stack slots are not shared. */
1779 unshare_all_decls (DECL_INITIAL (fndecl));
1781 /* Unshare just about everything else. */
1782 unshare_all_rtl_1 (insn);
1784 /* Make sure the addresses of stack slots found outside the insn chain
1785 (such as, in DECL_RTL of a variable) are not shared
1786 with the insn chain.
1788 This special care is necessary when the stack slot MEM does not
1789 actually appear in the insn chain. If it does appear, its address
1790 is unshared from all else at that point. */
1791 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
1794 /* Go through all the RTL insn bodies and copy any invalid shared
1795 structure, again. This is a fairly expensive thing to do so it
1796 should be done sparingly. */
1799 unshare_all_rtl_again (insn)
1805 for (p = insn; p; p = NEXT_INSN (p))
1808 reset_used_flags (PATTERN (p));
1809 reset_used_flags (REG_NOTES (p));
1810 reset_used_flags (LOG_LINKS (p));
1813 /* Make sure that virtual stack slots are not shared. */
1814 reset_used_decls (DECL_INITIAL (cfun->decl));
1816 /* Make sure that virtual parameters are not shared. */
1817 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
1818 reset_used_flags (DECL_RTL (decl));
1820 reset_used_flags (stack_slot_list);
1822 unshare_all_rtl (cfun->decl, insn);
1825 /* Go through all the RTL insn bodies and copy any invalid shared structure.
1826 Assumes the mark bits are cleared at entry. */
1829 unshare_all_rtl_1 (insn)
1832 for (; insn; insn = NEXT_INSN (insn))
1835 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
1836 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
1837 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
1841 /* Go through all virtual stack slots of a function and copy any
1842 shared structure. */
1844 unshare_all_decls (blk)
1849 /* Copy shared decls. */
1850 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
1851 if (DECL_RTL_SET_P (t))
1852 SET_DECL_RTL (t, copy_rtx_if_shared (DECL_RTL (t)));
1854 /* Now process sub-blocks. */
1855 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
1856 unshare_all_decls (t);
1859 /* Go through all virtual stack slots of a function and mark them as
1862 reset_used_decls (blk)
1868 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
1869 if (DECL_RTL_SET_P (t))
1870 reset_used_flags (DECL_RTL (t));
1872 /* Now process sub-blocks. */
1873 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
1874 reset_used_decls (t);
1877 /* Mark ORIG as in use, and return a copy of it if it was already in use.
1878 Recursively does the same for subexpressions. */
1881 copy_rtx_if_shared (orig)
1884 register rtx x = orig;
1886 register enum rtx_code code;
1887 register const char *format_ptr;
1893 code = GET_CODE (x);
1895 /* These types may be freely shared. */
1908 /* SCRATCH must be shared because they represent distinct values. */
1912 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
1913 a LABEL_REF, it isn't sharable. */
1914 if (GET_CODE (XEXP (x, 0)) == PLUS
1915 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
1916 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
1925 /* The chain of insns is not being copied. */
1929 /* A MEM is allowed to be shared if its address is constant.
1931 We used to allow sharing of MEMs which referenced
1932 virtual_stack_vars_rtx or virtual_incoming_args_rtx, but
1933 that can lose. instantiate_virtual_regs will not unshare
1934 the MEMs, and combine may change the structure of the address
1935 because it looks safe and profitable in one context, but
1936 in some other context it creates unrecognizable RTL. */
1937 if (CONSTANT_ADDRESS_P (XEXP (x, 0)))
1946 /* This rtx may not be shared. If it has already been seen,
1947 replace it with a copy of itself. */
1953 copy = rtx_alloc (code);
1955 (sizeof (*copy) - sizeof (copy->fld)
1956 + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code)));
1962 /* Now scan the subexpressions recursively.
1963 We can store any replaced subexpressions directly into X
1964 since we know X is not shared! Any vectors in X
1965 must be copied if X was copied. */
1967 format_ptr = GET_RTX_FORMAT (code);
1969 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1971 switch (*format_ptr++)
1974 XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
1978 if (XVEC (x, i) != NULL)
1981 int len = XVECLEN (x, i);
1983 if (copied && len > 0)
1984 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
1985 for (j = 0; j < len; j++)
1986 XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j));
1994 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
1995 to look for shared sub-parts. */
1998 reset_used_flags (x)
2002 register enum rtx_code code;
2003 register const char *format_ptr;
2008 code = GET_CODE (x);
2010 /* These types may be freely shared so we needn't do any resetting
2031 /* The chain of insns is not being copied. */
2040 format_ptr = GET_RTX_FORMAT (code);
2041 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2043 switch (*format_ptr++)
2046 reset_used_flags (XEXP (x, i));
2050 for (j = 0; j < XVECLEN (x, i); j++)
2051 reset_used_flags (XVECEXP (x, i, j));
2057 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2058 Return X or the rtx for the pseudo reg the value of X was copied into.
2059 OTHER must be valid as a SET_DEST. */
2062 make_safe_from (x, other)
2066 switch (GET_CODE (other))
2069 other = SUBREG_REG (other);
2071 case STRICT_LOW_PART:
2074 other = XEXP (other, 0);
2080 if ((GET_CODE (other) == MEM
2082 && GET_CODE (x) != REG
2083 && GET_CODE (x) != SUBREG)
2084 || (GET_CODE (other) == REG
2085 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2086 || reg_mentioned_p (other, x))))
2088 rtx temp = gen_reg_rtx (GET_MODE (x));
2089 emit_move_insn (temp, x);
2095 /* Emission of insns (adding them to the doubly-linked list). */
2097 /* Return the first insn of the current sequence or current function. */
2105 /* Return the last insn emitted in current sequence or current function. */
2113 /* Specify a new insn as the last in the chain. */
2116 set_last_insn (insn)
2119 if (NEXT_INSN (insn) != 0)
2124 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2127 get_last_insn_anywhere ()
2129 struct sequence_stack *stack;
2132 for (stack = seq_stack; stack; stack = stack->next)
2133 if (stack->last != 0)
2138 /* Return a number larger than any instruction's uid in this function. */
2143 return cur_insn_uid;
2146 /* Renumber instructions so that no instruction UIDs are wasted. */
2149 renumber_insns (stream)
2154 /* If we're not supposed to renumber instructions, don't. */
2155 if (!flag_renumber_insns)
2158 /* If there aren't that many instructions, then it's not really
2159 worth renumbering them. */
2160 if (flag_renumber_insns == 1 && get_max_uid () < 25000)
2165 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
2168 fprintf (stream, "Renumbering insn %d to %d\n",
2169 INSN_UID (insn), cur_insn_uid);
2170 INSN_UID (insn) = cur_insn_uid++;
2174 /* Return the next insn. If it is a SEQUENCE, return the first insn
2183 insn = NEXT_INSN (insn);
2184 if (insn && GET_CODE (insn) == INSN
2185 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2186 insn = XVECEXP (PATTERN (insn), 0, 0);
2192 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2196 previous_insn (insn)
2201 insn = PREV_INSN (insn);
2202 if (insn && GET_CODE (insn) == INSN
2203 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2204 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
2210 /* Return the next insn after INSN that is not a NOTE. This routine does not
2211 look inside SEQUENCEs. */
2214 next_nonnote_insn (insn)
2219 insn = NEXT_INSN (insn);
2220 if (insn == 0 || GET_CODE (insn) != NOTE)
2227 /* Return the previous insn before INSN that is not a NOTE. This routine does
2228 not look inside SEQUENCEs. */
2231 prev_nonnote_insn (insn)
2236 insn = PREV_INSN (insn);
2237 if (insn == 0 || GET_CODE (insn) != NOTE)
2244 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2245 or 0, if there is none. This routine does not look inside
2249 next_real_insn (insn)
2254 insn = NEXT_INSN (insn);
2255 if (insn == 0 || GET_CODE (insn) == INSN
2256 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
2263 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2264 or 0, if there is none. This routine does not look inside
2268 prev_real_insn (insn)
2273 insn = PREV_INSN (insn);
2274 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
2275 || GET_CODE (insn) == JUMP_INSN)
2282 /* Find the next insn after INSN that really does something. This routine
2283 does not look inside SEQUENCEs. Until reload has completed, this is the
2284 same as next_real_insn. */
2287 active_insn_p (insn)
2290 return (GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
2291 || (GET_CODE (insn) == INSN
2292 && (! reload_completed
2293 || (GET_CODE (PATTERN (insn)) != USE
2294 && GET_CODE (PATTERN (insn)) != CLOBBER))));
2298 next_active_insn (insn)
2303 insn = NEXT_INSN (insn);
2304 if (insn == 0 || active_insn_p (insn))
2311 /* Find the last insn before INSN that really does something. This routine
2312 does not look inside SEQUENCEs. Until reload has completed, this is the
2313 same as prev_real_insn. */
2316 prev_active_insn (insn)
2321 insn = PREV_INSN (insn);
2322 if (insn == 0 || active_insn_p (insn))
2329 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2337 insn = NEXT_INSN (insn);
2338 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2345 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
2353 insn = PREV_INSN (insn);
2354 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2362 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
2363 and REG_CC_USER notes so we can find it. */
2366 link_cc0_insns (insn)
2369 rtx user = next_nonnote_insn (insn);
2371 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
2372 user = XVECEXP (PATTERN (user), 0, 0);
2374 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn,
2376 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
2379 /* Return the next insn that uses CC0 after INSN, which is assumed to
2380 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
2381 applied to the result of this function should yield INSN).
2383 Normally, this is simply the next insn. However, if a REG_CC_USER note
2384 is present, it contains the insn that uses CC0.
2386 Return 0 if we can't find the insn. */
2389 next_cc0_user (insn)
2392 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
2395 return XEXP (note, 0);
2397 insn = next_nonnote_insn (insn);
2398 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
2399 insn = XVECEXP (PATTERN (insn), 0, 0);
2401 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
2407 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
2408 note, it is the previous insn. */
2411 prev_cc0_setter (insn)
2414 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2417 return XEXP (note, 0);
2419 insn = prev_nonnote_insn (insn);
2420 if (! sets_cc0_p (PATTERN (insn)))
2427 /* Increment the label uses for all labels present in rtx. */
2433 register enum rtx_code code;
2435 register const char *fmt;
2437 code = GET_CODE (x);
2438 if (code == LABEL_REF)
2439 LABEL_NUSES (XEXP (x, 0))++;
2441 fmt = GET_RTX_FORMAT (code);
2442 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2445 mark_label_nuses (XEXP (x, i));
2446 else if (fmt[i] == 'E')
2447 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
2448 mark_label_nuses (XVECEXP (x, i, j));
2453 /* Try splitting insns that can be split for better scheduling.
2454 PAT is the pattern which might split.
2455 TRIAL is the insn providing PAT.
2456 LAST is non-zero if we should return the last insn of the sequence produced.
2458 If this routine succeeds in splitting, it returns the first or last
2459 replacement insn depending on the value of LAST. Otherwise, it
2460 returns TRIAL. If the insn to be returned can be split, it will be. */
2463 try_split (pat, trial, last)
2467 rtx before = PREV_INSN (trial);
2468 rtx after = NEXT_INSN (trial);
2469 rtx seq = split_insns (pat, trial);
2470 int has_barrier = 0;
2473 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
2474 We may need to handle this specially. */
2475 if (after && GET_CODE (after) == BARRIER)
2478 after = NEXT_INSN (after);
2483 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
2484 The latter case will normally arise only when being done so that
2485 it, in turn, will be split (SFmode on the 29k is an example). */
2486 if (GET_CODE (seq) == SEQUENCE)
2491 /* Avoid infinite loop if any insn of the result matches
2492 the original pattern. */
2493 for (i = 0; i < XVECLEN (seq, 0); i++)
2494 if (GET_CODE (XVECEXP (seq, 0, i)) == INSN
2495 && rtx_equal_p (PATTERN (XVECEXP (seq, 0, i)), pat))
2499 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2500 if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN)
2501 mark_jump_label (PATTERN (XVECEXP (seq, 0, i)),
2502 XVECEXP (seq, 0, i), 0, 0);
2504 /* If we are splitting a CALL_INSN, look for the CALL_INSN
2505 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
2506 if (GET_CODE (trial) == CALL_INSN)
2507 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2508 if (GET_CODE (XVECEXP (seq, 0, i)) == CALL_INSN)
2509 CALL_INSN_FUNCTION_USAGE (XVECEXP (seq, 0, i))
2510 = CALL_INSN_FUNCTION_USAGE (trial);
2512 /* Copy EH notes. */
2513 if ((eh_note = find_reg_note (trial, REG_EH_REGION, NULL_RTX)))
2514 for (i = 0; i < XVECLEN (seq, 0); i++)
2516 rtx insn = XVECEXP (seq, 0, i);
2517 if (GET_CODE (insn) == CALL_INSN
2518 || (flag_non_call_exceptions
2519 && may_trap_p (PATTERN (insn))))
2521 = gen_rtx_EXPR_LIST (REG_EH_REGION, XEXP (eh_note, 0),
2525 /* If there are LABELS inside the split insns increment the
2526 usage count so we don't delete the label. */
2527 if (GET_CODE (trial) == INSN)
2528 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2529 if (GET_CODE (XVECEXP (seq, 0, i)) == INSN)
2530 mark_label_nuses (PATTERN (XVECEXP (seq, 0, i)));
2532 tem = emit_insn_after (seq, before);
2534 delete_insn (trial);
2536 emit_barrier_after (tem);
2538 /* Recursively call try_split for each new insn created; by the
2539 time control returns here that insn will be fully split, so
2540 set LAST and continue from the insn after the one returned.
2541 We can't use next_active_insn here since AFTER may be a note.
2542 Ignore deleted insns, which can be occur if not optimizing. */
2543 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
2544 if (! INSN_DELETED_P (tem) && INSN_P (tem))
2545 tem = try_split (PATTERN (tem), tem, 1);
2547 /* Avoid infinite loop if the result matches the original pattern. */
2548 else if (rtx_equal_p (seq, pat))
2552 PATTERN (trial) = seq;
2553 INSN_CODE (trial) = -1;
2554 try_split (seq, trial, last);
2557 /* Return either the first or the last insn, depending on which was
2560 ? (after ? prev_active_insn (after) : last_insn)
2561 : next_active_insn (before);
2567 /* Make and return an INSN rtx, initializing all its slots.
2568 Store PATTERN in the pattern slots. */
2571 make_insn_raw (pattern)
2576 insn = rtx_alloc (INSN);
2578 INSN_UID (insn) = cur_insn_uid++;
2579 PATTERN (insn) = pattern;
2580 INSN_CODE (insn) = -1;
2581 LOG_LINKS (insn) = NULL;
2582 REG_NOTES (insn) = NULL;
2584 #ifdef ENABLE_RTL_CHECKING
2587 && (returnjump_p (insn)
2588 || (GET_CODE (insn) == SET
2589 && SET_DEST (insn) == pc_rtx)))
2591 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
2599 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
2602 make_jump_insn_raw (pattern)
2607 insn = rtx_alloc (JUMP_INSN);
2608 INSN_UID (insn) = cur_insn_uid++;
2610 PATTERN (insn) = pattern;
2611 INSN_CODE (insn) = -1;
2612 LOG_LINKS (insn) = NULL;
2613 REG_NOTES (insn) = NULL;
2614 JUMP_LABEL (insn) = NULL;
2619 /* Like `make_insn' but make a CALL_INSN instead of an insn. */
2622 make_call_insn_raw (pattern)
2627 insn = rtx_alloc (CALL_INSN);
2628 INSN_UID (insn) = cur_insn_uid++;
2630 PATTERN (insn) = pattern;
2631 INSN_CODE (insn) = -1;
2632 LOG_LINKS (insn) = NULL;
2633 REG_NOTES (insn) = NULL;
2634 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
2639 /* Add INSN to the end of the doubly-linked list.
2640 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
2646 PREV_INSN (insn) = last_insn;
2647 NEXT_INSN (insn) = 0;
2649 if (NULL != last_insn)
2650 NEXT_INSN (last_insn) = insn;
2652 if (NULL == first_insn)
2658 /* Add INSN into the doubly-linked list after insn AFTER. This and
2659 the next should be the only functions called to insert an insn once
2660 delay slots have been filled since only they know how to update a
2664 add_insn_after (insn, after)
2667 rtx next = NEXT_INSN (after);
2669 if (optimize && INSN_DELETED_P (after))
2672 NEXT_INSN (insn) = next;
2673 PREV_INSN (insn) = after;
2677 PREV_INSN (next) = insn;
2678 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
2679 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
2681 else if (last_insn == after)
2685 struct sequence_stack *stack = seq_stack;
2686 /* Scan all pending sequences too. */
2687 for (; stack; stack = stack->next)
2688 if (after == stack->last)
2698 NEXT_INSN (after) = insn;
2699 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
2701 rtx sequence = PATTERN (after);
2702 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2706 /* Add INSN into the doubly-linked list before insn BEFORE. This and
2707 the previous should be the only functions called to insert an insn once
2708 delay slots have been filled since only they know how to update a
2712 add_insn_before (insn, before)
2715 rtx prev = PREV_INSN (before);
2717 if (optimize && INSN_DELETED_P (before))
2720 PREV_INSN (insn) = prev;
2721 NEXT_INSN (insn) = before;
2725 NEXT_INSN (prev) = insn;
2726 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
2728 rtx sequence = PATTERN (prev);
2729 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2732 else if (first_insn == before)
2736 struct sequence_stack *stack = seq_stack;
2737 /* Scan all pending sequences too. */
2738 for (; stack; stack = stack->next)
2739 if (before == stack->first)
2741 stack->first = insn;
2749 PREV_INSN (before) = insn;
2750 if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE)
2751 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
2754 /* Remove an insn from its doubly-linked list. This function knows how
2755 to handle sequences. */
2760 rtx next = NEXT_INSN (insn);
2761 rtx prev = PREV_INSN (insn);
2764 NEXT_INSN (prev) = next;
2765 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
2767 rtx sequence = PATTERN (prev);
2768 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
2771 else if (first_insn == insn)
2775 struct sequence_stack *stack = seq_stack;
2776 /* Scan all pending sequences too. */
2777 for (; stack; stack = stack->next)
2778 if (insn == stack->first)
2780 stack->first = next;
2790 PREV_INSN (next) = prev;
2791 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
2792 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
2794 else if (last_insn == insn)
2798 struct sequence_stack *stack = seq_stack;
2799 /* Scan all pending sequences too. */
2800 for (; stack; stack = stack->next)
2801 if (insn == stack->last)
2812 /* Delete all insns made since FROM.
2813 FROM becomes the new last instruction. */
2816 delete_insns_since (from)
2822 NEXT_INSN (from) = 0;
2826 /* This function is deprecated, please use sequences instead.
2828 Move a consecutive bunch of insns to a different place in the chain.
2829 The insns to be moved are those between FROM and TO.
2830 They are moved to a new position after the insn AFTER.
2831 AFTER must not be FROM or TO or any insn in between.
2833 This function does not know about SEQUENCEs and hence should not be
2834 called after delay-slot filling has been done. */
2837 reorder_insns (from, to, after)
2838 rtx from, to, after;
2840 /* Splice this bunch out of where it is now. */
2841 if (PREV_INSN (from))
2842 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
2844 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
2845 if (last_insn == to)
2846 last_insn = PREV_INSN (from);
2847 if (first_insn == from)
2848 first_insn = NEXT_INSN (to);
2850 /* Make the new neighbors point to it and it to them. */
2851 if (NEXT_INSN (after))
2852 PREV_INSN (NEXT_INSN (after)) = to;
2854 NEXT_INSN (to) = NEXT_INSN (after);
2855 PREV_INSN (from) = after;
2856 NEXT_INSN (after) = from;
2857 if (after == last_insn)
2861 /* Return the line note insn preceding INSN. */
2864 find_line_note (insn)
2867 if (no_line_numbers)
2870 for (; insn; insn = PREV_INSN (insn))
2871 if (GET_CODE (insn) == NOTE
2872 && NOTE_LINE_NUMBER (insn) >= 0)
2878 /* Like reorder_insns, but inserts line notes to preserve the line numbers
2879 of the moved insns when debugging. This may insert a note between AFTER
2880 and FROM, and another one after TO. */
2883 reorder_insns_with_line_notes (from, to, after)
2884 rtx from, to, after;
2886 rtx from_line = find_line_note (from);
2887 rtx after_line = find_line_note (after);
2889 reorder_insns (from, to, after);
2891 if (from_line == after_line)
2895 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
2896 NOTE_LINE_NUMBER (from_line),
2899 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
2900 NOTE_LINE_NUMBER (after_line),
2904 /* Remove unnecessary notes from the instruction stream. */
2907 remove_unnecessary_notes ()
2909 rtx block_stack = NULL_RTX;
2910 rtx eh_stack = NULL_RTX;
2915 /* We must not remove the first instruction in the function because
2916 the compiler depends on the first instruction being a note. */
2917 for (insn = NEXT_INSN (get_insns ()); insn; insn = next)
2919 /* Remember what's next. */
2920 next = NEXT_INSN (insn);
2922 /* We're only interested in notes. */
2923 if (GET_CODE (insn) != NOTE)
2926 switch (NOTE_LINE_NUMBER (insn))
2928 case NOTE_INSN_DELETED:
2932 case NOTE_INSN_EH_REGION_BEG:
2933 eh_stack = alloc_INSN_LIST (insn, eh_stack);
2936 case NOTE_INSN_EH_REGION_END:
2937 /* Too many end notes. */
2938 if (eh_stack == NULL_RTX)
2940 /* Mismatched nesting. */
2941 if (NOTE_EH_HANDLER (XEXP (eh_stack, 0)) != NOTE_EH_HANDLER (insn))
2944 eh_stack = XEXP (eh_stack, 1);
2945 free_INSN_LIST_node (tmp);
2948 case NOTE_INSN_BLOCK_BEG:
2949 /* By now, all notes indicating lexical blocks should have
2950 NOTE_BLOCK filled in. */
2951 if (NOTE_BLOCK (insn) == NULL_TREE)
2953 block_stack = alloc_INSN_LIST (insn, block_stack);
2956 case NOTE_INSN_BLOCK_END:
2957 /* Too many end notes. */
2958 if (block_stack == NULL_RTX)
2960 /* Mismatched nesting. */
2961 if (NOTE_BLOCK (XEXP (block_stack, 0)) != NOTE_BLOCK (insn))
2964 block_stack = XEXP (block_stack, 1);
2965 free_INSN_LIST_node (tmp);
2967 /* Scan back to see if there are any non-note instructions
2968 between INSN and the beginning of this block. If not,
2969 then there is no PC range in the generated code that will
2970 actually be in this block, so there's no point in
2971 remembering the existence of the block. */
2972 for (tmp = PREV_INSN (insn); tmp ; tmp = PREV_INSN (tmp))
2974 /* This block contains a real instruction. Note that we
2975 don't include labels; if the only thing in the block
2976 is a label, then there are still no PC values that
2977 lie within the block. */
2981 /* We're only interested in NOTEs. */
2982 if (GET_CODE (tmp) != NOTE)
2985 if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_BEG)
2987 /* We just verified that this BLOCK matches us
2988 with the block_stack check above. */
2989 if (debug_ignore_block (NOTE_BLOCK (insn)))
2996 else if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_END)
2997 /* There's a nested block. We need to leave the
2998 current block in place since otherwise the debugger
2999 wouldn't be able to show symbols from our block in
3000 the nested block. */
3006 /* Too many begin notes. */
3007 if (block_stack || eh_stack)
3012 /* Emit an insn of given code and pattern
3013 at a specified place within the doubly-linked list. */
3015 /* Make an instruction with body PATTERN
3016 and output it before the instruction BEFORE. */
3019 emit_insn_before (pattern, before)
3020 register rtx pattern, before;
3022 register rtx insn = before;
3024 if (GET_CODE (pattern) == SEQUENCE)
3028 for (i = 0; i < XVECLEN (pattern, 0); i++)
3030 insn = XVECEXP (pattern, 0, i);
3031 add_insn_before (insn, before);
3036 insn = make_insn_raw (pattern);
3037 add_insn_before (insn, before);
3043 /* Similar to emit_insn_before, but update basic block boundaries as well. */
3046 emit_block_insn_before (pattern, before, block)
3047 rtx pattern, before;
3050 rtx prev = PREV_INSN (before);
3051 rtx r = emit_insn_before (pattern, before);
3052 if (block && block->head == before)
3053 block->head = NEXT_INSN (prev);
3057 /* Make an instruction with body PATTERN and code JUMP_INSN
3058 and output it before the instruction BEFORE. */
3061 emit_jump_insn_before (pattern, before)
3062 register rtx pattern, before;
3066 if (GET_CODE (pattern) == SEQUENCE)
3067 insn = emit_insn_before (pattern, before);
3070 insn = make_jump_insn_raw (pattern);
3071 add_insn_before (insn, before);
3077 /* Make an instruction with body PATTERN and code CALL_INSN
3078 and output it before the instruction BEFORE. */
3081 emit_call_insn_before (pattern, before)
3082 register rtx pattern, before;
3086 if (GET_CODE (pattern) == SEQUENCE)
3087 insn = emit_insn_before (pattern, before);
3090 insn = make_call_insn_raw (pattern);
3091 add_insn_before (insn, before);
3092 PUT_CODE (insn, CALL_INSN);
3098 /* Make an insn of code BARRIER
3099 and output it before the insn BEFORE. */
3102 emit_barrier_before (before)
3103 register rtx before;
3105 register rtx insn = rtx_alloc (BARRIER);
3107 INSN_UID (insn) = cur_insn_uid++;
3109 add_insn_before (insn, before);
3113 /* Emit the label LABEL before the insn BEFORE. */
3116 emit_label_before (label, before)
3119 /* This can be called twice for the same label as a result of the
3120 confusion that follows a syntax error! So make it harmless. */
3121 if (INSN_UID (label) == 0)
3123 INSN_UID (label) = cur_insn_uid++;
3124 add_insn_before (label, before);
3130 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
3133 emit_note_before (subtype, before)
3137 register rtx note = rtx_alloc (NOTE);
3138 INSN_UID (note) = cur_insn_uid++;
3139 NOTE_SOURCE_FILE (note) = 0;
3140 NOTE_LINE_NUMBER (note) = subtype;
3142 add_insn_before (note, before);
3146 /* Make an insn of code INSN with body PATTERN
3147 and output it after the insn AFTER. */
3150 emit_insn_after (pattern, after)
3151 register rtx pattern, after;
3153 register rtx insn = after;
3155 if (GET_CODE (pattern) == SEQUENCE)
3159 for (i = 0; i < XVECLEN (pattern, 0); i++)
3161 insn = XVECEXP (pattern, 0, i);
3162 add_insn_after (insn, after);
3168 insn = make_insn_raw (pattern);
3169 add_insn_after (insn, after);
3175 /* Similar to emit_insn_after, except that line notes are to be inserted so
3176 as to act as if this insn were at FROM. */
3179 emit_insn_after_with_line_notes (pattern, after, from)
3180 rtx pattern, after, from;
3182 rtx from_line = find_line_note (from);
3183 rtx after_line = find_line_note (after);
3184 rtx insn = emit_insn_after (pattern, after);
3187 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
3188 NOTE_LINE_NUMBER (from_line),
3192 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
3193 NOTE_LINE_NUMBER (after_line),
3197 /* Similar to emit_insn_after, but update basic block boundaries as well. */
3200 emit_block_insn_after (pattern, after, block)
3204 rtx r = emit_insn_after (pattern, after);
3205 if (block && block->end == after)
3210 /* Make an insn of code JUMP_INSN with body PATTERN
3211 and output it after the insn AFTER. */
3214 emit_jump_insn_after (pattern, after)
3215 register rtx pattern, after;
3219 if (GET_CODE (pattern) == SEQUENCE)
3220 insn = emit_insn_after (pattern, after);
3223 insn = make_jump_insn_raw (pattern);
3224 add_insn_after (insn, after);
3230 /* Make an insn of code BARRIER
3231 and output it after the insn AFTER. */
3234 emit_barrier_after (after)
3237 register rtx insn = rtx_alloc (BARRIER);
3239 INSN_UID (insn) = cur_insn_uid++;
3241 add_insn_after (insn, after);
3245 /* Emit the label LABEL after the insn AFTER. */
3248 emit_label_after (label, after)
3251 /* This can be called twice for the same label
3252 as a result of the confusion that follows a syntax error!
3253 So make it harmless. */
3254 if (INSN_UID (label) == 0)
3256 INSN_UID (label) = cur_insn_uid++;
3257 add_insn_after (label, after);
3263 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
3266 emit_note_after (subtype, after)
3270 register rtx note = rtx_alloc (NOTE);
3271 INSN_UID (note) = cur_insn_uid++;
3272 NOTE_SOURCE_FILE (note) = 0;
3273 NOTE_LINE_NUMBER (note) = subtype;
3274 add_insn_after (note, after);
3278 /* Emit a line note for FILE and LINE after the insn AFTER. */
3281 emit_line_note_after (file, line, after)
3288 if (no_line_numbers && line > 0)
3294 note = rtx_alloc (NOTE);
3295 INSN_UID (note) = cur_insn_uid++;
3296 NOTE_SOURCE_FILE (note) = file;
3297 NOTE_LINE_NUMBER (note) = line;
3298 add_insn_after (note, after);
3302 /* Make an insn of code INSN with pattern PATTERN
3303 and add it to the end of the doubly-linked list.
3304 If PATTERN is a SEQUENCE, take the elements of it
3305 and emit an insn for each element.
3307 Returns the last insn emitted. */
3313 rtx insn = last_insn;
3315 if (GET_CODE (pattern) == SEQUENCE)
3319 for (i = 0; i < XVECLEN (pattern, 0); i++)
3321 insn = XVECEXP (pattern, 0, i);
3327 insn = make_insn_raw (pattern);
3334 /* Emit the insns in a chain starting with INSN.
3335 Return the last insn emitted. */
3345 rtx next = NEXT_INSN (insn);
3354 /* Emit the insns in a chain starting with INSN and place them in front of
3355 the insn BEFORE. Return the last insn emitted. */
3358 emit_insns_before (insn, before)
3366 rtx next = NEXT_INSN (insn);
3367 add_insn_before (insn, before);
3375 /* Emit the insns in a chain starting with FIRST and place them in back of
3376 the insn AFTER. Return the last insn emitted. */
3379 emit_insns_after (first, after)
3384 register rtx after_after;
3392 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
3395 after_after = NEXT_INSN (after);
3397 NEXT_INSN (after) = first;
3398 PREV_INSN (first) = after;
3399 NEXT_INSN (last) = after_after;
3401 PREV_INSN (after_after) = last;
3403 if (after == last_insn)
3408 /* Make an insn of code JUMP_INSN with pattern PATTERN
3409 and add it to the end of the doubly-linked list. */
3412 emit_jump_insn (pattern)
3415 if (GET_CODE (pattern) == SEQUENCE)
3416 return emit_insn (pattern);
3419 register rtx insn = make_jump_insn_raw (pattern);
3425 /* Make an insn of code CALL_INSN with pattern PATTERN
3426 and add it to the end of the doubly-linked list. */
3429 emit_call_insn (pattern)
3432 if (GET_CODE (pattern) == SEQUENCE)
3433 return emit_insn (pattern);
3436 register rtx insn = make_call_insn_raw (pattern);
3438 PUT_CODE (insn, CALL_INSN);
3443 /* Add the label LABEL to the end of the doubly-linked list. */
3449 /* This can be called twice for the same label
3450 as a result of the confusion that follows a syntax error!
3451 So make it harmless. */
3452 if (INSN_UID (label) == 0)
3454 INSN_UID (label) = cur_insn_uid++;
3460 /* Make an insn of code BARRIER
3461 and add it to the end of the doubly-linked list. */
3466 register rtx barrier = rtx_alloc (BARRIER);
3467 INSN_UID (barrier) = cur_insn_uid++;
3472 /* Make an insn of code NOTE
3473 with data-fields specified by FILE and LINE
3474 and add it to the end of the doubly-linked list,
3475 but only if line-numbers are desired for debugging info. */
3478 emit_line_note (file, line)
3482 set_file_and_line_for_stmt (file, line);
3485 if (no_line_numbers)
3489 return emit_note (file, line);
3492 /* Make an insn of code NOTE
3493 with data-fields specified by FILE and LINE
3494 and add it to the end of the doubly-linked list.
3495 If it is a line-number NOTE, omit it if it matches the previous one. */
3498 emit_note (file, line)
3506 if (file && last_filename && !strcmp (file, last_filename)
3507 && line == last_linenum)
3509 last_filename = file;
3510 last_linenum = line;
3513 if (no_line_numbers && line > 0)
3519 note = rtx_alloc (NOTE);
3520 INSN_UID (note) = cur_insn_uid++;
3521 NOTE_SOURCE_FILE (note) = file;
3522 NOTE_LINE_NUMBER (note) = line;
3527 /* Emit a NOTE, and don't omit it even if LINE is the previous note. */
3530 emit_line_note_force (file, line)
3535 return emit_line_note (file, line);
3538 /* Cause next statement to emit a line note even if the line number
3539 has not changed. This is used at the beginning of a function. */
3542 force_next_line_note ()
3547 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
3548 note of this type already exists, remove it first. */
3551 set_unique_reg_note (insn, kind, datum)
3556 rtx note = find_reg_note (insn, kind, NULL_RTX);
3558 /* First remove the note if there already is one. */
3560 remove_note (insn, note);
3562 REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn));
3565 /* Return an indication of which type of insn should have X as a body.
3566 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
3572 if (GET_CODE (x) == CODE_LABEL)
3574 if (GET_CODE (x) == CALL)
3576 if (GET_CODE (x) == RETURN)
3578 if (GET_CODE (x) == SET)
3580 if (SET_DEST (x) == pc_rtx)
3582 else if (GET_CODE (SET_SRC (x)) == CALL)
3587 if (GET_CODE (x) == PARALLEL)
3590 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
3591 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
3593 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3594 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
3596 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3597 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
3603 /* Emit the rtl pattern X as an appropriate kind of insn.
3604 If X is a label, it is simply added into the insn chain. */
3610 enum rtx_code code = classify_insn (x);
3612 if (code == CODE_LABEL)
3613 return emit_label (x);
3614 else if (code == INSN)
3615 return emit_insn (x);
3616 else if (code == JUMP_INSN)
3618 register rtx insn = emit_jump_insn (x);
3619 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
3620 return emit_barrier ();
3623 else if (code == CALL_INSN)
3624 return emit_call_insn (x);
3629 /* Begin emitting insns to a sequence which can be packaged in an
3630 RTL_EXPR. If this sequence will contain something that might cause
3631 the compiler to pop arguments to function calls (because those
3632 pops have previously been deferred; see INHIBIT_DEFER_POP for more
3633 details), use do_pending_stack_adjust before calling this function.
3634 That will ensure that the deferred pops are not accidentally
3635 emitted in the middle of this sequence. */
3640 struct sequence_stack *tem;
3642 tem = (struct sequence_stack *) xmalloc (sizeof (struct sequence_stack));
3644 tem->next = seq_stack;
3645 tem->first = first_insn;
3646 tem->last = last_insn;
3647 tem->sequence_rtl_expr = seq_rtl_expr;
3655 /* Similarly, but indicate that this sequence will be placed in T, an
3656 RTL_EXPR. See the documentation for start_sequence for more
3657 information about how to use this function. */
3660 start_sequence_for_rtl_expr (t)
3668 /* Set up the insn chain starting with FIRST as the current sequence,
3669 saving the previously current one. See the documentation for
3670 start_sequence for more information about how to use this function. */
3673 push_to_sequence (first)
3680 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
3686 /* Set up the insn chain from a chain stort in FIRST to LAST. */
3689 push_to_full_sequence (first, last)
3695 /* We really should have the end of the insn chain here. */
3696 if (last && NEXT_INSN (last))
3700 /* Set up the outer-level insn chain
3701 as the current sequence, saving the previously current one. */
3704 push_topmost_sequence ()
3706 struct sequence_stack *stack, *top = NULL;
3710 for (stack = seq_stack; stack; stack = stack->next)
3713 first_insn = top->first;
3714 last_insn = top->last;
3715 seq_rtl_expr = top->sequence_rtl_expr;
3718 /* After emitting to the outer-level insn chain, update the outer-level
3719 insn chain, and restore the previous saved state. */
3722 pop_topmost_sequence ()
3724 struct sequence_stack *stack, *top = NULL;
3726 for (stack = seq_stack; stack; stack = stack->next)
3729 top->first = first_insn;
3730 top->last = last_insn;
3731 /* ??? Why don't we save seq_rtl_expr here? */
3736 /* After emitting to a sequence, restore previous saved state.
3738 To get the contents of the sequence just made, you must call
3739 `gen_sequence' *before* calling here.
3741 If the compiler might have deferred popping arguments while
3742 generating this sequence, and this sequence will not be immediately
3743 inserted into the instruction stream, use do_pending_stack_adjust
3744 before calling gen_sequence. That will ensure that the deferred
3745 pops are inserted into this sequence, and not into some random
3746 location in the instruction stream. See INHIBIT_DEFER_POP for more
3747 information about deferred popping of arguments. */
3752 struct sequence_stack *tem = seq_stack;
3754 first_insn = tem->first;
3755 last_insn = tem->last;
3756 seq_rtl_expr = tem->sequence_rtl_expr;
3757 seq_stack = tem->next;
3762 /* This works like end_sequence, but records the old sequence in FIRST
3766 end_full_sequence (first, last)
3769 *first = first_insn;
3774 /* Return 1 if currently emitting into a sequence. */
3779 return seq_stack != 0;
3782 /* Generate a SEQUENCE rtx containing the insns already emitted
3783 to the current sequence.
3785 This is how the gen_... function from a DEFINE_EXPAND
3786 constructs the SEQUENCE that it returns. */
3796 /* Count the insns in the chain. */
3798 for (tem = first_insn; tem; tem = NEXT_INSN (tem))
3801 /* If only one insn, return it rather than a SEQUENCE.
3802 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
3803 the case of an empty list.)
3804 We only return the pattern of an insn if its code is INSN and it
3805 has no notes. This ensures that no information gets lost. */
3807 && ! RTX_FRAME_RELATED_P (first_insn)
3808 && GET_CODE (first_insn) == INSN
3809 /* Don't throw away any reg notes. */
3810 && REG_NOTES (first_insn) == 0)
3811 return PATTERN (first_insn);
3813 result = gen_rtx_SEQUENCE (VOIDmode, rtvec_alloc (len));
3815 for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++)
3816 XVECEXP (result, 0, i) = tem;
3821 /* Put the various virtual registers into REGNO_REG_RTX. */
3824 init_virtual_regs (es)
3825 struct emit_status *es;
3827 rtx *ptr = es->x_regno_reg_rtx;
3828 ptr[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
3829 ptr[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
3830 ptr[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
3831 ptr[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
3832 ptr[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
3836 clear_emit_caches ()
3840 /* Clear the start_sequence/gen_sequence cache. */
3841 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
3842 sequence_result[i] = 0;
3846 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
3847 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
3848 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
3849 static int copy_insn_n_scratches;
3851 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
3852 copied an ASM_OPERANDS.
3853 In that case, it is the original input-operand vector. */
3854 static rtvec orig_asm_operands_vector;
3856 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
3857 copied an ASM_OPERANDS.
3858 In that case, it is the copied input-operand vector. */
3859 static rtvec copy_asm_operands_vector;
3861 /* Likewise for the constraints vector. */
3862 static rtvec orig_asm_constraints_vector;
3863 static rtvec copy_asm_constraints_vector;
3865 /* Recursively create a new copy of an rtx for copy_insn.
3866 This function differs from copy_rtx in that it handles SCRATCHes and
3867 ASM_OPERANDs properly.
3868 Normally, this function is not used directly; use copy_insn as front end.
3869 However, you could first copy an insn pattern with copy_insn and then use
3870 this function afterwards to properly copy any REG_NOTEs containing
3879 register RTX_CODE code;
3880 register const char *format_ptr;
3882 code = GET_CODE (orig);
3898 for (i = 0; i < copy_insn_n_scratches; i++)
3899 if (copy_insn_scratch_in[i] == orig)
3900 return copy_insn_scratch_out[i];
3904 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
3905 a LABEL_REF, it isn't sharable. */
3906 if (GET_CODE (XEXP (orig, 0)) == PLUS
3907 && GET_CODE (XEXP (XEXP (orig, 0), 0)) == SYMBOL_REF
3908 && GET_CODE (XEXP (XEXP (orig, 0), 1)) == CONST_INT)
3912 /* A MEM with a constant address is not sharable. The problem is that
3913 the constant address may need to be reloaded. If the mem is shared,
3914 then reloading one copy of this mem will cause all copies to appear
3915 to have been reloaded. */
3921 copy = rtx_alloc (code);
3923 /* Copy the various flags, and other information. We assume that
3924 all fields need copying, and then clear the fields that should
3925 not be copied. That is the sensible default behavior, and forces
3926 us to explicitly document why we are *not* copying a flag. */
3927 memcpy (copy, orig, sizeof (struct rtx_def) - sizeof (rtunion));
3929 /* We do not copy the USED flag, which is used as a mark bit during
3930 walks over the RTL. */
3933 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
3934 if (GET_RTX_CLASS (code) == 'i')
3938 copy->frame_related = 0;
3941 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
3943 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
3945 copy->fld[i] = orig->fld[i];
3946 switch (*format_ptr++)
3949 if (XEXP (orig, i) != NULL)
3950 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
3955 if (XVEC (orig, i) == orig_asm_constraints_vector)
3956 XVEC (copy, i) = copy_asm_constraints_vector;
3957 else if (XVEC (orig, i) == orig_asm_operands_vector)
3958 XVEC (copy, i) = copy_asm_operands_vector;
3959 else if (XVEC (orig, i) != NULL)
3961 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
3962 for (j = 0; j < XVECLEN (copy, i); j++)
3963 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
3974 /* These are left unchanged. */
3982 if (code == SCRATCH)
3984 i = copy_insn_n_scratches++;
3985 if (i >= MAX_RECOG_OPERANDS)
3987 copy_insn_scratch_in[i] = orig;
3988 copy_insn_scratch_out[i] = copy;
3990 else if (code == ASM_OPERANDS)
3992 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
3993 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
3994 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
3995 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
4001 /* Create a new copy of an rtx.
4002 This function differs from copy_rtx in that it handles SCRATCHes and
4003 ASM_OPERANDs properly.
4004 INSN doesn't really have to be a full INSN; it could be just the
4010 copy_insn_n_scratches = 0;
4011 orig_asm_operands_vector = 0;
4012 orig_asm_constraints_vector = 0;
4013 copy_asm_operands_vector = 0;
4014 copy_asm_constraints_vector = 0;
4015 return copy_insn_1 (insn);
4018 /* Initialize data structures and variables in this file
4019 before generating rtl for each function. */
4024 struct function *f = cfun;
4026 f->emit = (struct emit_status *) xmalloc (sizeof (struct emit_status));
4029 seq_rtl_expr = NULL;
4031 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
4034 first_label_num = label_num;
4038 clear_emit_caches ();
4040 /* Init the tables that describe all the pseudo regs. */
4042 f->emit->regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
4044 f->emit->regno_pointer_align
4045 = (unsigned char *) xcalloc (f->emit->regno_pointer_align_length,
4046 sizeof (unsigned char));
4049 = (rtx *) xcalloc (f->emit->regno_pointer_align_length * sizeof (rtx),
4052 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
4053 init_virtual_regs (f->emit);
4055 /* Indicate that the virtual registers and stack locations are
4057 REG_POINTER (stack_pointer_rtx) = 1;
4058 REG_POINTER (frame_pointer_rtx) = 1;
4059 REG_POINTER (hard_frame_pointer_rtx) = 1;
4060 REG_POINTER (arg_pointer_rtx) = 1;
4062 REG_POINTER (virtual_incoming_args_rtx) = 1;
4063 REG_POINTER (virtual_stack_vars_rtx) = 1;
4064 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
4065 REG_POINTER (virtual_outgoing_args_rtx) = 1;
4066 REG_POINTER (virtual_cfa_rtx) = 1;
4068 #ifdef STACK_BOUNDARY
4069 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
4070 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
4071 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
4072 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
4074 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
4075 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
4076 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
4077 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
4078 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
4081 #ifdef INIT_EXPANDERS
4086 /* Mark SS for GC. */
4089 mark_sequence_stack (ss)
4090 struct sequence_stack *ss;
4094 ggc_mark_rtx (ss->first);
4095 ggc_mark_tree (ss->sequence_rtl_expr);
4100 /* Mark ES for GC. */
4103 mark_emit_status (es)
4104 struct emit_status *es;
4112 for (i = es->regno_pointer_align_length, r = es->x_regno_reg_rtx;
4116 mark_sequence_stack (es->sequence_stack);
4117 ggc_mark_tree (es->sequence_rtl_expr);
4118 ggc_mark_rtx (es->x_first_insn);
4121 /* Create some permanent unique rtl objects shared between all functions.
4122 LINE_NUMBERS is nonzero if line numbers are to be generated. */
4125 init_emit_once (line_numbers)
4129 enum machine_mode mode;
4130 enum machine_mode double_mode;
4132 /* Initialize the CONST_INT hash table. */
4133 const_int_htab = htab_create (37, const_int_htab_hash,
4134 const_int_htab_eq, NULL);
4135 ggc_add_root (&const_int_htab, 1, sizeof (const_int_htab),
4138 no_line_numbers = ! line_numbers;
4140 /* Compute the word and byte modes. */
4142 byte_mode = VOIDmode;
4143 word_mode = VOIDmode;
4144 double_mode = VOIDmode;
4146 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
4147 mode = GET_MODE_WIDER_MODE (mode))
4149 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
4150 && byte_mode == VOIDmode)
4153 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
4154 && word_mode == VOIDmode)
4158 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
4159 mode = GET_MODE_WIDER_MODE (mode))
4161 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
4162 && double_mode == VOIDmode)
4166 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
4168 /* Assign register numbers to the globally defined register rtx.
4169 This must be done at runtime because the register number field
4170 is in a union and some compilers can't initialize unions. */
4172 pc_rtx = gen_rtx (PC, VOIDmode);
4173 cc0_rtx = gen_rtx (CC0, VOIDmode);
4174 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
4175 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
4176 if (hard_frame_pointer_rtx == 0)
4177 hard_frame_pointer_rtx = gen_raw_REG (Pmode,
4178 HARD_FRAME_POINTER_REGNUM);
4179 if (arg_pointer_rtx == 0)
4180 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
4181 virtual_incoming_args_rtx =
4182 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
4183 virtual_stack_vars_rtx =
4184 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
4185 virtual_stack_dynamic_rtx =
4186 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
4187 virtual_outgoing_args_rtx =
4188 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
4189 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
4191 /* These rtx must be roots if GC is enabled. */
4192 ggc_add_rtx_root (global_rtl, GR_MAX);
4194 #ifdef INIT_EXPANDERS
4195 /* This is to initialize {init|mark|free}_machine_status before the first
4196 call to push_function_context_to. This is needed by the Chill front
4197 end which calls push_function_context_to before the first cal to
4198 init_function_start. */
4202 /* Create the unique rtx's for certain rtx codes and operand values. */
4204 /* Don't use gen_rtx here since gen_rtx in this case
4205 tries to use these variables. */
4206 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
4207 const_int_rtx[i + MAX_SAVED_CONST_INT] =
4208 gen_rtx_raw_CONST_INT (VOIDmode, i);
4209 ggc_add_rtx_root (const_int_rtx, 2 * MAX_SAVED_CONST_INT + 1);
4211 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
4212 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
4213 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
4215 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
4217 dconst0 = REAL_VALUE_ATOF ("0", double_mode);
4218 dconst1 = REAL_VALUE_ATOF ("1", double_mode);
4219 dconst2 = REAL_VALUE_ATOF ("2", double_mode);
4220 dconstm1 = REAL_VALUE_ATOF ("-1", double_mode);
4222 for (i = 0; i <= 2; i++)
4224 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
4225 mode = GET_MODE_WIDER_MODE (mode))
4227 rtx tem = rtx_alloc (CONST_DOUBLE);
4228 union real_extract u;
4230 /* Zero any holes in a structure. */
4231 memset ((char *) &u, 0, sizeof u);
4232 u.d = i == 0 ? dconst0 : i == 1 ? dconst1 : dconst2;
4234 /* Avoid trailing garbage in the rtx. */
4235 if (sizeof (u) < sizeof (HOST_WIDE_INT))
4236 CONST_DOUBLE_LOW (tem) = 0;
4237 if (sizeof (u) < 2 * sizeof (HOST_WIDE_INT))
4238 CONST_DOUBLE_HIGH (tem) = 0;
4240 memcpy (&CONST_DOUBLE_LOW (tem), &u, sizeof u);
4241 CONST_DOUBLE_MEM (tem) = cc0_rtx;
4242 CONST_DOUBLE_CHAIN (tem) = NULL_RTX;
4243 PUT_MODE (tem, mode);
4245 const_tiny_rtx[i][(int) mode] = tem;
4248 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
4250 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
4251 mode = GET_MODE_WIDER_MODE (mode))
4252 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
4254 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
4256 mode = GET_MODE_WIDER_MODE (mode))
4257 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
4260 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
4261 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
4262 const_tiny_rtx[0][i] = const0_rtx;
4264 const_tiny_rtx[0][(int) BImode] = const0_rtx;
4265 if (STORE_FLAG_VALUE == 1)
4266 const_tiny_rtx[1][(int) BImode] = const1_rtx;
4268 /* For bounded pointers, `&const_tiny_rtx[0][0]' is not the same as
4269 `(rtx *) const_tiny_rtx'. The former has bounds that only cover
4270 `const_tiny_rtx[0]', whereas the latter has bounds that cover all. */
4271 ggc_add_rtx_root ((rtx *) const_tiny_rtx, sizeof const_tiny_rtx / sizeof (rtx));
4272 ggc_add_rtx_root (&const_true_rtx, 1);
4274 #ifdef RETURN_ADDRESS_POINTER_REGNUM
4275 return_address_pointer_rtx
4276 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
4280 struct_value_rtx = STRUCT_VALUE;
4282 struct_value_rtx = gen_rtx_REG (Pmode, STRUCT_VALUE_REGNUM);
4285 #ifdef STRUCT_VALUE_INCOMING
4286 struct_value_incoming_rtx = STRUCT_VALUE_INCOMING;
4288 #ifdef STRUCT_VALUE_INCOMING_REGNUM
4289 struct_value_incoming_rtx
4290 = gen_rtx_REG (Pmode, STRUCT_VALUE_INCOMING_REGNUM);
4292 struct_value_incoming_rtx = struct_value_rtx;
4296 #ifdef STATIC_CHAIN_REGNUM
4297 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
4299 #ifdef STATIC_CHAIN_INCOMING_REGNUM
4300 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
4301 static_chain_incoming_rtx
4302 = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
4305 static_chain_incoming_rtx = static_chain_rtx;
4309 static_chain_rtx = STATIC_CHAIN;
4311 #ifdef STATIC_CHAIN_INCOMING
4312 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
4314 static_chain_incoming_rtx = static_chain_rtx;
4318 if (PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
4319 pic_offset_table_rtx = gen_rtx_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
4321 ggc_add_rtx_root (&pic_offset_table_rtx, 1);
4322 ggc_add_rtx_root (&struct_value_rtx, 1);
4323 ggc_add_rtx_root (&struct_value_incoming_rtx, 1);
4324 ggc_add_rtx_root (&static_chain_rtx, 1);
4325 ggc_add_rtx_root (&static_chain_incoming_rtx, 1);
4326 ggc_add_rtx_root (&return_address_pointer_rtx, 1);
4329 /* Query and clear/ restore no_line_numbers. This is used by the
4330 switch / case handling in stmt.c to give proper line numbers in
4331 warnings about unreachable code. */
4334 force_line_numbers ()
4336 int old = no_line_numbers;
4338 no_line_numbers = 0;
4340 force_next_line_note ();
4345 restore_line_number_status (old_value)
4348 no_line_numbers = old_value;