1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains the functions `gen_rtx', `gen_reg_rtx'
26 and `gen_label_rtx' that are the usual ways of creating rtl
27 expressions for most purposes.
29 It also has the functions for creating insns and linking
30 them in the doubly-linked chain.
32 The patterns of the insns are created by machine-dependent
33 routines in insn-emit.c, which is generated automatically from
34 the machine description. These routines use `gen_rtx' to make
35 the individual rtx's of the pattern; what is machine dependent
36 is the kind of rtx's they make and what arguments they use. */
40 #include "coretypes.h"
50 #include "hard-reg-set.h"
52 #include "insn-config.h"
56 #include "basic-block.h"
59 #include "langhooks.h"
61 /* Commonly used modes. */
63 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
64 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
65 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
66 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
69 /* This is *not* reset after each function. It gives each CODE_LABEL
70 in the entire compilation a unique label number. */
72 static GTY(()) int label_num = 1;
74 /* Highest label number in current function.
75 Zero means use the value of label_num instead.
76 This is nonzero only when belatedly compiling an inline function. */
78 static int last_label_num;
80 /* Value label_num had when set_new_first_and_last_label_number was called.
81 If label_num has not changed since then, last_label_num is valid. */
83 static int base_label_num;
85 /* Nonzero means do not generate NOTEs for source line numbers. */
87 static int no_line_numbers;
89 /* Commonly used rtx's, so that we only need space for one copy.
90 These are initialized once for the entire compilation.
91 All of these are unique; no other rtx-object will be equal to any
94 rtx global_rtl[GR_MAX];
96 /* Commonly used RTL for hard registers. These objects are not necessarily
97 unique, so we allocate them separately from global_rtl. They are
98 initialized once per compilation unit, then copied into regno_reg_rtx
99 at the beginning of each function. */
100 static GTY(()) rtx static_regno_reg_rtx[FIRST_PSEUDO_REGISTER];
102 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
103 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
104 record a copy of const[012]_rtx. */
106 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
110 REAL_VALUE_TYPE dconst0;
111 REAL_VALUE_TYPE dconst1;
112 REAL_VALUE_TYPE dconst2;
113 REAL_VALUE_TYPE dconstm1;
114 REAL_VALUE_TYPE dconstm2;
115 REAL_VALUE_TYPE dconsthalf;
117 /* All references to the following fixed hard registers go through
118 these unique rtl objects. On machines where the frame-pointer and
119 arg-pointer are the same register, they use the same unique object.
121 After register allocation, other rtl objects which used to be pseudo-regs
122 may be clobbered to refer to the frame-pointer register.
123 But references that were originally to the frame-pointer can be
124 distinguished from the others because they contain frame_pointer_rtx.
126 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
127 tricky: until register elimination has taken place hard_frame_pointer_rtx
128 should be used if it is being set, and frame_pointer_rtx otherwise. After
129 register elimination hard_frame_pointer_rtx should always be used.
130 On machines where the two registers are same (most) then these are the
133 In an inline procedure, the stack and frame pointer rtxs may not be
134 used for anything else. */
135 rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
136 rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
137 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
138 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
139 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
141 /* This is used to implement __builtin_return_address for some machines.
142 See for instance the MIPS port. */
143 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
145 /* We make one copy of (const_int C) where C is in
146 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
147 to save space during the compilation and simplify comparisons of
150 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
152 /* A hash table storing CONST_INTs whose absolute value is greater
153 than MAX_SAVED_CONST_INT. */
155 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
156 htab_t const_int_htab;
158 /* A hash table storing memory attribute structures. */
159 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs)))
160 htab_t mem_attrs_htab;
162 /* A hash table storing register attribute structures. */
163 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs)))
164 htab_t reg_attrs_htab;
166 /* A hash table storing all CONST_DOUBLEs. */
167 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
168 htab_t const_double_htab;
170 #define first_insn (cfun->emit->x_first_insn)
171 #define last_insn (cfun->emit->x_last_insn)
172 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
173 #define last_linenum (cfun->emit->x_last_linenum)
174 #define last_filename (cfun->emit->x_last_filename)
175 #define first_label_num (cfun->emit->x_first_label_num)
177 static rtx make_jump_insn_raw PARAMS ((rtx));
178 static rtx make_call_insn_raw PARAMS ((rtx));
179 static rtx find_line_note PARAMS ((rtx));
180 static rtx change_address_1 PARAMS ((rtx, enum machine_mode, rtx,
182 static void unshare_all_rtl_1 PARAMS ((rtx));
183 static void unshare_all_decls PARAMS ((tree));
184 static void reset_used_decls PARAMS ((tree));
185 static void mark_label_nuses PARAMS ((rtx));
186 static hashval_t const_int_htab_hash PARAMS ((const void *));
187 static int const_int_htab_eq PARAMS ((const void *,
189 static hashval_t const_double_htab_hash PARAMS ((const void *));
190 static int const_double_htab_eq PARAMS ((const void *,
192 static rtx lookup_const_double PARAMS ((rtx));
193 static hashval_t mem_attrs_htab_hash PARAMS ((const void *));
194 static int mem_attrs_htab_eq PARAMS ((const void *,
196 static mem_attrs *get_mem_attrs PARAMS ((HOST_WIDE_INT, tree, rtx,
199 static hashval_t reg_attrs_htab_hash PARAMS ((const void *));
200 static int reg_attrs_htab_eq PARAMS ((const void *,
202 static reg_attrs *get_reg_attrs PARAMS ((tree, int));
203 static tree component_ref_for_mem_expr PARAMS ((tree));
204 static rtx gen_const_vector_0 PARAMS ((enum machine_mode));
206 /* Probability of the conditional branch currently proceeded by try_split.
207 Set to -1 otherwise. */
208 int split_branch_probability = -1;
210 /* Returns a hash code for X (which is a really a CONST_INT). */
213 const_int_htab_hash (x)
216 return (hashval_t) INTVAL ((struct rtx_def *) x);
219 /* Returns nonzero if the value represented by X (which is really a
220 CONST_INT) is the same as that given by Y (which is really a
224 const_int_htab_eq (x, y)
228 return (INTVAL ((rtx) x) == *((const HOST_WIDE_INT *) y));
231 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
233 const_double_htab_hash (x)
239 if (GET_MODE (value) == VOIDmode)
240 h = CONST_DOUBLE_LOW (value) ^ CONST_DOUBLE_HIGH (value);
243 h = real_hash (CONST_DOUBLE_REAL_VALUE (value));
244 /* MODE is used in the comparison, so it should be in the hash. */
245 h ^= GET_MODE (value);
250 /* Returns nonzero if the value represented by X (really a ...)
251 is the same as that represented by Y (really a ...) */
253 const_double_htab_eq (x, y)
257 rtx a = (rtx)x, b = (rtx)y;
259 if (GET_MODE (a) != GET_MODE (b))
261 if (GET_MODE (a) == VOIDmode)
262 return (CONST_DOUBLE_LOW (a) == CONST_DOUBLE_LOW (b)
263 && CONST_DOUBLE_HIGH (a) == CONST_DOUBLE_HIGH (b));
265 return real_identical (CONST_DOUBLE_REAL_VALUE (a),
266 CONST_DOUBLE_REAL_VALUE (b));
269 /* Returns a hash code for X (which is a really a mem_attrs *). */
272 mem_attrs_htab_hash (x)
275 mem_attrs *p = (mem_attrs *) x;
277 return (p->alias ^ (p->align * 1000)
278 ^ ((p->offset ? INTVAL (p->offset) : 0) * 50000)
279 ^ ((p->size ? INTVAL (p->size) : 0) * 2500000)
283 /* Returns nonzero if the value represented by X (which is really a
284 mem_attrs *) is the same as that given by Y (which is also really a
288 mem_attrs_htab_eq (x, y)
292 mem_attrs *p = (mem_attrs *) x;
293 mem_attrs *q = (mem_attrs *) y;
295 return (p->alias == q->alias && p->expr == q->expr && p->offset == q->offset
296 && p->size == q->size && p->align == q->align);
299 /* Allocate a new mem_attrs structure and insert it into the hash table if
300 one identical to it is not already in the table. We are doing this for
304 get_mem_attrs (alias, expr, offset, size, align, mode)
310 enum machine_mode mode;
315 /* If everything is the default, we can just return zero.
316 This must match what the corresponding MEM_* macros return when the
317 field is not present. */
318 if (alias == 0 && expr == 0 && offset == 0
320 || (mode != BLKmode && GET_MODE_SIZE (mode) == INTVAL (size)))
321 && (STRICT_ALIGNMENT && mode != BLKmode
322 ? align == GET_MODE_ALIGNMENT (mode) : align == BITS_PER_UNIT))
327 attrs.offset = offset;
331 slot = htab_find_slot (mem_attrs_htab, &attrs, INSERT);
334 *slot = ggc_alloc (sizeof (mem_attrs));
335 memcpy (*slot, &attrs, sizeof (mem_attrs));
341 /* Returns a hash code for X (which is a really a reg_attrs *). */
344 reg_attrs_htab_hash (x)
347 reg_attrs *p = (reg_attrs *) x;
349 return ((p->offset * 1000) ^ (long) p->decl);
352 /* Returns non-zero if the value represented by X (which is really a
353 reg_attrs *) is the same as that given by Y (which is also really a
357 reg_attrs_htab_eq (x, y)
361 reg_attrs *p = (reg_attrs *) x;
362 reg_attrs *q = (reg_attrs *) y;
364 return (p->decl == q->decl && p->offset == q->offset);
366 /* Allocate a new reg_attrs structure and insert it into the hash table if
367 one identical to it is not already in the table. We are doing this for
371 get_reg_attrs (decl, offset)
378 /* If everything is the default, we can just return zero. */
379 if (decl == 0 && offset == 0)
383 attrs.offset = offset;
385 slot = htab_find_slot (reg_attrs_htab, &attrs, INSERT);
388 *slot = ggc_alloc (sizeof (reg_attrs));
389 memcpy (*slot, &attrs, sizeof (reg_attrs));
395 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
396 don't attempt to share with the various global pieces of rtl (such as
397 frame_pointer_rtx). */
400 gen_raw_REG (mode, regno)
401 enum machine_mode mode;
404 rtx x = gen_rtx_raw_REG (mode, regno);
405 ORIGINAL_REGNO (x) = regno;
409 /* There are some RTL codes that require special attention; the generation
410 functions do the raw handling. If you add to this list, modify
411 special_rtx in gengenrtl.c as well. */
414 gen_rtx_CONST_INT (mode, arg)
415 enum machine_mode mode ATTRIBUTE_UNUSED;
420 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
421 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
423 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
424 if (const_true_rtx && arg == STORE_FLAG_VALUE)
425 return const_true_rtx;
428 /* Look up the CONST_INT in the hash table. */
429 slot = htab_find_slot_with_hash (const_int_htab, &arg,
430 (hashval_t) arg, INSERT);
432 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
438 gen_int_mode (c, mode)
440 enum machine_mode mode;
442 return GEN_INT (trunc_int_for_mode (c, mode));
445 /* CONST_DOUBLEs might be created from pairs of integers, or from
446 REAL_VALUE_TYPEs. Also, their length is known only at run time,
447 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
449 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
450 hash table. If so, return its counterpart; otherwise add it
451 to the hash table and return it. */
453 lookup_const_double (real)
456 void **slot = htab_find_slot (const_double_htab, real, INSERT);
463 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
464 VALUE in mode MODE. */
466 const_double_from_real_value (value, mode)
467 REAL_VALUE_TYPE value;
468 enum machine_mode mode;
470 rtx real = rtx_alloc (CONST_DOUBLE);
471 PUT_MODE (real, mode);
473 memcpy (&CONST_DOUBLE_LOW (real), &value, sizeof (REAL_VALUE_TYPE));
475 return lookup_const_double (real);
478 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
479 of ints: I0 is the low-order word and I1 is the high-order word.
480 Do not use this routine for non-integer modes; convert to
481 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
484 immed_double_const (i0, i1, mode)
485 HOST_WIDE_INT i0, i1;
486 enum machine_mode mode;
491 if (mode != VOIDmode)
494 if (GET_MODE_CLASS (mode) != MODE_INT
495 && GET_MODE_CLASS (mode) != MODE_PARTIAL_INT
496 /* We can get a 0 for an error mark. */
497 && GET_MODE_CLASS (mode) != MODE_VECTOR_INT
498 && GET_MODE_CLASS (mode) != MODE_VECTOR_FLOAT)
501 /* We clear out all bits that don't belong in MODE, unless they and
502 our sign bit are all one. So we get either a reasonable negative
503 value or a reasonable unsigned value for this mode. */
504 width = GET_MODE_BITSIZE (mode);
505 if (width < HOST_BITS_PER_WIDE_INT
506 && ((i0 & ((HOST_WIDE_INT) (-1) << (width - 1)))
507 != ((HOST_WIDE_INT) (-1) << (width - 1))))
508 i0 &= ((HOST_WIDE_INT) 1 << width) - 1, i1 = 0;
509 else if (width == HOST_BITS_PER_WIDE_INT
510 && ! (i1 == ~0 && i0 < 0))
512 else if (width > 2 * HOST_BITS_PER_WIDE_INT)
513 /* We cannot represent this value as a constant. */
516 /* If this would be an entire word for the target, but is not for
517 the host, then sign-extend on the host so that the number will
518 look the same way on the host that it would on the target.
520 For example, when building a 64 bit alpha hosted 32 bit sparc
521 targeted compiler, then we want the 32 bit unsigned value -1 to be
522 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
523 The latter confuses the sparc backend. */
525 if (width < HOST_BITS_PER_WIDE_INT
526 && (i0 & ((HOST_WIDE_INT) 1 << (width - 1))))
527 i0 |= ((HOST_WIDE_INT) (-1) << width);
529 /* If MODE fits within HOST_BITS_PER_WIDE_INT, always use a
532 ??? Strictly speaking, this is wrong if we create a CONST_INT for
533 a large unsigned constant with the size of MODE being
534 HOST_BITS_PER_WIDE_INT and later try to interpret that constant
535 in a wider mode. In that case we will mis-interpret it as a
538 Unfortunately, the only alternative is to make a CONST_DOUBLE for
539 any constant in any mode if it is an unsigned constant larger
540 than the maximum signed integer in an int on the host. However,
541 doing this will break everyone that always expects to see a
542 CONST_INT for SImode and smaller.
544 We have always been making CONST_INTs in this case, so nothing
545 new is being broken. */
547 if (width <= HOST_BITS_PER_WIDE_INT)
548 i1 = (i0 < 0) ? ~(HOST_WIDE_INT) 0 : 0;
551 /* If this integer fits in one word, return a CONST_INT. */
552 if ((i1 == 0 && i0 >= 0) || (i1 == ~0 && i0 < 0))
555 /* We use VOIDmode for integers. */
556 value = rtx_alloc (CONST_DOUBLE);
557 PUT_MODE (value, VOIDmode);
559 CONST_DOUBLE_LOW (value) = i0;
560 CONST_DOUBLE_HIGH (value) = i1;
562 for (i = 2; i < (sizeof CONST_DOUBLE_FORMAT - 1); i++)
563 XWINT (value, i) = 0;
565 return lookup_const_double (value);
569 gen_rtx_REG (mode, regno)
570 enum machine_mode mode;
573 /* In case the MD file explicitly references the frame pointer, have
574 all such references point to the same frame pointer. This is
575 used during frame pointer elimination to distinguish the explicit
576 references to these registers from pseudos that happened to be
579 If we have eliminated the frame pointer or arg pointer, we will
580 be using it as a normal register, for example as a spill
581 register. In such cases, we might be accessing it in a mode that
582 is not Pmode and therefore cannot use the pre-allocated rtx.
584 Also don't do this when we are making new REGs in reload, since
585 we don't want to get confused with the real pointers. */
587 if (mode == Pmode && !reload_in_progress)
589 if (regno == FRAME_POINTER_REGNUM
590 && (!reload_completed || frame_pointer_needed))
591 return frame_pointer_rtx;
592 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
593 if (regno == HARD_FRAME_POINTER_REGNUM
594 && (!reload_completed || frame_pointer_needed))
595 return hard_frame_pointer_rtx;
597 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
598 if (regno == ARG_POINTER_REGNUM)
599 return arg_pointer_rtx;
601 #ifdef RETURN_ADDRESS_POINTER_REGNUM
602 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
603 return return_address_pointer_rtx;
605 if (regno == (unsigned) PIC_OFFSET_TABLE_REGNUM
606 && fixed_regs[PIC_OFFSET_TABLE_REGNUM])
607 return pic_offset_table_rtx;
608 if (regno == STACK_POINTER_REGNUM)
609 return stack_pointer_rtx;
613 /* If the per-function register table has been set up, try to re-use
614 an existing entry in that table to avoid useless generation of RTL.
616 This code is disabled for now until we can fix the various backends
617 which depend on having non-shared hard registers in some cases. Long
618 term we want to re-enable this code as it can significantly cut down
619 on the amount of useless RTL that gets generated.
621 We'll also need to fix some code that runs after reload that wants to
622 set ORIGINAL_REGNO. */
627 && regno < FIRST_PSEUDO_REGISTER
628 && reg_raw_mode[regno] == mode)
629 return regno_reg_rtx[regno];
632 return gen_raw_REG (mode, regno);
636 gen_rtx_MEM (mode, addr)
637 enum machine_mode mode;
640 rtx rt = gen_rtx_raw_MEM (mode, addr);
642 /* This field is not cleared by the mere allocation of the rtx, so
650 gen_rtx_SUBREG (mode, reg, offset)
651 enum machine_mode mode;
655 /* This is the most common failure type.
656 Catch it early so we can see who does it. */
657 if ((offset % GET_MODE_SIZE (mode)) != 0)
660 /* This check isn't usable right now because combine will
661 throw arbitrary crap like a CALL into a SUBREG in
662 gen_lowpart_for_combine so we must just eat it. */
664 /* Check for this too. */
665 if (offset >= GET_MODE_SIZE (GET_MODE (reg)))
668 return gen_rtx_raw_SUBREG (mode, reg, offset);
671 /* Generate a SUBREG representing the least-significant part of REG if MODE
672 is smaller than mode of REG, otherwise paradoxical SUBREG. */
675 gen_lowpart_SUBREG (mode, reg)
676 enum machine_mode mode;
679 enum machine_mode inmode;
681 inmode = GET_MODE (reg);
682 if (inmode == VOIDmode)
684 return gen_rtx_SUBREG (mode, reg,
685 subreg_lowpart_offset (mode, inmode));
688 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
690 ** This routine generates an RTX of the size specified by
691 ** <code>, which is an RTX code. The RTX structure is initialized
692 ** from the arguments <element1> through <elementn>, which are
693 ** interpreted according to the specific RTX type's format. The
694 ** special machine mode associated with the rtx (if any) is specified
697 ** gen_rtx can be invoked in a way which resembles the lisp-like
698 ** rtx it will generate. For example, the following rtx structure:
700 ** (plus:QI (mem:QI (reg:SI 1))
701 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
703 ** ...would be generated by the following C code:
705 ** gen_rtx (PLUS, QImode,
706 ** gen_rtx (MEM, QImode,
707 ** gen_rtx (REG, SImode, 1)),
708 ** gen_rtx (MEM, QImode,
709 ** gen_rtx (PLUS, SImode,
710 ** gen_rtx (REG, SImode, 2),
711 ** gen_rtx (REG, SImode, 3)))),
716 gen_rtx (enum rtx_code code, enum machine_mode mode, ...)
718 int i; /* Array indices... */
719 const char *fmt; /* Current rtx's format... */
720 rtx rt_val; /* RTX to return to caller... */
728 rt_val = gen_rtx_CONST_INT (mode, va_arg (p, HOST_WIDE_INT));
733 HOST_WIDE_INT arg0 = va_arg (p, HOST_WIDE_INT);
734 HOST_WIDE_INT arg1 = va_arg (p, HOST_WIDE_INT);
736 rt_val = immed_double_const (arg0, arg1, mode);
741 rt_val = gen_rtx_REG (mode, va_arg (p, int));
745 rt_val = gen_rtx_MEM (mode, va_arg (p, rtx));
749 rt_val = rtx_alloc (code); /* Allocate the storage space. */
750 rt_val->mode = mode; /* Store the machine mode... */
752 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
753 for (i = 0; i < GET_RTX_LENGTH (code); i++)
757 case '0': /* Field with unknown use. Zero it. */
758 X0EXP (rt_val, i) = NULL_RTX;
761 case 'i': /* An integer? */
762 XINT (rt_val, i) = va_arg (p, int);
765 case 'w': /* A wide integer? */
766 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
769 case 's': /* A string? */
770 XSTR (rt_val, i) = va_arg (p, char *);
773 case 'e': /* An expression? */
774 case 'u': /* An insn? Same except when printing. */
775 XEXP (rt_val, i) = va_arg (p, rtx);
778 case 'E': /* An RTX vector? */
779 XVEC (rt_val, i) = va_arg (p, rtvec);
782 case 'b': /* A bitmap? */
783 XBITMAP (rt_val, i) = va_arg (p, bitmap);
786 case 't': /* A tree? */
787 XTREE (rt_val, i) = va_arg (p, tree);
801 /* gen_rtvec (n, [rt1, ..., rtn])
803 ** This routine creates an rtvec and stores within it the
804 ** pointers to rtx's which are its arguments.
809 gen_rtvec (int n, ...)
818 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
820 vector = (rtx *) alloca (n * sizeof (rtx));
822 for (i = 0; i < n; i++)
823 vector[i] = va_arg (p, rtx);
825 /* The definition of VA_* in K&R C causes `n' to go out of scope. */
829 return gen_rtvec_v (save_n, vector);
833 gen_rtvec_v (n, argp)
841 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
843 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
845 for (i = 0; i < n; i++)
846 rt_val->elem[i] = *argp++;
851 /* Generate a REG rtx for a new pseudo register of mode MODE.
852 This pseudo is assigned the next sequential register number. */
856 enum machine_mode mode;
858 struct function *f = cfun;
861 /* Don't let anything called after initial flow analysis create new
866 if (generating_concat_p
867 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
868 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
870 /* For complex modes, don't make a single pseudo.
871 Instead, make a CONCAT of two pseudos.
872 This allows noncontiguous allocation of the real and imaginary parts,
873 which makes much better code. Besides, allocating DCmode
874 pseudos overstrains reload on some machines like the 386. */
875 rtx realpart, imagpart;
876 enum machine_mode partmode = GET_MODE_INNER (mode);
878 realpart = gen_reg_rtx (partmode);
879 imagpart = gen_reg_rtx (partmode);
880 return gen_rtx_CONCAT (mode, realpart, imagpart);
883 /* Make sure regno_pointer_align, and regno_reg_rtx are large
884 enough to have an element for this pseudo reg number. */
886 if (reg_rtx_no == f->emit->regno_pointer_align_length)
888 int old_size = f->emit->regno_pointer_align_length;
892 new = ggc_realloc (f->emit->regno_pointer_align, old_size * 2);
893 memset (new + old_size, 0, old_size);
894 f->emit->regno_pointer_align = (unsigned char *) new;
896 new1 = (rtx *) ggc_realloc (f->emit->x_regno_reg_rtx,
897 old_size * 2 * sizeof (rtx));
898 memset (new1 + old_size, 0, old_size * sizeof (rtx));
899 regno_reg_rtx = new1;
901 f->emit->regno_pointer_align_length = old_size * 2;
904 val = gen_raw_REG (mode, reg_rtx_no);
905 regno_reg_rtx[reg_rtx_no++] = val;
909 /* Generate an register with same attributes as REG,
910 but offsetted by OFFSET. */
913 gen_rtx_REG_offset (reg, mode, regno, offset)
914 enum machine_mode mode;
919 rtx new = gen_rtx_REG (mode, regno);
920 REG_ATTRS (new) = get_reg_attrs (REG_EXPR (reg),
921 REG_OFFSET (reg) + offset);
925 /* Set the decl for MEM to DECL. */
928 set_reg_attrs_from_mem (reg, mem)
932 if (MEM_OFFSET (mem) && GET_CODE (MEM_OFFSET (mem)) == CONST_INT)
934 = get_reg_attrs (MEM_EXPR (mem), INTVAL (MEM_OFFSET (mem)));
937 /* Set the register attributes for registers contained in PARM_RTX.
938 Use needed values from memory attributes of MEM. */
941 set_reg_attrs_for_parm (parm_rtx, mem)
945 if (GET_CODE (parm_rtx) == REG)
946 set_reg_attrs_from_mem (parm_rtx, mem);
947 else if (GET_CODE (parm_rtx) == PARALLEL)
949 /* Check for a NULL entry in the first slot, used to indicate that the
950 parameter goes both on the stack and in registers. */
951 int i = XEXP (XVECEXP (parm_rtx, 0, 0), 0) ? 0 : 1;
952 for (; i < XVECLEN (parm_rtx, 0); i++)
954 rtx x = XVECEXP (parm_rtx, 0, i);
955 if (GET_CODE (XEXP (x, 0)) == REG)
956 REG_ATTRS (XEXP (x, 0))
957 = get_reg_attrs (MEM_EXPR (mem),
958 INTVAL (XEXP (x, 1)));
963 /* Assign the RTX X to declaration T. */
969 DECL_CHECK (t)->decl.rtl = x;
973 /* For register, we maitain the reverse information too. */
974 if (GET_CODE (x) == REG)
975 REG_ATTRS (x) = get_reg_attrs (t, 0);
976 else if (GET_CODE (x) == SUBREG)
977 REG_ATTRS (SUBREG_REG (x))
978 = get_reg_attrs (t, -SUBREG_BYTE (x));
979 if (GET_CODE (x) == CONCAT)
981 if (REG_P (XEXP (x, 0)))
982 REG_ATTRS (XEXP (x, 0)) = get_reg_attrs (t, 0);
983 if (REG_P (XEXP (x, 1)))
984 REG_ATTRS (XEXP (x, 1))
985 = get_reg_attrs (t, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x, 0))));
987 if (GET_CODE (x) == PARALLEL)
990 for (i = 0; i < XVECLEN (x, 0); i++)
992 rtx y = XVECEXP (x, 0, i);
993 if (REG_P (XEXP (y, 0)))
994 REG_ATTRS (XEXP (y, 0)) = get_reg_attrs (t, INTVAL (XEXP (y, 1)));
999 /* Identify REG (which may be a CONCAT) as a user register. */
1005 if (GET_CODE (reg) == CONCAT)
1007 REG_USERVAR_P (XEXP (reg, 0)) = 1;
1008 REG_USERVAR_P (XEXP (reg, 1)) = 1;
1010 else if (GET_CODE (reg) == REG)
1011 REG_USERVAR_P (reg) = 1;
1016 /* Identify REG as a probable pointer register and show its alignment
1017 as ALIGN, if nonzero. */
1020 mark_reg_pointer (reg, align)
1024 if (! REG_POINTER (reg))
1026 REG_POINTER (reg) = 1;
1029 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
1031 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
1032 /* We can no-longer be sure just how aligned this pointer is */
1033 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
1036 /* Return 1 plus largest pseudo reg number used in the current function. */
1044 /* Return 1 + the largest label number used so far in the current function. */
1049 if (last_label_num && label_num == base_label_num)
1050 return last_label_num;
1054 /* Return first label number used in this function (if any were used). */
1057 get_first_label_num ()
1059 return first_label_num;
1062 /* Return the final regno of X, which is a SUBREG of a hard
1065 subreg_hard_regno (x, check_mode)
1069 enum machine_mode mode = GET_MODE (x);
1070 unsigned int byte_offset, base_regno, final_regno;
1071 rtx reg = SUBREG_REG (x);
1073 /* This is where we attempt to catch illegal subregs
1074 created by the compiler. */
1075 if (GET_CODE (x) != SUBREG
1076 || GET_CODE (reg) != REG)
1078 base_regno = REGNO (reg);
1079 if (base_regno >= FIRST_PSEUDO_REGISTER)
1081 if (check_mode && ! HARD_REGNO_MODE_OK (base_regno, GET_MODE (reg)))
1083 #ifdef ENABLE_CHECKING
1084 if (!subreg_offset_representable_p (REGNO (reg), GET_MODE (reg),
1085 SUBREG_BYTE (x), mode))
1088 /* Catch non-congruent offsets too. */
1089 byte_offset = SUBREG_BYTE (x);
1090 if ((byte_offset % GET_MODE_SIZE (mode)) != 0)
1093 final_regno = subreg_regno (x);
1098 /* Return a value representing some low-order bits of X, where the number
1099 of low-order bits is given by MODE. Note that no conversion is done
1100 between floating-point and fixed-point values, rather, the bit
1101 representation is returned.
1103 This function handles the cases in common between gen_lowpart, below,
1104 and two variants in cse.c and combine.c. These are the cases that can
1105 be safely handled at all points in the compilation.
1107 If this is not a case we can handle, return 0. */
1110 gen_lowpart_common (mode, x)
1111 enum machine_mode mode;
1114 int msize = GET_MODE_SIZE (mode);
1115 int xsize = GET_MODE_SIZE (GET_MODE (x));
1118 if (GET_MODE (x) == mode)
1121 /* MODE must occupy no more words than the mode of X. */
1122 if (GET_MODE (x) != VOIDmode
1123 && ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
1124 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)))
1127 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1128 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1129 && GET_MODE (x) != VOIDmode && msize > xsize)
1132 offset = subreg_lowpart_offset (mode, GET_MODE (x));
1134 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
1135 && (GET_MODE_CLASS (mode) == MODE_INT
1136 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
1138 /* If we are getting the low-order part of something that has been
1139 sign- or zero-extended, we can either just use the object being
1140 extended or make a narrower extension. If we want an even smaller
1141 piece than the size of the object being extended, call ourselves
1144 This case is used mostly by combine and cse. */
1146 if (GET_MODE (XEXP (x, 0)) == mode)
1148 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
1149 return gen_lowpart_common (mode, XEXP (x, 0));
1150 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
1151 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
1153 else if (GET_CODE (x) == SUBREG || GET_CODE (x) == REG
1154 || GET_CODE (x) == CONCAT || GET_CODE (x) == CONST_VECTOR)
1155 return simplify_gen_subreg (mode, x, GET_MODE (x), offset);
1156 else if ((GET_MODE_CLASS (mode) == MODE_VECTOR_INT
1157 || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT)
1158 && GET_MODE (x) == VOIDmode)
1159 return simplify_gen_subreg (mode, x, int_mode_for_mode (mode), offset);
1160 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
1161 from the low-order part of the constant. */
1162 else if ((GET_MODE_CLASS (mode) == MODE_INT
1163 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
1164 && GET_MODE (x) == VOIDmode
1165 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
1167 /* If MODE is twice the host word size, X is already the desired
1168 representation. Otherwise, if MODE is wider than a word, we can't
1169 do this. If MODE is exactly a word, return just one CONST_INT. */
1171 if (GET_MODE_BITSIZE (mode) >= 2 * HOST_BITS_PER_WIDE_INT)
1173 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
1175 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT)
1176 return (GET_CODE (x) == CONST_INT ? x
1177 : GEN_INT (CONST_DOUBLE_LOW (x)));
1180 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
1181 HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
1182 : CONST_DOUBLE_LOW (x));
1184 /* Sign extend to HOST_WIDE_INT. */
1185 val = trunc_int_for_mode (val, mode);
1187 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
1192 /* The floating-point emulator can handle all conversions between
1193 FP and integer operands. This simplifies reload because it
1194 doesn't have to deal with constructs like (subreg:DI
1195 (const_double:SF ...)) or (subreg:DF (const_int ...)). */
1196 /* Single-precision floats are always 32-bits and double-precision
1197 floats are always 64-bits. */
1199 else if (GET_MODE_CLASS (mode) == MODE_FLOAT
1200 && GET_MODE_BITSIZE (mode) == 32
1201 && GET_CODE (x) == CONST_INT)
1204 long i = INTVAL (x);
1206 real_from_target (&r, &i, mode);
1207 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
1209 else if (GET_MODE_CLASS (mode) == MODE_FLOAT
1210 && GET_MODE_BITSIZE (mode) == 64
1211 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
1212 && GET_MODE (x) == VOIDmode)
1215 HOST_WIDE_INT low, high;
1218 if (GET_CODE (x) == CONST_INT)
1221 high = low >> (HOST_BITS_PER_WIDE_INT - 1);
1225 low = CONST_DOUBLE_LOW (x);
1226 high = CONST_DOUBLE_HIGH (x);
1229 if (HOST_BITS_PER_WIDE_INT > 32)
1230 high = low >> 31 >> 1;
1232 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
1234 if (WORDS_BIG_ENDIAN)
1235 i[0] = high, i[1] = low;
1237 i[0] = low, i[1] = high;
1239 real_from_target (&r, i, mode);
1240 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
1242 else if ((GET_MODE_CLASS (mode) == MODE_INT
1243 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
1244 && GET_CODE (x) == CONST_DOUBLE
1245 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
1248 long i[4]; /* Only the low 32 bits of each 'long' are used. */
1249 int endian = WORDS_BIG_ENDIAN ? 1 : 0;
1251 /* Convert 'r' into an array of four 32-bit words in target word
1253 REAL_VALUE_FROM_CONST_DOUBLE (r, x);
1254 switch (GET_MODE_BITSIZE (GET_MODE (x)))
1257 REAL_VALUE_TO_TARGET_SINGLE (r, i[3 * endian]);
1260 i[3 - 3 * endian] = 0;
1263 REAL_VALUE_TO_TARGET_DOUBLE (r, i + 2 * endian);
1264 i[2 - 2 * endian] = 0;
1265 i[3 - 2 * endian] = 0;
1268 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i + endian);
1269 i[3 - 3 * endian] = 0;
1272 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i);
1277 /* Now, pack the 32-bit elements of the array into a CONST_DOUBLE
1279 #if HOST_BITS_PER_WIDE_INT == 32
1280 return immed_double_const (i[3 * endian], i[1 + endian], mode);
1282 if (HOST_BITS_PER_WIDE_INT != 64)
1285 return immed_double_const ((((unsigned long) i[3 * endian])
1286 | ((HOST_WIDE_INT) i[1 + endian] << 32)),
1287 (((unsigned long) i[2 - endian])
1288 | ((HOST_WIDE_INT) i[3 - 3 * endian] << 32)),
1293 /* Otherwise, we can't do this. */
1297 /* Return the real part (which has mode MODE) of a complex value X.
1298 This always comes at the low address in memory. */
1301 gen_realpart (mode, x)
1302 enum machine_mode mode;
1305 if (WORDS_BIG_ENDIAN
1306 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1308 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1310 ("can't access real part of complex value in hard register");
1311 else if (WORDS_BIG_ENDIAN)
1312 return gen_highpart (mode, x);
1314 return gen_lowpart (mode, x);
1317 /* Return the imaginary part (which has mode MODE) of a complex value X.
1318 This always comes at the high address in memory. */
1321 gen_imagpart (mode, x)
1322 enum machine_mode mode;
1325 if (WORDS_BIG_ENDIAN)
1326 return gen_lowpart (mode, x);
1327 else if (! WORDS_BIG_ENDIAN
1328 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1330 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1332 ("can't access imaginary part of complex value in hard register");
1334 return gen_highpart (mode, x);
1337 /* Return 1 iff X, assumed to be a SUBREG,
1338 refers to the real part of the complex value in its containing reg.
1339 Complex values are always stored with the real part in the first word,
1340 regardless of WORDS_BIG_ENDIAN. */
1343 subreg_realpart_p (x)
1346 if (GET_CODE (x) != SUBREG)
1349 return ((unsigned int) SUBREG_BYTE (x)
1350 < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x))));
1353 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1354 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1355 least-significant part of X.
1356 MODE specifies how big a part of X to return;
1357 it usually should not be larger than a word.
1358 If X is a MEM whose address is a QUEUED, the value may be so also. */
1361 gen_lowpart (mode, x)
1362 enum machine_mode mode;
1365 rtx result = gen_lowpart_common (mode, x);
1369 else if (GET_CODE (x) == REG)
1371 /* Must be a hard reg that's not valid in MODE. */
1372 result = gen_lowpart_common (mode, copy_to_reg (x));
1377 else if (GET_CODE (x) == MEM)
1379 /* The only additional case we can do is MEM. */
1382 /* The following exposes the use of "x" to CSE. */
1383 if (GET_MODE_SIZE (GET_MODE (x)) <= UNITS_PER_WORD
1384 && SCALAR_INT_MODE_P (GET_MODE (x))
1385 && ! no_new_pseudos)
1386 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
1388 if (WORDS_BIG_ENDIAN)
1389 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
1390 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1392 if (BYTES_BIG_ENDIAN)
1393 /* Adjust the address so that the address-after-the-data
1395 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
1396 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
1398 return adjust_address (x, mode, offset);
1400 else if (GET_CODE (x) == ADDRESSOF)
1401 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
1406 /* Like `gen_lowpart', but refer to the most significant part.
1407 This is used to access the imaginary part of a complex number. */
1410 gen_highpart (mode, x)
1411 enum machine_mode mode;
1414 unsigned int msize = GET_MODE_SIZE (mode);
1417 /* This case loses if X is a subreg. To catch bugs early,
1418 complain if an invalid MODE is used even in other cases. */
1419 if (msize > UNITS_PER_WORD
1420 && msize != GET_MODE_UNIT_SIZE (GET_MODE (x)))
1423 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1424 subreg_highpart_offset (mode, GET_MODE (x)));
1426 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1427 the target if we have a MEM. gen_highpart must return a valid operand,
1428 emitting code if necessary to do so. */
1429 if (result != NULL_RTX && GET_CODE (result) == MEM)
1430 result = validize_mem (result);
1437 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1438 be VOIDmode constant. */
1440 gen_highpart_mode (outermode, innermode, exp)
1441 enum machine_mode outermode, innermode;
1444 if (GET_MODE (exp) != VOIDmode)
1446 if (GET_MODE (exp) != innermode)
1448 return gen_highpart (outermode, exp);
1450 return simplify_gen_subreg (outermode, exp, innermode,
1451 subreg_highpart_offset (outermode, innermode));
1454 /* Return offset in bytes to get OUTERMODE low part
1455 of the value in mode INNERMODE stored in memory in target format. */
1458 subreg_lowpart_offset (outermode, innermode)
1459 enum machine_mode outermode, innermode;
1461 unsigned int offset = 0;
1462 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1466 if (WORDS_BIG_ENDIAN)
1467 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1468 if (BYTES_BIG_ENDIAN)
1469 offset += difference % UNITS_PER_WORD;
1475 /* Return offset in bytes to get OUTERMODE high part
1476 of the value in mode INNERMODE stored in memory in target format. */
1478 subreg_highpart_offset (outermode, innermode)
1479 enum machine_mode outermode, innermode;
1481 unsigned int offset = 0;
1482 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1484 if (GET_MODE_SIZE (innermode) < GET_MODE_SIZE (outermode))
1489 if (! WORDS_BIG_ENDIAN)
1490 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1491 if (! BYTES_BIG_ENDIAN)
1492 offset += difference % UNITS_PER_WORD;
1498 /* Return 1 iff X, assumed to be a SUBREG,
1499 refers to the least significant part of its containing reg.
1500 If X is not a SUBREG, always return 1 (it is its own low part!). */
1503 subreg_lowpart_p (x)
1506 if (GET_CODE (x) != SUBREG)
1508 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1511 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1512 == SUBREG_BYTE (x));
1516 /* Helper routine for all the constant cases of operand_subword.
1517 Some places invoke this directly. */
1520 constant_subword (op, offset, mode)
1523 enum machine_mode mode;
1525 int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD;
1528 /* If OP is already an integer word, return it. */
1529 if (GET_MODE_CLASS (mode) == MODE_INT
1530 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
1533 /* The output is some bits, the width of the target machine's word.
1534 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1536 if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1537 && GET_MODE_CLASS (mode) == MODE_FLOAT
1538 && GET_MODE_BITSIZE (mode) == 64
1539 && GET_CODE (op) == CONST_DOUBLE)
1544 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1545 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
1547 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1548 which the words are written depends on the word endianness.
1549 ??? This is a potential portability problem and should
1550 be fixed at some point.
1552 We must exercise caution with the sign bit. By definition there
1553 are 32 significant bits in K; there may be more in a HOST_WIDE_INT.
1554 Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT.
1555 So we explicitly mask and sign-extend as necessary. */
1556 if (BITS_PER_WORD == 32)
1559 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1560 return GEN_INT (val);
1562 #if HOST_BITS_PER_WIDE_INT >= 64
1563 else if (BITS_PER_WORD >= 64 && offset == 0)
1565 val = k[! WORDS_BIG_ENDIAN];
1566 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1567 val |= (HOST_WIDE_INT) k[WORDS_BIG_ENDIAN] & 0xffffffff;
1568 return GEN_INT (val);
1571 else if (BITS_PER_WORD == 16)
1573 val = k[offset >> 1];
1574 if ((offset & 1) == ! WORDS_BIG_ENDIAN)
1576 val = ((val & 0xffff) ^ 0x8000) - 0x8000;
1577 return GEN_INT (val);
1582 else if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1583 && GET_MODE_CLASS (mode) == MODE_FLOAT
1584 && GET_MODE_BITSIZE (mode) > 64
1585 && GET_CODE (op) == CONST_DOUBLE)
1590 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1591 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k);
1593 if (BITS_PER_WORD == 32)
1596 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1597 return GEN_INT (val);
1599 #if HOST_BITS_PER_WIDE_INT >= 64
1600 else if (BITS_PER_WORD >= 64 && offset <= 1)
1602 val = k[offset * 2 + ! WORDS_BIG_ENDIAN];
1603 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1604 val |= (HOST_WIDE_INT) k[offset * 2 + WORDS_BIG_ENDIAN] & 0xffffffff;
1605 return GEN_INT (val);
1612 /* Single word float is a little harder, since single- and double-word
1613 values often do not have the same high-order bits. We have already
1614 verified that we want the only defined word of the single-word value. */
1615 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1616 && GET_MODE_BITSIZE (mode) == 32
1617 && GET_CODE (op) == CONST_DOUBLE)
1622 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1623 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
1625 /* Sign extend from known 32-bit value to HOST_WIDE_INT. */
1627 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1629 if (BITS_PER_WORD == 16)
1631 if ((offset & 1) == ! WORDS_BIG_ENDIAN)
1633 val = ((val & 0xffff) ^ 0x8000) - 0x8000;
1636 return GEN_INT (val);
1639 /* The only remaining cases that we can handle are integers.
1640 Convert to proper endianness now since these cases need it.
1641 At this point, offset == 0 means the low-order word.
1643 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1644 in general. However, if OP is (const_int 0), we can just return
1647 if (op == const0_rtx)
1650 if (GET_MODE_CLASS (mode) != MODE_INT
1651 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE)
1652 || BITS_PER_WORD > HOST_BITS_PER_WIDE_INT)
1655 if (WORDS_BIG_ENDIAN)
1656 offset = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - offset;
1658 /* Find out which word on the host machine this value is in and get
1659 it from the constant. */
1660 val = (offset / size_ratio == 0
1661 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
1662 : (GET_CODE (op) == CONST_INT
1663 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
1665 /* Get the value we want into the low bits of val. */
1666 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT)
1667 val = ((val >> ((offset % size_ratio) * BITS_PER_WORD)));
1669 val = trunc_int_for_mode (val, word_mode);
1671 return GEN_INT (val);
1674 /* Return subword OFFSET of operand OP.
1675 The word number, OFFSET, is interpreted as the word number starting
1676 at the low-order address. OFFSET 0 is the low-order word if not
1677 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1679 If we cannot extract the required word, we return zero. Otherwise,
1680 an rtx corresponding to the requested word will be returned.
1682 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1683 reload has completed, a valid address will always be returned. After
1684 reload, if a valid address cannot be returned, we return zero.
1686 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1687 it is the responsibility of the caller.
1689 MODE is the mode of OP in case it is a CONST_INT.
1691 ??? This is still rather broken for some cases. The problem for the
1692 moment is that all callers of this thing provide no 'goal mode' to
1693 tell us to work with. This exists because all callers were written
1694 in a word based SUBREG world.
1695 Now use of this function can be deprecated by simplify_subreg in most
1700 operand_subword (op, offset, validate_address, mode)
1702 unsigned int offset;
1703 int validate_address;
1704 enum machine_mode mode;
1706 if (mode == VOIDmode)
1707 mode = GET_MODE (op);
1709 if (mode == VOIDmode)
1712 /* If OP is narrower than a word, fail. */
1714 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1717 /* If we want a word outside OP, return zero. */
1719 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1722 /* Form a new MEM at the requested address. */
1723 if (GET_CODE (op) == MEM)
1725 rtx new = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1727 if (! validate_address)
1730 else if (reload_completed)
1732 if (! strict_memory_address_p (word_mode, XEXP (new, 0)))
1736 return replace_equiv_address (new, XEXP (new, 0));
1739 /* Rest can be handled by simplify_subreg. */
1740 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1743 /* Similar to `operand_subword', but never return 0. If we can't extract
1744 the required subword, put OP into a register and try again. If that fails,
1745 abort. We always validate the address in this case.
1747 MODE is the mode of OP, in case it is CONST_INT. */
1750 operand_subword_force (op, offset, mode)
1752 unsigned int offset;
1753 enum machine_mode mode;
1755 rtx result = operand_subword (op, offset, 1, mode);
1760 if (mode != BLKmode && mode != VOIDmode)
1762 /* If this is a register which can not be accessed by words, copy it
1763 to a pseudo register. */
1764 if (GET_CODE (op) == REG)
1765 op = copy_to_reg (op);
1767 op = force_reg (mode, op);
1770 result = operand_subword (op, offset, 1, mode);
1777 /* Given a compare instruction, swap the operands.
1778 A test instruction is changed into a compare of 0 against the operand. */
1781 reverse_comparison (insn)
1784 rtx body = PATTERN (insn);
1787 if (GET_CODE (body) == SET)
1788 comp = SET_SRC (body);
1790 comp = SET_SRC (XVECEXP (body, 0, 0));
1792 if (GET_CODE (comp) == COMPARE)
1794 rtx op0 = XEXP (comp, 0);
1795 rtx op1 = XEXP (comp, 1);
1796 XEXP (comp, 0) = op1;
1797 XEXP (comp, 1) = op0;
1801 rtx new = gen_rtx_COMPARE (VOIDmode,
1802 CONST0_RTX (GET_MODE (comp)), comp);
1803 if (GET_CODE (body) == SET)
1804 SET_SRC (body) = new;
1806 SET_SRC (XVECEXP (body, 0, 0)) = new;
1810 /* Within a MEM_EXPR, we care about either (1) a component ref of a decl,
1811 or (2) a component ref of something variable. Represent the later with
1812 a NULL expression. */
1815 component_ref_for_mem_expr (ref)
1818 tree inner = TREE_OPERAND (ref, 0);
1820 if (TREE_CODE (inner) == COMPONENT_REF)
1821 inner = component_ref_for_mem_expr (inner);
1824 tree placeholder_ptr = 0;
1826 /* Now remove any conversions: they don't change what the underlying
1827 object is. Likewise for SAVE_EXPR. Also handle PLACEHOLDER_EXPR. */
1828 while (TREE_CODE (inner) == NOP_EXPR || TREE_CODE (inner) == CONVERT_EXPR
1829 || TREE_CODE (inner) == NON_LVALUE_EXPR
1830 || TREE_CODE (inner) == VIEW_CONVERT_EXPR
1831 || TREE_CODE (inner) == SAVE_EXPR
1832 || TREE_CODE (inner) == PLACEHOLDER_EXPR)
1833 if (TREE_CODE (inner) == PLACEHOLDER_EXPR)
1834 inner = find_placeholder (inner, &placeholder_ptr);
1836 inner = TREE_OPERAND (inner, 0);
1838 if (! DECL_P (inner))
1842 if (inner == TREE_OPERAND (ref, 0))
1845 return build (COMPONENT_REF, TREE_TYPE (ref), inner,
1846 TREE_OPERAND (ref, 1));
1849 /* Given REF, a MEM, and T, either the type of X or the expression
1850 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1851 if we are making a new object of this type. BITPOS is nonzero if
1852 there is an offset outstanding on T that will be applied later. */
1855 set_mem_attributes_minus_bitpos (ref, t, objectp, bitpos)
1859 HOST_WIDE_INT bitpos;
1861 HOST_WIDE_INT alias = MEM_ALIAS_SET (ref);
1862 tree expr = MEM_EXPR (ref);
1863 rtx offset = MEM_OFFSET (ref);
1864 rtx size = MEM_SIZE (ref);
1865 unsigned int align = MEM_ALIGN (ref);
1866 HOST_WIDE_INT apply_bitpos = 0;
1869 /* It can happen that type_for_mode was given a mode for which there
1870 is no language-level type. In which case it returns NULL, which
1875 type = TYPE_P (t) ? t : TREE_TYPE (t);
1877 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1878 wrong answer, as it assumes that DECL_RTL already has the right alias
1879 info. Callers should not set DECL_RTL until after the call to
1880 set_mem_attributes. */
1881 if (DECL_P (t) && ref == DECL_RTL_IF_SET (t))
1884 /* Get the alias set from the expression or type (perhaps using a
1885 front-end routine) and use it. */
1886 alias = get_alias_set (t);
1888 MEM_VOLATILE_P (ref) = TYPE_VOLATILE (type);
1889 MEM_IN_STRUCT_P (ref) = AGGREGATE_TYPE_P (type);
1890 RTX_UNCHANGING_P (ref)
1891 |= ((lang_hooks.honor_readonly
1892 && (TYPE_READONLY (type) || TREE_READONLY (t)))
1893 || (! TYPE_P (t) && TREE_CONSTANT (t)));
1895 /* If we are making an object of this type, or if this is a DECL, we know
1896 that it is a scalar if the type is not an aggregate. */
1897 if ((objectp || DECL_P (t)) && ! AGGREGATE_TYPE_P (type))
1898 MEM_SCALAR_P (ref) = 1;
1900 /* We can set the alignment from the type if we are making an object,
1901 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1902 if (objectp || TREE_CODE (t) == INDIRECT_REF || TYPE_ALIGN_OK (type))
1903 align = MAX (align, TYPE_ALIGN (type));
1905 /* If the size is known, we can set that. */
1906 if (TYPE_SIZE_UNIT (type) && host_integerp (TYPE_SIZE_UNIT (type), 1))
1907 size = GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type), 1));
1909 /* If T is not a type, we may be able to deduce some more information about
1913 maybe_set_unchanging (ref, t);
1914 if (TREE_THIS_VOLATILE (t))
1915 MEM_VOLATILE_P (ref) = 1;
1917 /* Now remove any conversions: they don't change what the underlying
1918 object is. Likewise for SAVE_EXPR. */
1919 while (TREE_CODE (t) == NOP_EXPR || TREE_CODE (t) == CONVERT_EXPR
1920 || TREE_CODE (t) == NON_LVALUE_EXPR
1921 || TREE_CODE (t) == VIEW_CONVERT_EXPR
1922 || TREE_CODE (t) == SAVE_EXPR)
1923 t = TREE_OPERAND (t, 0);
1925 /* If this expression can't be addressed (e.g., it contains a reference
1926 to a non-addressable field), show we don't change its alias set. */
1927 if (! can_address_p (t))
1928 MEM_KEEP_ALIAS_SET_P (ref) = 1;
1930 /* If this is a decl, set the attributes of the MEM from it. */
1934 offset = const0_rtx;
1935 apply_bitpos = bitpos;
1936 size = (DECL_SIZE_UNIT (t)
1937 && host_integerp (DECL_SIZE_UNIT (t), 1)
1938 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t), 1)) : 0);
1939 align = DECL_ALIGN (t);
1942 /* If this is a constant, we know the alignment. */
1943 else if (TREE_CODE_CLASS (TREE_CODE (t)) == 'c')
1945 align = TYPE_ALIGN (type);
1946 #ifdef CONSTANT_ALIGNMENT
1947 align = CONSTANT_ALIGNMENT (t, align);
1951 /* If this is a field reference and not a bit-field, record it. */
1952 /* ??? There is some information that can be gleened from bit-fields,
1953 such as the word offset in the structure that might be modified.
1954 But skip it for now. */
1955 else if (TREE_CODE (t) == COMPONENT_REF
1956 && ! DECL_BIT_FIELD (TREE_OPERAND (t, 1)))
1958 expr = component_ref_for_mem_expr (t);
1959 offset = const0_rtx;
1960 apply_bitpos = bitpos;
1961 /* ??? Any reason the field size would be different than
1962 the size we got from the type? */
1965 /* If this is an array reference, look for an outer field reference. */
1966 else if (TREE_CODE (t) == ARRAY_REF)
1968 tree off_tree = size_zero_node;
1972 tree index = TREE_OPERAND (t, 1);
1973 tree array = TREE_OPERAND (t, 0);
1974 tree domain = TYPE_DOMAIN (TREE_TYPE (array));
1975 tree low_bound = (domain ? TYPE_MIN_VALUE (domain) : 0);
1976 tree unit_size = TYPE_SIZE_UNIT (TREE_TYPE (TREE_TYPE (array)));
1978 /* We assume all arrays have sizes that are a multiple of a byte.
1979 First subtract the lower bound, if any, in the type of the
1980 index, then convert to sizetype and multiply by the size of the
1982 if (low_bound != 0 && ! integer_zerop (low_bound))
1983 index = fold (build (MINUS_EXPR, TREE_TYPE (index),
1986 /* If the index has a self-referential type, pass it to a
1987 WITH_RECORD_EXPR; if the component size is, pass our
1988 component to one. */
1989 if (! TREE_CONSTANT (index)
1990 && contains_placeholder_p (index))
1991 index = build (WITH_RECORD_EXPR, TREE_TYPE (index), index, t);
1992 if (! TREE_CONSTANT (unit_size)
1993 && contains_placeholder_p (unit_size))
1994 unit_size = build (WITH_RECORD_EXPR, sizetype,
1998 = fold (build (PLUS_EXPR, sizetype,
1999 fold (build (MULT_EXPR, sizetype,
2003 t = TREE_OPERAND (t, 0);
2005 while (TREE_CODE (t) == ARRAY_REF);
2011 if (host_integerp (off_tree, 1))
2013 HOST_WIDE_INT ioff = tree_low_cst (off_tree, 1);
2014 HOST_WIDE_INT aoff = (ioff & -ioff) * BITS_PER_UNIT;
2015 align = DECL_ALIGN (t);
2016 if (aoff && (unsigned HOST_WIDE_INT) aoff < align)
2018 offset = GEN_INT (ioff);
2019 apply_bitpos = bitpos;
2022 else if (TREE_CODE (t) == COMPONENT_REF)
2024 expr = component_ref_for_mem_expr (t);
2025 if (host_integerp (off_tree, 1))
2027 offset = GEN_INT (tree_low_cst (off_tree, 1));
2028 apply_bitpos = bitpos;
2030 /* ??? Any reason the field size would be different than
2031 the size we got from the type? */
2033 else if (flag_argument_noalias > 1
2034 && TREE_CODE (t) == INDIRECT_REF
2035 && TREE_CODE (TREE_OPERAND (t, 0)) == PARM_DECL)
2042 /* If this is a Fortran indirect argument reference, record the
2044 else if (flag_argument_noalias > 1
2045 && TREE_CODE (t) == INDIRECT_REF
2046 && TREE_CODE (TREE_OPERAND (t, 0)) == PARM_DECL)
2053 /* If we modified OFFSET based on T, then subtract the outstanding
2054 bit position offset. Similarly, increase the size of the accessed
2055 object to contain the negative offset. */
2058 offset = plus_constant (offset, -(apply_bitpos / BITS_PER_UNIT));
2060 size = plus_constant (size, apply_bitpos / BITS_PER_UNIT);
2063 /* Now set the attributes we computed above. */
2065 = get_mem_attrs (alias, expr, offset, size, align, GET_MODE (ref));
2067 /* If this is already known to be a scalar or aggregate, we are done. */
2068 if (MEM_IN_STRUCT_P (ref) || MEM_SCALAR_P (ref))
2071 /* If it is a reference into an aggregate, this is part of an aggregate.
2072 Otherwise we don't know. */
2073 else if (TREE_CODE (t) == COMPONENT_REF || TREE_CODE (t) == ARRAY_REF
2074 || TREE_CODE (t) == ARRAY_RANGE_REF
2075 || TREE_CODE (t) == BIT_FIELD_REF)
2076 MEM_IN_STRUCT_P (ref) = 1;
2080 set_mem_attributes (ref, t, objectp)
2085 set_mem_attributes_minus_bitpos (ref, t, objectp, 0);
2088 /* Set the decl for MEM to DECL. */
2091 set_mem_attrs_from_reg (mem, reg)
2096 = get_mem_attrs (MEM_ALIAS_SET (mem), REG_EXPR (reg),
2097 GEN_INT (REG_OFFSET (reg)),
2098 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
2101 /* Set the alias set of MEM to SET. */
2104 set_mem_alias_set (mem, set)
2108 #ifdef ENABLE_CHECKING
2109 /* If the new and old alias sets don't conflict, something is wrong. */
2110 if (!alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)))
2114 MEM_ATTRS (mem) = get_mem_attrs (set, MEM_EXPR (mem), MEM_OFFSET (mem),
2115 MEM_SIZE (mem), MEM_ALIGN (mem),
2119 /* Set the alignment of MEM to ALIGN bits. */
2122 set_mem_align (mem, align)
2126 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
2127 MEM_OFFSET (mem), MEM_SIZE (mem), align,
2131 /* Set the expr for MEM to EXPR. */
2134 set_mem_expr (mem, expr)
2139 = get_mem_attrs (MEM_ALIAS_SET (mem), expr, MEM_OFFSET (mem),
2140 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
2143 /* Set the offset of MEM to OFFSET. */
2146 set_mem_offset (mem, offset)
2149 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
2150 offset, MEM_SIZE (mem), MEM_ALIGN (mem),
2154 /* Set the size of MEM to SIZE. */
2157 set_mem_size (mem, size)
2160 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
2161 MEM_OFFSET (mem), size, MEM_ALIGN (mem),
2165 /* Return a memory reference like MEMREF, but with its mode changed to MODE
2166 and its address changed to ADDR. (VOIDmode means don't change the mode.
2167 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
2168 returned memory location is required to be valid. The memory
2169 attributes are not changed. */
2172 change_address_1 (memref, mode, addr, validate)
2174 enum machine_mode mode;
2180 if (GET_CODE (memref) != MEM)
2182 if (mode == VOIDmode)
2183 mode = GET_MODE (memref);
2185 addr = XEXP (memref, 0);
2189 if (reload_in_progress || reload_completed)
2191 if (! memory_address_p (mode, addr))
2195 addr = memory_address (mode, addr);
2198 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
2201 new = gen_rtx_MEM (mode, addr);
2202 MEM_COPY_ATTRIBUTES (new, memref);
2206 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
2207 way we are changing MEMREF, so we only preserve the alias set. */
2210 change_address (memref, mode, addr)
2212 enum machine_mode mode;
2215 rtx new = change_address_1 (memref, mode, addr, 1);
2216 enum machine_mode mmode = GET_MODE (new);
2219 = get_mem_attrs (MEM_ALIAS_SET (memref), 0, 0,
2220 mmode == BLKmode ? 0 : GEN_INT (GET_MODE_SIZE (mmode)),
2221 (mmode == BLKmode ? BITS_PER_UNIT
2222 : GET_MODE_ALIGNMENT (mmode)),
2228 /* Return a memory reference like MEMREF, but with its mode changed
2229 to MODE and its address offset by OFFSET bytes. If VALIDATE is
2230 nonzero, the memory address is forced to be valid.
2231 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
2232 and caller is responsible for adjusting MEMREF base register. */
2235 adjust_address_1 (memref, mode, offset, validate, adjust)
2237 enum machine_mode mode;
2238 HOST_WIDE_INT offset;
2239 int validate, adjust;
2241 rtx addr = XEXP (memref, 0);
2243 rtx memoffset = MEM_OFFSET (memref);
2245 unsigned int memalign = MEM_ALIGN (memref);
2247 /* ??? Prefer to create garbage instead of creating shared rtl.
2248 This may happen even if offset is nonzero -- consider
2249 (plus (plus reg reg) const_int) -- so do this always. */
2250 addr = copy_rtx (addr);
2254 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
2255 object, we can merge it into the LO_SUM. */
2256 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
2258 && (unsigned HOST_WIDE_INT) offset
2259 < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
2260 addr = gen_rtx_LO_SUM (Pmode, XEXP (addr, 0),
2261 plus_constant (XEXP (addr, 1), offset));
2263 addr = plus_constant (addr, offset);
2266 new = change_address_1 (memref, mode, addr, validate);
2268 /* Compute the new values of the memory attributes due to this adjustment.
2269 We add the offsets and update the alignment. */
2271 memoffset = GEN_INT (offset + INTVAL (memoffset));
2273 /* Compute the new alignment by taking the MIN of the alignment and the
2274 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
2279 (unsigned HOST_WIDE_INT) (offset & -offset) * BITS_PER_UNIT);
2281 /* We can compute the size in a number of ways. */
2282 if (GET_MODE (new) != BLKmode)
2283 size = GEN_INT (GET_MODE_SIZE (GET_MODE (new)));
2284 else if (MEM_SIZE (memref))
2285 size = plus_constant (MEM_SIZE (memref), -offset);
2287 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref),
2288 memoffset, size, memalign, GET_MODE (new));
2290 /* At some point, we should validate that this offset is within the object,
2291 if all the appropriate values are known. */
2295 /* Return a memory reference like MEMREF, but with its mode changed
2296 to MODE and its address changed to ADDR, which is assumed to be
2297 MEMREF offseted by OFFSET bytes. If VALIDATE is
2298 nonzero, the memory address is forced to be valid. */
2301 adjust_automodify_address_1 (memref, mode, addr, offset, validate)
2303 enum machine_mode mode;
2305 HOST_WIDE_INT offset;
2308 memref = change_address_1 (memref, VOIDmode, addr, validate);
2309 return adjust_address_1 (memref, mode, offset, validate, 0);
2312 /* Return a memory reference like MEMREF, but whose address is changed by
2313 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2314 known to be in OFFSET (possibly 1). */
2317 offset_address (memref, offset, pow2)
2320 unsigned HOST_WIDE_INT pow2;
2322 rtx new, addr = XEXP (memref, 0);
2324 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
2326 /* At this point we don't know _why_ the address is invalid. It
2327 could have secondary memory refereces, multiplies or anything.
2329 However, if we did go and rearrange things, we can wind up not
2330 being able to recognize the magic around pic_offset_table_rtx.
2331 This stuff is fragile, and is yet another example of why it is
2332 bad to expose PIC machinery too early. */
2333 if (! memory_address_p (GET_MODE (memref), new)
2334 && GET_CODE (addr) == PLUS
2335 && XEXP (addr, 0) == pic_offset_table_rtx)
2337 addr = force_reg (GET_MODE (addr), addr);
2338 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
2341 update_temp_slot_address (XEXP (memref, 0), new);
2342 new = change_address_1 (memref, VOIDmode, new, 1);
2344 /* Update the alignment to reflect the offset. Reset the offset, which
2347 = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref), 0, 0,
2348 MIN (MEM_ALIGN (memref), pow2 * BITS_PER_UNIT),
2353 /* Return a memory reference like MEMREF, but with its address changed to
2354 ADDR. The caller is asserting that the actual piece of memory pointed
2355 to is the same, just the form of the address is being changed, such as
2356 by putting something into a register. */
2359 replace_equiv_address (memref, addr)
2363 /* change_address_1 copies the memory attribute structure without change
2364 and that's exactly what we want here. */
2365 update_temp_slot_address (XEXP (memref, 0), addr);
2366 return change_address_1 (memref, VOIDmode, addr, 1);
2369 /* Likewise, but the reference is not required to be valid. */
2372 replace_equiv_address_nv (memref, addr)
2376 return change_address_1 (memref, VOIDmode, addr, 0);
2379 /* Return a memory reference like MEMREF, but with its mode widened to
2380 MODE and offset by OFFSET. This would be used by targets that e.g.
2381 cannot issue QImode memory operations and have to use SImode memory
2382 operations plus masking logic. */
2385 widen_memory_access (memref, mode, offset)
2387 enum machine_mode mode;
2388 HOST_WIDE_INT offset;
2390 rtx new = adjust_address_1 (memref, mode, offset, 1, 1);
2391 tree expr = MEM_EXPR (new);
2392 rtx memoffset = MEM_OFFSET (new);
2393 unsigned int size = GET_MODE_SIZE (mode);
2395 /* If we don't know what offset we were at within the expression, then
2396 we can't know if we've overstepped the bounds. */
2402 if (TREE_CODE (expr) == COMPONENT_REF)
2404 tree field = TREE_OPERAND (expr, 1);
2406 if (! DECL_SIZE_UNIT (field))
2412 /* Is the field at least as large as the access? If so, ok,
2413 otherwise strip back to the containing structure. */
2414 if (TREE_CODE (DECL_SIZE_UNIT (field)) == INTEGER_CST
2415 && compare_tree_int (DECL_SIZE_UNIT (field), size) >= 0
2416 && INTVAL (memoffset) >= 0)
2419 if (! host_integerp (DECL_FIELD_OFFSET (field), 1))
2425 expr = TREE_OPERAND (expr, 0);
2426 memoffset = (GEN_INT (INTVAL (memoffset)
2427 + tree_low_cst (DECL_FIELD_OFFSET (field), 1)
2428 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 1)
2431 /* Similarly for the decl. */
2432 else if (DECL_P (expr)
2433 && DECL_SIZE_UNIT (expr)
2434 && TREE_CODE (DECL_SIZE_UNIT (expr)) == INTEGER_CST
2435 && compare_tree_int (DECL_SIZE_UNIT (expr), size) >= 0
2436 && (! memoffset || INTVAL (memoffset) >= 0))
2440 /* The widened memory access overflows the expression, which means
2441 that it could alias another expression. Zap it. */
2448 memoffset = NULL_RTX;
2450 /* The widened memory may alias other stuff, so zap the alias set. */
2451 /* ??? Maybe use get_alias_set on any remaining expression. */
2453 MEM_ATTRS (new) = get_mem_attrs (0, expr, memoffset, GEN_INT (size),
2454 MEM_ALIGN (new), mode);
2459 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2464 return gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX, NULL_RTX,
2465 NULL, label_num++, NULL);
2468 /* For procedure integration. */
2470 /* Install new pointers to the first and last insns in the chain.
2471 Also, set cur_insn_uid to one higher than the last in use.
2472 Used for an inline-procedure after copying the insn chain. */
2475 set_new_first_and_last_insn (first, last)
2484 for (insn = first; insn; insn = NEXT_INSN (insn))
2485 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2490 /* Set the range of label numbers found in the current function.
2491 This is used when belatedly compiling an inline function. */
2494 set_new_first_and_last_label_num (first, last)
2497 base_label_num = label_num;
2498 first_label_num = first;
2499 last_label_num = last;
2502 /* Set the last label number found in the current function.
2503 This is used when belatedly compiling an inline function. */
2506 set_new_last_label_num (last)
2509 base_label_num = label_num;
2510 last_label_num = last;
2513 /* Restore all variables describing the current status from the structure *P.
2514 This is used after a nested function. */
2517 restore_emit_status (p)
2518 struct function *p ATTRIBUTE_UNUSED;
2523 /* Go through all the RTL insn bodies and copy any invalid shared
2524 structure. This routine should only be called once. */
2527 unshare_all_rtl (fndecl, insn)
2533 /* Make sure that virtual parameters are not shared. */
2534 for (decl = DECL_ARGUMENTS (fndecl); decl; decl = TREE_CHAIN (decl))
2535 SET_DECL_RTL (decl, copy_rtx_if_shared (DECL_RTL (decl)));
2537 /* Make sure that virtual stack slots are not shared. */
2538 unshare_all_decls (DECL_INITIAL (fndecl));
2540 /* Unshare just about everything else. */
2541 unshare_all_rtl_1 (insn);
2543 /* Make sure the addresses of stack slots found outside the insn chain
2544 (such as, in DECL_RTL of a variable) are not shared
2545 with the insn chain.
2547 This special care is necessary when the stack slot MEM does not
2548 actually appear in the insn chain. If it does appear, its address
2549 is unshared from all else at that point. */
2550 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
2553 /* Go through all the RTL insn bodies and copy any invalid shared
2554 structure, again. This is a fairly expensive thing to do so it
2555 should be done sparingly. */
2558 unshare_all_rtl_again (insn)
2564 for (p = insn; p; p = NEXT_INSN (p))
2567 reset_used_flags (PATTERN (p));
2568 reset_used_flags (REG_NOTES (p));
2569 reset_used_flags (LOG_LINKS (p));
2572 /* Make sure that virtual stack slots are not shared. */
2573 reset_used_decls (DECL_INITIAL (cfun->decl));
2575 /* Make sure that virtual parameters are not shared. */
2576 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
2577 reset_used_flags (DECL_RTL (decl));
2579 reset_used_flags (stack_slot_list);
2581 unshare_all_rtl (cfun->decl, insn);
2584 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2585 Assumes the mark bits are cleared at entry. */
2588 unshare_all_rtl_1 (insn)
2591 for (; insn; insn = NEXT_INSN (insn))
2594 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
2595 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
2596 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
2600 /* Go through all virtual stack slots of a function and copy any
2601 shared structure. */
2603 unshare_all_decls (blk)
2608 /* Copy shared decls. */
2609 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2610 if (DECL_RTL_SET_P (t))
2611 SET_DECL_RTL (t, copy_rtx_if_shared (DECL_RTL (t)));
2613 /* Now process sub-blocks. */
2614 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2615 unshare_all_decls (t);
2618 /* Go through all virtual stack slots of a function and mark them as
2621 reset_used_decls (blk)
2627 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2628 if (DECL_RTL_SET_P (t))
2629 reset_used_flags (DECL_RTL (t));
2631 /* Now process sub-blocks. */
2632 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2633 reset_used_decls (t);
2636 /* Similar to `copy_rtx' except that if MAY_SHARE is present, it is
2637 placed in the result directly, rather than being copied. MAY_SHARE is
2638 either a MEM of an EXPR_LIST of MEMs. */
2641 copy_most_rtx (orig, may_share)
2648 const char *format_ptr;
2650 if (orig == may_share
2651 || (GET_CODE (may_share) == EXPR_LIST
2652 && in_expr_list_p (may_share, orig)))
2655 code = GET_CODE (orig);
2673 copy = rtx_alloc (code);
2674 PUT_MODE (copy, GET_MODE (orig));
2675 RTX_FLAG (copy, in_struct) = RTX_FLAG (orig, in_struct);
2676 RTX_FLAG (copy, volatil) = RTX_FLAG (orig, volatil);
2677 RTX_FLAG (copy, unchanging) = RTX_FLAG (orig, unchanging);
2678 RTX_FLAG (copy, integrated) = RTX_FLAG (orig, integrated);
2679 RTX_FLAG (copy, frame_related) = RTX_FLAG (orig, frame_related);
2681 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
2683 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
2685 switch (*format_ptr++)
2688 XEXP (copy, i) = XEXP (orig, i);
2689 if (XEXP (orig, i) != NULL && XEXP (orig, i) != may_share)
2690 XEXP (copy, i) = copy_most_rtx (XEXP (orig, i), may_share);
2694 XEXP (copy, i) = XEXP (orig, i);
2699 XVEC (copy, i) = XVEC (orig, i);
2700 if (XVEC (orig, i) != NULL)
2702 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
2703 for (j = 0; j < XVECLEN (copy, i); j++)
2704 XVECEXP (copy, i, j)
2705 = copy_most_rtx (XVECEXP (orig, i, j), may_share);
2710 XWINT (copy, i) = XWINT (orig, i);
2715 XINT (copy, i) = XINT (orig, i);
2719 XTREE (copy, i) = XTREE (orig, i);
2724 XSTR (copy, i) = XSTR (orig, i);
2728 /* Copy this through the wide int field; that's safest. */
2729 X0WINT (copy, i) = X0WINT (orig, i);
2739 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2740 Recursively does the same for subexpressions. */
2743 copy_rtx_if_shared (orig)
2749 const char *format_ptr;
2755 code = GET_CODE (x);
2757 /* These types may be freely shared. */
2771 /* SCRATCH must be shared because they represent distinct values. */
2775 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2776 a LABEL_REF, it isn't sharable. */
2777 if (GET_CODE (XEXP (x, 0)) == PLUS
2778 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
2779 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
2788 /* The chain of insns is not being copied. */
2792 /* A MEM is allowed to be shared if its address is constant.
2794 We used to allow sharing of MEMs which referenced
2795 virtual_stack_vars_rtx or virtual_incoming_args_rtx, but
2796 that can lose. instantiate_virtual_regs will not unshare
2797 the MEMs, and combine may change the structure of the address
2798 because it looks safe and profitable in one context, but
2799 in some other context it creates unrecognizable RTL. */
2800 if (CONSTANT_ADDRESS_P (XEXP (x, 0)))
2809 /* This rtx may not be shared. If it has already been seen,
2810 replace it with a copy of itself. */
2812 if (RTX_FLAG (x, used))
2816 copy = rtx_alloc (code);
2818 (sizeof (*copy) - sizeof (copy->fld)
2819 + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code)));
2823 RTX_FLAG (x, used) = 1;
2825 /* Now scan the subexpressions recursively.
2826 We can store any replaced subexpressions directly into X
2827 since we know X is not shared! Any vectors in X
2828 must be copied if X was copied. */
2830 format_ptr = GET_RTX_FORMAT (code);
2832 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2834 switch (*format_ptr++)
2837 XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
2841 if (XVEC (x, i) != NULL)
2844 int len = XVECLEN (x, i);
2846 if (copied && len > 0)
2847 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
2848 for (j = 0; j < len; j++)
2849 XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j));
2857 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2858 to look for shared sub-parts. */
2861 reset_used_flags (x)
2866 const char *format_ptr;
2871 code = GET_CODE (x);
2873 /* These types may be freely shared so we needn't do any resetting
2895 /* The chain of insns is not being copied. */
2902 RTX_FLAG (x, used) = 0;
2904 format_ptr = GET_RTX_FORMAT (code);
2905 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2907 switch (*format_ptr++)
2910 reset_used_flags (XEXP (x, i));
2914 for (j = 0; j < XVECLEN (x, i); j++)
2915 reset_used_flags (XVECEXP (x, i, j));
2921 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2922 Return X or the rtx for the pseudo reg the value of X was copied into.
2923 OTHER must be valid as a SET_DEST. */
2926 make_safe_from (x, other)
2930 switch (GET_CODE (other))
2933 other = SUBREG_REG (other);
2935 case STRICT_LOW_PART:
2938 other = XEXP (other, 0);
2944 if ((GET_CODE (other) == MEM
2946 && GET_CODE (x) != REG
2947 && GET_CODE (x) != SUBREG)
2948 || (GET_CODE (other) == REG
2949 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2950 || reg_mentioned_p (other, x))))
2952 rtx temp = gen_reg_rtx (GET_MODE (x));
2953 emit_move_insn (temp, x);
2959 /* Emission of insns (adding them to the doubly-linked list). */
2961 /* Return the first insn of the current sequence or current function. */
2969 /* Specify a new insn as the first in the chain. */
2972 set_first_insn (insn)
2975 if (PREV_INSN (insn) != 0)
2980 /* Return the last insn emitted in current sequence or current function. */
2988 /* Specify a new insn as the last in the chain. */
2991 set_last_insn (insn)
2994 if (NEXT_INSN (insn) != 0)
2999 /* Return the last insn emitted, even if it is in a sequence now pushed. */
3002 get_last_insn_anywhere ()
3004 struct sequence_stack *stack;
3007 for (stack = seq_stack; stack; stack = stack->next)
3008 if (stack->last != 0)
3013 /* Return the first nonnote insn emitted in current sequence or current
3014 function. This routine looks inside SEQUENCEs. */
3017 get_first_nonnote_insn ()
3019 rtx insn = first_insn;
3023 insn = next_insn (insn);
3024 if (insn == 0 || GET_CODE (insn) != NOTE)
3031 /* Return the last nonnote insn emitted in current sequence or current
3032 function. This routine looks inside SEQUENCEs. */
3035 get_last_nonnote_insn ()
3037 rtx insn = last_insn;
3041 insn = previous_insn (insn);
3042 if (insn == 0 || GET_CODE (insn) != NOTE)
3049 /* Return a number larger than any instruction's uid in this function. */
3054 return cur_insn_uid;
3057 /* Renumber instructions so that no instruction UIDs are wasted. */
3060 renumber_insns (stream)
3065 /* If we're not supposed to renumber instructions, don't. */
3066 if (!flag_renumber_insns)
3069 /* If there aren't that many instructions, then it's not really
3070 worth renumbering them. */
3071 if (flag_renumber_insns == 1 && get_max_uid () < 25000)
3076 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
3079 fprintf (stream, "Renumbering insn %d to %d\n",
3080 INSN_UID (insn), cur_insn_uid);
3081 INSN_UID (insn) = cur_insn_uid++;
3085 /* Return the next insn. If it is a SEQUENCE, return the first insn
3094 insn = NEXT_INSN (insn);
3095 if (insn && GET_CODE (insn) == INSN
3096 && GET_CODE (PATTERN (insn)) == SEQUENCE)
3097 insn = XVECEXP (PATTERN (insn), 0, 0);
3103 /* Return the previous insn. If it is a SEQUENCE, return the last insn
3107 previous_insn (insn)
3112 insn = PREV_INSN (insn);
3113 if (insn && GET_CODE (insn) == INSN
3114 && GET_CODE (PATTERN (insn)) == SEQUENCE)
3115 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
3121 /* Return the next insn after INSN that is not a NOTE. This routine does not
3122 look inside SEQUENCEs. */
3125 next_nonnote_insn (insn)
3130 insn = NEXT_INSN (insn);
3131 if (insn == 0 || GET_CODE (insn) != NOTE)
3138 /* Return the previous insn before INSN that is not a NOTE. This routine does
3139 not look inside SEQUENCEs. */
3142 prev_nonnote_insn (insn)
3147 insn = PREV_INSN (insn);
3148 if (insn == 0 || GET_CODE (insn) != NOTE)
3155 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
3156 or 0, if there is none. This routine does not look inside
3160 next_real_insn (insn)
3165 insn = NEXT_INSN (insn);
3166 if (insn == 0 || GET_CODE (insn) == INSN
3167 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
3174 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
3175 or 0, if there is none. This routine does not look inside
3179 prev_real_insn (insn)
3184 insn = PREV_INSN (insn);
3185 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
3186 || GET_CODE (insn) == JUMP_INSN)
3193 /* Return the last CALL_INSN in the current list, or 0 if there is none.
3194 This routine does not look inside SEQUENCEs. */
3201 for (insn = get_last_insn ();
3202 insn && GET_CODE (insn) != CALL_INSN;
3203 insn = PREV_INSN (insn))
3209 /* Find the next insn after INSN that really does something. This routine
3210 does not look inside SEQUENCEs. Until reload has completed, this is the
3211 same as next_real_insn. */
3214 active_insn_p (insn)
3217 return (GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
3218 || (GET_CODE (insn) == INSN
3219 && (! reload_completed
3220 || (GET_CODE (PATTERN (insn)) != USE
3221 && GET_CODE (PATTERN (insn)) != CLOBBER))));
3225 next_active_insn (insn)
3230 insn = NEXT_INSN (insn);
3231 if (insn == 0 || active_insn_p (insn))
3238 /* Find the last insn before INSN that really does something. This routine
3239 does not look inside SEQUENCEs. Until reload has completed, this is the
3240 same as prev_real_insn. */
3243 prev_active_insn (insn)
3248 insn = PREV_INSN (insn);
3249 if (insn == 0 || active_insn_p (insn))
3256 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
3264 insn = NEXT_INSN (insn);
3265 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
3272 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
3280 insn = PREV_INSN (insn);
3281 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
3289 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3290 and REG_CC_USER notes so we can find it. */
3293 link_cc0_insns (insn)
3296 rtx user = next_nonnote_insn (insn);
3298 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
3299 user = XVECEXP (PATTERN (user), 0, 0);
3301 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn,
3303 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
3306 /* Return the next insn that uses CC0 after INSN, which is assumed to
3307 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3308 applied to the result of this function should yield INSN).
3310 Normally, this is simply the next insn. However, if a REG_CC_USER note
3311 is present, it contains the insn that uses CC0.
3313 Return 0 if we can't find the insn. */
3316 next_cc0_user (insn)
3319 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
3322 return XEXP (note, 0);
3324 insn = next_nonnote_insn (insn);
3325 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
3326 insn = XVECEXP (PATTERN (insn), 0, 0);
3328 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
3334 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3335 note, it is the previous insn. */
3338 prev_cc0_setter (insn)
3341 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
3344 return XEXP (note, 0);
3346 insn = prev_nonnote_insn (insn);
3347 if (! sets_cc0_p (PATTERN (insn)))
3354 /* Increment the label uses for all labels present in rtx. */
3357 mark_label_nuses (x)
3364 code = GET_CODE (x);
3365 if (code == LABEL_REF)
3366 LABEL_NUSES (XEXP (x, 0))++;
3368 fmt = GET_RTX_FORMAT (code);
3369 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3372 mark_label_nuses (XEXP (x, i));
3373 else if (fmt[i] == 'E')
3374 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3375 mark_label_nuses (XVECEXP (x, i, j));
3380 /* Try splitting insns that can be split for better scheduling.
3381 PAT is the pattern which might split.
3382 TRIAL is the insn providing PAT.
3383 LAST is nonzero if we should return the last insn of the sequence produced.
3385 If this routine succeeds in splitting, it returns the first or last
3386 replacement insn depending on the value of LAST. Otherwise, it
3387 returns TRIAL. If the insn to be returned can be split, it will be. */
3390 try_split (pat, trial, last)
3394 rtx before = PREV_INSN (trial);
3395 rtx after = NEXT_INSN (trial);
3396 int has_barrier = 0;
3400 rtx insn_last, insn;
3403 if (any_condjump_p (trial)
3404 && (note = find_reg_note (trial, REG_BR_PROB, 0)))
3405 split_branch_probability = INTVAL (XEXP (note, 0));
3406 probability = split_branch_probability;
3408 seq = split_insns (pat, trial);
3410 split_branch_probability = -1;
3412 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3413 We may need to handle this specially. */
3414 if (after && GET_CODE (after) == BARRIER)
3417 after = NEXT_INSN (after);
3423 /* Avoid infinite loop if any insn of the result matches
3424 the original pattern. */
3428 if (INSN_P (insn_last)
3429 && rtx_equal_p (PATTERN (insn_last), pat))
3431 if (!NEXT_INSN (insn_last))
3433 insn_last = NEXT_INSN (insn_last);
3437 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3439 if (GET_CODE (insn) == JUMP_INSN)
3441 mark_jump_label (PATTERN (insn), insn, 0);
3443 if (probability != -1
3444 && any_condjump_p (insn)
3445 && !find_reg_note (insn, REG_BR_PROB, 0))
3447 /* We can preserve the REG_BR_PROB notes only if exactly
3448 one jump is created, otherwise the machine description
3449 is responsible for this step using
3450 split_branch_probability variable. */
3454 = gen_rtx_EXPR_LIST (REG_BR_PROB,
3455 GEN_INT (probability),
3461 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3462 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3463 if (GET_CODE (trial) == CALL_INSN)
3465 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3466 if (GET_CODE (insn) == CALL_INSN)
3468 CALL_INSN_FUNCTION_USAGE (insn)
3469 = CALL_INSN_FUNCTION_USAGE (trial);
3470 SIBLING_CALL_P (insn) = SIBLING_CALL_P (trial);
3474 /* Copy notes, particularly those related to the CFG. */
3475 for (note = REG_NOTES (trial); note; note = XEXP (note, 1))
3477 switch (REG_NOTE_KIND (note))
3481 while (insn != NULL_RTX)
3483 if (GET_CODE (insn) == CALL_INSN
3484 || (flag_non_call_exceptions
3485 && may_trap_p (PATTERN (insn))))
3487 = gen_rtx_EXPR_LIST (REG_EH_REGION,
3490 insn = PREV_INSN (insn);
3496 case REG_ALWAYS_RETURN:
3498 while (insn != NULL_RTX)
3500 if (GET_CODE (insn) == CALL_INSN)
3502 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3505 insn = PREV_INSN (insn);
3509 case REG_NON_LOCAL_GOTO:
3511 while (insn != NULL_RTX)
3513 if (GET_CODE (insn) == JUMP_INSN)
3515 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3518 insn = PREV_INSN (insn);
3527 /* If there are LABELS inside the split insns increment the
3528 usage count so we don't delete the label. */
3529 if (GET_CODE (trial) == INSN)
3532 while (insn != NULL_RTX)
3534 if (GET_CODE (insn) == INSN)
3535 mark_label_nuses (PATTERN (insn));
3537 insn = PREV_INSN (insn);
3541 tem = emit_insn_after_scope (seq, trial, INSN_SCOPE (trial));
3543 delete_insn (trial);
3545 emit_barrier_after (tem);
3547 /* Recursively call try_split for each new insn created; by the
3548 time control returns here that insn will be fully split, so
3549 set LAST and continue from the insn after the one returned.
3550 We can't use next_active_insn here since AFTER may be a note.
3551 Ignore deleted insns, which can be occur if not optimizing. */
3552 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
3553 if (! INSN_DELETED_P (tem) && INSN_P (tem))
3554 tem = try_split (PATTERN (tem), tem, 1);
3556 /* Return either the first or the last insn, depending on which was
3559 ? (after ? PREV_INSN (after) : last_insn)
3560 : NEXT_INSN (before);
3563 /* Make and return an INSN rtx, initializing all its slots.
3564 Store PATTERN in the pattern slots. */
3567 make_insn_raw (pattern)
3572 insn = rtx_alloc (INSN);
3574 INSN_UID (insn) = cur_insn_uid++;
3575 PATTERN (insn) = pattern;
3576 INSN_CODE (insn) = -1;
3577 LOG_LINKS (insn) = NULL;
3578 REG_NOTES (insn) = NULL;
3579 INSN_SCOPE (insn) = NULL;
3580 BLOCK_FOR_INSN (insn) = NULL;
3582 #ifdef ENABLE_RTL_CHECKING
3585 && (returnjump_p (insn)
3586 || (GET_CODE (insn) == SET
3587 && SET_DEST (insn) == pc_rtx)))
3589 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
3597 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3600 make_jump_insn_raw (pattern)
3605 insn = rtx_alloc (JUMP_INSN);
3606 INSN_UID (insn) = cur_insn_uid++;
3608 PATTERN (insn) = pattern;
3609 INSN_CODE (insn) = -1;
3610 LOG_LINKS (insn) = NULL;
3611 REG_NOTES (insn) = NULL;
3612 JUMP_LABEL (insn) = NULL;
3613 INSN_SCOPE (insn) = NULL;
3614 BLOCK_FOR_INSN (insn) = NULL;
3619 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3622 make_call_insn_raw (pattern)
3627 insn = rtx_alloc (CALL_INSN);
3628 INSN_UID (insn) = cur_insn_uid++;
3630 PATTERN (insn) = pattern;
3631 INSN_CODE (insn) = -1;
3632 LOG_LINKS (insn) = NULL;
3633 REG_NOTES (insn) = NULL;
3634 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
3635 INSN_SCOPE (insn) = NULL;
3636 BLOCK_FOR_INSN (insn) = NULL;
3641 /* Add INSN to the end of the doubly-linked list.
3642 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3648 PREV_INSN (insn) = last_insn;
3649 NEXT_INSN (insn) = 0;
3651 if (NULL != last_insn)
3652 NEXT_INSN (last_insn) = insn;
3654 if (NULL == first_insn)
3660 /* Add INSN into the doubly-linked list after insn AFTER. This and
3661 the next should be the only functions called to insert an insn once
3662 delay slots have been filled since only they know how to update a
3666 add_insn_after (insn, after)
3669 rtx next = NEXT_INSN (after);
3672 if (optimize && INSN_DELETED_P (after))
3675 NEXT_INSN (insn) = next;
3676 PREV_INSN (insn) = after;
3680 PREV_INSN (next) = insn;
3681 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3682 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
3684 else if (last_insn == after)
3688 struct sequence_stack *stack = seq_stack;
3689 /* Scan all pending sequences too. */
3690 for (; stack; stack = stack->next)
3691 if (after == stack->last)
3701 if (GET_CODE (after) != BARRIER
3702 && GET_CODE (insn) != BARRIER
3703 && (bb = BLOCK_FOR_INSN (after)))
3705 set_block_for_insn (insn, bb);
3707 bb->flags |= BB_DIRTY;
3708 /* Should not happen as first in the BB is always
3709 either NOTE or LABEL. */
3710 if (bb->end == after
3711 /* Avoid clobbering of structure when creating new BB. */
3712 && GET_CODE (insn) != BARRIER
3713 && (GET_CODE (insn) != NOTE
3714 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3718 NEXT_INSN (after) = insn;
3719 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
3721 rtx sequence = PATTERN (after);
3722 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3726 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3727 the previous should be the only functions called to insert an insn once
3728 delay slots have been filled since only they know how to update a
3732 add_insn_before (insn, before)
3735 rtx prev = PREV_INSN (before);
3738 if (optimize && INSN_DELETED_P (before))
3741 PREV_INSN (insn) = prev;
3742 NEXT_INSN (insn) = before;
3746 NEXT_INSN (prev) = insn;
3747 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3749 rtx sequence = PATTERN (prev);
3750 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3753 else if (first_insn == before)
3757 struct sequence_stack *stack = seq_stack;
3758 /* Scan all pending sequences too. */
3759 for (; stack; stack = stack->next)
3760 if (before == stack->first)
3762 stack->first = insn;
3770 if (GET_CODE (before) != BARRIER
3771 && GET_CODE (insn) != BARRIER
3772 && (bb = BLOCK_FOR_INSN (before)))
3774 set_block_for_insn (insn, bb);
3776 bb->flags |= BB_DIRTY;
3777 /* Should not happen as first in the BB is always
3778 either NOTE or LABEl. */
3779 if (bb->head == insn
3780 /* Avoid clobbering of structure when creating new BB. */
3781 && GET_CODE (insn) != BARRIER
3782 && (GET_CODE (insn) != NOTE
3783 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3787 PREV_INSN (before) = insn;
3788 if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE)
3789 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
3792 /* Remove an insn from its doubly-linked list. This function knows how
3793 to handle sequences. */
3798 rtx next = NEXT_INSN (insn);
3799 rtx prev = PREV_INSN (insn);
3804 NEXT_INSN (prev) = next;
3805 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3807 rtx sequence = PATTERN (prev);
3808 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
3811 else if (first_insn == insn)
3815 struct sequence_stack *stack = seq_stack;
3816 /* Scan all pending sequences too. */
3817 for (; stack; stack = stack->next)
3818 if (insn == stack->first)
3820 stack->first = next;
3830 PREV_INSN (next) = prev;
3831 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3832 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
3834 else if (last_insn == insn)
3838 struct sequence_stack *stack = seq_stack;
3839 /* Scan all pending sequences too. */
3840 for (; stack; stack = stack->next)
3841 if (insn == stack->last)
3850 if (GET_CODE (insn) != BARRIER
3851 && (bb = BLOCK_FOR_INSN (insn)))
3854 bb->flags |= BB_DIRTY;
3855 if (bb->head == insn)
3857 /* Never ever delete the basic block note without deleting whole
3859 if (GET_CODE (insn) == NOTE)
3863 if (bb->end == insn)
3868 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
3871 add_function_usage_to (call_insn, call_fusage)
3872 rtx call_insn, call_fusage;
3874 if (! call_insn || GET_CODE (call_insn) != CALL_INSN)
3877 /* Put the register usage information on the CALL. If there is already
3878 some usage information, put ours at the end. */
3879 if (CALL_INSN_FUNCTION_USAGE (call_insn))
3883 for (link = CALL_INSN_FUNCTION_USAGE (call_insn); XEXP (link, 1) != 0;
3884 link = XEXP (link, 1))
3887 XEXP (link, 1) = call_fusage;
3890 CALL_INSN_FUNCTION_USAGE (call_insn) = call_fusage;
3893 /* Delete all insns made since FROM.
3894 FROM becomes the new last instruction. */
3897 delete_insns_since (from)
3903 NEXT_INSN (from) = 0;
3907 /* This function is deprecated, please use sequences instead.
3909 Move a consecutive bunch of insns to a different place in the chain.
3910 The insns to be moved are those between FROM and TO.
3911 They are moved to a new position after the insn AFTER.
3912 AFTER must not be FROM or TO or any insn in between.
3914 This function does not know about SEQUENCEs and hence should not be
3915 called after delay-slot filling has been done. */
3918 reorder_insns_nobb (from, to, after)
3919 rtx from, to, after;
3921 /* Splice this bunch out of where it is now. */
3922 if (PREV_INSN (from))
3923 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
3925 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
3926 if (last_insn == to)
3927 last_insn = PREV_INSN (from);
3928 if (first_insn == from)
3929 first_insn = NEXT_INSN (to);
3931 /* Make the new neighbors point to it and it to them. */
3932 if (NEXT_INSN (after))
3933 PREV_INSN (NEXT_INSN (after)) = to;
3935 NEXT_INSN (to) = NEXT_INSN (after);
3936 PREV_INSN (from) = after;
3937 NEXT_INSN (after) = from;
3938 if (after == last_insn)
3942 /* Same as function above, but take care to update BB boundaries. */
3944 reorder_insns (from, to, after)
3945 rtx from, to, after;
3947 rtx prev = PREV_INSN (from);
3948 basic_block bb, bb2;
3950 reorder_insns_nobb (from, to, after);
3952 if (GET_CODE (after) != BARRIER
3953 && (bb = BLOCK_FOR_INSN (after)))
3956 bb->flags |= BB_DIRTY;
3958 if (GET_CODE (from) != BARRIER
3959 && (bb2 = BLOCK_FOR_INSN (from)))
3963 bb2->flags |= BB_DIRTY;
3966 if (bb->end == after)
3969 for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
3970 set_block_for_insn (x, bb);
3974 /* Return the line note insn preceding INSN. */
3977 find_line_note (insn)
3980 if (no_line_numbers)
3983 for (; insn; insn = PREV_INSN (insn))
3984 if (GET_CODE (insn) == NOTE
3985 && NOTE_LINE_NUMBER (insn) >= 0)
3991 /* Like reorder_insns, but inserts line notes to preserve the line numbers
3992 of the moved insns when debugging. This may insert a note between AFTER
3993 and FROM, and another one after TO. */
3996 reorder_insns_with_line_notes (from, to, after)
3997 rtx from, to, after;
3999 rtx from_line = find_line_note (from);
4000 rtx after_line = find_line_note (after);
4002 reorder_insns (from, to, after);
4004 if (from_line == after_line)
4008 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
4009 NOTE_LINE_NUMBER (from_line),
4012 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
4013 NOTE_LINE_NUMBER (after_line),
4017 /* Remove unnecessary notes from the instruction stream. */
4020 remove_unnecessary_notes ()
4022 rtx block_stack = NULL_RTX;
4023 rtx eh_stack = NULL_RTX;
4028 /* We must not remove the first instruction in the function because
4029 the compiler depends on the first instruction being a note. */
4030 for (insn = NEXT_INSN (get_insns ()); insn; insn = next)
4032 /* Remember what's next. */
4033 next = NEXT_INSN (insn);
4035 /* We're only interested in notes. */
4036 if (GET_CODE (insn) != NOTE)
4039 switch (NOTE_LINE_NUMBER (insn))
4041 case NOTE_INSN_DELETED:
4042 case NOTE_INSN_LOOP_END_TOP_COND:
4046 case NOTE_INSN_EH_REGION_BEG:
4047 eh_stack = alloc_INSN_LIST (insn, eh_stack);
4050 case NOTE_INSN_EH_REGION_END:
4051 /* Too many end notes. */
4052 if (eh_stack == NULL_RTX)
4054 /* Mismatched nesting. */
4055 if (NOTE_EH_HANDLER (XEXP (eh_stack, 0)) != NOTE_EH_HANDLER (insn))
4058 eh_stack = XEXP (eh_stack, 1);
4059 free_INSN_LIST_node (tmp);
4062 case NOTE_INSN_BLOCK_BEG:
4063 /* By now, all notes indicating lexical blocks should have
4064 NOTE_BLOCK filled in. */
4065 if (NOTE_BLOCK (insn) == NULL_TREE)
4067 block_stack = alloc_INSN_LIST (insn, block_stack);
4070 case NOTE_INSN_BLOCK_END:
4071 /* Too many end notes. */
4072 if (block_stack == NULL_RTX)
4074 /* Mismatched nesting. */
4075 if (NOTE_BLOCK (XEXP (block_stack, 0)) != NOTE_BLOCK (insn))
4078 block_stack = XEXP (block_stack, 1);
4079 free_INSN_LIST_node (tmp);
4081 /* Scan back to see if there are any non-note instructions
4082 between INSN and the beginning of this block. If not,
4083 then there is no PC range in the generated code that will
4084 actually be in this block, so there's no point in
4085 remembering the existence of the block. */
4086 for (tmp = PREV_INSN (insn); tmp; tmp = PREV_INSN (tmp))
4088 /* This block contains a real instruction. Note that we
4089 don't include labels; if the only thing in the block
4090 is a label, then there are still no PC values that
4091 lie within the block. */
4095 /* We're only interested in NOTEs. */
4096 if (GET_CODE (tmp) != NOTE)
4099 if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_BEG)
4101 /* We just verified that this BLOCK matches us with
4102 the block_stack check above. Never delete the
4103 BLOCK for the outermost scope of the function; we
4104 can refer to names from that scope even if the
4105 block notes are messed up. */
4106 if (! is_body_block (NOTE_BLOCK (insn))
4107 && (*debug_hooks->ignore_block) (NOTE_BLOCK (insn)))
4114 else if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_END)
4115 /* There's a nested block. We need to leave the
4116 current block in place since otherwise the debugger
4117 wouldn't be able to show symbols from our block in
4118 the nested block. */
4124 /* Too many begin notes. */
4125 if (block_stack || eh_stack)
4130 /* Emit insn(s) of given code and pattern
4131 at a specified place within the doubly-linked list.
4133 All of the emit_foo global entry points accept an object
4134 X which is either an insn list or a PATTERN of a single
4137 There are thus a few canonical ways to generate code and
4138 emit it at a specific place in the instruction stream. For
4139 example, consider the instruction named SPOT and the fact that
4140 we would like to emit some instructions before SPOT. We might
4144 ... emit the new instructions ...
4145 insns_head = get_insns ();
4148 emit_insn_before (insns_head, SPOT);
4150 It used to be common to generate SEQUENCE rtl instead, but that
4151 is a relic of the past which no longer occurs. The reason is that
4152 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
4153 generated would almost certainly die right after it was created. */
4155 /* Make X be output before the instruction BEFORE. */
4158 emit_insn_before (x, before)
4164 #ifdef ENABLE_RTL_CHECKING
4165 if (before == NULL_RTX)
4172 switch (GET_CODE (x))
4183 rtx next = NEXT_INSN (insn);
4184 add_insn_before (insn, before);
4190 #ifdef ENABLE_RTL_CHECKING
4197 last = make_insn_raw (x);
4198 add_insn_before (last, before);
4205 /* Make an instruction with body X and code JUMP_INSN
4206 and output it before the instruction BEFORE. */
4209 emit_jump_insn_before (x, before)
4212 rtx insn, last = NULL_RTX;
4214 #ifdef ENABLE_RTL_CHECKING
4215 if (before == NULL_RTX)
4219 switch (GET_CODE (x))
4230 rtx next = NEXT_INSN (insn);
4231 add_insn_before (insn, before);
4237 #ifdef ENABLE_RTL_CHECKING
4244 last = make_jump_insn_raw (x);
4245 add_insn_before (last, before);
4252 /* Make an instruction with body X and code CALL_INSN
4253 and output it before the instruction BEFORE. */
4256 emit_call_insn_before (x, before)
4259 rtx last = NULL_RTX, insn;
4261 #ifdef ENABLE_RTL_CHECKING
4262 if (before == NULL_RTX)
4266 switch (GET_CODE (x))
4277 rtx next = NEXT_INSN (insn);
4278 add_insn_before (insn, before);
4284 #ifdef ENABLE_RTL_CHECKING
4291 last = make_call_insn_raw (x);
4292 add_insn_before (last, before);
4299 /* Make an insn of code BARRIER
4300 and output it before the insn BEFORE. */
4303 emit_barrier_before (before)
4306 rtx insn = rtx_alloc (BARRIER);
4308 INSN_UID (insn) = cur_insn_uid++;
4310 add_insn_before (insn, before);
4314 /* Emit the label LABEL before the insn BEFORE. */
4317 emit_label_before (label, before)
4320 /* This can be called twice for the same label as a result of the
4321 confusion that follows a syntax error! So make it harmless. */
4322 if (INSN_UID (label) == 0)
4324 INSN_UID (label) = cur_insn_uid++;
4325 add_insn_before (label, before);
4331 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4334 emit_note_before (subtype, before)
4338 rtx note = rtx_alloc (NOTE);
4339 INSN_UID (note) = cur_insn_uid++;
4340 NOTE_SOURCE_FILE (note) = 0;
4341 NOTE_LINE_NUMBER (note) = subtype;
4342 BLOCK_FOR_INSN (note) = NULL;
4344 add_insn_before (note, before);
4348 /* Helper for emit_insn_after, handles lists of instructions
4351 static rtx emit_insn_after_1 PARAMS ((rtx, rtx));
4354 emit_insn_after_1 (first, after)
4361 if (GET_CODE (after) != BARRIER
4362 && (bb = BLOCK_FOR_INSN (after)))
4364 bb->flags |= BB_DIRTY;
4365 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4366 if (GET_CODE (last) != BARRIER)
4367 set_block_for_insn (last, bb);
4368 if (GET_CODE (last) != BARRIER)
4369 set_block_for_insn (last, bb);
4370 if (bb->end == after)
4374 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4377 after_after = NEXT_INSN (after);
4379 NEXT_INSN (after) = first;
4380 PREV_INSN (first) = after;
4381 NEXT_INSN (last) = after_after;
4383 PREV_INSN (after_after) = last;
4385 if (after == last_insn)
4390 /* Make X be output after the insn AFTER. */
4393 emit_insn_after (x, after)
4398 #ifdef ENABLE_RTL_CHECKING
4399 if (after == NULL_RTX)
4406 switch (GET_CODE (x))
4414 last = emit_insn_after_1 (x, after);
4417 #ifdef ENABLE_RTL_CHECKING
4424 last = make_insn_raw (x);
4425 add_insn_after (last, after);
4432 /* Similar to emit_insn_after, except that line notes are to be inserted so
4433 as to act as if this insn were at FROM. */
4436 emit_insn_after_with_line_notes (x, after, from)
4439 rtx from_line = find_line_note (from);
4440 rtx after_line = find_line_note (after);
4441 rtx insn = emit_insn_after (x, after);
4444 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
4445 NOTE_LINE_NUMBER (from_line),
4449 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
4450 NOTE_LINE_NUMBER (after_line),
4454 /* Make an insn of code JUMP_INSN with body X
4455 and output it after the insn AFTER. */
4458 emit_jump_insn_after (x, after)
4463 #ifdef ENABLE_RTL_CHECKING
4464 if (after == NULL_RTX)
4468 switch (GET_CODE (x))
4476 last = emit_insn_after_1 (x, after);
4479 #ifdef ENABLE_RTL_CHECKING
4486 last = make_jump_insn_raw (x);
4487 add_insn_after (last, after);
4494 /* Make an instruction with body X and code CALL_INSN
4495 and output it after the instruction AFTER. */
4498 emit_call_insn_after (x, after)
4503 #ifdef ENABLE_RTL_CHECKING
4504 if (after == NULL_RTX)
4508 switch (GET_CODE (x))
4516 last = emit_insn_after_1 (x, after);
4519 #ifdef ENABLE_RTL_CHECKING
4526 last = make_call_insn_raw (x);
4527 add_insn_after (last, after);
4534 /* Make an insn of code BARRIER
4535 and output it after the insn AFTER. */
4538 emit_barrier_after (after)
4541 rtx insn = rtx_alloc (BARRIER);
4543 INSN_UID (insn) = cur_insn_uid++;
4545 add_insn_after (insn, after);
4549 /* Emit the label LABEL after the insn AFTER. */
4552 emit_label_after (label, after)
4555 /* This can be called twice for the same label
4556 as a result of the confusion that follows a syntax error!
4557 So make it harmless. */
4558 if (INSN_UID (label) == 0)
4560 INSN_UID (label) = cur_insn_uid++;
4561 add_insn_after (label, after);
4567 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4570 emit_note_after (subtype, after)
4574 rtx note = rtx_alloc (NOTE);
4575 INSN_UID (note) = cur_insn_uid++;
4576 NOTE_SOURCE_FILE (note) = 0;
4577 NOTE_LINE_NUMBER (note) = subtype;
4578 BLOCK_FOR_INSN (note) = NULL;
4579 add_insn_after (note, after);
4583 /* Emit a line note for FILE and LINE after the insn AFTER. */
4586 emit_line_note_after (file, line, after)
4593 if (no_line_numbers && line > 0)
4599 note = rtx_alloc (NOTE);
4600 INSN_UID (note) = cur_insn_uid++;
4601 NOTE_SOURCE_FILE (note) = file;
4602 NOTE_LINE_NUMBER (note) = line;
4603 BLOCK_FOR_INSN (note) = NULL;
4604 add_insn_after (note, after);
4608 /* Like emit_insn_after, but set INSN_SCOPE according to SCOPE. */
4610 emit_insn_after_scope (pattern, after, scope)
4614 rtx last = emit_insn_after (pattern, after);
4616 after = NEXT_INSN (after);
4619 if (active_insn_p (after))
4620 INSN_SCOPE (after) = scope;
4623 after = NEXT_INSN (after);
4628 /* Like emit_jump_insn_after, but set INSN_SCOPE according to SCOPE. */
4630 emit_jump_insn_after_scope (pattern, after, scope)
4634 rtx last = emit_jump_insn_after (pattern, after);
4636 after = NEXT_INSN (after);
4639 if (active_insn_p (after))
4640 INSN_SCOPE (after) = scope;
4643 after = NEXT_INSN (after);
4648 /* Like emit_call_insn_after, but set INSN_SCOPE according to SCOPE. */
4650 emit_call_insn_after_scope (pattern, after, scope)
4654 rtx last = emit_call_insn_after (pattern, after);
4656 after = NEXT_INSN (after);
4659 if (active_insn_p (after))
4660 INSN_SCOPE (after) = scope;
4663 after = NEXT_INSN (after);
4668 /* Like emit_insn_before, but set INSN_SCOPE according to SCOPE. */
4670 emit_insn_before_scope (pattern, before, scope)
4671 rtx pattern, before;
4674 rtx first = PREV_INSN (before);
4675 rtx last = emit_insn_before (pattern, before);
4677 first = NEXT_INSN (first);
4680 if (active_insn_p (first))
4681 INSN_SCOPE (first) = scope;
4684 first = NEXT_INSN (first);
4689 /* Take X and emit it at the end of the doubly-linked
4692 Returns the last insn emitted. */
4698 rtx last = last_insn;
4704 switch (GET_CODE (x))
4715 rtx next = NEXT_INSN (insn);
4722 #ifdef ENABLE_RTL_CHECKING
4729 last = make_insn_raw (x);
4737 /* Make an insn of code JUMP_INSN with pattern X
4738 and add it to the end of the doubly-linked list. */
4744 rtx last = NULL_RTX, insn;
4746 switch (GET_CODE (x))
4757 rtx next = NEXT_INSN (insn);
4764 #ifdef ENABLE_RTL_CHECKING
4771 last = make_jump_insn_raw (x);
4779 /* Make an insn of code CALL_INSN with pattern X
4780 and add it to the end of the doubly-linked list. */
4788 switch (GET_CODE (x))
4796 insn = emit_insn (x);
4799 #ifdef ENABLE_RTL_CHECKING
4806 insn = make_call_insn_raw (x);
4814 /* Add the label LABEL to the end of the doubly-linked list. */
4820 /* This can be called twice for the same label
4821 as a result of the confusion that follows a syntax error!
4822 So make it harmless. */
4823 if (INSN_UID (label) == 0)
4825 INSN_UID (label) = cur_insn_uid++;
4831 /* Make an insn of code BARRIER
4832 and add it to the end of the doubly-linked list. */
4837 rtx barrier = rtx_alloc (BARRIER);
4838 INSN_UID (barrier) = cur_insn_uid++;
4843 /* Make an insn of code NOTE
4844 with data-fields specified by FILE and LINE
4845 and add it to the end of the doubly-linked list,
4846 but only if line-numbers are desired for debugging info. */
4849 emit_line_note (file, line)
4853 set_file_and_line_for_stmt (file, line);
4856 if (no_line_numbers)
4860 return emit_note (file, line);
4863 /* Make an insn of code NOTE
4864 with data-fields specified by FILE and LINE
4865 and add it to the end of the doubly-linked list.
4866 If it is a line-number NOTE, omit it if it matches the previous one. */
4869 emit_note (file, line)
4877 if (file && last_filename && !strcmp (file, last_filename)
4878 && line == last_linenum)
4880 last_filename = file;
4881 last_linenum = line;
4884 if (no_line_numbers && line > 0)
4890 note = rtx_alloc (NOTE);
4891 INSN_UID (note) = cur_insn_uid++;
4892 NOTE_SOURCE_FILE (note) = file;
4893 NOTE_LINE_NUMBER (note) = line;
4894 BLOCK_FOR_INSN (note) = NULL;
4899 /* Emit a NOTE, and don't omit it even if LINE is the previous note. */
4902 emit_line_note_force (file, line)
4907 return emit_line_note (file, line);
4910 /* Cause next statement to emit a line note even if the line number
4911 has not changed. This is used at the beginning of a function. */
4914 force_next_line_note ()
4919 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4920 note of this type already exists, remove it first. */
4923 set_unique_reg_note (insn, kind, datum)
4928 rtx note = find_reg_note (insn, kind, NULL_RTX);
4934 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4935 has multiple sets (some callers assume single_set
4936 means the insn only has one set, when in fact it
4937 means the insn only has one * useful * set). */
4938 if (GET_CODE (PATTERN (insn)) == PARALLEL && multiple_sets (insn))
4945 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4946 It serves no useful purpose and breaks eliminate_regs. */
4947 if (GET_CODE (datum) == ASM_OPERANDS)
4957 XEXP (note, 0) = datum;
4961 REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn));
4962 return REG_NOTES (insn);
4965 /* Return an indication of which type of insn should have X as a body.
4966 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
4972 if (GET_CODE (x) == CODE_LABEL)
4974 if (GET_CODE (x) == CALL)
4976 if (GET_CODE (x) == RETURN)
4978 if (GET_CODE (x) == SET)
4980 if (SET_DEST (x) == pc_rtx)
4982 else if (GET_CODE (SET_SRC (x)) == CALL)
4987 if (GET_CODE (x) == PARALLEL)
4990 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
4991 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
4993 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4994 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
4996 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4997 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
5003 /* Emit the rtl pattern X as an appropriate kind of insn.
5004 If X is a label, it is simply added into the insn chain. */
5010 enum rtx_code code = classify_insn (x);
5012 if (code == CODE_LABEL)
5013 return emit_label (x);
5014 else if (code == INSN)
5015 return emit_insn (x);
5016 else if (code == JUMP_INSN)
5018 rtx insn = emit_jump_insn (x);
5019 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
5020 return emit_barrier ();
5023 else if (code == CALL_INSN)
5024 return emit_call_insn (x);
5029 /* Space for free sequence stack entries. */
5030 static GTY ((deletable (""))) struct sequence_stack *free_sequence_stack;
5032 /* Begin emitting insns to a sequence which can be packaged in an
5033 RTL_EXPR. If this sequence will contain something that might cause
5034 the compiler to pop arguments to function calls (because those
5035 pops have previously been deferred; see INHIBIT_DEFER_POP for more
5036 details), use do_pending_stack_adjust before calling this function.
5037 That will ensure that the deferred pops are not accidentally
5038 emitted in the middle of this sequence. */
5043 struct sequence_stack *tem;
5045 if (free_sequence_stack != NULL)
5047 tem = free_sequence_stack;
5048 free_sequence_stack = tem->next;
5051 tem = (struct sequence_stack *) ggc_alloc (sizeof (struct sequence_stack));
5053 tem->next = seq_stack;
5054 tem->first = first_insn;
5055 tem->last = last_insn;
5056 tem->sequence_rtl_expr = seq_rtl_expr;
5064 /* Similarly, but indicate that this sequence will be placed in T, an
5065 RTL_EXPR. See the documentation for start_sequence for more
5066 information about how to use this function. */
5069 start_sequence_for_rtl_expr (t)
5077 /* Set up the insn chain starting with FIRST as the current sequence,
5078 saving the previously current one. See the documentation for
5079 start_sequence for more information about how to use this function. */
5082 push_to_sequence (first)
5089 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
5095 /* Set up the insn chain from a chain stort in FIRST to LAST. */
5098 push_to_full_sequence (first, last)
5104 /* We really should have the end of the insn chain here. */
5105 if (last && NEXT_INSN (last))
5109 /* Set up the outer-level insn chain
5110 as the current sequence, saving the previously current one. */
5113 push_topmost_sequence ()
5115 struct sequence_stack *stack, *top = NULL;
5119 for (stack = seq_stack; stack; stack = stack->next)
5122 first_insn = top->first;
5123 last_insn = top->last;
5124 seq_rtl_expr = top->sequence_rtl_expr;
5127 /* After emitting to the outer-level insn chain, update the outer-level
5128 insn chain, and restore the previous saved state. */
5131 pop_topmost_sequence ()
5133 struct sequence_stack *stack, *top = NULL;
5135 for (stack = seq_stack; stack; stack = stack->next)
5138 top->first = first_insn;
5139 top->last = last_insn;
5140 /* ??? Why don't we save seq_rtl_expr here? */
5145 /* After emitting to a sequence, restore previous saved state.
5147 To get the contents of the sequence just made, you must call
5148 `get_insns' *before* calling here.
5150 If the compiler might have deferred popping arguments while
5151 generating this sequence, and this sequence will not be immediately
5152 inserted into the instruction stream, use do_pending_stack_adjust
5153 before calling get_insns. That will ensure that the deferred
5154 pops are inserted into this sequence, and not into some random
5155 location in the instruction stream. See INHIBIT_DEFER_POP for more
5156 information about deferred popping of arguments. */
5161 struct sequence_stack *tem = seq_stack;
5163 first_insn = tem->first;
5164 last_insn = tem->last;
5165 seq_rtl_expr = tem->sequence_rtl_expr;
5166 seq_stack = tem->next;
5168 memset (tem, 0, sizeof (*tem));
5169 tem->next = free_sequence_stack;
5170 free_sequence_stack = tem;
5173 /* This works like end_sequence, but records the old sequence in FIRST
5177 end_full_sequence (first, last)
5180 *first = first_insn;
5185 /* Return 1 if currently emitting into a sequence. */
5190 return seq_stack != 0;
5193 /* Put the various virtual registers into REGNO_REG_RTX. */
5196 init_virtual_regs (es)
5197 struct emit_status *es;
5199 rtx *ptr = es->x_regno_reg_rtx;
5200 ptr[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
5201 ptr[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
5202 ptr[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
5203 ptr[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
5204 ptr[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
5208 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
5209 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
5210 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
5211 static int copy_insn_n_scratches;
5213 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5214 copied an ASM_OPERANDS.
5215 In that case, it is the original input-operand vector. */
5216 static rtvec orig_asm_operands_vector;
5218 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5219 copied an ASM_OPERANDS.
5220 In that case, it is the copied input-operand vector. */
5221 static rtvec copy_asm_operands_vector;
5223 /* Likewise for the constraints vector. */
5224 static rtvec orig_asm_constraints_vector;
5225 static rtvec copy_asm_constraints_vector;
5227 /* Recursively create a new copy of an rtx for copy_insn.
5228 This function differs from copy_rtx in that it handles SCRATCHes and
5229 ASM_OPERANDs properly.
5230 Normally, this function is not used directly; use copy_insn as front end.
5231 However, you could first copy an insn pattern with copy_insn and then use
5232 this function afterwards to properly copy any REG_NOTEs containing
5242 const char *format_ptr;
5244 code = GET_CODE (orig);
5261 for (i = 0; i < copy_insn_n_scratches; i++)
5262 if (copy_insn_scratch_in[i] == orig)
5263 return copy_insn_scratch_out[i];
5267 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
5268 a LABEL_REF, it isn't sharable. */
5269 if (GET_CODE (XEXP (orig, 0)) == PLUS
5270 && GET_CODE (XEXP (XEXP (orig, 0), 0)) == SYMBOL_REF
5271 && GET_CODE (XEXP (XEXP (orig, 0), 1)) == CONST_INT)
5275 /* A MEM with a constant address is not sharable. The problem is that
5276 the constant address may need to be reloaded. If the mem is shared,
5277 then reloading one copy of this mem will cause all copies to appear
5278 to have been reloaded. */
5284 copy = rtx_alloc (code);
5286 /* Copy the various flags, and other information. We assume that
5287 all fields need copying, and then clear the fields that should
5288 not be copied. That is the sensible default behavior, and forces
5289 us to explicitly document why we are *not* copying a flag. */
5290 memcpy (copy, orig, sizeof (struct rtx_def) - sizeof (rtunion));
5292 /* We do not copy the USED flag, which is used as a mark bit during
5293 walks over the RTL. */
5294 RTX_FLAG (copy, used) = 0;
5296 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5297 if (GET_RTX_CLASS (code) == 'i')
5299 RTX_FLAG (copy, jump) = 0;
5300 RTX_FLAG (copy, call) = 0;
5301 RTX_FLAG (copy, frame_related) = 0;
5304 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
5306 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
5308 copy->fld[i] = orig->fld[i];
5309 switch (*format_ptr++)
5312 if (XEXP (orig, i) != NULL)
5313 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
5318 if (XVEC (orig, i) == orig_asm_constraints_vector)
5319 XVEC (copy, i) = copy_asm_constraints_vector;
5320 else if (XVEC (orig, i) == orig_asm_operands_vector)
5321 XVEC (copy, i) = copy_asm_operands_vector;
5322 else if (XVEC (orig, i) != NULL)
5324 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
5325 for (j = 0; j < XVECLEN (copy, i); j++)
5326 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
5337 /* These are left unchanged. */
5345 if (code == SCRATCH)
5347 i = copy_insn_n_scratches++;
5348 if (i >= MAX_RECOG_OPERANDS)
5350 copy_insn_scratch_in[i] = orig;
5351 copy_insn_scratch_out[i] = copy;
5353 else if (code == ASM_OPERANDS)
5355 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
5356 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
5357 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
5358 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
5364 /* Create a new copy of an rtx.
5365 This function differs from copy_rtx in that it handles SCRATCHes and
5366 ASM_OPERANDs properly.
5367 INSN doesn't really have to be a full INSN; it could be just the
5373 copy_insn_n_scratches = 0;
5374 orig_asm_operands_vector = 0;
5375 orig_asm_constraints_vector = 0;
5376 copy_asm_operands_vector = 0;
5377 copy_asm_constraints_vector = 0;
5378 return copy_insn_1 (insn);
5381 /* Initialize data structures and variables in this file
5382 before generating rtl for each function. */
5387 struct function *f = cfun;
5389 f->emit = (struct emit_status *) ggc_alloc (sizeof (struct emit_status));
5392 seq_rtl_expr = NULL;
5394 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
5397 first_label_num = label_num;
5401 /* Init the tables that describe all the pseudo regs. */
5403 f->emit->regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
5405 f->emit->regno_pointer_align
5406 = (unsigned char *) ggc_alloc_cleared (f->emit->regno_pointer_align_length
5407 * sizeof (unsigned char));
5410 = (rtx *) ggc_alloc (f->emit->regno_pointer_align_length * sizeof (rtx));
5412 /* Put copies of all the hard registers into regno_reg_rtx. */
5413 memcpy (regno_reg_rtx,
5414 static_regno_reg_rtx,
5415 FIRST_PSEUDO_REGISTER * sizeof (rtx));
5417 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5418 init_virtual_regs (f->emit);
5420 /* Indicate that the virtual registers and stack locations are
5422 REG_POINTER (stack_pointer_rtx) = 1;
5423 REG_POINTER (frame_pointer_rtx) = 1;
5424 REG_POINTER (hard_frame_pointer_rtx) = 1;
5425 REG_POINTER (arg_pointer_rtx) = 1;
5427 REG_POINTER (virtual_incoming_args_rtx) = 1;
5428 REG_POINTER (virtual_stack_vars_rtx) = 1;
5429 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
5430 REG_POINTER (virtual_outgoing_args_rtx) = 1;
5431 REG_POINTER (virtual_cfa_rtx) = 1;
5433 #ifdef STACK_BOUNDARY
5434 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
5435 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5436 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5437 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
5439 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
5440 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
5441 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
5442 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
5443 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
5446 #ifdef INIT_EXPANDERS
5451 /* Generate the constant 0. */
5454 gen_const_vector_0 (mode)
5455 enum machine_mode mode;
5460 enum machine_mode inner;
5462 units = GET_MODE_NUNITS (mode);
5463 inner = GET_MODE_INNER (mode);
5465 v = rtvec_alloc (units);
5467 /* We need to call this function after we to set CONST0_RTX first. */
5468 if (!CONST0_RTX (inner))
5471 for (i = 0; i < units; ++i)
5472 RTVEC_ELT (v, i) = CONST0_RTX (inner);
5474 tem = gen_rtx_raw_CONST_VECTOR (mode, v);
5478 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5479 all elements are zero. */
5481 gen_rtx_CONST_VECTOR (mode, v)
5482 enum machine_mode mode;
5485 rtx inner_zero = CONST0_RTX (GET_MODE_INNER (mode));
5488 for (i = GET_MODE_NUNITS (mode) - 1; i >= 0; i--)
5489 if (RTVEC_ELT (v, i) != inner_zero)
5490 return gen_rtx_raw_CONST_VECTOR (mode, v);
5491 return CONST0_RTX (mode);
5494 /* Create some permanent unique rtl objects shared between all functions.
5495 LINE_NUMBERS is nonzero if line numbers are to be generated. */
5498 init_emit_once (line_numbers)
5502 enum machine_mode mode;
5503 enum machine_mode double_mode;
5505 /* Initialize the CONST_INT, CONST_DOUBLE, and memory attribute hash
5507 const_int_htab = htab_create_ggc (37, const_int_htab_hash,
5508 const_int_htab_eq, NULL);
5510 const_double_htab = htab_create_ggc (37, const_double_htab_hash,
5511 const_double_htab_eq, NULL);
5513 mem_attrs_htab = htab_create_ggc (37, mem_attrs_htab_hash,
5514 mem_attrs_htab_eq, NULL);
5515 reg_attrs_htab = htab_create_ggc (37, reg_attrs_htab_hash,
5516 reg_attrs_htab_eq, NULL);
5518 no_line_numbers = ! line_numbers;
5520 /* Compute the word and byte modes. */
5522 byte_mode = VOIDmode;
5523 word_mode = VOIDmode;
5524 double_mode = VOIDmode;
5526 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
5527 mode = GET_MODE_WIDER_MODE (mode))
5529 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
5530 && byte_mode == VOIDmode)
5533 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
5534 && word_mode == VOIDmode)
5538 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
5539 mode = GET_MODE_WIDER_MODE (mode))
5541 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
5542 && double_mode == VOIDmode)
5546 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
5548 /* Assign register numbers to the globally defined register rtx.
5549 This must be done at runtime because the register number field
5550 is in a union and some compilers can't initialize unions. */
5552 pc_rtx = gen_rtx (PC, VOIDmode);
5553 cc0_rtx = gen_rtx (CC0, VOIDmode);
5554 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
5555 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
5556 if (hard_frame_pointer_rtx == 0)
5557 hard_frame_pointer_rtx = gen_raw_REG (Pmode,
5558 HARD_FRAME_POINTER_REGNUM);
5559 if (arg_pointer_rtx == 0)
5560 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
5561 virtual_incoming_args_rtx =
5562 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
5563 virtual_stack_vars_rtx =
5564 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
5565 virtual_stack_dynamic_rtx =
5566 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
5567 virtual_outgoing_args_rtx =
5568 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
5569 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
5571 /* Initialize RTL for commonly used hard registers. These are
5572 copied into regno_reg_rtx as we begin to compile each function. */
5573 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
5574 static_regno_reg_rtx[i] = gen_raw_REG (reg_raw_mode[i], i);
5576 #ifdef INIT_EXPANDERS
5577 /* This is to initialize {init|mark|free}_machine_status before the first
5578 call to push_function_context_to. This is needed by the Chill front
5579 end which calls push_function_context_to before the first call to
5580 init_function_start. */
5584 /* Create the unique rtx's for certain rtx codes and operand values. */
5586 /* Don't use gen_rtx here since gen_rtx in this case
5587 tries to use these variables. */
5588 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
5589 const_int_rtx[i + MAX_SAVED_CONST_INT] =
5590 gen_rtx_raw_CONST_INT (VOIDmode, (HOST_WIDE_INT) i);
5592 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
5593 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
5594 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
5596 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
5598 REAL_VALUE_FROM_INT (dconst0, 0, 0, double_mode);
5599 REAL_VALUE_FROM_INT (dconst1, 1, 0, double_mode);
5600 REAL_VALUE_FROM_INT (dconst2, 2, 0, double_mode);
5601 REAL_VALUE_FROM_INT (dconstm1, -1, -1, double_mode);
5602 REAL_VALUE_FROM_INT (dconstm2, -2, -1, double_mode);
5604 dconsthalf = dconst1;
5607 for (i = 0; i <= 2; i++)
5609 REAL_VALUE_TYPE *r =
5610 (i == 0 ? &dconst0 : i == 1 ? &dconst1 : &dconst2);
5612 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
5613 mode = GET_MODE_WIDER_MODE (mode))
5614 const_tiny_rtx[i][(int) mode] =
5615 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5617 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
5619 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
5620 mode = GET_MODE_WIDER_MODE (mode))
5621 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5623 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
5625 mode = GET_MODE_WIDER_MODE (mode))
5626 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5629 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
5631 mode = GET_MODE_WIDER_MODE (mode))
5632 const_tiny_rtx[0][(int) mode] = gen_const_vector_0 (mode);
5634 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
5636 mode = GET_MODE_WIDER_MODE (mode))
5637 const_tiny_rtx[0][(int) mode] = gen_const_vector_0 (mode);
5639 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
5640 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
5641 const_tiny_rtx[0][i] = const0_rtx;
5643 const_tiny_rtx[0][(int) BImode] = const0_rtx;
5644 if (STORE_FLAG_VALUE == 1)
5645 const_tiny_rtx[1][(int) BImode] = const1_rtx;
5647 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5648 return_address_pointer_rtx
5649 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
5653 struct_value_rtx = STRUCT_VALUE;
5655 struct_value_rtx = gen_rtx_REG (Pmode, STRUCT_VALUE_REGNUM);
5658 #ifdef STRUCT_VALUE_INCOMING
5659 struct_value_incoming_rtx = STRUCT_VALUE_INCOMING;
5661 #ifdef STRUCT_VALUE_INCOMING_REGNUM
5662 struct_value_incoming_rtx
5663 = gen_rtx_REG (Pmode, STRUCT_VALUE_INCOMING_REGNUM);
5665 struct_value_incoming_rtx = struct_value_rtx;
5669 #ifdef STATIC_CHAIN_REGNUM
5670 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
5672 #ifdef STATIC_CHAIN_INCOMING_REGNUM
5673 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
5674 static_chain_incoming_rtx
5675 = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
5678 static_chain_incoming_rtx = static_chain_rtx;
5682 static_chain_rtx = STATIC_CHAIN;
5684 #ifdef STATIC_CHAIN_INCOMING
5685 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
5687 static_chain_incoming_rtx = static_chain_rtx;
5691 if ((unsigned) PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
5692 pic_offset_table_rtx = gen_raw_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
5695 /* Query and clear/ restore no_line_numbers. This is used by the
5696 switch / case handling in stmt.c to give proper line numbers in
5697 warnings about unreachable code. */
5700 force_line_numbers ()
5702 int old = no_line_numbers;
5704 no_line_numbers = 0;
5706 force_next_line_note ();
5711 restore_line_number_status (old_value)
5714 no_line_numbers = old_value;
5717 /* Produce exact duplicate of insn INSN after AFTER.
5718 Care updating of libcall regions if present. */
5721 emit_copy_of_insn_after (insn, after)
5725 rtx note1, note2, link;
5727 switch (GET_CODE (insn))
5730 new = emit_insn_after (copy_insn (PATTERN (insn)), after);
5734 new = emit_jump_insn_after (copy_insn (PATTERN (insn)), after);
5738 new = emit_call_insn_after (copy_insn (PATTERN (insn)), after);
5739 if (CALL_INSN_FUNCTION_USAGE (insn))
5740 CALL_INSN_FUNCTION_USAGE (new)
5741 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn));
5742 SIBLING_CALL_P (new) = SIBLING_CALL_P (insn);
5743 CONST_OR_PURE_CALL_P (new) = CONST_OR_PURE_CALL_P (insn);
5750 /* Update LABEL_NUSES. */
5751 mark_jump_label (PATTERN (new), new, 0);
5753 INSN_SCOPE (new) = INSN_SCOPE (insn);
5755 /* Copy all REG_NOTES except REG_LABEL since mark_jump_label will
5757 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5758 if (REG_NOTE_KIND (link) != REG_LABEL)
5760 if (GET_CODE (link) == EXPR_LIST)
5762 = copy_insn_1 (gen_rtx_EXPR_LIST (REG_NOTE_KIND (link),
5767 = copy_insn_1 (gen_rtx_INSN_LIST (REG_NOTE_KIND (link),
5772 /* Fix the libcall sequences. */
5773 if ((note1 = find_reg_note (new, REG_RETVAL, NULL_RTX)) != NULL)
5776 while ((note2 = find_reg_note (p, REG_LIBCALL, NULL_RTX)) == NULL)
5778 XEXP (note1, 0) = p;
5779 XEXP (note2, 0) = new;
5781 INSN_CODE (new) = INSN_CODE (insn);
5785 #include "gt-emit-rtl.h"