1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains the functions `gen_rtx', `gen_reg_rtx'
26 and `gen_label_rtx' that are the usual ways of creating rtl
27 expressions for most purposes.
29 It also has the functions for creating insns and linking
30 them in the doubly-linked chain.
32 The patterns of the insns are created by machine-dependent
33 routines in insn-emit.c, which is generated automatically from
34 the machine description. These routines use `gen_rtx' to make
35 the individual rtx's of the pattern; what is machine dependent
36 is the kind of rtx's they make and what arguments they use. */
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
54 #include "basic-block.h"
57 #include "langhooks.h"
59 /* Commonly used modes. */
61 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
62 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
63 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
64 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
67 /* This is *not* reset after each function. It gives each CODE_LABEL
68 in the entire compilation a unique label number. */
70 static int label_num = 1;
72 /* Highest label number in current function.
73 Zero means use the value of label_num instead.
74 This is nonzero only when belatedly compiling an inline function. */
76 static int last_label_num;
78 /* Value label_num had when set_new_first_and_last_label_number was called.
79 If label_num has not changed since then, last_label_num is valid. */
81 static int base_label_num;
83 /* Nonzero means do not generate NOTEs for source line numbers. */
85 static int no_line_numbers;
87 /* Commonly used rtx's, so that we only need space for one copy.
88 These are initialized once for the entire compilation.
89 All of these are unique; no other rtx-object will be equal to any
92 rtx global_rtl[GR_MAX];
94 /* Commonly used RTL for hard registers. These objects are not necessarily
95 unique, so we allocate them separately from global_rtl. They are
96 initialized once per compilation unit, then copied into regno_reg_rtx
97 at the beginning of each function. */
98 static GTY(()) rtx static_regno_reg_rtx[FIRST_PSEUDO_REGISTER];
100 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
101 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
102 record a copy of const[012]_rtx. */
104 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
108 REAL_VALUE_TYPE dconst0;
109 REAL_VALUE_TYPE dconst1;
110 REAL_VALUE_TYPE dconst2;
111 REAL_VALUE_TYPE dconstm1;
113 /* All references to the following fixed hard registers go through
114 these unique rtl objects. On machines where the frame-pointer and
115 arg-pointer are the same register, they use the same unique object.
117 After register allocation, other rtl objects which used to be pseudo-regs
118 may be clobbered to refer to the frame-pointer register.
119 But references that were originally to the frame-pointer can be
120 distinguished from the others because they contain frame_pointer_rtx.
122 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
123 tricky: until register elimination has taken place hard_frame_pointer_rtx
124 should be used if it is being set, and frame_pointer_rtx otherwise. After
125 register elimination hard_frame_pointer_rtx should always be used.
126 On machines where the two registers are same (most) then these are the
129 In an inline procedure, the stack and frame pointer rtxs may not be
130 used for anything else. */
131 rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
132 rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
133 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
134 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
135 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
137 /* This is used to implement __builtin_return_address for some machines.
138 See for instance the MIPS port. */
139 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
141 /* We make one copy of (const_int C) where C is in
142 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
143 to save space during the compilation and simplify comparisons of
146 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
148 /* A hash table storing CONST_INTs whose absolute value is greater
149 than MAX_SAVED_CONST_INT. */
151 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
152 htab_t const_int_htab;
154 /* A hash table storing memory attribute structures. */
155 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs)))
156 htab_t mem_attrs_htab;
158 /* A hash table storing all CONST_DOUBLEs. */
159 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
160 htab_t const_double_htab;
162 #define first_insn (cfun->emit->x_first_insn)
163 #define last_insn (cfun->emit->x_last_insn)
164 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
165 #define last_linenum (cfun->emit->x_last_linenum)
166 #define last_filename (cfun->emit->x_last_filename)
167 #define first_label_num (cfun->emit->x_first_label_num)
169 static rtx make_jump_insn_raw PARAMS ((rtx));
170 static rtx make_call_insn_raw PARAMS ((rtx));
171 static rtx find_line_note PARAMS ((rtx));
172 static rtx change_address_1 PARAMS ((rtx, enum machine_mode, rtx,
174 static void unshare_all_rtl_1 PARAMS ((rtx));
175 static void unshare_all_decls PARAMS ((tree));
176 static void reset_used_decls PARAMS ((tree));
177 static void mark_label_nuses PARAMS ((rtx));
178 static hashval_t const_int_htab_hash PARAMS ((const void *));
179 static int const_int_htab_eq PARAMS ((const void *,
181 static hashval_t const_double_htab_hash PARAMS ((const void *));
182 static int const_double_htab_eq PARAMS ((const void *,
184 static rtx lookup_const_double PARAMS ((rtx));
185 static hashval_t mem_attrs_htab_hash PARAMS ((const void *));
186 static int mem_attrs_htab_eq PARAMS ((const void *,
188 static mem_attrs *get_mem_attrs PARAMS ((HOST_WIDE_INT, tree, rtx,
191 static tree component_ref_for_mem_expr PARAMS ((tree));
192 static rtx gen_const_vector_0 PARAMS ((enum machine_mode));
194 /* Probability of the conditional branch currently proceeded by try_split.
195 Set to -1 otherwise. */
196 int split_branch_probability = -1;
198 /* Returns a hash code for X (which is a really a CONST_INT). */
201 const_int_htab_hash (x)
204 return (hashval_t) INTVAL ((struct rtx_def *) x);
207 /* Returns non-zero if the value represented by X (which is really a
208 CONST_INT) is the same as that given by Y (which is really a
212 const_int_htab_eq (x, y)
216 return (INTVAL ((rtx) x) == *((const HOST_WIDE_INT *) y));
219 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
221 const_double_htab_hash (x)
228 for (i = 0; i < sizeof(CONST_DOUBLE_FORMAT)-1; i++)
229 h ^= XWINT (value, i);
233 /* Returns non-zero if the value represented by X (really a ...)
234 is the same as that represented by Y (really a ...) */
236 const_double_htab_eq (x, y)
240 rtx a = (rtx)x, b = (rtx)y;
243 if (GET_MODE (a) != GET_MODE (b))
245 for (i = 0; i < sizeof(CONST_DOUBLE_FORMAT)-1; i++)
246 if (XWINT (a, i) != XWINT (b, i))
252 /* Returns a hash code for X (which is a really a mem_attrs *). */
255 mem_attrs_htab_hash (x)
258 mem_attrs *p = (mem_attrs *) x;
260 return (p->alias ^ (p->align * 1000)
261 ^ ((p->offset ? INTVAL (p->offset) : 0) * 50000)
262 ^ ((p->size ? INTVAL (p->size) : 0) * 2500000)
266 /* Returns non-zero if the value represented by X (which is really a
267 mem_attrs *) is the same as that given by Y (which is also really a
271 mem_attrs_htab_eq (x, y)
275 mem_attrs *p = (mem_attrs *) x;
276 mem_attrs *q = (mem_attrs *) y;
278 return (p->alias == q->alias && p->expr == q->expr && p->offset == q->offset
279 && p->size == q->size && p->align == q->align);
282 /* Allocate a new mem_attrs structure and insert it into the hash table if
283 one identical to it is not already in the table. We are doing this for
287 get_mem_attrs (alias, expr, offset, size, align, mode)
293 enum machine_mode mode;
298 /* If everything is the default, we can just return zero. */
299 if (alias == 0 && expr == 0 && offset == 0
301 || (mode != BLKmode && GET_MODE_SIZE (mode) == INTVAL (size)))
302 && (align == BITS_PER_UNIT
304 && mode != BLKmode && align == GET_MODE_ALIGNMENT (mode))))
309 attrs.offset = offset;
313 slot = htab_find_slot (mem_attrs_htab, &attrs, INSERT);
316 *slot = ggc_alloc (sizeof (mem_attrs));
317 memcpy (*slot, &attrs, sizeof (mem_attrs));
323 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
324 don't attempt to share with the various global pieces of rtl (such as
325 frame_pointer_rtx). */
328 gen_raw_REG (mode, regno)
329 enum machine_mode mode;
332 rtx x = gen_rtx_raw_REG (mode, regno);
333 ORIGINAL_REGNO (x) = regno;
337 /* There are some RTL codes that require special attention; the generation
338 functions do the raw handling. If you add to this list, modify
339 special_rtx in gengenrtl.c as well. */
342 gen_rtx_CONST_INT (mode, arg)
343 enum machine_mode mode ATTRIBUTE_UNUSED;
348 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
349 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
351 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
352 if (const_true_rtx && arg == STORE_FLAG_VALUE)
353 return const_true_rtx;
356 /* Look up the CONST_INT in the hash table. */
357 slot = htab_find_slot_with_hash (const_int_htab, &arg,
358 (hashval_t) arg, INSERT);
360 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
366 gen_int_mode (c, mode)
368 enum machine_mode mode;
370 return GEN_INT (trunc_int_for_mode (c, mode));
373 /* CONST_DOUBLEs might be created from pairs of integers, or from
374 REAL_VALUE_TYPEs. Also, their length is known only at run time,
375 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
377 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
378 hash table. If so, return its counterpart; otherwise add it
379 to the hash table and return it. */
381 lookup_const_double (real)
384 void **slot = htab_find_slot (const_double_htab, real, INSERT);
391 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
392 VALUE in mode MODE. */
394 const_double_from_real_value (value, mode)
395 REAL_VALUE_TYPE value;
396 enum machine_mode mode;
398 rtx real = rtx_alloc (CONST_DOUBLE);
399 PUT_MODE (real, mode);
401 memcpy (&CONST_DOUBLE_LOW (real), &value, sizeof (REAL_VALUE_TYPE));
403 return lookup_const_double (real);
406 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
407 of ints: I0 is the low-order word and I1 is the high-order word.
408 Do not use this routine for non-integer modes; convert to
409 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
412 immed_double_const (i0, i1, mode)
413 HOST_WIDE_INT i0, i1;
414 enum machine_mode mode;
419 if (mode != VOIDmode)
422 if (GET_MODE_CLASS (mode) != MODE_INT
423 && GET_MODE_CLASS (mode) != MODE_PARTIAL_INT
424 /* We can get a 0 for an error mark. */
425 && GET_MODE_CLASS (mode) != MODE_VECTOR_INT
426 && GET_MODE_CLASS (mode) != MODE_VECTOR_FLOAT)
429 /* We clear out all bits that don't belong in MODE, unless they and
430 our sign bit are all one. So we get either a reasonable negative
431 value or a reasonable unsigned value for this mode. */
432 width = GET_MODE_BITSIZE (mode);
433 if (width < HOST_BITS_PER_WIDE_INT
434 && ((i0 & ((HOST_WIDE_INT) (-1) << (width - 1)))
435 != ((HOST_WIDE_INT) (-1) << (width - 1))))
436 i0 &= ((HOST_WIDE_INT) 1 << width) - 1, i1 = 0;
437 else if (width == HOST_BITS_PER_WIDE_INT
438 && ! (i1 == ~0 && i0 < 0))
440 else if (width > 2 * HOST_BITS_PER_WIDE_INT)
441 /* We cannot represent this value as a constant. */
444 /* If this would be an entire word for the target, but is not for
445 the host, then sign-extend on the host so that the number will
446 look the same way on the host that it would on the target.
448 For example, when building a 64 bit alpha hosted 32 bit sparc
449 targeted compiler, then we want the 32 bit unsigned value -1 to be
450 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
451 The latter confuses the sparc backend. */
453 if (width < HOST_BITS_PER_WIDE_INT
454 && (i0 & ((HOST_WIDE_INT) 1 << (width - 1))))
455 i0 |= ((HOST_WIDE_INT) (-1) << width);
457 /* If MODE fits within HOST_BITS_PER_WIDE_INT, always use a
460 ??? Strictly speaking, this is wrong if we create a CONST_INT for
461 a large unsigned constant with the size of MODE being
462 HOST_BITS_PER_WIDE_INT and later try to interpret that constant
463 in a wider mode. In that case we will mis-interpret it as a
466 Unfortunately, the only alternative is to make a CONST_DOUBLE for
467 any constant in any mode if it is an unsigned constant larger
468 than the maximum signed integer in an int on the host. However,
469 doing this will break everyone that always expects to see a
470 CONST_INT for SImode and smaller.
472 We have always been making CONST_INTs in this case, so nothing
473 new is being broken. */
475 if (width <= HOST_BITS_PER_WIDE_INT)
476 i1 = (i0 < 0) ? ~(HOST_WIDE_INT) 0 : 0;
479 /* If this integer fits in one word, return a CONST_INT. */
480 if ((i1 == 0 && i0 >= 0) || (i1 == ~0 && i0 < 0))
483 /* We use VOIDmode for integers. */
484 value = rtx_alloc (CONST_DOUBLE);
485 PUT_MODE (value, VOIDmode);
487 CONST_DOUBLE_LOW (value) = i0;
488 CONST_DOUBLE_HIGH (value) = i1;
490 for (i = 2; i < (sizeof CONST_DOUBLE_FORMAT - 1); i++)
491 XWINT (value, i) = 0;
493 return lookup_const_double (value);
497 gen_rtx_REG (mode, regno)
498 enum machine_mode mode;
501 /* In case the MD file explicitly references the frame pointer, have
502 all such references point to the same frame pointer. This is
503 used during frame pointer elimination to distinguish the explicit
504 references to these registers from pseudos that happened to be
507 If we have eliminated the frame pointer or arg pointer, we will
508 be using it as a normal register, for example as a spill
509 register. In such cases, we might be accessing it in a mode that
510 is not Pmode and therefore cannot use the pre-allocated rtx.
512 Also don't do this when we are making new REGs in reload, since
513 we don't want to get confused with the real pointers. */
515 if (mode == Pmode && !reload_in_progress)
517 if (regno == FRAME_POINTER_REGNUM
518 && (!reload_completed || frame_pointer_needed))
519 return frame_pointer_rtx;
520 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
521 if (regno == HARD_FRAME_POINTER_REGNUM
522 && (!reload_completed || frame_pointer_needed))
523 return hard_frame_pointer_rtx;
525 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
526 if (regno == ARG_POINTER_REGNUM)
527 return arg_pointer_rtx;
529 #ifdef RETURN_ADDRESS_POINTER_REGNUM
530 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
531 return return_address_pointer_rtx;
533 if (regno == PIC_OFFSET_TABLE_REGNUM
534 && fixed_regs[PIC_OFFSET_TABLE_REGNUM])
535 return pic_offset_table_rtx;
536 if (regno == STACK_POINTER_REGNUM)
537 return stack_pointer_rtx;
541 /* If the per-function register table has been set up, try to re-use
542 an existing entry in that table to avoid useless generation of RTL.
544 This code is disabled for now until we can fix the various backends
545 which depend on having non-shared hard registers in some cases. Long
546 term we want to re-enable this code as it can significantly cut down
547 on the amount of useless RTL that gets generated.
549 We'll also need to fix some code that runs after reload that wants to
550 set ORIGINAL_REGNO. */
555 && regno < FIRST_PSEUDO_REGISTER
556 && reg_raw_mode[regno] == mode)
557 return regno_reg_rtx[regno];
560 return gen_raw_REG (mode, regno);
564 gen_rtx_MEM (mode, addr)
565 enum machine_mode mode;
568 rtx rt = gen_rtx_raw_MEM (mode, addr);
570 /* This field is not cleared by the mere allocation of the rtx, so
578 gen_rtx_SUBREG (mode, reg, offset)
579 enum machine_mode mode;
583 /* This is the most common failure type.
584 Catch it early so we can see who does it. */
585 if ((offset % GET_MODE_SIZE (mode)) != 0)
588 /* This check isn't usable right now because combine will
589 throw arbitrary crap like a CALL into a SUBREG in
590 gen_lowpart_for_combine so we must just eat it. */
592 /* Check for this too. */
593 if (offset >= GET_MODE_SIZE (GET_MODE (reg)))
596 return gen_rtx_raw_SUBREG (mode, reg, offset);
599 /* Generate a SUBREG representing the least-significant part of REG if MODE
600 is smaller than mode of REG, otherwise paradoxical SUBREG. */
603 gen_lowpart_SUBREG (mode, reg)
604 enum machine_mode mode;
607 enum machine_mode inmode;
609 inmode = GET_MODE (reg);
610 if (inmode == VOIDmode)
612 return gen_rtx_SUBREG (mode, reg,
613 subreg_lowpart_offset (mode, inmode));
616 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
618 ** This routine generates an RTX of the size specified by
619 ** <code>, which is an RTX code. The RTX structure is initialized
620 ** from the arguments <element1> through <elementn>, which are
621 ** interpreted according to the specific RTX type's format. The
622 ** special machine mode associated with the rtx (if any) is specified
625 ** gen_rtx can be invoked in a way which resembles the lisp-like
626 ** rtx it will generate. For example, the following rtx structure:
628 ** (plus:QI (mem:QI (reg:SI 1))
629 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
631 ** ...would be generated by the following C code:
633 ** gen_rtx (PLUS, QImode,
634 ** gen_rtx (MEM, QImode,
635 ** gen_rtx (REG, SImode, 1)),
636 ** gen_rtx (MEM, QImode,
637 ** gen_rtx (PLUS, SImode,
638 ** gen_rtx (REG, SImode, 2),
639 ** gen_rtx (REG, SImode, 3)))),
644 gen_rtx VPARAMS ((enum rtx_code code, enum machine_mode mode, ...))
646 int i; /* Array indices... */
647 const char *fmt; /* Current rtx's format... */
648 rtx rt_val; /* RTX to return to caller... */
651 VA_FIXEDARG (p, enum rtx_code, code);
652 VA_FIXEDARG (p, enum machine_mode, mode);
657 rt_val = gen_rtx_CONST_INT (mode, va_arg (p, HOST_WIDE_INT));
662 HOST_WIDE_INT arg0 = va_arg (p, HOST_WIDE_INT);
663 HOST_WIDE_INT arg1 = va_arg (p, HOST_WIDE_INT);
665 rt_val = immed_double_const (arg0, arg1, mode);
670 rt_val = gen_rtx_REG (mode, va_arg (p, int));
674 rt_val = gen_rtx_MEM (mode, va_arg (p, rtx));
678 rt_val = rtx_alloc (code); /* Allocate the storage space. */
679 rt_val->mode = mode; /* Store the machine mode... */
681 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
682 for (i = 0; i < GET_RTX_LENGTH (code); i++)
686 case '0': /* Unused field. */
689 case 'i': /* An integer? */
690 XINT (rt_val, i) = va_arg (p, int);
693 case 'w': /* A wide integer? */
694 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
697 case 's': /* A string? */
698 XSTR (rt_val, i) = va_arg (p, char *);
701 case 'e': /* An expression? */
702 case 'u': /* An insn? Same except when printing. */
703 XEXP (rt_val, i) = va_arg (p, rtx);
706 case 'E': /* An RTX vector? */
707 XVEC (rt_val, i) = va_arg (p, rtvec);
710 case 'b': /* A bitmap? */
711 XBITMAP (rt_val, i) = va_arg (p, bitmap);
714 case 't': /* A tree? */
715 XTREE (rt_val, i) = va_arg (p, tree);
729 /* gen_rtvec (n, [rt1, ..., rtn])
731 ** This routine creates an rtvec and stores within it the
732 ** pointers to rtx's which are its arguments.
737 gen_rtvec VPARAMS ((int n, ...))
743 VA_FIXEDARG (p, int, n);
746 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
748 vector = (rtx *) alloca (n * sizeof (rtx));
750 for (i = 0; i < n; i++)
751 vector[i] = va_arg (p, rtx);
753 /* The definition of VA_* in K&R C causes `n' to go out of scope. */
757 return gen_rtvec_v (save_n, vector);
761 gen_rtvec_v (n, argp)
769 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
771 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
773 for (i = 0; i < n; i++)
774 rt_val->elem[i] = *argp++;
779 /* Generate a REG rtx for a new pseudo register of mode MODE.
780 This pseudo is assigned the next sequential register number. */
784 enum machine_mode mode;
786 struct function *f = cfun;
789 /* Don't let anything called after initial flow analysis create new
794 if (generating_concat_p
795 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
796 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
798 /* For complex modes, don't make a single pseudo.
799 Instead, make a CONCAT of two pseudos.
800 This allows noncontiguous allocation of the real and imaginary parts,
801 which makes much better code. Besides, allocating DCmode
802 pseudos overstrains reload on some machines like the 386. */
803 rtx realpart, imagpart;
804 int size = GET_MODE_UNIT_SIZE (mode);
805 enum machine_mode partmode
806 = mode_for_size (size * BITS_PER_UNIT,
807 (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
808 ? MODE_FLOAT : MODE_INT),
811 realpart = gen_reg_rtx (partmode);
812 imagpart = gen_reg_rtx (partmode);
813 return gen_rtx_CONCAT (mode, realpart, imagpart);
816 /* Make sure regno_pointer_align, regno_decl, and regno_reg_rtx are large
817 enough to have an element for this pseudo reg number. */
819 if (reg_rtx_no == f->emit->regno_pointer_align_length)
821 int old_size = f->emit->regno_pointer_align_length;
826 new = ggc_realloc (f->emit->regno_pointer_align, old_size * 2);
827 memset (new + old_size, 0, old_size);
828 f->emit->regno_pointer_align = (unsigned char *) new;
830 new1 = (rtx *) ggc_realloc (f->emit->x_regno_reg_rtx,
831 old_size * 2 * sizeof (rtx));
832 memset (new1 + old_size, 0, old_size * sizeof (rtx));
833 regno_reg_rtx = new1;
835 new2 = (tree *) ggc_realloc (f->emit->regno_decl,
836 old_size * 2 * sizeof (tree));
837 memset (new2 + old_size, 0, old_size * sizeof (tree));
838 f->emit->regno_decl = new2;
840 f->emit->regno_pointer_align_length = old_size * 2;
843 val = gen_raw_REG (mode, reg_rtx_no);
844 regno_reg_rtx[reg_rtx_no++] = val;
848 /* Identify REG (which may be a CONCAT) as a user register. */
854 if (GET_CODE (reg) == CONCAT)
856 REG_USERVAR_P (XEXP (reg, 0)) = 1;
857 REG_USERVAR_P (XEXP (reg, 1)) = 1;
859 else if (GET_CODE (reg) == REG)
860 REG_USERVAR_P (reg) = 1;
865 /* Identify REG as a probable pointer register and show its alignment
866 as ALIGN, if nonzero. */
869 mark_reg_pointer (reg, align)
873 if (! REG_POINTER (reg))
875 REG_POINTER (reg) = 1;
878 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
880 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
881 /* We can no-longer be sure just how aligned this pointer is */
882 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
885 /* Return 1 plus largest pseudo reg number used in the current function. */
893 /* Return 1 + the largest label number used so far in the current function. */
898 if (last_label_num && label_num == base_label_num)
899 return last_label_num;
903 /* Return first label number used in this function (if any were used). */
906 get_first_label_num ()
908 return first_label_num;
911 /* Return the final regno of X, which is a SUBREG of a hard
914 subreg_hard_regno (x, check_mode)
918 enum machine_mode mode = GET_MODE (x);
919 unsigned int byte_offset, base_regno, final_regno;
920 rtx reg = SUBREG_REG (x);
922 /* This is where we attempt to catch illegal subregs
923 created by the compiler. */
924 if (GET_CODE (x) != SUBREG
925 || GET_CODE (reg) != REG)
927 base_regno = REGNO (reg);
928 if (base_regno >= FIRST_PSEUDO_REGISTER)
930 if (check_mode && ! HARD_REGNO_MODE_OK (base_regno, GET_MODE (reg)))
933 /* Catch non-congruent offsets too. */
934 byte_offset = SUBREG_BYTE (x);
935 if ((byte_offset % GET_MODE_SIZE (mode)) != 0)
938 final_regno = subreg_regno (x);
943 /* Return a value representing some low-order bits of X, where the number
944 of low-order bits is given by MODE. Note that no conversion is done
945 between floating-point and fixed-point values, rather, the bit
946 representation is returned.
948 This function handles the cases in common between gen_lowpart, below,
949 and two variants in cse.c and combine.c. These are the cases that can
950 be safely handled at all points in the compilation.
952 If this is not a case we can handle, return 0. */
955 gen_lowpart_common (mode, x)
956 enum machine_mode mode;
959 int msize = GET_MODE_SIZE (mode);
960 int xsize = GET_MODE_SIZE (GET_MODE (x));
963 if (GET_MODE (x) == mode)
966 /* MODE must occupy no more words than the mode of X. */
967 if (GET_MODE (x) != VOIDmode
968 && ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
969 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)))
972 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
973 if (GET_MODE_CLASS (mode) == MODE_FLOAT
974 && GET_MODE (x) != VOIDmode && msize > xsize)
977 offset = subreg_lowpart_offset (mode, GET_MODE (x));
979 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
980 && (GET_MODE_CLASS (mode) == MODE_INT
981 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
983 /* If we are getting the low-order part of something that has been
984 sign- or zero-extended, we can either just use the object being
985 extended or make a narrower extension. If we want an even smaller
986 piece than the size of the object being extended, call ourselves
989 This case is used mostly by combine and cse. */
991 if (GET_MODE (XEXP (x, 0)) == mode)
993 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
994 return gen_lowpart_common (mode, XEXP (x, 0));
995 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
996 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
998 else if (GET_CODE (x) == SUBREG || GET_CODE (x) == REG
999 || GET_CODE (x) == CONCAT || GET_CODE (x) == CONST_VECTOR)
1000 return simplify_gen_subreg (mode, x, GET_MODE (x), offset);
1001 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
1002 from the low-order part of the constant. */
1003 else if ((GET_MODE_CLASS (mode) == MODE_INT
1004 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
1005 && GET_MODE (x) == VOIDmode
1006 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
1008 /* If MODE is twice the host word size, X is already the desired
1009 representation. Otherwise, if MODE is wider than a word, we can't
1010 do this. If MODE is exactly a word, return just one CONST_INT. */
1012 if (GET_MODE_BITSIZE (mode) >= 2 * HOST_BITS_PER_WIDE_INT)
1014 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
1016 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT)
1017 return (GET_CODE (x) == CONST_INT ? x
1018 : GEN_INT (CONST_DOUBLE_LOW (x)));
1021 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
1022 HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
1023 : CONST_DOUBLE_LOW (x));
1025 /* Sign extend to HOST_WIDE_INT. */
1026 val = trunc_int_for_mode (val, mode);
1028 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
1033 /* The floating-point emulator can handle all conversions between
1034 FP and integer operands. This simplifies reload because it
1035 doesn't have to deal with constructs like (subreg:DI
1036 (const_double:SF ...)) or (subreg:DF (const_int ...)). */
1037 /* Single-precision floats are always 32-bits and double-precision
1038 floats are always 64-bits. */
1040 else if (GET_MODE_CLASS (mode) == MODE_FLOAT
1041 && GET_MODE_BITSIZE (mode) == 32
1042 && GET_CODE (x) == CONST_INT)
1048 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
1049 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
1051 else if (GET_MODE_CLASS (mode) == MODE_FLOAT
1052 && GET_MODE_BITSIZE (mode) == 64
1053 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
1054 && GET_MODE (x) == VOIDmode)
1058 HOST_WIDE_INT low, high;
1060 if (GET_CODE (x) == CONST_INT)
1063 high = low >> (HOST_BITS_PER_WIDE_INT - 1);
1067 low = CONST_DOUBLE_LOW (x);
1068 high = CONST_DOUBLE_HIGH (x);
1071 #if HOST_BITS_PER_WIDE_INT == 32
1072 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
1074 if (WORDS_BIG_ENDIAN)
1075 i[0] = high, i[1] = low;
1077 i[0] = low, i[1] = high;
1082 r = REAL_VALUE_FROM_TARGET_DOUBLE (i);
1083 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
1085 else if ((GET_MODE_CLASS (mode) == MODE_INT
1086 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
1087 && GET_CODE (x) == CONST_DOUBLE
1088 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
1091 long i[4]; /* Only the low 32 bits of each 'long' are used. */
1092 int endian = WORDS_BIG_ENDIAN ? 1 : 0;
1094 /* Convert 'r' into an array of four 32-bit words in target word
1096 REAL_VALUE_FROM_CONST_DOUBLE (r, x);
1097 switch (GET_MODE_BITSIZE (GET_MODE (x)))
1100 REAL_VALUE_TO_TARGET_SINGLE (r, i[3 * endian]);
1103 i[3 - 3 * endian] = 0;
1106 REAL_VALUE_TO_TARGET_DOUBLE (r, i + 2 * endian);
1107 i[2 - 2 * endian] = 0;
1108 i[3 - 2 * endian] = 0;
1111 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i + endian);
1112 i[3 - 3 * endian] = 0;
1115 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i);
1120 /* Now, pack the 32-bit elements of the array into a CONST_DOUBLE
1122 #if HOST_BITS_PER_WIDE_INT == 32
1123 return immed_double_const (i[3 * endian], i[1 + endian], mode);
1125 if (HOST_BITS_PER_WIDE_INT != 64)
1128 return immed_double_const ((((unsigned long) i[3 * endian])
1129 | ((HOST_WIDE_INT) i[1 + endian] << 32)),
1130 (((unsigned long) i[2 - endian])
1131 | ((HOST_WIDE_INT) i[3 - 3 * endian] << 32)),
1136 /* Otherwise, we can't do this. */
1140 /* Return the real part (which has mode MODE) of a complex value X.
1141 This always comes at the low address in memory. */
1144 gen_realpart (mode, x)
1145 enum machine_mode mode;
1148 if (WORDS_BIG_ENDIAN
1149 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1151 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1153 ("can't access real part of complex value in hard register");
1154 else if (WORDS_BIG_ENDIAN)
1155 return gen_highpart (mode, x);
1157 return gen_lowpart (mode, x);
1160 /* Return the imaginary part (which has mode MODE) of a complex value X.
1161 This always comes at the high address in memory. */
1164 gen_imagpart (mode, x)
1165 enum machine_mode mode;
1168 if (WORDS_BIG_ENDIAN)
1169 return gen_lowpart (mode, x);
1170 else if (! WORDS_BIG_ENDIAN
1171 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1173 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1175 ("can't access imaginary part of complex value in hard register");
1177 return gen_highpart (mode, x);
1180 /* Return 1 iff X, assumed to be a SUBREG,
1181 refers to the real part of the complex value in its containing reg.
1182 Complex values are always stored with the real part in the first word,
1183 regardless of WORDS_BIG_ENDIAN. */
1186 subreg_realpart_p (x)
1189 if (GET_CODE (x) != SUBREG)
1192 return ((unsigned int) SUBREG_BYTE (x)
1193 < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x))));
1196 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1197 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1198 least-significant part of X.
1199 MODE specifies how big a part of X to return;
1200 it usually should not be larger than a word.
1201 If X is a MEM whose address is a QUEUED, the value may be so also. */
1204 gen_lowpart (mode, x)
1205 enum machine_mode mode;
1208 rtx result = gen_lowpart_common (mode, x);
1212 else if (GET_CODE (x) == REG)
1214 /* Must be a hard reg that's not valid in MODE. */
1215 result = gen_lowpart_common (mode, copy_to_reg (x));
1220 else if (GET_CODE (x) == MEM)
1222 /* The only additional case we can do is MEM. */
1224 if (WORDS_BIG_ENDIAN)
1225 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
1226 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1228 if (BYTES_BIG_ENDIAN)
1229 /* Adjust the address so that the address-after-the-data
1231 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
1232 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
1234 return adjust_address (x, mode, offset);
1236 else if (GET_CODE (x) == ADDRESSOF)
1237 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
1242 /* Like `gen_lowpart', but refer to the most significant part.
1243 This is used to access the imaginary part of a complex number. */
1246 gen_highpart (mode, x)
1247 enum machine_mode mode;
1250 unsigned int msize = GET_MODE_SIZE (mode);
1253 /* This case loses if X is a subreg. To catch bugs early,
1254 complain if an invalid MODE is used even in other cases. */
1255 if (msize > UNITS_PER_WORD
1256 && msize != GET_MODE_UNIT_SIZE (GET_MODE (x)))
1259 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1260 subreg_highpart_offset (mode, GET_MODE (x)));
1262 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1263 the target if we have a MEM. gen_highpart must return a valid operand,
1264 emitting code if necessary to do so. */
1265 if (result != NULL_RTX && GET_CODE (result) == MEM)
1266 result = validize_mem (result);
1273 /* Like gen_highpart_mode, but accept mode of EXP operand in case EXP can
1274 be VOIDmode constant. */
1276 gen_highpart_mode (outermode, innermode, exp)
1277 enum machine_mode outermode, innermode;
1280 if (GET_MODE (exp) != VOIDmode)
1282 if (GET_MODE (exp) != innermode)
1284 return gen_highpart (outermode, exp);
1286 return simplify_gen_subreg (outermode, exp, innermode,
1287 subreg_highpart_offset (outermode, innermode));
1290 /* Return offset in bytes to get OUTERMODE low part
1291 of the value in mode INNERMODE stored in memory in target format. */
1294 subreg_lowpart_offset (outermode, innermode)
1295 enum machine_mode outermode, innermode;
1297 unsigned int offset = 0;
1298 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1302 if (WORDS_BIG_ENDIAN)
1303 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1304 if (BYTES_BIG_ENDIAN)
1305 offset += difference % UNITS_PER_WORD;
1311 /* Return offset in bytes to get OUTERMODE high part
1312 of the value in mode INNERMODE stored in memory in target format. */
1314 subreg_highpart_offset (outermode, innermode)
1315 enum machine_mode outermode, innermode;
1317 unsigned int offset = 0;
1318 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1320 if (GET_MODE_SIZE (innermode) < GET_MODE_SIZE (outermode))
1325 if (! WORDS_BIG_ENDIAN)
1326 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1327 if (! BYTES_BIG_ENDIAN)
1328 offset += difference % UNITS_PER_WORD;
1334 /* Return 1 iff X, assumed to be a SUBREG,
1335 refers to the least significant part of its containing reg.
1336 If X is not a SUBREG, always return 1 (it is its own low part!). */
1339 subreg_lowpart_p (x)
1342 if (GET_CODE (x) != SUBREG)
1344 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1347 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1348 == SUBREG_BYTE (x));
1352 /* Helper routine for all the constant cases of operand_subword.
1353 Some places invoke this directly. */
1356 constant_subword (op, offset, mode)
1359 enum machine_mode mode;
1361 int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD;
1364 /* If OP is already an integer word, return it. */
1365 if (GET_MODE_CLASS (mode) == MODE_INT
1366 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
1369 /* The output is some bits, the width of the target machine's word.
1370 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1372 if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1373 && GET_MODE_CLASS (mode) == MODE_FLOAT
1374 && GET_MODE_BITSIZE (mode) == 64
1375 && GET_CODE (op) == CONST_DOUBLE)
1380 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1381 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
1383 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1384 which the words are written depends on the word endianness.
1385 ??? This is a potential portability problem and should
1386 be fixed at some point.
1388 We must exercise caution with the sign bit. By definition there
1389 are 32 significant bits in K; there may be more in a HOST_WIDE_INT.
1390 Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT.
1391 So we explicitly mask and sign-extend as necessary. */
1392 if (BITS_PER_WORD == 32)
1395 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1396 return GEN_INT (val);
1398 #if HOST_BITS_PER_WIDE_INT >= 64
1399 else if (BITS_PER_WORD >= 64 && offset == 0)
1401 val = k[! WORDS_BIG_ENDIAN];
1402 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1403 val |= (HOST_WIDE_INT) k[WORDS_BIG_ENDIAN] & 0xffffffff;
1404 return GEN_INT (val);
1407 else if (BITS_PER_WORD == 16)
1409 val = k[offset >> 1];
1410 if ((offset & 1) == ! WORDS_BIG_ENDIAN)
1412 val = ((val & 0xffff) ^ 0x8000) - 0x8000;
1413 return GEN_INT (val);
1418 else if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1419 && GET_MODE_CLASS (mode) == MODE_FLOAT
1420 && GET_MODE_BITSIZE (mode) > 64
1421 && GET_CODE (op) == CONST_DOUBLE)
1426 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1427 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k);
1429 if (BITS_PER_WORD == 32)
1432 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1433 return GEN_INT (val);
1435 #if HOST_BITS_PER_WIDE_INT >= 64
1436 else if (BITS_PER_WORD >= 64 && offset <= 1)
1438 val = k[offset * 2 + ! WORDS_BIG_ENDIAN];
1439 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1440 val |= (HOST_WIDE_INT) k[offset * 2 + WORDS_BIG_ENDIAN] & 0xffffffff;
1441 return GEN_INT (val);
1448 /* Single word float is a little harder, since single- and double-word
1449 values often do not have the same high-order bits. We have already
1450 verified that we want the only defined word of the single-word value. */
1451 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1452 && GET_MODE_BITSIZE (mode) == 32
1453 && GET_CODE (op) == CONST_DOUBLE)
1458 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1459 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
1461 /* Sign extend from known 32-bit value to HOST_WIDE_INT. */
1463 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1465 if (BITS_PER_WORD == 16)
1467 if ((offset & 1) == ! WORDS_BIG_ENDIAN)
1469 val = ((val & 0xffff) ^ 0x8000) - 0x8000;
1472 return GEN_INT (val);
1475 /* The only remaining cases that we can handle are integers.
1476 Convert to proper endianness now since these cases need it.
1477 At this point, offset == 0 means the low-order word.
1479 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1480 in general. However, if OP is (const_int 0), we can just return
1483 if (op == const0_rtx)
1486 if (GET_MODE_CLASS (mode) != MODE_INT
1487 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE)
1488 || BITS_PER_WORD > HOST_BITS_PER_WIDE_INT)
1491 if (WORDS_BIG_ENDIAN)
1492 offset = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - offset;
1494 /* Find out which word on the host machine this value is in and get
1495 it from the constant. */
1496 val = (offset / size_ratio == 0
1497 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
1498 : (GET_CODE (op) == CONST_INT
1499 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
1501 /* Get the value we want into the low bits of val. */
1502 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT)
1503 val = ((val >> ((offset % size_ratio) * BITS_PER_WORD)));
1505 val = trunc_int_for_mode (val, word_mode);
1507 return GEN_INT (val);
1510 /* Return subword OFFSET of operand OP.
1511 The word number, OFFSET, is interpreted as the word number starting
1512 at the low-order address. OFFSET 0 is the low-order word if not
1513 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1515 If we cannot extract the required word, we return zero. Otherwise,
1516 an rtx corresponding to the requested word will be returned.
1518 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1519 reload has completed, a valid address will always be returned. After
1520 reload, if a valid address cannot be returned, we return zero.
1522 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1523 it is the responsibility of the caller.
1525 MODE is the mode of OP in case it is a CONST_INT.
1527 ??? This is still rather broken for some cases. The problem for the
1528 moment is that all callers of this thing provide no 'goal mode' to
1529 tell us to work with. This exists because all callers were written
1530 in a word based SUBREG world.
1531 Now use of this function can be deprecated by simplify_subreg in most
1536 operand_subword (op, offset, validate_address, mode)
1538 unsigned int offset;
1539 int validate_address;
1540 enum machine_mode mode;
1542 if (mode == VOIDmode)
1543 mode = GET_MODE (op);
1545 if (mode == VOIDmode)
1548 /* If OP is narrower than a word, fail. */
1550 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1553 /* If we want a word outside OP, return zero. */
1555 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1558 /* Form a new MEM at the requested address. */
1559 if (GET_CODE (op) == MEM)
1561 rtx new = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1563 if (! validate_address)
1566 else if (reload_completed)
1568 if (! strict_memory_address_p (word_mode, XEXP (new, 0)))
1572 return replace_equiv_address (new, XEXP (new, 0));
1575 /* Rest can be handled by simplify_subreg. */
1576 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1579 /* Similar to `operand_subword', but never return 0. If we can't extract
1580 the required subword, put OP into a register and try again. If that fails,
1581 abort. We always validate the address in this case.
1583 MODE is the mode of OP, in case it is CONST_INT. */
1586 operand_subword_force (op, offset, mode)
1588 unsigned int offset;
1589 enum machine_mode mode;
1591 rtx result = operand_subword (op, offset, 1, mode);
1596 if (mode != BLKmode && mode != VOIDmode)
1598 /* If this is a register which can not be accessed by words, copy it
1599 to a pseudo register. */
1600 if (GET_CODE (op) == REG)
1601 op = copy_to_reg (op);
1603 op = force_reg (mode, op);
1606 result = operand_subword (op, offset, 1, mode);
1613 /* Given a compare instruction, swap the operands.
1614 A test instruction is changed into a compare of 0 against the operand. */
1617 reverse_comparison (insn)
1620 rtx body = PATTERN (insn);
1623 if (GET_CODE (body) == SET)
1624 comp = SET_SRC (body);
1626 comp = SET_SRC (XVECEXP (body, 0, 0));
1628 if (GET_CODE (comp) == COMPARE)
1630 rtx op0 = XEXP (comp, 0);
1631 rtx op1 = XEXP (comp, 1);
1632 XEXP (comp, 0) = op1;
1633 XEXP (comp, 1) = op0;
1637 rtx new = gen_rtx_COMPARE (VOIDmode,
1638 CONST0_RTX (GET_MODE (comp)), comp);
1639 if (GET_CODE (body) == SET)
1640 SET_SRC (body) = new;
1642 SET_SRC (XVECEXP (body, 0, 0)) = new;
1646 /* Within a MEM_EXPR, we care about either (1) a component ref of a decl,
1647 or (2) a component ref of something variable. Represent the later with
1648 a NULL expression. */
1651 component_ref_for_mem_expr (ref)
1654 tree inner = TREE_OPERAND (ref, 0);
1656 if (TREE_CODE (inner) == COMPONENT_REF)
1657 inner = component_ref_for_mem_expr (inner);
1660 tree placeholder_ptr = 0;
1662 /* Now remove any conversions: they don't change what the underlying
1663 object is. Likewise for SAVE_EXPR. Also handle PLACEHOLDER_EXPR. */
1664 while (TREE_CODE (inner) == NOP_EXPR || TREE_CODE (inner) == CONVERT_EXPR
1665 || TREE_CODE (inner) == NON_LVALUE_EXPR
1666 || TREE_CODE (inner) == VIEW_CONVERT_EXPR
1667 || TREE_CODE (inner) == SAVE_EXPR
1668 || TREE_CODE (inner) == PLACEHOLDER_EXPR)
1669 if (TREE_CODE (inner) == PLACEHOLDER_EXPR)
1670 inner = find_placeholder (inner, &placeholder_ptr);
1672 inner = TREE_OPERAND (inner, 0);
1674 if (! DECL_P (inner))
1678 if (inner == TREE_OPERAND (ref, 0))
1681 return build (COMPONENT_REF, TREE_TYPE (ref), inner,
1682 TREE_OPERAND (ref, 1));
1685 /* Given REF, a MEM, and T, either the type of X or the expression
1686 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1687 if we are making a new object of this type. BITPOS is nonzero if
1688 there is an offset outstanding on T that will be applied later. */
1691 set_mem_attributes_minus_bitpos (ref, t, objectp, bitpos)
1695 HOST_WIDE_INT bitpos;
1697 HOST_WIDE_INT alias = MEM_ALIAS_SET (ref);
1698 tree expr = MEM_EXPR (ref);
1699 rtx offset = MEM_OFFSET (ref);
1700 rtx size = MEM_SIZE (ref);
1701 unsigned int align = MEM_ALIGN (ref);
1702 HOST_WIDE_INT apply_bitpos = 0;
1705 /* It can happen that type_for_mode was given a mode for which there
1706 is no language-level type. In which case it returns NULL, which
1711 type = TYPE_P (t) ? t : TREE_TYPE (t);
1713 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1714 wrong answer, as it assumes that DECL_RTL already has the right alias
1715 info. Callers should not set DECL_RTL until after the call to
1716 set_mem_attributes. */
1717 if (DECL_P (t) && ref == DECL_RTL_IF_SET (t))
1720 /* Get the alias set from the expression or type (perhaps using a
1721 front-end routine) and use it. */
1722 alias = get_alias_set (t);
1724 MEM_VOLATILE_P (ref) = TYPE_VOLATILE (type);
1725 MEM_IN_STRUCT_P (ref) = AGGREGATE_TYPE_P (type);
1726 RTX_UNCHANGING_P (ref)
1727 |= ((lang_hooks.honor_readonly
1728 && (TYPE_READONLY (type) || TREE_READONLY (t)))
1729 || (! TYPE_P (t) && TREE_CONSTANT (t)));
1731 /* If we are making an object of this type, or if this is a DECL, we know
1732 that it is a scalar if the type is not an aggregate. */
1733 if ((objectp || DECL_P (t)) && ! AGGREGATE_TYPE_P (type))
1734 MEM_SCALAR_P (ref) = 1;
1736 /* We can set the alignment from the type if we are making an object,
1737 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1738 if (objectp || TREE_CODE (t) == INDIRECT_REF || TYPE_ALIGN_OK (type))
1739 align = MAX (align, TYPE_ALIGN (type));
1741 /* If the size is known, we can set that. */
1742 if (TYPE_SIZE_UNIT (type) && host_integerp (TYPE_SIZE_UNIT (type), 1))
1743 size = GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type), 1));
1745 /* If T is not a type, we may be able to deduce some more information about
1749 maybe_set_unchanging (ref, t);
1750 if (TREE_THIS_VOLATILE (t))
1751 MEM_VOLATILE_P (ref) = 1;
1753 /* Now remove any conversions: they don't change what the underlying
1754 object is. Likewise for SAVE_EXPR. */
1755 while (TREE_CODE (t) == NOP_EXPR || TREE_CODE (t) == CONVERT_EXPR
1756 || TREE_CODE (t) == NON_LVALUE_EXPR
1757 || TREE_CODE (t) == VIEW_CONVERT_EXPR
1758 || TREE_CODE (t) == SAVE_EXPR)
1759 t = TREE_OPERAND (t, 0);
1761 /* If this expression can't be addressed (e.g., it contains a reference
1762 to a non-addressable field), show we don't change its alias set. */
1763 if (! can_address_p (t))
1764 MEM_KEEP_ALIAS_SET_P (ref) = 1;
1766 /* If this is a decl, set the attributes of the MEM from it. */
1770 offset = const0_rtx;
1771 apply_bitpos = bitpos;
1772 size = (DECL_SIZE_UNIT (t)
1773 && host_integerp (DECL_SIZE_UNIT (t), 1)
1774 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t), 1)) : 0);
1775 align = DECL_ALIGN (t);
1778 /* If this is a constant, we know the alignment. */
1779 else if (TREE_CODE_CLASS (TREE_CODE (t)) == 'c')
1781 align = TYPE_ALIGN (type);
1782 #ifdef CONSTANT_ALIGNMENT
1783 align = CONSTANT_ALIGNMENT (t, align);
1787 /* If this is a field reference and not a bit-field, record it. */
1788 /* ??? There is some information that can be gleened from bit-fields,
1789 such as the word offset in the structure that might be modified.
1790 But skip it for now. */
1791 else if (TREE_CODE (t) == COMPONENT_REF
1792 && ! DECL_BIT_FIELD (TREE_OPERAND (t, 1)))
1794 expr = component_ref_for_mem_expr (t);
1795 offset = const0_rtx;
1796 apply_bitpos = bitpos;
1797 /* ??? Any reason the field size would be different than
1798 the size we got from the type? */
1801 /* If this is an array reference, look for an outer field reference. */
1802 else if (TREE_CODE (t) == ARRAY_REF)
1804 tree off_tree = size_zero_node;
1809 = fold (build (PLUS_EXPR, sizetype,
1810 fold (build (MULT_EXPR, sizetype,
1811 TREE_OPERAND (t, 1),
1812 TYPE_SIZE_UNIT (TREE_TYPE (t)))),
1814 t = TREE_OPERAND (t, 0);
1816 while (TREE_CODE (t) == ARRAY_REF);
1822 if (host_integerp (off_tree, 1))
1824 HOST_WIDE_INT ioff = tree_low_cst (off_tree, 1);
1825 HOST_WIDE_INT aoff = (ioff & -ioff) * BITS_PER_UNIT;
1826 align = DECL_ALIGN (t);
1827 if (aoff && aoff < align)
1829 offset = GEN_INT (ioff);
1830 apply_bitpos = bitpos;
1833 else if (TREE_CODE (t) == COMPONENT_REF)
1835 expr = component_ref_for_mem_expr (t);
1836 if (host_integerp (off_tree, 1))
1838 offset = GEN_INT (tree_low_cst (off_tree, 1));
1839 apply_bitpos = bitpos;
1841 /* ??? Any reason the field size would be different than
1842 the size we got from the type? */
1844 else if (flag_argument_noalias > 1
1845 && TREE_CODE (t) == INDIRECT_REF
1846 && TREE_CODE (TREE_OPERAND (t, 0)) == PARM_DECL)
1853 /* If this is a Fortran indirect argument reference, record the
1855 else if (flag_argument_noalias > 1
1856 && TREE_CODE (t) == INDIRECT_REF
1857 && TREE_CODE (TREE_OPERAND (t, 0)) == PARM_DECL)
1864 /* If we modified OFFSET based on T, then subtract the outstanding
1865 bit position offset. */
1867 offset = plus_constant (offset, -(apply_bitpos / BITS_PER_UNIT));
1869 /* Now set the attributes we computed above. */
1871 = get_mem_attrs (alias, expr, offset, size, align, GET_MODE (ref));
1873 /* If this is already known to be a scalar or aggregate, we are done. */
1874 if (MEM_IN_STRUCT_P (ref) || MEM_SCALAR_P (ref))
1877 /* If it is a reference into an aggregate, this is part of an aggregate.
1878 Otherwise we don't know. */
1879 else if (TREE_CODE (t) == COMPONENT_REF || TREE_CODE (t) == ARRAY_REF
1880 || TREE_CODE (t) == ARRAY_RANGE_REF
1881 || TREE_CODE (t) == BIT_FIELD_REF)
1882 MEM_IN_STRUCT_P (ref) = 1;
1886 set_mem_attributes (ref, t, objectp)
1891 set_mem_attributes_minus_bitpos (ref, t, objectp, 0);
1894 /* Set the alias set of MEM to SET. */
1897 set_mem_alias_set (mem, set)
1901 #ifdef ENABLE_CHECKING
1902 /* If the new and old alias sets don't conflict, something is wrong. */
1903 if (!alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)))
1907 MEM_ATTRS (mem) = get_mem_attrs (set, MEM_EXPR (mem), MEM_OFFSET (mem),
1908 MEM_SIZE (mem), MEM_ALIGN (mem),
1912 /* Set the alignment of MEM to ALIGN bits. */
1915 set_mem_align (mem, align)
1919 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1920 MEM_OFFSET (mem), MEM_SIZE (mem), align,
1924 /* Set the expr for MEM to EXPR. */
1927 set_mem_expr (mem, expr)
1932 = get_mem_attrs (MEM_ALIAS_SET (mem), expr, MEM_OFFSET (mem),
1933 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
1936 /* Set the offset of MEM to OFFSET. */
1939 set_mem_offset (mem, offset)
1942 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1943 offset, MEM_SIZE (mem), MEM_ALIGN (mem),
1947 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1948 and its address changed to ADDR. (VOIDmode means don't change the mode.
1949 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1950 returned memory location is required to be valid. The memory
1951 attributes are not changed. */
1954 change_address_1 (memref, mode, addr, validate)
1956 enum machine_mode mode;
1962 if (GET_CODE (memref) != MEM)
1964 if (mode == VOIDmode)
1965 mode = GET_MODE (memref);
1967 addr = XEXP (memref, 0);
1971 if (reload_in_progress || reload_completed)
1973 if (! memory_address_p (mode, addr))
1977 addr = memory_address (mode, addr);
1980 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1983 new = gen_rtx_MEM (mode, addr);
1984 MEM_COPY_ATTRIBUTES (new, memref);
1988 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1989 way we are changing MEMREF, so we only preserve the alias set. */
1992 change_address (memref, mode, addr)
1994 enum machine_mode mode;
1997 rtx new = change_address_1 (memref, mode, addr, 1);
1998 enum machine_mode mmode = GET_MODE (new);
2001 = get_mem_attrs (MEM_ALIAS_SET (memref), 0, 0,
2002 mmode == BLKmode ? 0 : GEN_INT (GET_MODE_SIZE (mmode)),
2003 (mmode == BLKmode ? BITS_PER_UNIT
2004 : GET_MODE_ALIGNMENT (mmode)),
2010 /* Return a memory reference like MEMREF, but with its mode changed
2011 to MODE and its address offset by OFFSET bytes. If VALIDATE is
2012 nonzero, the memory address is forced to be valid.
2013 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
2014 and caller is responsible for adjusting MEMREF base register. */
2017 adjust_address_1 (memref, mode, offset, validate, adjust)
2019 enum machine_mode mode;
2020 HOST_WIDE_INT offset;
2021 int validate, adjust;
2023 rtx addr = XEXP (memref, 0);
2025 rtx memoffset = MEM_OFFSET (memref);
2027 unsigned int memalign = MEM_ALIGN (memref);
2029 /* ??? Prefer to create garbage instead of creating shared rtl.
2030 This may happen even if offset is non-zero -- consider
2031 (plus (plus reg reg) const_int) -- so do this always. */
2032 addr = copy_rtx (addr);
2036 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
2037 object, we can merge it into the LO_SUM. */
2038 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
2040 && (unsigned HOST_WIDE_INT) offset
2041 < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
2042 addr = gen_rtx_LO_SUM (Pmode, XEXP (addr, 0),
2043 plus_constant (XEXP (addr, 1), offset));
2045 addr = plus_constant (addr, offset);
2048 new = change_address_1 (memref, mode, addr, validate);
2050 /* Compute the new values of the memory attributes due to this adjustment.
2051 We add the offsets and update the alignment. */
2053 memoffset = GEN_INT (offset + INTVAL (memoffset));
2055 /* Compute the new alignment by taking the MIN of the alignment and the
2056 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
2061 (unsigned HOST_WIDE_INT) (offset & -offset) * BITS_PER_UNIT);
2063 /* We can compute the size in a number of ways. */
2064 if (GET_MODE (new) != BLKmode)
2065 size = GEN_INT (GET_MODE_SIZE (GET_MODE (new)));
2066 else if (MEM_SIZE (memref))
2067 size = plus_constant (MEM_SIZE (memref), -offset);
2069 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref),
2070 memoffset, size, memalign, GET_MODE (new));
2072 /* At some point, we should validate that this offset is within the object,
2073 if all the appropriate values are known. */
2077 /* Return a memory reference like MEMREF, but with its mode changed
2078 to MODE and its address changed to ADDR, which is assumed to be
2079 MEMREF offseted by OFFSET bytes. If VALIDATE is
2080 nonzero, the memory address is forced to be valid. */
2083 adjust_automodify_address_1 (memref, mode, addr, offset, validate)
2085 enum machine_mode mode;
2087 HOST_WIDE_INT offset;
2090 memref = change_address_1 (memref, VOIDmode, addr, validate);
2091 return adjust_address_1 (memref, mode, offset, validate, 0);
2094 /* Return a memory reference like MEMREF, but whose address is changed by
2095 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2096 known to be in OFFSET (possibly 1). */
2099 offset_address (memref, offset, pow2)
2104 rtx new, addr = XEXP (memref, 0);
2106 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
2108 /* At this point we don't know _why_ the address is invalid. It
2109 could have secondary memory refereces, multiplies or anything.
2111 However, if we did go and rearrange things, we can wind up not
2112 being able to recognize the magic around pic_offset_table_rtx.
2113 This stuff is fragile, and is yet another example of why it is
2114 bad to expose PIC machinery too early. */
2115 if (! memory_address_p (GET_MODE (memref), new)
2116 && GET_CODE (addr) == PLUS
2117 && XEXP (addr, 0) == pic_offset_table_rtx)
2119 addr = force_reg (GET_MODE (addr), addr);
2120 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
2123 update_temp_slot_address (XEXP (memref, 0), new);
2124 new = change_address_1 (memref, VOIDmode, new, 1);
2126 /* Update the alignment to reflect the offset. Reset the offset, which
2129 = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref), 0, 0,
2130 MIN (MEM_ALIGN (memref),
2131 (unsigned HOST_WIDE_INT) pow2 * BITS_PER_UNIT),
2136 /* Return a memory reference like MEMREF, but with its address changed to
2137 ADDR. The caller is asserting that the actual piece of memory pointed
2138 to is the same, just the form of the address is being changed, such as
2139 by putting something into a register. */
2142 replace_equiv_address (memref, addr)
2146 /* change_address_1 copies the memory attribute structure without change
2147 and that's exactly what we want here. */
2148 update_temp_slot_address (XEXP (memref, 0), addr);
2149 return change_address_1 (memref, VOIDmode, addr, 1);
2152 /* Likewise, but the reference is not required to be valid. */
2155 replace_equiv_address_nv (memref, addr)
2159 return change_address_1 (memref, VOIDmode, addr, 0);
2162 /* Return a memory reference like MEMREF, but with its mode widened to
2163 MODE and offset by OFFSET. This would be used by targets that e.g.
2164 cannot issue QImode memory operations and have to use SImode memory
2165 operations plus masking logic. */
2168 widen_memory_access (memref, mode, offset)
2170 enum machine_mode mode;
2171 HOST_WIDE_INT offset;
2173 rtx new = adjust_address_1 (memref, mode, offset, 1, 1);
2174 tree expr = MEM_EXPR (new);
2175 rtx memoffset = MEM_OFFSET (new);
2176 unsigned int size = GET_MODE_SIZE (mode);
2178 /* If we don't know what offset we were at within the expression, then
2179 we can't know if we've overstepped the bounds. */
2185 if (TREE_CODE (expr) == COMPONENT_REF)
2187 tree field = TREE_OPERAND (expr, 1);
2189 if (! DECL_SIZE_UNIT (field))
2195 /* Is the field at least as large as the access? If so, ok,
2196 otherwise strip back to the containing structure. */
2197 if (TREE_CODE (DECL_SIZE_UNIT (field)) == INTEGER_CST
2198 && compare_tree_int (DECL_SIZE_UNIT (field), size) >= 0
2199 && INTVAL (memoffset) >= 0)
2202 if (! host_integerp (DECL_FIELD_OFFSET (field), 1))
2208 expr = TREE_OPERAND (expr, 0);
2209 memoffset = (GEN_INT (INTVAL (memoffset)
2210 + tree_low_cst (DECL_FIELD_OFFSET (field), 1)
2211 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 1)
2214 /* Similarly for the decl. */
2215 else if (DECL_P (expr)
2216 && DECL_SIZE_UNIT (expr)
2217 && TREE_CODE (DECL_SIZE_UNIT (expr)) == INTEGER_CST
2218 && compare_tree_int (DECL_SIZE_UNIT (expr), size) >= 0
2219 && (! memoffset || INTVAL (memoffset) >= 0))
2223 /* The widened memory access overflows the expression, which means
2224 that it could alias another expression. Zap it. */
2231 memoffset = NULL_RTX;
2233 /* The widened memory may alias other stuff, so zap the alias set. */
2234 /* ??? Maybe use get_alias_set on any remaining expression. */
2236 MEM_ATTRS (new) = get_mem_attrs (0, expr, memoffset, GEN_INT (size),
2237 MEM_ALIGN (new), mode);
2242 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2247 return gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX, NULL_RTX,
2248 NULL, label_num++, NULL);
2251 /* For procedure integration. */
2253 /* Install new pointers to the first and last insns in the chain.
2254 Also, set cur_insn_uid to one higher than the last in use.
2255 Used for an inline-procedure after copying the insn chain. */
2258 set_new_first_and_last_insn (first, last)
2267 for (insn = first; insn; insn = NEXT_INSN (insn))
2268 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2273 /* Set the range of label numbers found in the current function.
2274 This is used when belatedly compiling an inline function. */
2277 set_new_first_and_last_label_num (first, last)
2280 base_label_num = label_num;
2281 first_label_num = first;
2282 last_label_num = last;
2285 /* Set the last label number found in the current function.
2286 This is used when belatedly compiling an inline function. */
2289 set_new_last_label_num (last)
2292 base_label_num = label_num;
2293 last_label_num = last;
2296 /* Restore all variables describing the current status from the structure *P.
2297 This is used after a nested function. */
2300 restore_emit_status (p)
2301 struct function *p ATTRIBUTE_UNUSED;
2306 /* Go through all the RTL insn bodies and copy any invalid shared
2307 structure. This routine should only be called once. */
2310 unshare_all_rtl (fndecl, insn)
2316 /* Make sure that virtual parameters are not shared. */
2317 for (decl = DECL_ARGUMENTS (fndecl); decl; decl = TREE_CHAIN (decl))
2318 SET_DECL_RTL (decl, copy_rtx_if_shared (DECL_RTL (decl)));
2320 /* Make sure that virtual stack slots are not shared. */
2321 unshare_all_decls (DECL_INITIAL (fndecl));
2323 /* Unshare just about everything else. */
2324 unshare_all_rtl_1 (insn);
2326 /* Make sure the addresses of stack slots found outside the insn chain
2327 (such as, in DECL_RTL of a variable) are not shared
2328 with the insn chain.
2330 This special care is necessary when the stack slot MEM does not
2331 actually appear in the insn chain. If it does appear, its address
2332 is unshared from all else at that point. */
2333 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
2336 /* Go through all the RTL insn bodies and copy any invalid shared
2337 structure, again. This is a fairly expensive thing to do so it
2338 should be done sparingly. */
2341 unshare_all_rtl_again (insn)
2347 for (p = insn; p; p = NEXT_INSN (p))
2350 reset_used_flags (PATTERN (p));
2351 reset_used_flags (REG_NOTES (p));
2352 reset_used_flags (LOG_LINKS (p));
2355 /* Make sure that virtual stack slots are not shared. */
2356 reset_used_decls (DECL_INITIAL (cfun->decl));
2358 /* Make sure that virtual parameters are not shared. */
2359 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
2360 reset_used_flags (DECL_RTL (decl));
2362 reset_used_flags (stack_slot_list);
2364 unshare_all_rtl (cfun->decl, insn);
2367 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2368 Assumes the mark bits are cleared at entry. */
2371 unshare_all_rtl_1 (insn)
2374 for (; insn; insn = NEXT_INSN (insn))
2377 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
2378 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
2379 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
2383 /* Go through all virtual stack slots of a function and copy any
2384 shared structure. */
2386 unshare_all_decls (blk)
2391 /* Copy shared decls. */
2392 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2393 if (DECL_RTL_SET_P (t))
2394 SET_DECL_RTL (t, copy_rtx_if_shared (DECL_RTL (t)));
2396 /* Now process sub-blocks. */
2397 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2398 unshare_all_decls (t);
2401 /* Go through all virtual stack slots of a function and mark them as
2404 reset_used_decls (blk)
2410 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2411 if (DECL_RTL_SET_P (t))
2412 reset_used_flags (DECL_RTL (t));
2414 /* Now process sub-blocks. */
2415 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2416 reset_used_decls (t);
2419 /* Similar to `copy_rtx' except that if MAY_SHARE is present, it is
2420 placed in the result directly, rather than being copied. MAY_SHARE is
2421 either a MEM of an EXPR_LIST of MEMs. */
2424 copy_most_rtx (orig, may_share)
2431 const char *format_ptr;
2433 if (orig == may_share
2434 || (GET_CODE (may_share) == EXPR_LIST
2435 && in_expr_list_p (may_share, orig)))
2438 code = GET_CODE (orig);
2456 copy = rtx_alloc (code);
2457 PUT_MODE (copy, GET_MODE (orig));
2458 RTX_FLAG (copy, in_struct) = RTX_FLAG (orig, in_struct);
2459 RTX_FLAG (copy, volatil) = RTX_FLAG (orig, volatil);
2460 RTX_FLAG (copy, unchanging) = RTX_FLAG (orig, unchanging);
2461 RTX_FLAG (copy, integrated) = RTX_FLAG (orig, integrated);
2462 RTX_FLAG (copy, frame_related) = RTX_FLAG (orig, frame_related);
2464 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
2466 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
2468 switch (*format_ptr++)
2471 XEXP (copy, i) = XEXP (orig, i);
2472 if (XEXP (orig, i) != NULL && XEXP (orig, i) != may_share)
2473 XEXP (copy, i) = copy_most_rtx (XEXP (orig, i), may_share);
2477 XEXP (copy, i) = XEXP (orig, i);
2482 XVEC (copy, i) = XVEC (orig, i);
2483 if (XVEC (orig, i) != NULL)
2485 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
2486 for (j = 0; j < XVECLEN (copy, i); j++)
2487 XVECEXP (copy, i, j)
2488 = copy_most_rtx (XVECEXP (orig, i, j), may_share);
2493 XWINT (copy, i) = XWINT (orig, i);
2498 XINT (copy, i) = XINT (orig, i);
2502 XTREE (copy, i) = XTREE (orig, i);
2507 XSTR (copy, i) = XSTR (orig, i);
2511 /* Copy this through the wide int field; that's safest. */
2512 X0WINT (copy, i) = X0WINT (orig, i);
2522 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2523 Recursively does the same for subexpressions. */
2526 copy_rtx_if_shared (orig)
2532 const char *format_ptr;
2538 code = GET_CODE (x);
2540 /* These types may be freely shared. */
2554 /* SCRATCH must be shared because they represent distinct values. */
2558 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2559 a LABEL_REF, it isn't sharable. */
2560 if (GET_CODE (XEXP (x, 0)) == PLUS
2561 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
2562 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
2571 /* The chain of insns is not being copied. */
2575 /* A MEM is allowed to be shared if its address is constant.
2577 We used to allow sharing of MEMs which referenced
2578 virtual_stack_vars_rtx or virtual_incoming_args_rtx, but
2579 that can lose. instantiate_virtual_regs will not unshare
2580 the MEMs, and combine may change the structure of the address
2581 because it looks safe and profitable in one context, but
2582 in some other context it creates unrecognizable RTL. */
2583 if (CONSTANT_ADDRESS_P (XEXP (x, 0)))
2592 /* This rtx may not be shared. If it has already been seen,
2593 replace it with a copy of itself. */
2595 if (RTX_FLAG (x, used))
2599 copy = rtx_alloc (code);
2601 (sizeof (*copy) - sizeof (copy->fld)
2602 + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code)));
2606 RTX_FLAG (x, used) = 1;
2608 /* Now scan the subexpressions recursively.
2609 We can store any replaced subexpressions directly into X
2610 since we know X is not shared! Any vectors in X
2611 must be copied if X was copied. */
2613 format_ptr = GET_RTX_FORMAT (code);
2615 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2617 switch (*format_ptr++)
2620 XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
2624 if (XVEC (x, i) != NULL)
2627 int len = XVECLEN (x, i);
2629 if (copied && len > 0)
2630 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
2631 for (j = 0; j < len; j++)
2632 XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j));
2640 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2641 to look for shared sub-parts. */
2644 reset_used_flags (x)
2649 const char *format_ptr;
2654 code = GET_CODE (x);
2656 /* These types may be freely shared so we needn't do any resetting
2678 /* The chain of insns is not being copied. */
2685 RTX_FLAG (x, used) = 0;
2687 format_ptr = GET_RTX_FORMAT (code);
2688 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2690 switch (*format_ptr++)
2693 reset_used_flags (XEXP (x, i));
2697 for (j = 0; j < XVECLEN (x, i); j++)
2698 reset_used_flags (XVECEXP (x, i, j));
2704 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2705 Return X or the rtx for the pseudo reg the value of X was copied into.
2706 OTHER must be valid as a SET_DEST. */
2709 make_safe_from (x, other)
2713 switch (GET_CODE (other))
2716 other = SUBREG_REG (other);
2718 case STRICT_LOW_PART:
2721 other = XEXP (other, 0);
2727 if ((GET_CODE (other) == MEM
2729 && GET_CODE (x) != REG
2730 && GET_CODE (x) != SUBREG)
2731 || (GET_CODE (other) == REG
2732 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2733 || reg_mentioned_p (other, x))))
2735 rtx temp = gen_reg_rtx (GET_MODE (x));
2736 emit_move_insn (temp, x);
2742 /* Emission of insns (adding them to the doubly-linked list). */
2744 /* Return the first insn of the current sequence or current function. */
2752 /* Specify a new insn as the first in the chain. */
2755 set_first_insn (insn)
2758 if (PREV_INSN (insn) != 0)
2763 /* Return the last insn emitted in current sequence or current function. */
2771 /* Specify a new insn as the last in the chain. */
2774 set_last_insn (insn)
2777 if (NEXT_INSN (insn) != 0)
2782 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2785 get_last_insn_anywhere ()
2787 struct sequence_stack *stack;
2790 for (stack = seq_stack; stack; stack = stack->next)
2791 if (stack->last != 0)
2796 /* Return the first nonnote insn emitted in current sequence or current
2797 function. This routine looks inside SEQUENCEs. */
2800 get_first_nonnote_insn ()
2802 rtx insn = first_insn;
2806 insn = next_insn (insn);
2807 if (insn == 0 || GET_CODE (insn) != NOTE)
2814 /* Return the last nonnote insn emitted in current sequence or current
2815 function. This routine looks inside SEQUENCEs. */
2818 get_last_nonnote_insn ()
2820 rtx insn = last_insn;
2824 insn = previous_insn (insn);
2825 if (insn == 0 || GET_CODE (insn) != NOTE)
2832 /* Return a number larger than any instruction's uid in this function. */
2837 return cur_insn_uid;
2840 /* Renumber instructions so that no instruction UIDs are wasted. */
2843 renumber_insns (stream)
2848 /* If we're not supposed to renumber instructions, don't. */
2849 if (!flag_renumber_insns)
2852 /* If there aren't that many instructions, then it's not really
2853 worth renumbering them. */
2854 if (flag_renumber_insns == 1 && get_max_uid () < 25000)
2859 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
2862 fprintf (stream, "Renumbering insn %d to %d\n",
2863 INSN_UID (insn), cur_insn_uid);
2864 INSN_UID (insn) = cur_insn_uid++;
2868 /* Return the next insn. If it is a SEQUENCE, return the first insn
2877 insn = NEXT_INSN (insn);
2878 if (insn && GET_CODE (insn) == INSN
2879 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2880 insn = XVECEXP (PATTERN (insn), 0, 0);
2886 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2890 previous_insn (insn)
2895 insn = PREV_INSN (insn);
2896 if (insn && GET_CODE (insn) == INSN
2897 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2898 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
2904 /* Return the next insn after INSN that is not a NOTE. This routine does not
2905 look inside SEQUENCEs. */
2908 next_nonnote_insn (insn)
2913 insn = NEXT_INSN (insn);
2914 if (insn == 0 || GET_CODE (insn) != NOTE)
2921 /* Return the previous insn before INSN that is not a NOTE. This routine does
2922 not look inside SEQUENCEs. */
2925 prev_nonnote_insn (insn)
2930 insn = PREV_INSN (insn);
2931 if (insn == 0 || GET_CODE (insn) != NOTE)
2938 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2939 or 0, if there is none. This routine does not look inside
2943 next_real_insn (insn)
2948 insn = NEXT_INSN (insn);
2949 if (insn == 0 || GET_CODE (insn) == INSN
2950 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
2957 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2958 or 0, if there is none. This routine does not look inside
2962 prev_real_insn (insn)
2967 insn = PREV_INSN (insn);
2968 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
2969 || GET_CODE (insn) == JUMP_INSN)
2976 /* Find the next insn after INSN that really does something. This routine
2977 does not look inside SEQUENCEs. Until reload has completed, this is the
2978 same as next_real_insn. */
2981 active_insn_p (insn)
2984 return (GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
2985 || (GET_CODE (insn) == INSN
2986 && (! reload_completed
2987 || (GET_CODE (PATTERN (insn)) != USE
2988 && GET_CODE (PATTERN (insn)) != CLOBBER))));
2992 next_active_insn (insn)
2997 insn = NEXT_INSN (insn);
2998 if (insn == 0 || active_insn_p (insn))
3005 /* Find the last insn before INSN that really does something. This routine
3006 does not look inside SEQUENCEs. Until reload has completed, this is the
3007 same as prev_real_insn. */
3010 prev_active_insn (insn)
3015 insn = PREV_INSN (insn);
3016 if (insn == 0 || active_insn_p (insn))
3023 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
3031 insn = NEXT_INSN (insn);
3032 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
3039 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
3047 insn = PREV_INSN (insn);
3048 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
3056 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3057 and REG_CC_USER notes so we can find it. */
3060 link_cc0_insns (insn)
3063 rtx user = next_nonnote_insn (insn);
3065 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
3066 user = XVECEXP (PATTERN (user), 0, 0);
3068 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn,
3070 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
3073 /* Return the next insn that uses CC0 after INSN, which is assumed to
3074 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3075 applied to the result of this function should yield INSN).
3077 Normally, this is simply the next insn. However, if a REG_CC_USER note
3078 is present, it contains the insn that uses CC0.
3080 Return 0 if we can't find the insn. */
3083 next_cc0_user (insn)
3086 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
3089 return XEXP (note, 0);
3091 insn = next_nonnote_insn (insn);
3092 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
3093 insn = XVECEXP (PATTERN (insn), 0, 0);
3095 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
3101 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3102 note, it is the previous insn. */
3105 prev_cc0_setter (insn)
3108 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
3111 return XEXP (note, 0);
3113 insn = prev_nonnote_insn (insn);
3114 if (! sets_cc0_p (PATTERN (insn)))
3121 /* Increment the label uses for all labels present in rtx. */
3124 mark_label_nuses (x)
3131 code = GET_CODE (x);
3132 if (code == LABEL_REF)
3133 LABEL_NUSES (XEXP (x, 0))++;
3135 fmt = GET_RTX_FORMAT (code);
3136 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3139 mark_label_nuses (XEXP (x, i));
3140 else if (fmt[i] == 'E')
3141 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3142 mark_label_nuses (XVECEXP (x, i, j));
3147 /* Try splitting insns that can be split for better scheduling.
3148 PAT is the pattern which might split.
3149 TRIAL is the insn providing PAT.
3150 LAST is non-zero if we should return the last insn of the sequence produced.
3152 If this routine succeeds in splitting, it returns the first or last
3153 replacement insn depending on the value of LAST. Otherwise, it
3154 returns TRIAL. If the insn to be returned can be split, it will be. */
3157 try_split (pat, trial, last)
3161 rtx before = PREV_INSN (trial);
3162 rtx after = NEXT_INSN (trial);
3163 int has_barrier = 0;
3168 if (any_condjump_p (trial)
3169 && (note = find_reg_note (trial, REG_BR_PROB, 0)))
3170 split_branch_probability = INTVAL (XEXP (note, 0));
3171 probability = split_branch_probability;
3173 seq = split_insns (pat, trial);
3175 split_branch_probability = -1;
3177 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3178 We may need to handle this specially. */
3179 if (after && GET_CODE (after) == BARRIER)
3182 after = NEXT_INSN (after);
3187 /* Sometimes there will be only one insn in that list, this case will
3188 normally arise only when we want it in turn to be split (SFmode on
3189 the 29k is an example). */
3190 if (NEXT_INSN (seq) != NULL_RTX)
3192 rtx insn_last, insn;
3195 /* Avoid infinite loop if any insn of the result matches
3196 the original pattern. */
3200 if (INSN_P (insn_last)
3201 && rtx_equal_p (PATTERN (insn_last), pat))
3203 if (NEXT_INSN (insn_last) == NULL_RTX)
3205 insn_last = NEXT_INSN (insn_last);
3210 while (insn != NULL_RTX)
3212 if (GET_CODE (insn) == JUMP_INSN)
3214 mark_jump_label (PATTERN (insn), insn, 0);
3216 if (probability != -1
3217 && any_condjump_p (insn)
3218 && !find_reg_note (insn, REG_BR_PROB, 0))
3220 /* We can preserve the REG_BR_PROB notes only if exactly
3221 one jump is created, otherwise the machine description
3222 is responsible for this step using
3223 split_branch_probability variable. */
3227 = gen_rtx_EXPR_LIST (REG_BR_PROB,
3228 GEN_INT (probability),
3233 insn = PREV_INSN (insn);
3236 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3237 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3238 if (GET_CODE (trial) == CALL_INSN)
3241 while (insn != NULL_RTX)
3243 if (GET_CODE (insn) == CALL_INSN)
3244 CALL_INSN_FUNCTION_USAGE (insn)
3245 = CALL_INSN_FUNCTION_USAGE (trial);
3247 insn = PREV_INSN (insn);
3251 /* Copy notes, particularly those related to the CFG. */
3252 for (note = REG_NOTES (trial); note; note = XEXP (note, 1))
3254 switch (REG_NOTE_KIND (note))
3258 while (insn != NULL_RTX)
3260 if (GET_CODE (insn) == CALL_INSN
3261 || (flag_non_call_exceptions
3262 && may_trap_p (PATTERN (insn))))
3264 = gen_rtx_EXPR_LIST (REG_EH_REGION,
3267 insn = PREV_INSN (insn);
3273 case REG_ALWAYS_RETURN:
3275 while (insn != NULL_RTX)
3277 if (GET_CODE (insn) == CALL_INSN)
3279 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3282 insn = PREV_INSN (insn);
3286 case REG_NON_LOCAL_GOTO:
3288 while (insn != NULL_RTX)
3290 if (GET_CODE (insn) == JUMP_INSN)
3292 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3295 insn = PREV_INSN (insn);
3304 /* If there are LABELS inside the split insns increment the
3305 usage count so we don't delete the label. */
3306 if (GET_CODE (trial) == INSN)
3309 while (insn != NULL_RTX)
3311 if (GET_CODE (insn) == INSN)
3312 mark_label_nuses (PATTERN (insn));
3314 insn = PREV_INSN (insn);
3318 tem = emit_insn_after_scope (seq, trial, INSN_SCOPE (trial));
3320 delete_insn (trial);
3322 emit_barrier_after (tem);
3324 /* Recursively call try_split for each new insn created; by the
3325 time control returns here that insn will be fully split, so
3326 set LAST and continue from the insn after the one returned.
3327 We can't use next_active_insn here since AFTER may be a note.
3328 Ignore deleted insns, which can be occur if not optimizing. */
3329 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
3330 if (! INSN_DELETED_P (tem) && INSN_P (tem))
3331 tem = try_split (PATTERN (tem), tem, 1);
3333 /* Avoid infinite loop if the result matches the original pattern. */
3334 else if (rtx_equal_p (PATTERN (seq), pat))
3338 PATTERN (trial) = PATTERN (seq);
3339 INSN_CODE (trial) = -1;
3340 try_split (PATTERN (trial), trial, last);
3343 /* Return either the first or the last insn, depending on which was
3346 ? (after ? PREV_INSN (after) : last_insn)
3347 : NEXT_INSN (before);
3353 /* Make and return an INSN rtx, initializing all its slots.
3354 Store PATTERN in the pattern slots. */
3357 make_insn_raw (pattern)
3362 insn = rtx_alloc (INSN);
3364 INSN_UID (insn) = cur_insn_uid++;
3365 PATTERN (insn) = pattern;
3366 INSN_CODE (insn) = -1;
3367 LOG_LINKS (insn) = NULL;
3368 REG_NOTES (insn) = NULL;
3369 INSN_SCOPE (insn) = NULL;
3370 BLOCK_FOR_INSN (insn) = NULL;
3372 #ifdef ENABLE_RTL_CHECKING
3375 && (returnjump_p (insn)
3376 || (GET_CODE (insn) == SET
3377 && SET_DEST (insn) == pc_rtx)))
3379 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
3387 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3390 make_jump_insn_raw (pattern)
3395 insn = rtx_alloc (JUMP_INSN);
3396 INSN_UID (insn) = cur_insn_uid++;
3398 PATTERN (insn) = pattern;
3399 INSN_CODE (insn) = -1;
3400 LOG_LINKS (insn) = NULL;
3401 REG_NOTES (insn) = NULL;
3402 JUMP_LABEL (insn) = NULL;
3403 INSN_SCOPE (insn) = NULL;
3404 BLOCK_FOR_INSN (insn) = NULL;
3409 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3412 make_call_insn_raw (pattern)
3417 insn = rtx_alloc (CALL_INSN);
3418 INSN_UID (insn) = cur_insn_uid++;
3420 PATTERN (insn) = pattern;
3421 INSN_CODE (insn) = -1;
3422 LOG_LINKS (insn) = NULL;
3423 REG_NOTES (insn) = NULL;
3424 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
3425 INSN_SCOPE (insn) = NULL;
3426 BLOCK_FOR_INSN (insn) = NULL;
3431 /* Add INSN to the end of the doubly-linked list.
3432 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3438 PREV_INSN (insn) = last_insn;
3439 NEXT_INSN (insn) = 0;
3441 if (NULL != last_insn)
3442 NEXT_INSN (last_insn) = insn;
3444 if (NULL == first_insn)
3450 /* Add INSN into the doubly-linked list after insn AFTER. This and
3451 the next should be the only functions called to insert an insn once
3452 delay slots have been filled since only they know how to update a
3456 add_insn_after (insn, after)
3459 rtx next = NEXT_INSN (after);
3462 if (optimize && INSN_DELETED_P (after))
3465 NEXT_INSN (insn) = next;
3466 PREV_INSN (insn) = after;
3470 PREV_INSN (next) = insn;
3471 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3472 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
3474 else if (last_insn == after)
3478 struct sequence_stack *stack = seq_stack;
3479 /* Scan all pending sequences too. */
3480 for (; stack; stack = stack->next)
3481 if (after == stack->last)
3491 if (GET_CODE (after) != BARRIER
3492 && GET_CODE (insn) != BARRIER
3493 && (bb = BLOCK_FOR_INSN (after)))
3495 set_block_for_insn (insn, bb);
3497 bb->flags |= BB_DIRTY;
3498 /* Should not happen as first in the BB is always
3499 either NOTE or LABEL. */
3500 if (bb->end == after
3501 /* Avoid clobbering of structure when creating new BB. */
3502 && GET_CODE (insn) != BARRIER
3503 && (GET_CODE (insn) != NOTE
3504 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3508 NEXT_INSN (after) = insn;
3509 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
3511 rtx sequence = PATTERN (after);
3512 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3516 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3517 the previous should be the only functions called to insert an insn once
3518 delay slots have been filled since only they know how to update a
3522 add_insn_before (insn, before)
3525 rtx prev = PREV_INSN (before);
3528 if (optimize && INSN_DELETED_P (before))
3531 PREV_INSN (insn) = prev;
3532 NEXT_INSN (insn) = before;
3536 NEXT_INSN (prev) = insn;
3537 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3539 rtx sequence = PATTERN (prev);
3540 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3543 else if (first_insn == before)
3547 struct sequence_stack *stack = seq_stack;
3548 /* Scan all pending sequences too. */
3549 for (; stack; stack = stack->next)
3550 if (before == stack->first)
3552 stack->first = insn;
3560 if (GET_CODE (before) != BARRIER
3561 && GET_CODE (insn) != BARRIER
3562 && (bb = BLOCK_FOR_INSN (before)))
3564 set_block_for_insn (insn, bb);
3566 bb->flags |= BB_DIRTY;
3567 /* Should not happen as first in the BB is always
3568 either NOTE or LABEl. */
3569 if (bb->head == insn
3570 /* Avoid clobbering of structure when creating new BB. */
3571 && GET_CODE (insn) != BARRIER
3572 && (GET_CODE (insn) != NOTE
3573 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3577 PREV_INSN (before) = insn;
3578 if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE)
3579 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
3582 /* Remove an insn from its doubly-linked list. This function knows how
3583 to handle sequences. */
3588 rtx next = NEXT_INSN (insn);
3589 rtx prev = PREV_INSN (insn);
3594 NEXT_INSN (prev) = next;
3595 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3597 rtx sequence = PATTERN (prev);
3598 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
3601 else if (first_insn == insn)
3605 struct sequence_stack *stack = seq_stack;
3606 /* Scan all pending sequences too. */
3607 for (; stack; stack = stack->next)
3608 if (insn == stack->first)
3610 stack->first = next;
3620 PREV_INSN (next) = prev;
3621 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3622 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
3624 else if (last_insn == insn)
3628 struct sequence_stack *stack = seq_stack;
3629 /* Scan all pending sequences too. */
3630 for (; stack; stack = stack->next)
3631 if (insn == stack->last)
3640 if (GET_CODE (insn) != BARRIER
3641 && (bb = BLOCK_FOR_INSN (insn)))
3644 bb->flags |= BB_DIRTY;
3645 if (bb->head == insn)
3647 /* Never ever delete the basic block note without deleting whole
3649 if (GET_CODE (insn) == NOTE)
3653 if (bb->end == insn)
3658 /* Delete all insns made since FROM.
3659 FROM becomes the new last instruction. */
3662 delete_insns_since (from)
3668 NEXT_INSN (from) = 0;
3672 /* This function is deprecated, please use sequences instead.
3674 Move a consecutive bunch of insns to a different place in the chain.
3675 The insns to be moved are those between FROM and TO.
3676 They are moved to a new position after the insn AFTER.
3677 AFTER must not be FROM or TO or any insn in between.
3679 This function does not know about SEQUENCEs and hence should not be
3680 called after delay-slot filling has been done. */
3683 reorder_insns_nobb (from, to, after)
3684 rtx from, to, after;
3686 /* Splice this bunch out of where it is now. */
3687 if (PREV_INSN (from))
3688 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
3690 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
3691 if (last_insn == to)
3692 last_insn = PREV_INSN (from);
3693 if (first_insn == from)
3694 first_insn = NEXT_INSN (to);
3696 /* Make the new neighbors point to it and it to them. */
3697 if (NEXT_INSN (after))
3698 PREV_INSN (NEXT_INSN (after)) = to;
3700 NEXT_INSN (to) = NEXT_INSN (after);
3701 PREV_INSN (from) = after;
3702 NEXT_INSN (after) = from;
3703 if (after == last_insn)
3707 /* Same as function above, but take care to update BB boundaries. */
3709 reorder_insns (from, to, after)
3710 rtx from, to, after;
3712 rtx prev = PREV_INSN (from);
3713 basic_block bb, bb2;
3715 reorder_insns_nobb (from, to, after);
3717 if (GET_CODE (after) != BARRIER
3718 && (bb = BLOCK_FOR_INSN (after)))
3721 bb->flags |= BB_DIRTY;
3723 if (GET_CODE (from) != BARRIER
3724 && (bb2 = BLOCK_FOR_INSN (from)))
3728 bb2->flags |= BB_DIRTY;
3731 if (bb->end == after)
3734 for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
3735 set_block_for_insn (x, bb);
3739 /* Return the line note insn preceding INSN. */
3742 find_line_note (insn)
3745 if (no_line_numbers)
3748 for (; insn; insn = PREV_INSN (insn))
3749 if (GET_CODE (insn) == NOTE
3750 && NOTE_LINE_NUMBER (insn) >= 0)
3756 /* Like reorder_insns, but inserts line notes to preserve the line numbers
3757 of the moved insns when debugging. This may insert a note between AFTER
3758 and FROM, and another one after TO. */
3761 reorder_insns_with_line_notes (from, to, after)
3762 rtx from, to, after;
3764 rtx from_line = find_line_note (from);
3765 rtx after_line = find_line_note (after);
3767 reorder_insns (from, to, after);
3769 if (from_line == after_line)
3773 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
3774 NOTE_LINE_NUMBER (from_line),
3777 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
3778 NOTE_LINE_NUMBER (after_line),
3782 /* Remove unnecessary notes from the instruction stream. */
3785 remove_unnecessary_notes ()
3787 rtx block_stack = NULL_RTX;
3788 rtx eh_stack = NULL_RTX;
3793 /* We must not remove the first instruction in the function because
3794 the compiler depends on the first instruction being a note. */
3795 for (insn = NEXT_INSN (get_insns ()); insn; insn = next)
3797 /* Remember what's next. */
3798 next = NEXT_INSN (insn);
3800 /* We're only interested in notes. */
3801 if (GET_CODE (insn) != NOTE)
3804 switch (NOTE_LINE_NUMBER (insn))
3806 case NOTE_INSN_DELETED:
3807 case NOTE_INSN_LOOP_END_TOP_COND:
3811 case NOTE_INSN_EH_REGION_BEG:
3812 eh_stack = alloc_INSN_LIST (insn, eh_stack);
3815 case NOTE_INSN_EH_REGION_END:
3816 /* Too many end notes. */
3817 if (eh_stack == NULL_RTX)
3819 /* Mismatched nesting. */
3820 if (NOTE_EH_HANDLER (XEXP (eh_stack, 0)) != NOTE_EH_HANDLER (insn))
3823 eh_stack = XEXP (eh_stack, 1);
3824 free_INSN_LIST_node (tmp);
3827 case NOTE_INSN_BLOCK_BEG:
3828 /* By now, all notes indicating lexical blocks should have
3829 NOTE_BLOCK filled in. */
3830 if (NOTE_BLOCK (insn) == NULL_TREE)
3832 block_stack = alloc_INSN_LIST (insn, block_stack);
3835 case NOTE_INSN_BLOCK_END:
3836 /* Too many end notes. */
3837 if (block_stack == NULL_RTX)
3839 /* Mismatched nesting. */
3840 if (NOTE_BLOCK (XEXP (block_stack, 0)) != NOTE_BLOCK (insn))
3843 block_stack = XEXP (block_stack, 1);
3844 free_INSN_LIST_node (tmp);
3846 /* Scan back to see if there are any non-note instructions
3847 between INSN and the beginning of this block. If not,
3848 then there is no PC range in the generated code that will
3849 actually be in this block, so there's no point in
3850 remembering the existence of the block. */
3851 for (tmp = PREV_INSN (insn); tmp; tmp = PREV_INSN (tmp))
3853 /* This block contains a real instruction. Note that we
3854 don't include labels; if the only thing in the block
3855 is a label, then there are still no PC values that
3856 lie within the block. */
3860 /* We're only interested in NOTEs. */
3861 if (GET_CODE (tmp) != NOTE)
3864 if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_BEG)
3866 /* We just verified that this BLOCK matches us with
3867 the block_stack check above. Never delete the
3868 BLOCK for the outermost scope of the function; we
3869 can refer to names from that scope even if the
3870 block notes are messed up. */
3871 if (! is_body_block (NOTE_BLOCK (insn))
3872 && (*debug_hooks->ignore_block) (NOTE_BLOCK (insn)))
3879 else if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_END)
3880 /* There's a nested block. We need to leave the
3881 current block in place since otherwise the debugger
3882 wouldn't be able to show symbols from our block in
3883 the nested block. */
3889 /* Too many begin notes. */
3890 if (block_stack || eh_stack)
3895 /* Emit insn(s) of given code and pattern
3896 at a specified place within the doubly-linked list.
3898 All of the emit_foo global entry points accept an object
3899 X which is either an insn list or a PATTERN of a single
3902 There are thus a few canonical ways to generate code and
3903 emit it at a specific place in the instruction stream. For
3904 example, consider the instruction named SPOT and the fact that
3905 we would like to emit some instructions before SPOT. We might
3909 ... emit the new instructions ...
3910 insns_head = get_insns ();
3913 emit_insn_before (insns_head, SPOT);
3915 It used to be common to generate SEQUENCE rtl instead, but that
3916 is a relic of the past which no longer occurs. The reason is that
3917 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
3918 generated would almost certainly die right after it was created. */
3920 /* Make X be output before the instruction BEFORE. */
3923 emit_insn_before (x, before)
3929 #ifdef ENABLE_RTL_CHECKING
3930 if (before == NULL_RTX)
3937 switch (GET_CODE (x))
3948 rtx next = NEXT_INSN (insn);
3949 add_insn_before (insn, before);
3955 #ifdef ENABLE_RTL_CHECKING
3962 last = make_insn_raw (x);
3963 add_insn_before (last, before);
3970 /* Make an instruction with body X and code JUMP_INSN
3971 and output it before the instruction BEFORE. */
3974 emit_jump_insn_before (x, before)
3977 rtx insn, last = NULL_RTX;
3979 #ifdef ENABLE_RTL_CHECKING
3980 if (before == NULL_RTX)
3984 switch (GET_CODE (x))
3995 rtx next = NEXT_INSN (insn);
3996 add_insn_before (insn, before);
4002 #ifdef ENABLE_RTL_CHECKING
4009 last = make_jump_insn_raw (x);
4010 add_insn_before (last, before);
4017 /* Make an instruction with body X and code CALL_INSN
4018 and output it before the instruction BEFORE. */
4021 emit_call_insn_before (x, before)
4024 rtx last = NULL_RTX, insn;
4026 #ifdef ENABLE_RTL_CHECKING
4027 if (before == NULL_RTX)
4031 switch (GET_CODE (x))
4042 rtx next = NEXT_INSN (insn);
4043 add_insn_before (insn, before);
4049 #ifdef ENABLE_RTL_CHECKING
4056 last = make_call_insn_raw (x);
4057 add_insn_before (last, before);
4064 /* Make an insn of code BARRIER
4065 and output it before the insn BEFORE. */
4068 emit_barrier_before (before)
4071 rtx insn = rtx_alloc (BARRIER);
4073 INSN_UID (insn) = cur_insn_uid++;
4075 add_insn_before (insn, before);
4079 /* Emit the label LABEL before the insn BEFORE. */
4082 emit_label_before (label, before)
4085 /* This can be called twice for the same label as a result of the
4086 confusion that follows a syntax error! So make it harmless. */
4087 if (INSN_UID (label) == 0)
4089 INSN_UID (label) = cur_insn_uid++;
4090 add_insn_before (label, before);
4096 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4099 emit_note_before (subtype, before)
4103 rtx note = rtx_alloc (NOTE);
4104 INSN_UID (note) = cur_insn_uid++;
4105 NOTE_SOURCE_FILE (note) = 0;
4106 NOTE_LINE_NUMBER (note) = subtype;
4107 BLOCK_FOR_INSN (note) = NULL;
4109 add_insn_before (note, before);
4113 /* Helper for emit_insn_after, handles lists of instructions
4116 static rtx emit_insn_after_1 PARAMS ((rtx, rtx));
4119 emit_insn_after_1 (first, after)
4126 if (GET_CODE (after) != BARRIER
4127 && (bb = BLOCK_FOR_INSN (after)))
4129 bb->flags |= BB_DIRTY;
4130 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4131 if (GET_CODE (last) != BARRIER)
4132 set_block_for_insn (last, bb);
4133 if (GET_CODE (last) != BARRIER)
4134 set_block_for_insn (last, bb);
4135 if (bb->end == after)
4139 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4142 after_after = NEXT_INSN (after);
4144 NEXT_INSN (after) = first;
4145 PREV_INSN (first) = after;
4146 NEXT_INSN (last) = after_after;
4148 PREV_INSN (after_after) = last;
4150 if (after == last_insn)
4155 /* Make X be output after the insn AFTER. */
4158 emit_insn_after (x, after)
4163 #ifdef ENABLE_RTL_CHECKING
4164 if (after == NULL_RTX)
4171 switch (GET_CODE (x))
4179 last = emit_insn_after_1 (x, after);
4182 #ifdef ENABLE_RTL_CHECKING
4189 last = make_insn_raw (x);
4190 add_insn_after (last, after);
4197 /* Similar to emit_insn_after, except that line notes are to be inserted so
4198 as to act as if this insn were at FROM. */
4201 emit_insn_after_with_line_notes (x, after, from)
4204 rtx from_line = find_line_note (from);
4205 rtx after_line = find_line_note (after);
4206 rtx insn = emit_insn_after (x, after);
4209 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
4210 NOTE_LINE_NUMBER (from_line),
4214 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
4215 NOTE_LINE_NUMBER (after_line),
4219 /* Make an insn of code JUMP_INSN with body X
4220 and output it after the insn AFTER. */
4223 emit_jump_insn_after (x, after)
4228 #ifdef ENABLE_RTL_CHECKING
4229 if (after == NULL_RTX)
4233 switch (GET_CODE (x))
4241 last = emit_insn_after_1 (x, after);
4244 #ifdef ENABLE_RTL_CHECKING
4251 last = make_jump_insn_raw (x);
4252 add_insn_after (last, after);
4259 /* Make an instruction with body X and code CALL_INSN
4260 and output it after the instruction AFTER. */
4263 emit_call_insn_after (x, after)
4268 #ifdef ENABLE_RTL_CHECKING
4269 if (after == NULL_RTX)
4273 switch (GET_CODE (x))
4281 last = emit_insn_after_1 (x, after);
4284 #ifdef ENABLE_RTL_CHECKING
4291 last = make_call_insn_raw (x);
4292 add_insn_after (last, after);
4299 /* Make an insn of code BARRIER
4300 and output it after the insn AFTER. */
4303 emit_barrier_after (after)
4306 rtx insn = rtx_alloc (BARRIER);
4308 INSN_UID (insn) = cur_insn_uid++;
4310 add_insn_after (insn, after);
4314 /* Emit the label LABEL after the insn AFTER. */
4317 emit_label_after (label, after)
4320 /* This can be called twice for the same label
4321 as a result of the confusion that follows a syntax error!
4322 So make it harmless. */
4323 if (INSN_UID (label) == 0)
4325 INSN_UID (label) = cur_insn_uid++;
4326 add_insn_after (label, after);
4332 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4335 emit_note_after (subtype, after)
4339 rtx note = rtx_alloc (NOTE);
4340 INSN_UID (note) = cur_insn_uid++;
4341 NOTE_SOURCE_FILE (note) = 0;
4342 NOTE_LINE_NUMBER (note) = subtype;
4343 BLOCK_FOR_INSN (note) = NULL;
4344 add_insn_after (note, after);
4348 /* Emit a line note for FILE and LINE after the insn AFTER. */
4351 emit_line_note_after (file, line, after)
4358 if (no_line_numbers && line > 0)
4364 note = rtx_alloc (NOTE);
4365 INSN_UID (note) = cur_insn_uid++;
4366 NOTE_SOURCE_FILE (note) = file;
4367 NOTE_LINE_NUMBER (note) = line;
4368 BLOCK_FOR_INSN (note) = NULL;
4369 add_insn_after (note, after);
4373 /* Like emit_insn_after, but set INSN_SCOPE according to SCOPE. */
4375 emit_insn_after_scope (pattern, after, scope)
4379 rtx last = emit_insn_after (pattern, after);
4381 after = NEXT_INSN (after);
4384 if (active_insn_p (after))
4385 INSN_SCOPE (after) = scope;
4388 after = NEXT_INSN (after);
4393 /* Like emit_jump_insn_after, but set INSN_SCOPE according to SCOPE. */
4395 emit_jump_insn_after_scope (pattern, after, scope)
4399 rtx last = emit_jump_insn_after (pattern, after);
4401 after = NEXT_INSN (after);
4404 if (active_insn_p (after))
4405 INSN_SCOPE (after) = scope;
4408 after = NEXT_INSN (after);
4413 /* Like emit_call_insn_after, but set INSN_SCOPE according to SCOPE. */
4415 emit_call_insn_after_scope (pattern, after, scope)
4419 rtx last = emit_call_insn_after (pattern, after);
4421 after = NEXT_INSN (after);
4424 if (active_insn_p (after))
4425 INSN_SCOPE (after) = scope;
4428 after = NEXT_INSN (after);
4433 /* Like emit_insn_before, but set INSN_SCOPE according to SCOPE. */
4435 emit_insn_before_scope (pattern, before, scope)
4436 rtx pattern, before;
4439 rtx first = PREV_INSN (before);
4440 rtx last = emit_insn_before (pattern, before);
4442 first = NEXT_INSN (first);
4445 if (active_insn_p (first))
4446 INSN_SCOPE (first) = scope;
4449 first = NEXT_INSN (first);
4454 /* Take X and emit it at the end of the doubly-linked
4457 Returns the last insn emitted. */
4463 rtx last = last_insn;
4469 switch (GET_CODE (x))
4480 rtx next = NEXT_INSN (insn);
4487 #ifdef ENABLE_RTL_CHECKING
4494 last = make_insn_raw (x);
4502 /* Make an insn of code JUMP_INSN with pattern X
4503 and add it to the end of the doubly-linked list. */
4509 rtx last = NULL_RTX, insn;
4511 switch (GET_CODE (x))
4522 rtx next = NEXT_INSN (insn);
4529 #ifdef ENABLE_RTL_CHECKING
4536 last = make_jump_insn_raw (x);
4544 /* Make an insn of code CALL_INSN with pattern X
4545 and add it to the end of the doubly-linked list. */
4553 switch (GET_CODE (x))
4561 insn = emit_insn (x);
4564 #ifdef ENABLE_RTL_CHECKING
4571 insn = make_call_insn_raw (x);
4579 /* Add the label LABEL to the end of the doubly-linked list. */
4585 /* This can be called twice for the same label
4586 as a result of the confusion that follows a syntax error!
4587 So make it harmless. */
4588 if (INSN_UID (label) == 0)
4590 INSN_UID (label) = cur_insn_uid++;
4596 /* Make an insn of code BARRIER
4597 and add it to the end of the doubly-linked list. */
4602 rtx barrier = rtx_alloc (BARRIER);
4603 INSN_UID (barrier) = cur_insn_uid++;
4608 /* Make an insn of code NOTE
4609 with data-fields specified by FILE and LINE
4610 and add it to the end of the doubly-linked list,
4611 but only if line-numbers are desired for debugging info. */
4614 emit_line_note (file, line)
4618 set_file_and_line_for_stmt (file, line);
4621 if (no_line_numbers)
4625 return emit_note (file, line);
4628 /* Make an insn of code NOTE
4629 with data-fields specified by FILE and LINE
4630 and add it to the end of the doubly-linked list.
4631 If it is a line-number NOTE, omit it if it matches the previous one. */
4634 emit_note (file, line)
4642 if (file && last_filename && !strcmp (file, last_filename)
4643 && line == last_linenum)
4645 last_filename = file;
4646 last_linenum = line;
4649 if (no_line_numbers && line > 0)
4655 note = rtx_alloc (NOTE);
4656 INSN_UID (note) = cur_insn_uid++;
4657 NOTE_SOURCE_FILE (note) = file;
4658 NOTE_LINE_NUMBER (note) = line;
4659 BLOCK_FOR_INSN (note) = NULL;
4664 /* Emit a NOTE, and don't omit it even if LINE is the previous note. */
4667 emit_line_note_force (file, line)
4672 return emit_line_note (file, line);
4675 /* Cause next statement to emit a line note even if the line number
4676 has not changed. This is used at the beginning of a function. */
4679 force_next_line_note ()
4684 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4685 note of this type already exists, remove it first. */
4688 set_unique_reg_note (insn, kind, datum)
4693 rtx note = find_reg_note (insn, kind, NULL_RTX);
4699 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4700 has multiple sets (some callers assume single_set
4701 means the insn only has one set, when in fact it
4702 means the insn only has one * useful * set). */
4703 if (GET_CODE (PATTERN (insn)) == PARALLEL && multiple_sets (insn))
4710 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4711 It serves no useful purpose and breaks eliminate_regs. */
4712 if (GET_CODE (datum) == ASM_OPERANDS)
4722 XEXP (note, 0) = datum;
4726 REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn));
4727 return REG_NOTES (insn);
4730 /* Return an indication of which type of insn should have X as a body.
4731 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
4737 if (GET_CODE (x) == CODE_LABEL)
4739 if (GET_CODE (x) == CALL)
4741 if (GET_CODE (x) == RETURN)
4743 if (GET_CODE (x) == SET)
4745 if (SET_DEST (x) == pc_rtx)
4747 else if (GET_CODE (SET_SRC (x)) == CALL)
4752 if (GET_CODE (x) == PARALLEL)
4755 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
4756 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
4758 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4759 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
4761 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4762 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
4768 /* Emit the rtl pattern X as an appropriate kind of insn.
4769 If X is a label, it is simply added into the insn chain. */
4775 enum rtx_code code = classify_insn (x);
4777 if (code == CODE_LABEL)
4778 return emit_label (x);
4779 else if (code == INSN)
4780 return emit_insn (x);
4781 else if (code == JUMP_INSN)
4783 rtx insn = emit_jump_insn (x);
4784 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
4785 return emit_barrier ();
4788 else if (code == CALL_INSN)
4789 return emit_call_insn (x);
4794 /* Space for free sequence stack entries. */
4795 static GTY ((deletable (""))) struct sequence_stack *free_sequence_stack;
4797 /* Begin emitting insns to a sequence which can be packaged in an
4798 RTL_EXPR. If this sequence will contain something that might cause
4799 the compiler to pop arguments to function calls (because those
4800 pops have previously been deferred; see INHIBIT_DEFER_POP for more
4801 details), use do_pending_stack_adjust before calling this function.
4802 That will ensure that the deferred pops are not accidentally
4803 emitted in the middle of this sequence. */
4808 struct sequence_stack *tem;
4810 if (free_sequence_stack != NULL)
4812 tem = free_sequence_stack;
4813 free_sequence_stack = tem->next;
4816 tem = (struct sequence_stack *) ggc_alloc (sizeof (struct sequence_stack));
4818 tem->next = seq_stack;
4819 tem->first = first_insn;
4820 tem->last = last_insn;
4821 tem->sequence_rtl_expr = seq_rtl_expr;
4829 /* Similarly, but indicate that this sequence will be placed in T, an
4830 RTL_EXPR. See the documentation for start_sequence for more
4831 information about how to use this function. */
4834 start_sequence_for_rtl_expr (t)
4842 /* Set up the insn chain starting with FIRST as the current sequence,
4843 saving the previously current one. See the documentation for
4844 start_sequence for more information about how to use this function. */
4847 push_to_sequence (first)
4854 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
4860 /* Set up the insn chain from a chain stort in FIRST to LAST. */
4863 push_to_full_sequence (first, last)
4869 /* We really should have the end of the insn chain here. */
4870 if (last && NEXT_INSN (last))
4874 /* Set up the outer-level insn chain
4875 as the current sequence, saving the previously current one. */
4878 push_topmost_sequence ()
4880 struct sequence_stack *stack, *top = NULL;
4884 for (stack = seq_stack; stack; stack = stack->next)
4887 first_insn = top->first;
4888 last_insn = top->last;
4889 seq_rtl_expr = top->sequence_rtl_expr;
4892 /* After emitting to the outer-level insn chain, update the outer-level
4893 insn chain, and restore the previous saved state. */
4896 pop_topmost_sequence ()
4898 struct sequence_stack *stack, *top = NULL;
4900 for (stack = seq_stack; stack; stack = stack->next)
4903 top->first = first_insn;
4904 top->last = last_insn;
4905 /* ??? Why don't we save seq_rtl_expr here? */
4910 /* After emitting to a sequence, restore previous saved state.
4912 To get the contents of the sequence just made, you must call
4913 `get_insns' *before* calling here.
4915 If the compiler might have deferred popping arguments while
4916 generating this sequence, and this sequence will not be immediately
4917 inserted into the instruction stream, use do_pending_stack_adjust
4918 before calling get_insns. That will ensure that the deferred
4919 pops are inserted into this sequence, and not into some random
4920 location in the instruction stream. See INHIBIT_DEFER_POP for more
4921 information about deferred popping of arguments. */
4926 struct sequence_stack *tem = seq_stack;
4928 first_insn = tem->first;
4929 last_insn = tem->last;
4930 seq_rtl_expr = tem->sequence_rtl_expr;
4931 seq_stack = tem->next;
4933 memset (tem, 0, sizeof (*tem));
4934 tem->next = free_sequence_stack;
4935 free_sequence_stack = tem;
4938 /* This works like end_sequence, but records the old sequence in FIRST
4942 end_full_sequence (first, last)
4945 *first = first_insn;
4950 /* Return 1 if currently emitting into a sequence. */
4955 return seq_stack != 0;
4958 /* Put the various virtual registers into REGNO_REG_RTX. */
4961 init_virtual_regs (es)
4962 struct emit_status *es;
4964 rtx *ptr = es->x_regno_reg_rtx;
4965 ptr[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
4966 ptr[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
4967 ptr[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
4968 ptr[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
4969 ptr[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
4973 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
4974 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
4975 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
4976 static int copy_insn_n_scratches;
4978 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4979 copied an ASM_OPERANDS.
4980 In that case, it is the original input-operand vector. */
4981 static rtvec orig_asm_operands_vector;
4983 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4984 copied an ASM_OPERANDS.
4985 In that case, it is the copied input-operand vector. */
4986 static rtvec copy_asm_operands_vector;
4988 /* Likewise for the constraints vector. */
4989 static rtvec orig_asm_constraints_vector;
4990 static rtvec copy_asm_constraints_vector;
4992 /* Recursively create a new copy of an rtx for copy_insn.
4993 This function differs from copy_rtx in that it handles SCRATCHes and
4994 ASM_OPERANDs properly.
4995 Normally, this function is not used directly; use copy_insn as front end.
4996 However, you could first copy an insn pattern with copy_insn and then use
4997 this function afterwards to properly copy any REG_NOTEs containing
5007 const char *format_ptr;
5009 code = GET_CODE (orig);
5026 for (i = 0; i < copy_insn_n_scratches; i++)
5027 if (copy_insn_scratch_in[i] == orig)
5028 return copy_insn_scratch_out[i];
5032 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
5033 a LABEL_REF, it isn't sharable. */
5034 if (GET_CODE (XEXP (orig, 0)) == PLUS
5035 && GET_CODE (XEXP (XEXP (orig, 0), 0)) == SYMBOL_REF
5036 && GET_CODE (XEXP (XEXP (orig, 0), 1)) == CONST_INT)
5040 /* A MEM with a constant address is not sharable. The problem is that
5041 the constant address may need to be reloaded. If the mem is shared,
5042 then reloading one copy of this mem will cause all copies to appear
5043 to have been reloaded. */
5049 copy = rtx_alloc (code);
5051 /* Copy the various flags, and other information. We assume that
5052 all fields need copying, and then clear the fields that should
5053 not be copied. That is the sensible default behavior, and forces
5054 us to explicitly document why we are *not* copying a flag. */
5055 memcpy (copy, orig, sizeof (struct rtx_def) - sizeof (rtunion));
5057 /* We do not copy the USED flag, which is used as a mark bit during
5058 walks over the RTL. */
5059 RTX_FLAG (copy, used) = 0;
5061 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5062 if (GET_RTX_CLASS (code) == 'i')
5064 RTX_FLAG (copy, jump) = 0;
5065 RTX_FLAG (copy, call) = 0;
5066 RTX_FLAG (copy, frame_related) = 0;
5069 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
5071 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
5073 copy->fld[i] = orig->fld[i];
5074 switch (*format_ptr++)
5077 if (XEXP (orig, i) != NULL)
5078 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
5083 if (XVEC (orig, i) == orig_asm_constraints_vector)
5084 XVEC (copy, i) = copy_asm_constraints_vector;
5085 else if (XVEC (orig, i) == orig_asm_operands_vector)
5086 XVEC (copy, i) = copy_asm_operands_vector;
5087 else if (XVEC (orig, i) != NULL)
5089 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
5090 for (j = 0; j < XVECLEN (copy, i); j++)
5091 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
5102 /* These are left unchanged. */
5110 if (code == SCRATCH)
5112 i = copy_insn_n_scratches++;
5113 if (i >= MAX_RECOG_OPERANDS)
5115 copy_insn_scratch_in[i] = orig;
5116 copy_insn_scratch_out[i] = copy;
5118 else if (code == ASM_OPERANDS)
5120 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
5121 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
5122 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
5123 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
5129 /* Create a new copy of an rtx.
5130 This function differs from copy_rtx in that it handles SCRATCHes and
5131 ASM_OPERANDs properly.
5132 INSN doesn't really have to be a full INSN; it could be just the
5138 copy_insn_n_scratches = 0;
5139 orig_asm_operands_vector = 0;
5140 orig_asm_constraints_vector = 0;
5141 copy_asm_operands_vector = 0;
5142 copy_asm_constraints_vector = 0;
5143 return copy_insn_1 (insn);
5146 /* Initialize data structures and variables in this file
5147 before generating rtl for each function. */
5152 struct function *f = cfun;
5154 f->emit = (struct emit_status *) ggc_alloc (sizeof (struct emit_status));
5157 seq_rtl_expr = NULL;
5159 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
5162 first_label_num = label_num;
5166 /* Init the tables that describe all the pseudo regs. */
5168 f->emit->regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
5170 f->emit->regno_pointer_align
5171 = (unsigned char *) ggc_alloc_cleared (f->emit->regno_pointer_align_length
5172 * sizeof (unsigned char));
5175 = (rtx *) ggc_alloc_cleared (f->emit->regno_pointer_align_length
5179 = (tree *) ggc_alloc_cleared (f->emit->regno_pointer_align_length
5182 /* Put copies of all the hard registers into regno_reg_rtx. */
5183 memcpy (regno_reg_rtx,
5184 static_regno_reg_rtx,
5185 FIRST_PSEUDO_REGISTER * sizeof (rtx));
5187 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5188 init_virtual_regs (f->emit);
5190 /* Indicate that the virtual registers and stack locations are
5192 REG_POINTER (stack_pointer_rtx) = 1;
5193 REG_POINTER (frame_pointer_rtx) = 1;
5194 REG_POINTER (hard_frame_pointer_rtx) = 1;
5195 REG_POINTER (arg_pointer_rtx) = 1;
5197 REG_POINTER (virtual_incoming_args_rtx) = 1;
5198 REG_POINTER (virtual_stack_vars_rtx) = 1;
5199 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
5200 REG_POINTER (virtual_outgoing_args_rtx) = 1;
5201 REG_POINTER (virtual_cfa_rtx) = 1;
5203 #ifdef STACK_BOUNDARY
5204 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
5205 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5206 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5207 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
5209 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
5210 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
5211 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
5212 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
5213 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
5216 #ifdef INIT_EXPANDERS
5221 /* Generate the constant 0. */
5224 gen_const_vector_0 (mode)
5225 enum machine_mode mode;
5230 enum machine_mode inner;
5232 units = GET_MODE_NUNITS (mode);
5233 inner = GET_MODE_INNER (mode);
5235 v = rtvec_alloc (units);
5237 /* We need to call this function after we to set CONST0_RTX first. */
5238 if (!CONST0_RTX (inner))
5241 for (i = 0; i < units; ++i)
5242 RTVEC_ELT (v, i) = CONST0_RTX (inner);
5244 tem = gen_rtx_raw_CONST_VECTOR (mode, v);
5248 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5249 all elements are zero. */
5251 gen_rtx_CONST_VECTOR (mode, v)
5252 enum machine_mode mode;
5255 rtx inner_zero = CONST0_RTX (GET_MODE_INNER (mode));
5258 for (i = GET_MODE_NUNITS (mode) - 1; i >= 0; i--)
5259 if (RTVEC_ELT (v, i) != inner_zero)
5260 return gen_rtx_raw_CONST_VECTOR (mode, v);
5261 return CONST0_RTX (mode);
5264 /* Create some permanent unique rtl objects shared between all functions.
5265 LINE_NUMBERS is nonzero if line numbers are to be generated. */
5268 init_emit_once (line_numbers)
5272 enum machine_mode mode;
5273 enum machine_mode double_mode;
5275 /* Initialize the CONST_INT, CONST_DOUBLE, and memory attribute hash
5277 const_int_htab = htab_create (37, const_int_htab_hash,
5278 const_int_htab_eq, NULL);
5280 const_double_htab = htab_create (37, const_double_htab_hash,
5281 const_double_htab_eq, NULL);
5283 mem_attrs_htab = htab_create (37, mem_attrs_htab_hash,
5284 mem_attrs_htab_eq, NULL);
5286 no_line_numbers = ! line_numbers;
5288 /* Compute the word and byte modes. */
5290 byte_mode = VOIDmode;
5291 word_mode = VOIDmode;
5292 double_mode = VOIDmode;
5294 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
5295 mode = GET_MODE_WIDER_MODE (mode))
5297 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
5298 && byte_mode == VOIDmode)
5301 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
5302 && word_mode == VOIDmode)
5306 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
5307 mode = GET_MODE_WIDER_MODE (mode))
5309 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
5310 && double_mode == VOIDmode)
5314 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
5316 /* Assign register numbers to the globally defined register rtx.
5317 This must be done at runtime because the register number field
5318 is in a union and some compilers can't initialize unions. */
5320 pc_rtx = gen_rtx (PC, VOIDmode);
5321 cc0_rtx = gen_rtx (CC0, VOIDmode);
5322 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
5323 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
5324 if (hard_frame_pointer_rtx == 0)
5325 hard_frame_pointer_rtx = gen_raw_REG (Pmode,
5326 HARD_FRAME_POINTER_REGNUM);
5327 if (arg_pointer_rtx == 0)
5328 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
5329 virtual_incoming_args_rtx =
5330 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
5331 virtual_stack_vars_rtx =
5332 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
5333 virtual_stack_dynamic_rtx =
5334 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
5335 virtual_outgoing_args_rtx =
5336 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
5337 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
5339 /* Initialize RTL for commonly used hard registers. These are
5340 copied into regno_reg_rtx as we begin to compile each function. */
5341 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
5342 static_regno_reg_rtx[i] = gen_raw_REG (reg_raw_mode[i], i);
5344 #ifdef INIT_EXPANDERS
5345 /* This is to initialize {init|mark|free}_machine_status before the first
5346 call to push_function_context_to. This is needed by the Chill front
5347 end which calls push_function_context_to before the first call to
5348 init_function_start. */
5352 /* Create the unique rtx's for certain rtx codes and operand values. */
5354 /* Don't use gen_rtx here since gen_rtx in this case
5355 tries to use these variables. */
5356 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
5357 const_int_rtx[i + MAX_SAVED_CONST_INT] =
5358 gen_rtx_raw_CONST_INT (VOIDmode, (HOST_WIDE_INT) i);
5360 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
5361 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
5362 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
5364 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
5366 REAL_VALUE_FROM_INT (dconst0, 0, 0, double_mode);
5367 REAL_VALUE_FROM_INT (dconst1, 1, 0, double_mode);
5368 REAL_VALUE_FROM_INT (dconst2, 2, 0, double_mode);
5369 REAL_VALUE_FROM_INT (dconstm1, -1, -1, double_mode);
5371 for (i = 0; i <= 2; i++)
5373 REAL_VALUE_TYPE *r =
5374 (i == 0 ? &dconst0 : i == 1 ? &dconst1 : &dconst2);
5376 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
5377 mode = GET_MODE_WIDER_MODE (mode))
5378 const_tiny_rtx[i][(int) mode] =
5379 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5381 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
5383 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
5384 mode = GET_MODE_WIDER_MODE (mode))
5385 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5387 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
5389 mode = GET_MODE_WIDER_MODE (mode))
5390 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5393 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
5395 mode = GET_MODE_WIDER_MODE (mode))
5396 const_tiny_rtx[0][(int) mode] = gen_const_vector_0 (mode);
5398 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
5400 mode = GET_MODE_WIDER_MODE (mode))
5401 const_tiny_rtx[0][(int) mode] = gen_const_vector_0 (mode);
5403 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
5404 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
5405 const_tiny_rtx[0][i] = const0_rtx;
5407 const_tiny_rtx[0][(int) BImode] = const0_rtx;
5408 if (STORE_FLAG_VALUE == 1)
5409 const_tiny_rtx[1][(int) BImode] = const1_rtx;
5411 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5412 return_address_pointer_rtx
5413 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
5417 struct_value_rtx = STRUCT_VALUE;
5419 struct_value_rtx = gen_rtx_REG (Pmode, STRUCT_VALUE_REGNUM);
5422 #ifdef STRUCT_VALUE_INCOMING
5423 struct_value_incoming_rtx = STRUCT_VALUE_INCOMING;
5425 #ifdef STRUCT_VALUE_INCOMING_REGNUM
5426 struct_value_incoming_rtx
5427 = gen_rtx_REG (Pmode, STRUCT_VALUE_INCOMING_REGNUM);
5429 struct_value_incoming_rtx = struct_value_rtx;
5433 #ifdef STATIC_CHAIN_REGNUM
5434 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
5436 #ifdef STATIC_CHAIN_INCOMING_REGNUM
5437 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
5438 static_chain_incoming_rtx
5439 = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
5442 static_chain_incoming_rtx = static_chain_rtx;
5446 static_chain_rtx = STATIC_CHAIN;
5448 #ifdef STATIC_CHAIN_INCOMING
5449 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
5451 static_chain_incoming_rtx = static_chain_rtx;
5455 if (PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
5456 pic_offset_table_rtx = gen_raw_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
5459 /* Query and clear/ restore no_line_numbers. This is used by the
5460 switch / case handling in stmt.c to give proper line numbers in
5461 warnings about unreachable code. */
5464 force_line_numbers ()
5466 int old = no_line_numbers;
5468 no_line_numbers = 0;
5470 force_next_line_note ();
5475 restore_line_number_status (old_value)
5478 no_line_numbers = old_value;
5481 /* Produce exact duplicate of insn INSN after AFTER.
5482 Care updating of libcall regions if present. */
5485 emit_copy_of_insn_after (insn, after)
5489 rtx note1, note2, link;
5491 switch (GET_CODE (insn))
5494 new = emit_insn_after (copy_insn (PATTERN (insn)), after);
5498 new = emit_jump_insn_after (copy_insn (PATTERN (insn)), after);
5502 new = emit_call_insn_after (copy_insn (PATTERN (insn)), after);
5503 if (CALL_INSN_FUNCTION_USAGE (insn))
5504 CALL_INSN_FUNCTION_USAGE (new)
5505 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn));
5506 SIBLING_CALL_P (new) = SIBLING_CALL_P (insn);
5507 CONST_OR_PURE_CALL_P (new) = CONST_OR_PURE_CALL_P (insn);
5514 /* Update LABEL_NUSES. */
5515 mark_jump_label (PATTERN (new), new, 0);
5517 INSN_SCOPE (new) = INSN_SCOPE (insn);
5519 /* Copy all REG_NOTES except REG_LABEL since mark_jump_label will
5521 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5522 if (REG_NOTE_KIND (link) != REG_LABEL)
5524 if (GET_CODE (link) == EXPR_LIST)
5526 = copy_insn_1 (gen_rtx_EXPR_LIST (REG_NOTE_KIND (link),
5531 = copy_insn_1 (gen_rtx_INSN_LIST (REG_NOTE_KIND (link),
5536 /* Fix the libcall sequences. */
5537 if ((note1 = find_reg_note (new, REG_RETVAL, NULL_RTX)) != NULL)
5540 while ((note2 = find_reg_note (p, REG_LIBCALL, NULL_RTX)) == NULL)
5542 XEXP (note1, 0) = p;
5543 XEXP (note2, 0) = new;
5548 #include "gt-emit-rtl.h"