1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains support functions for creating rtl expressions
26 and manipulating them in the doubly-linked chain of insns.
28 The patterns of the insns are created by machine-dependent
29 routines in insn-emit.c, which is generated automatically from
30 the machine description. These routines make the individual rtx's
31 of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
32 which are automatically generated from rtl.def; what is machine
33 dependent is the kind of rtx's they make and what arguments they
38 #include "coretypes.h"
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
54 #include "basic-block.h"
57 #include "langhooks.h"
59 /* Commonly used modes. */
61 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
62 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
63 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
64 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
67 /* This is *not* reset after each function. It gives each CODE_LABEL
68 in the entire compilation a unique label number. */
70 static GTY(()) int label_num = 1;
72 /* Highest label number in current function.
73 Zero means use the value of label_num instead.
74 This is nonzero only when belatedly compiling an inline function. */
76 static int last_label_num;
78 /* Value label_num had when set_new_last_label_num was called.
79 If label_num has not changed since then, last_label_num is valid. */
81 static int base_label_num;
83 /* Nonzero means do not generate NOTEs for source line numbers. */
85 static int no_line_numbers;
87 /* Commonly used rtx's, so that we only need space for one copy.
88 These are initialized once for the entire compilation.
89 All of these are unique; no other rtx-object will be equal to any
92 rtx global_rtl[GR_MAX];
94 /* Commonly used RTL for hard registers. These objects are not necessarily
95 unique, so we allocate them separately from global_rtl. They are
96 initialized once per compilation unit, then copied into regno_reg_rtx
97 at the beginning of each function. */
98 static GTY(()) rtx static_regno_reg_rtx[FIRST_PSEUDO_REGISTER];
100 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
101 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
102 record a copy of const[012]_rtx. */
104 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
108 REAL_VALUE_TYPE dconst0;
109 REAL_VALUE_TYPE dconst1;
110 REAL_VALUE_TYPE dconst2;
111 REAL_VALUE_TYPE dconst3;
112 REAL_VALUE_TYPE dconst10;
113 REAL_VALUE_TYPE dconstm1;
114 REAL_VALUE_TYPE dconstm2;
115 REAL_VALUE_TYPE dconsthalf;
116 REAL_VALUE_TYPE dconstthird;
117 REAL_VALUE_TYPE dconstpi;
118 REAL_VALUE_TYPE dconste;
120 /* All references to the following fixed hard registers go through
121 these unique rtl objects. On machines where the frame-pointer and
122 arg-pointer are the same register, they use the same unique object.
124 After register allocation, other rtl objects which used to be pseudo-regs
125 may be clobbered to refer to the frame-pointer register.
126 But references that were originally to the frame-pointer can be
127 distinguished from the others because they contain frame_pointer_rtx.
129 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
130 tricky: until register elimination has taken place hard_frame_pointer_rtx
131 should be used if it is being set, and frame_pointer_rtx otherwise. After
132 register elimination hard_frame_pointer_rtx should always be used.
133 On machines where the two registers are same (most) then these are the
136 In an inline procedure, the stack and frame pointer rtxs may not be
137 used for anything else. */
138 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
139 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
140 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
142 /* This is used to implement __builtin_return_address for some machines.
143 See for instance the MIPS port. */
144 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
146 /* We make one copy of (const_int C) where C is in
147 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
148 to save space during the compilation and simplify comparisons of
151 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
153 /* A hash table storing CONST_INTs whose absolute value is greater
154 than MAX_SAVED_CONST_INT. */
156 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
157 htab_t const_int_htab;
159 /* A hash table storing memory attribute structures. */
160 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs)))
161 htab_t mem_attrs_htab;
163 /* A hash table storing register attribute structures. */
164 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs)))
165 htab_t reg_attrs_htab;
167 /* A hash table storing all CONST_DOUBLEs. */
168 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
169 htab_t const_double_htab;
171 #define first_insn (cfun->emit->x_first_insn)
172 #define last_insn (cfun->emit->x_last_insn)
173 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
174 #define last_location (cfun->emit->x_last_location)
175 #define first_label_num (cfun->emit->x_first_label_num)
177 static rtx make_jump_insn_raw (rtx);
178 static rtx make_call_insn_raw (rtx);
179 static rtx find_line_note (rtx);
180 static rtx change_address_1 (rtx, enum machine_mode, rtx, int);
181 static void unshare_all_decls (tree);
182 static void reset_used_decls (tree);
183 static void mark_label_nuses (rtx);
184 static hashval_t const_int_htab_hash (const void *);
185 static int const_int_htab_eq (const void *, const void *);
186 static hashval_t const_double_htab_hash (const void *);
187 static int const_double_htab_eq (const void *, const void *);
188 static rtx lookup_const_double (rtx);
189 static hashval_t mem_attrs_htab_hash (const void *);
190 static int mem_attrs_htab_eq (const void *, const void *);
191 static mem_attrs *get_mem_attrs (HOST_WIDE_INT, tree, rtx, rtx, unsigned int,
193 static hashval_t reg_attrs_htab_hash (const void *);
194 static int reg_attrs_htab_eq (const void *, const void *);
195 static reg_attrs *get_reg_attrs (tree, int);
196 static tree component_ref_for_mem_expr (tree);
197 static rtx gen_const_vector_0 (enum machine_mode);
198 static rtx gen_complex_constant_part (enum machine_mode, rtx, int);
199 static void copy_rtx_if_shared_1 (rtx *orig);
201 /* Probability of the conditional branch currently proceeded by try_split.
202 Set to -1 otherwise. */
203 int split_branch_probability = -1;
205 /* Returns a hash code for X (which is a really a CONST_INT). */
208 const_int_htab_hash (const void *x)
210 return (hashval_t) INTVAL ((rtx) x);
213 /* Returns nonzero if the value represented by X (which is really a
214 CONST_INT) is the same as that given by Y (which is really a
218 const_int_htab_eq (const void *x, const void *y)
220 return (INTVAL ((rtx) x) == *((const HOST_WIDE_INT *) y));
223 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
225 const_double_htab_hash (const void *x)
230 if (GET_MODE (value) == VOIDmode)
231 h = CONST_DOUBLE_LOW (value) ^ CONST_DOUBLE_HIGH (value);
234 h = real_hash (CONST_DOUBLE_REAL_VALUE (value));
235 /* MODE is used in the comparison, so it should be in the hash. */
236 h ^= GET_MODE (value);
241 /* Returns nonzero if the value represented by X (really a ...)
242 is the same as that represented by Y (really a ...) */
244 const_double_htab_eq (const void *x, const void *y)
246 rtx a = (rtx)x, b = (rtx)y;
248 if (GET_MODE (a) != GET_MODE (b))
250 if (GET_MODE (a) == VOIDmode)
251 return (CONST_DOUBLE_LOW (a) == CONST_DOUBLE_LOW (b)
252 && CONST_DOUBLE_HIGH (a) == CONST_DOUBLE_HIGH (b));
254 return real_identical (CONST_DOUBLE_REAL_VALUE (a),
255 CONST_DOUBLE_REAL_VALUE (b));
258 /* Returns a hash code for X (which is a really a mem_attrs *). */
261 mem_attrs_htab_hash (const void *x)
263 mem_attrs *p = (mem_attrs *) x;
265 return (p->alias ^ (p->align * 1000)
266 ^ ((p->offset ? INTVAL (p->offset) : 0) * 50000)
267 ^ ((p->size ? INTVAL (p->size) : 0) * 2500000)
271 /* Returns nonzero if the value represented by X (which is really a
272 mem_attrs *) is the same as that given by Y (which is also really a
276 mem_attrs_htab_eq (const void *x, const void *y)
278 mem_attrs *p = (mem_attrs *) x;
279 mem_attrs *q = (mem_attrs *) y;
281 return (p->alias == q->alias && p->expr == q->expr && p->offset == q->offset
282 && p->size == q->size && p->align == q->align);
285 /* Allocate a new mem_attrs structure and insert it into the hash table if
286 one identical to it is not already in the table. We are doing this for
290 get_mem_attrs (HOST_WIDE_INT alias, tree expr, rtx offset, rtx size,
291 unsigned int align, enum machine_mode mode)
296 /* If everything is the default, we can just return zero.
297 This must match what the corresponding MEM_* macros return when the
298 field is not present. */
299 if (alias == 0 && expr == 0 && offset == 0
301 || (mode != BLKmode && GET_MODE_SIZE (mode) == INTVAL (size)))
302 && (STRICT_ALIGNMENT && mode != BLKmode
303 ? align == GET_MODE_ALIGNMENT (mode) : align == BITS_PER_UNIT))
308 attrs.offset = offset;
312 slot = htab_find_slot (mem_attrs_htab, &attrs, INSERT);
315 *slot = ggc_alloc (sizeof (mem_attrs));
316 memcpy (*slot, &attrs, sizeof (mem_attrs));
322 /* Returns a hash code for X (which is a really a reg_attrs *). */
325 reg_attrs_htab_hash (const void *x)
327 reg_attrs *p = (reg_attrs *) x;
329 return ((p->offset * 1000) ^ (long) p->decl);
332 /* Returns nonzero if the value represented by X (which is really a
333 reg_attrs *) is the same as that given by Y (which is also really a
337 reg_attrs_htab_eq (const void *x, const void *y)
339 reg_attrs *p = (reg_attrs *) x;
340 reg_attrs *q = (reg_attrs *) y;
342 return (p->decl == q->decl && p->offset == q->offset);
344 /* Allocate a new reg_attrs structure and insert it into the hash table if
345 one identical to it is not already in the table. We are doing this for
349 get_reg_attrs (tree decl, int offset)
354 /* If everything is the default, we can just return zero. */
355 if (decl == 0 && offset == 0)
359 attrs.offset = offset;
361 slot = htab_find_slot (reg_attrs_htab, &attrs, INSERT);
364 *slot = ggc_alloc (sizeof (reg_attrs));
365 memcpy (*slot, &attrs, sizeof (reg_attrs));
371 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
372 don't attempt to share with the various global pieces of rtl (such as
373 frame_pointer_rtx). */
376 gen_raw_REG (enum machine_mode mode, int regno)
378 rtx x = gen_rtx_raw_REG (mode, regno);
379 ORIGINAL_REGNO (x) = regno;
383 /* There are some RTL codes that require special attention; the generation
384 functions do the raw handling. If you add to this list, modify
385 special_rtx in gengenrtl.c as well. */
388 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED, HOST_WIDE_INT arg)
392 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
393 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
395 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
396 if (const_true_rtx && arg == STORE_FLAG_VALUE)
397 return const_true_rtx;
400 /* Look up the CONST_INT in the hash table. */
401 slot = htab_find_slot_with_hash (const_int_htab, &arg,
402 (hashval_t) arg, INSERT);
404 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
410 gen_int_mode (HOST_WIDE_INT c, enum machine_mode mode)
412 return GEN_INT (trunc_int_for_mode (c, mode));
415 /* CONST_DOUBLEs might be created from pairs of integers, or from
416 REAL_VALUE_TYPEs. Also, their length is known only at run time,
417 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
419 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
420 hash table. If so, return its counterpart; otherwise add it
421 to the hash table and return it. */
423 lookup_const_double (rtx real)
425 void **slot = htab_find_slot (const_double_htab, real, INSERT);
432 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
433 VALUE in mode MODE. */
435 const_double_from_real_value (REAL_VALUE_TYPE value, enum machine_mode mode)
437 rtx real = rtx_alloc (CONST_DOUBLE);
438 PUT_MODE (real, mode);
440 memcpy (&CONST_DOUBLE_LOW (real), &value, sizeof (REAL_VALUE_TYPE));
442 return lookup_const_double (real);
445 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
446 of ints: I0 is the low-order word and I1 is the high-order word.
447 Do not use this routine for non-integer modes; convert to
448 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
451 immed_double_const (HOST_WIDE_INT i0, HOST_WIDE_INT i1, enum machine_mode mode)
456 if (mode != VOIDmode)
459 if (GET_MODE_CLASS (mode) != MODE_INT
460 && GET_MODE_CLASS (mode) != MODE_PARTIAL_INT
461 /* We can get a 0 for an error mark. */
462 && GET_MODE_CLASS (mode) != MODE_VECTOR_INT
463 && GET_MODE_CLASS (mode) != MODE_VECTOR_FLOAT)
466 /* We clear out all bits that don't belong in MODE, unless they and
467 our sign bit are all one. So we get either a reasonable negative
468 value or a reasonable unsigned value for this mode. */
469 width = GET_MODE_BITSIZE (mode);
470 if (width < HOST_BITS_PER_WIDE_INT
471 && ((i0 & ((HOST_WIDE_INT) (-1) << (width - 1)))
472 != ((HOST_WIDE_INT) (-1) << (width - 1))))
473 i0 &= ((HOST_WIDE_INT) 1 << width) - 1, i1 = 0;
474 else if (width == HOST_BITS_PER_WIDE_INT
475 && ! (i1 == ~0 && i0 < 0))
477 else if (width > 2 * HOST_BITS_PER_WIDE_INT)
478 /* We cannot represent this value as a constant. */
481 /* If this would be an entire word for the target, but is not for
482 the host, then sign-extend on the host so that the number will
483 look the same way on the host that it would on the target.
485 For example, when building a 64 bit alpha hosted 32 bit sparc
486 targeted compiler, then we want the 32 bit unsigned value -1 to be
487 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
488 The latter confuses the sparc backend. */
490 if (width < HOST_BITS_PER_WIDE_INT
491 && (i0 & ((HOST_WIDE_INT) 1 << (width - 1))))
492 i0 |= ((HOST_WIDE_INT) (-1) << width);
494 /* If MODE fits within HOST_BITS_PER_WIDE_INT, always use a
497 ??? Strictly speaking, this is wrong if we create a CONST_INT for
498 a large unsigned constant with the size of MODE being
499 HOST_BITS_PER_WIDE_INT and later try to interpret that constant
500 in a wider mode. In that case we will mis-interpret it as a
503 Unfortunately, the only alternative is to make a CONST_DOUBLE for
504 any constant in any mode if it is an unsigned constant larger
505 than the maximum signed integer in an int on the host. However,
506 doing this will break everyone that always expects to see a
507 CONST_INT for SImode and smaller.
509 We have always been making CONST_INTs in this case, so nothing
510 new is being broken. */
512 if (width <= HOST_BITS_PER_WIDE_INT)
513 i1 = (i0 < 0) ? ~(HOST_WIDE_INT) 0 : 0;
516 /* If this integer fits in one word, return a CONST_INT. */
517 if ((i1 == 0 && i0 >= 0) || (i1 == ~0 && i0 < 0))
520 /* We use VOIDmode for integers. */
521 value = rtx_alloc (CONST_DOUBLE);
522 PUT_MODE (value, VOIDmode);
524 CONST_DOUBLE_LOW (value) = i0;
525 CONST_DOUBLE_HIGH (value) = i1;
527 for (i = 2; i < (sizeof CONST_DOUBLE_FORMAT - 1); i++)
528 XWINT (value, i) = 0;
530 return lookup_const_double (value);
534 gen_rtx_REG (enum machine_mode mode, unsigned int regno)
536 /* In case the MD file explicitly references the frame pointer, have
537 all such references point to the same frame pointer. This is
538 used during frame pointer elimination to distinguish the explicit
539 references to these registers from pseudos that happened to be
542 If we have eliminated the frame pointer or arg pointer, we will
543 be using it as a normal register, for example as a spill
544 register. In such cases, we might be accessing it in a mode that
545 is not Pmode and therefore cannot use the pre-allocated rtx.
547 Also don't do this when we are making new REGs in reload, since
548 we don't want to get confused with the real pointers. */
550 if (mode == Pmode && !reload_in_progress)
552 if (regno == FRAME_POINTER_REGNUM
553 && (!reload_completed || frame_pointer_needed))
554 return frame_pointer_rtx;
555 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
556 if (regno == HARD_FRAME_POINTER_REGNUM
557 && (!reload_completed || frame_pointer_needed))
558 return hard_frame_pointer_rtx;
560 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
561 if (regno == ARG_POINTER_REGNUM)
562 return arg_pointer_rtx;
564 #ifdef RETURN_ADDRESS_POINTER_REGNUM
565 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
566 return return_address_pointer_rtx;
568 if (regno == (unsigned) PIC_OFFSET_TABLE_REGNUM
569 && fixed_regs[PIC_OFFSET_TABLE_REGNUM])
570 return pic_offset_table_rtx;
571 if (regno == STACK_POINTER_REGNUM)
572 return stack_pointer_rtx;
576 /* If the per-function register table has been set up, try to re-use
577 an existing entry in that table to avoid useless generation of RTL.
579 This code is disabled for now until we can fix the various backends
580 which depend on having non-shared hard registers in some cases. Long
581 term we want to re-enable this code as it can significantly cut down
582 on the amount of useless RTL that gets generated.
584 We'll also need to fix some code that runs after reload that wants to
585 set ORIGINAL_REGNO. */
590 && regno < FIRST_PSEUDO_REGISTER
591 && reg_raw_mode[regno] == mode)
592 return regno_reg_rtx[regno];
595 return gen_raw_REG (mode, regno);
599 gen_rtx_MEM (enum machine_mode mode, rtx addr)
601 rtx rt = gen_rtx_raw_MEM (mode, addr);
603 /* This field is not cleared by the mere allocation of the rtx, so
611 gen_rtx_SUBREG (enum machine_mode mode, rtx reg, int offset)
613 /* This is the most common failure type.
614 Catch it early so we can see who does it. */
615 if ((offset % GET_MODE_SIZE (mode)) != 0)
618 /* This check isn't usable right now because combine will
619 throw arbitrary crap like a CALL into a SUBREG in
620 gen_lowpart_for_combine so we must just eat it. */
622 /* Check for this too. */
623 if (offset >= GET_MODE_SIZE (GET_MODE (reg)))
626 return gen_rtx_raw_SUBREG (mode, reg, offset);
629 /* Generate a SUBREG representing the least-significant part of REG if MODE
630 is smaller than mode of REG, otherwise paradoxical SUBREG. */
633 gen_lowpart_SUBREG (enum machine_mode mode, rtx reg)
635 enum machine_mode inmode;
637 inmode = GET_MODE (reg);
638 if (inmode == VOIDmode)
640 return gen_rtx_SUBREG (mode, reg,
641 subreg_lowpart_offset (mode, inmode));
644 /* gen_rtvec (n, [rt1, ..., rtn])
646 ** This routine creates an rtvec and stores within it the
647 ** pointers to rtx's which are its arguments.
652 gen_rtvec (int n, ...)
661 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
663 vector = alloca (n * sizeof (rtx));
665 for (i = 0; i < n; i++)
666 vector[i] = va_arg (p, rtx);
668 /* The definition of VA_* in K&R C causes `n' to go out of scope. */
672 return gen_rtvec_v (save_n, vector);
676 gen_rtvec_v (int n, rtx *argp)
682 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
684 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
686 for (i = 0; i < n; i++)
687 rt_val->elem[i] = *argp++;
692 /* Generate a REG rtx for a new pseudo register of mode MODE.
693 This pseudo is assigned the next sequential register number. */
696 gen_reg_rtx (enum machine_mode mode)
698 struct function *f = cfun;
701 /* Don't let anything called after initial flow analysis create new
706 if (generating_concat_p
707 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
708 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
710 /* For complex modes, don't make a single pseudo.
711 Instead, make a CONCAT of two pseudos.
712 This allows noncontiguous allocation of the real and imaginary parts,
713 which makes much better code. Besides, allocating DCmode
714 pseudos overstrains reload on some machines like the 386. */
715 rtx realpart, imagpart;
716 enum machine_mode partmode = GET_MODE_INNER (mode);
718 realpart = gen_reg_rtx (partmode);
719 imagpart = gen_reg_rtx (partmode);
720 return gen_rtx_CONCAT (mode, realpart, imagpart);
723 /* Make sure regno_pointer_align, and regno_reg_rtx are large
724 enough to have an element for this pseudo reg number. */
726 if (reg_rtx_no == f->emit->regno_pointer_align_length)
728 int old_size = f->emit->regno_pointer_align_length;
732 new = ggc_realloc (f->emit->regno_pointer_align, old_size * 2);
733 memset (new + old_size, 0, old_size);
734 f->emit->regno_pointer_align = (unsigned char *) new;
736 new1 = ggc_realloc (f->emit->x_regno_reg_rtx,
737 old_size * 2 * sizeof (rtx));
738 memset (new1 + old_size, 0, old_size * sizeof (rtx));
739 regno_reg_rtx = new1;
741 f->emit->regno_pointer_align_length = old_size * 2;
744 val = gen_raw_REG (mode, reg_rtx_no);
745 regno_reg_rtx[reg_rtx_no++] = val;
749 /* Generate a register with same attributes as REG,
750 but offsetted by OFFSET. */
753 gen_rtx_REG_offset (rtx reg, enum machine_mode mode, unsigned int regno, int offset)
755 rtx new = gen_rtx_REG (mode, regno);
756 REG_ATTRS (new) = get_reg_attrs (REG_EXPR (reg),
757 REG_OFFSET (reg) + offset);
761 /* Set the decl for MEM to DECL. */
764 set_reg_attrs_from_mem (rtx reg, rtx mem)
766 if (MEM_OFFSET (mem) && GET_CODE (MEM_OFFSET (mem)) == CONST_INT)
768 = get_reg_attrs (MEM_EXPR (mem), INTVAL (MEM_OFFSET (mem)));
771 /* Set the register attributes for registers contained in PARM_RTX.
772 Use needed values from memory attributes of MEM. */
775 set_reg_attrs_for_parm (rtx parm_rtx, rtx mem)
777 if (GET_CODE (parm_rtx) == REG)
778 set_reg_attrs_from_mem (parm_rtx, mem);
779 else if (GET_CODE (parm_rtx) == PARALLEL)
781 /* Check for a NULL entry in the first slot, used to indicate that the
782 parameter goes both on the stack and in registers. */
783 int i = XEXP (XVECEXP (parm_rtx, 0, 0), 0) ? 0 : 1;
784 for (; i < XVECLEN (parm_rtx, 0); i++)
786 rtx x = XVECEXP (parm_rtx, 0, i);
787 if (GET_CODE (XEXP (x, 0)) == REG)
788 REG_ATTRS (XEXP (x, 0))
789 = get_reg_attrs (MEM_EXPR (mem),
790 INTVAL (XEXP (x, 1)));
795 /* Assign the RTX X to declaration T. */
797 set_decl_rtl (tree t, rtx x)
799 DECL_CHECK (t)->decl.rtl = x;
803 /* For register, we maintain the reverse information too. */
804 if (GET_CODE (x) == REG)
805 REG_ATTRS (x) = get_reg_attrs (t, 0);
806 else if (GET_CODE (x) == SUBREG)
807 REG_ATTRS (SUBREG_REG (x))
808 = get_reg_attrs (t, -SUBREG_BYTE (x));
809 if (GET_CODE (x) == CONCAT)
811 if (REG_P (XEXP (x, 0)))
812 REG_ATTRS (XEXP (x, 0)) = get_reg_attrs (t, 0);
813 if (REG_P (XEXP (x, 1)))
814 REG_ATTRS (XEXP (x, 1))
815 = get_reg_attrs (t, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x, 0))));
817 if (GET_CODE (x) == PARALLEL)
820 for (i = 0; i < XVECLEN (x, 0); i++)
822 rtx y = XVECEXP (x, 0, i);
823 if (REG_P (XEXP (y, 0)))
824 REG_ATTRS (XEXP (y, 0)) = get_reg_attrs (t, INTVAL (XEXP (y, 1)));
829 /* Assign the RTX X to parameter declaration T. */
831 set_decl_incoming_rtl (tree t, rtx x)
833 DECL_INCOMING_RTL (t) = x;
837 /* For register, we maintain the reverse information too. */
838 if (GET_CODE (x) == REG)
839 REG_ATTRS (x) = get_reg_attrs (t, 0);
840 else if (GET_CODE (x) == SUBREG)
841 REG_ATTRS (SUBREG_REG (x))
842 = get_reg_attrs (t, -SUBREG_BYTE (x));
843 if (GET_CODE (x) == CONCAT)
845 if (REG_P (XEXP (x, 0)))
846 REG_ATTRS (XEXP (x, 0)) = get_reg_attrs (t, 0);
847 if (REG_P (XEXP (x, 1)))
848 REG_ATTRS (XEXP (x, 1))
849 = get_reg_attrs (t, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x, 0))));
851 if (GET_CODE (x) == PARALLEL)
855 /* Check for a NULL entry, used to indicate that the parameter goes
856 both on the stack and in registers. */
857 if (XEXP (XVECEXP (x, 0, 0), 0))
862 for (i = start; i < XVECLEN (x, 0); i++)
864 rtx y = XVECEXP (x, 0, i);
865 if (REG_P (XEXP (y, 0)))
866 REG_ATTRS (XEXP (y, 0)) = get_reg_attrs (t, INTVAL (XEXP (y, 1)));
871 /* Identify REG (which may be a CONCAT) as a user register. */
874 mark_user_reg (rtx reg)
876 if (GET_CODE (reg) == CONCAT)
878 REG_USERVAR_P (XEXP (reg, 0)) = 1;
879 REG_USERVAR_P (XEXP (reg, 1)) = 1;
881 else if (GET_CODE (reg) == REG)
882 REG_USERVAR_P (reg) = 1;
887 /* Identify REG as a probable pointer register and show its alignment
888 as ALIGN, if nonzero. */
891 mark_reg_pointer (rtx reg, int align)
893 if (! REG_POINTER (reg))
895 REG_POINTER (reg) = 1;
898 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
900 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
901 /* We can no-longer be sure just how aligned this pointer is. */
902 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
905 /* Return 1 plus largest pseudo reg number used in the current function. */
913 /* Return 1 + the largest label number used so far in the current function. */
918 if (last_label_num && label_num == base_label_num)
919 return last_label_num;
923 /* Return first label number used in this function (if any were used). */
926 get_first_label_num (void)
928 return first_label_num;
931 /* If the rtx for label was created during the expansion of a nested
932 function, then first_label_num won't include this label number.
933 Fix this now so that array indicies work later. */
936 maybe_set_first_label_num (rtx x)
938 if (CODE_LABEL_NUMBER (x) < first_label_num)
939 first_label_num = CODE_LABEL_NUMBER (x);
942 /* Return the final regno of X, which is a SUBREG of a hard
945 subreg_hard_regno (rtx x, int check_mode)
947 enum machine_mode mode = GET_MODE (x);
948 unsigned int byte_offset, base_regno, final_regno;
949 rtx reg = SUBREG_REG (x);
951 /* This is where we attempt to catch illegal subregs
952 created by the compiler. */
953 if (GET_CODE (x) != SUBREG
954 || GET_CODE (reg) != REG)
956 base_regno = REGNO (reg);
957 if (base_regno >= FIRST_PSEUDO_REGISTER)
959 if (check_mode && ! HARD_REGNO_MODE_OK (base_regno, GET_MODE (reg)))
961 #ifdef ENABLE_CHECKING
962 if (!subreg_offset_representable_p (REGNO (reg), GET_MODE (reg),
963 SUBREG_BYTE (x), mode))
966 /* Catch non-congruent offsets too. */
967 byte_offset = SUBREG_BYTE (x);
968 if ((byte_offset % GET_MODE_SIZE (mode)) != 0)
971 final_regno = subreg_regno (x);
976 /* Return a value representing some low-order bits of X, where the number
977 of low-order bits is given by MODE. Note that no conversion is done
978 between floating-point and fixed-point values, rather, the bit
979 representation is returned.
981 This function handles the cases in common between gen_lowpart, below,
982 and two variants in cse.c and combine.c. These are the cases that can
983 be safely handled at all points in the compilation.
985 If this is not a case we can handle, return 0. */
988 gen_lowpart_common (enum machine_mode mode, rtx x)
990 int msize = GET_MODE_SIZE (mode);
993 enum machine_mode innermode;
995 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
996 so we have to make one up. Yuk. */
997 innermode = GET_MODE (x);
998 if (GET_CODE (x) == CONST_INT && msize <= HOST_BITS_PER_WIDE_INT)
999 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT, MODE_INT, 0);
1000 else if (innermode == VOIDmode)
1001 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT * 2, MODE_INT, 0);
1003 xsize = GET_MODE_SIZE (innermode);
1005 if (innermode == VOIDmode || innermode == BLKmode)
1008 if (innermode == mode)
1011 /* MODE must occupy no more words than the mode of X. */
1012 if ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
1013 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))
1016 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1017 if (GET_MODE_CLASS (mode) == MODE_FLOAT && msize > xsize)
1020 offset = subreg_lowpart_offset (mode, innermode);
1022 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
1023 && (GET_MODE_CLASS (mode) == MODE_INT
1024 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
1026 /* If we are getting the low-order part of something that has been
1027 sign- or zero-extended, we can either just use the object being
1028 extended or make a narrower extension. If we want an even smaller
1029 piece than the size of the object being extended, call ourselves
1032 This case is used mostly by combine and cse. */
1034 if (GET_MODE (XEXP (x, 0)) == mode)
1036 else if (msize < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
1037 return gen_lowpart_common (mode, XEXP (x, 0));
1038 else if (msize < xsize)
1039 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
1041 else if (GET_CODE (x) == SUBREG || GET_CODE (x) == REG
1042 || GET_CODE (x) == CONCAT || GET_CODE (x) == CONST_VECTOR
1043 || GET_CODE (x) == CONST_DOUBLE || GET_CODE (x) == CONST_INT)
1044 return simplify_gen_subreg (mode, x, innermode, offset);
1046 /* Otherwise, we can't do this. */
1050 /* Return the constant real or imaginary part (which has mode MODE)
1051 of a complex value X. The IMAGPART_P argument determines whether
1052 the real or complex component should be returned. This function
1053 returns NULL_RTX if the component isn't a constant. */
1056 gen_complex_constant_part (enum machine_mode mode, rtx x, int imagpart_p)
1060 if (GET_CODE (x) == MEM
1061 && GET_CODE (XEXP (x, 0)) == SYMBOL_REF)
1063 decl = SYMBOL_REF_DECL (XEXP (x, 0));
1064 if (decl != NULL_TREE && TREE_CODE (decl) == COMPLEX_CST)
1066 part = imagpart_p ? TREE_IMAGPART (decl) : TREE_REALPART (decl);
1067 if (TREE_CODE (part) == REAL_CST
1068 || TREE_CODE (part) == INTEGER_CST)
1069 return expand_expr (part, NULL_RTX, mode, 0);
1075 /* Return the real part (which has mode MODE) of a complex value X.
1076 This always comes at the low address in memory. */
1079 gen_realpart (enum machine_mode mode, rtx x)
1083 /* Handle complex constants. */
1084 part = gen_complex_constant_part (mode, x, 0);
1085 if (part != NULL_RTX)
1088 if (WORDS_BIG_ENDIAN
1089 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1091 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1093 ("can't access real part of complex value in hard register");
1094 else if (WORDS_BIG_ENDIAN)
1095 return gen_highpart (mode, x);
1097 return gen_lowpart (mode, x);
1100 /* Return the imaginary part (which has mode MODE) of a complex value X.
1101 This always comes at the high address in memory. */
1104 gen_imagpart (enum machine_mode mode, rtx x)
1108 /* Handle complex constants. */
1109 part = gen_complex_constant_part (mode, x, 1);
1110 if (part != NULL_RTX)
1113 if (WORDS_BIG_ENDIAN)
1114 return gen_lowpart (mode, x);
1115 else if (! WORDS_BIG_ENDIAN
1116 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1118 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1120 ("can't access imaginary part of complex value in hard register");
1122 return gen_highpart (mode, x);
1126 gen_highpart (enum machine_mode mode, rtx x)
1128 unsigned int msize = GET_MODE_SIZE (mode);
1131 /* This case loses if X is a subreg. To catch bugs early,
1132 complain if an invalid MODE is used even in other cases. */
1133 if (msize > UNITS_PER_WORD
1134 && msize != (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x)))
1137 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1138 subreg_highpart_offset (mode, GET_MODE (x)));
1140 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1141 the target if we have a MEM. gen_highpart must return a valid operand,
1142 emitting code if necessary to do so. */
1143 if (result != NULL_RTX && GET_CODE (result) == MEM)
1144 result = validize_mem (result);
1151 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1152 be VOIDmode constant. */
1154 gen_highpart_mode (enum machine_mode outermode, enum machine_mode innermode, rtx exp)
1156 if (GET_MODE (exp) != VOIDmode)
1158 if (GET_MODE (exp) != innermode)
1160 return gen_highpart (outermode, exp);
1162 return simplify_gen_subreg (outermode, exp, innermode,
1163 subreg_highpart_offset (outermode, innermode));
1166 /* Return offset in bytes to get OUTERMODE low part
1167 of the value in mode INNERMODE stored in memory in target format. */
1170 subreg_lowpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1172 unsigned int offset = 0;
1173 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1177 if (WORDS_BIG_ENDIAN)
1178 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1179 if (BYTES_BIG_ENDIAN)
1180 offset += difference % UNITS_PER_WORD;
1186 /* Return offset in bytes to get OUTERMODE high part
1187 of the value in mode INNERMODE stored in memory in target format. */
1189 subreg_highpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1191 unsigned int offset = 0;
1192 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1194 if (GET_MODE_SIZE (innermode) < GET_MODE_SIZE (outermode))
1199 if (! WORDS_BIG_ENDIAN)
1200 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1201 if (! BYTES_BIG_ENDIAN)
1202 offset += difference % UNITS_PER_WORD;
1208 /* Return 1 iff X, assumed to be a SUBREG,
1209 refers to the least significant part of its containing reg.
1210 If X is not a SUBREG, always return 1 (it is its own low part!). */
1213 subreg_lowpart_p (rtx x)
1215 if (GET_CODE (x) != SUBREG)
1217 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1220 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1221 == SUBREG_BYTE (x));
1224 /* Return subword OFFSET of operand OP.
1225 The word number, OFFSET, is interpreted as the word number starting
1226 at the low-order address. OFFSET 0 is the low-order word if not
1227 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1229 If we cannot extract the required word, we return zero. Otherwise,
1230 an rtx corresponding to the requested word will be returned.
1232 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1233 reload has completed, a valid address will always be returned. After
1234 reload, if a valid address cannot be returned, we return zero.
1236 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1237 it is the responsibility of the caller.
1239 MODE is the mode of OP in case it is a CONST_INT.
1241 ??? This is still rather broken for some cases. The problem for the
1242 moment is that all callers of this thing provide no 'goal mode' to
1243 tell us to work with. This exists because all callers were written
1244 in a word based SUBREG world.
1245 Now use of this function can be deprecated by simplify_subreg in most
1250 operand_subword (rtx op, unsigned int offset, int validate_address, enum machine_mode mode)
1252 if (mode == VOIDmode)
1253 mode = GET_MODE (op);
1255 if (mode == VOIDmode)
1258 /* If OP is narrower than a word, fail. */
1260 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1263 /* If we want a word outside OP, return zero. */
1265 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1268 /* Form a new MEM at the requested address. */
1269 if (GET_CODE (op) == MEM)
1271 rtx new = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1273 if (! validate_address)
1276 else if (reload_completed)
1278 if (! strict_memory_address_p (word_mode, XEXP (new, 0)))
1282 return replace_equiv_address (new, XEXP (new, 0));
1285 /* Rest can be handled by simplify_subreg. */
1286 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1289 /* Similar to `operand_subword', but never return 0. If we can't extract
1290 the required subword, put OP into a register and try again. If that fails,
1291 abort. We always validate the address in this case.
1293 MODE is the mode of OP, in case it is CONST_INT. */
1296 operand_subword_force (rtx op, unsigned int offset, enum machine_mode mode)
1298 rtx result = operand_subword (op, offset, 1, mode);
1303 if (mode != BLKmode && mode != VOIDmode)
1305 /* If this is a register which can not be accessed by words, copy it
1306 to a pseudo register. */
1307 if (GET_CODE (op) == REG)
1308 op = copy_to_reg (op);
1310 op = force_reg (mode, op);
1313 result = operand_subword (op, offset, 1, mode);
1320 /* Given a compare instruction, swap the operands.
1321 A test instruction is changed into a compare of 0 against the operand. */
1324 reverse_comparison (rtx insn)
1326 rtx body = PATTERN (insn);
1329 if (GET_CODE (body) == SET)
1330 comp = SET_SRC (body);
1332 comp = SET_SRC (XVECEXP (body, 0, 0));
1334 if (GET_CODE (comp) == COMPARE)
1336 rtx op0 = XEXP (comp, 0);
1337 rtx op1 = XEXP (comp, 1);
1338 XEXP (comp, 0) = op1;
1339 XEXP (comp, 1) = op0;
1343 rtx new = gen_rtx_COMPARE (VOIDmode,
1344 CONST0_RTX (GET_MODE (comp)), comp);
1345 if (GET_CODE (body) == SET)
1346 SET_SRC (body) = new;
1348 SET_SRC (XVECEXP (body, 0, 0)) = new;
1352 /* Within a MEM_EXPR, we care about either (1) a component ref of a decl,
1353 or (2) a component ref of something variable. Represent the later with
1354 a NULL expression. */
1357 component_ref_for_mem_expr (tree ref)
1359 tree inner = TREE_OPERAND (ref, 0);
1361 if (TREE_CODE (inner) == COMPONENT_REF)
1362 inner = component_ref_for_mem_expr (inner);
1365 /* Now remove any conversions: they don't change what the underlying
1366 object is. Likewise for SAVE_EXPR. */
1367 while (TREE_CODE (inner) == NOP_EXPR || TREE_CODE (inner) == CONVERT_EXPR
1368 || TREE_CODE (inner) == NON_LVALUE_EXPR
1369 || TREE_CODE (inner) == VIEW_CONVERT_EXPR
1370 || TREE_CODE (inner) == SAVE_EXPR)
1371 inner = TREE_OPERAND (inner, 0);
1373 if (! DECL_P (inner))
1377 if (inner == TREE_OPERAND (ref, 0))
1380 return build (COMPONENT_REF, TREE_TYPE (ref), inner,
1381 TREE_OPERAND (ref, 1));
1384 /* Returns 1 if both MEM_EXPR can be considered equal
1388 mem_expr_equal_p (tree expr1, tree expr2)
1393 if (! expr1 || ! expr2)
1396 if (TREE_CODE (expr1) != TREE_CODE (expr2))
1399 if (TREE_CODE (expr1) == COMPONENT_REF)
1401 mem_expr_equal_p (TREE_OPERAND (expr1, 0),
1402 TREE_OPERAND (expr2, 0))
1403 && mem_expr_equal_p (TREE_OPERAND (expr1, 1), /* field decl */
1404 TREE_OPERAND (expr2, 1));
1406 if (TREE_CODE (expr1) == INDIRECT_REF)
1407 return mem_expr_equal_p (TREE_OPERAND (expr1, 0),
1408 TREE_OPERAND (expr2, 0));
1410 /* Decls with different pointers can't be equal. */
1414 abort(); /* ARRAY_REFs, ARRAY_RANGE_REFs and BIT_FIELD_REFs should already
1415 have been resolved here. */
1418 /* Given REF, a MEM, and T, either the type of X or the expression
1419 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1420 if we are making a new object of this type. BITPOS is nonzero if
1421 there is an offset outstanding on T that will be applied later. */
1424 set_mem_attributes_minus_bitpos (rtx ref, tree t, int objectp,
1425 HOST_WIDE_INT bitpos)
1427 HOST_WIDE_INT alias = MEM_ALIAS_SET (ref);
1428 tree expr = MEM_EXPR (ref);
1429 rtx offset = MEM_OFFSET (ref);
1430 rtx size = MEM_SIZE (ref);
1431 unsigned int align = MEM_ALIGN (ref);
1432 HOST_WIDE_INT apply_bitpos = 0;
1435 /* It can happen that type_for_mode was given a mode for which there
1436 is no language-level type. In which case it returns NULL, which
1441 type = TYPE_P (t) ? t : TREE_TYPE (t);
1442 if (type == error_mark_node)
1445 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1446 wrong answer, as it assumes that DECL_RTL already has the right alias
1447 info. Callers should not set DECL_RTL until after the call to
1448 set_mem_attributes. */
1449 if (DECL_P (t) && ref == DECL_RTL_IF_SET (t))
1452 /* Get the alias set from the expression or type (perhaps using a
1453 front-end routine) and use it. */
1454 alias = get_alias_set (t);
1456 MEM_VOLATILE_P (ref) |= TYPE_VOLATILE (type);
1457 MEM_IN_STRUCT_P (ref) = AGGREGATE_TYPE_P (type);
1458 RTX_UNCHANGING_P (ref)
1459 |= ((lang_hooks.honor_readonly
1460 && (TYPE_READONLY (type) || (t != type && TREE_READONLY (t))))
1461 || (! TYPE_P (t) && TREE_CONSTANT (t)));
1462 MEM_POINTER (ref) = POINTER_TYPE_P (type);
1464 /* If we are making an object of this type, or if this is a DECL, we know
1465 that it is a scalar if the type is not an aggregate. */
1466 if ((objectp || DECL_P (t)) && ! AGGREGATE_TYPE_P (type))
1467 MEM_SCALAR_P (ref) = 1;
1469 /* We can set the alignment from the type if we are making an object,
1470 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1471 if (objectp || TREE_CODE (t) == INDIRECT_REF || TYPE_ALIGN_OK (type))
1472 align = MAX (align, TYPE_ALIGN (type));
1474 /* If the size is known, we can set that. */
1475 if (TYPE_SIZE_UNIT (type) && host_integerp (TYPE_SIZE_UNIT (type), 1))
1476 size = GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type), 1));
1478 /* If T is not a type, we may be able to deduce some more information about
1482 maybe_set_unchanging (ref, t);
1483 if (TREE_THIS_VOLATILE (t))
1484 MEM_VOLATILE_P (ref) = 1;
1486 /* Now remove any conversions: they don't change what the underlying
1487 object is. Likewise for SAVE_EXPR. */
1488 while (TREE_CODE (t) == NOP_EXPR || TREE_CODE (t) == CONVERT_EXPR
1489 || TREE_CODE (t) == NON_LVALUE_EXPR
1490 || TREE_CODE (t) == VIEW_CONVERT_EXPR
1491 || TREE_CODE (t) == SAVE_EXPR)
1492 t = TREE_OPERAND (t, 0);
1494 /* If this expression can't be addressed (e.g., it contains a reference
1495 to a non-addressable field), show we don't change its alias set. */
1496 if (! can_address_p (t))
1497 MEM_KEEP_ALIAS_SET_P (ref) = 1;
1499 /* If this is a decl, set the attributes of the MEM from it. */
1503 offset = const0_rtx;
1504 apply_bitpos = bitpos;
1505 size = (DECL_SIZE_UNIT (t)
1506 && host_integerp (DECL_SIZE_UNIT (t), 1)
1507 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t), 1)) : 0);
1508 align = DECL_ALIGN (t);
1511 /* If this is a constant, we know the alignment. */
1512 else if (TREE_CODE_CLASS (TREE_CODE (t)) == 'c')
1514 align = TYPE_ALIGN (type);
1515 #ifdef CONSTANT_ALIGNMENT
1516 align = CONSTANT_ALIGNMENT (t, align);
1520 /* If this is a field reference and not a bit-field, record it. */
1521 /* ??? There is some information that can be gleened from bit-fields,
1522 such as the word offset in the structure that might be modified.
1523 But skip it for now. */
1524 else if (TREE_CODE (t) == COMPONENT_REF
1525 && ! DECL_BIT_FIELD (TREE_OPERAND (t, 1)))
1527 expr = component_ref_for_mem_expr (t);
1528 offset = const0_rtx;
1529 apply_bitpos = bitpos;
1530 /* ??? Any reason the field size would be different than
1531 the size we got from the type? */
1534 /* If this is an array reference, look for an outer field reference. */
1535 else if (TREE_CODE (t) == ARRAY_REF)
1537 tree off_tree = size_zero_node;
1538 /* We can't modify t, because we use it at the end of the
1544 tree index = TREE_OPERAND (t2, 1);
1545 tree array = TREE_OPERAND (t2, 0);
1546 tree domain = TYPE_DOMAIN (TREE_TYPE (array));
1547 tree low_bound = (domain ? TYPE_MIN_VALUE (domain) : 0);
1548 tree unit_size = TYPE_SIZE_UNIT (TREE_TYPE (TREE_TYPE (array)));
1550 /* We assume all arrays have sizes that are a multiple of a byte.
1551 First subtract the lower bound, if any, in the type of the
1552 index, then convert to sizetype and multiply by the size of the
1554 if (low_bound != 0 && ! integer_zerop (low_bound))
1555 index = fold (build (MINUS_EXPR, TREE_TYPE (index),
1558 /* If the index has a self-referential type, instantiate it;
1559 likewise for the component size. */
1560 index = SUBSTITUTE_PLACEHOLDER_IN_EXPR (index, t2);
1561 unit_size = SUBSTITUTE_PLACEHOLDER_IN_EXPR (unit_size, array);
1563 = fold (build (PLUS_EXPR, sizetype,
1564 fold (build (MULT_EXPR, sizetype,
1567 t2 = TREE_OPERAND (t2, 0);
1569 while (TREE_CODE (t2) == ARRAY_REF);
1575 if (host_integerp (off_tree, 1))
1577 HOST_WIDE_INT ioff = tree_low_cst (off_tree, 1);
1578 HOST_WIDE_INT aoff = (ioff & -ioff) * BITS_PER_UNIT;
1579 align = DECL_ALIGN (t2);
1580 if (aoff && (unsigned HOST_WIDE_INT) aoff < align)
1582 offset = GEN_INT (ioff);
1583 apply_bitpos = bitpos;
1586 else if (TREE_CODE (t2) == COMPONENT_REF)
1588 expr = component_ref_for_mem_expr (t2);
1589 if (host_integerp (off_tree, 1))
1591 offset = GEN_INT (tree_low_cst (off_tree, 1));
1592 apply_bitpos = bitpos;
1594 /* ??? Any reason the field size would be different than
1595 the size we got from the type? */
1597 else if (flag_argument_noalias > 1
1598 && TREE_CODE (t2) == INDIRECT_REF
1599 && TREE_CODE (TREE_OPERAND (t2, 0)) == PARM_DECL)
1606 /* If this is a Fortran indirect argument reference, record the
1608 else if (flag_argument_noalias > 1
1609 && TREE_CODE (t) == INDIRECT_REF
1610 && TREE_CODE (TREE_OPERAND (t, 0)) == PARM_DECL)
1617 /* If we modified OFFSET based on T, then subtract the outstanding
1618 bit position offset. Similarly, increase the size of the accessed
1619 object to contain the negative offset. */
1622 offset = plus_constant (offset, -(apply_bitpos / BITS_PER_UNIT));
1624 size = plus_constant (size, apply_bitpos / BITS_PER_UNIT);
1627 /* Now set the attributes we computed above. */
1629 = get_mem_attrs (alias, expr, offset, size, align, GET_MODE (ref));
1631 /* If this is already known to be a scalar or aggregate, we are done. */
1632 if (MEM_IN_STRUCT_P (ref) || MEM_SCALAR_P (ref))
1635 /* If it is a reference into an aggregate, this is part of an aggregate.
1636 Otherwise we don't know. */
1637 else if (TREE_CODE (t) == COMPONENT_REF || TREE_CODE (t) == ARRAY_REF
1638 || TREE_CODE (t) == ARRAY_RANGE_REF
1639 || TREE_CODE (t) == BIT_FIELD_REF)
1640 MEM_IN_STRUCT_P (ref) = 1;
1644 set_mem_attributes (rtx ref, tree t, int objectp)
1646 set_mem_attributes_minus_bitpos (ref, t, objectp, 0);
1649 /* Set the decl for MEM to DECL. */
1652 set_mem_attrs_from_reg (rtx mem, rtx reg)
1655 = get_mem_attrs (MEM_ALIAS_SET (mem), REG_EXPR (reg),
1656 GEN_INT (REG_OFFSET (reg)),
1657 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
1660 /* Set the alias set of MEM to SET. */
1663 set_mem_alias_set (rtx mem, HOST_WIDE_INT set)
1665 #ifdef ENABLE_CHECKING
1666 /* If the new and old alias sets don't conflict, something is wrong. */
1667 if (!alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)))
1671 MEM_ATTRS (mem) = get_mem_attrs (set, MEM_EXPR (mem), MEM_OFFSET (mem),
1672 MEM_SIZE (mem), MEM_ALIGN (mem),
1676 /* Set the alignment of MEM to ALIGN bits. */
1679 set_mem_align (rtx mem, unsigned int align)
1681 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1682 MEM_OFFSET (mem), MEM_SIZE (mem), align,
1686 /* Set the expr for MEM to EXPR. */
1689 set_mem_expr (rtx mem, tree expr)
1692 = get_mem_attrs (MEM_ALIAS_SET (mem), expr, MEM_OFFSET (mem),
1693 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
1696 /* Set the offset of MEM to OFFSET. */
1699 set_mem_offset (rtx mem, rtx offset)
1701 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1702 offset, MEM_SIZE (mem), MEM_ALIGN (mem),
1706 /* Set the size of MEM to SIZE. */
1709 set_mem_size (rtx mem, rtx size)
1711 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1712 MEM_OFFSET (mem), size, MEM_ALIGN (mem),
1716 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1717 and its address changed to ADDR. (VOIDmode means don't change the mode.
1718 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1719 returned memory location is required to be valid. The memory
1720 attributes are not changed. */
1723 change_address_1 (rtx memref, enum machine_mode mode, rtx addr, int validate)
1727 if (GET_CODE (memref) != MEM)
1729 if (mode == VOIDmode)
1730 mode = GET_MODE (memref);
1732 addr = XEXP (memref, 0);
1733 if (mode == GET_MODE (memref) && addr == XEXP (memref, 0)
1734 && (!validate || memory_address_p (mode, addr)))
1739 if (reload_in_progress || reload_completed)
1741 if (! memory_address_p (mode, addr))
1745 addr = memory_address (mode, addr);
1748 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1751 new = gen_rtx_MEM (mode, addr);
1752 MEM_COPY_ATTRIBUTES (new, memref);
1756 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1757 way we are changing MEMREF, so we only preserve the alias set. */
1760 change_address (rtx memref, enum machine_mode mode, rtx addr)
1762 rtx new = change_address_1 (memref, mode, addr, 1), size;
1763 enum machine_mode mmode = GET_MODE (new);
1766 size = mmode == BLKmode ? 0 : GEN_INT (GET_MODE_SIZE (mmode));
1767 align = mmode == BLKmode ? BITS_PER_UNIT : GET_MODE_ALIGNMENT (mmode);
1769 /* If there are no changes, just return the original memory reference. */
1772 if (MEM_ATTRS (memref) == 0
1773 || (MEM_EXPR (memref) == NULL
1774 && MEM_OFFSET (memref) == NULL
1775 && MEM_SIZE (memref) == size
1776 && MEM_ALIGN (memref) == align))
1779 new = gen_rtx_MEM (mmode, XEXP (memref, 0));
1780 MEM_COPY_ATTRIBUTES (new, memref);
1784 = get_mem_attrs (MEM_ALIAS_SET (memref), 0, 0, size, align, mmode);
1789 /* Return a memory reference like MEMREF, but with its mode changed
1790 to MODE and its address offset by OFFSET bytes. If VALIDATE is
1791 nonzero, the memory address is forced to be valid.
1792 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
1793 and caller is responsible for adjusting MEMREF base register. */
1796 adjust_address_1 (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset,
1797 int validate, int adjust)
1799 rtx addr = XEXP (memref, 0);
1801 rtx memoffset = MEM_OFFSET (memref);
1803 unsigned int memalign = MEM_ALIGN (memref);
1805 /* If there are no changes, just return the original memory reference. */
1806 if (mode == GET_MODE (memref) && !offset
1807 && (!validate || memory_address_p (mode, addr)))
1810 /* ??? Prefer to create garbage instead of creating shared rtl.
1811 This may happen even if offset is nonzero -- consider
1812 (plus (plus reg reg) const_int) -- so do this always. */
1813 addr = copy_rtx (addr);
1817 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
1818 object, we can merge it into the LO_SUM. */
1819 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
1821 && (unsigned HOST_WIDE_INT) offset
1822 < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
1823 addr = gen_rtx_LO_SUM (Pmode, XEXP (addr, 0),
1824 plus_constant (XEXP (addr, 1), offset));
1826 addr = plus_constant (addr, offset);
1829 new = change_address_1 (memref, mode, addr, validate);
1831 /* Compute the new values of the memory attributes due to this adjustment.
1832 We add the offsets and update the alignment. */
1834 memoffset = GEN_INT (offset + INTVAL (memoffset));
1836 /* Compute the new alignment by taking the MIN of the alignment and the
1837 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
1842 (unsigned HOST_WIDE_INT) (offset & -offset) * BITS_PER_UNIT);
1844 /* We can compute the size in a number of ways. */
1845 if (GET_MODE (new) != BLKmode)
1846 size = GEN_INT (GET_MODE_SIZE (GET_MODE (new)));
1847 else if (MEM_SIZE (memref))
1848 size = plus_constant (MEM_SIZE (memref), -offset);
1850 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref),
1851 memoffset, size, memalign, GET_MODE (new));
1853 /* At some point, we should validate that this offset is within the object,
1854 if all the appropriate values are known. */
1858 /* Return a memory reference like MEMREF, but with its mode changed
1859 to MODE and its address changed to ADDR, which is assumed to be
1860 MEMREF offseted by OFFSET bytes. If VALIDATE is
1861 nonzero, the memory address is forced to be valid. */
1864 adjust_automodify_address_1 (rtx memref, enum machine_mode mode, rtx addr,
1865 HOST_WIDE_INT offset, int validate)
1867 memref = change_address_1 (memref, VOIDmode, addr, validate);
1868 return adjust_address_1 (memref, mode, offset, validate, 0);
1871 /* Return a memory reference like MEMREF, but whose address is changed by
1872 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
1873 known to be in OFFSET (possibly 1). */
1876 offset_address (rtx memref, rtx offset, unsigned HOST_WIDE_INT pow2)
1878 rtx new, addr = XEXP (memref, 0);
1880 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
1882 /* At this point we don't know _why_ the address is invalid. It
1883 could have secondary memory references, multiplies or anything.
1885 However, if we did go and rearrange things, we can wind up not
1886 being able to recognize the magic around pic_offset_table_rtx.
1887 This stuff is fragile, and is yet another example of why it is
1888 bad to expose PIC machinery too early. */
1889 if (! memory_address_p (GET_MODE (memref), new)
1890 && GET_CODE (addr) == PLUS
1891 && XEXP (addr, 0) == pic_offset_table_rtx)
1893 addr = force_reg (GET_MODE (addr), addr);
1894 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
1897 update_temp_slot_address (XEXP (memref, 0), new);
1898 new = change_address_1 (memref, VOIDmode, new, 1);
1900 /* If there are no changes, just return the original memory reference. */
1904 /* Update the alignment to reflect the offset. Reset the offset, which
1907 = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref), 0, 0,
1908 MIN (MEM_ALIGN (memref), pow2 * BITS_PER_UNIT),
1913 /* Return a memory reference like MEMREF, but with its address changed to
1914 ADDR. The caller is asserting that the actual piece of memory pointed
1915 to is the same, just the form of the address is being changed, such as
1916 by putting something into a register. */
1919 replace_equiv_address (rtx memref, rtx addr)
1921 /* change_address_1 copies the memory attribute structure without change
1922 and that's exactly what we want here. */
1923 update_temp_slot_address (XEXP (memref, 0), addr);
1924 return change_address_1 (memref, VOIDmode, addr, 1);
1927 /* Likewise, but the reference is not required to be valid. */
1930 replace_equiv_address_nv (rtx memref, rtx addr)
1932 return change_address_1 (memref, VOIDmode, addr, 0);
1935 /* Return a memory reference like MEMREF, but with its mode widened to
1936 MODE and offset by OFFSET. This would be used by targets that e.g.
1937 cannot issue QImode memory operations and have to use SImode memory
1938 operations plus masking logic. */
1941 widen_memory_access (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset)
1943 rtx new = adjust_address_1 (memref, mode, offset, 1, 1);
1944 tree expr = MEM_EXPR (new);
1945 rtx memoffset = MEM_OFFSET (new);
1946 unsigned int size = GET_MODE_SIZE (mode);
1948 /* If there are no changes, just return the original memory reference. */
1952 /* If we don't know what offset we were at within the expression, then
1953 we can't know if we've overstepped the bounds. */
1959 if (TREE_CODE (expr) == COMPONENT_REF)
1961 tree field = TREE_OPERAND (expr, 1);
1963 if (! DECL_SIZE_UNIT (field))
1969 /* Is the field at least as large as the access? If so, ok,
1970 otherwise strip back to the containing structure. */
1971 if (TREE_CODE (DECL_SIZE_UNIT (field)) == INTEGER_CST
1972 && compare_tree_int (DECL_SIZE_UNIT (field), size) >= 0
1973 && INTVAL (memoffset) >= 0)
1976 if (! host_integerp (DECL_FIELD_OFFSET (field), 1))
1982 expr = TREE_OPERAND (expr, 0);
1983 memoffset = (GEN_INT (INTVAL (memoffset)
1984 + tree_low_cst (DECL_FIELD_OFFSET (field), 1)
1985 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 1)
1988 /* Similarly for the decl. */
1989 else if (DECL_P (expr)
1990 && DECL_SIZE_UNIT (expr)
1991 && TREE_CODE (DECL_SIZE_UNIT (expr)) == INTEGER_CST
1992 && compare_tree_int (DECL_SIZE_UNIT (expr), size) >= 0
1993 && (! memoffset || INTVAL (memoffset) >= 0))
1997 /* The widened memory access overflows the expression, which means
1998 that it could alias another expression. Zap it. */
2005 memoffset = NULL_RTX;
2007 /* The widened memory may alias other stuff, so zap the alias set. */
2008 /* ??? Maybe use get_alias_set on any remaining expression. */
2010 MEM_ATTRS (new) = get_mem_attrs (0, expr, memoffset, GEN_INT (size),
2011 MEM_ALIGN (new), mode);
2016 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2019 gen_label_rtx (void)
2021 return gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX, NULL_RTX,
2022 NULL, label_num++, NULL);
2025 /* For procedure integration. */
2027 /* Install new pointers to the first and last insns in the chain.
2028 Also, set cur_insn_uid to one higher than the last in use.
2029 Used for an inline-procedure after copying the insn chain. */
2032 set_new_first_and_last_insn (rtx first, rtx last)
2040 for (insn = first; insn; insn = NEXT_INSN (insn))
2041 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2046 /* Set the last label number found in the current function.
2047 This is used when belatedly compiling an inline function. */
2050 set_new_last_label_num (int last)
2052 base_label_num = label_num;
2053 last_label_num = last;
2056 /* Restore all variables describing the current status from the structure *P.
2057 This is used after a nested function. */
2060 restore_emit_status (struct function *p ATTRIBUTE_UNUSED)
2065 /* Go through all the RTL insn bodies and copy any invalid shared
2066 structure. This routine should only be called once. */
2069 unshare_all_rtl (tree fndecl, rtx insn)
2073 /* Make sure that virtual parameters are not shared. */
2074 for (decl = DECL_ARGUMENTS (fndecl); decl; decl = TREE_CHAIN (decl))
2075 SET_DECL_RTL (decl, copy_rtx_if_shared (DECL_RTL (decl)));
2077 /* Make sure that virtual stack slots are not shared. */
2078 unshare_all_decls (DECL_INITIAL (fndecl));
2080 /* Unshare just about everything else. */
2081 unshare_all_rtl_in_chain (insn);
2083 /* Make sure the addresses of stack slots found outside the insn chain
2084 (such as, in DECL_RTL of a variable) are not shared
2085 with the insn chain.
2087 This special care is necessary when the stack slot MEM does not
2088 actually appear in the insn chain. If it does appear, its address
2089 is unshared from all else at that point. */
2090 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
2093 /* Go through all the RTL insn bodies and copy any invalid shared
2094 structure, again. This is a fairly expensive thing to do so it
2095 should be done sparingly. */
2098 unshare_all_rtl_again (rtx insn)
2103 for (p = insn; p; p = NEXT_INSN (p))
2106 reset_used_flags (PATTERN (p));
2107 reset_used_flags (REG_NOTES (p));
2108 reset_used_flags (LOG_LINKS (p));
2111 /* Make sure that virtual stack slots are not shared. */
2112 reset_used_decls (DECL_INITIAL (cfun->decl));
2114 /* Make sure that virtual parameters are not shared. */
2115 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
2116 reset_used_flags (DECL_RTL (decl));
2118 reset_used_flags (stack_slot_list);
2120 unshare_all_rtl (cfun->decl, insn);
2123 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2124 Recursively does the same for subexpressions. */
2127 verify_rtx_sharing (rtx orig, rtx insn)
2132 const char *format_ptr;
2137 code = GET_CODE (x);
2139 /* These types may be freely shared. */
2155 /* SCRATCH must be shared because they represent distinct values. */
2157 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
2162 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2163 a LABEL_REF, it isn't sharable. */
2164 if (GET_CODE (XEXP (x, 0)) == PLUS
2165 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
2166 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
2171 /* A MEM is allowed to be shared if its address is constant. */
2172 if (CONSTANT_ADDRESS_P (XEXP (x, 0))
2173 || reload_completed || reload_in_progress)
2182 /* This rtx may not be shared. If it has already been seen,
2183 replace it with a copy of itself. */
2185 if (RTX_FLAG (x, used))
2187 error ("Invalid rtl sharing found in the insn");
2189 error ("Shared rtx");
2193 RTX_FLAG (x, used) = 1;
2195 /* Now scan the subexpressions recursively. */
2197 format_ptr = GET_RTX_FORMAT (code);
2199 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2201 switch (*format_ptr++)
2204 verify_rtx_sharing (XEXP (x, i), insn);
2208 if (XVEC (x, i) != NULL)
2211 int len = XVECLEN (x, i);
2213 for (j = 0; j < len; j++)
2215 /* We allow sharing of ASM_OPERANDS inside single instruction. */
2216 if (j && GET_CODE (XVECEXP (x, i, j)) == SET
2217 && GET_CODE (SET_SRC (XVECEXP (x, i, j))) == ASM_OPERANDS)
2218 verify_rtx_sharing (SET_DEST (XVECEXP (x, i, j)), insn);
2220 verify_rtx_sharing (XVECEXP (x, i, j), insn);
2229 /* Go through all the RTL insn bodies and check that there is no unexpected
2230 sharing in between the subexpressions. */
2233 verify_rtl_sharing (void)
2237 for (p = get_insns (); p; p = NEXT_INSN (p))
2240 reset_used_flags (PATTERN (p));
2241 reset_used_flags (REG_NOTES (p));
2242 reset_used_flags (LOG_LINKS (p));
2245 for (p = get_insns (); p; p = NEXT_INSN (p))
2248 verify_rtx_sharing (PATTERN (p), p);
2249 verify_rtx_sharing (REG_NOTES (p), p);
2250 verify_rtx_sharing (LOG_LINKS (p), p);
2254 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2255 Assumes the mark bits are cleared at entry. */
2258 unshare_all_rtl_in_chain (rtx insn)
2260 for (; insn; insn = NEXT_INSN (insn))
2263 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
2264 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
2265 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
2269 /* Go through all virtual stack slots of a function and copy any
2270 shared structure. */
2272 unshare_all_decls (tree blk)
2276 /* Copy shared decls. */
2277 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2278 if (DECL_RTL_SET_P (t))
2279 SET_DECL_RTL (t, copy_rtx_if_shared (DECL_RTL (t)));
2281 /* Now process sub-blocks. */
2282 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2283 unshare_all_decls (t);
2286 /* Go through all virtual stack slots of a function and mark them as
2289 reset_used_decls (tree blk)
2294 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2295 if (DECL_RTL_SET_P (t))
2296 reset_used_flags (DECL_RTL (t));
2298 /* Now process sub-blocks. */
2299 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2300 reset_used_decls (t);
2303 /* Similar to `copy_rtx' except that if MAY_SHARE is present, it is
2304 placed in the result directly, rather than being copied. MAY_SHARE is
2305 either a MEM of an EXPR_LIST of MEMs. */
2308 copy_most_rtx (rtx orig, rtx may_share)
2313 const char *format_ptr;
2315 if (orig == may_share
2316 || (GET_CODE (may_share) == EXPR_LIST
2317 && in_expr_list_p (may_share, orig)))
2320 code = GET_CODE (orig);
2338 copy = rtx_alloc (code);
2339 PUT_MODE (copy, GET_MODE (orig));
2340 RTX_FLAG (copy, in_struct) = RTX_FLAG (orig, in_struct);
2341 RTX_FLAG (copy, volatil) = RTX_FLAG (orig, volatil);
2342 RTX_FLAG (copy, unchanging) = RTX_FLAG (orig, unchanging);
2343 RTX_FLAG (copy, frame_related) = RTX_FLAG (orig, frame_related);
2344 RTX_FLAG (copy, return_val) = RTX_FLAG (orig, return_val);
2346 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
2348 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
2350 switch (*format_ptr++)
2353 XEXP (copy, i) = XEXP (orig, i);
2354 if (XEXP (orig, i) != NULL && XEXP (orig, i) != may_share)
2355 XEXP (copy, i) = copy_most_rtx (XEXP (orig, i), may_share);
2359 XEXP (copy, i) = XEXP (orig, i);
2364 XVEC (copy, i) = XVEC (orig, i);
2365 if (XVEC (orig, i) != NULL)
2367 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
2368 for (j = 0; j < XVECLEN (copy, i); j++)
2369 XVECEXP (copy, i, j)
2370 = copy_most_rtx (XVECEXP (orig, i, j), may_share);
2375 XWINT (copy, i) = XWINT (orig, i);
2380 XINT (copy, i) = XINT (orig, i);
2384 XTREE (copy, i) = XTREE (orig, i);
2389 XSTR (copy, i) = XSTR (orig, i);
2393 X0ANY (copy, i) = X0ANY (orig, i);
2403 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2404 Recursively does the same for subexpressions. Uses
2405 copy_rtx_if_shared_1 to reduce stack space. */
2408 copy_rtx_if_shared (rtx orig)
2410 copy_rtx_if_shared_1 (&orig);
2414 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2415 use. Recursively does the same for subexpressions. */
2418 copy_rtx_if_shared_1 (rtx *orig1)
2424 const char *format_ptr;
2428 /* Repeat is used to turn tail-recursion into iteration. */
2435 code = GET_CODE (x);
2437 /* These types may be freely shared. */
2452 /* SCRATCH must be shared because they represent distinct values. */
2455 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
2460 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2461 a LABEL_REF, it isn't sharable. */
2462 if (GET_CODE (XEXP (x, 0)) == PLUS
2463 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
2464 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
2473 /* The chain of insns is not being copied. */
2480 /* This rtx may not be shared. If it has already been seen,
2481 replace it with a copy of itself. */
2483 if (RTX_FLAG (x, used))
2487 copy = rtx_alloc (code);
2488 memcpy (copy, x, RTX_SIZE (code));
2492 RTX_FLAG (x, used) = 1;
2494 /* Now scan the subexpressions recursively.
2495 We can store any replaced subexpressions directly into X
2496 since we know X is not shared! Any vectors in X
2497 must be copied if X was copied. */
2499 format_ptr = GET_RTX_FORMAT (code);
2500 length = GET_RTX_LENGTH (code);
2503 for (i = 0; i < length; i++)
2505 switch (*format_ptr++)
2509 copy_rtx_if_shared_1 (last_ptr);
2510 last_ptr = &XEXP (x, i);
2514 if (XVEC (x, i) != NULL)
2517 int len = XVECLEN (x, i);
2519 /* Copy the vector iff I copied the rtx and the length
2521 if (copied && len > 0)
2522 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
2524 /* Call recursively on all inside the vector. */
2525 for (j = 0; j < len; j++)
2528 copy_rtx_if_shared_1 (last_ptr);
2529 last_ptr = &XVECEXP (x, i, j);
2544 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2545 to look for shared sub-parts. */
2548 reset_used_flags (rtx x)
2552 const char *format_ptr;
2555 /* Repeat is used to turn tail-recursion into iteration. */
2560 code = GET_CODE (x);
2562 /* These types may be freely shared so we needn't do any resetting
2584 /* The chain of insns is not being copied. */
2591 RTX_FLAG (x, used) = 0;
2593 format_ptr = GET_RTX_FORMAT (code);
2594 length = GET_RTX_LENGTH (code);
2596 for (i = 0; i < length; i++)
2598 switch (*format_ptr++)
2606 reset_used_flags (XEXP (x, i));
2610 for (j = 0; j < XVECLEN (x, i); j++)
2611 reset_used_flags (XVECEXP (x, i, j));
2617 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
2618 to look for shared sub-parts. */
2621 set_used_flags (rtx x)
2625 const char *format_ptr;
2630 code = GET_CODE (x);
2632 /* These types may be freely shared so we needn't do any resetting
2654 /* The chain of insns is not being copied. */
2661 RTX_FLAG (x, used) = 1;
2663 format_ptr = GET_RTX_FORMAT (code);
2664 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2666 switch (*format_ptr++)
2669 set_used_flags (XEXP (x, i));
2673 for (j = 0; j < XVECLEN (x, i); j++)
2674 set_used_flags (XVECEXP (x, i, j));
2680 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2681 Return X or the rtx for the pseudo reg the value of X was copied into.
2682 OTHER must be valid as a SET_DEST. */
2685 make_safe_from (rtx x, rtx other)
2688 switch (GET_CODE (other))
2691 other = SUBREG_REG (other);
2693 case STRICT_LOW_PART:
2696 other = XEXP (other, 0);
2702 if ((GET_CODE (other) == MEM
2704 && GET_CODE (x) != REG
2705 && GET_CODE (x) != SUBREG)
2706 || (GET_CODE (other) == REG
2707 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2708 || reg_mentioned_p (other, x))))
2710 rtx temp = gen_reg_rtx (GET_MODE (x));
2711 emit_move_insn (temp, x);
2717 /* Emission of insns (adding them to the doubly-linked list). */
2719 /* Return the first insn of the current sequence or current function. */
2727 /* Specify a new insn as the first in the chain. */
2730 set_first_insn (rtx insn)
2732 if (PREV_INSN (insn) != 0)
2737 /* Return the last insn emitted in current sequence or current function. */
2740 get_last_insn (void)
2745 /* Specify a new insn as the last in the chain. */
2748 set_last_insn (rtx insn)
2750 if (NEXT_INSN (insn) != 0)
2755 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2758 get_last_insn_anywhere (void)
2760 struct sequence_stack *stack;
2763 for (stack = seq_stack; stack; stack = stack->next)
2764 if (stack->last != 0)
2769 /* Return the first nonnote insn emitted in current sequence or current
2770 function. This routine looks inside SEQUENCEs. */
2773 get_first_nonnote_insn (void)
2775 rtx insn = first_insn;
2779 insn = next_insn (insn);
2780 if (insn == 0 || GET_CODE (insn) != NOTE)
2787 /* Return the last nonnote insn emitted in current sequence or current
2788 function. This routine looks inside SEQUENCEs. */
2791 get_last_nonnote_insn (void)
2793 rtx insn = last_insn;
2797 insn = previous_insn (insn);
2798 if (insn == 0 || GET_CODE (insn) != NOTE)
2805 /* Return a number larger than any instruction's uid in this function. */
2810 return cur_insn_uid;
2813 /* Renumber instructions so that no instruction UIDs are wasted. */
2816 renumber_insns (FILE *stream)
2820 /* If we're not supposed to renumber instructions, don't. */
2821 if (!flag_renumber_insns)
2824 /* If there aren't that many instructions, then it's not really
2825 worth renumbering them. */
2826 if (flag_renumber_insns == 1 && get_max_uid () < 25000)
2831 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
2834 fprintf (stream, "Renumbering insn %d to %d\n",
2835 INSN_UID (insn), cur_insn_uid);
2836 INSN_UID (insn) = cur_insn_uid++;
2840 /* Return the next insn. If it is a SEQUENCE, return the first insn
2844 next_insn (rtx insn)
2848 insn = NEXT_INSN (insn);
2849 if (insn && GET_CODE (insn) == INSN
2850 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2851 insn = XVECEXP (PATTERN (insn), 0, 0);
2857 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2861 previous_insn (rtx insn)
2865 insn = PREV_INSN (insn);
2866 if (insn && GET_CODE (insn) == INSN
2867 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2868 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
2874 /* Return the next insn after INSN that is not a NOTE. This routine does not
2875 look inside SEQUENCEs. */
2878 next_nonnote_insn (rtx insn)
2882 insn = NEXT_INSN (insn);
2883 if (insn == 0 || GET_CODE (insn) != NOTE)
2890 /* Return the previous insn before INSN that is not a NOTE. This routine does
2891 not look inside SEQUENCEs. */
2894 prev_nonnote_insn (rtx insn)
2898 insn = PREV_INSN (insn);
2899 if (insn == 0 || GET_CODE (insn) != NOTE)
2906 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2907 or 0, if there is none. This routine does not look inside
2911 next_real_insn (rtx insn)
2915 insn = NEXT_INSN (insn);
2916 if (insn == 0 || INSN_P (insn))
2923 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2924 or 0, if there is none. This routine does not look inside
2928 prev_real_insn (rtx insn)
2932 insn = PREV_INSN (insn);
2933 if (insn == 0 || INSN_P (insn))
2940 /* Return the last CALL_INSN in the current list, or 0 if there is none.
2941 This routine does not look inside SEQUENCEs. */
2944 last_call_insn (void)
2948 for (insn = get_last_insn ();
2949 insn && GET_CODE (insn) != CALL_INSN;
2950 insn = PREV_INSN (insn))
2956 /* Find the next insn after INSN that really does something. This routine
2957 does not look inside SEQUENCEs. Until reload has completed, this is the
2958 same as next_real_insn. */
2961 active_insn_p (rtx insn)
2963 return (GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
2964 || (GET_CODE (insn) == INSN
2965 && (! reload_completed
2966 || (GET_CODE (PATTERN (insn)) != USE
2967 && GET_CODE (PATTERN (insn)) != CLOBBER))));
2971 next_active_insn (rtx insn)
2975 insn = NEXT_INSN (insn);
2976 if (insn == 0 || active_insn_p (insn))
2983 /* Find the last insn before INSN that really does something. This routine
2984 does not look inside SEQUENCEs. Until reload has completed, this is the
2985 same as prev_real_insn. */
2988 prev_active_insn (rtx insn)
2992 insn = PREV_INSN (insn);
2993 if (insn == 0 || active_insn_p (insn))
3000 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
3003 next_label (rtx insn)
3007 insn = NEXT_INSN (insn);
3008 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
3015 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
3018 prev_label (rtx insn)
3022 insn = PREV_INSN (insn);
3023 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
3031 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3032 and REG_CC_USER notes so we can find it. */
3035 link_cc0_insns (rtx insn)
3037 rtx user = next_nonnote_insn (insn);
3039 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
3040 user = XVECEXP (PATTERN (user), 0, 0);
3042 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn,
3044 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
3047 /* Return the next insn that uses CC0 after INSN, which is assumed to
3048 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3049 applied to the result of this function should yield INSN).
3051 Normally, this is simply the next insn. However, if a REG_CC_USER note
3052 is present, it contains the insn that uses CC0.
3054 Return 0 if we can't find the insn. */
3057 next_cc0_user (rtx insn)
3059 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
3062 return XEXP (note, 0);
3064 insn = next_nonnote_insn (insn);
3065 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
3066 insn = XVECEXP (PATTERN (insn), 0, 0);
3068 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
3074 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3075 note, it is the previous insn. */
3078 prev_cc0_setter (rtx insn)
3080 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
3083 return XEXP (note, 0);
3085 insn = prev_nonnote_insn (insn);
3086 if (! sets_cc0_p (PATTERN (insn)))
3093 /* Increment the label uses for all labels present in rtx. */
3096 mark_label_nuses (rtx x)
3102 code = GET_CODE (x);
3103 if (code == LABEL_REF && LABEL_P (XEXP (x, 0)))
3104 LABEL_NUSES (XEXP (x, 0))++;
3106 fmt = GET_RTX_FORMAT (code);
3107 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3110 mark_label_nuses (XEXP (x, i));
3111 else if (fmt[i] == 'E')
3112 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3113 mark_label_nuses (XVECEXP (x, i, j));
3118 /* Try splitting insns that can be split for better scheduling.
3119 PAT is the pattern which might split.
3120 TRIAL is the insn providing PAT.
3121 LAST is nonzero if we should return the last insn of the sequence produced.
3123 If this routine succeeds in splitting, it returns the first or last
3124 replacement insn depending on the value of LAST. Otherwise, it
3125 returns TRIAL. If the insn to be returned can be split, it will be. */
3128 try_split (rtx pat, rtx trial, int last)
3130 rtx before = PREV_INSN (trial);
3131 rtx after = NEXT_INSN (trial);
3132 int has_barrier = 0;
3136 rtx insn_last, insn;
3139 if (any_condjump_p (trial)
3140 && (note = find_reg_note (trial, REG_BR_PROB, 0)))
3141 split_branch_probability = INTVAL (XEXP (note, 0));
3142 probability = split_branch_probability;
3144 seq = split_insns (pat, trial);
3146 split_branch_probability = -1;
3148 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3149 We may need to handle this specially. */
3150 if (after && GET_CODE (after) == BARRIER)
3153 after = NEXT_INSN (after);
3159 /* Avoid infinite loop if any insn of the result matches
3160 the original pattern. */
3164 if (INSN_P (insn_last)
3165 && rtx_equal_p (PATTERN (insn_last), pat))
3167 if (!NEXT_INSN (insn_last))
3169 insn_last = NEXT_INSN (insn_last);
3173 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3175 if (GET_CODE (insn) == JUMP_INSN)
3177 mark_jump_label (PATTERN (insn), insn, 0);
3179 if (probability != -1
3180 && any_condjump_p (insn)
3181 && !find_reg_note (insn, REG_BR_PROB, 0))
3183 /* We can preserve the REG_BR_PROB notes only if exactly
3184 one jump is created, otherwise the machine description
3185 is responsible for this step using
3186 split_branch_probability variable. */
3190 = gen_rtx_EXPR_LIST (REG_BR_PROB,
3191 GEN_INT (probability),
3197 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3198 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3199 if (GET_CODE (trial) == CALL_INSN)
3201 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3202 if (GET_CODE (insn) == CALL_INSN)
3204 rtx *p = &CALL_INSN_FUNCTION_USAGE (insn);
3207 *p = CALL_INSN_FUNCTION_USAGE (trial);
3208 SIBLING_CALL_P (insn) = SIBLING_CALL_P (trial);
3212 /* Copy notes, particularly those related to the CFG. */
3213 for (note = REG_NOTES (trial); note; note = XEXP (note, 1))
3215 switch (REG_NOTE_KIND (note))
3219 while (insn != NULL_RTX)
3221 if (GET_CODE (insn) == CALL_INSN
3222 || (flag_non_call_exceptions
3223 && may_trap_p (PATTERN (insn))))
3225 = gen_rtx_EXPR_LIST (REG_EH_REGION,
3228 insn = PREV_INSN (insn);
3234 case REG_ALWAYS_RETURN:
3236 while (insn != NULL_RTX)
3238 if (GET_CODE (insn) == CALL_INSN)
3240 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3243 insn = PREV_INSN (insn);
3247 case REG_NON_LOCAL_GOTO:
3249 while (insn != NULL_RTX)
3251 if (GET_CODE (insn) == JUMP_INSN)
3253 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3256 insn = PREV_INSN (insn);
3265 /* If there are LABELS inside the split insns increment the
3266 usage count so we don't delete the label. */
3267 if (GET_CODE (trial) == INSN)
3270 while (insn != NULL_RTX)
3272 if (GET_CODE (insn) == INSN)
3273 mark_label_nuses (PATTERN (insn));
3275 insn = PREV_INSN (insn);
3279 tem = emit_insn_after_setloc (seq, trial, INSN_LOCATOR (trial));
3281 delete_insn (trial);
3283 emit_barrier_after (tem);
3285 /* Recursively call try_split for each new insn created; by the
3286 time control returns here that insn will be fully split, so
3287 set LAST and continue from the insn after the one returned.
3288 We can't use next_active_insn here since AFTER may be a note.
3289 Ignore deleted insns, which can be occur if not optimizing. */
3290 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
3291 if (! INSN_DELETED_P (tem) && INSN_P (tem))
3292 tem = try_split (PATTERN (tem), tem, 1);
3294 /* Return either the first or the last insn, depending on which was
3297 ? (after ? PREV_INSN (after) : last_insn)
3298 : NEXT_INSN (before);
3301 /* Make and return an INSN rtx, initializing all its slots.
3302 Store PATTERN in the pattern slots. */
3305 make_insn_raw (rtx pattern)
3309 insn = rtx_alloc (INSN);
3311 INSN_UID (insn) = cur_insn_uid++;
3312 PATTERN (insn) = pattern;
3313 INSN_CODE (insn) = -1;
3314 LOG_LINKS (insn) = NULL;
3315 REG_NOTES (insn) = NULL;
3316 INSN_LOCATOR (insn) = 0;
3317 BLOCK_FOR_INSN (insn) = NULL;
3319 #ifdef ENABLE_RTL_CHECKING
3322 && (returnjump_p (insn)
3323 || (GET_CODE (insn) == SET
3324 && SET_DEST (insn) == pc_rtx)))
3326 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
3334 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3337 make_jump_insn_raw (rtx pattern)
3341 insn = rtx_alloc (JUMP_INSN);
3342 INSN_UID (insn) = cur_insn_uid++;
3344 PATTERN (insn) = pattern;
3345 INSN_CODE (insn) = -1;
3346 LOG_LINKS (insn) = NULL;
3347 REG_NOTES (insn) = NULL;
3348 JUMP_LABEL (insn) = NULL;
3349 INSN_LOCATOR (insn) = 0;
3350 BLOCK_FOR_INSN (insn) = NULL;
3355 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3358 make_call_insn_raw (rtx pattern)
3362 insn = rtx_alloc (CALL_INSN);
3363 INSN_UID (insn) = cur_insn_uid++;
3365 PATTERN (insn) = pattern;
3366 INSN_CODE (insn) = -1;
3367 LOG_LINKS (insn) = NULL;
3368 REG_NOTES (insn) = NULL;
3369 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
3370 INSN_LOCATOR (insn) = 0;
3371 BLOCK_FOR_INSN (insn) = NULL;
3376 /* Add INSN to the end of the doubly-linked list.
3377 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3382 PREV_INSN (insn) = last_insn;
3383 NEXT_INSN (insn) = 0;
3385 if (NULL != last_insn)
3386 NEXT_INSN (last_insn) = insn;
3388 if (NULL == first_insn)
3394 /* Add INSN into the doubly-linked list after insn AFTER. This and
3395 the next should be the only functions called to insert an insn once
3396 delay slots have been filled since only they know how to update a
3400 add_insn_after (rtx insn, rtx after)
3402 rtx next = NEXT_INSN (after);
3405 if (optimize && INSN_DELETED_P (after))
3408 NEXT_INSN (insn) = next;
3409 PREV_INSN (insn) = after;
3413 PREV_INSN (next) = insn;
3414 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3415 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
3417 else if (last_insn == after)
3421 struct sequence_stack *stack = seq_stack;
3422 /* Scan all pending sequences too. */
3423 for (; stack; stack = stack->next)
3424 if (after == stack->last)
3434 if (GET_CODE (after) != BARRIER
3435 && GET_CODE (insn) != BARRIER
3436 && (bb = BLOCK_FOR_INSN (after)))
3438 set_block_for_insn (insn, bb);
3440 bb->flags |= BB_DIRTY;
3441 /* Should not happen as first in the BB is always
3442 either NOTE or LABEL. */
3443 if (BB_END (bb) == after
3444 /* Avoid clobbering of structure when creating new BB. */
3445 && GET_CODE (insn) != BARRIER
3446 && (GET_CODE (insn) != NOTE
3447 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3451 NEXT_INSN (after) = insn;
3452 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
3454 rtx sequence = PATTERN (after);
3455 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3459 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3460 the previous should be the only functions called to insert an insn once
3461 delay slots have been filled since only they know how to update a
3465 add_insn_before (rtx insn, rtx before)
3467 rtx prev = PREV_INSN (before);
3470 if (optimize && INSN_DELETED_P (before))
3473 PREV_INSN (insn) = prev;
3474 NEXT_INSN (insn) = before;
3478 NEXT_INSN (prev) = insn;
3479 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3481 rtx sequence = PATTERN (prev);
3482 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3485 else if (first_insn == before)
3489 struct sequence_stack *stack = seq_stack;
3490 /* Scan all pending sequences too. */
3491 for (; stack; stack = stack->next)
3492 if (before == stack->first)
3494 stack->first = insn;
3502 if (GET_CODE (before) != BARRIER
3503 && GET_CODE (insn) != BARRIER
3504 && (bb = BLOCK_FOR_INSN (before)))
3506 set_block_for_insn (insn, bb);
3508 bb->flags |= BB_DIRTY;
3509 /* Should not happen as first in the BB is always
3510 either NOTE or LABEl. */
3511 if (BB_HEAD (bb) == insn
3512 /* Avoid clobbering of structure when creating new BB. */
3513 && GET_CODE (insn) != BARRIER
3514 && (GET_CODE (insn) != NOTE
3515 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3519 PREV_INSN (before) = insn;
3520 if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE)
3521 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
3524 /* Remove an insn from its doubly-linked list. This function knows how
3525 to handle sequences. */
3527 remove_insn (rtx insn)
3529 rtx next = NEXT_INSN (insn);
3530 rtx prev = PREV_INSN (insn);
3535 NEXT_INSN (prev) = next;
3536 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3538 rtx sequence = PATTERN (prev);
3539 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
3542 else if (first_insn == insn)
3546 struct sequence_stack *stack = seq_stack;
3547 /* Scan all pending sequences too. */
3548 for (; stack; stack = stack->next)
3549 if (insn == stack->first)
3551 stack->first = next;
3561 PREV_INSN (next) = prev;
3562 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3563 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
3565 else if (last_insn == insn)
3569 struct sequence_stack *stack = seq_stack;
3570 /* Scan all pending sequences too. */
3571 for (; stack; stack = stack->next)
3572 if (insn == stack->last)
3581 if (GET_CODE (insn) != BARRIER
3582 && (bb = BLOCK_FOR_INSN (insn)))
3585 bb->flags |= BB_DIRTY;
3586 if (BB_HEAD (bb) == insn)
3588 /* Never ever delete the basic block note without deleting whole
3590 if (GET_CODE (insn) == NOTE)
3592 BB_HEAD (bb) = next;
3594 if (BB_END (bb) == insn)
3599 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
3602 add_function_usage_to (rtx call_insn, rtx call_fusage)
3604 if (! call_insn || GET_CODE (call_insn) != CALL_INSN)
3607 /* Put the register usage information on the CALL. If there is already
3608 some usage information, put ours at the end. */
3609 if (CALL_INSN_FUNCTION_USAGE (call_insn))
3613 for (link = CALL_INSN_FUNCTION_USAGE (call_insn); XEXP (link, 1) != 0;
3614 link = XEXP (link, 1))
3617 XEXP (link, 1) = call_fusage;
3620 CALL_INSN_FUNCTION_USAGE (call_insn) = call_fusage;
3623 /* Delete all insns made since FROM.
3624 FROM becomes the new last instruction. */
3627 delete_insns_since (rtx from)
3632 NEXT_INSN (from) = 0;
3636 /* This function is deprecated, please use sequences instead.
3638 Move a consecutive bunch of insns to a different place in the chain.
3639 The insns to be moved are those between FROM and TO.
3640 They are moved to a new position after the insn AFTER.
3641 AFTER must not be FROM or TO or any insn in between.
3643 This function does not know about SEQUENCEs and hence should not be
3644 called after delay-slot filling has been done. */
3647 reorder_insns_nobb (rtx from, rtx to, rtx after)
3649 /* Splice this bunch out of where it is now. */
3650 if (PREV_INSN (from))
3651 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
3653 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
3654 if (last_insn == to)
3655 last_insn = PREV_INSN (from);
3656 if (first_insn == from)
3657 first_insn = NEXT_INSN (to);
3659 /* Make the new neighbors point to it and it to them. */
3660 if (NEXT_INSN (after))
3661 PREV_INSN (NEXT_INSN (after)) = to;
3663 NEXT_INSN (to) = NEXT_INSN (after);
3664 PREV_INSN (from) = after;
3665 NEXT_INSN (after) = from;
3666 if (after == last_insn)
3670 /* Same as function above, but take care to update BB boundaries. */
3672 reorder_insns (rtx from, rtx to, rtx after)
3674 rtx prev = PREV_INSN (from);
3675 basic_block bb, bb2;
3677 reorder_insns_nobb (from, to, after);
3679 if (GET_CODE (after) != BARRIER
3680 && (bb = BLOCK_FOR_INSN (after)))
3683 bb->flags |= BB_DIRTY;
3685 if (GET_CODE (from) != BARRIER
3686 && (bb2 = BLOCK_FOR_INSN (from)))
3688 if (BB_END (bb2) == to)
3689 BB_END (bb2) = prev;
3690 bb2->flags |= BB_DIRTY;
3693 if (BB_END (bb) == after)
3696 for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
3697 set_block_for_insn (x, bb);
3701 /* Return the line note insn preceding INSN. */
3704 find_line_note (rtx insn)
3706 if (no_line_numbers)
3709 for (; insn; insn = PREV_INSN (insn))
3710 if (GET_CODE (insn) == NOTE
3711 && NOTE_LINE_NUMBER (insn) >= 0)
3717 /* Remove unnecessary notes from the instruction stream. */
3720 remove_unnecessary_notes (void)
3722 rtx block_stack = NULL_RTX;
3723 rtx eh_stack = NULL_RTX;
3728 /* We must not remove the first instruction in the function because
3729 the compiler depends on the first instruction being a note. */
3730 for (insn = NEXT_INSN (get_insns ()); insn; insn = next)
3732 /* Remember what's next. */
3733 next = NEXT_INSN (insn);
3735 /* We're only interested in notes. */
3736 if (GET_CODE (insn) != NOTE)
3739 switch (NOTE_LINE_NUMBER (insn))
3741 case NOTE_INSN_DELETED:
3742 case NOTE_INSN_LOOP_END_TOP_COND:
3746 case NOTE_INSN_EH_REGION_BEG:
3747 eh_stack = alloc_INSN_LIST (insn, eh_stack);
3750 case NOTE_INSN_EH_REGION_END:
3751 /* Too many end notes. */
3752 if (eh_stack == NULL_RTX)
3754 /* Mismatched nesting. */
3755 if (NOTE_EH_HANDLER (XEXP (eh_stack, 0)) != NOTE_EH_HANDLER (insn))
3758 eh_stack = XEXP (eh_stack, 1);
3759 free_INSN_LIST_node (tmp);
3762 case NOTE_INSN_BLOCK_BEG:
3763 /* By now, all notes indicating lexical blocks should have
3764 NOTE_BLOCK filled in. */
3765 if (NOTE_BLOCK (insn) == NULL_TREE)
3767 block_stack = alloc_INSN_LIST (insn, block_stack);
3770 case NOTE_INSN_BLOCK_END:
3771 /* Too many end notes. */
3772 if (block_stack == NULL_RTX)
3774 /* Mismatched nesting. */
3775 if (NOTE_BLOCK (XEXP (block_stack, 0)) != NOTE_BLOCK (insn))
3778 block_stack = XEXP (block_stack, 1);
3779 free_INSN_LIST_node (tmp);
3781 /* Scan back to see if there are any non-note instructions
3782 between INSN and the beginning of this block. If not,
3783 then there is no PC range in the generated code that will
3784 actually be in this block, so there's no point in
3785 remembering the existence of the block. */
3786 for (tmp = PREV_INSN (insn); tmp; tmp = PREV_INSN (tmp))
3788 /* This block contains a real instruction. Note that we
3789 don't include labels; if the only thing in the block
3790 is a label, then there are still no PC values that
3791 lie within the block. */
3795 /* We're only interested in NOTEs. */
3796 if (GET_CODE (tmp) != NOTE)
3799 if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_BEG)
3801 /* We just verified that this BLOCK matches us with
3802 the block_stack check above. Never delete the
3803 BLOCK for the outermost scope of the function; we
3804 can refer to names from that scope even if the
3805 block notes are messed up. */
3806 if (! is_body_block (NOTE_BLOCK (insn))
3807 && (*debug_hooks->ignore_block) (NOTE_BLOCK (insn)))
3814 else if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_END)
3815 /* There's a nested block. We need to leave the
3816 current block in place since otherwise the debugger
3817 wouldn't be able to show symbols from our block in
3818 the nested block. */
3824 /* Too many begin notes. */
3825 if (block_stack || eh_stack)
3830 /* Emit insn(s) of given code and pattern
3831 at a specified place within the doubly-linked list.
3833 All of the emit_foo global entry points accept an object
3834 X which is either an insn list or a PATTERN of a single
3837 There are thus a few canonical ways to generate code and
3838 emit it at a specific place in the instruction stream. For
3839 example, consider the instruction named SPOT and the fact that
3840 we would like to emit some instructions before SPOT. We might
3844 ... emit the new instructions ...
3845 insns_head = get_insns ();
3848 emit_insn_before (insns_head, SPOT);
3850 It used to be common to generate SEQUENCE rtl instead, but that
3851 is a relic of the past which no longer occurs. The reason is that
3852 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
3853 generated would almost certainly die right after it was created. */
3855 /* Make X be output before the instruction BEFORE. */
3858 emit_insn_before (rtx x, rtx before)
3863 #ifdef ENABLE_RTL_CHECKING
3864 if (before == NULL_RTX)
3871 switch (GET_CODE (x))
3882 rtx next = NEXT_INSN (insn);
3883 add_insn_before (insn, before);
3889 #ifdef ENABLE_RTL_CHECKING
3896 last = make_insn_raw (x);
3897 add_insn_before (last, before);
3904 /* Make an instruction with body X and code JUMP_INSN
3905 and output it before the instruction BEFORE. */
3908 emit_jump_insn_before (rtx x, rtx before)
3910 rtx insn, last = NULL_RTX;
3912 #ifdef ENABLE_RTL_CHECKING
3913 if (before == NULL_RTX)
3917 switch (GET_CODE (x))
3928 rtx next = NEXT_INSN (insn);
3929 add_insn_before (insn, before);
3935 #ifdef ENABLE_RTL_CHECKING
3942 last = make_jump_insn_raw (x);
3943 add_insn_before (last, before);
3950 /* Make an instruction with body X and code CALL_INSN
3951 and output it before the instruction BEFORE. */
3954 emit_call_insn_before (rtx x, rtx before)
3956 rtx last = NULL_RTX, insn;
3958 #ifdef ENABLE_RTL_CHECKING
3959 if (before == NULL_RTX)
3963 switch (GET_CODE (x))
3974 rtx next = NEXT_INSN (insn);
3975 add_insn_before (insn, before);
3981 #ifdef ENABLE_RTL_CHECKING
3988 last = make_call_insn_raw (x);
3989 add_insn_before (last, before);
3996 /* Make an insn of code BARRIER
3997 and output it before the insn BEFORE. */
4000 emit_barrier_before (rtx before)
4002 rtx insn = rtx_alloc (BARRIER);
4004 INSN_UID (insn) = cur_insn_uid++;
4006 add_insn_before (insn, before);
4010 /* Emit the label LABEL before the insn BEFORE. */
4013 emit_label_before (rtx label, rtx before)
4015 /* This can be called twice for the same label as a result of the
4016 confusion that follows a syntax error! So make it harmless. */
4017 if (INSN_UID (label) == 0)
4019 INSN_UID (label) = cur_insn_uid++;
4020 add_insn_before (label, before);
4026 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4029 emit_note_before (int subtype, rtx before)
4031 rtx note = rtx_alloc (NOTE);
4032 INSN_UID (note) = cur_insn_uid++;
4033 NOTE_SOURCE_FILE (note) = 0;
4034 NOTE_LINE_NUMBER (note) = subtype;
4035 BLOCK_FOR_INSN (note) = NULL;
4037 add_insn_before (note, before);
4041 /* Helper for emit_insn_after, handles lists of instructions
4044 static rtx emit_insn_after_1 (rtx, rtx);
4047 emit_insn_after_1 (rtx first, rtx after)
4053 if (GET_CODE (after) != BARRIER
4054 && (bb = BLOCK_FOR_INSN (after)))
4056 bb->flags |= BB_DIRTY;
4057 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4058 if (GET_CODE (last) != BARRIER)
4059 set_block_for_insn (last, bb);
4060 if (GET_CODE (last) != BARRIER)
4061 set_block_for_insn (last, bb);
4062 if (BB_END (bb) == after)
4066 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4069 after_after = NEXT_INSN (after);
4071 NEXT_INSN (after) = first;
4072 PREV_INSN (first) = after;
4073 NEXT_INSN (last) = after_after;
4075 PREV_INSN (after_after) = last;
4077 if (after == last_insn)
4082 /* Make X be output after the insn AFTER. */
4085 emit_insn_after (rtx x, rtx after)
4089 #ifdef ENABLE_RTL_CHECKING
4090 if (after == NULL_RTX)
4097 switch (GET_CODE (x))
4105 last = emit_insn_after_1 (x, after);
4108 #ifdef ENABLE_RTL_CHECKING
4115 last = make_insn_raw (x);
4116 add_insn_after (last, after);
4123 /* Similar to emit_insn_after, except that line notes are to be inserted so
4124 as to act as if this insn were at FROM. */
4127 emit_insn_after_with_line_notes (rtx x, rtx after, rtx from)
4129 rtx from_line = find_line_note (from);
4130 rtx after_line = find_line_note (after);
4131 rtx insn = emit_insn_after (x, after);
4134 emit_note_copy_after (from_line, after);
4137 emit_note_copy_after (after_line, insn);
4140 /* Make an insn of code JUMP_INSN with body X
4141 and output it after the insn AFTER. */
4144 emit_jump_insn_after (rtx x, rtx after)
4148 #ifdef ENABLE_RTL_CHECKING
4149 if (after == NULL_RTX)
4153 switch (GET_CODE (x))
4161 last = emit_insn_after_1 (x, after);
4164 #ifdef ENABLE_RTL_CHECKING
4171 last = make_jump_insn_raw (x);
4172 add_insn_after (last, after);
4179 /* Make an instruction with body X and code CALL_INSN
4180 and output it after the instruction AFTER. */
4183 emit_call_insn_after (rtx x, rtx after)
4187 #ifdef ENABLE_RTL_CHECKING
4188 if (after == NULL_RTX)
4192 switch (GET_CODE (x))
4200 last = emit_insn_after_1 (x, after);
4203 #ifdef ENABLE_RTL_CHECKING
4210 last = make_call_insn_raw (x);
4211 add_insn_after (last, after);
4218 /* Make an insn of code BARRIER
4219 and output it after the insn AFTER. */
4222 emit_barrier_after (rtx after)
4224 rtx insn = rtx_alloc (BARRIER);
4226 INSN_UID (insn) = cur_insn_uid++;
4228 add_insn_after (insn, after);
4232 /* Emit the label LABEL after the insn AFTER. */
4235 emit_label_after (rtx label, rtx after)
4237 /* This can be called twice for the same label
4238 as a result of the confusion that follows a syntax error!
4239 So make it harmless. */
4240 if (INSN_UID (label) == 0)
4242 INSN_UID (label) = cur_insn_uid++;
4243 add_insn_after (label, after);
4249 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4252 emit_note_after (int subtype, rtx after)
4254 rtx note = rtx_alloc (NOTE);
4255 INSN_UID (note) = cur_insn_uid++;
4256 NOTE_SOURCE_FILE (note) = 0;
4257 NOTE_LINE_NUMBER (note) = subtype;
4258 BLOCK_FOR_INSN (note) = NULL;
4259 add_insn_after (note, after);
4263 /* Emit a copy of note ORIG after the insn AFTER. */
4266 emit_note_copy_after (rtx orig, rtx after)
4270 if (NOTE_LINE_NUMBER (orig) >= 0 && no_line_numbers)
4276 note = rtx_alloc (NOTE);
4277 INSN_UID (note) = cur_insn_uid++;
4278 NOTE_LINE_NUMBER (note) = NOTE_LINE_NUMBER (orig);
4279 NOTE_DATA (note) = NOTE_DATA (orig);
4280 BLOCK_FOR_INSN (note) = NULL;
4281 add_insn_after (note, after);
4285 /* Like emit_insn_after, but set INSN_LOCATOR according to SCOPE. */
4287 emit_insn_after_setloc (rtx pattern, rtx after, int loc)
4289 rtx last = emit_insn_after (pattern, after);
4291 if (pattern == NULL_RTX)
4294 after = NEXT_INSN (after);
4297 if (active_insn_p (after))
4298 INSN_LOCATOR (after) = loc;
4301 after = NEXT_INSN (after);
4306 /* Like emit_jump_insn_after, but set INSN_LOCATOR according to SCOPE. */
4308 emit_jump_insn_after_setloc (rtx pattern, rtx after, int loc)
4310 rtx last = emit_jump_insn_after (pattern, after);
4312 if (pattern == NULL_RTX)
4315 after = NEXT_INSN (after);
4318 if (active_insn_p (after))
4319 INSN_LOCATOR (after) = loc;
4322 after = NEXT_INSN (after);
4327 /* Like emit_call_insn_after, but set INSN_LOCATOR according to SCOPE. */
4329 emit_call_insn_after_setloc (rtx pattern, rtx after, int loc)
4331 rtx last = emit_call_insn_after (pattern, after);
4333 if (pattern == NULL_RTX)
4336 after = NEXT_INSN (after);
4339 if (active_insn_p (after))
4340 INSN_LOCATOR (after) = loc;
4343 after = NEXT_INSN (after);
4348 /* Like emit_insn_before, but set INSN_LOCATOR according to SCOPE. */
4350 emit_insn_before_setloc (rtx pattern, rtx before, int loc)
4352 rtx first = PREV_INSN (before);
4353 rtx last = emit_insn_before (pattern, before);
4355 if (pattern == NULL_RTX)
4358 first = NEXT_INSN (first);
4361 if (active_insn_p (first))
4362 INSN_LOCATOR (first) = loc;
4365 first = NEXT_INSN (first);
4370 /* Take X and emit it at the end of the doubly-linked
4373 Returns the last insn emitted. */
4378 rtx last = last_insn;
4384 switch (GET_CODE (x))
4395 rtx next = NEXT_INSN (insn);
4402 #ifdef ENABLE_RTL_CHECKING
4409 last = make_insn_raw (x);
4417 /* Make an insn of code JUMP_INSN with pattern X
4418 and add it to the end of the doubly-linked list. */
4421 emit_jump_insn (rtx x)
4423 rtx last = NULL_RTX, insn;
4425 switch (GET_CODE (x))
4436 rtx next = NEXT_INSN (insn);
4443 #ifdef ENABLE_RTL_CHECKING
4450 last = make_jump_insn_raw (x);
4458 /* Make an insn of code CALL_INSN with pattern X
4459 and add it to the end of the doubly-linked list. */
4462 emit_call_insn (rtx x)
4466 switch (GET_CODE (x))
4474 insn = emit_insn (x);
4477 #ifdef ENABLE_RTL_CHECKING
4484 insn = make_call_insn_raw (x);
4492 /* Add the label LABEL to the end of the doubly-linked list. */
4495 emit_label (rtx label)
4497 /* This can be called twice for the same label
4498 as a result of the confusion that follows a syntax error!
4499 So make it harmless. */
4500 if (INSN_UID (label) == 0)
4502 INSN_UID (label) = cur_insn_uid++;
4508 /* Make an insn of code BARRIER
4509 and add it to the end of the doubly-linked list. */
4514 rtx barrier = rtx_alloc (BARRIER);
4515 INSN_UID (barrier) = cur_insn_uid++;
4520 /* Make line numbering NOTE insn for LOCATION add it to the end
4521 of the doubly-linked list, but only if line-numbers are desired for
4522 debugging info and it doesn't match the previous one. */
4525 emit_line_note (location_t location)
4529 set_file_and_line_for_stmt (location);
4531 if (location.file && last_location.file
4532 && !strcmp (location.file, last_location.file)
4533 && location.line == last_location.line)
4535 last_location = location;
4537 if (no_line_numbers)
4543 note = emit_note (location.line);
4544 NOTE_SOURCE_FILE (note) = location.file;
4549 /* Emit a copy of note ORIG. */
4552 emit_note_copy (rtx orig)
4556 if (NOTE_LINE_NUMBER (orig) >= 0 && no_line_numbers)
4562 note = rtx_alloc (NOTE);
4564 INSN_UID (note) = cur_insn_uid++;
4565 NOTE_DATA (note) = NOTE_DATA (orig);
4566 NOTE_LINE_NUMBER (note) = NOTE_LINE_NUMBER (orig);
4567 BLOCK_FOR_INSN (note) = NULL;
4573 /* Make an insn of code NOTE or type NOTE_NO
4574 and add it to the end of the doubly-linked list. */
4577 emit_note (int note_no)
4581 note = rtx_alloc (NOTE);
4582 INSN_UID (note) = cur_insn_uid++;
4583 NOTE_LINE_NUMBER (note) = note_no;
4584 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4585 BLOCK_FOR_INSN (note) = NULL;
4590 /* Cause next statement to emit a line note even if the line number
4594 force_next_line_note (void)
4596 last_location.line = -1;
4599 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4600 note of this type already exists, remove it first. */
4603 set_unique_reg_note (rtx insn, enum reg_note kind, rtx datum)
4605 rtx note = find_reg_note (insn, kind, NULL_RTX);
4611 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4612 has multiple sets (some callers assume single_set
4613 means the insn only has one set, when in fact it
4614 means the insn only has one * useful * set). */
4615 if (GET_CODE (PATTERN (insn)) == PARALLEL && multiple_sets (insn))
4622 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4623 It serves no useful purpose and breaks eliminate_regs. */
4624 if (GET_CODE (datum) == ASM_OPERANDS)
4634 XEXP (note, 0) = datum;
4638 REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn));
4639 return REG_NOTES (insn);
4642 /* Return an indication of which type of insn should have X as a body.
4643 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
4646 classify_insn (rtx x)
4648 if (GET_CODE (x) == CODE_LABEL)
4650 if (GET_CODE (x) == CALL)
4652 if (GET_CODE (x) == RETURN)
4654 if (GET_CODE (x) == SET)
4656 if (SET_DEST (x) == pc_rtx)
4658 else if (GET_CODE (SET_SRC (x)) == CALL)
4663 if (GET_CODE (x) == PARALLEL)
4666 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
4667 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
4669 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4670 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
4672 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4673 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
4679 /* Emit the rtl pattern X as an appropriate kind of insn.
4680 If X is a label, it is simply added into the insn chain. */
4685 enum rtx_code code = classify_insn (x);
4687 if (code == CODE_LABEL)
4688 return emit_label (x);
4689 else if (code == INSN)
4690 return emit_insn (x);
4691 else if (code == JUMP_INSN)
4693 rtx insn = emit_jump_insn (x);
4694 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
4695 return emit_barrier ();
4698 else if (code == CALL_INSN)
4699 return emit_call_insn (x);
4704 /* Space for free sequence stack entries. */
4705 static GTY ((deletable)) struct sequence_stack *free_sequence_stack;
4707 /* Begin emitting insns to a sequence which can be packaged in an
4708 RTL_EXPR. If this sequence will contain something that might cause
4709 the compiler to pop arguments to function calls (because those
4710 pops have previously been deferred; see INHIBIT_DEFER_POP for more
4711 details), use do_pending_stack_adjust before calling this function.
4712 That will ensure that the deferred pops are not accidentally
4713 emitted in the middle of this sequence. */
4716 start_sequence (void)
4718 struct sequence_stack *tem;
4720 if (free_sequence_stack != NULL)
4722 tem = free_sequence_stack;
4723 free_sequence_stack = tem->next;
4726 tem = ggc_alloc (sizeof (struct sequence_stack));
4728 tem->next = seq_stack;
4729 tem->first = first_insn;
4730 tem->last = last_insn;
4731 tem->sequence_rtl_expr = seq_rtl_expr;
4739 /* Similarly, but indicate that this sequence will be placed in T, an
4740 RTL_EXPR. See the documentation for start_sequence for more
4741 information about how to use this function. */
4744 start_sequence_for_rtl_expr (tree t)
4751 /* Set up the insn chain starting with FIRST as the current sequence,
4752 saving the previously current one. See the documentation for
4753 start_sequence for more information about how to use this function. */
4756 push_to_sequence (rtx first)
4762 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
4768 /* Set up the insn chain from a chain stort in FIRST to LAST. */
4771 push_to_full_sequence (rtx first, rtx last)
4776 /* We really should have the end of the insn chain here. */
4777 if (last && NEXT_INSN (last))
4781 /* Set up the outer-level insn chain
4782 as the current sequence, saving the previously current one. */
4785 push_topmost_sequence (void)
4787 struct sequence_stack *stack, *top = NULL;
4791 for (stack = seq_stack; stack; stack = stack->next)
4794 first_insn = top->first;
4795 last_insn = top->last;
4796 seq_rtl_expr = top->sequence_rtl_expr;
4799 /* After emitting to the outer-level insn chain, update the outer-level
4800 insn chain, and restore the previous saved state. */
4803 pop_topmost_sequence (void)
4805 struct sequence_stack *stack, *top = NULL;
4807 for (stack = seq_stack; stack; stack = stack->next)
4810 top->first = first_insn;
4811 top->last = last_insn;
4812 /* ??? Why don't we save seq_rtl_expr here? */
4817 /* After emitting to a sequence, restore previous saved state.
4819 To get the contents of the sequence just made, you must call
4820 `get_insns' *before* calling here.
4822 If the compiler might have deferred popping arguments while
4823 generating this sequence, and this sequence will not be immediately
4824 inserted into the instruction stream, use do_pending_stack_adjust
4825 before calling get_insns. That will ensure that the deferred
4826 pops are inserted into this sequence, and not into some random
4827 location in the instruction stream. See INHIBIT_DEFER_POP for more
4828 information about deferred popping of arguments. */
4833 struct sequence_stack *tem = seq_stack;
4835 first_insn = tem->first;
4836 last_insn = tem->last;
4837 seq_rtl_expr = tem->sequence_rtl_expr;
4838 seq_stack = tem->next;
4840 memset (tem, 0, sizeof (*tem));
4841 tem->next = free_sequence_stack;
4842 free_sequence_stack = tem;
4845 /* Return 1 if currently emitting into a sequence. */
4848 in_sequence_p (void)
4850 return seq_stack != 0;
4853 /* Put the various virtual registers into REGNO_REG_RTX. */
4856 init_virtual_regs (struct emit_status *es)
4858 rtx *ptr = es->x_regno_reg_rtx;
4859 ptr[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
4860 ptr[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
4861 ptr[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
4862 ptr[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
4863 ptr[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
4867 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
4868 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
4869 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
4870 static int copy_insn_n_scratches;
4872 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4873 copied an ASM_OPERANDS.
4874 In that case, it is the original input-operand vector. */
4875 static rtvec orig_asm_operands_vector;
4877 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4878 copied an ASM_OPERANDS.
4879 In that case, it is the copied input-operand vector. */
4880 static rtvec copy_asm_operands_vector;
4882 /* Likewise for the constraints vector. */
4883 static rtvec orig_asm_constraints_vector;
4884 static rtvec copy_asm_constraints_vector;
4886 /* Recursively create a new copy of an rtx for copy_insn.
4887 This function differs from copy_rtx in that it handles SCRATCHes and
4888 ASM_OPERANDs properly.
4889 Normally, this function is not used directly; use copy_insn as front end.
4890 However, you could first copy an insn pattern with copy_insn and then use
4891 this function afterwards to properly copy any REG_NOTEs containing
4895 copy_insn_1 (rtx orig)
4900 const char *format_ptr;
4902 code = GET_CODE (orig);
4918 if (REG_P (XEXP (orig, 0)) && REGNO (XEXP (orig, 0)) < FIRST_PSEUDO_REGISTER)
4923 for (i = 0; i < copy_insn_n_scratches; i++)
4924 if (copy_insn_scratch_in[i] == orig)
4925 return copy_insn_scratch_out[i];
4929 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
4930 a LABEL_REF, it isn't sharable. */
4931 if (GET_CODE (XEXP (orig, 0)) == PLUS
4932 && GET_CODE (XEXP (XEXP (orig, 0), 0)) == SYMBOL_REF
4933 && GET_CODE (XEXP (XEXP (orig, 0), 1)) == CONST_INT)
4937 /* A MEM with a constant address is not sharable. The problem is that
4938 the constant address may need to be reloaded. If the mem is shared,
4939 then reloading one copy of this mem will cause all copies to appear
4940 to have been reloaded. */
4946 copy = rtx_alloc (code);
4948 /* Copy the various flags, and other information. We assume that
4949 all fields need copying, and then clear the fields that should
4950 not be copied. That is the sensible default behavior, and forces
4951 us to explicitly document why we are *not* copying a flag. */
4952 memcpy (copy, orig, RTX_HDR_SIZE);
4954 /* We do not copy the USED flag, which is used as a mark bit during
4955 walks over the RTL. */
4956 RTX_FLAG (copy, used) = 0;
4958 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
4961 RTX_FLAG (copy, jump) = 0;
4962 RTX_FLAG (copy, call) = 0;
4963 RTX_FLAG (copy, frame_related) = 0;
4966 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
4968 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
4970 copy->u.fld[i] = orig->u.fld[i];
4971 switch (*format_ptr++)
4974 if (XEXP (orig, i) != NULL)
4975 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
4980 if (XVEC (orig, i) == orig_asm_constraints_vector)
4981 XVEC (copy, i) = copy_asm_constraints_vector;
4982 else if (XVEC (orig, i) == orig_asm_operands_vector)
4983 XVEC (copy, i) = copy_asm_operands_vector;
4984 else if (XVEC (orig, i) != NULL)
4986 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
4987 for (j = 0; j < XVECLEN (copy, i); j++)
4988 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
4999 /* These are left unchanged. */
5007 if (code == SCRATCH)
5009 i = copy_insn_n_scratches++;
5010 if (i >= MAX_RECOG_OPERANDS)
5012 copy_insn_scratch_in[i] = orig;
5013 copy_insn_scratch_out[i] = copy;
5015 else if (code == ASM_OPERANDS)
5017 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
5018 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
5019 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
5020 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
5026 /* Create a new copy of an rtx.
5027 This function differs from copy_rtx in that it handles SCRATCHes and
5028 ASM_OPERANDs properly.
5029 INSN doesn't really have to be a full INSN; it could be just the
5032 copy_insn (rtx insn)
5034 copy_insn_n_scratches = 0;
5035 orig_asm_operands_vector = 0;
5036 orig_asm_constraints_vector = 0;
5037 copy_asm_operands_vector = 0;
5038 copy_asm_constraints_vector = 0;
5039 return copy_insn_1 (insn);
5042 /* Initialize data structures and variables in this file
5043 before generating rtl for each function. */
5048 struct function *f = cfun;
5050 f->emit = ggc_alloc (sizeof (struct emit_status));
5053 seq_rtl_expr = NULL;
5055 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
5056 last_location.line = 0;
5057 last_location.file = 0;
5058 first_label_num = label_num;
5062 /* Init the tables that describe all the pseudo regs. */
5064 f->emit->regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
5066 f->emit->regno_pointer_align
5067 = ggc_alloc_cleared (f->emit->regno_pointer_align_length
5068 * sizeof (unsigned char));
5071 = ggc_alloc (f->emit->regno_pointer_align_length * sizeof (rtx));
5073 /* Put copies of all the hard registers into regno_reg_rtx. */
5074 memcpy (regno_reg_rtx,
5075 static_regno_reg_rtx,
5076 FIRST_PSEUDO_REGISTER * sizeof (rtx));
5078 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5079 init_virtual_regs (f->emit);
5081 /* Indicate that the virtual registers and stack locations are
5083 REG_POINTER (stack_pointer_rtx) = 1;
5084 REG_POINTER (frame_pointer_rtx) = 1;
5085 REG_POINTER (hard_frame_pointer_rtx) = 1;
5086 REG_POINTER (arg_pointer_rtx) = 1;
5088 REG_POINTER (virtual_incoming_args_rtx) = 1;
5089 REG_POINTER (virtual_stack_vars_rtx) = 1;
5090 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
5091 REG_POINTER (virtual_outgoing_args_rtx) = 1;
5092 REG_POINTER (virtual_cfa_rtx) = 1;
5094 #ifdef STACK_BOUNDARY
5095 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
5096 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5097 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5098 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
5100 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
5101 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
5102 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
5103 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
5104 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
5107 #ifdef INIT_EXPANDERS
5112 /* Generate the constant 0. */
5115 gen_const_vector_0 (enum machine_mode mode)
5120 enum machine_mode inner;
5122 units = GET_MODE_NUNITS (mode);
5123 inner = GET_MODE_INNER (mode);
5125 v = rtvec_alloc (units);
5127 /* We need to call this function after we to set CONST0_RTX first. */
5128 if (!CONST0_RTX (inner))
5131 for (i = 0; i < units; ++i)
5132 RTVEC_ELT (v, i) = CONST0_RTX (inner);
5134 tem = gen_rtx_raw_CONST_VECTOR (mode, v);
5138 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5139 all elements are zero. */
5141 gen_rtx_CONST_VECTOR (enum machine_mode mode, rtvec v)
5143 rtx inner_zero = CONST0_RTX (GET_MODE_INNER (mode));
5146 for (i = GET_MODE_NUNITS (mode) - 1; i >= 0; i--)
5147 if (RTVEC_ELT (v, i) != inner_zero)
5148 return gen_rtx_raw_CONST_VECTOR (mode, v);
5149 return CONST0_RTX (mode);
5152 /* Create some permanent unique rtl objects shared between all functions.
5153 LINE_NUMBERS is nonzero if line numbers are to be generated. */
5156 init_emit_once (int line_numbers)
5159 enum machine_mode mode;
5160 enum machine_mode double_mode;
5162 /* We need reg_raw_mode, so initialize the modes now. */
5163 init_reg_modes_once ();
5165 /* Initialize the CONST_INT, CONST_DOUBLE, and memory attribute hash
5167 const_int_htab = htab_create_ggc (37, const_int_htab_hash,
5168 const_int_htab_eq, NULL);
5170 const_double_htab = htab_create_ggc (37, const_double_htab_hash,
5171 const_double_htab_eq, NULL);
5173 mem_attrs_htab = htab_create_ggc (37, mem_attrs_htab_hash,
5174 mem_attrs_htab_eq, NULL);
5175 reg_attrs_htab = htab_create_ggc (37, reg_attrs_htab_hash,
5176 reg_attrs_htab_eq, NULL);
5178 no_line_numbers = ! line_numbers;
5180 /* Compute the word and byte modes. */
5182 byte_mode = VOIDmode;
5183 word_mode = VOIDmode;
5184 double_mode = VOIDmode;
5186 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
5187 mode = GET_MODE_WIDER_MODE (mode))
5189 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
5190 && byte_mode == VOIDmode)
5193 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
5194 && word_mode == VOIDmode)
5198 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
5199 mode = GET_MODE_WIDER_MODE (mode))
5201 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
5202 && double_mode == VOIDmode)
5206 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
5208 /* Assign register numbers to the globally defined register rtx.
5209 This must be done at runtime because the register number field
5210 is in a union and some compilers can't initialize unions. */
5212 pc_rtx = gen_rtx_PC (VOIDmode);
5213 cc0_rtx = gen_rtx_CC0 (VOIDmode);
5214 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
5215 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
5216 if (hard_frame_pointer_rtx == 0)
5217 hard_frame_pointer_rtx = gen_raw_REG (Pmode,
5218 HARD_FRAME_POINTER_REGNUM);
5219 if (arg_pointer_rtx == 0)
5220 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
5221 virtual_incoming_args_rtx =
5222 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
5223 virtual_stack_vars_rtx =
5224 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
5225 virtual_stack_dynamic_rtx =
5226 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
5227 virtual_outgoing_args_rtx =
5228 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
5229 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
5231 /* Initialize RTL for commonly used hard registers. These are
5232 copied into regno_reg_rtx as we begin to compile each function. */
5233 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
5234 static_regno_reg_rtx[i] = gen_raw_REG (reg_raw_mode[i], i);
5236 #ifdef INIT_EXPANDERS
5237 /* This is to initialize {init|mark|free}_machine_status before the first
5238 call to push_function_context_to. This is needed by the Chill front
5239 end which calls push_function_context_to before the first call to
5240 init_function_start. */
5244 /* Create the unique rtx's for certain rtx codes and operand values. */
5246 /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
5247 tries to use these variables. */
5248 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
5249 const_int_rtx[i + MAX_SAVED_CONST_INT] =
5250 gen_rtx_raw_CONST_INT (VOIDmode, (HOST_WIDE_INT) i);
5252 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
5253 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
5254 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
5256 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
5258 REAL_VALUE_FROM_INT (dconst0, 0, 0, double_mode);
5259 REAL_VALUE_FROM_INT (dconst1, 1, 0, double_mode);
5260 REAL_VALUE_FROM_INT (dconst2, 2, 0, double_mode);
5261 REAL_VALUE_FROM_INT (dconst3, 3, 0, double_mode);
5262 REAL_VALUE_FROM_INT (dconst10, 10, 0, double_mode);
5263 REAL_VALUE_FROM_INT (dconstm1, -1, -1, double_mode);
5264 REAL_VALUE_FROM_INT (dconstm2, -2, -1, double_mode);
5266 dconsthalf = dconst1;
5267 SET_REAL_EXP (&dconsthalf, REAL_EXP (&dconsthalf) - 1);
5269 real_arithmetic (&dconstthird, RDIV_EXPR, &dconst1, &dconst3);
5271 /* Initialize mathematical constants for constant folding builtins.
5272 These constants need to be given to at least 160 bits precision. */
5273 real_from_string (&dconstpi,
5274 "3.1415926535897932384626433832795028841971693993751058209749445923078");
5275 real_from_string (&dconste,
5276 "2.7182818284590452353602874713526624977572470936999595749669676277241");
5278 for (i = 0; i < (int) ARRAY_SIZE (const_tiny_rtx); i++)
5280 REAL_VALUE_TYPE *r =
5281 (i == 0 ? &dconst0 : i == 1 ? &dconst1 : &dconst2);
5283 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
5284 mode = GET_MODE_WIDER_MODE (mode))
5285 const_tiny_rtx[i][(int) mode] =
5286 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5288 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
5290 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
5291 mode = GET_MODE_WIDER_MODE (mode))
5292 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5294 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
5296 mode = GET_MODE_WIDER_MODE (mode))
5297 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5300 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
5302 mode = GET_MODE_WIDER_MODE (mode))
5303 const_tiny_rtx[0][(int) mode] = gen_const_vector_0 (mode);
5305 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
5307 mode = GET_MODE_WIDER_MODE (mode))
5308 const_tiny_rtx[0][(int) mode] = gen_const_vector_0 (mode);
5310 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
5311 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
5312 const_tiny_rtx[0][i] = const0_rtx;
5314 const_tiny_rtx[0][(int) BImode] = const0_rtx;
5315 if (STORE_FLAG_VALUE == 1)
5316 const_tiny_rtx[1][(int) BImode] = const1_rtx;
5318 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5319 return_address_pointer_rtx
5320 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
5323 #ifdef STATIC_CHAIN_REGNUM
5324 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
5326 #ifdef STATIC_CHAIN_INCOMING_REGNUM
5327 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
5328 static_chain_incoming_rtx
5329 = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
5332 static_chain_incoming_rtx = static_chain_rtx;
5336 static_chain_rtx = STATIC_CHAIN;
5338 #ifdef STATIC_CHAIN_INCOMING
5339 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
5341 static_chain_incoming_rtx = static_chain_rtx;
5345 if ((unsigned) PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
5346 pic_offset_table_rtx = gen_raw_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
5349 /* Query and clear/ restore no_line_numbers. This is used by the
5350 switch / case handling in stmt.c to give proper line numbers in
5351 warnings about unreachable code. */
5354 force_line_numbers (void)
5356 int old = no_line_numbers;
5358 no_line_numbers = 0;
5360 force_next_line_note ();
5365 restore_line_number_status (int old_value)
5367 no_line_numbers = old_value;
5370 /* Produce exact duplicate of insn INSN after AFTER.
5371 Care updating of libcall regions if present. */
5374 emit_copy_of_insn_after (rtx insn, rtx after)
5377 rtx note1, note2, link;
5379 switch (GET_CODE (insn))
5382 new = emit_insn_after (copy_insn (PATTERN (insn)), after);
5386 new = emit_jump_insn_after (copy_insn (PATTERN (insn)), after);
5390 new = emit_call_insn_after (copy_insn (PATTERN (insn)), after);
5391 if (CALL_INSN_FUNCTION_USAGE (insn))
5392 CALL_INSN_FUNCTION_USAGE (new)
5393 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn));
5394 SIBLING_CALL_P (new) = SIBLING_CALL_P (insn);
5395 CONST_OR_PURE_CALL_P (new) = CONST_OR_PURE_CALL_P (insn);
5402 /* Update LABEL_NUSES. */
5403 mark_jump_label (PATTERN (new), new, 0);
5405 INSN_LOCATOR (new) = INSN_LOCATOR (insn);
5407 /* Copy all REG_NOTES except REG_LABEL since mark_jump_label will
5409 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5410 if (REG_NOTE_KIND (link) != REG_LABEL)
5412 if (GET_CODE (link) == EXPR_LIST)
5414 = copy_insn_1 (gen_rtx_EXPR_LIST (REG_NOTE_KIND (link),
5419 = copy_insn_1 (gen_rtx_INSN_LIST (REG_NOTE_KIND (link),
5424 /* Fix the libcall sequences. */
5425 if ((note1 = find_reg_note (new, REG_RETVAL, NULL_RTX)) != NULL)
5428 while ((note2 = find_reg_note (p, REG_LIBCALL, NULL_RTX)) == NULL)
5430 XEXP (note1, 0) = p;
5431 XEXP (note2, 0) = new;
5433 INSN_CODE (new) = INSN_CODE (insn);
5437 static GTY((deletable)) rtx hard_reg_clobbers [NUM_MACHINE_MODES][FIRST_PSEUDO_REGISTER];
5439 gen_hard_reg_clobber (enum machine_mode mode, unsigned int regno)
5441 if (hard_reg_clobbers[mode][regno])
5442 return hard_reg_clobbers[mode][regno];
5444 return (hard_reg_clobbers[mode][regno] =
5445 gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (mode, regno)));
5448 #include "gt-emit-rtl.h"