1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains the functions `gen_rtx', `gen_reg_rtx'
26 and `gen_label_rtx' that are the usual ways of creating rtl
27 expressions for most purposes.
29 It also has the functions for creating insns and linking
30 them in the doubly-linked chain.
32 The patterns of the insns are created by machine-dependent
33 routines in insn-emit.c, which is generated automatically from
34 the machine description. These routines use `gen_rtx' to make
35 the individual rtx's of the pattern; what is machine dependent
36 is the kind of rtx's they make and what arguments they use. */
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
55 #include "basic-block.h"
58 #include "langhooks.h"
60 /* Commonly used modes. */
62 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
63 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
64 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
65 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
68 /* This is *not* reset after each function. It gives each CODE_LABEL
69 in the entire compilation a unique label number. */
71 static int label_num = 1;
73 /* Highest label number in current function.
74 Zero means use the value of label_num instead.
75 This is nonzero only when belatedly compiling an inline function. */
77 static int last_label_num;
79 /* Value label_num had when set_new_first_and_last_label_number was called.
80 If label_num has not changed since then, last_label_num is valid. */
82 static int base_label_num;
84 /* Nonzero means do not generate NOTEs for source line numbers. */
86 static int no_line_numbers;
88 /* Commonly used rtx's, so that we only need space for one copy.
89 These are initialized once for the entire compilation.
90 All of these except perhaps the floating-point CONST_DOUBLEs
91 are unique; no other rtx-object will be equal to any of these. */
93 rtx global_rtl[GR_MAX];
95 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
96 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
97 record a copy of const[012]_rtx. */
99 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
103 REAL_VALUE_TYPE dconst0;
104 REAL_VALUE_TYPE dconst1;
105 REAL_VALUE_TYPE dconst2;
106 REAL_VALUE_TYPE dconstm1;
108 /* All references to the following fixed hard registers go through
109 these unique rtl objects. On machines where the frame-pointer and
110 arg-pointer are the same register, they use the same unique object.
112 After register allocation, other rtl objects which used to be pseudo-regs
113 may be clobbered to refer to the frame-pointer register.
114 But references that were originally to the frame-pointer can be
115 distinguished from the others because they contain frame_pointer_rtx.
117 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
118 tricky: until register elimination has taken place hard_frame_pointer_rtx
119 should be used if it is being set, and frame_pointer_rtx otherwise. After
120 register elimination hard_frame_pointer_rtx should always be used.
121 On machines where the two registers are same (most) then these are the
124 In an inline procedure, the stack and frame pointer rtxs may not be
125 used for anything else. */
126 rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
127 rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
128 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
129 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
130 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
132 /* This is used to implement __builtin_return_address for some machines.
133 See for instance the MIPS port. */
134 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
136 /* We make one copy of (const_int C) where C is in
137 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
138 to save space during the compilation and simplify comparisons of
141 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
143 /* A hash table storing CONST_INTs whose absolute value is greater
144 than MAX_SAVED_CONST_INT. */
146 static htab_t const_int_htab;
148 /* A hash table storing memory attribute structures. */
149 static htab_t mem_attrs_htab;
151 /* start_sequence and gen_sequence can make a lot of rtx expressions which are
152 shortly thrown away. We use two mechanisms to prevent this waste:
154 For sizes up to 5 elements, we keep a SEQUENCE and its associated
155 rtvec for use by gen_sequence. One entry for each size is
156 sufficient because most cases are calls to gen_sequence followed by
157 immediately emitting the SEQUENCE. Reuse is safe since emitting a
158 sequence is destructive on the insn in it anyway and hence can't be
161 We do not bother to save this cached data over nested function calls.
162 Instead, we just reinitialize them. */
164 #define SEQUENCE_RESULT_SIZE 5
166 static rtx sequence_result[SEQUENCE_RESULT_SIZE];
168 /* During RTL generation, we also keep a list of free INSN rtl codes. */
169 static rtx free_insn;
171 #define first_insn (cfun->emit->x_first_insn)
172 #define last_insn (cfun->emit->x_last_insn)
173 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
174 #define last_linenum (cfun->emit->x_last_linenum)
175 #define last_filename (cfun->emit->x_last_filename)
176 #define first_label_num (cfun->emit->x_first_label_num)
178 static rtx make_jump_insn_raw PARAMS ((rtx));
179 static rtx make_call_insn_raw PARAMS ((rtx));
180 static rtx find_line_note PARAMS ((rtx));
181 static void mark_sequence_stack PARAMS ((struct sequence_stack *));
182 static rtx change_address_1 PARAMS ((rtx, enum machine_mode, rtx,
184 static void unshare_all_rtl_1 PARAMS ((rtx));
185 static void unshare_all_decls PARAMS ((tree));
186 static void reset_used_decls PARAMS ((tree));
187 static void mark_label_nuses PARAMS ((rtx));
188 static hashval_t const_int_htab_hash PARAMS ((const void *));
189 static int const_int_htab_eq PARAMS ((const void *,
191 static hashval_t mem_attrs_htab_hash PARAMS ((const void *));
192 static int mem_attrs_htab_eq PARAMS ((const void *,
194 static void mem_attrs_mark PARAMS ((const void *));
195 static mem_attrs *get_mem_attrs PARAMS ((HOST_WIDE_INT, tree, rtx,
198 static tree component_ref_for_mem_expr PARAMS ((tree));
200 /* Probability of the conditional branch currently proceeded by try_split.
201 Set to -1 otherwise. */
202 int split_branch_probability = -1;
204 /* Returns a hash code for X (which is a really a CONST_INT). */
207 const_int_htab_hash (x)
210 return (hashval_t) INTVAL ((const struct rtx_def *) x);
213 /* Returns non-zero if the value represented by X (which is really a
214 CONST_INT) is the same as that given by Y (which is really a
218 const_int_htab_eq (x, y)
222 return (INTVAL ((const struct rtx_def *) x) == *((const HOST_WIDE_INT *) y));
225 /* Returns a hash code for X (which is a really a mem_attrs *). */
228 mem_attrs_htab_hash (x)
231 mem_attrs *p = (mem_attrs *) x;
233 return (p->alias ^ (p->align * 1000)
234 ^ ((p->offset ? INTVAL (p->offset) : 0) * 50000)
235 ^ ((p->size ? INTVAL (p->size) : 0) * 2500000)
239 /* Returns non-zero if the value represented by X (which is really a
240 mem_attrs *) is the same as that given by Y (which is also really a
244 mem_attrs_htab_eq (x, y)
248 mem_attrs *p = (mem_attrs *) x;
249 mem_attrs *q = (mem_attrs *) y;
251 return (p->alias == q->alias && p->expr == q->expr && p->offset == q->offset
252 && p->size == q->size && p->align == q->align);
255 /* This routine is called when we determine that we need a mem_attrs entry.
256 It marks the associated decl and RTL as being used, if present. */
262 mem_attrs *p = (mem_attrs *) x;
265 ggc_mark_tree (p->expr);
268 ggc_mark_rtx (p->offset);
271 ggc_mark_rtx (p->size);
274 /* Allocate a new mem_attrs structure and insert it into the hash table if
275 one identical to it is not already in the table. We are doing this for
279 get_mem_attrs (alias, expr, offset, size, align, mode)
285 enum machine_mode mode;
290 /* If everything is the default, we can just return zero. */
291 if (alias == 0 && expr == 0 && offset == 0
293 || (mode != BLKmode && GET_MODE_SIZE (mode) == INTVAL (size)))
294 && (align == BITS_PER_UNIT
296 && mode != BLKmode && align == GET_MODE_ALIGNMENT (mode))))
301 attrs.offset = offset;
305 slot = htab_find_slot (mem_attrs_htab, &attrs, INSERT);
308 *slot = ggc_alloc (sizeof (mem_attrs));
309 memcpy (*slot, &attrs, sizeof (mem_attrs));
315 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
316 don't attempt to share with the various global pieces of rtl (such as
317 frame_pointer_rtx). */
320 gen_raw_REG (mode, regno)
321 enum machine_mode mode;
324 rtx x = gen_rtx_raw_REG (mode, regno);
325 ORIGINAL_REGNO (x) = regno;
329 /* There are some RTL codes that require special attention; the generation
330 functions do the raw handling. If you add to this list, modify
331 special_rtx in gengenrtl.c as well. */
334 gen_rtx_CONST_INT (mode, arg)
335 enum machine_mode mode ATTRIBUTE_UNUSED;
340 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
341 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
343 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
344 if (const_true_rtx && arg == STORE_FLAG_VALUE)
345 return const_true_rtx;
348 /* Look up the CONST_INT in the hash table. */
349 slot = htab_find_slot_with_hash (const_int_htab, &arg,
350 (hashval_t) arg, INSERT);
352 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
357 /* CONST_DOUBLEs needs special handling because their length is known
361 gen_rtx_CONST_DOUBLE (mode, arg0, arg1)
362 enum machine_mode mode;
363 HOST_WIDE_INT arg0, arg1;
365 rtx r = rtx_alloc (CONST_DOUBLE);
369 X0EXP (r, 0) = NULL_RTX;
373 for (i = GET_RTX_LENGTH (CONST_DOUBLE) - 1; i > 2; --i)
380 gen_rtx_REG (mode, regno)
381 enum machine_mode mode;
384 /* In case the MD file explicitly references the frame pointer, have
385 all such references point to the same frame pointer. This is
386 used during frame pointer elimination to distinguish the explicit
387 references to these registers from pseudos that happened to be
390 If we have eliminated the frame pointer or arg pointer, we will
391 be using it as a normal register, for example as a spill
392 register. In such cases, we might be accessing it in a mode that
393 is not Pmode and therefore cannot use the pre-allocated rtx.
395 Also don't do this when we are making new REGs in reload, since
396 we don't want to get confused with the real pointers. */
398 if (mode == Pmode && !reload_in_progress)
400 if (regno == FRAME_POINTER_REGNUM)
401 return frame_pointer_rtx;
402 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
403 if (regno == HARD_FRAME_POINTER_REGNUM)
404 return hard_frame_pointer_rtx;
406 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
407 if (regno == ARG_POINTER_REGNUM)
408 return arg_pointer_rtx;
410 #ifdef RETURN_ADDRESS_POINTER_REGNUM
411 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
412 return return_address_pointer_rtx;
414 if (regno == PIC_OFFSET_TABLE_REGNUM
415 && fixed_regs[PIC_OFFSET_TABLE_REGNUM])
416 return pic_offset_table_rtx;
417 if (regno == STACK_POINTER_REGNUM)
418 return stack_pointer_rtx;
421 return gen_raw_REG (mode, regno);
425 gen_rtx_MEM (mode, addr)
426 enum machine_mode mode;
429 rtx rt = gen_rtx_raw_MEM (mode, addr);
431 /* This field is not cleared by the mere allocation of the rtx, so
439 gen_rtx_SUBREG (mode, reg, offset)
440 enum machine_mode mode;
444 /* This is the most common failure type.
445 Catch it early so we can see who does it. */
446 if ((offset % GET_MODE_SIZE (mode)) != 0)
449 /* This check isn't usable right now because combine will
450 throw arbitrary crap like a CALL into a SUBREG in
451 gen_lowpart_for_combine so we must just eat it. */
453 /* Check for this too. */
454 if (offset >= GET_MODE_SIZE (GET_MODE (reg)))
457 return gen_rtx_fmt_ei (SUBREG, mode, reg, offset);
460 /* Generate a SUBREG representing the least-significant part of REG if MODE
461 is smaller than mode of REG, otherwise paradoxical SUBREG. */
464 gen_lowpart_SUBREG (mode, reg)
465 enum machine_mode mode;
468 enum machine_mode inmode;
470 inmode = GET_MODE (reg);
471 if (inmode == VOIDmode)
473 return gen_rtx_SUBREG (mode, reg,
474 subreg_lowpart_offset (mode, inmode));
477 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
479 ** This routine generates an RTX of the size specified by
480 ** <code>, which is an RTX code. The RTX structure is initialized
481 ** from the arguments <element1> through <elementn>, which are
482 ** interpreted according to the specific RTX type's format. The
483 ** special machine mode associated with the rtx (if any) is specified
486 ** gen_rtx can be invoked in a way which resembles the lisp-like
487 ** rtx it will generate. For example, the following rtx structure:
489 ** (plus:QI (mem:QI (reg:SI 1))
490 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
492 ** ...would be generated by the following C code:
494 ** gen_rtx (PLUS, QImode,
495 ** gen_rtx (MEM, QImode,
496 ** gen_rtx (REG, SImode, 1)),
497 ** gen_rtx (MEM, QImode,
498 ** gen_rtx (PLUS, SImode,
499 ** gen_rtx (REG, SImode, 2),
500 ** gen_rtx (REG, SImode, 3)))),
505 gen_rtx VPARAMS ((enum rtx_code code, enum machine_mode mode, ...))
507 int i; /* Array indices... */
508 const char *fmt; /* Current rtx's format... */
509 rtx rt_val; /* RTX to return to caller... */
512 VA_FIXEDARG (p, enum rtx_code, code);
513 VA_FIXEDARG (p, enum machine_mode, mode);
518 rt_val = gen_rtx_CONST_INT (mode, va_arg (p, HOST_WIDE_INT));
523 HOST_WIDE_INT arg0 = va_arg (p, HOST_WIDE_INT);
524 HOST_WIDE_INT arg1 = va_arg (p, HOST_WIDE_INT);
526 rt_val = gen_rtx_CONST_DOUBLE (mode, arg0, arg1);
531 rt_val = gen_rtx_REG (mode, va_arg (p, int));
535 rt_val = gen_rtx_MEM (mode, va_arg (p, rtx));
539 rt_val = rtx_alloc (code); /* Allocate the storage space. */
540 rt_val->mode = mode; /* Store the machine mode... */
542 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
543 for (i = 0; i < GET_RTX_LENGTH (code); i++)
547 case '0': /* Unused field. */
550 case 'i': /* An integer? */
551 XINT (rt_val, i) = va_arg (p, int);
554 case 'w': /* A wide integer? */
555 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
558 case 's': /* A string? */
559 XSTR (rt_val, i) = va_arg (p, char *);
562 case 'e': /* An expression? */
563 case 'u': /* An insn? Same except when printing. */
564 XEXP (rt_val, i) = va_arg (p, rtx);
567 case 'E': /* An RTX vector? */
568 XVEC (rt_val, i) = va_arg (p, rtvec);
571 case 'b': /* A bitmap? */
572 XBITMAP (rt_val, i) = va_arg (p, bitmap);
575 case 't': /* A tree? */
576 XTREE (rt_val, i) = va_arg (p, tree);
590 /* gen_rtvec (n, [rt1, ..., rtn])
592 ** This routine creates an rtvec and stores within it the
593 ** pointers to rtx's which are its arguments.
598 gen_rtvec VPARAMS ((int n, ...))
604 VA_FIXEDARG (p, int, n);
607 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
609 vector = (rtx *) alloca (n * sizeof (rtx));
611 for (i = 0; i < n; i++)
612 vector[i] = va_arg (p, rtx);
614 /* The definition of VA_* in K&R C causes `n' to go out of scope. */
618 return gen_rtvec_v (save_n, vector);
622 gen_rtvec_v (n, argp)
630 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
632 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
634 for (i = 0; i < n; i++)
635 rt_val->elem[i] = *argp++;
640 /* Generate a REG rtx for a new pseudo register of mode MODE.
641 This pseudo is assigned the next sequential register number. */
645 enum machine_mode mode;
647 struct function *f = cfun;
650 /* Don't let anything called after initial flow analysis create new
655 if (generating_concat_p
656 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
657 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
659 /* For complex modes, don't make a single pseudo.
660 Instead, make a CONCAT of two pseudos.
661 This allows noncontiguous allocation of the real and imaginary parts,
662 which makes much better code. Besides, allocating DCmode
663 pseudos overstrains reload on some machines like the 386. */
664 rtx realpart, imagpart;
665 int size = GET_MODE_UNIT_SIZE (mode);
666 enum machine_mode partmode
667 = mode_for_size (size * BITS_PER_UNIT,
668 (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
669 ? MODE_FLOAT : MODE_INT),
672 realpart = gen_reg_rtx (partmode);
673 imagpart = gen_reg_rtx (partmode);
674 return gen_rtx_CONCAT (mode, realpart, imagpart);
677 /* Make sure regno_pointer_align, regno_decl, and regno_reg_rtx are large
678 enough to have an element for this pseudo reg number. */
680 if (reg_rtx_no == f->emit->regno_pointer_align_length)
682 int old_size = f->emit->regno_pointer_align_length;
687 new = xrealloc (f->emit->regno_pointer_align, old_size * 2);
688 memset (new + old_size, 0, old_size);
689 f->emit->regno_pointer_align = (unsigned char *) new;
691 new1 = (rtx *) xrealloc (f->emit->x_regno_reg_rtx,
692 old_size * 2 * sizeof (rtx));
693 memset (new1 + old_size, 0, old_size * sizeof (rtx));
694 regno_reg_rtx = new1;
696 new2 = (tree *) xrealloc (f->emit->regno_decl,
697 old_size * 2 * sizeof (tree));
698 memset (new2 + old_size, 0, old_size * sizeof (tree));
699 f->emit->regno_decl = new2;
701 f->emit->regno_pointer_align_length = old_size * 2;
704 val = gen_raw_REG (mode, reg_rtx_no);
705 regno_reg_rtx[reg_rtx_no++] = val;
709 /* Identify REG (which may be a CONCAT) as a user register. */
715 if (GET_CODE (reg) == CONCAT)
717 REG_USERVAR_P (XEXP (reg, 0)) = 1;
718 REG_USERVAR_P (XEXP (reg, 1)) = 1;
720 else if (GET_CODE (reg) == REG)
721 REG_USERVAR_P (reg) = 1;
726 /* Identify REG as a probable pointer register and show its alignment
727 as ALIGN, if nonzero. */
730 mark_reg_pointer (reg, align)
734 if (! REG_POINTER (reg))
736 REG_POINTER (reg) = 1;
739 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
741 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
742 /* We can no-longer be sure just how aligned this pointer is */
743 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
746 /* Return 1 plus largest pseudo reg number used in the current function. */
754 /* Return 1 + the largest label number used so far in the current function. */
759 if (last_label_num && label_num == base_label_num)
760 return last_label_num;
764 /* Return first label number used in this function (if any were used). */
767 get_first_label_num ()
769 return first_label_num;
772 /* Return the final regno of X, which is a SUBREG of a hard
775 subreg_hard_regno (x, check_mode)
779 enum machine_mode mode = GET_MODE (x);
780 unsigned int byte_offset, base_regno, final_regno;
781 rtx reg = SUBREG_REG (x);
783 /* This is where we attempt to catch illegal subregs
784 created by the compiler. */
785 if (GET_CODE (x) != SUBREG
786 || GET_CODE (reg) != REG)
788 base_regno = REGNO (reg);
789 if (base_regno >= FIRST_PSEUDO_REGISTER)
791 if (check_mode && ! HARD_REGNO_MODE_OK (base_regno, GET_MODE (reg)))
794 /* Catch non-congruent offsets too. */
795 byte_offset = SUBREG_BYTE (x);
796 if ((byte_offset % GET_MODE_SIZE (mode)) != 0)
799 final_regno = subreg_regno (x);
804 /* Return a value representing some low-order bits of X, where the number
805 of low-order bits is given by MODE. Note that no conversion is done
806 between floating-point and fixed-point values, rather, the bit
807 representation is returned.
809 This function handles the cases in common between gen_lowpart, below,
810 and two variants in cse.c and combine.c. These are the cases that can
811 be safely handled at all points in the compilation.
813 If this is not a case we can handle, return 0. */
816 gen_lowpart_common (mode, x)
817 enum machine_mode mode;
820 int msize = GET_MODE_SIZE (mode);
821 int xsize = GET_MODE_SIZE (GET_MODE (x));
824 if (GET_MODE (x) == mode)
827 /* MODE must occupy no more words than the mode of X. */
828 if (GET_MODE (x) != VOIDmode
829 && ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
830 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)))
833 offset = subreg_lowpart_offset (mode, GET_MODE (x));
835 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
836 && (GET_MODE_CLASS (mode) == MODE_INT
837 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
839 /* If we are getting the low-order part of something that has been
840 sign- or zero-extended, we can either just use the object being
841 extended or make a narrower extension. If we want an even smaller
842 piece than the size of the object being extended, call ourselves
845 This case is used mostly by combine and cse. */
847 if (GET_MODE (XEXP (x, 0)) == mode)
849 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
850 return gen_lowpart_common (mode, XEXP (x, 0));
851 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
852 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
854 else if (GET_CODE (x) == SUBREG || GET_CODE (x) == REG
855 || GET_CODE (x) == CONCAT)
856 return simplify_gen_subreg (mode, x, GET_MODE (x), offset);
857 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
858 from the low-order part of the constant. */
859 else if ((GET_MODE_CLASS (mode) == MODE_INT
860 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
861 && GET_MODE (x) == VOIDmode
862 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
864 /* If MODE is twice the host word size, X is already the desired
865 representation. Otherwise, if MODE is wider than a word, we can't
866 do this. If MODE is exactly a word, return just one CONST_INT. */
868 if (GET_MODE_BITSIZE (mode) >= 2 * HOST_BITS_PER_WIDE_INT)
870 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
872 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT)
873 return (GET_CODE (x) == CONST_INT ? x
874 : GEN_INT (CONST_DOUBLE_LOW (x)));
877 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
878 HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
879 : CONST_DOUBLE_LOW (x));
881 /* Sign extend to HOST_WIDE_INT. */
882 val = trunc_int_for_mode (val, mode);
884 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
889 #ifndef REAL_ARITHMETIC
890 /* If X is an integral constant but we want it in floating-point, it
891 must be the case that we have a union of an integer and a floating-point
892 value. If the machine-parameters allow it, simulate that union here
893 and return the result. The two-word and single-word cases are
896 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
897 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
898 || flag_pretend_float)
899 && GET_MODE_CLASS (mode) == MODE_FLOAT
900 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
901 && GET_CODE (x) == CONST_INT
902 && sizeof (float) * HOST_BITS_PER_CHAR == HOST_BITS_PER_WIDE_INT)
904 union {HOST_WIDE_INT i; float d; } u;
907 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
909 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
910 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
911 || flag_pretend_float)
912 && GET_MODE_CLASS (mode) == MODE_FLOAT
913 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
914 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
915 && GET_MODE (x) == VOIDmode
916 && (sizeof (double) * HOST_BITS_PER_CHAR
917 == 2 * HOST_BITS_PER_WIDE_INT))
919 union {HOST_WIDE_INT i[2]; double d; } u;
920 HOST_WIDE_INT low, high;
922 if (GET_CODE (x) == CONST_INT)
923 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
925 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
926 #ifdef HOST_WORDS_BIG_ENDIAN
927 u.i[0] = high, u.i[1] = low;
929 u.i[0] = low, u.i[1] = high;
931 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
934 /* Similarly, if this is converting a floating-point value into a
935 single-word integer. Only do this is the host and target parameters are
938 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
939 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
940 || flag_pretend_float)
941 && (GET_MODE_CLASS (mode) == MODE_INT
942 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
943 && GET_CODE (x) == CONST_DOUBLE
944 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
945 && GET_MODE_BITSIZE (mode) == BITS_PER_WORD)
946 return constant_subword (x, (offset / UNITS_PER_WORD), GET_MODE (x));
948 /* Similarly, if this is converting a floating-point value into a
949 two-word integer, we can do this one word at a time and make an
950 integer. Only do this is the host and target parameters are
953 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
954 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
955 || flag_pretend_float)
956 && (GET_MODE_CLASS (mode) == MODE_INT
957 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
958 && GET_CODE (x) == CONST_DOUBLE
959 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
960 && GET_MODE_BITSIZE (mode) == 2 * BITS_PER_WORD)
962 rtx lowpart, highpart;
964 lowpart = constant_subword (x,
965 (offset / UNITS_PER_WORD) + WORDS_BIG_ENDIAN,
967 highpart = constant_subword (x,
968 (offset / UNITS_PER_WORD) + (! WORDS_BIG_ENDIAN),
970 if (lowpart && GET_CODE (lowpart) == CONST_INT
971 && highpart && GET_CODE (highpart) == CONST_INT)
972 return immed_double_const (INTVAL (lowpart), INTVAL (highpart), mode);
974 #else /* ifndef REAL_ARITHMETIC */
976 /* When we have a FP emulator, we can handle all conversions between
977 FP and integer operands. This simplifies reload because it
978 doesn't have to deal with constructs like (subreg:DI
979 (const_double:SF ...)) or (subreg:DF (const_int ...)). */
980 /* Single-precision floats are always 32-bits and double-precision
981 floats are always 64-bits. */
983 else if (GET_MODE_CLASS (mode) == MODE_FLOAT
984 && GET_MODE_BITSIZE (mode) == 32
985 && GET_CODE (x) == CONST_INT)
991 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
992 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
994 else if (GET_MODE_CLASS (mode) == MODE_FLOAT
995 && GET_MODE_BITSIZE (mode) == 64
996 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
997 && GET_MODE (x) == VOIDmode)
1001 HOST_WIDE_INT low, high;
1003 if (GET_CODE (x) == CONST_INT)
1006 high = low >> (HOST_BITS_PER_WIDE_INT - 1);
1010 low = CONST_DOUBLE_LOW (x);
1011 high = CONST_DOUBLE_HIGH (x);
1014 #if HOST_BITS_PER_WIDE_INT == 32
1015 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
1017 if (WORDS_BIG_ENDIAN)
1018 i[0] = high, i[1] = low;
1020 i[0] = low, i[1] = high;
1025 r = REAL_VALUE_FROM_TARGET_DOUBLE (i);
1026 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
1028 else if ((GET_MODE_CLASS (mode) == MODE_INT
1029 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
1030 && GET_CODE (x) == CONST_DOUBLE
1031 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
1034 long i[4]; /* Only the low 32 bits of each 'long' are used. */
1035 int endian = WORDS_BIG_ENDIAN ? 1 : 0;
1037 /* Convert 'r' into an array of four 32-bit words in target word
1039 REAL_VALUE_FROM_CONST_DOUBLE (r, x);
1040 switch (GET_MODE_BITSIZE (GET_MODE (x)))
1043 REAL_VALUE_TO_TARGET_SINGLE (r, i[3 * endian]);
1046 i[3 - 3 * endian] = 0;
1049 REAL_VALUE_TO_TARGET_DOUBLE (r, i + 2 * endian);
1050 i[2 - 2 * endian] = 0;
1051 i[3 - 2 * endian] = 0;
1054 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i + endian);
1055 i[3 - 3 * endian] = 0;
1058 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i);
1063 /* Now, pack the 32-bit elements of the array into a CONST_DOUBLE
1065 #if HOST_BITS_PER_WIDE_INT == 32
1066 return immed_double_const (i[3 * endian], i[1 + endian], mode);
1068 if (HOST_BITS_PER_WIDE_INT != 64)
1071 return immed_double_const ((((unsigned long) i[3 * endian])
1072 | ((HOST_WIDE_INT) i[1 + endian] << 32)),
1073 (((unsigned long) i[2 - endian])
1074 | ((HOST_WIDE_INT) i[3 - 3 * endian] << 32)),
1078 #endif /* ifndef REAL_ARITHMETIC */
1080 /* Otherwise, we can't do this. */
1084 /* Return the real part (which has mode MODE) of a complex value X.
1085 This always comes at the low address in memory. */
1088 gen_realpart (mode, x)
1089 enum machine_mode mode;
1092 if (WORDS_BIG_ENDIAN
1093 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1095 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1097 ("can't access real part of complex value in hard register");
1098 else if (WORDS_BIG_ENDIAN)
1099 return gen_highpart (mode, x);
1101 return gen_lowpart (mode, x);
1104 /* Return the imaginary part (which has mode MODE) of a complex value X.
1105 This always comes at the high address in memory. */
1108 gen_imagpart (mode, x)
1109 enum machine_mode mode;
1112 if (WORDS_BIG_ENDIAN)
1113 return gen_lowpart (mode, x);
1114 else if (! WORDS_BIG_ENDIAN
1115 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1117 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1119 ("can't access imaginary part of complex value in hard register");
1121 return gen_highpart (mode, x);
1124 /* Return 1 iff X, assumed to be a SUBREG,
1125 refers to the real part of the complex value in its containing reg.
1126 Complex values are always stored with the real part in the first word,
1127 regardless of WORDS_BIG_ENDIAN. */
1130 subreg_realpart_p (x)
1133 if (GET_CODE (x) != SUBREG)
1136 return ((unsigned int) SUBREG_BYTE (x)
1137 < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x))));
1140 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1141 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1142 least-significant part of X.
1143 MODE specifies how big a part of X to return;
1144 it usually should not be larger than a word.
1145 If X is a MEM whose address is a QUEUED, the value may be so also. */
1148 gen_lowpart (mode, x)
1149 enum machine_mode mode;
1152 rtx result = gen_lowpart_common (mode, x);
1156 else if (GET_CODE (x) == REG)
1158 /* Must be a hard reg that's not valid in MODE. */
1159 result = gen_lowpart_common (mode, copy_to_reg (x));
1164 else if (GET_CODE (x) == MEM)
1166 /* The only additional case we can do is MEM. */
1168 if (WORDS_BIG_ENDIAN)
1169 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
1170 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1172 if (BYTES_BIG_ENDIAN)
1173 /* Adjust the address so that the address-after-the-data
1175 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
1176 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
1178 return adjust_address (x, mode, offset);
1180 else if (GET_CODE (x) == ADDRESSOF)
1181 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
1186 /* Like `gen_lowpart', but refer to the most significant part.
1187 This is used to access the imaginary part of a complex number. */
1190 gen_highpart (mode, x)
1191 enum machine_mode mode;
1194 unsigned int msize = GET_MODE_SIZE (mode);
1197 /* This case loses if X is a subreg. To catch bugs early,
1198 complain if an invalid MODE is used even in other cases. */
1199 if (msize > UNITS_PER_WORD
1200 && msize != GET_MODE_UNIT_SIZE (GET_MODE (x)))
1203 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1204 subreg_highpart_offset (mode, GET_MODE (x)));
1206 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1207 the target if we have a MEM. gen_highpart must return a valid operand,
1208 emitting code if necessary to do so. */
1209 if (result != NULL_RTX && GET_CODE (result) == MEM)
1210 result = validize_mem (result);
1217 /* Like gen_highpart_mode, but accept mode of EXP operand in case EXP can
1218 be VOIDmode constant. */
1220 gen_highpart_mode (outermode, innermode, exp)
1221 enum machine_mode outermode, innermode;
1224 if (GET_MODE (exp) != VOIDmode)
1226 if (GET_MODE (exp) != innermode)
1228 return gen_highpart (outermode, exp);
1230 return simplify_gen_subreg (outermode, exp, innermode,
1231 subreg_highpart_offset (outermode, innermode));
1233 /* Return offset in bytes to get OUTERMODE low part
1234 of the value in mode INNERMODE stored in memory in target format. */
1237 subreg_lowpart_offset (outermode, innermode)
1238 enum machine_mode outermode, innermode;
1240 unsigned int offset = 0;
1241 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1245 if (WORDS_BIG_ENDIAN)
1246 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1247 if (BYTES_BIG_ENDIAN)
1248 offset += difference % UNITS_PER_WORD;
1254 /* Return offset in bytes to get OUTERMODE high part
1255 of the value in mode INNERMODE stored in memory in target format. */
1257 subreg_highpart_offset (outermode, innermode)
1258 enum machine_mode outermode, innermode;
1260 unsigned int offset = 0;
1261 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1263 if (GET_MODE_SIZE (innermode) < GET_MODE_SIZE (outermode))
1268 if (! WORDS_BIG_ENDIAN)
1269 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1270 if (! BYTES_BIG_ENDIAN)
1271 offset += difference % UNITS_PER_WORD;
1277 /* Return 1 iff X, assumed to be a SUBREG,
1278 refers to the least significant part of its containing reg.
1279 If X is not a SUBREG, always return 1 (it is its own low part!). */
1282 subreg_lowpart_p (x)
1285 if (GET_CODE (x) != SUBREG)
1287 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1290 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1291 == SUBREG_BYTE (x));
1295 /* Helper routine for all the constant cases of operand_subword.
1296 Some places invoke this directly. */
1299 constant_subword (op, offset, mode)
1302 enum machine_mode mode;
1304 int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD;
1307 /* If OP is already an integer word, return it. */
1308 if (GET_MODE_CLASS (mode) == MODE_INT
1309 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
1312 #ifdef REAL_ARITHMETIC
1313 /* The output is some bits, the width of the target machine's word.
1314 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1316 if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1317 && GET_MODE_CLASS (mode) == MODE_FLOAT
1318 && GET_MODE_BITSIZE (mode) == 64
1319 && GET_CODE (op) == CONST_DOUBLE)
1324 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1325 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
1327 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1328 which the words are written depends on the word endianness.
1329 ??? This is a potential portability problem and should
1330 be fixed at some point.
1332 We must exercise caution with the sign bit. By definition there
1333 are 32 significant bits in K; there may be more in a HOST_WIDE_INT.
1334 Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT.
1335 So we explicitly mask and sign-extend as necessary. */
1336 if (BITS_PER_WORD == 32)
1339 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1340 return GEN_INT (val);
1342 #if HOST_BITS_PER_WIDE_INT >= 64
1343 else if (BITS_PER_WORD >= 64 && offset == 0)
1345 val = k[! WORDS_BIG_ENDIAN];
1346 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1347 val |= (HOST_WIDE_INT) k[WORDS_BIG_ENDIAN] & 0xffffffff;
1348 return GEN_INT (val);
1351 else if (BITS_PER_WORD == 16)
1353 val = k[offset >> 1];
1354 if ((offset & 1) == ! WORDS_BIG_ENDIAN)
1356 val = ((val & 0xffff) ^ 0x8000) - 0x8000;
1357 return GEN_INT (val);
1362 else if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1363 && GET_MODE_CLASS (mode) == MODE_FLOAT
1364 && GET_MODE_BITSIZE (mode) > 64
1365 && GET_CODE (op) == CONST_DOUBLE)
1370 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1371 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k);
1373 if (BITS_PER_WORD == 32)
1376 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1377 return GEN_INT (val);
1379 #if HOST_BITS_PER_WIDE_INT >= 64
1380 else if (BITS_PER_WORD >= 64 && offset <= 1)
1382 val = k[offset * 2 + ! WORDS_BIG_ENDIAN];
1383 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1384 val |= (HOST_WIDE_INT) k[offset * 2 + WORDS_BIG_ENDIAN] & 0xffffffff;
1385 return GEN_INT (val);
1391 #else /* no REAL_ARITHMETIC */
1392 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1393 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1394 || flag_pretend_float)
1395 && GET_MODE_CLASS (mode) == MODE_FLOAT
1396 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
1397 && GET_CODE (op) == CONST_DOUBLE)
1399 /* The constant is stored in the host's word-ordering,
1400 but we want to access it in the target's word-ordering. Some
1401 compilers don't like a conditional inside macro args, so we have two
1402 copies of the return. */
1403 #ifdef HOST_WORDS_BIG_ENDIAN
1404 return GEN_INT (offset == WORDS_BIG_ENDIAN
1405 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1407 return GEN_INT (offset != WORDS_BIG_ENDIAN
1408 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1411 #endif /* no REAL_ARITHMETIC */
1413 /* Single word float is a little harder, since single- and double-word
1414 values often do not have the same high-order bits. We have already
1415 verified that we want the only defined word of the single-word value. */
1416 #ifdef REAL_ARITHMETIC
1417 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1418 && GET_MODE_BITSIZE (mode) == 32
1419 && GET_CODE (op) == CONST_DOUBLE)
1424 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1425 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
1427 /* Sign extend from known 32-bit value to HOST_WIDE_INT. */
1429 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1431 if (BITS_PER_WORD == 16)
1433 if ((offset & 1) == ! WORDS_BIG_ENDIAN)
1435 val = ((val & 0xffff) ^ 0x8000) - 0x8000;
1438 return GEN_INT (val);
1441 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1442 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1443 || flag_pretend_float)
1444 && sizeof (float) * 8 == HOST_BITS_PER_WIDE_INT
1445 && GET_MODE_CLASS (mode) == MODE_FLOAT
1446 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1447 && GET_CODE (op) == CONST_DOUBLE)
1450 union {float f; HOST_WIDE_INT i; } u;
1452 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1455 return GEN_INT (u.i);
1457 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1458 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1459 || flag_pretend_float)
1460 && sizeof (double) * 8 == HOST_BITS_PER_WIDE_INT
1461 && GET_MODE_CLASS (mode) == MODE_FLOAT
1462 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1463 && GET_CODE (op) == CONST_DOUBLE)
1466 union {double d; HOST_WIDE_INT i; } u;
1468 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1471 return GEN_INT (u.i);
1473 #endif /* no REAL_ARITHMETIC */
1475 /* The only remaining cases that we can handle are integers.
1476 Convert to proper endianness now since these cases need it.
1477 At this point, offset == 0 means the low-order word.
1479 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1480 in general. However, if OP is (const_int 0), we can just return
1483 if (op == const0_rtx)
1486 if (GET_MODE_CLASS (mode) != MODE_INT
1487 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE)
1488 || BITS_PER_WORD > HOST_BITS_PER_WIDE_INT)
1491 if (WORDS_BIG_ENDIAN)
1492 offset = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - offset;
1494 /* Find out which word on the host machine this value is in and get
1495 it from the constant. */
1496 val = (offset / size_ratio == 0
1497 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
1498 : (GET_CODE (op) == CONST_INT
1499 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
1501 /* Get the value we want into the low bits of val. */
1502 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT)
1503 val = ((val >> ((offset % size_ratio) * BITS_PER_WORD)));
1505 val = trunc_int_for_mode (val, word_mode);
1507 return GEN_INT (val);
1510 /* Return subword OFFSET of operand OP.
1511 The word number, OFFSET, is interpreted as the word number starting
1512 at the low-order address. OFFSET 0 is the low-order word if not
1513 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1515 If we cannot extract the required word, we return zero. Otherwise,
1516 an rtx corresponding to the requested word will be returned.
1518 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1519 reload has completed, a valid address will always be returned. After
1520 reload, if a valid address cannot be returned, we return zero.
1522 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1523 it is the responsibility of the caller.
1525 MODE is the mode of OP in case it is a CONST_INT.
1527 ??? This is still rather broken for some cases. The problem for the
1528 moment is that all callers of this thing provide no 'goal mode' to
1529 tell us to work with. This exists because all callers were written
1530 in a word based SUBREG world.
1531 Now use of this function can be deprecated by simplify_subreg in most
1536 operand_subword (op, offset, validate_address, mode)
1538 unsigned int offset;
1539 int validate_address;
1540 enum machine_mode mode;
1542 if (mode == VOIDmode)
1543 mode = GET_MODE (op);
1545 if (mode == VOIDmode)
1548 /* If OP is narrower than a word, fail. */
1550 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1553 /* If we want a word outside OP, return zero. */
1555 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1558 /* Form a new MEM at the requested address. */
1559 if (GET_CODE (op) == MEM)
1561 rtx new = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1563 if (! validate_address)
1566 else if (reload_completed)
1568 if (! strict_memory_address_p (word_mode, XEXP (new, 0)))
1572 return replace_equiv_address (new, XEXP (new, 0));
1575 /* Rest can be handled by simplify_subreg. */
1576 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1579 /* Similar to `operand_subword', but never return 0. If we can't extract
1580 the required subword, put OP into a register and try again. If that fails,
1581 abort. We always validate the address in this case.
1583 MODE is the mode of OP, in case it is CONST_INT. */
1586 operand_subword_force (op, offset, mode)
1588 unsigned int offset;
1589 enum machine_mode mode;
1591 rtx result = operand_subword (op, offset, 1, mode);
1596 if (mode != BLKmode && mode != VOIDmode)
1598 /* If this is a register which can not be accessed by words, copy it
1599 to a pseudo register. */
1600 if (GET_CODE (op) == REG)
1601 op = copy_to_reg (op);
1603 op = force_reg (mode, op);
1606 result = operand_subword (op, offset, 1, mode);
1613 /* Given a compare instruction, swap the operands.
1614 A test instruction is changed into a compare of 0 against the operand. */
1617 reverse_comparison (insn)
1620 rtx body = PATTERN (insn);
1623 if (GET_CODE (body) == SET)
1624 comp = SET_SRC (body);
1626 comp = SET_SRC (XVECEXP (body, 0, 0));
1628 if (GET_CODE (comp) == COMPARE)
1630 rtx op0 = XEXP (comp, 0);
1631 rtx op1 = XEXP (comp, 1);
1632 XEXP (comp, 0) = op1;
1633 XEXP (comp, 1) = op0;
1637 rtx new = gen_rtx_COMPARE (VOIDmode,
1638 CONST0_RTX (GET_MODE (comp)), comp);
1639 if (GET_CODE (body) == SET)
1640 SET_SRC (body) = new;
1642 SET_SRC (XVECEXP (body, 0, 0)) = new;
1646 /* Within a MEM_EXPR, we care about either (1) a component ref of a decl,
1647 or (2) a component ref of something variable. Represent the later with
1648 a NULL expression. */
1651 component_ref_for_mem_expr (ref)
1654 tree inner = TREE_OPERAND (ref, 0);
1656 if (TREE_CODE (inner) == COMPONENT_REF)
1657 inner = component_ref_for_mem_expr (inner);
1660 tree placeholder_ptr = 0;
1662 /* Now remove any conversions: they don't change what the underlying
1663 object is. Likewise for SAVE_EXPR. Also handle PLACEHOLDER_EXPR. */
1664 while (TREE_CODE (inner) == NOP_EXPR || TREE_CODE (inner) == CONVERT_EXPR
1665 || TREE_CODE (inner) == NON_LVALUE_EXPR
1666 || TREE_CODE (inner) == VIEW_CONVERT_EXPR
1667 || TREE_CODE (inner) == SAVE_EXPR
1668 || TREE_CODE (inner) == PLACEHOLDER_EXPR)
1669 if (TREE_CODE (inner) == PLACEHOLDER_EXPR)
1670 inner = find_placeholder (inner, &placeholder_ptr);
1672 inner = TREE_OPERAND (inner, 0);
1674 if (! DECL_P (inner))
1678 if (inner == TREE_OPERAND (ref, 0))
1681 return build (COMPONENT_REF, TREE_TYPE (ref), inner,
1682 TREE_OPERAND (ref, 1));
1685 /* Given REF, a MEM, and T, either the type of X or the expression
1686 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1687 if we are making a new object of this type. */
1690 set_mem_attributes (ref, t, objectp)
1695 HOST_WIDE_INT alias = MEM_ALIAS_SET (ref);
1696 tree expr = MEM_EXPR (ref);
1697 rtx offset = MEM_OFFSET (ref);
1698 rtx size = MEM_SIZE (ref);
1699 unsigned int align = MEM_ALIGN (ref);
1702 /* It can happen that type_for_mode was given a mode for which there
1703 is no language-level type. In which case it returns NULL, which
1708 type = TYPE_P (t) ? t : TREE_TYPE (t);
1710 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1711 wrong answer, as it assumes that DECL_RTL already has the right alias
1712 info. Callers should not set DECL_RTL until after the call to
1713 set_mem_attributes. */
1714 if (DECL_P (t) && ref == DECL_RTL_IF_SET (t))
1717 /* Get the alias set from the expression or type (perhaps using a
1718 front-end routine) and use it. */
1719 alias = get_alias_set (t);
1721 MEM_VOLATILE_P (ref) = TYPE_VOLATILE (type);
1722 MEM_IN_STRUCT_P (ref) = AGGREGATE_TYPE_P (type);
1723 RTX_UNCHANGING_P (ref)
1724 |= ((lang_hooks.honor_readonly
1725 && (TYPE_READONLY (type) || TREE_READONLY (t)))
1726 || (! TYPE_P (t) && TREE_CONSTANT (t)));
1728 /* If we are making an object of this type, or if this is a DECL, we know
1729 that it is a scalar if the type is not an aggregate. */
1730 if ((objectp || DECL_P (t)) && ! AGGREGATE_TYPE_P (type))
1731 MEM_SCALAR_P (ref) = 1;
1733 /* We can set the alignment from the type if we are making an object,
1734 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1735 if (objectp || TREE_CODE (t) == INDIRECT_REF || TYPE_ALIGN_OK (type))
1736 align = MAX (align, TYPE_ALIGN (type));
1738 /* If the size is known, we can set that. */
1739 if (TYPE_SIZE_UNIT (type) && host_integerp (TYPE_SIZE_UNIT (type), 1))
1740 size = GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type), 1));
1742 /* If T is not a type, we may be able to deduce some more information about
1746 maybe_set_unchanging (ref, t);
1747 if (TREE_THIS_VOLATILE (t))
1748 MEM_VOLATILE_P (ref) = 1;
1750 /* Now remove any conversions: they don't change what the underlying
1751 object is. Likewise for SAVE_EXPR. */
1752 while (TREE_CODE (t) == NOP_EXPR || TREE_CODE (t) == CONVERT_EXPR
1753 || TREE_CODE (t) == NON_LVALUE_EXPR
1754 || TREE_CODE (t) == VIEW_CONVERT_EXPR
1755 || TREE_CODE (t) == SAVE_EXPR)
1756 t = TREE_OPERAND (t, 0);
1758 /* If this expression can't be addressed (e.g., it contains a reference
1759 to a non-addressable field), show we don't change its alias set. */
1760 if (! can_address_p (t))
1761 MEM_KEEP_ALIAS_SET_P (ref) = 1;
1763 /* If this is a decl, set the attributes of the MEM from it. */
1767 offset = const0_rtx;
1768 size = (DECL_SIZE_UNIT (t)
1769 && host_integerp (DECL_SIZE_UNIT (t), 1)
1770 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t), 1)) : 0);
1771 align = DECL_ALIGN (t);
1774 /* If this is a constant, we know the alignment. */
1775 else if (TREE_CODE_CLASS (TREE_CODE (t)) == 'c')
1777 align = TYPE_ALIGN (type);
1778 #ifdef CONSTANT_ALIGNMENT
1779 align = CONSTANT_ALIGNMENT (t, align);
1783 /* If this is a field reference and not a bit-field, record it. */
1784 /* ??? There is some information that can be gleened from bit-fields,
1785 such as the word offset in the structure that might be modified.
1786 But skip it for now. */
1787 else if (TREE_CODE (t) == COMPONENT_REF
1788 && ! DECL_BIT_FIELD (TREE_OPERAND (t, 1)))
1790 expr = component_ref_for_mem_expr (t);
1791 offset = const0_rtx;
1792 /* ??? Any reason the field size would be different than
1793 the size we got from the type? */
1796 /* If this is an array reference, look for an outer field reference. */
1797 else if (TREE_CODE (t) == ARRAY_REF)
1799 tree off_tree = size_zero_node;
1804 = fold (build (PLUS_EXPR, sizetype,
1805 fold (build (MULT_EXPR, sizetype,
1806 TREE_OPERAND (t, 1),
1807 TYPE_SIZE_UNIT (TREE_TYPE (t)))),
1809 t = TREE_OPERAND (t, 0);
1811 while (TREE_CODE (t) == ARRAY_REF);
1813 if (TREE_CODE (t) == COMPONENT_REF)
1815 expr = component_ref_for_mem_expr (t);
1816 if (host_integerp (off_tree, 1))
1817 offset = GEN_INT (tree_low_cst (off_tree, 1));
1818 /* ??? Any reason the field size would be different than
1819 the size we got from the type? */
1824 /* Now set the attributes we computed above. */
1826 = get_mem_attrs (alias, expr, offset, size, align, GET_MODE (ref));
1828 /* If this is already known to be a scalar or aggregate, we are done. */
1829 if (MEM_IN_STRUCT_P (ref) || MEM_SCALAR_P (ref))
1832 /* If it is a reference into an aggregate, this is part of an aggregate.
1833 Otherwise we don't know. */
1834 else if (TREE_CODE (t) == COMPONENT_REF || TREE_CODE (t) == ARRAY_REF
1835 || TREE_CODE (t) == ARRAY_RANGE_REF
1836 || TREE_CODE (t) == BIT_FIELD_REF)
1837 MEM_IN_STRUCT_P (ref) = 1;
1840 /* Set the alias set of MEM to SET. */
1843 set_mem_alias_set (mem, set)
1847 #ifdef ENABLE_CHECKING
1848 /* If the new and old alias sets don't conflict, something is wrong. */
1849 if (!alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)))
1853 MEM_ATTRS (mem) = get_mem_attrs (set, MEM_EXPR (mem), MEM_OFFSET (mem),
1854 MEM_SIZE (mem), MEM_ALIGN (mem),
1858 /* Set the alignment of MEM to ALIGN bits. */
1861 set_mem_align (mem, align)
1865 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1866 MEM_OFFSET (mem), MEM_SIZE (mem), align,
1870 /* Set the expr for MEM to EXPR. */
1873 set_mem_expr (mem, expr)
1878 = get_mem_attrs (MEM_ALIAS_SET (mem), expr, MEM_OFFSET (mem),
1879 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
1882 /* Set the offset of MEM to OFFSET. */
1885 set_mem_offset (mem, offset)
1888 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1889 offset, MEM_SIZE (mem), MEM_ALIGN (mem),
1893 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1894 and its address changed to ADDR. (VOIDmode means don't change the mode.
1895 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1896 returned memory location is required to be valid. The memory
1897 attributes are not changed. */
1900 change_address_1 (memref, mode, addr, validate)
1902 enum machine_mode mode;
1908 if (GET_CODE (memref) != MEM)
1910 if (mode == VOIDmode)
1911 mode = GET_MODE (memref);
1913 addr = XEXP (memref, 0);
1917 if (reload_in_progress || reload_completed)
1919 if (! memory_address_p (mode, addr))
1923 addr = memory_address (mode, addr);
1926 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1929 new = gen_rtx_MEM (mode, addr);
1930 MEM_COPY_ATTRIBUTES (new, memref);
1934 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1935 way we are changing MEMREF, so we only preserve the alias set. */
1938 change_address (memref, mode, addr)
1940 enum machine_mode mode;
1943 rtx new = change_address_1 (memref, mode, addr, 1);
1944 enum machine_mode mmode = GET_MODE (new);
1947 = get_mem_attrs (MEM_ALIAS_SET (memref), 0, 0,
1948 mmode == BLKmode ? 0 : GEN_INT (GET_MODE_SIZE (mmode)),
1949 (mmode == BLKmode ? BITS_PER_UNIT
1950 : GET_MODE_ALIGNMENT (mmode)),
1956 /* Return a memory reference like MEMREF, but with its mode changed
1957 to MODE and its address offset by OFFSET bytes. If VALIDATE is
1958 nonzero, the memory address is forced to be valid.
1959 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
1960 and caller is responsible for adjusting MEMREF base register. */
1963 adjust_address_1 (memref, mode, offset, validate, adjust)
1965 enum machine_mode mode;
1966 HOST_WIDE_INT offset;
1967 int validate, adjust;
1969 rtx addr = XEXP (memref, 0);
1971 rtx memoffset = MEM_OFFSET (memref);
1973 unsigned int memalign = MEM_ALIGN (memref);
1975 /* ??? Prefer to create garbage instead of creating shared rtl.
1976 This may happen even if offset is non-zero -- consider
1977 (plus (plus reg reg) const_int) -- so do this always. */
1978 addr = copy_rtx (addr);
1982 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
1983 object, we can merge it into the LO_SUM. */
1984 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
1986 && (unsigned HOST_WIDE_INT) offset
1987 < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
1988 addr = gen_rtx_LO_SUM (Pmode, XEXP (addr, 0),
1989 plus_constant (XEXP (addr, 1), offset));
1991 addr = plus_constant (addr, offset);
1994 new = change_address_1 (memref, mode, addr, validate);
1996 /* Compute the new values of the memory attributes due to this adjustment.
1997 We add the offsets and update the alignment. */
1999 memoffset = GEN_INT (offset + INTVAL (memoffset));
2001 /* Compute the new alignment by taking the MIN of the alignment and the
2002 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
2005 memalign = MIN (memalign,
2006 (unsigned int) (offset & -offset) * BITS_PER_UNIT);
2008 /* We can compute the size in a number of ways. */
2009 if (GET_MODE (new) != BLKmode)
2010 size = GEN_INT (GET_MODE_SIZE (GET_MODE (new)));
2011 else if (MEM_SIZE (memref))
2012 size = plus_constant (MEM_SIZE (memref), -offset);
2014 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref),
2015 memoffset, size, memalign, GET_MODE (new));
2017 /* At some point, we should validate that this offset is within the object,
2018 if all the appropriate values are known. */
2022 /* Return a memory reference like MEMREF, but with its mode changed
2023 to MODE and its address changed to ADDR, which is assumed to be
2024 MEMREF offseted by OFFSET bytes. If VALIDATE is
2025 nonzero, the memory address is forced to be valid. */
2028 adjust_automodify_address_1 (memref, mode, addr, offset, validate)
2030 enum machine_mode mode;
2032 HOST_WIDE_INT offset;
2035 memref = change_address_1 (memref, VOIDmode, addr, validate);
2036 return adjust_address_1 (memref, mode, offset, validate, 0);
2039 /* Return a memory reference like MEMREF, but whose address is changed by
2040 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2041 known to be in OFFSET (possibly 1). */
2044 offset_address (memref, offset, pow2)
2049 rtx new = change_address_1 (memref, VOIDmode,
2050 gen_rtx_PLUS (Pmode, XEXP (memref, 0),
2051 force_reg (Pmode, offset)), 1);
2053 /* Update the alignment to reflect the offset. Reset the offset, which
2056 = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref), 0, 0,
2057 MIN (MEM_ALIGN (memref),
2058 (unsigned int) pow2 * BITS_PER_UNIT),
2063 /* Return a memory reference like MEMREF, but with its address changed to
2064 ADDR. The caller is asserting that the actual piece of memory pointed
2065 to is the same, just the form of the address is being changed, such as
2066 by putting something into a register. */
2069 replace_equiv_address (memref, addr)
2073 /* change_address_1 copies the memory attribute structure without change
2074 and that's exactly what we want here. */
2075 update_temp_slot_address (XEXP (memref, 0), addr);
2076 return change_address_1 (memref, VOIDmode, addr, 1);
2079 /* Likewise, but the reference is not required to be valid. */
2082 replace_equiv_address_nv (memref, addr)
2086 return change_address_1 (memref, VOIDmode, addr, 0);
2089 /* Return a memory reference like MEMREF, but with its mode widened to
2090 MODE and offset by OFFSET. This would be used by targets that e.g.
2091 cannot issue QImode memory operations and have to use SImode memory
2092 operations plus masking logic. */
2095 widen_memory_access (memref, mode, offset)
2097 enum machine_mode mode;
2098 HOST_WIDE_INT offset;
2100 rtx new = adjust_address_1 (memref, mode, offset, 1, 1);
2101 tree expr = MEM_EXPR (new);
2102 rtx memoffset = MEM_OFFSET (new);
2103 unsigned int size = GET_MODE_SIZE (mode);
2105 /* If we don't know what offset we were at within the expression, then
2106 we can't know if we've overstepped the bounds. */
2107 if (! memoffset && offset != 0)
2112 if (TREE_CODE (expr) == COMPONENT_REF)
2114 tree field = TREE_OPERAND (expr, 1);
2116 if (! DECL_SIZE_UNIT (field))
2122 /* Is the field at least as large as the access? If so, ok,
2123 otherwise strip back to the containing structure. */
2124 if (TREE_CODE (DECL_SIZE_UNIT (field)) == INTEGER_CST
2125 && compare_tree_int (DECL_SIZE_UNIT (field), size) >= 0
2126 && INTVAL (memoffset) >= 0)
2129 if (! host_integerp (DECL_FIELD_OFFSET (field), 1))
2135 expr = TREE_OPERAND (expr, 0);
2136 memoffset = (GEN_INT (INTVAL (memoffset)
2137 + tree_low_cst (DECL_FIELD_OFFSET (field), 1)
2138 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 1)
2141 /* Similarly for the decl. */
2142 else if (DECL_P (expr)
2143 && DECL_SIZE_UNIT (expr)
2144 && compare_tree_int (DECL_SIZE_UNIT (expr), size) >= 0
2145 && (! memoffset || INTVAL (memoffset) >= 0))
2149 /* The widened memory access overflows the expression, which means
2150 that it could alias another expression. Zap it. */
2157 memoffset = NULL_RTX;
2159 /* The widened memory may alias other stuff, so zap the alias set. */
2160 /* ??? Maybe use get_alias_set on any remaining expression. */
2162 MEM_ATTRS (new) = get_mem_attrs (0, expr, memoffset, GEN_INT (size),
2163 MEM_ALIGN (new), mode);
2168 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2175 label = gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX,
2176 NULL_RTX, label_num++, NULL, NULL);
2178 LABEL_NUSES (label) = 0;
2179 LABEL_ALTERNATE_NAME (label) = NULL;
2183 /* For procedure integration. */
2185 /* Install new pointers to the first and last insns in the chain.
2186 Also, set cur_insn_uid to one higher than the last in use.
2187 Used for an inline-procedure after copying the insn chain. */
2190 set_new_first_and_last_insn (first, last)
2199 for (insn = first; insn; insn = NEXT_INSN (insn))
2200 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2205 /* Set the range of label numbers found in the current function.
2206 This is used when belatedly compiling an inline function. */
2209 set_new_first_and_last_label_num (first, last)
2212 base_label_num = label_num;
2213 first_label_num = first;
2214 last_label_num = last;
2217 /* Set the last label number found in the current function.
2218 This is used when belatedly compiling an inline function. */
2221 set_new_last_label_num (last)
2224 base_label_num = label_num;
2225 last_label_num = last;
2228 /* Restore all variables describing the current status from the structure *P.
2229 This is used after a nested function. */
2232 restore_emit_status (p)
2233 struct function *p ATTRIBUTE_UNUSED;
2236 clear_emit_caches ();
2239 /* Clear out all parts of the state in F that can safely be discarded
2240 after the function has been compiled, to let garbage collection
2241 reclaim the memory. */
2244 free_emit_status (f)
2247 free (f->emit->x_regno_reg_rtx);
2248 free (f->emit->regno_pointer_align);
2249 free (f->emit->regno_decl);
2254 /* Go through all the RTL insn bodies and copy any invalid shared
2255 structure. This routine should only be called once. */
2258 unshare_all_rtl (fndecl, insn)
2264 /* Make sure that virtual parameters are not shared. */
2265 for (decl = DECL_ARGUMENTS (fndecl); decl; decl = TREE_CHAIN (decl))
2266 SET_DECL_RTL (decl, copy_rtx_if_shared (DECL_RTL (decl)));
2268 /* Make sure that virtual stack slots are not shared. */
2269 unshare_all_decls (DECL_INITIAL (fndecl));
2271 /* Unshare just about everything else. */
2272 unshare_all_rtl_1 (insn);
2274 /* Make sure the addresses of stack slots found outside the insn chain
2275 (such as, in DECL_RTL of a variable) are not shared
2276 with the insn chain.
2278 This special care is necessary when the stack slot MEM does not
2279 actually appear in the insn chain. If it does appear, its address
2280 is unshared from all else at that point. */
2281 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
2284 /* Go through all the RTL insn bodies and copy any invalid shared
2285 structure, again. This is a fairly expensive thing to do so it
2286 should be done sparingly. */
2289 unshare_all_rtl_again (insn)
2295 for (p = insn; p; p = NEXT_INSN (p))
2298 reset_used_flags (PATTERN (p));
2299 reset_used_flags (REG_NOTES (p));
2300 reset_used_flags (LOG_LINKS (p));
2303 /* Make sure that virtual stack slots are not shared. */
2304 reset_used_decls (DECL_INITIAL (cfun->decl));
2306 /* Make sure that virtual parameters are not shared. */
2307 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
2308 reset_used_flags (DECL_RTL (decl));
2310 reset_used_flags (stack_slot_list);
2312 unshare_all_rtl (cfun->decl, insn);
2315 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2316 Assumes the mark bits are cleared at entry. */
2319 unshare_all_rtl_1 (insn)
2322 for (; insn; insn = NEXT_INSN (insn))
2325 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
2326 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
2327 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
2331 /* Go through all virtual stack slots of a function and copy any
2332 shared structure. */
2334 unshare_all_decls (blk)
2339 /* Copy shared decls. */
2340 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2341 if (DECL_RTL_SET_P (t))
2342 SET_DECL_RTL (t, copy_rtx_if_shared (DECL_RTL (t)));
2344 /* Now process sub-blocks. */
2345 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2346 unshare_all_decls (t);
2349 /* Go through all virtual stack slots of a function and mark them as
2352 reset_used_decls (blk)
2358 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2359 if (DECL_RTL_SET_P (t))
2360 reset_used_flags (DECL_RTL (t));
2362 /* Now process sub-blocks. */
2363 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2364 reset_used_decls (t);
2367 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2368 Recursively does the same for subexpressions. */
2371 copy_rtx_if_shared (orig)
2377 const char *format_ptr;
2383 code = GET_CODE (x);
2385 /* These types may be freely shared. */
2398 /* SCRATCH must be shared because they represent distinct values. */
2402 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2403 a LABEL_REF, it isn't sharable. */
2404 if (GET_CODE (XEXP (x, 0)) == PLUS
2405 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
2406 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
2415 /* The chain of insns is not being copied. */
2419 /* A MEM is allowed to be shared if its address is constant.
2421 We used to allow sharing of MEMs which referenced
2422 virtual_stack_vars_rtx or virtual_incoming_args_rtx, but
2423 that can lose. instantiate_virtual_regs will not unshare
2424 the MEMs, and combine may change the structure of the address
2425 because it looks safe and profitable in one context, but
2426 in some other context it creates unrecognizable RTL. */
2427 if (CONSTANT_ADDRESS_P (XEXP (x, 0)))
2436 /* This rtx may not be shared. If it has already been seen,
2437 replace it with a copy of itself. */
2443 copy = rtx_alloc (code);
2445 (sizeof (*copy) - sizeof (copy->fld)
2446 + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code)));
2452 /* Now scan the subexpressions recursively.
2453 We can store any replaced subexpressions directly into X
2454 since we know X is not shared! Any vectors in X
2455 must be copied if X was copied. */
2457 format_ptr = GET_RTX_FORMAT (code);
2459 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2461 switch (*format_ptr++)
2464 XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
2468 if (XVEC (x, i) != NULL)
2471 int len = XVECLEN (x, i);
2473 if (copied && len > 0)
2474 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
2475 for (j = 0; j < len; j++)
2476 XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j));
2484 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2485 to look for shared sub-parts. */
2488 reset_used_flags (x)
2493 const char *format_ptr;
2498 code = GET_CODE (x);
2500 /* These types may be freely shared so we needn't do any resetting
2521 /* The chain of insns is not being copied. */
2530 format_ptr = GET_RTX_FORMAT (code);
2531 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2533 switch (*format_ptr++)
2536 reset_used_flags (XEXP (x, i));
2540 for (j = 0; j < XVECLEN (x, i); j++)
2541 reset_used_flags (XVECEXP (x, i, j));
2547 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2548 Return X or the rtx for the pseudo reg the value of X was copied into.
2549 OTHER must be valid as a SET_DEST. */
2552 make_safe_from (x, other)
2556 switch (GET_CODE (other))
2559 other = SUBREG_REG (other);
2561 case STRICT_LOW_PART:
2564 other = XEXP (other, 0);
2570 if ((GET_CODE (other) == MEM
2572 && GET_CODE (x) != REG
2573 && GET_CODE (x) != SUBREG)
2574 || (GET_CODE (other) == REG
2575 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2576 || reg_mentioned_p (other, x))))
2578 rtx temp = gen_reg_rtx (GET_MODE (x));
2579 emit_move_insn (temp, x);
2585 /* Emission of insns (adding them to the doubly-linked list). */
2587 /* Return the first insn of the current sequence or current function. */
2595 /* Return the last insn emitted in current sequence or current function. */
2603 /* Specify a new insn as the last in the chain. */
2606 set_last_insn (insn)
2609 if (NEXT_INSN (insn) != 0)
2614 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2617 get_last_insn_anywhere ()
2619 struct sequence_stack *stack;
2622 for (stack = seq_stack; stack; stack = stack->next)
2623 if (stack->last != 0)
2628 /* Return a number larger than any instruction's uid in this function. */
2633 return cur_insn_uid;
2636 /* Renumber instructions so that no instruction UIDs are wasted. */
2639 renumber_insns (stream)
2644 /* If we're not supposed to renumber instructions, don't. */
2645 if (!flag_renumber_insns)
2648 /* If there aren't that many instructions, then it's not really
2649 worth renumbering them. */
2650 if (flag_renumber_insns == 1 && get_max_uid () < 25000)
2655 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
2658 fprintf (stream, "Renumbering insn %d to %d\n",
2659 INSN_UID (insn), cur_insn_uid);
2660 INSN_UID (insn) = cur_insn_uid++;
2664 /* Return the next insn. If it is a SEQUENCE, return the first insn
2673 insn = NEXT_INSN (insn);
2674 if (insn && GET_CODE (insn) == INSN
2675 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2676 insn = XVECEXP (PATTERN (insn), 0, 0);
2682 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2686 previous_insn (insn)
2691 insn = PREV_INSN (insn);
2692 if (insn && GET_CODE (insn) == INSN
2693 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2694 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
2700 /* Return the next insn after INSN that is not a NOTE. This routine does not
2701 look inside SEQUENCEs. */
2704 next_nonnote_insn (insn)
2709 insn = NEXT_INSN (insn);
2710 if (insn == 0 || GET_CODE (insn) != NOTE)
2717 /* Return the previous insn before INSN that is not a NOTE. This routine does
2718 not look inside SEQUENCEs. */
2721 prev_nonnote_insn (insn)
2726 insn = PREV_INSN (insn);
2727 if (insn == 0 || GET_CODE (insn) != NOTE)
2734 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2735 or 0, if there is none. This routine does not look inside
2739 next_real_insn (insn)
2744 insn = NEXT_INSN (insn);
2745 if (insn == 0 || GET_CODE (insn) == INSN
2746 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
2753 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2754 or 0, if there is none. This routine does not look inside
2758 prev_real_insn (insn)
2763 insn = PREV_INSN (insn);
2764 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
2765 || GET_CODE (insn) == JUMP_INSN)
2772 /* Find the next insn after INSN that really does something. This routine
2773 does not look inside SEQUENCEs. Until reload has completed, this is the
2774 same as next_real_insn. */
2777 active_insn_p (insn)
2780 return (GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
2781 || (GET_CODE (insn) == INSN
2782 && (! reload_completed
2783 || (GET_CODE (PATTERN (insn)) != USE
2784 && GET_CODE (PATTERN (insn)) != CLOBBER))));
2788 next_active_insn (insn)
2793 insn = NEXT_INSN (insn);
2794 if (insn == 0 || active_insn_p (insn))
2801 /* Find the last insn before INSN that really does something. This routine
2802 does not look inside SEQUENCEs. Until reload has completed, this is the
2803 same as prev_real_insn. */
2806 prev_active_insn (insn)
2811 insn = PREV_INSN (insn);
2812 if (insn == 0 || active_insn_p (insn))
2819 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2827 insn = NEXT_INSN (insn);
2828 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2835 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
2843 insn = PREV_INSN (insn);
2844 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2852 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
2853 and REG_CC_USER notes so we can find it. */
2856 link_cc0_insns (insn)
2859 rtx user = next_nonnote_insn (insn);
2861 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
2862 user = XVECEXP (PATTERN (user), 0, 0);
2864 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn,
2866 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
2869 /* Return the next insn that uses CC0 after INSN, which is assumed to
2870 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
2871 applied to the result of this function should yield INSN).
2873 Normally, this is simply the next insn. However, if a REG_CC_USER note
2874 is present, it contains the insn that uses CC0.
2876 Return 0 if we can't find the insn. */
2879 next_cc0_user (insn)
2882 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
2885 return XEXP (note, 0);
2887 insn = next_nonnote_insn (insn);
2888 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
2889 insn = XVECEXP (PATTERN (insn), 0, 0);
2891 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
2897 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
2898 note, it is the previous insn. */
2901 prev_cc0_setter (insn)
2904 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2907 return XEXP (note, 0);
2909 insn = prev_nonnote_insn (insn);
2910 if (! sets_cc0_p (PATTERN (insn)))
2917 /* Increment the label uses for all labels present in rtx. */
2927 code = GET_CODE (x);
2928 if (code == LABEL_REF)
2929 LABEL_NUSES (XEXP (x, 0))++;
2931 fmt = GET_RTX_FORMAT (code);
2932 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2935 mark_label_nuses (XEXP (x, i));
2936 else if (fmt[i] == 'E')
2937 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
2938 mark_label_nuses (XVECEXP (x, i, j));
2943 /* Try splitting insns that can be split for better scheduling.
2944 PAT is the pattern which might split.
2945 TRIAL is the insn providing PAT.
2946 LAST is non-zero if we should return the last insn of the sequence produced.
2948 If this routine succeeds in splitting, it returns the first or last
2949 replacement insn depending on the value of LAST. Otherwise, it
2950 returns TRIAL. If the insn to be returned can be split, it will be. */
2953 try_split (pat, trial, last)
2957 rtx before = PREV_INSN (trial);
2958 rtx after = NEXT_INSN (trial);
2959 int has_barrier = 0;
2964 if (any_condjump_p (trial)
2965 && (note = find_reg_note (trial, REG_BR_PROB, 0)))
2966 split_branch_probability = INTVAL (XEXP (note, 0));
2967 probability = split_branch_probability;
2969 seq = split_insns (pat, trial);
2971 split_branch_probability = -1;
2973 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
2974 We may need to handle this specially. */
2975 if (after && GET_CODE (after) == BARRIER)
2978 after = NEXT_INSN (after);
2983 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
2984 The latter case will normally arise only when being done so that
2985 it, in turn, will be split (SFmode on the 29k is an example). */
2986 if (GET_CODE (seq) == SEQUENCE)
2990 /* Avoid infinite loop if any insn of the result matches
2991 the original pattern. */
2992 for (i = 0; i < XVECLEN (seq, 0); i++)
2993 if (GET_CODE (XVECEXP (seq, 0, i)) == INSN
2994 && rtx_equal_p (PATTERN (XVECEXP (seq, 0, i)), pat))
2998 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2999 if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN)
3001 rtx insn = XVECEXP (seq, 0, i);
3002 mark_jump_label (PATTERN (insn),
3003 XVECEXP (seq, 0, i), 0);
3005 if (probability != -1
3006 && any_condjump_p (insn)
3007 && !find_reg_note (insn, REG_BR_PROB, 0))
3009 /* We can preserve the REG_BR_PROB notes only if exactly
3010 one jump is created, otherwise the machine description
3011 is responsible for this step using
3012 split_branch_probability variable. */
3016 = gen_rtx_EXPR_LIST (REG_BR_PROB,
3017 GEN_INT (probability),
3022 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3023 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3024 if (GET_CODE (trial) == CALL_INSN)
3025 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
3026 if (GET_CODE (XVECEXP (seq, 0, i)) == CALL_INSN)
3027 CALL_INSN_FUNCTION_USAGE (XVECEXP (seq, 0, i))
3028 = CALL_INSN_FUNCTION_USAGE (trial);
3030 /* Copy notes, particularly those related to the CFG. */
3031 for (note = REG_NOTES (trial); note ; note = XEXP (note, 1))
3033 switch (REG_NOTE_KIND (note))
3036 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
3038 rtx insn = XVECEXP (seq, 0, i);
3039 if (GET_CODE (insn) == CALL_INSN
3040 || (flag_non_call_exceptions
3041 && may_trap_p (PATTERN (insn))))
3043 = gen_rtx_EXPR_LIST (REG_EH_REGION,
3051 case REG_ALWAYS_RETURN:
3052 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
3054 rtx insn = XVECEXP (seq, 0, i);
3055 if (GET_CODE (insn) == CALL_INSN)
3057 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3063 case REG_NON_LOCAL_GOTO:
3064 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
3066 rtx insn = XVECEXP (seq, 0, i);
3067 if (GET_CODE (insn) == JUMP_INSN)
3069 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3080 /* If there are LABELS inside the split insns increment the
3081 usage count so we don't delete the label. */
3082 if (GET_CODE (trial) == INSN)
3083 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
3084 if (GET_CODE (XVECEXP (seq, 0, i)) == INSN)
3085 mark_label_nuses (PATTERN (XVECEXP (seq, 0, i)));
3087 tem = emit_insn_after (seq, trial);
3089 delete_related_insns (trial);
3091 emit_barrier_after (tem);
3093 /* Recursively call try_split for each new insn created; by the
3094 time control returns here that insn will be fully split, so
3095 set LAST and continue from the insn after the one returned.
3096 We can't use next_active_insn here since AFTER may be a note.
3097 Ignore deleted insns, which can be occur if not optimizing. */
3098 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
3099 if (! INSN_DELETED_P (tem) && INSN_P (tem))
3100 tem = try_split (PATTERN (tem), tem, 1);
3102 /* Avoid infinite loop if the result matches the original pattern. */
3103 else if (rtx_equal_p (seq, pat))
3107 PATTERN (trial) = seq;
3108 INSN_CODE (trial) = -1;
3109 try_split (seq, trial, last);
3112 /* Return either the first or the last insn, depending on which was
3115 ? (after ? PREV_INSN (after) : last_insn)
3116 : NEXT_INSN (before);
3122 /* Make and return an INSN rtx, initializing all its slots.
3123 Store PATTERN in the pattern slots. */
3126 make_insn_raw (pattern)
3131 insn = rtx_alloc (INSN);
3133 INSN_UID (insn) = cur_insn_uid++;
3134 PATTERN (insn) = pattern;
3135 INSN_CODE (insn) = -1;
3136 LOG_LINKS (insn) = NULL;
3137 REG_NOTES (insn) = NULL;
3139 #ifdef ENABLE_RTL_CHECKING
3142 && (returnjump_p (insn)
3143 || (GET_CODE (insn) == SET
3144 && SET_DEST (insn) == pc_rtx)))
3146 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
3154 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
3157 make_jump_insn_raw (pattern)
3162 insn = rtx_alloc (JUMP_INSN);
3163 INSN_UID (insn) = cur_insn_uid++;
3165 PATTERN (insn) = pattern;
3166 INSN_CODE (insn) = -1;
3167 LOG_LINKS (insn) = NULL;
3168 REG_NOTES (insn) = NULL;
3169 JUMP_LABEL (insn) = NULL;
3174 /* Like `make_insn' but make a CALL_INSN instead of an insn. */
3177 make_call_insn_raw (pattern)
3182 insn = rtx_alloc (CALL_INSN);
3183 INSN_UID (insn) = cur_insn_uid++;
3185 PATTERN (insn) = pattern;
3186 INSN_CODE (insn) = -1;
3187 LOG_LINKS (insn) = NULL;
3188 REG_NOTES (insn) = NULL;
3189 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
3194 /* Add INSN to the end of the doubly-linked list.
3195 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3201 PREV_INSN (insn) = last_insn;
3202 NEXT_INSN (insn) = 0;
3204 if (NULL != last_insn)
3205 NEXT_INSN (last_insn) = insn;
3207 if (NULL == first_insn)
3213 /* Add INSN into the doubly-linked list after insn AFTER. This and
3214 the next should be the only functions called to insert an insn once
3215 delay slots have been filled since only they know how to update a
3219 add_insn_after (insn, after)
3222 rtx next = NEXT_INSN (after);
3225 if (optimize && INSN_DELETED_P (after))
3228 NEXT_INSN (insn) = next;
3229 PREV_INSN (insn) = after;
3233 PREV_INSN (next) = insn;
3234 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3235 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
3237 else if (last_insn == after)
3241 struct sequence_stack *stack = seq_stack;
3242 /* Scan all pending sequences too. */
3243 for (; stack; stack = stack->next)
3244 if (after == stack->last)
3254 if (basic_block_for_insn
3255 && (unsigned int)INSN_UID (after) < basic_block_for_insn->num_elements
3256 && (bb = BLOCK_FOR_INSN (after)))
3258 set_block_for_insn (insn, bb);
3259 /* Should not happen as first in the BB is always
3260 either NOTE or LABEL. */
3261 if (bb->end == after
3262 /* Avoid clobbering of structure when creating new BB. */
3263 && GET_CODE (insn) != BARRIER
3264 && (GET_CODE (insn) != NOTE
3265 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3269 NEXT_INSN (after) = insn;
3270 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
3272 rtx sequence = PATTERN (after);
3273 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3277 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3278 the previous should be the only functions called to insert an insn once
3279 delay slots have been filled since only they know how to update a
3283 add_insn_before (insn, before)
3286 rtx prev = PREV_INSN (before);
3289 if (optimize && INSN_DELETED_P (before))
3292 PREV_INSN (insn) = prev;
3293 NEXT_INSN (insn) = before;
3297 NEXT_INSN (prev) = insn;
3298 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3300 rtx sequence = PATTERN (prev);
3301 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3304 else if (first_insn == before)
3308 struct sequence_stack *stack = seq_stack;
3309 /* Scan all pending sequences too. */
3310 for (; stack; stack = stack->next)
3311 if (before == stack->first)
3313 stack->first = insn;
3321 if (basic_block_for_insn
3322 && (unsigned int)INSN_UID (before) < basic_block_for_insn->num_elements
3323 && (bb = BLOCK_FOR_INSN (before)))
3325 set_block_for_insn (insn, bb);
3326 /* Should not happen as first in the BB is always
3327 either NOTE or LABEl. */
3328 if (bb->head == insn
3329 /* Avoid clobbering of structure when creating new BB. */
3330 && GET_CODE (insn) != BARRIER
3331 && (GET_CODE (insn) != NOTE
3332 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3336 PREV_INSN (before) = insn;
3337 if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE)
3338 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
3341 /* Remove an insn from its doubly-linked list. This function knows how
3342 to handle sequences. */
3347 rtx next = NEXT_INSN (insn);
3348 rtx prev = PREV_INSN (insn);
3353 NEXT_INSN (prev) = next;
3354 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3356 rtx sequence = PATTERN (prev);
3357 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
3360 else if (first_insn == insn)
3364 struct sequence_stack *stack = seq_stack;
3365 /* Scan all pending sequences too. */
3366 for (; stack; stack = stack->next)
3367 if (insn == stack->first)
3369 stack->first = next;
3379 PREV_INSN (next) = prev;
3380 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3381 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
3383 else if (last_insn == insn)
3387 struct sequence_stack *stack = seq_stack;
3388 /* Scan all pending sequences too. */
3389 for (; stack; stack = stack->next)
3390 if (insn == stack->last)
3399 if (basic_block_for_insn
3400 && (unsigned int)INSN_UID (insn) < basic_block_for_insn->num_elements
3401 && (bb = BLOCK_FOR_INSN (insn)))
3403 if (bb->head == insn)
3405 /* Never ever delete the basic block note without deleting whole basic
3407 if (GET_CODE (insn) == NOTE)
3411 if (bb->end == insn)
3416 /* Delete all insns made since FROM.
3417 FROM becomes the new last instruction. */
3420 delete_insns_since (from)
3426 NEXT_INSN (from) = 0;
3430 /* This function is deprecated, please use sequences instead.
3432 Move a consecutive bunch of insns to a different place in the chain.
3433 The insns to be moved are those between FROM and TO.
3434 They are moved to a new position after the insn AFTER.
3435 AFTER must not be FROM or TO or any insn in between.
3437 This function does not know about SEQUENCEs and hence should not be
3438 called after delay-slot filling has been done. */
3441 reorder_insns_nobb (from, to, after)
3442 rtx from, to, after;
3444 /* Splice this bunch out of where it is now. */
3445 if (PREV_INSN (from))
3446 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
3448 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
3449 if (last_insn == to)
3450 last_insn = PREV_INSN (from);
3451 if (first_insn == from)
3452 first_insn = NEXT_INSN (to);
3454 /* Make the new neighbors point to it and it to them. */
3455 if (NEXT_INSN (after))
3456 PREV_INSN (NEXT_INSN (after)) = to;
3458 NEXT_INSN (to) = NEXT_INSN (after);
3459 PREV_INSN (from) = after;
3460 NEXT_INSN (after) = from;
3461 if (after == last_insn)
3465 /* Same as function above, but take care to update BB boundaries. */
3467 reorder_insns (from, to, after)
3468 rtx from, to, after;
3470 rtx prev = PREV_INSN (from);
3471 basic_block bb, bb2;
3473 reorder_insns_nobb (from, to, after);
3475 if (basic_block_for_insn
3476 && (unsigned int)INSN_UID (after) < basic_block_for_insn->num_elements
3477 && (bb = BLOCK_FOR_INSN (after)))
3481 if (basic_block_for_insn
3482 && (unsigned int)INSN_UID (from) < basic_block_for_insn->num_elements
3483 && (bb2 = BLOCK_FOR_INSN (from)))
3489 if (bb->end == after)
3492 for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
3493 set_block_for_insn (x, bb);
3497 /* Return the line note insn preceding INSN. */
3500 find_line_note (insn)
3503 if (no_line_numbers)
3506 for (; insn; insn = PREV_INSN (insn))
3507 if (GET_CODE (insn) == NOTE
3508 && NOTE_LINE_NUMBER (insn) >= 0)
3514 /* Like reorder_insns, but inserts line notes to preserve the line numbers
3515 of the moved insns when debugging. This may insert a note between AFTER
3516 and FROM, and another one after TO. */
3519 reorder_insns_with_line_notes (from, to, after)
3520 rtx from, to, after;
3522 rtx from_line = find_line_note (from);
3523 rtx after_line = find_line_note (after);
3525 reorder_insns (from, to, after);
3527 if (from_line == after_line)
3531 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
3532 NOTE_LINE_NUMBER (from_line),
3535 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
3536 NOTE_LINE_NUMBER (after_line),
3540 /* Remove unnecessary notes from the instruction stream. */
3543 remove_unnecessary_notes ()
3545 rtx block_stack = NULL_RTX;
3546 rtx eh_stack = NULL_RTX;
3551 /* We must not remove the first instruction in the function because
3552 the compiler depends on the first instruction being a note. */
3553 for (insn = NEXT_INSN (get_insns ()); insn; insn = next)
3555 /* Remember what's next. */
3556 next = NEXT_INSN (insn);
3558 /* We're only interested in notes. */
3559 if (GET_CODE (insn) != NOTE)
3562 switch (NOTE_LINE_NUMBER (insn))
3564 case NOTE_INSN_DELETED:
3565 case NOTE_INSN_LOOP_END_TOP_COND:
3569 case NOTE_INSN_EH_REGION_BEG:
3570 eh_stack = alloc_INSN_LIST (insn, eh_stack);
3573 case NOTE_INSN_EH_REGION_END:
3574 /* Too many end notes. */
3575 if (eh_stack == NULL_RTX)
3577 /* Mismatched nesting. */
3578 if (NOTE_EH_HANDLER (XEXP (eh_stack, 0)) != NOTE_EH_HANDLER (insn))
3581 eh_stack = XEXP (eh_stack, 1);
3582 free_INSN_LIST_node (tmp);
3585 case NOTE_INSN_BLOCK_BEG:
3586 /* By now, all notes indicating lexical blocks should have
3587 NOTE_BLOCK filled in. */
3588 if (NOTE_BLOCK (insn) == NULL_TREE)
3590 block_stack = alloc_INSN_LIST (insn, block_stack);
3593 case NOTE_INSN_BLOCK_END:
3594 /* Too many end notes. */
3595 if (block_stack == NULL_RTX)
3597 /* Mismatched nesting. */
3598 if (NOTE_BLOCK (XEXP (block_stack, 0)) != NOTE_BLOCK (insn))
3601 block_stack = XEXP (block_stack, 1);
3602 free_INSN_LIST_node (tmp);
3604 /* Scan back to see if there are any non-note instructions
3605 between INSN and the beginning of this block. If not,
3606 then there is no PC range in the generated code that will
3607 actually be in this block, so there's no point in
3608 remembering the existence of the block. */
3609 for (tmp = PREV_INSN (insn); tmp ; tmp = PREV_INSN (tmp))
3611 /* This block contains a real instruction. Note that we
3612 don't include labels; if the only thing in the block
3613 is a label, then there are still no PC values that
3614 lie within the block. */
3618 /* We're only interested in NOTEs. */
3619 if (GET_CODE (tmp) != NOTE)
3622 if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_BEG)
3624 /* We just verified that this BLOCK matches us with
3625 the block_stack check above. Never delete the
3626 BLOCK for the outermost scope of the function; we
3627 can refer to names from that scope even if the
3628 block notes are messed up. */
3629 if (! is_body_block (NOTE_BLOCK (insn))
3630 && (*debug_hooks->ignore_block) (NOTE_BLOCK (insn)))
3637 else if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_END)
3638 /* There's a nested block. We need to leave the
3639 current block in place since otherwise the debugger
3640 wouldn't be able to show symbols from our block in
3641 the nested block. */
3647 /* Too many begin notes. */
3648 if (block_stack || eh_stack)
3653 /* Emit an insn of given code and pattern
3654 at a specified place within the doubly-linked list. */
3656 /* Make an instruction with body PATTERN
3657 and output it before the instruction BEFORE. */
3660 emit_insn_before (pattern, before)
3661 rtx pattern, before;
3665 if (GET_CODE (pattern) == SEQUENCE)
3669 for (i = 0; i < XVECLEN (pattern, 0); i++)
3671 insn = XVECEXP (pattern, 0, i);
3672 add_insn_before (insn, before);
3677 insn = make_insn_raw (pattern);
3678 add_insn_before (insn, before);
3684 /* Make an instruction with body PATTERN and code JUMP_INSN
3685 and output it before the instruction BEFORE. */
3688 emit_jump_insn_before (pattern, before)
3689 rtx pattern, before;
3693 if (GET_CODE (pattern) == SEQUENCE)
3694 insn = emit_insn_before (pattern, before);
3697 insn = make_jump_insn_raw (pattern);
3698 add_insn_before (insn, before);
3704 /* Make an instruction with body PATTERN and code CALL_INSN
3705 and output it before the instruction BEFORE. */
3708 emit_call_insn_before (pattern, before)
3709 rtx pattern, before;
3713 if (GET_CODE (pattern) == SEQUENCE)
3714 insn = emit_insn_before (pattern, before);
3717 insn = make_call_insn_raw (pattern);
3718 add_insn_before (insn, before);
3719 PUT_CODE (insn, CALL_INSN);
3725 /* Make an insn of code BARRIER
3726 and output it before the insn BEFORE. */
3729 emit_barrier_before (before)
3732 rtx insn = rtx_alloc (BARRIER);
3734 INSN_UID (insn) = cur_insn_uid++;
3736 add_insn_before (insn, before);
3740 /* Emit the label LABEL before the insn BEFORE. */
3743 emit_label_before (label, before)
3746 /* This can be called twice for the same label as a result of the
3747 confusion that follows a syntax error! So make it harmless. */
3748 if (INSN_UID (label) == 0)
3750 INSN_UID (label) = cur_insn_uid++;
3751 add_insn_before (label, before);
3757 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
3760 emit_note_before (subtype, before)
3764 rtx note = rtx_alloc (NOTE);
3765 INSN_UID (note) = cur_insn_uid++;
3766 NOTE_SOURCE_FILE (note) = 0;
3767 NOTE_LINE_NUMBER (note) = subtype;
3769 add_insn_before (note, before);
3773 /* Make an insn of code INSN with body PATTERN
3774 and output it after the insn AFTER. */
3777 emit_insn_after (pattern, after)
3782 if (GET_CODE (pattern) == SEQUENCE)
3786 for (i = 0; i < XVECLEN (pattern, 0); i++)
3788 insn = XVECEXP (pattern, 0, i);
3789 add_insn_after (insn, after);
3795 insn = make_insn_raw (pattern);
3796 add_insn_after (insn, after);
3802 /* Similar to emit_insn_after, except that line notes are to be inserted so
3803 as to act as if this insn were at FROM. */
3806 emit_insn_after_with_line_notes (pattern, after, from)
3807 rtx pattern, after, from;
3809 rtx from_line = find_line_note (from);
3810 rtx after_line = find_line_note (after);
3811 rtx insn = emit_insn_after (pattern, after);
3814 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
3815 NOTE_LINE_NUMBER (from_line),
3819 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
3820 NOTE_LINE_NUMBER (after_line),
3824 /* Make an insn of code JUMP_INSN with body PATTERN
3825 and output it after the insn AFTER. */
3828 emit_jump_insn_after (pattern, after)
3833 if (GET_CODE (pattern) == SEQUENCE)
3834 insn = emit_insn_after (pattern, after);
3837 insn = make_jump_insn_raw (pattern);
3838 add_insn_after (insn, after);
3844 /* Make an insn of code BARRIER
3845 and output it after the insn AFTER. */
3848 emit_barrier_after (after)
3851 rtx insn = rtx_alloc (BARRIER);
3853 INSN_UID (insn) = cur_insn_uid++;
3855 add_insn_after (insn, after);
3859 /* Emit the label LABEL after the insn AFTER. */
3862 emit_label_after (label, after)
3865 /* This can be called twice for the same label
3866 as a result of the confusion that follows a syntax error!
3867 So make it harmless. */
3868 if (INSN_UID (label) == 0)
3870 INSN_UID (label) = cur_insn_uid++;
3871 add_insn_after (label, after);
3877 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
3880 emit_note_after (subtype, after)
3884 rtx note = rtx_alloc (NOTE);
3885 INSN_UID (note) = cur_insn_uid++;
3886 NOTE_SOURCE_FILE (note) = 0;
3887 NOTE_LINE_NUMBER (note) = subtype;
3888 add_insn_after (note, after);
3892 /* Emit a line note for FILE and LINE after the insn AFTER. */
3895 emit_line_note_after (file, line, after)
3902 if (no_line_numbers && line > 0)
3908 note = rtx_alloc (NOTE);
3909 INSN_UID (note) = cur_insn_uid++;
3910 NOTE_SOURCE_FILE (note) = file;
3911 NOTE_LINE_NUMBER (note) = line;
3912 add_insn_after (note, after);
3916 /* Make an insn of code INSN with pattern PATTERN
3917 and add it to the end of the doubly-linked list.
3918 If PATTERN is a SEQUENCE, take the elements of it
3919 and emit an insn for each element.
3921 Returns the last insn emitted. */
3927 rtx insn = last_insn;
3929 if (GET_CODE (pattern) == SEQUENCE)
3933 for (i = 0; i < XVECLEN (pattern, 0); i++)
3935 insn = XVECEXP (pattern, 0, i);
3941 insn = make_insn_raw (pattern);
3948 /* Emit the insns in a chain starting with INSN.
3949 Return the last insn emitted. */
3959 rtx next = NEXT_INSN (insn);
3968 /* Emit the insns in a chain starting with INSN and place them in front of
3969 the insn BEFORE. Return the last insn emitted. */
3972 emit_insns_before (insn, before)
3980 rtx next = NEXT_INSN (insn);
3981 add_insn_before (insn, before);
3989 /* Emit the insns in a chain starting with FIRST and place them in back of
3990 the insn AFTER. Return the last insn emitted. */
3993 emit_insns_after (first, after)
4007 if (basic_block_for_insn
4008 && (unsigned int)INSN_UID (after) < basic_block_for_insn->num_elements
4009 && (bb = BLOCK_FOR_INSN (after)))
4011 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4012 set_block_for_insn (last, bb);
4013 set_block_for_insn (last, bb);
4014 if (bb->end == after)
4018 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4021 after_after = NEXT_INSN (after);
4023 NEXT_INSN (after) = first;
4024 PREV_INSN (first) = after;
4025 NEXT_INSN (last) = after_after;
4027 PREV_INSN (after_after) = last;
4029 if (after == last_insn)
4034 /* Make an insn of code JUMP_INSN with pattern PATTERN
4035 and add it to the end of the doubly-linked list. */
4038 emit_jump_insn (pattern)
4041 if (GET_CODE (pattern) == SEQUENCE)
4042 return emit_insn (pattern);
4045 rtx insn = make_jump_insn_raw (pattern);
4051 /* Make an insn of code CALL_INSN with pattern PATTERN
4052 and add it to the end of the doubly-linked list. */
4055 emit_call_insn (pattern)
4058 if (GET_CODE (pattern) == SEQUENCE)
4059 return emit_insn (pattern);
4062 rtx insn = make_call_insn_raw (pattern);
4064 PUT_CODE (insn, CALL_INSN);
4069 /* Add the label LABEL to the end of the doubly-linked list. */
4075 /* This can be called twice for the same label
4076 as a result of the confusion that follows a syntax error!
4077 So make it harmless. */
4078 if (INSN_UID (label) == 0)
4080 INSN_UID (label) = cur_insn_uid++;
4086 /* Make an insn of code BARRIER
4087 and add it to the end of the doubly-linked list. */
4092 rtx barrier = rtx_alloc (BARRIER);
4093 INSN_UID (barrier) = cur_insn_uid++;
4098 /* Make an insn of code NOTE
4099 with data-fields specified by FILE and LINE
4100 and add it to the end of the doubly-linked list,
4101 but only if line-numbers are desired for debugging info. */
4104 emit_line_note (file, line)
4108 set_file_and_line_for_stmt (file, line);
4111 if (no_line_numbers)
4115 return emit_note (file, line);
4118 /* Make an insn of code NOTE
4119 with data-fields specified by FILE and LINE
4120 and add it to the end of the doubly-linked list.
4121 If it is a line-number NOTE, omit it if it matches the previous one. */
4124 emit_note (file, line)
4132 if (file && last_filename && !strcmp (file, last_filename)
4133 && line == last_linenum)
4135 last_filename = file;
4136 last_linenum = line;
4139 if (no_line_numbers && line > 0)
4145 note = rtx_alloc (NOTE);
4146 INSN_UID (note) = cur_insn_uid++;
4147 NOTE_SOURCE_FILE (note) = file;
4148 NOTE_LINE_NUMBER (note) = line;
4153 /* Emit a NOTE, and don't omit it even if LINE is the previous note. */
4156 emit_line_note_force (file, line)
4161 return emit_line_note (file, line);
4164 /* Cause next statement to emit a line note even if the line number
4165 has not changed. This is used at the beginning of a function. */
4168 force_next_line_note ()
4173 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4174 note of this type already exists, remove it first. */
4177 set_unique_reg_note (insn, kind, datum)
4182 rtx note = find_reg_note (insn, kind, NULL_RTX);
4188 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4189 has multiple sets (some callers assume single_set
4190 means the insn only has one set, when in fact it
4191 means the insn only has one * useful * set). */
4192 if (GET_CODE (PATTERN (insn)) == PARALLEL && multiple_sets (insn))
4199 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4200 It serves no useful purpose and breaks eliminate_regs. */
4201 if (GET_CODE (datum) == ASM_OPERANDS)
4211 XEXP (note, 0) = datum;
4215 REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn));
4216 return REG_NOTES (insn);
4219 /* Return an indication of which type of insn should have X as a body.
4220 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
4226 if (GET_CODE (x) == CODE_LABEL)
4228 if (GET_CODE (x) == CALL)
4230 if (GET_CODE (x) == RETURN)
4232 if (GET_CODE (x) == SET)
4234 if (SET_DEST (x) == pc_rtx)
4236 else if (GET_CODE (SET_SRC (x)) == CALL)
4241 if (GET_CODE (x) == PARALLEL)
4244 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
4245 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
4247 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4248 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
4250 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4251 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
4257 /* Emit the rtl pattern X as an appropriate kind of insn.
4258 If X is a label, it is simply added into the insn chain. */
4264 enum rtx_code code = classify_insn (x);
4266 if (code == CODE_LABEL)
4267 return emit_label (x);
4268 else if (code == INSN)
4269 return emit_insn (x);
4270 else if (code == JUMP_INSN)
4272 rtx insn = emit_jump_insn (x);
4273 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
4274 return emit_barrier ();
4277 else if (code == CALL_INSN)
4278 return emit_call_insn (x);
4283 /* Begin emitting insns to a sequence which can be packaged in an
4284 RTL_EXPR. If this sequence will contain something that might cause
4285 the compiler to pop arguments to function calls (because those
4286 pops have previously been deferred; see INHIBIT_DEFER_POP for more
4287 details), use do_pending_stack_adjust before calling this function.
4288 That will ensure that the deferred pops are not accidentally
4289 emitted in the middle of this sequence. */
4294 struct sequence_stack *tem;
4296 tem = (struct sequence_stack *) xmalloc (sizeof (struct sequence_stack));
4298 tem->next = seq_stack;
4299 tem->first = first_insn;
4300 tem->last = last_insn;
4301 tem->sequence_rtl_expr = seq_rtl_expr;
4309 /* Similarly, but indicate that this sequence will be placed in T, an
4310 RTL_EXPR. See the documentation for start_sequence for more
4311 information about how to use this function. */
4314 start_sequence_for_rtl_expr (t)
4322 /* Set up the insn chain starting with FIRST as the current sequence,
4323 saving the previously current one. See the documentation for
4324 start_sequence for more information about how to use this function. */
4327 push_to_sequence (first)
4334 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
4340 /* Set up the insn chain from a chain stort in FIRST to LAST. */
4343 push_to_full_sequence (first, last)
4349 /* We really should have the end of the insn chain here. */
4350 if (last && NEXT_INSN (last))
4354 /* Set up the outer-level insn chain
4355 as the current sequence, saving the previously current one. */
4358 push_topmost_sequence ()
4360 struct sequence_stack *stack, *top = NULL;
4364 for (stack = seq_stack; stack; stack = stack->next)
4367 first_insn = top->first;
4368 last_insn = top->last;
4369 seq_rtl_expr = top->sequence_rtl_expr;
4372 /* After emitting to the outer-level insn chain, update the outer-level
4373 insn chain, and restore the previous saved state. */
4376 pop_topmost_sequence ()
4378 struct sequence_stack *stack, *top = NULL;
4380 for (stack = seq_stack; stack; stack = stack->next)
4383 top->first = first_insn;
4384 top->last = last_insn;
4385 /* ??? Why don't we save seq_rtl_expr here? */
4390 /* After emitting to a sequence, restore previous saved state.
4392 To get the contents of the sequence just made, you must call
4393 `gen_sequence' *before* calling here.
4395 If the compiler might have deferred popping arguments while
4396 generating this sequence, and this sequence will not be immediately
4397 inserted into the instruction stream, use do_pending_stack_adjust
4398 before calling gen_sequence. That will ensure that the deferred
4399 pops are inserted into this sequence, and not into some random
4400 location in the instruction stream. See INHIBIT_DEFER_POP for more
4401 information about deferred popping of arguments. */
4406 struct sequence_stack *tem = seq_stack;
4408 first_insn = tem->first;
4409 last_insn = tem->last;
4410 seq_rtl_expr = tem->sequence_rtl_expr;
4411 seq_stack = tem->next;
4416 /* This works like end_sequence, but records the old sequence in FIRST
4420 end_full_sequence (first, last)
4423 *first = first_insn;
4428 /* Return 1 if currently emitting into a sequence. */
4433 return seq_stack != 0;
4436 /* Generate a SEQUENCE rtx containing the insns already emitted
4437 to the current sequence.
4439 This is how the gen_... function from a DEFINE_EXPAND
4440 constructs the SEQUENCE that it returns. */
4450 /* Count the insns in the chain. */
4452 for (tem = first_insn; tem; tem = NEXT_INSN (tem))
4455 /* If only one insn, return it rather than a SEQUENCE.
4456 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
4457 the case of an empty list.)
4458 We only return the pattern of an insn if its code is INSN and it
4459 has no notes. This ensures that no information gets lost. */
4461 && ! RTX_FRAME_RELATED_P (first_insn)
4462 && GET_CODE (first_insn) == INSN
4463 /* Don't throw away any reg notes. */
4464 && REG_NOTES (first_insn) == 0)
4465 return PATTERN (first_insn);
4467 result = gen_rtx_SEQUENCE (VOIDmode, rtvec_alloc (len));
4469 for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++)
4470 XVECEXP (result, 0, i) = tem;
4475 /* Put the various virtual registers into REGNO_REG_RTX. */
4478 init_virtual_regs (es)
4479 struct emit_status *es;
4481 rtx *ptr = es->x_regno_reg_rtx;
4482 ptr[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
4483 ptr[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
4484 ptr[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
4485 ptr[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
4486 ptr[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
4490 clear_emit_caches ()
4494 /* Clear the start_sequence/gen_sequence cache. */
4495 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
4496 sequence_result[i] = 0;
4500 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
4501 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
4502 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
4503 static int copy_insn_n_scratches;
4505 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4506 copied an ASM_OPERANDS.
4507 In that case, it is the original input-operand vector. */
4508 static rtvec orig_asm_operands_vector;
4510 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4511 copied an ASM_OPERANDS.
4512 In that case, it is the copied input-operand vector. */
4513 static rtvec copy_asm_operands_vector;
4515 /* Likewise for the constraints vector. */
4516 static rtvec orig_asm_constraints_vector;
4517 static rtvec copy_asm_constraints_vector;
4519 /* Recursively create a new copy of an rtx for copy_insn.
4520 This function differs from copy_rtx in that it handles SCRATCHes and
4521 ASM_OPERANDs properly.
4522 Normally, this function is not used directly; use copy_insn as front end.
4523 However, you could first copy an insn pattern with copy_insn and then use
4524 this function afterwards to properly copy any REG_NOTEs containing
4534 const char *format_ptr;
4536 code = GET_CODE (orig);
4552 for (i = 0; i < copy_insn_n_scratches; i++)
4553 if (copy_insn_scratch_in[i] == orig)
4554 return copy_insn_scratch_out[i];
4558 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
4559 a LABEL_REF, it isn't sharable. */
4560 if (GET_CODE (XEXP (orig, 0)) == PLUS
4561 && GET_CODE (XEXP (XEXP (orig, 0), 0)) == SYMBOL_REF
4562 && GET_CODE (XEXP (XEXP (orig, 0), 1)) == CONST_INT)
4566 /* A MEM with a constant address is not sharable. The problem is that
4567 the constant address may need to be reloaded. If the mem is shared,
4568 then reloading one copy of this mem will cause all copies to appear
4569 to have been reloaded. */
4575 copy = rtx_alloc (code);
4577 /* Copy the various flags, and other information. We assume that
4578 all fields need copying, and then clear the fields that should
4579 not be copied. That is the sensible default behavior, and forces
4580 us to explicitly document why we are *not* copying a flag. */
4581 memcpy (copy, orig, sizeof (struct rtx_def) - sizeof (rtunion));
4583 /* We do not copy the USED flag, which is used as a mark bit during
4584 walks over the RTL. */
4587 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
4588 if (GET_RTX_CLASS (code) == 'i')
4592 copy->frame_related = 0;
4595 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
4597 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
4599 copy->fld[i] = orig->fld[i];
4600 switch (*format_ptr++)
4603 if (XEXP (orig, i) != NULL)
4604 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
4609 if (XVEC (orig, i) == orig_asm_constraints_vector)
4610 XVEC (copy, i) = copy_asm_constraints_vector;
4611 else if (XVEC (orig, i) == orig_asm_operands_vector)
4612 XVEC (copy, i) = copy_asm_operands_vector;
4613 else if (XVEC (orig, i) != NULL)
4615 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
4616 for (j = 0; j < XVECLEN (copy, i); j++)
4617 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
4628 /* These are left unchanged. */
4636 if (code == SCRATCH)
4638 i = copy_insn_n_scratches++;
4639 if (i >= MAX_RECOG_OPERANDS)
4641 copy_insn_scratch_in[i] = orig;
4642 copy_insn_scratch_out[i] = copy;
4644 else if (code == ASM_OPERANDS)
4646 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
4647 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
4648 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
4649 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
4655 /* Create a new copy of an rtx.
4656 This function differs from copy_rtx in that it handles SCRATCHes and
4657 ASM_OPERANDs properly.
4658 INSN doesn't really have to be a full INSN; it could be just the
4664 copy_insn_n_scratches = 0;
4665 orig_asm_operands_vector = 0;
4666 orig_asm_constraints_vector = 0;
4667 copy_asm_operands_vector = 0;
4668 copy_asm_constraints_vector = 0;
4669 return copy_insn_1 (insn);
4672 /* Initialize data structures and variables in this file
4673 before generating rtl for each function. */
4678 struct function *f = cfun;
4680 f->emit = (struct emit_status *) xmalloc (sizeof (struct emit_status));
4683 seq_rtl_expr = NULL;
4685 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
4688 first_label_num = label_num;
4692 clear_emit_caches ();
4694 /* Init the tables that describe all the pseudo regs. */
4696 f->emit->regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
4698 f->emit->regno_pointer_align
4699 = (unsigned char *) xcalloc (f->emit->regno_pointer_align_length,
4700 sizeof (unsigned char));
4703 = (rtx *) xcalloc (f->emit->regno_pointer_align_length, sizeof (rtx));
4706 = (tree *) xcalloc (f->emit->regno_pointer_align_length, sizeof (tree));
4708 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
4709 init_virtual_regs (f->emit);
4711 /* Indicate that the virtual registers and stack locations are
4713 REG_POINTER (stack_pointer_rtx) = 1;
4714 REG_POINTER (frame_pointer_rtx) = 1;
4715 REG_POINTER (hard_frame_pointer_rtx) = 1;
4716 REG_POINTER (arg_pointer_rtx) = 1;
4718 REG_POINTER (virtual_incoming_args_rtx) = 1;
4719 REG_POINTER (virtual_stack_vars_rtx) = 1;
4720 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
4721 REG_POINTER (virtual_outgoing_args_rtx) = 1;
4722 REG_POINTER (virtual_cfa_rtx) = 1;
4724 #ifdef STACK_BOUNDARY
4725 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
4726 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
4727 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
4728 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
4730 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
4731 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
4732 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
4733 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
4734 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
4737 #ifdef INIT_EXPANDERS
4742 /* Mark SS for GC. */
4745 mark_sequence_stack (ss)
4746 struct sequence_stack *ss;
4750 ggc_mark_rtx (ss->first);
4751 ggc_mark_tree (ss->sequence_rtl_expr);
4756 /* Mark ES for GC. */
4759 mark_emit_status (es)
4760 struct emit_status *es;
4769 for (i = es->regno_pointer_align_length, r = es->x_regno_reg_rtx,
4771 i > 0; --i, ++r, ++t)
4777 mark_sequence_stack (es->sequence_stack);
4778 ggc_mark_tree (es->sequence_rtl_expr);
4779 ggc_mark_rtx (es->x_first_insn);
4782 /* Create some permanent unique rtl objects shared between all functions.
4783 LINE_NUMBERS is nonzero if line numbers are to be generated. */
4786 init_emit_once (line_numbers)
4790 enum machine_mode mode;
4791 enum machine_mode double_mode;
4793 /* Initialize the CONST_INT and memory attribute hash tables. */
4794 const_int_htab = htab_create (37, const_int_htab_hash,
4795 const_int_htab_eq, NULL);
4796 ggc_add_deletable_htab (const_int_htab, 0, 0);
4798 mem_attrs_htab = htab_create (37, mem_attrs_htab_hash,
4799 mem_attrs_htab_eq, NULL);
4800 ggc_add_deletable_htab (mem_attrs_htab, 0, mem_attrs_mark);
4802 no_line_numbers = ! line_numbers;
4804 /* Compute the word and byte modes. */
4806 byte_mode = VOIDmode;
4807 word_mode = VOIDmode;
4808 double_mode = VOIDmode;
4810 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
4811 mode = GET_MODE_WIDER_MODE (mode))
4813 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
4814 && byte_mode == VOIDmode)
4817 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
4818 && word_mode == VOIDmode)
4822 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
4823 mode = GET_MODE_WIDER_MODE (mode))
4825 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
4826 && double_mode == VOIDmode)
4830 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
4832 /* Assign register numbers to the globally defined register rtx.
4833 This must be done at runtime because the register number field
4834 is in a union and some compilers can't initialize unions. */
4836 pc_rtx = gen_rtx (PC, VOIDmode);
4837 cc0_rtx = gen_rtx (CC0, VOIDmode);
4838 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
4839 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
4840 if (hard_frame_pointer_rtx == 0)
4841 hard_frame_pointer_rtx = gen_raw_REG (Pmode,
4842 HARD_FRAME_POINTER_REGNUM);
4843 if (arg_pointer_rtx == 0)
4844 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
4845 virtual_incoming_args_rtx =
4846 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
4847 virtual_stack_vars_rtx =
4848 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
4849 virtual_stack_dynamic_rtx =
4850 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
4851 virtual_outgoing_args_rtx =
4852 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
4853 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
4855 /* These rtx must be roots if GC is enabled. */
4856 ggc_add_rtx_root (global_rtl, GR_MAX);
4858 #ifdef INIT_EXPANDERS
4859 /* This is to initialize {init|mark|free}_machine_status before the first
4860 call to push_function_context_to. This is needed by the Chill front
4861 end which calls push_function_context_to before the first call to
4862 init_function_start. */
4866 /* Create the unique rtx's for certain rtx codes and operand values. */
4868 /* Don't use gen_rtx here since gen_rtx in this case
4869 tries to use these variables. */
4870 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
4871 const_int_rtx[i + MAX_SAVED_CONST_INT] =
4872 gen_rtx_raw_CONST_INT (VOIDmode, i);
4873 ggc_add_rtx_root (const_int_rtx, 2 * MAX_SAVED_CONST_INT + 1);
4875 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
4876 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
4877 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
4879 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
4881 dconst0 = REAL_VALUE_ATOF ("0", double_mode);
4882 dconst1 = REAL_VALUE_ATOF ("1", double_mode);
4883 dconst2 = REAL_VALUE_ATOF ("2", double_mode);
4884 dconstm1 = REAL_VALUE_ATOF ("-1", double_mode);
4886 for (i = 0; i <= 2; i++)
4888 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
4889 mode = GET_MODE_WIDER_MODE (mode))
4891 rtx tem = rtx_alloc (CONST_DOUBLE);
4892 union real_extract u;
4894 /* Zero any holes in a structure. */
4895 memset ((char *) &u, 0, sizeof u);
4896 u.d = i == 0 ? dconst0 : i == 1 ? dconst1 : dconst2;
4898 /* Avoid trailing garbage in the rtx. */
4899 if (sizeof (u) < sizeof (HOST_WIDE_INT))
4900 CONST_DOUBLE_LOW (tem) = 0;
4901 if (sizeof (u) < 2 * sizeof (HOST_WIDE_INT))
4902 CONST_DOUBLE_HIGH (tem) = 0;
4904 memcpy (&CONST_DOUBLE_LOW (tem), &u, sizeof u);
4905 CONST_DOUBLE_CHAIN (tem) = NULL_RTX;
4906 PUT_MODE (tem, mode);
4908 const_tiny_rtx[i][(int) mode] = tem;
4911 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
4913 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
4914 mode = GET_MODE_WIDER_MODE (mode))
4915 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
4917 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
4919 mode = GET_MODE_WIDER_MODE (mode))
4920 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
4923 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
4924 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
4925 const_tiny_rtx[0][i] = const0_rtx;
4927 const_tiny_rtx[0][(int) BImode] = const0_rtx;
4928 if (STORE_FLAG_VALUE == 1)
4929 const_tiny_rtx[1][(int) BImode] = const1_rtx;
4931 /* For bounded pointers, `&const_tiny_rtx[0][0]' is not the same as
4932 `(rtx *) const_tiny_rtx'. The former has bounds that only cover
4933 `const_tiny_rtx[0]', whereas the latter has bounds that cover all. */
4934 ggc_add_rtx_root ((rtx *) const_tiny_rtx, sizeof const_tiny_rtx / sizeof (rtx));
4935 ggc_add_rtx_root (&const_true_rtx, 1);
4937 #ifdef RETURN_ADDRESS_POINTER_REGNUM
4938 return_address_pointer_rtx
4939 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
4943 struct_value_rtx = STRUCT_VALUE;
4945 struct_value_rtx = gen_rtx_REG (Pmode, STRUCT_VALUE_REGNUM);
4948 #ifdef STRUCT_VALUE_INCOMING
4949 struct_value_incoming_rtx = STRUCT_VALUE_INCOMING;
4951 #ifdef STRUCT_VALUE_INCOMING_REGNUM
4952 struct_value_incoming_rtx
4953 = gen_rtx_REG (Pmode, STRUCT_VALUE_INCOMING_REGNUM);
4955 struct_value_incoming_rtx = struct_value_rtx;
4959 #ifdef STATIC_CHAIN_REGNUM
4960 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
4962 #ifdef STATIC_CHAIN_INCOMING_REGNUM
4963 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
4964 static_chain_incoming_rtx
4965 = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
4968 static_chain_incoming_rtx = static_chain_rtx;
4972 static_chain_rtx = STATIC_CHAIN;
4974 #ifdef STATIC_CHAIN_INCOMING
4975 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
4977 static_chain_incoming_rtx = static_chain_rtx;
4981 if (PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
4982 pic_offset_table_rtx = gen_raw_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
4984 ggc_add_rtx_root (&pic_offset_table_rtx, 1);
4985 ggc_add_rtx_root (&struct_value_rtx, 1);
4986 ggc_add_rtx_root (&struct_value_incoming_rtx, 1);
4987 ggc_add_rtx_root (&static_chain_rtx, 1);
4988 ggc_add_rtx_root (&static_chain_incoming_rtx, 1);
4989 ggc_add_rtx_root (&return_address_pointer_rtx, 1);
4992 /* Query and clear/ restore no_line_numbers. This is used by the
4993 switch / case handling in stmt.c to give proper line numbers in
4994 warnings about unreachable code. */
4997 force_line_numbers ()
4999 int old = no_line_numbers;
5001 no_line_numbers = 0;
5003 force_next_line_note ();
5008 restore_line_number_status (old_value)
5011 no_line_numbers = old_value;