1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains the functions `gen_rtx', `gen_reg_rtx'
26 and `gen_label_rtx' that are the usual ways of creating rtl
27 expressions for most purposes.
29 It also has the functions for creating insns and linking
30 them in the doubly-linked chain.
32 The patterns of the insns are created by machine-dependent
33 routines in insn-emit.c, which is generated automatically from
34 the machine description. These routines use `gen_rtx' to make
35 the individual rtx's of the pattern; what is machine dependent
36 is the kind of rtx's they make and what arguments they use. */
40 #include "coretypes.h"
50 #include "hard-reg-set.h"
52 #include "insn-config.h"
56 #include "basic-block.h"
59 #include "langhooks.h"
61 /* Commonly used modes. */
63 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
64 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
65 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
66 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
69 /* This is *not* reset after each function. It gives each CODE_LABEL
70 in the entire compilation a unique label number. */
72 static GTY(()) int label_num = 1;
74 /* Highest label number in current function.
75 Zero means use the value of label_num instead.
76 This is nonzero only when belatedly compiling an inline function. */
78 static int last_label_num;
80 /* Value label_num had when set_new_first_and_last_label_number was called.
81 If label_num has not changed since then, last_label_num is valid. */
83 static int base_label_num;
85 /* Nonzero means do not generate NOTEs for source line numbers. */
87 static int no_line_numbers;
89 /* Commonly used rtx's, so that we only need space for one copy.
90 These are initialized once for the entire compilation.
91 All of these are unique; no other rtx-object will be equal to any
94 rtx global_rtl[GR_MAX];
96 /* Commonly used RTL for hard registers. These objects are not necessarily
97 unique, so we allocate them separately from global_rtl. They are
98 initialized once per compilation unit, then copied into regno_reg_rtx
99 at the beginning of each function. */
100 static GTY(()) rtx static_regno_reg_rtx[FIRST_PSEUDO_REGISTER];
102 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
103 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
104 record a copy of const[012]_rtx. */
106 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
110 REAL_VALUE_TYPE dconst0;
111 REAL_VALUE_TYPE dconst1;
112 REAL_VALUE_TYPE dconst2;
113 REAL_VALUE_TYPE dconst3;
114 REAL_VALUE_TYPE dconst10;
115 REAL_VALUE_TYPE dconstm1;
116 REAL_VALUE_TYPE dconstm2;
117 REAL_VALUE_TYPE dconsthalf;
118 REAL_VALUE_TYPE dconstthird;
119 REAL_VALUE_TYPE dconstpi;
120 REAL_VALUE_TYPE dconste;
122 /* All references to the following fixed hard registers go through
123 these unique rtl objects. On machines where the frame-pointer and
124 arg-pointer are the same register, they use the same unique object.
126 After register allocation, other rtl objects which used to be pseudo-regs
127 may be clobbered to refer to the frame-pointer register.
128 But references that were originally to the frame-pointer can be
129 distinguished from the others because they contain frame_pointer_rtx.
131 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
132 tricky: until register elimination has taken place hard_frame_pointer_rtx
133 should be used if it is being set, and frame_pointer_rtx otherwise. After
134 register elimination hard_frame_pointer_rtx should always be used.
135 On machines where the two registers are same (most) then these are the
138 In an inline procedure, the stack and frame pointer rtxs may not be
139 used for anything else. */
140 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
141 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
142 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
144 /* This is used to implement __builtin_return_address for some machines.
145 See for instance the MIPS port. */
146 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
148 /* We make one copy of (const_int C) where C is in
149 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
150 to save space during the compilation and simplify comparisons of
153 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
155 /* A hash table storing CONST_INTs whose absolute value is greater
156 than MAX_SAVED_CONST_INT. */
158 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
159 htab_t const_int_htab;
161 /* A hash table storing memory attribute structures. */
162 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs)))
163 htab_t mem_attrs_htab;
165 /* A hash table storing register attribute structures. */
166 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs)))
167 htab_t reg_attrs_htab;
169 /* A hash table storing all CONST_DOUBLEs. */
170 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
171 htab_t const_double_htab;
173 #define first_insn (cfun->emit->x_first_insn)
174 #define last_insn (cfun->emit->x_last_insn)
175 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
176 #define last_location (cfun->emit->x_last_location)
177 #define first_label_num (cfun->emit->x_first_label_num)
179 static rtx make_jump_insn_raw (rtx);
180 static rtx make_call_insn_raw (rtx);
181 static rtx find_line_note (rtx);
182 static rtx change_address_1 (rtx, enum machine_mode, rtx, int);
183 static void unshare_all_rtl_1 (rtx);
184 static void unshare_all_decls (tree);
185 static void reset_used_decls (tree);
186 static void mark_label_nuses (rtx);
187 static hashval_t const_int_htab_hash (const void *);
188 static int const_int_htab_eq (const void *, const void *);
189 static hashval_t const_double_htab_hash (const void *);
190 static int const_double_htab_eq (const void *, const void *);
191 static rtx lookup_const_double (rtx);
192 static hashval_t mem_attrs_htab_hash (const void *);
193 static int mem_attrs_htab_eq (const void *, const void *);
194 static mem_attrs *get_mem_attrs (HOST_WIDE_INT, tree, rtx, rtx, unsigned int,
196 static hashval_t reg_attrs_htab_hash (const void *);
197 static int reg_attrs_htab_eq (const void *, const void *);
198 static reg_attrs *get_reg_attrs (tree, int);
199 static tree component_ref_for_mem_expr (tree);
200 static rtx gen_const_vector_0 (enum machine_mode);
201 static rtx gen_complex_constant_part (enum machine_mode, rtx, int);
203 /* Probability of the conditional branch currently proceeded by try_split.
204 Set to -1 otherwise. */
205 int split_branch_probability = -1;
207 /* Returns a hash code for X (which is a really a CONST_INT). */
210 const_int_htab_hash (const void *x)
212 return (hashval_t) INTVAL ((rtx) x);
215 /* Returns nonzero if the value represented by X (which is really a
216 CONST_INT) is the same as that given by Y (which is really a
220 const_int_htab_eq (const void *x, const void *y)
222 return (INTVAL ((rtx) x) == *((const HOST_WIDE_INT *) y));
225 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
227 const_double_htab_hash (const void *x)
232 if (GET_MODE (value) == VOIDmode)
233 h = CONST_DOUBLE_LOW (value) ^ CONST_DOUBLE_HIGH (value);
236 h = real_hash (CONST_DOUBLE_REAL_VALUE (value));
237 /* MODE is used in the comparison, so it should be in the hash. */
238 h ^= GET_MODE (value);
243 /* Returns nonzero if the value represented by X (really a ...)
244 is the same as that represented by Y (really a ...) */
246 const_double_htab_eq (const void *x, const void *y)
248 rtx a = (rtx)x, b = (rtx)y;
250 if (GET_MODE (a) != GET_MODE (b))
252 if (GET_MODE (a) == VOIDmode)
253 return (CONST_DOUBLE_LOW (a) == CONST_DOUBLE_LOW (b)
254 && CONST_DOUBLE_HIGH (a) == CONST_DOUBLE_HIGH (b));
256 return real_identical (CONST_DOUBLE_REAL_VALUE (a),
257 CONST_DOUBLE_REAL_VALUE (b));
260 /* Returns a hash code for X (which is a really a mem_attrs *). */
263 mem_attrs_htab_hash (const void *x)
265 mem_attrs *p = (mem_attrs *) x;
267 return (p->alias ^ (p->align * 1000)
268 ^ ((p->offset ? INTVAL (p->offset) : 0) * 50000)
269 ^ ((p->size ? INTVAL (p->size) : 0) * 2500000)
273 /* Returns nonzero if the value represented by X (which is really a
274 mem_attrs *) is the same as that given by Y (which is also really a
278 mem_attrs_htab_eq (const void *x, const void *y)
280 mem_attrs *p = (mem_attrs *) x;
281 mem_attrs *q = (mem_attrs *) y;
283 return (p->alias == q->alias && p->expr == q->expr && p->offset == q->offset
284 && p->size == q->size && p->align == q->align);
287 /* Allocate a new mem_attrs structure and insert it into the hash table if
288 one identical to it is not already in the table. We are doing this for
292 get_mem_attrs (HOST_WIDE_INT alias, tree expr, rtx offset, rtx size,
293 unsigned int align, enum machine_mode mode)
298 /* If everything is the default, we can just return zero.
299 This must match what the corresponding MEM_* macros return when the
300 field is not present. */
301 if (alias == 0 && expr == 0 && offset == 0
303 || (mode != BLKmode && GET_MODE_SIZE (mode) == INTVAL (size)))
304 && (STRICT_ALIGNMENT && mode != BLKmode
305 ? align == GET_MODE_ALIGNMENT (mode) : align == BITS_PER_UNIT))
310 attrs.offset = offset;
314 slot = htab_find_slot (mem_attrs_htab, &attrs, INSERT);
317 *slot = ggc_alloc (sizeof (mem_attrs));
318 memcpy (*slot, &attrs, sizeof (mem_attrs));
324 /* Returns a hash code for X (which is a really a reg_attrs *). */
327 reg_attrs_htab_hash (const void *x)
329 reg_attrs *p = (reg_attrs *) x;
331 return ((p->offset * 1000) ^ (long) p->decl);
334 /* Returns nonzero if the value represented by X (which is really a
335 reg_attrs *) is the same as that given by Y (which is also really a
339 reg_attrs_htab_eq (const void *x, const void *y)
341 reg_attrs *p = (reg_attrs *) x;
342 reg_attrs *q = (reg_attrs *) y;
344 return (p->decl == q->decl && p->offset == q->offset);
346 /* Allocate a new reg_attrs structure and insert it into the hash table if
347 one identical to it is not already in the table. We are doing this for
351 get_reg_attrs (tree decl, int offset)
356 /* If everything is the default, we can just return zero. */
357 if (decl == 0 && offset == 0)
361 attrs.offset = offset;
363 slot = htab_find_slot (reg_attrs_htab, &attrs, INSERT);
366 *slot = ggc_alloc (sizeof (reg_attrs));
367 memcpy (*slot, &attrs, sizeof (reg_attrs));
373 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
374 don't attempt to share with the various global pieces of rtl (such as
375 frame_pointer_rtx). */
378 gen_raw_REG (enum machine_mode mode, int regno)
380 rtx x = gen_rtx_raw_REG (mode, regno);
381 ORIGINAL_REGNO (x) = regno;
385 /* There are some RTL codes that require special attention; the generation
386 functions do the raw handling. If you add to this list, modify
387 special_rtx in gengenrtl.c as well. */
390 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED, HOST_WIDE_INT arg)
394 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
395 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
397 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
398 if (const_true_rtx && arg == STORE_FLAG_VALUE)
399 return const_true_rtx;
402 /* Look up the CONST_INT in the hash table. */
403 slot = htab_find_slot_with_hash (const_int_htab, &arg,
404 (hashval_t) arg, INSERT);
406 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
412 gen_int_mode (HOST_WIDE_INT c, enum machine_mode mode)
414 return GEN_INT (trunc_int_for_mode (c, mode));
417 /* CONST_DOUBLEs might be created from pairs of integers, or from
418 REAL_VALUE_TYPEs. Also, their length is known only at run time,
419 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
421 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
422 hash table. If so, return its counterpart; otherwise add it
423 to the hash table and return it. */
425 lookup_const_double (rtx real)
427 void **slot = htab_find_slot (const_double_htab, real, INSERT);
434 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
435 VALUE in mode MODE. */
437 const_double_from_real_value (REAL_VALUE_TYPE value, enum machine_mode mode)
439 rtx real = rtx_alloc (CONST_DOUBLE);
440 PUT_MODE (real, mode);
442 memcpy (&CONST_DOUBLE_LOW (real), &value, sizeof (REAL_VALUE_TYPE));
444 return lookup_const_double (real);
447 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
448 of ints: I0 is the low-order word and I1 is the high-order word.
449 Do not use this routine for non-integer modes; convert to
450 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
453 immed_double_const (HOST_WIDE_INT i0, HOST_WIDE_INT i1, enum machine_mode mode)
458 if (mode != VOIDmode)
461 if (GET_MODE_CLASS (mode) != MODE_INT
462 && GET_MODE_CLASS (mode) != MODE_PARTIAL_INT
463 /* We can get a 0 for an error mark. */
464 && GET_MODE_CLASS (mode) != MODE_VECTOR_INT
465 && GET_MODE_CLASS (mode) != MODE_VECTOR_FLOAT)
468 /* We clear out all bits that don't belong in MODE, unless they and
469 our sign bit are all one. So we get either a reasonable negative
470 value or a reasonable unsigned value for this mode. */
471 width = GET_MODE_BITSIZE (mode);
472 if (width < HOST_BITS_PER_WIDE_INT
473 && ((i0 & ((HOST_WIDE_INT) (-1) << (width - 1)))
474 != ((HOST_WIDE_INT) (-1) << (width - 1))))
475 i0 &= ((HOST_WIDE_INT) 1 << width) - 1, i1 = 0;
476 else if (width == HOST_BITS_PER_WIDE_INT
477 && ! (i1 == ~0 && i0 < 0))
479 else if (width > 2 * HOST_BITS_PER_WIDE_INT)
480 /* We cannot represent this value as a constant. */
483 /* If this would be an entire word for the target, but is not for
484 the host, then sign-extend on the host so that the number will
485 look the same way on the host that it would on the target.
487 For example, when building a 64 bit alpha hosted 32 bit sparc
488 targeted compiler, then we want the 32 bit unsigned value -1 to be
489 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
490 The latter confuses the sparc backend. */
492 if (width < HOST_BITS_PER_WIDE_INT
493 && (i0 & ((HOST_WIDE_INT) 1 << (width - 1))))
494 i0 |= ((HOST_WIDE_INT) (-1) << width);
496 /* If MODE fits within HOST_BITS_PER_WIDE_INT, always use a
499 ??? Strictly speaking, this is wrong if we create a CONST_INT for
500 a large unsigned constant with the size of MODE being
501 HOST_BITS_PER_WIDE_INT and later try to interpret that constant
502 in a wider mode. In that case we will mis-interpret it as a
505 Unfortunately, the only alternative is to make a CONST_DOUBLE for
506 any constant in any mode if it is an unsigned constant larger
507 than the maximum signed integer in an int on the host. However,
508 doing this will break everyone that always expects to see a
509 CONST_INT for SImode and smaller.
511 We have always been making CONST_INTs in this case, so nothing
512 new is being broken. */
514 if (width <= HOST_BITS_PER_WIDE_INT)
515 i1 = (i0 < 0) ? ~(HOST_WIDE_INT) 0 : 0;
518 /* If this integer fits in one word, return a CONST_INT. */
519 if ((i1 == 0 && i0 >= 0) || (i1 == ~0 && i0 < 0))
522 /* We use VOIDmode for integers. */
523 value = rtx_alloc (CONST_DOUBLE);
524 PUT_MODE (value, VOIDmode);
526 CONST_DOUBLE_LOW (value) = i0;
527 CONST_DOUBLE_HIGH (value) = i1;
529 for (i = 2; i < (sizeof CONST_DOUBLE_FORMAT - 1); i++)
530 XWINT (value, i) = 0;
532 return lookup_const_double (value);
536 gen_rtx_REG (enum machine_mode mode, unsigned int regno)
538 /* In case the MD file explicitly references the frame pointer, have
539 all such references point to the same frame pointer. This is
540 used during frame pointer elimination to distinguish the explicit
541 references to these registers from pseudos that happened to be
544 If we have eliminated the frame pointer or arg pointer, we will
545 be using it as a normal register, for example as a spill
546 register. In such cases, we might be accessing it in a mode that
547 is not Pmode and therefore cannot use the pre-allocated rtx.
549 Also don't do this when we are making new REGs in reload, since
550 we don't want to get confused with the real pointers. */
552 if (mode == Pmode && !reload_in_progress)
554 if (regno == FRAME_POINTER_REGNUM
555 && (!reload_completed || frame_pointer_needed))
556 return frame_pointer_rtx;
557 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
558 if (regno == HARD_FRAME_POINTER_REGNUM
559 && (!reload_completed || frame_pointer_needed))
560 return hard_frame_pointer_rtx;
562 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
563 if (regno == ARG_POINTER_REGNUM)
564 return arg_pointer_rtx;
566 #ifdef RETURN_ADDRESS_POINTER_REGNUM
567 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
568 return return_address_pointer_rtx;
570 if (regno == (unsigned) PIC_OFFSET_TABLE_REGNUM
571 && fixed_regs[PIC_OFFSET_TABLE_REGNUM])
572 return pic_offset_table_rtx;
573 if (regno == STACK_POINTER_REGNUM)
574 return stack_pointer_rtx;
578 /* If the per-function register table has been set up, try to re-use
579 an existing entry in that table to avoid useless generation of RTL.
581 This code is disabled for now until we can fix the various backends
582 which depend on having non-shared hard registers in some cases. Long
583 term we want to re-enable this code as it can significantly cut down
584 on the amount of useless RTL that gets generated.
586 We'll also need to fix some code that runs after reload that wants to
587 set ORIGINAL_REGNO. */
592 && regno < FIRST_PSEUDO_REGISTER
593 && reg_raw_mode[regno] == mode)
594 return regno_reg_rtx[regno];
597 return gen_raw_REG (mode, regno);
601 gen_rtx_MEM (enum machine_mode mode, rtx addr)
603 rtx rt = gen_rtx_raw_MEM (mode, addr);
605 /* This field is not cleared by the mere allocation of the rtx, so
613 gen_rtx_SUBREG (enum machine_mode mode, rtx reg, int offset)
615 /* This is the most common failure type.
616 Catch it early so we can see who does it. */
617 if ((offset % GET_MODE_SIZE (mode)) != 0)
620 /* This check isn't usable right now because combine will
621 throw arbitrary crap like a CALL into a SUBREG in
622 gen_lowpart_for_combine so we must just eat it. */
624 /* Check for this too. */
625 if (offset >= GET_MODE_SIZE (GET_MODE (reg)))
628 return gen_rtx_raw_SUBREG (mode, reg, offset);
631 /* Generate a SUBREG representing the least-significant part of REG if MODE
632 is smaller than mode of REG, otherwise paradoxical SUBREG. */
635 gen_lowpart_SUBREG (enum machine_mode mode, rtx reg)
637 enum machine_mode inmode;
639 inmode = GET_MODE (reg);
640 if (inmode == VOIDmode)
642 return gen_rtx_SUBREG (mode, reg,
643 subreg_lowpart_offset (mode, inmode));
646 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
648 ** This routine generates an RTX of the size specified by
649 ** <code>, which is an RTX code. The RTX structure is initialized
650 ** from the arguments <element1> through <elementn>, which are
651 ** interpreted according to the specific RTX type's format. The
652 ** special machine mode associated with the rtx (if any) is specified
655 ** gen_rtx can be invoked in a way which resembles the lisp-like
656 ** rtx it will generate. For example, the following rtx structure:
658 ** (plus:QI (mem:QI (reg:SI 1))
659 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
661 ** ...would be generated by the following C code:
663 ** gen_rtx (PLUS, QImode,
664 ** gen_rtx (MEM, QImode,
665 ** gen_rtx (REG, SImode, 1)),
666 ** gen_rtx (MEM, QImode,
667 ** gen_rtx (PLUS, SImode,
668 ** gen_rtx (REG, SImode, 2),
669 ** gen_rtx (REG, SImode, 3)))),
674 gen_rtx (enum rtx_code code, enum machine_mode mode, ...)
676 int i; /* Array indices... */
677 const char *fmt; /* Current rtx's format... */
678 rtx rt_val; /* RTX to return to caller... */
686 rt_val = gen_rtx_CONST_INT (mode, va_arg (p, HOST_WIDE_INT));
691 HOST_WIDE_INT arg0 = va_arg (p, HOST_WIDE_INT);
692 HOST_WIDE_INT arg1 = va_arg (p, HOST_WIDE_INT);
694 rt_val = immed_double_const (arg0, arg1, mode);
699 rt_val = gen_rtx_REG (mode, va_arg (p, int));
703 rt_val = gen_rtx_MEM (mode, va_arg (p, rtx));
707 rt_val = rtx_alloc (code); /* Allocate the storage space. */
708 rt_val->mode = mode; /* Store the machine mode... */
710 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
711 for (i = 0; i < GET_RTX_LENGTH (code); i++)
715 case '0': /* Field with unknown use. Zero it. */
716 X0EXP (rt_val, i) = NULL_RTX;
719 case 'i': /* An integer? */
720 XINT (rt_val, i) = va_arg (p, int);
723 case 'w': /* A wide integer? */
724 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
727 case 's': /* A string? */
728 XSTR (rt_val, i) = va_arg (p, char *);
731 case 'e': /* An expression? */
732 case 'u': /* An insn? Same except when printing. */
733 XEXP (rt_val, i) = va_arg (p, rtx);
736 case 'E': /* An RTX vector? */
737 XVEC (rt_val, i) = va_arg (p, rtvec);
740 case 'b': /* A bitmap? */
741 XBITMAP (rt_val, i) = va_arg (p, bitmap);
744 case 't': /* A tree? */
745 XTREE (rt_val, i) = va_arg (p, tree);
759 /* gen_rtvec (n, [rt1, ..., rtn])
761 ** This routine creates an rtvec and stores within it the
762 ** pointers to rtx's which are its arguments.
767 gen_rtvec (int n, ...)
776 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
778 vector = alloca (n * sizeof (rtx));
780 for (i = 0; i < n; i++)
781 vector[i] = va_arg (p, rtx);
783 /* The definition of VA_* in K&R C causes `n' to go out of scope. */
787 return gen_rtvec_v (save_n, vector);
791 gen_rtvec_v (int n, rtx *argp)
797 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
799 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
801 for (i = 0; i < n; i++)
802 rt_val->elem[i] = *argp++;
807 /* Generate a REG rtx for a new pseudo register of mode MODE.
808 This pseudo is assigned the next sequential register number. */
811 gen_reg_rtx (enum machine_mode mode)
813 struct function *f = cfun;
816 /* Don't let anything called after initial flow analysis create new
821 if (generating_concat_p
822 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
823 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
825 /* For complex modes, don't make a single pseudo.
826 Instead, make a CONCAT of two pseudos.
827 This allows noncontiguous allocation of the real and imaginary parts,
828 which makes much better code. Besides, allocating DCmode
829 pseudos overstrains reload on some machines like the 386. */
830 rtx realpart, imagpart;
831 enum machine_mode partmode = GET_MODE_INNER (mode);
833 realpart = gen_reg_rtx (partmode);
834 imagpart = gen_reg_rtx (partmode);
835 return gen_rtx_CONCAT (mode, realpart, imagpart);
838 /* Make sure regno_pointer_align, and regno_reg_rtx are large
839 enough to have an element for this pseudo reg number. */
841 if (reg_rtx_no == f->emit->regno_pointer_align_length)
843 int old_size = f->emit->regno_pointer_align_length;
847 new = ggc_realloc (f->emit->regno_pointer_align, old_size * 2);
848 memset (new + old_size, 0, old_size);
849 f->emit->regno_pointer_align = (unsigned char *) new;
851 new1 = ggc_realloc (f->emit->x_regno_reg_rtx,
852 old_size * 2 * sizeof (rtx));
853 memset (new1 + old_size, 0, old_size * sizeof (rtx));
854 regno_reg_rtx = new1;
856 f->emit->regno_pointer_align_length = old_size * 2;
859 val = gen_raw_REG (mode, reg_rtx_no);
860 regno_reg_rtx[reg_rtx_no++] = val;
864 /* Generate a register with same attributes as REG,
865 but offsetted by OFFSET. */
868 gen_rtx_REG_offset (rtx reg, enum machine_mode mode, unsigned int regno, int offset)
870 rtx new = gen_rtx_REG (mode, regno);
871 REG_ATTRS (new) = get_reg_attrs (REG_EXPR (reg),
872 REG_OFFSET (reg) + offset);
876 /* Set the decl for MEM to DECL. */
879 set_reg_attrs_from_mem (rtx reg, rtx mem)
881 if (MEM_OFFSET (mem) && GET_CODE (MEM_OFFSET (mem)) == CONST_INT)
883 = get_reg_attrs (MEM_EXPR (mem), INTVAL (MEM_OFFSET (mem)));
886 /* Set the register attributes for registers contained in PARM_RTX.
887 Use needed values from memory attributes of MEM. */
890 set_reg_attrs_for_parm (rtx parm_rtx, rtx mem)
892 if (GET_CODE (parm_rtx) == REG)
893 set_reg_attrs_from_mem (parm_rtx, mem);
894 else if (GET_CODE (parm_rtx) == PARALLEL)
896 /* Check for a NULL entry in the first slot, used to indicate that the
897 parameter goes both on the stack and in registers. */
898 int i = XEXP (XVECEXP (parm_rtx, 0, 0), 0) ? 0 : 1;
899 for (; i < XVECLEN (parm_rtx, 0); i++)
901 rtx x = XVECEXP (parm_rtx, 0, i);
902 if (GET_CODE (XEXP (x, 0)) == REG)
903 REG_ATTRS (XEXP (x, 0))
904 = get_reg_attrs (MEM_EXPR (mem),
905 INTVAL (XEXP (x, 1)));
910 /* Assign the RTX X to declaration T. */
912 set_decl_rtl (tree t, rtx x)
914 DECL_CHECK (t)->decl.rtl = x;
918 /* For register, we maintain the reverse information too. */
919 if (GET_CODE (x) == REG)
920 REG_ATTRS (x) = get_reg_attrs (t, 0);
921 else if (GET_CODE (x) == SUBREG)
922 REG_ATTRS (SUBREG_REG (x))
923 = get_reg_attrs (t, -SUBREG_BYTE (x));
924 if (GET_CODE (x) == CONCAT)
926 if (REG_P (XEXP (x, 0)))
927 REG_ATTRS (XEXP (x, 0)) = get_reg_attrs (t, 0);
928 if (REG_P (XEXP (x, 1)))
929 REG_ATTRS (XEXP (x, 1))
930 = get_reg_attrs (t, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x, 0))));
932 if (GET_CODE (x) == PARALLEL)
935 for (i = 0; i < XVECLEN (x, 0); i++)
937 rtx y = XVECEXP (x, 0, i);
938 if (REG_P (XEXP (y, 0)))
939 REG_ATTRS (XEXP (y, 0)) = get_reg_attrs (t, INTVAL (XEXP (y, 1)));
944 /* Identify REG (which may be a CONCAT) as a user register. */
947 mark_user_reg (rtx reg)
949 if (GET_CODE (reg) == CONCAT)
951 REG_USERVAR_P (XEXP (reg, 0)) = 1;
952 REG_USERVAR_P (XEXP (reg, 1)) = 1;
954 else if (GET_CODE (reg) == REG)
955 REG_USERVAR_P (reg) = 1;
960 /* Identify REG as a probable pointer register and show its alignment
961 as ALIGN, if nonzero. */
964 mark_reg_pointer (rtx reg, int align)
966 if (! REG_POINTER (reg))
968 REG_POINTER (reg) = 1;
971 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
973 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
974 /* We can no-longer be sure just how aligned this pointer is */
975 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
978 /* Return 1 plus largest pseudo reg number used in the current function. */
986 /* Return 1 + the largest label number used so far in the current function. */
991 if (last_label_num && label_num == base_label_num)
992 return last_label_num;
996 /* Return first label number used in this function (if any were used). */
999 get_first_label_num (void)
1001 return first_label_num;
1004 /* Return the final regno of X, which is a SUBREG of a hard
1007 subreg_hard_regno (rtx x, int check_mode)
1009 enum machine_mode mode = GET_MODE (x);
1010 unsigned int byte_offset, base_regno, final_regno;
1011 rtx reg = SUBREG_REG (x);
1013 /* This is where we attempt to catch illegal subregs
1014 created by the compiler. */
1015 if (GET_CODE (x) != SUBREG
1016 || GET_CODE (reg) != REG)
1018 base_regno = REGNO (reg);
1019 if (base_regno >= FIRST_PSEUDO_REGISTER)
1021 if (check_mode && ! HARD_REGNO_MODE_OK (base_regno, GET_MODE (reg)))
1023 #ifdef ENABLE_CHECKING
1024 if (!subreg_offset_representable_p (REGNO (reg), GET_MODE (reg),
1025 SUBREG_BYTE (x), mode))
1028 /* Catch non-congruent offsets too. */
1029 byte_offset = SUBREG_BYTE (x);
1030 if ((byte_offset % GET_MODE_SIZE (mode)) != 0)
1033 final_regno = subreg_regno (x);
1038 /* Return a value representing some low-order bits of X, where the number
1039 of low-order bits is given by MODE. Note that no conversion is done
1040 between floating-point and fixed-point values, rather, the bit
1041 representation is returned.
1043 This function handles the cases in common between gen_lowpart, below,
1044 and two variants in cse.c and combine.c. These are the cases that can
1045 be safely handled at all points in the compilation.
1047 If this is not a case we can handle, return 0. */
1050 gen_lowpart_common (enum machine_mode mode, rtx x)
1052 int msize = GET_MODE_SIZE (mode);
1053 int xsize = GET_MODE_SIZE (GET_MODE (x));
1056 if (GET_MODE (x) == mode)
1059 /* MODE must occupy no more words than the mode of X. */
1060 if (GET_MODE (x) != VOIDmode
1061 && ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
1062 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)))
1065 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1066 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1067 && GET_MODE (x) != VOIDmode && msize > xsize)
1070 offset = subreg_lowpart_offset (mode, GET_MODE (x));
1072 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
1073 && (GET_MODE_CLASS (mode) == MODE_INT
1074 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
1076 /* If we are getting the low-order part of something that has been
1077 sign- or zero-extended, we can either just use the object being
1078 extended or make a narrower extension. If we want an even smaller
1079 piece than the size of the object being extended, call ourselves
1082 This case is used mostly by combine and cse. */
1084 if (GET_MODE (XEXP (x, 0)) == mode)
1086 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
1087 return gen_lowpart_common (mode, XEXP (x, 0));
1088 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
1089 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
1091 else if (GET_CODE (x) == SUBREG || GET_CODE (x) == REG
1092 || GET_CODE (x) == CONCAT || GET_CODE (x) == CONST_VECTOR)
1093 return simplify_gen_subreg (mode, x, GET_MODE (x), offset);
1094 else if (VECTOR_MODE_P (mode) && GET_MODE (x) == VOIDmode)
1095 return simplify_gen_subreg (mode, x, int_mode_for_mode (mode), offset);
1096 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
1097 from the low-order part of the constant. */
1098 else if ((GET_MODE_CLASS (mode) == MODE_INT
1099 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
1100 && GET_MODE (x) == VOIDmode
1101 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
1103 /* If MODE is twice the host word size, X is already the desired
1104 representation. Otherwise, if MODE is wider than a word, we can't
1105 do this. If MODE is exactly a word, return just one CONST_INT. */
1107 if (GET_MODE_BITSIZE (mode) >= 2 * HOST_BITS_PER_WIDE_INT)
1109 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
1111 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT)
1112 return (GET_CODE (x) == CONST_INT ? x
1113 : GEN_INT (CONST_DOUBLE_LOW (x)));
1116 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
1117 HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
1118 : CONST_DOUBLE_LOW (x));
1120 /* Sign extend to HOST_WIDE_INT. */
1121 val = trunc_int_for_mode (val, mode);
1123 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
1128 /* The floating-point emulator can handle all conversions between
1129 FP and integer operands. This simplifies reload because it
1130 doesn't have to deal with constructs like (subreg:DI
1131 (const_double:SF ...)) or (subreg:DF (const_int ...)). */
1132 /* Single-precision floats are always 32-bits and double-precision
1133 floats are always 64-bits. */
1135 else if (GET_MODE_CLASS (mode) == MODE_FLOAT
1136 && GET_MODE_BITSIZE (mode) == 32
1137 && GET_CODE (x) == CONST_INT)
1140 long i = INTVAL (x);
1142 real_from_target (&r, &i, mode);
1143 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
1145 else if (GET_MODE_CLASS (mode) == MODE_FLOAT
1146 && GET_MODE_BITSIZE (mode) == 64
1147 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
1148 && GET_MODE (x) == VOIDmode)
1151 HOST_WIDE_INT low, high;
1154 if (GET_CODE (x) == CONST_INT)
1157 high = low >> (HOST_BITS_PER_WIDE_INT - 1);
1161 low = CONST_DOUBLE_LOW (x);
1162 high = CONST_DOUBLE_HIGH (x);
1165 if (HOST_BITS_PER_WIDE_INT > 32)
1166 high = low >> 31 >> 1;
1168 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
1170 if (WORDS_BIG_ENDIAN)
1171 i[0] = high, i[1] = low;
1173 i[0] = low, i[1] = high;
1175 real_from_target (&r, i, mode);
1176 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
1178 else if ((GET_MODE_CLASS (mode) == MODE_INT
1179 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
1180 && GET_CODE (x) == CONST_DOUBLE
1181 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
1184 long i[4]; /* Only the low 32 bits of each 'long' are used. */
1185 int endian = WORDS_BIG_ENDIAN ? 1 : 0;
1187 /* Convert 'r' into an array of four 32-bit words in target word
1189 REAL_VALUE_FROM_CONST_DOUBLE (r, x);
1190 switch (GET_MODE_BITSIZE (GET_MODE (x)))
1193 REAL_VALUE_TO_TARGET_SINGLE (r, i[3 * endian]);
1196 i[3 - 3 * endian] = 0;
1199 REAL_VALUE_TO_TARGET_DOUBLE (r, i + 2 * endian);
1200 i[2 - 2 * endian] = 0;
1201 i[3 - 2 * endian] = 0;
1204 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i + endian);
1205 i[3 - 3 * endian] = 0;
1208 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i);
1213 /* Now, pack the 32-bit elements of the array into a CONST_DOUBLE
1215 #if HOST_BITS_PER_WIDE_INT == 32
1216 return immed_double_const (i[3 * endian], i[1 + endian], mode);
1218 if (HOST_BITS_PER_WIDE_INT != 64)
1221 return immed_double_const ((((unsigned long) i[3 * endian])
1222 | ((HOST_WIDE_INT) i[1 + endian] << 32)),
1223 (((unsigned long) i[2 - endian])
1224 | ((HOST_WIDE_INT) i[3 - 3 * endian] << 32)),
1228 /* If MODE is a condition code and X is a CONST_INT, the value of X
1229 must already have been "recognized" by the back-end, and we can
1230 assume that it is valid for this mode. */
1231 else if (GET_MODE_CLASS (mode) == MODE_CC
1232 && GET_CODE (x) == CONST_INT)
1235 /* Otherwise, we can't do this. */
1239 /* Return the constant real or imaginary part (which has mode MODE)
1240 of a complex value X. The IMAGPART_P argument determines whether
1241 the real or complex component should be returned. This function
1242 returns NULL_RTX if the component isn't a constant. */
1245 gen_complex_constant_part (enum machine_mode mode, rtx x, int imagpart_p)
1249 if (GET_CODE (x) == MEM
1250 && GET_CODE (XEXP (x, 0)) == SYMBOL_REF)
1252 decl = SYMBOL_REF_DECL (XEXP (x, 0));
1253 if (decl != NULL_TREE && TREE_CODE (decl) == COMPLEX_CST)
1255 part = imagpart_p ? TREE_IMAGPART (decl) : TREE_REALPART (decl);
1256 if (TREE_CODE (part) == REAL_CST
1257 || TREE_CODE (part) == INTEGER_CST)
1258 return expand_expr (part, NULL_RTX, mode, 0);
1264 /* Return the real part (which has mode MODE) of a complex value X.
1265 This always comes at the low address in memory. */
1268 gen_realpart (enum machine_mode mode, rtx x)
1272 /* Handle complex constants. */
1273 part = gen_complex_constant_part (mode, x, 0);
1274 if (part != NULL_RTX)
1277 if (WORDS_BIG_ENDIAN
1278 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1280 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1282 ("can't access real part of complex value in hard register");
1283 else if (WORDS_BIG_ENDIAN)
1284 return gen_highpart (mode, x);
1286 return gen_lowpart (mode, x);
1289 /* Return the imaginary part (which has mode MODE) of a complex value X.
1290 This always comes at the high address in memory. */
1293 gen_imagpart (enum machine_mode mode, rtx x)
1297 /* Handle complex constants. */
1298 part = gen_complex_constant_part (mode, x, 1);
1299 if (part != NULL_RTX)
1302 if (WORDS_BIG_ENDIAN)
1303 return gen_lowpart (mode, x);
1304 else if (! WORDS_BIG_ENDIAN
1305 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1307 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1309 ("can't access imaginary part of complex value in hard register");
1311 return gen_highpart (mode, x);
1314 /* Return 1 iff X, assumed to be a SUBREG,
1315 refers to the real part of the complex value in its containing reg.
1316 Complex values are always stored with the real part in the first word,
1317 regardless of WORDS_BIG_ENDIAN. */
1320 subreg_realpart_p (rtx x)
1322 if (GET_CODE (x) != SUBREG)
1325 return ((unsigned int) SUBREG_BYTE (x)
1326 < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x))));
1329 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1330 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1331 least-significant part of X.
1332 MODE specifies how big a part of X to return;
1333 it usually should not be larger than a word.
1334 If X is a MEM whose address is a QUEUED, the value may be so also. */
1337 gen_lowpart (enum machine_mode mode, rtx x)
1339 rtx result = gen_lowpart_common (mode, x);
1343 else if (GET_CODE (x) == REG)
1345 /* Must be a hard reg that's not valid in MODE. */
1346 result = gen_lowpart_common (mode, copy_to_reg (x));
1351 else if (GET_CODE (x) == MEM)
1353 /* The only additional case we can do is MEM. */
1356 /* The following exposes the use of "x" to CSE. */
1357 if (GET_MODE_SIZE (GET_MODE (x)) <= UNITS_PER_WORD
1358 && SCALAR_INT_MODE_P (GET_MODE (x))
1359 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (mode),
1360 GET_MODE_BITSIZE (GET_MODE (x)))
1361 && ! no_new_pseudos)
1362 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
1364 if (WORDS_BIG_ENDIAN)
1365 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
1366 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1368 if (BYTES_BIG_ENDIAN)
1369 /* Adjust the address so that the address-after-the-data
1371 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
1372 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
1374 return adjust_address (x, mode, offset);
1376 else if (GET_CODE (x) == ADDRESSOF)
1377 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
1382 /* Like `gen_lowpart', but refer to the most significant part.
1383 This is used to access the imaginary part of a complex number. */
1386 gen_highpart (enum machine_mode mode, rtx x)
1388 unsigned int msize = GET_MODE_SIZE (mode);
1391 /* This case loses if X is a subreg. To catch bugs early,
1392 complain if an invalid MODE is used even in other cases. */
1393 if (msize > UNITS_PER_WORD
1394 && msize != GET_MODE_UNIT_SIZE (GET_MODE (x)))
1397 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1398 subreg_highpart_offset (mode, GET_MODE (x)));
1400 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1401 the target if we have a MEM. gen_highpart must return a valid operand,
1402 emitting code if necessary to do so. */
1403 if (result != NULL_RTX && GET_CODE (result) == MEM)
1404 result = validize_mem (result);
1411 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1412 be VOIDmode constant. */
1414 gen_highpart_mode (enum machine_mode outermode, enum machine_mode innermode, rtx exp)
1416 if (GET_MODE (exp) != VOIDmode)
1418 if (GET_MODE (exp) != innermode)
1420 return gen_highpart (outermode, exp);
1422 return simplify_gen_subreg (outermode, exp, innermode,
1423 subreg_highpart_offset (outermode, innermode));
1426 /* Return offset in bytes to get OUTERMODE low part
1427 of the value in mode INNERMODE stored in memory in target format. */
1430 subreg_lowpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1432 unsigned int offset = 0;
1433 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1437 if (WORDS_BIG_ENDIAN)
1438 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1439 if (BYTES_BIG_ENDIAN)
1440 offset += difference % UNITS_PER_WORD;
1446 /* Return offset in bytes to get OUTERMODE high part
1447 of the value in mode INNERMODE stored in memory in target format. */
1449 subreg_highpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1451 unsigned int offset = 0;
1452 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1454 if (GET_MODE_SIZE (innermode) < GET_MODE_SIZE (outermode))
1459 if (! WORDS_BIG_ENDIAN)
1460 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1461 if (! BYTES_BIG_ENDIAN)
1462 offset += difference % UNITS_PER_WORD;
1468 /* Return 1 iff X, assumed to be a SUBREG,
1469 refers to the least significant part of its containing reg.
1470 If X is not a SUBREG, always return 1 (it is its own low part!). */
1473 subreg_lowpart_p (rtx x)
1475 if (GET_CODE (x) != SUBREG)
1477 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1480 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1481 == SUBREG_BYTE (x));
1485 /* Helper routine for all the constant cases of operand_subword.
1486 Some places invoke this directly. */
1489 constant_subword (rtx op, int offset, enum machine_mode mode)
1491 int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD;
1494 /* If OP is already an integer word, return it. */
1495 if (GET_MODE_CLASS (mode) == MODE_INT
1496 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
1499 /* The output is some bits, the width of the target machine's word.
1500 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1502 if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1503 && GET_MODE_CLASS (mode) == MODE_FLOAT
1504 && GET_MODE_BITSIZE (mode) == 64
1505 && GET_CODE (op) == CONST_DOUBLE)
1510 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1511 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
1513 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1514 which the words are written depends on the word endianness.
1515 ??? This is a potential portability problem and should
1516 be fixed at some point.
1518 We must exercise caution with the sign bit. By definition there
1519 are 32 significant bits in K; there may be more in a HOST_WIDE_INT.
1520 Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT.
1521 So we explicitly mask and sign-extend as necessary. */
1522 if (BITS_PER_WORD == 32)
1525 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1526 return GEN_INT (val);
1528 #if HOST_BITS_PER_WIDE_INT >= 64
1529 else if (BITS_PER_WORD >= 64 && offset == 0)
1531 val = k[! WORDS_BIG_ENDIAN];
1532 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1533 val |= (HOST_WIDE_INT) k[WORDS_BIG_ENDIAN] & 0xffffffff;
1534 return GEN_INT (val);
1537 else if (BITS_PER_WORD == 16)
1539 val = k[offset >> 1];
1540 if ((offset & 1) == ! WORDS_BIG_ENDIAN)
1542 val = ((val & 0xffff) ^ 0x8000) - 0x8000;
1543 return GEN_INT (val);
1548 else if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1549 && GET_MODE_CLASS (mode) == MODE_FLOAT
1550 && GET_MODE_BITSIZE (mode) > 64
1551 && GET_CODE (op) == CONST_DOUBLE)
1556 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1557 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k);
1559 if (BITS_PER_WORD == 32)
1562 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1563 return GEN_INT (val);
1565 #if HOST_BITS_PER_WIDE_INT >= 64
1566 else if (BITS_PER_WORD >= 64 && offset <= 1)
1568 val = k[offset * 2 + ! WORDS_BIG_ENDIAN];
1569 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1570 val |= (HOST_WIDE_INT) k[offset * 2 + WORDS_BIG_ENDIAN] & 0xffffffff;
1571 return GEN_INT (val);
1578 /* Single word float is a little harder, since single- and double-word
1579 values often do not have the same high-order bits. We have already
1580 verified that we want the only defined word of the single-word value. */
1581 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1582 && GET_MODE_BITSIZE (mode) == 32
1583 && GET_CODE (op) == CONST_DOUBLE)
1588 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1589 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
1591 /* Sign extend from known 32-bit value to HOST_WIDE_INT. */
1593 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1595 if (BITS_PER_WORD == 16)
1597 if ((offset & 1) == ! WORDS_BIG_ENDIAN)
1599 val = ((val & 0xffff) ^ 0x8000) - 0x8000;
1602 return GEN_INT (val);
1605 /* The only remaining cases that we can handle are integers.
1606 Convert to proper endianness now since these cases need it.
1607 At this point, offset == 0 means the low-order word.
1609 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1610 in general. However, if OP is (const_int 0), we can just return
1613 if (op == const0_rtx)
1616 if (GET_MODE_CLASS (mode) != MODE_INT
1617 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE)
1618 || BITS_PER_WORD > HOST_BITS_PER_WIDE_INT)
1621 if (WORDS_BIG_ENDIAN)
1622 offset = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - offset;
1624 /* Find out which word on the host machine this value is in and get
1625 it from the constant. */
1626 val = (offset / size_ratio == 0
1627 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
1628 : (GET_CODE (op) == CONST_INT
1629 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
1631 /* Get the value we want into the low bits of val. */
1632 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT)
1633 val = ((val >> ((offset % size_ratio) * BITS_PER_WORD)));
1635 val = trunc_int_for_mode (val, word_mode);
1637 return GEN_INT (val);
1640 /* Return subword OFFSET of operand OP.
1641 The word number, OFFSET, is interpreted as the word number starting
1642 at the low-order address. OFFSET 0 is the low-order word if not
1643 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1645 If we cannot extract the required word, we return zero. Otherwise,
1646 an rtx corresponding to the requested word will be returned.
1648 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1649 reload has completed, a valid address will always be returned. After
1650 reload, if a valid address cannot be returned, we return zero.
1652 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1653 it is the responsibility of the caller.
1655 MODE is the mode of OP in case it is a CONST_INT.
1657 ??? This is still rather broken for some cases. The problem for the
1658 moment is that all callers of this thing provide no 'goal mode' to
1659 tell us to work with. This exists because all callers were written
1660 in a word based SUBREG world.
1661 Now use of this function can be deprecated by simplify_subreg in most
1666 operand_subword (rtx op, unsigned int offset, int validate_address, enum machine_mode mode)
1668 if (mode == VOIDmode)
1669 mode = GET_MODE (op);
1671 if (mode == VOIDmode)
1674 /* If OP is narrower than a word, fail. */
1676 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1679 /* If we want a word outside OP, return zero. */
1681 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1684 /* Form a new MEM at the requested address. */
1685 if (GET_CODE (op) == MEM)
1687 rtx new = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1689 if (! validate_address)
1692 else if (reload_completed)
1694 if (! strict_memory_address_p (word_mode, XEXP (new, 0)))
1698 return replace_equiv_address (new, XEXP (new, 0));
1701 /* Rest can be handled by simplify_subreg. */
1702 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1705 /* Similar to `operand_subword', but never return 0. If we can't extract
1706 the required subword, put OP into a register and try again. If that fails,
1707 abort. We always validate the address in this case.
1709 MODE is the mode of OP, in case it is CONST_INT. */
1712 operand_subword_force (rtx op, unsigned int offset, enum machine_mode mode)
1714 rtx result = operand_subword (op, offset, 1, mode);
1719 if (mode != BLKmode && mode != VOIDmode)
1721 /* If this is a register which can not be accessed by words, copy it
1722 to a pseudo register. */
1723 if (GET_CODE (op) == REG)
1724 op = copy_to_reg (op);
1726 op = force_reg (mode, op);
1729 result = operand_subword (op, offset, 1, mode);
1736 /* Given a compare instruction, swap the operands.
1737 A test instruction is changed into a compare of 0 against the operand. */
1740 reverse_comparison (rtx insn)
1742 rtx body = PATTERN (insn);
1745 if (GET_CODE (body) == SET)
1746 comp = SET_SRC (body);
1748 comp = SET_SRC (XVECEXP (body, 0, 0));
1750 if (GET_CODE (comp) == COMPARE)
1752 rtx op0 = XEXP (comp, 0);
1753 rtx op1 = XEXP (comp, 1);
1754 XEXP (comp, 0) = op1;
1755 XEXP (comp, 1) = op0;
1759 rtx new = gen_rtx_COMPARE (VOIDmode,
1760 CONST0_RTX (GET_MODE (comp)), comp);
1761 if (GET_CODE (body) == SET)
1762 SET_SRC (body) = new;
1764 SET_SRC (XVECEXP (body, 0, 0)) = new;
1768 /* Within a MEM_EXPR, we care about either (1) a component ref of a decl,
1769 or (2) a component ref of something variable. Represent the later with
1770 a NULL expression. */
1773 component_ref_for_mem_expr (tree ref)
1775 tree inner = TREE_OPERAND (ref, 0);
1777 if (TREE_CODE (inner) == COMPONENT_REF)
1778 inner = component_ref_for_mem_expr (inner);
1781 tree placeholder_ptr = 0;
1783 /* Now remove any conversions: they don't change what the underlying
1784 object is. Likewise for SAVE_EXPR. Also handle PLACEHOLDER_EXPR. */
1785 while (TREE_CODE (inner) == NOP_EXPR || TREE_CODE (inner) == CONVERT_EXPR
1786 || TREE_CODE (inner) == NON_LVALUE_EXPR
1787 || TREE_CODE (inner) == VIEW_CONVERT_EXPR
1788 || TREE_CODE (inner) == SAVE_EXPR
1789 || TREE_CODE (inner) == PLACEHOLDER_EXPR)
1790 if (TREE_CODE (inner) == PLACEHOLDER_EXPR)
1791 inner = find_placeholder (inner, &placeholder_ptr);
1793 inner = TREE_OPERAND (inner, 0);
1795 if (! DECL_P (inner))
1799 if (inner == TREE_OPERAND (ref, 0))
1802 return build (COMPONENT_REF, TREE_TYPE (ref), inner,
1803 TREE_OPERAND (ref, 1));
1806 /* Given REF, a MEM, and T, either the type of X or the expression
1807 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1808 if we are making a new object of this type. BITPOS is nonzero if
1809 there is an offset outstanding on T that will be applied later. */
1812 set_mem_attributes_minus_bitpos (rtx ref, tree t, int objectp,
1813 HOST_WIDE_INT bitpos)
1815 HOST_WIDE_INT alias = MEM_ALIAS_SET (ref);
1816 tree expr = MEM_EXPR (ref);
1817 rtx offset = MEM_OFFSET (ref);
1818 rtx size = MEM_SIZE (ref);
1819 unsigned int align = MEM_ALIGN (ref);
1820 HOST_WIDE_INT apply_bitpos = 0;
1823 /* It can happen that type_for_mode was given a mode for which there
1824 is no language-level type. In which case it returns NULL, which
1829 type = TYPE_P (t) ? t : TREE_TYPE (t);
1831 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1832 wrong answer, as it assumes that DECL_RTL already has the right alias
1833 info. Callers should not set DECL_RTL until after the call to
1834 set_mem_attributes. */
1835 if (DECL_P (t) && ref == DECL_RTL_IF_SET (t))
1838 /* Get the alias set from the expression or type (perhaps using a
1839 front-end routine) and use it. */
1840 alias = get_alias_set (t);
1842 MEM_VOLATILE_P (ref) = TYPE_VOLATILE (type);
1843 MEM_IN_STRUCT_P (ref) = AGGREGATE_TYPE_P (type);
1844 RTX_UNCHANGING_P (ref)
1845 |= ((lang_hooks.honor_readonly
1846 && (TYPE_READONLY (type) || TREE_READONLY (t)))
1847 || (! TYPE_P (t) && TREE_CONSTANT (t)));
1849 /* If we are making an object of this type, or if this is a DECL, we know
1850 that it is a scalar if the type is not an aggregate. */
1851 if ((objectp || DECL_P (t)) && ! AGGREGATE_TYPE_P (type))
1852 MEM_SCALAR_P (ref) = 1;
1854 /* We can set the alignment from the type if we are making an object,
1855 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1856 if (objectp || TREE_CODE (t) == INDIRECT_REF || TYPE_ALIGN_OK (type))
1857 align = MAX (align, TYPE_ALIGN (type));
1859 /* If the size is known, we can set that. */
1860 if (TYPE_SIZE_UNIT (type) && host_integerp (TYPE_SIZE_UNIT (type), 1))
1861 size = GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type), 1));
1863 /* If T is not a type, we may be able to deduce some more information about
1867 maybe_set_unchanging (ref, t);
1868 if (TREE_THIS_VOLATILE (t))
1869 MEM_VOLATILE_P (ref) = 1;
1871 /* Now remove any conversions: they don't change what the underlying
1872 object is. Likewise for SAVE_EXPR. */
1873 while (TREE_CODE (t) == NOP_EXPR || TREE_CODE (t) == CONVERT_EXPR
1874 || TREE_CODE (t) == NON_LVALUE_EXPR
1875 || TREE_CODE (t) == VIEW_CONVERT_EXPR
1876 || TREE_CODE (t) == SAVE_EXPR)
1877 t = TREE_OPERAND (t, 0);
1879 /* If this expression can't be addressed (e.g., it contains a reference
1880 to a non-addressable field), show we don't change its alias set. */
1881 if (! can_address_p (t))
1882 MEM_KEEP_ALIAS_SET_P (ref) = 1;
1884 /* If this is a decl, set the attributes of the MEM from it. */
1888 offset = const0_rtx;
1889 apply_bitpos = bitpos;
1890 size = (DECL_SIZE_UNIT (t)
1891 && host_integerp (DECL_SIZE_UNIT (t), 1)
1892 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t), 1)) : 0);
1893 align = DECL_ALIGN (t);
1896 /* If this is a constant, we know the alignment. */
1897 else if (TREE_CODE_CLASS (TREE_CODE (t)) == 'c')
1899 align = TYPE_ALIGN (type);
1900 #ifdef CONSTANT_ALIGNMENT
1901 align = CONSTANT_ALIGNMENT (t, align);
1905 /* If this is a field reference and not a bit-field, record it. */
1906 /* ??? There is some information that can be gleened from bit-fields,
1907 such as the word offset in the structure that might be modified.
1908 But skip it for now. */
1909 else if (TREE_CODE (t) == COMPONENT_REF
1910 && ! DECL_BIT_FIELD (TREE_OPERAND (t, 1)))
1912 expr = component_ref_for_mem_expr (t);
1913 offset = const0_rtx;
1914 apply_bitpos = bitpos;
1915 /* ??? Any reason the field size would be different than
1916 the size we got from the type? */
1919 /* If this is an array reference, look for an outer field reference. */
1920 else if (TREE_CODE (t) == ARRAY_REF)
1922 tree off_tree = size_zero_node;
1923 /* We can't modify t, because we use it at the end of the
1929 tree index = TREE_OPERAND (t2, 1);
1930 tree array = TREE_OPERAND (t2, 0);
1931 tree domain = TYPE_DOMAIN (TREE_TYPE (array));
1932 tree low_bound = (domain ? TYPE_MIN_VALUE (domain) : 0);
1933 tree unit_size = TYPE_SIZE_UNIT (TREE_TYPE (TREE_TYPE (array)));
1935 /* We assume all arrays have sizes that are a multiple of a byte.
1936 First subtract the lower bound, if any, in the type of the
1937 index, then convert to sizetype and multiply by the size of the
1939 if (low_bound != 0 && ! integer_zerop (low_bound))
1940 index = fold (build (MINUS_EXPR, TREE_TYPE (index),
1943 /* If the index has a self-referential type, pass it to a
1944 WITH_RECORD_EXPR; if the component size is, pass our
1945 component to one. */
1946 if (CONTAINS_PLACEHOLDER_P (index))
1947 index = build (WITH_RECORD_EXPR, TREE_TYPE (index), index, t2);
1948 if (CONTAINS_PLACEHOLDER_P (unit_size))
1949 unit_size = build (WITH_RECORD_EXPR, sizetype,
1953 = fold (build (PLUS_EXPR, sizetype,
1954 fold (build (MULT_EXPR, sizetype,
1958 t2 = TREE_OPERAND (t2, 0);
1960 while (TREE_CODE (t2) == ARRAY_REF);
1966 if (host_integerp (off_tree, 1))
1968 HOST_WIDE_INT ioff = tree_low_cst (off_tree, 1);
1969 HOST_WIDE_INT aoff = (ioff & -ioff) * BITS_PER_UNIT;
1970 align = DECL_ALIGN (t2);
1971 if (aoff && (unsigned HOST_WIDE_INT) aoff < align)
1973 offset = GEN_INT (ioff);
1974 apply_bitpos = bitpos;
1977 else if (TREE_CODE (t2) == COMPONENT_REF)
1979 expr = component_ref_for_mem_expr (t2);
1980 if (host_integerp (off_tree, 1))
1982 offset = GEN_INT (tree_low_cst (off_tree, 1));
1983 apply_bitpos = bitpos;
1985 /* ??? Any reason the field size would be different than
1986 the size we got from the type? */
1988 else if (flag_argument_noalias > 1
1989 && TREE_CODE (t2) == INDIRECT_REF
1990 && TREE_CODE (TREE_OPERAND (t2, 0)) == PARM_DECL)
1997 /* If this is a Fortran indirect argument reference, record the
1999 else if (flag_argument_noalias > 1
2000 && TREE_CODE (t) == INDIRECT_REF
2001 && TREE_CODE (TREE_OPERAND (t, 0)) == PARM_DECL)
2008 /* If we modified OFFSET based on T, then subtract the outstanding
2009 bit position offset. Similarly, increase the size of the accessed
2010 object to contain the negative offset. */
2013 offset = plus_constant (offset, -(apply_bitpos / BITS_PER_UNIT));
2015 size = plus_constant (size, apply_bitpos / BITS_PER_UNIT);
2018 /* Now set the attributes we computed above. */
2020 = get_mem_attrs (alias, expr, offset, size, align, GET_MODE (ref));
2022 /* If this is already known to be a scalar or aggregate, we are done. */
2023 if (MEM_IN_STRUCT_P (ref) || MEM_SCALAR_P (ref))
2026 /* If it is a reference into an aggregate, this is part of an aggregate.
2027 Otherwise we don't know. */
2028 else if (TREE_CODE (t) == COMPONENT_REF || TREE_CODE (t) == ARRAY_REF
2029 || TREE_CODE (t) == ARRAY_RANGE_REF
2030 || TREE_CODE (t) == BIT_FIELD_REF)
2031 MEM_IN_STRUCT_P (ref) = 1;
2035 set_mem_attributes (rtx ref, tree t, int objectp)
2037 set_mem_attributes_minus_bitpos (ref, t, objectp, 0);
2040 /* Set the decl for MEM to DECL. */
2043 set_mem_attrs_from_reg (rtx mem, rtx reg)
2046 = get_mem_attrs (MEM_ALIAS_SET (mem), REG_EXPR (reg),
2047 GEN_INT (REG_OFFSET (reg)),
2048 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
2051 /* Set the alias set of MEM to SET. */
2054 set_mem_alias_set (rtx mem, HOST_WIDE_INT set)
2056 #ifdef ENABLE_CHECKING
2057 /* If the new and old alias sets don't conflict, something is wrong. */
2058 if (!alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)))
2062 MEM_ATTRS (mem) = get_mem_attrs (set, MEM_EXPR (mem), MEM_OFFSET (mem),
2063 MEM_SIZE (mem), MEM_ALIGN (mem),
2067 /* Set the alignment of MEM to ALIGN bits. */
2070 set_mem_align (rtx mem, unsigned int align)
2072 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
2073 MEM_OFFSET (mem), MEM_SIZE (mem), align,
2077 /* Set the expr for MEM to EXPR. */
2080 set_mem_expr (rtx mem, tree expr)
2083 = get_mem_attrs (MEM_ALIAS_SET (mem), expr, MEM_OFFSET (mem),
2084 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
2087 /* Set the offset of MEM to OFFSET. */
2090 set_mem_offset (rtx mem, rtx offset)
2092 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
2093 offset, MEM_SIZE (mem), MEM_ALIGN (mem),
2097 /* Set the size of MEM to SIZE. */
2100 set_mem_size (rtx mem, rtx size)
2102 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
2103 MEM_OFFSET (mem), size, MEM_ALIGN (mem),
2107 /* Return a memory reference like MEMREF, but with its mode changed to MODE
2108 and its address changed to ADDR. (VOIDmode means don't change the mode.
2109 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
2110 returned memory location is required to be valid. The memory
2111 attributes are not changed. */
2114 change_address_1 (rtx memref, enum machine_mode mode, rtx addr, int validate)
2118 if (GET_CODE (memref) != MEM)
2120 if (mode == VOIDmode)
2121 mode = GET_MODE (memref);
2123 addr = XEXP (memref, 0);
2127 if (reload_in_progress || reload_completed)
2129 if (! memory_address_p (mode, addr))
2133 addr = memory_address (mode, addr);
2136 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
2139 new = gen_rtx_MEM (mode, addr);
2140 MEM_COPY_ATTRIBUTES (new, memref);
2144 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
2145 way we are changing MEMREF, so we only preserve the alias set. */
2148 change_address (rtx memref, enum machine_mode mode, rtx addr)
2150 rtx new = change_address_1 (memref, mode, addr, 1);
2151 enum machine_mode mmode = GET_MODE (new);
2154 = get_mem_attrs (MEM_ALIAS_SET (memref), 0, 0,
2155 mmode == BLKmode ? 0 : GEN_INT (GET_MODE_SIZE (mmode)),
2156 (mmode == BLKmode ? BITS_PER_UNIT
2157 : GET_MODE_ALIGNMENT (mmode)),
2163 /* Return a memory reference like MEMREF, but with its mode changed
2164 to MODE and its address offset by OFFSET bytes. If VALIDATE is
2165 nonzero, the memory address is forced to be valid.
2166 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
2167 and caller is responsible for adjusting MEMREF base register. */
2170 adjust_address_1 (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset,
2171 int validate, int adjust)
2173 rtx addr = XEXP (memref, 0);
2175 rtx memoffset = MEM_OFFSET (memref);
2177 unsigned int memalign = MEM_ALIGN (memref);
2179 /* ??? Prefer to create garbage instead of creating shared rtl.
2180 This may happen even if offset is nonzero -- consider
2181 (plus (plus reg reg) const_int) -- so do this always. */
2182 addr = copy_rtx (addr);
2186 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
2187 object, we can merge it into the LO_SUM. */
2188 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
2190 && (unsigned HOST_WIDE_INT) offset
2191 < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
2192 addr = gen_rtx_LO_SUM (Pmode, XEXP (addr, 0),
2193 plus_constant (XEXP (addr, 1), offset));
2195 addr = plus_constant (addr, offset);
2198 new = change_address_1 (memref, mode, addr, validate);
2200 /* Compute the new values of the memory attributes due to this adjustment.
2201 We add the offsets and update the alignment. */
2203 memoffset = GEN_INT (offset + INTVAL (memoffset));
2205 /* Compute the new alignment by taking the MIN of the alignment and the
2206 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
2211 (unsigned HOST_WIDE_INT) (offset & -offset) * BITS_PER_UNIT);
2213 /* We can compute the size in a number of ways. */
2214 if (GET_MODE (new) != BLKmode)
2215 size = GEN_INT (GET_MODE_SIZE (GET_MODE (new)));
2216 else if (MEM_SIZE (memref))
2217 size = plus_constant (MEM_SIZE (memref), -offset);
2219 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref),
2220 memoffset, size, memalign, GET_MODE (new));
2222 /* At some point, we should validate that this offset is within the object,
2223 if all the appropriate values are known. */
2227 /* Return a memory reference like MEMREF, but with its mode changed
2228 to MODE and its address changed to ADDR, which is assumed to be
2229 MEMREF offseted by OFFSET bytes. If VALIDATE is
2230 nonzero, the memory address is forced to be valid. */
2233 adjust_automodify_address_1 (rtx memref, enum machine_mode mode, rtx addr,
2234 HOST_WIDE_INT offset, int validate)
2236 memref = change_address_1 (memref, VOIDmode, addr, validate);
2237 return adjust_address_1 (memref, mode, offset, validate, 0);
2240 /* Return a memory reference like MEMREF, but whose address is changed by
2241 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2242 known to be in OFFSET (possibly 1). */
2245 offset_address (rtx memref, rtx offset, unsigned HOST_WIDE_INT pow2)
2247 rtx new, addr = XEXP (memref, 0);
2249 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
2251 /* At this point we don't know _why_ the address is invalid. It
2252 could have secondary memory references, multiplies or anything.
2254 However, if we did go and rearrange things, we can wind up not
2255 being able to recognize the magic around pic_offset_table_rtx.
2256 This stuff is fragile, and is yet another example of why it is
2257 bad to expose PIC machinery too early. */
2258 if (! memory_address_p (GET_MODE (memref), new)
2259 && GET_CODE (addr) == PLUS
2260 && XEXP (addr, 0) == pic_offset_table_rtx)
2262 addr = force_reg (GET_MODE (addr), addr);
2263 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
2266 update_temp_slot_address (XEXP (memref, 0), new);
2267 new = change_address_1 (memref, VOIDmode, new, 1);
2269 /* Update the alignment to reflect the offset. Reset the offset, which
2272 = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref), 0, 0,
2273 MIN (MEM_ALIGN (memref), pow2 * BITS_PER_UNIT),
2278 /* Return a memory reference like MEMREF, but with its address changed to
2279 ADDR. The caller is asserting that the actual piece of memory pointed
2280 to is the same, just the form of the address is being changed, such as
2281 by putting something into a register. */
2284 replace_equiv_address (rtx memref, rtx addr)
2286 /* change_address_1 copies the memory attribute structure without change
2287 and that's exactly what we want here. */
2288 update_temp_slot_address (XEXP (memref, 0), addr);
2289 return change_address_1 (memref, VOIDmode, addr, 1);
2292 /* Likewise, but the reference is not required to be valid. */
2295 replace_equiv_address_nv (rtx memref, rtx addr)
2297 return change_address_1 (memref, VOIDmode, addr, 0);
2300 /* Return a memory reference like MEMREF, but with its mode widened to
2301 MODE and offset by OFFSET. This would be used by targets that e.g.
2302 cannot issue QImode memory operations and have to use SImode memory
2303 operations plus masking logic. */
2306 widen_memory_access (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset)
2308 rtx new = adjust_address_1 (memref, mode, offset, 1, 1);
2309 tree expr = MEM_EXPR (new);
2310 rtx memoffset = MEM_OFFSET (new);
2311 unsigned int size = GET_MODE_SIZE (mode);
2313 /* If we don't know what offset we were at within the expression, then
2314 we can't know if we've overstepped the bounds. */
2320 if (TREE_CODE (expr) == COMPONENT_REF)
2322 tree field = TREE_OPERAND (expr, 1);
2324 if (! DECL_SIZE_UNIT (field))
2330 /* Is the field at least as large as the access? If so, ok,
2331 otherwise strip back to the containing structure. */
2332 if (TREE_CODE (DECL_SIZE_UNIT (field)) == INTEGER_CST
2333 && compare_tree_int (DECL_SIZE_UNIT (field), size) >= 0
2334 && INTVAL (memoffset) >= 0)
2337 if (! host_integerp (DECL_FIELD_OFFSET (field), 1))
2343 expr = TREE_OPERAND (expr, 0);
2344 memoffset = (GEN_INT (INTVAL (memoffset)
2345 + tree_low_cst (DECL_FIELD_OFFSET (field), 1)
2346 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 1)
2349 /* Similarly for the decl. */
2350 else if (DECL_P (expr)
2351 && DECL_SIZE_UNIT (expr)
2352 && TREE_CODE (DECL_SIZE_UNIT (expr)) == INTEGER_CST
2353 && compare_tree_int (DECL_SIZE_UNIT (expr), size) >= 0
2354 && (! memoffset || INTVAL (memoffset) >= 0))
2358 /* The widened memory access overflows the expression, which means
2359 that it could alias another expression. Zap it. */
2366 memoffset = NULL_RTX;
2368 /* The widened memory may alias other stuff, so zap the alias set. */
2369 /* ??? Maybe use get_alias_set on any remaining expression. */
2371 MEM_ATTRS (new) = get_mem_attrs (0, expr, memoffset, GEN_INT (size),
2372 MEM_ALIGN (new), mode);
2377 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2380 gen_label_rtx (void)
2382 return gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX, NULL_RTX,
2383 NULL, label_num++, NULL);
2386 /* For procedure integration. */
2388 /* Install new pointers to the first and last insns in the chain.
2389 Also, set cur_insn_uid to one higher than the last in use.
2390 Used for an inline-procedure after copying the insn chain. */
2393 set_new_first_and_last_insn (rtx first, rtx last)
2401 for (insn = first; insn; insn = NEXT_INSN (insn))
2402 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2407 /* Set the range of label numbers found in the current function.
2408 This is used when belatedly compiling an inline function. */
2411 set_new_first_and_last_label_num (int first, int last)
2413 base_label_num = label_num;
2414 first_label_num = first;
2415 last_label_num = last;
2418 /* Set the last label number found in the current function.
2419 This is used when belatedly compiling an inline function. */
2422 set_new_last_label_num (int last)
2424 base_label_num = label_num;
2425 last_label_num = last;
2428 /* Restore all variables describing the current status from the structure *P.
2429 This is used after a nested function. */
2432 restore_emit_status (struct function *p ATTRIBUTE_UNUSED)
2437 /* Go through all the RTL insn bodies and copy any invalid shared
2438 structure. This routine should only be called once. */
2441 unshare_all_rtl (tree fndecl, rtx insn)
2445 /* Make sure that virtual parameters are not shared. */
2446 for (decl = DECL_ARGUMENTS (fndecl); decl; decl = TREE_CHAIN (decl))
2447 SET_DECL_RTL (decl, copy_rtx_if_shared (DECL_RTL (decl)));
2449 /* Make sure that virtual stack slots are not shared. */
2450 unshare_all_decls (DECL_INITIAL (fndecl));
2452 /* Unshare just about everything else. */
2453 unshare_all_rtl_1 (insn);
2455 /* Make sure the addresses of stack slots found outside the insn chain
2456 (such as, in DECL_RTL of a variable) are not shared
2457 with the insn chain.
2459 This special care is necessary when the stack slot MEM does not
2460 actually appear in the insn chain. If it does appear, its address
2461 is unshared from all else at that point. */
2462 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
2465 /* Go through all the RTL insn bodies and copy any invalid shared
2466 structure, again. This is a fairly expensive thing to do so it
2467 should be done sparingly. */
2470 unshare_all_rtl_again (rtx insn)
2475 for (p = insn; p; p = NEXT_INSN (p))
2478 reset_used_flags (PATTERN (p));
2479 reset_used_flags (REG_NOTES (p));
2480 reset_used_flags (LOG_LINKS (p));
2483 /* Make sure that virtual stack slots are not shared. */
2484 reset_used_decls (DECL_INITIAL (cfun->decl));
2486 /* Make sure that virtual parameters are not shared. */
2487 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
2488 reset_used_flags (DECL_RTL (decl));
2490 reset_used_flags (stack_slot_list);
2492 unshare_all_rtl (cfun->decl, insn);
2495 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2496 Assumes the mark bits are cleared at entry. */
2499 unshare_all_rtl_1 (rtx insn)
2501 for (; insn; insn = NEXT_INSN (insn))
2504 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
2505 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
2506 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
2510 /* Go through all virtual stack slots of a function and copy any
2511 shared structure. */
2513 unshare_all_decls (tree blk)
2517 /* Copy shared decls. */
2518 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2519 if (DECL_RTL_SET_P (t))
2520 SET_DECL_RTL (t, copy_rtx_if_shared (DECL_RTL (t)));
2522 /* Now process sub-blocks. */
2523 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2524 unshare_all_decls (t);
2527 /* Go through all virtual stack slots of a function and mark them as
2530 reset_used_decls (tree blk)
2535 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2536 if (DECL_RTL_SET_P (t))
2537 reset_used_flags (DECL_RTL (t));
2539 /* Now process sub-blocks. */
2540 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2541 reset_used_decls (t);
2544 /* Similar to `copy_rtx' except that if MAY_SHARE is present, it is
2545 placed in the result directly, rather than being copied. MAY_SHARE is
2546 either a MEM of an EXPR_LIST of MEMs. */
2549 copy_most_rtx (rtx orig, rtx may_share)
2554 const char *format_ptr;
2556 if (orig == may_share
2557 || (GET_CODE (may_share) == EXPR_LIST
2558 && in_expr_list_p (may_share, orig)))
2561 code = GET_CODE (orig);
2579 copy = rtx_alloc (code);
2580 PUT_MODE (copy, GET_MODE (orig));
2581 RTX_FLAG (copy, in_struct) = RTX_FLAG (orig, in_struct);
2582 RTX_FLAG (copy, volatil) = RTX_FLAG (orig, volatil);
2583 RTX_FLAG (copy, unchanging) = RTX_FLAG (orig, unchanging);
2584 RTX_FLAG (copy, integrated) = RTX_FLAG (orig, integrated);
2585 RTX_FLAG (copy, frame_related) = RTX_FLAG (orig, frame_related);
2587 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
2589 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
2591 switch (*format_ptr++)
2594 XEXP (copy, i) = XEXP (orig, i);
2595 if (XEXP (orig, i) != NULL && XEXP (orig, i) != may_share)
2596 XEXP (copy, i) = copy_most_rtx (XEXP (orig, i), may_share);
2600 XEXP (copy, i) = XEXP (orig, i);
2605 XVEC (copy, i) = XVEC (orig, i);
2606 if (XVEC (orig, i) != NULL)
2608 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
2609 for (j = 0; j < XVECLEN (copy, i); j++)
2610 XVECEXP (copy, i, j)
2611 = copy_most_rtx (XVECEXP (orig, i, j), may_share);
2616 XWINT (copy, i) = XWINT (orig, i);
2621 XINT (copy, i) = XINT (orig, i);
2625 XTREE (copy, i) = XTREE (orig, i);
2630 XSTR (copy, i) = XSTR (orig, i);
2634 X0ANY (copy, i) = X0ANY (orig, i);
2644 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2645 Recursively does the same for subexpressions. */
2648 copy_rtx_if_shared (rtx orig)
2653 const char *format_ptr;
2659 code = GET_CODE (x);
2661 /* These types may be freely shared. */
2675 /* SCRATCH must be shared because they represent distinct values. */
2679 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2680 a LABEL_REF, it isn't sharable. */
2681 if (GET_CODE (XEXP (x, 0)) == PLUS
2682 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
2683 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
2692 /* The chain of insns is not being copied. */
2699 /* This rtx may not be shared. If it has already been seen,
2700 replace it with a copy of itself. */
2702 if (RTX_FLAG (x, used))
2706 copy = rtx_alloc (code);
2707 memcpy (copy, x, RTX_SIZE (code));
2711 RTX_FLAG (x, used) = 1;
2713 /* Now scan the subexpressions recursively.
2714 We can store any replaced subexpressions directly into X
2715 since we know X is not shared! Any vectors in X
2716 must be copied if X was copied. */
2718 format_ptr = GET_RTX_FORMAT (code);
2720 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2722 switch (*format_ptr++)
2725 XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
2729 if (XVEC (x, i) != NULL)
2732 int len = XVECLEN (x, i);
2734 if (copied && len > 0)
2735 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
2736 for (j = 0; j < len; j++)
2737 XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j));
2745 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2746 to look for shared sub-parts. */
2749 reset_used_flags (rtx x)
2753 const char *format_ptr;
2758 code = GET_CODE (x);
2760 /* These types may be freely shared so we needn't do any resetting
2782 /* The chain of insns is not being copied. */
2789 RTX_FLAG (x, used) = 0;
2791 format_ptr = GET_RTX_FORMAT (code);
2792 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2794 switch (*format_ptr++)
2797 reset_used_flags (XEXP (x, i));
2801 for (j = 0; j < XVECLEN (x, i); j++)
2802 reset_used_flags (XVECEXP (x, i, j));
2808 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2809 Return X or the rtx for the pseudo reg the value of X was copied into.
2810 OTHER must be valid as a SET_DEST. */
2813 make_safe_from (rtx x, rtx other)
2816 switch (GET_CODE (other))
2819 other = SUBREG_REG (other);
2821 case STRICT_LOW_PART:
2824 other = XEXP (other, 0);
2830 if ((GET_CODE (other) == MEM
2832 && GET_CODE (x) != REG
2833 && GET_CODE (x) != SUBREG)
2834 || (GET_CODE (other) == REG
2835 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2836 || reg_mentioned_p (other, x))))
2838 rtx temp = gen_reg_rtx (GET_MODE (x));
2839 emit_move_insn (temp, x);
2845 /* Emission of insns (adding them to the doubly-linked list). */
2847 /* Return the first insn of the current sequence or current function. */
2855 /* Specify a new insn as the first in the chain. */
2858 set_first_insn (rtx insn)
2860 if (PREV_INSN (insn) != 0)
2865 /* Return the last insn emitted in current sequence or current function. */
2868 get_last_insn (void)
2873 /* Specify a new insn as the last in the chain. */
2876 set_last_insn (rtx insn)
2878 if (NEXT_INSN (insn) != 0)
2883 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2886 get_last_insn_anywhere (void)
2888 struct sequence_stack *stack;
2891 for (stack = seq_stack; stack; stack = stack->next)
2892 if (stack->last != 0)
2897 /* Return the first nonnote insn emitted in current sequence or current
2898 function. This routine looks inside SEQUENCEs. */
2901 get_first_nonnote_insn (void)
2903 rtx insn = first_insn;
2907 insn = next_insn (insn);
2908 if (insn == 0 || GET_CODE (insn) != NOTE)
2915 /* Return the last nonnote insn emitted in current sequence or current
2916 function. This routine looks inside SEQUENCEs. */
2919 get_last_nonnote_insn (void)
2921 rtx insn = last_insn;
2925 insn = previous_insn (insn);
2926 if (insn == 0 || GET_CODE (insn) != NOTE)
2933 /* Return a number larger than any instruction's uid in this function. */
2938 return cur_insn_uid;
2941 /* Renumber instructions so that no instruction UIDs are wasted. */
2944 renumber_insns (FILE *stream)
2948 /* If we're not supposed to renumber instructions, don't. */
2949 if (!flag_renumber_insns)
2952 /* If there aren't that many instructions, then it's not really
2953 worth renumbering them. */
2954 if (flag_renumber_insns == 1 && get_max_uid () < 25000)
2959 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
2962 fprintf (stream, "Renumbering insn %d to %d\n",
2963 INSN_UID (insn), cur_insn_uid);
2964 INSN_UID (insn) = cur_insn_uid++;
2968 /* Return the next insn. If it is a SEQUENCE, return the first insn
2972 next_insn (rtx insn)
2976 insn = NEXT_INSN (insn);
2977 if (insn && GET_CODE (insn) == INSN
2978 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2979 insn = XVECEXP (PATTERN (insn), 0, 0);
2985 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2989 previous_insn (rtx insn)
2993 insn = PREV_INSN (insn);
2994 if (insn && GET_CODE (insn) == INSN
2995 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2996 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
3002 /* Return the next insn after INSN that is not a NOTE. This routine does not
3003 look inside SEQUENCEs. */
3006 next_nonnote_insn (rtx insn)
3010 insn = NEXT_INSN (insn);
3011 if (insn == 0 || GET_CODE (insn) != NOTE)
3018 /* Return the previous insn before INSN that is not a NOTE. This routine does
3019 not look inside SEQUENCEs. */
3022 prev_nonnote_insn (rtx insn)
3026 insn = PREV_INSN (insn);
3027 if (insn == 0 || GET_CODE (insn) != NOTE)
3034 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
3035 or 0, if there is none. This routine does not look inside
3039 next_real_insn (rtx insn)
3043 insn = NEXT_INSN (insn);
3044 if (insn == 0 || GET_CODE (insn) == INSN
3045 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
3052 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
3053 or 0, if there is none. This routine does not look inside
3057 prev_real_insn (rtx insn)
3061 insn = PREV_INSN (insn);
3062 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
3063 || GET_CODE (insn) == JUMP_INSN)
3070 /* Return the last CALL_INSN in the current list, or 0 if there is none.
3071 This routine does not look inside SEQUENCEs. */
3074 last_call_insn (void)
3078 for (insn = get_last_insn ();
3079 insn && GET_CODE (insn) != CALL_INSN;
3080 insn = PREV_INSN (insn))
3086 /* Find the next insn after INSN that really does something. This routine
3087 does not look inside SEQUENCEs. Until reload has completed, this is the
3088 same as next_real_insn. */
3091 active_insn_p (rtx insn)
3093 return (GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
3094 || (GET_CODE (insn) == INSN
3095 && (! reload_completed
3096 || (GET_CODE (PATTERN (insn)) != USE
3097 && GET_CODE (PATTERN (insn)) != CLOBBER))));
3101 next_active_insn (rtx insn)
3105 insn = NEXT_INSN (insn);
3106 if (insn == 0 || active_insn_p (insn))
3113 /* Find the last insn before INSN that really does something. This routine
3114 does not look inside SEQUENCEs. Until reload has completed, this is the
3115 same as prev_real_insn. */
3118 prev_active_insn (rtx insn)
3122 insn = PREV_INSN (insn);
3123 if (insn == 0 || active_insn_p (insn))
3130 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
3133 next_label (rtx insn)
3137 insn = NEXT_INSN (insn);
3138 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
3145 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
3148 prev_label (rtx insn)
3152 insn = PREV_INSN (insn);
3153 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
3161 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3162 and REG_CC_USER notes so we can find it. */
3165 link_cc0_insns (rtx insn)
3167 rtx user = next_nonnote_insn (insn);
3169 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
3170 user = XVECEXP (PATTERN (user), 0, 0);
3172 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn,
3174 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
3177 /* Return the next insn that uses CC0 after INSN, which is assumed to
3178 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3179 applied to the result of this function should yield INSN).
3181 Normally, this is simply the next insn. However, if a REG_CC_USER note
3182 is present, it contains the insn that uses CC0.
3184 Return 0 if we can't find the insn. */
3187 next_cc0_user (rtx insn)
3189 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
3192 return XEXP (note, 0);
3194 insn = next_nonnote_insn (insn);
3195 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
3196 insn = XVECEXP (PATTERN (insn), 0, 0);
3198 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
3204 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3205 note, it is the previous insn. */
3208 prev_cc0_setter (rtx insn)
3210 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
3213 return XEXP (note, 0);
3215 insn = prev_nonnote_insn (insn);
3216 if (! sets_cc0_p (PATTERN (insn)))
3223 /* Increment the label uses for all labels present in rtx. */
3226 mark_label_nuses (rtx x)
3232 code = GET_CODE (x);
3233 if (code == LABEL_REF)
3234 LABEL_NUSES (XEXP (x, 0))++;
3236 fmt = GET_RTX_FORMAT (code);
3237 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3240 mark_label_nuses (XEXP (x, i));
3241 else if (fmt[i] == 'E')
3242 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3243 mark_label_nuses (XVECEXP (x, i, j));
3248 /* Try splitting insns that can be split for better scheduling.
3249 PAT is the pattern which might split.
3250 TRIAL is the insn providing PAT.
3251 LAST is nonzero if we should return the last insn of the sequence produced.
3253 If this routine succeeds in splitting, it returns the first or last
3254 replacement insn depending on the value of LAST. Otherwise, it
3255 returns TRIAL. If the insn to be returned can be split, it will be. */
3258 try_split (rtx pat, rtx trial, int last)
3260 rtx before = PREV_INSN (trial);
3261 rtx after = NEXT_INSN (trial);
3262 int has_barrier = 0;
3266 rtx insn_last, insn;
3269 if (any_condjump_p (trial)
3270 && (note = find_reg_note (trial, REG_BR_PROB, 0)))
3271 split_branch_probability = INTVAL (XEXP (note, 0));
3272 probability = split_branch_probability;
3274 seq = split_insns (pat, trial);
3276 split_branch_probability = -1;
3278 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3279 We may need to handle this specially. */
3280 if (after && GET_CODE (after) == BARRIER)
3283 after = NEXT_INSN (after);
3289 /* Avoid infinite loop if any insn of the result matches
3290 the original pattern. */
3294 if (INSN_P (insn_last)
3295 && rtx_equal_p (PATTERN (insn_last), pat))
3297 if (!NEXT_INSN (insn_last))
3299 insn_last = NEXT_INSN (insn_last);
3303 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3305 if (GET_CODE (insn) == JUMP_INSN)
3307 mark_jump_label (PATTERN (insn), insn, 0);
3309 if (probability != -1
3310 && any_condjump_p (insn)
3311 && !find_reg_note (insn, REG_BR_PROB, 0))
3313 /* We can preserve the REG_BR_PROB notes only if exactly
3314 one jump is created, otherwise the machine description
3315 is responsible for this step using
3316 split_branch_probability variable. */
3320 = gen_rtx_EXPR_LIST (REG_BR_PROB,
3321 GEN_INT (probability),
3327 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3328 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3329 if (GET_CODE (trial) == CALL_INSN)
3331 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3332 if (GET_CODE (insn) == CALL_INSN)
3334 rtx *p = &CALL_INSN_FUNCTION_USAGE (insn);
3337 *p = CALL_INSN_FUNCTION_USAGE (trial);
3338 SIBLING_CALL_P (insn) = SIBLING_CALL_P (trial);
3342 /* Copy notes, particularly those related to the CFG. */
3343 for (note = REG_NOTES (trial); note; note = XEXP (note, 1))
3345 switch (REG_NOTE_KIND (note))
3349 while (insn != NULL_RTX)
3351 if (GET_CODE (insn) == CALL_INSN
3352 || (flag_non_call_exceptions
3353 && may_trap_p (PATTERN (insn))))
3355 = gen_rtx_EXPR_LIST (REG_EH_REGION,
3358 insn = PREV_INSN (insn);
3364 case REG_ALWAYS_RETURN:
3366 while (insn != NULL_RTX)
3368 if (GET_CODE (insn) == CALL_INSN)
3370 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3373 insn = PREV_INSN (insn);
3377 case REG_NON_LOCAL_GOTO:
3379 while (insn != NULL_RTX)
3381 if (GET_CODE (insn) == JUMP_INSN)
3383 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3386 insn = PREV_INSN (insn);
3395 /* If there are LABELS inside the split insns increment the
3396 usage count so we don't delete the label. */
3397 if (GET_CODE (trial) == INSN)
3400 while (insn != NULL_RTX)
3402 if (GET_CODE (insn) == INSN)
3403 mark_label_nuses (PATTERN (insn));
3405 insn = PREV_INSN (insn);
3409 tem = emit_insn_after_setloc (seq, trial, INSN_LOCATOR (trial));
3411 delete_insn (trial);
3413 emit_barrier_after (tem);
3415 /* Recursively call try_split for each new insn created; by the
3416 time control returns here that insn will be fully split, so
3417 set LAST and continue from the insn after the one returned.
3418 We can't use next_active_insn here since AFTER may be a note.
3419 Ignore deleted insns, which can be occur if not optimizing. */
3420 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
3421 if (! INSN_DELETED_P (tem) && INSN_P (tem))
3422 tem = try_split (PATTERN (tem), tem, 1);
3424 /* Return either the first or the last insn, depending on which was
3427 ? (after ? PREV_INSN (after) : last_insn)
3428 : NEXT_INSN (before);
3431 /* Make and return an INSN rtx, initializing all its slots.
3432 Store PATTERN in the pattern slots. */
3435 make_insn_raw (rtx pattern)
3439 insn = rtx_alloc (INSN);
3441 INSN_UID (insn) = cur_insn_uid++;
3442 PATTERN (insn) = pattern;
3443 INSN_CODE (insn) = -1;
3444 LOG_LINKS (insn) = NULL;
3445 REG_NOTES (insn) = NULL;
3446 INSN_LOCATOR (insn) = 0;
3447 BLOCK_FOR_INSN (insn) = NULL;
3449 #ifdef ENABLE_RTL_CHECKING
3452 && (returnjump_p (insn)
3453 || (GET_CODE (insn) == SET
3454 && SET_DEST (insn) == pc_rtx)))
3456 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
3464 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3467 make_jump_insn_raw (rtx pattern)
3471 insn = rtx_alloc (JUMP_INSN);
3472 INSN_UID (insn) = cur_insn_uid++;
3474 PATTERN (insn) = pattern;
3475 INSN_CODE (insn) = -1;
3476 LOG_LINKS (insn) = NULL;
3477 REG_NOTES (insn) = NULL;
3478 JUMP_LABEL (insn) = NULL;
3479 INSN_LOCATOR (insn) = 0;
3480 BLOCK_FOR_INSN (insn) = NULL;
3485 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3488 make_call_insn_raw (rtx pattern)
3492 insn = rtx_alloc (CALL_INSN);
3493 INSN_UID (insn) = cur_insn_uid++;
3495 PATTERN (insn) = pattern;
3496 INSN_CODE (insn) = -1;
3497 LOG_LINKS (insn) = NULL;
3498 REG_NOTES (insn) = NULL;
3499 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
3500 INSN_LOCATOR (insn) = 0;
3501 BLOCK_FOR_INSN (insn) = NULL;
3506 /* Add INSN to the end of the doubly-linked list.
3507 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3512 PREV_INSN (insn) = last_insn;
3513 NEXT_INSN (insn) = 0;
3515 if (NULL != last_insn)
3516 NEXT_INSN (last_insn) = insn;
3518 if (NULL == first_insn)
3524 /* Add INSN into the doubly-linked list after insn AFTER. This and
3525 the next should be the only functions called to insert an insn once
3526 delay slots have been filled since only they know how to update a
3530 add_insn_after (rtx insn, rtx after)
3532 rtx next = NEXT_INSN (after);
3535 if (optimize && INSN_DELETED_P (after))
3538 NEXT_INSN (insn) = next;
3539 PREV_INSN (insn) = after;
3543 PREV_INSN (next) = insn;
3544 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3545 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
3547 else if (last_insn == after)
3551 struct sequence_stack *stack = seq_stack;
3552 /* Scan all pending sequences too. */
3553 for (; stack; stack = stack->next)
3554 if (after == stack->last)
3564 if (GET_CODE (after) != BARRIER
3565 && GET_CODE (insn) != BARRIER
3566 && (bb = BLOCK_FOR_INSN (after)))
3568 set_block_for_insn (insn, bb);
3570 bb->flags |= BB_DIRTY;
3571 /* Should not happen as first in the BB is always
3572 either NOTE or LABEL. */
3573 if (bb->end == after
3574 /* Avoid clobbering of structure when creating new BB. */
3575 && GET_CODE (insn) != BARRIER
3576 && (GET_CODE (insn) != NOTE
3577 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3581 NEXT_INSN (after) = insn;
3582 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
3584 rtx sequence = PATTERN (after);
3585 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3589 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3590 the previous should be the only functions called to insert an insn once
3591 delay slots have been filled since only they know how to update a
3595 add_insn_before (rtx insn, rtx before)
3597 rtx prev = PREV_INSN (before);
3600 if (optimize && INSN_DELETED_P (before))
3603 PREV_INSN (insn) = prev;
3604 NEXT_INSN (insn) = before;
3608 NEXT_INSN (prev) = insn;
3609 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3611 rtx sequence = PATTERN (prev);
3612 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3615 else if (first_insn == before)
3619 struct sequence_stack *stack = seq_stack;
3620 /* Scan all pending sequences too. */
3621 for (; stack; stack = stack->next)
3622 if (before == stack->first)
3624 stack->first = insn;
3632 if (GET_CODE (before) != BARRIER
3633 && GET_CODE (insn) != BARRIER
3634 && (bb = BLOCK_FOR_INSN (before)))
3636 set_block_for_insn (insn, bb);
3638 bb->flags |= BB_DIRTY;
3639 /* Should not happen as first in the BB is always
3640 either NOTE or LABEl. */
3641 if (bb->head == insn
3642 /* Avoid clobbering of structure when creating new BB. */
3643 && GET_CODE (insn) != BARRIER
3644 && (GET_CODE (insn) != NOTE
3645 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3649 PREV_INSN (before) = insn;
3650 if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE)
3651 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
3654 /* Remove an insn from its doubly-linked list. This function knows how
3655 to handle sequences. */
3657 remove_insn (rtx insn)
3659 rtx next = NEXT_INSN (insn);
3660 rtx prev = PREV_INSN (insn);
3665 NEXT_INSN (prev) = next;
3666 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3668 rtx sequence = PATTERN (prev);
3669 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
3672 else if (first_insn == insn)
3676 struct sequence_stack *stack = seq_stack;
3677 /* Scan all pending sequences too. */
3678 for (; stack; stack = stack->next)
3679 if (insn == stack->first)
3681 stack->first = next;
3691 PREV_INSN (next) = prev;
3692 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3693 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
3695 else if (last_insn == insn)
3699 struct sequence_stack *stack = seq_stack;
3700 /* Scan all pending sequences too. */
3701 for (; stack; stack = stack->next)
3702 if (insn == stack->last)
3711 if (GET_CODE (insn) != BARRIER
3712 && (bb = BLOCK_FOR_INSN (insn)))
3715 bb->flags |= BB_DIRTY;
3716 if (bb->head == insn)
3718 /* Never ever delete the basic block note without deleting whole
3720 if (GET_CODE (insn) == NOTE)
3724 if (bb->end == insn)
3729 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
3732 add_function_usage_to (rtx call_insn, rtx call_fusage)
3734 if (! call_insn || GET_CODE (call_insn) != CALL_INSN)
3737 /* Put the register usage information on the CALL. If there is already
3738 some usage information, put ours at the end. */
3739 if (CALL_INSN_FUNCTION_USAGE (call_insn))
3743 for (link = CALL_INSN_FUNCTION_USAGE (call_insn); XEXP (link, 1) != 0;
3744 link = XEXP (link, 1))
3747 XEXP (link, 1) = call_fusage;
3750 CALL_INSN_FUNCTION_USAGE (call_insn) = call_fusage;
3753 /* Delete all insns made since FROM.
3754 FROM becomes the new last instruction. */
3757 delete_insns_since (rtx from)
3762 NEXT_INSN (from) = 0;
3766 /* This function is deprecated, please use sequences instead.
3768 Move a consecutive bunch of insns to a different place in the chain.
3769 The insns to be moved are those between FROM and TO.
3770 They are moved to a new position after the insn AFTER.
3771 AFTER must not be FROM or TO or any insn in between.
3773 This function does not know about SEQUENCEs and hence should not be
3774 called after delay-slot filling has been done. */
3777 reorder_insns_nobb (rtx from, rtx to, rtx after)
3779 /* Splice this bunch out of where it is now. */
3780 if (PREV_INSN (from))
3781 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
3783 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
3784 if (last_insn == to)
3785 last_insn = PREV_INSN (from);
3786 if (first_insn == from)
3787 first_insn = NEXT_INSN (to);
3789 /* Make the new neighbors point to it and it to them. */
3790 if (NEXT_INSN (after))
3791 PREV_INSN (NEXT_INSN (after)) = to;
3793 NEXT_INSN (to) = NEXT_INSN (after);
3794 PREV_INSN (from) = after;
3795 NEXT_INSN (after) = from;
3796 if (after == last_insn)
3800 /* Same as function above, but take care to update BB boundaries. */
3802 reorder_insns (rtx from, rtx to, rtx after)
3804 rtx prev = PREV_INSN (from);
3805 basic_block bb, bb2;
3807 reorder_insns_nobb (from, to, after);
3809 if (GET_CODE (after) != BARRIER
3810 && (bb = BLOCK_FOR_INSN (after)))
3813 bb->flags |= BB_DIRTY;
3815 if (GET_CODE (from) != BARRIER
3816 && (bb2 = BLOCK_FOR_INSN (from)))
3820 bb2->flags |= BB_DIRTY;
3823 if (bb->end == after)
3826 for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
3827 set_block_for_insn (x, bb);
3831 /* Return the line note insn preceding INSN. */
3834 find_line_note (rtx insn)
3836 if (no_line_numbers)
3839 for (; insn; insn = PREV_INSN (insn))
3840 if (GET_CODE (insn) == NOTE
3841 && NOTE_LINE_NUMBER (insn) >= 0)
3847 /* Like reorder_insns, but inserts line notes to preserve the line numbers
3848 of the moved insns when debugging. This may insert a note between AFTER
3849 and FROM, and another one after TO. */
3852 reorder_insns_with_line_notes (rtx from, rtx to, rtx after)
3854 rtx from_line = find_line_note (from);
3855 rtx after_line = find_line_note (after);
3857 reorder_insns (from, to, after);
3859 if (from_line == after_line)
3863 emit_note_copy_after (from_line, after);
3865 emit_note_copy_after (after_line, to);
3868 /* Remove unnecessary notes from the instruction stream. */
3871 remove_unnecessary_notes (void)
3873 rtx block_stack = NULL_RTX;
3874 rtx eh_stack = NULL_RTX;
3879 /* We must not remove the first instruction in the function because
3880 the compiler depends on the first instruction being a note. */
3881 for (insn = NEXT_INSN (get_insns ()); insn; insn = next)
3883 /* Remember what's next. */
3884 next = NEXT_INSN (insn);
3886 /* We're only interested in notes. */
3887 if (GET_CODE (insn) != NOTE)
3890 switch (NOTE_LINE_NUMBER (insn))
3892 case NOTE_INSN_DELETED:
3893 case NOTE_INSN_LOOP_END_TOP_COND:
3897 case NOTE_INSN_EH_REGION_BEG:
3898 eh_stack = alloc_INSN_LIST (insn, eh_stack);
3901 case NOTE_INSN_EH_REGION_END:
3902 /* Too many end notes. */
3903 if (eh_stack == NULL_RTX)
3905 /* Mismatched nesting. */
3906 if (NOTE_EH_HANDLER (XEXP (eh_stack, 0)) != NOTE_EH_HANDLER (insn))
3909 eh_stack = XEXP (eh_stack, 1);
3910 free_INSN_LIST_node (tmp);
3913 case NOTE_INSN_BLOCK_BEG:
3914 /* By now, all notes indicating lexical blocks should have
3915 NOTE_BLOCK filled in. */
3916 if (NOTE_BLOCK (insn) == NULL_TREE)
3918 block_stack = alloc_INSN_LIST (insn, block_stack);
3921 case NOTE_INSN_BLOCK_END:
3922 /* Too many end notes. */
3923 if (block_stack == NULL_RTX)
3925 /* Mismatched nesting. */
3926 if (NOTE_BLOCK (XEXP (block_stack, 0)) != NOTE_BLOCK (insn))
3929 block_stack = XEXP (block_stack, 1);
3930 free_INSN_LIST_node (tmp);
3932 /* Scan back to see if there are any non-note instructions
3933 between INSN and the beginning of this block. If not,
3934 then there is no PC range in the generated code that will
3935 actually be in this block, so there's no point in
3936 remembering the existence of the block. */
3937 for (tmp = PREV_INSN (insn); tmp; tmp = PREV_INSN (tmp))
3939 /* This block contains a real instruction. Note that we
3940 don't include labels; if the only thing in the block
3941 is a label, then there are still no PC values that
3942 lie within the block. */
3946 /* We're only interested in NOTEs. */
3947 if (GET_CODE (tmp) != NOTE)
3950 if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_BEG)
3952 /* We just verified that this BLOCK matches us with
3953 the block_stack check above. Never delete the
3954 BLOCK for the outermost scope of the function; we
3955 can refer to names from that scope even if the
3956 block notes are messed up. */
3957 if (! is_body_block (NOTE_BLOCK (insn))
3958 && (*debug_hooks->ignore_block) (NOTE_BLOCK (insn)))
3965 else if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_END)
3966 /* There's a nested block. We need to leave the
3967 current block in place since otherwise the debugger
3968 wouldn't be able to show symbols from our block in
3969 the nested block. */
3975 /* Too many begin notes. */
3976 if (block_stack || eh_stack)
3981 /* Emit insn(s) of given code and pattern
3982 at a specified place within the doubly-linked list.
3984 All of the emit_foo global entry points accept an object
3985 X which is either an insn list or a PATTERN of a single
3988 There are thus a few canonical ways to generate code and
3989 emit it at a specific place in the instruction stream. For
3990 example, consider the instruction named SPOT and the fact that
3991 we would like to emit some instructions before SPOT. We might
3995 ... emit the new instructions ...
3996 insns_head = get_insns ();
3999 emit_insn_before (insns_head, SPOT);
4001 It used to be common to generate SEQUENCE rtl instead, but that
4002 is a relic of the past which no longer occurs. The reason is that
4003 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
4004 generated would almost certainly die right after it was created. */
4006 /* Make X be output before the instruction BEFORE. */
4009 emit_insn_before (rtx x, rtx before)
4014 #ifdef ENABLE_RTL_CHECKING
4015 if (before == NULL_RTX)
4022 switch (GET_CODE (x))
4033 rtx next = NEXT_INSN (insn);
4034 add_insn_before (insn, before);
4040 #ifdef ENABLE_RTL_CHECKING
4047 last = make_insn_raw (x);
4048 add_insn_before (last, before);
4055 /* Make an instruction with body X and code JUMP_INSN
4056 and output it before the instruction BEFORE. */
4059 emit_jump_insn_before (rtx x, rtx before)
4061 rtx insn, last = NULL_RTX;
4063 #ifdef ENABLE_RTL_CHECKING
4064 if (before == NULL_RTX)
4068 switch (GET_CODE (x))
4079 rtx next = NEXT_INSN (insn);
4080 add_insn_before (insn, before);
4086 #ifdef ENABLE_RTL_CHECKING
4093 last = make_jump_insn_raw (x);
4094 add_insn_before (last, before);
4101 /* Make an instruction with body X and code CALL_INSN
4102 and output it before the instruction BEFORE. */
4105 emit_call_insn_before (rtx x, rtx before)
4107 rtx last = NULL_RTX, insn;
4109 #ifdef ENABLE_RTL_CHECKING
4110 if (before == NULL_RTX)
4114 switch (GET_CODE (x))
4125 rtx next = NEXT_INSN (insn);
4126 add_insn_before (insn, before);
4132 #ifdef ENABLE_RTL_CHECKING
4139 last = make_call_insn_raw (x);
4140 add_insn_before (last, before);
4147 /* Make an insn of code BARRIER
4148 and output it before the insn BEFORE. */
4151 emit_barrier_before (rtx before)
4153 rtx insn = rtx_alloc (BARRIER);
4155 INSN_UID (insn) = cur_insn_uid++;
4157 add_insn_before (insn, before);
4161 /* Emit the label LABEL before the insn BEFORE. */
4164 emit_label_before (rtx label, rtx before)
4166 /* This can be called twice for the same label as a result of the
4167 confusion that follows a syntax error! So make it harmless. */
4168 if (INSN_UID (label) == 0)
4170 INSN_UID (label) = cur_insn_uid++;
4171 add_insn_before (label, before);
4177 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4180 emit_note_before (int subtype, rtx before)
4182 rtx note = rtx_alloc (NOTE);
4183 INSN_UID (note) = cur_insn_uid++;
4184 NOTE_SOURCE_FILE (note) = 0;
4185 NOTE_LINE_NUMBER (note) = subtype;
4186 BLOCK_FOR_INSN (note) = NULL;
4188 add_insn_before (note, before);
4192 /* Helper for emit_insn_after, handles lists of instructions
4195 static rtx emit_insn_after_1 (rtx, rtx);
4198 emit_insn_after_1 (rtx first, rtx after)
4204 if (GET_CODE (after) != BARRIER
4205 && (bb = BLOCK_FOR_INSN (after)))
4207 bb->flags |= BB_DIRTY;
4208 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4209 if (GET_CODE (last) != BARRIER)
4210 set_block_for_insn (last, bb);
4211 if (GET_CODE (last) != BARRIER)
4212 set_block_for_insn (last, bb);
4213 if (bb->end == after)
4217 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4220 after_after = NEXT_INSN (after);
4222 NEXT_INSN (after) = first;
4223 PREV_INSN (first) = after;
4224 NEXT_INSN (last) = after_after;
4226 PREV_INSN (after_after) = last;
4228 if (after == last_insn)
4233 /* Make X be output after the insn AFTER. */
4236 emit_insn_after (rtx x, rtx after)
4240 #ifdef ENABLE_RTL_CHECKING
4241 if (after == NULL_RTX)
4248 switch (GET_CODE (x))
4256 last = emit_insn_after_1 (x, after);
4259 #ifdef ENABLE_RTL_CHECKING
4266 last = make_insn_raw (x);
4267 add_insn_after (last, after);
4274 /* Similar to emit_insn_after, except that line notes are to be inserted so
4275 as to act as if this insn were at FROM. */
4278 emit_insn_after_with_line_notes (rtx x, rtx after, rtx from)
4280 rtx from_line = find_line_note (from);
4281 rtx after_line = find_line_note (after);
4282 rtx insn = emit_insn_after (x, after);
4285 emit_note_copy_after (from_line, after);
4288 emit_note_copy_after (after_line, insn);
4291 /* Make an insn of code JUMP_INSN with body X
4292 and output it after the insn AFTER. */
4295 emit_jump_insn_after (rtx x, rtx after)
4299 #ifdef ENABLE_RTL_CHECKING
4300 if (after == NULL_RTX)
4304 switch (GET_CODE (x))
4312 last = emit_insn_after_1 (x, after);
4315 #ifdef ENABLE_RTL_CHECKING
4322 last = make_jump_insn_raw (x);
4323 add_insn_after (last, after);
4330 /* Make an instruction with body X and code CALL_INSN
4331 and output it after the instruction AFTER. */
4334 emit_call_insn_after (rtx x, rtx after)
4338 #ifdef ENABLE_RTL_CHECKING
4339 if (after == NULL_RTX)
4343 switch (GET_CODE (x))
4351 last = emit_insn_after_1 (x, after);
4354 #ifdef ENABLE_RTL_CHECKING
4361 last = make_call_insn_raw (x);
4362 add_insn_after (last, after);
4369 /* Make an insn of code BARRIER
4370 and output it after the insn AFTER. */
4373 emit_barrier_after (rtx after)
4375 rtx insn = rtx_alloc (BARRIER);
4377 INSN_UID (insn) = cur_insn_uid++;
4379 add_insn_after (insn, after);
4383 /* Emit the label LABEL after the insn AFTER. */
4386 emit_label_after (rtx label, rtx after)
4388 /* This can be called twice for the same label
4389 as a result of the confusion that follows a syntax error!
4390 So make it harmless. */
4391 if (INSN_UID (label) == 0)
4393 INSN_UID (label) = cur_insn_uid++;
4394 add_insn_after (label, after);
4400 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4403 emit_note_after (int subtype, rtx after)
4405 rtx note = rtx_alloc (NOTE);
4406 INSN_UID (note) = cur_insn_uid++;
4407 NOTE_SOURCE_FILE (note) = 0;
4408 NOTE_LINE_NUMBER (note) = subtype;
4409 BLOCK_FOR_INSN (note) = NULL;
4410 add_insn_after (note, after);
4414 /* Emit a copy of note ORIG after the insn AFTER. */
4417 emit_note_copy_after (rtx orig, rtx after)
4421 if (NOTE_LINE_NUMBER (orig) >= 0 && no_line_numbers)
4427 note = rtx_alloc (NOTE);
4428 INSN_UID (note) = cur_insn_uid++;
4429 NOTE_LINE_NUMBER (note) = NOTE_LINE_NUMBER (orig);
4430 NOTE_DATA (note) = NOTE_DATA (orig);
4431 BLOCK_FOR_INSN (note) = NULL;
4432 add_insn_after (note, after);
4436 /* Like emit_insn_after, but set INSN_LOCATOR according to SCOPE. */
4438 emit_insn_after_setloc (rtx pattern, rtx after, int loc)
4440 rtx last = emit_insn_after (pattern, after);
4442 after = NEXT_INSN (after);
4445 if (active_insn_p (after))
4446 INSN_LOCATOR (after) = loc;
4449 after = NEXT_INSN (after);
4454 /* Like emit_jump_insn_after, but set INSN_LOCATOR according to SCOPE. */
4456 emit_jump_insn_after_setloc (rtx pattern, rtx after, int loc)
4458 rtx last = emit_jump_insn_after (pattern, after);
4460 after = NEXT_INSN (after);
4463 if (active_insn_p (after))
4464 INSN_LOCATOR (after) = loc;
4467 after = NEXT_INSN (after);
4472 /* Like emit_call_insn_after, but set INSN_LOCATOR according to SCOPE. */
4474 emit_call_insn_after_setloc (rtx pattern, rtx after, int loc)
4476 rtx last = emit_call_insn_after (pattern, after);
4478 after = NEXT_INSN (after);
4481 if (active_insn_p (after))
4482 INSN_LOCATOR (after) = loc;
4485 after = NEXT_INSN (after);
4490 /* Like emit_insn_before, but set INSN_LOCATOR according to SCOPE. */
4492 emit_insn_before_setloc (rtx pattern, rtx before, int loc)
4494 rtx first = PREV_INSN (before);
4495 rtx last = emit_insn_before (pattern, before);
4497 first = NEXT_INSN (first);
4500 if (active_insn_p (first))
4501 INSN_LOCATOR (first) = loc;
4504 first = NEXT_INSN (first);
4509 /* Take X and emit it at the end of the doubly-linked
4512 Returns the last insn emitted. */
4517 rtx last = last_insn;
4523 switch (GET_CODE (x))
4534 rtx next = NEXT_INSN (insn);
4541 #ifdef ENABLE_RTL_CHECKING
4548 last = make_insn_raw (x);
4556 /* Make an insn of code JUMP_INSN with pattern X
4557 and add it to the end of the doubly-linked list. */
4560 emit_jump_insn (rtx x)
4562 rtx last = NULL_RTX, insn;
4564 switch (GET_CODE (x))
4575 rtx next = NEXT_INSN (insn);
4582 #ifdef ENABLE_RTL_CHECKING
4589 last = make_jump_insn_raw (x);
4597 /* Make an insn of code CALL_INSN with pattern X
4598 and add it to the end of the doubly-linked list. */
4601 emit_call_insn (rtx x)
4605 switch (GET_CODE (x))
4613 insn = emit_insn (x);
4616 #ifdef ENABLE_RTL_CHECKING
4623 insn = make_call_insn_raw (x);
4631 /* Add the label LABEL to the end of the doubly-linked list. */
4634 emit_label (rtx label)
4636 /* This can be called twice for the same label
4637 as a result of the confusion that follows a syntax error!
4638 So make it harmless. */
4639 if (INSN_UID (label) == 0)
4641 INSN_UID (label) = cur_insn_uid++;
4647 /* Make an insn of code BARRIER
4648 and add it to the end of the doubly-linked list. */
4653 rtx barrier = rtx_alloc (BARRIER);
4654 INSN_UID (barrier) = cur_insn_uid++;
4659 /* Make line numbering NOTE insn for LOCATION add it to the end
4660 of the doubly-linked list, but only if line-numbers are desired for
4661 debugging info and it doesn't match the previous one. */
4664 emit_line_note (location_t location)
4668 set_file_and_line_for_stmt (location);
4670 if (location.file && last_location.file
4671 && !strcmp (location.file, last_location.file)
4672 && location.line == last_location.line)
4674 last_location = location;
4676 if (no_line_numbers)
4682 note = emit_note (location.line);
4683 NOTE_SOURCE_FILE (note) = location.file;
4688 /* Emit a copy of note ORIG. */
4691 emit_note_copy (rtx orig)
4695 if (NOTE_LINE_NUMBER (orig) >= 0 && no_line_numbers)
4701 note = rtx_alloc (NOTE);
4703 INSN_UID (note) = cur_insn_uid++;
4704 NOTE_DATA (note) = NOTE_DATA (orig);
4705 NOTE_LINE_NUMBER (note) = NOTE_LINE_NUMBER (orig);
4706 BLOCK_FOR_INSN (note) = NULL;
4712 /* Make an insn of code NOTE or type NOTE_NO
4713 and add it to the end of the doubly-linked list. */
4716 emit_note (int note_no)
4720 note = rtx_alloc (NOTE);
4721 INSN_UID (note) = cur_insn_uid++;
4722 NOTE_LINE_NUMBER (note) = note_no;
4723 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4724 BLOCK_FOR_INSN (note) = NULL;
4729 /* Cause next statement to emit a line note even if the line number
4733 force_next_line_note (void)
4735 last_location.line = -1;
4738 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4739 note of this type already exists, remove it first. */
4742 set_unique_reg_note (rtx insn, enum reg_note kind, rtx datum)
4744 rtx note = find_reg_note (insn, kind, NULL_RTX);
4750 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4751 has multiple sets (some callers assume single_set
4752 means the insn only has one set, when in fact it
4753 means the insn only has one * useful * set). */
4754 if (GET_CODE (PATTERN (insn)) == PARALLEL && multiple_sets (insn))
4761 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4762 It serves no useful purpose and breaks eliminate_regs. */
4763 if (GET_CODE (datum) == ASM_OPERANDS)
4773 XEXP (note, 0) = datum;
4777 REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn));
4778 return REG_NOTES (insn);
4781 /* Return an indication of which type of insn should have X as a body.
4782 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
4785 classify_insn (rtx x)
4787 if (GET_CODE (x) == CODE_LABEL)
4789 if (GET_CODE (x) == CALL)
4791 if (GET_CODE (x) == RETURN)
4793 if (GET_CODE (x) == SET)
4795 if (SET_DEST (x) == pc_rtx)
4797 else if (GET_CODE (SET_SRC (x)) == CALL)
4802 if (GET_CODE (x) == PARALLEL)
4805 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
4806 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
4808 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4809 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
4811 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4812 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
4818 /* Emit the rtl pattern X as an appropriate kind of insn.
4819 If X is a label, it is simply added into the insn chain. */
4824 enum rtx_code code = classify_insn (x);
4826 if (code == CODE_LABEL)
4827 return emit_label (x);
4828 else if (code == INSN)
4829 return emit_insn (x);
4830 else if (code == JUMP_INSN)
4832 rtx insn = emit_jump_insn (x);
4833 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
4834 return emit_barrier ();
4837 else if (code == CALL_INSN)
4838 return emit_call_insn (x);
4843 /* Space for free sequence stack entries. */
4844 static GTY ((deletable (""))) struct sequence_stack *free_sequence_stack;
4846 /* Begin emitting insns to a sequence which can be packaged in an
4847 RTL_EXPR. If this sequence will contain something that might cause
4848 the compiler to pop arguments to function calls (because those
4849 pops have previously been deferred; see INHIBIT_DEFER_POP for more
4850 details), use do_pending_stack_adjust before calling this function.
4851 That will ensure that the deferred pops are not accidentally
4852 emitted in the middle of this sequence. */
4855 start_sequence (void)
4857 struct sequence_stack *tem;
4859 if (free_sequence_stack != NULL)
4861 tem = free_sequence_stack;
4862 free_sequence_stack = tem->next;
4865 tem = ggc_alloc (sizeof (struct sequence_stack));
4867 tem->next = seq_stack;
4868 tem->first = first_insn;
4869 tem->last = last_insn;
4870 tem->sequence_rtl_expr = seq_rtl_expr;
4878 /* Similarly, but indicate that this sequence will be placed in T, an
4879 RTL_EXPR. See the documentation for start_sequence for more
4880 information about how to use this function. */
4883 start_sequence_for_rtl_expr (tree t)
4890 /* Set up the insn chain starting with FIRST as the current sequence,
4891 saving the previously current one. See the documentation for
4892 start_sequence for more information about how to use this function. */
4895 push_to_sequence (rtx first)
4901 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
4907 /* Set up the insn chain from a chain stort in FIRST to LAST. */
4910 push_to_full_sequence (rtx first, rtx last)
4915 /* We really should have the end of the insn chain here. */
4916 if (last && NEXT_INSN (last))
4920 /* Set up the outer-level insn chain
4921 as the current sequence, saving the previously current one. */
4924 push_topmost_sequence (void)
4926 struct sequence_stack *stack, *top = NULL;
4930 for (stack = seq_stack; stack; stack = stack->next)
4933 first_insn = top->first;
4934 last_insn = top->last;
4935 seq_rtl_expr = top->sequence_rtl_expr;
4938 /* After emitting to the outer-level insn chain, update the outer-level
4939 insn chain, and restore the previous saved state. */
4942 pop_topmost_sequence (void)
4944 struct sequence_stack *stack, *top = NULL;
4946 for (stack = seq_stack; stack; stack = stack->next)
4949 top->first = first_insn;
4950 top->last = last_insn;
4951 /* ??? Why don't we save seq_rtl_expr here? */
4956 /* After emitting to a sequence, restore previous saved state.
4958 To get the contents of the sequence just made, you must call
4959 `get_insns' *before* calling here.
4961 If the compiler might have deferred popping arguments while
4962 generating this sequence, and this sequence will not be immediately
4963 inserted into the instruction stream, use do_pending_stack_adjust
4964 before calling get_insns. That will ensure that the deferred
4965 pops are inserted into this sequence, and not into some random
4966 location in the instruction stream. See INHIBIT_DEFER_POP for more
4967 information about deferred popping of arguments. */
4972 struct sequence_stack *tem = seq_stack;
4974 first_insn = tem->first;
4975 last_insn = tem->last;
4976 seq_rtl_expr = tem->sequence_rtl_expr;
4977 seq_stack = tem->next;
4979 memset (tem, 0, sizeof (*tem));
4980 tem->next = free_sequence_stack;
4981 free_sequence_stack = tem;
4984 /* This works like end_sequence, but records the old sequence in FIRST
4988 end_full_sequence (rtx *first, rtx *last)
4990 *first = first_insn;
4995 /* Return 1 if currently emitting into a sequence. */
4998 in_sequence_p (void)
5000 return seq_stack != 0;
5003 /* Put the various virtual registers into REGNO_REG_RTX. */
5006 init_virtual_regs (struct emit_status *es)
5008 rtx *ptr = es->x_regno_reg_rtx;
5009 ptr[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
5010 ptr[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
5011 ptr[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
5012 ptr[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
5013 ptr[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
5017 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
5018 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
5019 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
5020 static int copy_insn_n_scratches;
5022 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5023 copied an ASM_OPERANDS.
5024 In that case, it is the original input-operand vector. */
5025 static rtvec orig_asm_operands_vector;
5027 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5028 copied an ASM_OPERANDS.
5029 In that case, it is the copied input-operand vector. */
5030 static rtvec copy_asm_operands_vector;
5032 /* Likewise for the constraints vector. */
5033 static rtvec orig_asm_constraints_vector;
5034 static rtvec copy_asm_constraints_vector;
5036 /* Recursively create a new copy of an rtx for copy_insn.
5037 This function differs from copy_rtx in that it handles SCRATCHes and
5038 ASM_OPERANDs properly.
5039 Normally, this function is not used directly; use copy_insn as front end.
5040 However, you could first copy an insn pattern with copy_insn and then use
5041 this function afterwards to properly copy any REG_NOTEs containing
5045 copy_insn_1 (rtx orig)
5050 const char *format_ptr;
5052 code = GET_CODE (orig);
5069 for (i = 0; i < copy_insn_n_scratches; i++)
5070 if (copy_insn_scratch_in[i] == orig)
5071 return copy_insn_scratch_out[i];
5075 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
5076 a LABEL_REF, it isn't sharable. */
5077 if (GET_CODE (XEXP (orig, 0)) == PLUS
5078 && GET_CODE (XEXP (XEXP (orig, 0), 0)) == SYMBOL_REF
5079 && GET_CODE (XEXP (XEXP (orig, 0), 1)) == CONST_INT)
5083 /* A MEM with a constant address is not sharable. The problem is that
5084 the constant address may need to be reloaded. If the mem is shared,
5085 then reloading one copy of this mem will cause all copies to appear
5086 to have been reloaded. */
5092 copy = rtx_alloc (code);
5094 /* Copy the various flags, and other information. We assume that
5095 all fields need copying, and then clear the fields that should
5096 not be copied. That is the sensible default behavior, and forces
5097 us to explicitly document why we are *not* copying a flag. */
5098 memcpy (copy, orig, RTX_HDR_SIZE);
5100 /* We do not copy the USED flag, which is used as a mark bit during
5101 walks over the RTL. */
5102 RTX_FLAG (copy, used) = 0;
5104 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5105 if (GET_RTX_CLASS (code) == 'i')
5107 RTX_FLAG (copy, jump) = 0;
5108 RTX_FLAG (copy, call) = 0;
5109 RTX_FLAG (copy, frame_related) = 0;
5112 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
5114 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
5116 copy->u.fld[i] = orig->u.fld[i];
5117 switch (*format_ptr++)
5120 if (XEXP (orig, i) != NULL)
5121 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
5126 if (XVEC (orig, i) == orig_asm_constraints_vector)
5127 XVEC (copy, i) = copy_asm_constraints_vector;
5128 else if (XVEC (orig, i) == orig_asm_operands_vector)
5129 XVEC (copy, i) = copy_asm_operands_vector;
5130 else if (XVEC (orig, i) != NULL)
5132 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
5133 for (j = 0; j < XVECLEN (copy, i); j++)
5134 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
5145 /* These are left unchanged. */
5153 if (code == SCRATCH)
5155 i = copy_insn_n_scratches++;
5156 if (i >= MAX_RECOG_OPERANDS)
5158 copy_insn_scratch_in[i] = orig;
5159 copy_insn_scratch_out[i] = copy;
5161 else if (code == ASM_OPERANDS)
5163 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
5164 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
5165 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
5166 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
5172 /* Create a new copy of an rtx.
5173 This function differs from copy_rtx in that it handles SCRATCHes and
5174 ASM_OPERANDs properly.
5175 INSN doesn't really have to be a full INSN; it could be just the
5178 copy_insn (rtx insn)
5180 copy_insn_n_scratches = 0;
5181 orig_asm_operands_vector = 0;
5182 orig_asm_constraints_vector = 0;
5183 copy_asm_operands_vector = 0;
5184 copy_asm_constraints_vector = 0;
5185 return copy_insn_1 (insn);
5188 /* Initialize data structures and variables in this file
5189 before generating rtl for each function. */
5194 struct function *f = cfun;
5196 f->emit = ggc_alloc (sizeof (struct emit_status));
5199 seq_rtl_expr = NULL;
5201 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
5202 last_location.line = 0;
5203 last_location.file = 0;
5204 first_label_num = label_num;
5208 /* Init the tables that describe all the pseudo regs. */
5210 f->emit->regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
5212 f->emit->regno_pointer_align
5213 = ggc_alloc_cleared (f->emit->regno_pointer_align_length
5214 * sizeof (unsigned char));
5217 = ggc_alloc (f->emit->regno_pointer_align_length * sizeof (rtx));
5219 /* Put copies of all the hard registers into regno_reg_rtx. */
5220 memcpy (regno_reg_rtx,
5221 static_regno_reg_rtx,
5222 FIRST_PSEUDO_REGISTER * sizeof (rtx));
5224 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5225 init_virtual_regs (f->emit);
5227 /* Indicate that the virtual registers and stack locations are
5229 REG_POINTER (stack_pointer_rtx) = 1;
5230 REG_POINTER (frame_pointer_rtx) = 1;
5231 REG_POINTER (hard_frame_pointer_rtx) = 1;
5232 REG_POINTER (arg_pointer_rtx) = 1;
5234 REG_POINTER (virtual_incoming_args_rtx) = 1;
5235 REG_POINTER (virtual_stack_vars_rtx) = 1;
5236 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
5237 REG_POINTER (virtual_outgoing_args_rtx) = 1;
5238 REG_POINTER (virtual_cfa_rtx) = 1;
5240 #ifdef STACK_BOUNDARY
5241 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
5242 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5243 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5244 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
5246 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
5247 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
5248 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
5249 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
5250 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
5253 #ifdef INIT_EXPANDERS
5258 /* Generate the constant 0. */
5261 gen_const_vector_0 (enum machine_mode mode)
5266 enum machine_mode inner;
5268 units = GET_MODE_NUNITS (mode);
5269 inner = GET_MODE_INNER (mode);
5271 v = rtvec_alloc (units);
5273 /* We need to call this function after we to set CONST0_RTX first. */
5274 if (!CONST0_RTX (inner))
5277 for (i = 0; i < units; ++i)
5278 RTVEC_ELT (v, i) = CONST0_RTX (inner);
5280 tem = gen_rtx_raw_CONST_VECTOR (mode, v);
5284 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5285 all elements are zero. */
5287 gen_rtx_CONST_VECTOR (enum machine_mode mode, rtvec v)
5289 rtx inner_zero = CONST0_RTX (GET_MODE_INNER (mode));
5292 for (i = GET_MODE_NUNITS (mode) - 1; i >= 0; i--)
5293 if (RTVEC_ELT (v, i) != inner_zero)
5294 return gen_rtx_raw_CONST_VECTOR (mode, v);
5295 return CONST0_RTX (mode);
5298 /* Create some permanent unique rtl objects shared between all functions.
5299 LINE_NUMBERS is nonzero if line numbers are to be generated. */
5302 init_emit_once (int line_numbers)
5305 enum machine_mode mode;
5306 enum machine_mode double_mode;
5308 /* We need reg_raw_mode, so initialize the modes now. */
5309 init_reg_modes_once ();
5311 /* Initialize the CONST_INT, CONST_DOUBLE, and memory attribute hash
5313 const_int_htab = htab_create_ggc (37, const_int_htab_hash,
5314 const_int_htab_eq, NULL);
5316 const_double_htab = htab_create_ggc (37, const_double_htab_hash,
5317 const_double_htab_eq, NULL);
5319 mem_attrs_htab = htab_create_ggc (37, mem_attrs_htab_hash,
5320 mem_attrs_htab_eq, NULL);
5321 reg_attrs_htab = htab_create_ggc (37, reg_attrs_htab_hash,
5322 reg_attrs_htab_eq, NULL);
5324 no_line_numbers = ! line_numbers;
5326 /* Compute the word and byte modes. */
5328 byte_mode = VOIDmode;
5329 word_mode = VOIDmode;
5330 double_mode = VOIDmode;
5332 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
5333 mode = GET_MODE_WIDER_MODE (mode))
5335 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
5336 && byte_mode == VOIDmode)
5339 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
5340 && word_mode == VOIDmode)
5344 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
5345 mode = GET_MODE_WIDER_MODE (mode))
5347 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
5348 && double_mode == VOIDmode)
5352 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
5354 /* Assign register numbers to the globally defined register rtx.
5355 This must be done at runtime because the register number field
5356 is in a union and some compilers can't initialize unions. */
5358 pc_rtx = gen_rtx (PC, VOIDmode);
5359 cc0_rtx = gen_rtx (CC0, VOIDmode);
5360 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
5361 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
5362 if (hard_frame_pointer_rtx == 0)
5363 hard_frame_pointer_rtx = gen_raw_REG (Pmode,
5364 HARD_FRAME_POINTER_REGNUM);
5365 if (arg_pointer_rtx == 0)
5366 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
5367 virtual_incoming_args_rtx =
5368 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
5369 virtual_stack_vars_rtx =
5370 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
5371 virtual_stack_dynamic_rtx =
5372 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
5373 virtual_outgoing_args_rtx =
5374 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
5375 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
5377 /* Initialize RTL for commonly used hard registers. These are
5378 copied into regno_reg_rtx as we begin to compile each function. */
5379 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
5380 static_regno_reg_rtx[i] = gen_raw_REG (reg_raw_mode[i], i);
5382 #ifdef INIT_EXPANDERS
5383 /* This is to initialize {init|mark|free}_machine_status before the first
5384 call to push_function_context_to. This is needed by the Chill front
5385 end which calls push_function_context_to before the first call to
5386 init_function_start. */
5390 /* Create the unique rtx's for certain rtx codes and operand values. */
5392 /* Don't use gen_rtx here since gen_rtx in this case
5393 tries to use these variables. */
5394 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
5395 const_int_rtx[i + MAX_SAVED_CONST_INT] =
5396 gen_rtx_raw_CONST_INT (VOIDmode, (HOST_WIDE_INT) i);
5398 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
5399 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
5400 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
5402 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
5404 REAL_VALUE_FROM_INT (dconst0, 0, 0, double_mode);
5405 REAL_VALUE_FROM_INT (dconst1, 1, 0, double_mode);
5406 REAL_VALUE_FROM_INT (dconst2, 2, 0, double_mode);
5407 REAL_VALUE_FROM_INT (dconst3, 3, 0, double_mode);
5408 REAL_VALUE_FROM_INT (dconst10, 10, 0, double_mode);
5409 REAL_VALUE_FROM_INT (dconstm1, -1, -1, double_mode);
5410 REAL_VALUE_FROM_INT (dconstm2, -2, -1, double_mode);
5412 dconsthalf = dconst1;
5415 real_arithmetic (&dconstthird, RDIV_EXPR, &dconst1, &dconst3);
5417 /* Initialize mathematical constants for constant folding builtins.
5418 These constants need to be given to at least 160 bits precision. */
5419 real_from_string (&dconstpi,
5420 "3.1415926535897932384626433832795028841971693993751058209749445923078");
5421 real_from_string (&dconste,
5422 "2.7182818284590452353602874713526624977572470936999595749669676277241");
5424 for (i = 0; i < (int) ARRAY_SIZE (const_tiny_rtx); i++)
5426 REAL_VALUE_TYPE *r =
5427 (i == 0 ? &dconst0 : i == 1 ? &dconst1 : &dconst2);
5429 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
5430 mode = GET_MODE_WIDER_MODE (mode))
5431 const_tiny_rtx[i][(int) mode] =
5432 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5434 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
5436 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
5437 mode = GET_MODE_WIDER_MODE (mode))
5438 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5440 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
5442 mode = GET_MODE_WIDER_MODE (mode))
5443 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5446 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
5448 mode = GET_MODE_WIDER_MODE (mode))
5449 const_tiny_rtx[0][(int) mode] = gen_const_vector_0 (mode);
5451 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
5453 mode = GET_MODE_WIDER_MODE (mode))
5454 const_tiny_rtx[0][(int) mode] = gen_const_vector_0 (mode);
5456 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
5457 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
5458 const_tiny_rtx[0][i] = const0_rtx;
5460 const_tiny_rtx[0][(int) BImode] = const0_rtx;
5461 if (STORE_FLAG_VALUE == 1)
5462 const_tiny_rtx[1][(int) BImode] = const1_rtx;
5464 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5465 return_address_pointer_rtx
5466 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
5469 #ifdef STATIC_CHAIN_REGNUM
5470 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
5472 #ifdef STATIC_CHAIN_INCOMING_REGNUM
5473 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
5474 static_chain_incoming_rtx
5475 = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
5478 static_chain_incoming_rtx = static_chain_rtx;
5482 static_chain_rtx = STATIC_CHAIN;
5484 #ifdef STATIC_CHAIN_INCOMING
5485 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
5487 static_chain_incoming_rtx = static_chain_rtx;
5491 if ((unsigned) PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
5492 pic_offset_table_rtx = gen_raw_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
5495 /* Query and clear/ restore no_line_numbers. This is used by the
5496 switch / case handling in stmt.c to give proper line numbers in
5497 warnings about unreachable code. */
5500 force_line_numbers (void)
5502 int old = no_line_numbers;
5504 no_line_numbers = 0;
5506 force_next_line_note ();
5511 restore_line_number_status (int old_value)
5513 no_line_numbers = old_value;
5516 /* Produce exact duplicate of insn INSN after AFTER.
5517 Care updating of libcall regions if present. */
5520 emit_copy_of_insn_after (rtx insn, rtx after)
5523 rtx note1, note2, link;
5525 switch (GET_CODE (insn))
5528 new = emit_insn_after (copy_insn (PATTERN (insn)), after);
5532 new = emit_jump_insn_after (copy_insn (PATTERN (insn)), after);
5536 new = emit_call_insn_after (copy_insn (PATTERN (insn)), after);
5537 if (CALL_INSN_FUNCTION_USAGE (insn))
5538 CALL_INSN_FUNCTION_USAGE (new)
5539 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn));
5540 SIBLING_CALL_P (new) = SIBLING_CALL_P (insn);
5541 CONST_OR_PURE_CALL_P (new) = CONST_OR_PURE_CALL_P (insn);
5548 /* Update LABEL_NUSES. */
5549 mark_jump_label (PATTERN (new), new, 0);
5551 INSN_LOCATOR (new) = INSN_LOCATOR (insn);
5553 /* Copy all REG_NOTES except REG_LABEL since mark_jump_label will
5555 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5556 if (REG_NOTE_KIND (link) != REG_LABEL)
5558 if (GET_CODE (link) == EXPR_LIST)
5560 = copy_insn_1 (gen_rtx_EXPR_LIST (REG_NOTE_KIND (link),
5565 = copy_insn_1 (gen_rtx_INSN_LIST (REG_NOTE_KIND (link),
5570 /* Fix the libcall sequences. */
5571 if ((note1 = find_reg_note (new, REG_RETVAL, NULL_RTX)) != NULL)
5574 while ((note2 = find_reg_note (p, REG_LIBCALL, NULL_RTX)) == NULL)
5576 XEXP (note1, 0) = p;
5577 XEXP (note2, 0) = new;
5579 INSN_CODE (new) = INSN_CODE (insn);
5583 #include "gt-emit-rtl.h"