1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains the functions `gen_rtx', `gen_reg_rtx'
26 and `gen_label_rtx' that are the usual ways of creating rtl
27 expressions for most purposes.
29 It also has the functions for creating insns and linking
30 them in the doubly-linked chain.
32 The patterns of the insns are created by machine-dependent
33 routines in insn-emit.c, which is generated automatically from
34 the machine description. These routines use `gen_rtx' to make
35 the individual rtx's of the pattern; what is machine dependent
36 is the kind of rtx's they make and what arguments they use. */
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
55 #include "basic-block.h"
58 /* Commonly used modes. */
60 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
61 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
62 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
63 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
66 /* This is *not* reset after each function. It gives each CODE_LABEL
67 in the entire compilation a unique label number. */
69 static int label_num = 1;
71 /* Highest label number in current function.
72 Zero means use the value of label_num instead.
73 This is nonzero only when belatedly compiling an inline function. */
75 static int last_label_num;
77 /* Value label_num had when set_new_first_and_last_label_number was called.
78 If label_num has not changed since then, last_label_num is valid. */
80 static int base_label_num;
82 /* Nonzero means do not generate NOTEs for source line numbers. */
84 static int no_line_numbers;
86 /* Commonly used rtx's, so that we only need space for one copy.
87 These are initialized once for the entire compilation.
88 All of these except perhaps the floating-point CONST_DOUBLEs
89 are unique; no other rtx-object will be equal to any of these. */
91 rtx global_rtl[GR_MAX];
93 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
94 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
95 record a copy of const[012]_rtx. */
97 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
101 REAL_VALUE_TYPE dconst0;
102 REAL_VALUE_TYPE dconst1;
103 REAL_VALUE_TYPE dconst2;
104 REAL_VALUE_TYPE dconstm1;
106 /* All references to the following fixed hard registers go through
107 these unique rtl objects. On machines where the frame-pointer and
108 arg-pointer are the same register, they use the same unique object.
110 After register allocation, other rtl objects which used to be pseudo-regs
111 may be clobbered to refer to the frame-pointer register.
112 But references that were originally to the frame-pointer can be
113 distinguished from the others because they contain frame_pointer_rtx.
115 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
116 tricky: until register elimination has taken place hard_frame_pointer_rtx
117 should be used if it is being set, and frame_pointer_rtx otherwise. After
118 register elimination hard_frame_pointer_rtx should always be used.
119 On machines where the two registers are same (most) then these are the
122 In an inline procedure, the stack and frame pointer rtxs may not be
123 used for anything else. */
124 rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
125 rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
126 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
127 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
128 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
130 /* This is used to implement __builtin_return_address for some machines.
131 See for instance the MIPS port. */
132 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
134 /* We make one copy of (const_int C) where C is in
135 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
136 to save space during the compilation and simplify comparisons of
139 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
141 /* A hash table storing CONST_INTs whose absolute value is greater
142 than MAX_SAVED_CONST_INT. */
144 static htab_t const_int_htab;
146 /* start_sequence and gen_sequence can make a lot of rtx expressions which are
147 shortly thrown away. We use two mechanisms to prevent this waste:
149 For sizes up to 5 elements, we keep a SEQUENCE and its associated
150 rtvec for use by gen_sequence. One entry for each size is
151 sufficient because most cases are calls to gen_sequence followed by
152 immediately emitting the SEQUENCE. Reuse is safe since emitting a
153 sequence is destructive on the insn in it anyway and hence can't be
156 We do not bother to save this cached data over nested function calls.
157 Instead, we just reinitialize them. */
159 #define SEQUENCE_RESULT_SIZE 5
161 static rtx sequence_result[SEQUENCE_RESULT_SIZE];
163 /* During RTL generation, we also keep a list of free INSN rtl codes. */
164 static rtx free_insn;
166 #define first_insn (cfun->emit->x_first_insn)
167 #define last_insn (cfun->emit->x_last_insn)
168 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
169 #define last_linenum (cfun->emit->x_last_linenum)
170 #define last_filename (cfun->emit->x_last_filename)
171 #define first_label_num (cfun->emit->x_first_label_num)
173 /* This is where the pointer to the obstack being used for RTL is stored. */
174 extern struct obstack *rtl_obstack;
176 static rtx make_jump_insn_raw PARAMS ((rtx));
177 static rtx make_call_insn_raw PARAMS ((rtx));
178 static rtx find_line_note PARAMS ((rtx));
179 static void mark_sequence_stack PARAMS ((struct sequence_stack *));
180 static void unshare_all_rtl_1 PARAMS ((rtx));
181 static void unshare_all_decls PARAMS ((tree));
182 static void reset_used_decls PARAMS ((tree));
183 static hashval_t const_int_htab_hash PARAMS ((const void *));
184 static int const_int_htab_eq PARAMS ((const void *,
186 static int rtx_htab_mark_1 PARAMS ((void **, void *));
187 static void rtx_htab_mark PARAMS ((void *));
190 /* Returns a hash code for X (which is a really a CONST_INT). */
193 const_int_htab_hash (x)
196 return (hashval_t) INTVAL ((const struct rtx_def *) x);
199 /* Returns non-zero if the value represented by X (which is really a
200 CONST_INT) is the same as that given by Y (which is really a
204 const_int_htab_eq (x, y)
208 return (INTVAL ((const struct rtx_def *) x) == *((const HOST_WIDE_INT *) y));
211 /* Mark the hash-table element X (which is really a pointer to an
215 rtx_htab_mark_1 (x, data)
217 void *data ATTRIBUTE_UNUSED;
223 /* Mark all the elements of HTAB (which is really an htab_t full of
230 htab_traverse (*((htab_t *) htab), rtx_htab_mark_1, NULL);
233 /* There are some RTL codes that require special attention; the generation
234 functions do the raw handling. If you add to this list, modify
235 special_rtx in gengenrtl.c as well. */
238 gen_rtx_CONST_INT (mode, arg)
239 enum machine_mode mode ATTRIBUTE_UNUSED;
244 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
245 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
247 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
248 if (const_true_rtx && arg == STORE_FLAG_VALUE)
249 return const_true_rtx;
252 /* Look up the CONST_INT in the hash table. */
253 slot = htab_find_slot_with_hash (const_int_htab, &arg,
254 (hashval_t) arg, INSERT);
259 push_obstacks_nochange ();
260 end_temporary_allocation ();
261 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
265 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
271 /* CONST_DOUBLEs needs special handling because their length is known
275 gen_rtx_CONST_DOUBLE (mode, arg0, arg1, arg2)
276 enum machine_mode mode;
278 HOST_WIDE_INT arg1, arg2;
280 rtx r = rtx_alloc (CONST_DOUBLE);
285 X0EXP (r, 1) = NULL_RTX;
289 for (i = GET_RTX_LENGTH (CONST_DOUBLE) - 1; i > 3; --i)
296 gen_rtx_REG (mode, regno)
297 enum machine_mode mode;
300 /* In case the MD file explicitly references the frame pointer, have
301 all such references point to the same frame pointer. This is
302 used during frame pointer elimination to distinguish the explicit
303 references to these registers from pseudos that happened to be
306 If we have eliminated the frame pointer or arg pointer, we will
307 be using it as a normal register, for example as a spill
308 register. In such cases, we might be accessing it in a mode that
309 is not Pmode and therefore cannot use the pre-allocated rtx.
311 Also don't do this when we are making new REGs in reload, since
312 we don't want to get confused with the real pointers. */
314 if (mode == Pmode && !reload_in_progress)
316 if (regno == FRAME_POINTER_REGNUM)
317 return frame_pointer_rtx;
318 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
319 if (regno == HARD_FRAME_POINTER_REGNUM)
320 return hard_frame_pointer_rtx;
322 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
323 if (regno == ARG_POINTER_REGNUM)
324 return arg_pointer_rtx;
326 #ifdef RETURN_ADDRESS_POINTER_REGNUM
327 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
328 return return_address_pointer_rtx;
330 if (regno == STACK_POINTER_REGNUM)
331 return stack_pointer_rtx;
334 return gen_rtx_raw_REG (mode, regno);
338 gen_rtx_MEM (mode, addr)
339 enum machine_mode mode;
342 rtx rt = gen_rtx_raw_MEM (mode, addr);
344 /* This field is not cleared by the mere allocation of the rtx, so
346 MEM_ALIAS_SET (rt) = 0;
351 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
353 ** This routine generates an RTX of the size specified by
354 ** <code>, which is an RTX code. The RTX structure is initialized
355 ** from the arguments <element1> through <elementn>, which are
356 ** interpreted according to the specific RTX type's format. The
357 ** special machine mode associated with the rtx (if any) is specified
360 ** gen_rtx can be invoked in a way which resembles the lisp-like
361 ** rtx it will generate. For example, the following rtx structure:
363 ** (plus:QI (mem:QI (reg:SI 1))
364 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
366 ** ...would be generated by the following C code:
368 ** gen_rtx (PLUS, QImode,
369 ** gen_rtx (MEM, QImode,
370 ** gen_rtx (REG, SImode, 1)),
371 ** gen_rtx (MEM, QImode,
372 ** gen_rtx (PLUS, SImode,
373 ** gen_rtx (REG, SImode, 2),
374 ** gen_rtx (REG, SImode, 3)))),
379 gen_rtx VPARAMS ((enum rtx_code code, enum machine_mode mode, ...))
381 #ifndef ANSI_PROTOTYPES
383 enum machine_mode mode;
386 register int i; /* Array indices... */
387 register const char *fmt; /* Current rtx's format... */
388 register rtx rt_val; /* RTX to return to caller... */
392 #ifndef ANSI_PROTOTYPES
393 code = va_arg (p, enum rtx_code);
394 mode = va_arg (p, enum machine_mode);
400 rt_val = gen_rtx_CONST_INT (mode, va_arg (p, HOST_WIDE_INT));
405 rtx arg0 = va_arg (p, rtx);
406 HOST_WIDE_INT arg1 = va_arg (p, HOST_WIDE_INT);
407 HOST_WIDE_INT arg2 = va_arg (p, HOST_WIDE_INT);
408 rt_val = gen_rtx_CONST_DOUBLE (mode, arg0, arg1, arg2);
413 rt_val = gen_rtx_REG (mode, va_arg (p, int));
417 rt_val = gen_rtx_MEM (mode, va_arg (p, rtx));
421 rt_val = rtx_alloc (code); /* Allocate the storage space. */
422 rt_val->mode = mode; /* Store the machine mode... */
424 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
425 for (i = 0; i < GET_RTX_LENGTH (code); i++)
429 case '0': /* Unused field. */
432 case 'i': /* An integer? */
433 XINT (rt_val, i) = va_arg (p, int);
436 case 'w': /* A wide integer? */
437 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
440 case 's': /* A string? */
441 XSTR (rt_val, i) = va_arg (p, char *);
444 case 'e': /* An expression? */
445 case 'u': /* An insn? Same except when printing. */
446 XEXP (rt_val, i) = va_arg (p, rtx);
449 case 'E': /* An RTX vector? */
450 XVEC (rt_val, i) = va_arg (p, rtvec);
453 case 'b': /* A bitmap? */
454 XBITMAP (rt_val, i) = va_arg (p, bitmap);
457 case 't': /* A tree? */
458 XTREE (rt_val, i) = va_arg (p, tree);
472 /* gen_rtvec (n, [rt1, ..., rtn])
474 ** This routine creates an rtvec and stores within it the
475 ** pointers to rtx's which are its arguments.
480 gen_rtvec VPARAMS ((int n, ...))
482 #ifndef ANSI_PROTOTYPES
491 #ifndef ANSI_PROTOTYPES
496 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
498 vector = (rtx *) alloca (n * sizeof (rtx));
500 for (i = 0; i < n; i++)
501 vector[i] = va_arg (p, rtx);
504 return gen_rtvec_v (n, vector);
508 gen_rtvec_v (n, argp)
513 register rtvec rt_val;
516 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
518 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
520 for (i = 0; i < n; i++)
521 rt_val->elem[i] = *argp++;
527 /* Generate a REG rtx for a new pseudo register of mode MODE.
528 This pseudo is assigned the next sequential register number. */
532 enum machine_mode mode;
534 struct function *f = cfun;
537 /* Don't let anything called after initial flow analysis create new
542 if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
543 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT)
545 /* For complex modes, don't make a single pseudo.
546 Instead, make a CONCAT of two pseudos.
547 This allows noncontiguous allocation of the real and imaginary parts,
548 which makes much better code. Besides, allocating DCmode
549 pseudos overstrains reload on some machines like the 386. */
550 rtx realpart, imagpart;
551 int size = GET_MODE_UNIT_SIZE (mode);
552 enum machine_mode partmode
553 = mode_for_size (size * BITS_PER_UNIT,
554 (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
555 ? MODE_FLOAT : MODE_INT),
558 realpart = gen_reg_rtx (partmode);
559 imagpart = gen_reg_rtx (partmode);
560 return gen_rtx_CONCAT (mode, realpart, imagpart);
563 /* Make sure regno_pointer_flag and regno_reg_rtx are large
564 enough to have an element for this pseudo reg number. */
566 if (reg_rtx_no == f->emit->regno_pointer_flag_length)
568 int old_size = f->emit->regno_pointer_flag_length;
571 new = xrealloc (f->emit->regno_pointer_flag, old_size * 2);
572 memset (new + old_size, 0, old_size);
573 f->emit->regno_pointer_flag = new;
575 new = xrealloc (f->emit->regno_pointer_align, old_size * 2);
576 memset (new + old_size, 0, old_size);
577 f->emit->regno_pointer_align = (unsigned char *) new;
579 new1 = (rtx *) xrealloc (f->emit->x_regno_reg_rtx,
580 old_size * 2 * sizeof (rtx));
581 memset (new1 + old_size, 0, old_size * sizeof (rtx));
582 regno_reg_rtx = new1;
584 f->emit->regno_pointer_flag_length = old_size * 2;
587 val = gen_rtx_raw_REG (mode, reg_rtx_no);
588 regno_reg_rtx[reg_rtx_no++] = val;
592 /* Identify REG (which may be a CONCAT) as a user register. */
598 if (GET_CODE (reg) == CONCAT)
600 REG_USERVAR_P (XEXP (reg, 0)) = 1;
601 REG_USERVAR_P (XEXP (reg, 1)) = 1;
603 else if (GET_CODE (reg) == REG)
604 REG_USERVAR_P (reg) = 1;
609 /* Identify REG as a probable pointer register and show its alignment
610 as ALIGN, if nonzero. */
613 mark_reg_pointer (reg, align)
617 if (! REGNO_POINTER_FLAG (REGNO (reg)))
619 REGNO_POINTER_FLAG (REGNO (reg)) = 1;
622 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
624 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
625 /* We can no-longer be sure just how aligned this pointer is */
626 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
629 /* Return 1 plus largest pseudo reg number used in the current function. */
637 /* Return 1 + the largest label number used so far in the current function. */
642 if (last_label_num && label_num == base_label_num)
643 return last_label_num;
647 /* Return first label number used in this function (if any were used). */
650 get_first_label_num ()
652 return first_label_num;
655 /* Return a value representing some low-order bits of X, where the number
656 of low-order bits is given by MODE. Note that no conversion is done
657 between floating-point and fixed-point values, rather, the bit
658 representation is returned.
660 This function handles the cases in common between gen_lowpart, below,
661 and two variants in cse.c and combine.c. These are the cases that can
662 be safely handled at all points in the compilation.
664 If this is not a case we can handle, return 0. */
667 gen_lowpart_common (mode, x)
668 enum machine_mode mode;
673 if (GET_MODE (x) == mode)
676 /* MODE must occupy no more words than the mode of X. */
677 if (GET_MODE (x) != VOIDmode
678 && ((GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
679 > ((GET_MODE_SIZE (GET_MODE (x)) + (UNITS_PER_WORD - 1))
683 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD)
684 word = ((GET_MODE_SIZE (GET_MODE (x))
685 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
688 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
689 && (GET_MODE_CLASS (mode) == MODE_INT
690 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
692 /* If we are getting the low-order part of something that has been
693 sign- or zero-extended, we can either just use the object being
694 extended or make a narrower extension. If we want an even smaller
695 piece than the size of the object being extended, call ourselves
698 This case is used mostly by combine and cse. */
700 if (GET_MODE (XEXP (x, 0)) == mode)
702 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
703 return gen_lowpart_common (mode, XEXP (x, 0));
704 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
705 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
707 else if (GET_CODE (x) == SUBREG
708 && (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
709 || GET_MODE_SIZE (mode) == GET_MODE_UNIT_SIZE (GET_MODE (x))))
710 return (GET_MODE (SUBREG_REG (x)) == mode && SUBREG_WORD (x) == 0
712 : gen_rtx_SUBREG (mode, SUBREG_REG (x), SUBREG_WORD (x) + word));
713 else if (GET_CODE (x) == REG)
715 /* Let the backend decide how many registers to skip. This is needed
716 in particular for Sparc64 where fp regs are smaller than a word. */
717 /* ??? Note that subregs are now ambiguous, in that those against
718 pseudos are sized by the Word Size, while those against hard
719 regs are sized by the underlying register size. Better would be
720 to always interpret the subreg offset parameter as bytes or bits. */
722 if (WORDS_BIG_ENDIAN && REGNO (x) < FIRST_PSEUDO_REGISTER)
723 word = (HARD_REGNO_NREGS (REGNO (x), GET_MODE (x))
724 - HARD_REGNO_NREGS (REGNO (x), mode));
726 /* If the register is not valid for MODE, return 0. If we don't
727 do this, there is no way to fix up the resulting REG later.
728 But we do do this if the current REG is not valid for its
729 mode. This latter is a kludge, but is required due to the
730 way that parameters are passed on some machines, most
732 if (REGNO (x) < FIRST_PSEUDO_REGISTER
733 && ! HARD_REGNO_MODE_OK (REGNO (x) + word, mode)
734 && HARD_REGNO_MODE_OK (REGNO (x), GET_MODE (x)))
736 else if (REGNO (x) < FIRST_PSEUDO_REGISTER
737 /* integrate.c can't handle parts of a return value register. */
738 && (! REG_FUNCTION_VALUE_P (x)
739 || ! rtx_equal_function_value_matters)
740 #ifdef CLASS_CANNOT_CHANGE_MODE
741 && ! (CLASS_CANNOT_CHANGE_MODE_P (mode, GET_MODE (x))
742 && GET_MODE_CLASS (GET_MODE (x)) != MODE_COMPLEX_INT
743 && GET_MODE_CLASS (GET_MODE (x)) != MODE_COMPLEX_FLOAT
744 && (TEST_HARD_REG_BIT
745 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_MODE],
748 /* We want to keep the stack, frame, and arg pointers
750 && x != frame_pointer_rtx
751 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
752 && x != arg_pointer_rtx
754 && x != stack_pointer_rtx)
755 return gen_rtx_REG (mode, REGNO (x) + word);
757 return gen_rtx_SUBREG (mode, x, word);
759 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
760 from the low-order part of the constant. */
761 else if ((GET_MODE_CLASS (mode) == MODE_INT
762 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
763 && GET_MODE (x) == VOIDmode
764 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
766 /* If MODE is twice the host word size, X is already the desired
767 representation. Otherwise, if MODE is wider than a word, we can't
768 do this. If MODE is exactly a word, return just one CONST_INT.
769 If MODE is smaller than a word, clear the bits that don't belong
770 in our mode, unless they and our sign bit are all one. So we get
771 either a reasonable negative value or a reasonable unsigned value
774 if (GET_MODE_BITSIZE (mode) >= 2 * HOST_BITS_PER_WIDE_INT)
776 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
778 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT)
779 return (GET_CODE (x) == CONST_INT ? x
780 : GEN_INT (CONST_DOUBLE_LOW (x)));
783 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
784 int width = GET_MODE_BITSIZE (mode);
785 HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
786 : CONST_DOUBLE_LOW (x));
788 /* Sign extend to HOST_WIDE_INT. */
789 val = val << (HOST_BITS_PER_WIDE_INT - width) >> (HOST_BITS_PER_WIDE_INT - width);
791 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
796 #ifndef REAL_ARITHMETIC
797 /* If X is an integral constant but we want it in floating-point, it
798 must be the case that we have a union of an integer and a floating-point
799 value. If the machine-parameters allow it, simulate that union here
800 and return the result. The two-word and single-word cases are
803 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
804 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
805 || flag_pretend_float)
806 && GET_MODE_CLASS (mode) == MODE_FLOAT
807 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
808 && GET_CODE (x) == CONST_INT
809 && sizeof (float) * HOST_BITS_PER_CHAR == HOST_BITS_PER_WIDE_INT)
811 union {HOST_WIDE_INT i; float d; } u;
814 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
816 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
817 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
818 || flag_pretend_float)
819 && GET_MODE_CLASS (mode) == MODE_FLOAT
820 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
821 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
822 && GET_MODE (x) == VOIDmode
823 && (sizeof (double) * HOST_BITS_PER_CHAR
824 == 2 * HOST_BITS_PER_WIDE_INT))
826 union {HOST_WIDE_INT i[2]; double d; } u;
827 HOST_WIDE_INT low, high;
829 if (GET_CODE (x) == CONST_INT)
830 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
832 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
834 #ifdef HOST_WORDS_BIG_ENDIAN
835 u.i[0] = high, u.i[1] = low;
837 u.i[0] = low, u.i[1] = high;
840 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
843 /* Similarly, if this is converting a floating-point value into a
844 single-word integer. Only do this is the host and target parameters are
847 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
848 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
849 || flag_pretend_float)
850 && (GET_MODE_CLASS (mode) == MODE_INT
851 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
852 && GET_CODE (x) == CONST_DOUBLE
853 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
854 && GET_MODE_BITSIZE (mode) == BITS_PER_WORD)
855 return operand_subword (x, word, 0, GET_MODE (x));
857 /* Similarly, if this is converting a floating-point value into a
858 two-word integer, we can do this one word at a time and make an
859 integer. Only do this is the host and target parameters are
862 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
863 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
864 || flag_pretend_float)
865 && (GET_MODE_CLASS (mode) == MODE_INT
866 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
867 && GET_CODE (x) == CONST_DOUBLE
868 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
869 && GET_MODE_BITSIZE (mode) == 2 * BITS_PER_WORD)
872 = operand_subword (x, word + WORDS_BIG_ENDIAN, 0, GET_MODE (x));
874 = operand_subword (x, word + ! WORDS_BIG_ENDIAN, 0, GET_MODE (x));
876 if (lowpart && GET_CODE (lowpart) == CONST_INT
877 && highpart && GET_CODE (highpart) == CONST_INT)
878 return immed_double_const (INTVAL (lowpart), INTVAL (highpart), mode);
880 #else /* ifndef REAL_ARITHMETIC */
882 /* When we have a FP emulator, we can handle all conversions between
883 FP and integer operands. This simplifies reload because it
884 doesn't have to deal with constructs like (subreg:DI
885 (const_double:SF ...)) or (subreg:DF (const_int ...)). */
887 else if (mode == SFmode
888 && GET_CODE (x) == CONST_INT)
894 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
895 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
897 else if (mode == DFmode
898 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
899 && GET_MODE (x) == VOIDmode)
903 HOST_WIDE_INT low, high;
905 if (GET_CODE (x) == CONST_INT)
908 high = low >> (HOST_BITS_PER_WIDE_INT - 1);
912 low = CONST_DOUBLE_LOW (x);
913 high = CONST_DOUBLE_HIGH (x);
916 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
918 if (WORDS_BIG_ENDIAN)
919 i[0] = high, i[1] = low;
921 i[0] = low, i[1] = high;
923 r = REAL_VALUE_FROM_TARGET_DOUBLE (i);
924 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
926 else if ((GET_MODE_CLASS (mode) == MODE_INT
927 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
928 && GET_CODE (x) == CONST_DOUBLE
929 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
932 long i[4]; /* Only the low 32 bits of each 'long' are used. */
933 int endian = WORDS_BIG_ENDIAN ? 1 : 0;
935 REAL_VALUE_FROM_CONST_DOUBLE (r, x);
936 switch (GET_MODE (x))
939 REAL_VALUE_TO_TARGET_SINGLE (r, i[endian]);
943 REAL_VALUE_TO_TARGET_DOUBLE (r, i);
945 #if LONG_DOUBLE_TYPE_SIZE == 96
950 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i);
956 /* Now, pack the 32-bit elements of the array into a CONST_DOUBLE
958 #if HOST_BITS_PER_WIDE_INT == 32
959 return immed_double_const (i[endian], i[1-endian], mode);
961 if (HOST_BITS_PER_WIDE_INT != 64)
963 for (c = 0; c < 4; c++)
966 return immed_double_const (i[endian*3] |
967 (((HOST_WIDE_INT) i[1+endian]) << 32),
969 (((HOST_WIDE_INT) i[3-endian*3]) << 32),
973 #endif /* ifndef REAL_ARITHMETIC */
975 /* Otherwise, we can't do this. */
979 /* Return the real part (which has mode MODE) of a complex value X.
980 This always comes at the low address in memory. */
983 gen_realpart (mode, x)
984 enum machine_mode mode;
987 if (GET_CODE (x) == CONCAT && GET_MODE (XEXP (x, 0)) == mode)
989 else if (WORDS_BIG_ENDIAN
990 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
992 && REGNO (x) < FIRST_PSEUDO_REGISTER)
993 fatal ("Unable to access real part of complex value in a hard register on this target");
994 else if (WORDS_BIG_ENDIAN)
995 return gen_highpart (mode, x);
997 return gen_lowpart (mode, x);
1000 /* Return the imaginary part (which has mode MODE) of a complex value X.
1001 This always comes at the high address in memory. */
1004 gen_imagpart (mode, x)
1005 enum machine_mode mode;
1008 if (GET_CODE (x) == CONCAT && GET_MODE (XEXP (x, 0)) == mode)
1010 else if (WORDS_BIG_ENDIAN)
1011 return gen_lowpart (mode, x);
1012 else if (!WORDS_BIG_ENDIAN
1013 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1015 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1016 fatal ("Unable to access imaginary part of complex value in a hard register on this target");
1018 return gen_highpart (mode, x);
1021 /* Return 1 iff X, assumed to be a SUBREG,
1022 refers to the real part of the complex value in its containing reg.
1023 Complex values are always stored with the real part in the first word,
1024 regardless of WORDS_BIG_ENDIAN. */
1027 subreg_realpart_p (x)
1030 if (GET_CODE (x) != SUBREG)
1033 return ((unsigned int) SUBREG_WORD (x) * UNITS_PER_WORD
1034 < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x))));
1037 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1038 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1039 least-significant part of X.
1040 MODE specifies how big a part of X to return;
1041 it usually should not be larger than a word.
1042 If X is a MEM whose address is a QUEUED, the value may be so also. */
1045 gen_lowpart (mode, x)
1046 enum machine_mode mode;
1049 rtx result = gen_lowpart_common (mode, x);
1053 else if (GET_CODE (x) == REG)
1055 /* Must be a hard reg that's not valid in MODE. */
1056 result = gen_lowpart_common (mode, copy_to_reg (x));
1061 else if (GET_CODE (x) == MEM)
1063 /* The only additional case we can do is MEM. */
1064 register int offset = 0;
1065 if (WORDS_BIG_ENDIAN)
1066 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
1067 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1069 if (BYTES_BIG_ENDIAN)
1070 /* Adjust the address so that the address-after-the-data
1072 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
1073 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
1075 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
1077 else if (GET_CODE (x) == ADDRESSOF)
1078 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
1083 /* Like `gen_lowpart', but refer to the most significant part.
1084 This is used to access the imaginary part of a complex number. */
1087 gen_highpart (mode, x)
1088 enum machine_mode mode;
1091 /* This case loses if X is a subreg. To catch bugs early,
1092 complain if an invalid MODE is used even in other cases. */
1093 if (GET_MODE_SIZE (mode) > UNITS_PER_WORD
1094 && GET_MODE_SIZE (mode) != GET_MODE_UNIT_SIZE (GET_MODE (x)))
1096 if (GET_CODE (x) == CONST_DOUBLE
1097 #if !(TARGET_FLOAT_FORMAT != HOST_FLOAT_FORMAT || defined (REAL_IS_NOT_DOUBLE))
1098 && GET_MODE_CLASS (GET_MODE (x)) != MODE_FLOAT
1101 return GEN_INT (CONST_DOUBLE_HIGH (x) & GET_MODE_MASK (mode));
1102 else if (GET_CODE (x) == CONST_INT)
1104 if (HOST_BITS_PER_WIDE_INT <= BITS_PER_WORD)
1106 return GEN_INT (INTVAL (x) >> (HOST_BITS_PER_WIDE_INT - BITS_PER_WORD));
1108 else if (GET_CODE (x) == MEM)
1110 register int offset = 0;
1111 if (! WORDS_BIG_ENDIAN)
1112 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
1113 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1115 if (! BYTES_BIG_ENDIAN
1116 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
1117 offset -= (GET_MODE_SIZE (mode)
1118 - MIN (UNITS_PER_WORD,
1119 GET_MODE_SIZE (GET_MODE (x))));
1121 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
1123 else if (GET_CODE (x) == SUBREG)
1125 /* The only time this should occur is when we are looking at a
1126 multi-word item with a SUBREG whose mode is the same as that of the
1127 item. It isn't clear what we would do if it wasn't. */
1128 if (SUBREG_WORD (x) != 0)
1130 return gen_highpart (mode, SUBREG_REG (x));
1132 else if (GET_CODE (x) == REG)
1136 /* Let the backend decide how many registers to skip. This is needed
1137 in particular for sparc64 where fp regs are smaller than a word. */
1138 /* ??? Note that subregs are now ambiguous, in that those against
1139 pseudos are sized by the word size, while those against hard
1140 regs are sized by the underlying register size. Better would be
1141 to always interpret the subreg offset parameter as bytes or bits. */
1143 if (WORDS_BIG_ENDIAN)
1145 else if (REGNO (x) < FIRST_PSEUDO_REGISTER)
1146 word = (HARD_REGNO_NREGS (REGNO (x), GET_MODE (x))
1147 - HARD_REGNO_NREGS (REGNO (x), mode));
1149 word = ((GET_MODE_SIZE (GET_MODE (x))
1150 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
1153 if (REGNO (x) < FIRST_PSEUDO_REGISTER
1154 /* integrate.c can't handle parts of a return value register. */
1155 && (! REG_FUNCTION_VALUE_P (x)
1156 || ! rtx_equal_function_value_matters)
1157 /* We want to keep the stack, frame, and arg pointers special. */
1158 && x != frame_pointer_rtx
1159 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1160 && x != arg_pointer_rtx
1162 && x != stack_pointer_rtx)
1163 return gen_rtx_REG (mode, REGNO (x) + word);
1165 return gen_rtx_SUBREG (mode, x, word);
1171 /* Return 1 iff X, assumed to be a SUBREG,
1172 refers to the least significant part of its containing reg.
1173 If X is not a SUBREG, always return 1 (it is its own low part!). */
1176 subreg_lowpart_p (x)
1179 if (GET_CODE (x) != SUBREG)
1181 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1184 if (WORDS_BIG_ENDIAN
1185 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) > UNITS_PER_WORD)
1186 return (SUBREG_WORD (x)
1187 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))
1188 - MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD))
1191 return SUBREG_WORD (x) == 0;
1194 /* Return subword I of operand OP.
1195 The word number, I, is interpreted as the word number starting at the
1196 low-order address. Word 0 is the low-order word if not WORDS_BIG_ENDIAN,
1197 otherwise it is the high-order word.
1199 If we cannot extract the required word, we return zero. Otherwise, an
1200 rtx corresponding to the requested word will be returned.
1202 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1203 reload has completed, a valid address will always be returned. After
1204 reload, if a valid address cannot be returned, we return zero.
1206 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1207 it is the responsibility of the caller.
1209 MODE is the mode of OP in case it is a CONST_INT. */
1212 operand_subword (op, i, validate_address, mode)
1215 int validate_address;
1216 enum machine_mode mode;
1219 int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD;
1221 if (mode == VOIDmode)
1222 mode = GET_MODE (op);
1224 if (mode == VOIDmode)
1227 /* If OP is narrower than a word, fail. */
1229 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1232 /* If we want a word outside OP, return zero. */
1234 && (i + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1237 /* If OP is already an integer word, return it. */
1238 if (GET_MODE_CLASS (mode) == MODE_INT
1239 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
1242 /* If OP is a REG or SUBREG, we can handle it very simply. */
1243 if (GET_CODE (op) == REG)
1245 /* ??? There is a potential problem with this code. It does not
1246 properly handle extractions of a subword from a hard register
1247 that is larger than word_mode. Presumably the check for
1248 HARD_REGNO_MODE_OK catches these most of these cases. */
1250 /* If OP is a hard register, but OP + I is not a hard register,
1251 then extracting a subword is impossible.
1253 For example, consider if OP is the last hard register and it is
1254 larger than word_mode. If we wanted word N (for N > 0) because a
1255 part of that hard register was known to contain a useful value,
1256 then OP + I would refer to a pseudo, not the hard register we
1258 if (REGNO (op) < FIRST_PSEUDO_REGISTER
1259 && REGNO (op) + i >= FIRST_PSEUDO_REGISTER)
1262 /* If the register is not valid for MODE, return 0. Note we
1263 have to check both OP and OP + I since they may refer to
1264 different parts of the register file.
1266 Consider if OP refers to the last 96bit FP register and we want
1267 subword 3 because that subword is known to contain a value we
1269 if (REGNO (op) < FIRST_PSEUDO_REGISTER
1270 && (! HARD_REGNO_MODE_OK (REGNO (op), word_mode)
1271 || ! HARD_REGNO_MODE_OK (REGNO (op) + i, word_mode)))
1273 else if (REGNO (op) >= FIRST_PSEUDO_REGISTER
1274 || (REG_FUNCTION_VALUE_P (op)
1275 && rtx_equal_function_value_matters)
1276 /* We want to keep the stack, frame, and arg pointers
1278 || op == frame_pointer_rtx
1279 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1280 || op == arg_pointer_rtx
1282 || op == stack_pointer_rtx)
1283 return gen_rtx_SUBREG (word_mode, op, i);
1285 return gen_rtx_REG (word_mode, REGNO (op) + i);
1287 else if (GET_CODE (op) == SUBREG)
1288 return gen_rtx_SUBREG (word_mode, SUBREG_REG (op), i + SUBREG_WORD (op));
1289 else if (GET_CODE (op) == CONCAT)
1291 unsigned int partwords
1292 = GET_MODE_UNIT_SIZE (GET_MODE (op)) / UNITS_PER_WORD;
1295 return operand_subword (XEXP (op, 0), i, validate_address, mode);
1296 return operand_subword (XEXP (op, 1), i - partwords,
1297 validate_address, mode);
1300 /* Form a new MEM at the requested address. */
1301 if (GET_CODE (op) == MEM)
1303 rtx addr = plus_constant (XEXP (op, 0), i * UNITS_PER_WORD);
1306 if (validate_address)
1308 if (reload_completed)
1310 if (! strict_memory_address_p (word_mode, addr))
1314 addr = memory_address (word_mode, addr);
1317 new = gen_rtx_MEM (word_mode, addr);
1318 MEM_COPY_ATTRIBUTES (new, op);
1322 /* The only remaining cases are when OP is a constant. If the host and
1323 target floating formats are the same, handling two-word floating
1324 constants are easy. Note that REAL_VALUE_TO_TARGET_{SINGLE,DOUBLE}
1325 are defined as returning one or two 32 bit values, respectively,
1326 and not values of BITS_PER_WORD bits. */
1327 #ifdef REAL_ARITHMETIC
1328 /* The output is some bits, the width of the target machine's word.
1329 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1331 if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1332 && GET_MODE_CLASS (mode) == MODE_FLOAT
1333 && GET_MODE_BITSIZE (mode) == 64
1334 && GET_CODE (op) == CONST_DOUBLE)
1339 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1340 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
1342 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1343 which the words are written depends on the word endianness.
1344 ??? This is a potential portability problem and should
1345 be fixed at some point.
1347 We must excercise caution with the sign bit. By definition there
1348 are 32 significant bits in K; there may be more in a HOST_WIDE_INT.
1349 Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT.
1350 So we explicitly mask and sign-extend as necessary. */
1351 if (BITS_PER_WORD == 32)
1354 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1355 return GEN_INT (val);
1357 #if HOST_BITS_PER_WIDE_INT >= 64
1358 else if (BITS_PER_WORD >= 64 && i == 0)
1360 val = k[! WORDS_BIG_ENDIAN];
1361 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1362 val |= (HOST_WIDE_INT) k[WORDS_BIG_ENDIAN] & 0xffffffff;
1363 return GEN_INT (val);
1366 else if (BITS_PER_WORD == 16)
1369 if ((i & 1) == !WORDS_BIG_ENDIAN)
1372 return GEN_INT (val);
1377 else if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1378 && GET_MODE_CLASS (mode) == MODE_FLOAT
1379 && GET_MODE_BITSIZE (mode) > 64
1380 && GET_CODE (op) == CONST_DOUBLE)
1385 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1386 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k);
1388 if (BITS_PER_WORD == 32)
1391 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1392 return GEN_INT (val);
1394 #if HOST_BITS_PER_WIDE_INT >= 64
1395 else if (BITS_PER_WORD >= 64 && i <= 1)
1397 val = k[i*2 + ! WORDS_BIG_ENDIAN];
1398 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1399 val |= (HOST_WIDE_INT) k[i*2 + WORDS_BIG_ENDIAN] & 0xffffffff;
1400 return GEN_INT (val);
1406 #else /* no REAL_ARITHMETIC */
1407 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1408 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1409 || flag_pretend_float)
1410 && GET_MODE_CLASS (mode) == MODE_FLOAT
1411 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
1412 && GET_CODE (op) == CONST_DOUBLE)
1414 /* The constant is stored in the host's word-ordering,
1415 but we want to access it in the target's word-ordering. Some
1416 compilers don't like a conditional inside macro args, so we have two
1417 copies of the return. */
1418 #ifdef HOST_WORDS_BIG_ENDIAN
1419 return GEN_INT (i == WORDS_BIG_ENDIAN
1420 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1422 return GEN_INT (i != WORDS_BIG_ENDIAN
1423 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1426 #endif /* no REAL_ARITHMETIC */
1428 /* Single word float is a little harder, since single- and double-word
1429 values often do not have the same high-order bits. We have already
1430 verified that we want the only defined word of the single-word value. */
1431 #ifdef REAL_ARITHMETIC
1432 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1433 && GET_MODE_BITSIZE (mode) == 32
1434 && GET_CODE (op) == CONST_DOUBLE)
1439 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1440 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
1442 /* Sign extend from known 32-bit value to HOST_WIDE_INT. */
1444 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1446 if (BITS_PER_WORD == 16)
1448 if ((i & 1) == !WORDS_BIG_ENDIAN)
1453 return GEN_INT (val);
1456 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1457 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1458 || flag_pretend_float)
1459 && sizeof (float) * 8 == HOST_BITS_PER_WIDE_INT
1460 && GET_MODE_CLASS (mode) == MODE_FLOAT
1461 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1462 && GET_CODE (op) == CONST_DOUBLE)
1465 union {float f; HOST_WIDE_INT i; } u;
1467 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1470 return GEN_INT (u.i);
1472 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1473 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1474 || flag_pretend_float)
1475 && sizeof (double) * 8 == HOST_BITS_PER_WIDE_INT
1476 && GET_MODE_CLASS (mode) == MODE_FLOAT
1477 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1478 && GET_CODE (op) == CONST_DOUBLE)
1481 union {double d; HOST_WIDE_INT i; } u;
1483 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1486 return GEN_INT (u.i);
1488 #endif /* no REAL_ARITHMETIC */
1490 /* The only remaining cases that we can handle are integers.
1491 Convert to proper endianness now since these cases need it.
1492 At this point, i == 0 means the low-order word.
1494 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1495 in general. However, if OP is (const_int 0), we can just return
1498 if (op == const0_rtx)
1501 if (GET_MODE_CLASS (mode) != MODE_INT
1502 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE)
1503 || BITS_PER_WORD > HOST_BITS_PER_WIDE_INT)
1506 if (WORDS_BIG_ENDIAN)
1507 i = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - i;
1509 /* Find out which word on the host machine this value is in and get
1510 it from the constant. */
1511 val = (i / size_ratio == 0
1512 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
1513 : (GET_CODE (op) == CONST_INT
1514 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
1516 /* Get the value we want into the low bits of val. */
1517 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT)
1518 val = ((val >> ((i % size_ratio) * BITS_PER_WORD)));
1520 val = trunc_int_for_mode (val, word_mode);
1522 return GEN_INT (val);
1525 /* Similar to `operand_subword', but never return 0. If we can't extract
1526 the required subword, put OP into a register and try again. If that fails,
1527 abort. We always validate the address in this case. It is not valid
1528 to call this function after reload; it is mostly meant for RTL
1531 MODE is the mode of OP, in case it is CONST_INT. */
1534 operand_subword_force (op, i, mode)
1537 enum machine_mode mode;
1539 rtx result = operand_subword (op, i, 1, mode);
1544 if (mode != BLKmode && mode != VOIDmode)
1546 /* If this is a register which can not be accessed by words, copy it
1547 to a pseudo register. */
1548 if (GET_CODE (op) == REG)
1549 op = copy_to_reg (op);
1551 op = force_reg (mode, op);
1554 result = operand_subword (op, i, 1, mode);
1561 /* Given a compare instruction, swap the operands.
1562 A test instruction is changed into a compare of 0 against the operand. */
1565 reverse_comparison (insn)
1568 rtx body = PATTERN (insn);
1571 if (GET_CODE (body) == SET)
1572 comp = SET_SRC (body);
1574 comp = SET_SRC (XVECEXP (body, 0, 0));
1576 if (GET_CODE (comp) == COMPARE)
1578 rtx op0 = XEXP (comp, 0);
1579 rtx op1 = XEXP (comp, 1);
1580 XEXP (comp, 0) = op1;
1581 XEXP (comp, 1) = op0;
1585 rtx new = gen_rtx_COMPARE (VOIDmode,
1586 CONST0_RTX (GET_MODE (comp)), comp);
1587 if (GET_CODE (body) == SET)
1588 SET_SRC (body) = new;
1590 SET_SRC (XVECEXP (body, 0, 0)) = new;
1594 /* Return a memory reference like MEMREF, but with its mode changed
1595 to MODE and its address changed to ADDR.
1596 (VOIDmode means don't change the mode.
1597 NULL for ADDR means don't change the address.) */
1600 change_address (memref, mode, addr)
1602 enum machine_mode mode;
1607 if (GET_CODE (memref) != MEM)
1609 if (mode == VOIDmode)
1610 mode = GET_MODE (memref);
1612 addr = XEXP (memref, 0);
1614 /* If reload is in progress or has completed, ADDR must be valid.
1615 Otherwise, we can call memory_address to make it valid. */
1616 if (reload_completed || reload_in_progress)
1618 if (! memory_address_p (mode, addr))
1622 addr = memory_address (mode, addr);
1624 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1627 new = gen_rtx_MEM (mode, addr);
1628 MEM_COPY_ATTRIBUTES (new, memref);
1632 /* Return a newly created CODE_LABEL rtx with a unique label number. */
1639 label = gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX,
1640 NULL_RTX, label_num++, NULL_PTR, NULL_PTR);
1642 LABEL_NUSES (label) = 0;
1643 LABEL_ALTERNATE_NAME (label) = NULL;
1647 /* For procedure integration. */
1649 /* Install new pointers to the first and last insns in the chain.
1650 Also, set cur_insn_uid to one higher than the last in use.
1651 Used for an inline-procedure after copying the insn chain. */
1654 set_new_first_and_last_insn (first, last)
1663 for (insn = first; insn; insn = NEXT_INSN (insn))
1664 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
1669 /* Set the range of label numbers found in the current function.
1670 This is used when belatedly compiling an inline function. */
1673 set_new_first_and_last_label_num (first, last)
1676 base_label_num = label_num;
1677 first_label_num = first;
1678 last_label_num = last;
1681 /* Set the last label number found in the current function.
1682 This is used when belatedly compiling an inline function. */
1685 set_new_last_label_num (last)
1688 base_label_num = label_num;
1689 last_label_num = last;
1692 /* Restore all variables describing the current status from the structure *P.
1693 This is used after a nested function. */
1696 restore_emit_status (p)
1697 struct function *p ATTRIBUTE_UNUSED;
1700 clear_emit_caches ();
1703 /* Clear out all parts of the state in F that can safely be discarded
1704 after the function has been compiled, to let garbage collection
1705 reclaim the memory. */
1708 free_emit_status (f)
1711 free (f->emit->x_regno_reg_rtx);
1712 free (f->emit->regno_pointer_flag);
1713 free (f->emit->regno_pointer_align);
1718 /* Go through all the RTL insn bodies and copy any invalid shared
1719 structure. This routine should only be called once. */
1722 unshare_all_rtl (fndecl, insn)
1728 /* Make sure that virtual parameters are not shared. */
1729 for (decl = DECL_ARGUMENTS (fndecl); decl; decl = TREE_CHAIN (decl))
1730 DECL_RTL (decl) = copy_rtx_if_shared (DECL_RTL (decl));
1732 /* Make sure that virtual stack slots are not shared. */
1733 unshare_all_decls (DECL_INITIAL (fndecl));
1735 /* Unshare just about everything else. */
1736 unshare_all_rtl_1 (insn);
1738 /* Make sure the addresses of stack slots found outside the insn chain
1739 (such as, in DECL_RTL of a variable) are not shared
1740 with the insn chain.
1742 This special care is necessary when the stack slot MEM does not
1743 actually appear in the insn chain. If it does appear, its address
1744 is unshared from all else at that point. */
1745 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
1748 /* Go through all the RTL insn bodies and copy any invalid shared
1749 structure, again. This is a fairly expensive thing to do so it
1750 should be done sparingly. */
1753 unshare_all_rtl_again (insn)
1759 for (p = insn; p; p = NEXT_INSN (p))
1760 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
1762 reset_used_flags (PATTERN (p));
1763 reset_used_flags (REG_NOTES (p));
1764 reset_used_flags (LOG_LINKS (p));
1767 /* Make sure that virtual stack slots are not shared. */
1768 reset_used_decls (DECL_INITIAL (cfun->decl));
1770 /* Make sure that virtual parameters are not shared. */
1771 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
1772 reset_used_flags (DECL_RTL (decl));
1774 reset_used_flags (stack_slot_list);
1776 unshare_all_rtl (cfun->decl, insn);
1779 /* Go through all the RTL insn bodies and copy any invalid shared structure.
1780 Assumes the mark bits are cleared at entry. */
1783 unshare_all_rtl_1 (insn)
1786 for (; insn; insn = NEXT_INSN (insn))
1787 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
1789 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
1790 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
1791 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
1795 /* Go through all virtual stack slots of a function and copy any
1796 shared structure. */
1798 unshare_all_decls (blk)
1803 /* Copy shared decls. */
1804 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
1805 DECL_RTL (t) = copy_rtx_if_shared (DECL_RTL (t));
1807 /* Now process sub-blocks. */
1808 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
1809 unshare_all_decls (t);
1812 /* Go through all virtual stack slots of a function and mark them as
1815 reset_used_decls (blk)
1821 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
1822 reset_used_flags (DECL_RTL (t));
1824 /* Now process sub-blocks. */
1825 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
1826 reset_used_decls (t);
1829 /* Mark ORIG as in use, and return a copy of it if it was already in use.
1830 Recursively does the same for subexpressions. */
1833 copy_rtx_if_shared (orig)
1836 register rtx x = orig;
1838 register enum rtx_code code;
1839 register const char *format_ptr;
1845 code = GET_CODE (x);
1847 /* These types may be freely shared. */
1860 /* SCRATCH must be shared because they represent distinct values. */
1864 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
1865 a LABEL_REF, it isn't sharable. */
1866 if (GET_CODE (XEXP (x, 0)) == PLUS
1867 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
1868 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
1877 /* The chain of insns is not being copied. */
1881 /* A MEM is allowed to be shared if its address is constant.
1883 We used to allow sharing of MEMs which referenced
1884 virtual_stack_vars_rtx or virtual_incoming_args_rtx, but
1885 that can lose. instantiate_virtual_regs will not unshare
1886 the MEMs, and combine may change the structure of the address
1887 because it looks safe and profitable in one context, but
1888 in some other context it creates unrecognizable RTL. */
1889 if (CONSTANT_ADDRESS_P (XEXP (x, 0)))
1898 /* This rtx may not be shared. If it has already been seen,
1899 replace it with a copy of itself. */
1905 copy = rtx_alloc (code);
1906 bcopy ((char *) x, (char *) copy,
1907 (sizeof (*copy) - sizeof (copy->fld)
1908 + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code)));
1914 /* Now scan the subexpressions recursively.
1915 We can store any replaced subexpressions directly into X
1916 since we know X is not shared! Any vectors in X
1917 must be copied if X was copied. */
1919 format_ptr = GET_RTX_FORMAT (code);
1921 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1923 switch (*format_ptr++)
1926 XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
1930 if (XVEC (x, i) != NULL)
1933 int len = XVECLEN (x, i);
1935 if (copied && len > 0)
1936 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
1937 for (j = 0; j < len; j++)
1938 XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j));
1946 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
1947 to look for shared sub-parts. */
1950 reset_used_flags (x)
1954 register enum rtx_code code;
1955 register const char *format_ptr;
1960 code = GET_CODE (x);
1962 /* These types may be freely shared so we needn't do any resetting
1983 /* The chain of insns is not being copied. */
1992 format_ptr = GET_RTX_FORMAT (code);
1993 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1995 switch (*format_ptr++)
1998 reset_used_flags (XEXP (x, i));
2002 for (j = 0; j < XVECLEN (x, i); j++)
2003 reset_used_flags (XVECEXP (x, i, j));
2009 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2010 Return X or the rtx for the pseudo reg the value of X was copied into.
2011 OTHER must be valid as a SET_DEST. */
2014 make_safe_from (x, other)
2018 switch (GET_CODE (other))
2021 other = SUBREG_REG (other);
2023 case STRICT_LOW_PART:
2026 other = XEXP (other, 0);
2032 if ((GET_CODE (other) == MEM
2034 && GET_CODE (x) != REG
2035 && GET_CODE (x) != SUBREG)
2036 || (GET_CODE (other) == REG
2037 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2038 || reg_mentioned_p (other, x))))
2040 rtx temp = gen_reg_rtx (GET_MODE (x));
2041 emit_move_insn (temp, x);
2047 /* Emission of insns (adding them to the doubly-linked list). */
2049 /* Return the first insn of the current sequence or current function. */
2057 /* Return the last insn emitted in current sequence or current function. */
2065 /* Specify a new insn as the last in the chain. */
2068 set_last_insn (insn)
2071 if (NEXT_INSN (insn) != 0)
2076 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2079 get_last_insn_anywhere ()
2081 struct sequence_stack *stack;
2084 for (stack = seq_stack; stack; stack = stack->next)
2085 if (stack->last != 0)
2090 /* Return a number larger than any instruction's uid in this function. */
2095 return cur_insn_uid;
2098 /* Renumber instructions so that no instruction UIDs are wasted. */
2101 renumber_insns (stream)
2106 /* If we're not supposed to renumber instructions, don't. */
2107 if (!flag_renumber_insns)
2110 /* If there aren't that many instructions, then it's not really
2111 worth renumbering them. */
2112 if (flag_renumber_insns == 1 && get_max_uid () < 25000)
2117 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
2120 fprintf (stream, "Renumbering insn %d to %d\n",
2121 INSN_UID (insn), cur_insn_uid);
2122 INSN_UID (insn) = cur_insn_uid++;
2126 /* Return the next insn. If it is a SEQUENCE, return the first insn
2135 insn = NEXT_INSN (insn);
2136 if (insn && GET_CODE (insn) == INSN
2137 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2138 insn = XVECEXP (PATTERN (insn), 0, 0);
2144 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2148 previous_insn (insn)
2153 insn = PREV_INSN (insn);
2154 if (insn && GET_CODE (insn) == INSN
2155 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2156 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
2162 /* Return the next insn after INSN that is not a NOTE. This routine does not
2163 look inside SEQUENCEs. */
2166 next_nonnote_insn (insn)
2171 insn = NEXT_INSN (insn);
2172 if (insn == 0 || GET_CODE (insn) != NOTE)
2179 /* Return the previous insn before INSN that is not a NOTE. This routine does
2180 not look inside SEQUENCEs. */
2183 prev_nonnote_insn (insn)
2188 insn = PREV_INSN (insn);
2189 if (insn == 0 || GET_CODE (insn) != NOTE)
2196 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2197 or 0, if there is none. This routine does not look inside
2201 next_real_insn (insn)
2206 insn = NEXT_INSN (insn);
2207 if (insn == 0 || GET_CODE (insn) == INSN
2208 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
2215 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2216 or 0, if there is none. This routine does not look inside
2220 prev_real_insn (insn)
2225 insn = PREV_INSN (insn);
2226 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
2227 || GET_CODE (insn) == JUMP_INSN)
2234 /* Find the next insn after INSN that really does something. This routine
2235 does not look inside SEQUENCEs. Until reload has completed, this is the
2236 same as next_real_insn. */
2239 active_insn_p (insn)
2242 return (GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
2243 || (GET_CODE (insn) == INSN
2244 && (! reload_completed
2245 || (GET_CODE (PATTERN (insn)) != USE
2246 && GET_CODE (PATTERN (insn)) != CLOBBER))));
2250 next_active_insn (insn)
2255 insn = NEXT_INSN (insn);
2256 if (insn == 0 || active_insn_p (insn))
2263 /* Find the last insn before INSN that really does something. This routine
2264 does not look inside SEQUENCEs. Until reload has completed, this is the
2265 same as prev_real_insn. */
2268 prev_active_insn (insn)
2273 insn = PREV_INSN (insn);
2274 if (insn == 0 || active_insn_p (insn))
2281 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2289 insn = NEXT_INSN (insn);
2290 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2297 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
2305 insn = PREV_INSN (insn);
2306 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2314 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
2315 and REG_CC_USER notes so we can find it. */
2318 link_cc0_insns (insn)
2321 rtx user = next_nonnote_insn (insn);
2323 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
2324 user = XVECEXP (PATTERN (user), 0, 0);
2326 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn,
2328 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
2331 /* Return the next insn that uses CC0 after INSN, which is assumed to
2332 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
2333 applied to the result of this function should yield INSN).
2335 Normally, this is simply the next insn. However, if a REG_CC_USER note
2336 is present, it contains the insn that uses CC0.
2338 Return 0 if we can't find the insn. */
2341 next_cc0_user (insn)
2344 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
2347 return XEXP (note, 0);
2349 insn = next_nonnote_insn (insn);
2350 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
2351 insn = XVECEXP (PATTERN (insn), 0, 0);
2353 if (insn && GET_RTX_CLASS (GET_CODE (insn)) == 'i'
2354 && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
2360 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
2361 note, it is the previous insn. */
2364 prev_cc0_setter (insn)
2367 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2370 return XEXP (note, 0);
2372 insn = prev_nonnote_insn (insn);
2373 if (! sets_cc0_p (PATTERN (insn)))
2380 /* Try splitting insns that can be split for better scheduling.
2381 PAT is the pattern which might split.
2382 TRIAL is the insn providing PAT.
2383 LAST is non-zero if we should return the last insn of the sequence produced.
2385 If this routine succeeds in splitting, it returns the first or last
2386 replacement insn depending on the value of LAST. Otherwise, it
2387 returns TRIAL. If the insn to be returned can be split, it will be. */
2390 try_split (pat, trial, last)
2394 rtx before = PREV_INSN (trial);
2395 rtx after = NEXT_INSN (trial);
2396 rtx seq = split_insns (pat, trial);
2397 int has_barrier = 0;
2400 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
2401 We may need to handle this specially. */
2402 if (after && GET_CODE (after) == BARRIER)
2405 after = NEXT_INSN (after);
2410 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
2411 The latter case will normally arise only when being done so that
2412 it, in turn, will be split (SFmode on the 29k is an example). */
2413 if (GET_CODE (seq) == SEQUENCE)
2417 /* Avoid infinite loop if any insn of the result matches
2418 the original pattern. */
2419 for (i = 0; i < XVECLEN (seq, 0); i++)
2420 if (GET_CODE (XVECEXP (seq, 0, i)) == INSN
2421 && rtx_equal_p (PATTERN (XVECEXP (seq, 0, i)), pat))
2424 /* If we are splitting a JUMP_INSN, look for the JUMP_INSN in
2425 SEQ and copy our JUMP_LABEL to it. If JUMP_LABEL is non-zero,
2426 increment the usage count so we don't delete the label. */
2428 if (GET_CODE (trial) == JUMP_INSN)
2429 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2430 if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN)
2432 JUMP_LABEL (XVECEXP (seq, 0, i)) = JUMP_LABEL (trial);
2434 if (JUMP_LABEL (trial))
2435 LABEL_NUSES (JUMP_LABEL (trial))++;
2438 tem = emit_insn_after (seq, before);
2440 delete_insn (trial);
2442 emit_barrier_after (tem);
2444 /* Recursively call try_split for each new insn created; by the
2445 time control returns here that insn will be fully split, so
2446 set LAST and continue from the insn after the one returned.
2447 We can't use next_active_insn here since AFTER may be a note.
2448 Ignore deleted insns, which can be occur if not optimizing. */
2449 for (tem = NEXT_INSN (before); tem != after;
2450 tem = NEXT_INSN (tem))
2451 if (! INSN_DELETED_P (tem)
2452 && GET_RTX_CLASS (GET_CODE (tem)) == 'i')
2453 tem = try_split (PATTERN (tem), tem, 1);
2455 /* Avoid infinite loop if the result matches the original pattern. */
2456 else if (rtx_equal_p (seq, pat))
2460 PATTERN (trial) = seq;
2461 INSN_CODE (trial) = -1;
2462 try_split (seq, trial, last);
2465 /* Return either the first or the last insn, depending on which was
2468 ? (after ? prev_active_insn (after) : last_insn)
2469 : next_active_insn (before);
2475 /* Make and return an INSN rtx, initializing all its slots.
2476 Store PATTERN in the pattern slots. */
2479 make_insn_raw (pattern)
2484 /* If in RTL generation phase, see if FREE_INSN can be used. */
2485 if (!ggc_p && free_insn != 0 && rtx_equal_function_value_matters)
2488 free_insn = NEXT_INSN (free_insn);
2489 PUT_CODE (insn, INSN);
2492 insn = rtx_alloc (INSN);
2494 INSN_UID (insn) = cur_insn_uid++;
2495 PATTERN (insn) = pattern;
2496 INSN_CODE (insn) = -1;
2497 LOG_LINKS (insn) = NULL;
2498 REG_NOTES (insn) = NULL;
2500 #ifdef ENABLE_RTL_CHECKING
2502 && GET_RTX_CLASS (GET_CODE (insn)) == 'i'
2503 && (returnjump_p (insn)
2504 || (GET_CODE (insn) == SET
2505 && SET_DEST (insn) == pc_rtx)))
2507 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
2515 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
2518 make_jump_insn_raw (pattern)
2523 insn = rtx_alloc (JUMP_INSN);
2524 INSN_UID (insn) = cur_insn_uid++;
2526 PATTERN (insn) = pattern;
2527 INSN_CODE (insn) = -1;
2528 LOG_LINKS (insn) = NULL;
2529 REG_NOTES (insn) = NULL;
2530 JUMP_LABEL (insn) = NULL;
2535 /* Like `make_insn' but make a CALL_INSN instead of an insn. */
2538 make_call_insn_raw (pattern)
2543 insn = rtx_alloc (CALL_INSN);
2544 INSN_UID (insn) = cur_insn_uid++;
2546 PATTERN (insn) = pattern;
2547 INSN_CODE (insn) = -1;
2548 LOG_LINKS (insn) = NULL;
2549 REG_NOTES (insn) = NULL;
2550 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
2555 /* Add INSN to the end of the doubly-linked list.
2556 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
2562 PREV_INSN (insn) = last_insn;
2563 NEXT_INSN (insn) = 0;
2565 if (NULL != last_insn)
2566 NEXT_INSN (last_insn) = insn;
2568 if (NULL == first_insn)
2574 /* Add INSN into the doubly-linked list after insn AFTER. This and
2575 the next should be the only functions called to insert an insn once
2576 delay slots have been filled since only they know how to update a
2580 add_insn_after (insn, after)
2583 rtx next = NEXT_INSN (after);
2585 if (optimize && INSN_DELETED_P (after))
2588 NEXT_INSN (insn) = next;
2589 PREV_INSN (insn) = after;
2593 PREV_INSN (next) = insn;
2594 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
2595 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
2597 else if (last_insn == after)
2601 struct sequence_stack *stack = seq_stack;
2602 /* Scan all pending sequences too. */
2603 for (; stack; stack = stack->next)
2604 if (after == stack->last)
2614 NEXT_INSN (after) = insn;
2615 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
2617 rtx sequence = PATTERN (after);
2618 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2622 /* Add INSN into the doubly-linked list before insn BEFORE. This and
2623 the previous should be the only functions called to insert an insn once
2624 delay slots have been filled since only they know how to update a
2628 add_insn_before (insn, before)
2631 rtx prev = PREV_INSN (before);
2633 if (optimize && INSN_DELETED_P (before))
2636 PREV_INSN (insn) = prev;
2637 NEXT_INSN (insn) = before;
2641 NEXT_INSN (prev) = insn;
2642 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
2644 rtx sequence = PATTERN (prev);
2645 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2648 else if (first_insn == before)
2652 struct sequence_stack *stack = seq_stack;
2653 /* Scan all pending sequences too. */
2654 for (; stack; stack = stack->next)
2655 if (before == stack->first)
2657 stack->first = insn;
2665 PREV_INSN (before) = insn;
2666 if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE)
2667 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
2670 /* Remove an insn from its doubly-linked list. This function knows how
2671 to handle sequences. */
2676 rtx next = NEXT_INSN (insn);
2677 rtx prev = PREV_INSN (insn);
2680 NEXT_INSN (prev) = next;
2681 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
2683 rtx sequence = PATTERN (prev);
2684 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
2687 else if (first_insn == insn)
2691 struct sequence_stack *stack = seq_stack;
2692 /* Scan all pending sequences too. */
2693 for (; stack; stack = stack->next)
2694 if (insn == stack->first)
2696 stack->first = next;
2706 PREV_INSN (next) = prev;
2707 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
2708 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
2710 else if (last_insn == insn)
2714 struct sequence_stack *stack = seq_stack;
2715 /* Scan all pending sequences too. */
2716 for (; stack; stack = stack->next)
2717 if (insn == stack->last)
2728 /* Delete all insns made since FROM.
2729 FROM becomes the new last instruction. */
2732 delete_insns_since (from)
2738 NEXT_INSN (from) = 0;
2742 /* This function is deprecated, please use sequences instead.
2744 Move a consecutive bunch of insns to a different place in the chain.
2745 The insns to be moved are those between FROM and TO.
2746 They are moved to a new position after the insn AFTER.
2747 AFTER must not be FROM or TO or any insn in between.
2749 This function does not know about SEQUENCEs and hence should not be
2750 called after delay-slot filling has been done. */
2753 reorder_insns (from, to, after)
2754 rtx from, to, after;
2756 /* Splice this bunch out of where it is now. */
2757 if (PREV_INSN (from))
2758 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
2760 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
2761 if (last_insn == to)
2762 last_insn = PREV_INSN (from);
2763 if (first_insn == from)
2764 first_insn = NEXT_INSN (to);
2766 /* Make the new neighbors point to it and it to them. */
2767 if (NEXT_INSN (after))
2768 PREV_INSN (NEXT_INSN (after)) = to;
2770 NEXT_INSN (to) = NEXT_INSN (after);
2771 PREV_INSN (from) = after;
2772 NEXT_INSN (after) = from;
2773 if (after == last_insn)
2777 /* Return the line note insn preceding INSN. */
2780 find_line_note (insn)
2783 if (no_line_numbers)
2786 for (; insn; insn = PREV_INSN (insn))
2787 if (GET_CODE (insn) == NOTE
2788 && NOTE_LINE_NUMBER (insn) >= 0)
2794 /* Like reorder_insns, but inserts line notes to preserve the line numbers
2795 of the moved insns when debugging. This may insert a note between AFTER
2796 and FROM, and another one after TO. */
2799 reorder_insns_with_line_notes (from, to, after)
2800 rtx from, to, after;
2802 rtx from_line = find_line_note (from);
2803 rtx after_line = find_line_note (after);
2805 reorder_insns (from, to, after);
2807 if (from_line == after_line)
2811 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
2812 NOTE_LINE_NUMBER (from_line),
2815 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
2816 NOTE_LINE_NUMBER (after_line),
2820 /* Remove unnecessary notes from the instruction stream. */
2823 remove_unnecessary_notes ()
2828 /* We must not remove the first instruction in the function because
2829 the compiler depends on the first instruction being a note. */
2830 for (insn = NEXT_INSN (get_insns ()); insn; insn = next)
2832 /* Remember what's next. */
2833 next = NEXT_INSN (insn);
2835 /* We're only interested in notes. */
2836 if (GET_CODE (insn) != NOTE)
2839 /* By now, all notes indicating lexical blocks should have
2840 NOTE_BLOCK filled in. */
2841 if ((NOTE_LINE_NUMBER (insn) == NOTE_INSN_BLOCK_BEG
2842 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_BLOCK_END)
2843 && NOTE_BLOCK (insn) == NULL_TREE)
2846 /* Remove NOTE_INSN_DELETED notes. */
2847 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_DELETED)
2849 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_BLOCK_END)
2851 /* Scan back to see if there are any non-note instructions
2852 between INSN and the beginning of this block. If not,
2853 then there is no PC range in the generated code that will
2854 actually be in this block, so there's no point in
2855 remembering the existence of the block. */
2858 for (prev = PREV_INSN (insn); prev; prev = PREV_INSN (prev))
2860 /* This block contains a real instruction. Note that we
2861 don't include labels; if the only thing in the block
2862 is a label, then there are still no PC values that
2863 lie within the block. */
2864 if (GET_RTX_CLASS (GET_CODE (prev)) == 'i')
2867 /* We're only interested in NOTEs. */
2868 if (GET_CODE (prev) != NOTE)
2871 if (NOTE_LINE_NUMBER (prev) == NOTE_INSN_BLOCK_BEG)
2873 /* If the BLOCKs referred to by these notes don't
2874 match, then something is wrong with our BLOCK
2875 nesting structure. */
2876 if (NOTE_BLOCK (prev) != NOTE_BLOCK (insn))
2879 if (debug_ignore_block (NOTE_BLOCK (insn)))
2886 else if (NOTE_LINE_NUMBER (prev) == NOTE_INSN_BLOCK_END)
2887 /* There's a nested block. We need to leave the
2888 current block in place since otherwise the debugger
2889 wouldn't be able to show symbols from our block in
2890 the nested block. */
2898 /* Emit an insn of given code and pattern
2899 at a specified place within the doubly-linked list. */
2901 /* Make an instruction with body PATTERN
2902 and output it before the instruction BEFORE. */
2905 emit_insn_before (pattern, before)
2906 register rtx pattern, before;
2908 register rtx insn = before;
2910 if (GET_CODE (pattern) == SEQUENCE)
2914 for (i = 0; i < XVECLEN (pattern, 0); i++)
2916 insn = XVECEXP (pattern, 0, i);
2917 add_insn_before (insn, before);
2919 if (!ggc_p && XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2920 sequence_result[XVECLEN (pattern, 0)] = pattern;
2924 insn = make_insn_raw (pattern);
2925 add_insn_before (insn, before);
2931 /* Similar to emit_insn_before, but update basic block boundaries as well. */
2934 emit_block_insn_before (pattern, before, block)
2935 rtx pattern, before;
2938 rtx prev = PREV_INSN (before);
2939 rtx r = emit_insn_before (pattern, before);
2940 if (block && block->head == before)
2941 block->head = NEXT_INSN (prev);
2945 /* Make an instruction with body PATTERN and code JUMP_INSN
2946 and output it before the instruction BEFORE. */
2949 emit_jump_insn_before (pattern, before)
2950 register rtx pattern, before;
2954 if (GET_CODE (pattern) == SEQUENCE)
2955 insn = emit_insn_before (pattern, before);
2958 insn = make_jump_insn_raw (pattern);
2959 add_insn_before (insn, before);
2965 /* Make an instruction with body PATTERN and code CALL_INSN
2966 and output it before the instruction BEFORE. */
2969 emit_call_insn_before (pattern, before)
2970 register rtx pattern, before;
2974 if (GET_CODE (pattern) == SEQUENCE)
2975 insn = emit_insn_before (pattern, before);
2978 insn = make_call_insn_raw (pattern);
2979 add_insn_before (insn, before);
2980 PUT_CODE (insn, CALL_INSN);
2986 /* Make an insn of code BARRIER
2987 and output it before the insn BEFORE. */
2990 emit_barrier_before (before)
2991 register rtx before;
2993 register rtx insn = rtx_alloc (BARRIER);
2995 INSN_UID (insn) = cur_insn_uid++;
2997 add_insn_before (insn, before);
3001 /* Emit the label LABEL before the insn BEFORE. */
3004 emit_label_before (label, before)
3007 /* This can be called twice for the same label as a result of the
3008 confusion that follows a syntax error! So make it harmless. */
3009 if (INSN_UID (label) == 0)
3011 INSN_UID (label) = cur_insn_uid++;
3012 add_insn_before (label, before);
3018 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
3021 emit_note_before (subtype, before)
3025 register rtx note = rtx_alloc (NOTE);
3026 INSN_UID (note) = cur_insn_uid++;
3027 NOTE_SOURCE_FILE (note) = 0;
3028 NOTE_LINE_NUMBER (note) = subtype;
3030 add_insn_before (note, before);
3034 /* Make an insn of code INSN with body PATTERN
3035 and output it after the insn AFTER. */
3038 emit_insn_after (pattern, after)
3039 register rtx pattern, after;
3041 register rtx insn = after;
3043 if (GET_CODE (pattern) == SEQUENCE)
3047 for (i = 0; i < XVECLEN (pattern, 0); i++)
3049 insn = XVECEXP (pattern, 0, i);
3050 add_insn_after (insn, after);
3053 if (!ggc_p && XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
3054 sequence_result[XVECLEN (pattern, 0)] = pattern;
3058 insn = make_insn_raw (pattern);
3059 add_insn_after (insn, after);
3065 /* Similar to emit_insn_after, except that line notes are to be inserted so
3066 as to act as if this insn were at FROM. */
3069 emit_insn_after_with_line_notes (pattern, after, from)
3070 rtx pattern, after, from;
3072 rtx from_line = find_line_note (from);
3073 rtx after_line = find_line_note (after);
3074 rtx insn = emit_insn_after (pattern, after);
3077 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
3078 NOTE_LINE_NUMBER (from_line),
3082 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
3083 NOTE_LINE_NUMBER (after_line),
3087 /* Similar to emit_insn_after, but update basic block boundaries as well. */
3090 emit_block_insn_after (pattern, after, block)
3094 rtx r = emit_insn_after (pattern, after);
3095 if (block && block->end == after)
3100 /* Make an insn of code JUMP_INSN with body PATTERN
3101 and output it after the insn AFTER. */
3104 emit_jump_insn_after (pattern, after)
3105 register rtx pattern, after;
3109 if (GET_CODE (pattern) == SEQUENCE)
3110 insn = emit_insn_after (pattern, after);
3113 insn = make_jump_insn_raw (pattern);
3114 add_insn_after (insn, after);
3120 /* Make an insn of code BARRIER
3121 and output it after the insn AFTER. */
3124 emit_barrier_after (after)
3127 register rtx insn = rtx_alloc (BARRIER);
3129 INSN_UID (insn) = cur_insn_uid++;
3131 add_insn_after (insn, after);
3135 /* Emit the label LABEL after the insn AFTER. */
3138 emit_label_after (label, after)
3141 /* This can be called twice for the same label
3142 as a result of the confusion that follows a syntax error!
3143 So make it harmless. */
3144 if (INSN_UID (label) == 0)
3146 INSN_UID (label) = cur_insn_uid++;
3147 add_insn_after (label, after);
3153 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
3156 emit_note_after (subtype, after)
3160 register rtx note = rtx_alloc (NOTE);
3161 INSN_UID (note) = cur_insn_uid++;
3162 NOTE_SOURCE_FILE (note) = 0;
3163 NOTE_LINE_NUMBER (note) = subtype;
3164 add_insn_after (note, after);
3168 /* Emit a line note for FILE and LINE after the insn AFTER. */
3171 emit_line_note_after (file, line, after)
3178 if (no_line_numbers && line > 0)
3184 note = rtx_alloc (NOTE);
3185 INSN_UID (note) = cur_insn_uid++;
3186 NOTE_SOURCE_FILE (note) = file;
3187 NOTE_LINE_NUMBER (note) = line;
3188 add_insn_after (note, after);
3192 /* Make an insn of code INSN with pattern PATTERN
3193 and add it to the end of the doubly-linked list.
3194 If PATTERN is a SEQUENCE, take the elements of it
3195 and emit an insn for each element.
3197 Returns the last insn emitted. */
3203 rtx insn = last_insn;
3205 if (GET_CODE (pattern) == SEQUENCE)
3209 for (i = 0; i < XVECLEN (pattern, 0); i++)
3211 insn = XVECEXP (pattern, 0, i);
3214 if (!ggc_p && XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
3215 sequence_result[XVECLEN (pattern, 0)] = pattern;
3219 insn = make_insn_raw (pattern);
3226 /* Emit the insns in a chain starting with INSN.
3227 Return the last insn emitted. */
3237 rtx next = NEXT_INSN (insn);
3246 /* Emit the insns in a chain starting with INSN and place them in front of
3247 the insn BEFORE. Return the last insn emitted. */
3250 emit_insns_before (insn, before)
3258 rtx next = NEXT_INSN (insn);
3259 add_insn_before (insn, before);
3267 /* Emit the insns in a chain starting with FIRST and place them in back of
3268 the insn AFTER. Return the last insn emitted. */
3271 emit_insns_after (first, after)
3276 register rtx after_after;
3284 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
3287 after_after = NEXT_INSN (after);
3289 NEXT_INSN (after) = first;
3290 PREV_INSN (first) = after;
3291 NEXT_INSN (last) = after_after;
3293 PREV_INSN (after_after) = last;
3295 if (after == last_insn)
3300 /* Make an insn of code JUMP_INSN with pattern PATTERN
3301 and add it to the end of the doubly-linked list. */
3304 emit_jump_insn (pattern)
3307 if (GET_CODE (pattern) == SEQUENCE)
3308 return emit_insn (pattern);
3311 register rtx insn = make_jump_insn_raw (pattern);
3317 /* Make an insn of code CALL_INSN with pattern PATTERN
3318 and add it to the end of the doubly-linked list. */
3321 emit_call_insn (pattern)
3324 if (GET_CODE (pattern) == SEQUENCE)
3325 return emit_insn (pattern);
3328 register rtx insn = make_call_insn_raw (pattern);
3330 PUT_CODE (insn, CALL_INSN);
3335 /* Add the label LABEL to the end of the doubly-linked list. */
3341 /* This can be called twice for the same label
3342 as a result of the confusion that follows a syntax error!
3343 So make it harmless. */
3344 if (INSN_UID (label) == 0)
3346 INSN_UID (label) = cur_insn_uid++;
3352 /* Make an insn of code BARRIER
3353 and add it to the end of the doubly-linked list. */
3358 register rtx barrier = rtx_alloc (BARRIER);
3359 INSN_UID (barrier) = cur_insn_uid++;
3364 /* Make an insn of code NOTE
3365 with data-fields specified by FILE and LINE
3366 and add it to the end of the doubly-linked list,
3367 but only if line-numbers are desired for debugging info. */
3370 emit_line_note (file, line)
3374 set_file_and_line_for_stmt (file, line);
3377 if (no_line_numbers)
3381 return emit_note (file, line);
3384 /* Make an insn of code NOTE
3385 with data-fields specified by FILE and LINE
3386 and add it to the end of the doubly-linked list.
3387 If it is a line-number NOTE, omit it if it matches the previous one. */
3390 emit_note (file, line)
3398 if (file && last_filename && !strcmp (file, last_filename)
3399 && line == last_linenum)
3401 last_filename = file;
3402 last_linenum = line;
3405 if (no_line_numbers && line > 0)
3411 note = rtx_alloc (NOTE);
3412 INSN_UID (note) = cur_insn_uid++;
3413 NOTE_SOURCE_FILE (note) = file;
3414 NOTE_LINE_NUMBER (note) = line;
3419 /* Emit a NOTE, and don't omit it even if LINE is the previous note. */
3422 emit_line_note_force (file, line)
3427 return emit_line_note (file, line);
3430 /* Cause next statement to emit a line note even if the line number
3431 has not changed. This is used at the beginning of a function. */
3434 force_next_line_note ()
3439 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
3440 note of this type already exists, remove it first. */
3443 set_unique_reg_note (insn, kind, datum)
3448 rtx note = find_reg_note (insn, kind, NULL_RTX);
3450 /* First remove the note if there already is one. */
3452 remove_note (insn, note);
3454 REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn));
3457 /* Return an indication of which type of insn should have X as a body.
3458 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
3464 if (GET_CODE (x) == CODE_LABEL)
3466 if (GET_CODE (x) == CALL)
3468 if (GET_CODE (x) == RETURN)
3470 if (GET_CODE (x) == SET)
3472 if (SET_DEST (x) == pc_rtx)
3474 else if (GET_CODE (SET_SRC (x)) == CALL)
3479 if (GET_CODE (x) == PARALLEL)
3482 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
3483 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
3485 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3486 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
3488 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3489 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
3495 /* Emit the rtl pattern X as an appropriate kind of insn.
3496 If X is a label, it is simply added into the insn chain. */
3502 enum rtx_code code = classify_insn (x);
3504 if (code == CODE_LABEL)
3505 return emit_label (x);
3506 else if (code == INSN)
3507 return emit_insn (x);
3508 else if (code == JUMP_INSN)
3510 register rtx insn = emit_jump_insn (x);
3511 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
3512 return emit_barrier ();
3515 else if (code == CALL_INSN)
3516 return emit_call_insn (x);
3521 /* Begin emitting insns to a sequence which can be packaged in an
3522 RTL_EXPR. If this sequence will contain something that might cause
3523 the compiler to pop arguments to function calls (because those
3524 pops have previously been deferred; see INHIBIT_DEFER_POP for more
3525 details), use do_pending_stack_adjust before calling this function.
3526 That will ensure that the deferred pops are not accidentally
3527 emitted in the middle of this sequence. */
3532 struct sequence_stack *tem;
3534 tem = (struct sequence_stack *) xmalloc (sizeof (struct sequence_stack));
3536 tem->next = seq_stack;
3537 tem->first = first_insn;
3538 tem->last = last_insn;
3539 tem->sequence_rtl_expr = seq_rtl_expr;
3547 /* Similarly, but indicate that this sequence will be placed in T, an
3548 RTL_EXPR. See the documentation for start_sequence for more
3549 information about how to use this function. */
3552 start_sequence_for_rtl_expr (t)
3560 /* Set up the insn chain starting with FIRST as the current sequence,
3561 saving the previously current one. See the documentation for
3562 start_sequence for more information about how to use this function. */
3565 push_to_sequence (first)
3572 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
3578 /* Set up the insn chain from a chain stort in FIRST to LAST. */
3581 push_to_full_sequence (first, last)
3587 /* We really should have the end of the insn chain here. */
3588 if (last && NEXT_INSN (last))
3592 /* Set up the outer-level insn chain
3593 as the current sequence, saving the previously current one. */
3596 push_topmost_sequence ()
3598 struct sequence_stack *stack, *top = NULL;
3602 for (stack = seq_stack; stack; stack = stack->next)
3605 first_insn = top->first;
3606 last_insn = top->last;
3607 seq_rtl_expr = top->sequence_rtl_expr;
3610 /* After emitting to the outer-level insn chain, update the outer-level
3611 insn chain, and restore the previous saved state. */
3614 pop_topmost_sequence ()
3616 struct sequence_stack *stack, *top = NULL;
3618 for (stack = seq_stack; stack; stack = stack->next)
3621 top->first = first_insn;
3622 top->last = last_insn;
3623 /* ??? Why don't we save seq_rtl_expr here? */
3628 /* After emitting to a sequence, restore previous saved state.
3630 To get the contents of the sequence just made, you must call
3631 `gen_sequence' *before* calling here.
3633 If the compiler might have deferred popping arguments while
3634 generating this sequence, and this sequence will not be immediately
3635 inserted into the instruction stream, use do_pending_stack_adjust
3636 before calling gen_sequence. That will ensure that the deferred
3637 pops are inserted into this sequence, and not into some random
3638 location in the instruction stream. See INHIBIT_DEFER_POP for more
3639 information about deferred popping of arguments. */
3644 struct sequence_stack *tem = seq_stack;
3646 first_insn = tem->first;
3647 last_insn = tem->last;
3648 seq_rtl_expr = tem->sequence_rtl_expr;
3649 seq_stack = tem->next;
3654 /* This works like end_sequence, but records the old sequence in FIRST
3658 end_full_sequence (first, last)
3661 *first = first_insn;
3666 /* Return 1 if currently emitting into a sequence. */
3671 return seq_stack != 0;
3674 /* Generate a SEQUENCE rtx containing the insns already emitted
3675 to the current sequence.
3677 This is how the gen_... function from a DEFINE_EXPAND
3678 constructs the SEQUENCE that it returns. */
3688 /* Count the insns in the chain. */
3690 for (tem = first_insn; tem; tem = NEXT_INSN (tem))
3693 /* If only one insn, return it rather than a SEQUENCE.
3694 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
3695 the case of an empty list.)
3696 We only return the pattern of an insn if its code is INSN and it
3697 has no notes. This ensures that no information gets lost. */
3699 && ! RTX_FRAME_RELATED_P (first_insn)
3700 && GET_CODE (first_insn) == INSN
3701 /* Don't throw away any reg notes. */
3702 && REG_NOTES (first_insn) == 0)
3706 NEXT_INSN (first_insn) = free_insn;
3707 free_insn = first_insn;
3709 return PATTERN (first_insn);
3712 /* Put them in a vector. See if we already have a SEQUENCE of the
3713 appropriate length around. */
3714 if (!ggc_p && len < SEQUENCE_RESULT_SIZE
3715 && (result = sequence_result[len]) != 0)
3716 sequence_result[len] = 0;
3719 /* Ensure that this rtl goes in saveable_obstack, since we may
3721 push_obstacks_nochange ();
3722 rtl_in_saveable_obstack ();
3723 result = gen_rtx_SEQUENCE (VOIDmode, rtvec_alloc (len));
3727 for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++)
3728 XVECEXP (result, 0, i) = tem;
3733 /* Put the various virtual registers into REGNO_REG_RTX. */
3736 init_virtual_regs (es)
3737 struct emit_status *es;
3739 rtx *ptr = es->x_regno_reg_rtx;
3740 ptr[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
3741 ptr[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
3742 ptr[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
3743 ptr[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
3744 ptr[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
3748 clear_emit_caches ()
3752 /* Clear the start_sequence/gen_sequence cache. */
3753 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
3754 sequence_result[i] = 0;
3758 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
3759 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
3760 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
3761 static int copy_insn_n_scratches;
3763 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
3764 copied an ASM_OPERANDS.
3765 In that case, it is the original input-operand vector. */
3766 static rtvec orig_asm_operands_vector;
3768 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
3769 copied an ASM_OPERANDS.
3770 In that case, it is the copied input-operand vector. */
3771 static rtvec copy_asm_operands_vector;
3773 /* Likewise for the constraints vector. */
3774 static rtvec orig_asm_constraints_vector;
3775 static rtvec copy_asm_constraints_vector;
3777 /* Recursively create a new copy of an rtx for copy_insn.
3778 This function differs from copy_rtx in that it handles SCRATCHes and
3779 ASM_OPERANDs properly.
3780 Normally, this function is not used directly; use copy_insn as front end.
3781 However, you could first copy an insn pattern with copy_insn and then use
3782 this function afterwards to properly copy any REG_NOTEs containing
3791 register RTX_CODE code;
3792 register const char *format_ptr;
3794 code = GET_CODE (orig);
3810 for (i = 0; i < copy_insn_n_scratches; i++)
3811 if (copy_insn_scratch_in[i] == orig)
3812 return copy_insn_scratch_out[i];
3816 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
3817 a LABEL_REF, it isn't sharable. */
3818 if (GET_CODE (XEXP (orig, 0)) == PLUS
3819 && GET_CODE (XEXP (XEXP (orig, 0), 0)) == SYMBOL_REF
3820 && GET_CODE (XEXP (XEXP (orig, 0), 1)) == CONST_INT)
3824 /* A MEM with a constant address is not sharable. The problem is that
3825 the constant address may need to be reloaded. If the mem is shared,
3826 then reloading one copy of this mem will cause all copies to appear
3827 to have been reloaded. */
3833 copy = rtx_alloc (code);
3835 /* Copy the various flags, and other information. We assume that
3836 all fields need copying, and then clear the fields that should
3837 not be copied. That is the sensible default behavior, and forces
3838 us to explicitly document why we are *not* copying a flag. */
3839 memcpy (copy, orig, sizeof (struct rtx_def) - sizeof (rtunion));
3841 /* We do not copy the USED flag, which is used as a mark bit during
3842 walks over the RTL. */
3845 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
3846 if (GET_RTX_CLASS (code) == 'i')
3850 copy->frame_related = 0;
3853 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
3855 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
3857 copy->fld[i] = orig->fld[i];
3858 switch (*format_ptr++)
3861 if (XEXP (orig, i) != NULL)
3862 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
3867 if (XVEC (orig, i) == orig_asm_constraints_vector)
3868 XVEC (copy, i) = copy_asm_constraints_vector;
3869 else if (XVEC (orig, i) == orig_asm_operands_vector)
3870 XVEC (copy, i) = copy_asm_operands_vector;
3871 else if (XVEC (orig, i) != NULL)
3873 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
3874 for (j = 0; j < XVECLEN (copy, i); j++)
3875 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
3881 bitmap new_bits = BITMAP_OBSTACK_ALLOC (rtl_obstack);
3882 bitmap_copy (new_bits, XBITMAP (orig, i));
3883 XBITMAP (copy, i) = new_bits;
3894 /* These are left unchanged. */
3902 if (code == SCRATCH)
3904 i = copy_insn_n_scratches++;
3905 if (i >= MAX_RECOG_OPERANDS)
3907 copy_insn_scratch_in[i] = orig;
3908 copy_insn_scratch_out[i] = copy;
3910 else if (code == ASM_OPERANDS)
3912 orig_asm_operands_vector = XVEC (orig, 3);
3913 copy_asm_operands_vector = XVEC (copy, 3);
3914 orig_asm_constraints_vector = XVEC (orig, 4);
3915 copy_asm_constraints_vector = XVEC (copy, 4);
3921 /* Create a new copy of an rtx.
3922 This function differs from copy_rtx in that it handles SCRATCHes and
3923 ASM_OPERANDs properly.
3924 INSN doesn't really have to be a full INSN; it could be just the
3930 copy_insn_n_scratches = 0;
3931 orig_asm_operands_vector = 0;
3932 orig_asm_constraints_vector = 0;
3933 copy_asm_operands_vector = 0;
3934 copy_asm_constraints_vector = 0;
3935 return copy_insn_1 (insn);
3938 /* Initialize data structures and variables in this file
3939 before generating rtl for each function. */
3944 struct function *f = cfun;
3946 f->emit = (struct emit_status *) xmalloc (sizeof (struct emit_status));
3949 seq_rtl_expr = NULL;
3951 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
3954 first_label_num = label_num;
3958 clear_emit_caches ();
3960 /* Init the tables that describe all the pseudo regs. */
3962 f->emit->regno_pointer_flag_length = LAST_VIRTUAL_REGISTER + 101;
3964 f->emit->regno_pointer_flag
3965 = (char *) xcalloc (f->emit->regno_pointer_flag_length, sizeof (char));
3967 f->emit->regno_pointer_align
3968 = (unsigned char *) xcalloc (f->emit->regno_pointer_flag_length,
3969 sizeof (unsigned char));
3972 = (rtx *) xcalloc (f->emit->regno_pointer_flag_length * sizeof (rtx),
3975 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
3976 init_virtual_regs (f->emit);
3978 /* Indicate that the virtual registers and stack locations are
3980 REGNO_POINTER_FLAG (STACK_POINTER_REGNUM) = 1;
3981 REGNO_POINTER_FLAG (FRAME_POINTER_REGNUM) = 1;
3982 REGNO_POINTER_FLAG (HARD_FRAME_POINTER_REGNUM) = 1;
3983 REGNO_POINTER_FLAG (ARG_POINTER_REGNUM) = 1;
3985 REGNO_POINTER_FLAG (VIRTUAL_INCOMING_ARGS_REGNUM) = 1;
3986 REGNO_POINTER_FLAG (VIRTUAL_STACK_VARS_REGNUM) = 1;
3987 REGNO_POINTER_FLAG (VIRTUAL_STACK_DYNAMIC_REGNUM) = 1;
3988 REGNO_POINTER_FLAG (VIRTUAL_OUTGOING_ARGS_REGNUM) = 1;
3989 REGNO_POINTER_FLAG (VIRTUAL_CFA_REGNUM) = 1;
3991 #ifdef STACK_BOUNDARY
3992 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
3993 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
3994 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
3995 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
3997 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
3998 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
3999 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
4000 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
4001 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
4004 #ifdef INIT_EXPANDERS
4009 /* Mark SS for GC. */
4012 mark_sequence_stack (ss)
4013 struct sequence_stack *ss;
4017 ggc_mark_rtx (ss->first);
4018 ggc_mark_tree (ss->sequence_rtl_expr);
4023 /* Mark ES for GC. */
4026 mark_emit_status (es)
4027 struct emit_status *es;
4035 for (i = es->regno_pointer_flag_length, r = es->x_regno_reg_rtx;
4039 mark_sequence_stack (es->sequence_stack);
4040 ggc_mark_tree (es->sequence_rtl_expr);
4041 ggc_mark_rtx (es->x_first_insn);
4044 /* Create some permanent unique rtl objects shared between all functions.
4045 LINE_NUMBERS is nonzero if line numbers are to be generated. */
4048 init_emit_once (line_numbers)
4052 enum machine_mode mode;
4053 enum machine_mode double_mode;
4055 no_line_numbers = ! line_numbers;
4057 /* Compute the word and byte modes. */
4059 byte_mode = VOIDmode;
4060 word_mode = VOIDmode;
4061 double_mode = VOIDmode;
4063 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
4064 mode = GET_MODE_WIDER_MODE (mode))
4066 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
4067 && byte_mode == VOIDmode)
4070 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
4071 && word_mode == VOIDmode)
4075 #ifndef DOUBLE_TYPE_SIZE
4076 #define DOUBLE_TYPE_SIZE (BITS_PER_WORD * 2)
4079 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
4080 mode = GET_MODE_WIDER_MODE (mode))
4082 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
4083 && double_mode == VOIDmode)
4087 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
4089 /* Assign register numbers to the globally defined register rtx.
4090 This must be done at runtime because the register number field
4091 is in a union and some compilers can't initialize unions. */
4093 pc_rtx = gen_rtx (PC, VOIDmode);
4094 cc0_rtx = gen_rtx (CC0, VOIDmode);
4095 stack_pointer_rtx = gen_rtx_raw_REG (Pmode, STACK_POINTER_REGNUM);
4096 frame_pointer_rtx = gen_rtx_raw_REG (Pmode, FRAME_POINTER_REGNUM);
4097 if (hard_frame_pointer_rtx == 0)
4098 hard_frame_pointer_rtx = gen_rtx_raw_REG (Pmode,
4099 HARD_FRAME_POINTER_REGNUM);
4100 if (arg_pointer_rtx == 0)
4101 arg_pointer_rtx = gen_rtx_raw_REG (Pmode, ARG_POINTER_REGNUM);
4102 virtual_incoming_args_rtx =
4103 gen_rtx_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
4104 virtual_stack_vars_rtx =
4105 gen_rtx_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
4106 virtual_stack_dynamic_rtx =
4107 gen_rtx_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
4108 virtual_outgoing_args_rtx =
4109 gen_rtx_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
4110 virtual_cfa_rtx = gen_rtx_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
4112 /* These rtx must be roots if GC is enabled. */
4114 ggc_add_rtx_root (global_rtl, GR_MAX);
4116 #ifdef INIT_EXPANDERS
4117 /* This is to initialize save_machine_status and restore_machine_status before
4118 the first call to push_function_context_to. This is needed by the Chill
4119 front end which calls push_function_context_to before the first cal to
4120 init_function_start. */
4124 /* Create the unique rtx's for certain rtx codes and operand values. */
4126 /* Don't use gen_rtx here since gen_rtx in this case
4127 tries to use these variables. */
4128 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
4129 const_int_rtx[i + MAX_SAVED_CONST_INT] =
4130 gen_rtx_raw_CONST_INT (VOIDmode, i);
4132 ggc_add_rtx_root (const_int_rtx, 2 * MAX_SAVED_CONST_INT + 1);
4134 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
4135 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
4136 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
4138 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
4140 dconst0 = REAL_VALUE_ATOF ("0", double_mode);
4141 dconst1 = REAL_VALUE_ATOF ("1", double_mode);
4142 dconst2 = REAL_VALUE_ATOF ("2", double_mode);
4143 dconstm1 = REAL_VALUE_ATOF ("-1", double_mode);
4145 for (i = 0; i <= 2; i++)
4147 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
4148 mode = GET_MODE_WIDER_MODE (mode))
4150 rtx tem = rtx_alloc (CONST_DOUBLE);
4151 union real_extract u;
4153 bzero ((char *) &u, sizeof u); /* Zero any holes in a structure. */
4154 u.d = i == 0 ? dconst0 : i == 1 ? dconst1 : dconst2;
4156 bcopy ((char *) &u, (char *) &CONST_DOUBLE_LOW (tem), sizeof u);
4157 CONST_DOUBLE_MEM (tem) = cc0_rtx;
4158 CONST_DOUBLE_CHAIN (tem) = NULL_RTX;
4159 PUT_MODE (tem, mode);
4161 const_tiny_rtx[i][(int) mode] = tem;
4164 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
4166 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
4167 mode = GET_MODE_WIDER_MODE (mode))
4168 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
4170 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
4172 mode = GET_MODE_WIDER_MODE (mode))
4173 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
4176 for (mode = CCmode; mode < MAX_MACHINE_MODE; ++mode)
4177 if (GET_MODE_CLASS (mode) == MODE_CC)
4178 const_tiny_rtx[0][(int) mode] = const0_rtx;
4180 ggc_add_rtx_root (&const_tiny_rtx[0][0], sizeof(const_tiny_rtx)/sizeof(rtx));
4181 ggc_add_rtx_root (&const_true_rtx, 1);
4183 #ifdef RETURN_ADDRESS_POINTER_REGNUM
4184 return_address_pointer_rtx
4185 = gen_rtx_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
4189 struct_value_rtx = STRUCT_VALUE;
4191 struct_value_rtx = gen_rtx_REG (Pmode, STRUCT_VALUE_REGNUM);
4194 #ifdef STRUCT_VALUE_INCOMING
4195 struct_value_incoming_rtx = STRUCT_VALUE_INCOMING;
4197 #ifdef STRUCT_VALUE_INCOMING_REGNUM
4198 struct_value_incoming_rtx
4199 = gen_rtx_REG (Pmode, STRUCT_VALUE_INCOMING_REGNUM);
4201 struct_value_incoming_rtx = struct_value_rtx;
4205 #ifdef STATIC_CHAIN_REGNUM
4206 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
4208 #ifdef STATIC_CHAIN_INCOMING_REGNUM
4209 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
4210 static_chain_incoming_rtx
4211 = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
4214 static_chain_incoming_rtx = static_chain_rtx;
4218 static_chain_rtx = STATIC_CHAIN;
4220 #ifdef STATIC_CHAIN_INCOMING
4221 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
4223 static_chain_incoming_rtx = static_chain_rtx;
4227 #ifdef PIC_OFFSET_TABLE_REGNUM
4228 pic_offset_table_rtx = gen_rtx_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
4231 ggc_add_rtx_root (&pic_offset_table_rtx, 1);
4232 ggc_add_rtx_root (&struct_value_rtx, 1);
4233 ggc_add_rtx_root (&struct_value_incoming_rtx, 1);
4234 ggc_add_rtx_root (&static_chain_rtx, 1);
4235 ggc_add_rtx_root (&static_chain_incoming_rtx, 1);
4236 ggc_add_rtx_root (&return_address_pointer_rtx, 1);
4238 /* Initialize the CONST_INT hash table. */
4239 const_int_htab = htab_create (37, const_int_htab_hash,
4240 const_int_htab_eq, NULL);
4241 ggc_add_root (&const_int_htab, 1, sizeof (const_int_htab),
4245 /* Query and clear/ restore no_line_numbers. This is used by the
4246 switch / case handling in stmt.c to give proper line numbers in
4247 warnings about unreachable code. */
4250 force_line_numbers ()
4252 int old = no_line_numbers;
4254 no_line_numbers = 0;
4256 force_next_line_note ();
4261 restore_line_number_status (old_value)
4264 no_line_numbers = old_value;